WIFI: update rtl8822bu driver to v5.2.4.1_22719.20170613_COEX20170518-4444

Change-Id: Iee086caec7264f6eed65070db3f2de3c71369516

564 files changed, 88853 insertions, 67158 deletions

diff --git a/rtl8822BU/Kconfig b/rtl8822BU/Kconfig
index 548d63a..548d63a 100755..100644
--- a/rtl8822BU/Kconfig
+++ b/rtl8822BU/Kconfig
diff --git a/rtl8822BU/Makefile b/rtl8822BU/Makefile
index ca967d2..a3c8a6d 100755
--- a/rtl8822BU/Makefile
+++ b/rtl8822BU/Makefile
@@ -14,10 +14,13 @@ EXTRA_CFLAGS += -Wno-unused-parameter
 EXTRA_CFLAGS += -Wno-unused-function
 EXTRA_CFLAGS += -Wno-unused
 #EXTRA_CFLAGS += -Wno-uninitialized
-#EXTRA_CFLAGS += -Wno-error=date-time	# Fix compile error on gcc 4.9 and later
+
+GCC_VER_49 := $(shell echo `$(CC) -dumpversion | cut -f1-2 -d.` \>= 4.9 | bc )
+ifeq ($(GCC_VER_49),1)
+EXTRA_CFLAGS += -Wno-date-time	# Fix compile error && warning on gcc 4.9 and later
+endif
 
 EXTRA_CFLAGS += -I$(src)/include
-EXTRA_CFLAGS += -I$(src)/hal/phydm
 
 EXTRA_LDFLAGS += --strip-debug
 
@@ -141,6 +144,7 @@ CONFIG_PLATFORM_RTK129X = n
 CONFIG_PLATFORM_NOVATEK_NT72668 = n
 CONFIG_PLATFORM_HISILICON = n
 CONFIG_PLATFORM_NV_TK1 = n
+CONFIG_PLATFORM_RTL8197D = n
 ###############################################################
 
 CONFIG_DRVEXT_MODULE = n
@@ -213,43 +217,16 @@ _HAL_INTFS_FILES :=	hal/hal_intf.o \
 			hal/hal_hci/hal_$(HCI_NAME).o \
 			hal/led/hal_$(HCI_NAME)_led.o
 
-			
-_OUTSRC_FILES := hal/phydm/phydm_debug.o	\
-		hal/phydm/phydm_antdiv.o\
-		hal/phydm/phydm_antdect.o\
-		hal/phydm/phydm_interface.o\
-		hal/phydm/phydm_hwconfig.o\
-		hal/phydm/phydm.o\
-		hal/phydm/halphyrf_ce.o\
-		hal/phydm/phydm_edcaturbocheck.o\
-		hal/phydm/phydm_dig.o\
-		hal/phydm/phydm_pathdiv.o\
-		hal/phydm/phydm_rainfo.o\
-		hal/phydm/phydm_dynamicbbpowersaving.o\
-		hal/phydm/phydm_powertracking_ce.o\
-		hal/phydm/phydm_dynamictxpower.o\
-		hal/phydm/phydm_adaptivity.o\
-		hal/phydm/phydm_cfotracking.o\
-		hal/phydm/phydm_noisemonitor.o\
-		hal/phydm/phydm_acs.o\
-		hal/phydm/phydm_beamforming.o\
-		hal/phydm/phydm_dfs.o\
-		hal/phydm/txbf/halcomtxbf.o\
-		hal/phydm/txbf/haltxbfinterface.o\
-		hal/phydm/txbf/phydm_hal_txbf_api.o\
-		hal/phydm/phydm_adc_sampling.o\
-		hal/phydm/phydm_kfree.o\
-		hal/phydm/phydm_ccx.o
-
 
 EXTRA_CFLAGS += -I$(src)/platform
 _PLATFORM_FILES := platform/platform_ops.o
 
 EXTRA_CFLAGS += -I$(src)/hal/btc
-_OUTSRC_FILES += hal/btc/halbtc8723bwifionly.o \
-				hal/btc/halbtc8822bwifionly.o
+_BTC_FILES += hal/btc/halbtc8723bwifionly.o \
+				hal/btc/halbtc8822bwifionly.o \
+				hal/btc/halbtc8821cwifionly.o
 ifeq ($(CONFIG_BT_COEXIST), y)
-_OUTSRC_FILES += hal/btc/halbtc8192e1ant.o \
+_BTC_FILES += hal/btc/halbtc8192e1ant.o \
 				hal/btc/halbtc8192e2ant.o \
 				hal/btc/halbtc8723b1ant.o \
 				hal/btc/halbtc8723b2ant.o \
@@ -266,7 +243,7 @@ _OUTSRC_FILES += hal/btc/halbtc8192e1ant.o \
 				hal/btc/halbtc8821c2ant.o
 endif
 
-
+include $(M)/hal/phydm/phydm.mk
 ########### HAL_RTL8188E #################################
 ifeq ($(CONFIG_RTL8188E), y)
 
@@ -326,15 +303,6 @@ ifeq ($(CONFIG_SDIO_HCI), y)
 _HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188E_SDIO.o
 endif
 
-#hal/OUTSRC/$(RTL871X)/Hal8188EFWImg_CE.o
-_OUTSRC_FILES += hal/phydm/$(RTL871X)/halhwimg8188e_mac.o\
-		hal/phydm/$(RTL871X)/halhwimg8188e_bb.o\
-		hal/phydm/$(RTL871X)/halhwimg8188e_rf.o\
-		hal/phydm/$(RTL871X)/halphyrf_8188e_ce.o\
-		hal/phydm/$(RTL871X)/phydm_regconfig8188e.o\
-		hal/phydm/$(RTL871X)/hal8188erateadaptive.o\
-		hal/phydm/$(RTL871X)/phydm_rtl8188e.o
-
 endif
 
 ########### HAL_RTL8192E #################################
@@ -386,14 +354,9 @@ endif
 ifeq ($(CONFIG_PCI_HCI), y)
 _HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8192E_PCIE.o
 endif
-
-#hal/OUTSRC/$(RTL871X)/HalHWImg8188E_FW.o
-_OUTSRC_FILES += hal/phydm/$(RTL871X)/halhwimg8192e_mac.o\
-		hal/phydm/$(RTL871X)/halhwimg8192e_bb.o\
-		hal/phydm/$(RTL871X)/halhwimg8192e_rf.o\
-		hal/phydm/$(RTL871X)/halphyrf_8192e_ce.o\
-		hal/phydm/$(RTL871X)/phydm_regconfig8192e.o\
-		hal/phydm/$(RTL871X)/phydm_rtl8192e.o
+ifeq ($(CONFIG_SDIO_HCI), y)
+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8192E_SDIO.o
+endif
 
 endif
 
@@ -454,19 +417,14 @@ endif
 ifeq ($(CONFIG_PCI_HCI), y)
 _HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8821A_PCIE.o
 endif
+ifeq ($(CONFIG_SDIO_HCI), y)
+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8821A_SDIO.o
+endif
 endif
 
 ifeq ($(CONFIG_RTL8812A), y)
 EXTRA_CFLAGS += -DCONFIG_RTL8812A
 _HAL_INTFS_FILES +=	hal/rtl8812a/hal8812a_fw.o
-
-_OUTSRC_FILES += hal/phydm/$(RTL871X)/halhwimg8812a_mac.o\
-		hal/phydm/$(RTL871X)/halhwimg8812a_bb.o\
-		hal/phydm/$(RTL871X)/halhwimg8812a_rf.o\
-		hal/phydm/$(RTL871X)/halphyrf_8812a_ce.o\
-		hal/phydm/$(RTL871X)/phydm_regconfig8812a.o\
-		hal/phydm/$(RTL871X)/phydm_rtl8812a.o\
-		hal/phydm/txbf/haltxbfjaguar.o
 endif
 
 ifeq ($(CONFIG_RTL8821A), y)
@@ -493,15 +451,6 @@ endif
 EXTRA_CFLAGS += -DCONFIG_RTL8821A
 
 _HAL_INTFS_FILES +=	hal/rtl8812a/hal8821a_fw.o
-_OUTSRC_FILES += hal/phydm/rtl8821a/halhwimg8821a_mac.o\
-		hal/phydm/rtl8821a/halhwimg8821a_bb.o\
-		hal/phydm/rtl8821a/halhwimg8821a_rf.o\
-		hal/phydm/rtl8812a/halphyrf_8812a_ce.o\
-		hal/phydm/rtl8821a/halphyrf_8821a_ce.o\
-		hal/phydm/rtl8821a/phydm_regconfig8821a.o\
-		hal/phydm/rtl8821a/phydm_rtl8821a.o\
-		hal/phydm/rtl8821a/phydm_iqk_8821a_ce.o\
-		hal/phydm/txbf/haltxbfjaguar.o
 		
 endif
 
@@ -553,14 +502,9 @@ endif
 ifeq ($(CONFIG_PCI_HCI), y)
 _HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8723B_PCIE.o
 endif
-
-_OUTSRC_FILES += hal/phydm/$(RTL871X)/halhwimg8723b_bb.o\
-								hal/phydm/$(RTL871X)/halhwimg8723b_mac.o\
-								hal/phydm/$(RTL871X)/halhwimg8723b_rf.o\
-								hal/phydm/$(RTL871X)/halhwimg8723b_mp.o\
-								hal/phydm/$(RTL871X)/phydm_regconfig8723b.o\
-								hal/phydm/$(RTL871X)/halphyrf_8723b_ce.o\
-								hal/phydm/$(RTL871X)/phydm_rtl8723b.o
+ifeq ($(CONFIG_SDIO_HCI), y)
+_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8723B_SDIO.o
+endif
 
 endif
 
@@ -620,15 +564,6 @@ ifeq ($(CONFIG_PCI_HCI), y)
 _HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8814A_PCIE.o
 endif
 
-_OUTSRC_FILES += hal/phydm/$(RTL871X)/halhwimg8814a_bb.o\
-								hal/phydm/$(RTL871X)/halhwimg8814a_mac.o\
-								hal/phydm/$(RTL871X)/halhwimg8814a_rf.o\
-								hal/phydm/$(RTL871X)/phydm_iqk_8814a.o\
-								hal/phydm/$(RTL871X)/phydm_regconfig8814a.o\
-								hal/phydm/$(RTL871X)/halphyrf_8814a_ce.o\
-								hal/phydm/$(RTL871X)/phydm_rtl8814a.o\
-								hal/phydm/txbf/haltxbf8814a.o
-
 endif
 
 ########### HAL_RTL8723C #################################
@@ -681,11 +616,6 @@ ifeq ($(CONFIG_PCI_HCI), y)
 _HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8703B_PCIE.o
 endif
 
-_OUTSRC_FILES += hal/phydm/$(RTL871X)/halhwimg8703b_bb.o\
-								hal/phydm/$(RTL871X)/halhwimg8703b_mac.o\
-								hal/phydm/$(RTL871X)/halhwimg8703b_rf.o\
-								hal/phydm/$(RTL871X)/phydm_regconfig8703b.o\
-								hal/phydm/$(RTL871X)/halphyrf_8703b.o
 endif
 
 ########### HAL_RTL8723D #################################
@@ -740,12 +670,6 @@ ifeq ($(CONFIG_PCI_HCI), y)
 _HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8723D_PCIE.o
 endif
 
-_OUTSRC_FILES += hal/phydm/$(RTL871X)/halhwimg8723d_bb.o\
-								hal/phydm/$(RTL871X)/halhwimg8723d_mac.o\
-								hal/phydm/$(RTL871X)/halhwimg8723d_rf.o\
-								hal/phydm/$(RTL871X)/phydm_regconfig8723d.o\
-								hal/phydm/$(RTL871X)/phydm_rtl8723d.o\
-								hal/phydm/$(RTL871X)/halphyrf_8723d.o
 endif
 
 ########### HAL_RTL8188F #################################
@@ -796,13 +720,6 @@ ifeq ($(CONFIG_SDIO_HCI), y)
 _HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188F_SDIO.o
 endif
 
-_OUTSRC_FILES += hal/phydm/$(RTL871X)/halhwimg8188f_bb.o\
-								hal/phydm/$(RTL871X)/halhwimg8188f_mac.o\
-								hal/phydm/$(RTL871X)/halhwimg8188f_rf.o\
-								hal/phydm/$(RTL871X)/phydm_regconfig8188f.o\
-								hal/phydm/$(RTL871X)/halphyrf_8188f.o \
-								hal/phydm/$(RTL871X)/phydm_rtl8188f.o
-
 endif
 
 ########### HAL_RTL8822B #################################
@@ -813,14 +730,6 @@ endif
 ########### HAL_RTL8821C #################################
 ifeq ($(CONFIG_RTL8821C), y)
 include $(TopDIR)/rtl8821c.mk
-
-_OUTSRC_FILES +=	hal/phydm/rtl8821c/halhwimg8821c_bb.o \
-			hal/phydm/rtl8821c/halhwimg8821c_mac.o \
-			hal/phydm/rtl8821c/halhwimg8821c_rf.o \
-			hal/phydm/rtl8821c/phydm_hal_api8821c.o \
-			hal/phydm/rtl8821c/phydm_regconfig8821c.o\
-			hal/phydm/rtl8821c/halphyrf_8821c.o\
-			hal/phydm/rtl8821c/phydm_iqk_8821c.o
 endif
 
 ########### AUTO_CFG  #################################
@@ -1018,9 +927,6 @@ EXTRA_CFLAGS += -DCONFIG_BR_EXT
 EXTRA_CFLAGS += '-DCONFIG_BR_EXT_BRNAME="'$(BR_NAME)'"'
 endif
 
-ifeq ($(CONFIG_ANTENNA_DIVERSITY), y)
-EXTRA_CFLAGS += -DCONFIG_ANTENNA_DIVERSITY
-endif
 
 ifeq ($(CONFIG_TDLS), y)
 EXTRA_CFLAGS += -DCONFIG_TDLS
@@ -1168,8 +1074,12 @@ endif
 ifeq ($(CONFIG_PLATFORM_MSTAR), y)
 EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
 EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
-EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR -DCONFIG_USE_USB_BUFFER_ALLOC_TX -DCONFIG_FIX_NR_BULKIN_BUFFER
+EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
+EXTRA_CFLAGS += -DCONFIG_PLATFORM_MSTAR
 EXTRA_CFLAGS += -DCONFIG_PLATFORM_MSTAR_HIGH
+ifeq ($(CONFIG_USB_HCI), y)
+EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX -DCONFIG_FIX_NR_BULKIN_BUFFER
+endif
 ARCH:=arm
 CROSS_COMPILE:= /usr/src/bin/arm-none-linux-gnueabi-
 KVER:= 3.1.10
@@ -1745,19 +1655,20 @@ EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
 EXTRA_CFLAGS += -DRTK_129X_PLATFORM
 EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT
 # default setting for Android 4.1, 4.2
-#EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
+EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
 EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
 #EXTRA_CFLAGS += -DCONFIG_P2P_IPS -DCONFIG_QOS_OPTIMIZATION
 EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION
+# Enable this for Android 5.0
+EXTRA_CFLAGS += -DCONFIG_RADIO_WORK
 EXTRA_CFLAGS += -Wno-error=date-time
-
+# default setting for Android 7.0
+ifeq ($(RTK_ANDROID_VERSION), nougat)
+EXTRA_CFLAGS += -DRTW_P2P_GROUP_INTERFACE=1
+endif
 #EXTRA_CFLAGS += -DCONFIG_#PLATFORM_OPS
 ifeq ($(CONFIG_USB_HCI), y)
 EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX
-#_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o
-endif
-ifeq ($(CONFIG_SDIO_HCI), y)
-_PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o
 endif
 
 ARCH := arm64
@@ -1795,6 +1706,14 @@ KSRC := /home/android_sdk/Telechips/v13.05_r1-tcc-android-4.2.2_tcc893x-evm_buil
 MODULE_NAME := wlan
 endif 
 
+ifeq ($(CONFIG_PLATFORM_RTL8197D), y)
+EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN -DCONFIG_PLATFORM_RTL8197D
+export DIR_LINUX=$(shell pwd)/../SDK/rlxlinux-sdk321-v50/linux-2.6.30
+ARCH ?= rlx
+CROSS_COMPILE:= $(DIR_LINUX)/../toolchain/rsdk-1.5.5-5281-EB-2.6.30-0.9.30.3-110714/bin/rsdk-linux-
+KSRC := $(DIR_LINUX)
+endif
+
 ifeq ($(CONFIG_MULTIDRV), y)
 
 ifeq ($(CONFIG_SDIO_HCI), y)
@@ -1861,7 +1780,8 @@ $(MODULE_NAME)-$(CONFIG_WAPI_SUPPORT) += core/rtw_wapi.o	\
 
 $(MODULE_NAME)-y += $(_OS_INTFS_FILES)
 $(MODULE_NAME)-y += $(_HAL_INTFS_FILES)
-$(MODULE_NAME)-y += $(_OUTSRC_FILES)
+$(MODULE_NAME)-y += $(_PHYDM_FILES)
+$(MODULE_NAME)-y += $(_BTC_FILES)
 $(MODULE_NAME)-y += $(_PLATFORM_FILES)
 
 $(MODULE_NAME)-$(CONFIG_MP_INCLUDED) += core/rtw_mp.o
diff --git a/rtl8822BU/clean b/rtl8822BU/clean
index 8766421..8766421 100755..100644
--- a/rtl8822BU/clean
+++ b/rtl8822BU/clean
diff --git a/rtl8822BU/core/efuse/rtw_efuse.c b/rtl8822BU/core/efuse/rtw_efuse.c
index 06b373a..f3885e5 100755..100644
--- a/rtl8822BU/core/efuse/rtw_efuse.c
+++ b/rtl8822BU/core/efuse/rtw_efuse.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_EFUSE_C_
 
 #include <drv_types.h>
@@ -113,10 +108,10 @@ BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset)
 		return (IS_MASKED(8723D, _MUSB, Offset)) ? TRUE : FALSE;
 #endif
 
-	/*#if defined(CONFIG_RTL8821C)
-		if (IS_HARDWARE_TYPE_8821C(pAdapter))
-			return (IS_MASKED(8821C,_MUSB,Offset)) ? TRUE : FALSE;
-	#endif*/
+#if defined(CONFIG_RTL8821C)
+	if (IS_HARDWARE_TYPE_8821CU(pAdapter))
+		return (IS_MASKED(8821C, _MUSB, Offset)) ? TRUE : FALSE;
+#endif
 
 #elif DEV_BUS_TYPE == RT_PCI_INTERFACE
 #if defined(CONFIG_RTL8188E)
@@ -147,18 +142,34 @@ BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset)
 	if (IS_HARDWARE_TYPE_8822B(pAdapter))
 		return (IS_MASKED(8822B, _MPCIE, Offset)) ? TRUE : FALSE;
 #endif
+#if defined(CONFIG_RTL8821C)
+	if (IS_HARDWARE_TYPE_8821CE(pAdapter))
+		return (IS_MASKED(8821C, _MPCIE, Offset)) ? TRUE : FALSE;
+#endif
 
 #elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
 #ifdef CONFIG_RTL8188E_SDIO
 	if (IS_HARDWARE_TYPE_8188E(pAdapter))
 		return (IS_MASKED(8188E, _MSDIO, Offset)) ? TRUE : FALSE;
 #endif
+#ifdef CONFIG_RTL8723B
+	if (IS_HARDWARE_TYPE_8723BS(pAdapter))
+		return (IS_MASKED(8723B, _MSDIO, Offset)) ? TRUE : FALSE;
+#endif
 #ifdef CONFIG_RTL8188F_SDIO
 	if (IS_HARDWARE_TYPE_8188F(pAdapter))
 		return (IS_MASKED(8188F, _MSDIO, Offset)) ? TRUE : FALSE;
 #endif
+#ifdef CONFIG_RTL8192E
+	if (IS_HARDWARE_TYPE_8192ES(pAdapter))
+		return (IS_MASKED(8192E, _MSDIO, Offset)) ? TRUE : FALSE;
+#endif
+#if defined(CONFIG_RTL8821A)
+	if (IS_HARDWARE_TYPE_8821S(pAdapter))
+		return (IS_MASKED(8821A, _MSDIO, Offset)) ? TRUE : FALSE;
+#endif
 #if defined(CONFIG_RTL8821C)
-	if (IS_HARDWARE_TYPE_8821C(pAdapter))
+	if (IS_HARDWARE_TYPE_8821CS(pAdapter))
 		return (IS_MASKED(8821C, _MSDIO, Offset)) ? TRUE : FALSE;
 #endif
 #if defined(CONFIG_RTL8822B)
@@ -211,10 +222,12 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray)
 	if (IS_HARDWARE_TYPE_8822B(pAdapter))
 		GET_MASK_ARRAY(8822B, _MUSB, pArray);
 #endif
-	/*#if defined(CONFIG_RTL8821C)
-		if (IS_HARDWARE_TYPE_8821C(pAdapter))
-			GET_MASK_ARRAY(8821C,_MUSB,pArray);
-	#endif*/
+#if defined(CONFIG_RTL8821C)
+	if (IS_HARDWARE_TYPE_8821CU(pAdapter))
+		GET_MASK_ARRAY(8821C, _MUSB, pArray);
+#endif
+
+
 #elif DEV_BUS_TYPE == RT_PCI_INTERFACE
 #if defined(CONFIG_RTL8188E)
 	if (IS_HARDWARE_TYPE_8188E(pAdapter))
@@ -244,17 +257,35 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray)
 	if (IS_HARDWARE_TYPE_8822B(pAdapter))
 		GET_MASK_ARRAY(8822B, _MPCIE, pArray);
 #endif
+#if defined(CONFIG_RTL8821C)
+	if (IS_HARDWARE_TYPE_8821CE(pAdapter))
+		GET_MASK_ARRAY(8821C, _MPCIE, pArray);
+#endif
+
+
 #elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
 #if defined(CONFIG_RTL8188E)
 	if (IS_HARDWARE_TYPE_8188E(pAdapter))
 		GET_MASK_ARRAY(8188E, _MSDIO, pArray);
 #endif
+#if defined(CONFIG_RTL8723B)
+	if (IS_HARDWARE_TYPE_8723BS(pAdapter))
+		GET_MASK_ARRAY(8723B, _MSDIO, pArray);
+#endif
 #if defined(CONFIG_RTL8188F)
 	if (IS_HARDWARE_TYPE_8188F(pAdapter))
 		GET_MASK_ARRAY(8188F, _MSDIO, pArray);
 #endif
+#if defined(CONFIG_RTL8192E)
+	if (IS_HARDWARE_TYPE_8192ES(pAdapter))
+		GET_MASK_ARRAY(8192E, _MSDIO, pArray);
+#endif
+#if defined(CONFIG_RTL8821A)
+	if (IS_HARDWARE_TYPE_8821S(pAdapter))
+		GET_MASK_ARRAY(8821A, _MSDIO, pArray);
+#endif
 #if defined(CONFIG_RTL8821C)
-	if (IS_HARDWARE_TYPE_8821C(pAdapter))
+	if (IS_HARDWARE_TYPE_8821CS(pAdapter))
 		GET_MASK_ARRAY(8821C , _MSDIO, pArray);
 #endif
 #if defined(CONFIG_RTL8822B)
@@ -305,10 +336,12 @@ u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter)
 	if (IS_HARDWARE_TYPE_8822B(pAdapter))
 		return GET_MASK_ARRAY_LEN(8822B, _MUSB);
 #endif
-	/*#if defined(CONFIG_RTL8821C)
-		if (IS_HARDWARE_TYPE_8821C(pAdapter))
-			return GET_MASK_ARRAY_LEN(8821C,_MUSB);
-	#endif*/
+#if defined(CONFIG_RTL8821C)
+	if (IS_HARDWARE_TYPE_8821CU(pAdapter))
+		return GET_MASK_ARRAY_LEN(8821C, _MUSB);
+#endif
+
+
 #elif DEV_BUS_TYPE == RT_PCI_INTERFACE
 #if defined(CONFIG_RTL8188E)
 	if (IS_HARDWARE_TYPE_8188E(pAdapter))
@@ -338,17 +371,35 @@ u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter)
 	if (IS_HARDWARE_TYPE_8822B(pAdapter))
 		return GET_MASK_ARRAY_LEN(8822B, _MPCIE);
 #endif
+#if defined(CONFIG_RTL8821C)
+	if (IS_HARDWARE_TYPE_8821CE(pAdapter))
+		return GET_MASK_ARRAY_LEN(8821C, _MPCIE);
+#endif
+
+
 #elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
 #if defined(CONFIG_RTL8188E)
 	if (IS_HARDWARE_TYPE_8188E(pAdapter))
 		return GET_MASK_ARRAY_LEN(8188E, _MSDIO);
 #endif
+#if defined(CONFIG_RTL8723B)
+	if (IS_HARDWARE_TYPE_8723BS(pAdapter))
+		return GET_MASK_ARRAY_LEN(8723B, _MSDIO);
+#endif
 #if defined(CONFIG_RTL8188F)
 	if (IS_HARDWARE_TYPE_8188F(pAdapter))
 		return GET_MASK_ARRAY_LEN(8188F, _MSDIO);
 #endif
+#if defined(CONFIG_RTL8192E)
+	if (IS_HARDWARE_TYPE_8192ES(pAdapter))
+		return GET_MASK_ARRAY_LEN(8192E, _MSDIO);
+#endif
+#if defined(CONFIG_RTL8821A)
+	if (IS_HARDWARE_TYPE_8821S(pAdapter))
+		return GET_MASK_ARRAY_LEN(8821A, _MSDIO);
+#endif
 #if defined(CONFIG_RTL8821C)
-	if (IS_HARDWARE_TYPE_8821C(pAdapter))
+	if (IS_HARDWARE_TYPE_8821CS(pAdapter))
 		return GET_MASK_ARRAY_LEN(8821C, _MSDIO);
 #endif
 #if defined(CONFIG_RTL8822B)
@@ -388,6 +439,283 @@ u8 rtw_efuse_mask_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data)
 
 }
 
+/* ***********************************************************
+ *				Efuse related code
+ * *********************************************************** */
+static u8 hal_EfuseSwitchToBank(
+	PADAPTER	padapter,
+	u8			bank,
+	u8			bPseudoTest)
+{
+	u8 bRet = _FALSE;
+	u32 value32 = 0;
+#ifdef HAL_EFUSE_MEMORY
+	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
+	PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal;
+#endif
+
+
+	RTW_INFO("%s: Efuse switch bank to %d\n", __FUNCTION__, bank);
+	if (bPseudoTest) {
+#ifdef HAL_EFUSE_MEMORY
+		pEfuseHal->fakeEfuseBank = bank;
+#else
+		fakeEfuseBank = bank;
+#endif
+		bRet = _TRUE;
+	} else {
+		value32 = rtw_read32(padapter, 0x34);
+		bRet = _TRUE;
+		switch (bank) {
+		case 0:
+			value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
+			break;
+		case 1:
+			value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_0);
+			break;
+		case 2:
+			value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_1);
+			break;
+		case 3:
+			value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_2);
+			break;
+		default:
+			value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
+			bRet = _FALSE;
+			break;
+		}
+		rtw_write32(padapter, 0x34, value32);
+	}
+
+	return bRet;
+}
+
+void rtw_efuse_analyze(PADAPTER	padapter, u8 Type, u8 Fake)
+{
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	PEFUSE_HAL		pEfuseHal = &(pHalData->EfuseHal);
+	u16	eFuse_Addr = 0;
+	u8 offset, wden;
+	u16	 i, j;
+	u8	u1temp = 0;
+	u8	efuseHeader = 0, efuseExtHdr = 0, efuseData[EFUSE_MAX_WORD_UNIT*2] = {0}, dataCnt = 0;
+	u16	efuseHeader2Byte = 0;
+	u8	*eFuseWord = NULL;// [EFUSE_MAX_SECTION_NUM][EFUSE_MAX_WORD_UNIT];
+	u8	offset_2_0 = 0;
+	u8	pgSectionCnt = 0;
+	u8	wd_cnt = 0;
+	u8	max_section = 64;
+	u16	mapLen = 0, maprawlen = 0;
+	boolean	bExtHeader = _FALSE;
+	u8	efuseType = EFUSE_WIFI;
+	boolean	bPseudoTest = _FALSE;
+	u8	bank = 0, startBank = 0, endBank = 1-1;
+	boolean	bCheckNextBank = FALSE;
+	u8	protectBytesBank = 0;
+	u16	efuse_max = 0;
+	u8	ParseEfuseExtHdr, ParseEfuseHeader, ParseOffset, ParseWDEN, ParseOffset2_0;
+
+	eFuseWord = rtw_zmalloc(EFUSE_MAX_SECTION_NUM * (EFUSE_MAX_WORD_UNIT * 2));
+
+	RTW_INFO("\n");
+	if (Type == 0) {
+		if (Fake == 0) {
+			RTW_INFO("\n\tEFUSE_Analyze Wifi Content\n");
+			efuseType = EFUSE_WIFI;
+			bPseudoTest = FALSE;
+			startBank = 0;
+			endBank = 0;
+		} else {
+			RTW_INFO("\n\tEFUSE_Analyze Wifi Pseudo Content\n");
+			efuseType = EFUSE_WIFI;
+			bPseudoTest = TRUE;
+			startBank = 0;
+			endBank = 0;
+		}
+	} else {
+		if (Fake == 0) {
+			RTW_INFO("\n\tEFUSE_Analyze BT Content\n");
+			efuseType = EFUSE_BT;
+			bPseudoTest = FALSE;
+			startBank = 1;
+			endBank = EFUSE_MAX_BANK - 1;
+		} else {
+			RTW_INFO("\n\tEFUSE_Analyze BT Pseudo Content\n");
+			efuseType = EFUSE_BT;
+			bPseudoTest = TRUE;
+			startBank = 1;
+			endBank = EFUSE_MAX_BANK - 1;
+			if (IS_HARDWARE_TYPE_8821(padapter))
+				endBank = 3 - 1;/*EFUSE_MAX_BANK_8821A - 1;*/
+		}
+	}
+
+	RTW_INFO("\n\r 1Byte header, [7:4]=offset, [3:0]=word enable\n");
+	RTW_INFO("\n\r 2Byte header, header[7:5]=offset[2:0], header[4:0]=0x0F\n");
+	RTW_INFO("\n\r 2Byte header, extHeader[7:4]=offset[6:3], extHeader[3:0]=word enable\n");
+
+	EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, bPseudoTest);
+	EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_EFUSE_MAX_SECTION, (PVOID)&max_section, bPseudoTest);
+	EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_EFUSE_PROTECT_BYTES_BANK, (PVOID)&protectBytesBank, bPseudoTest);
+	EFUSE_GetEfuseDefinition(padapter, efuseType, TYPE_EFUSE_CONTENT_LEN_BANK, (PVOID)&efuse_max, bPseudoTest);
+	EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&maprawlen, _FALSE);
+
+	_rtw_memset(eFuseWord, 0xff, EFUSE_MAX_SECTION_NUM * (EFUSE_MAX_WORD_UNIT * 2));
+	_rtw_memset(pEfuseHal->fakeEfuseInitMap, 0xff, EFUSE_MAX_MAP_LEN);
+
+	if (IS_HARDWARE_TYPE_8821(padapter))
+		endBank = 3 - 1;/*EFUSE_MAX_BANK_8821A - 1;*/
+
+	for (bank = startBank; bank <= endBank; bank++) {
+		if (!hal_EfuseSwitchToBank(padapter, bank, bPseudoTest)) {
+			RTW_INFO("EFUSE_SwitchToBank() Fail!!\n");
+			return;
+		}
+
+		eFuse_Addr = bank * EFUSE_MAX_BANK_SIZE;
+
+		efuse_OneByteRead(padapter, eFuse_Addr++, &efuseHeader, bPseudoTest);
+
+		if (efuseHeader == 0xFF && bank == startBank && Fake != TRUE) {
+			RTW_INFO("Non-PGed Efuse\n");
+			return;
+		}
+		RTW_INFO("EFUSE_REAL_CONTENT_LEN = %d\n", maprawlen);
+
+		while ((efuseHeader != 0xFF) && ((efuseType == EFUSE_WIFI && (eFuse_Addr < maprawlen)) || (efuseType == EFUSE_BT && (eFuse_Addr < (endBank + 1) * EFUSE_MAX_BANK_SIZE)))) {
+
+			RTW_INFO("Analyzing: Offset: 0x%X\n", eFuse_Addr);
+
+			/* Check PG header for section num.*/
+			if (EXT_HEADER(efuseHeader)) {
+				bExtHeader = TRUE;
+				offset_2_0 = GET_HDR_OFFSET_2_0(efuseHeader);
+				efuse_OneByteRead(padapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest);
+
+				if (efuseExtHdr != 0xff) {
+					if (ALL_WORDS_DISABLED(efuseExtHdr)) {
+						/* Read next pg header*/
+						efuse_OneByteRead(padapter, eFuse_Addr++, &efuseHeader, bPseudoTest);
+						continue;
+					} else {
+						offset = ((efuseExtHdr & 0xF0) >> 1) | offset_2_0;
+						wden = (efuseExtHdr & 0x0F);
+						efuseHeader2Byte = (efuseExtHdr<<8)|efuseHeader;
+						RTW_INFO("Find efuseHeader2Byte = 0x%04X, offset=%d, wden=0x%x\n",
+										efuseHeader2Byte, offset, wden);
+					}
+				} else {
+					RTW_INFO("Error, efuse[%d]=0xff, efuseExtHdr=0xff\n", eFuse_Addr-1);
+					break;
+				}
+			} else {
+				offset = ((efuseHeader >> 4) & 0x0f);
+				wden = (efuseHeader & 0x0f);
+			}
+
+			_rtw_memset(efuseData, '\0', EFUSE_MAX_WORD_UNIT * 2);
+			dataCnt = 0;
+
+			if (offset < max_section) {
+				for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) {
+					/* Check word enable condition in the section	*/
+					if (!(wden & (0x01<<i))) {
+						if (!((efuseType == EFUSE_WIFI && (eFuse_Addr + 2 < maprawlen)) ||
+								(efuseType == EFUSE_BT && (eFuse_Addr + 2 < (endBank + 1) * EFUSE_MAX_BANK_SIZE)))) {
+							RTW_INFO("eFuse_Addr exceeds, break\n");
+							break;
+						}
+						efuse_OneByteRead(padapter, eFuse_Addr++, &efuseData[dataCnt++], bPseudoTest);
+						eFuseWord[(offset * 8) + (i * 2)] = (efuseData[dataCnt - 1]);
+						efuse_OneByteRead(padapter, eFuse_Addr++, &efuseData[dataCnt++], bPseudoTest);
+						eFuseWord[(offset * 8) + (i * 2 + 1)] = (efuseData[dataCnt - 1]);
+					}
+				}
+			}
+
+			if (bExtHeader) {
+				RTW_INFO("Efuse PG Section (%d) = ", pgSectionCnt);
+				RTW_INFO("[ %04X ], [", efuseHeader2Byte);
+
+			} else {
+				RTW_INFO("Efuse PG Section (%d) = ", pgSectionCnt);
+				RTW_INFO("[ %02X ], [", efuseHeader);
+			}
+
+			for (j = 0; j < dataCnt; j++)
+				RTW_INFO(" %02X ", efuseData[j]);
+
+			RTW_INFO("]\n");
+
+
+			if (bExtHeader) {
+				ParseEfuseExtHdr = (efuseHeader2Byte & 0xff00) >> 8;
+				ParseEfuseHeader = (efuseHeader2Byte & 0xff);
+				ParseOffset2_0 = GET_HDR_OFFSET_2_0(ParseEfuseHeader);
+				ParseOffset = ((ParseEfuseExtHdr & 0xF0) >> 1) | ParseOffset2_0;
+				ParseWDEN = (ParseEfuseExtHdr & 0x0F);
+				RTW_INFO("Header=0x%x, ExtHeader=0x%x, ", ParseEfuseHeader, ParseEfuseExtHdr);
+			} else {
+				ParseEfuseHeader = efuseHeader;
+				ParseOffset = ((ParseEfuseHeader >> 4) & 0x0f);
+				ParseWDEN = (ParseEfuseHeader & 0x0f);
+				RTW_INFO("Header=0x%x, ", ParseEfuseHeader);
+			}
+			RTW_INFO("offset=0x%x(%d), word enable=0x%x\n", ParseOffset, ParseOffset, ParseWDEN);
+
+			wd_cnt = 0;
+			for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) {
+				if (!(wden & (0x01 << i))) {
+					RTW_INFO("Map[ %02X ] = %02X %02X\n", ((offset * EFUSE_MAX_WORD_UNIT * 2) + (i * 2)), efuseData[wd_cnt * 2 + 0], efuseData[wd_cnt * 2 + 1]);
+					wd_cnt++;
+				}
+			}
+
+			pgSectionCnt++;
+			bExtHeader = FALSE;
+			efuse_OneByteRead(padapter, eFuse_Addr++, &efuseHeader, bPseudoTest);
+			if (efuseHeader == 0xFF) {
+				if ((eFuse_Addr + protectBytesBank) >= efuse_max)
+					bCheckNextBank = TRUE;
+				else
+					bCheckNextBank = FALSE;
+			}
+		}
+		if (!bCheckNextBank) {
+			RTW_INFO("Not need to check next bank, eFuse_Addr=%d, protectBytesBank=%d, efuse_max=%d\n",
+				eFuse_Addr, protectBytesBank, efuse_max);
+			break;
+		}
+	}
+	/* switch bank back to 0 for BT/wifi later use*/
+	hal_EfuseSwitchToBank(padapter, 0, bPseudoTest);
+
+	/* 3. Collect 16 sections and 4 word unit into Efuse map.*/
+	for (i = 0; i < max_section; i++) {
+		for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) {
+			pEfuseHal->fakeEfuseInitMap[(i*8)+(j*2)] = (eFuseWord[(i*8)+(j*2)]);
+			pEfuseHal->fakeEfuseInitMap[(i*8)+((j*2)+1)] =  (eFuseWord[(i*8)+((j*2)+1)]);
+		}
+	}
+
+	RTW_INFO("\n\tEFUSE Analyze Map\n");
+	i = 0;
+	j = 0;
+
+	for (i = 0; i < mapLen; i++) {
+		if (i % 16 == 0)
+			RTW_PRINT_SEL(RTW_DBGDUMP, "0x%03x: ", i);
+			_RTW_PRINT_SEL(RTW_DBGDUMP, "%02X%s"
+				, pEfuseHal->fakeEfuseInitMap[i]
+				, ((i + 1) % 16 == 0) ? "\n" : (((i + 1) % 8 == 0) ? "	  " : " ")
+			);
+		}
+	_RTW_PRINT_SEL(RTW_DBGDUMP, "\n");
+	if (eFuseWord)
+		rtw_mfree((u8 *)eFuseWord, EFUSE_MAX_SECTION_NUM * (EFUSE_MAX_WORD_UNIT * 2));
+}
+
+
 #ifdef RTW_HALMAC
 #include "../../hal/hal_halmac.h"
 
@@ -435,16 +763,30 @@ u16 efuse_GetavailableSize(PADAPTER adapter)
 }
 
 
-u8 efuse_bt_GetCurrentSize(PADAPTER adapter, u16 *size)
+u8 efuse_bt_GetCurrentSize(PADAPTER adapter, u16 *usesize)
 {
-	*size = 0;
+	u8 *efuse_map;
 
-	return _FAIL;
+	*usesize = 0;
+	efuse_map = rtw_malloc(EFUSE_BT_MAP_LEN);
+	if (efuse_map == NULL) {
+		RTW_DBG("%s: malloc FAIL\n", __FUNCTION__);
+		return _FAIL;
+	}
+
+	/* for get bt phy efuse last use byte */
+	hal_ReadEFuse_BT_logic_map(adapter, 0x00, EFUSE_BT_MAP_LEN, efuse_map);
+	*usesize = fakeBTEfuseUsedBytes;
+
+	if (efuse_map)
+		rtw_mfree(efuse_map, EFUSE_BT_MAP_LEN);
+
+	return _SUCCESS;
 }
 
 u16 efuse_bt_GetMaxSize(PADAPTER adapter)
 {
-	return 0;
+	return EFUSE_BT_REAL_CONTENT_LEN;
 }
 
 void EFUSE_GetEfuseDefinition(PADAPTER adapter, u8 efusetype, u8 type, void *out, BOOLEAN test)
@@ -472,6 +814,16 @@ void EFUSE_GetEfuseDefinition(PADAPTER adapter, u8 efusetype, u8 type, void *out
 			*(u16 *)out = (u16)v32;
 			return;
 		}
+	} else if (EFUSE_BT == efusetype) {
+		switch (type) {
+		case TYPE_EFUSE_MAP_LEN:
+			*(u16 *)out = EFUSE_BT_MAP_LEN;
+			return;
+
+		case TYPE_EFUSE_REAL_CONTENT_LEN:
+			*(u16 *)out = EFUSE_BT_REAL_CONTENT_LEN;
+			return;
+		}
 	}
 }
 
@@ -895,7 +1247,6 @@ VOID hal_ReadEFuse_BT_logic_map(
 		efuse_usage = 100;
 
 	fakeBTEfuseUsedBytes = used;
-
 	RTW_INFO("%s: BTEfuseUsed last Bytes = %#x\n", __FUNCTION__, fakeBTEfuseUsedBytes);
 
 exit:
@@ -1166,58 +1517,6 @@ hal_EfusePgPacketWriteData(
 	return _TRUE;
 }
 
-/* ***********************************************************
- *				Efuse related code
- * *********************************************************** */
-static u8
-hal_EfuseSwitchToBank(
-	PADAPTER	padapter,
-	u8			bank,
-	u8			bPseudoTest)
-{
-	u8 bRet = _FALSE;
-	u32 value32 = 0;
-#ifdef HAL_EFUSE_MEMORY
-	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
-	PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal;
-#endif
-
-
-	RTW_INFO("%s: Efuse switch bank to %d\n", __FUNCTION__, bank);
-	if (bPseudoTest) {
-#ifdef HAL_EFUSE_MEMORY
-		pEfuseHal->fakeEfuseBank = bank;
-#else
-		fakeEfuseBank = bank;
-#endif
-		bRet = _TRUE;
-	} else {
-		value32 = rtw_read32(padapter, 0x34);
-		bRet = _TRUE;
-		switch (bank) {
-		case 0:
-			value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
-			break;
-		case 1:
-			value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_0);
-			break;
-		case 2:
-			value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_1);
-			break;
-		case 3:
-			value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_2);
-			break;
-		default:
-			value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
-			bRet = _FALSE;
-			break;
-		}
-		rtw_write32(padapter, 0x34, value32);
-	}
-
-	return bRet;
-}
-
 
 #define EFUSE_CTRL				0x30		/* E-Fuse Control. */
 
@@ -1412,6 +1711,48 @@ u8 EfusePgPacketWrite_BT(
 #define EFUSE_CTRL			REG_EFUSE_CTRL		/* E-Fuse Control. */
 /* ------------------------------------------------------------------------------ */
 
+VOID efuse_PreUpdateAction(
+	PADAPTER	pAdapter,
+	pu4Byte	BackupRegs)
+{
+#if defined(CONFIG_RTL8812A)
+	if (IS_HARDWARE_TYPE_8812AU(pAdapter)) {
+		/* <20131115, Kordan> Turn off Rx to prevent from being busy when writing the EFUSE. (Asked by Chunchu.)*/
+		BackupRegs[0] = phy_query_mac_reg(pAdapter, REG_RCR, bMaskDWord);
+		BackupRegs[1] = phy_query_mac_reg(pAdapter, REG_RXFLTMAP0, bMaskDWord);
+		BackupRegs[2] = phy_query_mac_reg(pAdapter, REG_RXFLTMAP0+4, bMaskDWord);
+		BackupRegs[3] = phy_query_mac_reg(pAdapter, REG_AFE_MISC, bMaskDWord);
+
+		PlatformEFIOWrite4Byte(pAdapter, REG_RCR, 0x1);
+		PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0, 0);
+		PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+1, 0);
+		PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+2, 0);
+		PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+3, 0);
+		PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+4, 0);
+		PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+5, 0);
+
+		/* <20140410, Kordan> 0x11 = 0x4E, lower down LX_SPS0 voltage. (Asked by Chunchu)*/
+		phy_set_mac_reg(pAdapter, REG_AFE_MISC, bMaskByte1, 0x4E);
+		}
+#endif
+}
+
+VOID efuse_PostUpdateAction(
+	PADAPTER	pAdapter,
+	pu4Byte	BackupRegs)
+{
+#if defined(CONFIG_RTL8812A)
+	if (IS_HARDWARE_TYPE_8812AU(pAdapter)) {
+		/* <20131115, Kordan> Turn on Rx and restore the registers. (Asked by Chunchu.)*/
+		phy_set_mac_reg(pAdapter, REG_RCR, bMaskDWord, BackupRegs[0]);
+		phy_set_mac_reg(pAdapter, REG_RXFLTMAP0, bMaskDWord, BackupRegs[1]);
+		phy_set_mac_reg(pAdapter, REG_RXFLTMAP0+4, bMaskDWord, BackupRegs[2]);
+		phy_set_mac_reg(pAdapter, REG_AFE_MISC, bMaskDWord, BackupRegs[3]);
+	}
+#endif
+}
+
+
 BOOLEAN
 Efuse_Read1ByteFromFakeContent(
 	IN		PADAPTER	pAdapter,
@@ -1738,6 +2079,8 @@ efuse_OneByteWrite(
 	} else
 		rtw_write32(pAdapter, EFUSE_CTRL, efuseValue);
 
+	rtw_mdelay_os(1);
+
 	while ((0x80 &  rtw_read8(pAdapter, EFUSE_CTRL + 3)) && (tmpidx < 100)) {
 		rtw_mdelay_os(1);
 		tmpidx++;
@@ -1840,6 +2183,8 @@ u8 rtw_efuse_access(PADAPTER padapter, u8 bWrite, u16 start_addr, u16 cnts, u8 *
 	u16	real_content_len = 0, max_available_size = 0;
 	u8 res = _FAIL ;
 	u8(*rw8)(PADAPTER, u16, u8 *);
+	u32	backupRegs[4] = {0};
+
 
 	EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&real_content_len, _FALSE);
 	EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE);
@@ -1854,6 +2199,8 @@ u8 rtw_efuse_access(PADAPTER padapter, u8 bWrite, u16 start_addr, u16 cnts, u8 *
 	} else
 		rw8 = &efuse_read8;
 
+	efuse_PreUpdateAction(padapter, backupRegs);
+
 	Efuse_PowerSwitch(padapter, bWrite, _TRUE);
 
 	/* e-fuse one byte read / write */
@@ -1870,6 +2217,8 @@ u8 rtw_efuse_access(PADAPTER padapter, u8 bWrite, u16 start_addr, u16 cnts, u8 *
 
 	Efuse_PowerSwitch(padapter, bWrite, _FALSE);
 
+	efuse_PostUpdateAction(padapter, backupRegs);
+
 	return res;
 }
 /* ------------------------------------------------------------------------------ */
@@ -1961,9 +2310,11 @@ u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data)
 	s32	i, j, idx, chk_total_byte;
 	u8	ret = _SUCCESS;
 	u16	mapLen = 0, startAddr = 0, efuse_max_available_len = 0;
+	u32	backupRegs[4] = {0};
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
 	PEFUSE_HAL	pEfuseHal = &pHalData->EfuseHal;
 
+
 	EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE);
 	EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &efuse_max_available_len, _FALSE);
 
@@ -2037,6 +2388,7 @@ u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data)
 		goto exit;
 	}
 
+	efuse_PreUpdateAction(padapter, backupRegs);
 
 	idx = 0;
 	offset = (addr >> 3);
@@ -2077,6 +2429,8 @@ u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data)
 
 	/*Efuse_PowerSwitch(padapter, _TRUE, _FALSE);*/
 
+	efuse_PostUpdateAction(padapter, backupRegs);
+
 exit:
 
 	rtw_mfree(map, mapLen);
@@ -2207,67 +2561,6 @@ Efuse_ReadAllMap(
 }
 
 /*-----------------------------------------------------------------------------
- * Function:	efuse_ShadowRead1Byte
- *			efuse_ShadowRead2Byte
- *			efuse_ShadowRead4Byte
- *
- * Overview:	Read from efuse init map by one/two/four bytes !!!!!
- *
- * Input:       NONE
- *
- * Output:      NONE
- *
- * Return:      NONE
- *
- * Revised History:
- * When			Who		Remark
- * 11/12/2008	MHC		Create Version 0.
- *
- *---------------------------------------------------------------------------*/
-static VOID
-efuse_ShadowRead1Byte(
-	IN	PADAPTER	pAdapter,
-	IN	u16		Offset,
-	IN OUT	u8		*Value)
-{
-	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
-
-	*Value = pHalData->efuse_eeprom_data[Offset];
-
-}	/* EFUSE_ShadowRead1Byte */
-
-/* ---------------Read Two Bytes */
-static VOID
-efuse_ShadowRead2Byte(
-	IN	PADAPTER	pAdapter,
-	IN	u16		Offset,
-	IN OUT	u16		*Value)
-{
-	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
-
-	*Value = pHalData->efuse_eeprom_data[Offset];
-	*Value |= pHalData->efuse_eeprom_data[Offset + 1] << 8;
-
-}	/* EFUSE_ShadowRead2Byte */
-
-/* ---------------Read Four Bytes */
-static VOID
-efuse_ShadowRead4Byte(
-	IN	PADAPTER	pAdapter,
-	IN	u16		Offset,
-	IN OUT	u32		*Value)
-{
-	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
-
-	*Value = pHalData->efuse_eeprom_data[Offset];
-	*Value |= pHalData->efuse_eeprom_data[Offset + 1] << 8;
-	*Value |= pHalData->efuse_eeprom_data[Offset + 2] << 16;
-	*Value |= pHalData->efuse_eeprom_data[Offset + 3] << 24;
-
-}	/* efuse_ShadowRead4Byte */
-
-
-/*-----------------------------------------------------------------------------
  * Function:	efuse_ShadowWrite1Byte
  *			efuse_ShadowWrite2Byte
  *			efuse_ShadowWrite4Byte
@@ -2338,38 +2631,6 @@ efuse_ShadowWrite4Byte(
 
 
 /*-----------------------------------------------------------------------------
- * Function:	EFUSE_ShadowRead
- *
- * Overview:	Read from efuse init map !!!!!
- *
- * Input:       NONE
- *
- * Output:      NONE
- *
- * Return:      NONE
- *
- * Revised History:
- * When			Who		Remark
- * 11/12/2008	MHC		Create Version 0.
- *
- *---------------------------------------------------------------------------*/
-void
-EFUSE_ShadowRead(
-	IN		PADAPTER	pAdapter,
-	IN		u8		Type,
-	IN		u16		Offset,
-	IN OUT	u32		*Value)
-{
-	if (Type == 1)
-		efuse_ShadowRead1Byte(pAdapter, Offset, (u8 *)Value);
-	else if (Type == 2)
-		efuse_ShadowRead2Byte(pAdapter, Offset, (u16 *)Value);
-	else if (Type == 4)
-		efuse_ShadowRead4Byte(pAdapter, Offset, (u32 *)Value);
-
-}	/* EFUSE_ShadowRead */
-
-/*-----------------------------------------------------------------------------
  * Function:	EFUSE_ShadowWrite
  *
  * Overview:	Write efuse modify map for later update operation to use!!!!!
@@ -2440,6 +2701,87 @@ Efuse_InitSomeVar(
 	_rtw_memset((PVOID)&fakeBTEfuseModifiedMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN);
 }
 #endif /* !RTW_HALMAC */
+/*-----------------------------------------------------------------------------
+ * Function:	efuse_ShadowRead1Byte
+ *			efuse_ShadowRead2Byte
+ *			efuse_ShadowRead4Byte
+ *
+ * Overview:	Read from efuse init map by one/two/four bytes !!!!!
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/12/2008	MHC		Create Version 0.
+ *
+ *---------------------------------------------------------------------------*/
+static VOID
+efuse_ShadowRead1Byte(
+	IN	PADAPTER	pAdapter,
+	IN	u16		Offset,
+	IN OUT	u8		*Value)
+{
+	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
+
+	*Value = pHalData->efuse_eeprom_data[Offset];
+
+}	/* EFUSE_ShadowRead1Byte */
+
+/* ---------------Read Two Bytes */
+static VOID
+efuse_ShadowRead2Byte(
+	IN	PADAPTER	pAdapter,
+	IN	u16		Offset,
+	IN OUT	u16		*Value)
+{
+	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
+
+	*Value = pHalData->efuse_eeprom_data[Offset];
+	*Value |= pHalData->efuse_eeprom_data[Offset + 1] << 8;
+
+}	/* EFUSE_ShadowRead2Byte */
+
+/* ---------------Read Four Bytes */
+static VOID
+efuse_ShadowRead4Byte(
+	IN	PADAPTER	pAdapter,
+	IN	u16		Offset,
+	IN OUT	u32		*Value)
+{
+	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
+
+	*Value = pHalData->efuse_eeprom_data[Offset];
+	*Value |= pHalData->efuse_eeprom_data[Offset + 1] << 8;
+	*Value |= pHalData->efuse_eeprom_data[Offset + 2] << 16;
+	*Value |= pHalData->efuse_eeprom_data[Offset + 3] << 24;
+
+}	/* efuse_ShadowRead4Byte */
+
+/*-----------------------------------------------------------------------------
+ * Function:	EFUSE_ShadowRead
+ *
+ * Overview:	Read from pHalData->efuse_eeprom_data
+ *---------------------------------------------------------------------------*/
+void
+EFUSE_ShadowRead(
+	IN		PADAPTER	pAdapter,
+	IN		u8		Type,
+	IN		u16		Offset,
+	IN OUT	u32		*Value)
+{
+	if (Type == 1)
+		efuse_ShadowRead1Byte(pAdapter, Offset, (u8 *)Value);
+	else if (Type == 2)
+		efuse_ShadowRead2Byte(pAdapter, Offset, (u16 *)Value);
+	else if (Type == 4)
+		efuse_ShadowRead4Byte(pAdapter, Offset, (u32 *)Value);
+
+}	/* EFUSE_ShadowRead */
+
 /*  11/16/2008 MH Add description. Get current efuse area enabled word!!. */
 u8
 Efuse_CalculateWordCnts(IN u8	word_en)
diff --git a/rtl8822BU/core/rtw_ap.c b/rtl8822BU/core/rtw_ap.c
index a2f21c7..99425b2 100755..100644
--- a/rtl8822BU/core/rtw_ap.c
+++ b/rtl8822BU/core/rtw_ap.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,16 +11,11 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_AP_C_
 
 #include <drv_types.h>
-
+#include <hal_data.h>
 
 #ifdef CONFIG_AP_MODE
 
@@ -540,7 +535,7 @@ void	expire_timeout_chk(_adapter *padapter)
 #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK
 	if (chk_alive_num) {
 
-		u8 backup_ch = 0, backup_bw, backup_offset;
+		u8 backup_ch = 0, backup_bw = 0, backup_offset = 0;
 		u8 union_ch = 0, union_bw, union_offset;
 		u8 switch_channel = _TRUE;
 		struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
@@ -619,7 +614,7 @@ bypass_active_keep_alive:
 	associated_clients_update(padapter, updated, STA_INFO_UPDATE_ALL);
 }
 
-void add_RATid(_adapter *padapter, struct sta_info *psta, u8 rssi_level)
+void add_RATid(_adapter *padapter, struct sta_info *psta, u8 rssi_level, u8 is_update_bw)
 {
 	int i;
 	u8 rf_type;
@@ -674,7 +669,7 @@ void add_RATid(_adapter *padapter, struct sta_info *psta, u8 rssi_level)
 		RTW_INFO("%s=> mac_id:%d , raid:%d, tx_ra_bitmap:0x%016llx, networkType:0x%02x\n",
 			__FUNCTION__, psta->mac_id, psta->raid, tx_ra_bitmap, psta->wireless_mode);
 
-		rtw_update_ramask(padapter, psta, psta->mac_id, rssi_level);
+		rtw_update_ramask(padapter, psta, psta->mac_id, rssi_level, is_update_bw);
 	} else
 		RTW_INFO("station aid %d exceed the max number\n", psta->aid);
 
@@ -725,7 +720,7 @@ void update_bmc_sta(_adapter *padapter)
 		_exit_critical_bh(&psta->lock, &irqL);
 
 		rtw_sta_media_status_rpt(padapter, psta, 1);
-		rtw_hal_update_ra_mask(psta, 0);
+		rtw_hal_update_ra_mask(psta, psta->rssi_level, _TRUE);
 	} else
 		RTW_INFO("add_RATid_bmc_sta error!\n");
 
@@ -1176,7 +1171,7 @@ static void rtw_ap_check_scan(_adapter *padapter)
 
 		pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list);
 
-		if (rtw_ch_set_search_ch(padapter->mlmeextpriv.channel_set, pnetwork->network.Configuration.DSConfig) >= 0
+		if (rtw_chset_search_ch(adapter_to_chset(padapter), pnetwork->network.Configuration.DSConfig) >= 0
 		    && rtw_mlme_band_check(padapter, pnetwork->network.Configuration.DSConfig) == _TRUE
 		    && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid))) {
 			delta_time = (u32) rtw_get_passing_time_ms(pnetwork->last_scanned);
@@ -1274,6 +1269,9 @@ void start_bss_network(_adapter *padapter, struct createbss_parm *parm)
 		req_bw = parm->req_bw;
 		req_offset = parm->req_offset;
 		goto chbw_decision;
+	} else {
+		/* inform this request comes from upper layer */
+		req_ch = 0;
 	}
 
 	bcn_interval = (u16)pnetwork->Configuration.BeaconPeriod;
@@ -1429,9 +1427,7 @@ update_beacon:
 	rtw_scan_wait_completed(padapter);
 
 	/* send beacon */
-	if ((0 == rtw_mi_check_fwstate(padapter, _FW_UNDER_SURVEY))
-		&& (0 == rtw_mi_check_fwstate(padapter, WIFI_OP_CH_SWITCHING))
-	) {
+	if (!rtw_mi_check_fwstate(padapter, _FW_UNDER_SURVEY)) {
 
 		/*update_beacon(padapter, _TIM_IE_, NULL, _TRUE);*/
 
@@ -1481,6 +1477,7 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
 	u8 vht_cap = _FALSE;
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 	u8 rf_num = 0;
 
 	/* SSID */
@@ -1786,24 +1783,29 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
 
 		/* Update Supported MCS Set field */
 		{
+			struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
+			u8 rx_nss = 0;
 			int i;
 
 			rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+			rx_nss = rtw_min(rf_type_to_rf_rx_cnt(rf_type), hal_spec->rx_nss_num);
 
 			/* RX MCS Bitmask */
-			switch (rf_type) {
-			case RF_1T1R:
-			case RF_1T2R: /* ? */
+			switch (rx_nss) {
+			case 1:
 				set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_1R);
 				break;
-			case RF_2T2R:
+			case 2:
 				set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_2R);
 				break;
-			case RF_3T3R:
+			case 3:
 				set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_3R);
 				break;
+			case 4:
+				set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_4R);
+				break;
 			default:
-				RTW_INFO("[warning] rf_type %d is not expected\n", rf_type);
+				RTW_WARN("rf_type:%d or rx_nss:%u is not expected\n", rf_type, hal_spec->rx_nss_num);
 			}
 			for (i = 0; i < 10; i++)
 				*(HT_CAP_ELE_RX_MCS_MAP(pht_cap) + i) &= padapter->mlmeextpriv.default_supported_mcs_set[i];
@@ -1907,7 +1909,7 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf,  int len)
 	    && (pmlmepriv->htpriv.ht_option == _TRUE)
 	    && REGSTY_IS_11AC_ENABLE(pregistrypriv)
 	    && hal_chk_proto_cap(padapter, PROTO_CAP_11AC)
-	    && (!pmlmepriv->country_ent || COUNTRY_CHPLAN_EN_11AC(pmlmepriv->country_ent))
+	    && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent))
 	   ) {
 		if (vht_cap == _TRUE)
 			pmlmepriv->vhtpriv.vht_option = _TRUE;
@@ -2654,6 +2656,9 @@ static void update_bcn_wps_ie(_adapter *padapter)
 		if (sr) {
 			set_fwstate(pmlmepriv, WIFI_UNDER_WPS);
 			RTW_INFO("%s, set WIFI_UNDER_WPS\n", __func__);
+		} else {
+			clr_fwstate(pmlmepriv, WIFI_UNDER_WPS);
+			RTW_INFO("%s, clr WIFI_UNDER_WPS\n", __func__);
 		}
 	}
 #endif
@@ -3449,7 +3454,7 @@ void sta_info_update(_adapter *padapter, struct sta_info *psta)
 void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta)
 {
 	if (psta->state & _FW_LINKED)
-		rtw_hal_update_ra_mask(psta, 0); /* DM_RATR_STA_INIT */
+		rtw_hal_update_ra_mask(psta, psta->rssi_level, _TRUE); /* DM_RATR_STA_INIT */
 }
 /* restore hw setting from sw data structures */
 void rtw_ap_restore_network(_adapter *padapter)
@@ -3909,26 +3914,33 @@ bool rtw_ap_chbw_decision(_adapter *adapter, s16 req_ch, s8 req_bw, s8 req_offse
 		/* check temporary decision first */
 		rtw_adjust_chbw(adapter, dec_ch, &dec_bw, &dec_offset);
 		if (!rtw_get_offset_by_chbw(dec_ch, dec_bw, &dec_offset)) {
-#if defined(CONFIG_DFS_MASTER)
 			if (req_ch == -1 || req_bw == -1)
 				goto choose_chbw;
-#endif
 			RTW_WARN(FUNC_ADPT_FMT" req: %u,%u has no valid offset\n", FUNC_ADPT_ARG(adapter), dec_ch, dec_bw);
 			*chbw_allow = _FALSE;
 			goto exit;
 		}
 
-		if (!rtw_chset_is_chbw_valid(mlmeext->channel_set, dec_ch, dec_bw, dec_offset)) {
-#if defined(CONFIG_DFS_MASTER)
+		if (!rtw_chset_is_chbw_valid(adapter_to_chset(adapter), dec_ch, dec_bw, dec_offset)) {
 			if (req_ch == -1 || req_bw == -1)
 				goto choose_chbw;
-#endif
 			RTW_WARN(FUNC_ADPT_FMT" req: %u,%u,%u doesn't fit in chplan\n", FUNC_ADPT_ARG(adapter), dec_ch, dec_bw, dec_offset);
 			*chbw_allow = _FALSE;
 			goto exit;
 		}
 
-		if (rtw_chset_is_ch_non_ocp(mlmeext->channel_set, dec_ch, dec_bw, dec_offset) == _FALSE)
+		if (rtw_odm_dfs_domain_unknown(adapter) && rtw_is_dfs_chbw(dec_ch, dec_bw, dec_offset)) {
+			if (req_ch >= 0)
+				RTW_WARN(FUNC_ADPT_FMT" DFS channel %u,%u,%u can't be used\n", FUNC_ADPT_ARG(adapter), dec_ch, dec_bw, dec_offset);
+			if (req_ch > 0) {
+				/* specific channel and not from IE => don't change channel setting */
+				*chbw_allow = _FALSE;
+				goto exit;
+			}
+			goto choose_chbw;
+		}
+
+		if (rtw_chset_is_ch_non_ocp(adapter_to_chset(adapter), dec_ch, dec_bw, dec_offset) == _FALSE)
 			goto update_bss_chbw;
 
 choose_chbw:
@@ -3936,19 +3948,26 @@ choose_chbw:
 			req_bw = cur_ie_bw;
 
 #if defined(CONFIG_DFS_MASTER)
-		/* choose 5G DFS channel for debug */
-		if (adapter_to_rfctl(adapter)->dbg_dfs_master_choose_dfs_ch_first
-		    && rtw_choose_shortest_waiting_ch(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, RTW_CHF_2G | RTW_CHF_NON_DFS) == _TRUE)
-			RTW_INFO(FUNC_ADPT_FMT" choose 5G DFS channel for debug\n", FUNC_ADPT_ARG(adapter));
-		else if (adapter_to_rfctl(adapter)->dfs_ch_sel_d_flags
-			&& rtw_choose_shortest_waiting_ch(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, adapter_to_rfctl(adapter)->dfs_ch_sel_d_flags) == _TRUE)
-			RTW_INFO(FUNC_ADPT_FMT" choose with dfs_ch_sel_d_flags:0x%02x for debug\n", FUNC_ADPT_ARG(adapter), adapter_to_rfctl(adapter)->dfs_ch_sel_d_flags);
-		else if (rtw_choose_shortest_waiting_ch(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, 0) == _FALSE) {
+		if (!rtw_odm_dfs_domain_unknown(adapter)) {
+			/* choose 5G DFS channel for debug */
+			if (adapter_to_rfctl(adapter)->dbg_dfs_master_choose_dfs_ch_first
+				&& rtw_choose_shortest_waiting_ch(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, RTW_CHF_2G | RTW_CHF_NON_DFS) == _TRUE)
+				RTW_INFO(FUNC_ADPT_FMT" choose 5G DFS channel for debug\n", FUNC_ADPT_ARG(adapter));
+			else if (adapter_to_rfctl(adapter)->dfs_ch_sel_d_flags
+				&& rtw_choose_shortest_waiting_ch(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, adapter_to_rfctl(adapter)->dfs_ch_sel_d_flags) == _TRUE)
+				RTW_INFO(FUNC_ADPT_FMT" choose with dfs_ch_sel_d_flags:0x%02x for debug\n", FUNC_ADPT_ARG(adapter), adapter_to_rfctl(adapter)->dfs_ch_sel_d_flags);
+			else if (rtw_choose_shortest_waiting_ch(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, 0) == _FALSE) {
+				RTW_WARN(FUNC_ADPT_FMT" no available channel\n", FUNC_ADPT_ARG(adapter));
+				*chbw_allow = _FALSE;
+				goto exit;
+			}
+		} else
+#endif /* defined(CONFIG_DFS_MASTER) */
+		if (rtw_choose_shortest_waiting_ch(adapter, req_bw, &dec_ch, &dec_bw, &dec_offset, RTW_CHF_DFS) == _FALSE) {
 			RTW_WARN(FUNC_ADPT_FMT" no available channel\n", FUNC_ADPT_ARG(adapter));
 			*chbw_allow = _FALSE;
 			goto exit;
 		}
-#endif /* defined(CONFIG_DFS_MASTER) */
 
 update_bss_chbw:
 		rtw_ap_update_bss_chbw(adapter, &(adapter->mlmepriv.cur_network.network)
@@ -4118,8 +4137,15 @@ void tx_beacon_handlder(struct dvobj_priv *pdvobj)
 #ifdef DBG_SWTIMER_BASED_TXBCN
 		RTW_INFO("padapter=%p, PORT=%d\n", padapter, padapter->hw_port);
 #endif
-		/*update_beacon(padapter, _TIM_IE_, NULL, _FALSE);*/
-		issue_beacon(padapter, 0);
+		/* bypass TX BCN queue if op ch is switching/waiting */
+		if (!check_fwstate(&padapter->mlmepriv, WIFI_OP_CH_SWITCHING)
+			#ifdef CONFIG_DFS_MASTER
+			&& !IS_CH_WAITING(adapter_to_rfctl(padapter))
+			#endif
+		) {
+			/*update_beacon(padapter, _TIM_IE_, NULL, _FALSE);*/
+			issue_beacon(padapter, 0);
+		}
 	}
 
 #if 0
@@ -4134,8 +4160,9 @@ void tx_beacon_handlder(struct dvobj_priv *pdvobj)
 
 }
 
-void tx_beacon_timer_handlder(struct dvobj_priv *pdvobj)
+void tx_beacon_timer_handlder(void *ctx)
 {
+	struct dvobj_priv *pdvobj = (struct dvobj_priv *)ctx;
 	_adapter *padapter = pdvobj->padapters[0];
 
 	if (padapter)
@@ -4143,4 +4170,50 @@ void tx_beacon_timer_handlder(struct dvobj_priv *pdvobj)
 }
 #endif
 
+void rtw_ap_acdata_control(_adapter *padapter, u8 power_mode)
+{
+	_irqL irqL;
+	_list	*phead, *plist;
+	struct sta_info *psta = NULL;
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	u8 sta_alive_num = 0, i;
+	char sta_alive_list[NUM_STA];
+
+#ifdef CONFIG_MCC_MODE
+	if (MCC_EN(padapter) && rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC))
+		/* driver doesn't access macid sleep reg under MCC */
+		return;
+#endif
+
+	/*RTW_INFO(FUNC_ADPT_FMT " associated sta num:%d, make macid_%s!!\n",
+				FUNC_ADPT_ARG(padapter), pstapriv->asoc_list_cnt, power_mode ? "sleep" : "wakeup");*/
+
+	_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+
+	phead = &pstapriv->asoc_list;
+	plist = get_next(phead);
+
+	while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) {
+		int stainfo_offset;
+
+		psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list);
+		plist = get_next(plist);
+
+		stainfo_offset = rtw_stainfo_offset(pstapriv, psta);
+		if (stainfo_offset_valid(stainfo_offset))
+			sta_alive_list[sta_alive_num++] = stainfo_offset;
+	}
+	_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
+
+	for (i = 0; i < sta_alive_num; i++) {
+		psta = rtw_get_stainfo_by_offset(pstapriv, sta_alive_list[i]);
+
+		if (psta) {
+			if (power_mode)
+				rtw_hal_macid_sleep(padapter, psta->mac_id);
+			else
+				rtw_hal_macid_wakeup(padapter, psta->mac_id);
+		}
+	}
+}
 #endif /* CONFIG_AP_MODE */
diff --git a/rtl8822BU/core/rtw_beamforming.c b/rtl8822BU/core/rtw_beamforming.c
index 952bffe..6bd7a30 100755..100644
--- a/rtl8822BU/core/rtw_beamforming.c
+++ b/rtl8822BU/core/rtw_beamforming.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_BEAMFORMING_C_
 
 #include <drv_types.h>
@@ -867,8 +862,6 @@ static void _sounding_force_stop(PADAPTER adapter)
 {
 	struct beamforming_info	*info;
 	struct sounding_info *sounding;
-	u8 cancelled;
-
 
 	info = GET_BEAMFORM_INFO(adapter);
 	sounding = &info->sounding_info;
@@ -876,7 +869,7 @@ static void _sounding_force_stop(PADAPTER adapter)
 	if ((sounding->state == SOUNDING_STATE_SU_START)
 	    || (sounding->state == SOUNDING_STATE_MU_START)) {
 		u8 res = _FALSE;
-		_cancel_timer(&info->sounding_timeout_timer, &cancelled);
+		_cancel_timer_ex(&info->sounding_timeout_timer);
 		rtw_bf_cmd(adapter, BEAMFORMING_CTRL_END_PERIOD, &res, 1, 1);
 		return;
 	}
@@ -1075,22 +1068,20 @@ static void _bfer_remove_entry(PADAPTER adapter, struct beamformer_entry *entry)
 
 static u8 _bfer_set_entry_gid(PADAPTER adapter, u8 *addr, u8 *gid, u8 *position)
 {
-	struct beamformer_entry *bfer = NULL;
+	struct beamformer_entry bfer;
 
-
-	bfer = _bfer_get_entry_by_addr(adapter, addr);
-	if (!bfer) {
-		RTW_INFO("%s: Cannot find BFer entry!!\n", __FUNCTION__);
-		return _FAIL;
-	}
+	memset(&bfer, 0, sizeof(bfer));
+	memcpy(bfer.mac_addr, addr, 6);
 
 	/* Parsing Membership Status Array */
-	_rtw_memcpy(bfer->gid_valid, gid, 8);
+	memcpy(bfer.gid_valid, gid, 8);
+
 	/* Parsing User Position Array */
-	_rtw_memcpy(bfer->user_position, position, 16);
+	memcpy(bfer.user_position, position, 16);
 
 	/* Config HW GID table */
-	rtw_bf_cmd(adapter, BEAMFORMING_CTRL_SET_GID_TABLE, (u8*)&bfer, sizeof(struct beamformer_entry *), 1);
+	rtw_bf_cmd(adapter, BEAMFORMING_CTRL_SET_GID_TABLE, (u8 *) &bfer,
+			sizeof(bfer), 1);
 
 	return _SUCCESS;
 }
@@ -1342,7 +1333,7 @@ static void _bfee_remove_entry(PADAPTER adapter, struct beamformee_entry *entry)
 	_sounding_update_min_period(adapter, 0, _TRUE);
 }
 
-static enum _BEAMFORMING_CAP _bfee_get_entry_cap_by_macid(PADAPTER adapter, u8 macid)
+static enum beamforming_cap _bfee_get_entry_cap_by_macid(PADAPTER adapter, u8 macid)
 {
 	struct beamforming_info *info;
 	struct beamformee_entry *bfee;
@@ -1495,8 +1486,7 @@ static void _beamforming_leave(PADAPTER adapter, u8 *ra)
 	/* Stop sounding if there is no any BFee */
 	if ((info->beamformee_su_cnt == 0)
 	    && (info->beamformee_mu_cnt == 0)) {
-		u8 cancelled;
-		_cancel_timer(&info->sounding_timer, &cancelled);
+		_cancel_timer_ex(&info->sounding_timer);
 		_sounding_init(&info->sounding_info);
 	}
 
@@ -1567,13 +1557,11 @@ static void _beamforming_sounding_down(PADAPTER adapter, u8 status)
 static void _c2h_snd_txbf(PADAPTER adapter, u8 *buf, u8 buf_len)
 {
 	struct beamforming_info	*info;
-	u8 cancelled;
 	u8 res;
 
-
 	info = GET_BEAMFORM_INFO(adapter);
 
-	_cancel_timer(&info->sounding_timeout_timer, &cancelled);
+	_cancel_timer_ex(&info->sounding_timeout_timer);
 
 	res = C2H_SND_TXBF_GET_SND_RESULT(buf) ? _TRUE : _FALSE;
 	RTW_INFO("+%s: %s\n", __FUNCTION__, res==_TRUE?"Success":"Fail!");
@@ -1585,10 +1573,10 @@ static void _c2h_snd_txbf(PADAPTER adapter, u8 *buf, u8 buf_len)
  * Description:
  *	This function is for phydm only
  */
-enum _BEAMFORMING_CAP rtw_bf_bfee_get_entry_cap_by_macid(void *mlme, u8 macid)
+enum beamforming_cap rtw_bf_bfee_get_entry_cap_by_macid(void *mlme, u8 macid)
 {
 	PADAPTER adapter;
-	enum _BEAMFORMING_CAP cap = BEAMFORMING_CAP_NONE;
+	enum beamforming_cap cap = BEAMFORMING_CAP_NONE;
 
 
 	adapter = mlme_to_adapter((struct mlme_priv *)mlme);
@@ -1804,10 +1792,11 @@ void rtw_bf_init(PADAPTER adapter)
 	info->beamformee_mu_reg_maping = 0;
 	info->first_mu_bfee_index = 0xFF;
 	info->mu_bfer_curidx = 0xFF;
+	info->cur_csi_rpt_rate = HALMAC_OFDM24;
 
 	_sounding_init(&info->sounding_info);
-	_init_timer(&info->sounding_timer, adapter->pnetdev, _sounding_timer_handler, adapter);
-	_init_timer(&info->sounding_timeout_timer, adapter->pnetdev, _sounding_timeout_timer_handler, adapter);
+	rtw_init_timer(&info->sounding_timer, adapter, _sounding_timer_handler, adapter);
+	rtw_init_timer(&info->sounding_timeout_timer, adapter, _sounding_timeout_timer_handler, adapter);
 
 	info->SetHalBFEnterOnDemandCnt = 0;
 	info->SetHalBFLeaveOnDemandCnt = 0;
@@ -1842,7 +1831,7 @@ void rtw_bf_cmd_hdl(PADAPTER adapter, u8 type, u8 *pbuf)
 		break;
 
 	case BEAMFORMING_CTRL_SET_GID_TABLE:
-		rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_SET_GID_TABLE, *(void**)pbuf);
+		rtw_hal_set_hwreg(adapter, HW_VAR_SOUNDING_SET_GID_TABLE, pbuf);
 		break;
 
 	case BEAMFORMING_CTRL_SET_CSI_REPORT:
@@ -3094,8 +3083,14 @@ u8	beamforming_wk_cmd(_adapter *padapter, s32 type, u8 *pbuf, s32 size, u8 enque
 	struct cmd_obj	*ph2c;
 	struct drvextra_cmd_parm	*pdrvextra_cmd_parm;
 	struct cmd_priv	*pcmdpriv = &padapter->cmdpriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	u8	res = _SUCCESS;
 
+	/*20170214 ad_hoc mode and mp_mode not support BF*/
+	if ((padapter->registrypriv.mp_mode == 1)
+		|| (pmlmeinfo->state == WIFI_FW_ADHOC_STATE))
+		return res;
 
 	if (enqueue) {
 		u8	*wk_buf;
diff --git a/rtl8822BU/core/rtw_br_ext.c b/rtl8822BU/core/rtw_br_ext.c
index 8fe3ee4..37d0048 100755
--- a/rtl8822BU/core/rtw_br_ext.c
+++ b/rtl8822BU/core/rtw_br_ext.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_BR_EXT_C_
 #include <net/ip6_checksum.h>
 
diff --git a/rtl8822BU/core/rtw_bt_mp.c b/rtl8822BU/core/rtw_bt_mp.c
index a0597d8..85516f9 100755..100644
--- a/rtl8822BU/core/rtw_bt_mp.c
+++ b/rtl8822BU/core/rtw_bt_mp.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 
 #include <drv_types.h>
diff --git a/rtl8822BU/core/rtw_btcoex.c b/rtl8822BU/core/rtw_btcoex.c
index 34c0e56..730447f 100755..100644
--- a/rtl8822BU/core/rtw_btcoex.c
+++ b/rtl8822BU/core/rtw_btcoex.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifdef CONFIG_BT_COEXIST
 
 #include <drv_types.h>
@@ -34,6 +29,11 @@ void rtw_btcoex_PowerOnSetting(PADAPTER padapter)
 	hal_btcoex_PowerOnSetting(padapter);
 }
 
+void rtw_btcoex_PowerOffSetting(PADAPTER padapter)
+{
+	hal_btcoex_PowerOffSetting(padapter);
+}
+
 void rtw_btcoex_PreLoadFirmware(PADAPTER padapter)
 {
 	hal_btcoex_PreLoadFirmware(padapter);
@@ -78,12 +78,16 @@ void rtw_btcoex_ScanNotify(PADAPTER padapter, u8 type)
 	if (_FALSE == pHalData->EEPROMBluetoothCoexist)
 		return;
 
-#ifdef CONFIG_CONCURRENT_MODE
 	if (_FALSE == type) {
+		#ifdef CONFIG_CONCURRENT_MODE
 		if (rtw_mi_buddy_check_fwstate(padapter, WIFI_SITE_MONITOR))
 			return;
+		#endif
+
+		if (DEV_MGMT_TX_NUM(adapter_to_dvobj(padapter))
+			|| DEV_ROCH_NUM(adapter_to_dvobj(padapter)))
+			return;
 	}
-#endif
 
 #ifdef CONFIG_BT_COEXIST_SOCKET_TRX
 	if (pBtMgnt->ExtConfig.bEnableWifiScanNotify)
@@ -378,6 +382,18 @@ void rtw_btcoex_pta_off_on_notify(PADAPTER padapter, u8 bBTON)
 	hal_btcoex_pta_off_on_notify(padapter, bBTON);
 }
 
+#ifdef CONFIG_RF4CE_COEXIST
+void rtw_btcoex_SetRf4ceLinkState(PADAPTER padapter, u8 state)
+{
+	hal_btcoex_set_rf4ce_link_state(state);
+}
+
+u8 rtw_btcoex_GetRf4ceLinkState(PADAPTER padapter)
+{
+	return hal_btcoex_get_rf4ce_link_state();
+}
+#endif
+
 /* ==================================================
  * Below Functions are called by BT-Coex
  * ================================================== */
@@ -399,7 +415,7 @@ void rtw_btcoex_LPS_Enter(PADAPTER padapter)
 	rtw_set_ps_mode(padapter, PS_MODE_MIN, 0, lpsVal, "BTCOEX");
 }
 
-void rtw_btcoex_LPS_Leave(PADAPTER padapter)
+u8 rtw_btcoex_LPS_Leave(PADAPTER padapter)
 {
 	struct pwrctrl_priv *pwrpriv;
 
@@ -411,6 +427,8 @@ void rtw_btcoex_LPS_Leave(PADAPTER padapter)
 		LPS_RF_ON_check(padapter, 100);
 		pwrpriv->bpower_saving = _FALSE;
 	}
+
+	return _TRUE;
 }
 
 u16 rtw_btcoex_btreg_read(PADAPTER padapter, u8 type, u16 addr, u32 *data)
diff --git a/rtl8822BU/core/rtw_btcoex_wifionly.c b/rtl8822BU/core/rtw_btcoex_wifionly.c
index f61ad2b..f7d70aa 100755..100644
--- a/rtl8822BU/core/rtw_btcoex_wifionly.c
+++ b/rtl8822BU/core/rtw_btcoex_wifionly.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #include <drv_types.h>
 #include <hal_btcoex_wifionly.h>
 #include <hal_data.h>
diff --git a/rtl8822BU/core/rtw_cmd.c b/rtl8822BU/core/rtw_cmd.c
index 28a151d..1486afa 100755..100644
--- a/rtl8822BU/core/rtw_cmd.c
+++ b/rtl8822BU/core/rtw_cmd.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_CMD_C_
 
 #include <drv_types.h>
@@ -38,8 +33,7 @@ sint	_rtw_init_cmd_priv(struct	cmd_priv *pcmdpriv)
 
 	_rtw_init_sema(&(pcmdpriv->cmd_queue_sema), 0);
 	/* _rtw_init_sema(&(pcmdpriv->cmd_done_sema), 0); */
-	_rtw_init_sema(&(pcmdpriv->terminate_cmdthread_sema), 0);
-
+	_rtw_init_sema(&(pcmdpriv->start_cmdthread_sema), 0);
 
 	_rtw_init_queue(&(pcmdpriv->cmd_queue));
 
@@ -151,7 +145,6 @@ sint _rtw_init_evt_priv(struct evt_priv *pevtpriv)
 #ifdef CONFIG_EVENT_THREAD_MODE
 
 	_rtw_init_sema(&(pevtpriv->evt_notify), 0);
-	_rtw_init_sema(&(pevtpriv->terminate_evtthread_sema), 0);
 
 	pevtpriv->evt_allocated_buf = rtw_zmalloc(MAX_EVTSZ + 4);
 	if (pevtpriv->evt_allocated_buf == NULL) {
@@ -204,8 +197,6 @@ void _rtw_free_evt_priv(struct	evt_priv *pevtpriv)
 
 #ifdef CONFIG_EVENT_THREAD_MODE
 	_rtw_free_sema(&(pevtpriv->evt_notify));
-	_rtw_free_sema(&(pevtpriv->terminate_evtthread_sema));
-
 
 	if (pevtpriv->evt_allocated_buf)
 		rtw_mfree(pevtpriv->evt_allocated_buf, MAX_EVTSZ + 4);
@@ -236,7 +227,7 @@ void _rtw_free_cmd_priv(struct	cmd_priv *pcmdpriv)
 		_rtw_spinlock_free(&(pcmdpriv->cmd_queue.lock));
 		_rtw_free_sema(&(pcmdpriv->cmd_queue_sema));
 		/* _rtw_free_sema(&(pcmdpriv->cmd_done_sema)); */
-		_rtw_free_sema(&(pcmdpriv->terminate_cmdthread_sema));
+		_rtw_free_sema(&(pcmdpriv->start_cmdthread_sema));
 
 		if (pcmdpriv->cmd_allocated_buf)
 			rtw_mfree(pcmdpriv->cmd_allocated_buf, MAX_CMDSZ + CMDBUFF_ALIGN_SZ);
@@ -532,12 +523,10 @@ void rtw_free_cmd_obj(struct cmd_obj *pcmd)
 
 void rtw_stop_cmd_thread(_adapter *adapter)
 {
-	if (adapter->cmdThread &&
-	    ATOMIC_READ(&(adapter->cmdpriv.cmdthd_running)) == _TRUE &&
-	    adapter->cmdpriv.stop_req == 0) {
-		adapter->cmdpriv.stop_req = 1;
+	if (adapter->cmdThread) {
 		_rtw_up_sema(&adapter->cmdpriv.cmd_queue_sema);
-		_rtw_down_sema(&adapter->cmdpriv.terminate_cmdthread_sema);
+		rtw_thread_stop(adapter->cmdThread);
+		adapter->cmdThread = NULL;
 	}
 }
 
@@ -559,10 +548,8 @@ thread_return rtw_cmd_thread(thread_context context)
 
 	pcmdbuf = pcmdpriv->cmd_buf;
 	prspbuf = pcmdpriv->rsp_buf;
-
-	pcmdpriv->stop_req = 0;
 	ATOMIC_SET(&(pcmdpriv->cmdthd_running), _TRUE);
-	_rtw_up_sema(&pcmdpriv->terminate_cmdthread_sema);
+	_rtw_up_sema(&pcmdpriv->start_cmdthread_sema);
 
 
 	while (1) {
@@ -572,16 +559,10 @@ thread_return rtw_cmd_thread(thread_context context)
 		}
 
 		if (RTW_CANNOT_RUN(padapter)) {
-			RTW_PRINT("%s: DriverStopped(%s) SurpriseRemoved(%s) break at line %d\n",
-				  __func__
-				, rtw_is_drv_stopped(padapter) ? "True" : "False"
-				, rtw_is_surprise_removed(padapter) ? "True" : "False"
-				  , __LINE__);
-			break;
-		}
-
-		if (pcmdpriv->stop_req) {
-			RTW_PRINT(FUNC_ADPT_FMT" stop_req:%u, break\n", FUNC_ADPT_ARG(padapter), pcmdpriv->stop_req);
+			RTW_DBG(FUNC_ADPT_FMT "- bDriverStopped(%s) bSurpriseRemoved(%s)\n",
+				FUNC_ADPT_ARG(padapter),
+				rtw_is_drv_stopped(padapter) ? "True" : "False",
+				rtw_is_surprise_removed(padapter) ? "True" : "False");
 			break;
 		}
 
@@ -681,8 +662,7 @@ post_process:
 		_enter_critical_mutex(&(pcmd->padapter->cmdpriv.sctx_mutex), NULL);
 		if (pcmd->sctx) {
 			if (0)
-				RTW_PRINT(FUNC_ADPT_FMT" pcmd->sctx\n",
-					  FUNC_ADPT_ARG(pcmd->padapter));
+				RTW_PRINT(FUNC_ADPT_FMT" pcmd->sctx\n", FUNC_ADPT_ARG(pcmd->padapter));
 			if (pcmd->res == H2C_SUCCESS)
 				rtw_sctx_done(&pcmd->sctx);
 			else
@@ -738,14 +718,22 @@ post_process:
 				rtw_mfree(extra_parm->pbuf, extra_parm->size);
 		}
 
+		_enter_critical_mutex(&(pcmd->padapter->cmdpriv.sctx_mutex), NULL);
+		if (pcmd->sctx) {
+			if (0)
+				RTW_PRINT(FUNC_ADPT_FMT" pcmd->sctx\n", FUNC_ADPT_ARG(pcmd->padapter));
+			rtw_sctx_done_err(&pcmd->sctx, RTW_SCTX_DONE_CMD_DROP);
+		}
+		_exit_critical_mutex(&(pcmd->padapter->cmdpriv.sctx_mutex), NULL);
+
 		rtw_free_cmd_obj(pcmd);
 	} while (1);
 
-	_rtw_up_sema(&pcmdpriv->terminate_cmdthread_sema);
+	RTW_INFO(FUNC_ADPT_FMT " Exit\n", FUNC_ADPT_ARG(padapter));
 
+	rtw_thread_wait_stop();
 
-	thread_exit();
-
+	return 0;
 }
 
 
@@ -945,7 +933,12 @@ u8 rtw_sitesurvey_cmd(_adapter  *padapter, NDIS_802_11_SSID *ssid, int ssid_num,
 				mlme_set_scan_to_timer(pmlmepriv, CONC_SCANNING_TIMEOUT_SINGLE_BAND);
 		} else
 #endif /* CONFIG_SCAN_BACKOP */
-			mlme_set_scan_to_timer(pmlmepriv, SCANNING_TIMEOUT);
+#ifdef	CONFIG_CHNL_LOAD_MAGT
+			if (padapter->clm_flag == TRUE)
+				mlme_set_scan_to_timer(pmlmepriv, CLM_SCANNING_TIMEOUT);
+			else
+#endif
+				mlme_set_scan_to_timer(pmlmepriv, SCANNING_TIMEOUT);
 
 		rtw_led_control(padapter, LED_CTL_SITE_SURVEY);
 	} else
@@ -1268,7 +1261,7 @@ static u8 rtw_createbss_cmd(_adapter  *adapter, int flags, bool adhoc
 	u8 res = _SUCCESS;
 
 	if (req_ch > 0 && req_bw >= 0 && req_offset >= 0) {
-		if (!rtw_chset_is_chbw_valid(adapter->mlmeextpriv.channel_set, req_ch, req_bw, req_offset)) {
+		if (!rtw_chset_is_chbw_valid(adapter_to_chset(adapter), req_ch, req_bw, req_offset)) {
 			res = _FAIL;
 			goto exit;
 		}
@@ -1371,6 +1364,7 @@ u8 rtw_joinbss_cmd(_adapter  *padapter, struct wlan_network *pnetwork)
 	NDIS_802_11_NETWORK_INFRASTRUCTURE ndis_network_mode = pnetwork->network.InfrastructureMode;
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 	u32 tmp_len;
 	u8 *ptmp = NULL;
 #ifdef CONFIG_RTW_80211R
@@ -1483,8 +1477,6 @@ u8 rtw_joinbss_cmd(_adapter  *padapter, struct wlan_network *pnetwork)
 		    (padapter->securitypriv.dot11PrivacyAlgrthm != _TKIP_)) {
 			rtw_ht_use_default_setting(padapter);
 
-			rtw_build_wmm_ie_ht(padapter, &psecnetwork->IEs[0], &psecnetwork->IELength);
-
 			/* rtw_restructure_ht_ie */
 			rtw_restructure_ht_ie(padapter, &pnetwork->network.IEs[12], &psecnetwork->IEs[0],
 				pnetwork->network.IELength - 12, &psecnetwork->IELength,
@@ -1497,7 +1489,7 @@ u8 rtw_joinbss_cmd(_adapter  *padapter, struct wlan_network *pnetwork)
 	if (phtpriv->ht_option
 	    && REGSTY_IS_11AC_ENABLE(pregistrypriv)
 	    && hal_chk_proto_cap(padapter, PROTO_CAP_11AC)
-	    && (!pmlmepriv->country_ent || COUNTRY_CHPLAN_EN_11AC(pmlmepriv->country_ent))
+	    && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent))
 	   ) {
 		rtw_restructure_vht_ie(padapter, &pnetwork->network.IEs[0], &psecnetwork->IEs[0],
 			pnetwork->network.IELength, &psecnetwork->IELength);
@@ -1580,11 +1572,13 @@ exit:
 	return res;
 }
 
-u8 rtw_disassoc_cmd(_adapter *padapter, u32 deauth_timeout_ms, bool enqueue) /* for sta_mode */
+u8 rtw_disassoc_cmd(_adapter *padapter, u32 deauth_timeout_ms, int flags) /* for sta_mode */
 {
 	struct cmd_obj *cmdobj = NULL;
 	struct disconnect_parm *param = NULL;
 	struct cmd_priv *cmdpriv = &padapter->cmdpriv;
+	struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
+	struct submit_ctx sctx;
 	u8 res = _SUCCESS;
 
 
@@ -1597,8 +1591,13 @@ u8 rtw_disassoc_cmd(_adapter *padapter, u32 deauth_timeout_ms, bool enqueue) /*
 	}
 	param->deauth_timeout_ms = deauth_timeout_ms;
 
-	if (enqueue) {
-		/* need enqueue, prepare cmd_obj and enqueue */
+	if (flags & RTW_CMDF_DIRECTLY) {
+		/* no need to enqueue, do the cmd hdl directly and free cmd parameter */
+		if (disconnect_hdl(padapter, (u8 *)param) != H2C_SUCCESS)
+			res = _FAIL;
+		rtw_mfree((u8 *)param, sizeof(*param));
+
+	} else {
 		cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(*cmdobj));
 		if (cmdobj == NULL) {
 			res = _FAIL;
@@ -1606,12 +1605,18 @@ u8 rtw_disassoc_cmd(_adapter *padapter, u32 deauth_timeout_ms, bool enqueue) /*
 			goto exit;
 		}
 		init_h2fwcmd_w_parm_no_rsp(cmdobj, param, _DisConnect_CMD_);
+		if (flags & RTW_CMDF_WAIT_ACK) {
+			cmdobj->sctx = &sctx;
+			rtw_sctx_init(&sctx, 2000);
+		}
 		res = rtw_enqueue_cmd(cmdpriv, cmdobj);
-	} else {
-		/* no need to enqueue, do the cmd hdl directly and free cmd parameter */
-		if (H2C_SUCCESS != disconnect_hdl(padapter, (u8 *)param))
-			res = _FAIL;
-		rtw_mfree((u8 *)param, sizeof(*param));
+		if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) {
+			rtw_sctx_wait(&sctx, __func__);
+			_enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL);
+			if (sctx.status == RTW_SCTX_SUBMITTED)
+				cmdobj->sctx = NULL;
+			_exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL);
+		}
 	}
 
 exit:
@@ -2564,7 +2569,7 @@ u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer)
 				LPS_Leave(padapter, "TRAFFIC_BUSY");
 			else {
 #ifdef CONFIG_CONCURRENT_MODE
-				#ifndef CONFIG_SUPPORT_FW_MULTI_PORT
+				#ifndef CONFIG_FW_MULTI_PORT_SUPPORT
 				if (padapter->hw_port == HW_PORT0)
 				#endif
 #endif
@@ -3165,6 +3170,103 @@ exit:
 	return res;
 
 }
+
+#ifdef CONFIG_IOCTL_CFG80211
+static u8 _p2p_roch_cmd(_adapter *adapter
+	, u64 cookie, struct wireless_dev *wdev
+	, struct ieee80211_channel *ch, enum nl80211_channel_type ch_type
+	, unsigned int duration
+	, u8 flags
+)
+{
+	struct cmd_obj *cmdobj;
+	struct drvextra_cmd_parm *parm;
+	struct p2p_roch_parm *roch_parm;
+	struct cmd_priv *pcmdpriv = &adapter->cmdpriv;
+	struct submit_ctx sctx;
+	u8 cancel = duration ? 0 : 1;
+	u8	res = _SUCCESS;
+
+	roch_parm = (struct p2p_roch_parm *)rtw_zmalloc(sizeof(struct p2p_roch_parm));
+	if (roch_parm == NULL) {
+		res = _FAIL;
+		goto exit;
+	}
+
+	roch_parm->cookie = cookie;
+	roch_parm->wdev = wdev;
+	if (!cancel) {
+		_rtw_memcpy(&roch_parm->ch, ch, sizeof(struct ieee80211_channel));
+		roch_parm->ch_type = ch_type;
+		roch_parm->duration = duration;
+	}
+
+	if (flags & RTW_CMDF_DIRECTLY) {
+		/* no need to enqueue, do the cmd hdl directly and free cmd parameter */
+		if (H2C_SUCCESS != p2p_protocol_wk_hdl(adapter, cancel ? P2P_CANCEL_RO_CH_WK : P2P_RO_CH_WK, (u8 *)roch_parm))
+			res = _FAIL;
+		rtw_mfree((u8 *)roch_parm, sizeof(*roch_parm));
+	} else {
+		/* need enqueue, prepare cmd_obj and enqueue */
+		parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm));
+		if (parm == NULL) {
+			rtw_mfree((u8 *)roch_parm, sizeof(*roch_parm));
+			res = _FAIL;
+			goto exit;
+		}
+
+		parm->ec_id = P2P_PROTO_WK_CID;
+		parm->type = cancel ? P2P_CANCEL_RO_CH_WK : P2P_RO_CH_WK;
+		parm->size = sizeof(*roch_parm);
+		parm->pbuf = (u8 *)roch_parm;
+
+		cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(*cmdobj));
+		if (cmdobj == NULL) {
+			res = _FAIL;
+			rtw_mfree((u8 *)roch_parm, sizeof(*roch_parm));
+			rtw_mfree((u8 *)parm, sizeof(*parm));
+			goto exit;
+		}
+
+		init_h2fwcmd_w_parm_no_rsp(cmdobj, parm, GEN_CMD_CODE(_Set_Drv_Extra));
+
+		if (flags & RTW_CMDF_WAIT_ACK) {
+			cmdobj->sctx = &sctx;
+			rtw_sctx_init(&sctx, 10 * 1000);
+		}
+
+		res = rtw_enqueue_cmd(pcmdpriv, cmdobj);
+
+		if (res == _SUCCESS && (flags & RTW_CMDF_WAIT_ACK)) {
+			rtw_sctx_wait(&sctx, __func__);
+			_enter_critical_mutex(&pcmdpriv->sctx_mutex, NULL);
+			if (sctx.status == RTW_SCTX_SUBMITTED)
+				cmdobj->sctx = NULL;
+			_exit_critical_mutex(&pcmdpriv->sctx_mutex, NULL);
+			if (sctx.status != RTW_SCTX_DONE_SUCCESS)
+				res = _FAIL;
+		}
+	}
+
+exit:
+	return res;
+}
+
+inline u8 p2p_roch_cmd(_adapter *adapter
+	, u64 cookie, struct wireless_dev *wdev
+	, struct ieee80211_channel *ch, enum nl80211_channel_type ch_type
+	, unsigned int duration
+	, u8 flags
+)
+{
+	return _p2p_roch_cmd(adapter, cookie, wdev, ch, ch_type, duration, flags);
+}
+
+inline u8 p2p_cancel_roch_cmd(_adapter *adapter, u64 cookie, struct wireless_dev *wdev, u8 flags)
+{
+	return _p2p_roch_cmd(adapter, cookie, wdev, NULL, 0, 0, flags);
+}
+#endif /* CONFIG_IOCTL_CFG80211 */
 #endif /* CONFIG_P2P */
 
 u8 rtw_ps_cmd(_adapter *padapter)
@@ -3334,7 +3436,7 @@ u8 rtw_dfs_master_hdl(_adapter *adapter)
 			/* what? */
 			rtw_warn_on(1);
 		} else {
-			rtw_chset_update_non_ocp(dvobj->padapters[i]->mlmeextpriv.channel_set
+			rtw_chset_update_non_ocp(rfctl->channel_set
 				, rfctl->radar_detect_ch, rfctl->radar_detect_bw, rfctl->radar_detect_offset);
 			rfctl->radar_detected = 1;
 
@@ -3354,6 +3456,11 @@ cac_status_chk:
 
 		rtw_hal_set_hwreg(adapter, HW_VAR_TXPAUSE, &pause);
 		rfctl->cac_start_time = rfctl->cac_end_time = RTW_CAC_STOPPED;
+
+		if (rtw_mi_check_fwstate(adapter, WIFI_UNDER_LINKING|WIFI_SITE_MONITOR) == _FALSE) {
+			ResumeTxBeacon(adapter);
+			rtw_mi_tx_beacon_hdl(adapter);
+		}
 	}
 
 set_timer:
@@ -3397,9 +3504,9 @@ exit:
 	return res;
 }
 
-void rtw_dfs_master_timer_hdl(RTW_TIMER_HDL_ARGS)
+void rtw_dfs_master_timer_hdl(void *ctx)
 {
-	_adapter *adapter = (_adapter *)FunctionContext;
+	_adapter *adapter = (_adapter *)ctx;
 
 	rtw_dfs_master_cmd(adapter, _TRUE);
 }
@@ -3423,6 +3530,9 @@ void rtw_dfs_master_enable(_adapter *adapter, u8 ch, u8 bw, u8 offset)
 
 	rfctl->radar_detected = 0;
 
+	if (IS_CH_WAITING(rfctl))
+		StopTxBeacon(adapter);
+
 	if (!rfctl->dfs_master_enabled) {
 		RTW_INFO(FUNC_ADPT_FMT" set dfs_master_enabled\n", FUNC_ADPT_ARG(adapter));
 		rfctl->dfs_master_enabled = 1;
@@ -3461,6 +3571,11 @@ void rtw_dfs_master_disable(_adapter *adapter, u8 ch, u8 bw, u8 offset, bool by_
 		rfctl->cac_start_time = rfctl->cac_end_time = RTW_CAC_STOPPED;
 		_cancel_timer_ex(&adapter->mlmepriv.dfs_master_timer);
 
+		if (rtw_mi_check_fwstate(adapter, WIFI_UNDER_LINKING|WIFI_SITE_MONITOR) == _FALSE) {
+			ResumeTxBeacon(adapter);
+			rtw_mi_tx_beacon_hdl(adapter);
+		}
+
 		if (overlap_radar_detect_ch) {
 			u8 pause = 0x00;
 
@@ -3523,7 +3638,7 @@ void rtw_dfs_master_status_apply(_adapter *adapter, u8 self_action)
 
 	if (MSTATE_STA_LD_NUM(&mstate) > 0) {
 		/* rely on AP on which STA mode connects */
-		if (rtw_is_dfs_ch(u_ch, u_bw, u_offset))
+		if (rtw_is_dfs_chbw(u_ch, u_bw, u_offset))
 			ld_sta_in_dfs = _TRUE;
 		goto apply;
 	}
@@ -3538,7 +3653,7 @@ void rtw_dfs_master_status_apply(_adapter *adapter, u8 self_action)
 		goto apply;
 	}
 
-	if (rtw_is_dfs_ch(u_ch, u_bw, u_offset))
+	if (rtw_is_dfs_chbw(u_ch, u_bw, u_offset))
 		needed = _TRUE;
 
 apply:
@@ -3759,10 +3874,12 @@ static s32 rtw_mp_cmd_hdl(_adapter *padapter, u8 mp_cmd_id)
 {
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
 	int ret = H2C_SUCCESS;
+	uint status = _SUCCESS;
 	u8 rfreg0;
 
 	if (mp_cmd_id == MP_START) {
 		if (padapter->registrypriv.mp_mode == 0) {
+			rtw_intf_stop(padapter);
 			rtw_hal_deinit(padapter);
 			padapter->registrypriv.mp_mode = 1;
 #ifdef CONFIG_RF_POWER_TRIM
@@ -3771,7 +3888,13 @@ static s32 rtw_mp_cmd_hdl(_adapter *padapter, u8 mp_cmd_id)
 				rtw_hal_read_chip_info(padapter);
 			}
 #endif /*CONFIG_RF_POWER_TRIM*/
-			rtw_hal_init(padapter);
+			rtw_reset_drv_sw(padapter);
+			status = rtw_hal_init(padapter);
+			if (status == _FAIL) {
+				ret = H2C_REJECTED;
+				goto exit;
+			}
+			rtw_intf_start(padapter);
 #ifdef RTW_HALMAC /*for New IC*/
 			MPT_InitializeAdapter(padapter, 1);
 #endif /* CONFIG_MP_INCLUDED */
@@ -3824,9 +3947,16 @@ static s32 rtw_mp_cmd_hdl(_adapter *padapter, u8 mp_cmd_id)
 	} else if (mp_cmd_id == MP_STOP) {
 		if (padapter->registrypriv.mp_mode == 1) {
 			MPT_DeInitAdapter(padapter);
+			rtw_intf_stop(padapter);
 			rtw_hal_deinit(padapter);
 			padapter->registrypriv.mp_mode = 0;
-			rtw_hal_init(padapter);
+			rtw_reset_drv_sw(padapter);
+			status = rtw_hal_init(padapter);
+			if (status == _FAIL) {
+				ret = H2C_REJECTED;
+				goto exit;
+			}
+			rtw_intf_start(padapter);
 		}
 
 		if (padapter->mppriv.mode != MP_OFF) {
@@ -4437,7 +4567,7 @@ u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf)
 		* Commented by Albert 2011/07/01
 		* I used the type_size as the type command
 		*/
-		p2p_protocol_wk_hdl(padapter, pdrvextra_cmd->type);
+		ret = p2p_protocol_wk_hdl(padapter, pdrvextra_cmd->type, pdrvextra_cmd->pbuf);
 		break;
 #endif
 #ifdef CONFIG_AP_MODE
@@ -4589,7 +4719,6 @@ void rtw_joinbss_cmd_callback(_adapter	*padapter,  struct cmd_obj *pcmd)
 void rtw_create_ibss_post_hdl(_adapter *padapter, int status)
 {
 	_irqL irqL;
-	u8 timer_cancelled;
 	struct sta_info *psta = NULL;
 	struct wlan_network *pwlan = NULL;
 	struct	mlme_priv *pmlmepriv = &padapter->mlmepriv;
@@ -4599,7 +4728,7 @@ void rtw_create_ibss_post_hdl(_adapter *padapter, int status)
 	if (status != H2C_SUCCESS)
 		_set_timer(&pmlmepriv->assoc_timer, 1);
 
-	_cancel_timer(&pmlmepriv->assoc_timer, &timer_cancelled);
+	_cancel_timer_ex(&pmlmepriv->assoc_timer);
 
 	_enter_critical_bh(&pmlmepriv->lock, &irqL);
 
diff --git a/rtl8822BU/core/rtw_debug.c b/rtl8822BU/core/rtw_debug.c
index b1bfe4b..32d7377 100755
--- a/rtl8822BU/core/rtw_debug.c
+++ b/rtl8822BU/core/rtw_debug.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_DEBUG_C_
 
 #include <drv_types.h>
@@ -65,6 +60,9 @@ void dump_drv_cfg(void *sel)
 #ifdef RTW_USE_CFG80211_STA_EVENT
 	RTW_PRINT_SEL(sel, "RTW_USE_CFG80211_STA_EVENT\n");
 #endif
+	#ifdef CONFIG_RADIO_WORK
+	RTW_PRINT_SEL(sel, "CONFIG_RADIO_WORK\n");
+	#endif
 #else
 	RTW_PRINT_SEL(sel, "WEXT\n");
 #endif
@@ -333,48 +331,6 @@ void rf_reg_dump(void *sel, _adapter *adapter)
 	}
 }
 
-static u8 fwdl_test_chksum_fail = 0;
-static u8 fwdl_test_wintint_rdy_fail = 0;
-
-bool rtw_fwdl_test_trigger_chksum_fail(void)
-{
-	if (fwdl_test_chksum_fail) {
-		RTW_PRINT("fwdl test case: trigger chksum_fail\n");
-		fwdl_test_chksum_fail--;
-		return _TRUE;
-	}
-	return _FALSE;
-}
-
-bool rtw_fwdl_test_trigger_wintint_rdy_fail(void)
-{
-	if (fwdl_test_wintint_rdy_fail) {
-		RTW_PRINT("fwdl test case: trigger wintint_rdy_fail\n");
-		fwdl_test_wintint_rdy_fail--;
-		return _TRUE;
-	}
-	return _FALSE;
-}
-
-static u32 g_wait_hiq_empty_ms = 0;
-
-u32 rtw_get_wait_hiq_empty_ms(void)
-{
-	return g_wait_hiq_empty_ms;
-}
-
-static u8 del_rx_ampdu_test_no_tx_fail = 0;
-
-bool rtw_del_rx_ampdu_test_trigger_no_tx_fail(void)
-{
-	if (del_rx_ampdu_test_no_tx_fail) {
-		RTW_PRINT("del_rx_ampdu test case: trigger no_tx_fail\n");
-		del_rx_ampdu_test_no_tx_fail--;
-		return _TRUE;
-	}
-	return _FALSE;
-}
-
 void rtw_sink_rtp_seq_dbg(_adapter *adapter, _pkt *pkt)
 {
 	struct recv_priv *precvpriv = &(adapter->recvpriv);
@@ -451,37 +407,78 @@ void dump_adapters_status(void *sel, struct dvobj_priv *dvobj)
 
 	dump_mi_status(sel, dvobj);
 
-	RTW_PRINT_SEL(sel, "%-2s %-8s %-17s %-4s %-7s %s\n"
-		, "id", "ifname", "macaddr", "port", "ch", "status");
+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+	RTW_PRINT_SEL(sel, "default port id:%d\n\n", dvobj->default_port_id);
+#endif /* CONFIG_FW_MULTI_PORT_SUPPORT */
+
+	RTW_PRINT_SEL(sel, "dev status:%s%s\n\n"
+		, dev_is_surprise_removed(dvobj) ? " SR" : ""
+		, dev_is_drv_stopped(dvobj) ? " DS" : ""
+	);
+
+#ifdef CONFIG_P2P
+#define P2P_INFO_TITLE_FMT	" %-3s %-4s"
+#define P2P_INFO_TITLE_ARG	, "lch", "p2ps"
+#ifdef CONFIG_IOCTL_CFG80211
+#define P2P_INFO_VALUE_FMT	" %3u %c%3u"
+#define P2P_INFO_VALUE_ARG	, iface->wdinfo.listen_channel, iface->wdev_data.p2p_enabled ? 'e' : ' ', rtw_p2p_state(&iface->wdinfo)
+#else
+#define P2P_INFO_VALUE_FMT	" %3u %4u"
+#define P2P_INFO_VALUE_ARG	, iface->wdinfo.listen_channel, rtw_p2p_state(&iface->wdinfo)
+#endif
+#define P2P_INFO_DASH		"---------"
+#else
+#define P2P_INFO_TITLE_FMT	""
+#define P2P_INFO_TITLE_ARG
+#define P2P_INFO_VALUE_FMT	""
+#define P2P_INFO_VALUE_ARG
+#define P2P_INFO_DASH
+#endif
 
-	RTW_PRINT_SEL(sel, "------------------------------------------\n");
+	RTW_PRINT_SEL(sel, "%-2s %-15s %c %-3s %-3s %-3s %-17s %-4s %-7s"
+		P2P_INFO_TITLE_FMT
+		" %s\n"
+		, "id", "ifname", ' ', "bup", "nup", "ncd", "macaddr", "port", "ch"
+		P2P_INFO_TITLE_ARG
+		, "status");
+
+	RTW_PRINT_SEL(sel, "---------------------------------------------------------------"
+		P2P_INFO_DASH
+		"-------\n");
 
 	for (i = 0; i < dvobj->iface_nums; i++) {
 		iface = dvobj->padapters[i];
 		if (iface) {
-			RTW_PRINT_SEL(sel, "%2d %-8s "MAC_FMT" %4hhu %3u,%u,%u "MLME_STATE_FMT" %s%s\n"
-				, i, ADPT_ARG(iface)
+			RTW_PRINT_SEL(sel, "%2d %-15s %c %3u %3u %3u "MAC_FMT" %4hhu %3u,%u,%u"
+				P2P_INFO_VALUE_FMT
+				" "MLME_STATE_FMT"\n"
+				, i, iface->registered ? ADPT_ARG(iface) : NULL
+				, iface->registered ? 'R' : ' '
+				, iface->bup
+				, iface->netif_up
+				, iface->net_closed
 				, MAC_ARG(adapter_mac_addr(iface))
 				, get_hw_port(iface)
 				, iface->mlmeextpriv.cur_channel
 				, iface->mlmeextpriv.cur_bwmode
 				, iface->mlmeextpriv.cur_ch_offset
+				P2P_INFO_VALUE_ARG
 				, MLME_STATE_ARG(iface)
-				, rtw_is_surprise_removed(iface) ? " SR" : ""
-				, rtw_is_drv_stopped(iface) ? " DS" : ""
 			);
 		}
 	}
 
-	RTW_PRINT_SEL(sel, "------------------------------------------\n");
+	RTW_PRINT_SEL(sel, "---------------------------------------------------------------"
+		P2P_INFO_DASH
+		"-------\n");
 
 	rtw_mi_get_ch_setting_union(dvobj_get_primary_adapter(dvobj), &u_ch, &u_bw, &u_offset);
-	RTW_PRINT_SEL(sel, "%34s %3u,%u,%u\n"
+	RTW_PRINT_SEL(sel, "%55s %3u,%u,%u\n"
 		, "union:"
 		, u_ch, u_bw, u_offset
 	);
 
-	RTW_PRINT_SEL(sel, "%34s %3u,%u,%u\n"
+	RTW_PRINT_SEL(sel, "%55s %3u,%u,%u\n"
 		, "oper:"
 		, dvobj->oper_channel
 		, dvobj->oper_bwmode
@@ -490,77 +487,53 @@ void dump_adapters_status(void *sel, struct dvobj_priv *dvobj)
 
 #ifdef CONFIG_DFS_MASTER
 	if (rfctl->radar_detect_ch != 0) {
-		u32 non_ocp_ms;
-		u32 cac_ms;
-
-		for (i = 0; i < dvobj->iface_nums; i++) {
-			if (!dvobj->padapters[i])
-				continue;
-			if (check_fwstate(&dvobj->padapters[i]->mlmepriv, WIFI_AP_STATE)
-				&& check_fwstate(&dvobj->padapters[i]->mlmepriv, WIFI_ASOC_STATE))
-				break;
-		}
-
-		if (i >= dvobj->iface_nums) {
-			RTW_PRINT_SEL(sel, "DFS master enable without AP mode???");
-			goto end_dfs_master;
-		}
-
-		RTW_PRINT_SEL(sel, "%34s %3u,%u,%u"
+		RTW_PRINT_SEL(sel, "%55s %3u,%u,%u"
 			, "radar_detect:"
 			, rfctl->radar_detect_ch
 			, rfctl->radar_detect_bw
 			, rfctl->radar_detect_offset
 		);
 
-		_RTW_PRINT_SEL(sel, ", domain:%u", rtw_odm_get_dfs_domain(dvobj->padapters[IFACE_ID0]));
-
-		rtw_get_ch_waiting_ms(dvobj->padapters[i]
-			, rfctl->radar_detect_ch
-			, rfctl->radar_detect_bw
-			, rfctl->radar_detect_offset
-			, &non_ocp_ms
-			, &cac_ms
-		);
+		if (rfctl->radar_detect_by_others)
+			_RTW_PRINT_SEL(sel, ", by AP of STA link");
+		else {
+			u32 non_ocp_ms;
+			u32 cac_ms;
+			u8 dfs_domain = rtw_odm_get_dfs_domain(dvobj_get_primary_adapter(dvobj));
 
-		if (non_ocp_ms)
-			_RTW_PRINT_SEL(sel, ", non_ocp:%d", non_ocp_ms);
-		if (cac_ms)
-			_RTW_PRINT_SEL(sel, ", cac:%d", cac_ms);
-end_dfs_master:
-		_RTW_PRINT_SEL(sel, "\n");
-	}
-#endif /* CONFIG_DFS_MASTER */
-}
+			_RTW_PRINT_SEL(sel, ", domain:%u", dfs_domain);
 
-void dump_adapters_info(void *sel, struct dvobj_priv *dvobj)
-{
-	int i;
-	_adapter *iface;
-	u8 u_ch, u_bw, u_offset;
+			for (i = 0; i < dvobj->iface_nums; i++) {
+				if (!dvobj->padapters[i])
+					continue;
+				if (check_fwstate(&dvobj->padapters[i]->mlmepriv, WIFI_AP_STATE)
+					&& check_fwstate(&dvobj->padapters[i]->mlmepriv, WIFI_ASOC_STATE))
+					break;
+			}
 
-	RTW_PRINT_SEL(sel, "%-8s %-8s %-4s %-4s %-8s %-8s\n"
-		, "iface_id", "ifname", "port", "bup ", "netif_up", "net_closed");
+			if (i >= dvobj->iface_nums) {
+				RTW_PRINT_SEL(sel, "DFS master enable without AP mode???");
+				goto end_dfs_master;
+			}
 
-	RTW_PRINT_SEL(sel, "------------------------\n");
+			rtw_get_ch_waiting_ms(dvobj->padapters[i]
+				, rfctl->radar_detect_ch
+				, rfctl->radar_detect_bw
+				, rfctl->radar_detect_offset
+				, &non_ocp_ms
+				, &cac_ms
+			);
 
-	for (i = 0; i < dvobj->iface_nums; i++) {
-		iface = dvobj->padapters[i];
-		if (iface) {
-			RTW_PRINT_SEL(sel, "%2d %-8s %u %s,%s,%s %s%s\n"
-				      , iface->iface_id
-				      , ADPT_ARG(iface)
-				      , get_hw_port(iface)
-				      , (iface->bup) ? " TRUE" : " FALSE"
-				      , (iface->netif_up) ? " TRUE" : " FALSE"
-				      , (iface->net_closed) ? " TRUE" : " FALSE"
-				, rtw_is_surprise_removed(iface) ? " SR" : ""
-				      , rtw_is_drv_stopped(iface) ? " DS" : ""
-				     );
+			if (non_ocp_ms)
+				_RTW_PRINT_SEL(sel, ", non_ocp:%d", non_ocp_ms);
+			if (cac_ms)
+				_RTW_PRINT_SEL(sel, ", cac:%d", cac_ms);
 		}
-	}
 
-	RTW_PRINT_SEL(sel, "------------------------\n");
+end_dfs_master:
+		_RTW_PRINT_SEL(sel, "\n");
+	}
+#endif /* CONFIG_DFS_MASTER */
 }
 
 #define SEC_CAM_ENT_ID_TITLE_FMT "%-2s"
@@ -742,6 +715,108 @@ ssize_t proc_set_read_reg(struct file *file, const char __user *buffer, size_t c
 
 }
 
+int proc_get_rx_stat(struct seq_file *m, void *v)
+{
+	_irqL	 irqL;
+	_list	*plist, *phead;
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct sta_info *psta = NULL;
+	struct stainfo_stats	*pstats = NULL;
+	struct sta_priv		*pstapriv = &(adapter->stapriv);
+	u32 i, j;
+	u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+	u8 null_addr[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+
+	_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+	for (i = 0; i < NUM_STA; i++) {
+		phead = &(pstapriv->sta_hash[i]);
+		plist = get_next(phead);
+		while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) {
+			psta = LIST_CONTAINOR(plist, struct sta_info, hash_list);
+			plist = get_next(plist);
+			pstats = &psta->sta_stats;
+
+			if (pstats == NULL)
+				continue;
+			if ((_rtw_memcmp(psta->hwaddr, bc_addr, 6) !=  _TRUE)
+				&& (_rtw_memcmp(psta->hwaddr, null_addr, 6) != _TRUE)
+				&& (_rtw_memcmp(psta->hwaddr, adapter_mac_addr(adapter), 6) != _TRUE)) {
+				RTW_PRINT_SEL(m, "MAC :\t\t"MAC_FMT "\n", MAC_ARG(psta->hwaddr));
+				RTW_PRINT_SEL(m, "data_rx_cnt :\t%llu\n", pstats->rx_data_pkts - pstats->rx_data_last_pkts);
+				pstats->rx_data_last_pkts = pstats->rx_data_pkts;
+				RTW_PRINT_SEL(m, "duplicate_cnt :\t%u\n", pstats->duplicate_cnt);
+				pstats->duplicate_cnt = 0;
+				RTW_PRINT_SEL(m, "rx_per_rate_cnt :\n");
+
+				for (j = 0; j < 0x60; j++) {
+					RTW_PRINT_SEL(m, "%08u  ", pstats->rxratecnt[j]);
+					pstats->rxratecnt[j] = 0;
+					if ((j%8) == 7)
+						RTW_PRINT_SEL(m, "\n");
+				}
+				RTW_PRINT_SEL(m, "\n");
+			}
+		}
+	}
+	_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+	return 0;
+}
+
+int proc_get_tx_stat(struct seq_file *m, void *v)
+{
+	_irqL	irqL;
+	_list	*plist, *phead;
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct sta_info *psta = NULL, *sta_rec[NUM_STA];
+	struct stainfo_stats	*pstats = NULL;
+	struct sta_priv	*pstapriv = &(adapter->stapriv);
+	u32 i, macid_rec_idx = 0;
+	u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+	u8 null_addr[ETH_ALEN] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+	struct submit_ctx gotc2h;
+
+	_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+	for (i = 0; i < NUM_STA; i++) {
+		sta_rec[i] = NULL;
+		phead = &(pstapriv->sta_hash[i]);
+		plist = get_next(phead);
+		while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) {
+			psta = LIST_CONTAINOR(plist, struct sta_info, hash_list);
+			plist = get_next(plist);
+			if ((_rtw_memcmp(psta->hwaddr, bc_addr, 6) !=  _TRUE)
+				&& (_rtw_memcmp(psta->hwaddr, null_addr, 6) != _TRUE)
+				&& (_rtw_memcmp(psta->hwaddr, adapter_mac_addr(adapter), 6) != _TRUE)) {
+				sta_rec[macid_rec_idx++] = psta;
+			}
+		}
+	}
+	_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+	for (i = 0; i < macid_rec_idx; i++) {
+		pstats = &(sta_rec[i]->sta_stats);
+		if (pstats == NULL)
+			continue;
+		pstapriv->c2h_sta = sta_rec[i];
+		rtw_hal_reqtxrpt(adapter, sta_rec[i]->mac_id);
+		rtw_sctx_init(&gotc2h, 60);
+		pstapriv->gotc2h = &gotc2h;
+		if (rtw_sctx_wait(&gotc2h, __func__)) {
+			RTW_PRINT_SEL(m, "MAC :\t\t"MAC_FMT "\n", MAC_ARG(sta_rec[i]->hwaddr));
+			RTW_PRINT_SEL(m, "data_sent_cnt :\t%u\n", pstats->tx_ok_cnt + pstats->tx_fail_cnt);
+			RTW_PRINT_SEL(m, "success_cnt :\t%u\n", pstats->tx_ok_cnt);
+			RTW_PRINT_SEL(m, "failure_cnt :\t%u\n", pstats->tx_fail_cnt);
+			RTW_PRINT_SEL(m, "retry_cnt :\t%u\n\n", pstats->tx_retry_cnt);
+		} else {
+			RTW_PRINT_SEL(m, "Warming : Query timeout, operation abort!!\n");
+			RTW_PRINT_SEL(m, "\n");
+			pstapriv->c2h_sta = NULL;
+			break;
+		}
+	}
+	return 0;
+}
+
 int proc_get_fwstate(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
@@ -1309,7 +1384,7 @@ ssize_t proc_set_survey_info(struct file *file, const char __user *buffer, size_
 		return -EFAULT;
 
 #ifdef CONFIG_MP_INCLUDED
-	if (rtw_mi_mp_mode_check(padapter)) {
+	if (rtw_mp_mode_check(padapter)) {
 		RTW_INFO("MP mode block Scan request\n");
 		goto exit;
 	}
@@ -1692,6 +1767,30 @@ ssize_t proc_set_rx_cnt_dump(struct file *file, const char __user *buffer, size_
 	return count;
 }
 #endif
+
+static u8 fwdl_test_chksum_fail = 0;
+static u8 fwdl_test_wintint_rdy_fail = 0;
+
+bool rtw_fwdl_test_trigger_chksum_fail(void)
+{
+	if (fwdl_test_chksum_fail) {
+		RTW_PRINT("fwdl test case: trigger chksum_fail\n");
+		fwdl_test_chksum_fail--;
+		return _TRUE;
+	}
+	return _FALSE;
+}
+
+bool rtw_fwdl_test_trigger_wintint_rdy_fail(void)
+{
+	if (fwdl_test_wintint_rdy_fail) {
+		RTW_PRINT("fwdl test case: trigger wintint_rdy_fail\n");
+		fwdl_test_wintint_rdy_fail--;
+		return _TRUE;
+	}
+	return _FALSE;
+}
+
 ssize_t proc_set_fwdl_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
 {
 	struct net_device *dev = data;
@@ -1713,6 +1812,18 @@ ssize_t proc_set_fwdl_test_case(struct file *file, const char __user *buffer, si
 	return count;
 }
 
+static u8 del_rx_ampdu_test_no_tx_fail = 0;
+
+bool rtw_del_rx_ampdu_test_trigger_no_tx_fail(void)
+{
+	if (del_rx_ampdu_test_no_tx_fail) {
+		RTW_PRINT("del_rx_ampdu test case: trigger no_tx_fail\n");
+		del_rx_ampdu_test_no_tx_fail--;
+		return _TRUE;
+	}
+	return _FALSE;
+}
+
 ssize_t proc_set_del_rx_ampdu_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
 {
 	struct net_device *dev = data;
@@ -1780,6 +1891,13 @@ ssize_t proc_set_dfs_master_test_case(struct file *file, const char __user *buff
 }
 #endif /* CONFIG_DFS_MASTER */
 
+static u32 g_wait_hiq_empty_ms = 0;
+
+u32 rtw_get_wait_hiq_empty_ms(void)
+{
+	return g_wait_hiq_empty_ms;
+}
+
 ssize_t proc_set_wait_hiq_empty(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
 {
 	struct net_device *dev = data;
@@ -1801,6 +1919,53 @@ ssize_t proc_set_wait_hiq_empty(struct file *file, const char __user *buffer, si
 	return count;
 }
 
+static u32 sta_linking_test_start_time = 0;
+static u32 sta_linking_test_wait_ms = 0;
+static u8 sta_linking_test_force_fail = 0;
+
+void rtw_sta_linking_test_set_start(void)
+{
+	sta_linking_test_start_time = rtw_get_current_time();
+}
+
+bool rtw_sta_linking_test_wait_done(void)
+{
+	return rtw_get_passing_time_ms(sta_linking_test_start_time) >= sta_linking_test_wait_ms;
+}
+
+bool rtw_sta_linking_test_force_fail(void)
+{
+	return sta_linking_test_force_fail;
+}
+
+ssize_t proc_set_sta_linking_test(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	char tmp[32];
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+		u32 wait_ms = 0;
+		u8 force_fail = 0;
+		int num = sscanf(tmp, "%u %hhu", &wait_ms, &force_fail);
+
+		if (num >= 1)
+			sta_linking_test_wait_ms = wait_ms;
+		if (num >= 2)
+			sta_linking_test_force_fail = force_fail;
+	}
+
+	return count;
+}
+
 int proc_get_suspend_resume_info(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
@@ -2417,6 +2582,20 @@ int proc_get_mac_rptbuf(struct seq_file *m, void *v)
 	return 0;
 }
 
+void dump_regsty_rx_ampdu_size_limit(void *sel, _adapter *adapter)
+{
+	struct registry_priv *regsty = adapter_to_regsty(adapter);
+	int i;
+
+	RTW_PRINT_SEL(sel, "%-3s %-3s %-3s %-3s %-4s\n"
+		, "", "20M", "40M", "80M", "160M");
+	for (i = 0; i < 4; i++)
+		RTW_PRINT_SEL(sel, "%dSS %3u %3u %3u %4u\n", i + 1
+			, regsty->rx_ampdu_sz_limit_by_nss_bw[i][0]
+			, regsty->rx_ampdu_sz_limit_by_nss_bw[i][1]
+			, regsty->rx_ampdu_sz_limit_by_nss_bw[i][2]
+			, regsty->rx_ampdu_sz_limit_by_nss_bw[i][3]);
+}
 
 int proc_get_rx_ampdu(struct seq_file *m, void *v)
 {
@@ -2430,10 +2609,12 @@ int proc_get_rx_ampdu(struct seq_file *m, void *v)
 		RTW_PRINT_SEL(m, "%u%s\n", padapter->fix_rx_ampdu_accept, "(fixed)");
 
 	_RTW_PRINT_SEL(m, "size: ");
-	if (padapter->fix_rx_ampdu_size == RX_AMPDU_SIZE_INVALID)
-		RTW_PRINT_SEL(m, "%u%s\n", rtw_rx_ampdu_size(padapter), "(auto)");
-	else
+	if (padapter->fix_rx_ampdu_size == RX_AMPDU_SIZE_INVALID) {
+		RTW_PRINT_SEL(m, "%u%s\n", rtw_rx_ampdu_size(padapter), "(auto) with conditional limit:");
+		dump_regsty_rx_ampdu_size_limit(m, padapter);
+	} else
 		RTW_PRINT_SEL(m, "%u%s\n", padapter->fix_rx_ampdu_size, "(fixed)");
+	RTW_PRINT_SEL(m, "\n");
 
 	RTW_PRINT_SEL(m, "%19s %17s\n", "fix_rx_ampdu_accept", "fix_rx_ampdu_size");
 
@@ -2523,6 +2704,48 @@ ssize_t proc_set_rx_ampdu_factor(struct file *file, const char __user *buffer
 	return count;
 }
 
+int proc_get_tx_max_agg_num(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+
+
+	if (padapter)
+		RTW_PRINT_SEL(m, "tx max AMPDU num = 0x%02x\n", padapter->driver_tx_max_agg_num);
+
+	return 0;
+}
+
+ssize_t proc_set_tx_max_agg_num(struct file *file, const char __user *buffer
+				 , size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	char tmp[32];
+	u8 agg_num;
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+
+		int num = sscanf(tmp, "%hhx ", &agg_num);
+
+		if (padapter && (num == 1)) {
+			RTW_INFO("padapter->driver_tx_max_agg_num = 0x%02x\n", agg_num);
+
+			padapter->driver_tx_max_agg_num = agg_num;
+		}
+	}
+
+	return count;
+}
+
 int proc_get_rx_ampdu_density(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
@@ -3210,48 +3433,49 @@ int proc_get_best_channel(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 	u32 i, best_channel_24G = 1, best_channel_5G = 36, index_24G = 0, index_5G = 0;
 
-	for (i = 0; pmlmeext->channel_set[i].ChannelNum != 0; i++) {
-		if (pmlmeext->channel_set[i].ChannelNum == 1)
+	for (i = 0; i < rfctl->max_chan_nums && rfctl->channel_set[i].ChannelNum != 0; i++) {
+		if (rfctl->channel_set[i].ChannelNum == 1)
 			index_24G = i;
-		if (pmlmeext->channel_set[i].ChannelNum == 36)
+		if (rfctl->channel_set[i].ChannelNum == 36)
 			index_5G = i;
 	}
 
-	for (i = 0; (i < MAX_CHANNEL_NUM) && (pmlmeext->channel_set[i].ChannelNum != 0) ; i++) {
+	for (i = 0; i < rfctl->max_chan_nums && rfctl->channel_set[i].ChannelNum != 0; i++) {
 		/* 2.4G */
-		if (pmlmeext->channel_set[i].ChannelNum == 6) {
-			if (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_24G].rx_count) {
+		if (rfctl->channel_set[i].ChannelNum == 6) {
+			if (rfctl->channel_set[i].rx_count < rfctl->channel_set[index_24G].rx_count) {
 				index_24G = i;
-				best_channel_24G = pmlmeext->channel_set[i].ChannelNum;
+				best_channel_24G = rfctl->channel_set[i].ChannelNum;
 			}
 		}
 
 		/* 5G */
-		if (pmlmeext->channel_set[i].ChannelNum >= 36
-		    && pmlmeext->channel_set[i].ChannelNum < 140) {
+		if (rfctl->channel_set[i].ChannelNum >= 36
+		    && rfctl->channel_set[i].ChannelNum < 140) {
 			/* Find primary channel */
-			if (((pmlmeext->channel_set[i].ChannelNum - 36) % 8 == 0)
-			    && (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_5G].rx_count)) {
+			if (((rfctl->channel_set[i].ChannelNum - 36) % 8 == 0)
+			    && (rfctl->channel_set[i].rx_count < rfctl->channel_set[index_5G].rx_count)) {
 				index_5G = i;
-				best_channel_5G = pmlmeext->channel_set[i].ChannelNum;
+				best_channel_5G = rfctl->channel_set[i].ChannelNum;
 			}
 		}
 
-		if (pmlmeext->channel_set[i].ChannelNum >= 149
-		    && pmlmeext->channel_set[i].ChannelNum < 165) {
+		if (rfctl->channel_set[i].ChannelNum >= 149
+		    && rfctl->channel_set[i].ChannelNum < 165) {
 			/* find primary channel */
-			if (((pmlmeext->channel_set[i].ChannelNum - 149) % 8 == 0)
-			    && (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_5G].rx_count)) {
+			if (((rfctl->channel_set[i].ChannelNum - 149) % 8 == 0)
+			    && (rfctl->channel_set[i].rx_count < rfctl->channel_set[index_5G].rx_count)) {
 				index_5G = i;
-				best_channel_5G = pmlmeext->channel_set[i].ChannelNum;
+				best_channel_5G = rfctl->channel_set[i].ChannelNum;
 			}
 		}
 #if 1 /* debug */
 		RTW_PRINT_SEL(m, "The rx cnt of channel %3d = %d\n",
-			pmlmeext->channel_set[i].ChannelNum, pmlmeext->channel_set[i].rx_count);
+			rfctl->channel_set[i].ChannelNum, rfctl->channel_set[i].rx_count);
 #endif
 	}
 
@@ -3265,6 +3489,7 @@ ssize_t proc_set_best_channel(struct file *file, const char __user *buffer, size
 {
 	struct net_device *dev = data;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 	char tmp[32];
 
@@ -3278,8 +3503,8 @@ ssize_t proc_set_best_channel(struct file *file, const char __user *buffer, size
 
 	if (buffer && !copy_from_user(tmp, buffer, count)) {
 		int i;
-		for (i = 0; pmlmeext->channel_set[i].ChannelNum != 0; i++)
-			pmlmeext->channel_set[i].rx_count = 0;
+		for (i = 0; i < rfctl->max_chan_nums && rfctl->channel_set[i].ChannelNum != 0; i++)
+			rfctl->channel_set[i].rx_count = 0;
 
 		RTW_INFO("set %s\n", "Clean Best Channel Count");
 	}
@@ -3382,6 +3607,55 @@ int proc_get_btcoex_info(struct seq_file *m, void *v)
 
 	return 0;
 }
+
+#ifdef CONFIG_RF4CE_COEXIST
+int proc_get_rf4ce_state(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	u8 state = 0, voice = 0;
+
+	state = rtw_btcoex_GetRf4ceLinkState(adapter);
+
+	RTW_PRINT_SEL(m, "RF4CE %s\n", state?"Connected":"Disconnect");
+
+	return 0;
+}
+
+/* This interface is designed for user space application to inform RF4CE state
+ * Initial define for DHC 1295 E387 project
+ *
+ * echo state voice > rf4ce_state
+ * state
+ *	0: RF4CE disconnected
+ *	1: RF4CE connected
+ */
+ssize_t proc_set_rf4ce_state(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	char tmp[32];
+	u8 state;
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+
+		int num = sscanf(tmp, "%hhx", &state);
+
+		if (num >= 1)
+			rtw_btcoex_SetRf4ceLinkState(adapter, state);
+	}
+
+	return count;
+}
+#endif /* CONFIG_RF4CE_COEXIST */
 #endif /* CONFIG_BT_COEXIST */
 
 #if defined(DBG_CONFIG_ERROR_DETECT)
@@ -3426,6 +3700,57 @@ ssize_t proc_set_sreset(struct file *file, const char __user *buffer, size_t cou
 
 #ifdef CONFIG_PCI_HCI
 
+int proc_get_pci_aspm(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *padapter = (_adapter *) rtw_netdev_priv(dev);
+	struct dvobj_priv	*pdvobjpriv = adapter_to_dvobj(padapter);
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct pci_priv	*pcipriv = &(pdvobjpriv->pcipriv);
+	u8 tmp8 = 0;
+	u16 tmp16 = 0;
+	u32 tmp32 = 0;
+
+
+	RTW_PRINT_SEL(m, "***** ASPM Capability *****\n");
+
+	pci_read_config_dword(pdvobjpriv->ppcidev, pcipriv->pciehdr_offset + PCI_EXP_LNKCAP, &tmp32);
+
+	RTW_PRINT_SEL(m, "CLK REQ:	%s\n", (tmp32&PCI_EXP_LNKCAP_CLKPM) ? "Enable" : "Disable");
+	RTW_PRINT_SEL(m, "ASPM L0s:	%s\n", (tmp32&BIT10) ? "Enable" : "Disable");
+	RTW_PRINT_SEL(m, "ASPM L1:	%s\n", (tmp32&BIT11) ? "Enable" : "Disable");
+
+	tmp8 = rtw_hal_pci_l1off_capability(padapter);
+	RTW_PRINT_SEL(m, "ASPM L1OFF:	%s\n", tmp8 ? "Enable" : "Disable");
+
+	RTW_PRINT_SEL(m, "***** ASPM CTRL Reg *****\n");
+
+	pci_read_config_word(pdvobjpriv->ppcidev, pcipriv->pciehdr_offset + PCI_EXP_LNKCTL, &tmp16);
+
+	RTW_PRINT_SEL(m, "CLK REQ:	%s\n", (tmp16&PCI_EXP_LNKCTL_CLKREQ_EN) ? "Enable" : "Disable");
+	RTW_PRINT_SEL(m, "ASPM L0s:	%s\n", (tmp16&BIT0) ? "Enable" : "Disable");
+	RTW_PRINT_SEL(m, "ASPM L1:	%s\n", (tmp16&BIT1) ? "Enable" : "Disable");
+
+	tmp8 = rtw_hal_pci_l1off_nic_support(padapter);
+	RTW_PRINT_SEL(m, "ASPM L1OFF:	%s\n", tmp8 ? "Enable" : "Disable");
+
+	RTW_PRINT_SEL(m, "***** ASPM Backdoor *****\n");
+
+	tmp8 = rtw_hal_pci_dbi_read(padapter, 0x719);
+	RTW_PRINT_SEL(m, "CLK REQ:	%s\n", (tmp8 & BIT4) ? "Enable" : "Disable");
+
+	tmp8 = rtw_hal_pci_dbi_read(padapter, 0x70f);
+	RTW_PRINT_SEL(m, "ASPM L0s:	%s\n", (tmp8&BIT7) ? "Enable" : "Disable");
+
+	tmp8 = rtw_hal_pci_dbi_read(padapter, 0x719);
+	RTW_PRINT_SEL(m, "ASPM L1:	%s\n", (tmp8 & BIT3) ? "Enable" : "Disable");
+
+	tmp8 = rtw_hal_pci_dbi_read(padapter, 0x718);
+	RTW_PRINT_SEL(m, "ASPM L1OFF:	%s\n", (tmp8 & BIT5) ? "Enable" : "Disable");
+
+	return 0;
+}
+
 int proc_get_rx_ring(struct seq_file *m, void *v)
 {
 	_irqL irqL;
@@ -3756,6 +4081,7 @@ int proc_get_ps_info(struct seq_file *m, void *v)
 	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
 	u8 ips_mode = pwrpriv->ips_mode;
 	u8 lps_mode = pwrpriv->power_mgnt;
+	u8 lps_level = pwrpriv->lps_level;
 	char *str = "";
 
 	RTW_PRINT_SEL(m, "======Power Saving Info:======\n");
@@ -3797,6 +4123,15 @@ int proc_get_ps_info(struct seq_file *m, void *v)
 		RTW_PRINT_SEL(m, " DTIM: %d\n", pwrpriv->dtim);
 	RTW_PRINT_SEL(m, " LPS enter count:%d, LPS leave count:%d\n",
 		      pwrpriv->lps_enter_cnts, pwrpriv->lps_leave_cnts);
+
+	if (lps_level == LPS_LCLK)
+		str = "LPS_LCLK";
+	else if  (lps_level == LPS_PG)
+		str = "LPS_PG";
+	else
+		str = "LPS_NORMAL";
+	RTW_PRINT_SEL(m, " LPS level: %s\n", str);
+
 	RTW_PRINT_SEL(m, "=============================\n");
 	return 0;
 }
@@ -4250,6 +4585,52 @@ ssize_t proc_set_monitor(struct file *file, const char __user *buffer, size_t co
 
 	return count;
 }
+#ifdef DBG_XMIT_BLOCK
+int proc_get_xmit_block(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+
+	dump_xmit_block(m, padapter);
+
+	return 0;
+}
+
+ssize_t proc_set_xmit_block(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	char tmp[32];
+	u8 xb_mode, xb_reason;
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+
+		int num = sscanf(tmp, "%hhx %hhx", &xb_mode, &xb_reason);
+
+		if (num != 2) {
+			RTW_INFO("invalid parameter!\n");
+			return count;
+		}
+
+		if (xb_mode == 0)/*set*/
+			rtw_set_xmit_block(padapter, xb_reason);
+		else if (xb_mode == 1)/*clear*/
+			rtw_clr_xmit_block(padapter, xb_reason);
+		else
+			RTW_INFO("invalid parameter!\n");
+	}
+
+	return count;
+}
+#endif
 
 #include <hal_data.h>
 int proc_get_efuse_map(struct seq_file *m, void *v)
@@ -5037,4 +5418,118 @@ ssize_t proc_set_mcc_sta_bw80_target_tp(struct file *file, const char __user *bu
 }
 #endif /* CONFIG_MCC_MODE */
 
+int proc_get_ack_timeout(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	u8 ack_timeout_val, ack_timeout_val_cck;
+
+	ack_timeout_val = rtw_read8(padapter, REG_ACKTO);
+
+#ifdef CONFIG_RTL8821C
+	ack_timeout_val_cck = rtw_read8(padapter, REG_ACKTO_CCK_8821C);
+	RTW_PRINT_SEL(m, "Current CCK packet ACK Timeout = %d us (0x%x).\n", ack_timeout_val_cck, ack_timeout_val_cck);
+	RTW_PRINT_SEL(m, "Current non-CCK packet ACK Timeout = %d us (0x%x).\n", ack_timeout_val, ack_timeout_val);
+#else
+	RTW_PRINT_SEL(m, "Current ACK Timeout = %d us (0x%x).\n", ack_timeout_val, ack_timeout_val);
+#endif
+
+	return 0;
+}
+
+ssize_t proc_set_ack_timeout(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	char tmp[32];
+	u32 ack_timeout_ms, ack_timeout_ms_cck;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+		int num = sscanf(tmp, "%u %u", &ack_timeout_ms, &ack_timeout_ms_cck);
+
+#ifdef CONFIG_RTL8821C
+		if (num < 2) {
+			RTW_INFO(FUNC_ADPT_FMT ": input parameters < 2\n", FUNC_ADPT_ARG(padapter));
+			return -EINVAL;
+		}
+#else
+		if (num < 1) {
+			RTW_INFO(FUNC_ADPT_FMT ": input parameters < 1\n", FUNC_ADPT_ARG(padapter));
+			return -EINVAL;
+		}
+#endif
+		/* This register sets the Ack time out value after Tx unicast packet. It is in units of us. */
+		rtw_write8(padapter, REG_ACKTO, (u8)ack_timeout_ms);
+
+#ifdef CONFIG_RTL8821C
+		/* This register sets the Ack time out value after Tx unicast CCK packet. It is in units of us. */
+		rtw_write8(padapter, REG_ACKTO_CCK_8821C, (u8)ack_timeout_ms_cck);
+		RTW_INFO("Set CCK packet ACK Timeout to %d us.\n", ack_timeout_ms_cck);
+		RTW_INFO("Set non-CCK packet ACK Timeout to %d us.\n", ack_timeout_ms);
+#else
+		RTW_INFO("Set ACK Timeout to %d us.\n", ack_timeout_ms);
+#endif
+	}
+
+	return count;
+}
+
+ssize_t proc_set_iqk_fw_offload(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	_adapter *pri_adapter = GET_PRIMARY_ADAPTER(adapter);
+	HAL_DATA_TYPE *hal = GET_HAL_DATA(adapter);
+	char tmp[32];
+	u32 enable = 0;
+
+	if (buffer == NULL) {
+		RTW_INFO("input buffer is NULL!\n");
+		return -EFAULT;
+	}
+
+	if (count < 1) {
+		RTW_INFO("input length is 0!\n");
+		return -EFAULT;
+	}
+
+	if (count > sizeof(tmp)) {
+		RTW_INFO("input length is too large\n");
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+		int num = sscanf(tmp, "%d", &enable);
+
+		if (num < 1) {
+			RTW_INFO("input parameters < 1\n");
+			return -EINVAL;
+		}
+
+		if (hal->RegIQKFWOffload != enable) {
+			hal->RegIQKFWOffload = enable;
+			rtw_hal_update_iqk_fw_offload_cap(pri_adapter);
+		}
+	}
+
+	return count;
+}
+
+int proc_get_iqk_fw_offload(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	HAL_DATA_TYPE *hal = GET_HAL_DATA(adapter);
+
+
+	RTW_PRINT_SEL(m, "IQK FW offload:%s\n", hal->RegIQKFWOffload?"enable":"disable");
+	return 0;
+}
+
 #endif /* CONFIG_PROC_DEBUG */
diff --git a/rtl8822BU/core/rtw_eeprom.c b/rtl8822BU/core/rtw_eeprom.c
index d7bca03..d48996e 100755..100644
--- a/rtl8822BU/core/rtw_eeprom.c
+++ b/rtl8822BU/core/rtw_eeprom.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_EEPROM_C_
 
 #include <drv_conf.h>
diff --git a/rtl8822BU/core/rtw_ieee80211.c b/rtl8822BU/core/rtw_ieee80211.c
index 8a76427..2899985 100755..100644
--- a/rtl8822BU/core/rtw_ieee80211.c
+++ b/rtl8822BU/core/rtw_ieee80211.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _IEEE80211_C
 
 #ifdef CONFIG_PLATFORM_INTEL_BYT
@@ -2585,13 +2580,43 @@ u8	rtw_ht_mcsset_to_nss(u8 *supp_mcs_set)
 	return nss;
 }
 
+u32	rtw_ht_mcs_set_to_bitmap(u8 *mcs_set, u8 nss)
+{
+	u8 i;
+	u32 bitmap = 0;
+
+	for (i = 0; i < nss; i++)
+		bitmap |= mcs_set[i] << (i * 8);
+
+	RTW_INFO("ht_mcs_set=%02x %02x %02x %02x, nss=%u, bitmap=%08x\n"
+		, mcs_set[0], mcs_set[1], mcs_set[2], mcs_set[3], nss, bitmap);
+
+	return bitmap;
+}
+
 /* show MCS rate, unit: 100Kbps */
 u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI, unsigned char *MCS_rate)
 {
 	u16 max_rate = 0;
 
-	/*MCS_rate[2] = 3T3R , MCS_rate[1] = 2T2R , MCS_rate[0] = 1T1R*/
-	if (MCS_rate[2]) {
+	if (MCS_rate[3]) {
+		if (MCS_rate[3] & BIT(7))
+			max_rate = (bw_40MHz) ? ((short_GI) ? 6000 : 5400) : ((short_GI) ? 2889 : 2600);
+		else if (MCS_rate[3] & BIT(6))
+			max_rate = (bw_40MHz) ? ((short_GI) ? 5400 : 4860) : ((short_GI) ? 2600 : 2340);
+		else if (MCS_rate[3] & BIT(5))
+			max_rate = (bw_40MHz) ? ((short_GI) ? 4800 : 4320) : ((short_GI) ? 2311 : 2080);
+		else if (MCS_rate[3] & BIT(4))
+			max_rate = (bw_40MHz) ? ((short_GI) ? 3600 : 3240) : ((short_GI) ? 1733 : 1560);
+		else if (MCS_rate[3] & BIT(3))
+			max_rate = (bw_40MHz) ? ((short_GI) ? 2400 : 2160) : ((short_GI) ? 1156 : 1040);
+		else if (MCS_rate[3] & BIT(2))
+			max_rate = (bw_40MHz) ? ((short_GI) ? 1800 : 1620) : ((short_GI) ? 867 : 780);
+		else if (MCS_rate[3] & BIT(1))
+			max_rate = (bw_40MHz) ? ((short_GI) ? 1200 : 1080) : ((short_GI) ? 578 : 520);
+		else if (MCS_rate[3] & BIT(0))
+			max_rate = (bw_40MHz) ? ((short_GI) ? 600 : 540) : ((short_GI) ? 289 : 260);
+	} else if (MCS_rate[2]) {
 		if (MCS_rate[2] & BIT(7))
 			max_rate = (bw_40MHz) ? ((short_GI) ? 4500 : 4050) : ((short_GI) ? 2167 : 1950);
 		else if (MCS_rate[2] & BIT(6))
diff --git a/rtl8822BU/core/rtw_io.c b/rtl8822BU/core/rtw_io.c
index 683da16..cb8e6b8 100755..100644
--- a/rtl8822BU/core/rtw_io.c
+++ b/rtl8822BU/core/rtw_io.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 /*
 
 The purpose of rtw_io.c
@@ -56,7 +51,7 @@ jackson@realtek.com.tw
 	#error "Shall be Linux or Windows, but not both!\n"
 #endif
 
-#ifdef CONFIG_SDIO_HCI
+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_PLATFORM_RTL8197D)
 	#define rtw_le16_to_cpu(val)		val
 	#define rtw_le32_to_cpu(val)		val
 	#define rtw_cpu_to_le16(val)		val
diff --git a/rtl8822BU/core/rtw_ioctl_query.c b/rtl8822BU/core/rtw_ioctl_query.c
index 4f8232d..6f7613e 100755..100644
--- a/rtl8822BU/core/rtw_ioctl_query.c
+++ b/rtl8822BU/core/rtw_ioctl_query.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_IOCTL_QUERY_C_
 
 #include <drv_types.h>
diff --git a/rtl8822BU/core/rtw_ioctl_rtl.c b/rtl8822BU/core/rtw_ioctl_rtl.c
index ab4a387..5d9e76b 100755..100644
--- a/rtl8822BU/core/rtw_ioctl_rtl.c
+++ b/rtl8822BU/core/rtw_ioctl_rtl.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define  _RTW_IOCTL_RTL_C_
 
 #include <drv_types.h>
@@ -432,13 +427,14 @@ NDIS_STATUS oid_rt_get_channelplan_hdl(struct oid_par_priv *poid_par_priv)
 {
 	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
 	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 
 	if (poid_par_priv->type_of_oid != QUERY_OID) {
 		status = NDIS_STATUS_NOT_ACCEPTED;
 		return status;
 	}
 	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
-	*(u16 *)poid_par_priv->information_buf = padapter->mlmepriv.ChannelPlan ;
+	*(u16 *)poid_par_priv->information_buf = rfctl->ChannelPlan;
 
 	return status;
 }
@@ -446,13 +442,14 @@ NDIS_STATUS oid_rt_set_channelplan_hdl(struct oid_par_priv *poid_par_priv)
 {
 	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
 	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 
 	if (poid_par_priv->type_of_oid != SET_OID) {
 		status = NDIS_STATUS_NOT_ACCEPTED;
 		return status;
 	}
 
-	padapter->mlmepriv.ChannelPlan  = *(u16 *)poid_par_priv->information_buf ;
+	rfctl->ChannelPlan  = *(u16 *)poid_par_priv->information_buf;
 
 	return status;
 }
diff --git a/rtl8822BU/core/rtw_ioctl_set.c b/rtl8822BU/core/rtw_ioctl_set.c
index a1412bf..efd4fcf 100755..100644
--- a/rtl8822BU/core/rtw_ioctl_set.c
+++ b/rtl8822BU/core/rtw_ioctl_set.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_IOCTL_SET_C_
 
 #include <drv_types.h>
@@ -302,7 +297,7 @@ u8 rtw_set_802_11_bssid(_adapter *padapter, u8 *bssid)
 				goto release_mlme_lock;/* it means driver is in WIFI_ADHOC_MASTER_STATE, we needn't create bss again. */
 		} else {
 
-			rtw_disassoc_cmd(padapter, 0, _TRUE);
+			rtw_disassoc_cmd(padapter, 0, 0);
 
 			if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
 				rtw_indicate_disconnect(padapter, 0, _FALSE);
@@ -374,7 +369,7 @@ u8 rtw_set_802_11_ssid(_adapter *padapter, NDIS_802_11_SSID *ssid)
 
 				if (rtw_is_same_ibss(padapter, pnetwork) == _FALSE) {
 					/* if in WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE, create bss or rejoin again */
-					rtw_disassoc_cmd(padapter, 0, _TRUE);
+					rtw_disassoc_cmd(padapter, 0, 0);
 
 					if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
 						rtw_indicate_disconnect(padapter, 0, _FALSE);
@@ -395,7 +390,7 @@ u8 rtw_set_802_11_ssid(_adapter *padapter, NDIS_802_11_SSID *ssid)
 #endif
 		} else {
 
-			rtw_disassoc_cmd(padapter, 0, _TRUE);
+			rtw_disassoc_cmd(padapter, 0, 0);
 
 			if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
 				rtw_indicate_disconnect(padapter, 0, _FALSE);
@@ -514,6 +509,7 @@ u8 rtw_set_802_11_infrastructure_mode(_adapter *padapter,
 	struct	mlme_priv	*pmlmepriv = &padapter->mlmepriv;
 	struct	wlan_network	*cur_network = &pmlmepriv->cur_network;
 	NDIS_802_11_NETWORK_INFRASTRUCTURE *pold_state = &(cur_network->network.InfrastructureMode);
+	u8 ap2sta_mode = _FALSE;
 
 
 
@@ -523,7 +519,7 @@ u8 rtw_set_802_11_infrastructure_mode(_adapter *padapter,
 		if (*pold_state == Ndis802_11APMode) {
 			/* change to other mode from Ndis802_11APMode			 */
 			cur_network->join_res = -1;
-
+			ap2sta_mode = _TRUE;
 #ifdef CONFIG_NATIVEAP_MLME
 			stop_ap_mode(padapter);
 #endif
@@ -532,7 +528,7 @@ u8 rtw_set_802_11_infrastructure_mode(_adapter *padapter,
 		_enter_critical_bh(&pmlmepriv->lock, &irqL);
 
 		if ((check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) || (*pold_state == Ndis802_11IBSS))
-			rtw_disassoc_cmd(padapter, 0, _TRUE);
+			rtw_disassoc_cmd(padapter, 0, 0);
 
 		if ((check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ||
 		    (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE))
@@ -555,6 +551,9 @@ u8 rtw_set_802_11_infrastructure_mode(_adapter *padapter,
 
 		case Ndis802_11Infrastructure:
 			set_fwstate(pmlmepriv, WIFI_STATION_STATE);
+
+			if (ap2sta_mode)
+				rtw_init_bcmc_stainfo(padapter);
 			break;
 
 		case Ndis802_11APMode:
@@ -595,7 +594,7 @@ u8 rtw_set_802_11_disassociate(_adapter *padapter)
 
 	if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) {
 
-		rtw_disassoc_cmd(padapter, 0, _TRUE);
+		rtw_disassoc_cmd(padapter, 0, 0);
 		rtw_indicate_disconnect(padapter, 0, _FALSE);
 		/* modify for CONFIG_IEEE80211W, none 11w can use it */
 		rtw_free_assoc_resources_cmd(padapter);
@@ -1022,9 +1021,6 @@ u8 rtw_set_802_11_add_key(_adapter *padapter, NDIS_802_11_KEY *key)
 			if (encryptionalgo == _TKIP_) {
 				padapter->securitypriv.busetkipkey = _FALSE;
 
-				/* _set_timer(&padapter->securitypriv.tkip_timer, 50); */
-
-
 				/* if TKIP, save the Receive/Transmit MIC key in KeyMaterial[128-255] */
 				if ((key->KeyIndex & 0x10000000)) {
 					_rtw_memcpy(&stainfo->dot11tkiptxmickey, key->KeyMaterial + 16, 8);
@@ -1155,13 +1151,11 @@ u16 rtw_get_cur_max_rate(_adapter *adapter)
 #ifdef CONFIG_80211N_HT
 	if (is_supported_ht(psta->wireless_mode)) {
 		rtw_hal_get_hwreg(adapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
-
-		max_rate = rtw_mcs_rate(
-				   rf_type,
-			   ((psta->bw_mode == CHANNEL_WIDTH_40) ? 1 : 0),
-				   short_GI,
-				   psta->htpriv.ht_cap.supp_mcs_set
-			   );
+		max_rate = rtw_mcs_rate(rf_type
+			, (psta->bw_mode == CHANNEL_WIDTH_40) ? 1 : 0
+			, short_GI
+			, psta->htpriv.ht_cap.supp_mcs_set
+		);
 	}
 #ifdef CONFIG_80211AC_VHT
 	else if (is_supported_vht(psta->wireless_mode))
diff --git a/rtl8822BU/core/rtw_iol.c b/rtl8822BU/core/rtw_iol.c
index 42d0b6b..aafac3f 100755..100644
--- a/rtl8822BU/core/rtw_iol.c
+++ b/rtl8822BU/core/rtw_iol.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #include <drv_types.h>
 
diff --git a/rtl8822BU/core/rtw_mem.c b/rtl8822BU/core/rtw_mem.c
index b68a456..d9f5652 100755..100644
--- a/rtl8822BU/core/rtw_mem.c
+++ b/rtl8822BU/core/rtw_mem.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 
 #include <drv_types.h>
 #include <rtw_mem.h>
diff --git a/rtl8822BU/core/rtw_mi.c b/rtl8822BU/core/rtw_mi.c
index 88c9d55..c4e1487 100755..100644
--- a/rtl8822BU/core/rtw_mi.c
+++ b/rtl8822BU/core/rtw_mi.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2015 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_MI_C_
 
 #include <drv_types.h>
@@ -150,6 +145,16 @@ void _rtw_mi_status(_adapter *adapter, struct mi_state *mstate, bool include_sel
 
 		if (check_fwstate(&iface->mlmepriv, WIFI_UNDER_WPS) == _TRUE)
 			MSTATE_WPS_NUM(mstate)++;
+
+#ifdef CONFIG_IOCTL_CFG80211
+		if (rtw_cfg80211_get_is_mgmt_tx(iface))
+			MSTATE_MGMT_TX_NUM(mstate)++;
+		#ifdef CONFIG_P2P
+		if (rtw_cfg80211_get_is_roch(iface) == _TRUE)
+			MSTATE_ROCH_NUM(mstate)++;
+		#endif
+#endif /* CONFIG_IOCTL_CFG80211 */
+
 	}
 }
 
@@ -174,6 +179,12 @@ void dump_mi_status(void *sel, struct dvobj_priv *dvobj)
 #ifdef CONFIG_P2P
 	RTW_PRINT_SEL(sel, "p2p_device_num:%d\n", rtw_mi_stay_in_p2p_mode(dvobj->padapters[IFACE_ID0]));
 #endif
+#if defined(CONFIG_IOCTL_CFG80211)
+	#if defined(CONFIG_P2P)
+	RTW_PRINT_SEL(sel, "roch_num:%d\n", DEV_ROCH_NUM(dvobj));
+	#endif
+	RTW_PRINT_SEL(sel, "mgmt_tx_num:%d\n", DEV_MGMT_TX_NUM(dvobj));
+#endif
 	RTW_PRINT_SEL(sel, "under_wps_num:%d\n", DEV_WPS_NUM(dvobj));
 	RTW_PRINT_SEL(sel, "union_ch:%d\n", DEV_U_CH(dvobj));
 	RTW_PRINT_SEL(sel, "union_bw:%d\n", DEV_U_BW(dvobj));
@@ -285,127 +296,35 @@ u8 rtw_mi_check_status(_adapter *adapter, u8 type)
 	return ret;
 }
 
-u8 rtw_mi_mp_mode_check(_adapter *padapter)
+/*
+* return value : 0 is failed or have not interface meet condition
+* return value : !0 is success or interface numbers which meet condition
+* return value of ops_func must be _TRUE or _FALSE
+*/
+static u8 _rtw_mi_process(_adapter *padapter, bool exclude_self,
+		  void *data, u8(*ops_func)(_adapter *padapter, void *data))
 {
-#ifdef CONFIG_MP_INCLUDED
-#ifdef CONFIG_CONCURRENT_MODE
 	int i;
+	_adapter *iface;
 	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
-	_adapter *iface = NULL;
-
-	for (i = 0; i < dvobj->iface_nums; i++) {
-		iface = dvobj->padapters[i];
 
-		if ((iface) && (iface->registrypriv.mp_mode == 1))
-			return _TRUE;
-	}
-#else
-	if (padapter->registrypriv.mp_mode == 1)
-		return _TRUE;
-#endif
-#endif /* CONFIG_MP_INCLUDED */
-	return _FALSE;
-}
-
-#ifdef CONFIG_CONCURRENT_MODE
-u8 rtw_mi_buddy_under_survey(_adapter *padapter)
-{
-	int i;
 	u8 ret = 0;
-	_adapter *iface = NULL;
-	_irqL	irqL;
-	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
-
-#ifdef CONFIG_IOCTL_CFG80211
-	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
-#endif
-
-	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
-
-	struct mlme_priv *buddy_mlmepriv;
-	struct rtw_wdev_priv *buddy_wdev_priv;
 
 	for (i = 0; i < dvobj->iface_nums; i++) {
 		iface = dvobj->padapters[i];
 		if ((iface) && rtw_is_adapter_up(iface)) {
 
-			if (iface == padapter)
+			if ((exclude_self) && (iface == padapter))
 				continue;
 
-			buddy_mlmepriv = &iface->mlmepriv;
-			if (check_fwstate(buddy_mlmepriv, _FW_UNDER_SURVEY)) {
-				ret = UNDER_SURVEY_T1;
-
-#ifdef CONFIG_IOCTL_CFG80211
-				buddy_wdev_priv = adapter_wdev_data(iface);
-				_enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL);
-				_enter_critical_bh(&buddy_wdev_priv->scan_req_lock, &irqL);
-				if (buddy_wdev_priv->scan_request) {
-					pmlmepriv->scanning_via_buddy_intf = _TRUE;
-					_enter_critical_bh(&pmlmepriv->lock, &irqL);
-					set_fwstate(pmlmepriv, _FW_UNDER_SURVEY);
-					_exit_critical_bh(&pmlmepriv->lock, &irqL);
-					ret = UNDER_SURVEY_T2;
-				}
-				_exit_critical_bh(&buddy_wdev_priv->scan_req_lock, &irqL);
-				_exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL);
-#endif
-
-				RTW_INFO(ADPT_FMT"_FW_UNDER_SURVEY\n", ADPT_ARG(iface));
-				return ret;
-			}
+			if (ops_func)
+				if (_TRUE == ops_func(iface, data))
+					ret++;
 		}
 	}
 	return ret;
 }
-void rtw_mi_buddy_indicate_scan_done(_adapter *padapter, bool bscan_aborted)
-{
-#if defined(CONFIG_IOCTL_CFG80211)
-	int i;
-	u8 ret = 0;
-	_adapter *iface = NULL;
-	_irqL	irqL;
-	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
-	struct mlme_priv *mlmepriv;
-	struct rtw_wdev_priv *wdev_priv;
-	bool indicate_buddy_scan = _FALSE;
-
-	for (i = 0; i < dvobj->iface_nums; i++) {
-		iface = dvobj->padapters[i];
-		if ((iface) && rtw_is_adapter_up(iface)) {
-
-			if (iface == padapter)
-				continue;
-
-			mlmepriv = &(iface->mlmepriv);
-			wdev_priv = adapter_wdev_data(iface);
-
-			_enter_critical_bh(&wdev_priv->scan_req_lock, &irqL);
-			if (wdev_priv->scan_request && mlmepriv->scanning_via_buddy_intf == _TRUE) {
-				mlmepriv->scanning_via_buddy_intf = _FALSE;
-				clr_fwstate(mlmepriv, _FW_UNDER_SURVEY);
-				indicate_buddy_scan = _TRUE;
-			}
-			_exit_critical_bh(&wdev_priv->scan_req_lock, &irqL);
-
-			if (indicate_buddy_scan == _TRUE) {
-				rtw_cfg80211_surveydone_event_callback(iface);
-				rtw_indicate_scan_done(iface, bscan_aborted);
-			}
-
-		}
-	}
-#endif
-
-}
-#endif
-
-/*
-* return value : 0 is failed or have not interface meet condition
-* return value : !0 is success or interface numbers which meet condition
-* return value of ops_func must be _TRUE or _FALSE
-*/
-static u8 _rtw_mi_process(_adapter *padapter, bool exclude_self,
+static u8 _rtw_mi_process_without_schk(_adapter *padapter, bool exclude_self,
 		  void *data, u8(*ops_func)(_adapter *padapter, void *data))
 {
 	int i;
@@ -416,18 +335,18 @@ static u8 _rtw_mi_process(_adapter *padapter, bool exclude_self,
 
 	for (i = 0; i < dvobj->iface_nums; i++) {
 		iface = dvobj->padapters[i];
-		if ((iface) && rtw_is_adapter_up(iface)) {
-
+		if (iface) {
 			if ((exclude_self) && (iface == padapter))
 				continue;
 
 			if (ops_func)
-				if (_TRUE == ops_func(iface, data))
+				if (ops_func(iface, data) == _TRUE)
 					ret++;
 		}
 	}
 	return ret;
 }
+
 static u8 _rtw_mi_netif_stop_queue(_adapter *padapter, void *data)
 {
 	bool carrier_off = *(bool *)data;
@@ -559,11 +478,11 @@ static u8 _rtw_mi_reset_drv_sw(_adapter *adapter, void *data)
 }
 void rtw_mi_reset_drv_sw(_adapter *adapter)
 {
-	_rtw_mi_process(adapter, _FALSE, NULL, _rtw_mi_reset_drv_sw);
+	_rtw_mi_process_without_schk(adapter, _FALSE, NULL, _rtw_mi_reset_drv_sw);
 }
 void rtw_mi_buddy_reset_drv_sw(_adapter *adapter)
 {
-	_rtw_mi_process(adapter, _TRUE, NULL, _rtw_mi_reset_drv_sw);
+	_rtw_mi_process_without_schk(adapter, _TRUE, NULL, _rtw_mi_reset_drv_sw);
 }
 
 static u8 _rtw_mi_intf_start(_adapter *adapter, void *data)
@@ -642,7 +561,7 @@ void rtw_mi_buddy_set_scan_deny(_adapter *adapter, u32 ms)
 
 	_rtw_mi_process(adapter, _TRUE, &in_data, _rtw_mi_set_scan_deny);
 }
-#endif
+#endif /*CONFIG_SET_SCAN_DENY_TIMER*/
 
 struct nulldata_param {
 	unsigned char *da;
@@ -1297,17 +1216,18 @@ void rtw_mi_buddy_clone_bcmc_packet(_adapter *padapter, union recv_frame *precvf
 
 	for (i = 0; i < dvobj->iface_nums; i++) {
 		iface = dvobj->padapters[i];
-		if ((iface) && rtw_is_adapter_up(iface)) {
-			if (iface == padapter)
-				continue;
-			pcloneframe = rtw_alloc_recvframe(pfree_recv_queue);
-			if (pcloneframe) {
-				ret = _rtw_mi_buddy_clone_bcmc_packet(iface, precvframe, pphy_status, pcloneframe);
-				if (_SUCCESS != ret) {
-					if (ret == -1)
-						rtw_free_recvframe(pcloneframe, pfree_recv_queue);
-					/*RTW_INFO(ADPT_FMT"-clone BC/MC frame failed\n", ADPT_ARG(iface));*/
-				}
+		if (!iface || iface == padapter)
+			continue;
+		if (rtw_is_adapter_up(iface) == _FALSE || iface->registered == 0)
+			continue;
+
+		pcloneframe = rtw_alloc_recvframe(pfree_recv_queue);
+		if (pcloneframe) {
+			ret = _rtw_mi_buddy_clone_bcmc_packet(iface, precvframe, pphy_status, pcloneframe);
+			if (_SUCCESS != ret) {
+				if (ret == -1)
+					rtw_free_recvframe(pcloneframe, pfree_recv_queue);
+				/*RTW_INFO(ADPT_FMT"-clone BC/MC frame failed\n", ADPT_ARG(iface));*/
 			}
 		}
 	}
@@ -1360,3 +1280,28 @@ void rtw_mi_update_ap_bmc_camid(_adapter *padapter, u8 camid_a, u8 camid_b)
 	}
 #endif
 }
+
+#ifdef CONFIG_AP_MODE
+static u8 _rtw_mi_ap_acdata_control(_adapter *padapter, void *data)
+{
+	u8 power_mode = *(u8 *)data;
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+
+	if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
+		rtw_ap_acdata_control(padapter, power_mode);
+	return _TRUE;
+}
+
+void rtw_mi_ap_acdata_control(_adapter *padapter, u8 power_mode)
+{
+	u8 in_data = power_mode;
+
+	_rtw_mi_process(padapter, _FALSE, &in_data, _rtw_mi_ap_acdata_control);
+}
+void rtw_mi_buddy_ap_acdata_control(_adapter *padapter, u8 power_mode)
+{
+	u8 in_data = power_mode;
+
+	_rtw_mi_process(padapter, _TRUE, &in_data, _rtw_mi_ap_acdata_control);
+}
+#endif /*CONFIG_AP_MODE*/
diff --git a/rtl8822BU/core/rtw_mlme.c b/rtl8822BU/core/rtw_mlme.c
index 28073db..74363ca 100755..100644
--- a/rtl8822BU/core/rtw_mlme.c
+++ b/rtl8822BU/core/rtw_mlme.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_MLME_C_
 
 #include <hal_data.h>
@@ -25,6 +20,27 @@ extern void indicate_wx_scan_complete_event(_adapter *padapter);
 extern u8 rtw_do_join(_adapter *padapter);
 
 
+void rtw_init_mlme_timer(_adapter *padapter)
+{
+	struct	mlme_priv *pmlmepriv = &padapter->mlmepriv;
+
+	rtw_init_timer(&(pmlmepriv->assoc_timer), padapter, rtw_join_timeout_handler, padapter);
+	rtw_init_timer(&(pmlmepriv->scan_to_timer), padapter, rtw_scan_timeout_handler, padapter);
+
+#ifdef CONFIG_DFS_MASTER
+	rtw_init_timer(&(pmlmepriv->dfs_master_timer), padapter, rtw_dfs_master_timer_hdl, padapter);
+#endif
+
+#ifdef CONFIG_SET_SCAN_DENY_TIMER
+	rtw_init_timer(&(pmlmepriv->set_scan_deny_timer), padapter, rtw_set_scan_deny_timer_hdl, padapter);
+#endif
+
+#ifdef RTK_DMP_PLATFORM
+	_init_workitem(&(pmlmepriv->Linkup_workitem), Linkup_workitem_callback, padapter);
+	_init_workitem(&(pmlmepriv->Linkdown_workitem), Linkdown_workitem_callback, padapter);
+#endif
+}
+
 sint	_rtw_init_mlme_priv(_adapter *padapter)
 {
 	sint	i;
@@ -88,6 +104,7 @@ sint	_rtw_init_mlme_priv(_adapter *padapter)
 	rtw_clear_scan_deny(padapter);
 #ifdef CONFIG_ARP_KEEP_ALIVE
 	pmlmepriv->bGetGateway = 0;
+	pmlmepriv->GetGatewayTryCnt = 0;
 #endif
 
 #ifdef CONFIG_LAYER2_ROAMING
@@ -924,6 +941,11 @@ void rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target)
 	phead = get_list_head(queue);
 	plist = get_next(phead);
 
+#if 0
+	RTW_INFO("%s => ssid:%s , rssi:%ld , ss:%d\n",
+		__func__, target->Ssid.Ssid, target->Rssi, target->PhyInfo.SignalStrength);
+#endif
+
 #ifdef CONFIG_P2P
 	if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
 		feature = 1; /* p2p enable */
@@ -953,10 +975,13 @@ void rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target)
 		if (rtw_roam_flags(adapter)) {
 			/* TODO: don't  select netowrk in the same ess as oldest if it's new enough*/
 		}
-
+#ifdef CONFIG_RSSI_PRIORITY
+		if ((oldest == NULL) || (pnetwork->network.PhyInfo.SignalStrength < oldest->network.PhyInfo.SignalStrength))
+			oldest = pnetwork;
+#else
 		if (oldest == NULL || time_after(oldest->last_scanned, pnetwork->last_scanned))
 			oldest = pnetwork;
-
+#endif
 		plist = get_next(plist);
 
 	}
@@ -973,6 +998,14 @@ void rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target)
 			if (pnetwork == NULL) {
 				goto exit;
 			}
+#ifdef CONFIG_RSSI_PRIORITY
+		RTW_DBG("%s => ssid:%s ,bssid:"MAC_FMT"  will be deleted from scanned_queue (rssi:%ld , ss:%d)\n",
+			__func__, pnetwork->network.Ssid.Ssid, MAC_ARG(pnetwork->network.MacAddress), pnetwork->network.Rssi, pnetwork->network.PhyInfo.SignalStrength);
+#else
+		RTW_DBG("%s => ssid:%s ,bssid:"MAC_FMT" will be deleted from scanned_queue\n",
+			__func__, pnetwork->network.Ssid.Ssid, MAC_ARG(pnetwork->network.MacAddress));
+#endif
+
 #ifdef CONFIG_ANTENNA_DIVERSITY
 			rtw_hal_get_odm_var(adapter, HAL_ODM_ANTDIV_SELECT, &(target->PhyInfo.Optimum_antenna), NULL);
 #endif
@@ -1210,7 +1243,6 @@ exit:
 void rtw_surveydone_event_callback(_adapter	*adapter, u8 *pbuf)
 {
 	_irqL  irqL;
-	u8 timer_cancelled;
 	struct	mlme_priv	*pmlmepriv = &(adapter->mlmepriv);
 #ifdef CONFIG_RTW_80211R
 	struct mlme_ext_priv	*pmlmeext = &adapter->mlmeextpriv;
@@ -1238,7 +1270,7 @@ void rtw_surveydone_event_callback(_adapter	*adapter, u8 *pbuf)
 	_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY);
 	_exit_critical_bh(&pmlmepriv->lock, &irqL);
 
-	_cancel_timer(&pmlmepriv->scan_to_timer, &timer_cancelled);
+	_cancel_timer_ex(&pmlmepriv->scan_to_timer);
 
 	_enter_critical_bh(&pmlmepriv->lock, &irqL);
 
@@ -1360,8 +1392,9 @@ void rtw_surveydone_event_callback(_adapter	*adapter, u8 *pbuf)
 #endif /* CONFIG_IOCTL_CFG80211 */
 
 	rtw_indicate_scan_done(adapter, _FALSE);
-#ifdef CONFIG_CONCURRENT_MODE
-	rtw_mi_buddy_indicate_scan_done(adapter, _FALSE);/*scanning_via_buddy_intf*/
+
+#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_IOCTL_CFG80211)
+	rtw_cfg80211_indicate_scan_done_for_buddy(adapter, _FALSE);
 #endif
 
 }
@@ -1697,7 +1730,13 @@ static u32 _rtw_wait_scan_done(_adapter *adapter, u8 abort, u32 timeout_ms)
 
 void rtw_scan_wait_completed(_adapter *adapter)
 {
-	u32 scan_to = SCANNING_TIMEOUT;
+	u32 scan_to;
+#ifdef	CONFIG_CHNL_LOAD_MAGT
+	if (adapter->clm_flag == TRUE)
+		scan_to = CLM_SCANNING_TIMEOUT;
+	else
+#endif
+		scan_to = SCANNING_TIMEOUT;
 
 #ifdef CONFIG_SCAN_BACKOP
 	if (is_supported_5g(adapter->registrypriv.wireless_mode)
@@ -1929,7 +1968,6 @@ void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf)
 {
 	_irqL irqL, irqL2;
 	static u8 retry = 0;
-	u8 timer_cancelled;
 	struct sta_info *ptarget_sta = NULL, *pcur_sta = NULL;
 	struct	sta_priv *pstapriv = &adapter->stapriv;
 	struct	mlme_priv	*pmlmepriv = &(adapter->mlmepriv);
@@ -2040,7 +2078,7 @@ void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf)
 			}
 
 			/* s5. Cancle assoc_timer					 */
-			_cancel_timer(&pmlmepriv->assoc_timer, &timer_cancelled);
+			_cancel_timer_ex(&pmlmepriv->assoc_timer);
 
 
 		} else {
@@ -2473,7 +2511,7 @@ void rtw_sta_mstatus_report(_adapter *adapter)
 	struct wlan_network *tgt_network = &pmlmepriv->cur_network;
 	struct sta_info *psta = NULL;
 
-	if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) {
+	if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) && check_fwstate(pmlmepriv, WIFI_ASOC_STATE)) {
 		psta = rtw_get_stainfo(&adapter->stapriv, tgt_network->network.MacAddress);
 		if (psta)
 			rtw_sta_mstatus_disc_rpt(adapter, psta->mac_id);
@@ -2662,11 +2700,11 @@ void rtw_wmm_event_callback(PADAPTER padapter, u8 *pbuf)
 }
 
 /*
-* _rtw_join_timeout_handler - Timeout/faliure handler for CMD JoinBss
-* @adapter: pointer to _adapter structure
+* rtw_join_timeout_handler - Timeout/failure handler for CMD JoinBss
 */
-void _rtw_join_timeout_handler(_adapter *adapter)
+void rtw_join_timeout_handler(void *ctx)
 {
+	_adapter *adapter = (_adapter *)ctx;
 	_irqL irqL;
 	struct	mlme_priv *pmlmepriv = &adapter->mlmepriv;
 
@@ -2746,8 +2784,9 @@ void _rtw_join_timeout_handler(_adapter *adapter)
 * rtw_scan_timeout_handler - Timeout/Faliure handler for CMD SiteSurvey
 * @adapter: pointer to _adapter structure
 */
-void rtw_scan_timeout_handler(_adapter *adapter)
+void rtw_scan_timeout_handler(void *ctx)
 {
+	_adapter *adapter = (_adapter *)ctx;
 	_irqL irqL;
 	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
 	RTW_INFO(FUNC_ADPT_FMT" fw_state=%x\n", FUNC_ADPT_ARG(adapter), get_fwstate(pmlmepriv));
@@ -2763,8 +2802,9 @@ void rtw_scan_timeout_handler(_adapter *adapter)
 #endif /* CONFIG_IOCTL_CFG80211 */
 
 	rtw_indicate_scan_done(adapter, _TRUE);
-#ifdef CONFIG_CONCURRENT_MODE
-	rtw_mi_buddy_indicate_scan_done(adapter, _TRUE);/*scanning_via_buddy_intf */
+
+#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_IOCTL_CFG80211)
+	rtw_cfg80211_indicate_scan_done_for_buddy(adapter, _TRUE);
 #endif
 }
 
@@ -3011,16 +3051,26 @@ static void collect_traffic_statistics(_adapter *padapter)
 	#endif
 }
 
-void rtw_dynamic_check_timer_handlder(_adapter *adapter)
+void rtw_dynamic_check_timer_handlder(void *ctx)
 {
+	struct dvobj_priv *pdvobj = (struct dvobj_priv *)ctx;
+	_adapter *adapter = dvobj_get_primary_adapter(pdvobj);
+
+#if (MP_DRIVER == 1)
+	if (adapter->registrypriv.mp_mode == 1 && adapter->mppriv.mp_dm == 0) { /* for MP ODM dynamic Tx power tracking */
+		/* RTW_INFO("%s mp_dm =0 return\n", __func__); */
+		goto exit;
+	}
+#endif
+
 	if (!adapter)
-		return;
+		goto exit;
 
 	if (!rtw_is_hw_init_completed(adapter))
-		return;
+		goto exit;
 
 	if (RTW_CANNOT_RUN(adapter))
-		return;
+		goto exit;
 
 	collect_traffic_statistics(adapter);
 
@@ -3028,6 +3078,9 @@ void rtw_dynamic_check_timer_handlder(_adapter *adapter)
 
 	if (!is_drv_in_lps(adapter))
 		rtw_dynamic_chk_wk_cmd(adapter);
+
+exit:
+	_set_timer(&pdvobj->dynamic_chk_timer, 2000);
 }
 
 
@@ -3046,8 +3099,10 @@ inline void rtw_clear_scan_deny(_adapter *adapter)
 		RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter));
 }
 
-void rtw_set_scan_deny_timer_hdl(_adapter *adapter)
+void rtw_set_scan_deny_timer_hdl(void *ctx)
 {
+	_adapter *adapter = (_adapter *)ctx;
+
 	rtw_clear_scan_deny(adapter);
 }
 void rtw_set_scan_deny(_adapter *adapter, u32 ms)
@@ -3364,7 +3419,7 @@ candidate_exist:
 		} else
 #endif
 		{
-			rtw_disassoc_cmd(adapter, 0, _TRUE);
+			rtw_disassoc_cmd(adapter, 0, 0);
 			rtw_indicate_disconnect(adapter, 0, _FALSE);
 			rtw_free_assoc_resources(adapter, 0);
 		}
@@ -3962,11 +4017,16 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui
 	HT_CAP_AMPDU_DENSITY best_ampdu_density;
 	unsigned char *p, *pframe;
 	struct rtw_ieee80211_ht_cap ht_capie;
-	u8	cbw40_enable = 0, rf_type = 0, operation_bw = 0, rf_num = 0, rx_stbc_nss = 0;
+	u8	cbw40_enable = 0, rf_type = 0, operation_bw = 0, rf_num = 0, rx_stbc_nss = 0, rx_nss = 0;
 	struct registry_priv *pregistrypriv = &padapter->registrypriv;
 	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
 	struct ht_priv		*phtpriv = &pmlmepriv->htpriv;
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
+#ifdef CONFIG_80211AC_VHT
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct vht_priv	*pvhtpriv = &pmlmepriv->vhtpriv;
+#endif /* CONFIG_80211AC_VHT */
 
 	phtpriv->ht_option = _FALSE;
 
@@ -4058,28 +4118,28 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui
 
 	/* update default supported_mcs_set */
 	rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+	rx_nss = rtw_min(rf_type_to_rf_rx_cnt(rf_type), hal_spec->rx_nss_num);
 
-	switch (rf_type) {
-	case RF_1T1R:
+	switch (rx_nss) {
+	case 1:
 		set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_1R);
 		break;
-
-	case RF_2T2R:
-	case RF_1T2R:
-#ifdef CONFIG_DISABLE_MCS13TO15
+	case 2:
+		#ifdef CONFIG_DISABLE_MCS13TO15
 		if (((cbw40_enable == 1) && (operation_bw == CHANNEL_WIDTH_40)) && (pregistrypriv->wifi_spec != 1))
 			set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_2R_13TO15_OFF);
 		else
+		#endif
 			set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_2R);
-#else /* CONFIG_DISABLE_MCS13TO15 */
-		set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_2R);
-#endif /* CONFIG_DISABLE_MCS13TO15 */
 		break;
-	case RF_3T3R:
+	case 3:
 		set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_3R);
 		break;
+	case 4:
+		set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_4R);
+		break;
 	default:
-		RTW_INFO("[warning] rf_type %d is not expected\n", rf_type);
+		RTW_WARN("rf_type:%d or rx_nss:%u is not expected\n", rf_type, hal_spec->rx_nss_num);
 	}
 
 	{
@@ -4147,7 +4207,14 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui
 		SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(&ht_capie, 1);
 		/* Explicit Compressed Beamforming Feedback Capable */
 		SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(&ht_capie, 2);
+
 		rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMEE_CAP, (u8 *)&rf_num);
+#ifdef CONFIG_80211AC_VHT
+		/* IOT action suggested by Yu Chen 2017/3/3 */
+		if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_BROADCOM) &&
+			!GET_VHT_CAPABILITY_ELE_MU_BFER(&pvhtpriv->beamform_cap))
+			rf_num = (rf_num >= 2 ? 2 : rf_num);
+#endif
 		SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(&ht_capie, rf_num);
 	}
 #endif/*CONFIG_BEAMFORMING*/
@@ -4242,36 +4309,39 @@ void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len, u8 channel)
 	if ((cbw40_enable) &&
 	    (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & BIT(1)) &&
 	    (pmlmeinfo->HT_info.infos[0] & BIT(2))) {
+		struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
 		int i;
 		u8	rf_type = RF_1T1R;
+		u8 tx_nss = 0;
 
 		rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+		tx_nss = rtw_min(rf_type_to_rf_tx_cnt(rf_type), hal_spec->tx_nss_num);
 
 		/* update the MCS set */
 		for (i = 0; i < 16; i++)
 			pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= pmlmeext->default_supported_mcs_set[i];
 
 		/* update the MCS rates */
-		switch (rf_type) {
-		case RF_1T1R:
-		case RF_1T2R:
+		switch (tx_nss) {
+		case 1:
 			set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_1R);
 			break;
-		case RF_2T2R:
-#ifdef CONFIG_DISABLE_MCS13TO15
+		case 2:
+			#ifdef CONFIG_DISABLE_MCS13TO15
 			if (pmlmeext->cur_bwmode == CHANNEL_WIDTH_40 && pregistrypriv->wifi_spec != 1)
 				set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R_13TO15_OFF);
 			else
+			#endif
 				set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R);
-#else /* CONFIG_DISABLE_MCS13TO15 */
-			set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R);
-#endif /* CONFIG_DISABLE_MCS13TO15 */
 			break;
-		case RF_3T3R:
+		case 3:
 			set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_3R);
 			break;
+		case 4:
+			set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_4R);
+			break;
 		default:
-			RTW_INFO("[warning] rf_type %d is not expected\n", rf_type);
+			RTW_WARN("rf_type:%d or tx_nss_num:%u is not expected\n", rf_type, hal_spec->tx_nss_num);
 		}
 
 		/* switch to the 40M Hz mode accoring to the AP */
diff --git a/rtl8822BU/core/rtw_mlme_ext.c b/rtl8822BU/core/rtw_mlme_ext.c
index 108623b..f7bc092 100755..100644
--- a/rtl8822BU/core/rtw_mlme_ext.c
+++ b/rtl8822BU/core/rtw_mlme_ext.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_MLME_EXT_C_
 
 #include <drv_types.h>
@@ -145,166 +140,211 @@ static RT_CHANNEL_PLAN legacy_channel_plan[] = {
 };
 #endif
 
-static RT_CHANNEL_PLAN_2G RTW_ChannelPlan2G[] = {
-	/* 0, RTW_RD_2G_NULL */		{{}, 0},
-	/* 1, RTW_RD_2G_WORLD */	{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},
-	/* 2, RTW_RD_2G_ETSI1 */		{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},
-	/* 3, RTW_RD_2G_FCC1 */		{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11}, 11},
-	/* 4, RTW_RD_2G_MKK1 */		{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14},
-	/* 5, RTW_RD_2G_ETSI2 */		{{10, 11, 12, 13}, 4},
-	/* 6, RTW_RD_2G_GLOBAL */	{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14},
-	/* 7, RTW_RD_2G_MKK2 */		{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},
-	/* 8, RTW_RD_2G_FCC2 */		{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},
+static struct ch_list_t RTW_ChannelPlan2G[] = {
+	/* 0, RTW_RD_2G_NULL */		CH_LIST_ENT(0),
+	/* 1, RTW_RD_2G_WORLD */	CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13),
+	/* 2, RTW_RD_2G_ETSI1 */		CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13),
+	/* 3, RTW_RD_2G_FCC1 */		CH_LIST_ENT(11, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11),
+	/* 4, RTW_RD_2G_MKK1 */		CH_LIST_ENT(14, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14),
+	/* 5, RTW_RD_2G_ETSI2 */		CH_LIST_ENT(4, 10, 11, 12, 13),
+	/* 6, RTW_RD_2G_GLOBAL */	CH_LIST_ENT(14, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14),
+	/* 7, RTW_RD_2G_MKK2 */		CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13),
+	/* 8, RTW_RD_2G_FCC2 */		CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13),
+	/* 9, RTW_RD_2G_IC1 */		CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13),
 };
 
-static RT_CHANNEL_PLAN_5G RTW_ChannelPlan5G[] = {
-	/* 0, RTW_RD_5G_NULL */		{{}, 0},
-	/* 1, RTW_RD_5G_ETSI1 */		{{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 19},
-	/* 2, RTW_RD_5G_ETSI2 */		{{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 24},
-	/* 3, RTW_RD_5G_ETSI3 */		{{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 149, 153, 157, 161, 165}, 22},
-	/* 4, RTW_RD_5G_FCC1 */		{{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 24},
-	/* 5, RTW_RD_5G_FCC2 */		{{36, 40, 44, 48, 149, 153, 157, 161, 165}, 9},
-	/* 6, RTW_RD_5G_FCC3 */		{{36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165}, 13},
-	/* 7, RTW_RD_5G_FCC4 */		{{36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161}, 12},
-	/* 8, RTW_RD_5G_FCC5 */		{{149, 153, 157, 161, 165}, 5},
-	/* 9, RTW_RD_5G_FCC6 */		{{36, 40, 44, 48, 52, 56, 60, 64}, 8},
-	/* 10, RTW_RD_5G_FCC7 */	{{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165}, 21},
-	/* 11, RTW_RD_5G_KCC1 */	{{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161}, 19},
-	/* 12, RTW_RD_5G_MKK1 */	{{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 19},
-	/* 13, RTW_RD_5G_MKK2 */	{{36, 40, 44, 48, 52, 56, 60, 64}, 8},
-	/* 14, RTW_RD_5G_MKK3 */	{{100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 11},
-	/* 15, RTW_RD_5G_NCC1 */	{{56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165}, 16},
-	/* 16, RTW_RD_5G_NCC2 */	{{56, 60, 64, 149, 153, 157, 161, 165}, 8},
-	/* 17, RTW_RD_5G_NCC3 */	{{149, 153, 157, 161, 165}, 5},
-	/* 18, RTW_RD_5G_ETSI4 */	{{36, 40, 44, 48}, 4},
-	/* 19, RTW_RD_5G_ETSI5 */	{{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165}, 21},
-	/* 20, RTW_RD_5G_FCC8 */	{{149, 153, 157, 161}, 4},
-	/* 21, RTW_RD_5G_ETSI6 */	{{36, 40, 44, 48, 52, 56, 60, 64}, 8},
-	/* 22, RTW_RD_5G_ETSI7 */	{{36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165}, 13},
-	/* 23, RTW_RD_5G_ETSI8 */	{{36, 40, 44, 48, 149, 153, 157, 161, 165}, 9},
-	/* 24, RTW_RD_5G_ETSI9 */	{{100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 11},
-	/* 25, RTW_RD_5G_ETSI10 */	{{149, 153, 157, 161, 165}, 5},
-	/* 26, RTW_RD_5G_ETSI11 */	{{36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140, 149, 153, 157, 161, 165}, 16},
-	/* 27, RTW_RD_5G_NCC4 */	{{52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165}, 17},
-	/* 28, RTW_RD_5G_ETSI12 */	{{149, 153, 157, 161}, 4},
-	/* 29, RTW_RD_5G_FCC9 */	{{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165}, 21},
-	/* 30, RTW_RD_5G_ETSI13 */	{{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140}, 16},
-	/* 31, RTW_RD_5G_FCC10 */	{{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161}, 20},
-	/* 32, RTW_RD_5G_MKK4 */	{{36, 40, 44, 48}, 4},
-	/* 33, RTW_RD_5G_ETSI14 */	{{36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140}, 11},
+#ifdef CONFIG_IEEE80211_BAND_5GHZ
+static struct ch_list_t RTW_ChannelPlan5G[] = {
+	/* 0, RTW_RD_5G_NULL */		CH_LIST_ENT(0),
+	/* 1, RTW_RD_5G_ETSI1 */		CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140),
+	/* 2, RTW_RD_5G_ETSI2 */		CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),
+	/* 3, RTW_RD_5G_ETSI3 */		CH_LIST_ENT(22, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 149, 153, 157, 161, 165),
+	/* 4, RTW_RD_5G_FCC1 */		CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),
+	/* 5, RTW_RD_5G_FCC2 */		CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165),
+	/* 6, RTW_RD_5G_FCC3 */		CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165),
+	/* 7, RTW_RD_5G_FCC4 */		CH_LIST_ENT(12, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161),
+	/* 8, RTW_RD_5G_FCC5 */		CH_LIST_ENT(5, 149, 153, 157, 161, 165),
+	/* 9, RTW_RD_5G_FCC6 */		CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64),
+	/* 10, RTW_RD_5G_FCC7 */	CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),
+	/* 11, RTW_RD_5G_IC1 */		CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),
+	/* 12, RTW_RD_5G_KCC1 */	CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161),
+	/* 13, RTW_RD_5G_MKK1 */	CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140),
+	/* 14, RTW_RD_5G_MKK2 */	CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64),
+	/* 15, RTW_RD_5G_MKK3 */	CH_LIST_ENT(11, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140),
+	/* 16, RTW_RD_5G_NCC1 */	CH_LIST_ENT(16, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),
+	/* 17, RTW_RD_5G_NCC2 */	CH_LIST_ENT(8, 56, 60, 64, 149, 153, 157, 161, 165),
+	/* 18, RTW_RD_5G_NCC3 */	CH_LIST_ENT(5, 149, 153, 157, 161, 165),
+	/* 19, RTW_RD_5G_ETSI4 */	CH_LIST_ENT(4, 36, 40, 44, 48),
+	/* 20, RTW_RD_5G_ETSI5 */	CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),
+	/* 21, RTW_RD_5G_FCC8 */	CH_LIST_ENT(4, 149, 153, 157, 161),
+	/* 22, RTW_RD_5G_ETSI6 */	CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64),
+	/* 23, RTW_RD_5G_ETSI7 */	CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165),
+	/* 24, RTW_RD_5G_ETSI8 */	CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165),
+	/* 25, RTW_RD_5G_ETSI9 */	CH_LIST_ENT(11, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140),
+	/* 26, RTW_RD_5G_ETSI10 */	CH_LIST_ENT(5, 149, 153, 157, 161, 165),
+	/* 27, RTW_RD_5G_ETSI11 */	CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140, 149, 153, 157, 161, 165),
+	/* 28, RTW_RD_5G_NCC4 */	CH_LIST_ENT(17, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),
+	/* 29, RTW_RD_5G_ETSI12 */	CH_LIST_ENT(4, 149, 153, 157, 161),
+	/* 30, RTW_RD_5G_FCC9 */	CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),
+	/* 31, RTW_RD_5G_ETSI13 */	CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140),
+	/* 32, RTW_RD_5G_FCC10 */	CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161),
+	/* 33, RTW_RD_5G_MKK4 */	CH_LIST_ENT(4, 36, 40, 44, 48),
+	/* 34, RTW_RD_5G_ETSI14 */	CH_LIST_ENT(11, 36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140),
+	/* 35, RTW_RD_5G_FCC11 */	CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165),
+	/* 36, RTW_RD_5G_ETSI15 */	CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 149, 153, 157, 161, 165),
+	/* 37, RTW_RD_5G_MKK5 */	CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),
+	/* 38, RTW_RD_5G_ETSI16 */	CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),
+	/* 39, RTW_RD_5G_ETSI17 */	CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),
+	/* 40, RTW_RD_5G_FCC12*/	CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),
+	/* 41, RTW_RD_5G_FCC13 */	CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),
+	/* 42, RTW_RD_5G_FCC14 */	CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),
+	/* 43, RTW_RD_5G_FCC15 */	CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165),
+	/* 44, RTW_RD_5G_FCC16 */	CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165),
+	/* 45, RTW_RD_5G_ETSI18 */	CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165),
+	/* 46, RTW_RD_5G_ETSI19 */	CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165),
+	/* 47, RTW_RD_5G_FCC17 */	CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140),
+	/* 48, RTW_RD_5G_ETSI20 */	CH_LIST_ENT(9, 52, 56, 60, 64, 149, 153, 157, 161, 165),
+	/* 49, RTW_RD_5G_IC2 */		CH_LIST_ENT(22, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 144, 149, 153, 157, 161, 165),
+	/* 50, RTW_RD_5G_ETSI21 */	CH_LIST_ENT(13, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165),
+	/* 51, RTW_RD_5G_FCC18 */	CH_LIST_ENT(8, 100, 104, 108, 112, 116, 132, 136, 140),
+	/* 52, RTW_RD_5G_WORLD */	CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165),
 
 	/* === Below are driver defined for legacy channel plan compatible, NO static index assigned ==== */
-	/* RTW_RD_5G_OLD_FCC1 */	{{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 20},
-	/* RTW_RD_5G_OLD_NCC1 */	{{56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 15},
-	/* RTW_RD_5G_OLD_KCC1 */	{{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165}, 20},
+	/* RTW_RD_5G_OLD_FCC1 */	CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165),
+	/* RTW_RD_5G_OLD_NCC1 */	CH_LIST_ENT(15, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165),
+	/* RTW_RD_5G_OLD_KCC1 */	CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165),
 };
+#endif /* CONFIG_IEEE80211_BAND_5GHZ */
 
 static RT_CHANNEL_PLAN_MAP	RTW_ChannelPlanMap[] = {
 	/* ===== 0x00 ~ 0x1F, legacy channel plan ===== */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_KCC1,		TXPWR_LMT_FCC},		/* 0x00, RTW_CHPLAN_FCC */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_OLD_FCC1,	TXPWR_LMT_FCC},		/* 0x01, RTW_CHPLAN_IC */
-	{RTW_RD_2G_ETSI1,	RTW_RD_5G_ETSI1,	TXPWR_LMT_ETSI},	/* 0x02, RTW_CHPLAN_ETSI */
-	{RTW_RD_2G_ETSI1,	RTW_RD_5G_NULL,		TXPWR_LMT_ETSI},	/* 0x03, RTW_CHPLAN_SPAIN */
-	{RTW_RD_2G_ETSI1,	RTW_RD_5G_NULL,		TXPWR_LMT_ETSI},	/* 0x04, RTW_CHPLAN_FRANCE */
-	{RTW_RD_2G_MKK1,	RTW_RD_5G_NULL,		TXPWR_LMT_MKK},		/* 0x05, RTW_CHPLAN_MKK */
-	{RTW_RD_2G_MKK1,	RTW_RD_5G_NULL,		TXPWR_LMT_MKK},		/* 0x06, RTW_CHPLAN_MKK1 */
-	{RTW_RD_2G_ETSI1,	RTW_RD_5G_FCC6,		TXPWR_LMT_ETSI},	/* 0x07, RTW_CHPLAN_ISRAEL */
-	{RTW_RD_2G_MKK1,	RTW_RD_5G_FCC6,		TXPWR_LMT_MKK},		/* 0x08, RTW_CHPLAN_TELEC */
-	{RTW_RD_2G_MKK1,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x09, RTW_CHPLAN_GLOBAL_DOAMIN */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x0A, RTW_CHPLAN_WORLD_WIDE_13 */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_OLD_NCC1,	TXPWR_LMT_FCC},		/* 0x0B, RTW_CHPLAN_TAIWAN */
-	{RTW_RD_2G_ETSI1,	RTW_RD_5G_FCC5,		TXPWR_LMT_ETSI},	/* 0x0C, RTW_CHPLAN_CHINA */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_FCC3,		TXPWR_LMT_WW},		/* 0x0D, RTW_CHPLAN_SINGAPORE_INDIA_MEXICO */ /* ETSI:Singapore, India. FCC:Mexico => WW */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_OLD_KCC1,	TXPWR_LMT_ETSI},	/* 0x0E, RTW_CHPLAN_KOREA */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_FCC6,		TXPWR_LMT_ETSI},	/* 0x0F, RTW_CHPLAN_TURKEY */
-	{RTW_RD_2G_ETSI1,	RTW_RD_5G_ETSI1,	TXPWR_LMT_MKK},		/* 0x10, RTW_CHPLAN_JAPAN */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_FCC2,		TXPWR_LMT_FCC},		/* 0x11, RTW_CHPLAN_FCC_NO_DFS */
-	{RTW_RD_2G_ETSI1,	RTW_RD_5G_FCC7,		TXPWR_LMT_MKK},		/* 0x12, RTW_CHPLAN_JAPAN_NO_DFS */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_FCC1,		TXPWR_LMT_WW},		/* 0x13, RTW_CHPLAN_WORLD_WIDE_5G */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_NCC2,		TXPWR_LMT_FCC},		/* 0x14, RTW_CHPLAN_TAIWAN_NO_DFS */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_FCC7,		TXPWR_LMT_ETSI},	/* 0x15, RTW_CHPLAN_ETSI_NO_DFS */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_NCC1,		TXPWR_LMT_ETSI},	/* 0x16, RTW_CHPLAN_KOREA_NO_DFS */
-	{RTW_RD_2G_MKK1,	RTW_RD_5G_FCC7,		TXPWR_LMT_MKK},		/* 0x17, RTW_CHPLAN_JAPAN_NO_DFS */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_FCC5,		TXPWR_LMT_ETSI},	/* 0x18, RTW_CHPLAN_PAKISTAN_NO_DFS */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_FCC5,		TXPWR_LMT_FCC},		/* 0x19, RTW_CHPLAN_TAIWAN2_NO_DFS */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x1A, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x1B, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x1C, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x1D, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x1E, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_FCC1,		TXPWR_LMT_WW},		/* 0x1F, RTW_CHPLAN_WORLD_WIDE_ONLY_5G */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_KCC1,		TXPWR_LMT_FCC),		/* 0x00, RTW_CHPLAN_FCC */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_OLD_FCC1,	TXPWR_LMT_FCC),		/* 0x01, RTW_CHPLAN_IC */
+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_ETSI1,	TXPWR_LMT_ETSI),	/* 0x02, RTW_CHPLAN_ETSI */
+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_NULL,		TXPWR_LMT_ETSI),	/* 0x03, RTW_CHPLAN_SPAIN */
+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_NULL,		TXPWR_LMT_ETSI),	/* 0x04, RTW_CHPLAN_FRANCE */
+	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_NULL,		TXPWR_LMT_MKK),		/* 0x05, RTW_CHPLAN_MKK */
+	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_NULL,		TXPWR_LMT_MKK),		/* 0x06, RTW_CHPLAN_MKK1 */
+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_FCC6,		TXPWR_LMT_ETSI),	/* 0x07, RTW_CHPLAN_ISRAEL */
+	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_FCC6,		TXPWR_LMT_MKK),		/* 0x08, RTW_CHPLAN_TELEC */
+	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x09, RTW_CHPLAN_GLOBAL_DOAMIN */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x0A, RTW_CHPLAN_WORLD_WIDE_13 */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_OLD_NCC1,	TXPWR_LMT_FCC),		/* 0x0B, RTW_CHPLAN_TAIWAN */
+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_FCC5,		TXPWR_LMT_ETSI),	/* 0x0C, RTW_CHPLAN_CHINA */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC3,		TXPWR_LMT_WW),		/* 0x0D, RTW_CHPLAN_SINGAPORE_INDIA_MEXICO */ /* ETSI:Singapore, India. FCC:Mexico => WW */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_OLD_KCC1,	TXPWR_LMT_ETSI),	/* 0x0E, RTW_CHPLAN_KOREA */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC6,		TXPWR_LMT_ETSI),	/* 0x0F, RTW_CHPLAN_TURKEY */
+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_ETSI1,	TXPWR_LMT_MKK),		/* 0x10, RTW_CHPLAN_JAPAN */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC2,		TXPWR_LMT_FCC),		/* 0x11, RTW_CHPLAN_FCC_NO_DFS */
+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_FCC7,		TXPWR_LMT_MKK),		/* 0x12, RTW_CHPLAN_JAPAN_NO_DFS */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC1,		TXPWR_LMT_WW),		/* 0x13, RTW_CHPLAN_WORLD_WIDE_5G */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_NCC2,		TXPWR_LMT_FCC),		/* 0x14, RTW_CHPLAN_TAIWAN_NO_DFS */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC7,		TXPWR_LMT_ETSI),	/* 0x15, RTW_CHPLAN_ETSI_NO_DFS */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_NCC1,		TXPWR_LMT_ETSI),	/* 0x16, RTW_CHPLAN_KOREA_NO_DFS */
+	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_FCC7,		TXPWR_LMT_MKK),		/* 0x17, RTW_CHPLAN_JAPAN_NO_DFS */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_FCC5,		TXPWR_LMT_ETSI),	/* 0x18, RTW_CHPLAN_PAKISTAN_NO_DFS */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC5,		TXPWR_LMT_FCC),		/* 0x19, RTW_CHPLAN_TAIWAN2_NO_DFS */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x1A, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x1B, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x1C, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x1D, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x1E, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_FCC1,		TXPWR_LMT_WW),		/* 0x1F, RTW_CHPLAN_WORLD_WIDE_ONLY_5G */
 
 	/* ===== 0x20 ~ 0x7F, new channel plan ===== */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x20, RTW_CHPLAN_WORLD_NULL */
-	{RTW_RD_2G_ETSI1,	RTW_RD_5G_NULL,		TXPWR_LMT_ETSI},	/* 0x21, RTW_CHPLAN_ETSI1_NULL */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_NULL,		TXPWR_LMT_FCC},		/* 0x22, RTW_CHPLAN_FCC1_NULL */
-	{RTW_RD_2G_MKK1,	RTW_RD_5G_NULL,		TXPWR_LMT_MKK},		/* 0x23, RTW_CHPLAN_MKK1_NULL */
-	{RTW_RD_2G_ETSI2,	RTW_RD_5G_NULL,		TXPWR_LMT_ETSI},	/* 0x24, RTW_CHPLAN_ETSI2_NULL */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_FCC1,		TXPWR_LMT_FCC},		/* 0x25, RTW_CHPLAN_FCC1_FCC1 */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_ETSI1,	TXPWR_LMT_ETSI},	/* 0x26, RTW_CHPLAN_WORLD_ETSI1 */
-	{RTW_RD_2G_MKK1,	RTW_RD_5G_MKK1,		TXPWR_LMT_MKK},		/* 0x27, RTW_CHPLAN_MKK1_MKK1 */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_KCC1,		TXPWR_LMT_ETSI},	/* 0x28, RTW_CHPLAN_WORLD_KCC1 */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_FCC2,		TXPWR_LMT_FCC},		/* 0x29, RTW_CHPLAN_WORLD_FCC2 */
-	{RTW_RD_2G_FCC2,	RTW_RD_5G_NULL,		TXPWR_LMT_FCC},		/* 0x2A, RTW_CHPLAN_FCC2_NULL */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x2B, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x2C, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x2D, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x2E, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x2F, */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_FCC3,		TXPWR_LMT_FCC},		/* 0x30, RTW_CHPLAN_WORLD_FCC3 */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_FCC4,		TXPWR_LMT_FCC},		/* 0x31, RTW_CHPLAN_WORLD_FCC4 */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_FCC5,		TXPWR_LMT_FCC},		/* 0x32, RTW_CHPLAN_WORLD_FCC5 */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_FCC6,		TXPWR_LMT_FCC},		/* 0x33, RTW_CHPLAN_WORLD_FCC6 */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_FCC7,		TXPWR_LMT_FCC},		/* 0x34, RTW_CHPLAN_FCC1_FCC7 */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_ETSI2,	TXPWR_LMT_ETSI},	/* 0x35, RTW_CHPLAN_WORLD_ETSI2 */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_ETSI3,	TXPWR_LMT_ETSI},	/* 0x36, RTW_CHPLAN_WORLD_ETSI3 */
-	{RTW_RD_2G_MKK1,	RTW_RD_5G_MKK2,		TXPWR_LMT_MKK},		/* 0x37, RTW_CHPLAN_MKK1_MKK2 */
-	{RTW_RD_2G_MKK1,	RTW_RD_5G_MKK3,		TXPWR_LMT_MKK},		/* 0x38, RTW_CHPLAN_MKK1_MKK3 */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_NCC1,		TXPWR_LMT_FCC},		/* 0x39, RTW_CHPLAN_FCC1_NCC1 */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x3A, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x3B, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x3C, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x3D, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x3E, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x3F, */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_NCC2,		TXPWR_LMT_FCC},		/* 0x40, RTW_CHPLAN_FCC1_NCC2 */
-	{RTW_RD_2G_GLOBAL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x41, RTW_CHPLAN_GLOBAL_NULL */
-	{RTW_RD_2G_ETSI1,	RTW_RD_5G_ETSI4,	TXPWR_LMT_ETSI},	/* 0x42, RTW_CHPLAN_ETSI1_ETSI4 */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_FCC2,		TXPWR_LMT_FCC},		/* 0x43, RTW_CHPLAN_FCC1_FCC2 */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_NCC3,		TXPWR_LMT_FCC},		/* 0x44, RTW_CHPLAN_FCC1_NCC3 */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_ETSI5,	TXPWR_LMT_ETSI},	/* 0x45, RTW_CHPLAN_WORLD_ETSI5 */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_FCC8,		TXPWR_LMT_FCC},		/* 0x46, RTW_CHPLAN_FCC1_FCC8 */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_ETSI6,	TXPWR_LMT_ETSI},	/* 0x47, RTW_CHPLAN_WORLD_ETSI6 */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_ETSI7,	TXPWR_LMT_ETSI},	/* 0x48, RTW_CHPLAN_WORLD_ETSI7 */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_ETSI8,	TXPWR_LMT_ETSI},	/* 0x49, RTW_CHPLAN_WORLD_ETSI8 */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x4A, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x4B, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x4C, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x4D, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x4E, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x4F, */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_ETSI9,	TXPWR_LMT_ETSI},	/* 0x50, RTW_CHPLAN_WORLD_ETSI9 */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_ETSI10,	TXPWR_LMT_ETSI},	/* 0x51, RTW_CHPLAN_WORLD_ETSI10 */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_ETSI11,	TXPWR_LMT_ETSI},	/* 0x52, RTW_CHPLAN_WORLD_ETSI11 */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_NCC4,		TXPWR_LMT_FCC},		/* 0x53, RTW_CHPLAN_FCC1_NCC4 */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_ETSI12,	TXPWR_LMT_ETSI},	/* 0x54, RTW_CHPLAN_WORLD_ETSI12 */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_FCC9,		TXPWR_LMT_FCC},		/* 0x55, RTW_CHPLAN_FCC1_FCC9 */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_ETSI13,	TXPWR_LMT_ETSI},	/* 0x56, RTW_CHPLAN_WORLD_ETSI13 */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_FCC10,	TXPWR_LMT_FCC},		/* 0x57, RTW_CHPLAN_FCC1_FCC10 */
-	{RTW_RD_2G_MKK2,	RTW_RD_5G_MKK4,		TXPWR_LMT_MKK},		/* 0x58, RTW_CHPLAN_MKK2_MKK4 */
-	{RTW_RD_2G_WORLD,	RTW_RD_5G_ETSI14,	TXPWR_LMT_ETSI},	/* 0x59, RTW_CHPLAN_WORLD_ETSI14 */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x5A, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x5B, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x5C, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x5D, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x5E, */
-	{RTW_RD_2G_NULL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW},		/* 0x5F, */
-	{RTW_RD_2G_FCC1,	RTW_RD_5G_FCC5,		TXPWR_LMT_FCC},		/* 0x60, RTW_CHPLAN_FCC1_FCC5 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x20, RTW_CHPLAN_WORLD_NULL */
+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_NULL,		TXPWR_LMT_ETSI),	/* 0x21, RTW_CHPLAN_ETSI1_NULL */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_NULL,		TXPWR_LMT_FCC),		/* 0x22, RTW_CHPLAN_FCC1_NULL */
+	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_NULL,		TXPWR_LMT_MKK),		/* 0x23, RTW_CHPLAN_MKK1_NULL */
+	CHPLAN_ENT(RTW_RD_2G_ETSI2,		RTW_RD_5G_NULL,		TXPWR_LMT_ETSI),	/* 0x24, RTW_CHPLAN_ETSI2_NULL */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC1,		TXPWR_LMT_FCC),		/* 0x25, RTW_CHPLAN_FCC1_FCC1 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI1,	TXPWR_LMT_ETSI),	/* 0x26, RTW_CHPLAN_WORLD_ETSI1 */
+	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_MKK1,		TXPWR_LMT_MKK),		/* 0x27, RTW_CHPLAN_MKK1_MKK1 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_KCC1,		TXPWR_LMT_KCC),		/* 0x28, RTW_CHPLAN_WORLD_KCC1 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC2,		TXPWR_LMT_FCC),		/* 0x29, RTW_CHPLAN_WORLD_FCC2 */
+	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_NULL,		TXPWR_LMT_FCC),		/* 0x2A, RTW_CHPLAN_FCC2_NULL */
+	CHPLAN_ENT(RTW_RD_2G_IC1,		RTW_RD_5G_IC2,		TXPWR_LMT_IC),		/* 0x2B, RTW_CHPLAN_IC1_IC2 */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x2C, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x2D, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x2E, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x2F, */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC3,		TXPWR_LMT_FCC),		/* 0x30, RTW_CHPLAN_WORLD_FCC3 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC4,		TXPWR_LMT_FCC),		/* 0x31, RTW_CHPLAN_WORLD_FCC4 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC5,		TXPWR_LMT_FCC),		/* 0x32, RTW_CHPLAN_WORLD_FCC5 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC6,		TXPWR_LMT_FCC),		/* 0x33, RTW_CHPLAN_WORLD_FCC6 */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC7,		TXPWR_LMT_FCC),		/* 0x34, RTW_CHPLAN_FCC1_FCC7 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI2,	TXPWR_LMT_ETSI),	/* 0x35, RTW_CHPLAN_WORLD_ETSI2 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI3,	TXPWR_LMT_ETSI),	/* 0x36, RTW_CHPLAN_WORLD_ETSI3 */
+	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_MKK2,		TXPWR_LMT_MKK),		/* 0x37, RTW_CHPLAN_MKK1_MKK2 */
+	CHPLAN_ENT(RTW_RD_2G_MKK1,		RTW_RD_5G_MKK3,		TXPWR_LMT_MKK),		/* 0x38, RTW_CHPLAN_MKK1_MKK3 */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_NCC1,		TXPWR_LMT_FCC),		/* 0x39, RTW_CHPLAN_FCC1_NCC1 */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x3A, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x3B, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x3C, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x3D, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x3E, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x3F, */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_NCC2,		TXPWR_LMT_FCC),		/* 0x40, RTW_CHPLAN_FCC1_NCC2 */
+	CHPLAN_ENT(RTW_RD_2G_GLOBAL,	RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x41, RTW_CHPLAN_GLOBAL_NULL */
+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_ETSI4,	TXPWR_LMT_ETSI),	/* 0x42, RTW_CHPLAN_ETSI1_ETSI4 */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC2,		TXPWR_LMT_FCC),		/* 0x43, RTW_CHPLAN_FCC1_FCC2 */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_NCC3,		TXPWR_LMT_FCC),		/* 0x44, RTW_CHPLAN_FCC1_NCC3 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI5,	TXPWR_LMT_ETSI),	/* 0x45, RTW_CHPLAN_WORLD_ETSI5 */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC8,		TXPWR_LMT_FCC),		/* 0x46, RTW_CHPLAN_FCC1_FCC8 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI6,	TXPWR_LMT_ETSI),	/* 0x47, RTW_CHPLAN_WORLD_ETSI6 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI7,	TXPWR_LMT_ETSI),	/* 0x48, RTW_CHPLAN_WORLD_ETSI7 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI8,	TXPWR_LMT_ETSI),	/* 0x49, RTW_CHPLAN_WORLD_ETSI8 */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x4A, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x4B, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x4C, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x4D, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x4E, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x4F, */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI9,	TXPWR_LMT_ETSI),	/* 0x50, RTW_CHPLAN_WORLD_ETSI9 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI10,	TXPWR_LMT_ETSI),	/* 0x51, RTW_CHPLAN_WORLD_ETSI10 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI11,	TXPWR_LMT_ETSI),	/* 0x52, RTW_CHPLAN_WORLD_ETSI11 */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_NCC4,		TXPWR_LMT_FCC),		/* 0x53, RTW_CHPLAN_FCC1_NCC4 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI12,	TXPWR_LMT_ETSI),	/* 0x54, RTW_CHPLAN_WORLD_ETSI12 */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC9,		TXPWR_LMT_FCC),		/* 0x55, RTW_CHPLAN_FCC1_FCC9 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI13,	TXPWR_LMT_ETSI),	/* 0x56, RTW_CHPLAN_WORLD_ETSI13 */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC10,	TXPWR_LMT_FCC),		/* 0x57, RTW_CHPLAN_FCC1_FCC10 */
+	CHPLAN_ENT(RTW_RD_2G_MKK2,		RTW_RD_5G_MKK4,		TXPWR_LMT_MKK),		/* 0x58, RTW_CHPLAN_MKK2_MKK4 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI14,	TXPWR_LMT_ETSI),	/* 0x59, RTW_CHPLAN_WORLD_ETSI14 */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x5A, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x5B, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x5C, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x5D, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x5E, */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_NULL,		TXPWR_LMT_WW),		/* 0x5F, */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC5,		TXPWR_LMT_FCC),		/* 0x60, RTW_CHPLAN_FCC1_FCC5 */
+	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC7,		TXPWR_LMT_FCC),		/* 0x61, RTW_CHPLAN_FCC2_FCC7 */
+	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC1,		TXPWR_LMT_FCC),		/* 0x62, RTW_CHPLAN_FCC2_FCC1 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI15,	TXPWR_LMT_ETSI),	/* 0x63, RTW_CHPLAN_WORLD_ETSI15 */
+	CHPLAN_ENT(RTW_RD_2G_MKK2,		RTW_RD_5G_MKK5,		TXPWR_LMT_MKK),		/* 0x64, RTW_CHPLAN_MKK2_MKK5 */
+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_ETSI16,	TXPWR_LMT_ETSI),	/* 0x65, RTW_CHPLAN_ETSI1_ETSI16 */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC14,	TXPWR_LMT_FCC),		/* 0x66, RTW_CHPLAN_FCC1_FCC14 */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC12,	TXPWR_LMT_FCC),		/* 0x67, RTW_CHPLAN_FCC1_FCC12 */
+	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC14,	TXPWR_LMT_FCC),		/* 0x68, RTW_CHPLAN_FCC2_FCC14 */
+	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC12,	TXPWR_LMT_FCC),		/* 0x69, RTW_CHPLAN_FCC2_FCC12 */
+	CHPLAN_ENT(RTW_RD_2G_ETSI1,		RTW_RD_5G_ETSI17,	TXPWR_LMT_ETSI),	/* 0x6A, RTW_CHPLAN_ETSI1_ETSI17 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC16,	TXPWR_LMT_FCC),		/* 0x6B, RTW_CHPLAN_WORLD_FCC16 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC13,	TXPWR_LMT_FCC),		/* 0x6C, RTW_CHPLAN_WORLD_FCC13 */
+	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC15,	TXPWR_LMT_FCC),		/* 0x6D, RTW_CHPLAN_FCC2_FCC15 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC12,	TXPWR_LMT_FCC),		/* 0x6E, RTW_CHPLAN_WORLD_FCC12 */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_ETSI8,	TXPWR_LMT_ETSI),	/* 0x6F, RTW_CHPLAN_NULL_ETSI8 */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_ETSI18,	TXPWR_LMT_ETSI),	/* 0x70, RTW_CHPLAN_NULL_ETSI18 */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_ETSI17,	TXPWR_LMT_ETSI),	/* 0x71, RTW_CHPLAN_NULL_ETSI17 */
+	CHPLAN_ENT(RTW_RD_2G_NULL,		RTW_RD_5G_ETSI19,	TXPWR_LMT_ETSI),	/* 0x72, RTW_CHPLAN_NULL_ETSI19 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC7,		TXPWR_LMT_FCC),		/* 0x73, RTW_CHPLAN_WORLD_FCC7 */
+	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC17,	TXPWR_LMT_FCC),		/* 0x74, RTW_CHPLAN_FCC2_FCC17 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI20,	TXPWR_LMT_ETSI),	/* 0x75, RTW_CHPLAN_WORLD_ETSI20 */
+	CHPLAN_ENT(RTW_RD_2G_FCC2,		RTW_RD_5G_FCC11,	TXPWR_LMT_FCC),		/* 0x76, RTW_CHPLAN_FCC2_FCC11 */
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_ETSI21,	TXPWR_LMT_ETSI),	/* 0x77, RTW_CHPLAN_WORLD_ETSI21 */
+	CHPLAN_ENT(RTW_RD_2G_FCC1,		RTW_RD_5G_FCC18,	TXPWR_LMT_FCC),		/* 0x78, RTW_CHPLAN_FCC1_FCC18 */
 };
 
-static RT_CHANNEL_PLAN_MAP RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE = {
-	RTW_RD_2G_WORLD,	RTW_RD_5G_FCC1,		TXPWR_LMT_FCC		/* 0x7F, Realtek Define */
-};
+static RT_CHANNEL_PLAN_MAP RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE =
+	CHPLAN_ENT(RTW_RD_2G_WORLD,		RTW_RD_5G_FCC1,		TXPWR_LMT_FCC);		/* 0x7F, Realtek Define */
 
 bool rtw_chplan_is_empty(u8 id)
 {
@@ -316,17 +356,351 @@ bool rtw_chplan_is_empty(u8 id)
 		chplan_map = &RTW_ChannelPlanMap[id];
 
 	if (chplan_map->Index2G == RTW_RD_2G_NULL
-		&& chplan_map->Index5G == RTW_RD_5G_NULL)
+		#ifdef CONFIG_IEEE80211_BAND_5GHZ
+		&& chplan_map->Index5G == RTW_RD_5G_NULL
+		#endif
+	)
 		return _TRUE;
 
 	return _FALSE;
 }
 
+bool rtw_regsty_is_excl_chs(struct registry_priv *regsty, u8 ch)
+{
+	int i;
+
+	for (i = 0; i < MAX_CHANNEL_NUM; i++) {
+		if (regsty->excl_chs[i] == 0)
+			break;
+		if (regsty->excl_chs[i] == ch)
+			return _TRUE;
+	}
+	return _FALSE;
+}
+
+inline u8 rtw_rd_5g_band1_passive(u8 rtw_rd_5g)
+{
+	u8 passive = 0;
+
+	switch (rtw_rd_5g) {
+	case RTW_RD_5G_FCC13:
+	case RTW_RD_5G_FCC16:
+	case RTW_RD_5G_ETSI18:
+	case RTW_RD_5G_ETSI19:
+	case RTW_RD_5G_WORLD:
+		passive = 1;
+	};
+
+	return passive;
+}
+
+inline u8 rtw_rd_5g_band4_passive(u8 rtw_rd_5g)
+{
+	u8 passive = 0;
+
+	switch (rtw_rd_5g) {
+	case RTW_RD_5G_MKK5:
+	case RTW_RD_5G_ETSI16:
+	case RTW_RD_5G_ETSI18:
+	case RTW_RD_5G_ETSI19:
+	case RTW_RD_5G_WORLD:
+		passive = 1;
+	};
+
+	return passive;
+}
+
+static void init_channel_list(_adapter *padapter, RT_CHANNEL_INFO *channel_set
+	, struct p2p_channels *channel_list)
+{
+	struct registry_priv *regsty = adapter_to_regsty(padapter);
+
+	struct p2p_oper_class_map op_class[] = {
+		{ IEEE80211G,  81,   1,  13,  1, BW20 },
+		{ IEEE80211G,  82,  14,  14,  1, BW20 },
+#if 0 /* Do not enable HT40 on 2 GHz */
+		{ IEEE80211G,  83,   1,   9,  1, BW40PLUS },
+		{ IEEE80211G,  84,   5,  13,  1, BW40MINUS },
+#endif
+		{ IEEE80211A, 115,  36,  48,  4, BW20 },
+		{ IEEE80211A, 116,  36,  44,  8, BW40PLUS },
+		{ IEEE80211A, 117,  40,  48,  8, BW40MINUS },
+		{ IEEE80211A, 124, 149, 161,  4, BW20 },
+		{ IEEE80211A, 125, 149, 169,  4, BW20 },
+		{ IEEE80211A, 126, 149, 157,  8, BW40PLUS },
+		{ IEEE80211A, 127, 153, 161,  8, BW40MINUS },
+		{ -1, 0, 0, 0, 0, BW20 }
+	};
+
+	int cla, op;
+
+	cla = 0;
+
+	for (op = 0; op_class[op].op_class; op++) {
+		u8 ch;
+		struct p2p_oper_class_map *o = &op_class[op];
+		struct p2p_reg_class *reg = NULL;
+
+		for (ch = o->min_chan; ch <= o->max_chan; ch += o->inc) {
+			if (rtw_chset_search_ch(channel_set, ch) == -1)
+				continue;
+
+			if ((padapter->registrypriv.ht_enable == 0) && (o->inc == 8))
+				continue;
+
+			if ((REGSTY_IS_BW_5G_SUPPORT(regsty, CHANNEL_WIDTH_40)) &&
+			    ((o->bw == BW40MINUS) || (o->bw == BW40PLUS)))
+				continue;
+
+			if (reg == NULL) {
+				reg = &channel_list->reg_class[cla];
+				cla++;
+				reg->reg_class = o->op_class;
+				reg->channels = 0;
+			}
+			reg->channel[reg->channels] = ch;
+			reg->channels++;
+		}
+	}
+	channel_list->reg_classes = cla;
+
+}
+
+static u8 init_channel_set(_adapter *padapter, u8 ChannelPlan, RT_CHANNEL_INFO *channel_set)
+{
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
+	struct registry_priv *regsty = adapter_to_regsty(padapter);
+	u8	index, chanset_size = 0;
+	u8	b5GBand = _FALSE, b2_4GBand = _FALSE;
+	u8	Index2G = 0, Index5G = 0;
+	int i;
+
+	if (!rtw_is_channel_plan_valid(ChannelPlan)) {
+		RTW_ERR("ChannelPlan ID 0x%02X error !!!!!\n", ChannelPlan);
+		return chanset_size;
+	}
+
+	_rtw_memset(channel_set, 0, sizeof(RT_CHANNEL_INFO) * MAX_CHANNEL_NUM);
+
+	if (IsSupported24G(regsty->wireless_mode) && hal_chk_band_cap(padapter, BAND_CAP_2G))
+		b2_4GBand = _TRUE;
+
+	if (is_supported_5g(regsty->wireless_mode) && hal_chk_band_cap(padapter, BAND_CAP_5G))
+		b5GBand = _TRUE;
+
+	if (b2_4GBand == _FALSE && b5GBand == _FALSE) {
+		RTW_WARN("HW band_cap has no intersection with SW wireless_mode setting\n");
+		return chanset_size;
+	}
+
+	if (b2_4GBand) {
+		if (ChannelPlan == RTW_CHPLAN_REALTEK_DEFINE)
+			Index2G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.Index2G;
+		else
+			Index2G = RTW_ChannelPlanMap[ChannelPlan].Index2G;
+
+		for (index = 0; index < CH_LIST_LEN(RTW_ChannelPlan2G[Index2G]); index++) {
+			if (rtw_regsty_is_excl_chs(regsty, CH_LIST_CH(RTW_ChannelPlan2G[Index2G], index)) == _TRUE)
+				continue;
+
+			if (chanset_size >= MAX_CHANNEL_NUM) {
+				RTW_WARN("chset size can't exceed MAX_CHANNEL_NUM(%u)\n", MAX_CHANNEL_NUM);
+				break;
+			}
+
+			channel_set[chanset_size].ChannelNum = CH_LIST_CH(RTW_ChannelPlan2G[Index2G], index);
+
+			if (ChannelPlan == RTW_CHPLAN_GLOBAL_DOAMIN
+				|| Index2G == RTW_RD_2G_GLOBAL
+			) {
+				/* Channel 1~11 is active, and 12~14 is passive */
+				if (channel_set[chanset_size].ChannelNum >= 1 && channel_set[chanset_size].ChannelNum <= 11)
+					channel_set[chanset_size].ScanType = SCAN_ACTIVE;
+				else if ((channel_set[chanset_size].ChannelNum  >= 12 && channel_set[chanset_size].ChannelNum  <= 14))
+					channel_set[chanset_size].ScanType  = SCAN_PASSIVE;
+			} else if (ChannelPlan == RTW_CHPLAN_WORLD_WIDE_13
+				|| ChannelPlan == RTW_CHPLAN_WORLD_WIDE_5G
+				|| Index2G == RTW_RD_2G_WORLD
+			) {
+				/* channel 12~13, passive scan */
+				if (channel_set[chanset_size].ChannelNum <= 11)
+					channel_set[chanset_size].ScanType = SCAN_ACTIVE;
+				else
+					channel_set[chanset_size].ScanType = SCAN_PASSIVE;
+			} else
+				channel_set[chanset_size].ScanType = SCAN_ACTIVE;
+
+			chanset_size++;
+		}
+	}
+
+#ifdef CONFIG_IEEE80211_BAND_5GHZ
+	if (b5GBand) {
+		if (ChannelPlan == RTW_CHPLAN_REALTEK_DEFINE)
+			Index5G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.Index5G;
+		else
+			Index5G = RTW_ChannelPlanMap[ChannelPlan].Index5G;
+
+		for (index = 0; index < CH_LIST_LEN(RTW_ChannelPlan5G[Index5G]); index++) {
+			if (rtw_regsty_is_excl_chs(regsty, CH_LIST_CH(RTW_ChannelPlan5G[Index5G], index)) == _TRUE)
+				continue;
+			#ifndef CONFIG_DFS
+			if (rtw_is_dfs_ch(CH_LIST_CH(RTW_ChannelPlan5G[Index5G], index)))
+				continue;
+			#endif
+
+			if (chanset_size >= MAX_CHANNEL_NUM) {
+				RTW_WARN("chset size can't exceed MAX_CHANNEL_NUM(%u)\n", MAX_CHANNEL_NUM);
+				break;
+			}
+
+			channel_set[chanset_size].ChannelNum = CH_LIST_CH(RTW_ChannelPlan5G[Index5G], index);
+
+			if ((ChannelPlan == RTW_CHPLAN_WORLD_WIDE_5G) /* all channels passive */
+				|| (rtw_is_5g_band1(channel_set[chanset_size].ChannelNum)
+					&& rtw_rd_5g_band1_passive(Index5G)) /* band1 passive */
+				|| (rtw_is_5g_band4(channel_set[chanset_size].ChannelNum)
+					&& rtw_rd_5g_band4_passive(Index5G)) /* band4 passive */
+				|| (rtw_is_dfs_ch(channel_set[chanset_size].ChannelNum)) /* DFS channel(band2, 3) passive */
+			)
+				channel_set[chanset_size].ScanType = SCAN_PASSIVE;
+			else
+				channel_set[chanset_size].ScanType = SCAN_ACTIVE;
+
+			chanset_size++;
+		}
+	}
+
+	#ifdef CONFIG_DFS_MASTER
+	for (i = 0; i < chanset_size; i++)
+		channel_set[i].non_ocp_end_time = rtw_get_current_time();
+	#endif
+#endif /* CONFIG_IEEE80211_BAND_5GHZ */
+
+	if (chanset_size)
+		RTW_INFO(FUNC_ADPT_FMT" ChannelPlan ID:0x%02x, ch num:%d\n"
+			, FUNC_ADPT_ARG(padapter), ChannelPlan, chanset_size);
+	else
+		RTW_WARN(FUNC_ADPT_FMT" ChannelPlan ID:0x%02x, final chset has no channel\n"
+			, FUNC_ADPT_ARG(padapter), ChannelPlan);
+
+	return chanset_size;
+}
+
+#ifdef CONFIG_TXPWR_LIMIT
+void rtw_txpwr_init_regd(struct rf_ctl_t *rfctl)
+{
+	u8 regd;
+	u8 regd_name;
+	struct regd_exc_ent *exc;
+	struct txpwr_lmt_ent *ent;
+	_irqL irqL;
+
+	_enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+
+	rfctl->regd_name = NULL;
+
+	if (rfctl->txpwr_regd_num == 0) {
+		RTW_PRINT("there is no any txpwr_regd\n");
+		goto release_lock;
+	}
+
+	/* search from exception mapping */
+	exc = _rtw_regd_exc_search(rfctl
+		, rfctl->country_ent ? rfctl->country_ent->alpha2 : NULL
+		, rfctl->ChannelPlan);
+	if (exc) {
+		u8 has_country = (exc->country[0] == '\0' && exc->country[1] == '\0') ? 0 : 1;
+
+		if (strcmp(exc->regd_name, regd_str(TXPWR_LMT_NONE)) == 0)
+			rfctl->regd_name = regd_str(TXPWR_LMT_NONE);
+		else if (strcmp(exc->regd_name, regd_str(TXPWR_LMT_WW)) == 0)
+			rfctl->regd_name = regd_str(TXPWR_LMT_WW);
+		else {
+			ent = _rtw_txpwr_lmt_get_by_name(rfctl, exc->regd_name);
+			if (ent)
+				rfctl->regd_name = ent->regd_name;
+		}
+
+		RTW_PRINT("exception mapping country:%c%c domain:0x%02x to%s regd_name:%s\n"
+			, has_country ? exc->country[0] : '0'
+			, has_country ? exc->country[1] : '0'
+			, exc->domain
+			, rfctl->regd_name ? "" : " unknown"
+			, exc->regd_name
+		);
+		if (rfctl->regd_name)
+			goto release_lock;
+	}
+
+	/* follow default channel plan mapping */
+	if (rfctl->ChannelPlan == RTW_CHPLAN_REALTEK_DEFINE)
+		regd = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.regd;
+	else
+		regd = RTW_ChannelPlanMap[rfctl->ChannelPlan].regd;
+
+	if (regd == TXPWR_LMT_NONE)
+		rfctl->regd_name = regd_str(TXPWR_LMT_NONE);
+	else if (regd == TXPWR_LMT_WW)
+		rfctl->regd_name = regd_str(TXPWR_LMT_WW);
+	else {
+		ent = _rtw_txpwr_lmt_get_by_name(rfctl, regd_str(regd));
+		if (ent)
+			rfctl->regd_name = ent->regd_name;
+	}
+
+	RTW_PRINT("default mapping domain:0x%02x to%s regd_name:%s\n"
+		, rfctl->ChannelPlan
+		, rfctl->regd_name ? "" : " unknown"
+		, regd_str(regd)
+	);
+	if (rfctl->regd_name)
+		goto release_lock;
+
+	switch (regd) {
+	/*
+	* To support older chips without IC and KCC regd:
+	* IC not found, use FCC instead
+	* KCC not found, use ETSI instead
+	*/
+	case TXPWR_LMT_IC:
+	case TXPWR_LMT_KCC:
+		if (regd == TXPWR_LMT_IC)
+			regd = TXPWR_LMT_FCC;
+		else if (regd == TXPWR_LMT_KCC)
+			regd = TXPWR_LMT_ETSI;
+		ent = _rtw_txpwr_lmt_get_by_name(rfctl, regd_str(regd));
+		if (ent)
+			rfctl->regd_name = ent->regd_name;
+		RTW_PRINT("alternate regd_name:%s %s\n"
+			, regd_str(regd)
+			, rfctl->regd_name ? "is used" : "not found"
+		);
+		if (rfctl->regd_name)
+			break;
+	default:
+		rfctl->regd_name = regd_str(TXPWR_LMT_WW);
+		RTW_PRINT("assign %s for default case\n", regd_str(TXPWR_LMT_WW));
+		break;
+	};
+
+release_lock:
+	_exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+}
+#endif /* CONFIG_TXPWR_LIMIT */
+
 void rtw_rfctl_init(_adapter *adapter)
 {
 	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
 
-	_rtw_memset(rfctl, 0, sizeof(*rfctl));
+	rfctl->max_chan_nums = init_channel_set(adapter, rfctl->ChannelPlan, rfctl->channel_set);
+	init_channel_list(adapter, rfctl->channel_set, &rfctl->channel_list);
+
+#ifdef CONFIG_TXPWR_LIMIT
+	_rtw_mutex_init(&rfctl->txpwr_lmt_mutex);
+	_rtw_init_listhead(&rfctl->reg_exc_list);
+	_rtw_init_listhead(&rfctl->txpwr_lmt_list);
+#endif
 
 #ifdef CONFIG_DFS_MASTER
 	rfctl->cac_start_time = rfctl->cac_end_time = RTW_CAC_STOPPED;
@@ -335,6 +709,21 @@ void rtw_rfctl_init(_adapter *adapter)
 #endif
 }
 
+void rtw_rfctl_deinit(_adapter *adapter)
+{
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+
+#ifdef CONFIG_TXPWR_LIMIT
+	rtw_regd_exc_list_free(rfctl);
+	rtw_txpwr_lmt_list_free(rfctl);
+	_rtw_mutex_free(&rfctl->txpwr_lmt_mutex);
+#endif
+
+#ifdef CONFIG_DFS_MASTER
+	/* TODO: dfs_master_timer */
+#endif
+}
+
 #ifdef CONFIG_DFS_MASTER
 /*
 * called in rtw_dfs_master_enable()
@@ -449,7 +838,7 @@ bool rtw_chset_is_ch_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset)
 	if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE)
 		goto exit;
 
-	for (i = 0; ch_set[i].ChannelNum != 0; i++) {
+	for (i = 0; i < MAX_CHANNEL_NUM && ch_set[i].ChannelNum != 0; i++) {
 		if (!rtw_ch2freq(ch_set[i].ChannelNum)) {
 			rtw_warn_on(1);
 			continue;
@@ -482,7 +871,7 @@ u32 rtw_chset_get_ch_non_ocp_ms(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset
 
 	current_time = rtw_get_current_time();
 
-	for (i = 0; ch_set[i].ChannelNum != 0; i++) {
+	for (i = 0; i < MAX_CHANNEL_NUM && ch_set[i].ChannelNum != 0; i++) {
 		if (!rtw_ch2freq(ch_set[i].ChannelNum)) {
 			rtw_warn_on(1);
 			continue;
@@ -519,7 +908,7 @@ static void _rtw_chset_update_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8
 	if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE)
 		goto exit;
 
-	for (i = 0; ch_set[i].ChannelNum != 0; i++) {
+	for (i = 0; i < MAX_CHANNEL_NUM && ch_set[i].ChannelNum != 0; i++) {
 		if (!rtw_ch2freq(ch_set[i].ChannelNum)) {
 			rtw_warn_on(1);
 			continue;
@@ -557,8 +946,8 @@ u32 rtw_get_ch_waiting_ms(_adapter *adapter, u8 ch, u8 bw, u8 offset, u32 *r_non
 	u32 cac_ms;
 	u8 in_rd_range = 0; /* if in current radar detection range*/
 
-	if (rtw_chset_is_ch_non_ocp(mlmeext->channel_set, ch, bw, offset))
-		non_ocp_ms = rtw_chset_get_ch_non_ocp_ms(mlmeext->channel_set, ch, bw, offset);
+	if (rtw_chset_is_ch_non_ocp(rfctl->channel_set, ch, bw, offset))
+		non_ocp_ms = rtw_chset_get_ch_non_ocp_ms(rfctl->channel_set, ch, bw, offset);
 	else
 		non_ocp_ms = 0;
 
@@ -579,7 +968,7 @@ u32 rtw_get_ch_waiting_ms(_adapter *adapter, u8 ch, u8 bw, u8 offset, u32 *r_non
 			in_rd_range = 1;
 	}
 
-	if (!rtw_is_dfs_ch(ch, bw, offset))
+	if (!rtw_is_dfs_chbw(ch, bw, offset))
 		cac_ms = 0;
 	else if (in_rd_range && !non_ocp_ms) {
 		if (IS_CH_WAITING(rfctl))
@@ -624,6 +1013,7 @@ void rtw_reset_cac(_adapter *adapter, u8 ch, u8 bw, u8 offset)
 	if (rfctl->cac_end_time == RTW_CAC_STOPPED)
 		rfctl->cac_end_time++;
 }
+#endif /* CONFIG_DFS_MASTER */
 
 /* choose channel with shortest waiting (non ocp + cac) time */
 bool rtw_choose_shortest_waiting_ch(_adapter *adapter, u8 req_bw, u8 *dec_ch, u8 *dec_bw, u8 *dec_offset, u8 d_flags)
@@ -632,7 +1022,6 @@ bool rtw_choose_shortest_waiting_ch(_adapter *adapter, u8 req_bw, u8 *dec_ch, u8
 #define DBG_CHOOSE_SHORTEST_WAITING_CH 0
 #endif
 
-	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
 	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
 	struct registry_priv *regsty = adapter_to_regsty(adapter);
 	u8 ch, bw, offset;
@@ -650,12 +1039,12 @@ bool rtw_choose_shortest_waiting_ch(_adapter *adapter, u8 req_bw, u8 *dec_ch, u8
 		if (!hal_is_bw_support(adapter, bw))
 			continue;
 
-		for (i = 0; i < mlmeext->max_chan_nums; i++) {
-			u32 non_ocp_ms;
-			u32 cac_ms;
-			u32 waiting_ms;
+		for (i = 0; i < rfctl->max_chan_nums; i++) {
+			u32 non_ocp_ms = 0;
+			u32 cac_ms = 0;
+			u32 waiting_ms = 0;
 
-			ch = mlmeext->channel_set[i].ChannelNum;
+			ch = rfctl->channel_set[i].ChannelNum;
 
 			if ((d_flags & RTW_CHF_2G) && ch <= 14)
 				continue;
@@ -674,25 +1063,27 @@ bool rtw_choose_shortest_waiting_ch(_adapter *adapter, u8 req_bw, u8 *dec_ch, u8
 			if (!rtw_get_offset_by_chbw(ch, bw, &offset))
 				continue;
 
-			if (!rtw_chset_is_chbw_valid(mlmeext->channel_set, ch, bw, offset))
+			if (!rtw_chset_is_chbw_valid(rfctl->channel_set, ch, bw, offset))
 				continue;
 
-			if ((d_flags & RTW_CHF_NON_OCP) && rtw_chset_is_ch_non_ocp(mlmeext->channel_set, ch, bw, offset))
+			if ((d_flags & RTW_CHF_NON_OCP) && rtw_chset_is_ch_non_ocp(rfctl->channel_set, ch, bw, offset))
 				continue;
 
-			if ((d_flags & RTW_CHF_DFS) && rtw_is_dfs_ch(ch, bw, offset))
+			if ((d_flags & RTW_CHF_DFS) && rtw_is_dfs_chbw(ch, bw, offset))
 				continue;
 
 			if ((d_flags & RTW_CHF_LONG_CAC) && rtw_is_long_cac_ch(ch, bw, offset, rtw_odm_get_dfs_domain(adapter)))
 				continue;
 
-			if ((d_flags & RTW_CHF_NON_DFS) && !rtw_is_dfs_ch(ch, bw, offset))
+			if ((d_flags & RTW_CHF_NON_DFS) && !rtw_is_dfs_chbw(ch, bw, offset))
 				continue;
 
 			if ((d_flags & RTW_CHF_NON_LONG_CAC) && !rtw_is_long_cac_ch(ch, bw, offset, rtw_odm_get_dfs_domain(adapter)))
 				continue;
 
+			#ifdef CONFIG_DFS_MASTER
 			waiting_ms = rtw_get_ch_waiting_ms(adapter, ch, bw, offset, &non_ocp_ms, &cac_ms);
+			#endif
 
 			if (DBG_CHOOSE_SHORTEST_WAITING_CH)
 				RTW_INFO(FUNC_ADPT_FMT":%u,%u,%u %u(non_ocp:%u, cac:%u)\n"
@@ -725,7 +1116,6 @@ bool rtw_choose_shortest_waiting_ch(_adapter *adapter, u8 req_bw, u8 *dec_ch, u8
 
 	return _FALSE;
 }
-#endif /* CONFIG_DFS_MASTER */
 
 void dump_country_chplan(void *sel, const struct country_chplan *ent)
 {
@@ -778,25 +1168,27 @@ void dump_chplan_test(void *sel)
 
 	/* check invalid channel */
 	for (i = 0; i < RTW_RD_2G_MAX; i++) {
-		for (j = 0; j < RTW_ChannelPlan2G[i].Len; j++) {
-			if (rtw_ch2freq(RTW_ChannelPlan2G[i].Channel[j]) == 0)
-				RTW_PRINT_SEL(sel, "invalid ch:%u at (%d,%d)\n", RTW_ChannelPlan2G[i].Channel[j], i, j);
+		for (j = 0; j < CH_LIST_LEN(RTW_ChannelPlan2G[i]); j++) {
+			if (rtw_ch2freq(CH_LIST_CH(RTW_ChannelPlan2G[i], j)) == 0)
+				RTW_PRINT_SEL(sel, "invalid ch:%u at (%d,%d)\n", CH_LIST_CH(RTW_ChannelPlan2G[i], j), i, j);
 		}
 	}
 
+#ifdef CONFIG_IEEE80211_BAND_5GHZ
 	for (i = 0; i < RTW_RD_5G_MAX; i++) {
-		for (j = 0; j < RTW_ChannelPlan5G[i].Len; j++) {
-			if (rtw_ch2freq(RTW_ChannelPlan5G[i].Channel[j]) == 0)
-				RTW_PRINT_SEL(sel, "invalid ch:%u at (%d,%d)\n", RTW_ChannelPlan5G[i].Channel[j], i, j);
+		for (j = 0; j < CH_LIST_LEN(RTW_ChannelPlan5G[i]); j++) {
+			if (rtw_ch2freq(CH_LIST_CH(RTW_ChannelPlan5G[i], j)) == 0)
+				RTW_PRINT_SEL(sel, "invalid ch:%u at (%d,%d)\n", CH_LIST_CH(RTW_ChannelPlan5G[i], j), i, j);
 		}
 	}
+#endif
 }
 
 void dump_chset(void *sel, RT_CHANNEL_INFO *ch_set)
 {
 	u8	i;
 
-	for (i = 0; ch_set[i].ChannelNum != 0; i++) {
+	for (i = 0; i < MAX_CHANNEL_NUM && ch_set[i].ChannelNum != 0; i++) {
 		RTW_PRINT_SEL(sel, "ch:%3u, freq:%u, scan_type:%d"
 			, ch_set[i].ChannelNum, rtw_ch2freq(ch_set[i].ChannelNum), ch_set[i].ScanType);
 
@@ -805,7 +1197,7 @@ void dump_chset(void *sel, RT_CHANNEL_INFO *ch_set)
 #endif
 
 #ifdef CONFIG_DFS_MASTER
-		if (rtw_is_dfs_ch(ch_set[i].ChannelNum, CHANNEL_WIDTH_20, HAL_PRIME_CHNL_OFFSET_DONT_CARE)) {
+		if (rtw_is_dfs_ch(ch_set[i].ChannelNum)) {
 			if (CH_IS_NON_OCP(&ch_set[i]))
 				_RTW_PRINT_SEL(sel, ", non_ocp:%d"
 					, rtw_systime_to_ms(ch_set[i].non_ocp_end_time - rtw_get_current_time()));
@@ -822,19 +1214,23 @@ void dump_chset(void *sel, RT_CHANNEL_INFO *ch_set)
 
 void dump_cur_chset(void *sel, _adapter *adapter)
 {
-	struct mlme_priv *mlme = &adapter->mlmepriv;
-	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
 	struct registry_priv *regsty = adapter_to_regsty(adapter);
 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
 	int i;
 
-	if (mlme->country_ent)
-		dump_country_chplan(sel, mlme->country_ent);
+	if (rfctl->country_ent)
+		dump_country_chplan(sel, rfctl->country_ent);
 	else
-		RTW_PRINT_SEL(sel, "chplan:0x%02X\n", mlme->ChannelPlan);
+		RTW_PRINT_SEL(sel, "chplan:0x%02X\n", rfctl->ChannelPlan);
 
-	RTW_PRINT_SEL(sel, "2G_PLS:%u, 5G_PLS:%u\n"
-		, hal_data->Regulation2_4G, hal_data->Regulation5G);
+#ifdef CONFIG_TXPWR_LIMIT
+	RTW_PRINT_SEL(sel, "PLS regd:%s\n", rfctl->regd_name);
+#endif
+
+#ifdef CONFIG_DFS_MASTER
+	RTW_PRINT_SEL(sel, "dfs_domain:%u\n", rtw_odm_get_dfs_domain(adapter));
+#endif
 
 	for (i = 0; i < MAX_CHANNEL_NUM; i++)
 		if (regsty->excl_chs[i] != 0)
@@ -850,7 +1246,7 @@ void dump_cur_chset(void *sel, _adapter *adapter)
 		RTW_PRINT_SEL(sel, "\n");
 	}
 
-	dump_chset(sel, mlmeext->channel_set);
+	dump_chset(sel, rfctl->channel_set);
 }
 
 /*
@@ -860,17 +1256,19 @@ void dump_cur_chset(void *sel, _adapter *adapter)
  *
  * return the index of channel_num in channel_set, -1 if not found
  */
-int rtw_ch_set_search_ch(RT_CHANNEL_INFO *ch_set, const u32 ch)
+int rtw_chset_search_ch(RT_CHANNEL_INFO *ch_set, const u32 ch)
 {
 	int i;
-	for (i = 0; ch_set[i].ChannelNum != 0; i++) {
+
+	if (ch == 0)
+		return -1;
+
+	for (i = 0; i < MAX_CHANNEL_NUM && ch_set[i].ChannelNum != 0; i++) {
 		if (ch == ch_set[i].ChannelNum)
-			break;
+			return i;
 	}
 
-	if (i >= ch_set[i].ChannelNum)
-		return -1;
-	return i;
+	return -1;
 }
 
 /*
@@ -898,7 +1296,7 @@ u8 rtw_chset_is_chbw_valid(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset)
 	for (i = 0; i < op_ch_num; i++) {
 		if (0)
 			RTW_INFO("%u,%u,%u - cch:%u, bw:%u, op_ch:%u\n", ch, bw, offset, cch, bw, *(op_chs + i));
-		if (rtw_ch_set_search_ch(ch_set, *(op_chs + i)) == -1)
+		if (rtw_chset_search_ch(ch_set, *(op_chs + i)) == -1)
 			break;
 	}
 
@@ -1057,202 +1455,16 @@ static void init_mlme_ext_priv_value(_adapter *padapter)
 	pmlmeext->action_public_dialog_token = 0xff;
 }
 
-static int has_channel(RT_CHANNEL_INFO *channel_set,
-		       u8 chanset_size,
-		       u8 chan)
-{
-	int i;
-
-	for (i = 0; i < chanset_size; i++) {
-		if (channel_set[i].ChannelNum == chan)
-			return 1;
-	}
-
-	return 0;
-}
-
-static void init_channel_list(_adapter *padapter, RT_CHANNEL_INFO *channel_set,
-			      u8 chanset_size,
-			      struct p2p_channels *channel_list)
-{
-	struct registry_priv *regsty = adapter_to_regsty(padapter);
-
-	struct p2p_oper_class_map op_class[] = {
-		{ IEEE80211G,  81,   1,  13,  1, BW20 },
-		{ IEEE80211G,  82,  14,  14,  1, BW20 },
-#if 0 /* Do not enable HT40 on 2 GHz */
-		{ IEEE80211G,  83,   1,   9,  1, BW40PLUS },
-		{ IEEE80211G,  84,   5,  13,  1, BW40MINUS },
-#endif
-		{ IEEE80211A, 115,  36,  48,  4, BW20 },
-		{ IEEE80211A, 116,  36,  44,  8, BW40PLUS },
-		{ IEEE80211A, 117,  40,  48,  8, BW40MINUS },
-		{ IEEE80211A, 124, 149, 161,  4, BW20 },
-		{ IEEE80211A, 125, 149, 169,  4, BW20 },
-		{ IEEE80211A, 126, 149, 157,  8, BW40PLUS },
-		{ IEEE80211A, 127, 153, 161,  8, BW40MINUS },
-		{ -1, 0, 0, 0, 0, BW20 }
-	};
-
-	int cla, op;
-
-	cla = 0;
-
-	for (op = 0; op_class[op].op_class; op++) {
-		u8 ch;
-		struct p2p_oper_class_map *o = &op_class[op];
-		struct p2p_reg_class *reg = NULL;
-
-		for (ch = o->min_chan; ch <= o->max_chan; ch += o->inc) {
-			if (!has_channel(channel_set, chanset_size, ch))
-				continue;
-
-			if ((0 == padapter->registrypriv.ht_enable) && (8 == o->inc))
-				continue;
-
-			if ((REGSTY_IS_BW_5G_SUPPORT(regsty, CHANNEL_WIDTH_40)) &&
-			    ((BW40MINUS == o->bw) || (BW40PLUS == o->bw)))
-				continue;
-
-			if (reg == NULL) {
-				reg = &channel_list->reg_class[cla];
-				cla++;
-				reg->reg_class = o->op_class;
-				reg->channels = 0;
-			}
-			reg->channel[reg->channels] = ch;
-			reg->channels++;
-		}
-	}
-	channel_list->reg_classes = cla;
-
-}
-
-bool rtw_regsty_is_excl_chs(struct registry_priv *regsty, u8 ch)
+void init_mlme_ext_timer(_adapter *padapter)
 {
-	int i;
-
-	for (i = 0; i < MAX_CHANNEL_NUM; i++) {
-		if (regsty->excl_chs[i] == 0)
-			break;
-		if (regsty->excl_chs[i] == ch)
-			return _TRUE;
-	}
-	return _FALSE;
-}
-
-static u8 init_channel_set(_adapter *padapter, u8 ChannelPlan, RT_CHANNEL_INFO *channel_set)
-{
-	struct registry_priv *regsty = adapter_to_regsty(padapter);
-	u8	index, chanset_size = 0;
-	u8	b5GBand = _FALSE, b2_4GBand = _FALSE;
-	u8	Index2G = 0, Index5G = 0;
-	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter);
-	int i;
-
-	if (!rtw_is_channel_plan_valid(ChannelPlan)) {
-		RTW_ERR("ChannelPlan ID 0x%02X error !!!!!\n", ChannelPlan);
-		return chanset_size;
-	}
-
-	_rtw_memset(channel_set, 0, sizeof(RT_CHANNEL_INFO) * MAX_CHANNEL_NUM);
-
-	if (IsSupported24G(padapter->registrypriv.wireless_mode))
-		b2_4GBand = _TRUE;
-
-	if (is_supported_5g(padapter->registrypriv.wireless_mode))
-		b5GBand = _TRUE;
-
-	if (b2_4GBand) {
-		if (RTW_CHPLAN_REALTEK_DEFINE == ChannelPlan)
-			Index2G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.Index2G;
-		else
-			Index2G = RTW_ChannelPlanMap[ChannelPlan].Index2G;
-
-		for (index = 0; index < RTW_ChannelPlan2G[Index2G].Len; index++) {
-			if (rtw_regsty_is_excl_chs(regsty, RTW_ChannelPlan2G[Index2G].Channel[index]) == _TRUE)
-				continue;
-
-			channel_set[chanset_size].ChannelNum = RTW_ChannelPlan2G[Index2G].Channel[index];
-
-			if (RTW_CHPLAN_GLOBAL_DOAMIN == ChannelPlan
-				|| RTW_CHPLAN_GLOBAL_NULL == ChannelPlan
-			) {
-				/* Channel 1~11 is active, and 12~14 is passive */
-				if (channel_set[chanset_size].ChannelNum >= 1 && channel_set[chanset_size].ChannelNum <= 11)
-					channel_set[chanset_size].ScanType = SCAN_ACTIVE;
-				else if ((channel_set[chanset_size].ChannelNum  >= 12 && channel_set[chanset_size].ChannelNum  <= 14))
-					channel_set[chanset_size].ScanType  = SCAN_PASSIVE;
-			} else if (RTW_CHPLAN_WORLD_WIDE_13 == ChannelPlan
-				|| RTW_CHPLAN_WORLD_WIDE_5G == ChannelPlan
-				|| RTW_RD_2G_WORLD == Index2G
-			) {
-				/* channel 12~13, passive scan */
-				if (channel_set[chanset_size].ChannelNum <= 11)
-					channel_set[chanset_size].ScanType = SCAN_ACTIVE;
-				else
-					channel_set[chanset_size].ScanType = SCAN_PASSIVE;
-			} else
-				channel_set[chanset_size].ScanType = SCAN_ACTIVE;
-
-			chanset_size++;
-		}
-	}
-
-	if (b5GBand) {
-		if (RTW_CHPLAN_REALTEK_DEFINE == ChannelPlan)
-			Index5G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.Index5G;
-		else
-			Index5G = RTW_ChannelPlanMap[ChannelPlan].Index5G;
-
-		for (index = 0; index < RTW_ChannelPlan5G[Index5G].Len; index++) {
-			if (rtw_regsty_is_excl_chs(regsty, RTW_ChannelPlan5G[Index5G].Channel[index]) == _TRUE)
-				continue;
-#ifdef CONFIG_DFS
-			channel_set[chanset_size].ChannelNum = RTW_ChannelPlan5G[Index5G].Channel[index];
-			if (channel_set[chanset_size].ChannelNum <= 48
-				|| channel_set[chanset_size].ChannelNum >= 149
-			) {
-				if (RTW_CHPLAN_WORLD_WIDE_5G == ChannelPlan) /* passive scan for all 5G channels */
-					channel_set[chanset_size].ScanType = SCAN_PASSIVE;
-				else
-					channel_set[chanset_size].ScanType = SCAN_ACTIVE;
-			} else
-				channel_set[chanset_size].ScanType = SCAN_PASSIVE;
-			chanset_size++;
-#else /* CONFIG_DFS */
-			if (RTW_ChannelPlan5G[Index5G].Channel[index] <= 48
-				|| RTW_ChannelPlan5G[Index5G].Channel[index] >= 149
-			) {
-				channel_set[chanset_size].ChannelNum = RTW_ChannelPlan5G[Index5G].Channel[index];
-				if (RTW_CHPLAN_WORLD_WIDE_5G == ChannelPlan) /* passive scan for all 5G channels */
-					channel_set[chanset_size].ScanType = SCAN_PASSIVE;
-				else
-					channel_set[chanset_size].ScanType = SCAN_ACTIVE;
-				RTW_INFO("%s(): channel_set[%d].ChannelNum = %d\n", __FUNCTION__, chanset_size, channel_set[chanset_size].ChannelNum);
-				chanset_size++;
-			}
-#endif /* CONFIG_DFS */
-		}
-	}
-
-	if (RTW_CHPLAN_REALTEK_DEFINE == ChannelPlan) {
-		hal_data->Regulation2_4G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.regd;
-		hal_data->Regulation5G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.regd;
-	} else {
-		hal_data->Regulation2_4G = RTW_ChannelPlanMap[ChannelPlan].regd;
-		hal_data->Regulation5G = RTW_ChannelPlanMap[ChannelPlan].regd;
-	}
+	struct	mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 
-#ifdef CONFIG_DFS_MASTER
-	for (i = 0; i < chanset_size; i++)
-		channel_set[i].non_ocp_end_time = rtw_get_current_time();
+	rtw_init_timer(&pmlmeext->survey_timer, padapter, survey_timer_hdl, padapter);
+	rtw_init_timer(&pmlmeext->link_timer, padapter, link_timer_hdl, padapter);
+#ifdef CONFIG_RTW_80211R
+	rtw_init_timer(&pmlmeext->ft_link_timer, padapter, ft_link_timer_hdl, padapter);
+	rtw_init_timer(&pmlmeext->ft_roam_timer, padapter, ft_roam_timer_hdl, padapter);
 #endif
-
-	RTW_INFO(FUNC_ADPT_FMT" ChannelPlan ID:0x%02x, ch num:%d\n"
-		, FUNC_ADPT_ARG(padapter), ChannelPlan, chanset_size);
-
-	return chanset_size;
 }
 
 int	init_mlme_ext_priv(_adapter *padapter)
@@ -1279,8 +1491,6 @@ int	init_mlme_ext_priv(_adapter *padapter)
 	init_mlme_ap_info(padapter);
 #endif
 
-	pmlmeext->max_chan_nums = init_channel_set(padapter, pmlmepriv->ChannelPlan, pmlmeext->channel_set);
-	init_channel_list(padapter, pmlmeext->channel_set, pmlmeext->max_chan_nums, &pmlmeext->channel_list);
 	pmlmeext->last_scan_time = 0;
 	pmlmeext->mlmeext_init = _TRUE;
 
@@ -1309,7 +1519,6 @@ void free_mlme_ext_priv(struct mlme_ext_priv *pmlmeext)
 	if (rtw_is_drv_stopped(padapter)) {
 		_cancel_timer_ex(&pmlmeext->survey_timer);
 		_cancel_timer_ex(&pmlmeext->link_timer);
-		/* _cancel_timer_ex(&pmlmeext->ADDBA_timer); */
 	}
 }
 
@@ -1473,21 +1682,23 @@ u32 p2p_listen_state_process(_adapter *padapter, unsigned char *da)
 
 #ifdef CONFIG_IOCTL_CFG80211
 	if (padapter->wdinfo.driver_interface == DRIVER_CFG80211) {
-		if (padapter->cfg80211_wdinfo.is_ro_ch == _FALSE
-		    || rtw_get_oper_ch(padapter) != padapter->wdinfo.listen_channel
-		    || adapter_wdev_data(padapter)->p2p_enabled == _FALSE
-		    || padapter->mlmepriv.wps_probe_resp_ie == NULL
-		    || padapter->mlmepriv.p2p_probe_resp_ie == NULL
-		   ) {
+		if (rtw_cfg80211_get_is_roch(padapter) == _FALSE
+			|| rtw_get_oper_ch(padapter) != padapter->wdinfo.listen_channel
+			|| adapter_wdev_data(padapter)->p2p_enabled == _FALSE
+			|| padapter->mlmepriv.wps_probe_resp_ie == NULL
+			|| padapter->mlmepriv.p2p_probe_resp_ie == NULL
+		) {
 #ifdef CONFIG_DEBUG_CFG80211
-			RTW_INFO("DON'T issue_probersp_p2p: p2p_enabled:%d, wps_probe_resp_ie:%p, p2p_probe_resp_ie:%p, ",
-				 adapter_wdev_data(padapter)->p2p_enabled,
-				 padapter->mlmepriv.wps_probe_resp_ie,
-				 padapter->mlmepriv.p2p_probe_resp_ie);
-			RTW_INFO("is_ro_ch:%d, op_ch:%d, p2p_listen_channel:%d\n",
-				 padapter->cfg80211_wdinfo.is_ro_ch,
-				 rtw_get_oper_ch(padapter),
-				 padapter->wdinfo.listen_channel);
+			RTW_INFO(ADPT_FMT" DON'T issue_probersp_p2p: p2p_enabled:%d, wps_probe_resp_ie:%p, p2p_probe_resp_ie:%p\n"
+				, ADPT_ARG(padapter)
+				, adapter_wdev_data(padapter)->p2p_enabled
+				, padapter->mlmepriv.wps_probe_resp_ie
+				, padapter->mlmepriv.p2p_probe_resp_ie);
+			RTW_INFO(ADPT_FMT" DON'T issue_probersp_p2p: is_ro_ch:%d, op_ch:%d, p2p_listen_channel:%d\n"
+				, ADPT_ARG(padapter)
+				, rtw_cfg80211_get_is_roch(padapter)
+				, rtw_get_oper_ch(padapter)
+				, padapter->wdinfo.listen_channel);
 #endif
 			response = _FALSE;
 		}
@@ -1543,8 +1754,8 @@ unsigned int OnProbeReq(_adapter *padapter, union recv_frame *precv_frame)
 	if ((pwdinfo->driver_interface == DRIVER_CFG80211)
 	    && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)
 	    && (GET_CFG80211_REPORT_MGMT(adapter_wdev_data(padapter), IEEE80211_STYPE_PROBE_REQ) == _TRUE)
-	   ) {
-		rtw_cfg80211_rx_probe_request(padapter, pframe, len);
+	) {
+		rtw_cfg80211_rx_probe_request(padapter, precv_frame);
 		return _SUCCESS;
 	}
 #endif /* CONFIG_IOCTL_CFG80211 */
@@ -1903,6 +2114,8 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame)
 #endif
 #endif /* CONFIG_TDLS */
 
+	if (validate_beacon_len(pframe, len) == _FALSE)
+		return _SUCCESS;
 #ifdef CONFIG_ATTEMPT_TO_FIX_AP_BEACON_ERROR
 	p = rtw_get_ie(pframe + sizeof(struct rtw_ieee80211_hdr_3addr) + _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, &ielen,
 		precv_frame->u.hdr.len - sizeof(struct rtw_ieee80211_hdr_3addr) - _BEACON_IE_OFFSET_);
@@ -1924,7 +2137,14 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame)
 	rtw_check_legacy_ap(padapter, pframe, len);
 
 	if (_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN)) {
-		if (pmlmeinfo->state & WIFI_FW_AUTH_NULL) {
+		if ((pmlmeinfo->state & WIFI_FW_AUTH_NULL)
+			&& rtw_sta_linking_test_wait_done()
+		) {
+			if (rtw_sta_linking_test_force_fail()) {
+				set_link_timer(pmlmeext, 1);
+				return _SUCCESS;
+			}
+
 			/* we should update current network before auth, or some IE is wrong */
 			pbss = (WLAN_BSSID_EX *)rtw_malloc(sizeof(WLAN_BSSID_EX));
 			if (pbss) {
@@ -1964,7 +2184,8 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame)
 			_rtw_memset(pmlmeext->bcn_delay_ratio, 0, sizeof(pmlmeext->bcn_delay_ratio));
 
 #ifdef CONFIG_P2P_PS
-			process_p2p_ps_ie(padapter, (pframe + WLAN_HDR_A3_LEN), (len - WLAN_HDR_A3_LEN));
+			/* Comment by YiWei , in wifi p2p spec the "3.3 P2P Power Management" , "These mechanisms are available in a P2P Group in which only P2P Devices are associated." */
+			/* process_p2p_ps_ie(padapter, (pframe + WLAN_HDR_A3_LEN), (len - WLAN_HDR_A3_LEN)); */
 #endif /* CONFIG_P2P_PS */
 
 #if defined(CONFIG_P2P) && defined(CONFIG_CONCURRENT_MODE)
@@ -3468,7 +3689,7 @@ unsigned int on_action_wnm(_adapter *adapter, union recv_frame *rframe)
 	default:
 		#ifdef CONFIG_IOCTL_CFG80211
 		cnt += sprintf((msg + cnt), "ACT_WNM %u", action);
-		rtw_cfg80211_rx_action(adapter, frame, frame_len, msg);
+		rtw_cfg80211_rx_action(adapter, rframe, msg);
 		#endif
 		ret = _SUCCESS;
 		break;
@@ -3490,11 +3711,6 @@ u8 rtw_rx_ampdu_size(_adapter *adapter)
 	u8 size;
 	HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor;
 
-	if (adapter->fix_rx_ampdu_size != RX_AMPDU_SIZE_INVALID) {
-		size = adapter->fix_rx_ampdu_size;
-		goto exit;
-	}
-
 #ifdef CONFIG_BT_COEXIST
 	if (rtw_btcoex_IsBTCoexCtrlAMPDUSize(adapter) == _TRUE) {
 		size = rtw_btcoex_GetAMPDUSize(adapter);
@@ -3692,6 +3908,35 @@ exit:
 	return ret;
 }
 
+u8 rx_ampdu_size_sta_limit(_adapter *adapter, struct sta_info *sta)
+{
+	u8 sz_limit = 0xFF;
+
+#ifdef CONFIG_80211N_HT
+	struct registry_priv *regsty = adapter_to_regsty(adapter);
+	struct mlme_priv *mlme = &adapter->mlmepriv;
+	struct mlme_ext_info *mlmeinfo = &adapter->mlmeextpriv.mlmext_info;
+	s8 nss = -1;
+	u8 bw = rtw_min(sta->bw_mode, adapter->mlmeextpriv.cur_bwmode);
+
+	#ifdef CONFIG_80211AC_VHT
+	if (is_supported_vht(sta->wireless_mode)) {
+		nss = rtw_min(rtw_vht_mcsmap_to_nss(mlme->vhtpriv.vht_mcs_map)
+				, rtw_vht_mcsmap_to_nss(sta->vhtpriv.vht_mcs_map));
+	} else
+	#endif
+	if (is_supported_ht(sta->wireless_mode)) {
+		nss = rtw_min(rtw_ht_mcsset_to_nss(mlmeinfo->HT_caps.u.HT_cap_element.MCS_rate)
+				, rtw_ht_mcsset_to_nss(sta->htpriv.ht_cap.supp_mcs_set));
+	}
+
+	if (nss >= 1)
+		sz_limit = regsty->rx_ampdu_sz_limit_by_nss_bw[nss - 1][bw];
+#endif /* CONFIG_80211N_HT */
+
+	return sz_limit;
+}
+
 /**
  * rx_ampdu_apply_sta - Apply RX AMPDU setting to the specific @sta
  * @adapter: the adapter to which @sta belongs
@@ -3725,17 +3970,25 @@ u8 rx_ampdu_apply_sta(_adapter *adapter, struct sta_info *sta, u8 accept, u8 siz
 u16 rtw_rx_ampdu_apply(_adapter *adapter)
 {
 	u16 adj_cnt = 0;
-	struct mlme_ext_priv *mlmeext;
+	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
 	struct sta_info *sta;
 	u8 accept = rtw_rx_ampdu_is_accept(adapter);
-	u8 size = rtw_rx_ampdu_size(adapter);
+	u8 size;
 
-	mlmeext = &adapter->mlmeextpriv;
+	if (adapter->fix_rx_ampdu_size != RX_AMPDU_SIZE_INVALID)
+		size = adapter->fix_rx_ampdu_size;
+	else
+		size = rtw_rx_ampdu_size(adapter);
 
 	if (mlmeext_msr(mlmeext) == WIFI_FW_STATION_STATE) {
 		sta = rtw_get_stainfo(&adapter->stapriv, get_bssid(&adapter->mlmepriv));
-		if (sta)
-			adj_cnt += rx_ampdu_apply_sta(adapter, sta, accept, size);
+		if (sta) {
+			u8 sta_size = size;
+
+			if (adapter->fix_rx_ampdu_size == RX_AMPDU_SIZE_INVALID)
+				sta_size = rtw_min(size, rx_ampdu_size_sta_limit(adapter, sta));
+			adj_cnt += rx_ampdu_apply_sta(adapter, sta, accept, sta_size);
+		}
 
 	} else if (mlmeext_msr(mlmeext) == WIFI_FW_AP_STATE) {
 		_irqL irqL;
@@ -3765,8 +4018,13 @@ u16 rtw_rx_ampdu_apply(_adapter *adapter)
 
 		for (i = 0; i < peer_num; i++) {
 			sta = rtw_get_stainfo_by_offset(pstapriv, peers[i]);
-			if (sta)
-				adj_cnt += rx_ampdu_apply_sta(adapter, sta, accept, size);
+			if (sta) {
+				u8 sta_size = size;
+
+				if (adapter->fix_rx_ampdu_size == RX_AMPDU_SIZE_INVALID)
+					sta_size = rtw_min(size, rx_ampdu_size_sta_limit(adapter, sta));
+				adj_cnt += rx_ampdu_apply_sta(adapter, sta, accept, sta_size);
+			}
 		}
 	}
 
@@ -3889,42 +4147,20 @@ unsigned int OnAction_back(_adapter *padapter, union recv_frame *precv_frame)
 }
 
 #ifdef CONFIG_P2P
-
-static int get_reg_classes_full_count(struct p2p_channels channel_list)
+int get_reg_classes_full_count(struct p2p_channels *channel_list)
 {
 	int cnt = 0;
 	int i;
 
-	for (i = 0; i < channel_list.reg_classes; i++)
-		cnt += channel_list.reg_class[i].channels;
+	for (i = 0; i < channel_list->reg_classes; i++)
+		cnt += channel_list->reg_class[i].channels;
 
 	return cnt;
 }
 
-static void get_channel_cnt_24g_5gl_5gh(struct mlme_ext_priv *pmlmeext, u8 *p24g_cnt, u8 *p5gl_cnt, u8 *p5gh_cnt)
-{
-	int	i = 0;
-
-	*p24g_cnt = 0;
-	*p5gl_cnt = 0;
-	*p5gh_cnt = 0;
-
-	for (i = 0; i < pmlmeext->max_chan_nums; i++) {
-		if (pmlmeext->channel_set[i].ChannelNum <= 14)
-			(*p24g_cnt)++;
-		else if ((pmlmeext->channel_set[i].ChannelNum > 14) && (pmlmeext->channel_set[i].ChannelNum <= 48)) {
-			/*	Just include the channel 36, 40, 44, 48 channels for 5G low */
-			(*p5gl_cnt)++;
-		} else if ((pmlmeext->channel_set[i].ChannelNum >= 149) && (pmlmeext->channel_set[i].ChannelNum <= 161)) {
-			/*	Just include the channel 149, 153, 157, 161 channels for 5G high */
-			(*p5gh_cnt)++;
-		}
-	}
-}
-
 void issue_p2p_GO_request(_adapter *padapter, u8 *raddr)
 {
-
+	struct p2p_channels *ch_list = &(adapter_to_rfctl(padapter)->channel_list);
 	unsigned char category = RTW_WLAN_CATEGORY_PUBLIC;
 	u8			action = P2P_PUB_ACTION_ACTION;
 	u32			p2poui = cpu_to_be32(P2POUI);
@@ -4136,7 +4372,7 @@ void issue_p2p_GO_request(_adapter *padapter, u8 *raddr)
 
 	/*	Intended P2P Interface Address */
 	/*	Type: */
-	p2pie[p2pielen++] = P2P_ATTR_INTENTED_IF_ADDR;
+	p2pie[p2pielen++] = P2P_ATTR_INTENDED_IF_ADDR;
 
 	/*	Length: */
 	*(u16 *)(p2pie + p2pielen) = cpu_to_le16(ETH_ALEN);
@@ -4156,8 +4392,8 @@ void issue_p2p_GO_request(_adapter *padapter, u8 *raddr)
 	/* + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) */
 	/* + number of channels in all classes */
 	len_channellist_attr = 3
-		       + (1 + 1) * (u16)(pmlmeext->channel_list.reg_classes)
-		       + get_reg_classes_full_count(pmlmeext->channel_list);
+		       + (1 + 1) * (u16)(ch_list->reg_classes)
+		       + get_reg_classes_full_count(ch_list);
 
 #ifdef CONFIG_CONCURRENT_MODE
 	if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0)
@@ -4202,36 +4438,22 @@ void issue_p2p_GO_request(_adapter *padapter, u8 *raddr)
 
 		/*	Channel List */
 		p2pie[p2pielen++] = union_ch;
-	} else {
-		int i, j;
-		for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) {
-			/*	Operating Class */
-			p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class;
-
-			/*	Number of Channels */
-			p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels;
-
-			/*	Channel List */
-			for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++)
-				p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i];
-		}
-	}
-#else /* CONFIG_CONCURRENT_MODE */
+	} else
+#endif /* CONFIG_CONCURRENT_MODE */
 	{
 		int i, j;
-		for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) {
+		for (j = 0; j < ch_list->reg_classes; j++) {
 			/*	Operating Class */
-			p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class;
+			p2pie[p2pielen++] = ch_list->reg_class[j].reg_class;
 
 			/*	Number of Channels */
-			p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels;
+			p2pie[p2pielen++] = ch_list->reg_class[j].channels;
 
 			/*	Channel List */
-			for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++)
-				p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i];
+			for (i = 0; i < ch_list->reg_class[j].channels; i++)
+				p2pie[p2pielen++] = ch_list->reg_class[j].channel[i];
 		}
 	}
-#endif /* CONFIG_CONCURRENT_MODE */
 
 	/*	Device Info */
 	/*	Type: */
@@ -4336,7 +4558,7 @@ void issue_p2p_GO_request(_adapter *padapter, u8 *raddr)
 
 void issue_p2p_GO_response(_adapter *padapter, u8 *raddr, u8 *frame_body, uint len, u8 result)
 {
-
+	struct p2p_channels *ch_list = &(adapter_to_rfctl(padapter)->channel_list);
 	unsigned char category = RTW_WLAN_CATEGORY_PUBLIC;
 	u8			action = P2P_PUB_ACTION_ACTION;
 	u32			p2poui = cpu_to_be32(P2POUI);
@@ -4585,7 +4807,7 @@ void issue_p2p_GO_response(_adapter *padapter, u8 *raddr, u8 *frame_body, uint l
 
 	/*	Intended P2P Interface Address	 */
 	/*	Type: */
-	p2pie[p2pielen++] = P2P_ATTR_INTENTED_IF_ADDR;
+	p2pie[p2pielen++] = P2P_ATTR_INTENDED_IF_ADDR;
 
 	/*	Length: */
 	*(u16 *)(p2pie + p2pielen) = cpu_to_le16(ETH_ALEN);
@@ -4603,8 +4825,8 @@ void issue_p2p_GO_response(_adapter *padapter, u8 *raddr, u8 *frame_body, uint l
 	/* + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) */
 	/* + number of channels in all classes */
 	len_channellist_attr = 3
-		       + (1 + 1) * (u16)pmlmeext->channel_list.reg_classes
-		       + get_reg_classes_full_count(pmlmeext->channel_list);
+		       + (1 + 1) * (u16)ch_list->reg_classes
+		       + get_reg_classes_full_count(ch_list);
 
 #ifdef CONFIG_CONCURRENT_MODE
 	if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0)
@@ -4649,37 +4871,22 @@ void issue_p2p_GO_response(_adapter *padapter, u8 *raddr, u8 *frame_body, uint l
 
 		/*Channel List*/
 		p2pie[p2pielen++] = union_chan;
-	} else {
-		int i, j;
-		for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) {
-			/*	Operating Class */
-			p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class;
-
-			/*	Number of Channels */
-			p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels;
-
-			/*	Channel List */
-			for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++)
-				p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i];
-		}
-	}
-#else /* CONFIG_CONCURRENT_MODE */
+	} else
+#endif /* CONFIG_CONCURRENT_MODE */
 	{
 		int i, j;
-		for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) {
+		for (j = 0; j < ch_list->reg_classes; j++) {
 			/*	Operating Class */
-			p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class;
+			p2pie[p2pielen++] = ch_list->reg_class[j].reg_class;
 
 			/*	Number of Channels */
-			p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels;
+			p2pie[p2pielen++] = ch_list->reg_class[j].channels;
 
 			/*	Channel List */
-			for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++)
-				p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i];
+			for (i = 0; i < ch_list->reg_class[j].channels; i++)
+				p2pie[p2pielen++] = ch_list->reg_class[j].channel[i];
 		}
 	}
-#endif /* CONFIG_CONCURRENT_MODE */
-
 
 	/*	Device Info */
 	/*	Type: */
@@ -5005,7 +5212,7 @@ void issue_p2p_GO_confirm(_adapter *padapter, u8 *raddr, u8 result)
 
 void issue_p2p_invitation_request(_adapter *padapter, u8 *raddr)
 {
-
+	struct p2p_channels *ch_list = &(adapter_to_rfctl(padapter)->channel_list);
 	unsigned char category = RTW_WLAN_CATEGORY_PUBLIC;
 	u8			action = P2P_PUB_ACTION_ACTION;
 	u32			p2poui = cpu_to_be32(P2POUI);
@@ -5159,8 +5366,8 @@ void issue_p2p_invitation_request(_adapter *padapter, u8 *raddr)
 	/* + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) */
 	/* + number of channels in all classes */
 	len_channellist_attr = 3
-		       + (1 + 1) * (u16)pmlmeext->channel_list.reg_classes
-		       + get_reg_classes_full_count(pmlmeext->channel_list);
+		       + (1 + 1) * (u16)ch_list->reg_classes
+		       + get_reg_classes_full_count(ch_list);
 
 #ifdef CONFIG_CONCURRENT_MODE
 	if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0)
@@ -5202,36 +5409,22 @@ void issue_p2p_invitation_request(_adapter *padapter, u8 *raddr)
 
 		/*	Channel List */
 		p2pie[p2pielen++] = union_ch;
-	} else {
-		int i, j;
-		for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) {
-			/*	Operating Class */
-			p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class;
-
-			/*	Number of Channels */
-			p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels;
-
-			/*	Channel List */
-			for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++)
-				p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i];
-		}
-	}
-#else /* CONFIG_CONCURRENT_MODE */
+	} else
+#endif /* CONFIG_CONCURRENT_MODE */
 	{
 		int i, j;
-		for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) {
+		for (j = 0; j < ch_list->reg_classes; j++) {
 			/*	Operating Class */
-			p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class;
+			p2pie[p2pielen++] = ch_list->reg_class[j].reg_class;
 
 			/*	Number of Channels */
-			p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels;
+			p2pie[p2pielen++] = ch_list->reg_class[j].channels;
 
 			/*	Channel List */
-			for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++)
-				p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i];
+			for (i = 0; i < ch_list->reg_class[j].channels; i++)
+				p2pie[p2pielen++] = ch_list->reg_class[j].channel[i];
 		}
 	}
-#endif /* CONFIG_CONCURRENT_MODE */
 
 
 	/*	P2P Group ID */
@@ -5319,7 +5512,7 @@ void issue_p2p_invitation_request(_adapter *padapter, u8 *raddr)
 
 void issue_p2p_invitation_response(_adapter *padapter, u8 *raddr, u8 dialogToken, u8 status_code)
 {
-
+	struct p2p_channels *ch_list = &(adapter_to_rfctl(padapter)->channel_list);
 	unsigned char category = RTW_WLAN_CATEGORY_PUBLIC;
 	u8			action = P2P_PUB_ACTION_ACTION;
 	u32			p2poui = cpu_to_be32(P2POUI);
@@ -5477,8 +5670,8 @@ void issue_p2p_invitation_response(_adapter *padapter, u8 *raddr, u8 dialogToken
 		/* + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) */
 		/* + number of channels in all classes */
 		len_channellist_attr = 3
-			+ (1 + 1) * (u16)pmlmeext->channel_list.reg_classes
-			+ get_reg_classes_full_count(pmlmeext->channel_list);
+			+ (1 + 1) * (u16)ch_list->reg_classes
+			+ get_reg_classes_full_count(ch_list);
 
 #ifdef CONFIG_CONCURRENT_MODE
 		if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0)
@@ -5520,36 +5713,22 @@ void issue_p2p_invitation_response(_adapter *padapter, u8 *raddr, u8 dialogToken
 
 			/*	Channel List */
 			p2pie[p2pielen++] = union_ch;
-		} else {
-			int i, j;
-			for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) {
-				/*	Operating Class */
-				p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class;
-
-				/*	Number of Channels */
-				p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels;
-
-				/*	Channel List */
-				for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++)
-					p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i];
-			}
-		}
-#else /* CONFIG_CONCURRENT_MODE */
+		} else
+#endif /* CONFIG_CONCURRENT_MODE */
 		{
 			int i, j;
-			for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) {
+			for (j = 0; j < ch_list->reg_classes; j++) {
 				/*	Operating Class */
-				p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class;
+				p2pie[p2pielen++] = ch_list->reg_class[j].reg_class;
 
 				/*	Number of Channels */
-				p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels;
+				p2pie[p2pielen++] = ch_list->reg_class[j].channels;
 
 				/*	Channel List */
-				for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++)
-					p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i];
+				for (i = 0; i < ch_list->reg_class[j].channels; i++)
+					p2pie[p2pielen++] = ch_list->reg_class[j].channel[i];
 			}
 		}
-#endif /* CONFIG_CONCURRENT_MODE */
 	}
 
 	pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen);
@@ -5735,6 +5914,12 @@ void issue_probersp_p2p(_adapter *padapter, unsigned char *da)
 	pattrib = &pmgntframe->attrib;
 	update_mgntframe_attrib(padapter, pattrib);
 
+	if (IS_CCK_RATE(pattrib->rate)) {
+		/* force OFDM 6M rate */
+		pattrib->rate = MGN_6M;
+		pattrib->raid = rtw_get_mgntframe_raid(padapter, WIRELESS_11G);
+	}
+
 	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
 
 	pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
@@ -6055,6 +6240,11 @@ int _issue_probereq_p2p(_adapter *padapter, u8 *da, int wait_ack)
 	pattrib = &pmgntframe->attrib;
 	update_mgntframe_attrib(padapter, pattrib);
 
+	if (IS_CCK_RATE(pattrib->rate)) {
+		/* force OFDM 6M rate */
+		pattrib->rate = MGN_6M;
+		pattrib->raid = rtw_get_mgntframe_raid(padapter, WIRELESS_11G);
+	}
 
 	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
 
@@ -6439,7 +6629,7 @@ unsigned int on_action_public_p2p(union recv_frame *precv_frame)
 	_cancel_timer_ex(&pwdinfo->reset_ch_sitesurvey);
 #ifdef CONFIG_IOCTL_CFG80211
 	if (adapter_wdev_data(padapter)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211)
-		rtw_cfg80211_rx_p2p_action_public(padapter, pframe, len);
+		rtw_cfg80211_rx_p2p_action_public(padapter, precv_frame);
 	else
 #endif /* CONFIG_IOCTL_CFG80211 */
 	{
@@ -6610,7 +6800,7 @@ unsigned int on_action_public_p2p(union recv_frame *precv_frame)
 									u8 operatingch_info[5] = { 0x00 };
 									if (rtw_get_p2p_attr_content(merged_p2pie, merged_p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info,
 										&attr_contentlen)) {
-										if (rtw_ch_set_search_ch(padapter->mlmeextpriv.channel_set, (u32)operatingch_info[4]) >= 0) {
+										if (rtw_chset_search_ch(adapter_to_chset(padapter), (u32)operatingch_info[4]) >= 0) {
 											/*	The operating channel is acceptable for this device. */
 											pwdinfo->rx_invitereq_info.operation_ch[0] = operatingch_info[4];
 #ifdef CONFIG_P2P_OP_CHK_SOCIAL_CH
@@ -6833,7 +7023,7 @@ unsigned int on_action_public_default(union recv_frame *precv_frame, u8 action)
 
 #ifdef CONFIG_IOCTL_CFG80211
 	cnt += sprintf((msg + cnt), "%s(token:%u)", action_public_str(action), token);
-	rtw_cfg80211_rx_action(adapter, pframe, frame_len, msg);
+	rtw_cfg80211_rx_action(adapter, precv_frame, msg);
 #endif
 
 	ret = _SUCCESS;
@@ -7131,9 +7321,9 @@ unsigned int OnAction_p2p(_adapter *padapter, union recv_frame *precv_frame)
 
 #ifdef CONFIG_IOCTL_CFG80211
 	if (adapter_wdev_data(padapter)->p2p_enabled
-	    && pwdinfo->driver_interface == DRIVER_CFG80211
-	   ) {
-		rtw_cfg80211_rx_action_p2p(padapter, pframe, len);
+		&& pwdinfo->driver_interface == DRIVER_CFG80211
+	) {
+		rtw_cfg80211_rx_action_p2p(padapter, precv_frame);
 		return _SUCCESS;
 	} else
 #endif /* CONFIG_IOCTL_CFG80211 */
@@ -7361,7 +7551,7 @@ void update_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib)
 
 	pattrib->pktlen = 0;
 
-	if (pmlmeext->tx_rate == IEEE80211_CCK_RATE_1MB)
+	if (IS_CCK_RATE(pmlmeext->tx_rate))
 		wireless_mode = WIRELESS_11B;
 	else
 		wireless_mode = WIRELESS_11G;
@@ -8698,6 +8888,7 @@ void _issue_assocreq(_adapter *padapter, u8 is_reassoc)
 #endif /* CONFIG_P2P */
 
 #ifdef CONFIG_DFS
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 	u16	cap;
 
 	/* Dot H */
@@ -8781,16 +8972,17 @@ void _issue_assocreq(_adapter *padapter, u8 is_reassoc)
 		pframe = rtw_set_ie(pframe, EID_PowerCap, 2, pow_cap_ele, &(pattrib->pktlen));
 
 		/* supported channels */
-		do {
-			if (pmlmeext->channel_set[sup_ch_idx].ChannelNum <= 14) {
+		while (sup_ch_idx < rfctl->max_chan_nums && rfctl->channel_set[sup_ch_idx].ChannelNum != 0) {
+			if (rfctl->channel_set[sup_ch_idx].ChannelNum <= 14) {
+				/* TODO: fix 2.4G supported channel when channel doesn't start from 1 and continuous */
 				sup_ch[0] = 1;	/* First channel number */
-				sup_ch[1] = pmlmeext->channel_set[sup_ch_idx].ChannelNum;	/* Number of channel */
+				sup_ch[1] = rfctl->channel_set[sup_ch_idx].ChannelNum;	/* Number of channel */
 			} else {
-				sup_ch[idx_5g++] = pmlmeext->channel_set[sup_ch_idx].ChannelNum;
+				sup_ch[idx_5g++] = rfctl->channel_set[sup_ch_idx].ChannelNum;
 				sup_ch[idx_5g++] = 1;
 			}
 			sup_ch_idx++;
-		} while (pmlmeext->channel_set[sup_ch_idx].ChannelNum != 0);
+		}
 		pframe = rtw_set_ie(pframe, EID_SupportedChannels, idx_5g, sup_ch, &(pattrib->pktlen));
 	}
 #endif /* CONFIG_DFS */
@@ -9850,6 +10042,12 @@ static int issue_action_ba(_adapter *padapter, unsigned char *raddr, unsigned ch
 			BA_para_set = (0x1002 | ((tid & 0xf) << 2)); /* immediate ack & 64 buffer size */
 #endif
 
+#ifdef CONFIG_TX_AMSDU
+			if (padapter->tx_amsdu >= 1) /* TX AMSDU  enabled */
+				BA_para_set |= BIT(0);
+			else /* TX AMSDU disabled */
+				BA_para_set &= ~BIT(0);
+#endif
 			BA_para_set = cpu_to_le16(BA_para_set);
 			pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen));
 
@@ -10017,8 +10215,8 @@ inline u8 issue_addba_rsp_wait_ack(_adapter *adapter, unsigned char *ra, u8 tid,
 	}
 
 	if (try_cnt && wait_ms) {
-		RTW_INFO(FUNC_ADPT_FMT" ra="MAC_FMT" tid=%u%s, %d/%d in %u ms\n"
-			, FUNC_ADPT_ARG(adapter), MAC_ARG(ra), tid
+		RTW_INFO(FUNC_ADPT_FMT" ra="MAC_FMT" status:=%u tid=%u size:%u%s, %d/%d in %u ms\n"
+			, FUNC_ADPT_ARG(adapter), MAC_ARG(ra), status, tid, size
 			, ret == _SUCCESS ? ", acked" : "", i, try_cnt, rtw_get_passing_time_ms(start));
 	}
 
@@ -10497,6 +10695,14 @@ unsigned int send_beacon(_adapter *padapter)
 #endif
 
 #ifdef CONFIG_PCI_HCI
+	/* bypass TX BCN queue because op ch is switching/waiting */
+	if (check_fwstate(&padapter->mlmepriv, WIFI_OP_CH_SWITCHING)
+		#ifdef CONFIG_DFS_MASTER
+		|| IS_CH_WAITING(adapter_to_rfctl(padapter))
+		#endif
+	)
+		return _SUCCESS;
+
 	/* RTW_INFO("%s\n", __FUNCTION__); */
 
 	rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL);
@@ -10518,6 +10724,14 @@ unsigned int send_beacon(_adapter *padapter)
 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
 	u32 start = rtw_get_current_time();
 
+	/* bypass TX BCN queue because op ch is switching/waiting */
+	if (check_fwstate(&padapter->mlmepriv, WIFI_OP_CH_SWITCHING)
+		#ifdef CONFIG_DFS_MASTER
+		|| IS_CH_WAITING(adapter_to_rfctl(padapter))
+		#endif
+	)
+		return _SUCCESS;
+
 	rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL);
 	rtw_hal_set_hwreg(padapter, HW_VAR_DL_BCN_SEL, NULL);
 	do {
@@ -10962,7 +11176,10 @@ void start_clnt_join(_adapter *padapter)
 			}
 		} else
 #endif
+		{
+			rtw_sta_linking_test_set_start();
 			pmlmeinfo->state = WIFI_FW_AUTH_NULL | WIFI_FW_STATION_STATE;
+		}
 	} else if (caps & cap_IBSS) { /* adhoc client */
 		Set_MSR(padapter, WIFI_FW_ADHOC_STATE);
 
@@ -11062,6 +11279,7 @@ unsigned int receive_disconnect(_adapter *padapter, unsigned char *MacAddr, unsi
 #ifdef CONFIG_80211D
 static void process_80211d(PADAPTER padapter, WLAN_BSSID_EX *bssid)
 {
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 	struct registry_priv *pregistrypriv;
 	struct mlme_ext_priv *pmlmeext;
 	RT_CHANNEL_INFO *chplan_new;
@@ -11126,7 +11344,7 @@ static void process_80211d(PADAPTER padapter, WLAN_BSSID_EX *bssid)
 		_RTW_INFO("}\n");
 #endif
 
-		_rtw_memcpy(chplan_sta, pmlmeext->channel_set, sizeof(chplan_sta));
+		_rtw_memcpy(chplan_sta, rfctl->channel_set, sizeof(chplan_sta));
 #ifdef CONFIG_RTW_DEBUG
 		i = 0;
 		RTW_INFO("%s: STA channel plan {", __FUNCTION__);
@@ -11137,8 +11355,8 @@ static void process_80211d(PADAPTER padapter, WLAN_BSSID_EX *bssid)
 		_RTW_INFO("}\n");
 #endif
 
-		_rtw_memset(pmlmeext->channel_set, 0, sizeof(pmlmeext->channel_set));
-		chplan_new = pmlmeext->channel_set;
+		_rtw_memset(rfctl->channel_set, 0, sizeof(rfctl->channel_set));
+		chplan_new = rfctl->channel_set;
 
 		i = j = k = 0;
 		if (pregistrypriv->wireless_mode & WIRELESS_11G) {
@@ -11302,13 +11520,13 @@ static void process_80211d(PADAPTER padapter, WLAN_BSSID_EX *bssid)
 
 	/* If channel is used by AP, set channel scan type to active */
 	channel = bssid->Configuration.DSConfig;
-	chplan_new = pmlmeext->channel_set;
+	chplan_new = rfctl->channel_set;
 	i = 0;
-	while ((i < MAX_CHANNEL_NUM) && (chplan_new[i].ChannelNum != 0)) {
+	while (i < MAX_CHANNEL_NUM && chplan_new[i].ChannelNum != 0) {
 		if (chplan_new[i].ChannelNum == channel) {
 			if (chplan_new[i].ScanType == SCAN_PASSIVE) {
 				/* 5G Bnad 2, 3 (DFS) doesn't change to active scan */
-				if (channel >= 52 && channel <= 144)
+				if (rtw_is_dfs_ch(channel))
 					break;
 
 				chplan_new[i].ScanType = SCAN_ACTIVE;
@@ -11339,6 +11557,8 @@ void report_survey_event(_adapter *padapter, union recv_frame *precv_frame)
 	struct cmd_priv *pcmdpriv;
 	/* u8 *pframe = precv_frame->u.hdr.rx_data; */
 	/* uint len = precv_frame->u.hdr.len; */
+	RT_CHANNEL_INFO *chset = adapter_to_chset(padapter);
+	int ch_set_idx = -1;
 
 	if (!padapter)
 		return;
@@ -11384,6 +11604,15 @@ void report_survey_event(_adapter *padapter, union recv_frame *precv_frame)
 	process_80211d(padapter, &psurvey_evt->bss);
 #endif
 
+#ifdef CONFIG_DFS
+	ch_set_idx = rtw_chset_search_ch(chset, psurvey_evt->bss.Configuration.DSConfig);
+	if (ch_set_idx >= 0) {
+		if (psurvey_evt->bss.Ssid.SsidLength == 0
+			|| is_all_null(psurvey_evt->bss.Ssid.Ssid, psurvey_evt->bss.Ssid.SsidLength) == _TRUE)
+			chset[ch_set_idx].hidden_bss_cnt++;
+	}
+#endif
+
 	rtw_enqueue_cmd(pcmdpriv, pcmd_obj);
 
 	pmlmeext->sitesurvey_res.bss_cnt++;
@@ -11927,6 +12156,7 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res)
 	}
 #ifdef CONFIG_ARP_KEEP_ALIVE
 	pmlmepriv->bGetGateway = 1;
+	pmlmepriv->GetGatewayTryCnt = 0;
 #endif
 
 	if ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) {
@@ -11966,6 +12196,10 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res)
 
 		psta->wireless_mode = pmlmeext->cur_wireless_mode;
 
+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+		rtw_hal_set_default_port_id_cmd(padapter, psta->mac_id);
+#endif
+
 		/* set per sta rate after updating HT cap. */
 		set_sta_rate(padapter, psta);
 
@@ -11995,7 +12229,7 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res)
 	}
 
 #ifdef CONFIG_LPS
-	#ifndef CONFIG_SUPPORT_FW_MULTI_PORT
+	#ifndef CONFIG_FW_MULTI_PORT_SUPPORT
 	if (get_hw_port(padapter) == HW_PORT0)
 	#endif
 		rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_CONNECT, 0);
@@ -12353,6 +12587,8 @@ void linked_status_chk(_adapter *padapter, u8 from_timer)
 	struct recv_priv	*precvpriv = &padapter->recvpriv;
 #endif
 
+	if (padapter->registrypriv.mp_mode == _TRUE)
+		return;
 
 	if (is_client_associated_to_ap(padapter)) {
 		/* linked infrastructure client mode */
@@ -12390,8 +12626,9 @@ void linked_status_chk(_adapter *padapter, u8 from_timer)
 		rx_chk_limit = 8;
 #endif
 #ifdef CONFIG_ARP_KEEP_ALIVE
-		if (!from_timer && pmlmepriv->bGetGateway == 1) {
-			RTW_INFO("do rtw_gw_addr_query()");
+		if (!from_timer && pmlmepriv->bGetGateway == 1 && pmlmepriv->GetGatewayTryCnt < 3) {
+			RTW_INFO("do rtw_gw_addr_query() : %d\n", pmlmepriv->GetGatewayTryCnt);
+			pmlmepriv->GetGatewayTryCnt++;
 			if (rtw_gw_addr_query(padapter) == 0)
 				pmlmepriv->bGetGateway = 0;
 			else {
@@ -12451,7 +12688,7 @@ void linked_status_chk(_adapter *padapter, u8 from_timer)
 				&& (!rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC))
 				#endif
 			) {
-				u8 backup_ch = 0, backup_bw, backup_offset;
+				u8 backup_ch = 0, backup_bw = 0, backup_offset = 0;
 				u8 union_ch = 0, union_bw, union_offset;
 
 				if (!rtw_mi_get_ch_setting_union(padapter, &union_ch, &union_bw, &union_offset)
@@ -12576,8 +12813,9 @@ bypass_active_keep_alive:
 
 }
 
-void survey_timer_hdl(_adapter *padapter)
+void survey_timer_hdl(void *ctx)
 {
+	_adapter *padapter = (_adapter *)ctx;
 	struct cmd_obj *cmd;
 	struct sitesurvey_parm *psurveyPara;
 	struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
@@ -12608,8 +12846,9 @@ exit:
 	return;
 }
 
-void link_timer_hdl(_adapter *padapter)
+void link_timer_hdl(void *ctx)
 {
+	_adapter *padapter = (_adapter *)ctx;
 	/* static unsigned int		rx_pkt = 0; */
 	/* static u64				tx_cnt = 0; */
 	/* struct xmit_priv		*pxmitpriv = &(padapter->xmitpriv); */
@@ -12622,6 +12861,9 @@ void link_timer_hdl(_adapter *padapter)
 	WLAN_BSSID_EX		*pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network));
 #endif
 
+	if (rtw_sta_linking_test_force_fail())
+		RTW_INFO("rtw_sta_linking_test_force_fail\n");
+
 	if (pmlmeinfo->state & WIFI_FW_AUTH_NULL) {
 		RTW_INFO("link_timer_hdl:no beacon while connecting\n");
 		pmlmeinfo->state = WIFI_FW_NULL_STATE;
@@ -12678,8 +12920,10 @@ void link_timer_hdl(_adapter *padapter)
 	return;
 }
 
-void addba_timer_hdl(struct sta_info *psta)
+void addba_timer_hdl(void *ctx)
 {
+	struct sta_info *psta = (struct sta_info *)ctx;
+
 #ifdef CONFIG_80211N_HT
 	struct ht_priv	*phtpriv;
 
@@ -12757,15 +13001,16 @@ void report_sta_timeout_event(_adapter *padapter, u8 *MacAddr, unsigned short re
 void clnt_sa_query_timeout(_adapter *padapter)
 {
 
-	rtw_disassoc_cmd(padapter, 0, _TRUE);
+	rtw_disassoc_cmd(padapter, 0, 0);
 	rtw_indicate_disconnect(padapter, 0, _FALSE);
 	rtw_free_assoc_resources(padapter, 1);
 
 	RTW_INFO("SA query timeout client disconnect\n");
 }
 
-void sa_query_timer_hdl(struct sta_info *psta)
+void sa_query_timer_hdl(void *ctx)
 {
+	struct sta_info *psta = (struct sta_info *)ctx;
 	_adapter *padapter = psta->padapter;
 	_irqL irqL;
 	struct sta_priv *pstapriv = &padapter->stapriv;
@@ -12791,8 +13036,9 @@ void start_clnt_ft_action(_adapter *padapter, u8 *pTargetAddr)
 	_set_timer(&pmlmeext->ft_link_timer, REASSOC_TO);
 }
 
-void ft_link_timer_hdl(_adapter *padapter)
+void ft_link_timer_hdl(void *ctx)
 {
+	_adapter *padapter = (_adapter *)ctx;
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
@@ -12814,8 +13060,9 @@ void ft_link_timer_hdl(_adapter *padapter)
 	}
 }
 
-void ft_roam_timer_hdl(_adapter *padapter)
+void ft_roam_timer_hdl(void *ctx)
 {
+	_adapter *padapter = (_adapter *)ctx;
 	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
 
 	receive_disconnect(padapter, pmlmepriv->cur_network.network.MacAddress
@@ -13173,14 +13420,6 @@ u8 createbss_hdl(_adapter *padapter, u8 *pbuf)
 		pmlmeinfo->agg_enable_bitmap = 0;
 		pmlmeinfo->candidate_tid_bitmap = 0;
 
-		/* config the initial gain under linking, need to write the BB registers */
-		/* initialgain = 0x1E; */
-		/*rtw_hal_set_odm_var(padapter, HAL_ODM_INITIAL_GAIN, &initialgain, _FALSE);*/
-
-		/* disable dynamic functions, such as high power, DIG */
-		rtw_phydm_ability_backup(padapter);
-		rtw_phydm_func_disable_all(padapter);
-
 		/* cancel link timer */
 		_cancel_timer_ex(&pmlmeext->link_timer);
 
@@ -13422,6 +13661,8 @@ u8 disconnect_hdl(_adapter *padapter, unsigned char *pbuf)
 
 	rtw_free_uc_swdec_pending_queue(padapter);
 
+	rtw_sta_mstatus_report(padapter);
+
 	return	H2C_SUCCESS;
 }
 
@@ -13592,7 +13833,7 @@ static int rtw_scan_ch_decision(_adapter *padapter, struct rtw_ieee80211_channel
 	int scan_ch_num = 0;
 	int set_idx;
 	u8 chan;
-	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 
 	/* clear first */
 	_rtw_memset(out, 0, sizeof(struct rtw_ieee80211_channel) * out_num);
@@ -13609,7 +13850,7 @@ static int rtw_scan_ch_decision(_adapter *padapter, struct rtw_ieee80211_channel
 		if (rtw_mlme_band_check(padapter, in[i].hw_value) == _FALSE)
 			continue;
 
-		set_idx = rtw_ch_set_search_ch(pmlmeext->channel_set, in[i].hw_value);
+		set_idx = rtw_chset_search_ch(rfctl->channel_set, in[i].hw_value);
 		if (set_idx >= 0) {
 			if (j >= out_num) {
 				RTW_PRINT(FUNC_ADPT_FMT" out_num:%u not enough\n",
@@ -13619,7 +13860,7 @@ static int rtw_scan_ch_decision(_adapter *padapter, struct rtw_ieee80211_channel
 
 			_rtw_memcpy(&out[j], &in[i], sizeof(struct rtw_ieee80211_channel));
 
-			if (pmlmeext->channel_set[set_idx].ScanType == SCAN_PASSIVE)
+			if (rfctl->channel_set[set_idx].ScanType == SCAN_PASSIVE)
 				out[j].flags |= RTW_IEEE80211_CHAN_PASSIVE_SCAN;
 
 			j++;
@@ -13630,8 +13871,8 @@ static int rtw_scan_ch_decision(_adapter *padapter, struct rtw_ieee80211_channel
 
 	/* if out is empty, use channel_set as default */
 	if (j == 0) {
-		for (i = 0; i < pmlmeext->max_chan_nums; i++) {
-			chan = pmlmeext->channel_set[i].ChannelNum;
+		for (i = 0; i < rfctl->max_chan_nums; i++) {
+			chan = rfctl->channel_set[i].ChannelNum;
 			if (rtw_mlme_band_check(padapter, chan) == _TRUE) {
 				if (rtw_mlme_ignore_chan(padapter, chan) == _TRUE)
 					continue;
@@ -13647,7 +13888,7 @@ static int rtw_scan_ch_decision(_adapter *padapter, struct rtw_ieee80211_channel
 
 				out[j].hw_value = chan;
 
-				if (pmlmeext->channel_set[i].ScanType == SCAN_PASSIVE)
+				if (rfctl->channel_set[i].ScanType == SCAN_PASSIVE)
 					out[j].flags |= RTW_IEEE80211_CHAN_PASSIVE_SCAN;
 
 				j++;
@@ -13664,10 +13905,14 @@ static int rtw_scan_ch_decision(_adapter *padapter, struct rtw_ieee80211_channel
 static void sitesurvey_res_reset(_adapter *adapter, struct sitesurvey_parm *parm)
 {
 	struct ss_res *ss = &adapter->mlmeextpriv.sitesurvey_res;
+	RT_CHANNEL_INFO *chset = adapter_to_chset(adapter);
 	int i;
 
 	ss->bss_cnt = 0;
 	ss->channel_idx = 0;
+#ifdef CONFIG_DFS
+	ss->dfs_ch_ssid_scan = 0;
+#endif
 	ss->igi_scan = 0;
 	ss->igi_before_scan = 0;
 #ifdef CONFIG_SCAN_BACKOP
@@ -13677,10 +13922,12 @@ static void sitesurvey_res_reset(_adapter *adapter, struct sitesurvey_parm *parm
 	ss->is_sw_antdiv_bl_scan = 0;
 #endif
 
+	ss->ssid_num = 0;
 	for (i = 0; i < RTW_SSID_SCAN_AMOUNT; i++) {
 		if (parm->ssid[i].SsidLength) {
 			_rtw_memcpy(ss->ssid[i].Ssid, parm->ssid[i].Ssid, IW_ESSID_MAX_SIZE);
 			ss->ssid[i].SsidLength = parm->ssid[i].SsidLength;
+			ss->ssid_num++;
 		} else
 			ss->ssid[i].SsidLength = 0;
 	}
@@ -13690,6 +13937,11 @@ static void sitesurvey_res_reset(_adapter *adapter, struct sitesurvey_parm *parm
 					  , parm->ch, parm->ch_num
 					 );
 
+#ifdef CONFIG_DFS
+	for (i = 0; i < MAX_CHANNEL_NUM; i++)
+		chset[i].hidden_bss_cnt = 0;
+#endif
+
 	ss->scan_mode = parm->scan_mode;
 }
 
@@ -13701,7 +13953,8 @@ static u8 sitesurvey_pick_ch_behavior(_adapter *padapter, u8 *ch, RT_SCAN_TYPE *
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
 	struct ss_res *ss = &pmlmeext->sitesurvey_res;
-
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
+	int ch_set_idx;
 #ifdef CONFIG_P2P
 	struct wifidirect_info *pwdinfo = &padapter->wdinfo;
 #endif
@@ -13721,12 +13974,10 @@ static u8 sitesurvey_pick_ch_behavior(_adapter *padapter, u8 *ch, RT_SCAN_TYPE *
 		* Commented by Albert 2011/06/03
 		* The driver is in the find phase, it should go through the social channel.
 		*/
-		int ch_set_idx;
-
 		scan_ch = pwdinfo->social_chan[ss->channel_idx];
-		ch_set_idx = rtw_ch_set_search_ch(pmlmeext->channel_set, scan_ch);
+		ch_set_idx = rtw_chset_search_ch(rfctl->channel_set, scan_ch);
 		if (ch_set_idx >= 0)
-			scan_type = pmlmeext->channel_set[ch_set_idx].ScanType;
+			scan_type = rfctl->channel_set[ch_set_idx].ScanType;
 		else
 			scan_type = SCAN_ACTIVE;
 	} else
@@ -13734,6 +13985,20 @@ static u8 sitesurvey_pick_ch_behavior(_adapter *padapter, u8 *ch, RT_SCAN_TYPE *
 	{
 		struct rtw_ieee80211_channel *ch;
 
+#ifdef CONFIG_DFS
+		if (ss->channel_idx != 0 && ss->dfs_ch_ssid_scan == 0
+			&& pmlmeext->sitesurvey_res.ssid_num
+			&& rtw_is_dfs_ch(ss->ch[ss->channel_idx - 1].hw_value)
+		) {
+			ch_set_idx = rtw_chset_search_ch(rfctl->channel_set, ss->ch[ss->channel_idx - 1].hw_value);
+			if (ch_set_idx != -1 && rfctl->channel_set[ch_set_idx].hidden_bss_cnt) {
+				ss->channel_idx--;
+				ss->dfs_ch_ssid_scan = 1;
+			}
+		} else
+			ss->dfs_ch_ssid_scan = 0;
+#endif /* CONFIG_DFS */
+
 		if (ss->channel_idx < ss->ch_num) {
 			ch = &ss->ch[ss->channel_idx];
 			scan_ch = ch->hw_value;
@@ -13828,6 +14093,8 @@ void site_survey(_adapter *padapter, u8 survey_channel, RT_SCAN_TYPE ScanType)
 {
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct ss_res *ss = &pmlmeext->sitesurvey_res;
+	u8 ssid_scan = 0;
 
 #ifdef CONFIG_P2P
 	struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
@@ -13849,30 +14116,26 @@ void site_survey(_adapter *padapter, u8 survey_channel, RT_SCAN_TYPE ScanType)
 		}
 #endif
 
+#ifdef CONFIG_DFS
+		if (ScanType == SCAN_PASSIVE && ss->dfs_ch_ssid_scan)
+			ssid_scan = 1;
+		else
+#endif
 		if (ScanType == SCAN_ACTIVE) {
 #ifdef CONFIG_P2P
-			if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) ||
-			    rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH)
-			   ) {
+			#ifdef CONFIG_IOCTL_CFG80211
+			if (rtw_cfg80211_is_p2p_scan(padapter))
+			#else
+			if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN)
+				|| rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH))
+			#endif
+			{
 				issue_probereq_p2p(padapter, NULL);
 				issue_probereq_p2p(padapter, NULL);
 				issue_probereq_p2p(padapter, NULL);
 			} else
 #endif /* CONFIG_P2P */
 			{
-				int i;
-
-				for (i = 0; i < RTW_SSID_SCAN_AMOUNT; i++) {
-					if (pmlmeext->sitesurvey_res.ssid[i].SsidLength) {
-						/* IOT issue, When wifi_spec is not set, send one probe req without WPS IE. */
-						if (padapter->registrypriv.wifi_spec)
-							issue_probereq(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), NULL);
-						else
-							issue_probereq_ex(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), NULL, 0, 0, 0, 0);
-						issue_probereq(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), NULL);
-					}
-				}
-
 				if (pmlmeext->sitesurvey_res.scan_mode == SCAN_ACTIVE) {
 					/* IOT issue, When wifi_spec is not set, send one probe req without WPS IE. */
 					if (padapter->registrypriv.wifi_spec)
@@ -13881,6 +14144,23 @@ void site_survey(_adapter *padapter, u8 survey_channel, RT_SCAN_TYPE ScanType)
 						issue_probereq_ex(padapter, NULL, NULL, 0, 0, 0, 0);
 					issue_probereq(padapter, NULL, NULL);
 				}
+
+				ssid_scan = 1;
+			}
+		}
+
+		if (ssid_scan) {
+			int i;
+
+			for (i = 0; i < RTW_SSID_SCAN_AMOUNT; i++) {
+				if (pmlmeext->sitesurvey_res.ssid[i].SsidLength) {
+					/* IOT issue, When wifi_spec is not set, send one probe req without WPS IE. */
+					if (padapter->registrypriv.wifi_spec)
+						issue_probereq(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), NULL);
+					else
+						issue_probereq_ex(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), NULL, 0, 0, 0, 0);
+					issue_probereq(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), NULL);
+				}
 			}
 		}
 	} else {
@@ -13965,6 +14245,10 @@ u8 sitesurvey_ps_annc(_adapter *padapter, bool ps)
 {
 	u8 ps_anc = 0;
 
+	#ifdef CONFIG_AP_MODE
+	/*mac-id sleep or wake-up for AP mode*/
+	rtw_mi_ap_acdata_control(padapter, ps);
+	#endif/*CONFIG_AP_MODE*/
 	if (rtw_mi_issue_nulldata(padapter, NULL, ps, 3, 500))
 		ps_anc = 1;
 	return ps_anc;
@@ -14087,6 +14371,14 @@ u8 sitesurvey_cmd_hdl(_adapter *padapter, u8 *pbuf)
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct ss_res *ss = &pmlmeext->sitesurvey_res;
+#ifdef	CONFIG_CHNL_LOAD_MAGT
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct PHY_DM_STRUCT	*p_dm_odm = &pHalData->odmpriv;
+	u16	*channel_clm = pHalData->clm_result;
+	int	clm_ch_index;
+	struct	_CCX_INFO	*ccx_info = &p_dm_odm->dm_ccx_info;
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
+#endif
 	u8 val8;
 
 #ifdef CONFIG_P2P
@@ -14174,6 +14466,9 @@ operation_by_state:
 		RT_SCAN_TYPE scan_type;
 		u8 next_state;
 		u32 scan_ms;
+#ifdef	CONFIG_CHNL_LOAD_MAGT
+		bool	ret;
+#endif
 
 #ifdef CONFIG_AUTO_CHNL_SEL_NHM
 		if ((ACS_ENABLE == GET_ACS_STATE(padapter)) && (0 != rtw_get_acs_channel(padapter))) {
@@ -14184,6 +14479,35 @@ operation_by_state:
 #endif
 
 		next_state = sitesurvey_pick_ch_behavior(padapter, &scan_ch, &scan_type);
+
+#ifdef	CONFIG_CHNL_LOAD_MAGT
+	if (padapter->clm_flag == TRUE) {
+
+		if ((next_state == SCAN_COMPLETE) || (ss->channel_idx != 0 && next_state == SCAN_PROCESS)) {
+
+			ret = phydm_check_clm_ready(p_dm_odm);
+			/*RTW_INFO("DBG_CLM %s ;  ss->ch = %u\n", __FUNCTION__,ss->ch[ss->channel_idx-1].hw_value);*/
+			if (ret == true) {
+				ccx_info->echo_CLM_en = false;
+				phydm_get_clm_result(p_dm_odm);
+				clm_ch_index = rtw_chset_search_ch(rfctl->channel_set, ss->ch[ss->channel_idx-1].hw_value);
+				channel_clm[clm_ch_index] = 0;
+				channel_clm[clm_ch_index] = ccx_info->CLM_result;
+				RTW_INFO("DBG_CLM %s :clm_index = %d ; ch = %u;CLM_result = %d\n", __FUNCTION__, clm_ch_index, ss->ch[ss->channel_idx-1].hw_value, ccx_info->CLM_result);
+			} else
+				RTW_INFO("DBG_CLM %s : CLM is not ready\n", __FUNCTION__);
+/*
+		RTW_INFO("DBG_CLM %s : ready = %d\n", __FUNCTION__, phydm_check_clm_ready(p_dm_odm));
+		RTW_INFO("DBG_CLM %s : ODM_REG_CLM_11N reg 890= 0x%x\n", __FUNCTION__, rtw_read32(padapter, ODM_REG_CLM_11N));
+		RTW_INFO("DBG_CLM %s : ODM_REG_CCX_PERIOD_11N reg 894= 0x%x\n", __FUNCTION__, rtw_read32(padapter, ODM_REG_CCX_PERIOD_11N));
+		RTW_INFO("DBG_CLM %s : ODM_REG_CLM_READY_11N reg 8B4= 0x%x\n", __FUNCTION__, rtw_read32(padapter, ODM_REG_CLM_READY_11N));
+		RTW_INFO("DBG_CLM %s :  end_time =%d\n", __FUNCTION__, rtw_get_current_time());
+		RTW_INFO("DBG_CLM %s :  end_time =%d ms\n", __FUNCTION__, rtw_systime_to_ms(rtw_get_current_time()));
+*/
+		}
+	}
+#endif
+
 		if (next_state != SCAN_PROCESS) {
 #ifdef CONFIG_AUTO_CHNL_SEL_NHM
 			if (ACS_ENABLE == GET_ACS_STATE(padapter)) {
@@ -14255,6 +14579,32 @@ operation_by_state:
 		}
 #endif
 
+#ifdef	CONFIG_CHNL_LOAD_MAGT
+
+	if (padapter->clm_flag == TRUE) {
+
+		scan_ms = ss->scan_ch_ms;
+		/*beacause scan_ms 200ms ,clm only can test less than 195ms ,otherwise 0x8b4[16] will not be true;difference=5ms*/
+		ccx_info->echo_CLM_en = TRUE;
+
+		ccx_info->CLM_period = pHalData->clm_period;		/*if CLM_period=0xC350; then 50000*4us=200ms*/
+		phydm_clm_setting(p_dm_odm);
+		phydm_clm_trigger(p_dm_odm);
+/*
+		RTW_INFO("DBG_CLM %s :  scan_ms =%u clm_period = 0x%x\n",__FUNCTION__, scan_ms, ccx_info->CLM_period);
+		RTW_INFO("DBG_CLM %s :  current_index = %d;cuurent_ch =%u\n",__FUNCTION__, ss->channel_idx,scan_ch);
+		RTW_INFO("DBG_CLM %s :  start_time =%d\n",__FUNCTION__, rtw_get_current_time());
+		RTW_INFO("DBG_CLM %s :  start_time =%d ms\n",__FUNCTION__, rtw_systime_to_ms(rtw_get_current_time()));
+		RTW_INFO(FUNC_ADPT_FMT" %s ch=%u at %dms\n"
+		 , FUNC_ADPT_ARG(padapter)
+		 , mlmeext_scan_state_str(pmlmeext)
+		 ,scan_ch
+		, rtw_get_passing_time_ms(padapter->mlmepriv.scan_start_time)
+		);
+*/
+	}
+#endif
+
 		set_survey_timer(pmlmeext, scan_ms);
 		break;
 	}
@@ -14697,7 +15047,6 @@ u8 add_ba_hdl(_adapter *padapter, unsigned char *pbuf)
 		/* pmlmeinfo->candidate_tid_bitmap |= (0x1 << pparm->tid);		 */
 		/* psta->htpriv.candidate_tid_bitmap |= BIT(pparm->tid); */
 		issue_addba_req(padapter, pparm->addr, (u8)pparm->tid);
-		/* _set_timer(&pmlmeext->ADDBA_timer, ADDBA_TO); */
 		_set_timer(&psta->addba_retry_timer, ADDBA_TO);
 	}
 #ifdef CONFIG_TDLS
@@ -15063,8 +15412,8 @@ void rtw_join_done_chk_ch(_adapter *adapter, int join_res)
 				continue;
 
 			if (check_fwstate(mlme, WIFI_AP_STATE)
-			    && check_fwstate(mlme, WIFI_ASOC_STATE)
-			   ) {
+				&& check_fwstate(mlme, WIFI_ASOC_STATE)
+			) {
 				bool is_grouped = rtw_is_chbw_grouped(u_ch, u_bw, u_offset
 					, mlmeext->cur_channel, mlmeext->cur_bwmode, mlmeext->cur_ch_offset);
 
@@ -15088,10 +15437,9 @@ void rtw_join_done_chk_ch(_adapter *adapter, int join_res)
 					rtw_start_bss_hdl_after_chbw_decided(iface);
 				}
 
+				clr_fwstate(mlme, WIFI_OP_CH_SWITCHING);
 				update_beacon(iface, 0, NULL, _TRUE);
 			}
-
-			clr_fwstate(mlme, WIFI_OP_CH_SWITCHING);
 		}
 
 #ifdef CONFIG_DFS_MASTER
@@ -15107,10 +15455,11 @@ void rtw_join_done_chk_ch(_adapter *adapter, int join_res)
 				continue;
 
 			if (check_fwstate(mlme, WIFI_AP_STATE)
-			    && check_fwstate(mlme, WIFI_ASOC_STATE))
+				&& check_fwstate(mlme, WIFI_ASOC_STATE)
+			) {
+				clr_fwstate(mlme, WIFI_OP_CH_SWITCHING);
 				update_beacon(iface, 0, NULL, _TRUE);
-
-			clr_fwstate(mlme, WIFI_OP_CH_SWITCHING);
+			}
 		}
 #ifdef CONFIG_DFS_MASTER
 		rtw_dfs_master_status_apply(adapter, MLME_STA_DISCONNECTED);
@@ -15252,21 +15601,22 @@ connect_allow_hdl:
 					continue;
 
 				if (check_fwstate(mlme, WIFI_AP_STATE)
-				    && check_fwstate(mlme, WIFI_ASOC_STATE)
-				   ) {
-#ifdef CONFIG_SPCT_CH_SWITCH
+					&& check_fwstate(mlme, WIFI_ASOC_STATE)
+				) {
+					#ifdef CONFIG_SPCT_CH_SWITCH
 					if (1)
 						rtw_ap_inform_ch_switch(iface, pmlmeext->cur_channel , pmlmeext->cur_ch_offset);
 					else
-#endif
+					#endif
 						rtw_sta_flush(iface, _FALSE);
 
 					rtw_hal_set_hwreg(iface, HW_VAR_CHECK_TXBUF, 0);
 					set_fwstate(mlme, WIFI_OP_CH_SWITCHING);
+
 				} else if (check_fwstate(mlme, WIFI_STATION_STATE)
 					&& check_fwstate(mlme, WIFI_ASOC_STATE)
-					  ) {
-					rtw_disassoc_cmd(iface, 500, _FALSE);
+				) {
+					rtw_disassoc_cmd(iface, 500, RTW_CMDF_DIRECTLY);
 					rtw_indicate_disconnect(iface, 0, _FALSE);
 					rtw_free_assoc_resources(iface, 1);
 				}
@@ -15315,7 +15665,7 @@ u8 set_ch_hdl(_adapter *padapter, u8 *pbuf)
 u8 set_chplan_hdl(_adapter *padapter, unsigned char *pbuf)
 {
 	struct SetChannelPlan_param *setChannelPlan_param;
-	struct mlme_priv *mlme = &padapter->mlmepriv;
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 
 	if (!pbuf)
@@ -15326,11 +15676,14 @@ u8 set_chplan_hdl(_adapter *padapter, unsigned char *pbuf)
 	if (!rtw_is_channel_plan_valid(setChannelPlan_param->channel_plan))
 		return H2C_PARAMETERS_ERROR;
 
-	mlme->country_ent = setChannelPlan_param->country_ent;
-	mlme->ChannelPlan = setChannelPlan_param->channel_plan;
+	rfctl->country_ent = setChannelPlan_param->country_ent;
+	rfctl->ChannelPlan = setChannelPlan_param->channel_plan;
 
-	pmlmeext->max_chan_nums = init_channel_set(padapter, setChannelPlan_param->channel_plan, pmlmeext->channel_set);
-	init_channel_list(padapter, pmlmeext->channel_set, pmlmeext->max_chan_nums, &pmlmeext->channel_list);
+	rfctl->max_chan_nums = init_channel_set(padapter, rfctl->ChannelPlan, rfctl->channel_set);
+	init_channel_list(padapter, rfctl->channel_set, &rfctl->channel_list);
+#ifdef CONFIG_TXPWR_LIMIT
+	rtw_txpwr_init_regd(rfctl);
+#endif
 
 	rtw_hal_set_odm_var(padapter, HAL_ODM_REGULATION, NULL, _TRUE);
 
@@ -15379,13 +15732,13 @@ u8 set_csa_hdl(_adapter *padapter, unsigned char *pbuf)
 
 	rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, &gval8);
 
-	rtw_disassoc_cmd(padapter, 0, _FALSE);
+	rtw_disassoc_cmd(padapter, 0, RTW_CMDF_DIRECTLY);
 	rtw_indicate_disconnect(padapter, 0, _FALSE);
 	rtw_free_assoc_resources(padapter, 1);
 	rtw_free_network_queue(padapter, _TRUE);
 
-	if (((new_ch_no >= 52) && (new_ch_no <= 64)) || ((new_ch_no >= 100) && (new_ch_no <= 140)))
-		RTW_INFO("Switched to DFS band (ch %02x) again!!\n", new_ch_no);
+	if (rtw_is_dfs_ch(new_ch_no))
+		RTW_INFO("Switched to DFS band (ch %u) again!!\n", new_ch_no);
 
 	return	H2C_SUCCESS;
 #else
@@ -15542,10 +15895,8 @@ u8 tdls_hdl(_adapter *padapter, unsigned char *pbuf)
 					rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CH_SW_TO_BASE_CHNL);
 			}
 		} else {
-			u8 bcancelled;
-
 			if (!(pchsw_info->ch_sw_state & TDLS_CH_SW_INITIATOR_STATE))
-				_cancel_timer(&ptdls_sta->ch_sw_timer, &bcancelled);
+				_cancel_timer_ex(&ptdls_sta->ch_sw_timer);
 		}
 
 
diff --git a/rtl8822BU/core/rtw_mp.c b/rtl8822BU/core/rtw_mp.c
index 9837d4e..9a024bd 100755..100644
--- a/rtl8822BU/core/rtw_mp.c
+++ b/rtl8822BU/core/rtw_mp.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_MP_C_
 #include <drv_types.h>
 #ifdef PLATFORM_FREEBSD
@@ -595,12 +590,12 @@ static u8 PHY_QueryRFPathSwitch(PADAPTER padapter)
 	} else
 */
 
-/*	if (IS_HARDWARE_TYPE_8821C(padapter)) {
+	if (IS_HARDWARE_TYPE_8821C(padapter)) {
 #ifdef CONFIG_RTL8821C
-		bmain = PHY_QueryRFPathSwitch_8821C(padapter);
+		bmain = phy_query_rf_path_switch_8821c(padapter);
 #endif
 	}
-*/
+
 	return bmain;
 }
 
@@ -671,7 +666,7 @@ MPT_InitializeAdapter(
 	pMptCtx->MptH2cRspEvent = _FALSE;
 	pMptCtx->MptBtC2hEvent = _FALSE;
 	_rtw_init_sema(&pMptCtx->MPh2c_Sema, 0);
-	_init_timer(&pMptCtx->MPh2c_timeout_timer, pAdapter->pnetdev, MPh2c_timeout_handle, pAdapter);
+	rtw_init_timer(&pMptCtx->MPh2c_timeout_timer, pAdapter, MPh2c_timeout_handle, pAdapter);
 #endif
 
 	mpt_InitHWConfig(pAdapter);
@@ -818,46 +813,39 @@ void rtw_mp_trigger_lck(PADAPTER padapter)
 	PHY_LCCalibrate(padapter);
 }
 
-static void disable_dm(PADAPTER padapter)
+static void init_mp_data(PADAPTER padapter)
 {
 	u8 v8;
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
 	struct PHY_DM_STRUCT		*pDM_Odm = &pHalData->odmpriv;
 
-	/* 3 1. disable firmware dynamic mechanism */
-	/* disable Power Training, Rate Adaptive */
+	/*disable BCN*/
 	v8 = rtw_read8(padapter, REG_BCN_CTRL);
 	v8 &= ~EN_BCN_FUNCTION;
 	rtw_write8(padapter, REG_BCN_CTRL, v8);
 
-	/* 3 2. disable driver dynamic mechanism */
-	rtw_phydm_func_disable_all(padapter);
-
-	/* enable APK, LCK and IQK but disable power tracking */
 	pDM_Odm->rf_calibrate_info.txpowertrack_control = _FALSE;
-	rtw_phydm_func_set(padapter, ODM_RF_CALIBRATION);
-
-	/* #ifdef CONFIG_BT_COEXIST */
-	/* rtw_btcoex_Switch(padapter, 0); */ /* remove for BT MP Down. */
-	/* #endif */
 }
 
-
 void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart)
 {
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
 	struct PHY_DM_STRUCT		*pDM_Odm = &pHalData->odmpriv;
+	u32	rf_ability;
 
 	if (bstart == 1) {
 		RTW_INFO("in MPT_PwrCtlDM start\n");
-		rtw_phydm_func_set(padapter, ODM_RF_TX_PWR_TRACK | ODM_RF_CALIBRATION);
+
+		rf_ability = ((u32)halrf_cmn_info_get(pDM_Odm, HALRF_CMNINFO_ABILITY)) | HAL_RF_TX_PWR_TRACK;
+		halrf_cmn_info_set(pDM_Odm, HALRF_CMNINFO_ABILITY, rf_ability);
 
 		pDM_Odm->rf_calibrate_info.txpowertrack_control = _TRUE;
 		padapter->mppriv.mp_dm = 1;
 
 	} else {
 		RTW_INFO("in MPT_PwrCtlDM stop\n");
-		disable_dm(padapter);
+		rf_ability = ((u32)halrf_cmn_info_get(pDM_Odm, HALRF_CMNINFO_ABILITY)) & ~HAL_RF_TX_PWR_TRACK;
+		halrf_cmn_info_set(pDM_Odm, HALRF_CMNINFO_ABILITY, rf_ability);
 		pDM_Odm->rf_calibrate_info.txpowertrack_control = _FALSE;
 		padapter->mppriv.mp_dm = 0;
 		{
@@ -938,7 +926,7 @@ u32 mp_join(PADAPTER padapter, u8 mode)
 
 	/* init mp_start_test status */
 	if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) {
-		rtw_disassoc_cmd(padapter, 500, _TRUE);
+		rtw_disassoc_cmd(padapter, 500, 0);
 		rtw_indicate_disconnect(padapter, 0, _FALSE);
 		rtw_free_assoc_resources(padapter, 1);
 	}
@@ -1016,17 +1004,10 @@ s32 mp_start_test(PADAPTER padapter)
 
 	padapter->registrypriv.mp_mode = 1;
 
-	/* 3 disable dynamic mechanism */
-	disable_dm(padapter);
+	init_mp_data(padapter);
 #ifdef CONFIG_RTL8814A
 	rtl8814_InitHalDm(padapter);
 #endif /* CONFIG_RTL8814A */
-#ifdef CONFIG_RTL8822B
-	rtl8822b_phy_init_haldm(padapter);
-#endif /* CONFIG_RTL8822B */
-#ifdef CONFIG_RTL8821C
-	rtl8821c_phy_init_haldm(padapter);
-#endif /* CONFIG_RTL8821C */
 #ifdef CONFIG_RTL8812A
 	rtl8812_InitHalDm(padapter);
 #endif /* CONFIG_RTL8812A */
@@ -1051,7 +1032,7 @@ s32 mp_start_test(PADAPTER padapter)
 
 	/* 3 0. update mp_priv */
 
-	if (padapter->registrypriv.rf_config == RF_MAX_TYPE) {
+	if (!RF_TYPE_VALID(padapter->registrypriv.rf_config)) {
 		/*		switch (phal->rf_type) { */
 		switch (GET_RF_TYPE(padapter)) {
 		case RF_1T1R:
@@ -1417,7 +1398,8 @@ exit:
 	pmptx->pallocated_buf = NULL;
 	pmptx->stop = 1;
 
-	thread_exit();
+	thread_exit(NULL);
+	return 0;
 }
 
 void fill_txdesc_for_mp(PADAPTER padapter, u8 *ptxdesc)
@@ -1939,8 +1921,10 @@ void SetPacketTx(PADAPTER padapter)
 	/* 3 6. start thread */
 #ifdef PLATFORM_LINUX
 	pmp_priv->tx.PktTxThread = kthread_run(mp_xmit_packet_thread, pmp_priv, "RTW_MP_THREAD");
-	if (IS_ERR(pmp_priv->tx.PktTxThread))
-		RTW_INFO("Create PktTx Thread Fail !!!!!\n");
+	if (IS_ERR(pmp_priv->tx.PktTxThread)) {
+		RTW_ERR("Create PktTx Thread Fail !!!!!\n");
+		pmp_priv->tx.PktTxThread = NULL;
+	}
 #endif
 #ifdef PLATFORM_FREEBSD
 	{
@@ -2710,6 +2694,17 @@ u8 rtw_mpRateParseFunc(PADAPTER pAdapter, u8 *targetStr)
 	return _FAIL;
 }
 
+u8 rtw_mp_mode_check(PADAPTER pAdapter)
+{
+	PADAPTER primary_adapter = GET_PRIMARY_ADAPTER(pAdapter);
+
+	if (primary_adapter->registrypriv.mp_mode == 1)
+		return _TRUE;
+	else
+		return _FALSE;
+}
+
+
 ULONG mpt_ProQueryCalTxPower(
 	PADAPTER	pAdapter,
 	u8		RfPath
diff --git a/rtl8822BU/core/rtw_mp_ioctl.c b/rtl8822BU/core/rtw_mp_ioctl.c
index 33bd6d2..035d281 100755..100644
--- a/rtl8822BU/core/rtw_mp_ioctl.c
+++ b/rtl8822BU/core/rtw_mp_ioctl.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_MP_IOCTL_C_
 
 #include <drv_types.h>
diff --git a/rtl8822BU/core/rtw_odm.c b/rtl8822BU/core/rtw_odm.c
index e608807..7cb9d5f 100755..100644
--- a/rtl8822BU/core/rtw_odm.c
+++ b/rtl8822BU/core/rtw_odm.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,17 +11,47 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #include <rtw_odm.h>
 #include <hal_data.h>
 
+u32 rtw_phydm_ability_ops(_adapter *adapter, HAL_PHYDM_OPS ops, u32 ability)
+{
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
+	struct PHY_DM_STRUCT *podmpriv = &pHalData->odmpriv;
+	u32 result = 0;
 
+	switch (ops) {
+	case HAL_PHYDM_DIS_ALL_FUNC:
+		podmpriv->support_ability = DYNAMIC_FUNC_DISABLE;
+		halrf_cmn_info_set(podmpriv, HALRF_CMNINFO_ABILITY, DYNAMIC_FUNC_DISABLE);
+		break;
+	case HAL_PHYDM_FUNC_SET:
+		podmpriv->support_ability |= ability;
+		break;
+	case HAL_PHYDM_FUNC_CLR:
+		podmpriv->support_ability &= ~(ability);
+		break;
+	case HAL_PHYDM_ABILITY_BK:
+		/* dm flag backup*/
+		podmpriv->bk_support_ability = podmpriv->support_ability;
+		pHalData->bk_rf_ability = halrf_cmn_info_get(podmpriv, HALRF_CMNINFO_ABILITY);
+		break;
+	case HAL_PHYDM_ABILITY_RESTORE:
+		/* restore dm flag */
+		podmpriv->support_ability = podmpriv->bk_support_ability;
+		halrf_cmn_info_set(podmpriv, HALRF_CMNINFO_ABILITY, pHalData->bk_rf_ability);
+		break;
+	case HAL_PHYDM_ABILITY_SET:
+		podmpriv->support_ability = ability;
+		break;
+	case HAL_PHYDM_ABILITY_GET:
+		result = podmpriv->support_ability;
+		break;
+	}
+	return result;
+}
 
 /* set ODM_CMNINFO_IC_TYPE based on chip_type */
 void rtw_odm_init_ic_type(_adapter *adapter)
@@ -208,15 +238,28 @@ void rtw_odm_releasespinlock(_adapter *adapter,	enum rt_spinlock_type type)
 	}
 }
 
-#ifdef CONFIG_DFS_MASTER
 inline u8 rtw_odm_get_dfs_domain(_adapter *adapter)
 {
+#ifdef CONFIG_DFS_MASTER
 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
 	struct PHY_DM_STRUCT *pDM_Odm = &(hal_data->odmpriv);
 
 	return pDM_Odm->dfs_region_domain;
+#else
+	return PHYDM_DFS_DOMAIN_UNKNOWN;
+#endif
 }
 
+inline u8 rtw_odm_dfs_domain_unknown(_adapter *adapter)
+{
+#ifdef CONFIG_DFS_MASTER
+	return rtw_odm_get_dfs_domain(adapter) == PHYDM_DFS_DOMAIN_UNKNOWN;
+#else
+	return 1;
+#endif
+}
+
+#ifdef CONFIG_DFS_MASTER
 inline VOID rtw_odm_radar_detect_reset(_adapter *adapter)
 {
 	phydm_radar_detect_reset(GET_ODM(adapter));
@@ -238,3 +281,196 @@ inline BOOLEAN rtw_odm_radar_detect(_adapter *adapter)
 	return phydm_radar_detect(GET_ODM(adapter));
 }
 #endif /* CONFIG_DFS_MASTER */
+
+void rtw_odm_parse_rx_phy_status_chinfo(union recv_frame *rframe, u8 *phys)
+{
+#ifndef DBG_RX_PHYSTATUS_CHINFO
+#define DBG_RX_PHYSTATUS_CHINFO 0
+#endif
+
+#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
+	_adapter *adapter = rframe->u.hdr.adapter;
+	struct PHY_DM_STRUCT *phydm = GET_ODM(adapter);
+	struct rx_pkt_attrib *attrib = &rframe->u.hdr.attrib;
+	u8 *wlanhdr = get_recvframe_data(rframe);
+
+	if (phydm->support_ic_type & ODM_IC_PHY_STATUE_NEW_TYPE) {
+		/*
+		* 8723D:
+		* type_0(CCK)
+		*     l_rxsc
+		*         is filled with primary channel SC, not real rxsc.
+		*         0:LSC, 1:USC
+		* type_1(OFDM)
+		*     rf_mode
+		*         RF bandwidth when RX
+		*     l_rxsc(legacy), ht_rxsc
+		*         see below RXSC N-series
+		* type_2(Not used)
+		*/
+		/*
+		* 8821C, 8822B:
+		* type_0(CCK)
+		*     l_rxsc
+		*         is filled with primary channel SC, not real rxsc.
+		*         0:LSC, 1:USC
+		* type_1(OFDM)
+		*     rf_mode
+		*         RF bandwidth when RX
+		*     l_rxsc(legacy), ht_rxsc
+		*         see below RXSC AC-series
+		* type_2(Not used)
+		*/
+
+		if ((*phys & 0xf) == 0) {
+			struct _phy_status_rpt_jaguar2_type0 *phys_t0 = (struct _phy_status_rpt_jaguar2_type0 *)phys;
+
+			if (DBG_RX_PHYSTATUS_CHINFO) {
+				RTW_PRINT("phys_t%u ta="MAC_FMT" %s, %s(band:%u, ch:%u, l_rxsc:%u)\n"
+					, *phys & 0xf
+					, MAC_ARG(get_ta(wlanhdr))
+					, is_broadcast_mac_addr(get_ra(wlanhdr)) ? "BC" : is_multicast_mac_addr(get_ra(wlanhdr)) ? "MC" : "UC"
+					, HDATA_RATE(attrib->data_rate)
+					, phys_t0->band, phys_t0->channel, phys_t0->rxsc
+				);
+			}
+
+		} else if ((*phys & 0xf) == 1) {
+			struct _phy_status_rpt_jaguar2_type1 *phys_t1 = (struct _phy_status_rpt_jaguar2_type1 *)phys;
+			u8 rxsc = (attrib->data_rate > DESC_RATE11M && attrib->data_rate < DESC_RATEMCS0) ? phys_t1->l_rxsc : phys_t1->ht_rxsc;
+			u8 pkt_cch = 0;
+			u8 pkt_bw = CHANNEL_WIDTH_20;
+
+			#if	ODM_IC_11N_SERIES_SUPPORT
+			if (phydm->support_ic_type & ODM_IC_11N_SERIES) {
+				/* RXSC N-series */
+				#define RXSC_DUP	0
+				#define RXSC_LSC	1
+				#define RXSC_USC	2
+				#define RXSC_40M	3
+
+				static const s8 cch_offset_by_rxsc[4] = {0, -2, 2, 0};
+
+				if (phys_t1->rf_mode == 0) {
+					pkt_cch = phys_t1->channel;
+					pkt_bw = CHANNEL_WIDTH_20;
+				} else if (phys_t1->rf_mode == 1) {
+					if (rxsc == RXSC_LSC || rxsc == RXSC_USC) {
+						pkt_cch = phys_t1->channel + cch_offset_by_rxsc[rxsc];
+						pkt_bw = CHANNEL_WIDTH_20;
+					} else if (rxsc == RXSC_40M) {
+						pkt_cch = phys_t1->channel;
+						pkt_bw = CHANNEL_WIDTH_40;
+					}
+				} else
+					rtw_warn_on(1);
+
+				goto type1_end;
+			}
+			#endif /* ODM_IC_11N_SERIES_SUPPORT */
+
+			#if	ODM_IC_11AC_SERIES_SUPPORT
+			if (phydm->support_ic_type & ODM_IC_11AC_SERIES) {
+				/* RXSC AC-series */
+				#define RXSC_DUP			0 /* 0: RX from all SC of current rf_mode */
+
+				#define RXSC_LL20M_OF_160M	8 /* 1~8: RX from 20MHz SC */
+				#define RXSC_L20M_OF_160M	6
+				#define RXSC_L20M_OF_80M	4
+				#define RXSC_L20M_OF_40M	2
+				#define RXSC_U20M_OF_40M	1
+				#define RXSC_U20M_OF_80M	3
+				#define RXSC_U20M_OF_160M	5
+				#define RXSC_UU20M_OF_160M	7
+
+				#define RXSC_L40M_OF_160M	12 /* 9~12: RX from 40MHz SC */
+				#define RXSC_L40M_OF_80M	10
+				#define RXSC_U40M_OF_80M	9
+				#define RXSC_U40M_OF_160M	11
+
+				#define RXSC_L80M_OF_160M	14 /* 13~14: RX from 80MHz SC */
+				#define RXSC_U80M_OF_160M	13
+
+				static const s8 cch_offset_by_rxsc[15] = {0, 2, -2, 6, -6, 10, -10, 14, -14, 4, -4, 12, -12, 8, -8};
+
+				if (phys_t1->rf_mode > 3) {
+					/* invalid rf_mode */
+					rtw_warn_on(1);
+					goto type1_end;
+				}
+
+				if (phys_t1->rf_mode == 0) {
+					/* RF 20MHz */
+					pkt_cch = phys_t1->channel;
+					pkt_bw = CHANNEL_WIDTH_20;
+					goto type1_end;
+				}
+
+				if (rxsc == 0) {
+					/* RF and RX with same BW */
+					if (attrib->data_rate >= DESC_RATEMCS0) {
+						pkt_cch = phys_t1->channel;
+						pkt_bw = phys_t1->rf_mode;
+					}
+					goto type1_end;
+				}
+
+				if ((phys_t1->rf_mode == 1 && rxsc >= 1 && rxsc <= 2) /* RF 40MHz, RX 20MHz */
+					|| (phys_t1->rf_mode == 2 && rxsc >= 1 && rxsc <= 4) /* RF 80MHz, RX 20MHz */
+					|| (phys_t1->rf_mode == 3 && rxsc >= 1 && rxsc <= 8) /* RF 160MHz, RX 20MHz */
+				) {
+					pkt_cch = phys_t1->channel + cch_offset_by_rxsc[rxsc];
+					pkt_bw = CHANNEL_WIDTH_20;
+				} else if ((phys_t1->rf_mode == 2 && rxsc >= 9 && rxsc <= 10) /* RF 80MHz, RX 40MHz */
+					|| (phys_t1->rf_mode == 3 && rxsc >= 9 && rxsc <= 12) /* RF 160MHz, RX 40MHz */
+				) {
+					if (attrib->data_rate >= DESC_RATEMCS0) {
+						pkt_cch = phys_t1->channel + cch_offset_by_rxsc[rxsc];
+						pkt_bw = CHANNEL_WIDTH_40;
+					}
+				} else if ((phys_t1->rf_mode == 3 && rxsc >= 13 && rxsc <= 14) /* RF 160MHz, RX 80MHz */
+				) {
+					if (attrib->data_rate >= DESC_RATEMCS0) {
+						pkt_cch = phys_t1->channel + cch_offset_by_rxsc[rxsc];
+						pkt_bw = CHANNEL_WIDTH_80;
+					}
+				} else
+					rtw_warn_on(1);
+
+			}
+			#endif /* ODM_IC_11AC_SERIES_SUPPORT */
+
+type1_end:
+			if (DBG_RX_PHYSTATUS_CHINFO) {
+				RTW_PRINT("phys_t%u ta="MAC_FMT" %s, %s(band:%u, ch:%u, rf_mode:%u, l_rxsc:%u, ht_rxsc:%u) => %u,%u\n"
+					, *phys & 0xf
+					, MAC_ARG(get_ta(wlanhdr))
+					, is_broadcast_mac_addr(get_ra(wlanhdr)) ? "BC" : is_multicast_mac_addr(get_ra(wlanhdr)) ? "MC" : "UC"
+					, HDATA_RATE(attrib->data_rate)
+					, phys_t1->band, phys_t1->channel, phys_t1->rf_mode, phys_t1->l_rxsc, phys_t1->ht_rxsc
+					, pkt_cch, pkt_bw
+				);
+			}
+
+			/* for now, only return cneter channel of 20MHz packet */
+			if (pkt_cch && pkt_bw == CHANNEL_WIDTH_20)
+				attrib->ch = pkt_cch;
+
+		} else {
+			struct _phy_status_rpt_jaguar2_type2 *phys_t2 = (struct _phy_status_rpt_jaguar2_type2 *)phys;
+
+			if (DBG_RX_PHYSTATUS_CHINFO) {
+				RTW_PRINT("phys_t%u ta="MAC_FMT" %s, %s(band:%u, ch:%u, l_rxsc:%u, ht_rxsc:%u)\n"
+					, *phys & 0xf
+					, MAC_ARG(get_ta(wlanhdr))
+					, is_broadcast_mac_addr(get_ra(wlanhdr)) ? "BC" : is_multicast_mac_addr(get_ra(wlanhdr)) ? "MC" : "UC"
+					, HDATA_RATE(attrib->data_rate)
+					, phys_t2->band, phys_t2->channel, phys_t2->l_rxsc, phys_t2->ht_rxsc
+				);
+			}
+		}
+	}
+#endif /* (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) */
+
+}
+
diff --git a/rtl8822BU/core/rtw_p2p.c b/rtl8822BU/core/rtw_p2p.c
index d7ed64f..906a556 100755..100644
--- a/rtl8822BU/core/rtw_p2p.c
+++ b/rtl8822BU/core/rtw_p2p.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_P2P_C_
 
 #include <drv_types.h>
@@ -52,7 +47,7 @@ static u32 go_add_group_info_attr(struct wifidirect_info *pwdinfo, u8 *pbuf)
 	_adapter *padapter = pwdinfo->padapter;
 	struct sta_priv *pstapriv = &padapter->stapriv;
 
-	RTW_INFO("%s\n", __FUNCTION__);
+	RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
 
 	pdata_attr = rtw_zmalloc(MAX_P2P_IE_LEN);
 
@@ -2571,26 +2566,15 @@ u8 rtw_p2p_get_peer_ch_list(struct wifidirect_info *pwdinfo, u8 *ch_content, u8
 	return ch_no;
 }
 
-u8 rtw_p2p_check_peer_oper_ch(struct mlme_ext_priv *pmlmeext, u8 ch)
-{
-	u8 i = 0;
-
-	for (i = 0; i < pmlmeext->max_chan_nums; i++) {
-		if (pmlmeext->channel_set[i].ChannelNum == ch)
-			return _SUCCESS;
-	}
-
-	return _FAIL;
-}
-
-u8 rtw_p2p_ch_inclusion(struct mlme_ext_priv *pmlmeext, u8 *peer_ch_list, u8 peer_ch_num, u8 *ch_list_inclusioned)
+u8 rtw_p2p_ch_inclusion(_adapter *adapter, u8 *peer_ch_list, u8 peer_ch_num, u8 *ch_list_inclusioned)
 {
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
 	int	i = 0, j = 0, temp = 0;
 	u8 ch_no = 0;
 
 	for (i = 0; i < peer_ch_num; i++) {
-		for (j = temp; j < pmlmeext->max_chan_nums; j++) {
-			if (*(peer_ch_list + i) == pmlmeext->channel_set[j].ChannelNum) {
+		for (j = temp; j < rfctl->max_chan_nums; j++) {
+			if (*(peer_ch_list + i) == rfctl->channel_set[j].ChannelNum) {
 				ch_list_inclusioned[ch_no++] = *(peer_ch_list + i);
 				temp = j;
 				break;
@@ -2708,14 +2692,14 @@ u8 process_p2p_group_negotation_req(struct wifidirect_info *pwdinfo, u8 *pframe,
 		RTW_INFO(FUNC_ADPT_FMT" listen channel :%u\n", FUNC_ADPT_ARG(padapter), pwdinfo->nego_req_info.peer_ch);
 
 		attr_contentlen = 0;
-		if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_INTENTED_IF_ADDR, pwdinfo->p2p_peer_interface_addr, &attr_contentlen)) {
+		if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_INTENDED_IF_ADDR, pwdinfo->p2p_peer_interface_addr, &attr_contentlen)) {
 			if (attr_contentlen != ETH_ALEN)
 				_rtw_memset(pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN);
 		}
 
 		if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, ch_content, &ch_cnt)) {
 			peer_ch_num = rtw_p2p_get_peer_ch_list(pwdinfo, ch_content, ch_cnt, peer_ch_list);
-			ch_num_inclusioned = rtw_p2p_ch_inclusion(&padapter->mlmeextpriv, peer_ch_list, peer_ch_num, ch_list_inclusioned);
+			ch_num_inclusioned = rtw_p2p_ch_inclusion(padapter, peer_ch_list, peer_ch_num, ch_list_inclusioned);
 
 			if (ch_num_inclusioned == 0) {
 				RTW_INFO("[%s] No common channel in channel list!\n", __FUNCTION__);
@@ -2853,7 +2837,7 @@ u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe
 
 			/*	Try to get the peer's interface address */
 			attr_contentlen = 0;
-			if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_INTENTED_IF_ADDR, pwdinfo->p2p_peer_interface_addr, &attr_contentlen)) {
+			if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_INTENDED_IF_ADDR, pwdinfo->p2p_peer_interface_addr, &attr_contentlen)) {
 				if (attr_contentlen != ETH_ALEN)
 					_rtw_memset(pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN);
 			}
@@ -2910,7 +2894,7 @@ u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe
 				RTW_INFO("[%s] channel list attribute found, len = %d\n", __FUNCTION__,  pwdinfo->channel_list_attr_len);
 
 				peer_ch_num = rtw_p2p_get_peer_ch_list(pwdinfo, pwdinfo->channel_list_attr, pwdinfo->channel_list_attr_len, peer_ch_list);
-				ch_num_inclusioned = rtw_p2p_ch_inclusion(&padapter->mlmeextpriv, peer_ch_list, peer_ch_num, ch_list_inclusioned);
+				ch_num_inclusioned = rtw_p2p_ch_inclusion(padapter, peer_ch_list, peer_ch_num, ch_list_inclusioned);
 
 				if (ch_num_inclusioned == 0) {
 					RTW_INFO("[%s] No common channel in channel list!\n", __FUNCTION__);
@@ -3004,9 +2988,8 @@ u8 process_p2p_group_negotation_confirm(struct wifidirect_info *pwdinfo, u8 *pfr
 			result = attr_content;
 
 			if (attr_content == P2P_STATUS_SUCCESS) {
-				u8	bcancelled = 0;
 
-				_cancel_timer(&pwdinfo->restore_p2p_state_timer, &bcancelled);
+				_cancel_timer_ex(&pwdinfo->restore_p2p_state_timer);
 
 				/*	Commented by Albert 20100911 */
 				/*	Todo: Need to handle the case which both Intents are the same. */
@@ -3119,6 +3102,10 @@ void restore_p2p_state_handler(_adapter	*padapter)
 
 		if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_RSP)) {
 			set_channel_bwmode(padapter, union_ch, union_offset, union_bw);
+			#ifdef CONFIG_AP_MODE
+			/*mac-id sleep or wake-up for AP mode*/
+			rtw_mi_buddy_ap_acdata_control(padapter, 0);
+			#endif/*CONFIG_AP_MODE*/
 			rtw_mi_buddy_issue_nulldata(padapter, NULL, 0, 3, 500);
 		}
 	}
@@ -3193,7 +3180,10 @@ void p2p_concurrent_handler(_adapter	*padapter)
 		if (pwdinfo->driver_interface == DRIVER_CFG80211) {
 			RTW_INFO("%s, switch ch back to union_ch=%d\n", __func__, union_ch);
 			set_channel_bwmode(padapter, union_ch, union_offset, union_bw);
-
+			#ifdef CONFIG_AP_MODE
+			/*mac-id sleep or wake-up for AP mode*/
+			rtw_mi_buddy_ap_acdata_control(padapter, 0);
+			#endif/*CONFIG_AP_MODE*/
 			rtw_mi_buddy_issue_nulldata(padapter, NULL, 0, 3, 500);
 
 		} else if (pwdinfo->driver_interface == DRIVER_WEXT) {
@@ -3204,6 +3194,10 @@ void p2p_concurrent_handler(_adapter	*padapter)
 					RTW_INFO("[%s] P2P_STATE_IDLE, ext_listen_period = %d\n", __FUNCTION__, pwdinfo->ext_listen_period);
 
 					if (union_ch != pwdinfo->listen_channel) {
+						#ifdef CONFIG_AP_MODE
+						/*mac-id sleep or wake-up for AP mode*/
+						rtw_mi_buddy_ap_acdata_control(padapter, 1);
+						#endif/*CONFIG_AP_MODE*/
 						/*	Will switch to listen channel so that need to send the NULL data with PW bit to AP. */
 						rtw_mi_buddy_issue_nulldata(padapter, NULL, 1, 3, 500);
 						set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20);
@@ -3237,6 +3231,10 @@ void p2p_concurrent_handler(_adapter	*padapter)
 						rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
 					}
 					rtw_p2p_set_state(pwdinfo, P2P_STATE_IDLE);
+					#ifdef CONFIG_AP_MODE
+					/*mac-id sleep or wake-up for AP mode*/
+					rtw_mi_buddy_ap_acdata_control(padapter, 0);
+					#endif/*CONFIG_AP_MODE*/
 					rtw_mi_buddy_issue_nulldata(padapter, NULL, 0, 3, 500);
 				}
 
@@ -3247,6 +3245,10 @@ void p2p_concurrent_handler(_adapter	*padapter)
 				val8 = 0;
 				rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
 				set_channel_bwmode(padapter, union_ch, union_offset, union_bw);
+				#ifdef CONFIG_AP_MODE
+				/*mac-id sleep or wake-up for AP mode*/
+				rtw_mi_buddy_ap_acdata_control(padapter, 0);
+				#endif/*CONFIG_AP_MODE*/
 				rtw_mi_buddy_issue_nulldata(padapter, NULL, 0, 3, 500);
 			} else if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ)) {
 				val8 = 1;
@@ -3282,13 +3284,41 @@ void p2p_concurrent_handler(_adapter	*padapter)
 #endif
 
 #ifdef CONFIG_IOCTL_CFG80211
-static void ro_ch_handler(_adapter *padapter)
+static int ro_ch_handler(_adapter *adapter, u8 *buf)
+{
+	/* TODO: move remain on channel logical here */
+	return H2C_SUCCESS;
+}
+
+static int cancel_ro_ch_handler(_adapter *padapter, u8 *buf)
 {
+	int ret = H2C_SUCCESS;
+	struct p2p_roch_parm *roch_parm = (struct p2p_roch_parm *)buf;
+	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
 	struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo;
+	struct wireless_dev *wdev;
 	struct wifidirect_info *pwdinfo = &padapter->wdinfo;
-	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 	u8 ch, bw, offset;
 
+	_enter_critical_mutex(&pwdev_priv->roch_mutex, NULL);
+
+	if (rtw_cfg80211_get_is_roch(padapter) != _TRUE)
+		goto exit;
+
+	if (roch_parm->wdev && roch_parm->cookie) {
+		if (pcfg80211_wdinfo->ro_ch_wdev != roch_parm->wdev) {
+			RTW_WARN(FUNC_ADPT_FMT" ongoing wdev:%p, wdev:%p\n"
+				, FUNC_ADPT_ARG(padapter), pcfg80211_wdinfo->ro_ch_wdev, roch_parm->wdev);
+			rtw_warn_on(1);
+		}
+
+		if (pcfg80211_wdinfo->remain_on_ch_cookie != roch_parm->cookie) {
+			RTW_WARN(FUNC_ADPT_FMT" ongoing cookie:0x%llx, cookie:0x%llx\n"
+				, FUNC_ADPT_ARG(padapter), pcfg80211_wdinfo->remain_on_ch_cookie, roch_parm->cookie);
+			rtw_warn_on(1);
+		}
+	}
+
 	if (rtw_mi_get_ch_setting_union(padapter, &ch, &bw, &offset) != 0) {
 		if (0)
 			RTW_INFO(FUNC_ADPT_FMT" back to linked/linking union - ch:%u, bw:%u, offset:%u\n",
@@ -3310,38 +3340,49 @@ static void ro_ch_handler(_adapter *padapter)
 	}
 
 	set_channel_bwmode(padapter, ch, offset, bw);
+	if (rtw_mi_buddy_check_fwstate(padapter, _FW_LINKED)) {
+		#ifdef CONFIG_AP_MODE
+		/*mac-id sleep or wake-up for AP mode*/
+		rtw_mi_buddy_ap_acdata_control(padapter, 0);
+		#endif/*CONFIG_AP_MODE*/
+		rtw_mi_buddy_issue_nulldata(padapter, NULL, 0, 3, 500);
+	}
+
 
 	rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo));
 #ifdef CONFIG_DEBUG_CFG80211
 	RTW_INFO("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo));
 #endif
 
-	pcfg80211_wdinfo->is_ro_ch = _FALSE;
+	wdev = pcfg80211_wdinfo->ro_ch_wdev;
+
+	rtw_cfg80211_set_is_roch(padapter, _FALSE);
+	pcfg80211_wdinfo->ro_ch_wdev = NULL;
 	pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time();
 
-	RTW_INFO("cfg80211_remain_on_channel_expired cookie:0x%llx, ch=%d, bw=%d, offset=%d\n"
-		 , pcfg80211_wdinfo->remain_on_ch_cookie
-		, rtw_get_oper_ch(padapter), rtw_get_oper_bw(padapter), rtw_get_oper_choffset(padapter));
+	rtw_cfg80211_remain_on_channel_expired(wdev
+		, pcfg80211_wdinfo->remain_on_ch_cookie
+		, &pcfg80211_wdinfo->remain_on_ch_channel
+		, pcfg80211_wdinfo->remain_on_ch_type, GFP_KERNEL);
+
+	RTW_INFO("cfg80211_remain_on_channel_expired cookie:0x%llx\n"
+		, pcfg80211_wdinfo->remain_on_ch_cookie);
+
+#ifdef CONFIG_BT_COEXIST
+	rtw_btcoex_ScanNotify(padapter, _FALSE);
+#endif
 
-	rtw_cfg80211_remain_on_channel_expired(padapter,
-				       pcfg80211_wdinfo->remain_on_ch_cookie,
-				       &pcfg80211_wdinfo->remain_on_ch_channel,
-			       pcfg80211_wdinfo->remain_on_ch_type, GFP_KERNEL);
+exit:
+	_exit_critical_mutex(&pwdev_priv->roch_mutex, NULL);
 
+	return ret;
 }
 
 static void ro_ch_timer_process(void *FunctionContext)
 {
 	_adapter *adapter = (_adapter *)FunctionContext;
-	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter);
-
-	/* printk("%s\n", __FUNCTION__); */
-
-#ifdef CONFIG_CONCURRENT_MODE
-	ATOMIC_SET(&pwdev_priv->ro_ch_to, 1);
-#endif
 
-	p2p_protocol_wk_cmd(adapter, P2P_RO_CH_WK);
+	p2p_cancel_roch_cmd(adapter, 0, NULL, 0);
 }
 
 static void rtw_change_p2pie_op_ch(_adapter *padapter, const u8 *frame_body, u32 len, u8 ch)
@@ -3537,8 +3578,14 @@ static void rtw_cfg80211_adjust_p2pie_channel(_adapter *padapter, const u8 *fram
 			while (attr_contentlen > 0) {
 				num_of_ch = *(pattr_temp + 1);
 
-				for (i = 0; i < num_of_ch; i++)
-					*(pattr_temp + 2 + i) = union_ch; /*forcing to the same channel*/
+				for (i = 0; i < num_of_ch; i++) {
+					if (*(pattr_temp + 2 + i) && *(pattr_temp + 2 + i) != union_ch) {
+						#ifdef RTW_SINGLE_WIPHY
+						RTW_ERR("replace ch_list:%u with:%u\n", *(pattr_temp + 2 + i), union_ch);
+						#endif
+						*(pattr_temp + 2 + i) = union_ch; /*forcing to the same channel*/
+					}
+				}
 
 				pattr_temp += (2 + num_of_ch);
 				attr_contentlen -= (2 + num_of_ch);
@@ -3550,7 +3597,12 @@ static void rtw_cfg80211_adjust_p2pie_channel(_adapter *padapter, const u8 *fram
 		pattr = NULL;
 		pattr = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, (uint *)&attr_contentlen);
 		if (pattr != NULL) {
-			*(pattr + 4) = union_ch; /*forcing to the same channel	*/
+			if (*(pattr + 4) && *(pattr + 4) != union_ch) {
+				#ifdef RTW_SINGLE_WIPHY
+				RTW_ERR("replace op_ch:%u with:%u\n", *(pattr + 4), union_ch);
+				#endif
+				*(pattr + 4) = union_ch; /*forcing to the same channel	*/
+			}
 		}
 
 		/* Get the next P2P IE */
@@ -3793,6 +3845,8 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx)
 	int op_ch = -1;
 	int listen_ch = -1;
 	u8 intent = 0;
+	u8 *iaddr = NULL;
+	u8 *gbssid = NULL;
 
 	frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr));
 	category = frame_body[0];
@@ -3800,20 +3854,21 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx)
 	if (category == RTW_WLAN_CATEGORY_PUBLIC) {
 		action = frame_body[1];
 		if (action == ACT_PUBLIC_VENDOR
-		    && _rtw_memcmp(frame_body + 2, P2P_OUI, 4) == _TRUE
-		   ) {
+			&& _rtw_memcmp(frame_body + 2, P2P_OUI, 4) == _TRUE
+		) {
 			OUI_Subtype = frame_body[6];
 			dialogToken = frame_body[7];
 			is_p2p_frame = OUI_Subtype;
-#ifdef CONFIG_DEBUG_CFG80211
+
+			#ifdef CONFIG_DEBUG_CFG80211
 			RTW_INFO("ACTION_CATEGORY_PUBLIC: ACT_PUBLIC_VENDOR, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n",
 				cpu_to_be32(*((u32 *)(frame_body + 2))), OUI_Subtype, dialogToken);
-#endif
+			#endif
 
 			p2p_ie = rtw_get_p2p_ie(
-				(u8 *)buf + sizeof(struct rtw_ieee80211_hdr_3addr) + _PUBLIC_ACTION_IE_OFFSET_,
-				len - sizeof(struct rtw_ieee80211_hdr_3addr) - _PUBLIC_ACTION_IE_OFFSET_,
-					 NULL, &p2p_ielen);
+				(u8 *)buf + sizeof(struct rtw_ieee80211_hdr_3addr) + _PUBLIC_ACTION_IE_OFFSET_
+				, len - sizeof(struct rtw_ieee80211_hdr_3addr) - _PUBLIC_ACTION_IE_OFFSET_
+				, NULL, &p2p_ielen);
 
 			switch (OUI_Subtype) { /* OUI Subtype */
 				u8 *cont;
@@ -3822,17 +3877,17 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx)
 				struct rtw_wdev_nego_info *nego_info = &pwdev_priv->nego_info;
 
 				if (tx) {
-#ifdef CONFIG_DRV_ISSUE_PROV_REQ /* IOT FOR S2 */
+					#ifdef CONFIG_DRV_ISSUE_PROV_REQ /* IOT FOR S2 */
 					if (pwdev_priv->provdisc_req_issued == _FALSE)
 						rtw_cfg80211_issue_p2p_provision_request(padapter, buf, len);
-#endif /* CONFIG_DRV_ISSUE_PROV_REQ */
+					#endif /* CONFIG_DRV_ISSUE_PROV_REQ */
 
 					/* pwdev_priv->provdisc_req_issued = _FALSE; */
 
-#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
+					#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
 					if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0)
 						rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr));
-#endif
+					#endif
 				}
 
 				cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, &cont_len);
@@ -3844,11 +3899,16 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx)
 				cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT, NULL, &cont_len);
 				if (cont)
 					intent = *cont;
+				cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_INTENDED_IF_ADDR, NULL, &cont_len);
+				if (cont && cont_len == 6)
+					iaddr = cont;
 
 				if (nego_info->token != dialogToken)
 					rtw_wdev_nego_info_init(nego_info);
 
 				_rtw_memcpy(nego_info->peer_mac, tx ? GetAddr1Ptr(buf) : get_addr2_ptr(buf), ETH_ALEN);
+				if (iaddr)
+					_rtw_memcpy(tx ? nego_info->iface_addr : nego_info->peer_iface_addr, iaddr, ETH_ALEN);
 				nego_info->active = tx ? 1 : 0;
 				nego_info->token = dialogToken;
 				nego_info->req_op_ch = op_ch;
@@ -3857,19 +3917,21 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx)
 				nego_info->state = 0;
 
 				dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128);
-				RTW_INFO("RTW_%s:P2P_GO_NEGO_REQ, dialogToken=%d, intent:%u%s, listen_ch:%d, op_ch:%d, ch_list:%s, full_ch_in_p2p_handshake:%d\n" ,
-					(tx == _TRUE) ? "Tx" : "Rx" , dialogToken , (intent >> 1) , intent & 0x1 ? "+" : "-" , listen_ch , op_ch , ch_list_buf ,
-					padapter->registrypriv.full_ch_in_p2p_handshake);
+				RTW_INFO("RTW_%s:P2P_GO_NEGO_REQ, dialogToken=%d, intent:%u%s, listen_ch:%d, op_ch:%d, ch_list:%s"
+					, (tx == _TRUE) ? "Tx" : "Rx" , dialogToken , (intent >> 1) , intent & 0x1 ? "+" : "-" , listen_ch , op_ch , ch_list_buf);
+				if (iaddr)
+					_RTW_INFO(", iaddr:"MAC_FMT, MAC_ARG(iaddr));
+				_RTW_INFO("\n");
 
 				if (!tx) {
-#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
+					#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
 					if (rtw_mi_check_status(padapter, MI_LINKED)
 					    && rtw_chk_p2pie_ch_list_with_buddy(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE
 					    && padapter->registrypriv.full_ch_in_p2p_handshake == 0) {
 						RTW_INFO(FUNC_ADPT_FMT" ch_list has no intersect with buddy\n", FUNC_ADPT_ARG(padapter));
 						rtw_change_p2pie_ch_list(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr), 0);
 					}
-#endif
+					#endif
 				}
 
 				break;
@@ -3878,10 +3940,10 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx)
 				struct rtw_wdev_nego_info *nego_info = &pwdev_priv->nego_info;
 
 				if (tx) {
-#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
+					#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
 					if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0)
 						rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr));
-#endif
+					#endif
 				}
 
 				cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, &cont_len);
@@ -3893,10 +3955,15 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx)
 				cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, NULL, &cont_len);
 				if (cont)
 					status = *cont;
+				cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_INTENDED_IF_ADDR, NULL, &cont_len);
+				if (cont && cont_len == 6)
+					iaddr = cont;
 
 				if (nego_info->token == dialogToken && nego_info->state == 0
-				    && _rtw_memcmp(nego_info->peer_mac, tx ? GetAddr1Ptr(buf) : get_addr2_ptr(buf), ETH_ALEN) == _TRUE
-				   ) {
+					&& _rtw_memcmp(nego_info->peer_mac, tx ? GetAddr1Ptr(buf) : get_addr2_ptr(buf), ETH_ALEN) == _TRUE
+				) {
+					if (iaddr)
+						_rtw_memcpy(tx ? nego_info->iface_addr : nego_info->peer_iface_addr, iaddr, ETH_ALEN);
 					nego_info->status = (status == -1) ? 0xff : status;
 					nego_info->rsp_op_ch = op_ch;
 					nego_info->rsp_intent = intent;
@@ -3906,19 +3973,22 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx)
 				}
 
 				dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128);
-				RTW_INFO("RTW_%s:P2P_GO_NEGO_RESP, dialogToken=%d, intent:%u%s, status:%d, op_ch:%d, ch_list:%s\n",
-					(tx == _TRUE) ? "Tx" : "Rx", dialogToken, (intent >> 1), intent & 0x1 ? "+" : "-", status, op_ch, ch_list_buf);
+				RTW_INFO("RTW_%s:P2P_GO_NEGO_RESP, dialogToken=%d, intent:%u%s, status:%d, op_ch:%d, ch_list:%s"
+					, (tx == _TRUE) ? "Tx" : "Rx", dialogToken, (intent >> 1), intent & 0x1 ? "+" : "-", status, op_ch, ch_list_buf);
+				if (iaddr)
+					_RTW_INFO(", iaddr:"MAC_FMT, MAC_ARG(iaddr));
+				_RTW_INFO("\n");
 
 				if (!tx) {
 					pwdev_priv->provdisc_req_issued = _FALSE;
-#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
+					#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
 					if (rtw_mi_check_status(padapter, MI_LINKED)
 					    && rtw_chk_p2pie_ch_list_with_buddy(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE
 					    && padapter->registrypriv.full_ch_in_p2p_handshake == 0) {
 						RTW_INFO(FUNC_ADPT_FMT" ch_list has no intersect with buddy\n", FUNC_ADPT_ARG(padapter));
 						rtw_change_p2pie_ch_list(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr), 0);
 					}
-#endif
+					#endif
 				}
 
 				break;
@@ -3928,10 +3998,10 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx)
 				bool is_go = _FALSE;
 
 				if (tx) {
-#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
+					#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
 					if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0)
 						rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr));
-#endif
+					#endif
 				}
 
 				cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, &cont_len);
@@ -3957,8 +4027,8 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx)
 				}
 
 				dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128);
-				RTW_INFO("RTW_%s:P2P_GO_NEGO_CONF, dialogToken=%d, status:%d, op_ch:%d, ch_list:%s\n",
-					(tx == _TRUE) ? "Tx" : "Rx", dialogToken, status, op_ch, ch_list_buf);
+				RTW_INFO("RTW_%s:P2P_GO_NEGO_CONF, dialogToken=%d, status:%d, op_ch:%d, ch_list:%s\n"
+					, (tx == _TRUE) ? "Tx" : "Rx", dialogToken, status, op_ch, ch_list_buf);
 
 				if (!tx) {
 				}
@@ -3970,11 +4040,11 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx)
 				int flags = -1;
 
 				if (tx) {
-#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
+					#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
 					if (rtw_mi_check_status(padapter, MI_LINKED)
 					    && padapter->registrypriv.full_ch_in_p2p_handshake == 0)
 						rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr));
-#endif
+					#endif
 				}
 
 				cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_INVITATION_FLAGS, NULL, &cont_len);
@@ -3983,11 +4053,16 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx)
 				cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, &cont_len);
 				if (cont)
 					op_ch = *(cont + 4);
+				cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GROUP_BSSID, NULL, &cont_len);
+				if (cont && cont_len == 6)
+					gbssid = cont;
 
 				if (invit_info->token != dialogToken)
 					rtw_wdev_invit_info_init(invit_info);
 
 				_rtw_memcpy(invit_info->peer_mac, tx ? GetAddr1Ptr(buf) : get_addr2_ptr(buf), ETH_ALEN);
+				if (gbssid)
+					_rtw_memcpy(invit_info->group_bssid, gbssid, ETH_ALEN);
 				invit_info->active = tx ? 1 : 0;
 				invit_info->token = dialogToken;
 				invit_info->flags = (flags == -1) ? 0x0 : flags;
@@ -3995,11 +4070,14 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx)
 				invit_info->state = 0;
 
 				dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128);
-				RTW_INFO("RTW_%s:P2P_INVIT_REQ, dialogToken=%d, flags:0x%02x, op_ch:%d, ch_list:%s\n",
-					(tx == _TRUE) ? "Tx" : "Rx", dialogToken, flags, op_ch, ch_list_buf);
+				RTW_INFO("RTW_%s:P2P_INVIT_REQ, dialogToken=%d, flags:0x%02x, op_ch:%d, ch_list:%s"
+					, (tx == _TRUE) ? "Tx" : "Rx", dialogToken, flags, op_ch, ch_list_buf);
+				if (gbssid)
+					_RTW_INFO(", gbssid:"MAC_FMT, MAC_ARG(gbssid));
+				_RTW_INFO("\n");
 
 				if (!tx) {
-#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
+					#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
 					if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0) {
 						if (op_ch != -1 && rtw_chk_p2pie_op_ch_with_buddy(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE) {
 							RTW_INFO(FUNC_ADPT_FMT" op_ch:%u has no intersect with buddy\n", FUNC_ADPT_ARG(padapter), op_ch);
@@ -4009,7 +4087,7 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx)
 							rtw_change_p2pie_ch_list(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr), 0);
 						}
 					}
-#endif
+					#endif
 				}
 
 				break;
@@ -4018,25 +4096,28 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx)
 				struct rtw_wdev_invit_info *invit_info = &pwdev_priv->invit_info;
 
 				if (tx) {
-#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
+					#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_CFG80211_ONECHANNEL_UNDER_CONCURRENT)
 					if (rtw_mi_check_status(padapter, MI_LINKED) && padapter->registrypriv.full_ch_in_p2p_handshake == 0)
 						rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len - sizeof(struct rtw_ieee80211_hdr_3addr));
-#endif
+					#endif
 				}
 
 				cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, NULL, &cont_len);
 				if (cont) {
-#ifdef CONFIG_P2P_INVITE_IOT
+					#ifdef CONFIG_P2P_INVITE_IOT
 					if (tx && *cont == 7) {
 						RTW_INFO("TX_P2P_INVITE_RESP, status is no common channel, change to unknown group\n");
 						*cont = 8; /* unknow group status */
 					}
-#endif /* CONFIG_P2P_INVITE_IOT */
+					#endif /* CONFIG_P2P_INVITE_IOT */
 					status = *cont;
 				}
 				cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, &cont_len);
 				if (cont)
 					op_ch = *(cont + 4);
+				cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GROUP_BSSID, NULL, &cont_len);
+				if (cont && cont_len == 6)
+					gbssid = cont;
 
 				if (invit_info->token == dialogToken && invit_info->state == 0
 				    && _rtw_memcmp(invit_info->peer_mac, tx ? GetAddr1Ptr(buf) : get_addr2_ptr(buf), ETH_ALEN) == _TRUE
@@ -4048,8 +4129,11 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx)
 				}
 
 				dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128);
-				RTW_INFO("RTW_%s:P2P_INVIT_RESP, dialogToken=%d, status:%d, op_ch:%d, ch_list:%s\n",
-					(tx == _TRUE) ? "Tx" : "Rx", dialogToken, status, op_ch, ch_list_buf);
+				RTW_INFO("RTW_%s:P2P_INVIT_RESP, dialogToken=%d, status:%d, op_ch:%d, ch_list:%s"
+					, (tx == _TRUE) ? "Tx" : "Rx", dialogToken, status, op_ch, ch_list_buf);
+				if (gbssid)
+					_RTW_INFO(", gbssid:"MAC_FMT, MAC_ARG(gbssid));
+				_RTW_INFO("\n");
 
 				if (!tx) {
 				}
@@ -4081,9 +4165,9 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx)
 						if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, NULL, &contentlen)) {
 							pwdev_priv->provdisc_req_issued = _FALSE;/* case: p2p_client join p2p GO */
 						} else {
-#ifdef CONFIG_DEBUG_CFG80211
+							#ifdef CONFIG_DEBUG_CFG80211
 							RTW_INFO("provdisc_req_issued is _TRUE\n");
-#endif /*CONFIG_DEBUG_CFG80211*/
+							#endif /*CONFIG_DEBUG_CFG80211*/
 							pwdev_priv->provdisc_req_issued = _TRUE;/* case: p2p_devices connection before Nego req. */
 						}
 
@@ -4105,10 +4189,10 @@ int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx)
 		OUI_Subtype = frame_body[5];
 		dialogToken = frame_body[6];
 
-#ifdef CONFIG_DEBUG_CFG80211
+		#ifdef CONFIG_DEBUG_CFG80211
 		RTW_INFO("ACTION_CATEGORY_P2P: OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n",
 			cpu_to_be32(*((u32 *)(frame_body + 1))), OUI_Subtype, dialogToken);
-#endif
+		#endif
 
 		is_p2p_frame = OUI_Subtype;
 
@@ -4142,25 +4226,25 @@ void rtw_init_cfg80211_wifidirect_info(_adapter	*padapter)
 
 	_rtw_memset(pcfg80211_wdinfo, 0x00, sizeof(struct cfg80211_wifidirect_info));
 
-	_init_timer(&pcfg80211_wdinfo->remain_on_ch_timer, padapter->pnetdev, ro_ch_timer_process, padapter);
+	rtw_init_timer(&pcfg80211_wdinfo->remain_on_ch_timer, padapter, ro_ch_timer_process, padapter);
 }
 #endif /* CONFIG_IOCTL_CFG80211	 */
 
-void p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType)
+s32 p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType, u8 *buf)
 {
+	int ret = H2C_SUCCESS;
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
 
-
 	switch (intCmdType) {
-	case P2P_FIND_PHASE_WK: {
+	case P2P_FIND_PHASE_WK:
 		find_phase_handler(padapter);
 		break;
-	}
-	case P2P_RESTORE_STATE_WK: {
+
+	case P2P_RESTORE_STATE_WK:
 		restore_p2p_state_handler(padapter);
 		break;
-	}
-	case P2P_PRE_TX_PROVDISC_PROCESS_WK: {
+
+	case P2P_PRE_TX_PROVDISC_PROCESS_WK:
 #ifdef CONFIG_CONCURRENT_MODE
 		if (rtw_mi_check_status(padapter, MI_LINKED))
 			p2p_concurrent_handler(padapter);
@@ -4170,8 +4254,8 @@ void p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType)
 		pre_tx_provdisc_handler(padapter);
 #endif
 		break;
-	}
-	case P2P_PRE_TX_INVITEREQ_PROCESS_WK: {
+
+	case P2P_PRE_TX_INVITEREQ_PROCESS_WK:
 #ifdef CONFIG_CONCURRENT_MODE
 		if (rtw_mi_check_status(padapter, MI_LINKED))
 			p2p_concurrent_handler(padapter);
@@ -4181,8 +4265,8 @@ void p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType)
 		pre_tx_invitereq_handler(padapter);
 #endif
 		break;
-	}
-	case P2P_PRE_TX_NEGOREQ_PROCESS_WK: {
+
+	case P2P_PRE_TX_NEGOREQ_PROCESS_WK:
 #ifdef CONFIG_CONCURRENT_MODE
 		if (rtw_mi_check_status(padapter, MI_LINKED))
 			p2p_concurrent_handler(padapter);
@@ -4192,24 +4276,28 @@ void p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType)
 		pre_tx_negoreq_handler(padapter);
 #endif
 		break;
-	}
-#ifdef CONFIG_P2P
+
 #ifdef CONFIG_CONCURRENT_MODE
-	case P2P_AP_P2P_CH_SWITCH_PROCESS_WK: {
+	case P2P_AP_P2P_CH_SWITCH_PROCESS_WK:
 		p2p_concurrent_handler(padapter);
 		break;
-	}
-#endif
 #endif
+
 #ifdef CONFIG_IOCTL_CFG80211
-	case P2P_RO_CH_WK: {
-		ro_ch_handler(padapter);
+	case P2P_RO_CH_WK:
+		ret = ro_ch_handler(padapter, buf);
 		break;
-	}
-#endif /* CONFIG_IOCTL_CFG80211		 */
+	case P2P_CANCEL_RO_CH_WK:
+		ret = cancel_ro_ch_handler(padapter, buf);
+		break;
+#endif
 
+	default:
+		rtw_warn_on(1);
+		break;
 	}
 
+	return ret;
 }
 
 int process_p2p_cross_connect_ie(PADAPTER padapter, u8 *IEs, u32 IELength)
@@ -4265,7 +4353,7 @@ void process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength)
 	if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
 		return;
 #ifdef CONFIG_CONCURRENT_MODE
-#ifndef CONFIG_SUPPORT_FW_MULTI_PORT
+#ifndef CONFIG_FW_MULTI_PORT_SUPPORT
 	if (padapter->hw_port != HW_PORT0)
 		return;
 #endif
@@ -4345,7 +4433,8 @@ void p2p_ps_wk_hdl(_adapter *padapter, u8 p2p_ps_state)
 {
 	struct pwrctrl_priv		*pwrpriv = adapter_to_pwrctl(padapter);
 	struct wifidirect_info	*pwdinfo = &(padapter->wdinfo);
-
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	u32 ps_deny = 0;
 
 	/* Pre action for p2p state */
 	switch (p2p_ps_state) {
@@ -4367,6 +4456,16 @@ void p2p_ps_wk_hdl(_adapter *padapter, u8 p2p_ps_state)
 		}
 		break;
 	case P2P_PS_ENABLE:
+		_enter_pwrlock(&adapter_to_pwrctl(padapter)->lock);
+		ps_deny = rtw_ps_deny_get(padapter);
+		_exit_pwrlock(&adapter_to_pwrctl(padapter)->lock);
+
+		if ((ps_deny & (PS_DENY_SCAN | PS_DENY_JOIN))
+			|| rtw_mi_check_fwstate(padapter, (_FW_UNDER_SURVEY | _FW_UNDER_LINKING))) {
+			pwdinfo->p2p_ps_mode = P2P_PS_NONE;
+			RTW_DBG(FUNC_ADPT_FMT" Block P2P PS under site survey or LINKING\n", FUNC_ADPT_ARG(padapter));
+			return;
+		}
 		if (pwdinfo->p2p_ps_mode > P2P_PS_NONE) {
 #ifdef CONFIG_MCC_MODE
 			if (MCC_EN(padapter)) {
@@ -4414,7 +4513,7 @@ u8 p2p_ps_wk_cmd(_adapter *padapter, u8 p2p_ps_state, u8 enqueue)
 
 	if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)
 #ifdef CONFIG_CONCURRENT_MODE
-#ifndef CONFIG_SUPPORT_FW_MULTI_PORT
+#ifndef CONFIG_FW_MULTI_PORT_SUPPORT
 	    || (padapter->hw_port != HW_PORT0)
 #endif
 #endif
@@ -4794,13 +4893,13 @@ void rtw_init_wifidirect_timers(_adapter *padapter)
 {
 	struct wifidirect_info *pwdinfo = &padapter->wdinfo;
 
-	_init_timer(&pwdinfo->find_phase_timer, padapter->pnetdev, find_phase_timer_process, padapter);
-	_init_timer(&pwdinfo->restore_p2p_state_timer, padapter->pnetdev, restore_p2p_state_timer_process, padapter);
-	_init_timer(&pwdinfo->pre_tx_scan_timer, padapter->pnetdev, pre_tx_scan_timer_process, padapter);
-	_init_timer(&pwdinfo->reset_ch_sitesurvey, padapter->pnetdev, reset_ch_sitesurvey_timer_process, padapter);
-	_init_timer(&pwdinfo->reset_ch_sitesurvey2, padapter->pnetdev, reset_ch_sitesurvey_timer_process2, padapter);
+	rtw_init_timer(&pwdinfo->find_phase_timer, padapter, find_phase_timer_process, padapter);
+	rtw_init_timer(&pwdinfo->restore_p2p_state_timer, padapter, restore_p2p_state_timer_process, padapter);
+	rtw_init_timer(&pwdinfo->pre_tx_scan_timer, padapter, pre_tx_scan_timer_process, padapter);
+	rtw_init_timer(&pwdinfo->reset_ch_sitesurvey, padapter, reset_ch_sitesurvey_timer_process, padapter);
+	rtw_init_timer(&pwdinfo->reset_ch_sitesurvey2, padapter, reset_ch_sitesurvey_timer_process2, padapter);
 #ifdef CONFIG_CONCURRENT_MODE
-	_init_timer(&pwdinfo->ap_p2p_switch_timer, padapter->pnetdev, ap_p2p_switch_timer_process, padapter);
+	rtw_init_timer(&pwdinfo->ap_p2p_switch_timer, padapter, ap_p2p_switch_timer_process, padapter);
 #endif
 }
 
@@ -4834,21 +4933,25 @@ void init_wifidirect_info(_adapter *padapter, enum P2P_ROLE role)
 	pwdinfo->social_chan[2] = 11;
 	pwdinfo->social_chan[3] = 0;	/*	channel 0 for scanning ending in site survey function. */
 
-#ifdef CONFIG_CONCURRENT_MODE
-	if (rtw_mi_check_status(padapter, MI_LINKED))
-		union_ch = rtw_mi_get_union_chan(padapter);
-
-	if ((union_ch != 0) &&
-	    ((union_ch == 1) || (union_ch == 6) || (union_ch == 11))
-	   ) {
-		/*	Use the AP's channel as the listen channel */
-		/*	This will avoid the channel switch between AP's channel and listen channel. */
-		pwdinfo->listen_channel = union_ch;
-	} else
-#endif /* CONFIG_CONCURRENT_MODE */
-	{
-		/*	Use the channel 11 as the listen channel */
-		pwdinfo->listen_channel = 11;
+	if (role != P2P_ROLE_DISABLE
+		&& pwdinfo->driver_interface != DRIVER_CFG80211
+	) {
+		#ifdef CONFIG_CONCURRENT_MODE
+		if (rtw_mi_check_status(padapter, MI_LINKED))
+			union_ch = rtw_mi_get_union_chan(padapter);
+
+		if (union_ch != 0 &&
+			(union_ch == 1 || union_ch == 6 || union_ch == 11)
+		) {
+			/* Use the AP's channel as the listen channel */
+			/* This will avoid the channel switch between AP's channel and listen channel */
+			pwdinfo->listen_channel = union_ch;
+		} else
+		#endif /* CONFIG_CONCURRENT_MODE */
+		{
+			/* Use the channel 11 as the listen channel */
+			pwdinfo->listen_channel = 11;
+		}
 	}
 
 	if (role == P2P_ROLE_DEVICE) {
@@ -5120,7 +5223,7 @@ int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role)
 		u8 channel, ch_offset;
 		u16 bwmode;
 
-#ifdef CONFIG_CONCURRENT_MODE
+#if defined(CONFIG_CONCURRENT_MODE) && (!defined(RTW_P2P_GROUP_INTERFACE) || !RTW_P2P_GROUP_INTERFACE)
 		/*	Commented by Albert 2011/12/30 */
 		/*	The driver just supports 1 P2P group operation. */
 		/*	So, this function will do nothing if the buddy adapter had enabled the P2P function. */
@@ -5140,11 +5243,19 @@ int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role)
 		/*	Added by Albert 2011/03/22 */
 		/*	In the P2P mode, the driver should not support the b mode. */
 		/*	So, the Tx packet shouldn't use the CCK rate */
-		update_tx_basic_rate(padapter, WIRELESS_11AGN);
+		#ifdef CONFIG_IOCTL_CFG80211
+		if (rtw_cfg80211_iface_has_p2p_group_cap(padapter))
+		#endif
+			update_tx_basic_rate(padapter, WIRELESS_11AGN);
 
 		/* Enable P2P function */
 		init_wifidirect_info(padapter, role);
 
+		#ifdef CONFIG_IOCTL_CFG80211
+		if (padapter->wdinfo.driver_interface == DRIVER_CFG80211)
+			adapter_wdev_data(padapter)->p2p_enabled = _TRUE;
+		#endif
+
 		rtw_hal_set_odm_var(padapter, HAL_ODM_P2P_STATE, NULL, _TRUE);
 #ifdef CONFIG_WFD
 		if (hal_chk_wl_func(padapter, WL_FUNC_MIRACAST))
@@ -5157,11 +5268,12 @@ int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role)
 			return ret;
 #endif /* CONFIG_INTEL_WIDI */
 
-#ifdef CONFIG_IOCTL_CFG80211
+		#ifdef CONFIG_IOCTL_CFG80211
 		if (padapter->wdinfo.driver_interface == DRIVER_CFG80211)
 			adapter_wdev_data(padapter)->p2p_enabled = _FALSE;
-#endif /* CONFIG_IOCTL_CFG80211 */
+		#endif
 
+		pwdinfo->listen_channel = 0;
 
 		/* Disable P2P function */
 		if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) {
diff --git a/rtl8822BU/core/rtw_pwrctrl.c b/rtl8822BU/core/rtw_pwrctrl.c
index 60cf026..eca0e4a 100755..100644
--- a/rtl8822BU/core/rtw_pwrctrl.c
+++ b/rtl8822BU/core/rtw_pwrctrl.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_PWRCTRL_C_
 
 #include <drv_types.h>
@@ -220,7 +215,7 @@ bool rtw_pwr_unassociated_idle(_adapter *adapter)
 			    || check_fwstate(pmlmepriv, WIFI_AP_STATE)
 			    || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE)
 #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211)
-			    || pcfg80211_wdinfo->is_ro_ch
+			    || rtw_cfg80211_get_is_roch(iface) == _TRUE
 #elif defined(CONFIG_P2P)
 			    || rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)
 			    || rtw_p2p_chk_state(pwdinfo, P2P_STATE_LISTEN)
@@ -393,10 +388,9 @@ exit:
 	return;
 }
 
-void pwr_state_check_handler(RTW_TIMER_HDL_ARGS);
-void pwr_state_check_handler(RTW_TIMER_HDL_ARGS)
+void pwr_state_check_handler(void *ctx)
 {
-	_adapter *padapter = (_adapter *)FunctionContext;
+	_adapter *padapter = (_adapter *)ctx;
 	rtw_ps_cmd(padapter);
 }
 
@@ -456,6 +450,61 @@ void	traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets)
 #endif /* CONFIG_CHECK_LEAVE_LPS */
 }
 
+#ifdef CONFIG_LPS_LCLK
+u8 rtw_cpwm_polling(_adapter *adapter, u8 cpwm_orig)
+{
+	u8 result = _FAIL;
+	u8 cpwm_now;
+	u8 poll_cnt = 0;
+	u32 start_time;
+	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
+	struct debug_priv *pdbgpriv = &(adapter_to_dvobj(adapter)->drv_dbg);
+
+	/*RTW_INFO("%s.....\n", __func__);*/
+
+	start_time = rtw_get_current_time();
+
+	/* polling cpwm */
+	do {
+		rtw_msleep_os(1);
+		poll_cnt++;
+		cpwm_now = 0;
+		rtw_hal_get_hwreg(adapter, HW_VAR_CPWM, &cpwm_now);
+
+		if ((cpwm_orig ^ cpwm_now) & 0x80) {
+			pwrpriv->cpwm = PS_STATE_S4;
+			pwrpriv->cpwm_tog = cpwm_now & PS_TOGGLE;
+			#ifdef DBG_CHECK_FW_PS_STATE
+			RTW_INFO("%s: polling cpwm OK! poll_cnt=%d, cpwm_orig=%02x, cpwm_now=%02x , 0x100=0x%x\n"
+				, __func__, poll_cnt, cpwm_orig, cpwm_now, rtw_read8(adapter, REG_CR));
+			if (rtw_fw_ps_state(adapter) == _FAIL) {
+				RTW_INFO("leave 32k but fw state in 32k\n");
+				pdbgpriv->dbg_rpwm_toogle_cnt++;
+			}
+			#endif /* DBG_CHECK_FW_PS_STATE */
+			result = _SUCCESS;
+			break;
+		}
+
+		if (rtw_get_passing_time_ms(start_time) > LPS_RPWM_WAIT_MS) {
+			RTW_ERR("%s: polling cpwm timeout! poll_cnt=%d, cpwm_orig=%02x, cpwm_now=%02x\n"
+				, __func__, poll_cnt, cpwm_orig, cpwm_now);
+			#ifdef DBG_CHECK_FW_PS_STATE
+			if (rtw_fw_ps_state(adapter) == _FAIL) {
+				RTW_INFO("rpwm timeout and fw ps state in 32k\n");
+				pdbgpriv->dbg_rpwm_timeout_fail_cnt++;
+			}
+			#endif /* DBG_CHECK_FW_PS_STATE */
+
+			#ifdef CONFIG_LPS_RPWM_TIMER
+			_set_timer(&pwrpriv->pwr_rpwm_timer, 1);
+			#endif /* CONFIG_LPS_RPWM_TIMER */
+			break;
+		}
+	} while (1);
+	return result;
+}
+#endif
 /*
  * Description:
  *	This function MUST be called under power lock protect
@@ -469,9 +518,9 @@ void rtw_set_rpwm(PADAPTER padapter, u8 pslv)
 {
 	u8	rpwm;
 	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
-#ifdef CONFIG_DETECT_CPWM_BY_POLLING
+#ifdef CONFIG_LPS_LCLK
 	u8 cpwm_orig;
-#endif /* CONFIG_DETECT_CPWM_BY_POLLING */
+#endif
 	struct dvobj_priv *psdpriv = padapter->dvobj;
 	struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
 
@@ -487,6 +536,7 @@ void rtw_set_rpwm(PADAPTER padapter, u8 pslv)
 #ifdef CONFIG_LPS_LCLK
 		    || ((pwrpriv->rpwm >= PS_STATE_S2) && (pslv >= PS_STATE_S2))
 #endif
+			|| (pwrpriv->lps_level == LPS_NORMAL)
 		   ) {
 			return;
 		}
@@ -500,12 +550,9 @@ void rtw_set_rpwm(PADAPTER padapter, u8 pslv)
 		return;
 	}
 
-	if (rtw_is_drv_stopped(padapter)) {
-
-		if (pslv < PS_STATE_S2) {
+	if (rtw_is_drv_stopped(padapter))
+		if (pslv < PS_STATE_S2)
 			return;
-		}
-	}
 
 	rpwm = pslv | pwrpriv->tog;
 #ifdef CONFIG_LPS_LCLK
@@ -516,7 +563,7 @@ void rtw_set_rpwm(PADAPTER padapter, u8 pslv)
 
 	pwrpriv->rpwm = pslv;
 
-#ifdef CONFIG_DETECT_CPWM_BY_POLLING
+#ifdef CONFIG_LPS_LCLK
 	cpwm_orig = 0;
 	if (rpwm & PS_ACK)
 		rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_orig);
@@ -534,47 +581,15 @@ void rtw_set_rpwm(PADAPTER padapter, u8 pslv)
 	/* No LPS 32K, No Ack */
 	if (rpwm & PS_ACK) {
 #ifdef CONFIG_DETECT_CPWM_BY_POLLING
-		u32 start_time;
-		u8 cpwm_now;
-		u8 poll_cnt = 0;
-
-		start_time = rtw_get_current_time();
-
-		/* polling cpwm */
-		do {
-			rtw_msleep_os(1);
-			poll_cnt++;
-			cpwm_now = 0;
-			rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_now);
-			if ((cpwm_orig ^ cpwm_now) & 0x80) {
-				pwrpriv->cpwm = PS_STATE_S4;
-				pwrpriv->cpwm_tog = cpwm_now & PS_TOGGLE;
-#ifdef DBG_CHECK_FW_PS_STATE
-				RTW_INFO("%s: polling cpwm OK! poll_cnt=%d, cpwm_orig=%02x, cpwm_now=%02x , 0x100=0x%x\n"
-					, __FUNCTION__, poll_cnt, cpwm_orig, cpwm_now, rtw_read8(padapter, REG_CR));
-				if (rtw_fw_ps_state(padapter) == _FAIL) {
-					RTW_INFO("leave 32k but fw state in 32k\n");
-					pdbgpriv->dbg_rpwm_toogle_cnt++;
-				}
-#endif /* DBG_CHECK_FW_PS_STATE */
-				break;
-			}
-
-			if (rtw_get_passing_time_ms(start_time) > LPS_RPWM_WAIT_MS) {
-				RTW_INFO("%s: polling cpwm timeout! poll_cnt=%d, cpwm_orig=%02x, cpwm_now=%02x\n", __FUNCTION__, poll_cnt, cpwm_orig, cpwm_now);
-#ifdef DBG_CHECK_FW_PS_STATE
-				if (rtw_fw_ps_state(padapter) == _FAIL) {
-					RTW_INFO("rpwm timeout and fw ps state in 32k\n");
-					pdbgpriv->dbg_rpwm_timeout_fail_cnt++;
-				}
-#endif /* DBG_CHECK_FW_PS_STATE */
-#ifdef CONFIG_LPS_RPWM_TIMER
-				_set_timer(&pwrpriv->pwr_rpwm_timer, 1);
-#endif /* CONFIG_LPS_RPWM_TIMER */
-				break;
-			}
-		} while (1);
-#endif /* CONFIG_DETECT_CPWM_BY_POLLING */
+		rtw_cpwm_polling(padapter, cpwm_orig);
+		#else
+		#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_P2P_WOWLAN)
+		if (pwrpriv->wowlan_mode == _TRUE ||
+			pwrpriv->wowlan_ap_mode == _TRUE ||
+			pwrpriv->wowlan_p2p_mode == _TRUE)
+				rtw_cpwm_polling(padapter, cpwm_orig);
+		#endif /*#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_P2P_WOWLAN)*/
+		#endif /*#ifdef CONFIG_DETECT_CPWM_BY_POLLING*/
 	} else
 #endif /* CONFIG_LPS_LCLK */
 	{
@@ -619,7 +634,7 @@ u8 PS_RDY_CHECK(_adapter *padapter)
 	    || check_fwstate(pmlmepriv, WIFI_AP_STATE)
 	    || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE)
 #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211)
-	    || pcfg80211_wdinfo->is_ro_ch
+	    || rtw_cfg80211_get_is_roch(padapter) == _TRUE
 #endif
 	    || rtw_is_scan_deny(padapter)
 #ifdef CONFIG_TDLS
@@ -774,6 +789,9 @@ void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode
 	_list	*plist, *phead;
 	struct sta_info *ptdls_sta;
 #endif /* CONFIG_TDLS */
+#ifdef CONFIG_LPS_PG
+	u8 lps_pg_hdl_id = 0;
+#endif
 
 
 
@@ -792,9 +810,19 @@ void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode
 #endif /* !CONFIG_BT_COEXIST */
 	}
 
+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+	if (PS_MODE_ACTIVE != ps_mode) {
+		rtw_set_ps_rsvd_page(padapter);
+		rtw_set_default_port_id(padapter);
+	}
+#endif
+
 #ifdef CONFIG_LPS_PG
-	if ((PS_MODE_ACTIVE != ps_mode) && (pwrpriv->blpspg_info_up))
-		rtw_hal_set_lps_pg_info(padapter);
+	if ((PS_MODE_ACTIVE != ps_mode) && (pwrpriv->blpspg_info_up)) {
+		/*rtw_hal_set_lps_pg_info(padapter);*/
+		lps_pg_hdl_id = LPS_PG_INFO_CFG;
+		rtw_hal_set_hwreg(padapter, HW_VAR_LPS_PG_HANDLE, (u8 *)(&lps_pg_hdl_id));
+	}
 #endif
 
 #ifdef CONFIG_LPS_LCLK
@@ -868,7 +896,21 @@ void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode
 				} while (1);
 			}
 #endif
+#ifdef CONFIG_LPS_PG
+			if (pwrpriv->lps_level == LPS_PG) {
+				lps_pg_hdl_id = LPS_PG_REDLEMEM;
+				rtw_hal_set_hwreg(padapter, HW_VAR_LPS_PG_HANDLE, (u8 *)(&lps_pg_hdl_id));
+			}
+#endif
 			rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
+
+#ifdef CONFIG_LPS_PG
+			if (pwrpriv->lps_level == LPS_PG) {
+				lps_pg_hdl_id = LPS_PG_RESEND_H2C;
+				rtw_hal_set_hwreg(padapter, HW_VAR_LPS_PG_HANDLE, (u8 *)(&lps_pg_hdl_id));
+			}
+#endif
+
 #ifdef CONFIG_LPS_POFF
 			rtw_hal_set_hwreg(padapter, HW_VAR_LPS_POFF_SET_MODE,
 					  (u8 *)(&ps_mode));
@@ -1014,7 +1056,7 @@ void LPS_Enter(PADAPTER padapter, const char *msg)
 
 
 	/*	RTW_INFO("+LeisurePSEnter\n"); */
-	if (_FALSE == padapter->bFWReady)
+	if (GET_HAL_DATA(padapter)->bFWReady == _FALSE)
 		return;
 
 #ifdef CONFIG_BT_COEXIST
@@ -1030,7 +1072,7 @@ void LPS_Enter(PADAPTER padapter, const char *msg)
 	if (n_assoc_iface != 1)
 		return;
 
-#ifndef CONFIG_SUPPORT_FW_MULTI_PORT
+#ifndef CONFIG_FW_MULTI_PORT_SUPPORT
 	/* Skip lps enter request for adapter not port0 */
 	if (get_hw_port(padapter) != HW_PORT0)
 		return;
@@ -1106,6 +1148,20 @@ void LPS_Leave(PADAPTER padapter, const char *msg)
  * 	RTW_INFO("-LeisurePSLeave\n"); */
 
 }
+
+void rtw_wow_lps_level_decide(_adapter *adapter, u8 wow_en)
+{
+#if defined(CONFIG_USB_HCI) && defined(CONFIG_LPS_LCLK)
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj);
+
+	if (wow_en) {
+		pwrpriv->lps_level_bk = pwrpriv->lps_level;
+		pwrpriv->lps_level = LPS_LCLK;
+	} else
+		pwrpriv->lps_level = pwrpriv->lps_level_bk;
+#endif
+}
 #endif
 
 void LeaveAllPowerSaveModeDirect(PADAPTER Adapter)
@@ -1252,7 +1308,13 @@ void LeaveAllPowerSaveMode(IN PADAPTER Adapter)
 #endif
 
 #ifdef CONFIG_P2P_PS
-		p2p_ps_wk_cmd(Adapter, P2P_PS_DISABLE, enqueue);
+		for (i = 0; i < dvobj->iface_nums; i++) {
+			_adapter *iface = dvobj->padapters[i];
+			struct wifidirect_info *pwdinfo = &(iface->wdinfo);
+
+			if (pwdinfo->p2p_ps_mode > P2P_PS_NONE)
+				p2p_ps_wk_cmd(iface, P2P_PS_DISABLE, enqueue);
+		}
 #endif /* CONFIG_P2P_PS */
 
 #ifdef CONFIG_LPS
@@ -1341,6 +1403,11 @@ void cpwm_int_hdl(
 {
 	struct pwrctrl_priv *pwrpriv;
 
+	if (!padapter)
+		goto exit;
+
+	if (RTW_CANNOT_RUN(padapter))
+		goto exit;
 
 	pwrpriv = adapter_to_pwrctl(padapter);
 #if 0
@@ -1411,6 +1478,12 @@ static void rpwmtimeout_workitem_callback(struct work_struct *work)
 	padapter = dvobj_get_primary_adapter(dvobj);
 	/*	RTW_INFO("+%s: rpwm=0x%02X cpwm=0x%02X\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm); */
 
+	if (!padapter)
+		return;
+
+	if (RTW_CANNOT_RUN(padapter))
+		return;
+
 	_enter_pwrlock(&pwrpriv->lock);
 	if ((pwrpriv->rpwm == pwrpriv->cpwm) || (pwrpriv->cpwm >= PS_STATE_S2)) {
 		RTW_INFO("%s: rpwm=0x%02X cpwm=0x%02X CPWM done!\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm);
@@ -1457,6 +1530,12 @@ static void pwr_rpwm_timeout_handler(void *FunctionContext)
 
 	padapter = (PADAPTER)FunctionContext;
 	pwrpriv = adapter_to_pwrctl(padapter);
+	if (!padapter)
+		return;
+
+	if (RTW_CANNOT_RUN(padapter))
+		return;
+
 	RTW_INFO("+%s: rpwm=0x%02X cpwm=0x%02X\n", __func__, pwrpriv->rpwm, pwrpriv->cpwm);
 
 	if ((pwrpriv->rpwm == pwrpriv->cpwm) || (pwrpriv->cpwm >= PS_STATE_S2)) {
@@ -1916,6 +1995,7 @@ void rtw_init_pwrctrl_priv(PADAPTER padapter)
 
 	pwrctrlpriv->ips_mode = padapter->registrypriv.ips_mode;
 	pwrctrlpriv->ips_mode_req = padapter->registrypriv.ips_mode;
+	pwrctrlpriv->lps_level = padapter->registrypriv.lps_level;
 
 	pwrctrlpriv->pwr_state_check_interval = RTW_PWR_STATE_CHK_INTERVAL;
 	pwrctrlpriv->pwr_state_check_cnts = 0;
@@ -1964,15 +2044,16 @@ void rtw_init_pwrctrl_priv(PADAPTER padapter)
 #ifdef CONFIG_LPS_RPWM_TIMER
 	pwrctrlpriv->brpwmtimeout = _FALSE;
 	_init_workitem(&pwrctrlpriv->rpwmtimeoutwi, rpwmtimeout_workitem_callback, NULL);
-	_init_timer(&pwrctrlpriv->pwr_rpwm_timer, padapter->pnetdev, pwr_rpwm_timeout_handler, padapter);
+	rtw_init_timer(&pwrctrlpriv->pwr_rpwm_timer, padapter, pwr_rpwm_timeout_handler, padapter);
 #endif /* CONFIG_LPS_RPWM_TIMER */
 #endif /* CONFIG_LPS_LCLK */
 
-	rtw_init_timer(&pwrctrlpriv->pwr_state_check_timer, padapter, pwr_state_check_handler);
+	rtw_init_timer(&pwrctrlpriv->pwr_state_check_timer, padapter, pwr_state_check_handler, padapter);
 
 	pwrctrlpriv->wowlan_mode = _FALSE;
 	pwrctrlpriv->wowlan_ap_mode = _FALSE;
 	pwrctrlpriv->wowlan_p2p_mode = _FALSE;
+	pwrctrlpriv->wowlan_in_resume = _FALSE;
 	pwrctrlpriv->wowlan_last_wake_reason = 0;
 
 #ifdef CONFIG_RESUME_IN_WORKQUEUE
@@ -1997,7 +2078,6 @@ void rtw_init_pwrctrl_priv(PADAPTER padapter)
 
 #ifdef CONFIG_WOWLAN
 	rtw_wow_pattern_sw_reset(padapter);
-	pwrctrlpriv->wowlan_in_resume = _FALSE;
 #ifdef CONFIG_PNO_SUPPORT
 	pwrctrlpriv->pno_inited = _FALSE;
 	pwrctrlpriv->pnlo_info = NULL;
@@ -2401,6 +2481,19 @@ int rtw_pm_set_lps(_adapter *padapter, u8 mode)
 	return ret;
 }
 
+int rtw_pm_set_lps_level(_adapter *padapter, u8 level)
+{
+	int	ret = 0;
+	struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter);
+
+	if (level < LPS_LEVEL_MAX)
+		pwrctrlpriv->lps_level = level;
+	else
+		ret = -EINVAL;
+
+	return ret;
+}
+
 int rtw_pm_set_ips(_adapter *padapter, u8 mode)
 {
 	struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter);
diff --git a/rtl8822BU/core/rtw_recv.c b/rtl8822BU/core/rtw_recv.c
index e27d3c0..69c7a3c 100755..100644
--- a/rtl8822BU/core/rtw_recv.c
+++ b/rtl8822BU/core/rtw_recv.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_RECV_C_
 
 #include <drv_types.h>
@@ -30,7 +25,7 @@
 
 
 #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
-void rtw_signal_stat_timer_hdl(RTW_TIMER_HDL_ARGS);
+static void rtw_signal_stat_timer_hdl(void *ctx);
 
 enum {
 	SIGNAL_STAT_CALC_PROFILE_0 = 0,
@@ -81,7 +76,7 @@ sint _rtw_init_recv_priv(struct recv_priv *precvpriv, _adapter *padapter)
 
 #ifdef CONFIG_RECV_THREAD_MODE
 	_rtw_init_sema(&precvpriv->recv_sema, 0);
-	_rtw_init_sema(&precvpriv->terminate_recvthread_sema, 0);
+
 #endif
 
 	_rtw_init_queue(&precvpriv->free_recv_queue);
@@ -144,7 +139,7 @@ sint _rtw_init_recv_priv(struct recv_priv *precvpriv, _adapter *padapter)
 	res = rtw_hal_init_recv_priv(padapter);
 
 #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
-	rtw_init_timer(&precvpriv->signal_stat_timer, padapter, RTW_TIMER_HDL_NAME(signal_stat));
+	rtw_init_timer(&precvpriv->signal_stat_timer, padapter, rtw_signal_stat_timer_hdl, padapter);
 
 	precvpriv->signal_stat_sampling_interval = 2000; /* ms */
 	/* precvpriv->signal_stat_converging_constant = 5000; */ /* ms */
@@ -165,7 +160,6 @@ void rtw_mfree_recv_priv_lock(struct recv_priv *precvpriv)
 	_rtw_spinlock_free(&precvpriv->lock);
 #ifdef CONFIG_RECV_THREAD_MODE
 	_rtw_free_sema(&precvpriv->recv_sema);
-	_rtw_free_sema(&precvpriv->terminate_recvthread_sema);
 #endif
 
 	_rtw_spinlock_free(&precvpriv->free_recv_queue.lock);
@@ -788,6 +782,11 @@ sint recv_decache(union recv_frame *precv_frame, u8 bretry, struct stainfo_rxcac
 
 	if (1) { /* if(bretry) */
 		if (seq_ctrl == prxcache->tid_rxseq[tid]) {
+			/* for non-AMPDU case	*/
+			precv_frame->u.hdr.psta->sta_stats.duplicate_cnt++;
+
+			if (precv_frame->u.hdr.psta->sta_stats.duplicate_cnt % 100 == 0)
+				RTW_INFO("%s: seq=%d\n", __func__, precv_frame->u.hdr.attrib.seq_num);
 
 			return _FAIL;
 		}
@@ -1034,6 +1033,7 @@ void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_in
 		pstats->rx_data_pkts++;
 		pstats->rx_bytes += sz;
 
+		pstats->rxratecnt[pattrib->data_rate]++;
 		/*record rx packets for every tid*/
 		pstats->rx_data_qos_pkts[pattrib->priority]++;
 
@@ -2023,6 +2023,7 @@ sint validate_recv_frame(_adapter *adapter, union recv_frame *precv_frame)
 	u8 *ptr = precv_frame->u.hdr.rx_data;
 	u8  ver = (unsigned char)(*ptr) & 0x3 ;
 #ifdef CONFIG_FIND_BEST_CHANNEL
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
 	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
 #endif
 
@@ -2040,9 +2041,9 @@ sint validate_recv_frame(_adapter *adapter, union recv_frame *precv_frame)
 
 #ifdef CONFIG_FIND_BEST_CHANNEL
 	if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) {
-		int ch_set_idx = rtw_ch_set_search_ch(pmlmeext->channel_set, rtw_get_oper_ch(adapter));
+		int ch_set_idx = rtw_chset_search_ch(rfctl->channel_set, rtw_get_oper_ch(adapter));
 		if (ch_set_idx >= 0)
-			pmlmeext->channel_set[ch_set_idx].rx_count++;
+			rfctl->channel_set[ch_set_idx].rx_count++;
 	}
 #endif
 
@@ -2893,7 +2894,6 @@ int recv_indicatepkts_in_order(_adapter *padapter, struct recv_reorder_ctrl *pre
 int recv_indicatepkts_in_order(_adapter *padapter, struct recv_reorder_ctrl *preorder_ctrl, int bforced)
 {
 	/* _irqL irql; */
-	/* u8 bcancelled; */
 	_list	*phead, *plist;
 	union recv_frame *prframe;
 	struct rx_pkt_attrib *pattrib;
@@ -2976,8 +2976,8 @@ int recv_indicatepkts_in_order(_adapter *padapter, struct recv_reorder_ctrl *pre
 				/* Cancel previous pending timer. */
 				/* PlatformCancelTimer(Adapter, &pTS->RxPktPendingTimer); */
 				if (bforced != _TRUE) {
-					/* RTW_INFO("_cancel_timer(&preorder_ctrl->reordering_ctrl_timer, &bcancelled);\n"); */
-					_cancel_timer(&preorder_ctrl->reordering_ctrl_timer, &bcancelled);
+					/* RTW_INFO("_cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer);\n"); */
+					_cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer);
 				}
 			}
 #endif
@@ -4214,9 +4214,9 @@ _recv_entry_drop:
 }
 
 #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
-void rtw_signal_stat_timer_hdl(RTW_TIMER_HDL_ARGS)
+static void rtw_signal_stat_timer_hdl(void *ctx)
 {
-	_adapter *adapter = (_adapter *)FunctionContext;
+	_adapter *adapter = (_adapter *)ctx;
 	struct recv_priv *recvpriv = &adapter->recvpriv;
 
 	u32 tmp_s, tmp_q;
@@ -4512,8 +4512,8 @@ void rx_query_phy_status(
 
 	{
 		precvframe->u.hdr.psta = NULL;
-		if (pkt_info.is_packet_match_bssid
-		    && (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE)
+		if ((pkt_info.is_packet_match_bssid
+		    && (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE)) || (padapter->registrypriv.mp_mode == 1)
 		   ) {
 			if (psta) {
 				precvframe->u.hdr.psta = psta;
@@ -4526,6 +4526,8 @@ void rx_query_phy_status(
 			rx_process_phy_info(padapter, precvframe);
 		}
 	}
+
+	rtw_odm_parse_rx_phy_status_chinfo(precvframe, pphy_status);
 }
 /*
 * Increase and check if the continual_no_rx_packet of this @param pmlmepriv is larger than MAX_CONTINUAL_NORXPACKET_COUNT
@@ -4562,6 +4564,11 @@ s32 pre_recv_entry(union recv_frame *precvframe, u8 *pphy_status)
 	_adapter *iface = NULL;
 	_adapter *primary_padapter = precvframe->u.hdr.adapter;
 
+#ifdef CONFIG_MP_INCLUDED
+	if (rtw_mp_mode_check(primary_padapter))
+		return ret;
+#endif
+
 	pda = get_ra(pbuf);
 
 	if (IS_MCAST(pda) == _FALSE) { /*unicast packets*/
@@ -4584,7 +4591,11 @@ thread_return rtw_recv_thread(thread_context context)
 	_adapter *adapter = (_adapter *)context;
 	struct recv_priv *recvpriv = &adapter->recvpriv;
 	s32 err = _SUCCESS;
+#ifdef PLATFORM_LINUX
+	struct sched_param param = { .sched_priority = 1 };
 
+	sched_setscheduler(current, SCHED_FIFO, &param);
+#endif /* PLATFORM_LINUX */
 	thread_enter("RTW_RECV_THREAD");
 
 	RTW_INFO(FUNC_ADPT_FMT" enter\n", FUNC_ADPT_ARG(adapter));
@@ -4597,8 +4608,10 @@ thread_return rtw_recv_thread(thread_context context)
 		}
 
 		if (RTW_CANNOT_RUN(adapter)) {
-			RTW_INFO(FUNC_ADPT_FMT" DS:%d, SR:%d\n", FUNC_ADPT_ARG(adapter)
-				, rtw_is_drv_stopped(adapter), rtw_is_surprise_removed(adapter));
+			RTW_DBG(FUNC_ADPT_FMT "- bDriverStopped(%s) bSurpriseRemoved(%s)\n",
+				FUNC_ADPT_ARG(adapter),
+				rtw_is_drv_stopped(adapter) ? "True" : "False",
+				rtw_is_surprise_removed(adapter) ? "True" : "False");
 			goto exit;
 		}
 
@@ -4616,9 +4629,12 @@ thread_return rtw_recv_thread(thread_context context)
 	} while (err != _FAIL);
 
 exit:
-	_rtw_up_sema(&adapter->recvpriv.terminate_recvthread_sema);
-	RTW_INFO(FUNC_ADPT_FMT" exit\n", FUNC_ADPT_ARG(adapter));
-	thread_exit();
+
+	RTW_INFO(FUNC_ADPT_FMT " Exit\n", FUNC_ADPT_ARG(adapter));
+
+	rtw_thread_wait_stop();
+
+	return 0;
 }
 #endif /* CONFIG_RECV_THREAD_MODE */
 
diff --git a/rtl8822BU/core/rtw_rf.c b/rtl8822BU/core/rtw_rf.c
index a7d06b9..60a714e 100755..100644
--- a/rtl8822BU/core/rtw_rf.c
+++ b/rtl8822BU/core/rtw_rf.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_RF_C_
 
 #include <drv_types.h>
@@ -546,6 +541,30 @@ const u8 _band_to_band_cap[] = {
 	0,
 };
 
+const u8 _rf_type_to_rf_tx_cnt[] = {
+	1,
+	2,
+	2,
+	1,
+	2,
+	2,
+	3,
+	3,
+	4,
+};
+
+const u8 _rf_type_to_rf_rx_cnt[] = {
+	2,
+	4,
+	2,
+	1,
+	2,
+	3,
+	3,
+	4,
+	4,
+};
+
 #ifdef CONFIG_80211AC_VHT
 #define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val) , .en_11ac = (_val)
 #else
@@ -571,57 +590,93 @@ const u8 _band_to_band_cap[] = {
 
 #elif RTW_DEF_MODULE_REGULATORY_CERT
 
-#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AE_HMC_M2)
-static const struct country_chplan RTL8821AE_HMC_M2_country_chplan_map[] = {
-	COUNTRY_CHPLAN_ENT("CN", 0x51, 1, 0xFB), /* China */
-	COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0xFB), /* Russia(fac/gost), Kaliningrad */
-	COUNTRY_CHPLAN_ENT("UA", 0x26, 0, 0xFB), /* Ukraine */
+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AE_HMC_M2) /* 2013 certify */
+static const struct country_chplan RTL8821AE_HMC_M2_country_chplan_exc_map[] = {
+	COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0x3FB), /* Canada */
+	COUNTRY_CHPLAN_ENT("CL", 0x30, 1, 0x3F1), /* Chile */
+	COUNTRY_CHPLAN_ENT("CN", 0x51, 1, 0x3FB), /* China */
+	COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0x3F1), /* Mexico */
+	COUNTRY_CHPLAN_ENT("MY", 0x47, 1, 0x3F1), /* Malaysia */
+	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0x3FF), /* Taiwan */
+	COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0x3FB), /* Ukraine */
+	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0x3FF), /* United States of America (USA) */
+};
+#endif
+
+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AU) /* 2014 certify */
+static const struct country_chplan RTL8821AU_country_chplan_exc_map[] = {
+	COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0x3FB), /* Canada */
+	COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0x3FB), /* Russia(fac/gost), Kaliningrad */
+	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0x3FF), /* Taiwan */
+	COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0x3FB), /* Ukraine */
+	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0x3FF), /* United States of America (USA) */
+};
+#endif
+
+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AENF_NGFF) /* 2014 certify */
+static const struct country_chplan RTL8812AENF_NGFF_country_chplan_exc_map[] = {
+	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0x3FF), /* Taiwan */
+	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0x3FF), /* United States of America (USA) */
 };
-static const u16 RTL8821AE_HMC_M2_country_chplan_map_sz = sizeof(RTL8821AE_HMC_M2_country_chplan_map) / sizeof(struct country_chplan);
 #endif
 
-#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AU)
-static const struct country_chplan RTL8821AU_country_chplan_map[] = {
-	COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0xFB), /* Russia(fac/gost), Kaliningrad */
-	COUNTRY_CHPLAN_ENT("UA", 0x26, 0, 0xFB), /* Ukraine */
+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AEBT_HMC) /* 2013 certify */
+static const struct country_chplan RTL8812AEBT_HMC_country_chplan_exc_map[] = {
+	COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0x3FB), /* Canada */
+	COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0x3FB), /* Russia(fac/gost), Kaliningrad */
+	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0x3FF), /* Taiwan */
+	COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0x3FB), /* Ukraine */
+	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0x3FF), /* United States of America (USA) */
 };
-static const u16 RTL8821AU_country_chplan_map_sz = sizeof(RTL8821AU_country_chplan_map) / sizeof(struct country_chplan);
 #endif
 
-#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AENF_NGFF)
-static const struct country_chplan RTL8812AENF_NGFF_country_chplan_map[] = {
+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8188EE_HMC_M2) /* 2012 certify */
+static const struct country_chplan RTL8188EE_HMC_M2_country_chplan_exc_map[] = {
+	COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0x3FB), /* Canada */
+	COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0x3F1), /* Mexico */
+	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0x3FF), /* Taiwan */
+	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0x3FF), /* United States of America (USA) */
 };
-static const u16 RTL8812AENF_NGFF_country_chplan_map_sz = sizeof(RTL8812AENF_NGFF_country_chplan_map) / sizeof(struct country_chplan);
 #endif
 
-#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AEBT_HMC)
-static const struct country_chplan RTL8812AEBT_HMC_country_chplan_map[] = {
+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BE_HMC_M2) /* 2013 certify */
+static const struct country_chplan RTL8723BE_HMC_M2_country_chplan_exc_map[] = {
+	COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0x3FB), /* Canada */
+	COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0x3F1), /* Mexico */
+	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0x3FF), /* Taiwan */
+	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0x3FF), /* United States of America (USA) */
 };
-static const u16 RTL8812AEBT_HMC_country_chplan_map_sz = sizeof(RTL8812AEBT_HMC_country_chplan_map) / sizeof(struct country_chplan);
 #endif
 
-#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8188EE_HMC_M2)
-static const struct country_chplan RTL8188EE_HMC_M2_country_chplan_map[] = {
+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BS_NGFF1216) /* 2014 certify */
+static const struct country_chplan RTL8723BS_NGFF1216_country_chplan_exc_map[] = {
+	COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0x3FB), /* Canada */
+	COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0x3F1), /* Mexico */
+	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0x3FF), /* Taiwan */
+	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0x3FF), /* United States of America (USA) */
 };
-static const u16 RTL8188EE_HMC_M2_country_chplan_map_sz = sizeof(RTL8188EE_HMC_M2_country_chplan_map) / sizeof(struct country_chplan);
 #endif
 
-#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BE_HMC_M2)
-static const struct country_chplan RTL8723BE_HMC_M2_country_chplan_map[] = {
+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8192EEBT_HMC_M2) /* 2013 certify */
+static const struct country_chplan RTL8192EEBT_HMC_M2_country_chplan_exc_map[] = {
+	COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0x3FB), /* Canada */
+	COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0x3F1), /* Mexico */
+	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0x3FF), /* Taiwan */
+	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0x3FF), /* United States of America (USA) */
 };
-static const u16 RTL8723BE_HMC_M2_country_chplan_map_sz = sizeof(RTL8723BE_HMC_M2_country_chplan_map) / sizeof(struct country_chplan);
 #endif
 
-#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BS_NGFF1216)
-static const struct country_chplan RTL8723BS_NGFF1216_country_chplan_map[] = {
+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723DE_NGFF1630) /* 2016 certify */
+static const struct country_chplan RTL8723DE_NGFF1630_country_chplan_exc_map[] = {
+	COUNTRY_CHPLAN_ENT("CA", 0x2A, 1, 0x3FB), /* Canada */
+	COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0x3F1), /* Mexico */
 };
-static const u16 RTL8723BS_NGFF1216_country_chplan_map_sz = sizeof(RTL8723BS_NGFF1216_country_chplan_map) / sizeof(struct country_chplan);
 #endif
 
-#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8192EEBT_HMC_M2)
-static const struct country_chplan RTL8192EEBT_HMC_M2_country_chplan_map[] = {
+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8822BE) /* 2016 certify */
+static const struct country_chplan RTL8822BE_country_chplan_exc_map[] = {
+	COUNTRY_CHPLAN_ENT("CL", 0x30, 1, 0x3F1), /* Chile */
 };
-static const u16 RTL8192EEBT_HMC_M2_country_chplan_map_sz = sizeof(RTL8192EEBT_HMC_M2_country_chplan_map) / sizeof(struct country_chplan);
 #endif
 
 /**
@@ -639,29 +694,35 @@ static const struct country_chplan *rtw_def_module_get_chplan_from_country(const
 
 	/* TODO: runtime selection for multi driver */
 #if (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AE_HMC_M2)
-	hal_map = RTL8821AE_HMC_M2_country_chplan_map;
-	hal_map_sz = RTL8821AE_HMC_M2_country_chplan_map_sz;
+	hal_map = RTL8821AE_HMC_M2_country_chplan_exc_map;
+	hal_map_sz = sizeof(RTL8821AE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan);
 #elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AU)
-	hal_map = RTL8821AU_country_chplan_map;
-	hal_map_sz = RTL8821AU_country_chplan_map_sz;
+	hal_map = RTL8821AU_country_chplan_exc_map;
+	hal_map_sz = sizeof(RTL8821AU_country_chplan_exc_map) / sizeof(struct country_chplan);
 #elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AENF_NGFF)
-	hal_map = RTL8812AENF_NGFF_country_chplan_map;
-	hal_map_sz = RTL8812AENF_NGFF_country_chplan_map_sz;
+	hal_map = RTL8812AENF_NGFF_country_chplan_exc_map;
+	hal_map_sz = sizeof(RTL8812AENF_NGFF_country_chplan_exc_map) / sizeof(struct country_chplan);
 #elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AEBT_HMC)
-	hal_map = RTL8812AEBT_HMC_country_chplan_map;
-	hal_map_sz = RTL8812AEBT_HMC_country_chplan_map_sz;
+	hal_map = RTL8812AEBT_HMC_country_chplan_exc_map;
+	hal_map_sz = sizeof(RTL8812AEBT_HMC_country_chplan_exc_map) / sizeof(struct country_chplan);
 #elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8188EE_HMC_M2)
-	hal_map = RTL8188EE_HMC_M2_country_chplan_map;
-	hal_map_sz = RTL8188EE_HMC_M2_country_chplan_map_sz;
+	hal_map = RTL8188EE_HMC_M2_country_chplan_exc_map;
+	hal_map_sz = sizeof(RTL8188EE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan);
 #elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BE_HMC_M2)
-	hal_map = RTL8723BE_HMC_M2_country_chplan_map;
-	hal_map_sz = RTL8723BE_HMC_M2_country_chplan_map_sz;
+	hal_map = RTL8723BE_HMC_M2_country_chplan_exc_map;
+	hal_map_sz = sizeof(RTL8723BE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan);
 #elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BS_NGFF1216)
-	hal_map = RTL8723BS_NGFF1216_country_chplan_map;
-	hal_map_sz = RTL8723BS_NGFF1216_country_chplan_map_sz;
+	hal_map = RTL8723BS_NGFF1216_country_chplan_exc_map;
+	hal_map_sz = sizeof(RTL8723BS_NGFF1216_country_chplan_exc_map) / sizeof(struct country_chplan);
 #elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8192EEBT_HMC_M2)
-	hal_map = RTL8192EEBT_HMC_M2_country_chplan_map;
-	hal_map_sz = RTL8192EEBT_HMC_M2_country_chplan_map_sz;
+	hal_map = RTL8192EEBT_HMC_M2_country_chplan_exc_map;
+	hal_map_sz = sizeof(RTL8192EEBT_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan);
+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723DE_NGFF1630)
+	hal_map = RTL8723DE_NGFF1630_country_chplan_exc_map;
+	hal_map_sz = sizeof(RTL8723DE_NGFF1630_country_chplan_exc_map) / sizeof(struct country_chplan);
+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8822BE)
+	hal_map = RTL8822BE_country_chplan_exc_map;
+	hal_map_sz = sizeof(RTL8822BE_country_chplan_exc_map) / sizeof(struct country_chplan);
 #endif
 
 	if (hal_map == NULL || hal_map_sz == 0)
@@ -680,239 +741,238 @@ exit:
 #endif /* CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP or RTW_DEF_MODULE_REGULATORY_CERT */
 
 static const struct country_chplan country_chplan_map[] = {
-	COUNTRY_CHPLAN_ENT("AD", 0x26, 1, 0x00), /* Andorra */
-	COUNTRY_CHPLAN_ENT("AE", 0x26, 1, 0xFB), /* United Arab Emirates */
-	COUNTRY_CHPLAN_ENT("AF", 0x42, 1, 0x00), /* Afghanistan */
-	COUNTRY_CHPLAN_ENT("AG", 0x30, 1, 0x00), /* Antigua & Barbuda */
-	COUNTRY_CHPLAN_ENT("AI", 0x26, 1, 0x00), /* Anguilla(UK) */
-	COUNTRY_CHPLAN_ENT("AL", 0x26, 1, 0xF1), /* Albania */
-	COUNTRY_CHPLAN_ENT("AM", 0x26, 1, 0xB0), /* Armenia */
-	COUNTRY_CHPLAN_ENT("AO", 0x26, 1, 0xE0), /* Angola */
-	COUNTRY_CHPLAN_ENT("AQ", 0x26, 1, 0x00), /* Antarctica */
-	COUNTRY_CHPLAN_ENT("AR", 0x57, 1, 0xF3), /* Argentina */
-	COUNTRY_CHPLAN_ENT("AS", 0x34, 1, 0x00), /* American Samoa */
-	COUNTRY_CHPLAN_ENT("AT", 0x26, 1, 0xFB), /* Austria */
-	COUNTRY_CHPLAN_ENT("AU", 0x45, 1, 0xFB), /* Australia */
-	COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0xB0), /* Aruba */
-	COUNTRY_CHPLAN_ENT("AZ", 0x26, 1, 0xF1), /* Azerbaijan */
-	COUNTRY_CHPLAN_ENT("BA", 0x26, 1, 0xF1), /* Bosnia & Herzegovina */
-	COUNTRY_CHPLAN_ENT("BB", 0x34, 1, 0x50), /* Barbados */
-	COUNTRY_CHPLAN_ENT("BD", 0x26, 1, 0xF1), /* Bangladesh */
-	COUNTRY_CHPLAN_ENT("BE", 0x26, 1, 0xFB), /* Belgium */
-	COUNTRY_CHPLAN_ENT("BF", 0x26, 1, 0xB0), /* Burkina Faso */
-	COUNTRY_CHPLAN_ENT("BG", 0x26, 1, 0xF1), /* Bulgaria */
-	COUNTRY_CHPLAN_ENT("BH", 0x47, 1, 0xF1), /* Bahrain */
-	COUNTRY_CHPLAN_ENT("BI", 0x26, 1, 0xB0), /* Burundi */
-	COUNTRY_CHPLAN_ENT("BJ", 0x26, 1, 0xB0), /* Benin */
-	COUNTRY_CHPLAN_ENT("BN", 0x47, 1, 0x10), /* Brunei */
-	COUNTRY_CHPLAN_ENT("BO", 0x30, 1, 0xF1), /* Bolivia */
-	COUNTRY_CHPLAN_ENT("BR", 0x34, 1, 0xF1), /* Brazil */
-	COUNTRY_CHPLAN_ENT("BS", 0x34, 1, 0x20), /* Bahamas */
-	COUNTRY_CHPLAN_ENT("BW", 0x26, 1, 0xF1), /* Botswana */
-	COUNTRY_CHPLAN_ENT("BY", 0x26, 1, 0xF1), /* Belarus */
-	COUNTRY_CHPLAN_ENT("BZ", 0x34, 1, 0x00), /* Belize */
-	COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0xFB), /* Canada */
-	COUNTRY_CHPLAN_ENT("CC", 0x26, 1, 0x00), /* Cocos (Keeling) Islands (Australia) */
-	COUNTRY_CHPLAN_ENT("CD", 0x26, 1, 0xB0), /* Congo, Republic of the */
-	COUNTRY_CHPLAN_ENT("CF", 0x26, 1, 0xB0), /* Central African Republic */
-	COUNTRY_CHPLAN_ENT("CG", 0x26, 1, 0xB0), /* Congo, Democratic Republic of the. Zaire */
-	COUNTRY_CHPLAN_ENT("CH", 0x26, 1, 0xFB), /* Switzerland */
-	COUNTRY_CHPLAN_ENT("CI", 0x26, 1, 0xF1), /* Cote d'Ivoire */
-	COUNTRY_CHPLAN_ENT("CK", 0x26, 1, 0x00), /* Cook Islands */
-	COUNTRY_CHPLAN_ENT("CL", 0x30, 1, 0xF1), /* Chile */
-	COUNTRY_CHPLAN_ENT("CM", 0x26, 1, 0xB0), /* Cameroon */
-	COUNTRY_CHPLAN_ENT("CN", 0x48, 1, 0xFB), /* China */
-	COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0xF1), /* Colombia */
-	COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0xF1), /* Costa Rica */
-	COUNTRY_CHPLAN_ENT("CV", 0x26, 1, 0xB0), /* Cape Verde */
-	COUNTRY_CHPLAN_ENT("CX", 0x45, 1, 0x00), /* Christmas Island (Australia) */
-	COUNTRY_CHPLAN_ENT("CY", 0x26, 1, 0xFB), /* Cyprus */
-	COUNTRY_CHPLAN_ENT("CZ", 0x26, 1, 0xFB), /* Czech Republic */
-	COUNTRY_CHPLAN_ENT("DE", 0x26, 1, 0xFB), /* Germany */
-	COUNTRY_CHPLAN_ENT("DJ", 0x26, 1, 0x80), /* Djibouti */
-	COUNTRY_CHPLAN_ENT("DK", 0x26, 1, 0xFB), /* Denmark */
-	COUNTRY_CHPLAN_ENT("DM", 0x34, 1, 0x00), /* Dominica */
-	COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0xF1), /* Dominican Republic */
-	COUNTRY_CHPLAN_ENT("DZ", 0x26, 1, 0xF1), /* Algeria */
-	COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0xF1), /* Ecuador */
-	COUNTRY_CHPLAN_ENT("EE", 0x26, 1, 0xFB), /* Estonia */
-	COUNTRY_CHPLAN_ENT("EG", 0x47, 0, 0xF1), /* Egypt */
-	COUNTRY_CHPLAN_ENT("EH", 0x47, 1, 0x80), /* Western Sahara */
-	COUNTRY_CHPLAN_ENT("ER", 0x26, 1, 0x00), /* Eritrea */
-	COUNTRY_CHPLAN_ENT("ES", 0x26, 1, 0xFB), /* Spain, Canary Islands, Ceuta, Melilla */
-	COUNTRY_CHPLAN_ENT("ET", 0x26, 1, 0xB0), /* Ethiopia */
-	COUNTRY_CHPLAN_ENT("FI", 0x26, 1, 0xFB), /* Finland */
-	COUNTRY_CHPLAN_ENT("FJ", 0x34, 1, 0x00), /* Fiji */
-	COUNTRY_CHPLAN_ENT("FK", 0x26, 1, 0x00), /* Falkland Islands (Islas Malvinas) (UK) */
-	COUNTRY_CHPLAN_ENT("FM", 0x34, 1, 0x00), /* Micronesia, Federated States of (USA) */
-	COUNTRY_CHPLAN_ENT("FO", 0x26, 1, 0x00), /* Faroe Islands (Denmark) */
-	COUNTRY_CHPLAN_ENT("FR", 0x26, 1, 0xFB), /* France */
-	COUNTRY_CHPLAN_ENT("GA", 0x26, 1, 0xB0), /* Gabon */
-	COUNTRY_CHPLAN_ENT("GB", 0x26, 1, 0xFB), /* Great Britain (United Kingdom; England) */
-	COUNTRY_CHPLAN_ENT("GD", 0x34, 1, 0xB0), /* Grenada */
-	COUNTRY_CHPLAN_ENT("GE", 0x26, 1, 0x00), /* Georgia */
-	COUNTRY_CHPLAN_ENT("GF", 0x26, 1, 0x80), /* French Guiana */
-	COUNTRY_CHPLAN_ENT("GG", 0x26, 1, 0x00), /* Guernsey (UK) */
-	COUNTRY_CHPLAN_ENT("GH", 0x26, 1, 0xF1), /* Ghana */
-	COUNTRY_CHPLAN_ENT("GI", 0x26, 1, 0x00), /* Gibraltar (UK) */
-	COUNTRY_CHPLAN_ENT("GL", 0x26, 1, 0x00), /* Greenland (Denmark) */
-	COUNTRY_CHPLAN_ENT("GM", 0x26, 1, 0xB0), /* Gambia */
-	COUNTRY_CHPLAN_ENT("GN", 0x26, 1, 0x10), /* Guinea */
-	COUNTRY_CHPLAN_ENT("GP", 0x26, 1, 0x00), /* Guadeloupe (France) */
-	COUNTRY_CHPLAN_ENT("GQ", 0x26, 1, 0xB0), /* Equatorial Guinea */
-	COUNTRY_CHPLAN_ENT("GR", 0x26, 1, 0xFB), /* Greece */
-	COUNTRY_CHPLAN_ENT("GS", 0x26, 1, 0x00), /* South Georgia and the Sandwich Islands (UK) */
-	COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0xF1), /* Guatemala */
-	COUNTRY_CHPLAN_ENT("GU", 0x34, 1, 0x00), /* Guam (USA) */
-	COUNTRY_CHPLAN_ENT("GW", 0x26, 1, 0xB0), /* Guinea-Bissau */
-	COUNTRY_CHPLAN_ENT("GY", 0x44, 1, 0x00), /* Guyana */
-	COUNTRY_CHPLAN_ENT("HK", 0x26, 1, 0xFB), /* Hong Kong */
-	COUNTRY_CHPLAN_ENT("HM", 0x45, 1, 0x00), /* Heard and McDonald Islands (Australia) */
-	COUNTRY_CHPLAN_ENT("HN", 0x32, 1, 0xF1), /* Honduras */
-	COUNTRY_CHPLAN_ENT("HR", 0x26, 1, 0xF9), /* Croatia */
-	COUNTRY_CHPLAN_ENT("HT", 0x34, 1, 0x50), /* Haiti */
-	COUNTRY_CHPLAN_ENT("HU", 0x26, 1, 0xFB), /* Hungary */
-	COUNTRY_CHPLAN_ENT("ID", 0x54, 0, 0xF3), /* Indonesia */
-	COUNTRY_CHPLAN_ENT("IE", 0x26, 1, 0xFB), /* Ireland */
-	COUNTRY_CHPLAN_ENT("IL", 0x47, 1, 0xF1), /* Israel */
-	COUNTRY_CHPLAN_ENT("IM", 0x26, 1, 0x00), /* Isle of Man (UK) */
-	COUNTRY_CHPLAN_ENT("IN", 0x47, 1, 0xF1), /* India */
-	COUNTRY_CHPLAN_ENT("IQ", 0x26, 1, 0x00), /* Iraq */
-	COUNTRY_CHPLAN_ENT("IR", 0x26, 0, 0x00), /* Iran */
-	COUNTRY_CHPLAN_ENT("IS", 0x26, 1, 0xFB), /* Iceland */
-	COUNTRY_CHPLAN_ENT("IT", 0x26, 1, 0xFB), /* Italy */
-	COUNTRY_CHPLAN_ENT("JE", 0x26, 1, 0x00), /* Jersey (UK) */
-	COUNTRY_CHPLAN_ENT("JM", 0x51, 1, 0xF1), /* Jamaica */
-	COUNTRY_CHPLAN_ENT("JO", 0x49, 1, 0xFB), /* Jordan */
-	COUNTRY_CHPLAN_ENT("JP", 0x27, 1, 0xFF), /* Japan- Telec */
-	COUNTRY_CHPLAN_ENT("KE", 0x47, 1, 0xF9), /* Kenya */
-	COUNTRY_CHPLAN_ENT("KG", 0x26, 1, 0xF1), /* Kyrgyzstan */
-	COUNTRY_CHPLAN_ENT("KH", 0x26, 1, 0xF1), /* Cambodia */
-	COUNTRY_CHPLAN_ENT("KI", 0x26, 1, 0x00), /* Kiribati */
-	COUNTRY_CHPLAN_ENT("KN", 0x34, 1, 0x00), /* Saint Kitts and Nevis */
-	COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0xFB), /* South Korea */
-	COUNTRY_CHPLAN_ENT("KW", 0x47, 1, 0xFB), /* Kuwait */
-	COUNTRY_CHPLAN_ENT("KY", 0x34, 1, 0x00), /* Cayman Islands (UK) */
-	COUNTRY_CHPLAN_ENT("KZ", 0x26, 1, 0x00), /* Kazakhstan */
-	COUNTRY_CHPLAN_ENT("LA", 0x26, 1, 0x00), /* Laos */
-	COUNTRY_CHPLAN_ENT("LB", 0x26, 1, 0xF1), /* Lebanon */
-	COUNTRY_CHPLAN_ENT("LC", 0x34, 1, 0x00), /* Saint Lucia */
-	COUNTRY_CHPLAN_ENT("LI", 0x26, 1, 0xFB), /* Liechtenstein */
-	COUNTRY_CHPLAN_ENT("LK", 0x26, 1, 0xF1), /* Sri Lanka */
-	COUNTRY_CHPLAN_ENT("LR", 0x26, 1, 0xB0), /* Liberia */
-	COUNTRY_CHPLAN_ENT("LS", 0x26, 1, 0xF1), /* Lesotho */
-	COUNTRY_CHPLAN_ENT("LT", 0x26, 1, 0xFB), /* Lithuania */
-	COUNTRY_CHPLAN_ENT("LU", 0x26, 1, 0xFB), /* Luxembourg */
-	COUNTRY_CHPLAN_ENT("LV", 0x26, 1, 0xFB), /* Latvia */
-	COUNTRY_CHPLAN_ENT("LY", 0x26, 1, 0x00), /* Libya */
-	COUNTRY_CHPLAN_ENT("MA", 0x47, 1, 0xF1), /* Morocco */
-	COUNTRY_CHPLAN_ENT("MC", 0x26, 1, 0xFB), /* Monaco */
-	COUNTRY_CHPLAN_ENT("MD", 0x26, 1, 0xF1), /* Moldova */
-	COUNTRY_CHPLAN_ENT("ME", 0x26, 1, 0xF1), /* Montenegro */
-	COUNTRY_CHPLAN_ENT("MF", 0x34, 1, 0x00), /* Saint Martin */
-	COUNTRY_CHPLAN_ENT("MG", 0x26, 1, 0x20), /* Madagascar */
-	COUNTRY_CHPLAN_ENT("MH", 0x34, 1, 0x00), /* Marshall Islands (USA) */
-	COUNTRY_CHPLAN_ENT("MK", 0x26, 1, 0xF1), /* Republic of Macedonia (FYROM) */
-	COUNTRY_CHPLAN_ENT("ML", 0x26, 1, 0xB0), /* Mali */
-	COUNTRY_CHPLAN_ENT("MM", 0x26, 1, 0x00), /* Burma (Myanmar) */
-	COUNTRY_CHPLAN_ENT("MN", 0x26, 1, 0x00), /* Mongolia */
-	COUNTRY_CHPLAN_ENT("MO", 0x26, 1, 0x00), /* Macau */
-	COUNTRY_CHPLAN_ENT("MP", 0x34, 1, 0x00), /* Northern Mariana Islands (USA) */
-	COUNTRY_CHPLAN_ENT("MQ", 0x26, 1, 0x40), /* Martinique (France) */
-	COUNTRY_CHPLAN_ENT("MR", 0x26, 1, 0xA0), /* Mauritania */
-	COUNTRY_CHPLAN_ENT("MS", 0x26, 1, 0x00), /* Montserrat (UK) */
-	COUNTRY_CHPLAN_ENT("MT", 0x26, 1, 0xFB), /* Malta */
-	COUNTRY_CHPLAN_ENT("MU", 0x26, 1, 0xB0), /* Mauritius */
-	COUNTRY_CHPLAN_ENT("MV", 0x26, 1, 0x00), /* Maldives */
-	COUNTRY_CHPLAN_ENT("MW", 0x26, 1, 0xB0), /* Malawi */
-	COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0xF1), /* Mexico */
-	COUNTRY_CHPLAN_ENT("MY", 0x47, 1, 0xF1), /* Malaysia */
-	COUNTRY_CHPLAN_ENT("MZ", 0x26, 1, 0xF1), /* Mozambique */
-	COUNTRY_CHPLAN_ENT("NA", 0x26, 0, 0x00), /* Namibia */
-	COUNTRY_CHPLAN_ENT("NC", 0x26, 1, 0x00), /* New Caledonia */
-	COUNTRY_CHPLAN_ENT("NE", 0x26, 1, 0xB0), /* Niger */
-	COUNTRY_CHPLAN_ENT("NF", 0x45, 1, 0x00), /* Norfolk Island (Australia) */
-	COUNTRY_CHPLAN_ENT("NG", 0x50, 1, 0xF9), /* Nigeria */
-	COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0xF1), /* Nicaragua */
-	COUNTRY_CHPLAN_ENT("NL", 0x26, 1, 0xFB), /* Netherlands */
-	COUNTRY_CHPLAN_ENT("NO", 0x26, 1, 0xFB), /* Norway */
-	COUNTRY_CHPLAN_ENT("NP", 0x47, 1, 0xF0), /* Nepal */
-	COUNTRY_CHPLAN_ENT("NR", 0x26, 1, 0x00), /* Nauru */
-	COUNTRY_CHPLAN_ENT("NU", 0x45, 1, 0x00), /* Niue */
-	COUNTRY_CHPLAN_ENT("NZ", 0x45, 1, 0xFB), /* New Zealand */
-	COUNTRY_CHPLAN_ENT("OM", 0x26, 1, 0xF9), /* Oman */
-	COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0xF1), /* Panama */
-	COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0xF1), /* Peru */
-	COUNTRY_CHPLAN_ENT("PF", 0x26, 1, 0x00), /* French Polynesia (France) */
-	COUNTRY_CHPLAN_ENT("PG", 0x26, 1, 0xF1), /* Papua New Guinea */
-	COUNTRY_CHPLAN_ENT("PH", 0x26, 1, 0xF1), /* Philippines */
-	COUNTRY_CHPLAN_ENT("PK", 0x51, 1, 0xF1), /* Pakistan */
-	COUNTRY_CHPLAN_ENT("PL", 0x26, 1, 0xFB), /* Poland */
-	COUNTRY_CHPLAN_ENT("PM", 0x26, 1, 0x00), /* Saint Pierre and Miquelon (France) */
-	COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0xF1), /* Puerto Rico */
-	COUNTRY_CHPLAN_ENT("PT", 0x26, 1, 0xFB), /* Portugal */
-	COUNTRY_CHPLAN_ENT("PW", 0x34, 1, 0x00), /* Palau */
-	COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0xF1), /* Paraguay */
-	COUNTRY_CHPLAN_ENT("QA", 0x51, 1, 0xF9), /* Qatar */
-	COUNTRY_CHPLAN_ENT("RE", 0x26, 1, 0x00), /* Reunion (France) */
-	COUNTRY_CHPLAN_ENT("RO", 0x26, 1, 0xF1), /* Romania */
-	COUNTRY_CHPLAN_ENT("RS", 0x26, 1, 0xF1), /* Serbia, Kosovo */
-	COUNTRY_CHPLAN_ENT("RU", 0x59, 1, 0xFB), /* Russia(fac/gost), Kaliningrad */
-	COUNTRY_CHPLAN_ENT("RW", 0x26, 1, 0xB0), /* Rwanda */
-	COUNTRY_CHPLAN_ENT("SA", 0x26, 1, 0xFB), /* Saudi Arabia */
-	COUNTRY_CHPLAN_ENT("SB", 0x26, 1, 0x00), /* Solomon Islands */
-	COUNTRY_CHPLAN_ENT("SC", 0x34, 1, 0x90), /* Seychelles */
-	COUNTRY_CHPLAN_ENT("SE", 0x26, 1, 0xFB), /* Sweden */
-	COUNTRY_CHPLAN_ENT("SG", 0x47, 1, 0xFB), /* Singapore */
-	COUNTRY_CHPLAN_ENT("SH", 0x26, 1, 0x00), /* Saint Helena (UK) */
-	COUNTRY_CHPLAN_ENT("SI", 0x26, 1, 0xFB), /* Slovenia */
-	COUNTRY_CHPLAN_ENT("SJ", 0x26, 1, 0x00), /* Svalbard (Norway) */
-	COUNTRY_CHPLAN_ENT("SK", 0x26, 1, 0xFB), /* Slovakia */
-	COUNTRY_CHPLAN_ENT("SL", 0x26, 1, 0xB0), /* Sierra Leone */
-	COUNTRY_CHPLAN_ENT("SM", 0x26, 1, 0x00), /* San Marino */
-	COUNTRY_CHPLAN_ENT("SN", 0x26, 1, 0xF1), /* Senegal */
-	COUNTRY_CHPLAN_ENT("SO", 0x26, 1, 0x00), /* Somalia */
-	COUNTRY_CHPLAN_ENT("SR", 0x34, 1, 0x00), /* Suriname */
-	COUNTRY_CHPLAN_ENT("ST", 0x34, 1, 0x80), /* Sao Tome and Principe */
-	COUNTRY_CHPLAN_ENT("SV", 0x30, 1, 0xF1), /* El Salvador */
-	COUNTRY_CHPLAN_ENT("SX", 0x34, 1, 0x00), /* Sint Marteen */
-	COUNTRY_CHPLAN_ENT("SZ", 0x26, 1, 0x20), /* Swaziland */
-	COUNTRY_CHPLAN_ENT("TC", 0x26, 1, 0x00), /* Turks and Caicos Islands (UK) */
-	COUNTRY_CHPLAN_ENT("TD", 0x26, 1, 0xB0), /* Chad */
-	COUNTRY_CHPLAN_ENT("TF", 0x26, 1, 0x80), /* French Southern and Antarctic Lands (FR Southern Territories) */
-	COUNTRY_CHPLAN_ENT("TG", 0x26, 1, 0xB0), /* Togo */
-	COUNTRY_CHPLAN_ENT("TH", 0x26, 1, 0xF1), /* Thailand */
-	COUNTRY_CHPLAN_ENT("TJ", 0x26, 1, 0x40), /* Tajikistan */
-	COUNTRY_CHPLAN_ENT("TK", 0x45, 1, 0x00), /* Tokelau */
-	COUNTRY_CHPLAN_ENT("TM", 0x26, 1, 0x00), /* Turkmenistan */
-	COUNTRY_CHPLAN_ENT("TN", 0x47, 1, 0xF1), /* Tunisia */
-	COUNTRY_CHPLAN_ENT("TO", 0x26, 1, 0x00), /* Tonga */
-	COUNTRY_CHPLAN_ENT("TR", 0x26, 1, 0xF1), /* Turkey, Northern Cyprus */
-	COUNTRY_CHPLAN_ENT("TT", 0x42, 1, 0xF1), /* Trinidad & Tobago */
-	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0xFF), /* Taiwan */
-	COUNTRY_CHPLAN_ENT("TZ", 0x26, 1, 0xF0), /* Tanzania */
-	COUNTRY_CHPLAN_ENT("UA", 0x26, 1, 0xFB), /* Ukraine */
-	COUNTRY_CHPLAN_ENT("UG", 0x26, 1, 0xF1), /* Uganda */
-	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0xFF), /* United States of America (USA) */
-	COUNTRY_CHPLAN_ENT("UY", 0x34, 1, 0xF1), /* Uruguay */
-	COUNTRY_CHPLAN_ENT("UZ", 0x47, 1, 0xF0), /* Uzbekistan */
-	COUNTRY_CHPLAN_ENT("VA", 0x26, 1, 0x00), /* Holy See (Vatican City) */
-	COUNTRY_CHPLAN_ENT("VC", 0x34, 1, 0x10), /* Saint Vincent and the Grenadines */
-	COUNTRY_CHPLAN_ENT("VE", 0x30, 1, 0xF1), /* Venezuela */
-	COUNTRY_CHPLAN_ENT("VI", 0x34, 1, 0x00), /* United States Virgin Islands (USA) */
-	COUNTRY_CHPLAN_ENT("VN", 0x26, 1, 0xF1), /* Vietnam */
-	COUNTRY_CHPLAN_ENT("VU", 0x26, 1, 0x00), /* Vanuatu */
-	COUNTRY_CHPLAN_ENT("WF", 0x26, 1, 0x00), /* Wallis and Futuna (France) */
-	COUNTRY_CHPLAN_ENT("WS", 0x34, 1, 0x00), /* Samoa */
-	COUNTRY_CHPLAN_ENT("YE", 0x26, 1, 0x40), /* Yemen */
-	COUNTRY_CHPLAN_ENT("YT", 0x26, 1, 0x80), /* Mayotte (France) */
-	COUNTRY_CHPLAN_ENT("ZA", 0x26, 1, 0xF1), /* South Africa */
-	COUNTRY_CHPLAN_ENT("ZM", 0x26, 1, 0xB0), /* Zambia */
-	COUNTRY_CHPLAN_ENT("ZW", 0x26, 1, 0xF1), /* Zimbabwe */
+	COUNTRY_CHPLAN_ENT("AD", 0x26, 1, 0x000), /* Andorra */
+	COUNTRY_CHPLAN_ENT("AE", 0x26, 1, 0x3FB), /* United Arab Emirates */
+	COUNTRY_CHPLAN_ENT("AF", 0x42, 1, 0x000), /* Afghanistan */
+	COUNTRY_CHPLAN_ENT("AG", 0x26, 1, 0x000), /* Antigua & Barbuda */
+	COUNTRY_CHPLAN_ENT("AI", 0x26, 1, 0x000), /* Anguilla(UK) */
+	COUNTRY_CHPLAN_ENT("AL", 0x26, 1, 0x3F1), /* Albania */
+	COUNTRY_CHPLAN_ENT("AM", 0x26, 1, 0x2B0), /* Armenia */
+	COUNTRY_CHPLAN_ENT("AN", 0x26, 1, 0x3F1), /* Netherlands Antilles */
+	COUNTRY_CHPLAN_ENT("AO", 0x47, 1, 0x2E0), /* Angola */
+	COUNTRY_CHPLAN_ENT("AQ", 0x26, 1, 0x000), /* Antarctica */
+	COUNTRY_CHPLAN_ENT("AR", 0x57, 1, 0x3F3), /* Argentina */
+	COUNTRY_CHPLAN_ENT("AS", 0x34, 1, 0x000), /* American Samoa */
+	COUNTRY_CHPLAN_ENT("AT", 0x26, 1, 0x3FB), /* Austria */
+	COUNTRY_CHPLAN_ENT("AU", 0x45, 1, 0x3FB), /* Australia */
+	COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0x0B0), /* Aruba */
+	COUNTRY_CHPLAN_ENT("AZ", 0x26, 1, 0x3F1), /* Azerbaijan */
+	COUNTRY_CHPLAN_ENT("BA", 0x26, 1, 0x3F1), /* Bosnia & Herzegovina */
+	COUNTRY_CHPLAN_ENT("BB", 0x34, 1, 0x250), /* Barbados */
+	COUNTRY_CHPLAN_ENT("BD", 0x26, 1, 0x3F1), /* Bangladesh */
+	COUNTRY_CHPLAN_ENT("BE", 0x26, 1, 0x3FB), /* Belgium */
+	COUNTRY_CHPLAN_ENT("BF", 0x26, 1, 0x2B0), /* Burkina Faso */
+	COUNTRY_CHPLAN_ENT("BG", 0x26, 1, 0x3F1), /* Bulgaria */
+	COUNTRY_CHPLAN_ENT("BH", 0x47, 1, 0x3F1), /* Bahrain */
+	COUNTRY_CHPLAN_ENT("BI", 0x26, 1, 0x2B0), /* Burundi */
+	COUNTRY_CHPLAN_ENT("BJ", 0x26, 1, 0x2B0), /* Benin */
+	COUNTRY_CHPLAN_ENT("BN", 0x47, 1, 0x210), /* Brunei */
+	COUNTRY_CHPLAN_ENT("BO", 0x73, 1, 0x3F1), /* Bolivia */
+	COUNTRY_CHPLAN_ENT("BR", 0x34, 1, 0x3F1), /* Brazil */
+	COUNTRY_CHPLAN_ENT("BS", 0x34, 1, 0x220), /* Bahamas */
+	COUNTRY_CHPLAN_ENT("BW", 0x26, 1, 0x2F1), /* Botswana */
+	COUNTRY_CHPLAN_ENT("BY", 0x26, 1, 0x3F1), /* Belarus */
+	COUNTRY_CHPLAN_ENT("BZ", 0x34, 1, 0x000), /* Belize */
+	COUNTRY_CHPLAN_ENT("CA", 0x2B, 1, 0x3FB), /* Canada */
+	COUNTRY_CHPLAN_ENT("CC", 0x26, 1, 0x000), /* Cocos (Keeling) Islands (Australia) */
+	COUNTRY_CHPLAN_ENT("CD", 0x26, 1, 0x2B0), /* Congo, Republic of the */
+	COUNTRY_CHPLAN_ENT("CF", 0x26, 1, 0x2B0), /* Central African Republic */
+	COUNTRY_CHPLAN_ENT("CG", 0x26, 1, 0x2B0), /* Congo, Democratic Republic of the. Zaire */
+	COUNTRY_CHPLAN_ENT("CH", 0x26, 1, 0x3FB), /* Switzerland */
+	COUNTRY_CHPLAN_ENT("CI", 0x26, 1, 0x3F1), /* Cote d'Ivoire */
+	COUNTRY_CHPLAN_ENT("CK", 0x26, 1, 0x000), /* Cook Islands */
+	COUNTRY_CHPLAN_ENT("CL", 0x73, 1, 0x3F1), /* Chile */
+	COUNTRY_CHPLAN_ENT("CM", 0x26, 1, 0x2B0), /* Cameroon */
+	COUNTRY_CHPLAN_ENT("CN", 0x48, 1, 0x3FB), /* China */
+	COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0x3F1), /* Colombia */
+	COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0x3F1), /* Costa Rica */
+	COUNTRY_CHPLAN_ENT("CV", 0x26, 1, 0x2B0), /* Cape Verde */
+	COUNTRY_CHPLAN_ENT("CX", 0x45, 1, 0x000), /* Christmas Island (Australia) */
+	COUNTRY_CHPLAN_ENT("CY", 0x26, 1, 0x3FB), /* Cyprus */
+	COUNTRY_CHPLAN_ENT("CZ", 0x26, 1, 0x3FB), /* Czech Republic */
+	COUNTRY_CHPLAN_ENT("DE", 0x26, 1, 0x3FB), /* Germany */
+	COUNTRY_CHPLAN_ENT("DJ", 0x26, 1, 0x280), /* Djibouti */
+	COUNTRY_CHPLAN_ENT("DK", 0x26, 1, 0x3FB), /* Denmark */
+	COUNTRY_CHPLAN_ENT("DM", 0x34, 1, 0x000), /* Dominica */
+	COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0x3F1), /* Dominican Republic */
+	COUNTRY_CHPLAN_ENT("DZ", 0x26, 1, 0x3F1), /* Algeria */
+	COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0x3F1), /* Ecuador */
+	COUNTRY_CHPLAN_ENT("EE", 0x26, 1, 0x3FB), /* Estonia */
+	COUNTRY_CHPLAN_ENT("EG", 0x47, 0, 0x3F1), /* Egypt */
+	COUNTRY_CHPLAN_ENT("EH", 0x47, 1, 0x280), /* Western Sahara */
+	COUNTRY_CHPLAN_ENT("ER", 0x26, 1, 0x000), /* Eritrea */
+	COUNTRY_CHPLAN_ENT("ES", 0x26, 1, 0x3FB), /* Spain, Canary Islands, Ceuta, Melilla */
+	COUNTRY_CHPLAN_ENT("ET", 0x26, 1, 0x0B0), /* Ethiopia */
+	COUNTRY_CHPLAN_ENT("FI", 0x26, 1, 0x3FB), /* Finland */
+	COUNTRY_CHPLAN_ENT("FJ", 0x34, 1, 0x200), /* Fiji */
+	COUNTRY_CHPLAN_ENT("FK", 0x26, 1, 0x000), /* Falkland Islands (Islas Malvinas) (UK) */
+	COUNTRY_CHPLAN_ENT("FM", 0x34, 1, 0x000), /* Micronesia, Federated States of (USA) */
+	COUNTRY_CHPLAN_ENT("FO", 0x26, 1, 0x000), /* Faroe Islands (Denmark) */
+	COUNTRY_CHPLAN_ENT("FR", 0x26, 1, 0x3FB), /* France */
+	COUNTRY_CHPLAN_ENT("GA", 0x26, 1, 0x2B0), /* Gabon */
+	COUNTRY_CHPLAN_ENT("GB", 0x26, 1, 0x3FB), /* Great Britain (United Kingdom; England) */
+	COUNTRY_CHPLAN_ENT("GD", 0x34, 1, 0x0B0), /* Grenada */
+	COUNTRY_CHPLAN_ENT("GE", 0x26, 1, 0x200), /* Georgia */
+	COUNTRY_CHPLAN_ENT("GF", 0x26, 1, 0x080), /* French Guiana */
+	COUNTRY_CHPLAN_ENT("GG", 0x26, 1, 0x000), /* Guernsey (UK) */
+	COUNTRY_CHPLAN_ENT("GH", 0x26, 1, 0x3F1), /* Ghana */
+	COUNTRY_CHPLAN_ENT("GI", 0x26, 1, 0x200), /* Gibraltar (UK) */
+	COUNTRY_CHPLAN_ENT("GL", 0x26, 1, 0x200), /* Greenland (Denmark) */
+	COUNTRY_CHPLAN_ENT("GM", 0x26, 1, 0x2B0), /* Gambia */
+	COUNTRY_CHPLAN_ENT("GN", 0x26, 1, 0x210), /* Guinea */
+	COUNTRY_CHPLAN_ENT("GP", 0x26, 1, 0x200), /* Guadeloupe (France) */
+	COUNTRY_CHPLAN_ENT("GQ", 0x26, 1, 0x2B0), /* Equatorial Guinea */
+	COUNTRY_CHPLAN_ENT("GR", 0x26, 1, 0x3FB), /* Greece */
+	COUNTRY_CHPLAN_ENT("GS", 0x26, 1, 0x000), /* South Georgia and the Sandwich Islands (UK) */
+	COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0x3F1), /* Guatemala */
+	COUNTRY_CHPLAN_ENT("GU", 0x34, 1, 0x200), /* Guam (USA) */
+	COUNTRY_CHPLAN_ENT("GW", 0x26, 1, 0x2B0), /* Guinea-Bissau */
+	COUNTRY_CHPLAN_ENT("GY", 0x44, 1, 0x000), /* Guyana */
+	COUNTRY_CHPLAN_ENT("HK", 0x26, 1, 0x3FB), /* Hong Kong */
+	COUNTRY_CHPLAN_ENT("HM", 0x45, 1, 0x000), /* Heard and McDonald Islands (Australia) */
+	COUNTRY_CHPLAN_ENT("HN", 0x32, 1, 0x3F1), /* Honduras */
+	COUNTRY_CHPLAN_ENT("HR", 0x26, 1, 0x3F9), /* Croatia */
+	COUNTRY_CHPLAN_ENT("HT", 0x34, 1, 0x250), /* Haiti */
+	COUNTRY_CHPLAN_ENT("HU", 0x26, 1, 0x3FB), /* Hungary */
+	COUNTRY_CHPLAN_ENT("ID", 0x54, 0, 0x3F3), /* Indonesia */
+	COUNTRY_CHPLAN_ENT("IE", 0x26, 1, 0x3FB), /* Ireland */
+	COUNTRY_CHPLAN_ENT("IL", 0x47, 1, 0x3F1), /* Israel */
+	COUNTRY_CHPLAN_ENT("IM", 0x26, 1, 0x000), /* Isle of Man (UK) */
+	COUNTRY_CHPLAN_ENT("IN", 0x48, 1, 0x3F1), /* India */
+	COUNTRY_CHPLAN_ENT("IQ", 0x26, 1, 0x000), /* Iraq */
+	COUNTRY_CHPLAN_ENT("IR", 0x26, 0, 0x000), /* Iran */
+	COUNTRY_CHPLAN_ENT("IS", 0x26, 1, 0x3FB), /* Iceland */
+	COUNTRY_CHPLAN_ENT("IT", 0x26, 1, 0x3FB), /* Italy */
+	COUNTRY_CHPLAN_ENT("JE", 0x26, 1, 0x000), /* Jersey (UK) */
+	COUNTRY_CHPLAN_ENT("JM", 0x51, 1, 0x3F1), /* Jamaica */
+	COUNTRY_CHPLAN_ENT("JO", 0x49, 1, 0x3FB), /* Jordan */
+	COUNTRY_CHPLAN_ENT("JP", 0x27, 1, 0x3FF), /* Japan- Telec */
+	COUNTRY_CHPLAN_ENT("KE", 0x47, 1, 0x3F9), /* Kenya */
+	COUNTRY_CHPLAN_ENT("KG", 0x26, 1, 0x3F1), /* Kyrgyzstan */
+	COUNTRY_CHPLAN_ENT("KH", 0x26, 1, 0x3F1), /* Cambodia */
+	COUNTRY_CHPLAN_ENT("KI", 0x26, 1, 0x000), /* Kiribati */
+	COUNTRY_CHPLAN_ENT("KN", 0x34, 1, 0x000), /* Saint Kitts and Nevis */
+	COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0x3FB), /* South Korea */
+	COUNTRY_CHPLAN_ENT("KW", 0x47, 1, 0x3FB), /* Kuwait */
+	COUNTRY_CHPLAN_ENT("KY", 0x34, 1, 0x000), /* Cayman Islands (UK) */
+	COUNTRY_CHPLAN_ENT("KZ", 0x26, 1, 0x300), /* Kazakhstan */
+	COUNTRY_CHPLAN_ENT("LA", 0x26, 1, 0x000), /* Laos */
+	COUNTRY_CHPLAN_ENT("LB", 0x26, 1, 0x3F1), /* Lebanon */
+	COUNTRY_CHPLAN_ENT("LC", 0x34, 1, 0x000), /* Saint Lucia */
+	COUNTRY_CHPLAN_ENT("LI", 0x26, 1, 0x3FB), /* Liechtenstein */
+	COUNTRY_CHPLAN_ENT("LK", 0x26, 1, 0x3F1), /* Sri Lanka */
+	COUNTRY_CHPLAN_ENT("LR", 0x26, 1, 0x2B0), /* Liberia */
+	COUNTRY_CHPLAN_ENT("LS", 0x26, 1, 0x3F1), /* Lesotho */
+	COUNTRY_CHPLAN_ENT("LT", 0x26, 1, 0x3FB), /* Lithuania */
+	COUNTRY_CHPLAN_ENT("LU", 0x26, 1, 0x3FB), /* Luxembourg */
+	COUNTRY_CHPLAN_ENT("LV", 0x26, 1, 0x3FB), /* Latvia */
+	COUNTRY_CHPLAN_ENT("LY", 0x26, 1, 0x000), /* Libya */
+	COUNTRY_CHPLAN_ENT("MA", 0x47, 1, 0x3F1), /* Morocco */
+	COUNTRY_CHPLAN_ENT("MC", 0x26, 1, 0x3FB), /* Monaco */
+	COUNTRY_CHPLAN_ENT("MD", 0x26, 1, 0x3F1), /* Moldova */
+	COUNTRY_CHPLAN_ENT("ME", 0x26, 1, 0x3F1), /* Montenegro */
+	COUNTRY_CHPLAN_ENT("MF", 0x34, 1, 0x000), /* Saint Martin */
+	COUNTRY_CHPLAN_ENT("MG", 0x26, 1, 0x220), /* Madagascar */
+	COUNTRY_CHPLAN_ENT("MH", 0x34, 1, 0x000), /* Marshall Islands (USA) */
+	COUNTRY_CHPLAN_ENT("MK", 0x26, 1, 0x3F1), /* Republic of Macedonia (FYROM) */
+	COUNTRY_CHPLAN_ENT("ML", 0x26, 1, 0x2B0), /* Mali */
+	COUNTRY_CHPLAN_ENT("MM", 0x26, 1, 0x000), /* Burma (Myanmar) */
+	COUNTRY_CHPLAN_ENT("MN", 0x26, 1, 0x000), /* Mongolia */
+	COUNTRY_CHPLAN_ENT("MO", 0x26, 1, 0x200), /* Macau */
+	COUNTRY_CHPLAN_ENT("MP", 0x34, 1, 0x000), /* Northern Mariana Islands (USA) */
+	COUNTRY_CHPLAN_ENT("MQ", 0x26, 1, 0x240), /* Martinique (France) */
+	COUNTRY_CHPLAN_ENT("MR", 0x26, 1, 0x2A0), /* Mauritania */
+	COUNTRY_CHPLAN_ENT("MS", 0x26, 1, 0x000), /* Montserrat (UK) */
+	COUNTRY_CHPLAN_ENT("MT", 0x26, 1, 0x3FB), /* Malta */
+	COUNTRY_CHPLAN_ENT("MU", 0x26, 1, 0x2B0), /* Mauritius */
+	COUNTRY_CHPLAN_ENT("MV", 0x47, 1, 0x000), /* Maldives */
+	COUNTRY_CHPLAN_ENT("MW", 0x26, 1, 0x2B0), /* Malawi */
+	COUNTRY_CHPLAN_ENT("MX", 0x61, 1, 0x3F1), /* Mexico */
+	COUNTRY_CHPLAN_ENT("MY", 0x63, 1, 0x3F1), /* Malaysia */
+	COUNTRY_CHPLAN_ENT("MZ", 0x26, 1, 0x3F1), /* Mozambique */
+	COUNTRY_CHPLAN_ENT("NA", 0x26, 1, 0x300), /* Namibia */
+	COUNTRY_CHPLAN_ENT("NC", 0x26, 1, 0x000), /* New Caledonia */
+	COUNTRY_CHPLAN_ENT("NE", 0x26, 1, 0x2B0), /* Niger */
+	COUNTRY_CHPLAN_ENT("NF", 0x45, 1, 0x000), /* Norfolk Island (Australia) */
+	COUNTRY_CHPLAN_ENT("NG", 0x75, 1, 0x3F9), /* Nigeria */
+	COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0x3F1), /* Nicaragua */
+	COUNTRY_CHPLAN_ENT("NL", 0x26, 1, 0x3FB), /* Netherlands */
+	COUNTRY_CHPLAN_ENT("NO", 0x26, 1, 0x3FB), /* Norway */
+	COUNTRY_CHPLAN_ENT("NP", 0x47, 1, 0x2F0), /* Nepal */
+	COUNTRY_CHPLAN_ENT("NR", 0x26, 1, 0x000), /* Nauru */
+	COUNTRY_CHPLAN_ENT("NU", 0x45, 1, 0x000), /* Niue */
+	COUNTRY_CHPLAN_ENT("NZ", 0x45, 1, 0x3FB), /* New Zealand */
+	COUNTRY_CHPLAN_ENT("OM", 0x26, 1, 0x3F9), /* Oman */
+	COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0x3F1), /* Panama */
+	COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0x3F1), /* Peru */
+	COUNTRY_CHPLAN_ENT("PF", 0x26, 1, 0x000), /* French Polynesia (France) */
+	COUNTRY_CHPLAN_ENT("PG", 0x26, 1, 0x3F1), /* Papua New Guinea */
+	COUNTRY_CHPLAN_ENT("PH", 0x26, 1, 0x3F1), /* Philippines */
+	COUNTRY_CHPLAN_ENT("PK", 0x51, 1, 0x3F1), /* Pakistan */
+	COUNTRY_CHPLAN_ENT("PL", 0x26, 1, 0x3FB), /* Poland */
+	COUNTRY_CHPLAN_ENT("PM", 0x26, 1, 0x000), /* Saint Pierre and Miquelon (France) */
+	COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0x3F1), /* Puerto Rico */
+	COUNTRY_CHPLAN_ENT("PT", 0x26, 1, 0x3FB), /* Portugal */
+	COUNTRY_CHPLAN_ENT("PW", 0x34, 1, 0x000), /* Palau */
+	COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0x3F1), /* Paraguay */
+	COUNTRY_CHPLAN_ENT("QA", 0x51, 1, 0x3F9), /* Qatar */
+	COUNTRY_CHPLAN_ENT("RE", 0x26, 1, 0x000), /* Reunion (France) */
+	COUNTRY_CHPLAN_ENT("RO", 0x26, 1, 0x3F1), /* Romania */
+	COUNTRY_CHPLAN_ENT("RS", 0x26, 1, 0x3F1), /* Serbia, Kosovo */
+	COUNTRY_CHPLAN_ENT("RU", 0x59, 1, 0x3FB), /* Russia(fac/gost), Kaliningrad */
+	COUNTRY_CHPLAN_ENT("RW", 0x26, 1, 0x2B0), /* Rwanda */
+	COUNTRY_CHPLAN_ENT("SA", 0x26, 1, 0x3FB), /* Saudi Arabia */
+	COUNTRY_CHPLAN_ENT("SB", 0x26, 1, 0x000), /* Solomon Islands */
+	COUNTRY_CHPLAN_ENT("SC", 0x34, 1, 0x290), /* Seychelles */
+	COUNTRY_CHPLAN_ENT("SE", 0x26, 1, 0x3FB), /* Sweden */
+	COUNTRY_CHPLAN_ENT("SG", 0x26, 1, 0x3FB), /* Singapore */
+	COUNTRY_CHPLAN_ENT("SH", 0x26, 1, 0x000), /* Saint Helena (UK) */
+	COUNTRY_CHPLAN_ENT("SI", 0x26, 1, 0x3FB), /* Slovenia */
+	COUNTRY_CHPLAN_ENT("SJ", 0x26, 1, 0x000), /* Svalbard (Norway) */
+	COUNTRY_CHPLAN_ENT("SK", 0x26, 1, 0x3FB), /* Slovakia */
+	COUNTRY_CHPLAN_ENT("SL", 0x26, 1, 0x2B0), /* Sierra Leone */
+	COUNTRY_CHPLAN_ENT("SM", 0x26, 1, 0x000), /* San Marino */
+	COUNTRY_CHPLAN_ENT("SN", 0x26, 1, 0x3F1), /* Senegal */
+	COUNTRY_CHPLAN_ENT("SO", 0x26, 1, 0x000), /* Somalia */
+	COUNTRY_CHPLAN_ENT("SR", 0x74, 1, 0x000), /* Suriname */
+	COUNTRY_CHPLAN_ENT("ST", 0x34, 1, 0x280), /* Sao Tome and Principe */
+	COUNTRY_CHPLAN_ENT("SV", 0x30, 1, 0x3F1), /* El Salvador */
+	COUNTRY_CHPLAN_ENT("SX", 0x34, 1, 0x000), /* Sint Marteen */
+	COUNTRY_CHPLAN_ENT("SZ", 0x26, 1, 0x020), /* Swaziland */
+	COUNTRY_CHPLAN_ENT("TC", 0x26, 1, 0x000), /* Turks and Caicos Islands (UK) */
+	COUNTRY_CHPLAN_ENT("TD", 0x26, 1, 0x2B0), /* Chad */
+	COUNTRY_CHPLAN_ENT("TF", 0x26, 1, 0x280), /* French Southern and Antarctic Lands (FR Southern Territories) */
+	COUNTRY_CHPLAN_ENT("TG", 0x26, 1, 0x2B0), /* Togo */
+	COUNTRY_CHPLAN_ENT("TH", 0x26, 1, 0x3F1), /* Thailand */
+	COUNTRY_CHPLAN_ENT("TJ", 0x26, 1, 0x240), /* Tajikistan */
+	COUNTRY_CHPLAN_ENT("TK", 0x45, 1, 0x000), /* Tokelau */
+	COUNTRY_CHPLAN_ENT("TM", 0x26, 1, 0x000), /* Turkmenistan */
+	COUNTRY_CHPLAN_ENT("TN", 0x47, 1, 0x3F1), /* Tunisia */
+	COUNTRY_CHPLAN_ENT("TO", 0x26, 1, 0x000), /* Tonga */
+	COUNTRY_CHPLAN_ENT("TR", 0x26, 1, 0x3F1), /* Turkey, Northern Cyprus */
+	COUNTRY_CHPLAN_ENT("TT", 0x42, 1, 0x3F1), /* Trinidad & Tobago */
+	COUNTRY_CHPLAN_ENT("TW", 0x76, 1, 0x3FF), /* Taiwan */
+	COUNTRY_CHPLAN_ENT("TZ", 0x26, 1, 0x2F0), /* Tanzania */
+	COUNTRY_CHPLAN_ENT("UA", 0x36, 1, 0x3FB), /* Ukraine */
+	COUNTRY_CHPLAN_ENT("UG", 0x26, 1, 0x2F1), /* Uganda */
+	COUNTRY_CHPLAN_ENT("US", 0x76, 1, 0x3FF), /* United States of America (USA) */
+	COUNTRY_CHPLAN_ENT("UY", 0x30, 1, 0x3F1), /* Uruguay */
+	COUNTRY_CHPLAN_ENT("UZ", 0x47, 1, 0x2F0), /* Uzbekistan */
+	COUNTRY_CHPLAN_ENT("VA", 0x26, 1, 0x000), /* Holy See (Vatican City) */
+	COUNTRY_CHPLAN_ENT("VC", 0x34, 1, 0x010), /* Saint Vincent and the Grenadines */
+	COUNTRY_CHPLAN_ENT("VE", 0x30, 1, 0x3F1), /* Venezuela */
+	COUNTRY_CHPLAN_ENT("VI", 0x34, 1, 0x000), /* United States Virgin Islands (USA) */
+	COUNTRY_CHPLAN_ENT("VN", 0x26, 1, 0x3F1), /* Vietnam */
+	COUNTRY_CHPLAN_ENT("VU", 0x26, 1, 0x000), /* Vanuatu */
+	COUNTRY_CHPLAN_ENT("WF", 0x26, 1, 0x000), /* Wallis and Futuna (France) */
+	COUNTRY_CHPLAN_ENT("WS", 0x34, 1, 0x000), /* Samoa */
+	COUNTRY_CHPLAN_ENT("YE", 0x26, 1, 0x040), /* Yemen */
+	COUNTRY_CHPLAN_ENT("YT", 0x26, 1, 0x280), /* Mayotte (France) */
+	COUNTRY_CHPLAN_ENT("ZA", 0x26, 1, 0x3F1), /* South Africa */
+	COUNTRY_CHPLAN_ENT("ZM", 0x26, 1, 0x2B0), /* Zambia */
+	COUNTRY_CHPLAN_ENT("ZW", 0x26, 1, 0x3F1), /* Zimbabwe */
 };
 
-u16 const country_chplan_map_sz = sizeof(country_chplan_map) / sizeof(struct country_chplan);
-
 /*
 * rtw_get_chplan_from_country -
 * @country_code: string of country code
@@ -938,10 +998,10 @@ const struct country_chplan *rtw_get_chplan_from_country(const char *country_cod
 
 #ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP
 	map = CUSTOMIZED_country_chplan_map;
-	map_sz = CUSTOMIZED_country_chplan_map_sz;
+	map_sz = sizeof(CUSTOMIZED_country_chplan_map) / sizeof(struct country_chplan);
 #else
 	map = country_chplan_map;
-	map_sz = country_chplan_map_sz;
+	map_sz = sizeof(country_chplan_map) / sizeof(struct country_chplan);
 #endif
 
 	for (i = 0; i < map_sz; i++) {
@@ -960,6 +1020,613 @@ exit:
 	return ent;
 }
 
+const char *const _regd_str[] = {
+	"NONE",
+	"FCC",
+	"MKK",
+	"ETSI",
+	"IC",
+	"KCC",
+	"WW",
+};
+
+#ifdef CONFIG_TXPWR_LIMIT
+void _dump_regd_exc_list(void *sel, struct rf_ctl_t *rfctl)
+{
+	struct regd_exc_ent *ent;
+	_list *cur, *head;
+
+	RTW_PRINT_SEL(sel, "regd_exc_num:%u\n", rfctl->regd_exc_num);
+
+	if (!rfctl->regd_exc_num)
+		goto exit;
+
+	RTW_PRINT_SEL(sel, "%-7s %-6s %-9s\n", "country", "domain", "regd_name");
+
+	head = &rfctl->reg_exc_list;
+	cur = get_next(head);
+
+	while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
+		u8 has_country;
+
+		ent = LIST_CONTAINOR(cur, struct regd_exc_ent, list);
+		cur = get_next(cur);
+		has_country = (ent->country[0] == '\0' && ent->country[1] == '\0') ? 0 : 1;
+
+		RTW_PRINT_SEL(sel, "     %c%c   0x%02x %s\n"
+			, has_country ? ent->country[0] : '0'
+			, has_country ? ent->country[1] : '0'
+			, ent->domain
+			, ent->regd_name
+		);
+	}
+
+exit:
+	return;
+}
+
+inline void dump_regd_exc_list(void *sel, struct rf_ctl_t *rfctl)
+{
+	_irqL irqL;
+
+	_enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+	_dump_regd_exc_list(sel, rfctl);
+	_exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+}
+
+void rtw_regd_exc_add_with_nlen(struct rf_ctl_t *rfctl, const char *country, u8 domain, const char *regd_name, u32 nlen)
+{
+	struct regd_exc_ent *ent;
+	_irqL irqL;
+
+	if (!regd_name || !nlen) {
+		rtw_warn_on(1);
+		goto exit;
+	}
+
+	ent = (struct regd_exc_ent *)rtw_zmalloc(sizeof(struct regd_exc_ent) + nlen + 1);
+	if (!ent)
+		goto exit;
+
+	_rtw_init_listhead(&ent->list);
+	if (country)
+		_rtw_memcpy(ent->country, country, 2);
+	ent->domain = domain;
+	_rtw_memcpy(ent->regd_name, regd_name, nlen);
+
+	_enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+
+	rtw_list_insert_tail(&ent->list, &rfctl->reg_exc_list);
+	rfctl->regd_exc_num++;
+
+	_exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+
+exit:
+	return;
+}
+
+inline void rtw_regd_exc_add(struct rf_ctl_t *rfctl, const char *country, u8 domain, const char *regd_name)
+{
+	rtw_regd_exc_add_with_nlen(rfctl, country, domain, regd_name, strlen(regd_name));
+}
+
+struct regd_exc_ent *_rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *country, u8 domain)
+{
+	struct regd_exc_ent *ent;
+	_list *cur, *head;
+	u8 match = 0;
+
+	head = &rfctl->reg_exc_list;
+	cur = get_next(head);
+
+	while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
+		u8 has_country;
+
+		ent = LIST_CONTAINOR(cur, struct regd_exc_ent, list);
+		cur = get_next(cur);
+		has_country = (ent->country[0] == '\0' && ent->country[1] == '\0') ? 0 : 1;
+
+		/* entry has country condition to match */
+		if (has_country) {
+			if (!country)
+				continue;
+			if (ent->country[0] != country[0]
+				|| ent->country[1] != country[1])
+				continue;
+		}
+
+		/* entry has domain condition to match */
+		if (ent->domain != 0xFF) {
+			if (domain == 0xFF)
+				continue;
+			if (ent->domain != domain)
+				continue;
+		}
+
+		match = 1;
+		break;
+	}
+
+exit:
+	if (match)
+		return ent;
+	else
+		return NULL;
+}
+
+inline struct regd_exc_ent *rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *country, u8 domain)
+{
+	struct regd_exc_ent *ent;
+	_irqL irqL;
+
+	_enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+	ent = _rtw_regd_exc_search(rfctl, country, domain);
+	_exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+
+	return ent;
+}
+
+void rtw_regd_exc_list_free(struct rf_ctl_t *rfctl)
+{
+	struct regd_exc_ent *ent;
+	_irqL irqL;
+	_list *cur, *head;
+
+	_enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+
+	head = &rfctl->reg_exc_list;
+	cur = get_next(head);
+
+	while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
+		ent = LIST_CONTAINOR(cur, struct regd_exc_ent, list);
+		cur = get_next(cur);
+		rtw_list_delete(&ent->list);
+		rtw_mfree((u8 *)ent, sizeof(struct regd_exc_ent) + strlen(ent->regd_name) + 1);
+	}
+	rfctl->regd_exc_num = 0;
+
+	_exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+}
+
+void dump_txpwr_lmt(void *sel, _adapter *adapter)
+{
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
+	_irqL irqL;
+	char fmt[16];
+	s8 *lmt_idx = NULL;
+	int bw, band, ch_num, tlrs, ntx_idx, rs, i, path;
+	u8 ch, n, rfpath_num;
+
+	_enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+
+	_dump_regd_exc_list(sel, rfctl);
+	RTW_PRINT_SEL(sel, "\n");
+
+	if (!rfctl->txpwr_regd_num)
+		goto release_lock;
+
+	lmt_idx = rtw_malloc(sizeof(s8) * RF_PATH_MAX * rfctl->txpwr_regd_num);
+	if (!lmt_idx) {
+		RTW_ERR("%s alloc fail\n", __func__);
+		goto release_lock;
+	}
+
+	RTW_PRINT_SEL(sel, "txpwr_lmt_2g_cck_ofdm_state:0x%02x\n", rfctl->txpwr_lmt_2g_cck_ofdm_state);
+	#ifdef CONFIG_IEEE80211_BAND_5GHZ
+	if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter))
+		RTW_PRINT_SEL(sel, "txpwr_lmt_5g_cck_ofdm_state:0x%02x\n", rfctl->txpwr_lmt_5g_cck_ofdm_state);
+		RTW_PRINT_SEL(sel, "txpwr_lmt_5g_20_40_ref:0x%02x\n", rfctl->txpwr_lmt_5g_20_40_ref);
+	#endif
+	RTW_PRINT_SEL(sel, "\n");
+
+	for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) {
+		if (!hal_is_band_support(adapter, band))
+			continue;
+
+		rfpath_num = (band == BAND_ON_2_4G ? hal_spec->rfpath_num_2g : hal_spec->rfpath_num_5g);
+
+		for (bw = 0; bw < MAX_5G_BANDWIDTH_NUM; bw++) {
+
+			if (bw >= CHANNEL_WIDTH_160)
+				break;
+			if (band == BAND_ON_2_4G && bw >= CHANNEL_WIDTH_80)
+				break;
+
+			if (band == BAND_ON_2_4G)
+				ch_num = CENTER_CH_2G_NUM;
+			else
+				ch_num = center_chs_5g_num(bw);
+
+			if (ch_num == 0) {
+				rtw_warn_on(1);
+				break;
+			}
+
+			for (tlrs = TXPWR_LMT_RS_CCK; tlrs < TXPWR_LMT_RS_NUM; tlrs++) {
+
+				if (band == BAND_ON_2_4G && tlrs == TXPWR_LMT_RS_VHT)
+					continue;
+				if (band == BAND_ON_5G && tlrs == TXPWR_LMT_RS_CCK)
+					continue;
+				if (bw > CHANNEL_WIDTH_20 && (tlrs == TXPWR_LMT_RS_CCK || tlrs == TXPWR_LMT_RS_OFDM))
+					continue;
+				if (bw > CHANNEL_WIDTH_40 && tlrs == TXPWR_LMT_RS_HT)
+					continue;
+				if (tlrs == TXPWR_LMT_RS_VHT && !IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter))
+					continue;
+
+				for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) {
+					struct txpwr_lmt_ent *ent;
+					_list *cur, *head;
+
+					if (ntx_idx >= hal_spec->tx_nss_num)
+						continue;
+
+					/* bypass CCK multi-TX is not defined */
+					if (tlrs == TXPWR_LMT_RS_CCK && ntx_idx > RF_1TX) {
+						if (band == BAND_ON_2_4G
+							&& !(rfctl->txpwr_lmt_2g_cck_ofdm_state & (TXPWR_LMT_HAS_CCK_1T << ntx_idx)))
+							continue;
+					}
+
+					/* bypass OFDM multi-TX is not defined */
+					if (tlrs == TXPWR_LMT_RS_OFDM && ntx_idx > RF_1TX) {
+						if (band == BAND_ON_2_4G
+							&& !(rfctl->txpwr_lmt_2g_cck_ofdm_state & (TXPWR_LMT_HAS_OFDM_1T << ntx_idx)))
+							continue;
+						#ifdef CONFIG_IEEE80211_BAND_5GHZ
+						if (band == BAND_ON_5G
+							&& !(rfctl->txpwr_lmt_5g_cck_ofdm_state & (TXPWR_LMT_HAS_OFDM_1T << ntx_idx)))
+							continue;
+						#endif
+					}
+
+					/* bypass 5G 20M, 40M pure reference */
+					#ifdef CONFIG_IEEE80211_BAND_5GHZ
+					if (band == BAND_ON_5G && (bw == CHANNEL_WIDTH_20 || bw == CHANNEL_WIDTH_40)) {
+						if (rfctl->txpwr_lmt_5g_20_40_ref == TXPWR_LMT_REF_HT_FROM_VHT) {
+							if (tlrs == TXPWR_LMT_RS_HT)
+								continue;
+						} else if (rfctl->txpwr_lmt_5g_20_40_ref == TXPWR_LMT_REF_VHT_FROM_HT) {
+							if (tlrs == TXPWR_LMT_RS_VHT && bw <= CHANNEL_WIDTH_40)
+								continue;
+						}
+					}
+					#endif
+
+					/* choose n-SS mapping rate section to get lmt diff value */
+					if (tlrs == TXPWR_LMT_RS_CCK)
+						rs = CCK;
+					else if (tlrs == TXPWR_LMT_RS_OFDM)
+						rs = OFDM;
+					else if (tlrs == TXPWR_LMT_RS_HT)
+						rs = HT_1SS + ntx_idx;
+					else if (tlrs == TXPWR_LMT_RS_VHT)
+						rs = VHT_1SS + ntx_idx;
+					else {
+						RTW_ERR("%s invalid tlrs %u\n", __func__, tlrs);
+						continue;
+					}
+
+					RTW_PRINT_SEL(sel, "[%s][%s][%s][%uT]\n"
+						, band_str(band)
+						, ch_width_str(bw)
+						, txpwr_lmt_rs_str(tlrs)
+						, ntx_idx + 1
+					);
+
+					/* header for limit in db */
+					RTW_PRINT_SEL(sel, "%3s ", "ch");
+
+					head = &rfctl->txpwr_lmt_list;
+					cur = get_next(head);
+					while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
+						ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
+						cur = get_next(cur);
+
+						sprintf(fmt, "%%%zus%%s ", strlen(ent->regd_name) < 4 ? 5 - strlen(ent->regd_name) : 1);
+						_RTW_PRINT_SEL(sel, fmt
+							, strcmp(ent->regd_name, rfctl->regd_name) == 0 ? "*" : ""
+							, ent->regd_name
+						);
+					}
+					sprintf(fmt, "%%%zus%%s ", strlen(regd_str(TXPWR_LMT_WW)) < 4 ? 5 - strlen(regd_str(TXPWR_LMT_WW)) : 1);
+					_RTW_PRINT_SEL(sel, fmt
+						, strcmp(rfctl->regd_name, regd_str(TXPWR_LMT_WW)) == 0 ? "*" : ""
+						, regd_str(TXPWR_LMT_WW)
+					);
+
+					/* header for limit offset */
+					for (path = 0; path < RF_PATH_MAX; path++) {
+						if (path >= rfpath_num)
+							break;
+						_RTW_PRINT_SEL(sel, "|");
+						head = &rfctl->txpwr_lmt_list;
+						cur = get_next(head);
+						while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
+							ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
+							cur = get_next(cur);
+							_RTW_PRINT_SEL(sel, "%3c "
+								, strcmp(ent->regd_name, rfctl->regd_name) == 0 ? rf_path_char(path) : ' ');
+						}
+						_RTW_PRINT_SEL(sel, "%3c "
+								, strcmp(rfctl->regd_name, regd_str(TXPWR_LMT_WW)) == 0 ? rf_path_char(path) : ' ');
+					}
+					_RTW_PRINT_SEL(sel, "\n");
+
+					for (n = 0; n < ch_num; n++) {
+						s8 lmt;
+						s8 lmt_offset;
+						u8 base;
+
+						if (band == BAND_ON_2_4G)
+							ch = n + 1;
+						else
+							ch = center_chs_5g(bw, n);
+
+						if (ch == 0) {
+							rtw_warn_on(1);
+							break;
+						}
+
+						/* dump limit in db */
+						RTW_PRINT_SEL(sel, "%3u ", ch);
+						head = &rfctl->txpwr_lmt_list;
+						cur = get_next(head);
+						while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
+							ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
+							cur = get_next(cur);
+							lmt = phy_get_txpwr_lmt_abs(adapter, ent->regd_name, band, bw, tlrs, ntx_idx, ch, 0);
+							if (lmt == MAX_POWER_INDEX) {
+								sprintf(fmt, "%%%zus ", strlen(ent->regd_name) >= 5 ? strlen(ent->regd_name) + 1 : 5);
+								_RTW_PRINT_SEL(sel, fmt, "NA");
+							} else {
+								if (lmt % 2) {
+									sprintf(fmt, "%%%zud.5 ", strlen(ent->regd_name) >= 5 ? strlen(ent->regd_name) - 1 : 3);
+									_RTW_PRINT_SEL(sel, fmt, lmt / 2);
+								} else {
+									sprintf(fmt, "%%%zud ", strlen(ent->regd_name) >= 5 ? strlen(ent->regd_name) + 1 : 5);
+									_RTW_PRINT_SEL(sel, fmt, lmt / 2);
+								}
+							}
+						}
+						lmt = phy_get_txpwr_lmt_abs(adapter, regd_str(TXPWR_LMT_WW), band, bw, tlrs, ntx_idx, ch, 0);
+						if (lmt == MAX_POWER_INDEX) {
+							sprintf(fmt, "%%%zus ", strlen(regd_str(TXPWR_LMT_WW)) >= 5 ? strlen(regd_str(TXPWR_LMT_WW)) + 1 : 5);
+							_RTW_PRINT_SEL(sel, fmt, "NA");
+						} else {
+							if (lmt % 2) {
+								sprintf(fmt, "%%%zud.5 ", strlen(regd_str(TXPWR_LMT_WW)) >= 5 ? strlen(regd_str(TXPWR_LMT_WW)) - 1 : 3);
+								_RTW_PRINT_SEL(sel, fmt, lmt / 2);
+							} else {
+								sprintf(fmt, "%%%zud ", strlen(regd_str(TXPWR_LMT_WW)) >= 5 ? strlen(regd_str(TXPWR_LMT_WW)) + 1 : 5);
+								_RTW_PRINT_SEL(sel, fmt, lmt / 2);
+							}
+						}
+
+						/* dump limit offset of each path */
+						for (path = RF_PATH_A; path < RF_PATH_MAX; path++) {
+							if (path >= rfpath_num)
+								break;
+
+							base = PHY_GetTxPowerByRateBase(adapter, band, path, rs);
+
+							_RTW_PRINT_SEL(sel, "|");
+							head = &rfctl->txpwr_lmt_list;
+							cur = get_next(head);
+							i = 0;
+							while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
+								ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
+								cur = get_next(cur);
+								lmt_offset = phy_get_txpwr_lmt(adapter, ent->regd_name, band, bw, path, rs, ntx_idx, ch, 0);
+								if (lmt_offset == MAX_POWER_INDEX) {
+									*(lmt_idx + i * RF_PATH_MAX + path) = MAX_POWER_INDEX;
+									_RTW_PRINT_SEL(sel, "%3s ", "NA");
+								} else {
+									*(lmt_idx + i * RF_PATH_MAX + path) = lmt_offset + base;
+									_RTW_PRINT_SEL(sel, "%3d ", lmt_offset);
+								}
+								i++;
+							}
+							lmt_offset = phy_get_txpwr_lmt(adapter, regd_str(TXPWR_LMT_WW), band, bw, path, rs, ntx_idx, ch, 0);
+							if (lmt_offset == MAX_POWER_INDEX)
+								_RTW_PRINT_SEL(sel, "%3s ", "NA");
+							else
+								_RTW_PRINT_SEL(sel, "%3d ", lmt_offset);
+
+						}
+
+						/* compare limit_idx of each path, print 'x' when mismatch */
+						if (rfpath_num > 1) {
+							for (i = 0; i < rfctl->txpwr_regd_num; i++) {
+								for (path = 0; path < RF_PATH_MAX; path++) {
+									if (path >= rfpath_num)
+										break;
+									if (*(lmt_idx + i * RF_PATH_MAX + path) != *(lmt_idx + i * RF_PATH_MAX + ((path + 1) % rfpath_num)))
+										break;
+								}
+								if (path >= rfpath_num)
+									_RTW_PRINT_SEL(sel, " ");
+								else
+									_RTW_PRINT_SEL(sel, "x");
+							}
+						}
+						_RTW_PRINT_SEL(sel, "\n");
+
+					}
+					RTW_PRINT_SEL(sel, "\n");
+				}
+			} /* loop for rate sections */
+		} /* loop for bandwidths */
+	} /* loop for bands */
+
+	if (lmt_idx)
+		rtw_mfree(lmt_idx, sizeof(s8) * RF_PATH_MAX * rfctl->txpwr_regd_num);
+
+release_lock:
+	_exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+}
+
+/* search matcing first, if not found, alloc one */
+void rtw_txpwr_lmt_add_with_nlen(struct rf_ctl_t *rfctl, const char *regd_name, u32 nlen
+	, u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt)
+{
+	struct txpwr_lmt_ent *ent;
+	_irqL irqL;
+	_list *cur, *head;
+	s8 pre_lmt;
+
+	if (!regd_name || !nlen) {
+		rtw_warn_on(1);
+		goto exit;
+	}
+
+	_enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+
+	/* search for existed entry */
+	head = &rfctl->txpwr_lmt_list;
+	cur = get_next(head);
+	while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
+		ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
+		cur = get_next(cur);
+
+		if (strlen(ent->regd_name) == nlen
+			&& _rtw_memcmp(ent->regd_name, regd_name, nlen) == _TRUE)
+			goto chk_lmt_val;
+	}
+
+	/* alloc new one */
+	ent = (struct txpwr_lmt_ent *)rtw_zvmalloc(sizeof(struct txpwr_lmt_ent) + nlen + 1);
+	if (!ent)
+		goto release_lock;
+
+	_rtw_init_listhead(&ent->list);
+	_rtw_memcpy(ent->regd_name, regd_name, nlen);
+	{
+		u8 j, k, l, m;
+
+		for (j = 0; j < MAX_2_4G_BANDWIDTH_NUM; ++j)
+			for (k = 0; k < TXPWR_LMT_RS_NUM_2G; ++k)
+				for (m = 0; m < CENTER_CH_2G_NUM; ++m)
+					for (l = 0; l < MAX_TX_COUNT; ++l)
+						ent->lmt_2g[j][k][m][l] = MAX_POWER_INDEX;
+		#ifdef CONFIG_IEEE80211_BAND_5GHZ
+		for (j = 0; j < MAX_5G_BANDWIDTH_NUM; ++j)
+			for (k = 0; k < TXPWR_LMT_RS_NUM_5G; ++k)
+				for (m = 0; m < CENTER_CH_5G_ALL_NUM; ++m)
+					for (l = 0; l < MAX_TX_COUNT; ++l)
+						ent->lmt_5g[j][k][m][l] = MAX_POWER_INDEX;
+		#endif
+	}
+
+	rtw_list_insert_tail(&ent->list, &rfctl->txpwr_lmt_list);
+	rfctl->txpwr_regd_num++;
+
+chk_lmt_val:
+	if (band == BAND_ON_2_4G)
+		pre_lmt = ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx];
+	#ifdef CONFIG_IEEE80211_BAND_5GHZ
+	else if (band == BAND_ON_5G)
+		pre_lmt = ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx];
+	#endif
+	else
+		goto release_lock;
+
+	if (pre_lmt != MAX_POWER_INDEX)
+		RTW_PRINT("duplicate txpwr_lmt for [%s][%s][%s][%s][%uT][%d]\n"
+			, regd_name, band_str(band), ch_width_str(bw), txpwr_lmt_rs_str(tlrs), ntx_idx + 1
+			, band == BAND_ON_2_4G ? ch_idx + 1 : center_ch_5g_all[ch_idx]);
+
+	lmt = rtw_min(pre_lmt, lmt);
+	if (band == BAND_ON_2_4G)
+		ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx] = lmt;
+	#ifdef CONFIG_IEEE80211_BAND_5GHZ
+	else if (band == BAND_ON_5G)
+		ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx] = lmt;
+	#endif
+
+	if (0)
+		RTW_PRINT("%s, %4s, %6s, %7s, %uT, ch%3d = %d\n"
+			, regd_name, band_str(band), ch_width_str(bw), txpwr_lmt_rs_str(tlrs), ntx_idx + 1
+			, band == BAND_ON_2_4G ? ch_idx + 1 : center_ch_5g_all[ch_idx]
+			, lmt);
+
+release_lock:
+	_exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+
+exit:
+	return;
+}
+
+inline void rtw_txpwr_lmt_add(struct rf_ctl_t *rfctl, const char *regd_name
+	, u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt)
+{
+	rtw_txpwr_lmt_add_with_nlen(rfctl, regd_name, strlen(regd_name)
+		, band, bw, tlrs, ntx_idx, ch_idx, lmt);
+}
+
+struct txpwr_lmt_ent *_rtw_txpwr_lmt_get_by_name(struct rf_ctl_t *rfctl, const char *regd_name)
+{
+	struct txpwr_lmt_ent *ent;
+	_list *cur, *head;
+	u8 found = 0;
+
+	head = &rfctl->txpwr_lmt_list;
+	cur = get_next(head);
+
+	while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
+		ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
+		cur = get_next(cur);
+
+		if (strcmp(ent->regd_name, regd_name) == 0) {
+			found = 1;
+			break;
+		}
+	}
+
+	if (found)
+		return ent;
+	return NULL;
+}
+
+inline struct txpwr_lmt_ent *rtw_txpwr_lmt_get_by_name(struct rf_ctl_t *rfctl, const char *regd_name)
+{
+	struct txpwr_lmt_ent *ent;
+	_irqL irqL;
+
+	_enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+	ent = _rtw_txpwr_lmt_get_by_name(rfctl, regd_name);
+	_exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+
+	return ent;
+}
+
+void rtw_txpwr_lmt_list_free(struct rf_ctl_t *rfctl)
+{
+	struct txpwr_lmt_ent *ent;
+	_irqL irqL;
+	_list *cur, *head;
+
+	_enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+
+	head = &rfctl->txpwr_lmt_list;
+	cur = get_next(head);
+
+	while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
+		ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
+		cur = get_next(cur);
+		if (ent->regd_name == rfctl->regd_name)
+			rfctl->regd_name = regd_str(TXPWR_LMT_NONE);
+		rtw_list_delete(&ent->list);
+		rtw_vmfree((u8 *)ent, sizeof(struct txpwr_lmt_ent) + strlen(ent->regd_name) + 1);
+	}
+	rfctl->txpwr_regd_num = 0;
+
+	_exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+}
+#endif /* CONFIG_TXPWR_LIMIT */
+
 int rtw_ch_to_bb_gain_sel(int ch)
 {
 	int sel = -1;
@@ -1109,19 +1776,57 @@ void rtw_rf_apply_tx_gain_offset(_adapter *adapter, u8 ch)
 	}
 }
 
-bool rtw_is_dfs_range(u32 hi, u32 lo)
+inline u8 rtw_is_5g_band1(u8 ch)
+{
+	if (ch >= 36 && ch <= 48)
+		return 1;
+	return 0;
+}
+
+inline u8 rtw_is_5g_band2(u8 ch)
 {
-	return rtw_is_range_overlap(hi, lo, 5720 + 10, 5260 - 10) ? _TRUE : _FALSE;
+	if (ch >= 52 && ch <= 64)
+		return 1;
+	return 0;
 }
 
-bool rtw_is_dfs_ch(u8 ch, u8 bw, u8 offset)
+inline u8 rtw_is_5g_band3(u8 ch)
+{
+	if (ch >= 100 && ch <= 144)
+		return 1;
+	return 0;
+}
+
+inline u8 rtw_is_5g_band4(u8 ch)
+{
+	if (ch >= 149 && ch <= 177)
+		return 1;
+	return 0;
+}
+
+inline u8 rtw_is_dfs_range(u32 hi, u32 lo)
+{
+	return rtw_is_range_overlap(hi, lo, 5720 + 10, 5260 - 10);
+}
+
+u8 rtw_is_dfs_ch(u8 ch)
 {
 	u32 hi, lo;
 
-	if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE)
-		return _FALSE;
+	if (!rtw_chbw_to_freq_range(ch, CHANNEL_WIDTH_20, HAL_PRIME_CHNL_OFFSET_DONT_CARE, &hi, &lo))
+		return 0;
+
+	return rtw_is_dfs_range(hi, lo);
+}
+
+u8 rtw_is_dfs_chbw(u8 ch, u8 bw, u8 offset)
+{
+	u32 hi, lo;
+
+	if (!rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo))
+		return 0;
 
-	return rtw_is_dfs_range(hi, lo) ? _TRUE : _FALSE;
+	return rtw_is_dfs_range(hi, lo);
 }
 
 bool rtw_is_long_cac_range(u32 hi, u32 lo, u8 dfs_region)
diff --git a/rtl8822BU/core/rtw_sdio.c b/rtl8822BU/core/rtw_sdio.c
index 817d60b..bf27f46 100755..100644
--- a/rtl8822BU/core/rtw_sdio.c
+++ b/rtl8822BU/core/rtw_sdio.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,11 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_SDIO_C_
 
 #include <drv_types.h>		/* struct dvobj_priv and etc. */
@@ -39,22 +35,61 @@
  */
 static u8 sdio_io(struct dvobj_priv *d, u32 addr, void *buf, size_t len, u8 write, u8 cmd52)
 {
+	u32 addr_drv;	/* address with driver defined bit */
 	int err;
+	u8 retry = 0;
+	u8 stop_retry = _FALSE;	/* flag for stopping retry or not */
 
 
-	if (cmd52)
-		addr = RTW_SDIO_ADDR_CMD52_GEN(addr);
-
-	if (write)
-		err = d->intf_ops->write(d, addr, buf, len, 0);
-	else
-		err = d->intf_ops->read(d, addr, buf, len, 0);
-	if (err) {
-		RTW_INFO("%s: [ERROR] %s FAIL! error(%d)\n",
-			 __FUNCTION__, write ? "write" : "read", err);
+	if (rtw_is_surprise_removed(dvobj_get_primary_adapter(d))) {
+		RTW_ERR("%s: bSurpriseRemoved, skip %s 0x%05x, %zu bytes\n",
+			__FUNCTION__, write?"write":"read", addr, len);
 		return _FAIL;
 	}
 
+	addr_drv = addr;
+	if (cmd52)
+		addr_drv = RTW_SDIO_ADDR_CMD52_GEN(addr_drv);
+
+	do {
+		if (write)
+			err = d->intf_ops->write(d, addr_drv, buf, len, 0);
+		else
+			err = d->intf_ops->read(d, addr_drv, buf, len, 0);
+		if (!err) {
+			if (retry) {
+				RTW_INFO("%s: Retry %s OK! addr=0x%05x %zu bytes, retry=%u,%u\n",
+					 __FUNCTION__, write?"write":"read",
+					 addr, len, retry, ATOMIC_READ(&d->continual_io_error));
+				RTW_INFO_DUMP("Data: ", buf, len);
+			}
+			rtw_reset_continual_io_error(d);
+			break;
+		}
+		RTW_ERR("%s: %s FAIL! error(%d) addr=0x%05x %zu bytes, retry=%u,%u\n",
+			__FUNCTION__, write?"write":"read", err, addr, len,
+			retry, ATOMIC_READ(&d->continual_io_error));
+
+		retry++;
+		stop_retry = rtw_inc_and_chk_continual_io_error(d);
+		if ((err == -1) || (stop_retry == _TRUE) || (retry > SD_IO_TRY_CNT)) {
+			/* critical error, unrecoverable */
+			RTW_ERR("%s: Fatal error! Set surprise remove flag ON! (retry=%u,%u)\n",
+				__FUNCTION__, retry, ATOMIC_READ(&d->continual_io_error));
+			rtw_set_surprise_removed(dvobj_get_primary_adapter(d));
+			return _FAIL;
+		}
+
+		/* WLAN IOREG or SDIO Local */
+		if ((addr & 0x10000) || !(addr & 0xE000)) {
+			RTW_WARN("%s: Retry %s addr=0x%05x %zu bytes, retry=%u,%u\n",
+				 __FUNCTION__, write?"write":"read", addr, len,
+				 retry, ATOMIC_READ(&d->continual_io_error));
+			continue;
+		}
+		return _FAIL;
+	} while (1);
+
 	return _SUCCESS;
 }
 
diff --git a/rtl8822BU/core/rtw_security.c b/rtl8822BU/core/rtw_security.c
index df88f53..2206428 100755..100644
--- a/rtl8822BU/core/rtw_security.c
+++ b/rtl8822BU/core/rtw_security.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define  _RTW_SECURITY_C_
 
 #include <drv_types.h>
@@ -2210,7 +2205,7 @@ static int sha256_process(struct sha256_state *md, unsigned char *in,
 	unsigned long n;
 #define block_size 64
 
-	if (md->curlen > sizeof(md->buf))
+	if (md->curlen >= sizeof(md->buf))
 		return -1;
 
 	while (inlen > 0) {
@@ -3071,25 +3066,6 @@ int tdls_verify_mic(u8 *kck, u8 trans_seq,
 }
 #endif /* CONFIG_TDLS */
 
-void rtw_use_tkipkey_handler(RTW_TIMER_HDL_ARGS)
-{
-	_adapter *padapter = (_adapter *)FunctionContext;
-
-
-
-	/*
-		if (RTW_CANNOT_RUN(padapter)) {
-
-			return;
-		}
-		*/
-
-	padapter->securitypriv.busetkipkey = _TRUE;
-
-
-
-}
-
 /* Restore HW wep key setting according to key_mask */
 void rtw_sec_restore_wep_key(_adapter *adapter)
 {
diff --git a/rtl8822BU/core/rtw_sreset.c b/rtl8822BU/core/rtw_sreset.c
index 6d241ca..6baacb7 100755..100644
--- a/rtl8822BU/core/rtw_sreset.c
+++ b/rtl8822BU/core/rtw_sreset.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #include <drv_types.h>
 #include <hal_data.h>
@@ -273,7 +268,7 @@ void sreset_stop_adapter(_adapter *padapter)
 
 	if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) {
 		rtw_set_to_roam(padapter, 0);
-		_rtw_join_timeout_handler(padapter);
+		rtw_join_timeout_handler(padapter);
 	}
 
 }
diff --git a/rtl8822BU/core/rtw_sta_mgt.c b/rtl8822BU/core/rtw_sta_mgt.c
index f906603..4bd110a 100755..100644
--- a/rtl8822BU/core/rtw_sta_mgt.c
+++ b/rtl8822BU/core/rtw_sta_mgt.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_STA_MGT_C_
 
 #include <drv_types.h>
@@ -446,6 +441,14 @@ u32	_rtw_free_sta_priv(struct	sta_priv *pstapriv)
 }
 
 
+static void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl)
+{
+	_adapter *padapter = preorder_ctrl->padapter;
+
+	rtw_init_timer(&(preorder_ctrl->reordering_ctrl_timer), padapter, rtw_reordering_ctrl_timeout_handler, preorder_ctrl);
+
+}
+
 /* struct	sta_info *rtw_alloc_stainfo(_queue *pfree_sta_queue, unsigned char *hwaddr) */
 struct	sta_info *rtw_alloc_stainfo(struct	sta_priv *pstapriv, u8 *hwaddr)
 {
@@ -508,10 +511,9 @@ struct	sta_info *rtw_alloc_stainfo(struct	sta_priv *pstapriv, u8 *hwaddr)
 		for (i = 0; i < 16; i++)
 			_rtw_memcpy(&psta->sta_recvpriv.rxcache.tid_rxseq[i], &wRxSeqInitialValue, 2);
 
-
-		init_addba_retry_timer(pstapriv->padapter, psta);
+		rtw_init_timer(&psta->addba_retry_timer, psta->padapter, addba_timer_hdl, psta);
 #ifdef CONFIG_IEEE80211W
-		init_dot11w_expire_timer(pstapriv->padapter, psta);
+		rtw_init_timer(&psta->dot11w_expire_timer, psta->padapter, sa_query_timer_hdl, psta);
 #endif /* CONFIG_IEEE80211W */
 #ifdef CONFIG_TDLS
 		rtw_init_tdls_timer(pstapriv->padapter, psta);
diff --git a/rtl8822BU/core/rtw_tdls.c b/rtl8822BU/core/rtw_tdls.c
index 8dccba1..ecf1277 100755..100644
--- a/rtl8822BU/core/rtw_tdls.c
+++ b/rtl8822BU/core/rtw_tdls.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_TDLS_C_
 
 #include <drv_types.h>
@@ -424,11 +419,12 @@ u8 *rtw_tdls_set_ht_cap(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattr
 #ifdef CONFIG_80211AC_VHT
 void rtw_tdls_process_vht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8 *data, u8 Length)
 {
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
 	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
 	struct vht_priv			*pvhtpriv = &pmlmepriv->vhtpriv;
-	u8	cur_ldpc_cap = 0, cur_stbc_cap = 0, cur_beamform_cap = 0, rf_type = RF_1T1R;
+	u8	cur_ldpc_cap = 0, cur_stbc_cap = 0, cur_beamform_cap = 0, rf_type = RF_1T1R, tx_nss = 0;
 	u8	*pcap_mcs;
-	u8	vht_mcs[2];
 
 	_rtw_memset(&ptdls_sta->vhtpriv, 0, sizeof(struct vht_priv));
 	if (data && Length == 12) {
@@ -450,7 +446,7 @@ void rtw_tdls_process_vht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8
 	if (ptdls_sta->flags & WLAN_STA_VHT) {
 		if (REGSTY_IS_11AC_ENABLE(&padapter->registrypriv)
 		    && hal_chk_proto_cap(padapter, PROTO_CAP_11AC)
-		    && (!pmlmepriv->country_ent || COUNTRY_CHPLAN_EN_11AC(pmlmepriv->country_ent)))
+		    && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent)))
 			ptdls_sta->vhtpriv.vht_option = _TRUE;
 		else
 			ptdls_sta->vhtpriv.vht_option = _FALSE;
@@ -492,18 +488,9 @@ void rtw_tdls_process_vht_cap(_adapter *padapter, struct sta_info *ptdls_sta, u8
 	ptdls_sta->vhtpriv.ampdu_len = GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(data);
 
 	pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(data);
-	_rtw_memcpy(vht_mcs, pcap_mcs, 2);
-
 	rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
-	if ((rf_type == RF_1T1R) || (rf_type == RF_1T2R))
-		vht_mcs[0] |= 0xfc;
-	else if (rf_type == RF_2T2R)
-		vht_mcs[0] |= 0xf0;
-	else if (rf_type == RF_3T3R)
-		vht_mcs[0] |= 0xc0;
-
-	_rtw_memcpy(ptdls_sta->vhtpriv.vht_mcs_map, vht_mcs, 2);
-
+	tx_nss = rtw_min(rf_type_to_rf_tx_cnt(rf_type), hal_spec->tx_nss_num);
+	rtw_vht_nss_to_mcsmap(tx_nss, ptdls_sta->vhtpriv.vht_mcs_map, pcap_mcs);
 	ptdls_sta->vhtpriv.vht_highest_rate = rtw_get_vht_highest_rate(ptdls_sta->vhtpriv.vht_mcs_map);
 }
 
@@ -546,20 +533,22 @@ u8 *rtw_tdls_set_vht_op_mode_notify(_adapter *padapter, u8 *pframe, struct pkt_a
 #endif
 
 
-u8 *rtw_tdls_set_sup_ch(struct mlme_ext_priv *pmlmeext, u8 *pframe, struct pkt_attrib *pattrib)
+u8 *rtw_tdls_set_sup_ch(_adapter *adapter, u8 *pframe, struct pkt_attrib *pattrib)
 {
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
 	u8 sup_ch[30 * 2] = {0x00}, ch_set_idx = 0, sup_ch_idx = 2;
 
-	do {
-		if (pmlmeext->channel_set[ch_set_idx].ChannelNum <= 14) {
+	while (ch_set_idx < rfctl->max_chan_nums && rfctl->channel_set[ch_set_idx].ChannelNum != 0) {
+		if (rfctl->channel_set[ch_set_idx].ChannelNum <= 14) {
+			/* TODO: fix 2.4G supported channel when channel doesn't start from 1 and continuous */
 			sup_ch[0] = 1;	/* First channel number */
-			sup_ch[1] = pmlmeext->channel_set[ch_set_idx].ChannelNum;	/* Number of channel */
+			sup_ch[1] = rfctl->channel_set[ch_set_idx].ChannelNum;	/* Number of channel */
 		} else {
-			sup_ch[sup_ch_idx++] = pmlmeext->channel_set[ch_set_idx].ChannelNum;
+			sup_ch[sup_ch_idx++] = rfctl->channel_set[ch_set_idx].ChannelNum;
 			sup_ch[sup_ch_idx++] = 1;
 		}
 		ch_set_idx++;
-	} while (pmlmeext->channel_set[ch_set_idx].ChannelNum != 0 && ch_set_idx < MAX_CHANNEL_NUM);
+	}
 
 	return rtw_set_ie(pframe, _SUPPORTED_CH_IE_, sup_ch_idx, sup_ch, &(pattrib->pktlen));
 }
@@ -2642,6 +2631,7 @@ void wfd_ie_tdls(_adapter *padapter, u8 *pframe, u32 *pktlen)
 
 void rtw_build_tdls_setup_req_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt)
 {
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 	struct registry_priv	*pregistrypriv = &padapter->registrypriv;
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
 	struct pkt_attrib	*pattrib = &pxmitframe->attrib;
@@ -2668,7 +2658,7 @@ void rtw_build_tdls_setup_req_ies(_adapter *padapter, struct xmit_frame *pxmitfr
 
 	pframe = rtw_tdls_set_capability(padapter, pframe, pattrib);
 	pframe = rtw_tdls_set_supported_rate(padapter, pframe, pattrib);
-	pframe = rtw_tdls_set_sup_ch(&(padapter->mlmeextpriv), pframe, pattrib);
+	pframe = rtw_tdls_set_sup_ch(padapter, pframe, pattrib);
 	pframe = rtw_tdls_set_sup_reg_class(pframe, pattrib);
 
 	if (pattrib->encrypt)
@@ -2703,7 +2693,7 @@ void rtw_build_tdls_setup_req_ies(_adapter *padapter, struct xmit_frame *pxmitfr
 	if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) && (pmlmeext->cur_channel > 14)
 	    && REGSTY_IS_11AC_ENABLE(pregistrypriv)
 	    && hal_chk_proto_cap(padapter, PROTO_CAP_11AC)
-	    && (!padapter->mlmepriv.country_ent || COUNTRY_CHPLAN_EN_11AC(padapter->mlmepriv.country_ent))
+	    && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent))
 	   ) {
 		pframe = rtw_tdls_set_aid(padapter, pframe, pattrib);
 		pframe = rtw_tdls_set_vht_cap(padapter, pframe, pattrib);
@@ -2719,6 +2709,7 @@ void rtw_build_tdls_setup_req_ies(_adapter *padapter, struct xmit_frame *pxmitfr
 
 void rtw_build_tdls_setup_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt)
 {
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 	struct registry_priv	*pregistrypriv = &padapter->registrypriv;
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
 	struct pkt_attrib	*pattrib = &pxmitframe->attrib;
@@ -2755,7 +2746,7 @@ void rtw_build_tdls_setup_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitfr
 	pframe = rtw_tdls_set_dialog(pframe, pattrib, ptxmgmt);
 	pframe = rtw_tdls_set_capability(padapter, pframe, pattrib);
 	pframe = rtw_tdls_set_supported_rate(padapter, pframe, pattrib);
-	pframe = rtw_tdls_set_sup_ch(&(padapter->mlmeextpriv), pframe, pattrib);
+	pframe = rtw_tdls_set_sup_ch(padapter, pframe, pattrib);
 	pframe = rtw_tdls_set_sup_reg_class(pframe, pattrib);
 
 	if (pattrib->encrypt) {
@@ -2803,7 +2794,7 @@ void rtw_build_tdls_setup_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitfr
 	if ((padapter->mlmepriv.htpriv.ht_option == _TRUE) && (pmlmeext->cur_channel > 14)
 	    && REGSTY_IS_11AC_ENABLE(pregistrypriv)
 	    && hal_chk_proto_cap(padapter, PROTO_CAP_11AC)
-	    && (!padapter->mlmepriv.country_ent || COUNTRY_CHPLAN_EN_11AC(padapter->mlmepriv.country_ent))
+	    && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent))
 	   ) {
 		pframe = rtw_tdls_set_aid(padapter, pframe, pattrib);
 		pframe = rtw_tdls_set_vht_cap(padapter, pframe, pattrib);
@@ -2820,6 +2811,7 @@ void rtw_build_tdls_setup_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitfr
 
 void rtw_build_tdls_setup_cfm_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt)
 {
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 	struct registry_priv	*pregistrypriv = &padapter->registrypriv;
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
@@ -2880,7 +2872,7 @@ void rtw_build_tdls_setup_cfm_ies(_adapter *padapter, struct xmit_frame *pxmitfr
 	    && (ptdls_sta->vhtpriv.vht_option == _TRUE) && (pmlmeext->cur_channel > 14)
 	    && REGSTY_IS_11AC_ENABLE(pregistrypriv)
 	    && hal_chk_proto_cap(padapter, PROTO_CAP_11AC)
-	    && (!padapter->mlmepriv.country_ent || COUNTRY_CHPLAN_EN_11AC(padapter->mlmepriv.country_ent))
+	    && (!rfctl->country_ent || COUNTRY_CHPLAN_EN_11AC(rfctl->country_ent))
 	   ) {
 		pframe = rtw_tdls_set_vht_operation(padapter, pframe, pattrib, pmlmeext->cur_channel);
 		pframe = rtw_tdls_set_vht_op_mode_notify(padapter, pframe, pattrib, pmlmeext->cur_bwmode);
@@ -2948,7 +2940,7 @@ void rtw_build_tdls_dis_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitfram
 
 	pframe = rtw_tdls_set_supported_rate(padapter, pframe, pattrib);
 
-	pframe = rtw_tdls_set_sup_ch(pmlmeext, pframe, pattrib);
+	pframe = rtw_tdls_set_sup_ch(padapter, pframe, pattrib);
 
 	if (privacy)
 		pframe = rtw_tdls_set_rsnie(ptxmgmt, pframe, pattrib, _TRUE, NULL);
@@ -3246,15 +3238,15 @@ void _tdls_pti_timer_hdl(void *FunctionContext)
 void rtw_init_tdls_timer(_adapter *padapter, struct sta_info *psta)
 {
 	psta->padapter = padapter;
-	_init_timer(&psta->TPK_timer, padapter->pnetdev, _tdls_tpk_timer_hdl, psta);
+	rtw_init_timer(&psta->TPK_timer, padapter, _tdls_tpk_timer_hdl, psta);
 #ifdef CONFIG_TDLS_CH_SW
-	_init_timer(&psta->ch_sw_timer, padapter->pnetdev, _tdls_ch_switch_timer_hdl, psta);
-	_init_timer(&psta->delay_timer, padapter->pnetdev, _tdls_delay_timer_hdl, psta);
-	_init_timer(&psta->stay_on_base_chnl_timer, padapter->pnetdev, _tdls_stay_on_base_chnl_timer_hdl, psta);
-	_init_timer(&psta->ch_sw_monitor_timer, padapter->pnetdev, _tdls_ch_switch_monitor_timer_hdl, psta);
+	rtw_init_timer(&psta->ch_sw_timer, padapter, _tdls_ch_switch_timer_hdl, psta);
+	rtw_init_timer(&psta->delay_timer, padapter, _tdls_delay_timer_hdl, psta);
+	rtw_init_timer(&psta->stay_on_base_chnl_timer, padapter, _tdls_stay_on_base_chnl_timer_hdl, psta);
+	rtw_init_timer(&psta->ch_sw_monitor_timer, padapter, _tdls_ch_switch_monitor_timer_hdl, psta);
 #endif
-	_init_timer(&psta->handshake_timer, padapter->pnetdev, _tdls_handshake_timer_hdl, psta);
-	_init_timer(&psta->pti_timer, padapter->pnetdev, _tdls_pti_timer_hdl, psta);
+	rtw_init_timer(&psta->handshake_timer, padapter, _tdls_handshake_timer_hdl, psta);
+	rtw_init_timer(&psta->pti_timer, padapter, _tdls_pti_timer_hdl, psta);
 }
 
 void rtw_free_tdls_timer(struct sta_info *psta)
diff --git a/rtl8822BU/core/rtw_vht.c b/rtl8822BU/core/rtw_vht.c
index b467bea..bff68c1 100755..100644
--- a/rtl8822BU/core/rtw_vht.c
+++ b/rtl8822BU/core/rtw_vht.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,15 +11,11 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_VHT_C
 
 #include <drv_types.h>
+#include <hal_data.h>
 
 #ifdef CONFIG_80211AC_VHT
 /*				20/40/80,	ShortGI,	MCS Rate  */
@@ -101,7 +97,7 @@ u8	rtw_vht_mcsmap_to_nss(u8 *pvht_mcs_map)
 	return nss;
 }
 
-void	rtw_vht_nss_to_mcsmap(u8 nss, u8 *target_mcs_map, u8 *cur_mcs_map)
+void rtw_vht_nss_to_mcsmap(u8 nss, u8 *target_mcs_map, u8 *cur_mcs_map)
 {
 	u8	i, j;
 	u8	cur_rate, target_rate;
@@ -143,6 +139,8 @@ void	rtw_vht_use_default_setting(_adapter *padapter)
 	u8	mu_bfer, mu_bfee;
 #endif /* CONFIG_BEAMFORMING */
 	u8	rf_type = 0;
+	u8 tx_nss, rx_nss;
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	pvhtpriv->sgi_80m = TEST_FLAG(pregistrypriv->short_gi, BIT2) ? _TRUE : _FALSE;
@@ -224,67 +222,43 @@ void	rtw_vht_use_default_setting(_adapter *padapter)
 	pvhtpriv->ampdu_len = pregistrypriv->ampdu_factor;
 
 	rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+	tx_nss = rtw_min(rf_type_to_rf_tx_cnt(rf_type), hal_spec->tx_nss_num);
+	rx_nss = rtw_min(rf_type_to_rf_rx_cnt(rf_type), hal_spec->rx_nss_num);
 
-	if (rf_type == RF_3T3R)
-		pvhtpriv->vht_mcs_map[0] = 0xea;	/* support 1SS MCS 0~9 2SS MCS 0~9 3SS MCS 0~9 */
-	else if (rf_type == RF_2T2R)
-		pvhtpriv->vht_mcs_map[0] = 0xfa;	/* support 1SS MCS 0~9 2SS MCS 0~9 */
-	else
-		pvhtpriv->vht_mcs_map[0] = 0xfe;	/* Only support 1SS MCS 0~9; */
-	pvhtpriv->vht_mcs_map[1] = 0xff;
-
-	if (pregistrypriv->vht_rate_sel == 1) {
-		pvhtpriv->vht_mcs_map[0] = 0xfc;	/* support 1SS MCS 0~7 */
-	} else if (pregistrypriv->vht_rate_sel == 2) {
-		pvhtpriv->vht_mcs_map[0] = 0xfd;	/* Support 1SS MCS 0~8 */
-	} else if (pregistrypriv->vht_rate_sel == 3) {
-		pvhtpriv->vht_mcs_map[0] = 0xfe;	/* Support 1SS MCS 0~9 */
-	} else if (pregistrypriv->vht_rate_sel == 4) {
-		pvhtpriv->vht_mcs_map[0] = 0xf0;	/* support 1SS MCS 0~7 2SS MCS 0~7 */
-	} else if (pregistrypriv->vht_rate_sel == 5) {
-		pvhtpriv->vht_mcs_map[0] = 0xf5;	/* support 1SS MCS 0~8 2SS MCS 0~8 */
-	} else if (pregistrypriv->vht_rate_sel == 6) {
-		pvhtpriv->vht_mcs_map[0] = 0xfa;	/* support 1SS MCS 0~9 2SS MCS 0~9 */
-	} else if (pregistrypriv->vht_rate_sel == 7) {
-		pvhtpriv->vht_mcs_map[0] = 0xf8;	/* support 1SS MCS 0-7 2SS MCS 0~9 */
-	} else if (pregistrypriv->vht_rate_sel == 8) {
-		pvhtpriv->vht_mcs_map[0] = 0xf9;	/* support 1SS MCS 0-8 2SS MCS 0~9 */
-	} else if (pregistrypriv->vht_rate_sel == 9) {
-		pvhtpriv->vht_mcs_map[0] = 0xf4;	/* support 1SS MCS 0-7 2SS MCS 0~8 */
-	}
-
+	/* for now, vhtpriv.vht_mcs_map comes from RX NSS */
+	rtw_vht_nss_to_mcsmap(rx_nss, pvhtpriv->vht_mcs_map, pregistrypriv->vht_rx_mcs_map);
 	pvhtpriv->vht_highest_rate = rtw_get_vht_highest_rate(pvhtpriv->vht_mcs_map);
 }
 
-u64	rtw_vht_rate_to_bitmap(u8 *pVHTRate)
+u64	rtw_vht_mcs_map_to_bitmap(u8 *mcs_map, u8 nss)
 {
+	u8 i, j, tmp;
+	u64 bitmap = 0;
+	u8 bits_nss = nss * 2;
 
-	u8	i, j , tmpRate;
-	u64	RateBitmap = 0;
-	u8 Bits_3ss = 6;
-
-	for (i = j = 0; i < Bits_3ss; i += 2, j += 10) {
+	for (i = j = 0; i < bits_nss; i += 2, j += 10) {
 		/* every two bits means single sptial stream */
-		tmpRate = (pVHTRate[0] >> i) & 3;
+		tmp = (mcs_map[i / 8] >> i) & 3;
 
-		switch (tmpRate) {
+		switch (tmp) {
 		case 2:
-			RateBitmap = RateBitmap | (0x03ff << j);
+			bitmap = bitmap | (0x03ff << j);
 			break;
 		case 1:
-			RateBitmap = RateBitmap | (0x01ff << j);
+			bitmap = bitmap | (0x01ff << j);
 			break;
-
 		case 0:
-			RateBitmap = RateBitmap | (0x00ff << j);
+			bitmap = bitmap | (0x00ff << j);
 			break;
-
 		default:
 			break;
 		}
 	}
-	RTW_INFO("RateBitmap=%016llx , pVHTRate[0]=%02x, pVHTRate[1]=%02x\n", RateBitmap, pVHTRate[0], pVHTRate[1]);
-	return RateBitmap;
+
+	RTW_INFO("vht_mcs_map=%02x %02x, nss=%u => bitmap=%016llx\n"
+		, mcs_map[0], mcs_map[1], nss, bitmap);
+
+	return bitmap;
 }
 
 void	update_sta_vht_info_apmode(_adapter *padapter, PVOID sta)
@@ -362,9 +336,7 @@ void	update_sta_vht_info_apmode(_adapter *padapter, PVOID sta)
 
 	pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pvhtpriv_sta->vht_cap);
 	_rtw_memcpy(pvhtpriv_sta->vht_mcs_map, pcap_mcs, 2);
-
 	pvhtpriv_sta->vht_highest_rate = rtw_get_vht_highest_rate(pvhtpriv_sta->vht_mcs_map);
-
 }
 
 void	update_hw_vht_param(_adapter *padapter)
@@ -383,14 +355,14 @@ void	update_hw_vht_param(_adapter *padapter)
 
 void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
 {
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
 	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
 	struct vht_priv		*pvhtpriv = &pmlmepriv->vhtpriv;
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
-	u8	cur_ldpc_cap = 0, cur_stbc_cap = 0, rf_type = RF_1T1R;
+	u8	cur_ldpc_cap = 0, cur_stbc_cap = 0, rf_type = RF_1T1R, tx_nss = 0;
 	u16	cur_beamform_cap = 0;
 	u8	*pcap_mcs;
-	u8	vht_mcs[2];
 
 	if (pIE == NULL)
 		return;
@@ -489,18 +461,9 @@ void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
 	pvhtpriv->ampdu_len = GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pIE->data);
 
 	pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pIE->data);
-	_rtw_memcpy(vht_mcs, pcap_mcs, 2);
-
 	rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
-	if ((rf_type == RF_1T1R) || (rf_type == RF_1T2R))
-		vht_mcs[0] |= 0xfc;
-	else if (rf_type == RF_2T2R)
-		vht_mcs[0] |= 0xf0;
-	else if (rf_type == RF_3T3R)
-		vht_mcs[0] |= 0xc0;
-
-	_rtw_memcpy(pvhtpriv->vht_mcs_map, vht_mcs, 2);
-
+	tx_nss = rtw_min(rf_type_to_rf_tx_cnt(rf_type), hal_spec->tx_nss_num);
+	rtw_vht_nss_to_mcsmap(tx_nss, pvhtpriv->vht_mcs_map, pcap_mcs);
 	pvhtpriv->vht_highest_rate = rtw_get_vht_highest_rate(pvhtpriv->vht_mcs_map);
 }
 
@@ -526,7 +489,6 @@ void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, PVOID sta)
 	u8	target_bw;
 	u8	target_rxss, current_rxss;
 	u8	update_ra = _FALSE;
-	u8	vht_mcs_map[2] = {};
 
 	if (pvhtpriv->vht_option == _FALSE)
 		return;
@@ -545,6 +507,8 @@ void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, PVOID sta)
 
 	current_rxss = rtw_vht_mcsmap_to_nss(psta->vhtpriv.vht_mcs_map);
 	if (target_rxss != current_rxss) {
+		u8	vht_mcs_map[2] = {};
+
 		update_ra = _TRUE;
 
 		rtw_vht_nss_to_mcsmap(target_rxss, vht_mcs_map, psta->vhtpriv.vht_mcs_map);
@@ -563,12 +527,10 @@ u32	rtw_build_vht_operation_ie(_adapter *padapter, u8 *pbuf, u8 channel)
 	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
 	struct vht_priv		*pvhtpriv = &pmlmepriv->vhtpriv;
 	/* struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv; */
-	u8	ChnlWidth, center_freq, bw_mode, rf_type = 0;
+	u8	ChnlWidth, center_freq, bw_mode;
 	u32	len = 0;
 	u8	operation[5];
 
-	rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
-
 	_rtw_memset(operation, 0, 5);
 
 	bw_mode = REGSTY_BW_5G(pregistrypriv); /* TODO: control op bw with other info */
@@ -589,34 +551,7 @@ u32	rtw_build_vht_operation_ie(_adapter *padapter, u8 *pbuf, u8 channel)
 	SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(operation, center_freq);/* Todo: need to set correct center channel */
 	SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(operation, 0);
 
-	if (padapter->registrypriv.rf_config != RF_MAX_TYPE)
-		rf_type = padapter->registrypriv.rf_config;
-
-	switch (rf_type) {
-	case RF_1T1R:
-		operation[3] = 0xfe;
-		operation[4] = 0xff;
-		break;
-	case RF_1T2R:
-	case RF_2T2R:
-	case RF_2T2R_GREEN:
-		operation[3] = 0xfa;
-		operation[4] = 0xff;
-		break;
-	case RF_2T3R:
-	case RF_2T4R:
-	case RF_3T3R:
-	case RF_3T4R:
-		operation[3] = 0xea;
-		operation[4] = 0xff;
-		break;
-	case RF_4T4R:
-		operation[3] = 0xaa;
-		operation[4] = 0xff;
-		break;
-	default:
-		RTW_INFO("%s, %d, unknown rf type\n", __func__, __LINE__);
-	}
+	_rtw_memcpy(operation + 3, pvhtpriv->vht_mcs_map, 2);
 
 	rtw_set_ie(pbuf, EID_VHTOperation, 5, operation, &len);
 
@@ -629,18 +564,11 @@ u32	rtw_build_vht_op_mode_notify_ie(_adapter *padapter, u8 *pbuf, u8 bw)
 	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
 	struct vht_priv	*pvhtpriv = &pmlmepriv->vhtpriv;
 	u32	len = 0;
-	u8	opmode = 0, rf_type = 0;
+	u8	opmode = 0;
 	u8	chnl_width, rx_nss;
 
 	chnl_width = bw;
-
-	rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
-	if (rf_type == RF_3T3R)
-		rx_nss = 3;
-	else if (rf_type == RF_2T2R)
-		rx_nss = 2;
-	else
-		rx_nss = 1;
+	rx_nss = rtw_vht_mcsmap_to_nss(pvhtpriv->vht_mcs_map);
 
 	SET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(&opmode, chnl_width);
 	SET_VHT_OPERATING_MODE_FIELD_RX_NSS(&opmode, (rx_nss - 1));
@@ -663,6 +591,8 @@ u32	rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf)
 	struct registry_priv *pregistrypriv = &padapter->registrypriv;
 	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
 	struct vht_priv	*pvhtpriv = &pmlmepriv->vhtpriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 
 	pcap = pvhtpriv->vht_cap;
 	_rtw_memset(pcap, 0, 32);
@@ -740,8 +670,15 @@ u32	rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf)
 	if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) {
 		SET_VHT_CAPABILITY_ELE_SU_BFEE(pcap, 1);
 		RTW_INFO("[VHT] Declare supporting SU Bfee\n");
-		/* B13 14 15 Compressed Steering Number of Beamformer Antennas Supported */
+
 		rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMEE_CAP, (u8 *)&rf_num);
+
+		/* IOT action suggested by Yu Chen 2017/3/3 */
+		if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_BROADCOM) &&
+			!GET_VHT_CAPABILITY_ELE_MU_BFER(&pvhtpriv->beamform_cap))
+			rf_num = (rf_num >= 2 ? 2 : rf_num);
+
+		/* B13 14 15 Compressed Steering Number of Beamformer Antennas Supported */
 		SET_VHT_CAPABILITY_ELE_BFER_ANT_SUPP(pcap, rf_num);
 		/* B20 SU Beamformee Capable */
 		if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE)) {
diff --git a/rtl8822BU/core/rtw_wapi.c b/rtl8822BU/core/rtw_wapi.c
index d23ed26..3143b62 100755..100644
--- a/rtl8822BU/core/rtw_wapi.c
+++ b/rtl8822BU/core/rtw_wapi.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifdef CONFIG_WAPI_SUPPORT
 
 #include <linux/unistd.h>
diff --git a/rtl8822BU/core/rtw_wapi_sms4.c b/rtl8822BU/core/rtw_wapi_sms4.c
index fc01212..4b7cf95 100755..100644
--- a/rtl8822BU/core/rtw_wapi_sms4.c
+++ b/rtl8822BU/core/rtw_wapi_sms4.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifdef CONFIG_WAPI_SUPPORT
 
 #include <linux/unistd.h>
diff --git a/rtl8822BU/core/rtw_wlan_util.c b/rtl8822BU/core/rtw_wlan_util.c
index ab1b5af..9178343 100755..100644
--- a/rtl8822BU/core/rtw_wlan_util.c
+++ b/rtl8822BU/core/rtw_wlan_util.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,21 +11,19 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_WLAN_UTIL_C_
 
 #include <drv_types.h>
+#include <hal_data.h>
 
 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
 	#include <linux/inetdevice.h>
 	#define ETH_TYPE_OFFSET	12
 	#define PROTOCOL_OFFSET	23
 	#define IP_OFFSET	30
+	#define IPv6_OFFSET	38
+	#define IPv6_PROTOCOL_OFFSET	20
 #endif
 
 unsigned char ARTHEROS_OUI1[] = {0x00, 0x03, 0x7f};
@@ -106,78 +104,30 @@ int cckratesonly_included(unsigned char *rate, int ratelen)
 #ifdef CONFIG_GET_RAID_BY_DRV
 s8 rtw_get_tx_nss(_adapter *adapter, struct sta_info *psta)
 {
-	u8 rf_type = RF_1T1R, custom_rf_type, vht_mcs[2];
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
+	u8 rf_type = RF_1T1R, custom_rf_type;
 	s8 nss = 1;
 
-	custom_rf_type = adapter->registrypriv.rf_config;
-	rtw_hal_get_hwreg(adapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
-
 	if (!psta)
 		return nss;
 
-	/* rf_config is dependent on efuse or sw config */
-	if (custom_rf_type != RF_MAX_TYPE)
+	custom_rf_type = adapter->registrypriv.rf_config;
+	rtw_hal_get_hwreg(adapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+	if (RF_TYPE_VALID(custom_rf_type))
 		rf_type = custom_rf_type;
 
 #ifdef CONFIG_80211AC_VHT
 	if (psta->vhtpriv.vht_option) {
-		u8 vht_mcs[2];
-		struct mlme_priv	*pmlmepriv = &(adapter->mlmepriv);
-		struct vht_priv	*pvhtpriv_ap = &pmlmepriv->vhtpriv;
-
-		_rtw_memcpy(vht_mcs, psta->vhtpriv.vht_mcs_map, 2);
-		/* doesn't support 5~8 SS so far */
-		vht_mcs[1] = 0xff;
-		switch (rf_type) {
-		case RF_1T1R:
-		case RF_1T2R:
-			vht_mcs[0] |= 0xfc;
-			break;
-		case RF_2T2R:
-		case RF_2T4R:
-		case RF_2T2R_GREEN:
-		case RF_2T3R:
-			vht_mcs[0] |= 0xf0;
-			break;
-		case RF_3T3R:
-		case RF_3T4R:
-			vht_mcs[0] |= 0xc0;
-			break;
-		default:
-			RTW_INFO("%s,%d, unknown rf type\n", __func__, __LINE__);
-			break;
-		}
-		nss = rtw_vht_mcsmap_to_nss(vht_mcs);
+		nss = rtw_min(rf_type_to_rf_tx_cnt(rf_type), hal_spec->tx_nss_num);
+		nss = rtw_min(nss, rtw_vht_mcsmap_to_nss(psta->vhtpriv.vht_mcs_map));
 	} else
 #endif /* CONFIG_80211AC_VHT */
-		if (psta->htpriv.ht_option) {
-			u8 supp_mcs_set[4];
-
-			_rtw_memcpy(supp_mcs_set, psta->htpriv.ht_cap.supp_mcs_set, 4);
-
-			switch (rf_type) {
-			case RF_1T1R:
-			case RF_1T2R:
-				supp_mcs_set[1] = supp_mcs_set[2] = supp_mcs_set[3] = 0;
-				break;
-			case RF_2T2R:
-			case RF_2T4R:
-			case RF_2T2R_GREEN:
-			case RF_2T3R:
-				supp_mcs_set[2] = supp_mcs_set[3] = 0;
-				break;
-			case RF_3T3R:
-			case RF_3T4R:
-				supp_mcs_set[3] = 0;
-				break;
-			default:
-				RTW_INFO("%s,%d, unknown rf type\n", __func__, __LINE__);
-				break;
-			}
-			nss = rtw_ht_mcsset_to_nss(supp_mcs_set);
-		}
+	if (psta->htpriv.ht_option) {
+		nss = rtw_min(rf_type_to_rf_tx_cnt(rf_type), hal_spec->tx_nss_num);
+		nss = rtw_min(nss, rtw_ht_mcsset_to_nss(psta->htpriv.ht_cap.supp_mcs_set));
+	}
 
-	RTW_INFO("%s: %d SS, rf_type=%d\n", __func__, nss, rf_type);
+	RTW_INFO("%s: %d SS\n", __func__, nss);
 	return nss;
 }
 
@@ -795,9 +745,6 @@ void set_channel_bwmode(_adapter *padapter, unsigned char channel, unsigned char
 		bool ori_overlap_radar_detect_ch = rtw_rfctl_overlap_radar_detect_ch(rfctl);
 		bool new_overlap_radar_detect_ch = _rtw_rfctl_overlap_radar_detect_ch(rfctl, channel, bwmode, channel_offset);
 
-		if (new_overlap_radar_detect_ch)
-			rtw_odm_radar_detect_enable(padapter);
-
 		if (new_overlap_radar_detect_ch && IS_CH_WAITING(rfctl)) {
 			u8 pause = 0xFF;
 
@@ -831,7 +778,9 @@ void set_channel_bwmode(_adapter *padapter, unsigned char channel, unsigned char
 #endif
 
 #ifdef CONFIG_DFS_MASTER
-		if (ori_overlap_radar_detect_ch && !new_overlap_radar_detect_ch) {
+		if (new_overlap_radar_detect_ch)
+			rtw_odm_radar_detect_enable(padapter);
+		else if (ori_overlap_radar_detect_ch) {
 			u8 pause = 0x00;
 
 			rtw_odm_radar_detect_disable(padapter);
@@ -1963,12 +1912,13 @@ void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
 	unsigned int	i;
 	u8	rf_type = RF_1T1R;
 	u8	max_AMPDU_len, min_MPDU_spacing;
-	u8	cur_ldpc_cap = 0, cur_stbc_cap = 0, cur_beamform_cap = 0;
+	u8	cur_ldpc_cap = 0, cur_stbc_cap = 0, cur_beamform_cap = 0, tx_nss = 0;
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
 	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
 	struct ht_priv			*phtpriv = &pmlmepriv->htpriv;
 	struct registry_priv	*pregistrypriv = &padapter->registrypriv;
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
 
 	if (pIE == NULL)
 		return;
@@ -2008,34 +1958,33 @@ void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
 	pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info = le16_to_cpu(pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info);
 	pmlmeinfo->HT_caps.u.HT_cap_element.HT_ext_caps = le16_to_cpu(pmlmeinfo->HT_caps.u.HT_cap_element.HT_ext_caps);
 
-	rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
-
-
 	/* update the MCS set */
 	for (i = 0; i < 16; i++)
 		pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= pmlmeext->default_supported_mcs_set[i];
 
-	/* update the MCS rates */
-	switch (rf_type) {
-	case RF_1T1R:
-	case RF_1T2R:
+	rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+	tx_nss = rtw_min(rf_type_to_rf_tx_cnt(rf_type), hal_spec->tx_nss_num);
+
+	switch (tx_nss) {
+	case 1:
 		set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_1R);
 		break;
-	case RF_2T2R:
-#ifdef CONFIG_DISABLE_MCS13TO15
+	case 2:
+		#ifdef CONFIG_DISABLE_MCS13TO15
 		if (pmlmeext->cur_bwmode == CHANNEL_WIDTH_40 && pregistrypriv->wifi_spec != 1)
 			set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R_13TO15_OFF);
 		else
+		#endif
 			set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R);
-#else /* CONFIG_DISABLE_MCS13TO15 */
-		set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R);
-#endif /* CONFIG_DISABLE_MCS13TO15 */
 		break;
-	case RF_3T3R:
+	case 3:
 		set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_3R);
 		break;
+	case 4:
+		set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_4R);
+		break;
 	default:
-		RTW_INFO("[warning] rf_type %d is not expected\n", rf_type);
+		RTW_WARN("rf_type:%d or tx_nss:%u is not expected\n", rf_type, hal_spec->tx_nss_num);
 	}
 
 	if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) {
@@ -2306,6 +2255,49 @@ void	update_ldpc_stbc_cap(struct sta_info *psta)
 #endif /* CONFIG_80211N_HT */
 }
 
+int check_ielen(u8 *start, uint len)
+{
+	int left = len;
+	u8 *pos = start;
+	int unknown = 0;
+	u8 id, elen;
+
+	while (left >= 2) {
+		id = *pos++;
+		elen = *pos++;
+		left -= 2;
+
+		if (elen > left) {
+			RTW_INFO("IEEE 802.11 element parse failed (id=%d elen=%d left=%lu)\n",
+					id, elen, (unsigned long) left);
+			return _FALSE;
+		}
+		if ((id == WLAN_EID_VENDOR_SPECIFIC) && (elen < 4))
+				return _FALSE;
+
+		left -= elen;
+		pos += elen;
+	}
+	if (left)
+		return _FALSE;
+
+	return _TRUE;
+}
+
+int validate_beacon_len(u8 *pframe, u32 len)
+{
+	u8 ie_offset = _BEACON_IE_OFFSET_ + sizeof(struct rtw_ieee80211_hdr_3addr);
+
+	if (len < ie_offset) {
+		RTW_INFO("%s: incorrect beacon length(%d)\n", __func__, len);
+		return _FALSE;
+	}
+
+	if (check_ielen(pframe + ie_offset, len - ie_offset) == _FALSE)
+		return _FALSE;
+
+	return _TRUE;
+}
 
 /*
  * rtw_get_bcn_keys: get beacon keys from recv frame
@@ -2976,15 +2968,6 @@ unsigned int update_supported_rate(unsigned char *ptn, unsigned int ptn_sz)
 	return mask;
 }
 
-unsigned int update_MCS_rate(struct HT_caps_element *pHT_caps)
-{
-	unsigned int mask = 0;
-
-	mask = ((pHT_caps->u.HT_cap_element.MCS_rate[0] << 12) | (pHT_caps->u.HT_cap_element.MCS_rate[1] << 20));
-
-	return mask;
-}
-
 int support_short_GI(_adapter *padapter, struct HT_caps_element *pHT_caps, u8 bwmode)
 {
 	unsigned char					bit_offset;
@@ -3017,30 +3000,15 @@ unsigned char get_highest_rate_idx(u32 mask)
 	return rate_idx;
 }
 
-unsigned char get_highest_mcs_rate(struct HT_caps_element *pHT_caps);
-unsigned char get_highest_mcs_rate(struct HT_caps_element *pHT_caps)
-{
-	int i, mcs_rate;
-
-	mcs_rate = (pHT_caps->u.HT_cap_element.MCS_rate[0] | (pHT_caps->u.HT_cap_element.MCS_rate[1] << 8));
-
-	for (i = 15; i >= 0; i--) {
-		if (mcs_rate & (0x1 << i))
-			break;
-	}
-
-	return i;
-}
-
 void Update_RA_Entry(_adapter *padapter, struct sta_info *psta)
 {
-	rtw_hal_update_ra_mask(psta, psta->rssi_level);
+	rtw_hal_update_ra_mask(psta, psta->rssi_level, _TRUE);
 }
 
 void set_sta_rate(_adapter *padapter, struct sta_info *psta)
 {
 	/* rate adaptive	 */
-	rtw_hal_update_ra_mask(psta, psta->rssi_level);
+	rtw_hal_update_ra_mask(psta, psta->rssi_level, _TRUE);
 }
 
 /* Update RRSR and Rate for USERATE */
@@ -3273,10 +3241,14 @@ void update_wireless_mode(_adapter *padapter)
 	rtw_hal_set_hwreg(padapter, HW_VAR_WIRELESS_MODE, (u8 *)&(pmlmeext->cur_wireless_mode));
 
 	if ((pmlmeext->cur_wireless_mode & WIRELESS_11B)
-#ifdef CONFIG_P2P
-	    && rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)
-#endif /* CONFIG_P2P */
-	   )
+		#ifdef CONFIG_P2P
+		&& (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)
+			#ifdef CONFIG_IOCTL_CFG80211
+			|| !rtw_cfg80211_iface_has_p2p_group_cap(padapter)
+			#endif
+			)
+		#endif
+	)
 		update_mgnt_tx_rate(padapter, IEEE80211_CCK_RATE_1MB);
 	else
 		update_mgnt_tx_rate(padapter, IEEE80211_OFDM_RATE_6MB);
@@ -3379,7 +3351,12 @@ void process_addba_req(_adapter *padapter, u8 *paddba_req, u8 *addr)
 
 
 	accept = rtw_rx_ampdu_is_accept(padapter);
-	size = rtw_rx_ampdu_size(padapter);
+	if (padapter->fix_rx_ampdu_size != RX_AMPDU_SIZE_INVALID)
+		size = padapter->fix_rx_ampdu_size;
+	else {
+		size = rtw_rx_ampdu_size(padapter);
+		size = rtw_min(size, rx_ampdu_size_sta_limit(padapter, psta));
+	}
 
 	if (accept == _TRUE)
 		rtw_addbarsp_cmd(padapter, addr, tid, 0, size, start_seq);
@@ -4039,31 +4016,38 @@ _adapter *dvobj_get_port0_adapter(struct dvobj_priv *dvobj)
 	return port0_iface;
 }
 
-#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
-void rtw_get_current_ip_address(PADAPTER padapter, u8 *pcurrentip)
+_adapter *dvobj_get_unregisterd_adapter(struct dvobj_priv *dvobj)
 {
-	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
-	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
-	struct in_device *my_ip_ptr = padapter->pnetdev->ip_ptr;
-	u8 ipaddress[4];
-
-	if ((pmlmeinfo->state & WIFI_FW_LINKING_STATE) ||
-	    pmlmeinfo->state & WIFI_FW_AP_STATE) {
-		if (my_ip_ptr != NULL) {
-			struct in_ifaddr *my_ifa_list  = my_ip_ptr->ifa_list ;
-			if (my_ifa_list != NULL) {
-				ipaddress[0] = my_ifa_list->ifa_address & 0xFF;
-				ipaddress[1] = (my_ifa_list->ifa_address >> 8) & 0xFF;
-				ipaddress[2] = (my_ifa_list->ifa_address >> 16) & 0xFF;
-				ipaddress[3] = my_ifa_list->ifa_address >> 24;
-				RTW_INFO("%s: %d.%d.%d.%d ==========\n", __func__,
-					ipaddress[0], ipaddress[1], ipaddress[2], ipaddress[3]);
-				_rtw_memcpy(pcurrentip, ipaddress, 4);
-			}
-		}
+	_adapter *adapter = NULL;
+	int i;
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		if (dvobj->padapters[i]->registered == 0)
+			break;
 	}
+
+	if (i < dvobj->iface_nums)
+		adapter = dvobj->padapters[i];
+
+	return adapter;
 }
-#endif
+
+_adapter *dvobj_get_adapter_by_addr(struct dvobj_priv *dvobj, u8 *addr)
+{
+	_adapter *adapter = NULL;
+	int i;
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		if (_rtw_memcmp(dvobj->padapters[i]->mac_addr, addr, ETH_ALEN) == _TRUE)
+			break;
+	}
+
+	if (i < dvobj->iface_nums)
+		adapter = dvobj->padapters[i];
+
+	return adapter;
+}
+
 #ifdef CONFIG_WOWLAN
 bool rtw_wowlan_parser_pattern_cmd(u8 *input, char *pattern,
 				   int *pattern_len, char *bit_mask)
@@ -4159,16 +4143,20 @@ u8 rtw_set_default_pattern(_adapter *adapter)
 {
 	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
 	struct registry_priv *pregistrypriv = &adapter->registrypriv;
+	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
 	u8 index = 0;
-	u8 currentip[4];
 	u8 multicast_addr[3] = {0x01, 0x00, 0x5e};
 	u8 multicast_ip[4] = {0xe0, 0x28, 0x28, 0x2a};
+
 	u8 unicast_mask[5] = {0x3f, 0x70, 0x80, 0xc0, 0x03};
+	u8 icmpv6_mask[7] = {0x00, 0x70, 0x10, 0x00, 0xc0, 0xc0, 0x3f};
 	u8 multicast_mask[5] = {0x07, 0x70, 0x80, 0xc0, 0x03};
+
 	u8 ip_protocol[3] = {0x08, 0x00, 0x45};
-	u8 icmp_protocol[1] = {0x01};
-	u8 tcp_protocol[1] = {0x06};
-	u8 udp_protocol[1] = {0x11};
+	u8 ipv6_protocol[3] = {0x86, 0xdd, 0x60};
+
+	u8 *target = NULL;
 
 	if (pregistrypriv->default_patterns_en == _FALSE)
 		return 0;
@@ -4181,61 +4169,107 @@ u8 rtw_set_default_pattern(_adapter *adapter)
 		pwrpriv->patterns[index].len = 0;
 	}
 
-	rtw_get_current_ip_address(adapter, currentip);
-
 	/*TCP/ICMP unicast*/
 	for (index = 0 ; index < DEFAULT_PATTERN_NUM ; index++) {
 		switch (index) {
 		case 0:
-			_rtw_memcpy(pwrpriv->patterns[index].content,
-				    adapter_mac_addr(adapter),
+			target = pwrpriv->patterns[index].content;
+			_rtw_memcpy(target, adapter_mac_addr(adapter),
 				    ETH_ALEN);
-			_rtw_memcpy(pwrpriv->patterns[index].content + ETH_TYPE_OFFSET,
-				    &ip_protocol, sizeof(ip_protocol));
-			_rtw_memcpy(pwrpriv->patterns[index].content + PROTOCOL_OFFSET,
-				    &tcp_protocol, sizeof(tcp_protocol));
-			_rtw_memcpy(pwrpriv->patterns[index].content + IP_OFFSET,
-				    &currentip, sizeof(currentip));
+
+			target += ETH_TYPE_OFFSET;
+			_rtw_memcpy(target, &ip_protocol,
+				    sizeof(ip_protocol));
+
+			/* TCP */
+			target += (PROTOCOL_OFFSET - ETH_TYPE_OFFSET);
+			_rtw_memset(target, 0x06, 1);
+
+			target += (IP_OFFSET - PROTOCOL_OFFSET);
+
+			_rtw_memcpy(target, pmlmeinfo->ip_addr,
+				    RTW_IP_ADDR_LEN);
+
 			_rtw_memcpy(pwrpriv->patterns[index].mask,
 				    &unicast_mask, sizeof(unicast_mask));
-			pwrpriv->patterns[index].len = IP_OFFSET + sizeof(currentip);
+
+			pwrpriv->patterns[index].len =
+				IP_OFFSET + RTW_IP_ADDR_LEN;
 			break;
 		case 1:
-			_rtw_memcpy(pwrpriv->patterns[index].content,
-				    adapter_mac_addr(adapter),
+			target = pwrpriv->patterns[index].content;
+			_rtw_memcpy(target, adapter_mac_addr(adapter),
 				    ETH_ALEN);
-			_rtw_memcpy(pwrpriv->patterns[index].content + ETH_TYPE_OFFSET,
-				    &ip_protocol, sizeof(ip_protocol));
-			_rtw_memcpy(pwrpriv->patterns[index].content + PROTOCOL_OFFSET,
-				    &icmp_protocol, sizeof(icmp_protocol));
-			_rtw_memcpy(pwrpriv->patterns[index].content + IP_OFFSET,
-				    &currentip, sizeof(currentip));
+
+			target += ETH_TYPE_OFFSET;
+			_rtw_memcpy(target, &ip_protocol, sizeof(ip_protocol));
+
+			/* ICMP */
+			target += (PROTOCOL_OFFSET - ETH_TYPE_OFFSET);
+			_rtw_memset(target, 0x01, 1);
+
+			target += (IP_OFFSET - PROTOCOL_OFFSET);
+			_rtw_memcpy(target, pmlmeinfo->ip_addr,
+				    RTW_IP_ADDR_LEN);
+
 			_rtw_memcpy(pwrpriv->patterns[index].mask,
 				    &unicast_mask, sizeof(unicast_mask));
-			pwrpriv->patterns[index].len = IP_OFFSET + sizeof(currentip);
+			pwrpriv->patterns[index].len =
+
+				IP_OFFSET + RTW_IP_ADDR_LEN;
 			break;
 		case 2:
-			_rtw_memcpy(pwrpriv->patterns[index].content, &multicast_addr,
+			if (pwrpriv->wowlan_ns_offload_en == _TRUE) {
+				target = pwrpriv->patterns[index].content;
+				target += ETH_TYPE_OFFSET;
+
+				_rtw_memcpy(target, &ipv6_protocol,
+					    sizeof(ipv6_protocol));
+
+				/* ICMPv6 */
+				target += (IPv6_PROTOCOL_OFFSET -
+					   ETH_TYPE_OFFSET);
+				_rtw_memset(target, 0x3a, 1);
+
+				target += (IPv6_OFFSET - IPv6_PROTOCOL_OFFSET);
+				_rtw_memcpy(target, pmlmeinfo->ip6_addr,
+					    RTW_IPv6_ADDR_LEN);
+
+				_rtw_memcpy(pwrpriv->patterns[index].mask,
+					    &icmpv6_mask, sizeof(icmpv6_mask));
+				pwrpriv->patterns[index].len =
+					IPv6_OFFSET + RTW_IPv6_ADDR_LEN;
+			}
+			break;
+		case 3:
+			target = pwrpriv->patterns[index].content;
+			_rtw_memcpy(target, &multicast_addr,
 				    sizeof(multicast_addr));
-			_rtw_memcpy(pwrpriv->patterns[index].content + ETH_TYPE_OFFSET,
-				    &ip_protocol, sizeof(ip_protocol));
-			_rtw_memcpy(pwrpriv->patterns[index].content + PROTOCOL_OFFSET,
-				    &udp_protocol, sizeof(udp_protocol));
-			_rtw_memcpy(pwrpriv->patterns[index].content + IP_OFFSET,
-				    &multicast_ip, sizeof(multicast_ip));
+
+			target += ETH_TYPE_OFFSET;
+			_rtw_memcpy(target, &ip_protocol, sizeof(ip_protocol));
+
+			/* UDP */
+			target += (PROTOCOL_OFFSET - ETH_TYPE_OFFSET);
+			_rtw_memset(target, 0x11, 1);
+
+			target += (IP_OFFSET - PROTOCOL_OFFSET);
+			_rtw_memcpy(target, &multicast_ip,
+				    sizeof(multicast_ip));
+
 			_rtw_memcpy(pwrpriv->patterns[index].mask,
 				    &multicast_mask, sizeof(multicast_mask));
+
 			pwrpriv->patterns[index].len =
 				IP_OFFSET + sizeof(multicast_ip);
 			break;
+		default:
+			break;
 		}
 	}
-
 	return index;
 }
 
-
-
 void rtw_dump_priv_pattern(_adapter *adapter, u8 idx)
 {
 	struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
diff --git a/rtl8822BU/core/rtw_xmit.c b/rtl8822BU/core/rtw_xmit.c
index 09e1a20..0112c37 100755..100644
--- a/rtl8822BU/core/rtw_xmit.c
+++ b/rtl8822BU/core/rtw_xmit.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTW_XMIT_C_
 
 #include <drv_types.h>
@@ -59,6 +54,21 @@ void	_rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv)
 
 }
 
+void rtw_init_xmit_block(_adapter *padapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
+
+	_rtw_spinlock_init(&dvobj->xmit_block_lock);
+	dvobj->xmit_block = XMIT_BLOCK_NONE;
+
+}
+void rtw_free_xmit_block(_adapter *padapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
+
+	_rtw_spinlock_free(&dvobj->xmit_block_lock);
+}
+
 s32	_rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter)
 {
 	int i;
@@ -73,7 +83,6 @@ s32	_rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter)
 	_rtw_spinlock_init(&pxmitpriv->lock);
 	_rtw_spinlock_init(&pxmitpriv->lock_sctx);
 	_rtw_init_sema(&pxmitpriv->xmit_sema, 0);
-	_rtw_init_sema(&pxmitpriv->terminate_xmitthread_sema, 0);
 
 	/*
 	Please insert all the queue initializaiton using _rtw_init_queue below
@@ -315,19 +324,19 @@ s32	_rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter)
 #endif
 
 #ifdef CONFIG_TX_AMSDU
-	_init_timer(&(pxmitpriv->amsdu_vo_timer), padapter->pnetdev,
+	rtw_init_timer(&(pxmitpriv->amsdu_vo_timer), padapter,
 		rtw_amsdu_vo_timeout_handler, padapter);
 	pxmitpriv->amsdu_vo_timeout = RTW_AMSDU_TIMER_UNSET;
 
-	_init_timer(&(pxmitpriv->amsdu_vi_timer), padapter->pnetdev,
+	rtw_init_timer(&(pxmitpriv->amsdu_vi_timer), padapter,
 		rtw_amsdu_vi_timeout_handler, padapter);
 	pxmitpriv->amsdu_vi_timeout = RTW_AMSDU_TIMER_UNSET;
 
-        _init_timer(&(pxmitpriv->amsdu_be_timer), padapter->pnetdev,
+	rtw_init_timer(&(pxmitpriv->amsdu_be_timer), padapter,
 		rtw_amsdu_be_timeout_handler, padapter);
 	pxmitpriv->amsdu_be_timeout = RTW_AMSDU_TIMER_UNSET;
 
-	_init_timer(&(pxmitpriv->amsdu_bk_timer), padapter->pnetdev,
+	rtw_init_timer(&(pxmitpriv->amsdu_bk_timer), padapter,
 		rtw_amsdu_bk_timeout_handler, padapter);
 	pxmitpriv->amsdu_bk_timeout = RTW_AMSDU_TIMER_UNSET;
 
@@ -336,6 +345,7 @@ s32	_rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter)
 	pxmitpriv->amsdu_debug_coalesce_one = 0;
 	pxmitpriv->amsdu_debug_coalesce_two = 0;
 #endif
+	rtw_init_xmit_block(padapter);
 	rtw_hal_init_xmit_priv(padapter);
 
 exit:
@@ -349,7 +359,6 @@ void  rtw_mfree_xmit_priv_lock(struct xmit_priv *pxmitpriv)
 {
 	_rtw_spinlock_free(&pxmitpriv->lock);
 	_rtw_free_sema(&pxmitpriv->xmit_sema);
-	_rtw_free_sema(&pxmitpriv->terminate_xmitthread_sema);
 
 	_rtw_spinlock_free(&pxmitpriv->be_pending.lock);
 	_rtw_spinlock_free(&pxmitpriv->bk_pending.lock);
@@ -435,7 +444,7 @@ void _rtw_free_xmit_priv(struct xmit_priv *pxmitpriv)
 #ifdef CONFIG_XMIT_ACK
 	_rtw_mutex_free(&pxmitpriv->ack_tx_mutex);
 #endif
-
+	rtw_free_xmit_block(padapter);
 out:
 	return;
 }
@@ -902,6 +911,17 @@ static void update_attrib_phy_info(_adapter *padapter, struct pkt_attrib *pattri
 		pattrib->ampdu_spacing = padapter->driver_ampdu_spacing;
 	else
 		pattrib->ampdu_spacing = psta->htpriv.rx_ampdu_min_spacing;
+
+	/* check if enable ampdu */
+	if (pattrib->ht_en && psta->htpriv.ampdu_enable) {
+		if (psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority)) {
+			pattrib->ampdu_en = _TRUE;
+			if (psta->htpriv.tx_amsdu_enable == _TRUE)
+				pattrib->amsdu_ampdu_en = _TRUE;
+			else
+				pattrib->amsdu_ampdu_en = _FALSE;
+		}
+	}
 #endif /* CONFIG_80211N_HT */
 	/* if(pattrib->ht_en && psta->htpriv.ampdu_enable) */
 	/* { */
@@ -1771,12 +1791,13 @@ s32 rtw_make_wlanhdr(_adapter *padapter , u8 *hdr, struct pkt_attrib *pattrib)
 				SetSeqNum(hdr, pattrib->seqnum);
 
 #ifdef CONFIG_80211N_HT
+#if 0 /* move into update_attrib_phy_info(). */
 				/* check if enable ampdu */
 				if (pattrib->ht_en && psta->htpriv.ampdu_enable) {
 					if (psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority))
 						pattrib->ampdu_en = _TRUE;
 				}
-
+#endif
 				/* re-check if enable ampdu by BA_starting_seqctrl */
 				if (pattrib->ampdu_en == _TRUE) {
 					u16 tx_seq;
@@ -2165,7 +2186,7 @@ u32 rtw_calculate_wlan_pkt_size_by_attribue(struct pkt_attrib *pattrib)
 s32 check_amsdu(struct xmit_frame *pxmitframe)
 {
 	struct pkt_attrib *pattrib;
-	int ret = _TRUE;
+	s32 ret = _TRUE;
 
 	if (!pxmitframe)
 		ret = _FALSE;
@@ -2192,6 +2213,28 @@ s32 check_amsdu(struct xmit_frame *pxmitframe)
 	return ret;
 }
 
+s32 check_amsdu_tx_support(_adapter *padapter)
+{
+	struct dvobj_priv *pdvobjpriv;
+	int tx_amsdu;
+	int tx_amsdu_rate;
+	int current_tx_rate;
+	s32 ret = _FALSE;
+
+	pdvobjpriv = adapter_to_dvobj(padapter);
+	tx_amsdu = padapter->tx_amsdu;
+	tx_amsdu_rate = padapter->tx_amsdu_rate;
+	current_tx_rate = pdvobjpriv->traffic_stat.cur_tx_tp;
+
+	if (tx_amsdu == 1)
+		ret = _TRUE;
+	else if (tx_amsdu == 2 && (tx_amsdu_rate == 0 || current_tx_rate > tx_amsdu_rate))
+		ret = _TRUE;
+	else
+		ret = _FALSE;
+
+	return ret;
+}
 
 s32 rtw_xmitframe_coalesce_amsdu(_adapter *padapter, struct xmit_frame *pxmitframe, struct xmit_frame *pxmitframe_queue)
 {
@@ -2984,7 +3027,7 @@ struct xmit_frame *__rtw_alloc_cmdxmitframe(struct xmit_priv *pxmitpriv,
 	pcmdframe->buf_addr = pxmitbuf->pbuf;
 
 	/* initial memory to zero */
-	_rtw_memset(pcmdframe->buf_addr, 0, pxmitbuf->alloc_sz);
+	_rtw_memset(pcmdframe->buf_addr, 0, MAX_CMDBUF_SZ);
 
 	pxmitbuf->priv_data = pcmdframe;
 
@@ -5172,6 +5215,9 @@ struct xmit_buf *select_and_dequeue_pending_xmitbuf(_adapter *padapter)
 	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
 	struct xmit_buf *pxmitbuf = NULL;
 
+	if (_TRUE == rtw_is_xmit_blocked(padapter))
+		return pxmitbuf;
+
 	if (rtw_xmit_ac_blocked(padapter) == _TRUE)
 		pxmitbuf = dequeue_pending_xmitbuf_under_survey(pxmitpriv);
 	else {
@@ -5218,12 +5264,74 @@ thread_return rtw_xmit_thread(thread_context context)
 		flush_signals_thread();
 	} while (_SUCCESS == err);
 
-	_rtw_up_sema(&padapter->xmitpriv.terminate_xmitthread_sema);
+	RTW_INFO(FUNC_ADPT_FMT " Exit\n", FUNC_ADPT_ARG(padapter));
+
+	rtw_thread_wait_stop();
 
-	thread_exit();
+	return 0;
 }
 #endif
 
+#ifdef DBG_XMIT_BLOCK
+void dump_xmit_block(void *sel, _adapter *padapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
+
+	RTW_PRINT_SEL(sel, "[XMIT-BLOCK] xmit_block :0x%02x\n", dvobj->xmit_block);
+	if (dvobj->xmit_block & XMIT_BLOCK_REDLMEM)
+		RTW_PRINT_SEL(sel, "Reason:%s\n", "XMIT_BLOCK_REDLMEM");
+	if (dvobj->xmit_block & XMIT_BLOCK_SUSPEND)
+		RTW_PRINT_SEL(sel, "Reason:%s\n", "XMIT_BLOCK_SUSPEND");
+	if (dvobj->xmit_block == XMIT_BLOCK_NONE)
+		RTW_PRINT_SEL(sel, "Reason:%s\n", "XMIT_BLOCK_NONE");
+}
+void dump_xmit_block_info(void *sel, const char *fun_name, _adapter *padapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
+
+	RTW_INFO("\n"ADPT_FMT" call %s\n", ADPT_ARG(padapter), fun_name);
+	dump_xmit_block(sel, padapter);
+}
+#define DBG_XMIT_BLOCK_DUMP(adapter)	dump_xmit_block_info(RTW_DBGDUMP, __func__, adapter)
+#endif
+
+void rtw_set_xmit_block(_adapter *padapter, enum XMIT_BLOCK_REASON reason)
+{
+	_irqL irqL;
+	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
+
+	_enter_critical_bh(&dvobj->xmit_block_lock, &irqL);
+	dvobj->xmit_block |= reason;
+	_exit_critical_bh(&dvobj->xmit_block_lock, &irqL);
+
+	#ifdef DBG_XMIT_BLOCK
+	DBG_XMIT_BLOCK_DUMP(padapter);
+	#endif
+}
+
+void rtw_clr_xmit_block(_adapter *padapter, enum XMIT_BLOCK_REASON reason)
+{
+	_irqL irqL;
+	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
+
+	_enter_critical_bh(&dvobj->xmit_block_lock, &irqL);
+	dvobj->xmit_block &= ~reason;
+	_exit_critical_bh(&dvobj->xmit_block_lock, &irqL);
+
+	#ifdef DBG_XMIT_BLOCK
+	DBG_XMIT_BLOCK_DUMP(padapter);
+	#endif
+}
+bool rtw_is_xmit_blocked(_adapter *padapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
+
+	#ifdef DBG_XMIT_BLOCK
+	DBG_XMIT_BLOCK_DUMP(padapter);
+	#endif
+	return ((dvobj->xmit_block) ? _TRUE : _FALSE);
+}
+
 bool rtw_xmit_ac_blocked(_adapter *adapter)
 {
 	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
@@ -5396,7 +5504,6 @@ void rtw_amsdu_cancel_timer(_adapter *padapter, u8 priority)
 {
 	struct xmit_priv        *pxmitpriv = &padapter->xmitpriv;
 	_timer* amsdu_timer = NULL;
-	u8 cancel;
 
 	switch(priority)
 	{
@@ -5418,7 +5525,7 @@ void rtw_amsdu_cancel_timer(_adapter *padapter, u8 priority)
 			amsdu_timer = &pxmitpriv->amsdu_be_timer;
 			break;
 	}
-	_cancel_timer(amsdu_timer, &cancel);
+	_cancel_timer_ex(amsdu_timer);
 }
 #endif /* CONFIG_TX_AMSDU */
 
diff --git a/rtl8822BU/hal/HalPwrSeqCmd.c b/rtl8822BU/hal/HalPwrSeqCmd.c
index de709b1..6a2f9a6 100755..100644
--- a/rtl8822BU/hal/HalPwrSeqCmd.c
+++ b/rtl8822BU/hal/HalPwrSeqCmd.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 /*++
 Copyright (c) Realtek Semiconductor Corp. All rights reserved.
 
diff --git a/rtl8822BU/hal/btc/halbtc8192e1ant.c b/rtl8822BU/hal/btc/halbtc8192e1ant.c
index 38c89d1..1c60239 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8192e1ant.c
+++ b/rtl8822BU/hal/btc/halbtc8192e1ant.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 /* ************************************************************
  * Description:
  *
diff --git a/rtl8822BU/hal/btc/halbtc8192e1ant.h b/rtl8822BU/hal/btc/halbtc8192e1ant.h
index e75127c..10c34c1 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8192e1ant.h
+++ b/rtl8822BU/hal/btc/halbtc8192e1ant.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 
 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
 
diff --git a/rtl8822BU/hal/btc/halbtc8192e2ant.c b/rtl8822BU/hal/btc/halbtc8192e2ant.c
index 312877d..9936a8b 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8192e2ant.c
+++ b/rtl8822BU/hal/btc/halbtc8192e2ant.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 /* ************************************************************
  * Description:
  *
diff --git a/rtl8822BU/hal/btc/halbtc8192e2ant.h b/rtl8822BU/hal/btc/halbtc8192e2ant.h
index 00fed71..b77b3c4 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8192e2ant.h
+++ b/rtl8822BU/hal/btc/halbtc8192e2ant.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 
 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
 
diff --git a/rtl8822BU/hal/btc/halbtc8703b1ant.c b/rtl8822BU/hal/btc/halbtc8703b1ant.c
index 9b9782d..34f11f1 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8703b1ant.c
+++ b/rtl8822BU/hal/btc/halbtc8703b1ant.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 /* ************************************************************
  * Description:
  *
@@ -44,9 +58,9 @@ const char *const glbt_info_src_8703b_1ant[] = {
  * Please strictly follow this order and naming style !!!
  *
  * ************************************************************ */
-u32	glcoex_ver_date_8703b_1ant = 20160805;
-u32	glcoex_ver_8703b_1ant = 0x0c;
-u32	glcoex_ver_btdesired_8703b_1ant = 0x0b;
+u32	glcoex_ver_date_8703b_1ant = 20161027;
+u32	glcoex_ver_8703b_1ant = 0x0f;
+u32	glcoex_ver_btdesired_8703b_1ant = 0x0d;
 
 
 /* ************************************************************
@@ -336,7 +350,6 @@ void halbtc8703b1ant_query_bt_info(IN struct btc_coexist *btcoexist)
 {
 	u8			h2c_parameter[1] = {0};
 
-	coex_sta->c2h_bt_info_req_sent = true;
 
 	h2c_parameter[0] |= BIT(0);	/* trigger */
 
@@ -347,7 +360,8 @@ void halbtc8703b1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 {
 	u32			reg_hp_txrx, reg_lp_txrx, u32tmp;
 	u32			reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
-	static u8		num_of_bt_counter_chk = 0, cnt_slave = 0;
+	static u8		num_of_bt_counter_chk = 0, cnt_slave = 0, cnt_overhead = 0,
+				cnt_autoslot_hang = 0;
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
 	/* to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS */
@@ -369,6 +383,24 @@ void halbtc8703b1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 	coex_sta->low_priority_tx = reg_lp_tx;
 	coex_sta->low_priority_rx = reg_lp_rx;
 
+	if (BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
+			coex_dm->bt_status) {
+
+			if (coex_sta->high_priority_rx >= 15) {
+					if (cnt_overhead < 3)
+						cnt_overhead++;
+
+					if (cnt_overhead == 3)
+						coex_sta->is_hiPri_rx_overhead = true;
+			} else {
+					if (cnt_overhead > 0)
+						cnt_overhead--;
+
+					if (cnt_overhead == 0)
+						coex_sta->is_hiPri_rx_overhead = false;
+			}
+	}
+
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n",
 		    reg_hp_rx, reg_hp_tx, reg_lp_rx, reg_lp_tx);
@@ -386,9 +418,9 @@ void halbtc8703b1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 	    (coex_sta->low_priority_rx >= coex_sta->low_priority_tx)
 	    && (!coex_sta->under_ips)  && (!coex_sta->c2h_bt_inquiry_page) &&
 	    (coex_sta->bt_link_exist))	{
-		if (cnt_slave >= 3) {
+		if (cnt_slave >= 2) {
 			bt_link_info->slave_role = true;
-			cnt_slave = 3;
+			cnt_slave = 2;
 		} else
 			cnt_slave++;
 	} else {
@@ -400,38 +432,35 @@ void halbtc8703b1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 
 	}
 
-	if ((coex_sta->high_priority_tx == 0) &&
-	    (coex_sta->high_priority_rx == 0) &&
-	    (coex_sta->low_priority_tx == 0) &&
-	    (coex_sta->low_priority_rx == 0)) {
-		num_of_bt_counter_chk++;
-		if (num_of_bt_counter_chk >= 3) {
-			halbtc8703b1ant_query_bt_info(btcoexist);
-			num_of_bt_counter_chk = 0;
+	if (coex_sta->is_tdma_btautoslot) {
+		if ((coex_sta->low_priority_tx >= 1300) &&
+	    (coex_sta->low_priority_rx <= 150)) {
+			if (cnt_autoslot_hang >= 2) {
+				coex_sta->is_tdma_btautoslot_hang = true;
+				cnt_autoslot_hang = 2;
+			} else
+				cnt_autoslot_hang++;
+		} else {
+			if (cnt_autoslot_hang == 0)	{
+				coex_sta->is_tdma_btautoslot_hang = false;
+				cnt_autoslot_hang = 0;
+			} else
+				cnt_autoslot_hang--;
 		}
 	}
 
-
-#if 0
-	/* Add Hi-Pri Tx/Rx counter to avoid false detection */
-	if (((coex_sta->hid_exist) || (coex_sta->sco_exist)) &&
-	    (coex_sta->high_priority_tx + coex_sta->high_priority_rx
-	     >= 160)
-	    && (!coex_sta->c2h_bt_inquiry_page))
-		coex_sta->bt_hi_pri_link_exist = true;
-	else
-		coex_sta->bt_hi_pri_link_exist = false;
-
-	if ((coex_sta->acl_busy) &&
-	    (coex_sta->num_of_profile == 0)) {
-		if (coex_sta->low_priority_tx +
-		    coex_sta->low_priority_rx >= 160) {
-			coex_sta->pan_exist = true;
-			coex_sta->num_of_profile++;
-			coex_sta->wrong_profile_notification++;
+	if (!coex_sta->bt_disabled) {
+		if ((coex_sta->high_priority_tx == 0) &&
+		    (coex_sta->high_priority_rx == 0) &&
+		    (coex_sta->low_priority_tx == 0) &&
+		    (coex_sta->low_priority_rx == 0)) {
+			num_of_bt_counter_chk++;
+			if (num_of_bt_counter_chk >= 3) {
+				halbtc8703b1ant_query_bt_info(btcoexist);
+				num_of_bt_counter_chk = 0;
+			}
 		}
 	}
-#endif
 
 }
 
@@ -439,89 +468,131 @@ void halbtc8703b1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 void halbtc8703b1ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 {
 #if 1
-	s32 wifi_rssi = 0;
-	boolean wifi_busy = false, wifi_under_b_mode = false;
-	static u8 cck_lock_counter = 0;
-	u32 total_cnt, reg_val1, reg_val2;
+		s32 wifi_rssi = 0;
+		boolean wifi_busy = false, wifi_under_b_mode = false,
+				wifi_scan = false;
+		boolean bt_idle = false, wl_idle = false;
+		static u8 cck_lock_counter = 0, wl_noisy_count0 = 0,
+			   wl_noisy_count1 = 3, wl_noisy_count2 = 0;
+		u32 total_cnt, reg_val1, reg_val2, cck_cnt;
+
+		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+		btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
+		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE,
+				   &wifi_under_b_mode);
+
+		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
+
+		coex_sta->crc_ok_cck = btcoexist->btc_phydm_query_PHY_counter(
+									btcoexist, PHYDM_INFO_CRC32_OK_CCK);
+		coex_sta->crc_ok_11g = btcoexist->btc_phydm_query_PHY_counter(
+									btcoexist, PHYDM_INFO_CRC32_OK_LEGACY);
+		coex_sta->crc_ok_11n = btcoexist->btc_phydm_query_PHY_counter(
+									btcoexist, PHYDM_INFO_CRC32_OK_HT);
+		coex_sta->crc_ok_11n_vht = btcoexist->btc_phydm_query_PHY_counter(
+									btcoexist, PHYDM_INFO_CRC32_OK_VHT);
+
+		coex_sta->crc_err_cck = btcoexist->btc_phydm_query_PHY_counter(
+									btcoexist, PHYDM_INFO_CRC32_ERROR_CCK);
+		coex_sta->crc_err_11g =  btcoexist->btc_phydm_query_PHY_counter(
+									btcoexist, PHYDM_INFO_CRC32_ERROR_LEGACY);
+		coex_sta->crc_err_11n = btcoexist->btc_phydm_query_PHY_counter(
+									btcoexist, PHYDM_INFO_CRC32_ERROR_HT);
+		coex_sta->crc_err_11n_vht = btcoexist->btc_phydm_query_PHY_counter(
+									btcoexist, PHYDM_INFO_CRC32_ERROR_VHT);
+
+		cck_cnt = coex_sta->crc_ok_cck + coex_sta->crc_err_cck;
+
+		if (cck_cnt > 250) {
+			if (wl_noisy_count2 < 3)
+				wl_noisy_count2++;
+
+			if (wl_noisy_count2 == 3) {
+				wl_noisy_count0 = 0;
+				wl_noisy_count1 = 0;
+			}
+		} else if (cck_cnt < 50) {
+			if (wl_noisy_count0 < 3)
+				wl_noisy_count0++;
+
+			if (wl_noisy_count0 == 3) {
+				wl_noisy_count1 = 0;
+				wl_noisy_count2 = 0;
+			}
+		} else {
+			if (wl_noisy_count1 < 3)
+				wl_noisy_count1++;
+
+			if (wl_noisy_count1 == 3) {
+				wl_noisy_count0 = 0;
+				wl_noisy_count2 = 0;
+			}
+		}
+
+		if (wl_noisy_count2 == 3)
+			coex_sta->wl_noisy_level = 2;
+		else if (wl_noisy_count1 == 3)
+			coex_sta->wl_noisy_level = 1;
+		else
+			coex_sta->wl_noisy_level = 0;
+
+		if ((wifi_busy) && (wifi_rssi >= 30) && (!wifi_under_b_mode)) {
+			total_cnt = coex_sta->crc_ok_cck + coex_sta->crc_ok_11g +
+					coex_sta->crc_ok_11n + coex_sta->crc_ok_11n_vht;
+
+			if ((coex_dm->bt_status == BT_8703B_1ANT_BT_STATUS_ACL_BUSY) ||
+				(coex_dm->bt_status == BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY) ||
+				(coex_dm->bt_status == BT_8703B_1ANT_BT_STATUS_SCO_BUSY)) {
+				if (coex_sta->crc_ok_cck > (total_cnt -
+								coex_sta->crc_ok_cck)) {
+					if (cck_lock_counter < 3)
+						cck_lock_counter++;
+				} else {
+					if (cck_lock_counter > 0)
+						cck_lock_counter--;
+				}
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
-	btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE,
-			   &wifi_under_b_mode);
-
-	coex_sta->crc_ok_cck = btcoexist->btc_phydm_query_PHY_counter(
-								btcoexist, PHYDM_INFO_CRC32_OK_CCK);
-	coex_sta->crc_ok_11g = btcoexist->btc_phydm_query_PHY_counter(
-								btcoexist, PHYDM_INFO_CRC32_OK_LEGACY);
-	coex_sta->crc_ok_11n = btcoexist->btc_phydm_query_PHY_counter(
-								btcoexist, PHYDM_INFO_CRC32_OK_HT);
-	coex_sta->crc_ok_11n_vht = btcoexist->btc_phydm_query_PHY_counter(
-								btcoexist, PHYDM_INFO_CRC32_OK_VHT);
-
-	coex_sta->crc_err_cck = btcoexist->btc_phydm_query_PHY_counter(
-								btcoexist, PHYDM_INFO_CRC32_ERROR_CCK);
-	coex_sta->crc_err_11g =  btcoexist->btc_phydm_query_PHY_counter(
-								btcoexist, PHYDM_INFO_CRC32_ERROR_LEGACY);
-	coex_sta->crc_err_11n = btcoexist->btc_phydm_query_PHY_counter(
-								btcoexist, PHYDM_INFO_CRC32_ERROR_HT);
-	coex_sta->crc_err_11n_vht = btcoexist->btc_phydm_query_PHY_counter(
-								btcoexist, PHYDM_INFO_CRC32_ERROR_VHT);
-
-
-	if ((wifi_busy) && (wifi_rssi >= 30) && (!wifi_under_b_mode)) {
-		total_cnt = coex_sta->crc_ok_cck + coex_sta->crc_ok_11g +
-				coex_sta->crc_ok_11n + coex_sta->crc_ok_11n_vht;
-
-		if ((coex_dm->bt_status == BT_8703B_1ANT_BT_STATUS_ACL_BUSY) ||
-			(coex_dm->bt_status == BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY) ||
-			(coex_dm->bt_status == BT_8703B_1ANT_BT_STATUS_SCO_BUSY)) {
-			if (coex_sta->crc_ok_cck > (total_cnt -
-							coex_sta->crc_ok_cck)) {
-				if (cck_lock_counter < 3)
-					cck_lock_counter++;
 			} else {
 				if (cck_lock_counter > 0)
 					cck_lock_counter--;
 			}
-
 		} else {
 			if (cck_lock_counter > 0)
 				cck_lock_counter--;
 		}
-	} else {
-		if (cck_lock_counter > 0)
-			cck_lock_counter--;
-	}
 
-	if (!coex_sta->pre_ccklock) {
+		if (!coex_sta->pre_ccklock) {
 
-		if (cck_lock_counter >= 3)
-			coex_sta->cck_lock = true;
-		else
-			coex_sta->cck_lock = false;
-	} else {
-		if (cck_lock_counter == 0)
-			coex_sta->cck_lock = false;
-		else
-			coex_sta->cck_lock = true;
-	}
+			if (cck_lock_counter >= 3)
+				coex_sta->cck_lock = true;
+			else
+				coex_sta->cck_lock = false;
+		} else {
+			if (cck_lock_counter == 0)
+				coex_sta->cck_lock = false;
+			else
+				coex_sta->cck_lock = true;
+		}
 
-	if (coex_sta->cck_lock)
-		coex_sta->cck_ever_lock = true;
+		if (coex_sta->cck_lock)
+			coex_sta->cck_ever_lock = true;
 
-	coex_sta->pre_ccklock =  coex_sta->cck_lock;
+		coex_sta->pre_ccklock =  coex_sta->cck_lock;
 
 #endif
 }
 
 
+
 boolean halbtc8703b1ant_is_wifibt_status_changed(IN struct btc_coexist
 		*btcoexist)
 {
 	static boolean	pre_wifi_busy = false, pre_under_4way = false,
-			pre_bt_hs_on = false, pre_bt_off = false;
+			pre_bt_hs_on = false, pre_bt_off = false, pre_bt_slave = false;
+	static u8 pre_hid_busy_num = 0, pre_wl_noisy_level = 0;
 	boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
 	boolean wifi_connected = false;
+	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
 			   &wifi_connected);
@@ -535,15 +606,20 @@ boolean halbtc8703b1ant_is_wifibt_status_changed(IN struct btc_coexist
 
 		if (coex_sta->bt_disabled)
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "[BTCoex], BT is disabled !!\n");
+					"[BTCoex], BT is disabled !!\n");
 		else
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "[BTCoex], BT is enabled !!\n");
+					"[BTCoex], BT is enabled !!\n");
 
 		BTC_TRACE(trace_buf);
 
 		coex_sta->bt_coex_supported_feature = 0;
 		coex_sta->bt_coex_supported_version = 0;
+		coex_sta->bt_ble_scan_type = 0;
+		coex_sta->bt_ble_scan_para[0] = 0;
+		coex_sta->bt_ble_scan_para[1] = 0;
+		coex_sta->bt_ble_scan_para[2] = 0;
+
 		return true;
 	}
 
@@ -560,11 +636,28 @@ boolean halbtc8703b1ant_is_wifibt_status_changed(IN struct btc_coexist
 			pre_bt_hs_on = bt_hs_on;
 			return true;
 		}
+		if (coex_sta->wl_noisy_level != pre_wl_noisy_level) {
+			pre_wl_noisy_level = coex_sta->wl_noisy_level;
+			return true;
+		}
+	}
+
+	if (!coex_sta->bt_disabled) {
+		if (coex_sta->hid_busy_num != pre_hid_busy_num) {
+			pre_hid_busy_num = coex_sta->hid_busy_num;
+			return true;
+		}
+	}
+
+	if (bt_link_info->slave_role != pre_bt_slave) {
+		   pre_bt_slave = bt_link_info->slave_role;
+		   return true;
 	}
 
 	return false;
 }
 
+
 void halbtc8703b1ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 {
 	struct  btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
@@ -660,7 +753,11 @@ void halbtc8703b1ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 	else
 		bt_link_info->hid_only = false;
 
-	if (!(coex_sta->bt_info & BT_INFO_8703B_1ANT_B_CONNECTION)) {
+	if (coex_sta->bt_info & BT_INFO_8703B_1ANT_B_INQ_PAGE) {
+		coex_dm->bt_status = BT_8703B_1ANT_BT_STATUS_INQ_PAGE;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], BtInfoNotify(), BT Inq/page!!!\n");
+	} else if (!(coex_sta->bt_info & BT_INFO_8703B_1ANT_B_CONNECTION)) {
 		coex_dm->bt_status = BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE;
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
@@ -790,6 +887,7 @@ void halbtc8703b1ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
 		if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
 			return;
 	}
+
 	halbtc8703b1ant_set_fw_low_penalty_ra(btcoexist,
 					      coex_dm->cur_low_penalty_ra);
 
@@ -831,36 +929,13 @@ void halbtc8703b1ant_read_score_board(
 			    0xaa)) & 0x7fff;
 }
 
-void halbtc8703b1ant_post_activestate_to_bt(
+void halbtc8703b1ant_post_state_to_bt(
 	IN	struct  btc_coexist		*btcoexist,
-	IN	boolean				wifi_active
+	IN	u16						type,
+	IN  boolean                 state
 )
 {
-
-	if (wifi_active)
-		halbtc8703b1ant_write_score_board(btcoexist, (u16) BIT(0),
-						  true);
-	else
-		halbtc8703b1ant_write_score_board(btcoexist, (u16) BIT(0),
-						  false);
-
-	/* The BT should set "No Shunt-down" mode if WL = Active for BT Synthesizer on/off interference WL Lo issue at 8703b b-cut. */
-
-}
-
-void halbtc8703b1ant_post_onoffState_to_bt(
-	IN	struct  btc_coexist		*btcoexist,
-	IN	boolean				wifi_on
-)
-{
-
-	if (wifi_on)
-		halbtc8703b1ant_write_score_board(btcoexist, (u16) BIT(1),
-						  true);
-	else
-		halbtc8703b1ant_write_score_board(btcoexist, (u16) BIT(1),
-						  false);
-
+	halbtc8703b1ant_write_score_board(btcoexist, (u16) type, state);
 }
 
 void halbtc8703b1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
@@ -909,6 +984,10 @@ void halbtc8703b1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 				   &bt_disabled);
 	}
 
+	if (bt_disabled)
+		halbtc8703b1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, false);
+	else
+		halbtc8703b1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, true);
 
 	if (coex_sta->bt_disabled != bt_disabled) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -921,6 +1000,8 @@ void halbtc8703b1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 	}
 }
 
+
+
 void halbtc8703b1ant_enable_gnt_to_gpio(IN struct btc_coexist *btcoexist,
 					IN boolean isenable)
 {
@@ -1030,12 +1111,6 @@ void halbtc8703b1ant_ltecoex_enable(IN struct btc_coexist *btcoexist,
 
 }
 
-void halbtc8703b1ant_sw_mechanism(IN struct btc_coexist *btcoexist,
-				  IN boolean low_penalty_ra)
-{
-	halbtc8703b1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra);
-}
-
 void halbtc8703b1ant_ltecoex_pathcontrol_owner(IN struct btc_coexist *btcoexist,
 		IN boolean wifi_control)
 {
@@ -1050,69 +1125,69 @@ void halbtc8703b1ant_ltecoex_pathcontrol_owner(IN struct btc_coexist *btcoexist,
 void halbtc8703b1ant_ltecoex_set_gnt_bt(IN struct btc_coexist *btcoexist,
 			IN u8 control_block, IN boolean sw_control, IN u8 state)
 {
-	u32 val = 0, bit_mask;
+	u32 val = 0, val_orig = 0;
 
-	state = state & 0x1;
-	val = (sw_control) ? ((state << 1) | 0x1) : 0;
+	if (!sw_control)
+		val = 0x0;
+	else if (state & 0x1)
+		val = 0x3;
+	else
+		val = 0x1;
+
+	val_orig = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist,
+				0x38);
 
 	switch (control_block) {
 	case BT_8703B_1ANT_GNT_BLOCK_RFC_BB:
 	default:
-		bit_mask = 0xc000;
-		halbtc8703b1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[15:14] */
-		bit_mask = 0x0c00;
-		halbtc8703b1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[11:10]						 */
+		val = ((val << 14) | (val << 10)) | (val_orig & 0xffff33ff);
 		break;
 	case BT_8703B_1ANT_GNT_BLOCK_RFC:
-		bit_mask = 0xc000;
-		halbtc8703b1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[15:14] */
+		val = (val << 14) | (val_orig & 0xffff3fff);
 		break;
 	case BT_8703B_1ANT_GNT_BLOCK_BB:
-		bit_mask = 0x0c00;
-		halbtc8703b1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[11:10] */
+		val = (val << 10) | (val_orig & 0xfffff3ff);
 		break;
-
 	}
 
+	halbtc8703b1ant_ltecoex_indirect_write_reg(btcoexist,
+			0x38, 0xffffffff, val);
 }
 
+
 void halbtc8703b1ant_ltecoex_set_gnt_wl(IN struct btc_coexist *btcoexist,
 			IN u8 control_block, IN boolean sw_control, IN u8 state)
 {
-	u32 val = 0, bit_mask;
+	u32 val = 0, val_orig = 0;
 
-	state = state & 0x1;
-	val = (sw_control) ? ((state << 1) | 0x1) : 0;
+	if (!sw_control)
+		val = 0x0;
+	else if (state & 0x1)
+		val = 0x3;
+	else
+		val = 0x1;
+
+	val_orig = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist,
+				0x38);
 
 	switch (control_block) {
 	case BT_8703B_1ANT_GNT_BLOCK_RFC_BB:
 	default:
-		bit_mask = 0x3000;
-		halbtc8703b1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[13:12] */
-		bit_mask = 0x0300;
-		halbtc8703b1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[9:8]						 */
+		val = ((val << 12) | (val << 8)) | (val_orig & 0xffffccff);
 		break;
 	case BT_8703B_1ANT_GNT_BLOCK_RFC:
-		bit_mask = 0x3000;
-		halbtc8703b1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[13:12] */
+		val = (val << 12) | (val_orig & 0xffffcfff);
 		break;
 	case BT_8703B_1ANT_GNT_BLOCK_BB:
-		bit_mask = 0x0300;
-		halbtc8703b1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[9:8] */
+		val = (val << 8) | (val_orig & 0xfffffcff);
 		break;
-
 	}
 
+	halbtc8703b1ant_ltecoex_indirect_write_reg(btcoexist,
+			0x38, 0xffffffff, val);
 }
 
+
 void halbtc8703b1ant_ltecoex_set_coex_table(IN struct btc_coexist *btcoexist,
 		IN u8 table_type, IN u16 table_content)
 {
@@ -1162,6 +1237,42 @@ void halbtc8703b1ant_ltecoex_set_break_table(IN struct btc_coexist *btcoexist,
 
 }
 
+void halbtc8703b1ant_set_wltoggle_coex_table(IN struct btc_coexist *btcoexist,
+		IN boolean force_exec,  IN u8 interval,
+		IN u8 val0x6c4_b0, IN u8 val0x6c4_b1, IN u8 val0x6c4_b2,
+		IN u8 val0x6c4_b3)
+{
+	static u8 pre_h2c_parameter[6] = {0};
+	u8	cur_h2c_parameter[6] = {0};
+	u8 i, match_cnt = 0;
+
+	cur_h2c_parameter[0] = 0x7;	/* op_code, 0x7= wlan toggle slot*/
+
+	cur_h2c_parameter[1] = interval;
+	cur_h2c_parameter[2] = val0x6c4_b0;
+	cur_h2c_parameter[3] = val0x6c4_b1;
+	cur_h2c_parameter[4] = val0x6c4_b2;
+	cur_h2c_parameter[5] = val0x6c4_b3;
+
+	if (!force_exec) {
+		for (i = 1; i <= 5; i++) {
+			if (cur_h2c_parameter[i] != pre_h2c_parameter[i])
+				break;
+
+			match_cnt++;
+		}
+
+		if (match_cnt == 5)
+			return;
+	}
+
+	for (i = 1; i <= 5; i++)
+		pre_h2c_parameter[i] = cur_h2c_parameter[i];
+
+	btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, cur_h2c_parameter);
+}
+
+
 void halbtc8703b1ant_set_coex_table(IN struct btc_coexist *btcoexist,
 	    IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
 {
@@ -1216,55 +1327,60 @@ void halbtc8703b1ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 		select_table = 0x3;
 	}
 
-	switch (type) {
-	case 0:
-		halbtc8703b1ant_coex_table(btcoexist, force_exec,
-					   0x55555555, 0x55555555, break_table,
-					   select_table);
-		break;
-	case 1:
-		halbtc8703b1ant_coex_table(btcoexist, force_exec,
-					   0x55555555, 0x5a5a5a5a, break_table,
-					   select_table);
-		break;
-	case 2:
-		halbtc8703b1ant_coex_table(btcoexist, force_exec,
-					   0xaa5a5a5a, 0xaa5a5a5a, break_table,
-					   select_table);
-		break;
-	case 3:
-		halbtc8703b1ant_coex_table(btcoexist, force_exec,
-					   0xaa555555, 0xaa5a5a5a, break_table,
-					   select_table);
-		break;
-	case 4:
-		halbtc8703b1ant_coex_table(btcoexist, force_exec,
-				0xa5555555, 0xaa5a5a5a, break_table,
-				select_table);
-		break;
-	case 5:
-		halbtc8703b1ant_coex_table(btcoexist, force_exec,
-				0x5a5a5a5a, 0x5a5a5a5a, break_table,
-				select_table);
-		break;
-	case 6:
-		halbtc8703b1ant_coex_table(btcoexist, force_exec,
-					   0x55555555, 0xaaaaaaaa, break_table,
-					   select_table);
-		break;
-	case 7:
-		halbtc8703b1ant_coex_table(btcoexist, force_exec,
-					   0xaaaaaaaa, 0xaaaaaaaa, break_table,
-					   select_table);
-		break;
-	case 8:
-		halbtc8703b1ant_coex_table(btcoexist, force_exec,
-				0xa5555555, 0xaaaaaaaa, break_table,
-				select_table);
-		break;
-	default:
-		break;
-	}
+		switch (type) {
+		case 0:
+			halbtc8703b1ant_coex_table(btcoexist, force_exec,
+						   0x55555555, 0x55555555, break_table,
+						   select_table);
+			break;
+		case 1:
+			halbtc8703b1ant_coex_table(btcoexist, force_exec,
+						   0x55555555, 0x5a5a5a5a, break_table,
+						   select_table);
+			break;
+		case 2:
+			halbtc8703b1ant_coex_table(btcoexist, force_exec,
+						   0xaa5a5a5a, 0xaa5a5a5a, break_table,
+						   select_table);
+			break;
+		case 3:
+			halbtc8703b1ant_coex_table(btcoexist, force_exec,
+						   0xaa555555, 0xaa5a5a5a, break_table,
+						   select_table);
+			break;
+		case 4:
+			halbtc8703b1ant_coex_table(btcoexist, force_exec,
+						   0xa5555555, 0x5a5a5a5a, break_table,
+						   select_table);
+			break;
+		case 5:
+			halbtc8703b1ant_coex_table(btcoexist, force_exec,
+						   0x5a5a5a5a, 0x5a5a5a5a, break_table,
+						   select_table);
+			break;
+		case 6:
+			halbtc8703b1ant_coex_table(btcoexist, force_exec,
+						   0xa5555555, 0x5a5a5a5a, break_table,
+						   select_table);
+			break;
+		case 7:
+			halbtc8703b1ant_coex_table(btcoexist, force_exec,
+						   0xaaaaaaaa, 0xaaaaaaaa, break_table,
+						   select_table);
+			break;
+		case 8:
+			halbtc8703b1ant_coex_table(btcoexist, force_exec,
+						   0xa5555555, 0xaaaaaaaa, break_table,
+						   select_table);
+			break;
+		case 9:
+			halbtc8703b1ant_coex_table(btcoexist, force_exec,
+						   0x5a5a5a5a, 0xaaaa5aaa, break_table,
+						   select_table);
+			break;
+		default:
+			break;
+		}
 }
 
 void halbtc8703b1ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
@@ -1273,7 +1389,7 @@ void halbtc8703b1ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
 	u8			h2c_parameter[1] = {0};
 
 	if (enable)
-		h2c_parameter[0] |= BIT(0);		/* function enable */
+		h2c_parameter[0] |= BIT(0);/* function enable */
 
 	btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
 }
@@ -1405,6 +1521,18 @@ void halbtc8703b1ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
 	u8			h2c_parameter[5] = {0};
 	u8			real_byte1 = byte1, real_byte5 = byte5;
 	boolean			ap_enable = false;
+	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+
+	if (byte5 & BIT(2))
+		coex_sta->is_tdma_btautoslot = true;
+	else
+		coex_sta->is_tdma_btautoslot = false;
+
+	/* release bt-auto slot for auto-slot hang is detected!! */
+	if (coex_sta->is_tdma_btautoslot)
+		if ((coex_sta->is_tdma_btautoslot_hang) ||
+			(bt_link_info->slave_role))
+			byte5 = byte5 & 0xfb;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
 			   &ap_enable);
@@ -1512,100 +1640,126 @@ void halbtc8703b1ant_ps_tdma(IN struct btc_coexist *btcoexist,
 		switch (type) {
 		default:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x35, 0x03, 0x11, 0x11);
+							0x61, 0x35, 0x03, 0x11, 0x11);
 			break;
 
 		case 3:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x3a, 0x03, 0x10, 0x10);
+							0x51, 0x3a, 0x03, 0x10, 0x50);
 			break;
 		case 4:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x21, 0x03, 0x10, 0x10);
+							0x51, 0x21, 0x03, 0x10, 0x50);
 			break;
 		case 5:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x15, 0x03, 0x11, 0x11);
+							0x61, 0x15, 0x03, 0x11, 0x11);
 			break;
 		case 6:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x20, 0x03, 0x11, 0x11);
+							0x61, 0x20, 0x03, 0x11, 0x11);
 			break;
 		case 7:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x10, 0x03, 0x10,  0x14 |
-						      psTdmaByte4Modify);
+							0x51, 0x10, 0x03, 0x10,  0x54 |
+							psTdmaByte4Modify);
 			break;
 		case 8:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x10, 0x03, 0x10,  0x14 |
-						      psTdmaByte4Modify);
+							0x51, 0x10, 0x03, 0x10,  0x54 |
+							psTdmaByte4Modify);
+			break;
+		case 9:
+			halbtc8703b1ant_set_fw_pstdma(btcoexist,
+							0x55, 0x10, 0x03, 0x10,  0x54 |
+							psTdmaByte4Modify);
+			break;
+		case 10:
+			halbtc8703b1ant_set_fw_pstdma(btcoexist,
+							0x61, 0x30, 0x03, 0x11, 0x10);
+			break;
+		case 11:
+			halbtc8703b1ant_set_fw_pstdma(btcoexist,
+							0x65, 0x25, 0x03, 0x11,  0x11 |
+							psTdmaByte4Modify);
+			break;
+		case 12:
+			halbtc8703b1ant_set_fw_pstdma(btcoexist,
+							0x55, 0x30, 0x03, 0x10,  0x50 |
+							psTdmaByte4Modify);
 			break;
 		case 13:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x25, 0x03, 0x10,  0x10 |
-						      psTdmaByte4Modify);
+							0x51, 0x25, 0x03, 0x10,  0x50 |
+							psTdmaByte4Modify);
 			break;
 		case 14:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x15, 0x03, 0x10,  0x10 |
-						      psTdmaByte4Modify);
+							0x51, 0x15, 0x03, 0x10,  0x50 |
+							psTdmaByte4Modify);
 			break;
 		case 15:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x20, 0x03, 0x10,  0x10 |
-						      psTdmaByte4Modify);
+							0x51, 0x20, 0x03, 0x10,  0x50 |
+							psTdmaByte4Modify);
+			break;
+		case 16:
+			halbtc8703b1ant_set_fw_pstdma(btcoexist,
+							0x61, 0x10, 0x03, 0x11,  0x15 |
+							psTdmaByte4Modify);
 			break;
 		case 17:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x10, 0x03, 0x11,  0x14 |
-						      psTdmaByte4Modify);
+							0x61, 0x10, 0x03, 0x11, 0x14);
 			break;
 		case 18:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x30, 0x03, 0x10, 0x10 |
-						      psTdmaByte4Modify);
+							0x51, 0x30, 0x03, 0x10,  0x50 |
+							psTdmaByte4Modify);
 			break;
 		case 19:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x15, 0x03, 0x11, 0x10);
+							0x61, 0x15, 0x03, 0x11, 0x10);
 			break;
 		case 20:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x30, 0x03, 0x11, 0x10);
+							0x61, 0x30, 0x03, 0x11, 0x10);
 			break;
 		case 21:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x30, 0x03, 0x11, 0x10);
+							0x61, 0x30, 0x03, 0x11, 0x10);
 			break;
 		case 22:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x25, 0x03, 0x11, 0x10);
+							0x61, 0x25, 0x03, 0x11, 0x10);
+			break;
+		case 23:
+			halbtc8703b1ant_set_fw_pstdma(btcoexist,
+							0x61, 0x10, 0x03, 0x11, 0x10);
 			break;
 		case 32:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x35, 0x03, 0x11, 0x11);
+							0x61, 0x35, 0x03, 0x11, 0x11);
 			break;
 		case 33:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x35, 0x03, 0x11, 0x10);
+							0x61, 0x35, 0x03, 0x11, 0x10);
 			break;
 		case 57:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x10, 0x03, 0x10,  0x10 |
-						      psTdmaByte4Modify);
+							0x51, 0x10, 0x03, 0x10,  0x50 |
+							psTdmaByte4Modify);
 			break;
 		case 58:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x10, 0x03, 0x10,  0x10 |
-						      psTdmaByte4Modify);
+							0x51, 0x10, 0x03, 0x10,  0x50 |
+							psTdmaByte4Modify);
 			break;
 		case 67:
 			halbtc8703b1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x10, 0x03, 0x11,  0x10 |
-						      psTdmaByte4Modify);
+							0x61, 0x10, 0x03, 0x11,  0x10 |
+							psTdmaByte4Modify);
 			break;
-
 		}
 	} else {
 
@@ -1613,16 +1767,16 @@ void halbtc8703b1ant_ps_tdma(IN struct btc_coexist *btcoexist,
 		switch (type) {
 		case 8: /* PTA Control */
 			halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x8,
-						      0x0, 0x0, 0x0, 0x0);
+							0x0, 0x0, 0x0, 0x0);
 			break;
 		case 0:
 		default:  /* Software control, Antenna at BT side */
 			halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x0,
-						      0x0, 0x0, 0x0, 0x0);
+							0x0, 0x0, 0x0, 0x0);
 			break;
 		case 1: /* 2-Ant, 0x778=3, antenna control by antenna diversity */
 			halbtc8703b1ant_set_fw_pstdma(btcoexist, 0x0,
-						      0x0, 0x0, 0x48, 0x0);
+							0x0, 0x0, 0x48, 0x0);
 			break;
 		}
 	}
@@ -1636,28 +1790,22 @@ void halbtc8703b1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 				  IN u8 ant_pos_type, IN boolean force_exec,
 				  IN u8 phase)
 {
-	u32			cnt_bt_cal_chk = 0;
-	boolean			is_in_mp_mode = false;
-	u8			u8tmp = 0;
-	u32			u32tmp1 = 0, u32tmp2 = 0;
+	u32	cnt_bt_cal_chk = 0;
+	boolean	is_in_mp_mode = false;
+	u8	u8tmp = 0;
+	u32	u32tmp1 = 0, u32tmp2 = 0;
 
-	coex_dm->cur_ant_pos_type = ant_pos_type;
 
-	if (!force_exec) {
-		if (coex_dm->cur_ant_pos_type == coex_dm->pre_ant_pos_type) {
+	u32tmp1 = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist,
+				0x38);
 
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], ********** Skip Antenna Path Setup because no change!!**********\n");
-			BTC_TRACE(trace_buf);
-			return;
-		}
+	/* To avoid indirect access fail	*/
+	if (((u32tmp1 & 0xf000) >> 12) != ((u32tmp1 & 0x0f00) >> 8)) {
+		force_exec = true;
+		coex_sta->gnt_error_cnt++;
 	}
 
-	coex_dm->pre_ant_pos_type = coex_dm->cur_ant_pos_type;
-
 #if 1
-	u32tmp1 = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist,
-			0x38);
 	u32tmp2 = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist,
 			0x54);
 	u8tmp  = btcoexist->btc_read_1byte(btcoexist, 0x73);
@@ -1668,6 +1816,19 @@ void halbtc8703b1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 	BTC_TRACE(trace_buf);
 #endif
 
+	coex_dm->cur_ant_pos_type = ant_pos_type;
+
+	if (!force_exec) {
+		if (coex_dm->cur_ant_pos_type == coex_dm->pre_ant_pos_type) {
+
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], ********** Skip Antenna Path Setup because no change!!**********\n");
+			BTC_TRACE(trace_buf);
+			return;
+		}
+	}
+
+	coex_dm->pre_ant_pos_type = coex_dm->cur_ant_pos_type;
 
 	switch (phase) {
 	case BT_8703B_1ANT_PHASE_COEX_INIT:
@@ -1857,9 +2018,6 @@ boolean halbtc8703b1ant_is_common_action(IN struct btc_coexist *btcoexist)
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n");
 		BTC_TRACE(trace_buf);
-
-		/* halbtc8703b1ant_sw_mechanism(btcoexist, false); */
-
 		common = true;
 	} else if (wifi_connected &&
 		   (BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
@@ -1867,9 +2025,6 @@ boolean halbtc8703b1ant_is_common_action(IN struct btc_coexist *btcoexist)
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], Wifi connected + BT non connected-idle!!\n");
 		BTC_TRACE(trace_buf);
-
-		/* halbtc8703b1ant_sw_mechanism(btcoexist, false); */
-
 		common = true;
 	} else if (!wifi_connected &&
 		   (BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE ==
@@ -1877,9 +2032,6 @@ boolean halbtc8703b1ant_is_common_action(IN struct btc_coexist *btcoexist)
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], Wifi non connected-idle + BT connected-idle!!\n");
 		BTC_TRACE(trace_buf);
-
-		/* halbtc8703b1ant_sw_mechanism(btcoexist, false); */
-
 		common = true;
 	} else if (wifi_connected &&
 		   (BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE ==
@@ -1887,9 +2039,6 @@ boolean halbtc8703b1ant_is_common_action(IN struct btc_coexist *btcoexist)
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], Wifi connected + BT connected-idle!!\n");
 		BTC_TRACE(trace_buf);
-
-		/* halbtc8703b1ant_sw_mechanism(btcoexist, false); */
-
 		common = true;
 	} else if (!wifi_connected &&
 		   (BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE !=
@@ -1897,9 +2046,6 @@ boolean halbtc8703b1ant_is_common_action(IN struct btc_coexist *btcoexist)
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], Wifi non connected-idle + BT Busy!!\n");
 		BTC_TRACE(trace_buf);
-
-		/* halbtc8703b1ant_sw_mechanism(btcoexist, false); */
-
 		common = true;
 	} else {
 		if (wifi_busy) {
@@ -1918,71 +2064,6 @@ boolean halbtc8703b1ant_is_common_action(IN struct btc_coexist *btcoexist)
 	return common;
 }
 
-/* *********************************************
- *
- *	Software Coex Mechanism start
- *
- * ********************************************* */
-
-/* SCO only or SCO+PAN(HS) */
-
-/*
-void halbtc8703b1ant_action_sco(IN struct btc_coexist* btcoexist)
-{
-	halbtc8703b1ant_sw_mechanism(btcoexist, true);
-}
-
-
-void halbtc8703b1ant_action_hid(IN struct btc_coexist* btcoexist)
-{
-	halbtc8703b1ant_sw_mechanism(btcoexist, true);
-}
-
-
-void halbtc8703b1ant_action_a2dp(IN struct btc_coexist* btcoexist)
-{
-	halbtc8703b1ant_sw_mechanism(btcoexist, false);
-}
-
-void halbtc8703b1ant_action_a2dp_pan_hs(IN struct btc_coexist* btcoexist)
-{
-	halbtc8703b1ant_sw_mechanism(btcoexist, false);
-}
-
-void halbtc8703b1ant_action_pan_edr(IN struct btc_coexist* btcoexist)
-{
-	halbtc8703b1ant_sw_mechanism(btcoexist, false);
-}
-
-
-void halbtc8703b1ant_action_pan_hs(IN struct btc_coexist* btcoexist)
-{
-	halbtc8703b1ant_sw_mechanism(btcoexist, false);
-}
-
-
-void halbtc8703b1ant_action_pan_edr_a2dp(IN struct btc_coexist* btcoexist)
-{
-	halbtc8703b1ant_sw_mechanism(btcoexist, false);
-}
-
-void halbtc8703b1ant_action_pan_edr_hid(IN struct btc_coexist* btcoexist)
-{
-	halbtc8703b1ant_sw_mechanism(btcoexist, true);
-}
-
-
-void halbtc8703b1ant_action_hid_a2dp_pan_edr(IN struct btc_coexist* btcoexist)
-{
-	halbtc8703b1ant_sw_mechanism(btcoexist, true);
-}
-
-void halbtc8703b1ant_action_hid_a2dp(IN struct btc_coexist* btcoexist)
-{
-	halbtc8703b1ant_sw_mechanism(btcoexist, true);
-}
-
-*/
 
 /* *********************************************
  *
@@ -1992,9 +2073,9 @@ void halbtc8703b1ant_action_hid_a2dp(IN struct btc_coexist* btcoexist)
 u8 halbtc8703b1ant_action_algorithm(IN struct btc_coexist *btcoexist)
 {
 	struct  btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
-	boolean				bt_hs_on = false;
-	u8				algorithm = BT_8703B_1ANT_COEX_ALGO_UNDEFINED;
-	u8				num_of_diff_profile = 0;
+	boolean	bt_hs_on = false;
+	u8	algorithm = BT_8703B_1ANT_COEX_ALGO_UNDEFINED;
+	u8	num_of_diff_profile = 0;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
 
@@ -2193,9 +2274,7 @@ u8 halbtc8703b1ant_action_algorithm(IN struct btc_coexist *btcoexist)
 	return algorithm;
 }
 
-
-
-void halbtc8703b1ant_action_bt_whck_test(IN struct btc_coexist *btcoexist)
+void halbtc8703b1ant_action_bt_whql_test(IN struct btc_coexist *btcoexist)
 {
 	halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
 	halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
@@ -2203,193 +2282,285 @@ void halbtc8703b1ant_action_bt_whck_test(IN struct btc_coexist *btcoexist)
 	halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 }
 
-void halbtc8703b1ant_action_wifi_only(IN struct btc_coexist *btcoexist)
+void halbtc8703b1ant_action_bt_hs(IN struct btc_coexist *btcoexist)
 {
-	halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
-	halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
-				     BT_8703B_1ANT_PHASE_2G_RUNTIME);
-	halbtc8703b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
+	halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
+	halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
 }
 
-void halbtc8703b1ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
+void halbtc8703b1ant_action_bt_relink(IN struct btc_coexist *btcoexist)
 {
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-
-	halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-	halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-				     BT_8703B_1ANT_PHASE_2G_RUNTIME);
-
-	if (!bt_link_info->pan_exist)
-		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-	else
-		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
+	halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
+	halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+	coex_sta->bt_relink_downcount = 2;
 }
 
-void halbtc8703b1ant_action_hs(IN struct btc_coexist *btcoexist)
+void halbtc8703b1ant_action_bt_idle(IN struct btc_coexist *btcoexist)
 {
-	halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
-	halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
+	boolean wifi_busy = false;
+
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+
+	if (!wifi_busy) {
+		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
+							8);
+		halbtc8703b1ant_coex_table_with_type(btcoexist,
+							NORMAL_EXEC, 2);
+	} else {/* if wl busy */
+
+	if (BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
+			coex_dm->bt_status) {
+
+		if (coex_sta->is_hiPri_rx_overhead)
+			halbtc8703b1ant_coex_table_with_type(btcoexist,
+								NORMAL_EXEC, 7);
+		else
+			halbtc8703b1ant_coex_table_with_type(btcoexist,
+								NORMAL_EXEC, 8);
+
+		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							33);
+	} else {
+
+	   halbtc8703b1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 8);
+	   halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							32);
+	  }
+	}
 }
 
 void halbtc8703b1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
 {
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean			wifi_connected = false, ap_enable = false, wifi_busy = false,
-				bt_busy = false;
+		boolean wifi_connected = false, wifi_busy = false, bt_busy = false;
 	boolean	wifi_scan = false, wifi_link = false, wifi_roam = false;
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
-			   &ap_enable);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
 			   &wifi_connected);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 	btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
 
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam);
 
-	if ((wifi_link) || (wifi_roam)  || (coex_sta->wifi_is_high_pri_task)) {
-
-		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33);
-		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6);
+		if ((coex_sta->bt_create_connection) && ((wifi_link) || (wifi_roam)
+			|| (wifi_scan) || (wifi_busy) || (coex_sta->wifi_is_high_pri_task))) {
 
-	} else if (((wifi_scan) || (wifi_busy)) &&
-		   (coex_sta->bt_create_connection)) {
-
-		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], Wifi link/roam/Scan/busy/hi-pri-task + BT Inq/Page!!\n");
+			BTC_TRACE(trace_buf);
 
-		if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist))
-			halbtc8703b1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 1);
-		else
-			halbtc8703b1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 6);
+		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
 
+			if ((bt_link_info->a2dp_exist) && (!bt_link_info->pan_exist))
+				halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17);
+			else
+		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33);
 	} else if ((!wifi_connected) && (!wifi_scan)) {
 
 		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-		halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-					     BT_8703B_1ANT_PHASE_2G_RUNTIME);
 
 		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-	}  else if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist)) {
+		} else if (bt_link_info->pan_exist) {
 
-		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6);
-		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
-	} else if ((bt_link_info->a2dp_exist) && (bt_link_info->pan_exist)) {
+			halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
 
-		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
 		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
-
 	} else if (bt_link_info->a2dp_exist) {
 
-		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
+			halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 16);
 
 		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
-	} else if (wifi_scan) {
-
-		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
-
-		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
-
-	} else if (wifi_busy) {
-		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 21);
+		} else {
 
-		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
-	} else {
-		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 19);
+			if ((wifi_link) || (wifi_roam) || (wifi_scan) || (wifi_busy)
+				|| (coex_sta->wifi_is_high_pri_task))
+				halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 21);
+			else
+				halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 23);
 
 		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 	}
 }
 
+
 void halbtc8703b1ant_action_bt_sco_hid_only_busy(IN struct btc_coexist
-		*btcoexist, IN u8 wifi_status)
+		*btcoexist)
 {
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean	wifi_connected = false;
+	boolean	wifi_connected = false, wifi_busy = false;
+	u32  wifi_bw = 1;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
 			   &wifi_connected);
 
-	/* tdma and coex table */
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
+			   &wifi_bw);
+
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+
 
 	if (bt_link_info->sco_exist) {
-		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
-		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
-	} else { /* HID */
-		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6);
-		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
-	}
+			halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC,	true, 5);
+			halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
+		} else if (coex_sta->hid_busy_num >= 2) {/*for 4/18 hid */
+		/* if 11bg mode */
+		if (wifi_bw == 0) {
+
+			halbtc8703b1ant_coex_table_with_type(btcoexist,
+								NORMAL_EXEC, 6);
+			halbtc8703b1ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x1, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
+			halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
+		} else {
+
+		if (wifi_busy) {
+
+			halbtc8703b1ant_coex_table_with_type(btcoexist,
+								NORMAL_EXEC, 6);
+			halbtc8703b1ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x2, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
+		     halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
+		  } else {
+
+			halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6);
+			halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
+		  }
+		}
+	} else {
+			halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+						true, 6);
+			halbtc8703b1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 3);
+		}
 }
 
-void halbtc8703b1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist
-		*btcoexist, IN u8 wifi_status)
+
+void halbtc8703b1ant_action_wifi_only(IN struct btc_coexist *btcoexist)
 {
+	halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
+	halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
+				     BT_8703B_1ANT_PHASE_2G_RUNTIME);
+	halbtc8703b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
+}
 
+void halbtc8703b1ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
+{
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean	wifi_busy = false, wifi_turbo = false;
 
+	halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
+	halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
+				     BT_8703B_1ANT_PHASE_2G_RUNTIME);
+
+	if (!bt_link_info->pan_exist)
+		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+	else
+		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
+}
 
+void halbtc8703b1ant_action_wifi_linkscan_process(IN struct btc_coexist
+		*btcoexist)
+{
+	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+
+	if (bt_link_info->pan_exist) {
+
+		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
+
+		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+
+	} else if (bt_link_info->a2dp_exist) {
+
+		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17);
+
+		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+	} else {
+
+		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 21);
+
+		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+	}
+}
+
+void halbtc8703b1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist
+		*btcoexist)
+{
+	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+	boolean	wifi_busy = false, wifi_turbo = false;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
+				&coex_sta->scan_ap_num);
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"############# [BTCoex],  scan_ap_num = %d, wl_noisy_level = %d\n",
+			coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
+	BTC_TRACE(trace_buf);
 
 #if 1
-	if ((wifi_busy) && (coex_sta->scan_ap_num <= 4))
+	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
 		wifi_turbo = true;
 #endif
 
+	   if ((coex_sta->bt_relink_downcount != 0)
+			&& (!bt_link_info->pan_exist) && (wifi_busy)) {
+
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"############# [BTCoex],  BT Re-Link + A2DP + WL busy\n");
+		BTC_TRACE(trace_buf);
+
+		/*halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);*/
+		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
+		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 
-	if (bt_link_info->hid_only) { /* HID */
-		halbtc8703b1ant_action_bt_sco_hid_only_busy(btcoexist,
-				wifi_status);
-		coex_dm->auto_tdma_adjust = false;
-		return;
 	} else if (bt_link_info->a2dp_only) { /* A2DP		 */
-		if (BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifi_status) {
+		if (!wifi_busy) {
 			halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
 						32);
 			halbtc8703b1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-			coex_dm->auto_tdma_adjust = false;
+								 NORMAL_EXEC, 4);
 		} else {
 
-			if (coex_sta->scan_ap_num >=
-			    BT_8703B_1ANT_WIFI_NOISY_THRESH)  {
-
-				if (coex_sta->is_setupLink)
-					halbtc8703b1ant_ps_tdma(btcoexist,
-							NORMAL_EXEC, true,
-								67);
-				else
-					halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
-								true,
-								17);
-			}	else {
-				if (coex_sta->is_setupLink)
-					halbtc8703b1ant_ps_tdma(btcoexist,
-							NORMAL_EXEC, true,
-								57);
-				else
-					halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
-								true,
-								7);
-			}
+			if (coex_sta->wl_noisy_level == 2)
+				halbtc8703b1ant_ps_tdma(btcoexist,
+							NORMAL_EXEC, true, 17);
+			else
+				halbtc8703b1ant_ps_tdma(btcoexist,
+							NORMAL_EXEC, true, 7);
 
-			halbtc8703b1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-			coex_dm->auto_tdma_adjust = true;
+			if (wifi_turbo)
+				halbtc8703b1ant_coex_table_with_type(btcoexist,
+								 NORMAL_EXEC, 8);
+			else
+				halbtc8703b1ant_coex_table_with_type(btcoexist,
+								 NORMAL_EXEC, 4);
 		}
-	} else if (((bt_link_info->a2dp_exist) && (bt_link_info->pan_exist)) ||
+	} else if (((bt_link_info->a2dp_exist) &&
+			(bt_link_info->pan_exist)) ||
 		   (bt_link_info->hid_exist && bt_link_info->a2dp_exist &&
 		bt_link_info->pan_exist)) { /* A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) */
 
-		if (wifi_busy)	{
+		if ((bt_link_info->hid_exist) && (coex_sta->hid_busy_num >= 2)) {
+			halbtc8703b1ant_coex_table_with_type(btcoexist,
+								 NORMAL_EXEC, 6);
+			halbtc8703b1ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x2, 0xaa,
+								0x5a, 0xaa,
+									0xaa);
+			halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							12);
+		} else if (wifi_busy)	{
 			if (((coex_sta->a2dp_bit_pool > 40) &&
-			     (coex_sta->a2dp_bit_pool < 255)) ||
-			    (!coex_sta->is_A2DP_3M))
+				 (coex_sta->a2dp_bit_pool < 255)) ||
+				(!coex_sta->is_A2DP_3M))
 				halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
 							true, 15);
 			else if (wifi_turbo)
@@ -2403,411 +2574,113 @@ void halbtc8703b1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist
 						14);
 
 		if (bt_link_info->hid_exist)
-			halbtc8703b1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 1);
+			halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
 		else if (wifi_turbo)
 			halbtc8703b1ant_coex_table_with_type(btcoexist,
-							NORMAL_EXEC, 8);
+								NORMAL_EXEC, 8);
 		else
 			halbtc8703b1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-
-		coex_dm->auto_tdma_adjust = false;
+								NORMAL_EXEC, 4);
 	} else if (bt_link_info->hid_exist &&
-		   bt_link_info->a2dp_exist) { /* HID+A2DP */
-		if (coex_sta->is_setupLink)
-			halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						58);
-		else
-			halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 8);
-		coex_dm->auto_tdma_adjust = false;
+					bt_link_info->a2dp_exist) {/* HID+A2DP */
+
+			if ((wifi_busy) && (coex_sta->hid_busy_num >= 2)) { /*for 4/18 hid */
+				halbtc8703b1ant_coex_table_with_type(btcoexist,
+								NORMAL_EXEC, 6);
+				halbtc8703b1ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x2, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
+				halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							9);
+			} else {
+				halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							8);
+				halbtc8703b1ant_coex_table_with_type(btcoexist,
+							NORMAL_EXEC, 1);
+			}
 
-		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
-	} else if ((bt_link_info->pan_only) || (bt_link_info->hid_exist &&
-		bt_link_info->pan_exist)) { /* PAN(OPP,FTP), HID+PAN(OPP,FTP)			 */
-		if (BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifi_status)
-			halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						4);
-		else
-			halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						3);
+	} else if ((bt_link_info->pan_only)
+					|| (bt_link_info->hid_exist && bt_link_info->pan_exist)) {
+			/* PAN(OPP,FTP), HID+PAN(OPP,FTP) */
+
+		if ((bt_link_info->hid_exist) && (bt_link_info->pan_exist) &&
+				(coex_sta->hid_busy_num >= 2)) {
+
+				halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6);
+				halbtc8703b1ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x2, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
+				halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							12);
+		} else {
 
-		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
-		coex_dm->auto_tdma_adjust = false;
+			if (!wifi_busy)
+				halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							4);
+			else
+				halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							3);
+
+			if (bt_link_info->hid_exist)
+				halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+			else if (wifi_turbo)
+				halbtc8703b1ant_coex_table_with_type(btcoexist,
+									 NORMAL_EXEC, 8);
+			else
+				halbtc8703b1ant_coex_table_with_type(btcoexist,
+									 NORMAL_EXEC, 4);
+		}
 	} else {
 		/* BT no-profile busy (0x9) */
 		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33);
 		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
-		coex_dm->auto_tdma_adjust = false;
 	}
 }
 
 void halbtc8703b1ant_action_wifi_not_connected(IN struct btc_coexist *btcoexist)
 {
-
 	/* tdma and coex table */
 	halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
-	halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-				     BT_8703B_1ANT_PHASE_2G_RUNTIME);
 	halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 }
 
-void halbtc8703b1ant_action_wifi_not_connected_scan(IN struct btc_coexist
-		*btcoexist)
-{
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean wifi_connected = false, bt_hs_on = false;
-	u32	wifi_link_status = 0;
-	u32	num_of_wifi_link = 0;
-	boolean	bt_ctrl_agg_buf_size = false;
-	u8	agg_buf_size = 5;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
-	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
-			   &wifi_link_status);
-
-	num_of_wifi_link = wifi_link_status >> 16;
-
-	if (num_of_wifi_link >= 2) {
-		halbtc8703b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
-		halbtc8703b1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
-					   bt_ctrl_agg_buf_size, agg_buf_size);
-
-		if (coex_sta->c2h_bt_inquiry_page) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"############# [BTCoex],  BT Is Inquirying\n");
-			BTC_TRACE(trace_buf);
-			halbtc8703b1ant_action_bt_inquiry(btcoexist);
-		} else
-			halbtc8703b1ant_action_wifi_multi_port(btcoexist);
-		return;
-	}
-
-	if (coex_sta->c2h_bt_inquiry_page) {
-		halbtc8703b1ant_action_bt_inquiry(btcoexist);
-		return;
-	} else if (bt_hs_on) {
-		halbtc8703b1ant_action_hs(btcoexist);
-		return;
-	}
-
-	/* tdma and coex table */
-	if (BT_8703B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
-		if (bt_link_info->a2dp_exist) {
-			halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						32);
-			halbtc8703b1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-		} else if (bt_link_info->a2dp_exist &&
-			   bt_link_info->pan_exist) {
-			halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						22);
-			halbtc8703b1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-		} else {
-			halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						20);
-			halbtc8703b1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-		}
-	} else if ((BT_8703B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
-		   (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY ==
-		    coex_dm->bt_status)) {
-		halbtc8703b1ant_action_bt_sco_hid_only_busy(btcoexist,
-				BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SCAN);
-	} else {
-		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-		halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-					     BT_8703B_1ANT_PHASE_2G_RUNTIME);
-		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
-	}
-}
-
-void halbtc8703b1ant_action_wifi_not_connected_asso_auth(
-	IN struct btc_coexist *btcoexist)
-{
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean wifi_connected = false, bt_hs_on = false;
-	u32	wifi_link_status = 0;
-	u32	num_of_wifi_link = 0;
-	boolean	bt_ctrl_agg_buf_size = false;
-	u8	agg_buf_size = 5;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
-	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
-			   &wifi_link_status);
-
-	num_of_wifi_link = wifi_link_status >> 16;
-
-	if (num_of_wifi_link >= 2) {
-		halbtc8703b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
-		halbtc8703b1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
-					   bt_ctrl_agg_buf_size, agg_buf_size);
-
-		if (coex_sta->c2h_bt_inquiry_page) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"############# [BTCoex],  BT Is Inquirying\n");
-			BTC_TRACE(trace_buf);
-			halbtc8703b1ant_action_bt_inquiry(btcoexist);
-		} else
-			halbtc8703b1ant_action_wifi_multi_port(btcoexist);
-		return;
-	}
-
-	if (coex_sta->c2h_bt_inquiry_page) {
-		halbtc8703b1ant_action_bt_inquiry(btcoexist);
-		return;
-	} else if (bt_hs_on) {
-		halbtc8703b1ant_action_hs(btcoexist);
-		return;
-	}
-
-	/* tdma and coex table */
-	if ((bt_link_info->sco_exist)  || (bt_link_info->hid_exist) ||
-	    (bt_link_info->a2dp_exist)) {
-		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
-		halbtc8703b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 4);
-	} else if (bt_link_info->pan_exist) {
-		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
-		halbtc8703b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 4);
-	} else {
-		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-		halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-					     BT_8703B_1ANT_PHASE_2G_RUNTIME);
-		halbtc8703b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 2);
-	}
-}
-
-void halbtc8703b1ant_action_wifi_connected_scan(IN struct btc_coexist
-		*btcoexist)
-{
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean wifi_connected = false, bt_hs_on = false;
-	u32	wifi_link_status = 0;
-	u32	num_of_wifi_link = 0;
-	boolean	bt_ctrl_agg_buf_size = false;
-	u8	agg_buf_size = 5;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
-	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
-			   &wifi_link_status);
-
-	num_of_wifi_link = wifi_link_status >> 16;
-
-	if (num_of_wifi_link >= 2) {
-		halbtc8703b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
-		halbtc8703b1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
-					   bt_ctrl_agg_buf_size, agg_buf_size);
-
-		if (coex_sta->c2h_bt_inquiry_page) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"############# [BTCoex],  BT Is Inquirying\n");
-			BTC_TRACE(trace_buf);
-			halbtc8703b1ant_action_bt_inquiry(btcoexist);
-		} else
-			halbtc8703b1ant_action_wifi_multi_port(btcoexist);
-		return;
-	}
-
-	if (coex_sta->c2h_bt_inquiry_page) {
-		halbtc8703b1ant_action_bt_inquiry(btcoexist);
-		return;
-	} else if (bt_hs_on) {
-		halbtc8703b1ant_action_hs(btcoexist);
-		return;
-	}
-
-	/* tdma and coex table */
-	if (BT_8703B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
-		if (bt_link_info->a2dp_exist) {
-			halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						32);
-			halbtc8703b1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-		} else if (bt_link_info->a2dp_exist &&
-			   bt_link_info->pan_exist) {
-			halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						22);
-			halbtc8703b1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-		} else {
-			halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						20);
-			halbtc8703b1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-		}
-	} else if ((BT_8703B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
-		   (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY ==
-		    coex_dm->bt_status)) {
-		halbtc8703b1ant_action_bt_sco_hid_only_busy(btcoexist,
-				BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SCAN);
-	} else {
-		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-		halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-					     BT_8703B_1ANT_PHASE_2G_RUNTIME);
-		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
-	}
-}
-
-void halbtc8703b1ant_action_wifi_connected_specific_packet(
-	IN struct btc_coexist *btcoexist)
-{
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean wifi_connected = false, bt_hs_on = false;
-	u32	wifi_link_status = 0;
-	u32	num_of_wifi_link = 0;
-	boolean	bt_ctrl_agg_buf_size = false;
-	u8	agg_buf_size = 5;
-	boolean wifi_busy = false;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
-	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
-			   &wifi_link_status);
-
-	num_of_wifi_link = wifi_link_status >> 16;
-
-	if (num_of_wifi_link >= 2) {
-		halbtc8703b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
-		halbtc8703b1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
-					   bt_ctrl_agg_buf_size, agg_buf_size);
-
-		if (coex_sta->c2h_bt_inquiry_page) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"############# [BTCoex],  BT Is Inquirying\n");
-			BTC_TRACE(trace_buf);
-			halbtc8703b1ant_action_bt_inquiry(btcoexist);
-		} else
-			halbtc8703b1ant_action_wifi_multi_port(btcoexist);
-		return;
-	}
-
-	if (coex_sta->c2h_bt_inquiry_page) {
-		halbtc8703b1ant_action_bt_inquiry(btcoexist);
-		return;
-	} else if (bt_hs_on) {
-		halbtc8703b1ant_action_hs(btcoexist);
-		return;
-	}
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
-
-	/* no specific packet process for both WiFi and BT very busy */
-	if ((wifi_busy) && ((bt_link_info->pan_exist) ||
-			    (coex_sta->num_of_profile >= 2)))
-		return;
-
-	/* tdma and coex table */
-	if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist)) {
-		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
-		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
-	} else if (bt_link_info->a2dp_exist) {
-		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
-		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
-	} else if (bt_link_info->pan_exist) {
-		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
-		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
-	} else {
-		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-		halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-					     BT_8703B_1ANT_PHASE_2G_RUNTIME);
-		halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
-	}
-}
-
 void halbtc8703b1ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
 {
-	boolean	wifi_busy = false;
-	boolean		scan = false, link = false, roam = false;
-	boolean		under_4way = false, ap_enable = false;
+	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+	boolean wifi_busy = false;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "[BTCoex], CoexForWifiConnect()===>\n");
+			"[BTCoex], CoexForWifiConnect()===>\n");
 	BTC_TRACE(trace_buf);
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
-			   &under_4way);
-	if (under_4way) {
-		halbtc8703b1ant_action_wifi_connected_specific_packet(
-			btcoexist);
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], CoexForWifiConnect(), return for wifi is under 4way<===\n");
-		BTC_TRACE(trace_buf);
-		return;
-	}
+	halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
+					NORMAL_EXEC,
+					BT_8703B_1ANT_PHASE_2G_RUNTIME);
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
-	if (scan || link || roam) {
-		if (scan)
-			halbtc8703b1ant_action_wifi_connected_scan(btcoexist);
-		else
-			halbtc8703b1ant_action_wifi_connected_specific_packet(
-				btcoexist);
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n");
-		BTC_TRACE(trace_buf);
-		return;
-	}
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
-			   &ap_enable);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+	if (BT_8703B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
 
+		if (bt_link_info->hid_only)/* HID only */
+			halbtc8703b1ant_action_bt_sco_hid_only_busy(btcoexist);
+		else
+			halbtc8703b1ant_action_wifi_connected_bt_acl_busy(btcoexist);
 
-	/* tdma and coex table */
-	if (!wifi_busy) {
-		if (BT_8703B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
-			halbtc8703b1ant_action_wifi_connected_bt_acl_busy(
-				btcoexist,
-				BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE);
-		} else if ((BT_8703B_1ANT_BT_STATUS_SCO_BUSY ==
-			    coex_dm->bt_status) ||
+	} else if ((BT_8703B_1ANT_BT_STATUS_SCO_BUSY ==
+				coex_dm->bt_status) ||
 			   (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY ==
-			    coex_dm->bt_status)) {
-			halbtc8703b1ant_action_bt_sco_hid_only_busy(btcoexist,
-				BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE);
-		} else {
-			halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
-						8);
-			halbtc8703b1ant_set_ant_path(btcoexist,
-					     BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-					     BT_8703B_1ANT_PHASE_2G_RUNTIME);
-			halbtc8703b1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 2);
-		}
-	} else {
-		if (BT_8703B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
-			halbtc8703b1ant_action_wifi_connected_bt_acl_busy(
-				btcoexist,
-				BT_8703B_1ANT_WIFI_STATUS_CONNECTED_BUSY);
-		} else if ((BT_8703B_1ANT_BT_STATUS_SCO_BUSY ==
-			    coex_dm->bt_status) ||
-			   (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY ==
-			    coex_dm->bt_status)) {
-			halbtc8703b1ant_action_bt_sco_hid_only_busy(btcoexist,
-				BT_8703B_1ANT_WIFI_STATUS_CONNECTED_BUSY);
-		} else {
-			/* halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8); */
-			halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						32);
-			halbtc8703b1ant_set_ant_path(btcoexist,
-					     BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-					     BT_8703B_1ANT_PHASE_2G_RUNTIME);
-			/* halbtc8703b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);	 */
-			halbtc8703b1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-		}
-	}
+				coex_dm->bt_status)) {
+			halbtc8703b1ant_action_bt_sco_hid_only_busy(btcoexist);
+	} else
+		halbtc8703b1ant_action_bt_idle(btcoexist);
 }
 
+
 void halbtc8703b1ant_run_sw_coexist_mechanism(IN struct btc_coexist *btcoexist)
 {
-	u8				algorithm = 0;
+	u8	algorithm = 0;
 
 	algorithm = halbtc8703b1ant_action_algorithm(btcoexist);
 	coex_dm->cur_algorithm = algorithm;
@@ -2820,67 +2693,56 @@ void halbtc8703b1ant_run_sw_coexist_mechanism(IN struct btc_coexist *btcoexist)
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = SCO.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8703b1ant_action_sco(btcoexist); */
 			break;
 		case BT_8703B_1ANT_COEX_ALGO_HID:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = HID.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8703b1ant_action_hid(btcoexist); */
 			break;
 		case BT_8703B_1ANT_COEX_ALGO_A2DP:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = A2DP.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8703b1ant_action_a2dp(btcoexist); */
 			break;
 		case BT_8703B_1ANT_COEX_ALGO_A2DP_PANHS:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], Action algorithm = A2DP+PAN(HS).\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8703b1ant_action_a2dp_pan_hs(btcoexist); */
 			break;
 		case BT_8703B_1ANT_COEX_ALGO_PANEDR:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = PAN(EDR).\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8703b1ant_action_pan_edr(btcoexist); */
 			break;
 		case BT_8703B_1ANT_COEX_ALGO_PANHS:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = HS mode.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8703b1ant_action_pan_hs(btcoexist); */
 			break;
 		case BT_8703B_1ANT_COEX_ALGO_PANEDR_A2DP:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = PAN+A2DP.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8703b1ant_action_pan_edr_a2dp(btcoexist); */
 			break;
 		case BT_8703B_1ANT_COEX_ALGO_PANEDR_HID:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], Action algorithm = PAN(EDR)+HID.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8703b1ant_action_pan_edr_hid(btcoexist); */
 			break;
 		case BT_8703B_1ANT_COEX_ALGO_HID_A2DP_PANEDR:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], Action algorithm = HID+A2DP+PAN.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8703b1ant_action_hid_a2dp_pan_edr(btcoexist); */
 			break;
 		case BT_8703B_1ANT_COEX_ALGO_HID_A2DP:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = HID+A2DP.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8703b1ant_action_hid_a2dp(btcoexist); */
 			break;
 		default:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], Action algorithm = coexist All Off!!\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8703b1ant_coex_all_off(btcoexist); */
 			break;
 		}
 		coex_dm->pre_algorithm = coex_dm->cur_algorithm;
@@ -2889,18 +2751,25 @@ void halbtc8703b1ant_run_sw_coexist_mechanism(IN struct btc_coexist *btcoexist)
 
 void halbtc8703b1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 {
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean	wifi_connected = false, bt_hs_on = false;
-	boolean	increase_scan_dev_num = false;
-	boolean	bt_ctrl_agg_buf_size = false;
-	boolean	miracast_plus_bt = false;
+	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+	boolean wifi_connected = false, bt_hs_on = false;
+	boolean increase_scan_dev_num = false;
+	boolean bt_ctrl_agg_buf_size = false;
+	boolean miracast_plus_bt = false, wifi_under_5g = false;
 	u8	agg_buf_size = 5;
-	u32	wifi_link_status = 0;
-	u32	num_of_wifi_link = 0, wifi_bw;
+	u32 wifi_link_status = 0;
+	u32 num_of_wifi_link = 0, wifi_bw;
 	u8	iot_peer = BTC_IOT_PEER_UNKNOWN;
+	boolean scan = false, link = false, roam = false, under_4way = false;
+
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
+			&under_4way);
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "[BTCoex], RunCoexistMechanism()===>\n");
+			"[BTCoex], RunCoexistMechanism()===>\n");
 	BTC_TRACE(trace_buf);
 
 	if (btcoexist->manual_control) {
@@ -2919,7 +2788,7 @@ void halbtc8703b1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 
 	if (coex_sta->under_ips) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], wifi is under IPS !!!\n");
+				"[BTCoex], wifi is under IPS !!!\n");
 		BTC_TRACE(trace_buf);
 		return;
 	}
@@ -2931,211 +2800,190 @@ void halbtc8703b1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 		return;
 	}
 
+	if (coex_sta->freeze_coexrun_by_btinfo) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], BtInfoNotify(), return for freeze_coexrun_by_btinfo\n");
+		BTC_TRACE(trace_buf);
+		return;
+	}
+
 	if (coex_sta->bt_whck_test) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], BT is under WHCK TEST!!!\n");
+				"[BTCoex], BT is under WHCK TEST!!!\n");
 		BTC_TRACE(trace_buf);
-		halbtc8703b1ant_action_bt_whck_test(btcoexist);
+		halbtc8703b1ant_action_bt_whql_test(btcoexist);
 		return;
 	}
 
 	if (coex_sta->bt_disabled) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], BT is disabled !!!\n");
+				"[BTCoex], BT is disabled !!!\n");
 		halbtc8703b1ant_action_wifi_only(btcoexist);
 		return;
 	}
 
+	if (coex_sta->c2h_bt_inquiry_page) {
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					"[BTCoex], BT is under inquiry/page scan !!\n");
+			BTC_TRACE(trace_buf);
+			halbtc8703b1ant_action_bt_inquiry(btcoexist);
+			return;
+	}
+
+	if (coex_sta->is_setupLink) {
+		 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		 "[BTCoex], BT is re-link !!!\n");
+		 halbtc8703b1ant_action_bt_relink(btcoexist);
+		 return;
+	}
+
 	if ((BT_8703B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
-	    (BT_8703B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
-	    (BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status))
+		(BT_8703B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
+		(BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status))
 		increase_scan_dev_num = true;
 
 	btcoexist->btc_set(btcoexist, BTC_SET_BL_INC_SCAN_DEV_NUM,
-			   &increase_scan_dev_num);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
-			   &wifi_connected);
+				&increase_scan_dev_num);
 
 	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
-			   &wifi_link_status);
+				&wifi_link_status);
+
 	num_of_wifi_link = wifi_link_status >> 16;
 
 	if ((num_of_wifi_link >= 2) ||
-	    (wifi_link_status & WIFI_P2P_GO_CONNECTED)) {
+		(wifi_link_status & WIFI_P2P_GO_CONNECTED)) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"############# [BTCoex],  Multi-Port num_of_wifi_link = %d, wifi_link_status = 0x%x\n",
-			    num_of_wifi_link, wifi_link_status);
+				num_of_wifi_link, wifi_link_status);
 		BTC_TRACE(trace_buf);
 
-		if (bt_link_info->bt_link_exist) {
-			halbtc8703b1ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 1,
-						   0, 1);
+		if (bt_link_info->bt_link_exist)
 			miracast_plus_bt = true;
-		} else {
-			halbtc8703b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0,
-						   0, 0);
+		else
 			miracast_plus_bt = false;
-		}
+
 		btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
 				   &miracast_plus_bt);
+
 		halbtc8703b1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
-					   bt_ctrl_agg_buf_size, agg_buf_size);
+					false, 0x5);
 
-		if (coex_sta->c2h_bt_inquiry_page) {
+		if (scan || link || roam || under_4way) {
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"############# [BTCoex],  BT Is Inquirying\n");
+				"[BTCoex], scan = %d, link = %d, roam = %d 4way = %d!!!\n",
+				    scan, link, roam, under_4way);
 			BTC_TRACE(trace_buf);
-			halbtc8703b1ant_action_bt_inquiry(btcoexist);
+
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], wifi is under linkscan process + Multi-Port !!\n");
+			BTC_TRACE(trace_buf);
+
+			halbtc8703b1ant_action_wifi_linkscan_process(btcoexist);
 		} else
-			halbtc8703b1ant_action_wifi_multi_port(btcoexist);
+		halbtc8703b1ant_action_wifi_multi_port(btcoexist);
 
 		return;
-	}
+	} else {
 
 	miracast_plus_bt = false;
 	btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
-			   &miracast_plus_bt);
+				&miracast_plus_bt);
+	}
 
 	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, &wifi_connected);
 
 	if ((bt_link_info->bt_link_exist) && (wifi_connected)) {
-		halbtc8703b1ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 1, 0, 1);
 
 		btcoexist->btc_get(btcoexist, BTC_GET_U1_IOT_PEER, &iot_peer);
 
-		if (BTC_IOT_PEER_CISCO != iot_peer) {
-			if (bt_link_info->sco_exist) /* if (bt_link_info->bt_hi_pri_link_exist) */
-				halbtc8703b1ant_limited_rx(btcoexist,
-					   NORMAL_EXEC, true, false, 0x5);
-			else
-				halbtc8703b1ant_limited_rx(btcoexist,
-					   NORMAL_EXEC, false, false, 0x5);
-		} else {
-			if (bt_link_info->sco_exist)
-				halbtc8703b1ant_limited_rx(btcoexist,
-					   NORMAL_EXEC, true, false, 0x5);
-			else {
-				if (BTC_WIFI_BW_HT40 == wifi_bw)
+		if (BTC_IOT_PEER_CISCO == iot_peer) {
+
+			if (BTC_WIFI_BW_HT40 == wifi_bw)
 					halbtc8703b1ant_limited_rx(btcoexist,
 						NORMAL_EXEC, false, true, 0x10);
-				else
+			else
 					halbtc8703b1ant_limited_rx(btcoexist,
 						NORMAL_EXEC, false, true, 0x8);
-			}
-		}
+		}  else
+				halbtc8703b1ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
+						0x5);
+	}
 
-		halbtc8703b1ant_sw_mechanism(btcoexist, true);
-		halbtc8703b1ant_run_sw_coexist_mechanism(
+	halbtc8703b1ant_run_sw_coexist_mechanism(
 			btcoexist);  /* just print debug message */
-	} else {
-		halbtc8703b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
 
-		halbtc8703b1ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
-					   0x5);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
 
-		halbtc8703b1ant_sw_mechanism(btcoexist, false);
-		halbtc8703b1ant_run_sw_coexist_mechanism(
-			btcoexist); /* just print debug message */
+	if (bt_hs_on) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"############# [BTCoex],  BT Is hs\n");
+		BTC_TRACE(trace_buf);
+		halbtc8703b1ant_action_bt_hs(btcoexist);
+		return;
 	}
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
-	if (coex_sta->c2h_bt_inquiry_page) {
+	if ((BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
+			coex_dm->bt_status) ||
+		(BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE ==
+			coex_dm->bt_status)) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "############# [BTCoex],  BT Is Inquirying\n");
+				"############# [BTCoex],  BT Is idle\n");
 		BTC_TRACE(trace_buf);
-		halbtc8703b1ant_action_bt_inquiry(btcoexist);
-		return;
-	} else if (bt_hs_on) {
-		halbtc8703b1ant_action_hs(btcoexist);
+		halbtc8703b1ant_action_bt_idle(btcoexist);
 		return;
 	}
 
-
-	if (!wifi_connected) {
-		boolean	scan = false, link = false, roam = false;
+	if (scan || link || roam || under_4way) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], scan = %d, link = %d, roam = %d 4way = %d!!!\n",
+					scan, link, roam, under_4way);
+		BTC_TRACE(trace_buf);
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], wifi is non connected-idle !!!\n");
+			"[BTCoex], wifi is under linkscan process!!\n");
 		BTC_TRACE(trace_buf);
 
-		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
-		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
-		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
+		halbtc8703b1ant_action_wifi_linkscan_process(btcoexist);
+	} else if (wifi_connected) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], wifi is under connected!!\n");
+		BTC_TRACE(trace_buf);
 
-		if (scan || link || roam) {
-			if (scan)
-				halbtc8703b1ant_action_wifi_not_connected_scan(
-					btcoexist);
-			else
-				halbtc8703b1ant_action_wifi_not_connected_asso_auth(
-					btcoexist);
-		} else
-			halbtc8703b1ant_action_wifi_not_connected(btcoexist);
-	} else	/* wifi LPS/Busy */
 		halbtc8703b1ant_action_wifi_connected(btcoexist);
-}
-
-u32 halbtc8703b1ant_psd_log2base(IN struct btc_coexist *btcoexist, IN u32 val)
-{
-	u8	j;
-	u32	tmp, tmp2, val_integerd_b = 0, tindex, shiftcount = 0;
-	u32	result, val_fractiond_b = 0, table_fraction[21] = {0, 432, 332, 274, 232, 200,
-				   174, 151, 132, 115, 100, 86, 74, 62, 51, 42,
-							   32, 23, 15, 7, 0
-							      };
-
-	if (val == 0)
-		return 0;
-
-	tmp = val;
-
-	while (1) {
-		if (tmp == 1)
-			break;
-
-		tmp = (tmp >> 1);
-		shiftcount++;
-	}
-
-
-	val_integerd_b = shiftcount + 1;
-
-	tmp2 = 1;
-	for (j = 1; j <= val_integerd_b; j++)
-		tmp2 = tmp2 * 2;
-
-	tmp = (val * 100) / tmp2;
-	tindex = tmp / 5;
-
-	if (tindex > 20)
-		tindex = 20;
-
-	val_fractiond_b = table_fraction[tindex];
-
-	result = val_integerd_b * 100 - val_fractiond_b;
-
-	return result;
-
+	} else {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], wifi is under not-connected!!\n");
+		BTC_TRACE(trace_buf);
 
+		halbtc8703b1ant_action_wifi_not_connected(btcoexist);
+	 }
 }
 
+
 void halbtc8703b1ant_init_coex_dm(IN struct btc_coexist *btcoexist)
 {
 	/* force to reset coex mechanism */
 
-	/* sw all off */
-	halbtc8703b1ant_sw_mechanism(btcoexist, false);
+	halbtc8703b1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, false);
 
-	/* halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8); */
-	/* halbtc8703b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); */
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		    "[BTCoex], Coex Mechanism Init!!\n");
+	BTC_TRACE(trace_buf);
 
 	coex_sta->pop_event_cnt = 0;
+	coex_sta->cnt_RemoteNameReq = 0;
+	coex_sta->cnt_ReInit = 0;
+	coex_sta->cnt_setupLink = 0;
+	coex_sta->cnt_IgnWlanAct = 0;
+	coex_sta->cnt_Page = 0;
 }
 
 void halbtc8703b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 				    IN boolean back_up, IN boolean wifi_only)
 {
 	u32				u32tmp0 = 0, u32tmp1 = 0, u32tmp2 = 0;
+	u8 i = 0;
 
 	u32tmp0 = btcoexist->btc_read_4byte(btcoexist, 0x70),
 	u32tmp1 = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
@@ -3153,7 +3001,15 @@ void halbtc8703b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 
 	coex_sta->bt_coex_supported_feature = 0;
 	coex_sta->bt_coex_supported_version = 0;
+	coex_sta->bt_ble_scan_type = 0;
+	coex_sta->bt_ble_scan_para[0] = 0;
+	coex_sta->bt_ble_scan_para[1] = 0;
+	coex_sta->bt_ble_scan_para[2] = 0;
+	coex_sta->gnt_error_cnt = 0;
+	coex_sta->bt_relink_downcount = 0;
 
+	for (i = 0; i <= 9; i++)
+		coex_sta->bt_afh_map[i] = 0;
 
 	/* 0xf0[15:12] --> Chip Cut information */
 	coex_sta->cut_version = (btcoexist->btc_read_1byte(btcoexist,
@@ -3178,7 +3034,8 @@ void halbtc8703b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 	halbtc8703b1ant_enable_gnt_to_gpio(btcoexist, false);
 
 	if (btcoexist->btc_read_1byte(btcoexist, 0x80) == 0xc6)
-		halbtc8703b1ant_post_onoffState_to_bt(btcoexist, true);
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+					 BT_8703B_1ANT_SCOREBOARD_ONOFF, true);
 
 	halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
 
@@ -3215,527 +3072,6 @@ void halbtc8703b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 
 
 
-void halbtc8703b1ant_psd_showdata(IN struct btc_coexist *btcoexist)
-{
-	u8		*cli_buf = btcoexist->cli_buf;
-	u32		delta_freq_per_point;
-	u32		freq, freq1, freq2, n = 0, i = 0, j = 0, m = 0, psd_rep1, psd_rep2;
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n\n============[PSD info]  (%d)============\n",
-		   psd_scan->psd_gen_count);
-	CL_PRINTF(cli_buf);
-
-	if (psd_scan->psd_gen_count == 0) {
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n No data !!\n");
-		CL_PRINTF(cli_buf);
-		return;
-	}
-
-	if (psd_scan->psd_point == 0)
-		delta_freq_per_point = 0;
-	else
-		delta_freq_per_point = psd_scan->psd_band_width /
-				       psd_scan->psd_point;
-
-	/* if (psd_scan->is_psd_show_max_only) */
-	if (0) {
-		psd_rep1 = psd_scan->psd_max_value / 100;
-		psd_rep2 = psd_scan->psd_max_value - psd_rep1 * 100;
-
-		freq = ((psd_scan->real_cent_freq - 20) * 1000000 +
-			psd_scan->psd_max_value_point * delta_freq_per_point);
-		freq1 = freq / 1000000;
-		freq2 = freq / 1000 - freq1 * 1000;
-
-		if (freq2 < 100)
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   "\r\n Freq = %d.0%d MHz",
-				   freq1, freq2);
-		else
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   "\r\n Freq = %d.%d MHz",
-				   freq1, freq2);
-
-		if (psd_rep2 < 10)
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   ", Value = %d.0%d dB, (%d)\n",
-				   psd_rep1, psd_rep2, psd_scan->psd_max_value);
-		else
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   ", Value = %d.%d dB, (%d)\n",
-				   psd_rep1, psd_rep2, psd_scan->psd_max_value);
-
-		CL_PRINTF(cli_buf);
-	} else {
-		m = psd_scan->psd_start_point;
-		n = psd_scan->psd_start_point;
-		i = 1;
-		j = 1;
-
-		while (1) {
-			do {
-				freq = ((psd_scan->real_cent_freq - 20) *
-					1000000 + m *
-					delta_freq_per_point);
-				freq1 = freq / 1000000;
-				freq2 = freq / 1000 - freq1 * 1000;
-
-				if (i == 1) {
-					if (freq2 == 0)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Freq%6d.000",
-							   freq1);
-					else if (freq2 < 100)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Freq%6d.0%2d",
-							   freq1,
-							   freq2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Freq%6d.%3d",
-							   freq1,
-							   freq2);
-				} else if ((i % 8 == 0) ||
-					   (m == psd_scan->psd_stop_point)) {
-					if (freq2 == 0)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.000\n", freq1);
-					else if (freq2 < 100)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.0%2d\n", freq1,
-							   freq2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.%3d\n", freq1,
-							   freq2);
-				} else {
-					if (freq2 == 0)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.000", freq1);
-					else if (freq2 < 100)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.0%2d", freq1,
-							   freq2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.%3d", freq1,
-							   freq2);
-				}
-
-				i++;
-				m++;
-				CL_PRINTF(cli_buf);
-
-			} while ((i <= 8) && (m <= psd_scan->psd_stop_point));
-
-
-			do {
-				psd_rep1 = psd_scan->psd_report_max_hold[n] /
-					   100;
-				psd_rep2 = psd_scan->psd_report_max_hold[n] -
-					   psd_rep1 *
-					   100;
-
-				if (j == 1) {
-					if (psd_rep2 < 10)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Val %7d.0%d",
-							   psd_rep1,
-							   psd_rep2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Val %7d.%d",
-							   psd_rep1,
-							   psd_rep2);
-				} else if ((j % 8 == 0)  ||
-					   (n == psd_scan->psd_stop_point)) {
-					if (psd_rep2 < 10)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							"%7d.0%d\n", psd_rep1,
-							   psd_rep2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%7d.%d\n", psd_rep1,
-							   psd_rep2);
-				} else {
-					if (psd_rep2 < 10)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%7d.0%d", psd_rep1,
-							   psd_rep2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%7d.%d", psd_rep1,
-							   psd_rep2);
-				}
-
-				j++;
-				n++;
-				CL_PRINTF(cli_buf);
-
-			} while ((j <= 8) && (n <= psd_scan->psd_stop_point));
-
-			if ((m > psd_scan->psd_stop_point) ||
-			    (n > psd_scan->psd_stop_point))
-				break;
-
-			i = 1;
-			j = 1;
-
-		}
-	}
-
-
-}
-
-void halbtc8703b1ant_psd_maxholddata(IN struct btc_coexist *btcoexist,
-				     IN u32 gen_count)
-{
-	u32	i = 0, i_max = 0, val_max = 0;
-
-	if (gen_count == 1) {
-		memcpy(psd_scan->psd_report_max_hold,
-		       psd_scan->psd_report,
-		       BT_8703B_1ANT_ANTDET_PSD_POINTS * sizeof(u32));
-
-		for (i = psd_scan->psd_start_point;
-		     i <= psd_scan->psd_stop_point; i++) {
-
-		}
-
-		psd_scan->psd_max_value_point = 0;
-		psd_scan->psd_max_value = 0;
-
-	} else {
-		for (i = psd_scan->psd_start_point;
-		     i <= psd_scan->psd_stop_point; i++) {
-			if (psd_scan->psd_report[i] >
-			    psd_scan->psd_report_max_hold[i])
-				psd_scan->psd_report_max_hold[i] =
-					psd_scan->psd_report[i];
-
-			/* search Max Value */
-			if (i == psd_scan->psd_start_point) {
-				i_max = i;
-				val_max = psd_scan->psd_report_max_hold[i];
-			} else {
-				if (psd_scan->psd_report_max_hold[i] >
-				    val_max) {
-					i_max = i;
-					val_max = psd_scan->psd_report_max_hold[i];
-				}
-			}
-
-
-		}
-
-		psd_scan->psd_max_value_point = i_max;
-		psd_scan->psd_max_value = val_max;
-
-	}
-
-
-}
-
-u32 halbtc8703b1ant_psd_getdata(IN struct btc_coexist *btcoexist, IN u32 point)
-{
-	/* reg 0x808[9:0]: FFT data x */
-	/* reg 0x808[22]: 0-->1 to get 1 FFT data y */
-	/* reg 0x8b4[15:0]: FFT data y report */
-
-	u32 val = 0, psd_report = 0;
-
-	val = btcoexist->btc_read_4byte(btcoexist, 0x808);
-
-	val &= 0xffbffc00;
-	val |= point;
-
-	btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-	val |= 0x00400000;
-	btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-
-	val = btcoexist->btc_read_4byte(btcoexist, 0x8b4);
-
-	psd_report = val & 0x0000ffff;
-
-	return psd_report;
-}
-
-
-boolean halbtc8703b1ant_psd_sweep_point(IN struct btc_coexist *btcoexist,
-		IN u32 cent_freq, IN s32 offset, IN u32 span, IN u32 points,
-					IN u32 avgnum, IN u32 loopcnt)
-{
-	u32	 i = 0, val = 0, n = 0, k = 0, j, point_index = 0;
-	u32	points1 = 0, psd_report = 0;
-	u32	start_p = 0, stop_p = 0, delta_freq_per_point = 156250;
-	u32    psd_center_freq = 20 * 10 ^ 6;
-	boolean outloop = false, scan , roam, is_sweep_ok = true;
-	u8	 flag = 0;
-	u32	tmp = 0, u32tmp1 = 0;
-	u32	wifi_original_channel = 1;
-
-	psd_scan->is_psd_running = true;
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "xxxxxxxxxxxxxxxx PSD Sweep Start!!\n");
-	BTC_TRACE(trace_buf);
-
-	do {
-		switch (flag) {
-		case 0:  /* Get PSD parameters */
-		default:
-
-			psd_scan->psd_band_width = 40 * 1000000;
-			psd_scan->psd_point = points;
-			psd_scan->psd_start_base = points / 2;
-			psd_scan->psd_avg_num = avgnum;
-			psd_scan->real_cent_freq = cent_freq;
-			psd_scan->real_offset = offset;
-			psd_scan->real_span = span;
-
-
-			points1 = psd_scan->psd_point;
-			delta_freq_per_point = psd_scan->psd_band_width /
-					       psd_scan->psd_point;
-
-			/* PSD point setup */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x808);
-			val &= 0xffff0fff;
-
-			switch (psd_scan->psd_point) {
-			case 128:
-				val |= 0x0;
-				break;
-			case 256:
-			default:
-				val |= 0x00004000;
-				break;
-			case 512:
-				val |= 0x00008000;
-				break;
-			case 1024:
-				val |= 0x0000c000;
-				break;
-			}
-
-			switch (psd_scan->psd_avg_num) {
-			case 1:
-				val |= 0x0;
-				break;
-			case 8:
-				val |= 0x00001000;
-				break;
-			case 16:
-				val |= 0x00002000;
-				break;
-			case 32:
-			default:
-				val |= 0x00003000;
-				break;
-			}
-			btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-			flag = 1;
-			break;
-		case 1:	  /* calculate the PSD point index from freq/offset/span */
-			psd_center_freq = psd_scan->psd_band_width / 2 +
-					  offset * (1000000);
-
-			start_p = psd_scan->psd_start_base + (psd_center_freq -
-				span * (1000000) / 2) / delta_freq_per_point;
-			psd_scan->psd_start_point = start_p -
-						    psd_scan->psd_start_base;
-
-			stop_p = psd_scan->psd_start_base + (psd_center_freq +
-				span * (1000000) / 2) / delta_freq_per_point;
-			psd_scan->psd_stop_point = stop_p -
-						   psd_scan->psd_start_base - 1;
-
-			flag = 2;
-			break;
-		case 2:  /* set RF channel/BW/Mode */
-
-			/* set 3-wire off */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x88c);
-			val |= 0x00300000;
-			btcoexist->btc_write_4byte(btcoexist, 0x88c, val);
-
-			/* CCK off */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x800);
-			val &= 0xfeffffff;
-			btcoexist->btc_write_4byte(btcoexist, 0x800, val);
-
-			/* Tx-pause on */
-			btcoexist->btc_write_1byte(btcoexist, 0x522, 0x6f);
-
-			/* store WiFi original channel */
-			wifi_original_channel = btcoexist->btc_get_rf_reg(
-					btcoexist, BTC_RF_A, 0x18, 0x3ff);
-
-			/* Set RF channel */
-			if (cent_freq == 2484)
-				btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
-							  0x18, 0x3ff, 0xe);
-			else
-				btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
-					  0x18, 0x3ff, (cent_freq - 2412) / 5 +
-						  1); /* WiFi TRx Mask on */
-
-			/* save original RCK value */
-			u32tmp1 =  btcoexist->btc_get_rf_reg(
-					   btcoexist, BTC_RF_A, 0x1d, 0xfffff);
-
-			/* Enter debug mode */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xde,
-						  0x2, 0x1);
-
-			/* Set RF Rx filter corner */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1d,
-						  0xfffff, 0x2e);
-
-
-			/* Set  RF mode = Rx, RF Gain = 0x320a0 */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x0,
-						  0xfffff, 0x320a0);
-
-			while (1) {
-				if (k++ > BT_8703B_1ANT_ANTDET_SWEEPPOINT_DELAY)
-					break;
-			}
-			flag = 3;
-			break;
-		case 3:
-			psd_scan->psd_gen_count = 0;
-			for (j = 1; j <= loopcnt; j++) {
-
-				btcoexist->btc_get(btcoexist,
-						   BTC_GET_BL_WIFI_SCAN, &scan);
-				btcoexist->btc_get(btcoexist,
-						   BTC_GET_BL_WIFI_ROAM, &roam);
-
-				if (scan || roam) {
-					is_sweep_ok = false;
-					break;
-				}
-				memset(psd_scan->psd_report, 0,
-				       psd_scan->psd_point * sizeof(u32));
-				start_p = psd_scan->psd_start_point +
-					  psd_scan->psd_start_base;
-				stop_p = psd_scan->psd_stop_point +
-					 psd_scan->psd_start_base + 1;
-
-				i = start_p;
-				point_index = 0;
-
-				while (i < stop_p) {
-					if (i >= points1)
-						psd_report =
-							halbtc8703b1ant_psd_getdata(
-							btcoexist, i - points1);
-					else
-						psd_report =
-							halbtc8703b1ant_psd_getdata(
-								btcoexist, i);
-
-					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-						"Point=%d, psd_raw_data = 0x%08x\n",
-						    i, psd_report);
-					BTC_TRACE(trace_buf);
-					if (psd_report == 0)
-						tmp = 0;
-					else
-						/* tmp =  20*log10((double)psd_report); */
-						/* 20*log2(x)/log2(10), log2Base return theresult of the psd_report*100 */
-						tmp = 6 * halbtc8703b1ant_psd_log2base(
-							btcoexist, psd_report);
-
-					n = i - psd_scan->psd_start_base;
-					psd_scan->psd_report[n] =  tmp;
-
-
-					halbtc8703b1ant_psd_maxholddata(
-						btcoexist, j);
-
-					i++;
-
-				}
-
-				psd_scan->psd_gen_count = j;
-			}
-
-			flag = 100;
-			break;
-		case 99:	/* error */
-
-			outloop = true;
-			break;
-		case 100: /* recovery */
-
-			/* set 3-wire on */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x88c);
-			val &= 0xffcfffff;
-			btcoexist->btc_write_4byte(btcoexist, 0x88c, val);
-
-			/* CCK on */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x800);
-			val |= 0x01000000;
-			btcoexist->btc_write_4byte(btcoexist, 0x800, val);
-
-			/* Tx-pause off */
-			btcoexist->btc_write_1byte(btcoexist, 0x522, 0x0);
-
-			/* PSD off */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x808);
-			val &= 0xffbfffff;
-			btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-			/* restore RF Rx filter corner */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1d,
-						  0xfffff, u32tmp1);
-
-			/* Exit debug mode */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xde,
-						  0x2, 0x0);
-
-			/* restore WiFi original channel */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x18,
-						  0x3ff, wifi_original_channel);
-
-			outloop = true;
-			break;
-
-		}
-
-	} while (!outloop);
-
-
-
-	psd_scan->is_psd_running = false;
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "xxxxxxxxxxxxxxxx PSD Sweep Stop!!\n");
-	BTC_TRACE(trace_buf);
-	return is_sweep_ok;
-
-}
-
 /* ************************************************************
  * work around function start with wa_halbtc8703b1ant_
  * ************************************************************
@@ -3895,6 +3231,7 @@ void ex_halbtc8703b1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	}
 
 
+	/*bt_patch_ver = btcoexist->bt_info.bt_get_fw_ver;*/
 	bt_patch_ver = btcoexist->bt_info.bt_get_fw_ver;
 	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
 	phyver = btcoexist->btc_get_bt_phydm_version(btcoexist);
@@ -3965,7 +3302,9 @@ void ex_halbtc8703b1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 			   "Profiles",
 			   ((bt_link_info->a2dp_exist) ? "A2DP," : ""),
 			   ((bt_link_info->sco_exist) ?  "SCO," : ""),
-			   ((bt_link_info->hid_exist) ?  "HID," : ""),
+			   ((bt_link_info->hid_exist) ?
+			    ((coex_sta->hid_busy_num >= 2) ? "HID(4/18)," :
+			     "HID(2/18),") : ""),
 			   ((bt_link_info->pan_exist) ?  "PAN," : ""),
 			   ((coex_sta->voice_over_HOGP) ? "Voice" : ""));
 	else
@@ -4018,6 +3357,24 @@ void ex_halbtc8703b1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		   "ScoreBoard[14:0] (from BT)", u16tmp[0]);
 	CL_PRINTF(cli_buf);
 
+	if (coex_sta->num_of_profile > 0) {
+
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+			"\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
+			"AFH MAP",
+			coex_sta->bt_afh_map[0],
+			coex_sta->bt_afh_map[1],
+			coex_sta->bt_afh_map[2],
+			coex_sta->bt_afh_map[3],
+			coex_sta->bt_afh_map[4],
+			coex_sta->bt_afh_map[5],
+			coex_sta->bt_afh_map[6],
+			coex_sta->bt_afh_map[7],
+			coex_sta->bt_afh_map[8],
+			coex_sta->bt_afh_map[9]
+			   );
+		CL_PRINTF(cli_buf);
+	}
 
 	for (i = 0; i < BT_INFO_SRC_8703B_1ANT_MAX; i++) {
 		if (coex_sta->bt_info_c2h_cnt[i]) {
@@ -4118,17 +3475,6 @@ void ex_halbtc8703b1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		   "============[Hw setting]============");
 	CL_PRINTF(cli_buf);
 
-	/*
-		u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
-		u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
-		u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
-		u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
-			   "0x430/0x434/0x42a/0x456",
-			   u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
-		CL_PRINTF(cli_buf);
-	*/
-
 	u32tmp[0] = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
 	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x73);
 
@@ -4148,13 +3494,14 @@ void ex_halbtc8703b1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		CL_PRINTF(cli_buf);
 	}
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n %-35s = %s (BB:%s)/ %s (BB:%s)/ %s",
-		   "GNT_WL_Ctrl/GNT_BT_Ctrl/Dbg",
-		   ((u32tmp[0] & BIT(12)) ? "SW" : "HW"),
-		   ((u32tmp[0] & BIT(8)) ?  "SW" : "HW"),
-		   ((u32tmp[0] & BIT(14)) ? "SW" : "HW"),
-		   ((u32tmp[0] & BIT(10)) ?  "SW" : "HW"),
-		   ((u8tmp[0] & BIT(3)) ? "On" : "Off"));
+			   "\r\n %-35s = %s (BB:%s)/ %s (BB:%s)/ %s %d",
+			   "GNT_WL_Ctrl/GNT_BT_Ctrl/Dbg",
+			   ((u32tmp[0] & BIT(12)) ? "SW" : "HW"),
+			   ((u32tmp[0] & BIT(8)) ?	"SW" : "HW"),
+			   ((u32tmp[0] & BIT(14)) ? "SW" : "HW"),
+			   ((u32tmp[0] & BIT(10)) ?  "SW" : "HW"),
+			   ((u8tmp[0] & BIT(3)) ? "On" : "Off"),
+			   coex_sta->gnt_error_cnt);
 	CL_PRINTF(cli_buf);
 
 	u32tmp[0] = halbtc8703b1ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
@@ -4209,20 +3556,25 @@ void ex_halbtc8703b1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_PRINTF(cli_buf);
 #endif
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s",
-		   "Wifi-HiPri/ Ccklock/ CckEverLock",
-		   (coex_sta->wifi_is_high_pri_task ? "Yes" : "No"),
-		   (coex_sta->cck_lock ? "Yes" : "No"),
-		   (coex_sta->cck_ever_lock ? "Yes" : "No"));
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s/ %d",
+			   "WlHiPri/ Locking/ Locked/ Noisy",
+			   (coex_sta->wifi_is_high_pri_task ? "Yes" : "No"),
+			   (coex_sta->cck_lock ? "Yes" : "No"),
+			   (coex_sta->cck_ever_lock ? "Yes" : "No"),
+			   coex_sta->wl_noisy_level);
 	CL_PRINTF(cli_buf);
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
-		   "0x770(high-pri rx/tx)",
-		   coex_sta->high_priority_rx, coex_sta->high_priority_tx);
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s",
+		   "0x770(Hi-pri rx/tx)",
+		   coex_sta->high_priority_rx, coex_sta->high_priority_tx,
+		   (coex_sta->is_hiPri_rx_overhead ? "(scan overhead!!)" : ""));
 	CL_PRINTF(cli_buf);
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
-		   "0x774(low-pri rx/tx)",
-		   coex_sta->low_priority_rx, coex_sta->low_priority_tx);
+
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s",
+		   "0x774(Lo-pri rx/tx)",
+		   coex_sta->low_priority_rx, coex_sta->low_priority_tx,
+		   (bt_link_info->slave_role ? "(Slave!!)" : (
+		   coex_sta->is_tdma_btautoslot_hang ? "(auto-slot hang!!)" : "")));
 	CL_PRINTF(cli_buf);
 
 	btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
@@ -4242,7 +3594,11 @@ void ex_halbtc8703b1ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
 		coex_sta->under_lps = false;
 
 		/* Write WL "Active" in Score-board for LPS off */
-		halbtc8703b1ant_post_activestate_to_bt(btcoexist, false);
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+				 BT_8703B_1ANT_SCOREBOARD_ACTIVE, false);
+
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+				BT_8703B_1ANT_SCOREBOARD_ONOFF, false);
 
 		halbtc8703b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
 
@@ -4255,7 +3611,11 @@ void ex_halbtc8703b1ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], IPS LEAVE notify\n");
 		BTC_TRACE(trace_buf);
-		halbtc8703b1ant_post_activestate_to_bt(btcoexist, true);
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+				 BT_8703B_1ANT_SCOREBOARD_ACTIVE, true);
+
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+				BT_8703B_1ANT_SCOREBOARD_ONOFF, true);
 
 		halbtc8703b1ant_init_hw_config(btcoexist, false, false);
 		halbtc8703b1ant_init_coex_dm(btcoexist);
@@ -4279,13 +3639,13 @@ void ex_halbtc8703b1ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type)
 
 		if (coex_sta->force_lps_on == true) { /* LPS No-32K */
 			/* Write WL "Active" in Score-board for PS-TDMA */
-			halbtc8703b1ant_post_activestate_to_bt(btcoexist, true);
+			halbtc8703b1ant_post_state_to_bt(btcoexist,
+				 BT_8703B_1ANT_SCOREBOARD_ACTIVE, true);
 
 		} else { /* LPS-32K, need check if this h2c 0x71 can work?? (2015/08/28) */
 			/* Write WL "Non-Active" in Score-board for Native-PS */
-			halbtc8703b1ant_post_activestate_to_bt(btcoexist,
-							       false);
-
+			halbtc8703b1ant_post_state_to_bt(btcoexist,
+				 BT_8703B_1ANT_SCOREBOARD_ACTIVE, false);
 		}
 	} else if (BTC_LPS_DISABLE == type) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -4295,8 +3655,8 @@ void ex_halbtc8703b1ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type)
 
 
 		/* Write WL "Active" in Score-board for LPS off */
-		halbtc8703b1ant_post_activestate_to_bt(btcoexist, true);
-
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+				 BT_8703B_1ANT_SCOREBOARD_ACTIVE, true);
 	}
 }
 
@@ -4322,7 +3682,11 @@ void ex_halbtc8703b1ant_scan_notify(IN struct btc_coexist *btcoexist,
 			    "[BTCoex], SCAN START notify\n");
 		BTC_TRACE(trace_buf);
 
-		halbtc8703b1ant_post_activestate_to_bt(btcoexist, true);
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+					 BT_8703B_1ANT_SCOREBOARD_SCAN, true);
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+				     BT_8703B_1ANT_SCOREBOARD_ACTIVE, true);
+
 		halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, false,
 					8);
 
@@ -4331,11 +3695,7 @@ void ex_halbtc8703b1ant_scan_notify(IN struct btc_coexist *btcoexist,
 					     FORCE_EXEC,
 					     BT_8703B_1ANT_PHASE_2G_RUNTIME);
 
-		if (!wifi_connected)	/* non-connected scan */
-			halbtc8703b1ant_action_wifi_not_connected_scan(
-				btcoexist);
-		else	/* wifi is connected */
-			halbtc8703b1ant_action_wifi_connected_scan(btcoexist);
+		halbtc8703b1ant_run_coexist_mechanism(btcoexist);
 
 	} else {
 
@@ -4349,10 +3709,7 @@ void ex_halbtc8703b1ant_scan_notify(IN struct btc_coexist *btcoexist,
 			    coex_sta->scan_ap_num);
 		BTC_TRACE(trace_buf);
 
-		if (!wifi_connected)
-			halbtc8703b1ant_action_wifi_not_connected(btcoexist);
-		else
-			halbtc8703b1ant_action_wifi_connected(btcoexist);
+		halbtc8703b1ant_run_coexist_mechanism(btcoexist);
 	}
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -4375,7 +3732,12 @@ void ex_halbtc8703b1ant_connect_notify(IN struct btc_coexist *btcoexist,
 
 	if (BTC_ASSOCIATE_START == type) {
 		coex_sta->wifi_is_high_pri_task = true;
-		halbtc8703b1ant_post_activestate_to_bt(btcoexist, true);
+
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+					 BT_8703B_1ANT_SCOREBOARD_SCAN, true);
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+				 BT_8703B_1ANT_SCOREBOARD_ACTIVE, true);
+
 		halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, false,
 					8);
 
@@ -4389,17 +3751,14 @@ void ex_halbtc8703b1ant_connect_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 		coex_dm->arp_cnt = 0;
 
-		halbtc8703b1ant_action_wifi_not_connected_asso_auth(btcoexist);
+		halbtc8703b1ant_run_coexist_mechanism(btcoexist);
 	} else {
 		coex_sta->wifi_is_high_pri_task = false;
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], CONNECT FINISH notify\n");
 		BTC_TRACE(trace_buf);
 
-		if (!wifi_connected) /* non-connected scan */
-			halbtc8703b1ant_action_wifi_not_connected(btcoexist);
-		else
-			halbtc8703b1ant_action_wifi_connected(btcoexist);
+		halbtc8703b1ant_run_coexist_mechanism(btcoexist);
 	}
 
 }
@@ -4419,7 +3778,8 @@ void ex_halbtc8703b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
 			    "[BTCoex], MEDIA connect notify\n");
 		BTC_TRACE(trace_buf);
 
-		halbtc8703b1ant_post_activestate_to_bt(btcoexist, true);
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+				 BT_8703B_1ANT_SCOREBOARD_ACTIVE, true);
 		halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, false,
 					8);
 
@@ -4460,7 +3820,8 @@ void ex_halbtc8703b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
 			    "[BTCoex], MEDIA disconnect notify\n");
 		BTC_TRACE(trace_buf);
 
-		halbtc8703b1ant_post_activestate_to_bt(btcoexist, false);
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+				 BT_8703B_1ANT_SCOREBOARD_ACTIVE, false);
 
 		btcoexist->btc_write_1byte(btcoexist, 0x6cd, 0x0); /* CCK Tx */
 		btcoexist->btc_write_1byte(btcoexist, 0x6cf, 0x0); /* CCK Rx */
@@ -4512,9 +3873,11 @@ void ex_halbtc8703b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
 		coex_sta->specific_pkt_period_cnt = 2;
 	}
 
-	if (coex_sta->wifi_is_high_pri_task)
-		halbtc8703b1ant_action_wifi_connected_specific_packet(
-			btcoexist);
+	if (coex_sta->wifi_is_high_pri_task) {
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+					 BT_8703B_1ANT_SCOREBOARD_SCAN, true);
+		halbtc8703b1ant_run_coexist_mechanism(btcoexist);
+	}
 }
 
 void ex_halbtc8703b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
@@ -4522,15 +3885,10 @@ void ex_halbtc8703b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 {
 	u8				i, rsp_source = 0;
 	boolean				wifi_connected = false;
+	boolean	wifi_scan = false, wifi_link = false, wifi_roam = false,
+		    wifi_busy = false;
+
 
-	/*
-		if (psd_scan->is_AntDet_running == true) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], bt_info_notify return for AntDet is running\n");
-			BTC_TRACE(trace_buf);
-			return;
-		}
-	*/
 	rsp_source = tmp_buf[0] & 0xf;
 	if (rsp_source >= BT_INFO_SRC_8703B_1ANT_MAX)
 		rsp_source = BT_INFO_SRC_8703B_1ANT_WIFI_FW;
@@ -4622,9 +3980,30 @@ void ex_halbtc8703b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 		if (coex_sta->bt_info_ext & BIT(3))
 			coex_sta->cnt_IgnWlanAct++;
 
-		if (coex_sta->bt_create_connection)
+		if (coex_sta->bt_create_connection) {
 			coex_sta->cnt_Page++;
 
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link);
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam);
+
+			if ((wifi_link) || (wifi_roam) || (wifi_scan) ||
+				(coex_sta->wifi_is_high_pri_task) || (wifi_busy)) {
+
+				halbtc8703b1ant_post_state_to_bt(btcoexist,
+					BT_8703B_1ANT_SCOREBOARD_SCAN, true);
+
+			} else {
+
+				halbtc8703b1ant_post_state_to_bt(btcoexist,
+					BT_8703B_1ANT_SCOREBOARD_SCAN, false);
+			}
+		} else
+				halbtc8703b1ant_post_state_to_bt(btcoexist,
+					BT_8703B_1ANT_SCOREBOARD_SCAN, false);
+
 		/* Here we need to resend some wifi info to BT */
 		/* because bt is reset and loss of the info. */
 
@@ -4651,36 +4030,43 @@ void ex_halbtc8703b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 
 			/*  If Ignore_WLanAct && not SetUp_Link */
 			if ((coex_sta->bt_info_ext & BIT(3)) &&
-			    (!(coex_sta->bt_info_ext & BIT(2)))) {
+				(!(coex_sta->bt_info_ext & BIT(2))) &&
+				(!(coex_sta->bt_info_ext & BIT(6)))) {
 
 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 					"[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n");
 				BTC_TRACE(trace_buf);
 				halbtc8703b1ant_ignore_wlan_act(btcoexist,
 							FORCE_EXEC, false);
+			} else {
+				if (coex_sta->bt_info_ext & BIT(2)) {
+					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					"[BTCoex], BT ignore Wlan active because Re-link!!\n");
+					BTC_TRACE(trace_buf);
+				} else if (coex_sta->bt_info_ext & BIT(6)) {
+					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					"[BTCoex], BT ignore Wlan active because Role-Switch!!\n");
+					BTC_TRACE(trace_buf);
+				}
 			}
 		}
 
 	}
-
-
-	halbtc8703b1ant_update_bt_link_info(btcoexist);
-
-	if (btcoexist->manual_control) {
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], BtInfoNotify(), No run_coexist_mechanism for Manual CTRL\n");
-		BTC_TRACE(trace_buf);
-		return;
-	}
-
-	if (btcoexist->stop_coex_dm) {
+	if ((coex_sta->bt_info_ext & BIT(5))) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], BtInfoNotify(),	No run_coexist_mechanism for Stop Coex DM\n");
+					"[BTCoex], BT ext info bit4 check, query BLE Scan type!!\n");
 		BTC_TRACE(trace_buf);
-		return;
+		coex_sta->bt_ble_scan_type = btcoexist->btc_get_ble_scan_type_from_bt(btcoexist);
+
+		if ((coex_sta->bt_ble_scan_type & 0x1) == 0x1)
+			coex_sta->bt_ble_scan_para[0]  = btcoexist->btc_get_ble_scan_para_from_bt(btcoexist, 0x1);
+		if ((coex_sta->bt_ble_scan_type & 0x2) == 0x2)
+			coex_sta->bt_ble_scan_para[1]  = btcoexist->btc_get_ble_scan_para_from_bt(btcoexist, 0x2);
+		if ((coex_sta->bt_ble_scan_type & 0x4) == 0x4)
+			coex_sta->bt_ble_scan_para[2]  = btcoexist->btc_get_ble_scan_para_from_bt(btcoexist, 0x4);
 	}
 
-	coex_sta->c2h_bt_info_req_sent = false;
+	halbtc8703b1ant_update_bt_link_info(btcoexist);
 
 	halbtc8703b1ant_run_coexist_mechanism(btcoexist);
 }
@@ -4697,19 +4083,22 @@ void ex_halbtc8703b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 			    "[BTCoex], RF is turned ON!!\n");
 		BTC_TRACE(trace_buf);
 
-		coex_sta->wl_rf_off_on_event = true;
 		btcoexist->stop_coex_dm = false;
 
-		halbtc8703b1ant_post_activestate_to_bt(btcoexist, true);
-		halbtc8703b1ant_post_onoffState_to_bt(btcoexist, true);
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+				 BT_8703B_1ANT_SCOREBOARD_ACTIVE, true);
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+					 BT_8703B_1ANT_SCOREBOARD_ONOFF, true);
 
 		/*	halbtc8703b1ant_init_hw_config(btcoexist, false, false); */
 	} else if (BTC_RF_OFF == type) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], RF is turned OFF!!\n");
 		BTC_TRACE(trace_buf);
-		halbtc8703b1ant_post_activestate_to_bt(btcoexist, false);
-		halbtc8703b1ant_post_onoffState_to_bt(btcoexist, false);
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+				 BT_8703B_1ANT_SCOREBOARD_ACTIVE, false);
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+					 BT_8703B_1ANT_SCOREBOARD_ONOFF, false);
 
 		halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
 		halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
@@ -4717,7 +4106,6 @@ void ex_halbtc8703b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 					     BT_8703B_1ANT_PHASE_WLAN_OFF);
 
 		btcoexist->stop_coex_dm = true;
-		coex_sta->wl_rf_off_on_event = false;
 
 	}
 }
@@ -4727,8 +4115,10 @@ void ex_halbtc8703b1ant_halt_notify(IN struct btc_coexist *btcoexist)
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n");
 	BTC_TRACE(trace_buf);
 
-	halbtc8703b1ant_post_activestate_to_bt(btcoexist, false);
-	halbtc8703b1ant_post_onoffState_to_bt(btcoexist, false);
+	halbtc8703b1ant_post_state_to_bt(btcoexist,
+				 BT_8703B_1ANT_SCOREBOARD_ACTIVE, false);
+	halbtc8703b1ant_post_state_to_bt(btcoexist,
+						 BT_8703B_1ANT_SCOREBOARD_ONOFF, false);
 
 	halbtc8703b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
 	halbtc8703b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
@@ -4753,8 +4143,10 @@ void ex_halbtc8703b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
 			    "[BTCoex], Pnp notify to SLEEP\n");
 		BTC_TRACE(trace_buf);
 
-		halbtc8703b1ant_post_activestate_to_bt(btcoexist, false);
-		halbtc8703b1ant_post_onoffState_to_bt(btcoexist, false);
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+				 BT_8703B_1ANT_SCOREBOARD_ACTIVE, false);
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+							 BT_8703B_1ANT_SCOREBOARD_ONOFF, false);
 
 		if (BTC_WIFI_PNP_SLEEP_KEEP_ANT == pnp_state) {
 
@@ -4773,8 +4165,10 @@ void ex_halbtc8703b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], Pnp notify to WAKE UP\n");
 		BTC_TRACE(trace_buf);
-		halbtc8703b1ant_post_activestate_to_bt(btcoexist, true);
-		halbtc8703b1ant_post_onoffState_to_bt(btcoexist, true);
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+				 BT_8703B_1ANT_SCOREBOARD_ACTIVE, true);
+		halbtc8703b1ant_post_state_to_bt(btcoexist,
+							 BT_8703B_1ANT_SCOREBOARD_ONOFF, true);
 
 		btcoexist->stop_coex_dm = false;
 	}
@@ -4792,6 +4186,10 @@ void ex_halbtc8703b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist)
 
 void ex_halbtc8703b1ant_periodical(IN struct btc_coexist *btcoexist)
 {
+	u32	bt_patch_ver;
+	boolean wifi_busy = false;
+	static u8 cnt = 0;
+	boolean bt_relink_finish = false;
 
 #if (BT_AUTO_REPORT_ONLY_8703B_1ANT == 0)
 	halbtc8703b1ant_query_bt_info(btcoexist);
@@ -4802,6 +4200,37 @@ void ex_halbtc8703b1ant_periodical(IN struct btc_coexist *btcoexist)
 
 	halbtc8703b1ant_monitor_bt_enable_disable(btcoexist);
 
+# if 1
+		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+
+		/* halbtc8703b1ant_read_score_board(btcoexist, &bt_scoreboard_val); */
+
+		if (wifi_busy) {
+			halbtc8703b1ant_post_state_to_bt(btcoexist,
+					BT_8703B_1ANT_SCOREBOARD_UNDERTEST, true);
+			/*
+			halbtc8703b1ant_post_state_to_bt(btcoexist,
+						 BT_8703B_1ANT_SCOREBOARD_WLBUSY, true);
+
+			if (bt_scoreboard_val & BIT(6))
+				halbtc8703b1ant_query_bt_info(btcoexist); */
+		} else {
+			halbtc8703b1ant_post_state_to_bt(btcoexist,
+						BT_8703B_1ANT_SCOREBOARD_UNDERTEST, false);
+			/*
+			halbtc8703b1ant_post_state_to_bt(btcoexist,
+						BT_8703B_1ANT_SCOREBOARD_WLBUSY,
+						false);  */
+		}
+#endif
+
+	if (coex_sta->bt_relink_downcount != 0) {
+		coex_sta->bt_relink_downcount--;
+
+		if (coex_sta->bt_relink_downcount == 0)
+			bt_relink_finish = true;
+	}
+
 	/* for 4-way, DHCP, EAPOL packet */
 	if (coex_sta->specific_pkt_period_cnt > 0) {
 
@@ -4821,16 +4250,27 @@ void ex_halbtc8703b1ant_periodical(IN struct btc_coexist *btcoexist)
 
 	if (!coex_sta->bt_disabled) {
 		if (coex_sta->bt_coex_supported_feature == 0)
-			coex_sta->bt_coex_supported_feature =
-				btcoexist->btc_get_bt_coex_supported_feature(
-					btcoexist);
+			btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_FEATURE,
+						&coex_sta->bt_coex_supported_feature);
 
 		if ((coex_sta->bt_coex_supported_version == 0) ||
 			 (coex_sta->bt_coex_supported_version == 0xffff))
-			coex_sta->bt_coex_supported_version =
-				btcoexist->btc_get_bt_coex_supported_version(
-					btcoexist);
+			btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_VERSION,
+						&coex_sta->bt_coex_supported_version);
+
+		btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
+		btcoexist->bt_info.bt_get_fw_ver = bt_patch_ver;
+
+		if (coex_sta->num_of_profile > 0) {
+			cnt++;
+
+			if (cnt >= 3) {
+				btcoexist->btc_get_bt_afh_map_from_bt(btcoexist, 0,
+					&coex_sta->bt_afh_map[0]);
+				cnt = 0;
+			}
 		}
+	}
 
 	if (halbtc8703b1ant_is_wifibt_status_changed(btcoexist))
 		halbtc8703b1ant_run_coexist_mechanism(btcoexist);
diff --git a/rtl8822BU/hal/btc/halbtc8703b1ant.h b/rtl8822BU/hal/btc/halbtc8703b1ant.h
index 607354f..a2a9711 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8703b1ant.h
+++ b/rtl8822BU/hal/btc/halbtc8703b1ant.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 
 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
 
@@ -129,6 +143,14 @@ enum bt_8703b_1ant_phase {
 	BT_8703B_1ANT_PHASE_MAX
 };
 
+enum bt_8703b_1ant_Scoreboard {
+	BT_8703B_1ANT_SCOREBOARD_ACTIVE								= BIT(0),
+	BT_8703B_1ANT_SCOREBOARD_ONOFF								= BIT(1),
+	BT_8703B_1ANT_SCOREBOARD_SCAN								= BIT(2),
+	BT_8703B_1ANT_SCOREBOARD_UNDERTEST							= BIT(3),
+	BT_8703B_1ANT_SCOREBOARD_WLBUSY								= BIT(6)
+};
+
 
 struct coex_dm_8703b_1ant {
 	/* hw setting */
@@ -189,34 +211,34 @@ struct coex_dm_8703b_1ant {
 };
 
 struct coex_sta_8703b_1ant {
-	boolean					bt_disabled;
-	boolean					bt_link_exist;
-	boolean					sco_exist;
-	boolean					a2dp_exist;
-	boolean					hid_exist;
-	boolean					pan_exist;
-	boolean					bt_hi_pri_link_exist;
+	boolean				bt_disabled;
+	boolean				bt_link_exist;
+	boolean				sco_exist;
+	boolean				a2dp_exist;
+	boolean				hid_exist;
+	boolean				pan_exist;
+	boolean				bt_hi_pri_link_exist;
 	u8					num_of_profile;
 
-	boolean					under_lps;
-	boolean					under_ips;
+	boolean				under_lps;
+	boolean				under_ips;
 	u32					specific_pkt_period_cnt;
 	u32					high_priority_tx;
 	u32					high_priority_rx;
 	u32					low_priority_tx;
 	u32					low_priority_rx;
+	boolean             is_hiPri_rx_overhead;
 	s8					bt_rssi;
-	boolean					bt_tx_rx_mask;
+	boolean				bt_tx_rx_mask;
 	u8					pre_bt_rssi_state;
 	u8					pre_wifi_rssi_state[4];
-	boolean					c2h_bt_info_req_sent;
 	u8					bt_info_c2h[BT_INFO_SRC_8703B_1ANT_MAX][10];
 	u32					bt_info_c2h_cnt[BT_INFO_SRC_8703B_1ANT_MAX];
-	boolean					bt_whck_test;
-	boolean					c2h_bt_inquiry_page;
+	boolean			    bt_whck_test;
+	boolean				c2h_bt_inquiry_page;
 	boolean				c2h_bt_remote_name_req;
-	boolean					c2h_bt_page;				/* Add for win8.1 page out issue */
-	boolean					wifi_is_high_pri_task;		/* Add for win8.1 page out issue */
+	boolean				c2h_bt_page;				/* Add for win8.1 page out issue */
+	boolean				wifi_is_high_pri_task;		/* Add for win8.1 page out issue */
 	u8					bt_retry_cnt;
 	u8					bt_info_ext;
 	u8					bt_info_ext2;
@@ -233,15 +255,14 @@ struct coex_sta_8703b_1ant {
 	u32					crc_err_11n;
 	u32					crc_err_11n_vht;
 
-	boolean					cck_lock;
-	boolean					pre_ccklock;
-	boolean					cck_ever_lock;
+	boolean				cck_lock;
+	boolean				pre_ccklock;
+	boolean				cck_ever_lock;
 	u8					coex_table_type;
 
-	boolean					force_lps_on;
-	u32					wrong_profile_notification;
+	boolean				force_lps_on;
 
-	boolean					concurrent_rx_mode_on;
+	boolean				concurrent_rx_mode_on;
 
 	u16					score_board;
 	u8					isolation_btween_wb;   /* 0~ 50 */
@@ -249,12 +270,14 @@ struct coex_sta_8703b_1ant {
 	u8					a2dp_bit_pool;
 	u8					cut_version;
 	boolean				acl_busy;
-	boolean				wl_rf_off_on_event;
 	boolean				bt_create_connection;
 
 	u32					bt_coex_supported_feature;
 	u32					bt_coex_supported_version;
 
+	u8					bt_ble_scan_type;
+	u32					bt_ble_scan_para[3];
+
 	boolean				run_time_state;
 	boolean				freeze_coexrun_by_btinfo;
 
@@ -276,6 +299,13 @@ struct coex_sta_8703b_1ant {
 	u16					bt_reg_vendor_ae;
 
 	boolean				is_setupLink;
+	u8					wl_noisy_level;
+	u32                 gnt_error_cnt;
+
+	u8					bt_afh_map[10];
+	u8					bt_relink_downcount;
+	boolean				is_tdma_btautoslot;
+	boolean				is_tdma_btautoslot_hang;
 };
 
 #define  BT_8703B_1ANT_ANTDET_PSD_POINTS			256	/* MAX:1024 */
diff --git a/rtl8822BU/hal/btc/halbtc8723b1ant.c b/rtl8822BU/hal/btc/halbtc8723b1ant.c
index 6f0e2dd..b5392fb 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8723b1ant.c
+++ b/rtl8822BU/hal/btc/halbtc8723b1ant.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 /* ************************************************************
  * Description:
  *
@@ -34,9 +48,9 @@ const char *const glbt_info_src_8723b_1ant[] = {
 	"BT Info[bt auto report]",
 };
 
-u32	glcoex_ver_date_8723b_1ant = 20160816;
-u32	glcoex_ver_8723b_1ant = 0x68;
-u32	glcoex_ver_btdesired_8723b_1ant = 0x67;
+u32	glcoex_ver_date_8723b_1ant = 20161007;
+u32	glcoex_ver_8723b_1ant = 0x69;
+u32	glcoex_ver_btdesired_8723b_1ant = 0x69;
 
 /* ************************************************************
  * local function proto type if needed
@@ -401,6 +415,54 @@ boolean halbtc8723b1ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist)
 	return false;
 }
 
+void halbtc8723b1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
+{
+	static u32		bt_disable_cnt = 0;
+	boolean			bt_active = true, bt_disabled = false, bt_change = false;
+
+	/* This function check if bt is disabled */
+
+	if (coex_sta->high_priority_tx == 0 &&
+	    coex_sta->high_priority_rx == 0 &&
+	    coex_sta->low_priority_tx == 0 &&
+	    coex_sta->low_priority_rx == 0)
+		bt_active = false;
+	if (coex_sta->high_priority_tx == 0xffff &&
+	    coex_sta->high_priority_rx == 0xffff &&
+	    coex_sta->low_priority_tx == 0xffff &&
+	    coex_sta->low_priority_rx == 0xffff)
+		bt_active = false;
+	if (bt_active) {
+		bt_disable_cnt = 0;
+		bt_disabled = false;
+	} else {
+		bt_disable_cnt++;
+		if (bt_disable_cnt >= 10)
+			bt_disabled = true;
+	}
+	if (coex_sta->bt_disabled != bt_disabled) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], BT is from %s to %s!!\n",
+			    (coex_sta->bt_disabled ? "disabled" : "enabled"),
+			    (bt_disabled ? "disabled" : "enabled"));
+		BTC_TRACE(trace_buf);
+		bt_change = true;
+
+		btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
+				   &bt_disabled);
+
+		btcoexist->btc_set(btcoexist,
+				   BTC_SET_BL_BT_ENABLE_DISABLE_CHANGE,
+				   &bt_change);
+
+		coex_sta->bt_disabled = bt_disabled;
+	} else {
+		btcoexist->btc_set(btcoexist,
+				   BTC_SET_BL_BT_ENABLE_DISABLE_CHANGE,
+				   &bt_change);
+	}
+}
+
 void halbtc8723b1ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 {
 	struct  btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
@@ -520,6 +582,12 @@ void halbtc8723b1ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
 }
 
+void halbtc8723b1ant_sw_mechanism(IN struct btc_coexist *btcoexist,
+				  IN boolean low_penalty_ra)
+{
+	halbtc8723b1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra);
+}
+
 void halbtc8723b1ant_set_coex_table(IN struct btc_coexist *btcoexist,
 	    IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
 {
@@ -532,6 +600,8 @@ void halbtc8723b1ant_set_coex_table(IN struct btc_coexist *btcoexist,
 	btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
 }
 
+
+
 void halbtc8723b1ant_coex_table(IN struct btc_coexist *btcoexist,
 			IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4,
 				IN u32 val0x6c8, IN u8 val0x6cc)
@@ -714,12 +784,6 @@ void halbtc8723b1ant_lps_rpwm(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_rpwm = coex_dm->cur_rpwm;
 }
 
-void halbtc8723b1ant_sw_mechanism(IN struct btc_coexist *btcoexist,
-				  IN boolean low_penalty_ra)
-{
-	halbtc8723b1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra);
-}
-
 void halbtc8723b1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 	  IN u8 ant_pos_type, IN boolean force_exec, IN boolean init_hwcfg,
 				  IN boolean wifi_off)
@@ -1094,12 +1158,88 @@ void halbtc8723b1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_ant_pos_type = coex_dm->cur_ant_pos_type;
 }
 
+void halbtc8723b1ant_ps_tdma_check_for_power_save_state(
+	IN struct btc_coexist *btcoexist, IN boolean new_ps_state)
+{
+	u8	lps_mode = 0x0;
+	u8	h2c_parameter[5] = {0x8, 0, 0, 0, 0};
+
+	btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode);
+
+	if (lps_mode) {	/* already under LPS state */
+		if (new_ps_state) {
+			/* keep state under LPS, do nothing. */
+		} else {
+			/* will leave LPS state, turn off psTdma first */
+			/* halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
+						8); */
+			btcoexist->btc_fill_h2c(btcoexist, 0x60, 5,
+				h2c_parameter);
+		}
+	} else {					/* NO PS state */
+		if (new_ps_state) {
+			/* will enter LPS state, turn off psTdma first */
+			/* halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
+						8); */
+			btcoexist->btc_fill_h2c(btcoexist, 0x60, 5,
+				h2c_parameter);
+		} else {
+			/* keep state under NO PS state, do nothing. */
+		}
+	}
+}
+
+
+void halbtc8723b1ant_power_save_state(IN struct btc_coexist *btcoexist,
+			      IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val)
+{
+	boolean		low_pwr_disable = false;
+
+	switch (ps_type) {
+	case BTC_PS_WIFI_NATIVE:
+		/* recover to original 32k low power setting */
+		low_pwr_disable = false;
+		btcoexist->btc_set(btcoexist,
+				   BTC_SET_ACT_DISABLE_LOW_POWER,
+				   &low_pwr_disable);
+		btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS,
+				   NULL);
+		coex_sta->force_lps_on = false;
+		break;
+	case BTC_PS_LPS_ON:
+		halbtc8723b1ant_ps_tdma_check_for_power_save_state(
+			btcoexist, true);
+		halbtc8723b1ant_lps_rpwm(btcoexist, NORMAL_EXEC,
+					 lps_val, rpwm_val);
+		/* when coex force to enter LPS, do not enter 32k low power. */
+		low_pwr_disable = true;
+		btcoexist->btc_set(btcoexist,
+				   BTC_SET_ACT_DISABLE_LOW_POWER,
+				   &low_pwr_disable);
+		/* power save must executed before psTdma.			 */
+		btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS,
+				   NULL);
+		coex_sta->force_lps_on = true;
+		break;
+	case BTC_PS_LPS_OFF:
+		halbtc8723b1ant_ps_tdma_check_for_power_save_state(
+			btcoexist, false);
+		btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
+				   NULL);
+		coex_sta->force_lps_on = false;
+		break;
+	default:
+		break;
+	}
+}
+
+
 void halbtc8723b1ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
 	   IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5)
 {
 	u8			h2c_parameter[5] = {0};
 	u8			real_byte1 = byte1, real_byte5 = byte5;
-	boolean			ap_enable = false;
+	boolean		ap_enable = false;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
 			   &ap_enable);
@@ -1111,7 +1251,17 @@ void halbtc8723b1ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
 
 			real_byte5 |= BIT(5);
 			real_byte5 &= ~BIT(6);
+
+			halbtc8723b1ant_power_save_state(btcoexist,
+				BTC_PS_WIFI_NATIVE, 0x0, 0x0);
 		}
+	} else if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
+			halbtc8723b1ant_power_save_state(btcoexist,
+				BTC_PS_LPS_ON, 0x50, 0x4);
+
+	} else {
+			halbtc8723b1ant_power_save_state(btcoexist,
+				BTC_PS_WIFI_NATIVE, 0x0, 0x0);
 	}
 
 	h2c_parameter[0] = real_byte1;
@@ -1703,130 +1853,6 @@ void halbtc8723b1ant_tdma_duration_adjust_for_acl(IN struct btc_coexist
 	}
 }
 
-void halbtc8723b1ant_ps_tdma_check_for_power_save_state(
-	IN struct btc_coexist *btcoexist, IN boolean new_ps_state)
-{
-	u8	lps_mode = 0x0;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode);
-
-	if (lps_mode) {	/* already under LPS state */
-		if (new_ps_state) {
-			/* keep state under LPS, do nothing. */
-		} else {
-			/* will leave LPS state, turn off psTdma first */
-			halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
-						8);
-		}
-	} else {					/* NO PS state */
-		if (new_ps_state) {
-			/* will enter LPS state, turn off psTdma first */
-			halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
-						8);
-		} else {
-			/* keep state under NO PS state, do nothing. */
-		}
-	}
-}
-
-void halbtc8723b1ant_power_save_state(IN struct btc_coexist *btcoexist,
-			      IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val)
-{
-	boolean		low_pwr_disable = false;
-
-	switch (ps_type) {
-	case BTC_PS_WIFI_NATIVE:
-		/* recover to original 32k low power setting */
-		low_pwr_disable = false;
-		btcoexist->btc_set(btcoexist,
-				   BTC_SET_ACT_DISABLE_LOW_POWER,
-				   &low_pwr_disable);
-		btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS,
-				   NULL);
-		coex_sta->force_lps_on = false;
-		break;
-	case BTC_PS_LPS_ON:
-		halbtc8723b1ant_ps_tdma_check_for_power_save_state(
-			btcoexist, true);
-		halbtc8723b1ant_lps_rpwm(btcoexist, NORMAL_EXEC,
-					 lps_val, rpwm_val);
-		/* when coex force to enter LPS, do not enter 32k low power. */
-		low_pwr_disable = true;
-		btcoexist->btc_set(btcoexist,
-				   BTC_SET_ACT_DISABLE_LOW_POWER,
-				   &low_pwr_disable);
-		/* power save must executed before psTdma.			 */
-		btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS,
-				   NULL);
-		coex_sta->force_lps_on = true;
-		break;
-	case BTC_PS_LPS_OFF:
-		halbtc8723b1ant_ps_tdma_check_for_power_save_state(
-			btcoexist, false);
-		btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
-				   NULL);
-		coex_sta->force_lps_on = false;
-		break;
-	default:
-		break;
-	}
-}
-
-void halbtc8723b1ant_action_wifi_only(IN struct btc_coexist *btcoexist)
-{
-	halbtc8723b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
-	halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
-	halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, FORCE_EXEC,
-				     false, false);
-}
-
-void halbtc8723b1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
-{
-	static u32		bt_disable_cnt = 0;
-	boolean			bt_active = true, bt_disabled = false, bt_change = false;
-
-	/* This function check if bt is disabled */
-
-	if (coex_sta->high_priority_tx == 0 &&
-	    coex_sta->high_priority_rx == 0 &&
-	    coex_sta->low_priority_tx == 0 &&
-	    coex_sta->low_priority_rx == 0)
-		bt_active = false;
-	if (coex_sta->high_priority_tx == 0xffff &&
-	    coex_sta->high_priority_rx == 0xffff &&
-	    coex_sta->low_priority_tx == 0xffff &&
-	    coex_sta->low_priority_rx == 0xffff)
-		bt_active = false;
-	if (bt_active) {
-		bt_disable_cnt = 0;
-		bt_disabled = false;
-	} else {
-		bt_disable_cnt++;
-		if (bt_disable_cnt >= 10)
-			bt_disabled = true;
-	}
-	if (coex_sta->bt_disabled != bt_disabled) {
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], BT is from %s to %s!!\n",
-			    (coex_sta->bt_disabled ? "disabled" : "enabled"),
-			    (bt_disabled ? "disabled" : "enabled"));
-		BTC_TRACE(trace_buf);
-		bt_change = true;
-
-		btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
-				   &bt_disabled);
-
-		btcoexist->btc_set(btcoexist,
-				   BTC_SET_BL_BT_ENABLE_DISABLE_CHANGE,
-				   &bt_change);
-
-		coex_sta->bt_disabled = bt_disabled;
-	} else {
-		btcoexist->btc_set(btcoexist,
-				   BTC_SET_BL_BT_ENABLE_DISABLE_CHANGE,
-				   &bt_change);
-	}
-}
 
 /* *********************************************
  *
@@ -1835,25 +1861,12 @@ void halbtc8723b1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
  * ********************************************* */
 void halbtc8723b1ant_action_bt_whck_test(IN struct btc_coexist *btcoexist)
 {
-	halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
-					 0x0);
-
 	halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
 	halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC,
 				     false, false);
 	halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 }
 
-void halbtc8723b1ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
-{
-	halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
-					 0x0);
-
-	halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-	halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC,
-				     false, false);
-	halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
-}
 
 void halbtc8723b1ant_action_hs(IN struct btc_coexist *btcoexist)
 {
@@ -1879,8 +1892,6 @@ void halbtc8723b1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
 					33);
 		halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
 	} else if ((!wifi_connected) && (!coex_sta->wifi_is_high_pri_task)) {
-		halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
-						 0x0, 0x0);
 		halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
 		halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA,
 					     NORMAL_EXEC, false, false);
@@ -1888,8 +1899,6 @@ void halbtc8723b1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
 	} else if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist) ||
 		   (bt_link_info->a2dp_exist)) {
 		/* SCO/HID/A2DP  busy */
-		halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
-						 0x0, 0x0);
 
 		if (coex_sta->c2h_bt_remote_name_req)
 			halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
@@ -1900,8 +1909,6 @@ void halbtc8723b1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
 
 		halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 	} else if ((bt_link_info->pan_exist) || (wifi_busy)) {
-		halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
-						 0x0, 0x0);
 
 		if (coex_sta->c2h_bt_remote_name_req)
 			halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
@@ -1912,8 +1919,6 @@ void halbtc8723b1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
 
 		halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 	} else {
-		halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
-						 0x0, 0x0);
 
 		halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
 		halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA,
@@ -1943,6 +1948,22 @@ void halbtc8723b1ant_action_bt_sco_hid_only_busy(IN struct btc_coexist
 	}
 }
 
+void halbtc8723b1ant_action_wifi_only(IN struct btc_coexist *btcoexist)
+{
+	halbtc8723b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
+	halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
+	halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, FORCE_EXEC,
+				     false, false);
+}
+
+void halbtc8723b1ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
+{
+	halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
+	halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC,
+				     false, false);
+	halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
+}
+
 void halbtc8723b1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist
 		*btcoexist, IN u8 wifi_status)
 {
@@ -2006,9 +2027,6 @@ void halbtc8723b1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist
 
 void halbtc8723b1ant_action_wifi_not_connected(IN struct btc_coexist *btcoexist)
 {
-	/* power save state */
-	halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
-					 0x0);
 
 	/* tdma and coex table */
 	halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
@@ -2022,9 +2040,6 @@ void halbtc8723b1ant_action_wifi_not_connected_scan(IN struct btc_coexist
 {
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
-	halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
-					 0x0);
-
 	/* tdma and coex table */
 	if (BT_8723B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
 		if (bt_link_info->a2dp_exist) {
@@ -2063,9 +2078,6 @@ void halbtc8723b1ant_action_wifi_not_connected_asso_auth(
 {
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
-	halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
-					 0x0);
-
 	/* tdma and coex table */
 	if ((bt_link_info->sco_exist)  || (bt_link_info->hid_exist) ||
 	    (bt_link_info->a2dp_exist)) {
@@ -2087,9 +2099,6 @@ void halbtc8723b1ant_action_wifi_connected_scan(IN struct btc_coexist
 {
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
-	halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
-					 0x0);
-
 	/* tdma and coex table */
 	if (BT_8723B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
 		if (bt_link_info->a2dp_exist) {
@@ -2136,9 +2145,6 @@ void halbtc8723b1ant_action_wifi_connected_specific_packet(
 			    (coex_sta->num_of_profile >= 2)))
 		return;
 
-	halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
-					 0x0);
-
 	/* tdma and coex table */
 	if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist)) {
 		halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
@@ -2197,43 +2203,6 @@ void halbtc8723b1ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
 			   &ap_enable);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
-	if (coex_sta->bt_disabled) {
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "[BTCoex], halbtc8723b1ant_action_wifi_connected(): BT disable\n");
-		BTC_TRACE(trace_buf);
-		halbtc8723b1ant_power_save_state(
-			btcoexist, BTC_PS_WIFI_NATIVE,
-			0x0, 0x0);
-	} else if /* power save state */
-	(!ap_enable &&
-	    BT_8723B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status &&
-	    !btcoexist->bt_link_info.hid_only) {
-		if (btcoexist->bt_link_info.a2dp_only) {	/* A2DP */
-			if (!wifi_busy)
-				halbtc8723b1ant_power_save_state(btcoexist,
-						 BTC_PS_WIFI_NATIVE, 0x0, 0x0);
-			else { /* busy */
-				if (coex_sta->scan_ap_num >=
-				    BT_8723B_1ANT_WIFI_NOISY_THRESH)  /* no force LPS, no PS-TDMA, use pure TDMA */
-					halbtc8723b1ant_power_save_state(
-						btcoexist, BTC_PS_WIFI_NATIVE,
-						0x0, 0x0);
-				else
-					halbtc8723b1ant_power_save_state(
-						btcoexist, BTC_PS_LPS_ON, 0x50,
-						0x4);
-			}
-		} else if ((coex_sta->pan_exist == false) &&
-			   (coex_sta->a2dp_exist == false) &&
-			   (coex_sta->hid_exist == false))
-			halbtc8723b1ant_power_save_state(btcoexist,
-						 BTC_PS_WIFI_NATIVE, 0x0, 0x0);
-		else
-			halbtc8723b1ant_power_save_state(btcoexist,
-						 BTC_PS_LPS_ON, 0x50, 0x4);
-	} else
-		halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
-						 0x0, 0x0);
 
 	/* tdma and coex table */
 	if (!wifi_busy) {
@@ -3413,10 +3382,6 @@ void halbtc8723b1ant_psd_antenna_detection(IN struct btc_coexist *btcoexist,
 				"xxxxxxxxxxxxxxxx AntennaDetect(), Stop Coex DM!!\n");
 			BTC_TRACE(trace_buf);  */
 
-			/* set native power save */
-			halbtc8723b1ant_power_save_state(btcoexist,
-						 BTC_PS_WIFI_NATIVE, 0x0, 0x0);
-
 			/* Set TDMA off,				 */
 			halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC,
 						false, 0);
@@ -4889,8 +4854,6 @@ void ex_halbtc8723b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 			    "[BTCoex], RF is turned OFF!!\n");
 		BTC_TRACE(trace_buf);
 
-		halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
-						 0x0, 0x0);
 		halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
 		halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT,
 					     FORCE_EXEC, false, true);
@@ -4917,8 +4880,6 @@ void ex_halbtc8723b1ant_halt_notify(IN struct btc_coexist *btcoexist)
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n");
 	BTC_TRACE(trace_buf);
 
-	halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
-					 0x0);
 	halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
 	halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, FORCE_EXEC,
 				     false, true);
@@ -4938,8 +4899,6 @@ void ex_halbtc8723b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
 			    "[BTCoex], Pnp notify to SLEEP\n");
 		BTC_TRACE(trace_buf);
 
-		halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
-						 0x0, 0x0);
 		halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
 		halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT,
 					     FORCE_EXEC, false, true);
@@ -4973,6 +4932,8 @@ void ex_halbtc8723b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist)
 
 void ex_halbtc8723b1ant_periodical(IN struct btc_coexist *btcoexist)
 {
+	u32 bt_patch_ver;
+
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		"[BTCoex], ==========================Periodical===========================\n");
 	BTC_TRACE(trace_buf);
@@ -4992,11 +4953,11 @@ void ex_halbtc8723b1ant_periodical(IN struct btc_coexist *btcoexist)
 		halbtc8723b1ant_run_coexist_mechanism(btcoexist);
 
 	if (((coex_sta->bt_coex_supported_version == 0) ||
-	     (coex_sta->bt_coex_supported_version == 0xffff)) &&
-	    (!coex_sta->bt_disabled))
-		coex_sta->bt_coex_supported_version =
-			btcoexist->btc_get_bt_coex_supported_version(btcoexist);
+	     (coex_sta->bt_coex_supported_version == 0xffff)) && (!coex_sta->bt_disabled))
+		btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_VERSION, &coex_sta->bt_coex_supported_version);
 
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
+	btcoexist->bt_info.bt_get_fw_ver = bt_patch_ver;
 	coex_sta->specific_pkt_period_cnt++;
 
 	/* sample to set bt to execute Ant detection */
diff --git a/rtl8822BU/hal/btc/halbtc8723b1ant.h b/rtl8822BU/hal/btc/halbtc8723b1ant.h
index af476d9..adb29d4 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8723b1ant.h
+++ b/rtl8822BU/hal/btc/halbtc8723b1ant.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 
 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
 
diff --git a/rtl8822BU/hal/btc/halbtc8723b2ant.c b/rtl8822BU/hal/btc/halbtc8723b2ant.c
index 56951c6..d74f103 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8723b2ant.c
+++ b/rtl8822BU/hal/btc/halbtc8723b2ant.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 /* ************************************************************
  * Description:
  *
@@ -31,9 +45,9 @@ const char *const glbt_info_src_8723b_2ant[] = {
 	"BT Info[bt auto report]",
 };
 
-u32	glcoex_ver_date_8723b_2ant = 20160816;
-u32	glcoex_ver_8723b_2ant = 0x4b;
-u32	glcoex_ver_btdesired_8723b_2ant = 0x4a;
+u32	glcoex_ver_date_8723b_2ant = 20161007;
+u32	glcoex_ver_8723b_2ant = 0x4c;
+u32	glcoex_ver_btdesired_8723b_2ant = 0x4c;
 
 /* ************************************************************
  * local function proto type if needed
@@ -952,6 +966,35 @@ void halbtc8723b2ant_agc_table(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
 }
 
+void halbtc8723b2ant_sw_mechanism1(IN struct btc_coexist *btcoexist,
+			   IN boolean shrink_rx_lpf, IN boolean low_penalty_ra,
+			   IN boolean limited_dig, IN boolean bt_lna_constrain)
+{
+	/*
+	u32	wifi_bw;
+
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
+
+	if(BTC_WIFI_BW_HT40 != wifi_bw)
+	{
+		if (shrink_rx_lpf)
+			shrink_rx_lpf = false;
+	}
+	*/
+
+	/* halbtc8723b2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf); */
+	halbtc8723b2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra);
+}
+
+void halbtc8723b2ant_sw_mechanism2(IN struct btc_coexist *btcoexist,
+			   IN boolean agc_table_shift, IN boolean adc_back_off,
+			   IN boolean sw_dac_swing, IN u32 dac_swing_lvl)
+{
+	/* halbtc8723b2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift); */
+	/* halbtc8723b2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off); */
+	/* halbtc8723b2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing, dac_swing_lvl); */
+}
+
 void halbtc8723b2ant_set_coex_table(IN struct btc_coexist *btcoexist,
 	    IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
 {
@@ -1075,6 +1118,21 @@ void halbtc8723b2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
 	btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
 }
 
+void halbtc8723b2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
+				     IN boolean force_exec, IN boolean enable)
+{
+	coex_dm->cur_ignore_wlan_act = enable;
+
+	if (!force_exec) {
+		if (coex_dm->pre_ignore_wlan_act ==
+		    coex_dm->cur_ignore_wlan_act)
+			return;
+	}
+	halbtc8723b2ant_set_fw_ignore_wlan_act(btcoexist, enable);
+
+	coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
+}
+
 void halbtc8723b2ant_set_lps_rpwm(IN struct btc_coexist *btcoexist,
 				  IN u8 lps_val, IN u8 rpwm_val)
 {
@@ -1102,30 +1160,115 @@ void halbtc8723b2ant_lps_rpwm(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_rpwm = coex_dm->cur_rpwm;
 }
 
-void halbtc8723b2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
-				     IN boolean force_exec, IN boolean enable)
+void halbtc8723b2ant_ps_tdma_check_for_power_save_state(
+	IN struct btc_coexist *btcoexist, IN boolean new_ps_state)
 {
-	coex_dm->cur_ignore_wlan_act = enable;
+	u8	lps_mode = 0x0;
+	u8	h2c_parameter[5] = {0x0, 0, 0, 48, 0};
 
-	if (!force_exec) {
-		if (coex_dm->pre_ignore_wlan_act ==
-		    coex_dm->cur_ignore_wlan_act)
-			return;
+	btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode);
+
+	if (lps_mode) {	/* already under LPS state */
+		if (new_ps_state) {
+			/* keep state under LPS, do nothing. */
+		} else {
+			/* will leave LPS state, turn off psTdma first */
+			/* halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
+						1); */
+			btcoexist->btc_fill_h2c(btcoexist, 0x60, 5,
+				h2c_parameter);
+		}
+	} else {					/* NO PS state */
+		if (new_ps_state) {
+			/* will enter LPS state, turn off psTdma first */
+			/* halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
+						1); */
+			btcoexist->btc_fill_h2c(btcoexist, 0x60, 5,
+				h2c_parameter);
+		} else {
+			/* keep state under NO PS state, do nothing. */
+		}
 	}
-	halbtc8723b2ant_set_fw_ignore_wlan_act(btcoexist, enable);
+}
 
-	coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
+void halbtc8723b2ant_power_save_state(IN struct btc_coexist *btcoexist,
+			      IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val)
+{
+	boolean		low_pwr_disable = false;
+
+	switch (ps_type) {
+	case BTC_PS_WIFI_NATIVE:
+		/* recover to original 32k low power setting */
+		low_pwr_disable = false;
+		btcoexist->btc_set(btcoexist,
+				   BTC_SET_ACT_DISABLE_LOW_POWER,
+				   &low_pwr_disable);
+		btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS,
+				   NULL);
+		coex_sta->force_lps_on = false;
+		break;
+	case BTC_PS_LPS_ON:
+		halbtc8723b2ant_ps_tdma_check_for_power_save_state(
+			btcoexist, true);
+		halbtc8723b2ant_lps_rpwm(btcoexist, NORMAL_EXEC,
+					 lps_val, rpwm_val);
+		/* when coex force to enter LPS, do not enter 32k low power. */
+		low_pwr_disable = true;
+		btcoexist->btc_set(btcoexist,
+				   BTC_SET_ACT_DISABLE_LOW_POWER,
+				   &low_pwr_disable);
+		/* power save must executed before psTdma.			 */
+		btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS,
+				   NULL);
+		coex_sta->force_lps_on = true;
+		break;
+	case BTC_PS_LPS_OFF:
+		halbtc8723b2ant_ps_tdma_check_for_power_save_state(
+			btcoexist, false);
+		btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
+				   NULL);
+		coex_sta->force_lps_on = false;
+		break;
+	default:
+		break;
+	}
 }
 
+
 void halbtc8723b2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
 	   IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5)
 {
 	u8			h2c_parameter[5] = {0};
-
+	u8			real_byte1 = byte1, real_byte5 = byte5;
+	boolean		ap_enable = false;
 
 	if ((coex_sta->a2dp_exist) && (coex_sta->hid_exist))
 		byte5 = byte5 | 0x1;
 
+
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
+			   &ap_enable);
+
+	if (ap_enable) {
+		if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
+			real_byte1 &= ~BIT(4);
+			real_byte1 |= BIT(5);
+
+			real_byte5 |= BIT(5);
+			real_byte5 &= ~BIT(6);
+
+			halbtc8723b2ant_power_save_state(btcoexist,
+				BTC_PS_WIFI_NATIVE, 0x0, 0x0);
+		}
+	} else if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
+			halbtc8723b2ant_power_save_state(btcoexist,
+				BTC_PS_LPS_ON, 0x50, 0x4);
+
+	} else {
+			halbtc8723b2ant_power_save_state(btcoexist,
+				BTC_PS_WIFI_NATIVE, 0x0, 0x0);
+	}
+
 	h2c_parameter[0] = byte1;
 	h2c_parameter[1] = byte2;
 	h2c_parameter[2] = byte3;
@@ -1141,230 +1284,6 @@ void halbtc8723b2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
 	btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
 }
 
-void halbtc8723b2ant_sw_mechanism1(IN struct btc_coexist *btcoexist,
-			   IN boolean shrink_rx_lpf, IN boolean low_penalty_ra,
-			   IN boolean limited_dig, IN boolean bt_lna_constrain)
-{
-	/*
-	u32	wifi_bw;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
-
-	if(BTC_WIFI_BW_HT40 != wifi_bw)
-	{
-		if (shrink_rx_lpf)
-			shrink_rx_lpf = false;
-	}
-	*/
-
-	/* halbtc8723b2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf); */
-	halbtc8723b2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra);
-}
-
-void halbtc8723b2ant_sw_mechanism2(IN struct btc_coexist *btcoexist,
-			   IN boolean agc_table_shift, IN boolean adc_back_off,
-			   IN boolean sw_dac_swing, IN u32 dac_swing_lvl)
-{
-	/* halbtc8723b2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift); */
-	/* halbtc8723b2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off); */
-	/* halbtc8723b2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing, dac_swing_lvl); */
-}
-
-void halbtc8723b2ant_set_ant_path(IN struct btc_coexist *btcoexist,
-	  IN u8 ant_pos_type, IN boolean init_hwcfg, IN boolean wifi_off)
-{
-	struct  btc_board_info *board_info = &btcoexist->board_info;
-	u32			fw_ver = 0, u32tmp = 0, cnt_bt_cal_chk = 0;
-	boolean			pg_ext_switch = false;
-	boolean			use_ext_switch = false;
-	u8			h2c_parameter[2] = {0};
-	u32				u32tmp_1[4];
-	boolean		is_fw_ready;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_EXT_SWITCH, &pg_ext_switch);
-	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER,
-			   &fw_ver);	/* [31:16]=fw ver, [15:0]=fw sub ver */
-
-	if ((fw_ver > 0 && fw_ver < 0xc0000) || pg_ext_switch)
-		use_ext_switch = true;
-
-	if (init_hwcfg) {
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x39, 0x8, 0x1);
-		btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x944, 0x3, 0x3);
-		btcoexist->btc_write_1byte(btcoexist, 0x930, 0x77);
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20, 0x1);
-
-		if (fw_ver >= 0x180000) {
-			/* Use H2C to set GNT_BT to High to avoid A2DP click */
-			h2c_parameter[0] = 1;
-			btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1,
-						h2c_parameter);
-
-			cnt_bt_cal_chk = 0;
-			while (1) {
-				btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_FW_READY, &is_fw_ready);
-				if (is_fw_ready == false) {
-					/* RT_TRACE(COMP_INIT , DBG_LOUD, "halbtc8723b2ant_set_ant_path(): we don't need to wait for H2C command completion because of Fw download fail!!!\n"); */
-					break;
-				}
-
-				if (btcoexist->btc_read_1byte(btcoexist,
-							      0x765) == 0x18)
-					break;
-
-				cnt_bt_cal_chk++;
-				if (cnt_bt_cal_chk > 20)
-					break;
-			}
-		} else
-			btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18);
-		u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
-		if ((u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
-			btcoexist->btc_write_4byte(btcoexist, 0x948,
-						   u32tmp_1[0]);
-		else
-			btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
-
-		btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
-					  0x0); /* WiFi TRx Mask off */
-		/* remove due to interrupt is disabled that polling c2h will fail and delay 100ms. */
-		/* btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x3c, 0x01); */ /*BT TRx Mask off */
-
-		if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) {
-			/* tell firmware "no antenna inverse" */
-			h2c_parameter[0] = 0;
-		} else {
-			/* tell firmware "antenna inverse" */
-			h2c_parameter[0] = 1;
-		}
-
-		if (use_ext_switch) {
-			/* ext switch type */
-			h2c_parameter[1] = 1;
-		} else {
-			/* int switch type */
-			h2c_parameter[1] = 0;
-		}
-		btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, h2c_parameter);
-	} else {
-		if (fw_ver >= 0x180000) {
-			/* Use H2C to set GNT_BT to "Control by PTA"*/
-			h2c_parameter[0] = 0;
-			btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1,
-						h2c_parameter);
-
-			cnt_bt_cal_chk = 0;
-			while (1) {
-				btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_FW_READY, &is_fw_ready);
-				if (is_fw_ready == false) {
-					/* RT_TRACE(COMP_INIT , DBG_LOUD, "halbtc8723b2ant_set_ant_path(): we don't need to wait for H2C command completion because of Fw download fail!!!\n"); */
-					break;
-				}
-
-				if (btcoexist->btc_read_1byte(btcoexist,
-							      0x765) == 0x0)
-					break;
-
-				cnt_bt_cal_chk++;
-				if (cnt_bt_cal_chk > 20)
-					break;
-			}
-		} else
-			btcoexist->btc_write_1byte(btcoexist, 0x765, 0x0);
-	}
-
-	/* ext switch setting */
-	if (use_ext_switch) {
-		if (init_hwcfg) {
-			/* 0x4c[23]=0, 0x4c[24]=1  Antenna control by WL/BT */
-			u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
-			u32tmp &= ~BIT(23);
-			u32tmp |= BIT(24);
-			btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
-		}
-		u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
-		if ((u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
-			btcoexist->btc_write_4byte(btcoexist, 0x948,
-						   u32tmp_1[0]);
-		else
-			btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
-
-		switch (ant_pos_type) {
-		case BTC_ANT_WIFI_AT_MAIN:
-			btcoexist->btc_write_1byte_bitmask(btcoexist,
-							   0x92c, 0x3,
-					   0x1);	/* ext switch main at wifi */
-			break;
-		case BTC_ANT_WIFI_AT_AUX:
-			btcoexist->btc_write_1byte_bitmask(btcoexist,
-							   0x92c, 0x3,
-					   0x2);	/* ext switch aux at wifi */
-			break;
-		}
-	} else {	/* internal switch */
-		if (init_hwcfg) {
-			/* 0x4c[23]=0, 0x4c[24]=1  Antenna control by WL/BT */
-			u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
-			u32tmp |= BIT(23);
-			u32tmp &= ~BIT(24);
-			btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
-		}
-
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x64, 0x1,
-			   0x0); /* fixed external switch S1->Main, S0->Aux */
-		switch (ant_pos_type) {
-		case BTC_ANT_WIFI_AT_MAIN:
-			u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist,
-								0x948);
-			if ((u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
-				btcoexist->btc_write_4byte(btcoexist, 0x948,
-							   u32tmp_1[0]);
-			else
-				btcoexist->btc_write_4byte(btcoexist, 0x948,
-							   0x0);
-			break;
-		case BTC_ANT_WIFI_AT_AUX:
-			u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist,
-								0x948);
-			if ((u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
-				btcoexist->btc_write_4byte(btcoexist, 0x948,
-							   u32tmp_1[0]);
-			else
-				btcoexist->btc_write_4byte(btcoexist, 0x948,
-							   0x280);
-			break;
-		}
-	}
-}
-#if 0
-boolean halbtc8723b2ant_CoexSwitchThresCheck(IN struct btc_coexist *btcoexist)
-{
-	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
-	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
-	u8 wifi_rssi_state1, bt_rssi_state;
-	u32 vendor;
-	u8 offset = 0;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_U4_VENDOR, &vendor);
-
-	/* if (vendor == BTC_VENDOR_LENOVO) */
-	/*	offset = 20; */
-
-	wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
-		&prewifi_rssi_state, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES
-			   - coex_dm->switch_thres_offset, 0);
-	bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
-			BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
-			coex_dm->switch_thres_offset, 0);
-
-	if (BTC_RSSI_LOW(wifi_rssi_state1) || BTC_RSSI_LOW(bt_rssi_state))
-		return true;
-
-	return false;
-}
-#endif
-
 void halbtc8723b2ant_ps_tdma(IN struct btc_coexist *btcoexist,
 		     IN boolean force_exec, IN boolean turn_on, IN u8 type)
 {
@@ -1669,81 +1588,202 @@ void halbtc8723b2ant_ps_tdma(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
 }
 
-void halbtc8723b2ant_ps_tdma_check_for_power_save_state(
-	IN struct btc_coexist *btcoexist, IN boolean new_ps_state)
+
+void halbtc8723b2ant_set_ant_path(IN struct btc_coexist *btcoexist,
+	  IN u8 ant_pos_type, IN boolean init_hwcfg, IN boolean wifi_off)
 {
-	u8	lps_mode = 0x0;
+	struct  btc_board_info *board_info = &btcoexist->board_info;
+	u32			fw_ver = 0, u32tmp = 0, cnt_bt_cal_chk = 0;
+	boolean			pg_ext_switch = false;
+	boolean			use_ext_switch = false;
+	u8			h2c_parameter[2] = {0};
+	u32				u32tmp_1[4];
+	boolean		is_fw_ready;
 
-	btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_EXT_SWITCH, &pg_ext_switch);
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER,
+			   &fw_ver);	/* [31:16]=fw ver, [15:0]=fw sub ver */
 
-	if (lps_mode) {	/* already under LPS state */
-		if (new_ps_state) {
-			/* keep state under LPS, do nothing. */
+	if ((fw_ver > 0 && fw_ver < 0xc0000) || pg_ext_switch)
+		use_ext_switch = true;
+
+	if (init_hwcfg) {
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x39, 0x8, 0x1);
+		btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x944, 0x3, 0x3);
+		btcoexist->btc_write_1byte(btcoexist, 0x930, 0x77);
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20, 0x1);
+
+		if (fw_ver >= 0x180000) {
+			/* Use H2C to set GNT_BT to High to avoid A2DP click */
+			h2c_parameter[0] = 1;
+			btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1,
+						h2c_parameter);
+
+			cnt_bt_cal_chk = 0;
+			while (1) {
+				btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_FW_READY, &is_fw_ready);
+				if (is_fw_ready == false)
+					break;
+
+				if (btcoexist->btc_read_1byte(btcoexist,
+							      0x765) == 0x18)
+					break;
+
+				cnt_bt_cal_chk++;
+				if (cnt_bt_cal_chk > 20)
+					break;
+			}
+		} else
+			btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18);
+		u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
+		if ((u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
+			btcoexist->btc_write_4byte(btcoexist, 0x948,
+						   u32tmp_1[0]);
+		else
+			btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
+
+		btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
+					  0x0); /* WiFi TRx Mask off */
+		/* remove due to interrupt is disabled that polling c2h will fail and delay 100ms. */
+		/* btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x3c, 0x01); */ /*BT TRx Mask off */
+
+		if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) {
+			/* tell firmware "no antenna inverse" */
+			h2c_parameter[0] = 0;
 		} else {
-			/* will leave LPS state, turn off psTdma first */
-			halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
-						1);
+			/* tell firmware "antenna inverse" */
+			h2c_parameter[0] = 1;
 		}
-	} else {					/* NO PS state */
-		if (new_ps_state) {
-			/* will enter LPS state, turn off psTdma first */
-			halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
-						1);
+
+		if (use_ext_switch) {
+			/* ext switch type */
+			h2c_parameter[1] = 1;
 		} else {
-			/* keep state under NO PS state, do nothing. */
+			/* int switch type */
+			h2c_parameter[1] = 0;
+		}
+		btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, h2c_parameter);
+	} else {
+		if (fw_ver >= 0x180000) {
+			/* Use H2C to set GNT_BT to "Control by PTA"*/
+			h2c_parameter[0] = 0;
+			btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1,
+						h2c_parameter);
+
+			cnt_bt_cal_chk = 0;
+			while (1) {
+				btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_FW_READY, &is_fw_ready);
+				if (is_fw_ready == false)
+					break;
+
+				if (btcoexist->btc_read_1byte(btcoexist,
+							      0x765) == 0x0)
+					break;
+
+				cnt_bt_cal_chk++;
+				if (cnt_bt_cal_chk > 20)
+					break;
+			}
+		} else
+			btcoexist->btc_write_1byte(btcoexist, 0x765, 0x0);
+	}
+
+	/* ext switch setting */
+	if (use_ext_switch) {
+		if (init_hwcfg) {
+			/* 0x4c[23]=0, 0x4c[24]=1  Antenna control by WL/BT */
+			u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
+			u32tmp &= ~BIT(23);
+			u32tmp |= BIT(24);
+			btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
+		}
+		u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
+		if ((u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
+			btcoexist->btc_write_4byte(btcoexist, 0x948,
+						   u32tmp_1[0]);
+		else
+			btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
+
+		switch (ant_pos_type) {
+		case BTC_ANT_WIFI_AT_MAIN:
+			btcoexist->btc_write_1byte_bitmask(btcoexist,
+							   0x92c, 0x3,
+					   0x1);	/* ext switch main at wifi */
+			break;
+		case BTC_ANT_WIFI_AT_AUX:
+			btcoexist->btc_write_1byte_bitmask(btcoexist,
+							   0x92c, 0x3,
+					   0x2);	/* ext switch aux at wifi */
+			break;
+		}
+	} else {	/* internal switch */
+		if (init_hwcfg) {
+			/* 0x4c[23]=0, 0x4c[24]=1  Antenna control by WL/BT */
+			u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
+			u32tmp |= BIT(23);
+			u32tmp &= ~BIT(24);
+			btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
+		}
+
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x64, 0x1,
+			   0x0); /* fixed external switch S1->Main, S0->Aux */
+		switch (ant_pos_type) {
+		case BTC_ANT_WIFI_AT_MAIN:
+			u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist,
+								0x948);
+			if ((u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
+				btcoexist->btc_write_4byte(btcoexist, 0x948,
+							   u32tmp_1[0]);
+			else
+				btcoexist->btc_write_4byte(btcoexist, 0x948,
+							   0x0);
+			break;
+		case BTC_ANT_WIFI_AT_AUX:
+			u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist,
+								0x948);
+			if ((u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
+				btcoexist->btc_write_4byte(btcoexist, 0x948,
+							   u32tmp_1[0]);
+			else
+				btcoexist->btc_write_4byte(btcoexist, 0x948,
+							   0x280);
+			break;
 		}
 	}
 }
-
-void halbtc8723b2ant_power_save_state(IN struct btc_coexist *btcoexist,
-			      IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val)
+#if 0
+boolean halbtc8723b2ant_CoexSwitchThresCheck(IN struct btc_coexist *btcoexist)
 {
-	boolean		low_pwr_disable = false;
+	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
+	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
+	u8 wifi_rssi_state1, bt_rssi_state;
+	u32 vendor;
+	u8 offset = 0;
 
-	switch (ps_type) {
-	case BTC_PS_WIFI_NATIVE:
-		/* recover to original 32k low power setting */
-		low_pwr_disable = false;
-		btcoexist->btc_set(btcoexist,
-				   BTC_SET_ACT_DISABLE_LOW_POWER,
-				   &low_pwr_disable);
-		btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS,
-				   NULL);
-		coex_sta->force_lps_on = false;
-		break;
-	case BTC_PS_LPS_ON:
-		halbtc8723b2ant_ps_tdma_check_for_power_save_state(
-			btcoexist, true);
-		halbtc8723b2ant_lps_rpwm(btcoexist, NORMAL_EXEC,
-					 lps_val, rpwm_val);
-		/* when coex force to enter LPS, do not enter 32k low power. */
-		low_pwr_disable = true;
-		btcoexist->btc_set(btcoexist,
-				   BTC_SET_ACT_DISABLE_LOW_POWER,
-				   &low_pwr_disable);
-		/* power save must executed before psTdma.			 */
-		btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS,
-				   NULL);
-		coex_sta->force_lps_on = true;
-		break;
-	case BTC_PS_LPS_OFF:
-		halbtc8723b2ant_ps_tdma_check_for_power_save_state(
-			btcoexist, false);
-		btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
-				   NULL);
-		coex_sta->force_lps_on = false;
-		break;
-	default:
-		break;
-	}
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_VENDOR, &vendor);
+
+	/* if (vendor == BTC_VENDOR_LENOVO) */
+	/*	offset = 20; */
+
+	wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
+		&prewifi_rssi_state, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES
+			   - coex_dm->switch_thres_offset, 0);
+	bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
+			BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
+			coex_dm->switch_thres_offset, 0);
+
+	if (BTC_RSSI_LOW(wifi_rssi_state1) || BTC_RSSI_LOW(bt_rssi_state))
+		return true;
+
+	return false;
 }
+#endif
 
 
 void halbtc8723b2ant_coex_all_off(IN struct btc_coexist *btcoexist)
 {
 	/* fw all off */
-	halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
-					 0x0);
 	halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
 	halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
 	halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
@@ -1762,8 +1802,6 @@ void halbtc8723b2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
 	/* force to reset coex mechanism */
 	halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 
-	halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
-					 0x0);
 	halbtc8723b2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
 	halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
 	halbtc8723b2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, 0);
@@ -1807,8 +1845,6 @@ void halbtc8723b2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
-	halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
-					 0x0);
 
 	if (coex_sta->bt_abnormal_scan) {
 		halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
@@ -1919,8 +1955,6 @@ boolean halbtc8723b2ant_action_wifi_idle_process(IN struct btc_coexist
 
 		halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 
-		halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
-						 0x0, 0x0);
 		halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
 
 		return true;
@@ -1958,8 +1992,6 @@ boolean halbtc8723b2ant_is_common_action(IN struct btc_coexist *btcoexist)
 					  0x0);
 		halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 
-		halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
-						 0x0, 0x0);
 		halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
 		halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
 		halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
@@ -1989,8 +2021,6 @@ boolean halbtc8723b2ant_is_common_action(IN struct btc_coexist *btcoexist)
 			halbtc8723b2ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 0);
 
-			halbtc8723b2ant_power_save_state(btcoexist,
-						 BTC_PS_WIFI_NATIVE, 0x0, 0x0);
 			halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
 						1);
 			halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
@@ -2023,9 +2053,6 @@ boolean halbtc8723b2ant_is_common_action(IN struct btc_coexist *btcoexist)
 						  0xfffff, 0x0);
 			halbtc8723b2ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 0);
-
-			halbtc8723b2ant_power_save_state(btcoexist,
-						 BTC_PS_WIFI_NATIVE, 0x0, 0x0);
 			halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
 						1);
 			halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
@@ -3017,8 +3044,6 @@ void halbtc8723b2ant_action_sco(IN struct btc_coexist *btcoexist)
 	else  /* for SCO quality & wifi performance balance at 11n mode */
 		halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
 
-	halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
-					 0x0);
 	halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
 				0); /* for voice quality */
 
@@ -3086,9 +3111,6 @@ void halbtc8723b2ant_action_hid(IN struct btc_coexist *btcoexist)
 	else  /* for HID quality & wifi performance balance at 11n mode */
 		halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 9);
 
-	halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
-					 0x0);
-
 	if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
 	    (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
 		halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
@@ -3151,8 +3173,6 @@ void halbtc8723b2ant_action_a2dp(IN struct btc_coexist *btcoexist)
 	if ((ap_num >= 10) && BTC_RSSI_HIGH(wifi_rssi_state1) &&
 	    BTC_RSSI_HIGH(bt_rssi_state)) {
 		/* dbg_print(" AP#>10(%d)\n", ap_num); */
-		halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
-						 0x0, 0x0);
 
 		btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
 					  0x0);
@@ -3163,8 +3183,6 @@ void halbtc8723b2ant_action_a2dp(IN struct btc_coexist *btcoexist)
 
 		halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 
-		halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
-						 0x0, 0x0);
 		halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
 
 		/* sw mechanism */
@@ -3197,13 +3215,10 @@ void halbtc8723b2ant_action_a2dp(IN struct btc_coexist *btcoexist)
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
 		halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
-		halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
-						 0x0, 0x0);
+
 	} else {
 		halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
 						     13);
-		halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
-						 0x4);
 	}
 
 
@@ -3276,13 +3291,10 @@ void halbtc8723b2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
 		halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
-		halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
-						 0x0, 0x0);
+
 	} else {
 		halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
 						     13);
-		halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
-						 0x4);
 	}
 
 	halbtc8723b2ant_tdma_duration_adjust(btcoexist, false, true, 2);
@@ -3350,13 +3362,9 @@ void halbtc8723b2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
 	if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
 		halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
 						     10);
-		halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
-						 0x0, 0x0);
 	} else {
 		halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
 						     13);
-		halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
-						 0x4);
 	}
 
 	if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
@@ -3429,8 +3437,6 @@ void halbtc8723b2ant_action_pan_hs(IN struct btc_coexist *btcoexist)
 
 	halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
 
-	halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
-					 0x0);
 	halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
 
 	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
@@ -3494,13 +3500,6 @@ void halbtc8723b2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
 	else
 		halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-	if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state))
-		halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
-						 0x0, 0x0);
-	else
-		halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
-						 0x4);
-
 	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
 	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
 			   &ap_num);
@@ -3588,13 +3587,9 @@ void halbtc8723b2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
 		halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
-		halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
-						 0x0, 0x0);
 	} else {
 		halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
 						     14);
-		halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
-						 0x4);
 	}
 
 	if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
@@ -3685,13 +3680,9 @@ void halbtc8723b2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
 		halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
-		halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
-						 0x0, 0x0);
 	} else {
 		halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
 						     14);
-		halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
-						 0x4);
 	}
 
 	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
@@ -3795,13 +3786,9 @@ void halbtc8723b2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
 		halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
-		halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
-						 0x0, 0x0);
 	} else {
 		halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
 						     14);
-		halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
-						 0x4);
 	}
 
 	if (BTC_RSSI_HIGH(bt_rssi_state)) {
@@ -3866,9 +3853,6 @@ void halbtc8723b2ant_action_bt_whck_test(IN struct btc_coexist *btcoexist)
 	halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
 	halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
 
-	halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
-					 0x0);
-
 	halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
 	halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 }
@@ -3886,8 +3870,6 @@ void halbtc8723b2ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
 	/* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); */
 	halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 
-	halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
-					 0x0);
 	halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
 }
 
@@ -4174,7 +4156,6 @@ void ex_halbtc8723b2ant_power_on_setting(IN struct btc_coexist *btcoexist)
 	/* enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. */
 	u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x2);
 	btcoexist->btc_write_2byte(btcoexist, 0x2, u16tmp | BIT(0) | BIT(1));
-	dbg_print("--- TEST 5 ---\n");
 
 	btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
 
@@ -4757,11 +4738,19 @@ void ex_halbtc8723b2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 				   &coex_sta->bt_tx_rx_mask);
 		if (coex_sta->bt_tx_rx_mask) {
 			/* BT into is responded by BT FW and BT RF REG 0x3C != 0x01 => Need to switch BT TRx Mask */
+			/* BT TRx mask off */
+			btcoexist->btc_set_bt_trx_mask(btcoexist, 0);
+
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"############# [BTCoex], BT TRx Mask off for BT Info Notify\n");
+			BTC_TRACE(trace_buf);
+#if 0
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x01\n");
 			BTC_TRACE(trace_buf);
 			btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF,
 						  0x3c, 0x01);
+#endif
 		}
 
 		/* Here we need to resend some wifi info to BT */
@@ -4931,6 +4920,8 @@ void ex_halbtc8723b2ant_pnp_notify(IN struct btc_coexist *btcoexist,
 
 void ex_halbtc8723b2ant_periodical(IN struct btc_coexist *btcoexist)
 {
+	u32 bt_patch_ver;
+
 	struct  btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -4948,12 +4939,13 @@ void ex_halbtc8723b2ant_periodical(IN struct btc_coexist *btcoexist)
 		}
 	}
 
-
 	if (((coex_sta->bt_coex_supported_version == 0) ||
-	     (coex_sta->bt_coex_supported_version == 0xffff)) &&
-	    (!coex_sta->bt_disabled))
-		coex_sta->bt_coex_supported_version =
-			btcoexist->btc_get_bt_coex_supported_version(btcoexist);
+	     (coex_sta->bt_coex_supported_version == 0xffff)) && (!coex_sta->bt_disabled))
+		btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_VERSION, &coex_sta->bt_coex_supported_version);
+
+
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
+	btcoexist->bt_info.bt_get_fw_ver = bt_patch_ver;
 
 #if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 0)
 	halbtc8723b2ant_query_bt_info(btcoexist);
diff --git a/rtl8822BU/hal/btc/halbtc8723b2ant.h b/rtl8822BU/hal/btc/halbtc8723b2ant.h
index b44959c..fb6149a 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8723b2ant.h
+++ b/rtl8822BU/hal/btc/halbtc8723b2ant.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 
 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
 
diff --git a/rtl8822BU/hal/btc/halbtc8723bwifionly.c b/rtl8822BU/hal/btc/halbtc8723bwifionly.c
index 9be8d62..d1a8361 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8723bwifionly.c
+++ b/rtl8822BU/hal/btc/halbtc8723bwifionly.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #include "mp_precomp.h"
 
 
diff --git a/rtl8822BU/hal/btc/halbtc8723bwifionly.h b/rtl8822BU/hal/btc/halbtc8723bwifionly.h
index 0265ab3..9d38664 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8723bwifionly.h
+++ b/rtl8822BU/hal/btc/halbtc8723bwifionly.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef __INC_HAL8723BWIFIONLYHWCFG_H
 #define __INC_HAL8723BWIFIONLYHWCFG_H
 
diff --git a/rtl8822BU/hal/btc/halbtc8723d1ant.c b/rtl8822BU/hal/btc/halbtc8723d1ant.c
index a333ed8..5340c1b 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8723d1ant.c
+++ b/rtl8822BU/hal/btc/halbtc8723d1ant.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 /* ************************************************************
  * Description:
  *
@@ -44,9 +58,9 @@ const char *const glbt_info_src_8723d_1ant[] = {
  * Please strictly follow this order and naming style !!!
  *
  * ************************************************************ */
-u32	glcoex_ver_date_8723d_1ant = 20160805;
-u32	glcoex_ver_8723d_1ant = 0x0c;
-u32 glcoex_ver_btdesired_8723d_1ant = 0x0a;
+u32	glcoex_ver_date_8723d_1ant = 20161108;
+u32	glcoex_ver_8723d_1ant = 0x10;
+u32 glcoex_ver_btdesired_8723d_1ant = 0x10;
 
 
 /* ************************************************************
@@ -336,8 +350,6 @@ void halbtc8723d1ant_query_bt_info(IN struct btc_coexist *btcoexist)
 {
 	u8			h2c_parameter[1] = {0};
 
-	coex_sta->c2h_bt_info_req_sent = true;
-
 	h2c_parameter[0] |= BIT(0);	/* trigger */
 
 	btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
@@ -349,10 +361,11 @@ void halbtc8723d1ant_query_bt_info(IN struct btc_coexist *btcoexist)
 
 void halbtc8723d1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 {
-	u32			reg_hp_txrx, reg_lp_txrx, u32tmp;
-	u32			reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
-	static u8		num_of_bt_counter_chk = 0, cnt_slave = 0;
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+	u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
+	u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
+	static u8		num_of_bt_counter_chk = 0, cnt_slave = 0, cnt_overhead = 0,
+				cnt_autoslot_hang = 0;
+	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
 	/* to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS */
 	/* if (! (btcoexist->btc_read_1byte(btcoexist, 0x76e) & 0x8) ) */
@@ -373,30 +386,48 @@ void halbtc8723d1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 	coex_sta->low_priority_tx = reg_lp_tx;
 	coex_sta->low_priority_rx = reg_lp_rx;
 
+	if (BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
+		coex_dm->bt_status) {
+
+			if (coex_sta->high_priority_rx >= 15) {
+					if (cnt_overhead < 3)
+						cnt_overhead++;
+
+					if (cnt_overhead == 3)
+						coex_sta->is_hiPri_rx_overhead = true;
+			} else {
+					if (cnt_overhead > 0)
+						cnt_overhead--;
+
+					if (cnt_overhead == 0)
+						coex_sta->is_hiPri_rx_overhead = false;
+			}
+	}
+
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n",
-		    reg_hp_rx, reg_hp_tx, reg_lp_rx, reg_lp_tx);
+			"[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n",
+			reg_hp_rx, reg_hp_tx, reg_lp_rx, reg_lp_tx);
 
 	BTC_TRACE(trace_buf);
 
 	/* reset counter */
 	btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
 
-	if ((coex_sta->low_priority_tx > 1150)  &&
-	    (!coex_sta->c2h_bt_inquiry_page))
+	if ((coex_sta->low_priority_tx > 1150)	&&
+		(!coex_sta->c2h_bt_inquiry_page))
 		coex_sta->pop_event_cnt++;
 
 	if ((coex_sta->low_priority_rx >= 1150) &&
-	    (coex_sta->low_priority_rx >= coex_sta->low_priority_tx)
-	    && (!coex_sta->under_ips)  && (!coex_sta->c2h_bt_inquiry_page) &&
-	    (coex_sta->bt_link_exist))	{
-		if (cnt_slave >= 3) {
+		(coex_sta->low_priority_rx >= coex_sta->low_priority_tx)
+		&& (!coex_sta->under_ips)  && (!coex_sta->c2h_bt_inquiry_page) &&
+		(coex_sta->bt_link_exist))	{
+		if (cnt_slave >= 2) {
 			bt_link_info->slave_role = true;
-			cnt_slave = 3;
+			cnt_slave = 2;
 		} else
 			cnt_slave++;
 	} else {
-		if (cnt_slave == 0)	{
+		if (cnt_slave == 0) {
 			bt_link_info->slave_role = false;
 			cnt_slave = 0;
 		} else
@@ -404,35 +435,57 @@ void halbtc8723d1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 
 	}
 
-	if ((coex_sta->high_priority_tx == 0) &&
-	    (coex_sta->high_priority_rx == 0) &&
-	    (coex_sta->low_priority_tx == 0) &&
-	    (coex_sta->low_priority_rx == 0)) {
-		num_of_bt_counter_chk++;
-		if (num_of_bt_counter_chk >= 3) {
-			halbtc8723d1ant_query_bt_info(btcoexist);
-			num_of_bt_counter_chk = 0;
+	if (coex_sta->is_tdma_btautoslot) {
+		if ((coex_sta->low_priority_tx >= 1300) &&
+			(coex_sta->low_priority_rx <= 150)) {
+			if (cnt_autoslot_hang >= 2) {
+				coex_sta->is_tdma_btautoslot_hang = true;
+				cnt_autoslot_hang = 2;
+			} else
+				cnt_autoslot_hang++;
+		} else {
+			if (cnt_autoslot_hang == 0)	{
+				coex_sta->is_tdma_btautoslot_hang = false;
+				cnt_autoslot_hang = 0;
+			} else
+				cnt_autoslot_hang--;
 		}
 	}
 
+	if (!coex_sta->bt_disabled) {
 
-}
-
+		if ((coex_sta->high_priority_tx == 0) &&
+			(coex_sta->high_priority_rx == 0) &&
+			(coex_sta->low_priority_tx == 0) &&
+			(coex_sta->low_priority_rx == 0)) {
+			num_of_bt_counter_chk++;
+			if (num_of_bt_counter_chk >= 3) {
+				halbtc8723d1ant_query_bt_info(btcoexist);
+				num_of_bt_counter_chk = 0;
+			}
+		}
+	}
 
+}
 
 void halbtc8723d1ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 {
 #if 1
 		s32 wifi_rssi = 0;
-		boolean wifi_busy = false, wifi_under_b_mode = false;
-		static u8 cck_lock_counter = 0;
-		u32 total_cnt, reg_val1, reg_val2;
+		boolean wifi_busy = false, wifi_under_b_mode = false,
+			    wifi_scan = false;
+		boolean	bt_idle = false, wl_idle = false;
+	    static u8 cck_lock_counter = 0, wl_noisy_count0 = 0,
+		       wl_noisy_count1 = 3, wl_noisy_count2 = 0;
+		u32 total_cnt, reg_val1, reg_val2, cck_cnt;
 
 		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 		btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
 		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE,
 				   &wifi_under_b_mode);
 
+		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
+
 		coex_sta->crc_ok_cck = btcoexist->btc_phydm_query_PHY_counter(
 									btcoexist, PHYDM_INFO_CRC32_OK_CCK);
 		coex_sta->crc_ok_11g = btcoexist->btc_phydm_query_PHY_counter(
@@ -451,6 +504,40 @@ void halbtc8723d1ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 		coex_sta->crc_err_11n_vht = btcoexist->btc_phydm_query_PHY_counter(
 									btcoexist, PHYDM_INFO_CRC32_ERROR_VHT);
 
+		cck_cnt = coex_sta->crc_ok_cck + coex_sta->crc_err_cck;
+
+		if (cck_cnt > 250) {
+			if (wl_noisy_count2 < 3)
+				wl_noisy_count2++;
+
+			if (wl_noisy_count2 == 3) {
+				wl_noisy_count0 = 0;
+				wl_noisy_count1 = 0;
+			}
+		} else if (cck_cnt < 50) {
+			if (wl_noisy_count0 < 3)
+				wl_noisy_count0++;
+
+			if (wl_noisy_count0 == 3) {
+				wl_noisy_count1 = 0;
+				wl_noisy_count2 = 0;
+			}
+		} else {
+			if (wl_noisy_count1 < 3)
+				wl_noisy_count1++;
+
+			if (wl_noisy_count1 == 3) {
+				wl_noisy_count0 = 0;
+				wl_noisy_count2 = 0;
+			}
+		}
+
+		if (wl_noisy_count2 == 3)
+			coex_sta->wl_noisy_level = 2;
+		else if (wl_noisy_count1 == 3)
+			coex_sta->wl_noisy_level = 1;
+		else
+			coex_sta->wl_noisy_level = 0;
 
 		if ((wifi_busy) && (wifi_rssi >= 30) && (!wifi_under_b_mode)) {
 			total_cnt = coex_sta->crc_ok_cck + coex_sta->crc_ok_11g +
@@ -498,60 +585,6 @@ void halbtc8723d1ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 #endif
 }
 
-
-
-boolean halbtc8723d1ant_is_wifibt_status_changed(IN struct btc_coexist
-		*btcoexist)
-{
-	static boolean	pre_wifi_busy = false, pre_under_4way = false,
-			pre_bt_hs_on = false, pre_bt_off = false;
-	boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
-	boolean wifi_connected = false;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
-			   &wifi_connected);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
-			   &under_4way);
-
-	if (coex_sta->bt_disabled != pre_bt_off) {
-		pre_bt_off = coex_sta->bt_disabled;
-
-		if (coex_sta->bt_disabled)
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "[BTCoex], BT is disabled !!\n");
-		else
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "[BTCoex], BT is enabled !!\n");
-
-		BTC_TRACE(trace_buf);
-
-		coex_sta->bt_coex_supported_feature = 0;
-		coex_sta->bt_coex_supported_version = 0;
-		coex_sta->bt_reg_vendor_ac = 0xffff;
-		coex_sta->bt_reg_vendor_ae = 0xffff;
-		return true;
-	}
-
-	if (wifi_connected) {
-		if (wifi_busy != pre_wifi_busy) {
-			pre_wifi_busy = wifi_busy;
-			return true;
-		}
-		if (under_4way != pre_under_4way) {
-			pre_under_4way = under_4way;
-			return true;
-		}
-		if (bt_hs_on != pre_bt_hs_on) {
-			pre_bt_hs_on = bt_hs_on;
-			return true;
-		}
-	}
-
-	return false;
-}
-
 void halbtc8723d1ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 {
 	struct	btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
@@ -647,7 +680,11 @@ void halbtc8723d1ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 	else
 		bt_link_info->hid_only = false;
 
-	if (!(coex_sta->bt_info & BT_INFO_8723D_1ANT_B_CONNECTION)) {
+	if (coex_sta->bt_info & BT_INFO_8723D_1ANT_B_INQ_PAGE) {
+		coex_dm->bt_status = BT_8723D_1ANT_BT_STATUS_INQ_PAGE;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], BtInfoNotify(), BT Inq/page!!!\n");
+	} else if (!(coex_sta->bt_info & BT_INFO_8723D_1ANT_B_CONNECTION)) {
 		coex_dm->bt_status = BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE;
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
@@ -956,7 +993,7 @@ void halbtc8723d1ant_bt_auto_report(IN struct btc_coexist *btcoexist,
 void halbtc8723d1ant_set_fw_low_penalty_ra(IN struct btc_coexist
 		*btcoexist, IN boolean low_penalty_ra)
 {
-#if 0
+#if 1
 	u8			h2c_parameter[6] = {0};
 
 	h2c_parameter[0] = 0x6;	/* op_code, 0x6= Retry_Penalty */
@@ -985,23 +1022,21 @@ void halbtc8723d1ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
 			return;
 	}
 
+	halbtc8723d1ant_set_fw_low_penalty_ra(btcoexist,
+					      coex_dm->cur_low_penalty_ra);
+
+#if 0
 	if (low_penalty_ra)
 		btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 15);
 	else
 		btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 0);
-
+#endif
 	coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
 
 #endif
 
 }
 
-void halbtc8723d1ant_sw_mechanism(IN struct btc_coexist *btcoexist,
-				  IN boolean low_penalty_ra)
-{
-	halbtc8723d1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra);
-}
-
 void halbtc8723d1ant_write_score_board(
 	IN	struct  btc_coexist		*btcoexist,
 	IN	u16				bitpos,
@@ -1037,11 +1072,94 @@ void halbtc8723d1ant_post_state_to_bt(
 	IN  boolean                 state
 )
 {
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		"[BTCoex], halbtc8723d1ant_post_state_to_bt: type = %d, state =%d\n",
+		type, state);
+	BTC_TRACE(trace_buf);
 
 	halbtc8723d1ant_write_score_board(btcoexist, (u16) type, state);
-
 }
 
+boolean halbtc8723d1ant_is_wifibt_status_changed(IN struct btc_coexist
+		*btcoexist)
+{
+	static boolean	pre_wifi_busy = false, pre_under_4way = false,
+			pre_bt_hs_on = false, pre_bt_off = false, pre_bt_slave = false;
+	static u8 pre_hid_busy_num = 0, pre_wl_noisy_level = 0;
+	boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
+	boolean wifi_connected = false;
+	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
+			   &wifi_connected);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
+			   &under_4way);
+
+	if (coex_sta->bt_disabled != pre_bt_off) {
+		pre_bt_off = coex_sta->bt_disabled;
+
+		if (coex_sta->bt_disabled)
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], BT is disabled !!\n");
+		else
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], BT is enabled !!\n");
+
+		BTC_TRACE(trace_buf);
+
+		coex_sta->bt_coex_supported_feature = 0;
+		coex_sta->bt_coex_supported_version = 0;
+		coex_sta->bt_ble_scan_type = 0;
+		coex_sta->bt_ble_scan_para[0] = 0;
+		coex_sta->bt_ble_scan_para[1] = 0;
+		coex_sta->bt_ble_scan_para[2] = 0;
+		coex_sta->bt_reg_vendor_ac = 0xffff;
+		coex_sta->bt_reg_vendor_ae = 0xffff;
+		return true;
+	}
+
+	if (wifi_connected) {
+		if (wifi_busy != pre_wifi_busy) {
+			pre_wifi_busy = wifi_busy;
+
+			if (wifi_busy)
+				halbtc8723d1ant_post_state_to_bt(btcoexist,
+						BT_8723D_1ANT_SCOREBOARD_UNDERTEST, true);
+			else
+				halbtc8723d1ant_post_state_to_bt(btcoexist,
+						BT_8723D_1ANT_SCOREBOARD_UNDERTEST, false);
+			return true;
+		}
+		if (under_4way != pre_under_4way) {
+			pre_under_4way = under_4way;
+			return true;
+		}
+		if (bt_hs_on != pre_bt_hs_on) {
+			pre_bt_hs_on = bt_hs_on;
+			return true;
+		}
+		if (coex_sta->wl_noisy_level != pre_wl_noisy_level) {
+			pre_wl_noisy_level = coex_sta->wl_noisy_level;
+			return true;
+		}
+	}
+
+	if (!coex_sta->bt_disabled) {
+	    if (coex_sta->hid_busy_num != pre_hid_busy_num) {
+			pre_hid_busy_num = coex_sta->hid_busy_num;
+			return true;
+		}
+	}
+
+	if (bt_link_info->slave_role != pre_bt_slave) {
+			pre_bt_slave = bt_link_info->slave_role;
+			return true;
+		}
+
+	return false;
+}
 
 void halbtc8723d1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 {
@@ -1090,6 +1208,10 @@ void halbtc8723d1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 				   &bt_disabled);
 	}
 
+	if (bt_disabled)
+		halbtc8723d1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, false);
+	else
+		halbtc8723d1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, true);
 
 	if (coex_sta->bt_disabled != bt_disabled) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -1102,6 +1224,8 @@ void halbtc8723d1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 
 }
 
+
+
 void halbtc8723d1ant_enable_gnt_to_gpio(IN struct btc_coexist *btcoexist,
 					boolean isenable)
 {
@@ -1241,69 +1365,69 @@ void halbtc8723d1ant_ltecoex_pathcontrol_owner(IN struct btc_coexist *btcoexist,
 void halbtc8723d1ant_ltecoex_set_gnt_bt(IN struct btc_coexist *btcoexist,
 			IN u8 control_block, IN boolean sw_control, IN u8 state)
 {
-	u32 val = 0, bit_mask;
+	u32 val = 0, val_orig = 0;
 
-	state = state & 0x1;
-	val = (sw_control) ? ((state << 1) | 0x1) : 0;
+	if (!sw_control)
+		val = 0x0;
+	else if (state & 0x1)
+		val = 0x3;
+	else
+		val = 0x1;
+
+	val_orig = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist,
+				0x38);
 
 	switch (control_block) {
 	case BT_8723D_1ANT_GNT_BLOCK_RFC_BB:
 	default:
-		bit_mask = 0xc000;
-		halbtc8723d1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[15:14] */
-		bit_mask = 0x0c00;
-		halbtc8723d1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[11:10]						 */
+		val = ((val << 14) | (val << 10)) | (val_orig & 0xffff33ff);
 		break;
 	case BT_8723D_1ANT_GNT_BLOCK_RFC:
-		bit_mask = 0xc000;
-		halbtc8723d1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[15:14] */
+		val = (val << 14) | (val_orig & 0xffff3fff);
 		break;
 	case BT_8723D_1ANT_GNT_BLOCK_BB:
-		bit_mask = 0x0c00;
-		halbtc8723d1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[11:10] */
+		val = (val << 10) | (val_orig & 0xfffff3ff);
 		break;
-
 	}
 
+	halbtc8723d1ant_ltecoex_indirect_write_reg(btcoexist,
+				0x38, 0xffffffff, val);
 }
 
+
 void halbtc8723d1ant_ltecoex_set_gnt_wl(IN struct btc_coexist *btcoexist,
 			IN u8 control_block, IN boolean sw_control, IN u8 state)
 {
-	u32 val = 0, bit_mask;
+	u32 val = 0, val_orig = 0;
 
-	state = state & 0x1;
-	val = (sw_control) ? ((state << 1) | 0x1) : 0;
+	if (!sw_control)
+		val = 0x0;
+	else if (state & 0x1)
+		val = 0x3;
+	else
+		val = 0x1;
+
+	val_orig = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist,
+				0x38);
 
 	switch (control_block) {
 	case BT_8723D_1ANT_GNT_BLOCK_RFC_BB:
 	default:
-		bit_mask = 0x3000;
-		halbtc8723d1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[13:12] */
-		bit_mask = 0x0300;
-		halbtc8723d1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[9:8]						 */
+		val = ((val << 12) | (val << 8)) | (val_orig & 0xffffccff);
 		break;
 	case BT_8723D_1ANT_GNT_BLOCK_RFC:
-		bit_mask = 0x3000;
-		halbtc8723d1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[13:12] */
+		val = (val << 12) | (val_orig & 0xffffcfff);
 		break;
 	case BT_8723D_1ANT_GNT_BLOCK_BB:
-		bit_mask = 0x0300;
-		halbtc8723d1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[9:8] */
+		val = (val << 8) | (val_orig & 0xfffffcff);
 		break;
-
 	}
 
+	halbtc8723d1ant_ltecoex_indirect_write_reg(btcoexist, 0x38,
+		0xffffffff, val);
 }
 
+
 void halbtc8723d1ant_ltecoex_set_coex_table(IN struct btc_coexist *btcoexist,
 		IN u8 table_type, IN u16 table_content)
 {
@@ -1350,9 +1474,44 @@ void halbtc8723d1ant_ltecoex_set_break_table(IN struct btc_coexist *btcoexist,
 		halbtc8723d1ant_ltecoex_indirect_write_reg(btcoexist, reg_addr,
 			0xff, table_content); /* 0xa8[15:0] or 0xb4[15:0] */
 
+}
+
+void halbtc8723d1ant_set_wltoggle_coex_table(IN struct btc_coexist *btcoexist,
+		IN boolean force_exec,  IN u8 interval,
+		IN u8 val0x6c4_b0, IN u8 val0x6c4_b1, IN u8 val0x6c4_b2,
+		IN u8 val0x6c4_b3)
+{
+	static u8 pre_h2c_parameter[6] = {0};
+	u8	cur_h2c_parameter[6] = {0};
+	u8 i, match_cnt = 0;
+
+	cur_h2c_parameter[0] = 0x7;	/* op_code, 0x7= wlan toggle slot*/
 
+	cur_h2c_parameter[1] = interval;
+	cur_h2c_parameter[2] = val0x6c4_b0;
+	cur_h2c_parameter[3] = val0x6c4_b1;
+	cur_h2c_parameter[4] = val0x6c4_b2;
+	cur_h2c_parameter[5] = val0x6c4_b3;
+
+	if (!force_exec) {
+		for (i = 1; i <= 5; i++) {
+			if (cur_h2c_parameter[i] != pre_h2c_parameter[i])
+				break;
+
+			match_cnt++;
+		}
+
+		if (match_cnt == 5)
+			return;
+	}
+
+	for (i = 1; i <= 5; i++)
+		pre_h2c_parameter[i] = cur_h2c_parameter[i];
+
+	btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, cur_h2c_parameter);
 }
 
+
 void halbtc8723d1ant_set_coex_table(IN struct btc_coexist *btcoexist,
 	    IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
 {
@@ -1408,60 +1567,60 @@ void halbtc8723d1ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 		select_table = 0x3;
 	}
 
-	switch (type) {
-	case 0:
-		halbtc8723d1ant_coex_table(btcoexist, force_exec,
-					   0x55555555, 0x55555555, break_table,
-					   select_table);
-		break;
-	case 1:
-		halbtc8723d1ant_coex_table(btcoexist, force_exec,
-					   0x55555555, 0x5a5a5a5a, break_table,
-					   select_table);
-		break;
-	case 2:
-		halbtc8723d1ant_coex_table(btcoexist, force_exec,
-					   0xaa5a5a5a, 0xaa5a5a5a, break_table,
-					   select_table);
-		break;
-	case 3:
-		halbtc8723d1ant_coex_table(btcoexist, force_exec,
-					   0xaa555555, 0xaa5a5a5a, break_table,
-					   select_table);
-		break;
-	case 4:
-		halbtc8723d1ant_coex_table(btcoexist, force_exec,
-					0xa5555555, 0xaa5a5a5a, break_table,
-					select_table);
-		break;
-	case 5:
-		halbtc8723d1ant_coex_table(btcoexist, force_exec,
-					0x5a5a5a5a, 0x5a5a5a5a, break_table,
-					select_table);
-		break;
-	case 6:
-		halbtc8723d1ant_coex_table(btcoexist, force_exec,
-					   0x55555555, 0xaaaaaaaa, break_table,
-					   select_table);
-		break;
-	case 7:
-		halbtc8723d1ant_coex_table(btcoexist, force_exec,
-					   0xaaaaaaaa, 0xaaaaaaaa, break_table,
-					   select_table);
-		break;
-	case 8:
-		halbtc8723d1ant_coex_table(btcoexist, force_exec,
-					0xa5555555, 0xaaaaaaaa, break_table,
-					select_table);
-		break;
-	case 9:
-		halbtc8723d1ant_coex_table(btcoexist, force_exec,
-					0xffffffff, 0xffffffff, break_table,
-					select_table);
-		break;
-	default:
-		break;
-	}
+		switch (type) {
+		case 0:
+			halbtc8723d1ant_coex_table(btcoexist, force_exec,
+							0x55555555, 0x55555555, break_table,
+							select_table);
+			break;
+		case 1:
+			halbtc8723d1ant_coex_table(btcoexist, force_exec,
+							0x55555555, 0x5a5a5a5a, break_table,
+							select_table);
+			break;
+		case 2:
+			halbtc8723d1ant_coex_table(btcoexist, force_exec,
+							0xaa5a5a5a, 0xaa5a5a5a, break_table,
+							select_table);
+			break;
+		case 3:
+			halbtc8723d1ant_coex_table(btcoexist, force_exec,
+							0x55555555, 0x5a5a5a5a, break_table,
+							select_table);
+			break;
+		case 4:
+			halbtc8723d1ant_coex_table(btcoexist, force_exec,
+							0xa5555555, 0x5a5a5a5a, break_table,
+							select_table);
+			break;
+		case 5:
+			halbtc8723d1ant_coex_table(btcoexist, force_exec,
+							0x5a5a5a5a, 0x5a5a5a5a, break_table,
+							select_table);
+			break;
+		case 6:
+			halbtc8723d1ant_coex_table(btcoexist, force_exec,
+							0xa5555555, 0x5a5a5a5a, break_table,
+							select_table);
+			break;
+		case 7:
+			halbtc8723d1ant_coex_table(btcoexist, force_exec,
+							0xaaaaaaaa, 0xaaaaaaaa, break_table,
+							select_table);
+			break;
+		case 8:
+			halbtc8723d1ant_coex_table(btcoexist, force_exec,
+							0xa5555555, 0xaaaaaaaa, break_table,
+							select_table);
+			break;
+		case 9:
+			halbtc8723d1ant_coex_table(btcoexist, force_exec,
+							0x5a5a5a5a, 0xaaaa5aaa, break_table,
+							select_table);
+			break;
+		default:
+			break;
+		}
 }
 
 void halbtc8723d1ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
@@ -1602,6 +1761,18 @@ void halbtc8723d1ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
 	u8			h2c_parameter[5] = {0};
 	u8			real_byte1 = byte1, real_byte5 = byte5;
 	boolean			ap_enable = false;
+	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+
+	if (byte5 & BIT(2))
+		coex_sta->is_tdma_btautoslot = true;
+	else
+		coex_sta->is_tdma_btautoslot = false;
+
+	/* release bt-auto slot for auto-slot hang is detected!! */
+	if (coex_sta->is_tdma_btautoslot)
+		if ((coex_sta->is_tdma_btautoslot_hang) ||
+			(bt_link_info->slave_role))
+			byte5 = byte5 & 0xfb;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
 			   &ap_enable);
@@ -1719,172 +1890,200 @@ void halbtc8723d1ant_ps_tdma(IN struct btc_coexist *btcoexist,
 		switch (type) {
 		default:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x35, 0x03, 0x11, 0x11);
+							0x61, 0x35, 0x03, 0x11, 0x11);
 			break;
-
 		case 3:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x3a, 0x03, 0x10, 0x10);
+							0x51, 0x3a, 0x03, 0x10, 0x50);
 			break;
 		case 4:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x21, 0x03, 0x10, 0x10);
+							0x51, 0x21, 0x03, 0x10, 0x50);
 			break;
 		case 5:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x15, 0x03, 0x11, 0x11);
+							0x61, 0x15, 0x03, 0x11, 0x11);
 			break;
 		case 6:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x20, 0x03, 0x11, 0x11);
+							0x61, 0x20, 0x03, 0x11, 0x11);
 			break;
 		case 7:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x10, 0x03, 0x10, 0x14 |
-						      psTdmaByte4Modify);
+							0x51, 0x10, 0x03, 0x10,  0x54 |
+							psTdmaByte4Modify);
 			break;
 		case 8:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x10, 0x03, 0x10, 0x14 |
-						      psTdmaByte4Modify);
+							0x51, 0x10, 0x03, 0x10,  0x54 |
+							psTdmaByte4Modify);
+			break;
+		case 9:
+			halbtc8723d1ant_set_fw_pstdma(btcoexist,
+							0x55, 0x10, 0x03, 0x10,  0x54 |
+							psTdmaByte4Modify);
+			break;
+		case 10:
+			halbtc8723d1ant_set_fw_pstdma(btcoexist,
+							0x61, 0x30, 0x03, 0x11, 0x10);
+			break;
+		case 11:
+			halbtc8723d1ant_set_fw_pstdma(btcoexist,
+							0x65, 0x25, 0x03, 0x11,  0x11 |
+							psTdmaByte4Modify);
+			break;
+		case 12:
+			halbtc8723d1ant_set_fw_pstdma(btcoexist,
+							0x55, 0x30, 0x03, 0x10,  0x50 |
+							psTdmaByte4Modify);
 			break;
 		case 13:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x25, 0x03, 0x10, 0x10 |
-						      psTdmaByte4Modify);
+							0x51, 0x25, 0x03, 0x10,  0x50 |
+							psTdmaByte4Modify);
 			break;
 		case 14:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x15, 0x03, 0x10, 0x10 |
-						      psTdmaByte4Modify);
+							0x51, 0x15, 0x03, 0x10,  0x50 |
+							psTdmaByte4Modify);
 			break;
 		case 15:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x20, 0x03, 0x10, 0x10 |
-						      psTdmaByte4Modify);
+							0x51, 0x20, 0x03, 0x10,  0x50 |
+							psTdmaByte4Modify);
+			break;
+		case 16:
+			halbtc8723d1ant_set_fw_pstdma(btcoexist,
+							0x61, 0x10, 0x03, 0x11,  0x15 |
+							psTdmaByte4Modify);
 			break;
 		case 17:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x10, 0x03, 0x11, 0x14 |
-						      psTdmaByte4Modify);
+							0x61, 0x10, 0x03, 0x11, 0x14);
 			break;
 		case 18:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x30, 0x03, 0x10, 0x10 |
-						      psTdmaByte4Modify);
+							0x51, 0x30, 0x03, 0x10,  0x50 |
+							psTdmaByte4Modify);
 			break;
 		case 19:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x15, 0x03, 0x11, 0x10);
+							0x61, 0x15, 0x03, 0x11, 0x10);
 			break;
 		case 20:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x30, 0x03, 0x11, 0x10);
+							0x61, 0x30, 0x03, 0x11, 0x10);
 			break;
 		case 21:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x30, 0x03, 0x11, 0x10);
+							0x61, 0x30, 0x03, 0x11, 0x10);
 			break;
 		case 22:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x25, 0x03, 0x11, 0x10);
+							0x61, 0x25, 0x03, 0x11, 0x10);
+			break;
+		case 23:
+			halbtc8723d1ant_set_fw_pstdma(btcoexist,
+							0x61, 0x10, 0x03, 0x11, 0x10);
+			break;
+		case 27:
+			halbtc8723d1ant_set_fw_pstdma(btcoexist,
+							0x61, 0x10, 0x03, 0x11, 0x15);
 			break;
 		case 32:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x35, 0x03, 0x11, 0x11);
+							0x61, 0x35, 0x03, 0x11, 0x11);
 			break;
 		case 33:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x35, 0x03, 0x11, 0x10);
+							0x61, 0x35, 0x03, 0x11, 0x10);
 			break;
 		case 57:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x10, 0x03, 0x10,  0x10 |
-						      psTdmaByte4Modify);
+							0x51, 0x10, 0x03, 0x10,  0x50 |
+							psTdmaByte4Modify);
 			break;
 		case 58:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x10, 0x03, 0x10,  0x10 |
-						      psTdmaByte4Modify);
+							0x51, 0x10, 0x03, 0x10,  0x50 |
+							psTdmaByte4Modify);
 			break;
 		case 67:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x10, 0x03, 0x11,  0x10 |
-						      psTdmaByte4Modify);
+							0x61, 0x10, 0x03, 0x11,  0x10 |
+							psTdmaByte4Modify);
 			break;
-
 		/*     1-Ant to 2-Ant      TDMA case */
 		case 103:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0xd3, 0x3a, 0x03, 0x70, 0x10);
+							0xd3, 0x3a, 0x03, 0x70, 0x10);
 			break;
 		case 104:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0xd3, 0x21, 0x03, 0x70, 0x10);
+							0xd3, 0x21, 0x03, 0x70, 0x10);
 			break;
 		case 105:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0xe3, 0x15, 0x03, 0x71, 0x11);
+							0xe3, 0x15, 0x03, 0x71, 0x11);
 			break;
 		case 106:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0xe3, 0x20, 0x03, 0x71, 0x11);
+							0xe3, 0x20, 0x03, 0x71, 0x11);
 			break;
 		case 107:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0xd3, 0x10, 0x03, 0x70,  0x14 |
-						      psTdmaByte4Modify);
+							0xd3, 0x10, 0x03, 0x70,  0x14 |
+							psTdmaByte4Modify);
 			break;
 		case 108:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0xd3, 0x10, 0x03, 0x70,  0x14 |
-						      psTdmaByte4Modify);
+							0xd3, 0x10, 0x03, 0x70,  0x14 |
+							psTdmaByte4Modify);
 			break;
 		case 113:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0xd3, 0x25, 0x03, 0x70,  0x10 |
-						      psTdmaByte4Modify);
+							0xd3, 0x25, 0x03, 0x70,  0x10 |
+							psTdmaByte4Modify);
 			break;
 		case 114:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0xd3, 0x15, 0x03, 0x70,  0x10 |
-						      psTdmaByte4Modify);
+							0xd3, 0x15, 0x03, 0x70,  0x10 |
+							psTdmaByte4Modify);
 			break;
 		case 115:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0xd3, 0x20, 0x03, 0x70,  0x10 |
-						      psTdmaByte4Modify);
+							0xd3, 0x20, 0x03, 0x70,  0x10 |
+							psTdmaByte4Modify);
 			break;
 		case 117:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0xe3, 0x10, 0x03, 0x71,  0x14 |
-						      psTdmaByte4Modify);
-			break;;
+							0xe3, 0x10, 0x03, 0x71,  0x14 |
+							psTdmaByte4Modify);
+			break;
 		case 119:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0xe3, 0x15, 0x03, 0x71, 0x10);
+							0xe3, 0x15, 0x03, 0x71, 0x10);
 			break;
 		case 120:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0xe3, 0x30, 0x03, 0x71, 0x10);
+							0xe3, 0x30, 0x03, 0x71, 0x10);
 			break;
 		case 121:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0xe3, 0x30, 0x03, 0x71, 0x10);
+							0xe3, 0x30, 0x03, 0x71, 0x10);
 			break;
 		case 122:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0xe3, 0x25, 0x03, 0x71, 0x10);
+							0xe3, 0x25, 0x03, 0x71, 0x10);
 			break;
 		case 132:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0xe3, 0x35, 0x03, 0x71, 0x11);
+							0xe3, 0x35, 0x03, 0x71, 0x11);
 			break;
 		case 133:
 			halbtc8723d1ant_set_fw_pstdma(btcoexist,
-					      0xe3, 0x35, 0x03, 0x71, 0x10);
+							0xe3, 0x35, 0x03, 0x71, 0x10);
 			break;
-
 		}
 	} else {
 
@@ -1938,23 +2137,16 @@ void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 
 #endif
 
-	coex_dm->cur_ant_pos_type = ant_pos_type;
-
-	if (!force_exec) {
-		if (coex_dm->cur_ant_pos_type == coex_dm->pre_ant_pos_type) {
+	u32tmp1 = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist,
+				0x38);
 
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], ********** Skip Antenna Path Setup because no change!!**********\n");
-			BTC_TRACE(trace_buf);
-			return;
-		}
+	/* To avoid indirect access fail	*/
+	if (((u32tmp1 & 0xf000) >> 12) != ((u32tmp1 & 0x0f00) >> 8)) {
+		force_exec = true;
+		coex_sta->gnt_error_cnt++;
 	}
 
-	coex_dm->pre_ant_pos_type = coex_dm->cur_ant_pos_type;
-
-
 #if BT_8723D_1ANT_COEX_DBG
-	u32tmp1 = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
 	u32tmp2 = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
 	u16tmp0 = btcoexist->btc_read_2byte(btcoexist, 0xaa);
 	u16tmp1 = btcoexist->btc_read_2byte(btcoexist, 0x948);
@@ -1972,6 +2164,19 @@ void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 	BTC_TRACE(trace_buf);
 #endif
 
+	coex_dm->cur_ant_pos_type = ant_pos_type;
+
+	if (!force_exec) {
+		if (coex_dm->cur_ant_pos_type == coex_dm->pre_ant_pos_type) {
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], ********** Skip Antenna Path Setup because no change!!**********\n");
+			BTC_TRACE(trace_buf);
+			return;
+		}
+	}
+
+	coex_dm->pre_ant_pos_type = coex_dm->cur_ant_pos_type;
+
 
 	switch (phase) {
 	case BT_8723D_1ANT_PHASE_COEX_POWERON:
@@ -2302,9 +2507,6 @@ boolean halbtc8723d1ant_is_common_action(IN struct btc_coexist *btcoexist)
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n");
 		BTC_TRACE(trace_buf);
-
-		/* halbtc8723d1ant_sw_mechanism(btcoexist, false); */
-
 		common = true;
 	} else if (wifi_connected &&
 		   (BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
@@ -2312,9 +2514,6 @@ boolean halbtc8723d1ant_is_common_action(IN struct btc_coexist *btcoexist)
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], Wifi connected + BT non connected-idle!!\n");
 		BTC_TRACE(trace_buf);
-
-		/* halbtc8723d1ant_sw_mechanism(btcoexist, false); */
-
 		common = true;
 	} else if (!wifi_connected &&
 		   (BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE ==
@@ -2322,9 +2521,6 @@ boolean halbtc8723d1ant_is_common_action(IN struct btc_coexist *btcoexist)
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], Wifi non connected-idle + BT connected-idle!!\n");
 		BTC_TRACE(trace_buf);
-
-		/* halbtc8723d1ant_sw_mechanism(btcoexist, false); */
-
 		common = true;
 	} else if (wifi_connected &&
 		   (BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE ==
@@ -2332,9 +2528,6 @@ boolean halbtc8723d1ant_is_common_action(IN struct btc_coexist *btcoexist)
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], Wifi connected + BT connected-idle!!\n");
 		BTC_TRACE(trace_buf);
-
-		/* halbtc8723d1ant_sw_mechanism(btcoexist, false); */
-
 		common = true;
 	} else if (!wifi_connected &&
 		   (BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE !=
@@ -2342,9 +2535,6 @@ boolean halbtc8723d1ant_is_common_action(IN struct btc_coexist *btcoexist)
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], Wifi non connected-idle + BT Busy!!\n");
 		BTC_TRACE(trace_buf);
-
-		/* halbtc8723d1ant_sw_mechanism(btcoexist, false); */
-
 		common = true;
 	} else {
 		if (wifi_busy) {
@@ -2366,83 +2556,179 @@ boolean halbtc8723d1ant_is_common_action(IN struct btc_coexist *btcoexist)
 
 /* *********************************************
  *
- *	Software Coex Mechanism start
+ *	Non-Software Coex Mechanism start
  *
  * ********************************************* */
-
-/* SCO only or SCO+PAN(HS) */
-
-/*
-void halbtc8723d1ant_action_sco(IN struct btc_coexist* btcoexist)
+void halbtc8723d1ant_action_bt_whql_test(IN struct btc_coexist *btcoexist)
 {
-	halbtc8723d1ant_sw_mechanism(btcoexist, true);
+	halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
+	halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
+				     BT_8723D_1ANT_PHASE_2G_RUNTIME);
+	halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 }
 
-
-void halbtc8723d1ant_action_hid(IN struct btc_coexist* btcoexist)
+void halbtc8723d1ant_action_bt_hs(IN struct btc_coexist *btcoexist)
 {
-	halbtc8723d1ant_sw_mechanism(btcoexist, true);
+	halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
+	halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
 }
 
-
-void halbtc8723d1ant_action_a2dp(IN struct btc_coexist* btcoexist)
+void halbtc8723d1ant_action_bt_relink(IN struct btc_coexist *btcoexist)
 {
-	halbtc8723d1ant_sw_mechanism(btcoexist, false);
+	halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
+	halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+	coex_sta->bt_relink_downcount = 2;
 }
 
-void halbtc8723d1ant_action_a2dp_pan_hs(IN struct btc_coexist* btcoexist)
+void halbtc8723d1ant_action_bt_idle(IN struct btc_coexist *btcoexist)
 {
-	halbtc8723d1ant_sw_mechanism(btcoexist, false);
-}
+	boolean wifi_busy = false;
 
-void halbtc8723d1ant_action_pan_edr(IN struct btc_coexist* btcoexist)
-{
-	halbtc8723d1ant_sw_mechanism(btcoexist, false);
-}
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
+	if (!wifi_busy) {
+		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6);
+		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
+	} else {
+	/* if wl busy */
+	if (BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
+		coex_dm->bt_status) {
+		halbtc8723d1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 8);
 
-void halbtc8723d1ant_action_pan_hs(IN struct btc_coexist* btcoexist)
-{
-	halbtc8723d1ant_sw_mechanism(btcoexist, false);
+		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33);
+	} else {
+		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
+		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
+	}
 }
 
-
-void halbtc8723d1ant_action_pan_edr_a2dp(IN struct btc_coexist* btcoexist)
-{
-	halbtc8723d1ant_sw_mechanism(btcoexist, false);
 }
 
-void halbtc8723d1ant_action_pan_edr_hid(IN struct btc_coexist* btcoexist)
+void halbtc8723d1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
 {
-	halbtc8723d1ant_sw_mechanism(btcoexist, true);
-}
+	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+	boolean wifi_connected = false, wifi_busy = false, bt_busy = false;
+	boolean wifi_scan = false, wifi_link = false, wifi_roam = false;
 
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
+			   &wifi_connected);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+	btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
 
-void halbtc8723d1ant_action_hid_a2dp_pan_edr(IN struct btc_coexist* btcoexist)
-{
-	halbtc8723d1ant_sw_mechanism(btcoexist, true);
-}
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam);
 
-void halbtc8723d1ant_action_hid_a2dp(IN struct btc_coexist* btcoexist)
-{
-	halbtc8723d1ant_sw_mechanism(btcoexist, true);
+
+	if ((coex_sta->bt_create_connection) && ((wifi_link) || (wifi_roam)
+		|| (wifi_scan) || (wifi_busy) || (coex_sta->wifi_is_high_pri_task))) {
+
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], Wifi link/roam/Scan/busy/hi-pri-task + BT Inq/Page!!\n");
+		BTC_TRACE(trace_buf);
+
+		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+
+		if ((bt_link_info->a2dp_exist) && (!bt_link_info->pan_exist))
+			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17);
+		else
+			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33);
+		} else if ((!wifi_connected) && (!wifi_scan)) {
+
+		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
+
+		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+	} else if (bt_link_info->pan_exist) {
+
+		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
+
+		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+
+	} else if (bt_link_info->a2dp_exist) {
+
+		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 16);
+
+		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+	} else {
+
+		if ((wifi_link) || (wifi_roam) || (wifi_scan) || (wifi_busy)
+			|| (coex_sta->wifi_is_high_pri_task))
+			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 21);
+		else
+			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 23);
+
+		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+	}
 }
 
-*/
 
-/* *********************************************
- *
- *	Non-Software Coex Mechanism start
- *
- * ********************************************* */
-void halbtc8723d1ant_action_bt_whck_test(IN struct btc_coexist *btcoexist)
+void halbtc8723d1ant_action_bt_sco_hid_only_busy(IN struct btc_coexist
+		*btcoexist)
 {
-	halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-	halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-				     BT_8723D_1ANT_PHASE_2G_RUNTIME);
-	halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+	boolean	wifi_connected = false, wifi_busy = false;
+	u32  wifi_bw = 1;
+
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
+			   &wifi_connected);
+
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
+			   &wifi_bw);
+
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+
+
+	if (bt_link_info->sco_exist) {
+			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+						true, 5);
+			halbtc8723d1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 5);
+		} else if (coex_sta->hid_busy_num >= 2) {
+		 /*for 4/18 hid */
+		 /* if 11bg mode */
+		if (wifi_bw == 0) {
+
+		halbtc8723d1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 6);
+		halbtc8723d1ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x1, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
+		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							11);
+		} else {
+
+		if (wifi_busy) {
+
+		     halbtc8723d1ant_coex_table_with_type(btcoexist,
+								NORMAL_EXEC, 6);
+		     halbtc8723d1ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x2, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
+		     halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							11);
+		  } else {
+
+		     halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+						true, 6);
+			 halbtc8723d1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 3);
+
+		  }
+		}
+	} else {
+			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+						true, 6);
+			halbtc8723d1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 3);
+	}
 }
 
+
 void halbtc8723d1ant_action_wifi_only(IN struct btc_coexist *btcoexist)
 {
 	halbtc8723d1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
@@ -2465,169 +2751,109 @@ void halbtc8723d1ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
 		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
 }
 
-void halbtc8723d1ant_action_hs(IN struct btc_coexist *btcoexist)
-{
-	halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
-	halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
-}
-
-void halbtc8723d1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
+void halbtc8723d1ant_action_wifi_linkscan_process(IN struct btc_coexist
+		*btcoexist)
 {
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean			wifi_connected = false, wifi_busy = false,
-				bt_busy = false;
-	boolean	wifi_scan = false, wifi_link = false, wifi_roam = false;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
-			   &wifi_connected);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
-	btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam);
 
-	if ((wifi_link) || (wifi_roam) || (coex_sta->wifi_is_high_pri_task)) {
-
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33);
-
-		if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist))
-			halbtc8723d1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 1);
-		else
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6);
-
-	} else if (((wifi_scan) || (wifi_busy)) &&
-		   (coex_sta->bt_create_connection)) {
+	if (bt_link_info->pan_exist) {
 
 		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
 
-		if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist))
-			halbtc8723d1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 1);
-		else
-			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6);
-
-	} else if ((!wifi_connected) && (!wifi_scan)) {
-
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-	} else if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist)) {
-
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6);
-		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
-
-	} else if ((bt_link_info->a2dp_exist) && (bt_link_info->pan_exist)) {
-
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
 		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 
 	} else if (bt_link_info->a2dp_exist) {
 
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
-
-		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
-	} else if (wifi_scan) {
-
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
+		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 27);
 
 		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+	} else {
 
-	} else if (wifi_busy) {
 		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 21);
 
 		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
-	} else {
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 19);
-
-		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
-	}
-}
-
-void halbtc8723d1ant_action_bt_sco_hid_only_busy(IN struct btc_coexist
-		*btcoexist, IN u8 wifi_status)
-{
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean	wifi_connected = false;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
-			   &wifi_connected);
-
-	/* tdma and coex table */
-
-	if (bt_link_info->sco_exist) {
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
-		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
-	} else { /* HID */
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6);
-		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
 	}
 }
 
 void halbtc8723d1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist
-		*btcoexist, IN u8 wifi_status)
+		*btcoexist)
 {
-
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 	boolean			wifi_busy = false, wifi_turbo = false;
+	u32 wifi_bw = 1;
 
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, &coex_sta->scan_ap_num);
+
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		    "############# [BTCoex],  scan_ap_num = %d, wl_noisy_level = %d\n",
+		    coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
+	BTC_TRACE(trace_buf);
 
 #if 1
-	if ((wifi_busy) && (coex_sta->scan_ap_num <= 4))
+	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
 		wifi_turbo = true;
 #endif
 
-	if (bt_link_info->hid_only) { /* HID */
-		halbtc8723d1ant_action_bt_sco_hid_only_busy(btcoexist,
-				wifi_status);
-		return;
+	if ((coex_sta->bt_relink_downcount != 0)
+			&& (!bt_link_info->pan_exist) && (wifi_busy)) {
+
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"############# [BTCoex],  BT Re-Link + A2DP + WL busy\n");
+		BTC_TRACE(trace_buf);
+
+		/*halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);*/
+		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
+		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+
 	} else if (bt_link_info->a2dp_only) { /* A2DP		 */
-		if (BT_8723D_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifi_status) {
+		if (!wifi_busy) {
+			/*halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+						32);*/
 			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						32);
+						27);
 			halbtc8723d1ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 4);
 		} else {
 
-			btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
-					   &coex_sta->scan_ap_num);
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"############# [BTCoex],  scan_ap_num = %d\n",
-				    coex_sta->scan_ap_num);
-			BTC_TRACE(trace_buf);
-
-			if (coex_sta->scan_ap_num >=
-			    BT_8723D_1ANT_WIFI_NOISY_THRESH)  {
-
-				if (coex_sta->is_setupLink)
-					halbtc8723d1ant_ps_tdma(btcoexist,
-							NORMAL_EXEC, true,
-								67);
-				else
-					halbtc8723d1ant_ps_tdma(btcoexist,
-							NORMAL_EXEC, true,
-								17);
-			}	else {
-				if (coex_sta->is_setupLink)
-					halbtc8723d1ant_ps_tdma(btcoexist,
-							NORMAL_EXEC, true,
-								57);
-				else
-					halbtc8723d1ant_ps_tdma(btcoexist,
-							NORMAL_EXEC, true,
-								7);
-			}
+			if (coex_sta->wl_noisy_level == 2)
+				halbtc8723d1ant_ps_tdma(btcoexist,
+							NORMAL_EXEC, true, 17);
+			else
+				halbtc8723d1ant_ps_tdma(btcoexist,
+							NORMAL_EXEC, true, 7);
 
-			halbtc8723d1ant_coex_table_with_type(btcoexist,
+			if (wifi_turbo)
+				halbtc8723d1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 8);
+			else
+				halbtc8723d1ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 4);
 		}
-	} else if (((bt_link_info->a2dp_exist) && (bt_link_info->pan_exist)) ||
+	} else if (((bt_link_info->a2dp_exist) &&
+		    (bt_link_info->pan_exist)) ||
 		   (bt_link_info->hid_exist && bt_link_info->a2dp_exist &&
 		bt_link_info->pan_exist)) { /* A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) */
 
-		if (wifi_busy)	{
+		if ((bt_link_info->hid_exist) && (coex_sta->hid_busy_num >= 2)) {
+			halbtc8723d1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 6);
+			if (wifi_bw == 0) /* 11bg mode  */
+				halbtc8723d1ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x1, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
+			else
+				halbtc8723d1ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x2, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
+			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							12);
+		} else if (wifi_busy)	{
 			if (((coex_sta->a2dp_bit_pool > 40) &&
 			     (coex_sta->a2dp_bit_pool < 255)) ||
 			    (!coex_sta->is_A2DP_3M))
@@ -2644,40 +2870,80 @@ void halbtc8723d1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist
 						14);
 
 		if (bt_link_info->hid_exist)
-			halbtc8723d1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 1);
+			halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
 		else if (wifi_turbo)
 			halbtc8723d1ant_coex_table_with_type(btcoexist,
-								NORMAL_EXEC, 8);
+							     NORMAL_EXEC, 8);
 		else
 			halbtc8723d1ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 4);
 	} else if (bt_link_info->hid_exist &&
 		   bt_link_info->a2dp_exist) { /* HID+A2DP */
 
-		if (coex_sta->is_setupLink)
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						58);
-		else
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						8);
+			if ((wifi_busy) && (coex_sta->hid_busy_num >= 2)) { /*for 4/18 hid */
+				halbtc8723d1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 6);
+				if (wifi_bw == 0) /* 11bg mode  */
+					halbtc8723d1ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x1, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
+				else
+					halbtc8723d1ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x2, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
+				halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							9);
+			} else {
+				halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							8);
+				halbtc8723d1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 1);
+			}
 
-		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
-	} else if ((bt_link_info->pan_only) || (bt_link_info->hid_exist &&
-		bt_link_info->pan_exist)) { /* PAN(OPP,FTP), HID+PAN(OPP,FTP)			 */
-		if (BT_8723D_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifi_status)
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						4);
-		else
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						3);
+	} else if ((bt_link_info->pan_only)
+	   || (bt_link_info->hid_exist && bt_link_info->pan_exist)) {
+	   /* PAN(OPP,FTP), HID+PAN(OPP,FTP) */
 
-		if (bt_link_info->hid_exist)
-			halbtc8723d1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 1);
-		else
-			halbtc8723d1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
+		if ((bt_link_info->hid_exist) && (bt_link_info->pan_exist) &&
+			(coex_sta->hid_busy_num >= 2)) {
+
+				halbtc8723d1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 6);
+				if (wifi_bw == 0) /* 11bg mode  */
+					halbtc8723d1ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x1, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
+				else
+					halbtc8723d1ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x2, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
+				halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							12);
+		} else {
+			if (!wifi_busy)
+				halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							4);
+			else
+				halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							3);
+
+			if (bt_link_info->hid_exist)
+				halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+			else if (wifi_turbo)
+				halbtc8723d1ant_coex_table_with_type(btcoexist,
+								     NORMAL_EXEC, 8);
+			else
+				halbtc8723d1ant_coex_table_with_type(btcoexist,
+								     NORMAL_EXEC, 4);
+		}
 	} else {
 		/* BT no-profile busy (0x9) */
 		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33);
@@ -2694,365 +2960,37 @@ void halbtc8723d1ant_action_wifi_not_connected(IN struct btc_coexist *btcoexist)
 	halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 }
 
-void halbtc8723d1ant_action_wifi_not_connected_scan(IN struct btc_coexist
-		*btcoexist)
-{
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean wifi_connected = false, bt_hs_on = false;
-	u32	wifi_link_status = 0;
-	u32	num_of_wifi_link = 0;
-	boolean	bt_ctrl_agg_buf_size = false;
-	u8	agg_buf_size = 5;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
-	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
-			   &wifi_link_status);
-
-	num_of_wifi_link = wifi_link_status >> 16;
-
-	if (num_of_wifi_link >= 2) {
-		halbtc8723d1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
-		halbtc8723d1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
-					   bt_ctrl_agg_buf_size, agg_buf_size);
-
-		if (coex_sta->c2h_bt_inquiry_page) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"############# [BTCoex],  BT Is Inquirying\n");
-			BTC_TRACE(trace_buf);
-			halbtc8723d1ant_action_bt_inquiry(btcoexist);
-		} else
-			halbtc8723d1ant_action_wifi_multi_port(btcoexist);
-		return;
-	}
-
-	if (coex_sta->c2h_bt_inquiry_page) {
-		halbtc8723d1ant_action_bt_inquiry(btcoexist);
-		return;
-	} else if (bt_hs_on) {
-		halbtc8723d1ant_action_hs(btcoexist);
-		return;
-	}
-
-	/* tdma and coex table */
-	if (BT_8723D_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
-		if (bt_link_info->a2dp_exist) {
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						32);
-			halbtc8723d1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-		} else if (bt_link_info->a2dp_exist &&
-			   bt_link_info->pan_exist) {
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						22);
-			halbtc8723d1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-		} else {
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						20);
-			halbtc8723d1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-		}
-	} else if ((BT_8723D_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
-		   (BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY ==
-		    coex_dm->bt_status)) {
-		halbtc8723d1ant_action_bt_sco_hid_only_busy(btcoexist,
-				BT_8723D_1ANT_WIFI_STATUS_CONNECTED_SCAN);
-	} else {
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
-	}
-}
-
-void halbtc8723d1ant_action_wifi_connected_scan(IN struct btc_coexist
-		*btcoexist)
-{
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean wifi_connected = false, bt_hs_on = false;
-	u32	wifi_link_status = 0;
-	u32	num_of_wifi_link = 0;
-	boolean	bt_ctrl_agg_buf_size = false;
-	u8	agg_buf_size = 5;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
-	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
-			   &wifi_link_status);
-
-	num_of_wifi_link = wifi_link_status >> 16;
-
-	if (num_of_wifi_link >= 2) {
-		halbtc8723d1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
-		halbtc8723d1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
-					   bt_ctrl_agg_buf_size, agg_buf_size);
-
-		if (coex_sta->c2h_bt_inquiry_page) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"############# [BTCoex],  BT Is Inquirying\n");
-			BTC_TRACE(trace_buf);
-			halbtc8723d1ant_action_bt_inquiry(btcoexist);
-		} else
-			halbtc8723d1ant_action_wifi_multi_port(btcoexist);
-		return;
-	}
-
-	if (coex_sta->c2h_bt_inquiry_page) {
-		halbtc8723d1ant_action_bt_inquiry(btcoexist);
-		return;
-	} else if (bt_hs_on) {
-		halbtc8723d1ant_action_hs(btcoexist);
-		return;
-	}
-
-
-	/* tdma and coex table */
-	if (BT_8723D_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
-		if (bt_link_info->a2dp_exist) {
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						32);
-			halbtc8723d1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-		} else if (bt_link_info->a2dp_exist &&
-			   bt_link_info->pan_exist) {
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						22);
-			halbtc8723d1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-		} else {
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						20);
-			halbtc8723d1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-		}
-	} else if ((BT_8723D_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
-		   (BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY ==
-		    coex_dm->bt_status)) {
-		halbtc8723d1ant_action_bt_sco_hid_only_busy(btcoexist,
-				BT_8723D_1ANT_WIFI_STATUS_CONNECTED_SCAN);
-	} else {
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
-	}
-}
-
-void halbtc8723d1ant_action_wifi_not_connected_asso_auth(
-	IN struct btc_coexist *btcoexist)
-{
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean wifi_connected = false, bt_hs_on = false;
-	u32	wifi_link_status = 0;
-	u32	num_of_wifi_link = 0;
-	boolean	bt_ctrl_agg_buf_size = false;
-	u8	agg_buf_size = 5;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
-	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
-			   &wifi_link_status);
-
-	num_of_wifi_link = wifi_link_status >> 16;
-
-	if (num_of_wifi_link >= 2) {
-		halbtc8723d1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
-		halbtc8723d1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
-					   bt_ctrl_agg_buf_size, agg_buf_size);
-
-		if (coex_sta->c2h_bt_inquiry_page) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"############# [BTCoex],  BT Is Inquirying\n");
-			BTC_TRACE(trace_buf);
-			halbtc8723d1ant_action_bt_inquiry(btcoexist);
-		} else
-			halbtc8723d1ant_action_wifi_multi_port(btcoexist);
-		return;
-	}
-
-	if (coex_sta->c2h_bt_inquiry_page) {
-		halbtc8723d1ant_action_bt_inquiry(btcoexist);
-		return;
-	} else if (bt_hs_on) {
-		halbtc8723d1ant_action_hs(btcoexist);
-		return;
-	}
-
-	/* tdma and coex table */
-	if ((bt_link_info->sco_exist)  || (bt_link_info->hid_exist) ||
-	    (bt_link_info->a2dp_exist)) {
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
-		halbtc8723d1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 4);
-	} else if (bt_link_info->pan_exist) {
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
-		halbtc8723d1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 4);
-	} else {
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-		halbtc8723d1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 2);
-	}
-}
-
-void halbtc8723d1ant_action_wifi_connected_specific_packet(
-	IN struct btc_coexist *btcoexist)
-{
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean wifi_connected = false, bt_hs_on = false;
-	u32	wifi_link_status = 0;
-	u32	num_of_wifi_link = 0;
-	boolean	bt_ctrl_agg_buf_size = false;
-	u8	agg_buf_size = 5;
-	boolean wifi_busy = false;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
-	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
-			   &wifi_link_status);
-
-	num_of_wifi_link = wifi_link_status >> 16;
-
-	if (num_of_wifi_link >= 2) {
-		halbtc8723d1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
-		halbtc8723d1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
-					   bt_ctrl_agg_buf_size, agg_buf_size);
-
-		if (coex_sta->c2h_bt_inquiry_page) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"############# [BTCoex],  BT Is Inquirying\n");
-			BTC_TRACE(trace_buf);
-			halbtc8723d1ant_action_bt_inquiry(btcoexist);
-		} else
-			halbtc8723d1ant_action_wifi_multi_port(btcoexist);
-		return;
-	}
-
-	if (coex_sta->c2h_bt_inquiry_page) {
-		halbtc8723d1ant_action_bt_inquiry(btcoexist);
-		return;
-	} else if (bt_hs_on) {
-		halbtc8723d1ant_action_hs(btcoexist);
-		return;
-	}
-
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
-
-	/* no specific packet process for both WiFi and BT very busy */
-	if ((wifi_busy) && ((bt_link_info->pan_exist) ||
-			    (coex_sta->num_of_profile >= 2)))
-		return;
-
-	/* tdma and coex table */
-	if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist)) {
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
-		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
-	} else if (bt_link_info->a2dp_exist) {
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
-		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
-	} else if (bt_link_info->pan_exist) {
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
-		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
-	} else {
-		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-		halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
-	}
-}
 
 void halbtc8723d1ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
 {
-	boolean	wifi_busy = false;
-	boolean		scan = false, link = false, roam = false;
-	boolean		under_4way = false;
-	struct  btc_board_info *board_info = &btcoexist->board_info;
+	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+	boolean wifi_busy = false;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "[BTCoex], CoexForWifiConnect()===>\n");
+			"[BTCoex], CoexForWifiConnect()===>\n");
 	BTC_TRACE(trace_buf);
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
-			   &under_4way);
-	if (under_4way) {
-		halbtc8723d1ant_action_wifi_connected_specific_packet(
-			btcoexist);
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], CoexForWifiConnect(), return for wifi is under 4way<===\n");
-		BTC_TRACE(trace_buf);
-		return;
-	}
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
-	if (scan || link || roam) {
-		if (scan)
-			halbtc8723d1ant_action_wifi_connected_scan(btcoexist);
-		else
-			halbtc8723d1ant_action_wifi_connected_specific_packet(
-				btcoexist);
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n");
-		BTC_TRACE(trace_buf);
-		return;
-	}
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+	halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
+					 NORMAL_EXEC,
+					 BT_8723D_1ANT_PHASE_2G_RUNTIME);
 
+	if (BT_8723D_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
 
-	/* tdma and coex table */
-	if (!wifi_busy) {
-		if (BT_8723D_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
-			halbtc8723d1ant_action_wifi_connected_bt_acl_busy(
-				btcoexist,
-				BT_8723D_1ANT_WIFI_STATUS_CONNECTED_IDLE);
-		} else if ((BT_8723D_1ANT_BT_STATUS_SCO_BUSY ==
-			    coex_dm->bt_status) ||
-			   (BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY ==
-			    coex_dm->bt_status)) {
-			halbtc8723d1ant_action_bt_sco_hid_only_busy(btcoexist,
-				BT_8723D_1ANT_WIFI_STATUS_CONNECTED_IDLE);
-		} else {
+		if (bt_link_info->hid_only)  /* HID only */
+		   halbtc8723d1ant_action_bt_sco_hid_only_busy(btcoexist);
+		else
+			halbtc8723d1ant_action_wifi_connected_bt_acl_busy(btcoexist);
 
-			if ((board_info->btdm_ant_det_finish) &&
-			    (board_info->btdm_ant_num_by_ant_det == 2) &&
-			    (BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE)) {
-				halbtc8723d1ant_ps_tdma(btcoexist,
-							NORMAL_EXEC, false, 8);
-				halbtc8723d1ant_coex_table_with_type(
-					btcoexist,
-					NORMAL_EXEC, 8);
-			} else {
-				halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							false, 8);
-				halbtc8723d1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 2);
-			}
-		}
-	} else {
-		if (BT_8723D_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
-			halbtc8723d1ant_action_wifi_connected_bt_acl_busy(
-				btcoexist,
-				BT_8723D_1ANT_WIFI_STATUS_CONNECTED_BUSY);
-		} else if ((BT_8723D_1ANT_BT_STATUS_SCO_BUSY ==
-			    coex_dm->bt_status) ||
+	} else if ((BT_8723D_1ANT_BT_STATUS_SCO_BUSY ==
+				coex_dm->bt_status) ||
 			   (BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY ==
-			    coex_dm->bt_status)) {
-			halbtc8723d1ant_action_bt_sco_hid_only_busy(btcoexist,
-				BT_8723D_1ANT_WIFI_STATUS_CONNECTED_BUSY);
-		} else {
-
-			if ((board_info->btdm_ant_det_finish) &&
-			    (board_info->btdm_ant_num_by_ant_det == 2) &&
-			    (BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE)) {
-				halbtc8723d1ant_ps_tdma(btcoexist,
-							NORMAL_EXEC, false, 8);
-				halbtc8723d1ant_coex_table_with_type(
-					btcoexist,
-					NORMAL_EXEC, 9);
-			} else {
-				halbtc8723d1ant_ps_tdma(btcoexist,
-							NORMAL_EXEC, true,
-							32);
-				halbtc8723d1ant_coex_table_with_type(
-					btcoexist,
-					NORMAL_EXEC,
-					4);
-			}
-		}
-	}
+				coex_dm->bt_status)) {
+			halbtc8723d1ant_action_bt_sco_hid_only_busy(btcoexist);
+	} else
+			halbtc8723d1ant_action_bt_idle(btcoexist);
 }
 
+
 void halbtc8723d1ant_run_sw_coexist_mechanism(IN struct btc_coexist *btcoexist)
 {
 	u8				algorithm = 0;
@@ -3068,67 +3006,56 @@ void halbtc8723d1ant_run_sw_coexist_mechanism(IN struct btc_coexist *btcoexist)
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = SCO.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8723d1ant_action_sco(btcoexist); */
 			break;
 		case BT_8723D_1ANT_COEX_ALGO_HID:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = HID.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8723d1ant_action_hid(btcoexist); */
 			break;
 		case BT_8723D_1ANT_COEX_ALGO_A2DP:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = A2DP.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8723d1ant_action_a2dp(btcoexist); */
 			break;
 		case BT_8723D_1ANT_COEX_ALGO_A2DP_PANHS:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], Action algorithm = A2DP+PAN(HS).\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8723d1ant_action_a2dp_pan_hs(btcoexist); */
 			break;
 		case BT_8723D_1ANT_COEX_ALGO_PANEDR:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = PAN(EDR).\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8723d1ant_action_pan_edr(btcoexist); */
 			break;
 		case BT_8723D_1ANT_COEX_ALGO_PANHS:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = HS mode.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8723d1ant_action_pan_hs(btcoexist); */
 			break;
 		case BT_8723D_1ANT_COEX_ALGO_PANEDR_A2DP:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = PAN+A2DP.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8723d1ant_action_pan_edr_a2dp(btcoexist); */
 			break;
 		case BT_8723D_1ANT_COEX_ALGO_PANEDR_HID:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], Action algorithm = PAN(EDR)+HID.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8723d1ant_action_pan_edr_hid(btcoexist); */
 			break;
 		case BT_8723D_1ANT_COEX_ALGO_HID_A2DP_PANEDR:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], Action algorithm = HID+A2DP+PAN.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8723d1ant_action_hid_a2dp_pan_edr(btcoexist); */
 			break;
 		case BT_8723D_1ANT_COEX_ALGO_HID_A2DP:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = HID+A2DP.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8723d1ant_action_hid_a2dp(btcoexist); */
 			break;
 		default:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], Action algorithm = coexist All Off!!\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8723d1ant_coex_all_off(btcoexist); */
 			break;
 		}
 		coex_dm->pre_algorithm = coex_dm->cur_algorithm;
@@ -3138,18 +3065,25 @@ void halbtc8723d1ant_run_sw_coexist_mechanism(IN struct btc_coexist *btcoexist)
 
 void halbtc8723d1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 {
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean	wifi_connected = false, bt_hs_on = false;
-	boolean	increase_scan_dev_num = false;
-	boolean	bt_ctrl_agg_buf_size = false;
-	boolean	miracast_plus_bt = false;
+	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+	boolean wifi_connected = false, bt_hs_on = false;
+	boolean increase_scan_dev_num = false;
+	boolean bt_ctrl_agg_buf_size = false;
+	boolean miracast_plus_bt = false, wifi_under_5g = false;
 	u8	agg_buf_size = 5;
-	u32	wifi_link_status = 0;
-	u32	num_of_wifi_link = 0, wifi_bw;
+	u32 wifi_link_status = 0;
+	u32 num_of_wifi_link = 0, wifi_bw;
 	u8	iot_peer = BTC_IOT_PEER_UNKNOWN;
+	boolean scan = false, link = false, roam = false, under_4way = false;
+
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
+			   &under_4way);
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "[BTCoex], RunCoexistMechanism()===>\n");
+			"[BTCoex], RunCoexistMechanism()===>\n");
 	BTC_TRACE(trace_buf);
 
 	if (btcoexist->manual_control) {
@@ -3168,7 +3102,7 @@ void halbtc8723d1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 
 	if (coex_sta->under_ips) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], wifi is under IPS !!!\n");
+				"[BTCoex], wifi is under IPS !!!\n");
 		BTC_TRACE(trace_buf);
 		return;
 	}
@@ -3189,155 +3123,163 @@ void halbtc8723d1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 
 	if (coex_sta->bt_whck_test) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], BT is under WHCK TEST!!!\n");
+				"[BTCoex], BT is under WHCK TEST!!!\n");
 		BTC_TRACE(trace_buf);
-		halbtc8723d1ant_action_bt_whck_test(btcoexist);
+		halbtc8723d1ant_action_bt_whql_test(btcoexist);
 		return;
 	}
 
 	if (coex_sta->bt_disabled) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], BT is disabled !!!\n");
+				"[BTCoex], BT is disabled !!!\n");
 		halbtc8723d1ant_action_wifi_only(btcoexist);
 		return;
 	}
 
+	if (coex_sta->c2h_bt_inquiry_page) {
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					"[BTCoex], BT is under inquiry/page scan !!\n");
+			BTC_TRACE(trace_buf);
+			halbtc8723d1ant_action_bt_inquiry(btcoexist);
+			return;
+	}
+
+	if (coex_sta->is_setupLink) {
+		 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		 "[BTCoex], BT is re-link !!!\n");
+		 halbtc8723d1ant_action_bt_relink(btcoexist);
+		 return;
+	}
+
 	if ((BT_8723D_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
-	    (BT_8723D_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
-	    (BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status))
+		(BT_8723D_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
+		(BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status))
 		increase_scan_dev_num = true;
 
 	btcoexist->btc_set(btcoexist, BTC_SET_BL_INC_SCAN_DEV_NUM,
 			   &increase_scan_dev_num);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
-			   &wifi_connected);
 
 	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
 			   &wifi_link_status);
+
 	num_of_wifi_link = wifi_link_status >> 16;
 
 	if ((num_of_wifi_link >= 2) ||
-	    (wifi_link_status & WIFI_P2P_GO_CONNECTED)) {
+		(wifi_link_status & WIFI_P2P_GO_CONNECTED)) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"############# [BTCoex],  Multi-Port num_of_wifi_link = %d, wifi_link_status = 0x%x\n",
-			    num_of_wifi_link, wifi_link_status);
+				num_of_wifi_link, wifi_link_status);
 		BTC_TRACE(trace_buf);
 
-		if (bt_link_info->bt_link_exist) {
-			halbtc8723d1ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 1,
-						   0, 1);
+		if (bt_link_info->bt_link_exist)
 			miracast_plus_bt = true;
-		} else {
-			halbtc8723d1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0,
-						   0, 0);
+		else
 			miracast_plus_bt = false;
-		}
+
 		btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
 				   &miracast_plus_bt);
+
 		halbtc8723d1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
-					   bt_ctrl_agg_buf_size, agg_buf_size);
+					false, 0x5);
 
-		if (coex_sta->c2h_bt_inquiry_page) {
+		if (scan || link || roam || under_4way) {
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"############# [BTCoex],  BT Is Inquirying\n");
+				"[BTCoex], scan = %d, link = %d, roam = %d 4way = %d!!!\n",
+				    scan, link, roam, under_4way);
 			BTC_TRACE(trace_buf);
-			halbtc8723d1ant_action_bt_inquiry(btcoexist);
+
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], wifi is under linkscan process + Multi-Port !!\n");
+			BTC_TRACE(trace_buf);
+
+			halbtc8723d1ant_action_wifi_linkscan_process(btcoexist);
 		} else
 			halbtc8723d1ant_action_wifi_multi_port(btcoexist);
 
-
 		return;
 	} else {
-		miracast_plus_bt = false;
-		btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
-				   &miracast_plus_bt);
+
+	miracast_plus_bt = false;
+	btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
+				&miracast_plus_bt);
 	}
 
 	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
+				&wifi_connected);
 
 	if ((bt_link_info->bt_link_exist) && (wifi_connected)) {
-		halbtc8723d1ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 1, 0, 1);
 
 		btcoexist->btc_get(btcoexist, BTC_GET_U1_IOT_PEER, &iot_peer);
 
-		if (BTC_IOT_PEER_CISCO != iot_peer) {
-			if (bt_link_info->sco_exist) /* if (bt_link_info->bt_hi_pri_link_exist) */
+		if (BTC_IOT_PEER_CISCO == iot_peer) {
+
+			if (BTC_WIFI_BW_HT40 == wifi_bw)
 				halbtc8723d1ant_limited_rx(btcoexist,
-					   NORMAL_EXEC, true, false, 0x5);
+						NORMAL_EXEC, false, true, 0x10);
 			else
 				halbtc8723d1ant_limited_rx(btcoexist,
-					   NORMAL_EXEC, false, false, 0x5);
-		} else {
-			if (bt_link_info->sco_exist)
-				halbtc8723d1ant_limited_rx(btcoexist,
-					   NORMAL_EXEC, true, false, 0x5);
-			else {
-				if (BTC_WIFI_BW_HT40 == wifi_bw)
-					halbtc8723d1ant_limited_rx(btcoexist,
-						NORMAL_EXEC, false, true, 0x10);
-				else
-					halbtc8723d1ant_limited_rx(btcoexist,
 						NORMAL_EXEC, false, true, 0x8);
-			}
-		}
+			}  else
+			halbtc8723d1ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
+					   0x5);
+	}
 
-		halbtc8723d1ant_sw_mechanism(btcoexist, true);
-		halbtc8723d1ant_run_sw_coexist_mechanism(
+	halbtc8723d1ant_run_sw_coexist_mechanism(
 			btcoexist);  /* just print debug message */
-	} else {
-		halbtc8723d1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
 
-		halbtc8723d1ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
-					   0x5);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
 
-		halbtc8723d1ant_sw_mechanism(btcoexist, false);
-		halbtc8723d1ant_run_sw_coexist_mechanism(
-			btcoexist); /* just print debug message */
+	if (bt_hs_on) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"############# [BTCoex],  BT Is hs\n");
+		BTC_TRACE(trace_buf);
+		halbtc8723d1ant_action_bt_hs(btcoexist);
+		return;
 	}
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
-	if (coex_sta->c2h_bt_inquiry_page) {
+	if ((BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
+		coex_dm->bt_status) ||
+		(BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE ==
+		coex_dm->bt_status)) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "############# [BTCoex],  BT Is Inquirying\n");
+				"############# [BTCoex],  BT Is idle\n");
 		BTC_TRACE(trace_buf);
-		halbtc8723d1ant_action_bt_inquiry(btcoexist);
-		return;
-	} else if (bt_hs_on) {
-		halbtc8723d1ant_action_hs(btcoexist);
+		halbtc8723d1ant_action_bt_idle(btcoexist);
 		return;
 	}
 
-
-	if (!wifi_connected) {
-		boolean	scan = false, link = false, roam = false;
+	if (scan || link || roam || under_4way) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		   "[BTCoex], scan = %d, link = %d, roam = %d 4way = %d!!!\n",
+					scan, link, roam, under_4way);
+		BTC_TRACE(trace_buf);
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], wifi is non connected-idle !!!\n");
+		   "[BTCoex], wifi is under linkscan process!!\n");
 		BTC_TRACE(trace_buf);
 
-		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
-		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
-		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
+		halbtc8723d1ant_action_wifi_linkscan_process(btcoexist);
+	} else if (wifi_connected) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		   "[BTCoex], wifi is under connected!!\n");
+		BTC_TRACE(trace_buf);
 
-		if (scan || link || roam) {
-			if (scan)
-				halbtc8723d1ant_action_wifi_not_connected_scan(
-					btcoexist);
-			else
-				halbtc8723d1ant_action_wifi_not_connected_asso_auth(
-					btcoexist);
-		} else
-			halbtc8723d1ant_action_wifi_not_connected(btcoexist);
-	} else	/* wifi LPS/Busy */
 		halbtc8723d1ant_action_wifi_connected(btcoexist);
+	} else {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		   "[BTCoex], wifi is under not-connected!!\n");
+		BTC_TRACE(trace_buf);
+
+		halbtc8723d1ant_action_wifi_not_connected(btcoexist);
+	 }
 }
 
+
 void halbtc8723d1ant_init_coex_dm(IN struct btc_coexist *btcoexist)
 {
 	/* force to reset coex mechanism */
-
-	/* sw all off */
-	halbtc8723d1ant_sw_mechanism(btcoexist, false);
+	halbtc8723d1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, false);
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], Coex Mechanism Init!!\n");
@@ -3349,6 +3291,7 @@ void halbtc8723d1ant_init_coex_dm(IN struct btc_coexist *btcoexist)
 	coex_sta->cnt_setupLink = 0;
 	coex_sta->cnt_IgnWlanAct = 0;
 	coex_sta->cnt_Page = 0;
+	coex_sta->cnt_RoleSwitch = 0;
 
 	halbtc8723d1ant_query_bt_info(btcoexist);
 }
@@ -3360,6 +3303,7 @@ void halbtc8723d1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 	u16			u16tmp1 = 0;
 	u8	u8tmp0 = 0, u8tmp1 = 0;
 	struct  btc_board_info *board_info = &btcoexist->board_info;
+	u8 i = 0;
 
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -3389,9 +3333,18 @@ void halbtc8723d1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 
 	coex_sta->bt_coex_supported_feature = 0;
 	coex_sta->bt_coex_supported_version = 0;
+	coex_sta->bt_ble_scan_type = 0;
+	coex_sta->bt_ble_scan_para[0] = 0;
+	coex_sta->bt_ble_scan_para[1] = 0;
+	coex_sta->bt_ble_scan_para[2] = 0;
 	coex_sta->bt_reg_vendor_ac = 0xffff;
 	coex_sta->bt_reg_vendor_ae = 0xffff;
 	coex_sta->isolation_btween_wb = BT_8723D_1ANT_DEFAULT_ISOLATION;
+	coex_sta->gnt_error_cnt = 0;
+	coex_sta->bt_relink_downcount = 0;
+
+	for (i = 0; i <= 9; i++)
+		coex_sta->bt_afh_map[i] = 0;
 
 	/* 0xf0[15:12] --> Chip Cut information */
 	coex_sta->cut_version = (btcoexist->btc_read_1byte(btcoexist,
@@ -3415,10 +3368,12 @@ void halbtc8723d1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 
 	halbtc8723d1ant_enable_gnt_to_gpio(btcoexist, true);
 
+#if 0
 	/* check if WL firmware download ok */
 	if (btcoexist->btc_read_1byte(btcoexist, 0x80) == 0xc6)
 		halbtc8723d1ant_post_state_to_bt(btcoexist,
 					 BT_8723D_1ANT_SCOREBOARD_ONOFF, true);
+#endif
 
 	/* PTA parameter */
 	halbtc8723d1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
@@ -4925,14 +4880,15 @@ void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	bt_coex_ver = ((coex_sta->bt_coex_supported_version & 0xff00) >> 8);
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n %-35s = %d_%02x/ 0x%02x/ 0x%02x (%s)",
-		   "CoexVer WL/  BT_Desired/ BT_Report",
-		   glcoex_ver_date_8723d_1ant, glcoex_ver_8723d_1ant,
-		   glcoex_ver_btdesired_8723d_1ant,
-		   bt_coex_ver,
-		   (bt_coex_ver == 0xff ? "Unknown" :
-		   (bt_coex_ver >= glcoex_ver_btdesired_8723d_1ant ?
-		      "Match":"Mis-Match")));
+				"\r\n %-35s = %d_%02x/ 0x%02x/ 0x%02x (%s)",
+				"CoexVer WL/  BT_Desired/ BT_Report",
+				glcoex_ver_date_8723d_1ant, glcoex_ver_8723d_1ant,
+				glcoex_ver_btdesired_8723d_1ant,
+				bt_coex_ver,
+				(bt_coex_ver == 0xff ? "Unknown" :
+				(coex_sta->bt_disabled ? "BT-disable" :
+				(bt_coex_ver >= glcoex_ver_btdesired_8723d_1ant ?
+				"Match" : "Mis-Match"))));
 	CL_PRINTF(cli_buf);
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
@@ -4983,7 +4939,9 @@ void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 			   "Profiles",
 			   ((bt_link_info->a2dp_exist) ? "A2DP," : ""),
 			   ((bt_link_info->sco_exist) ?  "SCO," : ""),
-			   ((bt_link_info->hid_exist) ?  "HID," : ""),
+			   ((bt_link_info->hid_exist) ?
+			    ((coex_sta->hid_busy_num >= 2) ? "HID(4/18)," :
+			     "HID(2/18),") : ""),
 			   ((bt_link_info->pan_exist) ?  "PAN," : ""),
 			   ((coex_sta->voice_over_HOGP) ? "Voice" : ""));
 	else
@@ -5012,13 +4970,27 @@ void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		CL_PRINTF(cli_buf);
 	}
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ 0x%x",
-		   "Role/IgnWlanAct/Feature",
-		   ((bt_link_info->slave_role) ? "Slave" : "Master"),
-		   ((coex_dm->cur_ignore_wlan_act) ? "Yes" : "No"),
-		   coex_sta->bt_coex_supported_feature);
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %s/ 0x%x",
+				"Role/RoleSwCnt/IgnWlact/Feature",
+				((bt_link_info->slave_role) ? "Slave" : "Master"),
+				coex_sta->cnt_RoleSwitch,
+				((coex_dm->cur_ignore_wlan_act) ? "Yes" : "No"),
+				coex_sta->bt_coex_supported_feature);
 	CL_PRINTF(cli_buf);
 
+	if ((coex_sta->bt_ble_scan_type & 0x7) != 0x0) {
+			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+				"\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
+				"BLEScan Type/TV/Init/Ble",
+				coex_sta->bt_ble_scan_type,
+				(coex_sta->bt_ble_scan_type & 0x1 ?
+				coex_sta->bt_ble_scan_para[0] : 0x0),
+				(coex_sta->bt_ble_scan_type & 0x2 ?
+				coex_sta->bt_ble_scan_para[1] : 0x0),
+				(coex_sta->bt_ble_scan_type & 0x4 ?
+				coex_sta->bt_ble_scan_para[2] : 0x0));
+			CL_PRINTF(cli_buf);
+	}
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d",
 		   "ReInit/ReLink/IgnWlact/Page/NameReq",
@@ -5044,6 +5016,25 @@ void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 			   coex_sta->bt_reg_vendor_ac & 0x3, u16tmp[0]);
 	CL_PRINTF(cli_buf);
 
+	if (coex_sta->num_of_profile > 0) {
+
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+			"\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
+			"AFH MAP",
+			coex_sta->bt_afh_map[0],
+			coex_sta->bt_afh_map[1],
+			coex_sta->bt_afh_map[2],
+			coex_sta->bt_afh_map[3],
+			coex_sta->bt_afh_map[4],
+			coex_sta->bt_afh_map[5],
+			coex_sta->bt_afh_map[6],
+			coex_sta->bt_afh_map[7],
+			coex_sta->bt_afh_map[8],
+			coex_sta->bt_afh_map[9]
+			   );
+		CL_PRINTF(cli_buf);
+	}
+
 	for (i = 0; i < BT_INFO_SRC_8723D_1ANT_MAX; i++) {
 		if (coex_sta->bt_info_c2h_cnt[i]) {
 			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
@@ -5180,13 +5171,14 @@ void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	}
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n %-35s = %s (BB:%s)/ %s (BB:%s)/ %s",
-		   "GNT_WL_Ctrl/GNT_BT_Ctrl/Dbg",
-		   ((u32tmp[0] & BIT(12)) ? "SW" : "HW"),
-		   ((u32tmp[0] & BIT(8)) ?  "SW" : "HW"),
-		   ((u32tmp[0] & BIT(14)) ? "SW" : "HW"),
-		   ((u32tmp[0] & BIT(10)) ?  "SW" : "HW"),
-		   ((u8tmp[0] & BIT(3)) ? "On" : "Off"));
+			   "\r\n %-35s = %s (BB:%s)/ %s (BB:%s)/ %s %d",
+			   "GNT_WL_Ctrl/GNT_BT_Ctrl/Dbg",
+			   ((u32tmp[0] & BIT(12)) ? "SW" : "HW"),
+			   ((u32tmp[0] & BIT(8)) ?	"SW" : "HW"),
+			   ((u32tmp[0] & BIT(14)) ? "SW" : "HW"),
+			   ((u32tmp[0] & BIT(10)) ?  "SW" : "HW"),
+			   ((u8tmp[0] & BIT(3)) ? "On" : "Off"),
+			   coex_sta->gnt_error_cnt);
 	CL_PRINTF(cli_buf);
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
@@ -5260,20 +5252,25 @@ void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_PRINTF(cli_buf);
 #endif
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s",
-		   "Wifi-HiPri/ Ccklock/ CckEverLock",
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s/ %d",
+		   "WlHiPri/ Locking/ Locked/ Noisy",
 		   (coex_sta->wifi_is_high_pri_task ? "Yes" : "No"),
 		   (coex_sta->cck_lock ? "Yes" : "No"),
-		   (coex_sta->cck_ever_lock ? "Yes" : "No"));
+		   (coex_sta->cck_ever_lock ? "Yes" : "No"),
+		   coex_sta->wl_noisy_level);
 	CL_PRINTF(cli_buf);
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s",
 		   "0x770(Hi-pri rx/tx)",
-		   coex_sta->high_priority_rx, coex_sta->high_priority_tx);
+		   coex_sta->high_priority_rx, coex_sta->high_priority_tx,
+		   (coex_sta->is_hiPri_rx_overhead ? "(scan overhead!!)" : ""));
 	CL_PRINTF(cli_buf);
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
+
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s",
 		   "0x774(Lo-pri rx/tx)",
-		   coex_sta->low_priority_rx, coex_sta->low_priority_tx);
+		   coex_sta->low_priority_rx, coex_sta->low_priority_tx,
+		   (bt_link_info->slave_role ? "(Slave!!)" : (
+		   coex_sta->is_tdma_btautoslot_hang ? "(auto-slot hang!!)" : "")));
 	CL_PRINTF(cli_buf);
 
 	btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
@@ -5293,7 +5290,11 @@ void ex_halbtc8723d1ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
 
 		/* Write WL "Active" in Score-board for LPS off */
 		halbtc8723d1ant_post_state_to_bt(btcoexist,
-				 BT_8723D_1ANT_SCOREBOARD_ACTIVE, false);
+				BT_8723D_1ANT_SCOREBOARD_ACTIVE |
+				BT_8723D_1ANT_SCOREBOARD_ONOFF |
+				BT_8723D_1ANT_SCOREBOARD_SCAN |
+				BT_8723D_1ANT_SCOREBOARD_UNDERTEST,
+				false);
 
 		halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
 
@@ -5306,9 +5307,14 @@ void ex_halbtc8723d1ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], IPS LEAVE notify\n");
 		BTC_TRACE(trace_buf);
+#if 0
 		halbtc8723d1ant_post_state_to_bt(btcoexist,
 					 BT_8723D_1ANT_SCOREBOARD_ACTIVE, true);
 
+		halbtc8723d1ant_post_state_to_bt(btcoexist,
+				 BT_8723D_1ANT_SCOREBOARD_ONOFF, true);
+#endif
+
 		halbtc8723d1ant_init_hw_config(btcoexist, false, false);
 		halbtc8723d1ant_init_coex_dm(btcoexist);;
 
@@ -5377,20 +5383,17 @@ void ex_halbtc8723d1ant_scan_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 
 		halbtc8723d1ant_post_state_to_bt(btcoexist,
-					 BT_8723D_1ANT_SCOREBOARD_SCAN, true);
-		halbtc8723d1ant_post_state_to_bt(btcoexist,
-					 BT_8723D_1ANT_SCOREBOARD_ACTIVE, true);
+					BT_8723D_1ANT_SCOREBOARD_ACTIVE |
+					BT_8723D_1ANT_SCOREBOARD_SCAN |
+					BT_8723D_1ANT_SCOREBOARD_ONOFF,
+					true);
 
 		/* Force antenna setup for no scan result issue */
 		halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
 					     FORCE_EXEC,
 					     BT_8723D_1ANT_PHASE_2G_RUNTIME);
 
-		if (!wifi_connected)	/* non-connected scan */
-			halbtc8723d1ant_action_wifi_not_connected_scan(
-				btcoexist);
-		else	/* wifi is connected */
-			halbtc8723d1ant_action_wifi_connected_scan(btcoexist);
+		halbtc8723d1ant_run_coexist_mechanism(btcoexist);
 
 	} else {
 
@@ -5404,13 +5407,7 @@ void ex_halbtc8723d1ant_scan_notify(IN struct btc_coexist *btcoexist,
 			    coex_sta->scan_ap_num);
 		BTC_TRACE(trace_buf);
 
-		halbtc8723d1ant_post_state_to_bt(btcoexist,
-					 BT_8723D_1ANT_SCOREBOARD_SCAN, false);
-
-		if (!wifi_connected)
-			halbtc8723d1ant_action_wifi_not_connected(btcoexist);
-		else
-			halbtc8723d1ant_action_wifi_connected(btcoexist);
+		halbtc8723d1ant_run_coexist_mechanism(btcoexist);
 	}
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -5436,7 +5433,10 @@ void ex_halbtc8723d1ant_connect_notify(IN struct btc_coexist *btcoexist,
 		coex_sta->wifi_is_high_pri_task = true;
 
 		halbtc8723d1ant_post_state_to_bt(btcoexist,
-					 BT_8723D_1ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8723D_1ANT_SCOREBOARD_ACTIVE |
+					 BT_8723D_1ANT_SCOREBOARD_SCAN |
+					 BT_8723D_1ANT_SCOREBOARD_ONOFF,
+					 true);
 
 		/* Force antenna setup for no scan result issue */
 		halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
@@ -5449,7 +5449,7 @@ void ex_halbtc8723d1ant_connect_notify(IN struct btc_coexist *btcoexist,
 
 		coex_dm->arp_cnt = 0;
 
-		halbtc8723d1ant_action_wifi_not_connected_asso_auth(btcoexist);
+		halbtc8723d1ant_run_coexist_mechanism(btcoexist);
 
 		/* To keep TDMA case during connect process,
 		to avoid changed by Btinfo and runcoexmechanism */
@@ -5463,10 +5463,7 @@ void ex_halbtc8723d1ant_connect_notify(IN struct btc_coexist *btcoexist,
 			    "[BTCoex], CONNECT FINISH notify\n");
 		BTC_TRACE(trace_buf);
 
-		if (!wifi_connected) /* non-connected scan */
-			halbtc8723d1ant_action_wifi_not_connected(btcoexist);
-		else
-			halbtc8723d1ant_action_wifi_connected(btcoexist);
+		halbtc8723d1ant_run_coexist_mechanism(btcoexist);
 	}
 
 }
@@ -5487,7 +5484,9 @@ void ex_halbtc8723d1ant_media_status_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 
 		halbtc8723d1ant_post_state_to_bt(btcoexist,
-					 BT_8723D_1ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8723D_1ANT_SCOREBOARD_ACTIVE |
+					 BT_8723D_1ANT_SCOREBOARD_ONOFF,
+					 true);
 
 		/* Force antenna setup for no scan result issue */
 		halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
@@ -5579,9 +5578,11 @@ void ex_halbtc8723d1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
 		coex_sta->specific_pkt_period_cnt = 2;
 	}
 
-	if (coex_sta->wifi_is_high_pri_task)
-		halbtc8723d1ant_action_wifi_connected_specific_packet(
-			btcoexist);
+	if (coex_sta->wifi_is_high_pri_task) {
+		halbtc8723d1ant_post_state_to_bt(btcoexist,
+					 BT_8723D_1ANT_SCOREBOARD_SCAN, true);
+		halbtc8723d1ant_run_coexist_mechanism(btcoexist);
+	}
 }
 
 void ex_halbtc8723d1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
@@ -5589,6 +5590,9 @@ void ex_halbtc8723d1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 {
 	u8			i, rsp_source = 0;
 	boolean	wifi_connected = false;
+	boolean	wifi_scan = false, wifi_link = false, wifi_roam = false,
+		    wifi_busy = false;
+	static boolean is_scoreboard_scan = false;
 
 	if (psd_scan->is_AntDet_running == true) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -5688,9 +5692,38 @@ void ex_halbtc8723d1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 		if (coex_sta->bt_info_ext & BIT(3))
 			coex_sta->cnt_IgnWlanAct++;
 
-		if (coex_sta->bt_create_connection)
+		if (coex_sta->bt_info_ext & BIT(6))
+			coex_sta->cnt_RoleSwitch++;
+
+		if (coex_sta->bt_create_connection) {
 			coex_sta->cnt_Page++;
 
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY,
+					   &wifi_busy);
+
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link);
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam);
+
+			if ((wifi_link) || (wifi_roam) || (wifi_scan) ||
+			    (coex_sta->wifi_is_high_pri_task) || (wifi_busy)) {
+
+				is_scoreboard_scan = true;
+				halbtc8723d1ant_post_state_to_bt(btcoexist,
+					 BT_8723D_1ANT_SCOREBOARD_SCAN, true);
+
+			} else
+				halbtc8723d1ant_post_state_to_bt(btcoexist,
+					 BT_8723D_1ANT_SCOREBOARD_SCAN, false);
+
+		} else {
+				if (is_scoreboard_scan) {
+					halbtc8723d1ant_post_state_to_bt(btcoexist,
+						 BT_8723D_1ANT_SCOREBOARD_SCAN, false);
+					is_scoreboard_scan = false;
+				}
+		}
+
 		/* Here we need to resend some wifi info to BT */
 		/* because bt is reset and loss of the info. */
 
@@ -5715,38 +5748,46 @@ void ex_halbtc8723d1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 			}
 
 
-			/*	If Ignore_WLanAct && not SetUp_Link */
+			/*	If Ignore_WLanAct && not SetUp_Link or Role_Switch */
 			if ((coex_sta->bt_info_ext & BIT(3)) &&
-			    (!(coex_sta->bt_info_ext & BIT(2)))) {
+				(!(coex_sta->bt_info_ext & BIT(2))) &&
+				(!(coex_sta->bt_info_ext & BIT(6)))) {
 
 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 					"[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n");
 				BTC_TRACE(trace_buf);
 				halbtc8723d1ant_ignore_wlan_act(btcoexist,
 							FORCE_EXEC, false);
+			} else {
+				if (coex_sta->bt_info_ext & BIT(2)) {
+					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					"[BTCoex], BT ignore Wlan active because Re-link!!\n");
+					BTC_TRACE(trace_buf);
+				} else if (coex_sta->bt_info_ext & BIT(6)) {
+					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					"[BTCoex], BT ignore Wlan active because Role-Switch!!\n");
+					BTC_TRACE(trace_buf);
+				}
 			}
 		}
 
 	}
 
-
-	halbtc8723d1ant_update_bt_link_info(btcoexist);
-
-	if (btcoexist->manual_control) {
+	if ((coex_sta->bt_info_ext & BIT(5))) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], BtInfoNotify(), No run_coexist_mechanism for Manual CTRL\n");
-		BTC_TRACE(trace_buf);
-		return;
-	}
-
-	if (btcoexist->stop_coex_dm) {
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], BtInfoNotify(),	No run_coexist_mechanism for Stop Coex DM\n");
-		BTC_TRACE(trace_buf);
-		return;
+					"[BTCoex], BT ext info bit4 check, query BLE Scan type!!\n");
+				BTC_TRACE(trace_buf);
+	coex_sta->bt_ble_scan_type = btcoexist->btc_get_ble_scan_type_from_bt(btcoexist);
+
+	if ((coex_sta->bt_ble_scan_type & 0x1) == 0x1)
+		coex_sta->bt_ble_scan_para[0]  = btcoexist->btc_get_ble_scan_para_from_bt(btcoexist, 0x1);
+	if ((coex_sta->bt_ble_scan_type & 0x2) == 0x2)
+		coex_sta->bt_ble_scan_para[1]  = btcoexist->btc_get_ble_scan_para_from_bt(btcoexist, 0x2);
+	if ((coex_sta->bt_ble_scan_type & 0x4) == 0x4)
+		coex_sta->bt_ble_scan_para[2]  = btcoexist->btc_get_ble_scan_para_from_bt(btcoexist, 0x4);
 	}
 
-	coex_sta->c2h_bt_info_req_sent = false;
+	halbtc8723d1ant_update_bt_link_info(btcoexist);
 
 	halbtc8723d1ant_run_coexist_mechanism(btcoexist);
 }
@@ -5765,13 +5806,13 @@ void ex_halbtc8723d1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 			    "[BTCoex], RF is turned ON!!\n");
 		BTC_TRACE(trace_buf);
 
-		coex_sta->wl_rf_off_on_event = true;
 		btcoexist->stop_coex_dm = false;
-
+#if 0
 		halbtc8723d1ant_post_state_to_bt(btcoexist,
 					 BT_8723D_1ANT_SCOREBOARD_ACTIVE, true);
 		halbtc8723d1ant_post_state_to_bt(btcoexist,
 					 BT_8723D_1ANT_SCOREBOARD_ONOFF, true);
+#endif
 
 	} else if (BTC_RF_OFF == type) {
 
@@ -5780,9 +5821,11 @@ void ex_halbtc8723d1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 
 		halbtc8723d1ant_post_state_to_bt(btcoexist,
-				 BT_8723D_1ANT_SCOREBOARD_ACTIVE, false);
-		halbtc8723d1ant_post_state_to_bt(btcoexist,
-					 BT_8723D_1ANT_SCOREBOARD_ONOFF, false);
+				BT_8723D_1ANT_SCOREBOARD_ACTIVE |
+				BT_8723D_1ANT_SCOREBOARD_ONOFF |
+				BT_8723D_1ANT_SCOREBOARD_SCAN |
+				BT_8723D_1ANT_SCOREBOARD_UNDERTEST,
+				false);
 
 		halbtc8723d1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
 
@@ -5791,7 +5834,6 @@ void ex_halbtc8723d1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 					     BT_8723D_1ANT_PHASE_WLAN_OFF);
 
 		btcoexist->stop_coex_dm = true;
-		coex_sta->wl_rf_off_on_event = false;
 	}
 }
 
@@ -5801,9 +5843,11 @@ void ex_halbtc8723d1ant_halt_notify(IN struct btc_coexist *btcoexist)
 	BTC_TRACE(trace_buf);
 
 	halbtc8723d1ant_post_state_to_bt(btcoexist,
-				 BT_8723D_1ANT_SCOREBOARD_ACTIVE, false);
-	halbtc8723d1ant_post_state_to_bt(btcoexist,
-					 BT_8723D_1ANT_SCOREBOARD_ONOFF, false);
+				BT_8723D_1ANT_SCOREBOARD_ACTIVE |
+				BT_8723D_1ANT_SCOREBOARD_ONOFF |
+				BT_8723D_1ANT_SCOREBOARD_SCAN |
+				BT_8723D_1ANT_SCOREBOARD_UNDERTEST,
+				false);
 
 	halbtc8723d1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
 
@@ -5830,9 +5874,11 @@ void ex_halbtc8723d1ant_pnp_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 
 		halbtc8723d1ant_post_state_to_bt(btcoexist,
-				 BT_8723D_1ANT_SCOREBOARD_ACTIVE, false);
-		halbtc8723d1ant_post_state_to_bt(btcoexist,
-					 BT_8723D_1ANT_SCOREBOARD_ONOFF, false);
+				BT_8723D_1ANT_SCOREBOARD_ACTIVE |
+				BT_8723D_1ANT_SCOREBOARD_ONOFF |
+				BT_8723D_1ANT_SCOREBOARD_SCAN |
+				BT_8723D_1ANT_SCOREBOARD_UNDERTEST,
+				false);
 
 		if (BTC_WIFI_PNP_SLEEP_KEEP_ANT == pnp_state) {
 
@@ -5852,12 +5898,12 @@ void ex_halbtc8723d1ant_pnp_notify(IN struct btc_coexist *btcoexist,
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], Pnp notify to WAKE UP\n");
 		BTC_TRACE(trace_buf);
-
+#if 0
 		halbtc8723d1ant_post_state_to_bt(btcoexist,
 					 BT_8723D_1ANT_SCOREBOARD_ACTIVE, true);
 		halbtc8723d1ant_post_state_to_bt(btcoexist,
 					 BT_8723D_1ANT_SCOREBOARD_ONOFF, true);
-
+#endif
 		btcoexist->stop_coex_dm = false;
 	}
 }
@@ -5877,6 +5923,11 @@ void ex_halbtc8723d1ant_periodical(IN struct btc_coexist *btcoexist)
 {
 
 	struct  btc_board_info	*board_info = &btcoexist->board_info;
+	boolean wifi_busy = false;
+	u4Byte	value = 0;
+	u32	bt_patch_ver;
+	static u8 cnt = 0;
+	boolean bt_relink_finish = false;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], ************* Periodical *************\n");
@@ -5892,6 +5943,37 @@ void ex_halbtc8723d1ant_periodical(IN struct btc_coexist *btcoexist)
 
 	halbtc8723d1ant_monitor_bt_enable_disable(btcoexist);
 
+#if 0
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+
+	/* halbtc8723d1ant_read_score_board(btcoexist, &bt_scoreboard_val); */
+
+	if (wifi_busy) {
+		halbtc8723d1ant_post_state_to_bt(btcoexist,
+				BT_8723D_1ANT_SCOREBOARD_UNDERTEST, true);
+		/*
+		halbtc8723d1ant_post_state_to_bt(btcoexist,
+					 BT_8723D_1ANT_SCOREBOARD_WLBUSY, true);
+
+		if (bt_scoreboard_val & BIT(6))
+			halbtc8723d1ant_query_bt_info(btcoexist); */
+	} else {
+		halbtc8723d1ant_post_state_to_bt(btcoexist,
+					BT_8723D_1ANT_SCOREBOARD_UNDERTEST, false);
+		/*
+		halbtc8723d1ant_post_state_to_bt(btcoexist,
+					BT_8723D_1ANT_SCOREBOARD_WLBUSY,
+					false);  */
+	}
+#endif
+
+	if (coex_sta->bt_relink_downcount != 0) {
+		coex_sta->bt_relink_downcount--;
+
+		if (coex_sta->bt_relink_downcount == 0)
+			bt_relink_finish = true;
+	}
+
 	/* for 4-way, DHCP, EAPOL packet */
 	if (coex_sta->specific_pkt_period_cnt > 0) {
 
@@ -5911,35 +5993,60 @@ void ex_halbtc8723d1ant_periodical(IN struct btc_coexist *btcoexist)
 
 	if (!coex_sta->bt_disabled) {
 		if (coex_sta->bt_coex_supported_feature == 0)
-			coex_sta->bt_coex_supported_feature =
-				btcoexist->btc_get_bt_coex_supported_feature(
-					btcoexist);
+			btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_FEATURE,
+						&coex_sta->bt_coex_supported_feature);
 
 		if ((coex_sta->bt_coex_supported_version == 0) ||
 			 (coex_sta->bt_coex_supported_version == 0xffff))
-			coex_sta->bt_coex_supported_version =
-				btcoexist->btc_get_bt_coex_supported_version(
-					btcoexist);
+			btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_VERSION,
+						&coex_sta->bt_coex_supported_version);
 
 		if (coex_sta->bt_reg_vendor_ac == 0xffff)
 			coex_sta->bt_reg_vendor_ac = (u16)(
-				     btcoexist->btc_get_bt_reg(btcoexist, 3,
-							     0xac) & 0xffff);
+						btcoexist->btc_get_bt_reg(btcoexist, 3,
+						0xac) & 0xffff);
 
 		if (coex_sta->bt_reg_vendor_ae == 0xffff)
 			coex_sta->bt_reg_vendor_ae = (u16)(
-				     btcoexist->btc_get_bt_reg(btcoexist, 3,
-							     0xae) & 0xffff);
+						btcoexist->btc_get_bt_reg(btcoexist, 3,
+						0xae) & 0xffff);
+
+		btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER,
+						&bt_patch_ver);
+		btcoexist->bt_info.bt_get_fw_ver = bt_patch_ver;
+
+		if (coex_sta->num_of_profile > 0) {
+			cnt++;
+
+			if (cnt >= 3) {
+				btcoexist->btc_get_bt_afh_map_from_bt(btcoexist, 0,
+					&coex_sta->bt_afh_map[0]);
+				cnt = 0;
+			}
+		}
 
 #if BT_8723D_1ANT_ANTDET_ENABLE
 
 		if (board_info->btdm_ant_det_finish) {
 			if ((psd_scan->ant_det_result == 12) &&
 			    (psd_scan->ant_det_psd_scan_peak_val == 0)
-			    && (!psd_scan->is_AntDet_running))
+			    && (!psd_scan->is_AntDet_running)) {
 				psd_scan->ant_det_psd_scan_peak_val =
 					btcoexist->btc_get_ant_det_val_from_bt(
-						btcoexist) * 100;
+					btcoexist) * 100;
+
+				board_info->antdetval = psd_scan->ant_det_psd_scan_peak_val/100;
+				value = board_info->antdetval;
+
+#ifdef PLATFORM_WINDOWS
+				{
+					PWCHAR	registryName;
+
+					registryName = L"antdetval";
+					PlatformWriteCommonDwordRegistry(registryName, &value);
+				}
+#endif
+			}
 		}
 
 #endif
diff --git a/rtl8822BU/hal/btc/halbtc8723d1ant.h b/rtl8822BU/hal/btc/halbtc8723d1ant.h
index 9d9f461..a8fb447 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8723d1ant.h
+++ b/rtl8822BU/hal/btc/halbtc8723d1ant.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 
 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
 
@@ -138,7 +152,9 @@ enum bt_8723d_1ant_phase {
 enum bt_8723d_1ant_Scoreboard {
 	BT_8723D_1ANT_SCOREBOARD_ACTIVE								= BIT(0),
 	BT_8723D_1ANT_SCOREBOARD_ONOFF								= BIT(1),
-	BT_8723D_1ANT_SCOREBOARD_SCAN								= BIT(2)
+	BT_8723D_1ANT_SCOREBOARD_SCAN								= BIT(2),
+	BT_8723D_1ANT_SCOREBOARD_UNDERTEST							= BIT(3),
+	BT_8723D_1ANT_SCOREBOARD_WLBUSY								= BIT(6)
 };
 
 struct coex_dm_8723d_1ant {
@@ -199,27 +215,27 @@ struct coex_dm_8723d_1ant {
 };
 
 struct coex_sta_8723d_1ant {
-	boolean					bt_disabled;
-	boolean					bt_link_exist;
-	boolean					sco_exist;
-	boolean					a2dp_exist;
-	boolean					hid_exist;
-	boolean					pan_exist;
-	boolean					bt_hi_pri_link_exist;
+	boolean				bt_disabled;
+	boolean				bt_link_exist;
+	boolean				sco_exist;
+	boolean				a2dp_exist;
+	boolean				hid_exist;
+	boolean				pan_exist;
+	boolean				bt_hi_pri_link_exist;
 	u8					num_of_profile;
 
-	boolean					under_lps;
-	boolean					under_ips;
+	boolean				under_lps;
+	boolean				under_ips;
 	u32					specific_pkt_period_cnt;
 	u32					high_priority_tx;
 	u32					high_priority_rx;
 	u32					low_priority_tx;
 	u32					low_priority_rx;
+	boolean             is_hiPri_rx_overhead;
 	s8					bt_rssi;
 	boolean				bt_tx_rx_mask;
 	u8					pre_bt_rssi_state;
 	u8					pre_wifi_rssi_state[4];
-	boolean				c2h_bt_info_req_sent;
 	u8					bt_info_c2h[BT_INFO_SRC_8723D_1ANT_MAX][10];
 	u32					bt_info_c2h_cnt[BT_INFO_SRC_8723D_1ANT_MAX];
 	boolean				bt_whck_test;
@@ -249,7 +265,6 @@ struct coex_sta_8723d_1ant {
 	u8					coex_table_type;
 
 	boolean				force_lps_on;
-	u32					wrong_profile_notification;
 
 	boolean				concurrent_rx_mode_on;
 
@@ -259,12 +274,14 @@ struct coex_sta_8723d_1ant {
 	u8					a2dp_bit_pool;
 	u8					cut_version;
 	boolean				acl_busy;
-	boolean				wl_rf_off_on_event;
 	boolean				bt_create_connection;
 
 	u32					bt_coex_supported_feature;
 	u32					bt_coex_supported_version;
 
+	u8					bt_ble_scan_type;
+	u32					bt_ble_scan_para[3];
+
 	boolean				run_time_state;
 	boolean				freeze_coexrun_by_btinfo;
 
@@ -281,11 +298,19 @@ struct coex_sta_8723d_1ant {
 	u32					cnt_ReInit;
 	u32					cnt_IgnWlanAct;
 	u32					cnt_Page;
+	u32					cnt_RoleSwitch;
 
 	u16					bt_reg_vendor_ac;
 	u16					bt_reg_vendor_ae;
 
 	boolean				is_setupLink;
+	u8					wl_noisy_level;
+	u32                 gnt_error_cnt;
+
+	u8					bt_afh_map[10];
+	u8					bt_relink_downcount;
+	boolean				is_tdma_btautoslot;
+	boolean				is_tdma_btautoslot_hang;
 };
 
 #define  BT_8723D_1ANT_ANTDET_PSD_POINTS			256	/* MAX:1024 */
diff --git a/rtl8822BU/hal/btc/halbtc8723d2ant.c b/rtl8822BU/hal/btc/halbtc8723d2ant.c
index 00f35b5..318b8ec 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8723d2ant.c
+++ b/rtl8822BU/hal/btc/halbtc8723d2ant.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 /* ************************************************************
  * Description:
  *
@@ -43,9 +57,9 @@ const char *const glbt_info_src_8723d_2ant[] = {
  * Please strictly follow this order and naming style !!!
  *
  * ************************************************************ */
-u32	glcoex_ver_date_8723d_2ant = 20160805;
-u32	glcoex_ver_8723d_2ant = 0x0c;
-u32 glcoex_ver_btdesired_8723d_2ant = 0x0a;
+u32	glcoex_ver_date_8723d_2ant = 20161108;
+u32	glcoex_ver_8723d_2ant = 0x10;
+u32 glcoex_ver_btdesired_8723d_2ant = 0x10;
 
 
 /* ************************************************************
@@ -250,7 +264,6 @@ void halbtc8723d2ant_query_bt_info(IN struct btc_coexist *btcoexist)
 {
 	u8			h2c_parameter[1] = {0};
 
-	coex_sta->c2h_bt_info_req_sent = true;
 
 	h2c_parameter[0] |= BIT(0);	/* trigger */
 
@@ -261,7 +274,8 @@ void halbtc8723d2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 {
 	u32			reg_hp_txrx, reg_lp_txrx, u32tmp;
 	u32			reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
-	static u8		num_of_bt_counter_chk = 0, cnt_slave = 0;
+	static u8		num_of_bt_counter_chk = 0, cnt_slave = 0, cnt_overhead = 0,
+				cnt_autoslot_hang = 0;
 
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
@@ -281,6 +295,23 @@ void halbtc8723d2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 	coex_sta->low_priority_tx = reg_lp_tx;
 	coex_sta->low_priority_rx = reg_lp_rx;
 
+	if (BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
+		coex_dm->bt_status) {
+
+			if (coex_sta->high_priority_rx >= 15) {
+					if (cnt_overhead < 3)
+						cnt_overhead++;
+
+					if (cnt_overhead == 3)
+						coex_sta->is_hiPri_rx_overhead = true;
+			 } else {
+					if (cnt_overhead > 0)
+						cnt_overhead--;
+
+					if (cnt_overhead == 0)
+						coex_sta->is_hiPri_rx_overhead = false;
+			}
+	}
 
 	/* reset counter */
 	btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
@@ -307,14 +338,34 @@ void halbtc8723d2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 
 	}
 
-	if ((coex_sta->high_priority_tx == 0) &&
-	    (coex_sta->high_priority_rx == 0) &&
-	    (coex_sta->low_priority_tx == 0) &&
-	    (coex_sta->low_priority_rx == 0)) {
-		num_of_bt_counter_chk++;
-		if (num_of_bt_counter_chk >= 3) {
-			halbtc8723d2ant_query_bt_info(btcoexist);
-			num_of_bt_counter_chk = 0;
+	if (coex_sta->is_tdma_btautoslot) {
+		if ((coex_sta->low_priority_tx >= 1300) &&
+			(coex_sta->low_priority_rx <= 150)) {
+			if (cnt_autoslot_hang >= 2) {
+				coex_sta->is_tdma_btautoslot_hang = true;
+				cnt_autoslot_hang = 2;
+			} else
+				cnt_autoslot_hang++;
+		} else {
+			if (cnt_autoslot_hang == 0)	{
+				coex_sta->is_tdma_btautoslot_hang = false;
+				cnt_autoslot_hang = 0;
+			} else
+				cnt_autoslot_hang--;
+		}
+	}
+
+	if (!coex_sta->bt_disabled) {
+
+		if ((coex_sta->high_priority_tx == 0) &&
+		    (coex_sta->high_priority_rx == 0) &&
+		    (coex_sta->low_priority_tx == 0) &&
+		    (coex_sta->low_priority_rx == 0)) {
+			num_of_bt_counter_chk++;
+			if (num_of_bt_counter_chk >= 3) {
+				halbtc8723d2ant_query_bt_info(btcoexist);
+				num_of_bt_counter_chk = 0;
+			}
 		}
 	}
 
@@ -324,9 +375,12 @@ void halbtc8723d2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 {
 #if 1
 		s32 wifi_rssi = 0;
-		boolean wifi_busy = false, wifi_under_b_mode = false;
-		static u8 cck_lock_counter = 0;
-		u32 total_cnt, reg_val1, reg_val2;
+		boolean wifi_busy = false, wifi_under_b_mode = false,
+				wifi_scan = false;
+		boolean bt_idle = false, wl_idle = false;
+		static u8 cck_lock_counter = 0, wl_noisy_count0 = 0,
+				wl_noisy_count1 = 3, wl_noisy_count2 = 0;
+		u32 total_cnt, reg_val1, reg_val2, cck_cnt;
 
 		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 		btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
@@ -351,6 +405,40 @@ void halbtc8723d2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 		coex_sta->crc_err_11n_vht = btcoexist->btc_phydm_query_PHY_counter(
 								btcoexist, PHYDM_INFO_CRC32_ERROR_VHT);
 
+		cck_cnt = coex_sta->crc_ok_cck + coex_sta->crc_err_cck;
+
+		if (cck_cnt > 250) {
+			if (wl_noisy_count2 < 3)
+				wl_noisy_count2++;
+
+			if (wl_noisy_count2 == 3) {
+				wl_noisy_count0 = 0;
+				wl_noisy_count1 = 0;
+			}
+		} else if (cck_cnt < 50) {
+			if (wl_noisy_count0 < 3)
+				wl_noisy_count0++;
+
+			if (wl_noisy_count0 == 3) {
+				wl_noisy_count1 = 0;
+				wl_noisy_count2 = 0;
+			}
+		} else {
+			if (wl_noisy_count1 < 3)
+				wl_noisy_count1++;
+
+			if (wl_noisy_count1 == 3) {
+				wl_noisy_count0 = 0;
+				wl_noisy_count2 = 0;
+			}
+		}
+
+		if (wl_noisy_count2 == 3)
+			coex_sta->wl_noisy_level = 2;
+		else if (wl_noisy_count1 == 3)
+			coex_sta->wl_noisy_level = 1;
+		else
+			coex_sta->wl_noisy_level = 0;
 
 		if ((wifi_busy) && (wifi_rssi >= 30) && (!wifi_under_b_mode)) {
 			total_cnt = coex_sta->crc_ok_cck + coex_sta->crc_ok_11g +
@@ -398,64 +486,6 @@ void halbtc8723d2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 #endif
 }
 
-
-
-boolean halbtc8723d2ant_is_wifibt_status_changed(IN struct btc_coexist
-		*btcoexist)
-{
-	static boolean	pre_wifi_busy = false, pre_under_4way = false,
-			pre_bt_hs_on = false, pre_bt_off = false;
-	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
-	boolean			wifi_busy = false, under_4way = false, bt_hs_on = false;
-	boolean			wifi_connected = false;
-	u8			wifi_rssi_state = BTC_RSSI_STATE_HIGH;
-
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
-			   &wifi_connected);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
-			   &under_4way);
-
-	if (coex_sta->bt_disabled != pre_bt_off) {
-		pre_bt_off = coex_sta->bt_disabled;
-
-		if (coex_sta->bt_disabled)
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "[BTCoex], BT is disabled !!\n");
-		else
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "[BTCoex], BT is enabled !!\n");
-
-		BTC_TRACE(trace_buf);
-
-		coex_sta->bt_coex_supported_feature = 0;
-		coex_sta->bt_coex_supported_version = 0;
-		coex_sta->bt_reg_vendor_ac = 0xffff;
-		coex_sta->bt_reg_vendor_ae = 0xffff;
-		return true;
-	}
-
-	if (wifi_connected) {
-		if (wifi_busy != pre_wifi_busy) {
-			pre_wifi_busy = wifi_busy;
-			return true;
-		}
-		if (under_4way != pre_under_4way) {
-			pre_under_4way = under_4way;
-			return true;
-		}
-		if (bt_hs_on != pre_bt_hs_on) {
-			pre_bt_hs_on = bt_hs_on;
-			return true;
-		}
-
-	}
-
-	return false;
-}
-
 void halbtc8723d2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 {
 	struct  btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
@@ -551,7 +581,11 @@ void halbtc8723d2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 	else
 		bt_link_info->hid_only = false;
 
-	if (!(coex_sta->bt_info & BT_INFO_8723D_2ANT_B_CONNECTION)) {
+	if (coex_sta->bt_info & BT_INFO_8723D_2ANT_B_INQ_PAGE) {
+		coex_dm->bt_status = BT_8723D_2ANT_BT_STATUS_INQ_PAGE;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], BtInfoNotify(), BT Inq/page!!!\n");
+	} else if (!(coex_sta->bt_info & BT_INFO_8723D_2ANT_B_CONNECTION)) {
 		coex_dm->bt_status = BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
@@ -681,7 +715,7 @@ void halbtc8723d2ant_dec_bt_pwr(IN struct btc_coexist *btcoexist,
 void halbtc8723d2ant_set_fw_low_penalty_ra(IN struct btc_coexist
 		*btcoexist, IN boolean low_penalty_ra)
 {
-#if 0
+#if 1
 	u8			h2c_parameter[6] = {0};
 
 	h2c_parameter[0] = 0x6;	/* op_code, 0x6= Retry_Penalty */
@@ -710,11 +744,15 @@ void halbtc8723d2ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
 			return;
 	}
 
+	halbtc8723d2ant_set_fw_low_penalty_ra(btcoexist,
+							  coex_dm->cur_low_penalty_ra);
+
+#if 0
 	if (low_penalty_ra)
 		btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 15);
 	else
 		btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 0);
-
+#endif
 	coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
 
 #endif
@@ -748,22 +786,6 @@ void halbtc8723d2ant_bt_auto_report(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
 }
 
-void halbtc8723d2ant_sw_mechanism1(IN struct btc_coexist *btcoexist,
-			   IN boolean shrink_rx_lpf, IN boolean low_penalty_ra,
-			   IN boolean limited_dig, IN boolean bt_lna_constrain)
-{
-
-	halbtc8723d2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra);
-}
-
-void halbtc8723d2ant_sw_mechanism2(IN struct btc_coexist *btcoexist,
-			   IN boolean agc_table_shift, IN boolean adc_back_off,
-			   IN boolean sw_dac_swing, IN u32 dac_swing_lvl)
-{
-	/* halbtc8723d2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift); */
-	/* halbtc8723d2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off); */
-}
-
 void halbtc8723d2ant_write_score_board(
 	IN	struct  btc_coexist		*btcoexist,
 	IN	u16				bitpos,
@@ -800,11 +822,97 @@ void halbtc8723d2ant_post_state_to_bt(
 	IN  boolean                 state
 )
 {
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		"[BTCoex], halbtc8723d2ant_post_state_to_bt: type = %d, state =%d\n",
+		type, state);
+	BTC_TRACE(trace_buf);
 
 	halbtc8723d2ant_write_score_board(btcoexist, (u16) type, state);
 
 }
 
+boolean halbtc8723d2ant_is_wifibt_status_changed(IN struct btc_coexist
+		*btcoexist)
+{
+
+	static boolean	pre_wifi_busy = false, pre_under_4way = false,
+		pre_bt_hs_on = false, pre_bt_off = false, pre_bt_slave = false;
+	static u8 pre_hid_busy_num = 0, pre_wl_noisy_level = 0;
+	boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
+	boolean wifi_connected = false;
+	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
+			   &wifi_connected);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
+			   &under_4way);
+
+	if (coex_sta->bt_disabled != pre_bt_off) {
+		pre_bt_off = coex_sta->bt_disabled;
+
+		if (coex_sta->bt_disabled)
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], BT is disabled !!\n");
+		else
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], BT is enabled !!\n");
+
+		BTC_TRACE(trace_buf);
+
+		coex_sta->bt_coex_supported_feature = 0;
+		coex_sta->bt_coex_supported_version = 0;
+		coex_sta->bt_ble_scan_type = 0;
+		coex_sta->bt_ble_scan_para[0] = 0;
+		coex_sta->bt_ble_scan_para[1] = 0;
+		coex_sta->bt_ble_scan_para[2] = 0;
+		coex_sta->bt_reg_vendor_ac = 0xffff;
+		coex_sta->bt_reg_vendor_ae = 0xffff;
+		return true;
+	}
+
+	if (wifi_connected) {
+		if (wifi_busy != pre_wifi_busy) {
+			pre_wifi_busy = wifi_busy;
+
+			if (wifi_busy)
+				halbtc8723d2ant_post_state_to_bt(btcoexist,
+						BT_8723D_2ANT_SCOREBOARD_UNDERTEST, true);
+			else
+				halbtc8723d2ant_post_state_to_bt(btcoexist,
+						BT_8723D_2ANT_SCOREBOARD_UNDERTEST, false);
+			return true;
+		}
+		if (under_4way != pre_under_4way) {
+			pre_under_4way = under_4way;
+			return true;
+		}
+		if (bt_hs_on != pre_bt_hs_on) {
+			pre_bt_hs_on = bt_hs_on;
+			return true;
+		}
+		if (coex_sta->wl_noisy_level != pre_wl_noisy_level) {
+			pre_wl_noisy_level = coex_sta->wl_noisy_level;
+			return true;
+		}
+	}
+
+	if (!coex_sta->bt_disabled) {
+		if (coex_sta->hid_busy_num != pre_hid_busy_num) {
+			pre_hid_busy_num = coex_sta->hid_busy_num;
+			return true;
+		}
+	}
+
+	if (bt_link_info->slave_role != pre_bt_slave) {
+			pre_bt_slave = bt_link_info->slave_role;
+			return true;
+	}
+
+	return false;
+}
+
 void halbtc8723d2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 {
 	static u32		bt_disable_cnt = 0;
@@ -852,6 +960,10 @@ void halbtc8723d2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 				   &bt_disabled);
 	}
 
+	if (bt_disabled)
+		halbtc8723d2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, false);
+	else
+		halbtc8723d2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, true);
 
 	if (coex_sta->bt_disabled != bt_disabled) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -864,6 +976,8 @@ void halbtc8723d2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 
 }
 
+
+
 void halbtc8723d2ant_enable_gnt_to_gpio(IN struct btc_coexist *btcoexist,
 					boolean isenable)
 {
@@ -1003,67 +1117,66 @@ void halbtc8723d2ant_ltecoex_pathcontrol_owner(IN struct btc_coexist *btcoexist,
 void halbtc8723d2ant_ltecoex_set_gnt_bt(IN struct btc_coexist *btcoexist,
 			IN u8 control_block, IN boolean sw_control, IN u8 state)
 {
-	u32 val = 0, bit_mask;
+	u32 val = 0, val_orig = 0;
 
-	state = state & 0x1;
-	val = (sw_control) ? ((state << 1) | 0x1) : 0;
+	if (!sw_control)
+		val = 0x0;
+	else if (state & 0x1)
+		val = 0x3;
+	else
+		val = 0x1;
+
+	val_orig = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
+				0x38);
 
 	switch (control_block) {
 	case BT_8723D_2ANT_GNT_BLOCK_RFC_BB:
 	default:
-		bit_mask = 0xc000;
-		halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[15:14] */
-		bit_mask = 0x0c00;
-		halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[11:10]						 */
+		val = ((val << 14) | (val << 10)) | (val_orig & 0xffff33ff);
 		break;
 	case BT_8723D_2ANT_GNT_BLOCK_RFC:
-		bit_mask = 0xc000;
-		halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[15:14] */
+		val = (val << 14) | (val_orig & 0xffff3fff);
 		break;
 	case BT_8723D_2ANT_GNT_BLOCK_BB:
-		bit_mask = 0x0c00;
-		halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[11:10] */
+		val = (val << 10) | (val_orig & 0xfffff3ff);
 		break;
-
 	}
 
+	halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist,
+				0x38, 0xffffffff, val);
 }
 
+
 void halbtc8723d2ant_ltecoex_set_gnt_wl(IN struct btc_coexist *btcoexist,
 			IN u8 control_block, IN boolean sw_control, IN u8 state)
 {
-	u32 val = 0, bit_mask;
+	u32 val = 0, val_orig = 0;
+
+	if (!sw_control)
+		val = 0x0;
+	else if (state & 0x1)
+		val = 0x3;
+	else
+		val = 0x1;
 
-	state = state & 0x1;
-	val = (sw_control) ? ((state << 1) | 0x1) : 0;
+	val_orig = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
+				0x38);
 
 	switch (control_block) {
 	case BT_8723D_2ANT_GNT_BLOCK_RFC_BB:
 	default:
-		bit_mask = 0x3000;
-		halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[13:12] */
-		bit_mask = 0x0300;
-		halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[9:8]						 */
+		val = ((val << 12) | (val << 8)) | (val_orig & 0xffffccff);
 		break;
 	case BT_8723D_2ANT_GNT_BLOCK_RFC:
-		bit_mask = 0x3000;
-		halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[13:12] */
+		val = (val << 12) | (val_orig & 0xffffcfff);
 		break;
 	case BT_8723D_2ANT_GNT_BLOCK_BB:
-		bit_mask = 0x0300;
-		halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[9:8] */
+		val = (val << 8) | (val_orig & 0xfffffcff);
 		break;
-
 	}
 
+	halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist,
+				0x38, 0xffffffff, val);
 }
 
 void halbtc8723d2ant_ltecoex_set_coex_table(IN struct btc_coexist *btcoexist,
@@ -1115,6 +1228,40 @@ void halbtc8723d2ant_ltecoex_set_break_table(IN struct btc_coexist *btcoexist,
 
 }
 
+void halbtc8723d2ant_set_wltoggle_coex_table(IN struct btc_coexist *btcoexist,
+		IN boolean force_exec,  IN u8 interval,
+		IN u8 val0x6c4_b0, IN u8 val0x6c4_b1, IN u8 val0x6c4_b2,
+		IN u8 val0x6c4_b3)
+{
+	static u8 pre_h2c_parameter[6] = {0};
+	u8	cur_h2c_parameter[6] = {0};
+	u8 i, match_cnt = 0;
+
+	cur_h2c_parameter[0] = 0x7;	/* op_code, 0x7= wlan toggle slot*/
+
+	cur_h2c_parameter[1] = interval;
+	cur_h2c_parameter[2] = val0x6c4_b0;
+	cur_h2c_parameter[3] = val0x6c4_b1;
+	cur_h2c_parameter[4] = val0x6c4_b2;
+	cur_h2c_parameter[5] = val0x6c4_b3;
+
+	if (!force_exec) {
+		for (i = 1; i <= 5; i++) {
+			if (cur_h2c_parameter[i] != pre_h2c_parameter[i])
+				break;
+
+			match_cnt++;
+		}
+
+		if (match_cnt == 5)
+			return;
+	}
+
+	for (i = 1; i <= 5; i++)
+		pre_h2c_parameter[i] = cur_h2c_parameter[i];
+
+	btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, cur_h2c_parameter);
+}
 
 void halbtc8723d2ant_set_coex_table(IN struct btc_coexist *btcoexist,
 	    IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
@@ -1170,46 +1317,50 @@ void halbtc8723d2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 		select_table = 0x3;
 	}
 
-	switch (type) {
-	case 0:
-		halbtc8723d2ant_coex_table(btcoexist, force_exec,
-			   0xffffffff, 0xffffffff, break_table, select_table);
-		break;
-	case 1:
-		halbtc8723d2ant_coex_table(btcoexist, force_exec,
-			   0x55ff55ff, 0x5a7a5a7a, break_table, select_table);
-		break;
-	case 2:
-		halbtc8723d2ant_coex_table(btcoexist, force_exec,
-			   0x5a5a5a5a, 0x5a5a5a5a, break_table, select_table);
-		break;
-	case 3:
-		halbtc8723d2ant_coex_table(btcoexist, force_exec,
-			   0xdafadafa, 0xdafadafa, break_table, select_table);
-		break;
-	case 4:
-		halbtc8723d2ant_coex_table(btcoexist, force_exec,
-			   0xddffddff, 0xffbbffbb, break_table, select_table);
-		break;
-	case 5:
-		halbtc8723d2ant_coex_table(btcoexist, force_exec,
-			   0x5fff5fff, 0x5fff5fff, break_table, select_table);
-		break;
-	case 6:
-		halbtc8723d2ant_coex_table(btcoexist, force_exec,
-			   0x55ff55ff, 0x5a5a5a5a, break_table, select_table);
-		break;
-	case 7:
-		halbtc8723d2ant_coex_table(btcoexist, force_exec,
-			   0xa5ff55ff, 0x5a7a5a7a, break_table, select_table);
-		break;
-	case 8:
-		halbtc8723d2ant_coex_table(btcoexist, force_exec,
-			   0x55555555, 0xfafafafa, break_table, select_table);
-		break;
-	default:
-		break;
-	}
+		switch (type) {
+		case 0:
+			halbtc8723d2ant_coex_table(btcoexist, force_exec,
+				   0xffffffff, 0xffffffff, break_table, select_table);
+			break;
+		case 1:
+			halbtc8723d2ant_coex_table(btcoexist, force_exec,
+				   0x55555555, 0x5a5a5a5a, break_table, select_table);
+			break;
+		case 2:
+			halbtc8723d2ant_coex_table(btcoexist, force_exec,
+				   0x5a5a5a5a, 0x5a5a5a5a, break_table, select_table);
+			break;
+		case 3:
+			halbtc8723d2ant_coex_table(btcoexist, force_exec,
+				   0xaa555555, 0xaa5a5a5a, break_table, select_table);
+			break;
+		case 4:
+			halbtc8723d2ant_coex_table(btcoexist, force_exec,
+				   0x55555555, 0x5a5a5a5a, break_table, select_table);
+			break;
+		case 5:
+			halbtc8723d2ant_coex_table(btcoexist, force_exec,
+				   0x55555555, 0x55555555, break_table, select_table);
+			break;
+		case 6:
+			halbtc8723d2ant_coex_table(btcoexist, force_exec,
+				   0xa5555555, 0xfafafafa, break_table, select_table);
+			break;
+		case 7:
+			halbtc8723d2ant_coex_table(btcoexist, force_exec,
+				   0xa5555555, 0xaa5a5a5a, break_table, select_table);
+			break;
+		case 8:
+			halbtc8723d2ant_coex_table(btcoexist, force_exec,
+				   0xa5555555, 0xfafafafa, break_table, select_table);
+			break;
+		case 9:
+			halbtc8723d2ant_coex_table(btcoexist, force_exec,
+				   0x5a5a5a5a, 0xaaaa5aaa, break_table, select_table);
+			break;
+		default:
+			break;
+		}
 }
 
 void halbtc8723d2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
@@ -1348,6 +1499,18 @@ void halbtc8723d2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
 	u8			h2c_parameter[5] = {0};
 	u8			real_byte1 = byte1, real_byte5 = byte5;
 	boolean			ap_enable = false;
+	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+
+	if (byte5 & BIT(2))
+		coex_sta->is_tdma_btautoslot = true;
+	else
+		coex_sta->is_tdma_btautoslot = false;
+
+	/* release bt-auto slot for auto-slot hang is detected!! */
+	if (coex_sta->is_tdma_btautoslot)
+		if ((coex_sta->is_tdma_btautoslot_hang) ||
+			(bt_link_info->slave_role))
+			byte5 = byte5 & 0xfb;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
 			   &ap_enable);
@@ -1442,110 +1605,159 @@ void halbtc8723d2ant_ps_tdma(IN struct btc_coexist *btcoexist,
 	if (turn_on) {
 		switch (type) {
 		case 1:
-		default:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x10, 0x03, 0xf1,
-						      0x14 | psTdmaByte4Modify);
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+								0x10, 0x03, 0x91,
+								0x54 | psTdmaByte4Modify);
 			break;
 		case 2:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x35, 0x03, 0x71,
-						      0x11 | psTdmaByte4Modify);
+		default:
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+								0x35, 0x03, 0x11,
+								0x11 | psTdmaByte4Modify);
 			break;
 		case 3:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x3a, 0x3, 0xf1,
-						      0x10 | psTdmaByte4Modify);
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+								0x3a, 0x3, 0x91,
+								0x10 | psTdmaByte4Modify);
 			break;
 		case 4:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x21, 0x3, 0xf1,
-						      0x10 | psTdmaByte4Modify);
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+								0x21, 0x3, 0x91,
+								0x10 | psTdmaByte4Modify);
 			break;
 		case 5:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x25, 0x3, 0xf1,
-						      0x10 | psTdmaByte4Modify);
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+								0x25, 0x3, 0x91,
+								0x10 | psTdmaByte4Modify);
 			break;
 		case 6:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x10, 0x3, 0xf1,
-						      0x10 | psTdmaByte4Modify);
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+								0x10, 0x3, 0x91,
+								0x10 | psTdmaByte4Modify);
 			break;
 		case 7:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x20, 0x3, 0xf1,
-						      0x10 | psTdmaByte4Modify);
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+								0x20, 0x3, 0x91,
+								0x10 | psTdmaByte4Modify);
+			break;
+		case 8:
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+								0x15, 0x03, 0x11,
+								0x11);
+			break;
+		case 10:
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+								0x30, 0x03, 0x11,
+								0x10);
 			break;
 		case 11:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x30, 0x03, 0x71,
-						      0x10 | psTdmaByte4Modify);
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+								0x35, 0x03, 0x11,
+								0x10 | psTdmaByte4Modify);
 			break;
 		case 12:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x21, 0x03, 0x71,
-						      0x11 | psTdmaByte4Modify);
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+								0x35, 0x03, 0x11, 0x11);
 			break;
 		case 13:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x1c, 0x03, 0x71,
-						      0x10 | psTdmaByte4Modify);
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+								0x1c, 0x03, 0x11,
+								0x10 | psTdmaByte4Modify);
 			break;
 		case 14:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x30, 0x03, 0x71,
-						      0x11);
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+								0x20, 0x03, 0x11,
+								0x11);
+			break;
+		case 15:
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+								0x10, 0x03, 0x11,
+								0x14);
+			break;
+		case 16:
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+								0x10, 0x03, 0x11,
+								0x15);
+			break;
+		case 21:
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+								0x30, 0x03, 0x11,
+								0x10);
+			break;
+		case 22:
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+								0x25, 0x03, 0x11,
+								0x10);
+			break;
+		case 23:
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+								0x10, 0x03, 0x11,
+								0x10);
 			break;
 		case 51:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x10, 0x03, 0xf1,
-						      0x10 | psTdmaByte4Modify);
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+								0x10, 0x03, 0x91,
+								0x10 | psTdmaByte4Modify);
 			break;
 		case 101:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x10, 0x03, 0x70,
-						      0x14 | psTdmaByte4Modify);
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
+								0x10, 0x03, 0x10,
+								0x54 | psTdmaByte4Modify);
 			break;
 		case 102:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x35, 0x03, 0x71,
-						      0x11 | psTdmaByte4Modify);
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
+								0x35, 0x03, 0x11,
+								0x11 | psTdmaByte4Modify);
 			break;
 		case 103:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x3a, 0x3, 0x70,
-						      0x10 | psTdmaByte4Modify);
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
+								0x3a, 0x3, 0x10,
+								0x50 | psTdmaByte4Modify);
 			break;
 		case 104:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x21, 0x3, 0x70,
-						      0x10 | psTdmaByte4Modify);
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
+								0x21, 0x3, 0x10,
+								0x50 | psTdmaByte4Modify);
 			break;
 		case 105:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x25, 0x3, 0x70,
-						      0x10 | psTdmaByte4Modify);
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
+								0x25, 0x3, 0x10,
+								0x50 | psTdmaByte4Modify);
 			break;
 		case 106:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x10, 0x3, 0x70,
-						      0x10 | psTdmaByte4Modify);
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
+								0x10, 0x3, 0x10,
+								0x50 | psTdmaByte4Modify);
 			break;
 		case 107:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x20, 0x3, 0x70,
-						      0x10 | psTdmaByte4Modify);
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
+								0x20, 0x3, 0x10,
+								0x50 | psTdmaByte4Modify);
 			break;
 		case 108:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x30, 0x3, 0x70,
-						      0x10 | psTdmaByte4Modify);
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
+								0x30, 0x3, 0x10,
+								0x50 | psTdmaByte4Modify);
+			break;
+		case 109:
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x55,
+								0x10, 0x03, 0x10,
+								0x54 | psTdmaByte4Modify);
+			break;
+		case 110:
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x55,
+								0x30, 0x03, 0x10,
+								0x50 | psTdmaByte4Modify);
+			break;
+		case 111:
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x65,
+								0x25, 0x03, 0x11,
+								0x11 | psTdmaByte4Modify);
 			break;
 		case 151:
-			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x10, 0x03, 0x70,
-						      0x10 | psTdmaByte4Modify);
+			halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
+								0x10, 0x03, 0x10,
+								0x50 | psTdmaByte4Modify);
 			break;
 		}
 	} else {
@@ -1585,22 +1797,18 @@ void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 	u32				u32tmp0 = 0, u32tmp1 = 0, u32tmp2 = 0;
 	u16				u16tmp0 = 0,  u16tmp1 = 0;
 
-	coex_dm->cur_ant_pos_type = ant_pos_type;
 
-	if (!force_exec) {
-		if (coex_dm->cur_ant_pos_type == coex_dm->pre_ant_pos_type) {
+	u32tmp1 = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
+			0x38);
 
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], ********** Skip Antenna Path Setup because no change!!**********\n");
-			BTC_TRACE(trace_buf);
-			return;
-		}
+     /* To avoid indirect access fail   */
+	if (((u32tmp1 & 0xf000) >> 12) != ((u32tmp1 & 0x0f00) >> 8)) {
+		force_exec = true;
+		coex_sta->gnt_error_cnt++;
 	}
 
-	coex_dm->pre_ant_pos_type = coex_dm->cur_ant_pos_type;
 
 #if BT_8723D_2ANT_COEX_DBG
-	u32tmp1 = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
 	u32tmp2 = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
 	u16tmp0 = btcoexist->btc_read_2byte(btcoexist, 0xaa);
 	u16tmp1 = btcoexist->btc_read_2byte(btcoexist, 0x948);
@@ -1618,6 +1826,20 @@ void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 	BTC_TRACE(trace_buf);
 #endif
 
+	coex_dm->cur_ant_pos_type = ant_pos_type;
+
+	if (!force_exec) {
+		if (coex_dm->cur_ant_pos_type == coex_dm->pre_ant_pos_type) {
+
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], ********** Skip Antenna Path Setup because no change!!**********\n");
+			BTC_TRACE(trace_buf);
+			return;
+		}
+	}
+
+	coex_dm->pre_ant_pos_type = coex_dm->cur_ant_pos_type;
+
 	switch (phase) {
 	case BT_8723D_2ANT_PHASE_COEX_POWERON:
 		/* Set Path control to WL */
@@ -2190,241 +2412,229 @@ void halbtc8723d2ant_action_coex_all_off(IN struct btc_coexist *btcoexist)
 
 	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
 	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+}
 
-	/* sw all off */
-	halbtc8723d2ant_sw_mechanism1(btcoexist, false, false, false, false);
-	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
+void halbtc8723d2ant_action_bt_whql_test(IN struct btc_coexist *btcoexist)
+{
+	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
+	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
+	halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+
+	halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
 }
 
-void halbtc8723d2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
+void halbtc8723d2ant_action_bt_hs(IN struct btc_coexist *btcoexist)
 {
+	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
+	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
+	u8		wifi_rssi_state, bt_rssi_state;
 
-	boolean	wifi_connected = false;
-	boolean		scan = false, link = false, roam = false;
-	boolean			wifi_busy = false;
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
+	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
+	u8		wifi_rssi_state2, bt_rssi_state2;
+	boolean wifi_busy = false, wifi_turbo = false;
 
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
+			   &coex_sta->scan_ap_num);
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"############# [BTCoex],  scan_ap_num = %d, wl_noisy = %d\n",
+			coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
+	BTC_TRACE(trace_buf);
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
-			   &wifi_connected);
+#if 1
+	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
+		wifi_turbo = true;
+#endif
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
 
-	if (link || roam || coex_sta->wifi_is_high_pri_task) {
+	wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
+			  &prewifi_rssi_state, 2,
+			  coex_sta->wifi_coex_thres , 0);
 
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], Wifi link/roam/hi-pri-task process + BT Inq/Page!!\n");
-		BTC_TRACE(trace_buf);
+	wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
+			   &prewifi_rssi_state2, 2,
+			   coex_sta->wifi_coex_thres2 , 0);
 
-		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-						     8);
-		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
+	bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
+			coex_sta->bt_coex_thres , 0);
 
-	} else if (scan) {
+	bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
+			 coex_sta->bt_coex_thres2 , 0);
 
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Wifi scan process + BT Inq/Page!!\n");
-		BTC_TRACE(trace_buf);
+	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
+		BTC_RSSI_HIGH(bt_rssi_state)) {
 
-		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-						     8);
+		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
+		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-		if (coex_sta->bt_create_connection)
-			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						12);
-		else
-			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						11);
+		coex_dm->is_switch_to_1dot5_ant = false;
 
-	}  else if (wifi_connected) {
+		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Wifi connected + BT Inq/Page!!\n");
-		BTC_TRACE(trace_buf);
+		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
+		   BTC_RSSI_HIGH(bt_rssi_state2)) {
 
-		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-						     8);
+		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x6);
+		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
 
-		if (wifi_busy) {
+		coex_dm->is_switch_to_1dot5_ant = false;
 
-			if ((bt_link_info->a2dp_exist) &&
-			    (bt_link_info->acl_busy))
-				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 13);
-			else
-				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 11);
+		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+
+		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
 
-		} else
-			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						13);
 
 	} else {
 
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Wifi no-link + BT Inq/Page!!\n");
-		BTC_TRACE(trace_buf);
+		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
+		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+
+		coex_dm->is_switch_to_1dot5_ant = true;
 
 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 
 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
 	}
 
-	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0x18);
-	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
-
-	halbtc8723d2ant_sw_mechanism1(btcoexist, false, false, false, false);
-	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
-
 }
 
-void halbtc8723d2ant_action_wifi_link_process(IN struct btc_coexist *btcoexist)
+
+void halbtc8723d2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
 {
-	u32	u32tmp, u32tmpb;
-	u8	u8tmpa;
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
-	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0x18);
-	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+	boolean wifi_connected = false;
+	boolean wifi_scan = false, wifi_link = false, wifi_roam = false;
+	boolean wifi_busy = false;
+	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
-	halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
 
-	if ((bt_link_info->a2dp_exist) && (bt_link_info->acl_busy))
-		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
-	else
-		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
-	halbtc8723d2ant_sw_mechanism1(btcoexist, false, false, false, false);
-	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
+			   &wifi_connected);
 
-}
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam);
 
+	if ((coex_sta->bt_create_connection) && ((wifi_link) || (wifi_roam)
+		|| (wifi_scan) || (wifi_busy) || (coex_sta->wifi_is_high_pri_task))) {
 
-void halbtc8723d2ant_action_wifi_nonconnected(IN struct btc_coexist *btcoexist)
-{
-	halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], Wifi link/roam/Scan/busy/hi-pri-task + BT Inq/Page!!\n");
+		BTC_TRACE(trace_buf);
 
-	/* fw all off */
-	halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
+							 8);
 
-	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
-	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+		if ((bt_link_info->a2dp_exist) && (!bt_link_info->pan_exist))
+			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+						15);
+		else
+			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+						11);
+	}  else if ((!wifi_connected) && (!wifi_scan)) {
 
-	/* sw all off */
-	halbtc8723d2ant_sw_mechanism1(btcoexist, false, false, false, false);
-	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
-}
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], Wifi no-link + no-scan + BT Inq/Page!!\n");
+		BTC_TRACE(trace_buf);
 
-void halbtc8723d2ant_action_bt_idle(IN struct btc_coexist *btcoexist)
-{
-	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
-	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
-	u8		wifi_rssi_state, bt_rssi_state;
+		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 
-	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
-	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
-	u8		wifi_rssi_state2, bt_rssi_state2;
+		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+	} else if (bt_link_info->pan_exist) {
 
-	boolean	wifi_connected = false;
-	boolean		scan = false, link = false, roam = false;
-	boolean			wifi_busy = false;
+		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
 
-	wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
-			  &prewifi_rssi_state, 2,
-			  coex_sta->wifi_coex_thres , 0);
+		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
 
-	wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
-			   &prewifi_rssi_state2, 2,
-			   coex_sta->wifi_coex_thres2 , 0);
+	} else if (bt_link_info->a2dp_exist) {
 
-	bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
-			coex_sta->bt_coex_thres , 0);
+		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 16);
 
-	bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
-			 coex_sta->bt_coex_thres2 , 0);
+		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
+	} else {
 
+		if ((wifi_link) || (wifi_roam) || (wifi_scan) || (wifi_busy)
+			|| (coex_sta->wifi_is_high_pri_task))
+			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 21);
+		else
+			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 23);
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
+	}
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
-			   &wifi_connected);
+	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0x18);
+	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+}
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
 
-	if (scan || link || roam) {
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Wifi link process + BT Idle!!\n");
-		BTC_TRACE(trace_buf);
+void halbtc8723d2ant_action_bt_relink(IN struct btc_coexist *btcoexist)
+{
+	halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 8);
+	halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
 
-		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-						     7);
+	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0x18);
+	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+	coex_sta->bt_relink_downcount = 2;
+}
 
-		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
-	} else if (wifi_connected) {
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Wifi connected + BT Idle!!\n");
-		BTC_TRACE(trace_buf);
+void halbtc8723d2ant_action_bt_idle(IN struct btc_coexist *btcoexist)
+{
+	boolean wifi_busy = false;
 
-		if (wifi_busy) {
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
-			halbtc8723d2ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC,
-							     0);
-			/*
-						if (!BTC_RSSI_HIGH(bt_rssi_state2))
-							halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-											     2);
-						else
-							halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-											     0);
-			*/
-		} else {
-			halbtc8723d2ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC,
-							     0);
-		}
+	if (!wifi_busy) {
 
-		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+		halbtc8723d2ant_coex_table_with_type(btcoexist,
+						     NORMAL_EXEC, 8);
 
-	} else {
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Wifi no-link + BT Idle!!\n");
-		BTC_TRACE(trace_buf);
+		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
+	} else {  /* if wl busy */
 
-		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-						     0);
+		if (BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
+			coex_dm->bt_status) {
 
-		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+			halbtc8723d2ant_coex_table_with_type(btcoexist,
+								 NORMAL_EXEC, 0);
+
+			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+	   } else {
+
+			halbtc8723d2ant_coex_table_with_type(btcoexist,
+									NORMAL_EXEC, 8);
+			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							12);
+		}
 	}
 
 	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0x18);
 	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-	halbtc8723d2ant_sw_mechanism1(btcoexist, false, false, false, false);
-	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
-
 }
 
 
+
 /* SCO only or SCO+PAN(HS) */
 void halbtc8723d2ant_action_sco(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
-	u8		wifi_rssi_state, bt_rssi_state;
+	u8	wifi_rssi_state, bt_rssi_state;
 
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
-	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean			wifi_busy = false;
+	u8	wifi_rssi_state2, bt_rssi_state2;
+	boolean	wifi_busy = false;
+	u32  wifi_bw = 1;
 
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
+			   &wifi_bw);
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
@@ -2444,7 +2654,7 @@ void halbtc8723d2ant_action_sco(IN struct btc_coexist *btcoexist)
 
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
-	    BTC_RSSI_HIGH(bt_rssi_state)) {
+		BTC_RSSI_HIGH(bt_rssi_state)) {
 
 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
@@ -2461,18 +2671,11 @@ void halbtc8723d2ant_action_sco(IN struct btc_coexist *btcoexist)
 
 		coex_dm->is_switch_to_1dot5_ant = false;
 
-		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
-
-		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
+								 1);
+		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 8);
 	}
 
-
-	/* sw mechanism */
-	halbtc8723d2ant_sw_mechanism1(btcoexist, false, true,
-				      false, false);
-	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false,
-				      false, 0x18);
-
 }
 
 
@@ -2485,10 +2688,12 @@ void halbtc8723d2ant_action_hid(IN struct btc_coexist *btcoexist)
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
 	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean			wifi_busy = false;
+	boolean wifi_busy = false;
+	u32  wifi_bw = 1;
 
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,  &wifi_bw);
 
 	wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
 			  &prewifi_rssi_state, 2,
@@ -2506,7 +2711,7 @@ void halbtc8723d2ant_action_hid(IN struct btc_coexist *btcoexist)
 
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
-	    BTC_RSSI_HIGH(bt_rssi_state)) {
+		BTC_RSSI_HIGH(bt_rssi_state)) {
 
 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
@@ -2523,20 +2728,49 @@ void halbtc8723d2ant_action_hid(IN struct btc_coexist *btcoexist)
 
 		coex_dm->is_switch_to_1dot5_ant = false;
 
-		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
+		/*for 4/18 hid */
+		if (coex_sta->hid_busy_num >= 2) {
+			if (wifi_bw == 0) {   /* if 11bg mode */
+
+				 halbtc8723d2ant_coex_table_with_type(btcoexist,
+								 NORMAL_EXEC, 8);
+				 halbtc8723d2ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x1, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
+				 halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							111);
+			} else {
 
-		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
-	}
+			  if (wifi_busy) {
+					  halbtc8723d2ant_coex_table_with_type(btcoexist,
+									 NORMAL_EXEC, 8);
+					  halbtc8723d2ant_set_wltoggle_coex_table(btcoexist,
+									 NORMAL_EXEC,
+									 0x2, 0xaa,
+									 0x5a, 0xaa,
+									 0xaa);
+					  halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+									 111);
+				} else {
 
+					  halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
+								 3);
+					  halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
+				}
+			}
+		} else {
 
-	/* sw mechanism */
-	halbtc8723d2ant_sw_mechanism1(btcoexist, false, true,
-				      false, false);
-	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false,
-				      false, 0x18);
+			halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
+								 3);
+			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
+		}
+	}
 
 }
 
+
 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
 void halbtc8723d2ant_action_a2dp(IN struct btc_coexist *btcoexist)
 {
@@ -2547,10 +2781,21 @@ void halbtc8723d2ant_action_a2dp(IN struct btc_coexist *btcoexist)
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
 	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean			wifi_busy = false;
+	boolean wifi_busy = false, wifi_turbo = false;
 
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
+			   &coex_sta->scan_ap_num);
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"############# [BTCoex],  scan_ap_num = %d, wl_noisy = %d\n",
+			coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
+	BTC_TRACE(trace_buf);
+
+#if 1
+	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
+		wifi_turbo = true;
+#endif
 
 	wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
 			  &prewifi_rssi_state, 2,
@@ -2568,7 +2813,7 @@ void halbtc8723d2ant_action_a2dp(IN struct btc_coexist *btcoexist)
 
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
-	    BTC_RSSI_HIGH(bt_rssi_state)) {
+		BTC_RSSI_HIGH(bt_rssi_state)) {
 
 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
@@ -2581,24 +2826,19 @@ void halbtc8723d2ant_action_a2dp(IN struct btc_coexist *btcoexist)
 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
 
-		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x6);
 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
 
 		coex_dm->is_switch_to_1dot5_ant = false;
 
 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 
-		if (wifi_busy) {
-			if (coex_sta->is_setupLink)
-				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 51);
-			else
-				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+		if (wifi_busy)
+			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
 							true, 1);
-		} else
-
+		else
 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						2);
+						16);
 	} else {
 
 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
@@ -2606,29 +2846,40 @@ void halbtc8723d2ant_action_a2dp(IN struct btc_coexist *btcoexist)
 
 		coex_dm->is_switch_to_1dot5_ant = true;
 
-		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
+		if ((coex_sta->bt_relink_downcount != 0)
+			&& (wifi_busy)) {
 
-		if (wifi_busy) {
-			if (coex_sta->is_setupLink)
-				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 151);
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"############# [BTCoex],  BT Re-Link + A2DP + WL busy\n");
+			BTC_TRACE(trace_buf);
+
+			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+			halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
+
+		} else {
+
+			if (wifi_turbo)
+				halbtc8723d2ant_coex_table_with_type(btcoexist,
+									 NORMAL_EXEC, 6);
 			else
+				halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
+									 7);
+
+			if (wifi_busy)
 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 101);
-		} else
-			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						102);
+								true, 101);
+			else
+				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							16);
+				/*halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							102);*/
+		}
 
 	}
 
-	/* sw mechanism */
-	halbtc8723d2ant_sw_mechanism1(btcoexist, false, true,
-				      false, false);
-	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false,
-				      false, 0x18);
-
 }
 
+
 void halbtc8723d2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -2638,10 +2889,21 @@ void halbtc8723d2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
 	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean			wifi_busy = false;
+	boolean wifi_busy = false, wifi_turbo = false;
 
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
+			   &coex_sta->scan_ap_num);
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"############# [BTCoex],  scan_ap_num = %d, wl_noisy = %d\n",
+			coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
+	BTC_TRACE(trace_buf);
+
+#if 1
+	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
+		wifi_turbo = true;
+#endif
 
 	wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
 			  &prewifi_rssi_state, 2,
@@ -2658,23 +2920,20 @@ void halbtc8723d2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
 			 coex_sta->bt_coex_thres2 , 0);
 
 #if 0
-	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
-	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
+	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
+	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
 	coex_dm->is_switch_to_1dot5_ant = false;
 
-	halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+	halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 
-	if (wifi_busy)
-		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
-	else
-		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 4);
+	halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
 #endif
 
 
 #if 1
 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
-	    BTC_RSSI_HIGH(bt_rssi_state)) {
+		BTC_RSSI_HIGH(bt_rssi_state)) {
 
 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
@@ -2687,7 +2946,7 @@ void halbtc8723d2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
 
-		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x6);
 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
 
 		coex_dm->is_switch_to_1dot5_ant = false;
@@ -2707,7 +2966,12 @@ void halbtc8723d2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
 
 		coex_dm->is_switch_to_1dot5_ant = true;
 
-		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
+		if (wifi_turbo)
+			halbtc8723d2ant_coex_table_with_type(btcoexist,
+								 NORMAL_EXEC, 6);
+		else
+			halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
+								 7);
 
 		if (wifi_busy)
 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
@@ -2720,90 +2984,8 @@ void halbtc8723d2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
 
 #endif
 
-
-	/* sw mechanism */
-	halbtc8723d2ant_sw_mechanism1(btcoexist, false, true,
-				      false, false);
-	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false,
-				      false, 0x18);
-
-}
-
-
-/* PAN(HS) only */
-void halbtc8723d2ant_action_pan_hs(IN struct btc_coexist *btcoexist)
-{
-	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
-	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
-	u8		wifi_rssi_state, bt_rssi_state;
-
-	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
-	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
-	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean			wifi_busy = false;
-
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
-
-	wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
-			  &prewifi_rssi_state, 2,
-			  coex_sta->wifi_coex_thres , 0);
-
-	wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
-			   &prewifi_rssi_state2, 2,
-			   coex_sta->wifi_coex_thres2 , 0);
-
-	bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
-			coex_sta->bt_coex_thres , 0);
-
-	bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
-			 coex_sta->bt_coex_thres2 , 0);
-
-	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
-	    BTC_RSSI_HIGH(bt_rssi_state)) {
-
-		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
-		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
-
-		coex_dm->is_switch_to_1dot5_ant = false;
-
-		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-
-		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
-	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
-		   BTC_RSSI_HIGH(bt_rssi_state2)) {
-
-		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
-		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
-
-		coex_dm->is_switch_to_1dot5_ant = false;
-
-		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-
-		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
-
-
-	} else {
-
-		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
-		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
-
-		coex_dm->is_switch_to_1dot5_ant = true;
-
-		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-
-		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
-	}
-
-
-	/* sw mechanism */
-	halbtc8723d2ant_sw_mechanism1(btcoexist, false, true,
-				      false, false);
-	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false,
-				      false, 0x18);
 }
 
-
 void halbtc8723d2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -2813,9 +2995,11 @@ void halbtc8723d2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
 	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean			wifi_busy = false;
-
+	boolean wifi_busy = false;
+	u32 wifi_bw = 1;
 
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
+			   &wifi_bw);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
 	wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
@@ -2834,7 +3018,7 @@ void halbtc8723d2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
 
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
-	    BTC_RSSI_HIGH(bt_rssi_state)) {
+		BTC_RSSI_HIGH(bt_rssi_state)) {
 
 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
@@ -2842,30 +3026,23 @@ void halbtc8723d2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
 		coex_dm->is_switch_to_1dot5_ant = false;
 
 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-
 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
 
-		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x6);
 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
 
 		coex_dm->is_switch_to_1dot5_ant = false;
 
 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 
-		if (wifi_busy) {
-			if (coex_sta->is_setupLink)
-				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 51);
-			else
-				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+		if (wifi_busy)
+			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
 							true, 1);
-		} else
+		else
 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						2);
-
-
+						16);
 	} else {
 
 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
@@ -2873,28 +3050,47 @@ void halbtc8723d2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
 
 		coex_dm->is_switch_to_1dot5_ant = true;
 
-		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+		if ((coex_sta->bt_relink_downcount != 0)
+			&& (wifi_busy)) {
 
-		if (wifi_busy) {
-			if (coex_sta->is_setupLink)
-				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 151);
-			else
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"############# [BTCoex],  BT Re-Link + A2DP + WL busy\n");
+			BTC_TRACE(trace_buf);
+
+			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+			halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
+		} else if (wifi_busy) {
+			if (coex_sta->hid_busy_num >= 2) {
+				halbtc8723d2ant_coex_table_with_type(btcoexist,
+								 NORMAL_EXEC, 8);
+				if (wifi_bw == 0)  /*11bg mode */
+					halbtc8723d2ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x1, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
+				else
+					halbtc8723d2ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x2, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
+					halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							109);
+			} else {
+				halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
 							true, 101);
-		} else
+			}
+		} else {
+			halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
+								 1);
 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						102);
+						16);
+		}
 
 	}
 
-
-	/* sw mechanism */
-	halbtc8723d2ant_sw_mechanism1(btcoexist, false, true,
-				      false, false);
-	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false,
-				      false, 0x18);
-
 }
 
 
@@ -2907,10 +3103,22 @@ void halbtc8723d2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
 	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean			wifi_busy = false;
+	boolean wifi_busy = false, wifi_turbo = false;
 
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
+			   &coex_sta->scan_ap_num);
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"############# [BTCoex],  scan_ap_num = %d, wl_noisy = %d\n",
+			coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
+	BTC_TRACE(trace_buf);
+
+#if 1
+	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
+		wifi_turbo = true;
+#endif
+
 
 	wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
 			  &prewifi_rssi_state, 2,
@@ -2928,7 +3136,7 @@ void halbtc8723d2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
 
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
-	    BTC_RSSI_HIGH(bt_rssi_state)) {
+		BTC_RSSI_HIGH(bt_rssi_state)) {
 
 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
@@ -2941,7 +3149,7 @@ void halbtc8723d2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
 
-		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x6);
 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
 
 		coex_dm->is_switch_to_1dot5_ant = false;
@@ -2951,7 +3159,7 @@ void halbtc8723d2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
 		if (wifi_busy) {
 
 			if ((coex_sta->a2dp_bit_pool > 40) &&
-			    (coex_sta->a2dp_bit_pool < 255))
+				(coex_sta->a2dp_bit_pool < 255))
 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
 							true, 7);
 			else
@@ -2968,12 +3176,17 @@ void halbtc8723d2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
 
 		coex_dm->is_switch_to_1dot5_ant = true;
 
-		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
+		if (wifi_turbo)
+			halbtc8723d2ant_coex_table_with_type(btcoexist,
+								 NORMAL_EXEC, 6);
+		else
+			halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
+								 7);
 
 		if (wifi_busy) {
 
 			if ((coex_sta->a2dp_bit_pool > 40) &&
-			    (coex_sta->a2dp_bit_pool < 255))
+				(coex_sta->a2dp_bit_pool < 255))
 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
 							true, 107);
 			else
@@ -2985,17 +3198,9 @@ void halbtc8723d2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
 
 	}
 
-
-	/* sw mechanism */
-	halbtc8723d2ant_sw_mechanism1(btcoexist, false, true,
-				      false, false);
-	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false,
-				      false, 0x18);
-
 }
 
 
-
 /* PAN(EDR)+A2DP */
 void halbtc8723d2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
 {
@@ -3006,16 +3211,22 @@ void halbtc8723d2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
 	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean	wifi_busy = false, wifi_turbo = false;
+	boolean wifi_busy = false, wifi_turbo = false;
 
 
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
+			   &coex_sta->scan_ap_num);
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"############# [BTCoex],  scan_ap_num = %d, wl_noisy = %d\n",
+			coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
+	BTC_TRACE(trace_buf);
+
 #if 1
-	if ((wifi_busy) && (coex_sta->scan_ap_num <= 4))
+	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
 		wifi_turbo = true;
 #endif
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
-
 
 	wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
 			  &prewifi_rssi_state, 2,
@@ -3032,7 +3243,7 @@ void halbtc8723d2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
 			 coex_sta->bt_coex_thres2 , 0);
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
-	    BTC_RSSI_HIGH(bt_rssi_state)) {
+		BTC_RSSI_HIGH(bt_rssi_state)) {
 
 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
@@ -3040,12 +3251,11 @@ void halbtc8723d2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
 		coex_dm->is_switch_to_1dot5_ant = false;
 
 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-
 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
 
-		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x6);
 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
 
 		coex_dm->is_switch_to_1dot5_ant = false;
@@ -3055,8 +3265,8 @@ void halbtc8723d2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
 		if (wifi_busy) {
 
 			if (((coex_sta->a2dp_bit_pool > 40) &&
-			     (coex_sta->a2dp_bit_pool < 255)) ||
-			    (!coex_sta->is_A2DP_3M))
+				 (coex_sta->a2dp_bit_pool < 255)) ||
+				(!coex_sta->is_A2DP_3M))
 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
 							true, 7);
 			else
@@ -3072,12 +3282,17 @@ void halbtc8723d2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
 
 		coex_dm->is_switch_to_1dot5_ant = true;
 
-		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
+		if (wifi_turbo)
+			halbtc8723d2ant_coex_table_with_type(btcoexist,
+								 NORMAL_EXEC, 6);
+		else
+			halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
+								 7);
 
 		if (wifi_busy) {
 
 			if ((coex_sta->a2dp_bit_pool > 40) &&
-			    (coex_sta->a2dp_bit_pool < 255))
+				(coex_sta->a2dp_bit_pool < 255))
 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
 							true, 107);
 			else if (wifi_turbo)
@@ -3092,15 +3307,9 @@ void halbtc8723d2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
 
 	}
 
-
-	/* sw mechanism */
-	halbtc8723d2ant_sw_mechanism1(btcoexist, false, true,
-				      false, false);
-	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false,
-				      false, 0x18);
-
 }
 
+
 void halbtc8723d2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -3109,9 +3318,12 @@ void halbtc8723d2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
 
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
-	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean			wifi_busy = false;
+	u8	wifi_rssi_state2, bt_rssi_state2;
+	boolean	wifi_busy = false;
+	u32 wifi_bw = 1;
 
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
+			   &wifi_bw);
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
@@ -3131,7 +3343,7 @@ void halbtc8723d2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
 
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
-	    BTC_RSSI_HIGH(bt_rssi_state)) {
+		BTC_RSSI_HIGH(bt_rssi_state)) {
 
 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
@@ -3139,12 +3351,11 @@ void halbtc8723d2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
 		coex_dm->is_switch_to_1dot5_ant = false;
 
 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-
 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
 
-		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x6);
 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
 
 		coex_dm->is_switch_to_1dot5_ant = false;
@@ -3152,15 +3363,11 @@ void halbtc8723d2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 
 		if (wifi_busy)
-
 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
 						3);
 		else
-
 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
 						4);
-
-
 	} else {
 
 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
@@ -3168,40 +3375,56 @@ void halbtc8723d2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
 
 		coex_dm->is_switch_to_1dot5_ant = true;
 
-		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
-
-		if (wifi_busy)
-
-			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						103);
-		else
+		if (coex_sta->hid_busy_num >= 2) {
 
+			halbtc8723d2ant_coex_table_with_type(btcoexist,
+							 NORMAL_EXEC, 8);
+			if (wifi_bw == 0)  /*11bg mode */
+				halbtc8723d2ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x1, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
+			else
+				halbtc8723d2ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x2, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						104);
+						110);
+		} else {
 
-	}
+			halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
 
+			if (wifi_busy)
+				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							103);
+			else
+				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							104);
+		}
 
-	/* sw mechanism */
-	halbtc8723d2ant_sw_mechanism1(btcoexist, false, true,
-				      false, false);
-	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false,
-				      false, 0x18);
+	}
 
 }
 
+
 /* HID+A2DP+PAN(EDR) */
 void halbtc8723d2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
-	u8		wifi_rssi_state, bt_rssi_state;
+	u8	wifi_rssi_state, bt_rssi_state;
 
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
-	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean			wifi_busy = false;
+	u8	wifi_rssi_state2, bt_rssi_state2;
+	boolean	wifi_busy = false;
+	u32 wifi_bw = 1;
 
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
+			   &wifi_bw);
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
@@ -3221,7 +3444,7 @@ void halbtc8723d2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
 
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
-	    BTC_RSSI_HIGH(bt_rssi_state)) {
+		BTC_RSSI_HIGH(bt_rssi_state)) {
 
 		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
@@ -3229,12 +3452,11 @@ void halbtc8723d2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
 		coex_dm->is_switch_to_1dot5_ant = false;
 
 		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-
 		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
 
-		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+		halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x6);
 		halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
 
 		coex_dm->is_switch_to_1dot5_ant = false;
@@ -3244,8 +3466,8 @@ void halbtc8723d2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
 		if (wifi_busy) {
 
 			if (((coex_sta->a2dp_bit_pool > 40) &&
-			     (coex_sta->a2dp_bit_pool < 255)) ||
-			    (!coex_sta->is_A2DP_3M))
+				 (coex_sta->a2dp_bit_pool < 255)) ||
+				(!coex_sta->is_A2DP_3M))
 				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
 							true, 7);
 			else
@@ -3261,75 +3483,193 @@ void halbtc8723d2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
 
 		coex_dm->is_switch_to_1dot5_ant = true;
 
-		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
-
-		if (wifi_busy) {
-
-			if ((coex_sta->a2dp_bit_pool > 40) &&
-			    (coex_sta->a2dp_bit_pool < 255))
-				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 107);
+		if (coex_sta->hid_busy_num >= 2) {
+			halbtc8723d2ant_coex_table_with_type(btcoexist,
+							 NORMAL_EXEC, 8);
+			if (wifi_bw == 0)  /*11bg mode */
+				halbtc8723d2ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x1, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
 			else
-				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 105);
-		} else
+				halbtc8723d2ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x2, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
 			halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						106);
-	}
+						110);
+		} else {
+			halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
 
-	/* sw mechanism */
-	halbtc8723d2ant_sw_mechanism1(btcoexist, false, true,
-				      false, false);
-	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false,
-				      false, 0x18);
+			if (wifi_busy) {
 
-}
+				if ((coex_sta->a2dp_bit_pool > 40) &&
+					(coex_sta->a2dp_bit_pool < 255))
+					halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+								true, 107);
+				else
+					halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+								true, 105);
+			} else
+				halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							106);
+		}
+	}
 
+}
 
 
-void halbtc8723d2ant_action_bt_whck_test(IN struct btc_coexist *btcoexist)
+void halbtc8723d2ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
 {
 	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
 	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-	/* sw mechanism all off */
-	halbtc8723d2ant_sw_mechanism1(btcoexist, false, false, false, false);
-	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
-
+	/* hw all off */
 	halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 
 	halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
 }
 
-void halbtc8723d2ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
+void halbtc8723d2ant_action_wifi_linkscan_process(IN struct btc_coexist *btcoexist)
 {
-	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
+	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+
+	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0x18);
 	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-	/* sw mechanism all off */
-	halbtc8723d2ant_sw_mechanism1(btcoexist, false, false, false, false);
-	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
+	halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
 
-	/* hw all off */
+	if (bt_link_info->pan_exist) {
+
+		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
+
+		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
+
+	} else if (bt_link_info->a2dp_exist) {
+
+		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 16);
+
+		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
+	} else {
+
+		halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 21);
+
+		halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
+	}
+
+}
+
+void halbtc8723d2ant_action_wifi_not_connected(IN struct btc_coexist *btcoexist)
+{
 	halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 
+	/* fw all off */
 	halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+
+	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
+	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 }
 
-void halbtc8723d2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
+void halbtc8723d2ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
 {
-	u8				algorithm = 0;
-	u32				num_of_wifi_link = 0;
-	u32				wifi_link_status = 0;
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean				miracast_plus_bt = false;
-	boolean				scan = false, link = false, roam = false,
-					wifi_connected = false;
+	switch (coex_dm->cur_algorithm) {
+
+	case BT_8723D_2ANT_COEX_ALGO_SCO:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], Action 2-Ant, algorithm = SCO.\n");
+		BTC_TRACE(trace_buf);
+		halbtc8723d2ant_action_sco(btcoexist);
+		break;
+	case BT_8723D_2ANT_COEX_ALGO_HID:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], Action 2-Ant, algorithm = HID.\n");
+		BTC_TRACE(trace_buf);
+		halbtc8723d2ant_action_hid(btcoexist);
+		break;
+	case BT_8723D_2ANT_COEX_ALGO_A2DP:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], Action 2-Ant, algorithm = A2DP.\n");
+		BTC_TRACE(trace_buf);
+		halbtc8723d2ant_action_a2dp(btcoexist);
+		break;
+	case BT_8723D_2ANT_COEX_ALGO_A2DP_PANHS:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
+		BTC_TRACE(trace_buf);
+		halbtc8723d2ant_action_a2dp_pan_hs(btcoexist);
+		break;
+	case BT_8723D_2ANT_COEX_ALGO_PANEDR:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n");
+		BTC_TRACE(trace_buf);
+		halbtc8723d2ant_action_pan_edr(btcoexist);
+		break;
+	case BT_8723D_2ANT_COEX_ALGO_PANEDR_A2DP:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n");
+		BTC_TRACE(trace_buf);
+		halbtc8723d2ant_action_pan_edr_a2dp(btcoexist);
+		break;
+	case BT_8723D_2ANT_COEX_ALGO_PANEDR_HID:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
+		BTC_TRACE(trace_buf);
+		halbtc8723d2ant_action_pan_edr_hid(btcoexist);
+		break;
+	case BT_8723D_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
+		BTC_TRACE(trace_buf);
+		halbtc8723d2ant_action_hid_a2dp_pan_edr(
+			btcoexist);
+		break;
+	case BT_8723D_2ANT_COEX_ALGO_HID_A2DP:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n");
+		BTC_TRACE(trace_buf);
+		halbtc8723d2ant_action_hid_a2dp(btcoexist);
+		break;
+	case BT_8723D_2ANT_COEX_ALGO_NOPROFILEBUSY:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], Action 2-Ant, algorithm = No-Profile busy.\n");
+		BTC_TRACE(trace_buf);
+		halbtc8723d2ant_action_bt_idle(btcoexist);
+		break;
+	default:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n");
+		BTC_TRACE(trace_buf);
+		halbtc8723d2ant_action_coex_all_off(btcoexist);
+		break;
+		}
+
+	 coex_dm->pre_algorithm = coex_dm->cur_algorithm;
+
+}
 
 
+void halbtc8723d2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
+{
+	u8	algorithm = 0;
+	u32	num_of_wifi_link = 0;
+	u32	wifi_link_status = 0;
+	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+	boolean miracast_plus_bt = false;
+	boolean	scan = false, link = false, roam = false,
+			under_4way = false,
+			wifi_connected = false, wifi_under_5g = false,
+			bt_hs_on = false;
+
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
+			   &under_4way);
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "[BTCoex], RunCoexistMechanism()===>\n");
+			"[BTCoex], RunCoexistMechanism()===>\n");
 	BTC_TRACE(trace_buf);
 
 	if (btcoexist->manual_control) {
@@ -3348,7 +3688,7 @@ void halbtc8723d2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 
 	if (coex_sta->under_ips) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], wifi is under IPS !!!\n");
+				"[BTCoex], wifi is under IPS !!!\n");
 		BTC_TRACE(trace_buf);
 		return;
 	}
@@ -3369,15 +3709,15 @@ void halbtc8723d2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 
 	if (coex_sta->bt_whck_test) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], BT is under WHCK TEST!!!\n");
+				"[BTCoex], BT is under WHCK TEST!!!\n");
 		BTC_TRACE(trace_buf);
-		halbtc8723d2ant_action_bt_whck_test(btcoexist);
+		halbtc8723d2ant_action_bt_whql_test(btcoexist);
 		return;
 	}
 
 	if (coex_sta->bt_disabled) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], BT is disabled!!!\n");
+				 "[BTCoex], BT is disabled!!!\n");
 		BTC_TRACE(trace_buf);
 		halbtc8723d2ant_action_coex_all_off(btcoexist);
 		return;
@@ -3385,21 +3725,16 @@ void halbtc8723d2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 
 	if (coex_sta->c2h_bt_inquiry_page) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], BT is under inquiry/page scan !!\n");
+				"[BTCoex], BT is under inquiry/page scan !!\n");
 		BTC_TRACE(trace_buf);
 		halbtc8723d2ant_action_bt_inquiry(btcoexist);
 		return;
 	}
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
-
-	if (scan || link || roam) {
+	if (coex_sta->is_setupLink) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], WiFi is under Link Process !!\n");
-		BTC_TRACE(trace_buf);
-		halbtc8723d2ant_action_wifi_link_process(btcoexist);
+				 "[BTCoex], BT is re-link !!!\n");
+		halbtc8723d2ant_action_bt_relink(btcoexist);
 		return;
 	}
 
@@ -3409,10 +3744,10 @@ void halbtc8723d2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 	num_of_wifi_link = wifi_link_status >> 16;
 
 	if ((num_of_wifi_link >= 2) ||
-	    (wifi_link_status & WIFI_P2P_GO_CONNECTED)) {
+		(wifi_link_status & WIFI_P2P_GO_CONNECTED)) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"############# [BTCoex],  Multi-Port num_of_wifi_link = %d, wifi_link_status = 0x%x\n",
-			    num_of_wifi_link, wifi_link_status);
+				num_of_wifi_link, wifi_link_status);
 		BTC_TRACE(trace_buf);
 
 		if (bt_link_info->bt_link_exist)
@@ -3422,7 +3757,20 @@ void halbtc8723d2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 
 		btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
 				   &miracast_plus_bt);
-		halbtc8723d2ant_action_wifi_multi_port(btcoexist);
+
+		if (scan || link || roam || under_4way) {
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], scan = %d, link = %d, roam = %d 4way = %d!!!\n",
+				    scan, link, roam, under_4way);
+			BTC_TRACE(trace_buf);
+
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], wifi is under linkscan process + Multi-Port !!\n");
+			BTC_TRACE(trace_buf);
+
+			halbtc8723d2ant_action_wifi_linkscan_process(btcoexist);
+		} else
+			halbtc8723d2ant_action_wifi_multi_port(btcoexist);
 
 		return;
 	} else {
@@ -3431,141 +3779,71 @@ void halbtc8723d2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 				   &miracast_plus_bt);
 	}
 
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
+
+	if (bt_hs_on) {
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					"############# [BTCoex],  BT Is hs\n");
+			BTC_TRACE(trace_buf);
+			halbtc8723d2ant_action_bt_hs(btcoexist);
+			return;
+	}
+
+	if ((BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
+			coex_dm->bt_status) ||
+		   (BT_8723D_2ANT_BT_STATUS_CONNECTED_IDLE ==
+			coex_dm->bt_status)) {
+
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], Action 2-Ant, bt idle!!.\n");
+		BTC_TRACE(trace_buf);
+
+		halbtc8723d2ant_action_bt_idle(btcoexist);
+		return;
+	}
 
 	algorithm = halbtc8723d2ant_action_algorithm(btcoexist);
 	coex_dm->cur_algorithm = algorithm;
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Algorithm = %d\n",
-		    coex_dm->cur_algorithm);
+			coex_dm->cur_algorithm);
 	BTC_TRACE(trace_buf);
 
-
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
 			   &wifi_connected);
 
-	if (!wifi_connected) {
-
+	if (scan || link || roam || under_4way) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Action 2-Ant, wifi non-connected!!.\n");
+				"[BTCoex], WiFi is under Link Process !!\n");
 		BTC_TRACE(trace_buf);
-		halbtc8723d2ant_action_wifi_nonconnected(btcoexist);
-
-	} else if ((BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
-		    coex_dm->bt_status) ||
-		   (BT_8723D_2ANT_BT_STATUS_CONNECTED_IDLE ==
-		    coex_dm->bt_status)) {
+		halbtc8723d2ant_action_wifi_linkscan_process(btcoexist);
+	} else if (wifi_connected) {
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Action 2-Ant, bt idle!!.\n");
+				"[BTCoex], Action 2-Ant, wifi connected!!.\n");
 		BTC_TRACE(trace_buf);
-
-		halbtc8723d2ant_action_bt_idle(btcoexist);
+		halbtc8723d2ant_action_wifi_connected(btcoexist);
 
 	} else {
 
-		if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], pre_algorithm=%d, cur_algorithm=%d\n",
-				coex_dm->pre_algorithm, coex_dm->cur_algorithm);
-			BTC_TRACE(trace_buf);
-		}
-
-		switch (coex_dm->cur_algorithm) {
-
-		case BT_8723D_2ANT_COEX_ALGO_SCO:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = SCO.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8723d2ant_action_sco(btcoexist);
-			break;
-		case BT_8723D_2ANT_COEX_ALGO_HID:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = HID.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8723d2ant_action_hid(btcoexist);
-			break;
-		case BT_8723D_2ANT_COEX_ALGO_A2DP:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = A2DP.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8723d2ant_action_a2dp(btcoexist);
-			break;
-		case BT_8723D_2ANT_COEX_ALGO_A2DP_PANHS:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
-			BTC_TRACE(trace_buf);
-			halbtc8723d2ant_action_a2dp_pan_hs(btcoexist);
-			break;
-		case BT_8723D_2ANT_COEX_ALGO_PANEDR:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n");
-			BTC_TRACE(trace_buf);
-			halbtc8723d2ant_action_pan_edr(btcoexist);
-			break;
-		case BT_8723D_2ANT_COEX_ALGO_PANHS:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = HS mode.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8723d2ant_action_pan_hs(btcoexist);
-			break;
-		case BT_8723D_2ANT_COEX_ALGO_PANEDR_A2DP:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8723d2ant_action_pan_edr_a2dp(btcoexist);
-			break;
-		case BT_8723D_2ANT_COEX_ALGO_PANEDR_HID:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8723d2ant_action_pan_edr_hid(btcoexist);
-			break;
-		case BT_8723D_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8723d2ant_action_hid_a2dp_pan_edr(
-				btcoexist);
-			break;
-		case BT_8723D_2ANT_COEX_ALGO_HID_A2DP:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8723d2ant_action_hid_a2dp(btcoexist);
-			break;
-		case BT_8723D_2ANT_COEX_ALGO_NOPROFILEBUSY:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = No-Profile busy.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8723d2ant_action_bt_idle(btcoexist);
-			break;
-		default:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n");
-			BTC_TRACE(trace_buf);
-			halbtc8723d2ant_action_coex_all_off(btcoexist);
-			break;
-		}
-		coex_dm->pre_algorithm = coex_dm->cur_algorithm;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], Action 2-Ant, wifi not-connected!!.\n");
+		BTC_TRACE(trace_buf);
+		halbtc8723d2ant_action_wifi_not_connected(btcoexist);
 	}
 }
 
+
 void halbtc8723d2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
 {
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], Coex Mechanism Init!!\n");
 	BTC_TRACE(trace_buf);
 
-	halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-
-	/* fw all off */
-	halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
-
 	halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
 	halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
 	/* sw all off */
-	halbtc8723d2ant_sw_mechanism1(btcoexist, false, false, false, false);
-	halbtc8723d2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
+	halbtc8723d2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, false);
 
 	coex_sta->pop_event_cnt = 0;
 	coex_sta->cnt_RemoteNameReq = 0;
@@ -3585,6 +3863,7 @@ void halbtc8723d2ant_init_hw_config(IN struct btc_coexist *btcoexist,
 	u32	vendor;
 	u32	u32tmp0 = 0, u32tmp1 = 0, u32tmp2 = 0;
 	u16 u16tmp1 = 0;
+	u8 i = 0;
 
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -3614,8 +3893,17 @@ void halbtc8723d2ant_init_hw_config(IN struct btc_coexist *btcoexist,
 
 	coex_sta->bt_coex_supported_feature = 0;
 	coex_sta->bt_coex_supported_version = 0;
+	coex_sta->bt_ble_scan_type = 0;
+	coex_sta->bt_ble_scan_para[0] = 0;
+	coex_sta->bt_ble_scan_para[1] = 0;
+	coex_sta->bt_ble_scan_para[2] = 0;
 	coex_sta->bt_reg_vendor_ac = 0xffff;
 	coex_sta->bt_reg_vendor_ae = 0xffff;
+	coex_sta->gnt_error_cnt = 0;
+	coex_sta->bt_relink_downcount = 0;
+
+	for (i = 0; i <= 9; i++)
+		coex_sta->bt_afh_map[i] = 0;
 
 #if 0
 	btcoexist->btc_get(btcoexist, BTC_GET_U4_VENDOR, &vendor);
@@ -3653,10 +3941,12 @@ void halbtc8723d2ant_init_hw_config(IN struct btc_coexist *btcoexist,
 
 	halbtc8723d2ant_enable_gnt_to_gpio(btcoexist, true);
 
+#if 0
 	/* check if WL firmware download ok */
 	if (btcoexist->btc_read_1byte(btcoexist, 0x80) == 0xc6)
 		halbtc8723d2ant_post_state_to_bt(btcoexist,
 					 BT_8723D_2ANT_SCOREBOARD_ONOFF, true);
+#endif
 
 	/* Enable counter statistics */
 	btcoexist->btc_write_1byte(btcoexist, 0x76e,
@@ -5191,14 +5481,15 @@ void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	bt_coex_ver = coex_sta->bt_coex_supported_version & 0xff;
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n %-35s = %d_%02x/ 0x%02x/ 0x%02x (%s)",
-		   "CoexVer WL/  BT_Desired/ BT_Report",
-		   glcoex_ver_date_8723d_2ant, glcoex_ver_8723d_2ant,
-		   glcoex_ver_btdesired_8723d_2ant,
-		   bt_coex_ver,
-		   (bt_coex_ver == 0xff ? "Unknown" :
-		   (bt_coex_ver >= glcoex_ver_btdesired_8723d_2ant ?
-		      "Match":"Mis-Match")));
+				"\r\n %-35s = %d_%02x/ 0x%02x/ 0x%02x (%s)",
+				"CoexVer WL/  BT_Desired/ BT_Report",
+				glcoex_ver_date_8723d_2ant, glcoex_ver_8723d_2ant,
+				glcoex_ver_btdesired_8723d_2ant,
+				bt_coex_ver,
+				(bt_coex_ver == 0xff ? "Unknown" :
+				(coex_sta->bt_disabled ? "BT-disable" :
+				(bt_coex_ver >= glcoex_ver_btdesired_8723d_2ant ?
+				"Match" : "Mis-Match"))));
 	CL_PRINTF(cli_buf);
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
@@ -5257,7 +5548,9 @@ void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 			   "Profiles",
 			   ((bt_link_info->a2dp_exist) ? "A2DP," : ""),
 			   ((bt_link_info->sco_exist) ?  "SCO," : ""),
-			   ((bt_link_info->hid_exist) ?  "HID," : ""),
+			   ((bt_link_info->hid_exist) ?
+			    ((coex_sta->hid_busy_num >= 2) ? "HID(4/18)," :
+			     "HID(2/18),") : ""),
 			   ((bt_link_info->pan_exist) ?  "PAN," : ""),
 			   ((coex_sta->voice_over_HOGP) ? "Voice" : ""));
 	else
@@ -5287,13 +5580,28 @@ void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		CL_PRINTF(cli_buf);
 	}
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ 0x%x",
-		   "Role/IgnWlanAct/Feature",
-		   ((bt_link_info->slave_role) ? "Slave" : "Master"),
-		   ((coex_dm->cur_ignore_wlan_act) ? "Yes" : "No"),
-		   coex_sta->bt_coex_supported_feature);
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ 0x%x/ 0x%x",
+			"Role/IgnWlanAct/Feature/BLEScan",
+			((bt_link_info->slave_role) ? "Slave" : "Master"),
+			((coex_dm->cur_ignore_wlan_act) ? "Yes" : "No"),
+			coex_sta->bt_coex_supported_feature,
+			coex_sta->bt_ble_scan_type);
 	CL_PRINTF(cli_buf);
 
+	if ((coex_sta->bt_ble_scan_type & 0x7) != 0x0) {
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+			"\r\n %-35s = 0x%08x/ 0x%08x/ 0x%08x",
+			"BLEScan Intv-Win TV/Init/Ble",
+			(coex_sta->bt_ble_scan_type & 0x1 ?
+			coex_sta->bt_ble_scan_para[0] : 0x0),
+			(coex_sta->bt_ble_scan_type & 0x2 ?
+			coex_sta->bt_ble_scan_para[1] : 0x0),
+			(coex_sta->bt_ble_scan_type & 0x4 ?
+			coex_sta->bt_ble_scan_para[2] : 0x0));
+
+		CL_PRINTF(cli_buf);
+	}
+
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d",
 		   "ReInit/ReLink/IgnWlact/Page/NameReq",
 		   coex_sta->cnt_ReInit,
@@ -5318,6 +5626,25 @@ void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 			   coex_sta->bt_reg_vendor_ac & 0x3, u16tmp[0]);
 	CL_PRINTF(cli_buf);
 
+	if (coex_sta->num_of_profile > 0) {
+
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+			"\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
+			"AFH MAP",
+			coex_sta->bt_afh_map[0],
+			coex_sta->bt_afh_map[1],
+			coex_sta->bt_afh_map[2],
+			coex_sta->bt_afh_map[3],
+			coex_sta->bt_afh_map[4],
+			coex_sta->bt_afh_map[5],
+			coex_sta->bt_afh_map[6],
+			coex_sta->bt_afh_map[7],
+			coex_sta->bt_afh_map[8],
+			coex_sta->bt_afh_map[9]
+			   );
+		CL_PRINTF(cli_buf);
+	}
+
 	for (i = 0; i < BT_INFO_SRC_8723D_2ANT_MAX; i++) {
 		if (coex_sta->bt_info_c2h_cnt[i]) {
 			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
@@ -5460,16 +5787,17 @@ void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	}
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n %-35s = %s (BB:%s)/ %s (BB:%s)/ %s",
-		   "GNT_WL_Ctrl/GNT_BT_Ctrl/Dbg",
-		   ((u32tmp[0] & BIT(12)) ? "SW" : "HW"),
-		   ((u32tmp[0] & BIT(8)) ?  "SW" : "HW"),
-		   ((u32tmp[0] & BIT(14)) ? "SW" : "HW"),
-		   ((u32tmp[0] & BIT(10)) ?  "SW" : "HW"),
-		   ((u8tmp[0] & BIT(3)) ? "On" : "Off"));
-	CL_PRINTF(cli_buf);
+			   "\r\n %-35s = %s (BB:%s)/ %s (BB:%s)/ %s %d",
+			   "GNT_WL_Ctrl/GNT_BT_Ctrl/Dbg",
+			   ((u32tmp[0] & BIT(12)) ? "SW" : "HW"),
+			   ((u32tmp[0] & BIT(8)) ?	"SW" : "HW"),
+			   ((u32tmp[0] & BIT(14)) ? "SW" : "HW"),
+			   ((u32tmp[0] & BIT(10)) ?  "SW" : "HW"),
+			   ((u8tmp[0] & BIT(3)) ? "On" : "Off"),
+			   coex_sta->gnt_error_cnt);
+		CL_PRINTF(cli_buf);
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
 		   "GNT_WL/GNT_BT",
 		   (int)((u32tmp[1] & BIT(2)) >> 2),
 		   (int)((u32tmp[1] & BIT(3)) >> 3));
@@ -5541,20 +5869,25 @@ void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_PRINTF(cli_buf);
 #endif
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s",
-		   "Wifi-HiPri/ Ccklock/ CckEverLock",
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s/ %d",
+		   "WlHiPri/ Locking/ Locked/ Noisy",
 		   (coex_sta->wifi_is_high_pri_task ? "Yes" : "No"),
 		   (coex_sta->cck_lock ? "Yes" : "No"),
-		   (coex_sta->cck_ever_lock ? "Yes" : "No"));
+		   (coex_sta->cck_ever_lock ? "Yes" : "No"),
+		   coex_sta->wl_noisy_level);
 	CL_PRINTF(cli_buf);
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s",
 		   "0x770(Hi-pri rx/tx)",
-		   coex_sta->high_priority_rx, coex_sta->high_priority_tx);
+		   coex_sta->high_priority_rx, coex_sta->high_priority_tx,
+		   (coex_sta->is_hiPri_rx_overhead ? "(scan overhead!!)" : ""));
 	CL_PRINTF(cli_buf);
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
+
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s",
 		   "0x774(Lo-pri rx/tx)",
-		   coex_sta->low_priority_rx, coex_sta->low_priority_tx);
+		   coex_sta->low_priority_rx, coex_sta->low_priority_tx,
+		   (bt_link_info->slave_role ? "(Slave!!)" : (
+		   coex_sta->is_tdma_btautoslot_hang ? "(auto-slot hang!!)" : "")));
 	CL_PRINTF(cli_buf);
 
 	btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
@@ -5574,7 +5907,11 @@ void ex_halbtc8723d2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
 		coex_sta->under_lps = false;
 
 		halbtc8723d2ant_post_state_to_bt(btcoexist,
-				 BT_8723D_2ANT_SCOREBOARD_ACTIVE, false);
+				BT_8723D_2ANT_SCOREBOARD_ACTIVE |
+				BT_8723D_2ANT_SCOREBOARD_ONOFF |
+				BT_8723D_2ANT_SCOREBOARD_SCAN |
+				BT_8723D_2ANT_SCOREBOARD_UNDERTEST,
+				false);
 
 		halbtc8723d2ant_set_ant_path(btcoexist,
 					     BTC_ANT_PATH_AUTO,
@@ -5587,9 +5924,13 @@ void ex_halbtc8723d2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
 			    "[BTCoex], IPS LEAVE notify\n");
 		BTC_TRACE(trace_buf);
 		coex_sta->under_ips = false;
-
+#if 0
 		halbtc8723d2ant_post_state_to_bt(btcoexist,
 					 BT_8723D_2ANT_SCOREBOARD_ACTIVE, true);
+
+		halbtc8723d2ant_post_state_to_bt(btcoexist,
+					BT_8723D_2ANT_SCOREBOARD_ONOFF, true);
+#endif
 		halbtc8723d2ant_init_hw_config(btcoexist, false);
 		halbtc8723d2ant_init_coex_dm(btcoexist);
 		halbtc8723d2ant_query_bt_info(btcoexist);
@@ -5659,9 +6000,10 @@ void ex_halbtc8723d2ant_scan_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 
 		halbtc8723d2ant_post_state_to_bt(btcoexist,
-					 BT_8723D_2ANT_SCOREBOARD_SCAN, true);
-		halbtc8723d2ant_post_state_to_bt(btcoexist,
-					 BT_8723D_2ANT_SCOREBOARD_ACTIVE, true);
+					BT_8723D_2ANT_SCOREBOARD_ACTIVE |
+					BT_8723D_2ANT_SCOREBOARD_SCAN |
+					BT_8723D_2ANT_SCOREBOARD_ONOFF,
+					true);
 
 		halbtc8723d2ant_set_ant_path(btcoexist,
 					     BTC_ANT_PATH_AUTO,
@@ -5706,15 +6048,17 @@ void ex_halbtc8723d2ant_connect_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 
 		halbtc8723d2ant_post_state_to_bt(btcoexist,
-					 BT_8723D_2ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8723D_2ANT_SCOREBOARD_ACTIVE |
+					 BT_8723D_2ANT_SCOREBOARD_SCAN |
+					 BT_8723D_2ANT_SCOREBOARD_ONOFF,
+					 true);
 
 		halbtc8723d2ant_set_ant_path(btcoexist,
 					     BTC_ANT_PATH_AUTO,
 					     FORCE_EXEC,
 					     BT_8723D_2ANT_PHASE_2G_RUNTIME);
 
-		halbtc8723d2ant_action_wifi_link_process(btcoexist);
-
+		halbtc8723d2ant_run_coexist_mechanism(btcoexist);
 		/* To keep TDMA case during connect process,
 		to avoid changed by Btinfo and runcoexmechanism */
 		coex_sta->freeze_coexrun_by_btinfo = true;
@@ -5754,7 +6098,9 @@ void ex_halbtc8723d2ant_media_status_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 
 		halbtc8723d2ant_post_state_to_bt(btcoexist,
-					 BT_8723D_2ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8723D_2ANT_SCOREBOARD_ACTIVE |
+					 BT_8723D_2ANT_SCOREBOARD_ONOFF,
+					 true);
 
 		halbtc8723d2ant_set_ant_path(btcoexist,
 					     BTC_ANT_PATH_AUTO,
@@ -5834,8 +6180,11 @@ void ex_halbtc8723d2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
 		coex_sta->specific_pkt_period_cnt = 2;
 	}
 
-	if (coex_sta->wifi_is_high_pri_task)
+	if (coex_sta->wifi_is_high_pri_task) {
+		halbtc8723d2ant_post_state_to_bt(btcoexist,
+					 BT_8723D_2ANT_SCOREBOARD_ACTIVE, true);
 		halbtc8723d2ant_run_coexist_mechanism(btcoexist);
+	}
 
 }
 
@@ -5844,6 +6193,9 @@ void ex_halbtc8723d2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 {
 	u8			i, rsp_source = 0;
 	boolean		wifi_connected = false;
+	boolean	wifi_scan = false, wifi_link = false, wifi_roam = false,
+		    wifi_busy = false;
+	static boolean is_scoreboard_scan = false;
 
 	if (psd_scan->is_AntDet_running == true) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -5943,9 +6295,35 @@ void ex_halbtc8723d2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 		if (coex_sta->bt_info_ext & BIT(3))
 			coex_sta->cnt_IgnWlanAct++;
 
-		if (coex_sta->bt_create_connection)
+		if (coex_sta->bt_create_connection) {
 			coex_sta->cnt_Page++;
 
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY,
+					   &wifi_busy);
+
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link);
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam);
+
+			if ((wifi_link) || (wifi_roam) || (wifi_scan) ||
+			    (coex_sta->wifi_is_high_pri_task) || (wifi_busy)) {
+
+				is_scoreboard_scan = true;
+				halbtc8723d2ant_post_state_to_bt(btcoexist,
+					 BT_8723D_2ANT_SCOREBOARD_SCAN, true);
+
+			} else
+				halbtc8723d2ant_post_state_to_bt(btcoexist,
+					 BT_8723D_2ANT_SCOREBOARD_SCAN, false);
+
+		} else {
+				if (is_scoreboard_scan) {
+					halbtc8723d2ant_post_state_to_bt(btcoexist,
+						 BT_8723D_2ANT_SCOREBOARD_SCAN, false);
+					is_scoreboard_scan = false;
+				}
+		}
+
 		/* Here we need to resend some wifi info to BT */
 		/* because bt is reset and loss of the info. */
 
@@ -5970,38 +6348,46 @@ void ex_halbtc8723d2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 			}
 
 
-			/*  If Ignore_WLanAct && not SetUp_Link */
+			/*  If Ignore_WLanAct && not SetUp_Link or Role_Switch */
 			if ((coex_sta->bt_info_ext & BIT(3)) &&
-			    (!(coex_sta->bt_info_ext & BIT(2)))) {
+				(!(coex_sta->bt_info_ext & BIT(2))) &&
+				(!(coex_sta->bt_info_ext & BIT(6)))) {
 
 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 					"[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n");
 				BTC_TRACE(trace_buf);
 				halbtc8723d2ant_ignore_wlan_act(btcoexist,
 							FORCE_EXEC, false);
+			} else {
+				if (coex_sta->bt_info_ext & BIT(2)) {
+					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					"[BTCoex], BT ignore Wlan active because Re-link!!\n");
+					BTC_TRACE(trace_buf);
+				} else if (coex_sta->bt_info_ext & BIT(6)) {
+					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					"[BTCoex], BT ignore Wlan active because Role-Switch!!\n");
+					BTC_TRACE(trace_buf);
+				}
 			}
 		}
 
 	}
 
-
-	halbtc8723d2ant_update_bt_link_info(btcoexist);
-
-	if (btcoexist->manual_control) {
+	if ((coex_sta->bt_info_ext & BIT(5))) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], BtInfoNotify(), No run_coexist_mechanism for Manual CTRL\n");
+					"[BTCoex], BT ext info bit4 check, query BLE Scan type!!\n");
 		BTC_TRACE(trace_buf);
-		return;
+		coex_sta->bt_ble_scan_type = btcoexist->btc_get_ble_scan_type_from_bt(btcoexist);
+
+		if ((coex_sta->bt_ble_scan_type & 0x1) == 0x1)
+			coex_sta->bt_ble_scan_para[0]  = btcoexist->btc_get_ble_scan_para_from_bt(btcoexist, 0x1);
+		if ((coex_sta->bt_ble_scan_type & 0x2) == 0x2)
+			coex_sta->bt_ble_scan_para[1]  = btcoexist->btc_get_ble_scan_para_from_bt(btcoexist, 0x2);
+		if ((coex_sta->bt_ble_scan_type & 0x4) == 0x4)
+			coex_sta->bt_ble_scan_para[2]  = btcoexist->btc_get_ble_scan_para_from_bt(btcoexist, 0x4);
 	}
 
-	if (btcoexist->stop_coex_dm) {
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], BtInfoNotify(),  No run_coexist_mechanism for Stop Coex DM\n");
-		BTC_TRACE(trace_buf);
-		return;
-	}
-
-	coex_sta->c2h_bt_info_req_sent = false;
+	halbtc8723d2ant_update_bt_link_info(btcoexist);
 
 	halbtc8723d2ant_run_coexist_mechanism(btcoexist);
 }
@@ -6017,13 +6403,13 @@ void ex_halbtc8723d2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 			    "[BTCoex], RF is turned ON!!\n");
 		BTC_TRACE(trace_buf);
 
-		coex_sta->wl_rf_off_on_event = true;
 		btcoexist->stop_coex_dm = false;
-
+#if 0
 		halbtc8723d2ant_post_state_to_bt(btcoexist,
 					 BT_8723D_2ANT_SCOREBOARD_ACTIVE, true);
 		halbtc8723d2ant_post_state_to_bt(btcoexist,
 					 BT_8723D_2ANT_SCOREBOARD_ONOFF, true);
+#endif
 	} else if (BTC_RF_OFF == type) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], RF is turned OFF!!\n");
@@ -6037,11 +6423,13 @@ void ex_halbtc8723d2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 		halbtc8723d2ant_action_coex_all_off(btcoexist);
 
 		halbtc8723d2ant_post_state_to_bt(btcoexist,
-				 BT_8723D_2ANT_SCOREBOARD_ACTIVE, false);
-		halbtc8723d2ant_post_state_to_bt(btcoexist,
-					 BT_8723D_2ANT_SCOREBOARD_ONOFF, false);
+				BT_8723D_2ANT_SCOREBOARD_ACTIVE |
+				BT_8723D_2ANT_SCOREBOARD_ONOFF |
+				BT_8723D_2ANT_SCOREBOARD_SCAN |
+				BT_8723D_2ANT_SCOREBOARD_UNDERTEST,
+				false);
+
 		btcoexist->stop_coex_dm = true;
-		coex_sta->wl_rf_off_on_event = false;
 
 	}
 }
@@ -6059,9 +6447,11 @@ void ex_halbtc8723d2ant_halt_notify(IN struct btc_coexist *btcoexist)
 	ex_halbtc8723d2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
 
 	halbtc8723d2ant_post_state_to_bt(btcoexist,
-				 BT_8723D_2ANT_SCOREBOARD_ACTIVE, false);
-	halbtc8723d2ant_post_state_to_bt(btcoexist,
-					 BT_8723D_2ANT_SCOREBOARD_ONOFF, false);
+				BT_8723D_2ANT_SCOREBOARD_ACTIVE |
+				BT_8723D_2ANT_SCOREBOARD_ONOFF |
+				BT_8723D_2ANT_SCOREBOARD_SCAN |
+				BT_8723D_2ANT_SCOREBOARD_UNDERTEST,
+				false);
 }
 
 void ex_halbtc8723d2ant_pnp_notify(IN struct btc_coexist *btcoexist,
@@ -6082,11 +6472,12 @@ void ex_halbtc8723d2ant_pnp_notify(IN struct btc_coexist *btcoexist,
 		coex_sta->under_ips = false;
 		coex_sta->under_lps = false;
 
-
-		halbtc8723d2ant_post_state_to_bt(btcoexist,
-				 BT_8723D_2ANT_SCOREBOARD_ACTIVE, false);
 		halbtc8723d2ant_post_state_to_bt(btcoexist,
-					 BT_8723D_2ANT_SCOREBOARD_ONOFF, false);
+				BT_8723D_2ANT_SCOREBOARD_ACTIVE |
+				BT_8723D_2ANT_SCOREBOARD_ONOFF |
+				BT_8723D_2ANT_SCOREBOARD_SCAN |
+				BT_8723D_2ANT_SCOREBOARD_UNDERTEST,
+				false);
 
 		if (BTC_WIFI_PNP_SLEEP_KEEP_ANT == pnp_state) {
 
@@ -6105,17 +6496,22 @@ void ex_halbtc8723d2ant_pnp_notify(IN struct btc_coexist *btcoexist,
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], Pnp notify to WAKE UP\n");
 		BTC_TRACE(trace_buf);
-
+#if 0
 		halbtc8723d2ant_post_state_to_bt(btcoexist,
-					 BT_8723D_2ANT_SCOREBOARD_ACTIVE, true);
+					BT_8723D_2ANT_SCOREBOARD_ACTIVE, true);
 		halbtc8723d2ant_post_state_to_bt(btcoexist,
-					 BT_8723D_2ANT_SCOREBOARD_ONOFF, true);
+					BT_8723D_2ANT_SCOREBOARD_ONOFF, true);
+#endif
 	}
 }
 
 void ex_halbtc8723d2ant_periodical(IN struct btc_coexist *btcoexist)
 {
 	struct  btc_board_info	*board_info = &btcoexist->board_info;
+	boolean wifi_busy = false;
+	u32	bt_patch_ver;
+	static u8 cnt = 0;
+	boolean bt_relink_finish = false;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], ************* Periodical *************\n");
@@ -6129,6 +6525,37 @@ void ex_halbtc8723d2ant_periodical(IN struct btc_coexist *btcoexist)
 	halbtc8723d2ant_monitor_wifi_ctr(btcoexist);
 	halbtc8723d2ant_monitor_bt_enable_disable(btcoexist);
 
+#if 0
+		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+
+		/* halbtc8723d2ant_read_score_board(btcoexist, &bt_scoreboard_val); */
+
+		if (wifi_busy) {
+			halbtc8723d2ant_post_state_to_bt(btcoexist,
+					BT_8723D_2ANT_SCOREBOARD_UNDERTEST, true);
+			/*
+			halbtc8723d2ant_post_state_to_bt(btcoexist,
+						 BT_8723D_2ANT_SCOREBOARD_WLBUSY, true);
+
+			if (bt_scoreboard_val & BIT(6))
+				halbtc8723d2ant_query_bt_info(btcoexist); */
+		} else {
+			halbtc8723d2ant_post_state_to_bt(btcoexist,
+						BT_8723D_2ANT_SCOREBOARD_UNDERTEST, false);
+			/*
+			halbtc8723d2ant_post_state_to_bt(btcoexist,
+						BT_8723D_2ANT_SCOREBOARD_WLBUSY,
+						false);  */
+		}
+#endif
+
+	if (coex_sta->bt_relink_downcount != 0) {
+		coex_sta->bt_relink_downcount--;
+
+		if (coex_sta->bt_relink_downcount == 0)
+			bt_relink_finish = true;
+	}
+
 	/* for 4-way, DHCP, EAPOL packet */
 	if (coex_sta->specific_pkt_period_cnt > 0) {
 
@@ -6148,25 +6575,37 @@ void ex_halbtc8723d2ant_periodical(IN struct btc_coexist *btcoexist)
 
 	if (!coex_sta->bt_disabled) {
 		if (coex_sta->bt_coex_supported_feature == 0)
-			coex_sta->bt_coex_supported_feature =
-				btcoexist->btc_get_bt_coex_supported_feature(
-					btcoexist);
+			btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_FEATURE,
+						&coex_sta->bt_coex_supported_feature);
 
 		if ((coex_sta->bt_coex_supported_version == 0) ||
 			 (coex_sta->bt_coex_supported_version == 0xffff))
-			coex_sta->bt_coex_supported_version =
-				btcoexist->btc_get_bt_coex_supported_version(
-					btcoexist);
+			btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_VERSION,
+						&coex_sta->bt_coex_supported_version);
 
 		if (coex_sta->bt_reg_vendor_ac == 0xffff)
 			coex_sta->bt_reg_vendor_ac = (u16)(
-				     btcoexist->btc_get_bt_reg(btcoexist, 3,
-							     0xac) & 0xffff);
+						btcoexist->btc_get_bt_reg(btcoexist, 3,
+						0xac) & 0xffff);
 
 		if (coex_sta->bt_reg_vendor_ae == 0xffff)
 			coex_sta->bt_reg_vendor_ae = (u16)(
-				     btcoexist->btc_get_bt_reg(btcoexist, 3,
-							     0xae) & 0xffff);
+						btcoexist->btc_get_bt_reg(btcoexist, 3,
+						0xae) & 0xffff);
+
+		btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER,
+						&bt_patch_ver);
+		btcoexist->bt_info.bt_get_fw_ver = bt_patch_ver;
+
+		if (coex_sta->num_of_profile > 0) {
+			cnt++;
+
+			if (cnt >= 3) {
+				btcoexist->btc_get_bt_afh_map_from_bt(btcoexist, 0,
+					&coex_sta->bt_afh_map[0]);
+				cnt = 0;
+			}
+		}
 
 #if BT_8723D_2ANT_ANTDET_ENABLE
 
diff --git a/rtl8822BU/hal/btc/halbtc8723d2ant.h b/rtl8822BU/hal/btc/halbtc8723d2ant.h
index efa94ca..ca064ec 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8723d2ant.h
+++ b/rtl8822BU/hal/btc/halbtc8723d2ant.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 
 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
 
@@ -138,7 +152,9 @@ enum bt_8723d_2ant_phase {
 enum bt_8723d_2ant_Scoreboard {
 	BT_8723D_2ANT_SCOREBOARD_ACTIVE								= BIT(0),
 	BT_8723D_2ANT_SCOREBOARD_ONOFF								= BIT(1),
-	BT_8723D_2ANT_SCOREBOARD_SCAN								= BIT(2)
+	BT_8723D_2ANT_SCOREBOARD_SCAN								= BIT(2),
+	BT_8723D_2ANT_SCOREBOARD_UNDERTEST							= BIT(3),
+	BT_8723D_2ANT_SCOREBOARD_WLBUSY								= BIT(6)
 };
 
 
@@ -221,11 +237,11 @@ struct coex_sta_8723d_2ant {
 	u32					high_priority_rx;
 	u32					low_priority_tx;
 	u32					low_priority_rx;
+	boolean             is_hiPri_rx_overhead;
 	u8					bt_rssi;
 	boolean				bt_tx_rx_mask;
 	u8					pre_bt_rssi_state;
 	u8					pre_wifi_rssi_state[4];
-	boolean				c2h_bt_info_req_sent;
 	u8					bt_info_c2h[BT_INFO_SRC_8723D_2ANT_MAX][10];
 	u32					bt_info_c2h_cnt[BT_INFO_SRC_8723D_2ANT_MAX];
 	boolean				bt_whck_test;
@@ -269,13 +285,15 @@ struct coex_sta_8723d_2ant {
 
 	u8					num_of_profile;
 	boolean				acl_busy;
-	boolean				wl_rf_off_on_event;
 	boolean				bt_create_connection;
 	boolean				wifi_is_high_pri_task;
 	u32					specific_pkt_period_cnt;
 	u32					bt_coex_supported_feature;
 	u32					bt_coex_supported_version;
 
+	u8					bt_ble_scan_type;
+	u32					bt_ble_scan_para[3];
+
 	boolean				run_time_state;
 	boolean				freeze_coexrun_by_btinfo;
 
@@ -292,11 +310,19 @@ struct coex_sta_8723d_2ant {
 	u32					cnt_ReInit;
 	u32					cnt_IgnWlanAct;
 	u32					cnt_Page;
+	u32					cnt_RoleSwitch;
 
 	u16					bt_reg_vendor_ac;
 	u16					bt_reg_vendor_ae;
 
 	boolean				is_setupLink;
+	boolean				wl_noisy_level;
+	u32                 gnt_error_cnt;
+
+	u8					bt_afh_map[10];
+	u8					bt_relink_downcount;
+	boolean				is_tdma_btautoslot;
+	boolean				is_tdma_btautoslot_hang;
 };
 
 #define BT_8723D_2ANT_ANTDET_PSD_POINTS			256	/* MAX:1024 */
diff --git a/rtl8822BU/hal/btc/halbtc8812a1ant.c b/rtl8822BU/hal/btc/halbtc8812a1ant.c
index f1cefab..0ac288e 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8812a1ant.c
+++ b/rtl8822BU/hal/btc/halbtc8812a1ant.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 /* ************************************************************
  * Description:
  *
diff --git a/rtl8822BU/hal/btc/halbtc8812a1ant.h b/rtl8822BU/hal/btc/halbtc8812a1ant.h
index e786d37..08fbad2 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8812a1ant.h
+++ b/rtl8822BU/hal/btc/halbtc8812a1ant.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 
 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
 
diff --git a/rtl8822BU/hal/btc/halbtc8812a2ant.c b/rtl8822BU/hal/btc/halbtc8812a2ant.c
index 038405b..e1e6572 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8812a2ant.c
+++ b/rtl8822BU/hal/btc/halbtc8812a2ant.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 /* ************************************************************
  * Description:
  *
diff --git a/rtl8822BU/hal/btc/halbtc8812a2ant.h b/rtl8822BU/hal/btc/halbtc8812a2ant.h
index fa19aaf..2b7f4aa 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8812a2ant.h
+++ b/rtl8822BU/hal/btc/halbtc8812a2ant.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 
 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
 
diff --git a/rtl8822BU/hal/btc/halbtc8821a1ant.c b/rtl8822BU/hal/btc/halbtc8821a1ant.c
index bba78ae..5070897 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8821a1ant.c
+++ b/rtl8822BU/hal/btc/halbtc8821a1ant.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 /* ************************************************************
  * Description:
  *
diff --git a/rtl8822BU/hal/btc/halbtc8821a1ant.h b/rtl8822BU/hal/btc/halbtc8821a1ant.h
index 53a5313..c9c141c 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8821a1ant.h
+++ b/rtl8822BU/hal/btc/halbtc8821a1ant.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 
 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
 
diff --git a/rtl8822BU/hal/btc/halbtc8821a2ant.c b/rtl8822BU/hal/btc/halbtc8821a2ant.c
index 80efc33..3fcb757 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8821a2ant.c
+++ b/rtl8822BU/hal/btc/halbtc8821a2ant.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 /* ************************************************************
  * Description:
  *
diff --git a/rtl8822BU/hal/btc/halbtc8821a2ant.h b/rtl8822BU/hal/btc/halbtc8821a2ant.h
index 8151397..d76f566 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8821a2ant.h
+++ b/rtl8822BU/hal/btc/halbtc8821a2ant.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 
 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
 
diff --git a/rtl8822BU/hal/btc/halbtc8821c1ant.c b/rtl8822BU/hal/btc/halbtc8821c1ant.c
index 34b1305..f9f2081 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8821c1ant.c
+++ b/rtl8822BU/hal/btc/halbtc8821c1ant.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 /* ************************************************************
  * Description:
  *
@@ -36,9 +50,9 @@ const char *const glbt_info_src_8821c_1ant[] = {
 	"BT Info[bt auto report]",
 };
 
-u32	glcoex_ver_date_8821c_1ant = 20160805;
-u32	glcoex_ver_8821c_1ant = 0x04;
-u32	glcoex_ver_btdesired_8821c_1ant = 0x04;
+u32	glcoex_ver_date_8821c_1ant = 20161107;
+u32	glcoex_ver_8821c_1ant = 0x0a;
+u32	glcoex_ver_btdesired_8821c_1ant = 0x0a;
 
 
 /* ************************************************************
@@ -328,7 +342,13 @@ void halbtc8821c1ant_query_bt_info(IN struct btc_coexist *btcoexist)
 {
 	u8			h2c_parameter[1] = {0};
 
-	coex_sta->c2h_bt_info_req_sent = true;
+	if (coex_sta->bt_disabled) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], No query BT info because BT is disabled!\n");
+		BTC_TRACE(trace_buf);
+		return;
+	}
+
 
 	h2c_parameter[0] |= BIT(0);	/* trigger */
 
@@ -343,7 +363,8 @@ void halbtc8821c1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 {
 	u32			reg_hp_txrx, reg_lp_txrx, u32tmp;
 	u32			reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
-	static u8		num_of_bt_counter_chk = 0, cnt_slave = 0;
+	static u8		num_of_bt_counter_chk = 0, cnt_slave = 0, cnt_overhead = 0,
+				cnt_autoslot_hang = 0;
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
 	/* to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS */
@@ -371,6 +392,25 @@ void halbtc8821c1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 
 	BTC_TRACE(trace_buf);
 
+	if (BT_8821C_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
+	    coex_dm->bt_status) {
+
+		if (coex_sta->high_priority_rx >= 15) {
+			if (cnt_overhead < 3)
+				cnt_overhead++;
+
+			if (cnt_overhead == 3)
+				coex_sta->is_hiPri_rx_overhead = true;
+
+		} else {
+			if (cnt_overhead > 0)
+				cnt_overhead--;
+
+			if (cnt_overhead == 0)
+				coex_sta->is_hiPri_rx_overhead = false;
+		}
+	}
+
 	/* reset counter */
 	btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
 
@@ -380,11 +420,12 @@ void halbtc8821c1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 
 	if ((coex_sta->low_priority_rx >= 1150) &&
 	    (coex_sta->low_priority_rx >= coex_sta->low_priority_tx)
-	    && (!coex_sta->under_ips)  && (!coex_sta->c2h_bt_inquiry_page) &&
-	    (coex_sta->bt_link_exist))	{
-		if (cnt_slave >= 3) {
+	    && (!coex_sta->under_ips)
+	    && (!coex_sta->c2h_bt_inquiry_page)
+	    && ((bt_link_info->a2dp_exist) || (bt_link_info->pan_exist))) {
+		if (cnt_slave >= 2) {
 			bt_link_info->slave_role = true;
-			cnt_slave = 3;
+			cnt_slave = 2;
 		} else
 			cnt_slave++;
 	} else {
@@ -393,20 +434,38 @@ void halbtc8821c1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 			cnt_slave = 0;
 		} else
 			cnt_slave--;
-
 	}
 
-	if ((coex_sta->high_priority_tx == 0) &&
-	    (coex_sta->high_priority_rx == 0) &&
-	    (coex_sta->low_priority_tx == 0) &&
-	    (coex_sta->low_priority_rx == 0)) {
-		num_of_bt_counter_chk++;
-		if (num_of_bt_counter_chk >= 3) {
-			halbtc8821c1ant_query_bt_info(btcoexist);
-			num_of_bt_counter_chk = 0;
+	if (coex_sta->is_tdma_btautoslot) {
+		if ((coex_sta->low_priority_tx >= 1300) &&
+		(coex_sta->low_priority_rx <= 150)) {
+			if (cnt_autoslot_hang >= 2) {
+				coex_sta->is_tdma_btautoslot_hang = true;
+				cnt_autoslot_hang = 2;
+			} else
+				cnt_autoslot_hang++;
+		} else {
+			if (cnt_autoslot_hang == 0)	{
+				coex_sta->is_tdma_btautoslot_hang = false;
+				cnt_autoslot_hang = 0;
+			} else
+				cnt_autoslot_hang--;
 		}
 	}
 
+	if (!coex_sta->bt_disabled) {
+
+		if ((coex_sta->high_priority_tx == 0) &&
+		    (coex_sta->high_priority_rx == 0) &&
+		    (coex_sta->low_priority_tx == 0) &&
+		    (coex_sta->low_priority_rx == 0)) {
+			num_of_bt_counter_chk++;
+			if (num_of_bt_counter_chk >= 3) {
+				halbtc8821c1ant_query_bt_info(btcoexist);
+				num_of_bt_counter_chk = 0;
+			}
+		}
+	}
 
 }
 
@@ -416,15 +475,20 @@ void halbtc8821c1ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 {
 #if 1
 	s32	wifi_rssi = 0;
-	boolean wifi_busy = false, wifi_under_b_mode = false;
-	static u8 cck_lock_counter = 0;
-	u32	total_cnt, reg_val1, reg_val2;
+	boolean wifi_busy = false, wifi_under_b_mode = false,
+		wifi_scan = false;
+	boolean	bt_idle = false, wl_idle = false;
+	static u8 cck_lock_counter = 0, wl_noisy_count0 = 0,
+		  wl_noisy_count1 = 3, wl_noisy_count2 = 0;
+	u32	total_cnt, reg_val1, reg_val2, cck_cnt;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 	btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE,
 			   &wifi_under_b_mode);
 
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
+
 	coex_sta->crc_ok_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
 			       PHYDM_INFO_CRC32_OK_CCK);
 	coex_sta->crc_ok_11g = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
@@ -443,6 +507,43 @@ void halbtc8821c1ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 	coex_sta->crc_err_11n_vht = btcoexist->btc_phydm_query_PHY_counter(
 				    btcoexist, PHYDM_INFO_CRC32_ERROR_VHT);
 
+	cck_cnt = coex_sta->crc_ok_cck + coex_sta->crc_err_cck;
+
+		if (cck_cnt > 250) {
+			if (wl_noisy_count2 < 3)
+				wl_noisy_count2++;
+
+			if (wl_noisy_count2 == 3) {
+				wl_noisy_count0 = 0;
+				wl_noisy_count1 = 0;
+			}
+
+		} else if (cck_cnt < 50) {
+			if (wl_noisy_count0 < 3)
+				wl_noisy_count0++;
+
+			if (wl_noisy_count0 == 3) {
+				wl_noisy_count1 = 0;
+				wl_noisy_count2 = 0;
+			}
+
+		} else {
+			if (wl_noisy_count1 < 3)
+				wl_noisy_count1++;
+
+			if (wl_noisy_count1 == 3) {
+				wl_noisy_count0 = 0;
+				wl_noisy_count2 = 0;
+			}
+	}
+
+		if (wl_noisy_count2 == 3)
+			coex_sta->wl_noisy_level = 2;
+		else if (wl_noisy_count1 == 3)
+			coex_sta->wl_noisy_level = 1;
+		else
+			coex_sta->wl_noisy_level = 0;
+
 	if ((wifi_busy) && (wifi_rssi >= 30) && (!wifi_under_b_mode)) {
 		total_cnt = coex_sta->crc_ok_cck + coex_sta->crc_ok_11g +
 			    coex_sta->crc_ok_11n + coex_sta->crc_ok_11n_vht;
@@ -490,72 +591,6 @@ void halbtc8821c1ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 #endif
 }
 
-boolean halbtc8821c1ant_is_wifibt_status_changed(IN struct btc_coexist
-		*btcoexist)
-{
-	static boolean	pre_wifi_busy = false, pre_under_4way = false,
-			pre_bt_hs_on = false, pre_bt_off = false;
-	static u8 pre_hid_busy_num = 0;
-	boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
-	boolean wifi_connected = false;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
-			   &wifi_connected);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
-			   &under_4way);
-
-	if (coex_sta->bt_disabled != pre_bt_off) {
-		pre_bt_off = coex_sta->bt_disabled;
-
-		if (coex_sta->bt_disabled)
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "[BTCoex], BT is disabled !!\n");
-		else
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "[BTCoex], BT is enabled !!\n");
-
-		BTC_TRACE(trace_buf);
-
-		coex_sta->bt_coex_supported_feature = 0;
-		coex_sta->bt_coex_supported_version = 0;
-		coex_sta->bt_ble_scan_type = 0;
-		coex_sta->bt_ble_scan_para[0] = 0;
-		coex_sta->bt_ble_scan_para[1] = 0;
-		coex_sta->bt_ble_scan_para[2] = 0;
-		coex_sta->bt_reg_vendor_ac = 0xffff;
-		coex_sta->bt_reg_vendor_ae = 0xffff;
-		return true;
-	}
-
-
-	if (wifi_connected) {
-		if (wifi_busy != pre_wifi_busy) {
-			pre_wifi_busy = wifi_busy;
-			return true;
-		}
-		if (under_4way != pre_under_4way) {
-			pre_under_4way = under_4way;
-			return true;
-		}
-		if (bt_hs_on != pre_bt_hs_on) {
-			pre_bt_hs_on = bt_hs_on;
-			return true;
-		}
-
-		if (!coex_sta->bt_disabled) {
-
-			if (coex_sta->hid_busy_num != pre_hid_busy_num) {
-				pre_hid_busy_num = coex_sta->hid_busy_num;
-				return true;
-			}
-		}
-	}
-
-	return false;
-}
-
 void halbtc8821c1ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 {
 	struct  btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
@@ -651,7 +686,11 @@ void halbtc8821c1ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 	else
 		bt_link_info->hid_only = false;
 
-	if (!(coex_sta->bt_info & BT_INFO_8821C_1ANT_B_CONNECTION)) {
+	if (coex_sta->bt_info & BT_INFO_8821C_1ANT_B_INQ_PAGE) {
+		coex_dm->bt_status = BT_8821C_1ANT_BT_STATUS_INQ_PAGE;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], BtInfoNotify(), BT Inq/page!!!\n");
+	} else if (!(coex_sta->bt_info & BT_INFO_8821C_1ANT_B_CONNECTION)) {
 		coex_dm->bt_status = BT_8821C_1ANT_BT_STATUS_NON_CONNECTED_IDLE;
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
@@ -981,7 +1020,6 @@ void halbtc8821c1ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
 
 }
 
-
 void halbtc8821c1ant_write_score_board(
 	IN	struct  btc_coexist		*btcoexist,
 	IN	u16				bitpos,
@@ -989,14 +1027,22 @@ void halbtc8821c1ant_write_score_board(
 )
 {
 
-	static u16 originalval = 0x8002;
+	static u16 originalval = 0x8002, preval = 0x0;
 
 	if (state)
 		originalval = originalval | bitpos;
 	else
 		originalval = originalval & (~bitpos);
 
-	btcoexist->btc_write_2byte(btcoexist, 0xaa, originalval);
+	if (originalval != preval) {
+
+		preval = originalval;
+		btcoexist->btc_write_2byte(btcoexist, 0xaa, originalval);
+	} else {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		"[BTCoex], halbtc8821c1ant_write_score_board: return for nochange\n");
+		BTC_TRACE(trace_buf);
+	}
 }
 
 void halbtc8821c1ant_read_score_board(
@@ -1016,10 +1062,98 @@ void halbtc8821c1ant_post_state_to_bt(
 )
 {
 
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		"[BTCoex], halbtc8821c1ant_post_state_to_bt: type = %d, state =%d\n",
+		type, state);
+	BTC_TRACE(trace_buf);
+
 	halbtc8821c1ant_write_score_board(btcoexist, (u16) type, state);
+}
+
+boolean halbtc8821c1ant_is_wifibt_status_changed(IN struct btc_coexist
+		*btcoexist)
+{
+	static boolean	pre_wifi_busy = false, pre_under_4way = false,
+			pre_bt_hs_on = false, pre_bt_off = false,
+			pre_bt_slave = false;
+	static u8 pre_hid_busy_num = 0, pre_wl_noisy_level = 0;
+	boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
+	boolean wifi_connected = false;
+	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
+			   &wifi_connected);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
+			   &under_4way);
+
+	if (coex_sta->bt_disabled != pre_bt_off) {
+		pre_bt_off = coex_sta->bt_disabled;
+
+		if (coex_sta->bt_disabled)
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], BT is disabled !!\n");
+		else
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], BT is enabled !!\n");
+
+		BTC_TRACE(trace_buf);
+
+		coex_sta->bt_coex_supported_feature = 0;
+		coex_sta->bt_coex_supported_version = 0;
+		coex_sta->bt_ble_scan_type = 0;
+		coex_sta->bt_ble_scan_para[0] = 0;
+		coex_sta->bt_ble_scan_para[1] = 0;
+		coex_sta->bt_ble_scan_para[2] = 0;
+		coex_sta->bt_reg_vendor_ac = 0xffff;
+		coex_sta->bt_reg_vendor_ae = 0xffff;
+		return true;
+	}
+
+
+	if (wifi_connected) {
+		if (wifi_busy != pre_wifi_busy) {
+			pre_wifi_busy = wifi_busy;
+
+			if (wifi_busy)
+				halbtc8821c1ant_post_state_to_bt(btcoexist,
+						BT_8821C_1ANT_SCOREBOARD_UNDERTEST, true);
+			else
+				halbtc8821c1ant_post_state_to_bt(btcoexist,
+						BT_8821C_1ANT_SCOREBOARD_UNDERTEST, false);
+			return true;
+		}
+		if (under_4way != pre_under_4way) {
+			pre_under_4way = under_4way;
+			return true;
+		}
+		if (bt_hs_on != pre_bt_hs_on) {
+			pre_bt_hs_on = bt_hs_on;
+			return true;
+		}
+		if (coex_sta->wl_noisy_level != pre_wl_noisy_level) {
+			pre_wl_noisy_level = coex_sta->wl_noisy_level;
+			return true;
+		}
+	}
+
+	if (!coex_sta->bt_disabled) {
+		if (coex_sta->hid_busy_num != pre_hid_busy_num) {
+			pre_hid_busy_num = coex_sta->hid_busy_num;
+			return true;
+		}
+	}
+
+	if (bt_link_info->slave_role != pre_bt_slave) {
+		pre_bt_slave = bt_link_info->slave_role;
+		return true;
+	}
+
+	return false;
 }
 
+
 void halbtc8821c1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 {
 	static u32		bt_disable_cnt = 0;
@@ -1131,7 +1265,7 @@ void halbtc8821c1ant_enable_gnt_to_gpio(IN struct btc_coexist *btcoexist,
 	} else {
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x8, 0x0);
 
-		/*  Restore original value  */
+		/*  Restore original value */
 		/*  switch GPIO Mux */
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x66, BIT(4),
 						   bitVal[0]);  /*0x66[4] = 0 */
@@ -1247,67 +1381,65 @@ void halbtc8821c1ant_ltecoex_pathcontrol_owner(IN struct btc_coexist *btcoexist,
 void halbtc8821c1ant_ltecoex_set_gnt_bt(IN struct btc_coexist *btcoexist,
 			IN u8 control_block, IN boolean sw_control, IN u8 state)
 {
-	u32 val = 0, bit_mask;
+	u32 val = 0, val_orig = 0;
+
+	if (!sw_control)
+		val = 0x0;
+	else if (state & 0x1)
+		val = 0x3;
+	else
+		val = 0x1;
 
-	state = state & 0x1;
-	val = (sw_control) ? ((state << 1) | 0x1) : 0;
+	val_orig = halbtc8821c1ant_ltecoex_indirect_read_reg(btcoexist,
+			0x38);
 
 	switch (control_block) {
 	case BT_8821C_1ANT_GNT_BLOCK_RFC_BB:
 	default:
-		bit_mask = 0xc000;
-		halbtc8821c1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[15:14] */
-		bit_mask = 0x0c00;
-		halbtc8821c1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[11:10]						 */
+		val = ((val << 14) | (val << 10)) | (val_orig & 0xffff33ff);
 		break;
 	case BT_8821C_1ANT_GNT_BLOCK_RFC:
-		bit_mask = 0xc000;
-		halbtc8821c1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[15:14] */
+		val = (val << 14) | (val_orig & 0xffff3fff);
 		break;
 	case BT_8821C_1ANT_GNT_BLOCK_BB:
-		bit_mask = 0x0c00;
-		halbtc8821c1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[11:10] */
+		val = (val << 10) | (val_orig & 0xfffff3ff);
 		break;
-
 	}
 
+	halbtc8821c1ant_ltecoex_indirect_write_reg(btcoexist,
+			0x38, 0xffffffff, val);
 }
 
 void halbtc8821c1ant_ltecoex_set_gnt_wl(IN struct btc_coexist *btcoexist,
 			IN u8 control_block, IN boolean sw_control, IN u8 state)
 {
-	u32 val = 0, bit_mask;
+	u32 val = 0, val_orig = 0;
+
+	if (!sw_control)
+		val = 0x0;
+	else if (state & 0x1)
+		val = 0x3;
+	else
+		val = 0x1;
 
-	state = state & 0x1;
-	val = (sw_control) ? ((state << 1) | 0x1) : 0;
+	val_orig = halbtc8821c1ant_ltecoex_indirect_read_reg(btcoexist,
+			0x38);
 
 	switch (control_block) {
 	case BT_8821C_1ANT_GNT_BLOCK_RFC_BB:
 	default:
-		bit_mask = 0x3000;
-		halbtc8821c1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[13:12] */
-		bit_mask = 0x0300;
-		halbtc8821c1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[9:8]						 */
+		val = ((val << 12) | (val << 8)) | (val_orig & 0xffffccff);
 		break;
 	case BT_8821C_1ANT_GNT_BLOCK_RFC:
-		bit_mask = 0x3000;
-		halbtc8821c1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[13:12] */
+		val = (val << 12) | (val_orig & 0xffffcfff);
 		break;
 	case BT_8821C_1ANT_GNT_BLOCK_BB:
-		bit_mask = 0x0300;
-		halbtc8821c1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[9:8] */
+		val = (val << 8) | (val_orig & 0xfffffcff);
 		break;
-
 	}
 
+	halbtc8821c1ant_ltecoex_indirect_write_reg(btcoexist,
+			0x38, 0xffffffff, val);
 }
 
 void halbtc8821c1ant_ltecoex_set_coex_table(IN struct btc_coexist *btcoexist,
@@ -1380,7 +1512,7 @@ void halbtc8821c1ant_set_wltoggle_coex_table(IN struct btc_coexist *btcoexist,
 		for (i = 1; i <= 5; i++) {
 			if (cur_h2c_parameter[i] != pre_h2c_parameter[i])
 				break;
-		
+
 			match_cnt++;
 		}
 
@@ -1473,12 +1605,12 @@ void halbtc8821c1ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 		break;
 	case 3:
 		halbtc8821c1ant_coex_table(btcoexist, force_exec,
-					   0xaa555555, 0xaa5a5a5a, break_table,
+					   0x55555555, 0x5a5a5a5a, break_table,
 					   select_table);
 		break;
 	case 4:
 		halbtc8821c1ant_coex_table(btcoexist, force_exec,
-					   0xa5555555, 0xaa5a5a5a, break_table,
+					   0xa5555555, 0x5a5a5a5a, break_table,
 					   select_table);
 		break;
 	case 5:
@@ -1498,7 +1630,7 @@ void halbtc8821c1ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 		break;
 	case 8:
 		halbtc8821c1ant_coex_table(btcoexist, force_exec,
-					   0xa5555555, 0xaaaaaaaa, break_table,
+					   0xa5555555, 0xaaaa5aaa, break_table,
 					   select_table);
 		break;
 	case 9:
@@ -1648,6 +1780,18 @@ void halbtc8821c1ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
 	u8			h2c_parameter[5] = {0};
 	u8			real_byte1 = byte1, real_byte5 = byte5;
 	boolean			ap_enable = false;
+	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+
+	if (byte5 & BIT(2))
+		coex_sta->is_tdma_btautoslot = true;
+	else
+		coex_sta->is_tdma_btautoslot = false;
+
+	/* release bt-auto slot for auto-slot hang is detected!! */
+	if (coex_sta->is_tdma_btautoslot)
+		if ((coex_sta->is_tdma_btautoslot_hang) ||
+			(bt_link_info->slave_role))
+			byte5 = byte5 & 0xfb;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
 			   &ap_enable);
@@ -1678,7 +1822,6 @@ void halbtc8821c1ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
 						 0x0);
 	}
 
-
 	h2c_parameter[0] = real_byte1;
 	h2c_parameter[1] = byte2;
 	h2c_parameter[2] = byte3;
@@ -1705,18 +1848,6 @@ void halbtc8821c1ant_ps_tdma(IN struct btc_coexist *btcoexist,
 	static boolean	 pre_wifi_busy = false;
 
 
-#if BT_8821C_1ANT_ANTDET_ENABLE
-
-	if (board_info->btdm_ant_num_by_ant_det == 2) {
-#if 0
-		if (turn_on)
-			type = type +
-			       100;
-#endif
-	}
-
-#endif
-
 	coex_dm->cur_ps_tdma_on = turn_on;
 	coex_dm->cur_ps_tdma = type;
 
@@ -1728,21 +1859,26 @@ void halbtc8821c1ant_ps_tdma(IN struct btc_coexist *btcoexist,
 	}
 
 	/* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */
-	if ((bt_link_info->slave_role) && (bt_link_info->a2dp_exist))
+	if (bt_link_info->slave_role)
 		psTdmaByte4Modify = 0x1;
 	else
 		psTdmaByte4Modify = 0x0;
 
 	if (pre_psTdmaByte4Modify != psTdmaByte4Modify) {
-
 		force_exec = true;
 		pre_psTdmaByte4Modify = psTdmaByte4Modify;
 	}
 
 	if (!force_exec) {
 		if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
-		    (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
+		    (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma)) {
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], Skip TDMA because no change TDMA(%s, %d)\n",
+				    (coex_dm->cur_ps_tdma_on ? "on" : "off"),
+				    coex_dm->cur_ps_tdma);
+			BTC_TRACE(trace_buf);
 			return;
+		}
 	}
 
 	if (coex_dm->cur_ps_tdma_on) {
@@ -1803,6 +1939,16 @@ void halbtc8821c1ant_ps_tdma(IN struct btc_coexist *btcoexist,
 			halbtc8821c1ant_set_fw_pstdma(btcoexist,
 					      0x61, 0x30, 0x03, 0x11, 0x10);
 			break;
+		case 11:
+			halbtc8821c1ant_set_fw_pstdma(btcoexist,
+					      0x65, 0x25, 0x03, 0x11,  0x11 |
+						      psTdmaByte4Modify);
+			break;
+		case 12:
+			halbtc8821c1ant_set_fw_pstdma(btcoexist,
+					      0x55, 0x30, 0x03, 0x10,  0x50 |
+						      psTdmaByte4Modify);
+			break;
 		case 13:
 			halbtc8821c1ant_set_fw_pstdma(btcoexist,
 					      0x51, 0x25, 0x03, 0x10,  0x50 |
@@ -1818,11 +1964,16 @@ void halbtc8821c1ant_ps_tdma(IN struct btc_coexist *btcoexist,
 					      0x51, 0x20, 0x03, 0x10,  0x50 |
 						      psTdmaByte4Modify);
 			break;
-		case 17:
+		case 16:
 			halbtc8821c1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x10, 0x03, 0x11,  0x14 |
+					      0x61, 0x10, 0x03, 0x11,  0x15 |
 						      psTdmaByte4Modify);
 			break;
+		case 17:
+			halbtc8821c1ant_set_fw_pstdma(btcoexist,
+					      0x61, 0x10, 0x03, 0x11, 0x14 |
+							psTdmaByte4Modify);
+			break;
 		case 18:
 			halbtc8821c1ant_set_fw_pstdma(btcoexist,
 					      0x51, 0x30, 0x03, 0x10,  0x50 |
@@ -1844,9 +1995,17 @@ void halbtc8821c1ant_ps_tdma(IN struct btc_coexist *btcoexist,
 			halbtc8821c1ant_set_fw_pstdma(btcoexist,
 					      0x61, 0x25, 0x03, 0x11, 0x10);
 			break;
+		case 23:
+			halbtc8821c1ant_set_fw_pstdma(btcoexist,
+					      0x61, 0x10, 0x03, 0x11, 0x10);
+			break;
+		case 27:
+			halbtc8821c1ant_set_fw_pstdma(btcoexist,
+					      0x61, 0x10, 0x03, 0x11, 0x15);
+			break;
 		case 32:
 			halbtc8821c1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x35, 0x03, 0x11, 0x10);
+					      0x61, 0x35, 0x03, 0x11, 0x11);
 			break;
 		case 33:
 			halbtc8821c1ant_set_fw_pstdma(btcoexist,
@@ -2104,28 +2263,23 @@ void halbtc8821c1ant_set_ext_ant_switch(IN struct btc_coexist *btcoexist,
 	/* swap control polarity if use different switch control polarity*/
 	/*  Normal switch polarity for DPDT, 0xcb4[29:28] = 2b'01 => BTG to Main, WLG to Aux,  0xcb4[29:28] = 2b'10 => BTG to Aux, WLG to Main */
 	/*  Normal switch polarity for SPDT, 0xcb4[29:28] = 2b'01 => Ant to BTG,  0xcb4[29:28] = 2b'10 => Ant to WLG */
-	switch_polatiry_inverse = (rfe_type->ext_ant_switch_ctrl_polarity == 1 ?
-			   ~switch_polatiry_inverse : switch_polatiry_inverse);
+	if (rfe_type->ext_ant_switch_ctrl_polarity)
+		switch_polatiry_inverse =  ~switch_polatiry_inverse;
 
 	/* swap control polarity if 1-Ant at Aux */
-	if ((rfe_type->ext_ant_switch_type ==
-	     BT_8821C_1ANT_EXT_ANT_SWITCH_USE_DPDT) &&
-	    (board_info->single_ant_path == 0))
+	if (rfe_type->ant_at_main_port == false)
 		switch_polatiry_inverse =  ~switch_polatiry_inverse;
 
 	switch (pos_type) {
 	default:
 	case BT_8821C_1ANT_EXT_ANT_SWITCH_TO_BT:
 	case BT_8821C_1ANT_EXT_ANT_SWITCH_TO_NOCARE:
+	case BT_8821C_1ANT_EXT_ANT_SWITCH_TO_WLA:
 
 		break;
 	case BT_8821C_1ANT_EXT_ANT_SWITCH_TO_WLG:
-		switch_polatiry_inverse = (rfe_type->wlg_Locate_at_btg
-					   == 0 ?  ~switch_polatiry_inverse :
-					   switch_polatiry_inverse);
-		break;
-	case BT_8821C_1ANT_EXT_ANT_SWITCH_TO_WLA:
-		/*switch_polatiry_inverse =  (rfe_type->ext_band_switch_exist == 1?  ~switch_polatiry_inverse: switch_polatiry_inverse);*/
+		if (!rfe_type->wlg_Locate_at_btg)
+			switch_polatiry_inverse =  ~switch_polatiry_inverse;
 		break;
 	}
 
@@ -2144,7 +2298,7 @@ void halbtc8821c1ant_set_ext_ant_switch(IN struct btc_coexist *btcoexist,
 			0xff, 0x77);	/* BB SW, DPDT use RFE_ctrl8 and RFE_ctrl9 as control pin */
 
 		regval_0xcb7 = (switch_polatiry_inverse == false ?
-			0x1 : 0x2);     /* 0xcb4[29:28] = 2b'01 for no switch_polatiry_inverse, DPDT_SEL_N =1, DPDT_SEL_P =0  */
+			0x1 : 0x2);     /* 0xcb4[29:28] = 2b'01 for no switch_polatiry_inverse, DPDT_SEL_N =1, DPDT_SEL_P =0 */
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb7,
 						   0x30, regval_0xcb7);
 
@@ -2223,24 +2377,6 @@ void halbtc8821c1ant_set_rfe_type(IN struct btc_coexist *btcoexist)
 {
 	struct  btc_board_info *board_info = &btcoexist->board_info;
 
-#if 0
-	rfe_type->ext_band_switch_exist = false;
-	rfe_type->ext_band_switch_type =
-		BT_8821C_1ANT_EXT_BAND_SWITCH_USE_SPDT;     /* SPDT; */
-	rfe_type->ext_band_switch_ctrl_polarity = 0;
-
-	if (rfe_type->ext_band_switch_exist) {
-
-		/* band switch use RFE_ctrl1 (pin name: PAPE_A) and RFE_ctrl3 (pin name: LNAON_A) */
-
-		/* set RFE_ctrl1 as software control */
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb0, 0xf0, 0x7);
-
-		/* set RFE_ctrl3 as software control */
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb1, 0xf0, 0x7);
-
-	}
-#endif
 
 	/* the following setup should be got from Efuse in the future */
 	rfe_type->rfe_module_type = board_info->rfe_type & 0x1f;
@@ -2254,62 +2390,67 @@ void halbtc8821c1ant_set_rfe_type(IN struct btc_coexist *btcoexist)
 		rfe_type->ext_ant_switch_type =
 			BT_8821C_1ANT_EXT_ANT_SWITCH_USE_DPDT;          /*2-Ant, DPDT, WLG*/
 		rfe_type->wlg_Locate_at_btg = false;
+		rfe_type->ant_at_main_port = true;
 		break;
 	case 1:
 		rfe_type->ext_ant_switch_exist = true;
 		rfe_type->ext_ant_switch_type =
-			BT_8821C_1ANT_EXT_ANT_SWITCH_USE_SPDT;          /*1-Ant, Main, DPDT or SPDT, WLG  */
+			BT_8821C_1ANT_EXT_ANT_SWITCH_USE_SPDT;          /*1-Ant, Main, DPDT or SPDT, WLG */
 		rfe_type->wlg_Locate_at_btg = false;
+		rfe_type->ant_at_main_port = true;
 		break;
 	case 2:
 		rfe_type->ext_ant_switch_exist = true;
 		rfe_type->ext_ant_switch_type =
-			BT_8821C_1ANT_EXT_ANT_SWITCH_USE_SPDT;            /*1-Ant, Main, DPDT or SPDT, BTG  */
+			BT_8821C_1ANT_EXT_ANT_SWITCH_USE_SPDT;            /*1-Ant, Main, DPDT or SPDT, BTG */
 		rfe_type->wlg_Locate_at_btg = true;
+		rfe_type->ant_at_main_port = true;
 		break;
 	case 3:
 		rfe_type->ext_ant_switch_exist = true;
 		rfe_type->ext_ant_switch_type =
-			BT_8821C_1ANT_EXT_ANT_SWITCH_USE_DPDT;          /*1-Ant, Aux, DPDT, WLG  */
+			BT_8821C_1ANT_EXT_ANT_SWITCH_USE_DPDT;          /*1-Ant, Aux, DPDT, WLG */
 		rfe_type->wlg_Locate_at_btg = false;
+		rfe_type->ant_at_main_port = false;
 		break;
 	case 4:
 		rfe_type->ext_ant_switch_exist = true;
 		rfe_type->ext_ant_switch_type =
-			BT_8821C_1ANT_EXT_ANT_SWITCH_USE_DPDT;          /*1-Ant, Aux, DPDT, BTG  */;
+			BT_8821C_1ANT_EXT_ANT_SWITCH_USE_DPDT;          /*1-Ant, Aux, DPDT, BTG */
 		rfe_type->wlg_Locate_at_btg = true;
+		rfe_type->ant_at_main_port = false;
 		break;
 	case 5:
-		rfe_type->ext_ant_switch_exist =
-			false;										 /*2-Ant, no antenna switch, WLG*/
+		rfe_type->ext_ant_switch_exist = false;			    /*2-Ant, no antenna switch, WLG*/
 		rfe_type->ext_ant_switch_type =
 			BT_8821C_1ANT_EXT_ANT_SWITCH_NONE;
 		rfe_type->wlg_Locate_at_btg = false;
+		rfe_type->ant_at_main_port = true;
 		break;
 	case 6:
-		rfe_type->ext_ant_switch_exist =
-			false;										 /*2-Ant, no antenna switch, WLG*/
+		rfe_type->ext_ant_switch_exist = false;			   /*2-Ant, no antenna switch, WLG*/
 		rfe_type->ext_ant_switch_type =
 			BT_8821C_1ANT_EXT_ANT_SWITCH_NONE;
 		rfe_type->wlg_Locate_at_btg = false;
+		rfe_type->ant_at_main_port = true;
 		break;
 	case 7:
-		rfe_type->ext_ant_switch_exist =
-			true;										 /*2-Ant, DPDT, BTG*/
+		rfe_type->ext_ant_switch_exist = true;			 /*2-Ant, DPDT, BTG*/
 		rfe_type->ext_ant_switch_type =
 			BT_8821C_1ANT_EXT_ANT_SWITCH_USE_DPDT;
 		rfe_type->wlg_Locate_at_btg = true;
+		rfe_type->ant_at_main_port = true;
 		break;
 	}
 
-
+#if 0
 	if (rfe_type->wlg_Locate_at_btg)
 		halbtc8821c1ant_set_int_block(btcoexist, FORCE_EXEC,
 			      BT_8821C_1ANT_INT_BLOCK_SWITCH_TO_WLG_OF_BTG);
 	else
 		halbtc8821c1ant_set_int_block(btcoexist, FORCE_EXEC,
 			      BT_8821C_1ANT_INT_BLOCK_SWITCH_TO_WLG_OF_WLAG);
-
+#endif
 
 }
 
@@ -2325,24 +2466,19 @@ void halbtc8821c1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 	u32			u32tmp1 = 0, u32tmp2 = 0, u32tmp3 = 0;
 	u16			u16tmp1 = 0;
 
-#if BT_8821C_1ANT_ANTDET_ENABLE
 
-	if (ant_pos_type == BTC_ANT_PATH_PTA) {
-		if ((board_info->btdm_ant_det_finish) &&
-		    (board_info->btdm_ant_num_by_ant_det == 2)) {
-			if (board_info->btdm_ant_pos ==
-			    BTC_ANTENNA_AT_MAIN_PORT)
-				ant_pos_type = BTC_ANT_PATH_WIFI;
-			else
-				ant_pos_type = BTC_ANT_PATH_BT;
-		}
+	u32tmp1 = halbtc8821c1ant_ltecoex_indirect_read_reg(btcoexist,
+			0x38);
+
+	/* To avoid indirect access fail  */
+	if (((u32tmp1 & 0xf000) >> 12) != ((u32tmp1 & 0x0f00) >> 8)) {
+		force_exec = true;
+		coex_sta->gnt_error_cnt++;
 	}
 
-#endif
 
-#if 1
-	u32tmp1 = halbtc8821c1ant_ltecoex_indirect_read_reg(btcoexist,
-			0x38);
+#if BT_8821C_1ANT_COEX_DBG
+
 	u32tmp2 = halbtc8821c1ant_ltecoex_indirect_read_reg(btcoexist,
 			0x54);
 	u8tmp  = btcoexist->btc_read_1byte(btcoexist, 0x73);
@@ -2484,14 +2620,14 @@ void halbtc8821c1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 
 		/* set GNT_BT to SW Low */
 		halbtc8821c1ant_ltecoex_set_gnt_bt(btcoexist,
-					   BT_8821C_1ANT_GNT_BLOCK_RFC_BB,
-					   BT_8821C_1ANT_GNT_TYPE_CTRL_BY_SW,
-					   BT_8821C_1ANT_SIG_STA_SET_TO_LOW);
+						BT_8821C_1ANT_GNT_BLOCK_RFC_BB,
+						BT_8821C_1ANT_GNT_TYPE_CTRL_BY_SW,
+						BT_8821C_1ANT_SIG_STA_SET_TO_LOW);
 		/* Set GNT_WL to SW high */
 		halbtc8821c1ant_ltecoex_set_gnt_wl(btcoexist,
-					   BT_8821C_1ANT_GNT_BLOCK_RFC_BB,
-					   BT_8821C_1ANT_GNT_TYPE_CTRL_BY_SW,
-					   BT_8821C_1ANT_SIG_STA_SET_TO_HIGH);
+						BT_8821C_1ANT_GNT_BLOCK_RFC_BB,
+						BT_8821C_1ANT_GNT_TYPE_CTRL_BY_SW,
+						BT_8821C_1ANT_SIG_STA_SET_TO_HIGH);
 
 		coex_sta->run_time_state = false;
 
@@ -2510,9 +2646,9 @@ void halbtc8821c1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 
 		/* Set Ext Ant Switch to BT control at wifi off step */
 		halbtc8821c1ant_set_ext_ant_switch(btcoexist,
-						   FORCE_EXEC,
-				   BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_BT,
-				   BT_8821C_1ANT_EXT_ANT_SWITCH_TO_NOCARE);
+						FORCE_EXEC,
+						BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_BT,
+						BT_8821C_1ANT_EXT_ANT_SWITCH_TO_NOCARE);
 
 		coex_sta->run_time_state = false;
 		break;
@@ -2705,7 +2841,8 @@ void halbtc8821c1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		}
 
 	}
-#if 1
+
+#if BT_8821C_1ANT_COEX_DBG
 	u32tmp1 = halbtc8821c1ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
 	u32tmp2 = halbtc8821c1ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
 	u32tmp3 = btcoexist->btc_read_4byte(btcoexist, 0xcb4);
@@ -2799,7 +2936,7 @@ boolean halbtc8821c1ant_is_common_action(IN struct btc_coexist *btcoexist)
  *	Non-Software Coex Mechanism start
  *
  * ********************************************* */
-void halbtc8821c1ant_action_bt_whck_test(IN struct btc_coexist *btcoexist)
+void halbtc8821c1ant_action_bt_whql_test(IN struct btc_coexist *btcoexist)
 {
 	halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
 	halbtc8821c1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
@@ -2807,43 +2944,53 @@ void halbtc8821c1ant_action_bt_whck_test(IN struct btc_coexist *btcoexist)
 	halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 }
 
-void halbtc8821c1ant_action_wifi_under5g(IN struct btc_coexist *btcoexist)
+void halbtc8821c1ant_action_bt_hs(IN struct btc_coexist *btcoexist)
 {
+	halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
+	halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
+}
 
+void halbtc8821c1ant_action_bt_relink(IN struct btc_coexist *btcoexist)
+{
+	/*halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5); */
 	halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
 	halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-
-	halbtc8821c1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-				     BT_8821C_1ANT_PHASE_5G_RUNTIME);
+	coex_sta->bt_relink_downcount = 2;
 }
 
-
-void halbtc8821c1ant_action_wifi_only(IN struct btc_coexist *btcoexist)
+void halbtc8821c1ant_action_bt_idle(IN struct btc_coexist *btcoexist)
 {
-	halbtc8821c1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
-	halbtc8821c1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
-				     BT_8821C_1ANT_PHASE_2G_RUNTIME);
-	halbtc8821c1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 7);
-}
+	boolean wifi_busy = false;
 
-void halbtc8821c1ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
-{
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
-	halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-	halbtc8821c1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-				     BT_8821C_1ANT_PHASE_2G_RUNTIME);
+	if (!wifi_busy) {
+		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+					6);
+		halbtc8821c1ant_coex_table_with_type(btcoexist,
+						     NORMAL_EXEC, 3);
 
-	if (!bt_link_info->pan_exist)
-		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-	else
-		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
-}
+	} else {  /* if wl busy */
+
+		if (BT_8821C_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
+		    coex_dm->bt_status) {
+
+			halbtc8821c1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 8);
+
+			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+						33);
+		} else {
+
+			halbtc8821c1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 8);
+			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+						32);
+
+		}
+
+	}
 
-void halbtc8821c1ant_action_hs(IN struct btc_coexist *btcoexist)
-{
-	halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
-	halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
 }
 
 void halbtc8821c1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
@@ -2857,74 +3004,58 @@ void halbtc8821c1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
 			   &wifi_connected);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 	btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
 
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam);
 
 
-	if ((wifi_link) || (wifi_roam) || (coex_sta->wifi_is_high_pri_task)) {
+	if ((coex_sta->bt_create_connection) && ((wifi_link) || (wifi_roam)
+		|| (wifi_scan) || (wifi_busy) || (coex_sta->wifi_is_high_pri_task))) {
 
-		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33);
-
-		if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist))
-			halbtc8821c1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 1);
-		else
-			halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6);
-
-	} else if (((wifi_scan) || (wifi_busy)) &&
-		   (coex_sta->bt_create_connection)) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], Wifi link/roam/Scan/busy/hi-pri-task + BT Inq/Page!!\n");
+		BTC_TRACE(trace_buf);
 
-		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
+		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
 
-		if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist))
-			halbtc8821c1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 1);
+		if ((bt_link_info->a2dp_exist) && (!bt_link_info->pan_exist))
+			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17);
 		else
-			halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6);
-
+			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33);
 	} else if ((!wifi_connected) && (!wifi_scan)) {
 
 		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-	} else if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist)) {
 
-		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6);
-		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
-
-	} else if ((bt_link_info->a2dp_exist) && (bt_link_info->pan_exist)) {
+		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+	} else if (bt_link_info->pan_exist) {
 
 		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
-		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
-
-	} else if (bt_link_info->a2dp_exist) {
-
-		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
 
 		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
-	} else if (wifi_scan) {
-
-		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
 
-		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+	} else if (bt_link_info->a2dp_exist) {
 
-	} else if (wifi_busy) {
-		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 21);
+		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 16);
 
 		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 	} else {
-		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 19);
+
+		if ((wifi_link) || (wifi_roam) || (wifi_scan) || (wifi_busy)
+			|| (coex_sta->wifi_is_high_pri_task))
+			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 21);
+		else
+			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 23);
 
 		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 	}
 }
 
 void halbtc8821c1ant_action_bt_sco_hid_only_busy(IN struct btc_coexist
-		*btcoexist, IN u8 wifi_status)
+		*btcoexist)
 {
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean	wifi_connected = false;
+	boolean	wifi_connected = false, wifi_busy = false;
 	u32  wifi_bw = 1;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
@@ -2933,75 +3064,170 @@ void halbtc8821c1ant_action_bt_sco_hid_only_busy(IN struct btc_coexist
 	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
 			   &wifi_bw);
 
-	if ((wifi_bw == 0) &&
-	    ((coex_sta->hid_busy_num >= 2) ||
-	     (bt_link_info->sco_exist))) { /* if 11bg mode */
-		/*for 4/18 hid or SCO/eSCo */
-		halbtc8821c1ant_coex_table_with_type(btcoexist,
-						     NORMAL_EXEC, 9);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+
+
+	if (bt_link_info->sco_exist) {
 		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC,
-					true, 10);
-	} else {
-		if (bt_link_info->sco_exist) {
-			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC,
-						true, 5);
-			halbtc8821c1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 5);
-		} else { /* HID */
-			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC,
-						true, 6);
+					true, 5);
+		halbtc8821c1ant_coex_table_with_type(btcoexist,
+						     NORMAL_EXEC, 5);
+	} else if (coex_sta->hid_busy_num >= 2) {  /*for 4/18 hid */
+
+		/* if 11bg mode */
+		if (wifi_bw == 0) {
+
 			halbtc8821c1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 5);
+							     NORMAL_EXEC, 6);
+			halbtc8821c1ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x1, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
+			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+						11);
+		} else {
+
+			if (wifi_busy) {
+
+				halbtc8821c1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 6);
+				halbtc8821c1ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x2, 0xaa,
+								0x5a, 0xaa,
+									0xaa);
+				halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							11);
+			} else {
+
+				halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+							true, 6);
+				halbtc8821c1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 3);
+
+			}
 		}
+	} else {
+		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+					true, 6);
+		halbtc8821c1ant_coex_table_with_type(btcoexist,
+						     NORMAL_EXEC, 3);
 	}
 }
 
+void halbtc8821c1ant_action_wifi_under5g(IN struct btc_coexist *btcoexist)
+{
+
+	halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
+	halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+
+	halbtc8821c1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
+				     BT_8821C_1ANT_PHASE_5G_RUNTIME);
+}
+
+
+void halbtc8821c1ant_action_wifi_only(IN struct btc_coexist *btcoexist)
+{
+	halbtc8821c1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
+	halbtc8821c1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
+				     BT_8821C_1ANT_PHASE_2G_RUNTIME);
+	halbtc8821c1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 7);
+}
+
+void halbtc8821c1ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
+{
+	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+
+	halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
+	halbtc8821c1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
+				     BT_8821C_1ANT_PHASE_2G_RUNTIME);
+
+	if (!bt_link_info->pan_exist)
+		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+	else
+		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
+}
+
+
+void halbtc8821c1ant_action_wifi_linkscan_process(IN struct btc_coexist
+		*btcoexist)
+{
+	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+
+	if (bt_link_info->pan_exist) {
+
+		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
+
+		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+
+	} else if (bt_link_info->a2dp_exist) {
+
+		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 27);
+
+		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+	} else {
+
+		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 21);
+
+		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+	}
+
+}
+
 void halbtc8821c1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist
-		*btcoexist, IN u8 wifi_status)
+		*btcoexist)
 {
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 	boolean			wifi_busy = false, wifi_turbo = false;
+	u32  wifi_bw = 1;
+
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
+			   &wifi_bw);
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
 			   &coex_sta->scan_ap_num);
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "############# [BTCoex],  scan_ap_num = %d\n",
-		    coex_sta->scan_ap_num);
+		"############# [BTCoex],  scan_ap_num = %d, wl_noisy_level = %d\n",
+		    coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
 	BTC_TRACE(trace_buf);
+
 #if 1
-	if ((wifi_busy) && (coex_sta->scan_ap_num <= 4))
+
+	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
 		wifi_turbo = true;
 #endif
-	if (bt_link_info->hid_only) { /* HID */
-		halbtc8821c1ant_action_bt_sco_hid_only_busy(btcoexist,
-				wifi_status);
-		return;
+
+	if ((coex_sta->bt_relink_downcount != 0)
+			&& (!bt_link_info->pan_exist) && (wifi_busy)) {
+
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"############# [BTCoex],  BT Re-Link + A2DP + WL busy\n");
+		BTC_TRACE(trace_buf);
+
+		/*halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);*/
+		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
+		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+
 	} else if (bt_link_info->a2dp_only) { /* A2DP		 */
-		if (BT_8821C_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifi_status) {
+		if (!wifi_busy) {
+
+			/* halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+						32); */
+
 			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						32);
+						27);
 			halbtc8821c1ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 4);
 		} else {
 
-			if (coex_sta->scan_ap_num >=
-			    BT_8821C_1ANT_WIFI_NOISY_THRESH)  {
-
-				if (coex_sta->is_setupLink)
-					halbtc8821c1ant_ps_tdma(btcoexist,
-							NORMAL_EXEC, true, 67);
-				else
-					halbtc8821c1ant_ps_tdma(btcoexist,
+			if (coex_sta->wl_noisy_level == 2)
+				halbtc8821c1ant_ps_tdma(btcoexist,
 							NORMAL_EXEC, true, 17);
-			}	else {
-				if (coex_sta->is_setupLink)
-					halbtc8821c1ant_ps_tdma(btcoexist,
-							NORMAL_EXEC, true, 57);
-				else
-					halbtc8821c1ant_ps_tdma(btcoexist,
+			else
+				halbtc8821c1ant_ps_tdma(btcoexist,
 							NORMAL_EXEC, true, 7);
-			}
 
 			if (wifi_turbo)
 				halbtc8821c1ant_coex_table_with_type(btcoexist,
@@ -3015,7 +3241,18 @@ void halbtc8821c1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist
 		   (bt_link_info->hid_exist && bt_link_info->a2dp_exist &&
 		bt_link_info->pan_exist)) { /* A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) */
 
-		if (wifi_busy)	{
+		if ((bt_link_info->hid_exist) &&
+		    (coex_sta->hid_busy_num >= 2)) {
+			halbtc8821c1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 6);
+			halbtc8821c1ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x2, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
+			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+						12);
+		} else if (wifi_busy)	{
 			if (((coex_sta->a2dp_bit_pool > 40) &&
 			     (coex_sta->a2dp_bit_pool < 255)) ||
 			    (!coex_sta->is_A2DP_3M))
@@ -3032,7 +3269,8 @@ void halbtc8821c1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist
 						14);
 
 		if (bt_link_info->hid_exist)
-			halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+			halbtc8821c1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 1);
 		else if (wifi_turbo)
 			halbtc8821c1ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 8);
@@ -3042,324 +3280,101 @@ void halbtc8821c1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist
 	} else if (bt_link_info->hid_exist &&
 		   bt_link_info->a2dp_exist) { /* HID+A2DP */
 
-		if (coex_sta->is_setupLink)	{
-			halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-							     1);
-			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 58);
+		if ((wifi_busy) && (coex_sta->hid_busy_num >= 2)) {/*for 4/18 hid */
+			halbtc8821c1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 6);
+
+			if (wifi_bw == 0)  /* 11bg mode */
+			  halbtc8821c1ant_set_wltoggle_coex_table(
+				btcoexist,
+				NORMAL_EXEC,
+				0x1, 0xaa,
+				0x5a, 0xaa,
+				0xaa);
+			else
+			  halbtc8821c1ant_set_wltoggle_coex_table(
+				btcoexist,
+				NORMAL_EXEC,
+				0x2, 0xaa,
+				0x5a, 0xaa,
+				0xaa);
+			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+						true,
+						9);
 		} else {
+			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+						true,
+						8);
+			halbtc8821c1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 1);
+		}
 
-			if ((wifi_busy) && (coex_sta->hid_busy_num >= 2)) { /*for 4/18 hid */
-				halbtc8821c1ant_coex_table_with_type(btcoexist,
+	} else if ((bt_link_info->pan_only)
+		   || (bt_link_info->hid_exist && bt_link_info->pan_exist)) {
+		/* PAN(OPP,FTP), HID+PAN(OPP,FTP) */
+
+		if ((bt_link_info->hid_exist) && (bt_link_info->pan_exist) &&
+			(coex_sta->hid_busy_num >= 2)) {
+
+			halbtc8821c1ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 6);
-				halbtc8821c1ant_set_wltoggle_coex_table(btcoexist,
-								NORMAL_EXEC,
-								0x2, 0xaa,
-								0x5a, 0xaa,
-									0xaa);
+			if (wifi_bw == 0)  /* 11bg mode */
+				halbtc8821c1ant_set_wltoggle_coex_table(
+				btcoexist,
+				NORMAL_EXEC,
+				0x1, 0xaa,
+				0x5a, 0xaa,
+				0xaa);
+			else
+				halbtc8821c1ant_set_wltoggle_coex_table(
+				btcoexist,
+				NORMAL_EXEC,
+				0x2, 0xaa,
+				0x5a, 0xaa,
+				0xaa);
+
+			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+						true, 12);
+		} else {
+
+			if (!wifi_busy)
 				halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-							9);
-			} else {
+							4);
+			else
 				halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-							8);
+							3);
+
+			if (bt_link_info->hid_exist)
 				halbtc8821c1ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 1);
-			}
-		}
-
-	} else if ((bt_link_info->pan_only) || (bt_link_info->hid_exist &&
-		bt_link_info->pan_exist)) {            /* PAN(OPP,FTP), HID+PAN(OPP,FTP) */
-		if (BT_8821C_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifi_status)
-			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						4);
-		else
-			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						3);
-
-		if (bt_link_info->hid_exist)
-			halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
-		else if (wifi_turbo)
-			halbtc8821c1ant_coex_table_with_type(btcoexist,
+			else if (wifi_turbo)
+				halbtc8821c1ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 8);
-		else
-			halbtc8821c1ant_coex_table_with_type(btcoexist,
+			else
+				halbtc8821c1ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 4);
+		}
 	} else {
 		/* BT no-profile busy (0x9) */
 		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33);
 		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 	}
+
 }
 
 void halbtc8821c1ant_action_wifi_not_connected(IN struct btc_coexist *btcoexist)
 {
 	/* tdma and coex table */
 	halbtc8821c1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
-	halbtc8821c1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-				     BT_8821C_1ANT_PHASE_2G_RUNTIME);
-	halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-}
-
-void halbtc8821c1ant_action_wifi_not_connected_scan(IN struct btc_coexist
-		*btcoexist)
-{
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean wifi_connected = false, bt_hs_on = false;
-	u32	wifi_link_status = 0;
-	u32	num_of_wifi_link = 0;
-	boolean	bt_ctrl_agg_buf_size = false;
-	u8	agg_buf_size = 5;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
-	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
-			   &wifi_link_status);
-
-	num_of_wifi_link = wifi_link_status >> 16;
-
-	if (num_of_wifi_link >= 2) {
-		halbtc8821c1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
-		halbtc8821c1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
-					   bt_ctrl_agg_buf_size, agg_buf_size);
-
-		if (coex_sta->c2h_bt_inquiry_page) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"############# [BTCoex],  BT Is Inquirying\n");
-			BTC_TRACE(trace_buf);
-			halbtc8821c1ant_action_bt_inquiry(btcoexist);
-		} else
-			halbtc8821c1ant_action_wifi_multi_port(btcoexist);
-		return;
-	}
-
-	if (coex_sta->c2h_bt_inquiry_page) {
-		halbtc8821c1ant_action_bt_inquiry(btcoexist);
-		return;
-	} else if (bt_hs_on) {
-		halbtc8821c1ant_action_hs(btcoexist);
-		return;
-	}
-
-	/* tdma and coex table */
-	if (BT_8821C_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
-		if (bt_link_info->a2dp_exist) {
-			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						32);
-			halbtc8821c1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-		} else if (bt_link_info->a2dp_exist &&
-			   bt_link_info->pan_exist) {
-			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						22);
-			halbtc8821c1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-		} else {
-			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						20);
-			halbtc8821c1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-		}
-	} else if ((BT_8821C_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
-		   (BT_8821C_1ANT_BT_STATUS_ACL_SCO_BUSY ==
-		    coex_dm->bt_status)) {
-		halbtc8821c1ant_action_bt_sco_hid_only_busy(btcoexist,
-				BT_8821C_1ANT_WIFI_STATUS_CONNECTED_SCAN);
-	} else {
-		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
-	}
-}
-
-void halbtc8821c1ant_action_wifi_connected_scan(IN struct btc_coexist
-		*btcoexist)
-{
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean wifi_connected = false, bt_hs_on = false;
-	u32	wifi_link_status = 0;
-	u32	num_of_wifi_link = 0;
-	boolean	bt_ctrl_agg_buf_size = false;
-	u8	agg_buf_size = 5;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
-	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
-			   &wifi_link_status);
-
-	num_of_wifi_link = wifi_link_status >> 16;
-
-	if (num_of_wifi_link >= 2) {
-		halbtc8821c1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
-		halbtc8821c1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
-					   bt_ctrl_agg_buf_size, agg_buf_size);
-
-		if (coex_sta->c2h_bt_inquiry_page) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"############# [BTCoex],  BT Is Inquirying\n");
-			BTC_TRACE(trace_buf);
-			halbtc8821c1ant_action_bt_inquiry(btcoexist);
-		} else
-			halbtc8821c1ant_action_wifi_multi_port(btcoexist);
-		return;
-	}
-
-	if (coex_sta->c2h_bt_inquiry_page) {
-		halbtc8821c1ant_action_bt_inquiry(btcoexist);
-		return;
-	} else if (bt_hs_on) {
-		halbtc8821c1ant_action_hs(btcoexist);
-		return;
-	}
-
-
-	/* tdma and coex table */
-	if (BT_8821C_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
-		if (bt_link_info->a2dp_exist) {
-			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						32);
-			halbtc8821c1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-		} else if (bt_link_info->a2dp_exist &&
-			   bt_link_info->pan_exist) {
-			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						22);
-			halbtc8821c1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-		} else {
-			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						20);
-			halbtc8821c1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-		}
-	} else if ((BT_8821C_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
-		   (BT_8821C_1ANT_BT_STATUS_ACL_SCO_BUSY ==
-		    coex_dm->bt_status)) {
-		halbtc8821c1ant_action_bt_sco_hid_only_busy(btcoexist,
-				BT_8821C_1ANT_WIFI_STATUS_CONNECTED_SCAN);
-	} else {
-		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
-	}
-}
-
-void halbtc8821c1ant_action_wifi_not_connected_asso_auth(
-	IN struct btc_coexist *btcoexist)
-{
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean wifi_connected = false, bt_hs_on = false;
-	u32	wifi_link_status = 0;
-	u32	num_of_wifi_link = 0;
-	boolean	bt_ctrl_agg_buf_size = false;
-	u8	agg_buf_size = 5;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
-	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
-			   &wifi_link_status);
 
-	num_of_wifi_link = wifi_link_status >> 16;
-
-	if (num_of_wifi_link >= 2) {
-		halbtc8821c1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
-		halbtc8821c1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
-					   bt_ctrl_agg_buf_size, agg_buf_size);
-
-		if (coex_sta->c2h_bt_inquiry_page) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"############# [BTCoex],  BT Is Inquirying\n");
-			BTC_TRACE(trace_buf);
-			halbtc8821c1ant_action_bt_inquiry(btcoexist);
-		} else
-			halbtc8821c1ant_action_wifi_multi_port(btcoexist);
-		return;
-	}
-
-	if (coex_sta->c2h_bt_inquiry_page) {
-		halbtc8821c1ant_action_bt_inquiry(btcoexist);
-		return;
-	} else if (bt_hs_on) {
-		halbtc8821c1ant_action_hs(btcoexist);
-		return;
-	}
-
-	/* tdma and coex table */
-	if ((bt_link_info->sco_exist)  || (bt_link_info->hid_exist) ||
-	    (bt_link_info->a2dp_exist)) {
-		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
-		halbtc8821c1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 4);
-	} else if (bt_link_info->pan_exist) {
-		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
-		halbtc8821c1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 4);
-	} else {
-		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-		halbtc8821c1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 2);
-	}
-}
-
-void halbtc8821c1ant_action_wifi_connected_specific_packet(
-	IN struct btc_coexist *btcoexist)
-{
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean wifi_connected = false, bt_hs_on = false;
-	u32	wifi_link_status = 0;
-	u32	num_of_wifi_link = 0;
-	boolean	bt_ctrl_agg_buf_size = false;
-	u8	agg_buf_size = 5;
-	boolean wifi_busy = false;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
-	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
-			   &wifi_link_status);
-
-	num_of_wifi_link = wifi_link_status >> 16;
-
-	if (num_of_wifi_link >= 2) {
-		halbtc8821c1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
-		halbtc8821c1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
-					   bt_ctrl_agg_buf_size, agg_buf_size);
-
-		if (coex_sta->c2h_bt_inquiry_page) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"############# [BTCoex],  BT Is Inquirying\n");
-			BTC_TRACE(trace_buf);
-			halbtc8821c1ant_action_bt_inquiry(btcoexist);
-		} else
-			halbtc8821c1ant_action_wifi_multi_port(btcoexist);
-		return;
-	}
-
-	if (coex_sta->c2h_bt_inquiry_page) {
-		halbtc8821c1ant_action_bt_inquiry(btcoexist);
-		return;
-	} else if (bt_hs_on) {
-		halbtc8821c1ant_action_hs(btcoexist);
-		return;
-	}
-
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
-
-	/* no specific packet process for both WiFi and BT very busy */
-	if ((wifi_busy) && ((bt_link_info->pan_exist) ||
-			    (coex_sta->num_of_profile >= 2)))
-		return;
-
-	/* tdma and coex table */
-	if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist)) {
-		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
-		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
-	} else if (bt_link_info->a2dp_exist) {
-		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
-		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
-	} else if (bt_link_info->pan_exist) {
-		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
-		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
-	} else {
-		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-		halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
-	}
+	halbtc8821c1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 }
 
 void halbtc8821c1ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
 {
+	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 	boolean	wifi_busy = false;
-	boolean		scan = false, link = false, roam = false;
-	boolean		under_4way = false, wifi_under_5g = false;
+	boolean	wifi_under_5g = false;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], CoexForWifiConnect()===>\n");
@@ -3381,72 +3396,22 @@ void halbtc8821c1ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
 				     NORMAL_EXEC,
 				     BT_8821C_1ANT_PHASE_2G_RUNTIME);
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
-			   &under_4way);
-	if (under_4way) {
-		halbtc8821c1ant_action_wifi_connected_specific_packet(
-			btcoexist);
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], CoexForWifiConnect(), return for wifi is under 4way<===\n");
-		BTC_TRACE(trace_buf);
-		return;
-	}
+	if (BT_8821C_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
-	if (scan || link || roam) {
-		if (scan)
-			halbtc8821c1ant_action_wifi_connected_scan(btcoexist);
+		if (bt_link_info->hid_only)  /* HID only */
+			halbtc8821c1ant_action_bt_sco_hid_only_busy(btcoexist);
 		else
-			halbtc8821c1ant_action_wifi_connected_specific_packet(
+			halbtc8821c1ant_action_wifi_connected_bt_acl_busy(
 				btcoexist);
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n");
-		BTC_TRACE(trace_buf);
-		return;
-	}
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
-
-
-	/* tdma and coex table */
-	if (!wifi_busy) {
-		if (BT_8821C_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
-			halbtc8821c1ant_action_wifi_connected_bt_acl_busy(
-				btcoexist,
-				BT_8821C_1ANT_WIFI_STATUS_CONNECTED_IDLE);
-		} else if ((BT_8821C_1ANT_BT_STATUS_SCO_BUSY ==
-			    coex_dm->bt_status) ||
-			   (BT_8821C_1ANT_BT_STATUS_ACL_SCO_BUSY ==
-			    coex_dm->bt_status)) {
-			halbtc8821c1ant_action_bt_sco_hid_only_busy(btcoexist,
-				BT_8821C_1ANT_WIFI_STATUS_CONNECTED_IDLE);
-		} else {
-			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
-						8);
-			halbtc8821c1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 2);
-		}
-	} else {
-		if (BT_8821C_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
-			halbtc8821c1ant_action_wifi_connected_bt_acl_busy(
-				btcoexist,
-				BT_8821C_1ANT_WIFI_STATUS_CONNECTED_BUSY);
-		} else if ((BT_8821C_1ANT_BT_STATUS_SCO_BUSY ==
-			    coex_dm->bt_status) ||
-			   (BT_8821C_1ANT_BT_STATUS_ACL_SCO_BUSY ==
-			    coex_dm->bt_status)) {
-			halbtc8821c1ant_action_bt_sco_hid_only_busy(btcoexist,
-				BT_8821C_1ANT_WIFI_STATUS_CONNECTED_BUSY);
-		} else {
+	} else if ((BT_8821C_1ANT_BT_STATUS_SCO_BUSY ==
+		    coex_dm->bt_status) ||
+		   (BT_8821C_1ANT_BT_STATUS_ACL_SCO_BUSY ==
+		    coex_dm->bt_status))
+		halbtc8821c1ant_action_bt_sco_hid_only_busy(btcoexist);
+	else
+		halbtc8821c1ant_action_bt_idle(btcoexist);
 
-			halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						32);
-			halbtc8821c1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
-		}
-	}
 }
 
 void halbtc8821c1ant_run_sw_coexist_mechanism(IN struct btc_coexist *btcoexist)
@@ -3541,6 +3506,13 @@ void halbtc8821c1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 	u32	wifi_link_status = 0;
 	u32	num_of_wifi_link = 0, wifi_bw;
 	u8	iot_peer = BTC_IOT_PEER_UNKNOWN;
+	boolean	scan = false, link = false, roam = false, under_4way = false;
+
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
+			   &under_4way);
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], RunCoexistMechanism()===>\n");
@@ -3591,21 +3563,22 @@ void halbtc8821c1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 
 		halbtc8821c1ant_action_wifi_under5g(btcoexist);
 		return;
-	}
+	} else {
 
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "[BTCoex], WiFi is under 2G!!!\n");
-	BTC_TRACE(trace_buf);
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], WiFi is under 2G!!!\n");
+		BTC_TRACE(trace_buf);
 
-	halbtc8821c1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
-				     NORMAL_EXEC,
-				     BT_8821C_1ANT_PHASE_2G_RUNTIME);
+		halbtc8821c1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
+					     NORMAL_EXEC,
+					     BT_8821C_1ANT_PHASE_2G_RUNTIME);
+	}
 
 	if (coex_sta->bt_whck_test) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], BT is under WHCK TEST!!!\n");
 		BTC_TRACE(trace_buf);
-		halbtc8821c1ant_action_bt_whck_test(btcoexist);
+		halbtc8821c1ant_action_bt_whql_test(btcoexist);
 		return;
 	}
 
@@ -3616,6 +3589,21 @@ void halbtc8821c1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 		return;
 	}
 
+	if (coex_sta->c2h_bt_inquiry_page) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], BT is under inquiry/page scan !!\n");
+		BTC_TRACE(trace_buf);
+		halbtc8821c1ant_action_bt_inquiry(btcoexist);
+		return;
+	}
+
+	if (coex_sta->is_setupLink) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], BT is re-link !!!\n");
+		halbtc8821c1ant_action_bt_relink(btcoexist);
+		return;
+	}
+
 	if ((BT_8821C_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
 	    (BT_8821C_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
 	    (BT_8821C_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status))
@@ -3623,11 +3611,10 @@ void halbtc8821c1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 
 	btcoexist->btc_set(btcoexist, BTC_SET_BL_INC_SCAN_DEV_NUM,
 			   &increase_scan_dev_num);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
-			   &wifi_connected);
 
 	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
 			   &wifi_link_status);
+
 	num_of_wifi_link = wifi_link_status >> 16;
 
 	if ((num_of_wifi_link >= 2) ||
@@ -3637,117 +3624,108 @@ void halbtc8821c1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 			    num_of_wifi_link, wifi_link_status);
 		BTC_TRACE(trace_buf);
 
-		if (bt_link_info->bt_link_exist) {
-			halbtc8821c1ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 1,
-						   0, 1);
+		if (bt_link_info->bt_link_exist)
 			miracast_plus_bt = true;
-		} else {
-			halbtc8821c1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0,
-						   0, 0);
+		else
 			miracast_plus_bt = false;
-		}
+
 		btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
 				   &miracast_plus_bt);
+
 		halbtc8821c1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
-					   bt_ctrl_agg_buf_size, agg_buf_size);
+					   false, 0x5);
+
+		if (scan || link || roam || under_4way) {
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], scan = %d, link = %d, roam = %d 4way = %d!!!\n",
+				    scan, link, roam, under_4way);
+			BTC_TRACE(trace_buf);
 
-		if (coex_sta->c2h_bt_inquiry_page) {
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"############# [BTCoex],  BT Is Inquirying\n");
+				"[BTCoex], wifi is under linkscan process + Multi-Port !!\n");
 			BTC_TRACE(trace_buf);
-			halbtc8821c1ant_action_bt_inquiry(btcoexist);
+
+			halbtc8821c1ant_action_wifi_linkscan_process(btcoexist);
 		} else
 			halbtc8821c1ant_action_wifi_multi_port(btcoexist);
 
-
 		return;
-	}
+	} else {
 
-	miracast_plus_bt = false;
-	btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
-			   &miracast_plus_bt);
+		miracast_plus_bt = false;
+		btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
+				   &miracast_plus_bt);
+	}
 
 	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
+			   &wifi_connected);
 
 	if ((bt_link_info->bt_link_exist) && (wifi_connected)) {
-		halbtc8821c1ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 1, 0, 1);
 
 		btcoexist->btc_get(btcoexist, BTC_GET_U1_IOT_PEER, &iot_peer);
 
-		if (BTC_IOT_PEER_CISCO != iot_peer) {
-			if (bt_link_info->sco_exist) /* if (bt_link_info->bt_hi_pri_link_exist) */
+		if (BTC_IOT_PEER_CISCO == iot_peer) {
+
+			if (BTC_WIFI_BW_HT40 == wifi_bw)
 				halbtc8821c1ant_limited_rx(btcoexist,
-					   NORMAL_EXEC, true, false, 0x5);
+					   NORMAL_EXEC, false, true, 0x10);
 			else
 				halbtc8821c1ant_limited_rx(btcoexist,
-					   NORMAL_EXEC, false, false, 0x5);
-		} else {
-			if (bt_link_info->sco_exist)
-				halbtc8821c1ant_limited_rx(btcoexist,
-					   NORMAL_EXEC, true, false, 0x5);
-			else {
-				if (BTC_WIFI_BW_HT40 == wifi_bw)
-					halbtc8821c1ant_limited_rx(btcoexist,
-						NORMAL_EXEC, false, true, 0x10);
-				else
-					halbtc8821c1ant_limited_rx(btcoexist,
-						NORMAL_EXEC, false, true, 0x8);
-			}
-		}
+					   NORMAL_EXEC, false, true, 0x8);
+		}  else
+			halbtc8821c1ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
+						   0x5);
+	}
 
-		halbtc8821c1ant_run_sw_coexist_mechanism(
-			btcoexist);  /* just print debug message */
-	} else {
-		halbtc8821c1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
+	halbtc8821c1ant_run_sw_coexist_mechanism(
+		btcoexist); /* just print debug message */
 
-		halbtc8821c1ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
-					   0x5);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
 
-		halbtc8821c1ant_run_sw_coexist_mechanism(
-			btcoexist); /* just print debug message */
+	if (bt_hs_on) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "############# [BTCoex],  BT Is hs\n");
+		BTC_TRACE(trace_buf);
+		halbtc8821c1ant_action_bt_hs(btcoexist);
+		return;
 	}
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
-	if (coex_sta->c2h_bt_inquiry_page) {
+	if ((BT_8821C_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
+	     coex_dm->bt_status) ||
+	    (BT_8821C_1ANT_BT_STATUS_CONNECTED_IDLE ==
+	     coex_dm->bt_status)) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "############# [BTCoex],  BT Is Inquirying\n");
+			    "############# [BTCoex],  BT Is idle\n");
 		BTC_TRACE(trace_buf);
-		halbtc8821c1ant_action_bt_inquiry(btcoexist);
-		return;
-	} else if (bt_hs_on) {
-		halbtc8821c1ant_action_hs(btcoexist);
+		halbtc8821c1ant_action_bt_idle(btcoexist);
 		return;
 	}
 
-
-	if (!wifi_connected) {
-		boolean	scan = false, link = false, roam = false;
-
+	if (scan || link || roam || under_4way) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], wifi is non connected-idle !!!\n");
+			"[BTCoex], scan = %d, link = %d, roam = %d 4way = %d!!!\n",
+			    scan, link, roam, under_4way);
 		BTC_TRACE(trace_buf);
 
-		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
-		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
-		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
-
-		if (scan || link || roam) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], wifi is under linkscan process!!\n");
+		BTC_TRACE(trace_buf);
 
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], scan = %d, link = %d, roam = %d !!!\n",
-				    scan, link, roam);
-			BTC_TRACE(trace_buf);
+		halbtc8821c1ant_action_wifi_linkscan_process(btcoexist);
+	} else if (wifi_connected) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], wifi is under connected!!\n");
+		BTC_TRACE(trace_buf);
 
-			if (scan)
-				halbtc8821c1ant_action_wifi_not_connected_scan(
-					btcoexist);
-			else
-				halbtc8821c1ant_action_wifi_not_connected_asso_auth(
-					btcoexist);
-		} else
-			halbtc8821c1ant_action_wifi_not_connected(btcoexist);
-	} else	/* wifi LPS/Busy */
 		halbtc8821c1ant_action_wifi_connected(btcoexist);
+	} else {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], wifi is under not-connected!!\n");
+		BTC_TRACE(trace_buf);
+
+		halbtc8821c1ant_action_wifi_not_connected(btcoexist);
+	}
 }
 
 void halbtc8821c1ant_init_coex_dm(IN struct btc_coexist *btcoexist)
@@ -3765,6 +3743,7 @@ void halbtc8821c1ant_init_coex_dm(IN struct btc_coexist *btcoexist)
 	coex_sta->cnt_setupLink = 0;
 	coex_sta->cnt_IgnWlanAct = 0;
 	coex_sta->cnt_Page = 0;
+	coex_sta->cnt_RoleSwitch = 0;
 
 	halbtc8821c1ant_query_bt_info(btcoexist);
 }
@@ -3774,6 +3753,7 @@ void halbtc8821c1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 {
 	u32			u32tmp1 = 0, u32tmp2 = 0, u32tmp3 = 0;
 	u16			u16tmp1 = 0;
+	u8			i;
 	struct  btc_board_info *board_info = &btcoexist->board_info;
 
 
@@ -3800,7 +3780,11 @@ void halbtc8821c1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 	coex_sta->bt_reg_vendor_ac = 0xffff;
 	coex_sta->bt_reg_vendor_ae = 0xffff;
 	coex_sta->isolation_btween_wb = BT_8821C_1ANT_DEFAULT_ISOLATION;
+	coex_sta->gnt_error_cnt = 0;
+	coex_sta->bt_relink_downcount = 0;
 
+	for (i = 0; i <= 9; i++)
+		coex_sta->bt_afh_map[i] = 0;
 
 	/* Setup RF front end type */
 	halbtc8821c1ant_set_rfe_type(btcoexist);
@@ -3830,10 +3814,12 @@ void halbtc8821c1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 
 	halbtc8821c1ant_enable_gnt_to_gpio(btcoexist, true);
 
+#if 0
 	/* check if WL firmware download ok */
 	/*if (btcoexist->btc_read_1byte(btcoexist, 0x80) == 0xc6)*/
-	halbtc8821c1ant_post_state_to_bt(btcoexist,
-					 BT_8821C_1ANT_SCOREBOARD_ONOFF, true);
+	 halbtc8821c1ant_post_state_to_bt(btcoexist,
+					BT_8821C_1ANT_SCOREBOARD_ONOFF, true);
+#endif
 
 	/* PTA parameter */
 	halbtc8821c1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
@@ -3878,1262 +3864,6 @@ void halbtc8821c1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 
 }
 
-#if 0
-u32 halbtc8821c1ant_psd_log2base(IN struct btc_coexist *btcoexist, IN u32 val)
-{
-	u8	j;
-	u32	tmp, tmp2, val_integerd_b = 0, tindex, shiftcount = 0;
-	u32	result, val_fractiond_b = 0, table_fraction[21] = {0, 432, 332, 274, 232, 200,
-				   174, 151, 132, 115, 100, 86, 74, 62, 51, 42,
-							   32, 23, 15, 7, 0
-							      };
-
-	if (val == 0)
-		return 0;
-
-	tmp = val;
-
-	while (1) {
-		if (tmp == 1)
-			break;
-
-		tmp = (tmp >> 1);
-		shiftcount++;
-	}
-
-
-	val_integerd_b = shiftcount + 1;
-
-	tmp2 = 1;
-	for (j = 1; j <= val_integerd_b; j++)
-		tmp2 = tmp2 * 2;
-
-	tmp = (val * 100) / tmp2;
-	tindex = tmp / 5;
-
-	if (tindex > 20)
-		tindex = 20;
-
-	val_fractiond_b = table_fraction[tindex];
-
-	result = val_integerd_b * 100 - val_fractiond_b;
-
-	return result;
-
-
-}
-
-void halbtc8821c1ant_psd_show_antenna_detect_result(IN struct btc_coexist
-		*btcoexist)
-{
-	u8		*cli_buf = btcoexist->cli_buf;
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n============[Antenna Detection info]  ============\n");
-	CL_PRINTF(cli_buf);
-
-	if (psd_scan->ant_det_result == 12) { /* Get Ant Det from BT  */
-
-		if (board_info->btdm_ant_num_by_ant_det == 1)
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   "\r\n %-35s = %s (%d~%d)",
-				   "Ant Det Result", "1-Antenna",
-				   BT_8821C_1ANT_ANTDET_PSDTHRES_1ANT,
-				BT_8821C_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION);
-		else {
-
-			if (psd_scan->ant_det_psd_scan_peak_val >
-			    (BT_8821C_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION)
-			    * 100)
-				CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-					   "\r\n %-35s = %s (>%d)",
-					"Ant Det Result", "2-Antenna (Bad-Isolation)",
-					BT_8821C_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
-			else
-				CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-					   "\r\n %-35s = %s (%d~%d)",
-					"Ant Det Result", "2-Antenna (Good-Isolation)",
-					BT_8821C_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION,
-					BT_8821C_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
-		}
-	} else if (psd_scan->ant_det_result == 1)
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (>%d)",
-			   "Ant Det Result", "2-Antenna (Bad-Isolation)",
-			   BT_8821C_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
-	else if (psd_scan->ant_det_result == 2)
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)",
-			   "Ant Det Result", "2-Antenna (Good-Isolation)",
-			   BT_8821C_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
-			   + psd_scan->ant_det_thres_offset,
-			   BT_8821C_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
-	else
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)",
-			   "Ant Det Result", "1-Antenna",
-			   BT_8821C_1ANT_ANTDET_PSDTHRES_1ANT,
-			   BT_8821C_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
-			   + psd_scan->ant_det_thres_offset);
-
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s ",
-		   "Antenna Detection Finish",
-		   (board_info->btdm_ant_det_finish
-		    ? "Yes" : "No"));
-	CL_PRINTF(cli_buf);
-
-	switch (psd_scan->ant_det_result) {
-	case 0:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is not available)");
-		break;
-	case 1:  /* 2-Ant bad-isolation */
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is available)");
-		break;
-	case 2:  /* 2-Ant good-isolation */
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is available)");
-		break;
-	case 3:  /* 1-Ant */
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is available)");
-		break;
-	case 4:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(Uncertainty result)");
-		break;
-	case 5:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "(Pre-Scan fai)");
-		break;
-	case 6:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(WiFi is Scanning)");
-		break;
-	case 7:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is not idle)");
-		break;
-	case 8:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(Abort by WiFi Scanning)");
-		break;
-	case 9:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(Antenna Init is not ready)");
-		break;
-	case 10:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is Inquiry or page)");
-		break;
-	case 11:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is Disabled)");
-	case 12:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is available, result from BT");
-		break;
-	}
-	CL_PRINTF(cli_buf);
-
-	if (psd_scan->ant_det_result == 12) {
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dB",
-			   "PSD Scan Peak Value",
-			   psd_scan->ant_det_psd_scan_peak_val / 100);
-		CL_PRINTF(cli_buf);
-		return;
-	}
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
-		   "Ant Detect Total Count", psd_scan->ant_det_try_count);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
-		   "Ant Detect Fail Count", psd_scan->ant_det_fail_count);
-	CL_PRINTF(cli_buf);
-
-	if ((!board_info->btdm_ant_det_finish) &&
-	    (psd_scan->ant_det_result != 5))
-		return;
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Response",
-		   (psd_scan->ant_det_result ? "ok" : "fail"));
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ms", "BT Tx Time",
-		   psd_scan->ant_det_bt_tx_time);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "BT Tx Ch",
-		   psd_scan->ant_det_bt_le_channel);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d",
-		   "WiFi PSD Cent-Ch/Offset/Span",
-		   psd_scan->real_cent_freq, psd_scan->real_offset,
-		   psd_scan->real_span);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dB",
-		   "PSD Pre-Scan Peak Value",
-		   psd_scan->ant_det_pre_psdscan_peak_val / 100);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (<= %d)",
-		   "PSD Pre-Scan result",
-		   (psd_scan->ant_det_result != 5 ? "ok" : "fail"),
-		   BT_8821C_1ANT_ANTDET_PSDTHRES_BACKGROUND
-		   + psd_scan->ant_det_thres_offset);
-	CL_PRINTF(cli_buf);
-
-	if (psd_scan->ant_det_result == 5)
-		return;
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s dB",
-		   "PSD Scan Peak Value", psd_scan->ant_det_peak_val);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s MHz",
-		   "PSD Scan Peak Freq", psd_scan->ant_det_peak_freq);
-	CL_PRINTF(cli_buf);
-
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "TFBGA Package",
-		   (board_info->tfbga_package) ?  "Yes" : "No");
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
-		   "PSD Threshold Offset", psd_scan->ant_det_thres_offset);
-	CL_PRINTF(cli_buf);
-
-}
-
-
-
-void halbtc8821c1ant_psd_showdata(IN struct btc_coexist *btcoexist)
-{
-	u8		*cli_buf = btcoexist->cli_buf;
-	u32		delta_freq_per_point;
-	u32		freq, freq1, freq2, n = 0, i = 0, j = 0, m = 0, psd_rep1, psd_rep2;
-
-	if (psd_scan->ant_det_result == 12)
-		return;
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n\n============[PSD info]  (%d)============\n",
-		   psd_scan->psd_gen_count);
-	CL_PRINTF(cli_buf);
-
-	if (psd_scan->psd_gen_count == 0) {
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n No data !!\n");
-		CL_PRINTF(cli_buf);
-		return;
-	}
-
-	if (psd_scan->psd_point == 0)
-		delta_freq_per_point = 0;
-	else
-		delta_freq_per_point = psd_scan->psd_band_width /
-				       psd_scan->psd_point;
-
-	/* if (psd_scan->is_psd_show_max_only) */
-	if (0) {
-		psd_rep1 = psd_scan->psd_max_value / 100;
-		psd_rep2 = psd_scan->psd_max_value - psd_rep1 * 100;
-
-		freq = ((psd_scan->real_cent_freq - 20) * 1000000 +
-			psd_scan->psd_max_value_point * delta_freq_per_point);
-		freq1 = freq / 1000000;
-		freq2 = freq / 1000 - freq1 * 1000;
-
-		if (freq2 < 100)
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   "\r\n Freq = %d.0%d MHz",
-				   freq1, freq2);
-		else
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   "\r\n Freq = %d.%d MHz",
-				   freq1, freq2);
-
-		if (psd_rep2 < 10)
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   ", Value = %d.0%d dB, (%d)\n",
-				   psd_rep1, psd_rep2, psd_scan->psd_max_value);
-		else
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   ", Value = %d.%d dB, (%d)\n",
-				   psd_rep1, psd_rep2, psd_scan->psd_max_value);
-
-		CL_PRINTF(cli_buf);
-	} else {
-		m = psd_scan->psd_start_point;
-		n = psd_scan->psd_start_point;
-		i = 1;
-		j = 1;
-
-		while (1) {
-			do {
-				freq = ((psd_scan->real_cent_freq - 20) *
-					1000000 + m *
-					delta_freq_per_point);
-				freq1 = freq / 1000000;
-				freq2 = freq / 1000 - freq1 * 1000;
-
-				if (i == 1) {
-					if (freq2 == 0)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Freq%6d.000",
-							   freq1);
-					else if (freq2 < 100)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Freq%6d.0%2d",
-							   freq1,
-							   freq2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Freq%6d.%3d",
-							   freq1,
-							   freq2);
-				} else if ((i % 8 == 0) ||
-					   (m == psd_scan->psd_stop_point)) {
-					if (freq2 == 0)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.000\n", freq1);
-					else if (freq2 < 100)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.0%2d\n", freq1,
-							   freq2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.%3d\n", freq1,
-							   freq2);
-				} else {
-					if (freq2 == 0)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.000", freq1);
-					else if (freq2 < 100)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.0%2d", freq1,
-							   freq2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.%3d", freq1,
-							   freq2);
-				}
-
-				i++;
-				m++;
-				CL_PRINTF(cli_buf);
-
-			} while ((i <= 8) && (m <= psd_scan->psd_stop_point));
-
-
-			do {
-				psd_rep1 = psd_scan->psd_report_max_hold[n] /
-					   100;
-				psd_rep2 = psd_scan->psd_report_max_hold[n] -
-					   psd_rep1 *
-					   100;
-
-				if (j == 1) {
-					if (psd_rep2 < 10)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Val %7d.0%d",
-							   psd_rep1,
-							   psd_rep2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Val %7d.%d",
-							   psd_rep1,
-							   psd_rep2);
-				} else if ((j % 8 == 0)  ||
-					   (n == psd_scan->psd_stop_point)) {
-					if (psd_rep2 < 10)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							"%7d.0%d\n", psd_rep1,
-							   psd_rep2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%7d.%d\n", psd_rep1,
-							   psd_rep2);
-				} else {
-					if (psd_rep2 < 10)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%7d.0%d", psd_rep1,
-							   psd_rep2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%7d.%d", psd_rep1,
-							   psd_rep2);
-				}
-
-				j++;
-				n++;
-				CL_PRINTF(cli_buf);
-
-			} while ((j <= 8) && (n <= psd_scan->psd_stop_point));
-
-			if ((m > psd_scan->psd_stop_point) ||
-			    (n > psd_scan->psd_stop_point))
-				break;
-
-			i = 1;
-			j = 1;
-
-		}
-	}
-
-
-}
-
-#pragma optimize("", off)
-void halbtc8821c1ant_psd_maxholddata(IN struct btc_coexist *btcoexist,
-				     IN u32 gen_count)
-{
-	u32	i = 0;
-	u32 loop_i_max = 0, loop_val_max = 0;
-
-	if (gen_count == 1) {
-		memcpy(psd_scan->psd_report_max_hold,
-		       psd_scan->psd_report,
-		       BT_8821C_1ANT_ANTDET_PSD_POINTS * sizeof(u32));
-	}
-
-	for (i = psd_scan->psd_start_point;
-	     i <= psd_scan->psd_stop_point; i++) {
-
-		/* update max-hold value at each freq point */
-		if (psd_scan->psd_report[i] > psd_scan->psd_report_max_hold[i])
-			psd_scan->psd_report_max_hold[i] =
-				psd_scan->psd_report[i];
-
-		/*  search the max value in this seep */
-		if (psd_scan->psd_report[i] > loop_val_max) {
-			loop_val_max = psd_scan->psd_report[i];
-			loop_i_max = i;
-		}
-	}
-
-	if (gen_count <= BT_8821C_1ANT_ANTDET_PSD_SWWEEPCOUNT)
-		psd_scan->psd_loop_max_value[gen_count - 1] = loop_val_max;
-}
-
-#pragma optimize("", off)
-u32 halbtc8821c1ant_psd_getdata(IN struct btc_coexist *btcoexist, IN u32 point)
-{
-	/* reg 0x808[9:0]: FFT data x */
-	/* reg 0x808[22]: 0-->1 to get 1 FFT data y */
-	/* reg 0x8b4[15:0]: FFT data y report */
-
-	u32 val = 0, psd_report = 0;
-	int k = 0;
-
-	val = btcoexist->btc_read_4byte(btcoexist, 0x808);
-
-	val &= 0xffbffc00;
-	val |= point;
-
-	btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-	val |= 0x00400000;
-	btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-	while (1) {
-		if (k++ > BT_8821C_1ANT_ANTDET_SWEEPPOINT_DELAY)
-			break;
-	}
-
-	val = btcoexist->btc_read_4byte(btcoexist, 0x8b4);
-
-	psd_report = val & 0x0000ffff;
-
-	return psd_report;
-}
-
-#pragma optimize("", off)
-boolean halbtc8821c1ant_psd_sweep_point(IN struct btc_coexist *btcoexist,
-		IN u32 cent_freq, IN s32 offset, IN u32 span, IN u32 points,
-					IN u32 avgnum, IN u32 loopcnt)
-{
-	u32	 i = 0, val = 0, n = 0, k = 0, j, point_index = 0;
-	u32	points1 = 0, psd_report = 0;
-	u32	start_p = 0, stop_p = 0, delta_freq_per_point = 156250;
-	u32    psd_center_freq = 20 * 10 ^ 6;
-	boolean outloop = false, scan , roam, is_sweep_ok = true;
-	u8	 flag = 0;
-	u32	tmp = 0, u32tmp1 = 0;
-	u32	wifi_original_channel = 1;
-	u32 psd_sum = 0, avg_cnt = 0;
-	u32	i_max = 0, val_max = 0, val_max2 = 0;
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "xxxxxxxxxxxxxxxx PSD Sweep Start!!\n");
-	BTC_TRACE(trace_buf);
-
-	do {
-		switch (flag) {
-		case 0:  /* Get PSD parameters */
-		default:
-
-			psd_scan->psd_band_width = 40 * 1000000;
-			psd_scan->psd_point = points;
-			psd_scan->psd_start_base = points / 2;
-			psd_scan->psd_avg_num = avgnum;
-			psd_scan->real_cent_freq = cent_freq;
-			psd_scan->real_offset = offset;
-			psd_scan->real_span = span;
-
-
-			points1 = psd_scan->psd_point;
-			delta_freq_per_point = psd_scan->psd_band_width /
-					       psd_scan->psd_point;
-
-			/* PSD point setup */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x808);
-			val &= 0xffff0fff;
-
-			switch (psd_scan->psd_point) {
-			case 128:
-				val |= 0x0;
-				break;
-			case 256:
-			default:
-				val |= 0x00004000;
-				break;
-			case 512:
-				val |= 0x00008000;
-				break;
-			case 1024:
-				val |= 0x0000c000;
-				break;
-			}
-
-			switch (psd_scan->psd_avg_num) {
-			case 1:
-				val |= 0x0;
-				break;
-			case 8:
-				val |= 0x00001000;
-				break;
-			case 16:
-				val |= 0x00002000;
-				break;
-			case 32:
-			default:
-				val |= 0x00003000;
-				break;
-			}
-			btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-			flag = 1;
-			break;
-		case 1:	  /* calculate the PSD point index from freq/offset/span */
-			psd_center_freq = psd_scan->psd_band_width / 2 +
-					  offset * (1000000);
-
-			start_p = psd_scan->psd_start_base + (psd_center_freq -
-				span * (1000000) / 2) / delta_freq_per_point;
-			psd_scan->psd_start_point = start_p -
-						    psd_scan->psd_start_base;
-
-			stop_p = psd_scan->psd_start_base + (psd_center_freq +
-				span * (1000000) / 2) / delta_freq_per_point;
-			psd_scan->psd_stop_point = stop_p -
-						   psd_scan->psd_start_base - 1;
-
-			flag = 2;
-			break;
-		case 2:  /* set RF channel/BW/Mode */
-
-			/* set 3-wire off */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x88c);
-			val |= 0x00300000;
-			btcoexist->btc_write_4byte(btcoexist, 0x88c, val);
-
-			/* CCK off */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x800);
-			val &= 0xfeffffff;
-			btcoexist->btc_write_4byte(btcoexist, 0x800, val);
-
-			/* Tx-pause on */
-			btcoexist->btc_write_1byte(btcoexist, 0x522, 0x6f);
-
-			/* store WiFi original channel */
-			wifi_original_channel = btcoexist->btc_get_rf_reg(
-					btcoexist, BTC_RF_A, 0x18, 0x3ff);
-
-			/* Set RF channel */
-			if (cent_freq == 2484)
-				btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
-							  0x18, 0x3ff, 0xe);
-			else
-				btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
-					  0x18, 0x3ff, (cent_freq - 2412) / 5 +
-						  1); /* WiFi TRx Mask on */
-
-			/* save original RCK value */
-			u32tmp1 =  btcoexist->btc_get_rf_reg(
-					   btcoexist, BTC_RF_A, 0x1d, 0xfffff);
-
-			/* Enter debug mode */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xde,
-						  0x2, 0x1);
-
-			/* Set RF Rx filter corner */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1d,
-						  0xfffff, 0x2e);
-
-
-			/* Set  RF mode = Rx, RF Gain = 0x320a0 */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x0,
-						  0xfffff, 0x320a0);
-
-			while (1) {
-				if (k++ > BT_8821C_1ANT_ANTDET_SWEEPPOINT_DELAY)
-					break;
-			}
-			flag = 3;
-			break;
-		case 3:
-			psd_scan->psd_gen_count = 0;
-			for (j = 1; j <= loopcnt; j++) {
-
-				btcoexist->btc_get(btcoexist,
-						   BTC_GET_BL_WIFI_SCAN, &scan);
-				btcoexist->btc_get(btcoexist,
-						   BTC_GET_BL_WIFI_ROAM, &roam);
-
-				if (scan || roam) {
-					is_sweep_ok = false;
-					break;
-				}
-				memset(psd_scan->psd_report, 0,
-				       psd_scan->psd_point * sizeof(u32));
-				start_p = psd_scan->psd_start_point +
-					  psd_scan->psd_start_base;
-				stop_p = psd_scan->psd_stop_point +
-					 psd_scan->psd_start_base + 1;
-
-				i = start_p;
-				point_index = 0;
-
-				while (i < stop_p) {
-					if (i >= points1)
-						psd_report =
-							halbtc8821c1ant_psd_getdata(
-							btcoexist, i - points1);
-					else
-						psd_report =
-							halbtc8821c1ant_psd_getdata(
-								btcoexist, i);
-
-					if (psd_report == 0)
-						tmp = 0;
-					else
-						/* tmp =  20*log10((double)psd_report); */
-						/* 20*log2(x)/log2(10), log2Base return theresult of the psd_report*100 */
-						tmp = 6 * halbtc8821c1ant_psd_log2base(
-							btcoexist, psd_report);
-
-					n = i - psd_scan->psd_start_base;
-					psd_scan->psd_report[n] =  tmp;
-
-					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-						"Point=%d, psd_dB_data = %d\n",
-						    i, psd_scan->psd_report[n]);
-					BTC_TRACE(trace_buf);
-
-					i++;
-
-				}
-
-				halbtc8821c1ant_psd_maxholddata(btcoexist, j);
-
-				psd_scan->psd_gen_count = j;
-
-				/*Accumulate Max PSD value in this loop if the value > threshold */
-				if (psd_scan->psd_loop_max_value[j - 1] >=
-				    4000) {
-					psd_sum = psd_sum +
-						psd_scan->psd_loop_max_value[j -
-								       1];
-					avg_cnt++;
-				}
-
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					    "Loop=%d, Max_dB_data = %d\n",
-					    j, psd_scan->psd_loop_max_value[j
-							    - 1]);
-				BTC_TRACE(trace_buf);
-
-			}
-
-			if (loopcnt == BT_8821C_1ANT_ANTDET_PSD_SWWEEPCOUNT) {
-
-				/* search the Max Value between each-freq-point-max-hold value of all sweep*/
-				for (i = 1;
-				     i <= BT_8821C_1ANT_ANTDET_PSD_SWWEEPCOUNT;
-				     i++) {
-
-					if (i == 1) {
-						i_max = i;
-						val_max = psd_scan->psd_loop_max_value[i
-								       - 1];
-						val_max2 =
-							psd_scan->psd_loop_max_value[i
-								     - 1];
-					} else if (
-						psd_scan->psd_loop_max_value[i -
-							     1] > val_max) {
-						val_max2 = val_max;
-						i_max = i;
-						val_max = psd_scan->psd_loop_max_value[i
-								       - 1];
-					} else if (
-						psd_scan->psd_loop_max_value[i -
-							     1] > val_max2)
-						val_max2 =
-							psd_scan->psd_loop_max_value[i
-								     - 1];
-
-					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-						"i = %d, val_hold= %d, val_max = %d, val_max2 = %d\n",
-						i, psd_scan->psd_loop_max_value[i
-								    - 1],
-						    val_max, val_max2);
-
-					BTC_TRACE(trace_buf);
-				}
-
-				psd_scan->psd_max_value_point = i_max;
-				psd_scan->psd_max_value = val_max;
-				psd_scan->psd_max_value2 = val_max2;
-
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					    "val_max = %d, val_max2 = %d\n",
-					    psd_scan->psd_max_value,
-					    psd_scan->psd_max_value2);
-				BTC_TRACE(trace_buf);
-			}
-
-			if (avg_cnt != 0) {
-				psd_scan->psd_avg_value = (psd_sum / avg_cnt);
-				if ((psd_sum % avg_cnt) >= (avg_cnt / 2))
-					psd_scan->psd_avg_value++;
-			} else
-				psd_scan->psd_avg_value = 0;
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "AvgLoop=%d, Avg_dB_data = %d\n",
-				    avg_cnt, psd_scan->psd_avg_value);
-			BTC_TRACE(trace_buf);
-
-			flag = 100;
-			break;
-		case 99:	/* error */
-
-			outloop = true;
-			break;
-		case 100: /* recovery */
-
-			/* set 3-wire on */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x88c);
-			val &= 0xffcfffff;
-			btcoexist->btc_write_4byte(btcoexist, 0x88c, val);
-
-			/* CCK on */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x800);
-			val |= 0x01000000;
-			btcoexist->btc_write_4byte(btcoexist, 0x800, val);
-
-			/* Tx-pause off */
-			btcoexist->btc_write_1byte(btcoexist, 0x522, 0x0);
-
-			/* PSD off */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x808);
-			val &= 0xffbfffff;
-			btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-			/* restore RF Rx filter corner */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1d,
-						  0xfffff, u32tmp1);
-
-			/* Exit debug mode */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xde,
-						  0x2, 0x0);
-
-			/* restore WiFi original channel */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x18,
-						  0x3ff, wifi_original_channel);
-
-			outloop = true;
-			break;
-
-		}
-
-	} while (!outloop);
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "xxxxxxxxxxxxxxxx PSD Sweep Stop!!\n");
-	BTC_TRACE(trace_buf);
-	return is_sweep_ok;
-
-}
-
-#pragma optimize("", off)
-boolean halbtc8821c1ant_psd_antenna_detection(IN struct btc_coexist
-		*btcoexist)
-{
-	u32	i = 0;
-	u32	wlpsd_cent_freq = 2484, wlpsd_span = 2;
-	s32	wlpsd_offset = -4;
-	u32 bt_tx_time, bt_le_channel;
-	u8	bt_le_ch[13] = {3, 6, 8, 11, 13, 16, 18, 21, 23, 26, 28, 31, 33};
-
-	u8	h2c_parameter[3] = {0}, u8tmpa, u8tmpb;
-
-	u8	state = 0;
-	boolean		outloop = false, bt_resp = false, ant_det_finish = false;
-	u32		freq, freq1, freq2, psd_rep1, psd_rep2, delta_freq_per_point,
-			u32tmp, u32tmp0, u32tmp1, u32tmp2;
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-
-	memset(psd_scan->ant_det_peak_val, 0, 16 * sizeof(u8));
-	memset(psd_scan->ant_det_peak_freq, 0, 16 * sizeof(u8));
-
-	psd_scan->ant_det_bt_tx_time =
-		BT_8821C_1ANT_ANTDET_BTTXTIME;	   /* 0.42ms*50 = 20ms (0.42ms = 1 PSD sweep) */
-	psd_scan->ant_det_bt_le_channel = BT_8821C_1ANT_ANTDET_BTTXCHANNEL;
-
-	bt_tx_time = psd_scan->ant_det_bt_tx_time;
-	bt_le_channel = psd_scan->ant_det_bt_le_channel;
-
-	if (board_info->tfbga_package) /* for TFBGA */
-		psd_scan->ant_det_thres_offset = 5;
-	else
-		psd_scan->ant_det_thres_offset = 0;
-
-	do {
-		switch (state) {
-		case 0:
-			if (bt_le_channel == 39)
-				wlpsd_cent_freq = 2484;
-			else {
-				for (i = 1; i <= 13; i++) {
-					if (bt_le_ch[i - 1] ==
-					    bt_le_channel) {
-						wlpsd_cent_freq = 2412
-								  + (i - 1) * 5;
-						break;
-					}
-				}
-
-				if (i == 14) {
-
-					BTC_SPRINTF(trace_buf,
-						    BT_TMP_BUF_SIZE,
-						"xxxxxxxxxxxxxxxx AntennaDetect(), Abort!!, Invalid LE channel = %d\n ",
-						    bt_le_channel);
-					BTC_TRACE(trace_buf);
-					outloop = true;
-					break;
-				}
-			}
-#if 0
-			wlpsd_sweep_count = bt_tx_time * 238 /
-					    100; /* bt_tx_time/0.42								 */
-			wlpsd_sweep_count = wlpsd_sweep_count / 5;
-
-			if (wlpsd_sweep_count % 5 != 0)
-				wlpsd_sweep_count = (wlpsd_sweep_count /
-						     5 + 1) * 5;
-#endif
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), BT_LETxTime=%d,  BT_LECh = %d\n",
-				    bt_tx_time, bt_le_channel);
-			BTC_TRACE(trace_buf);
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), wlpsd_cent_freq=%d,  wlpsd_offset = %d, wlpsd_span = %d, wlpsd_sweep_count = %d\n",
-				    wlpsd_cent_freq,
-				    wlpsd_offset,
-				    wlpsd_span,
-				    BT_8821C_1ANT_ANTDET_PSD_SWWEEPCOUNT);
-			BTC_TRACE(trace_buf);
-
-			state = 1;
-			break;
-		case 1: /* stop coex DM & set antenna path */
-			/* Stop Coex DM */
-			btcoexist->stop_coex_dm = true;
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Stop Coex DM!!\n");
-			BTC_TRACE(trace_buf);
-
-			/* Set TDMA off,				 */
-			halbtc8821c1ant_ps_tdma(btcoexist, FORCE_EXEC,
-						false, 0);
-
-			/* Set coex table */
-			halbtc8821c1ant_coex_table_with_type(btcoexist,
-							     FORCE_EXEC, 0);
-
-			if (board_info->btdm_ant_pos ==
-			    BTC_ANTENNA_AT_MAIN_PORT) {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Main Port\n");
-				BTC_TRACE(trace_buf);
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Aux Port\n");
-				BTC_TRACE(trace_buf);
-			}
-
-			/* Set Antenna path, switch WiFi to un-certain antenna port */
-			/* Set Antenna Path,  both GNT_WL/GNT_BT = 1, and control by SW */
-			halbtc8821c1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT,
-						     FORCE_EXEC,
-					     BT_8821C_1ANT_PHASE_ANTENNA_DET);
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to BT!!\n");
-			BTC_TRACE(trace_buf);
-
-			/* Set AFH mask on at WiFi channel 2472MHz +/- 10MHz */
-			h2c_parameter[0] = 0x1;
-			h2c_parameter[1] = 0xd;
-			h2c_parameter[2] = 0x14;
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d,  Mask=%d\n",
-				    h2c_parameter[1],
-				    h2c_parameter[2]);
-			BTC_TRACE(trace_buf);
-
-			btcoexist->btc_fill_h2c(btcoexist, 0x66, 3,
-						h2c_parameter);
-
-			u32tmp0 = btcoexist->btc_read_4byte(btcoexist, 0x70);
-			u32tmp1 = halbtc8821c1ant_ltecoex_indirect_read_reg(
-					  btcoexist, 0x38);
-			u32tmp2 = halbtc8821c1ant_ltecoex_indirect_read_reg(
-					  btcoexist, 0x54);
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], ********** 0x70 = 0x%x, 0x38= 0x%x, 0x54= 0x%x (Before Ant Det)\n",
-				    u32tmp0, u32tmp1, u32tmp2);
-			BTC_TRACE(trace_buf);
-
-			state = 2;
-			break;
-		case 2:	/* Pre-sweep background psd */
-			if (!halbtc8821c1ant_psd_sweep_point(btcoexist,
-				     wlpsd_cent_freq, wlpsd_offset, wlpsd_span,
-					     BT_8821C_1ANT_ANTDET_PSD_POINTS,
-				     BT_8821C_1ANT_ANTDET_PSD_AVGNUM, 3)) {
-				ant_det_finish = false;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				psd_scan->ant_det_result = 8;
-				state = 99;
-				break;
-			}
-
-			psd_scan->ant_det_pre_psdscan_peak_val =
-				psd_scan->psd_max_value;
-
-			if (psd_scan->ant_det_pre_psdscan_peak_val >
-			    (BT_8821C_1ANT_ANTDET_PSDTHRES_BACKGROUND
-			     + psd_scan->ant_det_thres_offset) * 100) {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Abort Antenna Detection!! becaus background = %d > thres (%d)\n",
-					psd_scan->ant_det_pre_psdscan_peak_val /
-					    100,
-					BT_8821C_1ANT_ANTDET_PSDTHRES_BACKGROUND
-					    + psd_scan->ant_det_thres_offset);
-				BTC_TRACE(trace_buf);
-				ant_det_finish = false;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				psd_scan->ant_det_result = 5;
-				state = 99;
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Start Antenna Detection!! becaus background = %d <= thres (%d)\n",
-					psd_scan->ant_det_pre_psdscan_peak_val /
-					    100,
-					BT_8821C_1ANT_ANTDET_PSDTHRES_BACKGROUND
-					    + psd_scan->ant_det_thres_offset);
-				BTC_TRACE(trace_buf);
-				state = 3;
-			}
-			break;
-		case 3:
-
-			bt_resp = btcoexist->btc_set_bt_ant_detection(
-					  btcoexist, (u8)(bt_tx_time & 0xff),
-					  (u8)(bt_le_channel & 0xff));
-
-			/* Sync WL Rx PSD with BT Tx time because H2C->Mailbox delay */
-			delay_ms(20);
-
-			if (!halbtc8821c1ant_psd_sweep_point(btcoexist,
-					     wlpsd_cent_freq, wlpsd_offset,
-							     wlpsd_span,
-					     BT_8821C_1ANT_ANTDET_PSD_POINTS,
-					     BT_8821C_1ANT_ANTDET_PSD_AVGNUM,
-				     BT_8821C_1ANT_ANTDET_PSD_SWWEEPCOUNT)) {
-				ant_det_finish = false;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				psd_scan->ant_det_result = 8;
-				state = 99;
-				break;
-			}
-
-#if 1
-			psd_scan->ant_det_psd_scan_peak_val =
-				psd_scan->psd_max_value;
-#endif
-#if 0
-			psd_scan->ant_det_psd_scan_peak_val =
-				((psd_scan->psd_max_value - psd_scan->psd_avg_value) <
-				 800) ?
-				psd_scan->psd_max_value : ((
-						psd_scan->psd_max_value -
-					psd_scan->psd_max_value2 <= 300) ?
-						   psd_scan->psd_avg_value :
-						   psd_scan->psd_max_value2);
-#endif
-			psd_scan->ant_det_psd_scan_peak_freq =
-				psd_scan->psd_max_value_point;
-			state = 4;
-			break;
-		case 4:
-
-			if (psd_scan->psd_point == 0)
-				delta_freq_per_point = 0;
-			else
-				delta_freq_per_point =
-					psd_scan->psd_band_width /
-					psd_scan->psd_point;
-
-			psd_rep1 = psd_scan->ant_det_psd_scan_peak_val / 100;
-			psd_rep2 = psd_scan->ant_det_psd_scan_peak_val -
-				   psd_rep1 *
-				   100;
-
-			freq = ((psd_scan->real_cent_freq - 20) *
-				1000000 + psd_scan->psd_max_value_point
-				* delta_freq_per_point);
-			freq1 = freq / 1000000;
-			freq2 = freq / 1000 - freq1 * 1000;
-
-			if (freq2 < 100) {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.0%d MHz",
-					    freq1, freq2);
-				BTC_TRACE(trace_buf);
-				CL_SPRINTF(psd_scan->ant_det_peak_freq,
-					   BT_8821C_1ANT_ANTDET_BUF_LEN,
-					   "%d.0%d", freq1, freq2);
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.%d MHz",
-					    freq1, freq2);
-				BTC_TRACE(trace_buf);
-				CL_SPRINTF(psd_scan->ant_det_peak_freq,
-					   BT_8821C_1ANT_ANTDET_BUF_LEN,
-					   "%d.%d", freq1, freq2);
-			}
-
-			if (psd_rep2 < 10) {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					    ", Value = %d.0%d dB\n",
-					    psd_rep1, psd_rep2);
-				BTC_TRACE(trace_buf);
-				CL_SPRINTF(psd_scan->ant_det_peak_val,
-					   BT_8821C_1ANT_ANTDET_BUF_LEN,
-					   "%d.0%d", psd_rep1, psd_rep2);
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					    ", Value = %d.%d dB\n",
-					    psd_rep1, psd_rep2);
-				BTC_TRACE(trace_buf);
-				CL_SPRINTF(psd_scan->ant_det_peak_val,
-					   BT_8821C_1ANT_ANTDET_BUF_LEN,
-					   "%d.%d", psd_rep1, psd_rep2);
-			}
-
-			psd_scan->ant_det_is_btreply_available = true;
-
-			if (bt_resp == false) {
-				psd_scan->ant_det_is_btreply_available =
-					false;
-				psd_scan->ant_det_result = 0;
-				ant_det_finish = false;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), BT Response = Fail\n ");
-				BTC_TRACE(trace_buf);
-			} else if (psd_scan->ant_det_psd_scan_peak_val >
-				(BT_8821C_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION)
-				   * 100) {
-				psd_scan->ant_det_result = 1;
-				ant_det_finish = true;
-				board_info->btdm_ant_num_by_ant_det = 2;
-				coex_sta->isolation_btween_wb = (u8)(85 -
-					psd_scan->ant_det_psd_scan_peak_val /
-							     100) & 0xff;
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Bad-Isolation!!\n");
-				BTC_TRACE(trace_buf);
-			} else if (psd_scan->ant_det_psd_scan_peak_val >
-				(BT_8821C_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
-				    + psd_scan->ant_det_thres_offset) * 100) {
-				psd_scan->ant_det_result = 2;
-				ant_det_finish = true;
-				board_info->btdm_ant_num_by_ant_det = 2;
-				coex_sta->isolation_btween_wb = (u8)(85 -
-					psd_scan->ant_det_psd_scan_peak_val /
-							     100) & 0xff;
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Good-Isolation!!\n");
-				BTC_TRACE(trace_buf);
-			} else if (psd_scan->ant_det_psd_scan_peak_val >
-				   (BT_8821C_1ANT_ANTDET_PSDTHRES_1ANT) *
-				   100) {
-				psd_scan->ant_det_result = 3;
-				ant_det_finish = true;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				coex_sta->isolation_btween_wb = (u8)(85 -
-					psd_scan->ant_det_psd_scan_peak_val /
-							     100) & 0xff;
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant!!\n");
-				BTC_TRACE(trace_buf);
-			} else {
-				psd_scan->ant_det_result = 4;
-				ant_det_finish = false;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant, un-certainity!!\n");
-				BTC_TRACE(trace_buf);
-			}
-
-			state = 99;
-			break;
-		case 99:  /* restore setup */
-
-			/* Set AFH mask off at WiFi channel 2472MHz +/- 10MHz */
-			h2c_parameter[0] = 0x0;
-			h2c_parameter[1] = 0x0;
-			h2c_parameter[2] = 0x0;
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d,  Mask=%d\n",
-				    h2c_parameter[1], h2c_parameter[2]);
-			BTC_TRACE(trace_buf);
-
-			btcoexist->btc_fill_h2c(btcoexist, 0x66, 3,
-						h2c_parameter);
-
-			/* Set Antenna Path, GNT_WL/GNT_BT control by PTA */
-			/* Set Antenna path, switch WiFi to certain antenna port */
-			halbtc8821c1ant_set_ant_path(btcoexist,
-					     BTC_ANT_PATH_AUTO, FORCE_EXEC,
-					     BT_8821C_1ANT_PHASE_2G_RUNTIME);
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to PTA\n!!");
-			BTC_TRACE(trace_buf);
-
-			btcoexist->stop_coex_dm = false;
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Resume Coex DM\n!!");
-			BTC_TRACE(trace_buf);
-
-			outloop = true;
-			break;
-		}
-
-	} while (!outloop);
-
-	return ant_det_finish;
-
-}
-
-#pragma optimize("", off)
-boolean halbtc8821c1ant_psd_antenna_detection_check(IN struct btc_coexist
-		*btcoexist)
-{
-	static u32 ant_det_count = 0, ant_det_fail_count = 0;
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-
-	boolean scan, roam, ant_det_finish = false;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
-
-	ant_det_count++;
-
-	psd_scan->ant_det_try_count = ant_det_count;
-
-	if (scan || roam) {
-		ant_det_finish = false;
-		psd_scan->ant_det_result = 6;
-	} else if (coex_sta->bt_disabled) {
-		ant_det_finish = false;
-		psd_scan->ant_det_result = 11;
-	} else if (coex_sta->num_of_profile >= 1) {
-		ant_det_finish = false;
-		psd_scan->ant_det_result = 7;
-	} else if (
-		!psd_scan->ant_det_is_ant_det_available) { /* Antenna initial setup is not ready */
-		ant_det_finish = false;
-		psd_scan->ant_det_result = 9;
-	} else if (coex_sta->c2h_bt_inquiry_page) {
-		ant_det_finish = false;
-		psd_scan->ant_det_result = 10;
-	} else {
-
-		ant_det_finish = halbtc8821c1ant_psd_antenna_detection(
-					 btcoexist);
-
-		delay_ms(psd_scan->ant_det_bt_tx_time);
-	}
-
-
-	if (!ant_det_finish)
-		ant_det_fail_count++;
-
-	psd_scan->ant_det_fail_count = ant_det_fail_count;
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		"xxxxxxxxxxxxxxxx AntennaDetect(), result = %d, fail_count = %d, finish = %s\n",
-		    psd_scan->ant_det_result,
-		    psd_scan->ant_det_fail_count,
-		    ant_det_finish == true ? "Yes" : "No");
-	BTC_TRACE(trace_buf);
-
-	return ant_det_finish;
-
-}
-
-#endif
 
 /* ************************************************************
  * work around function start with wa_halbtc8821c1ant_
@@ -5299,7 +4029,8 @@ void ex_halbtc8821c1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		if (board_info->btdm_ant_det_finish) {
 
 			if (psd_scan->ant_det_result != 12)
-				CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
+				CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+					   "\r\n %-35s = %s",
 					   "Ant Det PSD Value",
 					   psd_scan->ant_det_peak_val);
 			else
@@ -5325,8 +4056,9 @@ void ex_halbtc8821c1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		   glcoex_ver_btdesired_8821c_1ant,
 		   bt_coex_ver,
 		   (bt_coex_ver == 0xff ? "Unknown" :
-		    (bt_coex_ver >= glcoex_ver_btdesired_8821c_1ant ?
-		     "Match" : "Mis-Match")));
+		    (coex_sta->bt_disabled ? "BT-disable" :
+		     (bt_coex_ver >= glcoex_ver_btdesired_8821c_1ant ?
+		      "Match" : "Mis-Match"))));
 	CL_PRINTF(cli_buf);
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
@@ -5376,7 +4108,7 @@ void ex_halbtc8821c1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 			   "\r\n %-35s = %s%s%s%s%s",
 			   "Profiles",
 			   ((bt_link_info->a2dp_exist) ? "A2DP," : ""),
-			   ((bt_link_info->sco_exist) ?  "SCO," : ""),
+			   ((bt_link_info->sco_exist) ?  "HFP," : ""),
 			   ((bt_link_info->hid_exist) ?
 			    ((coex_sta->hid_busy_num >= 2) ? "HID(4/18)," :
 			     "HID(2/18),") : ""),
@@ -5407,14 +4139,28 @@ void ex_halbtc8821c1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		CL_PRINTF(cli_buf);
 	}
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ 0x%x/ 0x%x",
-		   "Role/IgnWlanAct/Feature/BLEScan",
-		   ((bt_link_info->slave_role) ? "Slave" : "Master"),
-		   ((coex_dm->cur_ignore_wlan_act) ? "Yes" : "No"),
-		   coex_sta->bt_coex_supported_feature,
-		   coex_sta->bt_ble_scan_type);
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %s/ 0x%x",
+				"Role/RoleSwCnt/IgnWlact/Feature",
+				((bt_link_info->slave_role) ? "Slave" : "Master"),
+				coex_sta->cnt_RoleSwitch,
+				((coex_dm->cur_ignore_wlan_act) ? "Yes" : "No"),
+				coex_sta->bt_coex_supported_feature);
 	CL_PRINTF(cli_buf);
 
+	if ((coex_sta->bt_ble_scan_type & 0x7) != 0x0) {
+			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+				"\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
+				"BLEScan Type/TV/Init/Ble",
+				coex_sta->bt_ble_scan_type,
+				(coex_sta->bt_ble_scan_type & 0x1 ?
+				coex_sta->bt_ble_scan_para[0] : 0x0),
+				(coex_sta->bt_ble_scan_type & 0x2 ?
+				coex_sta->bt_ble_scan_para[1] : 0x0),
+				(coex_sta->bt_ble_scan_type & 0x4 ?
+				coex_sta->bt_ble_scan_para[2] : 0x0));
+			CL_PRINTF(cli_buf);
+	}
+
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d",
 		   "ReInit/ReLink/IgnWlact/Page/NameReq",
@@ -5440,6 +4186,24 @@ void ex_halbtc8821c1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 			   coex_sta->bt_reg_vendor_ac & 0x3, u16tmp[0]);
 	CL_PRINTF(cli_buf);
 
+	if (coex_sta->num_of_profile > 0) {
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+			"\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
+			"AFH MAP",
+			coex_sta->bt_afh_map[0],
+			coex_sta->bt_afh_map[1],
+			coex_sta->bt_afh_map[2],
+			coex_sta->bt_afh_map[3],
+			coex_sta->bt_afh_map[4],
+			coex_sta->bt_afh_map[5],
+			coex_sta->bt_afh_map[6],
+			coex_sta->bt_afh_map[7],
+			coex_sta->bt_afh_map[8],
+			coex_sta->bt_afh_map[9]
+			   );
+		CL_PRINTF(cli_buf);
+	}
+
 	for (i = 0; i < BT_INFO_SRC_8821C_1ANT_MAX; i++) {
 		if (coex_sta->bt_info_c2h_cnt[i]) {
 			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
@@ -5538,16 +4302,6 @@ void ex_halbtc8821c1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
 		   "============[Hw setting]============");
 	CL_PRINTF(cli_buf);
-	/*
-		u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
-		u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
-		u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
-		u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
-			   "0x430/0x434/0x42a/0x456",
-			   u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
-		CL_PRINTF(cli_buf);
-	*/
 
 	u32tmp[0] = halbtc8821c1ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
 	u32tmp[1] = halbtc8821c1ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
@@ -5560,7 +4314,8 @@ void ex_halbtc8821c1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_PRINTF(cli_buf);
 
 	if (lte_coex_on) {
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+			   "\r\n %-35s = %d/ %d/ %d/ %d",
 			   "LTE 3Wire/OPMode/UART/UARTMode",
 			   (int)((u32tmp[0] & BIT(6)) >> 6),
 			   (int)((u32tmp[0] & (BIT(5) | BIT(4))) >> 4),
@@ -5570,17 +4325,19 @@ void ex_halbtc8821c1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 
 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
 			   "LTE_Busy/UART_Busy",
-			(int)((u32tmp[1] & BIT(1)) >> 1), (int)(u32tmp[1] & BIT(0)));
+			   (int)((u32tmp[1] & BIT(1)) >> 1),
+			   (int)(u32tmp[1] & BIT(0)));
 		CL_PRINTF(cli_buf);
 	}
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n %-35s = %s (BB:%s)/ %s (BB:%s)/ %s",
+		   "\r\n %-35s = %s (BB:%s)/ %s (BB:%s)/ %s %d",
 		   "GNT_WL_Ctrl/GNT_BT_Ctrl/Dbg",
 		   ((u32tmp[0] & BIT(12)) ? "SW" : "HW"),
 		   ((u32tmp[0] & BIT(8)) ?  "SW" : "HW"),
 		   ((u32tmp[0] & BIT(14)) ? "SW" : "HW"),
 		   ((u32tmp[0] & BIT(10)) ?  "SW" : "HW"),
-		   ((u8tmp[0] & BIT(3)) ? "On" : "Off"));
+		   ((u8tmp[0] & BIT(3)) ? "On" : "Off"),
+		   coex_sta->gnt_error_cnt);
 	CL_PRINTF(cli_buf);
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
@@ -5608,7 +4365,7 @@ void ex_halbtc8821c1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
 		   "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
-		   "0x4c[24:23]/0x64[0]/x4c6[4]/0x40[5]",
+		   "4c[24:23]/64[0]/4c6[4]/40[5]",
 		   (u32tmp[0] & (BIT(24) | BIT(23))) >> 23 , u8tmp[2] & 0x1 ,
 		   (int)((u8tmp[0] & BIT(4)) >> 4),
 		   (int)((u8tmp[1] & BIT(5)) >> 5));
@@ -5655,20 +4412,25 @@ void ex_halbtc8821c1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_PRINTF(cli_buf);
 #endif
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s",
-		   "Wifi-HiPri/ Ccklock/ CckEverLock",
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s/ %d",
+		   "WlHiPri/ Locking/ Locked/ Noisy",
 		   (coex_sta->wifi_is_high_pri_task ? "Yes" : "No"),
 		   (coex_sta->cck_lock ? "Yes" : "No"),
-		   (coex_sta->cck_ever_lock ? "Yes" : "No"));
+		   (coex_sta->cck_ever_lock ? "Yes" : "No"),
+		   coex_sta->wl_noisy_level);
 	CL_PRINTF(cli_buf);
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s",
 		   "0x770(Hi-pri rx/tx)",
-		   coex_sta->high_priority_rx, coex_sta->high_priority_tx);
+		   coex_sta->high_priority_rx, coex_sta->high_priority_tx,
+		   (coex_sta->is_hiPri_rx_overhead ? "(scan overhead!!)" : ""));
 	CL_PRINTF(cli_buf);
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
+
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s",
 		   "0x774(Lo-pri rx/tx)",
-		   coex_sta->low_priority_rx, coex_sta->low_priority_tx);
+		   coex_sta->low_priority_rx, coex_sta->low_priority_tx,
+		   (bt_link_info->slave_role ? "(Slave!!)" : (
+		   coex_sta->is_tdma_btautoslot_hang ? "(auto-slot hang!!)" : "")));
 	CL_PRINTF(cli_buf);
 
 	btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
@@ -5688,7 +4450,11 @@ void ex_halbtc8821c1ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
 
 		/* Write WL "Active" in Score-board for LPS off */
 		halbtc8821c1ant_post_state_to_bt(btcoexist,
-				 BT_8821C_1ANT_SCOREBOARD_ACTIVE, false);
+				BT_8821C_1ANT_SCOREBOARD_ACTIVE |
+				BT_8821C_1ANT_SCOREBOARD_ONOFF |
+				BT_8821C_1ANT_SCOREBOARD_SCAN |
+				BT_8821C_1ANT_SCOREBOARD_UNDERTEST,
+				false);
 
 		halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
 
@@ -5701,9 +4467,13 @@ void ex_halbtc8821c1ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], IPS LEAVE notify\n");
 		BTC_TRACE(trace_buf);
+#if 0
 		halbtc8821c1ant_post_state_to_bt(btcoexist,
-					 BT_8821C_1ANT_SCOREBOARD_ACTIVE, true);
+				BT_8821C_1ANT_SCOREBOARD_ACTIVE, true);
 
+		halbtc8821c1ant_post_state_to_bt(btcoexist,
+				BT_8821C_1ANT_SCOREBOARD_ONOFF, true);
+#endif
 		halbtc8821c1ant_init_hw_config(btcoexist, false, false);
 		halbtc8821c1ant_init_coex_dm(btcoexist);
 
@@ -5777,6 +4547,12 @@ void ex_halbtc8821c1ant_scan_notify(IN struct btc_coexist *btcoexist,
 		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G,
 				   &wifi_under_5g);
 
+		halbtc8821c1ant_post_state_to_bt(btcoexist,
+					BT_8821C_1ANT_SCOREBOARD_ACTIVE |
+					BT_8821C_1ANT_SCOREBOARD_SCAN |
+					BT_8821C_1ANT_SCOREBOARD_ONOFF,
+					true);
+
 		if (wifi_under_5g) {
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], ********** SCAN START notify (5g)\n");
@@ -5789,7 +4565,7 @@ void ex_halbtc8821c1ant_scan_notify(IN struct btc_coexist *btcoexist,
 		coex_sta->wifi_is_high_pri_task = true;
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], ********** SCAN START notify (2g)\n");
+			    "[BTCoex], ********** SCAN START notify (2g)\n");
 		BTC_TRACE(trace_buf);
 
 		/* Force antenna setup for no scan result issue */
@@ -5797,12 +4573,7 @@ void ex_halbtc8821c1ant_scan_notify(IN struct btc_coexist *btcoexist,
 					     FORCE_EXEC,
 					     BT_8821C_1ANT_PHASE_2G_RUNTIME);
 
-		if (!wifi_connected)	/* non-connected scan */
-			halbtc8821c1ant_action_wifi_not_connected_scan(
-				btcoexist);
-		else	/* wifi is connected */
-			halbtc8821c1ant_action_wifi_connected_scan(
-				btcoexist);
+		halbtc8821c1ant_run_coexist_mechanism(btcoexist);
 
 		return;
 	}
@@ -5817,20 +4588,17 @@ void ex_halbtc8821c1ant_scan_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 
 		halbtc8821c1ant_post_state_to_bt(btcoexist,
-					 BT_8821C_1ANT_SCOREBOARD_SCAN, true);
-		halbtc8821c1ant_post_state_to_bt(btcoexist,
-					 BT_8821C_1ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8821C_1ANT_SCOREBOARD_ACTIVE |
+					 BT_8821C_1ANT_SCOREBOARD_SCAN |
+					 BT_8821C_1ANT_SCOREBOARD_ONOFF,
+					 true);
 
 		/* Force antenna setup for no scan result issue */
 		halbtc8821c1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
 					     FORCE_EXEC,
 					     BT_8821C_1ANT_PHASE_2G_RUNTIME);
 
-		if (!wifi_connected)	/* non-connected scan */
-			halbtc8821c1ant_action_wifi_not_connected_scan(
-				btcoexist);
-		else	/* wifi is connected */
-			halbtc8821c1ant_action_wifi_connected_scan(btcoexist);
+		halbtc8821c1ant_run_coexist_mechanism(btcoexist);
 
 	} else {
 
@@ -5844,13 +4612,7 @@ void ex_halbtc8821c1ant_scan_notify(IN struct btc_coexist *btcoexist,
 			    coex_sta->scan_ap_num);
 		BTC_TRACE(trace_buf);
 
-		halbtc8821c1ant_post_state_to_bt(btcoexist,
-					 BT_8821C_1ANT_SCOREBOARD_SCAN, false);
-
-		if (!wifi_connected)
-			halbtc8821c1ant_action_wifi_not_connected(btcoexist);
-		else
-			halbtc8821c1ant_action_wifi_connected(btcoexist);
+		halbtc8821c1ant_run_coexist_mechanism(btcoexist);
 	}
 
 
@@ -5902,11 +4664,12 @@ void ex_halbtc8821c1ant_switchband_notify(IN struct btc_coexist *btcoexist,
 void ex_halbtc8821c1ant_connect_notify(IN struct btc_coexist *btcoexist,
 				       IN u8 type)
 {
-	boolean	wifi_connected = false;
-
 
 	halbtc8821c1ant_post_state_to_bt(btcoexist,
-					 BT_8821C_1ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8821C_1ANT_SCOREBOARD_ACTIVE |
+					 BT_8821C_1ANT_SCOREBOARD_SCAN |
+					 BT_8821C_1ANT_SCOREBOARD_ONOFF,
+					 true);
 
 	if (btcoexist->manual_control ||
 	    btcoexist->stop_coex_dm)
@@ -5943,7 +4706,7 @@ void ex_halbtc8821c1ant_connect_notify(IN struct btc_coexist *btcoexist,
 
 		coex_dm->arp_cnt = 0;
 
-		halbtc8821c1ant_action_wifi_not_connected_asso_auth(btcoexist);
+		halbtc8821c1ant_run_coexist_mechanism(btcoexist);
 
 		/* To keep TDMA case during connect process,
 		to avoid changed by Btinfo and runcoexmechanism */
@@ -5957,13 +4720,7 @@ void ex_halbtc8821c1ant_connect_notify(IN struct btc_coexist *btcoexist,
 			    "[BTCoex], CONNECT FINISH notify (2G)\n");
 		BTC_TRACE(trace_buf);
 
-		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
-				   &wifi_connected);
-
-		if (!wifi_connected) /* non-connected scan */
-			halbtc8821c1ant_action_wifi_not_connected(btcoexist);
-		else
-			halbtc8821c1ant_action_wifi_connected(btcoexist);
+		halbtc8821c1ant_run_coexist_mechanism(btcoexist);
 	}
 
 }
@@ -5987,7 +4744,9 @@ void ex_halbtc8821c1ant_media_status_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 
 		halbtc8821c1ant_post_state_to_bt(btcoexist,
-					 BT_8821C_1ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8821C_1ANT_SCOREBOARD_ACTIVE |
+					 BT_8821C_1ANT_SCOREBOARD_ONOFF,
+					 true);
 
 		if (wifi_under_5g) {
 
@@ -6100,9 +4859,12 @@ void ex_halbtc8821c1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
 		coex_sta->specific_pkt_period_cnt = 2;
 	}
 
-	if (coex_sta->wifi_is_high_pri_task)
-		halbtc8821c1ant_action_wifi_connected_specific_packet(
-			btcoexist);
+	if (coex_sta->wifi_is_high_pri_task) {
+		halbtc8821c1ant_post_state_to_bt(btcoexist,
+					 BT_8821C_1ANT_SCOREBOARD_SCAN, true);
+		halbtc8821c1ant_run_coexist_mechanism(btcoexist);
+	}
+
 }
 
 void ex_halbtc8821c1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
@@ -6110,6 +4872,9 @@ void ex_halbtc8821c1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 {
 	u8				i, rsp_source = 0;
 	boolean				wifi_connected = false;
+	boolean	wifi_scan = false, wifi_link = false, wifi_roam = false,
+			wifi_busy = false;
+	static boolean is_scoreboard_scan = false;
 
 	if (psd_scan->is_AntDet_running == true) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -6203,15 +4968,52 @@ void ex_halbtc8821c1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 		if (coex_sta->bt_info_ext & BIT(2)) {
 			coex_sta->cnt_setupLink++;
 			coex_sta->is_setupLink = true;
-		} else
+
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], Re-Link start in BT info!!\n");
+			BTC_TRACE(trace_buf);
+		} else {
 			coex_sta->is_setupLink = false;
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], Re-Link stop in BT info!!\n");
+			BTC_TRACE(trace_buf);
+		}
 
 		if (coex_sta->bt_info_ext & BIT(3))
 			coex_sta->cnt_IgnWlanAct++;
 
-		if (coex_sta->bt_create_connection)
+		if (coex_sta->bt_info_ext & BIT(6))
+			coex_sta->cnt_RoleSwitch++;
+
+		if (coex_sta->bt_create_connection) {
 			coex_sta->cnt_Page++;
 
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY,
+					   &wifi_busy);
+
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link);
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam);
+
+			if ((wifi_link) || (wifi_roam) || (wifi_scan) ||
+			    (coex_sta->wifi_is_high_pri_task) || (wifi_busy)) {
+
+				is_scoreboard_scan = true;
+				halbtc8821c1ant_post_state_to_bt(btcoexist,
+					 BT_8821C_1ANT_SCOREBOARD_SCAN, true);
+
+			} else
+				halbtc8821c1ant_post_state_to_bt(btcoexist,
+					 BT_8821C_1ANT_SCOREBOARD_SCAN, false);
+
+		} else {
+				if (is_scoreboard_scan) {
+					halbtc8821c1ant_post_state_to_bt(btcoexist,
+						 BT_8821C_1ANT_SCOREBOARD_SCAN, false);
+					is_scoreboard_scan = false;
+				}
+		}
+
 		/* Here we need to resend some wifi info to BT */
 		/* because bt is reset and loss of the info. */
 
@@ -6235,7 +5037,6 @@ void ex_halbtc8821c1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 						BTC_MEDIA_DISCONNECT);
 			}
 
-
 			/*  If Ignore_WLanAct && not SetUp_Link */
 			if ((coex_sta->bt_info_ext & BIT(3)) &&
 			    (!(coex_sta->bt_info_ext & BIT(2)))) {
@@ -6250,24 +5051,29 @@ void ex_halbtc8821c1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 
 	}
 
-
-	halbtc8821c1ant_update_bt_link_info(btcoexist);
-
-	if (btcoexist->manual_control) {
+	if ((coex_sta->bt_info_ext & BIT(5))) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], BtInfoNotify(), No run_coexist_mechanism for Manual CTRL\n");
+			"[BTCoex], BT ext info bit4 check, query BLE Scan type!!\n");
 		BTC_TRACE(trace_buf);
-		return;
-	}
+		coex_sta->bt_ble_scan_type = btcoexist->btc_get_ble_scan_type_from_bt(
+						     btcoexist);
+
+		if ((coex_sta->bt_ble_scan_type & 0x1) == 0x1)
+			coex_sta->bt_ble_scan_para[0]  =
+				btcoexist->btc_get_ble_scan_para_from_bt(btcoexist,
+						0x1);
+		if ((coex_sta->bt_ble_scan_type & 0x2) == 0x2)
+			coex_sta->bt_ble_scan_para[1]  =
+				btcoexist->btc_get_ble_scan_para_from_bt(btcoexist,
+						0x2);
+		if ((coex_sta->bt_ble_scan_type & 0x4) == 0x4)
+			coex_sta->bt_ble_scan_para[2]  =
+				btcoexist->btc_get_ble_scan_para_from_bt(btcoexist,
+						0x4);
 
-	if (btcoexist->stop_coex_dm) {
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], BtInfoNotify(),	No run_coexist_mechanism for Stop Coex DM\n");
-		BTC_TRACE(trace_buf);
-		return;
 	}
 
-	coex_sta->c2h_bt_info_req_sent = false;
+	halbtc8821c1ant_update_bt_link_info(btcoexist);
 
 	halbtc8821c1ant_run_coexist_mechanism(btcoexist);
 }
@@ -6286,14 +5092,13 @@ void ex_halbtc8821c1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 			    "[BTCoex], RF is turned ON!!\n");
 		BTC_TRACE(trace_buf);
 
-		coex_sta->wl_rf_off_on_event = true;
 		btcoexist->stop_coex_dm = false;
-
-		halbtc8821c1ant_post_state_to_bt(btcoexist,
-					 BT_8821C_1ANT_SCOREBOARD_ACTIVE, true);
+#if 0
 		halbtc8821c1ant_post_state_to_bt(btcoexist,
-					 BT_8821C_1ANT_SCOREBOARD_ONOFF, true);
-
+					 BT_8821C_1ANT_SCOREBOARD_ACTIVE |
+					 BT_8821C_1ANT_SCOREBOARD_ONOFF,
+					 true);
+#endif
 	} else if (BTC_RF_OFF == type) {
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -6301,9 +5106,11 @@ void ex_halbtc8821c1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 
 		halbtc8821c1ant_post_state_to_bt(btcoexist,
-				 BT_8821C_1ANT_SCOREBOARD_ACTIVE, false);
-		halbtc8821c1ant_post_state_to_bt(btcoexist,
-					 BT_8821C_1ANT_SCOREBOARD_ONOFF, false);
+				BT_8821C_1ANT_SCOREBOARD_ACTIVE |
+				BT_8821C_1ANT_SCOREBOARD_ONOFF |
+				BT_8821C_1ANT_SCOREBOARD_SCAN |
+				BT_8821C_1ANT_SCOREBOARD_UNDERTEST,
+				false);
 
 		halbtc8821c1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
 
@@ -6312,7 +5119,6 @@ void ex_halbtc8821c1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 					     BT_8821C_1ANT_PHASE_WLAN_OFF);
 
 		btcoexist->stop_coex_dm = true;
-		coex_sta->wl_rf_off_on_event = false;
 	}
 }
 
@@ -6322,9 +5128,11 @@ void ex_halbtc8821c1ant_halt_notify(IN struct btc_coexist *btcoexist)
 	BTC_TRACE(trace_buf);
 
 	halbtc8821c1ant_post_state_to_bt(btcoexist,
-				 BT_8821C_1ANT_SCOREBOARD_ACTIVE, false);
-	halbtc8821c1ant_post_state_to_bt(btcoexist,
-					 BT_8821C_1ANT_SCOREBOARD_ONOFF, false);
+				BT_8821C_1ANT_SCOREBOARD_ACTIVE |
+				BT_8821C_1ANT_SCOREBOARD_ONOFF |
+				BT_8821C_1ANT_SCOREBOARD_SCAN |
+				BT_8821C_1ANT_SCOREBOARD_UNDERTEST,
+				false);
 
 	halbtc8821c1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
 
@@ -6355,9 +5163,11 @@ void ex_halbtc8821c1ant_pnp_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 
 		halbtc8821c1ant_post_state_to_bt(btcoexist,
-				 BT_8821C_1ANT_SCOREBOARD_ACTIVE, false);
-		halbtc8821c1ant_post_state_to_bt(btcoexist,
-					 BT_8821C_1ANT_SCOREBOARD_ONOFF, false);
+				BT_8821C_1ANT_SCOREBOARD_ACTIVE |
+				BT_8821C_1ANT_SCOREBOARD_ONOFF |
+				BT_8821C_1ANT_SCOREBOARD_SCAN |
+				BT_8821C_1ANT_SCOREBOARD_UNDERTEST,
+				false);
 
 		if (BTC_WIFI_PNP_SLEEP_KEEP_ANT == pnp_state) {
 
@@ -6371,7 +5181,8 @@ void ex_halbtc8821c1ant_pnp_notify(IN struct btc_coexist *btcoexist,
 					     BT_8821C_1ANT_PHASE_2G_RUNTIME);
 		} else {
 
-			halbtc8821c1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
+			halbtc8821c1ant_set_ant_path(btcoexist,
+						     BTC_ANT_PATH_AUTO,
 						     FORCE_EXEC,
 					     BT_8821C_1ANT_PHASE_WLAN_OFF);
 		}
@@ -6382,12 +5193,12 @@ void ex_halbtc8821c1ant_pnp_notify(IN struct btc_coexist *btcoexist,
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], Pnp notify to WAKE UP\n");
 		BTC_TRACE(trace_buf);
-
-		halbtc8821c1ant_post_state_to_bt(btcoexist,
-					 BT_8821C_1ANT_SCOREBOARD_ACTIVE, true);
+#if 0
 		halbtc8821c1ant_post_state_to_bt(btcoexist,
-					 BT_8821C_1ANT_SCOREBOARD_ONOFF, true);
-
+					 BT_8821C_1ANT_SCOREBOARD_ACTIVE |
+					 BT_8821C_1ANT_SCOREBOARD_ONOFF,
+					 true);
+#endif
 		btcoexist->stop_coex_dm = false;
 	}
 }
@@ -6407,6 +5218,11 @@ void ex_halbtc8821c1ant_periodical(IN struct btc_coexist *btcoexist)
 {
 
 	struct  btc_board_info	*board_info = &btcoexist->board_info;
+	boolean wifi_busy = false;
+	u16 bt_scoreboard_val = 0;
+	u32 bt_patch_ver;
+	static u8 cnt = 0;
+	boolean bt_relink_finish = false;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], ************* Periodical *************\n");
@@ -6422,6 +5238,33 @@ void ex_halbtc8821c1ant_periodical(IN struct btc_coexist *btcoexist)
 
 	halbtc8821c1ant_monitor_bt_enable_disable(btcoexist);
 
+#if 0
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+
+	/* halbtc8821c1ant_read_score_board(btcoexist, &bt_scoreboard_val); */
+
+	if (wifi_busy) {
+		halbtc8821c1ant_post_state_to_bt(btcoexist,
+				BT_8821C_1ANT_SCOREBOARD_UNDERTEST, true);
+		/*
+		halbtc8821c1ant_post_state_to_bt(btcoexist,
+					 BT_8821C_1ANT_SCOREBOARD_WLBUSY, true);
+
+		if (bt_scoreboard_val & BIT(6))
+			halbtc8821c1ant_query_bt_info(btcoexist); */
+	} else {
+		halbtc8821c1ant_post_state_to_bt(btcoexist,
+					BT_8821C_1ANT_SCOREBOARD_UNDERTEST, false);
+	}
+#endif
+
+	if (coex_sta->bt_relink_downcount != 0) {
+		coex_sta->bt_relink_downcount--;
+
+		if (coex_sta->bt_relink_downcount == 0)
+			bt_relink_finish = true;
+	}
+
 	/* for 4-way, DHCP, EAPOL packet */
 	if (coex_sta->specific_pkt_period_cnt > 0) {
 
@@ -6432,7 +5275,7 @@ void ex_halbtc8821c1ant_periodical(IN struct btc_coexist *btcoexist)
 			coex_sta->wifi_is_high_pri_task = false;
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], ***************** Hi-Pri Task = %s*****************\n",
+			    "[BTCoex], ***************** Hi-Pri Task = %s\n",
 			    (coex_sta->wifi_is_high_pri_task ? "Yes" :
 			     "No"));
 		BTC_TRACE(trace_buf);
@@ -6441,216 +5284,55 @@ void ex_halbtc8821c1ant_periodical(IN struct btc_coexist *btcoexist)
 
 	if (!coex_sta->bt_disabled) {
 		if (coex_sta->bt_coex_supported_feature == 0)
-			coex_sta->bt_coex_supported_feature =
-				btcoexist->btc_get_bt_coex_supported_feature(
-					btcoexist);
+			btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_FEATURE,
+						&coex_sta->bt_coex_supported_feature);
 
 		if ((coex_sta->bt_coex_supported_version == 0) ||
-			 (coex_sta->bt_coex_supported_version == 0xffff))
-			coex_sta->bt_coex_supported_version =
-				btcoexist->btc_get_bt_coex_supported_version(
-					btcoexist);
-
-		/*coex_sta->bt_ble_scan_type = btcoexist->btc_get_ble_scan_type_from_bt(btcoexist); */
+		    (coex_sta->bt_coex_supported_version == 0xffff))
+			btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_VERSION,
+						&coex_sta->bt_coex_supported_version);
 
 		if (coex_sta->bt_reg_vendor_ac == 0xffff)
 			coex_sta->bt_reg_vendor_ac = (u16)(
-				     btcoexist->btc_get_bt_reg(btcoexist, 3,
-							     0xac) & 0xffff);
+					btcoexist->btc_get_bt_reg(btcoexist, 3,
+					0xac) & 0xffff);
 
 		if (coex_sta->bt_reg_vendor_ae == 0xffff)
 			coex_sta->bt_reg_vendor_ae = (u16)(
-				     btcoexist->btc_get_bt_reg(btcoexist, 3,
-							     0xae) & 0xffff);
+					btcoexist->btc_get_bt_reg(btcoexist, 3,
+					0xae) & 0xffff);
 
-#if BT_8821C_1ANT_ANTDET_ENABLE
+		btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER,
+						&bt_patch_ver);
+		btcoexist->bt_info.bt_get_fw_ver = bt_patch_ver;
 
-		if (board_info->btdm_ant_det_finish) {
-			if ((psd_scan->ant_det_result == 12) &&
-			    (psd_scan->ant_det_psd_scan_peak_val == 0)
-			    && (!psd_scan->is_AntDet_running))
-				psd_scan->ant_det_psd_scan_peak_val =
-					btcoexist->btc_get_ant_det_val_from_bt(
-						btcoexist) * 100;
-		}
+		if (coex_sta->num_of_profile > 0) {
+			cnt++;
 
-#endif
+			if (cnt >= 3) {
+				btcoexist->btc_get_bt_afh_map_from_bt(btcoexist, 0,
+					&coex_sta->bt_afh_map[0]);
+				cnt = 0;
+			}
+		}
 	}
 
-	if (halbtc8821c1ant_is_wifibt_status_changed(btcoexist))
+	if (halbtc8821c1ant_is_wifibt_status_changed(btcoexist) || (bt_relink_finish))
 		halbtc8821c1ant_run_coexist_mechanism(btcoexist);
 
-
 }
 
 /*#pragma optimize( "", off )*/
 void ex_halbtc8821c1ant_antenna_detection(IN struct btc_coexist *btcoexist,
 		IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds)
 {
-#if 0
-
-	static u32 ant_det_count = 0, ant_det_fail_count = 0;
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-	u16		u16tmp;
-	u8			AntDetval = 0;
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "xxxxxxxxxxxxxxxx Ext Call AntennaDetect()!!\n");
-	BTC_TRACE(trace_buf);
-
-#if BT_8821C_1ANT_ANTDET_ENABLE
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "xxxxxxxxxxxxxxxx Call AntennaDetect()!!\n");
-	BTC_TRACE(trace_buf);
-
-	if (seconds == 0) {
-		psd_scan->ant_det_try_count	= 0;
-		psd_scan->ant_det_fail_count	= 0;
-		ant_det_count = 0;
-		ant_det_fail_count = 0;
-		board_info->btdm_ant_det_finish = false;
-		board_info->btdm_ant_num_by_ant_det = 1;
-		return;
-	}
-
-	if (!board_info->btdm_ant_det_finish) {
-		psd_scan->ant_det_inteval_count =
-			psd_scan->ant_det_inteval_count + 2;
-
-		if (psd_scan->ant_det_inteval_count >=
-		    BT_8821C_2ANT_ANTDET_RETRY_INTERVAL) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is up, Try Detect!!\n");
-			BTC_TRACE(trace_buf);
-
-			psd_scan->is_AntDet_running = true;
-
-			halbtc8821c1ant_read_score_board(btcoexist,	&u16tmp);
-
-			if (u16tmp & BIT(
-				2)) { /* Antenna detection is already done before last WL power on   */
-				board_info->btdm_ant_det_finish = true;
-				psd_scan->ant_det_try_count = 1;
-				psd_scan->ant_det_fail_count = 0;
-				board_info->btdm_ant_num_by_ant_det = (u16tmp &
-							       BIT(3)) ? 1 : 2;
-				psd_scan->ant_det_result = 12;
-
-				psd_scan->ant_det_psd_scan_peak_val =
-					btcoexist->btc_get_ant_det_val_from_bt(
-						btcoexist) * 100;
 
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Result from BT (%d-Ant)\n",
-					board_info->btdm_ant_num_by_ant_det);
-				BTC_TRACE(trace_buf);
-			} else
-				board_info->btdm_ant_det_finish =
-					halbtc8821c1ant_psd_antenna_detection_check(
-						btcoexist);
-
-			btcoexist->bdontenterLPS = false;
-
-			if (board_info->btdm_ant_det_finish) {
-
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Success!!\n");
-				BTC_TRACE(trace_buf);
-
-				if (board_info->btdm_ant_num_by_ant_det == 2) {
-					board_info->ant_div_cfg = true;
-					halbtc8821c1ant_set_ant_path(btcoexist,
-						BTC_ANT_PATH_WIFI, FORCE_EXEC,
-						BT_8821C_1ANT_PHASE_2G_RUNTIME);
-				} else
-					halbtc8821c1ant_set_ant_path(btcoexist,
-						BTC_ANT_PATH_AUTO, FORCE_EXEC,
-						BT_8821C_1ANT_PHASE_2G_RUNTIME);
-
-				/*for 8821c, btc_set_bt_trx_mask is just used to
-						notify BT stop le tx and Ant Det Result , not set BT RF TRx Mask  */
-				if (psd_scan->ant_det_result != 12) {
-
-					AntDetval = (u8)((
-						psd_scan->ant_det_psd_scan_peak_val
-								 / 100) & 0x7f);
-
-					AntDetval =
-						(board_info->btdm_ant_num_by_ant_det
-						 == 1) ? (AntDetval | 0x80) :
-						AntDetval;
-
-					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-						"xxxxxx AntennaDetect(), Ant Count = %d, PSD Val = %d\n",
-						    ((AntDetval &
-						      0x80) ? 1
-						     : 2), AntDetval
-						    & 0x7f);
-					BTC_TRACE(trace_buf);
-
-					if (btcoexist->btc_set_bt_trx_mask(
-						    btcoexist, AntDetval))
-						BTC_SPRINTF(trace_buf,
-							    BT_TMP_BUF_SIZE,
-							"xxxxxx AntennaDetect(), Notify BT stop le tx by set_bt_trx_mask ok!\n");
-					else
-						BTC_SPRINTF(trace_buf,
-							    BT_TMP_BUF_SIZE,
-							"xxxxxx AntennaDetect(), Notify BT stop le tx by set_bt_trx_mask fail!\n");
-
-					BTC_TRACE(trace_buf);
-				}
-
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Fail!!\n");
-				BTC_TRACE(trace_buf);
-			}
-
-			psd_scan->ant_det_inteval_count = 0;
-			psd_scan->is_AntDet_running = false;
-			/* stimulate coex running */
-			halbtc8821c1ant_run_coexist_mechanism(
-				btcoexist);
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Stimulate Coex running\n!!");
-			BTC_TRACE(trace_buf);
-
-		} else {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is not up! (%d)\n",
-				    psd_scan->ant_det_inteval_count);
-			BTC_TRACE(trace_buf);
-
-			if (psd_scan->ant_det_inteval_count == 8)
-				btcoexist->bdontenterLPS = true;
-			else
-				btcoexist->bdontenterLPS = false;
-		}
-
-	}
-#endif
-
-#endif
 }
 
 
 void ex_halbtc8821c1ant_display_ant_detection(IN struct btc_coexist *btcoexist)
 {
 
-#if 0
-#if BT_8821C_1ANT_ANTDET_ENABLE
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-
-	if (psd_scan->ant_det_try_count != 0)	{
-		halbtc8821c1ant_psd_show_antenna_detect_result(btcoexist);
-
-		if (board_info->btdm_ant_det_finish)
-			halbtc8821c1ant_psd_showdata(btcoexist);
-	}
-#endif
-#endif
 }
 
 void ex_halbtc8821c1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
@@ -6672,3 +5354,4 @@ void ex_halbtc8821c1ant_psd_scan(IN struct btc_coexist *btcoexist,
 
 #endif	/* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */
 
+
diff --git a/rtl8822BU/hal/btc/halbtc8821c1ant.h b/rtl8822BU/hal/btc/halbtc8821c1ant.h
index f712494..25752cd 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8821c1ant.h
+++ b/rtl8822BU/hal/btc/halbtc8821c1ant.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 
 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
 
@@ -176,7 +190,9 @@ enum bt_8821c_1ant_phase {
 enum bt_8821c_1ant_Scoreboard {
 	BT_8821C_1ANT_SCOREBOARD_ACTIVE								= BIT(0),
 	BT_8821C_1ANT_SCOREBOARD_ONOFF								= BIT(1),
-	BT_8821C_1ANT_SCOREBOARD_SCAN								= BIT(2)
+	BT_8821C_1ANT_SCOREBOARD_SCAN								= BIT(2),
+	BT_8821C_1ANT_SCOREBOARD_UNDERTEST							= BIT(3),
+	BT_8821C_1ANT_SCOREBOARD_WLBUSY								= BIT(6)
 };
 
 struct coex_dm_8821c_1ant {
@@ -252,7 +268,6 @@ struct coex_sta_8821c_1ant {
 	boolean					a2dp_exist;
 	boolean					hid_exist;
 	boolean					pan_exist;
-	boolean					bt_hi_pri_link_exist;
 	u8					num_of_profile;
 
 	boolean					under_lps;
@@ -262,11 +277,10 @@ struct coex_sta_8821c_1ant {
 	u32					high_priority_rx;
 	u32					low_priority_tx;
 	u32					low_priority_rx;
+	boolean             is_hiPri_rx_overhead;
 	s8					bt_rssi;
-	boolean					bt_tx_rx_mask;
 	u8					pre_bt_rssi_state;
 	u8					pre_wifi_rssi_state[4];
-	boolean					c2h_bt_info_req_sent;
 	u8					bt_info_c2h[BT_INFO_SRC_8821C_1ANT_MAX][10];
 	u32					bt_info_c2h_cnt[BT_INFO_SRC_8821C_1ANT_MAX];
 	boolean					bt_whck_test;
@@ -274,11 +288,12 @@ struct coex_sta_8821c_1ant {
 	boolean				c2h_bt_remote_name_req;
 	boolean					c2h_bt_page;				/* Add for win8.1 page out issue */
 	boolean					wifi_is_high_pri_task;		/* Add for win8.1 page out issue */
-	u8					bt_retry_cnt;
+
 	u8					bt_info_ext;
 	u8					bt_info_ext2;
 	u32					pop_event_cnt;
 	u8					scan_ap_num;
+	u8					bt_retry_cnt;
 
 	u32					crc_ok_cck;
 	u32					crc_ok_11g;
@@ -296,7 +311,6 @@ struct coex_sta_8821c_1ant {
 	u8					coex_table_type;
 
 	boolean					force_lps_on;
-	u32					wrong_profile_notification;
 
 	boolean					concurrent_rx_mode_on;
 
@@ -306,14 +320,13 @@ struct coex_sta_8821c_1ant {
 	u8					a2dp_bit_pool;
 	u8					cut_version;
 	boolean				acl_busy;
-	boolean				wl_rf_off_on_event;
 	boolean				bt_create_connection;
 
 	u32					bt_coex_supported_feature;
 	u32					bt_coex_supported_version;
 
 	u8					bt_ble_scan_type;
-	u8					bt_ble_scan_para[3];
+	u32					bt_ble_scan_para[3];
 
 	boolean				run_time_state;
 	boolean				freeze_coexrun_by_btinfo;
@@ -331,11 +344,19 @@ struct coex_sta_8821c_1ant {
 	u32					cnt_ReInit;
 	u32					cnt_IgnWlanAct;
 	u32					cnt_Page;
+	u32					cnt_RoleSwitch;
 
 	u16					bt_reg_vendor_ac;
 	u16					bt_reg_vendor_ae;
 
 	boolean				is_setupLink;
+	u8					wl_noisy_level;
+	u32                 gnt_error_cnt;
+
+	u8					bt_afh_map[10];
+	u8					bt_relink_downcount;
+	boolean				is_tdma_btautoslot;
+	boolean				is_tdma_btautoslot_hang;
 };
 
 
@@ -354,6 +375,8 @@ struct rfe_type_8821c_1ant {
 	u8			ext_band_switch_type;			/* 0:DPDT, 1:SPDT */
 	u8			ext_band_switch_ctrl_polarity;
 
+	boolean		ant_at_main_port;
+
 	boolean		wlg_Locate_at_btg;				/*  If true:  WLG at BTG, If false: WLG at WLAG */
 
 	boolean		ext_ant_switch_diversity;		/* If diversity on */
@@ -471,3 +494,4 @@ void ex_halbtc8821c1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
 
 #endif
 
+
diff --git a/rtl8822BU/hal/btc/halbtc8821c2ant.c b/rtl8822BU/hal/btc/halbtc8821c2ant.c
index 5bae816..aa550b4 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8821c2ant.c
+++ b/rtl8822BU/hal/btc/halbtc8821c2ant.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 /* ************************************************************
  * Description:
  *
@@ -35,9 +49,9 @@ const char *const glbt_info_src_8821c_2ant[] = {
 	"BT Info[bt auto report]",
 };
 
-u32	glcoex_ver_date_8821c_2ant = 20160805;
-u32	glcoex_ver_8821c_2ant = 0x04;
-u32 glcoex_ver_btdesired_8821c_2ant = 0x04;
+u32	glcoex_ver_date_8821c_2ant = 20161107;
+u32	glcoex_ver_8821c_2ant = 0x0a;
+u32 glcoex_ver_btdesired_8821c_2ant = 0x0a;
 
 
 /* ************************************************************
@@ -242,7 +256,13 @@ void halbtc8821c2ant_query_bt_info(IN struct btc_coexist *btcoexist)
 {
 	u8			h2c_parameter[1] = {0};
 
-	coex_sta->c2h_bt_info_req_sent = true;
+	if (coex_sta->bt_disabled) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], No query BT info because BT is disabled!\n");
+		BTC_TRACE(trace_buf);
+		return;
+	}
+
 
 	h2c_parameter[0] |= BIT(0);	/* trigger */
 
@@ -253,8 +273,8 @@ void halbtc8821c2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 {
 	u32			reg_hp_txrx, reg_lp_txrx, u32tmp;
 	u32			reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
-	static u8		num_of_bt_counter_chk = 0, cnt_slave = 0;
-
+	static u8		num_of_bt_counter_chk = 0, cnt_slave = 0, cnt_overhead = 0,
+				cnt_autoslot_hang = 0;
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
 	reg_hp_txrx = 0x770;
@@ -273,18 +293,43 @@ void halbtc8821c2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 	coex_sta->low_priority_tx = reg_lp_tx;
 	coex_sta->low_priority_rx = reg_lp_rx;
 
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		    "[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n",
+		    reg_hp_rx, reg_hp_tx, reg_lp_rx, reg_lp_tx);
+
+	BTC_TRACE(trace_buf);
+
+	if (BT_8821C_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
+	    coex_dm->bt_status) {
+
+		if (coex_sta->high_priority_rx >= 15) {
+			if (cnt_overhead < 3)
+				cnt_overhead++;
+
+			if (cnt_overhead == 3)
+				coex_sta->is_hiPri_rx_overhead = true;
+
+		} else {
+			if (cnt_overhead > 0)
+				cnt_overhead--;
+
+			if (cnt_overhead == 0)
+				coex_sta->is_hiPri_rx_overhead = false;
+		}
+	}
 
 	/* reset counter */
 	btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
 
-	if ((coex_sta->low_priority_tx > 1050)  &&
+	if ((coex_sta->low_priority_tx > 1150)	&&
 	    (!coex_sta->c2h_bt_inquiry_page))
 		coex_sta->pop_event_cnt++;
 
-	if ((coex_sta->low_priority_rx >= 950) &&
+	if ((coex_sta->low_priority_rx >= 1150) &&
 	    (coex_sta->low_priority_rx >= coex_sta->low_priority_tx)
-	    && (!coex_sta->under_ips)  && (!coex_sta->c2h_bt_inquiry_page) &&
-	    (coex_sta->bt_link_exist))	{
+	    && (!coex_sta->under_ips)
+	    && (!coex_sta->c2h_bt_inquiry_page)
+	    && ((bt_link_info->a2dp_exist) || (bt_link_info->pan_exist))) {
 		if (cnt_slave >= 2) {
 			bt_link_info->slave_role = true;
 			cnt_slave = 2;
@@ -296,44 +341,73 @@ void halbtc8821c2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 			cnt_slave = 0;
 		} else
 			cnt_slave--;
+	}
 
+	if (coex_sta->is_tdma_btautoslot) {
+		if ((coex_sta->low_priority_tx >= 1300) &&
+		(coex_sta->low_priority_rx <= 150)) {
+			if (cnt_autoslot_hang >= 2) {
+				coex_sta->is_tdma_btautoslot_hang = true;
+				cnt_autoslot_hang = 2;
+			} else
+				cnt_autoslot_hang++;
+		} else {
+			if (cnt_autoslot_hang == 0)	{
+				coex_sta->is_tdma_btautoslot_hang = false;
+				cnt_autoslot_hang = 0;
+			} else
+				cnt_autoslot_hang--;
+		}
 	}
 
-	if ((coex_sta->high_priority_tx == 0) &&
-	    (coex_sta->high_priority_rx == 0) &&
-	    (coex_sta->low_priority_tx == 0) &&
-	    (coex_sta->low_priority_rx == 0)) {
-		num_of_bt_counter_chk++;
-		if (num_of_bt_counter_chk >= 3) {
-			halbtc8821c2ant_query_bt_info(btcoexist);
-			num_of_bt_counter_chk = 0;
+	if (!coex_sta->bt_disabled) {
+
+		if ((coex_sta->high_priority_tx == 0) &&
+		    (coex_sta->high_priority_rx == 0) &&
+		    (coex_sta->low_priority_tx == 0) &&
+		    (coex_sta->low_priority_rx == 0)) {
+			num_of_bt_counter_chk++;
+			if (num_of_bt_counter_chk >= 3) {
+				halbtc8821c2ant_query_bt_info(btcoexist);
+				num_of_bt_counter_chk = 0;
+			}
 		}
 	}
 
 }
 
+
 void halbtc8821c2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 {
 #if 1
 	s32 wifi_rssi = 0;
-	boolean wifi_busy = false, wifi_under_b_mode = false;
-	static u8 cck_lock_counter = 0;
-	u32 total_cnt, reg_val1, reg_val2;
+	boolean wifi_busy = false, wifi_under_b_mode = false,
+		wifi_scan = false;
+	boolean bt_idle = false, wl_idle = false;
+	static u8 cck_lock_counter = 0, wl_noisy_count0 = 0,
+		  wl_noisy_count1 = 3, wl_noisy_count2 = 0;
+	u32 total_cnt, reg_val1, reg_val2, cck_cnt;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 	btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE,
 			   &wifi_under_b_mode);
 
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
+
 	coex_sta->crc_ok_cck = btcoexist->btc_phydm_query_PHY_counter(
-				       btcoexist, PHYDM_INFO_CRC32_OK_CCK);
+				       btcoexist,
+				       PHYDM_INFO_CRC32_OK_CCK);
 	coex_sta->crc_ok_11g = btcoexist->btc_phydm_query_PHY_counter(
-				       btcoexist, PHYDM_INFO_CRC32_OK_LEGACY);
+				       btcoexist,
+				       PHYDM_INFO_CRC32_OK_LEGACY);
 	coex_sta->crc_ok_11n = btcoexist->btc_phydm_query_PHY_counter(
-				       btcoexist, PHYDM_INFO_CRC32_OK_HT);
+				       btcoexist,
+				       PHYDM_INFO_CRC32_OK_HT);
 	coex_sta->crc_ok_11n_vht =
-		btcoexist->btc_phydm_query_PHY_counter(btcoexist,
-				PHYDM_INFO_CRC32_OK_VHT);
+		btcoexist->btc_phydm_query_PHY_counter(
+			btcoexist,
+			PHYDM_INFO_CRC32_OK_VHT);
 
 	coex_sta->crc_err_cck = btcoexist->btc_phydm_query_PHY_counter(
 					btcoexist, PHYDM_INFO_CRC32_ERROR_CCK);
@@ -342,15 +416,58 @@ void halbtc8821c2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 	coex_sta->crc_err_11n = btcoexist->btc_phydm_query_PHY_counter(
 					btcoexist, PHYDM_INFO_CRC32_ERROR_HT);
 	coex_sta->crc_err_11n_vht =
-		btcoexist->btc_phydm_query_PHY_counter(btcoexist,
-				PHYDM_INFO_CRC32_ERROR_VHT);
+		btcoexist->btc_phydm_query_PHY_counter(
+			btcoexist,
+			PHYDM_INFO_CRC32_ERROR_VHT);
+
+	cck_cnt = coex_sta->crc_ok_cck + coex_sta->crc_err_cck;
+
+	if ((coex_dm->bt_status ==
+	     BT_8821C_2ANT_BT_STATUS_NON_CONNECTED_IDLE) ||
+	    (coex_dm->bt_status ==
+	     BT_8821C_2ANT_BT_STATUS_CONNECTED_IDLE) ||
+	    (coex_sta->bt_disabled))
+		bt_idle = true;
 
+		if (cck_cnt > 250) {
+			if (wl_noisy_count2 < 3)
+				wl_noisy_count2++;
+
+			if (wl_noisy_count2 == 3) {
+				wl_noisy_count0 = 0;
+				wl_noisy_count1 = 0;
+			}
+
+		} else if (cck_cnt < 50) {
+			if (wl_noisy_count0 < 3)
+				wl_noisy_count0++;
+
+			if (wl_noisy_count0 == 3) {
+				wl_noisy_count1 = 0;
+				wl_noisy_count2 = 0;
+			}
+
+		} else {
+			if (wl_noisy_count1 < 3)
+				wl_noisy_count1++;
+
+			if (wl_noisy_count1 == 3) {
+				wl_noisy_count0 = 0;
+				wl_noisy_count2 = 0;
+			}
+		}
+
+		if (wl_noisy_count2 == 3)
+			coex_sta->wl_noisy_level = 2;
+		else if (wl_noisy_count1 == 3)
+			coex_sta->wl_noisy_level = 1;
+		else
+			coex_sta->wl_noisy_level = 0;
 
 	if ((wifi_busy) && (wifi_rssi >= 30) && (!wifi_under_b_mode)) {
 		total_cnt = coex_sta->crc_ok_cck + coex_sta->crc_ok_11g
-			    +
-			    coex_sta->crc_ok_11n +
-			    coex_sta->crc_ok_11n_vht;
+				+ coex_sta->crc_ok_11n
+				+ coex_sta->crc_ok_11n_vht;
 
 		if ((coex_dm->bt_status ==
 		     BT_8821C_1ANT_BT_STATUS_ACL_BUSY) ||
@@ -397,73 +514,6 @@ void halbtc8821c2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 #endif
 }
 
-boolean halbtc8821c2ant_is_wifibt_status_changed(IN struct btc_coexist
-		*btcoexist)
-{
-	static boolean	pre_wifi_busy = false, pre_under_4way = false,
-			pre_bt_hs_on = false, pre_bt_off = false;
-	static u8 pre_hid_busy_num = 0;
-	boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
-	boolean wifi_connected = false;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
-			   &wifi_connected);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
-			   &under_4way);
-
-	if (coex_sta->bt_disabled != pre_bt_off) {
-		pre_bt_off = coex_sta->bt_disabled;
-
-		if (coex_sta->bt_disabled)
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "[BTCoex], BT is disabled !!\n");
-		else
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "[BTCoex], BT is enabled !!\n");
-
-		BTC_TRACE(trace_buf);
-
-		coex_sta->bt_coex_supported_feature = 0;
-		coex_sta->bt_coex_supported_version = 0;
-		coex_sta->bt_ble_scan_type = 0;
-		coex_sta->bt_ble_scan_para[0] = 0;
-		coex_sta->bt_ble_scan_para[1] = 0;
-		coex_sta->bt_ble_scan_para[2] = 0;
-		coex_sta->bt_reg_vendor_ac = 0xffff;
-		coex_sta->bt_reg_vendor_ae = 0xffff;
-		return true;
-	}
-
-
-	if (wifi_connected) {
-		if (wifi_busy != pre_wifi_busy) {
-			pre_wifi_busy = wifi_busy;
-			return true;
-		}
-		if (under_4way != pre_under_4way) {
-			pre_under_4way = under_4way;
-			return true;
-		}
-		if (bt_hs_on != pre_bt_hs_on) {
-			pre_bt_hs_on = bt_hs_on;
-			return true;
-		}
-
-		if (!coex_sta->bt_disabled) {
-
-			if (coex_sta->hid_busy_num != pre_hid_busy_num) {
-				pre_hid_busy_num = coex_sta->hid_busy_num;
-				return true;
-			}
-		}
-	}
-
-	return false;
-}
-
-
 void halbtc8821c2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 {
 
@@ -560,7 +610,11 @@ void halbtc8821c2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 	else
 		bt_link_info->hid_only = false;
 
-	if (!(coex_sta->bt_info & BT_INFO_8821C_2ANT_B_CONNECTION)) {
+	if (coex_sta->bt_info & BT_INFO_8821C_2ANT_B_INQ_PAGE) {
+		coex_dm->bt_status = BT_8821C_2ANT_BT_STATUS_INQ_PAGE;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], BtInfoNotify(), BT Inq/page!!!\n");
+	} else if (!(coex_sta->bt_info & BT_INFO_8821C_2ANT_B_CONNECTION)) {
 		coex_dm->bt_status = BT_8821C_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
@@ -777,9 +831,96 @@ void halbtc8821c2ant_post_state_to_bt(
 	IN  boolean                 state
 )
 {
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		"[BTCoex], halbtc8821c2ant_post_state_to_bt: type = %d, state =%d\n",
+		type, state);
+	BTC_TRACE(trace_buf);
 
 	halbtc8821c2ant_write_score_board(btcoexist, (u16) type, state);
+}
+
+
+boolean halbtc8821c2ant_is_wifibt_status_changed(IN struct btc_coexist
+		*btcoexist)
+{
+	static boolean	pre_wifi_busy = false, pre_under_4way = false,
+			pre_bt_hs_on = false, pre_bt_off = false,
+			pre_bt_slave = false;
+	static u8 pre_hid_busy_num = 0, pre_wl_noisy_level = 0;
+	boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
+	boolean wifi_connected = false;
+	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
+			   &wifi_connected);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
+			   &under_4way);
+
+	if (coex_sta->bt_disabled != pre_bt_off) {
+		pre_bt_off = coex_sta->bt_disabled;
+
+		if (coex_sta->bt_disabled)
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], BT is disabled !!\n");
+		else
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], BT is enabled !!\n");
+
+		BTC_TRACE(trace_buf);
 
+		coex_sta->bt_coex_supported_feature = 0;
+		coex_sta->bt_coex_supported_version = 0;
+		coex_sta->bt_ble_scan_type = 0;
+		coex_sta->bt_ble_scan_para[0] = 0;
+		coex_sta->bt_ble_scan_para[1] = 0;
+		coex_sta->bt_ble_scan_para[2] = 0;
+		coex_sta->bt_reg_vendor_ac = 0xffff;
+		coex_sta->bt_reg_vendor_ae = 0xffff;
+		return true;
+	}
+
+
+	if (wifi_connected) {
+		if (wifi_busy != pre_wifi_busy) {
+			pre_wifi_busy = wifi_busy;
+
+			if (wifi_busy)
+				halbtc8821c2ant_post_state_to_bt(btcoexist,
+						BT_8821C_2ANT_SCOREBOARD_UNDERTEST, true);
+			else
+				halbtc8821c2ant_post_state_to_bt(btcoexist,
+						BT_8821C_2ANT_SCOREBOARD_UNDERTEST, false);
+			return true;
+		}
+		if (under_4way != pre_under_4way) {
+			pre_under_4way = under_4way;
+			return true;
+		}
+		if (bt_hs_on != pre_bt_hs_on) {
+			pre_bt_hs_on = bt_hs_on;
+			return true;
+		}
+		if (coex_sta->wl_noisy_level != pre_wl_noisy_level) {
+			pre_wl_noisy_level = coex_sta->wl_noisy_level;
+			return true;
+		}
+	}
+
+	if (!coex_sta->bt_disabled) {
+		if (coex_sta->hid_busy_num != pre_hid_busy_num) {
+			pre_hid_busy_num = coex_sta->hid_busy_num;
+			return true;
+		}
+	}
+
+	if (bt_link_info->slave_role != pre_bt_slave) {
+		pre_bt_slave = bt_link_info->slave_role;
+		return true;
+	}
+
+	return false;
 }
 
 void halbtc8821c2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
@@ -901,7 +1042,7 @@ void halbtc8821c2ant_enable_gnt_to_gpio(IN struct btc_coexist *btcoexist,
 
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x8, 0x0);
 
-		/*  Restore original value  */
+		/*  Restore original value */
 		/*  switch GPIO Mux */
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x66, BIT(4),
 						   bitVal[0]);  /*0x66[4] = 0 */
@@ -1018,67 +1159,65 @@ void halbtc8821c2ant_ltecoex_pathcontrol_owner(IN struct btc_coexist *btcoexist,
 void halbtc8821c2ant_ltecoex_set_gnt_bt(IN struct btc_coexist *btcoexist,
 			IN u8 control_block, IN boolean sw_control, IN u8 state)
 {
-	u32 val = 0, bit_mask;
+	u32 val = 0, val_orig = 0;
 
-	state = state & 0x1;
-	val = (sw_control) ? ((state << 1) | 0x1) : 0;
+	if (!sw_control)
+		val = 0x0;
+	else if (state & 0x1)
+		val = 0x3;
+	else
+		val = 0x1;
+
+	val_orig = halbtc8821c2ant_ltecoex_indirect_read_reg(btcoexist,
+			0x38);
 
 	switch (control_block) {
 	case BT_8821C_2ANT_GNT_BLOCK_RFC_BB:
 	default:
-		bit_mask = 0xc000;
-		halbtc8821c2ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[15:14] */
-		bit_mask = 0x0c00;
-		halbtc8821c2ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[11:10]						 */
+		val = ((val << 14) | (val << 10)) | (val_orig & 0xffff33ff);
 		break;
 	case BT_8821C_2ANT_GNT_BLOCK_RFC:
-		bit_mask = 0xc000;
-		halbtc8821c2ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[15:14] */
+		val = (val << 14) | (val_orig & 0xffff3fff);
 		break;
 	case BT_8821C_2ANT_GNT_BLOCK_BB:
-		bit_mask = 0x0c00;
-		halbtc8821c2ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[11:10] */
+		val = (val << 10) | (val_orig & 0xfffff3ff);
 		break;
-
 	}
 
+	halbtc8821c2ant_ltecoex_indirect_write_reg(btcoexist,
+			0x38, 0xffffffff, val);
 }
 
 void halbtc8821c2ant_ltecoex_set_gnt_wl(IN struct btc_coexist *btcoexist,
 			IN u8 control_block, IN boolean sw_control, IN u8 state)
 {
-	u32 val = 0, bit_mask;
+	u32 val = 0, val_orig = 0;
+
+	if (!sw_control)
+		val = 0x0;
+	else if (state & 0x1)
+		val = 0x3;
+	else
+		val = 0x1;
 
-	state = state & 0x1;
-	val = (sw_control) ? ((state << 1) | 0x1) : 0;
+	val_orig = halbtc8821c2ant_ltecoex_indirect_read_reg(btcoexist,
+			0x38);
 
 	switch (control_block) {
 	case BT_8821C_2ANT_GNT_BLOCK_RFC_BB:
 	default:
-		bit_mask = 0x3000;
-		halbtc8821c2ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[13:12] */
-		bit_mask = 0x0300;
-		halbtc8821c2ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[9:8]						 */
+		val = ((val << 12) | (val << 8)) | (val_orig & 0xffffccff);
 		break;
 	case BT_8821C_2ANT_GNT_BLOCK_RFC:
-		bit_mask = 0x3000;
-		halbtc8821c2ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[13:12] */
+		val = (val << 12) | (val_orig & 0xffffcfff);
 		break;
 	case BT_8821C_2ANT_GNT_BLOCK_BB:
-		bit_mask = 0x0300;
-		halbtc8821c2ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[9:8] */
+		val = (val << 8) | (val_orig & 0xfffffcff);
 		break;
-
 	}
 
+	halbtc8821c2ant_ltecoex_indirect_write_reg(btcoexist,
+			0x38, 0xffffffff, val);
 }
 
 void halbtc8821c2ant_ltecoex_set_coex_table(IN struct btc_coexist *btcoexist,
@@ -1236,7 +1375,7 @@ void halbtc8821c2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 		break;
 	case 3:
 		halbtc8821c2ant_coex_table(btcoexist, force_exec,
-			   0x5a5a5a5a, 0x5a5a5a5a, break_table, select_table);
+			   0x55555555, 0x5a5a5a5a, break_table, select_table);
 		break;
 	case 4:
 		halbtc8821c2ant_coex_table(btcoexist, force_exec,
@@ -1248,7 +1387,7 @@ void halbtc8821c2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 		break;
 	case 6:
 		halbtc8821c2ant_coex_table(btcoexist, force_exec,
-			   0xa5555555, 0xaaaaaaaa, break_table, select_table);
+			   0xa5555555, 0xfafafafa, break_table, select_table);
 		break;
 	case 7:
 		halbtc8821c2ant_coex_table(btcoexist, force_exec,
@@ -1256,7 +1395,7 @@ void halbtc8821c2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 		break;
 	case 8:
 		halbtc8821c2ant_coex_table(btcoexist, force_exec,
-			   0xa5555555, 0x5a5a5a5a, break_table, select_table);
+			   0xa5555555, 0xfafafafa, break_table, select_table);
 		break;
 	case 9:
 		halbtc8821c2ant_coex_table(btcoexist, force_exec,
@@ -1403,6 +1542,18 @@ void halbtc8821c2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
 	u8			h2c_parameter[5] = {0};
 	u8			real_byte1 = byte1, real_byte5 = byte5;
 	boolean			ap_enable = false;
+	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+
+	if (byte5 & BIT(2))
+		coex_sta->is_tdma_btautoslot = true;
+	else
+		coex_sta->is_tdma_btautoslot = false;
+
+	/* release bt-auto slot for auto-slot hang is detected!! */
+	if (coex_sta->is_tdma_btautoslot)
+		if ((coex_sta->is_tdma_btautoslot_hang) ||
+			(bt_link_info->slave_role))
+			byte5 = byte5 & 0xfb;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
 			   &ap_enable);
@@ -1452,30 +1603,33 @@ void halbtc8821c2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
 void halbtc8821c2ant_ps_tdma(IN struct btc_coexist *btcoexist,
 		     IN boolean force_exec, IN boolean turn_on, IN u8 type)
 {
-
 	static u8			psTdmaByte4Modify = 0x0, pre_psTdmaByte4Modify = 0x0;
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
-
 	coex_dm->cur_ps_tdma_on = turn_on;
 	coex_dm->cur_ps_tdma = type;
 
 	/* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */
-	if ((bt_link_info->slave_role) && (bt_link_info->a2dp_exist))
+	if (bt_link_info->slave_role)
 		psTdmaByte4Modify = 0x1;
 	else
 		psTdmaByte4Modify = 0x0;
 
 	if (pre_psTdmaByte4Modify != psTdmaByte4Modify) {
-
 		force_exec = true;
 		pre_psTdmaByte4Modify = psTdmaByte4Modify;
 	}
 
 	if (!force_exec) {
 		if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
-		    (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
+		    (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma)) {
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], Skip TDMA because no change TDMA(%s, %d)\n",
+				    (coex_dm->cur_ps_tdma_on ? "on" : "off"),
+				    coex_dm->cur_ps_tdma);
+			BTC_TRACE(trace_buf);
 			return;
+		}
 	}
 
 	if (coex_dm->cur_ps_tdma_on) {
@@ -1497,119 +1651,158 @@ void halbtc8821c2ant_ps_tdma(IN struct btc_coexist *btcoexist,
 	if (turn_on) {
 		switch (type) {
 		case 1:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x10, 0x03, 0xf1,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x10, 0x03, 0x91,
 						      0x54 | psTdmaByte4Modify);
 			break;
 		case 2:
 		default:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x35, 0x03, 0x71,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x35, 0x03, 0x11,
 						      0x11 | psTdmaByte4Modify);
 			break;
 		case 3:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x3a, 0x3, 0xf1,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x3a, 0x3, 0x91,
 						      0x10 | psTdmaByte4Modify);
 			break;
 		case 4:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x21, 0x3, 0xf1,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x21, 0x3, 0x91,
 						      0x10 | psTdmaByte4Modify);
 			break;
 		case 5:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x25, 0x3, 0xf1,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x25, 0x3, 0x91,
 						      0x10 | psTdmaByte4Modify);
 			break;
 		case 6:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x10, 0x3, 0xf1,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x10, 0x3, 0x91,
 						      0x10 | psTdmaByte4Modify);
 			break;
 		case 7:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x20, 0x3, 0xf1,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x20, 0x3, 0x91,
 						      0x10 | psTdmaByte4Modify);
 			break;
+		case 8:
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x15, 0x03, 0x11,
+						      0x11);
+			break;
 		case 10:
 			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x61,
 						      0x30, 0x03, 0x11,
 						      0x10);
 			break;
 		case 11:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x30, 0x03, 0x71,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x35, 0x03, 0x11,
 						      0x10 | psTdmaByte4Modify);
 			break;
 		case 12:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x21, 0x03, 0x71,
-						      0x11 | psTdmaByte4Modify);
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x35, 0x03, 0x11, 0x11);
 			break;
 		case 13:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x1c, 0x03, 0x71,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x1c, 0x03, 0x11,
 						      0x10 | psTdmaByte4Modify);
 			break;
 		case 14:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x30, 0x03, 0x71,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x20, 0x03, 0x11,
 						      0x11);
 			break;
+		case 15:
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x10, 0x03, 0x11,
+						      0x14);
+			break;
+		case 16:
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x10, 0x03, 0x11,
+						      0x15);
+			break;
+		case 21:
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x30, 0x03, 0x11,
+						      0x10);
+			break;
+		case 22:
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x25, 0x03, 0x11,
+						      0x10);
+			break;
+		case 23:
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x61,
+							0x10, 0x03, 0x11,
+							0x10);
+			break;
 		case 51:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x10, 0x03, 0xf1,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x10, 0x03, 0x91,
 						      0x10 | psTdmaByte4Modify);
 			break;
 		case 101:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x10, 0x03, 0x70,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x10, 0x03, 0x10,
 						      0x54 | psTdmaByte4Modify);
 			break;
 		case 102:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x35, 0x03, 0x71,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x35, 0x03, 0x11,
 						      0x11 | psTdmaByte4Modify);
 			break;
 		case 103:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x3a, 0x3, 0x70,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x3a, 0x3, 0x10,
 						      0x50 | psTdmaByte4Modify);
 			break;
 		case 104:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x21, 0x3, 0x70,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x21, 0x3, 0x10,
 						      0x50 | psTdmaByte4Modify);
 			break;
 		case 105:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x25, 0x3, 0x70,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x25, 0x3, 0x10,
 						      0x50 | psTdmaByte4Modify);
 			break;
 		case 106:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x10, 0x3, 0x70,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x10, 0x3, 0x10,
 						      0x50 | psTdmaByte4Modify);
 			break;
 		case 107:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x20, 0x3, 0x70,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x20, 0x3, 0x10,
 						      0x50 | psTdmaByte4Modify);
 			break;
 		case 108:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x30, 0x3, 0x70,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x30, 0x3, 0x10,
 						      0x50 | psTdmaByte4Modify);
 			break;
 		case 109:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xd7,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x55,
 						      0x10, 0x03, 0x10,
 						      0x54 | psTdmaByte4Modify);
 			break;
+		case 110:
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x55,
+						      0x30, 0x03, 0x10,
+						      0x50 | psTdmaByte4Modify);
+			break;
+		case 111:
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x65,
+						      0x25, 0x03, 0x11,
+						      0x11 | psTdmaByte4Modify);
+			break;
 		case 151:
-			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x10, 0x03, 0x70,
+			halbtc8821c2ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x10, 0x03, 0x10,
 						      0x50 | psTdmaByte4Modify);
 			break;
 		}
@@ -1774,22 +1967,23 @@ void halbtc8821c2ant_set_ext_ant_switch(IN struct btc_coexist *btcoexist,
 	/* swap control polarity if use different switch control polarity*/
 	/*  Normal switch polarity for DPDT, 0xcb4[29:28] = 2b'01 => BTG to Main, WLG to Aux,  0xcb4[29:28] = 2b'10 => BTG to Aux, WLG to Main */
 	/*  Normal switch polarity for SPDT, 0xcb4[29:28] = 2b'01 => Ant to BTG,  0xcb4[29:28] = 2b'10 => Ant to WLG */
-	switch_polatiry_inverse = (rfe_type->ext_ant_switch_ctrl_polarity == 1 ?
-			   ~switch_polatiry_inverse : switch_polatiry_inverse);
+	if (rfe_type->ext_ant_switch_ctrl_polarity)
+		switch_polatiry_inverse =  ~switch_polatiry_inverse;
+
+	/* swap control polarity if 1-Ant at Aux */
+	if (rfe_type->ant_at_main_port == false)
+		switch_polatiry_inverse =  ~switch_polatiry_inverse;
 
 	switch (pos_type) {
 	default:
 	case BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_BT:
 	case BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_NOCARE:
+	case BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_WLA:
 
 		break;
 	case BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_WLG:
-		switch_polatiry_inverse =
-			(rfe_type->wlg_Locate_at_btg == 0 ?
-			 ~switch_polatiry_inverse :
-			 switch_polatiry_inverse);
-		break;
-	case BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_WLA:
+		if (!rfe_type->wlg_Locate_at_btg)
+			switch_polatiry_inverse =  ~switch_polatiry_inverse;
 
 		break;
 	}
@@ -1809,7 +2003,7 @@ void halbtc8821c2ant_set_ext_ant_switch(IN struct btc_coexist *btcoexist,
 			0xff, 0x77);	/* BB SW, DPDT use RFE_ctrl8 and RFE_ctrl9 as control pin */
 
 		regval_0xcb7 = (switch_polatiry_inverse == false ?
-			0x1 : 0x2);     /* 0xcb4[29:28] = 2b'01 for no switch_polatiry_inverse, DPDT_SEL_N =1, DPDT_SEL_P =0  */
+			0x1 : 0x2);     /* 0xcb4[29:28] = 2b'01 for no switch_polatiry_inverse, DPDT_SEL_N =1, DPDT_SEL_P =0 */
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb7,
 						   0x30, regval_0xcb7);
 
@@ -1889,24 +2083,6 @@ void halbtc8821c2ant_set_rfe_type(IN struct btc_coexist *btcoexist)
 {
 	struct  btc_board_info *board_info = &btcoexist->board_info;
 
-#if 0
-	rfe_type->ext_band_switch_exist = false;
-	rfe_type->ext_band_switch_type =
-		BT_8821C_2ANT_EXT_BAND_SWITCH_USE_SPDT;     /* SPDT; */
-	rfe_type->ext_band_switch_ctrl_polarity = 0;
-
-	if (rfe_type->ext_band_switch_exist) {
-
-		/* band switch use RFE_ctrl1 (pin name: PAPE_A) and RFE_ctrl3 (pin name: LNAON_A) */
-
-		/* set RFE_ctrl1 as software control */
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb0, 0xf0, 0x7);
-
-		/* set RFE_ctrl3 as software control */
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb1, 0xf0, 0x7);
-
-	}
-#endif
 
 	/* the following setup should be got from Efuse in the future */
 	rfe_type->rfe_module_type = board_info->rfe_type & 0x1f;
@@ -1920,62 +2096,67 @@ void halbtc8821c2ant_set_rfe_type(IN struct btc_coexist *btcoexist)
 		rfe_type->ext_ant_switch_type =
 			BT_8821C_2ANT_EXT_ANT_SWITCH_USE_DPDT;          /*2-Ant, DPDT, WLG*/
 		rfe_type->wlg_Locate_at_btg = false;
+		rfe_type->ant_at_main_port = true;
 		break;
 	case 1:
 		rfe_type->ext_ant_switch_exist = true;
 		rfe_type->ext_ant_switch_type =
-			BT_8821C_2ANT_EXT_ANT_SWITCH_USE_SPDT;          /*1-Ant, Main, DPDT or SPDT, WLG  */
+			BT_8821C_2ANT_EXT_ANT_SWITCH_USE_SPDT;          /*1-Ant, Main, DPDT or SPDT, WLG */
 		rfe_type->wlg_Locate_at_btg = false;
+		rfe_type->ant_at_main_port = true;
 		break;
 	case 2:
 		rfe_type->ext_ant_switch_exist = true;
 		rfe_type->ext_ant_switch_type =
-			BT_8821C_2ANT_EXT_ANT_SWITCH_USE_SPDT;            /*1-Ant, Main, DPDT or SPDT, BTG  */
+			BT_8821C_2ANT_EXT_ANT_SWITCH_USE_SPDT;            /*1-Ant, Main, DPDT or SPDT, BTG */
 		rfe_type->wlg_Locate_at_btg = true;
+		rfe_type->ant_at_main_port = true;
 		break;
 	case 3:
 		rfe_type->ext_ant_switch_exist = true;
 		rfe_type->ext_ant_switch_type =
-			BT_8821C_2ANT_EXT_ANT_SWITCH_USE_DPDT;          /*1-Ant, Aux, DPDT, WLG  */
+			BT_8821C_2ANT_EXT_ANT_SWITCH_USE_DPDT;          /*1-Ant, Aux, DPDT, WLG */
 		rfe_type->wlg_Locate_at_btg = false;
+		rfe_type->ant_at_main_port = false;
 		break;
 	case 4:
 		rfe_type->ext_ant_switch_exist = true;
 		rfe_type->ext_ant_switch_type =
-			BT_8821C_2ANT_EXT_ANT_SWITCH_USE_DPDT;          /*1-Ant, Aux, DPDT, BTG  */;
+			BT_8821C_2ANT_EXT_ANT_SWITCH_USE_DPDT;          /*1-Ant, Aux, DPDT, BTG */
 		rfe_type->wlg_Locate_at_btg = true;
+		rfe_type->ant_at_main_port = false;
 		break;
 	case 5:
-		rfe_type->ext_ant_switch_exist =
-			false;										 /*2-Ant, no antenna switch, WLG*/
+		rfe_type->ext_ant_switch_exist = false;        /*2-Ant, no antenna switch, WLG*/
 		rfe_type->ext_ant_switch_type =
 			BT_8821C_2ANT_EXT_ANT_SWITCH_NONE;
 		rfe_type->wlg_Locate_at_btg = false;
+		rfe_type->ant_at_main_port = true;
 		break;
 	case 6:
-		rfe_type->ext_ant_switch_exist =
-			false;										 /*2-Ant, no antenna switch, WLG*/
+		rfe_type->ext_ant_switch_exist = false;		 /*2-Ant, no antenna switch, WLG*/
 		rfe_type->ext_ant_switch_type =
 			BT_8821C_2ANT_EXT_ANT_SWITCH_NONE;
 		rfe_type->wlg_Locate_at_btg = false;
+		rfe_type->ant_at_main_port = true;
 		break;
 	case 7:
-		rfe_type->ext_ant_switch_exist = true;
+		rfe_type->ext_ant_switch_exist = true;	 /*2-Ant, DPDT, BTG*/
 		rfe_type->ext_ant_switch_type =
-			BT_8821C_2ANT_EXT_ANT_SWITCH_USE_DPDT;        /*2-Ant, DPDT, BTG*/
+			BT_8821C_2ANT_EXT_ANT_SWITCH_USE_DPDT;
 		rfe_type->wlg_Locate_at_btg = true;
+		rfe_type->ant_at_main_port = true;
 		break;
-
 	}
 
-
+#if 0
 	if (rfe_type->wlg_Locate_at_btg)
 		halbtc8821c2ant_set_int_block(btcoexist, FORCE_EXEC,
 			      BT_8821C_2ANT_INT_BLOCK_SWITCH_TO_WLG_OF_BTG);
 	else
 		halbtc8821c2ant_set_int_block(btcoexist, FORCE_EXEC,
 			      BT_8821C_2ANT_INT_BLOCK_SWITCH_TO_WLG_OF_WLAG);
-
+#endif
 
 }
 
@@ -1991,33 +2172,18 @@ void halbtc8821c2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 	u32			u32tmp1 = 0, u32tmp2 = 0, u32tmp3 = 0;
 	u16			u16tmp1 = 0;
 
-#if BT_8821C_2ANT_ANTDET_ENABLE
-
-	if (ant_pos_type == BTC_ANT_PATH_AUTO) {
-		if ((board_info->btdm_ant_det_finish) &&
-		    (board_info->btdm_ant_num_by_ant_det == 2)) {
-			if (board_info->btdm_ant_pos ==
-			    BTC_ANTENNA_AT_MAIN_PORT)
-				ant_pos_type = BTC_ANT_WIFI_AT_MAIN;
-			else
-				ant_pos_type = BTC_ANT_WIFI_AT_AUX;
-		}
-	}
-
-#endif
-
-	coex_dm->cur_ant_pos_type = (ant_pos_type << 8)  + phase;
+	u32tmp1 = halbtc8821c2ant_ltecoex_indirect_read_reg(btcoexist,
+			0x38);
 
-	if (!force_exec) {
-		if (coex_dm->cur_ant_pos_type == coex_dm->pre_ant_pos_type)
-			return;
+	/* To avoid indirect access fail  */
+	if (((u32tmp1 & 0xf000) >> 12) != ((u32tmp1 & 0x0f00) >> 8)) {
+		force_exec = true;
+		coex_sta->gnt_error_cnt++;
 	}
 
-	coex_dm->pre_ant_pos_type = coex_dm->cur_ant_pos_type;
 
 #if BT_8821C_2ANT_COEX_DBG
-	u32tmp1 = halbtc8821c2ant_ltecoex_indirect_read_reg(btcoexist,
-			0x38);
+
 	u32tmp2 = halbtc8821c2ant_ltecoex_indirect_read_reg(btcoexist,
 			0x54);
 	u8tmp  = btcoexist->btc_read_1byte(btcoexist, 0x73);
@@ -2030,6 +2196,16 @@ void halbtc8821c2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 	BTC_TRACE(trace_buf);
 #endif
 
+	coex_dm->cur_ant_pos_type = (ant_pos_type << 8)  + phase;
+
+	if (!force_exec) {
+		if (coex_dm->cur_ant_pos_type == coex_dm->pre_ant_pos_type)
+			return;
+	}
+
+	coex_dm->pre_ant_pos_type = coex_dm->cur_ant_pos_type;
+
+
 	switch (phase) {
 	case BT_8821C_2ANT_PHASE_COEX_POWERON:
 
@@ -2663,18 +2839,91 @@ void halbtc8821c2ant_action_coex_all_off(IN struct btc_coexist *btcoexist)
 
 }
 
-void halbtc8821c2ant_action_wifi_under5g(IN struct btc_coexist *btcoexist)
+void halbtc8821c2ant_action_bt_whql_test(IN struct btc_coexist *btcoexist)
 {
+	halbtc8821c2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
+	halbtc8821c2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-	/* fw all off */
-	halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
 	halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+	halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+}
 
-	halbtc8821c2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
-	halbtc8821c2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+void halbtc8821c2ant_action_bt_hs(IN struct btc_coexist *btcoexist)
+{
+	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
+	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
+	u8		wifi_rssi_state, bt_rssi_state;
+
+	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
+	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
+	u8		wifi_rssi_state2, bt_rssi_state2;
+	boolean	wifi_busy = false, wifi_turbo = false;
+
+
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
+			   &coex_sta->scan_ap_num);
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		"############# [BTCoex],  scan_ap_num = %d, wl_noisy = %d\n",
+		    coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
+	BTC_TRACE(trace_buf);
+
+#if 1
+	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
+		wifi_turbo = true;
+#endif
+
+
+	wifi_rssi_state = halbtc8821c2ant_wifi_rssi_state(btcoexist,
+			  &prewifi_rssi_state, 2,
+			  coex_sta->wifi_coex_thres , 0);
+
+	wifi_rssi_state2 = halbtc8821c2ant_wifi_rssi_state(btcoexist,
+			   &prewifi_rssi_state2, 2,
+			   coex_sta->wifi_coex_thres2 , 0);
+
+	bt_rssi_state = halbtc8821c2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
+			coex_sta->bt_coex_thres , 0);
+
+	bt_rssi_state2 = halbtc8821c2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
+			 coex_sta->bt_coex_thres2 , 0);
+
+	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
+	    BTC_RSSI_HIGH(bt_rssi_state)) {
+
+		halbtc8821c2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
+		halbtc8821c2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+
+		coex_dm->is_switch_to_1dot5_ant = false;
+
+		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+
+		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
+		   BTC_RSSI_HIGH(bt_rssi_state2)) {
+
+		halbtc8821c2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
+		halbtc8821c2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
+
+		coex_dm->is_switch_to_1dot5_ant = false;
+
+		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+
+		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+
+
+	} else {
+
+		halbtc8821c2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
+		halbtc8821c2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+
+		coex_dm->is_switch_to_1dot5_ant = true;
+
+		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+
+		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+	}
 
-	halbtc8821c2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-				     BT_8821C_2ANT_PHASE_5G_RUNTIME);
 }
 
 
@@ -2682,7 +2931,7 @@ void halbtc8821c2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
 {
 
 	boolean	wifi_connected = false;
-	boolean		scan = false, link = false, roam = false;
+	boolean	wifi_scan = false, wifi_link = false, wifi_roam = false;
 	boolean			wifi_busy = false;
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
@@ -2692,173 +2941,102 @@ void halbtc8821c2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
 			   &wifi_connected);
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
-
-	if (link || roam || coex_sta->wifi_is_high_pri_task) {
-
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], Wifi link/roam/hi-pri-task process + BT Inq/Page!!\n");
-		BTC_TRACE(trace_buf);
-
-		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-						     8);
-		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam);
 
-	} else if (scan) {
+	if ((coex_sta->bt_create_connection) && ((wifi_link) || (wifi_roam)
+		|| (wifi_scan) || (wifi_busy) || (coex_sta->wifi_is_high_pri_task))) {
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Wifi scan process + BT Inq/Page!!\n");
+			"[BTCoex], Wifi link/roam/Scan/busy/hi-pri-task + BT Inq/Page!!\n");
 		BTC_TRACE(trace_buf);
 
 		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
 						     8);
 
-		if (coex_sta->bt_create_connection)
+		if ((bt_link_info->a2dp_exist) && (!bt_link_info->pan_exist))
 			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						12);
+						15);
 		else
 			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
 						11);
-
-	}  else if (wifi_connected) {
+	}  else if ((!wifi_connected) && (!wifi_scan)) {
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Wifi connected + BT Inq/Page!!\n");
+			"[BTCoex], Wifi no-link + no-scan + BT Inq/Page!!\n");
 		BTC_TRACE(trace_buf);
 
-		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-						     8);
-
-		if (wifi_busy) {
+		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 
-			if ((bt_link_info->a2dp_exist) &&
-			    (bt_link_info->acl_busy))
-				halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 13);
-			else
-				halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 11);
+		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+	} else if (bt_link_info->pan_exist) {
 
-		} else
-			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						13);
+		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
 
-	} else {
+		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
 
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Wifi no-link + BT Inq/Page!!\n");
-		BTC_TRACE(trace_buf);
+	} else if (bt_link_info->a2dp_exist) {
 
-		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 16);
 
-		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
-	}
+		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
+	} else {
 
-	halbtc8821c2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0xd8);
-	halbtc8821c2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
-}
+		if ((wifi_link) || (wifi_roam) || (wifi_scan) || (wifi_busy)
+			|| (coex_sta->wifi_is_high_pri_task))
+			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 21);
+		else
+			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 23);
 
-void halbtc8821c2ant_action_wifi_link_process(IN struct btc_coexist *btcoexist)
-{
-	u32	u32tmp, u32tmpb;
-	u8	u8tmpa;
-	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
+	}
 
 	halbtc8821c2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0xd8);
 	halbtc8821c2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
-
-	halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
-
-	if ((bt_link_info->a2dp_exist) && (bt_link_info->acl_busy))
-		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
-	else
-		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
-
 }
 
 
-void halbtc8821c2ant_action_wifi_nonconnected(IN struct btc_coexist *btcoexist)
+void halbtc8821c2ant_action_bt_relink(IN struct btc_coexist *btcoexist)
 {
-	halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-
-	/* fw all off */
+	/*halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 8);
+	halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1); */
 	halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
-
-	halbtc8821c2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
-	halbtc8821c2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+	halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
+	coex_sta->bt_relink_downcount = 2;
 }
 
+
 void halbtc8821c2ant_action_bt_idle(IN struct btc_coexist *btcoexist)
 {
-	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
-	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
-	u8		wifi_rssi_state, bt_rssi_state;
 
-	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
-	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
-	u8		wifi_rssi_state2, bt_rssi_state2;
-
-	boolean	wifi_connected = false;
-	boolean		scan = false, link = false, roam = false;
 	boolean			wifi_busy = false;
 
-	wifi_rssi_state = halbtc8821c2ant_wifi_rssi_state(btcoexist,
-			  &prewifi_rssi_state, 2,
-			  coex_sta->wifi_coex_thres , 0);
-
-	wifi_rssi_state2 = halbtc8821c2ant_wifi_rssi_state(btcoexist,
-			   &prewifi_rssi_state2, 2,
-			   coex_sta->wifi_coex_thres2 , 0);
-
-	bt_rssi_state = halbtc8821c2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
-			coex_sta->bt_coex_thres , 0);
-
-	bt_rssi_state2 = halbtc8821c2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
-			 coex_sta->bt_coex_thres2 , 0);
-
-
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
-			   &wifi_connected);
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
-
-	if (scan || link || roam) {
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Wifi link process + BT Idle!!\n");
-		BTC_TRACE(trace_buf);
+	if (!wifi_busy) {
 
-		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-						     7);
+		halbtc8821c2ant_coex_table_with_type(btcoexist,
+						     NORMAL_EXEC, 8);
 
-		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
-	} else if (wifi_connected) {
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Wifi connected + BT Idle!!\n");
-		BTC_TRACE(trace_buf);
+		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
+	} else {  /* if wl busy */
 
-		if (wifi_busy)
-			halbtc8821c2ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 0);
+		if (BT_8821C_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
+		    coex_dm->bt_status) {
 
-		else
 			halbtc8821c2ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 0);
 
-		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
-
-	} else {
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Wifi no-link + BT Idle!!\n");
-		BTC_TRACE(trace_buf);
+			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+		} else {
 
-		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+			halbtc8821c2ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC,
+							     8);
+			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+						12);
+		}
 	}
 
 	halbtc8821c2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0xd8);
@@ -2918,16 +3096,10 @@ void halbtc8821c2ant_action_sco(IN struct btc_coexist *btcoexist)
 
 		coex_dm->is_switch_to_1dot5_ant = false;
 
-		if (wifi_bw == 0) { /* if 11bg mode */
-			/*for 4/18 hid */
-			halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 9);
-			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						10);
-		} else {
-			halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-							     3);
-			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
-		}
+		halbtc8821c2ant_coex_table_with_type(btcoexist,
+						     NORMAL_EXEC,
+						     1);
+		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 8);
 	}
 
 }
@@ -2982,18 +3154,49 @@ void halbtc8821c2ant_action_hid(IN struct btc_coexist *btcoexist)
 
 		coex_dm->is_switch_to_1dot5_ant = false;
 
-		if ((wifi_bw == 0) &&
-		    (coex_sta->hid_busy_num >= 2)) {   /* if 11bg mode */
-			/*for 4/18 hid */
-			halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 9);
-			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						10);
+		/*for 4/18 hid */
+		if (coex_sta->hid_busy_num >= 2) {
+
+			if (wifi_bw == 0) {   /* if 11bg mode */
+
+				halbtc8821c2ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 8);
+				halbtc8821c2ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x1, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
+				halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							111);
+			} else {
+
+				if (wifi_busy) {
+					halbtc8821c2ant_coex_table_with_type(
+						btcoexist,
+						NORMAL_EXEC, 8);
+					halbtc8821c2ant_set_wltoggle_coex_table(btcoexist,
+								NORMAL_EXEC,
+								0x2, 0xaa,
+								0x5a, 0xaa,
+								0xaa);
+					halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+								111);
+				} else {
 
+					halbtc8821c2ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC,
+									     3);
+					halbtc8821c2ant_ps_tdma(btcoexist,
+							NORMAL_EXEC, true, 14);
+				}
+			}
 		} else {
 
-			halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
+			halbtc8821c2ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC,
 							     3);
-			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+						14);
 		}
 	}
 
@@ -3010,18 +3213,19 @@ void halbtc8821c2ant_action_a2dp(IN struct btc_coexist *btcoexist)
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
 	u8		wifi_rssi_state2, bt_rssi_state2;
 	boolean	wifi_busy = false, wifi_turbo = false;
+	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
 			   &coex_sta->scan_ap_num);
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "############# [BTCoex],  scan_ap_num = %d\n",
-		    coex_sta->scan_ap_num);
+		"############# [BTCoex],  scan_ap_num = %d, wl_noisy = %d\n",
+		    coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
 	BTC_TRACE(trace_buf);
 
 #if 1
-	if ((wifi_busy) && (coex_sta->scan_ap_num <= 4))
+	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
 		wifi_turbo = true;
 #endif
 
@@ -3061,17 +3265,12 @@ void halbtc8821c2ant_action_a2dp(IN struct btc_coexist *btcoexist)
 
 		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 
-		if (wifi_busy) {
-			if (coex_sta->is_setupLink)
-				halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 51);
-			else
-				halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 1);
-		} else
-
+		if (wifi_busy)
+			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+						true, 1);
+		else
 			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						2);
+						16);
 	} else {
 
 		halbtc8821c2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
@@ -3079,23 +3278,35 @@ void halbtc8821c2ant_action_a2dp(IN struct btc_coexist *btcoexist)
 
 		coex_dm->is_switch_to_1dot5_ant = true;
 
-		if (wifi_turbo)
-			halbtc8821c2ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 6);
-		else
-			halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-							     7);
+		if ((coex_sta->bt_relink_downcount != 0)
+			&& (wifi_busy)) {
 
-		if (wifi_busy) {
-			if (coex_sta->is_setupLink)
-				halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 151);
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"############# [BTCoex],  BT Re-Link + A2DP + WL busy\n");
+			BTC_TRACE(trace_buf);
+
+			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+			halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
+
+		} else {
+
+			if (wifi_turbo)
+				halbtc8821c2ant_coex_table_with_type(btcoexist,
+								     NORMAL_EXEC, 6);
 			else
+				halbtc8821c2ant_coex_table_with_type(btcoexist,
+								     NORMAL_EXEC,
+								     7);
+
+			if (wifi_busy)
 				halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC,
 							true, 101);
-		} else
-			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						102);
+			else
+				halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							16);
+			/*	halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							102); */
+		}
 
 	}
 
@@ -3117,12 +3328,12 @@ void halbtc8821c2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
 	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
 			   &coex_sta->scan_ap_num);
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "############# [BTCoex],  scan_ap_num = %d\n",
-		    coex_sta->scan_ap_num);
+		"############# [BTCoex],  scan_ap_num = %d, wl_noisy = %d\n",
+		    coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
 	BTC_TRACE(trace_buf);
 
 #if 1
-	if ((wifi_busy) && (coex_sta->scan_ap_num <= 4))
+	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
 		wifi_turbo = true;
 #endif
 
@@ -3191,7 +3402,8 @@ void halbtc8821c2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
 			halbtc8821c2ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 6);
 		else
-			halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
+			halbtc8821c2ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC,
 							     7);
 
 		if (wifi_busy)
@@ -3207,87 +3419,6 @@ void halbtc8821c2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
 
 }
 
-
-/* PAN(HS) only */
-void halbtc8821c2ant_action_pan_hs(IN struct btc_coexist *btcoexist)
-{
-	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
-	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
-	u8		wifi_rssi_state, bt_rssi_state;
-
-	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
-	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
-	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean	wifi_busy = false, wifi_turbo = false;
-
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
-	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
-			   &coex_sta->scan_ap_num);
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "############# [BTCoex],  scan_ap_num = %d\n",
-		    coex_sta->scan_ap_num);
-	BTC_TRACE(trace_buf);
-
-#if 1
-	if ((wifi_busy) && (coex_sta->scan_ap_num <= 4))
-		wifi_turbo = true;
-#endif
-
-
-	wifi_rssi_state = halbtc8821c2ant_wifi_rssi_state(btcoexist,
-			  &prewifi_rssi_state, 2,
-			  coex_sta->wifi_coex_thres , 0);
-
-	wifi_rssi_state2 = halbtc8821c2ant_wifi_rssi_state(btcoexist,
-			   &prewifi_rssi_state2, 2,
-			   coex_sta->wifi_coex_thres2 , 0);
-
-	bt_rssi_state = halbtc8821c2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
-			coex_sta->bt_coex_thres , 0);
-
-	bt_rssi_state2 = halbtc8821c2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
-			 coex_sta->bt_coex_thres2 , 0);
-
-	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
-	    BTC_RSSI_HIGH(bt_rssi_state)) {
-
-		halbtc8821c2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
-		halbtc8821c2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
-
-		coex_dm->is_switch_to_1dot5_ant = false;
-
-		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-
-		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
-	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
-		   BTC_RSSI_HIGH(bt_rssi_state2)) {
-
-		halbtc8821c2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
-		halbtc8821c2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
-
-		coex_dm->is_switch_to_1dot5_ant = false;
-
-		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-
-		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
-
-
-	} else {
-
-		halbtc8821c2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
-		halbtc8821c2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
-
-		coex_dm->is_switch_to_1dot5_ant = true;
-
-		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-
-		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
-	}
-
-}
-
-
 void halbtc8821c2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -3298,6 +3429,11 @@ void halbtc8821c2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
 	u8		wifi_rssi_state2, bt_rssi_state2;
 	boolean			wifi_busy = false;
+	u32  wifi_bw = 1;
+	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
+			   &wifi_bw);
 
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
@@ -3337,16 +3473,12 @@ void halbtc8821c2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
 
 		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 
-		if (wifi_busy) {
-			if (coex_sta->is_setupLink)
-				halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 51);
-			else
-				halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 1);
-		} else
+		if (wifi_busy)
+			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+						true, 1);
+		else
 			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						2);
+						1);
 	} else {
 
 		halbtc8821c2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
@@ -3354,32 +3486,51 @@ void halbtc8821c2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
 
 		coex_dm->is_switch_to_1dot5_ant = true;
 
+		if ((coex_sta->bt_relink_downcount != 0)
+			&& (wifi_busy)) {
 
-		if (wifi_busy) {
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"############# [BTCoex],  BT Re-Link + A2DP + WL busy\n");
+			BTC_TRACE(trace_buf);
+
+			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+			halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
+		} else if (wifi_busy) {
 			if (coex_sta->hid_busy_num >= 2) {
 				halbtc8821c2ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 8);
-				halbtc8821c2ant_set_wltoggle_coex_table(btcoexist,
-								NORMAL_EXEC,
-								0x2, 0xaa,
-								0x5a, 0xaa,
-									0xaa);
-				halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-							109);
-			} else if (coex_sta->is_setupLink) {
-				halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+
+				if (wifi_bw == 0)  /* 11bg mode */
+					halbtc8821c2ant_set_wltoggle_coex_table(
+					btcoexist,
+					NORMAL_EXEC,
+					0x1, 0xaa,
+					0x5a, 0xaa,
+					0xaa);
+				else
+					halbtc8821c2ant_set_wltoggle_coex_table(
+					btcoexist,
+					NORMAL_EXEC,
+					0x2, 0xaa,
+					0x5a, 0xaa,
+					0xaa);
+
 				halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 151);
+							true, 109);
 			} else {
-				halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+				halbtc8821c2ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 1);
 				halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC,
 							true, 101);
 			}
 		} else {
-			halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
+			halbtc8821c2ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC,
 							     1);
 			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						102);
+						15);
+			/* halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+						102); */
 		}
 
 	}
@@ -3403,12 +3554,12 @@ void halbtc8821c2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
 	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
 			   &coex_sta->scan_ap_num);
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "############# [BTCoex],  scan_ap_num = %d\n",
-		    coex_sta->scan_ap_num);
+		"############# [BTCoex],  scan_ap_num = %d, wl_noisy = %d\n",
+		    coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
 	BTC_TRACE(trace_buf);
 
 #if 1
-	if ((wifi_busy) && (coex_sta->scan_ap_num <= 4))
+	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
 		wifi_turbo = true;
 #endif
 
@@ -3473,7 +3624,8 @@ void halbtc8821c2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
 			halbtc8821c2ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 6);
 		else
-			halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
+			halbtc8821c2ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC,
 							     7);
 
 		if (wifi_busy) {
@@ -3512,12 +3664,12 @@ void halbtc8821c2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
 	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
 			   &coex_sta->scan_ap_num);
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "############# [BTCoex],  scan_ap_num = %d\n",
-		    coex_sta->scan_ap_num);
+		"############# [BTCoex],  scan_ap_num = %d, wl_noisy = %d\n",
+		    coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
 	BTC_TRACE(trace_buf);
 
 #if 1
-	if ((wifi_busy) && (coex_sta->scan_ap_num <= 4))
+	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
 		wifi_turbo = true;
 #endif
 
@@ -3580,7 +3732,8 @@ void halbtc8821c2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
 			halbtc8821c2ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 6);
 		else
-			halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
+			halbtc8821c2ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC,
 							     7);
 
 		if (wifi_busy) {
@@ -3611,9 +3764,12 @@ void halbtc8821c2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
 
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
-	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean			wifi_busy = false;
+	u8	wifi_rssi_state2, bt_rssi_state2;
+	boolean	wifi_busy = false;
+	u32	wifi_bw = 1;
 
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
+			   &wifi_bw);
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
@@ -3653,15 +3809,11 @@ void halbtc8821c2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
 		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 
 		if (wifi_busy)
-
 			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
 						3);
 		else
-
 			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
 						4);
-
-
 	} else {
 
 		halbtc8821c2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
@@ -3669,16 +3821,38 @@ void halbtc8821c2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
 
 		coex_dm->is_switch_to_1dot5_ant = true;
 
-		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+		if (coex_sta->hid_busy_num >= 2) {
 
-		if (wifi_busy)
+			halbtc8821c2ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 8);
+			if (wifi_bw == 0)  /* 11bg mode */
+					halbtc8821c2ant_set_wltoggle_coex_table(
+					btcoexist,
+					NORMAL_EXEC,
+					0x1, 0xaa,
+					0x5a, 0xaa,
+					0xaa);
+			else
+					halbtc8821c2ant_set_wltoggle_coex_table(
+					btcoexist,
+					NORMAL_EXEC,
+					0x2, 0xaa,
+					0x5a, 0xaa,
+					0xaa);
 
 			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						103);
-		else
+						110);
+		} else {
 
-			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						104);
+			halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+
+			if (wifi_busy)
+				halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							103);
+			else
+				halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							104);
+		}
 
 	}
 
@@ -3693,9 +3867,12 @@ void halbtc8821c2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
 
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
-	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean			wifi_busy = false;
+	u8	wifi_rssi_state2, bt_rssi_state2;
+	boolean	wifi_busy = false;
+	u32	wifi_bw = 1;
 
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
+			   &wifi_bw);
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
@@ -3754,33 +3931,59 @@ void halbtc8821c2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
 
 		coex_dm->is_switch_to_1dot5_ant = true;
 
-		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
-
-		if (wifi_busy) {
+		if (coex_sta->hid_busy_num >= 2) {
+			halbtc8821c2ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 8);
 
-			if ((coex_sta->a2dp_bit_pool > 40) &&
-			    (coex_sta->a2dp_bit_pool < 255))
-				halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 107);
+			if (wifi_bw == 0)  /* 11bg mode */
+					halbtc8821c2ant_set_wltoggle_coex_table(
+					btcoexist,
+					NORMAL_EXEC,
+					0x1, 0xaa,
+					0x5a, 0xaa,
+					0xaa);
 			else
-				halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 105);
-		} else
+					halbtc8821c2ant_set_wltoggle_coex_table(
+					btcoexist,
+					NORMAL_EXEC,
+					0x2, 0xaa,
+					0x5a, 0xaa,
+					0xaa);
+
 			halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						106);
+						110);
+		} else {
+			halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+
+			if (wifi_busy) {
+
+				if ((coex_sta->a2dp_bit_pool > 40) &&
+				    (coex_sta->a2dp_bit_pool < 255))
+					halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+								true, 107);
+				else
+					halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+								true, 105);
+			} else
+				halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+							106);
+		}
 	}
 
 }
 
+void halbtc8821c2ant_action_wifi_under5g(IN struct btc_coexist *btcoexist)
+{
 
+	/* fw all off */
+	halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+	halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 
-void halbtc8821c2ant_action_bt_whck_test(IN struct btc_coexist *btcoexist)
-{
 	halbtc8821c2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
 	halbtc8821c2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-	halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-	halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+	halbtc8821c2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
+				     BT_8821C_2ANT_PHASE_5G_RUNTIME);
 }
 
 void halbtc8821c2ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
@@ -3792,6 +3995,124 @@ void halbtc8821c2ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
 	halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 	halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
 }
+void halbtc8821c2ant_action_wifi_linkscan_process(IN struct btc_coexist
+		*btcoexist)
+{
+	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+
+	halbtc8821c2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0xd8);
+	halbtc8821c2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+
+	halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
+
+	if (bt_link_info->pan_exist) {
+
+		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
+
+		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
+
+	} else if (bt_link_info->a2dp_exist) {
+
+		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 16);
+
+		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
+	} else {
+
+		halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 21);
+
+		halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
+	}
+
+}
+
+void halbtc8821c2ant_action_wifi_not_connected(IN struct btc_coexist *btcoexist)
+{
+	halbtc8821c2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+
+	/* fw all off */
+	halbtc8821c2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+
+	halbtc8821c2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
+	halbtc8821c2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+}
+
+void halbtc8821c2ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
+{
+	switch (coex_dm->cur_algorithm) {
+
+	case BT_8821C_2ANT_COEX_ALGO_SCO:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], Action 2-Ant, algorithm = SCO.\n");
+		BTC_TRACE(trace_buf);
+		halbtc8821c2ant_action_sco(btcoexist);
+		break;
+	case BT_8821C_2ANT_COEX_ALGO_HID:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], Action 2-Ant, algorithm = HID.\n");
+		BTC_TRACE(trace_buf);
+		halbtc8821c2ant_action_hid(btcoexist);
+		break;
+	case BT_8821C_2ANT_COEX_ALGO_A2DP:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], Action 2-Ant, algorithm = A2DP.\n");
+		BTC_TRACE(trace_buf);
+		halbtc8821c2ant_action_a2dp(btcoexist);
+		break;
+	case BT_8821C_2ANT_COEX_ALGO_A2DP_PANHS:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
+		BTC_TRACE(trace_buf);
+		halbtc8821c2ant_action_a2dp_pan_hs(btcoexist);
+		break;
+	case BT_8821C_2ANT_COEX_ALGO_PANEDR:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n");
+		BTC_TRACE(trace_buf);
+		halbtc8821c2ant_action_pan_edr(btcoexist);
+		break;
+	case BT_8821C_2ANT_COEX_ALGO_PANEDR_A2DP:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n");
+		BTC_TRACE(trace_buf);
+		halbtc8821c2ant_action_pan_edr_a2dp(btcoexist);
+		break;
+	case BT_8821C_2ANT_COEX_ALGO_PANEDR_HID:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
+		BTC_TRACE(trace_buf);
+		halbtc8821c2ant_action_pan_edr_hid(btcoexist);
+		break;
+	case BT_8821C_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
+		BTC_TRACE(trace_buf);
+		halbtc8821c2ant_action_hid_a2dp_pan_edr(
+			btcoexist);
+		break;
+	case BT_8821C_2ANT_COEX_ALGO_HID_A2DP:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n");
+		BTC_TRACE(trace_buf);
+		halbtc8821c2ant_action_hid_a2dp(btcoexist);
+		break;
+	case BT_8821C_2ANT_COEX_ALGO_NOPROFILEBUSY:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], Action 2-Ant, algorithm = No-Profile busy.\n");
+		BTC_TRACE(trace_buf);
+		halbtc8821c2ant_action_bt_idle(btcoexist);
+		break;
+	default:
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n");
+		BTC_TRACE(trace_buf);
+		halbtc8821c2ant_action_coex_all_off(btcoexist);
+		break;
+	}
+
+	coex_dm->pre_algorithm = coex_dm->cur_algorithm;
+
+}
+
 
 void halbtc8821c2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 {
@@ -3801,9 +4122,16 @@ void halbtc8821c2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 	boolean				miracast_plus_bt = false;
 	boolean				scan = false, link = false, roam = false,
-				wifi_connected = false, wifi_under_5g = false;
-
+					under_4way = false,
+					wifi_connected = false, wifi_under_5g =
+							false,
+							bt_hs_on = false;
 
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
+			   &under_4way);
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], RunCoexistMechanism()===>\n");
@@ -3871,7 +4199,7 @@ void halbtc8821c2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], BT is under WHCK TEST!!!\n");
 		BTC_TRACE(trace_buf);
-		halbtc8821c2ant_action_bt_whck_test(btcoexist);
+		halbtc8821c2ant_action_bt_whql_test(btcoexist);
 		return;
 	}
 
@@ -3891,15 +4219,10 @@ void halbtc8821c2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 		return;
 	}
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
-
-	if (scan || link || roam) {
+	if (coex_sta->is_setupLink) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], WiFi is under Link Process !!\n");
-		BTC_TRACE(trace_buf);
-		halbtc8821c2ant_action_wifi_link_process(btcoexist);
+			    "[BTCoex], BT is re-link !!!\n");
+		halbtc8821c2ant_action_bt_relink(btcoexist);
 		return;
 	}
 
@@ -3922,7 +4245,20 @@ void halbtc8821c2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 
 		btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
 				   &miracast_plus_bt);
-		halbtc8821c2ant_action_wifi_multi_port(btcoexist);
+
+		if (scan || link || roam || under_4way) {
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], scan = %d, link = %d, roam = %d 4way = %d!!!\n",
+				    scan, link, roam, under_4way);
+			BTC_TRACE(trace_buf);
+
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], wifi is under linkscan process + Multi-Port !!\n");
+			BTC_TRACE(trace_buf);
+
+			halbtc8821c2ant_action_wifi_linkscan_process(btcoexist);
+		} else
+			halbtc8821c2ant_action_wifi_multi_port(btcoexist);
 
 		return;
 	} else {
@@ -3932,120 +4268,56 @@ void halbtc8821c2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 	}
 
 
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
+
+	if (bt_hs_on) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "############# [BTCoex],  BT Is hs\n");
+		BTC_TRACE(trace_buf);
+		halbtc8821c2ant_action_bt_hs(btcoexist);
+		return;
+	}
+
+	if ((BT_8821C_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
+	     coex_dm->bt_status) ||
+	    (BT_8821C_2ANT_BT_STATUS_CONNECTED_IDLE ==
+	     coex_dm->bt_status)) {
+
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], Action 2-Ant, bt idle!!.\n");
+		BTC_TRACE(trace_buf);
+
+		halbtc8821c2ant_action_bt_idle(btcoexist);
+		return;
+	}
+
 	algorithm = halbtc8821c2ant_action_algorithm(btcoexist);
 	coex_dm->cur_algorithm = algorithm;
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Algorithm = %d\n",
 		    coex_dm->cur_algorithm);
 	BTC_TRACE(trace_buf);
 
-
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
 			   &wifi_connected);
 
-	if (!wifi_connected) {
-
+	if (scan || link || roam || under_4way) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Action 2-Ant, wifi non-connected!!.\n");
+			    "[BTCoex], WiFi is under Link Process !!\n");
 		BTC_TRACE(trace_buf);
-		halbtc8821c2ant_action_wifi_nonconnected(btcoexist);
-
-	} else if ((BT_8821C_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
-		    coex_dm->bt_status) ||
-		   (BT_8821C_2ANT_BT_STATUS_CONNECTED_IDLE ==
-		    coex_dm->bt_status)) {
+		halbtc8821c2ant_action_wifi_linkscan_process(btcoexist);
+	} else if (wifi_connected) {
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Action 2-Ant, bt idle!!.\n");
+			    "[BTCoex], Action 2-Ant, wifi connected!!.\n");
 		BTC_TRACE(trace_buf);
-
-		halbtc8821c2ant_action_bt_idle(btcoexist);
+		halbtc8821c2ant_action_wifi_connected(btcoexist);
 
 	} else {
 
-		if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], pre_algorithm=%d, cur_algorithm=%d\n",
-				coex_dm->pre_algorithm, coex_dm->cur_algorithm);
-			BTC_TRACE(trace_buf);
-		}
-
-		switch (coex_dm->cur_algorithm) {
-
-		case BT_8821C_2ANT_COEX_ALGO_SCO:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = SCO.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8821c2ant_action_sco(btcoexist);
-			break;
-		case BT_8821C_2ANT_COEX_ALGO_HID:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = HID.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8821c2ant_action_hid(btcoexist);
-			break;
-		case BT_8821C_2ANT_COEX_ALGO_A2DP:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = A2DP.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8821c2ant_action_a2dp(btcoexist);
-			break;
-		case BT_8821C_2ANT_COEX_ALGO_A2DP_PANHS:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
-			BTC_TRACE(trace_buf);
-			halbtc8821c2ant_action_a2dp_pan_hs(btcoexist);
-			break;
-		case BT_8821C_2ANT_COEX_ALGO_PANEDR:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n");
-			BTC_TRACE(trace_buf);
-			halbtc8821c2ant_action_pan_edr(btcoexist);
-			break;
-		case BT_8821C_2ANT_COEX_ALGO_PANHS:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = HS mode.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8821c2ant_action_pan_hs(btcoexist);
-			break;
-		case BT_8821C_2ANT_COEX_ALGO_PANEDR_A2DP:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8821c2ant_action_pan_edr_a2dp(btcoexist);
-			break;
-		case BT_8821C_2ANT_COEX_ALGO_PANEDR_HID:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8821c2ant_action_pan_edr_hid(btcoexist);
-			break;
-		case BT_8821C_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8821c2ant_action_hid_a2dp_pan_edr(
-				btcoexist);
-			break;
-		case BT_8821C_2ANT_COEX_ALGO_HID_A2DP:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8821c2ant_action_hid_a2dp(btcoexist);
-			break;
-		case BT_8821C_2ANT_COEX_ALGO_NOPROFILEBUSY:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = No-Profile busy.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8821c2ant_action_bt_idle(btcoexist);
-			break;
-		default:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n");
-			BTC_TRACE(trace_buf);
-			halbtc8821c2ant_action_coex_all_off(btcoexist);
-			break;
-		}
-		coex_dm->pre_algorithm = coex_dm->cur_algorithm;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], Action 2-Ant, wifi not-connected!!.\n");
+		BTC_TRACE(trace_buf);
+		halbtc8821c2ant_action_wifi_not_connected(btcoexist);
 	}
 }
 
@@ -4071,6 +4343,7 @@ void halbtc8821c2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
 	coex_sta->cnt_setupLink = 0;
 	coex_sta->cnt_IgnWlanAct = 0;
 	coex_sta->cnt_Page = 0;
+	coex_sta->cnt_RoleSwitch = 0;
 
 	halbtc8821c2ant_query_bt_info(btcoexist);
 }
@@ -4082,6 +4355,7 @@ void halbtc8821c2ant_init_hw_config(IN struct btc_coexist *btcoexist,
 	u8	u8tmp = 0;
 	u32	 vendor;
 	u32				u32tmp0 = 0, u32tmp1 = 0, u32tmp2 = 0, u32tmp3 = 0;
+	u8 i;
 
 
 	u32tmp3 = btcoexist->btc_read_4byte(btcoexist, 0xcb4);
@@ -4106,7 +4380,11 @@ void halbtc8821c2ant_init_hw_config(IN struct btc_coexist *btcoexist,
 	coex_sta->bt_reg_vendor_ac = 0xffff;
 	coex_sta->bt_reg_vendor_ae = 0xffff;
 	coex_sta->isolation_btween_wb = BT_8821C_2ANT_DEFAULT_ISOLATION;
+	coex_sta->gnt_error_cnt = 0;
+	coex_sta->bt_relink_downcount = 0;
 
+	for (i = 0; i <= 9; i++)
+		coex_sta->bt_afh_map[i] = 0;
 
 	/* 0xf0[15:12] --> Chip Cut information */
 	coex_sta->cut_version = (btcoexist->btc_read_1byte(btcoexist,
@@ -4138,10 +4416,12 @@ void halbtc8821c2ant_init_hw_config(IN struct btc_coexist *btcoexist,
 
 	halbtc8821c2ant_enable_gnt_to_gpio(btcoexist, true);
 
+#if 0
 	/* check if WL firmware download ok */
 	/*if (btcoexist->btc_read_1byte(btcoexist, 0x80) == 0xc6)*/
 	halbtc8821c2ant_post_state_to_bt(btcoexist,
 					 BT_8821C_2ANT_SCOREBOARD_ONOFF, true);
+#endif
 
 	/* Enable counter statistics */
 	btcoexist->btc_write_1byte(btcoexist, 0x76e,
@@ -4186,1265 +4466,7 @@ void halbtc8821c2ant_init_hw_config(IN struct btc_coexist *btcoexist,
 
 }
 
-#if 0
-u32 halbtc8821c2ant_psd_log2base(IN struct btc_coexist *btcoexist, IN u32 val)
-{
-	u8	j;
-	u32	tmp, tmp2, val_integerd_b = 0, tindex, shiftcount = 0;
-	u32	result, val_fractiond_b = 0, table_fraction[21] = {0, 432, 332, 274, 232, 200,
-				   174, 151, 132, 115, 100, 86, 74, 62, 51, 42,
-							   32, 23, 15, 7, 0
-							      };
-
-	if (val == 0)
-		return 0;
-
-	tmp = val;
-
-	while (1) {
-		if (tmp == 1)
-			break;
-		else {
-			tmp = (tmp >> 1);
-			shiftcount++;
-		}
-	}
-
-
-	val_integerd_b = shiftcount + 1;
-
-	tmp2 = 1;
-	for (j = 1; j <= val_integerd_b; j++)
-		tmp2 = tmp2 * 2;
-
-	tmp = (val * 100) / tmp2;
-	tindex = tmp / 5;
-
-	if (tindex > 20)
-		tindex = 20;
-
-	val_fractiond_b = table_fraction[tindex];
-
-	result = val_integerd_b * 100 - val_fractiond_b;
-
-	return result;
-
-
-}
-
-void halbtc8821c2ant_psd_show_antenna_detect_result(IN struct btc_coexist
-		*btcoexist)
-{
-	u8		*cli_buf = btcoexist->cli_buf;
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n============[Antenna Detection info]  ============\n");
-	CL_PRINTF(cli_buf);
-
-	if (psd_scan->ant_det_result == 12) { /* Get Ant Det from BT  */
-
-		if (board_info->btdm_ant_num_by_ant_det == 1)
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   "\r\n %-35s = %s (%d~%d)",
-				   "Ant Det Result", "1-Antenna",
-				   BT_8821C_2ANT_ANTDET_PSDTHRES_1ANT,
-				BT_8821C_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION);
-		else {
-
-			if (psd_scan->ant_det_psd_scan_peak_val >
-			    (BT_8821C_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION)
-			    * 100)
-				CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-					   "\r\n %-35s = %s (>%d)",
-					"Ant Det Result", "2-Antenna (Bad-Isolation)",
-					BT_8821C_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
-			else
-				CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-					   "\r\n %-35s = %s (%d~%d)",
-					"Ant Det Result", "2-Antenna (Good-Isolation)",
-					BT_8821C_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
-					   + psd_scan->ant_det_thres_offset,
-					BT_8821C_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
-		}
-
-	} else if (psd_scan->ant_det_result == 1)
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (>%d)",
-			   "Ant Det Result", "2-Antenna (Bad-Isolation)",
-			   BT_8821C_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
-	else if (psd_scan->ant_det_result == 2)
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)",
-			   "Ant Det Result", "2-Antenna (Good-Isolation)",
-			   BT_8821C_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
-			   + psd_scan->ant_det_thres_offset,
-			   BT_8821C_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
-	else
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)",
-			   "Ant Det Result", "1-Antenna",
-			   BT_8821C_2ANT_ANTDET_PSDTHRES_1ANT,
-			   BT_8821C_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
-			   + psd_scan->ant_det_thres_offset);
-
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s ",
-		   "Antenna Detection Finish",
-		   (board_info->btdm_ant_det_finish
-		    ? "Yes" : "No"));
-	CL_PRINTF(cli_buf);
-
-	switch (psd_scan->ant_det_result) {
-	case 0:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is not available)");
-		break;
-	case 1:  /* 2-Ant bad-isolation */
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is available)");
-		break;
-	case 2:  /* 2-Ant good-isolation */
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is available)");
-		break;
-	case 3:  /* 1-Ant */
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is available)");
-		break;
-	case 4:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(Uncertainty result)");
-		break;
-	case 5:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "(Pre-Scan fai)");
-		break;
-	case 6:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(WiFi is Scanning)");
-		break;
-	case 7:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is not idle)");
-		break;
-	case 8:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(Abort by WiFi Scanning)");
-		break;
-	case 9:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(Antenna Init is not ready)");
-		break;
-	case 10:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is Inquiry or page)");
-		break;
-	case 11:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is Disabled)");
-		break;
-	case 12:
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "(BT is available, result from BT");
-		break;
-	}
-	CL_PRINTF(cli_buf);
-
-	if (psd_scan->ant_det_result == 12) {
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dB",
-			   "PSD Scan Peak Value",
-			   psd_scan->ant_det_psd_scan_peak_val / 100);
-		CL_PRINTF(cli_buf);
-		return;
-	}
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
-		   "Ant Detect Total Count", psd_scan->ant_det_try_count);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
-		   "Ant Detect Fail Count", psd_scan->ant_det_fail_count);
-	CL_PRINTF(cli_buf);
-
-	if ((!board_info->btdm_ant_det_finish) &&
-	    (psd_scan->ant_det_result != 5))
-		return;
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Response",
-		   (psd_scan->ant_det_result ? "ok" : "fail"));
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ms", "BT Tx Time",
-		   psd_scan->ant_det_bt_tx_time);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "BT Tx Ch",
-		   psd_scan->ant_det_bt_le_channel);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d",
-		   "WiFi PSD Cent-Ch/Offset/Span",
-		   psd_scan->real_cent_freq, psd_scan->real_offset,
-		   psd_scan->real_span);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dB",
-		   "PSD Pre-Scan Peak Value",
-		   psd_scan->ant_det_pre_psdscan_peak_val / 100);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (<= %d)",
-		   "PSD Pre-Scan result",
-		   (psd_scan->ant_det_result != 5 ? "ok" : "fail"),
-		   BT_8821C_2ANT_ANTDET_PSDTHRES_BACKGROUND
-		   + psd_scan->ant_det_thres_offset);
-	CL_PRINTF(cli_buf);
-
-	if (psd_scan->ant_det_result == 5)
-		return;
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s dB",
-		   "PSD Scan Peak Value", psd_scan->ant_det_peak_val);
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s MHz",
-		   "PSD Scan Peak Freq", psd_scan->ant_det_peak_freq);
-	CL_PRINTF(cli_buf);
-
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "TFBGA Package",
-		   (board_info->tfbga_package) ?  "Yes" : "No");
-	CL_PRINTF(cli_buf);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
-		   "PSD Threshold Offset", psd_scan->ant_det_thres_offset);
-	CL_PRINTF(cli_buf);
-
-}
-
-void halbtc8821c2ant_psd_showdata(IN struct btc_coexist *btcoexist)
-{
-	u8		*cli_buf = btcoexist->cli_buf;
-	u32		delta_freq_per_point;
-	u32		freq, freq1, freq2, n = 0, i = 0, j = 0, m = 0, psd_rep1, psd_rep2;
-
-	if (psd_scan->ant_det_result == 12)
-		return;
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n\n============[PSD info]  (%d)============\n",
-		   psd_scan->psd_gen_count);
-	CL_PRINTF(cli_buf);
-
-	if (psd_scan->psd_gen_count == 0) {
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n No data !!\n");
-		CL_PRINTF(cli_buf);
-		return;
-	}
-
-	if (psd_scan->psd_point == 0)
-		delta_freq_per_point = 0;
-	else
-		delta_freq_per_point = psd_scan->psd_band_width /
-				       psd_scan->psd_point;
-
-	/* if (psd_scan->is_psd_show_max_only) */
-	if (0) {
-		psd_rep1 = psd_scan->psd_max_value / 100;
-		psd_rep2 = psd_scan->psd_max_value - psd_rep1 * 100;
-
-		freq = ((psd_scan->real_cent_freq - 20) * 1000000 +
-			psd_scan->psd_max_value_point * delta_freq_per_point);
-		freq1 = freq / 1000000;
-		freq2 = freq / 1000 - freq1 * 1000;
-
-		if (freq2 < 100)
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   "\r\n Freq = %d.0%d MHz",
-				   freq1, freq2);
-		else
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   "\r\n Freq = %d.%d MHz",
-				   freq1, freq2);
-
-		if (psd_rep2 < 10)
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   ", Value = %d.0%d dB, (%d)\n",
-				   psd_rep1, psd_rep2, psd_scan->psd_max_value);
-		else
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   ", Value = %d.%d dB, (%d)\n",
-				   psd_rep1, psd_rep2, psd_scan->psd_max_value);
-
-		CL_PRINTF(cli_buf);
-	} else {
-		m = psd_scan->psd_start_point;
-		n = psd_scan->psd_start_point;
-		i = 1;
-		j = 1;
-
-		while (1) {
-			do {
-				freq = ((psd_scan->real_cent_freq - 20) *
-					1000000 + m *
-					delta_freq_per_point);
-				freq1 = freq / 1000000;
-				freq2 = freq / 1000 - freq1 * 1000;
-
-				if (i == 1) {
-					if (freq2 == 0)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Freq%6d.000",
-							   freq1);
-					else if (freq2 < 100)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Freq%6d.0%2d",
-							   freq1,
-							   freq2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Freq%6d.%3d",
-							   freq1,
-							   freq2);
-				} else if ((i % 8 == 0) ||
-					   (m == psd_scan->psd_stop_point)) {
-					if (freq2 == 0)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.000\n", freq1);
-					else if (freq2 < 100)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.0%2d\n", freq1,
-							   freq2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.%3d\n", freq1,
-							   freq2);
-				} else {
-					if (freq2 == 0)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.000", freq1);
-					else if (freq2 < 100)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.0%2d", freq1,
-							   freq2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.%3d", freq1,
-							   freq2);
-				}
-
-				i++;
-				m++;
-				CL_PRINTF(cli_buf);
-
-			} while ((i <= 8) && (m <= psd_scan->psd_stop_point));
-
-
-			do {
-				psd_rep1 = psd_scan->psd_report_max_hold[n] /
-					   100;
-				psd_rep2 = psd_scan->psd_report_max_hold[n] -
-					   psd_rep1 *
-					   100;
-
-				if (j == 1) {
-					if (psd_rep2 < 10)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Val %7d.0%d",
-							   psd_rep1,
-							   psd_rep2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Val %7d.%d",
-							   psd_rep1,
-							   psd_rep2);
-				} else if ((j % 8 == 0)  ||
-					   (n == psd_scan->psd_stop_point)) {
-					if (psd_rep2 < 10)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							"%7d.0%d\n", psd_rep1,
-							   psd_rep2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%7d.%d\n", psd_rep1,
-							   psd_rep2);
-				} else {
-					if (psd_rep2 < 10)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%7d.0%d", psd_rep1,
-							   psd_rep2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%7d.%d", psd_rep1,
-							   psd_rep2);
-				}
-
-				j++;
-				n++;
-				CL_PRINTF(cli_buf);
-
-			} while ((j <= 8) && (n <= psd_scan->psd_stop_point));
-
-			if ((m > psd_scan->psd_stop_point) ||
-			    (n > psd_scan->psd_stop_point))
-				break;
-			else {
-				i = 1;
-				j = 1;
-			}
-
-		}
-	}
-
-
-}
-
-#pragma optimize("", off)
-void halbtc8821c2ant_psd_maxholddata(IN struct btc_coexist *btcoexist,
-				     IN u32 gen_count)
-{
-	u32 i = 0;
-	u32 loop_i_max = 0, loop_val_max = 0;
-
-	if (gen_count == 1) {
-		memcpy(psd_scan->psd_report_max_hold,
-		       psd_scan->psd_report,
-		       BT_8821C_2ANT_ANTDET_PSD_POINTS * sizeof(u32));
-	}
-
-	for (i = psd_scan->psd_start_point;
-	     i <= psd_scan->psd_stop_point; i++) {
-
-		/* update max-hold value at each freq point */
-		if (psd_scan->psd_report[i] > psd_scan->psd_report_max_hold[i])
-			psd_scan->psd_report_max_hold[i] =
-				psd_scan->psd_report[i];
-
-		/*	search the max value in this seep */
-		if (psd_scan->psd_report[i] > loop_val_max) {
-			loop_val_max = psd_scan->psd_report[i];
-			loop_i_max = i;
-		}
-	}
-
-	if (gen_count <= BT_8821C_2ANT_ANTDET_PSD_SWWEEPCOUNT)
-		psd_scan->psd_loop_max_value[gen_count - 1] = loop_val_max;
-
-}
-
-
-#pragma optimize("", off)
-u32 halbtc8821c2ant_psd_getdata(IN struct btc_coexist *btcoexist, IN u32 point)
-{
-	/* reg 0x808[9:0]: FFT data x */
-	/* reg 0x808[22]: 0-->1 to get 1 FFT data y */
-	/* reg 0x8b4[15:0]: FFT data y report */
-
-	u32 val = 0, psd_report = 0;
-	int k = 0;
-
-	val = btcoexist->btc_read_4byte(btcoexist, 0x808);
-
-	val &= 0xffbffc00;
-	val |= point;
-
-	btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-	val |= 0x00400000;
-	btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-	while (1) {
-		if (k++ > BT_8821C_2ANT_ANTDET_SWEEPPOINT_DELAY)
-			break;
-	}
-
-	val = btcoexist->btc_read_4byte(btcoexist, 0x8b4);
-
-	psd_report = val & 0x0000ffff;
-
-	return psd_report;
-}
-
-#pragma optimize("", off)
-boolean halbtc8821c2ant_psd_sweep_point(IN struct btc_coexist *btcoexist,
-		IN u32 cent_freq, IN s32 offset, IN u32 span, IN u32 points,
-					IN u32 avgnum, IN u32 loopcnt)
-{
-	u32	 i = 0, val = 0, n = 0, k = 0, j, point_index = 0;
-	u32	points1 = 0, psd_report = 0;
-	u32	start_p = 0, stop_p = 0, delta_freq_per_point = 156250;
-	u32    psd_center_freq = 20 * 10 ^ 6;
-	boolean outloop = false, scan , roam, is_sweep_ok = true;
-	u8	 flag = 0;
-	u32	tmp = 0, u32tmp1 = 0;
-	u32	wifi_original_channel = 1;
-	u32 psd_sum = 0, avg_cnt = 0;
-	u32	i_max = 0, val_max = 0, val_max2 = 0;
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "xxxxxxxxxxxxxxxx PSD Sweep Start!!\n");
-	BTC_TRACE(trace_buf);
-
-	do {
-		switch (flag) {
-		case 0:  /* Get PSD parameters */
-		default:
-
-			psd_scan->psd_band_width = 40 * 1000000;
-			psd_scan->psd_point = points;
-			psd_scan->psd_start_base = points / 2;
-			psd_scan->psd_avg_num = avgnum;
-			psd_scan->real_cent_freq = cent_freq;
-			psd_scan->real_offset = offset;
-			psd_scan->real_span = span;
-
-
-			points1 = psd_scan->psd_point;
-			delta_freq_per_point = psd_scan->psd_band_width /
-					       psd_scan->psd_point;
-
-			/* PSD point setup */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x808);
-			val &= 0xffff0fff;
-
-			switch (psd_scan->psd_point) {
-			case 128:
-				val |= 0x0;
-				break;
-			case 256:
-			default:
-				val |= 0x00004000;
-				break;
-			case 512:
-				val |= 0x00008000;
-				break;
-			case 1024:
-				val |= 0x0000c000;
-				break;
-			}
-
-			switch (psd_scan->psd_avg_num) {
-			case 1:
-				val |= 0x0;
-				break;
-			case 8:
-				val |= 0x00001000;
-				break;
-			case 16:
-				val |= 0x00002000;
-				break;
-			case 32:
-			default:
-				val |= 0x00003000;
-				break;
-			}
-			btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-			flag = 1;
-			break;
-		case 1:	  /* calculate the PSD point index from freq/offset/span */
-			psd_center_freq = psd_scan->psd_band_width / 2 +
-					  offset * (1000000);
-
-			start_p = psd_scan->psd_start_base + (psd_center_freq -
-				span * (1000000) / 2) / delta_freq_per_point;
-			psd_scan->psd_start_point = start_p -
-						    psd_scan->psd_start_base;
-
-			stop_p = psd_scan->psd_start_base + (psd_center_freq +
-				span * (1000000) / 2) / delta_freq_per_point;
-			psd_scan->psd_stop_point = stop_p -
-						   psd_scan->psd_start_base - 1;
-
-			flag = 2;
-			break;
-		case 2:  /* set RF channel/BW/Mode */
-
-			/* set 3-wire off */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x88c);
-			val |= 0x00300000;
-			btcoexist->btc_write_4byte(btcoexist, 0x88c, val);
-
-			/* CCK off */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x800);
-			val &= 0xfeffffff;
-			btcoexist->btc_write_4byte(btcoexist, 0x800, val);
-
-			/* Tx-pause on */
-			btcoexist->btc_write_1byte(btcoexist, 0x522, 0x6f);
-
-			/* store WiFi original channel */
-			wifi_original_channel = btcoexist->btc_get_rf_reg(
-					btcoexist, BTC_RF_A, 0x18, 0x3ff);
-
-			/* Set RF channel */
-			if (cent_freq == 2484)
-				btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
-							  0x18, 0x3ff, 0xe);
-			else
-				btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
-					  0x18, 0x3ff, (cent_freq - 2412) / 5 +
-						  1); /* WiFi TRx Mask on */
-
-			/* save original RCK value */
-			u32tmp1 =  btcoexist->btc_get_rf_reg(
-					   btcoexist, BTC_RF_A, 0x1d, 0xfffff);
-
-			/* Enter debug mode */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xde,
-						  0x2, 0x1);
-
-			/* Set RF Rx filter corner */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1d,
-						  0xfffff, 0x2e);
-
-
-			/* Set  RF mode = Rx, RF Gain = 0x320a0 */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x0,
-						  0xfffff, 0x320a0);
-
-			while (1) {
-				if (k++ > BT_8821C_2ANT_ANTDET_SWEEPPOINT_DELAY)
-					break;
-			}
-			flag = 3;
-			break;
-		case 3:
-			psd_scan->psd_gen_count = 0;
-			for (j = 1; j <= loopcnt; j++) {
-
-				btcoexist->btc_get(btcoexist,
-						   BTC_GET_BL_WIFI_SCAN, &scan);
-				btcoexist->btc_get(btcoexist,
-						   BTC_GET_BL_WIFI_ROAM, &roam);
-
-				if (scan || roam) {
-					is_sweep_ok = false;
-					break;
-				}
-				memset(psd_scan->psd_report, 0,
-				       psd_scan->psd_point * sizeof(u32));
-				start_p = psd_scan->psd_start_point +
-					  psd_scan->psd_start_base;
-				stop_p = psd_scan->psd_stop_point +
-					 psd_scan->psd_start_base + 1;
-
-				i = start_p;
-				point_index = 0;
-
-				while (i < stop_p) {
-					if (i >= points1)
-						psd_report =
-							halbtc8821c2ant_psd_getdata(
-							btcoexist, i - points1);
-					else
-						psd_report =
-							halbtc8821c2ant_psd_getdata(
-								btcoexist, i);
-
-					if (psd_report == 0)
-						tmp = 0;
-					else
-						/* tmp =  20*log10((double)psd_report); */
-						/* 20*log2(x)/log2(10), log2Base return theresult of the psd_report*100 */
-						tmp = 6 * halbtc8821c2ant_psd_log2base(
-							btcoexist, psd_report);
-
-					n = i - psd_scan->psd_start_base;
-					psd_scan->psd_report[n] =  tmp;
-
-					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-						"Point=%d, psd_dB_data = %d\n",
-						    i, psd_scan->psd_report[n]);
-					BTC_TRACE(trace_buf);
-
-					i++;
-
-				}
-
-				halbtc8821c2ant_psd_maxholddata(btcoexist, j);
-
-				psd_scan->psd_gen_count = j;
-
-				/*Accumulate Max PSD value in this loop if the value > threshold */
-				if (psd_scan->psd_loop_max_value[j - 1] >=
-				    4000) {
-					psd_sum = psd_sum +
-						psd_scan->psd_loop_max_value[j -
-								       1];
-					avg_cnt++;
-				}
-
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					    "Loop=%d, Max_dB_data = %d\n",
-					    j, psd_scan->psd_loop_max_value[j
-							    - 1]);
-				BTC_TRACE(trace_buf);
-
-			}
-
-			if (loopcnt == BT_8821C_2ANT_ANTDET_PSD_SWWEEPCOUNT) {
-
-				/* search the Max Value between each-freq-point-max-hold value of all sweep*/
-				for (i = 1;
-				     i <= BT_8821C_2ANT_ANTDET_PSD_SWWEEPCOUNT;
-				     i++) {
-
-					if (i == 1) {
-						i_max = i;
-						val_max = psd_scan->psd_loop_max_value[i
-								       - 1];
-						val_max2 =
-							psd_scan->psd_loop_max_value[i
-								     - 1];
-					} else if (
-						psd_scan->psd_loop_max_value[i -
-							     1] > val_max) {
-						val_max2 = val_max;
-						i_max = i;
-						val_max = psd_scan->psd_loop_max_value[i
-								       - 1];
-					} else if (
-						psd_scan->psd_loop_max_value[i -
-							     1] > val_max2)
-						val_max2 =
-							psd_scan->psd_loop_max_value[i
-								     - 1];
-
-					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-						"i = %d, val_hold= %d, val_max = %d, val_max2 = %d\n",
-						i, psd_scan->psd_loop_max_value[i
-								    - 1],
-						    val_max, val_max2);
-
-					BTC_TRACE(trace_buf);
-				}
-
-				psd_scan->psd_max_value_point = i_max;
-				psd_scan->psd_max_value = val_max;
-				psd_scan->psd_max_value2 = val_max2;
-
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					    "val_max = %d, val_max2 = %d\n",
-					    psd_scan->psd_max_value,
-					    psd_scan->psd_max_value2);
-				BTC_TRACE(trace_buf);
-			}
-
-			if (avg_cnt != 0) {
-				psd_scan->psd_avg_value = (psd_sum / avg_cnt);
-				if ((psd_sum % avg_cnt) >= (avg_cnt / 2))
-					psd_scan->psd_avg_value++;
-			} else
-				psd_scan->psd_avg_value = 0;
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "AvgLoop=%d, Avg_dB_data = %d\n",
-				    avg_cnt, psd_scan->psd_avg_value);
-			BTC_TRACE(trace_buf);
-
-			flag = 100;
-			break;
-		case 99:	/* error */
-
-			outloop = true;
-			break;
-		case 100: /* recovery */
 
-			/* set 3-wire on */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x88c);
-			val &= 0xffcfffff;
-			btcoexist->btc_write_4byte(btcoexist, 0x88c, val);
-
-			/* CCK on */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x800);
-			val |= 0x01000000;
-			btcoexist->btc_write_4byte(btcoexist, 0x800, val);
-
-			/* Tx-pause off */
-			btcoexist->btc_write_1byte(btcoexist, 0x522, 0x0);
-
-			/* PSD off */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x808);
-			val &= 0xffbfffff;
-			btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-			/* restore RF Rx filter corner */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1d,
-						  0xfffff, u32tmp1);
-
-			/* Exit debug mode */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xde,
-						  0x2, 0x0);
-
-			/* restore WiFi original channel */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x18,
-						  0x3ff, wifi_original_channel);
-
-			outloop = true;
-			break;
-
-		}
-
-	} while (!outloop);
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "xxxxxxxxxxxxxxxx PSD Sweep Stop!!\n");
-	BTC_TRACE(trace_buf);
-	return is_sweep_ok;
-
-}
-
-#pragma optimize("", off)
-boolean halbtc8821c2ant_psd_antenna_detection(IN struct btc_coexist
-		*btcoexist)
-{
-	u32	i = 0;
-	u32	wlpsd_cent_freq = 2484, wlpsd_span = 2;
-	s32	wlpsd_offset = -4;
-	u32 bt_tx_time, bt_le_channel;
-	u8	bt_le_ch[13] = {3, 6, 8, 11, 13, 16, 18, 21, 23, 26, 28, 31, 33};
-
-	u8	h2c_parameter[3] = {0}, u8tmpa, u8tmpb;
-
-	u8	state = 0;
-	boolean		outloop = false, bt_resp = false, ant_det_finish = false;
-	u32		freq, freq1, freq2, psd_rep1, psd_rep2, delta_freq_per_point,
-			u32tmp, u32tmp0, u32tmp1, u32tmp2 ;
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-
-	memset(psd_scan->ant_det_peak_val, 0, 16 * sizeof(u8));
-	memset(psd_scan->ant_det_peak_freq, 0, 16 * sizeof(u8));
-
-	psd_scan->ant_det_bt_tx_time =
-		BT_8821C_2ANT_ANTDET_BTTXTIME;	   /* 0.42ms*50 = 20ms (0.42ms = 1 PSD sweep) */
-	psd_scan->ant_det_bt_le_channel = BT_8821C_2ANT_ANTDET_BTTXCHANNEL;
-
-	bt_tx_time = psd_scan->ant_det_bt_tx_time;
-	bt_le_channel = psd_scan->ant_det_bt_le_channel;
-
-	if (board_info->tfbga_package) /* for TFBGA */
-		psd_scan->ant_det_thres_offset = 5;
-	else
-		psd_scan->ant_det_thres_offset = 0;
-
-	do {
-		switch (state) {
-		case 0:
-			if (bt_le_channel == 39)
-				wlpsd_cent_freq = 2484;
-			else {
-				for (i = 1; i <= 13; i++) {
-					if (bt_le_ch[i - 1] ==
-					    bt_le_channel) {
-						wlpsd_cent_freq = 2412
-								  + (i - 1) * 5;
-						break;
-					}
-				}
-
-				if (i == 14) {
-
-					BTC_SPRINTF(trace_buf,
-						    BT_TMP_BUF_SIZE,
-						"xxxxxxxxxxxxxxxx AntennaDetect(), Abort!!, Invalid LE channel = %d\n ",
-						    bt_le_channel);
-					BTC_TRACE(trace_buf);
-					outloop = true;
-					break;
-				}
-			}
-#if 0
-			wlpsd_sweep_count = bt_tx_time * 238 /
-					    100; /* bt_tx_time/0.42								 */
-			wlpsd_sweep_count = wlpsd_sweep_count / 5;
-
-			if (wlpsd_sweep_count % 5 != 0)
-				wlpsd_sweep_count = (wlpsd_sweep_count /
-						     5 + 1) * 5;
-#endif
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), BT_LETxTime=%d,  BT_LECh = %d\n",
-				    bt_tx_time, bt_le_channel);
-			BTC_TRACE(trace_buf);
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), wlpsd_cent_freq=%d,  wlpsd_offset = %d, wlpsd_span = %d, wlpsd_sweep_count = %d\n",
-				    wlpsd_cent_freq,
-				    wlpsd_offset,
-				    wlpsd_span,
-				    BT_8821C_2ANT_ANTDET_PSD_SWWEEPCOUNT);
-			BTC_TRACE(trace_buf);
-
-			state = 1;
-			break;
-		case 1: /* stop coex DM & set antenna path */
-			/* Stop Coex DM */
-			btcoexist->stop_coex_dm = true;
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Stop Coex DM!!\n");
-			BTC_TRACE(trace_buf);
-
-			/* Set TDMA off,				 */
-			halbtc8821c2ant_ps_tdma(btcoexist, FORCE_EXEC,
-						false, 0);
-
-			/* Set coex table */
-			halbtc8821c2ant_coex_table_with_type(btcoexist,
-							     FORCE_EXEC, 0);
-
-			if (board_info->btdm_ant_pos ==
-			    BTC_ANTENNA_AT_MAIN_PORT) {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Main Port\n");
-				BTC_TRACE(trace_buf);
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Aux Port\n");
-				BTC_TRACE(trace_buf);
-			}
-
-			/* Set Antenna path, switch WiFi to un-certain antenna port */
-			/* Set Antenna Path,  both GNT_WL/GNT_BT = 1, and control by SW */
-			halbtc8821c2ant_set_ant_path(btcoexist,
-					     BTC_ANT_PATH_AUTO, FORCE_EXEC,
-					     BT_8821C_2ANT_PHASE_ANTENNA_DET);
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to BT!!\n");
-			BTC_TRACE(trace_buf);
-
-			/* Set AFH mask on at WiFi channel 2472MHz +/- 10MHz */
-			h2c_parameter[0] = 0x1;
-			h2c_parameter[1] = 0xd;
-			h2c_parameter[2] = 0x14;
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d,  Mask=%d\n",
-				    h2c_parameter[1],
-				    h2c_parameter[2]);
-			BTC_TRACE(trace_buf);
-
-			btcoexist->btc_fill_h2c(btcoexist, 0x66, 3,
-						h2c_parameter);
-
-			u32tmp0 = btcoexist->btc_read_4byte(btcoexist, 0x70);
-			u32tmp1 = halbtc8821c2ant_ltecoex_indirect_read_reg(
-					  btcoexist, 0x38);
-			u32tmp2 = halbtc8821c2ant_ltecoex_indirect_read_reg(
-					  btcoexist, 0x54);
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], ********** 0x70 = 0x%x, 0x38= 0x%x, 0x54= 0x%x (Before Ant Det) **********\n",
-				    u32tmp0, u32tmp1, u32tmp2);
-			BTC_TRACE(trace_buf);
-
-			state = 2;
-			break;
-		case 2:	/* Pre-sweep background psd */
-			if (!halbtc8821c2ant_psd_sweep_point(btcoexist,
-				     wlpsd_cent_freq, wlpsd_offset, wlpsd_span,
-					     BT_8821C_2ANT_ANTDET_PSD_POINTS,
-				     BT_8821C_2ANT_ANTDET_PSD_AVGNUM, 3)) {
-				ant_det_finish = false;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				psd_scan->ant_det_result = 8;
-				state = 99;
-				break;
-			}
-
-			psd_scan->ant_det_pre_psdscan_peak_val =
-				psd_scan->psd_max_value;
-
-			if (psd_scan->ant_det_pre_psdscan_peak_val >
-			    (BT_8821C_2ANT_ANTDET_PSDTHRES_BACKGROUND
-			     + psd_scan->ant_det_thres_offset) * 100) {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Abort Antenna Detection!! becaus background = %d > thres (%d)\n",
-					psd_scan->ant_det_pre_psdscan_peak_val /
-					    100,
-					BT_8821C_2ANT_ANTDET_PSDTHRES_BACKGROUND
-					    + psd_scan->ant_det_thres_offset);
-				BTC_TRACE(trace_buf);
-				ant_det_finish = false;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				psd_scan->ant_det_result = 5;
-				state = 99;
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Start Antenna Detection!! becaus background = %d <= thres (%d)\n",
-					psd_scan->ant_det_pre_psdscan_peak_val /
-					    100,
-					BT_8821C_2ANT_ANTDET_PSDTHRES_BACKGROUND
-					    + psd_scan->ant_det_thres_offset);
-				BTC_TRACE(trace_buf);
-				state = 3;
-			}
-			break;
-		case 3:
-			bt_resp = btcoexist->btc_set_bt_ant_detection(
-					  btcoexist, (u8)(bt_tx_time & 0xff),
-					  (u8)(bt_le_channel & 0xff));
-
-			/* Sync WL Rx PSD with BT Tx time because H2C->Mailbox delay */
-			delay_ms(20);
-
-			if (!halbtc8821c2ant_psd_sweep_point(btcoexist,
-					     wlpsd_cent_freq, wlpsd_offset,
-							     wlpsd_span,
-					     BT_8821C_2ANT_ANTDET_PSD_POINTS,
-					     BT_8821C_2ANT_ANTDET_PSD_AVGNUM,
-				     BT_8821C_2ANT_ANTDET_PSD_SWWEEPCOUNT)) {
-				ant_det_finish = false;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				psd_scan->ant_det_result = 8;
-				state = 99;
-				break;
-			}
-
-#if 1
-			psd_scan->ant_det_psd_scan_peak_val =
-				psd_scan->psd_max_value;
-#endif
-#if 0
-			psd_scan->ant_det_psd_scan_peak_val =
-				((psd_scan->psd_max_value - psd_scan->psd_avg_value) <
-				 800) ?
-				psd_scan->psd_max_value : ((
-						psd_scan->psd_max_value -
-					psd_scan->psd_max_value2 <= 300) ?
-						   psd_scan->psd_avg_value :
-						   psd_scan->psd_max_value2);
-#endif
-			psd_scan->ant_det_psd_scan_peak_freq =
-				psd_scan->psd_max_value_point;
-			state = 4;
-			break;
-		case 4:
-
-			if (psd_scan->psd_point == 0)
-				delta_freq_per_point = 0;
-			else
-				delta_freq_per_point =
-					psd_scan->psd_band_width /
-					psd_scan->psd_point;
-
-			psd_rep1 = psd_scan->ant_det_psd_scan_peak_val / 100;
-			psd_rep2 = psd_scan->ant_det_psd_scan_peak_val -
-				   psd_rep1 *
-				   100;
-
-			freq = ((psd_scan->real_cent_freq - 20) *
-				1000000 + psd_scan->psd_max_value_point
-				* delta_freq_per_point);
-			freq1 = freq / 1000000;
-			freq2 = freq / 1000 - freq1 * 1000;
-
-			if (freq2 < 100) {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.0%d MHz",
-					    freq1, freq2);
-				BTC_TRACE(trace_buf);
-				CL_SPRINTF(psd_scan->ant_det_peak_freq,
-					   BT_8821C_2ANT_ANTDET_BUF_LEN,
-					   "%d.0%d", freq1, freq2);
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.%d MHz",
-					    freq1, freq2);
-				BTC_TRACE(trace_buf);
-				CL_SPRINTF(psd_scan->ant_det_peak_freq,
-					   BT_8821C_2ANT_ANTDET_BUF_LEN,
-					   "%d.%d", freq1, freq2);
-			}
-
-			if (psd_rep2 < 10) {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					    ", Value = %d.0%d dB\n",
-					    psd_rep1, psd_rep2);
-				BTC_TRACE(trace_buf);
-				CL_SPRINTF(psd_scan->ant_det_peak_val,
-					   BT_8821C_2ANT_ANTDET_BUF_LEN,
-					   "%d.0%d", psd_rep1, psd_rep2);
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					    ", Value = %d.%d dB\n",
-					    psd_rep1, psd_rep2);
-				BTC_TRACE(trace_buf);
-				CL_SPRINTF(psd_scan->ant_det_peak_val,
-					   BT_8821C_2ANT_ANTDET_BUF_LEN,
-					   "%d.%d", psd_rep1, psd_rep2);
-			}
-
-			psd_scan->ant_det_is_btreply_available = true;
-
-			if (bt_resp == false) {
-				psd_scan->ant_det_is_btreply_available =
-					false;
-				psd_scan->ant_det_result = 0;
-				ant_det_finish = false;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), BT Response = Fail\n ");
-				BTC_TRACE(trace_buf);
-			} else if (psd_scan->ant_det_psd_scan_peak_val >
-				(BT_8821C_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION)
-				   * 100) {
-				psd_scan->ant_det_result = 1;
-				ant_det_finish = true;
-				board_info->btdm_ant_num_by_ant_det = 2;
-				coex_sta->isolation_btween_wb = (u8)(85 -
-					psd_scan->ant_det_psd_scan_peak_val /
-							     100) & 0xff;
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Bad-Isolation!!\n");
-				BTC_TRACE(trace_buf);
-			} else if (psd_scan->ant_det_psd_scan_peak_val >
-				(BT_8821C_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
-				    + psd_scan->ant_det_thres_offset) * 100) {
-				psd_scan->ant_det_result = 2;
-				ant_det_finish = true;
-				board_info->btdm_ant_num_by_ant_det = 2;
-				coex_sta->isolation_btween_wb = (u8)(85 -
-					psd_scan->ant_det_psd_scan_peak_val /
-							     100) & 0xff;
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Good-Isolation!!\n");
-				BTC_TRACE(trace_buf);
-			} else if (psd_scan->ant_det_psd_scan_peak_val >
-				   (BT_8821C_2ANT_ANTDET_PSDTHRES_1ANT) *
-				   100) {
-				psd_scan->ant_det_result = 3;
-				ant_det_finish = true;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				coex_sta->isolation_btween_wb = (u8)(85 -
-					psd_scan->ant_det_psd_scan_peak_val /
-							     100) & 0xff;
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant!!\n");
-				BTC_TRACE(trace_buf);
-			} else {
-				psd_scan->ant_det_result = 4;
-				ant_det_finish = false;
-				board_info->btdm_ant_num_by_ant_det = 1;
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant, un-certainity!!\n");
-				BTC_TRACE(trace_buf);
-			}
-
-			state = 99;
-			break;
-		case 99:  /* restore setup */
-
-			/* Set AFH mask off at WiFi channel 2472MHz +/- 10MHz */
-			h2c_parameter[0] = 0x0;
-			h2c_parameter[1] = 0x0;
-			h2c_parameter[2] = 0x0;
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d,  Mask=%d\n",
-				    h2c_parameter[1], h2c_parameter[2]);
-			BTC_TRACE(trace_buf);
-
-			btcoexist->btc_fill_h2c(btcoexist, 0x66, 3,
-						h2c_parameter);
-
-			/* Set Antenna Path, GNT_WL/GNT_BT control by PTA */
-			/* Set Antenna path, switch WiFi to certain antenna port */
-			halbtc8821c2ant_set_ant_path(btcoexist,
-					     BTC_ANT_PATH_AUTO, FORCE_EXEC,
-					     BT_8821C_2ANT_PHASE_2G_RUNTIME);
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to PTA\n!!");
-			BTC_TRACE(trace_buf);
-
-			btcoexist->stop_coex_dm = false;
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Resume Coex DM\n!!");
-			BTC_TRACE(trace_buf);
-
-			outloop = true;
-			break;
-		}
-
-	} while (!outloop);
-
-	return ant_det_finish;
-
-}
-
-#pragma optimize("", off)
-boolean halbtc8821c2ant_psd_antenna_detection_check(IN struct btc_coexist
-		*btcoexist)
-{
-	static u32 ant_det_count = 0, ant_det_fail_count = 0;
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-
-	boolean scan, roam, ant_det_finish = false;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
-
-	ant_det_count++;
-
-	psd_scan->ant_det_try_count = ant_det_count;
-
-	if (scan || roam) {
-		ant_det_finish = false;
-		psd_scan->ant_det_result = 6;
-	} else if (coex_sta->bt_disabled) {
-		ant_det_finish = false;
-		psd_scan->ant_det_result = 11;
-	} else if (coex_sta->num_of_profile >= 1) {
-		ant_det_finish = false;
-		psd_scan->ant_det_result = 7;
-	} else if (
-		!psd_scan->ant_det_is_ant_det_available) { /* Antenna initial setup is not ready */
-		ant_det_finish = false;
-		psd_scan->ant_det_result = 9;
-	} else if (coex_sta->c2h_bt_inquiry_page) {
-		ant_det_finish = false;
-		psd_scan->ant_det_result = 10;
-	} else {
-
-		ant_det_finish = halbtc8821c2ant_psd_antenna_detection(
-					 btcoexist);
-
-		delay_ms(psd_scan->ant_det_bt_tx_time);
-	}
-
-
-	if (!ant_det_finish)
-		ant_det_fail_count++;
-
-	psd_scan->ant_det_fail_count = ant_det_fail_count;
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		"xxxxxxxxxxxxxxxx AntennaDetect(), result = %d, fail_count = %d, finish = %s\n",
-		    psd_scan->ant_det_result,
-		    psd_scan->ant_det_fail_count,
-		    ant_det_finish == true ? "Yes" : "No");
-	BTC_TRACE(trace_buf);
-
-	return ant_det_finish;
-
-}
-#endif
 
 /* ************************************************************
  * work around function start with wa_halbtc8821c2ant_
@@ -5640,7 +4662,8 @@ void ex_halbtc8821c2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		if (board_info->btdm_ant_det_finish) {
 
 			if (psd_scan->ant_det_result != 12)
-				CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
+				CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+					   "\r\n %-35s = %s",
 					   "Ant Det PSD Value",
 					   psd_scan->ant_det_peak_val);
 			else
@@ -5667,8 +4690,9 @@ void ex_halbtc8821c2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		   glcoex_ver_btdesired_8821c_2ant,
 		   bt_coex_ver,
 		   (bt_coex_ver == 0xff ? "Unknown" :
-		    (bt_coex_ver >= glcoex_ver_btdesired_8821c_2ant ?
-		     "Match" : "Mis-Match")));
+		    (coex_sta->bt_disabled ? "BT-disable" :
+		     (bt_coex_ver >= glcoex_ver_btdesired_8821c_2ant ?
+		      "Match" : "Mis-Match"))));
 	CL_PRINTF(cli_buf);
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
@@ -5726,7 +4750,7 @@ void ex_halbtc8821c2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 			   "\r\n %-35s = %s%s%s%s%s",
 			   "Profiles",
 			   ((bt_link_info->a2dp_exist) ? "A2DP," : ""),
-			   ((bt_link_info->sco_exist) ?  "SCO," : ""),
+			   ((bt_link_info->sco_exist) ?  "HFP," : ""),
 			   ((bt_link_info->hid_exist) ?
 			    ((coex_sta->hid_busy_num >= 2) ? "HID(4/18)," :
 			     "HID(2/18),") : ""),
@@ -5758,13 +4782,28 @@ void ex_halbtc8821c2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		CL_PRINTF(cli_buf);
 	}
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ 0x%x",
-		   "Role/IgnWlanAct/Feature",
-		   ((bt_link_info->slave_role) ? "Slave" : "Master"),
-		   ((coex_dm->cur_ignore_wlan_act) ? "Yes" : "No"),
-		   coex_sta->bt_coex_supported_feature);
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %s/ 0x%x",
+				"Role/RoleSwCnt/IgnWlact/Feature",
+				((bt_link_info->slave_role) ? "Slave" : "Master"),
+				coex_sta->cnt_RoleSwitch,
+				((coex_dm->cur_ignore_wlan_act) ? "Yes" : "No"),
+				coex_sta->bt_coex_supported_feature);
 	CL_PRINTF(cli_buf);
 
+	if ((coex_sta->bt_ble_scan_type & 0x7) != 0x0) {
+			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+				"\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
+				"BLEScan Type/TV/Init/Ble",
+				coex_sta->bt_ble_scan_type,
+				(coex_sta->bt_ble_scan_type & 0x1 ?
+				coex_sta->bt_ble_scan_para[0] : 0x0),
+				(coex_sta->bt_ble_scan_type & 0x2 ?
+				coex_sta->bt_ble_scan_para[1] : 0x0),
+				(coex_sta->bt_ble_scan_type & 0x4 ?
+				coex_sta->bt_ble_scan_para[2] : 0x0));
+			CL_PRINTF(cli_buf);
+	}
+
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d",
 		   "ReInit/ReLink/IgnWlact/Page/NameReq",
 		   coex_sta->cnt_ReInit,
@@ -5789,6 +4828,24 @@ void ex_halbtc8821c2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 			   coex_sta->bt_reg_vendor_ac & 0x3, u16tmp[0]);
 	CL_PRINTF(cli_buf);
 
+	if (coex_sta->num_of_profile > 0) {
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+			"\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
+			"AFH MAP",
+			coex_sta->bt_afh_map[0],
+			coex_sta->bt_afh_map[1],
+			coex_sta->bt_afh_map[2],
+			coex_sta->bt_afh_map[3],
+			coex_sta->bt_afh_map[4],
+			coex_sta->bt_afh_map[5],
+			coex_sta->bt_afh_map[6],
+			coex_sta->bt_afh_map[7],
+			coex_sta->bt_afh_map[8],
+			coex_sta->bt_afh_map[9]
+			   );
+		CL_PRINTF(cli_buf);
+	}
+
 	for (i = 0; i < BT_INFO_SRC_8821C_2ANT_MAX; i++) {
 		if (coex_sta->bt_info_c2h_cnt[i]) {
 			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
@@ -5894,16 +4951,7 @@ void ex_halbtc8821c2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
 		   "============[Hw setting]============");
 	CL_PRINTF(cli_buf);
-	/*
-		u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
-		u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
-		u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
-		u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
-			   "0x430/0x434/0x42a/0x456",
-			   u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
-		CL_PRINTF(cli_buf);
-	*/
+
 	u32tmp[0] = halbtc8821c2ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
 	u32tmp[1] = halbtc8821c2ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
 	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x73);
@@ -5915,7 +4963,8 @@ void ex_halbtc8821c2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_PRINTF(cli_buf);
 
 	if (lte_coex_on) {
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+			   "\r\n %-35s = %d/ %d/ %d/ %d",
 			   "LTE 3Wire/OPMode/UART/UARTMode",
 			   (int)((u32tmp[0] & BIT(6)) >> 6),
 			   (int)((u32tmp[0] & (BIT(5) | BIT(4))) >> 4),
@@ -5925,17 +4974,19 @@ void ex_halbtc8821c2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 
 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
 			   "LTE_Busy/UART_Busy",
-			(int)((u32tmp[1] & BIT(1)) >> 1), (int)(u32tmp[1] & BIT(0)));
+			   (int)((u32tmp[1] & BIT(1)) >> 1),
+			   (int)(u32tmp[1] & BIT(0)));
 		CL_PRINTF(cli_buf);
 	}
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n %-35s = %s (BB:%s)/ %s (BB:%s)/ %s",
+		   "\r\n %-35s = %s (BB:%s)/ %s (BB:%s)/ %s %d",
 		   "GNT_WL_Ctrl/GNT_BT_Ctrl/Dbg",
 		   ((u32tmp[0] & BIT(12)) ? "SW" : "HW"),
 		   ((u32tmp[0] & BIT(8)) ?  "SW" : "HW"),
 		   ((u32tmp[0] & BIT(14)) ? "SW" : "HW"),
 		   ((u32tmp[0] & BIT(10)) ?  "SW" : "HW"),
-		   ((u8tmp[0] & BIT(3)) ? "On" : "Off"));
+		   ((u8tmp[0] & BIT(3)) ? "On" : "Off"),
+		   coex_sta->gnt_error_cnt);
 	CL_PRINTF(cli_buf);
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
@@ -5963,7 +5014,7 @@ void ex_halbtc8821c2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
 		   "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
-		   "0x4c[24:23]/0x64[0]/x4c6[4]/0x40[5]",
+		   "4c[24:23]/64[0]/4c6[4]/40[5]",
 		   (u32tmp[0] & (BIT(24) | BIT(23))) >> 23 , u8tmp[2] & 0x1 ,
 		   (int)((u8tmp[0] & BIT(4)) >> 4),
 		   (int)((u8tmp[1] & BIT(5)) >> 5));
@@ -6009,13 +5060,26 @@ void ex_halbtc8821c2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_PRINTF(cli_buf);
 #endif
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s/ %d",
+		   "WlHiPri/ Locking/ Locked/ Noisy",
+		   (coex_sta->wifi_is_high_pri_task ? "Yes" : "No"),
+		   (coex_sta->cck_lock ? "Yes" : "No"),
+		   (coex_sta->cck_ever_lock ? "Yes" : "No"),
+		   coex_sta->wl_noisy_level);
+	CL_PRINTF(cli_buf);
+
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s",
 		   "0x770(Hi-pri rx/tx)",
-		   coex_sta->high_priority_rx, coex_sta->high_priority_tx);
+		   coex_sta->high_priority_rx, coex_sta->high_priority_tx,
+		   (coex_sta->is_hiPri_rx_overhead ? "(scan overhead!!)" :
+		    ""));
 	CL_PRINTF(cli_buf);
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
+
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s",
 		   "0x774(Lo-pri rx/tx)",
-		   coex_sta->low_priority_rx, coex_sta->low_priority_tx);
+		   coex_sta->low_priority_rx, coex_sta->low_priority_tx,
+		   (bt_link_info->slave_role ? "(Slave!!)" : (
+		   coex_sta->is_tdma_btautoslot_hang ? "(auto-slot hang!!)" : "")));
 	CL_PRINTF(cli_buf);
 
 	btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
@@ -6035,7 +5099,11 @@ void ex_halbtc8821c2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
 		coex_sta->under_lps = false;
 
 		halbtc8821c2ant_post_state_to_bt(btcoexist,
-				 BT_8821C_2ANT_SCOREBOARD_ACTIVE, false);
+				BT_8821C_2ANT_SCOREBOARD_ACTIVE |
+				BT_8821C_2ANT_SCOREBOARD_ONOFF |
+				BT_8821C_2ANT_SCOREBOARD_SCAN |
+				BT_8821C_2ANT_SCOREBOARD_UNDERTEST,
+				false);
 
 		halbtc8821c2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
 					     FORCE_EXEC,
@@ -6047,9 +5115,14 @@ void ex_halbtc8821c2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
 			    "[BTCoex], IPS LEAVE notify\n");
 		BTC_TRACE(trace_buf);
 		coex_sta->under_ips = false;
-
+#if 0
 		halbtc8821c2ant_post_state_to_bt(btcoexist,
 					 BT_8821C_2ANT_SCOREBOARD_ACTIVE, true);
+
+		halbtc8821c2ant_post_state_to_bt(btcoexist,
+				 BT_8821C_2ANT_SCOREBOARD_ONOFF, true);
+#endif
+
 		halbtc8821c2ant_init_hw_config(btcoexist, false);
 		halbtc8821c2ant_init_coex_dm(btcoexist);
 		halbtc8821c2ant_query_bt_info(btcoexist);
@@ -6102,8 +5175,6 @@ void ex_halbtc8821c2ant_scan_notify(IN struct btc_coexist *btcoexist,
 		    "[BTCoex], SCAN notify()\n");
 	BTC_TRACE(trace_buf);
 
-	halbtc8821c2ant_post_state_to_bt(btcoexist,
-					 BT_8821C_2ANT_SCOREBOARD_ACTIVE, true);
 
 	if (btcoexist->manual_control ||
 	    btcoexist->stop_coex_dm)
@@ -6120,6 +5191,12 @@ void ex_halbtc8821c2ant_scan_notify(IN struct btc_coexist *btcoexist,
 		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G,
 				   &wifi_under_5g);
 
+		halbtc8821c2ant_post_state_to_bt(btcoexist,
+					BT_8821C_2ANT_SCOREBOARD_ACTIVE |
+					BT_8821C_2ANT_SCOREBOARD_SCAN |
+					BT_8821C_2ANT_SCOREBOARD_ONOFF,
+					true);
+
 		if (wifi_under_5g) {
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], ********** SCAN START notify (5g)\n");
@@ -6132,7 +5209,7 @@ void ex_halbtc8821c2ant_scan_notify(IN struct btc_coexist *btcoexist,
 		coex_sta->wifi_is_high_pri_task = true;
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], ********** SCAN START notify (2g)\n");
+			    "[BTCoex], ********** SCAN START notify (2g)\n");
 		BTC_TRACE(trace_buf);
 
 		halbtc8821c2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
@@ -6156,9 +5233,10 @@ void ex_halbtc8821c2ant_scan_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 
 		halbtc8821c2ant_post_state_to_bt(btcoexist,
-					 BT_8821C_2ANT_SCOREBOARD_SCAN, true);
-		halbtc8821c2ant_post_state_to_bt(btcoexist,
-					 BT_8821C_2ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8821C_2ANT_SCOREBOARD_ACTIVE |
+					 BT_8821C_2ANT_SCOREBOARD_SCAN |
+					 BT_8821C_2ANT_SCOREBOARD_ONOFF,
+					 true);
 
 		halbtc8821c2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
 					     FORCE_EXEC,
@@ -6178,9 +5256,6 @@ void ex_halbtc8821c2ant_scan_notify(IN struct btc_coexist *btcoexist,
 			    coex_sta->scan_ap_num);
 		BTC_TRACE(trace_buf);
 
-		halbtc8821c2ant_post_state_to_bt(btcoexist,
-					 BT_8821C_2ANT_SCOREBOARD_SCAN, false);
-
 		halbtc8821c2ant_run_coexist_mechanism(btcoexist);
 	}
 
@@ -6231,13 +5306,16 @@ void ex_halbtc8821c2ant_switchband_notify(IN struct btc_coexist *btcoexist,
 void ex_halbtc8821c2ant_connect_notify(IN struct btc_coexist *btcoexist,
 				       IN u8 type)
 {
-
-	halbtc8821c2ant_post_state_to_bt(btcoexist,
-					 BT_8821C_2ANT_SCOREBOARD_ACTIVE, true);
 	if (btcoexist->manual_control ||
 	    btcoexist->stop_coex_dm)
 		return;
 
+	halbtc8821c2ant_post_state_to_bt(btcoexist,
+					 BT_8821C_2ANT_SCOREBOARD_ACTIVE |
+					 BT_8821C_2ANT_SCOREBOARD_SCAN |
+					 BT_8821C_2ANT_SCOREBOARD_ONOFF,
+					 true);
+
 	if ((BTC_ASSOCIATE_5G_START == type) ||
 	    (BTC_ASSOCIATE_5G_FINISH == type)) {
 
@@ -6267,7 +5345,7 @@ void ex_halbtc8821c2ant_connect_notify(IN struct btc_coexist *btcoexist,
 					     FORCE_EXEC,
 					     BT_8821C_2ANT_PHASE_2G_RUNTIME);
 
-		halbtc8821c2ant_action_wifi_link_process(btcoexist);
+		halbtc8821c2ant_run_coexist_mechanism(btcoexist);
 
 		/* To keep TDMA case during connect process,
 		to avoid changed by Btinfo and runcoexmechanism */
@@ -6311,7 +5389,9 @@ void ex_halbtc8821c2ant_media_status_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 
 		halbtc8821c2ant_post_state_to_bt(btcoexist,
-					 BT_8821C_2ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8821C_2ANT_SCOREBOARD_ACTIVE |
+					 BT_8821C_2ANT_SCOREBOARD_ONOFF,
+					 true);
 
 		if (wifi_under_5g) {
 
@@ -6412,8 +5492,11 @@ void ex_halbtc8821c2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
 		coex_sta->specific_pkt_period_cnt = 2;
 	}
 
-	if (coex_sta->wifi_is_high_pri_task)
+	if (coex_sta->wifi_is_high_pri_task) {
+		halbtc8821c2ant_post_state_to_bt(btcoexist,
+					 BT_8821C_2ANT_SCOREBOARD_SCAN, true);
 		halbtc8821c2ant_run_coexist_mechanism(btcoexist);
+	}
 
 }
 
@@ -6422,13 +5505,10 @@ void ex_halbtc8821c2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 {
 	u8			i, rsp_source = 0;
 	boolean			wifi_connected = false;
+	boolean	wifi_scan = false, wifi_link = false, wifi_roam = false,
+			wifi_busy = false;
+	static boolean is_scoreboard_scan = false;
 
-	if (psd_scan->is_AntDet_running == true) {
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], bt_info_notify return for AntDet is running\n");
-		BTC_TRACE(trace_buf);
-		return;
-	}
 
 	rsp_source = tmp_buf[0] & 0xf;
 	if (rsp_source >= BT_INFO_SRC_8821C_2ANT_MAX)
@@ -6512,18 +5592,57 @@ void ex_halbtc8821c2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 		if (coex_sta->bt_info_ext & BIT(1))
 			coex_sta->cnt_ReInit++;
 
+
 		if (coex_sta->bt_info_ext & BIT(2)) {
 			coex_sta->cnt_setupLink++;
 			coex_sta->is_setupLink = true;
-		} else
+
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], Re-Link start in BT info!!\n");
+			BTC_TRACE(trace_buf);
+		} else {
 			coex_sta->is_setupLink = false;
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], Re-Link stop in BT info!!\n");
+			BTC_TRACE(trace_buf);
+		}
+
 
 		if (coex_sta->bt_info_ext & BIT(3))
 			coex_sta->cnt_IgnWlanAct++;
 
-		if (coex_sta->bt_create_connection)
+		if (coex_sta->bt_info_ext & BIT(6))
+			coex_sta->cnt_RoleSwitch++;
+
+		if (coex_sta->bt_create_connection) {
 			coex_sta->cnt_Page++;
 
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY,
+					   &wifi_busy);
+
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link);
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam);
+
+			if ((wifi_link) || (wifi_roam) || (wifi_scan) ||
+			    (coex_sta->wifi_is_high_pri_task) || (wifi_busy)) {
+
+				is_scoreboard_scan = true;
+				halbtc8821c2ant_post_state_to_bt(btcoexist,
+					 BT_8821C_2ANT_SCOREBOARD_SCAN, true);
+
+			} else
+				halbtc8821c2ant_post_state_to_bt(btcoexist,
+					 BT_8821C_2ANT_SCOREBOARD_SCAN, false);
+
+		} else {
+				if (is_scoreboard_scan) {
+					halbtc8821c2ant_post_state_to_bt(btcoexist,
+						 BT_8821C_2ANT_SCOREBOARD_SCAN, false);
+					is_scoreboard_scan = false;
+				}
+		}
+
 		/* Here we need to resend some wifi info to BT */
 		/* because bt is reset and loss of the info. */
 
@@ -6550,36 +5669,51 @@ void ex_halbtc8821c2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 
 			/*  If Ignore_WLanAct && not SetUp_Link */
 			if ((coex_sta->bt_info_ext & BIT(3)) &&
-			    (!(coex_sta->bt_info_ext & BIT(2)))) {
+				(!(coex_sta->bt_info_ext & BIT(2))) &&
+				(!(coex_sta->bt_info_ext & BIT(6)))) {
 
 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 					"[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n");
 				BTC_TRACE(trace_buf);
 				halbtc8821c2ant_ignore_wlan_act(btcoexist,
 							FORCE_EXEC, false);
+			} else {
+				if (coex_sta->bt_info_ext & BIT(2)) {
+					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					"[BTCoex], BT ignore Wlan active because Re-link!!\n");
+					BTC_TRACE(trace_buf);
+				} else if (coex_sta->bt_info_ext & BIT(6)) {
+					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					"[BTCoex], BT ignore Wlan active because Role-Switch!!\n");
+					BTC_TRACE(trace_buf);
+				}
 			}
 		}
 
 	}
 
-
-	halbtc8821c2ant_update_bt_link_info(btcoexist);
-
-	if (btcoexist->manual_control) {
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], BtInfoNotify(), No run_coexist_mechanism for Manual CTRL\n");
-		BTC_TRACE(trace_buf);
-		return;
-	}
-
-	if (btcoexist->stop_coex_dm) {
+	if ((coex_sta->bt_info_ext & BIT(5))) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], BtInfoNotify(),  No run_coexist_mechanism for Stop Coex DM\n");
+			"[BTCoex], BT ext info bit4 check, query BLE Scan type!!\n");
 		BTC_TRACE(trace_buf);
-		return;
+		coex_sta->bt_ble_scan_type = btcoexist->btc_get_ble_scan_type_from_bt(
+						     btcoexist);
+
+		if ((coex_sta->bt_ble_scan_type & 0x1) == 0x1)
+			coex_sta->bt_ble_scan_para[0]  =
+				btcoexist->btc_get_ble_scan_para_from_bt(btcoexist,
+						0x1);
+		if ((coex_sta->bt_ble_scan_type & 0x2) == 0x2)
+			coex_sta->bt_ble_scan_para[1]  =
+				btcoexist->btc_get_ble_scan_para_from_bt(btcoexist,
+						0x2);
+		if ((coex_sta->bt_ble_scan_type & 0x4) == 0x4)
+			coex_sta->bt_ble_scan_para[2]  =
+				btcoexist->btc_get_ble_scan_para_from_bt(btcoexist,
+						0x4);
 	}
 
-	coex_sta->c2h_bt_info_req_sent = false;
+	halbtc8821c2ant_update_bt_link_info(btcoexist);
 
 	halbtc8821c2ant_run_coexist_mechanism(btcoexist);
 }
@@ -6595,13 +5729,13 @@ void ex_halbtc8821c2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 			    "[BTCoex], RF is turned ON!!\n");
 		BTC_TRACE(trace_buf);
 
-		coex_sta->wl_rf_off_on_event = true;
 		btcoexist->stop_coex_dm = false;
-
+#if 0
 		halbtc8821c2ant_post_state_to_bt(btcoexist,
 					 BT_8821C_2ANT_SCOREBOARD_ACTIVE, true);
 		halbtc8821c2ant_post_state_to_bt(btcoexist,
 					 BT_8821C_2ANT_SCOREBOARD_ONOFF, true);
+#endif
 	} else if (BTC_RF_OFF == type) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], RF is turned OFF!!\n");
@@ -6614,11 +5748,13 @@ void ex_halbtc8821c2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 		halbtc8821c2ant_action_coex_all_off(btcoexist);
 
 		halbtc8821c2ant_post_state_to_bt(btcoexist,
-				 BT_8821C_2ANT_SCOREBOARD_ACTIVE, false);
-		halbtc8821c2ant_post_state_to_bt(btcoexist,
-					 BT_8821C_2ANT_SCOREBOARD_ONOFF, false);
+				BT_8821C_2ANT_SCOREBOARD_ACTIVE |
+				BT_8821C_2ANT_SCOREBOARD_ONOFF |
+				BT_8821C_2ANT_SCOREBOARD_SCAN |
+				BT_8821C_2ANT_SCOREBOARD_UNDERTEST,
+				false);
+
 		btcoexist->stop_coex_dm = true;
-		coex_sta->wl_rf_off_on_event = false;
 
 	}
 }
@@ -6634,9 +5770,11 @@ void ex_halbtc8821c2ant_halt_notify(IN struct btc_coexist *btcoexist)
 	ex_halbtc8821c2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
 
 	halbtc8821c2ant_post_state_to_bt(btcoexist,
-				 BT_8821C_2ANT_SCOREBOARD_ACTIVE, false);
-	halbtc8821c2ant_post_state_to_bt(btcoexist,
-					 BT_8821C_2ANT_SCOREBOARD_ONOFF, false);
+				BT_8821C_2ANT_SCOREBOARD_ACTIVE |
+				BT_8821C_2ANT_SCOREBOARD_ONOFF |
+				BT_8821C_2ANT_SCOREBOARD_SCAN |
+				BT_8821C_2ANT_SCOREBOARD_UNDERTEST,
+				false);
 }
 
 void ex_halbtc8821c2ant_pnp_notify(IN struct btc_coexist *btcoexist,
@@ -6662,10 +5800,11 @@ void ex_halbtc8821c2ant_pnp_notify(IN struct btc_coexist *btcoexist,
 		coex_sta->under_lps = false;
 
 		halbtc8821c2ant_post_state_to_bt(btcoexist,
-				 BT_8821C_2ANT_SCOREBOARD_ACTIVE, false);
-		halbtc8821c2ant_post_state_to_bt(btcoexist,
-					 BT_8821C_2ANT_SCOREBOARD_ONOFF, false);
-
+				BT_8821C_2ANT_SCOREBOARD_ACTIVE |
+				BT_8821C_2ANT_SCOREBOARD_ONOFF |
+				BT_8821C_2ANT_SCOREBOARD_SCAN |
+				BT_8821C_2ANT_SCOREBOARD_UNDERTEST,
+				false);
 
 		if (BTC_WIFI_PNP_SLEEP_KEEP_ANT == pnp_state) {
 
@@ -6679,7 +5818,8 @@ void ex_halbtc8821c2ant_pnp_notify(IN struct btc_coexist *btcoexist,
 					     BT_8821C_2ANT_PHASE_2G_RUNTIME);
 		} else {
 
-			halbtc8821c2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
+			halbtc8821c2ant_set_ant_path(btcoexist,
+						     BTC_ANT_PATH_AUTO,
 						     FORCE_EXEC,
 					     BT_8821C_2ANT_PHASE_WLAN_OFF);
 		}
@@ -6687,17 +5827,22 @@ void ex_halbtc8821c2ant_pnp_notify(IN struct btc_coexist *btcoexist,
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], Pnp notify to WAKE UP\n");
 		BTC_TRACE(trace_buf);
-
+#if 0
 		halbtc8821c2ant_post_state_to_bt(btcoexist,
 					 BT_8821C_2ANT_SCOREBOARD_ACTIVE, true);
 		halbtc8821c2ant_post_state_to_bt(btcoexist,
 					 BT_8821C_2ANT_SCOREBOARD_ONOFF, true);
+#endif
 	}
 }
 
 void ex_halbtc8821c2ant_periodical(IN struct btc_coexist *btcoexist)
 {
 	struct  btc_board_info	*board_info = &btcoexist->board_info;
+	boolean wifi_busy = false;
+	u32 bt_patch_ver;
+	static u8 cnt = 0;
+	boolean bt_relink_finish = false;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], ************* Periodical *************\n");
@@ -6711,6 +5856,37 @@ void ex_halbtc8821c2ant_periodical(IN struct btc_coexist *btcoexist)
 	halbtc8821c2ant_monitor_wifi_ctr(btcoexist);
 	halbtc8821c2ant_monitor_bt_enable_disable(btcoexist);
 
+#if 0
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+
+	/* halbtc8821c2ant_read_score_board(btcoexist, &bt_scoreboard_val); */
+
+	if (wifi_busy) {
+		halbtc8821c2ant_post_state_to_bt(btcoexist,
+				BT_8821C_2ANT_SCOREBOARD_UNDERTEST, true);
+		/*
+		halbtc8821c2ant_post_state_to_bt(btcoexist,
+				BT_8821C_2ANT_SCOREBOARD_WLBUSY, true);
+
+		if (bt_scoreboard_val & BIT(6))
+			halbtc8821c2ant_query_bt_info(btcoexist); */
+	} else {
+		halbtc8821c2ant_post_state_to_bt(btcoexist,
+			BT_8821C_2ANT_SCOREBOARD_UNDERTEST, false);
+		/*
+		halbtc8821c2ant_post_state_to_bt(btcoexist,
+			BT_8821C_2ANT_SCOREBOARD_WLBUSY,
+				false);  */
+	}
+#endif
+
+	if (coex_sta->bt_relink_downcount != 0) {
+		coex_sta->bt_relink_downcount--;
+
+		if (coex_sta->bt_relink_downcount == 0)
+			bt_relink_finish = true;
+	}
+
 	/* for 4-way, DHCP, EAPOL packet */
 	if (coex_sta->specific_pkt_period_cnt > 0) {
 
@@ -6721,7 +5897,7 @@ void ex_halbtc8821c2ant_periodical(IN struct btc_coexist *btcoexist)
 			coex_sta->wifi_is_high_pri_task = false;
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], ***************** Hi-Pri Task = %s*****************\n",
+			    "[BTCoex], ***************** Hi-Pri Task = %s\n",
 			    (coex_sta->wifi_is_high_pri_task ? "Yes" :
 			     "No"));
 		BTC_TRACE(trace_buf);
@@ -6729,45 +5905,41 @@ void ex_halbtc8821c2ant_periodical(IN struct btc_coexist *btcoexist)
 	}
 
 	if (!coex_sta->bt_disabled) {
-		if (coex_sta->bt_coex_supported_feature == 0)
-			coex_sta->bt_coex_supported_feature =
-				btcoexist->btc_get_bt_coex_supported_feature(
-					btcoexist);
-
-		if ((coex_sta->bt_coex_supported_version == 0) ||
-			 (coex_sta->bt_coex_supported_version == 0xffff))
-			coex_sta->bt_coex_supported_version =
-				btcoexist->btc_get_bt_coex_supported_version(
-					btcoexist);
-
-		/*coex_sta->bt_ble_scan_type = btcoexist->btc_get_ble_scan_type_from_bt(btcoexist);*/
-
-		if (coex_sta->bt_reg_vendor_ac == 0xffff)
-			coex_sta->bt_reg_vendor_ac = (u16)(
-				     btcoexist->btc_get_bt_reg(btcoexist, 3,
-							     0xac) & 0xffff);
-
-		if (coex_sta->bt_reg_vendor_ae == 0xffff)
-			coex_sta->bt_reg_vendor_ae = (u16)(
-				     btcoexist->btc_get_bt_reg(btcoexist, 3,
-							     0xae) & 0xffff);
-
-#if BT_8821C_2ANT_ANTDET_ENABLE
-
-		if (board_info->btdm_ant_det_finish) {
-			if ((psd_scan->ant_det_result == 12) &&
-			    (psd_scan->ant_det_psd_scan_peak_val == 0)
-			    && (!psd_scan->is_AntDet_running))
-				psd_scan->ant_det_psd_scan_peak_val =
-					btcoexist->btc_get_ant_det_val_from_bt(
-						btcoexist) * 100;
+			if (coex_sta->bt_coex_supported_feature == 0)
+				btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_FEATURE,
+							&coex_sta->bt_coex_supported_feature);
+
+			if ((coex_sta->bt_coex_supported_version == 0) ||
+				(coex_sta->bt_coex_supported_version == 0xffff))
+				btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_VERSION,
+							&coex_sta->bt_coex_supported_version);
+
+			if (coex_sta->bt_reg_vendor_ac == 0xffff)
+				coex_sta->bt_reg_vendor_ac = (u16)(
+						btcoexist->btc_get_bt_reg(btcoexist, 3,
+						0xac) & 0xffff);
+
+			if (coex_sta->bt_reg_vendor_ae == 0xffff)
+				coex_sta->bt_reg_vendor_ae = (u16)(
+						btcoexist->btc_get_bt_reg(btcoexist, 3,
+						0xae) & 0xffff);
+
+			btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER,
+							&bt_patch_ver);
+			btcoexist->bt_info.bt_get_fw_ver = bt_patch_ver;
+
+			if (coex_sta->num_of_profile > 0) {
+			cnt++;
+
+			if (cnt >= 3) {
+				btcoexist->btc_get_bt_afh_map_from_bt(btcoexist, 0,
+					&coex_sta->bt_afh_map[0]);
+				cnt = 0;
+			}
 		}
-
-#endif
 	}
 
-
-	if (halbtc8821c2ant_is_wifibt_status_changed(btcoexist))
+	if (halbtc8821c2ant_is_wifibt_status_changed(btcoexist) || (bt_relink_finish))
 		halbtc8821c2ant_run_coexist_mechanism(btcoexist);
 }
 
@@ -6776,157 +5948,13 @@ void ex_halbtc8821c2ant_periodical(IN struct btc_coexist *btcoexist)
 void ex_halbtc8821c2ant_antenna_detection(IN struct btc_coexist *btcoexist,
 		IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds)
 {
-#if 0
-	static u32 ant_det_count = 0, ant_det_fail_count = 0;
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-	u16		u16tmp;
-	u8			AntDetval = 0;
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "xxxxxxxxxxxxxxxx Ext Call AntennaDetect()!!\n");
-	BTC_TRACE(trace_buf);
-
-#if BT_8821C_2ANT_ANTDET_ENABLE
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "xxxxxxxxxxxxxxxx Call AntennaDetect()!!\n");
-	BTC_TRACE(trace_buf);
-
-	if (seconds == 0) {
-		psd_scan->ant_det_try_count	= 0;
-		psd_scan->ant_det_fail_count	= 0;
-		ant_det_count = 0;
-		ant_det_fail_count = 0;
-		board_info->btdm_ant_det_finish = false;
-		board_info->btdm_ant_num_by_ant_det = 1;
-		return;
-	}
-
-	if (!board_info->btdm_ant_det_finish) {
-		psd_scan->ant_det_inteval_count =
-			psd_scan->ant_det_inteval_count + 2;
-
-		if (psd_scan->ant_det_inteval_count >=
-		    BT_8821C_2ANT_ANTDET_RETRY_INTERVAL) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is up, Try Detect!!\n");
-			BTC_TRACE(trace_buf);
-
-			psd_scan->is_AntDet_running = true;
-
-			halbtc8821c2ant_read_score_board(btcoexist,	&u16tmp);
-
-			if (u16tmp & BIT(
-				2)) { /* Antenna detection is already done before last WL power on   */
-				board_info->btdm_ant_det_finish = true;
-				psd_scan->ant_det_try_count = 1;
-				psd_scan->ant_det_fail_count = 0;
-				board_info->btdm_ant_num_by_ant_det = (u16tmp &
-							       BIT(3)) ? 1 : 2;
-				psd_scan->ant_det_result = 12;
-
-				psd_scan->ant_det_psd_scan_peak_val =
-					btcoexist->btc_get_ant_det_val_from_bt(
-						btcoexist) * 100;
-
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Result from BT (%d-Ant)\n",
-					board_info->btdm_ant_num_by_ant_det);
-				BTC_TRACE(trace_buf);
-			} else
-				board_info->btdm_ant_det_finish =
-					halbtc8821c2ant_psd_antenna_detection_check(
-						btcoexist);
-
-			btcoexist->bdontenterLPS = false;
-
-			if (board_info->btdm_ant_det_finish) {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Success!!\n");
-				BTC_TRACE(trace_buf);
-
-				/*for 8821c, btc_set_bt_trx_mask is just used to
-					notify BT stop le tx and Ant Det Result , not set BT RF TRx Mask  */
-				if (psd_scan->ant_det_result != 12) {
-
-					AntDetval = (u8)((
-						psd_scan->ant_det_psd_scan_peak_val
-								 / 100) & 0x7f);
-
-					AntDetval =
-						(board_info->btdm_ant_num_by_ant_det
-						 == 1) ? (AntDetval | 0x80) :
-						AntDetval;
-
-					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-						"xxxxxx AntennaDetect(), Ant Count = %d, PSD Val = %d\n",
-						    ((AntDetval &
-						      0x80) ? 1
-						     : 2), AntDetval
-						    & 0x7f);
-					BTC_TRACE(trace_buf);
-
-					if (btcoexist->btc_set_bt_trx_mask(
-						    btcoexist, AntDetval))
-						BTC_SPRINTF(trace_buf,
-							    BT_TMP_BUF_SIZE,
-							"xxxxxx AntennaDetect(), Notify BT stop le tx by set_bt_trx_mask ok!\n");
-					else
-						BTC_SPRINTF(trace_buf,
-							    BT_TMP_BUF_SIZE,
-							"xxxxxx AntennaDetect(), Notify BT stop le tx by set_bt_trx_mask fail!\n");
-
-					BTC_TRACE(trace_buf);
-				}
-
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Fail!!\n");
-				BTC_TRACE(trace_buf);
-			}
-
-			psd_scan->ant_det_inteval_count = 0;
-			psd_scan->is_AntDet_running = false;
-
-			/* stimulate coex running */
-			halbtc8821c2ant_run_coexist_mechanism(
-				btcoexist);
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Stimulate Coex running\n!!");
-			BTC_TRACE(trace_buf);
-		} else {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is not up! (%d)\n",
-				    psd_scan->ant_det_inteval_count);
-			BTC_TRACE(trace_buf);
-
-			if (psd_scan->ant_det_inteval_count == 8)
-				btcoexist->bdontenterLPS = true;
-			else
-				btcoexist->bdontenterLPS = false;
-		}
-
-	}
-#endif
-#endif
 
 }
 
 
 void ex_halbtc8821c2ant_display_ant_detection(IN struct btc_coexist *btcoexist)
 {
-#if 0
-#if BT_8821C_2ANT_ANTDET_ENABLE
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
 
-	if (psd_scan->ant_det_try_count != 0)	{
-		halbtc8821c2ant_psd_show_antenna_detect_result(btcoexist);
-
-		if (board_info->btdm_ant_det_finish)
-			halbtc8821c2ant_psd_showdata(btcoexist);
-	}
-#endif
-#endif
 }
 
 
@@ -6934,3 +5962,4 @@ void ex_halbtc8821c2ant_display_ant_detection(IN struct btc_coexist *btcoexist)
 
 #endif	/*  #if (RTL8821C_SUPPORT == 1) */
 
+
diff --git a/rtl8822BU/hal/btc/halbtc8821c2ant.h b/rtl8822BU/hal/btc/halbtc8821c2ant.h
index f89b1fa..ae42803 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8821c2ant.h
+++ b/rtl8822BU/hal/btc/halbtc8821c2ant.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 
 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
 
@@ -176,7 +190,9 @@ enum bt_8821c_2ant_phase {
 enum bt_8821c_2ant_Scoreboard {
 	BT_8821C_2ANT_SCOREBOARD_ACTIVE								= BIT(0),
 	BT_8821C_2ANT_SCOREBOARD_ONOFF								= BIT(1),
-	BT_8821C_2ANT_SCOREBOARD_SCAN								= BIT(2)
+	BT_8821C_2ANT_SCOREBOARD_SCAN								= BIT(2),
+	BT_8821C_2ANT_SCOREBOARD_UNDERTEST							= BIT(3),
+	BT_8821C_2ANT_SCOREBOARD_WLBUSY								= BIT(6)
 };
 
 
@@ -268,21 +284,21 @@ struct coex_sta_8821c_2ant {
 	u32					high_priority_rx;
 	u32					low_priority_tx;
 	u32					low_priority_rx;
+	boolean             is_hiPri_rx_overhead;
 	u8					bt_rssi;
-	boolean					bt_tx_rx_mask;
 	u8					pre_bt_rssi_state;
 	u8					pre_wifi_rssi_state[4];
-	boolean					c2h_bt_info_req_sent;
 	u8					bt_info_c2h[BT_INFO_SRC_8821C_2ANT_MAX][10];
 	u32					bt_info_c2h_cnt[BT_INFO_SRC_8821C_2ANT_MAX];
 	boolean				bt_whck_test;
 	boolean					c2h_bt_inquiry_page;
 	boolean					c2h_bt_remote_name_req;
-	u8					bt_retry_cnt;
+
 	u8					bt_info_ext;
 	u8					bt_info_ext2;
 	u32					pop_event_cnt;
 	u8					scan_ap_num;
+	u8					bt_retry_cnt;
 
 	u32					crc_ok_cck;
 	u32					crc_ok_11g;
@@ -317,7 +333,6 @@ struct coex_sta_8821c_2ant {
 
 	u8					num_of_profile;
 	boolean				acl_busy;
-	boolean				wl_rf_off_on_event;
 	boolean				bt_create_connection;
 	boolean				wifi_is_high_pri_task;
 	u32					specific_pkt_period_cnt;
@@ -325,7 +340,7 @@ struct coex_sta_8821c_2ant {
 	u32					bt_coex_supported_version;
 
 	u8					bt_ble_scan_type;
-	u8					bt_ble_scan_para[3];
+	u32					bt_ble_scan_para[3];
 
 	boolean				run_time_state;
 	boolean				freeze_coexrun_by_btinfo;
@@ -343,11 +358,19 @@ struct coex_sta_8821c_2ant {
 	u32					cnt_ReInit;
 	u32					cnt_IgnWlanAct;
 	u32					cnt_Page;
+	u32					cnt_RoleSwitch;
 
 	u16					bt_reg_vendor_ac;
 	u16					bt_reg_vendor_ae;
 
 	boolean				is_setupLink;
+	u8				    wl_noisy_level;
+	u32                 gnt_error_cnt;
+
+	u8					bt_afh_map[10];
+	u8					bt_relink_downcount;
+	boolean				is_tdma_btautoslot;
+	boolean				is_tdma_btautoslot_hang;
 };
 
 
@@ -366,6 +389,8 @@ struct rfe_type_8821c_2ant {
 	u8			ext_band_switch_type;			/* 0:DPDT, 1:SPDT */
 	u8			ext_band_switch_ctrl_polarity;
 
+	boolean		ant_at_main_port;
+
 	boolean		wlg_Locate_at_btg;				/*  If true:  WLG at BTG, If false: WLG at WLAG */
 
 	boolean		ext_ant_switch_diversity;		/* If diversity on */
@@ -476,3 +501,4 @@ void ex_halbtc8821c2ant_display_ant_detection(IN struct btc_coexist *btcoexist);
 
 #endif
 
+
diff --git a/rtl8822BU/hal/btc/halbtc8821cwifionly.c b/rtl8822BU/hal/btc/halbtc8821cwifionly.c
new file mode 100644
index 0000000..ffa32ed
--- a/dev/null
+++ b/rtl8822BU/hal/btc/halbtc8821cwifionly.c
@@ -0,0 +1,200 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#include "mp_precomp.h"
+
+static struct	rfe_type_8821c_wifi_only	gl_rfe_type_8821c_1ant;
+static struct	rfe_type_8821c_wifi_only	*rfe_type = &gl_rfe_type_8821c_1ant;
+
+
+
+VOID hal8821c_wifi_only_switch_antenna(
+	IN struct wifi_only_cfg *pwifionlycfg,
+	IN u1Byte is_5g
+	)
+{
+	boolean switch_polatiry_inverse = false;
+	u8	regval_0xcb7 = 0;
+	u8	pos_type, ctrl_type;
+
+	if (!rfe_type->ext_ant_switch_exist)
+		return;
+
+	/* swap control polarity if use different switch control polarity*/
+	/*	Normal switch polarity for DPDT, 0xcb4[29:28] = 2b'01 => BTG to Main, WLG to Aux,  0xcb4[29:28] = 2b'10 => BTG to Aux, WLG to Main */
+	/*	Normal switch polarity for SPDT, 0xcb4[29:28] = 2b'01 => Ant to BTG,  0xcb4[29:28] = 2b'10 => Ant to WLG */
+	if (rfe_type->ext_ant_switch_ctrl_polarity)
+		switch_polatiry_inverse =  !switch_polatiry_inverse;
+
+	/* swap control polarity if 1-Ant at Aux */
+	if (rfe_type->ant_at_main_port == false)
+		switch_polatiry_inverse =  !switch_polatiry_inverse;
+
+	if (is_5g)
+		pos_type = BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLA;
+	else
+		pos_type = BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLG;
+
+	switch (pos_type) {
+	default:
+	case BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLA:
+
+		break;
+	case BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLG:
+		if (!rfe_type->wlg_Locate_at_btg)
+			switch_polatiry_inverse =  !switch_polatiry_inverse;
+		break;
+	}
+
+	if (pwifionlycfg->haldata_info.ant_div_cfg)
+		ctrl_type = BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_ANTDIV;
+	else
+		ctrl_type = BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_BBSW;
+
+
+	switch (ctrl_type) {
+	default:
+	case BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_BBSW:
+		halwifionly_phy_set_bb_reg(pwifionlycfg, 0x4c,  0x01800000, 0x2);
+
+		/* BB SW, DPDT use RFE_ctrl8 and RFE_ctrl9 as control pin */
+		halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcb4, 0x000000ff,	0x77);
+
+		regval_0xcb7 = (switch_polatiry_inverse == false ? 0x1 : 0x2);
+
+		/* 0xcb4[29:28] = 2b'01 for no switch_polatiry_inverse, DPDT_SEL_N =1, DPDT_SEL_P =0 */
+		halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcb4, 0x30000000,	regval_0xcb7);
+		break;
+
+	case BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_ANTDIV:
+		halwifionly_phy_set_bb_reg(pwifionlycfg, 0x4c,  0x01800000, 0x2);
+
+		/* BB SW, DPDT use RFE_ctrl8 and RFE_ctrl9 as control pin */
+		halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcb4, 0x000000ff,	0x88);
+
+		/* no regval_0xcb7 setup required, because	antenna switch control value by antenna diversity */
+
+		break;
+
+	}
+
+}
+
+
+VOID halbtc8821c_wifi_only_set_rfe_type(
+	IN struct wifi_only_cfg *pwifionlycfg
+	)
+{
+
+	/* the following setup should be got from Efuse in the future */
+	rfe_type->rfe_module_type = (pwifionlycfg->haldata_info.rfe_type) & 0x1f;
+
+	rfe_type->ext_ant_switch_ctrl_polarity = 0;
+
+	switch (rfe_type->rfe_module_type) {
+	case 0:
+	default:
+		rfe_type->ext_ant_switch_exist = true;
+		rfe_type->ext_ant_switch_type =
+			BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_DPDT;          /*2-Ant, DPDT, WLG*/
+		rfe_type->wlg_Locate_at_btg = false;
+		rfe_type->ant_at_main_port = true;
+		break;
+	case 1:
+		rfe_type->ext_ant_switch_exist = true;
+		rfe_type->ext_ant_switch_type =
+			BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_SPDT;          /*1-Ant, Main, DPDT or SPDT, WLG */
+		rfe_type->wlg_Locate_at_btg = false;
+		rfe_type->ant_at_main_port = true;
+		break;
+	case 2:
+		rfe_type->ext_ant_switch_exist = true;
+		rfe_type->ext_ant_switch_type =
+			BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_SPDT;            /*1-Ant, Main, DPDT or SPDT, BTG */
+		rfe_type->wlg_Locate_at_btg = true;
+		rfe_type->ant_at_main_port = true;
+		break;
+	case 3:
+		rfe_type->ext_ant_switch_exist = true;
+		rfe_type->ext_ant_switch_type =
+			BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_DPDT;          /*1-Ant, Aux, DPDT, WLG */
+		rfe_type->wlg_Locate_at_btg = false;
+		rfe_type->ant_at_main_port = false;
+		break;
+	case 4:
+		rfe_type->ext_ant_switch_exist = true;
+		rfe_type->ext_ant_switch_type =
+			BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_DPDT;          /*1-Ant, Aux, DPDT, BTG */
+		rfe_type->wlg_Locate_at_btg = true;
+		rfe_type->ant_at_main_port = false;
+		break;
+	case 5:
+		rfe_type->ext_ant_switch_exist = false;					 /*2-Ant, no antenna switch, WLG*/
+		rfe_type->ext_ant_switch_type =
+			BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_NONE;
+		rfe_type->wlg_Locate_at_btg = false;
+		rfe_type->ant_at_main_port = true;
+		break;
+	case 6:
+		rfe_type->ext_ant_switch_exist = false;				 /*2-Ant, no antenna switch, WLG*/
+		rfe_type->ext_ant_switch_type =
+			BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_NONE;
+		rfe_type->wlg_Locate_at_btg = false;
+		rfe_type->ant_at_main_port = true;
+		break;
+	case 7:
+		rfe_type->ext_ant_switch_exist = true;				/*2-Ant, DPDT, BTG*/
+		rfe_type->ext_ant_switch_type =
+			BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_DPDT;
+		rfe_type->wlg_Locate_at_btg = true;
+		rfe_type->ant_at_main_port = true;
+		break;
+	}
+
+}
+
+
+VOID
+ex_hal8821c_wifi_only_hw_config(
+	IN struct wifi_only_cfg *pwifionlycfg
+	)
+{
+	halbtc8821c_wifi_only_set_rfe_type(pwifionlycfg);
+
+	/* set gnt_wl, gnt_bt control owner to WL*/
+	halwifionly_phy_set_bb_reg(pwifionlycfg, 0x70, 0x400000, 0x1);
+
+	/*gnt_wl=1 , gnt_bt=0*/
+	halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1704, 0xffffffff, 0x7700);
+	halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1700, 0xffffffff, 0xc00f0038);
+}
+
+VOID
+ex_hal8821c_wifi_only_scannotify(
+	IN struct wifi_only_cfg *pwifionlycfg,
+	IN u1Byte  is_5g
+	)
+{
+	hal8821c_wifi_only_switch_antenna(pwifionlycfg, is_5g);
+}
+
+VOID
+ex_hal8821c_wifi_only_switchbandnotify(
+	IN struct wifi_only_cfg *pwifionlycfg,
+	IN u1Byte  is_5g
+	)
+{
+	hal8821c_wifi_only_switch_antenna(pwifionlycfg, is_5g);
+}
+
diff --git a/rtl8822BU/hal/btc/halbtc8821cwifionly.h b/rtl8822BU/hal/btc/halbtc8821cwifionly.h
new file mode 100644
index 0000000..1949b59
--- a/dev/null
+++ b/rtl8822BU/hal/btc/halbtc8821cwifionly.h
@@ -0,0 +1,84 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef __INC_HAL8821CWIFIONLYHWCFG_H
+#define __INC_HAL8821CWIFIONLYHWCFG_H
+
+
+struct rfe_type_8821c_wifi_only {
+
+	u8			rfe_module_type;
+	boolean		ext_ant_switch_exist;
+	u8			ext_ant_switch_type;			/* 0:DPDT, 1:SPDT */
+	u8			ext_ant_switch_ctrl_polarity;		/*  iF 0: DPDT_P=0, DPDT_N=1 => BTG to Main, WL_A+G to Aux */
+
+	boolean		ant_at_main_port;
+
+	boolean		wlg_Locate_at_btg;				/*  If true:  WLG at BTG, If false: WLG at WLAG */
+
+	boolean		ext_ant_switch_diversity;		/* If diversity on */
+};
+
+enum bt_8821c_wifi_only_ext_ant_switch_type {
+	BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_DPDT		= 0x0,
+	BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_SPDT		= 0x1,
+	BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_NONE			= 0x2,
+	BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_MAX
+};
+
+enum bt_8821c_wifi_only_ext_ant_switch_ctrl_type {
+	BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_BBSW		= 0x0,
+	BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_PTA		= 0x1,
+	BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_ANTDIV	= 0x2,
+	BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_MAC		= 0x3,
+	BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_BT		= 0x4,
+	BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_MAX
+};
+
+enum bt_8821c_wifi_only_ext_ant_switch_pos_type {
+	BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_BT				= 0x0,
+	BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLG			= 0x1,
+	BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLA			= 0x2,
+	BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_NOCARE			= 0x3,
+	BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_MAX
+};
+
+
+VOID
+hal8821c_wifi_only_switch_antenna(
+	IN struct wifi_only_cfg *pwifionlycfg,
+	IN u1Byte  is_5g
+	);
+
+VOID
+halbtc8821c_wifi_only_set_rfe_type(
+	IN struct wifi_only_cfg *pwifionlycfg
+	);
+
+
+VOID
+ex_hal8821c_wifi_only_hw_config(
+	IN struct wifi_only_cfg *pwifionlycfg
+	);
+VOID
+ex_hal8821c_wifi_only_scannotify(
+	IN struct wifi_only_cfg *pwifionlycfg,
+	IN u1Byte  is_5g
+	);
+VOID
+ex_hal8821c_wifi_only_switchbandnotify(
+	IN struct wifi_only_cfg *pwifionlycfg,
+	IN u1Byte  is_5g
+	);
+#endif
diff --git a/rtl8822BU/hal/btc/halbtc8822b1ant.c b/rtl8822BU/hal/btc/halbtc8822b1ant.c
index b1dc018..7ec25e2 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8822b1ant.c
+++ b/rtl8822BU/hal/btc/halbtc8822b1ant.c
@@ -11,9 +11,11 @@
 /* ************************************************************
  * include files
  * ************************************************************ */
+/*only for rf4ce*/
 #include "mp_precomp.h"
 
 
+
 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
 
 #if (RTL8822B_SUPPORT == 1)
@@ -32,15 +34,15 @@ static struct	rfe_type_8822b_1ant		*rfe_type = &gl_rfe_type_8822b_1ant;
 
 
 
-const char *const glbt_info_src_8822b_1ant[] = {
+static const char *const glbt_info_src_8822b_1ant[] = {
 	"BT Info[wifi fw]",
 	"BT Info[bt rsp]",
 	"BT Info[bt auto report]",
 };
 
-u32	glcoex_ver_date_8822b_1ant = 20161024;
-u32	glcoex_ver_8822b_1ant = 0x33;
-u32	glcoex_ver_btdesired_8822b_1ant = 0x28;
+static u32	glcoex_ver_date_8822b_1ant = 20170518;
+static u32	glcoex_ver_8822b_1ant = 0x44;
+static u32	glcoex_ver_btdesired_8822b_1ant = 0x42;
 
 
 /* ************************************************************
@@ -49,7 +51,10 @@ u32	glcoex_ver_btdesired_8822b_1ant = 0x28;
  * ************************************************************
  * local function start with halbtc8822b1ant_
  * ************************************************************ */
-u8 halbtc8822b1ant_bt_rssi_state(u8 level_num, u8 rssi_thresh, u8 rssi_thresh1)
+#if 0
+static
+u8 halbtc8822b1ant_bt_rssi_state(IN struct btc_coexist *btcoexist,
+				 u8 level_num, u8 rssi_thresh, u8 rssi_thresh1)
 {
 	s32			bt_rssi = 0;
 	u8			bt_rssi_state = coex_sta->pre_bt_rssi_state;
@@ -110,7 +115,9 @@ u8 halbtc8822b1ant_bt_rssi_state(u8 level_num, u8 rssi_thresh, u8 rssi_thresh1)
 
 	return bt_rssi_state;
 }
+#endif
 
+static
 u8 halbtc8822b1ant_wifi_rssi_state(IN struct btc_coexist *btcoexist,
 	   IN u8 index, IN u8 level_num, IN u8 rssi_thresh, IN u8 rssi_thresh1)
 {
@@ -176,6 +183,7 @@ u8 halbtc8822b1ant_wifi_rssi_state(IN struct btc_coexist *btcoexist,
 	return wifi_rssi_state;
 }
 
+static
 void halbtc8822b1ant_update_ra_mask(IN struct btc_coexist *btcoexist,
 				    IN boolean force_exec, IN u32 dis_rate_mask)
 {
@@ -187,10 +195,11 @@ void halbtc8822b1ant_update_ra_mask(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_ra_mask = coex_dm->cur_ra_mask;
 }
 
+static
 void halbtc8822b1ant_auto_rate_fallback_retry(IN struct btc_coexist *btcoexist,
 		IN boolean force_exec, IN u8 type)
 {
-	boolean	wifi_under_b_mode = false;
+	boolean	wifi_under_b_mode = FALSE;
 
 	coex_dm->cur_arfr_type = type;
 
@@ -226,6 +235,7 @@ void halbtc8822b1ant_auto_rate_fallback_retry(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_arfr_type = coex_dm->cur_arfr_type;
 }
 
+static
 void halbtc8822b1ant_retry_limit(IN struct btc_coexist *btcoexist,
 				 IN boolean force_exec, IN u8 type)
 {
@@ -251,6 +261,7 @@ void halbtc8822b1ant_retry_limit(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type;
 }
 
+static
 void halbtc8822b1ant_ampdu_max_time(IN struct btc_coexist *btcoexist,
 				    IN boolean force_exec, IN u8 type)
 {
@@ -275,6 +286,7 @@ void halbtc8822b1ant_ampdu_max_time(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type;
 }
 
+static
 void halbtc8822b1ant_limited_tx(IN struct btc_coexist *btcoexist,
 		IN boolean force_exec, IN u8 ra_mask_type, IN u8 arfr_type,
 				IN u8 retry_limit_type, IN u8 ampdu_time_type)
@@ -303,12 +315,13 @@ void halbtc8822b1ant_limited_tx(IN struct btc_coexist *btcoexist,
 }
 
 /*
-rx agg size setting :
-1:      true / don't care / don't care
-max: false / false / don't care
-7:     false / true / 7
-*/
+ * rx agg size setting :
+ * 1:      TRUE / don't care / don't care
+ * max: FALSE / FALSE / don't care
+ * 7:     FALSE / TRUE / 7
+ */
 
+static
 void halbtc8822b1ant_limited_rx(IN struct btc_coexist *btcoexist,
 			IN boolean force_exec, IN boolean rej_ap_agg_pkt,
 			IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size)
@@ -325,7 +338,7 @@ void halbtc8822b1ant_limited_rx(IN struct btc_coexist *btcoexist,
 	/* decide BT control aggregation buf size or not */
 	btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
 			   &bt_ctrl_rx_agg_size);
-	/* aggregation buf size, only work when BT control Rx aggregation size. */
+	/* aggregation buf size, only work when BT control Rx aggregation size*/
 	btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
 	/* real update aggregation setting */
 	btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
@@ -333,27 +346,44 @@ void halbtc8822b1ant_limited_rx(IN struct btc_coexist *btcoexist,
 
 }
 
+static
 void halbtc8822b1ant_query_bt_info(IN struct btc_coexist *btcoexist)
 {
 	u8			h2c_parameter[1] = {0};
 
-	coex_sta->c2h_bt_info_req_sent = true;
+	if (coex_sta->bt_disabled) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], No query BT info because BT is disabled!\n");
+		BTC_TRACE(trace_buf);
+		return;
+	}
+
 
 	h2c_parameter[0] |= BIT(0);	/* trigger */
 
 	btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
+
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		    "[BTCoex], WL query BT info!!\n");
+	BTC_TRACE(trace_buf);
 }
 
+
+
+static
 void halbtc8822b1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 {
 	u32			reg_hp_txrx, reg_lp_txrx, u32tmp;
 	u32			reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
-	static u8		num_of_bt_counter_chk = 0, cnt_slave = 0;
+	static u8		num_of_bt_counter_chk = 0, cnt_slave = 0, cnt_autoslot_hang = 0;
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
+#if 0
 	/* to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS */
-	/* if (! (btcoexist->btc_read_1byte(btcoexist, 0x76e) & 0x8) ) */
+	if (!(btcoexist->btc_read_1byte(btcoexist, 0x76e) & 0x8))
+#endif
 
+#if 0
 	if (coex_sta->under_ips) {
 		/* coex_sta->high_priority_tx = 65535; */
 		/* coex_sta->high_priority_rx = 65535; */
@@ -361,6 +391,7 @@ void halbtc8822b1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 		/* coex_sta->low_priority_rx = 65535; */
 		/* return; */
 	}
+#endif
 
 	reg_hp_txrx = 0x770;
 	reg_lp_txrx = 0x774;
@@ -396,19 +427,47 @@ void halbtc8822b1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 	    (!coex_sta->c2h_bt_inquiry_page) &&
 	    (coex_sta->bt_link_exist))	{
 		if (cnt_slave >= 3) {
-			bt_link_info->slave_role = true;
+			bt_link_info->slave_role = TRUE;
 			cnt_slave = 3;
-		} else
+		} else {
 			cnt_slave++;
+		}
 	} else {
 		if (cnt_slave == 0)	{
-			bt_link_info->slave_role = false;
+			bt_link_info->slave_role = FALSE;
 			cnt_slave = 0;
-		} else
+		} else {
 			cnt_slave--;
+		}
 
 	}
 
+	if (coex_sta->is_tdma_btautoslot) {
+		if ((coex_sta->low_priority_tx >= 1300) &&
+		(coex_sta->low_priority_rx <= 150)) {
+			if (cnt_autoslot_hang >= 2) {
+				coex_sta->is_tdma_btautoslot_hang = TRUE;
+				cnt_autoslot_hang = 2;
+			} else {
+				cnt_autoslot_hang++;
+			}
+		} else {
+			if (cnt_autoslot_hang == 0)	{
+				coex_sta->is_tdma_btautoslot_hang = FALSE;
+				cnt_autoslot_hang = 0;
+			} else {
+				cnt_autoslot_hang--;
+			}
+		}
+	}
+
+	if (bt_link_info->hid_only) {
+		if (coex_sta->low_priority_rx > 50)
+			coex_sta->is_hid_low_pri_tx_overhead = true;
+		else
+			coex_sta->is_hid_low_pri_tx_overhead = false;
+	}
+
 	if ((coex_sta->high_priority_tx == 0) &&
 	    (coex_sta->high_priority_rx == 0) &&
 	    (coex_sta->low_priority_tx == 0) &&
@@ -421,98 +480,91 @@ void halbtc8822b1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 			num_of_bt_counter_chk = 0;
 		}
 	}
-#if 0
-	/* Add Hi-Pri Tx/Rx counter to avoid false detection */
-	if (((coex_sta->hid_exist) || (coex_sta->sco_exist)) &&
-	    (coex_sta->high_priority_tx + coex_sta->high_priority_rx
-	     >= 160)
-	    && (!coex_sta->c2h_bt_inquiry_page))
-		coex_sta->bt_hi_pri_link_exist = true;
-	else
-		coex_sta->bt_hi_pri_link_exist = false;
-
-	if ((coex_sta->acl_busy) &&
-	    (coex_sta->num_of_profile == 0)) {
-		if (coex_sta->low_priority_tx +
-		    coex_sta->low_priority_rx >= 160) {
-			coex_sta->pan_exist = true;
-			coex_sta->num_of_profile++;
-			coex_sta->wrong_profile_notification++;
-		}
-	}
-#endif
 
 }
 
 
+static
 void halbtc8822b1ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 {
-	s32 wifi_rssi = 0;
-	boolean wifi_busy = false, wifi_under_b_mode = false;
-	static u8 cck_lock_counter = 0;
-	u32 total_cnt;
+#if 1
+	s32	wifi_rssi = 0;
+	boolean wifi_busy = FALSE, wifi_under_b_mode = FALSE,
+		wifi_scan = FALSE;
+	static u8 cck_lock_counter = 0, wl_noisy_count0 = 0,
+		  wl_noisy_count1 = 3, wl_noisy_count2 = 0;
+	u32	total_cnt, cck_cnt;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 	btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE,
 			   &wifi_under_b_mode);
 
-	if (coex_sta->under_ips) {
-		coex_sta->crc_ok_cck = 0;
-		coex_sta->crc_ok_11g = 0;
-		coex_sta->crc_ok_11n = 0;
-		coex_sta->crc_ok_11n_agg = 0;
-
-		coex_sta->crc_err_cck = 0;
-		coex_sta->crc_err_11g = 0;
-		coex_sta->crc_err_11n = 0;
-		coex_sta->crc_err_11n_agg = 0;
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
+
+	coex_sta->crc_ok_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
+			       PHYDM_INFO_CRC32_OK_CCK);
+	coex_sta->crc_ok_11g = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
+			       PHYDM_INFO_CRC32_OK_LEGACY);
+	coex_sta->crc_ok_11n = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
+			       PHYDM_INFO_CRC32_OK_HT);
+	coex_sta->crc_ok_11n_vht = btcoexist->btc_phydm_query_PHY_counter(
+					   btcoexist, PHYDM_INFO_CRC32_OK_VHT);
+
+	coex_sta->crc_err_cck = btcoexist->btc_phydm_query_PHY_counter(
+					btcoexist, PHYDM_INFO_CRC32_ERROR_CCK);
+	coex_sta->crc_err_11g =  btcoexist->btc_phydm_query_PHY_counter(
+				 btcoexist, PHYDM_INFO_CRC32_ERROR_LEGACY);
+	coex_sta->crc_err_11n = btcoexist->btc_phydm_query_PHY_counter(
+					btcoexist, PHYDM_INFO_CRC32_ERROR_HT);
+	coex_sta->crc_err_11n_vht = btcoexist->btc_phydm_query_PHY_counter(
+				    btcoexist, PHYDM_INFO_CRC32_ERROR_VHT);
+
+	cck_cnt = coex_sta->crc_ok_cck + coex_sta->crc_err_cck;
+
+	if (cck_cnt > 250) {
+		if (wl_noisy_count2 < 3)
+			wl_noisy_count2++;
+
+		if (wl_noisy_count2 == 3) {
+			wl_noisy_count0 = 0;
+			wl_noisy_count1 = 0;
+		}
+
+	} else if (cck_cnt < 50) {
+		if (wl_noisy_count0 < 3)
+			wl_noisy_count0++;
+
+		if (wl_noisy_count0 == 3) {
+			wl_noisy_count1 = 0;
+			wl_noisy_count2 = 0;
+		}
+
 	} else {
-		coex_sta->crc_ok_cck	= btcoexist->btc_read_2byte(
-						  btcoexist,
-						  0xf04);
-		coex_sta->crc_ok_11g	= btcoexist->btc_read_2byte(
-						  btcoexist,
-						  0xf14);
-		coex_sta->crc_ok_11n	= btcoexist->btc_read_2byte(
-						  btcoexist,
-						  0xf10);
-		coex_sta->crc_ok_11n_agg = btcoexist->btc_read_2byte(
-						   btcoexist,
-						   0xf0c);
-
-		coex_sta->crc_err_cck	 = btcoexist->btc_read_2byte(
-			   btcoexist, 0xf00) +  btcoexist->btc_read_2byte(
-						   btcoexist, 0xf06);
-
-		coex_sta->crc_err_11g	 = btcoexist->btc_read_2byte(
-						   btcoexist,
-						   0xf16);
-		coex_sta->crc_err_11n	 = btcoexist->btc_read_2byte(
-						   btcoexist,
-						   0xf12);
-		coex_sta->crc_err_11n_agg = btcoexist->btc_read_2byte(
-						    btcoexist,
-						    0xf0e);
-	}
+		if (wl_noisy_count1 < 3)
+			wl_noisy_count1++;
 
+		if (wl_noisy_count1 == 3) {
+			wl_noisy_count0 = 0;
+			wl_noisy_count2 = 0;
+		}
+	}
 
-	/* reset counter */
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0xb58, 0x1, 0x1);
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0xb58, 0x1, 0x0);
+	if (wl_noisy_count2 == 3)
+		coex_sta->wl_noisy_level = 2;
+	else if (wl_noisy_count1 == 3)
+		coex_sta->wl_noisy_level = 1;
+	else
+		coex_sta->wl_noisy_level = 0;
 
 	if ((wifi_busy) && (wifi_rssi >= 30) && (!wifi_under_b_mode)) {
-		total_cnt = coex_sta->crc_ok_cck + coex_sta->crc_ok_11g
-			    +
-			    coex_sta->crc_ok_11n +
-			    coex_sta->crc_ok_11n_agg;
-
-		if ((coex_dm->bt_status ==
-		     BT_8822B_1ANT_BT_STATUS_ACL_BUSY) ||
-		    (coex_dm->bt_status ==
-		     BT_8822B_1ANT_BT_STATUS_ACL_SCO_BUSY) ||
-		    (coex_dm->bt_status ==
-		     BT_8822B_1ANT_BT_STATUS_SCO_BUSY)) {
+		total_cnt = coex_sta->crc_ok_cck + coex_sta->crc_ok_11g +
+			    coex_sta->crc_ok_11n + coex_sta->crc_ok_11n_vht;
+
+		if ((coex_dm->bt_status == BT_8822B_1ANT_BT_STATUS_ACL_BUSY) ||
+		    (coex_dm->bt_status == BT_8822B_1ANT_BT_STATUS_ACL_SCO_BUSY)
+		    ||
+		    (coex_dm->bt_status == BT_8822B_1ANT_BT_STATUS_SCO_BUSY)) {
 			if (coex_sta->crc_ok_cck > (total_cnt -
 						    coex_sta->crc_ok_cck)) {
 				if (cck_lock_counter < 3)
@@ -534,31 +586,36 @@ void halbtc8822b1ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 	if (!coex_sta->pre_ccklock) {
 
 		if (cck_lock_counter >= 3)
-			coex_sta->cck_lock = true;
+			coex_sta->cck_lock = TRUE;
 		else
-			coex_sta->cck_lock = false;
+			coex_sta->cck_lock = FALSE;
 	} else {
 		if (cck_lock_counter == 0)
-			coex_sta->cck_lock = false;
+			coex_sta->cck_lock = FALSE;
 		else
-			coex_sta->cck_lock = true;
+			coex_sta->cck_lock = TRUE;
 	}
 
 	if (coex_sta->cck_lock)
-		coex_sta->cck_ever_lock = true;
+		coex_sta->cck_ever_lock = TRUE;
 
 	coex_sta->pre_ccklock =  coex_sta->cck_lock;
 
-
+#endif
 }
 
 
+static
 boolean halbtc8822b1ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist)
 {
-	static boolean	pre_wifi_busy = false, pre_under_4way = false,
-			pre_bt_hs_on = false, pre_bt_off = false;
-	boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
-	boolean wifi_connected = false;
+	static boolean	pre_wifi_busy = FALSE, pre_under_4way = FALSE,
+			pre_bt_hs_on = FALSE, pre_rf4ce_enabled = FALSE, pre_bt_off = FALSE,
+			pre_bt_slave = FALSE, pre_hid_low_pri_tx_overhead = FALSE,
+			pre_wifi_under_lps = FALSE, pre_bt_setup_link = FALSE;
+	static u8 pre_hid_busy_num = 0, pre_wl_noisy_level = 0;
+	boolean wifi_busy = FALSE, under_4way = FALSE, bt_hs_on = FALSE, rf4ce_enabled = FALSE;
+	boolean wifi_connected = FALSE;
+	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
 			   &wifi_connected);
@@ -566,6 +623,7 @@ boolean halbtc8822b1ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist)
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
 			   &under_4way);
+
 	if (coex_sta->bt_disabled != pre_bt_off) {
 		pre_bt_off = coex_sta->bt_disabled;
 
@@ -580,31 +638,125 @@ boolean halbtc8822b1ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist)
 
 		coex_sta->bt_coex_supported_feature = 0;
 		coex_sta->bt_coex_supported_version = 0;
-		return true;
+		return TRUE;
+	}
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_RF4CE_CONNECTED, &rf4ce_enabled);
+
+	if (rf4ce_enabled != pre_rf4ce_enabled) {
+		pre_rf4ce_enabled = rf4ce_enabled;
+
+		if (rf4ce_enabled)
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], rf4ce is enabled !!\n");
+		else
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], rf4ce is disabled !!\n");
+
+		BTC_TRACE(trace_buf);
+
+
+		return TRUE;
 	}
 
 	if (wifi_connected) {
 		if (wifi_busy != pre_wifi_busy) {
 			pre_wifi_busy = wifi_busy;
-			return true;
+			return TRUE;
 		}
 		if (under_4way != pre_under_4way) {
 			pre_under_4way = under_4way;
-			return true;
+			return TRUE;
 		}
 		if (bt_hs_on != pre_bt_hs_on) {
 			pre_bt_hs_on = bt_hs_on;
-			return true;
+			return TRUE;
+		}
+		if (coex_sta->wl_noisy_level != pre_wl_noisy_level) {
+			pre_wl_noisy_level = coex_sta->wl_noisy_level;
+			return TRUE;
+		}
+		if (coex_sta->under_lps != pre_wifi_under_lps) {
+			pre_wifi_under_lps = coex_sta->under_lps;
+			if (coex_sta->under_lps)
+				return TRUE;
+		}
+	}
+
+	if (!coex_sta->bt_disabled) {
+		if (coex_sta->hid_busy_num != pre_hid_busy_num) {
+			pre_hid_busy_num = coex_sta->hid_busy_num;
+			return TRUE;
+		}
+
+		if (bt_link_info->slave_role != pre_bt_slave) {
+			pre_bt_slave = bt_link_info->slave_role;
+			return TRUE;
+		}
+
+		if (pre_hid_low_pri_tx_overhead != coex_sta->is_hid_low_pri_tx_overhead) {
+			pre_hid_low_pri_tx_overhead = coex_sta->is_hid_low_pri_tx_overhead;
+			return TRUE;
+		}
+
+		if (pre_bt_setup_link != coex_sta->is_setupLink) {
+			pre_bt_setup_link = coex_sta->is_setupLink;
+			return TRUE;
 		}
 	}
 
-	return false;
+	return FALSE;
 }
 
+
+
+static
 void halbtc8822b1ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 {
 	struct  btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
-	boolean				bt_hs_on = false;
+	boolean				bt_hs_on = FALSE;
+	boolean		bt_busy = FALSE;
+
+
+	coex_sta->num_of_profile = 0;
+
+	/* set link exist status */
+	if (!(coex_sta->bt_info & BT_INFO_8822B_1ANT_B_CONNECTION)) {
+		coex_sta->bt_link_exist = FALSE;
+		coex_sta->pan_exist = FALSE;
+		coex_sta->a2dp_exist = FALSE;
+		coex_sta->hid_exist = FALSE;
+		coex_sta->sco_exist = FALSE;
+	} else {	/* connection exists */
+		coex_sta->bt_link_exist = TRUE;
+		if (coex_sta->bt_info & BT_INFO_8822B_1ANT_B_FTP) {
+			coex_sta->pan_exist = TRUE;
+			coex_sta->num_of_profile++;
+		} else {
+			coex_sta->pan_exist = FALSE;
+		}
+
+		if (coex_sta->bt_info & BT_INFO_8822B_1ANT_B_A2DP) {
+			coex_sta->a2dp_exist = TRUE;
+			coex_sta->num_of_profile++;
+		} else {
+			coex_sta->a2dp_exist = FALSE;
+		}
+
+		if (coex_sta->bt_info & BT_INFO_8822B_1ANT_B_HID) {
+			coex_sta->hid_exist = TRUE;
+			coex_sta->num_of_profile++;
+		} else {
+			coex_sta->hid_exist = FALSE;
+		}
+
+		if (coex_sta->bt_info & BT_INFO_8822B_1ANT_B_SCO_ESCO) {
+			coex_sta->sco_exist = TRUE;
+			coex_sta->num_of_profile++;
+		} else {
+			coex_sta->sco_exist = FALSE;
+		}
+
+	}
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
 
@@ -613,13 +765,12 @@ void halbtc8822b1ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 	bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
 	bt_link_info->pan_exist = coex_sta->pan_exist;
 	bt_link_info->hid_exist = coex_sta->hid_exist;
-	bt_link_info->bt_hi_pri_link_exist = coex_sta->bt_hi_pri_link_exist;
 	bt_link_info->acl_busy = coex_sta->acl_busy;
 
 	/* work around for HS mode. */
 	if (bt_hs_on) {
-		bt_link_info->pan_exist = true;
-		bt_link_info->bt_link_exist = true;
+		bt_link_info->pan_exist = TRUE;
+		bt_link_info->bt_link_exist = TRUE;
 	}
 
 	/* check if Sco only */
@@ -627,38 +778,85 @@ void halbtc8822b1ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 	    !bt_link_info->a2dp_exist &&
 	    !bt_link_info->pan_exist &&
 	    !bt_link_info->hid_exist)
-		bt_link_info->sco_only = true;
+		bt_link_info->sco_only = TRUE;
 	else
-		bt_link_info->sco_only = false;
+		bt_link_info->sco_only = FALSE;
 
 	/* check if A2dp only */
 	if (!bt_link_info->sco_exist &&
 	    bt_link_info->a2dp_exist &&
 	    !bt_link_info->pan_exist &&
 	    !bt_link_info->hid_exist)
-		bt_link_info->a2dp_only = true;
+		bt_link_info->a2dp_only = TRUE;
 	else
-		bt_link_info->a2dp_only = false;
+		bt_link_info->a2dp_only = FALSE;
 
 	/* check if Pan only */
 	if (!bt_link_info->sco_exist &&
 	    !bt_link_info->a2dp_exist &&
 	    bt_link_info->pan_exist &&
 	    !bt_link_info->hid_exist)
-		bt_link_info->pan_only = true;
+		bt_link_info->pan_only = TRUE;
 	else
-		bt_link_info->pan_only = false;
+		bt_link_info->pan_only = FALSE;
 
 	/* check if Hid only */
 	if (!bt_link_info->sco_exist &&
 	    !bt_link_info->a2dp_exist &&
 	    !bt_link_info->pan_exist &&
 	    bt_link_info->hid_exist)
-		bt_link_info->hid_only = true;
+		bt_link_info->hid_only = TRUE;
 	else
-		bt_link_info->hid_only = false;
+		bt_link_info->hid_only = FALSE;
+
+	if (coex_sta->bt_info & BT_INFO_8822B_1ANT_B_INQ_PAGE) {
+		coex_dm->bt_status = BT_8822B_1ANT_BT_STATUS_INQ_PAGE;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], BtInfoNotify(), BT Inq/page!!!\n");
+	} else if (!(coex_sta->bt_info & BT_INFO_8822B_1ANT_B_CONNECTION)) {
+		coex_dm->bt_status = BT_8822B_1ANT_BT_STATUS_NON_CONNECTED_IDLE;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
+	} else if (coex_sta->bt_info == BT_INFO_8822B_1ANT_B_CONNECTION) {
+		/* connection exists but no busy */
+		coex_dm->bt_status = BT_8822B_1ANT_BT_STATUS_CONNECTED_IDLE;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n");
+	} else if (((coex_sta->bt_info & BT_INFO_8822B_1ANT_B_SCO_ESCO) ||
+		    (coex_sta->bt_info & BT_INFO_8822B_1ANT_B_SCO_BUSY)) &&
+		   (coex_sta->bt_info & BT_INFO_8822B_1ANT_B_ACL_BUSY)) {
+		coex_dm->bt_status = BT_8822B_1ANT_BT_STATUS_ACL_SCO_BUSY;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], BtInfoNotify(), BT ACL SCO busy!!!\n");
+	} else if ((coex_sta->bt_info & BT_INFO_8822B_1ANT_B_SCO_ESCO) ||
+		   (coex_sta->bt_info & BT_INFO_8822B_1ANT_B_SCO_BUSY)) {
+		coex_dm->bt_status = BT_8822B_1ANT_BT_STATUS_SCO_BUSY;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n");
+	} else if (coex_sta->bt_info & BT_INFO_8822B_1ANT_B_ACL_BUSY) {
+		coex_dm->bt_status = BT_8822B_1ANT_BT_STATUS_ACL_BUSY;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n");
+	} else {
+		coex_dm->bt_status = BT_8822B_1ANT_BT_STATUS_MAX;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n");
+	}
+
+	BTC_TRACE(trace_buf);
+
+	if ((coex_dm->bt_status == BT_8822B_1ANT_BT_STATUS_ACL_BUSY) ||
+	    (coex_dm->bt_status == BT_8822B_1ANT_BT_STATUS_SCO_BUSY) ||
+	    (coex_dm->bt_status == BT_8822B_1ANT_BT_STATUS_ACL_SCO_BUSY))
+		bt_busy = TRUE;
+	else
+		bt_busy = FALSE;
+
+	btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
 }
 
+
+static
 void halbtc8822b1ant_update_wifi_channel_info(IN struct btc_coexist *btcoexist,
 		IN u8 type)
 {
@@ -672,8 +870,10 @@ void halbtc8822b1ant_update_wifi_channel_info(IN struct btc_coexist *btcoexist,
 	if ((BTC_MEDIA_CONNECT == type) &&
 	    (wifi_central_chnl <= 14)) {
 
-		h2c_parameter[0] =
-			0x1;  /* enable BT AFH skip WL channel for 8822b because BT Rx LO interference */
+		/* enable BT AFH skip WL channel for 8822b
+		 * because BT Rx LO interference
+		 */
+		h2c_parameter[0] = 0x1;
 		h2c_parameter[1] = wifi_central_chnl;
 
 		btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
@@ -692,10 +892,11 @@ void halbtc8822b1ant_update_wifi_channel_info(IN struct btc_coexist *btcoexist,
 
 }
 
+static
 u8 halbtc8822b1ant_action_algorithm(IN struct btc_coexist *btcoexist)
 {
 	struct  btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
-	boolean				bt_hs_on = false;
+	boolean				bt_hs_on = FALSE;
 	u8				algorithm = BT_8822B_1ANT_COEX_ALGO_UNDEFINED;
 	u8				num_of_diff_profile = 0;
 
@@ -896,55 +1097,54 @@ u8 halbtc8822b1ant_action_algorithm(IN struct btc_coexist *btcoexist)
 	return algorithm;
 }
 
-void halbtc8822b1ant_set_bt_auto_report(IN struct btc_coexist *btcoexist,
-					IN boolean enable_auto_report)
-{
-	u8			h2c_parameter[1] = {0};
 
-	h2c_parameter[0] = 0;
 
-	if (enable_auto_report)
-		h2c_parameter[0] |= BIT(0);
 
-	btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
-}
 
-void halbtc8822b1ant_bt_auto_report(IN struct btc_coexist *btcoexist,
-		    IN boolean force_exec, IN boolean enable_auto_report)
+
+
+static
+void halbtc8822b1ant_set_fw_dac_swing_level(IN struct btc_coexist *btcoexist,
+		IN u8 dac_swing_lvl)
 {
-	coex_dm->cur_bt_auto_report = enable_auto_report;
+	u8	h2c_parameter[1] = {0};
+	u32	RTL97F_8822B = 0;
 
-	if (!force_exec) {
-		if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
-			return;
-	}
-	halbtc8822b1ant_set_bt_auto_report(btcoexist,
-					   coex_dm->cur_bt_auto_report);
+	if (RTL97F_8822B)
+		return;
 
-	coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
-}
+	/* There are several type of dacswing */
+	/* 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */
+	h2c_parameter[0] = dac_swing_lvl;
 
+	btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
+}
 
 
-void halbtc8822b1ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist
-		*btcoexist, IN boolean low_penalty_ra)
+static
+void halbtc8822b1ant_fw_dac_swing_lvl(IN struct btc_coexist *btcoexist,
+			      IN boolean force_exec, IN u8 fw_dac_swing_lvl)
 {
-	u8			h2c_parameter[6] = {0};
+	u32	RTL97F_8822B = 0;
+
+	if (RTL97F_8822B)
+		return;
 
-	h2c_parameter[0] = 0x6;	/* op_code, 0x6= Retry_Penalty */
+	coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl;
 
-	if (low_penalty_ra) {
-		h2c_parameter[1] |= BIT(0);
-		h2c_parameter[2] =
-			0x00;  /* normal rate except MCS7/6/5, OFDM54/48/36 */
-		h2c_parameter[3] = 0xf7;  /* MCS7 or OFDM54 */
-		h2c_parameter[4] = 0xf8;  /* MCS6 or OFDM48 */
-		h2c_parameter[5] = 0xf9;	/* MCS5 or OFDM36	 */
+	if (!force_exec) {
+		if (coex_dm->pre_fw_dac_swing_lvl ==
+		    coex_dm->cur_fw_dac_swing_lvl)
+			return;
 	}
 
-	btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
+	halbtc8822b1ant_set_fw_dac_swing_level(btcoexist,
+					       coex_dm->cur_fw_dac_swing_lvl);
+
+	coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
 }
 
+static
 void halbtc8822b1ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
 			    IN boolean force_exec, IN boolean low_penalty_ra)
 {
@@ -967,6 +1167,7 @@ void halbtc8822b1ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
 #endif
 }
 
+static
 void halbtc8822b1ant_write_score_board(
 	IN	struct  btc_coexist		*btcoexist,
 	IN	u16				bitpos,
@@ -984,6 +1185,7 @@ void halbtc8822b1ant_write_score_board(
 	btcoexist->btc_write_2byte(btcoexist, 0xaa, originalval);
 }
 
+static
 void halbtc8822b1ant_read_score_board(
 	IN	struct  btc_coexist		*btcoexist,
 	IN   u16				*score_board_val
@@ -994,6 +1196,7 @@ void halbtc8822b1ant_read_score_board(
 			    0xaa)) & 0x7fff;
 }
 
+static
 void halbtc8822b1ant_post_state_to_bt(
 	IN	struct  btc_coexist		*btcoexist,
 	IN	u16						type,
@@ -1006,11 +1209,12 @@ void halbtc8822b1ant_post_state_to_bt(
 }
 
 
+static
 void halbtc8822b1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 {
 	static u32		bt_disable_cnt = 0;
-	boolean			bt_active = true, bt_disabled = false,
-				wifi_under_5g = false;
+	boolean			bt_active = TRUE, bt_disabled = FALSE,
+				wifi_under_5g = FALSE;
 	u16		u16tmp;
 
 	/* This function check if bt is disabled */
@@ -1019,17 +1223,19 @@ void halbtc8822b1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 	    coex_sta->high_priority_rx == 0 &&
 	    coex_sta->low_priority_tx == 0 &&
 	    coex_sta->low_priority_rx == 0)
-		bt_active = false;
+		bt_active = FALSE;
 	if (coex_sta->high_priority_tx == 0xffff &&
 	    coex_sta->high_priority_rx == 0xffff &&
 	    coex_sta->low_priority_tx == 0xffff &&
 	    coex_sta->low_priority_rx == 0xffff)
-		bt_active = false;
+		bt_active = FALSE;
 
 
 #else
 
-	/* Read BT on/off status from scoreboard[1], enable this only if BT patch support this feature */
+	/* Read BT on/off status from scoreboard[1],
+	 * enable this only if BT patch support this feature
+	 */
 	halbtc8822b1ant_read_score_board(btcoexist, &u16tmp);
 
 	bt_active = u16tmp & BIT(1);
@@ -1039,14 +1245,14 @@ void halbtc8822b1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 
 	if (bt_active) {
 		bt_disable_cnt = 0;
-		bt_disabled = false;
+		bt_disabled = FALSE;
 		btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
 				   &bt_disabled);
 	} else {
 
 		bt_disable_cnt++;
 		if (bt_disable_cnt >= 2) {
-			bt_disabled = true;
+			bt_disabled = TRUE;
 			bt_disable_cnt = 2;
 		}
 
@@ -1060,10 +1266,10 @@ void halbtc8822b1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 
 	if ((wifi_under_5g) || (bt_disabled))
 		halbtc8822b1ant_low_penalty_ra(btcoexist,
-					       NORMAL_EXEC, false);
+					       NORMAL_EXEC, FALSE);
 	else
 		halbtc8822b1ant_low_penalty_ra(btcoexist,
-					       NORMAL_EXEC, true);
+					       NORMAL_EXEC, TRUE);
 
 
 	if (coex_sta->bt_disabled != bt_disabled) {
@@ -1080,11 +1286,13 @@ void halbtc8822b1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 
 
 
+static
 void halbtc8822b1ant_enable_gnt_to_gpio(IN struct btc_coexist *btcoexist,
 					boolean isenable)
 {
+#if	BT_8822B_1ANT_COEX_DBG
 	static u8			bitVal[5] = {0, 0, 0, 0, 0};
-	static boolean		state = false;
+	static boolean		state = FALSE;
 
 	if (state == isenable)
 		return;
@@ -1100,7 +1308,7 @@ void halbtc8822b1ant_enable_gnt_to_gpio(IN struct btc_coexist *btcoexist,
 		bitVal[0] = (btcoexist->btc_read_1byte(btcoexist,
 				       0x66) & BIT(4)) >> 4;	/*0x66[4] */
 		bitVal[1] = (btcoexist->btc_read_1byte(btcoexist,
-					       0x67) & BIT(0));		/*0x66[8] */
+					       0x67) & BIT(0));	/*0x66[8] */
 		bitVal[2] = (btcoexist->btc_read_1byte(btcoexist,
 				       0x42) & BIT(3)) >> 3;  /*0x40[19] */
 		bitVal[3] = (btcoexist->btc_read_1byte(btcoexist,
@@ -1137,52 +1345,67 @@ void halbtc8822b1ant_enable_gnt_to_gpio(IN struct btc_coexist *btcoexist,
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x72, BIT(2),
 					   bitVal[4]);  /*0x70[18] = 0 */
 	}
-
+#endif
 }
 
 
+
+static
 u32 halbtc8822b1ant_ltecoex_indirect_read_reg(IN struct btc_coexist *btcoexist,
 		IN u16 reg_addr)
 {
-	u32 j = 0;
+	u32 delay_count = 0;
 
+	/* wait for ready bit before access 0x1700 */
+	while (1) {
+		if ((btcoexist->btc_read_1byte(btcoexist, 0x1703)&BIT(5)) == 0) {
+			delay_ms(50);
+			delay_count++;
+			if (delay_count >= 10) {
+				delay_count = 0;
+				break;
+			}
+		} else {
+			break;
+		}
+	}
 
-	/* wait for ready bit before access 0x1700		 */
 	btcoexist->btc_write_4byte(btcoexist, 0x1700, 0x800F0000 | reg_addr);
 
-	do {
-		j++;
-	} while (((btcoexist->btc_read_1byte(btcoexist,
-					     0x1703) & BIT(5)) == 0) &&
-		 (j < BT_8822B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT));
-
-
 	return btcoexist->btc_read_4byte(btcoexist,
 					 0x1708);  /* get read data */
-
 }
 
+
+static
 void halbtc8822b1ant_ltecoex_indirect_write_reg(IN struct btc_coexist
 		*btcoexist,
 		IN u16 reg_addr, IN u32 bit_mask, IN u32 reg_value)
 {
-	u32 val, i = 0, j = 0, bitpos = 0;
+	u32 val, i = 0, bitpos = 0, delay_count = 0;
 
 
 	if (bit_mask == 0x0)
 		return;
+
 	if (bit_mask == 0xffffffff) {
+		/* wait for ready bit before access 0x1700/0x1704 */
+		while (1) {
+			if ((btcoexist->btc_read_1byte(btcoexist, 0x1703)&BIT(5)) == 0) {
+				delay_ms(50);
+				delay_count++;
+				if (delay_count >= 10)	{
+					delay_count = 0;
+					break;
+				}
+			} else {
+				break;
+			}
+		}
+
 		btcoexist->btc_write_4byte(btcoexist, 0x1704,
 					   reg_value); /* put write data */
 
-		/* wait for ready bit before access 0x1700 */
-		do {
-			j++;
-		} while (((btcoexist->btc_read_1byte(btcoexist,
-						     0x1703) & BIT(5)) == 0) &&
-			(j < BT_8822B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT));
-
-
 		btcoexist->btc_write_4byte(btcoexist, 0x1700,
 					   0xc00F0000 | reg_addr);
 	} else {
@@ -1198,19 +1421,23 @@ void halbtc8822b1ant_ltecoex_indirect_write_reg(IN struct btc_coexist
 				reg_addr);
 		val = (val & (~bit_mask)) | (reg_value << bitpos);
 
-		/* put write data value */
+		/* wait for ready bit before access 0x1700/0x1704 */
+		while (1) {
+			if ((btcoexist->btc_read_1byte(btcoexist, 0x1703)&BIT(5)) == 0) {
+				delay_ms(50);
+				delay_count++;
+				if (delay_count >= 10)	{
+					delay_count = 0;
+					break;
+				}
+			} else {
+				break;
+			}
+		}
+
 		btcoexist->btc_write_4byte(btcoexist, 0x1704,
 					   val); /* put write data */
 
-		/* wait for ready bit before access 0x1700		 */
-		do {
-			j++;
-		} while (((btcoexist->btc_read_1byte(btcoexist,
-						     0x1703) & BIT(5)) == 0) &&
-			(j < BT_8822B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT));
-
-		/* write data add*/
-
 		btcoexist->btc_write_4byte(btcoexist, 0x1700,
 					   0xc00F0000 | reg_addr);
 
@@ -1218,6 +1445,8 @@ void halbtc8822b1ant_ltecoex_indirect_write_reg(IN struct btc_coexist
 
 }
 
+
+static
 void halbtc8822b1ant_ltecoex_enable(IN struct btc_coexist *btcoexist,
 				    IN boolean enable)
 {
@@ -1225,12 +1454,13 @@ void halbtc8822b1ant_ltecoex_enable(IN struct btc_coexist *btcoexist,
 
 	val = (enable) ? 1 : 0;
 	/* 0x38[7] */
-	halbtc8822b1ant_ltecoex_indirect_write_reg(btcoexist, 0x38, 0x80,
-			val);  /* 0x38[7] */
+	halbtc8822b1ant_ltecoex_indirect_write_reg(btcoexist, 0x38, 0x80, val);
 
 }
 
 
+
+static
 void halbtc8822b1ant_ltecoex_pathcontrol_owner(IN struct btc_coexist *btcoexist,
 		IN boolean wifi_control)
 {
@@ -1238,11 +1468,12 @@ void halbtc8822b1ant_ltecoex_pathcontrol_owner(IN struct btc_coexist *btcoexist,
 
 	val = (wifi_control) ? 1 : 0;
 	/* 0x70[26] */
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x4,
-					   val); /* 0x70[26] */
+	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x4, val);
 
 }
 
+
+static
 void halbtc8822b1ant_ltecoex_set_gnt_bt(IN struct btc_coexist *btcoexist,
 			IN u8 control_block, IN boolean sw_control, IN u8 state)
 {
@@ -1250,8 +1481,9 @@ void halbtc8822b1ant_ltecoex_set_gnt_bt(IN struct btc_coexist *btcoexist,
 
 	state = state & 0x1;
 	/*LTE indirect 0x38=0xccxx (sw : gnt_wl=1,sw gnt_bt=1)
-	0x38=0xddxx (sw : gnt_bt=1 , sw gnt_wl=0)
-	0x38=0x55xx(hw pta :gnt_wl /gnt_bt ) */
+	 *0x38=0xddxx (sw : gnt_bt=1 , sw gnt_wl=0)
+	 *0x38=0x55xx(hw pta :gnt_wl /gnt_bt )
+	 */
 	val = (sw_control) ? ((state << 1) | 0x1) : 0;
 
 	switch (control_block) {
@@ -1262,7 +1494,7 @@ void halbtc8822b1ant_ltecoex_set_gnt_bt(IN struct btc_coexist *btcoexist,
 				0x38, bit_mask, val); /* 0x38[15:14] */
 		bit_mask = 0x0c00;
 		halbtc8822b1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[11:10]						 */
+				0x38, bit_mask, val); /* 0x38[11:10] */
 		break;
 	case BT_8822B_1ANT_GNT_BLOCK_RFC:
 		bit_mask = 0xc000;
@@ -1279,13 +1511,16 @@ void halbtc8822b1ant_ltecoex_set_gnt_bt(IN struct btc_coexist *btcoexist,
 
 }
 
+
+static
 void halbtc8822b1ant_ltecoex_set_gnt_wl(IN struct btc_coexist *btcoexist,
 			IN u8 control_block, IN boolean sw_control, IN u8 state)
 {
 	u32 val = 0, bit_mask;
 	/*LTE indirect 0x38=0xccxx (sw : gnt_wl=1,sw gnt_bt=1)
-	0x38=0xddxx (sw : gnt_bt=1 , sw gnt_wl=0)
-	0x38=0x55xx(hw pta :gnt_wl /gnt_bt ) */
+	 *0x38=0xddxx (sw : gnt_bt=1 , sw gnt_wl=0)
+	 *0x38=0x55xx(hw pta :gnt_wl /gnt_bt )
+	 */
 
 	state = state & 0x1;
 	val = (sw_control) ? ((state << 1) | 0x1) : 0;
@@ -1298,7 +1533,7 @@ void halbtc8822b1ant_ltecoex_set_gnt_wl(IN struct btc_coexist *btcoexist,
 				0x38, bit_mask, val); /* 0x38[13:12] */
 		bit_mask = 0x0300;
 		halbtc8822b1ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[9:8]						 */
+				0x38, bit_mask, val); /* 0x38[9:8] */
 		break;
 	case BT_8822B_1ANT_GNT_BLOCK_RFC:
 		bit_mask = 0x3000;
@@ -1315,6 +1550,8 @@ void halbtc8822b1ant_ltecoex_set_gnt_wl(IN struct btc_coexist *btcoexist,
 
 }
 
+
+static
 void halbtc8822b1ant_ltecoex_set_coex_table(IN struct btc_coexist *btcoexist,
 		IN u8 table_type, IN u16 table_content)
 {
@@ -1337,6 +1574,9 @@ void halbtc8822b1ant_ltecoex_set_coex_table(IN struct btc_coexist *btcoexist,
 }
 
 
+
+#if 0
+static
 void halbtc8822b1ant_ltcoex_set_break_table(IN struct btc_coexist *btcoexist,
 		IN u8 table_type, IN u8 table_content)
 {
@@ -1363,7 +1603,12 @@ void halbtc8822b1ant_ltcoex_set_break_table(IN struct btc_coexist *btcoexist,
 
 
 }
+#endif
+
+
 
+
+static
 void halbtc8822b1ant_set_wltoggle_coex_table(IN struct btc_coexist *btcoexist,
 		IN boolean force_exec,  IN u8 interval,
 		IN u8 val0x6c4_b0, IN u8 val0x6c4_b1, IN u8 val0x6c4_b2,
@@ -1399,6 +1644,9 @@ void halbtc8822b1ant_set_wltoggle_coex_table(IN struct btc_coexist *btcoexist,
 	btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, cur_h2c_parameter);
 }
 
+
+
+static
 void halbtc8822b1ant_set_coex_table(IN struct btc_coexist *btcoexist,
 	    IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
 {
@@ -1411,6 +1659,8 @@ void halbtc8822b1ant_set_coex_table(IN struct btc_coexist *btcoexist,
 	btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
 }
 
+
+static
 void halbtc8822b1ant_coex_table(IN struct btc_coexist *btcoexist,
 			IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4,
 				IN u32 val0x6c8, IN u8 val0x6cc)
@@ -1438,6 +1688,8 @@ void halbtc8822b1ant_coex_table(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
 }
 
+
+static
 void halbtc8822b1ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 		IN boolean force_exec, IN u8 type)
 {
@@ -1448,9 +1700,11 @@ void halbtc8822b1ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 
 	coex_sta->coex_table_type = type;
 
-	if (coex_sta->concurrent_rx_mode_on == true) {
+	if (coex_sta->concurrent_rx_mode_on) {
 		break_table = 0xf0ffffff;	/* set WL hi-pri can break BT */
-		select_table = 0x3;		/* set Tx response = Hi-Pri (ex: Transmitting ACK,BA,CTS) */
+		select_table = 0x3; /* set Tx response = Hi-Pri
+				     * (ex: Transmitting ACK,BA,CTS)
+				     */
 	} else {
 		break_table = 0xffffff;
 		select_table = 0x3;
@@ -1542,12 +1796,38 @@ void halbtc8822b1ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 					   0x5a5a555a, 0x5a5a555a, break_table,
 					   select_table);
 		break;
-
+	case 17:
+		halbtc8822b1ant_coex_table(btcoexist, force_exec,
+					   0xaaaa55aa, 0xaaaa55aa, break_table,
+					   select_table);
+		break;
+	case 18:
+		halbtc8822b1ant_coex_table(btcoexist, force_exec,
+					   0x55555555, 0x5aaa5a5a, break_table,
+					   select_table);
+		break;
+	case 19:
+		halbtc8822b1ant_coex_table(btcoexist, force_exec,
+					   0xa5555555, 0xaaaa5aaa, break_table,
+					   select_table);
+		break;
+	case 20:
+		halbtc8822b1ant_coex_table(btcoexist, force_exec,
+					   0x55555555, 0xaaaa5aaa, break_table,
+					   select_table);
+		break;
+	case 21:
+		halbtc8822b1ant_coex_table(btcoexist, force_exec,
+					   0x55555555, 0x55555a5a, break_table,
+					   select_table);
+		break;
 	default:
 		break;
 	}
 }
 
+
+static
 void halbtc8822b1ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
 		IN boolean enable)
 {
@@ -1561,6 +1841,8 @@ void halbtc8822b1ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
 	btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
 }
 
+
+static
 void halbtc8822b1ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
 				     IN boolean force_exec, IN boolean enable)
 {
@@ -1582,6 +1864,8 @@ void halbtc8822b1ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
 }
 
+
+static
 void halbtc8822b1ant_set_lps_rpwm(IN struct btc_coexist *btcoexist,
 				  IN u8 lps_val, IN u8 rpwm_val)
 {
@@ -1592,6 +1876,8 @@ void halbtc8822b1ant_set_lps_rpwm(IN struct btc_coexist *btcoexist,
 	btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm);
 }
 
+
+static
 void halbtc8822b1ant_lps_rpwm(IN struct btc_coexist *btcoexist,
 		      IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val)
 {
@@ -1601,7 +1887,7 @@ void halbtc8822b1ant_lps_rpwm(IN struct btc_coexist *btcoexist,
 	if (!force_exec) {
 		if ((coex_dm->pre_lps == coex_dm->cur_lps) &&
 		    (coex_dm->pre_rpwm == coex_dm->cur_rpwm))
-			return;
+		return;
 	}
 	halbtc8822b1ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val);
 
@@ -1609,6 +1895,9 @@ void halbtc8822b1ant_lps_rpwm(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_rpwm = coex_dm->cur_rpwm;
 }
 
+
+
+static
 void halbtc8822b1ant_ps_tdma_check_for_power_save_state(
 	IN struct btc_coexist *btcoexist, IN boolean new_ps_state)
 {
@@ -1639,117 +1928,153 @@ void halbtc8822b1ant_ps_tdma_check_for_power_save_state(
 }
 
 
-void halbtc8822b1ant_power_save_state(IN struct btc_coexist *btcoexist,
+
+
+static
+boolean halbtc8822b1ant_power_save_state(IN struct btc_coexist *btcoexist,
 			      IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val)
 {
-	boolean		low_pwr_disable = false;
+	boolean		low_pwr_disable = FALSE, result = TRUE;
 
 	switch (ps_type) {
 	case BTC_PS_WIFI_NATIVE:
 		/* recover to original 32k low power setting */
-		coex_sta->force_lps_on = false;
-		low_pwr_disable = false;
+		coex_sta->force_lps_ctrl = FALSE;
+		low_pwr_disable = FALSE;
 		btcoexist->btc_set(btcoexist,
 				   BTC_SET_ACT_DISABLE_LOW_POWER,
 				   &low_pwr_disable);
 		btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS,
 				   NULL);
-		coex_sta->force_lps_on = false;
 		break;
 	case BTC_PS_LPS_ON:
 
-		coex_sta->force_lps_on = true;
+		coex_sta->force_lps_ctrl = TRUE;
 		halbtc8822b1ant_ps_tdma_check_for_power_save_state(
-			btcoexist, true);
+			btcoexist, TRUE);
 		halbtc8822b1ant_lps_rpwm(btcoexist, NORMAL_EXEC,
 					 lps_val, rpwm_val);
 		/* when coex force to enter LPS, do not enter 32k low power. */
-		low_pwr_disable = true;
+		low_pwr_disable = TRUE;
 		btcoexist->btc_set(btcoexist,
 				   BTC_SET_ACT_DISABLE_LOW_POWER,
 				   &low_pwr_disable);
-		/* power save must executed before psTdma.			 */
+		/* power save must executed before psTdma. */
 		btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS,
 				   NULL);
-		coex_sta->force_lps_on = true;
+
 		break;
 	case BTC_PS_LPS_OFF:
 
-		coex_sta->force_lps_on = false;
+		coex_sta->force_lps_ctrl = TRUE;
 		halbtc8822b1ant_ps_tdma_check_for_power_save_state(
-			btcoexist, false);
-		btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
+			btcoexist, FALSE);
+		result = btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
 				   NULL);
-		coex_sta->force_lps_on = false;
+
 		break;
 	default:
 		break;
 	}
+
+	return result;
 }
 
 
+
+
+static
 void halbtc8822b1ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
 	   IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5)
 {
 	u8			h2c_parameter[5] = {0};
 	u8			real_byte1 = byte1, real_byte5 = byte5;
-	boolean		ap_enable = false;
+	boolean			ap_enable = FALSE, result = FALSE;
+	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+
+	if (byte5 & BIT(2))
+		coex_sta->is_tdma_btautoslot = TRUE;
+	else
+		coex_sta->is_tdma_btautoslot = FALSE;
+
+	/* release bt-auto slot for auto-slot hang is detected!! */
+	if (coex_sta->is_tdma_btautoslot)
+		if ((coex_sta->is_tdma_btautoslot_hang) ||
+			(bt_link_info->slave_role))
+			byte5 = byte5 & 0xfb;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
 			   &ap_enable);
 
-	if (ap_enable) {
-		if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
+	if ((ap_enable) && (byte1 & BIT(4) && !(byte1 & BIT(5)))) {
 
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "[BTCoex], FW for 1Ant AP mode\n");
-			BTC_TRACE(trace_buf);
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], halbtc8822b1ant_set_fw_pstdma == FW for 1Ant AP mode\n");
+		BTC_TRACE(trace_buf);
 
-			real_byte1 &= ~BIT(4);
-			real_byte1 |= BIT(5);
+		real_byte1 &= ~BIT(4);
+		real_byte1 |= BIT(5);
 
-			real_byte5 |= BIT(5);
-			real_byte5 &= ~BIT(6);
+		real_byte5 |= BIT(5);
+		real_byte5 &= ~BIT(6);
 
-			halbtc8822b1ant_power_save_state(btcoexist,
+		halbtc8822b1ant_power_save_state(btcoexist,
 						 BTC_PS_WIFI_NATIVE, 0x0,
 							 0x0);
-		}
+
 	} else if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
 
-		halbtc8822b1ant_power_save_state(btcoexist,
-						 BTC_PS_LPS_ON, 0x50,
-						 0x4);
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], halbtc8822b1ant_set_fw_pstdma == Force LPS (byte1 = 0x%x)\n", byte1);
+		BTC_TRACE(trace_buf);
+		if (!halbtc8822b1ant_power_save_state(btcoexist, BTC_PS_LPS_OFF, 0x50, 0x4))
+			result = TRUE;
 	} else {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], halbtc8822b1ant_set_fw_pstdma == native power save (byte1 = 0x%x)\n", byte1);
+		BTC_TRACE(trace_buf);
 		halbtc8822b1ant_power_save_state(btcoexist,
 						 BTC_PS_WIFI_NATIVE, 0x0,
 						 0x0);
 	}
 
 
-	h2c_parameter[0] = real_byte1;
-	h2c_parameter[1] = byte2;
-	h2c_parameter[2] = byte3;
-	h2c_parameter[3] = byte4;
-	h2c_parameter[4] = real_byte5;
+	coex_sta->is_set_ps_state_fail = result;
+
+	if (!coex_sta->is_set_ps_state_fail) {
+		h2c_parameter[0] = real_byte1;
+		h2c_parameter[1] = byte2;
+		h2c_parameter[2] = byte3;
+		h2c_parameter[3] = byte4;
+		h2c_parameter[4] = real_byte5;
+
+		coex_dm->ps_tdma_para[0] = real_byte1;
+		coex_dm->ps_tdma_para[1] = byte2;
+		coex_dm->ps_tdma_para[2] = byte3;
+		coex_dm->ps_tdma_para[3] = byte4;
+		coex_dm->ps_tdma_para[4] = real_byte5;
 
-	coex_dm->ps_tdma_para[0] = real_byte1;
-	coex_dm->ps_tdma_para[1] = byte2;
-	coex_dm->ps_tdma_para[2] = byte3;
-	coex_dm->ps_tdma_para[3] = byte4;
-	coex_dm->ps_tdma_para[4] = real_byte5;
+		btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
 
-	btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
+	} else {
+		coex_sta->cnt_set_ps_state_fail++;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], halbtc8822b1ant_set_fw_pstdma == Force Leave LPS Fail (cnt = %d)\n",
+			    coex_sta->cnt_set_ps_state_fail);
+		BTC_TRACE(trace_buf);
+	}
 }
 
+
+
+static
 void halbtc8822b1ant_ps_tdma(IN struct btc_coexist *btcoexist,
 		     IN boolean force_exec, IN boolean turn_on, IN u8 type)
 {
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-	boolean			wifi_busy = false;
+	boolean			wifi_busy = FALSE;
 	static u8			psTdmaByte4Modify = 0x0, pre_psTdmaByte4Modify = 0x0;
-	static boolean	 pre_wifi_busy = false;
+	static boolean	 pre_wifi_busy = FALSE;
 
 	coex_dm->cur_ps_tdma_on = turn_on;
 	coex_dm->cur_ps_tdma = type;
@@ -1757,55 +2082,60 @@ void halbtc8822b1ant_ps_tdma(IN struct btc_coexist *btcoexist,
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
 	if (wifi_busy != pre_wifi_busy) {
-		force_exec = true;
+		force_exec = TRUE;
 		pre_wifi_busy = wifi_busy;
 	}
 
 	/* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */
-	if ((bt_link_info->slave_role) && (bt_link_info->a2dp_exist))
+	if (bt_link_info->slave_role)
 		psTdmaByte4Modify = 0x1;
 	else
 		psTdmaByte4Modify = 0x0;
 
 	if (pre_psTdmaByte4Modify != psTdmaByte4Modify) {
 
-		force_exec = true;
+		force_exec = TRUE;
 		pre_psTdmaByte4Modify = psTdmaByte4Modify;
 	}
 
+	if (!force_exec) {
+		if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
+		    (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma)) {
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], Skip TDMA because no change TDMA(%s, %d)\n",
+				    (coex_dm->cur_ps_tdma_on ? "on" : "off"),
+				    coex_dm->cur_ps_tdma);
+			BTC_TRACE(trace_buf);
+			return;
+		}
+	}
+
 	if (coex_dm->cur_ps_tdma_on) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], ********TDMA(on, %d) **********\n",
+			    "[BTCoex], ********** TDMA(on, %d) **********\n",
 			    coex_dm->cur_ps_tdma);
 		BTC_TRACE(trace_buf);
+
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8,
+					   0x1);  /* enable TBTT nterrupt */
 	} else {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], **********TDMA(off, %d) **********\n",
+			    "[BTCoex], ********** TDMA(off, %d) **********\n",
 			    coex_dm->cur_ps_tdma);
 		BTC_TRACE(trace_buf);
 	}
 
-	if (!force_exec) {
-		if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
-		    (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma)) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], return for no-TDMA case change\n");
-			BTC_TRACE(trace_buf);
-
-			return;
-		}
-	}
 
 
 	if (turn_on) {
 
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8,
-					   0x1);  /* enable TBTT nterrupt */
+		/* enable TBTT nterrupt */
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8, 0x1);
 
 		switch (type) {
 		default:
 			halbtc8822b1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x1a, 0x1a, 0x0, 0x10);
+					      0x61, 0x35, 0x03, 0x11, 0x11);
 			break;
 		case 1:
 			halbtc8822b1ant_set_fw_pstdma(btcoexist,
@@ -1813,19 +2143,23 @@ void halbtc8822b1ant_ps_tdma(IN struct btc_coexist *btcoexist,
 			break;
 		case 3:
 			halbtc8822b1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x3a, 0x03, 0x10, 0x10);
+					      0x51, 0x30, 0x03, 0x10, 0x50);
 			break;
 		case 4:
 			halbtc8822b1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x21, 0x03, 0x10, 0x10);
+					      0x51, 0x21, 0x03, 0x10, 0x50);
 			break;
 		case 5:
 			halbtc8822b1ant_set_fw_pstdma(btcoexist,
 					      0x61, 0x15, 0x3, 0x11, 0x11);
 			break;
+		case 6:
+			halbtc8822b1ant_set_fw_pstdma(btcoexist,
+					      0x61, 0x20, 0x3, 0x11, 0x10);
+			break;
 		case 7:
 			halbtc8822b1ant_set_fw_pstdma(btcoexist,
-					      0x61, 0x10, 0x03, 0x10,  0x14 |
+					      0x51, 0x10, 0x03, 0x10,  0x54 |
 						      psTdmaByte4Modify);
 			break;
 		case 8:
@@ -1833,14 +2167,24 @@ void halbtc8822b1ant_ps_tdma(IN struct btc_coexist *btcoexist,
 					      0x51, 0x10, 0x03, 0x10,  0x14 |
 						      psTdmaByte4Modify);
 			break;
+		case 11:
+			halbtc8822b1ant_set_fw_pstdma(btcoexist,
+					      0x61, 0x25, 0x03, 0x11,  0x10 |
+						      psTdmaByte4Modify);
+			break;
+		case 12:
+			halbtc8822b1ant_set_fw_pstdma(btcoexist,
+					      0x51, 0x30, 0x03, 0x10,  0x50 |
+						      psTdmaByte4Modify);
+			break;
 		case 13:
 			halbtc8822b1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x25, 0x03, 0x10,  0x10 |
+					      0x51, 0x10, 0x07, 0x10,  0x54 |
 						      psTdmaByte4Modify);
 			break;
 		case 14:
 			halbtc8822b1ant_set_fw_pstdma(btcoexist,
-					      0x51, 0x15, 0x03, 0x10,  0x10 |
+					      0x51, 0x15, 0x03, 0x10,  0x50 |
 						      psTdmaByte4Modify);
 			break;
 		case 15:
@@ -1853,6 +2197,11 @@ void halbtc8822b1ant_ps_tdma(IN struct btc_coexist *btcoexist,
 					      0x61, 0x10, 0x03, 0x11,  0x14 |
 						      psTdmaByte4Modify);
 			break;
+		case 18:
+			halbtc8822b1ant_set_fw_pstdma(btcoexist,
+					      0x51, 0x10, 0x03, 0x10,  0x50 |
+						      psTdmaByte4Modify);
+			break;
 
 		case 20:
 			halbtc8822b1ant_set_fw_pstdma(btcoexist,
@@ -1862,6 +2211,10 @@ void halbtc8822b1ant_ps_tdma(IN struct btc_coexist *btcoexist,
 			halbtc8822b1ant_set_fw_pstdma(btcoexist,
 					      0x61, 0x25, 0x03, 0x11, 0x10);
 			break;
+		case 27:
+			halbtc8822b1ant_set_fw_pstdma(btcoexist,
+					      0x61, 0x10, 0x03, 0x11, 0x15);
+			break;
 		case 32:
 			halbtc8822b1ant_set_fw_pstdma(btcoexist,
 					      0x61, 0x35, 0x3, 0x11, 0x11);
@@ -1905,7 +2258,15 @@ void halbtc8822b1ant_ps_tdma(IN struct btc_coexist *btcoexist,
 			break;
 		case 49:
 			halbtc8822b1ant_set_fw_pstdma(btcoexist,
-					      0x55, 0x1e, 0x3, 0x10, 0x54);
+					      0x55, 0x10, 0x3, 0x10, 0x54);
+			break;
+		case 50:
+			halbtc8822b1ant_set_fw_pstdma(btcoexist,
+					      0x51, 0x4a, 0x3, 0x10, 0x10);
+			break;
+		case 51:
+			halbtc8822b1ant_set_fw_pstdma(btcoexist,
+					      0x61, 0x35, 0x3, 0x10, 0x11);
 			break;
 
 		}
@@ -1916,61 +2277,75 @@ void halbtc8822b1ant_ps_tdma(IN struct btc_coexist *btcoexist,
 		default:  /* Software control, Antenna at BT side */
 			halbtc8822b1ant_set_fw_pstdma(btcoexist,
 						      0x0, 0x0, 0x0, 0x0, 0x0);
-			/*
+#if 0
 			halbtc8822b1ant_set_ant_path(btcoexist,
-					     BTC_ANT_PATH_BT, FORCE_EXEC, false,
-						     false); */
+					     BTC_ANT_PATH_BT, FORCE_EXEC, FALSE,
+						     FALSE);
+#endif
 			break;
-		case 8: /* PTA Control */
+#if 0
+/* 08:1ant:PTA Control -0x778=1-ant hw control,40:2ant:sw control-diversity */
+#endif
+		case 8:
 			halbtc8822b1ant_set_fw_pstdma(btcoexist,
 						      0x8, 0x0, 0x0, 0x0, 0x0);
-			/*
+#if 0
 			halbtc8822b1ant_set_ant_path(btcoexist,
-				     BTC_ANT_PATH_PTA, FORCE_EXEC,  false,
-				     false);  */
+				     BTC_ANT_PATH_PTA, FORCE_EXEC,  FALSE,
+				     FALSE);
+#endif
 			break;
 		case 9:   /* Software control, Antenna at WiFi side */
 			halbtc8822b1ant_set_fw_pstdma(btcoexist,
 						      0x0, 0x0, 0x0, 0x0, 0x0);
-			/*
+#if 0
 			halbtc8822b1ant_set_ant_path(btcoexist,
-					     BTC_ANT_PATH_WIFI, FORCE_EXEC,false,false); */
+					     BTC_ANT_PATH_WIFI, FORCE_EXEC, FALSE, FALSE);
+#endif
 			break;
 		case 10:	/* under 5G , 0x778=1*/
 			halbtc8822b1ant_set_fw_pstdma(btcoexist,
 						      0x0, 0x0, 0x0, 0x0, 0x0);
 
-			/*
+#if 0
 			halbtc8822b1ant_set_ant_path(btcoexist,
-					     BTC_ANT_PATH_WIFI5G, FORCE_EXEC, false,
-						     false);	*/
-
+					     BTC_ANT_PATH_WIFI5G, FORCE_EXEC, FALSE,
+						     FALSE);
+#endif
 			break;
 		}
 	}
 
 
-	/* update pre state */
-	coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
-	coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
+	if (!coex_sta->is_set_ps_state_fail) {
+		/* update pre state */
+		coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
+		coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
+	}
 }
 
 
+
+static
 void halbtc8822b1ant_sw_mechanism(IN struct btc_coexist *btcoexist,
 				  IN boolean low_penalty_ra)
 {
 	halbtc8822b1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra);
 }
-/*rf4 type by efuse , and for ant at main aux inverse use , because is 2x2 ,and control types are the same ,does not need */
 
+/* rf4 type by efuse, and for ant at main aux inverse use,
+ * because is 2x2, and control types are the same, does not need
+ */
+
+static
 void halbtc8822b1ant_set_rfe_type(IN struct btc_coexist *btcoexist)
 {
 	struct  btc_board_info *board_info = &btcoexist->board_info;
 
 	/* Ext switch buffer mux */
-		btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x1991, 0x3, 0x0);
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbe, 0x8, 0x0);
+	btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
+	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x1991, 0x3, 0x0);
+	btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbe, 0x8, 0x0);
 
 	/* the following setup should be got from Efuse in the future */
 	rfe_type->rfe_module_type = board_info->rfe_type;
@@ -1980,29 +2355,44 @@ void halbtc8822b1ant_set_rfe_type(IN struct btc_coexist *btcoexist)
 	switch (rfe_type->rfe_module_type) {
 	case 0:
 	default:
-		rfe_type->ext_ant_switch_exist = true;
+		rfe_type->ext_ant_switch_exist = TRUE;
 		rfe_type->ext_ant_switch_type =
 			BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SPDT;
 		break;
 	case 1:
-		rfe_type->ext_ant_switch_exist = true;
+		rfe_type->ext_ant_switch_exist = TRUE;
 		rfe_type->ext_ant_switch_type =
 			BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SPDT;
 		break;
 	case 2:
-		rfe_type->ext_ant_switch_exist = true;
+		rfe_type->ext_ant_switch_exist = TRUE;
 		rfe_type->ext_ant_switch_type =
 			BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SPDT;
 		break;
 	case 3:
-		rfe_type->ext_ant_switch_exist = true;
+		rfe_type->ext_ant_switch_exist = TRUE;
 		rfe_type->ext_ant_switch_type =
 			BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SPDT;
 		break;
 	case 4:
-		rfe_type->ext_ant_switch_exist = true;
+		rfe_type->ext_ant_switch_exist = TRUE;
 		rfe_type->ext_ant_switch_type =
-			BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SP3T;          /* SP3T  */;
+			BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SPDT;
+		break;
+	case 5:
+		rfe_type->ext_ant_switch_exist = TRUE;
+		rfe_type->ext_ant_switch_type =
+			BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SPDT;
+		break;
+	case 6:
+		rfe_type->ext_ant_switch_exist = TRUE;
+		rfe_type->ext_ant_switch_type =
+			BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SPDT;
+		break;
+	case 7:
+		rfe_type->ext_ant_switch_exist = TRUE;
+		rfe_type->ext_ant_switch_type =
+			BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SPDT;
 		break;
 	}
 
@@ -2011,17 +2401,19 @@ void halbtc8822b1ant_set_rfe_type(IN struct btc_coexist *btcoexist)
 
 /*anttenna control by bb mac bt antdiv pta to write 0x4c 0xcb4,0xcbd*/
 
+
+static
 void halbtc8822b1ant_set_ext_ant_switch(IN struct btc_coexist *btcoexist,
 			IN boolean force_exec, IN u8 ctrl_type, IN u8 pos_type)
 {
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-	boolean	switch_polatiry_inverse = false;
+	boolean	switch_polatiry_inverse = FALSE;
 	u8		regval_0xcbd = 0, regval_0x64;
 	u32		u32tmp1 = 0, u32tmp2 = 0, u32tmp3 = 0;
+
 	/* Ext switch buffer mux */
-		btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x1991, 0x3, 0x0);
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbe, 0x8, 0x0);
+	btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
+	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x1991, 0x3, 0x0);
+	btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbe, 0x8, 0x0);
 
 	if (!rfe_type->ext_ant_switch_exist)
 		return;
@@ -2037,7 +2429,10 @@ void halbtc8822b1ant_set_ext_ant_switch(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_ext_ant_switch_status = coex_dm->cur_ext_ant_switch_status;
 
 	/* swap control polarity if use different switch control polarity*/
-	/*  Normal switch polarity for SPDT, 0xcbd[1:0] = 2b'01 => Ant to BTG,  0xcbd[1:0] = 2b'10 => Ant to WLG */
+	/* Normal switch polarity for SPDT,
+	 * 0xcbd[1:0] = 2b'01 => Ant to BTG,
+	 * 0xcbd[1:0] = 2b'10 => Ant to WLG
+	 */
 	switch_polatiry_inverse = (rfe_type->ext_ant_switch_ctrl_polarity == 1 ?
 			   ~switch_polatiry_inverse : switch_polatiry_inverse);
 
@@ -2060,79 +2455,96 @@ void halbtc8822b1ant_set_ext_ant_switch(IN struct btc_coexist *btcoexist,
 		switch (ctrl_type) {
 		default:
 		case BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_BBSW:
+			/*  0x4c[23] = 0 */
 			btcoexist->btc_write_1byte_bitmask(
 				btcoexist, 0x4e, 0x80,
-				0x0);  /*  0x4c[23] = 0 */
+				0x0);
+			/* 0x4c[24] = 1 */
 			btcoexist->btc_write_1byte_bitmask(
 				btcoexist, 0x4f, 0x01,
-				0x1);  /* 0x4c[24] = 1 */
+				0x1);
+			/* BB SW, DPDT use RFE_ctrl8 and RFE_ctrl9 as ctrl pin*/
 			btcoexist->btc_write_1byte_bitmask(
 				btcoexist, 0xcb4, 0xff,
-				0x77);	/* BB SW, DPDT use RFE_ctrl8 and RFE_ctrl9 as conctrol pin */
+				0x77);
 
-			regval_0xcbd = (switch_polatiry_inverse
-					== false ?  0x1 :
-				0x2);    /* 0xcbd[1:0] = 2b'01 for no switch_polatiry_inverse, ANTSWB =1, ANTSW =0  */
+			/* 0xcbd[1:0] = 2b'01 for no switch_polatiry_inverse,
+			 * ANTSWB =1, ANTSW =0
+			 */
+			regval_0xcbd = (!switch_polatiry_inverse ?  0x1 : 0x2);
 			btcoexist->btc_write_1byte_bitmask(
 				btcoexist, 0xcbd, 0x3,
 				regval_0xcbd);
 
 			break;
 		case BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_PTA:
+			/* 0x4c[23] = 0 */
 			btcoexist->btc_write_1byte_bitmask(
 				btcoexist, 0x4e, 0x80,
-				0x0);  /* 0x4c[23] = 0 */
+				0x0);
+			/* 0x4c[24] = 1 */
 			btcoexist->btc_write_1byte_bitmask(
 				btcoexist, 0x4f, 0x01,
-				0x1);  /* 0x4c[24] = 1 */
+				0x1);
+			/* PTA,  DPDT use RFE_ctrl8 and RFE_ctrl9 as ctrl pin */
 			btcoexist->btc_write_1byte_bitmask(
 				btcoexist, 0xcb4, 0xff,
-				0x66);	/* PTA,  DPDT use RFE_ctrl8 and RFE_ctrl9 as conctrol pin */
+				0x66);
 
-			regval_0xcbd = (switch_polatiry_inverse
-					== false ?  0x2 :
-				0x1);    /* 0xcbd[1:0] = 2b'10 for no switch_polatiry_inverse, ANTSWB =1, ANTSW =0  @ GNT_BT=1 */
+			/* 0xcbd[1:0] = 2b'10 for no switch_polatiry_inverse,
+			 * ANTSWB =1, ANTSW =0  @ GNT_BT=1
+			 */
+			regval_0xcbd = (!switch_polatiry_inverse ?  0x2 : 0x1);
 			btcoexist->btc_write_1byte_bitmask(
 				btcoexist, 0xcbd, 0x3,
 				regval_0xcbd);
 
 			break;
-		case BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV
-				:
+		case BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV:
+			/* 0x4c[23] = 0 */
 			btcoexist->btc_write_1byte_bitmask(
 				btcoexist, 0x4e, 0x80,
-				0x0);  /* 0x4c[23] = 0 */
+				0x0);
+			/* 0x4c[24] = 1 */
 			btcoexist->btc_write_1byte_bitmask(
 				btcoexist, 0x4f, 0x01,
-				0x1);  /* 0x4c[24] = 1 */
+				0x1);
 			btcoexist->btc_write_1byte_bitmask(
 				btcoexist, 0xcb4, 0xff,
-				0x88);  /* */
+				0x88);
 
-			/* no regval_0xcbd setup required, because  antenna switch control value by antenna diversity */
+			/* no regval_0xcbd setup required, because
+			 * antenna switch control value by antenna diversity
+			 */
 
 			break;
 		case BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_MAC:
+			/*  0x4c[23] = 1 */
 			btcoexist->btc_write_1byte_bitmask(
 				btcoexist, 0x4e, 0x80,
-				0x1);  /*  0x4c[23] = 1 */
+				0x1);
 
-			regval_0x64 = (switch_polatiry_inverse
-				       == false ?  0x0 :
-				0x1);    /* 0x64[0] = 1b'0 for no switch_polatiry_inverse, DPDT_SEL_N =1, DPDT_SEL_P =0 */
+			/* 0x64[0] = 1b'0 for no switch_polatiry_inverse,
+			 * DPDT_SEL_N =1, DPDT_SEL_P =0
+			 */
+			regval_0x64 = (!switch_polatiry_inverse ?  0x0 : 0x1);
 			btcoexist->btc_write_1byte_bitmask(
 				btcoexist, 0x64, 0x1,
 				regval_0x64);
 			break;
 		case BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_BT:
+			/* 0x4c[23] = 0 */
 			btcoexist->btc_write_1byte_bitmask(
 				btcoexist, 0x4e, 0x80,
-				0x0);  /* 0x4c[23] = 0 */
+				0x0);
+			/* 0x4c[24] = 0 */
 			btcoexist->btc_write_1byte_bitmask(
 				btcoexist, 0x4f, 0x01,
-				0x0);  /* 0x4c[24] = 0 */
+				0x0);
 
-			/* no  setup required, because  antenna switch control value by BT vendor 0xac[1:0] */
+			/* no setup required, because antenna switch control
+			 * value by BT vendor 0xac[1:0]
+			 */
 			break;
 		}
 	}
@@ -2149,20 +2561,44 @@ void halbtc8822b1ant_set_ext_ant_switch(IN struct btc_coexist *btcoexist,
 
 }
 
-/*set gnt_wl gnt_bt control by sw high low , or hwpta while in power on,ini,wlan off,wlan only ,wl2g non-currrent ,wl2g current,wl5g*/
+/* set gnt_wl gnt_bt control by sw high low, or
+ * hwpta while in power on, ini, wlan off, wlan only, wl2g non-currrent,
+ * wl2g current, wl5g
+ */
 
+
+static
 void halbtc8822b1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 				  IN u8 ant_pos_type, IN boolean force_exec,
 				  IN u8 phase)
 
 {
-	struct  btc_board_info *board_info = &btcoexist->board_info;
+#if BT_8822B_1ANT_COEX_DBG
 	u8			u8tmp = 0;
-	u32			u32tmp1 = 0, u32tmp2 = 0, u32tmp3 = 0;
+#endif
+	u32			u32tmp1 = 0;
+#if BT_8822B_1ANT_COEX_DBG
+	u32			u32tmp2 = 0, u32tmp3 = 0;
+#endif
+
+	u32tmp1 = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist,
+			0x38);
+
+	/* To avoid indirect access fail  */
+	if (((u32tmp1 & 0xf000) >> 12) != ((u32tmp1 & 0x0f00) >> 8)) {
+		force_exec = TRUE;
+		coex_sta->gnt_error_cnt++;
+
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		"[BTCoex],(Before Ant Setup) 0x38= 0x%x\n",
+		    u32tmp1);
+		BTC_TRACE(trace_buf);
+	}
+
 	/* Ext switch buffer mux */
-		btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x1991, 0x3, 0x0);
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbe, 0x8, 0x0);
+	btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
+	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x1991, 0x3, 0x0);
+	btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbe, 0x8, 0x0);
 
 	coex_dm->cur_ant_pos_type = (ant_pos_type << 8)  + phase;
 
@@ -2174,7 +2610,7 @@ void halbtc8822b1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 
 	coex_dm->pre_ant_pos_type = coex_dm->cur_ant_pos_type;
 
-#if 1
+#if BT_8822B_1ANT_COEX_DBG
 	u32tmp1 = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist,
 			0x38);
 	u32tmp2 = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist,
@@ -2195,15 +2631,21 @@ void halbtc8822b1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 			"[BTCoex], ********** (set_ant_path - 1ANT_PHASE_COEX_INIT) **********\n");
 		BTC_TRACE(trace_buf);
 
-		/* Disable LTE Coex Function in WiFi side (this should be on if LTE coex is required) */
+		/* Disable LTE Coex Function in WiFi side
+		 * (this should be on if LTE coex is required)
+		 */
 		halbtc8822b1ant_ltecoex_enable(btcoexist, 0x0);
 
-		/* GNT_WL_LTE always = 1 (this should be config if LTE coex is required) */
+		/* GNT_WL_LTE always = 1
+		 * (this should be config if LTE coex is required)
+		 */
 		halbtc8822b1ant_ltecoex_set_coex_table(btcoexist,
 					       BT_8822B_1ANT_CTT_WL_VS_LTE,
 						       0xffff);
 
-		/* GNT_BT_LTE always = 1 (this should be config if LTE coex is required) */
+		/* GNT_BT_LTE always = 1
+		 * (this should be config if LTE coex is required)
+		 */
 		halbtc8822b1ant_ltecoex_set_coex_table(btcoexist,
 					       BT_8822B_1ANT_CTT_BT_VS_LTE,
 						       0xffff);
@@ -2224,7 +2666,7 @@ void halbtc8822b1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		halbtc8822b1ant_ltecoex_pathcontrol_owner(btcoexist,
 				BT_8822B_1ANT_PCO_WLSIDE);
 
-		coex_sta->run_time_state = false;
+		coex_sta->run_time_state = FALSE;
 
 		/* Ext switch buffer mux */
 		btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
@@ -2242,15 +2684,21 @@ void halbtc8822b1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 			"[BTCoex], ********** (set_ant_path - 1ANT_PHASE_WLANONLY_INIT) **********\n");
 		BTC_TRACE(trace_buf);
 
-		/* Disable LTE Coex Function in WiFi side (this should be on if LTE coex is required) */
+		/* Disable LTE Coex Function in WiFi side
+		 * (this should be on if LTE coex is required)
+		 */
 		halbtc8822b1ant_ltecoex_enable(btcoexist, 0x0);
 
-		/* GNT_WL_LTE always = 1 (this should be config if LTE coex is required) */
+		/* GNT_WL_LTE always = 1
+		 * (this should be config if LTE coex is required)
+		 */
 		halbtc8822b1ant_ltecoex_set_coex_table(btcoexist,
 					       BT_8822B_1ANT_CTT_WL_VS_LTE,
 						       0xffff);
 
-		/* GNT_BT_LTE always = 1 (this should be config if LTE coex is required) */
+		/* GNT_BT_LTE always = 1
+		 * (this should be config if LTE coex is required)
+		 */
 		halbtc8822b1ant_ltecoex_set_coex_table(btcoexist,
 					       BT_8822B_1ANT_CTT_BT_VS_LTE,
 						       0xffff);
@@ -2271,7 +2719,7 @@ void halbtc8822b1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		halbtc8822b1ant_ltecoex_pathcontrol_owner(btcoexist,
 				BT_8822B_1ANT_PCO_WLSIDE);
 
-		coex_sta->run_time_state = false;
+		coex_sta->run_time_state = FALSE;
 
 		/* Ext switch buffer mux */
 		btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
@@ -2302,7 +2750,7 @@ void halbtc8822b1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 				   BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_BT,
 				   BT_8822B_1ANT_EXT_ANT_SWITCH_TO_NOCARE);
 
-		coex_sta->run_time_state = false;
+		coex_sta->run_time_state = FALSE;
 
 		break;
 	case BT_8822B_1ANT_PHASE_2G_RUNTIME:
@@ -2326,7 +2774,7 @@ void halbtc8822b1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		halbtc8822b1ant_ltecoex_pathcontrol_owner(btcoexist,
 				BT_8822B_1ANT_PCO_WLSIDE);
 
-		coex_sta->run_time_state = true;
+		coex_sta->run_time_state = TRUE;
 
 		if (BTC_ANT_PATH_AUTO == ant_pos_type)
 			ant_pos_type = BTC_ANT_PATH_PTA;
@@ -2353,7 +2801,7 @@ void halbtc8822b1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		halbtc8822b1ant_ltecoex_pathcontrol_owner(btcoexist,
 				BT_8822B_1ANT_PCO_WLSIDE);
 
-		coex_sta->run_time_state = true;
+		coex_sta->run_time_state = TRUE;
 
 		if (BTC_ANT_PATH_AUTO == ant_pos_type)
 			ant_pos_type =
@@ -2384,7 +2832,7 @@ void halbtc8822b1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		halbtc8822b1ant_ltecoex_pathcontrol_owner(btcoexist,
 				BT_8822B_1ANT_PCO_WLSIDE);
 
-		coex_sta->run_time_state = false;
+		coex_sta->run_time_state = FALSE;
 
 		/* Set Ext Ant Switch to BT side at BT MP mode */
 		if (BTC_ANT_PATH_AUTO == ant_pos_type)
@@ -2429,7 +2877,7 @@ void halbtc8822b1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		}
 
 	}
-#if 1
+#if BT_8822B_1ANT_COEX_DBG
 	u32tmp1 = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
 	u32tmp2 = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
 	u32tmp3 = btcoexist->btc_read_4byte(btcoexist, 0xcb4);
@@ -2446,42 +2894,182 @@ void halbtc8822b1ant_set_ant_path(IN struct btc_coexist *btcoexist,
 }
 
 
-void halbtc8822b1ant_coex_all_off(IN struct btc_coexist *btcoexist)
+
+static
+void halbtc8822b1ant_set_rx_gain(IN struct btc_coexist *btcoexist,
+				   IN boolean agc_table_en)
 {
-	/* sw all off */
-	halbtc8822b1ant_sw_mechanism(btcoexist, false);
+	u8		rssi_adjust_val = 0;
 
-	/* hw all off */
-	halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+	/* =================BB AGC Gain Table */
+	if (agc_table_en) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], BB Agc Table On!\n");
+		BTC_TRACE(trace_buf);
+
+
+
+		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+		halbtc8822b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
+					     NORMAL_EXEC,
+				     BT_8822B_2ANT_PHASE_2G_RUNTIME);
+
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
+		btcoexist->btc_write_1byte(btcoexist, 0xc5b, 0xc8);
+		btcoexist->btc_write_1byte(btcoexist, 0xe5b, 0xc8);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xff000003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xae2e0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xad300003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xac320003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xab360003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x8d380003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x8c3a0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x8b3c0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x8a3e0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x6e400003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x6d420003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x6c440003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x6b460003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x6a480003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x694a0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x684c0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x674e0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x66500003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x65520003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x64540003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x64560003);
+
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x007e0403);
+
+	} else {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], BB Agc Table Off!\n");
+		BTC_TRACE(trace_buf);
+
+
+		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
+		btcoexist->btc_write_1byte(btcoexist, 0xc5b, 0xd8);
+		btcoexist->btc_write_1byte(btcoexist, 0xe5b, 0xd8);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xff000003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xe62e0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xe5300003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xc8320003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xc6360003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xc5380003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xc43a0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xc33c0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xc23e0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xc1400003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xc0420003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xa5440003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xa4460003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xa3480003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xa24a0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xa14c0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x834e0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x82500003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x81520003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x80540003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x65560003);
+
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x007e0403);
+	}
+
+
+}
+
+
+static
+void halbtc8822b1ant_rx_gain(IN struct btc_coexist *btcoexist,
+			       IN boolean force_exec, IN boolean agc_table_en)
+{
+	coex_dm->cur_agc_table_en = agc_table_en;
+
+	if (!force_exec) {
+		if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
+			return;
+	}
+	halbtc8822b1ant_set_rx_gain(btcoexist, agc_table_en);
+
+	coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
+}
+
+
+static
+void halbtc8822b1ant_action_bt_idle(IN struct btc_coexist *btcoexist)
+{
+
+	boolean			wifi_busy = FALSE;
+
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		"[BTCoex], ********** (bt idle) **********\n");
+		BTC_TRACE(trace_buf);
+
+	if (!wifi_busy) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		"[BTCoex], ********** (bt idle wl not busy) **********\n");
+		BTC_TRACE(trace_buf);
+		halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, FALSE);
+
+		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
+	} else {  /* if wl busy */
+		halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+
+		if (BT_8822B_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
+		    coex_dm->bt_status) {
+
+			halbtc8822b1ant_coex_table_with_type(btcoexist,
+				     NORMAL_EXEC, 0);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE,
+				8);
+		} else {
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], ********** else(bt non connect idle wl not busy) **********\n");
+			BTC_TRACE(trace_buf);
+			halbtc8822b1ant_coex_table_with_type(btcoexist,
+			     NORMAL_EXEC, 1);
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 12);
+		}
+	}
+
+#if 0
+	/*halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);*/
+#endif
 }
+
+
+static
 boolean halbtc8822b1ant_is_common_action(IN struct btc_coexist *btcoexist)
 {
-	boolean			common = false, wifi_connected = false, wifi_busy = false;
+	boolean			common = FALSE, wifi_connected = FALSE, wifi_busy = FALSE;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
 			   &wifi_connected);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
 	if (!wifi_connected &&
-	    BT_8822B_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
-	    coex_dm->bt_status) {
+	    coex_dm->bt_status == BT_8822B_1ANT_BT_STATUS_NON_CONNECTED_IDLE) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n");
 		BTC_TRACE(trace_buf);
 
-		/* halbtc8822b1ant_sw_mechanism(btcoexist, false); */
+		/* halbtc8822b1ant_sw_mechanism(btcoexist, FALSE); */
 
-		common = true;
+		common = TRUE;
 	} else if (wifi_connected &&
-		   (BT_8822B_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
-		    coex_dm->bt_status)) {
+		   (coex_dm->bt_status ==
+		    BT_8822B_1ANT_BT_STATUS_NON_CONNECTED_IDLE)) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], Wifi connected + BT non connected-idle!!\n");
 		BTC_TRACE(trace_buf);
 
-		/* halbtc8822b1ant_sw_mechanism(btcoexist, false); */
+		/* halbtc8822b1ant_sw_mechanism(btcoexist, FALSE); */
 
-		common = true;
+		common = TRUE;
 	} else if (!wifi_connected &&
 		   (BT_8822B_1ANT_BT_STATUS_CONNECTED_IDLE ==
 		    coex_dm->bt_status)) {
@@ -2489,9 +3077,9 @@ boolean halbtc8822b1ant_is_common_action(IN struct btc_coexist *btcoexist)
 			"[BTCoex], Wifi non connected-idle + BT connected-idle!!\n");
 		BTC_TRACE(trace_buf);
 
-		/* halbtc8822b1ant_sw_mechanism(btcoexist, false); */
+		/* halbtc8822b1ant_sw_mechanism(btcoexist, FALSE); */
 
-		common = true;
+		common = TRUE;
 	} else if (wifi_connected &&
 		   (BT_8822B_1ANT_BT_STATUS_CONNECTED_IDLE ==
 		    coex_dm->bt_status)) {
@@ -2499,9 +3087,9 @@ boolean halbtc8822b1ant_is_common_action(IN struct btc_coexist *btcoexist)
 			    "[BTCoex], Wifi connected + BT connected-idle!!\n");
 		BTC_TRACE(trace_buf);
 
-		/* halbtc8822b1ant_sw_mechanism(btcoexist, false); */
+		/* halbtc8822b1ant_sw_mechanism(btcoexist, FALSE); */
 
-		common = true;
+		common = TRUE;
 	} else if (!wifi_connected &&
 		   (BT_8822B_1ANT_BT_STATUS_CONNECTED_IDLE !=
 		    coex_dm->bt_status)) {
@@ -2509,9 +3097,9 @@ boolean halbtc8822b1ant_is_common_action(IN struct btc_coexist *btcoexist)
 			    "[BTCoex], Wifi non connected-idle + BT Busy!!\n");
 		BTC_TRACE(trace_buf);
 
-		/* halbtc8822b1ant_sw_mechanism(btcoexist, false); */
+		/* halbtc8822b1ant_sw_mechanism(btcoexist, FALSE); */
 
-		common = true;
+		common = TRUE;
 	} else {
 		if (wifi_busy) {
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -2523,39 +3111,47 @@ boolean halbtc8822b1ant_is_common_action(IN struct btc_coexist *btcoexist)
 			BTC_TRACE(trace_buf);
 		}
 
-		common = false;
+		common = FALSE;
 	}
 
 	return common;
 }
 
+
+static
 void halbtc8822b1ant_action_wifi_under5g(IN struct btc_coexist *btcoexist)
 {
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], under 5g start\n");
 	BTC_TRACE(trace_buf);
 	/* for test : s3 bt disappear , fail rate 1/600*/
-/*
-	halbtc8822b1ant_ignore_wlan_act(btcoexist, NORMAL_EXEC, true);
-*/
-/*set sw gnt wl bt  high*/
+#if 0
+	halbtc8822b1ant_ignore_wlan_act(btcoexist, NORMAL_EXEC, TRUE);
+#endif
+	/*set sw gnt wl bt  high*/
+	btcoexist->btc_write_1byte_bitmask(
+			btcoexist, 0xcbd, 0x3, 1);
+	halbtc8822b1ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
+	halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
 	halbtc8822b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
-							 BT_8822B_1ANT_PHASE_5G_RUNTIME);
-
-	halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-	halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-/*
+					BT_8822B_1ANT_PHASE_5G_RUNTIME);
+	halbtc8822b1ant_coex_table_with_type(btcoexist,
+					NORMAL_EXEC, 8);
+	halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
+#if 0
 	halbtc8822b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
 
-	halbtc8822b1ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 5);
-*/
+	halbtc8822b1ant_limited_rx(btcoexist, NORMAL_EXEC, FALSE, FALSE, 5);
+#endif
 }
 
 
 
+
+static
 void halbtc8822b1ant_action_wifi_only(IN struct btc_coexist *btcoexist)
 {
-	boolean wifi_under_5g = false;
+	boolean wifi_under_5g = FALSE, rf4ce_enabled = FALSE;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
 	if (wifi_under_5g) {
@@ -2567,8 +3163,20 @@ void halbtc8822b1ant_action_wifi_only(IN struct btc_coexist *btcoexist)
 		return;
 	}
 
+	if (rf4ce_enabled) {
+		btcoexist->btc_write_1byte_bitmask(
+			btcoexist, 0x45e, 0x8, 0x1);
+
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+					TRUE,
+					50);
+
+		halbtc8822b1ant_coex_table_with_type(btcoexist,
+		NORMAL_EXEC, 1);
+		return;
+	}
 	halbtc8822b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
-	halbtc8822b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
+	halbtc8822b1ant_ps_tdma(btcoexist, FORCE_EXEC, FALSE, 8);
 
 	halbtc8822b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
 				     BT_8822B_1ANT_PHASE_2G_RUNTIME);
@@ -2579,84 +3187,30 @@ void halbtc8822b1ant_action_wifi_only(IN struct btc_coexist *btcoexist)
 
 }
 
-/* *********************************************
- *
- *	Software Coex Mechanism start
- *
- * ********************************************* */
-
-/* SCO only or SCO+PAN(HS) */
-
-/*
-void halbtc8822b1ant_action_sco(IN struct btc_coexist* btcoexist)
-{
-	halbtc8822b1ant_sw_mechanism(btcoexist, true);
-}
-
-
-void halbtc8822b1ant_action_hid(IN struct btc_coexist* btcoexist)
-{
-	halbtc8822b1ant_sw_mechanism(btcoexist, true);
-}
-
-
-void halbtc8822b1ant_action_a2dp(IN struct btc_coexist* btcoexist)
-{
-	halbtc8822b1ant_sw_mechanism(btcoexist, false);
-}
-
-void halbtc8822b1ant_action_a2dp_pan_hs(IN struct btc_coexist* btcoexist)
-{
-	halbtc8822b1ant_sw_mechanism(btcoexist, false);
-}
-
-void halbtc8822b1ant_action_pan_edr(IN struct btc_coexist* btcoexist)
-{
-	halbtc8822b1ant_sw_mechanism(btcoexist, false);
-}
-
-
-void halbtc8822b1ant_action_pan_hs(IN struct btc_coexist* btcoexist)
-{
-	halbtc8822b1ant_sw_mechanism(btcoexist, false);
-}
-
-
-void halbtc8822b1ant_action_pan_edr_a2dp(IN struct btc_coexist* btcoexist)
-{
-	halbtc8822b1ant_sw_mechanism(btcoexist, false);
-}
-
-void halbtc8822b1ant_action_pan_edr_hid(IN struct btc_coexist* btcoexist)
-{
-	halbtc8822b1ant_sw_mechanism(btcoexist, true);
-}
-
-
-void halbtc8822b1ant_action_hid_a2dp_pan_edr(IN struct btc_coexist* btcoexist)
+static
+void halbtc8822b1ant_action_wifi_native_lps(IN struct btc_coexist *btcoexist)
 {
-	halbtc8822b1ant_sw_mechanism(btcoexist, true);
-}
+	halbtc8822b1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 5);
 
-void halbtc8822b1ant_action_hid_a2dp(IN struct btc_coexist* btcoexist)
-{
-	halbtc8822b1ant_sw_mechanism(btcoexist, true);
+	halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
 }
 
-*/
 
 /* *********************************************
  *
  *	Non-Software Coex Mechanism start
  *
  * ********************************************* */
+
+static
 void halbtc8822b1ant_action_bt_whck_test(IN struct btc_coexist *btcoexist)
 {
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex],action_bt_whck_test\n");
 	BTC_TRACE(trace_buf);
 
-	halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
+	halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
 
 	halbtc8822b1ant_set_ant_path(btcoexist,
 				     BTC_ANT_PATH_AUTO,
@@ -2666,48 +3220,117 @@ void halbtc8822b1ant_action_bt_whck_test(IN struct btc_coexist *btcoexist)
 	halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 }
 
+static
 void halbtc8822b1ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
 {
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex],action_wifi_multi_port\n");
 	BTC_TRACE(trace_buf);
 
-	halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-
-	halbtc8822b1ant_set_ant_path(btcoexist,
+	/*halbtc8822b1ant_set_ant_path(btcoexist,
 				     BTC_ANT_PATH_AUTO,
 				     NORMAL_EXEC,
 				     BT_8822B_1ANT_PHASE_2G_RUNTIME);
+	halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+	halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+	halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);*/
+	btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbd, 0x3, 1);
+	halbtc8822b1ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
+	halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+	halbtc8822b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
+			BT_8822B_1ANT_PHASE_5G_RUNTIME);
+	halbtc8822b1ant_coex_table_with_type(btcoexist,
+			NORMAL_EXEC, 8);
+	halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
+
+
 
-	halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
 }
 
+
+static
 void halbtc8822b1ant_action_hs(IN struct btc_coexist *btcoexist)
 {
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], action_hs\n");
 	BTC_TRACE(trace_buf);
-
-	halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
-
 	halbtc8822b1ant_set_ant_path(btcoexist,
 				     BTC_ANT_PATH_AUTO,
 				     NORMAL_EXEC,
 				     BT_8822B_1ANT_PHASE_2G_RUNTIME);
-
 	halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
+	halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 5);
+
+
 }
 
+static
+void halbtc8822b1ant_action_bt_relink(IN struct btc_coexist *btcoexist)
+{
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+	"[BTCoex], run bt multi link function\n");
+	BTC_TRACE(trace_buf);
+
+	if (coex_sta->is_bt_multi_link)
+		return;
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+	"[BTCoex], run bt_re-link function\n");
+	BTC_TRACE(trace_buf);
+	halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+	halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
+
+}
+
+#if 0
+static
+void halbtc8822b1ant_action_bt_idle(IN struct btc_coexist *btcoexist)
+{
+	boolean wifi_busy = FALSE;
+
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+
+	if (!wifi_busy) {
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+					6);
+		halbtc8822b1ant_coex_table_with_type(btcoexist,
+						     NORMAL_EXEC, 3);
+
+	} else {  /* if wl busy */
+
+		if (BT_8822B_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
+		    coex_dm->bt_status) {
+
+			halbtc8822b1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 8);
+
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						33);
+		} else {
+
+			halbtc8822b1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 8);
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						32);
+
+		}
+
+	}
+
+}
+#endif
+
 /*"""bt inquiry"""" + wifi any + bt any*/
+
+static
 void halbtc8822b1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
 {
 
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean			wifi_connected = false, ap_enable = false, wifi_busy = false,
-				bt_busy = false;
+	boolean			wifi_connected = FALSE, ap_enable = FALSE, wifi_busy = FALSE,
+				bt_busy = FALSE, rf4ce_enabled = FALSE;
 
 
-	boolean		wifi_scan = false, link = false, roam = false;
+	boolean		wifi_scan = FALSE, link = FALSE, roam = FALSE;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], ********** (bt inquiry) **********\n");
@@ -2718,330 +3341,426 @@ void halbtc8822b1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
 			   &wifi_connected);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 	btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
-
-
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
-
-
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		"[BTCoex], ********** scan = %d,  link =%d, roam = %d**********\n",
 		    wifi_scan, link, roam);
 	BTC_TRACE(trace_buf);
 
+	halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+
 	if ((link) || (roam) || (coex_sta->wifi_is_high_pri_task)) {
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], ********** (bt inquiry wifi  connect or scan ) **********\n");
 		BTC_TRACE(trace_buf);
-
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
-
 		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 1);
 
 	} else if ((wifi_scan) && (coex_sta->bt_create_connection)) {
-
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
 		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 22);
 
 	} else if ((!wifi_connected) && (!wifi_scan)) {
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], ********** (bt inquiry wifi non connect) **********\n");
 		BTC_TRACE(trace_buf);
-
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-
 		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
 
 	} else if ((bt_link_info->a2dp_exist) && (bt_link_info->pan_exist)) {
-
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
 		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
-	} else if (bt_link_info->a2dp_exist) {
-
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 22);
 
+	} else if (bt_link_info->a2dp_exist) {
 		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 32);
+
 	} else if (wifi_scan) {
+		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 20);
 
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
 
-		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 	} else if (wifi_busy) {
 
 		/* for BT inquiry/page fail after S4 resume */
-		/* halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);		 */
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
-
+#if 0
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 20);
+#endif
 		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-						     6);
+		     15);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 32);
+		/*aaaa->55aa for bt connect while wl busy*/
+
+		if (rf4ce_enabled) {
+			btcoexist->btc_write_1byte_bitmask(
+				btcoexist, 0x45e, 0x8, 0x1);
+			halbtc8822b1ant_coex_table_with_type(btcoexist,
+						NORMAL_EXEC, 0);
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+						TRUE,
+				50);
+		}
 	} else {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], ********** (bt inquiry wifi connect) **********\n");
 		BTC_TRACE(trace_buf);
-
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
-
 		halbtc8822b1ant_set_ant_path(btcoexist,
-					     BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-					     BT_8822B_1ANT_PHASE_2G_RUNTIME);
+						     BTC_ANT_PATH_AUTO,
+						     NORMAL_EXEC,
+						     BT_8822B_1ANT_PHASE_2G_RUNTIME);
 
 		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-						     4);
+							 4);
+
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 22);
+
 	}
 
-	/*
-		if ((wifi_link) || (wifi_roam) || (coex_sta->wifi_is_high_pri_task)) {
+#if 0
+	if ((wifi_link) || (wifi_roam) || (coex_sta->wifi_is_high_pri_task)) {
 
-			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33);
-			halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 33);
+		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6);
 
-		} else if ((wifi_scan) && (coex_sta->bt_create_connection)) {
+	} else if ((wifi_scan) && (coex_sta->bt_create_connection)) {
 
-			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
-			halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 22);
+		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6);
 
-		} else if ((!wifi_connected) && (!wifi_scan)) {
+	} else if ((!wifi_connected) && (!wifi_scan)) {
 
-			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
 
-			halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-		} else if ((bt_link_info->a2dp_exist) && (bt_link_info->pan_exist)) {
+		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+	} else if ((bt_link_info->a2dp_exist) && (bt_link_info->pan_exist)) {
 
-			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
-			halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 22);
+		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 
-		} else if (bt_link_info->a2dp_exist) {
+	} else if (bt_link_info->a2dp_exist) {
 
-			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 32);
 
-			halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
-		} else if (wifi_scan) {
+		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+	} else if (wifi_scan) {
 
-			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 20);
 
-			halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 
-		} else if (wifi_busy) {
-			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 21);
+	} else if (wifi_busy) {
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 21);
 
-			halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
-		} else {
-			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 19);
+		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+	} else {
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 19);
 
-			halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
-		}
-	*/
+		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+	}
+#endif
 }
 
+static
 void halbtc8822b1ant_action_bt_sco_hid_only_busy(IN struct btc_coexist
-		*btcoexist, IN u8 wifi_status)
+		*btcoexist)
 {
-
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+	boolean	wifi_connected = FALSE, wifi_busy = FALSE;
+	u32  wifi_bw = 1;
 
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x45e, 0x8, 0x1);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
+			   &wifi_connected);
 
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "[BTCoex], ********** (bt sco hid only busy) **********\n");
-	BTC_TRACE(trace_buf);
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
+			   &wifi_bw);
 
-	/*SCO  + wifi connected idle or busy / 0x778=1@wifi slot*/
-	if (bt_link_info->sco_exist) {
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x45e, 0x8, 0x1);
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
-		/*case16 for connect SCO first then connect a2sp fail issue*/
-		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 16);
+	halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
 
-	} else { /* HID  + wifi connected idle or busy / 0x778=1@wifi slot */
 
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x45e, 0x8, 0x1);
+	if (bt_link_info->sco_exist) {
+		/*halbtc8822b1ant_coex_table_with_type(btcoexist,
+						     NORMAL_EXEC, 5);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+					TRUE, 5);*/
+		btcoexist->btc_write_1byte_bitmask(
+			btcoexist, 0xcbd, 0x3, 1);
+		halbtc8822b1ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
+		halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+		halbtc8822b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
+					BT_8822B_1ANT_PHASE_5G_RUNTIME);
+		halbtc8822b1ant_coex_table_with_type(btcoexist,
+					NORMAL_EXEC, 8);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
 
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
-		/*case16 for connect HID first then connect a2sp fail issue*/
-		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 16);
+	} else {
 
+		if (coex_sta->is_hid_low_pri_tx_overhead) {
+			halbtc8822b1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 6);
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						18);
+		} else if (wifi_bw == 0) { /* if 11bg mode */
+
+			if (coex_sta->is_bt_multi_link) {
+				btcoexist->btc_write_1byte_bitmask(
+				btcoexist, 0xcbd, 0x3, 1);
+			halbtc8822b1ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
+			halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+			halbtc8822b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
+					BT_8822B_1ANT_PHASE_5G_RUNTIME);
+			halbtc8822b1ant_coex_table_with_type(btcoexist,
+					NORMAL_EXEC, 8);
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
+				/*halbtc8822b1ant_coex_table_with_type(btcoexist,
+								     NORMAL_EXEC, 11);
+				halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+							11);*/
+			} else {
+				btcoexist->btc_write_1byte_bitmask(
+			btcoexist, 0xcbd, 0x3, 1);
+			halbtc8822b1ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
+			halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+			halbtc8822b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
+					BT_8822B_1ANT_PHASE_5G_RUNTIME);
+			halbtc8822b1ant_coex_table_with_type(btcoexist,
+					NORMAL_EXEC, 8);
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
+				/*halbtc8822b1ant_coex_table_with_type(btcoexist,
+								     NORMAL_EXEC, 6);
+				halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+				11);*/
+			}
+		} else {
+			btcoexist->btc_write_1byte_bitmask(
+			btcoexist, 0xcbd, 0x3, 1);
+			halbtc8822b1ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
+			halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+			halbtc8822b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
+					BT_8822B_1ANT_PHASE_5G_RUNTIME);
+			halbtc8822b1ant_coex_table_with_type(btcoexist,
+					NORMAL_EXEC, 8);
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
+			/*halbtc8822b1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 6);
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+				11);*/
+		}
 	}
 }
 
-/*wifi connected + bt acl busy*/
+static
 void halbtc8822b1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist
-		*btcoexist, IN u8 wifi_status)
+		*btcoexist)
 {
-
-	u8		bt_rssi_state;
-	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean	wifi_busy = false, wifi_turbo = false;
+	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+	boolean			wifi_busy = FALSE, wifi_turbo = FALSE;
 	u32  wifi_bw = 1;
-
 	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
-				   &wifi_bw);
-btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+			   &wifi_bw);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
-				   &coex_sta->scan_ap_num);
-	bt_rssi_state = halbtc8822b1ant_bt_rssi_state(2, 28, 0);
-
+			   &coex_sta->scan_ap_num);
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-"[BTCoex], ********** (wifi connect acl busy) **********\n");
+		"############# [BTCoex],  scan_ap_num = %d, wl_noisy_level = %d\n",
+		    coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
 	BTC_TRACE(trace_buf);
 
+	halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
 
+	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
+		wifi_turbo = TRUE;
 
-	if (bt_link_info->hid_only) { /* HID  + wifi connected idle or busy / 0x778=1@wifi slot */
-
-
+	if ((coex_sta->bt_relink_downcount != 0)
+			&& (!bt_link_info->pan_exist) && (wifi_busy)) {
 
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"############# [BTCoex],  BT Re-Link + A2DP + WL busy\n");
+		BTC_TRACE(trace_buf);
 
+		/*halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
+		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);*/
 		btcoexist->btc_write_1byte_bitmask(
-			btcoexist, 0x45e, 0x8, 0x1);
-
-
-
-		halbtc8822b1ant_action_bt_sco_hid_only_busy(btcoexist,
-				wifi_status);
-		return;
-	} else if (
-		bt_link_info->a2dp_only) { /* A2DP  + wifi connected idle or busy */
-		if (BT_8822B_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifi_status) {
+				btcoexist, 0xcbd, 0x3, 1);
+		halbtc8822b1ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
+		halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+		halbtc8822b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
+					BT_8822B_1ANT_PHASE_5G_RUNTIME);
+		halbtc8822b1ant_coex_table_with_type(btcoexist,
+					NORMAL_EXEC, 8);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
 
+	} else if ((bt_link_info->a2dp_exist) && (coex_sta->is_bt_a2dp_sink)) {
+		/*halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						12);
+		halbtc8822b1ant_coex_table_with_type(btcoexist,
+		     NORMAL_EXEC, 6);*/
+		btcoexist->btc_write_1byte_bitmask(
+				btcoexist, 0xcbd, 0x3, 1);
+		halbtc8822b1ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
+		halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+		halbtc8822b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
+					BT_8822B_1ANT_PHASE_5G_RUNTIME);
+		halbtc8822b1ant_coex_table_with_type(btcoexist,
+					NORMAL_EXEC, 8);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
+	} else if (bt_link_info->a2dp_only) { /* A2DP */
 
-			btcoexist->btc_write_1byte_bitmask(btcoexist, 0x45e,
-							   0x8, 0x1);
+		/*halbtc8822b1ant_ps_tdma(btcoexist,
+				NORMAL_EXEC, TRUE, 7);
 
-			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						32);
+		if (wifi_turbo)
 			halbtc8822b1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 0);
-		} else {
-			if (coex_sta->scan_ap_num >=
-			    BT_8822B_1ANT_WIFI_NOISY_THRESH)  {
-				halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true,
-							17);
-			}	else {
-
-
-
-
-				btcoexist->btc_write_1byte_bitmask(
-					btcoexist, 0x45e, 0x8, 0x1);
+			NORMAL_EXEC, 19);
+		else
+			halbtc8822b1ant_coex_table_with_type(btcoexist,
+			 NORMAL_EXEC, 4);*/
+		btcoexist->btc_write_1byte_bitmask(
+				btcoexist, 0xcbd, 0x3, 1);
+		halbtc8822b1ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
+		halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+		halbtc8822b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
+					BT_8822B_1ANT_PHASE_5G_RUNTIME);
+		halbtc8822b1ant_coex_table_with_type(btcoexist,
+					NORMAL_EXEC, 8);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
+	} else if (((bt_link_info->a2dp_exist) &&
+		    (bt_link_info->pan_exist)) ||
+		   (bt_link_info->hid_exist && bt_link_info->a2dp_exist &&
+		bt_link_info->pan_exist)) {
+		/* A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) */
 
-				halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true,
-							42);
+		if (wifi_busy)
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+					TRUE, 13);
+		else
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+					14);
 
-				halbtc8822b1ant_coex_table_with_type(btcoexist,
-				NORMAL_EXEC, 1);
-		}
-/*
+		if (bt_link_info->hid_exist)
 			halbtc8822b1ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 1);
-*/
-			coex_dm->auto_tdma_adjust = true;
-		}
-
-		/* A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) */
-	} else if (((bt_link_info->a2dp_exist) && (bt_link_info->pan_exist)) ||
-		   (bt_link_info->hid_exist && bt_link_info->a2dp_exist &&
-		bt_link_info->pan_exist)) { /* A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) */
-
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x45e, 0x8, 0x1);
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 47);
-		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-						     6);
+		else if (wifi_turbo)
+			halbtc8822b1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 19);
+		else
+			halbtc8822b1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 4);
 	} else if (bt_link_info->hid_exist &&
 		   bt_link_info->a2dp_exist) { /* HID+A2DP */
 
-		btcoexist->btc_write_1byte_bitmask(
-			btcoexist, 0x45e, 0x8, 0x1);
-		if (!wifi_busy) {
-/*a2dp glitch while wl idle , change the 0x6c0=5a5a5a5a->5555or aaaa55aa*/
-		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
-								true,
-								32);
-			} else if (wifi_bw == 0) { /* 11bg mode */
-			halbtc8822b1ant_coex_table_with_type(btcoexist,
-										 NORMAL_EXEC, 1);
-			  halbtc8822b1ant_set_wltoggle_coex_table(
-				btcoexist,
-				NORMAL_EXEC,
-				0x3, 0xaa,
-				0x5a, 0xaa,
-				0xaa);
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
-								true,
-								49);
+		if (wifi_bw == 0) {/* if 11bg mode */
+			/*halbtc8822b1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 21);*/
+			/*halbtc8822b1ant_set_wltoggle_coex_table(btcoexist,
+				NORMAL_EXEC, 1, 0x55, 0x55, 0x5a, 0x5a);*/
+			/*halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+						TRUE,
+						49);*/
+			btcoexist->btc_write_1byte_bitmask(
+				btcoexist, 0xcbd, 0x3, 1);
+		halbtc8822b1ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
+		halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+		halbtc8822b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
+					BT_8822B_1ANT_PHASE_5G_RUNTIME);
+		halbtc8822b1ant_coex_table_with_type(btcoexist,
+					NORMAL_EXEC, 8);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
 		} else {
-		/*if in open space , and ask wl tp , 0x60=6135031111,55555555,aaaa55aa*/
+			/*halbtc8822b1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 21);*/
+			/*halbtc8822b1ant_limited_rx(btcoexist, NORMAL_EXEC, FALSE,
+					   TRUE, 8);*/
+			/*halbtc8822b1ant_set_wltoggle_coex_table(btcoexist,
+				NORMAL_EXEC, 1, 0x55, 0x55, 0x5a, 0x5a);*/
+			/*halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+						TRUE,
+						49);*/
+		btcoexist->btc_write_1byte_bitmask(
+				btcoexist, 0xcbd, 0x3, 1);
+		halbtc8822b1ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
+		halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+		halbtc8822b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
+					BT_8822B_1ANT_PHASE_5G_RUNTIME);
 		halbtc8822b1ant_coex_table_with_type(btcoexist,
-										 NORMAL_EXEC, 1);
-		halbtc8822b1ant_set_wltoggle_coex_table(btcoexist, NORMAL_EXEC, 0x2, 0xaa, 0x5a, 0xaa, 0xaa);
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 49);
-}
-		/*
-				halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-								     1);
-		*/
-
-
+					NORMAL_EXEC, 8);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
+		}
+		/* PAN(OPP,FTP), HID+PAN(OPP,FTP) */
 
+	} else if ((bt_link_info->pan_only) || (bt_link_info->hid_exist && bt_link_info->pan_exist)) {
 
-	} else if ((bt_link_info->pan_only) || (bt_link_info->hid_exist &&
-		bt_link_info->pan_exist)) { /* PAN(OPP,FTP), HID+PAN(OPP,FTP)*/
-		/*
-		if (BT_8723D_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifi_status)
-			halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+		if (!wifi_busy)
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
 						4);
 		else
-		*/
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						3);
 
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x45e, 0x8, 0x1);
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 47);
-		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-						     1);
+		if (bt_link_info->hid_exist)
+			halbtc8822b1ant_coex_table_with_type(btcoexist,
+						     NORMAL_EXEC, 1);
+		else if (wifi_turbo)
+			halbtc8822b1ant_coex_table_with_type(btcoexist,
+						     NORMAL_EXEC, 19);
+		else
+			halbtc8822b1ant_coex_table_with_type(btcoexist,
+						     NORMAL_EXEC, 4);
 	} else {
 		/* BT no-profile busy (0x9) */
-
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x45e, 0x8, 0x1);
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33);
-		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-						     1);
+		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 33);
 	}
+
 }
 
+
 /*wifi not connected + bt action*/
+
+static
 void halbtc8822b1ant_action_wifi_not_connected(IN struct btc_coexist *btcoexist)
 {
+	boolean rf4ce_enabled = FALSE;
+
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], ********** (wifi not connect) **********\n");
 	BTC_TRACE(trace_buf);
 
 	/* tdma and coex table */
-	halbtc8822b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
-
+	if (rf4ce_enabled) {
+		btcoexist->btc_write_1byte_bitmask(
+			btcoexist, 0x45e, 0x8, 0x1);
+		halbtc8822b1ant_coex_table_with_type(btcoexist,
+				NORMAL_EXEC, 1);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+					TRUE,
+					50);
+		return;
+	}
 	halbtc8822b1ant_set_ant_path(btcoexist,
 				     BTC_ANT_PATH_AUTO,
 				     NORMAL_EXEC,
 				     BT_8822B_1ANT_PHASE_2G_RUNTIME);
-
 	halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+	halbtc8822b1ant_ps_tdma(btcoexist, FORCE_EXEC, FALSE, 8);
 }
 
 /*""""wl not connected scan"""" + bt action*/
+static
 void halbtc8822b1ant_action_wifi_not_connected_scan(IN struct btc_coexist
 		*btcoexist)
 {
 
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean wifi_connected = false, bt_hs_on = false;
+	boolean bt_hs_on = FALSE;
 	u32	wifi_link_status = 0;
 	u32	num_of_wifi_link = 0;
-	boolean	bt_ctrl_agg_buf_size = false;
+	boolean	bt_ctrl_agg_buf_size = FALSE;
 	u8	agg_buf_size = 5;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -3056,7 +3775,7 @@ void halbtc8822b1ant_action_wifi_not_connected_scan(IN struct btc_coexist
 
 	if (num_of_wifi_link >= 2) {
 		halbtc8822b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
-		halbtc8822b1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
+		halbtc8822b1ant_limited_rx(btcoexist, NORMAL_EXEC, FALSE,
 					   bt_ctrl_agg_buf_size, agg_buf_size);
 
 		if (coex_sta->c2h_bt_inquiry_page) {
@@ -3064,8 +3783,9 @@ void halbtc8822b1ant_action_wifi_not_connected_scan(IN struct btc_coexist
 				"############# [BTCoex],  BT Is Inquirying\n");
 			BTC_TRACE(trace_buf);
 			halbtc8822b1ant_action_bt_inquiry(btcoexist);
-		} else
+		} else {
 			halbtc8822b1ant_action_wifi_multi_port(btcoexist);
+		}
 		return;
 	}
 
@@ -3076,55 +3796,53 @@ void halbtc8822b1ant_action_wifi_not_connected_scan(IN struct btc_coexist
 		halbtc8822b1ant_action_hs(btcoexist);
 		return;
 	}
-
 	/* tdma and coex table */
 	if (BT_8822B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
 		if (bt_link_info->a2dp_exist) {
-			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						32);
 			halbtc8822b1ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 1);
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						32);
 		} else if (bt_link_info->a2dp_exist &&
 			   bt_link_info->pan_exist) {
-			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						22);
 			halbtc8822b1ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 1);
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						22);
 		} else {
-			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						20);
 			halbtc8822b1ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 1);
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						20);
 		}
 	} else if ((BT_8822B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
 		   (BT_8822B_1ANT_BT_STATUS_ACL_SCO_BUSY ==
 		    coex_dm->bt_status)) {
-		halbtc8822b1ant_action_bt_sco_hid_only_busy(btcoexist,
-				BT_8822B_1ANT_WIFI_STATUS_CONNECTED_SCAN);
+		halbtc8822b1ant_action_bt_sco_hid_only_busy(btcoexist);
 	} else {
-
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-
 		halbtc8822b1ant_set_ant_path(btcoexist,
-					     BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-					     BT_8822B_1ANT_PHASE_2G_RUNTIME);
+					BTC_ANT_PATH_AUTO,
+					NORMAL_EXEC,
+					BT_8822B_1ANT_PHASE_2G_RUNTIME);
 
 		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-						     5);
+								     5);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
 	}
 }
 
 /*""""wl not connected asso"""" + bt action*/
+
+static
 void halbtc8822b1ant_action_wifi_not_connected_asso_auth(
 	IN struct btc_coexist *btcoexist)
 {
 
 	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean wifi_connected = false, bt_hs_on = false;
+	boolean bt_hs_on = FALSE;
 	u32 wifi_link_status = 0;
 	u32 num_of_wifi_link = 0;
-	boolean bt_ctrl_agg_buf_size = false;
+	boolean bt_ctrl_agg_buf_size = FALSE;
 	u8	agg_buf_size = 5;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -3140,7 +3858,7 @@ void halbtc8822b1ant_action_wifi_not_connected_asso_auth(
 	if (num_of_wifi_link >= 2) {
 
 		halbtc8822b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
-		halbtc8822b1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
+		halbtc8822b1ant_limited_rx(btcoexist, NORMAL_EXEC, FALSE,
 					   bt_ctrl_agg_buf_size,
 					   agg_buf_size);
 
@@ -3149,9 +3867,10 @@ void halbtc8822b1ant_action_wifi_not_connected_asso_auth(
 				"############# [BTCoex],  BT Is Inquirying\n");
 			BTC_TRACE(trace_buf);
 			halbtc8822b1ant_action_bt_inquiry(btcoexist);
-		} else
+		} else {
 			halbtc8822b1ant_action_wifi_multi_port(
 				btcoexist);
+		}
 		return;
 	}
 
@@ -3167,35 +3886,37 @@ void halbtc8822b1ant_action_wifi_not_connected_asso_auth(
 	/* tdma and coex table */
 	if ((bt_link_info->sco_exist)  || (bt_link_info->hid_exist) ||
 	    (bt_link_info->a2dp_exist)) {
-
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
 		halbtc8822b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 4);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 32);
+
 	} else if (bt_link_info->pan_exist) {
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
 		halbtc8822b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 4);
-	} else {
-
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 20);
 
+	} else {
 		halbtc8822b1ant_set_ant_path(btcoexist,
-					     BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-					     BT_8822B_1ANT_PHASE_2G_RUNTIME);
-
+				BTC_ANT_PATH_AUTO,
+				NORMAL_EXEC,
+				BT_8822B_1ANT_PHASE_2G_RUNTIME);
 		halbtc8822b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 2);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
+
+
 	}
 }
 
 /*""""wl  connected scan"""" + bt action*/
+
+static
 void halbtc8822b1ant_action_wifi_connected_scan(IN struct btc_coexist
 		*btcoexist)
 {
 
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean wifi_connected = false, bt_hs_on = false;
+	boolean bt_hs_on = FALSE;
 	u32	wifi_link_status = 0;
 	u32	num_of_wifi_link = 0;
-	boolean	bt_ctrl_agg_buf_size = false;
+	boolean	bt_ctrl_agg_buf_size = FALSE;
 	u8	agg_buf_size = 5;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -3210,7 +3931,7 @@ void halbtc8822b1ant_action_wifi_connected_scan(IN struct btc_coexist
 
 	if (num_of_wifi_link >= 2) {
 		halbtc8822b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
-		halbtc8822b1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
+		halbtc8822b1ant_limited_rx(btcoexist, NORMAL_EXEC, FALSE,
 					   bt_ctrl_agg_buf_size, agg_buf_size);
 
 		if (coex_sta->c2h_bt_inquiry_page) {
@@ -3218,8 +3939,9 @@ void halbtc8822b1ant_action_wifi_connected_scan(IN struct btc_coexist
 				"############# [BTCoex],  BT Is Inquirying\n");
 			BTC_TRACE(trace_buf);
 			halbtc8822b1ant_action_bt_inquiry(btcoexist);
-		} else
+		} else {
 			halbtc8822b1ant_action_wifi_multi_port(btcoexist);
+		}
 		return;
 	}
 
@@ -3234,53 +3956,62 @@ void halbtc8822b1ant_action_wifi_connected_scan(IN struct btc_coexist
 	/* tdma and coex table */
 	if (BT_8822B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
 		if (bt_link_info->a2dp_exist) {
-			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						32);
 			halbtc8822b1ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 1);
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						32);
 		} else if (bt_link_info->a2dp_exist &&
 			   bt_link_info->pan_exist) {
-			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						22);
 			halbtc8822b1ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 1);
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						22);
+
 		} else {
-			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						20);
 			halbtc8822b1ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 1);
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						20);
 		}
 	} else if ((BT_8822B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
 		   (BT_8822B_1ANT_BT_STATUS_ACL_SCO_BUSY ==
 		    coex_dm->bt_status)) {
-		halbtc8822b1ant_action_bt_sco_hid_only_busy(btcoexist,
-				BT_8822B_1ANT_WIFI_STATUS_CONNECTED_SCAN);
+		halbtc8822b1ant_action_bt_sco_hid_only_busy(btcoexist);
 	} else {
-
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
-
+#if 0
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
+#endif
 		halbtc8822b1ant_set_ant_path(btcoexist,
-					     BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-					     BT_8822B_1ANT_PHASE_2G_RUNTIME);
+						BTC_ANT_PATH_AUTO,
+						NORMAL_EXEC,
+						BT_8822B_1ANT_PHASE_2G_RUNTIME);
+
+		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
+					1);
 
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 20);
+#if 0
 		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-						     6);
+			     6);
+#endif
+
 	}
 }
 
 /*""""wl  connected specific packet"""" + bt action*/
+
+static
 void halbtc8822b1ant_action_wifi_connected_specific_packet(
 	IN struct btc_coexist *btcoexist)
 {
 
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean wifi_connected = false, bt_hs_on = false;
+	boolean bt_hs_on = FALSE;
 	u32	wifi_link_status = 0;
 	u32	num_of_wifi_link = 0;
-	boolean	bt_ctrl_agg_buf_size = false;
+	boolean	bt_ctrl_agg_buf_size = FALSE;
 	u8	agg_buf_size = 5;
-	boolean wifi_busy = false;
+	boolean wifi_busy = FALSE;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		"[BTCoex], ********** (wifi connect specific packet) **********\n");
@@ -3294,7 +4025,7 @@ void halbtc8822b1ant_action_wifi_connected_specific_packet(
 
 	if (num_of_wifi_link >= 2) {
 		halbtc8822b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
-		halbtc8822b1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
+		halbtc8822b1ant_limited_rx(btcoexist, NORMAL_EXEC, FALSE,
 					   bt_ctrl_agg_buf_size, agg_buf_size);
 
 		if (coex_sta->c2h_bt_inquiry_page) {
@@ -3302,8 +4033,9 @@ void halbtc8822b1ant_action_wifi_connected_specific_packet(
 				"############# [BTCoex],  BT Is Inquirying\n");
 			BTC_TRACE(trace_buf);
 			halbtc8822b1ant_action_bt_inquiry(btcoexist);
-		} else
+		} else {
 			halbtc8822b1ant_action_wifi_multi_port(btcoexist);
+		}
 		return;
 	}
 
@@ -3325,38 +4057,64 @@ void halbtc8822b1ant_action_wifi_connected_specific_packet(
 
 	/* tdma and coex table */
 	if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist)) {
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
 		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 32);
+
 	} else if (bt_link_info->a2dp_exist) {
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
-		/*for a2dp glitch,change from 1 to 15*/
 		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
 						     15);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 32);
+		/*for a2dp glitch,change from 1 to 15*/
+
 	} else if (bt_link_info->pan_exist) {
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
 		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
 						     1);
-	} else {
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 20);
 
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
+	} else {
 
 		halbtc8822b1ant_set_ant_path(btcoexist,
-					     BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-					     BT_8822B_1ANT_PHASE_2G_RUNTIME);
+					BTC_ANT_PATH_AUTO,
+					NORMAL_EXEC,
+					BT_8822B_1ANT_PHASE_2G_RUNTIME);
 
 		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-						     5);
+							     5);
+
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
+
 	}
 }
 
-/*wifi connected input point : to set different ps and tdma case (+bt different case)*/
+static
+void halbtc8822b1ant_action_a2dpsink(IN struct btc_coexist *btcoexist)
+{
+
+	boolean wifi_busy = FALSE, wifi_turbo = FALSE;
+
+	btcoexist->btc_write_1byte_bitmask(
+			btcoexist, 0xcbd, 0x3, 1);
+	halbtc8822b1ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
+	halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+	halbtc8822b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
+				BT_8822B_1ANT_PHASE_5G_RUNTIME);
+	halbtc8822b1ant_coex_table_with_type(btcoexist,
+					NORMAL_EXEC, 8);
+	halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 8);
+
+}
+
+/* wifi connected input point:
+ * to set different ps and tdma case (+bt different case)
+ */
+
+static
 void halbtc8822b1ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
 {
 
-	boolean	wifi_busy = false;
-	boolean		scan = false, link = false, roam = false;
-	boolean		under_4way = false, ap_enable = false, wifi_under_5g = false;
+	boolean	wifi_busy = FALSE, rf4ce_enabled = FALSE;
+	boolean		scan = FALSE, link = FALSE, roam = FALSE;
+	boolean		under_4way = FALSE, ap_enable = FALSE, wifi_under_5g = FALSE;
 	u8 wifi_rssi_state;
 
 
@@ -3386,11 +4144,11 @@ void halbtc8822b1ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
 				     NORMAL_EXEC,
 				     BT_8822B_1ANT_PHASE_2G_RUNTIME);
 
-
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
 			   &under_4way);
 
 	if (under_4way) {
+		halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
 		halbtc8822b1ant_action_wifi_connected_specific_packet(
 			btcoexist);
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -3403,6 +4161,7 @@ void halbtc8822b1ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
 	if (scan || link || roam) {
+		halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
 		if (scan)
 			halbtc8822b1ant_action_wifi_connected_scan(btcoexist);
 		else
@@ -3422,17 +4181,15 @@ void halbtc8822b1ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
 	if (!wifi_busy) {
 		if (BT_8822B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
 			halbtc8822b1ant_action_wifi_connected_bt_acl_busy(
-				btcoexist,
-				BT_8822B_1ANT_WIFI_STATUS_CONNECTED_IDLE);
+				btcoexist);
 		} else if ((BT_8822B_1ANT_BT_STATUS_SCO_BUSY ==
 			    coex_dm->bt_status) ||
 			   (BT_8822B_1ANT_BT_STATUS_ACL_SCO_BUSY ==
 			    coex_dm->bt_status)) {
-			halbtc8822b1ant_action_bt_sco_hid_only_busy(btcoexist,
-				BT_8822B_1ANT_WIFI_STATUS_CONNECTED_IDLE);
+			halbtc8822b1ant_action_bt_sco_hid_only_busy(btcoexist);
 		} else {
 
-			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE,
 						8);
 
 			halbtc8822b1ant_set_ant_path(btcoexist,
@@ -3450,36 +4207,42 @@ void halbtc8822b1ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
 							     NORMAL_EXEC, 1);
 		}
 	} else {
+			halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
 		if (BT_8822B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
 			halbtc8822b1ant_action_wifi_connected_bt_acl_busy(
-				btcoexist,
-				BT_8822B_1ANT_WIFI_STATUS_CONNECTED_BUSY);
+				btcoexist);
 		} else if ((BT_8822B_1ANT_BT_STATUS_SCO_BUSY ==
 			    coex_dm->bt_status) ||
 			   (BT_8822B_1ANT_BT_STATUS_ACL_SCO_BUSY ==
 			    coex_dm->bt_status)) {
-			halbtc8822b1ant_action_bt_sco_hid_only_busy(btcoexist,
-				BT_8822B_1ANT_WIFI_STATUS_CONNECTED_BUSY);
+			halbtc8822b1ant_action_bt_sco_hid_only_busy(btcoexist);
 		} else {
+			if (rf4ce_enabled) {
+				btcoexist->btc_write_1byte_bitmask(
+					btcoexist, 0x45e, 0x8, 0x1);
+				halbtc8822b1ant_coex_table_with_type(btcoexist,
+				NORMAL_EXEC, 1);
 
+				halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+							TRUE,
+							50);
+				return;
+			}
 
-
-			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE,
 						8);
-
 			halbtc8822b1ant_set_ant_path(btcoexist,
 						     BTC_ANT_PATH_AUTO,
 						     NORMAL_EXEC,
 					     BT_8822B_1ANT_PHASE_2G_RUNTIME);
 
-			/*
-
-						halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-											32);
+#if 0
+			halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+								32);
 
-						halbtc8822b1ant_set_ant_path(btcoexist,
-						BTC_ANT_PATH_AUTO, NORMAL_EXEC, BT_8822B_1ANT_PHASE_2G_RUNTIME);
-			*/
+			halbtc8822b1ant_set_ant_path(btcoexist,
+			BTC_ANT_PATH_AUTO, NORMAL_EXEC, BT_8822B_1ANT_PHASE_2G_RUNTIME);
+#endif
 
 
 
@@ -3489,48 +4252,54 @@ void halbtc8822b1ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], ********** before  **********\n");
 			BTC_TRACE(trace_buf);
-/*
+#if 0
 			if ((BT_8822B_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
 			     coex_dm->bt_status)  &&
 			    (coex_sta->scan_ap_num <= 3) &&
 			    (wifi_rssi_state == BTC_RSSI_STATE_LOW ||
 			     wifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
-*/
+#endif
 			if (BT_8822B_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
-			coex_dm->bt_status) {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"[BTCoex], ********** scan ap <3 coex table=0xaaaaaaaa **********\n");
-				BTC_TRACE(trace_buf);
+			    coex_dm->bt_status) {
+				if (rf4ce_enabled) {
+					btcoexist->btc_write_1byte_bitmask(
+						btcoexist, 0x45e, 0x8, 0x1);
+					halbtc8822b1ant_coex_table_with_type(btcoexist,
+								NORMAL_EXEC, 1);
+
+					halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+								TRUE,
+								50);
+					return;
+				}
 
 				halbtc8822b1ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 7);
+							     NORMAL_EXEC, 1);
 			} else
 
 				halbtc8822b1ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 1);
-
-
-
-			/*
-						else if ((coex_sta->high_priority_tx +
-										 coex_sta->high_priority_rx) <= 60)
-							halbtc8822b1ant_coex_table_with_type(btcoexist,
-										     NORMAL_EXEC, 1);
-						else
-							halbtc8822b1ant_coex_table_with_type(btcoexist,
-										     NORMAL_EXEC, 4);
-			*/
+#if 0
+			else if ((coex_sta->high_priority_tx +
+							 coex_sta->high_priority_rx) <= 60)
+				halbtc8822b1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 1);
+			else
+				halbtc8822b1ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 4);
+#endif
 		}
 	}
 }
 
+static
 void halbtc8822b1ant_run_sw_coexist_mechanism(IN struct btc_coexist *btcoexist)
 {
 
 	u8				algorithm = 0;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "[BTCoex], ********** (runswcoexmech) **********\n");
+		    "[BTCoex], ********** (run sw coexmech) **********\n");
 	BTC_TRACE(trace_buf);
 	algorithm = halbtc8822b1ant_action_algorithm(btcoexist);
 	coex_dm->cur_algorithm = algorithm;
@@ -3543,86 +4312,123 @@ void halbtc8822b1ant_run_sw_coexist_mechanism(IN struct btc_coexist *btcoexist)
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = SCO.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8822b1ant_action_sco(btcoexist); */
+#if 0
+			halbtc8822b1ant_action_sco(btcoexist);
+#endif
 			break;
 		case BT_8822B_1ANT_COEX_ALGO_HID:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = HID.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8822b1ant_action_hid(btcoexist); */
+#if 0
+			halbtc8822b1ant_action_hid(btcoexist);
+#endif
 			break;
 		case BT_8822B_1ANT_COEX_ALGO_A2DP:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = A2DP.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8822b1ant_action_a2dp(btcoexist); */
+#if 0
+			halbtc8822b1ant_action_a2dp(btcoexist);
+#endif
 			break;
 		case BT_8822B_1ANT_COEX_ALGO_A2DP_PANHS:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], Action algorithm = A2DP+PAN(HS).\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8822b1ant_action_a2dp_pan_hs(btcoexist); */
+#if 0
+			halbtc8822b1ant_action_a2dp_pan_hs(btcoexist);
+#endif
 			break;
 		case BT_8822B_1ANT_COEX_ALGO_PANEDR:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = PAN(EDR).\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8822b1ant_action_pan_edr(btcoexist); */
+#if 0
+			halbtc8822b1ant_action_pan_edr(btcoexist);
+#endif
 			break;
 		case BT_8822B_1ANT_COEX_ALGO_PANHS:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = HS mode.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8822b1ant_action_pan_hs(btcoexist); */
+#if 0
+			halbtc8822b1ant_action_pan_hs(btcoexist);
+#endif
 			break;
 		case BT_8822B_1ANT_COEX_ALGO_PANEDR_A2DP:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = PAN+A2DP.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8822b1ant_action_pan_edr_a2dp(btcoexist); */
+#if 0
+			halbtc8822b1ant_action_pan_edr_a2dp(btcoexist);
+#endif
+			break;
+		case BT_8822B_1ANT_COEX_ALGO_A2DPSINK:
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					"[BTCoex], Action 2-Ant, algorithm = A2DP Sink.\n");
+			BTC_TRACE(trace_buf);
+			halbtc8822b1ant_action_a2dpsink(btcoexist);
 			break;
+
 		case BT_8822B_1ANT_COEX_ALGO_PANEDR_HID:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], Action algorithm = PAN(EDR)+HID.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8822b1ant_action_pan_edr_hid(btcoexist); */
+#if 0
+			halbtc8822b1ant_action_pan_edr_hid(btcoexist);
+#endif
 			break;
 		case BT_8822B_1ANT_COEX_ALGO_HID_A2DP_PANEDR:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], Action algorithm = HID+A2DP+PAN.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8822b1ant_action_hid_a2dp_pan_edr(btcoexist); */
+#if 0
+			halbtc8822b1ant_action_hid_a2dp_pan_edr(btcoexist);
+#endif
 			break;
 		case BT_8822B_1ANT_COEX_ALGO_HID_A2DP:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], Action algorithm = HID+A2DP.\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8822b1ant_action_hid_a2dp(btcoexist); */
+#if 0
+			halbtc8822b1ant_action_hid_a2dp(btcoexist);
+#endif
 			break;
+		case BT_8822B_1ANT_COEX_ALGO_NOPROFILEBUSY:
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], Action 2-Ant, algorithm = No-Profile busy.\n");
+			BTC_TRACE(trace_buf);
+			halbtc8822b1ant_action_bt_idle(btcoexist);
+			break;
+
 		default:
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], Action algorithm = coexist All Off!!\n");
 			BTC_TRACE(trace_buf);
-			/* halbtc8822b1ant_coex_all_off(btcoexist); */
+#if 0
+			halbtc8822b1ant_coex_all_off(btcoexist);
+#endif
 			break;
 		}
 		coex_dm->pre_algorithm = coex_dm->cur_algorithm;
 	}
 }
 
+static
 void halbtc8822b1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 {
 
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean	wifi_connected = false, bt_hs_on = false;
-	boolean	increase_scan_dev_num = false;
-	boolean	bt_ctrl_agg_buf_size = false;
-	boolean	miracast_plus_bt = false;
+	boolean	wifi_connected = FALSE, bt_hs_on = FALSE;
+	boolean	increase_scan_dev_num = FALSE;
+	boolean	bt_ctrl_agg_buf_size = FALSE;
+	boolean	miracast_plus_bt = FALSE;
 	u8	agg_buf_size = 5;
 	u32	wifi_link_status = 0;
 	u32	num_of_wifi_link = 0, wifi_bw;
 	u8	iot_peer = BTC_IOT_PEER_UNKNOWN;
-	boolean wifi_under_5g = false;
+	boolean wifi_under_5g = FALSE;
 
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -3650,9 +4456,25 @@ void halbtc8822b1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 		return;
 	}
 
+	if ((coex_sta->under_lps) &&
+		(coex_dm->bt_status != BT_8822B_1ANT_BT_STATUS_ACL_BUSY)) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], RunCoexistMechanism(), wifi is under LPS !!!\n");
+		BTC_TRACE(trace_buf);
+		halbtc8822b1ant_action_wifi_native_lps(btcoexist);
+		return;
+	}
+
 	if (!coex_sta->run_time_state) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], return for run_time_state = false !!!\n");
+			"[BTCoex], return for run_time_state = FALSE !!!\n");
+		BTC_TRACE(trace_buf);
+		return;
+	}
+
+	if (coex_sta->freeze_coexrun_by_btinfo) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], BtInfoNotify(), return for freeze_coexrun_by_btinfo\n");
 		BTC_TRACE(trace_buf);
 		return;
 	}
@@ -3686,14 +4508,25 @@ void halbtc8822b1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 	if (coex_sta->bt_disabled) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], BT is disabled !!!\n");
+		BTC_TRACE(trace_buf);
+		halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, FALSE);
 		halbtc8822b1ant_action_wifi_only(btcoexist);
 		return;
 	}
 
+	if (coex_sta->is_setupLink) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], BT is re-link !!!\n");
+		BTC_TRACE(trace_buf);
+		halbtc8822b1ant_action_bt_relink(btcoexist);
+		return;
+	}
+
 	if ((BT_8822B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
 	    (BT_8822B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
 	    (BT_8822B_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status))
-		increase_scan_dev_num = true;
+		increase_scan_dev_num = TRUE;
+	halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
 
 	btcoexist->btc_set(btcoexist, BTC_SET_BL_INC_SCAN_DEV_NUM,
 			   &increase_scan_dev_num);
@@ -3710,19 +4543,20 @@ void halbtc8822b1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 			"############# [BTCoex],  Multi-Port num_of_wifi_link = %d, wifi_link_status = 0x%x\n",
 			    num_of_wifi_link, wifi_link_status);
 		BTC_TRACE(trace_buf);
+		halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
 
 		if (bt_link_info->bt_link_exist) {
 			halbtc8822b1ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 1,
 						   0, 1);
-			miracast_plus_bt = true;
+			miracast_plus_bt = TRUE;
 		} else {
 			halbtc8822b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0,
 						   0, 0);
-			miracast_plus_bt = false;
+			miracast_plus_bt = FALSE;
 		}
 		btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
 				   &miracast_plus_bt);
-		halbtc8822b1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
+		halbtc8822b1ant_limited_rx(btcoexist, NORMAL_EXEC, FALSE,
 					   bt_ctrl_agg_buf_size, agg_buf_size);
 
 		if ((bt_link_info->a2dp_exist) &&
@@ -3731,54 +4565,60 @@ void halbtc8822b1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 				"############# [BTCoex],  BT Is Inquirying\n");
 			BTC_TRACE(trace_buf);
 			halbtc8822b1ant_action_bt_inquiry(btcoexist);
-		} else
+		} else {
 			halbtc8822b1ant_action_wifi_multi_port(btcoexist);
+		}
 
 		return;
 	}
 
-	miracast_plus_bt = false;
+	miracast_plus_bt = FALSE;
 	btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
 			   &miracast_plus_bt);
 
 	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
 
 	if ((bt_link_info->bt_link_exist) && (wifi_connected)) {
+		halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
 		halbtc8822b1ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 1, 0, 1);
 
 		btcoexist->btc_get(btcoexist, BTC_GET_U1_IOT_PEER, &iot_peer);
 
 		if (BTC_IOT_PEER_CISCO != iot_peer) {
-			if (bt_link_info->sco_exist) /* if (bt_link_info->bt_hi_pri_link_exist) */
+#if 0
+			if (bt_link_info->bt_hi_pri_link_exist)
+#endif
+			if (bt_link_info->sco_exist)
 				halbtc8822b1ant_limited_rx(btcoexist,
-					   NORMAL_EXEC, true, false, 0x5);
+					   NORMAL_EXEC, TRUE, FALSE, 0x5);
 			else
 				halbtc8822b1ant_limited_rx(btcoexist,
-					   NORMAL_EXEC, false, false, 0x5);
+					   NORMAL_EXEC, FALSE, FALSE, 0x5);
 		} else {
+		halbtc8822b1ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
 			if (bt_link_info->sco_exist)
 				halbtc8822b1ant_limited_rx(btcoexist,
-					   NORMAL_EXEC, true, false, 0x5);
+					   NORMAL_EXEC, TRUE, FALSE, 0x5);
 			else {
 				if (BTC_WIFI_BW_HT40 == wifi_bw)
 					halbtc8822b1ant_limited_rx(btcoexist,
-						NORMAL_EXEC, false, true, 0x10);
+						NORMAL_EXEC, FALSE, TRUE, 0x10);
 				else
 					halbtc8822b1ant_limited_rx(btcoexist,
-						NORMAL_EXEC, false, true, 0x8);
+						NORMAL_EXEC, FALSE, TRUE, 0x8);
 			}
 		}
 
-		halbtc8822b1ant_sw_mechanism(btcoexist, true);
+		halbtc8822b1ant_sw_mechanism(btcoexist, TRUE);
 		halbtc8822b1ant_run_sw_coexist_mechanism(
 			btcoexist);  /* just print debug message */
 	} else {
 		halbtc8822b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
 
-		halbtc8822b1ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
+		halbtc8822b1ant_limited_rx(btcoexist, NORMAL_EXEC, FALSE, FALSE,
 					   0x5);
 
-		halbtc8822b1ant_sw_mechanism(btcoexist, false);
+		halbtc8822b1ant_sw_mechanism(btcoexist, FALSE);
 		halbtc8822b1ant_run_sw_coexist_mechanism(
 			btcoexist); /* just print debug message */
 	}
@@ -3797,7 +4637,7 @@ void halbtc8822b1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 
 
 	if (!wifi_connected) {
-		boolean	scan = false, link = false, roam = false;
+		boolean	scan = FALSE, link = FALSE, roam = FALSE;
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], wifi is non connected-idle !!!\n");
@@ -3807,84 +4647,42 @@ void halbtc8822b1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
 		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
 
-		if (scan || link || roam) {
-			if (scan)
-				halbtc8822b1ant_action_wifi_not_connected_scan(
-					btcoexist);
-			else
-				halbtc8822b1ant_action_wifi_not_connected_asso_auth(
-					btcoexist);
-		} else
+		if (scan)
+			halbtc8822b1ant_action_wifi_not_connected_scan(
+				btcoexist);
+		else if (link || roam)
+			halbtc8822b1ant_action_wifi_not_connected_asso_auth(
+				btcoexist);
+		else
 			halbtc8822b1ant_action_wifi_not_connected(btcoexist);
 	} else	/* wifi LPS/Busy */
 		halbtc8822b1ant_action_wifi_connected(btcoexist);
 }
 
-u32 halbtc8822b1ant_psd_log2base(IN struct btc_coexist *btcoexist, IN u32 val)
-{
-	u8	j;
-	u32	tmp, tmp2, val_integerd_b = 0, tindex, shiftcount = 0;
-	u32	result, val_fractiond_b = 0, table_fraction[21] = {0, 432, 332, 274, 232, 200,
-				   174, 151, 132, 115, 100, 86, 74, 62, 51, 42,
-							   32, 23, 15, 7, 0
-							      };
-
-	if (val == 0)
-		return 0;
-
-	tmp = val;
-
-	while (1) {
-		if (tmp == 1)
-			break;
-
-		tmp = (tmp >> 1);
-		shiftcount++;
-	}
-
-
-	val_integerd_b = shiftcount + 1;
-
-	tmp2 = 1;
-	for (j = 1; j <= val_integerd_b; j++)
-		tmp2 = tmp2 * 2;
-
-	tmp = (val * 100) / tmp2;
-	tindex = tmp / 5;
-
-	if (tindex > 20)
-		tindex = 20;
-
-	val_fractiond_b = table_fraction[tindex];
-
-	result = val_integerd_b * 100 - val_fractiond_b;
-
-	return result;
-
-
-}
-
+static
 void halbtc8822b1ant_init_coex_dm(IN struct btc_coexist *btcoexist)
 {
 	/* force to reset coex mechanism */
 
-	halbtc8822b1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, false);
+	halbtc8822b1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, FALSE);
 
 	/* sw all off */
-	halbtc8822b1ant_sw_mechanism(btcoexist, false);
+	halbtc8822b1ant_sw_mechanism(btcoexist, FALSE);
 
-	/* halbtc8822b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8); */
-	/* halbtc8822b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); */
+#if 0
+	halbtc8822b1ant_ps_tdma(btcoexist, FORCE_EXEC, FALSE, 8);
+	halbtc8822b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
+#endif
 
 	coex_sta->pop_event_cnt = 0;
 }
 
+static
 void halbtc8822b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 				    IN boolean back_up, IN boolean wifi_only)
 {
 
-	u8	u8tmp = 0;
-	boolean			wifi_under_5g = false;
+	u8	u8tmp = 0, i = 0;
 	u32				u32tmp1 = 0, u32tmp2 = 0, u32tmp3 = 0;
 
 
@@ -3903,6 +4701,20 @@ void halbtc8822b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 
 	coex_sta->bt_coex_supported_feature = 0;
 	coex_sta->bt_coex_supported_version = 0;
+	coex_sta->bt_ble_scan_type = 0;
+	coex_sta->bt_ble_scan_para[0] = 0;
+	coex_sta->bt_ble_scan_para[1] = 0;
+	coex_sta->bt_ble_scan_para[2] = 0;
+	coex_sta->bt_reg_vendor_ac = 0xffff;
+	coex_sta->bt_reg_vendor_ae = 0xffff;
+	coex_sta->isolation_btween_wb = BT_8822B_1ANT_DEFAULT_ISOLATION;
+	coex_sta->gnt_error_cnt = 0;
+	coex_sta->bt_relink_downcount = 0;
+	coex_sta->is_set_ps_state_fail = FALSE;
+	coex_sta->cnt_set_ps_state_fail = 0;
+
+	for (i = 0; i <= 9; i++)
+		coex_sta->bt_afh_map[i] = 0;
 
 	/* Setup RF front end type */
 	halbtc8822b1ant_set_rfe_type(btcoexist);
@@ -3933,8 +4745,10 @@ void halbtc8822b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 	/*GNT_BT=1 while select both */
 	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x763, 0x10, 0x1);
 
+#if 0
 	/* enable GNT_WL/GNT_BT debug signal to GPIO14/15 */
-	/*btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x8, 0x1);*/
+	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x8, 0x1);
+#endif
 
 	/* enable GNT_WL */
 	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4e, 0x40, 0x0);
@@ -3942,19 +4756,30 @@ void halbtc8822b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 
 	if (btcoexist->btc_read_1byte(btcoexist, 0x80) == 0xc6)
 		halbtc8822b1ant_post_state_to_bt(btcoexist,
-					 BT_8822B_1ANT_SCOREBOARD_ONOFF, true);
+					 BT_8822B_1ANT_SCOREBOARD_ONOFF, TRUE);
 
 	/* Antenna config */
-	if (wifi_only) {
+	if (coex_sta->is_rf_state_off) {
+
+		halbtc8822b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
+					     FORCE_EXEC,
+					     BT_8822B_1ANT_PHASE_WLAN_OFF);
 
-		coex_sta->concurrent_rx_mode_on = false;
+		btcoexist->stop_coex_dm = TRUE;
+
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], **********  halbtc8822b1ant_init_hw_config (RF Off)**********\n");
+		BTC_TRACE(trace_buf);
+	} else if (wifi_only) {
+
+		coex_sta->concurrent_rx_mode_on = FALSE;
 		halbtc8822b1ant_set_ant_path(btcoexist,
 					     BTC_ANT_PATH_WIFI,
 					     FORCE_EXEC,
 					     BT_8822B_1ANT_PHASE_WLANONLY_INIT);
 	} else {
 
-		coex_sta->concurrent_rx_mode_on = true;
+		coex_sta->concurrent_rx_mode_on = TRUE;
 
 		halbtc8822b1ant_set_ant_path(btcoexist,
 					     BTC_ANT_PATH_AUTO,
@@ -3962,574 +4787,9 @@ void halbtc8822b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 					     BT_8822B_1ANT_PHASE_COEX_INIT);
 	}
 
-
 	/* PTA parameter */
 	halbtc8822b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
-
-	halbtc8822b1ant_enable_gnt_to_gpio(btcoexist, true);
-
-}
-
-
-void halbtc8822b1ant_init_hw_config_without_bt(IN struct btc_coexist *btcoexist,
-		IN boolean back_up, IN boolean wifi_only)
-{
-
-	u8	u8tmp = 0;
-	boolean		wifi_under_5g = false;
-	u32			u32tmp1 = 0, u32tmp2 = 0, u32tmp3 = 0;
-
-
-	/* 0xf0[15:12] --> Chip Cut information */
-	coex_sta->cut_version = (btcoexist->btc_read_1byte(btcoexist,
-				 0xf1) & 0xf0) >> 4;
-
-	/* enable TBTT interrupt */
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8,
-					   0x1);
-
-	/* enable GNT_WL */
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4e, 0x40, 0x0);
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x1, 0x0);
-
-	/* Antenna config */
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4e, 0x80,
-					   0x0);  /*  0x4c[23] = 0 */
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4f, 0x01,
-					   0x1);  /* 0x4c[24] = 1 */
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb4, 0xff,
-		0x77);	/* BB SW, DPDT use RFE_ctrl8 and RFE_ctrl9 as conctrol pin */
-
-
-	/* Ext switch buffer mux */
-	btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x1991, 0x3, 0x0);
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbe, 0x8, 0x0);
-
-	/*enable sw control gnt_wl=1 / gnt_bt=1 */
-	btcoexist->btc_write_1byte(btcoexist, 0x73, 0x0e);
-
-	btcoexist->btc_write_4byte(btcoexist, 0x1704, 0x0000ff00);
-
-	btcoexist->btc_write_4byte(btcoexist, 0x1700, 0xc00f0038);
-
-
-	/* ant switch WL2G or WL5G*/
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G,
-			   &wifi_under_5g);
-	if (wifi_under_5g)
-
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbd,
-						   0x3, 1);
-
-	else
-
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbd,
-						   0x3, 2);
-
-}
-
-void halbtc8822b1ant_psd_showdata(IN struct btc_coexist *btcoexist)
-{
-	u8		*cli_buf = btcoexist->cli_buf;
-	u32		delta_freq_per_point;
-	u32		freq, freq1, freq2, n = 0, i = 0, j = 0, m = 0, psd_rep1, psd_rep2;
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n\n============[PSD info]  (%d)============\n",
-		   psd_scan->psd_gen_count);
-	CL_PRINTF(cli_buf);
-
-	if (psd_scan->psd_gen_count == 0) {
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n No data !!\n");
-		CL_PRINTF(cli_buf);
-		return;
-	}
-
-	if (psd_scan->psd_point == 0)
-		delta_freq_per_point = 0;
-	else
-		delta_freq_per_point = psd_scan->psd_band_width /
-				       psd_scan->psd_point;
-
-	/* if (psd_scan->is_psd_show_max_only) */
-	if (0) {
-		psd_rep1 = psd_scan->psd_max_value / 100;
-		psd_rep2 = psd_scan->psd_max_value - psd_rep1 * 100;
-
-		freq = ((psd_scan->real_cent_freq - 20) * 1000000 +
-			psd_scan->psd_max_value_point * delta_freq_per_point);
-		freq1 = freq / 1000000;
-		freq2 = freq / 1000 - freq1 * 1000;
-
-		if (freq2 < 100)
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   "\r\n Freq = %d.0%d MHz",
-				   freq1, freq2);
-		else
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   "\r\n Freq = %d.%d MHz",
-				   freq1, freq2);
-
-		if (psd_rep2 < 10)
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   ", Value = %d.0%d dB, (%d)\n",
-				   psd_rep1, psd_rep2, psd_scan->psd_max_value);
-		else
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-				   ", Value = %d.%d dB, (%d)\n",
-				   psd_rep1, psd_rep2, psd_scan->psd_max_value);
-
-		CL_PRINTF(cli_buf);
-	} else {
-		m = psd_scan->psd_start_point;
-		n = psd_scan->psd_start_point;
-		i = 1;
-		j = 1;
-
-		while (1) {
-			do {
-				freq = ((psd_scan->real_cent_freq - 20) *
-					1000000 + m *
-					delta_freq_per_point);
-				freq1 = freq / 1000000;
-				freq2 = freq / 1000 - freq1 * 1000;
-
-				if (i == 1) {
-					if (freq2 == 0)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Freq%6d.000",
-							   freq1);
-					else if (freq2 < 100)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Freq%6d.0%2d",
-							   freq1,
-							   freq2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Freq%6d.%3d",
-							   freq1,
-							   freq2);
-				} else if ((i % 8 == 0) ||
-					   (m == psd_scan->psd_stop_point)) {
-					if (freq2 == 0)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.000\n", freq1);
-					else if (freq2 < 100)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.0%2d\n", freq1,
-							   freq2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.%3d\n", freq1,
-							   freq2);
-				} else {
-					if (freq2 == 0)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.000", freq1);
-					else if (freq2 < 100)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.0%2d", freq1,
-							   freq2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%6d.%3d", freq1,
-							   freq2);
-				}
-
-				i++;
-				m++;
-				CL_PRINTF(cli_buf);
-
-			} while ((i <= 8) && (m <= psd_scan->psd_stop_point));
-
-
-			do {
-				psd_rep1 = psd_scan->psd_report_max_hold[n] /
-					   100;
-				psd_rep2 = psd_scan->psd_report_max_hold[n] -
-					   psd_rep1 *
-					   100;
-
-				if (j == 1) {
-					if (psd_rep2 < 10)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Val %7d.0%d",
-							   psd_rep1,
-							   psd_rep2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "\r\n Val %7d.%d",
-							   psd_rep1,
-							   psd_rep2);
-				} else if ((j % 8 == 0)  ||
-					   (n == psd_scan->psd_stop_point)) {
-					if (psd_rep2 < 10)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							"%7d.0%d\n", psd_rep1,
-							   psd_rep2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%7d.%d\n", psd_rep1,
-							   psd_rep2);
-				} else {
-					if (psd_rep2 < 10)
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%7d.0%d", psd_rep1,
-							   psd_rep2);
-					else
-						CL_SPRINTF(cli_buf,
-							   BT_TMP_BUF_SIZE,
-							   "%7d.%d", psd_rep1,
-							   psd_rep2);
-				}
-
-				j++;
-				n++;
-				CL_PRINTF(cli_buf);
-
-			} while ((j <= 8) && (n <= psd_scan->psd_stop_point));
-
-			if ((m > psd_scan->psd_stop_point) ||
-			    (n > psd_scan->psd_stop_point))
-				break;
-
-			i = 1;
-			j = 1;
-
-		}
-	}
-
-
-}
-
-void halbtc8822b1ant_psd_max_holddata(IN struct btc_coexist *btcoexist,
-				      IN u32 gen_count)
-{
-	u32	i = 0, i_max = 0, val_max = 0;
-
-	if (gen_count == 1) {
-		memcpy(psd_scan->psd_report_max_hold,
-		       psd_scan->psd_report,
-		       BT_8822B_1ANT_ANTDET_PSD_POINTS * sizeof(u32));
-
-		for (i = psd_scan->psd_start_point;
-		     i <= psd_scan->psd_stop_point; i++) {
-
-		}
-
-		psd_scan->psd_max_value_point = 0;
-		psd_scan->psd_max_value = 0;
-
-	} else {
-		for (i = psd_scan->psd_start_point;
-		     i <= psd_scan->psd_stop_point; i++) {
-			if (psd_scan->psd_report[i] >
-			    psd_scan->psd_report_max_hold[i])
-				psd_scan->psd_report_max_hold[i] =
-					psd_scan->psd_report[i];
-
-			/* search Max Value */
-			if (i == psd_scan->psd_start_point) {
-				i_max = i;
-				val_max = psd_scan->psd_report_max_hold[i];
-			} else {
-				if (psd_scan->psd_report_max_hold[i] >
-				    val_max) {
-					i_max = i;
-					val_max = psd_scan->psd_report_max_hold[i];
-				}
-			}
-
-
-
-		}
-
-		psd_scan->psd_max_value_point = i_max;
-		psd_scan->psd_max_value = val_max;
-
-	}
-
-
-}
-
-u32 halbtc8822b1ant_psd_getdata(IN struct btc_coexist *btcoexist, IN u32 point)
-{
-	/* reg 0x808[9:0]: FFT data x */
-	/* reg 0x808[22]: 0-->1 to get 1 FFT data y */
-	/* reg 0x8b4[15:0]: FFT data y report */
-
-	u32 val = 0, psd_report = 0;
-
-	val = btcoexist->btc_read_4byte(btcoexist, 0x808);
-
-	val &= 0xffbffc00;
-	val |= point;
-
-	btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-	val |= 0x00400000;
-	btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-
-	val = btcoexist->btc_read_4byte(btcoexist, 0x8b4);
-
-	psd_report = val & 0x0000ffff;
-
-	return psd_report;
-}
-
-
-void halbtc8822b1ant_psd_sweep_point(IN struct btc_coexist *btcoexist,
-	     IN u32 cent_freq, IN s32 offset, IN u32 span, IN u32 points,
-				     IN u32 avgnum)
-{
-	u32	 i, val, n, k = 0;
-	u32	points1 = 0, psd_report = 0;
-	u32	start_p = 0, stop_p = 0, delta_freq_per_point = 156250;
-	u32    psd_center_freq = 20 * 10 ^ 6, freq, freq1, freq2;
-	boolean outloop = false;
-	u8	 flag = 0;
-	u32	tmp, psd_rep1, psd_rep2;
-	u32	wifi_original_channel = 1;
-
-	psd_scan->is_psd_running = true;
-
-	do {
-		switch (flag) {
-		case 0:  /* Get PSD parameters */
-		default:
-
-			psd_scan->psd_band_width = 40 * 1000000;
-			psd_scan->psd_point = points;
-			psd_scan->psd_start_base = points / 2;
-			psd_scan->psd_avg_num = avgnum;
-			psd_scan->real_cent_freq = cent_freq;
-			psd_scan->real_offset = offset;
-			psd_scan->real_span = span;
-
-
-			points1 = psd_scan->psd_point;
-			delta_freq_per_point = psd_scan->psd_band_width /
-					       psd_scan->psd_point;
-
-			/* PSD point setup */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x808);
-			val &= 0xffff0fff;
-
-			switch (psd_scan->psd_point) {
-			case 128:
-				val |= 0x0;
-				break;
-			case 256:
-			default:
-				val |= 0x00004000;
-				break;
-			case 512:
-				val |= 0x00008000;
-				break;
-			case 1024:
-				val |= 0x0000c000;
-				break;
-			}
-
-			switch (psd_scan->psd_avg_num) {
-			case 1:
-				val |= 0x0;
-				break;
-			case 8:
-				val |= 0x00001000;
-				break;
-			case 16:
-				val |= 0x00002000;
-				break;
-			case 32:
-			default:
-				val |= 0x00003000;
-				break;
-			}
-			btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-			flag = 1;
-			break;
-		case 1:	  /* calculate the PSD point index from freq/offset/span */
-			psd_center_freq = psd_scan->psd_band_width / 2 +
-					  offset * (1000000);
-
-			start_p = psd_scan->psd_start_base + (psd_center_freq -
-				span * (1000000) / 2) / delta_freq_per_point;
-			psd_scan->psd_start_point = start_p -
-						    psd_scan->psd_start_base;
-
-			stop_p = psd_scan->psd_start_base + (psd_center_freq +
-				span * (1000000) / 2) / delta_freq_per_point;
-			psd_scan->psd_stop_point = stop_p -
-						   psd_scan->psd_start_base - 1;
-
-			flag = 2;
-			break;
-		case 2:  /* set RF channel/BW/Mode */
-
-			/* set 3-wire off */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x88c);
-			val |= 0x00300000;
-			btcoexist->btc_write_4byte(btcoexist, 0x88c, val);
-
-			/* CCK off */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x800);
-			val &= 0xfeffffff;
-			btcoexist->btc_write_4byte(btcoexist, 0x800, val);
-
-			/* store WiFi original channel */
-			wifi_original_channel = btcoexist->btc_get_rf_reg(
-					btcoexist, BTC_RF_A, 0x18, 0x3ff);
-
-			/* Set RF channel */
-			if (cent_freq == 2484)
-				btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
-							  0x18, 0x3ff, 0xe);
-			else
-				btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
-					  0x18, 0x3ff, (cent_freq - 2412) / 5 +
-						  1); /* WiFi TRx Mask on */
-
-			/* Set  RF mode = Rx, RF Gain = 0x8a0 */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x0,
-						  0xfffff, 0x308a0);
-
-			/* Set RF Rx filter corner */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
-						  0xfffff, 0x3e4);
-
-			/* Set TRx mask off */
-			/* un-lock TRx Mask setup */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdd,
-						  0x80, 0x1);
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdf,
-						  0x1, 0x1);
-
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
-						  0xfffff, 0x0);
-
-			flag = 3;
-			break;
-		case 3:
-			memset(psd_scan->psd_report, 0,
-			       psd_scan->psd_point * sizeof(u32));
-			start_p = psd_scan->psd_start_point +
-				  psd_scan->psd_start_base;
-			stop_p = psd_scan->psd_stop_point +
-				 psd_scan->psd_start_base + 1;
-
-			i = start_p;
-
-			while (i < stop_p) {
-				if (i >= points1)
-					psd_report =
-						halbtc8822b1ant_psd_getdata(
-							btcoexist, i - points1);
-				else
-					psd_report =
-						halbtc8822b1ant_psd_getdata(
-							btcoexist, i);
-
-				if (psd_report == 0)
-					tmp = 0;
-				else
-					/* tmp =  20*log10((double)psd_report); */
-					/* 20*log2(x)/log2(10), log2Base return theresult of the psd_report*100 */
-					tmp = 6 * halbtc8822b1ant_psd_log2base(
-						      btcoexist, psd_report);
-
-				n = i - psd_scan->psd_start_base;
-				psd_scan->psd_report[n] =  tmp;
-				psd_rep1 = psd_scan->psd_report[n] / 100;
-				psd_rep2 = psd_scan->psd_report[n] - psd_rep1 *
-					   100;
-
-				freq = ((cent_freq - 20) * 1000000 + n *
-					delta_freq_per_point);
-				freq1 = freq / 1000000;
-				freq2 = freq / 1000 - freq1 * 1000;
-
-				i++;
-
-				k = 0;
-
-				/* Add Delay between PSD point */
-				while (1) {
-					if (k++ > 20000)
-						break;
-				}
-
-			}
-
-			flag = 100;
-			break;
-		case 99:	/* error */
-
-			outloop = true;
-			break;
-		case 100: /* recovery */
-
-			/* set 3-wire on */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x88c);
-			val &= 0xffcfffff;
-			btcoexist->btc_write_4byte(btcoexist, 0x88c, val);
-
-			/* CCK on */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x800);
-			val |= 0x01000000;
-			btcoexist->btc_write_4byte(btcoexist, 0x800, val);
-
-			/* PSD off */
-			val = btcoexist->btc_read_4byte(btcoexist, 0x808);
-			val &= 0xffbfffff;
-			btcoexist->btc_write_4byte(btcoexist, 0x808, val);
-
-			/* TRx Mask on */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
-						  0xfffff, 0x780);
-
-			/* lock TRx Mask setup */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdd,
-						  0x80, 0x0);
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdf,
-						  0x1, 0x0);
-
-			/* Set RF Rx filter corner */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
-						  0xfffff, 0x0);
-
-			/* restore WiFi original channel */
-			btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x18,
-						  0x3ff, wifi_original_channel);
-
-			outloop = true;
-			break;
-
-		}
-
-	} while (!outloop);
-
-
-
-	psd_scan->is_psd_running = false;
-
+	halbtc8822b1ant_enable_gnt_to_gpio(btcoexist, TRUE);
 
 }
 
@@ -4540,7 +4800,7 @@ void halbtc8822b1ant_wifi_info_notify(IN struct btc_coexist *btcoexist)
 	u8			opcode_ver = 0;
 	u8			ap_num = 0;
 	s32			wifi_rssi = 0;
-	boolean			wifi_busy = false;
+	boolean			wifi_busy = FALSE;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
 	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, &ap_num);
@@ -4581,12 +4841,16 @@ void halbtc8822b1ant_setManual(IN struct btc_coexist *btcoexist,
  * ************************************************************ */
 
 void ex_halbtc8822b1ant_power_on_setting(IN struct btc_coexist *btcoexist)
-{}
+{
+	coex_sta->is_rf_state_off = FALSE;
+
+}
 void ex_halbtc8822b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist)
 {}
 void ex_halbtc8822b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 				       IN boolean wifi_only)
 {}
+static
 void ex_halbtc8822b1ant_init_coex_dm(IN struct btc_coexist *btcoexist)
 {}
 void ex_halbtc8822b1ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
@@ -4648,7 +4912,7 @@ void ex_halbtc8822b1ant_scan_notify(IN struct btc_coexist *btcoexist,
 	u8			h2c_para[4] = {0};
 	u8			opcode_ver = 0;
 	u8			scan_start = 0;
-	boolean			under_4way = false;
+	boolean			under_4way = FALSE;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
 			   &under_4way);
@@ -4681,7 +4945,7 @@ void ex_halbtc8822b1ant_connect_notify(IN struct btc_coexist *btcoexist,
 	u8			h2c_para[4] = {0};
 	u8			opcode_ver = 0;
 	u8			connect_start = 0;
-	boolean			under_4way = false;
+	boolean			under_4way = FALSE;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
 			   &under_4way);
@@ -4716,7 +4980,7 @@ void ex_halbtc8822b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
 	u8			h2c_para[5] = {0};
 	u8			opcode_ver = 0;
 	u8			port = 0, connected = 0, freq = 0, bandwidth = 0, iot_peer = 0;
-	boolean			wifi_under_5g = false;
+	boolean			wifi_under_5g = FALSE;
 
 	if (BTC_MEDIA_CONNECT == type)
 		connected = 1;
@@ -4732,8 +4996,8 @@ void ex_halbtc8822b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
 			   &wifi_central_chnl);
 	btcoexist->btc_get(btcoexist, BTC_GET_U1_IOT_PEER, &iot_peer);
 
-	h2c_para[0] = (connected << 4) |
-		port;	/* port need to be implemented in the future (p2p port, ...) */
+	/* port need to be implemented in the future (p2p port, ...) */
+	h2c_para[0] = (connected << 4) | port;
 	h2c_para[1] = (freq << 4) | bandwidth;
 	h2c_para[2] = wifi_central_chnl;
 	h2c_para[3] = iot_peer;
@@ -4747,7 +5011,7 @@ void ex_halbtc8822b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
 	u8			h2c_para[4] = {0};
 	u8			opcode_ver = 0;
 	u8			connect_start = 0;
-	boolean			under_4way = false;
+	boolean			under_4way = FALSE;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
 			   &under_4way);
@@ -4779,10 +5043,12 @@ void ex_halbtc8822b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 			    "[BTCoex], RF is turned ON!!\n");
 		BTC_TRACE(trace_buf);
 		rfstate_notify = 1;
+		coex_sta->is_rf_state_off = FALSE;
 	} else if (BTC_RF_OFF == type) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], RF is turned OFF!!\n");
 		BTC_TRACE(trace_buf);
+		coex_sta->is_rf_state_off = TRUE;
 	}
 
 	h2c_para[0] = 0xff;			/* IPS notify */
@@ -4846,7 +5112,7 @@ void ex_halbtc8822b1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	u32				fw_ver = 0, bt_patch_ver = 0, bt_coex_ver = 0;
 	static u8			pop_report_in_10s = 0;
 	u32			phyver = 0;
-	boolean			lte_coex_on = false;
+	boolean			lte_coex_on = FALSE;
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
 		   "\r\n ============[BT Coexist info]============");
@@ -5117,7 +5383,7 @@ void ex_halbtc8822b1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
 		   "============[Hw setting]============");
 	CL_PRINTF(cli_buf);
-/*
+#if 0
 	u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
 	u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
 	u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
@@ -5126,7 +5392,7 @@ void ex_halbtc8822b1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		   "0x430/0x434/0x42a/0x456",
 		   u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
 	CL_PRINTF(cli_buf);
-*/
+#endif
 
 	u32tmp[0] = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
 	u32tmp[1] = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
@@ -5265,7 +5531,7 @@ void ex_halbtc8822b1ant_power_on_setting(IN struct btc_coexist *btcoexist)
 		    board_info->btdm_ant_num_by_ant_det);
 	BTC_TRACE(trace_buf);
 
-	btcoexist->stop_coex_dm = true;
+	btcoexist->stop_coex_dm = TRUE;
 
 	/* enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. */
 	u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x2);
@@ -5292,15 +5558,19 @@ void ex_halbtc8822b1ant_power_on_setting(IN struct btc_coexist *btcoexist)
 	/* SD1 Chunchu red x issue */
 	btcoexist->btc_write_1byte(btcoexist, 0xff1a, 0x0);
 
-	halbtc8822b1ant_enable_gnt_to_gpio(btcoexist, true);
+	halbtc8822b1ant_enable_gnt_to_gpio(btcoexist, TRUE);
 
 	/* */
-	/* S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) */
+	/* S0 or S1 setting and Local register setting
+	 * (By the setting fw can get ant number, S0/S1, ... info)
+	 */
 	/* Local setting bit define */
 	/*	BIT0: "0" for no antenna inverse; "1" for antenna inverse  */
 	/*	BIT1: "0" for internal switch; "1" for external switch */
 	/*	BIT2: "0" for one antenna; "1" for two antenna */
-	/* NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 */
+	/* NOTE: here default all internal switch and 1-antenna ==>
+	 *       BIT1=0 and BIT2=0
+	 */
 
 	u8tmp = 0;
 	board_info->btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT;
@@ -5315,40 +5585,6 @@ void ex_halbtc8822b1ant_power_on_setting(IN struct btc_coexist *btcoexist)
 
 }
 
-void ex_halbtc8822b1ant_power_on_setting_without_bt(IN struct btc_coexist
-		*btcoexist)
-{
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-	u8 u8tmp = 0x0;
-	u16 u16tmp = 0x0;
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    " 8822b 1-Ant PowerOn Setting without bt\n");
-	BTC_TRACE(trace_buf);
-
-	btcoexist->stop_coex_dm = true;
-
-	/* enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. */
-	u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x2);
-	btcoexist->btc_write_2byte(btcoexist, 0x2, u16tmp | BIT(0) | BIT(1));
-
-
-	/* SD1 Chunchu red x issue */
-	btcoexist->btc_write_1byte(btcoexist, 0xff1a, 0x0);
-
-	u8tmp = 0;
-	board_info->btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT;
-
-	if (btcoexist->chip_interface == BTC_INTF_USB)
-		btcoexist->btc_write_local_reg_1byte(btcoexist, 0xfe08, u8tmp);
-	else if (btcoexist->chip_interface == BTC_INTF_SDIO)
-		btcoexist->btc_write_local_reg_1byte(btcoexist, 0x60, u8tmp);
-
-
-
-}
-
-
 void ex_halbtc8822b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist)
 {
 }
@@ -5359,40 +5595,8 @@ void ex_halbtc8822b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], ********** (ini hw config) **********\n");
 
-	halbtc8822b1ant_init_hw_config(btcoexist, true, wifi_only);
-	btcoexist->stop_coex_dm = false;
-}
-
-void ex_halbtc8822b1ant_init_hw_config_without_bt(IN struct btc_coexist
-		*btcoexist,
-		IN boolean wifi_only)
-{
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "[BTCoex], ********** (ini hw config) **********\n");
-
-	halbtc8822b1ant_init_hw_config_without_bt(btcoexist, true, wifi_only);
-	btcoexist->stop_coex_dm = true;
-}
-
-void ex_halbtc8822b1ant_antenna_switch_without_bt(IN struct btc_coexist
-		*btcoexist)
-{
-
-	boolean wifi_under_5g = false;
-
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
-
-	if (wifi_under_5g)
-
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbd,
-						   0x3, 1);
-
-	else
-		btcoexist->btc_write_1byte_bitmask(btcoexist,
-						   0xcbd, 0x3, 2);
-
-
+	halbtc8822b1ant_init_hw_config(btcoexist, TRUE, wifi_only);
+	btcoexist->stop_coex_dm = FALSE;
 }
 
 void ex_halbtc8822b1ant_init_coex_dm(IN struct btc_coexist *btcoexist)
@@ -5401,37 +5605,29 @@ void ex_halbtc8822b1ant_init_coex_dm(IN struct btc_coexist *btcoexist)
 		    "[BTCoex], Coex Mechanism Init!!\n");
 	BTC_TRACE(trace_buf);
 
-	btcoexist->stop_coex_dm = false;
+	btcoexist->stop_coex_dm = FALSE;
 
 	halbtc8822b1ant_init_coex_dm(btcoexist);
 
 	halbtc8822b1ant_query_bt_info(btcoexist);
 }
 
+
 void ex_halbtc8822b1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 {
-
 	struct  btc_board_info		*board_info = &btcoexist->board_info;
 	struct  btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
+
 	u8				*cli_buf = btcoexist->cli_buf;
-	u8				u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
+	u8				u8tmp[4], i, ps_tdma_case = 0;
 	u16				u16tmp[4];
-	u32				fa_ofdm, fa_cck, cca_ofdm, cca_cck;
 	u32				u32tmp[4];
-	u32				fa_of_dm;
-	u32				fw_ver = 0, bt_patch_ver = 0;
+	u32				fa_ofdm, fa_cck, cca_ofdm, cca_cck;
+	u32				fw_ver = 0, bt_patch_ver = 0, bt_coex_ver = 0;
 	static u8			pop_report_in_10s = 0;
-	u32                       phyver = 0;
-	 /*u32 pnp_wake_cnt=0;*/
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "[BTCoex], ********** (display coexinfo) **********\n");
-	BTC_TRACE(trace_buf);
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		"[BTCoex], ********** displaycoexinfostart, 0xcb4/0xcbd = 0x%x/0x%x\n",
-		    btcoexist->btc_read_1byte(btcoexist, 0xcb4),
-		    btcoexist->btc_read_1byte(btcoexist, 0xcbd));
-	BTC_TRACE(trace_buf);
+	u32			phyver = 0;
+	boolean			lte_coex_on = FALSE;
+	static u8 cnt = 0;
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
 		   "\r\n ============[BT Coexist info]============");
@@ -5445,7 +5641,6 @@ void ex_halbtc8822b1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 			   "\r\n ==========================================");
 		CL_PRINTF(cli_buf);
 	}
-
 	if (btcoexist->stop_coex_dm) {
 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
 			   "\r\n ============[Coex is STOPPED]============");
@@ -5455,21 +5650,58 @@ void ex_halbtc8822b1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		CL_PRINTF(cli_buf);
 	}
 
+	if (!coex_sta->bt_disabled) {
+		if (coex_sta->bt_coex_supported_feature == 0)
+			btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_FEATURE,
+						&coex_sta->bt_coex_supported_feature);
+
+		if ((coex_sta->bt_coex_supported_version == 0) ||
+			(coex_sta->bt_coex_supported_version == 0xffff))
+			btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_VERSION,
+						&coex_sta->bt_coex_supported_version);
+
+		if (coex_sta->bt_reg_vendor_ac == 0xffff)
+			coex_sta->bt_reg_vendor_ac = (u16)(
+					btcoexist->btc_get_bt_reg(btcoexist, 3,
+					0xac) & 0xffff);
+
+		if (coex_sta->bt_reg_vendor_ae == 0xffff)
+			coex_sta->bt_reg_vendor_ae = (u16)(
+					btcoexist->btc_get_bt_reg(btcoexist, 3,
+					0xae) & 0xffff);
+
+		btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER,
+						&bt_patch_ver);
+		btcoexist->bt_info.bt_get_fw_ver = bt_patch_ver;
+
+		if (coex_sta->num_of_profile > 0) {
+			cnt++;
+
+			if (cnt >= 3) {
+				btcoexist->btc_get_bt_afh_map_from_bt(btcoexist, 0,
+					&coex_sta->bt_afh_map[0]);
+				cnt = 0;
+			}
+		}
+	}
+
 	if (psd_scan->ant_det_try_count == 0) {
 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "\r\n %-35s = %d/ %d/ %d/ %d",
+			   "\r\n %-35s = %d/ %d/ %s / %d",
 			   "Ant PG Num/ Mech/ Pos/ RFE",
 			   board_info->pg_ant_num, board_info->btdm_ant_num,
-			   board_info->btdm_ant_pos,
+			   (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT
+			    ? "Main" : "Aux"),
 			   rfe_type->rfe_module_type);
 		CL_PRINTF(cli_buf);
 	} else {
 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "\r\n %-35s = %d/ %d/ %d/ %d  (%d/%d/%d)",
+			   "\r\n %-35s = %d/ %d/ %s/ %d  (%d/%d/%d)",
 			   "Ant PG Num/ Mech(Ant_Det)/ Pos/ RFE",
 			   board_info->pg_ant_num,
 			   board_info->btdm_ant_num_by_ant_det,
-			   board_info->btdm_ant_pos,
+			   (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT
+			    ? "Main" : "Aux"),
 			   rfe_type->rfe_module_type,
 			   psd_scan->ant_det_try_count,
 			   psd_scan->ant_det_fail_count,
@@ -5477,27 +5709,38 @@ void ex_halbtc8822b1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		CL_PRINTF(cli_buf);
 
 		if (board_info->btdm_ant_det_finish) {
-			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
-				   "Ant Det PSD Value",
-				   psd_scan->ant_det_peak_val);
+
+			if (psd_scan->ant_det_result != 12)
+				CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+					   "\r\n %-35s = %s",
+					   "Ant Det PSD Value",
+					   psd_scan->ant_det_peak_val);
+			else
+				CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+					   "\r\n %-35s = %d",
+					   "Ant Det PSD Value",
+					   psd_scan->ant_det_psd_scan_peak_val
+					   / 100);
 			CL_PRINTF(cli_buf);
 		}
 	}
-	/*btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);*/
+
 	bt_patch_ver = btcoexist->bt_info.bt_get_fw_ver;
 	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
 	phyver = btcoexist->btc_get_bt_phydm_version(btcoexist);
+
+	bt_coex_ver = ((coex_sta->bt_coex_supported_version & 0xff00) >> 8);
+
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
 		   "\r\n %-35s = %d_%02x/ 0x%02x/ 0x%02x (%s)",
 		   "CoexVer WL/  BT_Desired/ BT_Report",
 		   glcoex_ver_date_8822b_1ant, glcoex_ver_8822b_1ant,
 		   glcoex_ver_btdesired_8822b_1ant,
-		   ((coex_sta->bt_coex_supported_version & 0xff00) >>
-		    8),
-		   (((coex_sta->bt_coex_supported_version & 0xff00) >>
-		     8) >=
-		    glcoex_ver_btdesired_8822b_1ant ? "Match" :
-		    "Mis-Match"));
+		   bt_coex_ver,
+		   (bt_coex_ver == 0xff ? "Unknown" :
+		    (coex_sta->bt_disabled ? "BT-disable" :
+		     (bt_coex_ver >= glcoex_ver_btdesired_8822b_1ant ?
+		      "Match" : "Mis-Match"))));
 	CL_PRINTF(cli_buf);
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
@@ -5507,20 +5750,11 @@ void ex_halbtc8822b1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		   coex_sta->cut_version + 65);
 	CL_PRINTF(cli_buf);
 
-
-
-
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
-		   "Wifi channel informed to BT",
+		   "AFH Map to BT",
 		   coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1],
 		   coex_dm->wifi_chnl_info[2]);
 	CL_PRINTF(cli_buf);
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s",
-		   "WifibHiPri/ Ccklock/ CckEverLock",
-		   (coex_sta->wifi_is_high_pri_task ? "Yes" : "No"),
-		   (coex_sta->cck_lock ? "Yes" : "No"),
-		   (coex_sta->cck_ever_lock ? "Yes" : "No"));
-	CL_PRINTF(cli_buf);
 
 	/* wifi status */
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
@@ -5533,48 +5767,126 @@ void ex_halbtc8822b1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_PRINTF(cli_buf);
 
 	pop_report_in_10s++;
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d/ %d] ",
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+		   "\r\n %-35s = [%s/ %d dBm/ %d/ %d] ",
 		   "BT [status/ rssi/ retryCnt/ popCnt]",
 		   ((coex_sta->bt_disabled) ? ("disabled") :	((
-		   coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan")
+			   coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page")
 			   : ((BT_8822B_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
 			       coex_dm->bt_status) ? "non-connected idle" :
-		((BT_8822B_1ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)
+		((coex_dm->bt_status == BT_8822B_1ANT_BT_STATUS_CONNECTED_IDLE)
 				       ? "connected-idle" : "busy")))),
 		   coex_sta->bt_rssi - 100, coex_sta->bt_retry_cnt,
 		   coex_sta->pop_event_cnt);
 	CL_PRINTF(cli_buf);
-	/*bt rssi */
-	/*bt pop_even_cnt : bt retry*/
 
 	if (pop_report_in_10s >= 5) {
 		coex_sta->pop_event_cnt = 0;
 		pop_report_in_10s = 0;
 	}
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n %-35s = %d / %d / %d / %d / %d",
-		   "SCO/HID/PAN/A2DP/Hi-Pri",
-		   bt_link_info->sco_exist, bt_link_info->hid_exist,
-		   bt_link_info->pan_exist, bt_link_info->a2dp_exist,
-		   bt_link_info->bt_hi_pri_link_exist);
+	if (coex_sta->num_of_profile != 0)
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+			   "\r\n %-35s = %s%s%s%s%s",
+			   "Profiles",
+			   ((bt_link_info->a2dp_exist) ?
+			   ((coex_sta->is_bt_a2dp_sink) ? "A2DP sink," :
+			    "A2DP,") : ""),
+			   ((bt_link_info->sco_exist) ?  "HFP," : ""),
+			   ((bt_link_info->hid_exist) ?
+			    ((coex_sta->hid_busy_num >= 2) ? "HID(4/18)," :
+			     "HID(2/18),") : ""),
+			   ((bt_link_info->pan_exist) ?  "PAN," : ""),
+			   ((coex_sta->voice_over_HOGP) ? "Voice" : ""));
+	else
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+			   "\r\n %-35s = None", "Profiles");
+
 	CL_PRINTF(cli_buf);
 
-	{
-		bt_info_ext = coex_sta->bt_info_ext;
+	if (bt_link_info->a2dp_exist) {
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %s",
+			   "A2DP Rate/Bitpool/Auto_Slot",
+			   ((coex_sta->is_A2DP_3M) ? "3M" : "No_3M"),
+			   coex_sta->a2dp_bit_pool,
+			   ((coex_sta->is_autoslot) ? "On" : "Off")
+			  );
+		CL_PRINTF(cli_buf);
+	}
+
+	if (bt_link_info->hid_exist) {
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
+			   "HID PairNum/Forbid_Slot",
+			   coex_sta->hid_pair_cnt,
+			   coex_sta->forbidden_slot
+			  );
+		CL_PRINTF(cli_buf);
+	}
+
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %s/ 0x%x",
+				"Role/RoleSwCnt/IgnWlact/Feature",
+				((bt_link_info->slave_role) ? "Slave" : "Master"),
+				coex_sta->cnt_RoleSwitch,
+				((coex_dm->cur_ignore_wlan_act) ? "Yes" : "No"),
+				coex_sta->bt_coex_supported_feature);
+	CL_PRINTF(cli_buf);
 
+	if ((coex_sta->bt_ble_scan_type & 0x7) != 0x0) {
 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-			   "\r\n %-35s = %s / %s / %d/ %x/ %02x",
-			   "Role/A2DP Rate/Bitpool/Feature/Ver",
-			   ((bt_link_info->slave_role) ? "Slave" : "Master"),
-			   (bt_info_ext & BIT(0)) ? "BR" : "EDR",
-			   coex_sta->a2dp_bit_pool,
-			   coex_sta->bt_coex_supported_feature,
-			((coex_sta->bt_coex_supported_version & 0xff00) >> 8));
+			"\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
+			"BLEScan Type/TV/Init/Ble",
+			coex_sta->bt_ble_scan_type,
+			(coex_sta->bt_ble_scan_type & 0x1 ?
+			coex_sta->bt_ble_scan_para[0] : 0x0),
+			(coex_sta->bt_ble_scan_type & 0x2 ?
+			coex_sta->bt_ble_scan_para[1] : 0x0),
+			(coex_sta->bt_ble_scan_type & 0x4 ?
+			coex_sta->bt_ble_scan_para[2] : 0x0));
+		CL_PRINTF(cli_buf);
+	}
+
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d",
+		   "ReInit/ReLink/IgnWlact/Page/NameReq",
+		   coex_sta->cnt_ReInit,
+		   coex_sta->cnt_setupLink,
+		   coex_sta->cnt_IgnWlanAct,
+		   coex_sta->cnt_Page,
+		   coex_sta->cnt_RemoteNameReq
+		  );
+	CL_PRINTF(cli_buf);
+
+	halbtc8822b1ant_read_score_board(btcoexist,	&u16tmp[0]);
+
+	if ((coex_sta->bt_reg_vendor_ae == 0xffff) ||
+	    (coex_sta->bt_reg_vendor_ac == 0xffff))
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = x/ x/ %04x",
+			   "0xae[4]/0xac[1:0]/Scoreboard", u16tmp[0]);
+	else
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+			   "\r\n %-35s = 0x%x/ 0x%x/ %04x",
+			   "0xae[4]/0xac[1:0]/Scoreboard",
+			   (int)((coex_sta->bt_reg_vendor_ae & BIT(4)) >> 4),
+			   coex_sta->bt_reg_vendor_ac & 0x3, u16tmp[0]);
+	CL_PRINTF(cli_buf);
+
+	if (coex_sta->num_of_profile > 0) {
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+			"\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
+			"AFH MAP",
+			coex_sta->bt_afh_map[0],
+			coex_sta->bt_afh_map[1],
+			coex_sta->bt_afh_map[2],
+			coex_sta->bt_afh_map[3],
+			coex_sta->bt_afh_map[4],
+			coex_sta->bt_afh_map[5],
+			coex_sta->bt_afh_map[6],
+			coex_sta->bt_afh_map[7],
+			coex_sta->bt_afh_map[8],
+			coex_sta->bt_afh_map[9]
+			   );
 		CL_PRINTF(cli_buf);
 	}
 
-	/*bt info*/
 	for (i = 0; i < BT_INFO_SRC_8822B_1ANT_MAX; i++) {
 		if (coex_sta->bt_info_c2h_cnt[i]) {
 			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
@@ -5598,162 +5910,148 @@ void ex_halbtc8822b1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 			"============[mechanisms] (before Manual)============");
 	else
 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
-			   "============[mechanisms]============");
-	CL_PRINTF(cli_buf);
+			   "============[Mechanisms]============");
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
-		   "SM[LowPenaltyRA]",
-		   coex_dm->cur_low_penalty_ra);
 	CL_PRINTF(cli_buf);
 
-	/*(ps)tdma*/
 	ps_tdma_case = coex_dm->cur_ps_tdma;
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s,%s)",
-		   "PS TDMA",
+		   "\r\n %-35s = %02x %02x %02x %02x %02x (case-%d, %s)",
+		   "TDMA",
 		   coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1],
 		   coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3],
 		   coex_dm->ps_tdma_para[4], ps_tdma_case,
-		   (coex_dm->cur_ps_tdma_on ? "On" : "Off"),
-		   (coex_dm->auto_tdma_adjust ? "Adj" : "Fix"));
-
-	CL_PRINTF(cli_buf);
+		   (coex_dm->cur_ps_tdma_on ? "TDMA On" : "TDMA Off"));
 
-	/*coex table type*/
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
-		   "WL/BT Coex Table Type",
-		   coex_sta->coex_table_type);
 	CL_PRINTF(cli_buf);
 
-	/*coex table :0x6c0 0x6c4 , break table: 0x6c8*/
 	u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
 	u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
 	u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
-		   "0x6c0/0x6c4/0x6c8(coexTable)",
-		   u32tmp[0], u32tmp[1], u32tmp[2]);
+		   "\r\n %-35s = %d/ 0x%x/ 0x%x/ 0x%x",
+		   "Table/0x6c0/0x6c4/0x6c8",
+		   coex_sta->coex_table_type, u32tmp[0], u32tmp[1], u32tmp[2]);
 	CL_PRINTF(cli_buf);
 
-	/*PTA : 0x778=1/3/d , WL BA,RTS,CTS :0x6cc  H/L pri */
 	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
 	u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6cc);
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
-		   "0x778/0x6cc/IgnWlanAct",
-		   u8tmp[0], u32tmp[0],  coex_dm->cur_ignore_wlan_act);
+		   "\r\n %-35s = 0x%x/ 0x%x",
+		   "0x778/0x6cc",
+		   u8tmp[0], u32tmp[0]);
 	CL_PRINTF(cli_buf);
 
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s/ %d",
+		   "AntDiv/BtCtrlLPS/LPRA/PsFail",
+		   ((board_info->ant_div_cfg) ? "On" : "Off"),
+		   ((coex_sta->force_lps_ctrl) ? "On" : "Off"),
+		   ((coex_dm->cur_low_penalty_ra) ? "On" : "Off"),
+		   coex_sta->cnt_set_ps_state_fail);
+	CL_PRINTF(cli_buf);
 
-	/*LTE : WL/LTE coex table : 0xa0 */
+	u32tmp[0] = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
+	lte_coex_on = ((u32tmp[0] & BIT(7)) >> 7) ?  TRUE : FALSE;
 
-	u32tmp[0] = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist,
-			0xa0);
+	if (lte_coex_on) {
 
-	/*LTE : BT/LTE coex table : 0xa4 */
-	u32tmp[1] = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist,
-			0xa4);
+		u32tmp[0] = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist,
+				0xa0);
+		u32tmp[1] = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist,
+				0xa4);
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
-		   "LTE Coex Table W_L/B_L",
-		   u32tmp[0] & 0xffff, u32tmp[1] & 0xffff);
-	CL_PRINTF(cli_buf);
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
+			   "LTE Coex Table W_L/B_L",
+			   u32tmp[0] & 0xffff, u32tmp[1] & 0xffff);
+		CL_PRINTF(cli_buf);
 
-	/*LTE : WL/LTE break table : 0xa8 */
-	u32tmp[0] = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist,
-			0xa8);
-	/*LTE : WL/LTE break table : 0xac */
-	u32tmp[1] = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist,
-			0xac);
-	/*LTE : LTE/WL break table : 0xb0 */
-	u32tmp[2] = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist,
-			0xb0);
-	/*LTE : LTE/BT break table : 0xb4 */
-	u32tmp[3] = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist,
-			0xb4);
+		u32tmp[0] = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist,
+				0xa8);
+		u32tmp[1] = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist,
+				0xac);
+		u32tmp[2] = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist,
+				0xb0);
+		u32tmp[3] = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist,
+				0xb4);
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
-		   "LTE Break Table W_L/B_L/L_W/L_B",
-		   u32tmp[0] & 0xffff, u32tmp[1] & 0xffff,
-		   u32tmp[2] & 0xffff, u32tmp[3] & 0xffff);
-	CL_PRINTF(cli_buf);
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+			   "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
+			   "LTE Break Table W_L/B_L/L_W/L_B",
+			   u32tmp[0] & 0xffff, u32tmp[1] & 0xffff,
+			   u32tmp[2] & 0xffff, u32tmp[3] & 0xffff);
+		CL_PRINTF(cli_buf);
+	}
 
 	/* Hw setting		 */
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
 		   "============[Hw setting]============");
 	CL_PRINTF(cli_buf);
 
-
-	u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
-	u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
-	u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
-	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
-		   "0x430/0x434/0x42a/0x456",
-		   u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
-	CL_PRINTF(cli_buf);
-
-	/*ANT setting*/
-	u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xcb4);
-	u8tmp[2] = btcoexist->btc_read_1byte(btcoexist, 0xcbd);
-	u8tmp[3] = btcoexist->btc_read_1byte(btcoexist, 0x1991);
-
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
-		   "0xcb4/0xcbd/0x1991",
-		   u8tmp[1], u8tmp[2], u8tmp[3]);
-	CL_PRINTF(cli_buf);
-
-	/*LTE on/off , Path ctrl owner*/
-	/*sy add*/
-	u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x4c);
+	u32tmp[0] = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
+	u32tmp[1] = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
 	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x73);
-	u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x64);
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
-		   "0x73/ 0x4c/ 0x64[0]", u8tmp[0],
-		   (u32tmp[0] & (BIT(24) | BIT(23))) >> 23,
-		   u8tmp[1] & 0x1);
+
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s",
+		   "LTE Coex/Path Owner",
+		   ((lte_coex_on) ? "On" : "Off"),
+		   ((u8tmp[0] & BIT(2)) ? "WL" : "BT"));
 	CL_PRINTF(cli_buf);
 
+	if (lte_coex_on) {
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+			   "\r\n %-35s = %d/ %d/ %d/ %d",
+			   "LTE 3Wire/OPMode/UART/UARTMode",
+			   (int)((u32tmp[0] & BIT(6)) >> 6),
+			   (int)((u32tmp[0] & (BIT(5) | BIT(4))) >> 4),
+			   (int)((u32tmp[0] & BIT(3)) >> 3),
+			   (int)(u32tmp[0] & (BIT(2) | BIT(1) | BIT(0))));
+		CL_PRINTF(cli_buf);
 
-	u32tmp[0] = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %s",
-		   "LTE CoexOn/Path Ctrl Owner",
-		   (int)((u32tmp[0]&BIT(7)) >> 7),
-		   ((u8tmp[0]&BIT(2)) ? "WL" : "BT"));
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
+			   "LTE_Busy/UART_Busy",
+			   (int)((u32tmp[1] & BIT(1)) >> 1),
+			   (int)(u32tmp[1] & BIT(0)));
+		CL_PRINTF(cli_buf);
+	}
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+		   "\r\n %-35s = %s (BB:%s)/ %s (BB:%s)/ %s %d",
+		   "GNT_WL_Ctrl/GNT_BT_Ctrl/Dbg",
+		   ((u32tmp[0] & BIT(12)) ? "SW" : "HW"),
+		   ((u32tmp[0] & BIT(8)) ?  "SW" : "HW"),
+		   ((u32tmp[0] & BIT(14)) ? "SW" : "HW"),
+		   ((u32tmp[0] & BIT(10)) ?  "SW" : "HW"),
+		   ((u8tmp[0] & BIT(3)) ? "On" : "Off"),
+		   coex_sta->gnt_error_cnt);
 	CL_PRINTF(cli_buf);
 
-	/*LTE mode*/
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
-		   "LTE 3Wire/OPMode/UART/UARTMode",
-		   (int)((u32tmp[0]&BIT(6)) >> 6),
-		   (int)((u32tmp[0] & (BIT(5) | BIT(4))) >> 4),
-		   (int)((u32tmp[0]&BIT(3)) >> 3),
-		   (int)(u32tmp[0] & (BIT(2) | BIT(1) | BIT(0))));
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
+		   "GNT_WL/GNT_BT",
+		   (int)((u32tmp[1] & BIT(2)) >> 2),
+		   (int)((u32tmp[1] & BIT(3)) >> 3));
 	CL_PRINTF(cli_buf);
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %s",
-		   "GNT_WL_SWCtrl/GNT_BT_SWCtrl/Dbg",
-		   (int)((u32tmp[0]&BIT(12)) >> 12),
-		   (int)((u32tmp[0]&BIT(14)) >> 14),
-		   ((u8tmp[0]&BIT(3)) ? "On" : "Off"));
-	CL_PRINTF(cli_buf);
 
-	u32tmp[0] = halbtc8822b1ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
+	u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xcb0);
+	u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xcb4);
+	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xcba);
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
-		   "GNT_WL/GNT_BT/LTE_Busy/UART_Busy",
-		   (int)((u32tmp[0]&BIT(2)) >> 2),
-		   (int)((u32tmp[0]&BIT(3)) >> 3),
-		   (int)((u32tmp[0]&BIT(1)) >> 1), (int)(u32tmp[0]&BIT(0)));
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+		   "\r\n %-35s = 0x%04x/ 0x%04x/ 0x%02x %s",
+		   "0xcb0/0xcb4/0xcb8[23:16]",
+		   u32tmp[0], u32tmp[1], u8tmp[0],
+		   ((u8tmp[0] & 0x1) == 0x1 ?  "(BTG)" :   "(WL_A+G)"));
 	CL_PRINTF(cli_buf);
 
-
+	u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x4c);
+	u8tmp[2] = btcoexist->btc_read_1byte(btcoexist, 0x64);
 	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x4c6);
 	u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x40);
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
-		   "0x4c6[4]/0x40[5] (WL/BT PTA)",
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+		   "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
+		   "4c[24:23]/64[0]/4c6[4]/40[5]",
+		   (int)((u32tmp[0] & (BIT(24) | BIT(23))) >> 23),
+		   u8tmp[2] & 0x1,
 		   (int)((u8tmp[0] & BIT(4)) >> 4),
 		   (int)((u8tmp[1] & BIT(5)) >> 5));
 	CL_PRINTF(cli_buf);
@@ -5762,6 +6060,7 @@ void ex_halbtc8822b1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
 	u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x953);
 	u8tmp[2] = btcoexist->btc_read_1byte(btcoexist, 0xc50);
+
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
 		   "\r\n %-35s = 0x%x/ 0x%x/ %s/ 0x%x",
 		   "0x550/0x522/4-RxAGC/0xc50",
@@ -5798,42 +6097,29 @@ void ex_halbtc8822b1ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_PRINTF(cli_buf);
 #endif
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s",
-		   "Wifi-HiPri/ Ccklock/ CckEverLock",
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s/ %d",
+		   "WlHiPri/ Locking/ Locked/ Noisy",
 		   (coex_sta->wifi_is_high_pri_task ? "Yes" : "No"),
 		   (coex_sta->cck_lock ? "Yes" : "No"),
-		   (coex_sta->cck_ever_lock ? "Yes" : "No"));
+		   (coex_sta->cck_ever_lock ? "Yes" : "No"),
+		   coex_sta->wl_noisy_level);
 	CL_PRINTF(cli_buf);
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
-		   "0x770(high-pri rx/tx)",
+		   "0x770(Hi-pri rx/tx)",
 		   coex_sta->high_priority_rx, coex_sta->high_priority_tx);
 	CL_PRINTF(cli_buf);
-	/*0x774:bt low pri trx*/
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
-		   "0x774(low-pri rx/tx)",
-		   coex_sta->low_priority_rx, coex_sta->low_priority_tx);
-	CL_PRINTF(cli_buf);
-
-	halbtc8822b1ant_read_score_board(btcoexist,	&u16tmp[0]);
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %04x",
-		   "ScoreBoard[14:0] (from BT)", u16tmp[0]);
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s",
+		   "0x774(Lo-pri rx/tx)",
+		   coex_sta->low_priority_rx, coex_sta->low_priority_tx,
+		   (bt_link_info->slave_role ? "(Slave!!)" : (
+		   coex_sta->is_tdma_btautoslot_hang ? "(auto-slot hang!!)" : "")));
+	CL_PRINTF(cli_buf);
 
 	btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		"[BTCoex], ********** displaycoexinfo end, 0xcb4/0xcbd = 0x%x/0x%x\n",
-		    btcoexist->btc_read_1byte(btcoexist, 0xcb4),
-		    btcoexist->btc_read_1byte(btcoexist, 0xcbd));
-	BTC_TRACE(trace_buf);
-	/*
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], ********** pnp_wake_cnt = %d\n", pnp_wake_cnt);
-	BTC_TRACE(trace_buf);
-	*/
 }
 
-
 void ex_halbtc8822b1ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
 {
 
@@ -5846,127 +6132,146 @@ void ex_halbtc8822b1ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], IPS ENTER notify\n");
 		BTC_TRACE(trace_buf);
-		coex_sta->under_ips = true;
+		coex_sta->under_ips = TRUE;
 
 		/* Write WL "Active" in Score-board for LPS off */
 		halbtc8822b1ant_post_state_to_bt(btcoexist,
-				BT_8822B_1ANT_SCOREBOARD_ACTIVE, false);
+				BT_8822B_1ANT_SCOREBOARD_ACTIVE, FALSE);
 
 		halbtc8822b1ant_post_state_to_bt(btcoexist,
-				BT_8822B_1ANT_SCOREBOARD_ONOFF, false);
+				BT_8822B_1ANT_SCOREBOARD_ONOFF, FALSE);
+		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 
-		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
 
 		halbtc8822b1ant_set_ant_path(btcoexist,
 					     BTC_ANT_PATH_AUTO,
 					     FORCE_EXEC,
 					     BT_8822B_1ANT_PHASE_WLAN_OFF);
 
-		halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+
 	} else if (BTC_IPS_LEAVE == type) {
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], IPS LEAVE notify\n");
 		BTC_TRACE(trace_buf);
 		halbtc8822b1ant_post_state_to_bt(btcoexist,
-				BT_8822B_1ANT_SCOREBOARD_ACTIVE, true);
+				BT_8822B_1ANT_SCOREBOARD_ACTIVE, TRUE);
 
 		halbtc8822b1ant_post_state_to_bt(btcoexist,
-				BT_8822B_1ANT_SCOREBOARD_ONOFF, true);
+				BT_8822B_1ANT_SCOREBOARD_ONOFF, TRUE);
 
 		/*leave IPS : run ini hw config (exclude wifi only)*/
-		halbtc8822b1ant_init_hw_config(btcoexist, false, false);
+		halbtc8822b1ant_init_hw_config(btcoexist, FALSE, FALSE);
 		/*sw all off*/
 		halbtc8822b1ant_init_coex_dm(btcoexist);
 		/*leave IPS : Query bt info*/
 		halbtc8822b1ant_query_bt_info(btcoexist);
 
-		coex_sta->under_ips = false;
+		coex_sta->under_ips = FALSE;
 	}
 }
 
 void ex_halbtc8822b1ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type)
 {
+	static boolean  pre_force_lps_on = FALSE;
+
 	if (btcoexist->manual_control || btcoexist->stop_coex_dm)
 		return;
 
-	if (BTC_LPS_ENABLE == type) {
+	if (type == BTC_LPS_ENABLE) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], LPS ENABLE notify\n");
 		BTC_TRACE(trace_buf);
-		coex_sta->under_lps = true;
+		coex_sta->under_lps = TRUE;
 
-		if (coex_sta->force_lps_on == true) { /* LPS No-32K */
+		if (coex_sta->force_lps_ctrl) { /* LPS No-32K */
 			/* Write WL "Active" in Score-board for PS-TDMA */
+			pre_force_lps_on = TRUE;
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], LPS ENABLE notify-force LPS control\n");
+		BTC_TRACE(trace_buf);
 			halbtc8822b1ant_post_state_to_bt(btcoexist,
-					 BT_8822B_1ANT_SCOREBOARD_ACTIVE, true);
-
-		} else { /* LPS-32K, need check if this h2c 0x71 can work?? (2015/08/28) */
+					 BT_8822B_1ANT_SCOREBOARD_ACTIVE, TRUE);
+		} else {
+			/* LPS-32K, need check if this h2c 0x71 can work??
+			 * (2015/08/28)
+			 */
 			/* Write WL "Non-Active" in Score-board for Native-PS */
+			pre_force_lps_on = FALSE;
 			halbtc8822b1ant_post_state_to_bt(btcoexist,
-				 BT_8822B_1ANT_SCOREBOARD_ACTIVE, false);
-
+				 BT_8822B_1ANT_SCOREBOARD_ACTIVE, FALSE);
 		}
 	} else if (BTC_LPS_DISABLE == type) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], LPS DISABLE notify\n");
 		BTC_TRACE(trace_buf);
-		coex_sta->under_lps = false;
+		coex_sta->under_lps = FALSE;
 
 		/* Write WL "Active" in Score-board for LPS off */
 		halbtc8822b1ant_post_state_to_bt(btcoexist,
-					 BT_8822B_1ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8822B_1ANT_SCOREBOARD_ACTIVE, TRUE);
 
+		if ((!pre_force_lps_on) && (!coex_sta->force_lps_ctrl))
+			halbtc8822b1ant_query_bt_info(btcoexist);
 	}
 }
 
-
 void ex_halbtc8822b1ant_scan_notify(IN struct btc_coexist *btcoexist,
 				    IN u8 type)
 {
-	boolean	wifi_connected = false;
-	boolean wifi_under_5g = false;
+	boolean	wifi_connected = FALSE;
+	boolean wifi_under_5g = FALSE;
 
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "[BTCoex], SCAN notify()\n");
-	BTC_TRACE(trace_buf);
+	if (btcoexist->manual_control ||
+	    btcoexist->stop_coex_dm)
+		return;
+
+	coex_sta->freeze_coexrun_by_btinfo = FALSE;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
 			   &wifi_connected);
 
+	if (wifi_connected)
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], ********** WL connected before SCAN\n");
+	else
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], **********  WL is not connected before SCAN\n");
 
+	BTC_TRACE(trace_buf);
 
-	if (btcoexist->manual_control ||
-	    btcoexist->stop_coex_dm)
-		return;
+	halbtc8822b1ant_query_bt_info(btcoexist);
 
+		/*2.4 g 1*/
 	if (BTC_SCAN_START == type) {
 		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
+		/*5 g 1*/
 
 		if (wifi_under_5g) {
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], ********** (scan_notify_5g_scan_start) **********\n");
+				"[BTCoex], ********** (scan_notify_5g_scan_action 1) **********\n");
 			BTC_TRACE(trace_buf);
 			halbtc8822b1ant_action_wifi_under5g(btcoexist);
 			return;
 		}
 
-		/* under 2.4G */
-		coex_sta->wifi_is_high_pri_task = true;
+		/* 2.4G.2.3*/
+		coex_sta->wifi_is_high_pri_task = TRUE;
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], ********** (scan_notify_2g_scan_start) **********\n");
+			"[BTCoex], ********** (scan_notify_start action) **********\n");
 		BTC_TRACE(trace_buf);
 
 		if (!wifi_connected) {	/* non-connected scan */
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], ********** wifi is not connected scan **********\n");
+				"[BTCoex], ********** wifi not connected 2g scan action 1 **********\n");
 			BTC_TRACE(trace_buf);
 			halbtc8822b1ant_action_wifi_not_connected_scan(
 				btcoexist);
 		} else {	/* wifi is connected */
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], ********** wifi is connected scan **********\n");
+				"[BTCoex], ********** wifi connected 2g scan action 2 **********\n");
 			BTC_TRACE(trace_buf);
 			halbtc8822b1ant_action_wifi_connected_scan(
 				btcoexist);
@@ -5976,7 +6281,7 @@ void ex_halbtc8822b1ant_scan_notify(IN struct btc_coexist *btcoexist,
 	}
 
 	if (BTC_SCAN_START_2G == type) {
-		coex_sta->wifi_is_high_pri_task = true;
+		coex_sta->wifi_is_high_pri_task = TRUE;
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], ********** (scan_notify_2g_sacn_start_for_switch_band_used) **********\n");
@@ -5984,21 +6289,22 @@ void ex_halbtc8822b1ant_scan_notify(IN struct btc_coexist *btcoexist,
 
 		if (!wifi_connected) {	/* non-connected scan */
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], ********** wifi is not connected **********\n");
+				"[BTCoex], ********** wifi not connected 2g scan action 3 **********\n");
 			BTC_TRACE(trace_buf);
 
 			halbtc8822b1ant_action_wifi_not_connected_scan(
 				btcoexist);
 		} else	{ /* wifi is connected */
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], ********** wifi is connected **********\n");
+				"[BTCoex], ********** wifi connected 2g sacn action 4**********\n");
 			BTC_TRACE(trace_buf);
 			halbtc8822b1ant_action_wifi_connected_scan(btcoexist);
 		}
 	} else {
-		coex_sta->wifi_is_high_pri_task = false;
+		coex_sta->wifi_is_high_pri_task = FALSE;
 
-		/*WL scan finish , then get and update sacn ap numbers */
+		/* 2.4G 5 WL scan finish, then get and update sacn ap numbers */
+		/*5 g 4*/
 		btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
 				   &coex_sta->scan_ap_num);
 
@@ -6010,7 +6316,7 @@ void ex_halbtc8822b1ant_scan_notify(IN struct btc_coexist *btcoexist,
 			halbtc8822b1ant_action_wifi_not_connected(btcoexist);
 		else {
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], ********** scan_finish_notify wifi is connected **********\n");
+				"[BTCoex], ********** scan_finish_notify action wifi connected **********\n");
 			BTC_TRACE(trace_buf);
 			halbtc8822b1ant_action_wifi_connected(btcoexist);
 		}
@@ -6023,7 +6329,7 @@ void ex_halbtc8822b1ant_scan_notify_without_bt(IN struct btc_coexist *btcoexist,
 		IN u8 type)
 {
 
-	boolean wifi_under_5g = false;
+	boolean wifi_under_5g = FALSE;
 
 	if (BTC_SCAN_START == type) {
 		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
@@ -6046,10 +6352,6 @@ void ex_halbtc8822b1ant_scan_notify_without_bt(IN struct btc_coexist *btcoexist,
 void ex_halbtc8822b1ant_switchband_notify(IN struct btc_coexist *btcoexist,
 		IN u8 type)
 {
-
-	boolean wifi_connected = false;
-
-
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], ********** (switchband_notify) **********\n");
 	BTC_TRACE(trace_buf);
@@ -6058,10 +6360,11 @@ void ex_halbtc8822b1ant_switchband_notify(IN struct btc_coexist *btcoexist,
 	    btcoexist->stop_coex_dm)
 		return;
 
-
+	coex_sta->switch_band_notify_to = type;
+		/*2.4g 4.*//*5 g 2*/
 	if (type == BTC_SWITCH_TO_5G) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], ********** (switchband_notify BTC_SWITCH_TO_5G) **********\n");
+			"[BTCoex], ********** (switchband_notify 5g action 2) **********\n");
 		BTC_TRACE(trace_buf);
 
 		halbtc8822b1ant_action_wifi_under5g(btcoexist);
@@ -6072,15 +6375,17 @@ void ex_halbtc8822b1ant_switchband_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 
 		halbtc8822b1ant_run_coexist_mechanism(btcoexist);
+		/*5 g 3*/
 
 	} else {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], ********** (switchband_notify BTC_SWITCH_TO_2G) **********\n");
+			"[BTCoex], ********** (switchband_notify 2g action 5) **********\n");
 		BTC_TRACE(trace_buf);
 
 		ex_halbtc8822b1ant_scan_notify(btcoexist,
 					       BTC_SCAN_START_2G);
 	}
+	coex_sta->switch_band_notify_to = BTC_NOT_SWITCH;
 
 }
 
@@ -6089,7 +6394,7 @@ void ex_halbtc8822b1ant_switchband_notify_without_bt(IN struct btc_coexist
 		*btcoexist,
 		IN u8 type)
 {
-	boolean wifi_under_5g = false;
+	boolean wifi_under_5g = FALSE;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
 
@@ -6119,14 +6424,14 @@ void ex_halbtc8822b1ant_switchband_notify_without_bt(IN struct btc_coexist
 void ex_halbtc8822b1ant_connect_notify(IN struct btc_coexist *btcoexist,
 				       IN u8 type)
 {
-	boolean	wifi_connected = false;
+	boolean	wifi_connected = FALSE;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], ********** (connect notify) **********\n");
 	BTC_TRACE(trace_buf);
 
 	halbtc8822b1ant_post_state_to_bt(btcoexist,
-					 BT_8822B_1ANT_SCOREBOARD_SCAN, true);
+					 BT_8822B_1ANT_SCOREBOARD_SCAN, TRUE);
 
 	if (btcoexist->manual_control ||
 	    btcoexist->stop_coex_dm)
@@ -6163,7 +6468,7 @@ void ex_halbtc8822b1ant_connect_notify(IN struct btc_coexist *btcoexist,
 			    "[BTCoex], 2G CONNECT START notify\n");
 		BTC_TRACE(trace_buf);
 
-		coex_sta->wifi_is_high_pri_task = true;
+		coex_sta->wifi_is_high_pri_task = TRUE;
 
 		halbtc8822b1ant_set_ant_path(btcoexist,
 					     BTC_ANT_PATH_AUTO,
@@ -6174,12 +6479,15 @@ void ex_halbtc8822b1ant_connect_notify(IN struct btc_coexist *btcoexist,
 
 		halbtc8822b1ant_action_wifi_not_connected_asso_auth(btcoexist);
 
+		coex_sta->freeze_coexrun_by_btinfo = TRUE;
+
 	} else {
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], 2G CONNECT Finish notify\n");
 		BTC_TRACE(trace_buf);
-		coex_sta->wifi_is_high_pri_task = false;
+		coex_sta->wifi_is_high_pri_task = FALSE;
+		coex_sta->freeze_coexrun_by_btinfo = FALSE;
 
 		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
 				   &wifi_connected);
@@ -6195,12 +6503,8 @@ void ex_halbtc8822b1ant_connect_notify(IN struct btc_coexist *btcoexist,
 void ex_halbtc8822b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
 		IN u8 type)
 {
-	boolean			wifi_under_b_mode = false;
-	boolean wifi_under_5g = false;
-	u32			cnt_bt_cal_chk = 0;
-	boolean			is_in_mp_mode = false;
-	u8			u8tmp = 0;
-	u32			u32tmp1 = 0, u32tmp2 = 0;
+	boolean			wifi_under_b_mode = FALSE;
+	boolean wifi_under_5g = FALSE;
 
 
 	if (btcoexist->manual_control ||
@@ -6220,16 +6524,20 @@ void ex_halbtc8822b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 
 		halbtc8822b1ant_post_state_to_bt(btcoexist,
-					 BT_8822B_1ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8822B_1ANT_SCOREBOARD_ACTIVE, TRUE);
 
 		if (wifi_under_5g) {
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				    "[BTCoex], 5g media notify\n");
-BTC_TRACE(trace_buf);
+			BTC_TRACE(trace_buf);
 
 			halbtc8822b1ant_action_wifi_under5g(btcoexist);
 			return;
 		}
+		/* Force antenna setup for no scan result issue */
+		halbtc8822b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
+					     FORCE_EXEC,
+					     BT_8822B_1ANT_PHASE_2G_RUNTIME);
 
 		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE,
 				   &wifi_under_b_mode);
@@ -6245,8 +6553,10 @@ BTC_TRACE(trace_buf);
 			btcoexist->btc_write_1byte(btcoexist, 0x6cf,
 						   0x00); /* CCK Rx */
 		} else {
-			/* btcoexist->btc_write_1byte(btcoexist, 0x6cd, 0x10); */ /*CCK Tx */
-			/* btcoexist->btc_write_1byte(btcoexist, 0x6cf, 0x10); */ /*CCK Rx */
+#if 0
+			btcoexist->btc_write_1byte(btcoexist, 0x6cd, 0x10); /*CCK Tx */
+			btcoexist->btc_write_1byte(btcoexist, 0x6cf, 0x10); /*CCK Rx */
+#endif
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], ********** (media status notity not under b mode) **********\n");
 			BTC_TRACE(trace_buf);
@@ -6271,12 +6581,12 @@ BTC_TRACE(trace_buf);
 		coex_dm->arp_cnt = 0;
 
 		halbtc8822b1ant_post_state_to_bt(btcoexist,
-				 BT_8822B_1ANT_SCOREBOARD_ACTIVE, false);
+				 BT_8822B_1ANT_SCOREBOARD_ACTIVE, FALSE);
 
 		btcoexist->btc_write_1byte(btcoexist, 0x6cd, 0x0); /* CCK Tx */
 		btcoexist->btc_write_1byte(btcoexist, 0x6cf, 0x0); /* CCK Rx */
 
-		coex_sta->cck_ever_lock = false;
+		coex_sta->cck_ever_lock = FALSE;
 	}
 
 	halbtc8822b1ant_update_wifi_channel_info(btcoexist, type);
@@ -6286,7 +6596,7 @@ BTC_TRACE(trace_buf);
 void ex_halbtc8822b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
 		IN u8 type)
 {
-	boolean	under_4way = false, wifi_under_5g = false;
+	boolean	under_4way = FALSE, wifi_under_5g = FALSE;
 
 	if (btcoexist->manual_control ||
 	    btcoexist->stop_coex_dm)
@@ -6311,7 +6621,7 @@ void ex_halbtc8822b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
 			    "[BTCoex], specific Packet ---- under_4way!!\n");
 		BTC_TRACE(trace_buf);
 
-		coex_sta->wifi_is_high_pri_task = true;
+		coex_sta->wifi_is_high_pri_task = TRUE;
 		coex_sta->specific_pkt_period_cnt = 2;
 	} else if (BTC_PACKET_ARP == type) {
 
@@ -6331,7 +6641,7 @@ void ex_halbtc8822b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
 			    type);
 		BTC_TRACE(trace_buf);
 
-		coex_sta->wifi_is_high_pri_task = true;
+		coex_sta->wifi_is_high_pri_task = TRUE;
 		coex_sta->specific_pkt_period_cnt = 2;
 	}
 
@@ -6341,22 +6651,22 @@ void ex_halbtc8822b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
 
 }
 
+
 void ex_halbtc8822b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 				       IN u8 *tmp_buf, IN u8 length)
 {
-	u8				bt_info = 0;
 	u8				i, rsp_source = 0;
-	boolean				bt_busy = false;
-	boolean				wifi_connected = false;
-	boolean wifi_under_5g = false;
-
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
+	boolean				wifi_connected = FALSE;
+	boolean	wifi_scan = FALSE, wifi_link = FALSE, wifi_roam = FALSE,
+			wifi_busy = FALSE;
+	static boolean is_scoreboard_scan = FALSE;
 
-	coex_sta->c2h_bt_info_req_sent = false;
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "[BTCoex], ********** (BtInfo Notify) **********\n");
-	BTC_TRACE(trace_buf);
+	if (psd_scan->is_AntDet_running) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], bt_info_notify return for AntDet is running\n");
+		BTC_TRACE(trace_buf);
+		return;
+	}
 
 	rsp_source = tmp_buf[0] & 0xf;
 	if (rsp_source >= BT_INFO_SRC_8822B_1ANT_MAX)
@@ -6364,69 +6674,140 @@ void ex_halbtc8822b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 	coex_sta->bt_info_c2h_cnt[rsp_source]++;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source,
+		    "[BTCoex], Bt_info[%d], len=%d, data=[", rsp_source,
 		    length);
 	BTC_TRACE(trace_buf);
 
 	for (i = 0; i < length; i++) {
 		coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
-		if (i == 1)
-			bt_info = tmp_buf[i];
+
 		if (i == length - 1) {
+			/* last one */
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n",
 				    tmp_buf[i]);
 			BTC_TRACE(trace_buf);
 		} else {
+			/* normal */
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ",
 				    tmp_buf[i]);
 			BTC_TRACE(trace_buf);
 		}
 	}
 
+	coex_sta->bt_info = coex_sta->bt_info_c2h[rsp_source][1];
+	coex_sta->bt_info_ext = coex_sta->bt_info_c2h[rsp_source][4];
+	coex_sta->bt_info_ext2 = coex_sta->bt_info_c2h[rsp_source][5];
 
 	if (BT_INFO_SRC_8822B_1ANT_WIFI_FW != rsp_source) {
 
 		/* if 0xff, it means BT is under WHCK test */
-		if (bt_info == 0xff)
-			coex_sta->bt_whck_test = true;
-		else
-			coex_sta->bt_whck_test = false;
+		coex_sta->bt_whck_test = ((coex_sta->bt_info == 0xff) ? TRUE :
+					  FALSE);
+
+		coex_sta->bt_create_connection = ((
+			coex_sta->bt_info_c2h[rsp_source][2] & 0x80) ? TRUE :
+						  FALSE);
+
+		/* unit: %, value-100 to translate to unit: dBm */
+		coex_sta->bt_rssi = coex_sta->bt_info_c2h[rsp_source][3] * 2 +
+				    10;
+
+		coex_sta->c2h_bt_remote_name_req = ((
+			coex_sta->bt_info_c2h[rsp_source][2] & 0x20) ? TRUE :
+						    FALSE);
+
+		coex_sta->is_A2DP_3M = ((coex_sta->bt_info_c2h[rsp_source][2] &
+					 0x10) ? TRUE : FALSE);
+
+		coex_sta->acl_busy = ((coex_sta->bt_info_c2h[rsp_source][1] &
+				       0x9) ? TRUE : FALSE);
+
+		coex_sta->voice_over_HOGP = ((coex_sta->bt_info_ext & 0x10) ?
+					     TRUE : FALSE);
+
+		coex_sta->c2h_bt_inquiry_page = ((coex_sta->bt_info &
+			  BT_INFO_8822B_1ANT_B_INQ_PAGE) ? TRUE : FALSE);
 
-		coex_sta->bt_retry_cnt =	/* [3:0] */
-			coex_sta->bt_info_c2h[rsp_source][2] & 0xf;
+		coex_sta->a2dp_bit_pool = (((
+			coex_sta->bt_info_c2h[rsp_source][1] & 0x49) == 0x49) ?
+				   (coex_sta->bt_info_c2h[rsp_source][6] & 0x7f) : 0);
 
+		coex_sta->is_bt_a2dp_sink = (coex_sta->bt_info_c2h[rsp_source][6] & 0x80) ?
+									TRUE : FALSE;
+
+		coex_sta->bt_retry_cnt = coex_sta->bt_info_c2h[rsp_source][2] &
+					 0xf;
+
+		coex_sta->is_autoslot = coex_sta->bt_info_ext2 & 0x8;
+
+		coex_sta->forbidden_slot = coex_sta->bt_info_ext2 & 0x7;
+
+		coex_sta->hid_busy_num = (coex_sta->bt_info_ext2 & 0x30) >> 4;
+
+		coex_sta->hid_pair_cnt = (coex_sta->bt_info_ext2 & 0xc0) >> 6;
 		if (coex_sta->bt_retry_cnt >= 1)
 			coex_sta->pop_event_cnt++;
 
-		if (coex_sta->bt_info_c2h[rsp_source][2] & 0x20)
-			coex_sta->c2h_bt_page = true;
-		else
-			coex_sta->c2h_bt_page = false;
+		if (coex_sta->c2h_bt_remote_name_req)
+			coex_sta->cnt_RemoteNameReq++;
 
-		if (coex_sta->bt_info_c2h[rsp_source][2] & 0x80)
-			coex_sta->bt_create_connection = true;
-		else
-			coex_sta->bt_create_connection = false;
+		if (coex_sta->bt_info_ext & BIT(1))
+			coex_sta->cnt_ReInit++;
 
-		/* unit: %, value-100 to translate to unit: dBm */
-		coex_sta->bt_rssi = coex_sta->bt_info_c2h[rsp_source][3] * 2 +
-				    10;
+		if (coex_sta->bt_info_ext & BIT(2)) {
+			coex_sta->cnt_setupLink++;
+			coex_sta->is_setupLink = TRUE;
+			coex_sta->bt_relink_downcount = 2;
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], Re-Link start in BT info!!\n");
+			BTC_TRACE(trace_buf);
+		} else {
+			coex_sta->is_setupLink = FALSE;
+			coex_sta->bt_relink_downcount = 0;
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], Re-Link stop in BT info!!\n");
+			BTC_TRACE(trace_buf);
+		}
 
-		/* coex_sta->bt_info_c2h[rsp_source][3] * 2 - 90; */
+		if (coex_sta->bt_info_ext & BIT(3))
+			coex_sta->cnt_IgnWlanAct++;
 
-		if ((coex_sta->bt_info_c2h[rsp_source][1] & 0x49) == 0x49) {
-			coex_sta->a2dp_bit_pool =
-				coex_sta->bt_info_c2h[rsp_source][6];
-		} else
-			coex_sta->a2dp_bit_pool = 0;
+		if (coex_sta->bt_info_ext & BIT(6))
+			coex_sta->cnt_RoleSwitch++;
 
-		if (coex_sta->bt_info_c2h[rsp_source][1] & 0x9)
-			coex_sta->acl_busy = true;
+		if (coex_sta->bt_info_ext & BIT(7))
+			coex_sta->is_bt_multi_link = TRUE;
 		else
-			coex_sta->acl_busy = false;
+			coex_sta->is_bt_multi_link = FALSE;
+
+		if (coex_sta->bt_create_connection) {
+			coex_sta->cnt_Page++;
+
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY,
+					   &wifi_busy);
 
-		coex_sta->bt_info_ext =
-			coex_sta->bt_info_c2h[rsp_source][4];
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link);
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam);
+
+			if ((wifi_link) || (wifi_roam) || (wifi_scan) ||
+			    (coex_sta->wifi_is_high_pri_task) || (wifi_busy)) {
+
+				is_scoreboard_scan = TRUE;
+				halbtc8822b1ant_post_state_to_bt(btcoexist,
+					 BT_8822B_1ANT_SCOREBOARD_SCAN, TRUE);
+
+			} else
+				halbtc8822b1ant_post_state_to_bt(btcoexist,
+					 BT_8822B_1ANT_SCOREBOARD_SCAN, FALSE);
+
+		} else {
+				if (is_scoreboard_scan) {
+					halbtc8822b1ant_post_state_to_bt(btcoexist,
+						 BT_8822B_1ANT_SCOREBOARD_SCAN, FALSE);
+					is_scoreboard_scan = FALSE;
+				}
+		}
 
 		/* Here we need to resend some wifi info to BT */
 		/* because bt is reset and loss of the info. */
@@ -6434,18 +6815,17 @@ void ex_halbtc8822b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 		if ((!btcoexist->manual_control) &&
 		    (!btcoexist->stop_coex_dm)) {
 
-			/*	Re-Init */
-			if (coex_sta->bt_info_ext & BIT(1)) {
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
+					   &wifi_connected);
+
+			/*  Re-Init */
+			if ((coex_sta->bt_info_ext & BIT(1))) {
 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 					"[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n");
 				BTC_TRACE(trace_buf);
-				btcoexist->btc_get(btcoexist,
-						   BTC_GET_BL_WIFI_CONNECTED,
-						   &wifi_connected);
 				if (wifi_connected)
 					halbtc8822b1ant_update_wifi_channel_info(
-						btcoexist,
-						BTC_MEDIA_CONNECT);
+						btcoexist, BTC_MEDIA_CONNECT);
 				else
 					halbtc8822b1ant_update_wifi_channel_info(
 						btcoexist,
@@ -6460,100 +6840,41 @@ void ex_halbtc8822b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 					"[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n");
 				BTC_TRACE(trace_buf);
 				halbtc8822b1ant_ignore_wlan_act(btcoexist,
-								FORCE_EXEC,
-								false);
+							FORCE_EXEC, FALSE);
 			}
 		}
-		/* check BIT2 first ==> check if bt is under inquiry or page scan */
-		if (bt_info & BT_INFO_8822B_1ANT_B_INQ_PAGE)
-			coex_sta->c2h_bt_inquiry_page = true;
-		else
-			coex_sta->c2h_bt_inquiry_page = false;
-	}
-
-	coex_sta->num_of_profile = 0;
-
-	/* set link exist status */
-	if (!(bt_info & BT_INFO_8822B_1ANT_B_CONNECTION)) {
-		coex_sta->bt_link_exist = false;
-		coex_sta->pan_exist = false;
-		coex_sta->a2dp_exist = false;
-		coex_sta->hid_exist = false;
-		coex_sta->sco_exist = false;
-
-		coex_sta->bt_hi_pri_link_exist = false;
-	} else {	/* connection exists */
-		coex_sta->bt_link_exist = true;
-		if (bt_info & BT_INFO_8822B_1ANT_B_FTP) {
-			coex_sta->pan_exist = true;
-			coex_sta->num_of_profile++;
-		} else
-			coex_sta->pan_exist = false;
-		if (bt_info & BT_INFO_8822B_1ANT_B_A2DP) {
-			coex_sta->a2dp_exist = true;
-			coex_sta->num_of_profile++;
-		} else
-			coex_sta->a2dp_exist = false;
-		if (bt_info & BT_INFO_8822B_1ANT_B_HID) {
-			coex_sta->hid_exist = true;
-			coex_sta->num_of_profile++;
-		} else
-			coex_sta->hid_exist = false;
-		if (bt_info & BT_INFO_8822B_1ANT_B_SCO_ESCO) {
-			coex_sta->sco_exist = true;
-			coex_sta->num_of_profile++;
-		} else
-			coex_sta->sco_exist = false;
 
 	}
 
-	halbtc8822b1ant_update_bt_link_info(btcoexist);
-
-	bt_info = bt_info &
-		0x1f;  /* mask profile bit for connect-ilde identification ( for CSR case: A2DP idle --> 0x41) */
-
-	if (!(bt_info & BT_INFO_8822B_1ANT_B_CONNECTION)) {
-		coex_dm->bt_status = BT_8822B_1ANT_BT_STATUS_NON_CONNECTED_IDLE;
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
-		BTC_TRACE(trace_buf);
-	} else if (bt_info ==
-		BT_INFO_8822B_1ANT_B_CONNECTION) {	/* connection exists but no busy */
-		coex_dm->bt_status = BT_8822B_1ANT_BT_STATUS_CONNECTED_IDLE;
+	if ((coex_sta->bt_info_ext & BIT(5))) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n");
-		BTC_TRACE(trace_buf);
-	} else if ((bt_info & BT_INFO_8822B_1ANT_B_SCO_ESCO) ||
-		   (bt_info & BT_INFO_8822B_1ANT_B_SCO_BUSY)) {
-		coex_dm->bt_status = BT_8822B_1ANT_BT_STATUS_SCO_BUSY;
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n");
-		BTC_TRACE(trace_buf);
-	} else if (bt_info & BT_INFO_8822B_1ANT_B_ACL_BUSY) {
-		if (BT_8822B_1ANT_BT_STATUS_ACL_BUSY != coex_dm->bt_status)
-			coex_dm->bt_status = BT_8822B_1ANT_BT_STATUS_ACL_BUSY;
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n");
-		BTC_TRACE(trace_buf);
-	} else {
-		coex_dm->bt_status = BT_8822B_1ANT_BT_STATUS_MAX;
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n");
+			"[BTCoex], BT ext info bit4 check, query BLE Scan type!!\n");
 		BTC_TRACE(trace_buf);
+		coex_sta->bt_ble_scan_type = btcoexist->btc_get_ble_scan_type_from_bt(
+						     btcoexist);
+
+		if ((coex_sta->bt_ble_scan_type & 0x1) == 0x1)
+			coex_sta->bt_ble_scan_para[0]  =
+				btcoexist->btc_get_ble_scan_para_from_bt(btcoexist,
+						0x1);
+		if ((coex_sta->bt_ble_scan_type & 0x2) == 0x2)
+			coex_sta->bt_ble_scan_para[1]  =
+				btcoexist->btc_get_ble_scan_para_from_bt(btcoexist,
+						0x2);
+		if ((coex_sta->bt_ble_scan_type & 0x4) == 0x4)
+			coex_sta->bt_ble_scan_para[2]  =
+				btcoexist->btc_get_ble_scan_para_from_bt(btcoexist,
+						0x4);
+
 	}
 
-	if ((BT_8822B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
-	    (BT_8822B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
-	    (BT_8822B_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status))
-		bt_busy = true;
-	else
-		bt_busy = false;
 
-	btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
+	halbtc8822b1ant_update_bt_link_info(btcoexist);
 
 	halbtc8822b1ant_run_coexist_mechanism(btcoexist);
 }
 
+
 void ex_halbtc8822b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 		IN u8 type)
 {
@@ -6564,12 +6885,12 @@ void ex_halbtc8822b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], RF is turned ON!!\n");
 		BTC_TRACE(trace_buf);
-		btcoexist->stop_coex_dm = false;
+		btcoexist->stop_coex_dm = FALSE;
 
 		halbtc8822b1ant_post_state_to_bt(btcoexist,
-					 BT_8822B_1ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8822B_1ANT_SCOREBOARD_ACTIVE, TRUE);
 		halbtc8822b1ant_post_state_to_bt(btcoexist,
-					 BT_8822B_1ANT_SCOREBOARD_ONOFF, true);
+					 BT_8822B_1ANT_SCOREBOARD_ONOFF, TRUE);
 
 	} else if (BTC_RF_OFF == type) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -6577,10 +6898,10 @@ void ex_halbtc8822b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 
 		halbtc8822b1ant_post_state_to_bt(btcoexist,
-				 BT_8822B_1ANT_SCOREBOARD_ACTIVE, false);
+				 BT_8822B_1ANT_SCOREBOARD_ACTIVE, FALSE);
 		halbtc8822b1ant_post_state_to_bt(btcoexist,
-					 BT_8822B_1ANT_SCOREBOARD_ONOFF, false);
-		halbtc8822b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
+					 BT_8822B_1ANT_SCOREBOARD_ONOFF, FALSE);
+		halbtc8822b1ant_ps_tdma(btcoexist, FORCE_EXEC, FALSE, 0);
 
 		halbtc8822b1ant_set_ant_path(btcoexist,
 					     BTC_ANT_PATH_AUTO,
@@ -6588,9 +6909,9 @@ void ex_halbtc8822b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 					     BT_8822B_1ANT_PHASE_WLAN_OFF);
 		/* for test : s3 bt disppear , fail rate 1/600*/
 
-		halbtc8822b1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
+		halbtc8822b1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, TRUE);
 
-		btcoexist->stop_coex_dm = true;
+		btcoexist->stop_coex_dm = TRUE;
 	}
 }
 
@@ -6601,11 +6922,11 @@ void ex_halbtc8822b1ant_halt_notify(IN struct btc_coexist *btcoexist)
 	BTC_TRACE(trace_buf);
 
 	halbtc8822b1ant_post_state_to_bt(btcoexist,
-				 BT_8822B_1ANT_SCOREBOARD_ACTIVE, false);
+				 BT_8822B_1ANT_SCOREBOARD_ACTIVE, FALSE);
 	halbtc8822b1ant_post_state_to_bt(btcoexist,
-					 BT_8822B_1ANT_SCOREBOARD_ONOFF, false);
+					 BT_8822B_1ANT_SCOREBOARD_ONOFF, FALSE);
 
-	halbtc8822b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
+	halbtc8822b1ant_ps_tdma(btcoexist, FORCE_EXEC, FALSE, 0);
 
 	halbtc8822b1ant_set_ant_path(btcoexist,
 				     BTC_ANT_PATH_AUTO,
@@ -6613,60 +6934,67 @@ void ex_halbtc8822b1ant_halt_notify(IN struct btc_coexist *btcoexist)
 				     BT_8822B_1ANT_PHASE_WLAN_OFF);
 	/* for test : s3 bt disppear , fail rate 1/600*/
 
-	halbtc8822b1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
+	halbtc8822b1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, TRUE);
 
 	ex_halbtc8822b1ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
-
-	halbtc8822b1ant_enable_gnt_to_gpio(btcoexist, false);
-
-	btcoexist->stop_coex_dm = true;
+	btcoexist->stop_coex_dm = TRUE;
 }
 
 
 void ex_halbtc8822b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
 				   IN u8 pnp_state)
 {
-	boolean wifi_under_5g = false;
+	boolean wifi_under_5g = FALSE;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Pnp notify\n");
 	BTC_TRACE(trace_buf);
 
-btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
-	if (BTC_WIFI_PNP_SLEEP == pnp_state) {
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
+
+	if ((pnp_state == BTC_WIFI_PNP_SLEEP) ||
+	    (pnp_state == BTC_WIFI_PNP_SLEEP_KEEP_ANT)) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], Pnp notify to SLEEP\n");
 		BTC_TRACE(trace_buf);
 
 		halbtc8822b1ant_post_state_to_bt(btcoexist,
-				 BT_8822B_1ANT_SCOREBOARD_ACTIVE, false);
-		halbtc8822b1ant_post_state_to_bt(btcoexist,
-					 BT_8822B_1ANT_SCOREBOARD_ONOFF, false);
-		/*
-				halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+				BT_8822B_1ANT_SCOREBOARD_ACTIVE |
+				BT_8822B_1ANT_SCOREBOARD_ONOFF |
+				BT_8822B_1ANT_SCOREBOARD_SCAN |
+				BT_8822B_1ANT_SCOREBOARD_UNDERTEST,
+				FALSE);
 
+		if (pnp_state == BTC_WIFI_PNP_SLEEP_KEEP_ANT) {
+
+			if (wifi_under_5g)
+				halbtc8822b1ant_set_ant_path(btcoexist,
+					     BTC_ANT_PATH_AUTO, FORCE_EXEC,
+					     BT_8822B_1ANT_PHASE_5G_RUNTIME);
+			else
 				halbtc8822b1ant_set_ant_path(btcoexist,
-									BTC_ANT_PATH_AUTO,
-								FORCE_EXEC,
-								BT_8822B_1ANT_PHASE_WLAN_OFF);
+					     BTC_ANT_PATH_AUTO, FORCE_EXEC,
+					     BT_8822B_1ANT_PHASE_2G_RUNTIME);
+		} else {
 
-				halbtc8822b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-								     5);
+			halbtc8822b1ant_set_ant_path(btcoexist,
+						     BTC_ANT_PATH_AUTO,
+						     FORCE_EXEC,
+					     BT_8822B_1ANT_PHASE_WLAN_OFF);
+		}
 
-				halbtc8822b1ant_enable_gnt_to_gpio(btcoexist, false);
-		*/
-		btcoexist->stop_coex_dm = true;
+		btcoexist->stop_coex_dm = TRUE;
 	} else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) {
-		/*pnp_wake_cnt++;*/
+
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], Pnp notify to WAKE UP\n");
 		BTC_TRACE(trace_buf);
-
-		halbtc8822b1ant_post_state_to_bt(btcoexist,
-					 BT_8822B_1ANT_SCOREBOARD_ACTIVE, true);
+#if 0
 		halbtc8822b1ant_post_state_to_bt(btcoexist,
-					 BT_8822B_1ANT_SCOREBOARD_ONOFF, true);
-
-		btcoexist->stop_coex_dm = false;
+					 BT_8822B_1ANT_SCOREBOARD_ACTIVE |
+					 BT_8822B_1ANT_SCOREBOARD_ONOFF,
+					 TRUE);
+#endif
+		btcoexist->stop_coex_dm = FALSE;
 	}
 }
 
@@ -6676,19 +7004,17 @@ void ex_halbtc8822b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist)
 		"[BTCoex], *****************Coex DM Reset*****************\n");
 	BTC_TRACE(trace_buf);
 
-	halbtc8822b1ant_init_hw_config(btcoexist, false, false);
+	halbtc8822b1ant_init_hw_config(btcoexist, FALSE, FALSE);
 	halbtc8822b1ant_init_coex_dm(btcoexist);
 }
 
 void ex_halbtc8822b1ant_periodical(IN struct btc_coexist *btcoexist)
 {
+	boolean bt_relink_finish = FALSE;
 
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-	boolean wifi_busy = false;
-	u16 bt_scoreboard_val = 0;
-	u32 bt_patch_ver;
-	static u8 cnt = 0;
-	boolean bt_relink_finish = false;
+#if 0
+	boolean rf4ce_connected = FALSE;
+#endif
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		"[BTCoex], ==========================Periodical===========================\n");
@@ -6696,6 +7022,10 @@ void ex_halbtc8822b1ant_periodical(IN struct btc_coexist *btcoexist)
 
 #if (BT_AUTO_REPORT_ONLY_8822B_1ANT == 0)
 	halbtc8822b1ant_query_bt_info(btcoexist);
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		"[BTCoex], ==========================Periodical-auto report only===========================\n");
+	BTC_TRACE(trace_buf);
+
 #endif
 
 	halbtc8822b1ant_monitor_bt_ctr(btcoexist);
@@ -6703,17 +7033,30 @@ void ex_halbtc8822b1ant_periodical(IN struct btc_coexist *btcoexist)
 
 	halbtc8822b1ant_monitor_bt_enable_disable(btcoexist);
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
-	halbtc8822b1ant_read_score_board(btcoexist, &bt_scoreboard_val);
+#if 0
+	/*RF4CE for arris , rf4ce always on*/
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_RF4CE_CONNECTED, &rf4ce_connected);
+	if (rf4ce_connected){
+		btcoexist->btc_write_1byte_bitmask(
+					btcoexist, 0x45e, 0x8, 0x1);
 
-	if (wifi_busy) {
-		halbtc8822b1ant_post_state_to_bt(btcoexist,
-			BT_8822B_1ANT_SCOREBOARD_WLBUSY, true);
-		if (bt_scoreboard_val & BIT(6))
-			halbtc8822b1ant_query_bt_info(btcoexist);
-	} else {
-		halbtc8822b1ant_post_state_to_bt(btcoexist,
-			BT_8822B_1ANT_SCOREBOARD_WLBUSY, false);
+		halbtc8822b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+					TRUE,
+					50);
+
+		halbtc8822b1ant_coex_table_with_type(btcoexist,
+		NORMAL_EXEC, 1);
+		return;
+	}
+#endif
+
+	if (coex_sta->bt_relink_downcount != 0) {
+		coex_sta->bt_relink_downcount--;
+
+		if (coex_sta->bt_relink_downcount == 0) {
+			coex_sta->is_setupLink = FALSE;
+			bt_relink_finish = TRUE;
+		}
 	}
 
 	/* for 4-way, DHCP, EAPOL packet */
@@ -6723,7 +7066,7 @@ void ex_halbtc8822b1ant_periodical(IN struct btc_coexist *btcoexist)
 
 		if ((coex_sta->specific_pkt_period_cnt == 0) &&
 		    (coex_sta->wifi_is_high_pri_task))
-			coex_sta->wifi_is_high_pri_task = false;
+			coex_sta->wifi_is_high_pri_task = FALSE;
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], ***************** Hi-Pri Task = %s*****************\n",
@@ -6732,21 +7075,9 @@ void ex_halbtc8822b1ant_periodical(IN struct btc_coexist *btcoexist)
 		BTC_TRACE(trace_buf);
 	}
 
-	if (!coex_sta->bt_disabled) {
-		if (coex_sta->bt_coex_supported_feature == 0)
-			btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_FEATURE, &coex_sta->bt_coex_supported_feature);
-
-		if ((coex_sta->bt_coex_supported_version == 0) ||
-			(coex_sta->bt_coex_supported_version == 0xffff))
-			btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_VERSION, &coex_sta->bt_coex_supported_version);
-
-		btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
-		btcoexist->bt_info.bt_get_fw_ver = bt_patch_ver;
-
-		if (halbtc8822b1ant_is_wifi_status_changed(btcoexist))
-			halbtc8822b1ant_run_coexist_mechanism(btcoexist);
-
-	}
+	if (halbtc8822b1ant_is_wifi_status_changed(btcoexist) || (bt_relink_finish)
+		|| (coex_sta->is_set_ps_state_fail))
+		halbtc8822b1ant_run_coexist_mechanism(btcoexist);
 }
 
 void ex_halbtc8822b1ant_antenna_detection(IN struct btc_coexist *btcoexist,
@@ -6796,41 +7127,4 @@ void ex_halbtc8822b1ant_switch_band_without_bt(IN struct btc_coexist *btcoexist,
 
 }
 
-void ex_halbtc8822b1ant_init_hw_config_without_bt(IN struct btc_coexist
-		*btcoexist)
-{
-	/* enable GNT_WL */
-
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x1,
-					   0x0);
-
-	/* Antenna config */
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4e,
-					   0x80, 0x0);  /*  0x4c[23] = 0 */
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4f,
-					   0x01, 0x1);  /* 0x4c[24] = 1 */
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb4,
-		0xff, 0x77);	/* BB SW, DPDT use RFE_ctrl8 and RFE_ctrl9 as conctrol pin */
-
-
-	/* Ext switch buffer mux */
-	btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x1991,
-					   0x3, 0x0);
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbe,
-					   0x8, 0x0);
-
-	/*enable sw control gnt_wl=1 / gnt_bt=1 */
-	btcoexist->btc_write_1byte(btcoexist, 0x73, 0x0e);
-
-	btcoexist->btc_write_4byte(btcoexist, 0x1704,
-				   0x0000ff00);
-
-	btcoexist->btc_write_4byte(btcoexist, 0x1700,
-				   0xc00f0038);
-}
-
 #endif	/* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */
-
-
-
diff --git a/rtl8822BU/hal/btc/halbtc8822b1ant.h b/rtl8822BU/hal/btc/halbtc8822b1ant.h
index e84a27e..0ba1193 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8822b1ant.h
+++ b/rtl8822BU/hal/btc/halbtc8822b1ant.h
@@ -6,6 +6,7 @@
 /* *******************************************
  * The following is for 8822B 1ANT BT Co-exist definition
  * ******************************************* */
+#define BT_8822B_1ANT_COEX_DBG						0
 #define	BT_AUTO_REPORT_ONLY_8822B_1ANT				1
 
 #define	BT_INFO_8822B_1ANT_B_FTP						BIT(7)
@@ -23,6 +24,7 @@
 #define	BTC_RSSI_COEX_THRESH_TOL_8822B_1ANT		2
 
 #define  BT_8822B_1ANT_WIFI_NOISY_THRESH							150  /* max: 255 */
+#define  BT_8822B_1ANT_DEFAULT_ISOLATION						15	 /*  unit: dB */
 
 /* for Antenna detection */
 #define	BT_8822B_1ANT_ANTDET_PSDTHRES_BACKGROUND					50
@@ -114,9 +116,11 @@ enum bt_8822b_1ant_coex_algo {
 	BT_8822B_1ANT_COEX_ALGO_PANHS			= 0x6,
 	BT_8822B_1ANT_COEX_ALGO_PANEDR_A2DP		= 0x7,
 	BT_8822B_1ANT_COEX_ALGO_PANEDR_HID		= 0x8,
-	BT_8822B_1ANT_COEX_ALGO_HID_A2DP_PANEDR	= 0x9,
-	BT_8822B_1ANT_COEX_ALGO_HID_A2DP			= 0xa,
-	BT_8822B_1ANT_COEX_ALGO_MAX				= 0xb,
+	BT_8822B_1ANT_COEX_ALGO_HID_A2DP_PANEDR		= 0x9,
+	BT_8822B_1ANT_COEX_ALGO_HID_A2DP		= 0xa,
+	BT_8822B_1ANT_COEX_ALGO_NOPROFILEBUSY		= 0xb,
+	BT_8822B_1ANT_COEX_ALGO_A2DPSINK		= 0xc,
+	BT_8822B_1ANT_COEX_ALGO_MAX
 };
 
 enum bt_8822b_1ant_ext_ant_switch_type {
@@ -181,6 +185,8 @@ struct coex_dm_8822b_1ant {
 	u8		cur_lps;
 	u8		pre_rpwm;
 	u8		cur_rpwm;
+	u8		pre_fw_dac_swing_lvl;
+	u8		cur_fw_dac_swing_lvl;
 
 	/* sw mechanism */
 	boolean	pre_low_penalty_ra;
@@ -220,6 +226,8 @@ struct coex_dm_8822b_1ant {
 	u32		cur_ext_ant_switch_status;
 
 	u8		error_condition;
+	boolean		pre_agc_table_en;
+	boolean		cur_agc_table_en;
 };
 
 struct coex_sta_8822b_1ant {
@@ -229,7 +237,6 @@ struct coex_sta_8822b_1ant {
 	boolean					a2dp_exist;
 	boolean					hid_exist;
 	boolean					pan_exist;
-	boolean					bt_hi_pri_link_exist;
 	u8					num_of_profile;
 
 	boolean					under_lps;
@@ -239,32 +246,32 @@ struct coex_sta_8822b_1ant {
 	u32					high_priority_rx;
 	u32					low_priority_tx;
 	u32					low_priority_rx;
+	boolean             is_hiPri_rx_overhead;
 	s8					bt_rssi;
-	boolean					bt_tx_rx_mask;
 	u8					pre_bt_rssi_state;
 	u8					pre_wifi_rssi_state[4];
-	boolean					c2h_bt_info_req_sent;
 	u8					bt_info_c2h[BT_INFO_SRC_8822B_1ANT_MAX][10];
 	u32					bt_info_c2h_cnt[BT_INFO_SRC_8822B_1ANT_MAX];
 	boolean					bt_whck_test;
 	boolean					c2h_bt_inquiry_page;
-	boolean					c2h_bt_page;				/* Add for win8.1 page out issue */
+	boolean					c2h_bt_remote_name_req;
+	boolean					c2h_bt_page;			/* Add for win8.1 page out issue */
 	boolean					wifi_is_high_pri_task;		/* Add for win8.1 page out issue */
-	u8					bt_retry_cnt;
+
 	u8					bt_info_ext;
+	u8					bt_info_ext2;
 	u32					pop_event_cnt;
 	u8					scan_ap_num;
+	u8					bt_retry_cnt;
 
 	u32					crc_ok_cck;
 	u32					crc_ok_11g;
 	u32					crc_ok_11n;
-	u32					crc_ok_11n_agg;
 	u32					crc_ok_11n_vht;
 
 	u32					crc_err_cck;
 	u32					crc_err_11g;
 	u32					crc_err_11n;
-	u32					crc_err_11n_agg;
 	u32					crc_err_11n_vht;
 
 	boolean					cck_lock;
@@ -272,24 +279,63 @@ struct coex_sta_8822b_1ant {
 	boolean					cck_ever_lock;
 	u8					coex_table_type;
 
-	boolean					force_lps_on;
-	u32					wrong_profile_notification;
+	boolean					force_lps_ctrl;
 
 	boolean					concurrent_rx_mode_on;
 
-	u32					special_pkt_period_cnt;
-
 	u16					score_board;
+	u8					isolation_btween_wb;   /* 0~ 50 */
 
 	u8					a2dp_bit_pool;
 	u8					cut_version;
-	boolean				acl_busy;
-	boolean				wl_rf_off_on_event;
-	boolean				bt_create_connection;
-	boolean				run_time_state;
+	boolean					acl_busy;
+	boolean					bt_create_connection;
 
 	u32					bt_coex_supported_feature;
 	u32					bt_coex_supported_version;
+
+	u8					bt_ble_scan_type;
+	u32					bt_ble_scan_para[3];
+
+	boolean					run_time_state;
+	boolean					freeze_coexrun_by_btinfo;
+
+	boolean					is_A2DP_3M;
+	boolean					voice_over_HOGP;
+	u8					bt_info;
+	boolean					is_autoslot;
+	u8					forbidden_slot;
+	u8					hid_busy_num;
+	u8					hid_pair_cnt;
+
+	u32					cnt_RemoteNameReq;
+	u32					cnt_setupLink;
+	u32					cnt_ReInit;
+	u32					cnt_IgnWlanAct;
+	u32					cnt_Page;
+	u32					cnt_RoleSwitch;
+
+	u16					bt_reg_vendor_ac;
+	u16					bt_reg_vendor_ae;
+
+	boolean					is_setupLink;
+	u8					wl_noisy_level;
+	u32					gnt_error_cnt;
+	u8					bt_afh_map[10];
+	u8					bt_relink_downcount;
+	boolean					is_tdma_btautoslot;
+	boolean					is_tdma_btautoslot_hang;
+
+	u8					switch_band_notify_to;
+	boolean					is_rf_state_off;
+
+	boolean					is_hid_low_pri_tx_overhead;
+	boolean					is_bt_multi_link;
+	boolean					is_bt_a2dp_sink;
+	boolean					rf4ce_enabled;
+
+	boolean					is_set_ps_state_fail;
+	u8					cnt_set_ps_state_fail;
 };
 
 struct rfe_type_8822b_1ant {
@@ -297,7 +343,8 @@ struct rfe_type_8822b_1ant {
 	u8			rfe_module_type;
 	boolean		ext_ant_switch_exist;
 	u8			ext_ant_switch_type;
-	u8			ext_ant_switch_ctrl_polarity;		/*  iF 0: ANTSW(rfe_sel9)=0, ANTSWB(rfe_sel8)=1 =>  Ant to BT/5G */
+	/*  iF 0: ANTSW(rfe_sel9)=0, ANTSWB(rfe_sel8)=1 =>  Ant to BT/5G */
+	u8			ext_ant_switch_ctrl_polarity;
 };
 
 
@@ -340,6 +387,7 @@ struct psdscan_sta_8822b_1ant {
 	u32			psd_gen_count;
 	boolean			is_psd_running;
 	boolean			is_psd_show_max_only;
+	boolean         is_AntDet_running;
 };
 
 /* *******************************************
@@ -430,4 +478,3 @@ void ex_halbtc8822b1ant_switch_band_without_bt(IN struct btc_coexist *btcoexist,
 
 
 #endif
-
diff --git a/rtl8822BU/hal/btc/halbtc8822b2ant.c b/rtl8822BU/hal/btc/halbtc8822b2ant.c
index 80ecf21..4dc1bb4 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8822b2ant.c
+++ b/rtl8822BU/hal/btc/halbtc8822b2ant.c
@@ -29,15 +29,16 @@ static struct  psdscan_sta_8822b_2ant *psd_scan = &gl_psd_scan_8822b_2ant;
 static struct	rfe_type_8822b_2ant		gl_rfe_type_8822b_2ant;
 static struct	rfe_type_8822b_2ant		*rfe_type = &gl_rfe_type_8822b_2ant;
 
-const char *const glbt_info_src_8822b_2ant[] = {
+static const char *const glbt_info_src_8822b_2ant[] = {
 	"BT Info[wifi fw]",
 	"BT Info[bt rsp]",
 	"BT Info[bt auto report]",
 };
 
-u32	glcoex_ver_date_8822b_2ant = 20161024;
-u32	glcoex_ver_8822b_2ant = 0x33;
-u32 glcoex_ver_btdesired_8822b_2ant = 0x28;
+static u32	glcoex_ver_date_8822b_2ant = 20170518;
+static u32	glcoex_ver_8822b_2ant = 0x44;
+static u32	glcoex_ver_btdesired_8822b_2ant = 0x42;
+
 
 /* ************************************************************
  * local function proto type if needed
@@ -45,8 +46,10 @@ u32 glcoex_ver_btdesired_8822b_2ant = 0x28;
  * ************************************************************
  * local function start with halbtc8822b2ant_
  * ************************************************************ */
-u8 halbtc8822b2ant_bt_rssi_state(u8 *ppre_bt_rssi_state, u8 level_num,
-				 u8 rssi_thresh, u8 rssi_thresh1)
+static
+u8 halbtc8822b2ant_bt_rssi_state(IN struct btc_coexist *btcoexist,
+		u8 *ppre_bt_rssi_state, u8 level_num,
+		u8 rssi_thresh, u8 rssi_thresh1)
 {
 	s32			bt_rssi = 0;
 	u8			bt_rssi_state = *ppre_bt_rssi_state;
@@ -104,6 +107,8 @@ u8 halbtc8822b2ant_bt_rssi_state(u8 *ppre_bt_rssi_state, u8 level_num,
 	return bt_rssi_state;
 }
 
+
+static
 u8 halbtc8822b2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist,
 	   IN u8 *pprewifi_rssi_state, IN u8 level_num, IN u8 rssi_thresh,
 				   IN u8 rssi_thresh1)
@@ -164,6 +169,8 @@ u8 halbtc8822b2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist,
 	return wifi_rssi_state;
 }
 
+
+static
 void halbtc8822b2ant_coex_switch_threshold(IN struct btc_coexist *btcoexist,
 		IN u8 isolation_measuared)
 {
@@ -184,79 +191,61 @@ void halbtc8822b2ant_coex_switch_threshold(IN struct btc_coexist *btcoexist,
 	coex_sta->bt_coex_thres2		 = BT_8822B_2ANT_BT_RSSI_COEXSWITCH_THRES2;
 
 
-	/*
-		coex_sta->wifi_coex_thres		= interference_wl_tx + BT_8822B_2ANT_WIFI_SIR_THRES1;
-		coex_sta->wifi_coex_thres2		= interference_wl_tx + BT_8822B_2ANT_WIFI_SIR_THRES2;
-
-		coex_sta->bt_coex_thres		= interference_bt_tx + BT_8822B_2ANT_BT_SIR_THRES1;
-		coex_sta->bt_coex_thres2		= interference_bt_tx + BT_8822B_2ANT_BT_SIR_THRES2;
-	*/
-
+#if 0
+	coex_sta->wifi_coex_thres		= interference_wl_tx + BT_8822B_2ANT_WIFI_SIR_THRES1;
+	coex_sta->wifi_coex_thres2		= interference_wl_tx + BT_8822B_2ANT_WIFI_SIR_THRES2;
 
+	coex_sta->bt_coex_thres		= interference_bt_tx + BT_8822B_2ANT_BT_SIR_THRES1;
+	coex_sta->bt_coex_thres2		= interference_bt_tx + BT_8822B_2ANT_BT_SIR_THRES2;
+#endif
 
 
 
-	/*
-		if  ( BT_8822B_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 < (isolation_measuared -
-					BT_8822B_2ANT_DEFAULT_ISOLATION) )
-			coex_sta->wifi_coex_thres	 = BT_8822B_2ANT_WIFI_RSSI_COEXSWITCH_THRES1;
-		else
-			coex_sta->wifi_coex_thres =  BT_8822B_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 -  (isolation_measuared -
-					BT_8822B_2ANT_DEFAULT_ISOLATION);
 
-		if  ( BT_8822B_2ANT_BT_RSSI_COEXSWITCH_THRES1 < (isolation_measuared -
-					BT_8822B_2ANT_DEFAULT_ISOLATION) )
-			coex_sta->bt_coex_thres	 = BT_8822B_2ANT_BT_RSSI_COEXSWITCH_THRES1;
-		else
-			coex_sta->bt_coex_thres =  BT_8822B_2ANT_BT_RSSI_COEXSWITCH_THRES1 -  (isolation_measuared -
-					BT_8822B_2ANT_DEFAULT_ISOLATION);
 
-	*/
-}
+#if 0
+	if  (BT_8822B_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 < (isolation_measuared -
+				BT_8822B_2ANT_DEFAULT_ISOLATION))
+		coex_sta->wifi_coex_thres	 = BT_8822B_2ANT_WIFI_RSSI_COEXSWITCH_THRES1;
+	else
+		coex_sta->wifi_coex_thres =  BT_8822B_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 -  (isolation_measuared -
+				BT_8822B_2ANT_DEFAULT_ISOLATION);
 
+	if  (BT_8822B_2ANT_BT_RSSI_COEXSWITCH_THRES1 < (isolation_measuared -
+				BT_8822B_2ANT_DEFAULT_ISOLATION))
+		coex_sta->bt_coex_thres	 = BT_8822B_2ANT_BT_RSSI_COEXSWITCH_THRES1;
+	else
+		coex_sta->bt_coex_thres =  BT_8822B_2ANT_BT_RSSI_COEXSWITCH_THRES1 -  (isolation_measuared -
+				BT_8822B_2ANT_DEFAULT_ISOLATION);
 
-void halbtc8822b2ant_limited_rx(IN struct btc_coexist *btcoexist,
-			IN boolean force_exec, IN boolean rej_ap_agg_pkt,
-			IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size)
-{
-	boolean	reject_rx_agg = rej_ap_agg_pkt;
-	boolean	bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
-	u8	rx_agg_size = agg_buf_size;
-
-	/* ============================================ */
-	/*	Rx Aggregation related setting */
-	/* ============================================ */
-	btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
-			   &reject_rx_agg);
-	/* decide BT control aggregation buf size or not */
-	btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
-			   &bt_ctrl_rx_agg_size);
-	/* aggregation buf size, only work when BT control Rx aggregation size. */
-	btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
-	/* real update aggregation setting */
-	btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
+#endif
 }
 
+static
 void halbtc8822b2ant_query_bt_info(IN struct btc_coexist *btcoexist)
 {
 	u8			h2c_parameter[1] = {0};
-	boolean		RTL97F_8822B = false;
 
-	if (RTL97F_8822B == true)
+	if (coex_sta->bt_disabled) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], No query BT info because BT is disabled!\n");
+		BTC_TRACE(trace_buf);
 		return;
+	}
 
-	coex_sta->c2h_bt_info_req_sent = true;
 
 	h2c_parameter[0] |= BIT(0);	/* trigger */
 
 	btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
 }
 
+
+static
 void halbtc8822b2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 {
 	u32			reg_hp_txrx, reg_lp_txrx, u32tmp;
 	u32			reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
-	static u8		num_of_bt_counter_chk = 0, cnt_slave = 0;
+	static u8		num_of_bt_counter_chk = 0, cnt_slave = 0, cnt_autoslot_hang = 0;
 
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
@@ -289,17 +278,53 @@ void halbtc8822b2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 	    && (!coex_sta->under_ips)  && (!coex_sta->c2h_bt_inquiry_page) &&
 	    (coex_sta->bt_link_exist))	{
 		if (cnt_slave >= 2) {
-			bt_link_info->slave_role = true;
+			bt_link_info->slave_role = TRUE;
 			cnt_slave = 2;
-		} else
+		} else {
 			cnt_slave++;
+		}
 	} else {
 		if (cnt_slave == 0)	{
-			bt_link_info->slave_role = false;
+			bt_link_info->slave_role = FALSE;
 			cnt_slave = 0;
-		} else
+		} else {
 			cnt_slave--;
+		}
+
+	}
+
+	if (coex_sta->is_tdma_btautoslot) {
+		if ((coex_sta->low_priority_tx >= 1300) &&
+		(coex_sta->low_priority_rx <= 150)) {
+			if (cnt_autoslot_hang >= 2) {
+				coex_sta->is_tdma_btautoslot_hang = TRUE;
+				cnt_autoslot_hang = 2;
+			} else {
+				cnt_autoslot_hang++;
+			}
+		} else {
+			if (cnt_autoslot_hang == 0)	{
+				coex_sta->is_tdma_btautoslot_hang = FALSE;
+				cnt_autoslot_hang = 0;
+			} else {
+				cnt_autoslot_hang--;
+			}
+		}
+	}
 
+	if (coex_sta->sco_exist) {
+		if ((coex_sta->high_priority_tx >= 400) &&
+		(coex_sta->high_priority_rx >= 400))
+			coex_sta->is_eSCO_mode = FALSE;
+		else
+			coex_sta->is_eSCO_mode = TRUE;
+	}
+
+	if (bt_link_info->hid_only) {
+		if (coex_sta->low_priority_rx > 50)
+			coex_sta->is_hid_low_pri_tx_overhead = true;
+		else
+			coex_sta->is_hid_low_pri_tx_overhead = false;
 	}
 
 	if ((coex_sta->high_priority_tx == 0) &&
@@ -315,115 +340,181 @@ void halbtc8822b2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 
 }
 
+static
 void halbtc8822b2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 {
-#if 0
-	s32 wifi_rssi = 0;
-	boolean wifi_busy = false, wifi_under_b_mode = false;
-	static u8 cck_lock_counter = 0;
-	u32 total_cnt, reg_val1, reg_val2;
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
-	btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE,
-			   &wifi_under_b_mode);
+#if 1
+		s32 wifi_rssi = 0;
+		boolean wifi_busy = FALSE, wifi_under_b_mode = FALSE,
+			wifi_scan = FALSE;
+		boolean bt_idle = FALSE;
+		static u8 cck_lock_counter = 0, wl_noisy_count0 = 0,
+			  wl_noisy_count1 = 3, wl_noisy_count2 = 0;
+		u32 total_cnt, cck_cnt;
+		u32 cnt_crcok = 0, cnt_crcerr = 0;
+		static u8 cnt = 0;
+
+		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+		btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
+		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE,
+				   &wifi_under_b_mode);
 
-	if (coex_sta->under_ips) {
-		coex_sta->crc_ok_cck = 0;
-		coex_sta->crc_ok_11g = 0;
-		coex_sta->crc_ok_11n = 0;
-		coex_sta->crc_ok_11n_agg = 0;
-
-		coex_sta->crc_err_cck = 0;
-		coex_sta->crc_err_11g = 0;
-		coex_sta->crc_err_11n = 0;
-		coex_sta->crc_err_11n_agg = 0;
-	} else {
+		btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
+
+		coex_sta->crc_ok_cck = btcoexist->btc_phydm_query_PHY_counter(
+						   btcoexist,
+						   PHYDM_INFO_CRC32_OK_CCK);
+		coex_sta->crc_ok_11g = btcoexist->btc_phydm_query_PHY_counter(
+						   btcoexist,
+						   PHYDM_INFO_CRC32_OK_LEGACY);
+		coex_sta->crc_ok_11n = btcoexist->btc_phydm_query_PHY_counter(
+						   btcoexist,
+						   PHYDM_INFO_CRC32_OK_HT);
+		coex_sta->crc_ok_11n_vht =
+			btcoexist->btc_phydm_query_PHY_counter(
+				btcoexist,
+				PHYDM_INFO_CRC32_OK_VHT);
+
+		coex_sta->crc_err_cck = btcoexist->btc_phydm_query_PHY_counter(
+						btcoexist, PHYDM_INFO_CRC32_ERROR_CCK);
+		coex_sta->crc_err_11g =  btcoexist->btc_phydm_query_PHY_counter(
+					 btcoexist, PHYDM_INFO_CRC32_ERROR_LEGACY);
+		coex_sta->crc_err_11n = btcoexist->btc_phydm_query_PHY_counter(
+						btcoexist, PHYDM_INFO_CRC32_ERROR_HT);
+		coex_sta->crc_err_11n_vht =
+			btcoexist->btc_phydm_query_PHY_counter(
+				btcoexist,
+				PHYDM_INFO_CRC32_ERROR_VHT);
 
-		reg_val1 = btcoexist->btc_read_4byte(btcoexist, 0xf00);
-		reg_val2 = btcoexist->btc_read_4byte(btcoexist, 0xf04);
-		coex_sta->crc_ok_cck = reg_val2 & 0xffff;
-		coex_sta->crc_err_cck = (reg_val1 & 0xffff) + ((reg_val2
-					& 0xffff0000) >> 16);
+		cnt_crcok =  coex_sta->crc_ok_cck + coex_sta->crc_ok_11g
+					+ coex_sta->crc_ok_11n
+					+ coex_sta->crc_ok_11n_vht;
 
-		reg_val1 = btcoexist->btc_read_4byte(btcoexist, 0xf0c);
-		coex_sta->crc_ok_11n_agg = reg_val1 & 0xffff;
-		coex_sta->crc_err_11n_agg = (reg_val1 & 0xffff0000) >>
-					    16;
+		cnt_crcerr =  coex_sta->crc_err_cck + coex_sta->crc_err_11g
+					+ coex_sta->crc_err_11n
+					+ coex_sta->crc_err_11n_vht;
 
-		reg_val1 = btcoexist->btc_read_4byte(btcoexist, 0xf10);
-		coex_sta->crc_ok_11n = reg_val1 & 0xffff;
-		coex_sta->crc_err_11n = (reg_val1 & 0xffff0000) >> 16;
+		if ((wifi_busy) && (cnt_crcerr != 0)) {
 
-		reg_val1 = btcoexist->btc_read_4byte(btcoexist, 0xf14);
-		coex_sta->crc_ok_11g = reg_val1 & 0xffff;
-		coex_sta->crc_err_11n = (reg_val1 & 0xffff0000) >> 16;
-	}
+			coex_sta->now_crc_ratio = cnt_crcok/cnt_crcerr;
 
+			if (cnt == 0)
+				coex_sta->acc_crc_ratio = coex_sta->now_crc_ratio;
+			else
+				coex_sta->acc_crc_ratio = (coex_sta->acc_crc_ratio * 7 +
+					coex_sta->now_crc_ratio * 3)/10;
 
-	/* reset counter */
-	/*btcoexist->btc_write_1byte_bitmask(btcoexist, 0xb58, 0x1, 0x1);*/
-	/*btcoexist->btc_write_1byte_bitmask(btcoexist, 0xb58, 0x1, 0x0);*/
+			if (cnt >= 10)
+				cnt = 0;
+			else
+				cnt++;
+		}
 
-	if ((wifi_busy) && (wifi_rssi >= 30) && (!wifi_under_b_mode)) {
-		total_cnt = coex_sta->crc_ok_cck + coex_sta->crc_ok_11g
-			    +
-			    coex_sta->crc_ok_11n +
-			    coex_sta->crc_ok_11n_agg;
+		cck_cnt = coex_sta->crc_ok_cck + coex_sta->crc_err_cck;
 
 		if ((coex_dm->bt_status ==
-		     BT_8822B_2ANT_BT_STATUS_ACL_BUSY) ||
-		    (coex_dm->bt_status ==
-		     BT_8822B_2ANT_BT_STATUS_ACL_SCO_BUSY) ||
-		    (coex_dm->bt_status ==
-		     BT_8822B_2ANT_BT_STATUS_SCO_BUSY)) {
-			if (coex_sta->crc_ok_cck > (total_cnt -
-						    coex_sta->crc_ok_cck)) {
-				if (cck_lock_counter < 3)
-					cck_lock_counter++;
+			 BT_8822B_2ANT_BT_STATUS_NON_CONNECTED_IDLE) ||
+			(coex_dm->bt_status ==
+			 BT_8822B_2ANT_BT_STATUS_CONNECTED_IDLE) ||
+			(coex_sta->bt_disabled))
+			bt_idle = TRUE;
+
+		if (cck_cnt > 250) {
+			if (wl_noisy_count2 < 3)
+				wl_noisy_count2++;
+
+			if (wl_noisy_count2 == 3) {
+				wl_noisy_count0 = 0;
+				wl_noisy_count1 = 0;
+			}
+
+		} else if (cck_cnt < 50) {
+			if (wl_noisy_count0 < 3)
+				wl_noisy_count0++;
+
+			if (wl_noisy_count0 == 3) {
+				wl_noisy_count1 = 0;
+				wl_noisy_count2 = 0;
+			}
+
+		} else {
+			if (wl_noisy_count1 < 3)
+				wl_noisy_count1++;
+
+			if (wl_noisy_count1 == 3) {
+				wl_noisy_count0 = 0;
+				wl_noisy_count2 = 0;
+			}
+		}
+
+		if (wl_noisy_count2 == 3)
+			coex_sta->wl_noisy_level = 2;
+		else if (wl_noisy_count1 == 3)
+			coex_sta->wl_noisy_level = 1;
+		else
+			coex_sta->wl_noisy_level = 0;
+
+		if ((wifi_busy) && (wifi_rssi >= 30) && (!wifi_under_b_mode)) {
+			total_cnt = cnt_crcok;
+
+			if ((coex_dm->bt_status ==
+				 BT_8822B_1ANT_BT_STATUS_ACL_BUSY) ||
+				(coex_dm->bt_status ==
+				 BT_8822B_1ANT_BT_STATUS_ACL_SCO_BUSY) ||
+				(coex_dm->bt_status ==
+				 BT_8822B_1ANT_BT_STATUS_SCO_BUSY)) {
+				if (coex_sta->crc_ok_cck > (total_cnt -
+								coex_sta->crc_ok_cck)) {
+					if (cck_lock_counter < 3)
+						cck_lock_counter++;
+				} else {
+					if (cck_lock_counter > 0)
+						cck_lock_counter--;
+				}
+
 			} else {
 				if (cck_lock_counter > 0)
 					cck_lock_counter--;
 			}
-
 		} else {
 			if (cck_lock_counter > 0)
 				cck_lock_counter--;
 		}
-	} else {
-		if (cck_lock_counter > 0)
-			cck_lock_counter--;
-	}
 
-	if (!coex_sta->pre_ccklock) {
+		if (!coex_sta->pre_ccklock) {
 
-		if (cck_lock_counter >= 3)
-			coex_sta->cck_lock = true;
-		else
-			coex_sta->cck_lock = false;
-	} else {
-		if (cck_lock_counter == 0)
-			coex_sta->cck_lock = false;
-		else
-			coex_sta->cck_lock = true;
-	}
+			if (cck_lock_counter >= 3)
+				coex_sta->cck_lock = TRUE;
+			else
+				coex_sta->cck_lock = FALSE;
+		} else {
+			if (cck_lock_counter == 0)
+				coex_sta->cck_lock = FALSE;
+			else
+				coex_sta->cck_lock = TRUE;
+		}
 
-	if (coex_sta->cck_lock)
-		coex_sta->cck_ever_lock = true;
+		if (coex_sta->cck_lock)
+			coex_sta->cck_ever_lock = TRUE;
 
-	coex_sta->pre_ccklock =  coex_sta->cck_lock;
+		coex_sta->pre_ccklock =  coex_sta->cck_lock;
 
 #endif
 }
 
+
+static
 boolean halbtc8822b2ant_is_wifibt_status_changed(IN struct btc_coexist
 		*btcoexist)
 {
-	static boolean	pre_wifi_busy = false, pre_under_4way = false,
-			pre_bt_hs_on = false, pre_bt_off = false;
-	static u8 pre_hid_busy_num = 0;
-	boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
-	boolean wifi_connected = false;
+	static boolean	pre_wifi_busy = FALSE, pre_under_4way = FALSE,
+			pre_bt_hs_on = FALSE, pre_bt_off = FALSE,
+			pre_bt_slave = FALSE, pre_hid_low_pri_tx_overhead = FALSE,
+			pre_wifi_under_lps = FALSE, pre_bt_setup_link = FALSE;
+	static u8 pre_hid_busy_num = 0, pre_wl_noisy_level = 0;
+	boolean wifi_busy = FALSE, under_4way = FALSE, bt_hs_on = FALSE;
+	boolean wifi_connected = FALSE;
+	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
 			   &wifi_connected);
@@ -452,78 +543,106 @@ boolean halbtc8822b2ant_is_wifibt_status_changed(IN struct btc_coexist
 		coex_sta->bt_ble_scan_para[2] = 0;
 		coex_sta->bt_reg_vendor_ac = 0xffff;
 		coex_sta->bt_reg_vendor_ae = 0xffff;
-		return true;
+		return TRUE;
 	}
 
 
 	if (wifi_connected) {
 		if (wifi_busy != pre_wifi_busy) {
 			pre_wifi_busy = wifi_busy;
-			return true;
+			return TRUE;
 		}
 		if (under_4way != pre_under_4way) {
 			pre_under_4way = under_4way;
-			return true;
+			return TRUE;
 		}
 		if (bt_hs_on != pre_bt_hs_on) {
 			pre_bt_hs_on = bt_hs_on;
-			return true;
+			return TRUE;
+		}
+		if (coex_sta->wl_noisy_level != pre_wl_noisy_level) {
+			pre_wl_noisy_level = coex_sta->wl_noisy_level;
+			return TRUE;
 		}
+		if (coex_sta->under_lps != pre_wifi_under_lps) {
+			pre_wifi_under_lps = coex_sta->under_lps;
+			if (coex_sta->under_lps)
+				return TRUE;
+		}
+	}
 
-		if (!coex_sta->bt_disabled) {
+	if (!coex_sta->bt_disabled) {
+		if (coex_sta->hid_busy_num != pre_hid_busy_num) {
+			pre_hid_busy_num = coex_sta->hid_busy_num;
+			return TRUE;
+		}
 
-			if (coex_sta->hid_busy_num != pre_hid_busy_num) {
-				pre_hid_busy_num = coex_sta->hid_busy_num;
-				return true;
-			}
+		if (bt_link_info->slave_role != pre_bt_slave) {
+			pre_bt_slave = bt_link_info->slave_role;
+			return TRUE;
+		}
+
+		if (pre_hid_low_pri_tx_overhead != coex_sta->is_hid_low_pri_tx_overhead) {
+			pre_hid_low_pri_tx_overhead = coex_sta->is_hid_low_pri_tx_overhead;
+			return TRUE;
+		}
+
+		if (pre_bt_setup_link != coex_sta->is_setupLink) {
+			pre_bt_setup_link = coex_sta->is_setupLink;
+			return TRUE;
 		}
 	}
 
-	return false;
+	return FALSE;
 }
 
 
+static
 void halbtc8822b2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 {
 
 	struct	btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
-	boolean			bt_hs_on = false;
-	boolean		bt_busy = false;
+	boolean			bt_hs_on = FALSE;
+	boolean		bt_busy = FALSE;
 
 	coex_sta->num_of_profile = 0;
 
 	/* set link exist status */
 	if (!(coex_sta->bt_info & BT_INFO_8822B_1ANT_B_CONNECTION)) {
-		coex_sta->bt_link_exist = false;
-		coex_sta->pan_exist = false;
-		coex_sta->a2dp_exist = false;
-		coex_sta->hid_exist = false;
-		coex_sta->sco_exist = false;
+		coex_sta->bt_link_exist = FALSE;
+		coex_sta->pan_exist = FALSE;
+		coex_sta->a2dp_exist = FALSE;
+		coex_sta->hid_exist = FALSE;
+		coex_sta->sco_exist = FALSE;
 	} else {	/* connection exists */
-		coex_sta->bt_link_exist = true;
+		coex_sta->bt_link_exist = TRUE;
 		if (coex_sta->bt_info & BT_INFO_8822B_1ANT_B_FTP) {
-			coex_sta->pan_exist = true;
+			coex_sta->pan_exist = TRUE;
 			coex_sta->num_of_profile++;
-		} else
-			coex_sta->pan_exist = false;
+		} else {
+			coex_sta->pan_exist = FALSE;
+		}
 
 		if (coex_sta->bt_info & BT_INFO_8822B_1ANT_B_A2DP) {
-			coex_sta->a2dp_exist = true;
+			coex_sta->a2dp_exist = TRUE;
 			coex_sta->num_of_profile++;
-		} else
-			coex_sta->a2dp_exist = false;
+		} else {
+			coex_sta->a2dp_exist = FALSE;
+		}
 
 		if (coex_sta->bt_info & BT_INFO_8822B_1ANT_B_HID) {
-			coex_sta->hid_exist = true;
+			coex_sta->hid_exist = TRUE;
 			coex_sta->num_of_profile++;
-		} else
-			coex_sta->hid_exist = false;
+		} else {
+			coex_sta->hid_exist = FALSE;
+		}
 
 		if (coex_sta->bt_info & BT_INFO_8822B_1ANT_B_SCO_ESCO) {
-			coex_sta->sco_exist = true;
+			coex_sta->sco_exist = TRUE;
 			coex_sta->num_of_profile++;
-		} else
-			coex_sta->sco_exist = false;
+		} else {
+			coex_sta->sco_exist = FALSE;
+		}
 
 	}
 
@@ -539,8 +658,8 @@ void halbtc8822b2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 
 	/* work around for HS mode. */
 	if (bt_hs_on) {
-		bt_link_info->pan_exist = true;
-		bt_link_info->bt_link_exist = true;
+		bt_link_info->pan_exist = TRUE;
+		bt_link_info->bt_link_exist = TRUE;
 	}
 
 	/* check if Sco only */
@@ -548,38 +667,42 @@ void halbtc8822b2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 	    !bt_link_info->a2dp_exist &&
 	    !bt_link_info->pan_exist &&
 	    !bt_link_info->hid_exist)
-		bt_link_info->sco_only = true;
+		bt_link_info->sco_only = TRUE;
 	else
-		bt_link_info->sco_only = false;
+		bt_link_info->sco_only = FALSE;
 
 	/* check if A2dp only */
 	if (!bt_link_info->sco_exist &&
 	    bt_link_info->a2dp_exist &&
 	    !bt_link_info->pan_exist &&
 	    !bt_link_info->hid_exist)
-		bt_link_info->a2dp_only = true;
+		bt_link_info->a2dp_only = TRUE;
 	else
-		bt_link_info->a2dp_only = false;
+		bt_link_info->a2dp_only = FALSE;
 
 	/* check if Pan only */
 	if (!bt_link_info->sco_exist &&
 	    !bt_link_info->a2dp_exist &&
 	    bt_link_info->pan_exist &&
 	    !bt_link_info->hid_exist)
-		bt_link_info->pan_only = true;
+		bt_link_info->pan_only = TRUE;
 	else
-		bt_link_info->pan_only = false;
+		bt_link_info->pan_only = FALSE;
 
 	/* check if Hid only */
 	if (!bt_link_info->sco_exist &&
 	    !bt_link_info->a2dp_exist &&
 	    !bt_link_info->pan_exist &&
 	    bt_link_info->hid_exist)
-		bt_link_info->hid_only = true;
+		bt_link_info->hid_only = TRUE;
 	else
-		bt_link_info->hid_only = false;
+		bt_link_info->hid_only = FALSE;
 
-	if (!(coex_sta->bt_info & BT_INFO_8822B_2ANT_B_CONNECTION)) {
+	if (coex_sta->bt_info & BT_INFO_8822B_2ANT_B_INQ_PAGE) {
+		coex_dm->bt_status = BT_8822B_2ANT_BT_STATUS_INQ_PAGE;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], BtInfoNotify(), BT Inq/page!!!\n");
+	} else if (!(coex_sta->bt_info & BT_INFO_8822B_2ANT_B_CONNECTION)) {
 		coex_dm->bt_status = BT_8822B_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
@@ -614,13 +737,15 @@ void halbtc8822b2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 	if ((BT_8822B_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
 	    (BT_8822B_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
 	    (BT_8822B_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status))
-		bt_busy = true;
+		bt_busy = TRUE;
 	else
-		bt_busy = false;
+		bt_busy = FALSE;
 
 	btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
 }
 
+
+static
 void halbtc8822b2ant_update_wifi_channel_info(IN struct btc_coexist *btcoexist,
 		IN u8 type)
 {
@@ -629,7 +754,7 @@ void halbtc8822b2ant_update_wifi_channel_info(IN struct btc_coexist *btcoexist,
 	u8	wifi_central_chnl;
 	u32	RTL97F_8822B = 0;
 
-	if (RTL97F_8822B == true)
+	if (RTL97F_8822B)
 		return;
 
 	/* only 2.4G we need to inform bt the chnl mask */
@@ -637,9 +762,13 @@ void halbtc8822b2ant_update_wifi_channel_info(IN struct btc_coexist *btcoexist,
 			   &wifi_central_chnl);
 	if ((BTC_MEDIA_CONNECT == type) &&
 	    (wifi_central_chnl <= 14)) {
-		h2c_parameter[0] =
-			0x1;  /* enable BT AFH skip WL channel for 8822b because BT Rx LO interference */
-		/* h2c_parameter[0] = 0x0; */
+		/* enable BT AFH skip WL channel for 8822b
+		 * because BT Rx LO interference
+		 */
+		h2c_parameter[0] = 0x1;
+#if 0
+		h2c_parameter[0] = 0x0;
+#endif
 		h2c_parameter[1] = wifi_central_chnl;
 		btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
 		if (BTC_WIFI_BW_HT40 == wifi_bw)
@@ -656,14 +785,16 @@ void halbtc8822b2ant_update_wifi_channel_info(IN struct btc_coexist *btcoexist,
 
 }
 
+
+static
 void halbtc8822b2ant_set_fw_dac_swing_level(IN struct btc_coexist *btcoexist,
 		IN u8 dac_swing_lvl)
 {
 	u8	h2c_parameter[1] = {0};
 	u32	RTL97F_8822B = 0;
 
-	if (RTL97F_8822B == true)
-			return;
+	if (RTL97F_8822B)
+		return;
 
 	/* There are several type of dacswing */
 	/* 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */
@@ -672,12 +803,14 @@ void halbtc8822b2ant_set_fw_dac_swing_level(IN struct btc_coexist *btcoexist,
 	btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
 }
 
+
+static
 void halbtc8822b2ant_fw_dac_swing_lvl(IN struct btc_coexist *btcoexist,
 			      IN boolean force_exec, IN u8 fw_dac_swing_lvl)
 {
 	u32	RTL97F_8822B = 0;
 
-	if (RTL97F_8822B == true)
+	if (RTL97F_8822B)
 		return;
 
 	coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl;
@@ -694,13 +827,14 @@ void halbtc8822b2ant_fw_dac_swing_lvl(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
 }
 
+static
 void halbtc8822b2ant_set_fw_dec_bt_pwr(IN struct btc_coexist *btcoexist,
 				       IN u8 dec_bt_pwr_lvl)
 {
 	u32	RTL97F_8822B = 0;
 	u8	h2c_parameter[1] = {0};
 
-	if (RTL97F_8822B == true)
+	if (RTL97F_8822B)
 		return;
 
 	h2c_parameter[0] = dec_bt_pwr_lvl;
@@ -708,6 +842,7 @@ void halbtc8822b2ant_set_fw_dec_bt_pwr(IN struct btc_coexist *btcoexist,
 	btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
 }
 
+static
 void halbtc8822b2ant_dec_bt_pwr(IN struct btc_coexist *btcoexist,
 				IN boolean force_exec, IN u8 dec_bt_pwr_lvl)
 {
@@ -723,7 +858,7 @@ void halbtc8822b2ant_dec_bt_pwr(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_bt_dec_pwr_lvl = coex_dm->cur_bt_dec_pwr_lvl;
 }
 
-
+static
 void halbtc8822b2ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
 			    IN boolean force_exec, IN boolean low_penalty_ra)
 {
@@ -748,39 +883,7 @@ void halbtc8822b2ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
 
 }
 
-
-void halbtc8822b2ant_set_bt_auto_report(IN struct btc_coexist *btcoexist,
-					IN boolean enable_auto_report)
-{
-	u8	h2c_parameter[1] = {0};
-	u32	RTL97F_8822B = 0;
-
-	if (RTL97F_8822B == true)
-		return;
-
-	h2c_parameter[0] = 0;
-
-	if (enable_auto_report)
-		h2c_parameter[0] |= BIT(0);
-
-	btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
-}
-
-void halbtc8822b2ant_bt_auto_report(IN struct btc_coexist *btcoexist,
-		    IN boolean force_exec, IN boolean enable_auto_report)
-{
-	coex_dm->cur_bt_auto_report = enable_auto_report;
-
-	if (!force_exec) {
-		if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
-			return;
-	}
-	halbtc8822b2ant_set_bt_auto_report(btcoexist,
-					   coex_dm->cur_bt_auto_report);
-
-	coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
-}
-
+static
 void halbtc8822b2ant_write_score_board(
 	IN	struct  btc_coexist		*btcoexist,
 	IN	u16				bitpos,
@@ -800,6 +903,7 @@ void halbtc8822b2ant_write_score_board(
 
 }
 
+static
 void halbtc8822b2ant_read_score_board(
 	IN	struct  btc_coexist		*btcoexist,
 	IN   u16				*score_board_val
@@ -810,6 +914,7 @@ void halbtc8822b2ant_read_score_board(
 			    0xaa)) & 0x7fff;
 }
 
+static
 void halbtc8822b2ant_post_state_to_bt(
 	IN	struct  btc_coexist		*btcoexist,
 	IN	u16						type,
@@ -823,10 +928,11 @@ void halbtc8822b2ant_post_state_to_bt(
 
 
 
+static
 void halbtc8822b2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 {
 	static u32		bt_disable_cnt = 0;
-	boolean			bt_active = true, bt_disabled = false, wifi_under_5g = false;
+	boolean			bt_active = TRUE, bt_disabled = FALSE, wifi_under_5g = FALSE;
 	u16			u16tmp;
 
 	/* This function check if bt is disabled */
@@ -835,17 +941,19 @@ void halbtc8822b2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 	    coex_sta->high_priority_rx == 0 &&
 	    coex_sta->low_priority_tx == 0 &&
 	    coex_sta->low_priority_rx == 0)
-		bt_active = false;
+		bt_active = FALSE;
 	if (coex_sta->high_priority_tx == 0xffff &&
 	    coex_sta->high_priority_rx == 0xffff &&
 	    coex_sta->low_priority_tx == 0xffff &&
 	    coex_sta->low_priority_rx == 0xffff)
-		bt_active = false;
+		bt_active = FALSE;
 
 
 #else
 
-	/* Read BT on/off status from scoreboard[1], enable this only if BT patch support this feature */
+	/* Read BT on/off status from scoreboard[1],
+	 * enable this only if BT patch support this feature
+	 */
 	halbtc8822b2ant_read_score_board(btcoexist,	&u16tmp);
 
 	bt_active = u16tmp & BIT(1);
@@ -855,14 +963,14 @@ void halbtc8822b2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 
 	if (bt_active) {
 		bt_disable_cnt = 0;
-		bt_disabled = false;
+		bt_disabled = FALSE;
 		btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
 				   &bt_disabled);
 	} else {
 
 		bt_disable_cnt++;
 		if (bt_disable_cnt >= 10) {
-			bt_disabled = true;
+			bt_disabled = TRUE;
 			bt_disable_cnt = 10;
 		}
 
@@ -873,9 +981,9 @@ void halbtc8822b2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
 
 	if ((wifi_under_5g) || (bt_disabled))
-		halbtc8822b2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, false);
+		halbtc8822b2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, FALSE);
 	else
-		halbtc8822b2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, true);
+		halbtc8822b2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, TRUE);
 
 
 	if (coex_sta->bt_disabled != bt_disabled) {
@@ -889,18 +997,21 @@ void halbtc8822b2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 
 }
 
+static
 void halbtc8822b2ant_enable_gnt_to_gpio(IN struct btc_coexist *btcoexist,
 					boolean isenable)
 {
 #if BT_8822B_2ANT_COEX_DBG
 	static u8			bitVal[5] = {0, 0, 0, 0, 0};
-	static boolean		state = false;
-	/*
-		if (state ==isenable)
-			return;
-		else
-			state = isenable;
-	*/
+#if 0
+	static boolean		state = FALSE;
+
+	if (state == isenable)
+		return;
+
+	state = isenable;
+#endif
+
 	if (isenable) {
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -914,7 +1025,7 @@ void halbtc8822b2ant_enable_gnt_to_gpio(IN struct btc_coexist *btcoexist,
 		bitVal[0] = (btcoexist->btc_read_1byte(btcoexist,
 				       0x66) & BIT(4)) >> 4;	/*0x66[4] */
 		bitVal[1] = (btcoexist->btc_read_1byte(btcoexist,
-					       0x67) & BIT(0));		/*0x66[8] */
+					       0x67) & BIT(0));	/*0x66[8] */
 		bitVal[2] = (btcoexist->btc_read_1byte(btcoexist,
 				       0x42) & BIT(3)) >> 3;  /*0x40[19] */
 		bitVal[3] = (btcoexist->btc_read_1byte(btcoexist,
@@ -959,48 +1070,63 @@ void halbtc8822b2ant_enable_gnt_to_gpio(IN struct btc_coexist *btcoexist,
 #endif
 }
 
+
+static
 u32 halbtc8822b2ant_ltecoex_indirect_read_reg(IN struct btc_coexist *btcoexist,
 		IN u16 reg_addr)
 {
-	u32 j = 0;
-
+	u32 delay_count = 0;
+
+	while (1) {
+		if ((btcoexist->btc_read_1byte(btcoexist, 0x1703)&BIT(5)) == 0) {
+			delay_ms(50);
+			delay_count++;
+			if (delay_count >= 10) {
+				delay_count = 0;
+				break;
+			}
+		} else {
+			break;
+		}
+	}
 
 	/* wait for ready bit before access 0x1700		 */
 	btcoexist->btc_write_4byte(btcoexist, 0x1700, 0x800F0000 | reg_addr);
 
-	do {
-		j++;
-	} while (((btcoexist->btc_read_1byte(btcoexist,
-					     0x1703)&BIT(5)) == 0) &&
-		 (j < BT_8822B_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT));
-
-
 	return btcoexist->btc_read_4byte(btcoexist,
 					 0x1708);  /* get read data */
 
 }
 
+
+static
 void halbtc8822b2ant_ltecoex_indirect_write_reg(IN struct btc_coexist
 		*btcoexist,
 		IN u16 reg_addr, IN u32 bit_mask, IN u32 reg_value)
 {
-	u32 val, i = 0, j = 0, bitpos = 0;
+	u32 val, i = 0, bitpos = 0, delay_count = 0;
 
 
 	if (bit_mask == 0x0)
 		return;
 	if (bit_mask == 0xffffffff) {
+		/* wait for ready bit before access 0x1700/0x1704 */
+		while (1) {
+			if ((btcoexist->btc_read_1byte(btcoexist, 0x1703)&BIT(5)) == 0) {
+				delay_ms(50);
+				delay_count++;
+				if (delay_count >= 10) {
+					delay_count = 0;
+					break;
+				}
+			} else {
+				break;
+			}
+		}
+
 		btcoexist->btc_write_4byte(btcoexist, 0x1704,
 					   reg_value); /* put write data */
 
-		/* wait for ready bit before access 0x1700 */
-		do {
-			j++;
-		} while (((btcoexist->btc_read_1byte(btcoexist,
-						     0x1703)&BIT(5)) == 0) &&
-			(j < BT_8822B_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT));
-
-
 		btcoexist->btc_write_4byte(btcoexist, 0x1700,
 					   0xc00F0000 | reg_addr);
 	} else {
@@ -1016,24 +1142,31 @@ void halbtc8822b2ant_ltecoex_indirect_write_reg(IN struct btc_coexist
 				reg_addr);
 		val = (val & (~bit_mask)) | (reg_value << bitpos);
 
+		/* wait for ready bit before access 0x1700/0x1704 */
+		while (1) {
+			if ((btcoexist->btc_read_1byte(btcoexist, 0x1703)&BIT(5)) == 0) {
+				delay_ms(50);
+				delay_count++;
+				if (delay_count >= 10) {
+					delay_count = 0;
+					break;
+				}
+			} else {
+				break;
+			}
+		}
+
 		btcoexist->btc_write_4byte(btcoexist, 0x1704,
 					   val); /* put write data */
 
-		/* wait for ready bit before access 0x7c0		 */
-		do {
-			j++;
-		} while (((btcoexist->btc_read_1byte(btcoexist,
-						     0x1703)&BIT(5)) == 0) &&
-			(j < BT_8822B_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT));
-
-
 		btcoexist->btc_write_4byte(btcoexist, 0x1700,
 					   0xc00F0000 | reg_addr);
-
 	}
 
 }
 
+
+static
 void halbtc8822b2ant_ltecoex_enable(IN struct btc_coexist *btcoexist,
 				    IN boolean enable)
 {
@@ -1045,6 +1178,7 @@ void halbtc8822b2ant_ltecoex_enable(IN struct btc_coexist *btcoexist,
 
 }
 
+static
 void halbtc8822b2ant_ltecoex_pathcontrol_owner(IN struct btc_coexist *btcoexist,
 		IN boolean wifi_control)
 {
@@ -1056,6 +1190,7 @@ void halbtc8822b2ant_ltecoex_pathcontrol_owner(IN struct btc_coexist *btcoexist,
 
 }
 
+static
 void halbtc8822b2ant_ltecoex_set_gnt_bt(IN struct btc_coexist *btcoexist,
 			IN u8 control_block, IN boolean sw_control, IN u8 state)
 {
@@ -1072,7 +1207,7 @@ void halbtc8822b2ant_ltecoex_set_gnt_bt(IN struct btc_coexist *btcoexist,
 				0x38, bit_mask, val); /* 0x38[15:14] */
 		bit_mask = 0x0c00;
 		halbtc8822b2ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[11:10]						 */
+				0x38, bit_mask, val); /* 0x38[11:10] */
 		break;
 	case BT_8822B_2ANT_GNT_BLOCK_RFC:
 		bit_mask = 0xc000;
@@ -1089,6 +1224,7 @@ void halbtc8822b2ant_ltecoex_set_gnt_bt(IN struct btc_coexist *btcoexist,
 
 }
 
+static
 void halbtc8822b2ant_ltecoex_set_gnt_wl(IN struct btc_coexist *btcoexist,
 			IN u8 control_block, IN boolean sw_control, IN u8 state)
 {
@@ -1105,7 +1241,7 @@ void halbtc8822b2ant_ltecoex_set_gnt_wl(IN struct btc_coexist *btcoexist,
 				0x38, bit_mask, val); /* 0x38[13:12] */
 		bit_mask = 0x0300;
 		halbtc8822b2ant_ltecoex_indirect_write_reg(btcoexist,
-				0x38, bit_mask, val); /* 0x38[9:8]						 */
+				0x38, bit_mask, val); /* 0x38[9:8] */
 		break;
 	case BT_8822B_2ANT_GNT_BLOCK_RFC:
 		bit_mask = 0x3000;
@@ -1122,6 +1258,7 @@ void halbtc8822b2ant_ltecoex_set_gnt_wl(IN struct btc_coexist *btcoexist,
 
 }
 
+static
 void halbtc8822b2ant_ltecoex_set_coex_table(IN struct btc_coexist *btcoexist,
 		IN u8 table_type, IN u16 table_content)
 {
@@ -1144,34 +1281,43 @@ void halbtc8822b2ant_ltecoex_set_coex_table(IN struct btc_coexist *btcoexist,
 }
 
 
-void halbtc8822b2ant_ltecoex_set_break_table(IN struct btc_coexist *btcoexist,
-		IN u8 table_type, IN u8 table_content)
+static
+void halbtc8822b2ant_set_wltoggle_coex_table(IN struct btc_coexist *btcoexist,
+		IN boolean force_exec,  IN u8 interval,
+		IN u8 val0x6c4_b0, IN u8 val0x6c4_b1, IN u8 val0x6c4_b2,
+		IN u8 val0x6c4_b3)
 {
-	u16 reg_addr = 0x0000;
+	static u8 pre_h2c_parameter[6] = {0};
+	u8	cur_h2c_parameter[6] = {0};
+	u8 i, match_cnt = 0;
 
-	switch (table_type) {
-	case BT_8822B_2ANT_LBTT_WL_BREAK_LTE:
-		reg_addr = 0xa8;
-		break;
-	case BT_8822B_2ANT_LBTT_BT_BREAK_LTE:
-		reg_addr = 0xac;
-		break;
-	case BT_8822B_2ANT_LBTT_LTE_BREAK_WL:
-		reg_addr = 0xb0;
-		break;
-	case BT_8822B_2ANT_LBTT_LTE_BREAK_BT:
-		reg_addr = 0xb4;
-		break;
-	}
+	cur_h2c_parameter[0] = 0x7;	/* op_code, 0x7= wlan toggle slot*/
 
-	if (reg_addr != 0x0000)
-		halbtc8822b2ant_ltecoex_indirect_write_reg(btcoexist, reg_addr,
-			0xff, table_content); /* 0xa8[15:0] or 0xb4[15:0] */
+	cur_h2c_parameter[1] = interval;
+	cur_h2c_parameter[2] = val0x6c4_b0;
+	cur_h2c_parameter[3] = val0x6c4_b1;
+	cur_h2c_parameter[4] = val0x6c4_b2;
+	cur_h2c_parameter[5] = val0x6c4_b3;
 
+	if (!force_exec) {
+		for (i = 1; i <= 5; i++) {
+			if (cur_h2c_parameter[i] != pre_h2c_parameter[i])
+				break;
 
-}
+			match_cnt++;
+		}
+
+		if (match_cnt == 5)
+			return;
+	}
 
+	for (i = 1; i <= 5; i++)
+		pre_h2c_parameter[i] = cur_h2c_parameter[i];
 
+	btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, cur_h2c_parameter);
+}
+
+static
 void halbtc8822b2ant_set_coex_table(IN struct btc_coexist *btcoexist,
 	    IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
 {
@@ -1184,6 +1330,7 @@ void halbtc8822b2ant_set_coex_table(IN struct btc_coexist *btcoexist,
 	btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
 }
 
+static
 void halbtc8822b2ant_coex_table(IN struct btc_coexist *btcoexist,
 			IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4,
 				IN u32 val0x6c8, IN u8 val0x6cc)
@@ -1209,6 +1356,7 @@ void halbtc8822b2ant_coex_table(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
 }
 
+static
 void halbtc8822b2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 		IN boolean force_exec, IN u8 type)
 {
@@ -1217,10 +1365,10 @@ void halbtc8822b2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 
 	coex_sta->coex_table_type = type;
 
-	if (coex_sta->concurrent_rx_mode_on == true) {
+	if (coex_sta->concurrent_rx_mode_on) {
 		break_table = 0xf0ffffff;  /* set WL hi-pri can break BT */
-		select_table =
-			0x3;		/* 0xb/0x3,set Tx response = Hi-Pri/LO-Pri (ex: Transmitting ACK,BA,CTS) */
+		/* set Tx response = Hi-Pri (ex: Transmitting ACK,BA,CTS) */
+		select_table = 0xb;
 	} else {
 		break_table = 0xffffff;
 		select_table = 0x3;
@@ -1229,7 +1377,7 @@ void halbtc8822b2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 	switch (type) {
 	case 0:
 		halbtc8822b2ant_coex_table(btcoexist, force_exec,
-			   0x55555555, 0x55555555, break_table, select_table);
+			   0xffffffff, 0xffffffff, break_table, select_table);
 		break;
 	case 1:
 		halbtc8822b2ant_coex_table(btcoexist, force_exec,
@@ -1241,7 +1389,7 @@ void halbtc8822b2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 		break;
 	case 3:
 		halbtc8822b2ant_coex_table(btcoexist, force_exec,
-			   0x5a5a5a5a, 0x5a5a5a5a, break_table, select_table);
+			   0x55555555, 0x5a5a5a5a, break_table, select_table);
 		break;
 	case 4:
 		halbtc8822b2ant_coex_table(btcoexist, force_exec,
@@ -1249,11 +1397,11 @@ void halbtc8822b2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 		break;
 	case 5:
 		halbtc8822b2ant_coex_table(btcoexist, force_exec,
-			   0x55555555, 0x5a5a5a5a, break_table, select_table);
+			   0x55555555, 0x55555555, break_table, select_table);
 		break;
 	case 6:
 		halbtc8822b2ant_coex_table(btcoexist, force_exec,
-			   0x55555555, 0xaaaa5aaa, break_table, select_table);
+			   0xa5555555, 0xfafafafa, break_table, select_table);
 		break;
 	case 7:
 		halbtc8822b2ant_coex_table(btcoexist, force_exec,
@@ -1261,33 +1409,30 @@ void halbtc8822b2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
 		break;
 	case 8:
 		halbtc8822b2ant_coex_table(btcoexist, force_exec,
-			   0x55555555, 0x5a5a5a5a, break_table, select_table);
+			   0xa5555555, 0xfafafafa, break_table, select_table);
 		break;
 	case 9:
 		halbtc8822b2ant_coex_table(btcoexist, force_exec,
-			   0x55555555, 0xaaaa555a, break_table, select_table);
+			   0x5a5a5a5a, 0xaaaa5aaa, break_table, select_table);
 		break;
 	case 10:
 		halbtc8822b2ant_coex_table(btcoexist, force_exec,
-			   0x55555555, 0xaaaa5aaa, break_table, select_table);
-		break;
-	case 11:
-		halbtc8822b2ant_coex_table(btcoexist, force_exec,
-			   0x55555555, 0xaaaaa5aa, break_table, select_table);
+			   0x55555555, 0x5a5a555a, break_table, select_table);
 		break;
 	default:
 		break;
 	}
 }
 
+static
 void halbtc8822b2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
 		IN boolean enable)
 {
 	u8			h2c_parameter[1] = {0};
 	u32	RTL97F_8822B = 0;
 
-	if (RTL97F_8822B == true)
-			return;
+	if (RTL97F_8822B)
+		return;
 
 	if (enable)
 		h2c_parameter[0] |= BIT(0);		/* function enable */
@@ -1295,6 +1440,7 @@ void halbtc8822b2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
 	btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
 }
 
+static
 void halbtc8822b2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
 				     IN boolean force_exec, IN boolean enable)
 {
@@ -1310,6 +1456,7 @@ void halbtc8822b2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
 }
 
+static
 void halbtc8822b2ant_set_lps_rpwm(IN struct btc_coexist *btcoexist,
 				  IN u8 lps_val, IN u8 rpwm_val)
 {
@@ -1320,6 +1467,7 @@ void halbtc8822b2ant_set_lps_rpwm(IN struct btc_coexist *btcoexist,
 	btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm);
 }
 
+static
 void halbtc8822b2ant_lps_rpwm(IN struct btc_coexist *btcoexist,
 		      IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val)
 {
@@ -1337,6 +1485,8 @@ void halbtc8822b2ant_lps_rpwm(IN struct btc_coexist *btcoexist,
 	coex_dm->pre_rpwm = coex_dm->cur_rpwm;
 }
 
+
+static
 void halbtc8822b2ant_ps_tdma_check_for_power_save_state(
 	IN struct btc_coexist *btcoexist, IN boolean new_ps_state)
 {
@@ -1344,7 +1494,7 @@ void halbtc8822b2ant_ps_tdma_check_for_power_save_state(
 	u8	h2c_parameter[5] = {0, 0, 0, 0x40, 0};
 	u32	RTL97F_8822B = 0;
 
-	if (RTL97F_8822B == true)
+	if (RTL97F_8822B)
 		return;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode);
@@ -1354,16 +1504,20 @@ void halbtc8822b2ant_ps_tdma_check_for_power_save_state(
 			/* keep state under LPS, do nothing. */
 		} else {
 			/* will leave LPS state, turn off psTdma first */
-			/*halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
-						8); */
+#if 0
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE,
+						8);
+#endif
 			btcoexist->btc_fill_h2c(btcoexist, 0x60, 5,
 						h2c_parameter);
 		}
 	} else {					/* NO PS state */
 		if (new_ps_state) {
 			/* will enter LPS state, turn off psTdma first */
-			/*halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
-						8);*/
+#if 0
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE,
+						8);
+#endif
 			btcoexist->btc_fill_h2c(btcoexist, 0x60, 5,
 						h2c_parameter);
 		} else {
@@ -1372,130 +1526,186 @@ void halbtc8822b2ant_ps_tdma_check_for_power_save_state(
 	}
 }
 
-void halbtc8822b2ant_power_save_state(IN struct btc_coexist *btcoexist,
+
+static
+boolean halbtc8822b2ant_power_save_state(IN struct btc_coexist *btcoexist,
 			      IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val)
 {
-	boolean		low_pwr_disable = false;
+	boolean		low_pwr_disable = FALSE, result = TRUE;
 
 	switch (ps_type) {
 	case BTC_PS_WIFI_NATIVE:
+		coex_sta->force_lps_ctrl = FALSE;
 		/* recover to original 32k low power setting */
-		low_pwr_disable = false;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], halbtc8822b2ant_power_save_state == BTC_PS_WIFI_NATIVE\n");
+		BTC_TRACE(trace_buf);
+
+		low_pwr_disable = FALSE;
 		btcoexist->btc_set(btcoexist,
 				   BTC_SET_ACT_DISABLE_LOW_POWER,
 				   &low_pwr_disable);
 		btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS,
 				   NULL);
-		coex_sta->force_lps_on = false;
 		break;
 	case BTC_PS_LPS_ON:
+		coex_sta->force_lps_ctrl = TRUE;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], halbtc8822b2ant_power_save_state == BTC_PS_LPS_ON\n");
+		BTC_TRACE(trace_buf);
+
 		halbtc8822b2ant_ps_tdma_check_for_power_save_state(
-			btcoexist, true);
+			btcoexist, TRUE);
 		halbtc8822b2ant_lps_rpwm(btcoexist, NORMAL_EXEC,
 					 lps_val, rpwm_val);
 		/* when coex force to enter LPS, do not enter 32k low power. */
-		low_pwr_disable = true;
+		low_pwr_disable = TRUE;
 		btcoexist->btc_set(btcoexist,
 				   BTC_SET_ACT_DISABLE_LOW_POWER,
 				   &low_pwr_disable);
-		/* power save must executed before psTdma.			 */
+		/* power save must executed before psTdma. */
 		btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS,
 				   NULL);
-		coex_sta->force_lps_on = true;
 		break;
 	case BTC_PS_LPS_OFF:
+		coex_sta->force_lps_ctrl = TRUE;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], halbtc8822b2ant_power_save_state == BTC_PS_LPS_OFF\n");
+		BTC_TRACE(trace_buf);
+
 		halbtc8822b2ant_ps_tdma_check_for_power_save_state(
-			btcoexist, false);
-		btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
+			btcoexist, FALSE);
+		result = btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
 				   NULL);
-		coex_sta->force_lps_on = false;
 		break;
 	default:
 		break;
 	}
+
+	return result;
 }
 
 
 
+
+static
 void halbtc8822b2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
 	   IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5)
 {
 	u8			h2c_parameter[5] = {0};
 	u8			real_byte1 = byte1, real_byte5 = byte5;
-	boolean			ap_enable = false;
+	boolean			ap_enable = FALSE, result = FALSE;
+	struct	btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+
+	if (byte5 & BIT(2))
+		coex_sta->is_tdma_btautoslot = TRUE;
+	else
+		coex_sta->is_tdma_btautoslot = FALSE;
+
+	/* release bt-auto slot for auto-slot hang is detected!! */
+	if (coex_sta->is_tdma_btautoslot)
+		if ((coex_sta->is_tdma_btautoslot_hang) ||
+			(bt_link_info->slave_role))
+			byte5 = byte5 & 0xfb;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
 			   &ap_enable);
 
-	if (ap_enable) {
-		if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				    "[BTCoex], FW for AP mode\n");
-			BTC_TRACE(trace_buf);
-			real_byte1 &= ~BIT(4);
-			real_byte1 |= BIT(5);
+	if ((ap_enable) && (byte1 & BIT(4) && !(byte1 & BIT(5)))) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], halbtc8822b2ant_set_fw_pstdma == FW for AP mode\n");
+		BTC_TRACE(trace_buf);
 
-			real_byte5 |= BIT(5);
-			real_byte5 &= ~BIT(6);
+		real_byte1 &= ~BIT(4);
+		real_byte1 |= BIT(5);
 
-			halbtc8822b2ant_power_save_state(btcoexist,
-						 BTC_PS_WIFI_NATIVE, 0x0,
-							 0x0);
-		}
+		real_byte5 |= BIT(5);
+		real_byte5 &= ~BIT(6);
+
+		halbtc8822b2ant_power_save_state(btcoexist,
+					 BTC_PS_WIFI_NATIVE, 0x0, 0x0);
 	} else if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], halbtc8822b2ant_set_fw_pstdma == Force LPS (byte1 = 0x%x)\n", byte1);
+		BTC_TRACE(trace_buf);
 
+#if 0
 		halbtc8822b2ant_power_save_state(
 			btcoexist, BTC_PS_LPS_ON, 0x50,
 			0x4);
+#endif
+		if (!halbtc8822b2ant_power_save_state(btcoexist, BTC_PS_LPS_OFF, 0x50, 0x4))
+			result = TRUE;
+
 	} else {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], halbtc8822b2ant_set_fw_pstdma == Native LPS (byte1 = 0x%x)\n", byte1);
+		BTC_TRACE(trace_buf);
+
 		halbtc8822b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
 						 0x0,
 						 0x0);
 	}
 
 
-	h2c_parameter[0] = real_byte1;
-	h2c_parameter[1] = byte2;
-	h2c_parameter[2] = byte3;
-	h2c_parameter[3] = byte4;
-	h2c_parameter[4] = real_byte5;
+	coex_sta->is_set_ps_state_fail = result;
+
+	if (!coex_sta->is_set_ps_state_fail) {
+		h2c_parameter[0] = real_byte1;
+		h2c_parameter[1] = byte2;
+		h2c_parameter[2] = byte3;
+		h2c_parameter[3] = byte4;
+		h2c_parameter[4] = real_byte5;
+
+		coex_dm->ps_tdma_para[0] = real_byte1;
+		coex_dm->ps_tdma_para[1] = byte2;
+		coex_dm->ps_tdma_para[2] = byte3;
+		coex_dm->ps_tdma_para[3] = byte4;
+		coex_dm->ps_tdma_para[4] = real_byte5;
 
-	coex_dm->ps_tdma_para[0] = real_byte1;
-	coex_dm->ps_tdma_para[1] = byte2;
-	coex_dm->ps_tdma_para[2] = byte3;
-	coex_dm->ps_tdma_para[3] = byte4;
-	coex_dm->ps_tdma_para[4] = real_byte5;
+		btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
 
-	btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
+	} else {
+		coex_sta->cnt_set_ps_state_fail++;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], halbtc8822b2ant_set_fw_pstdma == Force Leave LPS Fail (cnt = %d)\n",
+				coex_sta->cnt_set_ps_state_fail);
+		BTC_TRACE(trace_buf);
+	}
 }
 
+
+static
 void halbtc8822b2ant_ps_tdma(IN struct btc_coexist *btcoexist,
 		     IN boolean force_exec, IN boolean turn_on, IN u8 type)
 {
-
 	static u8			psTdmaByte4Modify = 0x0, pre_psTdmaByte4Modify = 0x0;
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
-
 	coex_dm->cur_ps_tdma_on = turn_on;
 	coex_dm->cur_ps_tdma = type;
 
 	/* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */
-	if ((bt_link_info->slave_role) && (bt_link_info->a2dp_exist))
+	if (bt_link_info->slave_role)
 		psTdmaByte4Modify = 0x1;
 	else
 		psTdmaByte4Modify = 0x0;
 
 	if (pre_psTdmaByte4Modify != psTdmaByte4Modify) {
-
-		force_exec = true;
+		force_exec = TRUE;
 		pre_psTdmaByte4Modify = psTdmaByte4Modify;
 	}
 
 	if (!force_exec) {
 		if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
-		    (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
+		    (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma)) {
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], Skip TDMA because no change TDMA(%s, %d)\n",
+				    (coex_dm->cur_ps_tdma_on ? "on" : "off"),
+				    coex_dm->cur_ps_tdma);
+			BTC_TRACE(trace_buf);
 			return;
+		}
 	}
 
 	if (coex_dm->cur_ps_tdma_on) {
@@ -1517,118 +1727,172 @@ void halbtc8822b2ant_ps_tdma(IN struct btc_coexist *btcoexist,
 	if (turn_on) {
 		switch (type) {
 		case 1:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x10, 0x03, 0xf1,
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x10, 0x03, 0x91,
 						      0x54 | psTdmaByte4Modify);
 			break;
 		case 2:
 		default:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x35, 0x03, 0x71,
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x35, 0x03, 0x11,
 						      0x11 | psTdmaByte4Modify);
 			break;
 		case 3:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x3a, 0x3, 0xf1,
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x3a, 0x3, 0x91,
 						      0x10 | psTdmaByte4Modify);
 			break;
 		case 4:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x21, 0x3, 0xf1,
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x21, 0x3, 0x91,
 						      0x10 | psTdmaByte4Modify);
 			break;
 		case 5:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x25, 0x3, 0xf1,
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x25, 0x3, 0x91,
 						      0x10 | psTdmaByte4Modify);
 			break;
 		case 6:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x10, 0x3, 0xf1,
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x10, 0x3, 0x91,
 						      0x10 | psTdmaByte4Modify);
 			break;
 		case 7:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x20, 0x3, 0xf1,
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x20, 0x3, 0x91,
 						      0x10 | psTdmaByte4Modify);
 			break;
+		case 8:
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x15, 0x03, 0x11,
+						      0x11);
+			break;
+		case 10:
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x30, 0x03, 0x11,
+						      0x10);
+			break;
 		case 11:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x30, 0x03, 0x71,
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x35, 0x03, 0x11,
 						      0x10 | psTdmaByte4Modify);
 			break;
 		case 12:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x21, 0x03, 0x71,
-						      0x11 | psTdmaByte4Modify);
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x35, 0x03, 0x11, 0x11);
 			break;
 		case 13:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x1c, 0x03, 0x71,
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x1c, 0x03, 0x11,
 						      0x10 | psTdmaByte4Modify);
 			break;
 		case 14:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x30, 0x03, 0x71,
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x20, 0x03, 0x11,
 						      0x11);
 			break;
+		case 15:
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x10, 0x03, 0x11,
+						      0x14);
+			break;
+		case 16:
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x10, 0x03, 0x11,
+						      0x15);
+			break;
+		case 21:
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x30, 0x03, 0x11,
+						      0x10);
+			break;
+		case 22:
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x25, 0x03, 0x11,
+						      0x10);
+			break;
+		case 23:
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+							0x10, 0x03, 0x11,
+							0x10);
+			break;
 		case 51:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x10, 0x03, 0xf1,
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x10, 0x03, 0x91,
 						      0x10 | psTdmaByte4Modify);
 			break;
 		case 101:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x10, 0x03, 0x70,
-						      0x54 | psTdmaByte4Modify);
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x25, 0x03, 0x11,
+						      0x11 | psTdmaByte4Modify);
 			break;
 		case 102:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0xe3,
-						      0x35, 0x03, 0x71,
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x35, 0x03, 0x11,
 						      0x11 | psTdmaByte4Modify);
 			break;
 		case 103:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x3a, 0x3, 0x70,
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x3a, 0x3, 0x10,
 						      0x50 | psTdmaByte4Modify);
 			break;
 		case 104:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x21, 0x3, 0x70,
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x21, 0x3, 0x10,
 						      0x50 | psTdmaByte4Modify);
 			break;
 		case 105:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x25, 0x3, 0x70,
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x30, 0x3, 0x10,
 						      0x50 | psTdmaByte4Modify);
 			break;
 		case 106:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x10, 0x3, 0x70,
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x10, 0x3, 0x10,
 						      0x50 | psTdmaByte4Modify);
 			break;
 		case 107:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x20, 0x3, 0x70,
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x10, 0x7, 0x10,
+						      0x54 | psTdmaByte4Modify);
+			break;
+		case 108:
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x30, 0x3, 0x10,
+						      0x50 | psTdmaByte4Modify);
+			break;
+		case 109:
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x10, 0x03, 0x10,
+						      0x54 | psTdmaByte4Modify);
+			break;
+		case 110:
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x55,
+						      0x30, 0x03, 0x10,
 						      0x50 | psTdmaByte4Modify);
 			break;
+		case 111:
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x61,
+						      0x25, 0x03, 0x11,
+						      0x11 | psTdmaByte4Modify);
+			break;
 		case 151:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0xd3,
-						      0x10, 0x03, 0x70,
+			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x51,
+						      0x10, 0x03, 0x10,
 						      0x50 | psTdmaByte4Modify);
 			break;
 		}
 	} else {
 		/* disable PS tdma */
 		switch (type) {
+#if 0
+/* 08:1ant:PTA Control -0x778=1-ant hw control,40:2ant:sw control-diversity */
+#endif
+
 		case 0:
 			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x0,
 						      0x0, 0x0, 0x40, 0x0);
 			break;
-		case 1:
-			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x0,
-						      0x0, 0x0, 0x48, 0x0);
-			break;
 		default:
 			halbtc8822b2ant_set_fw_pstdma(btcoexist, 0x0,
 						      0x0, 0x0, 0x40, 0x0);
@@ -1636,72 +1900,26 @@ void halbtc8822b2ant_ps_tdma(IN struct btc_coexist *btcoexist,
 		}
 	}
 
-	/* update pre state */
-	coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
-	coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
-}
-
-void halbtc8822b2ant_set_ext_band_switch(IN struct btc_coexist *btcoexist,
-		IN boolean force_exec, IN u8 pos_type)
-{
-
-#if 0
-	boolean	switch_polatiry_inverse = false;
-	u8		regval_0xcb6;
-	u32		u32tmp1 = 0, u32tmp2 = 0;
-
-	if (!rfe_type->ext_band_switch_exist)
-		return;
-
-	coex_dm->cur_ext_band_switch_status = pos_type;
-
-	if (!force_exec) {
-		if (coex_dm->pre_ext_band_switch_status ==
-		    coex_dm->cur_ext_band_switch_status)
-			return;
+	if (!coex_sta->is_set_ps_state_fail) {
+		/* update pre state */
+		coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
+		coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
 	}
-
-	coex_dm->pre_ext_band_switch_status =
-		coex_dm->cur_ext_band_switch_status;
-
-	/* swap control polarity if use different switch control polarity*/
-	switch_polatiry_inverse = (rfe_type->ext_band_switch_ctrl_polarity == 1
-		   ? ~switch_polatiry_inverse : switch_polatiry_inverse);
-
-	/*swap control polarity for WL_A, default polarity 0xcb4[21] = 0 && 0xcb4[23] = 1 is for WL_G */
-	switch_polatiry_inverse = (pos_type ==
-		BT_8822B_2ANT_EXT_BAND_SWITCH_TO_WLA ? ~switch_polatiry_inverse
-				   : switch_polatiry_inverse);
-
-	regval_0xcb6 =  btcoexist->btc_read_1byte(btcoexist, 0xcb6);
-
-	/* for normal switch polrity, 0xcb4[21] =1 && 0xcb4[23] = 0 for WL_A, vice versa */
-	regval_0xcb6 = (switch_polatiry_inverse == 1 ? ((regval_0xcb6 & (~(BIT(
-		7)))) | BIT(5)) : ((regval_0xcb6 & (~(BIT(5)))) | BIT(7)));
-
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb6, 0xff,
-					   regval_0xcb6);
-
-	u32tmp1 = btcoexist->btc_read_4byte(btcoexist, 0xcb0);
-	u32tmp2 = btcoexist->btc_read_4byte(btcoexist, 0xcb4);
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		"[BTCoex], ********** (After Ext Band switch setup) 0xcb0 = 0x%08x, 0xcb4 = 0x%08x**********\n",
-		    u32tmp1, u32tmp2);
-	BTC_TRACE(trace_buf);
-#endif
-
 }
 
 /*anttenna control by bb mac bt antdiv pta to write 0x4c 0xcb4,0xcbd*/
+static
 void halbtc8822b2ant_set_ext_ant_switch(IN struct btc_coexist *btcoexist,
 			IN boolean force_exec, IN u8 ctrl_type, IN u8 pos_type)
 {
-
+#if 0
 	struct  btc_board_info	*board_info = &btcoexist->board_info;
-	boolean	switch_polatiry_inverse = false;
+#endif
+	boolean	switch_polatiry_inverse = FALSE;
 	u8		regval_0xcbc = 0, regval_0x64;
+#if BT_8822B_2ANT_COEX_DBG
 	u32		u32tmp1 = 0, u32tmp2 = 0, u32tmp3 = 0;
+#endif
 
 	if (!rfe_type->ext_ant_switch_exist)
 		return;
@@ -1712,9 +1930,10 @@ void halbtc8822b2ant_set_ext_ant_switch(IN struct btc_coexist *btcoexist,
 		if (coex_dm->pre_ext_ant_switch_status ==
 		    coex_dm->cur_ext_ant_switch_status)
 			return;
-}
+	}
 	coex_dm->pre_ext_ant_switch_status = coex_dm->cur_ext_ant_switch_status;
-	/*
+
+#if 0
 	switch (pos_type) {
 	default:
 	case BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_BT:
@@ -1725,14 +1944,17 @@ void halbtc8822b2ant_set_ext_ant_switch(IN struct btc_coexist *btcoexist,
 	case BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_WLA:
 		break;
 	}
-*/
-//	if (board_info->ant_div_cfg)
-		/*ctrl_type = BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV;*/
+#endif
+
+#if 0
+	if (board_info->ant_div_cfg)
+		ctrl_type = BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV;
+#endif
 
 	/* Ext switch buffer mux */
-		btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x1991, 0x3, 0x0);
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbe, 0x8, 0x0);
+	btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
+	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x1991, 0x3, 0x0);
+	btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbe, 0x8, 0x0);
 
 
 	switch (ctrl_type) {
@@ -1742,8 +1964,9 @@ void halbtc8822b2ant_set_ext_ant_switch(IN struct btc_coexist *btcoexist,
 					   0x80, 0x0);  /*  0x4c[23] = 0 */
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4f,
 					   0x01, 0x1);  /* 0x4c[24] = 1 */
+		/* BB SW, DPDT use RFE_ctrl8 and RFE_ctrl9 as conctrol pin */
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb4,
-			0xff, 0x77);	/* BB SW, DPDT use RFE_ctrl8 and RFE_ctrl9 as conctrol pin */
+			0xff, 0x77);
 
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbd,
 						   0x03, 01);
@@ -1754,11 +1977,14 @@ void halbtc8822b2ant_set_ext_ant_switch(IN struct btc_coexist *btcoexist,
 					   0x80, 0x0);  /* 0x4c[23] = 0 */
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4f,
 					   0x01, 0x1);  /* 0x4c[24] = 1 */
+		/* PTA,  DPDT use RFE_ctrl8 and RFE_ctrl9 as conctrol pin */
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb4,
-			0xff, 0x66);	/* PTA,  DPDT use RFE_ctrl8 and RFE_ctrl9 as conctrol pin */
+			0xff, 0x66);
 
-		regval_0xcbc = (switch_polatiry_inverse == false ?
-			0x2 : 0x1);     /* 0xcb4[29:28] = 2b'10 for no switch_polatiry_inverse, DPDT_SEL_N =1, DPDT_SEL_P =0  @ GNT_BT=1 */
+		/* 0xcb4[29:28] = 2b'10 for no switch_polatiry_inverse,
+		 * DPDT_SEL_N =1, DPDT_SEL_P =0  @ GNT_BT=1
+		 */
+		regval_0xcbc = (!switch_polatiry_inverse ? 0x2 : 0x1);
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbc,
 						   0x03, regval_0xcbc);
 
@@ -1768,14 +1994,16 @@ void halbtc8822b2ant_set_ext_ant_switch(IN struct btc_coexist *btcoexist,
 					   0x80, 0x0);  /* 0x4c[23] = 0 */
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4f,
 					   0x01, 0x1);/* 0x4c[24] = 1 */
-btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb4, 0xff, 0x88);
-break;
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb4, 0xff, 0x88);
+		break;
 	case BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_MAC:
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4e,
 					   0x80, 0x1);  /*  0x4c[23] = 1 */
 
-		regval_0x64 = (switch_polatiry_inverse == false ?  0x0 :
-			0x1);     /* 0x64[0] = 1b'0 for no switch_polatiry_inverse, DPDT_SEL_N =1, DPDT_SEL_P =0 */
+		/* 0x64[0] = 1b'0 for no switch_polatiry_inverse,
+		 * DPDT_SEL_N =1, DPDT_SEL_P =0
+		 */
+		regval_0x64 = (!switch_polatiry_inverse ? 0x0 : 0x1);
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x64, 0x1,
 						   regval_0x64);
 		break;
@@ -1785,11 +2013,13 @@ break;
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4f,
 					   0x01, 0x0);  /* 0x4c[24] = 0 */
 
-		/* no  setup required, because  antenna switch control value by BT vendor 0x1c[1:0] */
+		/* no setup required, because  antenna switch control value by
+		 * BT vendor 0x1c[1:0]
+		 */
 		break;
 	}
 
-	/* PAPE, LNA_ON control by BT  while WLAN off for current leakage issue */
+	/* PAPE, LNA_ON control by BT while WLAN off for current leakage issue*/
 	if (ctrl_type == BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_BT) {
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20,
 					   0x0);  /* PAPE   0x64[29] = 0 */
@@ -1817,25 +2047,31 @@ break;
 
 
 }
-/*rf4 type by efuse , and for ant at main aux inverse use , because is 2x2 ,and control types are the same ,does not need */
+
+/* rf4 type by efuse, and for ant at main aux inverse use,
+ * because is 2x2, and control types are the same, does not need
+ */
+static
 void halbtc8822b2ant_set_rfe_type(IN struct btc_coexist *btcoexist)
 {
 
 	struct  btc_board_info *board_info = &btcoexist->board_info;
 
 
-	rfe_type->ext_band_switch_exist = false;
+	rfe_type->ext_band_switch_exist = FALSE;
 	rfe_type->ext_band_switch_type =
 		BT_8822B_2ANT_EXT_BAND_SWITCH_USE_SPDT;     /* SPDT; */
 	rfe_type->ext_band_switch_ctrl_polarity = 0;
 	/* Ext switch buffer mux */
-		btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x1991, 0x3, 0x0);
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbe, 0x8, 0x0);
+	btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
+	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x1991, 0x3, 0x0);
+	btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbe, 0x8, 0x0);
 
 	if (rfe_type->ext_band_switch_exist) {
 
-		/* band switch use RFE_ctrl1 (pin name: PAPE_A) and RFE_ctrl3 (pin name: LNAON_A) */
+		/* band switch use RFE_ctrl1 (pin name: PAPE_A) and
+		 * RFE_ctrl3 (pin name: LNAON_A)
+		 */
 
 		/* set RFE_ctrl1 as software control */
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb0, 0xf0, 0x7);
@@ -1854,36 +2090,36 @@ void halbtc8822b2ant_set_rfe_type(IN struct btc_coexist *btcoexist)
 	switch (rfe_type->rfe_module_type) {
 	case 0:
 	default:
-		rfe_type->ext_ant_switch_exist = true;
+		rfe_type->ext_ant_switch_exist = TRUE;
 		rfe_type->ext_ant_switch_type = BT_8822B_2ANT_EXT_ANT_SWITCH_USE_SPDT;
 		break;
 	case 1:
-		rfe_type->ext_ant_switch_exist = true;
+		rfe_type->ext_ant_switch_exist = TRUE;
 		rfe_type->ext_ant_switch_type = BT_8822B_2ANT_EXT_ANT_SWITCH_USE_SPDT;
 		break;
 	case 2:
-		rfe_type->ext_ant_switch_exist = true;
+		rfe_type->ext_ant_switch_exist = TRUE;
 		rfe_type->ext_ant_switch_type = BT_8822B_2ANT_EXT_ANT_SWITCH_USE_SPDT;
 		break;
 	case 3:
-		rfe_type->ext_ant_switch_exist = true;
+		rfe_type->ext_ant_switch_exist = TRUE;
 		rfe_type->ext_ant_switch_type = BT_8822B_2ANT_EXT_ANT_SWITCH_USE_SPDT;
 		break;
 	case 4:
-		rfe_type->ext_ant_switch_exist = true;
+		rfe_type->ext_ant_switch_exist = TRUE;
 		rfe_type->ext_ant_switch_type =
 	BT_8822B_2ANT_EXT_ANT_SWITCH_USE_SPDT;
 		break;
 	case 5:
-		rfe_type->ext_ant_switch_exist = true;
+		rfe_type->ext_ant_switch_exist = TRUE;
 		rfe_type->ext_ant_switch_type = BT_8822B_2ANT_EXT_ANT_SWITCH_USE_SPDT;
 		break;
 	case 6:
-		rfe_type->ext_ant_switch_exist = true;
+		rfe_type->ext_ant_switch_exist = TRUE;
 		rfe_type->ext_ant_switch_type = BT_8822B_2ANT_EXT_ANT_SWITCH_USE_SPDT;
 		break;
 	case 7:
-		rfe_type->ext_ant_switch_exist = true;
+		rfe_type->ext_ant_switch_exist = TRUE;
 rfe_type->ext_ant_switch_type = BT_8822B_2ANT_EXT_ANT_SWITCH_USE_SPDT;
 		break;
 	}
@@ -1900,25 +2136,39 @@ rfe_type->ext_ant_switch_type = BT_8822B_2ANT_EXT_ANT_SWITCH_USE_SPDT;
 
 }
 
-/*set gnt_wl gnt_bt control by sw high low , or hwpta while in power on,ini,wlan off,wlan only ,wl2g non-currrent ,wl2g current,wl5g*/
+/* set gnt_wl gnt_bt control by sw high low, or hwpta while in
+ * power on, ini, wlan off, wlan only, wl2g non-currrent, wl2g current, wl5g
+ */
+static
 void halbtc8822b2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 				  IN u8 ant_pos_type, IN boolean force_exec,
 				  IN u8 phase)
 {
-	struct  btc_board_info *board_info = &btcoexist->board_info;
-	u32			cnt_bt_cal_chk = 0;
-	boolean			is_in_mp_mode = false;
+#if BT_8822B_2ANT_COEX_DBG
 	u8			u8tmp = 0;
-	u32			u32tmp1 = 0, u32tmp2 = 0, u32tmp3 = 0;
-	u16			u16tmp1 = 0;
+#endif
+	u32			u32tmp1 = 0;
+#if BT_8822B_2ANT_COEX_DBG
+	u32			u32tmp2 = 0, u32tmp3 = 0;
+#endif
+
+	u32tmp1 = halbtc8822b2ant_ltecoex_indirect_read_reg(btcoexist,
+				0x38);
+
+	/* To avoid indirect access fail  */
+	if (((u32tmp1 & 0xf000) >> 12) != ((u32tmp1 & 0x0f00) >> 8)) {
+		force_exec = TRUE;
+		coex_sta->gnt_error_cnt++;
+	}
+
 	/* Ext switch buffer mux */
-		btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x1991, 0x3, 0x0);
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbe, 0x8, 0x0);
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4e,
-					   0x80, 0x0);  /*  0x4c[23] = 0 */
-		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4f,
-					   0x01, 0x1);  /* 0x4c[24] = 1 */
+	btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
+	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x1991, 0x3, 0x0);
+	btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbe, 0x8, 0x0);
+	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4e,
+				   0x80, 0x0);  /*  0x4c[23] = 0 */
+	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4f,
+				   0x01, 0x1);  /* 0x4c[24] = 1 */
 
 	coex_dm->cur_ant_pos_type = (ant_pos_type << 8)  + phase;
 
@@ -1962,7 +2212,7 @@ void halbtc8822b2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 					   BT_8822B_2ANT_GNT_TYPE_CTRL_BY_SW,
 					   BT_8822B_2ANT_SIG_STA_SET_TO_HIGH);
 
-		coex_sta->run_time_state = false;
+		coex_sta->run_time_state = FALSE;
 
 		break;
 	case BT_8822B_2ANT_PHASE_COEX_INIT:
@@ -1970,16 +2220,22 @@ void halbtc8822b2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 					   0x80, 0x0);  /*  0x4c[23] = 0 */
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4f,
 					   0x01, 0x1);  /* 0x4c[24] = 1 */
-		/* Disable LTE Coex Function in WiFi side (this should be on if LTE coex is required) */
+		/* Disable LTE Coex Function in WiFi side
+		 * (this should be on if LTE coex is required)
+		 */
 		halbtc8822b2ant_ltecoex_enable(btcoexist, 0x0);
 
-		/* GNT_WL_LTE always = 1 (this should be config if LTE coex is required) */
+		/* GNT_WL_LTE always = 1
+		 * (this should be config if LTE coex is required)
+		 */
 		halbtc8822b2ant_ltecoex_set_coex_table(
 			btcoexist,
 			BT_8822B_2ANT_CTT_WL_VS_LTE,
 			0xffff);
 
-		/* GNT_BT_LTE always = 1 (this should be config if LTE coex is required) */
+		/* GNT_BT_LTE always = 1
+		 * (this should be config if LTE coex is required)
+		 */
 		halbtc8822b2ant_ltecoex_set_coex_table(
 			btcoexist,
 			BT_8822B_2ANT_CTT_BT_VS_LTE,
@@ -2001,20 +2257,26 @@ void halbtc8822b2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 					   BT_8822B_2ANT_GNT_TYPE_CTRL_BY_SW,
 					   BT_8822B_2ANT_SIG_STA_SET_TO_HIGH);
 
-		coex_sta->run_time_state = false;
+		coex_sta->run_time_state = FALSE;
 
 		break;
 	case BT_8822B_2ANT_PHASE_WLANONLY_INIT:
-		/* Disable LTE Coex Function in WiFi side (this should be on if LTE coex is required) */
+		/* Disable LTE Coex Function in WiFi side
+		 * (this should be on if LTE coex is required)
+		 */
 		halbtc8822b2ant_ltecoex_enable(btcoexist, 0x0);
 
-		/* GNT_WL_LTE always = 1 (this should be config if LTE coex is required) */
+		/* GNT_WL_LTE always = 1
+		 * (this should be config if LTE coex is required)
+		 */
 		halbtc8822b2ant_ltecoex_set_coex_table(
 			btcoexist,
 			BT_8822B_2ANT_CTT_WL_VS_LTE,
 			0xffff);
 
-		/* GNT_BT_LTE always = 1 (this should be config if LTE coex is required) */
+		/* GNT_BT_LTE always = 1
+		 * (this should be config if LTE coex is required)
+		 */
 		halbtc8822b2ant_ltecoex_set_coex_table(
 			btcoexist,
 			BT_8822B_2ANT_CTT_BT_VS_LTE,
@@ -2036,7 +2298,7 @@ void halbtc8822b2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 					   BT_8822B_2ANT_GNT_TYPE_CTRL_BY_SW,
 					   BT_8822B_2ANT_SIG_STA_SET_TO_HIGH);
 
-		coex_sta->run_time_state = false;
+		coex_sta->run_time_state = FALSE;
 
 
 		break;
@@ -2058,7 +2320,7 @@ void halbtc8822b2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 						   FORCE_EXEC,
 				   BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_BT,
 				   BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_NOCARE);
-		coex_sta->run_time_state = false;
+		coex_sta->run_time_state = FALSE;
 		break;
 	case BT_8822B_2ANT_PHASE_2G_RUNTIME:
 	case BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT:
@@ -2067,7 +2329,8 @@ void halbtc8822b2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 		halbtc8822b2ant_ltecoex_pathcontrol_owner(
 			btcoexist,
 			BT_8822B_2ANT_PCO_WLSIDE);
-
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb4,
+			0xff, 0x66);
 		if (phase ==
 		    BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT) {
 			/* set GNT_BT to PTA */
@@ -2083,13 +2346,6 @@ void halbtc8822b2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 				BT_8822B_2ANT_GNT_BLOCK_RFC_BB,
 				BT_8822B_2ANT_GNT_TYPE_CTRL_BY_SW,
 				BT_8822B_2ANT_SIG_STA_SET_TO_HIGH);
-
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], ************* under2g 0xcbd setting =2 *************\n");
-		BTC_TRACE(trace_buf);
-
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbd,
-							   0x03, 02);
 		} else {
 			/* set GNT_BT to PTA */
 			halbtc8822b2ant_ltecoex_set_gnt_bt(
@@ -2105,14 +2361,14 @@ void halbtc8822b2ant_set_ant_path(IN struct btc_coexist *btcoexist,
 				BT_8822B_2ANT_GNT_TYPE_CTRL_BY_PTA,
 				BT_8822B_2ANT_SIG_STA_SET_BY_HW);
 		}
-		coex_sta->run_time_state = true;
 
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], ************* under2g 0xcbd setting =2 *************\n");
 		BTC_TRACE(trace_buf);
 
-btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbd, 0x03, 02);
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbd, 0x03, 02);
 		break;
+
 	case BT_8822B_2ANT_PHASE_5G_RUNTIME:
 
 		/* set Path control owner to WL at runtime step */
@@ -2130,13 +2386,13 @@ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbd, 0x03, 02);
 					   BT_8822B_2ANT_GNT_BLOCK_RFC_BB,
 					   BT_8822B_2ANT_GNT_TYPE_CTRL_BY_SW,
 					   BT_8822B_2ANT_SIG_STA_SET_TO_HIGH);
-		coex_sta->run_time_state = true;
+		coex_sta->run_time_state = TRUE;
 
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 				"[BTCoex], ************* under5g 0xcbd setting =1 *************\n");
 		BTC_TRACE(trace_buf);
 
-	btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbd,
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbd,
 							   0x03, 01);
 
 		break;
@@ -2161,7 +2417,7 @@ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcbd, 0x03, 02);
 					   BT_8822B_2ANT_GNT_TYPE_CTRL_BY_SW,
 					   BT_8822B_2ANT_SIG_STA_SET_TO_LOW);
 
-coex_sta->run_time_state = false;
+		coex_sta->run_time_state = FALSE;
 		break;
 	}
 #if BT_8822B_2ANT_COEX_DBG
@@ -2180,10 +2436,110 @@ coex_sta->run_time_state = false;
 }
 
 
+static
+void halbtc8822b2ant_set_rx_gain(IN struct btc_coexist *btcoexist,
+				   IN boolean agc_table_en)
+{
+	u8		rssi_adjust_val = 0;
+
+	/* =================BB AGC Gain Table */
+	if (agc_table_en) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], BB Agc Table On!\n");
+		BTC_TRACE(trace_buf);
+
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
+
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
+					     NORMAL_EXEC,
+				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
+
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
+		btcoexist->btc_write_1byte(btcoexist, 0xc5b, 0xc8);
+		btcoexist->btc_write_1byte(btcoexist, 0xe5b, 0xc8);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xff000003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xae2e0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xad300003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xac320003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xab360003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x8d380003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x8c3a0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x8b3c0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x8a3e0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x6e400003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x6d420003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x6c440003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x6b460003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x6a480003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x694a0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x684c0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x674e0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x66500003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x65520003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x64540003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x64560003);
+
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x007e0403);
+	} else {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], BB Agc Table Off!\n");
+		BTC_TRACE(trace_buf);
+		coex_dm->is_switch_to_1dot5_ant = TRUE;
+
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
+		btcoexist->btc_write_1byte(btcoexist, 0xc5b, 0xd8);
+		btcoexist->btc_write_1byte(btcoexist, 0xe5b, 0xd8);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xff000003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xe62e0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xe5300003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xc8320003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xc6360003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xc5380003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xc43a0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xc33c0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xc23e0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xc1400003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xc0420003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xa5440003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xa4460003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xa3480003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xa24a0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0xa14c0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x834e0003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x82500003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x81520003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x80540003);
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x65560003);
+
+		btcoexist->btc_write_4byte(btcoexist, 0x81c, 0x007e0403);
+	}
+
+}
+
+
+static
+void halbtc8822b2ant_rx_gain(IN struct btc_coexist *btcoexist,
+			       IN boolean force_exec, IN boolean agc_table_en)
+{
+	coex_dm->cur_agc_table_en = agc_table_en;
+
+	if (!force_exec) {
+		if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
+			return;
+	}
+	halbtc8822b2ant_set_rx_gain(btcoexist, agc_table_en);
+
+	coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
+}
+
+
+static
 u8 halbtc8822b2ant_action_algorithm(IN struct btc_coexist *btcoexist)
 {
 	struct  btc_bt_link_info	*bt_link_info = &btcoexist->bt_link_info;
-	boolean				bt_hs_on = false;
+	boolean				bt_hs_on = FALSE;
 	u8				algorithm = BT_8822B_2ANT_COEX_ALGO_UNDEFINED;
 	u8				num_of_diff_profile = 0;
 
@@ -2213,6 +2569,11 @@ u8 halbtc8822b2ant_action_algorithm(IN struct btc_coexist *btcoexist)
 			BTC_TRACE(trace_buf);
 			algorithm = BT_8822B_2ANT_COEX_ALGO_NOPROFILEBUSY;
 		}
+	} else if ((bt_link_info->a2dp_exist) && (coex_sta->is_bt_a2dp_sink)) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], A2DP Sink\n");
+		BTC_TRACE(trace_buf);
+		algorithm = BT_8822B_2ANT_COEX_ALGO_A2DPSINK;
 	} else if (num_of_diff_profile == 1) {
 		if (bt_link_info->sco_exist) {
 			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -2397,23 +2758,28 @@ u8 halbtc8822b2ant_action_algorithm(IN struct btc_coexist *btcoexist)
 }
 
 
-
+static
 void halbtc8822b2ant_action_coex_all_off(IN struct btc_coexist *btcoexist)
 {
 
-	halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+	halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
 
-	halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
+#if 0
+	/*halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
+				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);*/
+#endif
 
 	/* fw all off */
-	halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+	halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
 
 	halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
-	halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+#if 0
+	/*halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);*/
+#endif
 
 }
 
+static
 void halbtc8822b2ant_action_wifi_under5g(IN struct btc_coexist *btcoexist)
 {
 
@@ -2421,23 +2787,40 @@ void halbtc8822b2ant_action_wifi_under5g(IN struct btc_coexist *btcoexist)
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], ************* under5g *************\n");
 	BTC_TRACE(trace_buf);
-	halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+	halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
+				     BT_8822B_2ANT_PHASE_5G_RUNTIME);
+	halbtc8822b2ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
 	halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-
+	halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
 	halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
-	halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+#if 0
+	/*halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);*/
+#endif
+
+}
+
+static
+void halbtc8822b2ant_action_wifi_native_lps(IN struct btc_coexist *btcoexist)
+{
+#if 0
+	halbtc8822b2ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 2);
+	halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
+#endif
+	halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
+
+	halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
 
-	halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
-				     BT_8822B_2ANT_PHASE_5G_RUNTIME);
 }
 
 
+static
 void halbtc8822b2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
 {
 
-	boolean	wifi_connected = false;
-	boolean		scan = false, link = false, roam = false;
-	boolean			wifi_busy = false;
+	boolean	wifi_connected = FALSE;
+	boolean	wifi_scan = FALSE, wifi_link = FALSE, wifi_roam = FALSE;
+	boolean			wifi_busy = FALSE;
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
 
@@ -2446,207 +2829,176 @@ void halbtc8822b2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
 			   &wifi_connected);
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam);
 
-	if (link || roam || coex_sta->wifi_is_high_pri_task) {
+	if ((coex_sta->bt_create_connection) && ((wifi_link) || (wifi_roam)
+		|| (wifi_scan) || (wifi_busy) || (coex_sta->wifi_is_high_pri_task))) {
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], Wifi link/roam/hi-pri-task process + BT Inq/Page!!\n");
+			"[BTCoex], Wifi link/roam/Scan/busy/hi-pri-task + BT Inq/Page!!\n");
 		BTC_TRACE(trace_buf);
 
 		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
 						     8);
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
 
-	} else if (scan) {
+		if ((bt_link_info->a2dp_exist) && (!bt_link_info->pan_exist))
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						15);
+		else
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						11);
+	}  else if ((!wifi_connected) && (!wifi_scan)) {
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Wifi scan process + BT Inq/Page!!\n");
+			"[BTCoex], Wifi no-link + no-scan + BT Inq/Page!!\n");
 		BTC_TRACE(trace_buf);
 
-		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-						     8);
-
-		if (coex_sta->bt_create_connection)
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						12);
-		else
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						11);
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
 
-	}  else if (wifi_connected) {
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
+	} else if (bt_link_info->pan_exist) {
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
 
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Wifi connected + BT Inq/Page!!\n");
-		BTC_TRACE(trace_buf);
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 22);
 
-		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-						     8);
 
-		if (wifi_busy) {
+	} else if (bt_link_info->a2dp_exist) {
+#if 0
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 16);
 
-			if ((bt_link_info->a2dp_exist) &&
-			    (bt_link_info->acl_busy))
-				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 13);
-			else
-				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 11);
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
+#endif
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 10);
 
-		} else
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						13);
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 8);
 
 	} else {
 
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Wifi no-link + BT Inq/Page!!\n");
-		BTC_TRACE(trace_buf);
-
-		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
+		if ((wifi_link) || (wifi_roam) || (wifi_scan) || (wifi_busy)
+			|| (coex_sta->wifi_is_high_pri_task))
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 21);
+		else
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 23);
 
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
 	}
 
 	halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0xd8);
-	halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+#if 0
+	/*halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);*/
+#endif
 }
 
+static
 void halbtc8822b2ant_action_wifi_link_process(IN struct btc_coexist *btcoexist)
 {
-	u32	u32tmp, u32tmpb;
-	u8	u8tmpa;
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 
-	halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0xd8);
-	halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+	halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0xd4);
+#if 0
+	/*halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);*/
+#endif
 
-	halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
+	halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
 
-	if ((bt_link_info->a2dp_exist) && (bt_link_info->acl_busy))
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
-	else
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
+	if (bt_link_info->pan_exist) {
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
 
-}
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 22);
+
+	} else if (bt_link_info->a2dp_exist) {
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
+
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 16);
+
+	} else {
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
+
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 21);
+
+	}
 
+}
 
+static
 void halbtc8822b2ant_action_wifi_nonconnected(IN struct btc_coexist *btcoexist)
 {
+	halbtc8822b2ant_rx_gain(btcoexist, NORMAL_EXEC, FALSE);
+
 	halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-	halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
+#if 0
+	/*halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
+				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);*/
+#endif
 
 	/* fw all off */
-	halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+	halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
 
 	halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
-	halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+#if 0
+	/*halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);*/
+#endif
 }
 
-void halbtc8822b2ant_action_bt_idle(IN struct btc_coexist *btcoexist)
+static
+void halbtc8822b2ant_action_bt_relink(IN struct btc_coexist *btcoexist)
 {
-	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
-	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
-	u8		wifi_rssi_state, bt_rssi_state;
-
-	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
-	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
-	u8		wifi_rssi_state2, bt_rssi_state2;
-
-	boolean	wifi_connected = false;
-	boolean		scan = false, link = false, roam = false;
-	boolean			wifi_busy = false;
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], run bt multi link function\n");
+		BTC_TRACE(trace_buf);
 
-	wifi_rssi_state = halbtc8822b2ant_wifi_rssi_state(btcoexist,
-			  &prewifi_rssi_state, 2,
-			  coex_sta->wifi_coex_thres , 0);
+	if (coex_sta->is_bt_multi_link)
+		return;
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		    "[BTCoex], run bt re-link function\n");
+	BTC_TRACE(trace_buf);
+	halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
 
-	wifi_rssi_state2 = halbtc8822b2ant_wifi_rssi_state(btcoexist,
-			   &prewifi_rssi_state2, 2,
-			   coex_sta->wifi_coex_thres2 , 0);
+	halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
 
-	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
-			coex_sta->bt_coex_thres , 0);
+}
 
-	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
-			 coex_sta->bt_coex_thres2 , 0);
+static
+void halbtc8822b2ant_action_bt_idle(IN struct btc_coexist *btcoexist)
+{
 
+	boolean			wifi_busy = FALSE;
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
-			   &wifi_connected);
-
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
-
-	if (scan || link || roam) {
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Wifi link process + BT Idle!!\n");
-		BTC_TRACE(trace_buf);
+	if (!wifi_busy) {
 
-		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-						     7);
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
 
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
-	} else if (wifi_connected) {
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Wifi connected + BT Idle!!\n");
-		BTC_TRACE(trace_buf);
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 14);
+	} else {  /* if wl busy */
 
-		if (wifi_busy) {
+		if (BT_8822B_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
+		    coex_dm->bt_status) {
 			halbtc8822b2ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 0);
-			halbtc8822b2ant_set_ant_path(btcoexist,
-					     BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
-			/*
-						if (!BTC_RSSI_HIGH(bt_rssi_state2))
-							halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
-						else {
-							halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-							halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-						      BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
-
-						}
-			*/
+					     NORMAL_EXEC, 0);
+
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE,
+						0);
 		} else {
 			halbtc8822b2ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 0);
-			halbtc8822b2ant_set_ant_path(btcoexist,
-					     BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
-		}
-
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
-
-	} else {
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Wifi no-link + BT Idle!!\n");
-		BTC_TRACE(trace_buf);
-
-		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
 					     NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
-
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+							  8);
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						12);
+		}
 	}
 
 	halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0xd8);
-	halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
-
+#if 0
+	/*halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);*/
+#endif
 }
 
-
 /* SCO only or SCO+PAN(HS) */
+static
 void halbtc8822b2ant_action_sco(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -2656,8 +3008,11 @@ void halbtc8822b2ant_action_sco(IN struct btc_coexist *btcoexist)
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
 	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean			wifi_busy = false;
+	boolean			wifi_busy = FALSE;
+	u32  wifi_bw = 1;
 
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
+			   &wifi_bw);
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
@@ -2667,44 +3022,53 @@ void halbtc8822b2ant_action_sco(IN struct btc_coexist *btcoexist)
 
 	wifi_rssi_state2 = halbtc8822b2ant_wifi_rssi_state(btcoexist,
 			   &prewifi_rssi_state2, 2,
-			   coex_sta->wifi_coex_thres2 , 0);
+			   coex_sta->wifi_coex_thres2, 0);
 
-	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
-			coex_sta->bt_coex_thres , 0);
+	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state, 2,
+			coex_sta->bt_coex_thres, 0);
 
-	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
-			 coex_sta->bt_coex_thres2 , 0);
+	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state2, 2,
+			coex_sta->bt_coex_thres2, 0);
 
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
 	    BTC_RSSI_HIGH(bt_rssi_state)) {
 
-		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
+		/*halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-		coex_dm->is_switch_to_1dot5_ant = false;
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
 
-		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
 
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
-	}  else {
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);*/
+		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
+				     BT_8822B_2ANT_PHASE_5G_RUNTIME);
+		halbtc8822b2ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
+		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
+	} else {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-		coex_dm->is_switch_to_1dot5_ant = false;
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
 
-		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
+		if (coex_sta->is_eSCO_mode)
+			halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+		else  /* 2-Ant free run if SCO mode */
+			halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE, 8);
 	}
 
 }
 
 
+static
 void halbtc8822b2ant_action_hid(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -2714,65 +3078,80 @@ void halbtc8822b2ant_action_hid(IN struct btc_coexist *btcoexist)
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
 	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean			wifi_busy = false;
+	boolean	wifi_busy = FALSE;
+	u32  wifi_bw = 1;
 
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,  &wifi_bw);
 
 	wifi_rssi_state = halbtc8822b2ant_wifi_rssi_state(btcoexist,
 			  &prewifi_rssi_state, 2,
-			  coex_sta->wifi_coex_thres , 0);
+			  coex_sta->wifi_coex_thres, 0);
 
 	wifi_rssi_state2 = halbtc8822b2ant_wifi_rssi_state(btcoexist,
 			   &prewifi_rssi_state2, 2,
-			   coex_sta->wifi_coex_thres2 , 0);
+			   coex_sta->wifi_coex_thres2, 0);
 
-	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
-			coex_sta->bt_coex_thres , 0);
+	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state, 2,
+			coex_sta->bt_coex_thres, 0);
 
-	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
-			 coex_sta->bt_coex_thres2 , 0);
+	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state2, 2,
+			coex_sta->bt_coex_thres2, 0);
 
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
 	    BTC_RSSI_HIGH(bt_rssi_state)) {
 
-		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
+		/*halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-		coex_dm->is_switch_to_1dot5_ant = false;
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
 
 		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
 
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);*/
+		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
+				     BT_8822B_2ANT_PHASE_5G_RUNTIME);
+		halbtc8822b2ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
+		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
 	}  else {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-		coex_dm->is_switch_to_1dot5_ant = false;
-/*
-		halbtc8822b2ant_coex_table_with_type(btcoexist,
-										 NORMAL_EXEC, 0);
-					halbtc8822b2ant_set_ant_path(btcoexist,
-								 BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-							 BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
-*/
-		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
-
-/*
-	halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 10);
-*/
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
+
+		if (coex_sta->is_hid_low_pri_tx_overhead) {
+
+			halbtc8822b2ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 4);
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						108);
+		} else if (wifi_bw == 0) {   /* if 11bg mode */
+
+			halbtc8822b2ant_coex_table_with_type(btcoexist,
+					NORMAL_EXEC, 8);
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						111);
+		} else {
+
+			halbtc8822b2ant_coex_table_with_type(btcoexist,
+				NORMAL_EXEC, 8);
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						111);
+		}
 	}
 
 }
 
-/* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
-void halbtc8822b2ant_action_a2dp(IN struct btc_coexist *btcoexist)
+
+static
+void halbtc8822b2ant_action_a2dpsink(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
@@ -2781,110 +3160,104 @@ void halbtc8822b2ant_action_a2dp(IN struct btc_coexist *btcoexist)
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
 	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean	wifi_busy = false, wifi_turbo = false;
-
+	boolean wifi_busy = FALSE, wifi_turbo = FALSE;
+#if 0
+	halbtc8822b2ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+#endif
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
 			   &coex_sta->scan_ap_num);
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "############# [BTCoex],  scan_ap_num = %d\n",
-		    coex_sta->scan_ap_num);
+		"############# [BTCoex],  scan_ap_num = %d, wl_noisy = %d\n",
+			coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
 	BTC_TRACE(trace_buf);
 
 #if 1
-	if ((wifi_busy) && (coex_sta->scan_ap_num <= 4))
-		wifi_turbo = true;
+	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
+		wifi_turbo = TRUE;
 #endif
 
 	wifi_rssi_state = halbtc8822b2ant_wifi_rssi_state(btcoexist,
 			  &prewifi_rssi_state, 2,
-			  coex_sta->wifi_coex_thres , 0);
+			  coex_sta->wifi_coex_thres, 0);
 
 	wifi_rssi_state2 = halbtc8822b2ant_wifi_rssi_state(btcoexist,
 			   &prewifi_rssi_state2, 2,
-			   coex_sta->wifi_coex_thres2 , 0);
+			   coex_sta->wifi_coex_thres2, 0);
 
-	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
-			coex_sta->bt_coex_thres , 0);
+	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state, 2,
+			coex_sta->bt_coex_thres, 0);
 
-	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
-			 coex_sta->bt_coex_thres2 , 0);
+	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state2, 2,
+			coex_sta->bt_coex_thres2, 0);
 
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
-	    BTC_RSSI_HIGH(bt_rssi_state)) {
+		BTC_RSSI_HIGH(bt_rssi_state)) {
 
-		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
+		/*halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-		coex_dm->is_switch_to_1dot5_ant = false;
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
 
 		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
 
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);*/
+		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
+				     BT_8822B_2ANT_PHASE_5G_RUNTIME);
+		halbtc8822b2ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
+		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
 
-		coex_dm->is_switch_to_1dot5_ant = false;
-
-
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
 
 		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 
-		if (wifi_busy) {
-			if (coex_sta->is_setupLink)
-				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 51);
-			else {
-				halbtc8822b2ant_coex_table_with_type(btcoexist,
-						NORMAL_EXEC, 0);
-				halbtc8822b2ant_set_ant_path(btcoexist,
-						BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-						BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
-				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-						true, 1);
-			}
-		} else
-
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						2);
+		if (wifi_busy)
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+						TRUE, 1);
+		else
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						16);
 	} else {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-		coex_dm->is_switch_to_1dot5_ant = true;
+		coex_dm->is_switch_to_1dot5_ant = TRUE;
 
-		if (wifi_turbo)
-			halbtc8822b2ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 6);
-		else
-			halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-							     7);
+		if ((coex_sta->bt_relink_downcount != 0)
+			&& (wifi_busy)) {
 
-		if (wifi_busy) {
-			if (coex_sta->is_setupLink)
-				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 151);
-			else
-				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 101);
-		} else
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						102);
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"############# [BTCoex],  BT Re-Link + A2DP + WL busy\n");
+			BTC_TRACE(trace_buf);
+
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
+			halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
+
+		} else {
+			halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+						TRUE, 105);
+		}
 
 	}
 
 }
 
-void halbtc8822b2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
+/* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
+static
+void halbtc8822b2ant_action_a2dp(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
@@ -2893,117 +3266,114 @@ void halbtc8822b2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
 	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean	wifi_busy = false, wifi_turbo = false;
+	boolean	wifi_busy = FALSE, wifi_turbo = FALSE;
 
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
 			   &coex_sta->scan_ap_num);
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "############# [BTCoex],  scan_ap_num = %d\n",
-		    coex_sta->scan_ap_num);
+		"############# [BTCoex],  scan_ap_num = %d, wl_noisy = %d\n",
+		    coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
 	BTC_TRACE(trace_buf);
 
-#if 1
-	if ((wifi_busy) && (coex_sta->scan_ap_num <= 4))
-		wifi_turbo = true;
-#endif
+	halbtc8822b2ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+
+	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
+		wifi_turbo = TRUE;
 
 	wifi_rssi_state = halbtc8822b2ant_wifi_rssi_state(btcoexist,
 			  &prewifi_rssi_state, 2,
-			  coex_sta->wifi_coex_thres , 0);
+			  coex_sta->wifi_coex_thres, 0);
 
 	wifi_rssi_state2 = halbtc8822b2ant_wifi_rssi_state(btcoexist,
 			   &prewifi_rssi_state2, 2,
-			   coex_sta->wifi_coex_thres2 , 0);
-
-	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
-			coex_sta->bt_coex_thres , 0);
-
-	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
-			 coex_sta->bt_coex_thres2 , 0);
-
-#if 0
-	halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
-	halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+			   coex_sta->wifi_coex_thres2, 0);
 
-	coex_dm->is_switch_to_1dot5_ant = false;
+	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state, 2,
+			coex_sta->bt_coex_thres, 0);
 
-	halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-	halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
-
-	halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
-#endif
+	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state2, 2,
+			coex_sta->bt_coex_thres2, 0);
 
-
-#if 1
 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
 	    BTC_RSSI_HIGH(bt_rssi_state)) {
 
-		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
+		/*halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-		coex_dm->is_switch_to_1dot5_ant = false;
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
 
 		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
 
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);*/
+		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
+				     BT_8822B_2ANT_PHASE_5G_RUNTIME);
+		halbtc8822b2ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
+		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
 
-		coex_dm->is_switch_to_1dot5_ant = false;
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
 
 		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 
-		if (wifi_busy) {
-			halbtc8822b2ant_coex_table_with_type(btcoexist,
-					NORMAL_EXEC, 0);
-			halbtc8822b2ant_set_ant_path(btcoexist,
-					BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-					BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
-
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						3);
-		} else
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						4);
+		if (wifi_busy)
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+						TRUE, 1);
+		else
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						16);
 	} else {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-		coex_dm->is_switch_to_1dot5_ant = true;
+		coex_dm->is_switch_to_1dot5_ant = TRUE;
 
-		if (wifi_turbo)
-			halbtc8822b2ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 6);
-		else
-			halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-							     7);
+		if ((coex_sta->bt_relink_downcount != 0)
+			&& (wifi_busy)) {
 
-		if (wifi_busy)
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						103);
-		else
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						104);
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"############# [BTCoex],  BT Re-Link + A2DP + WL busy\n");
+			BTC_TRACE(trace_buf);
 
-	}
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
+			halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
+
+		} else {
 
+			if (wifi_turbo)
+				halbtc8822b2ant_coex_table_with_type(btcoexist,
+								     NORMAL_EXEC, 10);
+			else
+				halbtc8822b2ant_coex_table_with_type(btcoexist,
+								     NORMAL_EXEC,
+								     10);
+#if 0
+halbtc8822b2ant_coex_table_with_type(btcoexist,
+NORMAL_EXEC,
+7);
 #endif
 
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+							TRUE, 109);
+		}
+
+	}
+
 }
 
 
-/* PAN(HS) only */
-void halbtc8822b2ant_action_pan_hs(IN struct btc_coexist *btcoexist)
+static
+void halbtc8822b2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
@@ -3012,85 +3382,101 @@ void halbtc8822b2ant_action_pan_hs(IN struct btc_coexist *btcoexist)
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
 	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean	wifi_busy = false, wifi_turbo = false;
+	boolean	wifi_busy = FALSE, wifi_turbo = FALSE;
 
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
 			   &coex_sta->scan_ap_num);
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "############# [BTCoex],  scan_ap_num = %d\n",
-		    coex_sta->scan_ap_num);
+		"############# [BTCoex],  scan_ap_num = %d, wl_noisy = %d\n",
+		    coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
 	BTC_TRACE(trace_buf);
 
 #if 1
-	if ((wifi_busy) && (coex_sta->scan_ap_num <= 4))
-		wifi_turbo = true;
+	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
+		wifi_turbo = TRUE;
 #endif
 
-
 	wifi_rssi_state = halbtc8822b2ant_wifi_rssi_state(btcoexist,
 			  &prewifi_rssi_state, 2,
-			  coex_sta->wifi_coex_thres , 0);
+			  coex_sta->wifi_coex_thres, 0);
 
 	wifi_rssi_state2 = halbtc8822b2ant_wifi_rssi_state(btcoexist,
 			   &prewifi_rssi_state2, 2,
-			   coex_sta->wifi_coex_thres2 , 0);
+			   coex_sta->wifi_coex_thres2, 0);
+
+	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state, 2,
+			coex_sta->bt_coex_thres, 0);
+
+	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state2, 2,
+			coex_sta->bt_coex_thres2, 0);
+
+#if 0
+	halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
+	halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+
+	coex_dm->is_switch_to_1dot5_ant = FALSE;
+
+	halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
 
-	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
-			coex_sta->bt_coex_thres , 0);
+	halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
+#endif
 
-	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
-			 coex_sta->bt_coex_thres2 , 0);
 
+#if 1
 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
 	    BTC_RSSI_HIGH(bt_rssi_state)) {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-		coex_dm->is_switch_to_1dot5_ant = false;
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
 
 		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
 
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
 
-		coex_dm->is_switch_to_1dot5_ant = false;
-
-		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
-
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
 
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 
+		if (wifi_busy)
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						3);
+		else
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						4);
 	} else {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-		coex_dm->is_switch_to_1dot5_ant = true;
+		coex_dm->is_switch_to_1dot5_ant = TRUE;
 
-		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
+		halbtc8822b2ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 8);
 
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+		if (wifi_busy)
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						103);
+		else
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						104);
 	}
 
-}
+#endif
 
+}
 
+static
 void halbtc8822b2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -3100,105 +3486,91 @@ void halbtc8822b2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
 	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean			wifi_busy = false;
+	boolean			wifi_busy = FALSE;
+	u32  wifi_bw = 1;
+
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
+			   &wifi_bw);
 
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
 	wifi_rssi_state = halbtc8822b2ant_wifi_rssi_state(btcoexist,
 			  &prewifi_rssi_state, 2,
-			  coex_sta->wifi_coex_thres , 0);
+			  coex_sta->wifi_coex_thres, 0);
 
 	wifi_rssi_state2 = halbtc8822b2ant_wifi_rssi_state(btcoexist,
 			   &prewifi_rssi_state2, 2,
-			   coex_sta->wifi_coex_thres2 , 0);
+			   coex_sta->wifi_coex_thres2, 0);
 
-	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
-			coex_sta->bt_coex_thres , 0);
+	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state, 2,
+			coex_sta->bt_coex_thres, 0);
 
-	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
-			 coex_sta->bt_coex_thres2 , 0);
+	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state2, 2,
+			coex_sta->bt_coex_thres2, 0);
 
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
 	    BTC_RSSI_HIGH(bt_rssi_state)) {
 
-		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
+		/*halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-		coex_dm->is_switch_to_1dot5_ant = false;
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
 
 		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
-
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);*/
+		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
+				     BT_8822B_2ANT_PHASE_5G_RUNTIME);
+		halbtc8822b2ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
+		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
 
-		coex_dm->is_switch_to_1dot5_ant = false;
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
 
 		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 
-
-
-
-		if (wifi_busy) {
-			if (coex_sta->is_setupLink)
-				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 51);
-			else
-				halbtc8822b2ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 0);
-			halbtc8822b2ant_set_ant_path(btcoexist,
-					     BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
-			/*
-							halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
-			*/
-		} else
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						2);
-
-
+		if (wifi_busy)
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+						TRUE, 1);
+		else
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						16);
 	} else {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-		coex_dm->is_switch_to_1dot5_ant = true;
+		coex_dm->is_switch_to_1dot5_ant = TRUE;
 
-		if ((wifi_busy) && (coex_sta->hid_busy_num >= 2))
-			halbtc8822b2ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 6);
-		else
-			/*
-			halbtc8822b2ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 9);
-							     */
-			halbtc8822b2ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 4);
+		if ((coex_sta->bt_relink_downcount != 0)
+			&& (wifi_busy)) {
 
-		if (wifi_busy) {
-			if (coex_sta->is_setupLink)
-				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 151);
-			else
-				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 101);
-		} else
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						102);
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"############# [BTCoex],  BT Re-Link + A2DP + WL busy\n");
+			BTC_TRACE(trace_buf);
 
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
+			halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
+		} else {
+			halbtc8822b2ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 8);
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+							TRUE, 109);
+		}
 	}
 
 }
 
-
+static
 void halbtc8822b2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -3208,59 +3580,58 @@ void halbtc8822b2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
 	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean	wifi_busy = false, wifi_turbo = false;
+	boolean	wifi_busy = FALSE, wifi_turbo = FALSE;
 
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
 			   &coex_sta->scan_ap_num);
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "############# [BTCoex],  scan_ap_num = %d\n",
-		    coex_sta->scan_ap_num);
+		"############# [BTCoex],  scan_ap_num = %d, wl_noisy = %d\n",
+		    coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
 	BTC_TRACE(trace_buf);
 
 #if 1
-	if ((wifi_busy) && (coex_sta->scan_ap_num <= 4))
-		wifi_turbo = true;
+	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
+		wifi_turbo = TRUE;
 #endif
 
 
 	wifi_rssi_state = halbtc8822b2ant_wifi_rssi_state(btcoexist,
 			  &prewifi_rssi_state, 2,
-			  coex_sta->wifi_coex_thres , 0);
+			  coex_sta->wifi_coex_thres, 0);
 
 	wifi_rssi_state2 = halbtc8822b2ant_wifi_rssi_state(btcoexist,
 			   &prewifi_rssi_state2, 2,
-			   coex_sta->wifi_coex_thres2 , 0);
+			   coex_sta->wifi_coex_thres2, 0);
 
-	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
-			coex_sta->bt_coex_thres , 0);
+	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state, 2,
+			coex_sta->bt_coex_thres, 0);
 
-	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
-			 coex_sta->bt_coex_thres2 , 0);
+	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state2, 2,
+			coex_sta->bt_coex_thres2, 0);
 
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
 	    BTC_RSSI_HIGH(bt_rssi_state)) {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
-		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+		/*halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);*/
 
-		coex_dm->is_switch_to_1dot5_ant = false;
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
 
 		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
 
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
-		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
+		/*halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);*/
 
-		coex_dm->is_switch_to_1dot5_ant = false;
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
 
 		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 
@@ -3269,26 +3640,27 @@ void halbtc8822b2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
 			if ((coex_sta->a2dp_bit_pool > 40) &&
 			    (coex_sta->a2dp_bit_pool < 255))
 				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 7);
+							TRUE, 7);
 			else
 				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 5);
+							TRUE, 5);
 		} else
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
 						6);
 
 	} else {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
-		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+		/*halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);*/
 
-		coex_dm->is_switch_to_1dot5_ant = true;
+		coex_dm->is_switch_to_1dot5_ant = TRUE;
 
 		if (wifi_turbo)
 			halbtc8822b2ant_coex_table_with_type(btcoexist,
 							     NORMAL_EXEC, 6);
 		else
-			halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
+			halbtc8822b2ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC,
 							     7);
 
 		if (wifi_busy) {
@@ -3296,12 +3668,12 @@ void halbtc8822b2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
 			if ((coex_sta->a2dp_bit_pool > 40) &&
 			    (coex_sta->a2dp_bit_pool < 255))
 				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 107);
+							TRUE, 107);
 			else
 				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 105);
+							TRUE, 105);
 		} else
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
 						106);
 
 	}
@@ -3310,7 +3682,9 @@ void halbtc8822b2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
 
 
 
+
 /* PAN(EDR)+A2DP */
+static
 void halbtc8822b2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -3320,36 +3694,35 @@ void halbtc8822b2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
 	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean	wifi_busy = false, wifi_turbo = false;
+	boolean	wifi_busy = FALSE, wifi_turbo = FALSE;
 
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
 			   &coex_sta->scan_ap_num);
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "############# [BTCoex],  scan_ap_num = %d\n",
-		    coex_sta->scan_ap_num);
+		"############# [BTCoex],  scan_ap_num = %d, wl_noisy = %d\n",
+		    coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
 	BTC_TRACE(trace_buf);
 
-#if 1
-	if ((wifi_busy) && (coex_sta->scan_ap_num <= 4))
-		wifi_turbo = true;
-#endif
-
+	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
+		wifi_turbo = TRUE;
 
 	wifi_rssi_state = halbtc8822b2ant_wifi_rssi_state(btcoexist,
 			  &prewifi_rssi_state, 2,
-			  coex_sta->wifi_coex_thres , 0);
+			  coex_sta->wifi_coex_thres, 0);
 
 	wifi_rssi_state2 = halbtc8822b2ant_wifi_rssi_state(btcoexist,
 			   &prewifi_rssi_state2, 2,
-			   coex_sta->wifi_coex_thres2 , 0);
+			   coex_sta->wifi_coex_thres2, 0);
 
-	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
-			coex_sta->bt_coex_thres , 0);
+	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state, 2,
+			coex_sta->bt_coex_thres, 0);
 
-	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
-			 coex_sta->bt_coex_thres2 , 0);
+	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state2, 2,
+			coex_sta->bt_coex_thres2, 0);
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
 	    BTC_RSSI_HIGH(bt_rssi_state)) {
@@ -3357,21 +3730,17 @@ void halbtc8822b2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-		coex_dm->is_switch_to_1dot5_ant = false;
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
 
 		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
-
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
 
-		coex_dm->is_switch_to_1dot5_ant = false;
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
 
 		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 
@@ -3381,49 +3750,35 @@ void halbtc8822b2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
 			     (coex_sta->a2dp_bit_pool < 255)) ||
 			    (!coex_sta->is_A2DP_3M))
 				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 7);
+							TRUE, 7);
 			else
-				halbtc8822b2ant_coex_table_with_type(btcoexist,
-											 NORMAL_EXEC, 0);
-			halbtc8822b2ant_set_ant_path(btcoexist,
-						BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-						BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
 				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 5);
+							TRUE, 5);
 		} else
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
 						6);
 	} else {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-		coex_dm->is_switch_to_1dot5_ant = true;
+		coex_dm->is_switch_to_1dot5_ant = TRUE;
 
-		if (wifi_turbo)
-			halbtc8822b2ant_coex_table_with_type(btcoexist,
-							     NORMAL_EXEC, 6);
+		halbtc8822b2ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC,
+							     8);
+		if (wifi_busy)
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						107);
 		else
-			halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
-							     7);
-
-		if (wifi_busy) {
-
-			if ((coex_sta->a2dp_bit_pool > 40) &&
-			    (coex_sta->a2dp_bit_pool < 255))
-				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 107);
-			else
-				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 105);
-		} else
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
 						106);
-
 	}
 
 }
 
+
+static
 void halbtc8822b2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -3432,25 +3787,30 @@ void halbtc8822b2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
 
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
-	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean			wifi_busy = false;
+	u8	wifi_rssi_state2, bt_rssi_state2;
+	boolean	wifi_busy = FALSE;
+	u32	wifi_bw = 1;
 
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
+			   &wifi_bw);
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
 	wifi_rssi_state = halbtc8822b2ant_wifi_rssi_state(btcoexist,
 			  &prewifi_rssi_state, 2,
-			  coex_sta->wifi_coex_thres , 0);
+			  coex_sta->wifi_coex_thres, 0);
 
 	wifi_rssi_state2 = halbtc8822b2ant_wifi_rssi_state(btcoexist,
 			   &prewifi_rssi_state2, 2,
-			   coex_sta->wifi_coex_thres2 , 0);
+			   coex_sta->wifi_coex_thres2, 0);
 
-	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
-			coex_sta->bt_coex_thres , 0);
+	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state, 2,
+			coex_sta->bt_coex_thres, 0);
 
-	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
-			 coex_sta->bt_coex_thres2 , 0);
+	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state2, 2,
+			coex_sta->bt_coex_thres2, 0);
 
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
@@ -3459,57 +3819,48 @@ void halbtc8822b2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-		coex_dm->is_switch_to_1dot5_ant = false;
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
 
 		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
-
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
 
-		coex_dm->is_switch_to_1dot5_ant = false;
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
 
 		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 
 		if (wifi_busy)
-
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
 						3);
 		else
-
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
 						4);
-
-
 	} else {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
 		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
 
-		coex_dm->is_switch_to_1dot5_ant = true;
+		coex_dm->is_switch_to_1dot5_ant = TRUE;
 
-		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
 
 		if (wifi_busy)
-
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
 						103);
 		else
-
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
 						104);
-
 	}
 
 }
 
+
 /* HID+A2DP+PAN(EDR) */
+static
 void halbtc8822b2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
 {
 	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
@@ -3518,48 +3869,53 @@ void halbtc8822b2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
 
 	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
 	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
-	u8		wifi_rssi_state2, bt_rssi_state2;
-	boolean			wifi_busy = false;
+	u8	wifi_rssi_state2, bt_rssi_state2;
+	boolean	wifi_busy = FALSE;
+	u32	wifi_bw = 1;
 
+	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
+			   &wifi_bw);
 
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 
 	wifi_rssi_state = halbtc8822b2ant_wifi_rssi_state(btcoexist,
 			  &prewifi_rssi_state, 2,
-			  coex_sta->wifi_coex_thres , 0);
+			  coex_sta->wifi_coex_thres, 0);
 
 	wifi_rssi_state2 = halbtc8822b2ant_wifi_rssi_state(btcoexist,
 			   &prewifi_rssi_state2, 2,
-			   coex_sta->wifi_coex_thres2 , 0);
+			   coex_sta->wifi_coex_thres2, 0);
 
-	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
-			coex_sta->bt_coex_thres , 0);
+	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state, 2,
+			coex_sta->bt_coex_thres, 0);
 
-	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
-			 coex_sta->bt_coex_thres2 , 0);
+	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state2, 2,
+			coex_sta->bt_coex_thres2, 0);
 
 
 	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
 	    BTC_RSSI_HIGH(bt_rssi_state)) {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
-		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+#if 0
+		/*halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);*/
+#endif
 
-		coex_dm->is_switch_to_1dot5_ant = false;
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
 
 		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
-					     NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
-
-		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
 	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
 		   BTC_RSSI_HIGH(bt_rssi_state2)) {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
-		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
+#if 0
+		/*halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);*/
+#endif
 
-		coex_dm->is_switch_to_1dot5_ant = false;
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
 
 		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
 
@@ -3569,76 +3925,297 @@ void halbtc8822b2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
 			     (coex_sta->a2dp_bit_pool < 255)) ||
 			    (!coex_sta->is_A2DP_3M))
 				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 7);
+							TRUE, 7);
 			else
 				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 5);
+							TRUE, 5);
 		} else
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
 						6);
 	} else {
 
 		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
-		halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+#if 0
+		/*halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);*/
+#endif
 
-		coex_dm->is_switch_to_1dot5_ant = true;
+		coex_dm->is_switch_to_1dot5_ant = TRUE;
 
-		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+		if (coex_sta->hid_busy_num >= 2) {
+			halbtc8822b2ant_coex_table_with_type(btcoexist,
+							     NORMAL_EXEC, 8);
+
+			if (wifi_bw == 0) {
+				halbtc8822b2ant_set_wltoggle_coex_table(
+					btcoexist,
+					NORMAL_EXEC,
+					0x1, 0xaa,
+					0x5a, 0xaa,
+					0xaa);
+				}
+			else
+				halbtc8822b2ant_set_wltoggle_coex_table(
+					btcoexist,
+					NORMAL_EXEC,
+					0x2, 0xaa,
+					0x5a, 0xaa,
+					0xaa);
+
+			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+						110);
+		} else {
+			halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
 
-		if (wifi_busy) {
+			if (wifi_busy) {
 
-			if ((coex_sta->a2dp_bit_pool > 40) &&
-			    (coex_sta->a2dp_bit_pool < 255))
-				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 107);
-			else
-				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
-							true, 105);
-		} else
-			halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
-						106);
+				if ((coex_sta->a2dp_bit_pool > 40) &&
+				    (coex_sta->a2dp_bit_pool < 255))
+					halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+								TRUE, 107);
+				else
+					halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+								TRUE, 105);
+			} else
+				halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, TRUE,
+							106);
+		}
 	}
 
 }
 
-
-
+static
 void halbtc8822b2ant_action_bt_whck_test(IN struct btc_coexist *btcoexist)
 {
 	halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
-	halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+#if 0
+	/*halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);*/
+#endif
 
 	halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-	halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
+#if 0
+	/*halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
+				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);*/
+#endif
 
-	halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+	halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
 }
 
+static
+void halbtc8822b2ant_action_bt_hs(IN struct btc_coexist *btcoexist)
+{
+	static u8	prewifi_rssi_state = BTC_RSSI_STATE_LOW;
+	static u8	pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
+	u8		wifi_rssi_state, bt_rssi_state;
+
+	static u8	prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
+	static u8	pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
+	u8		wifi_rssi_state2, bt_rssi_state2;
+	boolean	wifi_busy = FALSE, wifi_turbo = FALSE;
+
+
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
+	btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
+			   &coex_sta->scan_ap_num);
+	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+		"############# [BTCoex],  scan_ap_num = %d, wl_noisy = %d\n",
+		    coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
+	BTC_TRACE(trace_buf);
+
+#if 1
+	if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
+		wifi_turbo = TRUE;
+#endif
+
+
+	wifi_rssi_state = halbtc8822b2ant_wifi_rssi_state(btcoexist,
+			  &prewifi_rssi_state, 2,
+			  coex_sta->wifi_coex_thres, 0);
+
+	wifi_rssi_state2 = halbtc8822b2ant_wifi_rssi_state(btcoexist,
+			   &prewifi_rssi_state2, 2,
+			   coex_sta->wifi_coex_thres2, 0);
+
+	bt_rssi_state = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state, 2,
+			coex_sta->bt_coex_thres, 0);
+
+	bt_rssi_state2 = halbtc8822b2ant_bt_rssi_state(btcoexist,
+			&pre_bt_rssi_state2, 2,
+			coex_sta->bt_coex_thres2, 0);
+
+	if (BTC_RSSI_HIGH(wifi_rssi_state) &&
+	    BTC_RSSI_HIGH(bt_rssi_state)) {
+
+		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
+#if 0
+		/*halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);*/
+#endif
+
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
+
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
+	} else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
+		   BTC_RSSI_HIGH(bt_rssi_state2)) {
+
+		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
+#if 0
+		/*halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);*/
+#endif
+
+		coex_dm->is_switch_to_1dot5_ant = FALSE;
+
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
+
+
+	} else {
+
+		halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
+#if 0
+		/*halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);*/
+#endif
+
+		coex_dm->is_switch_to_1dot5_ant = TRUE;
+
+		halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+
+		halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
+	}
+
+}
+
+static
 void halbtc8822b2ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
 {
 	halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
-	halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+#if 0
+	/*halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);*/
+#endif
 
 	/* hw all off */
+	/*halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);*/
+	halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
+		     BT_8822B_2ANT_PHASE_5G_RUNTIME);
+	halbtc8822b2ant_rx_gain(btcoexist, NORMAL_EXEC, TRUE);
 	halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-	halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
+	halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
+	halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xc8);
 
-	halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+#if 0
+	/*halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
+				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);*/
+#endif
+
+	/*halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);*/
 }
 
+static
+void halbtc8822b2ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
+	{
+		switch (coex_dm->cur_algorithm) {
+
+		case BT_8822B_2ANT_COEX_ALGO_SCO:
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					"[BTCoex], Action 2-Ant, algorithm = SCO.\n");
+			BTC_TRACE(trace_buf);
+			halbtc8822b2ant_action_sco(btcoexist);
+			break;
+		case BT_8822B_2ANT_COEX_ALGO_HID:
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					"[BTCoex], Action 2-Ant, algorithm = HID.\n");
+			BTC_TRACE(trace_buf);
+			halbtc8822b2ant_action_hid(btcoexist);
+			break;
+		case BT_8822B_2ANT_COEX_ALGO_A2DP:
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					"[BTCoex], Action 2-Ant, algorithm = A2DP.\n");
+			BTC_TRACE(trace_buf);
+			halbtc8822b2ant_action_a2dp(btcoexist);
+			break;
+		case BT_8822B_2ANT_COEX_ALGO_A2DPSINK:
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], Action 2-Ant, algorithm = A2DP Sink.\n");
+			BTC_TRACE(trace_buf);
+			halbtc8822b2ant_action_a2dpsink(btcoexist);
+			break;
+		case BT_8822B_2ANT_COEX_ALGO_A2DP_PANHS:
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
+			BTC_TRACE(trace_buf);
+			halbtc8822b2ant_action_a2dp_pan_hs(btcoexist);
+			break;
+		case BT_8822B_2ANT_COEX_ALGO_PANEDR:
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					"[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n");
+			BTC_TRACE(trace_buf);
+			halbtc8822b2ant_action_pan_edr(btcoexist);
+			break;
+		case BT_8822B_2ANT_COEX_ALGO_PANEDR_A2DP:
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					"[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n");
+			BTC_TRACE(trace_buf);
+			halbtc8822b2ant_action_pan_edr_a2dp(btcoexist);
+			break;
+		case BT_8822B_2ANT_COEX_ALGO_PANEDR_HID:
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
+			BTC_TRACE(trace_buf);
+			halbtc8822b2ant_action_pan_edr_hid(btcoexist);
+			break;
+		case BT_8822B_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
+			BTC_TRACE(trace_buf);
+			halbtc8822b2ant_action_hid_a2dp_pan_edr(
+				btcoexist);
+			break;
+		case BT_8822B_2ANT_COEX_ALGO_HID_A2DP:
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					"[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n");
+			BTC_TRACE(trace_buf);
+			halbtc8822b2ant_action_hid_a2dp(btcoexist);
+			break;
+		case BT_8822B_2ANT_COEX_ALGO_NOPROFILEBUSY:
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], Action 2-Ant, algorithm = No-Profile busy.\n");
+			BTC_TRACE(trace_buf);
+			halbtc8822b2ant_action_bt_idle(btcoexist);
+			break;
+		default:
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n");
+			BTC_TRACE(trace_buf);
+			halbtc8822b2ant_rx_gain(btcoexist, NORMAL_EXEC, FALSE);
+			halbtc8822b2ant_action_coex_all_off(btcoexist);
+			break;
+		}
+
+		coex_dm->pre_algorithm = coex_dm->cur_algorithm;
+
+	}
+
+static
 void halbtc8822b2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 {
 	u8				algorithm = 0;
 	u32				num_of_wifi_link = 0;
 	u32				wifi_link_status = 0;
 	struct  btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
-	boolean				miracast_plus_bt = false;
-	boolean				scan = false, link = false, roam = false,
-				wifi_connected = false, wifi_under_5g = false;
-
+	boolean				miracast_plus_bt = FALSE;
+	boolean				scan = FALSE, link = FALSE, roam = FALSE,
+					under_4way = FALSE,
+					wifi_connected = FALSE, wifi_under_5g =
+							FALSE,
+							bt_hs_on = FALSE;
 
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
+			   &under_4way);
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], RunCoexistMechanism()===>\n");
@@ -3665,9 +4242,18 @@ void halbtc8822b2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 		return;
 	}
 
+	if ((coex_sta->under_lps) &&
+		(coex_dm->bt_status != BT_8822B_2ANT_BT_STATUS_ACL_BUSY)) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], RunCoexistMechanism(), wifi is under LPS !!!\n");
+		BTC_TRACE(trace_buf);
+		halbtc8822b2ant_action_wifi_native_lps(btcoexist);
+		return;
+	}
+
 	if (!coex_sta->run_time_state) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], return for run_time_state = false !!!\n");
+			"[BTCoex], return for run_time_state = FALSE !!!\n");
 		BTC_TRACE(trace_buf);
 		return;
 	}
@@ -3679,15 +4265,16 @@ void halbtc8822b2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 		return;
 	}
 
-
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
 
-	if (wifi_under_5g) {
+	if ((wifi_under_5g) &&
+		(coex_sta->switch_band_notify_to != BTC_SWITCH_TO_24G) &&
+		(coex_sta->switch_band_notify_to != BTC_SWITCH_TO_24G_NOFORSCAN)) {
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], WiFi is under 5G!!!\n");
 		BTC_TRACE(trace_buf);
-
+		halbtc8822b2ant_rx_gain(btcoexist, NORMAL_EXEC, FALSE);
 		halbtc8822b2ant_action_wifi_under5g(btcoexist);
 		return;
 	}
@@ -3713,6 +4300,7 @@ void halbtc8822b2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], BT is disabled!!!\n");
 		BTC_TRACE(trace_buf);
+		halbtc8822b2ant_rx_gain(btcoexist, NORMAL_EXEC, FALSE);
 		halbtc8822b2ant_action_coex_all_off(btcoexist);
 		return;
 	}
@@ -3721,19 +4309,17 @@ void halbtc8822b2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], BT is under inquiry/page scan !!\n");
 		BTC_TRACE(trace_buf);
+		halbtc8822b2ant_rx_gain(btcoexist, NORMAL_EXEC, FALSE);
 		halbtc8822b2ant_action_bt_inquiry(btcoexist);
 		return;
 	}
 
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
-	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
-
-	if (scan || link || roam) {
+	if (coex_sta->is_setupLink) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], WiFi is under Link Process !!\n");
+			    "[BTCoex], BT is re-link !!!\n");
 		BTC_TRACE(trace_buf);
-		halbtc8822b2ant_action_wifi_link_process(btcoexist);
+		halbtc8822b2ant_rx_gain(btcoexist, NORMAL_EXEC, FALSE);
+		halbtc8822b2ant_action_bt_relink(btcoexist);
 		return;
 	}
 
@@ -3750,156 +4336,113 @@ void halbtc8822b2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
 		BTC_TRACE(trace_buf);
 
 		if (bt_link_info->bt_link_exist)
-			miracast_plus_bt = true;
+			miracast_plus_bt = TRUE;
 		else
-			miracast_plus_bt = false;
+			miracast_plus_bt = FALSE;
 
 		btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
 				   &miracast_plus_bt);
-		halbtc8822b2ant_action_wifi_multi_port(btcoexist);
+
+		if (scan || link || roam || under_4way) {
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], scan = %d, link = %d, roam = %d 4way = %d!!!\n",
+				    scan, link, roam, under_4way);
+			BTC_TRACE(trace_buf);
+
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				"[BTCoex], wifi is under linkscan process + Multi-Port !!\n");
+			BTC_TRACE(trace_buf);
+
+			halbtc8822b2ant_action_wifi_link_process(btcoexist);
+		} else {
+			halbtc8822b2ant_action_wifi_multi_port(btcoexist);
+		}
 
 		return;
 	}
 
-	miracast_plus_bt = false;
+	miracast_plus_bt = FALSE;
 	btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
 			   &miracast_plus_bt);
 
 
+
+	btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
+
+	if (bt_hs_on) {
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "############# [BTCoex],  BT Is hs\n");
+		BTC_TRACE(trace_buf);
+		halbtc8822b2ant_action_bt_hs(btcoexist);
+		return;
+	}
+
+	if ((BT_8822B_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
+	     coex_dm->bt_status) ||
+	    (BT_8822B_2ANT_BT_STATUS_CONNECTED_IDLE ==
+	     coex_dm->bt_status)) {
+		halbtc8822b2ant_rx_gain(btcoexist, NORMAL_EXEC, FALSE);
+
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], Action 2-Ant, bt idle!!.\n");
+		BTC_TRACE(trace_buf);
+
+		halbtc8822b2ant_action_bt_idle(btcoexist);
+		return;
+	}
+
 	algorithm = halbtc8822b2ant_action_algorithm(btcoexist);
 	coex_dm->cur_algorithm = algorithm;
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Algorithm = %d\n",
 		    coex_dm->cur_algorithm);
 	BTC_TRACE(trace_buf);
 
-
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
 			   &wifi_connected);
 
-	if (!wifi_connected) {
-
+	if (scan || link || roam || under_4way) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Action 2-Ant, wifi non-connected!!.\n");
+			    "[BTCoex], WiFi is under Link Process !!\n");
 		BTC_TRACE(trace_buf);
-		halbtc8822b2ant_action_wifi_nonconnected(btcoexist);
-
-	} else if ((BT_8822B_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
-		    coex_dm->bt_status) ||
-		   (BT_8822B_2ANT_BT_STATUS_CONNECTED_IDLE ==
-		    coex_dm->bt_status)) {
+		halbtc8822b2ant_action_wifi_link_process(btcoexist);
+	} else if (wifi_connected) {
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			    "[BTCoex], Action 2-Ant, bt idle!!.\n");
+			    "[BTCoex], Action 2-Ant, wifi connected!!.\n");
 		BTC_TRACE(trace_buf);
-
-		halbtc8822b2ant_action_bt_idle(btcoexist);
+		halbtc8822b2ant_action_wifi_connected(btcoexist);
 
 	} else {
 
-		if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], pre_algorithm=%d, cur_algorithm=%d\n",
-				coex_dm->pre_algorithm, coex_dm->cur_algorithm);
-			BTC_TRACE(trace_buf);
-		}
-
-		switch (coex_dm->cur_algorithm) {
-
-		case BT_8822B_2ANT_COEX_ALGO_SCO:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = SCO.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8822b2ant_action_sco(btcoexist);
-			break;
-		case BT_8822B_2ANT_COEX_ALGO_HID:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = HID.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8822b2ant_action_hid(btcoexist);
-			break;
-		case BT_8822B_2ANT_COEX_ALGO_A2DP:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = A2DP.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8822b2ant_action_a2dp(btcoexist);
-			break;
-		case BT_8822B_2ANT_COEX_ALGO_A2DP_PANHS:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
-			BTC_TRACE(trace_buf);
-			halbtc8822b2ant_action_a2dp_pan_hs(btcoexist);
-			break;
-		case BT_8822B_2ANT_COEX_ALGO_PANEDR:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n");
-			BTC_TRACE(trace_buf);
-			halbtc8822b2ant_action_pan_edr(btcoexist);
-			break;
-		case BT_8822B_2ANT_COEX_ALGO_PANHS:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = HS mode.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8822b2ant_action_pan_hs(btcoexist);
-			break;
-		case BT_8822B_2ANT_COEX_ALGO_PANEDR_A2DP:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8822b2ant_action_pan_edr_a2dp(btcoexist);
-			break;
-		case BT_8822B_2ANT_COEX_ALGO_PANEDR_HID:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8822b2ant_action_pan_edr_hid(btcoexist);
-			break;
-		case BT_8822B_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8822b2ant_action_hid_a2dp_pan_edr(
-				btcoexist);
-			break;
-		case BT_8822B_2ANT_COEX_ALGO_HID_A2DP:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8822b2ant_action_hid_a2dp(btcoexist);
-			break;
-		case BT_8822B_2ANT_COEX_ALGO_NOPROFILEBUSY:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = No-Profile busy.\n");
-			BTC_TRACE(trace_buf);
-			halbtc8822b2ant_action_bt_idle(btcoexist);
-			break;
-		default:
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n");
-			BTC_TRACE(trace_buf);
-			halbtc8822b2ant_action_coex_all_off(btcoexist);
-			break;
-		}
-		coex_dm->pre_algorithm = coex_dm->cur_algorithm;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			    "[BTCoex], Action 2-Ant, wifi not-connected!!.\n");
+		BTC_TRACE(trace_buf);
+		halbtc8822b2ant_action_wifi_nonconnected(btcoexist);
 	}
 }
 
+static
 void halbtc8822b2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
 {
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], Coex Mechanism Init!!\n");
 	BTC_TRACE(trace_buf);
 
-	halbtc8822b2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, false);
+	halbtc8822b2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, FALSE);
 
-	halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-	halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
-				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);
+	halbtc8822b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
+#if 0
+	/*halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
+				     BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT);*/
+#endif
 
 	/* fw all off */
-	halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+	halbtc8822b2ant_ps_tdma(btcoexist, NORMAL_EXEC, FALSE, 0);
 
 	halbtc8822b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0xd8);
-	halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+#if 0
+	/*halbtc8822b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);*/
+#endif
 
 	coex_sta->pop_event_cnt = 0;
 	coex_sta->cnt_RemoteNameReq = 0;
@@ -3907,25 +4450,27 @@ void halbtc8822b2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
 	coex_sta->cnt_setupLink = 0;
 	coex_sta->cnt_IgnWlanAct = 0;
 	coex_sta->cnt_Page = 0;
+	coex_sta->cnt_RoleSwitch = 0;
+	coex_sta->switch_band_notify_to = BTC_NOT_SWITCH;
 
 	halbtc8822b2ant_query_bt_info(btcoexist);
 }
 
 
+static
 void halbtc8822b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
 				    IN boolean wifi_only)
 {
-	u8	u8tmp = 0;
-	u32	 vendor;
-	u32				u32tmp0 = 0, u32tmp1 = 0, u32tmp2 = 0, u32tmp3 = 0;
+	u32	u32tmp1 = 0, u32tmp2 = 0, u32tmp3 = 0;
 	u32	RTL97F_8822B = 0;
+	u8 i = 0;
 
 
 	u32tmp3 = btcoexist->btc_read_4byte(btcoexist, 0xcb4);
 	u32tmp1 = halbtc8822b2ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
 	u32tmp2 = halbtc8822b2ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
 
-	if (RTL97F_8822B == true) {
+	if (RTL97F_8822B) {
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x66, 0x04, 0x0);
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x41, 0x02, 0x0);
 
@@ -3939,7 +4484,7 @@ void halbtc8822b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
 					   BT_8822B_2ANT_GNT_BLOCK_RFC_BB,
 					   BT_8822B_2ANT_GNT_TYPE_CTRL_BY_SW,
 					   BT_8822B_2ANT_SIG_STA_SET_TO_HIGH);
-		 return;
+		return;
 	}
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -3960,6 +4505,13 @@ void halbtc8822b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
 	coex_sta->bt_reg_vendor_ac = 0xffff;
 	coex_sta->bt_reg_vendor_ae = 0xffff;
 	coex_sta->isolation_btween_wb = BT_8822B_2ANT_DEFAULT_ISOLATION;
+	coex_sta->gnt_error_cnt = 0;
+	coex_sta->bt_relink_downcount = 0;
+	coex_sta->is_set_ps_state_fail = FALSE;
+	coex_sta->cnt_set_ps_state_fail = 0;
+
+	for (i = 0; i <= 9; i++)
+		coex_sta->bt_afh_map[i] = 0;
 
 	/* 0xf0[15:12] --> Chip Cut information */
 	coex_sta->cut_version = (btcoexist->btc_read_1byte(btcoexist,
@@ -3986,47 +4538,68 @@ void halbtc8822b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
 	/* Enable PTA (tx/rx signal form WiFi side) */
 	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4c6, 0x10, 0x1);
 
-	halbtc8822b2ant_enable_gnt_to_gpio(btcoexist, true);
+	halbtc8822b2ant_enable_gnt_to_gpio(btcoexist, TRUE);
 
 	/*GNT_BT=1 while select both */
 	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x763, 0x10, 0x1);
 
 
 	/* check if WL firmware download ok */
-	/*if (btcoexist->btc_read_1byte(btcoexist, 0x80) == 0xc6)*/
+#if 0
+	if (btcoexist->btc_read_1byte(btcoexist, 0x80) == 0xc6)
+#endif
 	halbtc8822b2ant_post_state_to_bt(btcoexist,
-					 BT_8822B_2ANT_SCOREBOARD_ONOFF, true);
+					 BT_8822B_2ANT_SCOREBOARD_ONOFF, TRUE);
 
 	/* Enable counter statistics */
 	btcoexist->btc_write_1byte(btcoexist, 0x76e,
 			   0x4); /* 0x76e[3] =1, WLAN_Act control by PTA */
 
+#if 0
 	/* WLAN_Tx by GNT_WL  0x950[29] = 0 */
-	/* btcoexist->btc_write_1byte_bitmask(btcoexist, 0x953, 0x20, 0x0); */
+	btcoexist->btc_write_1byte_bitmask(btcoexist, 0x953, 0x20, 0x0);
+#endif
 
-	halbtc8822b2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
+	halbtc8822b2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 5);
 
-	halbtc8822b2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
+	halbtc8822b2ant_ps_tdma(btcoexist, FORCE_EXEC, FALSE, 0);
+
+	psd_scan->ant_det_is_ant_det_available = TRUE;
+
+	if (coex_sta->is_rf_state_off) {
+
+		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
+					     FORCE_EXEC,
+					     BT_8822B_2ANT_PHASE_WLAN_OFF);
 
-	psd_scan->ant_det_is_ant_det_available = true;
+		btcoexist->stop_coex_dm = TRUE;
 
-	if (wifi_only) {
-		coex_sta->concurrent_rx_mode_on = false;
+		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+			"[BTCoex], **********  halbtc8822b2ant_init_hw_config (RF Off)**********\n");
+		BTC_TRACE(trace_buf);
+	} else if (wifi_only) {
+		coex_sta->concurrent_rx_mode_on = FALSE;
 		/* Path config	 */
 		/* Set Antenna Path */
 		halbtc8822b2ant_set_ant_path(btcoexist,	BTC_ANT_PATH_AUTO,
 					     FORCE_EXEC,
 					     BT_8822B_2ANT_PHASE_WLANONLY_INIT);
 
-		btcoexist->stop_coex_dm = true;
+		btcoexist->stop_coex_dm = TRUE;
 	} else {
-		/*Set BT polluted packet on for Tx rate adaptive not including Tx retry break by PTA, 0x45c[19] =1 */
+		/* Set BT polluted packet on for Tx rate adaptive not including
+		 * Tx retry break by PTA, 0x45c[19] =1
+		 */
 		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x45e, 0x8, 0x1);
 
-		coex_sta->concurrent_rx_mode_on = true;
-		/* btcoexist->btc_write_1byte_bitmask(btcoexist, 0x953, 0x2, 0x1); */
+		coex_sta->concurrent_rx_mode_on = TRUE;
+#if 0
+		btcoexist->btc_write_1byte_bitmask(btcoexist, 0x953, 0x2, 0x1);
+#endif
 
-		/* RF 0x1[1] = 0->Set GNT_WL_RF_Rx always = 1 for con-current Rx, mask Tx only */
+		/* RF 0x1[1] = 0->Set GNT_WL_RF_Rx always = 1 for
+		 * con-current Rx, mask Tx only
+		 */
 		btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0x2, 0x0);
 
 		/* Set Antenna Path */
@@ -4034,7 +4607,7 @@ void halbtc8822b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
 					     FORCE_EXEC,
 					     BT_8822B_2ANT_PHASE_COEX_INIT);
 
-		btcoexist->stop_coex_dm = false;
+		btcoexist->stop_coex_dm = FALSE;
 	}
 }
 
@@ -4051,7 +4624,6 @@ void ex_halbtc8822b2ant_power_on_setting(IN struct btc_coexist *btcoexist)
 	struct  btc_board_info	*board_info = &btcoexist->board_info;
 	u8 u8tmp = 0x0;
 	u16 u16tmp = 0x0;
-	u32	value = 0;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		"xxxxxxxxxxxxxxxx Execute 8822b 2-Ant PowerOn Setting xxxxxxxxxxxxxxxx!!\n");
@@ -4064,10 +4636,10 @@ void ex_halbtc8822b2ant_power_on_setting(IN struct btc_coexist *btcoexist)
 	BTC_TRACE(trace_buf);
 
 
-	btcoexist->stop_coex_dm = true;
-	psd_scan->ant_det_is_ant_det_available = false;
+	btcoexist->stop_coex_dm = TRUE;
+	psd_scan->ant_det_is_ant_det_available = FALSE;
 
-	/* enable BB, REG_SYS_FUNC_EN such that we can write BB Register correctly. */
+	/* enable BB, REG_SYS_FUNC_EN such that we can write BB Reg correctly */
 	u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x2);
 	btcoexist->btc_write_2byte(btcoexist, 0x2, u16tmp | BIT(0) | BIT(1));
 
@@ -4076,9 +4648,12 @@ void ex_halbtc8822b2ant_power_on_setting(IN struct btc_coexist *btcoexist)
 	/*	BIT0: "0" for no antenna inverse; "1" for antenna inverse  */
 	/*	BIT1: "0" for internal switch; "1" for external switch */
 	/*	BIT2: "0" for one antenna; "1" for two antenna */
-	/* NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 */
+	/* NOTE: here default all internal switch and 1-antenna ==>
+	 * BIT1=0 and BIT2=0
+	 */
 
 	/* Check efuse 0xc3[6] for Single Antenna Path */
+#if 0
 	if (board_info->single_ant_path == 0) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], **********  Single Antenna, Antenna at Aux Port\n");
@@ -4101,6 +4676,7 @@ void ex_halbtc8822b2ant_power_on_setting(IN struct btc_coexist *btcoexist)
 		"[BTCoex], ********** (Power On) single_ant_path  = %d, btdm_ant_pos = %d\n",
 		    board_info->single_ant_path , board_info->btdm_ant_pos);
 	BTC_TRACE(trace_buf);
+#endif
 
 	/* Setup RF front end type */
 	halbtc8822b2ant_set_rfe_type(btcoexist);
@@ -4109,7 +4685,9 @@ void ex_halbtc8822b2ant_power_on_setting(IN struct btc_coexist *btcoexist)
 	halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
 				     BT_8822B_2ANT_PHASE_COEX_POWERON);
 
-	/* Save"single antenna position" info in Local register setting for FW reading, because FW may not ready at  power on */
+	/* Save"single antenna position" info in Local register setting for
+	 * FW reading, because FW may not ready at power on
+	 */
 	if (btcoexist->chip_interface == BTC_INTF_PCI)
 		btcoexist->btc_write_local_reg_1byte(btcoexist, 0x3e0, u8tmp);
 	else if (btcoexist->chip_interface == BTC_INTF_USB)
@@ -4118,7 +4696,7 @@ void ex_halbtc8822b2ant_power_on_setting(IN struct btc_coexist *btcoexist)
 		btcoexist->btc_write_local_reg_1byte(btcoexist, 0x60, u8tmp);
 
 	/* enable GNT_WL/GNT_BT debug signal to GPIO14/15 */
-	halbtc8822b2ant_enable_gnt_to_gpio(btcoexist, true);
+	halbtc8822b2ant_enable_gnt_to_gpio(btcoexist, TRUE);
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		"[BTCoex], **********  LTE coex Reg 0x38 (Power-On) = 0x%x**********\n",
@@ -4139,12 +4717,16 @@ void ex_halbtc8822b2ant_pre_load_firmware(IN struct btc_coexist *btcoexist)
 	u8 u8tmp = 0x4; /* Set BIT2 by default since it's 2ant case */
 
 	/* */
-	/* S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) */
+	/* S0 or S1 setting and Local register setting
+	 * (By the setting fw can get ant number, S0/S1, ... info)
+	 */
 	/* Local setting bit define */
 	/*	BIT0: "0" for no antenna inverse; "1" for antenna inverse  */
 	/*	BIT1: "0" for internal switch; "1" for external switch */
 	/*	BIT2: "0" for one antenna; "1" for two antenna */
-	/* NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 */
+	/* NOTE: here default all internal switch and 1-antenna ==>
+	 *       BIT1=0 and BIT2=0
+	 */
 	if (btcoexist->chip_interface == BTC_INTF_USB) {
 		/* fixed at S0 for USB interface */
 		u8tmp |= 0x1;	/* antenna inverse */
@@ -4166,7 +4748,6 @@ void ex_halbtc8822b2ant_pre_load_firmware(IN struct btc_coexist *btcoexist)
 	}
 }
 
-
 void ex_halbtc8822b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
 				       IN boolean wifi_only)
 {
@@ -4188,11 +4769,12 @@ void ex_halbtc8822b2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	u8				u8tmp[4], i, ps_tdma_case = 0;
 	u32				u32tmp[4];
 	u16				u16tmp[4];
-	u32				fa_ofdm, fa_cck, cca_ofdm, cca_cck;
+	u32				fa_ofdm, fa_cck, cca_ofdm, cca_cck, ratio_ofdm;
 	u32				fw_ver = 0, bt_patch_ver = 0, bt_coex_ver = 0;
 	static u8			pop_report_in_10s = 0;
 	u32			phyver = 0;
-	boolean			lte_coex_on = false;
+	boolean			lte_coex_on = FALSE;
+	static u8 cnt = 0;
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
 		   "\r\n ============[BT Coexist info]============");
@@ -4207,6 +4789,41 @@ void ex_halbtc8822b2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		CL_PRINTF(cli_buf);
 	}
 
+	if (!coex_sta->bt_disabled) {
+		if (coex_sta->bt_coex_supported_feature == 0)
+			btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_FEATURE,
+						&coex_sta->bt_coex_supported_feature);
+
+		if ((coex_sta->bt_coex_supported_version == 0) ||
+			(coex_sta->bt_coex_supported_version == 0xffff))
+			btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_VERSION,
+						&coex_sta->bt_coex_supported_version);
+
+		if (coex_sta->bt_reg_vendor_ac == 0xffff)
+			coex_sta->bt_reg_vendor_ac = (u16)(
+					btcoexist->btc_get_bt_reg(btcoexist, 3,
+					0xac) & 0xffff);
+
+		if (coex_sta->bt_reg_vendor_ae == 0xffff)
+			coex_sta->bt_reg_vendor_ae = (u16)(
+					btcoexist->btc_get_bt_reg(btcoexist, 3,
+					0xae) & 0xffff);
+
+		btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER,
+						&bt_patch_ver);
+		btcoexist->bt_info.bt_get_fw_ver = bt_patch_ver;
+
+		if (coex_sta->num_of_profile > 0) {
+			cnt++;
+
+			if (cnt >= 3) {
+				btcoexist->btc_get_bt_afh_map_from_bt(btcoexist, 0,
+					&coex_sta->bt_afh_map[0]);
+				cnt = 0;
+			}
+		}
+	}
+
 	if (psd_scan->ant_det_try_count == 0) {
 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
 			   "\r\n %-35s = %d/ %d/ %s / %d",
@@ -4234,7 +4851,8 @@ void ex_halbtc8822b2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		if (board_info->btdm_ant_det_finish) {
 
 			if (psd_scan->ant_det_result != 12)
-				CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
+				CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+					   "\r\n %-35s = %s",
 					   "Ant Det PSD Value",
 					   psd_scan->ant_det_peak_val);
 			else
@@ -4248,7 +4866,6 @@ void ex_halbtc8822b2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	}
 
 
-	/*bt_patch_ver = btcoexist->bt_info.bt_get_fw_ver;*/
 	bt_patch_ver = btcoexist->bt_info.bt_get_fw_ver;
 	btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
 	phyver = btcoexist->btc_get_bt_phydm_version(btcoexist);
@@ -4262,8 +4879,9 @@ void ex_halbtc8822b2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		   glcoex_ver_btdesired_8822b_2ant,
 		   bt_coex_ver,
 		   (bt_coex_ver == 0xff ? "Unknown" :
-		    (bt_coex_ver >= glcoex_ver_btdesired_8822b_2ant ?
-		     "Match" : "Mis-Match")));
+		    (coex_sta->bt_disabled ? "BT-disable" :
+		     (bt_coex_ver >= glcoex_ver_btdesired_8822b_2ant ?
+		      "Match" : "Mis-Match"))));
 	CL_PRINTF(cli_buf);
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
@@ -4304,7 +4922,7 @@ void ex_halbtc8822b2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 			   coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page")
 			   : ((BT_8822B_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
 			       coex_dm->bt_status) ? "non-connected idle" :
-		((BT_8822B_2ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)
+		((coex_dm->bt_status == BT_8822B_2ANT_BT_STATUS_CONNECTED_IDLE)
 				       ? "connected-idle" : "busy")))),
 		   coex_sta->bt_rssi - 100, coex_sta->bt_retry_cnt,
 		   coex_sta->pop_event_cnt);
@@ -4320,8 +4938,10 @@ void ex_halbtc8822b2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
 			   "\r\n %-35s = %s%s%s%s%s",
 			   "Profiles",
-			   ((bt_link_info->a2dp_exist) ? "A2DP," : ""),
-			   ((bt_link_info->sco_exist) ?  "SCO," : ""),
+			   ((bt_link_info->a2dp_exist) ?
+			   ((coex_sta->is_bt_a2dp_sink) ? "A2DP sink," :
+			    "A2DP,") : ""),
+			   ((bt_link_info->sco_exist) ?  "HFP," : ""),
 			   ((bt_link_info->hid_exist) ?
 			    ((coex_sta->hid_busy_num >= 2) ? "HID(4/18)," :
 			     "HID(2/18),") : ""),
@@ -4340,7 +4960,7 @@ void ex_halbtc8822b2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 			   ((coex_sta->is_A2DP_3M) ? "3M" : "No_3M"),
 			   coex_sta->a2dp_bit_pool,
 			   ((coex_sta->is_autoslot) ? "On" : "Off")
-			   );
+			  );
 		CL_PRINTF(cli_buf);
 	}
 
@@ -4353,13 +4973,28 @@ void ex_halbtc8822b2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		CL_PRINTF(cli_buf);
 	}
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ 0x%x",
-		   "Role/IgnWlanAct/Feature",
-		   ((bt_link_info->slave_role) ? "Slave" : "Master"),
-		   ((coex_dm->cur_ignore_wlan_act) ? "Yes" : "No"),
-		   coex_sta->bt_coex_supported_feature);
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %s/ 0x%x",
+				"Role/RoleSwCnt/IgnWlact/Feature",
+				((bt_link_info->slave_role) ? "Slave" : "Master"),
+				coex_sta->cnt_RoleSwitch,
+				((coex_dm->cur_ignore_wlan_act) ? "Yes" : "No"),
+				coex_sta->bt_coex_supported_feature);
 	CL_PRINTF(cli_buf);
 
+	if ((coex_sta->bt_ble_scan_type & 0x7) != 0x0) {
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+			"\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
+			"BLEScan Type/TV/Init/Ble",
+			coex_sta->bt_ble_scan_type,
+			(coex_sta->bt_ble_scan_type & 0x1 ?
+			coex_sta->bt_ble_scan_para[0] : 0x0),
+			(coex_sta->bt_ble_scan_type & 0x2 ?
+			coex_sta->bt_ble_scan_para[1] : 0x0),
+			(coex_sta->bt_ble_scan_type & 0x4 ?
+			coex_sta->bt_ble_scan_para[2] : 0x0));
+		CL_PRINTF(cli_buf);
+	}
+
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d",
 		   "ReInit/ReLink/IgnWlact/Page/NameReq",
 		   coex_sta->cnt_ReInit,
@@ -4380,10 +5015,28 @@ void ex_halbtc8822b2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
 			   "\r\n %-35s = 0x%x/ 0x%x/ %04x",
 			   "0xae[4]/0xac[1:0]/Scoreboard",
-			   ((coex_sta->bt_reg_vendor_ae & BIT(4)) >> 4),
+			   (int)((coex_sta->bt_reg_vendor_ae & BIT(4)) >> 4),
 			   coex_sta->bt_reg_vendor_ac & 0x3, u16tmp[0]);
 	CL_PRINTF(cli_buf);
 
+	if (coex_sta->num_of_profile > 0) {
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+			"\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
+			"AFH MAP",
+			coex_sta->bt_afh_map[0],
+			coex_sta->bt_afh_map[1],
+			coex_sta->bt_afh_map[2],
+			coex_sta->bt_afh_map[3],
+			coex_sta->bt_afh_map[4],
+			coex_sta->bt_afh_map[5],
+			coex_sta->bt_afh_map[6],
+			coex_sta->bt_afh_map[7],
+			coex_sta->bt_afh_map[8],
+			coex_sta->bt_afh_map[9]
+			   );
+		CL_PRINTF(cli_buf);
+	}
+
 	for (i = 0; i < BT_INFO_SRC_8822B_2ANT_MAX; i++) {
 		if (coex_sta->bt_info_c2h_cnt[i]) {
 			CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
@@ -4441,11 +5094,12 @@ void ex_halbtc8822b2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		   u8tmp[0], u32tmp[0]);
 	CL_PRINTF(cli_buf);
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s",
-		   "AntDiv/ForceLPS/LPRA",
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s/ %d",
+		   "AntDiv/BtCtrlLPS/LPRA/PsFail",
 		   ((board_info->ant_div_cfg) ? "On" : "Off"),
-		   ((coex_sta->force_lps_on) ? "On" : "Off"),
-		   ((coex_dm->cur_low_penalty_ra) ? "On" : "Off"));
+		   ((coex_sta->force_lps_ctrl) ? "On" : "Off"),
+		   ((coex_dm->cur_low_penalty_ra) ? "On" : "Off"),
+		   coex_sta->cnt_set_ps_state_fail);
 	CL_PRINTF(cli_buf);
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
@@ -4454,7 +5108,7 @@ void ex_halbtc8822b2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_PRINTF(cli_buf);
 
 	u32tmp[0] = halbtc8822b2ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
-	lte_coex_on = ((u32tmp[0] & BIT(7)) >> 7) ?  true : false;
+	lte_coex_on = ((u32tmp[0] & BIT(7)) >> 7) ?  TRUE : FALSE;
 
 	if (lte_coex_on) {
 
@@ -4489,28 +5143,20 @@ void ex_halbtc8822b2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
 		   "============[Hw setting]============");
 	CL_PRINTF(cli_buf);
-	/*
-		u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
-		u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
-		u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
-		u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
-			   "0x430/0x434/0x42a/0x456",
-			   u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
-		CL_PRINTF(cli_buf);
-	*/
+
 	u32tmp[0] = halbtc8822b2ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
 	u32tmp[1] = halbtc8822b2ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
 	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x73);
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s",
 		   "LTE Coex/Path Owner",
-		   ((lte_coex_on) ? "On" : "Off") ,
+		   ((lte_coex_on) ? "On" : "Off"),
 		   ((u8tmp[0] & BIT(2)) ? "WL" : "BT"));
 	CL_PRINTF(cli_buf);
 
 	if (lte_coex_on) {
-		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
+		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
+			   "\r\n %-35s = %d/ %d/ %d/ %d",
 			   "LTE 3Wire/OPMode/UART/UARTMode",
 			   (int)((u32tmp[0] & BIT(6)) >> 6),
 			   (int)((u32tmp[0] & (BIT(5) | BIT(4))) >> 4),
@@ -4520,17 +5166,19 @@ void ex_halbtc8822b2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 
 		CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
 			   "LTE_Busy/UART_Busy",
-			(int)((u32tmp[1] & BIT(1)) >> 1), (int)(u32tmp[1] & BIT(0)));
+			   (int)((u32tmp[1] & BIT(1)) >> 1),
+			   (int)(u32tmp[1] & BIT(0)));
 		CL_PRINTF(cli_buf);
 	}
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n %-35s = %s (BB:%s)/ %s (BB:%s)/ %s",
+		   "\r\n %-35s = %s (BB:%s)/ %s (BB:%s)/ %s %d",
 		   "GNT_WL_Ctrl/GNT_BT_Ctrl/Dbg",
 		   ((u32tmp[0] & BIT(12)) ? "SW" : "HW"),
 		   ((u32tmp[0] & BIT(8)) ?  "SW" : "HW"),
 		   ((u32tmp[0] & BIT(14)) ? "SW" : "HW"),
 		   ((u32tmp[0] & BIT(10)) ?  "SW" : "HW"),
-		   ((u8tmp[0] & BIT(3)) ? "On" : "Off"));
+		   ((u8tmp[0] & BIT(3)) ? "On" : "Off"),
+		   coex_sta->gnt_error_cnt);
 	CL_PRINTF(cli_buf);
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
@@ -4539,24 +5187,27 @@ void ex_halbtc8822b2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 		   (int)((u32tmp[1] & BIT(3)) >> 3));
 	CL_PRINTF(cli_buf);
 
-	u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xcb0);
+
+	u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xcbc);
 	u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xcb4);
-	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xcbd);
+	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xcba);
 
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n %-35s = 0x%04x/ 0x%04x/ 0x%x",
-		   "0xcb0/0xcb4/0xcbd",
-		   u32tmp[0], u32tmp[1], u8tmp[0]);
+		   "\r\n %-35s = 0x%04x/ 0x%04x/ 0x%02x %s",
+		   "0xcbc/0xcb4/0xcb8[23:16]",
+		   u32tmp[0], u32tmp[1], u8tmp[0],
+		   ((u8tmp[0] & 0x1) == 0x1 ?  "(BTG)" :   "(WL_A+G)"));
 	CL_PRINTF(cli_buf);
 
 	u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x4c);
 	u8tmp[2] = btcoexist->btc_read_1byte(btcoexist, 0x64);
 	u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x4c6);
 	u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x40);
+
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
 		   "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
-		   "0x4c[24:23]/0x64[0]/x4c6[4]/0x40[5]",
-		   (u32tmp[0] & (BIT(24) | BIT(23))) >> 23 , u8tmp[2] & 0x1 ,
+		   "4c[24:23]/64[0]/4c6[4]/40[5]",
+		   (int)(u32tmp[0] & (BIT(24) | BIT(23))) >> 23, u8tmp[2] & 0x1,
 		   (int)((u8tmp[0] & BIT(4)) >> 4),
 		   (int)((u8tmp[1] & BIT(5)) >> 5));
 	CL_PRINTF(cli_buf);
@@ -4581,32 +5232,49 @@ void ex_halbtc8822b2ant_display_coex_info(IN struct btc_coexist *btcoexist)
 	cca_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
 			PHYDM_INFO_CCA_CCK);
 
+	ratio_ofdm = (fa_ofdm == 0) ? 1000 : (cca_ofdm/fa_ofdm);
+
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
-		   "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
+		   "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x  (%d)",
 		   "CCK-CCA/CCK-FA/OFDM-CCA/OFDM-FA",
-		   cca_cck, fa_cck, cca_ofdm, fa_ofdm);
+		   cca_cck, fa_cck, cca_ofdm, fa_ofdm,
+		   ratio_ofdm);
 	CL_PRINTF(cli_buf);
 
 #if 1
+
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
 		   "CRC_OK CCK/11g/11n/11ac",
 		   coex_sta->crc_ok_cck, coex_sta->crc_ok_11g,
 		   coex_sta->crc_ok_11n, coex_sta->crc_ok_11n_vht);
 	CL_PRINTF(cli_buf);
 
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d  (%d, %d)",
 		   "CRC_Err CCK/11g/11n/11ac",
 		   coex_sta->crc_err_cck, coex_sta->crc_err_11g,
-		   coex_sta->crc_err_11n, coex_sta->crc_err_11n_vht);
+		   coex_sta->crc_err_11n, coex_sta->crc_err_11n_vht,
+		   coex_sta->now_crc_ratio, coex_sta->acc_crc_ratio);
 	CL_PRINTF(cli_buf);
 #endif
+
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s/ %d",
+		   "WlHiPri/ Locking/ Locked/ Noisy",
+		   (coex_sta->wifi_is_high_pri_task ? "Yes" : "No"),
+		   (coex_sta->cck_lock ? "Yes" : "No"),
+		   (coex_sta->cck_ever_lock ? "Yes" : "No"),
+		   coex_sta->wl_noisy_level);
+	CL_PRINTF(cli_buf);
+
 	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
 		   "0x770(Hi-pri rx/tx)",
 		   coex_sta->high_priority_rx, coex_sta->high_priority_tx);
 	CL_PRINTF(cli_buf);
-	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
+
+	CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s",
 		   "0x774(Lo-pri rx/tx)",
-		   coex_sta->low_priority_rx, coex_sta->low_priority_tx);
+		   coex_sta->low_priority_rx, coex_sta->low_priority_tx,
+		   (bt_link_info->slave_role ? "(Slave!!)" : (
+		   coex_sta->is_tdma_btautoslot_hang ? "(auto-slot hang!!)" : "")));
 	CL_PRINTF(cli_buf);
 
 	btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
@@ -4622,14 +5290,14 @@ void ex_halbtc8822b2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], IPS ENTER notify\n");
 		BTC_TRACE(trace_buf);
-		coex_sta->under_ips = true;
-		coex_sta->under_lps = false;
+		coex_sta->under_ips = TRUE;
+		coex_sta->under_lps = FALSE;
 
 		halbtc8822b2ant_post_state_to_bt(btcoexist,
-				 BT_8822B_2ANT_SCOREBOARD_ACTIVE, false);
+				 BT_8822B_2ANT_SCOREBOARD_ACTIVE, FALSE);
 
 		halbtc8822b2ant_post_state_to_bt(btcoexist,
-				 BT_8822B_2ANT_SCOREBOARD_ONOFF, false);
+				 BT_8822B_2ANT_SCOREBOARD_ONOFF, FALSE);
 
 		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
 					     FORCE_EXEC,
@@ -4640,20 +5308,24 @@ void ex_halbtc8822b2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], IPS LEAVE notify\n");
 		BTC_TRACE(trace_buf);
-		coex_sta->under_ips = false;
+		coex_sta->under_ips = FALSE;
 
 		halbtc8822b2ant_post_state_to_bt(btcoexist,
-					 BT_8822B_2ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8822B_2ANT_SCOREBOARD_ACTIVE, TRUE);
 		halbtc8822b2ant_post_state_to_bt(btcoexist,
-				 BT_8822B_2ANT_SCOREBOARD_ONOFF, true);
-		halbtc8822b2ant_init_hw_config(btcoexist, false);
+				 BT_8822B_2ANT_SCOREBOARD_ONOFF, TRUE);
+		halbtc8822b2ant_init_hw_config(btcoexist, FALSE);
 		halbtc8822b2ant_init_coex_dm(btcoexist);
 		halbtc8822b2ant_query_bt_info(btcoexist);
 	}
 }
 
+
+
 void ex_halbtc8822b2ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type)
 {
+	static boolean  pre_force_lps_on = FALSE;
+
 	if (btcoexist->manual_control || btcoexist->stop_coex_dm)
 		return;
 
@@ -4661,37 +5333,44 @@ void ex_halbtc8822b2ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type)
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], LPS ENABLE notify\n");
 		BTC_TRACE(trace_buf);
-		coex_sta->under_lps = true;
-		coex_sta->under_ips = false;
+		coex_sta->under_lps = TRUE;
+		coex_sta->under_ips = FALSE;
 
-		if (coex_sta->force_lps_on == true) { /* LPS No-32K */
+		if (coex_sta->force_lps_ctrl) { /* LPS No-32K */
 			/* Write WL "Active" in Score-board for PS-TDMA */
+			pre_force_lps_on = TRUE;
 			halbtc8822b2ant_post_state_to_bt(btcoexist,
-					 BT_8822B_2ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8822B_2ANT_SCOREBOARD_ACTIVE, TRUE);
 
-		} else { /* LPS-32K, need check if this h2c 0x71 can work?? (2015/08/28) */
+		} else {
+			/* LPS-32K, need check if this h2c 0x71 can work??
+			 * (2015/08/28)
+			 */
 			/* Write WL "Non-Active" in Score-board for Native-PS */
+			pre_force_lps_on = FALSE;
 			halbtc8822b2ant_post_state_to_bt(btcoexist,
-				 BT_8822B_2ANT_SCOREBOARD_ACTIVE, false);
+				 BT_8822B_2ANT_SCOREBOARD_ACTIVE, FALSE);
 		}
 
-
 	} else if (BTC_LPS_DISABLE == type) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], LPS DISABLE notify\n");
 		BTC_TRACE(trace_buf);
-		coex_sta->under_lps = false;
+		coex_sta->under_lps = FALSE;
 
 		halbtc8822b2ant_post_state_to_bt(btcoexist,
-					 BT_8822B_2ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8822B_2ANT_SCOREBOARD_ACTIVE, TRUE);
+
+		if ((!pre_force_lps_on) && (!coex_sta->force_lps_ctrl))
+			halbtc8822b2ant_query_bt_info(btcoexist);
 	}
 }
 
 void ex_halbtc8822b2ant_scan_notify(IN struct btc_coexist *btcoexist,
 				    IN u8 type)
 {
-	boolean	wifi_connected = false;
-	boolean wifi_under_5g = false;
+	boolean	wifi_connected = FALSE;
+	boolean wifi_under_5g = FALSE;
 
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
@@ -4699,7 +5378,7 @@ void ex_halbtc8822b2ant_scan_notify(IN struct btc_coexist *btcoexist,
 	BTC_TRACE(trace_buf);
 
 	halbtc8822b2ant_post_state_to_bt(btcoexist,
-					 BT_8822B_2ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8822B_2ANT_SCOREBOARD_ACTIVE, TRUE);
 
 	if (btcoexist->manual_control ||
 	    btcoexist->stop_coex_dm)
@@ -4708,7 +5387,7 @@ void ex_halbtc8822b2ant_scan_notify(IN struct btc_coexist *btcoexist,
 	btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
 			   &wifi_connected);
 
-	/*  this can't be removed for RF off_on event, or BT would dis-connect */
+	/* this can't be removed for RF off_on event, or BT would dis-connect */
 	halbtc8822b2ant_query_bt_info(btcoexist);
 
 	if (BTC_SCAN_START == type) {
@@ -4725,7 +5404,7 @@ void ex_halbtc8822b2ant_scan_notify(IN struct btc_coexist *btcoexist,
 			return;
 		}
 
-		coex_sta->wifi_is_high_pri_task = true;
+		coex_sta->wifi_is_high_pri_task = TRUE;
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], ********** SCAN START notify (2g)\n");
@@ -4741,16 +5420,16 @@ void ex_halbtc8822b2ant_scan_notify(IN struct btc_coexist *btcoexist,
 	if (BTC_SCAN_START_2G == type) {
 
 		if (!wifi_connected)
-			coex_sta->wifi_is_high_pri_task = true;
+			coex_sta->wifi_is_high_pri_task = TRUE;
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], SCAN START notify (2G)\n");
 		BTC_TRACE(trace_buf);
 
 		halbtc8822b2ant_post_state_to_bt(btcoexist,
-					 BT_8822B_2ANT_SCOREBOARD_SCAN, true);
+					 BT_8822B_2ANT_SCOREBOARD_SCAN, TRUE);
 		halbtc8822b2ant_post_state_to_bt(btcoexist,
-					 BT_8822B_2ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8822B_2ANT_SCOREBOARD_ACTIVE, TRUE);
 
 		halbtc8822b2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
 					     FORCE_EXEC,
@@ -4760,7 +5439,7 @@ void ex_halbtc8822b2ant_scan_notify(IN struct btc_coexist *btcoexist,
 
 	} else if (BTC_SCAN_FINISH == type) {
 
-		coex_sta->wifi_is_high_pri_task = false;
+		coex_sta->wifi_is_high_pri_task = FALSE;
 
 		btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
 				   &coex_sta->scan_ap_num);
@@ -4771,7 +5450,7 @@ void ex_halbtc8822b2ant_scan_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 
 		halbtc8822b2ant_post_state_to_bt(btcoexist,
-					 BT_8822B_2ANT_SCOREBOARD_SCAN, false);
+					 BT_8822B_2ANT_SCOREBOARD_SCAN, FALSE);
 
 		halbtc8822b2ant_run_coexist_mechanism(btcoexist);
 	}
@@ -4781,17 +5460,10 @@ void ex_halbtc8822b2ant_scan_notify(IN struct btc_coexist *btcoexist,
 void ex_halbtc8822b2ant_switchband_notify(IN struct btc_coexist *btcoexist,
 		IN u8 type)
 {
-
-	boolean wifi_connected = false, bt_hs_on = false;
-	u32	wifi_link_status = 0;
-	u32	num_of_wifi_link = 0;
-	boolean	bt_ctrl_agg_buf_size = false;
-	u8	agg_buf_size = 5;
-
-
 	if (btcoexist->manual_control ||
 	    btcoexist->stop_coex_dm)
 		return;
+	coex_sta->switch_band_notify_to = type;
 
 	if (type == BTC_SWITCH_TO_5G) {
 
@@ -4817,6 +5489,7 @@ void ex_halbtc8822b2ant_switchband_notify(IN struct btc_coexist *btcoexist,
 		ex_halbtc8822b2ant_scan_notify(btcoexist,
 					       BTC_SCAN_START_2G);
 	}
+	coex_sta->switch_band_notify_to = BTC_NOT_SWITCH;
 }
 
 
@@ -4825,7 +5498,7 @@ void ex_halbtc8822b2ant_connect_notify(IN struct btc_coexist *btcoexist,
 {
 
 	halbtc8822b2ant_post_state_to_bt(btcoexist,
-					 BT_8822B_2ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8822B_2ANT_SCOREBOARD_ACTIVE, TRUE);
 	if (btcoexist->manual_control ||
 	    btcoexist->stop_coex_dm)
 		return;
@@ -4849,7 +5522,7 @@ void ex_halbtc8822b2ant_connect_notify(IN struct btc_coexist *btcoexist,
 
 	if (BTC_ASSOCIATE_START == type) {
 
-		coex_sta->wifi_is_high_pri_task = true;
+		coex_sta->wifi_is_high_pri_task = TRUE;
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], CONNECT START notify (2G)\n");
@@ -4862,15 +5535,16 @@ void ex_halbtc8822b2ant_connect_notify(IN struct btc_coexist *btcoexist,
 		halbtc8822b2ant_action_wifi_link_process(btcoexist);
 
 		/* To keep TDMA case during connect process,
-		to avoid changed by Btinfo and runcoexmechanism */
-		coex_sta->freeze_coexrun_by_btinfo = true;
+		 * to avoid changed by Btinfo and runcoexmechanism
+		 */
+		coex_sta->freeze_coexrun_by_btinfo = TRUE;
 
 		coex_dm->arp_cnt = 0;
 
 	} else if (BTC_ASSOCIATE_FINISH == type) {
 
-		coex_sta->wifi_is_high_pri_task = false;
-		coex_sta->freeze_coexrun_by_btinfo = false;
+		coex_sta->wifi_is_high_pri_task = FALSE;
+		coex_sta->freeze_coexrun_by_btinfo = FALSE;
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], CONNECT FINISH notify	(2G)\n");
@@ -4883,11 +5557,7 @@ void ex_halbtc8822b2ant_connect_notify(IN struct btc_coexist *btcoexist,
 void ex_halbtc8822b2ant_media_status_notify(IN struct btc_coexist *btcoexist,
 		IN u8 type)
 {
-	u8			h2c_parameter[3] = {0};
-	u32			wifi_bw;
-	u8			wifi_central_chnl;
-	u8			ap_num = 0;
-	boolean		wifi_under_b_mode = false, wifi_under_5g = false;
+	boolean		wifi_under_b_mode = FALSE, wifi_under_5g = FALSE;
 
 
 	if (btcoexist->manual_control ||
@@ -4903,7 +5573,7 @@ void ex_halbtc8822b2ant_media_status_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 
 		halbtc8822b2ant_post_state_to_bt(btcoexist,
-					 BT_8822B_2ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8822B_2ANT_SCOREBOARD_ACTIVE, TRUE);
 
 		if (wifi_under_5g) {
 
@@ -4945,7 +5615,7 @@ void ex_halbtc8822b2ant_media_status_notify(IN struct btc_coexist *btcoexist,
 		btcoexist->btc_write_1byte(btcoexist, 0x6cf, 0x0); /* CCK Rx */
 
 		halbtc8822b2ant_post_state_to_bt(btcoexist,
-				 BT_8822B_2ANT_SCOREBOARD_ACTIVE, false);
+				 BT_8822B_2ANT_SCOREBOARD_ACTIVE, FALSE);
 	}
 
 
@@ -4955,7 +5625,7 @@ void ex_halbtc8822b2ant_media_status_notify(IN struct btc_coexist *btcoexist,
 void ex_halbtc8822b2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
 		IN u8 type)
 {
-	boolean under_4way = false, wifi_under_5g = false;
+	boolean under_4way = FALSE, wifi_under_5g = FALSE;
 
 	if (btcoexist->manual_control ||
 	    btcoexist->stop_coex_dm)
@@ -4982,7 +5652,7 @@ void ex_halbtc8822b2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
 			    "[BTCoex], specific Packet ---- under_4way!!\n");
 		BTC_TRACE(trace_buf);
 
-		coex_sta->wifi_is_high_pri_task = true;
+		coex_sta->wifi_is_high_pri_task = TRUE;
 		coex_sta->specific_pkt_period_cnt = 2;
 
 	} else if (BTC_PACKET_ARP == type) {
@@ -5000,7 +5670,7 @@ void ex_halbtc8822b2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
 			    type);
 		BTC_TRACE(trace_buf);
 
-		coex_sta->wifi_is_high_pri_task = true;
+		coex_sta->wifi_is_high_pri_task = TRUE;
 		coex_sta->specific_pkt_period_cnt = 2;
 	}
 
@@ -5009,18 +5679,16 @@ void ex_halbtc8822b2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
 
 }
 
+
 void ex_halbtc8822b2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 				       IN u8 *tmp_buf, IN u8 length)
 {
 	u8			i, rsp_source = 0;
-	boolean			wifi_connected = false;
+	boolean			wifi_connected = FALSE;
+	boolean	wifi_scan = FALSE, wifi_link = FALSE, wifi_roam = FALSE,
+			wifi_busy = FALSE;
+	static boolean is_scoreboard_scan = FALSE;
 
-	if (psd_scan->is_AntDet_running == true) {
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], bt_info_notify return for AntDet is running\n");
-		BTC_TRACE(trace_buf);
-		return;
-	}
 
 	rsp_source = tmp_buf[0] & 0xf;
 	if (rsp_source >= BT_INFO_SRC_8822B_2ANT_MAX)
@@ -5053,36 +5721,39 @@ void ex_halbtc8822b2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 	if (BT_INFO_SRC_8822B_2ANT_WIFI_FW != rsp_source) {
 
 		/* if 0xff, it means BT is under WHCK test */
-		coex_sta->bt_whck_test = ((coex_sta->bt_info == 0xff) ? true :
-					  false);
+		coex_sta->bt_whck_test = ((coex_sta->bt_info == 0xff) ? TRUE :
+					  FALSE);
 
 		coex_sta->bt_create_connection = ((
-			coex_sta->bt_info_c2h[rsp_source][2] & 0x80) ? true :
-						  false);
+			coex_sta->bt_info_c2h[rsp_source][2] & 0x80) ? TRUE :
+						  FALSE);
 
 		/* unit: %, value-100 to translate to unit: dBm */
 		coex_sta->bt_rssi = coex_sta->bt_info_c2h[rsp_source][3] * 2 +
 				    10;
 
 		coex_sta->c2h_bt_remote_name_req = ((
-			coex_sta->bt_info_c2h[rsp_source][2] & 0x20) ? true :
-						    false);
+			coex_sta->bt_info_c2h[rsp_source][2] & 0x20) ? TRUE :
+						    FALSE);
 
 		coex_sta->is_A2DP_3M = ((coex_sta->bt_info_c2h[rsp_source][2] &
-					 0x10) ? true : false);
+					 0x10) ? TRUE : FALSE);
 
 		coex_sta->acl_busy = ((coex_sta->bt_info_c2h[rsp_source][1] &
-				       0x9) ? true : false);
+				       0x9) ? TRUE : FALSE);
 
 		coex_sta->voice_over_HOGP = ((coex_sta->bt_info_ext & 0x10) ?
-					     true : false);
+					     TRUE : FALSE);
 
 		coex_sta->c2h_bt_inquiry_page = ((coex_sta->bt_info &
-			  BT_INFO_8822B_2ANT_B_INQ_PAGE) ? true : false);
+			  BT_INFO_8822B_2ANT_B_INQ_PAGE) ? TRUE : FALSE);
 
 		coex_sta->a2dp_bit_pool = (((
 			coex_sta->bt_info_c2h[rsp_source][1] & 0x49) == 0x49) ?
-				   coex_sta->bt_info_c2h[rsp_source][6] : 0);
+				   (coex_sta->bt_info_c2h[rsp_source][6] & 0x7f) : 0);
+
+		coex_sta->is_bt_a2dp_sink = (coex_sta->bt_info_c2h[rsp_source][6] & 0x80) ?
+									TRUE : FALSE;
 
 		coex_sta->bt_retry_cnt = coex_sta->bt_info_c2h[rsp_source][2] &
 					 0xf;
@@ -5106,16 +5777,60 @@ void ex_halbtc8822b2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 
 		if (coex_sta->bt_info_ext & BIT(2)) {
 			coex_sta->cnt_setupLink++;
-			coex_sta->is_setupLink = true;
-		} else
-			coex_sta->is_setupLink = false;
+			coex_sta->is_setupLink = TRUE;
+			coex_sta->bt_relink_downcount = 2;
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], Re-Link start in BT info!!\n");
+			BTC_TRACE(trace_buf);
+		} else {
+			coex_sta->is_setupLink = FALSE;
+			coex_sta->bt_relink_downcount = 0;
+			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+				    "[BTCoex], Re-Link stop in BT info!!\n");
+			BTC_TRACE(trace_buf);
+		}
+
 
 		if (coex_sta->bt_info_ext & BIT(3))
 			coex_sta->cnt_IgnWlanAct++;
 
-		if (coex_sta->bt_create_connection)
+		if (coex_sta->bt_info_ext & BIT(6))
+			coex_sta->cnt_RoleSwitch++;
+
+		if (coex_sta->bt_info_ext & BIT(7))
+			coex_sta->is_bt_multi_link = TRUE;
+		else
+			coex_sta->is_bt_multi_link = FALSE;
+
+		if (coex_sta->bt_create_connection) {
 			coex_sta->cnt_Page++;
 
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY,
+					   &wifi_busy);
+
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link);
+			btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam);
+
+			if ((wifi_link) || (wifi_roam) || (wifi_scan) ||
+			    (coex_sta->wifi_is_high_pri_task) || (wifi_busy)) {
+
+				is_scoreboard_scan = TRUE;
+				halbtc8822b2ant_post_state_to_bt(btcoexist,
+					 BT_8822B_2ANT_SCOREBOARD_SCAN, TRUE);
+
+			} else
+				halbtc8822b2ant_post_state_to_bt(btcoexist,
+					 BT_8822B_2ANT_SCOREBOARD_SCAN, FALSE);
+
+		} else {
+				if (is_scoreboard_scan) {
+					halbtc8822b2ant_post_state_to_bt(btcoexist,
+						 BT_8822B_2ANT_SCOREBOARD_SCAN, FALSE);
+					is_scoreboard_scan = FALSE;
+				}
+		}
+
 		/* Here we need to resend some wifi info to BT */
 		/* because bt is reset and loss of the info. */
 
@@ -5142,40 +5857,56 @@ void ex_halbtc8822b2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
 
 			/*  If Ignore_WLanAct && not SetUp_Link */
 			if ((coex_sta->bt_info_ext & BIT(3)) &&
-			    (!(coex_sta->bt_info_ext & BIT(2)))) {
+				(!(coex_sta->bt_info_ext & BIT(2))) &&
+				(!(coex_sta->bt_info_ext & BIT(6)))) {
 
 				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 					"[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n");
 				BTC_TRACE(trace_buf);
 				halbtc8822b2ant_ignore_wlan_act(btcoexist,
-							FORCE_EXEC, false);
+							FORCE_EXEC, FALSE);
+			} else {
+				if (coex_sta->bt_info_ext & BIT(2)) {
+					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					"[BTCoex], BT ignore Wlan active because Re-link!!\n");
+					BTC_TRACE(trace_buf);
+				} else if (coex_sta->bt_info_ext & BIT(6)) {
+					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
+					"[BTCoex], BT ignore Wlan active because Role-Switch!!\n");
+					BTC_TRACE(trace_buf);
+				}
 			}
 		}
 
 	}
 
-
-	halbtc8822b2ant_update_bt_link_info(btcoexist);
-
-	if (btcoexist->manual_control) {
-		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], BtInfoNotify(), No run_coexist_mechanism for Manual CTRL\n");
-		BTC_TRACE(trace_buf);
-		return;
-	}
-
-	if (btcoexist->stop_coex_dm) {
+	if ((coex_sta->bt_info_ext & BIT(5))) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-			"[BTCoex], BtInfoNotify(),  No run_coexist_mechanism for Stop Coex DM\n");
+			"[BTCoex], BT ext info bit4 check, query BLE Scan type!!\n");
 		BTC_TRACE(trace_buf);
-		return;
+		coex_sta->bt_ble_scan_type = btcoexist->btc_get_ble_scan_type_from_bt(
+						     btcoexist);
+
+		if ((coex_sta->bt_ble_scan_type & 0x1) == 0x1)
+			coex_sta->bt_ble_scan_para[0]  =
+				btcoexist->btc_get_ble_scan_para_from_bt(btcoexist,
+						0x1);
+		if ((coex_sta->bt_ble_scan_type & 0x2) == 0x2)
+			coex_sta->bt_ble_scan_para[1]  =
+				btcoexist->btc_get_ble_scan_para_from_bt(btcoexist,
+						0x2);
+		if ((coex_sta->bt_ble_scan_type & 0x4) == 0x4)
+			coex_sta->bt_ble_scan_para[2]  =
+				btcoexist->btc_get_ble_scan_para_from_bt(btcoexist,
+						0x4);
 	}
 
-	coex_sta->c2h_bt_info_req_sent = false;
+	halbtc8822b2ant_update_bt_link_info(btcoexist);
 
 	halbtc8822b2ant_run_coexist_mechanism(btcoexist);
 }
 
+
 void ex_halbtc8822b2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 		IN u8 type)
 {
@@ -5187,13 +5918,14 @@ void ex_halbtc8822b2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 			    "[BTCoex], RF is turned ON!!\n");
 		BTC_TRACE(trace_buf);
 
-		coex_sta->wl_rf_off_on_event = true;
-		btcoexist->stop_coex_dm = false;
-
+		btcoexist->stop_coex_dm = FALSE;
+		coex_sta->is_rf_state_off = FALSE;
+#if 0
 		halbtc8822b2ant_post_state_to_bt(btcoexist,
-					 BT_8822B_2ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8822B_2ANT_SCOREBOARD_ACTIVE, TRUE);
 		halbtc8822b2ant_post_state_to_bt(btcoexist,
-					 BT_8822B_2ANT_SCOREBOARD_ONOFF, true);
+					 BT_8822B_2ANT_SCOREBOARD_ONOFF, TRUE);
+#endif
 	} else if (BTC_RF_OFF == type) {
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			    "[BTCoex], RF is turned OFF!!\n");
@@ -5206,12 +5938,14 @@ void ex_halbtc8822b2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
 		halbtc8822b2ant_action_coex_all_off(btcoexist);
 
 		halbtc8822b2ant_post_state_to_bt(btcoexist,
-				 BT_8822B_2ANT_SCOREBOARD_ACTIVE, false);
-		halbtc8822b2ant_post_state_to_bt(btcoexist,
-					 BT_8822B_2ANT_SCOREBOARD_ONOFF, false);
-		btcoexist->stop_coex_dm = true;
-		coex_sta->wl_rf_off_on_event = false;
-
+				BT_8822B_2ANT_SCOREBOARD_ACTIVE |
+				BT_8822B_2ANT_SCOREBOARD_ONOFF |
+				BT_8822B_2ANT_SCOREBOARD_SCAN |
+				BT_8822B_2ANT_SCOREBOARD_UNDERTEST,
+				FALSE);
+
+		btcoexist->stop_coex_dm = TRUE;
+		coex_sta->is_rf_state_off = TRUE;
 	}
 }
 
@@ -5226,15 +5960,15 @@ void ex_halbtc8822b2ant_halt_notify(IN struct btc_coexist *btcoexist)
 	ex_halbtc8822b2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
 
 	halbtc8822b2ant_post_state_to_bt(btcoexist,
-				 BT_8822B_2ANT_SCOREBOARD_ACTIVE, false);
+				 BT_8822B_2ANT_SCOREBOARD_ACTIVE, FALSE);
 	halbtc8822b2ant_post_state_to_bt(btcoexist,
-					 BT_8822B_2ANT_SCOREBOARD_ONOFF, false);
+					 BT_8822B_2ANT_SCOREBOARD_ONOFF, FALSE);
 }
 
 void ex_halbtc8822b2ant_pnp_notify(IN struct btc_coexist *btcoexist,
 				   IN u8 pnp_state)
 {
-	boolean wifi_under_5g = false;
+	boolean wifi_under_5g = FALSE;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Pnp notify\n");
 	BTC_TRACE(trace_buf);
@@ -5247,16 +5981,20 @@ void ex_halbtc8822b2ant_pnp_notify(IN struct btc_coexist *btcoexist,
 			    "[BTCoex], Pnp notify to SLEEP\n");
 		BTC_TRACE(trace_buf);
 
-		/* Sinda 20150819, workaround for driver skip leave IPS/LPS to speed up sleep time. */
-		/* Driver do not leave IPS/LPS when driver is going to sleep, so BTCoexistence think wifi is still under IPS/LPS */
-		/* BT should clear UnderIPS/UnderLPS state to avoid mismatch state after wakeup. */
-		coex_sta->under_ips = false;
-		coex_sta->under_lps = false;
+		/* Sinda 20150819, workaround for driver skip leave IPS/LPS to
+		 * speed up sleep time.
+		 * Driver do not leave IPS/LPS when driver is going to sleep,
+		 * so BTCoexistence think wifi is still under IPS/LPS.
+		 * BT should clear UnderIPS/UnderLPS state to avoid mismatch
+		 * state after wakeup.
+		 */
+		coex_sta->under_ips = FALSE;
+		coex_sta->under_lps = FALSE;
 
 		halbtc8822b2ant_post_state_to_bt(btcoexist,
-				 BT_8822B_2ANT_SCOREBOARD_ACTIVE, false);
+				 BT_8822B_2ANT_SCOREBOARD_ACTIVE, FALSE);
 		halbtc8822b2ant_post_state_to_bt(btcoexist,
-					 BT_8822B_2ANT_SCOREBOARD_ONOFF, false);
+					 BT_8822B_2ANT_SCOREBOARD_ONOFF, FALSE);
 
 
 		if (BTC_WIFI_PNP_SLEEP_KEEP_ANT == pnp_state) {
@@ -5281,20 +6019,17 @@ void ex_halbtc8822b2ant_pnp_notify(IN struct btc_coexist *btcoexist,
 		BTC_TRACE(trace_buf);
 
 		halbtc8822b2ant_post_state_to_bt(btcoexist,
-					 BT_8822B_2ANT_SCOREBOARD_ACTIVE, true);
+					 BT_8822B_2ANT_SCOREBOARD_ACTIVE, TRUE);
 		halbtc8822b2ant_post_state_to_bt(btcoexist,
-					 BT_8822B_2ANT_SCOREBOARD_ONOFF, true);
+					 BT_8822B_2ANT_SCOREBOARD_ONOFF, TRUE);
 	}
 }
 
 void ex_halbtc8822b2ant_periodical(IN struct btc_coexist *btcoexist)
 {
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-	boolean wifi_busy = false;
-	u32 bt_patch_ver;
+	boolean wifi_busy = FALSE;
 	u16 bt_scoreboard_val = 0;
-	static u8 cnt = 0;
-	boolean bt_relink_finish = false;
+	boolean bt_relink_finish = FALSE;
 
 	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 		    "[BTCoex], ************* Periodical *************\n");
@@ -5314,25 +6049,28 @@ void ex_halbtc8822b2ant_periodical(IN struct btc_coexist *btcoexist)
 
 	if (wifi_busy) {
 		halbtc8822b2ant_post_state_to_bt(btcoexist,
-				BT_8822B_2ANT_SCOREBOARD_UNDERTEST, true);
+				BT_8822B_2ANT_SCOREBOARD_UNDERTEST, TRUE);
 		/*for bt lps32 clock offset*/
 		if (bt_scoreboard_val & BIT(6))
 			halbtc8822b2ant_query_bt_info(btcoexist);
 	} else {
 		halbtc8822b2ant_post_state_to_bt(btcoexist,
-			BT_8822B_2ANT_SCOREBOARD_UNDERTEST, false);
-		/*
+			BT_8822B_2ANT_SCOREBOARD_UNDERTEST, FALSE);
+#if 0
 		halbtc8822b2ant_post_state_to_bt(btcoexist,
 			BT_8822B_2ANT_SCOREBOARD_WLBUSY,
-				false);  */
+				FALSE);
+#endif
 	}
 #endif
 
 	if (coex_sta->bt_relink_downcount != 0) {
 		coex_sta->bt_relink_downcount--;
 
-		if (coex_sta->bt_relink_downcount == 0)
-			bt_relink_finish = true;
+		if (coex_sta->bt_relink_downcount == 0) {
+			coex_sta->is_setupLink = FALSE;
+			bt_relink_finish = TRUE;
+		}
 	}
 
 	/* for 4-way, DHCP, EAPOL packet */
@@ -5342,7 +6080,7 @@ void ex_halbtc8822b2ant_periodical(IN struct btc_coexist *btcoexist)
 
 		if ((coex_sta->specific_pkt_period_cnt == 0) &&
 		    (coex_sta->wifi_is_high_pri_task))
-			coex_sta->wifi_is_high_pri_task = false;
+			coex_sta->wifi_is_high_pri_task = FALSE;
 
 		BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 			"[BTCoex], ***************** Hi-Pri Task = %s*****************\n",
@@ -5352,192 +6090,23 @@ void ex_halbtc8822b2ant_periodical(IN struct btc_coexist *btcoexist)
 
 	}
 
-	if (!coex_sta->bt_disabled) {
-		if (coex_sta->bt_coex_supported_feature == 0)
-			btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_FEATURE, &coex_sta->bt_coex_supported_feature);
-
-		if ((coex_sta->bt_coex_supported_version == 0) ||
-			(coex_sta->bt_coex_supported_version == 0xffff))
-			btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_VERSION, &coex_sta->bt_coex_supported_version);
-
-		/*coex_sta->bt_ble_scan_type = btcoexist->btc_get_ble_scan_type_from_bt(btcoexist);*/
-		btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
-		btcoexist->bt_info.bt_get_fw_ver = bt_patch_ver;
-
-		if (coex_sta->bt_reg_vendor_ac == 0xffff)
-			coex_sta->bt_reg_vendor_ac = (u16)(
-				     btcoexist->btc_get_bt_reg(btcoexist, 3,
-							     0xac) & 0xffff);
-
-		if (coex_sta->bt_reg_vendor_ae == 0xffff)
-			coex_sta->bt_reg_vendor_ae = (u16)(
-				     btcoexist->btc_get_bt_reg(btcoexist, 3,
-							     0xae) & 0xffff);
-		}
-	if (halbtc8822b2ant_is_wifibt_status_changed(btcoexist))
+	if (halbtc8822b2ant_is_wifibt_status_changed(btcoexist) || (bt_relink_finish)
+		|| (coex_sta->is_set_ps_state_fail))
 		halbtc8822b2ant_run_coexist_mechanism(btcoexist);
 }
 
-
-/*#pragma optimize( "", off )*/
 void ex_halbtc8822b2ant_antenna_detection(IN struct btc_coexist *btcoexist,
 		IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds)
 {
-#if 0
-	static u32 ant_det_count = 0, ant_det_fail_count = 0;
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-	u16		u16tmp;
-	u8			AntDetval = 0;
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "xxxxxxxxxxxxxxxx Ext Call AntennaDetect()!!\n");
-	BTC_TRACE(trace_buf);
-
-#if BT_8822B_2ANT_ANTDET_ENABLE
-
-	BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-		    "xxxxxxxxxxxxxxxx Call AntennaDetect()!!\n");
-	BTC_TRACE(trace_buf);
-
-	if (seconds == 0) {
-		psd_scan->ant_det_try_count	= 0;
-		psd_scan->ant_det_fail_count	= 0;
-		ant_det_count = 0;
-		ant_det_fail_count = 0;
-		board_info->btdm_ant_det_finish = false;
-		board_info->btdm_ant_num_by_ant_det = 1;
-		return;
-	}
-
-	if (!board_info->btdm_ant_det_finish) {
-		psd_scan->ant_det_inteval_count =
-			psd_scan->ant_det_inteval_count + 2;
-
-		if (psd_scan->ant_det_inteval_count >=
-		    BT_8822B_2ANT_ANTDET_RETRY_INTERVAL) {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is up, Try Detect!!\n");
-			BTC_TRACE(trace_buf);
-
-			psd_scan->is_AntDet_running = true;
-
-			halbtc8822b2ant_read_score_board(btcoexist,	&u16tmp);
-
-			if (u16tmp & BIT(
-				2)) { /* Antenna detection is already done before last WL power on   */
-				board_info->btdm_ant_det_finish = true;
-				psd_scan->ant_det_try_count = 1;
-				psd_scan->ant_det_fail_count = 0;
-				board_info->btdm_ant_num_by_ant_det = (u16tmp &
-							       BIT(3)) ? 1 : 2;
-				psd_scan->ant_det_result = 12;
-
-				psd_scan->ant_det_psd_scan_peak_val =
-					btcoexist->btc_get_ant_det_val_from_bt(
-						btcoexist) * 100;
-
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Result from BT (%d-Ant)\n",
-					board_info->btdm_ant_num_by_ant_det);
-				BTC_TRACE(trace_buf);
-			} else
-				board_info->btdm_ant_det_finish =
-					halbtc8822b2ant_psd_antenna_detection_check(
-						btcoexist);
-
-			btcoexist->bdontenterLPS = false;
-
-			if (board_info->btdm_ant_det_finish) {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Success!!\n");
-				BTC_TRACE(trace_buf);
-
-				/*for 8822b, btc_set_bt_trx_mask is just used to
-				notify BT stop le tx and Ant Det Result , not set BT RF TRx Mask  */
-				if (psd_scan->ant_det_result != 12) {
-
-					AntDetval = (u8)((
-						psd_scan->ant_det_psd_scan_peak_val
-								 / 100) & 0x7f);
-
-					AntDetval =
-						(board_info->btdm_ant_num_by_ant_det
-						 == 1) ? (AntDetval | 0x80) :
-						AntDetval;
-
-					BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-						"xxxxxx AntennaDetect(), Ant Count = %d, PSD Val = %d\n",
-						    ((AntDetval &
-						      0x80) ? 1
-						     : 2), AntDetval
-						    & 0x7f);
-					BTC_TRACE(trace_buf);
-
-					if (btcoexist->btc_set_bt_trx_mask(
-						    btcoexist, AntDetval))
-						BTC_SPRINTF(trace_buf,
-							    BT_TMP_BUF_SIZE,
-							"xxxxxx AntennaDetect(), Notify BT stop le tx by set_bt_trx_mask ok!\n");
-					else
-						BTC_SPRINTF(trace_buf,
-							    BT_TMP_BUF_SIZE,
-							"xxxxxx AntennaDetect(), Notify BT stop le tx by set_bt_trx_mask fail!\n");
-
-					BTC_TRACE(trace_buf);
-				}
-
-			} else {
-				BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-					"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Fail!!\n");
-				BTC_TRACE(trace_buf);
-			}
-
-			psd_scan->ant_det_inteval_count = 0;
-			psd_scan->is_AntDet_running = false;
-
-			/* stimulate coex running */
-			halbtc8822b2ant_run_coexist_mechanism(
-				btcoexist);
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Stimulate Coex running\n!!");
-			BTC_TRACE(trace_buf);
-		} else {
-			BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
-				"xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is not up! (%d)\n",
-				    psd_scan->ant_det_inteval_count);
-			BTC_TRACE(trace_buf);
-
-			if (psd_scan->ant_det_inteval_count == 8)
-				btcoexist->bdontenterLPS = true;
-			else
-				btcoexist->bdontenterLPS = false;
-		}
-
-	}
-#endif
-#endif
 
 }
 
 
 void ex_halbtc8822b2ant_display_ant_detection(IN struct btc_coexist *btcoexist)
 {
-#if 0
-#if BT_8822B_2ANT_ANTDET_ENABLE
-	struct  btc_board_info	*board_info = &btcoexist->board_info;
-
-	if (psd_scan->ant_det_try_count != 0)	{
-		halbtc8822b2ant_psd_show_antenna_detect_result(btcoexist);
-
-		if (board_info->btdm_ant_det_finish)
-			halbtc8822b2ant_psd_showdata(btcoexist);
-	}
-#endif
-#endif
 }
 
 
 #endif
 
 #endif	/*  #if (RTL8822B_SUPPORT == 1) */
-
diff --git a/rtl8822BU/hal/btc/halbtc8822b2ant.h b/rtl8822BU/hal/btc/halbtc8822b2ant.h
index 8757334..5338473 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8822b2ant.h
+++ b/rtl8822BU/hal/btc/halbtc8822b2ant.h
@@ -6,7 +6,7 @@
 /* *******************************************
  * The following is for 8822B 2Ant BT Co-exist definition
  * ******************************************* */
-#define	BT_8822B_2ANT_COEX_DBG					1
+#define	BT_8822B_2ANT_COEX_DBG					0
 #define	BT_AUTO_REPORT_ONLY_8822B_2ANT			1
 
 
@@ -24,10 +24,22 @@
 #define		BTC_RSSI_COEX_THRESH_TOL_8822B_2ANT		2
 
 
-#define	BT_8822B_2ANT_WIFI_RSSI_COEXSWITCH_THRES1				80  /* unit: % WiFi RSSI Threshold for   2-Ant free-run/2-Ant TDMA translation, default = 42 */
-#define	BT_8822B_2ANT_BT_RSSI_COEXSWITCH_THRES1				80 /*  unit: % BT RSSI Threshold for      2-Ant free-run/2-Ant TDMA translation, default = 46 */
-#define	BT_8822B_2ANT_WIFI_RSSI_COEXSWITCH_THRES2				40 /* unit: % WiFi RSSI Threshold for   1-Ant TDMA/1-Ant PS-TDMA translation, default = 42 */
-#define	BT_8822B_2ANT_BT_RSSI_COEXSWITCH_THRES2				35 /*  unit: % BT RSSI Threshold for      1-Ant TDMA/1-Ant PS-TDMA translation, default = 46 */
+/* unit: % WiFi RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation.
+ * (default = 42)
+ */
+#define	BT_8822B_2ANT_WIFI_RSSI_COEXSWITCH_THRES1				10
+/* unit: % BT RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation.
+ * (default = 46)
+ */
+#define	BT_8822B_2ANT_BT_RSSI_COEXSWITCH_THRES1				10
+/* unit: % WiFi RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation.
+ * (default = 42)
+ */
+#define	BT_8822B_2ANT_WIFI_RSSI_COEXSWITCH_THRES2				10
+/* unit: % BT RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation.
+ * (default = 46)
+ */
+#define	BT_8822B_2ANT_BT_RSSI_COEXSWITCH_THRES2				10
 #define	BT_8822B_2ANT_DEFAULT_ISOLATION						15	 /*  unit: dB */
 #define   BT_8822B_2ANT_WIFI_MAX_TX_POWER						15	 /*  unit: dBm */
 #define   BT_8822B_2ANT_BT_MAX_TX_POWER							3	 /*  unit: dBm */
@@ -122,6 +134,7 @@ enum bt_8822b_2ant_coex_algo {
 	BT_8822B_2ANT_COEX_ALGO_HID_A2DP_PANEDR	= 0x9,
 	BT_8822B_2ANT_COEX_ALGO_HID_A2DP			= 0xa,
 	BT_8822B_2ANT_COEX_ALGO_NOPROFILEBUSY		= 0xb,
+	BT_8822B_2ANT_COEX_ALGO_A2DPSINK			= 0xc,
 	BT_8822B_2ANT_COEX_ALGO_MAX
 };
 
@@ -222,7 +235,7 @@ struct coex_dm_8822b_2ant {
 	u32		cur_dac_swing_lvl;
 	boolean		pre_adc_back_off;
 	boolean		cur_adc_back_off;
-	boolean	pre_agc_table_en;
+	boolean		pre_agc_table_en;
 	boolean		cur_agc_table_en;
 	u32		pre_val0x6c0;
 	u32		cur_val0x6c0;
@@ -262,6 +275,7 @@ struct coex_dm_8822b_2ant {
 	u8		cur_int_block_status;
 };
 
+
 struct coex_sta_8822b_2ant {
 	boolean					bt_disabled;
 	boolean					bt_link_exist;
@@ -276,40 +290,41 @@ struct coex_sta_8822b_2ant {
 	u32					high_priority_rx;
 	u32					low_priority_tx;
 	u32					low_priority_rx;
+	boolean             is_hiPri_rx_overhead;
 	u8					bt_rssi;
-	boolean					bt_tx_rx_mask;
 	u8					pre_bt_rssi_state;
 	u8					pre_wifi_rssi_state[4];
-	boolean					c2h_bt_info_req_sent;
 	u8					bt_info_c2h[BT_INFO_SRC_8822B_2ANT_MAX][10];
 	u32					bt_info_c2h_cnt[BT_INFO_SRC_8822B_2ANT_MAX];
 	boolean				bt_whck_test;
 	boolean					c2h_bt_inquiry_page;
 	boolean					c2h_bt_remote_name_req;
-	u8					bt_retry_cnt;
+
 	u8					bt_info_ext;
 	u8					bt_info_ext2;
 	u32					pop_event_cnt;
 	u8					scan_ap_num;
+	u8					bt_retry_cnt;
 
 	u32					crc_ok_cck;
 	u32					crc_ok_11g;
 	u32					crc_ok_11n;
-	u32					crc_ok_11n_agg;
 	u32					crc_ok_11n_vht;
 
 	u32					crc_err_cck;
 	u32					crc_err_11g;
 	u32					crc_err_11n;
-	u32					crc_err_11n_agg;
 	u32					crc_err_11n_vht;
 
+	u32					acc_crc_ratio;
+	u32					now_crc_ratio;
+
 	boolean					cck_lock;
 	boolean					pre_ccklock;
 	boolean					cck_ever_lock;
 
 	u8					coex_table_type;
-	boolean					force_lps_on;
+	boolean					force_lps_ctrl;
 
 	u8					dis_ver_info_cnt;
 
@@ -327,7 +342,6 @@ struct coex_sta_8822b_2ant {
 
 	u8					num_of_profile;
 	boolean				acl_busy;
-	boolean				wl_rf_off_on_event;
 	boolean				bt_create_connection;
 	boolean				wifi_is_high_pri_task;
 	u32					specific_pkt_period_cnt;
@@ -335,7 +349,7 @@ struct coex_sta_8822b_2ant {
 	u32					bt_coex_supported_version;
 
 	u8					bt_ble_scan_type;
-	u8					bt_ble_scan_para[3];
+	u32					bt_ble_scan_para[3];
 
 	boolean				run_time_state;
 	boolean				freeze_coexrun_by_btinfo;
@@ -353,6 +367,7 @@ struct coex_sta_8822b_2ant {
 	u32					cnt_ReInit;
 	u32					cnt_IgnWlanAct;
 	u32					cnt_Page;
+	u32					cnt_RoleSwitch;
 
 	u16					bt_reg_vendor_ac;
 	u16					bt_reg_vendor_ae;
@@ -363,6 +378,19 @@ struct coex_sta_8822b_2ant {
 
 	u8					bt_afh_map[10];
 	u8					bt_relink_downcount;
+	boolean				is_tdma_btautoslot;
+	boolean				is_tdma_btautoslot_hang;
+
+	boolean             is_eSCO_mode;
+	u8                  switch_band_notify_to;
+	boolean				is_rf_state_off;
+
+	boolean				is_hid_low_pri_tx_overhead;
+	boolean				is_bt_multi_link;
+	boolean				is_bt_a2dp_sink;
+
+	boolean				is_set_ps_state_fail;
+	u8					cnt_set_ps_state_fail;
 };
 
 
@@ -375,13 +403,15 @@ struct rfe_type_8822b_2ant {
 	u8			rfe_module_type;
 	boolean		ext_ant_switch_exist;
 	u8			ext_ant_switch_type;			/* 0:DPDT, 1:SPDT */
-	u8			ext_ant_switch_ctrl_polarity;		/*  iF 0: DPDT_P=0, DPDT_N=1 => BTG to Main, WL_A+G to Aux */
+	/*  iF 0: DPDT_P=0, DPDT_N=1 => BTG to Main, WL_A+G to Aux */
+	u8			ext_ant_switch_ctrl_polarity;
 
 	boolean		ext_band_switch_exist;
 	u8			ext_band_switch_type;			/* 0:DPDT, 1:SPDT */
 	u8			ext_band_switch_ctrl_polarity;
 
-	boolean		wlg_Locate_at_btg;				/*  If true:  WLG at BTG, If false: WLG at WLAG */
+	/*  If true:  WLG at BTG, If false: WLG at WLAG */
+	boolean		wlg_Locate_at_btg;
 
 	boolean		ext_ant_switch_diversity;		/* If diversity on */
 };
@@ -421,8 +451,12 @@ struct psdscan_sta_8822b_2ant {
 	u32			psd_max_value_point;
 	u32			psd_max_value;
 	u32			psd_max_value2;
-	u32			psd_avg_value;   /* filter loop_max_value that below BT_8822B_1ANT_ANTDET_PSDTHRES_1ANT, and average the rest*/
-	u32			psd_loop_max_value[BT_8822B_2ANT_ANTDET_PSD_SWWEEPCOUNT];  /*max value in each loop */
+	/* filter loop_max_value that below BT_8822B_1ANT_ANTDET_PSDTHRES_1ANT,
+	 * and average the rest
+	 */
+	u32			psd_avg_value;
+	/*max value in each loop */
+	u32			psd_loop_max_value[BT_8822B_2ANT_ANTDET_PSD_SWWEEPCOUNT];
 	u32			psd_start_base;
 	u32			psd_avg_num;	/* 1/8/16/32 */
 	u32			psd_gen_count;
@@ -490,4 +524,3 @@ void ex_halbtc8822b2ant_display_ant_detection(IN struct btc_coexist *btcoexist);
 #endif
 
 #endif
-
diff --git a/rtl8822BU/hal/btc/halbtc8822bwifionly.c b/rtl8822BU/hal/btc/halbtc8822bwifionly.c
index 8ab2355..8de6409 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8822bwifionly.c
+++ b/rtl8822BU/hal/btc/halbtc8822bwifionly.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #include "mp_precomp.h"
 
 
@@ -48,7 +62,7 @@ hal8822b_wifi_only_switch_antenna(IN struct wifi_only_cfg *pwifionlycfg,
 {
 
 	if (is_5g)
-		halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcbd, 0x3, 0x1);
+		halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcbc, 0x300, 0x1);
 	else
-		halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcbd, 0x3, 0x2);
+		halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcbc, 0x300, 0x2);
 }
diff --git a/rtl8822BU/hal/btc/halbtc8822bwifionly.h b/rtl8822BU/hal/btc/halbtc8822bwifionly.h
index 3f5ef3b..4ca6f48 100755..100644
--- a/rtl8822BU/hal/btc/halbtc8822bwifionly.h
+++ b/rtl8822BU/hal/btc/halbtc8822bwifionly.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef __INC_HAL8822BWIFIONLYHWCFG_H
 #define __INC_HAL8822BWIFIONLYHWCFG_H
 
diff --git a/rtl8822BU/hal/btc/halbtcoutsrc.h b/rtl8822BU/hal/btc/halbtcoutsrc.h
index f9d55f2..2005e1e 100755..100644
--- a/rtl8822BU/hal/btc/halbtcoutsrc.h
+++ b/rtl8822BU/hal/btc/halbtcoutsrc.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef	__HALBTC_OUT_SRC_H__
 #define __HALBTC_OUT_SRC_H__
 
@@ -249,6 +263,7 @@ typedef enum _BTC_GET_TYPE {
 	BTC_GET_BL_EXT_SWITCH,
 	BTC_GET_BL_WIFI_IS_IN_MP_MODE,
 	BTC_GET_BL_IS_ASUS_8723B,
+	BTC_GET_BL_RF4CE_CONNECTED,
 
 	/* type s4Byte */
 	BTC_GET_S4_WIFI_RSSI,
@@ -316,6 +331,8 @@ typedef enum _BTC_SET_TYPE {
 	BTC_SET_ACT_LEAVE_LPS,
 	BTC_SET_ACT_ENTER_LPS,
 	BTC_SET_ACT_NORMAL_LPS,
+	BTC_SET_ACT_PRE_NORMAL_LPS,
+	BTC_SET_ACT_POST_NORMAL_LPS,
 	BTC_SET_ACT_DISABLE_LOW_POWER,
 	BTC_SET_ACT_UPDATE_RAMASK,
 	BTC_SET_ACT_SEND_MIMO_PS,
@@ -685,6 +702,13 @@ typedef u4Byte
 	IN  u1Byte			scanType
 	);
 
+typedef BOOLEAN
+(*BFP_BTC_GET_BT_AFH_MAP_FROM_BT)(
+	IN	PVOID			pBtcContext,
+	IN	u1Byte			mapType,
+	OUT	pu1Byte			afhMap
+	);
+
 struct  btc_bt_info {
 	boolean					bt_disabled;
 	boolean				bt_enable_disable_change;
@@ -747,6 +771,12 @@ struct btc_bt_link_info {
 	boolean					acl_busy;
 };
 
+#ifdef CONFIG_RF4CE_COEXIST
+struct btc_rf4ce_info {
+	u8					link_state;
+};
+#endif
+
 struct btc_statistics {
 	u32					cnt_bind;
 	u32					cnt_power_on;
@@ -774,6 +804,10 @@ struct btc_coexist {
 	struct  btc_bt_info			bt_info;		/*some bt info referenced by non-bt module*/
 	struct  btc_stack_info		stack_info;
 	struct  btc_bt_link_info		bt_link_info;
+
+#ifdef CONFIG_RF4CE_COEXIST
+	struct  btc_rf4ce_info		rf4ce_info;
+#endif
 	BTC_CHIP_INTERFACE		chip_interface;
 	PVOID					odm_priv;
 
@@ -826,6 +860,7 @@ struct btc_coexist {
 	BFP_BTC_GET_ANT_DET_VAL_FROM_BT		btc_get_ant_det_val_from_bt;
 	BFP_BTC_GET_BLE_SCAN_TYPE_FROM_BT	btc_get_ble_scan_type_from_bt;
 	BFP_BTC_GET_BLE_SCAN_PARA_FROM_BT	btc_get_ble_scan_para_from_bt;
+	BFP_BTC_GET_BT_AFH_MAP_FROM_BT		btc_get_bt_afh_map_from_bt;
 };
 typedef struct btc_coexist *PBTC_COEXIST;
 
diff --git a/rtl8822BU/hal/btc/mp_precomp.h b/rtl8822BU/hal/btc/mp_precomp.h
index 684c010..b7402aa 100755..100644
--- a/rtl8822BU/hal/btc/mp_precomp.h
+++ b/rtl8822BU/hal/btc/mp_precomp.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __MP_PRECOMP_H__
 #define __MP_PRECOMP_H__
 
@@ -85,5 +80,6 @@ extern u4Byte GLBtcDbgType[];
 #include "hal_btcoex_wifionly.h"
 #include "halbtc8723bwifionly.h"
 #include "halbtc8822bwifionly.h"
+#include "halbtc8821cwifionly.h"
 
 #endif /*  __MP_PRECOMP_H__ */
diff --git a/rtl8822BU/hal/efuse/efuse_mask.h b/rtl8822BU/hal/efuse/efuse_mask.h
index faafed4..8270569 100755..100644
--- a/rtl8822BU/hal/efuse/efuse_mask.h
+++ b/rtl8822BU/hal/efuse/efuse_mask.h
@@ -1,106 +1,138 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 
 #if DEV_BUS_TYPE == RT_USB_INTERFACE
 
-#if defined(CONFIG_RTL8188E)
-	#include "rtl8188e/HalEfuseMask8188E_USB.h"
-#endif
+	#if defined(CONFIG_RTL8188E)
+		#include "rtl8188e/HalEfuseMask8188E_USB.h"
+	#endif
 
-#if defined(CONFIG_RTL8812A)
-	#include "rtl8812a/HalEfuseMask8812A_USB.h"
-#endif
+	#if defined(CONFIG_RTL8812A)
+		#include "rtl8812a/HalEfuseMask8812A_USB.h"
+	#endif
 
-#if defined(CONFIG_RTL8821A)
-	#include "rtl8812a/HalEfuseMask8821A_USB.h"
-#endif
+	#if defined(CONFIG_RTL8821A)
+		#include "rtl8812a/HalEfuseMask8821A_USB.h"
+	#endif
 
-#if defined(CONFIG_RTL8192E)
-	#include "rtl8192e/HalEfuseMask8192E_USB.h"
-#endif
+	#if defined(CONFIG_RTL8192E)
+		#include "rtl8192e/HalEfuseMask8192E_USB.h"
+	#endif
 
-#if defined(CONFIG_RTL8723B)
-	#include "rtl8723b/HalEfuseMask8723B_USB.h"
-#endif
+	#if defined(CONFIG_RTL8723B)
+		#include "rtl8723b/HalEfuseMask8723B_USB.h"
+	#endif
 
-#if defined(CONFIG_RTL8814A)
-	#include "rtl8814a/HalEfuseMask8814A_USB.h"
-#endif
+	#if defined(CONFIG_RTL8814A)
+		#include "rtl8814a/HalEfuseMask8814A_USB.h"
+	#endif
 
-#if defined(CONFIG_RTL8703B)
-	#include "rtl8703b/HalEfuseMask8703B_USB.h"
-#endif
+	#if defined(CONFIG_RTL8703B)
+		#include "rtl8703b/HalEfuseMask8703B_USB.h"
+	#endif
 
-#if defined(CONFIG_RTL8723D)
-	#include "rtl8723d/HalEfuseMask8723D_USB.h"
-#endif
+	#if defined(CONFIG_RTL8723D)
+		#include "rtl8723d/HalEfuseMask8723D_USB.h"
+	#endif
 
-#if defined(CONFIG_RTL8188F)
-	#include "rtl8188f/HalEfuseMask8188F_USB.h"
-#endif
+	#if defined(CONFIG_RTL8188F)
+		#include "rtl8188f/HalEfuseMask8188F_USB.h"
+	#endif
 
-#if defined(CONFIG_RTL8822B)
-	#include "rtl8822b/HalEfuseMask8822B_USB.h"
-#endif
+	#if defined(CONFIG_RTL8822B)
+		#include "rtl8822b/HalEfuseMask8822B_USB.h"
+	#endif
+
+	#if defined(CONFIG_RTL8821C)
+		#include "rtl8821c/HalEfuseMask8821C_USB.h"
+	#endif
 
 #elif DEV_BUS_TYPE == RT_PCI_INTERFACE
 
-#if defined(CONFIG_RTL8188E)
-	#include "rtl8188e/HalEfuseMask8188E_PCIE.h"
-#endif
+	#if defined(CONFIG_RTL8188E)
+		#include "rtl8188e/HalEfuseMask8188E_PCIE.h"
+	#endif
 
-#if defined(CONFIG_RTL8812A)
-	#include "rtl8812a/HalEfuseMask8812A_PCIE.h"
-#endif
+	#if defined(CONFIG_RTL8812A)
+		#include "rtl8812a/HalEfuseMask8812A_PCIE.h"
+	#endif
 
-#if defined(CONFIG_RTL8821A)
-	#include "rtl8812a/HalEfuseMask8821A_PCIE.h"
-#endif
+	#if defined(CONFIG_RTL8821A)
+		#include "rtl8812a/HalEfuseMask8821A_PCIE.h"
+	#endif
 
-#if defined(CONFIG_RTL8192E)
-	#include "rtl8192e/HalEfuseMask8192E_PCIE.h"
-#endif
+	#if defined(CONFIG_RTL8192E)
+		#include "rtl8192e/HalEfuseMask8192E_PCIE.h"
+	#endif
 
-#if defined(CONFIG_RTL8723B)
-	#include "rtl8723b/HalEfuseMask8723B_PCIE.h"
-#endif
+	#if defined(CONFIG_RTL8723B)
+		#include "rtl8723b/HalEfuseMask8723B_PCIE.h"
+	#endif
 
-#if defined(CONFIG_RTL8814A)
-	#include "rtl8814a/HalEfuseMask8814A_PCIE.h"
-#endif
+	#if defined(CONFIG_RTL8814A)
+		#include "rtl8814a/HalEfuseMask8814A_PCIE.h"
+	#endif
 
-#if defined(CONFIG_RTL8703B)
-	#include "rtl8703b/HalEfuseMask8703B_PCIE.h"
-#endif
+	#if defined(CONFIG_RTL8703B)
+		#include "rtl8703b/HalEfuseMask8703B_PCIE.h"
+	#endif
 
-#if defined(CONFIG_RTL8822B)
-	#include "rtl8822b/HalEfuseMask8822B_PCIE.h"
-#endif
-#if defined(CONFIG_RTL8723D)
-	#include "rtl8723d/HalEfuseMask8723D_PCIE.h"
-#endif
+	#if defined(CONFIG_RTL8822B)
+		#include "rtl8822b/HalEfuseMask8822B_PCIE.h"
+	#endif
+	#if defined(CONFIG_RTL8723D)
+		#include "rtl8723d/HalEfuseMask8723D_PCIE.h"
+	#endif
+	#if defined(CONFIG_RTL8821C)
+		#include "rtl8821c/HalEfuseMask8821C_PCIE.h"
+	#endif
 
 #elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
+	#if defined(CONFIG_RTL8723B)
+		#include "rtl8723b/HalEfuseMask8723B_SDIO.h"
+	#endif
 
-#if defined(CONFIG_RTL8188E)
-	#include "rtl8188e/HalEfuseMask8188E_SDIO.h"
-#endif
+	#if defined(CONFIG_RTL8188E)
+		#include "rtl8188e/HalEfuseMask8188E_SDIO.h"
+	#endif
 
-#if defined(CONFIG_RTL8703B)
-	#include "rtl8703b/HalEfuseMask8703B_SDIO.h"
-#endif
+	#if defined(CONFIG_RTL8703B)
+		#include "rtl8703b/HalEfuseMask8703B_SDIO.h"
+	#endif
 
-#if defined(CONFIG_RTL8188F)
-	#include "rtl8188f/HalEfuseMask8188F_SDIO.h"
-#endif
+	#if defined(CONFIG_RTL8188F)
+		#include "rtl8188f/HalEfuseMask8188F_SDIO.h"
+	#endif
 
-#if defined(CONFIG_RTL8723D)
-	#include "rtl8723d/HalEfuseMask8723D_SDIO.h"
-#endif
+	#if defined(CONFIG_RTL8723D)
+		#include "rtl8723d/HalEfuseMask8723D_SDIO.h"
+	#endif
 
-#if defined(CONFIG_RTL8821C)
-	#include "rtl8821c/HalEfuseMask8821C_SDIO.h"
-#endif
+	#if defined(CONFIG_RTL8192E)
+		#include "rtl8192e/HalEfuseMask8192E_SDIO.h"
+	#endif
 
-#if defined(CONFIG_RTL8822B)
-	#include "rtl8822b/HalEfuseMask8822B_SDIO.h"
-#endif
+	#if defined(CONFIG_RTL8821A)
+		#include "rtl8812a/HalEfuseMask8821A_SDIO.h"
+	#endif
+
+	#if defined(CONFIG_RTL8821C)
+		#include "rtl8821c/HalEfuseMask8821C_SDIO.h"
+	#endif
+
+	#if defined(CONFIG_RTL8822B)
+		#include "rtl8822b/HalEfuseMask8822B_SDIO.h"
+	#endif
 #endif
diff --git a/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_PCIE.c b/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_PCIE.c
index 8e072a8..d8d61b9 100755..100644
--- a/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_PCIE.c
+++ b/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_PCIE.c
@@ -1,22 +1,17 @@
 /******************************************************************************
-*
-* Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of version 2 of the GNU General Public License as
-* published by the Free Software Foundation.
-*
-* This program is distributed in the hope that it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License along with
-* this program; if not, write to the Free Software Foundation, Inc.,
-* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
-*
-*
-******************************************************************************/
+ *
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #include <drv_types.h>
 
 #include "HalEfuseMask8822B_PCIE.h"
@@ -37,7 +32,7 @@ u1Byte Array_MP_8822B_MPCIE[] = {
 	0x00,
 	0x00,
 	0x00,
-	0x0F,
+	0x03,
 	0xF7,
 	0xFF,
 	0xFF,
@@ -75,7 +70,6 @@ u1Byte Array_MP_8822B_MPCIE[] = {
 	0x00,
 	0x00,
 
-
 };
 
 u2Byte
diff --git a/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_PCIE.h b/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_PCIE.h
index e863d6a..af3faaa 100755..100644
--- a/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_PCIE.h
+++ b/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_PCIE.h
@@ -1,22 +1,17 @@
 /******************************************************************************
-*
-* Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of version 2 of the GNU General Public License as
-* published by the Free Software Foundation.
-*
-* This program is distributed in the hope that it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License along with
-* this program; if not, write to the Free Software Foundation, Inc.,
-* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
-*
-*
-******************************************************************************/
+ *
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 
 
 /******************************************************************************
diff --git a/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_SDIO.c b/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_SDIO.c
index d60b6de..313fa8d 100755..100644
--- a/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_SDIO.c
+++ b/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_SDIO.c
@@ -1,22 +1,17 @@
 /******************************************************************************
-*
-* Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of version 2 of the GNU General Public License as
-* published by the Free Software Foundation.
-*
-* This program is distributed in the hope that it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License along with
-* this program; if not, write to the Free Software Foundation, Inc.,
-* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
-*
-*
-******************************************************************************/
+ *
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #include <drv_types.h>
 
 #include "HalEfuseMask8822B_SDIO.h"
diff --git a/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_SDIO.h b/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_SDIO.h
index 14293ac..7ace94e 100755..100644
--- a/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_SDIO.h
+++ b/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_SDIO.h
@@ -1,22 +1,17 @@
 /******************************************************************************
-*
-* Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of version 2 of the GNU General Public License as
-* published by the Free Software Foundation.
-*
-* This program is distributed in the hope that it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License along with
-* this program; if not, write to the Free Software Foundation, Inc.,
-* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
-*
-*
-******************************************************************************/
+ *
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 
 
 
diff --git a/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_USB.c b/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_USB.c
index 84dfde4..532d8b2 100755..100644
--- a/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_USB.c
+++ b/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_USB.c
@@ -1,22 +1,17 @@
 /******************************************************************************
-*
-* Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of version 2 of the GNU General Public License as
-* published by the Free Software Foundation.
-*
-* This program is distributed in the hope that it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License along with
-* this program; if not, write to the Free Software Foundation, Inc.,
-* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
-*
-*
-******************************************************************************/
+ *
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #include <drv_types.h>
 
 #include "HalEfuseMask8822B_USB.h"
@@ -37,15 +32,15 @@ u1Byte Array_MP_8822B_MUSB[] = {
 	0x00,
 	0x00,
 	0x00,
-	0x0F,
+	0x03,
 	0xF7,
 	0x00,
 	0x00,
 	0x00,
 	0xFF,
 	0xFF,
-	0xF3,
-	0x00,
+	0xFF,
+	0xFF,
 	0xF0,
 	0x00,
 	0x00,
@@ -56,9 +51,7 @@ u1Byte Array_MP_8822B_MUSB[] = {
 	0x00,
 	0x00,
 	0x00,
-	0x08,
 	0x00,
-	0x80,
 	0x00,
 	0x00,
 	0x00,
@@ -74,7 +67,8 @@ u1Byte Array_MP_8822B_MUSB[] = {
 	0x00,
 	0x00,
 	0x00,
-
+	0x00,
+	0x00,
 };
 
 u2Byte EFUSE_GetArrayLen_MP_8822B_MUSB(VOID)
diff --git a/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_USB.h b/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_USB.h
index b98ef77..ef368f2 100755..100644
--- a/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_USB.h
+++ b/rtl8822BU/hal/efuse/rtl8822b/HalEfuseMask8822B_USB.h
@@ -1,22 +1,17 @@
 /******************************************************************************
-*
-* Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of version 2 of the GNU General Public License as
-* published by the Free Software Foundation.
-*
-* This program is distributed in the hope that it will be useful, but WITHOUT
-* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-* more details.
-*
-* You should have received a copy of the GNU General Public License along with
-* this program; if not, write to the Free Software Foundation, Inc.,
-* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
-*
-*
-******************************************************************************/
+ *
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 
 
 
diff --git a/rtl8822BU/hal/hal_btcoex.c b/rtl8822BU/hal/hal_btcoex.c
index a82cb0e..05ab197 100755..100644
--- a/rtl8822BU/hal/hal_btcoex.c
+++ b/rtl8822BU/hal/hal_btcoex.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define __HAL_BTCOEX_C__
 
 #ifdef CONFIG_BT_COEXIST
@@ -166,15 +161,21 @@ typedef enum _bt_c2h_status {
 
 /* C2H BT OP CODES */
 typedef enum _bt_op_code {
-	BT_OP_GET_BT_VERSION				= 0,
-	BT_OP_WRITE_REG_ADDR				= 12,
-	BT_OP_WRITE_REG_VALUE,
-	BT_OP_READ_REG						= 17,
-	BT_OP_GET_BT_COEX_SUPPORTED_FEATURE	= 42,
-	BT_OP_GET_BT_COEX_SUPPORTED_VERSION	= 43,
-	BT_OP_GET_BT_ANT_DET_VAL			= 44,
-	BT_OP_GET_BT_BLE_SCAN_PARA			= 45,
-	BT_OP_GET_BT_BLE_SCAN_TYPE			= 46,
+	BT_OP_GET_BT_VERSION					= 0x00,
+	BT_OP_WRITE_REG_ADDR					= 0x0c,
+	BT_OP_WRITE_REG_VALUE					= 0x0d,
+
+	BT_OP_READ_REG							= 0x11,
+
+	BT_LO_OP_GET_AFH_MAP_L					= 0x1e,
+	BT_LO_OP_GET_AFH_MAP_M					= 0x1f,
+	BT_LO_OP_GET_AFH_MAP_H					= 0x20,
+
+	BT_OP_GET_BT_COEX_SUPPORTED_FEATURE		= 0x2a,
+	BT_OP_GET_BT_COEX_SUPPORTED_VERSION		= 0x2b,
+	BT_OP_GET_BT_ANT_DET_VAL				= 0x2c,
+	BT_OP_GET_BT_BLE_SCAN_PARA				= 0x2d,
+	BT_OP_GET_BT_BLE_SCAN_TYPE				= 0x2e,
 	BT_OP_MAX
 } BT_OP_CODE;
 
@@ -272,6 +273,22 @@ static u8 halbtcoutsrc_IsCsrBtCoex(PBTC_COEXIST pBtCoexist)
 	return _FALSE;
 }
 
+static void halbtcoutsrc_EnterPwrLock(PBTC_COEXIST pBtCoexist)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj((PADAPTER)pBtCoexist->Adapter);
+	struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj);
+
+	_enter_pwrlock(&pwrpriv->lock);
+}
+
+static void halbtcoutsrc_ExitPwrLock(PBTC_COEXIST pBtCoexist)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj((PADAPTER)pBtCoexist->Adapter);
+	struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj);
+
+	_exit_pwrlock(&pwrpriv->lock);
+}
+
 static u8 halbtcoutsrc_IsHwMailboxExist(PBTC_COEXIST pBtCoexist)
 {
 	if (pBtCoexist->board_info.bt_chip_type == BTC_CHIP_CSR_BC4
@@ -284,7 +301,7 @@ static u8 halbtcoutsrc_IsHwMailboxExist(PBTC_COEXIST pBtCoexist)
 		return _TRUE;
 }
 
-static void halbtcoutsrc_LeaveLps(PBTC_COEXIST pBtCoexist)
+static u8 halbtcoutsrc_LeaveLps(PBTC_COEXIST pBtCoexist)
 {
 	PADAPTER padapter;
 
@@ -294,7 +311,7 @@ static void halbtcoutsrc_LeaveLps(PBTC_COEXIST pBtCoexist)
 	pBtCoexist->bt_info.bt_ctrl_lps = _TRUE;
 	pBtCoexist->bt_info.bt_lps_on = _FALSE;
 
-	rtw_btcoex_LPS_Leave(padapter);
+	return rtw_btcoex_LPS_Leave(padapter);
 }
 
 void halbtcoutsrc_EnterLps(PBTC_COEXIST pBtCoexist)
@@ -335,6 +352,24 @@ void halbtcoutsrc_NormalLps(PBTC_COEXIST pBtCoexist)
 	}
 }
 
+void halbtcoutsrc_Pre_NormalLps(PBTC_COEXIST pBtCoexist)
+{
+	PADAPTER padapter;
+
+	padapter = pBtCoexist->Adapter;
+
+	if (pBtCoexist->bt_info.bt_ctrl_lps) {
+		pBtCoexist->bt_info.bt_lps_on = _FALSE;
+		rtw_btcoex_LPS_Leave(padapter);
+	}
+}
+
+void halbtcoutsrc_Post_NormalLps(PBTC_COEXIST pBtCoexist)
+{
+	if (pBtCoexist->bt_info.bt_ctrl_lps)
+		pBtCoexist->bt_info.bt_ctrl_lps = _FALSE;
+}
+
 /*
  *  Constraint:
  *	   1. this function will request pwrctrl->lock
@@ -474,7 +509,7 @@ u8 halbtcoutsrc_is_fw_ready(PBTC_COEXIST pBtCoexist)
 
 	padapter = pBtCoexist->Adapter;
 
-	return padapter->bFWReady;
+	return GET_HAL_DATA(padapter)->bFWReady;
 }
 
 u8 halbtcoutsrc_IsWifiBusy(PADAPTER padapter)
@@ -575,7 +610,6 @@ static u8 _btmpoper_cmd(PBTC_COEXIST pBtCoexist, u8 opcode, u8 opcodever, u8 *cm
 	u8 buf[H2C_BTMP_OPER_LEN] = {0};
 	u8 buflen;
 	u8 seq;
-	u8 timer_cancelled;
 	s32 ret;
 
 
@@ -600,7 +634,7 @@ static u8 _btmpoper_cmd(PBTC_COEXIST pBtCoexist, u8 opcode, u8 opcodever, u8 *cm
 	padapter = pBtCoexist->Adapter;
 	_set_timer(&GLBtcBtMpOperTimer, BTC_MPOPER_TIMEOUT);
 	if (rtw_hal_fill_h2c_cmd(padapter, H2C_BT_MP_OPER, buflen, buf) == _FAIL) {
-		_cancel_timer(&GLBtcBtMpOperTimer, &timer_cancelled);
+		_cancel_timer_ex(&GLBtcBtMpOperTimer);
 		ret = BT_STATUS_H2C_FAIL;
 		goto exit;
 	}
@@ -614,7 +648,7 @@ static u8 _btmpoper_cmd(PBTC_COEXIST pBtCoexist, u8 opcode, u8 opcodever, u8 *cm
 		goto exit;
 	}
 	if (!GLBtcBtMpRptBTOK) {
-		RTW_ERR("%s: Didn't get BT response!\n", __FUNCTION__);
+		RTW_DBG("%s: Didn't get BT response!\n", __FUNCTION__);
 		ret = BT_STATUS_H2C_BT_NO_RSP;
 		goto exit;
 	}
@@ -888,6 +922,17 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf)
 		*pu8 = _FALSE;
 		break;
 
+	case BTC_GET_BL_RF4CE_CONNECTED:
+#ifdef CONFIG_RF4CE_COEXIST
+		if (hal_btcoex_get_rf4ce_link_state() == 0)
+			*pu8 = FALSE;
+		else
+			*pu8 = TRUE;
+#else
+		*pu8 = FALSE;
+#endif
+		break;
+
 	case BTC_GET_S4_WIFI_RSSI:
 		*pS4Tmp = halbtcoutsrc_GetWifiRssi(padapter);
 		break;
@@ -1055,6 +1100,7 @@ u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf)
 	u8 *pU1Tmp;
 	u32	*pU4Tmp;
 	u8 ret;
+	u8 result = _TRUE;
 
 
 	pBtCoexist = (PBTC_COEXIST)pBtcContext;
@@ -1148,7 +1194,7 @@ u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf)
 
 	/* the following are some action which will be triggered */
 	case BTC_SET_ACT_LEAVE_LPS:
-		halbtcoutsrc_LeaveLps(pBtCoexist);
+		result = halbtcoutsrc_LeaveLps(pBtCoexist);
 		break;
 
 	case BTC_SET_ACT_ENTER_LPS:
@@ -1159,6 +1205,14 @@ u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf)
 		halbtcoutsrc_NormalLps(pBtCoexist);
 		break;
 
+	case BTC_SET_ACT_PRE_NORMAL_LPS:
+		halbtcoutsrc_Pre_NormalLps(pBtCoexist);
+		break;
+
+	case BTC_SET_ACT_POST_NORMAL_LPS:
+		halbtcoutsrc_Post_NormalLps(pBtCoexist);
+		break;
+
 	case BTC_SET_ACT_DISABLE_LOW_POWER:
 		halbtcoutsrc_DisableLowPower(pBtCoexist, *pu8);
 		break;
@@ -1172,7 +1226,7 @@ u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf)
 
 			cur_network = &padapter->mlmeextpriv.mlmext_info.network;
 			psta = rtw_get_stainfo(&padapter->stapriv, cur_network->MacAddress);
-			rtw_hal_update_ra_mask(psta, 0);
+			rtw_hal_update_ra_mask(psta, psta->rssi_level, _FALSE);
 		}
 		break;
 
@@ -1241,7 +1295,7 @@ u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf)
 		break;
 	}
 
-	return ret;
+	return result;
 }
 
 u8 halbtcoutsrc_UnderIps(PBTC_COEXIST pBtCoexist)
@@ -2073,6 +2127,60 @@ u32 halbtcoutsrc_GetBleScanParaFromBt(void *pBtcContext, u8 scanType)
 	return data;
 }
 
+u8 halbtcoutsrc_GetBtAFHMapFromBt(void *pBtcContext, u8 mapType, u8 *afhMap)
+{
+	struct btc_coexist *pBtCoexist = (struct btc_coexist *)pBtcContext;
+	u8 buf[2] = {0};
+	_irqL irqL;
+	u8 op_code;
+	u32 *AfhMapL = (u32 *)&(afhMap[0]);
+	u32 *AfhMapM = (u32 *)&(afhMap[4]);
+	u16 *AfhMapH = (u16 *)&(afhMap[8]);
+	u8 status;
+	u32 ret = BT_STATUS_BT_OP_SUCCESS;
+
+	if (halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == _FALSE)
+		return _FALSE;
+
+	buf[0] = 0;
+	buf[1] = mapType;
+
+	_enter_critical_mutex(&GLBtcBtMpOperLock, &irqL);
+
+	op_code = BT_LO_OP_GET_AFH_MAP_L;
+	status = _btmpoper_cmd(pBtCoexist, op_code, 0, buf, 0);
+	if (status == BT_STATUS_BT_OP_SUCCESS)
+		*AfhMapL = le32_to_cpu(*(u32 *)GLBtcBtMpRptRsp);
+	else {
+		ret = SET_BT_MP_OPER_RET(op_code, status);
+		goto exit;
+	}
+
+	op_code = BT_LO_OP_GET_AFH_MAP_M;
+	status = _btmpoper_cmd(pBtCoexist, op_code, 0, buf, 0);
+	if (status == BT_STATUS_BT_OP_SUCCESS)
+		*AfhMapM = le32_to_cpu(*(u32 *)GLBtcBtMpRptRsp);
+	else {
+		ret = SET_BT_MP_OPER_RET(op_code, status);
+		goto exit;
+	}
+
+	op_code = BT_LO_OP_GET_AFH_MAP_H;
+	status = _btmpoper_cmd(pBtCoexist, op_code, 0, buf, 0);
+	if (status == BT_STATUS_BT_OP_SUCCESS)
+		*AfhMapH = le16_to_cpu(*(u16 *)GLBtcBtMpRptRsp);
+	else {
+		ret = SET_BT_MP_OPER_RET(op_code, status);
+		goto exit;
+	}
+
+exit:
+
+	_exit_critical_mutex(&GLBtcBtMpOperLock, &irqL);
+
+	return (ret == BT_STATUS_BT_OP_SUCCESS) ? _TRUE : _FALSE;
+}
+
 u32 halbtcoutsrc_GetPhydmVersion(void *pBtcContext)
 {
 	struct btc_coexist *pBtCoexist = (struct btc_coexist *)pBtcContext;
@@ -2350,6 +2458,7 @@ u8 EXhalbtcoutsrc_InitlizeVariables(void *padapter)
 	pBtCoexist->btc_get_ant_det_val_from_bt = halbtcoutsrc_GetAntDetValFromBt;
 	pBtCoexist->btc_get_ble_scan_type_from_bt = halbtcoutsrc_GetBleScanTypeFromBt;
 	pBtCoexist->btc_get_ble_scan_para_from_bt = halbtcoutsrc_GetBleScanParaFromBt;
+	pBtCoexist->btc_get_bt_afh_map_from_bt = halbtcoutsrc_GetBtAFHMapFromBt;
 	pBtCoexist->btc_get_bt_phydm_version = halbtcoutsrc_GetPhydmVersion;
 	pBtCoexist->btc_phydm_modify_RA_PCR_threshold = halbtcoutsrc_phydm_modify_RA_PCR_threshold;
 	pBtCoexist->btc_phydm_query_PHY_counter = halbtcoutsrc_phydm_query_PHY_counter;
@@ -2369,7 +2478,7 @@ u8 EXhalbtcoutsrc_InitlizeVariables(void *padapter)
 	/* BT Control H2C/C2H*/
 	GLBtcBtMpOperSeq = 0;
 	_rtw_mutex_init(&GLBtcBtMpOperLock);
-	_init_timer(&GLBtcBtMpOperTimer, ((PADAPTER)padapter)->pnetdev, _btmpoper_timer_hdl, pBtCoexist);
+	rtw_init_timer(&GLBtcBtMpOperTimer, padapter, _btmpoper_timer_hdl, pBtCoexist);
 	_rtw_init_sema(&GLBtcBtMpRptSema, 0);
 	GLBtcBtMpRptSeq = 0;
 	GLBtcBtMpRptStatus = 0;
@@ -2384,9 +2493,13 @@ u8 EXhalbtcoutsrc_InitlizeVariables(void *padapter)
 
 void EXhalbtcoutsrc_PowerOnSetting(PBTC_COEXIST pBtCoexist)
 {
+	HAL_DATA_TYPE	*pHalData = NULL;
+
 	if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist))
 		return;
 
+	pHalData = GET_HAL_DATA((PADAPTER)pBtCoexist->Adapter);
+
 	/* Power on setting function is only added in 8723B currently */
 	if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) {
 		if (pBtCoexist->board_info.btdm_ant_num == 2)
@@ -2402,14 +2515,14 @@ void EXhalbtcoutsrc_PowerOnSetting(PBTC_COEXIST pBtCoexist)
 			ex_halbtc8723d1ant_power_on_setting(pBtCoexist);
 	}
 
-	if (IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) {
+	if ((IS_HARDWARE_TYPE_8822B(pBtCoexist->Adapter)) && (pHalData->EEPROMBluetoothCoexist == _TRUE)) {
 		if (pBtCoexist->board_info.btdm_ant_num == 1)
 			ex_halbtc8822b1ant_power_on_setting(pBtCoexist);
 		else if (pBtCoexist->board_info.btdm_ant_num == 2)
 			ex_halbtc8822b2ant_power_on_setting(pBtCoexist);
 	}
 
-	if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) {
+	if ((IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) && (pHalData->EEPROMBluetoothCoexist == _TRUE)) {
 		if (pBtCoexist->board_info.btdm_ant_num == 2)
 			ex_halbtc8821c2ant_power_on_setting(pBtCoexist);
 		else if (pBtCoexist->board_info.btdm_ant_num == 1)
@@ -2491,11 +2604,19 @@ void EXhalbtcoutsrc_init_hw_config(PBTC_COEXIST pBtCoexist, u8 bWifiOnly)
 			ex_halbtc8822b1ant_init_hw_config(pBtCoexist, bWifiOnly);
 		else if (pBtCoexist->board_info.btdm_ant_num == 2)
 			ex_halbtc8822b2ant_init_hw_config(pBtCoexist, bWifiOnly);
+		#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+		rtw_hal_set_default_port_id_cmd(pBtCoexist->Adapter, 0);
+		rtw_hal_set_wifi_port_id_cmd(pBtCoexist->Adapter);
+		#endif
 	} else if (IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) {
 		if (pBtCoexist->board_info.btdm_ant_num == 2)
 			ex_halbtc8821c2ant_init_hw_config(pBtCoexist, bWifiOnly);
 		else if (pBtCoexist->board_info.btdm_ant_num == 1)
 			ex_halbtc8821c1ant_init_hw_config(pBtCoexist, bWifiOnly);
+		#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+		rtw_hal_set_default_port_id_cmd(pBtCoexist->Adapter, 0);
+		rtw_hal_set_wifi_port_id_cmd(pBtCoexist->Adapter);
+		#endif
 	}
 }
 
@@ -3525,6 +3646,9 @@ void EXhalbtcoutsrc_DisplayBtCoexInfo(PBTC_COEXIST pBtCoexist)
 
 	halbtcoutsrc_LeaveLowPower(pBtCoexist);
 
+	/* To prevent the racing with IPS enter */
+	halbtcoutsrc_EnterPwrLock(pBtCoexist);
+
 	if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) {
 #if 0
 		if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
@@ -3570,6 +3694,8 @@ void EXhalbtcoutsrc_DisplayBtCoexInfo(PBTC_COEXIST pBtCoexist)
 			ex_halbtc8821c1ant_display_coex_info(pBtCoexist);
 	}
 
+	halbtcoutsrc_ExitPwrLock(pBtCoexist);
+
 	halbtcoutsrc_NormalLowPower(pBtCoexist);
 }
 
@@ -3606,6 +3732,18 @@ void EXhalbtcoutsrc_set_rfe_type(u8 type)
 	GLBtCoexist.board_info.rfe_type= type;
 }
 
+#ifdef CONFIG_RF4CE_COEXIST
+void EXhalbtcoutsrc_set_rf4ce_link_state(u8 state)
+{
+	GLBtCoexist.rf4ce_info.link_state = state;
+}
+
+u8 EXhalbtcoutsrc_get_rf4ce_link_state(void)
+{
+	return GLBtCoexist.rf4ce_info.link_state;
+}
+#endif
+
 void EXhalbtcoutsrc_switchband_notify(struct btc_coexist *pBtCoexist, u8 type)
 {
 	if(!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist))
@@ -3759,6 +3897,14 @@ void hal_btcoex_PowerOnSetting(PADAPTER padapter)
 	EXhalbtcoutsrc_PowerOnSetting(&GLBtCoexist);
 }
 
+void hal_btcoex_PowerOffSetting(PADAPTER padapter)
+{
+	/* Clear the WiFi on/off bit in scoreboard reg. if necessary */
+	if (IS_HARDWARE_TYPE_8703B(padapter) || IS_HARDWARE_TYPE_8723D(padapter)
+		|| IS_HARDWARE_TYPE_8821C(padapter) || IS_HARDWARE_TYPE_8822B(padapter))
+		rtw_write16(padapter, 0xaa, 0x8000);
+}
+
 void hal_btcoex_PreLoadFirmware(PADAPTER padapter)
 {
 	EXhalbtcoutsrc_PreLoadFirmware(&GLBtCoexist);
@@ -3871,6 +4017,10 @@ void hal_btcoex_SuspendNotify(PADAPTER padapter, u8 state)
 #endif
 		break;
 	case BTCOEX_SUSPEND_STATE_RESUME:
+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+		/* re-download FW after resume, inform WL FW port number */
+		rtw_hal_set_wifi_port_id_cmd(GLBtCoexist.Adapter);
+#endif
 		EXhalbtcoutsrc_pnp_notify(&GLBtCoexist, BTC_WIFI_PNP_WAKE_UP);
 		break;
 	}
@@ -4385,6 +4535,19 @@ void hal_btcoex_set_rfe_type(u8 type)
 {
 	EXhalbtcoutsrc_set_rfe_type(type);
 }
+
+#ifdef CONFIG_RF4CE_COEXIST
+void hal_btcoex_set_rf4ce_link_state(u8 state)
+{
+	EXhalbtcoutsrc_set_rf4ce_link_state(state);
+}
+
+u8 hal_btcoex_get_rf4ce_link_state(void)
+{
+	return EXhalbtcoutsrc_get_rf4ce_link_state();
+}
+#endif /* CONFIG_RF4CE_COEXIST */
+
 void hal_btcoex_switchband_notify(u8 under_scan, u8 band_type)
 {
 	switch (band_type) {
diff --git a/rtl8822BU/hal/hal_btcoex_wifionly.c b/rtl8822BU/hal/hal_btcoex_wifionly.c
index b4041f0..1abfeb0 100755..100644
--- a/rtl8822BU/hal/hal_btcoex_wifionly.c
+++ b/rtl8822BU/hal/hal_btcoex_wifionly.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #include "btc/mp_precomp.h"
 #include <hal_btcoex_wifionly.h>
 
@@ -97,6 +111,8 @@ void hal_btcoex_wifionly_switchband_notify(PADAPTER padapter)
 
 	if (IS_HARDWARE_TYPE_8822B(padapter))
 		ex_hal8822b_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g);
+	else if (IS_HARDWARE_TYPE_8821C(padapter))
+		ex_hal8821c_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g);
 }
 
 void hal_btcoex_wifionly_scan_notify(PADAPTER padapter)
@@ -109,6 +125,8 @@ void hal_btcoex_wifionly_scan_notify(PADAPTER padapter)
 
 	if (IS_HARDWARE_TYPE_8822B(padapter))
 		ex_hal8822b_wifi_only_scannotify(&GLBtCoexistWifiOnly, is_5g);
+	else if (IS_HARDWARE_TYPE_8821C(padapter))
+		ex_hal8821c_wifi_only_scannotify(&GLBtCoexistWifiOnly, is_5g);
 }
 
 void hal_btcoex_wifionly_hw_config(PADAPTER padapter)
@@ -119,6 +137,8 @@ void hal_btcoex_wifionly_hw_config(PADAPTER padapter)
 		ex_hal8723b_wifi_only_hw_config(pwifionlycfg);
 	else if (IS_HARDWARE_TYPE_8822B(padapter))
 		ex_hal8822b_wifi_only_hw_config(pwifionlycfg);
+	else if (IS_HARDWARE_TYPE_8821C(padapter))
+		ex_hal8821c_wifi_only_hw_config(pwifionlycfg);
 }
 
 void hal_btcoex_wifionly_initlizevariables(PADAPTER padapter)
@@ -144,5 +164,7 @@ void hal_btcoex_wifionly_initlizevariables(PADAPTER padapter)
 	pwifionly_haldata->customer_id = CUSTOMER_NORMAL;
 	pwifionly_haldata->efuse_pg_antnum = pHalData->EEPROMBluetoothAntNum;
 	pwifionly_haldata->efuse_pg_antpath = pHalData->ant_path;
+	pwifionly_haldata->rfe_type = pHalData->rfe_type;
+	pwifionly_haldata->ant_div_cfg = pHalData->AntDivCfg;
 }
 
diff --git a/rtl8822BU/hal/hal_com.c b/rtl8822BU/hal/hal_com.c
index 91c9c35..0af0ebc 100755..100644
--- a/rtl8822BU/hal/hal_com.c
+++ b/rtl8822BU/hal/hal_com.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _HAL_COM_C_
 
 #include <drv_types.h>
@@ -28,6 +23,20 @@
 #include "../../hal/hal_halmac.h"
 #endif
 
+void rtw_dump_fw_info(void *sel, _adapter *adapter)
+{
+	HAL_DATA_TYPE	*hal_data = NULL;
+
+	if (!adapter)
+		return;
+
+	hal_data = GET_HAL_DATA(adapter);
+	if (hal_data->bFWReady)
+		RTW_PRINT_SEL(sel, "FW VER -%d.%d\n", hal_data->firmware_version, hal_data->firmware_sub_version);
+	else
+		RTW_PRINT_SEL(sel, "FW not ready\n");
+}
+
 /* #define CONFIG_GTK_OL_DBG */
 
 /*#define DBG_SEC_CAM_MOVE*/
@@ -219,11 +228,8 @@ void rtw_hal_config_rftype(PADAPTER  padapter)
  *	def_chplan		channel plan used when HW/SW both invalid
  *	AutoLoadFail		efuse autoload fail or not
  *
- * Return:
- *	Final channel plan decision
- *
  */
-u8 hal_com_config_channel_plan(
+void hal_com_config_channel_plan(
 	IN	PADAPTER padapter,
 	IN	char *hw_alpha2,
 	IN	u8 hw_chplan,
@@ -233,6 +239,7 @@ u8 hal_com_config_channel_plan(
 	IN	BOOLEAN AutoLoadFail
 )
 {
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 	PHAL_DATA_TYPE	pHalData;
 	u8 force_hw_chplan = _FALSE;
 	int chplan = -1;
@@ -306,10 +313,9 @@ done:
 	} else
 		RTW_PRINT("%s chplan:0x%02X\n", __func__, chplan);
 
-	padapter->mlmepriv.country_ent = country_ent;
+	rfctl->country_ent = country_ent;
+	rfctl->ChannelPlan = chplan;
 	pHalData->bDisableSWChannelPlan = force_hw_chplan;
-
-	return chplan;
 }
 
 BOOLEAN
@@ -1104,6 +1110,12 @@ Hal_MappingOutPipe(
 
 }
 
+void rtw_hal_reqtxrpt(_adapter *padapter, u8 macid)
+{
+	if (padapter->hal_func.reqtxrpt)
+		padapter->hal_func.reqtxrpt(padapter, macid);
+}
+
 void rtw_hal_dump_macaddr(void *sel, _adapter *adapter)
 {
 	int i;
@@ -1155,6 +1167,12 @@ void rtw_init_hal_com_default_value(PADAPTER Adapter)
 	pHalData->AntDetection = 1;
 	pHalData->antenna_test = _FALSE;
 	pHalData->u1ForcedIgiLb = regsty->force_igi_lb;
+	pHalData->RegIQKFWOffload = regsty->iqk_fw_offload;
+
+#ifdef	CONFIG_CHNL_LOAD_MAGT
+	if (!pHalData->clm_period)
+		pHalData->clm_period = (SURVEY_TO - 5)*1000/4; /* CLM_period ; 4us per unit */
+#endif
 }
 
 #ifdef CONFIG_FW_C2H_REG
@@ -1330,7 +1348,6 @@ int c2h_iqk_offload_wait(_adapter *adapter, u32 timeout_ms)
 #define	GET_C2H_MAC_HIDDEN_RPT_WL_FUNC(_data)			LE_BITS_TO_1BYTE(((u8 *)(_data)) + 5, 0, 4)
 #define	GET_C2H_MAC_HIDDEN_RPT_HW_STYPE(_data)			LE_BITS_TO_1BYTE(((u8 *)(_data)) + 5, 4, 4)
 #define	GET_C2H_MAC_HIDDEN_RPT_BW(_data)				LE_BITS_TO_1BYTE(((u8 *)(_data)) + 6, 0, 3)
-#define	GET_C2H_MAC_HIDDEN_RPT_FAB(_data)				LE_BITS_TO_1BYTE(((u8 *)(_data)) + 6, 3, 2)
 #define	GET_C2H_MAC_HIDDEN_RPT_ANT_NUM(_data)			LE_BITS_TO_1BYTE(((u8 *)(_data)) + 6, 5, 3)
 #define	GET_C2H_MAC_HIDDEN_RPT_80211_PROTOCOL(_data)	LE_BITS_TO_1BYTE(((u8 *)(_data)) + 7, 2, 2)
 #define	GET_C2H_MAC_HIDDEN_RPT_NIC_ROUTER(_data)		LE_BITS_TO_1BYTE(((u8 *)(_data)) + 7, 6, 2)
@@ -1358,7 +1375,6 @@ int c2h_mac_hidden_rpt_hdl(_adapter *adapter, u8 *data, u8 len)
 	u8 wl_func;
 	u8 hw_stype;
 	u8 bw;
-	u8 fab;
 	u8 ant_num;
 	u8 protocol;
 	u8 nic;
@@ -1384,7 +1400,6 @@ int c2h_mac_hidden_rpt_hdl(_adapter *adapter, u8 *data, u8 len)
 	hw_stype = GET_C2H_MAC_HIDDEN_RPT_HW_STYPE(data);
 
 	bw = GET_C2H_MAC_HIDDEN_RPT_BW(data);
-	fab = GET_C2H_MAC_HIDDEN_RPT_FAB(data);
 	ant_num = GET_C2H_MAC_HIDDEN_RPT_ANT_NUM(data);
 
 	protocol = GET_C2H_MAC_HIDDEN_RPT_80211_PROTOCOL(data);
@@ -1401,7 +1416,6 @@ int c2h_mac_hidden_rpt_hdl(_adapter *adapter, u8 *data, u8 len)
 		RTW_PRINT("wl_func:0x%x\n", wl_func);
 		RTW_PRINT("hw_stype:0x%x\n", hw_stype);
 		RTW_PRINT("bw:0x%x\n", bw);
-		RTW_PRINT("fab:0x%x\n", fab);
 		RTW_PRINT("ant_num:0x%x\n", ant_num);
 		RTW_PRINT("protocol:0x%x\n", protocol);
 		RTW_PRINT("nic:0x%x\n", nic);
@@ -1416,12 +1430,12 @@ int c2h_mac_hidden_rpt_hdl(_adapter *adapter, u8 *data, u8 len)
 	hal_data->PackageType = package_type;
 	hal_spec->wl_func &= mac_hidden_wl_func_to_hal_wl_func(wl_func);
 	hal_spec->bw_cap &= mac_hidden_max_bw_to_hal_bw_cap(bw);
-	hal_spec->nss_num = rtw_min(hal_spec->nss_num, ant_num);
+	hal_spec->tx_nss_num = rtw_min(hal_spec->tx_nss_num, ant_num);
+	hal_spec->rx_nss_num = rtw_min(hal_spec->rx_nss_num, ant_num);
 	hal_spec->proto_cap &= mac_hidden_proto_to_hal_proto_cap(protocol);
 	hal_spec->hci_type = hci_type;
 
 	/* TODO: tr_switch */
-	/* TODO: fab */
 
 	ret = _SUCCESS;
 
@@ -1803,7 +1817,8 @@ u8 rtw_get_mgntframe_raid(_adapter *adapter, unsigned char network_type)
 
 void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta)
 {
-	u8	i, rf_type, limit;
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
+	u8 i, rf_type, tx_nss;
 	u64	tx_ra_bitmap;
 
 	if (psta == NULL)
@@ -1818,43 +1833,29 @@ void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta)
 	}
 
 #ifdef CONFIG_80211N_HT
+	rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+	tx_nss = rtw_min(rf_type_to_rf_tx_cnt(rf_type), hal_spec->tx_nss_num);
 #ifdef CONFIG_80211AC_VHT
-	/* AC mode ra_bitmap */
-	if (psta->vhtpriv.vht_option)
-		tx_ra_bitmap |= (rtw_vht_rate_to_bitmap(psta->vhtpriv.vht_mcs_map) << 12);
-	else
+	if (psta->vhtpriv.vht_option) {
+		/* AC mode ra_bitmap */
+		tx_ra_bitmap |= (rtw_vht_mcs_map_to_bitmap(psta->vhtpriv.vht_mcs_map, tx_nss) << 12);
+	} else
 #endif /* CONFIG_80211AC_VHT */
-	{
+	if (psta->htpriv.ht_option) {
 		/* n mode ra_bitmap */
-		if (psta->htpriv.ht_option) {
-			rf_type = RF_1T1R;
-			rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
-			if (rf_type == RF_2T2R)
-				limit = 16; /* 2R */
-			else if (rf_type == RF_3T3R)
-				limit = 24; /* 3R */
-			else
-				limit = 8; /* 1R */
 
-
-			/* Handling SMPS mode for AP MODE only*/
-			if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) {
-				/*0:static SMPS, 1:dynamic SMPS, 3:SMPS disabled, 2:reserved*/
-				if (psta->htpriv.smps_cap == 0 || psta->htpriv.smps_cap == 1) {
-					/*operate with only one active receive chain // 11n-MCS rate <= MSC7*/
-					limit = 8;/*  1R*/
-				}
-			}
-
-			for (i = 0; i < limit; i++) {
-				if (psta->htpriv.ht_cap.supp_mcs_set[i / 8] & BIT(i % 8))
-					tx_ra_bitmap |= BIT(i + 12);
+		/* Handling SMPS mode for AP MODE only*/
+		if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) {
+			/*0:static SMPS, 1:dynamic SMPS, 3:SMPS disabled, 2:reserved*/
+			if (psta->htpriv.smps_cap == 0 || psta->htpriv.smps_cap == 1) {
+				/*operate with only one active receive chain // 11n-MCS rate <= MSC7*/
+				tx_nss = rtw_min(tx_nss, 1);
 			}
 		}
+
+		tx_ra_bitmap |= (rtw_ht_mcs_set_to_bitmap(psta->htpriv.ht_cap.supp_mcs_set, tx_nss) << 12);
 	}
 #endif /* CONFIG_80211N_HT */
-	RTW_INFO("supp_mcs_set = %02x, %02x, %02x, rf_type=%d, tx_ra_bitmap=%016llx\n"
-		, psta->htpriv.ht_cap.supp_mcs_set[0], psta->htpriv.ht_cap.supp_mcs_set[1], psta->htpriv.ht_cap.supp_mcs_set[2], rf_type, tx_ra_bitmap);
 	psta->ra_mask = tx_ra_bitmap;
 	psta->init_rate = get_highest_rate_idx(tx_ra_bitmap) & 0x3f;
 }
@@ -2919,6 +2920,187 @@ const char *const _h2c_msr_role_str[] = {
 	"INVALID",
 };
 
+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+s32 rtw_hal_set_default_port_id_cmd(_adapter *adapter, u8 mac_id)
+{
+	s32 ret = _SUCCESS;
+	u8 parm[H2C_DEFAULT_PORT_ID_LEN] = {0};
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+
+	SET_H2CCMD_DFTPID_PORT_ID(parm, adapter->hw_port);
+	SET_H2CCMD_DFTPID_MAC_ID(parm, mac_id);
+
+	RTW_DBG_DUMP("DFT port id parm:", parm, H2C_DEFAULT_PORT_ID_LEN);
+	RTW_INFO("%s port_id :%d, mad_id:%d\n", __func__, adapter->hw_port, mac_id);
+
+	ret = rtw_hal_fill_h2c_cmd(adapter, H2C_DEFAULT_PORT_ID, H2C_DEFAULT_PORT_ID_LEN, parm);
+	dvobj->default_port_id = adapter->hw_port;
+
+	return ret;
+}
+s32 rtw_set_default_port_id(_adapter *adapter)
+{
+	s32 ret = _SUCCESS;
+	struct sta_info		*psta;
+	struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+
+	if (adapter->hw_port == dvobj->default_port_id)
+		return ret;
+
+	if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) {
+		psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(pmlmepriv));
+		if (psta)
+			ret = rtw_hal_set_default_port_id_cmd(adapter, psta->mac_id);
+	} else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) {
+
+	} else {
+	}
+
+	return ret;
+}
+s32 rtw_set_ps_rsvd_page(_adapter *adapter)
+{
+	s32 ret = _SUCCESS;
+	u16 media_status_rpt = RT_MEDIA_CONNECT;
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+
+	if (adapter->hw_port == dvobj->default_port_id)
+		return ret;
+
+	rtw_hal_set_hwreg(adapter, HW_VAR_H2C_FW_JOINBSSRPT,
+			  (u8 *)&media_status_rpt);
+
+	return ret;
+}
+
+#endif
+
+#ifdef CONFIG_P2P_PS
+#ifdef RTW_HALMAC
+void rtw_set_p2p_ps_offload_cmd(_adapter *adapter, u8 p2p_ps_state)
+{
+	PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
+	struct wifidirect_info *pwdinfo = &adapter->wdinfo;
+	struct mlme_ext_priv	*pmlmeext = &adapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	WLAN_BSSID_EX		*cur_network = &(pmlmeinfo->network);
+	struct sta_priv		*pstapriv = &adapter->stapriv;
+	struct sta_info		*psta;
+	HAL_P2P_PS_PARA p2p_ps_para;
+	int status = -1;
+	u8 i;
+
+	_rtw_memset(&p2p_ps_para, 0, sizeof(HAL_P2P_PS_PARA));
+	_rtw_memcpy((&p2p_ps_para), &hal->p2p_ps_offload, sizeof(hal->p2p_ps_offload));
+
+	(&p2p_ps_para)->p2p_port_id = adapter->hw_port;
+	(&p2p_ps_para)->p2p_group = 0;
+	psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress);
+	if (psta) {
+		(&p2p_ps_para)->p2p_macid = psta->mac_id;
+	} else {
+		if (p2p_ps_state != P2P_PS_DISABLE) {
+			RTW_ERR("%s , psta was NULL\n", __func__);
+			return;
+		}
+	}
+
+
+	switch (p2p_ps_state) {
+	case P2P_PS_DISABLE:
+		RTW_INFO("P2P_PS_DISABLE\n");
+		_rtw_memset(&p2p_ps_para, 0, sizeof(HAL_P2P_PS_PARA));
+		break;
+
+	case P2P_PS_ENABLE:
+		RTW_INFO("P2P_PS_ENABLE\n");
+		/* update CTWindow value. */
+		if (pwdinfo->ctwindow > 0) {
+			(&p2p_ps_para)->ctwindow_en = 1;
+			(&p2p_ps_para)->ctwindow_length = pwdinfo->ctwindow;
+			/*RTW_INFO("%s , ctwindow_length = %d\n" , __func__ , (&p2p_ps_para)->ctwindow_length);*/
+		}
+
+
+		if ((pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0)) {
+			(&p2p_ps_para)->offload_en = 1;
+			if (pwdinfo->role == P2P_ROLE_GO) {
+				(&p2p_ps_para)->role = 1;
+				(&p2p_ps_para)->all_sta_sleep = 0;
+			} else
+				(&p2p_ps_para)->role = 0;
+
+			(&p2p_ps_para)->discovery = 0;
+		}
+		/* hw only support 2 set of NoA */
+		for (i = 0; i < pwdinfo->noa_num; i++) {
+			/* To control the register setting for which NOA */
+			(&p2p_ps_para)->noa_sel = i;
+			(&p2p_ps_para)->noa_en = 1;
+			/* config P2P NoA Descriptor Register */
+			/* config NOA duration */
+			(&p2p_ps_para)->noa_duration_para = pwdinfo->noa_duration[i];
+			/* config NOA interval */
+			(&p2p_ps_para)->noa_interval_para = pwdinfo->noa_interval[i];
+			/* config NOA start time */
+			(&p2p_ps_para)->noa_start_time_para = pwdinfo->noa_start_time[i];
+			/* config NOA count */
+			(&p2p_ps_para)->noa_count_para = pwdinfo->noa_count[i];
+			/*RTW_INFO("%s , noa_duration_para = %d , noa_interval_para = %d , noa_start_time_para = %d , noa_count_para = %d\n" , __func__ ,
+				(&p2p_ps_para)->noa_duration_para , (&p2p_ps_para)->noa_interval_para ,
+				(&p2p_ps_para)->noa_start_time_para , (&p2p_ps_para)->noa_count_para);*/
+			status = rtw_halmac_p2pps(adapter_to_dvobj(adapter), (&p2p_ps_para));
+			if (status == -1)
+				RTW_ERR("%s , rtw_halmac_p2pps fail\n", __func__);
+		}
+
+		break;
+
+	case P2P_PS_SCAN:
+		/*This feature FW not ready 20161116 YiWei*/
+		return;
+		RTW_INFO("P2P_PS_SCAN\n");
+		(&p2p_ps_para)->discovery = 1;
+		/*
+		(&p2p_ps_para)->ctwindow_length = pwdinfo->ctwindow;
+		(&p2p_ps_para)->noa_duration_para = pwdinfo->noa_duration[0];
+		(&p2p_ps_para)->noa_interval_para = pwdinfo->noa_interval[0];
+		(&p2p_ps_para)->noa_start_time_para = pwdinfo->noa_start_time[0];
+		(&p2p_ps_para)->noa_count_para = pwdinfo->noa_count[0];
+		*/
+		break;
+
+	case P2P_PS_SCAN_DONE:
+		/*This feature FW not ready 20161116 YiWei*/
+		return;
+		RTW_INFO("P2P_PS_SCAN_DONE\n");
+		(&p2p_ps_para)->discovery = 0;
+		/*
+		pwdinfo->p2p_ps_state = P2P_PS_ENABLE;
+		(&p2p_ps_para)->ctwindow_length = pwdinfo->ctwindow;
+		(&p2p_ps_para)->noa_duration_para = pwdinfo->noa_duration[0];
+		(&p2p_ps_para)->noa_interval_para = pwdinfo->noa_interval[0];
+		(&p2p_ps_para)->noa_start_time_para = pwdinfo->noa_start_time[0];
+		(&p2p_ps_para)->noa_count_para = pwdinfo->noa_count[0];
+		*/
+		break;
+
+	default:
+		break;
+	}
+
+	if (p2p_ps_state != P2P_PS_ENABLE || (&p2p_ps_para)->noa_en == 0) {
+		status = rtw_halmac_p2pps(adapter_to_dvobj(adapter), (&p2p_ps_para));
+		if (status == -1)
+			RTW_ERR("%s , rtw_halmac_p2pps fail\n", __func__);
+	}
+	_rtw_memcpy(&hal->p2p_ps_offload, (&p2p_ps_para), sizeof(hal->p2p_ps_offload));
+
+}
+#endif /* RTW_HALMAC */
+#endif /* CONFIG_P2P */
+
 /*
 * rtw_hal_set_FwMediaStatusRpt_cmd -
 *
@@ -2945,30 +3127,15 @@ s32 rtw_hal_set_FwMediaStatusRpt_cmd(_adapter *adapter, bool opmode, bool miraca
 	SET_H2CCMD_MSRRPT_PARM_ROLE(parm, role);
 	SET_H2CCMD_MSRRPT_PARM_MACID(parm, macid);
 	SET_H2CCMD_MSRRPT_PARM_MACID_END(parm, macid_end);
-
-	RTW_DBG_DUMP("MediaStatusRpt parm:", parm, H2C_MEDIA_STATUS_RPT_LEN);
-
-#ifdef CONFIG_DFS_MASTER
-	/* workaround for TXPAUSE cleared issue by FW's MediaStatusRpt handling */
-	if (macid_ind == 0 && macid == 1) {
-		u8 parm0_bak = parm[0];
-
-		SET_H2CCMD_MSRRPT_PARM_MACID_IND(&parm0_bak, 0);
-		if (macid_ctl->h2c_msr[macid] == parm0_bak) {
-			ret = _SUCCESS;
-			goto post_action;
-		}
-	}
+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+	SET_H2CCMD_MSRRPT_PARM_PORT_NUM(parm, adapter->hw_port);
 #endif
+	RTW_DBG_DUMP("MediaStatusRpt parm:", parm, H2C_MEDIA_STATUS_RPT_LEN);
 
 	ret = rtw_hal_fill_h2c_cmd(adapter, H2C_MEDIA_STATUS_RPT, H2C_MEDIA_STATUS_RPT_LEN, parm);
 	if (ret != _SUCCESS)
 		goto exit;
 
-#ifdef CONFIG_DFS_MASTER
-post_action:
-#endif
-
 #if defined(CONFIG_RTL8188E)
 	if (rtw_get_chip_type(adapter) == RTL8188E) {
 		HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
@@ -3136,16 +3303,21 @@ void rtw_hal_set_FwAoacRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc
 #ifdef CONFIG_WOWLAN
 	u8 u1H2CAoacRsvdPageParm[H2C_AOAC_RSVDPAGE_LOC_LEN] = {0};
 
-	RTW_INFO("AOACRsvdPageLoc: RWC=%d ArpRsp=%d NbrAdv=%d GtkRsp=%d GtkInfo=%d ProbeReq=%d NetworkList=%d\n",
-		 rsvdpageloc->LocRemoteCtrlInfo, rsvdpageloc->LocArpRsp,
-		 rsvdpageloc->LocNbrAdv, rsvdpageloc->LocGTKRsp,
-		 rsvdpageloc->LocGTKInfo, rsvdpageloc->LocProbeReq,
-		 rsvdpageloc->LocNetList);
+	RTW_INFO("%s: RWC: %d ArpRsp: %d NbrAdv: %d LocNDPInfo: %d\n",
+		 __func__, rsvdpageloc->LocRemoteCtrlInfo,
+		 rsvdpageloc->LocArpRsp, rsvdpageloc->LocNbrAdv,
+		 rsvdpageloc->LocNDPInfo);
+	RTW_INFO("%s:GtkRsp: %d GtkInfo: %d ProbeReq: %d NetworkList: %d\n",
+		 __func__, rsvdpageloc->LocGTKRsp, rsvdpageloc->LocGTKInfo,
+		 rsvdpageloc->LocProbeReq, rsvdpageloc->LocNetList);
 
 	if (check_fwstate(pmlmepriv, _FW_LINKED)) {
 		SET_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocRemoteCtrlInfo);
 		SET_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(u1H2CAoacRsvdPageParm, rsvdpageloc->LocArpRsp);
-		/* SET_H2CCMD_AOAC_RSVDPAGE_LOC_NEIGHBOR_ADV(u1H2CAoacRsvdPageParm, rsvdpageloc->LocNbrAdv); */
+		SET_H2CCMD_AOAC_RSVDPAGE_LOC_NEIGHBOR_ADV(u1H2CAoacRsvdPageParm,
+							rsvdpageloc->LocNbrAdv);
+		SET_H2CCMD_AOAC_RSVDPAGE_LOC_NDP_INFO(u1H2CAoacRsvdPageParm,
+						      rsvdpageloc->LocNDPInfo);
 #ifdef CONFIG_GTK_OL
 		SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_RSP(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKRsp);
 		SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKInfo);
@@ -3240,6 +3412,70 @@ int rtw_hal_get_rsvd_page(_adapter *adapter, u32 page_offset,
 	return rst;
 }
 
+void rtw_dump_rsvd_page(void *sel, _adapter *adapter, u8 page_offset, u8 page_num)
+{
+	u32 page_size = 0;
+	u8 *buffer = NULL;
+	u32 buf_size = 0;
+
+	if (page_num == 0)
+		return;
+
+	RTW_PRINT_SEL(sel, "======= RSVG PAGE DUMP =======\n");
+	RTW_PRINT_SEL(sel, "page_offset:%d, page_num:%d\n", page_offset, page_num);
+
+	rtw_hal_get_def_var(adapter, HAL_DEF_TX_PAGE_SIZE, &page_size);
+	if (page_size) {
+		buf_size = page_size * page_num;
+		buffer = rtw_zvmalloc(buf_size);
+
+		if (buffer) {
+			rtw_hal_get_rsvd_page(adapter, page_offset, page_num, buffer, buf_size);
+			_RTW_DUMP_SEL(sel, buffer, buf_size);
+			rtw_vmfree(buffer, buf_size);
+		} else
+			RTW_PRINT_SEL(sel, "ERROR - rsvd_buf mem allocate failed\n");
+	} else
+			RTW_PRINT_SEL(sel, "ERROR - Tx page size is zero ??\n");
+
+	RTW_PRINT_SEL(sel, "==========================\n");
+}
+
+#ifdef CONFIG_SUPPORT_FIFO_DUMP
+void rtw_dump_fifo(void *sel, _adapter *adapter, u8 fifo_sel, u32 fifo_addr, u32 fifo_size)
+{
+	u8 *buffer = NULL;
+	u8 buff_size = 0;
+	static const char * const fifo_sel_str[] = {
+		"TX", "RX", "RSVD_PAGE", "REPORT", "LLT", "RXBUF_FW"
+	};
+
+	if (fifo_sel > 5) {
+		RTW_ERR("fifo_sel:%d invalid\n", fifo_sel);
+		return;
+	}
+
+	RTW_PRINT_SEL(sel, "========= FIFO DUMP =========\n");
+	RTW_PRINT_SEL(sel, "%s FIFO DUMP [start_addr:0x%04x , size:%d]\n", fifo_sel_str[fifo_sel], fifo_addr, fifo_size);
+
+	if (fifo_size) {
+		buff_size = RND4(fifo_size);
+		buffer = rtw_zvmalloc(buff_size);
+		if (buffer == NULL)
+			buff_size = 0;
+	}
+
+	rtw_halmac_dump_fifo(adapter_to_dvobj(adapter), fifo_sel, fifo_addr, buff_size, buffer);
+
+	if (buffer) {
+		_RTW_DUMP_SEL(sel, buffer, fifo_size);
+		rtw_vmfree(buffer, buff_size);
+	}
+
+	RTW_PRINT_SEL(sel, "==========================\n");
+}
+#endif
+
 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
 static void rtw_hal_force_enable_rxdma(_adapter *adapter)
 {
@@ -3378,44 +3614,88 @@ static u8 rtw_hal_enable_cpwm2(_adapter *adapter)
 #ifdef CONFIG_WOWLAN
 /*
  * rtw_hal_check_wow_ctrl
- * chk_type: _TRUE means to check enable, if 0x690 & bit1, WOW enable successful
- *		     _FALSE means to check disable, if 0x690 & bit1, WOW disable fail
+ * chk_type: _TRUE means to check enable, if 0x690 & bit1 (for 8051), WOW enable successful.
+ *									If 0x1C7 == 0 (for 3081), WOW enable successful.
+ *		     _FALSE means to check disable, if 0x690 & bit1 (for 8051), WOW disable fail.
+ *									If 0x120 & bit16 || 0x284 & bit18 (for 3081), WOW disable fail.
  */
 static u8 rtw_hal_check_wow_ctrl(_adapter *adapter, u8 chk_type)
 {
+	u32 fe1_imr = 0xFF, rxpkt_num = 0xFF;
 	u8 mstatus = 0;
+	u8 reason = 0xFF;
 	u8 trycnt = 25;
 	u8 res = _FALSE;
 
-	mstatus = rtw_read8(adapter, REG_WOW_CTRL);
-	RTW_INFO("%s mstatus:0x%02x\n", __func__, mstatus);
+	if (IS_HARDWARE_TYPE_JAGUAR2(adapter)) {
+		if (chk_type) {
+			reason = rtw_read8(adapter, REG_WOWLAN_WAKE_REASON);
+			RTW_INFO("%s reason:0x%02x\n", __func__, reason);
+
+			while (reason && trycnt > 1) {
+				reason = rtw_read8(adapter, REG_WOWLAN_WAKE_REASON);
+				RTW_PRINT("Loop index: %d :0x%02x\n",
+					  trycnt, reason);
+				trycnt--;
+				rtw_msleep_os(20);
+			}
+			if (!reason)
+				res = _TRUE;
+			else
+				res = _FALSE;
+		} else {
+			/* Wait FW to cleare 0x120 bit16, 0x284 bit18 to 0 */
+			fe1_imr = rtw_read32(adapter, REG_FE1IMR); /* RxDone IMR for 3081 */
+			rxpkt_num = rtw_read32(adapter, REG_RXPKT_NUM); /* Release RXDMA */
+			RTW_PRINT("%s REG_FE1IMR (reg120): 0x%x, REG_RXPKT_NUM(reg284): 0x%x\n", __func__, fe1_imr, rxpkt_num);
+
+			while (((fe1_imr & BIT_FS_RXDONE_INT_EN) || (rxpkt_num & BIT_RW_RELEASE_EN)) && trycnt > 1) {
+				fe1_imr = rtw_read32(adapter, REG_FE1IMR);
+				rxpkt_num = rtw_read32(adapter, REG_RXPKT_NUM);
+				RTW_PRINT("Loop index: %d :0x%x, 0x%x\n",
+					  trycnt, fe1_imr, rxpkt_num);
+				trycnt--;
+				rtw_msleep_os(20);
+			}
 
-	if (chk_type) {
-		while (!(mstatus & BIT1) && trycnt > 1) {
-			mstatus = rtw_read8(adapter, REG_WOW_CTRL);
-			RTW_PRINT("Loop index: %d :0x%02x\n",
-				  trycnt, mstatus);
-			trycnt--;
-			rtw_msleep_os(20);
+			if ((fe1_imr & BIT_FS_RXDONE_INT_EN) || (rxpkt_num & BIT_RW_RELEASE_EN))
+				res = _FALSE;
+			else
+				res = _TRUE;
 		}
-		if (mstatus & BIT1)
-			res = _TRUE;
-		else
-			res = _FALSE;
 	} else {
-		while (mstatus & BIT1 && trycnt > 1) {
-			mstatus = rtw_read8(adapter, REG_WOW_CTRL);
-			RTW_PRINT("Loop index: %d :0x%02x\n",
-				  trycnt, mstatus);
-			trycnt--;
-			rtw_msleep_os(20);
-		}
+		mstatus = rtw_read8(adapter, REG_WOW_CTRL);
+		RTW_INFO("%s mstatus:0x%02x\n", __func__, mstatus);
 
-		if (mstatus & BIT1)
-			res = _FALSE;
-		else
-			res = _TRUE;
+
+		if (chk_type) {
+			while (!(mstatus & BIT1) && trycnt > 1) {
+				mstatus = rtw_read8(adapter, REG_WOW_CTRL);
+				RTW_PRINT("Loop index: %d :0x%02x\n",
+					  trycnt, mstatus);
+				trycnt--;
+				rtw_msleep_os(20);
+			}
+			if (mstatus & BIT1)
+				res = _TRUE;
+			else
+				res = _FALSE;
+		} else {
+			while (mstatus & BIT1 && trycnt > 1) {
+				mstatus = rtw_read8(adapter, REG_WOW_CTRL);
+				RTW_PRINT("Loop index: %d :0x%02x\n",
+					  trycnt, mstatus);
+				trycnt--;
+				rtw_msleep_os(20);
+			}
+
+			if (mstatus & BIT1)
+				res = _FALSE;
+			else
+				res = _TRUE;
+		}
 	}
+
 	RTW_PRINT("%s check_type: %d res: %d trycnt: %d\n",
 		  __func__, chk_type, res, (25 - trycnt));
 	return res;
@@ -3694,12 +3974,16 @@ static u8 rtw_hal_set_keep_alive_cmd(_adapter *adapter, u8 enable, u8 pkt_type)
 	u8 adopt = 1, check_period = 5;
 	u8 ret = _FAIL;
 
-	RTW_INFO("%s(): enable = %d\n", __func__, enable);
 	SET_H2CCMD_KEEPALIVE_PARM_ENABLE(u1H2CKeepAliveParm, enable);
 	SET_H2CCMD_KEEPALIVE_PARM_ADOPT(u1H2CKeepAliveParm, adopt);
 	SET_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(u1H2CKeepAliveParm, pkt_type);
 	SET_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(u1H2CKeepAliveParm, check_period);
-
+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+	SET_H2CCMD_KEEPALIVE_PARM_PORT_NUM(u1H2CKeepAliveParm, adapter->hw_port);
+	RTW_INFO("%s(): enable = %d, port = %d\n", __func__, enable, adapter->hw_port);
+#else
+	RTW_INFO("%s(): enable = %d\n", __func__, enable);
+#endif
 	ret = rtw_hal_fill_h2c_cmd(adapter,
 				   H2C_KEEP_ALIVE,
 				   H2C_KEEP_ALIVE_CTRL_LEN,
@@ -3712,14 +3996,19 @@ static u8 rtw_hal_set_disconnect_decision_cmd(_adapter *adapter, u8 enable)
 {
 	struct hal_ops *pHalFunc = &adapter->hal_func;
 	u8 u1H2CDisconDecisionParm[H2C_DISCON_DECISION_LEN] = {0};
-	u8 adopt = 1, check_period = 10, trypkt_num = 0;
+	u8 adopt = 1, check_period = 30, trypkt_num = 5;
 	u8 ret = _FAIL;
 
-	RTW_INFO("%s(): enable = %d\n", __func__, enable);
 	SET_H2CCMD_DISCONDECISION_PARM_ENABLE(u1H2CDisconDecisionParm, enable);
 	SET_H2CCMD_DISCONDECISION_PARM_ADOPT(u1H2CDisconDecisionParm, adopt);
 	SET_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(u1H2CDisconDecisionParm, check_period);
 	SET_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(u1H2CDisconDecisionParm, trypkt_num);
+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+	SET_H2CCMD_DISCONDECISION_PORT_NUM(u1H2CDisconDecisionParm, adapter->hw_port);
+	RTW_INFO("%s(): enable = %d, port = %d\n", __func__, enable, adapter->hw_port);
+#else
+	RTW_INFO("%s(): enable = %d\n", __func__, enable);
+#endif
 
 	ret = rtw_hal_fill_h2c_cmd(adapter,
 				   H2C_DISCON_DECISION,
@@ -3752,10 +4041,12 @@ static u8 rtw_hal_set_wowlan_ctrl_cmd(_adapter *adapter, u8 enable, u8 change_un
 	if (!ppwrpriv->wowlan_pno_enable)
 		magic_pkt = enable;
 
+#ifndef CONFIG_DEFAULT_PATTERNS_EN
 	if (psecpriv->dot11PrivacyAlgrthm == _WEP40_ || psecpriv->dot11PrivacyAlgrthm == _WEP104_)
 		hw_unicast = 1;
 	else
 		hw_unicast = 0;
+#endif
 
 	RTW_INFO("%s(): enable=%d change_unit=%d\n", __func__,
 		 enable, change_unit);
@@ -3782,8 +4073,8 @@ static u8 rtw_hal_set_wowlan_ctrl_cmd(_adapter *adapter, u8 enable, u8 change_un
 	SET_H2CCMD_WOWLAN_GPIO_ACTIVE(u1H2CWoWlanCtrlParm, gpio_high_active);
 
 #ifdef CONFIG_GTK_OL
-	/* GTK rekey only for AES, if GTK rekey is TKIP, then wake up*/
-	if (psecpriv->binstallKCK_KEK == _TRUE)
+	if (psecpriv->binstallKCK_KEK == _TRUE &&
+	    psecpriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK)
 		SET_H2CCMD_WOWLAN_REKEY_WAKE_UP(u1H2CWoWlanCtrlParm, 0);
 	else
 		SET_H2CCMD_WOWLAN_REKEY_WAKE_UP(u1H2CWoWlanCtrlParm, 1);
@@ -3824,7 +4115,8 @@ static u8 rtw_hal_set_remote_wake_ctrl_cmd(_adapter *adapter, u8 enable)
 		SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN(
 			u1H2CRemoteWakeCtrlParm, 1);
 #ifdef CONFIG_GTK_OL
-		if (psecuritypriv->binstallKCK_KEK == _TRUE) {
+		if (psecuritypriv->binstallKCK_KEK == _TRUE &&
+		    psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK) {
 			SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(
 				u1H2CRemoteWakeCtrlParm, 1);
 		} else {
@@ -3834,6 +4126,12 @@ static u8 rtw_hal_set_remote_wake_ctrl_cmd(_adapter *adapter, u8 enable)
 		}
 #endif /* CONFIG_GTK_OL */
 
+		if (ppwrpriv->wowlan_ns_offload_en == _TRUE) {
+			RTW_INFO("enable NS offload\n");
+			SET_H2CCMD_REMOTE_WAKE_CTRL_NDP_OFFLOAD_EN(
+				u1H2CRemoteWakeCtrlParm, enable);
+		}
+
 		if (pregistrypriv->default_patterns_en == _FALSE) {
 			SET_H2CCMD_REMOTE_WAKE_CTRL_FW_UNICAST_EN(
 				u1H2CRemoteWakeCtrlParm, enable);
@@ -3856,7 +4154,8 @@ static u8 rtw_hal_set_remote_wake_ctrl_cmd(_adapter *adapter, u8 enable)
 				u1H2CRemoteWakeCtrlParm, 1);
 		}
 
-		if (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_) {
+		if (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_ &&
+		    psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK) {
 			SET_H2CCMD_REMOTE_WAKE_CTRL_TKIP_OFFLOAD_EN(
 					u1H2CRemoteWakeCtrlParm, enable);
 
@@ -4197,11 +4496,13 @@ static void rtw_hal_ap_wow_enable(_adapter *padapter)
 	rtw_write8(padapter, REG_MCUTST_WOWLAN, 0);
 #ifdef CONFIG_USB_HCI
 	rtw_mi_intf_stop(padapter);
+#endif
+#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
 	/* Invoid SE0 reset signal during suspending*/
 	rtw_write8(padapter, REG_RSV_CTRL, 0x20);
 	if (IS_8188F(pHalData->version_id) == FALSE)
 		rtw_write8(padapter, REG_RSV_CTRL, 0x60);
-#endif /*CONFIG_USB_HCI*/
+#endif
 }
 
 static void rtw_hal_ap_wow_disable(_adapter *padapter)
@@ -4570,17 +4871,6 @@ _issue_bcn:
 #endif
 }
 
-static int get_reg_classes_full_count(struct p2p_channels channel_list)
-{
-	int cnt = 0;
-	int i;
-
-	for (i = 0; i < channel_list.reg_classes; i++)
-		cnt += channel_list.reg_class[i].channels;
-
-	return cnt;
-}
-
 static void rtw_hal_construct_P2PProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength)
 {
 	/* struct xmit_frame			*pmgntframe; */
@@ -4904,6 +5194,7 @@ static void rtw_hal_construct_P2PProbeRsp(_adapter *padapter, u8 *pframe, u32 *p
 }
 static void rtw_hal_construct_P2PNegoRsp(_adapter *padapter, u8 *pframe, u32 *pLength)
 {
+	struct p2p_channels *ch_list = &(adapter_to_rfctl(padapter)->channel_list);
 	unsigned char category = RTW_WLAN_CATEGORY_PUBLIC;
 	u8			action = P2P_PUB_ACTION_ACTION;
 	u32			p2poui = cpu_to_be32(P2POUI);
@@ -5130,7 +5421,7 @@ static void rtw_hal_construct_P2PNegoRsp(_adapter *padapter, u8 *pframe, u32 *pL
 
 	/*	Intended P2P Interface Address	 */
 	/*	Type: */
-	p2pie[p2pielen++] = P2P_ATTR_INTENTED_IF_ADDR;
+	p2pie[p2pielen++] = P2P_ATTR_INTENDED_IF_ADDR;
 
 	/*	Length: */
 	*(u16 *)(p2pie + p2pielen) = cpu_to_le16(ETH_ALEN);
@@ -5148,8 +5439,8 @@ static void rtw_hal_construct_P2PNegoRsp(_adapter *padapter, u8 *pframe, u32 *pL
 	/* + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) */
 	/* + number of channels in all classes */
 	len_channellist_attr = 3
-		       + (1 + 1) * (u16)pmlmeext->channel_list.reg_classes
-		       + get_reg_classes_full_count(pmlmeext->channel_list);
+		       + (1 + 1) * (u16)ch_list->reg_classes
+		       + get_reg_classes_full_count(ch_list);
 
 #ifdef CONFIG_CONCURRENT_MODE
 	if (rtw_mi_buddy_check_fwstate(padapter, _FW_LINKED))
@@ -5195,37 +5486,22 @@ static void rtw_hal_construct_P2PNegoRsp(_adapter *padapter, u8 *pframe, u32 *pL
 
 		/*	Channel List */
 		p2pie[p2pielen++] = union_ch;
-	} else {
-		int i, j;
-		for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) {
-			/*	Operating Class */
-			p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class;
-
-			/*	Number of Channels */
-			p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels;
-
-			/*	Channel List */
-			for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++)
-				p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i];
-		}
-	}
-#else /* CONFIG_CONCURRENT_MODE */
+	} else
+#endif /* CONFIG_CONCURRENT_MODE */
 	{
 		int i, j;
-		for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) {
+		for (j = 0; j < ch_list->reg_classes; j++) {
 			/*	Operating Class */
-			p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class;
+			p2pie[p2pielen++] = ch_list->reg_class[j].reg_class;
 
 			/*	Number of Channels */
-			p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels;
+			p2pie[p2pielen++] = ch_list->reg_class[j].channels;
 
 			/*	Channel List */
-			for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++)
-				p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i];
+			for (i = 0; i < ch_list->reg_class[j].channels; i++)
+				p2pie[p2pielen++] = ch_list->reg_class[j].channel[i];
 		}
 	}
-#endif /* CONFIG_CONCURRENT_MODE */
-
 
 	/*	Device Info */
 	/*	Type: */
@@ -5421,6 +5697,8 @@ static void rtw_hal_construct_P2PInviteRsp(_adapter *padapter, u8 *pframe, u32 *
 	/* due to defult value is FAIL INFO UNAVAILABLE, so the following IE is not needed */
 #if 0
 	if (status_code == P2P_STATUS_SUCCESS) {
+		struct p2p_channels *ch_list = &(adapter_to_rfctl(padapter)->channel_list);
+
 		if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) {
 			/*	The P2P Invitation request frame asks this Wi-Fi device to be the P2P GO */
 			/*	In this case, the P2P Invitation response frame should carry the two more P2P attributes. */
@@ -5475,8 +5753,8 @@ static void rtw_hal_construct_P2PInviteRsp(_adapter *padapter, u8 *pframe, u32 *
 		/* + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) */
 		/* + number of channels in all classes */
 		len_channellist_attr = 3
-			+ (1 + 1) * (u16)pmlmeext->channel_list.reg_classes
-			+ get_reg_classes_full_count(pmlmeext->channel_list);
+			+ (1 + 1) * (u16)ch_list->reg_classes
+			+ get_reg_classes_full_count(ch_list);
 
 #ifdef CONFIG_CONCURRENT_MODE
 		if (rtw_mi_check_status(padapter, MI_LINKED))
@@ -5522,36 +5800,22 @@ static void rtw_hal_construct_P2PInviteRsp(_adapter *padapter, u8 *pframe, u32 *
 
 			/*	Channel List */
 			p2pie[p2pielen++] = union_ch;
-		} else {
-			int i, j;
-			for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) {
-				/*	Operating Class */
-				p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class;
-
-				/*	Number of Channels */
-				p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels;
-
-				/*	Channel List */
-				for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++)
-					p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i];
-			}
-		}
-#else /* CONFIG_CONCURRENT_MODE */
+		} else
+#endif /* CONFIG_CONCURRENT_MODE */
 		{
 			int i, j;
-			for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) {
+			for (j = 0; j < ch_list->reg_classes; j++) {
 				/*	Operating Class */
-				p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class;
+				p2pie[p2pielen++] = ch_list->reg_class[j].reg_class;
 
 				/*	Number of Channels */
-				p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels;
+				p2pie[p2pielen++] = ch_list->reg_class[j].channels;
 
 				/*	Channel List */
-				for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++)
-					p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i];
+				for (i = 0; i < ch_list->reg_class[j].channels; i++)
+					p2pie[p2pielen++] = ch_list->reg_class[j].channel[i];
 			}
 		}
-#endif /* CONFIG_CONCURRENT_MODE */
 	}
 #endif
 
@@ -6177,6 +6441,184 @@ static void rtw_hal_construct_ARPRsp(
 	}
 }
 
+/*
+ * Description: Neighbor Discovery Offload.
+ */
+static void rtw_hal_construct_na_message(_adapter *padapter,
+				     u8 *pframe, u32 *pLength)
+{
+	struct rtw_ieee80211_hdr *pwlanhdr = NULL;
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct wlan_network	*cur_network = &pmlmepriv->cur_network;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &pmlmeext->mlmext_info;
+	struct security_priv	*psecuritypriv = &padapter->securitypriv;
+
+	u32 pktlen = 0;
+	u16 *fctrl = NULL;
+
+	u8 ns_hdr[8] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00, 0x86, 0xDD};
+	u8 ipv6_info[4] = {0x60, 0x00, 0x00, 0x00};
+	u8 ipv6_contx[4] = {0x00, 0x20, 0x3a, 0xff};
+	u8 icmpv6_hdr[8] = {0x88, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00};
+	u8 val8 = 0;
+
+	u8 *p_na_msg = pframe;
+	/* for TKIP Cal MIC */
+	u8 *payload = pframe;
+	u8 EncryptionHeadOverhead = 0, na_msg_offset = 0;
+	/* RTW_INFO("%s:%d\n", __FUNCTION__, bForcePowerSave); */
+
+	pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
+
+	fctrl = &pwlanhdr->frame_ctl;
+	*(fctrl) = 0;
+
+	/* ------------------------------------------------------------------------- */
+	/* MAC Header. */
+	/* ------------------------------------------------------------------------- */
+	SetFrameType(fctrl, WIFI_DATA);
+	SetToDs(fctrl);
+	_rtw_memcpy(pwlanhdr->addr1,
+		    get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr2,
+		    adapter_mac_addr(padapter), ETH_ALEN);
+	_rtw_memcpy(pwlanhdr->addr3,
+		    get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
+
+	SetSeqNum(pwlanhdr, 0);
+	set_duration(pwlanhdr, 0);
+
+#ifdef CONFIG_WAPI_SUPPORT
+	*pLength = sMacHdrLng;
+#else
+	*pLength = 24;
+#endif
+	switch (psecuritypriv->dot11PrivacyAlgrthm) {
+	case _WEP40_:
+	case _WEP104_:
+		EncryptionHeadOverhead = 4;
+		break;
+	case _TKIP_:
+		EncryptionHeadOverhead = 8;
+		break;
+	case _AES_:
+		EncryptionHeadOverhead = 8;
+		break;
+#ifdef CONFIG_WAPI_SUPPORT
+	case _SMS4_:
+		EncryptionHeadOverhead = 18;
+		break;
+#endif
+	default:
+		EncryptionHeadOverhead = 0;
+	}
+
+	if (EncryptionHeadOverhead > 0) {
+		_rtw_memset(&(pframe[*pLength]), 0, EncryptionHeadOverhead);
+		*pLength += EncryptionHeadOverhead;
+		/* SET_80211_HDR_WEP(pARPRspPkt, 1);  */ /* Suggested by CCW. */
+		SetPrivacy(fctrl);
+	}
+
+	/* ------------------------------------------------------------------------- */
+	/* Frame Body. */
+	/* ------------------------------------------------------------------------- */
+	na_msg_offset = *pLength;
+	p_na_msg = (u8 *)(pframe + na_msg_offset);
+	payload = p_na_msg; /* Get Payload pointer */
+
+	/* LLC header */
+	val8 = sizeof(ns_hdr);
+	_rtw_memcpy(p_na_msg, ns_hdr, val8);
+	*pLength += val8;
+	p_na_msg += val8;
+
+	/* IPv6 Header */
+	/* 1 . Information (4 bytes): 0x60 0x00 0x00 0x00 */
+	val8 = sizeof(ipv6_info);
+	_rtw_memcpy(p_na_msg, ipv6_info, val8);
+	*pLength += val8;
+	p_na_msg += val8;
+
+	/* 2 . playload : 0x00 0x20 , NextProt : 0x3a (ICMPv6) HopLim : 0xff */
+	val8 = sizeof(ipv6_contx);
+	_rtw_memcpy(p_na_msg, ipv6_contx, val8);
+	*pLength += val8;
+	p_na_msg += val8;
+
+	/* 3 . SA : 16 bytes , DA : 16 bytes ( Fw will filled ) */
+	_rtw_memset(&(p_na_msg[*pLength]), 0, 32);
+	*pLength += 32;
+	p_na_msg += 32;
+
+	/* ICMPv6 */
+	/* 1. Type : 0x88 (NA)
+	 * 2. Code : 0x00
+	 * 3. ChechSum : 0x00 0x00 (RSvd)
+	 * 4. NAFlag: 0x60 0x00 0x00 0x00 ( Solicited , Override)
+	 */
+	val8 = sizeof(icmpv6_hdr);
+	_rtw_memcpy(p_na_msg, icmpv6_hdr, val8);
+	*pLength += val8;
+	p_na_msg += val8;
+
+	/* TA: 16 bytes*/
+	_rtw_memset(&(p_na_msg[*pLength]), 0, 16);
+	*pLength += 16;
+	p_na_msg += 16;
+
+	/* ICMPv6 Target Link Layer Address */
+	p_na_msg[0] = 0x02; /* type */
+	p_na_msg[1] = 0x01; /* len 1 unit of 8 octes */
+	*pLength += 2;
+	p_na_msg += 2;
+
+	_rtw_memset(&(p_na_msg[*pLength]), 0, 6);
+	*pLength += 6;
+	p_na_msg += 6;
+
+	if (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_) {
+		if (IS_HARDWARE_TYPE_8188E(padapter) ||
+		    IS_HARDWARE_TYPE_8812(padapter)) {
+			rtw_hal_append_tkip_mic(padapter, pframe,
+						na_msg_offset);
+		}
+		*pLength += 8;
+	}
+}
+/*
+ * Description: Neighbor Discovery Protocol Information.
+ */
+static void rtw_hal_construct_ndp_info(_adapter *padapter,
+				     u8 *pframe, u32 *pLength)
+{
+	struct mlme_ext_priv *pmlmeext = NULL;
+	struct mlme_ext_info *pmlmeinfo = NULL;
+	struct rtw_ndp_info ndp_info;
+	u8	*pndp_info = pframe;
+	u8	len = sizeof(struct rtw_ndp_info);
+
+	RTW_INFO("%s: len: %d\n", __func__, len);
+
+	pmlmeext =  &padapter->mlmeextpriv;
+	pmlmeinfo = &pmlmeext->mlmext_info;
+
+	_rtw_memset(pframe, 0, len);
+	_rtw_memset(&ndp_info, 0, len);
+
+	ndp_info.enable = 1;
+	ndp_info.check_remote_ip = 0;
+	ndp_info.num_of_target_ip = 1;
+
+	_rtw_memcpy(&ndp_info.target_link_addr, adapter_mac_addr(padapter),
+		    ETH_ALEN);
+	_rtw_memcpy(&ndp_info.target_ipv6_addr, pmlmeinfo->ip6_addr,
+		    RTW_IPv6_ADDR_LEN);
+
+	_rtw_memcpy(pndp_info, &ndp_info, len);
+}
+
 #ifdef CONFIG_PNO_SUPPORT
 static void rtw_hal_construct_ProbeReq(_adapter *padapter, u8 *pframe,
 				       u32 *pLength, pno_ssid_t *ssid)
@@ -6475,9 +6917,8 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 	struct mlme_ext_priv	*pmlmeext;
 	struct mlme_ext_info	*pmlmeinfo;
 	u32	ARPLength = 0, GTKLength = 0, PNOLength = 0, ScanInfoLength = 0;
-	u32	SSIDLegnth = 0, ProbeReqLength = 0;
+	u32	SSIDLegnth = 0, ProbeReqLength = 0, ns_len = 0;
 	u8 CurtPktPageNum = 0;
-	u8 currentip[4];
 	u8 cur_dot11txpn[8];
 
 #ifdef CONFIG_GTK_OL
@@ -6497,14 +6938,13 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 
 	if (pwrctl->wowlan_pno_enable == _FALSE) {
 		/* ARP RSP * 1 page */
-		rtw_get_current_ip_address(adapter, currentip);
 
 		rsvd_page_loc->LocArpRsp = *page_num;
 
 		RTW_INFO("LocArpRsp: %d\n", rsvd_page_loc->LocArpRsp);
 
 		rtw_hal_construct_ARPRsp(adapter, &pframe[index],
-					 &ARPLength, currentip);
+					 &ARPLength, pmlmeinfo->ip_addr);
 
 		rtw_hal_fill_fake_txdesc(adapter,
 					 &pframe[index - tx_desc],
@@ -6516,6 +6956,34 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 
 		index += (CurtPktPageNum * page_size);
 
+		/* 2 NS offload and NDP Info*/
+		if (pwrctl->wowlan_ns_offload_en == _TRUE) {
+			rsvd_page_loc->LocNbrAdv = *page_num;
+			RTW_INFO("LocNbrAdv: %d\n", rsvd_page_loc->LocNbrAdv);
+			rtw_hal_construct_na_message(adapter,
+						     &pframe[index], &ns_len);
+			rtw_hal_fill_fake_txdesc(adapter,
+						 &pframe[index - tx_desc],
+						 ns_len, _FALSE,
+						 _FALSE, _TRUE);
+			CurtPktPageNum = (u8)PageNum(tx_desc + ns_len,
+						      page_size);
+			*page_num += CurtPktPageNum;
+			index += (CurtPktPageNum * page_size);
+
+			rsvd_page_loc->LocNDPInfo = *page_num;
+			RTW_INFO("LocNDPInfo: %d\n",
+				 rsvd_page_loc->LocNDPInfo);
+
+			rtw_hal_construct_ndp_info(adapter,
+						   &pframe[index - tx_desc],
+						   &ns_len);
+			CurtPktPageNum =
+				(u8)PageNum(tx_desc + ns_len, page_size);
+			*page_num += CurtPktPageNum;
+			index += (CurtPktPageNum * page_size);
+		}
+
 		/* 3 SEC IV * 1 page */
 		rtw_get_sec_iv(adapter, cur_dot11txpn,
 			       get_my_bssid(&pmlmeinfo->network));
@@ -6770,7 +7238,7 @@ static u8 rtw_hal_wow_pattern_generate(_adapter *adapter, u8 idx, struct rtl_wow
 	u8 broadcast_addr[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
 	u8 multicast_addr1[2] = {0x33, 0x33};
 	u8 multicast_addr2[3] = {0x01, 0x00, 0x5e};
-	u8  mask_len = 0;
+	u8 mask_len = 0;
 	u8 mac_addr[ETH_ALEN] = {0};
 	u16 count = 0;
 	int i, j;
@@ -7533,6 +8001,11 @@ static void rtw_hal_wow_enable(_adapter *adapter)
 	if (IS_HARDWARE_TYPE_8723B(adapter))
 		rtw_hal_backup_rate(adapter);
 
+	rtw_hal_fw_dl(adapter, _TRUE);
+	media_status_rpt = RT_MEDIA_CONNECT;
+	rtw_hal_set_hwreg(adapter, HW_VAR_H2C_FW_JOINBSSRPT,
+			  (u8 *)&media_status_rpt);
+
 	/* RX DMA stop */
 	#if defined(CONFIG_RTL8188E)
 	if (IS_HARDWARE_TYPE_8188E(adapter))
@@ -7551,15 +8024,16 @@ static void rtw_hal_wow_enable(_adapter *adapter)
 	/* redownload wow pattern */
 	rtw_hal_dl_pattern(adapter, 1);
 
-	rtw_hal_fw_dl(adapter, _TRUE);
-	media_status_rpt = RT_MEDIA_CONNECT;
-	rtw_hal_set_hwreg(adapter, HW_VAR_H2C_FW_JOINBSSRPT,
-			  (u8 *)&media_status_rpt);
-
 	if (!pwrctl->wowlan_pno_enable) {
 		psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(pmlmepriv));
-		if (psta != NULL)
+
+		if (psta != NULL) {
+			#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+			rtw_hal_set_default_port_id_cmd(adapter, psta->mac_id);
+			#endif
+
 			rtw_sta_media_status_rpt(adapter, psta, 1);
+		}
 	}
 
 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
@@ -7593,11 +8067,13 @@ static void rtw_hal_wow_enable(_adapter *adapter)
 	/* free adapter's resource */
 	rtw_mi_intf_stop(adapter);
 
+#endif
+#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
 	/* Invoid SE0 reset signal during suspending*/
 	rtw_write8(adapter, REG_RSV_CTRL, 0x20);
 	if (IS_8188F(pHalData->version_id) == FALSE)
 		rtw_write8(adapter, REG_RSV_CTRL, 0x60);
-#endif /*CONFIG_USB_HCI*/
+#endif
 
 	rtw_hal_gate_bb(adapter, _FALSE);
 }
@@ -7747,8 +8223,12 @@ static void rtw_hal_wow_disable(_adapter *adapter)
 		rtw_hal_set_hwreg(adapter, HW_VAR_H2C_FW_JOINBSSRPT,
 				  (u8 *)&media_status_rpt);
 
-		if (psta != NULL)
+		if (psta != NULL) {
+			#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+			rtw_hal_set_default_port_id_cmd(adapter, psta->mac_id);
+			#endif
 			rtw_sta_media_status_rpt(adapter, psta, 1);
+		}
 	}
 	rtw_hal_gate_bb(adapter, _FALSE);
 }
@@ -7852,27 +8332,13 @@ void rtw_hal_set_p2p_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
 #endif /* CONFIG_P2P_WOWLAN */
 
 #ifdef CONFIG_LPS_PG
-#define LPSPG_RSVD_PAGE_SET_MACID(_rsvd_pag, _value)		SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 0, 8, _value)/*used macid*/
-#define LPSPG_RSVD_PAGE_SET_MBSSCAMID(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 8, 8, _value)/*used BSSID CAM entry*/
-#define LPSPG_RSVD_PAGE_SET_PMC_NUM(_rsvd_pag, _value)		SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 16, 8, _value)/*Max used Pattern Match CAM entry*/
-#define LPSPG_RSVD_PAGE_SET_MU_RAID_GID(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 24, 8, _value)/*Max MU rate table Group ID*/
-#define LPSPG_RSVD_PAGE_SET_SEC_CAM_NUM(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x04, 0, 8, _value)/*used Security CAM entry number*/
-#define LPSPG_RSVD_PAGE_SET_DRV_RSVDPAGE_NUM(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x04, 8, 8, _value)/*Txbuf used page number for fw offload*/
-#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID1(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 0, 8, _value)/*used Security CAM entry -1*/
-#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID2(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 8, 8, _value)/*used Security CAM entry -2*/
-#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID3(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 16, 8, _value)/*used Security CAM entry -3*/
-#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID4(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 24, 8, _value)/*used Security CAM entry -4*/
-#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID5(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 0, 8, _value)/*used Security CAM entry -5*/
-#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID6(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 8, 8, _value)/*used Security CAM entry -6*/
-#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID7(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 16, 8, _value)/*used Security CAM entry -7*/
-#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID8(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 24, 8, _value)/*used Security CAM entry -8*/
-#endif
-#ifdef CONFIG_LPS_PG
 #include "hal_halmac.h"
 
 #define DBG_LPSPG_SEC_DUMP
 #define LPS_PG_INFO_RSVD_LEN	16
+#define LPS_PG_INFO_RSVD_PAGE_NUM	1
 
+#define DBG_LPSPG_INFO_DUMP
 static void rtw_hal_set_lps_pg_info_rsvd_page(_adapter *adapter)
 {
 	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
@@ -7952,9 +8418,13 @@ static void rtw_hal_set_lps_pg_info_rsvd_page(_adapter *adapter)
 
 	rtw_halmac_download_rsvd_page(dvobj, pwrpriv->lpspg_rsvd_page_locate, lps_pg_info, LPS_PG_INFO_RSVD_LEN);
 
+#ifdef DBG_LPSPG_INFO_DUMP
+	RTW_INFO("Get LPS-PG INFO from rsvd page_offset:%d\n", pwrpriv->lpspg_rsvd_page_locate);
+	rtw_dump_rsvd_page(RTW_DBGDUMP, adapter, pwrpriv->lpspg_rsvd_page_locate, 1);
+#endif
 }
 
-#define DBG_LPSPG_INFO_DUMP
+
 static u8 rtw_hal_set_lps_pg_info_cmd(_adapter *adapter)
 {
 	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
@@ -8024,6 +8494,45 @@ u8 rtw_hal_set_lps_pg_info(_adapter *adapter)
 
 	return ret;
 }
+
+void rtw_hal_lps_pg_handler(_adapter *adapter, enum lps_pg_hdl_id hdl_id)
+{
+	switch (hdl_id) {
+	case LPS_PG_INFO_CFG:
+		rtw_hal_set_lps_pg_info(adapter);
+		break;
+	case LPS_PG_REDLEMEM:
+		{
+			/*set xmit_block*/
+			rtw_set_xmit_block(adapter, XMIT_BLOCK_REDLMEM);
+			if (_FAIL == rtw_hal_fw_mem_dl(adapter, FW_EMEM))
+				rtw_warn_on(1);
+			/*clearn xmit_block*/
+			rtw_clr_xmit_block(adapter, XMIT_BLOCK_REDLMEM);
+		}
+		break;
+
+	case LPS_PG_RESEND_H2C:
+		{
+			struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl;
+			struct sta_info *sta;
+			PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter);
+			int i;
+
+			for (i = 0; i < MACID_NUM_SW_LIMIT; i++) {
+				sta = macid_ctl->sta[i];
+				if (sta && !is_broadcast_mac_addr(sta->hwaddr))
+					/*rtw_dm_ra_mask_hdl(adapter, sta);*/
+					rtw_dm_ra_mask_wk_cmd(adapter, (u8 *)sta);
+			}
+		}
+		break;
+
+	default:
+		break;
+	}
+}
+
 #endif /*CONFIG_LPS_PG*/
 
 /*
@@ -8114,7 +8623,7 @@ void rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished)
 	ReservedPagePacket = pcmdframe->buf_addr;
 	_rtw_memset(&RsvdPageLoc, 0, sizeof(RSVDPAGE_LOC));
 
-	/* beacon * 2 pages */
+	/* beacon * 1 pages */
 	BufIndex = TxDescOffset;
 	rtw_hal_construct_beacon(adapter,
 				 &ReservedPagePacket[BufIndex], &BeaconLength);
@@ -8124,9 +8633,6 @@ void rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished)
 	* packet, it will be filled in front of the packet in TXPKTBUF.
 	*/
 	CurtPktPageNum = (u8)PageNum((TxDescLen + BeaconLength), PageSize);
-	/* If we don't add 1 more page, ARP offload function will fail at 8723bs.*/
-	if (CurtPktPageNum == 1)
-		CurtPktPageNum += 1;
 
 	TotalPageNum += CurtPktPageNum;
 
@@ -8166,24 +8672,29 @@ void rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished)
 	BufIndex += (CurtPktPageNum * PageSize);
 
 #ifdef CONFIG_BT_COEXIST
-	/* BT Qos null data * 1 page */
-	RsvdPageLoc.LocBTQosNull = TotalPageNum;
-	RTW_INFO("LocBTQosNull: %d\n", RsvdPageLoc.LocBTQosNull);
-	rtw_hal_construct_NullFunctionData(
-		adapter,
-		&ReservedPagePacket[BufIndex],
-		&BTQosNullLength,
-		get_my_bssid(&pmlmeinfo->network),
-		_TRUE, 0, 0, _FALSE);
-	rtw_hal_fill_fake_txdesc(adapter,
-				 &ReservedPagePacket[BufIndex - TxDescLen],
-				 BTQosNullLength, _FALSE, _TRUE, _FALSE);
+	if (pwrctl->wowlan_mode == _FALSE ||
+		pwrctl->wowlan_in_resume == _TRUE) {
+		/* BT Qos null data * 1 page */
+		RsvdPageLoc.LocBTQosNull = TotalPageNum;
 
-	CurtPktPageNum = (u8)PageNum(TxDescLen + BTQosNullLength, PageSize);
+		RTW_INFO("LocBTQosNull: %d\n", RsvdPageLoc.LocBTQosNull);
 
-	TotalPageNum += CurtPktPageNum;
+		rtw_hal_construct_NullFunctionData(adapter,
+					&ReservedPagePacket[BufIndex],
+					&BTQosNullLength,
+					get_my_bssid(&pmlmeinfo->network),
+					_TRUE, 0, 0, _FALSE);
 
-	BufIndex += (CurtPktPageNum * PageSize);
+		rtw_hal_fill_fake_txdesc(adapter,
+				&ReservedPagePacket[BufIndex - TxDescLen],
+				BTQosNullLength, _FALSE, _TRUE, _FALSE);
+
+		CurtPktPageNum = (u8)PageNum(TxDescLen + BTQosNullLength,
+					     PageSize);
+
+		TotalPageNum += CurtPktPageNum;
+		BufIndex += (CurtPktPageNum * PageSize);
+	}
 #endif /* CONFIG_BT_COEXIT */
 
 #ifdef CONFIG_MCC_MODE
@@ -8219,26 +8730,29 @@ void rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished)
 	}
 #endif /* CONFIG_MCC_MODE */
 
-	/* Qos null data * 1 page */
-	RsvdPageLoc.LocQosNull = TotalPageNum;
-	RTW_INFO("LocQosNull: %d\n", RsvdPageLoc.LocQosNull);
-	rtw_hal_construct_NullFunctionData(
-		adapter,
-		&ReservedPagePacket[BufIndex],
-		&QosNullLength,
-		get_my_bssid(&pmlmeinfo->network),
-		_TRUE, 0, 0, _FALSE);
-	rtw_hal_fill_fake_txdesc(adapter,
+	if (pwrctl->wowlan_mode == _FALSE ||
+		pwrctl->wowlan_in_resume == _TRUE) {
+		/* Qos null data * 1 page */
+		RsvdPageLoc.LocQosNull = TotalPageNum;
+		RTW_INFO("LocQosNull: %d\n", RsvdPageLoc.LocQosNull);
+		rtw_hal_construct_NullFunctionData(adapter,
+					&ReservedPagePacket[BufIndex],
+					&QosNullLength,
+					get_my_bssid(&pmlmeinfo->network),
+					_TRUE, 0, 0, _FALSE);
+		rtw_hal_fill_fake_txdesc(adapter,
 				 &ReservedPagePacket[BufIndex - TxDescLen],
 				 QosNullLength, _FALSE, _FALSE, _FALSE);
 
-	CurtPktPageNum = (u8)PageNum(TxDescLen + QosNullLength, PageSize);
+		CurtPktPageNum = (u8)PageNum(TxDescLen + QosNullLength,
+					     PageSize);
 
-	TotalPageNum += CurtPktPageNum;
+		TotalPageNum += CurtPktPageNum;
 
-	TotalPacketLen = BufIndex + QosNullLength;
+		BufIndex += (CurtPktPageNum * PageSize);
+	}
 
-	BufIndex += (CurtPktPageNum * PageSize);
+	TotalPacketLen = BufIndex + QosNullLength;
 
 #ifdef CONFIG_WOWLAN
 	if (pwrctl->wowlan_mode == _TRUE &&
@@ -8268,8 +8782,19 @@ download_page:
 	RTW_INFO("%s PageNum(%d), pktlen(%d)\n",
 		 __func__, TotalPageNum, TotalPacketLen);
 
+#ifdef CONFIG_LPS_PG
+	if ((TotalPacketLen + (LPS_PG_INFO_RSVD_PAGE_NUM * PageSize)) > MaxRsvdPageBufSize) {
+		pwrctl->lpspg_rsvd_page_locate = 0;
+		pwrctl->blpspg_info_up = _FALSE;
+
+		RTW_ERR("%s rsvd page size is not enough!!TotalPacketLen+LPS_PG_INFO_LEN %d, MaxRsvdPageBufSize %d\n",
+			 __func__, (TotalPacketLen + (LPS_PG_INFO_RSVD_PAGE_NUM * PageSize)), MaxRsvdPageBufSize);
+		rtw_warn_on(1);
+	}
+#endif
+
 	if (TotalPacketLen > MaxRsvdPageBufSize) {
-		RTW_INFO("%s(ERROR): rsvd page size is not enough!!TotalPacketLen %d, MaxRsvdPageBufSize %d\n",
+		RTW_ERR("%s(ERROR): rsvd page size is not enough!!TotalPacketLen %d, MaxRsvdPageBufSize %d\n",
 			 __FUNCTION__, TotalPacketLen, MaxRsvdPageBufSize);
 		rtw_warn_on(1);
 		goto error;
@@ -8390,6 +8915,18 @@ void rtw_hal_update_uapsd_tid(_adapter *adapter)
 }
 #endif
 
+#if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT)
+/* For multi-port support, driver needs to inform the port ID to FW for btc operations */
+s32 rtw_hal_set_wifi_port_id_cmd(_adapter *adapter)
+{
+	u8 port_id = 0;
+	u8 h2c_buf[H2C_BTC_WL_PORT_ID_LEN] = {0};
+
+	SET_H2CCMD_BTC_WL_PORT_ID(h2c_buf, adapter->hw_port);
+	return rtw_hal_fill_h2c_cmd(adapter, H2C_BTC_WL_PORT_ID, H2C_BTC_WL_PORT_ID_LEN, h2c_buf);
+}
+#endif
+
 void SetHwReg(_adapter *adapter, u8 variable, u8 *val)
 {
 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
@@ -8554,6 +9091,11 @@ void SetHwReg(_adapter *adapter, u8 variable, u8 *val)
 		rtw_hal_update_uapsd_tid(adapter);
 		break;
 #endif
+#ifdef CONFIG_LPS_PG
+	case HW_VAR_LPS_PG_HANDLE:
+		rtw_hal_lps_pg_handler(adapter, *val);
+		break;
+#endif
 
 	default:
 		if (0)
@@ -8754,6 +9296,7 @@ void SetHalODMVar(
 		} else {
 			RTW_INFO("### Clean STA_(%d) info ###\n", psta->mac_id);
 			/* _enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL); */
+			psta->rssi_level = 0;
 			odm_cmn_info_ptr_array_hook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, NULL);
 
 			/* _exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL); */
@@ -8767,8 +9310,9 @@ void SetHalODMVar(
 		odm_cmn_info_update(podmpriv, ODM_CMNINFO_WIFI_DISPLAY, bSet);
 		break;
 	case HAL_ODM_REGULATION:
-		odm_cmn_info_init(podmpriv, ODM_CMNINFO_DOMAIN_CODE_2G, pHalData->Regulation2_4G);
-		odm_cmn_info_init(podmpriv, ODM_CMNINFO_DOMAIN_CODE_5G, pHalData->Regulation5G);
+		/* used to auto enable/disable adaptivity by SD7 */
+		odm_cmn_info_init(podmpriv, ODM_CMNINFO_DOMAIN_CODE_2G, 0);
+		odm_cmn_info_init(podmpriv, ODM_CMNINFO_DOMAIN_CODE_5G, 0);
 		break;
 #if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR)
 	case HAL_ODM_NOISE_MONITOR: {
@@ -8852,8 +9396,6 @@ void SetHalODMVar(
 	case HAL_ODM_AUTO_CHNL_SEL: {
 		ACS_OP	acs_op = *(ACS_OP *)pValue1;
 
-		rtw_phydm_func_set(Adapter, ODM_BB_NHM_CNT);
-
 		if (ACS_INIT == acs_op) {
 #ifdef DBG_AUTO_CHNL_SEL_NHM
 			RTW_INFO("[ACS-"ADPT_FMT"] HAL_ODM_AUTO_CHNL_SEL: ACS_INIT\n", ADPT_ARG(Adapter));
@@ -8883,7 +9425,7 @@ void SetHalODMVar(
 		u8	antenna = (*(u8 *)pValue1);
 
 		/*switch antenna*/
-		ODM_UpdateRxIdleAnt(&pHalData->odmpriv, antenna);
+		odm_update_rx_idle_ant(&pHalData->odmpriv, antenna);
 		/*RTW_INFO("==> HAL_ODM_ANTDIV_SELECT, Ant_(%s)\n", (antenna == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT");*/
 
 	}
@@ -8953,42 +9495,6 @@ void GetHalODMVar(
 	}
 }
 
-
-u32 rtw_phydm_ability_ops(_adapter *adapter, HAL_PHYDM_OPS ops, u32 ability)
-{
-	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT *podmpriv = &pHalData->odmpriv;
-	u32 result = 0;
-
-	switch (ops) {
-	case HAL_PHYDM_DIS_ALL_FUNC:
-		podmpriv->support_ability = DYNAMIC_FUNC_DISABLE;
-		break;
-	case HAL_PHYDM_FUNC_SET:
-		podmpriv->support_ability |= ability;
-		break;
-	case HAL_PHYDM_FUNC_CLR:
-		podmpriv->support_ability &= ~(ability);
-		break;
-	case HAL_PHYDM_ABILITY_BK:
-		/* dm flag backup*/
-		podmpriv->bk_support_ability = podmpriv->support_ability;
-		break;
-	case HAL_PHYDM_ABILITY_RESTORE:
-		/* restore dm flag */
-		podmpriv->support_ability = podmpriv->bk_support_ability;
-		break;
-	case HAL_PHYDM_ABILITY_SET:
-		podmpriv->support_ability = ability;
-		break;
-	case HAL_PHYDM_ABILITY_GET:
-		result = podmpriv->support_ability;
-		break;
-	}
-	return result;
-}
-
-
 BOOLEAN
 eqNByte(
 	u8	*str1,
@@ -9182,8 +9688,13 @@ ParseQualifiedString(
 		return _FALSE;
 
 	i = (*Start);
-	while ((c = In[(*Start)++]) != RightQualifier)
-		; /* find ']' */
+	c = In[(*Start)++];
+	while (c != RightQualifier && c != '\0')
+		c = In[(*Start)++];
+
+	if (c == '\0')
+		return _FALSE;
+
 	j = (*Start) - 2;
 	strncpy((char *)Out, (const char *)(In + i), j - i + 1);
 
@@ -10020,10 +10531,18 @@ void dm_DynamicUsbTxAgg(_adapter *padapter, u8 from_timer)
 {
 	struct dvobj_priv	*pdvobjpriv = adapter_to_dvobj(padapter);
 	struct mlme_priv		*pmlmepriv = &(padapter->mlmepriv);
+	struct registry_priv *registry_par = &padapter->registrypriv;
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
 	u8 cur_wireless_mode = WIRELESS_INVALID;
 
 #ifdef CONFIG_USB_RX_AGGREGATION
+	if (!registry_par->dynamic_agg_enable)
+		return;
+
+#ifdef RTW_HALMAC
+	if (IS_HARDWARE_TYPE_8822BU(padapter))
+		rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, NULL);
+#else /* !RTW_HALMAC */
 	if (IS_HARDWARE_TYPE_8821U(padapter)) { /* || IS_HARDWARE_TYPE_8192EU(padapter)) */
 		/* This AGG_PH_TH only for UsbRxAggMode == USB_RX_AGG_USB */
 		if ((pHalData->rxagg_mode == RX_AGG_USB) && (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)) {
@@ -10060,7 +10579,9 @@ void dm_DynamicUsbTxAgg(_adapter *padapter, u8 from_timer)
 		rtw_set_usb_agg_by_mode(padapter, cur_wireless_mode);
 #endif /* CONFIG_PLATFORM_NOVATEK_NT72668 */
 	}
-#endif
+#endif /* RTW_HALMAC */
+#endif /* CONFIG_USB_RX_AGGREGATION */
+
 }
 
 /* bus-agg check for SoftAP mode */
@@ -10661,14 +11182,10 @@ void update_IOT_info(_adapter *padapter)
 	case HT_IOT_PEER_RALINK:
 		pmlmeinfo->turboMode_cts2self = 0;
 		pmlmeinfo->turboMode_rtsen = 1;
-		/* disable high power			 */
-		rtw_phydm_func_clr(padapter, ODM_BB_DYNAMIC_TXPWR);
 		break;
 	case HT_IOT_PEER_REALTEK:
 		/* rtw_write16(padapter, 0x4cc, 0xffff); */
 		/* rtw_write16(padapter, 0x546, 0x01c0); */
-		/* disable high power			 */
-		rtw_phydm_func_clr(padapter, ODM_BB_DYNAMIC_TXPWR);
 		break;
 	default:
 		pmlmeinfo->turboMode_cts2self = 0;
@@ -10867,7 +11384,8 @@ void dump_hal_spec(void *sel, _adapter *adapter)
 	RTW_PRINT_SEL(sel, "rfpath_num_2g:%u\n", hal_spec->rfpath_num_2g);
 	RTW_PRINT_SEL(sel, "rfpath_num_5g:%u\n", hal_spec->rfpath_num_5g);
 	RTW_PRINT_SEL(sel, "max_tx_cnt:%u\n", hal_spec->max_tx_cnt);
-	RTW_PRINT_SEL(sel, "nss_num:%u\n", hal_spec->nss_num);
+	RTW_PRINT_SEL(sel, "tx_nss_num:%u\n", hal_spec->tx_nss_num);
+	RTW_PRINT_SEL(sel, "rx_nss_num:%u\n", hal_spec->rx_nss_num);
 
 	RTW_PRINT_SEL(sel, "band_cap:");
 	for (i = 0; i < BAND_CAP_BIT_NUM; i++) {
@@ -11011,12 +11529,14 @@ void ResumeTxBeacon(_adapter *padapter)
 	/* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
 	/* which should be read from register to a global variable. */
 
+	rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2,
+		rtw_read8(padapter, REG_FWHW_TXQ_CTRL + 2) | BIT(6));
 
-	pHalData->RegFwHwTxQCtrl |= BIT(6);
-	rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2, pHalData->RegFwHwTxQCtrl);
-	rtw_write8(padapter, REG_TBTT_PROHIBIT + 1, 0xff);
-	pHalData->RegReg542 |= BIT(0);
-	rtw_write8(padapter, REG_TBTT_PROHIBIT + 2, pHalData->RegReg542);
+	/*TBTT hold time :4ms 0x540[19:8]*/
+	rtw_write8(padapter, REG_TBTT_PROHIBIT + 1,
+		TBTT_PROBIHIT_HOLD_TIME & 0xFF);
+	rtw_write8(padapter, REG_TBTT_PROHIBIT + 2,
+		(rtw_read8(padapter, REG_TBTT_PROHIBIT + 2) & 0xF0) | (TBTT_PROBIHIT_HOLD_TIME >> 8));
 }
 
 void StopTxBeacon(_adapter *padapter)
@@ -11027,12 +11547,12 @@ void StopTxBeacon(_adapter *padapter)
 	/* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
 	/* which should be read from register to a global variable. */
 
+	rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2,
+		rtw_read8(padapter, REG_FWHW_TXQ_CTRL + 2) & (~BIT6));
 
-	pHalData->RegFwHwTxQCtrl &= ~BIT(6);
-	rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2, pHalData->RegFwHwTxQCtrl);
 	rtw_write8(padapter, REG_TBTT_PROHIBIT + 1, 0x64);
-	pHalData->RegReg542 &= ~BIT(0);
-	rtw_write8(padapter, REG_TBTT_PROHIBIT + 2, pHalData->RegReg542);
+	rtw_write8(padapter, REG_TBTT_PROHIBIT + 2,
+		(rtw_read8(padapter, REG_TBTT_PROHIBIT + 2) & 0xF0));
 
 	/*CheckFwRsvdPageContent(padapter);*/  /* 2010.06.23. Added by tynli. */
 }
@@ -11229,3 +11749,18 @@ void rtw_dump_phy_cap(void *sel, _adapter *adapter)
 #endif
 }
 
+void rtw_hal_update_iqk_fw_offload_cap(_adapter *adapter)
+{
+	PHAL_DATA_TYPE hal;
+	struct PHY_DM_STRUCT *p_dm_odm;
+
+	hal = GET_HAL_DATA(adapter);
+	p_dm_odm = &hal->odmpriv;
+
+	if (hal->RegIQKFWOffload)
+		rtw_sctx_init(&hal->iqk_sctx, 0);
+
+	odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_IQKFWOFFLOAD, hal->RegIQKFWOffload);
+	RTW_INFO("IQK FW offload:%s\n", hal->RegIQKFWOffload?"enable":"disable");
+}
+
diff --git a/rtl8822BU/hal/hal_com_c2h.h b/rtl8822BU/hal/hal_com_c2h.h
index de8aeef..d6cca9a 100755..100644
--- a/rtl8822BU/hal/hal_com_c2h.h
+++ b/rtl8822BU/hal/hal_com_c2h.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __COMMON_C2H_H__
 #define __COMMON_C2H_H__
 
@@ -57,10 +52,12 @@ typedef enum _C2H_EVT {
 	C2H_LB = 0x01,
 	C2H_TXBF = 0x02,
 	C2H_CCX_TX_RPT = 0x03,
+	C2H_AP_REQ_TXRPT = 0x04,
 	C2H_FW_SCAN_COMPLETE = 0x7,
 	C2H_BT_INFO = 0x09,
 	C2H_BT_MP_INFO = 0x0B,
 	C2H_RA_RPT = 0x0C,
+	C2H_SPC_STAT = 0x0D,
 	C2H_RA_PARA_RPT = 0x0E,
 	C2H_FW_CHNL_SWITCH_COMPLETE = 0x10,
 	C2H_IQK_FINISH = 0x11,
diff --git a/rtl8822BU/hal/hal_com_phycfg.c b/rtl8822BU/hal/hal_com_phycfg.c
index 4f900ca..3f3c491 100755..100644
--- a/rtl8822BU/hal/hal_com_phycfg.c
+++ b/rtl8822BU/hal/hal_com_phycfg.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _HAL_COM_PHYCFG_C_
 
 #include <drv_types.h>
@@ -57,7 +52,8 @@ const char *const _pg_txpwr_src_str[] = {
 #define DBG_PG_TXPWR_READ 0
 #endif
 
-void dump_pg_txpwr_info_2g(void *sel, TxPowerInfo24G *txpwr_info, u8 rfpath_num, u8 max_tx_cnt)
+#if DBG_PG_TXPWR_READ
+static void dump_pg_txpwr_info_2g(void *sel, TxPowerInfo24G *txpwr_info, u8 rfpath_num, u8 max_tx_cnt)
 {
 	int path, group, tx_idx;
 
@@ -141,7 +137,7 @@ void dump_pg_txpwr_info_2g(void *sel, TxPowerInfo24G *txpwr_info, u8 rfpath_num,
 	RTW_PRINT_SEL(sel, "\n");
 }
 
-void dump_pg_txpwr_info_5g(void *sel, TxPowerInfo5G *txpwr_info, u8 rfpath_num, u8 max_tx_cnt)
+static void dump_pg_txpwr_info_5g(void *sel, TxPowerInfo5G *txpwr_info, u8 rfpath_num, u8 max_tx_cnt)
 {
 	int path, group, tx_idx;
 
@@ -224,6 +220,7 @@ void dump_pg_txpwr_info_5g(void *sel, TxPowerInfo5G *txpwr_info, u8 rfpath_num,
 	}
 	RTW_PRINT_SEL(sel, "\n");
 }
+#endif /* DBG_PG_TXPWR_READ */
 
 const struct map_t pg_txpwr_def_info =
 	MAP_ENT(0xB8, 1, 0xFF
@@ -920,12 +917,12 @@ end_parse:
 		rtw_warn_on(1);
 
 exit:
-	if (DBG_PG_TXPWR_READ) {
-		if (pwr_info_2g)
-			dump_pg_txpwr_info_2g(RTW_DBGDUMP, pwr_info_2g, 4, 4);
-		if (pwr_info_5g)
-			dump_pg_txpwr_info_5g(RTW_DBGDUMP, pwr_info_5g, 4, 4);
-	}
+	#if DBG_PG_TXPWR_READ
+	if (pwr_info_2g)
+		dump_pg_txpwr_info_2g(RTW_DBGDUMP, pwr_info_2g, 4, 4);
+	if (pwr_info_5g)
+		dump_pg_txpwr_info_5g(RTW_DBGDUMP, pwr_info_5g, 4, 4);
+	#endif
 
 	return;
 }
@@ -1269,7 +1266,7 @@ bool rtw_regsty_chk_target_tx_power_valid(_adapter *adapter)
 
 			for (rs = 0; rs < RATE_SECTION_NUM; rs++) {
 				tx_num = rate_section_to_tx_num(rs);
-				if (tx_num >= hal_spec->nss_num)
+				if (tx_num >= hal_spec->tx_nss_num)
 					continue;
 
 				if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs))
@@ -1300,7 +1297,6 @@ PHY_GetTxPowerByRateBase(
 	IN	PADAPTER		Adapter,
 	IN	u8				Band,
 	IN	u8				RfPath,
-	IN	u8				TxNum,
 	IN	RATE_SECTION	RateSection
 )
 {
@@ -1320,15 +1316,15 @@ PHY_GetTxPowerByRateBase(
 	if (RateSection >= RATE_SECTION_NUM
 		|| (Band == BAND_ON_5G && RateSection == CCK)
 	) {
-		RTW_PRINT("%s invalid RateSection:%d in Band:%d, RfPath:%d, TxNum:%d\n", __func__
-			, RateSection, Band, RfPath, TxNum);
+		RTW_PRINT("%s invalid RateSection:%d in Band:%d, RfPath:%d\n", __func__
+			, RateSection, Band, RfPath);
 		return 0;
 	}
 
 	if (Band == BAND_ON_2_4G)
-		value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][RateSection];
+		value = pHalData->TxPwrByRateBase2_4G[RfPath][RateSection];
 	else /* BAND_ON_5G */
-		value = pHalData->TxPwrByRateBase5G[RfPath][TxNum][RateSection - 1];
+		value = pHalData->TxPwrByRateBase5G[RfPath][RateSection - 1];
 
 	return value;
 }
@@ -1339,7 +1335,6 @@ phy_SetTxPowerByRateBase(
 	IN	u8				Band,
 	IN	u8				RfPath,
 	IN	RATE_SECTION	RateSection,
-	IN	u8				TxNum,
 	IN	u8				Value
 )
 {
@@ -1358,45 +1353,40 @@ phy_SetTxPowerByRateBase(
 	if (RateSection >= RATE_SECTION_NUM
 		|| (Band == BAND_ON_5G && RateSection == CCK)
 	) {
-		RTW_PRINT("%s invalid RateSection:%d in %sG, RfPath:%d, TxNum:%d\n", __func__
-			, RateSection, (Band == BAND_ON_2_4G) ? "2.4" : "5", RfPath, TxNum);
+		RTW_PRINT("%s invalid RateSection:%d in %sG, RfPath:%d\n", __func__
+			, RateSection, (Band == BAND_ON_2_4G) ? "2.4" : "5", RfPath);
 		return;
 	}
 
 	if (Band == BAND_ON_2_4G)
-		pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][RateSection] = Value;
+		pHalData->TxPwrByRateBase2_4G[RfPath][RateSection] = Value;
 	else /* BAND_ON_5G */
-		pHalData->TxPwrByRateBase5G[RfPath][TxNum][RateSection - 1] = Value;
+		pHalData->TxPwrByRateBase5G[RfPath][RateSection - 1] = Value;
 }
 
 static inline BOOLEAN phy_is_txpwr_by_rate_undefined_of_band_path(_adapter *adapter, u8 band, u8 path)
 {
 	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
-	u8 tx_num = 0, rate_idx = 0;
+	u8 rate_idx = 0;
 
-	for (tx_num = 0; tx_num < TX_PWR_BY_RATE_NUM_RF; tx_num++) {
-		if (tx_num >= hal_spec->max_tx_cnt || tx_num >= hal_spec->nss_num)
+	for (rate_idx = 0; rate_idx < TX_PWR_BY_RATE_NUM_RATE; rate_idx++) {
+		if (hal_data->TxPwrByRateOffset[band][path][rate_idx] != 0)
 			goto exit;
-		for (rate_idx = 0; rate_idx < TX_PWR_BY_RATE_NUM_RATE; rate_idx++) {
-			if (hal_data->TxPwrByRateOffset[band][path][tx_num][rate_idx] != 0)
-				goto exit;
-		}
 	}
 
 exit:
-	return (tx_num >= hal_spec->max_tx_cnt || tx_num >= hal_spec->nss_num) ? _TRUE : _FALSE;
+	return rate_idx >= TX_PWR_BY_RATE_NUM_RATE ? _TRUE : _FALSE;
 }
 
 static inline void phy_txpwr_by_rate_duplicate_band_path(_adapter *adapter, u8 band, u8 s_path, u8 t_path)
 {
 	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
-	u8 tx_num = 0, rate_idx = 0;
+	u8 rate_idx = 0;
 
-	for (tx_num = 0; tx_num < TX_PWR_BY_RATE_NUM_RF; tx_num++)
-		for (rate_idx = 0; rate_idx < TX_PWR_BY_RATE_NUM_RATE; rate_idx++)
-			hal_data->TxPwrByRateOffset[band][t_path][tx_num][rate_idx] = hal_data->TxPwrByRateOffset[band][s_path][tx_num][rate_idx];
+	for (rate_idx = 0; rate_idx < TX_PWR_BY_RATE_NUM_RATE; rate_idx++)
+		hal_data->TxPwrByRateOffset[band][t_path][rate_idx] = hal_data->TxPwrByRateOffset[band][s_path][rate_idx];
 }
 
 static void phy_txpwr_by_rate_chk_for_path_dup(_adapter *adapter)
@@ -1489,7 +1479,7 @@ phy_StoreTxPowerByRateBase(
 
 			for (rs = 0; rs < RATE_SECTION_NUM; rs++) {
 				tx_num = rate_section_to_tx_num(rs);
-				if (tx_num >= hal_spec->nss_num)
+				if (tx_num >= hal_spec->tx_nss_num)
 					continue;
 
 				if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs))
@@ -1501,8 +1491,8 @@ phy_StoreTxPowerByRateBase(
 				if (regsty->target_tx_pwr_valid == _TRUE)
 					base = 2 * rtw_regsty_get_target_tx_power(pAdapter, band, path, rs);
 				else
-					base = _PHY_GetTxPowerByRate(pAdapter, band, path, tx_num, rate_sec_base[rs]);
-				phy_SetTxPowerByRateBase(pAdapter, band, path, rs, tx_num, base);
+					base = _PHY_GetTxPowerByRate(pAdapter, band, path, rate_sec_base[rs]);
+				phy_SetTxPowerByRateBase(pAdapter, band, path, rs, base);
 			}
 		}
 	}
@@ -1903,7 +1893,6 @@ PHY_StoreTxPowerByRateNew(
 	IN	PADAPTER	pAdapter,
 	IN	u32			Band,
 	IN	u32			RfPath,
-	IN	u32			TxNum,
 	IN	u32			RegAddr,
 	IN	u32			BitMask,
 	IN	u32			Data
@@ -1925,24 +1914,10 @@ PHY_StoreTxPowerByRateNew(
 		return;
 	}
 
-	if (TxNum > ODM_RF_PATH_D) {
-		RTW_PRINT("Invalid TxNum %d\n", TxNum);
-		return;
-	}
-
 	for (i = 0; i < rateNum; ++i) {
 		u8 rate_idx = PHY_GetRateIndexOfTxPowerByRate(rates[i]);
 
-		if (IS_1T_RATE(rates[i]))
-			pHalData->TxPwrByRateOffset[Band][RfPath][RF_1TX][rate_idx] = PwrByRateVal[i];
-		else if (IS_2T_RATE(rates[i]))
-			pHalData->TxPwrByRateOffset[Band][RfPath][RF_2TX][rate_idx] = PwrByRateVal[i];
-		else if (IS_3T_RATE(rates[i]))
-			pHalData->TxPwrByRateOffset[Band][RfPath][RF_3TX][rate_idx] = PwrByRateVal[i];
-		else if (IS_4T_RATE(rates[i]))
-			pHalData->TxPwrByRateOffset[Band][RfPath][RF_4TX][rate_idx] = PwrByRateVal[i];
-		else
-			rtw_warn_on(1);
+		pHalData->TxPwrByRateOffset[Band][RfPath][rate_idx] = PwrByRateVal[i];
 	}
 }
 
@@ -1952,13 +1927,12 @@ PHY_InitTxPowerByRate(
 )
 {
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
-	u8	band = 0, rfPath = 0, TxNum = 0, rate = 0, i = 0, j = 0;
+	u8	band = 0, rfPath = 0, rate = 0, i = 0, j = 0;
 
 	for (band = BAND_ON_2_4G; band <= BAND_ON_5G; ++band)
 		for (rfPath = 0; rfPath < TX_PWR_BY_RATE_NUM_RF; ++rfPath)
-			for (TxNum = 0; TxNum < TX_PWR_BY_RATE_NUM_RF; ++TxNum)
 				for (rate = 0; rate < TX_PWR_BY_RATE_NUM_RATE; ++rate)
-					pHalData->TxPwrByRateOffset[band][rfPath][TxNum][rate] = 0;
+					pHalData->TxPwrByRateOffset[band][rfPath][rate] = 0;
 }
 
 VOID
@@ -1976,7 +1950,7 @@ phy_store_tx_power_by_rate(
 	struct PHY_DM_STRUCT		*pDM_Odm = &pHalData->odmpriv;
 
 	if (pDM_Odm->phy_reg_pg_version > 0)
-		PHY_StoreTxPowerByRateNew(pAdapter, Band, RfPath, TxNum, RegAddr, BitMask, Data);
+		PHY_StoreTxPowerByRateNew(pAdapter, Band, RfPath, RegAddr, BitMask, Data);
 	else
 		RTW_INFO("Invalid PHY_REG_PG.txt version %d\n",  pDM_Odm->phy_reg_pg_version);
 
@@ -1989,7 +1963,7 @@ phy_ConvertTxPowerByRateInDbmToRelativeValues(
 {
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
 	u8			base = 0, i = 0, value = 0,
-				band = 0, path = 0, txNum = 0, index = 0,
+				band = 0, path = 0, index = 0,
 				startIndex = 0, endIndex = 0;
 	u8	cckRates[4] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M},
 		ofdmRates[8] = {MGN_6M, MGN_9M, MGN_12M, MGN_18M, MGN_24M, MGN_36M, MGN_48M, MGN_54M},
@@ -2007,64 +1981,62 @@ phy_ConvertTxPowerByRateInDbmToRelativeValues(
 
 	for (band = BAND_ON_2_4G; band <= BAND_ON_5G; ++band) {
 		for (path = ODM_RF_PATH_A; path <= ODM_RF_PATH_D; ++path) {
-			for (txNum = RF_1TX; txNum < RF_MAX_TX_NUM; ++txNum) {
-				/* CCK */
-				if (band == BAND_ON_2_4G) {
-					base = PHY_GetTxPowerByRateBase(pAdapter, band, path, txNum, CCK);
-					for (i = 0; i < sizeof(cckRates); ++i) {
-						value = PHY_GetTxPowerByRate(pAdapter, band, path, txNum, cckRates[i]);
-						PHY_SetTxPowerByRate(pAdapter, band, path, txNum, cckRates[i], value - base);
-					}
+			/* CCK */
+			if (band == BAND_ON_2_4G) {
+				base = PHY_GetTxPowerByRateBase(pAdapter, band, path, CCK);
+				for (i = 0; i < sizeof(cckRates); ++i) {
+					value = PHY_GetTxPowerByRate(pAdapter, band, path, cckRates[i]);
+					PHY_SetTxPowerByRate(pAdapter, band, path, cckRates[i], value - base);
 				}
+			}
 
-				/* OFDM */
-				base = PHY_GetTxPowerByRateBase(pAdapter, band, path, txNum, OFDM);
-				for (i = 0; i < sizeof(ofdmRates); ++i) {
-					value = PHY_GetTxPowerByRate(pAdapter, band, path, txNum, ofdmRates[i]);
-					PHY_SetTxPowerByRate(pAdapter, band, path, txNum, ofdmRates[i], value - base);
-				}
+			/* OFDM */
+			base = PHY_GetTxPowerByRateBase(pAdapter, band, path, OFDM);
+			for (i = 0; i < sizeof(ofdmRates); ++i) {
+				value = PHY_GetTxPowerByRate(pAdapter, band, path, ofdmRates[i]);
+				PHY_SetTxPowerByRate(pAdapter, band, path, ofdmRates[i], value - base);
+			}
 
-				/* HT MCS0~7 */
-				base = PHY_GetTxPowerByRateBase(pAdapter, band, path, txNum, HT_1SS);
-				for (i = 0; i < sizeof(mcs0_7Rates); ++i) {
-					value = PHY_GetTxPowerByRate(pAdapter, band, path, txNum, mcs0_7Rates[i]);
-					PHY_SetTxPowerByRate(pAdapter, band, path, txNum, mcs0_7Rates[i], value - base);
-				}
+			/* HT MCS0~7 */
+			base = PHY_GetTxPowerByRateBase(pAdapter, band, path, HT_1SS);
+			for (i = 0; i < sizeof(mcs0_7Rates); ++i) {
+				value = PHY_GetTxPowerByRate(pAdapter, band, path, mcs0_7Rates[i]);
+				PHY_SetTxPowerByRate(pAdapter, band, path, mcs0_7Rates[i], value - base);
+			}
 
-				/* HT MCS8~15 */
-				base = PHY_GetTxPowerByRateBase(pAdapter, band, path, txNum, HT_2SS);
-				for (i = 0; i < sizeof(mcs8_15Rates); ++i) {
-					value = PHY_GetTxPowerByRate(pAdapter, band, path, txNum, mcs8_15Rates[i]);
-					PHY_SetTxPowerByRate(pAdapter, band, path, txNum, mcs8_15Rates[i], value - base);
-				}
+			/* HT MCS8~15 */
+			base = PHY_GetTxPowerByRateBase(pAdapter, band, path, HT_2SS);
+			for (i = 0; i < sizeof(mcs8_15Rates); ++i) {
+				value = PHY_GetTxPowerByRate(pAdapter, band, path, mcs8_15Rates[i]);
+				PHY_SetTxPowerByRate(pAdapter, band, path, mcs8_15Rates[i], value - base);
+			}
 
-				/* HT MCS16~23 */
-				base = PHY_GetTxPowerByRateBase(pAdapter, band, path, txNum, HT_3SS);
-				for (i = 0; i < sizeof(mcs16_23Rates); ++i) {
-					value = PHY_GetTxPowerByRate(pAdapter, band, path, txNum, mcs16_23Rates[i]);
-					PHY_SetTxPowerByRate(pAdapter, band, path, txNum, mcs16_23Rates[i], value - base);
-				}
+			/* HT MCS16~23 */
+			base = PHY_GetTxPowerByRateBase(pAdapter, band, path, HT_3SS);
+			for (i = 0; i < sizeof(mcs16_23Rates); ++i) {
+				value = PHY_GetTxPowerByRate(pAdapter, band, path, mcs16_23Rates[i]);
+				PHY_SetTxPowerByRate(pAdapter, band, path, mcs16_23Rates[i], value - base);
+			}
 
-				/* VHT 1SS */
-				base = PHY_GetTxPowerByRateBase(pAdapter, band, path, txNum, VHT_1SS);
-				for (i = 0; i < sizeof(vht1ssRates); ++i) {
-					value = PHY_GetTxPowerByRate(pAdapter, band, path, txNum, vht1ssRates[i]);
-					PHY_SetTxPowerByRate(pAdapter, band, path, txNum, vht1ssRates[i], value - base);
-				}
+			/* VHT 1SS */
+			base = PHY_GetTxPowerByRateBase(pAdapter, band, path, VHT_1SS);
+			for (i = 0; i < sizeof(vht1ssRates); ++i) {
+				value = PHY_GetTxPowerByRate(pAdapter, band, path, vht1ssRates[i]);
+				PHY_SetTxPowerByRate(pAdapter, band, path, vht1ssRates[i], value - base);
+			}
 
-				/* VHT 2SS */
-				base = PHY_GetTxPowerByRateBase(pAdapter, band, path, txNum, VHT_2SS);
-				for (i = 0; i < sizeof(vht2ssRates); ++i) {
-					value = PHY_GetTxPowerByRate(pAdapter, band, path, txNum, vht2ssRates[i]);
-					PHY_SetTxPowerByRate(pAdapter, band, path, txNum, vht2ssRates[i], value - base);
-				}
+			/* VHT 2SS */
+			base = PHY_GetTxPowerByRateBase(pAdapter, band, path, VHT_2SS);
+			for (i = 0; i < sizeof(vht2ssRates); ++i) {
+				value = PHY_GetTxPowerByRate(pAdapter, band, path, vht2ssRates[i]);
+				PHY_SetTxPowerByRate(pAdapter, band, path, vht2ssRates[i], value - base);
+			}
 
-				/* VHT 3SS */
-				base = PHY_GetTxPowerByRateBase(pAdapter, band, path, txNum, VHT_3SS);
-				for (i = 0; i < sizeof(vht3ssRates); ++i) {
-					value = PHY_GetTxPowerByRate(pAdapter, band, path, txNum, vht3ssRates[i]);
-					PHY_SetTxPowerByRate(pAdapter, band, path, txNum, vht3ssRates[i], value - base);
-				}
+			/* VHT 3SS */
+			base = PHY_GetTxPowerByRateBase(pAdapter, band, path, VHT_3SS);
+			for (i = 0; i < sizeof(vht3ssRates); ++i) {
+				value = PHY_GetTxPowerByRate(pAdapter, band, path, vht3ssRates[i]);
+				PHY_SetTxPowerByRate(pAdapter, band, path, vht3ssRates[i], value - base);
 			}
 		}
 	}
@@ -2145,6 +2117,7 @@ PHY_GetTxPowerIndexBase(
 	IN	PADAPTER		pAdapter,
 	IN	u8				RFPath,
 	IN	u8				Rate,
+	u8 ntx_idx,
 	IN	CHANNEL_WIDTH	BandWidth,
 	IN	u8				Channel,
 	OUT PBOOLEAN		bIn24G
@@ -2163,141 +2136,157 @@ PHY_GetTxPowerIndexBase(
 
 	*bIn24G = phy_GetChnlIndex(Channel, &chnlIdx);
 
-	/* RTW_INFO("[%s] Channel Index: %d\n", (*bIn24G?"2.4G":"5G"), chnlIdx); */
+	if (0)
+		RTW_INFO("[%s] Channel Index: %d\n", (*bIn24G ? "2.4G" : "5G"), chnlIdx);
 
-	if (*bIn24G) { /* 3 ============================== 2.4 G ============================== */
-		if (IS_CCK_RATE(Rate))
+	if (*bIn24G) {
+		if (IS_CCK_RATE(Rate)) {
+			/* CCK-nTX */
 			txPower = pHalData->Index24G_CCK_Base[RFPath][chnlIdx];
-		else if (MGN_6M <= Rate)
-			txPower = pHalData->Index24G_BW40_Base[RFPath][chnlIdx];
-		else
-			RTW_INFO("PHY_GetTxPowerIndexBase: INVALID Rate(0x%02x).\n", Rate);
+			txPower += pHalData->CCK_24G_Diff[RFPath][RF_1TX];
+			if (ntx_idx >= RF_2TX)
+				txPower += pHalData->CCK_24G_Diff[RFPath][RF_2TX];
+			if (ntx_idx >= RF_3TX)
+				txPower += pHalData->CCK_24G_Diff[RFPath][RF_3TX];
+			if (ntx_idx >= RF_4TX)
+				txPower += pHalData->CCK_24G_Diff[RFPath][RF_4TX];
+			goto exit;
+		}
 
-		/* RTW_INFO("Base Tx power(RF-%c, Rate #%d, Channel Index %d) = 0x%X\n",  */
-		/*		((RFPath==0)?'A':'B'), Rate, chnlIdx, txPower); */
+		txPower = pHalData->Index24G_BW40_Base[RFPath][chnlIdx];
 
-		/* OFDM-1T */
+		/* OFDM-nTX */
 		if ((MGN_6M <= Rate && Rate <= MGN_54M) && !IS_CCK_RATE(Rate)) {
-			txPower += pHalData->OFDM_24G_Diff[RFPath][TX_1S];
-			/* RTW_INFO("+PowerDiff 2.4G (RF-%c): (OFDM-1T) = (%d)\n", ((RFPath==0)?'A':'B'), pHalData->OFDM_24G_Diff[RFPath][TX_1S]); */
+			txPower += pHalData->OFDM_24G_Diff[RFPath][RF_1TX];
+			if (ntx_idx >= RF_2TX)
+				txPower += pHalData->OFDM_24G_Diff[RFPath][RF_2TX];
+			if (ntx_idx >= RF_3TX)
+				txPower += pHalData->OFDM_24G_Diff[RFPath][RF_3TX];
+			if (ntx_idx >= RF_4TX)
+				txPower += pHalData->OFDM_24G_Diff[RFPath][RF_4TX];
+			goto exit;
 		}
-		/* BW20-1S, BW20-2S */
+
+		/* BW20-nS */
 		if (BandWidth == CHANNEL_WIDTH_20) {
 			if ((MGN_MCS0 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT1SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW20_24G_Diff[RFPath][TX_1S];
+				txPower += pHalData->BW20_24G_Diff[RFPath][RF_1TX];
 			if ((MGN_MCS8 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT2SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW20_24G_Diff[RFPath][TX_2S];
+				txPower += pHalData->BW20_24G_Diff[RFPath][RF_2TX];
 			if ((MGN_MCS16 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT3SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW20_24G_Diff[RFPath][TX_3S];
+				txPower += pHalData->BW20_24G_Diff[RFPath][RF_3TX];
 			if ((MGN_MCS24 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT4SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW20_24G_Diff[RFPath][TX_4S];
-
-			/* RTW_INFO("+PowerDiff 2.4G (RF-%c): (BW20-1S, BW20-2S, BW20-3S, BW20-4S) = (%d, %d, %d, %d)\n", ((RFPath==0)?'A':(RFPath==1)?'B':(RFPath==2)?'C':'D'),  */
-			/*	pHalData->BW20_24G_Diff[RFPath][TX_1S], pHalData->BW20_24G_Diff[RFPath][TX_2S],  */
-			/*	pHalData->BW20_24G_Diff[RFPath][TX_3S], pHalData->BW20_24G_Diff[RFPath][TX_4S]); */
+				txPower += pHalData->BW20_24G_Diff[RFPath][RF_4TX];
+			goto exit;
 		}
-		/* BW40-1S, BW40-2S */
-		else if (BandWidth == CHANNEL_WIDTH_40) {
+
+		/* BW40-nS */
+		if (BandWidth == CHANNEL_WIDTH_40) {
 			if ((MGN_MCS0 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT1SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW40_24G_Diff[RFPath][TX_1S];
+				txPower += pHalData->BW40_24G_Diff[RFPath][RF_1TX];
 			if ((MGN_MCS8 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT2SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW40_24G_Diff[RFPath][TX_2S];
+				txPower += pHalData->BW40_24G_Diff[RFPath][RF_2TX];
 			if ((MGN_MCS16 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT3SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW40_24G_Diff[RFPath][TX_3S];
+				txPower += pHalData->BW40_24G_Diff[RFPath][RF_3TX];
 			if ((MGN_MCS24 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT4SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW40_24G_Diff[RFPath][TX_4S];
-
-			/* RTW_INFO("+PowerDiff 2.4G (RF-%c): (BW40-1S, BW40-2S, BW40-3S, BW40-4S) = (%d, %d, %d, %d)\n", ((RFPath==0)?'A':(RFPath==1)?'B':(RFPath==2)?'C':'D'),  */
-			/*	pHalData->BW40_24G_Diff[RFPath][TX_1S], pHalData->BW40_24G_Diff[RFPath][TX_2S], */
-			/*	pHalData->BW40_24G_Diff[RFPath][TX_3S], pHalData->BW40_24G_Diff[RFPath][TX_4S]); */
+				txPower += pHalData->BW40_24G_Diff[RFPath][RF_4TX];
+			goto exit;
 		}
+
 		/* Willis suggest adopt BW 40M power index while in BW 80 mode */
-		else if (BandWidth == CHANNEL_WIDTH_80) {
+		if (BandWidth == CHANNEL_WIDTH_80) {
 			if ((MGN_MCS0 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT1SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW40_24G_Diff[RFPath][TX_1S];
+				txPower += pHalData->BW40_24G_Diff[RFPath][RF_1TX];
 			if ((MGN_MCS8 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT2SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW40_24G_Diff[RFPath][TX_2S];
+				txPower += pHalData->BW40_24G_Diff[RFPath][RF_2TX];
 			if ((MGN_MCS16 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT3SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW40_24G_Diff[RFPath][TX_3S];
+				txPower += pHalData->BW40_24G_Diff[RFPath][RF_3TX];
 			if ((MGN_MCS24 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT4SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW40_24G_Diff[RFPath][TX_4S];
-
-			/* RTW_INFO("+PowerDiff 2.4G (RF-%c): (BW40-1S, BW40-2S, BW40-3S, BW40-4T) = (%d, %d, %d, %d) P.S. Current is in BW 80MHz\n", ((RFPath==0)?'A':(RFPath==1)?'B':(RFPath==2)?'C':'D'),  */
-			/*	pHalData->BW40_24G_Diff[RFPath][TX_1S], pHalData->BW40_24G_Diff[RFPath][TX_2S], */
-			/*	pHalData->BW40_24G_Diff[RFPath][TX_3S], pHalData->BW40_24G_Diff[RFPath][TX_4S]); */
+				txPower += pHalData->BW40_24G_Diff[RFPath][RF_4TX];
+			goto exit;
 		}
 	}
 #ifdef CONFIG_IEEE80211_BAND_5GHZ
-	else { /* 3 ============================== 5 G ============================== */
-		if (MGN_6M <= Rate)
+	else {
+		if (Rate >= MGN_6M)
 			txPower = pHalData->Index5G_BW40_Base[RFPath][chnlIdx];
-		else
+		else {
 			RTW_INFO("===>PHY_GetTxPowerIndexBase: INVALID Rate(0x%02x).\n", Rate);
+			goto exit;
+		}
 
-		/* RTW_INFO("Base Tx power(RF-%c, Rate #%d, Channel Index %d) = 0x%X\n",  */
-		/*	((RFPath==0)?'A':'B'), Rate, chnlIdx, txPower); */
-
-		/* OFDM-1T */
+		/* OFDM-nTX */
 		if ((MGN_6M <= Rate && Rate <= MGN_54M) && !IS_CCK_RATE(Rate)) {
-			txPower += pHalData->OFDM_5G_Diff[RFPath][TX_1S];
-			/* RTW_INFO("+PowerDiff 5G (RF-%c): (OFDM-1T) = (%d)\n", ((RFPath==0)?'A':'B'), pHalData->OFDM_5G_Diff[RFPath][TX_1S]); */
+			txPower += pHalData->OFDM_5G_Diff[RFPath][RF_1TX];
+			if (ntx_idx >= RF_2TX)
+				txPower += pHalData->OFDM_5G_Diff[RFPath][RF_2TX];
+			if (ntx_idx >= RF_3TX)
+				txPower += pHalData->OFDM_5G_Diff[RFPath][RF_3TX];
+			if (ntx_idx >= RF_4TX)
+				txPower += pHalData->OFDM_5G_Diff[RFPath][RF_4TX];
+			goto exit;
 		}
 
-		/* BW20-1S, BW20-2S */
+		/* BW20-nS */
 		if (BandWidth == CHANNEL_WIDTH_20) {
 			if ((MGN_MCS0 <= Rate && Rate <= MGN_MCS31)  || (MGN_VHT1SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW20_5G_Diff[RFPath][TX_1S];
+				txPower += pHalData->BW20_5G_Diff[RFPath][RF_1TX];
 			if ((MGN_MCS8 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT2SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW20_5G_Diff[RFPath][TX_2S];
+				txPower += pHalData->BW20_5G_Diff[RFPath][RF_2TX];
 			if ((MGN_MCS16 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT3SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW20_5G_Diff[RFPath][TX_3S];
+				txPower += pHalData->BW20_5G_Diff[RFPath][RF_3TX];
 			if ((MGN_MCS24 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT4SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW20_5G_Diff[RFPath][TX_4S];
-
-			/* RTW_INFO("+PowerDiff 5G (RF-%c): (BW20-1S, BW20-2S, BW20-3S, BW20-4S) = (%d, %d, %d, %d)\n", ((RFPath==0)?'A':(RFPath==1)?'B':(RFPath==2)?'C':'D'),  */
-			/*	pHalData->BW20_5G_Diff[RFPath][TX_1S], pHalData->BW20_5G_Diff[RFPath][TX_2S], */
-			/*	pHalData->BW20_5G_Diff[RFPath][TX_3S], pHalData->BW20_5G_Diff[RFPath][TX_4S]); */
+				txPower += pHalData->BW20_5G_Diff[RFPath][RF_4TX];
+			goto exit;
 		}
-		/* BW40-1S, BW40-2S */
-		else if (BandWidth == CHANNEL_WIDTH_40) {
+
+		/* BW40-nS */
+		if (BandWidth == CHANNEL_WIDTH_40) {
 			if ((MGN_MCS0 <= Rate && Rate <= MGN_MCS31)  || (MGN_VHT1SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW40_5G_Diff[RFPath][TX_1S];
+				txPower += pHalData->BW40_5G_Diff[RFPath][RF_1TX];
 			if ((MGN_MCS8 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT2SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW40_5G_Diff[RFPath][TX_2S];
+				txPower += pHalData->BW40_5G_Diff[RFPath][RF_2TX];
 			if ((MGN_MCS16 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT3SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW40_5G_Diff[RFPath][TX_3S];
+				txPower += pHalData->BW40_5G_Diff[RFPath][RF_3TX];
 			if ((MGN_MCS24 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT4SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW40_5G_Diff[RFPath][TX_4S];
-
-			/* RTW_INFO("+PowerDiff 5G(RF-%c): (BW40-1S, BW40-2S) = (%d, %d, %d, %d)\n", ((RFPath==0)?'A':(RFPath==1)?'B':(RFPath==2)?'C':'D'),  */
-			/*	pHalData->BW40_5G_Diff[RFPath][TX_1S], pHalData->BW40_5G_Diff[RFPath][TX_2S], */
-			/*	pHalData->BW40_5G_Diff[RFPath][TX_3S], pHalData->BW40_5G_Diff[RFPath][TX_4S]); */
+				txPower += pHalData->BW40_5G_Diff[RFPath][RF_4TX];
+			goto exit;
 		}
-		/* BW80-1S, BW80-2S */
-		else if (BandWidth == CHANNEL_WIDTH_80) {
-			/* <20121220, Kordan> Get the index of array "Index5G_BW80_Base". */
-			for (i = 0; i < CENTER_CH_5G_80M_NUM; ++i)
-				if (center_ch_5g_80m[i] == Channel)
+
+		/* BW80-nS */
+		if (BandWidth == CHANNEL_WIDTH_80) {
+			/* get 80MHz cch index */
+			for (i = 0; i < CENTER_CH_5G_80M_NUM; ++i) {
+				if (center_ch_5g_80m[i] == Channel) {
 					chnlIdx = i;
+					break;
+				}
+			}
+			if (i >= CENTER_CH_5G_80M_NUM) {
+				rtw_warn_on(1);
+				txPower = 0;
+				goto exit;
+			}
 
 			txPower = pHalData->Index5G_BW80_Base[RFPath][chnlIdx];
 
 			if ((MGN_MCS0 <= Rate && Rate <= MGN_MCS31)  || (MGN_VHT1SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += + pHalData->BW80_5G_Diff[RFPath][TX_1S];
+				txPower += + pHalData->BW80_5G_Diff[RFPath][RF_1TX];
 			if ((MGN_MCS8 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT2SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW80_5G_Diff[RFPath][TX_2S];
+				txPower += pHalData->BW80_5G_Diff[RFPath][RF_2TX];
 			if ((MGN_MCS16 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT3SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW80_5G_Diff[RFPath][TX_3S];
+				txPower += pHalData->BW80_5G_Diff[RFPath][RF_3TX];
 			if ((MGN_MCS23 <= Rate && Rate <= MGN_MCS31) || (MGN_VHT4SS_MCS0 <= Rate && Rate <= MGN_VHT4SS_MCS9))
-				txPower += pHalData->BW80_5G_Diff[RFPath][TX_4S];
-
-			/* RTW_INFO("+PowerDiff 5G(RF-%c): (BW80-1S, BW80-2S, BW80-3S, BW80-4S) = (%d, %d, %d, %d)\n",((RFPath==0)?'A':(RFPath==1)?'B':(RFPath==2)?'C':'D'),  */
-			/*	pHalData->BW80_5G_Diff[RFPath][TX_1S], pHalData->BW80_5G_Diff[RFPath][TX_2S], */
-			/*	pHalData->BW80_5G_Diff[RFPath][TX_3S], pHalData->BW80_5G_Diff[RFPath][TX_4S]); */
+				txPower += pHalData->BW80_5G_Diff[RFPath][RF_4TX];
+			goto exit;
 		}
+
+		/* TODO: BW160-nS */
+		rtw_warn_on(1);
 	}
 #endif /* CONFIG_IEEE80211_BAND_5GHZ */
 
+exit:
 	return txPower;
 }
 
@@ -2600,7 +2589,6 @@ _PHY_GetTxPowerByRate(
 	IN	PADAPTER	pAdapter,
 	IN	u8			Band,
 	IN	u8			RFPath,
-	IN	u8			TxNum,
 	IN	u8			Rate
 )
 {
@@ -2616,16 +2604,12 @@ _PHY_GetTxPowerByRate(
 		RTW_INFO("Invalid RfPath %d in %s\n", RFPath, __func__);
 		goto exit;
 	}
-	if (TxNum >= RF_MAX_TX_NUM) {
-		RTW_INFO("Invalid TxNum %d in %s\n", TxNum, __func__);
-		goto exit;
-	}
 	if (rateIndex >= TX_PWR_BY_RATE_NUM_RATE) {
 		RTW_INFO("Invalid RateIndex %d in %s\n", rateIndex, __func__);
 		goto exit;
 	}
 
-	value = pHalData->TxPwrByRateOffset[Band][RFPath][TxNum][rateIndex];
+	value = pHalData->TxPwrByRateOffset[Band][RFPath][rateIndex];
 
 exit:
 	return value;
@@ -2637,65 +2621,20 @@ PHY_GetTxPowerByRate(
 	IN	PADAPTER	pAdapter,
 	IN	u8			Band,
 	IN	u8			RFPath,
-	IN	u8			TxNum,
 	IN	u8			Rate
 )
 {
 	if (!phy_is_tx_power_by_rate_needed(pAdapter))
 		return 0;
 
-	return _PHY_GetTxPowerByRate(pAdapter, Band, RFPath, TxNum, Rate);
-}
-
-#ifdef CONFIG_PHYDM_POWERTRACK_BY_TSSI
-s8
-PHY_GetTxPowerByRateOriginal(
-	IN	PADAPTER	pAdapter,
-	IN	u8			Band,
-	IN	u8			RFPath,
-	IN	u8			TxNum,
-	IN	u8			Rate
-)
-{
-	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
-	s8	value = 0, limit = 0;
-	u8	rateIndex = PHY_GetRateIndexOfTxPowerByRate(Rate);
-
-	if ((pAdapter->registrypriv.RegEnableTxPowerByRate == 2 && pHalData->EEPROMRegulatory == 2) ||
-		pAdapter->registrypriv.RegEnableTxPowerByRate == 0)
-		return 0;
-
-	if (Band != BAND_ON_2_4G && Band != BAND_ON_5G) {
-		DBG_871X("Invalid band %d in %s\n", Band, __func__);
-		return value;
-	}
-	if (RFPath > ODM_RF_PATH_D) {
-		DBG_871X("Invalid RfPath %d in %s\n", RFPath, __func__);
-		return value;
-	}
-	if (TxNum >= RF_MAX_TX_NUM) {
-		DBG_871X("Invalid TxNum %d in %s\n", TxNum, __func__);
-		return value;
-	}
-	if (rateIndex >= TX_PWR_BY_RATE_NUM_RATE) {
-		DBG_871X("Invalid RateIndex %d in %s\n", rateIndex, __func__);
-		return value;
-	}
-
-	value = pHalData->TxPwrByRate[Band][RFPath][TxNum][rateIndex];
-
-	return value;
+	return _PHY_GetTxPowerByRate(pAdapter, Band, RFPath, Rate);
 }
 
-#endif
-
-
 VOID
 PHY_SetTxPowerByRate(
 	IN	PADAPTER	pAdapter,
 	IN	u8			Band,
 	IN	u8			RFPath,
-	IN	u8			TxNum,
 	IN	u8			Rate,
 	IN	s8			Value
 )
@@ -2711,16 +2650,12 @@ PHY_SetTxPowerByRate(
 		RTW_INFO("Invalid RfPath %d in %s\n", RFPath, __FUNCTION__);
 		return;
 	}
-	if (TxNum >= RF_MAX_TX_NUM) {
-		RTW_INFO("Invalid TxNum %d in %s\n", TxNum, __FUNCTION__);
-		return;
-	}
 	if (rateIndex >= TX_PWR_BY_RATE_NUM_RATE) {
 		RTW_INFO("Invalid RateIndex %d in %s\n", rateIndex, __FUNCTION__);
 		return;
 	}
 
-	pHalData->TxPwrByRateOffset[Band][RFPath][TxNum][rateIndex] = Value;
+	pHalData->TxPwrByRateOffset[Band][RFPath][rateIndex] = Value;
 }
 
 VOID
@@ -2780,8 +2715,8 @@ PHY_SetTxPowerIndexByRateArray(
 		struct txpwr_idx_comp tic;
 
 		powerIndex = rtw_hal_get_tx_power_index(pAdapter, RFPath, Rates[i], BandWidth, Channel, &tic);
-		RTW_INFO("TXPWR: [%c][%s]ch:%u, %s, pwr_idx:%u = %u + (%d=%d:%d) + (%d) + (%d)\n"
-			, rf_path_char(RFPath), ch_width_str(BandWidth), Channel, MGN_RATE_STR(Rates[i])
+		RTW_INFO("TXPWR: [%c][%s]ch:%u, %s %uT, pwr_idx:%u = %u + (%d=%d:%d) + (%d) + (%d)\n"
+			, rf_path_char(RFPath), ch_width_str(BandWidth), Channel, MGN_RATE_STR(Rates[i]), tic.ntx_idx + 1
 			, powerIndex, tic.base, (tic.by_rate > tic.limit ? tic.limit : tic.by_rate), tic.by_rate, tic.limit, tic.tpt, tic.ebias);
 #else
 		powerIndex = phy_get_tx_power_index(pAdapter, RFPath, Rates[i], BandWidth, Channel);
@@ -2790,23 +2725,16 @@ PHY_SetTxPowerIndexByRateArray(
 	}
 }
 
-s8
-phy_GetWorldWideLimit(
-	s8 *LimitTable
-)
-{
-	s8	min = LimitTable[0];
-	u8	i = 0;
-
-	for (i = 0; i < MAX_REGULATION_NUM; ++i) {
-		if (LimitTable[i] < min)
-			min = LimitTable[i];
-	}
-
-	return min;
-}
+#ifdef CONFIG_TXPWR_LIMIT
+const char *const _txpwr_lmt_rs_str[] = {
+	"CCK",
+	"OFDM",
+	"HT",
+	"VHT",
+	"UNKNOWN",
+};
 
-s8
+static s8
 phy_GetChannelIndexOfTxPowerLimit(
 	IN	u8			Band,
 	IN	u8			Channel
@@ -2831,104 +2759,202 @@ phy_GetChannelIndexOfTxPowerLimit(
 	return channelIndex;
 }
 
-static s8 _phy_get_txpwr_lmt(
+/* return txpwr limit absolute value */
+s8 phy_get_txpwr_lmt_abs(
 	IN	PADAPTER			Adapter,
-	IN	u32					RegPwrTblSel,
+	IN	const char			*regd_name,
 	IN	BAND_TYPE			Band,
-	IN	CHANNEL_WIDTH		Bandwidth,
-	IN	u8					RfPath,
-	IN	u8					DataRate,
-	IN	u8					Channel,
-	BOOLEAN no_sc
+	IN	CHANNEL_WIDTH		bw,
+	u8 tlrs,
+	u8 ntx_idx,
+	u8 cch,
+	u8 lock
 )
 {
 	struct dvobj_priv *dvobj = adapter_to_dvobj(Adapter);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(Adapter);
 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(Adapter);
-	s8 regulation = -1, bw = -1, rs = -1;
-	u8 cch = 0;
-	u8 bw_bmp = 0;
-	s8 min_lmt = MAX_POWER_INDEX;
-	s8 tmp_lmt;
-	u8 final_bw = Bandwidth, final_cch = Channel;
+	struct txpwr_lmt_ent *ent = NULL;
+	_irqL irqL;
+	_list *cur, *head;
+	s8 ch_idx;
+	u8 is_ww_regd = 0;
+	s8 lmt = MAX_POWER_INDEX;
 
 	if ((Adapter->registrypriv.RegEnableTxPowerLimit == 2 && hal_data->EEPROMRegulatory != 1) ||
 		Adapter->registrypriv.RegEnableTxPowerLimit == 0)
 		goto exit;
 
-	switch (RegPwrTblSel) {
-	case 1:
-		regulation = TXPWR_LMT_ETSI;
-		break;
-	case 2:
-		regulation = TXPWR_LMT_MKK;
-		break;
-	case 3:
-		regulation = TXPWR_LMT_FCC;
-		break;
-	case 4:
-		regulation = TXPWR_LMT_WW;
-		break;
-	default:
-		regulation = (Band == BAND_ON_2_4G) ? hal_data->Regulation2_4G : hal_data->Regulation5G;
-		break;
-	}
-
 	if (Band != BAND_ON_2_4G && Band != BAND_ON_5G) {
 		RTW_ERR("%s invalid band:%u\n", __func__, Band);
 		rtw_warn_on(1);
 		goto exit;
 	}
 
-	if (IS_CCK_RATE(DataRate))
-		rs = CCK;
-	else if (IS_OFDM_RATE(DataRate))
-		rs = OFDM;
-	else if (IS_HT1SS_RATE(DataRate))
-		rs = HT_1SS;
-	else if (IS_HT2SS_RATE(DataRate))
-		rs = HT_2SS;
-	else if (IS_HT3SS_RATE(DataRate))
-		rs = HT_3SS;
-	else if (IS_HT4SS_RATE(DataRate))
-		rs = HT_4SS;
-	else if (IS_VHT1SS_RATE(DataRate))
-		rs = VHT_1SS;
-	else if (IS_VHT2SS_RATE(DataRate))
-		rs = VHT_2SS;
-	else if (IS_VHT3SS_RATE(DataRate))
-		rs = VHT_3SS;
-	else if (IS_VHT4SS_RATE(DataRate))
-		rs = VHT_4SS;
+	if (Band == BAND_ON_5G  && tlrs == TXPWR_LMT_RS_CCK) {
+		RTW_ERR("5G has no CCK\n");
+		goto exit;
+	}
+
+	if (lock)
+		_enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+
+	if (!regd_name) /* no regd_name specified, use currnet */
+		regd_name = rfctl->regd_name;
+
+	if (rfctl->txpwr_regd_num == 0
+		|| strcmp(regd_name, regd_str(TXPWR_LMT_NONE)) == 0)
+		goto release_lock;
+
+	if (strcmp(regd_name, regd_str(TXPWR_LMT_WW)) == 0)
+		is_ww_regd = 1;
+
+	if (!is_ww_regd) {
+		ent = _rtw_txpwr_lmt_get_by_name(rfctl, regd_name);
+		if (!ent)
+			goto release_lock;
+	}
+
+	ch_idx = phy_GetChannelIndexOfTxPowerLimit(Band, cch);
+	if (ch_idx == -1)
+		goto release_lock;
+
+	if (Band == BAND_ON_2_4G) {
+		if (is_ww_regd) {
+			lmt = MAX_POWER_INDEX;
+			head = &rfctl->txpwr_lmt_list;
+			cur = get_next(head);
+			while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
+				ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
+				cur = get_next(cur);
+				lmt = rtw_min(lmt, ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx]);
+			}
+		} else
+			lmt = ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx];
+	}
+	#ifdef CONFIG_IEEE80211_BAND_5GHZ
+	else if (Band == BAND_ON_5G) {
+		if (is_ww_regd) {
+			lmt = MAX_POWER_INDEX;
+			head = &rfctl->txpwr_lmt_list;
+			cur = get_next(head);
+			while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
+				ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
+				cur = get_next(cur);
+				lmt = rtw_min(lmt, ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx]);
+			}
+		} else
+			lmt = ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx];
+	}
+	#endif
+
+release_lock:
+	if (lock)
+		_exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+
+exit:
+	return lmt;
+}
+
+/* return txpwr limit diff value */
+inline s8 phy_get_txpwr_lmt(_adapter *adapter
+	, const char *regd_name
+	, BAND_TYPE band, CHANNEL_WIDTH bw
+	, u8 rfpath, u8 rs, u8 ntx_idx, u8 cch, u8 lock
+)
+{
+	u8 tlrs;
+	s8 lmt = MAX_POWER_INDEX;
+
+	if (IS_CCK_RATE_SECTION(rs))
+		tlrs = TXPWR_LMT_RS_CCK;
+	else if (IS_OFDM_RATE_SECTION(rs))
+		tlrs = TXPWR_LMT_RS_OFDM;
+	else if (IS_HT_RATE_SECTION(rs))
+		tlrs = TXPWR_LMT_RS_HT;
+	else if (IS_VHT_RATE_SECTION(rs))
+		tlrs = TXPWR_LMT_RS_VHT;
 	else {
-		RTW_ERR("%s invalid rate 0x%x\n", __func__, DataRate);
+		RTW_ERR("%s invalid rs %u\n", __func__, rs);
 		rtw_warn_on(1);
 		goto exit;
 	}
 
-	if (Band == BAND_ON_5G  && rs == CCK) {
-		RTW_ERR("Wrong rate No CCK(0x%x) in 5G Band\n", DataRate);
+	lmt = phy_get_txpwr_lmt_abs(adapter, regd_name, band, bw, tlrs, ntx_idx, cch, lock);
+
+	if (lmt != MAX_POWER_INDEX) {
+		/* return diff value */
+		lmt = lmt - PHY_GetTxPowerByRateBase(adapter, band, rfpath, rs);
+	}
+
+exit:
+	return lmt;
+}
+
+/*
+* May search for secondary channels for min limit
+* return txpwr limit diff value
+*/
+s8
+PHY_GetTxPowerLimit(_adapter *adapter
+	, const char *regd_name
+	, BAND_TYPE band, CHANNEL_WIDTH bw
+	, u8 rfpath, u8 rate, u8 ntx_idx, u8 cch)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
+	BOOLEAN no_sc = _FALSE;
+	s8 tlrs = -1, rs = -1;
+	s8 lmt = MAX_POWER_INDEX;
+	u8 tmp_cch = 0;
+	u8 tmp_bw;
+	u8 bw_bmp = 0;
+	s8 min_lmt = MAX_POWER_INDEX;
+	u8 final_bw = bw, final_cch = cch;
+	_irqL irqL;
+
+	/* MP mode channel don't use secondary channel */
+	if (rtw_mp_mode_check(adapter) == _TRUE)
+		no_sc = _TRUE;
+
+	if (IS_CCK_RATE(rate)) {
+		tlrs = TXPWR_LMT_RS_CCK;
+		rs = CCK;
+	} else if (IS_OFDM_RATE(rate)) {
+		tlrs = TXPWR_LMT_RS_OFDM;
+		rs = OFDM;
+	} else if (IS_HT_RATE(rate)) {
+		tlrs = TXPWR_LMT_RS_HT;
+		rs = HT_1SS + (IS_HT1SS_RATE(rate) ? 0 : IS_HT2SS_RATE(rate) ? 1 : IS_HT3SS_RATE(rate) ? 2 : IS_HT4SS_RATE(rate) ? 3 : 0);
+	} else if (IS_VHT_RATE(rate)) {
+		tlrs = TXPWR_LMT_RS_VHT;
+		rs = VHT_1SS + (IS_VHT1SS_RATE(rate) ? 0 : IS_VHT2SS_RATE(rate) ? 1 : IS_VHT3SS_RATE(rate) ? 2 : IS_VHT4SS_RATE(rate) ? 3 : 0);
+	} else {
+		RTW_ERR("%s invalid rate 0x%x\n", __func__, rate);
+		rtw_warn_on(1);
 		goto exit;
 	}
 
 	if (no_sc == _TRUE) {
 		/* use the input center channel and bandwidth directly */
-		cch = Channel;
-		bw_bmp = ch_width_to_bw_cap(Bandwidth);
+		tmp_cch = cch;
+		bw_bmp = ch_width_to_bw_cap(bw);
 	} else {
 		/*
 		* find the possible tx bandwidth bmp for this rate, and then will get center channel for each bandwidth
 		* if no possible tx bandwidth bmp, select valid bandwidth up to current RF bandwidth into bmp
 		*/
-		if (rs == CCK || rs == OFDM)
+		if (tlrs == TXPWR_LMT_RS_CCK || tlrs == TXPWR_LMT_RS_OFDM)
 			bw_bmp = BW_CAP_20M; /* CCK, OFDM only BW 20M */
-		else if (IS_HT_RATE_SECTION(rs)) {
-			bw_bmp = rtw_get_tx_bw_bmp_of_ht_rate(dvobj, DataRate, Bandwidth);
+		else if (tlrs == TXPWR_LMT_RS_HT) {
+			bw_bmp = rtw_get_tx_bw_bmp_of_ht_rate(dvobj, rate, bw);
 			if (bw_bmp == 0)
-				bw_bmp = ch_width_to_bw_cap(Bandwidth > CHANNEL_WIDTH_40 ? CHANNEL_WIDTH_40 : Bandwidth);
-		} else if (IS_VHT_RATE_SECTION(rs)) {
-			bw_bmp = rtw_get_tx_bw_bmp_of_vht_rate(dvobj, DataRate, Bandwidth);
+				bw_bmp = ch_width_to_bw_cap(bw > CHANNEL_WIDTH_40 ? CHANNEL_WIDTH_40 : bw);
+		} else if (tlrs == TXPWR_LMT_RS_VHT) {
+			bw_bmp = rtw_get_tx_bw_bmp_of_vht_rate(dvobj, rate, bw);
 			if (bw_bmp == 0)
-				bw_bmp = ch_width_to_bw_cap(Bandwidth > CHANNEL_WIDTH_160 ? CHANNEL_WIDTH_160 : Bandwidth);
+				bw_bmp = ch_width_to_bw_cap(bw > CHANNEL_WIDTH_160 ? CHANNEL_WIDTH_160 : bw);
 		} else
 			rtw_warn_on(1);
 	}
@@ -2936,431 +2962,189 @@ static s8 _phy_get_txpwr_lmt(
 	if (bw_bmp == 0)
 		goto exit;
 
-	/* loop for each possible tx bandwidth to find minimum limit */
-	for (bw = CHANNEL_WIDTH_20; bw <= Bandwidth; bw++) {
-		s8 ch_idx;
+	_enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
 
-		if (!(ch_width_to_bw_cap(bw) & bw_bmp))
+	/* loop for each possible tx bandwidth to find minimum limit */
+	for (tmp_bw = CHANNEL_WIDTH_20; tmp_bw <= bw; tmp_bw++) {
+		if (!(ch_width_to_bw_cap(tmp_bw) & bw_bmp))
 			continue;
 
 		if (no_sc == _FALSE) {
-			if (bw == CHANNEL_WIDTH_20)
-				cch = hal_data->cch_20;
-			else if (bw == CHANNEL_WIDTH_40)
-				cch = hal_data->cch_40;
-			else if (bw == CHANNEL_WIDTH_80)
-				cch = hal_data->cch_80;
+			if (tmp_bw == CHANNEL_WIDTH_20)
+				tmp_cch = hal_data->cch_20;
+			else if (tmp_bw == CHANNEL_WIDTH_40)
+				tmp_cch = hal_data->cch_40;
+			else if (tmp_bw == CHANNEL_WIDTH_80)
+				tmp_cch = hal_data->cch_80;
 			else {
-				cch = 0;
+				tmp_cch = 0;
 				rtw_warn_on(1);
 			}
 		}
 
-		ch_idx = phy_GetChannelIndexOfTxPowerLimit(Band, cch);
-		if (ch_idx == -1)
-			continue;
-
-		if (Band == BAND_ON_2_4G) {
-			s8 limits[MAX_REGULATION_NUM] = {0};
-			u8 i = 0;
-
-			for (i = 0; i < MAX_REGULATION_NUM; ++i)
-				limits[i] = hal_data->TxPwrLimit_2_4G[i][bw][rs][ch_idx][RfPath];
+		lmt = phy_get_txpwr_lmt_abs(adapter, regd_name, band, tmp_bw, tlrs, ntx_idx, tmp_cch, 0);
 
-			tmp_lmt = (regulation == TXPWR_LMT_WW) ? phy_GetWorldWideLimit(limits) :
-				hal_data->TxPwrLimit_2_4G[regulation][bw][rs][ch_idx][RfPath];
-
-		} else if (Band == BAND_ON_5G) {
-			s8 limits[MAX_REGULATION_NUM] = {0};
-			u8 i = 0;
+		if (min_lmt >= lmt) {
+			min_lmt = lmt;
+			final_cch = tmp_cch;
+			final_bw = tmp_bw;
+		}
 
-			for (i = 0; i < MAX_REGULATION_NUM; ++i)
-				limits[i] = hal_data->TxPwrLimit_5G[i][bw][rs][ch_idx][RfPath];
+	}
 
-			tmp_lmt = (regulation == TXPWR_LMT_WW) ? phy_GetWorldWideLimit(limits) :
-				hal_data->TxPwrLimit_5G[regulation][bw][rs][ch_idx][RfPath];
-		} else
-			continue;
+	_exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
 
-		if (min_lmt >= tmp_lmt) {
-			min_lmt = tmp_lmt;
-			final_cch = cch;
-			final_bw = bw;
-		}
+	if (min_lmt != MAX_POWER_INDEX) {
+		/* return diff value */
+		min_lmt = min_lmt - PHY_GetTxPowerByRateBase(adapter, band, rfpath, rs);
 	}
 
 exit:
-	return min_lmt;
-}
-
-inline s8
-PHY_GetTxPowerLimit(
-	IN	PADAPTER			Adapter,
-	IN	u32					RegPwrTblSel,
-	IN	BAND_TYPE			Band,
-	IN	CHANNEL_WIDTH		Bandwidth,
-	IN	u8					RfPath,
-	IN	u8					DataRate,
-	IN	u8					Channel
-)
-{
-	BOOLEAN no_sc = _FALSE;
 
-	/* MP mode channel don't use secondary channel */
-	if (rtw_mi_mp_mode_check(Adapter) == _TRUE)
-		no_sc = _TRUE;
-
-	return _phy_get_txpwr_lmt(Adapter, RegPwrTblSel, Band, Bandwidth, RfPath, DataRate, Channel, no_sc);
-}
+	if (0) {
+		if (final_bw != bw && (IS_HT_RATE(rate) || IS_VHT_RATE(rate)))
+			RTW_INFO("%s min_lmt: %s ch%u -> %s ch%u\n"
+				, MGN_RATE_STR(rate)
+				, ch_width_str(bw), cch
+				, ch_width_str(final_bw), final_cch);
+	}
 
-inline s8
-PHY_GetTxPowerLimit_no_sc(
-	IN	PADAPTER			Adapter,
-	IN	u32					RegPwrTblSel,
-	IN	BAND_TYPE			Band,
-	IN	CHANNEL_WIDTH		Bandwidth,
-	IN	u8					RfPath,
-	IN	u8					DataRate,
-	IN	u8					Channel
-)
-{
-	return _phy_get_txpwr_lmt(Adapter, RegPwrTblSel, Band, Bandwidth, RfPath, DataRate, Channel, _TRUE);
+	return min_lmt;
 }
 
-#ifdef CONFIG_PHYDM_POWERTRACK_BY_TSSI
-s8
-PHY_GetTxPowerLimitOriginal(
-	IN	PADAPTER			Adapter,
-	IN	u32					RegPwrTblSel,
-	IN	BAND_TYPE			Band,
-	IN	CHANNEL_WIDTH		Bandwidth,
-	IN	u8					RfPath,
-	IN	u8					DataRate,
-	IN	u8					Channel
-)
+static void phy_txpwr_lmt_cck_ofdm_mt_chk(_adapter *adapter)
 {
-	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
-	s16				band = -1, regulation = -1, bandwidth = -1,
-					rateSection = -1, channel = -1;
-	s8				powerLimit = MAX_POWER_INDEX;
-
-	if ((Adapter->registrypriv.RegEnableTxPowerLimit == 2 && pHalData->EEPROMRegulatory != 1) ||
-	    Adapter->registrypriv.RegEnableTxPowerLimit == 0)
-		return MAX_POWER_INDEX;
-
-	switch (Adapter->registrypriv.RegPwrTblSel) {
-	case 1:
-		regulation = TXPWR_LMT_ETSI;
-		break;
-
-	case 2:
-		regulation = TXPWR_LMT_MKK;
-		break;
-
-	case 3:
-		regulation = TXPWR_LMT_FCC;
-		break;
-
-	case 4:
-		regulation = TXPWR_LMT_WW;
-		break;
-
-	default:
-		regulation = (Band == BAND_ON_2_4G) ? pHalData->Regulation2_4G
-			     : pHalData->Regulation5G;
-		break;
-	}
-
-	/*DBG_871X("pMgntInfo->RegPwrTblSel %d, final regulation %d\n", Adapter->registrypriv.RegPwrTblSel, regulation );*/
-
-
-	if (Band == BAND_ON_2_4G)
-		band = 0;
-	else if (Band == BAND_ON_5G)
-		band = 1;
-
-	if (Bandwidth == CHANNEL_WIDTH_20)
-		bandwidth = 0;
-	else if (Bandwidth == CHANNEL_WIDTH_40)
-		bandwidth = 1;
-	else if (Bandwidth == CHANNEL_WIDTH_80)
-		bandwidth = 2;
-	else if (Bandwidth == CHANNEL_WIDTH_160)
-		bandwidth = 3;
-
-	switch (DataRate) {
-	case MGN_1M:
-	case MGN_2M:
-	case MGN_5_5M:
-	case MGN_11M:
-		rateSection = 0;
-		break;
-
-	case MGN_6M:
-	case MGN_9M:
-	case MGN_12M:
-	case MGN_18M:
-	case MGN_24M:
-	case MGN_36M:
-	case MGN_48M:
-	case MGN_54M:
-		rateSection = 1;
-		break;
-
-	case MGN_MCS0:
-	case MGN_MCS1:
-	case MGN_MCS2:
-	case MGN_MCS3:
-	case MGN_MCS4:
-	case MGN_MCS5:
-	case MGN_MCS6:
-	case MGN_MCS7:
-		rateSection = 2;
-		break;
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+	struct txpwr_lmt_ent *ent;
+	_list *cur, *head;
+	u8 channel, tlrs, ntx_idx;
 
-	case MGN_MCS8:
-	case MGN_MCS9:
-	case MGN_MCS10:
-	case MGN_MCS11:
-	case MGN_MCS12:
-	case MGN_MCS13:
-	case MGN_MCS14:
-	case MGN_MCS15:
-		rateSection = 3;
-		break;
-
-	case MGN_MCS16:
-	case MGN_MCS17:
-	case MGN_MCS18:
-	case MGN_MCS19:
-	case MGN_MCS20:
-	case MGN_MCS21:
-	case MGN_MCS22:
-	case MGN_MCS23:
-		rateSection = 4;
-		break;
-
-	case MGN_MCS24:
-	case MGN_MCS25:
-	case MGN_MCS26:
-	case MGN_MCS27:
-	case MGN_MCS28:
-	case MGN_MCS29:
-	case MGN_MCS30:
-	case MGN_MCS31:
-		rateSection = 5;
-		break;
-
-	case MGN_VHT1SS_MCS0:
-	case MGN_VHT1SS_MCS1:
-	case MGN_VHT1SS_MCS2:
-	case MGN_VHT1SS_MCS3:
-	case MGN_VHT1SS_MCS4:
-	case MGN_VHT1SS_MCS5:
-	case MGN_VHT1SS_MCS6:
-	case MGN_VHT1SS_MCS7:
-	case MGN_VHT1SS_MCS8:
-	case MGN_VHT1SS_MCS9:
-		rateSection = 6;
-		break;
-
-	case MGN_VHT2SS_MCS0:
-	case MGN_VHT2SS_MCS1:
-	case MGN_VHT2SS_MCS2:
-	case MGN_VHT2SS_MCS3:
-	case MGN_VHT2SS_MCS4:
-	case MGN_VHT2SS_MCS5:
-	case MGN_VHT2SS_MCS6:
-	case MGN_VHT2SS_MCS7:
-	case MGN_VHT2SS_MCS8:
-	case MGN_VHT2SS_MCS9:
-		rateSection = 7;
-		break;
-
-	case MGN_VHT3SS_MCS0:
-	case MGN_VHT3SS_MCS1:
-	case MGN_VHT3SS_MCS2:
-	case MGN_VHT3SS_MCS3:
-	case MGN_VHT3SS_MCS4:
-	case MGN_VHT3SS_MCS5:
-	case MGN_VHT3SS_MCS6:
-	case MGN_VHT3SS_MCS7:
-	case MGN_VHT3SS_MCS8:
-	case MGN_VHT3SS_MCS9:
-		rateSection = 8;
-		break;
-
-	case MGN_VHT4SS_MCS0:
-	case MGN_VHT4SS_MCS1:
-	case MGN_VHT4SS_MCS2:
-	case MGN_VHT4SS_MCS3:
-	case MGN_VHT4SS_MCS4:
-	case MGN_VHT4SS_MCS5:
-	case MGN_VHT4SS_MCS6:
-	case MGN_VHT4SS_MCS7:
-	case MGN_VHT4SS_MCS8:
-	case MGN_VHT4SS_MCS9:
-		rateSection = 9;
-		break;
-
-	default:
-		DBG_871X("Wrong rate 0x%x\n", DataRate);
-		break;
-	}
-
-	if (Band == BAND_ON_5G  && rateSection == 0)
-		DBG_871X("Wrong rate 0x%x: No CCK in 5G Band\n", DataRate);
-
-	/*workaround for wrong index combination to obtain tx power limit,*/
-	/*OFDM only exists in BW 20M*/
-	if (rateSection == 1)
-		bandwidth = 0;
+	rfctl->txpwr_lmt_2g_cck_ofdm_state = 0;
+#ifdef CONFIG_IEEE80211_BAND_5GHZ
+	rfctl->txpwr_lmt_5g_cck_ofdm_state = 0;
+#endif
 
-	/*workaround for wrong index combination to obtain tx power limit,*/
-	/*CCK table will only be given in BW 20M*/
-	if (rateSection == 0)
-		bandwidth = 0;
+	head = &rfctl->txpwr_lmt_list;
+	cur = get_next(head);
 
-	/*workaround for wrong indxe combination to obtain tx power limit,*/
-	/*HT on 80M will reference to HT on 40M*/
-	if ((rateSection == 2 || rateSection == 3) && Band == BAND_ON_5G && bandwidth == 2)
-		bandwidth = 1;
+	while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
+		ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
+		cur = get_next(cur);
 
-	if (Band == BAND_ON_2_4G)
-		channel = phy_GetChannelIndexOfTxPowerLimit(BAND_ON_2_4G, Channel);
-	else if (Band == BAND_ON_5G)
-		channel = phy_GetChannelIndexOfTxPowerLimit(BAND_ON_5G, Channel);
-	else if (Band == BAND_ON_BOTH)
-		/*BAND_ON_BOTH don't care temporarily*/
-
-		if (band == -1 || regulation == -1 || bandwidth == -1 ||
-		    rateSection == -1 || channel == -1) {
-			/*DBG_871X("Wrong index value to access power limit table [band %d][regulation %d][bandwidth %d][rf_path %d][rate_section %d][chnlGroup %d]\n",*/
-			/*	  band, regulation, bandwidth, RfPath, rateSection, channelGroup );*/
-
-			return MAX_POWER_INDEX;
+		/* check 2G CCK, OFDM state*/
+		for (tlrs = TXPWR_LMT_RS_CCK; tlrs <= TXPWR_LMT_RS_OFDM; tlrs++) {
+			for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) {
+				for (channel = 0; channel < CENTER_CH_2G_NUM; ++channel) {
+					if (ent->lmt_2g[CHANNEL_WIDTH_20][tlrs][channel][ntx_idx] != MAX_POWER_INDEX) {
+						if (tlrs == TXPWR_LMT_RS_CCK)
+							rfctl->txpwr_lmt_2g_cck_ofdm_state |= TXPWR_LMT_HAS_CCK_1T << ntx_idx;
+						else
+							rfctl->txpwr_lmt_2g_cck_ofdm_state |= TXPWR_LMT_HAS_OFDM_1T << ntx_idx;
+						break;
+					}
+				}
+			}
 		}
 
-	if (Band == BAND_ON_2_4G) {
-		s8 limits[10] = {0};
-		u8 i = 0;
-
-		if (bandwidth >= MAX_2_4G_BANDWIDTH_NUM)
-			bandwidth = MAX_2_4G_BANDWIDTH_NUM - 1;
-
-		for (i = 0; i < MAX_REGULATION_NUM; ++i)
-			limits[i] = pHalData->TxPwrLimit_2_4G_Original[i][bandwidth][rateSection][channel][RfPath];
-
-		powerLimit = (regulation == TXPWR_LMT_WW) ? phy_GetWorldWideLimit(limits) :
-			pHalData->TxPwrLimit_2_4G_Original[regulation][bandwidth][rateSection][channel][RfPath];
-
-	} else if (Band == BAND_ON_5G) {
-		s8 limits[10] = {0};
-		u8 i = 0;
+		/* if 2G OFDM multi-TX is not defined, reference HT20 */
+		for (channel = 0; channel < CENTER_CH_2G_NUM; ++channel) {
+			for (ntx_idx = RF_2TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) {
+				if (rfctl->txpwr_lmt_2g_cck_ofdm_state & (TXPWR_LMT_HAS_OFDM_1T << ntx_idx))
+					continue;
+				ent->lmt_2g[CHANNEL_WIDTH_20][TXPWR_LMT_RS_OFDM][channel][ntx_idx] =
+					ent->lmt_2g[CHANNEL_WIDTH_20][TXPWR_LMT_RS_HT][channel][ntx_idx];
+			}
+		}
 
-		for (i = 0; i < MAX_REGULATION_NUM; ++i)
-			limits[i] = pHalData->TxPwrLimit_5G_Original[i][bandwidth][rateSection][channel][RfPath];
+#ifdef CONFIG_IEEE80211_BAND_5GHZ
+		/* check 5G OFDM state*/
+		for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) {
+			for (channel = 0; channel < CENTER_CH_5G_ALL_NUM; ++channel) {
+				if (ent->lmt_5g[CHANNEL_WIDTH_20][TXPWR_LMT_RS_OFDM - 1][channel][ntx_idx] != MAX_POWER_INDEX) {
+					rfctl->txpwr_lmt_5g_cck_ofdm_state |= TXPWR_LMT_HAS_OFDM_1T << ntx_idx;
+					break;
+				}
+			}
+		}
 
-		powerLimit = (regulation == TXPWR_LMT_WW) ? phy_GetWorldWideLimit(limits) :
-			pHalData->TxPwrLimit_5G_Original[regulation][bandwidth][rateSection][channel][RfPath];
-	} else
-		DBG_871X("No power limit table of the specified band\n");
-
-	/*combine 5G VHT & HT rate*/
-	/*5G 20M and 40M HT and VHT can cross reference*/
-	/*
-	if (Band == BAND_ON_5G && powerLimit == MAX_POWER_INDEX) {
-		if (bandwidth == 0 || bandwidth == 1) {
-			if (rateSection == 2)
-				powerLimit = pHalData->TxPwrLimit_5G_Original[regulation]
-										[bandwidth][4][channelGroup][RfPath];
-			else if (rateSection == 4)
-				powerLimit = pHalData->TxPwrLimit_5G_Original[regulation]
-										[bandwidth][2][channelGroup][RfPath];
-			else if (rateSection == 3)
-				powerLimit = pHalData->TxPwrLimit_5G_Original[regulation]
-										[bandwidth][5][channelGroup][RfPath];
-			else if (rateSection == 5)
-				powerLimit = pHalData->TxPwrLimit_5G_Original[regulation]
-										[bandwidth][3][channelGroup][RfPath];
+		for (channel = 0; channel < CENTER_CH_5G_ALL_NUM; ++channel) {
+			for (ntx_idx = RF_2TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) {
+				if (rfctl->txpwr_lmt_5g_cck_ofdm_state & (TXPWR_LMT_HAS_OFDM_1T << ntx_idx))
+					continue;
+				/* if 5G OFDM multi-TX is not defined, reference HT20 */
+				ent->lmt_5g[CHANNEL_WIDTH_20][TXPWR_LMT_RS_OFDM - 1][channel][ntx_idx] =
+					ent->lmt_5g[CHANNEL_WIDTH_20][TXPWR_LMT_RS_HT - 1][channel][ntx_idx];
+			}
 		}
+#endif /* CONFIG_IEEE80211_BAND_5GHZ */
 	}
-	*/
-	/*DBG_871X("TxPwrLmt[Regulation %d][Band %d][BW %d][RFPath %d][Rate 0x%x][Chnl %d] = %d\n",*/
-	/*		regulation, pHalData->current_band_type, Bandwidth, RfPath, DataRate, Channel, powerLimit);*/
-	return powerLimit;
 }
-#endif
-
 
-VOID
-phy_CrossReferenceHTAndVHTTxPowerLimit(
-	IN	PADAPTER			pAdapter
-)
+#ifdef CONFIG_IEEE80211_BAND_5GHZ
+static void phy_txpwr_lmt_cross_ref_ht_vht(_adapter *adapter)
 {
-	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
-	u8 regulation, bw, channel, rs, ref_rs;
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+	struct txpwr_lmt_ent *ent;
+	_list *cur, *head;
+	u8 bw, channel, tlrs, ref_tlrs, ntx_idx;
 	int ht_ref_vht_5g_20_40 = 0;
 	int vht_ref_ht_5g_20_40 = 0;
 	int ht_has_ref_5g_20_40 = 0;
 	int vht_has_ref_5g_20_40 = 0;
 
-	pHalData->tx_pwr_lmt_5g_20_40_ref = 0;
+	rfctl->txpwr_lmt_5g_20_40_ref = 0;
+
+	head = &rfctl->txpwr_lmt_list;
+	cur = get_next(head);
 
-	for (regulation = 0; regulation < MAX_REGULATION_NUM; ++regulation) {
+	while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
+		ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
+		cur = get_next(cur);
 
 		for (bw = 0; bw < MAX_5G_BANDWIDTH_NUM; ++bw) {
 
 			for (channel = 0; channel < CENTER_CH_5G_ALL_NUM; ++channel) {
 
-				for (rs = 0; rs < MAX_RATE_SECTION_NUM; ++rs) {
+				for (tlrs = TXPWR_LMT_RS_HT; tlrs < TXPWR_LMT_RS_NUM; ++tlrs) {
 
 					/* 5G 20M 40M VHT and HT can cross reference */
 					if (bw == CHANNEL_WIDTH_20 || bw == CHANNEL_WIDTH_40) {
-						if (rs == HT_1SS)
-							ref_rs = VHT_1SS;
-						else if (rs == HT_2SS)
-							ref_rs = VHT_2SS;
-						else if (rs == HT_3SS)
-							ref_rs = VHT_3SS;
-						else if (rs == HT_4SS)
-							ref_rs = VHT_4SS;
-						else if (rs == VHT_1SS)
-							ref_rs = HT_1SS;
-						else if (rs == VHT_2SS)
-							ref_rs = HT_2SS;
-						else if (rs == VHT_3SS)
-							ref_rs = HT_3SS;
-						else if (rs == VHT_4SS)
-							ref_rs = HT_4SS;
+						if (tlrs == TXPWR_LMT_RS_HT)
+							ref_tlrs = TXPWR_LMT_RS_VHT;
+						else if (tlrs == TXPWR_LMT_RS_VHT)
+							ref_tlrs = TXPWR_LMT_RS_HT;
 						else
 							continue;
 
-						if (pHalData->TxPwrLimit_5G[regulation][bw][ref_rs][channel][RF_PATH_A] == MAX_POWER_INDEX)
-							continue;
+						for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) {
 
-						if (IS_HT_RATE_SECTION(rs))
-							ht_has_ref_5g_20_40++;
-						else if (IS_VHT_RATE_SECTION(rs))
-							vht_has_ref_5g_20_40++;
-						else
-							continue;
+							if (ent->lmt_5g[bw][ref_tlrs - 1][channel][ntx_idx] == MAX_POWER_INDEX)
+								continue;
 
-						if (pHalData->TxPwrLimit_5G[regulation][bw][rs][channel][RF_PATH_A] != MAX_POWER_INDEX)
-							continue;
+							if (tlrs == TXPWR_LMT_RS_HT)
+								ht_has_ref_5g_20_40++;
+							else if (tlrs == TXPWR_LMT_RS_VHT)
+								vht_has_ref_5g_20_40++;
+							else
+								continue;
+
+							if (ent->lmt_5g[bw][tlrs - 1][channel][ntx_idx] != MAX_POWER_INDEX)
+								continue;
 
-						if (IS_HT_RATE_SECTION(rs) && IS_VHT_RATE_SECTION(ref_rs))
-							ht_ref_vht_5g_20_40++;
-						else if (IS_VHT_RATE_SECTION(rs) && IS_HT_RATE_SECTION(ref_rs))
-							vht_ref_ht_5g_20_40++;
+							if (tlrs == TXPWR_LMT_RS_HT && ref_tlrs == TXPWR_LMT_RS_VHT)
+								ht_ref_vht_5g_20_40++;
+							else if (tlrs == TXPWR_LMT_RS_VHT && ref_tlrs == TXPWR_LMT_RS_HT)
+								vht_ref_ht_5g_20_40++;
 
-						if (0)
-							RTW_INFO("reg:%u, bw:%u, ch:%u, %s ref %s\n"
-								, regulation, bw, channel
-								, rate_section_str(rs), rate_section_str(ref_rs));
+							if (0)
+								RTW_INFO("reg:%s, bw:%u, ch:%u, %s-%uT ref %s-%uT\n"
+									, ent->regd_name, bw, channel
+									, txpwr_lmt_rs_str(tlrs), ntx_idx + 1
+									, txpwr_lmt_rs_str(ref_tlrs), ntx_idx + 1);
 
-						pHalData->TxPwrLimit_5G[regulation][bw][rs][channel][RF_PATH_A] =
-							pHalData->TxPwrLimit_5G[regulation][bw][ref_rs][channel][RF_PATH_A];
+							ent->lmt_5g[bw][tlrs - 1][channel][ntx_idx] =
+								ent->lmt_5g[bw][ref_tlrs - 1][channel][ntx_idx];
+						}
 					}
 
 				}
@@ -3375,104 +3159,215 @@ phy_CrossReferenceHTAndVHTTxPowerLimit(
 
 	/* 5G 20M&40M HT all come from VHT*/
 	if (ht_ref_vht_5g_20_40 && ht_has_ref_5g_20_40 == ht_ref_vht_5g_20_40)
-		pHalData->tx_pwr_lmt_5g_20_40_ref |= TX_PWR_LMT_REF_HT_FROM_VHT;
+		rfctl->txpwr_lmt_5g_20_40_ref |= TXPWR_LMT_REF_HT_FROM_VHT;
 
 	/* 5G 20M&40M VHT all come from HT*/
 	if (vht_ref_ht_5g_20_40 && vht_has_ref_5g_20_40 == vht_ref_ht_5g_20_40)
-		pHalData->tx_pwr_lmt_5g_20_40_ref |= TX_PWR_LMT_REF_VHT_FROM_HT;
+		rfctl->txpwr_lmt_5g_20_40_ref |= TXPWR_LMT_REF_VHT_FROM_HT;
 }
+#endif /* CONFIG_IEEE80211_BAND_5GHZ */
 
-VOID
-PHY_ConvertTxPowerLimitToPowerIndex(
-	IN	PADAPTER			Adapter
-)
+#ifndef DBG_TXPWR_LMT_BAND_CHK
+#define DBG_TXPWR_LMT_BAND_CHK 0
+#endif
+
+#if DBG_TXPWR_LMT_BAND_CHK
+/* check if larger bandwidth limit is less than smaller bandwidth for HT & VHT rate */
+void phy_txpwr_limit_bandwidth_chk(_adapter *adapter)
 {
-	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
-	u8 base;
-	u8 regulation, bw, channel, rateSection;
-	s8 tempValue = 0, tempPwrLmt = 0;
-	u8 rfPath = 0;
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
+	u8 band, bw, path, tlrs, ntx_idx, cch, offset, scch;
+	u8 ch_num, n, i;
 
-	if (pHalData->odmpriv.phy_reg_pg_value_type != PHY_REG_PG_EXACT_VALUE) {
-		rtw_warn_on(1);
-		return;
-	}
+	for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) {
+		if (!hal_is_band_support(adapter, band))
+			continue;
+
+		for (bw = CHANNEL_WIDTH_40; bw <= CHANNEL_WIDTH_80; bw++) {
+			if (bw >= CHANNEL_WIDTH_160)
+				continue;
+			if (band == BAND_ON_2_4G && bw >= CHANNEL_WIDTH_80)
+				continue;
 
-	phy_CrossReferenceHTAndVHTTxPowerLimit(Adapter);
+			if (band == BAND_ON_2_4G)
+				ch_num = center_chs_2g_num(bw);
+			else
+				ch_num = center_chs_5g_num(bw);
 
-	for (regulation = 0; regulation < MAX_REGULATION_NUM; ++regulation) {
+			if (ch_num == 0) {
+				rtw_warn_on(1);
+				break;
+			}
 
-		for (bw = 0; bw < MAX_2_4G_BANDWIDTH_NUM; ++bw) {
+			for (tlrs = TXPWR_LMT_RS_HT; tlrs < TXPWR_LMT_RS_NUM; tlrs++) {
 
-			for (channel = 0; channel < CENTER_CH_2G_NUM; ++channel) {
+				if (band == BAND_ON_2_4G && tlrs == TXPWR_LMT_RS_VHT)
+					continue;
+				if (band == BAND_ON_5G && tlrs == TXPWR_LMT_RS_CCK)
+					continue;
+				if (bw > CHANNEL_WIDTH_20 && (tlrs == TXPWR_LMT_RS_CCK || tlrs == TXPWR_LMT_RS_OFDM))
+					continue;
+				if (bw > CHANNEL_WIDTH_40 && tlrs == TXPWR_LMT_RS_HT)
+					continue;
+				if (tlrs == TXPWR_LMT_RS_VHT && !IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter))
+					continue;
 
-				for (rateSection = CCK; rateSection <= HT_4SS; ++rateSection) {
-					tempPwrLmt = pHalData->TxPwrLimit_2_4G[regulation][bw][rateSection][channel][RF_PATH_A];
+				for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) {
+					struct txpwr_lmt_ent *ent;
+					_list *cur, *head;
 
-					if (tempPwrLmt != MAX_POWER_INDEX) {
+					if (ntx_idx >= hal_spec->tx_nss_num)
+						continue;
 
-						for (rfPath = RF_PATH_A; rfPath < MAX_RF_PATH; ++rfPath) {
-							base = PHY_GetTxPowerByRateBase(Adapter, BAND_ON_2_4G, rfPath, rate_section_to_tx_num(rateSection), rateSection);
-							tempValue = tempPwrLmt - base;
-							pHalData->TxPwrLimit_2_4G[regulation][bw][rateSection][channel][rfPath] = tempValue;
-						}
+					/* bypass CCK multi-TX is not defined */
+					if (tlrs == TXPWR_LMT_RS_CCK && ntx_idx > RF_1TX) {
+						if (band == BAND_ON_2_4G
+							&& !(rfctl->txpwr_lmt_2g_cck_ofdm_state & (TXPWR_LMT_HAS_CCK_1T << ntx_idx)))
+							continue;
 					}
-				}
-			}
-		}
-	}
 
-	if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(Adapter)) {
+					/* bypass OFDM multi-TX is not defined */
+					if (tlrs == TXPWR_LMT_RS_OFDM && ntx_idx > RF_1TX) {
+						if (band == BAND_ON_2_4G
+							&& !(rfctl->txpwr_lmt_2g_cck_ofdm_state & (TXPWR_LMT_HAS_OFDM_1T << ntx_idx)))
+							continue;
+						#ifdef CONFIG_IEEE80211_BAND_5GHZ
+						if (band == BAND_ON_5G
+							&& !(rfctl->txpwr_lmt_5g_cck_ofdm_state & (TXPWR_LMT_HAS_OFDM_1T << ntx_idx)))
+							continue;
+						#endif
+					}
 
-		for (regulation = 0; regulation < MAX_REGULATION_NUM; ++regulation) {
+					/* bypass 5G 20M, 40M pure reference */
+					#ifdef CONFIG_IEEE80211_BAND_5GHZ
+					if (band == BAND_ON_5G && (bw == CHANNEL_WIDTH_20 || bw == CHANNEL_WIDTH_40)) {
+						if (rfctl->txpwr_lmt_5g_20_40_ref == TXPWR_LMT_REF_HT_FROM_VHT) {
+							if (tlrs == TXPWR_LMT_RS_HT)
+								continue;
+						} else if (rfctl->txpwr_lmt_5g_20_40_ref == TXPWR_LMT_REF_VHT_FROM_HT) {
+							if (tlrs == TXPWR_LMT_RS_VHT && bw <= CHANNEL_WIDTH_40)
+								continue;
+						}
+					}
+					#endif
 
-			for (bw = 0; bw < MAX_5G_BANDWIDTH_NUM; ++bw) {
+					for (n = 0; n < ch_num; n++) {
+						u8 cch_by_bw[3];
+						u8 offset_by_bw; /* bitmap, 0 for lower, 1 for upper */
+						u8 bw_pos;
+						s8 lmt[3];
 
-				for (channel = 0; channel < CENTER_CH_5G_ALL_NUM; ++channel) {
+						if (band == BAND_ON_2_4G)
+							cch = center_chs_2g(bw, n);
+						else
+							cch = center_chs_5g(bw, n);
 
-					for (rateSection = OFDM; rateSection <= VHT_4SS; ++rateSection) {
-						tempPwrLmt = pHalData->TxPwrLimit_5G[regulation][bw][rateSection][channel][RF_PATH_A];
+						if (cch == 0) {
+							rtw_warn_on(1);
+							break;
+						}
 
-						if (tempPwrLmt != MAX_POWER_INDEX) {
+						_rtw_memset(cch_by_bw, 0, 3);
+						cch_by_bw[bw] = cch;
+						offset_by_bw = 0x01;
+
+						do {
+							for (bw_pos = bw; bw_pos >= CHANNEL_WIDTH_40; bw_pos--)
+								cch_by_bw[bw_pos - 1] = rtw_get_scch_by_cch_offset(cch_by_bw[bw_pos], bw_pos, offset_by_bw & BIT(bw_pos) ? HAL_PRIME_CHNL_OFFSET_UPPER : HAL_PRIME_CHNL_OFFSET_LOWER);
+
+							head = &rfctl->txpwr_lmt_list;
+							cur = get_next(head);
+							while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
+								ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
+								cur = get_next(cur);
+
+								for (bw_pos = bw; bw_pos < CHANNEL_WIDTH_160; bw_pos--)
+									lmt[bw_pos] = phy_get_txpwr_lmt_abs(adapter, ent->regd_name, band, bw_pos, tlrs, ntx_idx, cch_by_bw[bw_pos], 0);
+
+								for (bw_pos = bw; bw_pos > CHANNEL_WIDTH_20; bw_pos--)
+									if (lmt[bw_pos] > lmt[bw_pos - 1])
+										break;
+								if (bw_pos == CHANNEL_WIDTH_20)
+									continue;
+
+								RTW_PRINT_SEL(RTW_DBGDUMP, "[%s][%s][%s][%uT][%-4s] cch:"
+									, band_str(band)
+									, ch_width_str(bw)
+									, txpwr_lmt_rs_str(tlrs)
+									, ntx_idx + 1
+									, ent->regd_name
+								);
+								for (bw_pos = bw; bw_pos < CHANNEL_WIDTH_160; bw_pos--)
+									_RTW_PRINT_SEL(RTW_DBGDUMP, "%03u ", cch_by_bw[bw_pos]);
+								_RTW_PRINT_SEL(RTW_DBGDUMP, "limit:");
+								for (bw_pos = bw; bw_pos < CHANNEL_WIDTH_160; bw_pos--) {
+									if (lmt[bw_pos] == MAX_POWER_INDEX)
+										_RTW_PRINT_SEL(RTW_DBGDUMP, "N/A ");
+									else
+										_RTW_PRINT_SEL(RTW_DBGDUMP, "%2u%s ", lmt[bw_pos] / 2, lmt[bw_pos] % 2 ? ".5" : "");
+								}
+								_RTW_PRINT_SEL(RTW_DBGDUMP, "\n");
+							}
+							for (bw_pos = bw; bw_pos < CHANNEL_WIDTH_160; bw_pos--)
+								lmt[bw_pos] = phy_get_txpwr_lmt_abs(adapter, regd_str(TXPWR_LMT_WW), band, bw_pos, tlrs, ntx_idx, cch_by_bw[bw_pos], 0);
 
-							for (rfPath = RF_PATH_A; rfPath < MAX_RF_PATH; ++rfPath) {
-								base = PHY_GetTxPowerByRateBase(Adapter, BAND_ON_5G, rfPath, rate_section_to_tx_num(rateSection), rateSection);
-								tempValue = tempPwrLmt - base;
-								pHalData->TxPwrLimit_5G[regulation][bw][rateSection][channel][rfPath] = tempValue;
+							for (bw_pos = bw; bw_pos > CHANNEL_WIDTH_20; bw_pos--)
+								if (lmt[bw_pos] > lmt[bw_pos - 1])
+									break;
+							if (bw_pos != CHANNEL_WIDTH_20) {
+								RTW_PRINT_SEL(RTW_DBGDUMP, "[%s][%s][%s][%uT][%-4s] cch:"
+									, band_str(band)
+									, ch_width_str(bw)
+									, txpwr_lmt_rs_str(tlrs)
+									, ntx_idx + 1
+									, regd_str(TXPWR_LMT_WW)
+								);
+								for (bw_pos = bw; bw_pos < CHANNEL_WIDTH_160; bw_pos--)
+									_RTW_PRINT_SEL(RTW_DBGDUMP, "%03u ", cch_by_bw[bw_pos]);
+								_RTW_PRINT_SEL(RTW_DBGDUMP, "limit:");
+								for (bw_pos = bw; bw_pos < CHANNEL_WIDTH_160; bw_pos--) {
+									if (lmt[bw_pos] == MAX_POWER_INDEX)
+										_RTW_PRINT_SEL(RTW_DBGDUMP, "N/A ");
+									else
+										_RTW_PRINT_SEL(RTW_DBGDUMP, "%2u%s ", lmt[bw_pos] / 2, lmt[bw_pos] % 2 ? ".5" : "");
+								}
+								_RTW_PRINT_SEL(RTW_DBGDUMP, "\n");
 							}
-						}
-					}
-				}
-			}
-		}
-	}
+
+							offset_by_bw += 2;
+							if (offset_by_bw & BIT(bw + 1))
+								break;
+						} while (1); /* loop for all ch combinations */
+					} /* loop for center channels */
+				} /* loop fo each ntx_idx */
+			} /* loop for tlrs */
+		} /* loop for bandwidth */
+	} /* loop for band */
 }
+#endif /* DBG_TXPWR_LMT_BAND_CHK */
 
-/*
-* PHY_InitTxPowerLimit - Set all hal_data.TxPwrLimit_2_4G, TxPwrLimit_5G array to MAX_POWER_INDEX
-*/
-VOID
-PHY_InitTxPowerLimit(
-	IN	PADAPTER		Adapter
-)
+static void phy_txpwr_lmt_post_hdl(_adapter *adapter)
 {
-	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
-	u8 i, j, k, l, m;
-
-	for (i = 0; i < MAX_REGULATION_NUM; ++i)
-		for (j = 0; j < MAX_2_4G_BANDWIDTH_NUM; ++j)
-			for (k = 0; k < MAX_RATE_SECTION_NUM; ++k)
-				for (m = 0; m < CENTER_CH_2G_NUM; ++m)
-					for (l = 0; l < MAX_RF_PATH; ++l)
-						pHalData->TxPwrLimit_2_4G[i][j][k][m][l] = MAX_POWER_INDEX;
-
-	for (i = 0; i < MAX_REGULATION_NUM; ++i)
-		for (j = 0; j < MAX_5G_BANDWIDTH_NUM; ++j)
-			for (k = 0; k < MAX_RATE_SECTION_NUM; ++k)
-				for (m = 0; m < CENTER_CH_5G_ALL_NUM; ++m)
-					for (l = 0; l < MAX_RF_PATH; ++l)
-						pHalData->TxPwrLimit_5G[i][j][k][m][l] = MAX_POWER_INDEX;
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+	_irqL irqL;
+
+	_enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
+
+#ifdef CONFIG_IEEE80211_BAND_5GHZ
+	if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter))
+		phy_txpwr_lmt_cross_ref_ht_vht(adapter);
+#endif
+	phy_txpwr_lmt_cck_ofdm_mt_chk(adapter);
+
+#if DBG_TXPWR_LMT_BAND_CHK
+	phy_txpwr_limit_bandwidth_chk(adapter);
+#endif
+
+	_exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
 }
+#endif /* CONFIG_TXPWR_LIMIT */
 
 /*
 * phy_set_tx_power_limit - Parsing TX power limit from phydm array, called by odm_ConfigBB_TXPWR_LMT_XXX in phydm
@@ -3484,19 +3379,21 @@ phy_set_tx_power_limit(
 	IN	u8				*Band,
 	IN	u8				*Bandwidth,
 	IN	u8				*RateSection,
-	IN	u8				*RfPath,
+	IN	u8				*ntx,
 	IN	u8				*Channel,
 	IN	u8				*PowerLimit
 )
 {
+#ifdef CONFIG_TXPWR_LIMIT
 	PADAPTER Adapter = pDM_Odm->adapter;
 	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
-	u8 regulation = 0, bandwidth = 0, rateSection = 0, channel;
+	u8 band = 0, bandwidth = 0, tlrs = 0, channel;
+	u8 ntx_idx;
 	s8 powerLimit = 0, prevPowerLimit, channelIndex;
 
 	if (0)
-		RTW_INFO("Index of power limit table [band %s][regulation %s][bw %s][rate section %s][rf path %s][chnl %s][val %s]\n"
-			, Band, Regulation, Bandwidth, RateSection, RfPath, Channel, PowerLimit);
+		RTW_INFO("Index of power limit table [regulation %s][band %s][bw %s][rate section %s][ntx %s][chnl %s][val %s]\n"
+			, Regulation, Band, Bandwidth, RateSection, ntx, Channel, PowerLimit);
 
 	if (GetU1ByteIntegerFromStringInDecimal((s8 *)Channel, &channel) == _FALSE
 		|| GetU1ByteIntegerFromStringInDecimal((s8 *)PowerLimit, &powerLimit) == _FALSE
@@ -3507,41 +3404,29 @@ phy_set_tx_power_limit(
 
 	powerLimit = powerLimit > MAX_POWER_INDEX ? MAX_POWER_INDEX : powerLimit;
 
-	if (eqNByte(Regulation, (u8 *)("FCC"), 3))
-		regulation = TXPWR_LMT_FCC;
-	else if (eqNByte(Regulation, (u8 *)("MKK"), 3))
-		regulation = TXPWR_LMT_MKK;
-	else if (eqNByte(Regulation, (u8 *)("ETSI"), 4))
-		regulation = TXPWR_LMT_ETSI;
-	else if (eqNByte(Regulation, (u8 *)("WW13"), 4))
-		regulation = TXPWR_LMT_WW;
+	if (eqNByte(RateSection, (u8 *)("CCK"), 3))
+		tlrs = TXPWR_LMT_RS_CCK;
+	else if (eqNByte(RateSection, (u8 *)("OFDM"), 4))
+		tlrs = TXPWR_LMT_RS_OFDM;
+	else if (eqNByte(RateSection, (u8 *)("HT"), 2))
+		tlrs = TXPWR_LMT_RS_HT;
+	else if (eqNByte(RateSection, (u8 *)("VHT"), 3))
+		tlrs = TXPWR_LMT_RS_VHT;
 	else {
-		RTW_PRINT("unknown regulation:%s", Regulation);
+		RTW_PRINT("Wrong rate section:%s\n", RateSection);
 		return;
 	}
 
-	if (eqNByte(RateSection, (u8 *)("CCK"), 3) && eqNByte(RfPath, (u8 *)("1T"), 2))
-		rateSection = CCK;
-	else if (eqNByte(RateSection, (u8 *)("OFDM"), 4) && eqNByte(RfPath, (u8 *)("1T"), 2))
-		rateSection = OFDM;
-	else if (eqNByte(RateSection, (u8 *)("HT"), 2) && eqNByte(RfPath, (u8 *)("1T"), 2))
-		rateSection = HT_1SS;
-	else if (eqNByte(RateSection, (u8 *)("HT"), 2) && eqNByte(RfPath, (u8 *)("2T"), 2))
-		rateSection = HT_2SS;
-	else if (eqNByte(RateSection, (u8 *)("HT"), 2) && eqNByte(RfPath, (u8 *)("3T"), 2))
-		rateSection = HT_3SS;
-	else if (eqNByte(RateSection, (u8 *)("HT"), 2) && eqNByte(RfPath, (u8 *)("4T"), 2))
-		rateSection = HT_4SS;
-	else if (eqNByte(RateSection, (u8 *)("VHT"), 3) && eqNByte(RfPath, (u8 *)("1T"), 2))
-		rateSection = VHT_1SS;
-	else if (eqNByte(RateSection, (u8 *)("VHT"), 3) && eqNByte(RfPath, (u8 *)("2T"), 2))
-		rateSection = VHT_2SS;
-	else if (eqNByte(RateSection, (u8 *)("VHT"), 3) && eqNByte(RfPath, (u8 *)("3T"), 2))
-		rateSection = VHT_3SS;
-	else if (eqNByte(RateSection, (u8 *)("VHT"), 3) && eqNByte(RfPath, (u8 *)("4T"), 2))
-		rateSection = VHT_4SS;
+	if (eqNByte(ntx, (u8 *)("1T"), 2))
+		ntx_idx = RF_1TX;
+	else if (eqNByte(ntx, (u8 *)("2T"), 2))
+		ntx_idx = RF_2TX;
+	else if (eqNByte(ntx, (u8 *)("3T"), 2))
+		ntx_idx = RF_3TX;
+	else if (eqNByte(ntx, (u8 *)("4T"), 2))
+		ntx_idx = RF_4TX;
 	else {
-		RTW_PRINT("Wrong rate section: (%s,%s)\n", RateSection, RfPath);
+		RTW_PRINT("Wrong tx num:%s\n", ntx);
 		return;
 	}
 
@@ -3551,12 +3436,15 @@ phy_set_tx_power_limit(
 		bandwidth = CHANNEL_WIDTH_40;
 	else if (eqNByte(Bandwidth, (u8 *)("80M"), 3))
 		bandwidth = CHANNEL_WIDTH_80;
+	else if (eqNByte(Bandwidth, (u8 *)("160M"), 4))
+		bandwidth = CHANNEL_WIDTH_160;
 	else {
 		RTW_PRINT("unknown bandwidth: %s\n", Bandwidth);
 		return;
 	}
 
 	if (eqNByte(Band, (u8 *)("2.4G"), 4)) {
+		band = BAND_ON_2_4G;
 		channelIndex = phy_GetChannelIndexOfTxPowerLimit(BAND_ON_2_4G, channel);
 
 		if (channelIndex == -1) {
@@ -3569,20 +3457,11 @@ phy_set_tx_power_limit(
 			return;
 		}
 
-		prevPowerLimit = pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][RF_PATH_A];
-
-		if (prevPowerLimit != MAX_POWER_INDEX)
-			RTW_PRINT("duplicate tx power limit combination [band %s][regulation %s][bw %s][rate section %s][rf path %s][chnl %s]\n"
-				, Band, Regulation, Bandwidth, RateSection, RfPath, Channel);
-
-		if (powerLimit < prevPowerLimit)
-			pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][RF_PATH_A] = powerLimit;
-
-		if (0)
-			RTW_INFO("2.4G Band value : [regulation %d][bw %d][rate_section %d][chnl %d][val %d]\n"
-				, regulation, bandwidth, rateSection, channelIndex, pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A]);
-	} else if (eqNByte(Band, (u8 *)("5G"), 2)) {
-
+		rtw_txpwr_lmt_add(adapter_to_rfctl(Adapter), Regulation, band, bandwidth, tlrs, ntx_idx, channelIndex, powerLimit);
+	}
+#ifdef CONFIG_IEEE80211_BAND_5GHZ
+	else if (eqNByte(Band, (u8 *)("5G"), 2)) {
+		band = BAND_ON_5G;
 		channelIndex = phy_GetChannelIndexOfTxPowerLimit(BAND_ON_5G, channel);
 
 		if (channelIndex == -1) {
@@ -3590,22 +3469,14 @@ phy_set_tx_power_limit(
 			return;
 		}
 
-		prevPowerLimit = pHalData->TxPwrLimit_5G[regulation][bandwidth][rateSection][channelIndex][RF_PATH_A];
-
-		if (prevPowerLimit != MAX_POWER_INDEX)
-			RTW_PRINT("duplicate tx power limit combination [band %s][regulation %s][bw %s][rate section %s][rf path %s][chnl %s]\n"
-				, Band, Regulation, Bandwidth, RateSection, RfPath, Channel);
-
-		if (powerLimit < prevPowerLimit)
-			pHalData->TxPwrLimit_5G[regulation][bandwidth][rateSection][channelIndex][RF_PATH_A] = powerLimit;
-
-		if (0)
-			RTW_INFO("5G Band value : [regulation %d][bw %d][rate_section %d][chnl %d][val %d]\n"
-				, regulation, bandwidth, rateSection, channel, pHalData->TxPwrLimit_5G[regulation][bandwidth][rateSection][channelIndex][RF_PATH_A]);
-	} else {
-		RTW_PRINT("Cannot recognize the band info in %s\n", Band);
+		rtw_txpwr_lmt_add(adapter_to_rfctl(Adapter), Regulation, band, bandwidth, tlrs, ntx_idx, channelIndex, powerLimit);
+	}
+#endif
+	else {
+		RTW_PRINT("unknown/unsupported band:%s\n", Band);
 		return;
 	}
+#endif
 }
 
 u8
@@ -3678,8 +3549,8 @@ void dump_tx_power_idx_title(void *sel, _adapter *adapter)
 		_RTW_PRINT_SEL(sel, ", cch40:%u", hal_data->cch_40);
 	_RTW_PRINT_SEL(sel, ", cch20:%u\n", hal_data->cch_20);
 
-	RTW_PRINT_SEL(sel, "%-4s %-9s %-3s %-4s %-3s %-4s %-4s %-3s %-5s\n"
-		, "path", "rate", "pwr", "base", "", "(byr", "lmt)", "tpt", "ebias");
+	RTW_PRINT_SEL(sel, "%-4s %-9s %2s %-3s %-4s %-3s %-4s %-4s %-3s %-5s\n"
+		, "path", "rate", "", "pwr", "base", "", "(byr", "lmt)", "tpt", "ebias");
 }
 
 void dump_tx_power_idx_by_path_rs(void *sel, _adapter *adapter, u8 rfpath, u8 rs)
@@ -3700,7 +3571,7 @@ void dump_tx_power_idx_by_path_rs(void *sel, _adapter *adapter, u8 rfpath, u8 rs
 		return;
 
 	tx_num = rate_section_to_tx_num(rs);
-	if (tx_num >= hal_spec->nss_num || tx_num >= hal_spec->max_tx_cnt)
+	if (tx_num >= hal_spec->tx_nss_num || tx_num >= hal_spec->max_tx_cnt)
 		return;
 
 	if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs))
@@ -3712,8 +3583,8 @@ void dump_tx_power_idx_by_path_rs(void *sel, _adapter *adapter, u8 rfpath, u8 rs
 	for (i = 0; i < rates_by_sections[rs].rate_num; i++) {
 		power_idx = rtw_hal_get_tx_power_index(adapter, rfpath, rates_by_sections[rs].rates[i], bw, cch, &tic);
 
-		RTW_PRINT_SEL(sel, "%4c %9s %3u %4u %3d (%3d %3d) %3d %5d\n"
-			, rf_path_char(rfpath), MGN_RATE_STR(rates_by_sections[rs].rates[i])
+		RTW_PRINT_SEL(sel, "%4c %9s %uT %3u %4u %3d (%3d %3d) %3d %5d\n"
+			, rf_path_char(rfpath), MGN_RATE_STR(rates_by_sections[rs].rates[i]), tic.ntx_idx + 1
 			, power_idx, tic.base, (tic.by_rate > tic.limit ? tic.limit : tic.by_rate), tic.by_rate, tic.limit, tic.tpt, tic.ebias);
 	}
 }
@@ -3733,9 +3604,12 @@ bool phy_is_tx_power_limit_needed(_adapter *adapter)
 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
 	struct registry_priv *regsty = dvobj_to_regsty(adapter_to_dvobj(adapter));
 
+#ifdef CONFIG_TXPWR_LIMIT
 	if (regsty->RegEnableTxPowerLimit == 1
 		|| (regsty->RegEnableTxPowerLimit == 2 && hal_data->EEPROMRegulatory == 1))
 		return _TRUE;
+#endif
+
 	return _FALSE;
 }
 
@@ -3797,14 +3671,17 @@ exit:
 	return ret;
 }
 
+#ifdef CONFIG_TXPWR_LIMIT
 int phy_load_tx_power_limit(_adapter *adapter, u8 chk_file)
 {
 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
 	struct registry_priv *regsty = dvobj_to_regsty(adapter_to_dvobj(adapter));
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
 	int ret = _FAIL;
 
 	hal_data->txpwr_limit_loaded = 0;
-	PHY_InitTxPowerLimit(adapter);
+	rtw_regd_exc_list_free(rfctl);
+	rtw_txpwr_lmt_list_free(rfctl);
 
 	if (!hal_data->txpwr_by_rate_loaded && regsty->target_tx_pwr_valid != _TRUE) {
 		RTW_ERR("%s():Read Tx power limit before target tx power is specify\n", __func__);
@@ -3832,13 +3709,15 @@ int phy_load_tx_power_limit(_adapter *adapter, u8 chk_file)
 	goto exit;
 
 post_hdl:
-	PHY_ConvertTxPowerLimitToPowerIndex(adapter);
+	phy_txpwr_lmt_post_hdl(adapter);
+	rtw_txpwr_init_regd(rfctl);
 	hal_data->txpwr_limit_loaded = 1;
 	ret = _SUCCESS;
 
 exit:
 	return ret;
 }
+#endif /* CONFIG_TXPWR_LIMIT */
 
 void phy_load_tx_power_ext_info(_adapter *adapter, u8 chk_file)
 {
@@ -3853,8 +3732,10 @@ void phy_load_tx_power_ext_info(_adapter *adapter, u8 chk_file)
 	)
 		phy_load_tx_power_by_rate(adapter, chk_file);
 
+#ifdef CONFIG_TXPWR_LIMIT
 	if (phy_is_tx_power_limit_needed(adapter))
 		phy_load_tx_power_limit(adapter, chk_file);
+#endif
 }
 
 inline void phy_reload_tx_power_ext_info(_adapter *adapter)
@@ -3913,7 +3794,7 @@ void dump_target_tx_power(void *sel, _adapter *adapter)
 
 			for (rs = 0; rs < RATE_SECTION_NUM; rs++) {
 				tx_num = rate_section_to_tx_num(rs);
-				if (tx_num >= hal_spec->nss_num)
+				if (tx_num >= hal_spec->tx_nss_num)
 					continue;
 
 				if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs))
@@ -3922,7 +3803,7 @@ void dump_target_tx_power(void *sel, _adapter *adapter)
 				if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter))
 					continue;
 
-				target = PHY_GetTxPowerByRateBase(adapter, band, path, rate_section_to_tx_num(rs), rs);
+				target = PHY_GetTxPowerByRateBase(adapter, band, path, rs);
 
 				if (target % 2)
 					_RTW_PRINT_SEL(sel, "%7s: %2d.5\n", rate_section_str(rs), target / 2);
@@ -3957,7 +3838,7 @@ void dump_tx_power_by_rate(void *sel, _adapter *adapter)
 
 			for (rs = 0; rs < RATE_SECTION_NUM; rs++) {
 				tx_num = rate_section_to_tx_num(rs);
-				if (tx_num >= hal_spec->nss_num)
+				if (tx_num >= hal_spec->tx_nss_num)
 					continue;
 
 				if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs))
@@ -3971,13 +3852,13 @@ void dump_tx_power_by_rate(void *sel, _adapter *adapter)
 				else
 					max_rate_num = 8;
 				rate_num = rate_section_rate_num(rs);
-				base = PHY_GetTxPowerByRateBase(adapter, band, path, tx_num, rs);
+				base = PHY_GetTxPowerByRateBase(adapter, band, path, rs);
 
 				RTW_PRINT_SEL(sel, "%7s: ", rate_section_str(rs));
 
 				/* dump power by rate in db */
 				for (n = rate_num - 1; n >= 0; n--) {
-					by_rate_offset = PHY_GetTxPowerByRate(adapter, band, path, tx_num, rates_by_sections[rs].rates[n]);
+					by_rate_offset = PHY_GetTxPowerByRate(adapter, band, path, rates_by_sections[rs].rates[n]);
 
 					if ((base + by_rate_offset) % 2)
 						_RTW_PRINT_SEL(sel, "%2d.5 ", (base + by_rate_offset) / 2);
@@ -3991,7 +3872,7 @@ void dump_tx_power_by_rate(void *sel, _adapter *adapter)
 
 				/* dump power by rate in offset */
 				for (n = rate_num - 1; n >= 0; n--) {
-					by_rate_offset = PHY_GetTxPowerByRate(adapter, band, path, tx_num, rates_by_sections[rs].rates[n]);
+					by_rate_offset = PHY_GetTxPowerByRate(adapter, band, path, rates_by_sections[rs].rates[n]);
 					_RTW_PRINT_SEL(sel, "%3d ", by_rate_offset);
 				}
 				RTW_PRINT_SEL(sel, "\n");
@@ -4001,181 +3882,6 @@ void dump_tx_power_by_rate(void *sel, _adapter *adapter)
 	}
 }
 
-void dump_tx_power_limit(void *sel, _adapter *adapter)
-{
-	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
-	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
-	struct registry_priv *regsty = dvobj_to_regsty(adapter_to_dvobj(adapter));
-
-	int bw, band, ch_num, rs, i, path;
-	u8 ch, n, rd, rfpath_num;
-
-	if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter))
-		RTW_PRINT_SEL(sel, "tx_pwr_lmt_5g_20_40_ref:0x%02x\n", hal_data->tx_pwr_lmt_5g_20_40_ref);
-
-	for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) {
-		if (!hal_is_band_support(adapter, band))
-			continue;
-
-		rd = (band == BAND_ON_2_4G ? hal_data->Regulation2_4G : hal_data->Regulation5G);
-		rfpath_num = (band == BAND_ON_2_4G ? hal_spec->rfpath_num_2g : hal_spec->rfpath_num_5g);
-
-		for (bw = 0; bw < MAX_5G_BANDWIDTH_NUM; bw++) {
-
-			if (bw >= CHANNEL_WIDTH_160)
-				break;
-			if (band == BAND_ON_2_4G && bw >= CHANNEL_WIDTH_80)
-				break;
-
-			if (band == BAND_ON_2_4G)
-				ch_num = CENTER_CH_2G_NUM;
-			else
-				ch_num = center_chs_5g_num(bw);
-
-			if (ch_num == 0) {
-				rtw_warn_on(1);
-				break;
-			}
-
-			for (rs = 0; rs < RATE_SECTION_NUM; rs++) {
-				if (band == BAND_ON_2_4G && IS_VHT_RATE_SECTION(rs))
-					continue;
-				if (band == BAND_ON_5G && IS_CCK_RATE_SECTION(rs))
-					continue;
-				if (bw > CHANNEL_WIDTH_20 && (IS_CCK_RATE_SECTION(rs) || IS_OFDM_RATE_SECTION(rs)))
-					continue;
-				if (bw > CHANNEL_WIDTH_40 && IS_HT_RATE_SECTION(rs))
-					continue;
-
-				if (rate_section_to_tx_num(rs) >= hal_spec->nss_num)
-					continue;
-
-				if (IS_VHT_RATE_SECTION(rs) && !IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter))
-					continue;
-
-				/* by pass 5G 20M, 40M pure reference */
-				if (band == BAND_ON_5G && (bw == CHANNEL_WIDTH_20 || bw == CHANNEL_WIDTH_40)) {
-					if (hal_data->tx_pwr_lmt_5g_20_40_ref == TX_PWR_LMT_REF_HT_FROM_VHT) {
-						if (IS_HT_RATE_SECTION(rs))
-							continue;
-					} else if (hal_data->tx_pwr_lmt_5g_20_40_ref == TX_PWR_LMT_REF_VHT_FROM_HT) {
-						if (IS_VHT_RATE_SECTION(rs) && bw <= CHANNEL_WIDTH_40)
-							continue;
-					}
-				}
-
-				RTW_PRINT_SEL(sel, "[%s][%s][%s]\n"
-					, band_str(band)
-					, ch_width_str(bw)
-					, rate_section_str(rs)
-				);
-
-				/* header for limit in db */
-				RTW_PRINT_SEL(sel, "%3s %5s %5s %5s %5s "
-					, "ch"
-					, (rd == TXPWR_LMT_FCC ? "*FCC" : "FCC")
-					, (rd == TXPWR_LMT_ETSI ? "*ETSI" : "ETSI")
-					, (rd == TXPWR_LMT_MKK ? "*MKK" : "MKK")
-					, (rd == TXPWR_LMT_WW ? "*WW" : "WW")
-				);
-
-				/* header for limit offset */
-				for (path = 0; path < RF_PATH_MAX; path++) {
-					if (path >= rfpath_num)
-						break;
-					_RTW_PRINT_SEL(sel, "|%3c %3c %3c %3c "
-						, (rd == TXPWR_LMT_FCC ? rf_path_char(path) : ' ')
-						, (rd == TXPWR_LMT_ETSI ? rf_path_char(path) : ' ')
-						, (rd == TXPWR_LMT_MKK ? rf_path_char(path) : ' ')
-						, (rd == TXPWR_LMT_WW ? rf_path_char(path) : ' ')
-					);
-				}
-				_RTW_PRINT_SEL(sel, "\n");
-
-				for (n = 0; n < ch_num; n++) {
-					s8 limit_idx[RF_PATH_MAX][MAX_REGULATION_NUM];
-					s8 limit_offset[MAX_REGULATION_NUM];
-					u8 base;
-
-					if (band == BAND_ON_2_4G)
-						ch = n + 1;
-					else
-						ch = center_chs_5g(bw, n);
-
-					if (ch == 0) {
-						rtw_warn_on(1);
-						break;
-					}
-
-					/* dump limit in db (calculate from path A) */
-					limit_offset[0] = PHY_GetTxPowerLimit_no_sc(adapter, 3, band, bw, RF_PATH_A, rates_by_sections[rs].rates[0], ch); /* FCC */
-					limit_offset[1] = PHY_GetTxPowerLimit_no_sc(adapter, 1, band, bw, RF_PATH_A, rates_by_sections[rs].rates[0], ch); /* ETSI */
-					limit_offset[2] = PHY_GetTxPowerLimit_no_sc(adapter, 2, band, bw, RF_PATH_A, rates_by_sections[rs].rates[0], ch); /* MKK */
-					limit_offset[3] = PHY_GetTxPowerLimit_no_sc(adapter, 4, band, bw, RF_PATH_A, rates_by_sections[rs].rates[0], ch); /* WW */
-
-					base = PHY_GetTxPowerByRateBase(adapter, band, RF_PATH_A, rate_section_to_tx_num(rs), rs);
-
-					RTW_PRINT_SEL(sel, "%3u ", ch);
-					for (i = 0; i < MAX_REGULATION_NUM; i++) {
-						if (limit_offset[i] == MAX_POWER_INDEX) {
-							limit_idx[0][i] = MAX_POWER_INDEX;
-							_RTW_PRINT_SEL(sel, "%5s ", "NA");
-						} else {
-							limit_idx[0][i] = limit_offset[i] + base;
-							if ((limit_offset[i] + base) % 2)
-								_RTW_PRINT_SEL(sel, "%3d.5 ", (limit_offset[i] + base) / 2);
-							else
-								_RTW_PRINT_SEL(sel, "%5d ", (limit_offset[i] + base) / 2);
-						}
-					}
-
-					/* dump limit offset of each path */
-					for (path = 0; path < RF_PATH_MAX; path++) {
-						if (path >= rfpath_num)
-							break;
-						limit_offset[0] = PHY_GetTxPowerLimit_no_sc(adapter, 3, band, bw, path, rates_by_sections[rs].rates[0], ch); /* FCC */
-						limit_offset[1] = PHY_GetTxPowerLimit_no_sc(adapter, 1, band, bw, path, rates_by_sections[rs].rates[0], ch); /* ETSI */
-						limit_offset[2] = PHY_GetTxPowerLimit_no_sc(adapter, 2, band, bw, path, rates_by_sections[rs].rates[0], ch); /* MKK */
-						limit_offset[3] = PHY_GetTxPowerLimit_no_sc(adapter, 4, band, bw, path, rates_by_sections[rs].rates[0], ch); /* WW */
-
-						base = PHY_GetTxPowerByRateBase(adapter, band, path, rate_section_to_tx_num(rs), rs);
-
-						_RTW_PRINT_SEL(sel, "|");
-						for (i = 0; i < MAX_REGULATION_NUM; i++) {
-							if (limit_offset[i] == MAX_POWER_INDEX) {
-								limit_idx[path][i] = MAX_POWER_INDEX;
-								_RTW_PRINT_SEL(sel, "%3s ", "NA");
-							} else {
-								limit_idx[path][i] = limit_offset[i] + base;
-								_RTW_PRINT_SEL(sel, "%3d ", limit_offset[i]);
-							}
-						}
-					}
-
-					/* compare limit_idx of each path, print 'x' when mismatch */
-					if (rfpath_num > 1) {
-						for (i = 0; i < MAX_REGULATION_NUM; i++) {
-							for (path = 0; path < RF_PATH_MAX; path++) {
-								if (path >= rfpath_num)
-									break;
-								if (limit_idx[path][i] != limit_idx[(path + 1) % rfpath_num][i])
-									break;
-							}
-							if (path >= rfpath_num)
-								_RTW_PRINT_SEL(sel, " ");
-							else
-								_RTW_PRINT_SEL(sel, "x");
-						}
-					}
-					_RTW_PRINT_SEL(sel, "\n");
-
-				}
-				RTW_PRINT_SEL(sel, "\n");
-			} /* loop for rate sections */
-		} /* loop for bandwidths */
-	} /* loop for bands */
-}
-
 /*
  * phy file path is stored in global char array rtw_phy_para_file_path
  * need to care about racing
@@ -5109,23 +4815,144 @@ PHY_ConfigRFWithTxPwrTrackParaFile(
 	return rtStatus;
 }
 
-int
+#ifdef CONFIG_TXPWR_LIMIT
+
+#ifndef DBG_TXPWR_LMT_FILE_PARSE
+#define DBG_TXPWR_LMT_FILE_PARSE 0
+#endif
+
+#define PARSE_RET_NO_HDL	0
+#define PARSE_RET_SUCCESS	1
+#define PARSE_RET_FAIL		2
+
+/*
+* @@Ver=2.0
+* or
+* @@DomainCode=0x28, Regulation=C6
+* or
+* @@CountryCode=GB, Regulation=C7
+*/
+static u8 parse_reg_exc_config(_adapter *adapter, char *szLine)
+{
+#define VER_PREFIX "Ver="
+#define DOMAIN_PREFIX "DomainCode=0x"
+#define COUNTRY_PREFIX "CountryCode="
+#define REG_PREFIX "Regulation="
+
+	const u8 ver_prefix_len = strlen(VER_PREFIX);
+	const u8 domain_prefix_len = strlen(DOMAIN_PREFIX);
+	const u8 country_prefix_len = strlen(COUNTRY_PREFIX);
+	const u8 reg_prefix_len = strlen(REG_PREFIX);
+	u32 i, i_val_s, i_val_e;
+	u32 j;
+	u8 domain = 0xFF;
+	char *country = NULL;
+	u8 parse_reg = 0;
+
+	if (szLine[0] != '@' || szLine[1] != '@')
+		return PARSE_RET_NO_HDL;
+
+	i = 2;
+	if (strncmp(szLine + i, VER_PREFIX, ver_prefix_len) == 0)
+		; /* nothing to do */
+	else if (strncmp(szLine + i, DOMAIN_PREFIX, domain_prefix_len) == 0) {
+		/* get string after domain prefix to ',' */
+		i += domain_prefix_len;
+		i_val_s = i;
+		while (szLine[i] != ',') {
+			if (szLine[i] == '\0')
+				return PARSE_RET_FAIL;
+			i++;
+		}
+		i_val_e = i;
+
+		/* check if all hex */
+		for (j = i_val_s; j < i_val_e; j++)
+			if (IsHexDigit(szLine[j]) == _FALSE)
+				return PARSE_RET_FAIL;
+
+		/* get value from hex string */
+		if (sscanf(szLine + i_val_s, "%hhx", &domain) != 1)
+			return PARSE_RET_FAIL;
+
+		parse_reg = 1;
+	} else if (strncmp(szLine + i, COUNTRY_PREFIX, country_prefix_len) == 0) {
+		/* get string after country prefix to ',' */
+		i += country_prefix_len;
+		i_val_s = i;
+		while (szLine[i] != ',') {
+			if (szLine[i] == '\0')
+				return PARSE_RET_FAIL;
+			i++;
+		}
+		i_val_e = i;
+
+		if (i_val_e - i_val_s != 2)
+			return PARSE_RET_FAIL;
+
+		/* check if all alpha */
+		for (j = i_val_s; j < i_val_e; j++)
+			if (is_alpha(szLine[j]) == _FALSE)
+				return PARSE_RET_FAIL;
+
+		country = szLine + i_val_s;
+
+		parse_reg = 1;
+
+	} else
+		return PARSE_RET_FAIL;
+
+	if (parse_reg) {
+		/* move to 'R' */
+		while (szLine[i] != 'R') {
+			if (szLine[i] == '\0')
+				return PARSE_RET_FAIL;
+			i++;
+		}
+
+		/* check if matching regulation prefix */
+		if (strncmp(szLine + i, REG_PREFIX, reg_prefix_len) != 0)
+			return PARSE_RET_FAIL;
+
+		/* get string after regulation prefix ending with space */
+		i += reg_prefix_len;
+		i_val_s = i;
+		while (szLine[i] != ' ' && szLine[i] != '\t' && szLine[i] != '\0')
+			i++;
+
+		if (i == i_val_s)
+			return PARSE_RET_FAIL;
+
+		rtw_regd_exc_add_with_nlen(adapter_to_rfctl(adapter), country, domain, szLine + i_val_s, i - i_val_s);
+	}
+
+	return PARSE_RET_SUCCESS;
+}
+
+static int
 phy_ParsePowerLimitTableFile(
 	PADAPTER		Adapter,
 	char			*buffer
 )
 {
+#define LD_STAGE_EXC_MAPPING	0
+#define LD_STAGE_TAB_DEFINE		1
+#define LD_STAGE_TAB_START		2
+#define LD_STAGE_COLUMN_DEFINE	3
+#define LD_STAGE_CH_ROW			4
+
+	int	rtStatus = _FAIL;
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
 	struct PHY_DM_STRUCT	*pDM_Odm = &(pHalData->odmpriv);
+	u8	loadingStage = LD_STAGE_EXC_MAPPING;
 	u32	i = 0, forCnt = 0;
-	u8	loadingStage = 0, limitValue = 0, fraction = 0;
+	u8 limitValue = 0, fraction = 0;
 	char	*szLine, *ptmp;
-	int	rtStatus = _SUCCESS;
-	char band[10], bandwidth[10], rateSection[10],
-	     regulation[TXPWR_LMT_MAX_REGULATION_NUM][10], rfPath[10], colNumBuf[10];
+	char band[10], bandwidth[10], rateSection[10], ntx[10], colNumBuf[10];
+	char **regulation = NULL;
 	u8	colNum = 0;
 
-	RTW_INFO("===>phy_ParsePowerLimitTableFile()\n");
+	RTW_INFO("%s enter\n", __func__);
 
 	if (Adapter->registrypriv.RegDecryptCustomFile == 1)
 		phy_DecryptBBPgParaFile(Adapter, buffer);
@@ -5134,20 +4961,25 @@ phy_ParsePowerLimitTableFile(
 	for (szLine = GetLineFromBuffer(ptmp); szLine != NULL; szLine = GetLineFromBuffer(ptmp)) {
 		if (isAllSpaceOrTab(szLine, sizeof(*szLine)))
 			continue;
-
-		/* skip comment */
 		if (IsCommentString(szLine))
 			continue;
 
-		if (loadingStage == 0) {
-			for (forCnt = 0; forCnt < TXPWR_LMT_MAX_REGULATION_NUM; ++forCnt)
-				_rtw_memset((PVOID) regulation[forCnt], 0, 10);
-			_rtw_memset((PVOID) band, 0, 10);
-			_rtw_memset((PVOID) bandwidth, 0, 10);
-			_rtw_memset((PVOID) rateSection, 0, 10);
-			_rtw_memset((PVOID) rfPath, 0, 10);
-			_rtw_memset((PVOID) colNumBuf, 0, 10);
+		if (loadingStage == LD_STAGE_EXC_MAPPING) {
+			if (szLine[0] == '#' || szLine[1] == '#') {
+				loadingStage = LD_STAGE_TAB_DEFINE;
+				if (DBG_TXPWR_LMT_FILE_PARSE)
+					dump_regd_exc_list(RTW_DBGDUMP, adapter_to_rfctl(Adapter));
+			} else {
+				if (parse_reg_exc_config(Adapter, szLine) == PARSE_RET_FAIL) {
+					RTW_ERR("Fail to parse regulation exception ruls!\n");
+					goto exit;
+				}
+				continue;
+			}
+		}
 
+		if (loadingStage == LD_STAGE_TAB_DEFINE) {
+			/* read "##	2.4G, 20M, 1T, CCK" */
 			if (szLine[0] != '#' || szLine[1] != '#')
 				continue;
 
@@ -5159,25 +4991,30 @@ phy_ParsePowerLimitTableFile(
 			szLine[--i] = ' '; /* return the space in front of the regulation info */
 
 			/* Parse the label of the table */
+			_rtw_memset((PVOID) band, 0, 10);
+			_rtw_memset((PVOID) bandwidth, 0, 10);
+			_rtw_memset((PVOID) ntx, 0, 10);
+			_rtw_memset((PVOID) rateSection, 0, 10);
 			if (!ParseQualifiedString(szLine, &i, band, ' ', ',')) {
-				RTW_INFO("Fail to parse band!\n");
-				return _FAIL;
+				RTW_ERR("Fail to parse band!\n");
+				goto exit;
 			}
 			if (!ParseQualifiedString(szLine, &i, bandwidth, ' ', ',')) {
-				RTW_INFO("Fail to parse bandwidth!\n");
-				return _FAIL;
+				RTW_ERR("Fail to parse bandwidth!\n");
+				goto exit;
 			}
-			if (!ParseQualifiedString(szLine, &i, rfPath, ' ', ',')) {
-				RTW_INFO("Fail to parse rf path!\n");
-				return _FAIL;
+			if (!ParseQualifiedString(szLine, &i, ntx, ' ', ',')) {
+				RTW_ERR("Fail to parse ntx!\n");
+				goto exit;
 			}
 			if (!ParseQualifiedString(szLine, &i, rateSection, ' ', ',')) {
-				RTW_INFO("Fail to parse rate!\n");
-				return _FAIL;
+				RTW_ERR("Fail to parse rate!\n");
+				goto exit;
 			}
 
-			loadingStage = 1;
-		} else if (loadingStage == 1) {
+			loadingStage = LD_STAGE_TAB_START;
+		} else if (loadingStage == LD_STAGE_TAB_START) {
+			/* read "##	START" */
 			if (szLine[0] != '#' || szLine[1] != '#')
 				continue;
 
@@ -5187,12 +5024,13 @@ phy_ParsePowerLimitTableFile(
 				++i;
 
 			if (!eqNByte((u8 *)(szLine + i), (u8 *)("START"), 5)) {
-				RTW_INFO("Lost \"##   START\" label\n");
-				return _FAIL;
+				RTW_ERR("Missing \"##   START\" label\n");
+				goto exit;
 			}
 
-			loadingStage = 2;
-		} else if (loadingStage == 2) {
+			loadingStage = LD_STAGE_COLUMN_DEFINE;
+		} else if (loadingStage == LD_STAGE_COLUMN_DEFINE) {
+			/* read "##	#5#	FCC	ETSI	MKK	IC	KCC" */
 			if (szLine[0] != '#' || szLine[1] != '#')
 				continue;
 
@@ -5201,39 +5039,59 @@ phy_ParsePowerLimitTableFile(
 			while (szLine[i] == ' ' || szLine[i] == '\t')
 				++i;
 
+			_rtw_memset((PVOID) colNumBuf, 0, 10);
 			if (!ParseQualifiedString(szLine, &i, colNumBuf, '#', '#')) {
-				RTW_INFO("Fail to parse column number!\n");
-				return _FAIL;
+				RTW_ERR("Fail to parse column number!\n");
+				goto exit;
+			}
+			if (!GetU1ByteIntegerFromStringInDecimal(colNumBuf, &colNum)) {
+				RTW_ERR("Column number \"%s\" is not unsigned decimal\n", colNumBuf);
+				goto exit;
+			}
+			if (colNum == 0) {
+				RTW_ERR("Column number is 0\n");
+				goto exit;
 			}
 
-			if (!GetU1ByteIntegerFromStringInDecimal(colNumBuf, &colNum))
-				return _FAIL;
+			if (DBG_TXPWR_LMT_FILE_PARSE)
+				RTW_PRINT("[%s][%s][%s][%s] column num:%d\n", band, bandwidth, rateSection, ntx, colNum);
 
-			if (colNum > TXPWR_LMT_MAX_REGULATION_NUM) {
-				RTW_INFO("unvalid col number %d (greater than max %d)\n",
-					 colNum, TXPWR_LMT_MAX_REGULATION_NUM);
-				return _FAIL;
+			regulation = (char **)rtw_zmalloc(sizeof(char *) * colNum);
+			if (!regulation) {
+				RTW_ERR("Regulation alloc fail\n");
+				goto exit;
 			}
 
 			for (forCnt = 0; forCnt < colNum; ++forCnt) {
-				u8	regulation_name_cnt = 0;
+				u32 i_ns;
 
 				/* skip the space */
 				while (szLine[i] == ' ' || szLine[i] == '\t')
-					++i;
+					i++;
+				i_ns = i;
 
 				while (szLine[i] != ' ' && szLine[i] != '\t' && szLine[i] != '\0')
-					regulation[forCnt][regulation_name_cnt++] = szLine[i++];
-				/* RTW_INFO("regulation %s!\n", regulation[forCnt]); */
+					i++;
 
-				if (regulation_name_cnt == 0) {
-					RTW_INFO("unvalid number of regulation!\n");
-					return _FAIL;
+				regulation[forCnt] = (char *)rtw_malloc(i - i_ns + 1);
+				if (!regulation[forCnt]) {
+					RTW_ERR("Regulation alloc fail\n");
+					goto exit;
 				}
+
+				_rtw_memcpy(regulation[forCnt], szLine + i_ns, i - i_ns);
+				regulation[forCnt][i - i_ns] = '\0';
+			}
+
+			if (DBG_TXPWR_LMT_FILE_PARSE) {
+				RTW_PRINT("column name:");
+				for (forCnt = 0; forCnt < colNum; ++forCnt)
+					_RTW_PRINT(" %s", regulation[forCnt]);
+				_RTW_PRINT("\n");
 			}
 
-			loadingStage = 3;
-		} else if (loadingStage == 3) {
+			loadingStage = LD_STAGE_CH_ROW;
+		} else if (loadingStage == LD_STAGE_CH_ROW) {
 			char	channel[10] = {0}, powerLimit[10] = {0};
 			u8	cnt = 0;
 
@@ -5244,18 +5102,29 @@ phy_ParsePowerLimitTableFile(
 					++i;
 
 				if (eqNByte((u8 *)(szLine + i), (u8 *)("END"), 3)) {
-					loadingStage = 0;
+					loadingStage = LD_STAGE_TAB_DEFINE;
+					if (regulation) {
+						for (forCnt = 0; forCnt < colNum; ++forCnt) {
+							if (regulation[forCnt]) {
+								rtw_mfree(regulation[forCnt], strlen(regulation[forCnt]) + 1);
+								regulation[forCnt] = NULL;
+							}
+						}
+						rtw_mfree((u8 *)regulation, sizeof(char *) * colNum);
+						regulation = NULL;
+					}
+					colNum = 0;
 					continue;
 				} else {
-					RTW_INFO("Wrong format\n");
-					RTW_INFO("<===== phy_ParsePowerLimitTableFile()\n");
-					return _FAIL;
+					RTW_ERR("Missing \"##   END\" label\n");
+					goto exit;
 				}
 			}
 
 			if ((szLine[0] != 'c' && szLine[0] != 'C') ||
-			    (szLine[1] != 'h' && szLine[1] != 'H')) {
-				RTW_INFO("Meet wrong channel => power limt pair '%c','%c'(%d,%d)\n", szLine[0], szLine[1], szLine[0], szLine[1]);
+				(szLine[1] != 'h' && szLine[1] != 'H')
+			) {
+				RTW_WARN("Wrong channel prefix: '%c','%c'(%d,%d)\n", szLine[0], szLine[1], szLine[0], szLine[1]);
 				continue;
 			}
 			i = 2;/* move to the  location behind 'h' */
@@ -5284,8 +5153,8 @@ phy_ParsePowerLimitTableFile(
 							fraction = szLine[i + 1];
 							i += 2;
 						} else {
-							RTW_INFO("Wrong fraction in TXPWR_LMT.txt\n");
-							return _FAIL;
+							RTW_ERR("Wrong fraction '%c'(%d)\n", szLine[i + 1], szLine[i + 1]);
+							goto exit;
 						}
 
 						break;
@@ -5301,8 +5170,10 @@ phy_ParsePowerLimitTableFile(
 					powerLimit[1] = '3';
 					i += 2;
 				} else {
-					if (!GetU1ByteIntegerFromStringInDecimal(powerLimit, &limitValue))
-						return _FAIL;
+					if (!GetU1ByteIntegerFromStringInDecimal(powerLimit, &limitValue)) {
+						RTW_ERR("Limit \"%s\" is not unsigned decimal\n", powerLimit);
+						goto exit;
+					}
 
 					limitValue *= 2;
 					cnt = 0;
@@ -5339,17 +5210,27 @@ phy_ParsePowerLimitTableFile(
 
 				/* store the power limit value */
 				phy_set_tx_power_limit(pDM_Odm, (u8 *)regulation[forCnt], (u8 *)band,
-					(u8 *)bandwidth, (u8 *)rateSection, (u8 *)rfPath, (u8 *)channel, (u8 *)powerLimit);
+					(u8 *)bandwidth, (u8 *)rateSection, (u8 *)ntx, (u8 *)channel, (u8 *)powerLimit);
 
 			}
-		} else {
-			RTW_INFO("Abnormal loading stage in phy_ParsePowerLimitTableFile()!\n");
-			rtStatus = _FAIL;
-			break;
 		}
 	}
 
-	RTW_INFO("<===phy_ParsePowerLimitTableFile()\n");
+	rtStatus = _SUCCESS;
+
+exit:
+	if (regulation) {
+		for (forCnt = 0; forCnt < colNum; ++forCnt) {
+			if (regulation[forCnt]) {
+				rtw_mfree(regulation[forCnt], strlen(regulation[forCnt]) + 1);
+				regulation[forCnt] = NULL;
+			}
+		}
+		rtw_mfree((u8 *)regulation, sizeof(char *) * colNum);
+		regulation = NULL;
+	}
+
+	RTW_INFO("%s return %d\n", __func__, rtStatus);
 	return rtStatus;
 }
 
@@ -5397,6 +5278,7 @@ PHY_ConfigRFWithPowerLimitTableParaFile(
 
 	return rtStatus;
 }
+#endif /* CONFIG_TXPWR_LIMIT */
 
 void phy_free_filebuf_mask(_adapter *padapter, u8 mask)
 {
diff --git a/rtl8822BU/hal/hal_dm.c b/rtl8822BU/hal/hal_dm.c
index 2198617..021231b 100755..100644
--- a/rtl8822BU/hal/hal_dm.c
+++ b/rtl8822BU/hal/hal_dm.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2014 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2014 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #include <drv_types.h>
 #include <hal_data.h>
@@ -149,8 +144,7 @@ void Init_ODM_ComInfo(_adapter *adapter)
 		/* 1 ============== End of BoardType ============== */
 	}
 
-	odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_DOMAIN_CODE_2G, pHalData->Regulation2_4G);
-	odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_DOMAIN_CODE_5G, pHalData->Regulation5G);
+	rtw_hal_set_odm_var(adapter, HAL_ODM_REGULATION, NULL, _TRUE);
 
 #ifdef CONFIG_DFS_MASTER
 	odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_DFS_REGION_DOMAIN, adapter->registrypriv.dfs_region_domain);
@@ -176,18 +170,27 @@ void Init_ODM_ComInfo(_adapter *adapter)
 	odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_BE_FIX_TX_ANT, pHalData->b_fix_tx_ant);
 	odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_WITH_EXT_ANTENNA_SWITCH, pHalData->with_extenal_ant_switch);
 
+	/* (8822B) efuse 0x3D7 & 0x3D8 for TX PA bias */
+	odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_EFUSE0X3D7, pHalData->efuse0x3d7);
+	odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_EFUSE0X3D8, pHalData->efuse0x3d8);
+
 	/*Add by YuChen for adaptivity init*/
 	odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_ADAPTIVITY, &(adapter->registrypriv.adaptivity_en));
+	odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_MP_MODE, &(adapter->registrypriv.mp_mode));
 	phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE, (adapter->registrypriv.adaptivity_mode != 0) ? TRUE : FALSE);
 	phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_DCBACKOFF, adapter->registrypriv.adaptivity_dc_backoff);
 	phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_DYNAMICLINKADAPTIVITY, (adapter->registrypriv.adaptivity_dml != 0) ? TRUE : FALSE);
 	phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_TH_L2H_INI, adapter->registrypriv.adaptivity_th_l2h_ini);
 	phydm_adaptivity_info_init(pDM_Odm, PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF, adapter->registrypriv.adaptivity_th_edcca_hl_diff);
 
+	if (rtw_odm_adaptivity_needed(adapter) == _TRUE)
+		rtw_odm_adaptivity_config_msg(RTW_DBGDUMP, adapter);
+
 #ifdef CONFIG_IQK_PA_OFF
 	odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_IQKPAOFF, 1);
 #endif
-	odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_IQKFWOFFLOAD, pHalData->RegIQKFWOffload);
+	/* odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_IQKFWOFFLOAD, pHalData->RegIQKFWOffload); */
+	rtw_hal_update_iqk_fw_offload_cap(adapter);
 
 	/* Pointer reference */
 	odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_TX_UNI, &(dvobj->traffic_stat.tx_bytes));
@@ -222,3 +225,172 @@ void Init_ODM_ComInfo(_adapter *adapter)
 	/* odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_BT_OPERATION, _FALSE); */
 	/* odm_cmn_info_hook(pDM_Odm, ODM_CMNINFO_BT_DISABLE_EDCA, _FALSE); */
 }
+
+
+static u32 edca_setting_UL[HT_IOT_PEER_MAX] =
+/*UNKNOWN, REALTEK_90, REALTEK_92SE, BROADCOM,*/
+/*RALINK, ATHEROS, CISCO, MERU, MARVELL, 92U_AP, SELF_AP(DownLink/Tx) */
+{ 0x5e4322, 0xa44f, 0x5e4322, 0x5ea32b, 0x5ea422, 0x5ea322, 0x3ea430, 0x5ea42b, 0x5ea44f, 0x5e4322, 0x5e4322};
+
+static u32 edca_setting_DL[HT_IOT_PEER_MAX] =
+/*UNKNOWN, REALTEK_90, REALTEK_92SE, BROADCOM,*/
+/*RALINK, ATHEROS, CISCO, MERU, MARVELL, 92U_AP, SELF_AP(UpLink/Rx)*/
+{ 0xa44f, 0x5ea44f,	 0x5e4322, 0x5ea42b, 0xa44f, 0xa630, 0x5ea630, 0x5ea42b, 0xa44f, 0xa42b, 0xa42b};
+
+static u32 edca_setting_dl_g_mode[HT_IOT_PEER_MAX] =
+/*UNKNOWN, REALTEK_90, REALTEK_92SE, BROADCOM,*/
+/*RALINK, ATHEROS, CISCO, MERU, MARVELL, 92U_AP, SELF_AP */
+{ 0x4322, 0xa44f, 0x5e4322, 0xa42b, 0x5e4322, 0x4322,	 0xa42b, 0x5ea42b, 0xa44f, 0x5e4322, 0x5ea42b};
+
+void rtw_hal_turbo_edca(_adapter *adapter)
+{
+	HAL_DATA_TYPE		*hal_data = GET_HAL_DATA(adapter);
+	struct dvobj_priv		*dvobj = adapter_to_dvobj(adapter);
+	struct recv_priv		*precvpriv = &(adapter->recvpriv);
+	struct registry_priv		*pregpriv = &adapter->registrypriv;
+	struct mlme_ext_priv	*pmlmeext = &(adapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	/* Parameter suggested by Scott  */
+#if 0
+	u32	EDCA_BE_UL = edca_setting_UL[p_mgnt_info->iot_peer];
+	u32	EDCA_BE_DL = edca_setting_DL[p_mgnt_info->iot_peer];
+#endif
+	u32	EDCA_BE_UL = 0x5ea42b;
+	u32	EDCA_BE_DL = 0x00a42b;
+	u8	ic_type = rtw_get_chip_type(adapter);
+
+	u8	iot_peer = 0;
+	u8	wireless_mode = 0xFF;                 /* invalid value */
+	u8	traffic_index;
+	u32	edca_param;
+	u64	cur_tx_bytes = 0;
+	u64	cur_rx_bytes = 0;
+	u8	bbtchange = _TRUE;
+	u8	is_bias_on_rx = _FALSE;
+	u8	is_linked = _FALSE;
+	u8	interface_type;
+
+	if (hal_data->dis_turboedca)
+		return;
+
+	if (rtw_mi_check_status(adapter, MI_ASSOC))
+		is_linked = _TRUE;
+
+	if (is_linked != _TRUE) {
+		precvpriv->is_any_non_be_pkts = _FALSE;
+		return;
+	}
+
+	if ((pregpriv->wifi_spec == 1)) { /* || (pmlmeinfo->HT_enable == 0)) */
+		precvpriv->is_any_non_be_pkts = _FALSE;
+		return;
+	}
+
+	interface_type = rtw_get_intf_type(adapter);
+	wireless_mode = pmlmeext->cur_wireless_mode;
+
+	iot_peer = pmlmeinfo->assoc_AP_vendor;
+
+	if (iot_peer >=  HT_IOT_PEER_MAX) {
+		precvpriv->is_any_non_be_pkts = _FALSE;
+		return;
+	}
+
+	if (ic_type == RTL8188E) {
+		if ((iot_peer == HT_IOT_PEER_RALINK) || (iot_peer == HT_IOT_PEER_ATHEROS))
+			is_bias_on_rx = _TRUE;
+	}
+
+	/* Check if the status needs to be changed. */
+	if ((bbtchange) || (!precvpriv->is_any_non_be_pkts)) {
+		cur_tx_bytes = dvobj->traffic_stat.cur_tx_bytes;
+		cur_rx_bytes = dvobj->traffic_stat.cur_rx_bytes;
+
+		/* traffic, TX or RX */
+		if (is_bias_on_rx) {
+			if (cur_tx_bytes > (cur_rx_bytes << 2)) {
+				/* Uplink TP is present. */
+				traffic_index = UP_LINK;
+			} else {
+				/* Balance TP is present. */
+				traffic_index = DOWN_LINK;
+			}
+		} else {
+			if (cur_rx_bytes > (cur_tx_bytes << 2)) {
+				/* Downlink TP is present. */
+				traffic_index = DOWN_LINK;
+			} else {
+				/* Balance TP is present. */
+				traffic_index = UP_LINK;
+			}
+		}
+#if 0
+		if ((p_dm_odm->dm_edca_table.prv_traffic_idx != traffic_index)
+			|| (!p_dm_odm->dm_edca_table.is_current_turbo_edca))
+#endif
+		{
+			if (interface_type == RTW_PCIE) {
+				EDCA_BE_UL = 0x6ea42b;
+				EDCA_BE_DL = 0x6ea42b;
+			}
+
+			/* 92D txop can't be set to 0x3e for cisco1250 */
+			if ((iot_peer == HT_IOT_PEER_CISCO) && (wireless_mode == ODM_WM_N24G)) {
+				EDCA_BE_DL = edca_setting_DL[iot_peer];
+				EDCA_BE_UL = edca_setting_UL[iot_peer];
+			}
+			/* merge from 92s_92c_merge temp*/
+			else if ((iot_peer == HT_IOT_PEER_CISCO) && ((wireless_mode == ODM_WM_G) || (wireless_mode == (ODM_WM_B | ODM_WM_G)) || (wireless_mode == ODM_WM_A) || (wireless_mode == ODM_WM_B)))
+				EDCA_BE_DL = edca_setting_dl_g_mode[iot_peer];
+			else if ((iot_peer == HT_IOT_PEER_AIRGO) && ((wireless_mode == ODM_WM_G) || (wireless_mode == ODM_WM_A)))
+				EDCA_BE_DL = 0xa630;
+			else if (iot_peer == HT_IOT_PEER_MARVELL) {
+				EDCA_BE_DL = edca_setting_DL[iot_peer];
+				EDCA_BE_UL = edca_setting_UL[iot_peer];
+			} else if (iot_peer == HT_IOT_PEER_ATHEROS) {
+				/* Set DL EDCA for Atheros peer to 0x3ea42b.*/
+				/* Suggested by SD3 Wilson for ASUS TP issue.*/
+				EDCA_BE_DL = edca_setting_DL[iot_peer];
+			}
+
+			if ((ic_type == RTL8812) || (ic_type == RTL8821) || (ic_type == RTL8192E)) { /* add 8812AU/8812AE */
+				EDCA_BE_UL = 0x5ea42b;
+				EDCA_BE_DL = 0x5ea42b;
+
+				RTW_DBG("8812A: EDCA_BE_UL=0x%x EDCA_BE_DL =0x%x\n", EDCA_BE_UL, EDCA_BE_DL);
+			}
+
+			if (interface_type == RTW_PCIE &&
+				(ic_type == RTL8822B)) {
+				EDCA_BE_DL = 0xa630;
+			}
+
+			if (traffic_index == DOWN_LINK)
+				edca_param = EDCA_BE_DL;
+			else
+				edca_param = EDCA_BE_UL;
+
+			rtw_hal_set_hwreg(adapter, HW_VAR_AC_PARAM_BE, (u8 *)(&edca_param));
+
+			RTW_DBG("Turbo EDCA =0x%x\n", edca_param);
+
+			hal_data->prv_traffic_idx = traffic_index;
+		}
+
+		hal_data->is_turbo_edca = _TRUE;
+	} else {
+		/*  */
+		/* Turn Off EDCA turbo here. */
+		/* Restore original EDCA according to the declaration of AP. */
+		/*  */
+		if (hal_data->is_turbo_edca) {
+			edca_param = hal_data->ac_param_be;
+			rtw_hal_set_hwreg(adapter, HW_VAR_AC_PARAM_BE, (u8 *)(&edca_param));
+			hal_data->is_turbo_edca = _FALSE;
+		}
+	}
+
+}
+
+
diff --git a/rtl8822BU/hal/hal_dm.h b/rtl8822BU/hal/hal_dm.h
index 1232708..a25d3a7 100755..100644
--- a/rtl8822BU/hal/hal_dm.h
+++ b/rtl8822BU/hal/hal_dm.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,15 +11,11 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __HAL_DM_H__
 #define __HAL_DM_H__
 
 void Init_ODM_ComInfo(_adapter *adapter);
+void rtw_hal_turbo_edca(_adapter *adapter);
 
 #endif /* __HAL_DM_H__ */
diff --git a/rtl8822BU/hal/hal_halmac.c b/rtl8822BU/hal/hal_halmac.c
index 51a2c8f..a5d2df4 100755..100644
--- a/rtl8822BU/hal/hal_halmac.c
+++ b/rtl8822BU/hal/hal_halmac.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _HAL_HALMAC_C_
 
 #include <drv_types.h>		/* PADAPTER, struct dvobj_priv, SDIO_ERR_VAL8 and etc. */
@@ -26,6 +21,7 @@
 
 #define DEFAULT_INDICATOR_TIMELMT	1000	/* ms */
 #define FIRMWARE_MAX_SIZE		HALMAC_FW_SIZE_MAX_88XX
+#define MSG_PREFIX			"[HALMAC]"
 
 /*
  * Driver API for HALMAC operations
@@ -47,7 +43,7 @@ static u8 _halmac_mac_reg_page0_chk(const char *func, struct dvobj_priv *dvobj,
 		return _TRUE;
 
 	if (offset & (WLAN_IOREG_DEVICE_ID << 13))  { /*WLAN_IOREG_OFFSET*/
-		mac_reg_offset = offset & HALMAC_WLAN_IOREG_MSK;
+		mac_reg_offset = offset & HALMAC_WLAN_MAC_REG_MSK;
 		if (mac_reg_offset < 0x100) {
 			RTW_ERR(FUNC_ADPT_FMT "access MAC REG -0x%04x in PS-mode:0x%02x\n",
 				FUNC_ADPT_ARG(dvobj_get_primary_adapter(dvobj)), mac_reg_offset, pwrpriv->pwr_mode);
@@ -70,7 +66,7 @@ static u8 _halmac_sdio_cmd52_read(void *p, u32 offset)
 	_halmac_mac_reg_page0_chk(__func__, d, offset);
 	ret = rtw_sdio_read_cmd52(d, offset, &val, 1);
 	if (_FAIL == ret) {
-		RTW_INFO("%s: [ERROR] I/O FAIL!\n", __FUNCTION__);
+		RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__);
 		return SDIO_ERR_VAL8;
 	}
 
@@ -87,7 +83,7 @@ static void _halmac_sdio_cmd52_write(void *p, u32 offset, u8 val)
 	_halmac_mac_reg_page0_chk(__func__, d, offset);
 	ret = rtw_sdio_write_cmd52(d, offset, &val, 1);
 	if (_FAIL == ret)
-		RTW_INFO("%s: [ERROR] I/O FAIL!\n", __FUNCTION__);
+		RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__);
 }
 
 static u8 _halmac_sdio_reg_read_8(void *p, u32 offset)
@@ -95,7 +91,7 @@ static u8 _halmac_sdio_reg_read_8(void *p, u32 offset)
 	struct dvobj_priv *d;
 	u8 *pbuf;
 	u8 val;
-	int err;
+	u8 ret;
 
 
 	d = (struct dvobj_priv *)p;
@@ -105,9 +101,9 @@ static u8 _halmac_sdio_reg_read_8(void *p, u32 offset)
 	if (!pbuf)
 		return val;
 
-	err = d->intf_ops->read(d, offset, pbuf, 1, 0);
-	if (err) {
-		RTW_INFO("%s: [ERROR] I/O FAIL!\n", __FUNCTION__);
+	ret = rtw_sdio_read_cmd53(d, offset, pbuf, 1);
+	if (ret == _FAIL) {
+		RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__);
 		goto exit;
 	}
 
@@ -124,7 +120,7 @@ static u16 _halmac_sdio_reg_read_16(void *p, u32 offset)
 	struct dvobj_priv *d;
 	u8 *pbuf;
 	u16 val;
-	int err;
+	u8 ret;
 
 
 	d = (struct dvobj_priv *)p;
@@ -134,9 +130,9 @@ static u16 _halmac_sdio_reg_read_16(void *p, u32 offset)
 	if (!pbuf)
 		return val;
 
-	err = d->intf_ops->read(d, offset, pbuf, 2, 0);
-	if (err) {
-		RTW_INFO("%s: [ERROR] I/O FAIL!\n", __FUNCTION__);
+	ret = rtw_sdio_read_cmd53(d, offset, pbuf, 2);
+	if (ret == _FAIL) {
+		RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__);
 		goto exit;
 	}
 
@@ -153,7 +149,7 @@ static u32 _halmac_sdio_reg_read_32(void *p, u32 offset)
 	struct dvobj_priv *d;
 	u8 *pbuf;
 	u32 val;
-	int err;
+	u8 ret;
 
 
 	d = (struct dvobj_priv *)p;
@@ -163,9 +159,9 @@ static u32 _halmac_sdio_reg_read_32(void *p, u32 offset)
 	if (!pbuf)
 		return val;
 
-	err = d->intf_ops->read(d, offset, pbuf, 4, 0);
-	if (err) {
-		RTW_INFO("%s: [ERROR] I/O FAIL!\n", __FUNCTION__);
+	ret = rtw_sdio_read_cmd53(d, offset, pbuf, 4);
+	if (ret == _FAIL) {
+		RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__);
 		goto exit;
 	}
 
@@ -181,12 +177,12 @@ static u8 _halmac_sdio_reg_read_n(void *p, u32 offset, u32 size, u8 *data)
 {
 	struct dvobj_priv *d = (struct dvobj_priv *)p;
 	PSDIO_DATA psdio = &d->intf_data;
-
 	u8 *pbuf;
-	int err;
+	u8 ret;
 	u8 rst = _FALSE;
 	u32 sdio_read_size;
 
+
 	sdio_read_size = RND4(size);
 	if (sdio_read_size > psdio->block_transfer_len)
 		sdio_read_size = _RND(sdio_read_size, psdio->block_transfer_len);
@@ -195,9 +191,9 @@ static u8 _halmac_sdio_reg_read_n(void *p, u32 offset, u32 size, u8 *data)
 	if ((!pbuf) || (!data))
 		return rst;
 
-	err = d->intf_ops->read(d, offset, pbuf, sdio_read_size, 0);
-	if (err) {
-		RTW_ERR("%s: [ERROR] I/O FAIL!\n", __func__);
+	ret = rtw_sdio_read_cmd53(d, offset, pbuf, sdio_read_size);
+	if (ret == _FAIL) {
+		RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__);
 		goto exit;
 	}
 
@@ -213,7 +209,7 @@ static void _halmac_sdio_reg_write_8(void *p, u32 offset, u8 val)
 {
 	struct dvobj_priv *d;
 	u8 *pbuf;
-	int err;
+	u8 ret;
 
 
 	d = (struct dvobj_priv *)p;
@@ -223,9 +219,9 @@ static void _halmac_sdio_reg_write_8(void *p, u32 offset, u8 val)
 		return;
 	_rtw_memcpy(pbuf, &val, 1);
 
-	err = d->intf_ops->write(d, offset, pbuf, 1, 0);
-	if (err)
-		RTW_INFO("%s: [ERROR] I/O FAIL!\n", __FUNCTION__);
+	ret = rtw_sdio_write_cmd53(d, offset, pbuf, 1);
+	if (ret == _FAIL)
+		RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__);
 
 	rtw_mfree(pbuf, 1);
 }
@@ -234,7 +230,7 @@ static void _halmac_sdio_reg_write_16(void *p, u32 offset, u16 val)
 {
 	struct dvobj_priv *d;
 	u8 *pbuf;
-	int err;
+	u8 ret;
 
 
 	d = (struct dvobj_priv *)p;
@@ -245,9 +241,9 @@ static void _halmac_sdio_reg_write_16(void *p, u32 offset, u16 val)
 		return;
 	_rtw_memcpy(pbuf, &val, 2);
 
-	err = d->intf_ops->write(d, offset, pbuf, 2, 0);
-	if (err)
-		RTW_INFO("%s: [ERROR] I/O FAIL!\n", __FUNCTION__);
+	ret = rtw_sdio_write_cmd53(d, offset, pbuf, 2);
+	if (ret == _FAIL)
+		RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__);
 
 	rtw_mfree(pbuf, 2);
 }
@@ -256,7 +252,7 @@ static void _halmac_sdio_reg_write_32(void *p, u32 offset, u32 val)
 {
 	struct dvobj_priv *d;
 	u8 *pbuf;
-	int err;
+	u8 ret;
 
 
 	d = (struct dvobj_priv *)p;
@@ -267,9 +263,9 @@ static void _halmac_sdio_reg_write_32(void *p, u32 offset, u32 val)
 		return;
 	_rtw_memcpy(pbuf, &val, 4);
 
-	err = d->intf_ops->write(d, offset, pbuf, 4, 0);
-	if (err)
-		RTW_INFO("%s: [ERROR] I/O FAIL!\n", __FUNCTION__);
+	ret = rtw_sdio_write_cmd53(d, offset, pbuf, 4);
+	if (ret == _FAIL)
+		RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__);
 
 	rtw_mfree(pbuf, 4);
 }
@@ -324,7 +320,7 @@ static void _halmac_reg_write_8(void *p, u32 offset, u8 val)
 
 	err = rtw_write8(adapter, offset, val);
 	if (err == _FAIL)
-		RTW_INFO("%s: [ERROR] I/O FAIL!\n", __FUNCTION__);
+		RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__);
 }
 
 static void _halmac_reg_write_16(void *p, u32 offset, u16 val)
@@ -339,7 +335,7 @@ static void _halmac_reg_write_16(void *p, u32 offset, u16 val)
 
 	err = rtw_write16(adapter, offset, val);
 	if (err == _FAIL)
-		RTW_INFO("%s: [ERROR] I/O FAIL!\n", __FUNCTION__);
+		RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__);
 }
 
 static void _halmac_reg_write_32(void *p, u32 offset, u32 val)
@@ -354,7 +350,7 @@ static void _halmac_reg_write_32(void *p, u32 offset, u32 val)
 
 	err = rtw_write32(adapter, offset, val);
 	if (err == _FAIL)
-		RTW_INFO("%s: [ERROR] I/O FAIL!\n", __FUNCTION__);
+		RTW_ERR("%s: I/O FAIL!\n", __FUNCTION__);
 }
 #endif /* !CONFIG_SDIO_HCI */
 
@@ -418,30 +414,38 @@ static u8 _halmac_mutex_unlock(void *p, HALMAC_MUTEX *pMutex)
 static u8 _halmac_msg_print(void *p, u32 msg_type, u8 msg_level, s8 *fmt, ...)
 {
 #define MSG_LEN		100
-#define MSG_PREFIX	"[HALMAC]"
 	va_list args;
 	u8 str[MSG_LEN] = {0};
+	int err;
+	u8 ret = _TRUE;
 
 
 	str[0] = '\n';
 	va_start(args, fmt);
-	vsnprintf(str, MSG_LEN, fmt, args);
+	err = vsnprintf(str, MSG_LEN, fmt, args);
 	va_end(args);
 
-	if (msg_level <= HALMAC_DBG_ERR)
+	/* An output error is encountered */
+	if (err < 0)
+		return _FALSE;
+	/* Output may be truncated due to size limit */
+	if ((err == (MSG_LEN - 1)) && (str[MSG_LEN - 2] != '\n'))
+		ret = _FALSE;
+
+	if (msg_level == HALMAC_DBG_ALWAYS)
+		RTW_PRINT(MSG_PREFIX "%s", str);
+	else if (msg_level <= HALMAC_DBG_ERR)
 		RTW_ERR(MSG_PREFIX "%s", str);
 	else if (msg_level <= HALMAC_DBG_WARN)
 		RTW_WARN(MSG_PREFIX "%s", str);
 	else
 		RTW_DBG(MSG_PREFIX "%s", str);
 
-	return _TRUE;
+	return ret;
 }
 
 static u8 _halmac_buff_print(void *p, u32 msg_type, u8 msg_level, s8 *buf, u32 size)
 {
-#define MSG_PREFIX	"[HALMAC]"
-
 	if (msg_level <= HALMAC_DBG_WARN)
 		RTW_INFO_DUMP(MSG_PREFIX, buf, size);
 	else
@@ -473,17 +477,15 @@ static inline u8 is_valid_id_status(HALMAC_FEATURE_ID id, HALMAC_CMD_PROCESS_STA
 		break;
 	case HALMAC_FEATURE_DUMP_PHYSICAL_EFUSE:
 		RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]);
-		if (HALMAC_CMD_PROCESS_DONE != status) {
-			RTW_INFO("%s: <WARN> id(%d) unspecified status(%d)!\n",
+		if (HALMAC_CMD_PROCESS_DONE != status)
+			RTW_INFO("%s: id(%d) unspecified status(%d)!\n",
 				 __FUNCTION__, id, status);
-		}
 		break;
 	case HALMAC_FEATURE_DUMP_LOGICAL_EFUSE:
 		RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]);
-		if (HALMAC_CMD_PROCESS_DONE != status) {
-			RTW_INFO("%s: <WARN> id(%d) unspecified status(%d)!\n",
+		if (HALMAC_CMD_PROCESS_DONE != status)
+			RTW_INFO("%s: id(%d) unspecified status(%d)!\n",
 				 __FUNCTION__, id, status);
-		}
 		break;
 	case HALMAC_FEATURE_UPDATE_PACKET:
 		RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]);
@@ -510,7 +512,7 @@ static inline u8 is_valid_id_status(HALMAC_FEATURE_ID id, HALMAC_CMD_PROCESS_STA
 		RTW_INFO("%s: %s\n", __FUNCTION__, RTW_HALMAC_FEATURE_NAME[id]);
 		break;
 	default:
-		RTW_INFO("%s: unknown feature id(%d)\n", __FUNCTION__, id);
+		RTW_ERR("%s: unknown feature id(%d)\n", __FUNCTION__, id);
 		return _FALSE;
 	}
 
@@ -527,7 +529,7 @@ static int init_halmac_event_with_waittime(struct dvobj_priv *d, HALMAC_FEATURE_
 		if (!sctx)
 			return -1;
 	} else {
-		RTW_INFO("%s: <WARN> id(%d) sctx is not NULL!!\n", __FUNCTION__, id);
+		RTW_WARN("%s: id(%d) sctx is not NULL!!\n", __FUNCTION__, id);
 		sctx = d->hmpriv.indicator[id].sctx;
 		d->hmpriv.indicator[id].sctx = NULL;
 	}
@@ -563,6 +565,8 @@ static void free_halmac_event(struct dvobj_priv *d, HALMAC_FEATURE_ID id)
 
 static int wait_halmac_event(struct dvobj_priv *d, HALMAC_FEATURE_ID id)
 {
+	PHALMAC_ADAPTER mac;
+	PHALMAC_API api;
 	struct submit_ctx *sctx;
 	int ret;
 
@@ -576,6 +580,13 @@ static int wait_halmac_event(struct dvobj_priv *d, HALMAC_FEATURE_ID id)
 	if (_SUCCESS == ret)
 		return 0;
 
+	/* timeout! We have to reset halmac state */
+	RTW_ERR("%s: Wait id(%d, %s) TIMEOUT! Reset HALMAC state!\n",
+		__FUNCTION__, id, RTW_HALMAC_FEATURE_NAME[id]);
+	mac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(mac);
+	api->halmac_reset_feature(mac, id);
+
 	return -1;
 }
 
@@ -599,6 +610,7 @@ static u8 _halmac_event_indication(void *p, HALMAC_FEATURE_ID feature_id, HALMAC
 	hal = GET_HAL_DATA(adapter);
 	tbl = d->hmpriv.indicator;
 
+	/* Filter(Skip) middle status indication */
 	ret = is_valid_id_status(feature_id, process_status);
 	if (_FALSE == ret)
 		goto exit;
@@ -607,23 +619,24 @@ static u8 _halmac_event_indication(void *p, HALMAC_FEATURE_ID feature_id, HALMAC
 	indicator->status = process_status;
 	indicator->ret_size = size;
 	if (!indicator->sctx) {
-		RTW_INFO("%s: No feature id(%d) waiting!!\n", __FUNCTION__, feature_id);
+		RTW_WARN("%s: No feature id(%d, %s) waiting!!\n", __FUNCTION__, feature_id, RTW_HALMAC_FEATURE_NAME[feature_id]);
 		goto exit;
 	}
 	sctx = indicator->sctx;
 
 	if (HALMAC_CMD_PROCESS_ERROR == process_status) {
-		RTW_INFO("%s: Something wrong id(%d)!!\n", __FUNCTION__, feature_id);
+		RTW_ERR("%s: Something wrong id(%d, %s)!!\n", __FUNCTION__, feature_id, RTW_HALMAC_FEATURE_NAME[feature_id]);
 		rtw_sctx_done_err(&sctx, RTW_SCTX_DONE_UNKNOWN);
 		goto exit;
 	}
 
 	if (size > indicator->buf_size) {
-		RTW_INFO("%s: <WARN> id(%d) buffer is not enough(%d<%d), data will be truncated!\n",
-			 __FUNCTION__, feature_id, indicator->buf_size, size);
+		RTW_WARN("%s: id(%d, %s) buffer is not enough(%d<%d), data will be truncated!\n",
+			 __FUNCTION__, feature_id, RTW_HALMAC_FEATURE_NAME[feature_id], indicator->buf_size, size);
 		cpsz = indicator->buf_size;
-	} else
+	} else {
 		cpsz = size;
+	}
 	if (cpsz && indicator->buffer)
 		_rtw_memcpy(indicator->buffer, buf, cpsz);
 
@@ -844,9 +857,8 @@ static int init_priv(struct halmacpriv *priv)
 	u32 count, size;
 
 
-	size = sizeof(*priv);
-	_rtw_memset(priv, 0, size);
-
+	if (priv->indicator)
+		RTW_WARN("%s: HALMAC private data is not CLEAR!\n", __FUNCTION__);
 	count = HALMAC_FEATURE_ALL + 1;
 	size = sizeof(*indicator) * count;
 	indicator = (struct halmac_indicator *)rtw_zmalloc(size);
@@ -877,7 +889,7 @@ static void deinit_priv(struct halmacpriv *priv)
 				if (!indicator[i].sctx)
 					continue;
 
-				RTW_INFO("%s: <WARN> %s id(%d) sctx still exist!!\n",
+				RTW_WARN("%s: %s id(%d) sctx still exist!!\n",
 					__FUNCTION__, RTW_HALMAC_FEATURE_NAME[i], i);
 				sctx = indicator[i].sctx;
 				indicator[i].sctx = NULL;
@@ -890,6 +902,35 @@ static void deinit_priv(struct halmacpriv *priv)
 	}
 }
 
+#ifdef CONFIG_SDIO_HCI
+static enum _HALMAC_SDIO_SPEC_VER _sdio_ver_drv2halmac(struct dvobj_priv *d)
+{
+	bool v3;
+	enum _HALMAC_SDIO_SPEC_VER ver;
+
+
+	v3 = rtw_is_sdio30(dvobj_get_primary_adapter(d));
+	if (v3)
+		ver = HALMAC_SDIO_SPEC_VER_3_00;
+	else
+		ver = HALMAC_SDIO_SPEC_VER_2_00;
+
+	return ver;
+}
+#endif /* CONFIG_SDIO_HCI */
+
+void rtw_dump_halmac_info(void *sel)
+{
+	HALMAC_RET_STATUS status;
+	HALMAC_VER halmac_version;
+
+	status = halmac_get_version(&halmac_version);
+	if (status != HALMAC_RET_SUCCESS)
+		return;
+
+	RTW_PRINT_SEL(sel, "HALMAC VER -%x.%x.%x\n", halmac_version.major_ver, halmac_version.prototype_ver, halmac_version.minor_ver);
+}
+
 int rtw_halmac_init_adapter(struct dvobj_priv *d, PHALMAC_PLATFORM_API pf_api)
 {
 	PHALMAC_ADAPTER halmac;
@@ -897,6 +938,9 @@ int rtw_halmac_init_adapter(struct dvobj_priv *d, PHALMAC_PLATFORM_API pf_api)
 	HALMAC_INTERFACE intf;
 	HALMAC_RET_STATUS status;
 	int err = 0;
+#ifdef CONFIG_SDIO_HCI
+	HALMAC_SDIO_HW_INFO info;
+#endif /* CONFIG_SDIO_HCI */
 
 
 	halmac = dvobj_to_halmac(d);
@@ -921,13 +965,40 @@ int rtw_halmac_init_adapter(struct dvobj_priv *d, PHALMAC_PLATFORM_API pf_api)
 #endif
 	status = halmac_init_adapter(d, pf_api, intf, &halmac, &api);
 	if (HALMAC_RET_SUCCESS != status) {
-		RTW_INFO("%s: halmac_init_adapter fail!(status=%d)\n", __FUNCTION__, status);
+		RTW_ERR("%s: halmac_init_adapter fail!(status=%d)\n", __FUNCTION__, status);
 		err = -1;
 		goto out;
 	}
 
 	dvobj_set_halmac(d, halmac);
 
+	status = api->halmac_interface_integration_tuning(halmac);
+	if (status != HALMAC_RET_SUCCESS) {
+		RTW_ERR("%s: halmac_interface_integration_tuning fail!(status=%d)\n", __FUNCTION__, status);
+		err = -1;
+		goto out;
+	}
+
+	status = api->halmac_phy_cfg(halmac, HALMAC_INTF_PHY_PLATFORM_ALL);
+	if (status != HALMAC_RET_SUCCESS) {
+		RTW_ERR("%s: halmac_phy_cfg fail!(status=%d)\n", __FUNCTION__, status);
+		err = -1;
+		goto out;
+	}
+
+#ifdef CONFIG_SDIO_HCI
+	info.spec_ver = _sdio_ver_drv2halmac(d);
+	/* clock unit is MHz */
+	info.clock_speed = RTW_DIV_ROUND_UP(rtw_sdio_get_clock(d), 1000000);
+	RTW_DBG("%s: SDIO clock=%uMHz ver=%u\n", __FUNCTION__, info.clock_speed, info.spec_ver+2);
+	status = api->halmac_sdio_hw_info(halmac, &info);
+	if (status != HALMAC_RET_SUCCESS) {
+		RTW_ERR("%s: halmac_sdio_hw_info fail!(status=%d)\n", __FUNCTION__, status);
+		err = -1;
+		goto out;
+	}
+#endif /* CONFIG_SDIO_HCI */
+
 out:
 	if (err)
 		rtw_halmac_deinit_adapter(d);
@@ -991,10 +1062,10 @@ int rtw_halmac_poweron(struct dvobj_priv *d)
 		goto out;
 
 #ifdef CONFIG_SDIO_HCI
-	status = api->halmac_sdio_cmd53_4byte(halmac, 1);
+	status = api->halmac_sdio_cmd53_4byte(halmac, HALMAC_SDIO_CMD53_4BYTE_MODE_RW);
 	if (status != HALMAC_RET_SUCCESS)
 		goto out;
-#endif
+#endif /* CONFIG_SDIO_HCI */
 
 	status = api->halmac_mac_power_switch(halmac, HALMAC_MAC_POWER_ON);
 	if (HALMAC_RET_PWR_UNCHANGE == status) {
@@ -1290,20 +1361,26 @@ static int download_fw(struct dvobj_priv *d, u8 *fw, u32 fwsize, u8 re_dl)
 		if (HALMAC_RET_SUCCESS != status)
 			return -1;
 
-		/* 7. Send General Info */
+		/* 7. Config RX Aggregation */
+		err = rtw_halmac_rx_agg_switch(d, _TRUE);
+		if (err)
+			return -1;
+
+		/* 8. Send General Info */
 		err = _send_general_info(d);
 		if (err)
 			return -1;
 	}
 
-	/* 8. Reset driver variables if needed */
+	/* 9. Reset driver variables if needed */
 	hal->LastHMEBoxNum = 0;
 
-	/* 9. Get FW version */
+	/* 10. Get FW version */
 	status = api->halmac_get_fw_version(mac, &fw_vesion);
 	if (status == HALMAC_RET_SUCCESS) {
 		hal->firmware_version = fw_vesion.version;
 		hal->firmware_sub_version = fw_vesion.sub_version;
+		hal->firmware_size = fwsize;
 	}
 
 	return err;
@@ -1562,6 +1639,115 @@ out:
 	return err;
 }
 
+u8 rtw_halmac_txfifo_is_empty(struct dvobj_priv *d)
+{
+	PHALMAC_ADAPTER mac;
+	PHALMAC_API api;
+	u8 rst = _TRUE;
+
+	mac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(mac);
+	if (HALMAC_RET_TXFIFO_NO_EMPTY == api->halmac_txfifo_is_empty(mac, 10))
+		rst = _FALSE;
+
+	return rst;
+}
+
+static HALMAC_DLFW_MEM _get_halmac_fw_mem(enum fw_mem mem)
+{
+	if (FW_EMEM == mem)
+		return HALMAC_DLFW_MEM_EMEM;
+	else if (FW_IMEM == mem)
+		return HALMAC_DLFW_MEM_UNDEFINE;
+	else if (FW_DMEM == mem)
+		return HALMAC_DLFW_MEM_UNDEFINE;
+	else
+		return HALMAC_DLFW_MEM_UNDEFINE;
+}
+
+#define DBG_DL_FW_MEM
+int rtw_halmac_dlfw_mem(struct dvobj_priv *d, u8 *fw, u32 fwsize, enum fw_mem mem)
+{
+	PHALMAC_ADAPTER mac;
+	PHALMAC_API api;
+	HALMAC_RET_STATUS status;
+	int err = 0;
+	u8 chk_cnt = 0;
+	bool txfifo_empty = _FALSE;
+
+	mac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(mac);
+
+	if ((!fw) || (!fwsize))
+		return -1;
+
+	/* 1. Driver Stop Tx */
+	/* ToDo */
+
+	/* 2. Driver Check Tx FIFO is empty */
+	do {
+		txfifo_empty = rtw_halmac_txfifo_is_empty(d);
+		chk_cnt++;
+		#ifdef DBG_DL_FW_MEM
+		RTW_INFO("polling txfifo empty chk_cnt:%d\n", chk_cnt);
+		#endif
+		rtw_msleep_os(2);
+	} while ((!txfifo_empty) && (chk_cnt < 100));
+
+	if (_FALSE == txfifo_empty) {
+		#ifdef DBG_DL_FW_MEM
+		{
+			PADAPTER adapter = dvobj_get_primary_adapter(d);
+
+			RTW_ERR("%s => polling txfifo empty failed\n", __func__);
+			RTW_ERR("REG_210:0x%08x\n", rtw_read32(adapter, 0x210));
+			RTW_ERR("REG_230:0x%08x\n", rtw_read32(adapter, 0x230));
+			RTW_ERR("REG_234:0x%08x\n", rtw_read32(adapter, 0x234));
+			RTW_ERR("REG_238:0x%08x\n", rtw_read32(adapter, 0x238));
+			RTW_ERR("REG_23C:0x%08x\n", rtw_read32(adapter, 0x23C));
+			RTW_ERR("REG_240:0x%08x\n", rtw_read32(adapter, 0x240));
+		}
+		#endif
+		return -1;
+	}
+
+	/* 3. Download Firmware MEM */
+	status = api->halmac_free_download_firmware(mac, _get_halmac_fw_mem(mem), fw, fwsize);
+	if (HALMAC_RET_SUCCESS != status) {
+		#ifdef DBG_DL_FW_MEM
+		RTW_ERR("%s => halmac_free_download_firmware failed\n", __func__);
+		#endif
+		return -1;
+	}
+	/* 4. Driver resume TX if needed */
+	/* ToDo */
+
+	return err;
+}
+
+int rtw_halmac_dlfw_mem_from_file(struct dvobj_priv *d, u8 *fwpath, enum fw_mem mem)
+{
+	u8 *fw = NULL;
+	u32 fwmaxsize, size = 0;
+	int err = 0;
+
+	fwmaxsize = FIRMWARE_MAX_SIZE;
+	fw = rtw_zmalloc(fwmaxsize);
+	if (!fw)
+		return -1;
+
+	size = rtw_retrieve_from_file(fwpath, fw, fwmaxsize);
+	if (size)
+		err = rtw_halmac_dlfw_mem(d, fw, size, mem);
+	else
+		err = -1;
+
+	rtw_mfree(fw, fwmaxsize);
+	fw = NULL;
+
+	return err;
+}
+
 /*
  * Return:
  *	0	Success
@@ -1572,11 +1758,10 @@ int rtw_halmac_dlfw(struct dvobj_priv *d, u8 *fw, u32 fwsize)
 	PADAPTER adapter;
 	HALMAC_RET_STATUS status;
 	u32 ok = _TRUE;
-	u8 fw_ok = _FALSE;
 	int err, err_ret = -1;
 
 
-	if (!fw && !fwsize)
+	if (!fw || !fwsize)
 		return -22;
 
 	adapter = dvobj_get_primary_adapter(d);
@@ -1585,6 +1770,7 @@ int rtw_halmac_dlfw(struct dvobj_priv *d, u8 *fw, u32 fwsize)
 	if (rtw_is_hw_init_completed(adapter))
 		return download_fw(d, fw, fwsize, 1);
 
+	/* Download firmware before hal init */
 	/* Power on, download firmware and init mac */
 	ok = rtw_hal_power_on(adapter);
 	if (_FAIL == ok)
@@ -1672,8 +1858,6 @@ static u8 _is_fw_read_cmd_down(PADAPTER adapter, u8 msgbox_num)
 	int retry_cnts = 100;
 	u8 valid;
 
-	/* RTW_INFO("_is_fw_read_cmd_down, reg_1cc(%x), msg_box(%d)...\n", rtw_read8(adapter, REG_HMETFR), msgbox_num); */
-
 	do {
 		valid = rtw_read8(adapter, REG_HMETFR) & BIT(msgbox_num);
 		if (0 == valid)
@@ -1682,9 +1866,21 @@ static u8 _is_fw_read_cmd_down(PADAPTER adapter, u8 msgbox_num)
 			rtw_msleep_os(1);
 	} while ((!read_down) && (retry_cnts--));
 
+	if (_FALSE == read_down)
+		RTW_WARN("%s, reg_1cc(%x), msg_box(%d)...\n", __func__, rtw_read8(adapter, REG_HMETFR), msgbox_num);
+
 	return read_down;
 }
 
+/**
+ * rtw_halmac_send_h2c() - Send H2C to firmware
+ * @d:		struct dvobj_priv*
+ * @h2c:	H2C data buffer, suppose to be 8 bytes
+ *
+ * Send H2C to firmware by message box register(0x1D0~0x1D3 & 0x1F0~0x1F3).
+ *
+ * Return: 0 if process OK, otherwise fail to send this H2C.
+ */
 int rtw_halmac_send_h2c(struct dvobj_priv *d, u8 *h2c)
 {
 	PADAPTER adapter = dvobj_get_primary_adapter(d);
@@ -1694,40 +1890,40 @@ int rtw_halmac_send_h2c(struct dvobj_priv *d, u8 *h2c)
 	u32 msgbox_ex_addr = 0;
 	u32 h2c_cmd = 0;
 	u32 h2c_cmd_ex = 0;
-	s32 ret = _FAIL;
+	int err = -1;
 
-	if (adapter->bFWReady == _FALSE) {
-		RTW_INFO("%s: return H2C cmd because fw is not ready\n", __FUNCTION__);
-		return ret;
+	if (hal->bFWReady == _FALSE) {
+		RTW_WARN("%s: return H2C cmd because fw is not ready\n", __FUNCTION__);
+		return err;
 	}
 
 	if (!h2c) {
-		RTW_INFO("%s: pbuf is NULL\n", __FUNCTION__);
-		return ret;
+		RTW_WARN("%s: pbuf is NULL\n", __FUNCTION__);
+		return err;
 	}
 
 	if (rtw_is_surprise_removed(adapter)) {
-		RTW_INFO("%s: surprise removed\n", __FUNCTION__);
-		return ret;
+		RTW_WARN("%s: surprise removed\n", __FUNCTION__);
+		return err;
 	}
 
 	_enter_critical_mutex(&d->h2c_fwcmd_mutex, NULL);
 
-	/* pay attention to if race condition happened in  H2C cmd setting */
+	/* pay attention to if race condition happened in H2C cmd setting */
 	h2c_box_num = hal->LastHMEBoxNum;
 
 	if (!_is_fw_read_cmd_down(adapter, h2c_box_num)) {
-		RTW_INFO(" fw read cmd failed...\n");
+		RTW_WARN(" fw read cmd failed...\n");
 		goto exit;
 	}
 
-	/* Write Ext command(byte 4 -7) */
+	/* Write Ext command (byte 4~7) */
 	msgbox_ex_addr = REG_HMEBOX_E0 + (h2c_box_num * EX_MESSAGE_BOX_SIZE);
 	_rtw_memcpy((u8 *)(&h2c_cmd_ex), h2c + 4, EX_MESSAGE_BOX_SIZE);
 	h2c_cmd_ex = le32_to_cpu(h2c_cmd_ex);
 	rtw_write32(adapter, msgbox_ex_addr, h2c_cmd_ex);
 
-	/* Write command (byte 0 -3 ) */
+	/* Write command (byte 0~3) */
 	msgbox_addr = REG_HMEBOX0 + (h2c_box_num * MESSAGE_BOX_SIZE);
 	_rtw_memcpy((u8 *)(&h2c_cmd), h2c, 4);
 	h2c_cmd = le32_to_cpu(h2c_cmd);
@@ -1735,16 +1931,31 @@ int rtw_halmac_send_h2c(struct dvobj_priv *d, u8 *h2c)
 
 	/* update last msg box number */
 	hal->LastHMEBoxNum = (h2c_box_num + 1) % MAX_H2C_BOX_NUMS;
-	ret = _SUCCESS;
+	err = 0;
 
 #ifdef DBG_H2C_CONTENT
 	RTW_INFO_DUMP("[H2C] - ", h2c, RTW_HALMAC_H2C_MAX_SIZE);
 #endif
 exit:
 	_exit_critical_mutex(&d->h2c_fwcmd_mutex, NULL);
-	return ret;
+	return err;
 }
 
+/**
+ * rtw_halmac_c2h_handle() - Handle C2H for HALMAC
+ * @d:		struct dvobj_priv*
+ * @c2h:	Full C2H packet, including RX description and payload
+ * @size:	Size(byte) of c2h
+ *
+ * Send C2H packet to HALMAC to process C2H packets, and the expected C2H ID is
+ * 0xFF. This function won't have any I/O, so caller doesn't have to call it in
+ * I/O safe place(ex. command thread).
+ *
+ * Please sure doesn't call this function in the same thread as someone is
+ * waiting HALMAC C2H ack, otherwise there is a deadlock happen.
+ *
+ * Return: 0 if process OK, otherwise no action for this C2H.
+ */
 int rtw_halmac_c2h_handle(struct dvobj_priv *d, u8 *c2h, u32 size)
 {
 	PHALMAC_ADAPTER mac;
@@ -1817,7 +2028,7 @@ int rtw_halmac_read_physical_efuse_map(struct dvobj_priv *d, u8 *map, u32 size)
 	if (ret)
 		return -1;
 
-	status = api->halmac_dump_efuse_map(mac, HALMAC_EFUSE_R_AUTO);
+	status = api->halmac_dump_efuse_map(mac, HALMAC_EFUSE_R_DRV);
 	if (HALMAC_RET_SUCCESS != status) {
 		free_halmac_event(d, id);
 		return -1;
@@ -1837,19 +2048,40 @@ int rtw_halmac_read_physical_efuse(struct dvobj_priv *d, u32 offset, u32 cnt, u8
 	HALMAC_RET_STATUS status;
 	u8 v;
 	u32 i;
+	u8 *efuse = NULL;
+	u32 size = 0;
+	int err = 0;
 
 
 	mac = dvobj_to_halmac(d);
 	api = HALMAC_GET_API(mac);
 
-	for (i = 0; i < cnt; i++) {
-		status = api->halmac_read_efuse(mac, offset + i, &v);
-		if (HALMAC_RET_SUCCESS != status)
+	if (api->halmac_read_efuse) {
+		for (i = 0; i < cnt; i++) {
+			status = api->halmac_read_efuse(mac, offset + i, &v);
+			if (HALMAC_RET_SUCCESS != status)
+				return -1;
+			data[i] = v;
+		}
+	} else {
+		err = rtw_halmac_get_physical_efuse_size(d, &size);
+		if (err)
 			return -1;
-		data[i] = v;
+
+		efuse = rtw_zmalloc(size);
+		if (!efuse)
+			return -1;
+
+		err = rtw_halmac_read_physical_efuse_map(d, efuse, size);
+		if (err)
+			err = -1;
+		else
+			_rtw_memcpy(data, efuse + offset, cnt);
+
+		rtw_mfree(efuse, size);
 	}
 
-	return 0;
+	return err;
 }
 
 int rtw_halmac_write_physical_efuse(struct dvobj_priv *d, u32 offset, u32 cnt, u8 *data)
@@ -1863,6 +2095,9 @@ int rtw_halmac_write_physical_efuse(struct dvobj_priv *d, u32 offset, u32 cnt, u
 	mac = dvobj_to_halmac(d);
 	api = HALMAC_GET_API(mac);
 
+	if (api->halmac_write_efuse == NULL)
+		return -1;
+
 	for (i = 0; i < cnt; i++) {
 		status = api->halmac_write_efuse(mac, offset + i, data[i]);
 		if (HALMAC_RET_SUCCESS != status)
@@ -2128,6 +2363,56 @@ int rtw_halmac_set_bandwidth(struct dvobj_priv *d, u8 channel, u8 pri_ch_idx, u8
 	return 0;
 }
 
+/**
+ * rtw_halmac_set_edca() - config edca parameter
+ * @d:		struct dvobj_priv*
+ * @queue:	XMIT_[VO/VI/BE/BK]_QUEUE
+ * @aifs:	Arbitration inter-frame space(AIFS)
+ * @cw:		Contention window(CW)
+ * @txop:	MAX Transmit Opportunity(TXOP)
+ *
+ * Return: 0 if process OK, otherwise -1.
+ */
+int rtw_halmac_set_edca(struct dvobj_priv *d, u8 queue, u8 aifs, u8 cw, u16 txop)
+{
+	PHALMAC_ADAPTER mac;
+	PHALMAC_API api;
+	HALMAC_ACQ_ID ac;
+	HALMAC_EDCA_PARA edca;
+	HALMAC_RET_STATUS status;
+
+
+	mac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(mac);
+
+	switch (queue) {
+	case XMIT_VO_QUEUE:
+		ac = HALMAC_ACQ_ID_VO;
+		break;
+	case XMIT_VI_QUEUE:
+		ac = HALMAC_ACQ_ID_VI;
+		break;
+	case XMIT_BE_QUEUE:
+		ac = HALMAC_ACQ_ID_BE;
+		break;
+	case XMIT_BK_QUEUE:
+		ac = HALMAC_ACQ_ID_BK;
+		break;
+	default:
+		return -1;
+	}
+
+	edca.aifs = aifs;
+	edca.cw = cw;
+	edca.txop_limit = txop;
+
+	status = api->halmac_cfg_edca_para(mac, ac, &edca);
+	if (status != HALMAC_RET_SUCCESS)
+		return -1;
+
+	return 0;
+}
+
 int rtw_halmac_get_hw_value(struct dvobj_priv *d, HALMAC_HW_ID hw_id, VOID *pvalue)
 {
 	PHALMAC_ADAPTER mac;
@@ -2145,23 +2430,27 @@ int rtw_halmac_get_hw_value(struct dvobj_priv *d, HALMAC_HW_ID hw_id, VOID *pval
 	return 0;
 }
 
-static HAL_FIFO_SEL _fifo_sel_drv2halmac(u8 fifo_sel)
+static enum _HAL_FIFO_SEL _fifo_sel_drv2halmac(u8 fifo_sel)
 {
-	if (0 == fifo_sel)
+	switch (fifo_sel) {
+	case 0:
 		return HAL_FIFO_SEL_TX;
-	else if (1 == fifo_sel)
+	case 1:
 		return HAL_FIFO_SEL_RX;
-	else if (2 == fifo_sel)
+	case 2:
 		return HAL_FIFO_SEL_RSVD_PAGE;
-	else if (3 == fifo_sel)
+	case 3:
 		return HAL_FIFO_SEL_REPORT;
-	else if (4 == fifo_sel)
+	case 4:
 		return HAL_FIFO_SEL_LLT;
-	else
-		return HAL_FIFO_SEL_RSVD_PAGE;
+	case 5:
+		return HAL_FIFO_SEL_RXBUF_FW;
+	}
+
+	return HAL_FIFO_SEL_RSVD_PAGE;
 }
 
-#define CONFIG_HALMAC_FIFO_DUMP
+/*#define CONFIG_HALMAC_FIFO_DUMP*/
 int rtw_halmac_dump_fifo(struct dvobj_priv *d, u8 fifo_sel, u32 addr, u32 size, u8 *buffer)
 {
 	PHALMAC_ADAPTER mac;
@@ -2204,20 +2493,20 @@ int rtw_halmac_dump_fifo(struct dvobj_priv *d, u8 fifo_sel, u32 addr, u32 size,
 #ifdef CONFIG_HALMAC_FIFO_DUMP
 	{
 		static const char * const fifo_sel_str[] = {
-			"TX", "RX", "RSVD_PAGE", "REPORT", "LLT"
+			"TX", "RX", "RSVD_PAGE", "REPORT", "LLT", "RXBUF_FW"
 		};
 
 		RTW_INFO("%s FIFO DUMP [start_addr:0x%04x , size:%d]\n", fifo_sel_str[halmac_fifo_sel], addr, fifo_size);
 		RTW_INFO_DUMP("\n", pfifo_map, fifo_size);
 		RTW_INFO(" ==================================================\n");
 	}
-#endif
+#endif /* CONFIG_HALMAC_FIFO_DUMP */
 
 _exit:
-	if (mem_created && pfifo_map)
+	if ((mem_created == _TRUE) && pfifo_map)
 		rtw_vmfree(pfifo_map, fifo_size);
-	return ret;
 
+	return ret;
 }
 
 int rtw_halmac_rx_agg_switch(struct dvobj_priv *d, u8 enable)
@@ -2317,6 +2606,7 @@ int rtw_halmac_get_drv_info_sz(struct dvobj_priv *d, u8 *sz)
 	*sz = dw * 8;
 	return 0;
 }
+
 int rtw_halmac_get_rsvd_drv_pg_bndy(struct dvobj_priv *dvobj, u16 *drv_pg)
 {
 	HALMAC_RET_STATUS status;
@@ -2330,6 +2620,50 @@ int rtw_halmac_get_rsvd_drv_pg_bndy(struct dvobj_priv *dvobj, u16 *drv_pg)
 	return 0;
 }
 
+int rtw_halmac_get_oqt_size(struct dvobj_priv *d, u8 *size)
+{
+	enum _HALMAC_RET_STATUS status;
+	struct _HALMAC_ADAPTER *halmac;
+	struct _HALMAC_API *api;
+	u8 val;
+
+
+	if (!size)
+		return -1;
+
+	halmac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(halmac);
+
+	status = api->halmac_get_hw_value(halmac, HALMAC_HW_AC_OQT_SIZE, &val);
+	if (status != HALMAC_RET_SUCCESS)
+		return -1;
+
+	*size = val;
+	return 0;
+}
+
+int rtw_halmac_get_ac_queue_number(struct dvobj_priv *d, u8 *num)
+{
+	enum _HALMAC_RET_STATUS status;
+	struct _HALMAC_ADAPTER *halmac;
+	struct _HALMAC_API *api;
+	u8 val;
+
+
+	if (!num)
+		return -1;
+
+	halmac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(halmac);
+
+	status = api->halmac_get_hw_value(halmac, HALMAC_HW_AC_QUEUE_NUM, &val);
+	if (status != HALMAC_RET_SUCCESS)
+		return -1;
+
+	*num = val;
+	return 0;
+}
+
 int rtw_halmac_download_rsvd_page(struct dvobj_priv *dvobj, u8 pg_offset, u8 *pbuf, u32 size)
 {
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
@@ -2341,7 +2675,6 @@ int rtw_halmac_download_rsvd_page(struct dvobj_priv *dvobj, u8 pg_offset, u8 *pb
 		return -1;
 
 	return 0;
-
 }
 
 /*
@@ -2375,6 +2708,92 @@ int rtw_halmac_fill_hal_spec(struct dvobj_priv *dvobj, struct hal_spec_t *spec)
 	return 0;
 }
 
+int rtw_halmac_p2pps(struct dvobj_priv *dvobj, PHAL_P2P_PS_PARA pp2p_ps_para)
+{
+	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
+	PHALMAC_ADAPTER halmac = dvobj_to_halmac(dvobj);
+	PHALMAC_API api = HALMAC_GET_API(halmac);
+	HALMAC_P2PPS halmac_p2p_ps;
+
+	(&halmac_p2p_ps)->offload_en = pp2p_ps_para->offload_en;
+	(&halmac_p2p_ps)->role = pp2p_ps_para->role;
+	(&halmac_p2p_ps)->ctwindow_en = pp2p_ps_para->ctwindow_en;
+	(&halmac_p2p_ps)->noa_en = pp2p_ps_para->noa_en;
+	(&halmac_p2p_ps)->noa_sel = pp2p_ps_para->noa_sel;
+	(&halmac_p2p_ps)->all_sta_sleep = pp2p_ps_para->all_sta_sleep;
+	(&halmac_p2p_ps)->discovery = pp2p_ps_para->discovery;
+	(&halmac_p2p_ps)->p2p_port_id = _hw_port_drv2halmac(pp2p_ps_para->p2p_port_id);
+	(&halmac_p2p_ps)->p2p_group = pp2p_ps_para->p2p_group;
+	(&halmac_p2p_ps)->p2p_macid = pp2p_ps_para->p2p_macid;
+	(&halmac_p2p_ps)->ctwindow_length = pp2p_ps_para->ctwindow_length;
+	(&halmac_p2p_ps)->noa_duration_para = pp2p_ps_para->noa_duration_para;
+	(&halmac_p2p_ps)->noa_interval_para = pp2p_ps_para->noa_interval_para;
+	(&halmac_p2p_ps)->noa_start_time_para = pp2p_ps_para->noa_start_time_para;
+	(&halmac_p2p_ps)->noa_count_para = pp2p_ps_para->noa_count_para;
+
+	status = api->halmac_p2pps(halmac, (&halmac_p2p_ps));
+	if (status != HALMAC_RET_SUCCESS)
+		return -1;
+
+	return 0;
+
+}
+
+/**
+ * rtw_halmac_iqk() - Run IQ Calibration
+ * @d:		struct dvobj_priv*
+ * @clear:	IQK parameters
+ * @segment:	IQK parameters
+ *
+ * Process IQ Calibration(IQK).
+ *
+ * Rteurn: 0 for OK, otherwise fail.
+ */
+int rtw_halmac_iqk(struct dvobj_priv *d, u8 clear, u8 segment)
+{
+	PHALMAC_ADAPTER mac;
+	PHALMAC_API api;
+	HALMAC_RET_STATUS status;
+	HALMAC_FEATURE_ID id;
+	HALMAC_IQK_PARA para;
+	int ret;
+	u8 retry = 3;
+	u8 delay = 1; /* ms */
+
+
+	mac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(mac);
+	id = HALMAC_FEATURE_IQK;
+
+	ret = init_halmac_event(d, id, NULL, 0);
+	if (ret)
+		return -1;
+
+	para.clear = clear;
+	para.segment_iqk = segment;
+
+	do {
+		status = api->halmac_start_iqk(mac, &para);
+		if (status != HALMAC_RET_BUSY_STATE)
+			break;
+		RTW_WARN("%s: Fail to start IQK, status is BUSY! retry=%d\n", __FUNCTION__, retry);
+		if (!retry)
+			break;
+		retry--;
+		rtw_msleep_os(delay);
+	} while (1);
+	if (status != HALMAC_RET_SUCCESS) {
+		free_halmac_event(d, id);
+		return -1;
+	}
+
+	ret = wait_halmac_event(d, id);
+	if (ret)
+		return -1;
+
+	return 0;
+}
+
 #ifdef CONFIG_SDIO_HCI
 
 /*
@@ -2600,3 +3019,137 @@ u8 rtw_halmac_switch_usb_mode(struct dvobj_priv *d, enum RTW_USB_SPEED usb_mode)
 	return _SUCCESS;
 }
 #endif /* CONFIG_USB_HCI */
+
+#ifdef CONFIG_BEAMFORMING
+#ifdef RTW_BEAMFORMING_VERSION_2
+int rtw_halmac_bf_add_mu_bfer(struct dvobj_priv *d, u16 paid, u16 csi_para,
+		u16 my_aid, HALMAC_CSI_SEG_LEN sel, u8 *addr)
+{
+	PHALMAC_ADAPTER mac;
+	PHALMAC_API api;
+	HALMAC_RET_STATUS status;
+	HALMAC_MU_BFER_INIT_PARA param;
+
+	mac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(mac);
+
+	memset(&param, 0, sizeof(param));
+	param.paid = paid;
+	param.csi_para = csi_para;
+	param.my_aid = my_aid;
+	param.csi_length_sel = sel;
+	memcpy(param.bfer_address.Address, addr, 6);
+
+	status = api->halmac_mu_bfer_entry_init(mac, &param);
+	if (status != HALMAC_RET_SUCCESS)
+		return -1;
+
+	return 0;
+}
+
+int rtw_halmac_bf_del_mu_bfer(struct dvobj_priv *d)
+{
+	PHALMAC_ADAPTER mac;
+	PHALMAC_API api;
+	HALMAC_RET_STATUS status;
+
+	mac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(mac);
+
+	status = api->halmac_mu_bfer_entry_del(mac);
+	if (status != HALMAC_RET_SUCCESS)
+		return -1;
+
+	return 0;
+}
+
+
+int rtw_halmac_bf_cfg_sounding(struct dvobj_priv *d,
+		HALMAC_SND_ROLE role, HALMAC_DATA_RATE rate)
+{
+	PHALMAC_ADAPTER mac;
+	PHALMAC_API api;
+	HALMAC_RET_STATUS status;
+
+	mac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(mac);
+
+	status = api->halmac_cfg_sounding(mac, role, rate);
+	if (status != HALMAC_RET_SUCCESS)
+		return -1;
+
+	return 0;
+}
+
+int rtw_halmac_bf_del_sounding(struct dvobj_priv *d,
+		HALMAC_SND_ROLE role)
+{
+	PHALMAC_ADAPTER mac;
+	PHALMAC_API api;
+	HALMAC_RET_STATUS status;
+
+	mac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(mac);
+
+	status = api->halmac_del_sounding(mac, role);
+	if (status != HALMAC_RET_SUCCESS)
+		return -1;
+
+	return 0;
+}
+
+int rtw_halmac_bf_cfg_csi_rate(struct dvobj_priv *d,
+		u8 rssi, u8 current_rate, u8 fixrate_en,
+		u8 *new_rate)
+{
+	PHALMAC_ADAPTER mac;
+	PHALMAC_API api;
+	HALMAC_RET_STATUS status;
+
+	mac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(mac);
+
+	status = api->halmac_cfg_csi_rate(mac,
+			rssi, current_rate, fixrate_en, new_rate);
+	if (status != HALMAC_RET_SUCCESS)
+		return -1;
+
+	return 0;
+}
+
+int rtw_halmac_bf_cfg_mu_mimo(struct dvobj_priv *d, HALMAC_SND_ROLE role,
+		u8 *sounding_sts, u16 grouping_bitmap, u8 mu_tx_en,
+		u32 *given_gid_tab, u32 *given_user_pos)
+{
+	PHALMAC_ADAPTER mac;
+	PHALMAC_API api;
+	HALMAC_RET_STATUS status;
+	HALMAC_CFG_MUMIMO_PARA param;
+
+	mac = dvobj_to_halmac(d);
+	api = HALMAC_GET_API(mac);
+
+	memset(&param, 0, sizeof(param));
+
+	param.role = role;
+	param.grouping_bitmap = grouping_bitmap;
+	param.mu_tx_en = mu_tx_en;
+
+	if (sounding_sts)
+		memcpy(param.sounding_sts, sounding_sts, 6);
+
+	if (given_gid_tab)
+		memcpy(param.given_gid_tab, given_gid_tab, 8);
+
+	if (given_user_pos)
+		memcpy(param.given_user_pos, given_user_pos, 16);
+
+	status = api->halmac_cfg_mumimo(mac, &param);
+	if (status != HALMAC_RET_SUCCESS)
+		return -1;
+
+	return 0;
+}
+
+#endif /* RTW_BEAMFORMING_VERSION_2 */
+#endif /* CONFIG_BEAMFORMING */
diff --git a/rtl8822BU/hal/hal_halmac.h b/rtl8822BU/hal/hal_halmac.h
index 26bf529..5b006f7 100755..100644
--- a/rtl8822BU/hal/hal_halmac.h
+++ b/rtl8822BU/hal/hal_halmac.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _HAL_HALMAC_H_
 #define _HAL_HALMAC_H_
 
@@ -58,6 +53,8 @@ int rtw_halmac_write8(struct intf_hdl *, u32 addr, u8 value);
 int rtw_halmac_write16(struct intf_hdl *, u32 addr, u16 value);
 int rtw_halmac_write32(struct intf_hdl *, u32 addr, u32 value);
 
+void rtw_dump_halmac_info(void *sel);
+
 int rtw_halmac_init_adapter(struct dvobj_priv *, PHALMAC_PLATFORM_API);
 int rtw_halmac_deinit_adapter(struct dvobj_priv *);
 int rtw_halmac_poweron(struct dvobj_priv *);
@@ -69,6 +66,8 @@ int rtw_halmac_deinit_hal(struct dvobj_priv *);
 int rtw_halmac_self_verify(struct dvobj_priv *);
 int rtw_halmac_dlfw(struct dvobj_priv *, u8 *fw, u32 fwsize);
 int rtw_halmac_dlfw_from_file(struct dvobj_priv *, u8 *fwpath);
+int rtw_halmac_dlfw_mem(struct dvobj_priv *d, u8 *fw, u32 fwsize, enum fw_mem mem);
+int rtw_halmac_dlfw_mem_from_file(struct dvobj_priv *d, u8 *fwpath, enum fw_mem mem);
 int rtw_halmac_phy_power_switch(struct dvobj_priv *, u8 enable);
 int rtw_halmac_send_h2c(struct dvobj_priv *, u8 *h2c);
 int rtw_halmac_c2h_handle(struct dvobj_priv *, u8 *c2h, u32 size);
@@ -92,14 +91,22 @@ int rtw_halmac_set_mac_address(struct dvobj_priv *, enum _hw_port, u8 *addr);
 int rtw_halmac_set_bssid(struct dvobj_priv *, enum _hw_port hwport, u8 *addr);
 
 int rtw_halmac_set_bandwidth(struct dvobj_priv *, u8 channel, u8 pri_ch_idx, u8 bw);
+int rtw_halmac_set_edca(struct dvobj_priv *d, u8 queue, u8 aifs, u8 cw, u16 txop);
+
 int rtw_halmac_dump_fifo(struct dvobj_priv *d, u8 fifo_sel, u32 addr, u32 size, u8 *buffer);
 int rtw_halmac_rx_agg_switch(struct dvobj_priv *, u8 enable);
 int rtw_halmac_get_hw_value(struct dvobj_priv *, HALMAC_HW_ID hw_id, VOID *pvalue);
 int rtw_halmac_get_wow_reason(struct dvobj_priv *, u8 *reason);
 int rtw_halmac_get_drv_info_sz(struct dvobj_priv *, u8 *sz);
 int rtw_halmac_get_rsvd_drv_pg_bndy(struct dvobj_priv *dvobj, u16 *drv_pg);
+int rtw_halmac_get_oqt_size(struct dvobj_priv *d, u8 *size);
+int rtw_halmac_get_ac_queue_number(struct dvobj_priv *d, u8 *num);
+
+/* Specific function APIs*/
 int rtw_halmac_download_rsvd_page(struct dvobj_priv *dvobj, u8 pg_offset, u8 *pbuf, u32 size);
 int rtw_halmac_fill_hal_spec(struct dvobj_priv *, struct hal_spec_t *);
+int rtw_halmac_p2pps(struct dvobj_priv *dvobj, PHAL_P2P_PS_PARA pp2p_ps_para);
+int rtw_halmac_iqk(struct dvobj_priv *d, u8 clear, u8 segment);
 
 #ifdef CONFIG_SDIO_HCI
 int rtw_halmac_query_tx_page_num(struct dvobj_priv *);
@@ -117,4 +124,27 @@ u8 rtw_halmac_switch_usb_mode(struct dvobj_priv *d, enum RTW_USB_SPEED usb_mode)
 #ifdef CONFIG_SUPPORT_TRX_SHARED
 void dump_trx_share_mode(void *sel, _adapter *adapter);
 #endif
+
+#ifdef CONFIG_BEAMFORMING
+#ifdef RTW_BEAMFORMING_VERSION_2
+int rtw_halmac_bf_add_mu_bfer(struct dvobj_priv *d, u16 paid, u16 csi_para,
+		u16 my_aid, HALMAC_CSI_SEG_LEN sel, u8 *addr);
+int rtw_halmac_bf_del_mu_bfer(struct dvobj_priv *d);
+
+int rtw_halmac_bf_cfg_sounding(struct dvobj_priv *d, HALMAC_SND_ROLE role,
+		HALMAC_DATA_RATE rate);
+int rtw_halmac_bf_del_sounding(struct dvobj_priv *d, HALMAC_SND_ROLE role);
+
+int rtw_halmac_bf_cfg_csi_rate(struct dvobj_priv *d, u8 rssi, u8 current_rate,
+		u8 fixrate_en, u8 *new_rate);
+
+int rtw_halmac_bf_cfg_mu_mimo(struct dvobj_priv *d, HALMAC_SND_ROLE role,
+		u8 *sounding_sts, u16 grouping_bitmap, u8 mu_tx_en,
+		u32 *given_gid_tab, u32 *given_user_pos);
+#define rtw_halmac_bf_cfg_mu_bfee(d, gid_tab, user_pos) \
+	rtw_halmac_bf_cfg_mu_mimo(d, HAL_BFEE, NULL, 0, 0, gid_tab, user_pos)
+
+#endif /* RTW_BEAMFORMING_VERSION_2 */
+#endif /* CONFIG_BEAMFORMING */
+
 #endif /* _HAL_HALMAC_H_ */
diff --git a/rtl8822BU/hal/hal_hci/hal_usb.c b/rtl8822BU/hal/hal_hci/hal_usb.c
index 7e6202a..50b3d57 100755..100644
--- a/rtl8822BU/hal/hal_hci/hal_usb.c
+++ b/rtl8822BU/hal/hal_hci/hal_usb.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _HAL_USB_C_
 
 #include <drv_types.h>
diff --git a/rtl8822BU/hal/hal_intf.c b/rtl8822BU/hal/hal_intf.c
index 90b3e78..3956950 100755..100644
--- a/rtl8822BU/hal/hal_intf.c
+++ b/rtl8822BU/hal/hal_intf.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #define _HAL_INTF_C_
 
@@ -44,8 +39,17 @@ void rtw_hal_chip_configure(_adapter *padapter)
 	padapter->hal_func.intf_chip_configure(padapter);
 }
 
-void rtw_hal_read_chip_info(_adapter *padapter)
+/*
+ * Description:
+ *	Read chip internal ROM data
+ *
+ * Return:
+ *	_SUCCESS success
+ *	_FAIL	 fail
+ */
+u8 rtw_hal_read_chip_info(_adapter *padapter)
 {
+	u8 rtn = _SUCCESS;
 	u8 hci_type = rtw_get_intf_type(padapter);
 	u32 start = rtw_get_current_time();
 
@@ -54,13 +58,15 @@ void rtw_hal_read_chip_info(_adapter *padapter)
 	    && !rtw_is_hw_init_completed(padapter))
 		rtw_hal_power_on(padapter);
 
-	padapter->hal_func.read_adapter_info(padapter);
+	rtn = padapter->hal_func.read_adapter_info(padapter);
 
 	if ((hci_type == RTW_SDIO || hci_type == RTW_GSPI)
 	    && !rtw_is_hw_init_completed(padapter))
 		rtw_hal_power_off(padapter);
 
 	RTW_INFO("%s in %d ms\n", __func__, rtw_get_passing_time_ms(start));
+
+	return rtn;
 }
 
 void rtw_hal_read_chip_version(_adapter *padapter)
@@ -157,7 +163,16 @@ void rtw_hal_sw_led_deinit(_adapter *padapter)
 
 u32 rtw_hal_power_on(_adapter *padapter)
 {
-	return padapter->hal_func.hal_power_on(padapter);
+	u32 ret = 0;
+
+	ret = padapter->hal_func.hal_power_on(padapter);
+
+#ifdef CONFIG_BT_COEXIST
+	if (ret == _SUCCESS)
+		rtw_btcoex_PowerOnSetting(padapter);
+#endif
+
+	return ret;
 }
 void rtw_hal_power_off(_adapter *padapter)
 {
@@ -165,6 +180,10 @@ void rtw_hal_power_off(_adapter *padapter)
 
 	_rtw_memset(macid_ctl->h2c_msr, 0, MACID_NUM_SW_LIMIT);
 
+#ifdef CONFIG_BT_COEXIST
+	rtw_btcoex_PowerOffSetting(padapter);
+#endif
+
 	padapter->hal_func.hal_power_off(padapter);
 }
 
@@ -308,6 +327,19 @@ s32 rtw_hal_fw_dl(_adapter *padapter, u8 wowlan)
 	return padapter->hal_func.fw_dl(padapter, wowlan);
 }
 
+#ifdef RTW_HALMAC
+s32 rtw_hal_fw_mem_dl(_adapter *padapter, enum fw_mem mem)
+{
+	u32 dlfw_start_time = rtw_get_current_time();
+	s32 rst = _FALSE;
+
+	rst = padapter->hal_func.fw_mem_dl(padapter, mem);
+	RTW_INFO("%s in %dms\n", __func__, rtw_get_passing_time_ms(dlfw_start_time));
+
+	return rst;
+}
+#endif
+
 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
 void rtw_hal_clear_interrupt(_adapter *padapter)
 {
@@ -339,6 +371,58 @@ void	rtw_hal_irp_reset(_adapter *padapter)
 {
 	padapter->hal_func.irp_reset(GET_PRIMARY_ADAPTER(padapter));
 }
+
+void rtw_hal_pci_dbi_write(_adapter *padapter, u16 addr, u8 data)
+{
+	u16 cmd[2];
+
+	cmd[0] = addr;
+	cmd[1] = data;
+
+	padapter->hal_func.set_hw_reg_handler(padapter, HW_VAR_DBI, (u8 *) cmd);
+}
+
+u8 rtw_hal_pci_dbi_read(_adapter *padapter, u16 addr)
+{
+	padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_DBI, (u8 *)(&addr));
+
+	return (u8)addr;
+}
+
+void rtw_hal_pci_mdio_write(_adapter *padapter, u8 addr, u16 data)
+{
+	u16 cmd[2];
+
+	cmd[0] = (u16)addr;
+	cmd[1] = data;
+
+	padapter->hal_func.set_hw_reg_handler(padapter, HW_VAR_MDIO, (u8 *) cmd);
+}
+
+u16 rtw_hal_pci_mdio_read(_adapter *padapter, u8 addr)
+{
+	padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_MDIO, &addr);
+
+	return (u8)addr;
+}
+
+u8 rtw_hal_pci_l1off_nic_support(_adapter *padapter)
+{
+	u8 l1off;
+
+	padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_L1OFF_NIC_SUPPORT, &l1off);
+	return l1off;
+}
+
+u8 rtw_hal_pci_l1off_capability(_adapter *padapter)
+{
+	u8 l1off;
+
+	padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_L1OFF_CAPABILITY, &l1off);
+	return l1off;
+}
+
+
 #endif /* #if defined(CONFIG_PCI_HCI) */
 
 /* for USB Auto-suspend */
@@ -419,11 +503,81 @@ void	rtw_hal_free_recv_priv(_adapter *padapter)
 {
 	padapter->hal_func.free_recv_priv(padapter);
 }
-void rtw_update_ramask(_adapter *padapter, struct sta_info *psta, u32 mac_id, u8 rssi_level)
+
+void rtw_update_ramask(_adapter *padapter, struct sta_info *psta, u32 mac_id, u8 rssi_level, u8 is_update_bw)
 {
-	padapter->hal_func.UpdateRAMaskHandler(padapter, psta, psta->mac_id, rssi_level);
+	struct macid_cfg h2c_macid_cfg;
+	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
+	struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
+	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
+	HAL_DATA_TYPE	*hal_data = GET_HAL_DATA(padapter);
+	u8 disable_cck_rate = FALSE, MimoPs_enable = FALSE;
+	u32 ratr_bitmap_msb = 0, ratr_bitmap_lsb = 0;
+	u64	mask = 0, rate_bitmap = 0;
+	u8 bw, short_gi;
+
+	if (psta == NULL) {
+		RTW_ERR(FUNC_ADPT_FMT" macid:%u, sta is NULL\n", FUNC_ADPT_ARG(padapter), mac_id);
+		rtw_warn_on(1);
+		return;
+	}
+	_rtw_memset(&h2c_macid_cfg, 0, sizeof(struct macid_cfg));
+
+	bw =  rtw_get_tx_bw_mode(padapter, psta);
+	short_gi = query_ra_short_GI(psta, bw);
+
+	ratr_bitmap_msb = (u32)(psta->ra_mask >> 32);
+	ratr_bitmap_lsb = (u32)(psta->ra_mask);
+
+	phydm_update_hal_ra_mask(&hal_data->odmpriv, psta->wireless_mode, hal_data->rf_type, bw, MimoPs_enable, disable_cck_rate, &ratr_bitmap_msb, &ratr_bitmap_lsb, rssi_level);
+	mask = (((u64)ratr_bitmap_msb) << 32) | ((u64)ratr_bitmap_lsb);
+
+
+#ifdef CONFIG_BT_COEXIST
+	if (hal_data->EEPROMBluetoothCoexist == 1) {
+		rate_bitmap = rtw_btcoex_GetRaMask(padapter);
+		mask &= ~rate_bitmap;
+	}
+#endif /* CONFIG_BT_COEXIST */
+
+#ifdef CONFIG_CMCC_TEST
+#ifdef CONFIG_BT_COEXIST
+	if (pmlmeext->cur_wireless_mode & WIRELESS_11G) {
+		if (mac_id == 0) {
+			RTW_INFO("CMCC_BT update raid entry, mask=0x%x\n", mask);
+			/*mask &=0xffffffc0; //disable CCK & <12M OFDM rate for 11G mode for CMCC */
+			mask &= 0xffffff00; /*disable CCK & <24M OFDM rate for 11G mode for CMCC */
+			RTW_INFO("CMCC_BT update raid entry, mask=0x%x\n", mask);
+		}
+	}
+#endif
+#endif
+
+	/*set correct initial date rate for each mac_id */
+	hal_data->INIDATA_RATE[mac_id] = psta->init_rate;
+
+
+	RTW_INFO("%s => mac_id:%d, networkType:0x%02x, mask:0x%016llx\n\t ==> rssi_level:%d, rate_bitmap:0x%016llx, shortGIrate=%d\n\t ==> bw:%d, ignore_bw:0x%d\n",
+			__func__, mac_id, psta->wireless_mode, mask, rssi_level, rate_bitmap, short_gi, bw, (!is_update_bw));
+
+	rtw_macid_ctl_set_bw(macid_ctl, mac_id, bw);
+	rtw_macid_ctl_set_vht_en(macid_ctl, mac_id, is_supported_vht(psta->wireless_mode));
+	rtw_macid_ctl_set_rate_bmp0(macid_ctl, mac_id, mask);
+	rtw_macid_ctl_set_rate_bmp1(macid_ctl, mac_id, mask >> 32);
+	rtw_update_tx_rate_bmp(adapter_to_dvobj(padapter));
+
+	h2c_macid_cfg.mac_id = mac_id;
+	h2c_macid_cfg.rate_id = psta->raid;
+	h2c_macid_cfg.bandwidth = bw;
+	h2c_macid_cfg.ignore_bw = (!is_update_bw);
+	h2c_macid_cfg.short_gi = short_gi;
+	h2c_macid_cfg.ra_mask = mask;
+
+	padapter->hal_func.update_ra_mask_handler(padapter, psta, &h2c_macid_cfg);
 }
-void rtw_hal_update_ra_mask(struct sta_info *psta, u8 rssi_level)
+
+void rtw_hal_update_ra_mask(struct sta_info *psta, u8 rssi_level, u8 is_update_bw)
 {
 	_adapter *padapter;
 	struct mlme_priv *pmlmepriv;
@@ -436,10 +590,10 @@ void rtw_hal_update_ra_mask(struct sta_info *psta, u8 rssi_level)
 	pmlmepriv = &(padapter->mlmepriv);
 
 	if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
-		add_RATid(padapter, psta, rssi_level);
+		add_RATid(padapter, psta, rssi_level, is_update_bw);
 	else {
 		psta->raid = rtw_hal_networktype_to_raid(padapter, psta);
-		rtw_update_ramask(padapter, psta, psta->mac_id, rssi_level);
+		rtw_update_ramask(padapter, psta, psta->mac_id, rssi_level, is_update_bw);
 	}
 }
 
@@ -541,7 +695,7 @@ void	rtw_hal_set_chnl_bw(_adapter *padapter, u8 channel, CHANNEL_WIDTH Bandwidth
 	odm_release_spin_lock(pDM_Odm, RT_IQK_SPINLOCK);
 
 	/* MP mode channel don't use secondary channel */
-	if (rtw_mi_mp_mode_check(padapter) == _FALSE) {
+	if (rtw_mp_mode_check(padapter) == _FALSE) {
 		#if 0
 		if (cch_160 != 0)
 			cch_80 = rtw_get_scch_by_cch_offset(cch_160, CHANNEL_WIDTH_160, Offset80);
@@ -584,7 +738,7 @@ void	rtw_hal_dm_watchdog(_adapter *padapter)
 			return;
 	}
 #endif /* CONFIG_MCC_MODE */
-
+	rtw_hal_turbo_edca(padapter);
 	padapter->hal_func.hal_dm_watchdog(padapter);
 
 }
@@ -593,7 +747,7 @@ void	rtw_hal_dm_watchdog(_adapter *padapter)
 void	rtw_hal_dm_watchdog_in_lps(_adapter *padapter)
 {
 #if defined(CONFIG_CONCURRENT_MODE)
-#ifndef CONFIG_SUPPORT_FW_MULTI_PORT
+#ifndef CONFIG_FW_MULTI_PORT_SUPPORT
 	if (padapter->hw_port != HW_PORT0)
 		return;
 #endif
@@ -755,9 +909,6 @@ s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
 	s32 ret = _SUCCESS;
 
 	switch (id) {
-	case C2H_DBG:
-		RTW_INFO_DUMP("C2H_DBG: ", payload, plen);
-		break;
 	case C2H_FW_SCAN_COMPLETE:
 		RTW_INFO("[C2H], FW Scan Complete\n");
 		break;
@@ -860,6 +1011,8 @@ s32 rtw_hal_c2h_id_handle_directly(_adapter *adapter, u8 id, u8 seq, u8 plen, u8
 	case C2H_IQK_FINISH:
 	case C2H_MCC:
 	case C2H_BCN_EARLY_RPT:
+	case C2H_AP_REQ_TXRPT:
+	case C2H_SPC_STAT:
 		return _TRUE;
 	default:
 		return _FALSE;
@@ -920,7 +1073,7 @@ s32 rtw_hal_fill_h2c_cmd(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBu
 {
 	_adapter *pri_adapter = GET_PRIMARY_ADAPTER(padapter);
 
-	if (pri_adapter->bFWReady == _TRUE)
+	if (GET_HAL_DATA(pri_adapter)->bFWReady == _TRUE)
 		return padapter->hal_func.fill_h2c_cmd(padapter, ElementID, CmdLen, pCmdBuffer);
 	else if (padapter->registrypriv.mp_mode == 0)
 		RTW_PRINT(FUNC_ADPT_FMT" FW doesn't exit when no MP mode, by pass H2C id:0x%02x\n"
@@ -1193,8 +1346,8 @@ u8 rtw_hal_ops_check(_adapter *padapter)
 		rtw_hal_error_msg("SetHalODMVarHandler");
 		ret = _FAIL;
 	}
-	if (NULL == padapter->hal_func.UpdateRAMaskHandler) {
-		rtw_hal_error_msg("UpdateRAMaskHandler");
+	if (NULL == padapter->hal_func.update_ra_mask_handler) {
+		rtw_hal_error_msg("update_ra_mask_handler");
 		ret = _FAIL;
 	}
 
@@ -1245,6 +1398,13 @@ u8 rtw_hal_ops_check(_adapter *padapter)
 		ret = _FAIL;
 	}
 
+#if defined(RTW_HALMAC) && defined(CONFIG_LPS_PG)
+	if (NULL == padapter->hal_func.fw_mem_dl) {
+		rtw_hal_error_msg("fw_mem_dl");
+		ret = _FAIL;
+	}
+#endif
+
 	if ((IS_HARDWARE_TYPE_8814A(padapter)
 	     || IS_HARDWARE_TYPE_8822BU(padapter) || IS_HARDWARE_TYPE_8822BS(padapter))
 	    && NULL == padapter->hal_func.fw_correct_bcn) {
diff --git a/rtl8822BU/hal/hal_mcc.c b/rtl8822BU/hal/hal_mcc.c
index 6d1a217..606d02a 100755..100644
--- a/rtl8822BU/hal/hal_mcc.c
+++ b/rtl8822BU/hal/hal_mcc.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,11 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifdef CONFIG_MCC_MODE
 #define _HAL_MCC_C_
 
diff --git a/rtl8822BU/hal/hal_mp.c b/rtl8822BU/hal/hal_mp.c
index 8ddb33e..1cc498a 100755..100644
--- a/rtl8822BU/hal/hal_mp.c
+++ b/rtl8822BU/hal/hal_mp.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _HAL_MP_C_
 
 #include <drv_types.h>
@@ -1517,11 +1512,25 @@ void hal_mpt_TriggerRFThermalMeter(PADAPTER pAdapter)
 u8 hal_mpt_ReadRFThermalMeter(PADAPTER pAdapter)
 
 {
+	HAL_DATA_TYPE	*hal_data = GET_HAL_DATA(pAdapter);
+	struct PHY_DM_STRUCT *p_dm_odm = &hal_data->odmpriv;
 	u32 ThermalValue = 0;
+	s32 thermal_value_temp = 0;
+	s8 thermal_offset = 0;
 
 	ThermalValue = (u1Byte)phy_query_rf_reg(pAdapter, ODM_RF_PATH_A, 0x42, 0xfc00);	/*0x42: RF Reg[15:10]*/
-	return (u8)ThermalValue;
+	thermal_offset = phydm_get_thermal_offset(p_dm_odm);
+
+	thermal_value_temp = ThermalValue + thermal_offset;
 
+	if (thermal_value_temp > 63)
+		ThermalValue = 63;
+	else if (thermal_value_temp < 0)
+		ThermalValue = 0;
+	else
+		ThermalValue = thermal_value_temp;
+
+	return (u8)ThermalValue;
 }
 
 
diff --git a/rtl8822BU/hal/hal_phy.c b/rtl8822BU/hal/hal_phy.c
index 5c87dbb..88c1b1c 100755..100644
--- a/rtl8822BU/hal/hal_phy.c
+++ b/rtl8822BU/hal/hal_phy.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _HAL_PHY_C_
 
 #include <drv_types.h>
diff --git a/rtl8822BU/hal/halmac/halmac_2_platform.h b/rtl8822BU/hal/halmac/halmac_2_platform.h
index 2541867..c6352de 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_2_platform.h
+++ b/rtl8822BU/hal/halmac/halmac_2_platform.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,8 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
  ******************************************************************************/
+
 #ifndef _HALMAC_2_PLATFORM_H_
 #define _HALMAC_2_PLATFORM_H_
 
@@ -70,8 +66,9 @@ typedef s32	*ps32;
 /*[Driver] config if enable the dbg msg or notl*/
 #define HALMAC_DBG_MSG_ENABLE		1
 
-/*[Driver] define the Platform SDIO Bus CLK */
-#define PLATFORM_SD_CLK	50000000 /*50MHz*/
+/*[Driver] define the Rx FIFO expanding mode packet size unit for 8821C and 8822B */
+/*Should be 8 Byte alignment*/
+#define HALMAC_RX_FIFO_EXPANDING_MODE_PKT_SIZE	48 /*Bytes*/
 
 /*[Driver] provide the type mutex*/
 /* Mutex type */
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_cfg.h b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_cfg.h
index 4b113c7..e2a9c96 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_cfg.h
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_cfg.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_8822B_CFG_H_
 #define _HALMAC_8822B_CFG_H_
 
@@ -18,22 +33,29 @@
 #endif
 
 #define HALMAC_TX_FIFO_SIZE_8822B				262144 /* 256k */
-#define HALMAC_TX_FIFO_SIZE_LA_8822B			131072 /* 128k */
-#define HALMAC_TX_FIFO_SIZE_RX_FIFO_EXPANDING_1_BLOCK_8822B			196608 /* 192k */
-#define HALMAC_RX_FIFO_SIZE_RX_FIFO_EXPANDING_1_BLOCK_8822B			29696 /* 29k */
-#define HALMAC_TX_FIFO_SIZE_RX_FIFO_EXPANDING_2_BLOCK_8822B			131072 /* 128k */
-#define HALMAC_RX_FIFO_SIZE_RX_FIFO_EXPANDING_2_BLOCK_8822B			155648 /* 152k */
-#define HALMAC_TX_FIFO_SIZE_RX_FIFO_EXPANDING_3_BLOCK_8822B			65536 /* 64k */
-#define HALMAC_RX_FIFO_SIZE_RX_FIFO_EXPANDING_3_BLOCK_8822B			221184 /* 216k */
-#define HALMAC_RX_FIFO_SIZE_8822B				24320 /* 24k */
+#define HALMAC_TX_FIFO_SIZE_LA_8822B			(HALMAC_TX_FIFO_SIZE_8822B >> 1) /* 128k */
+#define HALMAC_RX_FIFO_SIZE_8822B				24576 /* 24k */
 #define HALMAC_TX_PAGE_SIZE_8822B				128 /* PageSize 128Byte */
-#define HALMAC_TX_ALIGN_SIZE_8822B					8
+#define HALMAC_TX_ALIGN_SIZE_8822B				8
 #define HALMAC_TX_PAGE_SIZE_2_POWER_8822B		7 /* 128 = 2^7 */
 #define HALMAC_SECURITY_CAM_ENTRY_NUM_8822B		64 /* CAM Entry Size */
 #define HALMAC_TX_AGG_ALIGNMENT_SIZE_8822B		8
 #define HALMAC_TX_DESC_SIZE_8822B				48
 #define HALMAC_RX_DESC_SIZE_8822B				24
-#define HALMAC_WOWLAN_PATTERN_SIZE_8822B		256
+#define HALMAC_C2H_PKT_BUF_8822B				256
+#define HALMAC_RX_DESC_DUMMY_SIZE_MAX_8822B		80 /*8*10 Bytes*/
+#define HALMAC_RX_FIFO_EXPANDING_MODE_PKT_SIZE_MAX_8822B    80 /* should be 8 Byte alignment*/
+
+#define HALMAC_RX_FIFO_EXPANDING_UNIT_8822B			(HALMAC_RX_DESC_SIZE_8822B + HALMAC_RX_DESC_DUMMY_SIZE_MAX_8822B + HALMAC_RX_FIFO_EXPANDING_MODE_PKT_SIZE) /* should be 8 Byte alignment*/
+#define HALMAC_RX_FIFO_EXPANDING_UNIT_MAX_8822B		(HALMAC_RX_DESC_SIZE_8822B + HALMAC_RX_DESC_DUMMY_SIZE_MAX_8822B + HALMAC_RX_FIFO_EXPANDING_MODE_PKT_SIZE_MAX_8822B) /* should be 8 Byte alignment*/
+
+#define HALMAC_TX_FIFO_SIZE_RX_FIFO_EXPANDING_1_BLOCK_8822B			196608 /* 192k */
+#define HALMAC_RX_FIFO_SIZE_RX_FIFO_EXPANDING_1_BLOCK_8822B			((((HALMAC_RX_FIFO_EXPANDING_UNIT_8822B << 8) - 1) >> 10) << 10) /* < 46k*/
+#define HALMAC_RX_FIFO_SIZE_RX_FIFO_EXPANDING_1_BLOCK_MAX_8822B		((((HALMAC_RX_FIFO_EXPANDING_UNIT_MAX_8822B << 8) - 1) >> 10) << 10) /* 45k < 64K*/
+#define HALMAC_TX_FIFO_SIZE_RX_FIFO_EXPANDING_2_BLOCK_8822B			131072 /* 128k */
+#define HALMAC_RX_FIFO_SIZE_RX_FIFO_EXPANDING_2_BLOCK_8822B			155648 /* 152k */
+#define HALMAC_TX_FIFO_SIZE_RX_FIFO_EXPANDING_3_BLOCK_8822B			65536 /* 64k */
+#define HALMAC_RX_FIFO_SIZE_RX_FIFO_EXPANDING_3_BLOCK_8822B			221184 /* 216k */
 
 /*
 * TXFIFO LAYOUT
@@ -89,14 +111,4 @@
 #define HALMAC_BAR_RETRY_LIMIT_8822B			0x01
 #define HALMAC_RA_TRY_RATE_AGG_LIMIT_8822B		0x08
 
-typedef enum _HALMAC_NORMAL_RXAGG_TH_TO_8822B {
-	HALMAC_NORMAL_RXAGG_THRESHOLD_8822B		= 0xFF,
-	HALMAC_NORMAL_RXAGG_TIMEOUT_8822B		= 0x01,
-} HALMAC_NORMAL_RXAGG_TH_TO_8822B;
-
-typedef enum _HALMAC_LOOPBACK_RXAGG_TH_TO_8822B {
-	HALMAC_LOOPBACK_RXAGG_THRESHOLD_8822B	= 0xFF,
-	HALMAC_LOOPBACK_RXAGG_TIMEOUT_8822B		= 0x01,
-} HALMAC_LOOPBACK_RXAGG_TH_TO_8822B;
-
 #endif
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_phy.c b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_phy.c
index 42ea7d6..5ccbac7 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_phy.c
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_phy.c
@@ -1,43 +1,73 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #include "../halmac_88xx_cfg.h"
 #include "halmac_8822b_cfg.h"
 
+/**
+ * ============ip sel item list============
+ * HALMAC_IP_SEL_INTF_PHY
+ *	USB2 : usb2 phy, 1byte value
+ *	USB3 : usb3 phy, 2byte value
+ *	PCIE1 : pcie gen1 mdio, 2byte value
+ *	PCIE2 : pcie gen2 mdio, 2byte value
+ * HALMAC_IP_SEL_MAC
+ *	USB2, USB3, PCIE1, PCIE2 : mac ip, 1byte value
+ * HALMAC_IP_SEL_PCIE_DBI
+ *	USB2 USB3 : none
+ *	PCIE1, PCIE2 : pcie dbi, 1byte value
+ */
+
 HALMAC_INTF_PHY_PARA HALMAC_RTL8822B_USB2_PHY[] = {
-	/* {offset, value, cut mask, platform mask} */
-	{0xFFFF, 0x00, HALMAC_INTF_PHY_CUT_ALL, HALMAC_INTF_PHY_PLATFORM_ALL},
+	/* {offset, value, ip sel, cut mask, platform mask} */
+	{0xFFFF, 0x00, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_ALL, HALMAC_INTF_PHY_PLATFORM_ALL},
 };
 
 HALMAC_INTF_PHY_PARA HALMAC_RTL8822B_USB3_PHY[] = {
-	/* {offset, value, cut mask, platform mask} */
-	{0xFFFF, 0x0000, HALMAC_INTF_PHY_CUT_ALL, HALMAC_INTF_PHY_PLATFORM_ALL},
+	/* {offset, value, ip sel, cut mask, platform mask} */
+	{0x0001, 0xA841, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_D, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0xFFFF, 0x0000, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_ALL, HALMAC_INTF_PHY_PLATFORM_ALL},
 };
 
 HALMAC_INTF_PHY_PARA HALMAC_RTL8822B_PCIE_PHY_GEN1[] = {
-	/* {offset, value, cut mask, platform mask} */
-	{0x0001, 0xA841, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
-	{0x0002, 0x60C6, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
-	{0x0008, 0x3596, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
-	{0x0009, 0x321C, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
-	{0x000A, 0x9623, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
-	{0x0020, 0x94FF, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
-	{0x0021, 0xFFCF, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
-	{0x0026, 0xC006, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
-	{0x0029, 0xFF0E, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
-	{0x002A, 0x1840, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
-	{0xFFFF, 0x0000, HALMAC_INTF_PHY_CUT_ALL, HALMAC_INTF_PHY_PLATFORM_ALL},
+	/* {offset, value, ip sel, cut mask, platform mask} */
+	{0x0001, 0xA841, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0x0002, 0x60C6, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0x0008, 0x3596, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0x0009, 0x321C, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0x000A, 0x9623, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0x0020, 0x94FF, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0x0021, 0xFFCF, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0x0026, 0xC006, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0x0029, 0xFF0E, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0x002A, 0x1840, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0xFFFF, 0x0000, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_ALL, HALMAC_INTF_PHY_PLATFORM_ALL},
 };
 
 HALMAC_INTF_PHY_PARA HALMAC_RTL8822B_PCIE_PHY_GEN2[] = {
-	/* {offset, value, cut mask, platform mask} */
-	{0x0001, 0xA841, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
-	{0x0002, 0x60C6, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
-	{0x0008, 0x3597, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
-	{0x0009, 0x321C, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
-	{0x000A, 0x9623, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
-	{0x0020, 0x94FF, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
-	{0x0021, 0xFFCF, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
-	{0x0026, 0xC006, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
-	{0x0029, 0xFF0E, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
-	{0x002A, 0x3040, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
-	{0xFFFF, 0x0000, HALMAC_INTF_PHY_CUT_ALL, HALMAC_INTF_PHY_PLATFORM_ALL},
+	/* {offset, value, ip sel, cut mask, platform mask} */
+	{0x0001, 0xA841, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0x0002, 0x60C6, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0x0008, 0x3597, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0x0009, 0x321C, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0x000A, 0x9623, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0x0020, 0x94FF, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0x0021, 0xFFCF, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0x0026, 0xC006, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0x0029, 0xFF0E, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0x002A, 0x3040, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_C, HALMAC_INTF_PHY_PLATFORM_ALL},
+	{0xFFFF, 0x0000, HALMAC_IP_SEL_INTF_PHY, HALMAC_INTF_PHY_CUT_ALL, HALMAC_INTF_PHY_PLATFORM_ALL},
 };
 
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_pwr_seq.c b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_pwr_seq.c
index 081661f..79e2a5a 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_pwr_seq.c
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_pwr_seq.c
@@ -1,15 +1,30 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #include "../halmac_88xx_cfg.h"
 #include "halmac_8822b_cfg.h"
 
 HALMAC_WLAN_PWR_CFG HALMAC_RTL8822B_TRANS_CARDEMU_TO_ACT[] = {
 	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value } */
+	{0x0012, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(1), 0}, /*SWR OCP = SWR OCP = 010 1382.40*/
+	{0x0012, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)}, /*SWR OCP = 010 1382.40 */
 	{0x0020, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/
 	{0x0001, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_DELAY, 1, HALMAC_PWRSEQ_DELAY_MS}, /*Delay 1ms*/
 	{0x0000, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(5), 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/
 	{0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, (BIT(4) | BIT(3) | BIT(2)), 0}, /* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[12:11]=0*/
 	{0x0075, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_PCI_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)}, /* Disable USB suspend */
-	{0x0004, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_PCI_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(3), BIT(3)}, /* enabled usb resume */
-	{0x0004, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_PCI_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(3), 0}, /* disable usb resume */
 	{0x0006, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_POLLING, BIT(1), BIT(1)}, /* wait till 0x04[17] = 1    power ready*/
 	{0x0075, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_PCI_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(0), 0}, /* Enable USB suspend */
 	{0xFF1A, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_USB_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF, 0}, /*0xFF1A = 0 to release resume signals*/
@@ -23,15 +38,16 @@ HALMAC_WLAN_PWR_CFG HALMAC_RTL8822B_TRANS_CARDEMU_TO_ACT[] = {
 	{0x10A9, HALMAC_PWR_CUT_C_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF, 0xef},/*NFC pad enabled*/
 	{0x10AA, HALMAC_PWR_CUT_C_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF, 0x0c},/*NFC pad enabled*/
 	{0x0068, HALMAC_PWR_CUT_C_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(4), BIT(4)}, /*SDIO pad power down disabled*/
-	{0x0029, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF , 0xF9}, /*PLL seting*/
-	{0x0024, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(2) , 0}, /*CH13»P5G³¡¤ÀCH TX EVMªº§ïµ½*/
-	{0x0074, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_PCI_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(5) , BIT(5)}, /*PCIE WAKE# enabled*/
+	{0x0029, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF, 0xF9}, /*PLL seting*/
+	{0x0024, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(2), 0}, /*CH13»P5G³¡¤ÀCH TX EVMªº§ïµ½*/
+	{0x0074, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_PCI_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(5), BIT(5)}, /*PCIE WAKE# enabled*/
 	{0xFFFF, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, 0, HALMAC_PWR_CMD_END, 0, 0},
 };
 
 HALMAC_WLAN_PWR_CFG HALMAC_RTL8822B_TRANS_ACT_TO_CARDEMU[] = {
 	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value } */
-	{0x0003, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(2), 0}, /* CPU is reset */
+	{0x0003, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(2), 0}, /*0x02[10] = 0 Disable MCU Core*/
+	{0x0093, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(3), 0}, /*LPS option 0x93[3]=0 , SWR PFM*/
 	{0x001F, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF, 0}, /*0x1F[7:0] = 0 turn off RF*/
 	{0x00EF, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF, 0}, /*0xEF[7:0] = 0 turn off RF*/
 	{0xFF1A, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_USB_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF, 0x30}, /*0xFF1A = 0x30 to block resume signals*/
@@ -67,11 +83,20 @@ HALMAC_WLAN_PWR_CFG HALMAC_RTL8822B_TRANS_SUS_TO_CARDEMU[] = {
 
 HALMAC_WLAN_PWR_CFG HALMAC_RTL8822B_TRANS_CARDEMU_TO_CARDDIS[] = {
 	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value } */
+	{0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7)}, /*suspend enable and power down enable*/
 	{0x0007, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/
 	{0x0067, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(5), 0}, /*0x67[5]=0 , BIT_PAPE_WLBT_SEL*/
 	{0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3)}, /*0x04[12:11] = 2b'01 enable WL suspend*/
 	{0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_PCI_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(2), BIT(2)}, /*0x04[10] = 1, enable SW LPS*/
 	{0x004A, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_USB_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(0), 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/
+	{0x0067, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(5), 0 }, /* 0: BT PAPE control ; 1: WL BB LNAON control*/
+	{0x0067, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(4), 0 }, /* 0: BT GPIO[11:10] control  ; 1: WL BB LNAON control*/
+	{0x004F, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(0), 0 }, /* 0: BT Control*/
+	{0x0067, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(1), 0 }, /* turn off BT_3DD_SYNC_B and BT_GPIO[18] */
+	{0x0046, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(6), BIT(6) }, /* GPIO[6] : Output mode*/
+	{0x0067, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(2), 0 }, /* turn off BT_GPIO[16] */
+	{0x0046, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7) }, /* GPIO[7] : Output mode*/
+	{0x0062, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(4), BIT(4) }, /* GPIO[12] : Output mode */
 	{0x0086, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_SDIO, HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0)}, /*Set SDIO suspend local register*/
 	{0x0086, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_SDIO, HALMAC_PWR_CMD_POLLING, BIT(1), 0}, /*wait power state to suspend*/
 	{0x0090, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_PCI_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(1), 0}, /*0x90[1]=0 , disable 32k clock*/
@@ -79,16 +104,16 @@ HALMAC_WLAN_PWR_CFG HALMAC_RTL8822B_TRANS_CARDEMU_TO_CARDDIS[] = {
 	{0x0040, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_SDIO, HALMAC_PWR_CMD_WRITE, 0xFF, 0x90}, /*0x90[1]=0 , disable 32k clock by indirect access*/
 	{0x0041, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_SDIO, HALMAC_PWR_CMD_WRITE, 0xFF, 0x00}, /*0x90[1]=0 , disable 32k clock by indirect access*/
 	{0x0042, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_SDIO, HALMAC_PWR_CMD_WRITE, 0xFF, 0x04}, /*0x90[1]=0 , disable 32k clock by indirect access*/
+	{0x0081, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(7), 0}, /*0x80[15]clean fw init ready bit*/
 	{0xFFFF, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, 0, HALMAC_PWR_CMD_END, 0, 0},
 };
 
 HALMAC_WLAN_PWR_CFG HALMAC_RTL8822B_TRANS_CARDDIS_TO_CARDEMU[] = {
 	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value } */
-	{0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(7), 0}, /*clear suspend enable and power down enable*/
 	{0x0086, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_SDIO, HALMAC_PWR_CMD_WRITE, BIT(0), 0}, /*Set SDIO suspend local register*/
 	{0x0086, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_SDIO, HALMAC_PWR_CMD_POLLING, BIT(1), BIT(1)}, /*wait power state to suspend*/
 	{0x004A, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_USB_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(0), 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/
-	{0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), 0}, /*0x04[12:11] = 2b'01enable WL suspend*/
+	{0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4) | BIT(7), 0}, /*clear suspend enable and power down enable*/
 	{0x0301, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_PCI_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF, 0},
 	{0xFFFF, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, 0, HALMAC_PWR_CMD_END, 0, 0},
 };
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_pwr_seq.h b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_pwr_seq.h
index a63bb57..0b8e246 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_pwr_seq.h
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_pwr_seq.h
@@ -1,9 +1,24 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef HALMAC_POWER_SEQUENCE_8822B
 #define HALMAC_POWER_SEQUENCE_8822B
 
 #include "../../halmac_pwr_seq_cmd.h"
 
-#define HALMAC_8822B_PWR_SEQ_VER  "V14"
+#define HALMAC_8822B_PWR_SEQ_VER  "V21"
 extern PHALMAC_WLAN_PWR_CFG halmac_8822b_card_disable_flow[];
 extern PHALMAC_WLAN_PWR_CFG halmac_8822b_card_enable_flow[];
 extern PHALMAC_WLAN_PWR_CFG halmac_8822b_suspend_flow[];
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b.c b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b.c
index 497d8a4..7dcca57 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b.c
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b.c
@@ -1,7 +1,22 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #include "halmac_8822b_cfg.h"
 #include "halmac_func_8822b.h"
 #include "../halmac_func_88xx.h"
-
+#include "halmac_gpio_8822b.h"
 
 /**
  * halmac_mount_api_8822b() - attach functions to function pointer
@@ -38,23 +53,27 @@ halmac_mount_api_8822b(
 	pHalmac_api->halmac_init_trx_cfg = halmac_init_trx_cfg_8822b;
 	pHalmac_api->halmac_init_protocol_cfg = halmac_init_protocol_cfg_8822b;
 	pHalmac_api->halmac_init_h2c = halmac_init_h2c_8822b;
+	pHalmac_api->halmac_pinmux_get_func = halmac_pinmux_get_func_8822b;
+	pHalmac_api->halmac_pinmux_set_func = halmac_pinmux_set_func_8822b;
+	pHalmac_api->halmac_pinmux_free_func = halmac_pinmux_free_func_8822b;
 
-	if (HALMAC_INTERFACE_SDIO == pHalmac_adapter->halmac_interface) {
+	if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_SDIO) {
 		pHalmac_api->halmac_tx_allowed_sdio = halmac_tx_allowed_sdio_88xx;
 		pHalmac_api->halmac_cfg_tx_agg_align = halmac_cfg_tx_agg_align_sdio_not_support_88xx;
 		pHalmac_api->halmac_mac_power_switch = halmac_mac_power_switch_8822b_sdio;
 		pHalmac_api->halmac_phy_cfg = halmac_phy_cfg_8822b_sdio;
-
-	} else if (HALMAC_INTERFACE_USB == pHalmac_adapter->halmac_interface) {
+		pHalmac_api->halmac_interface_integration_tuning = halmac_interface_integration_tuning_8822b_sdio;
+	} else if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_USB) {
 		pHalmac_api->halmac_mac_power_switch = halmac_mac_power_switch_8822b_usb;
 		pHalmac_api->halmac_cfg_tx_agg_align = halmac_cfg_tx_agg_align_usb_not_support_88xx;
 		pHalmac_api->halmac_phy_cfg = halmac_phy_cfg_8822b_usb;
-
-	} else if (HALMAC_INTERFACE_PCIE == pHalmac_adapter->halmac_interface) {
+		pHalmac_api->halmac_interface_integration_tuning = halmac_interface_integration_tuning_8822b_usb;
+	} else if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_PCIE) {
 		pHalmac_api->halmac_mac_power_switch = halmac_mac_power_switch_8822b_pcie;
 		pHalmac_api->halmac_cfg_tx_agg_align = halmac_cfg_tx_agg_align_pcie_not_support_88xx;
 		pHalmac_api->halmac_pcie_switch = halmac_pcie_switch_8822b;
 		pHalmac_api->halmac_phy_cfg = halmac_phy_cfg_8822b_pcie;
+		pHalmac_api->halmac_interface_integration_tuning = halmac_interface_integration_tuning_8822b_pcie;
 	} else {
 		pHalmac_api->halmac_pcie_switch = halmac_pcie_switch_8822b_nc;
 	}
@@ -62,13 +81,13 @@ halmac_mount_api_8822b(
 	return HALMAC_RET_SUCCESS;
 }
 
-
 /**
  * halmac_init_trx_cfg_8822b() - config trx dma register
- * @pHalmac_adapter
- * @halmac_trx_mode
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_trx_mode : trx mode selection
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_init_trx_cfg_8822b(
@@ -82,14 +101,12 @@ halmac_init_trx_cfg_8822b(
 	PHALMAC_API pHalmac_api;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_INIT_TRX_CFG);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 	pHalmac_adapter->trx_mode = halmac_trx_mode;
@@ -98,7 +115,7 @@ halmac_init_trx_cfg_8822b(
 
 	status = halmac_txdma_queue_mapping_8822b(pHalmac_adapter, halmac_trx_mode);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_txdma_queue_mapping fail!\n");
 		return status;
 	}
@@ -110,8 +127,10 @@ halmac_init_trx_cfg_8822b(
 	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_H2CQ_CSR, BIT(31));
 
 	status = halmac_priority_queue_config_8822b(pHalmac_adapter, halmac_trx_mode);
+	if (pHalmac_adapter->txff_allocation.rx_fifo_expanding_mode != HALMAC_RX_FIFO_EXPANDING_MODE_DISABLE)
+		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_RX_DRVINFO_SZ, HALMAC_RX_DESC_DUMMY_SIZE_MAX_8822B >> 3);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_txdma_queue_mapping fail!\n");
 		return status;
 	}
@@ -155,10 +174,11 @@ halmac_init_trx_cfg_8822b(
 }
 
 /**
- * halmac_init_protocol_cfg_8822b() - config protocol related register
- * @pHalmac_adapter
+ * halmac_init_protocol_cfg_8822b() - config protocol register
+ * @pHalmac_adapter : the adapter of halmac
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_init_protocol_cfg_8822b(
@@ -169,14 +189,12 @@ halmac_init_protocol_cfg_8822b(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_INIT_PROTOCOL_CFG);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -203,9 +221,10 @@ halmac_init_protocol_cfg_8822b(
 
 /**
  * halmac_init_h2c_8822b() - config h2c packet buffer
- * @pHalmac_adapter
+ * @pHalmac_adapter : the adapter of halmac
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_init_h2c_8822b(
@@ -217,10 +236,10 @@ halmac_init_h2c_8822b(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b.h b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b.h
index 6572340..846a0d3 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b.h
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_API_8822B_H_
 #define _HALMAC_API_8822B_H_
 
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_pcie.c b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_pcie.c
index 4dc73da..471d452 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_pcie.c
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_pcie.c
@@ -1,13 +1,29 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #include "../halmac_88xx_cfg.h"
 #include "../halmac_api_88xx_pcie.h"
 #include "halmac_8822b_cfg.h"
 
 /**
- * halmac_mac_power_switch_8822b_pcie() - change mac power
- * @pHalmac_adapter
- * @halmac_power
+ * halmac_mac_power_switch_8822b_pcie() - switch mac power
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_power : power state
  * Author : KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_mac_power_switch_8822b_pcie(
@@ -20,65 +36,64 @@ halmac_mac_power_switch_8822b_pcie(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_MAC_POWER_SWITCH);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_mac_power_switch_88xx_pcie halmac_power =  %x ==========>\n", halmac_power);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "[TRACE]halmac_mac_power_switch_88xx_pcie halmac_power =  %x ==========>\n", halmac_power);
 	interface_mask = HALMAC_PWR_INTF_PCI_MSK;
 
 	value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_CR);
-	if (0xEA == value8)
+	if (value8 == 0xEA)
 		pHalmac_adapter->halmac_state.mac_power = HALMAC_MAC_POWER_OFF;
 	else
 		pHalmac_adapter->halmac_state.mac_power = HALMAC_MAC_POWER_ON;
 
 	/* Check if power switch is needed */
 	if (halmac_power == HALMAC_MAC_POWER_ON && pHalmac_adapter->halmac_state.mac_power == HALMAC_MAC_POWER_ON) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_WARN, "halmac_mac_power_switch power state unchange!\n");
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_WARN, "[WARN]halmac_mac_power_switch power state unchange!\n");
 		return HALMAC_RET_PWR_UNCHANGE;
+	}
+
+	if (halmac_power == HALMAC_MAC_POWER_OFF) {
+		if (halmac_pwr_seq_parser_88xx(pHalmac_adapter, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_TSMC_MSK,
+			    interface_mask, halmac_8822b_card_disable_flow) != HALMAC_RET_SUCCESS) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Handle power off cmd error\n");
+			return HALMAC_RET_POWER_OFF_FAIL;
+		}
+
+		pHalmac_adapter->halmac_state.mac_power = HALMAC_MAC_POWER_OFF;
+		pHalmac_adapter->halmac_state.ps_state = HALMAC_PS_STATE_UNDEFINE;
+		pHalmac_adapter->halmac_state.dlfw_state = HALMAC_DLFW_NONE;
+		halmac_init_adapter_dynamic_para_88xx(pHalmac_adapter);
 	} else {
-		if (HALMAC_MAC_POWER_OFF == halmac_power) {
-			if (HALMAC_RET_SUCCESS != halmac_pwr_seq_parser_88xx(pHalmac_adapter, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_TSMC_MSK,
-				    interface_mask, halmac_8822b_card_disable_flow)) {
-				PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "Handle power off cmd error\n");
-				return HALMAC_RET_POWER_OFF_FAIL;
-			}
-
-			pHalmac_adapter->halmac_state.mac_power = HALMAC_MAC_POWER_OFF;
-			pHalmac_adapter->halmac_state.ps_state = HALMAC_PS_STATE_UNDEFINE;
-			pHalmac_adapter->halmac_state.dlfw_state = HALMAC_DLFW_NONE;
-			halmac_init_adapter_dynamic_para_88xx(pHalmac_adapter);
-		} else {
-			if (HALMAC_RET_SUCCESS != halmac_pwr_seq_parser_88xx(pHalmac_adapter, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_TSMC_MSK,
-				    interface_mask, halmac_8822b_card_enable_flow)) {
-				PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "Handle power on cmd error\n");
-				return HALMAC_RET_POWER_ON_FAIL;
-			}
-
-			pHalmac_adapter->halmac_state.mac_power = HALMAC_MAC_POWER_ON;
-			pHalmac_adapter->halmac_state.ps_state = HALMAC_PS_STATE_ACT;
+		if (halmac_pwr_seq_parser_88xx(pHalmac_adapter, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_TSMC_MSK,
+			    interface_mask, halmac_8822b_card_enable_flow) != HALMAC_RET_SUCCESS) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Handle power on cmd error\n");
+			return HALMAC_RET_POWER_ON_FAIL;
 		}
+
+		pHalmac_adapter->halmac_state.mac_power = HALMAC_MAC_POWER_ON;
+		pHalmac_adapter->halmac_state.ps_state = HALMAC_PS_STATE_ACT;
 	}
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_mac_power_switch_88xx_pcie <==========\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "[TRACE]halmac_mac_power_switch_88xx_pcie <==========\n");
 
 	return HALMAC_RET_SUCCESS;
 }
 
 /**
- * halmac_pcie_switch_8822b() - change mac power
- * @pHalmac_adapter
- * @pcie_cfg
+ * halmac_pcie_switch_8822b() - pcie gen1/gen2 switch
+ * @pHalmac_adapter : the adapter of halmac
+ * @pcie_cfg : gen1/gen2 selection
  * Author : KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_pcie_switch_8822b(
@@ -91,18 +106,16 @@ halmac_pcie_switch_8822b(
 	u8 current_link_speed = 0;
 	u32 count = 0;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_PCIE_SWITCH);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_pcie_switch_8822b ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "[TRACE]halmac_pcie_switch_8822b ==========>\n");
 
 	/**
 	* Link Control 2 Register[3:0] Target Link Speed
@@ -112,8 +125,7 @@ halmac_pcie_switch_8822b(
 	* 0100b Target Link 8.0 GT/s
 	*/
 
-	if (HALMAC_PCIE_GEN1 == pcie_cfg) {
-
+	if (pcie_cfg == HALMAC_PCIE_GEN1) {
 		/* cfg 0xA0[3:0]=4'b0001 */
 		halmac_dbi_write8_88xx(pHalmac_adapter, LINK_CTRL2_REG_OFFSET, (halmac_dbi_read8_88xx(pHalmac_adapter, LINK_CTRL2_REG_OFFSET) & 0xF0) | BIT(0));
 
@@ -122,22 +134,21 @@ halmac_pcie_switch_8822b(
 
 		/* check link speed if GEN1 */
 		/* cfg 0x82[3:0]=4'b0001 */
-		current_link_speed = halmac_dbi_read8_88xx(pHalmac_adapter, LINK_STATUS_REG_OFFSET) & 0x0F ;
+		current_link_speed = halmac_dbi_read8_88xx(pHalmac_adapter, LINK_STATUS_REG_OFFSET) & 0x0F;
 		count = 2000;
 
-		while ((current_link_speed != GEN1_SPEED) && (count != 0)) {
+		while ((current_link_speed != HALMAC_PCIE_GEN1_SPEED_88XX) && (count != 0)) {
 			PLATFORM_RTL_DELAY_US(pDriver_adapter, 50);
-			current_link_speed = halmac_dbi_read8_88xx(pHalmac_adapter, LINK_STATUS_REG_OFFSET) & 0x0F ;
+			current_link_speed = halmac_dbi_read8_88xx(pHalmac_adapter, LINK_STATUS_REG_OFFSET) & 0x0F;
 			count--;
 		}
 
-		if (current_link_speed != GEN1_SPEED) {
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "Speed change to GEN1 fail !\n");
+		if (current_link_speed != HALMAC_PCIE_GEN1_SPEED_88XX) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Speed change to GEN1 fail !\n");
 			return HALMAC_RET_FAIL;
 		}
 
-	} else if (HALMAC_PCIE_GEN2 == pcie_cfg) {
-
+	} else if (pcie_cfg == HALMAC_PCIE_GEN2) {
 		/* cfg 0xA0[3:0]=4'b0010 */
 		halmac_dbi_write8_88xx(pHalmac_adapter, LINK_CTRL2_REG_OFFSET, (halmac_dbi_read8_88xx(pHalmac_adapter, LINK_CTRL2_REG_OFFSET) & 0xF0) | BIT(1));
 
@@ -146,37 +157,30 @@ halmac_pcie_switch_8822b(
 
 		/* check link speed if GEN2 */
 		/* cfg 0x82[3:0]=4'b0010 */
-		current_link_speed = halmac_dbi_read8_88xx(pHalmac_adapter, LINK_STATUS_REG_OFFSET) & 0x0F ;
+		current_link_speed = halmac_dbi_read8_88xx(pHalmac_adapter, LINK_STATUS_REG_OFFSET) & 0x0F;
 		count = 2000;
 
-		while ((current_link_speed != GEN2_SPEED) && (count != 0)) {
+		while ((current_link_speed != HALMAC_PCIE_GEN2_SPEED_88XX) && (count != 0)) {
 			PLATFORM_RTL_DELAY_US(pDriver_adapter, 50);
-			current_link_speed = halmac_dbi_read8_88xx(pHalmac_adapter, LINK_STATUS_REG_OFFSET) & 0x0F ;
-			count++;
+			current_link_speed = halmac_dbi_read8_88xx(pHalmac_adapter, LINK_STATUS_REG_OFFSET) & 0x0F;
+			count--;
 		}
 
-		if (current_link_speed != GEN2_SPEED) {
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "Speed change to GEN1 fail !\n");
+		if (current_link_speed != HALMAC_PCIE_GEN2_SPEED_88XX) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Speed change to GEN1 fail !\n");
 			return HALMAC_RET_FAIL;
 		}
 
 	} else {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "Error Speed !\n");
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Error Speed !\n");
 		return HALMAC_RET_FAIL;
 	}
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_pcie_switch_8822b <==========\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "[TRACE]halmac_pcie_switch_8822b <==========\n");
 
 	return HALMAC_RET_SUCCESS;
 }
 
-/**
- * halmac_pcie_switch_8822b_nc() - change mac power
- * @pHalmac_adapter
- * @pcie_cfg
- * Author : KaiYuan Chang
- * Return : HALMAC_RET_STATUS
- */
 HALMAC_RET_STATUS
 halmac_pcie_switch_8822b_nc(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
@@ -186,29 +190,28 @@ halmac_pcie_switch_8822b_nc(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_PCIE_SWITCH);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_pcie_switch_8822b_nc ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "[TRACE]halmac_pcie_switch_8822b_nc ==========>\n");
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_pcie_switch_8822b_nc <==========\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "[TRACE]halmac_pcie_switch_8822b_nc <==========\n");
 
 	return HALMAC_RET_SUCCESS;
 }
 
 /**
  * halmac_phy_cfg_8822b_pcie() - phy config
- * @pHalmac_adapter
+ * @pHalmac_adapter : the adapter of halmac
  * Author : KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_phy_cfg_8822b_pcie(
@@ -220,30 +223,43 @@ halmac_phy_cfg_8822b_pcie(
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_PHY_CFG);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_phy_cfg ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "[TRACE]halmac_phy_cfg ==========>\n");
 
 	status = halmac_parse_intf_phy_88xx(pHalmac_adapter, HALMAC_RTL8822B_PCIE_PHY_GEN1, platform, HAL_INTF_PHY_PCIE_GEN1);
 
-	if (HALMAC_RET_SUCCESS != status)
+	if (status != HALMAC_RET_SUCCESS)
 		return status;
 
 	status = halmac_parse_intf_phy_88xx(pHalmac_adapter, HALMAC_RTL8822B_PCIE_PHY_GEN2, platform, HAL_INTF_PHY_PCIE_GEN2);
 
-	if (HALMAC_RET_SUCCESS != status)
+	if (status != HALMAC_RET_SUCCESS)
 		return status;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_phy_cfg <==========\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "[TRACE]halmac_phy_cfg <==========\n");
+
+	return HALMAC_RET_SUCCESS;
+}
 
+/**
+ * halmac_interface_integration_tuning_8822b_pcie() - pcie interface fine tuning
+ * @pHalmac_adapter : the adapter of halmac
+ * Author : Rick Liu
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+HALMAC_RET_STATUS
+halmac_interface_integration_tuning_8822b_pcie(
+	IN PHALMAC_ADAPTER pHalmac_adapter
+)
+{
 	return HALMAC_RET_SUCCESS;
 }
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_pcie.h b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_pcie.h
index 76632ba..2371c19 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_pcie.h
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_pcie.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_API_8822B_PCIE_H_
 #define _HALMAC_API_8822B_PCIE_H_
 
@@ -31,4 +46,9 @@ halmac_phy_cfg_8822b_pcie(
 	IN HALMAC_INTF_PHY_PLATFORM platform
 );
 
+HALMAC_RET_STATUS
+halmac_interface_integration_tuning_8822b_pcie(
+	IN PHALMAC_ADAPTER pHalmac_adapter
+);
+
 #endif/* _HALMAC_API_8822B_PCIE_H_ */
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_sdio.c b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_sdio.c
index a97faf2..50d1407 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_sdio.c
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_sdio.c
@@ -1,11 +1,27 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #include "halmac_8822b_cfg.h"
 
 /**
- * halmac_mac_power_switch_8822b_sdio() - change mac power
- * @pHalmac_adapter
- * @halmac_power
+ * halmac_mac_power_switch_8822b_sdio() - switch mac power
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_power : power state
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_mac_power_switch_8822b_sdio(
@@ -16,214 +32,86 @@ halmac_mac_power_switch_8822b_sdio(
 	u8 interface_mask;
 	u8 value8;
 	u8 rpwm;
+	u32 imr_backup;
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_MAC_POWER_SWITCH);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_mac_power_switch_88xx_sdio halmac_power = %x ==========>\n", halmac_power);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "[TRACE]halmac_mac_power_switch_88xx_sdio==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "[TRACE]halmac_power = %x ==========>\n", halmac_power);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "[TRACE]8822B pwr seq ver = %s\n", HALMAC_8822B_PWR_SEQ_VER);
 
 	interface_mask = HALMAC_PWR_INTF_SDIO_MSK;
 
 	pHalmac_adapter->rpwm_record = HALMAC_REG_READ_8(pHalmac_adapter, REG_SDIO_HRPWM1);
 
 	/* Check FW still exist or not */
-	if (0xC078 == HALMAC_REG_READ_16(pHalmac_adapter, REG_MCUFW_CTRL)) {
+	if (HALMAC_REG_READ_16(pHalmac_adapter, REG_MCUFW_CTRL) == 0xC078) {
 		/* Leave 32K */
 		rpwm = (u8)((pHalmac_adapter->rpwm_record ^ BIT(7)) & 0x80);
 		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SDIO_HRPWM1, rpwm);
 	}
 
 	value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_CR);
-	if (0xEA == value8)
+	if (value8 == 0xEA)
 		pHalmac_adapter->halmac_state.mac_power = HALMAC_MAC_POWER_OFF;
 	else
 		pHalmac_adapter->halmac_state.mac_power = HALMAC_MAC_POWER_ON;
 
 	/*Check if power switch is needed*/
 	if (halmac_power == HALMAC_MAC_POWER_ON && pHalmac_adapter->halmac_state.mac_power == HALMAC_MAC_POWER_ON) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_WARN, "halmac_mac_power_switch power state unchange!\n");
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_WARN, "[WARN]halmac_mac_power_switch power state unchange!\n");
 		return HALMAC_RET_PWR_UNCHANGE;
-	} else {
-		if (HALMAC_MAC_POWER_OFF == halmac_power) {
-			if (HALMAC_RET_SUCCESS != halmac_pwr_seq_parser_88xx(pHalmac_adapter, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_TSMC_MSK,
-				    interface_mask, halmac_8822b_card_disable_flow)) {
-				PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "Handle power off cmd error\n");
-				return HALMAC_RET_POWER_OFF_FAIL;
-			}
-
-			pHalmac_adapter->halmac_state.mac_power = HALMAC_MAC_POWER_OFF;
-			pHalmac_adapter->halmac_state.ps_state = HALMAC_PS_STATE_UNDEFINE;
-			pHalmac_adapter->halmac_state.dlfw_state = HALMAC_DLFW_NONE;
-			halmac_init_adapter_dynamic_para_88xx(pHalmac_adapter);
-		} else {
-			if (HALMAC_RET_SUCCESS != halmac_pwr_seq_parser_88xx(pHalmac_adapter, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_TSMC_MSK,
-				    interface_mask, halmac_8822b_card_enable_flow)) {
-				PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "Handle power on cmd error\n");
-				return HALMAC_RET_POWER_ON_FAIL;
-			}
-
-			pHalmac_adapter->halmac_state.mac_power = HALMAC_MAC_POWER_ON;
-			pHalmac_adapter->halmac_state.ps_state = HALMAC_PS_STATE_ACT;
-		}
 	}
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_mac_power_switch_88xx_sdio <==========\n");
-
-	return HALMAC_RET_SUCCESS;
-}
-
-#if 0
-/**
- * halmac_tx_allowed_sdio_8822b() - check sdio tx reserved page
- * @pHalmac_adapter
- * @pHalmac_buf
- * @halmac_size
- * Author : Ivan Lin
- * Return : HALMAC_RET_STATUS
- */
-HALMAC_RET_STATUS
-halmac_tx_allowed_sdio_8822b(
-	IN PHALMAC_ADAPTER	pHalmac_adapter,
-	IN u8			*pHalmac_buf,
-	IN u32			halmac_size
-)
-{
-	u8 *pCurr_packet;
-	u16 *pCurr_free_space;
-	u32 i, counter;
-	u32 tx_agg_num, packet_size;
-	u32 tx_required_page_num, total_required_page_num = 0;
-	VOID *pDriver_adapter = NULL;
-	HALMAC_DMA_MAPPING dma_mapping;
-
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
-		return HALMAC_RET_ADAPTER_INVALID;
-
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
-		return HALMAC_RET_API_INVALID;
-
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_TX_ALLOWED_SDIO);
-
-	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_tx_allowed_sdio_8822b ==========>\n");
-
-	tx_agg_num = GET_TX_DESC_DMA_TXAGG_NUM(pHalmac_buf);
-	pCurr_packet = pHalmac_buf;
-
-	tx_agg_num = (tx_agg_num == 0) ? 1 : tx_agg_num;
-
-	switch ((HALMAC_QUEUE_SELECT)GET_TX_DESC_QSEL(pCurr_packet)) {
-	case HALMAC_QUEUE_SELECT_VO:
-	case HALMAC_QUEUE_SELECT_VO_V2:
-		dma_mapping = pHalmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_VO];
-		break;
-	case HALMAC_QUEUE_SELECT_VI:
-	case HALMAC_QUEUE_SELECT_VI_V2:
-		dma_mapping = pHalmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_VI];
-		break;
-	case HALMAC_QUEUE_SELECT_BE:
-	case HALMAC_QUEUE_SELECT_BE_V2:
-		dma_mapping = pHalmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_BE];
-		break;
-	case HALMAC_QUEUE_SELECT_BK:
-	case HALMAC_QUEUE_SELECT_BK_V2:
-		dma_mapping = pHalmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_BK];
-		break;
-	case HALMAC_QUEUE_SELECT_MGNT:
-		dma_mapping = pHalmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_MG];
-		break;
-	case HALMAC_QUEUE_SELECT_HIGH:
-		dma_mapping = pHalmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_HI];
-		break;
-	case HALMAC_QUEUE_SELECT_BCN:
-	case HALMAC_QUEUE_SELECT_CMD:
-		return HALMAC_RET_SUCCESS;
-	default:
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "Qsel is out of range\n");
-		return HALMAC_RET_QSEL_INCORRECT;
-	}
+	imr_backup = HALMAC_REG_READ_32(pHalmac_adapter, REG_SDIO_HIMR);
+	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_SDIO_HIMR, 0);
 
-	switch (dma_mapping) {
-	case HALMAC_DMA_MAPPING_HIGH:
-		pCurr_free_space = &(pHalmac_adapter->sdio_free_space.high_queue_number);
-		break;
-	case HALMAC_DMA_MAPPING_NORMAL:
-		pCurr_free_space = &(pHalmac_adapter->sdio_free_space.normal_queue_number);
-		break;
-	case HALMAC_DMA_MAPPING_LOW:
-		pCurr_free_space = &(pHalmac_adapter->sdio_free_space.low_queue_number);
-		break;
-	case HALMAC_DMA_MAPPING_EXTRA:
-		pCurr_free_space = &(pHalmac_adapter->sdio_free_space.extra_queue_number);
-		break;
-	default:
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "DmaMapping is out of range\n");
-		return HALMAC_RET_DMA_MAP_INCORRECT;
-	}
-
-	for (i = 0; i < tx_agg_num; i++) {
-		packet_size = GET_TX_DESC_TXPKTSIZE(pCurr_packet) + GET_TX_DESC_OFFSET(pCurr_packet);
-		tx_required_page_num = (packet_size >> HALMAC_TX_PAGE_SIZE_2_POWER_8822B) + ((packet_size & (HALMAC_TX_PAGE_SIZE_8822B - 1)) ? 1 : 0);
-		total_required_page_num += tx_required_page_num;
-
-		packet_size = HALMAC_ALIGN(packet_size, 8);
-
-		pCurr_packet += packet_size;
-	}
+	if (halmac_power == HALMAC_MAC_POWER_OFF) {
+		if (halmac_pwr_seq_parser_88xx(pHalmac_adapter, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_TSMC_MSK,
+			    interface_mask, halmac_8822b_card_disable_flow) != HALMAC_RET_SUCCESS) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Handle power off cmd error\n");
+			HALMAC_REG_WRITE_32(pHalmac_adapter, REG_SDIO_HIMR, imr_backup);
+			return HALMAC_RET_POWER_OFF_FAIL;
+		}
 
-	counter = 10;
-	while (1) {
-		if ((u32)(*pCurr_free_space + pHalmac_adapter->sdio_free_space.public_queue_number) >= total_required_page_num) {
-			if (*pCurr_free_space >= total_required_page_num) {
-				*pCurr_free_space -= (u16)total_required_page_num;
-			} else {
-				pHalmac_adapter->sdio_free_space.public_queue_number -= (u16)(total_required_page_num - *pCurr_free_space);
-				*pCurr_free_space = 0;
-			}
-			break;
-		} else {
-			halmac_update_sdio_free_page_88xx(pHalmac_adapter);
+		pHalmac_adapter->halmac_state.mac_power = HALMAC_MAC_POWER_OFF;
+		pHalmac_adapter->halmac_state.ps_state = HALMAC_PS_STATE_UNDEFINE;
+		pHalmac_adapter->halmac_state.dlfw_state = HALMAC_DLFW_NONE;
+		halmac_init_adapter_dynamic_para_88xx(pHalmac_adapter);
+	} else {
+		if (halmac_pwr_seq_parser_88xx(pHalmac_adapter, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_TSMC_MSK,
+			    interface_mask, halmac_8822b_card_enable_flow) != HALMAC_RET_SUCCESS) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Handle power on cmd error\n");
+			HALMAC_REG_WRITE_32(pHalmac_adapter, REG_SDIO_HIMR, imr_backup);
+			return HALMAC_RET_POWER_ON_FAIL;
 		}
 
-		counter--;
-		if (0 == counter)
-			return HALMAC_RET_FREE_SPACE_NOT_ENOUGH;
+		pHalmac_adapter->halmac_state.mac_power = HALMAC_MAC_POWER_ON;
+		pHalmac_adapter->halmac_state.ps_state = HALMAC_PS_STATE_ACT;
 	}
 
-	counter = 10;
-	while (pHalmac_adapter->sdio_free_space.ac_oqt_number < tx_agg_num) {
-		halmac_update_oqt_free_space_88xx(pHalmac_adapter);
+	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_SDIO_HIMR, imr_backup);
 
-		counter--;
-		if (0 == counter)
-			return HALMAC_RET_FREE_SPACE_NOT_ENOUGH;
-	}
-	pHalmac_adapter->sdio_free_space.ac_oqt_number -= (u8)tx_agg_num;
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_tx_allowed_sdio_8822b <==========\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "[TRACE]halmac_mac_power_switch_88xx_sdio <==========\n");
 
 	return HALMAC_RET_SUCCESS;
 }
 
-#endif
-
-
 /**
  * halmac_phy_cfg_8822b_sdio() - phy config
- * @pHalmac_adapter
+ * @pHalmac_adapter : the adapter of halmac
  * Author : KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_phy_cfg_8822b_sdio(
@@ -234,14 +122,12 @@ halmac_phy_cfg_8822b_sdio(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_PHY_CFG);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -252,4 +138,19 @@ halmac_phy_cfg_8822b_sdio(
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_phy_cfg <==========\n");
 
 	return HALMAC_RET_SUCCESS;
+}
+
+/**
+ * halmac_interface_integration_tuning_8822b_sdio() - sdio interface fine tuning
+ * @pHalmac_adapter : the adapter of halmac
+ * Author : Ivan
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+HALMAC_RET_STATUS
+halmac_interface_integration_tuning_8822b_sdio(
+	IN PHALMAC_ADAPTER pHalmac_adapter
+)
+{
+	return HALMAC_RET_SUCCESS;
 }
\ No newline at end of file
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_sdio.h b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_sdio.h
index ad0ff14..36b70ac 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_sdio.h
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_sdio.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_API_8822B_SDIO_H_
 #define _HALMAC_API_8822B_SDIO_H_
 
@@ -25,4 +40,9 @@ halmac_phy_cfg_8822b_sdio(
 	IN HALMAC_INTF_PHY_PLATFORM platform
 );
 
+HALMAC_RET_STATUS
+halmac_interface_integration_tuning_8822b_sdio(
+	IN PHALMAC_ADAPTER pHalmac_adapter
+);
+
 #endif/* _HALMAC_API_8822B_SDIO_H_ */
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_usb.c b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_usb.c
index fd0bc0e..f7956f4 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_usb.c
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_usb.c
@@ -1,12 +1,28 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #include "../halmac_88xx_cfg.h"
 #include "halmac_8822b_cfg.h"
 
 /**
- * halmac_mac_power_switch_8822b_usb() - change mac power
- * @pHalmac_adapter
- * @halmac_power
+ * halmac_mac_power_switch_8822b_usb() - switch mac power
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_power : power state
  * Author : KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_mac_power_switch_8822b_usb(
@@ -16,17 +32,16 @@ halmac_mac_power_switch_8822b_usb(
 {
 	u8 interface_mask;
 	u8 value8;
+	u8 rpwm;
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_MAC_POWER_SWITCH);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -34,38 +49,53 @@ halmac_mac_power_switch_8822b_usb(
 
 	interface_mask = HALMAC_PWR_INTF_USB_MSK;
 
+	pHalmac_adapter->rpwm_record = HALMAC_REG_READ_8(pHalmac_adapter, 0xFE58);
+
+	/* Check FW still exist or not */
+	if (HALMAC_REG_READ_16(pHalmac_adapter, REG_MCUFW_CTRL) == 0xC078) {
+		/* Leave 32K */
+		rpwm = (u8)((pHalmac_adapter->rpwm_record ^ BIT(7)) & 0x80);
+		HALMAC_REG_WRITE_8(pHalmac_adapter, 0xFE58, rpwm);
+	}
+
 	value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_CR);
-	if (0xEA == value8)
+	if (value8 == 0xEA) {
 		pHalmac_adapter->halmac_state.mac_power = HALMAC_MAC_POWER_OFF;
-	else
-		pHalmac_adapter->halmac_state.mac_power = HALMAC_MAC_POWER_ON;
+	} else {
+		if (BIT(0) == (HALMAC_REG_READ_8(pHalmac_adapter, REG_SYS_STATUS1 + 1) & BIT(0)))
+			pHalmac_adapter->halmac_state.mac_power = HALMAC_MAC_POWER_OFF;
+		else
+			pHalmac_adapter->halmac_state.mac_power = HALMAC_MAC_POWER_ON;
+	}
 
 	/*Check if power switch is needed*/
 	if (halmac_power == HALMAC_MAC_POWER_ON && pHalmac_adapter->halmac_state.mac_power == HALMAC_MAC_POWER_ON) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_WARN, "halmac_mac_power_switch power state unchange!\n");
 		return HALMAC_RET_PWR_UNCHANGE;
-	} else {
-		if (HALMAC_MAC_POWER_OFF == halmac_power) {
-			if (HALMAC_RET_SUCCESS != halmac_pwr_seq_parser_88xx(pHalmac_adapter, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_TSMC_MSK,
-				    interface_mask, halmac_8822b_card_disable_flow)) {
-				PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "Handle power off cmd error\n");
-				return HALMAC_RET_POWER_OFF_FAIL;
-			}
+	}
 
-			pHalmac_adapter->halmac_state.mac_power = HALMAC_MAC_POWER_OFF;
-			pHalmac_adapter->halmac_state.ps_state = HALMAC_PS_STATE_UNDEFINE;
-			pHalmac_adapter->halmac_state.dlfw_state = HALMAC_DLFW_NONE;
-			halmac_init_adapter_dynamic_para_88xx(pHalmac_adapter);
-		} else {
-			if (HALMAC_RET_SUCCESS != halmac_pwr_seq_parser_88xx(pHalmac_adapter, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_TSMC_MSK,
-				    interface_mask, halmac_8822b_card_enable_flow)) {
-				PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "Handle power on cmd error\n");
-				return HALMAC_RET_POWER_ON_FAIL;
-			}
+	if (halmac_power == HALMAC_MAC_POWER_OFF) {
+		if (halmac_pwr_seq_parser_88xx(pHalmac_adapter, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_TSMC_MSK,
+			    interface_mask, halmac_8822b_card_disable_flow) != HALMAC_RET_SUCCESS) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "Handle power off cmd error\n");
+			return HALMAC_RET_POWER_OFF_FAIL;
+		}
 
-			pHalmac_adapter->halmac_state.mac_power = HALMAC_MAC_POWER_ON;
-			pHalmac_adapter->halmac_state.ps_state = HALMAC_PS_STATE_ACT;
+		pHalmac_adapter->halmac_state.mac_power = HALMAC_MAC_POWER_OFF;
+		pHalmac_adapter->halmac_state.ps_state = HALMAC_PS_STATE_UNDEFINE;
+		pHalmac_adapter->halmac_state.dlfw_state = HALMAC_DLFW_NONE;
+		halmac_init_adapter_dynamic_para_88xx(pHalmac_adapter);
+	} else {
+		if (halmac_pwr_seq_parser_88xx(pHalmac_adapter, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_TSMC_MSK,
+			    interface_mask, halmac_8822b_card_enable_flow) != HALMAC_RET_SUCCESS) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "Handle power on cmd error\n");
+			return HALMAC_RET_POWER_ON_FAIL;
 		}
+
+		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SYS_STATUS1 + 1, HALMAC_REG_READ_8(pHalmac_adapter, REG_SYS_STATUS1 + 1) & ~(BIT(0)));
+
+		pHalmac_adapter->halmac_state.mac_power = HALMAC_MAC_POWER_ON;
+		pHalmac_adapter->halmac_state.ps_state = HALMAC_PS_STATE_ACT;
 	}
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_mac_power_switch_88xx_usb <==========\n");
@@ -75,9 +105,10 @@ halmac_mac_power_switch_8822b_usb(
 
 /**
  * halmac_phy_cfg_8822b_usb() - phy config
- * @pHalmac_adapter
+ * @pHalmac_adapter : the adapter of halmac
  * Author : KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_phy_cfg_8822b_usb(
@@ -89,14 +120,12 @@ halmac_phy_cfg_8822b_usb(
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_PHY_CFG);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -104,15 +133,30 @@ halmac_phy_cfg_8822b_usb(
 
 	status = halmac_parse_intf_phy_88xx(pHalmac_adapter, HALMAC_RTL8822B_USB2_PHY, platform, HAL_INTF_PHY_USB2);
 
-	if (HALMAC_RET_SUCCESS != status)
+	if (status != HALMAC_RET_SUCCESS)
 		return status;
 
 	status = halmac_parse_intf_phy_88xx(pHalmac_adapter, HALMAC_RTL8822B_USB3_PHY, platform, HAL_INTF_PHY_USB3);
 
-	if (HALMAC_RET_SUCCESS != status)
+	if (status != HALMAC_RET_SUCCESS)
 		return status;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_phy_cfg <==========\n");
 
 	return HALMAC_RET_SUCCESS;
 }
+
+/**
+ * halmac_interface_integration_tuning_8822b_usb() - usb interface fine tuning
+ * @pHalmac_adapter : the adapter of halmac
+ * Author : Ivan
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+HALMAC_RET_STATUS
+halmac_interface_integration_tuning_8822b_usb(
+	IN PHALMAC_ADAPTER pHalmac_adapter
+)
+{
+	return HALMAC_RET_SUCCESS;
+}
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_usb.h b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_usb.h
index 008729c..fdae4e2 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_usb.h
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_usb.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_API_8822B_USB_H_
 #define _HALMAC_API_8822B_USB_H_
 
@@ -18,4 +33,10 @@ halmac_phy_cfg_8822b_usb(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN HALMAC_INTF_PHY_PLATFORM platform
 );
+
+HALMAC_RET_STATUS
+halmac_interface_integration_tuning_8822b_usb(
+	IN PHALMAC_ADAPTER pHalmac_adapter
+);
+
 #endif/* _HALMAC_API_8822B_USB_H_ */
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_func_8822b.c b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_func_8822b.c
index cefeeb6..8b80fc3 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_func_8822b.c
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_func_8822b.c
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #include "halmac_8822b_cfg.h"
 #if HALMAC_PLATFORM_WINDOWS
 /*SDIO RQPN Mapping for Windows, extra queue is not implemented in Driver code*/
@@ -5,11 +20,10 @@ HALMAC_RQPN HALMAC_RQPN_SDIO_8822B[] = {
 	/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
 	{HALMAC_TRX_MODE_NORMAL, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
 	{HALMAC_TRX_MODE_TRXSHARE, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
-	{HALMAC_TRX_MODE_WMM, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
+	{HALMAC_TRX_MODE_WMM, HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
 	{HALMAC_TRX_MODE_P2P, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
 	{HALMAC_TRX_MODE_LOOPBACK, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
 	{HALMAC_TRX_MODE_DELAY_LOOPBACK, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
-	{HALMAC_TRX_MODE_WMM_LINUX, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
 };
 #else
 /*SDIO RQPN Mapping*/
@@ -17,11 +31,10 @@ HALMAC_RQPN HALMAC_RQPN_SDIO_8822B[] = {
 	/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
 	{HALMAC_TRX_MODE_NORMAL, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
 	{HALMAC_TRX_MODE_TRXSHARE, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
-	{HALMAC_TRX_MODE_WMM, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
+	{HALMAC_TRX_MODE_WMM, HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
 	{HALMAC_TRX_MODE_P2P, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
 	{HALMAC_TRX_MODE_LOOPBACK, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
 	{HALMAC_TRX_MODE_DELAY_LOOPBACK, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
-	{HALMAC_TRX_MODE_WMM_LINUX, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
 };
 #endif
 
@@ -30,11 +43,10 @@ HALMAC_RQPN HALMAC_RQPN_PCIE_8822B[] = {
 	/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
 	{HALMAC_TRX_MODE_NORMAL, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
 	{HALMAC_TRX_MODE_TRXSHARE, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
-	{HALMAC_TRX_MODE_WMM, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
+	{HALMAC_TRX_MODE_WMM, HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
 	{HALMAC_TRX_MODE_P2P, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
 	{HALMAC_TRX_MODE_LOOPBACK, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
 	{HALMAC_TRX_MODE_DELAY_LOOPBACK, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
-	{HALMAC_TRX_MODE_WMM_LINUX, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
 };
 
 /*USB 2 Bulkout RQPN Mapping*/
@@ -46,7 +58,6 @@ HALMAC_RQPN HALMAC_RQPN_2BULKOUT_8822B[] = {
 	{HALMAC_TRX_MODE_P2P, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
 	{HALMAC_TRX_MODE_LOOPBACK, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
 	{HALMAC_TRX_MODE_DELAY_LOOPBACK, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
-	{HALMAC_TRX_MODE_WMM_LINUX, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ,	HALMAC_MAP2_HQ},
 };
 
 /*USB 3 Bulkout RQPN Mapping*/
@@ -58,7 +69,6 @@ HALMAC_RQPN HALMAC_RQPN_3BULKOUT_8822B[] = {
 	{HALMAC_TRX_MODE_P2P, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
 	{HALMAC_TRX_MODE_LOOPBACK, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
 	{HALMAC_TRX_MODE_DELAY_LOOPBACK, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
-	{HALMAC_TRX_MODE_WMM_LINUX, HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ, HALMAC_MAP2_HQ, HALMAC_MAP2_HQ},
 };
 
 /*USB 4 Bulkout RQPN Mapping*/
@@ -66,35 +76,33 @@ HALMAC_RQPN HALMAC_RQPN_4BULKOUT_8822B[] = {
 	/* { mode, vo_map, vi_map, be_map, bk_map, mg_map, hi_map } */
 	{HALMAC_TRX_MODE_NORMAL, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
 	{HALMAC_TRX_MODE_TRXSHARE, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
-	{HALMAC_TRX_MODE_WMM, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
+	{HALMAC_TRX_MODE_WMM, HALMAC_MAP2_HQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_NQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
 	{HALMAC_TRX_MODE_P2P, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
 	{HALMAC_TRX_MODE_LOOPBACK, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
 	{HALMAC_TRX_MODE_DELAY_LOOPBACK, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
-	{HALMAC_TRX_MODE_WMM_LINUX, HALMAC_MAP2_NQ, HALMAC_MAP2_NQ, HALMAC_MAP2_LQ, HALMAC_MAP2_LQ, HALMAC_MAP2_EXQ, HALMAC_MAP2_HQ},
 };
+
 #if HALMAC_PLATFORM_WINDOWS
 /*SDIO Page Number*/
 HALMAC_PG_NUM HALMAC_PG_NUM_SDIO_8822B[] = {
 	/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
 	{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 0, 1},
-	{HALMAC_TRX_MODE_TRXSHARE, 64, 64, 64, 0, 1},
+	{HALMAC_TRX_MODE_TRXSHARE, 32, 32, 32, 0, 1},
 	{HALMAC_TRX_MODE_WMM, 64, 64, 64, 0, 1},
 	{HALMAC_TRX_MODE_P2P, 64, 64, 64, 0, 1},
 	{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 0, 640},
 	{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 0, 640},
-	{HALMAC_TRX_MODE_WMM_LINUX, 64, 64, 64, 0, 1},
 };
 #else
 /*SDIO Page Number*/
 HALMAC_PG_NUM HALMAC_PG_NUM_SDIO_8822B[] = {
 	/* { mode, hq_num, nq_num, lq_num, exq_num, gap_num} */
 	{HALMAC_TRX_MODE_NORMAL, 64, 64, 64, 64, 1},
-	{HALMAC_TRX_MODE_TRXSHARE, 64, 64, 64, 64, 1},
+	{HALMAC_TRX_MODE_TRXSHARE, 32, 32, 32, 32, 1},
 	{HALMAC_TRX_MODE_WMM, 64, 64, 64, 64, 1},
 	{HALMAC_TRX_MODE_P2P, 64, 64, 64, 64, 1},
 	{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 640},
 	{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 640},
-	{HALMAC_TRX_MODE_WMM_LINUX, 64, 64, 64, 64, 1},
 };
 #endif
 
@@ -107,7 +115,6 @@ HALMAC_PG_NUM HALMAC_PG_NUM_PCIE_8822B[] = {
 	{HALMAC_TRX_MODE_P2P, 64, 64, 64, 64, 1},
 	{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 640},
 	{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 640},
-	{HALMAC_TRX_MODE_WMM_LINUX, 64, 64, 64, 64, 1},
 };
 
 /*USB 2 Bulkout Page Number*/
@@ -119,7 +126,6 @@ HALMAC_PG_NUM HALMAC_PG_NUM_2BULKOUT_8822B[] = {
 	{HALMAC_TRX_MODE_P2P, 64, 64, 0, 0, 1},
 	{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 0, 0, 1024},
 	{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 0, 0, 1024},
-	{HALMAC_TRX_MODE_WMM_LINUX, 64, 64, 0, 0, 1},
 };
 
 /*USB 3 Bulkout Page Number*/
@@ -131,7 +137,6 @@ HALMAC_PG_NUM HALMAC_PG_NUM_3BULKOUT_8822B[] = {
 	{HALMAC_TRX_MODE_P2P, 64, 64, 64, 0, 1},
 	{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 0, 1024},
 	{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 0, 1024},
-	{HALMAC_TRX_MODE_WMM_LINUX, 64, 64, 64, 0, 1},
 };
 
 /*USB 4 Bulkout Page Number*/
@@ -143,7 +148,6 @@ HALMAC_PG_NUM HALMAC_PG_NUM_4BULKOUT_8822B[] = {
 	{HALMAC_TRX_MODE_P2P, 64, 64, 64, 64, 1},
 	{HALMAC_TRX_MODE_LOOPBACK, 64, 64, 64, 64, 640},
 	{HALMAC_TRX_MODE_DELAY_LOOPBACK, 64, 64, 64, 64, 640},
-	{HALMAC_TRX_MODE_WMM_LINUX, 64, 64, 64, 64, 1},
 };
 
 HALMAC_RET_STATUS
@@ -161,11 +165,11 @@ halmac_txdma_queue_mapping_8822b(
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	if (HALMAC_INTERFACE_SDIO == pHalmac_adapter->halmac_interface) {
+	if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_SDIO) {
 		pCurr_rqpn_Sel = HALMAC_RQPN_SDIO_8822B;
-	} else if (HALMAC_INTERFACE_PCIE == pHalmac_adapter->halmac_interface) {
+	} else if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_PCIE) {
 		pCurr_rqpn_Sel = HALMAC_RQPN_PCIE_8822B;
-	} else if (HALMAC_INTERFACE_USB == pHalmac_adapter->halmac_interface) {
+	} else if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_USB) {
 		if (pHalmac_adapter->halmac_bulkout_num == 2) {
 			pCurr_rqpn_Sel = HALMAC_RQPN_2BULKOUT_8822B;
 		} else if (pHalmac_adapter->halmac_bulkout_num == 3) {
@@ -173,13 +177,15 @@ halmac_txdma_queue_mapping_8822b(
 		} else if (pHalmac_adapter->halmac_bulkout_num == 4) {
 			pCurr_rqpn_Sel = HALMAC_RQPN_4BULKOUT_8822B;
 		} else {
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "interface not support\n");
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[ERR]interface not support\n");
 			return HALMAC_RET_NOT_SUPPORT;
 		}
+	} else {
+		return HALMAC_RET_NOT_SUPPORT;
 	}
 
 	status = halmac_rqpn_parser_88xx(pHalmac_adapter, halmac_trx_mode, pCurr_rqpn_Sel);
-	if (HALMAC_RET_SUCCESS != status)
+	if (status != HALMAC_RET_SUCCESS)
 		return status;
 
 	value16 = 0;
@@ -211,21 +217,19 @@ halmac_priority_queue_config_8822b(
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	if (HALMAC_LA_MODE_DISABLE == pHalmac_adapter->txff_allocation.la_mode) {
-		if (HALMAC_RX_FIFO_EXPANDING_MODE_DISABLE == pHalmac_adapter->txff_allocation.rx_fifo_expanding_mode) {
+	if (pHalmac_adapter->txff_allocation.la_mode == HALMAC_LA_MODE_DISABLE) {
+		if (pHalmac_adapter->txff_allocation.rx_fifo_expanding_mode == HALMAC_RX_FIFO_EXPANDING_MODE_DISABLE) {
 			pHalmac_adapter->txff_allocation.tx_fifo_pg_num = HALMAC_TX_FIFO_SIZE_8822B >> HALMAC_TX_PAGE_SIZE_2_POWER_8822B;
-		} else if (HALMAC_RX_FIFO_EXPANDING_MODE_1_BLOCK == pHalmac_adapter->txff_allocation.rx_fifo_expanding_mode) {
+		} else if (pHalmac_adapter->txff_allocation.rx_fifo_expanding_mode == HALMAC_RX_FIFO_EXPANDING_MODE_1_BLOCK) {
 			pHalmac_adapter->txff_allocation.tx_fifo_pg_num = HALMAC_TX_FIFO_SIZE_RX_FIFO_EXPANDING_1_BLOCK_8822B >> HALMAC_TX_PAGE_SIZE_2_POWER_8822B;
-			pHalmac_adapter->hw_config_info.rx_fifo_size = HALMAC_RX_FIFO_SIZE_RX_FIFO_EXPANDING_1_BLOCK_8822B;
-		} else if (HALMAC_RX_FIFO_EXPANDING_MODE_2_BLOCK == pHalmac_adapter->txff_allocation.rx_fifo_expanding_mode) {
-			pHalmac_adapter->txff_allocation.tx_fifo_pg_num = HALMAC_TX_FIFO_SIZE_RX_FIFO_EXPANDING_2_BLOCK_8822B >> HALMAC_TX_PAGE_SIZE_2_POWER_8822B;
-			pHalmac_adapter->hw_config_info.rx_fifo_size = HALMAC_RX_FIFO_SIZE_RX_FIFO_EXPANDING_2_BLOCK_8822B;
-		} else if (HALMAC_RX_FIFO_EXPANDING_MODE_3_BLOCK == pHalmac_adapter->txff_allocation.rx_fifo_expanding_mode) {
-			pHalmac_adapter->txff_allocation.tx_fifo_pg_num = HALMAC_TX_FIFO_SIZE_RX_FIFO_EXPANDING_3_BLOCK_8822B >> HALMAC_TX_PAGE_SIZE_2_POWER_8822B;
-			pHalmac_adapter->hw_config_info.rx_fifo_size = HALMAC_RX_FIFO_SIZE_RX_FIFO_EXPANDING_3_BLOCK_8822B;
+			pHalmac_adapter->hw_config_info.tx_fifo_size = HALMAC_TX_FIFO_SIZE_RX_FIFO_EXPANDING_1_BLOCK_8822B;
+			if (HALMAC_RX_FIFO_SIZE_RX_FIFO_EXPANDING_1_BLOCK_8822B <= HALMAC_RX_FIFO_SIZE_RX_FIFO_EXPANDING_1_BLOCK_MAX_8822B)
+				pHalmac_adapter->hw_config_info.rx_fifo_size = HALMAC_RX_FIFO_SIZE_RX_FIFO_EXPANDING_1_BLOCK_8822B;
+			else
+				pHalmac_adapter->hw_config_info.rx_fifo_size = HALMAC_RX_FIFO_SIZE_RX_FIFO_EXPANDING_1_BLOCK_MAX_8822B;
 		} else {
 			pHalmac_adapter->txff_allocation.tx_fifo_pg_num = HALMAC_TX_FIFO_SIZE_8822B >> HALMAC_TX_PAGE_SIZE_2_POWER_8822B;
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "rx_fifo_expanding_mode = %d not support\n", pHalmac_adapter->txff_allocation.rx_fifo_expanding_mode);
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[ERR]rx_fifo_expanding_mode = %d not support\n", pHalmac_adapter->txff_allocation.rx_fifo_expanding_mode);
 		}
 	} else {
 		pHalmac_adapter->txff_allocation.tx_fifo_pg_num = HALMAC_TX_FIFO_SIZE_LA_8822B >> HALMAC_TX_PAGE_SIZE_2_POWER_8822B;
@@ -246,11 +250,11 @@ halmac_priority_queue_config_8822b(
 	pHalmac_adapter->txff_allocation.rsvd_h2c_extra_info_pg_bndy = pHalmac_adapter->txff_allocation.rsvd_h2c_queue_pg_bndy - HALMAC_RSVD_H2C_EXTRAINFO_PGNUM_8822B;
 	pHalmac_adapter->txff_allocation.rsvd_drv_pg_bndy = pHalmac_adapter->txff_allocation.rsvd_h2c_extra_info_pg_bndy - pHalmac_adapter->txff_allocation.rsvd_drv_pg_num;
 
-	if (HALMAC_INTERFACE_SDIO == pHalmac_adapter->halmac_interface) {
+	if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_SDIO) {
 		pCurr_pg_num = HALMAC_PG_NUM_SDIO_8822B;
-	} else if (HALMAC_INTERFACE_PCIE == pHalmac_adapter->halmac_interface) {
+	} else if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_PCIE) {
 		pCurr_pg_num = HALMAC_PG_NUM_PCIE_8822B;
-	} else if (HALMAC_INTERFACE_USB == pHalmac_adapter->halmac_interface) {
+	} else if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_USB) {
 		if (pHalmac_adapter->halmac_bulkout_num == 2) {
 			pCurr_pg_num = HALMAC_PG_NUM_2BULKOUT_8822B;
 		} else if (pHalmac_adapter->halmac_bulkout_num == 3) {
@@ -258,17 +262,17 @@ halmac_priority_queue_config_8822b(
 		} else if (pHalmac_adapter->halmac_bulkout_num == 4) {
 			pCurr_pg_num = HALMAC_PG_NUM_4BULKOUT_8822B;
 		} else {
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "interface not support\n");
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[ERR]interface not support\n");
 			return HALMAC_RET_NOT_SUPPORT;
 		}
+	} else {
+		return HALMAC_RET_NOT_SUPPORT;
 	}
 
 	status = halmac_pg_num_parser_88xx(pHalmac_adapter, halmac_trx_mode, pCurr_pg_num);
-	if (HALMAC_RET_SUCCESS != status)
+	if (status != HALMAC_RET_SUCCESS)
 		return status;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Set FIFO page\n");
-
 	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_INFO_1, pHalmac_adapter->txff_allocation.high_queue_pg_num);
 	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_INFO_2, pHalmac_adapter->txff_allocation.low_queue_pg_num);
 	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_INFO_3, pHalmac_adapter->txff_allocation.normal_queue_pg_num);
@@ -285,14 +289,19 @@ halmac_priority_queue_config_8822b(
 
 	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
 	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_BCNQ_BDNY_V1, (u16)(pHalmac_adapter->txff_allocation.rsvd_pg_bndy & BIT_MASK_BCNQ_PGBNDY_V1));
+
+	/*20170223 Soar*/
+	/*SDIO sometimes use two CMD52 to do HALMAC_REG_WRITE_16 and may cause a mismatch between HW status and Reg value.*/
+	/*A patch is to write it again*/
+	if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_SDIO)
+		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_BCNQ_BDNY_V1, (u16)(pHalmac_adapter->txff_allocation.rsvd_pg_bndy & BIT_MASK_BCNQ_PGBNDY_V1));
+
 	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2 + 2, (u16)(pHalmac_adapter->txff_allocation.rsvd_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
 	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_BCNQ1_BDNY_V1, (u16)(pHalmac_adapter->txff_allocation.rsvd_pg_bndy & BIT_MASK_BCNQ_PGBNDY_V1));
 
-	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_RXFF_BNDY, pHalmac_adapter->hw_config_info.rx_fifo_size - HALMAC_WOWLAN_PATTERN_SIZE_8822B - 1);
+	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_RXFF_BNDY, pHalmac_adapter->hw_config_info.rx_fifo_size - HALMAC_C2H_PKT_BUF_8822B - 1);
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Init LLT table\n");
-
-	if (HALMAC_INTERFACE_USB == pHalmac_adapter->halmac_interface) {
+	if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_USB) {
 		value8 = (u8)(HALMAC_REG_READ_8(pHalmac_adapter, REG_AUTO_LLT_V1) & ~(BIT_MASK_BLK_DESC_NUM << BIT_SHIFT_BLK_DESC_NUM));
 		value8 = (u8)(value8 | (HALMAC_BLK_DESC_NUM_8822B << BIT_SHIFT_BLK_DESC_NUM));
 		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_AUTO_LLT_V1, value8);
@@ -309,13 +318,14 @@ halmac_priority_queue_config_8822b(
 			return HALMAC_RET_INIT_LLT_FAIL;
 	}
 
-	if (HALMAC_TRX_MODE_DELAY_LOOPBACK == halmac_trx_mode) {
+	if (halmac_trx_mode == HALMAC_TRX_MODE_DELAY_LOOPBACK) {
 		transfer_mode = HALMAC_TRNSFER_LOOPBACK_DELAY;
 		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_WMAC_LBK_BUF_HD_V1, (u16)pHalmac_adapter->txff_allocation.rsvd_pg_bndy);
-	} else if (HALMAC_TRX_MODE_LOOPBACK == halmac_trx_mode)
+	} else if (halmac_trx_mode == HALMAC_TRX_MODE_LOOPBACK) {
 		transfer_mode = HALMAC_TRNSFER_LOOPBACK_DIRECT;
-	else
+	} else {
 		transfer_mode = HALMAC_TRNSFER_NORMAL;
+	}
 
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_CR + 3, (u8)transfer_mode);
 
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_func_8822b.h b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_func_8822b.h
index 68654d9..be7906e 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_func_8822b.h
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_func_8822b.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_FUNC_8822B_H_
 #define _HALMAC_FUNC_8822B_H_
 
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_gpio_8822b.c b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_gpio_8822b.c
new file mode 100644
index 0000000..d336323
--- a/dev/null
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_gpio_8822b.c
@@ -0,0 +1,559 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
+#include "halmac_gpio_8822b.h"
+#include "../halmac_gpio_88xx.h"
+
+#if HALMAC_8822B_SUPPORT
+
+const HALMAC_GPIO_PIMUX_LIST PIMUX_LIST_GPIO0_8822B[] = {
+	HALMAC_GPIO0_BT_GPIO0_8822B,
+	HALMAC_GPIO0_BT_ACT_8822B,
+	HALMAC_GPIO0_WL_ACT_8822B,
+	HALMAC_GPIO0_WLMAC_DBG_GPIO0_8822B,
+	HALMAC_GPIO0_WLPHY_DBG_GPIO0_8822B,
+	HALMAC_GPIO0_BT_DBG_GPIO0_8822B,
+	HALMAC_GPIO0_SW_IO_8822B
+};
+
+const HALMAC_GPIO_PIMUX_LIST PIMUX_LIST_GPIO1_8822B[] = {
+	HALMAC_GPIO1_BT_GPIO1_8822B,
+	HALMAC_GPIO1_BT_3DD_SYNC_A_8822B,
+	HALMAC_GPIO1_WL_CK_8822B,
+	HALMAC_GPIO1_BT_CK_8822B,
+	HALMAC_GPIO1_WLMAC_DBG_GPIO1_8822B,
+	HALMAC_GPIO1_WLPHY_DBG_GPIO1_8822B,
+	HALMAC_GPIO1_BT_DBG_GPIO1_8822B,
+	HALMAC_GPIO1_SW_IO_8822B
+};
+
+const HALMAC_GPIO_PIMUX_LIST PIMUX_LIST_GPIO2_8822B[] = {
+	HALMAC_GPIO2_BT_GPIO2_8822B,
+	HALMAC_GPIO2_WL_STATE_8822B,
+	HALMAC_GPIO2_BT_STATE_8822B,
+	HALMAC_GPIO2_WLMAC_DBG_GPIO2_8822B,
+	HALMAC_GPIO2_WLPHY_DBG_GPIO2_8822B,
+	HALMAC_GPIO2_BT_DBG_GPIO2_8822B,
+	HALMAC_GPIO2_RFE_CTRL_5_8822B,
+	HALMAC_GPIO2_SW_IO_8822B
+};
+
+const HALMAC_GPIO_PIMUX_LIST PIMUX_LIST_GPIO3_8822B[] = {
+	HALMAC_GPIO3_BT_GPIO3_8822B,
+	HALMAC_GPIO3_WL_PRI_8822B,
+	HALMAC_GPIO3_BT_PRI_8822B,
+	HALMAC_GPIO3_WLMAC_DBG_GPIO3_8822B,
+	HALMAC_GPIO3_WLPHY_DBG_GPIO3_8822B,
+	HALMAC_GPIO3_BT_DBG_GPIO3_8822B,
+	HALMAC_GPIO3_RFE_CTRL_4_8822B,
+	HALMAC_GPIO3_SW_IO_8822B
+};
+
+const HALMAC_GPIO_PIMUX_LIST PIMUX_LIST_GPIO4_8822B[] = {
+	HALMAC_GPIO4_BT_SPI_D0_8822B,
+	HALMAC_GPIO4_WL_SPI_D0_8822B,
+	HALMAC_GPIO4_SDIO_INT_8822B,
+	HALMAC_GPIO4_JTAG_TRST_8822B,
+	HALMAC_GPIO4_DBG_GNT_WL_8822B,
+	HALMAC_GPIO4_WLMAC_DBG_GPIO4_8822B,
+	HALMAC_GPIO4_WLPHY_DBG_GPIO4_8822B,
+	HALMAC_GPIO4_BT_DBG_GPIO4_8822B,
+	HALMAC_GPIO4_SW_IO_8822B
+};
+
+const HALMAC_GPIO_PIMUX_LIST PIMUX_LIST_GPIO5_8822B[] = {
+	HALMAC_GPIO5_BT_SPI_D1_8822B,
+	HALMAC_GPIO5_WL_SPI_D1_8822B,
+	HALMAC_GPIO5_JTAG_TDI_8822B,
+	HALMAC_GPIO5_DBG_GNT_BT,
+	HALMAC_GPIO5_WLMAC_DBG_GPIO5_8822B,
+	HALMAC_GPIO5_WLPHY_DBG_GPIO5_8822B,
+	HALMAC_GPIO5_BT_DBG_GPIO5_8822B,
+	HALMAC_GPIO5_SW_IO_8822B
+};
+
+const HALMAC_GPIO_PIMUX_LIST PIMUX_LIST_GPIO6_8822B[] = {
+	HALMAC_GPIO6_BT_SPI_D2_8822B,
+	HALMAC_GPIO6_WL_SPI_D2_8822B,
+	HALMAC_GPIO6_EEDO_8822B,
+	HALMAC_GPIO6_JTAG_TDO_8822B,
+	HALMAC_GPIO6_BT_3DD_SYNC_B_8822B,
+	HALMAC_GPIO6_BT_GPIO18_8822B,
+	HALMAC_GPIO6_SIN_8822B,
+	HALMAC_GPIO6_WLMAC_DBG_GPIO6_8822B,
+	HALMAC_GPIO6_WLPHY_DBG_GPIO6_8822B,
+	HALMAC_GPIO6_BT_DBG_GPIO6_8822B,
+	HALMAC_GPIO6_SW_IO_8822B
+};
+
+const HALMAC_GPIO_PIMUX_LIST PIMUX_LIST_GPIO7_8822B[] = {
+	HALMAC_GPIO7_BT_SPI_D3_8822B,
+	HALMAC_GPIO7_WL_SPI_D3_8822B,
+	HALMAC_GPIO7_EEDI_8822B,
+	HALMAC_GPIO7_JTAG_TMS_8822B,
+	HALMAC_GPIO7_BT_GPIO16_8822B,
+	HALMAC_GPIO7_SOUT_8822B,
+	HALMAC_GPIO7_WLMAC_DBG_GPIO7_8822B,
+	HALMAC_GPIO7_WLPHY_DBG_GPIO7_8822B,
+	HALMAC_GPIO7_BT_DBG_GPIO7_8822B,
+	HALMAC_GPIO7_SW_IO_8822B
+};
+
+const HALMAC_GPIO_PIMUX_LIST PIMUX_LIST_GPIO8_8822B[] = {
+	HALMAC_GPIO8_WL_EXT_WOL_8822B,
+	HALMAC_GPIO8_WL_LED,
+	HALMAC_GPIO8_SW_IO_8822B
+};
+
+const HALMAC_GPIO_PIMUX_LIST PIMUX_LIST_GPIO9_8822B[] = {
+	HALMAC_GPIO9_DIS_WL_N_8822B,
+	HALMAC_GPIO9_WL_EXT_WOL_8822B,
+	HALMAC_GPIO9_USCTS0_8822B,
+	HALMAC_GPIO9_SW_IO_8822B
+};
+
+const HALMAC_GPIO_PIMUX_LIST PIMUX_LIST_GPIO10_8822B[] = {
+	HALMAC_GPIO10_SW_IO_8822B
+};
+
+const HALMAC_GPIO_PIMUX_LIST PIMUX_LIST_GPIO11_8822B[] = {
+	HALMAC_GPIO11_DIS_BT_N_8822B,
+	HALMAC_GPIO11_USOUT0_8822B,
+	HALMAC_GPIO11_SW_IO_8822B
+};
+
+const HALMAC_GPIO_PIMUX_LIST PIMUX_LIST_GPIO12_8822B[] = {
+	HALMAC_GPIO12_USIN0_8822B,
+	HALMAC_GPIO12_SW_IO_8822B
+};
+
+const HALMAC_GPIO_PIMUX_LIST PIMUX_LIST_GPIO13_8822B[] = {
+	HALMAC_GPIO13_BT_WAKE_8822B,
+	HALMAC_GPIO13_SW_IO_8822B
+};
+
+const HALMAC_GPIO_PIMUX_LIST PIMUX_LIST_GPIO14_8822B[] = {
+	HALMAC_GPIO14_UART_WAKE_8822B,
+	HALMAC_GPIO14_SW_IO_8822B
+};
+
+const HALMAC_GPIO_PIMUX_LIST PIMUX_LIST_GPIO15_8822B[] = {
+	HALMAC_GPIO15_EXT_XTAL_8822B,
+	HALMAC_GPIO15_SW_IO_8822B
+};
+
+static HALMAC_RET_STATUS
+halmac_get_pinmux_list_8822b(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN HALMAC_GPIO_FUNC gpio_func,
+	OUT const HALMAC_GPIO_PIMUX_LIST **ppPinmux_list,
+	OUT u32 *pList_size,
+	OUT u32 *pGpio_id
+);
+
+static HALMAC_RET_STATUS
+halmac_chk_pinmux_valid_8822b(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN HALMAC_GPIO_FUNC gpio_func
+);
+
+/**
+ * halmac_pinmux_get_func_8822b() -get current gpio status
+ * @pHalmac_adapter : the adapter of halmac
+ * @gpio_func : gpio function
+ * @pEnable : function is enable(1) or disable(0)
+ * Author : Ivan Lin
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+HALMAC_RET_STATUS
+halmac_pinmux_get_func_8822b(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN HALMAC_GPIO_FUNC gpio_func,
+	OUT u8 *pEnable
+)
+{
+	u32 list_size;
+	u32 curr_func;
+	u32 gpio_id;
+	HALMAC_RET_STATUS status;
+	const HALMAC_GPIO_PIMUX_LIST *pPinmux_list = NULL;
+	VOID *pDriver_adapter = NULL;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]halmac_pinmux_get_func_8822b ==========>\n");
+
+	status = halmac_get_pinmux_list_8822b(pHalmac_adapter, gpio_func, &pPinmux_list, &list_size, &gpio_id);
+	if (status != HALMAC_RET_SUCCESS)
+		return status;
+
+	status = halmac_pinmux_parser_88xx(pHalmac_adapter, pPinmux_list, list_size, gpio_id, &curr_func);
+	if (status != HALMAC_RET_SUCCESS)
+		return status;
+
+	switch (gpio_func) {
+	case HALMAC_GPIO_FUNC_WL_LED:
+		*pEnable = (curr_func == HALMAC_WL_LED) ? 1 : 0;
+		break;
+	case HALMAC_GPIO_FUNC_SDIO_INT:
+		*pEnable = (curr_func == HALMAC_SDIO_INT) ? 1 : 0;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_0:
+	case HALMAC_GPIO_FUNC_SW_IO_1:
+	case HALMAC_GPIO_FUNC_SW_IO_2:
+	case HALMAC_GPIO_FUNC_SW_IO_3:
+	case HALMAC_GPIO_FUNC_SW_IO_4:
+	case HALMAC_GPIO_FUNC_SW_IO_5:
+	case HALMAC_GPIO_FUNC_SW_IO_6:
+	case HALMAC_GPIO_FUNC_SW_IO_7:
+	case HALMAC_GPIO_FUNC_SW_IO_8:
+	case HALMAC_GPIO_FUNC_SW_IO_9:
+	case HALMAC_GPIO_FUNC_SW_IO_10:
+	case HALMAC_GPIO_FUNC_SW_IO_11:
+	case HALMAC_GPIO_FUNC_SW_IO_12:
+	case HALMAC_GPIO_FUNC_SW_IO_13:
+	case HALMAC_GPIO_FUNC_SW_IO_14:
+	case HALMAC_GPIO_FUNC_SW_IO_15:
+		*pEnable = (curr_func == HALMAC_SW_IO) ? 1 : 0;
+		break;
+	default:
+		*pEnable = 0;
+		return HALMAC_RET_GET_PINMUX_ERR;
+	}
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]halmac_pinmux_get_func_8822b <==========\n");
+
+	return HALMAC_RET_SUCCESS;
+}
+
+/**
+ * halmac_pinmux_set_func_8822b() -set gpio function
+ * @pHalmac_adapter : the adapter of halmac
+ * @gpio_func : gpio function
+ * Author : Ivan Lin
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+HALMAC_RET_STATUS
+halmac_pinmux_set_func_8822b(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN HALMAC_GPIO_FUNC gpio_func
+)
+{
+	u32 list_size;
+	u32 gpio_id;
+	HALMAC_RET_STATUS status;
+	const HALMAC_GPIO_PIMUX_LIST *pPinmux_list = NULL;
+	VOID *pDriver_adapter = NULL;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]halmac_pinmux_set_func_8822b ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]func name : %d\n", gpio_func);
+
+	status = halmac_chk_pinmux_valid_8822b(pHalmac_adapter, gpio_func);
+	if (status != HALMAC_RET_SUCCESS)
+		return status;
+
+	status = halmac_get_pinmux_list_8822b(pHalmac_adapter, gpio_func, &pPinmux_list, &list_size, &gpio_id);
+	if (status != HALMAC_RET_SUCCESS)
+		return status;
+
+	status = halmac_pinmux_switch_88xx(pHalmac_adapter, pPinmux_list, list_size, gpio_id, gpio_func);
+	if (status != HALMAC_RET_SUCCESS)
+		return status;
+
+	status = halmac_pinmux_record_88xx(pHalmac_adapter, gpio_func, 1);
+	if (status != HALMAC_RET_SUCCESS)
+		return status;
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]halmac_pinmux_set_func_8822b <==========\n");
+
+	return HALMAC_RET_SUCCESS;
+}
+
+/**
+ * halmac_pinmux_free_func_8822b() -free locked gpio function
+ * @pHalmac_adapter : the adapter of halmac
+ * @gpio_func : gpio function
+ * Author : Ivan Lin
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+HALMAC_RET_STATUS
+halmac_pinmux_free_func_8822b(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN HALMAC_GPIO_FUNC gpio_func
+)
+{
+	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
+	VOID *pDriver_adapter = NULL;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]halmac_pinmux_free_func_8822b ==========>\n");
+
+	switch (gpio_func) {
+	case HALMAC_GPIO_FUNC_SW_IO_0:
+		pHalmac_adapter->pinmux_info.sw_io_0 = 0;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_1:
+		pHalmac_adapter->pinmux_info.sw_io_1 = 0;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_2:
+		pHalmac_adapter->pinmux_info.sw_io_2 = 0;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_3:
+		pHalmac_adapter->pinmux_info.sw_io_3 = 0;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_4:
+	case HALMAC_GPIO_FUNC_SDIO_INT:
+		pHalmac_adapter->pinmux_info.sw_io_4 = 0;
+		pHalmac_adapter->pinmux_info.sdio_int = 0;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_5:
+		pHalmac_adapter->pinmux_info.sw_io_5 = 0;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_6:
+		pHalmac_adapter->pinmux_info.sw_io_6 = 0;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_7:
+		pHalmac_adapter->pinmux_info.sw_io_7 = 0;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_8:
+	case HALMAC_GPIO_FUNC_WL_LED:
+		pHalmac_adapter->pinmux_info.sw_io_8 = 0;
+		pHalmac_adapter->pinmux_info.wl_led = 0;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_9:
+		pHalmac_adapter->pinmux_info.sw_io_9 = 0;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_10:
+		pHalmac_adapter->pinmux_info.sw_io_10 = 0;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_11:
+		pHalmac_adapter->pinmux_info.sw_io_11 = 0;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_12:
+		pHalmac_adapter->pinmux_info.sw_io_12 = 0;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_13:
+		pHalmac_adapter->pinmux_info.sw_io_13 = 0;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_14:
+		pHalmac_adapter->pinmux_info.sw_io_14 = 0;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_15:
+		pHalmac_adapter->pinmux_info.sw_io_15 = 0;
+		break;
+	default:
+		return HALMAC_RET_SWITCH_CASE_ERROR;
+	}
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]func : %X\n", gpio_func);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]halmac_pinmux_free_func_8822b <==========\n");
+
+	return HALMAC_RET_SUCCESS;
+}
+
+static HALMAC_RET_STATUS
+halmac_get_pinmux_list_8822b(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN HALMAC_GPIO_FUNC gpio_func,
+	OUT const HALMAC_GPIO_PIMUX_LIST **ppPinmux_list,
+	OUT u32 *pList_size,
+	OUT u32 *pGpio_id
+)
+{
+	switch (gpio_func) {
+	case HALMAC_GPIO_FUNC_SW_IO_0:
+		*ppPinmux_list = PIMUX_LIST_GPIO0_8822B;
+		*pList_size = ARRAY_SIZE(PIMUX_LIST_GPIO0_8822B);
+		*pGpio_id = HALMAC_GPIO0;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_1:
+		*ppPinmux_list = PIMUX_LIST_GPIO1_8822B;
+		*pList_size = ARRAY_SIZE(PIMUX_LIST_GPIO1_8822B);
+		*pGpio_id = HALMAC_GPIO1;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_2:
+		*ppPinmux_list = PIMUX_LIST_GPIO2_8822B;
+		*pList_size = ARRAY_SIZE(PIMUX_LIST_GPIO2_8822B);
+		*pGpio_id = HALMAC_GPIO2;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_3:
+		*ppPinmux_list = PIMUX_LIST_GPIO3_8822B;
+		*pList_size = ARRAY_SIZE(PIMUX_LIST_GPIO3_8822B);
+		*pGpio_id = HALMAC_GPIO3;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_4:
+	case HALMAC_GPIO_FUNC_SDIO_INT:
+		*ppPinmux_list = PIMUX_LIST_GPIO4_8822B;
+		*pList_size = ARRAY_SIZE(PIMUX_LIST_GPIO4_8822B);
+		*pGpio_id = HALMAC_GPIO4;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_5:
+		*ppPinmux_list = PIMUX_LIST_GPIO5_8822B;
+		*pList_size = ARRAY_SIZE(PIMUX_LIST_GPIO5_8822B);
+		*pGpio_id = HALMAC_GPIO5;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_6:
+		*ppPinmux_list = PIMUX_LIST_GPIO6_8822B;
+		*pList_size = ARRAY_SIZE(PIMUX_LIST_GPIO6_8822B);
+		*pGpio_id = HALMAC_GPIO6;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_7:
+		*ppPinmux_list = PIMUX_LIST_GPIO7_8822B;
+		*pList_size = ARRAY_SIZE(PIMUX_LIST_GPIO7_8822B);
+		*pGpio_id = HALMAC_GPIO7;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_8:
+	case HALMAC_GPIO_FUNC_WL_LED:
+		*ppPinmux_list = PIMUX_LIST_GPIO8_8822B;
+		*pList_size = ARRAY_SIZE(PIMUX_LIST_GPIO8_8822B);
+		*pGpio_id = HALMAC_GPIO8;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_9:
+		*ppPinmux_list = PIMUX_LIST_GPIO9_8822B;
+		*pList_size = ARRAY_SIZE(PIMUX_LIST_GPIO9_8822B);
+		*pGpio_id = HALMAC_GPIO9;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_10:
+		*ppPinmux_list = PIMUX_LIST_GPIO10_8822B;
+		*pList_size = ARRAY_SIZE(PIMUX_LIST_GPIO10_8822B);
+		*pGpio_id = HALMAC_GPIO10;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_11:
+		*ppPinmux_list = PIMUX_LIST_GPIO11_8822B;
+		*pList_size = ARRAY_SIZE(PIMUX_LIST_GPIO11_8822B);
+		*pGpio_id = HALMAC_GPIO11;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_12:
+		*ppPinmux_list = PIMUX_LIST_GPIO12_8822B;
+		*pList_size = ARRAY_SIZE(PIMUX_LIST_GPIO12_8822B);
+		*pGpio_id = HALMAC_GPIO12;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_13:
+		*ppPinmux_list = PIMUX_LIST_GPIO13_8822B;
+		*pList_size = ARRAY_SIZE(PIMUX_LIST_GPIO13_8822B);
+		*pGpio_id = HALMAC_GPIO13;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_14:
+		*ppPinmux_list = PIMUX_LIST_GPIO14_8822B;
+		*pList_size = ARRAY_SIZE(PIMUX_LIST_GPIO14_8822B);
+		*pGpio_id = HALMAC_GPIO14;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_15:
+		*ppPinmux_list = PIMUX_LIST_GPIO15_8822B;
+		*pList_size = ARRAY_SIZE(PIMUX_LIST_GPIO15_8822B);
+		*pGpio_id = HALMAC_GPIO15;
+		break;
+	default:
+		return HALMAC_RET_SWITCH_CASE_ERROR;
+	}
+
+	return HALMAC_RET_SUCCESS;
+}
+
+static HALMAC_RET_STATUS
+halmac_chk_pinmux_valid_8822b(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN HALMAC_GPIO_FUNC gpio_func
+)
+{
+	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
+	VOID *pDriver_adapter = NULL;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+
+	switch (gpio_func) {
+	case HALMAC_GPIO_FUNC_SW_IO_0:
+		if (pHalmac_adapter->pinmux_info.sw_io_0 == 1)
+			status = HALMAC_RET_PINMUX_USED;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_1:
+		if (pHalmac_adapter->pinmux_info.sw_io_1 == 1)
+			status = HALMAC_RET_PINMUX_USED;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_2:
+		if (pHalmac_adapter->pinmux_info.sw_io_2 == 1)
+			status = HALMAC_RET_PINMUX_USED;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_3:
+		if (pHalmac_adapter->pinmux_info.sw_io_3 == 1)
+			status = HALMAC_RET_PINMUX_USED;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_4:
+	case HALMAC_GPIO_FUNC_SDIO_INT:
+		if ((pHalmac_adapter->pinmux_info.sw_io_4 == 1) || (pHalmac_adapter->pinmux_info.sdio_int == 1))
+			status = HALMAC_RET_PINMUX_USED;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_5:
+		if (pHalmac_adapter->pinmux_info.sw_io_5 == 1)
+			status = HALMAC_RET_PINMUX_USED;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_6:
+		if (pHalmac_adapter->pinmux_info.sw_io_6 == 1)
+			status = HALMAC_RET_PINMUX_USED;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_7:
+		if (pHalmac_adapter->pinmux_info.sw_io_7 == 1)
+			status = HALMAC_RET_PINMUX_USED;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_8:
+	case HALMAC_GPIO_FUNC_WL_LED:
+		if ((pHalmac_adapter->pinmux_info.sw_io_8 == 1) || (pHalmac_adapter->pinmux_info.wl_led == 1))
+			status = HALMAC_RET_PINMUX_USED;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_9:
+		if (pHalmac_adapter->pinmux_info.sw_io_9 == 1)
+			status = HALMAC_RET_PINMUX_USED;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_10:
+		if (pHalmac_adapter->pinmux_info.sw_io_10 == 1)
+			status = HALMAC_RET_PINMUX_USED;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_11:
+		if (pHalmac_adapter->pinmux_info.sw_io_11 == 1)
+			status = HALMAC_RET_PINMUX_USED;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_12:
+		if (pHalmac_adapter->pinmux_info.sw_io_12 == 1)
+			status = HALMAC_RET_PINMUX_USED;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_13:
+		if (pHalmac_adapter->pinmux_info.sw_io_13 == 1)
+			status = HALMAC_RET_PINMUX_USED;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_14:
+		if (pHalmac_adapter->pinmux_info.sw_io_14 == 1)
+			status = HALMAC_RET_PINMUX_USED;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_15:
+		if (pHalmac_adapter->pinmux_info.sw_io_15 == 1)
+			status = HALMAC_RET_PINMUX_USED;
+		break;
+	default:
+		return HALMAC_RET_SWITCH_CASE_ERROR;
+	}
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]chk_pinmux_valid func : %X status : %X\n",
+									gpio_func, status);
+
+	return status;
+}
+
+#endif /* HALMAC_8822B_SUPPORT */
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_gpio_8822b.h b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_gpio_8822b.h
new file mode 100644
index 0000000..2bbf97e
--- a/dev/null
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_8822b/halmac_gpio_8822b.h
@@ -0,0 +1,168 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
+#ifndef _HALMAC_GPIO_8822B_H_
+#define _HALMAC_GPIO_8822B_H_
+
+#include "../../halmac_api.h"
+#include "../../halmac_gpio_cmd.h"
+
+#if HALMAC_8822B_SUPPORT
+
+/* P_LED0 definition */
+#define HALMAC_GPIO0_BT_GPIO0_8822B				{HALMAC_BT_GPIO, HALMAC_GPIO0, HALMAC_GPIO_IN_OUT, 0x66, BIT(2), BIT(2)}
+
+/* GPIO0 definition */
+#define HALMAC_GPIO0_BT_GPIO0_8822B				{HALMAC_BT_GPIO, HALMAC_GPIO0, HALMAC_GPIO_IN_OUT, 0x66, BIT(2), BIT(2)}
+#define HALMAC_GPIO0_BT_ACT_8822B				{HALMAC_BT_PTA, HALMAC_GPIO0, HALMAC_GPIO_IN_OUT, 0x41, BIT(1), 0}
+#define HALMAC_GPIO0_WL_ACT_8822B				{HALMAC_WL_PTA, HALMAC_GPIO0, HALMAC_GPIO_IN_OUT, 0x41, BIT(2), BIT(2)}
+#define HALMAC_GPIO0_WLMAC_DBG_GPIO0_8822B		{HALMAC_WLMAC_DBG, HALMAC_GPIO0, HALMAC_GPIO_OUT, 0x40, BIT(1) | BIT(0), BIT(0)}
+#define HALMAC_GPIO0_WLPHY_DBG_GPIO0_8822B		{HALMAC_WLPHY_DBG, HALMAC_GPIO0, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), BIT(1)}
+#define HALMAC_GPIO0_BT_DBG_GPIO0_8822B			{HALMAC_BT_DBG, HALMAC_GPIO0, HALMAC_GPIO_OUT, 0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
+#define HALMAC_GPIO0_SW_IO_8822B				{HALMAC_SW_IO, HALMAC_GPIO0, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), 0}
+
+/* GPIO1 definition */
+#define HALMAC_GPIO1_BT_GPIO1_8822B				{HALMAC_BT_GPIO, HALMAC_GPIO1, HALMAC_GPIO_IN_OUT, 0x66, BIT(2), BIT(2)}
+#define HALMAC_GPIO1_BT_3DD_SYNC_A_8822B		{HALMAC_BT_3DDLS_A, HALMAC_GPIO1, HALMAC_GPIO_IN, 0x66, BIT(2), BIT(2)}
+#define HALMAC_GPIO1_WL_CK_8822B				{HALMAC_BT_PTA, HALMAC_GPIO1, HALMAC_GPIO_OUT, 0x41, BIT(1), 0}
+#define HALMAC_GPIO1_BT_CK_8822B				{HALMAC_WL_PTA, HALMAC_GPIO1, HALMAC_GPIO_OUT, 0x41, BIT(2), BIT(2)}
+#define HALMAC_GPIO1_WLMAC_DBG_GPIO1_8822B		{HALMAC_WLMAC_DBG, HALMAC_GPIO1, HALMAC_GPIO_OUT, 0x40, BIT(1) | BIT(0), BIT(0)}
+#define HALMAC_GPIO1_WLPHY_DBG_GPIO1_8822B		{HALMAC_WLPHY_DBG, HALMAC_GPIO1, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), BIT(1)}
+#define HALMAC_GPIO1_BT_DBG_GPIO1_8822B			{HALMAC_BT_DBG, HALMAC_GPIO1, HALMAC_GPIO_OUT, 0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
+#define HALMAC_GPIO1_SW_IO_8822B				{HALMAC_SW_IO, HALMAC_GPIO1, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), 0}
+
+/* GPIO2 definition */
+#define HALMAC_GPIO2_BT_GPIO2_8822B				{HALMAC_BT_GPIO, HALMAC_GPIO2, HALMAC_GPIO_IN_OUT, 0x66, BIT(2), BIT(2)}
+#define HALMAC_GPIO2_WL_STATE_8822B				{HALMAC_BT_PTA, HALMAC_GPIO2, HALMAC_GPIO_OUT, 0x41, BIT(1), 0}
+#define HALMAC_GPIO2_BT_STATE_8822B				{HALMAC_WL_PTA, HALMAC_GPIO2, HALMAC_GPIO_OUT, 0x41, BIT(2), BIT(2)}
+#define HALMAC_GPIO2_WLMAC_DBG_GPIO2_8822B		{HALMAC_WLMAC_DBG, HALMAC_GPIO2, HALMAC_GPIO_OUT, 0x40, BIT(1) | BIT(0), BIT(0)}
+#define HALMAC_GPIO2_WLPHY_DBG_GPIO2_8822B		{HALMAC_WLPHY_DBG, HALMAC_GPIO2, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), BIT(1)}
+#define HALMAC_GPIO2_BT_DBG_GPIO2_8822B			{HALMAC_BT_DBG, HALMAC_GPIO2, HALMAC_GPIO_OUT, 0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
+#define HALMAC_GPIO2_RFE_CTRL_5_8822B			{HALMAC_WLPHY_RFE_CTRL2GPIO, HALMAC_GPIO2, HALMAC_GPIO_IN_OUT, 0x40, BIT(2), BIT(2)}
+#define HALMAC_GPIO2_SW_IO_8822B				{HALMAC_SW_IO, HALMAC_GPIO2, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), 0}
+
+/* GPIO3 definition */
+#define HALMAC_GPIO3_BT_GPIO3_8822B				{HALMAC_BT_GPIO, HALMAC_GPIO3, HALMAC_GPIO_IN_OUT, 0x66, BIT(2), BIT(2)}
+#define HALMAC_GPIO3_WL_PRI_8822B				{HALMAC_BT_PTA, HALMAC_GPIO3, HALMAC_GPIO_OUT, 0x41, BIT(1), 0}
+#define HALMAC_GPIO3_BT_PRI_8822B				{HALMAC_WL_PTA, HALMAC_GPIO3, HALMAC_GPIO_OUT, 0x41, BIT(2), BIT(2)}
+#define HALMAC_GPIO3_WLMAC_DBG_GPIO3_8822B		{HALMAC_WLMAC_DBG, HALMAC_GPIO3, HALMAC_GPIO_OUT, 0x40, BIT(1) | BIT(0), BIT(0)}
+#define HALMAC_GPIO3_WLPHY_DBG_GPIO3_8822B		{HALMAC_WLPHY_DBG, HALMAC_GPIO3, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), BIT(1)}
+#define HALMAC_GPIO3_BT_DBG_GPIO3_8822B			{HALMAC_BT_DBG, HALMAC_GPIO3, HALMAC_GPIO_OUT, 0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
+#define HALMAC_GPIO3_RFE_CTRL_4_8822B			{HALMAC_WLPHY_RFE_CTRL2GPIO, HALMAC_GPIO3, HALMAC_GPIO_IN_OUT, 0x40, BIT(2), BIT(2)}
+#define HALMAC_GPIO3_SW_IO_8822B				{HALMAC_SW_IO, HALMAC_GPIO3, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), 0}
+
+/* GPIO4 definition */
+#define HALMAC_GPIO4_BT_SPI_D0_8822B			{HALMAC_BT_SFLASH, HALMAC_GPIO4, HALMAC_GPIO_IN_OUT, 0x66, BIT(4), BIT(4)}
+#define HALMAC_GPIO4_WL_SPI_D0_8822B			{HALMAC_WL_SFLASH, HALMAC_GPIO4, HALMAC_GPIO_IN_OUT, 0x42, BIT(3), BIT(3)}
+#define HALMAC_GPIO4_SDIO_INT_8822B				{HALMAC_SDIO_INT, HALMAC_GPIO4, HALMAC_GPIO_OUT, 0x72, BIT(2), BIT(2)}
+#define HALMAC_GPIO4_JTAG_TRST_8822B			{HALMAC_JTAG, HALMAC_GPIO4, HALMAC_GPIO_IN, 0x67, BIT(0), BIT(0)}
+#define HALMAC_GPIO4_DBG_GNT_WL_8822B			{HALMAC_DBG_GNT_WL_BT, HALMAC_GPIO4, HALMAC_GPIO_OUT, 0x73, BIT(3), BIT(3)}
+#define HALMAC_GPIO4_WLMAC_DBG_GPIO4_8822B		{HALMAC_WLMAC_DBG, HALMAC_GPIO4, HALMAC_GPIO_OUT, 0x40, BIT(1) | BIT(0), BIT(0)}
+#define HALMAC_GPIO4_WLPHY_DBG_GPIO4_8822B		{HALMAC_WLPHY_DBG, HALMAC_GPIO4, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), BIT(1)}
+#define HALMAC_GPIO4_BT_DBG_GPIO4_8822B			{HALMAC_BT_DBG, HALMAC_GPIO4, HALMAC_GPIO_OUT, 0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
+#define HALMAC_GPIO4_SW_IO_8822B				{HALMAC_SW_IO, HALMAC_GPIO4, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), 0}
+
+/* GPIO5 definition */
+#define HALMAC_GPIO5_BT_SPI_D1_8822B			{HALMAC_BT_SFLASH, HALMAC_GPIO5, HALMAC_GPIO_IN_OUT, 0x66, BIT(4), BIT(4)}
+#define HALMAC_GPIO5_WL_SPI_D1_8822B			{HALMAC_WL_SFLASH, HALMAC_GPIO5, HALMAC_GPIO_IN_OUT, 0x42, BIT(3), BIT(3)}
+#define HALMAC_GPIO5_JTAG_TDI_8822B				{HALMAC_JTAG, HALMAC_GPIO5, HALMAC_GPIO_IN, 0x67, BIT(0), BIT(0)}
+#define HALMAC_GPIO5_DBG_GNT_BT					{HALMAC_DBG_GNT_WL_BT, HALMAC_GPIO5, HALMAC_GPIO_OUT, 0x73, BIT(3), BIT(3)}
+#define HALMAC_GPIO5_WLMAC_DBG_GPIO5_8822B		{HALMAC_WLMAC_DBG, HALMAC_GPIO5, HALMAC_GPIO_OUT, 0x40, BIT(1) | BIT(0), BIT(0)}
+#define HALMAC_GPIO5_WLPHY_DBG_GPIO5_8822B		{HALMAC_WLPHY_DBG, HALMAC_GPIO5, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), BIT(1)}
+#define HALMAC_GPIO5_BT_DBG_GPIO5_8822B			{HALMAC_BT_DBG, HALMAC_GPIO5, HALMAC_GPIO_OUT, 0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
+#define HALMAC_GPIO5_SW_IO_8822B				{HALMAC_SW_IO, HALMAC_GPIO5, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), 0}
+
+/* GPIO6 definition */
+#define HALMAC_GPIO6_BT_SPI_D2_8822B			{HALMAC_BT_SFLASH, HALMAC_GPIO6, HALMAC_GPIO_IN_OUT, 0x66, BIT(4), BIT(4)}
+#define HALMAC_GPIO6_WL_SPI_D2_8822B			{HALMAC_WL_SFLASH, HALMAC_GPIO6, HALMAC_GPIO_IN_OUT, 0x42, BIT(3), BIT(3)}
+#define HALMAC_GPIO6_EEDO_8822B					{HALMAC_EEPROM, HALMAC_GPIO6, HALMAC_GPIO_IN, 0x40, BIT(4), BIT(4)}
+#define HALMAC_GPIO6_JTAG_TDO_8822B				{HALMAC_JTAG, HALMAC_GPIO6, HALMAC_GPIO_OUT, 0x67, BIT(0), BIT(0)}
+#define HALMAC_GPIO6_BT_3DD_SYNC_B_8822B		{HALMAC_BT_3DDLS_B, HALMAC_GPIO6, HALMAC_GPIO_IN, 0x67, BIT(1), BIT(1)}
+#define HALMAC_GPIO6_BT_GPIO18_8822B			{HALMAC_BT_GPIO, HALMAC_GPIO6, HALMAC_GPIO_IN_OUT, 0x67, BIT(1), BIT(1)}
+#define HALMAC_GPIO6_SIN_8822B					{HALMAC_WL_UART, HALMAC_GPIO6, HALMAC_GPIO_IN, 0x41, BIT(0), BIT(0)}
+#define HALMAC_GPIO6_WLMAC_DBG_GPIO6_8822B		{HALMAC_WLMAC_DBG, HALMAC_GPIO6, HALMAC_GPIO_OUT, 0x40, BIT(1) | BIT(0), BIT(0)}
+#define HALMAC_GPIO6_WLPHY_DBG_GPIO6_8822B		{HALMAC_WLPHY_DBG, HALMAC_GPIO6, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), BIT(1)}
+#define HALMAC_GPIO6_BT_DBG_GPIO6_8822B			{HALMAC_BT_DBG, HALMAC_GPIO6, HALMAC_GPIO_OUT, 0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
+#define HALMAC_GPIO6_SW_IO_8822B				{HALMAC_SW_IO, HALMAC_GPIO6, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), 0}
+
+/* GPIO7 definition */
+#define HALMAC_GPIO7_BT_SPI_D3_8822B			{HALMAC_BT_SFLASH, HALMAC_GPIO7, HALMAC_GPIO_IN_OUT, 0x66, BIT(4), BIT(4)}
+#define HALMAC_GPIO7_WL_SPI_D3_8822B			{HALMAC_WL_SFLASH, HALMAC_GPIO7, HALMAC_GPIO_IN_OUT, 0x42, BIT(3), BIT(3)}
+#define HALMAC_GPIO7_EEDI_8822B					{HALMAC_EEPROM, HALMAC_GPIO7, HALMAC_GPIO_OUT, 0x40, BIT(4), BIT(4)}
+#define HALMAC_GPIO7_JTAG_TMS_8822B				{HALMAC_JTAG, HALMAC_GPIO7, HALMAC_GPIO_IN, 0x67, BIT(0), BIT(0)}
+#define HALMAC_GPIO7_BT_GPIO16_8822B			{HALMAC_BT_GPIO, HALMAC_GPIO7, HALMAC_GPIO_IN_OUT, 0x67, BIT(2), BIT(2)}
+#define HALMAC_GPIO7_SOUT_8822B					{HALMAC_WL_UART, HALMAC_GPIO7, HALMAC_GPIO_OUT, 0x41, BIT(0), BIT(0)}
+#define HALMAC_GPIO7_WLMAC_DBG_GPIO7_8822B		{HALMAC_WLMAC_DBG, HALMAC_GPIO7, HALMAC_GPIO_OUT, 0x40, BIT(1) | BIT(0), BIT(0)}
+#define HALMAC_GPIO7_WLPHY_DBG_GPIO7_8822B		{HALMAC_WLPHY_DBG, HALMAC_GPIO7, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), BIT(1)}
+#define HALMAC_GPIO7_BT_DBG_GPIO7_8822B			{HALMAC_BT_DBG, HALMAC_GPIO7, HALMAC_GPIO_OUT, 0x40, BIT(1) | BIT(0), BIT(0) | BIT(1)}
+#define HALMAC_GPIO7_SW_IO_8822B				{HALMAC_SW_IO, HALMAC_GPIO7, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), 0}
+
+/* GPIO8 definition */
+#define HALMAC_GPIO8_WL_EXT_WOL_8822B			{HALMAC_WL_HW_EXTWOL, HALMAC_GPIO8, HALMAC_GPIO_IN, 0x4a, BIT(0) | BIT(1), BIT(0) | BIT(1)}
+#define HALMAC_GPIO8_WL_LED						{HALMAC_WL_LED, HALMAC_GPIO8, HALMAC_GPIO_OUT, 0x4e, BIT(5), BIT(5)}
+#define HALMAC_GPIO8_SW_IO_8822B				{HALMAC_SW_IO, HALMAC_GPIO8, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), 0}
+
+/* GPIO9 definition */
+#define HALMAC_GPIO9_DIS_WL_N_8822B				{HALMAC_WL_HWPDN, HALMAC_GPIO9, HALMAC_GPIO_IN, 0x68, BIT(3) | BIT(0), BIT(3) | BIT(0)}
+#define HALMAC_GPIO9_WL_EXT_WOL_8822B			{HALMAC_WL_HW_EXTWOL, HALMAC_GPIO9, HALMAC_GPIO_IN, 0x4a, BIT(0) | BIT(1), BIT(0)}
+#define HALMAC_GPIO9_USCTS0_8822B				{HALMAC_UART0, HALMAC_GPIO9, HALMAC_GPIO_IN, 0x66, BIT(6), BIT(6)}
+#define HALMAC_GPIO9_SW_IO_8822B				{HALMAC_SW_IO, HALMAC_GPIO9, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), 0}
+
+/* GPIO10 definition */
+#define HALMAC_GPIO10_SW_IO_8822B				{HALMAC_SW_IO, HALMAC_GPIO10, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), 0}
+
+/* GPIO11 definition */
+#define HALMAC_GPIO11_DIS_BT_N_8822B			{HALMAC_BT_HWPDN, HALMAC_GPIO11, HALMAC_GPIO_IN, 0x6a, BIT(0), BIT(0)}
+#define HALMAC_GPIO11_USOUT0_8822B				{HALMAC_UART0, HALMAC_GPIO11, HALMAC_GPIO_OUT, 0x66, BIT(6), BIT(6)}
+#define HALMAC_GPIO11_SW_IO_8822B				{HALMAC_SW_IO, HALMAC_GPIO11, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), 0}
+
+/* GPIO12 definition */
+#define HALMAC_GPIO12_USIN0_8822B				{HALMAC_UART0, HALMAC_GPIO12, HALMAC_GPIO_IN, 0x66, BIT(6), BIT(6)}
+#define HALMAC_GPIO12_SW_IO_8822B				{HALMAC_SW_IO, HALMAC_GPIO12, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), 0}
+
+/* GPIO13 definition */
+#define HALMAC_GPIO13_BT_WAKE_8822B				{HALMAC_GPIO13_14_WL_CTRL_EN, HALMAC_GPIO13, HALMAC_GPIO_IN, 0x4e, BIT(6), BIT(6)}
+#define HALMAC_GPIO13_SW_IO_8822B				{HALMAC_SW_IO, HALMAC_GPIO13, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), 0}
+
+/* GPIO14 definition */
+#define HALMAC_GPIO14_UART_WAKE_8822B			{HALMAC_GPIO13_14_WL_CTRL_EN, HALMAC_GPIO14, HALMAC_GPIO_OUT, 0x4e, BIT(6), BIT(6)}
+#define HALMAC_GPIO14_SW_IO_8822B				{HALMAC_SW_IO, HALMAC_GPIO14, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), 0}
+
+/* GPIO15 definition */
+#define HALMAC_GPIO15_EXT_XTAL_8822B			{HALMAC_EXT_XTAL, HALMAC_GPIO15, HALMAC_GPIO_OUT, 0x66, BIT(7), BIT(7)}
+#define HALMAC_GPIO15_SW_IO_8822B				{HALMAC_SW_IO, HALMAC_GPIO15, HALMAC_GPIO_IN_OUT, 0x40, BIT(1) | BIT(0), 0}
+
+HALMAC_RET_STATUS
+halmac_pinmux_get_func_8822b(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN HALMAC_GPIO_FUNC gpio_func,
+	OUT u8 *pEnable
+);
+
+HALMAC_RET_STATUS
+halmac_pinmux_set_func_8822b(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN HALMAC_GPIO_FUNC gpio_func
+);
+
+HALMAC_RET_STATUS
+halmac_pinmux_free_func_8822b(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN HALMAC_GPIO_FUNC gpio_func
+);
+
+#endif /* HALMAC_8822B_SUPPORT */
+
+#endif/* _HALMAC_GPIO_8822B_H_ */
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_88xx_cfg.h b/rtl8822BU/hal/halmac/halmac_88xx/halmac_88xx_cfg.h
index 99944df..50a4a5a 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_88xx_cfg.h
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_88xx_cfg.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_88XX_CFG_H_
 #define _HALMAC_88XX_CFG_H_
 
@@ -22,19 +37,21 @@
 
 #define HALMAC_SVN_VER_88XX "13359M"
 
-/* major version, ver_1 for async_api */
-#define HALMAC_MAJOR_VER_88XX        0x0001
-/* For halmac_api num change or prototype change, increment prototype version */
-#define HALMAC_PROTOTYPE_VER_88XX    0x0003
-/* else increment minor version */
-#define HALMAC_MINOR_VER_88XX        0x0002
-
-
+#define HALMAC_MAJOR_VER_88XX        0x0001 /* major version, ver_1 for async_api */
+#define HALMAC_PROTOTYPE_VER_88XX    0x0003 /* For halmac_api num change or prototype change, increment prototype version */
+#define HALMAC_MINOR_VER_88XX        0x0009 /* else increment minor version */
+#define HALMAC_PATCH_VER_88XX        0x0001 /* patch version */
 
 #define HALMAC_C2H_DATA_OFFSET_88XX             10
 #define HALMAC_RX_AGG_ALIGNMENT_SIZE_88XX       8
 #define HALMAC_TX_AGG_ALIGNMENT_SIZE_88XX       8
 #define HALMAC_TX_AGG_BUFF_SIZE_88XX            32768
+#define HALMAC_RX_DESC_DUMMY_SIZE_MAX_88XX      80 /*8*10 Bytes*/
+#define HALMAC_RX_FIFO_EXPANDING_MODE_PKT_SIZE_MAX_88XX    80 /* should be 8 Byte alignment*/
+
+#define HALMAC_TX_PAGE_SIZE_88XX			128 /* PageSize 128Byte */
+#define HALMAC_TX_PAGE_SIZE_2_POWER_88XX	7   /* 128 = 2^7 */
+#define HALMAC_RX_BUF_FW_88XX				12288 /* 12K */
 
 #define HALMAC_EXTRA_INFO_BUFF_SIZE_88XX				4096 /*4K*/
 #define HALMAC_EXTRA_INFO_BUFF_SIZE_FULL_FIFO_88XX		16384 /*16K*/
@@ -54,11 +71,17 @@
 #define HALMAC_FW_CFG_MAX_DL_SIZE_MAX_88XX      0x7C00
 
 #define DLFW_RESTORE_REG_NUM_88XX       9
+#define ID_INFORM_DLEMEM_RDY		0x80
 
 /* FW header information */
-#define HALMAC_FWHDR_OFFSET_VERSION_88XX                4
-#define HALMAC_FWHDR_OFFSET_SUBVERSION_88XX             6
-#define HALMAC_FWHDR_OFFSET_SUBINDEX_88XX               7
+#define HALMAC_FWHDR_OFFSET_VERSION_88XX				4
+#define HALMAC_FWHDR_OFFSET_SUBVERSION_88XX				6
+#define HALMAC_FWHDR_OFFSET_SUBINDEX_88XX				7
+#define HALMAC_FWHDR_OFFSET_MONTH_88XX					16
+#define HALMAC_FWHDR_OFFSET_DATE_88XX					17
+#define HALMAC_FWHDR_OFFSET_HOUR_88XX					18
+#define HALMAC_FWHDR_OFFSET_MIN_88XX					19
+#define HALMAC_FWHDR_OFFSET_YEAR_88XX					20
 #define HALMAC_FWHDR_OFFSET_MEM_USAGE_88XX              24
 #define HALMAC_FWHDR_OFFSET_H2C_FORMAT_VER_88XX			28
 #define HALMAC_FWHDR_OFFSET_DMEM_ADDR_88XX              32
@@ -74,7 +97,8 @@
 #define HALMAC_OCPBASE_IMEM_88XX                0x00000000
 
 /* define the SDIO Bus CLK threshold, for avoiding CMD53 fails that result from SDIO CLK sync to ana_clk fail */
-#define HALMAC_SD_CLK_THRESHOLD_88XX    150000000 /* 150MHz */
+#define HALMAC_SDIO_CLK_THRESHOLD_88XX		150 /* 150MHz */
+#define HALMAC_SDIO_CLOCK_SPEED_MAX_88XX	208 /* 208MHz */
 
 /* MAC clock */
 #define HALMAC_MAC_CLOCK_88XX   80 /* 80M */
@@ -148,4 +172,18 @@
 /* CCK rate ACK timeout */
 #define HALMAC_ACK_TO_CCK_88XX    0x40
 
+/* RX pkt max size */
+#define HALMAC_RXPKT_MAX_SIZE			12288 /* 12K */
+#define HALMAC_RXPKT_MAX_SIZE_BASE512	(HALMAC_RXPKT_MAX_SIZE >> 9)
+
+/* OQT entry */
+#define HALMAC_OQT_ENTRY_AC_88XX		32
+#define HALMAC_OQT_ENTRY_NOAC_88XX		32
+
+/* MACID number */
+#define HALMAC_MACID_MAX_88XX		127
+
+#define HALMAC_PCIE_GEN1_SPEED_88XX		0x01
+#define HALMAC_PCIE_GEN2_SPEED_88XX		0x02
+
 #endif
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx.c b/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx.c
index 6ca8232..fa00c0c 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx.c
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx.c
@@ -1,4 +1,20 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #include "halmac_88xx_cfg.h"
+#include "halmac_gpio_88xx.h"
 
 /**
  * halmac_init_adapter_para_88xx() - int halmac adapter
@@ -14,7 +30,6 @@ halmac_init_adapter_para_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter
 )
 {
-	pHalmac_adapter->api_record.array_wptr = 0;
 	pHalmac_adapter->pHalAdapter_backup = pHalmac_adapter;
 	pHalmac_adapter->pHalEfuse_map = (u8 *)NULL;
 	pHalmac_adapter->hal_efuse_map_valid = _FALSE;
@@ -31,26 +46,6 @@ halmac_init_adapter_para_88xx(
 	pHalmac_adapter->low_clk = _FALSE;
 	pHalmac_adapter->max_download_size = HALMAC_FW_MAX_DL_SIZE_88XX;
 
-	/* Init LPS Option */
-	pHalmac_adapter->fwlps_option.mode = 0x01; /*0:Active 1:LPS 2:WMMPS*/
-	pHalmac_adapter->fwlps_option.awake_interval = 1;
-	pHalmac_adapter->fwlps_option.enter_32K = 1;
-	pHalmac_adapter->fwlps_option.clk_request = 0;
-	pHalmac_adapter->fwlps_option.rlbm = 0;
-	pHalmac_adapter->fwlps_option.smart_ps = 0;
-	pHalmac_adapter->fwlps_option.awake_interval = 1;
-	pHalmac_adapter->fwlps_option.all_queue_uapsd = 0;
-	pHalmac_adapter->fwlps_option.pwr_state = 0;
-	pHalmac_adapter->fwlps_option.low_pwr_rx_beacon = 0;
-	pHalmac_adapter->fwlps_option.ant_auto_switch = 0;
-	pHalmac_adapter->fwlps_option.ps_allow_bt_high_Priority = 0;
-	pHalmac_adapter->fwlps_option.protect_bcn = 0;
-	pHalmac_adapter->fwlps_option.silence_period = 0;
-	pHalmac_adapter->fwlps_option.fast_bt_connect = 0;
-	pHalmac_adapter->fwlps_option.two_antenna_en = 0;
-	pHalmac_adapter->fwlps_option.adopt_user_Setting = 1;
-	pHalmac_adapter->fwlps_option.drv_bcn_early_shift = 0;
-
 	pHalmac_adapter->config_para_info.pCfg_para_buf = NULL;
 	pHalmac_adapter->config_para_info.pPara_buf_w = NULL;
 	pHalmac_adapter->config_para_info.para_num = 0;
@@ -71,8 +66,6 @@ halmac_init_adapter_para_88xx(
 
 	pHalmac_adapter->drv_info_size = 0;
 
-	PLATFORM_RTL_MEMSET(pHalmac_adapter->pDriver_adapter, pHalmac_adapter->api_record.api_array, HALMAC_API_STUFF, sizeof(pHalmac_adapter->api_record.api_array));
-
 	pHalmac_adapter->txff_allocation.tx_fifo_pg_num = 0;
 	pHalmac_adapter->txff_allocation.ac_q_pg_num = 0;
 	pHalmac_adapter->txff_allocation.rsvd_pg_bndy = 0;
@@ -88,11 +81,38 @@ halmac_init_adapter_para_88xx(
 	pHalmac_adapter->txff_allocation.extra_queue_pg_num = 0;
 
 	pHalmac_adapter->txff_allocation.la_mode = HALMAC_LA_MODE_DISABLE;
-    pHalmac_adapter->txff_allocation.rx_fifo_expanding_mode = HALMAC_RX_FIFO_EXPANDING_MODE_DISABLE;
+	pHalmac_adapter->txff_allocation.rx_fifo_expanding_mode = HALMAC_RX_FIFO_EXPANDING_MODE_DISABLE;
+
+	pHalmac_adapter->hw_config_info.ac_oqt_size = HALMAC_OQT_ENTRY_AC_88XX;
+	pHalmac_adapter->hw_config_info.non_ac_oqt_size = HALMAC_OQT_ENTRY_NOAC_88XX;
+	pHalmac_adapter->hw_config_info.ac_queue_num = 8;
+
+	pHalmac_adapter->sdio_cmd53_4byte = HALMAC_SDIO_CMD53_4BYTE_MODE_DISABLE;
+	pHalmac_adapter->sdio_hw_info.io_hi_speed_flag = 0;
+	pHalmac_adapter->sdio_hw_info.spec_ver = HALMAC_SDIO_SPEC_VER_2_00;
+	pHalmac_adapter->sdio_hw_info.clock_speed = 50;
+
+	pHalmac_adapter->pinmux_info.wl_led = 0;
+	pHalmac_adapter->pinmux_info.sdio_int = 0;
+	pHalmac_adapter->pinmux_info.sw_io_0 = 0;
+	pHalmac_adapter->pinmux_info.sw_io_1 = 0;
+	pHalmac_adapter->pinmux_info.sw_io_2 = 0;
+	pHalmac_adapter->pinmux_info.sw_io_3 = 0;
+	pHalmac_adapter->pinmux_info.sw_io_4 = 0;
+	pHalmac_adapter->pinmux_info.sw_io_5 = 0;
+	pHalmac_adapter->pinmux_info.sw_io_6 = 0;
+	pHalmac_adapter->pinmux_info.sw_io_7 = 0;
+	pHalmac_adapter->pinmux_info.sw_io_8 = 0;
+	pHalmac_adapter->pinmux_info.sw_io_9 = 0;
+	pHalmac_adapter->pinmux_info.sw_io_10 = 0;
+	pHalmac_adapter->pinmux_info.sw_io_11 = 0;
+	pHalmac_adapter->pinmux_info.sw_io_12 = 0;
+	pHalmac_adapter->pinmux_info.sw_io_13 = 0;
+	pHalmac_adapter->pinmux_info.sw_io_14 = 0;
+	pHalmac_adapter->pinmux_info.sw_io_15 = 0;
 
 	halmac_init_adapter_dynamic_para_88xx(pHalmac_adapter);
 	halmac_init_state_machine_88xx(pHalmac_adapter);
-
 }
 
 /**
@@ -128,40 +148,16 @@ halmac_init_state_machine_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter
 )
 {
-	PHALMAC_STATE pState = &(pHalmac_adapter->halmac_state);
+	PHALMAC_STATE pState = &pHalmac_adapter->halmac_state;
 
-	pState->efuse_state_set.efuse_cmd_construct_state = HALMAC_EFUSE_CMD_CONSTRUCT_IDLE;
-	pState->efuse_state_set.process_status = HALMAC_CMD_PROCESS_IDLE;
-	pState->efuse_state_set.seq_num = pHalmac_adapter->h2c_packet_seq;
-
-	pState->cfg_para_state_set.cfg_para_cmd_construct_state = HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE;
-	pState->cfg_para_state_set.process_status = HALMAC_CMD_PROCESS_IDLE;
-	pState->cfg_para_state_set.seq_num = pHalmac_adapter->h2c_packet_seq;
-
-	pState->scan_state_set.scan_cmd_construct_state = HALMAC_SCAN_CMD_CONSTRUCT_IDLE;
-	pState->scan_state_set.process_status = HALMAC_CMD_PROCESS_IDLE;
-	pState->scan_state_set.seq_num = pHalmac_adapter->h2c_packet_seq;
-
-	pState->update_packet_set.process_status = HALMAC_CMD_PROCESS_IDLE;
-	pState->update_packet_set.seq_num = pHalmac_adapter->h2c_packet_seq;
-
-	pState->iqk_set.process_status = HALMAC_CMD_PROCESS_IDLE;
-	pState->iqk_set.seq_num = pHalmac_adapter->h2c_packet_seq;
-
-	pState->power_tracking_set.process_status = HALMAC_CMD_PROCESS_IDLE;
-	pState->power_tracking_set.seq_num = pHalmac_adapter->h2c_packet_seq;
-
-	pState->psd_set.process_status = HALMAC_CMD_PROCESS_IDLE;
-	pState->psd_set.seq_num = pHalmac_adapter->h2c_packet_seq;
-	pState->psd_set.data_size = 0;
-	pState->psd_set.segment_size = 0;
-	pState->psd_set.pData = NULL;
+	halmac_init_offload_feature_state_machine_88xx(pHalmac_adapter);
 
 	pState->api_state = HALMAC_API_STATE_INIT;
 
 	pState->dlfw_state = HALMAC_DLFW_NONE;
 	pState->mac_power = HALMAC_MAC_POWER_OFF;
 	pState->ps_state = HALMAC_PS_STATE_UNDEFINE;
+	pState->gpio_cfg_state = HALMAC_GPIO_CFG_STATE_IDLE;
 }
 
 /**
@@ -182,18 +178,19 @@ halmac_mount_api_88xx(
 	PHALMAC_API pHalmac_api = (PHALMAC_API)NULL;
 
 	pHalmac_adapter->pHalmac_api = (PHALMAC_API)PLATFORM_RTL_MALLOC(pDriver_adapter, sizeof(HALMAC_API));
-	if (NULL == pHalmac_adapter->pHalmac_api)
+	if (pHalmac_adapter->pHalmac_api == NULL)
 		return HALMAC_RET_MALLOC_FAIL;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, HALMAC_SVN_VER_88XX"\n");
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "HALMAC_MAJOR_VER_88XX = %x\n", HALMAC_MAJOR_VER_88XX);
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "HALMAC_PROTOTYPE_88XX = %x\n", HALMAC_PROTOTYPE_VER_88XX);
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "HALMAC_MINOR_VER_88XX = %x\n", HALMAC_MINOR_VER_88XX);
-
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ALWAYS, HALMAC_SVN_VER_88XX"\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ALWAYS, "HALMAC_MAJOR_VER_88XX = %x\n", HALMAC_MAJOR_VER_88XX);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ALWAYS, "HALMAC_PROTOTYPE_88XX = %x\n", HALMAC_PROTOTYPE_VER_88XX);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ALWAYS, "HALMAC_MINOR_VER_88XX = %x\n", HALMAC_MINOR_VER_88XX);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ALWAYS, "HALMAC_PATCH_VER_88XX = %x\n", HALMAC_PATCH_VER_88XX);
 
 	/* Mount function pointer */
 	pHalmac_api->halmac_download_firmware = halmac_download_firmware_88xx;
+	pHalmac_api->halmac_free_download_firmware = halmac_free_download_firmware_88xx;
 	pHalmac_api->halmac_get_fw_version = halmac_get_fw_version_88xx;
 	pHalmac_api->halmac_cfg_mac_addr = halmac_cfg_mac_addr_88xx;
 	pHalmac_api->halmac_cfg_bssid = halmac_cfg_bssid_88xx;
@@ -215,6 +212,8 @@ halmac_mount_api_88xx(
 	pHalmac_api->halmac_dump_efuse_map = halmac_dump_efuse_map_88xx;
 	pHalmac_api->halmac_dump_efuse_map_bt = halmac_dump_efuse_map_bt_88xx;
 	pHalmac_api->halmac_write_efuse_bt = halmac_write_efuse_bt_88xx;
+	pHalmac_api->halmac_read_efuse_bt = halmac_read_efuse_bt_88xx;
+	pHalmac_api->halmac_cfg_efuse_auto_check = halmac_cfg_efuse_auto_check_88xx;
 	pHalmac_api->halmac_dump_logical_efuse_map = halmac_dump_logical_efuse_map_88xx;
 	pHalmac_api->halmac_pg_efuse_by_map = halmac_pg_efuse_by_map_88xx;
 	pHalmac_api->halmac_get_efuse_size = halmac_get_efuse_size_88xx;
@@ -226,12 +225,6 @@ halmac_mount_api_88xx(
 	pHalmac_api->halmac_write_logical_efuse = halmac_write_logical_efuse_88xx;
 	pHalmac_api->halmac_read_logical_efuse = halmac_read_logical_efuse_88xx;
 
-	pHalmac_api->halmac_cfg_fwlps_option = halmac_cfg_fwlps_option_88xx;
-	pHalmac_api->halmac_cfg_fwips_option = halmac_cfg_fwips_option_88xx;
-	pHalmac_api->halmac_enter_wowlan = halmac_enter_wowlan_88xx;
-	pHalmac_api->halmac_leave_wowlan = halmac_leave_wowlan_88xx;
-	pHalmac_api->halmac_enter_ps = halmac_enter_ps_88xx;
-	pHalmac_api->halmac_leave_ps = halmac_leave_ps_88xx;
 	pHalmac_api->halmac_h2c_lb = halmac_h2c_lb_88xx;
 	pHalmac_api->halmac_debug = halmac_debug_88xx;
 	pHalmac_api->halmac_cfg_parameter = halmac_cfg_parameter_88xx;
@@ -258,6 +251,7 @@ halmac_mount_api_88xx(
 	pHalmac_api->halmac_add_ch_info = halmac_add_ch_info_88xx;
 	pHalmac_api->halmac_add_extra_ch_info = halmac_add_extra_ch_info_88xx;
 	pHalmac_api->halmac_ctrl_ch_switch = halmac_ctrl_ch_switch_88xx;
+	pHalmac_api->halmac_p2pps = halmac_p2pps_88xx;
 	pHalmac_api->halmac_clear_ch_info = halmac_clear_ch_info_88xx;
 	pHalmac_api->halmac_send_general_info = halmac_send_general_info_88xx;
 
@@ -265,7 +259,7 @@ halmac_mount_api_88xx(
 	pHalmac_api->halmac_ctrl_pwr_tracking = halmac_ctrl_pwr_tracking_88xx;
 	pHalmac_api->halmac_psd = halmac_psd_88xx;
 	pHalmac_api->halmac_cfg_la_mode = halmac_cfg_la_mode_88xx;
-    pHalmac_api->halmac_cfg_rx_fifo_expanding_mode = halmac_cfg_rx_fifo_expanding_mode_88xx;
+	pHalmac_api->halmac_cfg_rx_fifo_expanding_mode = halmac_cfg_rx_fifo_expanding_mode_88xx;
 
 	pHalmac_api->halmac_config_security = halmac_config_security_88xx;
 	pHalmac_api->halmac_get_used_cam_entry_num = halmac_get_used_cam_entry_num_88xx;
@@ -293,8 +287,21 @@ halmac_mount_api_88xx(
 	pHalmac_api->halmac_cfg_csi_rate = halmac_cfg_csi_rate_88xx;
 
 	pHalmac_api->halmac_sdio_cmd53_4byte = halmac_sdio_cmd53_4byte_88xx;
-
-	if (HALMAC_INTERFACE_SDIO == pHalmac_adapter->halmac_interface) {
+	pHalmac_api->halmac_sdio_hw_info = halmac_sdio_hw_info_88xx;
+	pHalmac_api->halmac_txfifo_is_empty = halmac_txfifo_is_empty_88xx;
+	pHalmac_api->halmac_download_flash = halmac_download_flash_88xx;
+	pHalmac_api->halmac_read_flash = halmac_read_flash_88xx;
+	pHalmac_api->halmac_erase_flash = halmac_erase_flash_88xx;
+	pHalmac_api->halmac_check_flash = halmac_check_flash_88xx;
+	pHalmac_api->halmac_cfg_edca_para = halmac_cfg_edca_para_88xx;
+	pHalmac_api->halmac_pinmux_wl_led_mode = halmac_pinmux_wl_led_mode_88xx;
+	pHalmac_api->halmac_pinmux_wl_led_sw_ctrl = halmac_pinmux_wl_led_sw_ctrl_88xx;
+	pHalmac_api->halmac_pinmux_sdio_int_polarity = halmac_pinmux_sdio_int_polarity_88xx;
+	pHalmac_api->halmac_pinmux_gpio_mode = halmac_pinmux_gpio_mode_88xx;
+	pHalmac_api->halmac_pinmux_gpio_output = halmac_pinmux_gpio_output_88xx;
+	pHalmac_api->halmac_pinmux_pin_status = halmac_pinmux_pin_status_88xx;
+
+	if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_SDIO) {
 		pHalmac_api->halmac_cfg_rx_aggregation = halmac_cfg_rx_aggregation_88xx_sdio;
 		pHalmac_api->halmac_init_interface_cfg = halmac_init_sdio_cfg_88xx;
 		pHalmac_api->halmac_deinit_interface_cfg = halmac_deinit_sdio_cfg_88xx;
@@ -306,7 +313,7 @@ halmac_mount_api_88xx(
 		pHalmac_api->halmac_reg_write_32 = halmac_reg_write_32_sdio_88xx;
 		pHalmac_api->halmac_reg_read_indirect_32 = halmac_reg_read_indirect_32_sdio_88xx;
 		pHalmac_api->halmac_reg_sdio_cmd53_read_n = halmac_reg_read_nbyte_sdio_88xx;
-	} else if (HALMAC_INTERFACE_USB == pHalmac_adapter->halmac_interface) {
+	} else if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_USB) {
 		pHalmac_api->halmac_cfg_rx_aggregation = halmac_cfg_rx_aggregation_88xx_usb;
 		pHalmac_api->halmac_init_interface_cfg = halmac_init_usb_cfg_88xx;
 		pHalmac_api->halmac_deinit_interface_cfg = halmac_deinit_usb_cfg_88xx;
@@ -316,7 +323,7 @@ halmac_mount_api_88xx(
 		pHalmac_api->halmac_reg_write_16 = halmac_reg_write_16_usb_88xx;
 		pHalmac_api->halmac_reg_read_32 = halmac_reg_read_32_usb_88xx;
 		pHalmac_api->halmac_reg_write_32 = halmac_reg_write_32_usb_88xx;
-	} else if (HALMAC_INTERFACE_PCIE == pHalmac_adapter->halmac_interface) {
+	} else if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_PCIE) {
 		pHalmac_api->halmac_cfg_rx_aggregation = halmac_cfg_rx_aggregation_88xx_pcie;
 		pHalmac_api->halmac_init_interface_cfg = halmac_init_pcie_cfg_88xx;
 		pHalmac_api->halmac_deinit_interface_cfg = halmac_deinit_pcie_cfg_88xx;
@@ -337,27 +344,17 @@ halmac_mount_api_88xx(
 	pHalmac_api->halmac_fill_txdesc_checksum = halmac_fill_txdesc_check_sum_88xx;
 
 
-	if (HALMAC_CHIP_ID_8822B == pHalmac_adapter->chip_id) {
+	if (pHalmac_adapter->chip_id == HALMAC_CHIP_ID_8822B) {
 #if HALMAC_8822B_SUPPORT
 		/*mount 8822b function and data*/
 		halmac_mount_api_8822b(pHalmac_adapter);
 #endif
 
-	} else if (HALMAC_CHIP_ID_8821C == pHalmac_adapter->chip_id) {
+	} else if (pHalmac_adapter->chip_id == HALMAC_CHIP_ID_8821C) {
 #if HALMAC_8821C_SUPPORT
 		/*mount 8822b function and data*/
 		halmac_mount_api_8821c(pHalmac_adapter);
 #endif
-	} else if (HALMAC_CHIP_ID_8814B == pHalmac_adapter->chip_id) {
-#if HALMAC_8814B_SUPPORT
-		/*mount 8814b function and data*/
-		halmac_mount_api_8814b(pHalmac_adapter);
-#endif
-	} else if (HALMAC_CHIP_ID_8197F == pHalmac_adapter->chip_id) {
-#if HALMAC_8197F_SUPPORT
-		/*mount 8822b function and data*/
-		halmac_mount_api_8197f(pHalmac_adapter);
-#endif
 	} else {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "Chip ID undefine!!\n");
 		return HALMAC_RET_CHIP_NOT_SUPPORT;
@@ -396,15 +393,11 @@ halmac_mount_api_88xx(
 	pHalmac_api->halmac_get_management_txdesc = halmac_get_management_txdesc_88xx;
 	pHalmac_api->halmac_send_control = halmac_send_control_88xx;
 	pHalmac_api->halmac_send_hiqueue = halmac_send_hiqueue_88xx;
-	pHalmac_api->halmac_media_status_rpt = halmac_media_status_rpt_88xx;
 
 	pHalmac_api->halmac_timer_10ms = halmac_timer_10ms_88xx;
 
 	pHalmac_api->halmac_download_firmware_fpag = halmac_download_firmware_fpga_88xx;
 	pHalmac_api->halmac_download_rom_fpga = halmac_download_rom_fpga_88xx;
-	pHalmac_api->halmac_download_flash = halmac_download_flash_88xx;
-	pHalmac_api->halmac_erase_flash = halmac_erase_flash_88xx;
-	pHalmac_api->halmac_check_flash = halmac_check_flash_88xx;
 	pHalmac_api->halmac_send_nlo = halmac_send_nlo_88xx;
 
 	pHalmac_api->halmac_dump_cam_table = halmac_dump_cam_table_88xx;
@@ -419,6 +412,7 @@ halmac_mount_api_88xx(
 	pHalmac_api->halmac_get_hcpwm2 = halmac_get_hcpwm2_88xx;
 	pHalmac_api->halmac_set_hrpwm = halmac_set_hrpwm_88xx;
 	pHalmac_api->halmac_set_hrpwm2 = halmac_set_hrpwm2_88xx;
+	pHalmac_api->halmac_coex_cfg = halmac_coex_cfg_88xx;
 #if HALMAC_8822B_SUPPORT
 	if (pHalmac_adapter->chip_id == HALMAC_CHIP_ID_8822B)
 		pHalmac_api->halmac_run_pwrseq = halmac_run_pwrseq_8822b;
@@ -427,12 +421,7 @@ halmac_mount_api_88xx(
 	if (pHalmac_adapter->chip_id == HALMAC_CHIP_ID_8821C)
 		pHalmac_api->halmac_run_pwrseq = halmac_run_pwrseq_8821c;
 #endif
-#if HALMAC_8197F_SUPPORT
-	if (pHalmac_adapter->chip_id == HALMAC_CHIP_ID_8814B)
-		pHalmac_api->halmac_run_pwrseq = halmac_run_pwrseq_8814b;
-#endif
-
-	if (HALMAC_INTERFACE_SDIO == pHalmac_adapter->halmac_interface) {
+	if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_SDIO) {
 		pHalmac_api->halmac_reg_read_8 = halmac_reg_read_8_sdio_88xx;
 		pHalmac_api->halmac_reg_write_8 = halmac_reg_write_8_sdio_88xx;
 		pHalmac_api->halmac_reg_read_16 = halmac_reg_read_16_sdio_88xx;
@@ -444,14 +433,14 @@ halmac_mount_api_88xx(
 	return HALMAC_RET_SUCCESS;
 }
 
-
 /**
  * halmac_download_firmware_88xx() - download Firmware
- * @pHalmac_adapter
- * @pHamacl_fw : FW bin file
- * @halmac_fw_size
+ * @pHalmac_adapter : the adapter of halmac
+ * @pHamacl_fw : firmware bin
+ * @halmac_fw_size : firmware size
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_download_firmware_88xx(
@@ -464,39 +453,39 @@ halmac_download_firmware_88xx(
 	u8 *pFile_ptr;
 	u16 value16;
 	u32 restore_index = 0;
-	u32 halmac_h2c_ver = 0, fw_h2c_ver = 0;
+	u32 lte_coex_backup = 0;
+	u16 halmac_h2c_ver = 0, fw_h2c_ver = 0;
 	u32 iram_pkt_size, dmem_pkt_size, eram_pkt_size = 0;
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 	HALMAC_RESTORE_INFO restore_info[DLFW_RESTORE_REG_NUM_88XX];
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_DOWNLOAD_FIRMWARE);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_download_firmware_88xx ==========>\n");
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_download_firmware_88xx start!!\n");
 
 	if (halmac_fw_size > HALMAC_FW_SIZE_MAX_88XX || halmac_fw_size < HALMAC_FWHDR_SIZE_88XX) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "FW size error!\n");
 		return HALMAC_RET_FW_SIZE_ERR;
 	}
 
-	fw_h2c_ver = rtk_le32_to_cpu(*((u32 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_H2C_FORMAT_VER_88XX)));
+	fw_h2c_ver = rtk_le16_to_cpu(*((u16 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_H2C_FORMAT_VER_88XX)));
 	halmac_h2c_ver = H2C_FORMAT_VERSION;
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac h2c/c2h format = %x, fw h2c/c2h format = %x!!\n", halmac_h2c_ver, fw_h2c_ver);
 	if (fw_h2c_ver != halmac_h2c_ver)
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_WARN, "H2C/C2H version mismatch between HALMAC and FW, Offload Feature May fail!\n");
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_WARN, "[WARN]H2C/C2H version between HALMAC and FW is compatible!!\n");
 
 	pHalmac_adapter->halmac_state.dlfw_state = HALMAC_DLFW_NONE;
 
+	halmac_ltecoex_reg_read_88xx(pHalmac_adapter, 0x38, &lte_coex_backup);
+
 	value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_SYS_FUNC_EN + 1);
 	value8 = (u8)(value8 & ~(BIT(2)));
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SYS_FUNC_EN + 1, value8); /* Disable CPU reset */
@@ -538,14 +527,10 @@ halmac_download_firmware_88xx(
 	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_INFO_1, 0x200);
 	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_RQPN_CTRL_2, restore_info[restore_index - 1].value);
 
-	if (HALMAC_INTERFACE_SDIO == pHalmac_adapter->halmac_interface) {
+	if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_SDIO)
 		HALMAC_REG_READ_32(pHalmac_adapter, REG_SDIO_FREE_TXPG);
-		HALMAC_REG_WRITE_32(pHalmac_adapter, REG_SDIO_TX_CTRL, 0x00000000);
-	}
 
-	pHalmac_adapter->fw_version.version = rtk_le16_to_cpu(*((u16 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_VERSION_88XX)));
-	pHalmac_adapter->fw_version.sub_version = *(pHamacl_fw + HALMAC_FWHDR_OFFSET_SUBVERSION_88XX);
-	pHalmac_adapter->fw_version.sub_index = *(pHamacl_fw + HALMAC_FWHDR_OFFSET_SUBINDEX_88XX);
+	halmac_update_fw_info_88xx(pHalmac_adapter, pHamacl_fw, halmac_fw_size);
 
 	dmem_pkt_size = *((u32 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_DMEM_SIZE_88XX));
 	iram_pkt_size = *((u32 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_IRAM_SIZE_88XX));
@@ -558,7 +543,7 @@ halmac_download_firmware_88xx(
 
 	dmem_pkt_size += HALMAC_FW_CHKSUM_DUMMY_SIZE_88XX;
 	iram_pkt_size += HALMAC_FW_CHKSUM_DUMMY_SIZE_88XX;
-	if (0 != eram_pkt_size)
+	if (eram_pkt_size != 0)
 		eram_pkt_size += HALMAC_FW_CHKSUM_DUMMY_SIZE_88XX;
 
 	if (halmac_fw_size != (HALMAC_FWHDR_SIZE_88XX + dmem_pkt_size + iram_pkt_size + eram_pkt_size)) {
@@ -607,35 +592,33 @@ halmac_download_firmware_88xx(
 	value8 |= BIT(0);
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_CPU_DMEM_CON + 2, value8);
 
-	/* Download to DMEM */
 	pFile_ptr = pHamacl_fw + HALMAC_FWHDR_SIZE_88XX;
-	/* if (HALMAC_RET_SUCCESS != halmac_dlfw_to_mem_88xx(pHalmac_adapter, pFile_ptr, HALMAC_OCPBASE_DMEM_88XX, dmem_pkt_size)) */
-	if (HALMAC_RET_SUCCESS != halmac_dlfw_to_mem_88xx(pHalmac_adapter, pFile_ptr,
-		    rtk_le32_to_cpu((*((u32 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_DMEM_ADDR_88XX))) & ~(BIT(31))), dmem_pkt_size))
+	if (halmac_dlfw_to_mem_88xx(pHalmac_adapter, pFile_ptr,
+		    rtk_le32_to_cpu(*((u32 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_DMEM_ADDR_88XX))) & ~(BIT(31)), dmem_pkt_size) != HALMAC_RET_SUCCESS)
 		goto DLFW_END;
 
-	/* Download to IMEM */
 	pFile_ptr = pHamacl_fw + HALMAC_FWHDR_SIZE_88XX + dmem_pkt_size;
-	/* if (HALMAC_RET_SUCCESS != halmac_dlfw_to_mem_88xx(pHalmac_adapter, pFile_ptr, HALMAC_OCPBASE_IMEM_88XX, iram_pkt_size)) */
-	if (HALMAC_RET_SUCCESS != halmac_dlfw_to_mem_88xx(pHalmac_adapter, pFile_ptr,
-		    rtk_le32_to_cpu((*((u32 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_IRAM_ADDR_88XX))) & ~(BIT(31))), iram_pkt_size))
+	if (halmac_dlfw_to_mem_88xx(pHalmac_adapter, pFile_ptr,
+		    rtk_le32_to_cpu(*((u32 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_IRAM_ADDR_88XX))) & ~(BIT(31)), iram_pkt_size) != HALMAC_RET_SUCCESS)
 		goto DLFW_END;
 
-	/* Download to EMEM */
-	if (0 != eram_pkt_size) {
+	if (eram_pkt_size != 0) {
 		pFile_ptr = pHamacl_fw + HALMAC_FWHDR_SIZE_88XX + dmem_pkt_size + iram_pkt_size;
-		if (HALMAC_RET_SUCCESS != halmac_dlfw_to_mem_88xx(pHalmac_adapter, pFile_ptr,
-			    rtk_le32_to_cpu((*((u32 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_EMEM_ADDR_88XX))) & ~(BIT(31))), eram_pkt_size))
+		if (halmac_dlfw_to_mem_88xx(pHalmac_adapter, pFile_ptr,
+			    rtk_le32_to_cpu(*((u32 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_EMEM_ADDR_88XX))) & ~(BIT(31)), eram_pkt_size) != HALMAC_RET_SUCCESS)
 			goto DLFW_END;
 	}
 
+	halmac_init_offload_feature_state_machine_88xx(pHalmac_adapter);
 DLFW_END:
 
 	halmac_restore_mac_register_88xx(pHalmac_adapter, restore_info, DLFW_RESTORE_REG_NUM_88XX);
 
-	if (HALMAC_RET_SUCCESS != halmac_dlfw_end_flow_88xx(pHalmac_adapter))
+	if (halmac_dlfw_end_flow_88xx(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		goto DLFW_FAIL;
 
+	halmac_ltecoex_reg_write_88xx(pHalmac_adapter, 0x38, lte_coex_backup);
+
 	pHalmac_adapter->halmac_state.dlfw_state = HALMAC_DLFW_DONE;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_download_firmware_88xx <==========\n");
@@ -646,16 +629,106 @@ DLFW_FAIL:
 
 	/* Disable FWDL_EN */
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MCUFW_CTRL, (u8)(HALMAC_REG_READ_8(pHalmac_adapter, REG_MCUFW_CTRL) & ~(BIT(0))));
+	halmac_ltecoex_reg_write_88xx(pHalmac_adapter, 0x38, lte_coex_backup);
 
 	return HALMAC_RET_DLFW_FAIL;
 }
 
 /**
- * halmac_get_fw_version_88xx() - get FW version
+ * halmac_free_download_firmware_88xx() - download specific memory firmware
  * @pHalmac_adapter
- * @pFw_version
+ * @dlfw_mem : memory selection
+ * @pHamacl_fw : firmware bin
+ * @halmac_fw_size : firmware size
+ * Author : KaiYuan Chang/Ivan Lin
+ * Return : HALMAC_RET_STATUS
+ */
+HALMAC_RET_STATUS
+halmac_free_download_firmware_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN HALMAC_DLFW_MEM dlfw_mem,
+	IN u8 *pHamacl_fw,
+	IN u32 halmac_fw_size
+)
+{
+	u8 tx_pause_backup;
+	u8 *pFile_ptr;
+	u16 bcn_head_backup;
+	u32 iram_pkt_size, dmem_pkt_size, eram_pkt_size = 0;
+	VOID *pDriver_adapter = NULL;
+	HALMAC_RET_STATUS status = HALMAC_RET_DLFW_FAIL;
+	PHALMAC_API pHalmac_api;
+
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_ADAPTER_INVALID;
+
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_API_INVALID;
+
+	if (halmac_fw_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_NO_DLFW;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]halmac_free_download_firmware_88xx ==========>\n");
+
+	if (halmac_fw_size > HALMAC_FW_SIZE_MAX_88XX || halmac_fw_size < HALMAC_FWHDR_SIZE_88XX) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[ERR]FW size error!\n");
+		return HALMAC_RET_FW_SIZE_ERR;
+	}
+
+	dmem_pkt_size = *((u32 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_DMEM_SIZE_88XX));
+	iram_pkt_size = *((u32 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_IRAM_SIZE_88XX));
+	if (0 != ((*(pHamacl_fw + HALMAC_FWHDR_OFFSET_MEM_USAGE_88XX)) & BIT(4)))
+		eram_pkt_size = *((u32 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_ERAM_SIZE_88XX));
+
+	dmem_pkt_size = rtk_le32_to_cpu(dmem_pkt_size);
+	iram_pkt_size = rtk_le32_to_cpu(iram_pkt_size);
+	eram_pkt_size = rtk_le32_to_cpu(eram_pkt_size);
+
+	dmem_pkt_size += HALMAC_FW_CHKSUM_DUMMY_SIZE_88XX;
+	iram_pkt_size += HALMAC_FW_CHKSUM_DUMMY_SIZE_88XX;
+	if (eram_pkt_size != 0)
+		eram_pkt_size += HALMAC_FW_CHKSUM_DUMMY_SIZE_88XX;
+
+	if (halmac_fw_size != (HALMAC_FWHDR_SIZE_88XX + dmem_pkt_size + iram_pkt_size + eram_pkt_size)) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[ERR]FW size mismatch the real fw size!\n");
+		return HALMAC_RET_DLFW_FAIL;
+	}
+
+	tx_pause_backup = HALMAC_REG_READ_8(pHalmac_adapter, REG_TXPAUSE);
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_TXPAUSE, tx_pause_backup | BIT(7));
+
+	bcn_head_backup = HALMAC_REG_READ_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2) | BIT(15);
+	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, 0x8000);
+
+	if (eram_pkt_size != 0) {
+		pFile_ptr = pHamacl_fw + HALMAC_FWHDR_SIZE_88XX + dmem_pkt_size + iram_pkt_size;
+		status = halmac_dlfw_to_mem_88xx(pHalmac_adapter, pFile_ptr,
+					rtk_le32_to_cpu(*((u32 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_EMEM_ADDR_88XX))) & ~(BIT(31)), eram_pkt_size);
+		if (status != HALMAC_RET_SUCCESS)
+			goto DL_FREE_FW_END;
+	}
+
+	status = halmac_free_dl_fw_end_flow_88xx(pHalmac_adapter);
+
+DL_FREE_FW_END:
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_TXPAUSE, tx_pause_backup);
+	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, bcn_head_backup);
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]halmac_free_download_firmware_88xx <==========\n");
+
+	return status;
+}
+
+/**
+ * halmac_get_fw_version_88xx() - get FW version
+ * @pHalmac_adapter : the adapter of halmac
+ * @pFw_version : fw version info
  * Author : Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_get_fw_version_88xx(
@@ -663,27 +736,38 @@ halmac_get_fw_version_88xx(
 	OUT PHALMAC_FW_VERSION	pFw_version
 )
 {
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	PHALMAC_FW_VERSION pFw_info = &pHalmac_adapter->fw_version;
+
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (0 == pHalmac_adapter->halmac_state.dlfw_state) {
-		return HALMAC_RET_DLFW_FAIL;
-	} else {
-		pFw_version->version = pHalmac_adapter->fw_version.version;
-		pFw_version->sub_version = pHalmac_adapter->fw_version.sub_version;
-		pFw_version->sub_index = pHalmac_adapter->fw_version.sub_index;
-	}
+	if (pFw_version == NULL)
+		return HALMAC_RET_NULL_POINTER;
+
+	if (pHalmac_adapter->halmac_state.dlfw_state == HALMAC_DLFW_NONE)
+		return HALMAC_RET_NO_DLFW;
+
+	pFw_version->version = pFw_info->version;
+	pFw_version->sub_version = pFw_info->sub_version;
+	pFw_version->sub_index = pFw_info->sub_index;
+	pFw_version->h2c_version = pFw_info->h2c_version;
+	pFw_version->build_time.month = pFw_info->build_time.month;
+	pFw_version->build_time.date = pFw_info->build_time.date;
+	pFw_version->build_time.hour = pFw_info->build_time.hour;
+	pFw_version->build_time.min = pFw_info->build_time.min;
+	pFw_version->build_time.year = pFw_info->build_time.year;
 
 	return HALMAC_RET_SUCCESS;
 }
 
 /**
- * halmac_cfg_mac_addr_88xx() - config Mac Address
- * @pHalmac_adapter
- * @halmac_port : 0 : port0 1 : port1
+ * halmac_cfg_mac_addr_88xx() - config mac address
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_port : 0 for port0, 1 for port1, 2 for port2, 3 for port3, 4 for port4
  * @pHal_address : mac address
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_mac_addr_88xx(
@@ -697,21 +781,19 @@ halmac_cfg_mac_addr_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_MAC_ADDR);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_cfg_mac_addr_88xx ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]halmac_cfg_mac_addr_88xx ==========>\n");
 
-	if (halmac_port > 2) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "port index > 2\n");
+	if (halmac_port >= HALMAC_PORTIDMAX) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[ERR]port index > 5\n");
 		return HALMAC_RET_PORT_NOT_SUPPORT;
 	}
 
@@ -724,26 +806,49 @@ halmac_cfg_mac_addr_88xx(
 	pHalmac_adapter->pHal_mac_addr[halmac_port].Address_L_H.Address_Low = mac_address_L;
 	pHalmac_adapter->pHal_mac_addr[halmac_port].Address_L_H.Address_High = mac_address_H;
 
-	if (0 == halmac_port) {
+	switch (halmac_port) {
+	case HALMAC_PORTID0:
 		HALMAC_REG_WRITE_32(pHalmac_adapter, REG_MACID, mac_address_L);
 		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_MACID + 4, mac_address_H);
-	} else {
+		break;
+
+	case HALMAC_PORTID1:
 		HALMAC_REG_WRITE_32(pHalmac_adapter, REG_MACID1, mac_address_L);
 		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_MACID1 + 4, mac_address_H);
+		break;
+
+	case HALMAC_PORTID2:
+		HALMAC_REG_WRITE_32(pHalmac_adapter, REG_MACID2, mac_address_L);
+		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_MACID2 + 4, mac_address_H);
+		break;
+
+	case HALMAC_PORTID3:
+		HALMAC_REG_WRITE_32(pHalmac_adapter, REG_MACID3, mac_address_L);
+		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_MACID3 + 4, mac_address_H);
+		break;
+
+	case HALMAC_PORTID4:
+		HALMAC_REG_WRITE_32(pHalmac_adapter, REG_MACID4, mac_address_L);
+		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_MACID4 + 4, mac_address_H);
+		break;
+
+	default:
+		break;
 	}
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_cfg_mac_addr_88xx <==========\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]halmac_cfg_mac_addr_88xx <==========\n");
 
 	return HALMAC_RET_SUCCESS;
 }
 
 /**
  * halmac_cfg_bssid_88xx() - config BSSID
- * @pHalmac_adapter
- * @halmac_port : 0 : port0 1 : port1
- * @pHal_address : mac address
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_port : 0 for port0, 1 for port1, 2 for port2, 3 for port3, 4 for port4
+ * @pHal_address : bssid
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_bssid_88xx(
@@ -757,21 +862,19 @@ halmac_cfg_bssid_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_BSSID);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_cfg_bssid_88xx ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]halmac_cfg_bssid_88xx ==========>\n");
 
-	if (halmac_port > 2) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "port index > 2\n");
+	if (halmac_port >= HALMAC_PORTIDMAX) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[ERR]port index > 5\n");
 		return HALMAC_RET_PORT_NOT_SUPPORT;
 	}
 
@@ -784,25 +887,48 @@ halmac_cfg_bssid_88xx(
 	pHalmac_adapter->pHal_bss_addr[halmac_port].Address_L_H.Address_Low = bssid_address_L;
 	pHalmac_adapter->pHal_bss_addr[halmac_port].Address_L_H.Address_High = bssid_address_H;
 
-	if (0 == halmac_port) {
+	switch (halmac_port) {
+	case HALMAC_PORTID0:
 		HALMAC_REG_WRITE_32(pHalmac_adapter, REG_BSSID, bssid_address_L);
 		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_BSSID + 4, bssid_address_H);
-	} else {
+		break;
+
+	case HALMAC_PORTID1:
 		HALMAC_REG_WRITE_32(pHalmac_adapter, REG_BSSID1, bssid_address_L);
 		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_BSSID1 + 4, bssid_address_H);
+		break;
+
+	case HALMAC_PORTID2:
+		HALMAC_REG_WRITE_32(pHalmac_adapter, REG_BSSID2, bssid_address_L);
+		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_BSSID2 + 4, bssid_address_H);
+		break;
+
+	case HALMAC_PORTID3:
+		HALMAC_REG_WRITE_32(pHalmac_adapter, REG_BSSID3, bssid_address_L);
+		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_BSSID3 + 4, bssid_address_H);
+		break;
+
+	case HALMAC_PORTID4:
+		HALMAC_REG_WRITE_32(pHalmac_adapter, REG_BSSID4, bssid_address_L);
+		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_BSSID4 + 4, bssid_address_H);
+		break;
+
+	default:
+		break;
 	}
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_cfg_bssid_88xx <==========\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]halmac_cfg_bssid_88xx <==========\n");
 
 	return HALMAC_RET_SUCCESS;
 }
 
 /**
  * halmac_cfg_multicast_addr_88xx() - config multicast address
- * @pHalmac_adapter
- * @pHal_address : mac address
+ * @pHalmac_adapter : the adapter of halmac
+ * @pHal_address : multicast address
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_multicast_addr_88xx(
@@ -815,14 +941,12 @@ halmac_cfg_multicast_addr_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_MULTICAST_ADDR);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -843,34 +967,51 @@ halmac_cfg_multicast_addr_88xx(
 }
 
 /**
- * halmac_pre_init_system_cfg_88xx() - config system register before power on
- * @pHalmac_adapter
+ * halmac_pre_init_system_cfg_88xx() - pre-init system config
+ * @pHalmac_adapter : the adapter of halmac
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_pre_init_system_cfg_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter
 )
 {
-	u32 value32;
+	u32 value32, counter;
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 	u8 enable_bb;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_PRE_INIT_SYSTEM_CFG);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_pre_init_system_cfg ==========>\n");
 
+	if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_SDIO) {
+		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SDIO_HSUS_CTRL, HALMAC_REG_READ_8(pHalmac_adapter, REG_SDIO_HSUS_CTRL) & ~(BIT(0)));
+		counter = 10000;
+		while (!(HALMAC_REG_READ_8(pHalmac_adapter, REG_SDIO_HSUS_CTRL) & 0x02)) {
+			counter--;
+			if (counter == 0)
+				return HALMAC_RET_SDIO_LEAVE_SUSPEND_FAIL;
+		}
+
+		if (pHalmac_adapter->sdio_hw_info.spec_ver == HALMAC_SDIO_SPEC_VER_3_00)
+			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_HCI_OPT_CTRL + 2, HALMAC_REG_READ_8(pHalmac_adapter, REG_HCI_OPT_CTRL + 2) | BIT(2));
+		else
+			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_HCI_OPT_CTRL + 2, HALMAC_REG_READ_8(pHalmac_adapter, REG_HCI_OPT_CTRL + 2) & ~(BIT(2)));
+	} else if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_USB) {
+		if (HALMAC_REG_READ_8(pHalmac_adapter, REG_SYS_CFG2 + 3) == 0x20)	 /* usb3.0 */
+			HALMAC_REG_WRITE_8(pHalmac_adapter, 0xFE5B, HALMAC_REG_READ_8(pHalmac_adapter, 0xFE5B) | BIT(4));
+	}
+
 	/* Config PIN Mux */
 	value32 = HALMAC_REG_READ_32(pHalmac_adapter, REG_PAD_CTRL1);
 	value32 = value32 & (~(BIT(28) | BIT(29)));
@@ -896,10 +1037,11 @@ halmac_pre_init_system_cfg_88xx(
 }
 
 /**
- * halmac_init_system_cfg_88xx() - config system register after power on
- * @pHalmac_adapter
+ * halmac_init_system_cfg_88xx() -  init system config
+ * @pHalmac_adapter : the adapter of halmac
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_init_system_cfg_88xx(
@@ -908,16 +1050,15 @@ halmac_init_system_cfg_88xx(
 {
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
+	u32 temp = 0;
 
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_INIT_SYSTEM_CFG);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -927,7 +1068,12 @@ halmac_init_system_cfg_88xx(
 	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_SYS_SDIO_CTRL, (u32)(HALMAC_REG_READ_32(pHalmac_adapter, REG_SYS_SDIO_CTRL) | BIT_LTE_MUX_CTRL_PATH));
 	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_CPU_DMEM_CON, (u32)(HALMAC_REG_READ_32(pHalmac_adapter, REG_CPU_DMEM_CON) | BIT_WL_PLATFORM_RST));
 
-	/* pHalmac_api->halmac_init_h2c(pHalmac_adapter); */
+	/*disable boot-from-flash for driver's DL FW*/
+	temp = HALMAC_REG_READ_32(pHalmac_adapter, REG_MCUFW_CTRL);
+	if (temp & BIT_BOOT_FSPI_EN) {
+		HALMAC_REG_WRITE_32(pHalmac_adapter, REG_MCUFW_CTRL, temp & (~BIT_BOOT_FSPI_EN));
+		HALMAC_REG_WRITE_32(pHalmac_adapter, REG_GPIO_MUXCFG, HALMAC_REG_READ_32(pHalmac_adapter, REG_GPIO_MUXCFG) & (~BIT_FSPI_EN));
+	}
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_init_system_cfg <==========\n");
 
@@ -935,29 +1081,27 @@ halmac_init_system_cfg_88xx(
 }
 
 /**
- * halmac_init_edca_cfg_88xx() - config EDCA register
- * @pHalmac_adapter
+ * halmac_init_edca_cfg_88xx() - init EDCA config
+ * @pHalmac_adapter : the adapter of halmac
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_init_edca_cfg_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter
 )
 {
-	u8 value8;
 	u32 value32;
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_INIT_EDCA_CFG);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -979,10 +1123,6 @@ halmac_init_edca_cfg_88xx(
 	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_RD_NAV_NXT, HALMAC_RDG_NAV_88XX | (HALMAC_TXOP_NAV_88XX << 16));
 	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_RXTSF_OFFSET_CCK, HALMAC_CCK_RX_TSF_88XX | (HALMAC_OFDM_RX_TSF_88XX) << 8);
 
-	value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_RD_CTRL + 1);
-	value8 |= (BIT_VOQ_RD_INIT_EN | BIT_VIQ_RD_INIT_EN | BIT_BEQ_RD_INIT_EN);
-	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_RD_CTRL + 1, value8);
-
 	/* Set beacon cotnrol - enable TSF and other related functions */
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_BCN_CTRL, (u8)(HALMAC_REG_READ_8(pHalmac_adapter, REG_BCN_CTRL) | BIT_EN_BCN_FUNCTION));
 
@@ -997,10 +1137,11 @@ halmac_init_edca_cfg_88xx(
 }
 
 /**
- * halmac_init_wmac_cfg_88xx() - config WMAC register
- * @pHalmac_adapter
+ * halmac_init_wmac_cfg_88xx() - init wmac config
+ * @pHalmac_adapter : the adapter of halmac
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_init_wmac_cfg_88xx(
@@ -1010,14 +1151,12 @@ halmac_init_wmac_cfg_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_INIT_WMAC_CFG);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -1028,21 +1167,19 @@ halmac_init_wmac_cfg_88xx(
 
 	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_RCR, HALMAC_RCR_CONFIG_88XX);
 
-	/*HALMAC_REG_WRITE_16(pHalmac_adapter, REG_SECCFG, HALMAC_SECURITY_CONFIG_88XX); Default Disable Security*/
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_RX_PKT_LIMIT, HALMAC_RXPKT_MAX_SIZE_BASE512);
 
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_TCR + 1, (u8)(HALMAC_REG_READ_8(pHalmac_adapter, REG_TCR + 1) | 0x30));
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_TCR + 2, 0x30);
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_TCR + 1, 0x00);
 
 #if HALMAC_8821C_SUPPORT
-	if (HALMAC_CHIP_ID_8821C == pHalmac_adapter->chip_id) {
+	if (pHalmac_adapter->chip_id == HALMAC_CHIP_ID_8821C)
 		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_ACKTO_CCK, HALMAC_ACK_TO_CCK_88XX);
-	}
 #endif
 
 	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_WMAC_OPTION_FUNCTION + 8, 0x30810041);
-	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_WMAC_OPTION_FUNCTION + 4, 0x50802080);
-	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_WL2LTECOEX_INDIRECT_ACCESS_CTRL_V1, 0xC00F0038);
+	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_WMAC_OPTION_FUNCTION + 4, 0x50802098);
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_init_wmac_cfg_88xx <==========\n");
 
@@ -1051,10 +1188,11 @@ halmac_init_wmac_cfg_88xx(
 
 /**
  * halmac_init_mac_cfg_88xx() - config page1~page7 register
- * @pHalmac_adapter
- * @mode : normal, trxshare, wmm, p2p, loopback
+ * @pHalmac_adapter : the adapter of halmac
+ * @mode : trx mode
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_init_mac_cfg_88xx(
@@ -1066,39 +1204,37 @@ halmac_init_mac_cfg_88xx(
 	PHALMAC_API pHalmac_api;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_INIT_MAC_CFG);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_init_mac_cfg_88xx ==========>mode = %d\n", mode);
 
 	status = pHalmac_api->halmac_init_trx_cfg(pHalmac_adapter, mode);
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_init_trx_cfg errorr = %x\n", status);
 		return status;
 	}
 #if 1
 	status = pHalmac_api->halmac_init_protocol_cfg(pHalmac_adapter);
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_init_protocol_cfg_88xx error = %x\n", status);
 		return status;
 	}
 
 	status = halmac_init_edca_cfg_88xx(pHalmac_adapter);
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_init_edca_cfg_88xx error = %x\n", status);
 		return status;
 	}
 
 	status = halmac_init_wmac_cfg_88xx(pHalmac_adapter);
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_init_wmac_cfg_88xx error = %x\n", status);
 		return status;
 	}
@@ -1110,10 +1246,11 @@ halmac_init_mac_cfg_88xx(
 
 /**
  * halmac_cfg_operation_mode_88xx() - config operation mode
- * @pHalmac_adapter
- * @wireless_mode : b/g/n/ac
+ * @pHalmac_adapter : the adapter of halmac
+ * @wireless_mode : 802.11 standard(b/g/n/ac¡K)
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_operation_mode_88xx(
@@ -1122,21 +1259,17 @@ halmac_cfg_operation_mode_88xx(
 )
 {
 	VOID *pDriver_adapter = NULL;
-	HALMAC_WIRELESS_MODE wireless_mode_local = HALMAC_WIRELESS_MODE_UNDEFINE;
-
-	wireless_mode_local = wireless_mode;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_OPERATION_MODE);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_cfg_operation_mode_88xx ==========>wireless_mode = %d\n", wireless_mode);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]halmac_cfg_operation_mode_88xx ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]wireless_mode = %d\n", wireless_mode);
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_cfg_operation_mode_88xx <==========\n");
 
@@ -1144,13 +1277,14 @@ halmac_cfg_operation_mode_88xx(
 }
 
 /**
- * halmac_cfg_bw_88xx() - config channel & bandwidth
- * @pHalmac_adapter
+ * halmac_cfg_ch_bw_88xx() - config channel & bandwidth
+ * @pHalmac_adapter : the adapter of halmac
  * @channel : WLAN channel, support 2.4G & 5G
- * @pri_ch_idx : idx1, idx2, idx3, idx4
- * @bw : 20, 40, 80, 160, 5 ,10
+ * @pri_ch_idx : primary channel index, idx1, idx2, idx3, idx4
+ * @bw : band width, 20, 40, 80, 160, 5 ,10
  * Author : KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_ch_bw_88xx(
@@ -1161,20 +1295,17 @@ halmac_cfg_ch_bw_88xx(
 )
 {
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_CH_BW);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_cfg_ch_bw_88xx ==========>ch = %d, idx=%d, bw=%d\n", channel, pri_ch_idx, bw);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]halmac_cfg_ch_bw_88xx ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]ch = %d, idx=%d, bw=%d\n", channel, pri_ch_idx, bw);
 
 	halmac_cfg_pri_ch_idx_88xx(pHalmac_adapter,  pri_ch_idx);
 
@@ -1187,16 +1318,6 @@ halmac_cfg_ch_bw_88xx(
 	return HALMAC_RET_SUCCESS;
 }
 
-
-/**
- * halmac_cfg_bw_88xx() - config channel & bandwidth
- * @pHalmac_adapter
- * @channel : WLAN channel, support 2.4G & 5G
- * @pri_ch_idx : idx1, idx2, idx3, idx4
- * @bw : 20, 40, 80, 160, 5 ,10
- * Author : KaiYuan Chang
- * Return : HALMAC_RET_STATUS
- */
 HALMAC_RET_STATUS
 halmac_cfg_ch_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
@@ -1207,18 +1328,17 @@ halmac_cfg_ch_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_CH_BW);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_cfg_ch_88xx ==========>ch = %d\n", channel);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]halmac_cfg_ch_88xx ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]ch = %d\n", channel);
 
 	value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_CCK_CHECK);
 	value8 = value8 & (~(BIT(7)));
@@ -1233,15 +1353,6 @@ halmac_cfg_ch_88xx(
 	return HALMAC_RET_SUCCESS;
 }
 
-/**
- * halmac_cfg_bw_88xx() - config channel & bandwidth
- * @pHalmac_adapter
- * @channel : WLAN channel, support 2.4G & 5G
- * @pri_ch_idx : idx1, idx2, idx3, idx4
- * @bw : 20, 40, 80, 160, 5 ,10
- * Author : KaiYuan Chang
- * Return : HALMAC_RET_STATUS
- */
 HALMAC_RET_STATUS
 halmac_cfg_pri_ch_idx_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
@@ -1252,21 +1363,20 @@ halmac_cfg_pri_ch_idx_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_CH_BW);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_cfg_pri_ch_idx_88xx ==========> idx=%d\n",  pri_ch_idx);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]halmac_cfg_pri_ch_idx_88xx ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]idx=%d\n",  pri_ch_idx);
 
 	txsc_20 = pri_ch_idx;
-	if ((HALMAC_CH_IDX_1 == txsc_20) || (HALMAC_CH_IDX_3 == txsc_20))
+	if ((txsc_20 == HALMAC_CH_IDX_1) || (txsc_20 == HALMAC_CH_IDX_3))
 		txsc_40 = 9;
 	else
 		txsc_40 = 10;
@@ -1276,15 +1386,15 @@ halmac_cfg_pri_ch_idx_88xx(
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_cfg_pri_ch_idx_88xx <==========\n");
 
 	return HALMAC_RET_SUCCESS;
-
 }
 
 /**
  * halmac_cfg_bw_88xx() - config bandwidth
- * @pHalmac_adapter
- * @bw : 20, 40, 80, 160, 5 ,10
+ * @pHalmac_adapter : the adapter of halmac
+ * @bw : band width, 20, 40, 80, 160, 5 ,10
  * Author : KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_bw_88xx(
@@ -1296,18 +1406,17 @@ halmac_cfg_bw_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_BW);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_cfg_bw_88xx ==========>bw=%d\n", bw);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]halmac_cfg_bw_88xx ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]bw=%d\n", bw);
 
 	/* RF Mode */
 	value32 = HALMAC_REG_READ_32(pHalmac_adapter, REG_WMAC_TRXPTCL_CTL);
@@ -1323,7 +1432,6 @@ halmac_cfg_bw_88xx(
 	case HALMAC_BW_20:
 	case HALMAC_BW_10:
 	case HALMAC_BW_5:
-		value32 = value32;
 		break;
 	default:
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_cfg_bw_88xx switch case not support\n");
@@ -1346,16 +1454,11 @@ halmac_cfg_bw_88xx(
 
 /**
  * halmac_dump_efuse_map_88xx() - dump "physical" efuse map
- * @pHalmac_adapter
- * @cfg : dump with auto/driver/FW
+ * @pHalmac_adapter : the adapter of halmac
+ * @cfg : dump efuse method
  * Author : Ivan Lin/KaiYuan Chang
- *
- * halmac_dump_efuse_map_88xx is async architecture, user can
- * refer to DumpEfuseMap page of FlowChart.vsd.
- * dump_efuse_map page of Halmac_flow_control.vsd is halmac api control
- * flow, only for SD1 internal use.
- *
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_dump_efuse_map_88xx(
@@ -1365,47 +1468,48 @@ halmac_dump_efuse_map_88xx(
 {
 	VOID *pDriver_adapter = NULL;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
-	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &(pHalmac_adapter->halmac_state.efuse_state_set.process_status);
+	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &pHalmac_adapter->halmac_state.efuse_state_set.process_status;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_DUMP_EFUSE_MAP);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_dump_efuse_map_88xx ==========>cfg=%d\n", cfg);
 
-	if (HALMAC_CMD_PROCESS_SENDING == *pProcess_status) {
+	if (*pProcess_status == HALMAC_CMD_PROCESS_SENDING) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Wait event(dump efuse)...\n");
 		return HALMAC_RET_BUSY_STATE;
 	}
 
-	if (HALMAC_EFUSE_CMD_CONSTRUCT_IDLE != halmac_query_efuse_curr_state_88xx(pHalmac_adapter)) {
+	if (halmac_query_efuse_curr_state_88xx(pHalmac_adapter) != HALMAC_EFUSE_CMD_CONSTRUCT_IDLE) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Not idle state(dump efuse)...\n");
 		return HALMAC_RET_ERROR_STATE;
 	}
 
+	if (pHalmac_adapter->halmac_state.mac_power == HALMAC_MAC_POWER_OFF)
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_WARN, "[WARN]Dump efuse in suspend mode\n");
+
 	*pProcess_status = HALMAC_CMD_PROCESS_IDLE;
 	pHalmac_adapter->event_trigger.physical_efuse_map = 1;
 
 	status = halmac_func_switch_efuse_bank_88xx(pHalmac_adapter, HALMAC_EFUSE_BANK_WIFI);
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_func_switch_efuse_bank error = %x\n", status);
 		return status;
 	}
 
 	status = halmac_dump_efuse_88xx(pHalmac_adapter, cfg);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_read_efuse error = %x\n", status);
 		return status;
 	}
 
-	if (_TRUE == pHalmac_adapter->hal_efuse_map_valid) {
+	if (pHalmac_adapter->hal_efuse_map_valid == _TRUE) {
 		*pProcess_status = HALMAC_CMD_PROCESS_DONE;
 
 		PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_DUMP_PHYSICAL_EFUSE, *pProcess_status,
@@ -1413,7 +1517,7 @@ halmac_dump_efuse_map_88xx(
 		pHalmac_adapter->event_trigger.physical_efuse_map = 0;
 	}
 
-	if (HALMAC_RET_SUCCESS != halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_IDLE))
+	if (halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_IDLE) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ERROR_STATE;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_TRACE, "halmac_dump_efuse_map_88xx <==========\n");
@@ -1423,16 +1527,13 @@ halmac_dump_efuse_map_88xx(
 
 /**
  * halmac_dump_efuse_map_bt_88xx() - dump "BT physical" efuse map
- * @pHalmac_adapter
- * @cfg : dump with auto/driver/FW
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_efuse_bank : bt efuse bank
+ * @bt_efuse_map_size : bt efuse map size. get from halmac_get_efuse_size API
+ * @pBT_efuse_map : bt efuse map
  * Author : Soar / Ivan Lin
- *
- * halmac_dump_efuse_map_bt_88xx is async architecture, user can
- * refer to DumpEfuseMap page of FlowChart.vsd.
- * dump_efuse_map_bt page of Halmac_flow_control.vsd is halmac api control
- * flow, only for SD1 internal use.
- *
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_dump_efuse_map_bt_88xx(
@@ -1444,16 +1545,14 @@ halmac_dump_efuse_map_bt_88xx(
 {
 	VOID *pDriver_adapter = NULL;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
-	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &(pHalmac_adapter->halmac_state.efuse_state_set.process_status);
+	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &pHalmac_adapter->halmac_state.efuse_state_set.process_status;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_DUMP_EFUSE_MAP_BT);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_dump_efuse_map_bt_88xx ==========>\n");
@@ -1466,30 +1565,30 @@ halmac_dump_efuse_map_bt_88xx(
 		return HALMAC_RET_EFUSE_BANK_INCORRECT;
 	}
 
-	if (HALMAC_CMD_PROCESS_SENDING == *pProcess_status) {
+	if (*pProcess_status == HALMAC_CMD_PROCESS_SENDING) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Wait event(dump efuse)...\n");
 		return HALMAC_RET_BUSY_STATE;
 	}
 
-	if (HALMAC_EFUSE_CMD_CONSTRUCT_IDLE != halmac_query_efuse_curr_state_88xx(pHalmac_adapter)) {
+	if (halmac_query_efuse_curr_state_88xx(pHalmac_adapter) != HALMAC_EFUSE_CMD_CONSTRUCT_IDLE) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Not idle state(dump efuse)...\n");
 		return HALMAC_RET_ERROR_STATE;
 	}
 
 	status = halmac_func_switch_efuse_bank_88xx(pHalmac_adapter, halmac_efuse_bank);
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_func_switch_efuse_bank error = %x\n", status);
 		return status;
 	}
 
 	status = halmac_read_hw_efuse_88xx(pHalmac_adapter, 0, bt_efuse_map_size, pBT_efuse_map);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_read_hw_efuse_88xx error = %x\n", status);
 		return status;
 	}
 
-	if (HALMAC_RET_SUCCESS != halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_IDLE))
+	if (halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_IDLE) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ERROR_STATE;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_TRACE, "halmac_dump_efuse_map_bt_88xx <==========\n");
@@ -1498,46 +1597,14 @@ halmac_dump_efuse_map_bt_88xx(
 }
 
 /**
- * halmac_read_efuse_88xx() - read "physical" efuse offset
- * @pHalmac_adapter
- * @halmac_offset
- * @pValue
- * Author : Ivan Lin/KaiYuan Chang
- * Return : HALMAC_RET_STATUS
- */
-/*
- * HALMAC_RET_STATUS
- * halmac_read_efuse_88xx(
- *	IN PHALMAC_ADAPTER pHalmac_adapter,
- *	IN u32 halmac_offset,
- *	OUT u8 *pValue
- *)
- */
-
-/**
- * halmac_write_efuse_88xx() - write "physical" efuse offset
- * @pHalmac_adapter
- * @halmac_offset
- * @halmac_value
- * Author : Ivan Lin/KaiYuan Chang
- * Return : HALMAC_RET_STATUS
- */
-/*
- * HALMAC_RET_STATUS
- * halmac_write_efuse_88xx(
- *	IN PHALMAC_ADAPTER	pHalmac_adapter,
- *	IN u32 halmac_offset,
- *	IN u8 halmac_value
- *)
- */
-
-/**
  * halmac_write_efuse_bt_88xx() - write "BT physical" efuse offset
- * @pHalmac_adapter
- * @halmac_offset
- * @halmac_value
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : offset
+ * @halmac_value : Write value
+ * @pBT_efuse_map : bt efuse map
  * Author : Soar
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_write_efuse_bt_88xx(
@@ -1550,28 +1617,25 @@ halmac_write_efuse_bt_88xx(
 	VOID *pDriver_adapter = NULL;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
+	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &pHalmac_adapter->halmac_state.efuse_state_set.process_status;
 
-	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &(pHalmac_adapter->halmac_state.efuse_state_set.process_status);
-
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_WRITE_EFUSE_BT);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_TRACE, "halmac_write_efuse_bt_88xx ==========>\n");
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_TRACE, "offset : %X value : %X Bank : %X\n", halmac_offset, halmac_value, halmac_efuse_bank);
 
-	if (HALMAC_CMD_PROCESS_SENDING == *pProcess_status) {
+	if (*pProcess_status == HALMAC_CMD_PROCESS_SENDING) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Wait/Rcvd event(dump efuse)...\n");
 		return HALMAC_RET_BUSY_STATE;
 	}
 
-	if (HALMAC_EFUSE_CMD_CONSTRUCT_IDLE != halmac_query_efuse_curr_state_88xx(pHalmac_adapter)) {
+	if (halmac_query_efuse_curr_state_88xx(pHalmac_adapter) != HALMAC_EFUSE_CMD_CONSTRUCT_IDLE) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Not idle state(dump efuse)...\n");
 		return HALMAC_RET_ERROR_STATE;
 	}
@@ -1587,18 +1651,18 @@ halmac_write_efuse_bt_88xx(
 	}
 
 	status = halmac_func_switch_efuse_bank_88xx(pHalmac_adapter, halmac_efuse_bank);
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_func_switch_efuse_bank error = %x\n", status);
 		return status;
 	}
 
 	status = halmac_func_write_efuse_88xx(pHalmac_adapter, halmac_offset, halmac_value);
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_func_write_efuse error = %x\n", status);
 		return status;
 	}
 
-	if (HALMAC_RET_SUCCESS != halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_IDLE))
+	if (halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_IDLE) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ERROR_STATE;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_TRACE, "halmac_write_efuse_bt_88xx <==========\n");
@@ -1607,11 +1671,118 @@ halmac_write_efuse_bt_88xx(
 }
 
 /**
+ * halmac_read_efuse_bt_88xx() - read "BT physical" efuse offset
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : offset
+ * @pValue : 1 byte efuse value
+ * @HALMAC_EFUSE_BANK : efuse bank
+ * Author : Soar
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+HALMAC_RET_STATUS
+halmac_read_efuse_bt_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u32 halmac_offset,
+	OUT u8 *pValue,
+	IN HALMAC_EFUSE_BANK halmac_efuse_bank
+)
+{
+	VOID *pDriver_adapter = NULL;
+	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
+
+	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &pHalmac_adapter->halmac_state.efuse_state_set.process_status;
+
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_ADAPTER_INVALID;
+
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_API_INVALID;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_TRACE, "halmac_read_efuse_bt_88xx ==========>\n");
+
+	if (*pProcess_status == HALMAC_CMD_PROCESS_SENDING) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Wait/Rcvd event(dump efuse)...\n");
+		return HALMAC_RET_BUSY_STATE;
+	}
+
+	if (halmac_query_efuse_curr_state_88xx(pHalmac_adapter) != HALMAC_EFUSE_CMD_CONSTRUCT_IDLE) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Not idle state(dump efuse)...\n");
+		return HALMAC_RET_ERROR_STATE;
+	}
+
+	if (halmac_offset >= pHalmac_adapter->hw_config_info.efuse_size) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "Offset is too large\n");
+		return HALMAC_RET_EFUSE_SIZE_INCORRECT;
+	}
+
+	if ((halmac_efuse_bank > HALMAC_EFUSE_BANK_MAX) || (halmac_efuse_bank == HALMAC_EFUSE_BANK_WIFI)) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "Undefined BT bank\n");
+		return HALMAC_RET_EFUSE_BANK_INCORRECT;
+	}
+
+	status = halmac_func_switch_efuse_bank_88xx(pHalmac_adapter, halmac_efuse_bank);
+	if (status != HALMAC_RET_SUCCESS) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_func_switch_efuse_bank error = %x\n", status);
+		return status;
+	}
+
+	status = halmac_func_read_efuse_88xx(pHalmac_adapter, halmac_offset, 1, pValue);
+	if (status != HALMAC_RET_SUCCESS) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_func_read_efuse error = %x\n", status);
+		return status;
+	}
+
+	if (halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_IDLE) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_ERROR_STATE;
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_TRACE, "halmac_read_efuse_bt_88xx <==========\n");
+
+	return HALMAC_RET_SUCCESS;
+}
+
+/**
+ * halmac_cfg_efuse_auto_check_88xx() - check efuse after writing it
+ * @pHalmac_adapter : the adapter of halmac
+ * @enable : 1, enable efuse auto check. others, disable
+ * Author : Soar
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+HALMAC_RET_STATUS
+halmac_cfg_efuse_auto_check_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 enable
+)
+{
+	VOID *pDriver_adapter = NULL;
+
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_ADAPTER_INVALID;
+
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_API_INVALID;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_cfg_efuse_auto_check_88xx ==========> function enable = %d\n", enable);
+
+	pHalmac_adapter->efuse_auto_check_en = enable;
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_cfg_efuse_auto_check_88xx <==========\n");
+
+	return HALMAC_RET_SUCCESS;
+}
+
+/**
  * halmac_get_efuse_available_size_88xx() - get efuse available size
- * @pHalmac_adapter
- * @halmac_size : Output physical efuse size
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_size : physical efuse available size
  * Author : Soar
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_get_efuse_available_size_88xx(
@@ -1622,10 +1793,10 @@ halmac_get_efuse_available_size_88xx(
 	HALMAC_RET_STATUS status;
 	VOID *pDriver_adapter = NULL;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
@@ -1634,7 +1805,7 @@ halmac_get_efuse_available_size_88xx(
 
 	status = halmac_dump_logical_efuse_map_88xx(pHalmac_adapter, HALMAC_EFUSE_R_DRV);
 
-	if (HALMAC_RET_SUCCESS != status)
+	if (status != HALMAC_RET_SUCCESS)
 		return status;
 
 	*halmac_size = pHalmac_adapter->hw_config_info.efuse_size - HALMAC_PROTECTED_EFUSE_SIZE_88XX - pHalmac_adapter->efuse_end;
@@ -1646,10 +1817,11 @@ halmac_get_efuse_available_size_88xx(
 
 /**
  * halmac_get_efuse_size_88xx() - get "physical" efuse size
- * @pHalmac_adapter
- * @halmac_size : Output physical efuse size
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_size : physical efuse size
  * Author : Ivan Lin/KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_get_efuse_size_88xx(
@@ -1659,14 +1831,12 @@ halmac_get_efuse_size_88xx(
 {
 	VOID *pDriver_adapter = NULL;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_GET_EFUSE_SIZE);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_TRACE, "halmac_get_efuse_size_88xx ==========>\n");
@@ -1680,10 +1850,11 @@ halmac_get_efuse_size_88xx(
 
 /**
  * halmac_get_logical_efuse_size_88xx() - get "logical" efuse size
- * @pHalmac_adapter
- * @halmac_size : Output logical efuse size
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_size : logical efuse size
  * Author : Ivan Lin/KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_get_logical_efuse_size_88xx(
@@ -1693,14 +1864,12 @@ halmac_get_logical_efuse_size_88xx(
 {
 	VOID *pDriver_adapter = NULL;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_GET_LOGICAL_EFUSE_SIZE);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_TRACE, "halmac_get_logical_efuse_size_88xx ==========>\n");
@@ -1714,16 +1883,11 @@ halmac_get_logical_efuse_size_88xx(
 
 /**
  * halmac_dump_logical_efuse_map_88xx() - dump "logical" efuse map
- * @pHalmac_adapter
- * @cfg : dump with auto/driver/FW
+ * @pHalmac_adapter : the adapter of halmac
+ * @cfg : dump efuse method
  * Author : Soar
- *
- * halmac_dump_logical_efuse_map_88xx is async architecture, user can
- * refer to DumpEEPROMMap page of FlowChart.vsd.
- * dump_efuse_map page of Halmac_flow_control.vsd is halmac api control
- * flow, only for SD1 internal use.
- *
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_dump_logical_efuse_map_88xx(
@@ -1735,58 +1899,61 @@ halmac_dump_logical_efuse_map_88xx(
 	u32 eeprom_size = pHalmac_adapter->hw_config_info.eeprom_size;
 	VOID *pDriver_adapter = NULL;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
-	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &(pHalmac_adapter->halmac_state.efuse_state_set.process_status);
+	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &pHalmac_adapter->halmac_state.efuse_state_set.process_status;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_DUMP_LOGICAL_EFUSE_MAP);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_TRACE, "halmac_dump_logical_efuse_map_88xx ==========>cfg = %d\n", cfg);
 
-	if (HALMAC_CMD_PROCESS_SENDING == *pProcess_status) {
+	if (*pProcess_status == HALMAC_CMD_PROCESS_SENDING) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Wait/Rcvd event(dump efuse)...\n");
 		return HALMAC_RET_BUSY_STATE;
 	}
 
-	if (HALMAC_EFUSE_CMD_CONSTRUCT_IDLE != halmac_query_efuse_curr_state_88xx(pHalmac_adapter)) {
+	if (halmac_query_efuse_curr_state_88xx(pHalmac_adapter) != HALMAC_EFUSE_CMD_CONSTRUCT_IDLE) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Not idle state(dump efuse)...\n");
 		return HALMAC_RET_ERROR_STATE;
 	}
 
+	if (pHalmac_adapter->halmac_state.mac_power == HALMAC_MAC_POWER_OFF)
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_WARN, "[WARN]Dump logical efuse in suspend mode\n");
+
 	*pProcess_status = HALMAC_CMD_PROCESS_IDLE;
 	pHalmac_adapter->event_trigger.logical_efuse_map = 1;
 
 	status = halmac_func_switch_efuse_bank_88xx(pHalmac_adapter, HALMAC_EFUSE_BANK_WIFI);
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_func_switch_efuse_bank error = %x\n", status);
 		return status;
 	}
 
 	status = halmac_dump_efuse_88xx(pHalmac_adapter, cfg);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_eeprom_parser_88xx error = %x\n", status);
 		return status;
 	}
 
-	if (_TRUE == pHalmac_adapter->hal_efuse_map_valid) {
+	if (pHalmac_adapter->hal_efuse_map_valid == _TRUE) {
 		*pProcess_status = HALMAC_CMD_PROCESS_DONE;
 
 		pEeprom_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, eeprom_size);
-		if (NULL == pEeprom_map) {
+		if (pEeprom_map == NULL) {
 			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac allocate local eeprom map Fail!!\n");
 			return HALMAC_RET_MALLOC_FAIL;
 		}
 		PLATFORM_RTL_MEMSET(pDriver_adapter, pEeprom_map, 0xFF, eeprom_size);
 
-		if (HALMAC_RET_SUCCESS != halmac_eeprom_parser_88xx(pHalmac_adapter, pHalmac_adapter->pHalEfuse_map, pEeprom_map))
+		if (halmac_eeprom_parser_88xx(pHalmac_adapter, pHalmac_adapter->pHalEfuse_map, pEeprom_map) != HALMAC_RET_SUCCESS) {
+			PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
 			return HALMAC_RET_EEPROM_PARSING_FAIL;
+		}
 
 		PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_DUMP_LOGICAL_EFUSE, *pProcess_status, pEeprom_map, eeprom_size);
 		pHalmac_adapter->event_trigger.logical_efuse_map = 0;
@@ -1794,7 +1961,7 @@ halmac_dump_logical_efuse_map_88xx(
 		PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
 	}
 
-	if (HALMAC_RET_SUCCESS != halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_IDLE))
+	if (halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_IDLE) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ERROR_STATE;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_TRACE, "halmac_dump_logical_efuse_map_88xx <==========\n");
@@ -1803,12 +1970,13 @@ halmac_dump_logical_efuse_map_88xx(
 }
 
 /**
- * halmac_read_logical_efuse_88xx() - read "logical" efuse offset
- * @pHalmac_adapter
- * @halmac_offset
- * @pValue
+ * halmac_read_logical_efuse_88xx() - read logical efuse map 1 byte
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : offset
+ * @pValue : 1 byte efuse value
  * Author : Soar
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_read_logical_efuse_88xx(
@@ -1822,16 +1990,14 @@ halmac_read_logical_efuse_88xx(
 	VOID *pDriver_adapter = NULL;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
-	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &(pHalmac_adapter->halmac_state.efuse_state_set.process_status);
+	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &pHalmac_adapter->halmac_state.efuse_state_set.process_status;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_READ_LOGICAL_EFUSE);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_TRACE, "halmac_read_logical_efuse_88xx ==========>\n");
@@ -1841,38 +2007,41 @@ halmac_read_logical_efuse_88xx(
 		return HALMAC_RET_EFUSE_SIZE_INCORRECT;
 	}
 
-	if (HALMAC_CMD_PROCESS_SENDING == *pProcess_status) {
+	if (*pProcess_status == HALMAC_CMD_PROCESS_SENDING) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Wait/Rcvd event(dump efuse)...\n");
 		return HALMAC_RET_BUSY_STATE;
 	}
-	if (HALMAC_EFUSE_CMD_CONSTRUCT_IDLE != halmac_query_efuse_curr_state_88xx(pHalmac_adapter)) {
+	if (halmac_query_efuse_curr_state_88xx(pHalmac_adapter) != HALMAC_EFUSE_CMD_CONSTRUCT_IDLE) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Not idle state(dump efuse)...\n");
 		return HALMAC_RET_ERROR_STATE;
 	}
 
+	status = halmac_func_switch_efuse_bank_88xx(pHalmac_adapter, HALMAC_EFUSE_BANK_WIFI);
+	if (status != HALMAC_RET_SUCCESS) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_func_switch_efuse_bank error = %x\n", status);
+		return status;
+	}
+
 	pEeprom_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, eeprom_size);
-	if (NULL == pEeprom_map) {
+	if (pEeprom_map == NULL) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac allocate local eeprom map Fail!!\n");
 		return HALMAC_RET_MALLOC_FAIL;
 	}
 	PLATFORM_RTL_MEMSET(pDriver_adapter, pEeprom_map, 0xFF, eeprom_size);
 
-	status = halmac_func_switch_efuse_bank_88xx(pHalmac_adapter, HALMAC_EFUSE_BANK_WIFI);
-	if (HALMAC_RET_SUCCESS != status) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_func_switch_efuse_bank error = %x\n", status);
-		return status;
-	}
-
 	status = halmac_read_logical_efuse_map_88xx(pHalmac_adapter, pEeprom_map);
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_read_logical_efuse_map error = %x\n", status);
+		PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
 		return status;
 	}
 
 	*pValue = *(pEeprom_map + halmac_offset);
 
-	if (HALMAC_RET_SUCCESS != halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_IDLE))
+	if (halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_IDLE) != HALMAC_RET_SUCCESS) {
+		PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
 		return HALMAC_RET_ERROR_STATE;
+	}
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_TRACE, "halmac_read_logical_efuse_88xx <==========\n");
 
@@ -1883,11 +2052,12 @@ halmac_read_logical_efuse_88xx(
 
 /**
  * halmac_write_logical_efuse_88xx() - write "logical" efuse offset
- * @pHalmac_adapter
- * @halmac_offset
- * @halmac_value
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : offset
+ * @halmac_value : value
  * Author : Soar
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_write_logical_efuse_88xx(
@@ -1900,16 +2070,14 @@ halmac_write_logical_efuse_88xx(
 	PHALMAC_API pHalmac_api;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
-	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &(pHalmac_adapter->halmac_state.efuse_state_set.process_status);
+	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &pHalmac_adapter->halmac_state.efuse_state_set.process_status;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_WRITE_LOGICAL_EFUSE);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -1920,29 +2088,29 @@ halmac_write_logical_efuse_88xx(
 		return HALMAC_RET_EFUSE_SIZE_INCORRECT;
 	}
 
-	if (HALMAC_CMD_PROCESS_SENDING == *pProcess_status) {
+	if (*pProcess_status == HALMAC_CMD_PROCESS_SENDING) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Wait/Rcvd event(dump efuse)...\n");
 		return HALMAC_RET_BUSY_STATE;
 	}
 
-	if (HALMAC_EFUSE_CMD_CONSTRUCT_IDLE != halmac_query_efuse_curr_state_88xx(pHalmac_adapter)) {
+	if (halmac_query_efuse_curr_state_88xx(pHalmac_adapter) != HALMAC_EFUSE_CMD_CONSTRUCT_IDLE) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Not idle state(dump efuse)...\n");
 		return HALMAC_RET_ERROR_STATE;
 	}
 
 	status = halmac_func_switch_efuse_bank_88xx(pHalmac_adapter, HALMAC_EFUSE_BANK_WIFI);
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_func_switch_efuse_bank error = %x\n", status);
 		return status;
 	}
 
 	status = halmac_func_write_logical_efuse_88xx(pHalmac_adapter, halmac_offset, halmac_value);
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_write_logical_efuse error = %x\n", status);
 		return status;
 	}
 
-	if (HALMAC_RET_SUCCESS != halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_IDLE))
+	if (halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_IDLE) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ERROR_STATE;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_TRACE, "halmac_write_logical_efuse_88xx <==========\n");
@@ -1951,12 +2119,13 @@ halmac_write_logical_efuse_88xx(
 }
 
 /**
- * halmac_pg_efuse_by_map_88xx() - pg efuse by map
- * @pHalmac_adapter
- * @pPg_efuse_info : map, map size, mask, mask size
- * @cfg : dump with auto/driver/FW
+ * halmac_pg_efuse_by_map_88xx() - pg logical efuse by map
+ * @pHalmac_adapter : the adapter of halmac
+ * @pPg_efuse_info : efuse map information
+ * @cfg : dump efuse method
  * Author : Soar
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_pg_efuse_by_map_88xx(
@@ -1968,16 +2137,14 @@ halmac_pg_efuse_by_map_88xx(
 	VOID *pDriver_adapter = NULL;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
-	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &(pHalmac_adapter->halmac_state.efuse_state_set.process_status);
+	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &pHalmac_adapter->halmac_state.efuse_state_set.process_status;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_PG_EFUSE_BY_MAP);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_TRACE, "halmac_pg_efuse_by_map_88xx ==========>\n");
@@ -1997,40 +2164,40 @@ halmac_pg_efuse_by_map_88xx(
 		return HALMAC_RET_EFUSE_SIZE_INCORRECT;
 	}
 
-	if (NULL == pPg_efuse_info->pEfuse_map) {
+	if (pPg_efuse_info->pEfuse_map == NULL) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "efuse_map is NULL\n");
 		return HALMAC_RET_NULL_POINTER;
 	}
 
-	if (NULL == pPg_efuse_info->pEfuse_mask) {
+	if (pPg_efuse_info->pEfuse_mask == NULL) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "efuse_mask is NULL\n");
 		return HALMAC_RET_NULL_POINTER;
 	}
 
-	if (HALMAC_CMD_PROCESS_SENDING == *pProcess_status) {
+	if (*pProcess_status == HALMAC_CMD_PROCESS_SENDING) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Wait/Rcvd event(dump efuse)...\n");
 		return HALMAC_RET_BUSY_STATE;
 	}
 
-	if (HALMAC_EFUSE_CMD_CONSTRUCT_IDLE != halmac_query_efuse_curr_state_88xx(pHalmac_adapter)) {
+	if (halmac_query_efuse_curr_state_88xx(pHalmac_adapter) != HALMAC_EFUSE_CMD_CONSTRUCT_IDLE) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Not idle state(dump efuse)...\n");
 		return HALMAC_RET_ERROR_STATE;
 	}
 
 	status = halmac_func_switch_efuse_bank_88xx(pHalmac_adapter, HALMAC_EFUSE_BANK_WIFI);
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_func_switch_efuse_bank error = %x\n", status);
 		return status;
 	}
 
 	status = halmac_func_pg_efuse_by_map_88xx(pHalmac_adapter, pPg_efuse_info, cfg);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_pg_efuse_by_map error = %x\n", status);
 		return status;
 	}
 
-	if (HALMAC_RET_SUCCESS != halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_IDLE))
+	if (halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_IDLE) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ERROR_STATE;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_TRACE, "halmac_pg_efuse_by_map_88xx <==========\n");
@@ -2040,15 +2207,16 @@ halmac_pg_efuse_by_map_88xx(
 
 /**
  * halmac_get_c2h_info_88xx() - process halmac C2H packet
- * @pHalmac_adapter
- * @halmac_buf
- * @halmac_size
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_buf : RX Packet pointer
+ * @halmac_size : RX Packet size
  * Author : KaiYuan Chang/Ivan Lin
  *
  * Used to process c2h packet info from RX path. After receiving the packet,
  * user need to call this api and pass the packet pointer.
  *
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_get_c2h_info_88xx(
@@ -2061,25 +2229,23 @@ halmac_get_c2h_info_88xx(
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_GET_C2H_INFO);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	/* PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_get_c2h_info_88xx ==========>\n"); */
 
 	/* Check if it is C2H packet */
-	if (_TRUE == GET_RX_DESC_C2H(halmac_buf)) {
+	if (GET_RX_DESC_C2H(halmac_buf) == _TRUE) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "C2H packet, start parsing!\n");
 
 		status = halmac_parse_c2h_packet_88xx(pHalmac_adapter, halmac_buf, halmac_size);
 
-		if (HALMAC_RET_SUCCESS != status) {
+		if (status != HALMAC_RET_SUCCESS) {
 			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_parse_c2h_packet_88xx error = %x\n", status);
 			return status;
 		}
@@ -2091,320 +2257,11 @@ halmac_get_c2h_info_88xx(
 }
 
 /**
- * halmac_cfg_fwlps_option_88xx() -config FW LPS option
- * @pHalmac_adapter
- * @pLps_option : refer to HALMAC_FWLPS_OPTION structure
- * Author : KaiYuan Chang/Ivan Lin
- *
- * Used to config FW LPS option. If user has called this function,
- * halmac uses this setting to run FW LPS. If user never called this function,
- * halmac uses default setting to run FW LPS
- *
- * Return : HALMAC_RET_STATUS
- */
-HALMAC_RET_STATUS
-halmac_cfg_fwlps_option_88xx(
-	IN PHALMAC_ADAPTER pHalmac_adapter,
-	IN PHALMAC_FWLPS_OPTION pLps_option
-)
-{
-	VOID *pDriver_adapter = NULL;
-	PHALMAC_FWLPS_OPTION pHal_fwlps_option;
-
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
-		return HALMAC_RET_ADAPTER_INVALID;
-
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
-		return HALMAC_RET_API_INVALID;
-
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_FWLPS_OPTION);
-
-	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHal_fwlps_option = &(pHalmac_adapter->fwlps_option);
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_cfg_fwlps_option_88xx ==========>\n");
-
-	pHal_fwlps_option->mode = pLps_option->mode;
-	pHal_fwlps_option->clk_request = pLps_option->clk_request;
-	pHal_fwlps_option->rlbm = pLps_option->rlbm;
-	pHal_fwlps_option->smart_ps = pLps_option->smart_ps;
-	pHal_fwlps_option->awake_interval = pLps_option->awake_interval;
-	pHal_fwlps_option->all_queue_uapsd = pLps_option->all_queue_uapsd;
-	pHal_fwlps_option->pwr_state = pLps_option->pwr_state;
-	pHal_fwlps_option->low_pwr_rx_beacon = pLps_option->low_pwr_rx_beacon;
-	pHal_fwlps_option->ant_auto_switch = pLps_option->ant_auto_switch;
-	pHal_fwlps_option->ps_allow_bt_high_Priority = pLps_option->ps_allow_bt_high_Priority;
-	pHal_fwlps_option->protect_bcn = pLps_option->protect_bcn;
-	pHal_fwlps_option->silence_period = pLps_option->silence_period;
-	pHal_fwlps_option->fast_bt_connect = pLps_option->fast_bt_connect;
-	pHal_fwlps_option->two_antenna_en = pLps_option->two_antenna_en;
-	pHal_fwlps_option->adopt_user_Setting = pLps_option->adopt_user_Setting;
-	pHal_fwlps_option->drv_bcn_early_shift = pLps_option->drv_bcn_early_shift;
-	pHal_fwlps_option->enter_32K = pLps_option->enter_32K;
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_cfg_fwlps_option_88xx <==========\n");
-
-	return HALMAC_RET_SUCCESS;
-}
-
-/**
- * halmac_cfg_fwips_option_88xx() -config FW IPS option
- * @pHalmac_adapter
- * @pIps_option : refer to HALMAC_FWIPS_OPTION structure
- * Author : KaiYuan Chang/Ivan Lin
- *
- * Used to config FW IPS option. If user has called this function,
- * halmac uses this setting to run FW IPS. If user never called this function,
- * halmac uses default setting to run FW IPS
- *
- * Return : HALMAC_RET_STATUS
- */
-HALMAC_RET_STATUS
-halmac_cfg_fwips_option_88xx(
-	IN PHALMAC_ADAPTER pHalmac_adapter,
-	IN PHALMAC_FWIPS_OPTION pIps_option
-)
-{
-	VOID *pDriver_adapter = NULL;
-	PHALMAC_FWIPS_OPTION pIps_option_local;
-
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
-		return HALMAC_RET_ADAPTER_INVALID;
-
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
-		return HALMAC_RET_API_INVALID;
-
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_FWIPS_OPTION);
-
-	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_cfg_fwips_option_88xx ==========>\n");
-
-	pIps_option_local = pIps_option;
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_cfg_fwips_option_88xx <==========\n");
-
-	return HALMAC_RET_SUCCESS;
-}
-
-/**
- * halmac_enter_wowlan_88xx() - enter wowlan
- * @pHalmac_adapter
- * @pWowlan_option
- * Author : KaiYuan Chang/Ivan Lin
- * Return : HALMAC_RET_STATUS
- */
-HALMAC_RET_STATUS
-halmac_enter_wowlan_88xx(
-	IN PHALMAC_ADAPTER pHalmac_adapter,
-	IN PHALMAC_WOWLAN_OPTION pWowlan_option
-)
-{
-	VOID *pDriver_adapter = NULL;
-	PHALMAC_WOWLAN_OPTION pWowlan_option_local;
-
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
-		return HALMAC_RET_ADAPTER_INVALID;
-
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
-		return HALMAC_RET_API_INVALID;
-
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_ENTER_WOWLAN);
-
-	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_enter_wowlan_88xx ==========>\n");
-
-	pWowlan_option_local = pWowlan_option;
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_enter_wowlan_88xx <==========\n");
-
-	return HALMAC_RET_SUCCESS;
-}
-
-/**
- * halmac_leave_wowlan_88xx() - leave wowlan
- * @pHalmac_adapter
- * Author : KaiYuan Chang/Ivan Lin
- * Return : HALMAC_RET_STATUS
- */
-HALMAC_RET_STATUS
-halmac_leave_wowlan_88xx(
-	IN PHALMAC_ADAPTER pHalmac_adapter
-)
-{
-	VOID *pDriver_adapter = NULL;
-
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
-		return HALMAC_RET_ADAPTER_INVALID;
-
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
-		return HALMAC_RET_API_INVALID;
-
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_LEAVE_WOWLAN);
-
-	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_leave_wowlan_88xx ==========>\n");
-
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_leave_wowlan_88xx <==========\n");
-
-	return HALMAC_RET_SUCCESS;
-}
-
-/**
- * halmac_enter_ps_88xx() - enter power saving state
- * @pHalmac_adapter
- * @ps_state
- *
- * If user has called halmac_cfg_fwlps_option or
- * halmac_cfg_fwips_option, halmac uses the specified setting.
- * Otherwise, halmac uses default setting.
- *
- * Author : KaiYuan Chang/Ivan Lin
- * Return : HALMAC_RET_STATUS
- */
-HALMAC_RET_STATUS
-halmac_enter_ps_88xx(
-	IN PHALMAC_ADAPTER pHalmac_adapter,
-	IN HALMAC_PS_STATE ps_state
-)
-{
-	u8 rpwm;
-	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api;
-	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
-
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
-		return HALMAC_RET_ADAPTER_INVALID;
-
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
-		return HALMAC_RET_API_INVALID;
-
-	if (HALMAC_RET_SUCCESS != halmac_fw_validate(pHalmac_adapter))
-		return HALMAC_RET_NO_DLFW;
-
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_ENTER_PS);
-
-	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_enter_ps_88xx ==========>\n");
-
-	if (ps_state == pHalmac_adapter->halmac_state.ps_state) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "power state is already in PS State!!\n");
-		return HALMAC_RET_SUCCESS;
-	}
-
-	if (HALMAC_PS_STATE_LPS == ps_state) {
-		status = halmac_send_h2c_set_pwr_mode_88xx(pHalmac_adapter, &(pHalmac_adapter->fwlps_option));
-		if (HALMAC_RET_SUCCESS != status) {
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "halmac_send_h2c_set_pwr_mode_88xx error = %x!!\n", status);
-			return status;
-		}
-	} else if (HALMAC_PS_STATE_IPS == ps_state) {
-	}
-
-	pHalmac_adapter->halmac_state.ps_state = ps_state;
-
-	/* Enter 32K */
-	if (HALMAC_INTERFACE_SDIO == pHalmac_adapter->halmac_interface) {
-		if (_TRUE == pHalmac_adapter->fwlps_option.enter_32K) {
-			rpwm = (u8)(((pHalmac_adapter->rpwm_record ^ (BIT(7))) | (BIT(0))) & 0x81);
-			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SDIO_HRPWM1, rpwm);
-			pHalmac_adapter->low_clk = _TRUE;
-		}
-	} else if (HALMAC_INTERFACE_USB == pHalmac_adapter->halmac_interface) {
-		if (_TRUE == pHalmac_adapter->fwlps_option.enter_32K) {
-			rpwm = (u8)(((pHalmac_adapter->rpwm_record ^ (BIT(7))) | (BIT(0))) & 0x81);
-			HALMAC_REG_WRITE_8(pHalmac_adapter, 0xFE58, rpwm);
-			pHalmac_adapter->low_clk = _TRUE;
-		}
-	}
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_enter_ps_88xx <==========\n");
-
-	return HALMAC_RET_SUCCESS;
-}
-
-/**
- * halmac_leave_ps_88xx() - leave power saving state
- * @pHalmac_adapter
- * Author : KaiYuan Chang/Ivan Lin
- * Return : HALMAC_RET_STATUS
- */
-HALMAC_RET_STATUS
-halmac_leave_ps_88xx(
-	IN PHALMAC_ADAPTER pHalmac_adapter
-)
-{
-	u8 rpwm, cpwm;
-	u32 counter;
-	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api;
-	HALMAC_FWLPS_OPTION fw_lps_option;
-	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
-
-
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
-		return HALMAC_RET_ADAPTER_INVALID;
-
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
-		return HALMAC_RET_API_INVALID;
-
-	if (HALMAC_RET_SUCCESS != halmac_fw_validate(pHalmac_adapter))
-		return HALMAC_RET_NO_DLFW;
-
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_LEAVE_PS);
-
-	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_leave_ps_88xx ==========>\n");
-
-	if (HALMAC_PS_STATE_ACT == pHalmac_adapter->halmac_state.ps_state) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "power state is already in active!!\n");
-		return HALMAC_RET_SUCCESS;
-	}
-
-	if (_TRUE == pHalmac_adapter->low_clk) {
-		cpwm = HALMAC_REG_READ_8(pHalmac_adapter, REG_SDIO_HRPWM1);
-		rpwm = (u8)(((pHalmac_adapter->rpwm_record ^ (BIT(7))) | (BIT(6))) & 0xC0);
-		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SDIO_HRPWM1, rpwm);
-
-		cpwm = (u8)((cpwm ^ BIT(7)) & BIT(7));
-		counter = 100;
-		while (cpwm != (HALMAC_REG_READ_8(pHalmac_adapter, REG_SDIO_HRPWM1) & BIT(7))) {
-			PLATFORM_RTL_DELAY_US(pDriver_adapter, 50);
-			counter--;
-			if (0 == counter)
-				return HALMAC_RET_CHANGE_PS_FAIL;
-		}
-		pHalmac_adapter->low_clk = _FALSE;
-	}
-
-	PLATFORM_RTL_MEMCPY(pDriver_adapter, &fw_lps_option, &(pHalmac_adapter->fwlps_option), sizeof(HALMAC_FWLPS_OPTION));
-	fw_lps_option.mode = 0;
-
-	status = halmac_send_h2c_set_pwr_mode_88xx(pHalmac_adapter, &(fw_lps_option));
-	if (HALMAC_RET_SUCCESS != status) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "halmac_send_h2c_set_pwr_mode_88xx error!!=%x\n", status);
-		return status;
-	}
-
-	pHalmac_adapter->halmac_state.ps_state = HALMAC_PS_STATE_ACT;
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_leave_ps_88xx <==========\n");
-
-	return HALMAC_RET_SUCCESS;
-}
-
-/**
- * halmac_h2c_lb_88xx() - send h2c loopback packet
- * @pHalmac_adapter
+ * (debug API)halmac_h2c_lb_88xx() - send h2c loopback packet
+ * @pHalmac_adapter : the adapter of halmac
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_h2c_lb_88xx(
@@ -2413,14 +2270,12 @@ halmac_h2c_lb_88xx(
 {
 	VOID *pDriver_adapter = NULL;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_H2C_LB);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_h2c_lb_88xx ==========>\n");
@@ -2431,10 +2286,11 @@ halmac_h2c_lb_88xx(
 }
 
 /**
- * halmac_debug_88xx() - read some registers for debug
- * @pHalmac_adapter
+ * halmac_debug_88xx() - dump information for debugging
+ * @pHalmac_adapter : the adapter of halmac
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_debug_88xx(
@@ -2446,20 +2302,18 @@ halmac_debug_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_DEBUG);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_debug_88xx ==========>\n");
 
-	if (HALMAC_INTERFACE_SDIO == pHalmac_adapter->halmac_interface) {
+	if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_SDIO) {
 		/* Dump CCCR, it needs new platform api */
 
 		/*Dump SDIO Local Register, use CMD52*/
@@ -2517,10 +2371,10 @@ halmac_debug_88xx(
 }
 
 /**
- * halmac_cfg_parameter_88xx() - config register with register array
- * @pHalmac_adapter
+ * halmac_cfg_parameter_88xx() - config parameter by FW
+ * @pHalmac_adapter : the adapter of halmac
  * @para_info : cmd id, content
- * @full_fifo
+ * @full_fifo : parameter information
  *
  * If msk_en = _TRUE, the format of array is {reg_info, mask, value}.
  * If msk_en =_FAUSE, the format of array is {reg_info, value}
@@ -2540,6 +2394,7 @@ halmac_debug_88xx(
  *
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_parameter_88xx(
@@ -2550,35 +2405,36 @@ halmac_cfg_parameter_88xx(
 {
 	VOID *pDriver_adapter = NULL;
 	HALMAC_RET_STATUS ret_status = HALMAC_RET_SUCCESS;
-	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &(pHalmac_adapter->halmac_state.cfg_para_state_set.process_status);
+	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &pHalmac_adapter->halmac_state.cfg_para_state_set.process_status;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_fw_validate(pHalmac_adapter))
+	if (halmac_fw_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_NO_DLFW;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_PARAMETER);
+	if (pHalmac_adapter->fw_version.h2c_version < 4)
+		return HALMAC_RET_FW_NO_SUPPORT;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	/* PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_cfg_parameter_88xx ==========>\n"); */
 
-	if (HALMAC_DLFW_NONE == pHalmac_adapter->halmac_state.dlfw_state) {
+	if (pHalmac_adapter->halmac_state.dlfw_state == HALMAC_DLFW_NONE) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_cfg_parameter_88xx Fail due to DLFW NONE!!\n");
 		return HALMAC_RET_DLFW_FAIL;
 	}
 
-	if (HALMAC_CMD_PROCESS_SENDING == *pProcess_status) {
+	if (*pProcess_status == HALMAC_CMD_PROCESS_SENDING) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Wait event(cfg para)...\n");
 		return HALMAC_RET_BUSY_STATE;
 	}
 
-	if ((HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE != halmac_query_cfg_para_curr_state_88xx(pHalmac_adapter)) &&
-	    (HALMAC_CFG_PARA_CMD_CONSTRUCT_CONSTRUCTING != halmac_query_cfg_para_curr_state_88xx(pHalmac_adapter))) {
+	if ((halmac_query_cfg_para_curr_state_88xx(pHalmac_adapter) != HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE) &&
+	    (halmac_query_cfg_para_curr_state_88xx(pHalmac_adapter) != HALMAC_CFG_PARA_CMD_CONSTRUCT_CONSTRUCTING)) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Not idle state(cfg para)...\n");
 		return HALMAC_RET_BUSY_STATE;
 	}
@@ -2587,7 +2443,7 @@ halmac_cfg_parameter_88xx(
 
 	ret_status = halmac_send_h2c_phy_parameter_88xx(pHalmac_adapter, para_info, full_fifo);
 
-	if (HALMAC_RET_SUCCESS != ret_status) {
+	if (ret_status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_phy_parameter_88xx Fail!! = %x\n", ret_status);
 		return ret_status;
 	}
@@ -2598,17 +2454,17 @@ halmac_cfg_parameter_88xx(
 }
 
 /**
- * halmac_update_packet_88xx() - send some specified packet to FW
- * @pHalmac_adapter
- * @pkt_id : probe request, sync beacon, discovery beacon
- * @pkt
- * @pkt_size
+ * halmac_update_packet_88xx() - send specific packet to FW
+ * @pHalmac_adapter : the adapter of halmac
+ * @pkt_id : packet id, to know the purpose of this packet
+ * @pkt : packet
+ * @pkt_size : packet size
  *
- * Send new specified packet to FW.
- * Note : TX_DESC is not included in the @pkt
+ * Note : TX_DESC is not included in the pkt
  *
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_update_packet_88xx(
@@ -2619,27 +2475,26 @@ halmac_update_packet_88xx(
 )
 {
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
-	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &(pHalmac_adapter->halmac_state.update_packet_set.process_status);
+	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &pHalmac_adapter->halmac_state.update_packet_set.process_status;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_fw_validate(pHalmac_adapter))
+	if (halmac_fw_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_NO_DLFW;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_UPDATE_PACKET);
+	if (pHalmac_adapter->fw_version.h2c_version < 4)
+		return HALMAC_RET_FW_NO_SUPPORT;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_update_packet_88xx ==========>\n");
 
-	if (HALMAC_CMD_PROCESS_SENDING == *pProcess_status) {
+	if (*pProcess_status == HALMAC_CMD_PROCESS_SENDING) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Wait event(update_packet)...\n");
 		return HALMAC_RET_BUSY_STATE;
 	}
@@ -2648,7 +2503,7 @@ halmac_update_packet_88xx(
 
 	status = halmac_send_h2c_update_packet_88xx(pHalmac_adapter, pkt_id, pkt, pkt_size);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_update_packet_88xx packet = %x,  fail = %x!!\n", pkt_id, status);
 		return status;
 	}
@@ -2658,13 +2513,6 @@ halmac_update_packet_88xx(
 	return HALMAC_RET_SUCCESS;
 }
 
-/**
- * halmac_bcn_ie_filter_88xx() - filter beacon & probe response
- * @pHalmac_adapter
- * @pBcn_ie_info
- * Author : KaiYuan Chang/Ivan Lin
- * Return : HALMAC_RET_STATUS
- */
 HALMAC_RET_STATUS
 halmac_bcn_ie_filter_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
@@ -2674,16 +2522,17 @@ halmac_bcn_ie_filter_88xx(
 	VOID *pDriver_adapter = NULL;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_fw_validate(pHalmac_adapter))
+	if (halmac_fw_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_NO_DLFW;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_BCN_IE_FILTER);
+	if (pHalmac_adapter->fw_version.h2c_version < 4)
+		return HALMAC_RET_FW_NO_SUPPORT;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
@@ -2691,7 +2540,7 @@ halmac_bcn_ie_filter_88xx(
 
 	status = halmac_send_h2c_update_bcn_parse_info_88xx(pHalmac_adapter, pBcn_ie_info);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_update_bcn_parse_info_88xx fail = %x\n", status);
 		return status;
 	}
@@ -2701,14 +2550,6 @@ halmac_bcn_ie_filter_88xx(
 	return HALMAC_RET_SUCCESS;
 }
 
-/**
- * halmac_update_datapack_88xx() -
- * @pHalmac_adapter
- * @halmac_data_type
- * @para_info
- * Author : KaiYuan Chang/Ivan Lin
- * Return : HALMAC_RET_STATUS
- */
 HALMAC_RET_STATUS
 halmac_update_datapack_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
@@ -2717,42 +2558,28 @@ halmac_update_datapack_88xx(
 )
 {
 	VOID *pDriver_adapter = NULL;
-	HALMAC_RET_STATUS ret_status = HALMAC_RET_SUCCESS;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_fw_validate(pHalmac_adapter))
+	if (halmac_fw_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_NO_DLFW;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_UPDATE_DATAPACK);
+	if (pHalmac_adapter->fw_version.h2c_version < 4)
+		return HALMAC_RET_FW_NO_SUPPORT;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_update_datapack_88xx ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]halmac_update_datapack_88xx ==========>\n");
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
-	/* ret_status =  halmac_send_h2c_update_datapack_88xx(pHalmac_adapter, halmac_data_type, para_info); */
-
-	if (HALMAC_RET_SUCCESS != ret_status) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_update_datapack_88xx Fail, datatype = %x, status = %x\n", halmac_data_type, ret_status);
-		return ret_status;
-	}
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_update_datapack_88xx <==========\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]halmac_update_datapack_88xx <==========\n");
 
 	return HALMAC_RET_SUCCESS;
 }
 
-/**
- * halmac_run_datapack_88xx() -
- * @pHalmac_adapter
- * @halmac_data_type
- * Author : KaiYuan Chang/Ivan Lin
- * Return : HALMAC_RET_STATUS
- */
 HALMAC_RET_STATUS
 halmac_run_datapack_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
@@ -2762,16 +2589,17 @@ halmac_run_datapack_88xx(
 	VOID *pDriver_adapter = NULL;
 	HALMAC_RET_STATUS ret_status = HALMAC_RET_SUCCESS;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_fw_validate(pHalmac_adapter))
+	if (halmac_fw_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_NO_DLFW;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_RUN_DATAPACK);
+	if (pHalmac_adapter->fw_version.h2c_version < 4)
+		return HALMAC_RET_FW_NO_SUPPORT;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
@@ -2779,7 +2607,7 @@ halmac_run_datapack_88xx(
 
 	ret_status = halmac_send_h2c_run_datapack_88xx(pHalmac_adapter, halmac_data_type);
 
-	if (HALMAC_RET_SUCCESS != ret_status) {
+	if (ret_status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_run_datapack_88xx Fail, datatype = %x, status = %x!!\n", halmac_data_type, ret_status);
 		return ret_status;
 	}
@@ -2791,10 +2619,11 @@ halmac_run_datapack_88xx(
 
 /**
  * halmac_cfg_drv_info_88xx() - config driver info
- * @pHalmac_adapter
- * @halmac_drv_info : none, phy status, phy sniffer, phy plcp
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_drv_info : driver information selection
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_drv_info_88xx(
@@ -2811,20 +2640,17 @@ halmac_cfg_drv_info_88xx(
 	PHALMAC_API pHalmac_api;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_DRV_INFO);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_cfg_drv_info_88xx ==========>\n");
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_cfg_drv_info = %d\n", halmac_drv_info);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]halmac_cfg_drv_info_88xx ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]halmac_cfg_drv_info = %d\n", halmac_drv_info);
 
 	switch (halmac_drv_info) {
 	case HALMAC_DRV_INFO_NONE:
@@ -2857,21 +2683,24 @@ halmac_cfg_drv_info_88xx(
 		return status;
 	}
 
-	pHalmac_adapter->drv_info_size = drv_info_size;
+	if (pHalmac_adapter->txff_allocation.rx_fifo_expanding_mode != HALMAC_RX_FIFO_EXPANDING_MODE_DISABLE)
+		drv_info_size = HALMAC_RX_DESC_DUMMY_SIZE_MAX_88XX >> 3;
 
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_RX_DRVINFO_SZ, drv_info_size);
 
+	pHalmac_adapter->drv_info_size = drv_info_size;
+
 	value32 = HALMAC_REG_READ_32(pHalmac_adapter, REG_RCR);
 	value32 = (value32 & (~BIT_APP_PHYSTS));
-	if (1 == phy_status_en)
+	if (phy_status_en == 1)
 		value32 = value32 | BIT_APP_PHYSTS;
 	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_RCR, value32);
 
 	value32 = HALMAC_REG_READ_32(pHalmac_adapter, REG_WMAC_OPTION_FUNCTION + 4);
 	value32 = (value32 & (~(BIT(8) | BIT(9))));
-	if (1 == sniffer_en)
+	if (sniffer_en == 1)
 		value32 = value32 | BIT(9);
-	if (1 == plcp_hdr_en)
+	if (plcp_hdr_en == 1)
 		value32 = value32 | BIT(8);
 	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_WMAC_OPTION_FUNCTION + 4, value32);
 
@@ -2880,15 +2709,6 @@ halmac_cfg_drv_info_88xx(
 	return HALMAC_RET_SUCCESS;
 }
 
-/**
- * halmac_send_bt_coex_88xx() -
- * @pHalmac_adapter
- * @pBt_buf
- * @bt_size
- * @ack
- * Author : KaiYuan Chang/Ivan Lin
- * Return : HALMAC_RET_STATUS
- */
 HALMAC_RET_STATUS
 halmac_send_bt_coex_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
@@ -2898,28 +2718,24 @@ halmac_send_bt_coex_88xx(
 )
 {
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api;
 	HALMAC_RET_STATUS ret_status = HALMAC_RET_SUCCESS;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_fw_validate(pHalmac_adapter))
+	if (halmac_fw_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_NO_DLFW;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_SEND_BT_COEX);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_send_bt_coex_88xx ==========>\n");
 
 	ret_status = halmac_send_bt_coex_cmd_88xx(pHalmac_adapter, pBt_buf, bt_size, ack);
 
-	if (HALMAC_RET_SUCCESS != ret_status) {
+	if (ret_status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_bt_coex_cmd_88xx Fail = %x!!\n", ret_status);
 		return ret_status;
 	}
@@ -2930,10 +2746,11 @@ halmac_send_bt_coex_88xx(
 }
 
 /**
- * halmac_verify_platform_api_88xx() - verify platform api
- * @pHalmac_adapter
+ * (debug API)halmac_verify_platform_api_88xx() - verify platform api
+ * @pHalmac_adapter : the adapter of halmac
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_verify_platform_api_88xx(
@@ -2943,27 +2760,25 @@ halmac_verify_platform_api_88xx(
 	VOID *pDriver_adapter = NULL;
 	HALMAC_RET_STATUS ret_status = HALMAC_RET_SUCCESS;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_VERIFY_PLATFORM_API);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_verify_platform_api_88xx ==========>\n");
 
 	ret_status = halmac_verify_io_88xx(pHalmac_adapter);
 
-	if (HALMAC_RET_SUCCESS != ret_status)
+	if (ret_status != HALMAC_RET_SUCCESS)
 		return ret_status;
 
-	if (HALMAC_LA_MODE_FULL != pHalmac_adapter->txff_allocation.la_mode)
+	if (pHalmac_adapter->txff_allocation.la_mode != HALMAC_LA_MODE_FULL)
 		ret_status = halmac_verify_send_rsvd_page_88xx(pHalmac_adapter);
 
-	if (HALMAC_RET_SUCCESS != ret_status)
+	if (ret_status != HALMAC_RET_SUCCESS)
 		return ret_status;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_verify_platform_api_88xx <==========\n");
@@ -2971,15 +2786,6 @@ halmac_verify_platform_api_88xx(
 	return ret_status;
 }
 
-/**
- * halmac_send_original_h2c_88xx() - send original format h2c packet
- * @pHalmac_adapter
- * @original_h2c
- * @seq
- * @ack
- * Author : KaiYuan Chang/Ivan Lin
- * Return : HALMAC_RET_STATUS
- */
 HALMAC_RET_STATUS
 halmac_send_original_h2c_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
@@ -2989,28 +2795,24 @@ halmac_send_original_h2c_88xx(
 )
 {
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_fw_validate(pHalmac_adapter))
+	if (halmac_fw_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_NO_DLFW;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_SEND_ORIGINAL_H2C);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_send_original_h2c_88xx ==========>\n");
 
 	status = halmac_func_send_original_h2c_88xx(pHalmac_adapter, original_h2c, seq, ack);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_original_h2c FAIL = %x!!\n", status);
 		return status;
 	}
@@ -3020,12 +2822,6 @@ halmac_send_original_h2c_88xx(
 	return HALMAC_RET_SUCCESS;
 }
 
-/**
- * halmac_timer_2s_88xx() - periodic operation
- * @pHalmac_adapter
- * Author : KaiYuan Chang/Ivan Lin
- * Return : HALMAC_RET_STATUS
- */
 HALMAC_RET_STATUS
 halmac_timer_2s_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter
@@ -3033,10 +2829,10 @@ halmac_timer_2s_88xx(
 {
 	VOID *pDriver_adapter = NULL;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
@@ -3051,13 +2847,11 @@ halmac_timer_2s_88xx(
 
 /**
  * halmac_fill_txdesc_check_sum_88xx() -  fill in tx desc check sum
- * @pHalmac_adapter
- * @pCur_desc
- *
- * User input tx descriptor, halmac output tx descriptor check sum
- *
+ * @pHalmac_adapter : the adapter of halmac
+ * @pCur_desc : tx desc packet
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_fill_txdesc_check_sum_88xx(
@@ -3069,21 +2863,16 @@ halmac_fill_txdesc_check_sum_88xx(
 	u16 *pData = (u16 *)NULL;
 	u32 i;
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_FILL_TXDESC_CHECKSUM);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
-
 
-	if (NULL == pCur_desc) {
+	if (pCur_desc == NULL) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_fill_txdesc_check_sum_88xx NULL PTR");
 		return HALMAC_RET_NULL_POINTER;
 	}
@@ -3096,6 +2885,10 @@ halmac_fill_txdesc_check_sum_88xx(
 	for (i = 0; i < 8; i++)
 		chk_result ^= (*(pData + 2 * i) ^ *(pData + (2 * i + 1)));
 
+	/* *(pData + 2 * i) & *(pData + (2 * i + 1) have endain issue*/
+	/* Process eniadn issue after checksum calculation */
+	chk_result = rtk_le16_to_cpu(chk_result);
+
 	SET_TX_DESC_TXDESC_CHECKSUM(pCur_desc, chk_result);
 
 	return HALMAC_RET_SUCCESS;
@@ -3103,16 +2896,18 @@ halmac_fill_txdesc_check_sum_88xx(
 
 /**
  * halmac_dump_fifo_88xx() - dump fifo data
- * @pHalmac_adapter
- * @halmac_fifo_sel : tx, rx, rsvd page, report buff, llt
- * @pFifo_map
- * @halmac_fifo_dump_size
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_fifo_sel : FIFO selection
+ * @halmac_start_addr : start address of selected FIFO
+ * @halmac_fifo_dump_size : dump size of selected FIFO
+ * @pFifo_map : FIFO data
  *
  * Note : before dump fifo, user need to call halmac_get_fifo_size to
  * get fifo size. Then input this size to halmac_dump_fifo.
  *
  * Author : Ivan Lin/KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_dump_fifo_88xx(
@@ -3126,41 +2921,39 @@ halmac_dump_fifo_88xx(
 	VOID *pDriver_adapter = NULL;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_DUMP_FIFO);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_dump_fifo_88xx ==========>\n");
 
-	if (HAL_FIFO_SEL_TX == halmac_fifo_sel && (halmac_start_addr + halmac_fifo_dump_size) > pHalmac_adapter->hw_config_info.tx_fifo_size) {
+	if (halmac_fifo_sel == HAL_FIFO_SEL_TX && (halmac_start_addr + halmac_fifo_dump_size) > pHalmac_adapter->hw_config_info.tx_fifo_size) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "TX fifo dump size is too large\n");
 		return HALMAC_RET_DUMP_FIFOSIZE_INCORRECT;
 	}
 
-	if (HAL_FIFO_SEL_RX == halmac_fifo_sel && (halmac_start_addr + halmac_fifo_dump_size) > pHalmac_adapter->hw_config_info.rx_fifo_size) {
+	if (halmac_fifo_sel == HAL_FIFO_SEL_RX && (halmac_start_addr + halmac_fifo_dump_size) > pHalmac_adapter->hw_config_info.rx_fifo_size) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "RX fifo dump size is too large\n");
 		return HALMAC_RET_DUMP_FIFOSIZE_INCORRECT;
 	}
 
-	if (0 != (halmac_fifo_dump_size & (4 - 1))) {
+	if ((halmac_fifo_dump_size & (4 - 1)) != 0) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_fifo_dump_size shall 4byte align\n");
 		return HALMAC_RET_DUMP_FIFOSIZE_INCORRECT;
 	}
 
-	if (NULL == pFifo_map) {
+	if (pFifo_map == NULL) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "pFifo_map address is NULL\n");
 		return HALMAC_RET_NULL_POINTER;
 	}
 
 	status = halmac_buffer_read_88xx(pHalmac_adapter, halmac_start_addr, halmac_fifo_dump_size, halmac_fifo_sel, pFifo_map);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_buffer_read_88xx error = %x\n", status);
 		return status;
 	}
@@ -3172,10 +2965,11 @@ halmac_dump_fifo_88xx(
 
 /**
  * halmac_get_fifo_size_88xx() - get fifo size
- * @pHalmac_adapter
- * @halmac_fifo_sel : tx, rx, rsvd page, report buff, llt
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_fifo_sel : FIFO selection
  * Author : Ivan Lin/KaiYuan Chang
- * Return : fifo size
+ * Return : u32
+ * More details of status code can be found in prototype document
  */
 u32
 halmac_get_fifo_size_88xx(
@@ -3185,33 +2979,38 @@ halmac_get_fifo_size_88xx(
 {
 	u32 fifo_size = 0;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_GET_FIFO_SIZE);
-
-	if (HAL_FIFO_SEL_TX == halmac_fifo_sel)
+	if (halmac_fifo_sel == HAL_FIFO_SEL_TX)
 		fifo_size = pHalmac_adapter->hw_config_info.tx_fifo_size;
-	else if (HAL_FIFO_SEL_RX == halmac_fifo_sel)
+	else if (halmac_fifo_sel == HAL_FIFO_SEL_RX)
 		fifo_size = pHalmac_adapter->hw_config_info.rx_fifo_size;
-	else if (HAL_FIFO_SEL_RSVD_PAGE == halmac_fifo_sel)
-		fifo_size = ((pHalmac_adapter->hw_config_info.tx_fifo_size >> 7) - pHalmac_adapter->txff_allocation.rsvd_pg_bndy) << 7;
-	else if (HAL_FIFO_SEL_REPORT == halmac_fifo_sel)
+	else if (halmac_fifo_sel == HAL_FIFO_SEL_RSVD_PAGE)
+		fifo_size = ((pHalmac_adapter->hw_config_info.tx_fifo_size >> HALMAC_TX_PAGE_SIZE_2_POWER_88XX)
+						- pHalmac_adapter->txff_allocation.rsvd_pg_bndy) << HALMAC_TX_PAGE_SIZE_2_POWER_88XX;
+	else if (halmac_fifo_sel == HAL_FIFO_SEL_REPORT)
 		fifo_size = 65536;
-	else if (HAL_FIFO_SEL_LLT == halmac_fifo_sel)
+	else if (halmac_fifo_sel == HAL_FIFO_SEL_LLT)
 		fifo_size = 65536;
+	else if (halmac_fifo_sel == HAL_FIFO_SEL_RXBUF_FW)
+		fifo_size = HALMAC_RX_BUF_FW_88XX;
 
 	return fifo_size;
 }
 
 /**
  * halmac_cfg_txbf_88xx() - enable/disable specific user's txbf
- * @pHalmac_adapter
+ * @pHalmac_adapter : the adapter of halmac
+ * @userid : su bfee userid = 0 or 1 to apply TXBF
+ * @bw : the sounding bandwidth
+ * @txbf_en : 0: disable TXBF, 1: enable TXBF
  * Author : chunchu
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_txbf_88xx(
@@ -3225,14 +3024,12 @@ halmac_cfg_txbf_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_TXBF);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -3271,10 +3068,12 @@ halmac_cfg_txbf_88xx(
 }
 
 /**
- * halmac_cfg_mumimo_88xx() -
- * @pHalmac_adapter
+ * halmac_cfg_mumimo_88xx() -config mumimo
+ * @pHalmac_adapter : the adapter of halmac
+ * @pCfgmu : parameters to configure MU PPDU Tx/Rx
  * Author : chunchu
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_mumimo_88xx(
@@ -3289,33 +3088,31 @@ halmac_cfg_mumimo_88xx(
 	u32 gid_valid[6] = {0};
 	u8 temp14C0 = 0;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_MUMIMO);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	if (pCfgmu->role == HAL_BFEE) {
 		/*config MU BFEE*/
 		temp14C0 = HALMAC_REG_READ_8(pHalmac_adapter, REG_MU_TX_CTL) & ~BIT_MASK_R_MU_TABLE_VALID;
-		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MU_TX_CTL, (temp14C0|BIT(0)|BIT(1)) & ~(BIT(7)));	/*enable MU table 0 and 1, disable MU TX*/
+		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MU_TX_CTL, (temp14C0 | BIT(0) | BIT(1)) & ~(BIT(7)));	/*enable MU table 0 and 1, disable MU TX*/
 
 		/*config GID valid table and user position table*/
-		mu_tab_sel = HALMAC_REG_READ_8(pHalmac_adapter, REG_MU_TX_CTL+1) & ~(BIT(0)|BIT(1)|BIT(2));
+		mu_tab_sel = HALMAC_REG_READ_8(pHalmac_adapter, REG_MU_TX_CTL + 1) & ~(BIT(0) | BIT(1) | BIT(2));
 		for (i = 0; i < 2; i++) {
-			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MU_TX_CTL+1, mu_tab_sel | i);
+			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MU_TX_CTL + 1, mu_tab_sel | i);
 			HALMAC_REG_WRITE_32(pHalmac_adapter, REG_MU_STA_GID_VLD, pCfgmu->given_gid_tab[i]);
-			HALMAC_REG_WRITE_32(pHalmac_adapter, REG_MU_STA_USER_POS_INFO, pCfgmu->given_user_pos[i*2]);
-			HALMAC_REG_WRITE_32(pHalmac_adapter, REG_MU_STA_USER_POS_INFO+4, pCfgmu->given_user_pos[i*2+1]);
+			HALMAC_REG_WRITE_32(pHalmac_adapter, REG_MU_STA_USER_POS_INFO, pCfgmu->given_user_pos[i * 2]);
+			HALMAC_REG_WRITE_32(pHalmac_adapter, REG_MU_STA_USER_POS_INFO + 4, pCfgmu->given_user_pos[i * 2 + 1]);
 		}
 	} else {
 		/*config MU BFER*/
-		if (_FALSE == pCfgmu->mu_tx_en) {
+		if (pCfgmu->mu_tx_en == _FALSE) {
 			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MU_TX_CTL, HALMAC_REG_READ_8(pHalmac_adapter, REG_MU_TX_CTL) & ~(BIT(7)));
 			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_SND, HALMAC_DBG_TRACE, "halmac_cfg_mumimo_88xx disable mu tx <==========\n");
 			return HALMAC_RET_SUCCESS;
@@ -3366,15 +3163,15 @@ halmac_cfg_mumimo_88xx(
 		}
 
 		/*set MU STA GID valid TABLE*/
-		mu_tab_sel = HALMAC_REG_READ_8(pHalmac_adapter, REG_MU_TX_CTL+1) & ~(BIT(0)|BIT(1)|BIT(2));
+		mu_tab_sel = HALMAC_REG_READ_8(pHalmac_adapter, REG_MU_TX_CTL + 1) & ~(BIT(0) | BIT(1) | BIT(2));
 		for (idx = 0; idx < 6; idx++) {
-			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MU_TX_CTL+1, idx | mu_tab_sel);
+			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MU_TX_CTL + 1, idx | mu_tab_sel);
 			HALMAC_REG_WRITE_32(pHalmac_adapter, REG_MU_STA_GID_VLD, gid_valid[idx]);
 		}
 
 		/*To validate the sounding successful MU STA and enable MU TX*/
 		for (i = 0; i < 6; i++) {
-			if (_TRUE == pCfgmu->sounding_sts[i])
+			if (pCfgmu->sounding_sts[i] == _TRUE)
 				mu_tab_valid |= BIT(i);
 		}
 		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MU_TX_CTL, mu_tab_valid | BIT(7));
@@ -3384,10 +3181,13 @@ halmac_cfg_mumimo_88xx(
 }
 
 /**
- * halmac_cfg_sounding_88xx() - set general sounding control registers
- * @pHalmac_adapter
+ * halmac_cfg_sounding_88xx() - configure general sounding
+ * @pHalmac_adapter : the adapter of halmac
+ * @role : driver's role, BFer or BFee
+ * @datarate : set ndpa tx rate if driver is BFer, or set csi response rate if driver is BFee
  * Author : chunchu
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_sounding_88xx(
@@ -3399,14 +3199,12 @@ halmac_cfg_sounding_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_SOUNDING);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -3421,7 +3219,7 @@ halmac_cfg_sounding_88xx(
 		break;
 	case HAL_BFEE:
 		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SND_PTCL_CTRL, 0xDB);
-		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SND_PTCL_CTRL + 3, 0x50);
+		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SND_PTCL_CTRL + 3, 0x24);
 		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_BBPSF_CTRL + 3, HALMAC_OFDM54 | BIT(6));		//use ndpa rx rate to decide csi rate
 		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_RRSR, HALMAC_REG_READ_16(pHalmac_adapter, REG_RRSR) | BIT(datarate));
 		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_RXFLTMAP1, HALMAC_REG_READ_8(pHalmac_adapter, REG_RXFLTMAP1) & (~(BIT(4))));	/*RXFF do not accept BF Rpt Poll, avoid CSI crc error*/
@@ -3438,10 +3236,12 @@ halmac_cfg_sounding_88xx(
 }
 
 /**
- * halmac_del_sounding_88xx() - reset general sounding control registers
- * @pHalmac_adapter
+ * halmac_del_sounding_88xx() - reset general sounding
+ * @pHalmac_adapter : the adapter of halmac
+ * @role : driver's role, BFer or BFee
  * Author : chunchu
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_del_sounding_88xx(
@@ -3452,14 +3252,12 @@ halmac_del_sounding_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_DEL_SOUNDING);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -3482,9 +3280,12 @@ halmac_del_sounding_88xx(
 
 /**
  * halmac_su_bfee_entry_init_88xx() - config SU beamformee's registers
- * @pHalmac_adapter
+ * @pHalmac_adapter : the adapter of halmac
+ * @userid : SU bfee userid = 0 or 1 to be added
+ * @paid : partial AID of this bfee
  * Author : chunchu
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_su_bfee_entry_init_88xx(
@@ -3497,14 +3298,12 @@ halmac_su_bfee_entry_init_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_SU_BFEE_ENTRY_INIT);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -3512,13 +3311,12 @@ halmac_su_bfee_entry_init_88xx(
 	case 0:
 		temp42C = HALMAC_REG_READ_16(pHalmac_adapter, REG_TXBF_CTRL) & ~(BIT_MASK_R_TXBF0_AID | BIT_R_TXBF0_20M | BIT_R_TXBF0_40M | BIT_R_TXBF0_80M);
 		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_TXBF_CTRL, temp42C | paid);
-		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_ASSOCIATED_BFMEE_SEL + 3, 0x60);
-		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_ASSOCIATED_BFMEE_SEL, paid | BIT(9));
+		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_ASSOCIATED_BFMEE_SEL, paid);
 		break;
 	case 1:
 		temp42C = HALMAC_REG_READ_16(pHalmac_adapter, REG_TXBF_CTRL + 2) & ~(BIT_MASK_R_TXBF1_AID | BIT_R_TXBF0_20M | BIT_R_TXBF0_40M | BIT_R_TXBF0_80M);
 		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_TXBF_CTRL + 2, temp42C | paid);
-		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_ASSOCIATED_BFMEE_SEL + 2, paid | BIT(9) | 0xe000);
+		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_ASSOCIATED_BFMEE_SEL + 2, paid | BIT(9));
 		break;
 	default:
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_SND, HALMAC_DBG_ERR, "halmac_su_bfee_entry_init_88xx invalid userid %d\n", userid);
@@ -3532,9 +3330,11 @@ halmac_su_bfee_entry_init_88xx(
 
 /**
  * halmac_su_bfee_entry_init_88xx() - config SU beamformer's registers
- * @pHalmac_adapter
+ * @pHalmac_adapter : the adapter of halmac
+ * @pSu_bfer_init : parameters to configure SU BFER entry
  * Author : chunchu
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_su_bfer_entry_init_88xx(
@@ -3547,14 +3347,12 @@ halmac_su_bfer_entry_init_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_SU_BFER_ENTRY_INIT);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -3589,9 +3387,11 @@ halmac_su_bfer_entry_init_88xx(
 
 /**
  * halmac_mu_bfee_entry_init_88xx() - config MU beamformee's registers
- * @pHalmac_adapter
+ * @pHalmac_adapter : the adapter of halmac
+ * @pMu_bfee_init : parameters to configure MU BFEE entry
  * Author : chunchu
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_mu_bfee_entry_init_88xx(
@@ -3603,25 +3403,23 @@ halmac_mu_bfee_entry_init_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_MU_BFEE_ENTRY_INIT);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	temp168X |= pMu_bfee_init->paid | BIT(9);
 	HALMAC_REG_WRITE_16(pHalmac_adapter, (0x1680 + pMu_bfee_init->userid * 2), temp168X);
 
-	temp14C0 = HALMAC_REG_READ_16(pHalmac_adapter, REG_MU_TX_CTL) & ~(BIT(8)|BIT(9)|BIT(10));
-	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_MU_TX_CTL, temp14C0|((pMu_bfee_init->userid-2)<<8));
+	temp14C0 = HALMAC_REG_READ_16(pHalmac_adapter, REG_MU_TX_CTL) & ~(BIT(8) | BIT(9) | BIT(10));
+	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_MU_TX_CTL, temp14C0 | ((pMu_bfee_init->userid - 2) << 8));
 	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_MU_STA_GID_VLD, 0);
 	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_MU_STA_USER_POS_INFO, pMu_bfee_init->user_position_l);
-	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_MU_STA_USER_POS_INFO+4, pMu_bfee_init->user_position_h);
+	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_MU_STA_USER_POS_INFO + 4, pMu_bfee_init->user_position_h);
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_SND, HALMAC_DBG_TRACE, "halmac_mu_bfee_entry_init_88xx <==========\n");
 
@@ -3629,10 +3427,12 @@ halmac_mu_bfee_entry_init_88xx(
 }
 
 /**
- * halmac_mu_bfer_entry_init_88xx() - config SU beamformer's registers
- * @pHalmac_adapter
+ * halmac_mu_bfer_entry_init_88xx() - config MU beamformer's registers
+ * @pHalmac_adapter : the adapter of halmac
+ * @pMu_bfer_init : parameters to configure MU BFER entry
  * Author : chunchu
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_mu_bfer_entry_init_88xx(
@@ -3646,14 +3446,12 @@ halmac_mu_bfer_entry_init_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_MU_BFER_ENTRY_INIT);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -3679,9 +3477,11 @@ halmac_mu_bfer_entry_init_88xx(
 
 /**
  * halmac_su_bfee_entry_del_88xx() - reset SU beamformee's registers
- * @pHalmac_adapter
+ * @pHalmac_adapter : the adapter of halmac
+ * @userid : the SU BFee userid to be deleted
  * Author : chunchu
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_su_bfee_entry_del_88xx(
@@ -3692,14 +3492,12 @@ halmac_su_bfee_entry_del_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_SU_BFEE_ENTRY_DEL);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -3726,9 +3524,11 @@ halmac_su_bfee_entry_del_88xx(
 
 /**
  * halmac_su_bfee_entry_del_88xx() - reset SU beamformer's registers
- * @pHalmac_adapter
+ * @pHalmac_adapter : the adapter of halmac
+ * @userid : the SU BFer userid to be deleted
  * Author : chunchu
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_su_bfer_entry_del_88xx(
@@ -3739,14 +3539,12 @@ halmac_su_bfer_entry_del_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_SU_BFER_ENTRY_DEL);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -3771,9 +3569,11 @@ halmac_su_bfer_entry_del_88xx(
 
 /**
  * halmac_mu_bfee_entry_del_88xx() - reset MU beamformee's registers
- * @pHalmac_adapter
+ * @pHalmac_adapter : the adapter of halmac
+ * @userid : the MU STA userid to be deleted
  * Author : chunchu
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_mu_bfee_entry_del_88xx(
@@ -3784,19 +3584,17 @@ halmac_mu_bfee_entry_del_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_MU_BFEE_ENTRY_DEL);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	HALMAC_REG_WRITE_16(pHalmac_adapter, 0x1680 + userid * 2, 0);
-	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MU_TX_CTL, HALMAC_REG_READ_8(pHalmac_adapter, REG_MU_TX_CTL) & ~(BIT(userid-2)));
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MU_TX_CTL, HALMAC_REG_READ_8(pHalmac_adapter, REG_MU_TX_CTL) & ~(BIT(userid - 2)));
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_SND, HALMAC_DBG_TRACE, "halmac_mu_bfee_entry_del_88xx <==========\n");
 
@@ -3805,9 +3603,10 @@ halmac_mu_bfee_entry_del_88xx(
 
 /**
  * halmac_mu_bfer_entry_del_88xx() -reset MU beamformer's registers
- * @pHalmac_adapter
+ * @pHalmac_adapter : the adapter of halmac
  * Author : chunchu
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_mu_bfer_entry_del_88xx(
@@ -3817,14 +3616,12 @@ halmac_mu_bfer_entry_del_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_MU_BFER_ENTRY_DEL);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -3839,11 +3636,12 @@ halmac_mu_bfer_entry_del_88xx(
 }
 
 /**
- * halmac_add_ch_info_88xx() -used to construct channel info
- * @pHalmac_adapter
- * @pCh_info
+ * halmac_add_ch_info_88xx() -add channel information
+ * @pHalmac_adapter : the adapter of halmac
+ * @pCh_info : channel information
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_add_ch_info_88xx(
@@ -3855,32 +3653,32 @@ halmac_add_ch_info_88xx(
 	PHALMAC_CS_INFO pCh_sw_info;
 	HALMAC_SCAN_CMD_CONSTRUCT_STATE state_scan;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_ADD_CH_INFO);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pCh_sw_info = &(pHalmac_adapter->ch_sw_info);
+	pCh_sw_info = &pHalmac_adapter->ch_sw_info;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_add_ch_info_88xx ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]halmac_add_ch_info_88xx ==========>\n");
 
-	if (HALMAC_GEN_INFO_SENT != pHalmac_adapter->halmac_state.dlfw_state) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_add_ch_info_88xx: gen_info is not send to FW!!!!\n");
+	if (pHalmac_adapter->halmac_state.dlfw_state != HALMAC_GEN_INFO_SENT) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]halmac_add_ch_info_88xx: gen_info is not send to FW!!!!\n");
 		return HALMAC_RET_GEN_INFO_NOT_SENT;
 	}
 
 	state_scan = halmac_query_scan_curr_state_88xx(pHalmac_adapter);
-	if ((HALMAC_SCAN_CMD_CONSTRUCT_BUFFER_CLEARED != state_scan) && (HALMAC_SCAN_CMD_CONSTRUCT_CONSTRUCTING != state_scan)) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Scan machine fail(add ch info)...\n");
+	if ((state_scan != HALMAC_SCAN_CMD_CONSTRUCT_BUFFER_CLEARED) && (state_scan != HALMAC_SCAN_CMD_CONSTRUCT_CONSTRUCTING)) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_WARN, "[WARN]Scan machine fail(add ch info)...\n");
 		return HALMAC_RET_ERROR_STATE;
 	}
 
-	if (NULL == pCh_sw_info->ch_info_buf) {
+	if (pCh_sw_info->ch_info_buf == NULL) {
 		pCh_sw_info->ch_info_buf = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, HALMAC_EXTRA_INFO_BUFF_SIZE_88XX);
+		if (pCh_sw_info->ch_info_buf == NULL)
+			return HALMAC_RET_NULL_POINTER;
 		pCh_sw_info->ch_info_buf_w = pCh_sw_info->ch_info_buf;
 		pCh_sw_info->buf_size = HALMAC_EXTRA_INFO_BUFF_SIZE_88XX;
 		pCh_sw_info->avai_buf_size = HALMAC_EXTRA_INFO_BUFF_SIZE_88XX;
@@ -3889,17 +3687,17 @@ halmac_add_ch_info_88xx(
 		pCh_sw_info->ch_num = 0;
 	}
 
-	if (1 == pCh_sw_info->extra_info_en) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_add_ch_info_88xx: construct sequence wrong!!\n");
+	if (pCh_sw_info->extra_info_en == 1) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]halmac_add_ch_info_88xx: construct sequence wrong!!\n");
 		return HALMAC_RET_CH_SW_SEQ_WRONG;
 	}
 
-	if (4 > pCh_sw_info->avai_buf_size) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_add_ch_info_88xx: no available buffer!!\n");
+	if (pCh_sw_info->avai_buf_size < 4) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]halmac_add_ch_info_88xx: no available buffer!!\n");
 		return HALMAC_RET_CH_SW_NO_BUF;
 	}
 
-	if (HALMAC_RET_SUCCESS != halmac_transition_scan_state_88xx(pHalmac_adapter, HALMAC_SCAN_CMD_CONSTRUCT_CONSTRUCTING))
+	if (halmac_transition_scan_state_88xx(pHalmac_adapter, HALMAC_SCAN_CMD_CONSTRUCT_CONSTRUCTING) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ERROR_STATE;
 
 	CHANNEL_INFO_SET_CHANNEL(pCh_sw_info->ch_info_buf_w, pCh_info->channel);
@@ -3915,17 +3713,18 @@ halmac_add_ch_info_88xx(
 	pCh_sw_info->extra_info_en = pCh_info->extra_info;
 	pCh_sw_info->ch_info_buf_w = pCh_sw_info->ch_info_buf_w + 4;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_add_ch_info_88xx <==========\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]halmac_add_ch_info_88xx <==========\n");
 
 	return HALMAC_RET_SUCCESS;
 }
 
 /**
- * halmac_add_extra_ch_info_88xx() -used to construct extra channel info
- * @pHalmac_adapter
- * @pCh_extra_info
+ * halmac_add_extra_ch_info_88xx() -add extra channel information
+ * @pHalmac_adapter : the adapter of halmac
+ * @pCh_extra_info : extra channel information
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_add_extra_ch_info_88xx(
@@ -3936,25 +3735,23 @@ halmac_add_extra_ch_info_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_CS_INFO pCh_sw_info;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_ADD_EXTRA_CH_INFO);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pCh_sw_info = &(pHalmac_adapter->ch_sw_info);
+	pCh_sw_info = &pHalmac_adapter->ch_sw_info;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_add_extra_ch_info_88xx ==========>\n");
 
-	if (NULL == pCh_sw_info->ch_info_buf) {
+	if (pCh_sw_info->ch_info_buf == NULL) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_add_extra_ch_info_88xx: NULL==pCh_sw_info->ch_info_buf!!\n");
 		return HALMAC_RET_CH_SW_SEQ_WRONG;
 	}
 
-	if (0 == pCh_sw_info->extra_info_en) {
+	if (pCh_sw_info->extra_info_en == 0) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_add_extra_ch_info_88xx: construct sequence wrong!!\n");
 		return HALMAC_RET_CH_SW_SEQ_WRONG;
 	}
@@ -3964,12 +3761,12 @@ halmac_add_extra_ch_info_88xx(
 		return HALMAC_RET_CH_SW_NO_BUF;
 	}
 
-	if (HALMAC_SCAN_CMD_CONSTRUCT_CONSTRUCTING != halmac_query_scan_curr_state_88xx(pHalmac_adapter)) {
+	if (halmac_query_scan_curr_state_88xx(pHalmac_adapter) != HALMAC_SCAN_CMD_CONSTRUCT_CONSTRUCTING) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Scan machine fail(add extra ch info)...\n");
 		return HALMAC_RET_ERROR_STATE;
 	}
 
-	if (HALMAC_RET_SUCCESS != halmac_transition_scan_state_88xx(pHalmac_adapter, HALMAC_SCAN_CMD_CONSTRUCT_CONSTRUCTING))
+	if (halmac_transition_scan_state_88xx(pHalmac_adapter, HALMAC_SCAN_CMD_CONSTRUCT_CONSTRUCTING) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ERROR_STATE;
 
 	CH_EXTRA_INFO_SET_CH_EXTRA_INFO_ID(pCh_sw_info->ch_info_buf_w, pCh_extra_info->extra_action_id);
@@ -3988,11 +3785,12 @@ halmac_add_extra_ch_info_88xx(
 }
 
 /**
- * halmac_ctrl_ch_switch_88xx() -used to send channel switch cmd
- * @pHalmac_adapter
- * @pCs_option
+ * halmac_ctrl_ch_switch_88xx() -send channel switch cmd
+ * @pHalmac_adapter : the adapter of halmac
+ * @pCs_option : channel switch config
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_ctrl_ch_switch_88xx(
@@ -4004,40 +3802,41 @@ halmac_ctrl_ch_switch_88xx(
 	PHALMAC_API pHalmac_api;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 	HALMAC_SCAN_CMD_CONSTRUCT_STATE state_scan;
-	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &(pHalmac_adapter->halmac_state.scan_state_set.process_status);
+	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &pHalmac_adapter->halmac_state.scan_state_set.process_status;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_fw_validate(pHalmac_adapter))
+	if (halmac_fw_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_NO_DLFW;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CTRL_CH_SWITCH);
+	if (pHalmac_adapter->fw_version.h2c_version < 4)
+		return HALMAC_RET_FW_NO_SUPPORT;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_ctrl_ch_switch_88xx  pCs_option->switch_en = %d==========>\n", pCs_option->switch_en);
 
-	if (_FALSE == pCs_option->switch_en)
+	if (pCs_option->switch_en == _FALSE)
 		*pProcess_status = HALMAC_CMD_PROCESS_IDLE;
 
-	if ((HALMAC_CMD_PROCESS_SENDING == *pProcess_status) || (HALMAC_CMD_PROCESS_RCVD == *pProcess_status)) {
+	if ((*pProcess_status == HALMAC_CMD_PROCESS_SENDING) || (*pProcess_status == HALMAC_CMD_PROCESS_RCVD)) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Wait event(ctrl ch switch)...\n");
 		return HALMAC_RET_BUSY_STATE;
 	}
 
 	state_scan = halmac_query_scan_curr_state_88xx(pHalmac_adapter);
-	if (_TRUE == pCs_option->switch_en) {
-		if (HALMAC_SCAN_CMD_CONSTRUCT_CONSTRUCTING != state_scan) {
+	if (pCs_option->switch_en == _TRUE) {
+		if (state_scan != HALMAC_SCAN_CMD_CONSTRUCT_CONSTRUCTING) {
 			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_ctrl_ch_switch_88xx(on)  invalid in state %x\n", state_scan);
 			return HALMAC_RET_ERROR_STATE;
 		}
 	} else {
-		if (HALMAC_SCAN_CMD_CONSTRUCT_BUFFER_CLEARED != state_scan) {
+		if (state_scan != HALMAC_SCAN_CMD_CONSTRUCT_BUFFER_CLEARED) {
 			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_ctrl_ch_switch_88xx(off)  invalid in state %x\n", state_scan);
 			return HALMAC_RET_ERROR_STATE;
 		}
@@ -4045,7 +3844,7 @@ halmac_ctrl_ch_switch_88xx(
 
 	status = halmac_func_ctrl_ch_switch_88xx(pHalmac_adapter, pCs_option);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_ctrl_ch_switch FAIL = %x!!\n", status);
 		return status;
 	}
@@ -4056,10 +3855,11 @@ halmac_ctrl_ch_switch_88xx(
 }
 
 /**
- * halmac_clear_ch_info_88xx() -used to clear channel info
- * @pHalmac_adapter
+ * halmac_clear_ch_info_88xx() -clear channel information
+ * @pHalmac_adapter : the adapter of halmac
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_clear_ch_info_88xx(
@@ -4067,27 +3867,23 @@ halmac_clear_ch_info_88xx(
 )
 {
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CLEAR_CH_INFO);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_clear_ch_info_88xx ==========>\n");
 
-	if (HALMAC_SCAN_CMD_CONSTRUCT_H2C_SENT == halmac_query_scan_curr_state_88xx(pHalmac_adapter)) {
+	if (halmac_query_scan_curr_state_88xx(pHalmac_adapter) == HALMAC_SCAN_CMD_CONSTRUCT_H2C_SENT) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Scan machine fail(clear ch info)...\n");
 		return HALMAC_RET_ERROR_STATE;
 	}
 
-	if (HALMAC_RET_SUCCESS != halmac_transition_scan_state_88xx(pHalmac_adapter, HALMAC_SCAN_CMD_CONSTRUCT_BUFFER_CLEARED))
+	if (halmac_transition_scan_state_88xx(pHalmac_adapter, HALMAC_SCAN_CMD_CONSTRUCT_BUFFER_CLEARED) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ERROR_STATE;
 
 	PLATFORM_RTL_FREE(pDriver_adapter, pHalmac_adapter->ch_sw_info.ch_info_buf, pHalmac_adapter->ch_sw_info.buf_size);
@@ -4104,12 +3900,95 @@ halmac_clear_ch_info_88xx(
 	return HALMAC_RET_SUCCESS;
 }
 
+HALMAC_RET_STATUS
+halmac_p2pps_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN PHALMAC_P2PPS	pP2PPS
+)
+{
+	VOID *pDriver_adapter = NULL;
+	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
+
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_ADAPTER_INVALID;
+
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_API_INVALID;
+
+	if (halmac_fw_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_NO_DLFW;
+
+	if (pHalmac_adapter->fw_version.h2c_version < 6)
+		return HALMAC_RET_FW_NO_SUPPORT;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+
+	status = halmac_func_p2pps_88xx(pHalmac_adapter, pP2PPS);
+
+	if (status != HALMAC_RET_SUCCESS) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]halmac_p2pps FAIL = %x!!\n", status);
+		return status;
+	}
+
+	return HALMAC_RET_SUCCESS;
+}
+
+static HALMAC_RET_STATUS
+halmac_func_p2pps_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN PHALMAC_P2PPS	pP2PPS
+)
+{
+	u8 pH2c_buff[HALMAC_H2C_CMD_SIZE_88XX] = { 0 };
+	u16 h2c_seq_mum = 0;
+	VOID *pDriver_adapter = NULL;
+	PHALMAC_API pHalmac_api;
+	HALMAC_H2C_HEADER_INFO h2c_header_info;
+	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]halmac_p2pps !!\n");
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+
+	P2PPS_SET_OFFLOAD_EN(pH2c_buff, pP2PPS->offload_en);
+	P2PPS_SET_ROLE(pH2c_buff, pP2PPS->role);
+	P2PPS_SET_CTWINDOW_EN(pH2c_buff, pP2PPS->ctwindow_en);
+	P2PPS_SET_NOA_EN(pH2c_buff, pP2PPS->noa_en);
+	P2PPS_SET_NOA_SEL(pH2c_buff, pP2PPS->noa_sel);
+	P2PPS_SET_ALLSTASLEEP(pH2c_buff, pP2PPS->all_sta_sleep);
+	P2PPS_SET_DISCOVERY(pH2c_buff, pP2PPS->discovery);
+	P2PPS_SET_P2P_PORT_ID(pH2c_buff, pP2PPS->p2p_port_id);
+	P2PPS_SET_P2P_GROUP(pH2c_buff, pP2PPS->p2p_group);
+	P2PPS_SET_P2P_MACID(pH2c_buff, pP2PPS->p2p_macid);
+
+	P2PPS_SET_CTWINDOW_LENGTH(pH2c_buff, pP2PPS->ctwindow_length);
+
+	P2PPS_SET_NOA_DURATION_PARA(pH2c_buff, pP2PPS->noa_duration_para);
+	P2PPS_SET_NOA_INTERVAL_PARA(pH2c_buff, pP2PPS->noa_interval_para);
+	P2PPS_SET_NOA_START_TIME_PARA(pH2c_buff, pP2PPS->noa_start_time_para);
+	P2PPS_SET_NOA_COUNT_PARA(pH2c_buff, pP2PPS->noa_count_para);
+
+	h2c_header_info.sub_cmd_id = SUB_CMD_ID_P2PPS;
+	h2c_header_info.content_size = 24;
+	h2c_header_info.ack = _FALSE;
+	halmac_set_fw_offload_h2c_header_88xx(pHalmac_adapter, pH2c_buff, &h2c_header_info, &h2c_seq_mum);
+
+	status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _FALSE);
+
+	if (status != HALMAC_RET_SUCCESS)
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]halmac_send_h2c_p2pps_88xx Fail = %x!!\n", status);
+
+	return status;
+}
+
 /**
- * halmac_send_general_info_88xx() -send general info
- * @pHalmac_adapter
- * @pGeneral_info
+ * halmac_send_general_info_88xx() -send general information to FW
+ * @pHalmac_adapter : the adapter of halmac
+ * @pGeneral_info : general information
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_send_general_info_88xx(
@@ -4120,38 +3999,39 @@ halmac_send_general_info_88xx(
 	VOID *pDriver_adapter = NULL;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_fw_validate(pHalmac_adapter))
+	if (halmac_fw_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_NO_DLFW;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_SEND_GENERAL_INFO);
+	if (pHalmac_adapter->fw_version.h2c_version < 4)
+		return HALMAC_RET_FW_NO_SUPPORT;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_send_general_info_88xx ==========>\n");
 
-	if (HALMAC_DLFW_NONE == pHalmac_adapter->halmac_state.dlfw_state) {
+	if (pHalmac_adapter->halmac_state.dlfw_state == HALMAC_DLFW_NONE) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_general_info_88xx Fail due to DLFW NONE!!\n");
 		return HALMAC_RET_DLFW_FAIL;
 	}
 
 	status = halmac_func_send_general_info_88xx(pHalmac_adapter, pGeneral_info);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_send_general_info error = %x\n", status);
 		return status;
 	}
 
-	if (HALMAC_DLFW_DONE == pHalmac_adapter->halmac_state.dlfw_state)
+	if (pHalmac_adapter->halmac_state.dlfw_state == HALMAC_DLFW_DONE)
 		pHalmac_adapter->halmac_state.dlfw_state = HALMAC_GEN_INFO_SENT;
 
 	pHalmac_adapter->gen_info_valid = _TRUE;
-	PLATFORM_RTL_MEMCPY(pDriver_adapter, &(pHalmac_adapter->general_info), pGeneral_info, sizeof(HALMAC_GENERAL_INFO));
+	PLATFORM_RTL_MEMCPY(pDriver_adapter, &pHalmac_adapter->general_info, pGeneral_info, sizeof(HALMAC_GENERAL_INFO));
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_send_general_info_88xx <==========\n");
 
@@ -4159,16 +4039,17 @@ halmac_send_general_info_88xx(
 }
 
 /**
- * halmac_start_iqk_88xx() -start iqk
- * @pHalmac_adapter
- * @clear
+ * halmac_start_iqk_88xx() -trigger FW IQK
+ * @pHalmac_adapter : the adapter of halmac
+ * @pIqk_para : IQK parameter
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_start_iqk_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
-	IN u8 clear
+	IN PHALMAC_IQK_PARA pIqk_para
 )
 {
 	u8 pH2c_buff[HALMAC_H2C_CMD_SIZE_88XX] = { 0 };
@@ -4176,31 +4057,30 @@ halmac_start_iqk_88xx(
 	VOID *pDriver_adapter = NULL;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 	HALMAC_H2C_HEADER_INFO h2c_header_info;
-	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &(pHalmac_adapter->halmac_state.iqk_set.process_status);
+	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &pHalmac_adapter->halmac_state.iqk_set.process_status;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_fw_validate(pHalmac_adapter))
+	if (halmac_fw_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_NO_DLFW;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_START_IQK);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_start_iqk_88xx ==========>\n");
 
-	if (HALMAC_CMD_PROCESS_SENDING == *pProcess_status) {
+	if (*pProcess_status == HALMAC_CMD_PROCESS_SENDING) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Wait event(iqk)...\n");
 		return HALMAC_RET_BUSY_STATE;
 	}
 
 	*pProcess_status = HALMAC_CMD_PROCESS_SENDING;
 
-	IQK_SET_CLEAR(pH2c_buff, clear);
+	IQK_SET_CLEAR(pH2c_buff, pIqk_para->clear);
+	IQK_SET_SEGMENT_IQK(pH2c_buff, pIqk_para->segment_iqk);
 
 	h2c_header_info.sub_cmd_id = SUB_CMD_ID_IQK;
 	h2c_header_info.content_size = 1;
@@ -4211,8 +4091,9 @@ halmac_start_iqk_88xx(
 
 	status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail = %x!!\n", status);
+		halmac_reset_feature_88xx(pHalmac_adapter, HALMAC_FEATURE_IQK);
 		return status;
 	}
 
@@ -4222,11 +4103,12 @@ halmac_start_iqk_88xx(
 }
 
 /**
- * halmac_ctrl_pwr_tracking_88xx() -control power tracking
- * @pHalmac_adapter
- * @pPwr_tracking_opt
+ * halmac_ctrl_pwr_tracking_88xx() -trigger FW power tracking
+ * @pHalmac_adapter : the adapter of halmac
+ * @pPwr_tracking_opt : power tracking option
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_ctrl_pwr_tracking_88xx(
@@ -4239,24 +4121,22 @@ halmac_ctrl_pwr_tracking_88xx(
 	VOID *pDriver_adapter = NULL;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 	HALMAC_H2C_HEADER_INFO h2c_header_info;
-	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &(pHalmac_adapter->halmac_state.power_tracking_set.process_status);
+	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &pHalmac_adapter->halmac_state.power_tracking_set.process_status;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_fw_validate(pHalmac_adapter))
+	if (halmac_fw_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_NO_DLFW;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CTRL_PWR_TRACKING);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_start_iqk_88xx ==========>\n");
 
-	if (HALMAC_CMD_PROCESS_SENDING == *pProcess_status) {
+	if (*pProcess_status == HALMAC_CMD_PROCESS_SENDING) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Wait event(pwr tracking)...\n");
 		return HALMAC_RET_BUSY_STATE;
 	}
@@ -4291,8 +4171,9 @@ halmac_ctrl_pwr_tracking_88xx(
 
 	status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail = %x!!\n", status);
+		halmac_reset_feature_88xx(pHalmac_adapter, HALMAC_FEATURE_POWER_TRACKING);
 		return status;
 	}
 
@@ -4302,21 +4183,22 @@ halmac_ctrl_pwr_tracking_88xx(
 }
 
 /**
- * halmac_query_status_88xx() -query async feature status
- * @pHalmac_adapter
- * @feature_id
- * @pProcess_status
- * @data
- * @size
+ * halmac_query_status_88xx() -query the offload feature status
+ * @pHalmac_adapter : the adapter of halmac
+ * @feature_id : feature_id
+ * @pProcess_status : feature_status
+ * @data : data buffer
+ * @size : data size
  *
  * Note :
- * If user wants to know the data size, use can allocate random
+ * If user wants to know the data size, use can allocate zero
  * size buffer first. If this size less than the data size, halmac
  * will return  HALMAC_RET_BUFFER_TOO_SMALL. User need to
  * re-allocate data buffer with correct data size.
  *
  * Author : Ivan Lin/KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_query_status_88xx(
@@ -4330,19 +4212,17 @@ halmac_query_status_88xx(
 	VOID *pDriver_adapter = NULL;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_QUERY_STATE);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	/* PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_query_status_88xx ==========>\n"); */
 
-	if (NULL == pProcess_status) {
+	if (pProcess_status == NULL) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "null pointer!!\n");
 		return HALMAC_RET_NULL_POINTER;
 	}
@@ -4383,11 +4263,12 @@ halmac_query_status_88xx(
 }
 
 /**
- * halmac_reset_feature_88xx() -reset async feature status
- * @pHalmac_adapter
- * @feature_id
+ * halmac_reset_feature_88xx() -reset async api cmd status
+ * @pHalmac_adapter : the adapter of halmac
+ * @feature_id : feature_id
  * Author : Ivan Lin/KaiYuan Chang
- * Return : HALMAC_RET_STATUS
+ * Return : HALMAC_RET_STATUS.
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_reset_feature_88xx(
@@ -4396,19 +4277,17 @@ halmac_reset_feature_88xx(
 )
 {
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_STATE pState = &(pHalmac_adapter->halmac_state);
+	PHALMAC_STATE pState = &pHalmac_adapter->halmac_state;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_RESET_FEATURE);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_reset_feature_88xx ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]halmac_reset_feature_88xx ==========>\n");
 
 	switch (feature_id) {
 	case HALMAC_FEATURE_CFG_PARA:
@@ -4427,6 +4306,15 @@ halmac_reset_feature_88xx(
 	case HALMAC_FEATURE_UPDATE_PACKET:
 		pState->update_packet_set.process_status = HALMAC_CMD_PROCESS_IDLE;
 		break;
+	case HALMAC_FEATURE_IQK:
+		pState->iqk_set.process_status = HALMAC_CMD_PROCESS_IDLE;
+		break;
+	case HALMAC_FEATURE_POWER_TRACKING:
+		pState->power_tracking_set.process_status = HALMAC_CMD_PROCESS_IDLE;
+		break;
+	case HALMAC_FEATURE_PSD:
+		pState->psd_set.process_status = HALMAC_CMD_PROCESS_IDLE;
+		break;
 	case HALMAC_FEATURE_ALL:
 		pState->cfg_para_state_set.process_status = HALMAC_CMD_PROCESS_IDLE;
 		pState->cfg_para_state_set.cfg_para_cmd_construct_state = HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE;
@@ -4435,23 +4323,27 @@ halmac_reset_feature_88xx(
 		pState->scan_state_set.process_status = HALMAC_CMD_PROCESS_IDLE;
 		pState->scan_state_set.scan_cmd_construct_state = HALMAC_SCAN_CMD_CONSTRUCT_IDLE;
 		pState->update_packet_set.process_status = HALMAC_CMD_PROCESS_IDLE;
+		pState->iqk_set.process_status = HALMAC_CMD_PROCESS_IDLE;
+		pState->power_tracking_set.process_status = HALMAC_CMD_PROCESS_IDLE;
+		pState->psd_set.process_status = HALMAC_CMD_PROCESS_IDLE;
 		break;
 	default:
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_SND, HALMAC_DBG_ERR, "halmac_reset_feature_88xx invalid feature id %d\n", feature_id);
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_SND, HALMAC_DBG_ERR, "[ERR]halmac_reset_feature_88xx invalid feature id %d\n", feature_id);
 		return HALMAC_RET_INVALID_FEATURE_ID;
 	}
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_reset_feature_88xx <==========\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]halmac_reset_feature_88xx <==========\n");
 
 	return HALMAC_RET_SUCCESS;
 }
 
 /**
  * halmac_check_fw_status_88xx() -check fw status
- * @pHalmac_adapter
- * @fw_status
+ * @pHalmac_adapter : the adapter of halmac
+ * @fw_status : fw status
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_check_fw_status_88xx(
@@ -4461,25 +4353,21 @@ halmac_check_fw_status_88xx(
 {
 	u32 value32 = 0, value32_backup = 0, i = 0;
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CHECK_FW_STATUS);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_check_fw_status_88xx ==========>\n");
 
 	value32 = PLATFORM_REG_READ_32(pDriver_adapter, REG_FW_DBG6);
 
-	if (0 != value32) {
+	if (value32 != 0) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_check_fw_status REG_FW_DBG6 !=0\n");
 		*fw_status = _FALSE;
 		return status;
@@ -4489,14 +4377,13 @@ halmac_check_fw_status_88xx(
 
 	for (i = 0; i <= 10; i++) {
 		value32 = PLATFORM_REG_READ_32(pDriver_adapter, REG_FW_DBG7);
-		if (value32_backup != value32) {
+		if (value32_backup != value32)
 			break;
-		} else {
-			if (10 == i) {
-				PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_check_fw_status Polling FW PC fail\n");
-				*fw_status = _FALSE;
-				return status;
-			}
+
+		if (i == 10) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_check_fw_status Polling FW PC fail\n");
+			*fw_status = _FALSE;
+			return status;
 		}
 	}
 
@@ -4505,14 +4392,6 @@ halmac_check_fw_status_88xx(
 	return status;
 }
 
-/**
- * halmac_dump_fw_dmem_88xx() -dump dmem
- * @pHalmac_adapter
- * @dmem
- * @size
- * Author : KaiYuan Chang/Ivan Lin
- * Return : HALMAC_RET_STATUS
- */
 HALMAC_RET_STATUS
 halmac_dump_fw_dmem_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
@@ -4523,29 +4402,26 @@ halmac_dump_fw_dmem_88xx(
 	VOID *pDriver_adapter = NULL;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_DUMP_FW_DMEM);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_dump_fw_dmem_88xx ==========>\n");
 
 
-
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_dump_fw_dmem_88xx <==========\n");
 
 	return status;
 }
 
 /**
- * halmac_cfg_max_dl_size_88xx() - config max download size
- * @pHalmac_adapter
- * @halmac_offset
+ * halmac_cfg_max_dl_size_88xx() - config max download FW size
+ * @pHalmac_adapter : the adapter of halmac
+ * @size : max download fw size
  *
  * Halmac uses this setting to set max packet size for
  * download FW.
@@ -4556,6 +4432,7 @@ halmac_dump_fw_dmem_88xx(
  *
  * Author : Ivan Lin/KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_max_dl_size_88xx(
@@ -4565,14 +4442,12 @@ halmac_cfg_max_dl_size_88xx(
 {
 	VOID *pDriver_adapter = NULL;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_MAX_DL_SIZE);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_FW, HALMAC_DBG_TRACE, "halmac_cfg_max_dl_size_88xx ==========>\n");
@@ -4590,19 +4465,19 @@ halmac_cfg_max_dl_size_88xx(
 	pHalmac_adapter->max_download_size = size;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_FW, HALMAC_DBG_TRACE, "Cfg max size is : %X\n", size);
-
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_FW, HALMAC_DBG_TRACE, "halmac_cfg_max_dl_size_88xx <==========\n");
 
 	return HALMAC_RET_SUCCESS;
 }
 
 /**
- * halmac_psd_88xx() - trigger fw offload psd
- * @pHalmac_adapter
- * @start_psd
- * @end_psd
+ * halmac_psd_88xx() - trigger fw psd
+ * @pHalmac_adapter : the adapter of halmac
+ * @start_psd : start PSD
+ * @end_psd : end PSD
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_psd_88xx(
@@ -4616,29 +4491,27 @@ halmac_psd_88xx(
 	VOID *pDriver_adapter = NULL;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 	HALMAC_H2C_HEADER_INFO h2c_header_info;
-	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &(pHalmac_adapter->halmac_state.psd_set.process_status);
+	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &pHalmac_adapter->halmac_state.psd_set.process_status;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_fw_validate(pHalmac_adapter))
+	if (halmac_fw_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_NO_DLFW;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_PSD);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_psd_88xx ==========>\n");
 
-	if (HALMAC_CMD_PROCESS_SENDING == *pProcess_status) {
+	if (*pProcess_status == HALMAC_CMD_PROCESS_SENDING) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Wait event(psd)...\n");
 		return HALMAC_RET_BUSY_STATE;
 	}
 
-	if (NULL != pHalmac_adapter->halmac_state.psd_set.pData) {
+	if (pHalmac_adapter->halmac_state.psd_set.pData != NULL) {
 		PLATFORM_RTL_FREE(pDriver_adapter, pHalmac_adapter->halmac_state.psd_set.pData, pHalmac_adapter->halmac_state.psd_set.data_size);
 		pHalmac_adapter->halmac_state.psd_set.pData = (u8 *)NULL;
 	}
@@ -4658,8 +4531,9 @@ halmac_psd_88xx(
 
 	status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail = %x!!\n", status);
+		halmac_reset_feature_88xx(pHalmac_adapter, HALMAC_FEATURE_PSD);
 		return status;
 	}
 
@@ -4670,10 +4544,14 @@ halmac_psd_88xx(
 
 /**
  * halmac_cfg_la_mode_88xx() - config la mode
- * @pHalmac_adapter
- * @la_mode
+ * @pHalmac_adapter : the adapter of halmac
+ * @la_mode :
+ *	disable : no TXFF space reserved for LA debug
+ *	partial : partial TXFF space is reserved for LA debug
+ *	full : all TXFF space is reserved for LA debug
  * Author : KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_la_mode_88xx(
@@ -4683,14 +4561,12 @@ halmac_cfg_la_mode_88xx(
 {
 	VOID *pDriver_adapter = NULL;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_LA_MODE);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_cfg_la_mode_88xx ==========>la_mode = %d\n", la_mode);
@@ -4704,10 +4580,15 @@ halmac_cfg_la_mode_88xx(
 
 /**
  * halmac_cfg_rx_fifo_expanding_mode_88xx() - rx fifo expanding
- * @pHalmac_adapter
- * @la_mode
+ * @pHalmac_adapter : the adapter of halmac
+ * @la_mode :
+ *	disable : normal mode
+ *	1 block : Rx FIFO + 1 FIFO block; Tx fifo - 1 FIFO block
+ *	2 block : Rx FIFO + 2 FIFO block; Tx fifo - 2 FIFO block
+ *	3 block : Rx FIFO + 3 FIFO block; Tx fifo - 3 FIFO block
  * Author : Soar
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_rx_fifo_expanding_mode_88xx(
@@ -4717,14 +4598,12 @@ halmac_cfg_rx_fifo_expanding_mode_88xx(
 {
 	VOID *pDriver_adapter = NULL;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_RX_FIFO_EXPANDING_MODE);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_cfg_rx_fifo_expanding_mode_88xx ==========>rx_fifo_expanding_mode = %d\n", rx_fifo_expanding_mode);
@@ -4736,16 +4615,6 @@ halmac_cfg_rx_fifo_expanding_mode_88xx(
 	return HALMAC_RET_SUCCESS;
 }
 
-
-/**
- * halmac_config_security_88xx() - config security
- * @pHalmac_adapter
- * @tx_encryption : 1 -> HW encryption 0 -> SW encryption
- * @rx_decryption : 1 -> HW encryption 0 -> SW encryption
- * @bip_enable : 1 -> enable BIP 0 -> disable BIP
- * Author : Ivan Lin
- * Return : HALMAC_RET_STATUS
- */
 HALMAC_RET_STATUS
 halmac_config_security_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
@@ -4755,10 +4624,10 @@ halmac_config_security_88xx(
 	PHALMAC_API pHalmac_api;
 	VOID *pDriver_adapter = NULL;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 	return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
@@ -4768,26 +4637,26 @@ halmac_config_security_88xx(
 
 	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_CR, (u16)(HALMAC_REG_READ_16(pHalmac_adapter, REG_CR) | BIT_MAC_SEC_EN));
 
-	if (1 == pSec_setting->tx_encryption)
+	if (pSec_setting->tx_encryption == 1)
 		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SECCFG, HALMAC_REG_READ_8(pHalmac_adapter, REG_SECCFG) | BIT(2));
 	else
 		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SECCFG, HALMAC_REG_READ_8(pHalmac_adapter, REG_SECCFG) & ~(BIT(2)));
 
-	if (1 == pSec_setting->rx_decryption)
+	if (pSec_setting->rx_decryption == 1)
 		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SECCFG, HALMAC_REG_READ_8(pHalmac_adapter, REG_SECCFG) | BIT(3));
 	else
 		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SECCFG, HALMAC_REG_READ_8(pHalmac_adapter, REG_SECCFG) & ~(BIT(3)));
 
-	if (1 == pSec_setting->bip_enable) {
-		if (HALMAC_CHIP_ID_8822B == pHalmac_adapter->chip_id)
+	if (pSec_setting->bip_enable == 1) {
+		if (pHalmac_adapter->chip_id == HALMAC_CHIP_ID_8822B)
 			return HALMAC_RET_BIP_NO_SUPPORT;
-#if HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT
-		if (1 == pSec_setting->tx_encryption)
+#if HALMAC_8821C_SUPPORT
+		if (pSec_setting->tx_encryption == 1)
 			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_WSEC_OPTION + 2, HALMAC_REG_READ_8(pHalmac_adapter, REG_WSEC_OPTION + 2) | (BIT(3) | BIT(5)));
 		else
 			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_WSEC_OPTION + 2, HALMAC_REG_READ_8(pHalmac_adapter, REG_WSEC_OPTION + 2) & ~(BIT(3) | BIT(5)));
 
-		if (1 == pSec_setting->rx_decryption)
+		if (pSec_setting->rx_decryption == 1)
 			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_WSEC_OPTION + 2, HALMAC_REG_READ_8(pHalmac_adapter, REG_WSEC_OPTION + 2) | (BIT(4) | BIT(6)));
 		else
 			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_WSEC_OPTION + 2, HALMAC_REG_READ_8(pHalmac_adapter, REG_WSEC_OPTION + 2) & ~(BIT(4) | BIT(6)));
@@ -4799,13 +4668,6 @@ halmac_config_security_88xx(
 	return HALMAC_RET_SUCCESS;
 }
 
-/**
- * halmac_gest_used_cam_entry_num_88xx() -get used cam entry num
- * @pHalmac_adapter
- * @sec_type
- * Author : Ivan Lin
- * Return : u8 (entry num)
- */
 u8
 halmac_get_used_cam_entry_num_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
@@ -4833,6 +4695,7 @@ halmac_get_used_cam_entry_num_88xx(
 	case HAL_SECURITY_TYPE_AES256:
 	case HAL_SECURITY_TYPE_GCMP256:
 		entry_num = 2;
+		break;
 	default:
 		entry_num = 0;
 		break;
@@ -4843,23 +4706,6 @@ halmac_get_used_cam_entry_num_88xx(
 	return entry_num;
 }
 
-/**
- * halmac_write_cam_88xx() -write cam
- * @pHalmac_adapter
- * @entry_index
- * @pCam_entry_info : mac_address -> address of key owner
- * unicast -> 1 : unicast 0 : broadcast/multicast
- *
- * Note : Some security type needs 2 entries. If this security type is
- * used, cam table of entry index & entry index+1 will be occupied.
- * User can call halmac_get_used_cam_entry_num to get used cam
- * entry num info.
- * Ex : security_type = HAL_SECURITY_TYPE_GCMP256, entry_index = 2
- * ==>entry index = 2 & entry index = 3 are used.
- *
- * Author : Ivan Lin
- * Return : HALMAC_RET_STATUS
- */
 HALMAC_RET_STATUS
 halmac_write_cam_88xx(
 	IN PHALMAC_ADAPTER	pHalmac_adapter,
@@ -4876,7 +4722,7 @@ halmac_write_cam_88xx(
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "halmac_write_cam_88xx ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]halmac_write_cam_88xx ==========>\n");
 
 	if (entry_index >= pHalmac_adapter->hw_config_info.cam_entry_num)
 		return HALMAC_RET_ENTRY_INDEX_ERROR;
@@ -4885,6 +4731,8 @@ halmac_write_cam_88xx(
 		return HALMAC_RET_FAIL;
 
 	pCam_entry_format = (PHALMAC_CAM_ENTRY_FORMAT)PLATFORM_RTL_MALLOC(pDriver_adapter, sizeof(*pCam_entry_format));
+	if (pCam_entry_format == NULL)
+		return HALMAC_RET_NULL_POINTER;
 	PLATFORM_RTL_MEMSET(pDriver_adapter, pCam_entry_format, 0x00, sizeof(*pCam_entry_format));
 
 	pCam_entry_format->key_id = pCam_entry_info->key_id;
@@ -4924,11 +4772,12 @@ halmac_write_cam_88xx(
 		pCam_entry_format->ext_sectype = 1;
 		break;
 	case HAL_SECURITY_TYPE_BIP:
-		pCam_entry_format->type = (1 == pCam_entry_info->unicast) ? 4 : 0;
+		pCam_entry_format->type = (pCam_entry_info->unicast == 1) ? 4 : 0;
 		pCam_entry_format->mgnt = 1;
-		pCam_entry_format->grp = (1 == pCam_entry_info->unicast) ? 0 : 1;
+		pCam_entry_format->grp = (pCam_entry_info->unicast == 1) ? 0 : 1;
 		break;
 	default:
+		PLATFORM_RTL_FREE(pDriver_adapter, pCam_entry_format, sizeof(*pCam_entry_format));
 		return HALMAC_RET_FAIL;
 	}
 
@@ -4936,8 +4785,8 @@ halmac_write_cam_88xx(
 	for (i = 0; i < 8; i++) {
 		HALMAC_REG_WRITE_32(pHalmac_adapter, REG_CAMWRITE, *((u32 *)pCam_entry_format + i));
 		HALMAC_REG_WRITE_32(pHalmac_adapter, REG_CAMCMD, command | ((entry_index << 3) + i));
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "1 - CAM entry format : %X\n", *((u32 *)pCam_entry_format + i));
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "1 - REG_CAMCMD : %X\n", command | ((entry_index << 3) + i));
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]1 - CAM entry format : %X\n", *((u32 *)pCam_entry_format + i));
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]1 - REG_CAMCMD : %X\n", command | ((entry_index << 3) + i));
 	}
 
 	if (HAL_SECURITY_TYPE_WAPI == pCam_entry_info->security_type || HAL_SECURITY_TYPE_AES256 == pCam_entry_info->security_type ||
@@ -4948,26 +4797,18 @@ halmac_write_cam_88xx(
 		for (i = 0; i < 8; i++) {
 			HALMAC_REG_WRITE_32(pHalmac_adapter, REG_CAMWRITE, *((u32 *)pCam_entry_format + i));
 			HALMAC_REG_WRITE_32(pHalmac_adapter, REG_CAMCMD, command | (((entry_index + 1) << 3) + i));
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "2 - CAM entry format : %X\n", *((u32 *)pCam_entry_format + i));
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "2 - REG_CAMCMD : %X\n", command | (((entry_index + 1) << 3) + i));
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]2 - CAM entry format : %X\n", *((u32 *)pCam_entry_format + i));
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]2 - REG_CAMCMD : %X\n", command | (((entry_index + 1) << 3) + i));
 		}
 	}
 
 	PLATFORM_RTL_FREE(pDriver_adapter, pCam_entry_format, sizeof(*pCam_entry_format));
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "halmac_write_cam_88xx <==========\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]halmac_write_cam_88xx <==========\n");
 
 	return HALMAC_RET_SUCCESS;
 }
 
-/**
- * halmac_read_cam_entry_88xx -read cam entry
- * @pHalmac_adapter
- * @entry_index
- * @pContent
- * Author : Ivan Lin
- * Return : HALMAC_RET_STATUS
- */
 HALMAC_RET_STATUS
 halmac_read_cam_entry_88xx(
 	IN PHALMAC_ADAPTER	pHalmac_adapter,
@@ -4998,13 +4839,6 @@ halmac_read_cam_entry_88xx(
 	return HALMAC_RET_SUCCESS;
 }
 
-/**
- * halmac_clear_security_cam_88xx() - clear CAM entry
- * @pHalmac_adapter
- * @entry_index
- * Author : Ivan Lin
- * Return : HALMAC_RET_STATUS
- */
 HALMAC_RET_STATUS
 halmac_clear_cam_entry_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
@@ -5017,21 +4851,23 @@ halmac_clear_cam_entry_88xx(
 	PHALMAC_API pHalmac_api;
 	PHALMAC_CAM_ENTRY_FORMAT pCam_entry_format;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_clear_security_cam_88xx ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]halmac_clear_security_cam_88xx ==========>\n");
 
 	if (entry_index >= pHalmac_adapter->hw_config_info.cam_entry_num)
 		return HALMAC_RET_ENTRY_INDEX_ERROR;
 
 	pCam_entry_format = (PHALMAC_CAM_ENTRY_FORMAT)PLATFORM_RTL_MALLOC(pDriver_adapter, sizeof(*pCam_entry_format));
+	if (pCam_entry_format == NULL)
+		return HALMAC_RET_NULL_POINTER;
 	PLATFORM_RTL_MEMSET(pDriver_adapter, pCam_entry_format, 0x00, sizeof(*pCam_entry_format));
 
 	for (i = 0; i < 8; i++) {
@@ -5041,18 +4877,19 @@ halmac_clear_cam_entry_88xx(
 
 	PLATFORM_RTL_FREE(pDriver_adapter, pCam_entry_format, sizeof(*pCam_entry_format));
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_clear_security_cam_88xx <==========\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]halmac_clear_security_cam_88xx <==========\n");
 
 	return HALMAC_RET_SUCCESS;
 }
 
 /**
- * halmac_get_hw_value_88xx() -
- * @pHalmac_adapter
- * @hw_id
- * @pvalue
- * Author : KaiYuan Chang
+ * halmac_get_hw_value_88xx() -get hw config value
+ * @pHalmac_adapter : the adapter of halmac
+ * @hw_id : hw id for driver to query
+ * @pvalue : hw value, reference table to get data type
+ * Author : KaiYuan Chang / Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_get_hw_value_88xx(
@@ -5064,19 +4901,17 @@ halmac_get_hw_value_88xx(
 	VOID *pDriver_adapter = NULL;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_GET_HW_VALUE);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_get_hw_value_88xx ==========>\n");
 
-	if (NULL == pvalue) {
+	if (pvalue == NULL) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_get_hw_value_88xx (NULL ==pvalue)==========>\n");
 		return HALMAC_RET_NULL_POINTER;
 	}
@@ -5114,7 +4949,7 @@ halmac_get_hw_value_88xx(
 		break;
 	case HALMAC_HW_WLAN_EFUSE_AVAILABLE_SIZE: /*Remove later*/
 		status = halmac_dump_logical_efuse_map_88xx(pHalmac_adapter, HALMAC_EFUSE_R_DRV);
-		if (HALMAC_RET_SUCCESS != status)
+		if (status != HALMAC_RET_SUCCESS)
 			return status;
 		*(u32 *)pvalue = pHalmac_adapter->hw_config_info.efuse_size - HALMAC_PROTECTED_EFUSE_SIZE_88XX - pHalmac_adapter->efuse_end;
 		break;
@@ -5134,7 +4969,7 @@ halmac_get_hw_value_88xx(
 		*(u8 *)pvalue = pHalmac_adapter->drv_info_size;
 		break;
 	case HALMAC_HW_TXFF_ALLOCATION:
-		PLATFORM_RTL_MEMCPY(pDriver_adapter, pvalue, &(pHalmac_adapter->txff_allocation), sizeof(HALMAC_TXFF_ALLOCATION));
+		PLATFORM_RTL_MEMCPY(pDriver_adapter, pvalue, &pHalmac_adapter->txff_allocation, sizeof(HALMAC_TXFF_ALLOCATION));
 		break;
 	case HALMAC_HW_TX_DESC_SIZE:
 		*(u32 *)pvalue = pHalmac_adapter->hw_config_info.txdesc_size;
@@ -5142,25 +4977,32 @@ halmac_get_hw_value_88xx(
 	case HALMAC_HW_RX_DESC_SIZE:
 		*(u32 *)pvalue = pHalmac_adapter->hw_config_info.rxdesc_size;
 		break;
+	case HALMAC_HW_AC_OQT_SIZE:
+		*(u8 *)pvalue = pHalmac_adapter->hw_config_info.ac_oqt_size;
+		break;
+	case HALMAC_HW_NON_AC_OQT_SIZE:
+		*(u8 *)pvalue = pHalmac_adapter->hw_config_info.non_ac_oqt_size;
+		break;
+	case HALMAC_HW_AC_QUEUE_NUM:
+		*(u8 *)pvalue = pHalmac_adapter->hw_config_info.ac_queue_num;
+		break;
 	default:
 		return HALMAC_RET_PARA_NOT_SUPPORT;
 	}
 
-
-
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_get_hw_value_88xx <==========\n");
 
 	return HALMAC_RET_SUCCESS;
 }
 
-
 /**
- * halmac_set_hw_value_88xx() -
- * @pHalmac_adapter
- * @hw_id
- * @pvalue
- * Author : KaiYuan Chang
+ * halmac_set_hw_value_88xx() -set hw config value
+ * @pHalmac_adapter : the adapter of halmac
+ * @hw_id : hw id for driver to config
+ * @pvalue : hw value, reference table to get data type
+ * Author : KaiYuan Chang / Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_set_hw_value_88xx(
@@ -5172,19 +5014,17 @@ halmac_set_hw_value_88xx(
 	VOID *pDriver_adapter = NULL;
 	HALMAC_RET_STATUS status;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_GET_HW_VALUE);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_set_hw_value_88xx ==========>\n");
 
-	if (NULL == pvalue) {
+	if (pvalue == NULL) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_set_hw_value_88xx (NULL == pvalue)==========>\n");
 		return HALMAC_RET_NULL_POINTER;
 	}
@@ -5192,7 +5032,7 @@ halmac_set_hw_value_88xx(
 	switch (hw_id) {
 	case HALMAC_HW_USB_MODE:
 		status = halmac_set_usb_mode_88xx(pHalmac_adapter, *(HALMAC_USB_MODE *)pvalue);
-		if (HALMAC_RET_SUCCESS != status)
+		if (status != HALMAC_RET_SUCCESS)
 			return status;
 		break;
 	case HALMAC_HW_SEQ_EN:
@@ -5218,6 +5058,9 @@ halmac_set_hw_value_88xx(
 	case HALMAC_HW_AMPDU_CONFIG:
 		halmac_config_ampdu_88xx(pHalmac_adapter, (PHALMAC_AMPDU_CONFIG)pvalue);
 		break;
+	case HALMAC_HW_RX_SHIFT:
+		halmac_rx_shift_88xx(pHalmac_adapter, *(u8 *)pvalue);
+		break;
 	default:
 		return HALMAC_RET_PARA_NOT_SUPPORT;
 	}
@@ -5227,13 +5070,13 @@ halmac_set_hw_value_88xx(
 	return HALMAC_RET_SUCCESS;
 }
 
-
 /**
- * halmac_cfg_drv_rsvd_pg_num_88xx() -
- * @pHalmac_adapter
- * @pg_num
+ * halmac_cfg_drv_rsvd_pg_num_88xx() -config reserved page number for driver
+ * @pHalmac_adapter : the adapter of halmac
+ * @pg_num : page number
  * Author : KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_drv_rsvd_pg_num_88xx(
@@ -5243,17 +5086,16 @@ halmac_cfg_drv_rsvd_pg_num_88xx(
 {
 	VOID *pDriver_adapter = NULL;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_DRV_RSVD_PG_NUM);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_cfg_drv_rsvd_pg_num_88xx ==========>pg_num = %d\n", pg_num);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]halmac_cfg_drv_rsvd_pg_num_88xx ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]pg_num = %d\n", pg_num);
 
 	switch (pg_num) {
 	case HALMAC_RSVD_PG_NUM16:
@@ -5272,14 +5114,6 @@ halmac_cfg_drv_rsvd_pg_num_88xx(
 	return HALMAC_RET_SUCCESS;
 }
 
-
-/**
- * halmac_get_chip_version_88xx() -
- * @pHalmac_adapter
- * @version
- * Author : KaiYuan Chang
- * Return : HALMAC_RET_STATUS
- */
 HALMAC_RET_STATUS
 halmac_get_chip_version_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
@@ -5289,10 +5123,10 @@ halmac_get_chip_version_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
@@ -5308,12 +5142,13 @@ halmac_get_chip_version_88xx(
 }
 
 /**
- * halmac_chk_txdesc_88xx() -
- * @pHalmac_adapter
- * @halmac_buf
- * @halmac_size
+ * halmac_chk_txdesc_88xx() -check if the tx packet format is incorrect
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_buf : tx Packet buffer, tx desc is included
+ * @halmac_size : tx packet size
  * Author : KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_chk_txdesc_88xx(
@@ -5322,41 +5157,64 @@ halmac_chk_txdesc_88xx(
 	IN u32 halmac_size
 )
 {
-	VOID *pDriver_adapter = NULL;
+	u32 mac_clk = 0;
 	PHALMAC_API pHalmac_api;
+	VOID *pDriver_adapter = NULL;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_chk_txdesc_88xx ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]halmac_chk_txdesc_88xx ==========>\n");
 
-	if (_TRUE == GET_TX_DESC_BMC(pHalmac_buf))
-		if (_TRUE == GET_TX_DESC_AGG_EN(pHalmac_buf))
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "TxDesc: Agg should not be set when BMC\n");
+	if (GET_TX_DESC_BMC(pHalmac_buf) == _TRUE)
+		if (GET_TX_DESC_AGG_EN(pHalmac_buf) == _TRUE)
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_ERR, "[ERR]TxDesc: Agg should not be set when BMC\n");
 
 	if (halmac_size < (GET_TX_DESC_TXPKTSIZE(pHalmac_buf) + GET_TX_DESC_OFFSET(pHalmac_buf)))
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "TxDesc: PktSize too small\n");
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_ERR, "[ERR]TxDesc: PktSize too small\n");
+
+	if (GET_TX_DESC_AMSDU_PAD_EN(pHalmac_buf) != 0)
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_ERR, "[ERR]TxDesc: Do not set AMSDU_PAD_EN\n");
 
-	/* PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_WARN, "halmac_chk_txdesc_88xx <==========\n"); */
+	switch (BIT_GET_MAC_CLK_SEL(HALMAC_REG_READ_32(pHalmac_adapter, REG_AFE_CTRL1))) {
+	case 0x0:
+		mac_clk = 80;
+		break;
+	case 0x1:
+		mac_clk = 40;
+		break;
+	case 0x2:
+		mac_clk = 20;
+		break;
+	case 0x3:
+		mac_clk = 10;
+		break;
+	}
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_ALWAYS, "MAC clock : 0x%XM\n", mac_clk);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_ALWAYS, "TX mac agg enable : 0x%X\n", GET_TX_DESC_AGG_EN(pHalmac_buf));
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_ALWAYS, "TX mac agg num : 0x%X\n", GET_TX_DESC_MAX_AGG_NUM(pHalmac_buf));
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]halmac_chk_txdesc_88xx <==========\n");
 
 	return HALMAC_RET_SUCCESS;
 }
 
-
 /**
- * halmac_dl_drv_rsvd_page_88xx() -
- * @pHalmac_adapter
- * @pg_offset
- * @halmac_buf
- * @halmac_size
+ * halmac_dl_drv_rsvd_page_88xx() - download packet to rsvd page
+ * @pHalmac_adapter : the adapter of halmac
+ * @pg_offset : page offset of driver's rsvd page
+ * @halmac_buf : data to be downloaded, tx_desc is not included
+ * @halmac_size : data size to be downloaded
  * Author : KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_dl_drv_rsvd_page_88xx(
@@ -5373,21 +5231,19 @@ halmac_dl_drv_rsvd_page_88xx(
 	u32 dl_pg_num = 0;
 
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_DL_DRV_RSVD_PG);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_dl_drv_rsvd_page_88xx ==========>\n");
 
 	/*check boundary and size valid*/
-	dl_pg_num = halmac_size/pHalmac_adapter->hw_config_info.page_size + ((halmac_size & (pHalmac_adapter->hw_config_info.page_size - 1)) ? 1 : 0);
+	dl_pg_num = halmac_size / pHalmac_adapter->hw_config_info.page_size + ((halmac_size & (pHalmac_adapter->hw_config_info.page_size - 1)) ? 1 : 0);
 	if (pg_offset + dl_pg_num > pHalmac_adapter->txff_allocation.rsvd_drv_pg_num) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[ERROR] driver download offset or size error ==========>\n");
 		return HALMAC_RET_DRV_DL_ERR;
@@ -5400,7 +5256,7 @@ halmac_dl_drv_rsvd_page_88xx(
 	ret_status = halmac_download_rsvd_page_88xx(pHalmac_adapter, pHalmac_buf, halmac_size);
 
 	/*restore to original bundary*/
-	if (HALMAC_RET_SUCCESS != ret_status) {
+	if (ret_status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_download_rsvd_page_88xx Fail = %x!!\n", ret_status);
 		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
 		return ret_status;
@@ -5413,14 +5269,15 @@ halmac_dl_drv_rsvd_page_88xx(
 }
 
 /**
- * halmac_cfg_csi_rate_88xx() - config CSI frame Tx rate according to rssi or fix rate
- * @pHalmac_adapter
- * @rssi
- * @current_rate
- * @fixrate_en
- * @ *new_rate
+ * halmac_cfg_csi_rate_88xx() - config CSI frame Tx rate
+ * @pHalmac_adapter : the adapter of halmac
+ * @rssi : rssi in decimal value
+ * @current_rate : current CSI frame rate
+ * @fixrate_en : enable to fix CSI frame in VHT rate, otherwise legacy OFDM rate
+ * @new_rate : API returns the final CSI frame rate
  * Author : chunchu
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_csi_rate_88xx(
@@ -5436,19 +5293,17 @@ halmac_cfg_csi_rate_88xx(
 	u32 temp_csi_setting;
 	u16 current_rrsr;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_CSI_RATE);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_SND, HALMAC_DBG_TRACE, "halmac_cfg_csi_rate_88xx ==========>\n");
 
-#if HALMAC_8821C_SUPPORT || HALMAC_8814B_SUPPORT
+#if HALMAC_8821C_SUPPORT
 	if (pHalmac_adapter->chip_id == HALMAC_CHIP_ID_8821C) {
 		if (fixrate_en) {
 			temp_csi_setting = HALMAC_REG_READ_32(pHalmac_adapter, REG_BBPSF_CTRL) & ~(BIT_MASK_WMAC_CSI_RATE << BIT_SHIFT_WMAC_CSI_RATE);
@@ -5471,30 +5326,483 @@ halmac_cfg_csi_rate_88xx(
 		}
 		*new_rate = HALMAC_OFDM54;
 		return HALMAC_RET_SUCCESS;
-	} else {
-		if (current_rate != HALMAC_OFDM24) {
-			HALMAC_REG_WRITE_16(pHalmac_adapter, REG_RRSR, current_rrsr & ~(BIT(HALMAC_OFDM54)));
-			HALMAC_REG_WRITE_32(pHalmac_adapter, REG_BBPSF_CTRL, temp_csi_setting | BIT_WMAC_CSI_RATE(HALMAC_OFDM24));
+	}
+
+	if (current_rate != HALMAC_OFDM24) {
+		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_RRSR, current_rrsr & ~(BIT(HALMAC_OFDM54)));
+		HALMAC_REG_WRITE_32(pHalmac_adapter, REG_BBPSF_CTRL, temp_csi_setting | BIT_WMAC_CSI_RATE(HALMAC_OFDM24));
+	}
+	*new_rate = HALMAC_OFDM24;
+	return HALMAC_RET_SUCCESS;
+}
+
+/**
+ * halmac_txfifo_is_empty_88xx() -check if txfifo is empty
+ * @pHalmac_adapter : the adapter of halmac
+ * Author : Ivan Lin
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+HALMAC_RET_STATUS
+halmac_txfifo_is_empty_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u32 chk_num
+)
+{
+	u32 counter;
+	VOID *pDriver_adapter = NULL;
+	PHALMAC_API pHalmac_api;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "halmac_txfifo_is_empty_88xx ==========>\n");
+
+	counter = (chk_num <= 10) ? 10 : chk_num;
+	do {
+		if (HALMAC_REG_READ_8(pHalmac_adapter, REG_TXPKT_EMPTY) != 0xFF)
+			return HALMAC_RET_TXFIFO_NO_EMPTY;
+
+		if ((HALMAC_REG_READ_8(pHalmac_adapter, REG_TXPKT_EMPTY + 1) & 0x07) != 0x07)
+			return HALMAC_RET_TXFIFO_NO_EMPTY;
+		counter--;
+
+	} while (counter != 0);
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "halmac_txfifo_is_empty_88xx <==========\n");
+
+	return HALMAC_RET_SUCCESS;
+}
+
+/**
+ * halmac_download_flash_88xx() -download firmware to flash
+ * @pHalmac_adapter : the adapter of halmac
+ * @pHalmac_fw : pointer to fw
+ * @halmac_fw_size : fw size
+ * @rom_address : flash start address where fw should be download
+ * Author : Pablo Chiu
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+HALMAC_RET_STATUS
+halmac_download_flash_88xx(
+	IN PHALMAC_ADAPTER	pHalmac_adapter,
+	IN u8 *pHalmac_fw,
+	IN u32 halmac_fw_size,
+	IN u32 rom_address
+)
+{
+	VOID *pDriver_adapter = NULL;
+	PHALMAC_API pHalmac_api;
+	HALMAC_RET_STATUS status;
+	HALMAC_H2C_HEADER_INFO h2c_header_info;
+	u8 value8;
+	u8 restore[3];
+	u8 pH2c_buff[HALMAC_H2C_CMD_SIZE_88XX] = {0};
+	u16 h2c_seq_mum = 0;
+	u32 send_pkt_size, mem_offset;
+
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_ADAPTER_INVALID;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_download_flash_88xx ==========>\n");
+
+	pHalmac_adapter->halmac_state.dlfw_state = HALMAC_DLFW_NONE;
+
+	value8 = HALMAC_DMA_MAPPING_HIGH << 6;
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_TXDMA_PQ_MAP + 1, value8);
+
+	/* DLFW only use HIQ, map HIQ to hi priority */
+	pHalmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_HI] = HALMAC_DMA_MAPPING_HIGH;
+	value8 = BIT_HCI_TXDMA_EN | BIT_TXDMA_EN;
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_CR, value8);
+	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_H2CQ_CSR, BIT(31));
+
+	/* Config hi priority queue and public priority queue page number (only for DLFW) */
+	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_INFO_1, 0x200);
+	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_RQPN_CTRL_2, HALMAC_REG_READ_32(pHalmac_adapter, REG_RQPN_CTRL_2) | BIT(31));
+
+	if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_SDIO) {
+		HALMAC_REG_READ_32(pHalmac_adapter, REG_SDIO_FREE_TXPG);
+		HALMAC_REG_WRITE_32(pHalmac_adapter, REG_SDIO_TX_CTRL, 0x00000000);
+	}
+
+	value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_CR + 1);
+	restore[0] = value8;
+	value8 = (u8)(value8 | BIT(0));
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_CR + 1, value8);
+	value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_BCN_CTRL);
+	restore[1] = value8;
+	value8 = (u8)((value8 & (~(BIT(3)))) | BIT(4));
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_BCN_CTRL, value8);
+	value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_FWHW_TXQ_CTRL + 2);
+	restore[2] = value8;
+	value8 = (u8)(value8 & ~(BIT(6)));
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_FWHW_TXQ_CTRL + 2, value8);
+
+	/* Set beacon header to  0 */
+	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, 0x8000);
+
+	/* Download FW to Flash flow */
+	mem_offset = 0;
+	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_h2c_extra_info_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
+
+	while (halmac_fw_size != 0) {
+		if (halmac_fw_size >= (HALMAC_EXTRA_INFO_BUFF_SIZE_88XX - 48))
+			send_pkt_size = HALMAC_EXTRA_INFO_BUFF_SIZE_88XX - 48;
+		else
+			send_pkt_size = halmac_fw_size;
+
+		status = halmac_download_rsvd_page_88xx(pHalmac_adapter, pHalmac_fw + mem_offset, send_pkt_size);
+
+		if (status != HALMAC_RET_SUCCESS) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_download_rsvd_page_88xx Fail = %x!!\n", status);
+			HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
+			goto DLFW_FAIL;
+		} else {
+			/* Construct H2C Content */
+			DOWNLOAD_FLASH_SET_SPI_CMD(pH2c_buff, 0x02);
+			DOWNLOAD_FLASH_SET_LOCATION(pH2c_buff, pHalmac_adapter->txff_allocation.rsvd_h2c_extra_info_pg_bndy - pHalmac_adapter->txff_allocation.rsvd_pg_bndy);
+			DOWNLOAD_FLASH_SET_SIZE(pH2c_buff, send_pkt_size);
+			DOWNLOAD_FLASH_SET_START_ADDR(pH2c_buff, rom_address);
+
+			/* Fill in H2C Header */
+			h2c_header_info.sub_cmd_id = SUB_CMD_ID_DOWNLOAD_FLASH;
+			h2c_header_info.content_size = 20;
+			h2c_header_info.ack = _TRUE;
+			halmac_set_fw_offload_h2c_header_88xx(pHalmac_adapter, pH2c_buff, &h2c_header_info, &h2c_seq_mum);
+
+			/* Send H2C Cmd Packet */
+			status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
+			if (status != HALMAC_RET_SUCCESS) {
+				PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail!!\n");
+				goto DLFW_FAIL;
+			}
+
+			value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_MCUTST_I);
+			value8 |= BIT(0);
+			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MCUTST_I, value8);
+		}
+
+		rom_address += send_pkt_size;
+		mem_offset += send_pkt_size;
+		halmac_fw_size -= send_pkt_size;
+
+		while (((HALMAC_REG_READ_8(pHalmac_adapter, REG_MCUTST_I)) & BIT(0)) != 0)
+			PLATFORM_RTL_DELAY_US(pDriver_adapter, 1000);
+
+		if (((HALMAC_REG_READ_8(pHalmac_adapter, REG_MCUTST_I)) & BIT(0)) != 0) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "download flash fail!!\n");
+			goto DLFW_FAIL;
 		}
-		*new_rate = HALMAC_OFDM24;
+	}
+
+	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_FWHW_TXQ_CTRL + 2, restore[2]);
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_BCN_CTRL, restore[1]);
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_CR + 1, restore[0]);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_download_flash_88xx <==========\n");
+	return HALMAC_RET_SUCCESS;
+
+DLFW_FAIL:
+
+	return HALMAC_RET_DLFW_FAIL;
+}
+
+/**
+ * halmac_read_flash_88xx() -read data from flash
+ * @pHalmac_adapter : the adapter of halmac
+ * @addr : flash start address where fw should be read
+ * Author : Pablo Chiu
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+HALMAC_RET_STATUS
+halmac_read_flash_88xx(
+	IN PHALMAC_ADAPTER	pHalmac_adapter,
+	u32 addr
+)
+{
+	VOID *pDriver_adapter = NULL;
+	PHALMAC_API pHalmac_api;
+	HALMAC_RET_STATUS status;
+	HALMAC_H2C_HEADER_INFO h2c_header_info;
+	u8 value8;
+	u8 restore[3];
+	u8 pH2c_buff[HALMAC_H2C_CMD_SIZE_88XX] = {0};
+	u16 h2c_seq_mum = 0;
+
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_ADAPTER_INVALID;
+
+	pDriver_adapter =  pHalmac_adapter->pDriver_adapter;
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_download_flash_88xx ==========>\n");
+
+	pHalmac_adapter->halmac_state.dlfw_state = HALMAC_DLFW_NONE;
+
+	value8 = HALMAC_DMA_MAPPING_HIGH << 6;
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_TXDMA_PQ_MAP + 1, value8);
+
+	/* DLFW only use HIQ, map HIQ to hi priority */
+	pHalmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_HI] = HALMAC_DMA_MAPPING_HIGH;
+	value8 = BIT_HCI_TXDMA_EN | BIT_TXDMA_EN;
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_CR, value8);
+	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_H2CQ_CSR, BIT(31));
+
+	/* Config hi priority queue and public priority queue page number (only for DLFW) */
+	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_INFO_1, 0x200);
+	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_RQPN_CTRL_2, HALMAC_REG_READ_32(pHalmac_adapter, REG_RQPN_CTRL_2) | BIT(31));
+
+	if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_SDIO) {
+		HALMAC_REG_READ_32(pHalmac_adapter, REG_SDIO_FREE_TXPG);
+		HALMAC_REG_WRITE_32(pHalmac_adapter, REG_SDIO_TX_CTRL, 0x00000000);
+	}
+
+	value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_CR + 1);
+	restore[0] = value8;
+	value8 = (u8)(value8 | BIT(0));
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_CR + 1, value8);
+	value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_BCN_CTRL);
+	restore[1] = value8;
+	value8 = (u8)((value8 & (~(BIT(3)))) | BIT(4));
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_BCN_CTRL, value8);
+	value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_FWHW_TXQ_CTRL + 2);
+	restore[2] = value8;
+	value8 = (u8)(value8 & ~(BIT(6)));
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_FWHW_TXQ_CTRL + 2, value8);
+
+	/* Set beacon header to  0 */
+	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, 0x8000);
+	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_h2c_extra_info_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
+	value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_MCUTST_I);
+	value8 |= BIT(0);
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MCUTST_I, value8);
+
+	/* Construct H2C Content */
+	DOWNLOAD_FLASH_SET_SPI_CMD(pH2c_buff, 0x03);
+	DOWNLOAD_FLASH_SET_LOCATION(pH2c_buff, pHalmac_adapter->txff_allocation.rsvd_h2c_extra_info_pg_bndy - pHalmac_adapter->txff_allocation.rsvd_pg_bndy);
+	DOWNLOAD_FLASH_SET_SIZE(pH2c_buff, 4096);
+	DOWNLOAD_FLASH_SET_START_ADDR(pH2c_buff, addr);
+
+	/* Fill in H2C Header */
+	h2c_header_info.sub_cmd_id = SUB_CMD_ID_DOWNLOAD_FLASH;
+	h2c_header_info.content_size = 16;
+	h2c_header_info.ack = _TRUE;
+	halmac_set_fw_offload_h2c_header_88xx(pHalmac_adapter, pH2c_buff, &h2c_header_info, &h2c_seq_mum);
+
+	/* Send H2C Cmd Packet */
+	status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
+	if (status != HALMAC_RET_SUCCESS) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail!!\n");
+		goto DLFW_FAIL;
+	}
+
+	while (((HALMAC_REG_READ_8(pHalmac_adapter, REG_MCUTST_I)) & BIT(0)) != 0)
+		PLATFORM_RTL_DELAY_US(pDriver_adapter, 1000);
+
+	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_FWHW_TXQ_CTRL + 2, restore[2]);
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_BCN_CTRL, restore[1]);
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_CR + 1, restore[0]);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_download_flash_88xx <==========\n");
+	return HALMAC_RET_SUCCESS;
+
+DLFW_FAIL:
+
+	return HALMAC_RET_FAIL;
+}
+
+/**
+ * halmac_erase_flash_88xx() -erase flash data
+ * @pHalmac_adapter : the adapter of halmac
+ * @erase_cmd : erase command
+ * @addr : flash start address where fw should be erased
+ * Author : Pablo Chiu
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+HALMAC_RET_STATUS
+halmac_erase_flash_88xx(
+	IN PHALMAC_ADAPTER	pHalmac_adapter,
+	u8 erase_cmd,
+	u32 addr
+)
+{
+	VOID *pDriver_adapter = NULL;
+	HALMAC_RET_STATUS status;
+	HALMAC_H2C_HEADER_INFO h2c_header_info;
+	PHALMAC_API pHalmac_api;
+	u8 value8;
+	u8 pH2c_buff[HALMAC_H2C_CMD_SIZE_88XX] = {0};
+	u16 h2c_seq_mum = 0;
+	u32 timeout;
+
+	/* Construct H2C Content */
+	DOWNLOAD_FLASH_SET_SPI_CMD(pH2c_buff, erase_cmd);
+	DOWNLOAD_FLASH_SET_LOCATION(pH2c_buff, 0);
+	DOWNLOAD_FLASH_SET_START_ADDR(pH2c_buff, addr);
+	DOWNLOAD_FLASH_SET_SIZE(pH2c_buff, 0);
+
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+	value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_MCUTST_I);
+	value8 |= BIT(0);
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MCUTST_I, value8);
+
+	/* Fill in H2C Header */
+	h2c_header_info.sub_cmd_id = SUB_CMD_ID_DOWNLOAD_FLASH;
+	h2c_header_info.content_size = 16;
+	h2c_header_info.ack = _TRUE;
+	halmac_set_fw_offload_h2c_header_88xx(pHalmac_adapter, pH2c_buff, &h2c_header_info, &h2c_seq_mum);
+
+	/* Send H2C Cmd Packet */
+	status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
+
+	if (status != HALMAC_RET_SUCCESS)
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail!!\n");
+
+	timeout = 5000;
+	while ((((HALMAC_REG_READ_8(pHalmac_adapter, REG_MCUTST_I)) & BIT(0)) != 0) && (timeout != 0)) {
+		PLATFORM_RTL_DELAY_US(pDriver_adapter, 1000);
+		timeout--;
+	}
+
+	if (timeout == 0)
+		return HALMAC_RET_FAIL;
+	else
 		return HALMAC_RET_SUCCESS;
+}
+
+/**
+ * halmac_check_flash_88xx() -check flash data
+ * @pHalmac_adapter : the adapter of halmac
+ * @pHalmac_fw : pointer to fw
+ * @halmac_fw_size : fw size
+ * @addr : flash start address where fw should be checked
+ * Author : Pablo Chiu
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+HALMAC_RET_STATUS
+halmac_check_flash_88xx(
+	IN PHALMAC_ADAPTER	pHalmac_adapter,
+	IN u8 *pHalmac_fw,
+	IN u32 halmac_fw_size,
+	IN u32 addr
+)
+{
+	VOID *pDriver_adapter = NULL;
+	PHALMAC_API pHalmac_api;
+	u8	value8;
+	u16 value16, residue;
+	u32 send_pkt_size, start_page, counter;
+
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_ADAPTER_INVALID;
+
+	pDriver_adapter =  pHalmac_adapter->pDriver_adapter;
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+
+	while (halmac_fw_size != 0) {
+		start_page = ((pHalmac_adapter->txff_allocation.rsvd_h2c_extra_info_pg_bndy << 7) >> 12) + 0x780;
+		residue = (pHalmac_adapter->txff_allocation.rsvd_h2c_extra_info_pg_bndy << 7) & (4096 - 1);
+
+		if (halmac_fw_size >= HALMAC_EXTRA_INFO_BUFF_SIZE_88XX)
+			send_pkt_size = HALMAC_EXTRA_INFO_BUFF_SIZE_88XX;
+		else
+			send_pkt_size = halmac_fw_size;
+
+		halmac_read_flash_88xx(pHalmac_adapter, addr);
+
+		value16 = HALMAC_REG_READ_16(pHalmac_adapter, REG_PKTBUF_DBG_CTRL);
+		counter = 0;
+		while (counter < send_pkt_size) {
+			HALMAC_REG_WRITE_16(pHalmac_adapter, REG_PKTBUF_DBG_CTRL, (u16)(start_page | (value16 & 0xF000)));
+			for (value16 = 0x8000 + residue; value16 <= 0x8FFF; value16++) {
+				value8 = HALMAC_REG_READ_8(pHalmac_adapter, value16);
+
+				if (*pHalmac_fw != value8) {
+					PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "check flash fail!!\n");
+					goto DLFW_FAIL;
+				}
+				pHalmac_fw++;
+
+				counter++;
+				if (counter == send_pkt_size)
+					break;
+			}
+			residue = 0;
+			start_page++;
+		}
+		addr += send_pkt_size;
+		halmac_fw_size -= send_pkt_size;
 	}
+
+	return HALMAC_RET_SUCCESS;
+
+DLFW_FAIL:
+
+	return HALMAC_RET_FAIL;
 }
 
+
 /**
- * halmac_sdio_cmd53_4byte_88xx() - cmd53 only for 4byte len register IO
- * @pHalmac_adapter
- * @enable : 1->CMD53 only use in 4byte reg, 0 : No limitation
- * Author : Ivan Lin/KaiYuan Chang
+ * halmac_cfg_edca_para_88xx() - config edca parameter
+ * @pHalmac_adapter : the adapter of halmac
+ * @acq_id : VO/VI/BE/BK
+ * @pEdca_para : aifs, cw, txop limit
+ * Author : Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
-halmac_sdio_cmd53_4byte_88xx(
+halmac_cfg_edca_para_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
-	IN u8 enable
+	IN HALMAC_ACQ_ID acq_id,
+	IN PHALMAC_EDCA_PARA pEdca_para
 )
 {
-	pHalmac_adapter->sdio_cmd53_4byte = enable;
+	u32 offset, value32;
+	VOID *pDriver_adapter = NULL;
+	PHALMAC_API pHalmac_api;
+
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_ADAPTER_INVALID;
+
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_API_INVALID;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]halmac_cfg_edca_88xx ==========>\n");
+
+	switch (acq_id) {
+	case HALMAC_ACQ_ID_VO:
+		offset = REG_EDCA_VO_PARAM;
+		break;
+	case HALMAC_ACQ_ID_VI:
+		offset = REG_EDCA_VI_PARAM;
+		break;
+	case HALMAC_ACQ_ID_BE:
+		offset = REG_EDCA_BE_PARAM;
+		break;
+	case HALMAC_ACQ_ID_BK:
+		offset = REG_EDCA_BK_PARAM;
+		break;
+	default:
+		return HALMAC_RET_SWITCH_CASE_ERROR;
+	}
+
+	value32 = (pEdca_para->aifs & 0xFF) | ((pEdca_para->cw & 0xFF) << 8) | ((pEdca_para->txop_limit & 0x7FF) << 16);
+
+	HALMAC_REG_WRITE_32(pHalmac_adapter, offset, value32);
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]halmac_cfg_edca_88xx <==========\n");
 
 	return HALMAC_RET_SUCCESS;
-}
\ No newline at end of file
+}
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx.h b/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx.h
index e5d2fa2..74a747f 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx.h
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_API_88XX_H_
 #define _HALMAC_API_88XX_H_
 
@@ -32,6 +47,14 @@ halmac_download_firmware_88xx(
 );
 
 HALMAC_RET_STATUS
+halmac_free_download_firmware_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN HALMAC_DLFW_MEM dlfw_mem,
+	IN u8 *pHamacl_fw,
+	IN u32 halmac_fw_size
+);
+
+HALMAC_RET_STATUS
 halmac_get_fw_version_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	OUT PHALMAC_FW_VERSION pFw_version
@@ -144,6 +167,20 @@ halmac_write_efuse_bt_88xx(
 );
 
 HALMAC_RET_STATUS
+halmac_read_efuse_bt_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u32 halmac_offset,
+	OUT u8 *pValue,
+	IN HALMAC_EFUSE_BANK halmac_efuse_bank
+);
+
+HALMAC_RET_STATUS
+halmac_cfg_efuse_auto_check_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 enable
+);
+
+HALMAC_RET_STATUS
 halmac_pg_efuse_by_map_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN PHALMAC_PG_EFUSE_INFO pPg_efuse_info,
@@ -196,40 +233,6 @@ halmac_read_logical_efuse_88xx(
 );
 
 HALMAC_RET_STATUS
-halmac_cfg_fwlps_option_88xx(
-	IN PHALMAC_ADAPTER pHalmac_adapter,
-	IN PHALMAC_FWLPS_OPTION pLps_option
-);
-
-HALMAC_RET_STATUS
-halmac_cfg_fwips_option_88xx(
-	IN PHALMAC_ADAPTER pHalmac_adapter,
-	IN PHALMAC_FWIPS_OPTION pIps_option
-);
-
-HALMAC_RET_STATUS
-halmac_enter_wowlan_88xx(
-	IN PHALMAC_ADAPTER pHalmac_adapter,
-	IN PHALMAC_WOWLAN_OPTION pWowlan_option
-);
-
-HALMAC_RET_STATUS
-halmac_leave_wowlan_88xx(
-	IN PHALMAC_ADAPTER pHalmac_adapter
-);
-
-HALMAC_RET_STATUS
-halmac_enter_ps_88xx(
-	IN PHALMAC_ADAPTER pHalmac_adapter,
-	IN HALMAC_PS_STATE ps_state
-);
-
-HALMAC_RET_STATUS
-halmac_leave_ps_88xx(
-	IN PHALMAC_ADAPTER pHalmac_adapter
-);
-
-HALMAC_RET_STATUS
 halmac_h2c_lb_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter
 );
@@ -420,6 +423,18 @@ halmac_ctrl_ch_switch_88xx(
 );
 
 HALMAC_RET_STATUS
+halmac_p2pps_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN PHALMAC_P2PPS	pP2PPS
+);
+
+static HALMAC_RET_STATUS
+halmac_func_p2pps_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN PHALMAC_P2PPS	pP2PPS
+);
+
+HALMAC_RET_STATUS
 halmac_clear_ch_info_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter
 );
@@ -433,7 +448,7 @@ halmac_send_general_info_88xx(
 HALMAC_RET_STATUS
 halmac_start_iqk_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
-	IN u8 clear
+	IN PHALMAC_IQK_PARA pIqk_para
 );
 
 HALMAC_RET_STATUS
@@ -579,9 +594,45 @@ halmac_cfg_csi_rate_88xx(
 );
 
 HALMAC_RET_STATUS
-halmac_sdio_cmd53_4byte_88xx(
+halmac_txfifo_is_empty_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
-	IN u8 enable
+	IN u32 chk_num
+);
+
+HALMAC_RET_STATUS
+halmac_download_flash_88xx(
+	IN PHALMAC_ADAPTER	pHalmac_adapter,
+	IN u8 *pHalmac_fw,
+	IN u32 halmac_fw_size,
+	IN u32 rom_address
+);
+
+HALMAC_RET_STATUS
+halmac_read_flash_88xx(
+	IN PHALMAC_ADAPTER	pHalmac_adapter,
+	u32 addr
+);
+
+HALMAC_RET_STATUS
+halmac_erase_flash_88xx(
+	IN PHALMAC_ADAPTER	pHalmac_adapter,
+	u8 erase_cmd,
+	u32 addr
+);
+
+HALMAC_RET_STATUS
+halmac_check_flash_88xx(
+	IN PHALMAC_ADAPTER	pHalmac_adapter,
+	IN u8 *pHalmac_fw,
+	IN u32 halmac_fw_size,
+	IN u32 addr
+);
+
+HALMAC_RET_STATUS
+halmac_cfg_edca_para_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN HALMAC_ACQ_ID acq_id,
+	IN PHALMAC_EDCA_PARA pEdca_para
 );
 
 #endif/* _HALMAC_API_H_ */
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_pcie.c b/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_pcie.c
index 76e5cd3..c08801b 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_pcie.c
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_pcie.c
@@ -1,10 +1,26 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #include "halmac_88xx_cfg.h"
 
 /**
- * halmac_init_pcie_cfg_88xx() - init PCIE related register
- * @pHalmac_adapter
+ * halmac_init_pcie_cfg_88xx() -  init PCIe
+ * @pHalmac_adapter : the adapter of halmac
  * Author : KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_init_pcie_cfg_88xx(
@@ -13,14 +29,12 @@ halmac_init_pcie_cfg_88xx(
 {
 	VOID *pDriver_adapter = NULL;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_INIT_PCIE_CFG);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_init_pcie_cfg_88xx ==========>\n");
@@ -31,10 +45,11 @@ halmac_init_pcie_cfg_88xx(
 }
 
 /**
- * halmac_deinit_pcie_cfg_88xx() - deinit PCIE related register
- * @pHalmac_adapter
+ * halmac_deinit_pcie_cfg_88xx() - deinit PCIE
+ * @pHalmac_adapter : the adapter of halmac
  * Author : KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_deinit_pcie_cfg_88xx(
@@ -43,14 +58,12 @@ halmac_deinit_pcie_cfg_88xx(
 {
 	VOID *pDriver_adapter = NULL;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_DEINIT_PCIE_CFG);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_deinit_pcie_cfg_88xx ==========>\n");
@@ -62,10 +75,11 @@ halmac_deinit_pcie_cfg_88xx(
 
 /**
  * halmac_cfg_rx_aggregation_88xx_pcie() - config rx aggregation
- * @pHalmac_adapter
+ * @pHalmac_adapter : the adapter of halmac
  * @halmac_rx_agg_mode
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_rx_aggregation_88xx_pcie(
@@ -75,14 +89,12 @@ halmac_cfg_rx_aggregation_88xx_pcie(
 {
 	VOID *pDriver_adapter = NULL;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_RX_AGGREGATION);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_cfg_rx_aggregation_88xx_pcie ==========>\n");
@@ -94,10 +106,11 @@ halmac_cfg_rx_aggregation_88xx_pcie(
 
 /**
  * halmac_reg_read_8_pcie_88xx() - read 1byte register
- * @pHalmac_adapter
- * @halmac_offset
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : register offset
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 u8
 halmac_reg_read_8_pcie_88xx(
@@ -108,10 +121,10 @@ halmac_reg_read_8_pcie_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
@@ -122,11 +135,12 @@ halmac_reg_read_8_pcie_88xx(
 
 /**
  * halmac_reg_write_8_pcie_88xx() - write 1byte register
- * @pHalmac_adapter
- * @halmac_offset
- * @halmac_data
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : register offset
+ * @halmac_data : register value
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_reg_write_8_pcie_88xx(
@@ -138,10 +152,10 @@ halmac_reg_write_8_pcie_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
@@ -154,10 +168,11 @@ halmac_reg_write_8_pcie_88xx(
 
 /**
  * halmac_reg_read_16_pcie_88xx() - read 2byte register
- * @pHalmac_adapter
- * @halmac_offset
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : register offset
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 u16
 halmac_reg_read_16_pcie_88xx(
@@ -168,10 +183,10 @@ halmac_reg_read_16_pcie_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
@@ -182,11 +197,12 @@ halmac_reg_read_16_pcie_88xx(
 
 /**
  * halmac_reg_write_16_pcie_88xx() - write 2byte register
- * @pHalmac_adapter
- * @halmac_offset
- * @halmac_data
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : register offset
+ * @halmac_data : register value
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_reg_write_16_pcie_88xx(
@@ -198,10 +214,10 @@ halmac_reg_write_16_pcie_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
@@ -214,10 +230,11 @@ halmac_reg_write_16_pcie_88xx(
 
 /**
  * halmac_reg_read_32_pcie_88xx() - read 4byte register
- * @pHalmac_adapter
- * @halmac_offset
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : register offset
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 u32
 halmac_reg_read_32_pcie_88xx(
@@ -228,10 +245,10 @@ halmac_reg_read_32_pcie_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
@@ -242,11 +259,12 @@ halmac_reg_read_32_pcie_88xx(
 
 /**
  * halmac_reg_write_32_pcie_88xx() - write 4byte register
- * @pHalmac_adapter
- * @halmac_offset
- * @halmac_data
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : register offset
+ * @halmac_data : register value
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_reg_write_32_pcie_88xx(
@@ -258,10 +276,10 @@ halmac_reg_write_32_pcie_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
@@ -273,12 +291,13 @@ halmac_reg_write_32_pcie_88xx(
 }
 
 /**
- * halmac_cfg_tx_agg_align_pcie_not_support_88xx() -
- * @pHalmac_adapter
- * @enable
- * @align_size
+ * halmac_cfg_tx_agg_align_pcie_88xx() -config sdio bus tx agg alignment
+ * @pHalmac_adapter : the adapter of halmac
+ * @enable : function enable(1)/disable(0)
+ * @align_size : sdio bus tx agg alignment size (2^n, n = 3~11)
  * Author : Soar Tu
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_tx_agg_align_pcie_not_support_88xx(
@@ -287,26 +306,5 @@ halmac_cfg_tx_agg_align_pcie_not_support_88xx(
 	IN u16	align_size
 )
 {
-	PHALMAC_API pHalmac_api;
-	VOID *pDriver_adapter = NULL;
-
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
-		return HALMAC_RET_ADAPTER_INVALID;
-
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
-		return HALMAC_RET_API_INVALID;
-
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_TX_AGG_ALIGN);
-
-	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
-
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_cfg_tx_agg_align_pcie_not_support_88xx ==========>\n");
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_cfg_tx_agg_align_pcie_not_support_88xx not support\n");
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_cfg_tx_agg_align_pcie_not_support_88xx <==========\n");
-
-	return HALMAC_RET_SUCCESS;
+	return HALMAC_RET_NOT_SUPPORT;
 }
-
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_pcie.h b/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_pcie.h
index 6464187..0e471b1 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_pcie.h
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_pcie.h
@@ -1,16 +1,24 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_API_88XX_PCIE_H_
 #define _HALMAC_API_88XX_PCIE_H_
 
 #include "../halmac_2_platform.h"
 #include "../halmac_type.h"
 
-#define LINK_CTRL2_REG_OFFSET	0xA0
-#define GEN2_CTRL_OFFSET		0x80C
-#define LINK_STATUS_REG_OFFSET	0x82
-#define GEN1_SPEED				0x01
-#define GEN2_SPEED				0x02
-
-
 HALMAC_RET_STATUS
 halmac_init_pcie_cfg_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_sdio.c b/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_sdio.c
index 1de3198..3d4e6c1 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_sdio.c
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_sdio.c
@@ -1,46 +1,68 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #include "halmac_88xx_cfg.h"
 
 /**
- * halmac_init_sdio_cfg_88xx() - init SDIO related register
- * @pHalmac_adapter
+ * halmac_init_sdio_cfg_88xx() - init SDIO
+ * @pHalmac_adapter : the adapter of halmac
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_init_sdio_cfg_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter
 )
 {
+	u32 value32;
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
-	u8 data[16] = {0};
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_INIT_SDIO_CFG);
+	if (pHalmac_adapter->halmac_interface != HALMAC_INTERFACE_SDIO)
+		return HALMAC_RET_WRONG_INTF;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_init_sdio_cfg_88xx ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]halmac_init_sdio_cfg_88xx ==========>\n");
 
 	HALMAC_REG_READ_32(pHalmac_adapter, REG_SDIO_FREE_TXPG);
-	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_SDIO_TX_CTRL, 0x00000000);
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_init_sdio_cfg_88xx <==========\n");
+	value32 = HALMAC_REG_READ_32(pHalmac_adapter, REG_SDIO_TX_CTRL);
+	value32 &= 0x0000FFFF;
+	value32 &= ~(BIT_CMD_ERR_STOP_INT_EN | BIT_EN_MASK_TIMER | BIT_EN_RXDMA_MASK_INT);
+	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_SDIO_TX_CTRL, value32);
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]halmac_init_sdio_cfg_88xx <==========\n");
 
 	return HALMAC_RET_SUCCESS;
 }
 
 /**
- * halmac_deinit_sdio_cfg_88xx() - deinit SDIO related register
- * @pHalmac_adapter
+ * halmac_deinit_sdio_cfg_88xx() - deinit SDIO
+ * @pHalmac_adapter : the adapter of halmac
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_deinit_sdio_cfg_88xx(
@@ -49,14 +71,12 @@ halmac_deinit_sdio_cfg_88xx(
 {
 	VOID *pDriver_adapter = NULL;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_DEINIT_SDIO_CFG);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_deinit_sdio_cfg_88xx ==========>\n");
@@ -68,10 +88,11 @@ halmac_deinit_sdio_cfg_88xx(
 
 /**
  * halmac_cfg_rx_aggregation_88xx_sdio() - config rx aggregation
- * @pHalmac_adapter
+ * @pHalmac_adapter : the adapter of halmac
  * @halmac_rx_agg_mode
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_rx_aggregation_88xx_sdio(
@@ -84,14 +105,12 @@ halmac_cfg_rx_aggregation_88xx_sdio(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_RX_AGGREGATION);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -113,7 +132,7 @@ halmac_cfg_rx_aggregation_88xx_sdio(
 		break;
 	}
 
-	if (_FALSE == phalmac_rxagg_cfg->threshold.drv_define) {
+	if (phalmac_rxagg_cfg->threshold.drv_define == _FALSE) {
 		size = 0xFF;
 		timeout = 0x01;
 	} else {
@@ -121,9 +140,8 @@ halmac_cfg_rx_aggregation_88xx_sdio(
 		timeout = phalmac_rxagg_cfg->threshold.timeout;
 	}
 
-
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_TXDMA_PQ_MAP, agg_enable);
-	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_RXDMA_AGG_PG_TH, (u16)(size | (timeout << BIT_SHIFT_DMA_AGG_TO)));
+	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_RXDMA_AGG_PG_TH, (u16)(size | (timeout << BIT_SHIFT_DMA_AGG_TO_V1)));
 
 	value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_RXDMA_MODE);
 	if (0 != (agg_enable & BIT_RXDMA_AGG_EN))
@@ -138,10 +156,11 @@ halmac_cfg_rx_aggregation_88xx_sdio(
 
 /**
  * halmac_reg_read_8_sdio_88xx() - read 1byte register
- * @pHalmac_adapter
- * @halmac_offset
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : register offset
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 u8
 halmac_reg_read_8_sdio_88xx(
@@ -154,10 +173,10 @@ halmac_reg_read_8_sdio_88xx(
 	PHALMAC_API pHalmac_api;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
@@ -168,7 +187,7 @@ halmac_reg_read_8_sdio_88xx(
 
 	status = halmac_convert_to_sdio_bus_offset_88xx(pHalmac_adapter, &halmac_offset);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_reg_read_8_sdio_88xx error = %x\n", status);
 		return status;
 	}
@@ -180,11 +199,12 @@ halmac_reg_read_8_sdio_88xx(
 
 /**
  * halmac_reg_write_8_sdio_88xx() - write 1byte register
- * @pHalmac_adapter
- * @halmac_offset
- * @halmac_data
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : register offset
+ * @halmac_data : register value
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_reg_write_8_sdio_88xx(
@@ -197,10 +217,10 @@ halmac_reg_write_8_sdio_88xx(
 	PHALMAC_API pHalmac_api;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
@@ -211,7 +231,7 @@ halmac_reg_write_8_sdio_88xx(
 
 	status = halmac_convert_to_sdio_bus_offset_88xx(pHalmac_adapter, &halmac_offset);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_reg_write_8_sdio_88xx error = %x\n", status);
 		return status;
 	}
@@ -223,10 +243,11 @@ halmac_reg_write_8_sdio_88xx(
 
 /**
  * halmac_reg_read_16_sdio_88xx() - read 2byte register
- * @pHalmac_adapter
- * @halmac_offset
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : register offset
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 u16
 halmac_reg_read_16_sdio_88xx(
@@ -235,49 +256,51 @@ halmac_reg_read_16_sdio_88xx(
 )
 {
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
+	u32 halmac_offset_old = 0;
 
 	union {
 		u16	word;
 		u8	byte[2];
 	} value16 = { 0x0000 };
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+	halmac_offset_old = halmac_offset;
 
 	if (0 == (halmac_offset & 0xFFFF0000))
 		halmac_offset |= WLAN_IOREG_OFFSET;
 
 	status = halmac_convert_to_sdio_bus_offset_88xx(pHalmac_adapter, &halmac_offset);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_reg_read_16_sdio_88xx error = %x\n", status);
 		return status;
 	}
 
-	if (HALMAC_MAC_POWER_OFF == pHalmac_adapter->halmac_state.mac_power || 0 != (halmac_offset & (2 - 1))  || 1 == pHalmac_adapter->sdio_cmd53_4byte) {
+	if ((pHalmac_adapter->halmac_state.mac_power == HALMAC_MAC_POWER_OFF) || ((halmac_offset & (2 - 1)) != 0) ||
+		(pHalmac_adapter->sdio_cmd53_4byte == HALMAC_SDIO_CMD53_4BYTE_MODE_RW) || (pHalmac_adapter->sdio_cmd53_4byte == HALMAC_SDIO_CMD53_4BYTE_MODE_R)) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]use cmd52, offset = %x\n", halmac_offset);
 		value16.byte[0] = PLATFORM_SDIO_CMD52_READ(pDriver_adapter, halmac_offset);
 		value16.byte[1] = PLATFORM_SDIO_CMD52_READ(pDriver_adapter, halmac_offset + 1);
 		value16.word = rtk_le16_to_cpu(value16.word);
 	} else {
-#if (PLATFORM_SD_CLK > HALMAC_SD_CLK_THRESHOLD_88XX)
-		if ((halmac_offset & 0xffffef00) == 0x00000000) {
-			value16.byte[0] = PLATFORM_SDIO_CMD52_READ(pDriver_adapter, halmac_offset);
-			value16.byte[1] = PLATFORM_SDIO_CMD52_READ(pDriver_adapter, halmac_offset + 1);
-			value16.word = rtk_le16_to_cpu(value16.word);
+		if (pHalmac_adapter->sdio_hw_info.io_hi_speed_flag != 0) {
+			if ((halmac_offset_old & 0xffffef00) == 0x00000000) {
+				value16.byte[0] = PLATFORM_SDIO_CMD52_READ(pDriver_adapter, halmac_offset);
+				value16.byte[1] = PLATFORM_SDIO_CMD52_READ(pDriver_adapter, halmac_offset + 1);
+				value16.word = rtk_le16_to_cpu(value16.word);
+			} else {
+				value16.word = PLATFORM_SDIO_CMD53_READ_16(pDriver_adapter, halmac_offset);
+			}
 		} else {
 			value16.word = PLATFORM_SDIO_CMD53_READ_16(pDriver_adapter, halmac_offset);
 		}
-#else
-		value16.word = PLATFORM_SDIO_CMD53_READ_16(pDriver_adapter, halmac_offset);
-#endif
 	}
 
 	return value16.word;
@@ -285,11 +308,12 @@ halmac_reg_read_16_sdio_88xx(
 
 /**
  * halmac_reg_write_16_sdio_88xx() - write 2byte register
- * @pHalmac_adapter
- * @halmac_offset
- * @halmac_data
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : register offset
+ * @halmac_data : register value
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_reg_write_16_sdio_88xx(
@@ -299,29 +323,29 @@ halmac_reg_write_16_sdio_88xx(
 )
 {
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	if (0 == (halmac_offset & 0xFFFF0000))
 		halmac_offset |= WLAN_IOREG_OFFSET;
 
 	status = halmac_convert_to_sdio_bus_offset_88xx(pHalmac_adapter, &halmac_offset);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_reg_write_16_sdio_88xx error = %x\n", status);
 		return status;
 	}
 
-	if (HALMAC_MAC_POWER_OFF == pHalmac_adapter->halmac_state.mac_power || 0 != (halmac_offset & (2 - 1)) || 1 == pHalmac_adapter->sdio_cmd53_4byte) {
+	if ((pHalmac_adapter->halmac_state.mac_power == HALMAC_MAC_POWER_OFF) || ((halmac_offset & (2 - 1)) != 0) ||
+		(pHalmac_adapter->sdio_cmd53_4byte == HALMAC_SDIO_CMD53_4BYTE_MODE_RW) || (pHalmac_adapter->sdio_cmd53_4byte == HALMAC_SDIO_CMD53_4BYTE_MODE_W)) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]use cmd52, offset = %x\n", halmac_offset);
 		PLATFORM_SDIO_CMD52_WRITE(pDriver_adapter, halmac_offset, (u8)(halmac_data & 0xFF));
 		PLATFORM_SDIO_CMD52_WRITE(pDriver_adapter, halmac_offset + 1, (u8)((halmac_data & 0xFF00) >> 8));
 	} else {
@@ -333,10 +357,11 @@ halmac_reg_write_16_sdio_88xx(
 
 /**
  * halmac_reg_read_32_sdio_88xx() - read 4byte register
- * @pHalmac_adapter
- * @halmac_offset
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : register offset
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 u32
 halmac_reg_read_32_sdio_88xx(
@@ -344,61 +369,54 @@ halmac_reg_read_32_sdio_88xx(
 	IN u32 halmac_offset
 )
 {
-	u8 rtemp = 0xFF;
-	u32 counter = 1000;
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
-    u32 halmac_offset_old = 0;
+	u32 halmac_offset_old = 0;
 
 	union {
 		u32	dword;
 		u8	byte[4];
 	} value32 = { 0x00000000 };
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
-
-    halmac_offset_old = halmac_offset;
+	halmac_offset_old = halmac_offset;
 
 	if (0 == (halmac_offset & 0xFFFF0000))
 		halmac_offset |= WLAN_IOREG_OFFSET;
 
 	status = halmac_convert_to_sdio_bus_offset_88xx(pHalmac_adapter, &halmac_offset);
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_reg_read_32_sdio_88xx error = %x\n", status);
 		return status;
 	}
 
-	if (HALMAC_MAC_POWER_OFF == pHalmac_adapter->halmac_state.mac_power || 0 != (halmac_offset & (4 - 1))) {
+	if (pHalmac_adapter->halmac_state.mac_power == HALMAC_MAC_POWER_OFF || (halmac_offset & (4 - 1)) != 0) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_WARN, "[WARN]use cmd52, offset = %x\n", halmac_offset);
 		value32.byte[0] = PLATFORM_SDIO_CMD52_READ(pDriver_adapter, halmac_offset);
 		value32.byte[1] = PLATFORM_SDIO_CMD52_READ(pDriver_adapter, halmac_offset + 1);
 		value32.byte[2] = PLATFORM_SDIO_CMD52_READ(pDriver_adapter, halmac_offset + 2);
 		value32.byte[3] = PLATFORM_SDIO_CMD52_READ(pDriver_adapter, halmac_offset + 3);
 		value32.dword = rtk_le32_to_cpu(value32.dword);
 	} else {
-#if (PLATFORM_SD_CLK > HALMAC_SD_CLK_THRESHOLD_88XX)
-		if ((PLATFORM_SD_CLK > HALMAC_SD_CLK_THRESHOLD_88XX) && ((halmac_offset_old & 0xffffef00) == 0x00000000)) {
-			PLATFORM_SDIO_CMD53_WRITE_32(pDriver_adapter, (SDIO_LOCAL_DEVICE_ID << 13) | (REG_SDIO_INDIRECT_REG_CFG & HALMAC_SDIO_LOCAL_MSK), halmac_offset_old | BIT(19) | BIT(17));
-
-			do {
-				rtemp = PLATFORM_SDIO_CMD52_READ(pDriver_adapter, (SDIO_LOCAL_DEVICE_ID << 13) | ((REG_SDIO_INDIRECT_REG_CFG + 2) & HALMAC_SDIO_LOCAL_MSK));
-				counter--;
-			} while (((rtemp & BIT(4)) != 0) && (counter > 0));
-
-			value32.dword = PLATFORM_SDIO_CMD53_READ_32(pDriver_adapter, (SDIO_LOCAL_DEVICE_ID << 13) | (REG_SDIO_INDIRECT_REG_DATA & HALMAC_SDIO_LOCAL_MSK));
+		if (pHalmac_adapter->sdio_hw_info.io_hi_speed_flag != 0) {
+			if ((halmac_offset_old & 0xffffef00) == 0x00000000) {
+				value32.byte[0] = PLATFORM_SDIO_CMD52_READ(pDriver_adapter, halmac_offset);
+				value32.byte[1] = PLATFORM_SDIO_CMD52_READ(pDriver_adapter, halmac_offset + 1);
+				value32.byte[2] = PLATFORM_SDIO_CMD52_READ(pDriver_adapter, halmac_offset + 2);
+				value32.byte[3] = PLATFORM_SDIO_CMD52_READ(pDriver_adapter, halmac_offset + 3);
+				value32.dword = rtk_le32_to_cpu(value32.dword);
+			} else {
+				value32.dword = PLATFORM_SDIO_CMD53_READ_32(pDriver_adapter, halmac_offset);
+			}
 		} else {
 			value32.dword = PLATFORM_SDIO_CMD53_READ_32(pDriver_adapter, halmac_offset);
 		}
-#else
-		value32.dword = PLATFORM_SDIO_CMD53_READ_32(pDriver_adapter, halmac_offset);
-#endif
 	}
 
 	return value32.dword;
@@ -406,11 +424,12 @@ halmac_reg_read_32_sdio_88xx(
 
 /**
  * halmac_reg_write_32_sdio_88xx() - write 4byte register
- * @pHalmac_adapter
- * @halmac_offset
- * @halmac_data
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : register offset
+ * @halmac_data : register value
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_reg_write_32_sdio_88xx(
@@ -420,29 +439,27 @@ halmac_reg_write_32_sdio_88xx(
 )
 {
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	if (0 == (halmac_offset & 0xFFFF0000))
+	if ((halmac_offset & 0xFFFF0000) == 0)
 		halmac_offset |= WLAN_IOREG_OFFSET;
 
 	status = halmac_convert_to_sdio_bus_offset_88xx(pHalmac_adapter, &halmac_offset);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_reg_write_32_sdio_88xx error = %x\n", status);
 		return status;
 	}
 
-	if (HALMAC_MAC_POWER_OFF == pHalmac_adapter->halmac_state.mac_power || 0 != (halmac_offset & (4 - 1))) {
+	if (pHalmac_adapter->halmac_state.mac_power == HALMAC_MAC_POWER_OFF || (halmac_offset & (4 - 1)) !=  0) {
 		PLATFORM_SDIO_CMD52_WRITE(pDriver_adapter, halmac_offset, (u8)(halmac_data & 0xFF));
 		PLATFORM_SDIO_CMD52_WRITE(pDriver_adapter, halmac_offset + 1, (u8)((halmac_data & 0xFF00) >> 8));
 		PLATFORM_SDIO_CMD52_WRITE(pDriver_adapter, halmac_offset + 2, (u8)((halmac_data & 0xFF0000) >> 16));
@@ -456,10 +473,13 @@ halmac_reg_write_32_sdio_88xx(
 
 /**
  * halmac_reg_read_nbyte_sdio_88xx() - read n byte register
- * @pHalmac_adapter
- * @halmac_offset
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : register offset
+ * @halmac_size : register value size
+ * @halmac_data : register value
  * Author : Soar
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 u8
 halmac_reg_read_nbyte_sdio_88xx(
@@ -469,25 +489,16 @@ halmac_reg_read_nbyte_sdio_88xx(
 	OUT u8 *halmac_data
 )
 {
-	u8 rtemp = 0xFF;
-	u32 counter = 1000;
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
-	union {
-		u32	dword;
-		u8	byte[4];
-	} value32 = { 0x00000000 };
-
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	if (0 == (halmac_offset & 0xFFFF0000)) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_offset error = 0x%x\n", halmac_offset);
@@ -495,12 +506,12 @@ halmac_reg_read_nbyte_sdio_88xx(
 	}
 
 	status = halmac_convert_to_sdio_bus_offset_88xx(pHalmac_adapter, &halmac_offset);
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_reg_read_nbyte_sdio_88xx error = %x\n", status);
 		return status;
 	}
 
-	if (HALMAC_MAC_POWER_OFF == pHalmac_adapter->halmac_state.mac_power) {
+	if (pHalmac_adapter->halmac_state.mac_power == HALMAC_MAC_POWER_OFF) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_state error = 0x%x\n", pHalmac_adapter->halmac_state.mac_power);
 		return HALMAC_RET_FAIL;
 	}
@@ -511,13 +522,14 @@ halmac_reg_read_nbyte_sdio_88xx(
 }
 
 /**
- * halmac_get_sdio_tx_addr_88xx() - get CMD53 addr for the TX packet
- * @pHalmac_adapter
- * @halmac_buf
- * @halmac_size
- * @pcmd53_addr
+ * halmac_get_sdio_tx_addr_sdio_88xx() - get CMD53 addr for the TX packet
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_buf : tx packet, include txdesc
+ * @halmac_size : tx packet size
+ * @pcmd53_addr : cmd53 addr value
  * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_get_sdio_tx_addr_88xx(
@@ -533,25 +545,23 @@ halmac_get_sdio_tx_addr_88xx(
 	HALMAC_QUEUE_SELECT queue_sel;
 	HALMAC_DMA_MAPPING dma_mapping;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_GET_SDIO_TX_ADDR);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_get_sdio_tx_addr_88xx ==========>\n");
 
-	if (NULL == halmac_buf) {
+	if (halmac_buf == NULL) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_buf is NULL!!\n");
 		return HALMAC_RET_DATA_BUF_NULL;
 	}
 
-	if (0 == halmac_size) {
+	if (halmac_size == 0) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_size is 0!!\n");
 		return HALMAC_RET_DATA_SIZE_INCORRECT;
 	}
@@ -616,12 +626,13 @@ halmac_get_sdio_tx_addr_88xx(
 }
 
 /**
- * halmac_cfg_tx_agg_align_sdio_88xx() -
- * @pHalmac_adapter
- * @enable
- * @align_size
+ * halmac_cfg_tx_agg_align_sdio_88xx() -config sdio bus tx agg alignment
+ * @pHalmac_adapter : the adapter of halmac
+ * @enable : function enable(1)/disable(0)
+ * @align_size : sdio bus tx agg alignment size (2^n, n = 3~11)
  * Author : Soar Tu
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_tx_agg_align_sdio_88xx(
@@ -634,14 +645,12 @@ halmac_cfg_tx_agg_align_sdio_88xx(
 	VOID *pDriver_adapter = NULL;
 	u8 i, align_size_ok = 0;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_TX_AGG_ALIGN);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -677,14 +686,6 @@ halmac_cfg_tx_agg_align_sdio_88xx(
 	return HALMAC_RET_SUCCESS;
 }
 
-/**
- * halmac_cfg_tx_agg_align_sdio_not_support_88xx() -
- * @pHalmac_adapter
- * @enable
- * @align_size
- * Author : Soar Tu
- * Return : HALMAC_RET_STATUS
- */
 HALMAC_RET_STATUS
 halmac_cfg_tx_agg_align_sdio_not_support_88xx(
 	IN PHALMAC_ADAPTER	pHalmac_adapter,
@@ -695,14 +696,12 @@ halmac_cfg_tx_agg_align_sdio_not_support_88xx(
 	PHALMAC_API pHalmac_api;
 	VOID *pDriver_adapter = NULL;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_TX_AGG_ALIGN);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -716,12 +715,13 @@ halmac_cfg_tx_agg_align_sdio_not_support_88xx(
 }
 
 /**
- * halmac_tx_allowed_sdio_88xx() - check sdio tx reserved page
- * @pHalmac_adapter
- * @pHalmac_buf
- * @halmac_size
+ * halmac_tx_allowed_sdio_88xx() - check tx status
+ * @pHalmac_adapter : the adapter of halmac
+ * @pHalmac_buf : tx packet, include txdesc
+ * @halmac_size : tx packet size, include txdesc
  * Author : Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_tx_allowed_sdio_88xx(
@@ -735,28 +735,29 @@ halmac_tx_allowed_sdio_88xx(
 	u32 i, counter;
 	u32 tx_agg_num, packet_size = 0;
 	u32 tx_required_page_num, total_required_page_num = 0;
+	u8 macid_group[HALMAC_MACID_MAX_88XX + 1] = {0}, qsel;
+	u8 macid, macid_counter = 0;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 	VOID *pDriver_adapter = NULL;
 	HALMAC_DMA_MAPPING dma_mapping;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_TX_ALLOWED_SDIO);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_tx_allowed_sdio_88xx ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "halmac_tx_allowed_sdio_88xx ==========>\n");
 
 	tx_agg_num = GET_TX_DESC_DMA_TXAGG_NUM(pHalmac_buf);
 	pCurr_packet = pHalmac_buf;
 
 	tx_agg_num = (tx_agg_num == 0) ? 1 : tx_agg_num;
 
-	switch ((HALMAC_QUEUE_SELECT)GET_TX_DESC_QSEL(pCurr_packet)) {
+	qsel = (u8)GET_TX_DESC_QSEL(pCurr_packet);
+	switch ((HALMAC_QUEUE_SELECT)qsel) {
 	case HALMAC_QUEUE_SELECT_VO:
 	case HALMAC_QUEUE_SELECT_VO_V2:
 		dma_mapping = pHalmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_VO];
@@ -783,30 +784,42 @@ halmac_tx_allowed_sdio_88xx(
 	case HALMAC_QUEUE_SELECT_CMD:
 		return HALMAC_RET_SUCCESS;
 	default:
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "Qsel is out of range\n");
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_ERR, "Qsel is out of range\n");
 		return HALMAC_RET_QSEL_INCORRECT;
 	}
 
 	switch (dma_mapping) {
 	case HALMAC_DMA_MAPPING_HIGH:
-		pCurr_free_space = &(pHalmac_adapter->sdio_free_space.high_queue_number);
+		pCurr_free_space = &pHalmac_adapter->sdio_free_space.high_queue_number;
 		break;
 	case HALMAC_DMA_MAPPING_NORMAL:
-		pCurr_free_space = &(pHalmac_adapter->sdio_free_space.normal_queue_number);
+		pCurr_free_space = &pHalmac_adapter->sdio_free_space.normal_queue_number;
 		break;
 	case HALMAC_DMA_MAPPING_LOW:
-		pCurr_free_space = &(pHalmac_adapter->sdio_free_space.low_queue_number);
+		pCurr_free_space = &pHalmac_adapter->sdio_free_space.low_queue_number;
 		break;
 	case HALMAC_DMA_MAPPING_EXTRA:
-		pCurr_free_space = &(pHalmac_adapter->sdio_free_space.extra_queue_number);
+		pCurr_free_space = &pHalmac_adapter->sdio_free_space.extra_queue_number;
 		break;
 	default:
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "DmaMapping is out of range\n");
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_ERR, "DmaMapping is out of range\n");
 		return HALMAC_RET_DMA_MAP_INCORRECT;
 	}
 
 	for (i = 0; i < tx_agg_num; i++) {
-		packet_size = GET_TX_DESC_TXPKTSIZE(pCurr_packet) + GET_TX_DESC_OFFSET(pCurr_packet); /* Add early mode later */
+		/*MACID parser*/
+		macid = (u8)GET_TX_DESC_MACID(pCurr_packet);
+		if (macid_group[macid] == 0) {
+			macid_group[macid] = 1;
+			macid_counter++;
+		}
+		/*QSEL parser*/
+		if (qsel != GET_TX_DESC_QSEL(pCurr_packet)) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_ERR, "Multi-Qsel in a bus agg is not allowed, qsel = %d, %d\n", qsel, GET_TX_DESC_QSEL(pCurr_packet));
+			return HALMAC_RET_QSEL_INCORRECT;
+		}
+		/*Page number parser*/
+		packet_size = GET_TX_DESC_TXPKTSIZE(pCurr_packet) + GET_TX_DESC_OFFSET(pCurr_packet) + (GET_TX_DESC_PKT_OFFSET(pCurr_packet) << 3);
 		tx_required_page_num = (packet_size >> pHalmac_adapter->hw_config_info.page_size_2_power) + ((packet_size & (pHalmac_adapter->hw_config_info.page_size - 1)) ? 1 : 0);
 		total_required_page_num += tx_required_page_num;
 
@@ -818,6 +831,11 @@ halmac_tx_allowed_sdio_88xx(
 	counter = 10;
 	do {
 		if ((u32)(*pCurr_free_space + pHalmac_adapter->sdio_free_space.public_queue_number) > total_required_page_num) {
+			status = halmac_check_oqt_88xx(pHalmac_adapter, tx_agg_num, pHalmac_buf, macid_counter);
+
+			if (status != HALMAC_RET_SUCCESS)
+				return status;
+
 			if (*pCurr_free_space >= total_required_page_num) {
 				*pCurr_free_space -= (u16)total_required_page_num;
 			} else {
@@ -825,32 +843,28 @@ halmac_tx_allowed_sdio_88xx(
 				*pCurr_free_space = 0;
 			}
 
-			status = halmac_check_oqt_88xx(pHalmac_adapter, tx_agg_num, pHalmac_buf);
-
-			if (HALMAC_RET_SUCCESS != status)
-				return status;
-
 			break;
-		} else {
-			halmac_update_sdio_free_page_88xx(pHalmac_adapter);
 		}
 
+		halmac_update_sdio_free_page_88xx(pHalmac_adapter);
+
 		counter--;
-		if (0 == counter)
+		if (counter == 0)
 			return HALMAC_RET_FREE_SPACE_NOT_ENOUGH;
 	} while (1);
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_tx_allowed_sdio_88xx <==========\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "halmac_tx_allowed_sdio_88xx <==========\n");
 
 	return HALMAC_RET_SUCCESS;
 }
 
 /**
- * halmac_reg_read_indirect_32_sdio_88xx() - read 4byte register indirect
- * @pHalmac_adapter
- * @halmac_offset
+ * halmac_reg_read_indirect_32_sdio_88xx() - read MAC reg by SDIO reg
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : register offset
  * Author : Soar
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 u32
 halmac_reg_read_indirect_32_sdio_88xx(
@@ -858,37 +872,109 @@ halmac_reg_read_indirect_32_sdio_88xx(
 	IN u32 halmac_offset
 )
 {
-	u8 rtemp = 0xFF;
+	u8 rtemp;
 	u32 counter = 1000;
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api;
-	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
 	union {
 		u32	dword;
 		u8	byte[4];
 	} value32 = { 0x00000000 };
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
-
 
-	PLATFORM_SDIO_CMD53_WRITE_32(pDriver_adapter, (SDIO_LOCAL_DEVICE_ID << 13) | (REG_SDIO_INDIRECT_REG_CFG & HALMAC_SDIO_LOCAL_MSK), halmac_offset | BIT(19) | BIT(17));
+	PLATFORM_SDIO_CMD53_WRITE_32(pDriver_adapter, (HALMAC_SDIO_CMD_ADDR_SDIO_REG << 13) | (REG_SDIO_INDIRECT_REG_CFG & HALMAC_SDIO_LOCAL_MSK), halmac_offset | BIT(19) | BIT(17));
 
 	do {
-		rtemp = PLATFORM_SDIO_CMD52_READ(pDriver_adapter, (SDIO_LOCAL_DEVICE_ID << 13) | ((REG_SDIO_INDIRECT_REG_CFG + 2) & HALMAC_SDIO_LOCAL_MSK));
+		rtemp = PLATFORM_SDIO_CMD52_READ(pDriver_adapter, (HALMAC_SDIO_CMD_ADDR_SDIO_REG << 13) | ((REG_SDIO_INDIRECT_REG_CFG + 2) & HALMAC_SDIO_LOCAL_MSK));
 		counter--;
 	} while (((rtemp & BIT(4)) != 0) && (counter > 0));
 
-	value32.dword = PLATFORM_SDIO_CMD53_READ_32(pDriver_adapter, (SDIO_LOCAL_DEVICE_ID << 13) | (REG_SDIO_INDIRECT_REG_DATA & HALMAC_SDIO_LOCAL_MSK));
+	value32.dword = PLATFORM_SDIO_CMD53_READ_32(pDriver_adapter, (HALMAC_SDIO_CMD_ADDR_SDIO_REG << 13) | (REG_SDIO_INDIRECT_REG_DATA & HALMAC_SDIO_LOCAL_MSK));
 
 	return value32.dword;
 }
 
 
+/**
+ * halmac_sdio_cmd53_4byte_88xx() - cmd53 only for 4byte len register IO
+ * @pHalmac_adapter : the adapter of halmac
+ * @enable : 1->CMD53 only use in 4byte reg, 0 : No limitation
+ * Author : Ivan Lin/KaiYuan Chang
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+HALMAC_RET_STATUS
+halmac_sdio_cmd53_4byte_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN HALMAC_SDIO_CMD53_4BYTE_MODE cmd53_4byte_mode
+)
+{
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_ADAPTER_INVALID;
+
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_API_INVALID;
+
+	if (pHalmac_adapter->halmac_interface != HALMAC_INTERFACE_SDIO)
+		return HALMAC_RET_WRONG_INTF;
+
+	pHalmac_adapter->sdio_cmd53_4byte = cmd53_4byte_mode;
+
+	return HALMAC_RET_SUCCESS;
+}
+
+/**
+ * halmac_sdio_hw_info_88xx() - info sdio hw info
+ * @pHalmac_adapter : the adapter of halmac
+ * @HALMAC_SDIO_CMD53_4BYTE_MODE :
+ * clock_speed : sdio bus clock. Unit -> MHz
+ * spec_ver : sdio spec version
+ * Author : Ivan Lin
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+HALMAC_RET_STATUS
+halmac_sdio_hw_info_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN PHALMAC_SDIO_HW_INFO pSdio_hw_info
+)
+{
+	VOID *pDriver_adapter = NULL;
+	PHALMAC_API pHalmac_api;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]halmac_sdio_hw_info_88xx ==========>\n");
+
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_ADAPTER_INVALID;
+
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_API_INVALID;
+
+	if (pHalmac_adapter->halmac_interface != HALMAC_INTERFACE_SDIO)
+		return HALMAC_RET_WRONG_INTF;
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]SDIO hw clock : %d, spec : %d\n", pSdio_hw_info->clock_speed, pSdio_hw_info->spec_ver);
+
+	if (pSdio_hw_info->clock_speed > HALMAC_SDIO_CLOCK_SPEED_MAX_88XX)
+		return HALMAC_RET_SDIO_CLOCK_ERR;
+
+	if (pSdio_hw_info->clock_speed > HALMAC_SDIO_CLK_THRESHOLD_88XX)
+		pHalmac_adapter->sdio_hw_info.io_hi_speed_flag = 1;
+
+	pHalmac_adapter->sdio_hw_info.clock_speed = pSdio_hw_info->clock_speed;
+	pHalmac_adapter->sdio_hw_info.spec_ver = pSdio_hw_info->spec_ver;
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]halmac_sdio_hw_info_88xx <==========\n");
+
+	return HALMAC_RET_SUCCESS;
+}
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_sdio.h b/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_sdio.h
index 8ed871a..06885a8 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_sdio.h
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_sdio.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_API_88XX_SDIO_H_
 #define _HALMAC_API_88XX_SDIO_H_
 
@@ -94,6 +109,13 @@ halmac_reg_read_indirect_32_sdio_88xx(
 	IN u32 halmac_offset
 );
 
+
+HALMAC_RET_STATUS
+halmac_sdio_cmd53_4byte_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN HALMAC_SDIO_CMD53_4BYTE_MODE cmd53_4byte_mode
+);
+
 u8
 halmac_reg_read_nbyte_sdio_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
@@ -102,4 +124,10 @@ halmac_reg_read_nbyte_sdio_88xx(
 	OUT u8 *halmac_data
 );
 
+HALMAC_RET_STATUS
+halmac_sdio_hw_info_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN PHALMAC_SDIO_HW_INFO pSdio_hw_info
+);
+
 #endif/* _HALMAC_API_88XX_SDIO_H_ */
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_usb.c b/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_usb.c
index a50e61b..5b70718 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_usb.c
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_usb.c
@@ -1,10 +1,26 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #include "halmac_88xx_cfg.h"
 
 /**
- * halmac_init_usb_cfg_88xx() - init USB related register
- * @pHalmac_adapter
- * Author : KaiYuan Chang
+ * halmac_init_usb_cfg_88xx() - init USB
+ * @pHalmac_adapter : the adapter of halmac
+ * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_init_usb_cfg_88xx(
@@ -14,14 +30,12 @@ halmac_init_usb_cfg_88xx(
 	VOID *pDriver_adapter = NULL;
 	u8 value8 = 0;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_INIT_USB_CFG);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_init_usb_cfg_88xx ==========>\n");
@@ -46,10 +60,11 @@ halmac_init_usb_cfg_88xx(
 }
 
 /**
- * halmac_deinit_usb_cfg_88xx() - init USB related register
- * @pHalmac_adapter
- * Author : KaiYuan Chang
+ * halmac_deinit_usb_cfg_88xx() - deinit USB
+ * @pHalmac_adapter : the adapter of halmac
+ * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_deinit_usb_cfg_88xx(
@@ -58,14 +73,12 @@ halmac_deinit_usb_cfg_88xx(
 {
 	VOID *pDriver_adapter = NULL;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_DEINIT_USB_CFG);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_deinit_usb_cfg_88xx ==========>\n");
@@ -76,11 +89,12 @@ halmac_deinit_usb_cfg_88xx(
 }
 
 /**
- * halmac_cfg_rx_aggregation_88xx_usb() -  config rx aggregation
- * @pHalmac_adapter
+ * halmac_cfg_rx_aggregation_88xx_usb() - config rx aggregation
+ * @pHalmac_adapter : the adapter of halmac
  * @halmac_rx_agg_mode
- * Author : KaiYuan Chang
+ * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_rx_aggregation_88xx_usb(
@@ -93,14 +107,12 @@ halmac_cfg_rx_aggregation_88xx_usb(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_RX_AGGREGATION);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -128,7 +140,7 @@ halmac_cfg_rx_aggregation_88xx_usb(
 		break;
 	}
 
-	if (_FALSE == phalmac_rxagg_cfg->threshold.drv_define) {
+	if (phalmac_rxagg_cfg->threshold.drv_define == _FALSE) {
 		if (PLATFORM_REG_READ_8(pDriver_adapter, REG_SYS_CFG2 + 3) == 0x20) {
 			/* usb3.0 */
 			size = 0x5;
@@ -145,7 +157,7 @@ halmac_cfg_rx_aggregation_88xx_usb(
 
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_TXDMA_PQ_MAP, agg_enable);
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_RXDMA_AGG_PG_TH + 3, dma_usb_agg);
-	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_RXDMA_AGG_PG_TH, (u16)(size | (timeout << BIT_SHIFT_DMA_AGG_TO)));
+	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_RXDMA_AGG_PG_TH, (u16)(size | (timeout << BIT_SHIFT_DMA_AGG_TO_V1)));
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_cfg_rx_aggregation_88xx_usb <==========\n");
 
@@ -154,10 +166,11 @@ halmac_cfg_rx_aggregation_88xx_usb(
 
 /**
  * halmac_reg_read_8_usb_88xx() - read 1byte register
- * @pHalmac_adapter
- * @halmac_offset
- * Author : KaiYuan Chang
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : register offset
+ * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 u8
 halmac_reg_read_8_usb_88xx(
@@ -169,10 +182,10 @@ halmac_reg_read_8_usb_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
@@ -189,11 +202,12 @@ halmac_reg_read_8_usb_88xx(
 
 /**
  * halmac_reg_write_8_usb_88xx() - write 1byte register
- * @pHalmac_adapter
- * @halmac_offset
- * @halmac_data
- * Author : KaiYuan Chang
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : register offset
+ * @halmac_data : register value
+ * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_reg_write_8_usb_88xx(
@@ -205,10 +219,10 @@ halmac_reg_write_8_usb_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
@@ -226,10 +240,11 @@ halmac_reg_write_8_usb_88xx(
 
 /**
  * halmac_reg_read_16_usb_88xx() - read 2byte register
- * @pHalmac_adapter
- * @halmac_offset
- * Author : KaiYuan Chang
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : register offset
+ * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 u16
 halmac_reg_read_16_usb_88xx(
@@ -245,10 +260,10 @@ halmac_reg_read_16_usb_88xx(
 		u8	byte[2];
 	} value16 = { 0x0000 };
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
@@ -265,11 +280,12 @@ halmac_reg_read_16_usb_88xx(
 
 /**
  * halmac_reg_write_16_usb_88xx() - write 2byte register
- * @pHalmac_adapter
- * @halmac_offset
- * @halmac_data
- * Author : KaiYuan Chang
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : register offset
+ * @halmac_data : register value
+ * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_reg_write_16_usb_88xx(
@@ -281,10 +297,10 @@ halmac_reg_write_16_usb_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
@@ -301,10 +317,11 @@ halmac_reg_write_16_usb_88xx(
 
 /**
  * halmac_reg_read_32_usb_88xx() - read 4byte register
- * @pHalmac_adapter
- * @halmac_offset
- * Author : KaiYuan Chang
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : register offset
+ * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 u32
 halmac_reg_read_32_usb_88xx(
@@ -320,10 +337,10 @@ halmac_reg_read_32_usb_88xx(
 		u8	byte[4];
 	} value32 = { 0x00000000 };
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
@@ -340,11 +357,12 @@ halmac_reg_read_32_usb_88xx(
 
 /**
  * halmac_reg_write_32_usb_88xx() - write 4byte register
- * @pHalmac_adapter
- * @halmac_offset
- * @halmac_data
- * Author : KaiYuan Chang
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_offset : register offset
+ * @halmac_data : register value
+ * Author : KaiYuan Chang/Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_reg_write_32_usb_88xx(
@@ -356,10 +374,10 @@ halmac_reg_write_32_usb_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
@@ -375,11 +393,12 @@ halmac_reg_write_32_usb_88xx(
 }
 
 /**
- * halmac_set_bulkout_num_88xx() - set bulk out endpoint number
- * @pHalmac_adapter
- * @bulkout_num
+ * halmac_set_bulkout_num_usb_88xx() - inform bulk-out num
+ * @pHalmac_adapter : the adapter of halmac
+ * @bulkout_num : usb bulk-out number
  * Author : KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_set_bulkout_num_88xx(
@@ -390,14 +409,12 @@ halmac_set_bulkout_num_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_SET_BULKOUT_NUM);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
@@ -412,13 +429,14 @@ halmac_set_bulkout_num_88xx(
 }
 
 /**
- * halmac_get_usb_bulkout_id_88xx() - get bulk out id for the TX packet
- * @pHalmac_adapter
- * @halmac_buf
- * @halmac_size
- * @bulkout_id
+ * halmac_get_usb_bulkout_id_usb_88xx() - get bulk out id for the TX packet
+ * @pHalmac_adapter : the adapter of halmac
+ * @halmac_buf : tx packet, include txdesc
+ * @halmac_size : tx packet size
+ * @bulkout_id : usb bulk-out id
  * Author : KaiYuan Chang
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_get_usb_bulkout_id_88xx(
@@ -433,25 +451,23 @@ halmac_get_usb_bulkout_id_88xx(
 	HALMAC_QUEUE_SELECT queue_sel;
 	HALMAC_DMA_MAPPING dma_mapping;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_GET_USB_BULKOUT_ID);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_get_usb_bulkout_id_88xx ==========>\n");
 
-	if (NULL == halmac_buf) {
+	if (halmac_buf == NULL) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_buf is NULL!!\n");
 		return HALMAC_RET_DATA_BUF_NULL;
 	}
 
-	if (0 == halmac_size) {
+	if (halmac_size == 0) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_size is 0!!\n");
 		return HALMAC_RET_DATA_SIZE_INCORRECT;
 	}
@@ -512,12 +528,13 @@ halmac_get_usb_bulkout_id_88xx(
 }
 
 /**
- * halmac_cfg_tx_agg_align_usb_not_support_88xx() -
- * @pHalmac_adapter
- * @enable
- * @align_size
+ * halmac_cfg_tx_agg_align_usb_88xx() -config sdio bus tx agg alignment
+ * @pHalmac_adapter : the adapter of halmac
+ * @enable : function enable(1)/disable(0)
+ * @align_size : sdio bus tx agg alignment size (2^n, n = 3~11)
  * Author : Soar Tu
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_cfg_tx_agg_align_usb_not_support_88xx(
@@ -529,14 +546,12 @@ halmac_cfg_tx_agg_align_usb_not_support_88xx(
 	PHALMAC_API pHalmac_api;
 	VOID *pDriver_adapter = NULL;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
-	if (HALMAC_RET_SUCCESS != halmac_api_validate(pHalmac_adapter))
+	if (halmac_api_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_API_INVALID;
 
-	halmac_api_record_id_88xx(pHalmac_adapter, HALMAC_API_CFG_TX_AGG_ALIGN);
-
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_usb.h b/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_usb.h
index c3e9cf9..36702c4 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_usb.h
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_api_88xx_usb.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_API_88XX_USB_H_
 #define _HALMAC_API_88XX_USB_H_
 
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_func_88xx.c b/rtl8822BU/hal/halmac/halmac_88xx/halmac_func_88xx.c
index 678ec98..22225ba 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_func_88xx.c
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_func_88xx.c
@@ -1,37 +1,52 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #include "halmac_88xx_cfg.h"
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_dump_efuse_fw_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter
 );
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_dump_efuse_drv_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter
 );
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_update_eeprom_mask_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	INOUT PHALMAC_PG_EFUSE_INFO pPg_efuse_info,
 	OUT u8 *pEeprom_mask_updated
 );
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_check_efuse_enough_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN PHALMAC_PG_EFUSE_INFO pPg_efuse_info,
 	IN u8 *pEeprom_mask_updated
 );
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_program_efuse_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN PHALMAC_PG_EFUSE_INFO pPg_efuse_info,
 	IN u8 *pEeprom_mask_updated
 );
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_pwr_sub_seq_parer_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 cut,
@@ -40,28 +55,28 @@ halmac_pwr_sub_seq_parer_88xx(
 	IN PHALMAC_WLAN_PWR_CFG pPwr_sub_seq_cfg
 );
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_c2h_debug_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
 	IN u32 c2h_size
 );
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_scan_status_rpt_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
 	IN u32 c2h_size
 );
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_psd_data_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
 	IN u32 c2h_size
 );
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_efuse_data_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
@@ -69,21 +84,14 @@ halmac_parse_efuse_data_88xx(
 );
 
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_h2c_ack_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
 	IN u32 c2h_size
 );
 
-HALMAC_RET_STATUS
-halmac_parse_h2c_ack_physical_efuse_88xx(
-	IN PHALMAC_ADAPTER pHalmac_adapter,
-	IN u8 *pC2h_buf,
-	IN u32 c2h_size
-);
-
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_enqueue_para_buff_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN PHALMAC_PHY_PARAMETER_INFO para_info,
@@ -91,89 +99,134 @@ halmac_enqueue_para_buff_88xx(
 	OUT u8 *pEnd_cmd
 );
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
+halmac_parse_h2c_ack_phy_efuse_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 *pC2h_buf,
+	IN u32 c2h_size
+);
+
+static HALMAC_RET_STATUS
 halmac_parse_h2c_ack_cfg_para_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
 	IN u32 c2h_size
 );
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_gen_cfg_para_h2c_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pH2c_buff
 );
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_h2c_ack_update_packet_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
 	IN u32 c2h_size
 );
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_h2c_ack_update_datapack_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
 	IN u32 c2h_size
 );
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_h2c_ack_run_datapack_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
 	IN u32 c2h_size
 );
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_h2c_ack_channel_switch_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
 	IN u32 c2h_size
 );
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_h2c_ack_iqk_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
 	IN u32 c2h_size
 );
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_h2c_ack_power_tracking_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
 	IN u32 c2h_size
 );
 
+VOID
+halmac_init_offload_feature_state_machine_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter
+)
+{
+	PHALMAC_STATE pState = &pHalmac_adapter->halmac_state;
+
+	pState->efuse_state_set.efuse_cmd_construct_state = HALMAC_EFUSE_CMD_CONSTRUCT_IDLE;
+	pState->efuse_state_set.process_status = HALMAC_CMD_PROCESS_IDLE;
+	pState->efuse_state_set.seq_num = pHalmac_adapter->h2c_packet_seq;
+
+	pState->cfg_para_state_set.cfg_para_cmd_construct_state = HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE;
+	pState->cfg_para_state_set.process_status = HALMAC_CMD_PROCESS_IDLE;
+	pState->cfg_para_state_set.seq_num = pHalmac_adapter->h2c_packet_seq;
+
+	pState->scan_state_set.scan_cmd_construct_state = HALMAC_SCAN_CMD_CONSTRUCT_IDLE;
+	pState->scan_state_set.process_status = HALMAC_CMD_PROCESS_IDLE;
+	pState->scan_state_set.seq_num = pHalmac_adapter->h2c_packet_seq;
+
+	pState->update_packet_set.process_status = HALMAC_CMD_PROCESS_IDLE;
+	pState->update_packet_set.seq_num = pHalmac_adapter->h2c_packet_seq;
+
+	pState->iqk_set.process_status = HALMAC_CMD_PROCESS_IDLE;
+	pState->iqk_set.seq_num = pHalmac_adapter->h2c_packet_seq;
+
+	pState->power_tracking_set.process_status = HALMAC_CMD_PROCESS_IDLE;
+	pState->power_tracking_set.seq_num = pHalmac_adapter->h2c_packet_seq;
+
+	pState->psd_set.process_status = HALMAC_CMD_PROCESS_IDLE;
+	pState->psd_set.seq_num = pHalmac_adapter->h2c_packet_seq;
+	pState->psd_set.data_size = 0;
+	pState->psd_set.segment_size = 0;
+	pState->psd_set.pData = NULL;
+}
+
 HALMAC_RET_STATUS
 halmac_dump_efuse_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN HALMAC_EFUSE_READ_CFG cfg
 )
 {
+	u32 chk_h2c_init;
 	VOID *pDriver_adapter = NULL;
+	PHALMAC_API pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
-	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &(pHalmac_adapter->halmac_state.efuse_state_set.process_status);
+	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &pHalmac_adapter->halmac_state.efuse_state_set.process_status;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	*pProcess_status = HALMAC_CMD_PROCESS_SENDING;
 
-	if (HALMAC_RET_SUCCESS != halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_H2C_SENT))
+	if (halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_H2C_SENT) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ERROR_STATE;
 
-	if (HALMAC_EFUSE_R_AUTO == cfg) {
-		if (HALMAC_DLFW_NONE == pHalmac_adapter->halmac_state.dlfw_state)
+	if (cfg == HALMAC_EFUSE_R_AUTO) {
+		chk_h2c_init = HALMAC_REG_READ_32(pHalmac_adapter, REG_H2C_PKT_READADDR);
+		if (HALMAC_DLFW_NONE == pHalmac_adapter->halmac_state.dlfw_state || 0 == chk_h2c_init)
 			status = halmac_dump_efuse_drv_88xx(pHalmac_adapter);
 		else
 			status = halmac_dump_efuse_fw_88xx(pHalmac_adapter);
-	} else if (HALMAC_EFUSE_R_FW == cfg) {
+	} else if (cfg == HALMAC_EFUSE_R_FW) {
 		status = halmac_dump_efuse_fw_88xx(pHalmac_adapter);
 	} else {
 		status = halmac_dump_efuse_drv_88xx(pHalmac_adapter);
 	}
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_read_efuse error = %x\n", status);
 		return status;
 	}
@@ -193,16 +246,16 @@ halmac_func_read_efuse_88xx(
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
-	if (NULL == pEfuse_map) {
+	if (pEfuse_map == NULL) {
 		PLATFORM_MSG_PRINT(pHalmac_adapter->pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "Malloc for dump efuse map error\n");
 		return HALMAC_RET_NULL_POINTER;
 	}
 
-	if (_TRUE == pHalmac_adapter->hal_efuse_map_valid)
+	if (pHalmac_adapter->hal_efuse_map_valid == _TRUE)
 		PLATFORM_RTL_MEMCPY(pDriver_adapter, pEfuse_map, pHalmac_adapter->pHalEfuse_map + offset, size);
 	else
-	if (HALMAC_RET_SUCCESS != halmac_read_hw_efuse_88xx(pHalmac_adapter, offset, size, pEfuse_map))
-		return HALMAC_RET_EFUSE_R_FAIL;
+		if (halmac_read_hw_efuse_88xx(pHalmac_adapter, offset, size, pEfuse_map) != HALMAC_RET_SUCCESS)
+			return HALMAC_RET_EFUSE_R_FAIL;
 
 	return HALMAC_RET_SUCCESS;
 }
@@ -242,11 +295,11 @@ halmac_read_hw_efuse_88xx(
 			PLATFORM_RTL_DELAY_US(pDriver_adapter, 1);
 			tmp32 = HALMAC_REG_READ_32(pHalmac_adapter, REG_EFUSE_CTRL);
 			counter--;
-			if (0 == counter) {
+			if (counter == 0) {
 				PLATFORM_MSG_PRINT(pHalmac_adapter->pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "HALMAC_RET_EFUSE_R_FAIL\n");
 				return HALMAC_RET_EFUSE_R_FAIL;
 			}
-		} while (0 == (tmp32 & BIT_EF_FLAG));
+		} while ((tmp32 & BIT_EF_FLAG) == 0);
 
 		*(pEfuse_map + address - offset) = (u8)(tmp32 & BIT_MASK_EF_DATA);
 	}
@@ -254,7 +307,7 @@ halmac_read_hw_efuse_88xx(
 	return HALMAC_RET_SUCCESS;
 }
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_dump_efuse_drv_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter
 )
@@ -267,34 +320,38 @@ halmac_dump_efuse_drv_88xx(
 
 	efuse_size = pHalmac_adapter->hw_config_info.efuse_size;
 
-	if (NULL == pHalmac_adapter->pHalEfuse_map) {
+	if (pHalmac_adapter->pHalEfuse_map == NULL) {
 		pHalmac_adapter->pHalEfuse_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, efuse_size);
-		if (NULL == pHalmac_adapter->pHalEfuse_map) {
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac allocate efuse map Fail!!\n");
+		if (pHalmac_adapter->pHalEfuse_map == NULL) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac allocate efuse map Fail!!\n");
 			return HALMAC_RET_MALLOC_FAIL;
 		}
 	}
 
-	pEfuse_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, efuse_size);
-	if (NULL == pEfuse_map) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac allocate local efuse map Fail!!\n");
-		return HALMAC_RET_MALLOC_FAIL;
-	}
+	if (pHalmac_adapter->hal_efuse_map_valid == _FALSE) {
+		pEfuse_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, efuse_size);
+		if (pEfuse_map == NULL) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac allocate local efuse map Fail!!\n");
+			return HALMAC_RET_MALLOC_FAIL;
+		}
 
-	if (HALMAC_RET_SUCCESS != halmac_read_hw_efuse_88xx(pHalmac_adapter, 0, efuse_size, pEfuse_map))
-		return HALMAC_RET_EFUSE_R_FAIL;
+		if (halmac_read_hw_efuse_88xx(pHalmac_adapter, 0, efuse_size, pEfuse_map) != HALMAC_RET_SUCCESS) {
+			PLATFORM_RTL_FREE(pDriver_adapter, pEfuse_map, efuse_size);
+			return HALMAC_RET_EFUSE_R_FAIL;
+		}
 
-	PLATFORM_MUTEX_LOCK(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
-	PLATFORM_RTL_MEMCPY(pDriver_adapter, pHalmac_adapter->pHalEfuse_map, pEfuse_map, efuse_size);
-	pHalmac_adapter->hal_efuse_map_valid = _TRUE;
-	PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
+		PLATFORM_MUTEX_LOCK(pDriver_adapter, &pHalmac_adapter->EfuseMutex);
+		PLATFORM_RTL_MEMCPY(pDriver_adapter, pHalmac_adapter->pHalEfuse_map, pEfuse_map, efuse_size);
+		pHalmac_adapter->hal_efuse_map_valid = _TRUE;
+		PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &pHalmac_adapter->EfuseMutex);
 
-	PLATFORM_RTL_FREE(pDriver_adapter, pEfuse_map, efuse_size);
+		PLATFORM_RTL_FREE(pDriver_adapter, pEfuse_map, efuse_size);
+	}
 
 	return HALMAC_RET_SUCCESS;
 }
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_dump_efuse_fw_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter
 )
@@ -314,18 +371,19 @@ halmac_dump_efuse_fw_88xx(
 	halmac_set_fw_offload_h2c_header_88xx(pHalmac_adapter, pH2c_buff, &h2c_header_info, &h2c_seq_mum);
 	pHalmac_adapter->halmac_state.efuse_state_set.seq_num = h2c_seq_mum;
 
-	if (NULL == pHalmac_adapter->pHalEfuse_map) {
+	if (pHalmac_adapter->pHalEfuse_map == NULL) {
 		pHalmac_adapter->pHalEfuse_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, pHalmac_adapter->hw_config_info.efuse_size);
-		if (NULL == pHalmac_adapter->pHalEfuse_map) {
+		if (pHalmac_adapter->pHalEfuse_map == NULL) {
 			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac allocate efuse map Fail!!\n");
 			return HALMAC_RET_MALLOC_FAIL;
 		}
 	}
 
-	if (_FALSE == pHalmac_adapter->hal_efuse_map_valid) {
+	if (pHalmac_adapter->hal_efuse_map_valid == _FALSE) {
 		status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
-		if (HALMAC_RET_SUCCESS != status) {
+		if (status != HALMAC_RET_SUCCESS) {
 			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_read_efuse_fw Fail = %x!!\n", status);
+			halmac_reset_feature_88xx(pHalmac_adapter, HALMAC_FEATURE_DUMP_PHYSICAL_EFUSE);
 			return status;
 		}
 	}
@@ -344,13 +402,14 @@ halmac_func_write_efuse_88xx(
 	u32 value32, tmp32, counter;
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
+	u8 value_read = 0;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	PLATFORM_MUTEX_LOCK(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
+	PLATFORM_MUTEX_LOCK(pDriver_adapter, &pHalmac_adapter->EfuseMutex);
 	pHalmac_adapter->hal_efuse_map_valid = _FALSE;
-	PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
+	PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &pHalmac_adapter->EfuseMutex);
 
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PMC_DBG_CTRL2 + 3, wite_protect_code);
 
@@ -367,17 +426,26 @@ halmac_func_write_efuse_88xx(
 		PLATFORM_RTL_DELAY_US(pDriver_adapter, 1);
 		tmp32 = HALMAC_REG_READ_32(pHalmac_adapter, REG_EFUSE_CTRL);
 		counter--;
-		if (0 == counter) {
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_write_efuse Fail !!\n");
+		if (counter == 0) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_write_efuse Fail !!\n");
 			return HALMAC_RET_EFUSE_W_FAIL;
 		}
-	} while (BIT_EF_FLAG == (tmp32 & BIT_EF_FLAG));
+	} while ((tmp32 & BIT_EF_FLAG) == BIT_EF_FLAG);
 
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PMC_DBG_CTRL2 + 3, 0x00);
 
 	/* Disable 2.5V LDO */
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_LDO_EFUSE_CTRL + 3, (u8)(HALMAC_REG_READ_8(pHalmac_adapter, REG_LDO_EFUSE_CTRL + 3) & ~(BIT(7))));
 
+	if (pHalmac_adapter->efuse_auto_check_en == 1) {
+		if (halmac_read_hw_efuse_88xx(pHalmac_adapter, offset, 1, &value_read) != HALMAC_RET_SUCCESS)
+			return HALMAC_RET_EFUSE_R_FAIL;
+		if (value_read != value) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_write_efuse Fail: result 0x%X != write value 0x%X !!\n", value_read, value);
+			return HALMAC_RET_EFUSE_W_FAIL;
+		}
+	}
+
 	return HALMAC_RET_SUCCESS;
 }
 
@@ -395,7 +463,7 @@ halmac_func_switch_efuse_bank_88xx(
 
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_BUSY))
+	if (halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_BUSY) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ERROR_STATE;
 
 	reg_value = HALMAC_REG_READ_8(pHalmac_adapter, REG_LDO_EFUSE_CTRL + 1);
@@ -468,28 +536,26 @@ halmac_eeprom_parser_88xx(
 						PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "Error: EEPROM header: 0x%X, 0x%X,\n", efuse_read_header, efuse_read_header2);
 					else
 						PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "Error: EEPROM header: 0x%X,\n", efuse_read_header);
-					eeprom_index++;
-					efuse_index = efuse_index + 2;
 
 					return HALMAC_RET_EEPROM_PARSING_FAIL;
-				} else {
-					value8 = *(pPhysical_efuse_map + efuse_index);
-					*(pLogical_efuse_map + eeprom_index) = value8;
+				}
 
-					eeprom_index++;
-					efuse_index++;
+				value8 = *(pPhysical_efuse_map + efuse_index);
+				*(pLogical_efuse_map + eeprom_index) = value8;
 
-					if (efuse_index > pHalmac_adapter->hw_config_info.efuse_size - HALMAC_PROTECTED_EFUSE_SIZE_88XX - 1)
-						return HALMAC_RET_EEPROM_PARSING_FAIL;
+				eeprom_index++;
+				efuse_index++;
 
-					value8 = *(pPhysical_efuse_map + efuse_index);
-					*(pLogical_efuse_map + eeprom_index) = value8;
+				if (efuse_index > pHalmac_adapter->hw_config_info.efuse_size - HALMAC_PROTECTED_EFUSE_SIZE_88XX - 1)
+					return HALMAC_RET_EEPROM_PARSING_FAIL;
 
-					efuse_index++;
+				value8 = *(pPhysical_efuse_map + efuse_index);
+				*(pLogical_efuse_map + eeprom_index) = value8;
 
-					if (efuse_index > pHalmac_adapter->hw_config_info.efuse_size - HALMAC_PROTECTED_EFUSE_SIZE_88XX)
-						return HALMAC_RET_EEPROM_PARSING_FAIL;
-				}
+				efuse_index++;
+
+				if (efuse_index > pHalmac_adapter->hw_config_info.efuse_size - HALMAC_PROTECTED_EFUSE_SIZE_88XX)
+					return HALMAC_RET_EEPROM_PARSING_FAIL;
 			}
 		}
 	} while (1);
@@ -513,36 +579,38 @@ halmac_read_logical_efuse_map_88xx(
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	efuse_size = pHalmac_adapter->hw_config_info.efuse_size;
 
-	if (_FALSE == pHalmac_adapter->hal_efuse_map_valid) {
+	if (pHalmac_adapter->hal_efuse_map_valid == _FALSE) {
 		pEfuse_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, efuse_size);
-		if (NULL == pEfuse_map) {
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac allocate local efuse map Fail!!\n");
+		if (pEfuse_map == NULL) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac allocate local efuse map Fail!!\n");
 			return HALMAC_RET_MALLOC_FAIL;
 		}
 
-		if (NULL == pHalmac_adapter->pHalEfuse_map) {
+		status = halmac_func_read_efuse_88xx(pHalmac_adapter, 0, efuse_size, pEfuse_map);
+		if (status != HALMAC_RET_SUCCESS) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac_read_efuse error = %x\n", status);
+			PLATFORM_RTL_FREE(pDriver_adapter, pEfuse_map, efuse_size);
+			return status;
+		}
+
+		if (pHalmac_adapter->pHalEfuse_map == NULL) {
 			pHalmac_adapter->pHalEfuse_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, efuse_size);
-			if (NULL == pHalmac_adapter->pHalEfuse_map) {
-				PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac allocate efuse map Fail!!\n");
+			if (pHalmac_adapter->pHalEfuse_map == NULL) {
+				PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac allocate efuse map Fail!!\n");
+				PLATFORM_RTL_FREE(pDriver_adapter, pEfuse_map, efuse_size);
 				return HALMAC_RET_MALLOC_FAIL;
 			}
 		}
 
-		status = halmac_func_read_efuse_88xx(pHalmac_adapter, 0, efuse_size, pEfuse_map);
-		if (HALMAC_RET_SUCCESS != status) {
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_read_efuse error = %x\n", status);
-			return status;
-		}
-
-		PLATFORM_MUTEX_LOCK(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
+		PLATFORM_MUTEX_LOCK(pDriver_adapter, &pHalmac_adapter->EfuseMutex);
 		PLATFORM_RTL_MEMCPY(pDriver_adapter, pHalmac_adapter->pHalEfuse_map, pEfuse_map, efuse_size);
 		pHalmac_adapter->hal_efuse_map_valid = _TRUE;
-		PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
+		PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &pHalmac_adapter->EfuseMutex);
 
 		PLATFORM_RTL_FREE(pDriver_adapter, pEfuse_map, efuse_size);
 	}
 
-	if (HALMAC_RET_SUCCESS != halmac_eeprom_parser_88xx(pHalmac_adapter, pHalmac_adapter->pHalEfuse_map, pMap))
+	if (halmac_eeprom_parser_88xx(pHalmac_adapter, pHalmac_adapter->pHalEfuse_map, pMap) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_EEPROM_PARSING_FAIL;
 
 	return status;
@@ -560,22 +628,23 @@ halmac_func_write_logical_efuse_88xx(
 	u8 pg_efuse_header, pg_efuse_header2;
 	u8 *pEeprom_map = NULL;
 	u32 eeprom_size = pHalmac_adapter->hw_config_info.eeprom_size;
-	u32 efuse_end;
+	u32 efuse_end, pg_efuse_num;
 	VOID *pDriver_adapter = NULL;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	pEeprom_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, eeprom_size);
-	if (NULL == pEeprom_map) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac allocate local eeprom map Fail!!\n");
+	if (pEeprom_map == NULL) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac allocate local eeprom map Fail!!\n");
 		return HALMAC_RET_MALLOC_FAIL;
 	}
 	PLATFORM_RTL_MEMSET(pDriver_adapter, pEeprom_map, 0xFF, eeprom_size);
 
 	status = halmac_read_logical_efuse_map_88xx(pHalmac_adapter, pEeprom_map);
-	if (HALMAC_RET_SUCCESS != status) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_read_logical_efuse_map_88xx error = %x\n", status);
+	if (status != HALMAC_RET_SUCCESS) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac_read_logical_efuse_map_88xx error = %x\n", status);
+		PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
 		return status;
 	}
 
@@ -600,18 +669,29 @@ halmac_func_write_logical_efuse_88xx(
 		}
 
 		if (offset > 0x7f) {
-			status = halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end, pg_efuse_header);
-			status = halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end + 1, pg_efuse_header2);
-			status = halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end + 2, pg_efuse_byte1);
+			pg_efuse_num = 4;
+			if (pHalmac_adapter->hw_config_info.efuse_size <= (pg_efuse_num + HALMAC_PROTECTED_EFUSE_SIZE_88XX + pHalmac_adapter->efuse_end)) {
+				PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
+				return HALMAC_RET_EFUSE_NOT_ENOUGH;
+			}
+			halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end, pg_efuse_header);
+			halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end + 1, pg_efuse_header2);
+			halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end + 2, pg_efuse_byte1);
 			status = halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end + 3, pg_efuse_byte2);
 		} else {
-			status = halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end, pg_efuse_header);
-			status = halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end + 1, pg_efuse_byte1);
+			pg_efuse_num = 3;
+			if (pHalmac_adapter->hw_config_info.efuse_size <= (pg_efuse_num + HALMAC_PROTECTED_EFUSE_SIZE_88XX + pHalmac_adapter->efuse_end)) {
+				PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
+				return HALMAC_RET_EFUSE_NOT_ENOUGH;
+			}
+			halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end, pg_efuse_header);
+			halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end + 1, pg_efuse_byte1);
 			status = halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end + 2, pg_efuse_byte2);
 		}
 
-		if (HALMAC_RET_SUCCESS != status) {
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_write_logical_efuse error = %x\n", status);
+		if (status != HALMAC_RET_SUCCESS) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac_write_logical_efuse error = %x\n", status);
+			PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
 			return status;
 		}
 	}
@@ -634,30 +714,33 @@ halmac_func_pg_efuse_by_map_88xx(
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
 	pEeprom_mask_updated = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, eeprom_mask_size);
-	if (NULL == pEeprom_mask_updated) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac allocate local eeprom map Fail!!\n");
+	if (pEeprom_mask_updated == NULL) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac allocate local eeprom map Fail!!\n");
 		return HALMAC_RET_MALLOC_FAIL;
 	}
 	PLATFORM_RTL_MEMSET(pDriver_adapter, pEeprom_mask_updated, 0x00, eeprom_mask_size);
 
 	status = halmac_update_eeprom_mask_88xx(pHalmac_adapter, pPg_efuse_info, pEeprom_mask_updated);
 
-	if (HALMAC_RET_SUCCESS != status) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_update_eeprom_mask_88xx error = %x\n", status);
+	if (status != HALMAC_RET_SUCCESS) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac_update_eeprom_mask_88xx error = %x\n", status);
+		PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_mask_updated, eeprom_mask_size);
 		return status;
 	}
 
 	status = halmac_check_efuse_enough_88xx(pHalmac_adapter, pPg_efuse_info, pEeprom_mask_updated);
 
-	if (HALMAC_RET_SUCCESS != status) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_check_efuse_enough_88xx error = %x\n", status);
+	if (status != HALMAC_RET_SUCCESS) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac_check_efuse_enough_88xx error = %x\n", status);
+		PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_mask_updated, eeprom_mask_size);
 		return status;
 	}
 
 	status = halmac_program_efuse_88xx(pHalmac_adapter, pPg_efuse_info, pEeprom_mask_updated);
 
-	if (HALMAC_RET_SUCCESS != status) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_program_efuse_88xx error = %x\n", status);
+	if (status != HALMAC_RET_SUCCESS) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac_program_efuse_88xx error = %x\n", status);
+		PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_mask_updated, eeprom_mask_size);
 		return status;
 	}
 
@@ -666,7 +749,7 @@ halmac_func_pg_efuse_by_map_88xx(
 	return HALMAC_RET_SUCCESS;
 }
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_update_eeprom_mask_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	INOUT PHALMAC_PG_EFUSE_INFO	pPg_efuse_info,
@@ -685,8 +768,8 @@ halmac_update_eeprom_mask_88xx(
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	pEeprom_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, eeprom_size);
-	if (NULL == pEeprom_map) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac allocate local eeprom map Fail!!\n");
+	if (pEeprom_map == NULL) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac allocate local eeprom map Fail!!\n");
 		return HALMAC_RET_MALLOC_FAIL;
 	}
 	PLATFORM_RTL_MEMSET(pDriver_adapter, pEeprom_map, 0xFF, eeprom_size);
@@ -695,8 +778,10 @@ halmac_update_eeprom_mask_88xx(
 
 	status = halmac_read_logical_efuse_map_88xx(pHalmac_adapter, pEeprom_map);
 
-	if (HALMAC_RET_SUCCESS != status)
+	if (status != HALMAC_RET_SUCCESS) {
+		PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
 		return status;
+	}
 
 	pEeprom_map_pg = pPg_efuse_info->pEfuse_map;
 	pEeprom_mask = pPg_efuse_info->pEfuse_mask;
@@ -749,7 +834,7 @@ halmac_update_eeprom_mask_88xx(
 	return status;
 }
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_check_efuse_enough_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN PHALMAC_PG_EFUSE_INFO pPg_efuse_info,
@@ -811,13 +896,13 @@ halmac_check_efuse_enough_88xx(
 		}
 	}
 
-	if ((pHalmac_adapter->hw_config_info.efuse_size - pg_efuse_num - HALMAC_PROTECTED_EFUSE_SIZE_88XX - pHalmac_adapter->efuse_end) <= 0)
+	if (pHalmac_adapter->hw_config_info.efuse_size <= (pg_efuse_num + HALMAC_PROTECTED_EFUSE_SIZE_88XX + pHalmac_adapter->efuse_end))
 		return HALMAC_RET_EFUSE_NOT_ENOUGH;
 
 	return HALMAC_RET_SUCCESS;
 }
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_program_efuse_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN PHALMAC_PG_EFUSE_INFO pPg_efuse_info,
@@ -856,12 +941,12 @@ halmac_program_efuse_88xx(
 			}
 
 			if (tmp_eeprom_offset > 0x7f) {
-				status = halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end, pg_efuse_header);
+				halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end, pg_efuse_header);
 				status = halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end + 1, pg_efuse_header2);
 				efuse_end = efuse_end + 2;
 				for (j = 0; j < 4; j++) {
 					if (((pre_word_enb >> j) & 0x1) > 0) {
-						status = halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end, *(pPg_efuse_info->pEfuse_map + tmp_eeprom_offset + (j << 1)));
+						halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end, *(pPg_efuse_info->pEfuse_map + tmp_eeprom_offset + (j << 1)));
 						status = halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end + 1, *(pPg_efuse_info->pEfuse_map + tmp_eeprom_offset + (j << 1) + 1));
 						efuse_end = efuse_end + 2;
 					}
@@ -871,7 +956,7 @@ halmac_program_efuse_88xx(
 				efuse_end = efuse_end + 1;
 				for (j = 0; j < 4; j++) {
 					if (((pre_word_enb >> j) & 0x1) > 0) {
-						status = halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end, *(pPg_efuse_info->pEfuse_map + tmp_eeprom_offset + (j << 1)));
+						halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end, *(pPg_efuse_info->pEfuse_map + tmp_eeprom_offset + (j << 1)));
 						status = halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end + 1, *(pPg_efuse_info->pEfuse_map + tmp_eeprom_offset + (j << 1) + 1));
 						efuse_end = efuse_end + 2;
 					}
@@ -884,6 +969,39 @@ halmac_program_efuse_88xx(
 }
 
 HALMAC_RET_STATUS
+halmac_update_fw_info_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 *pHamacl_fw,
+	IN u32 halmac_fw_size
+)
+{
+	PHALMAC_FW_VERSION pFw_info = &pHalmac_adapter->fw_version;
+	VOID *pDriver_adapter = NULL;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+
+	pFw_info->version = rtk_le16_to_cpu(*((u16 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_VERSION_88XX)));
+	pFw_info->sub_version = *(pHamacl_fw + HALMAC_FWHDR_OFFSET_SUBVERSION_88XX);
+	pFw_info->sub_index = *(pHamacl_fw + HALMAC_FWHDR_OFFSET_SUBINDEX_88XX);
+	pFw_info->h2c_version = rtk_le16_to_cpu(*((u16 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_H2C_FORMAT_VER_88XX)));
+	pFw_info->build_time.month = *(pHamacl_fw + HALMAC_FWHDR_OFFSET_MONTH_88XX);
+	pFw_info->build_time.date = *(pHamacl_fw + HALMAC_FWHDR_OFFSET_DATE_88XX);
+	pFw_info->build_time.hour = *(pHamacl_fw + HALMAC_FWHDR_OFFSET_HOUR_88XX);
+	pFw_info->build_time.min = *(pHamacl_fw + HALMAC_FWHDR_OFFSET_MIN_88XX);
+	pFw_info->build_time.year = rtk_le16_to_cpu(*((u16 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_YEAR_88XX)));
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_FW, HALMAC_DBG_TRACE, "[TRACE]FW version : %X\n", pFw_info->version);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_FW, HALMAC_DBG_TRACE, "[TRACE]FW sub version : %X\n", pFw_info->sub_version);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_FW, HALMAC_DBG_TRACE, "[TRACE]FW sub index : %X\n", pFw_info->sub_index);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_FW, HALMAC_DBG_TRACE, "[TRACE]FW build time : %d/%d/%d %d:%d\n",
+																			pFw_info->build_time.year, pFw_info->build_time.month,
+																			pFw_info->build_time.date, pFw_info->build_time.hour,
+																			pFw_info->build_time.min);
+
+	return HALMAC_RET_SUCCESS;
+}
+
+HALMAC_RET_STATUS
 halmac_dlfw_to_mem_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pRam_code,
@@ -908,19 +1026,19 @@ halmac_dlfw_to_mem_88xx(
 
 	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_DDMA_CH0CTRL, HALMAC_REG_READ_32(pHalmac_adapter, REG_DDMA_CH0CTRL) | BIT_DDMACH0_RESET_CHKSUM_STS);
 
-	while (0 != pkt_size_tmp) {
+	while (pkt_size_tmp != 0) {
 		if (pkt_size_tmp >= pHalmac_adapter->max_download_size)
 			send_pkt_size = pHalmac_adapter->max_download_size;
 		else
 			send_pkt_size = pkt_size_tmp;
 
-		if (HALMAC_RET_SUCCESS != halmac_send_fwpkt_88xx(pHalmac_adapter, pCode_ptr + mem_offset, send_pkt_size)) {
+		if (halmac_send_fwpkt_88xx(pHalmac_adapter, pCode_ptr + mem_offset, send_pkt_size) != HALMAC_RET_SUCCESS) {
 			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_send_fwpkt_88xx fail!!");
 			return HALMAC_RET_DLFW_FAIL;
 		}
 
-		if (HALMAC_RET_SUCCESS != halmac_iddma_dlfw_88xx(pHalmac_adapter, HALMAC_OCPBASE_TXBUF_88XX + pHalmac_adapter->hw_config_info.txdesc_size,
-			    dest + mem_offset, send_pkt_size, first_part)) {
+		if (halmac_iddma_dlfw_88xx(pHalmac_adapter, HALMAC_OCPBASE_TXBUF_88XX + pHalmac_adapter->hw_config_info.txdesc_size,
+			    dest + mem_offset, send_pkt_size, first_part) != HALMAC_RET_SUCCESS) {
 			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_iddma_dlfw_88xx fail!!");
 			return HALMAC_RET_DLFW_FAIL;
 		}
@@ -930,7 +1048,7 @@ halmac_dlfw_to_mem_88xx(
 		pkt_size_tmp -= send_pkt_size;
 	}
 
-	if (HALMAC_RET_SUCCESS != halmac_check_fw_chksum_88xx(pHalmac_adapter, dest)) {
+	if (halmac_check_fw_chksum_88xx(pHalmac_adapter, dest) != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pHalmac_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_check_fw_chksum_88xx fail!!");
 		return HALMAC_RET_DLFW_FAIL;
 	}
@@ -947,7 +1065,7 @@ halmac_send_fwpkt_88xx(
 {
 	VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
-	if (HALMAC_RET_SUCCESS != halmac_download_rsvd_page_88xx(pHalmac_adapter, pRam_code, code_size)) {
+	if (halmac_download_rsvd_page_88xx(pHalmac_adapter, pRam_code, code_size) != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_FW, HALMAC_DBG_ERR, "PLATFORM_SEND_RSVD_PAGE 0 error!!\n");
 		return HALMAC_RET_DL_RSVD_PAGE_FAIL;
 	}
@@ -975,14 +1093,14 @@ halmac_iddma_dlfw_88xx(
 	counter = HALMC_DDMA_POLLING_COUNT;
 	while (HALMAC_REG_READ_32(pHalmac_adapter, REG_DDMA_CH0CTRL) & BIT_DDMACH0_OWN) {
 		counter--;
-		if (0 == counter) {
+		if (counter == 0) {
 			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_FW, HALMAC_DBG_ERR, "halmac_iddma_dlfw_88xx error-1!!\n");
 			return HALMAC_RET_DDMA_FAIL;
 		}
 	}
 
 	ch0_control |= (length & BIT_MASK_DDMACH0_DLEN);
-	if (0 == first)
+	if (first == 0)
 		ch0_control |= BIT_DDMACH0_CHKSUM_CONT;
 
 	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_DDMA_CH0SA, source);
@@ -992,7 +1110,7 @@ halmac_iddma_dlfw_88xx(
 	counter = HALMC_DDMA_POLLING_COUNT;
 	while (HALMAC_REG_READ_32(pHalmac_adapter, REG_DDMA_CH0CTRL) & BIT_DDMACH0_OWN) {
 		counter--;
-		if (0 == counter) {
+		if (counter == 0) {
 			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_FW, HALMAC_DBG_ERR, "halmac_iddma_dlfw_88xx error-2!!\n");
 			return HALMAC_RET_DDMA_FAIL;
 		}
@@ -1028,17 +1146,17 @@ halmac_check_fw_chksum_88xx(
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_FW, HALMAC_DBG_ERR, "halmac_check_fw_chksum_88xx error!!\n");
 
 		return HALMAC_RET_FW_CHECKSUM_FAIL;
-	} else {
-		if (memory_address < HALMAC_OCPBASE_DMEM_88XX) {
-			mcu_fw_ctrl |= BIT_IMEM_DW_OK;
-			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MCUFW_CTRL, (u8)(mcu_fw_ctrl | BIT_IMEM_CHKSUM_OK));
-		} else {
-			mcu_fw_ctrl |= BIT_DMEM_DW_OK;
-			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MCUFW_CTRL, (u8)(mcu_fw_ctrl | BIT_DMEM_CHKSUM_OK));
-		}
+	}
 
-		return HALMAC_RET_SUCCESS;
+	if (memory_address < HALMAC_OCPBASE_DMEM_88XX) {
+		mcu_fw_ctrl |= BIT_IMEM_DW_OK;
+		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MCUFW_CTRL, (u8)(mcu_fw_ctrl | BIT_IMEM_CHKSUM_OK));
+	} else {
+		mcu_fw_ctrl |= BIT_DMEM_DW_OK;
+		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MCUFW_CTRL, (u8)(mcu_fw_ctrl | BIT_DMEM_CHKSUM_OK));
 	}
+
+	return HALMAC_RET_SUCCESS;
 }
 
 HALMAC_RET_STATUS
@@ -1070,28 +1188,55 @@ halmac_dlfw_end_flow_88xx(
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SYS_FUNC_EN + 1, value8); /* Release MCU reset */
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Download Finish, Reset CPU\n");
 
-	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_AUTO_LLT_V1, (u8)(HALMAC_REG_READ_8(pHalmac_adapter, REG_AUTO_LLT_V1) | BIT_AUTO_INIT_LLT_V1));
-	counter = 1000;
-	while (HALMAC_REG_READ_8(pHalmac_adapter, REG_AUTO_LLT_V1) & BIT_AUTO_INIT_LLT_V1) {
+	counter = 10000;
+	while (HALMAC_REG_READ_16(pHalmac_adapter, REG_MCUFW_CTRL) != 0xC078) {
+		if (counter == 0) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "Check 0x80 = 0xC078 fail\n");
+			if (0xFAAAAA00 == (HALMAC_REG_READ_32(pHalmac_adapter, REG_FW_DBG7) & 0xFFFFFF00))
+				PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "Key fail\n");
+			return HALMAC_RET_DLFW_FAIL;
+		}
 		counter--;
-		if (counter == 0)
-			return HALMAC_RET_INIT_LLT_FAIL;
+		PLATFORM_RTL_DELAY_US(pDriver_adapter, 50);
 	}
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Reset LLT\n");
 
-	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_WL2LTECOEX_INDIRECT_ACCESS_CTRL_V1, 0xC00F0038);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Check 0x80 = 0xC078 counter = %d\n", counter);
 
-	counter = 10000;
-	while (0xC078 != HALMAC_REG_READ_16(pHalmac_adapter, REG_MCUFW_CTRL)) {
+	return HALMAC_RET_SUCCESS;
+}
+
+HALMAC_RET_STATUS
+halmac_free_dl_fw_end_flow_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter
+)
+{
+	u32 counter;
+	VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+	PHALMAC_API pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+
+	counter = 100;
+	while (HALMAC_REG_READ_8(pHalmac_adapter, REG_HMETFR + 3) != 0) {
+		counter--;
 		if (counter == 0) {
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "Check 0x80 = 0xC078 fail\n");
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[ERR]0x1CF != 0\n");
 			return HALMAC_RET_DLFW_FAIL;
 		}
+		PLATFORM_RTL_DELAY_US(pDriver_adapter, 50);
+	}
+
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_HMETFR + 3, ID_INFORM_DLEMEM_RDY);
+
+	counter = 10000;
+	while (HALMAC_REG_READ_8(pHalmac_adapter, REG_C2HEVT_3 + 3) != ID_INFORM_DLEMEM_RDY) {
 		counter--;
+		if (counter == 0) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[ERR]0x1AF != 0x80\n");
+			return HALMAC_RET_DLFW_FAIL;
+		}
 		PLATFORM_RTL_DELAY_US(pDriver_adapter, 50);
 	}
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Check 0x80 = 0xC078 counter = %d\n", counter);
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_C2HEVT_3 + 3, 0);
 
 	return HALMAC_RET_SUCCESS;
 }
@@ -1113,13 +1258,13 @@ halmac_pwr_seq_parser_88xx(
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	do {
-		pSeq_cmd = &(*ppPwr_seq_cfg[seq_idx]);
+		pSeq_cmd = ppPwr_seq_cfg[seq_idx];
 
-		if (NULL == pSeq_cmd)
+		if (pSeq_cmd == NULL)
 			break;
 
 		status = halmac_pwr_sub_seq_parer_88xx(pHalmac_adapter, cut, fab, intf, pSeq_cmd);
-		if (HALMAC_RET_SUCCESS != status) {
+		if (status != HALMAC_RET_SUCCESS) {
 			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[Err]pwr sub seq parser fail, status = 0x%X!\n", status);
 			return status;
 		}
@@ -1130,7 +1275,7 @@ halmac_pwr_seq_parser_88xx(
 	return status;
 }
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_pwr_sub_seq_parer_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 cut,
@@ -1139,10 +1284,11 @@ halmac_pwr_sub_seq_parer_88xx(
 	IN PHALMAC_WLAN_PWR_CFG pPwr_sub_seq_cfg
 )
 {
-	u8 value;
+	u8 value, flag;
 	u8 polling_bit;
 	u32 offset;
 	u32 polling_count;
+	static u32 poll_to_static;
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_WLAN_PWR_CFG pSub_seq_cmd;
 	PHALMAC_API pHalmac_api;
@@ -1170,6 +1316,8 @@ halmac_pwr_sub_seq_parer_88xx(
 			case HALMAC_PWR_CMD_POLLING:
 				polling_bit = 0;
 				polling_count = HALMAC_POLLING_READY_TIMEOUT_COUNT;
+				flag = 0;
+
 
 				if (pSub_seq_cmd->base == HALMAC_PWR_BASEADDR_SDIO)
 					offset = pSub_seq_cmd->offset | SDIO_LOCAL_OFFSET;
@@ -1184,13 +1332,24 @@ halmac_pwr_sub_seq_parer_88xx(
 					if (value == (pSub_seq_cmd->value & pSub_seq_cmd->msk)) {
 						polling_bit = 1;
 					} else {
-						if (0 == polling_count) {
-							PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Pwr cmd polling timeout!!\n");
-							PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Pwr cmd offset : %X!!\n", pSub_seq_cmd->offset);
-							PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Pwr cmd value : %X!!\n", pSub_seq_cmd->value);
-							PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Pwr cmd msk : %X!!\n", pSub_seq_cmd->msk);
-							PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Read offset = %X value = %X!!\n", offset, value);
-							return HALMAC_RET_PWRSEQ_POLLING_FAIL;
+						if (polling_count == 0) {
+							if (HALMAC_INTERFACE_PCIE == pHalmac_adapter->halmac_interface && 0 == flag) {
+								/* For PCIE + USB package poll power bit timeout issue */
+								poll_to_static++;
+								PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_WARN, "[WARN]PCIE polling timeout : %d!!\n", poll_to_static);
+								HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SYS_PW_CTRL, HALMAC_REG_READ_8(pHalmac_adapter, REG_SYS_PW_CTRL) | BIT(3));
+								HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SYS_PW_CTRL, HALMAC_REG_READ_8(pHalmac_adapter, REG_SYS_PW_CTRL) & ~BIT(3));
+								polling_bit = 0;
+								polling_count = HALMAC_POLLING_READY_TIMEOUT_COUNT;
+								flag = 1;
+							} else {
+								PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Pwr cmd polling timeout!!\n");
+								PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Pwr cmd offset : %X!!\n", pSub_seq_cmd->offset);
+								PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Pwr cmd value : %X!!\n", pSub_seq_cmd->value);
+								PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Pwr cmd msk : %X!!\n", pSub_seq_cmd->msk);
+								PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Read offset = %X value = %X!!\n", offset, value);
+								return HALMAC_RET_PWRSEQ_POLLING_FAIL;
+							}
 						} else {
 							PLATFORM_RTL_DELAY_US(pDriver_adapter, 50);
 						}
@@ -1252,14 +1411,14 @@ halmac_send_h2c_pkt_88xx(
 	while (pHalmac_adapter->h2c_buf_free_space <= HALMAC_H2C_CMD_SIZE_UNIT_88XX) {
 		halmac_get_h2c_buff_free_space_88xx(pHalmac_adapter);
 		counter--;
-		if (0 == counter) {
+		if (counter == 0) {
 			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "h2c free space is not enough!!\n");
 			return HALMAC_RET_H2C_SPACE_FULL;
 		}
 	}
 
 	/* Send TxDesc + H2C_CMD */
-	if (_FALSE == PLATFORM_SEND_H2C_PKT(pDriver_adapter, pHal_h2c_cmd, size)) {
+	if (PLATFORM_SEND_H2C_PKT(pDriver_adapter, pHal_h2c_cmd, size) == _FALSE) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Send H2C_CMD pkt error!!\n");
 		return HALMAC_RET_SEND_H2C_FAIL;
 	}
@@ -1288,7 +1447,7 @@ halmac_download_rsvd_page_88xx(
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	if (0 == size) {
+	if (size == 0) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "Rsvd page packet size is zero!!\n");
 		return HALMAC_RET_ZERO_LEN_RSVD_PACKET;
 	}
@@ -1312,17 +1471,17 @@ halmac_download_rsvd_page_88xx(
 	value8 = (u8)(value8 & ~(BIT(6)));
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_FWHW_TXQ_CTRL + 2, value8);
 
-	if (_FALSE == PLATFORM_SEND_RSVD_PAGE(pDriver_adapter, pHal_buf, size)) {
+	if (PLATFORM_SEND_RSVD_PAGE(pDriver_adapter, pHal_buf, size) == _FALSE) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "PLATFORM_SEND_RSVD_PAGE 1 error!!\n");
 		status = HALMAC_RET_DL_RSVD_PAGE_FAIL;
 	}
 
 	/* Check Bcn_Valid_Bit */
-	counter = 100;
+	counter = 1000;
 	while (!(HALMAC_REG_READ_8(pHalmac_adapter, REG_FIFOPAGE_CTRL_2 + 1) & BIT(7))) {
 		PLATFORM_RTL_DELAY_US(pDriver_adapter, 10);
 		counter--;
-		if (0 == counter) {
+		if (counter == 0) {
 			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Polling Bcn_Valid_Fail error!!\n");
 			status = HALMAC_RET_POLLING_BCN_VALID_FAIL;
 			break;
@@ -1354,13 +1513,13 @@ halmac_set_h2c_header_88xx(
 	H2C_CMD_HEADER_SET_CATEGORY(pHal_h2c_hdr, 0x00);
 	H2C_CMD_HEADER_SET_TOTAL_LEN(pHal_h2c_hdr, 16);
 
-	PLATFORM_MUTEX_LOCK(pDriver_adapter, &(pHalmac_adapter->h2c_seq_mutex));
+	PLATFORM_MUTEX_LOCK(pDriver_adapter, &pHalmac_adapter->h2c_seq_mutex);
 	H2C_CMD_HEADER_SET_SEQ_NUM(pHal_h2c_hdr, pHalmac_adapter->h2c_packet_seq);
 	*seq = pHalmac_adapter->h2c_packet_seq;
 	pHalmac_adapter->h2c_packet_seq++;
-	PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &(pHalmac_adapter->h2c_seq_mutex));
+	PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &pHalmac_adapter->h2c_seq_mutex);
 
-	if (_TRUE == ack)
+	if (ack == _TRUE)
 		H2C_CMD_HEADER_SET_ACK(pHal_h2c_hdr, _TRUE);
 
 	return HALMAC_RET_SUCCESS;
@@ -1384,69 +1543,19 @@ halmac_set_fw_offload_h2c_header_88xx(
 	FW_OFFLOAD_H2C_SET_CATEGORY(pHal_h2c_hdr, 0x01);
 	FW_OFFLOAD_H2C_SET_CMD_ID(pHal_h2c_hdr, 0xFF);
 
-	PLATFORM_MUTEX_LOCK(pDriver_adapter, &(pHalmac_adapter->h2c_seq_mutex));
+	PLATFORM_MUTEX_LOCK(pDriver_adapter, &pHalmac_adapter->h2c_seq_mutex);
 	FW_OFFLOAD_H2C_SET_SEQ_NUM(pHal_h2c_hdr, pHalmac_adapter->h2c_packet_seq);
 	*pSeq_num = pHalmac_adapter->h2c_packet_seq;
 	pHalmac_adapter->h2c_packet_seq++;
-	PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &(pHalmac_adapter->h2c_seq_mutex));
+	PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &pHalmac_adapter->h2c_seq_mutex);
 
-	if (_TRUE == pH2c_header_info->ack)
+	if (pH2c_header_info->ack == _TRUE)
 		FW_OFFLOAD_H2C_SET_ACK(pHal_h2c_hdr, _TRUE);
 
 	return HALMAC_RET_SUCCESS;
 }
 
 HALMAC_RET_STATUS
-halmac_send_h2c_set_pwr_mode_88xx(
-	IN PHALMAC_ADAPTER pHalmac_adapter,
-	IN PHALMAC_FWLPS_OPTION pHal_FwLps_Opt
-)
-{
-	u8 h2c_buff[HALMAC_H2C_CMD_SIZE_88XX];
-	u8 *pH2c_header, *pH2c_cmd;
-	u16 seq = 0;
-	VOID *pDriver_adapter = NULL;
-	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_send_h2c_set_pwr_mode_88xx!!\n");
-
-	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pH2c_header = h2c_buff;
-	pH2c_cmd = pH2c_header + HALMAC_H2C_CMD_HDR_SIZE_88XX;
-
-	PLATFORM_RTL_MEMSET(pDriver_adapter, h2c_buff, 0x00, HALMAC_H2C_CMD_SIZE_88XX);
-
-	SET_PWR_MODE_SET_CMD_ID(pH2c_cmd, CMD_ID_SET_PWR_MODE);
-	SET_PWR_MODE_SET_CLASS(pH2c_cmd, CLASS_SET_PWR_MODE);
-	SET_PWR_MODE_SET_MODE(pH2c_cmd, pHal_FwLps_Opt->mode);
-	SET_PWR_MODE_SET_CLK_REQUEST(pH2c_cmd, pHal_FwLps_Opt->clk_request);
-	SET_PWR_MODE_SET_RLBM(pH2c_cmd, pHal_FwLps_Opt->rlbm);
-	SET_PWR_MODE_SET_SMART_PS(pH2c_cmd, pHal_FwLps_Opt->smart_ps);
-	SET_PWR_MODE_SET_AWAKE_INTERVAL(pH2c_cmd, pHal_FwLps_Opt->awake_interval);
-	SET_PWR_MODE_SET_B_ALL_QUEUE_UAPSD(pH2c_cmd, pHal_FwLps_Opt->all_queue_uapsd);
-	SET_PWR_MODE_SET_PWR_STATE(pH2c_cmd, pHal_FwLps_Opt->pwr_state);
-	SET_PWR_MODE_SET_ANT_AUTO_SWITCH(pH2c_cmd, pHal_FwLps_Opt->ant_auto_switch);
-	SET_PWR_MODE_SET_PS_ALLOW_BT_HIGH_PRIORITY(pH2c_cmd, pHal_FwLps_Opt->ps_allow_bt_high_Priority);
-	SET_PWR_MODE_SET_PROTECT_BCN(pH2c_cmd, pHal_FwLps_Opt->protect_bcn);
-	SET_PWR_MODE_SET_SILENCE_PERIOD(pH2c_cmd, pHal_FwLps_Opt->silence_period);
-	SET_PWR_MODE_SET_FAST_BT_CONNECT(pH2c_cmd, pHal_FwLps_Opt->fast_bt_connect);
-	SET_PWR_MODE_SET_TWO_ANTENNA_EN(pH2c_cmd, pHal_FwLps_Opt->two_antenna_en);
-	SET_PWR_MODE_SET_ADOPT_USER_SETTING(pH2c_cmd, pHal_FwLps_Opt->adopt_user_Setting);
-	SET_PWR_MODE_SET_DRV_BCN_EARLY_SHIFT(pH2c_cmd, pHal_FwLps_Opt->drv_bcn_early_shift);
-
-	halmac_set_h2c_header_88xx(pHalmac_adapter, pH2c_header, &seq, _TRUE);
-
-	status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, h2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
-
-	if (HALMAC_RET_SUCCESS != status) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_set_pwr_mode_88xx Fail = %x!!\n", status);
-		return status;
-	}
-
-	return HALMAC_RET_SUCCESS;
-}
-
-HALMAC_RET_STATUS
 halmac_func_send_original_h2c_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *original_h2c,
@@ -1457,11 +1566,9 @@ halmac_func_send_original_h2c_88xx(
 	u8 H2c_buff[HALMAC_H2C_CMD_SIZE_88XX] = { 0 };
 	u8 *pH2c_header, *pH2c_cmd;
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_send_original_h2c ==========>\n");
 
@@ -1473,7 +1580,7 @@ halmac_func_send_original_h2c_88xx(
 
 	status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, H2c_buff, HALMAC_H2C_CMD_SIZE_88XX, ack);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_original_h2c Fail = %x!!\n", status);
 		return status;
 	}
@@ -1484,48 +1591,6 @@ halmac_func_send_original_h2c_88xx(
 }
 
 HALMAC_RET_STATUS
-halmac_media_status_rpt_88xx(
-	IN PHALMAC_ADAPTER pHalmac_adapter,
-	IN u8 op_mode,
-	IN u8 mac_id_ind,
-	IN u8 mac_id,
-	IN u8 mac_id_end
-)
-{
-	u8 H2c_buff[HALMAC_H2C_CMD_SIZE_88XX] = { 0 };
-	u8 *pH2c_header, *pH2c_cmd;
-	u16 seq = 0;
-	VOID *pDriver_adapter = NULL;
-	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_send_h2c_set_pwr_mode_88xx!!\n");
-
-	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pH2c_header = H2c_buff;
-	pH2c_cmd = pH2c_header + HALMAC_H2C_CMD_HDR_SIZE_88XX;
-
-	PLATFORM_RTL_MEMSET(pDriver_adapter, H2c_buff, 0x00, HALMAC_H2C_CMD_SIZE_88XX);
-
-	MEDIA_STATUS_RPT_SET_CMD_ID(pH2c_cmd, CMD_ID_MEDIA_STATUS_RPT);
-	MEDIA_STATUS_RPT_SET_CLASS(pH2c_cmd, CLASS_MEDIA_STATUS_RPT);
-	MEDIA_STATUS_RPT_SET_OP_MODE(pH2c_cmd, op_mode);
-	MEDIA_STATUS_RPT_SET_MACID_IN(pH2c_cmd, mac_id_ind);
-	MEDIA_STATUS_RPT_SET_MACID(pH2c_cmd, mac_id);
-	MEDIA_STATUS_RPT_SET_MACID_END(pH2c_cmd, mac_id_end);
-
-	halmac_set_h2c_header_88xx(pHalmac_adapter, pH2c_header, &seq, _TRUE);
-
-	status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, H2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
-
-	if (HALMAC_RET_SUCCESS != status) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_media_status_rpt_88xx Fail = %x!!\n", status);
-		return status;
-	}
-
-	return HALMAC_RET_SUCCESS;
-}
-
-HALMAC_RET_STATUS
 halmac_send_h2c_update_packet_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN HALMAC_PACKET_ID	pkt_id,
@@ -1547,7 +1612,7 @@ halmac_send_h2c_update_packet_88xx(
 
 	ret_status = halmac_download_rsvd_page_88xx(pHalmac_adapter, pkt, pkt_size);
 
-	if (HALMAC_RET_SUCCESS != ret_status) {
+	if (ret_status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_download_rsvd_page_88xx Fail = %x!!\n", ret_status);
 		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
 		return ret_status;
@@ -1567,8 +1632,9 @@ halmac_send_h2c_update_packet_88xx(
 
 	ret_status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
 
-	if (HALMAC_RET_SUCCESS != ret_status) {
+	if (ret_status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_update_packet_88xx Fail = %x!!\n", ret_status);
+		halmac_reset_feature_88xx(pHalmac_adapter, HALMAC_FEATURE_UPDATE_PACKET);
 		return ret_status;
 	}
 
@@ -1594,19 +1660,19 @@ halmac_send_h2c_phy_parameter_88xx(
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
-	pConfig_para_info = &(pHalmac_adapter->config_para_info);
+	pConfig_para_info = &pHalmac_adapter->config_para_info;
 
 	/* PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_send_h2c_phy_parameter_88xx!!\n"); */
 
-	if (NULL == pConfig_para_info->pCfg_para_buf) {
-		if (_TRUE == full_fifo)
+	if (pConfig_para_info->pCfg_para_buf == NULL) {
+		if (full_fifo == _TRUE)
 			pConfig_para_info->para_buf_size = HALMAC_EXTRA_INFO_BUFF_SIZE_FULL_FIFO_88XX;
 		else
 			pConfig_para_info->para_buf_size = HALMAC_EXTRA_INFO_BUFF_SIZE_88XX;
 
 		pConfig_para_info->pCfg_para_buf = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, pConfig_para_info->para_buf_size);
 
-		if (NULL != pConfig_para_info->pCfg_para_buf) {
+		if (pConfig_para_info->pCfg_para_buf != NULL) {
 			PLATFORM_RTL_MEMSET(pDriver_adapter, pConfig_para_info->pCfg_para_buf, 0x00, pConfig_para_info->para_buf_size);
 			pConfig_para_info->full_fifo_mode = full_fifo;
 			pConfig_para_info->pPara_buf_w = pConfig_para_info->pCfg_para_buf;
@@ -1620,79 +1686,80 @@ halmac_send_h2c_phy_parameter_88xx(
 		}
 	}
 
-	if (HALMAC_RET_SUCCESS != halmac_transition_cfg_para_state_88xx(pHalmac_adapter, HALMAC_CFG_PARA_CMD_CONSTRUCT_CONSTRUCTING))
+	if (halmac_transition_cfg_para_state_88xx(pHalmac_adapter, HALMAC_CFG_PARA_CMD_CONSTRUCT_CONSTRUCTING) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ERROR_STATE;
 
 	halmac_enqueue_para_buff_88xx(pHalmac_adapter, para_info, pConfig_para_info->pPara_buf_w, &drv_trigger_send);
 
-	if (HALMAC_PARAMETER_CMD_END != para_info->cmd_id) {
+	if (para_info->cmd_id != HALMAC_PARAMETER_CMD_END) {
 		pConfig_para_info->para_num++;
 		pConfig_para_info->pPara_buf_w += HALMAC_FW_OFFLOAD_CMD_SIZE_88XX;
 		pConfig_para_info->avai_para_buf_size = pConfig_para_info->avai_para_buf_size - HALMAC_FW_OFFLOAD_CMD_SIZE_88XX;
 	}
 
 	if (((pConfig_para_info->avai_para_buf_size - pHalmac_adapter->hw_config_info.txdesc_size) > HALMAC_FW_OFFLOAD_CMD_SIZE_88XX) &&
-	    (_FALSE == drv_trigger_send)) {
+	    (drv_trigger_send == _FALSE)) {
 		return HALMAC_RET_SUCCESS;
-	} else {
-		if (0 == pConfig_para_info->para_num) {
-			PLATFORM_RTL_FREE(pDriver_adapter, pConfig_para_info->pCfg_para_buf, pConfig_para_info->para_buf_size);
-			pConfig_para_info->pCfg_para_buf = NULL;
-			pConfig_para_info->pPara_buf_w = NULL;
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_WARN, "no cfg parameter element!!\n");
-
-			if (HALMAC_RET_SUCCESS != halmac_transition_cfg_para_state_88xx(pHalmac_adapter, HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE))
-				return HALMAC_RET_ERROR_STATE;
+	}
 
-			return HALMAC_RET_SUCCESS;
-		}
+	if (pConfig_para_info->para_num == 0) {
+		PLATFORM_RTL_FREE(pDriver_adapter, pConfig_para_info->pCfg_para_buf, pConfig_para_info->para_buf_size);
+		pConfig_para_info->pCfg_para_buf = NULL;
+		pConfig_para_info->pPara_buf_w = NULL;
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_WARN, "no cfg parameter element!!\n");
 
-		if (HALMAC_RET_SUCCESS != halmac_transition_cfg_para_state_88xx(pHalmac_adapter, HALMAC_CFG_PARA_CMD_CONSTRUCT_H2C_SENT))
+		if (halmac_transition_cfg_para_state_88xx(pHalmac_adapter, HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE) != HALMAC_RET_SUCCESS)
 			return HALMAC_RET_ERROR_STATE;
 
-		pHalmac_adapter->halmac_state.cfg_para_state_set.process_status = HALMAC_CMD_PROCESS_SENDING;
+		return HALMAC_RET_SUCCESS;
+	}
 
-		if (_TRUE == pConfig_para_info->full_fifo_mode)
-			HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, 0);
-		else
-			HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_h2c_extra_info_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
+	if (halmac_transition_cfg_para_state_88xx(pHalmac_adapter, HALMAC_CFG_PARA_CMD_CONSTRUCT_H2C_SENT) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_ERROR_STATE;
 
-		info_size = pConfig_para_info->para_num * HALMAC_FW_OFFLOAD_CMD_SIZE_88XX;
+	pHalmac_adapter->halmac_state.cfg_para_state_set.process_status = HALMAC_CMD_PROCESS_SENDING;
 
-		status = halmac_download_rsvd_page_88xx(pHalmac_adapter, (u8 *)pConfig_para_info->pCfg_para_buf, info_size);
+	if (pConfig_para_info->full_fifo_mode == _TRUE)
+		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, 0);
+	else
+		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_h2c_extra_info_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
 
-		if (HALMAC_RET_SUCCESS != status) {
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_download_rsvd_page_88xx Fail!!\n");
-		} else {
-			halmac_gen_cfg_para_h2c_88xx(pHalmac_adapter, pH2c_buff);
+	info_size = pConfig_para_info->para_num * HALMAC_FW_OFFLOAD_CMD_SIZE_88XX;
 
-			h2c_header_info.sub_cmd_id = SUB_CMD_ID_CFG_PARAMETER;
-			h2c_header_info.content_size = 4;
-			h2c_header_info.ack = _TRUE;
-			halmac_set_fw_offload_h2c_header_88xx(pHalmac_adapter, pH2c_buff, &h2c_header_info, &h2c_seq_mum);
+	status = halmac_download_rsvd_page_88xx(pHalmac_adapter, (u8 *)pConfig_para_info->pCfg_para_buf, info_size);
+
+	if (status != HALMAC_RET_SUCCESS) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_download_rsvd_page_88xx Fail!!\n");
+	} else {
+		halmac_gen_cfg_para_h2c_88xx(pHalmac_adapter, pH2c_buff);
 
-			pHalmac_adapter->halmac_state.cfg_para_state_set.seq_num = h2c_seq_mum;
+		h2c_header_info.sub_cmd_id = SUB_CMD_ID_CFG_PARAMETER;
+		h2c_header_info.content_size = 4;
+		h2c_header_info.ack = _TRUE;
+		halmac_set_fw_offload_h2c_header_88xx(pHalmac_adapter, pH2c_buff, &h2c_header_info, &h2c_seq_mum);
 
-			status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
+		pHalmac_adapter->halmac_state.cfg_para_state_set.seq_num = h2c_seq_mum;
 
-			if (HALMAC_RET_SUCCESS != status)
-				PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail!!\n");
+		status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
 
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "config parameter time = %d\n", HALMAC_REG_READ_32(pHalmac_adapter, REG_FW_DBG6));
+		if (status != HALMAC_RET_SUCCESS) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail!!\n");
+			halmac_reset_feature_88xx(pHalmac_adapter, HALMAC_FEATURE_CFG_PARA);
 		}
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "config parameter time = %d\n", HALMAC_REG_READ_32(pHalmac_adapter, REG_FW_DBG6));
+	}
 
-		PLATFORM_RTL_FREE(pDriver_adapter, pConfig_para_info->pCfg_para_buf, pConfig_para_info->para_buf_size);
-		pConfig_para_info->pCfg_para_buf = NULL;
-		pConfig_para_info->pPara_buf_w = NULL;
+	PLATFORM_RTL_FREE(pDriver_adapter, pConfig_para_info->pCfg_para_buf, pConfig_para_info->para_buf_size);
+	pConfig_para_info->pCfg_para_buf = NULL;
+	pConfig_para_info->pPara_buf_w = NULL;
 
-		/* Restore bcn head */
-		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
+	/* Restore bcn head */
+	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
 
-		if (HALMAC_RET_SUCCESS != halmac_transition_cfg_para_state_88xx(pHalmac_adapter, HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE))
-			return HALMAC_RET_ERROR_STATE;
-	}
+	if (halmac_transition_cfg_para_state_88xx(pHalmac_adapter, HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE) != HALMAC_RET_SUCCESS)
+		return HALMAC_RET_ERROR_STATE;
 
-	if (_FALSE == drv_trigger_send) {
+	if (drv_trigger_send == _FALSE) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Buffer full trigger sending H2C!!\n");
 		return HALMAC_RET_PARA_SENDING;
 	}
@@ -1700,7 +1767,7 @@ halmac_send_h2c_phy_parameter_88xx(
 	return status;
 }
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_enqueue_para_buff_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN PHALMAC_PHY_PARAMETER_INFO para_info,
@@ -1709,7 +1776,7 @@ halmac_enqueue_para_buff_88xx(
 )
 {
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_CONFIG_PARA_INFO pConfig_para_info = &(pHalmac_adapter->config_para_info);
+	PHALMAC_CONFIG_PARA_INFO pConfig_para_info = &pHalmac_adapter->config_para_info;
 
 	*pEnd_cmd = _FALSE;
 
@@ -1754,18 +1821,17 @@ halmac_enqueue_para_buff_88xx(
 	return HALMAC_RET_SUCCESS;
 }
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_gen_cfg_para_h2c_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pH2c_buff
 )
 {
-	VOID *pDriver_adapter = NULL;
-	PHALMAC_CONFIG_PARA_INFO pConfig_para_info = &(pHalmac_adapter->config_para_info);
+	PHALMAC_CONFIG_PARA_INFO pConfig_para_info = &pHalmac_adapter->config_para_info;
 
 	CFG_PARAMETER_SET_NUM(pH2c_buff, pConfig_para_info->para_num);
 
-	if (_TRUE == pConfig_para_info->full_fifo_mode) {
+	if (pConfig_para_info->full_fifo_mode == _TRUE) {
 		CFG_PARAMETER_SET_INIT_CASE(pH2c_buff, 0x1);
 		CFG_PARAMETER_SET_PHY_PARAMETER_LOC(pH2c_buff, 0);
 	} else {
@@ -1775,153 +1841,7 @@ halmac_gen_cfg_para_h2c_88xx(
 
 	return HALMAC_RET_SUCCESS;
 }
-#if 0
-HALMAC_RET_STATUS
-halmac_send_h2c_update_datapack_88xx(
-	IN PHALMAC_ADAPTER		pHalmac_adapter,
-	IN HALMAC_DATA_TYPE		halmac_data_type,
-	IN PHALMAC_PHY_PARAMETER_INFO	para_info
-)
-{
-	u8 drv_trigger_send = _FALSE;
-	u8 pH2c_buff[HALMAC_H2C_CMD_SIZE_88XX] = { 0 };
-	u8 *pCurr_buf_w;
-	u16 h2c_seq_mum = 0;
-	u32 info_size = 0;
-	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api;
-	PHALMAC_CONFIG_PARA_INFO pConfig_para_info;
-	HALMAC_H2C_HEADER_INFO h2c_header_info;
-	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
-
-	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
-	pConfig_para_info = &(pHalmac_adapter->config_para_info);
-
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_send_h2c_phy_parameter_88xx!!\n");
-
-	if (NULL == pConfig_para_info->pCfg_para_buf) {/*Buff null, allocate memory according to use mode*/
-		/*else, only 4k reserved page is used*/
-		pConfig_para_info->para_buf_size = HALMAC_EXTRA_INFO_BUFF_SIZE_88XX;
-		/* pConfig_para_info->datapack_segment =0; */
-
-
-		pConfig_para_info->pCfg_para_buf = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, pConfig_para_info->para_buf_size);
-		if (NULL != pConfig_para_info->pCfg_para_buf) {
-			/*Reset buffer parameter*/
-			PLATFORM_RTL_MEMSET(pDriver_adapter, pConfig_para_info->pCfg_para_buf, 0x00, pConfig_para_info->para_buf_size);
-			/* pConfig_para_info->full_fifo_mode = full_fifo; */
-			pConfig_para_info->data_type = halmac_data_type;
-			pConfig_para_info->pPara_buf_w = pConfig_para_info->pCfg_para_buf;
-			pConfig_para_info->para_num = 0;
-			pConfig_para_info->avai_para_buf_size = pConfig_para_info->para_buf_size;
-		} else {
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Allocate pCfg_para_buf fail!!\n");
-			return HALMAC_RET_MALLOC_FAIL;
-		}
-	}
-
-	pCurr_buf_w = pConfig_para_info->pPara_buf_w;
-
-	/*Start fill buffer content*/
-	PHY_PARAMETER_INFO_SET_LENGTH(pCurr_buf_w, HALMAC_FW_OFFLOAD_CMD_SIZE_88XX);/* Each element is 12 Byte */
-	PHY_PARAMETER_INFO_SET_IO_CMD(pCurr_buf_w, para_info->cmd_id);
-
-	switch (para_info->cmd_id) {
-	case HALMAC_PARAMETER_CMD_BB_W8:
-	case HALMAC_PARAMETER_CMD_BB_W16:
-	case HALMAC_PARAMETER_CMD_BB_W32:
-	case HALMAC_PARAMETER_CMD_MAC_W8:
-	case HALMAC_PARAMETER_CMD_MAC_W16:
-	case HALMAC_PARAMETER_CMD_MAC_W32:
-		PHY_PARAMETER_INFO_SET_IO_ADDR(pCurr_buf_w, para_info->content.MAC_REG_W.offset);
-		PHY_PARAMETER_INFO_SET_DATA(pCurr_buf_w, para_info->content.MAC_REG_W.value);
-		PHY_PARAMETER_INFO_SET_MASK(pCurr_buf_w, para_info->content.MAC_REG_W.msk);
-		PHY_PARAMETER_INFO_SET_MSK_EN(pCurr_buf_w, para_info->content.MAC_REG_W.msk_en);
-		break;
-	case HALMAC_PARAMETER_CMD_RF_W:
-		PHY_PARAMETER_INFO_SET_RF_ADDR(pCurr_buf_w, para_info->content.RF_REG_W.offset);        /* In rf register, the address is only 1 byte */
-		PHY_PARAMETER_INFO_SET_RF_PATH(pCurr_buf_w, para_info->content.RF_REG_W.rf_path);
-		PHY_PARAMETER_INFO_SET_DATA(pCurr_buf_w, para_info->content.RF_REG_W.value);
-		PHY_PARAMETER_INFO_SET_MASK(pCurr_buf_w, para_info->content.RF_REG_W.msk);
-		PHY_PARAMETER_INFO_SET_MSK_EN(pCurr_buf_w, para_info->content.MAC_REG_W.msk_en);
-		break;
-	case HALMAC_PARAMETER_CMD_DELAY_US:
-	case HALMAC_PARAMETER_CMD_DELAY_MS:
-		PHY_PARAMETER_INFO_SET_DELAY_VALUE(pCurr_buf_w, para_info->content.DELAY_TIME.delay_time);
-		break;
-
-	case HALMAC_PARAMETER_CMD_END:
-		/* PHY_PARAMETER_INFO_SET_MSK_EN(pHalmac_adapter->pPara_buf_w, 1); */
-		drv_trigger_send = _TRUE;
-		break;
-	default:
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "illegal cmd_id!!\n");
-		/* return _FALSE; */
-		break;
-	}
 
-	/*Update parameter buffer variable*/
-	if (HALMAC_PARAMETER_CMD_END != para_info->cmd_id) {
-		pConfig_para_info->para_num++;
-		pConfig_para_info->pPara_buf_w += HALMAC_FW_OFFLOAD_CMD_SIZE_88XX;
-		pConfig_para_info->avai_para_buf_size = pConfig_para_info->avai_para_buf_size - HALMAC_FW_OFFLOAD_CMD_SIZE_88XX;
-	}
-
-	if (((pConfig_para_info->avai_para_buf_size - pHalmac_adapter->hw_config_info.txdesc_size) > HALMAC_FW_OFFLOAD_CMD_SIZE_88XX) && (_FALSE == drv_trigger_send)) {
-		/*There are still space for parameter cmd, and driver does not trigger it to send, so keep it in buffer temporarily*/
-		return HALMAC_RET_SUCCESS_ENQUEUE;
-	} else {
-		/*There is no space or driver trigger it to send*/
-
-		/*Update the bcn head(dma)*/
-		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->h2c_extra_info_boundary & BIT_MASK_BCN_HEAD_1_V1));
-
-		/* Download to reserved page */
-		info_size = pConfig_para_info->para_num * HALMAC_FW_OFFLOAD_CMD_SIZE_88XX;
-		status = halmac_download_rsvd_page_88xx(pHalmac_adapter, (u8 *)pConfig_para_info->pCfg_para_buf, info_size);
-		if (HALMAC_RET_SUCCESS != status) {
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_download_rsvd_page_88xx Fail!!\n");
-		} else {/*download rsvd page ok, send h2c packet to fw*/
-			/* Construct H2C Content */
-			UPDATE_DATAPACK_SET_SIZE(pH2c_buff, pConfig_para_info->para_num * HALMAC_FW_OFFLOAD_CMD_SIZE_88XX);
-			UPDATE_DATAPACK_SET_DATAPACK_ID(pH2c_buff, pConfig_para_info->data_type);
-			UPDATE_DATAPACK_SET_DATAPACK_LOC(pH2c_buff, pHalmac_adapter->h2c_extra_info_boundary - pHalmac_adapter->Tx_boundary);
-			UPDATE_DATAPACK_SET_DATAPACK_SEGMENT(pH2c_buff, pConfig_para_info->datapack_segment);
-			UPDATE_DATAPACK_SET_END_SEGMENT(pH2c_buff, drv_trigger_send);
-
-			/* Fill in H2C Header */
-			h2c_header_info.sub_cmd_id = SUB_CMD_ID_UPDATE_DATAPACK;
-			h2c_header_info.content_size = 8;
-			h2c_header_info.ack = _TRUE;
-			halmac_set_fw_offload_h2c_header_88xx(pHalmac_adapter, pH2c_buff, &h2c_header_info, &h2c_seq_mum);
-
-			/* Send H2C Cmd Packet */
-			status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
-			if (HALMAC_RET_SUCCESS != status)
-				PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail!!\n");
-		}
-
-		PLATFORM_RTL_FREE(pDriver_adapter, pConfig_para_info->pCfg_para_buf, pConfig_para_info->para_buf_size);
-		if (_TRUE == drv_trigger_send)
-			pConfig_para_info->datapack_segment = 0;
-		else
-			pConfig_para_info->datapack_segment++;
-
-		pConfig_para_info->pCfg_para_buf = NULL;
-		pConfig_para_info->pPara_buf_w = NULL;
-		pConfig_para_info->para_num = 0;
-		pConfig_para_info->avai_para_buf_size = 0;
-
-		/*Restore Register after FW handle the H2C packet*/
-
-		/*only set bcn head back*/
-		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->Tx_boundary & BIT_MASK_BCN_HEAD_1_V1));
-	}
-
-	return status;
-}
-#endif
 HALMAC_RET_STATUS
 halmac_send_h2c_run_datapack_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
@@ -1947,7 +1867,7 @@ halmac_send_h2c_run_datapack_88xx(
 
 	status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail = %x!!\n", status);
 		return status;
 	}
@@ -1982,7 +1902,7 @@ halmac_send_bt_coex_cmd_88xx(
 
 	status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, ack);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail = %x!!\n", status);
 		return status;
 	}
@@ -2003,24 +1923,24 @@ halmac_func_ctrl_ch_switch_88xx(
 	PHALMAC_API pHalmac_api;
 	HALMAC_H2C_HEADER_INFO h2c_header_info;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
-	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &(pHalmac_adapter->halmac_state.scan_state_set.process_status);
+	HALMAC_CMD_PROCESS_STATUS *pProcess_status = &pHalmac_adapter->halmac_state.scan_state_set.process_status;
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_ctrl_ch_switch!!\n");
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	if (HALMAC_RET_SUCCESS != halmac_transition_scan_state_88xx(pHalmac_adapter, HALMAC_SCAN_CMD_CONSTRUCT_H2C_SENT))
+	if (halmac_transition_scan_state_88xx(pHalmac_adapter, HALMAC_SCAN_CMD_CONSTRUCT_H2C_SENT) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ERROR_STATE;
 
 	*pProcess_status = HALMAC_CMD_PROCESS_SENDING;
 
-	if (0 != pCs_option->switch_en) {
+	if (pCs_option->switch_en != 0) {
 		HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_h2c_extra_info_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
 
 		status = halmac_download_rsvd_page_88xx(pHalmac_adapter, pHalmac_adapter->ch_sw_info.ch_info_buf, pHalmac_adapter->ch_sw_info.total_size);
 
-		if (HALMAC_RET_SUCCESS != status) {
+		if (status != HALMAC_RET_SUCCESS) {
 			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_download_rsvd_page_88xx Fail = %x!!\n", status);
 			HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
 			return status;
@@ -2051,9 +1971,10 @@ halmac_func_ctrl_ch_switch_88xx(
 
 	status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
 
-	if (HALMAC_RET_SUCCESS != status)
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail = %x!!\n", status);
-
+		halmac_reset_feature_88xx(pHalmac_adapter, HALMAC_FEATURE_CHANNEL_SWITCH);
+	}
 	PLATFORM_RTL_FREE(pDriver_adapter, pHalmac_adapter->ch_sw_info.ch_info_buf, pHalmac_adapter->ch_sw_info.buf_size);
 	pHalmac_adapter->ch_sw_info.ch_info_buf = NULL;
 	pHalmac_adapter->ch_sw_info.ch_info_buf_w = NULL;
@@ -2063,7 +1984,7 @@ halmac_func_ctrl_ch_switch_88xx(
 	pHalmac_adapter->ch_sw_info.total_size = 0;
 	pHalmac_adapter->ch_sw_info.ch_num = 0;
 
-	if (HALMAC_RET_SUCCESS != halmac_transition_scan_state_88xx(pHalmac_adapter, HALMAC_SCAN_CMD_CONSTRUCT_IDLE))
+	if (halmac_transition_scan_state_88xx(pHalmac_adapter, HALMAC_SCAN_CMD_CONSTRUCT_IDLE) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ERROR_STATE;
 
 	return status;
@@ -2096,7 +2017,7 @@ halmac_func_send_general_info_88xx(
 
 	status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
 
-	if (HALMAC_RET_SUCCESS != status)
+	if (status != HALMAC_RET_SUCCESS)
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail = %x!!\n", status);
 
 	return status;
@@ -2135,7 +2056,7 @@ halmac_send_h2c_update_bcn_parse_info_88xx(
 
 	status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail =%x !!\n", status);
 		return status;
 	}
@@ -2165,7 +2086,7 @@ halmac_send_h2c_ps_tuning_para_88xx(
 
 	status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _FALSE);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail = %x!!\n", status);
 		return status;
 	}
@@ -2191,7 +2112,7 @@ halmac_parse_c2h_packet_88xx(
 	c2h_cmd = (u8)C2H_HDR_GET_CMD_ID(pC2h_buf);
 
 	/* FW offload C2H cmd is 0xFF */
-	if (0xFF != c2h_cmd) {
+	if (c2h_cmd != 0xFF) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "C2H_PKT not for FwOffloadC2HFormat!!\n");
 		return HALMAC_RET_C2H_NOT_HANDLED;
 	}
@@ -2220,7 +2141,8 @@ halmac_parse_c2h_packet_88xx(
 		status = halmac_parse_efuse_data_88xx(pHalmac_adapter, pC2h_buf, c2h_size);
 		break;
 	default:
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "c2h_sub_cmd_id switch case out of boundary!!\n");
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_WARN, "c2h_sub_cmd_id switch case out of boundary!!\n");
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_WARN, "[ERR]c2h pkt : %.8X %.8X!!\n", *(u32 *)pC2h_buf, *(u32 *)(pC2h_buf + 4));
 		status = HALMAC_RET_C2H_NOT_HANDLED;
 		break;
 	}
@@ -2228,7 +2150,7 @@ halmac_parse_c2h_packet_88xx(
 	return status;
 }
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_c2h_debug_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
@@ -2247,19 +2169,18 @@ halmac_parse_c2h_debug_88xx(
 
 	dbg_content_length = (u8)C2H_HDR_GET_LEN((u8 *)pC2h_buf_local);
 
-	if (dbg_content_length > C2H_DBG_CONTENT_MAX_LENGTH) {
+	if (dbg_content_length > C2H_DBG_CONTENT_MAX_LENGTH)
 		return HALMAC_RET_SUCCESS;
-	} else {
-		*(pC2h_buf_local + C2H_DBG_HEADER_LENGTH + dbg_content_length - 2) = '\n';
-		dbg_seq_num = (u8)(*(pC2h_buf_local + C2H_DBG_HEADER_LENGTH));
-		PLATFORM_MSG_PRINT(pDriver_adapter,  HALMAC_MSG_H2C,  HALMAC_DBG_TRACE,  "[RTKFW, SEQ=%d]: %s",  dbg_seq_num,  (char *)(pC2h_buf_local + C2H_DBG_HEADER_LENGTH + 1));
-	}
+
+	*(pC2h_buf_local + C2H_DBG_HEADER_LENGTH + dbg_content_length - 2) = '\n';
+	dbg_seq_num = (u8)(*(pC2h_buf_local + C2H_DBG_HEADER_LENGTH));
+	PLATFORM_MSG_PRINT(pDriver_adapter,  HALMAC_MSG_H2C,  HALMAC_DBG_TRACE,  "[RTKFW, SEQ=%d]: %s",  dbg_seq_num,  (char *)(pC2h_buf_local + C2H_DBG_HEADER_LENGTH + 1));
 
 	return HALMAC_RET_SUCCESS;
 }
 
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_scan_status_rpt_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
@@ -2268,7 +2189,7 @@ halmac_parse_scan_status_rpt_88xx(
 {
 	u8 h2c_return_code;
 	VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	HALMAC_CMD_PROCESS_STATUS process_status = HALMAC_CMD_PROCESS_UNDEFINE;
+	HALMAC_CMD_PROCESS_STATUS process_status;
 
 	h2c_return_code = (u8)SCAN_STATUS_RPT_GET_H2C_RETURN_CODE(pC2h_buf);
 	process_status = (HALMAC_H2C_RETURN_SUCCESS == (HALMAC_H2C_RETURN_CODE)h2c_return_code) ? HALMAC_CMD_PROCESS_DONE : HALMAC_CMD_PROCESS_ERROR;
@@ -2277,13 +2198,13 @@ halmac_parse_scan_status_rpt_88xx(
 
 	pHalmac_adapter->halmac_state.scan_state_set.process_status = process_status;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "scan status : %X\n", process_status);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]scan status : %X\n", process_status);
 
 	return HALMAC_RET_SUCCESS;
 }
 
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_psd_data_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
@@ -2293,18 +2214,18 @@ halmac_parse_psd_data_88xx(
 	u8 segment_id = 0, segment_size = 0, h2c_seq = 0;
 	u16 total_size;
 	VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	HALMAC_CMD_PROCESS_STATUS process_status = HALMAC_CMD_PROCESS_UNDEFINE;
-	PHALMAC_PSD_STATE_SET pPsd_set = &(pHalmac_adapter->halmac_state.psd_set);
+	HALMAC_CMD_PROCESS_STATUS process_status;
+	PHALMAC_PSD_STATE_SET pPsd_set = &pHalmac_adapter->halmac_state.psd_set;
 
 	h2c_seq = (u8)PSD_DATA_GET_H2C_SEQ(pC2h_buf);
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "Seq num : h2c -> %d c2h -> %d\n", pPsd_set->seq_num, h2c_seq);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]Seq num : h2c -> %d c2h -> %d\n", pPsd_set->seq_num, h2c_seq);
 	if (h2c_seq != pPsd_set->seq_num) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Seq num mismactch : h2c -> %d c2h -> %d\n", pPsd_set->seq_num, h2c_seq);
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Seq num mismactch : h2c -> %d c2h -> %d\n", pPsd_set->seq_num, h2c_seq);
 		return HALMAC_RET_SUCCESS;
 	}
 
-	if (HALMAC_CMD_PROCESS_SENDING != pPsd_set->process_status) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Not in HALMAC_CMD_PROCESS_SENDING\n");
+	if (pPsd_set->process_status != HALMAC_CMD_PROCESS_SENDING) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Not in HALMAC_CMD_PROCESS_SENDING\n");
 		return HALMAC_RET_SUCCESS;
 	}
 
@@ -2313,15 +2234,15 @@ halmac_parse_psd_data_88xx(
 	segment_size = (u8)PSD_DATA_GET_SEGMENT_SIZE(pC2h_buf);
 	pPsd_set->data_size = total_size;
 
-	if (NULL == pPsd_set->pData)
+	if (pPsd_set->pData == NULL)
 		pPsd_set->pData = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, pPsd_set->data_size);
 
-	if (0 == segment_id)
+	if (segment_id == 0)
 		pPsd_set->segment_size = segment_size;
 
 	PLATFORM_RTL_MEMCPY(pDriver_adapter, pPsd_set->pData + segment_id * pPsd_set->segment_size, pC2h_buf + HALMAC_C2H_DATA_OFFSET_88XX, segment_size);
 
-	if (_FALSE == PSD_DATA_GET_END_SEGMENT(pC2h_buf))
+	if (PSD_DATA_GET_END_SEGMENT(pC2h_buf) == _FALSE)
 		return HALMAC_RET_SUCCESS;
 
 	process_status = HALMAC_CMD_PROCESS_DONE;
@@ -2332,7 +2253,7 @@ halmac_parse_psd_data_88xx(
 	return HALMAC_RET_SUCCESS;
 }
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_efuse_data_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
@@ -2344,57 +2265,62 @@ halmac_parse_efuse_data_88xx(
 	u32 eeprom_size = pHalmac_adapter->hw_config_info.eeprom_size;
 	u8 h2c_return_code = 0;
 	VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	HALMAC_CMD_PROCESS_STATUS process_status = HALMAC_CMD_PROCESS_UNDEFINE;
+	HALMAC_CMD_PROCESS_STATUS process_status;
 
 	h2c_seq = (u8)EFUSE_DATA_GET_H2C_SEQ(pC2h_buf);
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "Seq num : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.efuse_state_set.seq_num, h2c_seq);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]Seq num : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.efuse_state_set.seq_num, h2c_seq);
 	if (h2c_seq != pHalmac_adapter->halmac_state.efuse_state_set.seq_num) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Seq num mismactch : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.efuse_state_set.seq_num, h2c_seq);
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Seq num mismactch : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.efuse_state_set.seq_num, h2c_seq);
 		return HALMAC_RET_SUCCESS;
 	}
 
-	if (HALMAC_CMD_PROCESS_SENDING != pHalmac_adapter->halmac_state.efuse_state_set.process_status) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Not in HALMAC_CMD_PROCESS_SENDING\n");
+	if (pHalmac_adapter->halmac_state.efuse_state_set.process_status != HALMAC_CMD_PROCESS_SENDING) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Not in HALMAC_CMD_PROCESS_SENDING\n");
 		return HALMAC_RET_SUCCESS;
 	}
 
-	pHalmac_adapter->halmac_state.efuse_state_set.fw_return_code = h2c_return_code;
 	segment_id = (u8)EFUSE_DATA_GET_SEGMENT_ID(pC2h_buf);
 	segment_size = (u8)EFUSE_DATA_GET_SEGMENT_SIZE(pC2h_buf);
-	if (0 == segment_id)
+	if (segment_id == 0)
 		pHalmac_adapter->efuse_segment_size = segment_size;
 
 	pEeprom_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, eeprom_size);
-	if (NULL == pEeprom_map) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac allocate local eeprom map Fail!!\n");
+	if (pEeprom_map == NULL) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac allocate local eeprom map Fail!!\n");
 		return HALMAC_RET_MALLOC_FAIL;
 	}
 	PLATFORM_RTL_MEMSET(pDriver_adapter, pEeprom_map, 0xFF, eeprom_size);
 
-	PLATFORM_MUTEX_LOCK(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
+	PLATFORM_MUTEX_LOCK(pDriver_adapter, &pHalmac_adapter->EfuseMutex);
 	PLATFORM_RTL_MEMCPY(pDriver_adapter, pHalmac_adapter->pHalEfuse_map + segment_id * pHalmac_adapter->efuse_segment_size,
 		pC2h_buf + HALMAC_C2H_DATA_OFFSET_88XX, segment_size);
-	PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
+	PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &pHalmac_adapter->EfuseMutex);
 
-	if (_FALSE == EFUSE_DATA_GET_END_SEGMENT(pC2h_buf))
+	if (EFUSE_DATA_GET_END_SEGMENT(pC2h_buf) == _FALSE) {
+		PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
 		return HALMAC_RET_SUCCESS;
+	}
+
+	h2c_return_code = pHalmac_adapter->halmac_state.efuse_state_set.fw_return_code;
 
 	if (HALMAC_H2C_RETURN_SUCCESS == (HALMAC_H2C_RETURN_CODE)h2c_return_code) {
 		process_status = HALMAC_CMD_PROCESS_DONE;
 		pHalmac_adapter->halmac_state.efuse_state_set.process_status = process_status;
 
-		PLATFORM_MUTEX_LOCK(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
+		PLATFORM_MUTEX_LOCK(pDriver_adapter, &pHalmac_adapter->EfuseMutex);
 		pHalmac_adapter->hal_efuse_map_valid = _TRUE;
-		PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
+		PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &pHalmac_adapter->EfuseMutex);
 
-		if (1 == pHalmac_adapter->event_trigger.physical_efuse_map) {
+		if (pHalmac_adapter->event_trigger.physical_efuse_map == 1) {
 			PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_DUMP_PHYSICAL_EFUSE, process_status, pHalmac_adapter->pHalEfuse_map, pHalmac_adapter->hw_config_info.efuse_size);
 			pHalmac_adapter->event_trigger.physical_efuse_map = 0;
 		}
 
-		if (1 == pHalmac_adapter->event_trigger.logical_efuse_map) {
-			if (HALMAC_RET_SUCCESS != halmac_eeprom_parser_88xx(pHalmac_adapter, pHalmac_adapter->pHalEfuse_map, pEeprom_map))
+		if (pHalmac_adapter->event_trigger.logical_efuse_map == 1) {
+			if (halmac_eeprom_parser_88xx(pHalmac_adapter, pHalmac_adapter->pHalEfuse_map, pEeprom_map) != HALMAC_RET_SUCCESS) {
+				PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
 				return HALMAC_RET_EEPROM_PARSING_FAIL;
+			}
 			PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_DUMP_LOGICAL_EFUSE, process_status, pEeprom_map, eeprom_size);
 			pHalmac_adapter->event_trigger.logical_efuse_map = 0;
 		}
@@ -2402,15 +2328,17 @@ halmac_parse_efuse_data_88xx(
 		process_status = HALMAC_CMD_PROCESS_ERROR;
 		pHalmac_adapter->halmac_state.efuse_state_set.process_status = process_status;
 
-		if (1 == pHalmac_adapter->event_trigger.physical_efuse_map) {
-			PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_DUMP_PHYSICAL_EFUSE, process_status, &(pHalmac_adapter->halmac_state.efuse_state_set.fw_return_code), 1);
+		if (pHalmac_adapter->event_trigger.physical_efuse_map == 1) {
+			PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_DUMP_PHYSICAL_EFUSE, process_status, &pHalmac_adapter->halmac_state.efuse_state_set.fw_return_code, 1);
 			pHalmac_adapter->event_trigger.physical_efuse_map = 0;
 		}
 
-		if (1 == pHalmac_adapter->event_trigger.logical_efuse_map) {
-			if (HALMAC_RET_SUCCESS != halmac_eeprom_parser_88xx(pHalmac_adapter, pHalmac_adapter->pHalEfuse_map, pEeprom_map))
+		if (pHalmac_adapter->event_trigger.logical_efuse_map == 1) {
+			if (halmac_eeprom_parser_88xx(pHalmac_adapter, pHalmac_adapter->pHalEfuse_map, pEeprom_map) != HALMAC_RET_SUCCESS) {
+				PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
 				return HALMAC_RET_EEPROM_PARSING_FAIL;
-			PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_DUMP_LOGICAL_EFUSE, process_status, &(pHalmac_adapter->halmac_state.efuse_state_set.fw_return_code), 1);
+			}
+			PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_DUMP_LOGICAL_EFUSE, process_status, &pHalmac_adapter->halmac_state.efuse_state_set.fw_return_code, 1);
 			pHalmac_adapter->event_trigger.logical_efuse_map = 0;
 		}
 	}
@@ -2420,7 +2348,7 @@ halmac_parse_efuse_data_88xx(
 	return HALMAC_RET_SUCCESS;
 }
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_h2c_ack_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
@@ -2428,13 +2356,10 @@ halmac_parse_h2c_ack_88xx(
 )
 {
 	u8 h2c_cmd_id, h2c_sub_cmd_id;
-	u8 h2c_seq = 0, offset = 0, shift = 0;
 	u8 h2c_return_code;
 	VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	HALMAC_CMD_PROCESS_STATUS process_status = HALMAC_CMD_PROCESS_UNDEFINE;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
 
-
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "Ack for C2H!!\n");
 
 	h2c_return_code = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(pC2h_buf);
@@ -2443,7 +2368,7 @@ halmac_parse_h2c_ack_88xx(
 
 	h2c_cmd_id = (u8)H2C_ACK_HDR_GET_H2C_CMD_ID(pC2h_buf);
 
-	if (0xFF != h2c_cmd_id) {
+	if (h2c_cmd_id != 0xFF) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "original h2c ack is not handled!!\n");
 		status = HALMAC_RET_C2H_NOT_HANDLED;
 	} else {
@@ -2451,6 +2376,7 @@ halmac_parse_h2c_ack_88xx(
 
 		switch (h2c_sub_cmd_id) {
 		case H2C_SUB_CMD_ID_DUMP_PHYSICAL_EFUSE_ACK:
+			status = halmac_parse_h2c_ack_phy_efuse_88xx(pHalmac_adapter, pC2h_buf, c2h_size);
 			break;
 		case H2C_SUB_CMD_ID_CFG_PARAMETER_ACK:
 			status = halmac_parse_h2c_ack_cfg_para_88xx(pHalmac_adapter, pC2h_buf, c2h_size);
@@ -2476,7 +2402,7 @@ halmac_parse_h2c_ack_88xx(
 		case H2C_SUB_CMD_ID_PSD_ACK:
 			break;
 		default:
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "h2c_sub_cmd_id switch case out of boundary!!\n");
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_WARN, "h2c_sub_cmd_id switch case out of boundary!!\n");
 			status = HALMAC_RET_C2H_NOT_HANDLED;
 			break;
 		}
@@ -2485,7 +2411,36 @@ halmac_parse_h2c_ack_88xx(
 	return status;
 }
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
+halmac_parse_h2c_ack_phy_efuse_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 *pC2h_buf,
+	IN u32 c2h_size
+)
+{
+	u8 h2c_seq = 0;
+	u8 h2c_return_code;
+	VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+
+	h2c_seq = (u8)H2C_ACK_HDR_GET_H2C_SEQ(pC2h_buf);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]Seq num : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.efuse_state_set.seq_num, h2c_seq);
+	if (h2c_seq != pHalmac_adapter->halmac_state.efuse_state_set.seq_num) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Seq num mismactch : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.efuse_state_set.seq_num, h2c_seq);
+		return HALMAC_RET_SUCCESS;
+	}
+
+	if (pHalmac_adapter->halmac_state.efuse_state_set.process_status != HALMAC_CMD_PROCESS_SENDING) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Not in HALMAC_CMD_PROCESS_SENDING\n");
+		return HALMAC_RET_SUCCESS;
+	}
+
+	h2c_return_code = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(pC2h_buf);
+	pHalmac_adapter->halmac_state.efuse_state_set.fw_return_code = h2c_return_code;
+
+	return HALMAC_RET_SUCCESS;
+}
+
+static HALMAC_RET_STATUS
 halmac_parse_h2c_ack_cfg_para_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
@@ -2505,7 +2460,7 @@ halmac_parse_h2c_ack_cfg_para_88xx(
 		return HALMAC_RET_SUCCESS;
 	}
 
-	if (HALMAC_CMD_PROCESS_SENDING != pHalmac_adapter->halmac_state.cfg_para_state_set.process_status) {
+	if (pHalmac_adapter->halmac_state.cfg_para_state_set.process_status != HALMAC_CMD_PROCESS_SENDING) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Not in HALMAC_CMD_PROCESS_SENDING\n");
 		return HALMAC_RET_SUCCESS;
 	}
@@ -2521,21 +2476,20 @@ halmac_parse_h2c_ack_cfg_para_88xx(
 		process_status = HALMAC_CMD_PROCESS_ERROR;
 	}
 
-	if ((HALMAC_H2C_RETURN_SUCCESS == (HALMAC_H2C_RETURN_CODE)h2c_return_code) && (HALMAC_CMD_PROCESS_ERROR != process_status)) {
+	if (((HALMAC_H2C_RETURN_CODE)h2c_return_code == HALMAC_H2C_RETURN_SUCCESS) && (process_status != HALMAC_CMD_PROCESS_ERROR)) {
 		process_status = HALMAC_CMD_PROCESS_DONE;
 		pHalmac_adapter->halmac_state.cfg_para_state_set.process_status = process_status;
 		PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_CFG_PARA, process_status, NULL, 0);
 	} else {
 		process_status = HALMAC_CMD_PROCESS_ERROR;
 		pHalmac_adapter->halmac_state.cfg_para_state_set.process_status = process_status;
-		PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_CFG_PARA, process_status, &(pHalmac_adapter->halmac_state.cfg_para_state_set.fw_return_code), 1);
+		PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_CFG_PARA, process_status, &pHalmac_adapter->halmac_state.cfg_para_state_set.fw_return_code, 1);
 	}
 
 	return HALMAC_RET_SUCCESS;
 }
 
-
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_h2c_ack_update_packet_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
@@ -2545,17 +2499,17 @@ halmac_parse_h2c_ack_update_packet_88xx(
 	u8 h2c_seq = 0;
 	u8 h2c_return_code;
 	VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	HALMAC_CMD_PROCESS_STATUS process_status = HALMAC_CMD_PROCESS_UNDEFINE;
+	HALMAC_CMD_PROCESS_STATUS process_status;
 
 	h2c_seq = (u8)H2C_ACK_HDR_GET_H2C_SEQ(pC2h_buf);
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "Seq num : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.update_packet_set.seq_num, h2c_seq);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]Seq num : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.update_packet_set.seq_num, h2c_seq);
 	if (h2c_seq != pHalmac_adapter->halmac_state.update_packet_set.seq_num) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Seq num mismactch : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.update_packet_set.seq_num, h2c_seq);
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Seq num mismactch : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.update_packet_set.seq_num, h2c_seq);
 		return HALMAC_RET_SUCCESS;
 	}
 
-	if (HALMAC_CMD_PROCESS_SENDING != pHalmac_adapter->halmac_state.update_packet_set.process_status) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Not in HALMAC_CMD_PROCESS_SENDING\n");
+	if (pHalmac_adapter->halmac_state.update_packet_set.process_status != HALMAC_CMD_PROCESS_SENDING) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Not in HALMAC_CMD_PROCESS_SENDING\n");
 		return HALMAC_RET_SUCCESS;
 	}
 
@@ -2569,13 +2523,13 @@ halmac_parse_h2c_ack_update_packet_88xx(
 	} else {
 		process_status = HALMAC_CMD_PROCESS_ERROR;
 		pHalmac_adapter->halmac_state.update_packet_set.process_status = process_status;
-		PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_UPDATE_PACKET, process_status, &(pHalmac_adapter->halmac_state.update_packet_set.fw_return_code), 1);
+		PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_UPDATE_PACKET, process_status, &pHalmac_adapter->halmac_state.update_packet_set.fw_return_code, 1);
 	}
 
 	return HALMAC_RET_SUCCESS;
 }
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_h2c_ack_update_datapack_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
@@ -2591,7 +2545,7 @@ halmac_parse_h2c_ack_update_datapack_88xx(
 }
 
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_h2c_ack_run_datapack_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
@@ -2607,7 +2561,7 @@ halmac_parse_h2c_ack_run_datapack_88xx(
 }
 
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_h2c_ack_channel_switch_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
@@ -2617,37 +2571,37 @@ halmac_parse_h2c_ack_channel_switch_88xx(
 	u8 h2c_seq = 0;
 	u8 h2c_return_code;
 	VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	HALMAC_CMD_PROCESS_STATUS process_status = HALMAC_CMD_PROCESS_UNDEFINE;
+	HALMAC_CMD_PROCESS_STATUS process_status;
 
 	h2c_seq = (u8)H2C_ACK_HDR_GET_H2C_SEQ(pC2h_buf);
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "Seq num : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.scan_state_set.seq_num, h2c_seq);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]Seq num : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.scan_state_set.seq_num, h2c_seq);
 	if (h2c_seq != pHalmac_adapter->halmac_state.scan_state_set.seq_num) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Seq num mismactch : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.scan_state_set.seq_num, h2c_seq);
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Seq num mismactch : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.scan_state_set.seq_num, h2c_seq);
 		return HALMAC_RET_SUCCESS;
 	}
 
-	if (HALMAC_CMD_PROCESS_SENDING != pHalmac_adapter->halmac_state.scan_state_set.process_status) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Not in HALMAC_CMD_PROCESS_SENDING\n");
+	if (pHalmac_adapter->halmac_state.scan_state_set.process_status != HALMAC_CMD_PROCESS_SENDING) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Not in HALMAC_CMD_PROCESS_SENDING\n");
 		return HALMAC_RET_SUCCESS;
 	}
 
 	h2c_return_code = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(pC2h_buf);
 	pHalmac_adapter->halmac_state.scan_state_set.fw_return_code = h2c_return_code;
 
-	if (HALMAC_H2C_RETURN_SUCCESS == (HALMAC_H2C_RETURN_CODE)h2c_return_code) {
+	if ((HALMAC_H2C_RETURN_CODE)h2c_return_code == HALMAC_H2C_RETURN_SUCCESS) {
 		process_status = HALMAC_CMD_PROCESS_RCVD;
 		pHalmac_adapter->halmac_state.scan_state_set.process_status = process_status;
 		PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_CHANNEL_SWITCH, process_status, NULL, 0);
 	} else {
 		process_status = HALMAC_CMD_PROCESS_ERROR;
 		pHalmac_adapter->halmac_state.scan_state_set.process_status = process_status;
-		PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_CHANNEL_SWITCH, process_status, &(pHalmac_adapter->halmac_state.scan_state_set.fw_return_code), 1);
+		PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_CHANNEL_SWITCH, process_status, &pHalmac_adapter->halmac_state.scan_state_set.fw_return_code, 1);
 	}
 
 	return HALMAC_RET_SUCCESS;
 }
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_h2c_ack_iqk_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
@@ -2657,37 +2611,37 @@ halmac_parse_h2c_ack_iqk_88xx(
 	u8 h2c_seq = 0;
 	u8 h2c_return_code;
 	VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	HALMAC_CMD_PROCESS_STATUS process_status = HALMAC_CMD_PROCESS_UNDEFINE;
+	HALMAC_CMD_PROCESS_STATUS process_status;
 
 	h2c_seq = (u8)H2C_ACK_HDR_GET_H2C_SEQ(pC2h_buf);
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "Seq num : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.iqk_set.seq_num, h2c_seq);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]Seq num : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.iqk_set.seq_num, h2c_seq);
 	if (h2c_seq != pHalmac_adapter->halmac_state.iqk_set.seq_num) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Seq num mismactch : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.iqk_set.seq_num, h2c_seq);
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Seq num mismactch : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.iqk_set.seq_num, h2c_seq);
 		return HALMAC_RET_SUCCESS;
 	}
 
-	if (HALMAC_CMD_PROCESS_SENDING != pHalmac_adapter->halmac_state.iqk_set.process_status) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Not in HALMAC_CMD_PROCESS_SENDING\n");
+	if (pHalmac_adapter->halmac_state.iqk_set.process_status != HALMAC_CMD_PROCESS_SENDING) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Not in HALMAC_CMD_PROCESS_SENDING\n");
 		return HALMAC_RET_SUCCESS;
 	}
 
 	h2c_return_code = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(pC2h_buf);
 	pHalmac_adapter->halmac_state.iqk_set.fw_return_code = h2c_return_code;
 
-	if (HALMAC_H2C_RETURN_SUCCESS == (HALMAC_H2C_RETURN_CODE)h2c_return_code) {
+	if ((HALMAC_H2C_RETURN_CODE)h2c_return_code == HALMAC_H2C_RETURN_SUCCESS) {
 		process_status = HALMAC_CMD_PROCESS_DONE;
 		pHalmac_adapter->halmac_state.iqk_set.process_status = process_status;
 		PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_IQK, process_status, NULL, 0);
 	} else {
 		process_status = HALMAC_CMD_PROCESS_ERROR;
 		pHalmac_adapter->halmac_state.iqk_set.process_status = process_status;
-		PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_IQK, process_status, &(pHalmac_adapter->halmac_state.iqk_set.fw_return_code), 1);
+		PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_IQK, process_status, &pHalmac_adapter->halmac_state.iqk_set.fw_return_code, 1);
 	}
 
 	return HALMAC_RET_SUCCESS;
 }
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_parse_h2c_ack_power_tracking_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pC2h_buf,
@@ -2697,31 +2651,31 @@ halmac_parse_h2c_ack_power_tracking_88xx(
 	u8 h2c_seq = 0;
 	u8 h2c_return_code;
 	VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	HALMAC_CMD_PROCESS_STATUS process_status = HALMAC_CMD_PROCESS_UNDEFINE;
+	HALMAC_CMD_PROCESS_STATUS process_status;
 
 	h2c_seq = (u8)H2C_ACK_HDR_GET_H2C_SEQ(pC2h_buf);
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "Seq num : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.power_tracking_set.seq_num, h2c_seq);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]Seq num : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.power_tracking_set.seq_num, h2c_seq);
 	if (h2c_seq != pHalmac_adapter->halmac_state.power_tracking_set.seq_num) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Seq num mismactch : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.power_tracking_set.seq_num, h2c_seq);
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Seq num mismactch : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.power_tracking_set.seq_num, h2c_seq);
 		return HALMAC_RET_SUCCESS;
 	}
 
-	if (HALMAC_CMD_PROCESS_SENDING != pHalmac_adapter->halmac_state.power_tracking_set.process_status) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Not in HALMAC_CMD_PROCESS_SENDING\n");
+	if (pHalmac_adapter->halmac_state.power_tracking_set.process_status != HALMAC_CMD_PROCESS_SENDING) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Not in HALMAC_CMD_PROCESS_SENDING\n");
 		return HALMAC_RET_SUCCESS;
 	}
 
 	h2c_return_code = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(pC2h_buf);
 	pHalmac_adapter->halmac_state.power_tracking_set.fw_return_code = h2c_return_code;
 
-	if (HALMAC_H2C_RETURN_SUCCESS == (HALMAC_H2C_RETURN_CODE)h2c_return_code) {
+	if ((HALMAC_H2C_RETURN_CODE)h2c_return_code == HALMAC_H2C_RETURN_SUCCESS) {
 		process_status = HALMAC_CMD_PROCESS_DONE;
 		pHalmac_adapter->halmac_state.power_tracking_set.process_status = process_status;
 		PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_POWER_TRACKING, process_status, NULL, 0);
 	} else {
 		process_status = HALMAC_CMD_PROCESS_ERROR;
 		pHalmac_adapter->halmac_state.power_tracking_set.process_status = process_status;
-		PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_POWER_TRACKING, process_status, &(pHalmac_adapter->halmac_state.power_tracking_set.fw_return_code), 1);
+		PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_POWER_TRACKING, process_status, &pHalmac_adapter->halmac_state.power_tracking_set.fw_return_code, 1);
 	}
 
 	return HALMAC_RET_SUCCESS;
@@ -2739,10 +2693,10 @@ halmac_convert_to_sdio_bus_offset_88xx(
 
 	switch ((*halmac_offset) & 0xFFFF0000) {
 	case WLAN_IOREG_OFFSET:
-		*halmac_offset = (WLAN_IOREG_DEVICE_ID << 13) | (*halmac_offset & HALMAC_WLAN_IOREG_MSK);
+		*halmac_offset = (HALMAC_SDIO_CMD_ADDR_MAC_REG << 13) | (*halmac_offset & HALMAC_WLAN_MAC_REG_MSK);
 		break;
 	case SDIO_LOCAL_OFFSET:
-		*halmac_offset = (SDIO_LOCAL_DEVICE_ID << 13) | (*halmac_offset & HALMAC_SDIO_LOCAL_MSK);
+		*halmac_offset = (HALMAC_SDIO_CMD_ADDR_SDIO_REG << 13) | (*halmac_offset & HALMAC_SDIO_LOCAL_MSK);
 		break;
 	default:
 		*halmac_offset = 0xFFFFFFFF;
@@ -2770,14 +2724,10 @@ halmac_update_sdio_free_page_88xx(
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_update_sdio_free_page_88xx ==========>\n");
 
-	pSdio_free_space = &(pHalmac_adapter->sdio_free_space);
-	/*need to use HALMAC_REG_READ_N, 20160316, Soar*/
+	pSdio_free_space = &pHalmac_adapter->sdio_free_space;
+
 	HALMAC_REG_SDIO_CMD53_READ_N(pHalmac_adapter, REG_SDIO_FREE_TXPG, 12, data);
-/*
-	free_page = HALMAC_REG_READ_32(pHalmac_adapter, REG_SDIO_FREE_TXPG);
-	free_page2 = HALMAC_REG_READ_32(pHalmac_adapter, REG_SDIO_FREE_TXPG2);
-	free_page3 = HALMAC_REG_READ_32(pHalmac_adapter, REG_SDIO_OQT_FREE_TXPG_V1);
-*/
+
 	free_page = data[0] | (data[1] << 8) | (data[2] << 16) | (data[3] << 24);
 	free_page2 = data[4] | (data[5] << 8) | (data[6] << 16) | (data[7] << 24);
 	free_page3 = data[8] | (data[9] << 8) | (data[10] << 16) | (data[11] << 24);
@@ -2787,8 +2737,8 @@ halmac_update_sdio_free_page_88xx(
 	pSdio_free_space->low_queue_number = (u16)BIT_GET_LOW_FREEPG_V1(free_page2);
 	pSdio_free_space->public_queue_number = (u16)BIT_GET_PUB_FREEPG_V1(free_page2);
 	pSdio_free_space->extra_queue_number = (u16)BIT_GET_EXQ_FREEPG_V1(free_page3);
-	pSdio_free_space->ac_oqt_number = (u8)((free_page3 >> 16) & 0xFF);
-	pSdio_free_space->non_ac_oqt_number = (u8)((free_page3 >> 24) & 0xFF);
+	pSdio_free_space->ac_oqt_number = (u8)BIT_GET_AC_OQT_FREEPG_V1(free_page3);
+	pSdio_free_space->non_ac_oqt_number = (u8)BIT_GET_NOAC_OQT_FREEPG_V1(free_page3);
 
 	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_update_sdio_free_page_88xx <==========\n");
 
@@ -2803,19 +2753,32 @@ halmac_update_oqt_free_space_88xx(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
 	PHALMAC_SDIO_FREE_SPACE pSdio_free_space;
+	u8 value;
+	u32 oqt_free_page;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_update_oqt_free_space_88xx ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "halmac_update_oqt_free_space_88xx ==========>\n");
 
-	pSdio_free_space = &(pHalmac_adapter->sdio_free_space);
+	pSdio_free_space = &pHalmac_adapter->sdio_free_space;
 
-	pSdio_free_space->ac_oqt_number = HALMAC_REG_READ_8(pHalmac_adapter, REG_SDIO_OQT_FREE_TXPG_V1 + 2);
-	/* pSdio_free_space->non_ac_oqt_number = (u8)BIT_GET_NOAC_OQT_FREEPG_V1(oqt_free_page); */
-	pSdio_free_space->ac_empty = HALMAC_REG_READ_8(pHalmac_adapter, REG_TXPKT_EMPTY);
+	oqt_free_page = HALMAC_REG_READ_32(pHalmac_adapter, REG_SDIO_OQT_FREE_TXPG_V1);
+	pSdio_free_space->ac_oqt_number = (u8)BIT_GET_AC_OQT_FREEPG_V1(oqt_free_page);
+	pSdio_free_space->non_ac_oqt_number = (u8)BIT_GET_NOAC_OQT_FREEPG_V1(oqt_free_page);
+	pSdio_free_space->ac_empty = 0;
+	if (pSdio_free_space->ac_oqt_number == HALMAC_OQT_ENTRY_AC_88XX) {
+		value = HALMAC_REG_READ_8(pHalmac_adapter, REG_TXPKT_EMPTY);
+		while (value > 0) {
+			value = value & (value - 1);
+			pSdio_free_space->ac_empty++;
+		};
+	} else {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "pSdio_free_space->ac_oqt_number %d != %d\n",
+			pSdio_free_space->ac_oqt_number, HALMAC_OQT_ENTRY_AC_88XX);
+	}
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_update_oqt_free_space_88xx <==========\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "halmac_update_oqt_free_space_88xx <==========\n");
 
 	return HALMAC_RET_SUCCESS;
 }
@@ -2834,21 +2797,21 @@ halmac_transition_efuse_state_88xx(
 	IN HALMAC_EFUSE_CMD_CONSTRUCT_STATE dest_state
 )
 {
-	PHALMAC_EFUSE_STATE_SET pEfuse_state = &(pHalmac_adapter->halmac_state.efuse_state_set);
+	PHALMAC_EFUSE_STATE_SET pEfuse_state = &pHalmac_adapter->halmac_state.efuse_state_set;
 
-	if ((HALMAC_EFUSE_CMD_CONSTRUCT_IDLE != pEfuse_state->efuse_cmd_construct_state)
-	    && (HALMAC_EFUSE_CMD_CONSTRUCT_BUSY != pEfuse_state->efuse_cmd_construct_state)
-	    && (HALMAC_EFUSE_CMD_CONSTRUCT_H2C_SENT != pEfuse_state->efuse_cmd_construct_state))
+	if ((pEfuse_state->efuse_cmd_construct_state != HALMAC_EFUSE_CMD_CONSTRUCT_IDLE)
+	    && (pEfuse_state->efuse_cmd_construct_state != HALMAC_EFUSE_CMD_CONSTRUCT_BUSY)
+	    && (pEfuse_state->efuse_cmd_construct_state != HALMAC_EFUSE_CMD_CONSTRUCT_H2C_SENT))
 		return HALMAC_RET_ERROR_STATE;
 
 	if (pEfuse_state->efuse_cmd_construct_state == dest_state)
 		return HALMAC_RET_ERROR_STATE;
 
-	if (HALMAC_EFUSE_CMD_CONSTRUCT_BUSY == dest_state) {
-		if (HALMAC_EFUSE_CMD_CONSTRUCT_H2C_SENT == pEfuse_state->efuse_cmd_construct_state)
+	if (dest_state == HALMAC_EFUSE_CMD_CONSTRUCT_BUSY) {
+		if (pEfuse_state->efuse_cmd_construct_state == HALMAC_EFUSE_CMD_CONSTRUCT_H2C_SENT)
 			return HALMAC_RET_ERROR_STATE;
-	} else if (HALMAC_EFUSE_CMD_CONSTRUCT_H2C_SENT == dest_state) {
-		if (HALMAC_EFUSE_CMD_CONSTRUCT_IDLE == pEfuse_state->efuse_cmd_construct_state)
+	} else if (dest_state == HALMAC_EFUSE_CMD_CONSTRUCT_H2C_SENT) {
+		if (pEfuse_state->efuse_cmd_construct_state == HALMAC_EFUSE_CMD_CONSTRUCT_IDLE)
 			return HALMAC_RET_ERROR_STATE;
 	}
 
@@ -2871,22 +2834,22 @@ halmac_transition_cfg_para_state_88xx(
 	IN HALMAC_CFG_PARA_CMD_CONSTRUCT_STATE dest_state
 )
 {
-	PHALMAC_CFG_PARA_STATE_SET pCfg_para = &(pHalmac_adapter->halmac_state.cfg_para_state_set);
+	PHALMAC_CFG_PARA_STATE_SET pCfg_para = &pHalmac_adapter->halmac_state.cfg_para_state_set;
 
-	if ((HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE != pCfg_para->cfg_para_cmd_construct_state) &&
-	    (HALMAC_CFG_PARA_CMD_CONSTRUCT_CONSTRUCTING != pCfg_para->cfg_para_cmd_construct_state) &&
-	    (HALMAC_CFG_PARA_CMD_CONSTRUCT_H2C_SENT != pCfg_para->cfg_para_cmd_construct_state))
+	if ((pCfg_para->cfg_para_cmd_construct_state != HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE) &&
+	    (pCfg_para->cfg_para_cmd_construct_state != HALMAC_CFG_PARA_CMD_CONSTRUCT_CONSTRUCTING) &&
+	    (pCfg_para->cfg_para_cmd_construct_state != HALMAC_CFG_PARA_CMD_CONSTRUCT_H2C_SENT))
 		return HALMAC_RET_ERROR_STATE;
 
-	if (HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE == dest_state) {
-		if (HALMAC_CFG_PARA_CMD_CONSTRUCT_CONSTRUCTING == pCfg_para->cfg_para_cmd_construct_state)
+	if (dest_state == HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE) {
+		if (pCfg_para->cfg_para_cmd_construct_state == HALMAC_CFG_PARA_CMD_CONSTRUCT_CONSTRUCTING)
 			return HALMAC_RET_ERROR_STATE;
-	} else if (HALMAC_CFG_PARA_CMD_CONSTRUCT_CONSTRUCTING == dest_state) {
-		if (HALMAC_CFG_PARA_CMD_CONSTRUCT_H2C_SENT == pCfg_para->cfg_para_cmd_construct_state)
+	} else if (dest_state == HALMAC_CFG_PARA_CMD_CONSTRUCT_CONSTRUCTING) {
+		if (pCfg_para->cfg_para_cmd_construct_state == HALMAC_CFG_PARA_CMD_CONSTRUCT_H2C_SENT)
 			return HALMAC_RET_ERROR_STATE;
-	} else if (HALMAC_CFG_PARA_CMD_CONSTRUCT_H2C_SENT == dest_state) {
-		if ((HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE == pCfg_para->cfg_para_cmd_construct_state)
-		    || (HALMAC_CFG_PARA_CMD_CONSTRUCT_H2C_SENT == pCfg_para->cfg_para_cmd_construct_state))
+	} else if (dest_state == HALMAC_CFG_PARA_CMD_CONSTRUCT_H2C_SENT) {
+		if ((pCfg_para->cfg_para_cmd_construct_state == HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE)
+		    || (pCfg_para->cfg_para_cmd_construct_state == HALMAC_CFG_PARA_CMD_CONSTRUCT_H2C_SENT))
 			return HALMAC_RET_ERROR_STATE;
 	}
 
@@ -2909,25 +2872,25 @@ halmac_transition_scan_state_88xx(
 	IN HALMAC_SCAN_CMD_CONSTRUCT_STATE dest_state
 )
 {
-	PHALMAC_SCAN_STATE_SET pScan = &(pHalmac_adapter->halmac_state.scan_state_set);
+	PHALMAC_SCAN_STATE_SET pScan = &pHalmac_adapter->halmac_state.scan_state_set;
 
-	if ((pScan->scan_cmd_construct_state > HALMAC_SCAN_CMD_CONSTRUCT_H2C_SENT) || (pScan->scan_cmd_construct_state < HALMAC_SCAN_CMD_CONSTRUCT_IDLE))
+	if (pScan->scan_cmd_construct_state > HALMAC_SCAN_CMD_CONSTRUCT_H2C_SENT)
 		return HALMAC_RET_ERROR_STATE;
 
-	if (HALMAC_SCAN_CMD_CONSTRUCT_IDLE == dest_state) {
-		if ((HALMAC_SCAN_CMD_CONSTRUCT_BUFFER_CLEARED == pScan->scan_cmd_construct_state) ||
-		    (HALMAC_SCAN_CMD_CONSTRUCT_CONSTRUCTING == pScan->scan_cmd_construct_state))
+	if (dest_state == HALMAC_SCAN_CMD_CONSTRUCT_IDLE) {
+		if ((pScan->scan_cmd_construct_state == HALMAC_SCAN_CMD_CONSTRUCT_BUFFER_CLEARED) ||
+		    (pScan->scan_cmd_construct_state == HALMAC_SCAN_CMD_CONSTRUCT_CONSTRUCTING))
 			return HALMAC_RET_ERROR_STATE;
-	} else if (HALMAC_SCAN_CMD_CONSTRUCT_BUFFER_CLEARED == dest_state) {
-		if (HALMAC_SCAN_CMD_CONSTRUCT_H2C_SENT == pScan->scan_cmd_construct_state)
+	} else if (dest_state == HALMAC_SCAN_CMD_CONSTRUCT_BUFFER_CLEARED) {
+		if (pScan->scan_cmd_construct_state == HALMAC_SCAN_CMD_CONSTRUCT_H2C_SENT)
 			return HALMAC_RET_ERROR_STATE;
-	} else if (HALMAC_SCAN_CMD_CONSTRUCT_CONSTRUCTING == dest_state) {
-		if ((HALMAC_SCAN_CMD_CONSTRUCT_IDLE == pScan->scan_cmd_construct_state) ||
-		    (HALMAC_SCAN_CMD_CONSTRUCT_H2C_SENT == pScan->scan_cmd_construct_state))
+	} else if (dest_state == HALMAC_SCAN_CMD_CONSTRUCT_CONSTRUCTING) {
+		if ((pScan->scan_cmd_construct_state == HALMAC_SCAN_CMD_CONSTRUCT_IDLE) ||
+		    (pScan->scan_cmd_construct_state == HALMAC_SCAN_CMD_CONSTRUCT_H2C_SENT))
 			return HALMAC_RET_ERROR_STATE;
-	} else if (HALMAC_SCAN_CMD_CONSTRUCT_H2C_SENT == dest_state) {
-		if ((HALMAC_SCAN_CMD_CONSTRUCT_CONSTRUCTING != pScan->scan_cmd_construct_state) &&
-		    (HALMAC_SCAN_CMD_CONSTRUCT_BUFFER_CLEARED != pScan->scan_cmd_construct_state))
+	} else if (dest_state == HALMAC_SCAN_CMD_CONSTRUCT_H2C_SENT) {
+		if ((pScan->scan_cmd_construct_state != HALMAC_SCAN_CMD_CONSTRUCT_CONSTRUCTING) &&
+		    (pScan->scan_cmd_construct_state != HALMAC_SCAN_CMD_CONSTRUCT_BUFFER_CLEARED))
 			return HALMAC_RET_ERROR_STATE;
 	}
 
@@ -2944,7 +2907,7 @@ halmac_query_cfg_para_status_88xx(
 	INOUT u32 *size
 )
 {
-	PHALMAC_CFG_PARA_STATE_SET pCfg_para_state_set = &(pHalmac_adapter->halmac_state.cfg_para_state_set);
+	PHALMAC_CFG_PARA_STATE_SET pCfg_para_state_set = &pHalmac_adapter->halmac_state.cfg_para_state_set;
 
 	*pProcess_status = pCfg_para_state_set->process_status;
 
@@ -2960,19 +2923,19 @@ halmac_query_dump_physical_efuse_status_88xx(
 )
 {
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_EFUSE_STATE_SET pEfuse_state_set = &(pHalmac_adapter->halmac_state.efuse_state_set);
+	PHALMAC_EFUSE_STATE_SET pEfuse_state_set = &pHalmac_adapter->halmac_state.efuse_state_set;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	*pProcess_status = pEfuse_state_set->process_status;
 
-	if (NULL == data)
+	if (data == NULL)
 		return HALMAC_RET_NULL_POINTER;
 
-	if (NULL == size)
+	if (size == NULL)
 		return HALMAC_RET_NULL_POINTER;
 
-	if (HALMAC_CMD_PROCESS_DONE == *pProcess_status) {
+	if (*pProcess_status == HALMAC_CMD_PROCESS_DONE) {
 		if (*size < pHalmac_adapter->hw_config_info.efuse_size) {
 			*size = pHalmac_adapter->hw_config_info.efuse_size;
 			return HALMAC_RET_BUFFER_TOO_SMALL;
@@ -2996,38 +2959,42 @@ halmac_query_dump_logical_efuse_status_88xx(
 	u8 *pEeprom_map = NULL;
 	u32 eeprom_size = pHalmac_adapter->hw_config_info.eeprom_size;
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_EFUSE_STATE_SET pEfuse_state_set = &(pHalmac_adapter->halmac_state.efuse_state_set);
+	PHALMAC_EFUSE_STATE_SET pEfuse_state_set = &pHalmac_adapter->halmac_state.efuse_state_set;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	*pProcess_status = pEfuse_state_set->process_status;
 
-	pEeprom_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, eeprom_size);
-	if (NULL == pEeprom_map) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac allocate local eeprom map Fail!!\n");
-		return HALMAC_RET_MALLOC_FAIL;
-	}
-	PLATFORM_RTL_MEMSET(pDriver_adapter, pEeprom_map, 0xFF, eeprom_size);
-
-	if (NULL == data)
+	if (data == NULL)
 		return HALMAC_RET_NULL_POINTER;
 
-	if (NULL == size)
+	if (size == NULL)
 		return HALMAC_RET_NULL_POINTER;
 
-	if (HALMAC_CMD_PROCESS_DONE == *pProcess_status) {
+	if (*pProcess_status == HALMAC_CMD_PROCESS_DONE) {
 		if (*size < eeprom_size) {
 			*size = eeprom_size;
 			return HALMAC_RET_BUFFER_TOO_SMALL;
 		}
 
 		*size = eeprom_size;
-		if (HALMAC_RET_SUCCESS != halmac_eeprom_parser_88xx(pHalmac_adapter, pHalmac_adapter->pHalEfuse_map, pEeprom_map))
+
+		pEeprom_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, eeprom_size);
+		if (pEeprom_map == NULL) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac allocate local eeprom map Fail!!\n");
+			return HALMAC_RET_MALLOC_FAIL;
+		}
+		PLATFORM_RTL_MEMSET(pDriver_adapter, pEeprom_map, 0xFF, eeprom_size);
+
+		if (halmac_eeprom_parser_88xx(pHalmac_adapter, pHalmac_adapter->pHalEfuse_map, pEeprom_map) != HALMAC_RET_SUCCESS) {
+			PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
 			return HALMAC_RET_EEPROM_PARSING_FAIL;
+		}
+
 		PLATFORM_RTL_MEMCPY(pDriver_adapter, data, pEeprom_map, *size);
-	}
 
-	PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
+		PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
+	}
 
 	return HALMAC_RET_SUCCESS;
 }
@@ -3040,7 +3007,7 @@ halmac_query_channel_switch_status_88xx(
 	INOUT u32 *size
 )
 {
-	PHALMAC_SCAN_STATE_SET pScan_state_set = &(pHalmac_adapter->halmac_state.scan_state_set);
+	PHALMAC_SCAN_STATE_SET pScan_state_set = &pHalmac_adapter->halmac_state.scan_state_set;
 
 	*pProcess_status = pScan_state_set->process_status;
 
@@ -3055,7 +3022,7 @@ halmac_query_update_packet_status_88xx(
 	INOUT u32 *size
 )
 {
-	PHALMAC_UPDATE_PACKET_STATE_SET pUpdate_packet_set = &(pHalmac_adapter->halmac_state.update_packet_set);
+	PHALMAC_UPDATE_PACKET_STATE_SET pUpdate_packet_set = &pHalmac_adapter->halmac_state.update_packet_set;
 
 	*pProcess_status = pUpdate_packet_set->process_status;
 
@@ -3070,7 +3037,7 @@ halmac_query_iqk_status_88xx(
 	INOUT u32 *size
 )
 {
-	PHALMAC_IQK_STATE_SET pIqk_set = &(pHalmac_adapter->halmac_state.iqk_set);
+	PHALMAC_IQK_STATE_SET pIqk_set = &pHalmac_adapter->halmac_state.iqk_set;
 
 	*pProcess_status = pIqk_set->process_status;
 
@@ -3085,7 +3052,7 @@ halmac_query_power_tracking_status_88xx(
 	INOUT u32 *size
 )
 {
-	PHALMAC_POWER_TRACKING_STATE_SET pPower_tracking_state_set = &(pHalmac_adapter->halmac_state.power_tracking_set);;
+	PHALMAC_POWER_TRACKING_STATE_SET pPower_tracking_state_set = &pHalmac_adapter->halmac_state.power_tracking_set;
 
 	*pProcess_status = pPower_tracking_state_set->process_status;
 
@@ -3101,19 +3068,19 @@ halmac_query_psd_status_88xx(
 )
 {
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_PSD_STATE_SET pPsd_set = &(pHalmac_adapter->halmac_state.psd_set);
+	PHALMAC_PSD_STATE_SET pPsd_set = &pHalmac_adapter->halmac_state.psd_set;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	*pProcess_status = pPsd_set->process_status;
 
-	if (NULL == data)
+	if (data == NULL)
 		return HALMAC_RET_NULL_POINTER;
 
-	if (NULL == size)
+	if (size == NULL)
 		return HALMAC_RET_NULL_POINTER;
 
-	if (HALMAC_CMD_PROCESS_DONE == *pProcess_status) {
+	if (*pProcess_status == HALMAC_CMD_PROCESS_DONE) {
 		if (*size < pPsd_set->data_size) {
 			*size = pPsd_set->data_size;
 			return HALMAC_RET_BUFFER_TOO_SMALL;
@@ -3139,12 +3106,12 @@ halmac_verify_io_88xx(
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
-	if (HALMAC_INTERFACE_SDIO == pHalmac_adapter->halmac_interface) {
+	if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_SDIO) {
 		halmac_offset = REG_PAGE5_DUMMY;
 		if (0 == (halmac_offset & 0xFFFF0000))
 			halmac_offset |= WLAN_IOREG_OFFSET;
 
-		halmac_convert_to_sdio_bus_offset_88xx(pHalmac_adapter, &halmac_offset);
+		ret_status = halmac_convert_to_sdio_bus_offset_88xx(pHalmac_adapter, &halmac_offset);
 
 		/* Verify CMD52 R/W */
 		wvalue8 = 0xab;
@@ -3167,7 +3134,7 @@ halmac_verify_io_88xx(
 
 		value32 = PLATFORM_SDIO_CMD53_READ_32(pDriver_adapter, halmac_offset);
 
-		if (0xddccbbaa != value32) {
+		if (value32 != 0xddccbbaa) {
 			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "cmd53 r fail : read = %X\n");
 			ret_status = HALMAC_RET_PLATFORM_API_INCORRECT;
 		} else {
@@ -3224,23 +3191,14 @@ halmac_verify_send_rsvd_page_88xx(
 	u32 i;
 	u32 h2c_pkt_verify_size = 64, h2c_pkt_verify_payload = 0xab;
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api;
 	HALMAC_RET_STATUS ret_status = HALMAC_RET_SUCCESS;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	rsvd_buf = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, h2c_pkt_verify_size);
 
-	if (NULL == rsvd_buf) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "rsvd buffer malloc fail!!\n");
-		return HALMAC_RET_MALLOC_FAIL;
-	}
-
-	rsvd_page = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, h2c_pkt_verify_size + pHalmac_adapter->hw_config_info.txdesc_size);
-
-	if (NULL == rsvd_page) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "rsvd page malloc fail!!\n");
+	if (rsvd_buf == NULL) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[ERR]rsvd buffer malloc fail!!\n");
 		return HALMAC_RET_MALLOC_FAIL;
 	}
 
@@ -3248,27 +3206,38 @@ halmac_verify_send_rsvd_page_88xx(
 
 	ret_status = halmac_download_rsvd_page_88xx(pHalmac_adapter, rsvd_buf, h2c_pkt_verify_size);
 
-	if (HALMAC_RET_SUCCESS != ret_status)
+	if (ret_status != HALMAC_RET_SUCCESS) {
+		PLATFORM_RTL_FREE(pDriver_adapter, rsvd_buf, h2c_pkt_verify_size);
 		return ret_status;
+	}
+
+	rsvd_page = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, h2c_pkt_verify_size + pHalmac_adapter->hw_config_info.txdesc_size);
+
+	if (rsvd_page == NULL) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[ERR]rsvd page malloc fail!!\n");
+		PLATFORM_RTL_FREE(pDriver_adapter, rsvd_buf, h2c_pkt_verify_size);
+		return HALMAC_RET_MALLOC_FAIL;
+	}
 
 	PLATFORM_RTL_MEMSET(pDriver_adapter, rsvd_page, 0x00, h2c_pkt_verify_size + pHalmac_adapter->hw_config_info.txdesc_size);
 
 	ret_status = halmac_dump_fifo_88xx(pHalmac_adapter, HAL_FIFO_SEL_RSVD_PAGE, 0, h2c_pkt_verify_size + pHalmac_adapter->hw_config_info.txdesc_size, rsvd_page);
 
-	if (HALMAC_RET_SUCCESS != ret_status)
+	if (ret_status != HALMAC_RET_SUCCESS) {
+		PLATFORM_RTL_FREE(pDriver_adapter, rsvd_buf, h2c_pkt_verify_size);
+		PLATFORM_RTL_FREE(pDriver_adapter, rsvd_page, h2c_pkt_verify_size + pHalmac_adapter->hw_config_info.txdesc_size);
 		return ret_status;
+	}
 
 	for (i = 0; i < h2c_pkt_verify_size; i++) {
 		if (*(rsvd_buf + i) != *(rsvd_page + (i + pHalmac_adapter->hw_config_info.txdesc_size))) {
-			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "Compare RSVD page Fail\n");
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[ERR]Compare RSVD page Fail\n");
 			ret_status = HALMAC_RET_PLATFORM_API_INCORRECT;
 		}
 	}
 
 	PLATFORM_RTL_FREE(pDriver_adapter, rsvd_buf, h2c_pkt_verify_size);
 	PLATFORM_RTL_FREE(pDriver_adapter, rsvd_page, h2c_pkt_verify_size + pHalmac_adapter->hw_config_info.txdesc_size);
-	rsvd_buf = NULL;
-	rsvd_page = NULL;
 
 	return ret_status;
 }
@@ -3302,20 +3271,24 @@ halmac_buffer_read_88xx(
 
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	if (HAL_FIFO_SEL_RSVD_PAGE == halmac_fifo_sel)
-		offset = offset + (pHalmac_adapter->txff_allocation.rsvd_pg_bndy << 7);
+	if (halmac_fifo_sel == HAL_FIFO_SEL_RSVD_PAGE)
+		offset = offset + (pHalmac_adapter->txff_allocation.rsvd_pg_bndy << HALMAC_TX_PAGE_SIZE_2_POWER_88XX);
 
 	start_page = offset >> 12;
 	residue = offset & (4096 - 1);
 
-	if ((HAL_FIFO_SEL_TX == halmac_fifo_sel) || (HAL_FIFO_SEL_RSVD_PAGE == halmac_fifo_sel))
+	if ((halmac_fifo_sel == HAL_FIFO_SEL_TX) || (halmac_fifo_sel == HAL_FIFO_SEL_RSVD_PAGE))
 		start_page += 0x780;
-	else if (HAL_FIFO_SEL_RX == halmac_fifo_sel)
+	else if (halmac_fifo_sel == HAL_FIFO_SEL_RX)
 		start_page += 0x700;
-	else if (HAL_FIFO_SEL_REPORT == halmac_fifo_sel)
+	else if (halmac_fifo_sel == HAL_FIFO_SEL_REPORT)
 		start_page += 0x660;
-	else if (HAL_FIFO_SEL_LLT == halmac_fifo_sel)
+	else if (halmac_fifo_sel == HAL_FIFO_SEL_LLT)
 		start_page += 0x650;
+	else if (halmac_fifo_sel == HAL_FIFO_SEL_RXBUF_FW)
+		start_page += 0x680;
+	else
+		return HALMAC_RET_NOT_SUPPORT;
 
 	value_read = HALMAC_REG_READ_16(pHalmac_adapter, REG_PKTBUF_DBG_CTRL);
 
@@ -3361,38 +3334,17 @@ halmac_restore_mac_register_88xx(
 		mac_value = pCurr_restore_info->value;
 		value_length = pCurr_restore_info->length;
 
-		if (1 == value_length)
+		if (value_length == 1)
 			HALMAC_REG_WRITE_8(pHalmac_adapter, mac_register, (u8)mac_value);
-		else if (2 == value_length)
+		else if (value_length == 2)
 			HALMAC_REG_WRITE_16(pHalmac_adapter, mac_register, (u16)mac_value);
-		else if (4 == value_length)
+		else if (value_length == 4)
 			HALMAC_REG_WRITE_32(pHalmac_adapter, mac_register, mac_value);
 
 		pCurr_restore_info++;
 	}
 }
 
-VOID
-halmac_api_record_id_88xx(
-	IN PHALMAC_ADAPTER pHalmac_adapter,
-	IN HALMAC_API_ID api_id
-)
-{
-	u8 array_wptr_last;
-
-	array_wptr_last = pHalmac_adapter->api_record.array_wptr;
-
-	if (array_wptr_last == API_ARRAY_SIZE - 1)
-		array_wptr_last = 0;
-	else if (HALMAC_API_STUFF == pHalmac_adapter->api_record.api_array[0])
-		array_wptr_last = array_wptr_last;
-	else
-		array_wptr_last = array_wptr_last + 1;
-
-	pHalmac_adapter->api_record.api_array[array_wptr_last] = api_id;
-	pHalmac_adapter->api_record.array_wptr = array_wptr_last;
-}
-
 HALMAC_RET_STATUS
 halmac_set_usb_mode_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
@@ -3423,7 +3375,7 @@ halmac_set_usb_mode_88xx(
 
 	usb_temp &= ~(BIT_USB23_SW_MODE_V1(0x3));
 
-	if (HALMAC_USB_MODE_U2 == usb_mode) {
+	if (usb_mode == HALMAC_USB_MODE_U2) {
 		/* usb3 to usb2 */
 		HALMAC_REG_WRITE_32(pHalmac_adapter, REG_PAD_CTRL2, usb_temp | BIT_USB23_SW_MODE_V1(HALMAC_USB_MODE_U2) | BIT_RSM_EN_V1);
 	} else {
@@ -3451,7 +3403,7 @@ halmac_enable_bb_rf_88xx(
 
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	if (1 == enable) {
+	if (enable == 1) {
 		value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_SYS_FUNC_EN);
 		value8 = value8 | BIT(0) | BIT(1);
 		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SYS_FUNC_EN, value8);
@@ -3484,26 +3436,42 @@ halmac_config_sdio_tx_page_threshold_88xx(
 	IN PHALMAC_TX_PAGE_THRESHOLD_INFO pThreshold_info
 )
 {
+	VOID *pDriver_adapter = NULL;
 	PHALMAC_API pHalmac_api;
+	u32 threshold = pThreshold_info->threshold;
 
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]halmac_config_sdio_tx_page_threshold_88xx ==========>\n");
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]queue %d, threshold 0x%X\n", pThreshold_info->dma_queue_sel, threshold);
+
+	if (pThreshold_info->enable == 1) {
+		threshold = BIT(31) | threshold;
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]enable\n");
+	} else {
+		threshold = ~(BIT(31)) & threshold;
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]disable\n");
+	}
+
 	switch (pThreshold_info->dma_queue_sel) {
 	case HALMAC_MAP2_HQ:
-			HALMAC_REG_WRITE_32(pHalmac_adapter, REG_TQPNT1, pThreshold_info->threshold);
+			HALMAC_REG_WRITE_32(pHalmac_adapter, REG_TQPNT1, threshold);
 		break;
 	case HALMAC_MAP2_NQ:
-			HALMAC_REG_WRITE_32(pHalmac_adapter, REG_TQPNT2, pThreshold_info->threshold);
+			HALMAC_REG_WRITE_32(pHalmac_adapter, REG_TQPNT2, threshold);
 		break;
 	case HALMAC_MAP2_LQ:
-			HALMAC_REG_WRITE_32(pHalmac_adapter, REG_TQPNT3, pThreshold_info->threshold);
+			HALMAC_REG_WRITE_32(pHalmac_adapter, REG_TQPNT3, threshold);
 		break;
 	case HALMAC_MAP2_EXQ:
-			HALMAC_REG_WRITE_32(pHalmac_adapter, REG_TQPNT4, pThreshold_info->threshold);
+			HALMAC_REG_WRITE_32(pHalmac_adapter, REG_TQPNT4, threshold);
 		break;
 	default:
 		break;
 	}
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]halmac_config_sdio_tx_page_threshold_88xx <==========\n");
 }
 
 VOID
@@ -3517,16 +3485,37 @@ halmac_config_ampdu_88xx(
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PROT_MODE_CTRL + 2, pAmpdu_config->max_agg_num);
-};
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PROT_MODE_CTRL + 3, pAmpdu_config->max_agg_num);
+}
+
+VOID
+halmac_rx_shift_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 enable
+)
+{
+	PHALMAC_API pHalmac_api;
+
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+
+	if (enable == 1)
+		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_TXDMA_PQ_MAP, HALMAC_REG_READ_8(pHalmac_adapter, REG_TXDMA_PQ_MAP) | BIT(1));
+	else
+		HALMAC_REG_WRITE_8(pHalmac_adapter, REG_TXDMA_PQ_MAP, HALMAC_REG_READ_8(pHalmac_adapter, REG_TXDMA_PQ_MAP) & ~(BIT(1)));
+}
 
 HALMAC_RET_STATUS
 halmac_check_oqt_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u32 tx_agg_num,
-	IN u8 *pHalmac_buf
+	IN u8 *pHalmac_buf,
+	IN u8 macid_counter
 )
 {
 	u32 counter = 10;
+	VOID *pDriver_adapter = NULL;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 
 	/*S0, S1 are not allowed to use, 0x4E4[0] should be 0. Soar 20160323*/
 	/*no need to check non_ac_oqt_number. HI and MGQ blocked will cause protocal issue before H_OQT being full*/
@@ -3539,14 +3528,17 @@ halmac_check_oqt_88xx(
 	case HALMAC_QUEUE_SELECT_BE_V2:
 	case HALMAC_QUEUE_SELECT_BK:
 	case HALMAC_QUEUE_SELECT_BK_V2:
+		if (tx_agg_num > HALMAC_OQT_ENTRY_AC_88XX)
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_WARN, "tx_agg_num %d > HALMAC_OQT_ENTRY_AC_88XX %d\n", tx_agg_num, HALMAC_OQT_ENTRY_AC_88XX);
 		counter = 10;
 		do {
-			if (pHalmac_adapter->sdio_free_space.ac_empty > 0) {
-				pHalmac_adapter->sdio_free_space.ac_empty -= 1;
+			if (pHalmac_adapter->sdio_free_space.ac_empty >= macid_counter) {
+				pHalmac_adapter->sdio_free_space.ac_empty -= macid_counter;
 				break;
 			}
 
 			if (pHalmac_adapter->sdio_free_space.ac_oqt_number >= tx_agg_num) {
+				pHalmac_adapter->sdio_free_space.ac_empty = 0;
 				pHalmac_adapter->sdio_free_space.ac_oqt_number -= (u8)tx_agg_num;
 				break;
 			}
@@ -3554,7 +3546,25 @@ halmac_check_oqt_88xx(
 			halmac_update_oqt_free_space_88xx(pHalmac_adapter);
 
 			counter--;
-			if (0 == counter)
+			if (counter == 0)
+				return HALMAC_RET_OQT_NOT_ENOUGH;
+		} while (1);
+		break;
+	case HALMAC_QUEUE_SELECT_MGNT:
+	case HALMAC_QUEUE_SELECT_HIGH:
+		if (tx_agg_num > HALMAC_OQT_ENTRY_NOAC_88XX)
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_WARN, "tx_agg_num %d > HALMAC_OQT_ENTRY_NOAC_88XX %d\n", tx_agg_num, HALMAC_OQT_ENTRY_NOAC_88XX);
+		counter = 10;
+		do {
+			if (pHalmac_adapter->sdio_free_space.non_ac_oqt_number >= tx_agg_num) {
+				pHalmac_adapter->sdio_free_space.non_ac_oqt_number -= (u8)tx_agg_num;
+				break;
+			}
+
+			halmac_update_oqt_free_space_88xx(pHalmac_adapter);
+
+			counter--;
+			if (counter == 0)
 				return HALMAC_RET_OQT_NOT_ENOUGH;
 		} while (1);
 		break;
@@ -3575,10 +3585,8 @@ halmac_rqpn_parser_88xx(
 	u8 search_flag;
 	u32 i;
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	search_flag = 0;
 	for (i = 0; i < HALMAC_TRX_MODE_MAX; i++) {
@@ -3595,7 +3603,7 @@ halmac_rqpn_parser_88xx(
 		}
 	}
 
-	if (0 == search_flag) {
+	if (search_flag == 0) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "HALMAC_RET_TRX_MODE_NOT_SUPPORT 1 switch case not support\n");
 		return HALMAC_RET_TRX_MODE_NOT_SUPPORT;
 	}
@@ -3615,10 +3623,8 @@ halmac_pg_num_parser_88xx(
 	u16 EXPQ_num = 0, PUBQ_num = 0;
 	u32 i = 0;
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	search_flag = 0;
 	for (i = 0; i < HALMAC_TRX_MODE_MAX; i++) {
@@ -3635,7 +3641,7 @@ halmac_pg_num_parser_88xx(
 		}
 	}
 
-	if (0 == search_flag) {
+	if (search_flag == 0) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "HALMAC_RET_TRX_MODE_NOT_SUPPORT 1 switch case not support\n");
 		return HALMAC_RET_TRX_MODE_NOT_SUPPORT;
 	}
@@ -3662,12 +3668,15 @@ halmac_parse_intf_phy_88xx(
 {
 	u16 value;
 	u16 curr_cut;
-	u32 offset;
+	u16 offset;
+	u16 ip_sel;
 	PHALMAC_INTF_PHY_PARA pCurr_phy_para;
+	PHALMAC_API pHalmac_api;
 	VOID *pDriver_adapter = NULL;
 	u8 result = HALMAC_RET_SUCCESS;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	switch (pHalmac_adapter->chip_version) {
 	case HALMAC_CHIP_VER_A_CUT:
@@ -3701,28 +3710,45 @@ halmac_parse_intf_phy_88xx(
 		if ((pCurr_phy_para->cut & curr_cut) && (pCurr_phy_para->plaform & (u16)platform)) {
 			offset =  pCurr_phy_para->offset;
 			value = pCurr_phy_para->value;
+			ip_sel = pCurr_phy_para->ip_sel;
 
-			if (0xFFFF == offset)
+			if (offset == 0xFFFF)
 				break;
 
-			if (HAL_INTF_PHY_USB2 == intf_phy) {
-			} else if (HAL_INTF_PHY_USB3 == intf_phy) {
-			} else if (HAL_INTF_PHY_PCIE_GEN1 == intf_phy) {
+			if (ip_sel == HALMAC_IP_SEL_MAC) {
+				HALMAC_REG_WRITE_8(pHalmac_adapter, (u32)offset, (u8)value);
+			} else if (intf_phy == HAL_INTF_PHY_USB2) {
+				result = halmac_usbphy_write_88xx(pHalmac_adapter, (u8)offset, value, HAL_INTF_PHY_USB2);
 
-				result = halmac_mdio_write_88xx(pHalmac_adapter, (u8)offset, value, HAL_INTF_PHY_PCIE_GEN1);
+				if (result != HALMAC_RET_SUCCESS)
+					PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_USB, HALMAC_DBG_ERR, "[ERR]Write USB2PHY fail!\n");
 
-				if (HALMAC_RET_SUCCESS != result)
-					PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_MDIO, HALMAC_DBG_ERR, "MDIO write GEN1 fail!\n");
+			} else if (intf_phy == HAL_INTF_PHY_USB3) {
+				result = halmac_usbphy_write_88xx(pHalmac_adapter, (u8)offset, value, HAL_INTF_PHY_USB3);
 
-			} else if (HAL_INTF_PHY_PCIE_GEN2 == intf_phy) {
+				if (result != HALMAC_RET_SUCCESS)
+					PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_USB, HALMAC_DBG_ERR, "[ERR]Write USB3PHY fail!\n");
 
-				result = halmac_mdio_write_88xx(pHalmac_adapter, (u8)offset, value, HAL_INTF_PHY_PCIE_GEN2);
+			} else if (intf_phy == HAL_INTF_PHY_PCIE_GEN1) {
+				if (ip_sel == HALMAC_IP_SEL_INTF_PHY)
+					result = halmac_mdio_write_88xx(pHalmac_adapter, (u8)offset, value, HAL_INTF_PHY_PCIE_GEN1);
+				else
+					result = halmac_dbi_write8_88xx(pHalmac_adapter, offset, (u8)value);
+
+				if (result != HALMAC_RET_SUCCESS)
+					PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_MDIO, HALMAC_DBG_ERR, "[ERR]MDIO write GEN1 fail!\n");
 
-				if (HALMAC_RET_SUCCESS != result)
-					PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_MDIO, HALMAC_DBG_ERR, "MDIO write GEN2 fail!\n");
+			} else if (intf_phy == HAL_INTF_PHY_PCIE_GEN2) {
+				if (ip_sel == HALMAC_IP_SEL_INTF_PHY)
+					result = halmac_mdio_write_88xx(pHalmac_adapter, (u8)offset, value, HAL_INTF_PHY_PCIE_GEN2);
+				else
+					result = halmac_dbi_write8_88xx(pHalmac_adapter, offset, (u8)value);
+
+				if (result != HALMAC_RET_SUCCESS)
+					PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_MDIO, HALMAC_DBG_ERR, "[ERR]MDIO write GEN2 fail!\n");
 			} else {
+				PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_ERR, "[ERR]Parse intf phy cfg error!\n");
 			}
-
 		}
 		pCurr_phy_para++;
 	} while (1);
@@ -3751,7 +3777,7 @@ halmac_dbi_write32_88xx(
 	write_addr = ((addr & 0x0ffc) | (0x000F << 12));
 	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_DBI_FLAG_V1, write_addr);
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_TRACE, "WriteAddr = %x\n", write_addr);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_TRACE, "[TRACE]WriteAddr = %x\n", write_addr);
 
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_DBI_FLAG_V1 + 2, 0x01);
 	tmp_u1b = HALMAC_REG_READ_8(pHalmac_adapter, REG_DBI_FLAG_V1 + 2);
@@ -3764,12 +3790,11 @@ halmac_dbi_write32_88xx(
 	}
 
 	if (tmp_u1b) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_ERR, "DBI write fail!\n");
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_ERR, "[ERR]DBI write fail!\n");
 		return HALMAC_RET_FAIL;
-	} else {
-		return HALMAC_RET_SUCCESS;
 	}
 
+	return HALMAC_RET_SUCCESS;
 }
 
 u32
@@ -3783,7 +3808,7 @@ halmac_dbi_read32_88xx(
 	u32 count = 0;
 	u32 ret = 0;
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api; ;
+	PHALMAC_API pHalmac_api;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
@@ -3803,17 +3828,15 @@ halmac_dbi_read32_88xx(
 
 	if (tmp_u1b) {
 		ret  = 0xFFFF;
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_ERR, "DBI read fail!\n");
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_ERR, "[ERR]DBI read fail!\n");
 	} else {
 		ret = HALMAC_REG_READ_32(pHalmac_adapter, REG_DBI_RDATA_V1);
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_TRACE, "Read Value = %x\n", ret);
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_TRACE, "[TRACE]Read Value = %x\n", ret);
 	}
 
 	return ret;
-
 }
 
-
 HALMAC_RET_STATUS
 halmac_dbi_write8_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
@@ -3826,7 +3849,7 @@ halmac_dbi_write8_88xx(
 	u16 write_addr = 0;
 	u16 remainder = addr & (4 - 1);
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api; ;
+	PHALMAC_API pHalmac_api;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
@@ -3837,7 +3860,7 @@ halmac_dbi_write8_88xx(
 
 	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_DBI_FLAG_V1, write_addr);
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_TRACE, "WriteAddr = %x\n", write_addr);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_TRACE, "[TRACE]WriteAddr = %x\n", write_addr);
 
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_DBI_FLAG_V1 + 2, 0x01);
 
@@ -3846,18 +3869,16 @@ halmac_dbi_write8_88xx(
 	count = 20;
 	while (tmp_u1b && (count != 0)) {
 		PLATFORM_RTL_DELAY_US(pDriver_adapter, 10);
-		tmp_u1b = HALMAC_REG_READ_8(pHalmac_adapter, REG_DBI_FLAG_V1+2);
+		tmp_u1b = HALMAC_REG_READ_8(pHalmac_adapter, REG_DBI_FLAG_V1 + 2);
 		count--;
 	}
 
 	if (tmp_u1b) {
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_ERR, "DBI write fail!\n");
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_ERR, "[ERR]DBI write fail!\n");
 		return HALMAC_RET_FAIL;
-	} else {
-
-		return HALMAC_RET_SUCCESS;
 	}
 
+	return HALMAC_RET_SUCCESS;
 }
 
 u8
@@ -3871,12 +3892,11 @@ halmac_dbi_read8_88xx(
 	u32 count = 0;
 	u8 ret = 0;
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_API pHalmac_api; ;
+	PHALMAC_API pHalmac_api;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-
 	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_DBI_FLAG_V1, read_addr);
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_DBI_FLAG_V1 + 2, 0x2);
 
@@ -3891,17 +3911,15 @@ halmac_dbi_read8_88xx(
 
 	if (tmp_u1b) {
 		ret  = 0xFF;
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_ERR, "DBI read fail!\n");
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_ERR, "[ERR]DBI read fail!\n");
 	} else {
 		ret = HALMAC_REG_READ_8(pHalmac_adapter, REG_DBI_RDATA_V1 + (addr & (4 - 1)));
-		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_TRACE, "Read Value = %x\n", ret);
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_TRACE, "[TRACE]Read Value = %x\n", ret);
 	}
 
 	return ret;
-
 }
 
-
 HALMAC_RET_STATUS
 halmac_mdio_write_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
@@ -3921,47 +3939,26 @@ halmac_mdio_write_88xx(
 
 	HALMAC_REG_WRITE_16(pHalmac_adapter, REG_MDIO_V1, data);
 
-	/* address : 5bit */
 	real_addr = (addr & 0x1F);
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG, real_addr);
 
-	if (HAL_INTF_PHY_PCIE_GEN1 == speed) {
-
-		/* GEN1 page 0 */
-		if (addr < 0x20) {
-
-			/* select MDIO PHY Addr : reg 0x3F8[28:24]=5'b00 */
+	if (speed == HAL_INTF_PHY_PCIE_GEN1) {
+		if (addr < 0x20)
 			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG + 3, 0x00);
-
-		/* GEN1 page 1 */
-		} else {
-
-			/* select MDIO PHY Addr : reg 0x3F8[28:24]=5'b01 */
+		else
 			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG + 3, 0x01);
-		}
-
-	} else if (HAL_INTF_PHY_PCIE_GEN2 == speed) {
-
-		/* GEN2 page 0 */
-		if (addr < 0x20) {
-
-			/* select MDIO PHY Addr : reg 0x3F8[28:24]=5'b10 */
+	} else if (speed == HAL_INTF_PHY_PCIE_GEN2) {
+		if (addr < 0x20)
 			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG + 3, 0x02);
-
-		/* GEN2 page 1 */
-		} else {
-
-			/* select MDIO PHY Addr : reg 0x3F8[28:24]=5'b11 */
+		else
 			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG + 3, 0x03);
-		}
 	} else {
-
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_MDIO, HALMAC_DBG_ERR, "Error Speed !\n");
 	}
 
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG, HALMAC_REG_READ_8(pHalmac_adapter, REG_PCIE_MIX_CFG) | BIT_MDIO_WFLAG_V1);
 
-	tmp_u1b = HALMAC_REG_READ_8(pHalmac_adapter, REG_PCIE_MIX_CFG) & BIT_MDIO_WFLAG_V1 ;
+	tmp_u1b = HALMAC_REG_READ_8(pHalmac_adapter, REG_PCIE_MIX_CFG) & BIT_MDIO_WFLAG_V1;
 	count = 20;
 
 	while (tmp_u1b && (count != 0)) {
@@ -3973,15 +3970,11 @@ halmac_mdio_write_88xx(
 	if (tmp_u1b) {
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_MDIO, HALMAC_DBG_ERR, "MDIO write fail!\n");
 		return HALMAC_RET_FAIL;
-	} else {
-
-		return HALMAC_RET_SUCCESS;
 	}
 
+	return HALMAC_RET_SUCCESS;
 }
 
-
-
 u16
 halmac_mdio_read_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
@@ -4000,50 +3993,29 @@ halmac_mdio_read_88xx(
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
-	/* address : 5bit */
 	real_addr = (addr & 0x1F);
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG, real_addr);
 
-	if (HAL_INTF_PHY_PCIE_GEN1 == speed) {
-		/* GEN1 page 0 */
-		if (addr < 0x20) {
-
-			/* select MDIO PHY Addr : reg 0x3F8[28:24]=5'b00 */
+	if (speed == HAL_INTF_PHY_PCIE_GEN1) {
+		if (addr < 0x20)
 			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG + 3, 0x00);
-
-		/* GEN1 page 1 */
-		} else {
-
-			/* select MDIO PHY Addr : reg 0x3F8[28:24]=5'b01 */
+		else
 			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG + 3, 0x01);
-		}
-
-	} else if (HAL_INTF_PHY_PCIE_GEN2 == speed) {
-
-		/* GEN2 page 0 */
-		if (addr < 0x20) {
-
-			/* select MDIO PHY Addr : reg 0x3F8[28:24]=5'b10 */
+	} else if (speed == HAL_INTF_PHY_PCIE_GEN2) {
+		if (addr < 0x20)
 			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG + 3, 0x02);
-
-		/* GEN2 page 1 */
-		} else {
-
-			/* select MDIO PHY Addr : reg 0x3F8[28:24]=5'b11 */
+		else
 			HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG + 3, 0x03);
-		}
 	} else {
-
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_MDIO, HALMAC_DBG_ERR, "Error Speed !\n");
 	}
 
 	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG, HALMAC_REG_READ_8(pHalmac_adapter, REG_PCIE_MIX_CFG) | BIT_MDIO_RFLAG_V1);
 
-	tmp_u1b = HALMAC_REG_READ_8(pHalmac_adapter, REG_PCIE_MIX_CFG) & BIT_MDIO_RFLAG_V1 ;
+	tmp_u1b = HALMAC_REG_READ_8(pHalmac_adapter, REG_PCIE_MIX_CFG) & BIT_MDIO_RFLAG_V1;
 	count = 20;
 
 	while (tmp_u1b && (count != 0)) {
-
 		PLATFORM_RTL_DELAY_US(pDriver_adapter, 10);
 		tmp_u1b = HALMAC_REG_READ_8(pHalmac_adapter, REG_PCIE_MIX_CFG) & BIT_MDIO_RFLAG_V1;
 		count--;
@@ -4052,12 +4024,136 @@ halmac_mdio_read_88xx(
 	if (tmp_u1b) {
 		ret  = 0xFFFF;
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_MDIO, HALMAC_DBG_ERR, "MDIO read fail!\n");
-
 	} else {
-		ret = HALMAC_REG_READ_16(pHalmac_adapter, REG_MDIO_V1+2);
+		ret = HALMAC_REG_READ_16(pHalmac_adapter, REG_MDIO_V1 + 2);
 		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_MDIO, HALMAC_DBG_TRACE, "Read Value = %x\n", ret);
 	}
 
 	return ret;
 }
 
+HALMAC_RET_STATUS
+halmac_usbphy_write_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 addr,
+	IN u16 data,
+	IN u8 speed
+)
+{
+	VOID *pDriver_adapter = NULL;
+	PHALMAC_API pHalmac_api;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+
+	if (speed == HAL_INTF_PHY_USB3) {
+		HALMAC_REG_WRITE_8(pHalmac_adapter, 0xff0d, (u8)data);
+		HALMAC_REG_WRITE_8(pHalmac_adapter, 0xff0e, (u8)(data >> 8));
+		HALMAC_REG_WRITE_8(pHalmac_adapter, 0xff0c, addr | BIT(7));
+	} else if (speed == HAL_INTF_PHY_USB2) {
+		HALMAC_REG_WRITE_8(pHalmac_adapter, 0xfe41, (u8)data);
+		HALMAC_REG_WRITE_8(pHalmac_adapter, 0xfe40, addr);
+		HALMAC_REG_WRITE_8(pHalmac_adapter, 0xfe42, 0x81);
+	} else {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_USB, HALMAC_DBG_ERR, "[ERR]Error USB Speed !\n");
+		return HALMAC_RET_NOT_SUPPORT;
+	}
+
+	return HALMAC_RET_SUCCESS;
+}
+
+u16
+halmac_usbphy_read_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 addr,
+	IN u8 speed
+)
+{
+	VOID *pDriver_adapter = NULL;
+	PHALMAC_API pHalmac_api;
+	u16 value = 0;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+
+	if (speed == HAL_INTF_PHY_USB3) {
+		HALMAC_REG_WRITE_8(pHalmac_adapter, 0xff0c, addr | BIT(6));
+		value = (u16)(HALMAC_REG_READ_32(pHalmac_adapter, 0xff0c) >> 8);
+	} else if (speed == HAL_INTF_PHY_USB2) {
+		if ((addr >= 0xE0) && (addr <= 0xFF))
+			addr -= 0x20;
+		if ((addr >= 0xC0) && (addr <= 0xDF)) {
+			HALMAC_REG_WRITE_8(pHalmac_adapter, 0xfe40, addr);
+			HALMAC_REG_WRITE_8(pHalmac_adapter, 0xfe42, 0x81);
+			value = HALMAC_REG_READ_8(pHalmac_adapter, 0xfe43);
+		} else {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_USB, HALMAC_DBG_ERR, "[ERR]Error USB2PHY offset!\n");
+			return HALMAC_RET_NOT_SUPPORT;
+		}
+	} else {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_USB, HALMAC_DBG_ERR, "[ERR]Error USB Speed !\n");
+		return HALMAC_RET_NOT_SUPPORT;
+	}
+
+	return value;
+}
+
+HALMAC_RET_STATUS
+halmac_ltecoex_reg_read_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u16 offset,
+	OUT u32 *pValue
+)
+{
+	u32 counter;
+	VOID *pDriver_adapter = NULL;
+	PHALMAC_API pHalmac_api;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+
+	counter = 10000;
+	while ((HALMAC_REG_READ_8(pHalmac_adapter, REG_WL2LTECOEX_INDIRECT_ACCESS_CTRL_V1 + 3) & BIT(5)) == 0) {
+		if (counter == 0) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[ERR]Check ltecoex ready bit fail\n");
+			return HALMAC_RET_LTECOEX_READY_FAIL;
+		}
+		counter--;
+		PLATFORM_RTL_DELAY_US(pDriver_adapter, 50);
+	}
+
+	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_WL2LTECOEX_INDIRECT_ACCESS_CTRL_V1, 0x800F0000 | offset);
+	*pValue = HALMAC_REG_READ_32(pHalmac_adapter, REG_WL2LTECOEX_INDIRECT_ACCESS_READ_DATA_V1);
+
+	return HALMAC_RET_SUCCESS;
+}
+
+HALMAC_RET_STATUS
+halmac_ltecoex_reg_write_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u16 offset,
+	IN u32 value
+)
+{
+	u32 counter;
+	VOID *pDriver_adapter = NULL;
+	PHALMAC_API pHalmac_api;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+
+	counter = 10000;
+	while ((HALMAC_REG_READ_8(pHalmac_adapter, REG_WL2LTECOEX_INDIRECT_ACCESS_CTRL_V1 + 3) & BIT(5)) == 0) {
+		if (counter == 0) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[ERR]Check ltecoex ready bit fail\n");
+			return HALMAC_RET_LTECOEX_READY_FAIL;
+		}
+		counter--;
+		PLATFORM_RTL_DELAY_US(pDriver_adapter, 50);
+	}
+
+	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_WL2LTECOEX_INDIRECT_ACCESS_WRITE_DATA_V1, value);
+	HALMAC_REG_WRITE_32(pHalmac_adapter, REG_WL2LTECOEX_INDIRECT_ACCESS_CTRL_V1, 0xC00F0000 | offset);
+
+	return HALMAC_RET_SUCCESS;
+}
\ No newline at end of file
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_func_88xx.h b/rtl8822BU/hal/halmac/halmac_88xx/halmac_func_88xx.h
index e7215ec..5d67ec1 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_88xx/halmac_func_88xx.h
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_func_88xx.h
@@ -1,8 +1,27 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_FUNC_88XX_H_
 #define _HALMAC_FUNC_88XX_H_
 
 #include "../halmac_type.h"
 
+VOID
+halmac_init_offload_feature_state_machine_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter
+);
 
 HALMAC_RET_STATUS
 halmac_send_h2c_pkt_88xx(
@@ -98,6 +117,13 @@ halmac_read_hw_efuse_88xx(
 );
 
 HALMAC_RET_STATUS
+halmac_update_fw_info_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 *pHamacl_fw,
+	IN u32 halmac_fw_size
+);
+
+HALMAC_RET_STATUS
 halmac_dlfw_to_mem_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *pRam_code,
@@ -133,6 +159,11 @@ halmac_dlfw_end_flow_88xx(
 );
 
 HALMAC_RET_STATUS
+halmac_free_dl_fw_end_flow_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter
+);
+
+HALMAC_RET_STATUS
 halmac_pwr_seq_parser_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 cut,
@@ -148,12 +179,6 @@ halmac_get_h2c_buff_free_space_88xx(
 );
 
 HALMAC_RET_STATUS
-halmac_send_h2c_set_pwr_mode_88xx(
-	IN PHALMAC_ADAPTER pHalmac_adapter,
-	IN PHALMAC_FWLPS_OPTION pHal_FwLps_Opt
-);
-
-HALMAC_RET_STATUS
 halmac_func_send_original_h2c_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u8 *original_h2c,
@@ -162,15 +187,6 @@ halmac_func_send_original_h2c_88xx(
 );
 
 HALMAC_RET_STATUS
-halmac_media_status_rpt_88xx(
-	IN PHALMAC_ADAPTER pHalmac_adapter,
-	IN u8 op_mode,
-	IN u8 mac_id_ind,
-	IN u8 mac_id,
-	IN u8 mac_id_end
-);
-
-HALMAC_RET_STATUS
 halmac_send_h2c_update_datapack_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN HALMAC_DATA_TYPE halmac_data_type,
@@ -388,12 +404,6 @@ halmac_restore_mac_register_88xx(
 	IN u32 restore_num
 );
 
-VOID
-halmac_api_record_id_88xx(
-	IN PHALMAC_ADAPTER pHalmac_adapter,
-	IN HALMAC_API_ID api_id
-);
-
 HALMAC_RET_STATUS
 halmac_set_usb_mode_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
@@ -423,7 +433,8 @@ HALMAC_RET_STATUS
 halmac_check_oqt_88xx(
 	IN PHALMAC_ADAPTER pHalmac_adapter,
 	IN u32 tx_agg_num,
-	IN u8 *pHalmac_buf
+	IN u8 *pHalmac_buf,
+	IN u8 macid_counter
 );
 
 HALMAC_RET_STATUS
@@ -489,4 +500,39 @@ halmac_config_ampdu_88xx(
 	IN PHALMAC_AMPDU_CONFIG pAmpdu_config
 );
 
+VOID
+halmac_rx_shift_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 enable
+);
+
+HALMAC_RET_STATUS
+halmac_usbphy_write_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 addr,
+	IN u16 data,
+	IN u8 speed
+);
+
+u16
+halmac_usbphy_read_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 addr,
+	IN u8 speed
+);
+
+HALMAC_RET_STATUS
+halmac_ltecoex_reg_read_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u16 offset,
+	OUT u32 *pValue
+);
+
+HALMAC_RET_STATUS
+halmac_ltecoex_reg_write_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u16 offset,
+	IN u32 value
+);
+
 #endif /* _HALMAC_FUNC_88XX_H_ */
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_gpio_88xx.c b/rtl8822BU/hal/halmac/halmac_88xx/halmac_gpio_88xx.c
new file mode 100644
index 0000000..436220c
--- a/dev/null
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_gpio_88xx.c
@@ -0,0 +1,453 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
+#include "halmac_gpio_88xx.h"
+
+/**
+ * halmac_pinmux_wl_led_mode_88xx() -control wlan led gpio function
+ * @pHalmac_adapter : the adapter of halmac
+ * @wlled_mode : wlan led mode
+ * Author : Ivan Lin
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+HALMAC_RET_STATUS
+halmac_pinmux_wl_led_mode_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN HALMAC_WLLED_MODE wlled_mode
+)
+{
+	u8 value8;
+	PHALMAC_API pHalmac_api;
+	VOID *pDriver_adapter = NULL;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]halmac_pinmux_wl_led_mode_88xx ==========>\n");
+
+	value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_LED_CFG + 2);
+	value8 &= ~(BIT(6));
+	value8 |= BIT(3);
+	value8 &= ~(BIT(0) | BIT(1) | BIT(2));
+
+	switch (wlled_mode) {
+	case HALMAC_WLLED_MODE_TRX:
+		value8 |= 2;
+		break;
+	case HALMAC_WLLED_MODE_TX:
+		value8 |= 4;
+		break;
+	case HALMAC_WLLED_MODE_RX:
+		value8 |= 6;
+		break;
+	case HALMAC_WLLED_MODE_SW_CTRL:
+		value8 |= 0;
+		break;
+	default:
+		return HALMAC_RET_SWITCH_CASE_ERROR;
+	}
+
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_LED_CFG + 2, value8);
+
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_TRACE, "[TRACE]halmac_pinmux_wl_led_mode_88xx <==========\n");
+
+	return HALMAC_RET_SUCCESS;
+}
+
+/**
+ * halmac_pinmux_wl_led_sw_ctrl_88xx() -control wlan led on/off
+ * @pHalmac_adapter : the adapter of halmac
+ * @led_on : on(1), off(0)
+ * Author : Ivan Lin
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+VOID
+halmac_pinmux_wl_led_sw_ctrl_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 led_on
+)
+{
+	u8 value8;
+	PHALMAC_API pHalmac_api;
+
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+
+	value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_LED_CFG + 2);
+	value8 = (led_on == 0) ? value8 | BIT(3) : value8 & ~(BIT(3));
+
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_LED_CFG + 2, value8);
+}
+
+/**
+ * halmac_pinmux_sdio_int_polarity_88xx() -control sdio int polarity
+ * @pHalmac_adapter : the adapter of halmac
+ * @low_active : low active(1), high active(0)
+ * Author : Ivan Lin
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+VOID
+halmac_pinmux_sdio_int_polarity_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 low_active
+)
+{
+	u8 value8;
+	PHALMAC_API pHalmac_api;
+
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+
+	value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_SYS_SDIO_CTRL + 2);
+	value8 = (low_active == 0) ? value8 | BIT(3) : value8 & ~(BIT(3));
+
+	HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SYS_SDIO_CTRL + 2, value8);
+}
+
+/**
+ * halmac_pinmux_gpio_mode_88xx() -control gpio io mode
+ * @pHalmac_adapter : the adapter of halmac
+ * @gpio_id : gpio0~15(0~15)
+ * @output : output(1), input(0)
+ * Author : Ivan Lin
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+HALMAC_RET_STATUS
+halmac_pinmux_gpio_mode_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 gpio_id,
+	IN u8 output
+)
+{
+	u16 value16;
+	u8 in_out;
+	u32 offset;
+	PHALMAC_API pHalmac_api;
+
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+
+	if (gpio_id <= 7)
+		offset = REG_GPIO_PIN_CTRL + 2;
+	else if (gpio_id >= 8 && gpio_id <= 15)
+		offset = REG_GPIO_EXT_CTRL + 2;
+	else
+		return HALMAC_RET_WRONG_GPIO;
+
+	in_out = (output == 0) ? 0 : 1;
+	gpio_id &= (8 - 1);
+
+	value16 = HALMAC_REG_READ_16(pHalmac_adapter, offset);
+	value16 &= ~((1 << gpio_id) | (1 << gpio_id << 8));
+	value16 |= (in_out << gpio_id);
+	HALMAC_REG_WRITE_16(pHalmac_adapter, offset, value16);
+
+	return HALMAC_RET_SUCCESS;
+}
+
+/**
+ * halmac_pinmux_gpio_output_88xx() -control gpio output high/low
+ * @pHalmac_adapter : the adapter of halmac
+ * @gpio_id : gpio0~15(0~15)
+ * @high : high(1), low(0)
+ * Author : Ivan Lin
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+HALMAC_RET_STATUS
+halmac_pinmux_gpio_output_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 gpio_id,
+	IN u8 high
+)
+{
+	u8 value8;
+	u8 hi_low;
+	u32 offset;
+	PHALMAC_API pHalmac_api;
+
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+
+	if (gpio_id <= 7)
+		offset = REG_GPIO_PIN_CTRL + 1;
+	else if (gpio_id >= 8 && gpio_id <= 15)
+		offset = REG_GPIO_EXT_CTRL + 1;
+	else
+		return HALMAC_RET_WRONG_GPIO;
+
+	hi_low = (high == 0) ? 0 : 1;
+	gpio_id &= (8 - 1);
+
+	value8 = HALMAC_REG_READ_8(pHalmac_adapter, offset);
+	value8 &= ~(1 << gpio_id);
+	value8 |= (hi_low << gpio_id);
+	HALMAC_REG_WRITE_8(pHalmac_adapter, offset, value8);
+
+	return HALMAC_RET_SUCCESS;
+}
+
+/**
+ * halmac_pinmux_status_88xx() -get current gpio status(high/low)
+ * @pHalmac_adapter : the adapter of halmac
+ * @pin_id : 0~15(0~15)
+ * @phigh : high(1), low(0)
+ * Author : Ivan Lin
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
+HALMAC_RET_STATUS
+halmac_pinmux_pin_status_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 pin_id,
+	OUT u8 *pHigh
+)
+{
+	u8 value8;
+	u32 offset;
+	PHALMAC_API pHalmac_api;
+
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+
+	if (pin_id <= 7)
+		offset = REG_GPIO_PIN_CTRL;
+	else if (pin_id >= 8 && pin_id <= 15)
+		offset = REG_GPIO_EXT_CTRL;
+	else
+		return HALMAC_RET_WRONG_GPIO;
+
+	pin_id &= (8 - 1);
+
+	value8 = HALMAC_REG_READ_8(pHalmac_adapter, offset);
+	*pHigh = (value8 & (1 << pin_id)) >> pin_id;
+
+	return HALMAC_RET_SUCCESS;
+}
+
+HALMAC_RET_STATUS
+halmac_pinmux_parser_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN const HALMAC_GPIO_PIMUX_LIST *pPinmux_list,
+	IN u32 list_size,
+	IN u32 gpio_id,
+	OUT u32 *pCur_func
+)
+{
+	u8 value8;
+	u32 i;
+	const HALMAC_GPIO_PIMUX_LIST *pCurr_func;
+	HALMAC_GPIO_CFG_STATE *pGpio_state = &pHalmac_adapter->halmac_state.gpio_cfg_state;
+	PHALMAC_API pHalmac_api;
+	VOID *pDriver_adapter = NULL;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+	pCurr_func = pPinmux_list;
+
+	if (*pGpio_state == HALMAC_GPIO_CFG_STATE_BUSY)
+		return HALMAC_RET_BUSY_STATE;
+
+	*pGpio_state = HALMAC_GPIO_CFG_STATE_BUSY;
+
+	for (i = 0; i < list_size; i++) {
+		if (gpio_id != pCurr_func->id) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_ERR, "[ERR]offset : %X, value : %X, func : %X\n",
+							pCurr_func->offset, pCurr_func->value, pCurr_func->func);
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_ERR, "[ERR]id1 : %X, id2 : %X\n", gpio_id, pCurr_func->id);
+			*pGpio_state = HALMAC_GPIO_CFG_STATE_IDLE;
+			return HALMAC_RET_GET_PINMUX_ERR;
+		}
+		value8 = HALMAC_REG_READ_8(pHalmac_adapter, pCurr_func->offset);
+		value8 &= pCurr_func->msk;
+		if (value8 == pCurr_func->value) {
+			*pCur_func = pCurr_func->func;
+			break;
+		}
+		pCurr_func++;
+	}
+
+	*pGpio_state = HALMAC_GPIO_CFG_STATE_IDLE;
+
+	if (i == list_size)
+		return HALMAC_RET_GET_PINMUX_ERR;
+
+	return HALMAC_RET_SUCCESS;
+}
+
+HALMAC_RET_STATUS
+halmac_pinmux_switch_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN const HALMAC_GPIO_PIMUX_LIST *pPinmux_list,
+	IN u32 list_size,
+	IN u32 gpio_id,
+	IN HALMAC_GPIO_FUNC gpio_func
+)
+{
+	u32 i;
+	u8 value8;
+	u16 switch_func;
+	const HALMAC_GPIO_PIMUX_LIST *pCurr_func;
+	HALMAC_GPIO_CFG_STATE *pGpio_state = &pHalmac_adapter->halmac_state.gpio_cfg_state;
+	PHALMAC_API pHalmac_api;
+	VOID *pDriver_adapter = NULL;
+
+	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
+	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
+	pCurr_func = pPinmux_list;
+
+	if (*pGpio_state == HALMAC_GPIO_CFG_STATE_BUSY)
+		return HALMAC_RET_BUSY_STATE;
+
+	switch (gpio_func) {
+	case HALMAC_GPIO_FUNC_WL_LED:
+		switch_func = HALMAC_WL_LED;
+		break;
+	case HALMAC_GPIO_FUNC_SDIO_INT:
+		switch_func = HALMAC_SDIO_INT;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_0:
+	case HALMAC_GPIO_FUNC_SW_IO_1:
+	case HALMAC_GPIO_FUNC_SW_IO_2:
+	case HALMAC_GPIO_FUNC_SW_IO_3:
+	case HALMAC_GPIO_FUNC_SW_IO_4:
+	case HALMAC_GPIO_FUNC_SW_IO_5:
+	case HALMAC_GPIO_FUNC_SW_IO_6:
+	case HALMAC_GPIO_FUNC_SW_IO_7:
+	case HALMAC_GPIO_FUNC_SW_IO_8:
+	case HALMAC_GPIO_FUNC_SW_IO_9:
+	case HALMAC_GPIO_FUNC_SW_IO_10:
+	case HALMAC_GPIO_FUNC_SW_IO_11:
+	case HALMAC_GPIO_FUNC_SW_IO_12:
+	case HALMAC_GPIO_FUNC_SW_IO_13:
+	case HALMAC_GPIO_FUNC_SW_IO_14:
+	case HALMAC_GPIO_FUNC_SW_IO_15:
+		switch_func = HALMAC_SW_IO;
+		break;
+	default:
+		return HALMAC_RET_SWITCH_CASE_ERROR;
+	}
+
+	for (i = 0; i < list_size; i++) {
+		if (gpio_id != pCurr_func->id) {
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_ERR, "[ERR]offset : %X, value : %X, func : %X\n",
+							pCurr_func->offset, pCurr_func->value, pCurr_func->func);
+			PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_ERR, "[ERR]id1 : %X, id2 : %X\n", gpio_id, pCurr_func->id);
+			return HALMAC_RET_GET_PINMUX_ERR;
+		}
+
+		if (switch_func == pCurr_func->func)
+			break;
+
+		pCurr_func++;
+	}
+
+	if (i == list_size) {
+		PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_ERR, "[ERR]gpio func error : %X %X\n", gpio_id, pCurr_func->id);
+		return HALMAC_RET_GET_PINMUX_ERR;
+	}
+
+	*pGpio_state = HALMAC_GPIO_CFG_STATE_BUSY;
+
+	pCurr_func = pPinmux_list;
+	for (i = 0; i < list_size; i++) {
+		value8 = HALMAC_REG_READ_8(pHalmac_adapter, pCurr_func->offset);
+		value8 &= ~(pCurr_func->msk);
+
+		if (switch_func == pCurr_func->func) {
+			value8 |= (pCurr_func->value & pCurr_func->msk);
+			HALMAC_REG_WRITE_8(pHalmac_adapter, pCurr_func->offset, value8);
+			break;
+		}
+
+		value8 |= (~pCurr_func->value & pCurr_func->msk);
+		HALMAC_REG_WRITE_8(pHalmac_adapter, pCurr_func->offset, value8);
+
+		pCurr_func++;
+	}
+
+	*pGpio_state = HALMAC_GPIO_CFG_STATE_IDLE;
+
+	return HALMAC_RET_SUCCESS;
+}
+
+HALMAC_RET_STATUS
+halmac_pinmux_record_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN HALMAC_GPIO_FUNC gpio_func,
+	IN u8 val
+)
+{
+	switch (gpio_func) {
+	case HALMAC_GPIO_FUNC_WL_LED:
+		pHalmac_adapter->pinmux_info.wl_led = val;
+		break;
+	case HALMAC_GPIO_FUNC_SDIO_INT:
+		pHalmac_adapter->pinmux_info.sdio_int = val;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_0:
+		pHalmac_adapter->pinmux_info.sw_io_0 = val;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_1:
+		pHalmac_adapter->pinmux_info.sw_io_1 = val;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_2:
+		pHalmac_adapter->pinmux_info.sw_io_2 = val;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_3:
+		pHalmac_adapter->pinmux_info.sw_io_3 = val;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_4:
+		pHalmac_adapter->pinmux_info.sw_io_4 = val;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_5:
+		pHalmac_adapter->pinmux_info.sw_io_5 = val;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_6:
+		pHalmac_adapter->pinmux_info.sw_io_6 = val;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_7:
+		pHalmac_adapter->pinmux_info.sw_io_7 = val;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_8:
+		pHalmac_adapter->pinmux_info.sw_io_8 = val;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_9:
+		pHalmac_adapter->pinmux_info.sw_io_9 = val;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_10:
+		pHalmac_adapter->pinmux_info.sw_io_10 = val;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_11:
+		pHalmac_adapter->pinmux_info.sw_io_11 = val;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_12:
+		pHalmac_adapter->pinmux_info.sw_io_12 = val;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_13:
+		pHalmac_adapter->pinmux_info.sw_io_13 = val;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_14:
+		pHalmac_adapter->pinmux_info.sw_io_14 = val;
+		break;
+	case HALMAC_GPIO_FUNC_SW_IO_15:
+		pHalmac_adapter->pinmux_info.sw_io_15 = val;
+		break;
+	default:
+		return HALMAC_RET_GET_PINMUX_ERR;
+	}
+
+	return HALMAC_RET_SUCCESS;
+}
+
diff --git a/rtl8822BU/hal/halmac/halmac_88xx/halmac_gpio_88xx.h b/rtl8822BU/hal/halmac/halmac_88xx/halmac_gpio_88xx.h
new file mode 100644
index 0000000..c2f31b0
--- a/dev/null
+++ b/rtl8822BU/hal/halmac/halmac_88xx/halmac_gpio_88xx.h
@@ -0,0 +1,86 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
+#ifndef _HALMAC_GPIO_88XX_H_
+#define _HALMAC_GPIO_88XX_H_
+
+#include "../halmac_api.h"
+#include "../halmac_gpio_cmd.h"
+
+HALMAC_RET_STATUS
+halmac_pinmux_wl_led_mode_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN HALMAC_WLLED_MODE wlled_mode
+);
+
+VOID
+halmac_pinmux_wl_led_sw_ctrl_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 led_on
+);
+
+VOID
+halmac_pinmux_sdio_int_polarity_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 low_active
+);
+
+HALMAC_RET_STATUS
+halmac_pinmux_gpio_mode_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 gpio_id,
+	IN u8 output
+);
+
+HALMAC_RET_STATUS
+halmac_pinmux_gpio_output_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 gpio_id,
+	IN u8 high
+);
+
+HALMAC_RET_STATUS
+halmac_pinmux_pin_status_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN u8 pin_id,
+	OUT u8 *pHigh
+);
+
+HALMAC_RET_STATUS
+halmac_pinmux_parser_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN const HALMAC_GPIO_PIMUX_LIST *pPinmux_list,
+	IN u32 list_size,
+	IN u32 gpio_id,
+	OUT u32 *pCur_func
+);
+
+HALMAC_RET_STATUS
+halmac_pinmux_switch_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN const HALMAC_GPIO_PIMUX_LIST *pPinmux_list,
+	IN u32 list_size,
+	IN u32 gpio_id,
+	IN HALMAC_GPIO_FUNC gpio_func
+);
+
+HALMAC_RET_STATUS
+halmac_pinmux_record_88xx(
+	IN PHALMAC_ADAPTER pHalmac_adapter,
+	IN HALMAC_GPIO_FUNC gpio_func,
+	IN u8 val
+);
+
+#endif/* _HALMAC_GPIO_88XX_H_ */
diff --git a/rtl8822BU/hal/halmac/halmac_api.c b/rtl8822BU/hal/halmac/halmac_api.c
index fb34367..ac367d2 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_api.c
+++ b/rtl8822BU/hal/halmac/halmac_api.c
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #include "halmac_2_platform.h"
 #include "halmac_type.h"
 #if HALMAC_PLATFORM_WINDOWS == 1
@@ -9,14 +24,7 @@
 #include "halmac_88xx/halmac_api_win8821c.h"
 #include "halmac_88xx/halmac_win8821c_cfg.h"
 #endif
-#if HALMAC_8197F_SUPPORT
-#include "halmac_88xx/halmac_api_win8197f.h"
-#include "halmac_88xx/halmac_win8197f_cfg.h"
-#endif
-#if HALMAC_8814B_SUPPORT
-#include "halmac_88xx/halmac_api_win8814b.h"
-#include "halmac_88xx/halmac_win8814b_cfg.h"
-#endif
+
 #else
 #include "halmac_88xx/halmac_api_88xx.h"
 #include "halmac_88xx/halmac_88xx_cfg.h"
@@ -28,22 +36,15 @@
 #if HALMAC_8821C_SUPPORT
 #include "halmac_88xx/halmac_8821c/halmac_8821c_cfg.h"
 #endif
-#if HALMAC_8197F_SUPPORT
-#include "halmac_88xx/halmac_8197f/halmac_8197f_cfg.h"
-#endif
-#if HALMAC_8814B_SUPPORT
-#include "halmac_88xx/halmac_8814b/halmac_8814b_cfg.h"
-#endif
-
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_check_platform_api(
 	IN VOID *pDriver_adapter,
 	IN HALMAC_INTERFACE halmac_interface,
 	IN PHALMAC_PLATFORM_API pHalmac_platform_api
 );
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_get_chip_info(
 	IN VOID	*pDriver_adapter,
 	IN PHALMAC_PLATFORM_API pHalmac_platform_api,
@@ -51,14 +52,14 @@ halmac_get_chip_info(
 	IN PHALMAC_ADAPTER pHalmac_adapter
 );
 
-u8
+static u8
 platform_reg_read_8_sdio(
 	IN VOID	*pDriver_adapter,
 	IN PHALMAC_PLATFORM_API pHalmac_platform_api,
 	IN u32 offset
 );
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 plarform_reg_write_8_sdio(
 	IN VOID	*pDriver_adapter,
 	IN PHALMAC_PLATFORM_API pHalmac_platform_api,
@@ -66,20 +67,21 @@ plarform_reg_write_8_sdio(
 	IN u8 data
 );
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_convert_to_sdio_bus_offset(
 	INOUT u32 *halmac_offset
 );
 
 /**
  * halmac_init_adapter() - init halmac_adapter
- * @pDriver_adapter
- * @pHalmac_platform_api : platform api for halmac used
- * @halmac_interface : PCIE, USB, or SDIO
- * @ppHalmac_adapter
- * @ppHalmac_api
- * Author : KaiYuan Chang
+ * @pDriver_adapter : the adapter of caller
+ * @pHalmac_platform_api : the platform APIs which is used in halmac APIs
+ * @halmac_interface : bus interface
+ * @ppHalmac_adapter : the adapter of halmac
+ * @ppHalmac_api : the function pointer of APIs, caller shall call APIs by function pointer
+ * Author : KaiYuan Chang / Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_init_adapter(
@@ -92,6 +94,7 @@ halmac_init_adapter(
 {
 	PHALMAC_ADAPTER pHalmac_adapter = (PHALMAC_ADAPTER)NULL;
 	HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
+	u8 *pBuf = NULL;
 
 #if HALMAC_PLATFORM_WINDOWS == 1
 	u8 chip_id = 0;
@@ -102,27 +105,30 @@ halmac_init_adapter(
 	} ENDIAN_CHECK = { 0x01000000 };
 
 	status = halmac_check_platform_api(pDriver_adapter, halmac_interface, pHalmac_platform_api);
-	if (HALMAC_RET_SUCCESS != status)
+	if (status != HALMAC_RET_SUCCESS)
 		return status;
-	pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, HALMAC_SVN_VER "\n");
-	pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "HALMAC_MAJOR_VER = %x\n", HALMAC_MAJOR_VER);
-	pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "HALMAC_PROTOTYPE_VER = %x\n", HALMAC_PROTOTYPE_VER);
-	pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "HALMAC_MINOR_VER = %x\n", HALMAC_MINOR_VER);
+	pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ALWAYS, HALMAC_SVN_VER "\n");
+	pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ALWAYS, "HALMAC_MAJOR_VER = %x\n", HALMAC_MAJOR_VER);
+	pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ALWAYS, "HALMAC_PROTOTYPE_VER = %x\n", HALMAC_PROTOTYPE_VER);
+	pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ALWAYS, "HALMAC_MINOR_VER = %x\n", HALMAC_MINOR_VER);
+	pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ALWAYS, "HALMAC_PATCH_VER = %x\n", HALMAC_PATCH_VER);
 
 	pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_init_adapter_88xx ==========>\n");
 
 	/* Check endian setting - Little endian : 1, Big endian : 0*/
-	if (HALMAC_SYSTEM_ENDIAN == ENDIAN_CHECK.x[0]) {
+	if (ENDIAN_CHECK.x[0] == HALMAC_SYSTEM_ENDIAN) {
 		pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "Endian setting Err!!\n");
-		pHalmac_adapter = (PHALMAC_ADAPTER)NULL;
 		return HALMAC_RET_ENDIAN_ERR;
 	}
 
-	pHalmac_adapter = (PHALMAC_ADAPTER)pHalmac_platform_api->RTL_MALLOC(pDriver_adapter, sizeof(HALMAC_ADAPTER));
-	if (NULL == pHalmac_adapter) {
+	pBuf = (u8 *)pHalmac_platform_api->RTL_MALLOC(pDriver_adapter, sizeof(HALMAC_ADAPTER));
+
+	if (pBuf == NULL) {
 		pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "Malloc HAL Adapter Err!!\n");
 		return HALMAC_RET_MALLOC_FAIL;
 	}
+	pHalmac_platform_api->RTL_MEMSET(pDriver_adapter, pBuf, 0x00, sizeof(HALMAC_ADAPTER));
+	pHalmac_adapter = (PHALMAC_ADAPTER)pBuf;
 
 	/* return halmac adapter address to caller */
 	*ppHalmac_adapter = pHalmac_adapter;
@@ -130,13 +136,14 @@ halmac_init_adapter(
 	/* Record caller info */
 	pHalmac_adapter->pHalmac_platform_api = pHalmac_platform_api;
 	pHalmac_adapter->pDriver_adapter = pDriver_adapter;
+	halmac_interface = (halmac_interface == HALMAC_INTERFACE_AXI) ? HALMAC_INTERFACE_PCIE : halmac_interface;
 	pHalmac_adapter->halmac_interface = halmac_interface;
 
-	PLATFORM_MUTEX_INIT(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
-	PLATFORM_MUTEX_INIT(pDriver_adapter, &(pHalmac_adapter->h2c_seq_mutex));
+	PLATFORM_MUTEX_INIT(pDriver_adapter, &pHalmac_adapter->EfuseMutex);
+	PLATFORM_MUTEX_INIT(pDriver_adapter, &pHalmac_adapter->h2c_seq_mutex);
 
 	/*Get Chip*/
-	if (HALMAC_RET_SUCCESS != halmac_get_chip_info(pDriver_adapter, pHalmac_platform_api, halmac_interface, pHalmac_adapter)) {
+	if (halmac_get_chip_info(pDriver_adapter, pHalmac_platform_api, halmac_interface, pHalmac_adapter) != HALMAC_RET_SUCCESS) {
 		pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "HALMAC_RET_CHIP_NOT_SUPPORT\n");
 		return HALMAC_RET_CHIP_NOT_SUPPORT;
 	}
@@ -148,29 +155,17 @@ halmac_init_adapter(
 #else
 
 #if HALMAC_8822B_SUPPORT
-	if (HALMAC_CHIP_ID_8822B == pHalmac_adapter->chip_id) {
+	if (pHalmac_adapter->chip_id == HALMAC_CHIP_ID_8822B) {
 		halmac_init_adapter_para_win8822b(pHalmac_adapter);
 		status = halmac_mount_api_win8822b(pHalmac_adapter);
 	}
 #endif
 #if HALMAC_8821C_SUPPORT
-	if (HALMAC_CHIP_ID_8821C == pHalmac_adapter->chip_id) {
+	if (pHalmac_adapter->chip_id == HALMAC_CHIP_ID_8821C) {
 		halmac_init_adapter_para_win8821c(pHalmac_adapter);
 		status = halmac_mount_api_win8821c(pHalmac_adapter);
 	}
 #endif
-#if HALMAC_8814B_SUPPORT
-	if (HALMAC_CHIP_ID_8814B == pHalmac_adapter->chip_id) {
-		halmac_init_adapter_para_win8814b(pHalmac_adapter);
-		status = halmac_mount_api_win8814b(pHalmac_adapter);
-	}
-#endif
-#if HALMAC_8197F_SUPPORT
-	if (HALMAC_CHIP_ID_8197F == pHalmac_adapter->chip_id) {
-		halmac_init_adapter_para_win8197f(pHalmac_adapter);
-		status = halmac_mount_api_win8197f(pHalmac_adapter);
-	}
-#endif
 
 #endif
 
@@ -183,10 +178,11 @@ halmac_init_adapter(
 }
 
 /**
- * halmac_halt_api() - halt all halmac api
- * @pHalmac_adapter
+ * halmac_halt_api() - stop halmac_api action
+ * @pHalmac_adapter : the adapter of halmac
  * Author : Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_halt_api(
@@ -196,7 +192,7 @@ halmac_halt_api(
 	VOID *pDriver_adapter = NULL;
 	PHALMAC_PLATFORM_API pHalmac_platform_api = (PHALMAC_PLATFORM_API)NULL;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
@@ -210,9 +206,10 @@ halmac_halt_api(
 
 /**
  * halmac_deinit_adapter() - deinit halmac adapter
- * @pHalmac_adapter
- * Author : KaiYuan Chang
+ * @pHalmac_adapter : the adapter of halmac
+ * Author : KaiYuan Chang / Ivan Lin
  * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
  */
 HALMAC_RET_STATUS
 halmac_deinit_adapter(
@@ -220,173 +217,156 @@ halmac_deinit_adapter(
 )
 {
 	VOID *pDriver_adapter = NULL;
-	PHALMAC_PLATFORM_API pHalmac_platform_api = (PHALMAC_PLATFORM_API)NULL;
 
-	if (HALMAC_RET_SUCCESS != halmac_adapter_validate(pHalmac_adapter))
+	if (halmac_adapter_validate(pHalmac_adapter) != HALMAC_RET_SUCCESS)
 		return HALMAC_RET_ADAPTER_INVALID;
 
 	pDriver_adapter = pHalmac_adapter->pDriver_adapter;
-	pHalmac_platform_api = pHalmac_adapter->pHalmac_platform_api;
 
-	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_deinit_adapter_88xx ==========>\n");
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]halmac_deinit_adapter_88xx ==========>\n");
 
-	PLATFORM_MUTEX_DEINIT(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
-	PLATFORM_MUTEX_DEINIT(pDriver_adapter, &(pHalmac_adapter->h2c_seq_mutex));
+	PLATFORM_MUTEX_DEINIT(pDriver_adapter, &pHalmac_adapter->EfuseMutex);
+	PLATFORM_MUTEX_DEINIT(pDriver_adapter, &pHalmac_adapter->h2c_seq_mutex);
 
-	if (NULL != pHalmac_adapter->pHalEfuse_map) {
+	if (pHalmac_adapter->pHalEfuse_map != NULL) {
 		PLATFORM_RTL_FREE(pDriver_adapter, pHalmac_adapter->pHalEfuse_map, pHalmac_adapter->hw_config_info.efuse_size);
 		pHalmac_adapter->pHalEfuse_map = (u8 *)NULL;
 	}
 
-	if (NULL != pHalmac_adapter->halmac_state.psd_set.pData) {
+	if (pHalmac_adapter->halmac_state.psd_set.pData != NULL) {
 		PLATFORM_RTL_FREE(pDriver_adapter, pHalmac_adapter->halmac_state.psd_set.pData, pHalmac_adapter->halmac_state.psd_set.data_size);
 		pHalmac_adapter->halmac_state.psd_set.pData = (u8 *)NULL;
 	}
 
-	if (NULL != pHalmac_adapter->pHalmac_api) {
+	if (pHalmac_adapter->pHalmac_api != NULL) {
 		PLATFORM_RTL_FREE(pDriver_adapter, pHalmac_adapter->pHalmac_api, sizeof(HALMAC_API));
 		pHalmac_adapter->pHalmac_api = NULL;
 	}
 
-	if (NULL != pHalmac_adapter) {
-		pHalmac_adapter->pHalAdapter_backup = NULL;
-		PLATFORM_RTL_FREE(pDriver_adapter, pHalmac_adapter, sizeof(HALMAC_ADAPTER));
-		pHalmac_adapter = (PHALMAC_ADAPTER)NULL;
-	}
+	pHalmac_adapter->pHalAdapter_backup = NULL;
+	PLATFORM_RTL_FREE(pDriver_adapter, pHalmac_adapter, sizeof(HALMAC_ADAPTER));
 
 	return HALMAC_RET_SUCCESS;
 }
 
-/**
- * halmac_check_platform_api() - check platform api pointers
- * @pDriver_adapter
- * @halmac_interface : PCIE, USB or SDIO
- * @pHalmac_platform_api
- * Author : KaiYuan Chang
- * Return : HALMAC_RET_STATUS
- */
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_check_platform_api(
 	IN VOID *pDriver_adapter,
 	IN HALMAC_INTERFACE	halmac_interface,
 	IN PHALMAC_PLATFORM_API pHalmac_platform_api
 )
 {
-	VOID *pAdapter_Local = NULL;
-
-	pAdapter_Local = pDriver_adapter;
-
-	if (NULL == pHalmac_platform_api)
+	if (pHalmac_platform_api == NULL)
 		return HALMAC_RET_PLATFORM_API_NULL;
 
-	if (NULL == pHalmac_platform_api->MSG_PRINT)
+	if (pHalmac_platform_api->MSG_PRINT == NULL)
 		return HALMAC_RET_PLATFORM_API_NULL;
 
-	if (HALMAC_INTERFACE_SDIO == halmac_interface) {
-		if (NULL == pHalmac_platform_api->SDIO_CMD52_READ) {
+	if (halmac_interface == HALMAC_INTERFACE_SDIO) {
+		if (pHalmac_platform_api->SDIO_CMD52_READ == NULL) {
 			pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->SDIO_CMD52_READ)\n");
 			return HALMAC_RET_PLATFORM_API_NULL;
 		}
-		if (NULL == pHalmac_platform_api->SDIO_CMD53_READ_8) {
+		if (pHalmac_platform_api->SDIO_CMD53_READ_8 == NULL) {
 			pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->SDIO_CMD53_READ_8)\n");
 			return HALMAC_RET_PLATFORM_API_NULL;
 		}
-		if (NULL == pHalmac_platform_api->SDIO_CMD53_READ_16) {
+		if (pHalmac_platform_api->SDIO_CMD53_READ_16 == NULL) {
 			pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->SDIO_CMD53_READ_16)\n");
 			return HALMAC_RET_PLATFORM_API_NULL;
 		}
-		if (NULL == pHalmac_platform_api->SDIO_CMD53_READ_32) {
+		if (pHalmac_platform_api->SDIO_CMD53_READ_32 == NULL) {
 			pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->SDIO_CMD53_READ_32)\n");
 			return HALMAC_RET_PLATFORM_API_NULL;
 		}
-		if (NULL == pHalmac_platform_api->SDIO_CMD53_READ_N) {
+		if (pHalmac_platform_api->SDIO_CMD53_READ_N == NULL) {
 			pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->SDIO_CMD53_READ_N)\n");
 			return HALMAC_RET_PLATFORM_API_NULL;
 		}
-		if (NULL == pHalmac_platform_api->SDIO_CMD52_WRITE) {
+		if (pHalmac_platform_api->SDIO_CMD52_WRITE == NULL) {
 			pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->SDIO_CMD52_WRITE)\n");
 			return HALMAC_RET_PLATFORM_API_NULL;
 		}
-		if (NULL == pHalmac_platform_api->SDIO_CMD53_WRITE_8) {
+		if (pHalmac_platform_api->SDIO_CMD53_WRITE_8 == NULL) {
 			pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->SDIO_CMD53_WRITE_8)\n");
 			return HALMAC_RET_PLATFORM_API_NULL;
 		}
-		if (NULL == pHalmac_platform_api->SDIO_CMD53_WRITE_16) {
+		if (pHalmac_platform_api->SDIO_CMD53_WRITE_16 == NULL) {
 			pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->SDIO_CMD53_WRITE_16)\n");
 			return HALMAC_RET_PLATFORM_API_NULL;
 		}
-		if (NULL == pHalmac_platform_api->SDIO_CMD53_WRITE_32) {
+		if (pHalmac_platform_api->SDIO_CMD53_WRITE_32 == NULL) {
 			pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->SDIO_CMD53_WRITE_32)\n");
 			return HALMAC_RET_PLATFORM_API_NULL;
 		}
 	}
 
-	if ((HALMAC_INTERFACE_USB == halmac_interface) || (HALMAC_INTERFACE_PCIE == halmac_interface)) {
-		if (NULL == pHalmac_platform_api->REG_READ_8) {
+	if ((halmac_interface == HALMAC_INTERFACE_USB) || (halmac_interface == HALMAC_INTERFACE_PCIE)) {
+		if (pHalmac_platform_api->REG_READ_8 == NULL) {
 			pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->REG_READ_8)\n");
 			return HALMAC_RET_PLATFORM_API_NULL;
 		}
-		if (NULL == pHalmac_platform_api->REG_READ_16) {
+		if (pHalmac_platform_api->REG_READ_16 == NULL) {
 			pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->REG_READ_16)\n");
 			return HALMAC_RET_PLATFORM_API_NULL;
 		}
-		if (NULL == pHalmac_platform_api->REG_READ_32) {
+		if (pHalmac_platform_api->REG_READ_32 == NULL) {
 			pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->REG_READ_32)\n");
 			return HALMAC_RET_PLATFORM_API_NULL;
 		}
-		if (NULL == pHalmac_platform_api->REG_WRITE_8) {
+		if (pHalmac_platform_api->REG_WRITE_8 == NULL) {
 			pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->REG_WRITE_8)\n");
 			return HALMAC_RET_PLATFORM_API_NULL;
 		}
-		if (NULL == pHalmac_platform_api->REG_WRITE_16) {
+		if (pHalmac_platform_api->REG_WRITE_16 == NULL) {
 			pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->REG_WRITE_16)\n");
 			return HALMAC_RET_PLATFORM_API_NULL;
 		}
-		if (NULL == pHalmac_platform_api->REG_WRITE_32) {
+		if (pHalmac_platform_api->REG_WRITE_32 == NULL) {
 			pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->REG_WRITE_32)\n");
 			return HALMAC_RET_PLATFORM_API_NULL;
 		}
 	}
 
-	if (NULL == pHalmac_platform_api->RTL_FREE) {
+	if (pHalmac_platform_api->RTL_FREE == NULL) {
 		pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->RTL_FREE)\n");
 		return HALMAC_RET_PLATFORM_API_NULL;
 	}
 
-	if (NULL == pHalmac_platform_api->RTL_MALLOC) {
+	if (pHalmac_platform_api->RTL_MALLOC == NULL) {
 		pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->RTL_MALLOC)\n");
 		return HALMAC_RET_PLATFORM_API_NULL;
 	}
-	if (NULL == pHalmac_platform_api->RTL_MEMCPY) {
+	if (pHalmac_platform_api->RTL_MEMCPY == NULL) {
 		pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->RTL_MEMCPY)\n");
 		return HALMAC_RET_PLATFORM_API_NULL;
 	}
-	if (NULL == pHalmac_platform_api->RTL_MEMSET) {
+	if (pHalmac_platform_api->RTL_MEMSET == NULL) {
 		pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->RTL_MEMSET)\n");
 		return HALMAC_RET_PLATFORM_API_NULL;
 	}
-	if (NULL == pHalmac_platform_api->RTL_DELAY_US) {
+	if (pHalmac_platform_api->RTL_DELAY_US == NULL) {
 		pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->RTL_DELAY_US)\n");
 		return HALMAC_RET_PLATFORM_API_NULL;
 	}
 
-	if (NULL == pHalmac_platform_api->MUTEX_INIT) {
+	if (pHalmac_platform_api->MUTEX_INIT == NULL) {
 		pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->MUTEX_INIT)\n");
 		return HALMAC_RET_PLATFORM_API_NULL;
 	}
-	if (NULL == pHalmac_platform_api->MUTEX_DEINIT) {
+	if (pHalmac_platform_api->MUTEX_DEINIT == NULL) {
 		pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->MUTEX_DEINIT)\n");
 		return HALMAC_RET_PLATFORM_API_NULL;
 	}
-	if (NULL == pHalmac_platform_api->MUTEX_LOCK) {
+	if (pHalmac_platform_api->MUTEX_LOCK == NULL) {
 		pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->MUTEX_LOCK)\n");
 		return HALMAC_RET_PLATFORM_API_NULL;
 	}
-	if (NULL == pHalmac_platform_api->MUTEX_UNLOCK) {
+	if (pHalmac_platform_api->MUTEX_UNLOCK == NULL) {
 		pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->MUTEX_UNLOCK)\n");
 		return HALMAC_RET_PLATFORM_API_NULL;
 	}
-	if (NULL == pHalmac_platform_api->EVENT_INDICATION) {
+	if (pHalmac_platform_api->EVENT_INDICATION == NULL) {
 		pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "(NULL==pHalmac_platform_api->EVENT_INDICATION)\n");
 		return HALMAC_RET_PLATFORM_API_NULL;
 	}
@@ -396,6 +376,13 @@ halmac_check_platform_api(
 	return HALMAC_RET_SUCCESS;
 }
 
+/**
+ * halmac_get_version() - get HALMAC version
+ * @version : return version of major, prototype and minor information
+ * Author : KaiYuan Chang / Ivan Lin
+ * Return : HALMAC_RET_STATUS
+ * More details of status code can be found in prototype document
+ */
 HALMAC_RET_STATUS
 halmac_get_version(
 	OUT	HALMAC_VER *version
@@ -408,7 +395,7 @@ halmac_get_version(
 	return HALMAC_RET_SUCCESS;
 }
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_get_chip_info(
 	IN VOID	*pDriver_adapter,
 	IN PHALMAC_PLATFORM_API pHalmac_platform_api,
@@ -423,16 +410,14 @@ halmac_get_chip_info(
 	pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
 
 	/* Get Chip_id and Chip_version */
-	if (HALMAC_INTERFACE_SDIO == pHalmac_adapter->halmac_interface) {
-		chip_id = platform_reg_read_8_sdio(pDriver_adapter, pHalmac_platform_api, REG_SYS_CFG2);
-		if (chip_id == 0xEA) {
-			plarform_reg_write_8_sdio(pDriver_adapter, pHalmac_platform_api, REG_SDIO_HSUS_CTRL, platform_reg_read_8_sdio(pDriver_adapter, pHalmac_platform_api, REG_SDIO_HSUS_CTRL) & ~(BIT(0)));
-			polling_count = HALMAC_POLLING_READY_TIMEOUT_COUNT;
-			while (!(platform_reg_read_8_sdio(pDriver_adapter, pHalmac_platform_api, REG_SDIO_HSUS_CTRL) & 0x02)) {
-				polling_count--;
-				if (polling_count == 0)
-					return HALMAC_RET_SDIO_LEAVE_SUSPEND_FAIL;
-			}
+	if (pHalmac_adapter->halmac_interface == HALMAC_INTERFACE_SDIO) {
+		plarform_reg_write_8_sdio(pDriver_adapter, pHalmac_platform_api, REG_SDIO_HSUS_CTRL, platform_reg_read_8_sdio(pDriver_adapter, pHalmac_platform_api, REG_SDIO_HSUS_CTRL) & ~(BIT(0)));
+
+		polling_count = 10000;
+		while (!(platform_reg_read_8_sdio(pDriver_adapter, pHalmac_platform_api, REG_SDIO_HSUS_CTRL) & 0x02)) {
+			polling_count--;
+			if (polling_count == 0)
+				return HALMAC_RET_SDIO_LEAVE_SUSPEND_FAIL;
 		}
 
 		chip_id = platform_reg_read_8_sdio(pDriver_adapter, pHalmac_platform_api, REG_SYS_CFG2);
@@ -442,17 +427,20 @@ halmac_get_chip_info(
 		chip_version = pHalmac_platform_api->REG_READ_8(pDriver_adapter, REG_SYS_CFG1 + 1) >> 4;
 	}
 
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]Chip id : 0x%X\n", chip_id);
+	PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "[TRACE]Chip version : 0x%X\n", chip_version);
+
 	pHalmac_adapter->chip_version = (HALMAC_CHIP_VER)chip_version;
 
-	if (HALMAC_CHIP_ID_HW_DEF_8822B == chip_id)
+	if (chip_id == HALMAC_CHIP_ID_HW_DEF_8822B) {
 		pHalmac_adapter->chip_id = HALMAC_CHIP_ID_8822B;
-	else if (HALMAC_CHIP_ID_HW_DEF_8821C == chip_id)
+	} else if (chip_id == HALMAC_CHIP_ID_HW_DEF_8821C) {
 		pHalmac_adapter->chip_id = HALMAC_CHIP_ID_8821C;
-	else if (HALMAC_CHIP_ID_HW_DEF_8814B == chip_id)
+	} else if (chip_id == HALMAC_CHIP_ID_HW_DEF_8814B) {
 		pHalmac_adapter->chip_id = HALMAC_CHIP_ID_8814B;
-	else if (HALMAC_CHIP_ID_HW_DEF_8197F == chip_id)
+	} else if (chip_id == HALMAC_CHIP_ID_HW_DEF_8197F) {
 		pHalmac_adapter->chip_id = HALMAC_CHIP_ID_8197F;
-	else {
+	} else {
 		pHalmac_adapter->chip_id = HALMAC_CHIP_ID_UNDEFINE;
 		return HALMAC_RET_CHIP_NOT_SUPPORT;
 	}
@@ -460,7 +448,7 @@ halmac_get_chip_info(
 	return HALMAC_RET_SUCCESS;
 }
 
-u8
+static u8
 platform_reg_read_8_sdio(
 	IN VOID	*pDriver_adapter,
 	IN PHALMAC_PLATFORM_API pHalmac_platform_api,
@@ -475,7 +463,7 @@ platform_reg_read_8_sdio(
 		halmac_offset |= WLAN_IOREG_OFFSET;
 
 	status = halmac_convert_to_sdio_bus_offset(&halmac_offset);
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "platform_reg_read_8_sdio error = %x\n", status);
 		return status;
 	}
@@ -485,7 +473,7 @@ platform_reg_read_8_sdio(
 	return value8;
 }
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 plarform_reg_write_8_sdio(
 	IN VOID	*pDriver_adapter,
 	IN PHALMAC_PLATFORM_API pHalmac_platform_api,
@@ -501,7 +489,7 @@ plarform_reg_write_8_sdio(
 
 	status = halmac_convert_to_sdio_bus_offset(&halmac_offset);
 
-	if (HALMAC_RET_SUCCESS != status) {
+	if (status != HALMAC_RET_SUCCESS) {
 		pHalmac_platform_api->MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_reg_write_8_sdio_88xx error = %x\n", status);
 		return status;
 	}
@@ -511,18 +499,17 @@ plarform_reg_write_8_sdio(
 }
 
 
-HALMAC_RET_STATUS
+static HALMAC_RET_STATUS
 halmac_convert_to_sdio_bus_offset(
 	INOUT u32 *halmac_offset
 )
 {
-
 	switch ((*halmac_offset) & 0xFFFF0000) {
 	case WLAN_IOREG_OFFSET:
-		*halmac_offset = (WLAN_IOREG_DEVICE_ID << 13) | (*halmac_offset & HALMAC_WLAN_IOREG_MSK);
+		*halmac_offset = (HALMAC_SDIO_CMD_ADDR_MAC_REG << 13) | (*halmac_offset & HALMAC_WLAN_MAC_REG_MSK);
 		break;
 	case SDIO_LOCAL_OFFSET:
-		*halmac_offset = (SDIO_LOCAL_DEVICE_ID << 13) | (*halmac_offset & HALMAC_SDIO_LOCAL_MSK);
+		*halmac_offset = (HALMAC_SDIO_CMD_ADDR_SDIO_REG << 13) | (*halmac_offset & HALMAC_SDIO_LOCAL_MSK);
 		break;
 	default:
 		*halmac_offset = 0xFFFFFFFF;
diff --git a/rtl8822BU/hal/halmac/halmac_api.h b/rtl8822BU/hal/halmac/halmac_api.h
index 6528888..c4a41fa 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_api.h
+++ b/rtl8822BU/hal/halmac/halmac_api.h
@@ -1,14 +1,27 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_API_H_
 #define _HALMAC_API_H_
 
 #define HALMAC_SVN_VER  "13348M"
 
-/* major version, ver_1 for async_api */
-#define HALMAC_MAJOR_VER        0x0001
-/* For halmac_api num change or prototype change, increment prototype version */
-#define HALMAC_PROTOTYPE_VER    0x0003
-/* else increment minor version */
-#define HALMAC_MINOR_VER        0x0002
+#define HALMAC_MAJOR_VER        0x0001		/* major version, ver_1 for async_api */
+#define HALMAC_PROTOTYPE_VER    0x0003		/* For halmac_api num change or prototype change, increment prototype version */
+#define HALMAC_MINOR_VER        0x0009		/* else increment minor version */
+#define HALMAC_PATCH_VER        0x0001		/* patch version */
 
 #include "halmac_2_platform.h"
 #include "halmac_hw_cfg.h"
@@ -57,12 +70,6 @@
 #if HALMAC_8821C_SUPPORT
 #include "halmac_88xx/halmac_win8821c_cfg.h"
 #endif
-#if HALMAC_8197F_SUPPORT
-#include "halmac_88xx/halmac_win8197f_cfg.h"
-#endif
-#if HALMAC_8814B_SUPPORT
-#include "halmac_88xx/halmac_win8814b_cfg.h"
-#endif
 
 #else
 #include "halmac_88xx/halmac_88xx_cfg.h"
@@ -80,19 +87,6 @@
 #include "halmac_bit_8821c.h"
 #endif
 
-#if HALMAC_8197F_SUPPORT
-#include "halmac_88xx/halmac_8197f/halmac_8197f_cfg.h"
-
-#endif
-
-#if HALMAC_8814B_SUPPORT
-#include "halmac_88xx/halmac_8814b/halmac_8814b_cfg.h"
-#include "halmac_reg_8814b.h"
-#include "halmac_bit_8814b.h"
-#endif
-
-
-
 HALMAC_RET_STATUS
 halmac_init_adapter(
 	IN VOID *pDriver_adapter,
diff --git a/rtl8822BU/hal/halmac/halmac_bit2.h b/rtl8822BU/hal/halmac/halmac_bit2.h
index d7c745c..cda17c6 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_bit2.h
+++ b/rtl8822BU/hal/halmac/halmac_bit2.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef __RTL_WLAN_BITDEF_H__
 #define __RTL_WLAN_BITDEF_H__
 
@@ -18000,7 +18015,7 @@ Example:
 #endif
 
 
-#if (HALMAC_8192E_SUPPORT || HALMAC_8881A_SUPPORT)
+#if (HALMAC_8192E_SUPPORT || HALMAC_8881A_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8821C_SUPPORT || HALMAC_8822B_SUPPORT)
 
 
 /* 2 REG_RXDMA_AGG_PG_TH			(Offset 0x0280) */
@@ -18030,7 +18045,7 @@ Example:
 #endif
 
 
-#if (HALMAC_8814A_SUPPORT || HALMAC_8814AMP_SUPPORT || HALMAC_8814B_SUPPORT || HALMAC_8821C_SUPPORT || HALMAC_8822B_SUPPORT)
+#if (HALMAC_8814A_SUPPORT || HALMAC_8814AMP_SUPPORT)
 
 
 /* 2 REG_RXDMA_AGG_PG_TH			(Offset 0x0280) */
diff --git a/rtl8822BU/hal/halmac/halmac_bit_8197f.h b/rtl8822BU/hal/halmac/halmac_bit_8197f.h
index da10b49..2661a70 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_bit_8197f.h
+++ b/rtl8822BU/hal/halmac/halmac_bit_8197f.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef __INC_HALMAC_BIT_8197F_H
 #define __INC_HALMAC_BIT_8197F_H
 
diff --git a/rtl8822BU/hal/halmac/halmac_bit_8814b.h b/rtl8822BU/hal/halmac/halmac_bit_8814b.h
index 0d6e247..0db3a36 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_bit_8814b.h
+++ b/rtl8822BU/hal/halmac/halmac_bit_8814b.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef __INC_HALMAC_BIT_8814B_H
 #define __INC_HALMAC_BIT_8814B_H
 
@@ -92,13 +107,15 @@
 #define BIT_SHIFT_VPDIDX_8814B 8
 #define BIT_MASK_VPDIDX_8814B 0xff
 #define BIT_VPDIDX_8814B(x) (((x) & BIT_MASK_VPDIDX_8814B) << BIT_SHIFT_VPDIDX_8814B)
-#define BIT_GET_VPDIDX_8814B(x) (((x) >> BIT_SHIFT_VPDIDX_8814B) & BIT_MASK_VPDIDX_8814B)

+#define BIT_GET_VPDIDX_8814B(x) (((x) >> BIT_SHIFT_VPDIDX_8814B) & BIT_MASK_VPDIDX_8814B)
+
 
 
 #define BIT_SHIFT_EEM1_0_8814B 6
 #define BIT_MASK_EEM1_0_8814B 0x3
 #define BIT_EEM1_0_8814B(x) (((x) & BIT_MASK_EEM1_0_8814B) << BIT_SHIFT_EEM1_0_8814B)
-#define BIT_GET_EEM1_0_8814B(x) (((x) >> BIT_SHIFT_EEM1_0_8814B) & BIT_MASK_EEM1_0_8814B)

+#define BIT_GET_EEM1_0_8814B(x) (((x) >> BIT_SHIFT_EEM1_0_8814B) & BIT_MASK_EEM1_0_8814B)
+
 
 #define BIT_AUTOLOAD_SUS_8814B BIT(5)
 #define BIT_EERPOMSEL_8814B BIT(4)
@@ -112,7 +129,8 @@
 #define BIT_SHIFT_VPD_DATA_8814B 0
 #define BIT_MASK_VPD_DATA_8814B 0xffffffffL
 #define BIT_VPD_DATA_8814B(x) (((x) & BIT_MASK_VPD_DATA_8814B) << BIT_SHIFT_VPD_DATA_8814B)
-#define BIT_GET_VPD_DATA_8814B(x) (((x) >> BIT_SHIFT_VPD_DATA_8814B) & BIT_MASK_VPD_DATA_8814B)

+#define BIT_GET_VPD_DATA_8814B(x) (((x) >> BIT_SHIFT_VPD_DATA_8814B) & BIT_MASK_VPD_DATA_8814B)
+
 
 
 /* 2 REG_SYS_SWR_CTRL1_8814B */
@@ -121,20 +139,23 @@
 #define BIT_SHIFT_C1_L_8814B 29
 #define BIT_MASK_C1_L_8814B 0x3
 #define BIT_C1_L_8814B(x) (((x) & BIT_MASK_C1_L_8814B) << BIT_SHIFT_C1_L_8814B)
-#define BIT_GET_C1_L_8814B(x) (((x) >> BIT_SHIFT_C1_L_8814B) & BIT_MASK_C1_L_8814B)

+#define BIT_GET_C1_L_8814B(x) (((x) >> BIT_SHIFT_C1_L_8814B) & BIT_MASK_C1_L_8814B)
+
 
 
 #define BIT_SHIFT_REG_FREQ_L_8814B 25
 #define BIT_MASK_REG_FREQ_L_8814B 0x7
 #define BIT_REG_FREQ_L_8814B(x) (((x) & BIT_MASK_REG_FREQ_L_8814B) << BIT_SHIFT_REG_FREQ_L_8814B)
-#define BIT_GET_REG_FREQ_L_8814B(x) (((x) >> BIT_SHIFT_REG_FREQ_L_8814B) & BIT_MASK_REG_FREQ_L_8814B)

+#define BIT_GET_REG_FREQ_L_8814B(x) (((x) >> BIT_SHIFT_REG_FREQ_L_8814B) & BIT_MASK_REG_FREQ_L_8814B)
+
 
 #define BIT_REG_EN_DUTY_8814B BIT(24)
 
 #define BIT_SHIFT_REG_MODE_8814B 22
 #define BIT_MASK_REG_MODE_8814B 0x3
 #define BIT_REG_MODE_8814B(x) (((x) & BIT_MASK_REG_MODE_8814B) << BIT_SHIFT_REG_MODE_8814B)
-#define BIT_GET_REG_MODE_8814B(x) (((x) >> BIT_SHIFT_REG_MODE_8814B) & BIT_MASK_REG_MODE_8814B)

+#define BIT_GET_REG_MODE_8814B(x) (((x) >> BIT_SHIFT_REG_MODE_8814B) & BIT_MASK_REG_MODE_8814B)
+
 
 #define BIT_REG_EN_SP_8814B BIT(21)
 #define BIT_REG_AUTO_L_8814B BIT(20)
@@ -144,13 +165,15 @@
 #define BIT_SHIFT_OCP_L1_8814B 15
 #define BIT_MASK_OCP_L1_8814B 0x7
 #define BIT_OCP_L1_8814B(x) (((x) & BIT_MASK_OCP_L1_8814B) << BIT_SHIFT_OCP_L1_8814B)
-#define BIT_GET_OCP_L1_8814B(x) (((x) >> BIT_SHIFT_OCP_L1_8814B) & BIT_MASK_OCP_L1_8814B)

+#define BIT_GET_OCP_L1_8814B(x) (((x) >> BIT_SHIFT_OCP_L1_8814B) & BIT_MASK_OCP_L1_8814B)
+
 
 
 #define BIT_SHIFT_CF_L_8814B 13
 #define BIT_MASK_CF_L_8814B 0x3
 #define BIT_CF_L_8814B(x) (((x) & BIT_MASK_CF_L_8814B) << BIT_SHIFT_CF_L_8814B)
-#define BIT_GET_CF_L_8814B(x) (((x) >> BIT_SHIFT_CF_L_8814B) & BIT_MASK_CF_L_8814B)

+#define BIT_GET_CF_L_8814B(x) (((x) >> BIT_SHIFT_CF_L_8814B) & BIT_MASK_CF_L_8814B)
+
 
 #define BIT_SW18_FPWM_8814B BIT(11)
 #define BIT_SW18_SWEN_8814B BIT(9)
@@ -165,31 +188,36 @@
 #define BIT_SHIFT_REG_DELAY_8814B 28
 #define BIT_MASK_REG_DELAY_8814B 0x3
 #define BIT_REG_DELAY_8814B(x) (((x) & BIT_MASK_REG_DELAY_8814B) << BIT_SHIFT_REG_DELAY_8814B)
-#define BIT_GET_REG_DELAY_8814B(x) (((x) >> BIT_SHIFT_REG_DELAY_8814B) & BIT_MASK_REG_DELAY_8814B)

+#define BIT_GET_REG_DELAY_8814B(x) (((x) >> BIT_SHIFT_REG_DELAY_8814B) & BIT_MASK_REG_DELAY_8814B)
+
 
 
 #define BIT_SHIFT_V15ADJ_L1_V1_8814B 24
 #define BIT_MASK_V15ADJ_L1_V1_8814B 0x7
 #define BIT_V15ADJ_L1_V1_8814B(x) (((x) & BIT_MASK_V15ADJ_L1_V1_8814B) << BIT_SHIFT_V15ADJ_L1_V1_8814B)
-#define BIT_GET_V15ADJ_L1_V1_8814B(x) (((x) >> BIT_SHIFT_V15ADJ_L1_V1_8814B) & BIT_MASK_V15ADJ_L1_V1_8814B)

+#define BIT_GET_V15ADJ_L1_V1_8814B(x) (((x) >> BIT_SHIFT_V15ADJ_L1_V1_8814B) & BIT_MASK_V15ADJ_L1_V1_8814B)
+
 
 
 #define BIT_SHIFT_VOL_L1_V1_8814B 20
 #define BIT_MASK_VOL_L1_V1_8814B 0xf
 #define BIT_VOL_L1_V1_8814B(x) (((x) & BIT_MASK_VOL_L1_V1_8814B) << BIT_SHIFT_VOL_L1_V1_8814B)
-#define BIT_GET_VOL_L1_V1_8814B(x) (((x) >> BIT_SHIFT_VOL_L1_V1_8814B) & BIT_MASK_VOL_L1_V1_8814B)

+#define BIT_GET_VOL_L1_V1_8814B(x) (((x) >> BIT_SHIFT_VOL_L1_V1_8814B) & BIT_MASK_VOL_L1_V1_8814B)
+
 
 
 #define BIT_SHIFT_IN_L1_V1_8814B 17
 #define BIT_MASK_IN_L1_V1_8814B 0x7
 #define BIT_IN_L1_V1_8814B(x) (((x) & BIT_MASK_IN_L1_V1_8814B) << BIT_SHIFT_IN_L1_V1_8814B)
-#define BIT_GET_IN_L1_V1_8814B(x) (((x) >> BIT_SHIFT_IN_L1_V1_8814B) & BIT_MASK_IN_L1_V1_8814B)

+#define BIT_GET_IN_L1_V1_8814B(x) (((x) >> BIT_SHIFT_IN_L1_V1_8814B) & BIT_MASK_IN_L1_V1_8814B)
+
 
 
 #define BIT_SHIFT_TBOX_L1_8814B 15
 #define BIT_MASK_TBOX_L1_8814B 0x3
 #define BIT_TBOX_L1_8814B(x) (((x) & BIT_MASK_TBOX_L1_8814B) << BIT_SHIFT_TBOX_L1_8814B)
-#define BIT_GET_TBOX_L1_8814B(x) (((x) >> BIT_SHIFT_TBOX_L1_8814B) & BIT_MASK_TBOX_L1_8814B)

+#define BIT_GET_TBOX_L1_8814B(x) (((x) >> BIT_SHIFT_TBOX_L1_8814B) & BIT_MASK_TBOX_L1_8814B)
+
 
 #define BIT_SW18_SEL_8814B BIT(13)
 
@@ -199,25 +227,29 @@
 #define BIT_SHIFT_R3_L_8814B 7
 #define BIT_MASK_R3_L_8814B 0x3
 #define BIT_R3_L_8814B(x) (((x) & BIT_MASK_R3_L_8814B) << BIT_SHIFT_R3_L_8814B)
-#define BIT_GET_R3_L_8814B(x) (((x) >> BIT_SHIFT_R3_L_8814B) & BIT_MASK_R3_L_8814B)

+#define BIT_GET_R3_L_8814B(x) (((x) >> BIT_SHIFT_R3_L_8814B) & BIT_MASK_R3_L_8814B)
+
 
 
 #define BIT_SHIFT_SW18_R2_8814B 5
 #define BIT_MASK_SW18_R2_8814B 0x3
 #define BIT_SW18_R2_8814B(x) (((x) & BIT_MASK_SW18_R2_8814B) << BIT_SHIFT_SW18_R2_8814B)
-#define BIT_GET_SW18_R2_8814B(x) (((x) >> BIT_SHIFT_SW18_R2_8814B) & BIT_MASK_SW18_R2_8814B)

+#define BIT_GET_SW18_R2_8814B(x) (((x) >> BIT_SHIFT_SW18_R2_8814B) & BIT_MASK_SW18_R2_8814B)
+
 
 
 #define BIT_SHIFT_SW18_R1_8814B 3
 #define BIT_MASK_SW18_R1_8814B 0x3
 #define BIT_SW18_R1_8814B(x) (((x) & BIT_MASK_SW18_R1_8814B) << BIT_SHIFT_SW18_R1_8814B)
-#define BIT_GET_SW18_R1_8814B(x) (((x) >> BIT_SHIFT_SW18_R1_8814B) & BIT_MASK_SW18_R1_8814B)

+#define BIT_GET_SW18_R1_8814B(x) (((x) >> BIT_SHIFT_SW18_R1_8814B) & BIT_MASK_SW18_R1_8814B)
+
 
 
 #define BIT_SHIFT_C3_L_C3_8814B 1
 #define BIT_MASK_C3_L_C3_8814B 0x3
 #define BIT_C3_L_C3_8814B(x) (((x) & BIT_MASK_C3_L_C3_8814B) << BIT_SHIFT_C3_L_C3_8814B)
-#define BIT_GET_C3_L_C3_8814B(x) (((x) >> BIT_SHIFT_C3_L_C3_8814B) & BIT_MASK_C3_L_C3_8814B)

+#define BIT_GET_C3_L_C3_8814B(x) (((x) >> BIT_SHIFT_C3_L_C3_8814B) & BIT_MASK_C3_L_C3_8814B)
+
 
 #define BIT_C2_L_BIT1_8814B BIT(0)
 
@@ -227,13 +259,15 @@
 #define BIT_SHIFT_SPS18_OCP_TH_8814B 16
 #define BIT_MASK_SPS18_OCP_TH_8814B 0x7fff
 #define BIT_SPS18_OCP_TH_8814B(x) (((x) & BIT_MASK_SPS18_OCP_TH_8814B) << BIT_SHIFT_SPS18_OCP_TH_8814B)
-#define BIT_GET_SPS18_OCP_TH_8814B(x) (((x) >> BIT_SHIFT_SPS18_OCP_TH_8814B) & BIT_MASK_SPS18_OCP_TH_8814B)

+#define BIT_GET_SPS18_OCP_TH_8814B(x) (((x) >> BIT_SHIFT_SPS18_OCP_TH_8814B) & BIT_MASK_SPS18_OCP_TH_8814B)
+
 
 
 #define BIT_SHIFT_OCP_WINDOW_8814B 0
 #define BIT_MASK_OCP_WINDOW_8814B 0xffff
 #define BIT_OCP_WINDOW_8814B(x) (((x) & BIT_MASK_OCP_WINDOW_8814B) << BIT_SHIFT_OCP_WINDOW_8814B)
-#define BIT_GET_OCP_WINDOW_8814B(x) (((x) >> BIT_SHIFT_OCP_WINDOW_8814B) & BIT_MASK_OCP_WINDOW_8814B)

+#define BIT_GET_OCP_WINDOW_8814B(x) (((x) >> BIT_SHIFT_OCP_WINDOW_8814B) & BIT_MASK_OCP_WINDOW_8814B)
+
 
 
 /* 2 REG_RSV_CTRL_8814B */
@@ -258,14 +292,16 @@
 #define BIT_SHIFT_LPLDH12_RSV_8814B 29
 #define BIT_MASK_LPLDH12_RSV_8814B 0x7
 #define BIT_LPLDH12_RSV_8814B(x) (((x) & BIT_MASK_LPLDH12_RSV_8814B) << BIT_SHIFT_LPLDH12_RSV_8814B)
-#define BIT_GET_LPLDH12_RSV_8814B(x) (((x) >> BIT_SHIFT_LPLDH12_RSV_8814B) & BIT_MASK_LPLDH12_RSV_8814B)

+#define BIT_GET_LPLDH12_RSV_8814B(x) (((x) >> BIT_SHIFT_LPLDH12_RSV_8814B) & BIT_MASK_LPLDH12_RSV_8814B)
+
 
 #define BIT_LPLDH12_SLP_8814B BIT(28)
 
 #define BIT_SHIFT_LPLDH12_VADJ_8814B 24
 #define BIT_MASK_LPLDH12_VADJ_8814B 0xf
 #define BIT_LPLDH12_VADJ_8814B(x) (((x) & BIT_MASK_LPLDH12_VADJ_8814B) << BIT_SHIFT_LPLDH12_VADJ_8814B)
-#define BIT_GET_LPLDH12_VADJ_8814B(x) (((x) >> BIT_SHIFT_LPLDH12_VADJ_8814B) & BIT_MASK_LPLDH12_VADJ_8814B)

+#define BIT_GET_LPLDH12_VADJ_8814B(x) (((x) >> BIT_SHIFT_LPLDH12_VADJ_8814B) & BIT_MASK_LPLDH12_VADJ_8814B)
+
 
 #define BIT_PCIE_CALIB_EN_8814B BIT(17)
 #define BIT_LDH12_EN_8814B BIT(16)
@@ -291,39 +327,45 @@
 #define BIT_SHIFT_XTAL_CAP_XI_8814B 25
 #define BIT_MASK_XTAL_CAP_XI_8814B 0x3f
 #define BIT_XTAL_CAP_XI_8814B(x) (((x) & BIT_MASK_XTAL_CAP_XI_8814B) << BIT_SHIFT_XTAL_CAP_XI_8814B)
-#define BIT_GET_XTAL_CAP_XI_8814B(x) (((x) >> BIT_SHIFT_XTAL_CAP_XI_8814B) & BIT_MASK_XTAL_CAP_XI_8814B)

+#define BIT_GET_XTAL_CAP_XI_8814B(x) (((x) >> BIT_SHIFT_XTAL_CAP_XI_8814B) & BIT_MASK_XTAL_CAP_XI_8814B)
+
 
 
 #define BIT_SHIFT_XTAL_DRV_DIGI_8814B 23
 #define BIT_MASK_XTAL_DRV_DIGI_8814B 0x3
 #define BIT_XTAL_DRV_DIGI_8814B(x) (((x) & BIT_MASK_XTAL_DRV_DIGI_8814B) << BIT_SHIFT_XTAL_DRV_DIGI_8814B)
-#define BIT_GET_XTAL_DRV_DIGI_8814B(x) (((x) >> BIT_SHIFT_XTAL_DRV_DIGI_8814B) & BIT_MASK_XTAL_DRV_DIGI_8814B)

+#define BIT_GET_XTAL_DRV_DIGI_8814B(x) (((x) >> BIT_SHIFT_XTAL_DRV_DIGI_8814B) & BIT_MASK_XTAL_DRV_DIGI_8814B)
+
 
 #define BIT_XTAL_DRV_USB_BIT1_8814B BIT(22)
 
 #define BIT_SHIFT_MAC_CLK_SEL_8814B 20
 #define BIT_MASK_MAC_CLK_SEL_8814B 0x3
 #define BIT_MAC_CLK_SEL_8814B(x) (((x) & BIT_MASK_MAC_CLK_SEL_8814B) << BIT_SHIFT_MAC_CLK_SEL_8814B)
-#define BIT_GET_MAC_CLK_SEL_8814B(x) (((x) >> BIT_SHIFT_MAC_CLK_SEL_8814B) & BIT_MASK_MAC_CLK_SEL_8814B)

+#define BIT_GET_MAC_CLK_SEL_8814B(x) (((x) >> BIT_SHIFT_MAC_CLK_SEL_8814B) & BIT_MASK_MAC_CLK_SEL_8814B)
+
 
 #define BIT_XTAL_DRV_USB_BIT0_8814B BIT(19)
 
 #define BIT_SHIFT_XTAL_DRV_AFE_8814B 17
 #define BIT_MASK_XTAL_DRV_AFE_8814B 0x3
 #define BIT_XTAL_DRV_AFE_8814B(x) (((x) & BIT_MASK_XTAL_DRV_AFE_8814B) << BIT_SHIFT_XTAL_DRV_AFE_8814B)
-#define BIT_GET_XTAL_DRV_AFE_8814B(x) (((x) >> BIT_SHIFT_XTAL_DRV_AFE_8814B) & BIT_MASK_XTAL_DRV_AFE_8814B)

+#define BIT_GET_XTAL_DRV_AFE_8814B(x) (((x) >> BIT_SHIFT_XTAL_DRV_AFE_8814B) & BIT_MASK_XTAL_DRV_AFE_8814B)
+
 
 
 #define BIT_SHIFT_XTAL_DRV_RF2_8814B 15
 #define BIT_MASK_XTAL_DRV_RF2_8814B 0x3
 #define BIT_XTAL_DRV_RF2_8814B(x) (((x) & BIT_MASK_XTAL_DRV_RF2_8814B) << BIT_SHIFT_XTAL_DRV_RF2_8814B)
-#define BIT_GET_XTAL_DRV_RF2_8814B(x) (((x) >> BIT_SHIFT_XTAL_DRV_RF2_8814B) & BIT_MASK_XTAL_DRV_RF2_8814B)

+#define BIT_GET_XTAL_DRV_RF2_8814B(x) (((x) >> BIT_SHIFT_XTAL_DRV_RF2_8814B) & BIT_MASK_XTAL_DRV_RF2_8814B)
+
 
 
 #define BIT_SHIFT_XTAL_DRV_RF1_8814B 13
 #define BIT_MASK_XTAL_DRV_RF1_8814B 0x3
 #define BIT_XTAL_DRV_RF1_8814B(x) (((x) & BIT_MASK_XTAL_DRV_RF1_8814B) << BIT_SHIFT_XTAL_DRV_RF1_8814B)
-#define BIT_GET_XTAL_DRV_RF1_8814B(x) (((x) >> BIT_SHIFT_XTAL_DRV_RF1_8814B) & BIT_MASK_XTAL_DRV_RF1_8814B)

+#define BIT_GET_XTAL_DRV_RF1_8814B(x) (((x) >> BIT_SHIFT_XTAL_DRV_RF1_8814B) & BIT_MASK_XTAL_DRV_RF1_8814B)
+
 
 #define BIT_XTAL_DELAY_DIGI_8814B BIT(12)
 #define BIT_XTAL_DELAY_USB_8814B BIT(11)
@@ -332,7 +374,8 @@
 #define BIT_SHIFT_XTAL_LDO_VREF_8814B 7
 #define BIT_MASK_XTAL_LDO_VREF_8814B 0x7
 #define BIT_XTAL_LDO_VREF_8814B(x) (((x) & BIT_MASK_XTAL_LDO_VREF_8814B) << BIT_SHIFT_XTAL_LDO_VREF_8814B)
-#define BIT_GET_XTAL_LDO_VREF_8814B(x) (((x) >> BIT_SHIFT_XTAL_LDO_VREF_8814B) & BIT_MASK_XTAL_LDO_VREF_8814B)

+#define BIT_GET_XTAL_LDO_VREF_8814B(x) (((x) >> BIT_SHIFT_XTAL_LDO_VREF_8814B) & BIT_MASK_XTAL_LDO_VREF_8814B)
+
 
 #define BIT_XTAL_XQSEL_RF_8814B BIT(6)
 #define BIT_XTAL_XQSEL_8814B BIT(5)
@@ -340,13 +383,15 @@
 #define BIT_SHIFT_XTAL_GMN_V2_8814B 3
 #define BIT_MASK_XTAL_GMN_V2_8814B 0x3
 #define BIT_XTAL_GMN_V2_8814B(x) (((x) & BIT_MASK_XTAL_GMN_V2_8814B) << BIT_SHIFT_XTAL_GMN_V2_8814B)
-#define BIT_GET_XTAL_GMN_V2_8814B(x) (((x) >> BIT_SHIFT_XTAL_GMN_V2_8814B) & BIT_MASK_XTAL_GMN_V2_8814B)

+#define BIT_GET_XTAL_GMN_V2_8814B(x) (((x) >> BIT_SHIFT_XTAL_GMN_V2_8814B) & BIT_MASK_XTAL_GMN_V2_8814B)
+
 
 
 #define BIT_SHIFT_XTAL_GMP_V2_8814B 1
 #define BIT_MASK_XTAL_GMP_V2_8814B 0x3
 #define BIT_XTAL_GMP_V2_8814B(x) (((x) & BIT_MASK_XTAL_GMP_V2_8814B) << BIT_SHIFT_XTAL_GMP_V2_8814B)
-#define BIT_GET_XTAL_GMP_V2_8814B(x) (((x) >> BIT_SHIFT_XTAL_GMP_V2_8814B) & BIT_MASK_XTAL_GMP_V2_8814B)

+#define BIT_GET_XTAL_GMP_V2_8814B(x) (((x) >> BIT_SHIFT_XTAL_GMP_V2_8814B) & BIT_MASK_XTAL_GMP_V2_8814B)
+
 
 #define BIT_XTAL_EN_8814B BIT(0)
 
@@ -355,32 +400,37 @@
 #define BIT_SHIFT_REG_C3_V4_8814B 30
 #define BIT_MASK_REG_C3_V4_8814B 0x3
 #define BIT_REG_C3_V4_8814B(x) (((x) & BIT_MASK_REG_C3_V4_8814B) << BIT_SHIFT_REG_C3_V4_8814B)
-#define BIT_GET_REG_C3_V4_8814B(x) (((x) >> BIT_SHIFT_REG_C3_V4_8814B) & BIT_MASK_REG_C3_V4_8814B)

+#define BIT_GET_REG_C3_V4_8814B(x) (((x) >> BIT_SHIFT_REG_C3_V4_8814B) & BIT_MASK_REG_C3_V4_8814B)
+
 
 #define BIT_REG_CP_BIT1_8814B BIT(29)
 
 #define BIT_SHIFT_REG_RS_V4_8814B 26
 #define BIT_MASK_REG_RS_V4_8814B 0x7
 #define BIT_REG_RS_V4_8814B(x) (((x) & BIT_MASK_REG_RS_V4_8814B) << BIT_SHIFT_REG_RS_V4_8814B)
-#define BIT_GET_REG_RS_V4_8814B(x) (((x) >> BIT_SHIFT_REG_RS_V4_8814B) & BIT_MASK_REG_RS_V4_8814B)

+#define BIT_GET_REG_RS_V4_8814B(x) (((x) >> BIT_SHIFT_REG_RS_V4_8814B) & BIT_MASK_REG_RS_V4_8814B)
+
 
 
 #define BIT_SHIFT_REG__CS_8814B 24
 #define BIT_MASK_REG__CS_8814B 0x3
 #define BIT_REG__CS_8814B(x) (((x) & BIT_MASK_REG__CS_8814B) << BIT_SHIFT_REG__CS_8814B)
-#define BIT_GET_REG__CS_8814B(x) (((x) >> BIT_SHIFT_REG__CS_8814B) & BIT_MASK_REG__CS_8814B)

+#define BIT_GET_REG__CS_8814B(x) (((x) >> BIT_SHIFT_REG__CS_8814B) & BIT_MASK_REG__CS_8814B)
+
 
 
 #define BIT_SHIFT_REG_CP_OFFSET_8814B 21
 #define BIT_MASK_REG_CP_OFFSET_8814B 0x7
 #define BIT_REG_CP_OFFSET_8814B(x) (((x) & BIT_MASK_REG_CP_OFFSET_8814B) << BIT_SHIFT_REG_CP_OFFSET_8814B)
-#define BIT_GET_REG_CP_OFFSET_8814B(x) (((x) >> BIT_SHIFT_REG_CP_OFFSET_8814B) & BIT_MASK_REG_CP_OFFSET_8814B)

+#define BIT_GET_REG_CP_OFFSET_8814B(x) (((x) >> BIT_SHIFT_REG_CP_OFFSET_8814B) & BIT_MASK_REG_CP_OFFSET_8814B)
+
 
 
 #define BIT_SHIFT_CP_BIAS_8814B 18
 #define BIT_MASK_CP_BIAS_8814B 0x7
 #define BIT_CP_BIAS_8814B(x) (((x) & BIT_MASK_CP_BIAS_8814B) << BIT_SHIFT_CP_BIAS_8814B)
-#define BIT_GET_CP_BIAS_8814B(x) (((x) >> BIT_SHIFT_CP_BIAS_8814B) & BIT_MASK_CP_BIAS_8814B)

+#define BIT_GET_CP_BIAS_8814B(x) (((x) >> BIT_SHIFT_CP_BIAS_8814B) & BIT_MASK_CP_BIAS_8814B)
+
 
 #define BIT_REG_IDOUBLE_V2_8814B BIT(17)
 #define BIT_EN_SYN_8814B BIT(16)
@@ -388,13 +438,15 @@
 #define BIT_SHIFT_MCCO_8814B 14
 #define BIT_MASK_MCCO_8814B 0x3
 #define BIT_MCCO_8814B(x) (((x) & BIT_MASK_MCCO_8814B) << BIT_SHIFT_MCCO_8814B)
-#define BIT_GET_MCCO_8814B(x) (((x) >> BIT_SHIFT_MCCO_8814B) & BIT_MASK_MCCO_8814B)

+#define BIT_GET_MCCO_8814B(x) (((x) >> BIT_SHIFT_MCCO_8814B) & BIT_MASK_MCCO_8814B)
+
 
 
 #define BIT_SHIFT_REG_LDO_SEL_8814B 12
 #define BIT_MASK_REG_LDO_SEL_8814B 0x3
 #define BIT_REG_LDO_SEL_8814B(x) (((x) & BIT_MASK_REG_LDO_SEL_8814B) << BIT_SHIFT_REG_LDO_SEL_8814B)
-#define BIT_GET_REG_LDO_SEL_8814B(x) (((x) >> BIT_SHIFT_REG_LDO_SEL_8814B) & BIT_MASK_REG_LDO_SEL_8814B)

+#define BIT_GET_REG_LDO_SEL_8814B(x) (((x) >> BIT_SHIFT_REG_LDO_SEL_8814B) & BIT_MASK_REG_LDO_SEL_8814B)
+
 
 #define BIT_REG_KVCO_V2_8814B BIT(10)
 #define BIT_AGPIO_GPO_8814B BIT(9)
@@ -402,13 +454,15 @@
 #define BIT_SHIFT_AGPIO_DRV_8814B 7
 #define BIT_MASK_AGPIO_DRV_8814B 0x3
 #define BIT_AGPIO_DRV_8814B(x) (((x) & BIT_MASK_AGPIO_DRV_8814B) << BIT_SHIFT_AGPIO_DRV_8814B)
-#define BIT_GET_AGPIO_DRV_8814B(x) (((x) >> BIT_SHIFT_AGPIO_DRV_8814B) & BIT_MASK_AGPIO_DRV_8814B)

+#define BIT_GET_AGPIO_DRV_8814B(x) (((x) >> BIT_SHIFT_AGPIO_DRV_8814B) & BIT_MASK_AGPIO_DRV_8814B)
+
 
 
 #define BIT_SHIFT_XTAL_CAP_XO_8814B 1
 #define BIT_MASK_XTAL_CAP_XO_8814B 0x3f
 #define BIT_XTAL_CAP_XO_8814B(x) (((x) & BIT_MASK_XTAL_CAP_XO_8814B) << BIT_SHIFT_XTAL_CAP_XO_8814B)
-#define BIT_GET_XTAL_CAP_XO_8814B(x) (((x) >> BIT_SHIFT_XTAL_CAP_XO_8814B) & BIT_MASK_XTAL_CAP_XO_8814B)

+#define BIT_GET_XTAL_CAP_XO_8814B(x) (((x) >> BIT_SHIFT_XTAL_CAP_XO_8814B) & BIT_MASK_XTAL_CAP_XO_8814B)
+
 
 #define BIT_POW_PLL_8814B BIT(0)
 
@@ -417,7 +471,8 @@
 #define BIT_SHIFT_PS_8814B 7
 #define BIT_MASK_PS_8814B 0x7
 #define BIT_PS_8814B(x) (((x) & BIT_MASK_PS_8814B) << BIT_SHIFT_PS_8814B)
-#define BIT_GET_PS_8814B(x) (((x) >> BIT_SHIFT_PS_8814B) & BIT_MASK_PS_8814B)

+#define BIT_GET_PS_8814B(x) (((x) >> BIT_SHIFT_PS_8814B) & BIT_MASK_PS_8814B)
+
 
 #define BIT_PSEN_8814B BIT(6)
 #define BIT_DOGENB_8814B BIT(5)
@@ -426,7 +481,8 @@
 #define BIT_SHIFT_REG_R3_V4_8814B 1
 #define BIT_MASK_REG_R3_V4_8814B 0x7
 #define BIT_REG_R3_V4_8814B(x) (((x) & BIT_MASK_REG_R3_V4_8814B) << BIT_SHIFT_REG_R3_V4_8814B)
-#define BIT_GET_REG_R3_V4_8814B(x) (((x) >> BIT_SHIFT_REG_R3_V4_8814B) & BIT_MASK_REG_R3_V4_8814B)

+#define BIT_GET_REG_R3_V4_8814B(x) (((x) >> BIT_SHIFT_REG_R3_V4_8814B) & BIT_MASK_REG_R3_V4_8814B)
+
 
 #define BIT_REG_CP_BIT0_8814B BIT(0)
 
@@ -436,19 +492,22 @@
 #define BIT_SHIFT_EF_PGPD_8814B 28
 #define BIT_MASK_EF_PGPD_8814B 0x7
 #define BIT_EF_PGPD_8814B(x) (((x) & BIT_MASK_EF_PGPD_8814B) << BIT_SHIFT_EF_PGPD_8814B)
-#define BIT_GET_EF_PGPD_8814B(x) (((x) >> BIT_SHIFT_EF_PGPD_8814B) & BIT_MASK_EF_PGPD_8814B)

+#define BIT_GET_EF_PGPD_8814B(x) (((x) >> BIT_SHIFT_EF_PGPD_8814B) & BIT_MASK_EF_PGPD_8814B)
+
 
 
 #define BIT_SHIFT_EF_RDT_8814B 24
 #define BIT_MASK_EF_RDT_8814B 0xf
 #define BIT_EF_RDT_8814B(x) (((x) & BIT_MASK_EF_RDT_8814B) << BIT_SHIFT_EF_RDT_8814B)
-#define BIT_GET_EF_RDT_8814B(x) (((x) >> BIT_SHIFT_EF_RDT_8814B) & BIT_MASK_EF_RDT_8814B)

+#define BIT_GET_EF_RDT_8814B(x) (((x) >> BIT_SHIFT_EF_RDT_8814B) & BIT_MASK_EF_RDT_8814B)
+
 
 
 #define BIT_SHIFT_EF_PGTS_8814B 20
 #define BIT_MASK_EF_PGTS_8814B 0xf
 #define BIT_EF_PGTS_8814B(x) (((x) & BIT_MASK_EF_PGTS_8814B) << BIT_SHIFT_EF_PGTS_8814B)
-#define BIT_GET_EF_PGTS_8814B(x) (((x) >> BIT_SHIFT_EF_PGTS_8814B) & BIT_MASK_EF_PGTS_8814B)

+#define BIT_GET_EF_PGTS_8814B(x) (((x) >> BIT_SHIFT_EF_PGTS_8814B) & BIT_MASK_EF_PGTS_8814B)
+
 
 #define BIT_EF_PDWN_8814B BIT(19)
 #define BIT_EF_ALDEN_8814B BIT(18)
@@ -456,13 +515,15 @@
 #define BIT_SHIFT_EF_ADDR_8814B 8
 #define BIT_MASK_EF_ADDR_8814B 0x3ff
 #define BIT_EF_ADDR_8814B(x) (((x) & BIT_MASK_EF_ADDR_8814B) << BIT_SHIFT_EF_ADDR_8814B)
-#define BIT_GET_EF_ADDR_8814B(x) (((x) >> BIT_SHIFT_EF_ADDR_8814B) & BIT_MASK_EF_ADDR_8814B)

+#define BIT_GET_EF_ADDR_8814B(x) (((x) >> BIT_SHIFT_EF_ADDR_8814B) & BIT_MASK_EF_ADDR_8814B)
+
 
 
 #define BIT_SHIFT_EF_DATA_8814B 0
 #define BIT_MASK_EF_DATA_8814B 0xff
 #define BIT_EF_DATA_8814B(x) (((x) & BIT_MASK_EF_DATA_8814B) << BIT_SHIFT_EF_DATA_8814B)
-#define BIT_GET_EF_DATA_8814B(x) (((x) >> BIT_SHIFT_EF_DATA_8814B) & BIT_MASK_EF_DATA_8814B)

+#define BIT_GET_EF_DATA_8814B(x) (((x) >> BIT_SHIFT_EF_DATA_8814B) & BIT_MASK_EF_DATA_8814B)
+
 
 
 /* 2 REG_LDO_EFUSE_CTRL_8814B */
@@ -471,34 +532,39 @@
 #define BIT_SHIFT_LDOE25_V12ADJ_L_8814B 27
 #define BIT_MASK_LDOE25_V12ADJ_L_8814B 0xf
 #define BIT_LDOE25_V12ADJ_L_8814B(x) (((x) & BIT_MASK_LDOE25_V12ADJ_L_8814B) << BIT_SHIFT_LDOE25_V12ADJ_L_8814B)
-#define BIT_GET_LDOE25_V12ADJ_L_8814B(x) (((x) >> BIT_SHIFT_LDOE25_V12ADJ_L_8814B) & BIT_MASK_LDOE25_V12ADJ_L_8814B)

+#define BIT_GET_LDOE25_V12ADJ_L_8814B(x) (((x) >> BIT_SHIFT_LDOE25_V12ADJ_L_8814B) & BIT_MASK_LDOE25_V12ADJ_L_8814B)
+
 
 #define BIT_EF_CRES_SEL_8814B BIT(26)
 
 #define BIT_SHIFT_EF_SCAN_START_V1_8814B 16
 #define BIT_MASK_EF_SCAN_START_V1_8814B 0x3ff
 #define BIT_EF_SCAN_START_V1_8814B(x) (((x) & BIT_MASK_EF_SCAN_START_V1_8814B) << BIT_SHIFT_EF_SCAN_START_V1_8814B)
-#define BIT_GET_EF_SCAN_START_V1_8814B(x) (((x) >> BIT_SHIFT_EF_SCAN_START_V1_8814B) & BIT_MASK_EF_SCAN_START_V1_8814B)

+#define BIT_GET_EF_SCAN_START_V1_8814B(x) (((x) >> BIT_SHIFT_EF_SCAN_START_V1_8814B) & BIT_MASK_EF_SCAN_START_V1_8814B)
+
 
 
 #define BIT_SHIFT_EF_SCAN_END_8814B 12
 #define BIT_MASK_EF_SCAN_END_8814B 0xf
 #define BIT_EF_SCAN_END_8814B(x) (((x) & BIT_MASK_EF_SCAN_END_8814B) << BIT_SHIFT_EF_SCAN_END_8814B)
-#define BIT_GET_EF_SCAN_END_8814B(x) (((x) >> BIT_SHIFT_EF_SCAN_END_8814B) & BIT_MASK_EF_SCAN_END_8814B)

+#define BIT_GET_EF_SCAN_END_8814B(x) (((x) >> BIT_SHIFT_EF_SCAN_END_8814B) & BIT_MASK_EF_SCAN_END_8814B)
+
 
 #define BIT_EF_PD_DIS_8814B BIT(11)
 
 #define BIT_SHIFT_EF_CELL_SEL_8814B 8
 #define BIT_MASK_EF_CELL_SEL_8814B 0x3
 #define BIT_EF_CELL_SEL_8814B(x) (((x) & BIT_MASK_EF_CELL_SEL_8814B) << BIT_SHIFT_EF_CELL_SEL_8814B)
-#define BIT_GET_EF_CELL_SEL_8814B(x) (((x) >> BIT_SHIFT_EF_CELL_SEL_8814B) & BIT_MASK_EF_CELL_SEL_8814B)

+#define BIT_GET_EF_CELL_SEL_8814B(x) (((x) >> BIT_SHIFT_EF_CELL_SEL_8814B) & BIT_MASK_EF_CELL_SEL_8814B)
+
 
 #define BIT_EF_TRPT_8814B BIT(7)
 
 #define BIT_SHIFT_EF_TTHD_8814B 0
 #define BIT_MASK_EF_TTHD_8814B 0x7f
 #define BIT_EF_TTHD_8814B(x) (((x) & BIT_MASK_EF_TTHD_8814B) << BIT_SHIFT_EF_TTHD_8814B)
-#define BIT_GET_EF_TTHD_8814B(x) (((x) >> BIT_SHIFT_EF_TTHD_8814B) & BIT_MASK_EF_TTHD_8814B)

+#define BIT_GET_EF_TTHD_8814B(x) (((x) >> BIT_SHIFT_EF_TTHD_8814B) & BIT_MASK_EF_TTHD_8814B)
+
 
 
 /* 2 REG_PWR_OPTION_CTRL_8814B */
@@ -506,19 +572,22 @@
 #define BIT_SHIFT_DBG_SEL_V1_8814B 16
 #define BIT_MASK_DBG_SEL_V1_8814B 0xff
 #define BIT_DBG_SEL_V1_8814B(x) (((x) & BIT_MASK_DBG_SEL_V1_8814B) << BIT_SHIFT_DBG_SEL_V1_8814B)
-#define BIT_GET_DBG_SEL_V1_8814B(x) (((x) >> BIT_SHIFT_DBG_SEL_V1_8814B) & BIT_MASK_DBG_SEL_V1_8814B)

+#define BIT_GET_DBG_SEL_V1_8814B(x) (((x) >> BIT_SHIFT_DBG_SEL_V1_8814B) & BIT_MASK_DBG_SEL_V1_8814B)
+
 
 
 #define BIT_SHIFT_DBG_SEL_BYTE_8814B 14
 #define BIT_MASK_DBG_SEL_BYTE_8814B 0x3
 #define BIT_DBG_SEL_BYTE_8814B(x) (((x) & BIT_MASK_DBG_SEL_BYTE_8814B) << BIT_SHIFT_DBG_SEL_BYTE_8814B)
-#define BIT_GET_DBG_SEL_BYTE_8814B(x) (((x) >> BIT_SHIFT_DBG_SEL_BYTE_8814B) & BIT_MASK_DBG_SEL_BYTE_8814B)

+#define BIT_GET_DBG_SEL_BYTE_8814B(x) (((x) >> BIT_SHIFT_DBG_SEL_BYTE_8814B) & BIT_MASK_DBG_SEL_BYTE_8814B)
+
 
 
 #define BIT_SHIFT_STD_L1_V1_8814B 12
 #define BIT_MASK_STD_L1_V1_8814B 0x3
 #define BIT_STD_L1_V1_8814B(x) (((x) & BIT_MASK_STD_L1_V1_8814B) << BIT_SHIFT_STD_L1_V1_8814B)
-#define BIT_GET_STD_L1_V1_8814B(x) (((x) >> BIT_SHIFT_STD_L1_V1_8814B) & BIT_MASK_STD_L1_V1_8814B)

+#define BIT_GET_STD_L1_V1_8814B(x) (((x) >> BIT_SHIFT_STD_L1_V1_8814B) & BIT_MASK_STD_L1_V1_8814B)
+
 
 #define BIT_SYSON_DBG_PAD_E2_8814B BIT(11)
 #define BIT_SYSON_LED_PAD_E2_8814B BIT(10)
@@ -529,19 +598,22 @@
 #define BIT_SHIFT_SYSON_SPS0WWV_WT_8814B 4
 #define BIT_MASK_SYSON_SPS0WWV_WT_8814B 0x3
 #define BIT_SYSON_SPS0WWV_WT_8814B(x) (((x) & BIT_MASK_SYSON_SPS0WWV_WT_8814B) << BIT_SHIFT_SYSON_SPS0WWV_WT_8814B)
-#define BIT_GET_SYSON_SPS0WWV_WT_8814B(x) (((x) >> BIT_SHIFT_SYSON_SPS0WWV_WT_8814B) & BIT_MASK_SYSON_SPS0WWV_WT_8814B)

+#define BIT_GET_SYSON_SPS0WWV_WT_8814B(x) (((x) >> BIT_SHIFT_SYSON_SPS0WWV_WT_8814B) & BIT_MASK_SYSON_SPS0WWV_WT_8814B)
+
 
 
 #define BIT_SHIFT_SYSON_SPS0LDO_WT_8814B 2
 #define BIT_MASK_SYSON_SPS0LDO_WT_8814B 0x3
 #define BIT_SYSON_SPS0LDO_WT_8814B(x) (((x) & BIT_MASK_SYSON_SPS0LDO_WT_8814B) << BIT_SHIFT_SYSON_SPS0LDO_WT_8814B)
-#define BIT_GET_SYSON_SPS0LDO_WT_8814B(x) (((x) >> BIT_SHIFT_SYSON_SPS0LDO_WT_8814B) & BIT_MASK_SYSON_SPS0LDO_WT_8814B)

+#define BIT_GET_SYSON_SPS0LDO_WT_8814B(x) (((x) >> BIT_SHIFT_SYSON_SPS0LDO_WT_8814B) & BIT_MASK_SYSON_SPS0LDO_WT_8814B)
+
 
 
 #define BIT_SHIFT_SYSON_RCLK_SCALE_8814B 0
 #define BIT_MASK_SYSON_RCLK_SCALE_8814B 0x3
 #define BIT_SYSON_RCLK_SCALE_8814B(x) (((x) & BIT_MASK_SYSON_RCLK_SCALE_8814B) << BIT_SHIFT_SYSON_RCLK_SCALE_8814B)
-#define BIT_GET_SYSON_RCLK_SCALE_8814B(x) (((x) >> BIT_SHIFT_SYSON_RCLK_SCALE_8814B) & BIT_MASK_SYSON_RCLK_SCALE_8814B)

+#define BIT_GET_SYSON_RCLK_SCALE_8814B(x) (((x) >> BIT_SHIFT_SYSON_RCLK_SCALE_8814B) & BIT_MASK_SYSON_RCLK_SCALE_8814B)
+
 
 
 /* 2 REG_CAL_TIMER_8814B */
@@ -549,13 +621,15 @@
 #define BIT_SHIFT_MATCH_CNT_8814B 8
 #define BIT_MASK_MATCH_CNT_8814B 0xff
 #define BIT_MATCH_CNT_8814B(x) (((x) & BIT_MASK_MATCH_CNT_8814B) << BIT_SHIFT_MATCH_CNT_8814B)
-#define BIT_GET_MATCH_CNT_8814B(x) (((x) >> BIT_SHIFT_MATCH_CNT_8814B) & BIT_MASK_MATCH_CNT_8814B)

+#define BIT_GET_MATCH_CNT_8814B(x) (((x) >> BIT_SHIFT_MATCH_CNT_8814B) & BIT_MASK_MATCH_CNT_8814B)
+
 
 
 #define BIT_SHIFT_CAL_SCAL_8814B 0
 #define BIT_MASK_CAL_SCAL_8814B 0xff
 #define BIT_CAL_SCAL_8814B(x) (((x) & BIT_MASK_CAL_SCAL_8814B) << BIT_SHIFT_CAL_SCAL_8814B)
-#define BIT_GET_CAL_SCAL_8814B(x) (((x) >> BIT_SHIFT_CAL_SCAL_8814B) & BIT_MASK_CAL_SCAL_8814B)

+#define BIT_GET_CAL_SCAL_8814B(x) (((x) >> BIT_SHIFT_CAL_SCAL_8814B) & BIT_MASK_CAL_SCAL_8814B)
+
 
 
 /* 2 REG_ACLK_MON_8814B */
@@ -563,14 +637,16 @@
 #define BIT_SHIFT_RCLK_MON_8814B 5
 #define BIT_MASK_RCLK_MON_8814B 0x7ff
 #define BIT_RCLK_MON_8814B(x) (((x) & BIT_MASK_RCLK_MON_8814B) << BIT_SHIFT_RCLK_MON_8814B)
-#define BIT_GET_RCLK_MON_8814B(x) (((x) >> BIT_SHIFT_RCLK_MON_8814B) & BIT_MASK_RCLK_MON_8814B)

+#define BIT_GET_RCLK_MON_8814B(x) (((x) >> BIT_SHIFT_RCLK_MON_8814B) & BIT_MASK_RCLK_MON_8814B)
+
 
 #define BIT_CAL_EN_8814B BIT(4)
 
 #define BIT_SHIFT_DPSTU_8814B 2
 #define BIT_MASK_DPSTU_8814B 0x3
 #define BIT_DPSTU_8814B(x) (((x) & BIT_MASK_DPSTU_8814B) << BIT_SHIFT_DPSTU_8814B)
-#define BIT_GET_DPSTU_8814B(x) (((x) >> BIT_SHIFT_DPSTU_8814B) & BIT_MASK_DPSTU_8814B)

+#define BIT_GET_DPSTU_8814B(x) (((x) >> BIT_SHIFT_DPSTU_8814B) & BIT_MASK_DPSTU_8814B)
+
 
 #define BIT_SUS_16X_8814B BIT(1)
 
@@ -589,7 +665,8 @@
 #define BIT_SHIFT_BTMODE_8814B 6
 #define BIT_MASK_BTMODE_8814B 0x3
 #define BIT_BTMODE_8814B(x) (((x) & BIT_MASK_BTMODE_8814B) << BIT_SHIFT_BTMODE_8814B)
-#define BIT_GET_BTMODE_8814B(x) (((x) >> BIT_SHIFT_BTMODE_8814B) & BIT_MASK_BTMODE_8814B)

+#define BIT_GET_BTMODE_8814B(x) (((x) >> BIT_SHIFT_BTMODE_8814B) & BIT_MASK_BTMODE_8814B)
+
 
 #define BIT_ENBT_8814B BIT(5)
 #define BIT_EROM_EN_8814B BIT(4)
@@ -599,7 +676,8 @@
 #define BIT_SHIFT_GPIOSEL_8814B 0
 #define BIT_MASK_GPIOSEL_8814B 0x3
 #define BIT_GPIOSEL_8814B(x) (((x) & BIT_MASK_GPIOSEL_8814B) << BIT_SHIFT_GPIOSEL_8814B)
-#define BIT_GET_GPIOSEL_8814B(x) (((x) >> BIT_SHIFT_GPIOSEL_8814B) & BIT_MASK_GPIOSEL_8814B)

+#define BIT_GET_GPIOSEL_8814B(x) (((x) >> BIT_SHIFT_GPIOSEL_8814B) & BIT_MASK_GPIOSEL_8814B)
+
 
 
 /* 2 REG_GPIO_PIN_CTRL_8814B */
@@ -607,25 +685,29 @@
 #define BIT_SHIFT_GPIO_MOD_7_TO_0_8814B 24
 #define BIT_MASK_GPIO_MOD_7_TO_0_8814B 0xff
 #define BIT_GPIO_MOD_7_TO_0_8814B(x) (((x) & BIT_MASK_GPIO_MOD_7_TO_0_8814B) << BIT_SHIFT_GPIO_MOD_7_TO_0_8814B)
-#define BIT_GET_GPIO_MOD_7_TO_0_8814B(x) (((x) >> BIT_SHIFT_GPIO_MOD_7_TO_0_8814B) & BIT_MASK_GPIO_MOD_7_TO_0_8814B)

+#define BIT_GET_GPIO_MOD_7_TO_0_8814B(x) (((x) >> BIT_SHIFT_GPIO_MOD_7_TO_0_8814B) & BIT_MASK_GPIO_MOD_7_TO_0_8814B)
+
 
 
 #define BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8814B 16
 #define BIT_MASK_GPIO_IO_SEL_7_TO_0_8814B 0xff
 #define BIT_GPIO_IO_SEL_7_TO_0_8814B(x) (((x) & BIT_MASK_GPIO_IO_SEL_7_TO_0_8814B) << BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8814B)
-#define BIT_GET_GPIO_IO_SEL_7_TO_0_8814B(x) (((x) >> BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8814B) & BIT_MASK_GPIO_IO_SEL_7_TO_0_8814B)

+#define BIT_GET_GPIO_IO_SEL_7_TO_0_8814B(x) (((x) >> BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8814B) & BIT_MASK_GPIO_IO_SEL_7_TO_0_8814B)
+
 
 
 #define BIT_SHIFT_GPIO_OUT_7_TO_0_8814B 8
 #define BIT_MASK_GPIO_OUT_7_TO_0_8814B 0xff
 #define BIT_GPIO_OUT_7_TO_0_8814B(x) (((x) & BIT_MASK_GPIO_OUT_7_TO_0_8814B) << BIT_SHIFT_GPIO_OUT_7_TO_0_8814B)
-#define BIT_GET_GPIO_OUT_7_TO_0_8814B(x) (((x) >> BIT_SHIFT_GPIO_OUT_7_TO_0_8814B) & BIT_MASK_GPIO_OUT_7_TO_0_8814B)

+#define BIT_GET_GPIO_OUT_7_TO_0_8814B(x) (((x) >> BIT_SHIFT_GPIO_OUT_7_TO_0_8814B) & BIT_MASK_GPIO_OUT_7_TO_0_8814B)
+
 
 
 #define BIT_SHIFT_GPIO_IN_7_TO_0_8814B 0
 #define BIT_MASK_GPIO_IN_7_TO_0_8814B 0xff
 #define BIT_GPIO_IN_7_TO_0_8814B(x) (((x) & BIT_MASK_GPIO_IN_7_TO_0_8814B) << BIT_SHIFT_GPIO_IN_7_TO_0_8814B)
-#define BIT_GET_GPIO_IN_7_TO_0_8814B(x) (((x) >> BIT_SHIFT_GPIO_IN_7_TO_0_8814B) & BIT_MASK_GPIO_IN_7_TO_0_8814B)

+#define BIT_GET_GPIO_IN_7_TO_0_8814B(x) (((x) >> BIT_SHIFT_GPIO_IN_7_TO_0_8814B) & BIT_MASK_GPIO_IN_7_TO_0_8814B)
+
 
 
 /* 2 REG_GPIO_INTM_8814B */
@@ -633,7 +715,8 @@
 #define BIT_SHIFT_MUXDBG_SEL_8814B 30
 #define BIT_MASK_MUXDBG_SEL_8814B 0x3
 #define BIT_MUXDBG_SEL_8814B(x) (((x) & BIT_MASK_MUXDBG_SEL_8814B) << BIT_SHIFT_MUXDBG_SEL_8814B)
-#define BIT_GET_MUXDBG_SEL_8814B(x) (((x) >> BIT_SHIFT_MUXDBG_SEL_8814B) & BIT_MASK_MUXDBG_SEL_8814B)

+#define BIT_GET_MUXDBG_SEL_8814B(x) (((x) >> BIT_SHIFT_MUXDBG_SEL_8814B) & BIT_MASK_MUXDBG_SEL_8814B)
+
 
 #define BIT_EXTWOL_SEL_8814B BIT(17)
 #define BIT_EXTWOL_EN_8814B BIT(16)
@@ -672,7 +755,8 @@
 #define BIT_SHIFT_LED2CM_8814B 16
 #define BIT_MASK_LED2CM_8814B 0x7
 #define BIT_LED2CM_8814B(x) (((x) & BIT_MASK_LED2CM_8814B) << BIT_SHIFT_LED2CM_8814B)
-#define BIT_GET_LED2CM_8814B(x) (((x) >> BIT_SHIFT_LED2CM_8814B) & BIT_MASK_LED2CM_8814B)

+#define BIT_GET_LED2CM_8814B(x) (((x) >> BIT_SHIFT_LED2CM_8814B) & BIT_MASK_LED2CM_8814B)
+
 
 #define BIT_LED1DIS_8814B BIT(15)
 #define BIT_LED1PL_8814B BIT(12)
@@ -681,14 +765,16 @@
 #define BIT_SHIFT_LED1CM_8814B 8
 #define BIT_MASK_LED1CM_8814B 0x7
 #define BIT_LED1CM_8814B(x) (((x) & BIT_MASK_LED1CM_8814B) << BIT_SHIFT_LED1CM_8814B)
-#define BIT_GET_LED1CM_8814B(x) (((x) >> BIT_SHIFT_LED1CM_8814B) & BIT_MASK_LED1CM_8814B)

+#define BIT_GET_LED1CM_8814B(x) (((x) >> BIT_SHIFT_LED1CM_8814B) & BIT_MASK_LED1CM_8814B)
+
 
 #define BIT_LED0DIS_8814B BIT(7)
 
 #define BIT_SHIFT_AFE_LDO_SWR_CHECK_8814B 5
 #define BIT_MASK_AFE_LDO_SWR_CHECK_8814B 0x3
 #define BIT_AFE_LDO_SWR_CHECK_8814B(x) (((x) & BIT_MASK_AFE_LDO_SWR_CHECK_8814B) << BIT_SHIFT_AFE_LDO_SWR_CHECK_8814B)
-#define BIT_GET_AFE_LDO_SWR_CHECK_8814B(x) (((x) >> BIT_SHIFT_AFE_LDO_SWR_CHECK_8814B) & BIT_MASK_AFE_LDO_SWR_CHECK_8814B)

+#define BIT_GET_AFE_LDO_SWR_CHECK_8814B(x) (((x) >> BIT_SHIFT_AFE_LDO_SWR_CHECK_8814B) & BIT_MASK_AFE_LDO_SWR_CHECK_8814B)
+
 
 #define BIT_LED0PL_8814B BIT(4)
 #define BIT_LED0SV_8814B BIT(3)
@@ -696,7 +782,8 @@
 #define BIT_SHIFT_LED0CM_8814B 0
 #define BIT_MASK_LED0CM_8814B 0x7
 #define BIT_LED0CM_8814B(x) (((x) & BIT_MASK_LED0CM_8814B) << BIT_SHIFT_LED0CM_8814B)
-#define BIT_GET_LED0CM_8814B(x) (((x) >> BIT_SHIFT_LED0CM_8814B) & BIT_MASK_LED0CM_8814B)

+#define BIT_GET_LED0CM_8814B(x) (((x) >> BIT_SHIFT_LED0CM_8814B) & BIT_MASK_LED0CM_8814B)
+
 
 
 /* 2 REG_FSIMR_8814B */
@@ -814,25 +901,29 @@
 #define BIT_SHIFT_GPIO_MOD_15_TO_8_8814B 24
 #define BIT_MASK_GPIO_MOD_15_TO_8_8814B 0xff
 #define BIT_GPIO_MOD_15_TO_8_8814B(x) (((x) & BIT_MASK_GPIO_MOD_15_TO_8_8814B) << BIT_SHIFT_GPIO_MOD_15_TO_8_8814B)
-#define BIT_GET_GPIO_MOD_15_TO_8_8814B(x) (((x) >> BIT_SHIFT_GPIO_MOD_15_TO_8_8814B) & BIT_MASK_GPIO_MOD_15_TO_8_8814B)

+#define BIT_GET_GPIO_MOD_15_TO_8_8814B(x) (((x) >> BIT_SHIFT_GPIO_MOD_15_TO_8_8814B) & BIT_MASK_GPIO_MOD_15_TO_8_8814B)
+
 
 
 #define BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8814B 16
 #define BIT_MASK_GPIO_IO_SEL_15_TO_8_8814B 0xff
 #define BIT_GPIO_IO_SEL_15_TO_8_8814B(x) (((x) & BIT_MASK_GPIO_IO_SEL_15_TO_8_8814B) << BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8814B)
-#define BIT_GET_GPIO_IO_SEL_15_TO_8_8814B(x) (((x) >> BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8814B) & BIT_MASK_GPIO_IO_SEL_15_TO_8_8814B)

+#define BIT_GET_GPIO_IO_SEL_15_TO_8_8814B(x) (((x) >> BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8814B) & BIT_MASK_GPIO_IO_SEL_15_TO_8_8814B)
+
 
 
 #define BIT_SHIFT_GPIO_OUT_15_TO_8_8814B 8
 #define BIT_MASK_GPIO_OUT_15_TO_8_8814B 0xff
 #define BIT_GPIO_OUT_15_TO_8_8814B(x) (((x) & BIT_MASK_GPIO_OUT_15_TO_8_8814B) << BIT_SHIFT_GPIO_OUT_15_TO_8_8814B)
-#define BIT_GET_GPIO_OUT_15_TO_8_8814B(x) (((x) >> BIT_SHIFT_GPIO_OUT_15_TO_8_8814B) & BIT_MASK_GPIO_OUT_15_TO_8_8814B)

+#define BIT_GET_GPIO_OUT_15_TO_8_8814B(x) (((x) >> BIT_SHIFT_GPIO_OUT_15_TO_8_8814B) & BIT_MASK_GPIO_OUT_15_TO_8_8814B)
+
 
 
 #define BIT_SHIFT_GPIO_IN_15_TO_8_8814B 0
 #define BIT_MASK_GPIO_IN_15_TO_8_8814B 0xff
 #define BIT_GPIO_IN_15_TO_8_8814B(x) (((x) & BIT_MASK_GPIO_IN_15_TO_8_8814B) << BIT_SHIFT_GPIO_IN_15_TO_8_8814B)
-#define BIT_GET_GPIO_IN_15_TO_8_8814B(x) (((x) >> BIT_SHIFT_GPIO_IN_15_TO_8_8814B) & BIT_MASK_GPIO_IN_15_TO_8_8814B)

+#define BIT_GET_GPIO_IN_15_TO_8_8814B(x) (((x) >> BIT_SHIFT_GPIO_IN_15_TO_8_8814B) & BIT_MASK_GPIO_IN_15_TO_8_8814B)
+
 
 
 /* 2 REG_PAD_CTRL1_8814B */
@@ -851,7 +942,8 @@
 #define BIT_SHIFT_BTGP_GPIO_SL_8814B 16
 #define BIT_MASK_BTGP_GPIO_SL_8814B 0x3
 #define BIT_BTGP_GPIO_SL_8814B(x) (((x) & BIT_MASK_BTGP_GPIO_SL_8814B) << BIT_SHIFT_BTGP_GPIO_SL_8814B)
-#define BIT_GET_BTGP_GPIO_SL_8814B(x) (((x) >> BIT_SHIFT_BTGP_GPIO_SL_8814B) & BIT_MASK_BTGP_GPIO_SL_8814B)

+#define BIT_GET_BTGP_GPIO_SL_8814B(x) (((x) >> BIT_SHIFT_BTGP_GPIO_SL_8814B) & BIT_MASK_BTGP_GPIO_SL_8814B)
+
 
 #define BIT_PAD_SDIO_SR_8814B BIT(14)
 #define BIT_GPIO14_OUTPUT_PL_8814B BIT(13)
@@ -903,7 +995,8 @@
 #define BIT_SHIFT_WLCLK_PHASE_8814B 0
 #define BIT_MASK_WLCLK_PHASE_8814B 0x1f
 #define BIT_WLCLK_PHASE_8814B(x) (((x) & BIT_MASK_WLCLK_PHASE_8814B) << BIT_SHIFT_WLCLK_PHASE_8814B)
-#define BIT_GET_WLCLK_PHASE_8814B(x) (((x) >> BIT_SHIFT_WLCLK_PHASE_8814B) & BIT_MASK_WLCLK_PHASE_8814B)

+#define BIT_GET_WLCLK_PHASE_8814B(x) (((x) >> BIT_SHIFT_WLCLK_PHASE_8814B) & BIT_MASK_WLCLK_PHASE_8814B)
+
 
 
 /* 2 REG_SYS_SDIO_CTRL_8814B */
@@ -926,7 +1019,8 @@
 #define BIT_SHIFT_TSFT_SEL_8814B 29
 #define BIT_MASK_TSFT_SEL_8814B 0x7
 #define BIT_TSFT_SEL_8814B(x) (((x) & BIT_MASK_TSFT_SEL_8814B) << BIT_SHIFT_TSFT_SEL_8814B)
-#define BIT_GET_TSFT_SEL_8814B(x) (((x) >> BIT_SHIFT_TSFT_SEL_8814B) & BIT_MASK_TSFT_SEL_8814B)

+#define BIT_GET_TSFT_SEL_8814B(x) (((x) >> BIT_SHIFT_TSFT_SEL_8814B) & BIT_MASK_TSFT_SEL_8814B)
+
 
 #define BIT_USB_HOST_PWR_OFF_EN_8814B BIT(12)
 #define BIT_SYM_LPS_BLOCK_EN_8814B BIT(11)
@@ -937,7 +1031,8 @@
 #define BIT_SHIFT_SDIO_PAD_E_8814B 5
 #define BIT_MASK_SDIO_PAD_E_8814B 0x7
 #define BIT_SDIO_PAD_E_8814B(x) (((x) & BIT_MASK_SDIO_PAD_E_8814B) << BIT_SHIFT_SDIO_PAD_E_8814B)
-#define BIT_GET_SDIO_PAD_E_8814B(x) (((x) >> BIT_SHIFT_SDIO_PAD_E_8814B) & BIT_MASK_SDIO_PAD_E_8814B)

+#define BIT_GET_SDIO_PAD_E_8814B(x) (((x) >> BIT_SHIFT_SDIO_PAD_E_8814B) & BIT_MASK_SDIO_PAD_E_8814B)
+
 
 #define BIT_USB_LPPLL_EN_8814B BIT(4)
 #define BIT_ROP_SW15_8814B BIT(2)
@@ -953,37 +1048,43 @@
 #define BIT_SHIFT_AUTO_ZCD_IN_CODE_8814B 21
 #define BIT_MASK_AUTO_ZCD_IN_CODE_8814B 0x1f
 #define BIT_AUTO_ZCD_IN_CODE_8814B(x) (((x) & BIT_MASK_AUTO_ZCD_IN_CODE_8814B) << BIT_SHIFT_AUTO_ZCD_IN_CODE_8814B)
-#define BIT_GET_AUTO_ZCD_IN_CODE_8814B(x) (((x) >> BIT_SHIFT_AUTO_ZCD_IN_CODE_8814B) & BIT_MASK_AUTO_ZCD_IN_CODE_8814B)

+#define BIT_GET_AUTO_ZCD_IN_CODE_8814B(x) (((x) >> BIT_SHIFT_AUTO_ZCD_IN_CODE_8814B) & BIT_MASK_AUTO_ZCD_IN_CODE_8814B)
+
 
 
 #define BIT_SHIFT_ZCD_CODE_IN_L_8814B 16
 #define BIT_MASK_ZCD_CODE_IN_L_8814B 0x1f
 #define BIT_ZCD_CODE_IN_L_8814B(x) (((x) & BIT_MASK_ZCD_CODE_IN_L_8814B) << BIT_SHIFT_ZCD_CODE_IN_L_8814B)
-#define BIT_GET_ZCD_CODE_IN_L_8814B(x) (((x) >> BIT_SHIFT_ZCD_CODE_IN_L_8814B) & BIT_MASK_ZCD_CODE_IN_L_8814B)

+#define BIT_GET_ZCD_CODE_IN_L_8814B(x) (((x) >> BIT_SHIFT_ZCD_CODE_IN_L_8814B) & BIT_MASK_ZCD_CODE_IN_L_8814B)
+
 
 
 #define BIT_SHIFT_LDO_HV5_DUMMY_8814B 14
 #define BIT_MASK_LDO_HV5_DUMMY_8814B 0x3
 #define BIT_LDO_HV5_DUMMY_8814B(x) (((x) & BIT_MASK_LDO_HV5_DUMMY_8814B) << BIT_SHIFT_LDO_HV5_DUMMY_8814B)
-#define BIT_GET_LDO_HV5_DUMMY_8814B(x) (((x) >> BIT_SHIFT_LDO_HV5_DUMMY_8814B) & BIT_MASK_LDO_HV5_DUMMY_8814B)

+#define BIT_GET_LDO_HV5_DUMMY_8814B(x) (((x) >> BIT_SHIFT_LDO_HV5_DUMMY_8814B) & BIT_MASK_LDO_HV5_DUMMY_8814B)
+
 
 
 #define BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8814B 12
 #define BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8814B 0x3
 #define BIT_REG_VTUNE33_BIT0_TO_BIT1_8814B(x) (((x) & BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8814B) << BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8814B)
-#define BIT_GET_REG_VTUNE33_BIT0_TO_BIT1_8814B(x) (((x) >> BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8814B) & BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8814B)

+#define BIT_GET_REG_VTUNE33_BIT0_TO_BIT1_8814B(x) (((x) >> BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8814B) & BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8814B)
+
 
 
 #define BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8814B 10
 #define BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8814B 0x3
 #define BIT_REG_STANDBY33_BIT0_TO_BIT1_8814B(x) (((x) & BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8814B) << BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8814B)
-#define BIT_GET_REG_STANDBY33_BIT0_TO_BIT1_8814B(x) (((x) >> BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8814B) & BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8814B)

+#define BIT_GET_REG_STANDBY33_BIT0_TO_BIT1_8814B(x) (((x) >> BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8814B) & BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8814B)
+
 
 
 #define BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8814B 8
 #define BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8814B 0x3
 #define BIT_REG_LOAD33_BIT0_TO_BIT1_8814B(x) (((x) & BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8814B) << BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8814B)
-#define BIT_GET_REG_LOAD33_BIT0_TO_BIT1_8814B(x) (((x) >> BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8814B) & BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8814B)

+#define BIT_GET_REG_LOAD33_BIT0_TO_BIT1_8814B(x) (((x) >> BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8814B) & BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8814B)
+
 
 #define BIT_REG_BYPASS_L_8814B BIT(7)
 #define BIT_REG_LDOF_L_8814B BIT(6)
@@ -993,7 +1094,8 @@
 #define BIT_SHIFT_CFC_L_8814B 1
 #define BIT_MASK_CFC_L_8814B 0x3
 #define BIT_CFC_L_8814B(x) (((x) & BIT_MASK_CFC_L_8814B) << BIT_SHIFT_CFC_L_8814B)
-#define BIT_GET_CFC_L_8814B(x) (((x) >> BIT_SHIFT_CFC_L_8814B) & BIT_MASK_CFC_L_8814B)

+#define BIT_GET_CFC_L_8814B(x) (((x) >> BIT_SHIFT_CFC_L_8814B) & BIT_MASK_CFC_L_8814B)
+
 
 #define BIT_REG_TYPE_L_8814B BIT(0)
 
@@ -1002,7 +1104,8 @@
 #define BIT_SHIFT_RPWM_8814B 24
 #define BIT_MASK_RPWM_8814B 0xff
 #define BIT_RPWM_8814B(x) (((x) & BIT_MASK_RPWM_8814B) << BIT_SHIFT_RPWM_8814B)
-#define BIT_GET_RPWM_8814B(x) (((x) >> BIT_SHIFT_RPWM_8814B) & BIT_MASK_RPWM_8814B)

+#define BIT_GET_RPWM_8814B(x) (((x) >> BIT_SHIFT_RPWM_8814B) & BIT_MASK_RPWM_8814B)
+
 
 #define BIT_ANA_PORT_EN_8814B BIT(22)
 #define BIT_MAC_PORT_EN_8814B BIT(21)
@@ -1012,7 +1115,8 @@
 #define BIT_SHIFT_ROM_PGE_8814B 16
 #define BIT_MASK_ROM_PGE_8814B 0x7
 #define BIT_ROM_PGE_8814B(x) (((x) & BIT_MASK_ROM_PGE_8814B) << BIT_SHIFT_ROM_PGE_8814B)
-#define BIT_GET_ROM_PGE_8814B(x) (((x) >> BIT_SHIFT_ROM_PGE_8814B) & BIT_MASK_ROM_PGE_8814B)

+#define BIT_GET_ROM_PGE_8814B(x) (((x) >> BIT_SHIFT_ROM_PGE_8814B) & BIT_MASK_ROM_PGE_8814B)
+
 
 #define BIT_FW_INIT_RDY_8814B BIT(15)
 #define BIT_FW_DW_RDY_8814B BIT(14)
@@ -1020,7 +1124,8 @@
 #define BIT_SHIFT_CPU_CLK_SEL_8814B 12
 #define BIT_MASK_CPU_CLK_SEL_8814B 0x3
 #define BIT_CPU_CLK_SEL_8814B(x) (((x) & BIT_MASK_CPU_CLK_SEL_8814B) << BIT_SHIFT_CPU_CLK_SEL_8814B)
-#define BIT_GET_CPU_CLK_SEL_8814B(x) (((x) >> BIT_SHIFT_CPU_CLK_SEL_8814B) & BIT_MASK_CPU_CLK_SEL_8814B)

+#define BIT_GET_CPU_CLK_SEL_8814B(x) (((x) >> BIT_SHIFT_CPU_CLK_SEL_8814B) & BIT_MASK_CPU_CLK_SEL_8814B)
+
 
 #define BIT_CCLK_CHG_MASK_8814B BIT(11)
 #define BIT_EMEM__TXBUF_CHKSUM_OK_8814B BIT(10)
@@ -1040,7 +1145,8 @@
 #define BIT_SHIFT_LBKTST_8814B 0
 #define BIT_MASK_LBKTST_8814B 0xffff
 #define BIT_LBKTST_8814B(x) (((x) & BIT_MASK_LBKTST_8814B) << BIT_SHIFT_LBKTST_8814B)
-#define BIT_GET_LBKTST_8814B(x) (((x) >> BIT_SHIFT_LBKTST_8814B) & BIT_MASK_LBKTST_8814B)

+#define BIT_GET_LBKTST_8814B(x) (((x) >> BIT_SHIFT_LBKTST_8814B) & BIT_MASK_LBKTST_8814B)
+
 
 
 /* 2 REG_HMEBOX_E0_E1_8814B */
@@ -1048,13 +1154,15 @@
 #define BIT_SHIFT_HOST_MSG_E1_8814B 16
 #define BIT_MASK_HOST_MSG_E1_8814B 0xffff
 #define BIT_HOST_MSG_E1_8814B(x) (((x) & BIT_MASK_HOST_MSG_E1_8814B) << BIT_SHIFT_HOST_MSG_E1_8814B)
-#define BIT_GET_HOST_MSG_E1_8814B(x) (((x) >> BIT_SHIFT_HOST_MSG_E1_8814B) & BIT_MASK_HOST_MSG_E1_8814B)

+#define BIT_GET_HOST_MSG_E1_8814B(x) (((x) >> BIT_SHIFT_HOST_MSG_E1_8814B) & BIT_MASK_HOST_MSG_E1_8814B)
+
 
 
 #define BIT_SHIFT_HOST_MSG_E0_8814B 0
 #define BIT_MASK_HOST_MSG_E0_8814B 0xffff
 #define BIT_HOST_MSG_E0_8814B(x) (((x) & BIT_MASK_HOST_MSG_E0_8814B) << BIT_SHIFT_HOST_MSG_E0_8814B)
-#define BIT_GET_HOST_MSG_E0_8814B(x) (((x) >> BIT_SHIFT_HOST_MSG_E0_8814B) & BIT_MASK_HOST_MSG_E0_8814B)

+#define BIT_GET_HOST_MSG_E0_8814B(x) (((x) >> BIT_SHIFT_HOST_MSG_E0_8814B) & BIT_MASK_HOST_MSG_E0_8814B)
+
 
 
 /* 2 REG_HMEBOX_E2_E3_8814B */
@@ -1062,13 +1170,15 @@
 #define BIT_SHIFT_HOST_MSG_E3_8814B 16
 #define BIT_MASK_HOST_MSG_E3_8814B 0xffff
 #define BIT_HOST_MSG_E3_8814B(x) (((x) & BIT_MASK_HOST_MSG_E3_8814B) << BIT_SHIFT_HOST_MSG_E3_8814B)
-#define BIT_GET_HOST_MSG_E3_8814B(x) (((x) >> BIT_SHIFT_HOST_MSG_E3_8814B) & BIT_MASK_HOST_MSG_E3_8814B)

+#define BIT_GET_HOST_MSG_E3_8814B(x) (((x) >> BIT_SHIFT_HOST_MSG_E3_8814B) & BIT_MASK_HOST_MSG_E3_8814B)
+
 
 
 #define BIT_SHIFT_HOST_MSG_E2_8814B 0
 #define BIT_MASK_HOST_MSG_E2_8814B 0xffff
 #define BIT_HOST_MSG_E2_8814B(x) (((x) & BIT_MASK_HOST_MSG_E2_8814B) << BIT_SHIFT_HOST_MSG_E2_8814B)
-#define BIT_GET_HOST_MSG_E2_8814B(x) (((x) >> BIT_SHIFT_HOST_MSG_E2_8814B) & BIT_MASK_HOST_MSG_E2_8814B)

+#define BIT_GET_HOST_MSG_E2_8814B(x) (((x) >> BIT_SHIFT_HOST_MSG_E2_8814B) & BIT_MASK_HOST_MSG_E2_8814B)
+
 
 
 /* 2 REG_WLLPS_CTRL_8814B */
@@ -1087,13 +1197,15 @@
 #define BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8814B 12
 #define BIT_MASK_LPLDH12_VADJ_STEP_DN_8814B 0xf
 #define BIT_LPLDH12_VADJ_STEP_DN_8814B(x) (((x) & BIT_MASK_LPLDH12_VADJ_STEP_DN_8814B) << BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8814B)
-#define BIT_GET_LPLDH12_VADJ_STEP_DN_8814B(x) (((x) >> BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8814B) & BIT_MASK_LPLDH12_VADJ_STEP_DN_8814B)

+#define BIT_GET_LPLDH12_VADJ_STEP_DN_8814B(x) (((x) >> BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8814B) & BIT_MASK_LPLDH12_VADJ_STEP_DN_8814B)
+
 
 
 #define BIT_SHIFT_V15ADJ_L1_STEP_DN_8814B 8
 #define BIT_MASK_V15ADJ_L1_STEP_DN_8814B 0x7
 #define BIT_V15ADJ_L1_STEP_DN_8814B(x) (((x) & BIT_MASK_V15ADJ_L1_STEP_DN_8814B) << BIT_SHIFT_V15ADJ_L1_STEP_DN_8814B)
-#define BIT_GET_V15ADJ_L1_STEP_DN_8814B(x) (((x) >> BIT_SHIFT_V15ADJ_L1_STEP_DN_8814B) & BIT_MASK_V15ADJ_L1_STEP_DN_8814B)

+#define BIT_GET_V15ADJ_L1_STEP_DN_8814B(x) (((x) >> BIT_SHIFT_V15ADJ_L1_STEP_DN_8814B) & BIT_MASK_V15ADJ_L1_STEP_DN_8814B)
+
 
 #define BIT_REGU_32K_CLK_EN_8814B BIT(1)
 #define BIT_WL_LPS_EN_8814B BIT(0)
@@ -1106,25 +1218,29 @@
 #define BIT_SHIFT_REF_SEL_8814B 25
 #define BIT_MASK_REF_SEL_8814B 0xf
 #define BIT_REF_SEL_8814B(x) (((x) & BIT_MASK_REF_SEL_8814B) << BIT_SHIFT_REF_SEL_8814B)
-#define BIT_GET_REF_SEL_8814B(x) (((x) >> BIT_SHIFT_REF_SEL_8814B) & BIT_MASK_REF_SEL_8814B)

+#define BIT_GET_REF_SEL_8814B(x) (((x) >> BIT_SHIFT_REF_SEL_8814B) & BIT_MASK_REF_SEL_8814B)
+
 
 
 #define BIT_SHIFT_F0F_SDM_8814B 12
 #define BIT_MASK_F0F_SDM_8814B 0x1fff
 #define BIT_F0F_SDM_8814B(x) (((x) & BIT_MASK_F0F_SDM_8814B) << BIT_SHIFT_F0F_SDM_8814B)
-#define BIT_GET_F0F_SDM_8814B(x) (((x) >> BIT_SHIFT_F0F_SDM_8814B) & BIT_MASK_F0F_SDM_8814B)

+#define BIT_GET_F0F_SDM_8814B(x) (((x) >> BIT_SHIFT_F0F_SDM_8814B) & BIT_MASK_F0F_SDM_8814B)
+
 
 
 #define BIT_SHIFT_F0N_SDM_8814B 9
 #define BIT_MASK_F0N_SDM_8814B 0x7
 #define BIT_F0N_SDM_8814B(x) (((x) & BIT_MASK_F0N_SDM_8814B) << BIT_SHIFT_F0N_SDM_8814B)
-#define BIT_GET_F0N_SDM_8814B(x) (((x) >> BIT_SHIFT_F0N_SDM_8814B) & BIT_MASK_F0N_SDM_8814B)

+#define BIT_GET_F0N_SDM_8814B(x) (((x) >> BIT_SHIFT_F0N_SDM_8814B) & BIT_MASK_F0N_SDM_8814B)
+
 
 
 #define BIT_SHIFT_DIVN_SDM_8814B 3
 #define BIT_MASK_DIVN_SDM_8814B 0x3f
 #define BIT_DIVN_SDM_8814B(x) (((x) & BIT_MASK_DIVN_SDM_8814B) << BIT_SHIFT_DIVN_SDM_8814B)
-#define BIT_GET_DIVN_SDM_8814B(x) (((x) >> BIT_SHIFT_DIVN_SDM_8814B) & BIT_MASK_DIVN_SDM_8814B)

+#define BIT_GET_DIVN_SDM_8814B(x) (((x) >> BIT_SHIFT_DIVN_SDM_8814B) & BIT_MASK_DIVN_SDM_8814B)
+
 
 
 /* 2 REG_GPIO_DEBOUNCE_CTRL_8814B */
@@ -1133,14 +1249,16 @@
 #define BIT_SHIFT_WLGP_DBC1_8814B 8
 #define BIT_MASK_WLGP_DBC1_8814B 0xf
 #define BIT_WLGP_DBC1_8814B(x) (((x) & BIT_MASK_WLGP_DBC1_8814B) << BIT_SHIFT_WLGP_DBC1_8814B)
-#define BIT_GET_WLGP_DBC1_8814B(x) (((x) >> BIT_SHIFT_WLGP_DBC1_8814B) & BIT_MASK_WLGP_DBC1_8814B)

+#define BIT_GET_WLGP_DBC1_8814B(x) (((x) >> BIT_SHIFT_WLGP_DBC1_8814B) & BIT_MASK_WLGP_DBC1_8814B)
+
 
 #define BIT_WLGP_DBC0EN_8814B BIT(7)
 
 #define BIT_SHIFT_WLGP_DBC0_8814B 0
 #define BIT_MASK_WLGP_DBC0_8814B 0xf
 #define BIT_WLGP_DBC0_8814B(x) (((x) & BIT_MASK_WLGP_DBC0_8814B) << BIT_SHIFT_WLGP_DBC0_8814B)
-#define BIT_GET_WLGP_DBC0_8814B(x) (((x) >> BIT_SHIFT_WLGP_DBC0_8814B) & BIT_MASK_WLGP_DBC0_8814B)

+#define BIT_GET_WLGP_DBC0_8814B(x) (((x) >> BIT_SHIFT_WLGP_DBC0_8814B) & BIT_MASK_WLGP_DBC0_8814B)
+
 
 
 /* 2 REG_RPWM2_8814B */
@@ -1148,7 +1266,8 @@
 #define BIT_SHIFT_RPWM2_8814B 16
 #define BIT_MASK_RPWM2_8814B 0xffff
 #define BIT_RPWM2_8814B(x) (((x) & BIT_MASK_RPWM2_8814B) << BIT_SHIFT_RPWM2_8814B)
-#define BIT_GET_RPWM2_8814B(x) (((x) >> BIT_SHIFT_RPWM2_8814B) & BIT_MASK_RPWM2_8814B)

+#define BIT_GET_RPWM2_8814B(x) (((x) >> BIT_SHIFT_RPWM2_8814B) & BIT_MASK_RPWM2_8814B)
+
 
 
 /* 2 REG_SYSON_FSM_MON_8814B */
@@ -1156,7 +1275,8 @@
 #define BIT_SHIFT_FSM_MON_SEL_8814B 24
 #define BIT_MASK_FSM_MON_SEL_8814B 0x7
 #define BIT_FSM_MON_SEL_8814B(x) (((x) & BIT_MASK_FSM_MON_SEL_8814B) << BIT_SHIFT_FSM_MON_SEL_8814B)
-#define BIT_GET_FSM_MON_SEL_8814B(x) (((x) >> BIT_SHIFT_FSM_MON_SEL_8814B) & BIT_MASK_FSM_MON_SEL_8814B)

+#define BIT_GET_FSM_MON_SEL_8814B(x) (((x) >> BIT_SHIFT_FSM_MON_SEL_8814B) & BIT_MASK_FSM_MON_SEL_8814B)
+
 
 #define BIT_DOP_ELDO_8814B BIT(23)
 #define BIT_FSM_MON_UPD_8814B BIT(15)
@@ -1164,7 +1284,8 @@
 #define BIT_SHIFT_FSM_PAR_8814B 0
 #define BIT_MASK_FSM_PAR_8814B 0x7fff
 #define BIT_FSM_PAR_8814B(x) (((x) & BIT_MASK_FSM_PAR_8814B) << BIT_SHIFT_FSM_PAR_8814B)
-#define BIT_GET_FSM_PAR_8814B(x) (((x) >> BIT_SHIFT_FSM_PAR_8814B) & BIT_MASK_FSM_PAR_8814B)

+#define BIT_GET_FSM_PAR_8814B(x) (((x) >> BIT_SHIFT_FSM_PAR_8814B) & BIT_MASK_FSM_PAR_8814B)
+
 
 
 /* 2 REG_AFE_CTRL6_8814B */
@@ -1172,7 +1293,8 @@
 #define BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8814B 0
 #define BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8814B 0x7
 #define BIT_BB_DBG_SEL_AFE_SDM_BIT3_1_8814B(x) (((x) & BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8814B) << BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8814B)
-#define BIT_GET_BB_DBG_SEL_AFE_SDM_BIT3_1_8814B(x) (((x) >> BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8814B) & BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8814B)

+#define BIT_GET_BB_DBG_SEL_AFE_SDM_BIT3_1_8814B(x) (((x) >> BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8814B) & BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8814B)
+
 
 
 /* 2 REG_PMC_DBG_CTRL1_8814B */
@@ -1181,14 +1303,16 @@
 #define BIT_SHIFT_RD_WR_WIFI_BT_INFO_8814B 16
 #define BIT_MASK_RD_WR_WIFI_BT_INFO_8814B 0x7fff
 #define BIT_RD_WR_WIFI_BT_INFO_8814B(x) (((x) & BIT_MASK_RD_WR_WIFI_BT_INFO_8814B) << BIT_SHIFT_RD_WR_WIFI_BT_INFO_8814B)
-#define BIT_GET_RD_WR_WIFI_BT_INFO_8814B(x) (((x) >> BIT_SHIFT_RD_WR_WIFI_BT_INFO_8814B) & BIT_MASK_RD_WR_WIFI_BT_INFO_8814B)

+#define BIT_GET_RD_WR_WIFI_BT_INFO_8814B(x) (((x) >> BIT_SHIFT_RD_WR_WIFI_BT_INFO_8814B) & BIT_MASK_RD_WR_WIFI_BT_INFO_8814B)
+
 
 #define BIT_PMC_WR_OVF_8814B BIT(8)
 
 #define BIT_SHIFT_WLPMC_ERRINT_8814B 0
 #define BIT_MASK_WLPMC_ERRINT_8814B 0xff
 #define BIT_WLPMC_ERRINT_8814B(x) (((x) & BIT_MASK_WLPMC_ERRINT_8814B) << BIT_SHIFT_WLPMC_ERRINT_8814B)
-#define BIT_GET_WLPMC_ERRINT_8814B(x) (((x) >> BIT_SHIFT_WLPMC_ERRINT_8814B) & BIT_MASK_WLPMC_ERRINT_8814B)

+#define BIT_GET_WLPMC_ERRINT_8814B(x) (((x) >> BIT_SHIFT_WLPMC_ERRINT_8814B) & BIT_MASK_WLPMC_ERRINT_8814B)
+
 
 
 /* 2 REG_AFE_CTRL7_8814B */
@@ -1196,14 +1320,16 @@
 #define BIT_SHIFT_SEL_V_8814B 30
 #define BIT_MASK_SEL_V_8814B 0x3
 #define BIT_SEL_V_8814B(x) (((x) & BIT_MASK_SEL_V_8814B) << BIT_SHIFT_SEL_V_8814B)
-#define BIT_GET_SEL_V_8814B(x) (((x) >> BIT_SHIFT_SEL_V_8814B) & BIT_MASK_SEL_V_8814B)

+#define BIT_GET_SEL_V_8814B(x) (((x) >> BIT_SHIFT_SEL_V_8814B) & BIT_MASK_SEL_V_8814B)
+
 
 #define BIT_SEL_LDO_PC_8814B BIT(29)
 
 #define BIT_SHIFT_CK_MON_SEL_8814B 26
 #define BIT_MASK_CK_MON_SEL_8814B 0x7
 #define BIT_CK_MON_SEL_8814B(x) (((x) & BIT_MASK_CK_MON_SEL_8814B) << BIT_SHIFT_CK_MON_SEL_8814B)
-#define BIT_GET_CK_MON_SEL_8814B(x) (((x) >> BIT_SHIFT_CK_MON_SEL_8814B) & BIT_MASK_CK_MON_SEL_8814B)

+#define BIT_GET_CK_MON_SEL_8814B(x) (((x) >> BIT_SHIFT_CK_MON_SEL_8814B) & BIT_MASK_CK_MON_SEL_8814B)
+
 
 #define BIT_CK_MON_EN_8814B BIT(25)
 #define BIT_FREF_EDGE_8814B BIT(24)
@@ -1332,7 +1458,8 @@
 #define BIT_SHIFT_DEBUG_ST_8814B 0
 #define BIT_MASK_DEBUG_ST_8814B 0xffffffffL
 #define BIT_DEBUG_ST_8814B(x) (((x) & BIT_MASK_DEBUG_ST_8814B) << BIT_SHIFT_DEBUG_ST_8814B)
-#define BIT_GET_DEBUG_ST_8814B(x) (((x) >> BIT_SHIFT_DEBUG_ST_8814B) & BIT_MASK_DEBUG_ST_8814B)

+#define BIT_GET_DEBUG_ST_8814B(x) (((x) >> BIT_SHIFT_DEBUG_ST_8814B) & BIT_MASK_DEBUG_ST_8814B)
+
 
 
 /* 2 REG_PAD_CTRL2_8814B */
@@ -1341,7 +1468,8 @@
 #define BIT_SHIFT_USB23_SW_MODE_V1_8814B 18
 #define BIT_MASK_USB23_SW_MODE_V1_8814B 0x3
 #define BIT_USB23_SW_MODE_V1_8814B(x) (((x) & BIT_MASK_USB23_SW_MODE_V1_8814B) << BIT_SHIFT_USB23_SW_MODE_V1_8814B)
-#define BIT_GET_USB23_SW_MODE_V1_8814B(x) (((x) >> BIT_SHIFT_USB23_SW_MODE_V1_8814B) & BIT_MASK_USB23_SW_MODE_V1_8814B)

+#define BIT_GET_USB23_SW_MODE_V1_8814B(x) (((x) >> BIT_SHIFT_USB23_SW_MODE_V1_8814B) & BIT_MASK_USB23_SW_MODE_V1_8814B)
+
 
 #define BIT_NO_PDN_CHIPOFF_V1_8814B BIT(17)
 #define BIT_RSM_EN_V1_8814B BIT(16)
@@ -1349,7 +1477,8 @@
 #define BIT_SHIFT_MATCH_CNT_8814B 8
 #define BIT_MASK_MATCH_CNT_8814B 0xff
 #define BIT_MATCH_CNT_8814B(x) (((x) & BIT_MASK_MATCH_CNT_8814B) << BIT_SHIFT_MATCH_CNT_8814B)
-#define BIT_GET_MATCH_CNT_8814B(x) (((x) >> BIT_SHIFT_MATCH_CNT_8814B) & BIT_MASK_MATCH_CNT_8814B)

+#define BIT_GET_MATCH_CNT_8814B(x) (((x) >> BIT_SHIFT_MATCH_CNT_8814B) & BIT_MASK_MATCH_CNT_8814B)
+
 
 #define BIT_LD_B12V_EN_8814B BIT(7)
 #define BIT_EECS_IOSEL_V1_8814B BIT(6)
@@ -1366,7 +1495,8 @@
 #define BIT_SHIFT_EFUSE_BURN_GNT_8814B 24
 #define BIT_MASK_EFUSE_BURN_GNT_8814B 0xff
 #define BIT_EFUSE_BURN_GNT_8814B(x) (((x) & BIT_MASK_EFUSE_BURN_GNT_8814B) << BIT_SHIFT_EFUSE_BURN_GNT_8814B)
-#define BIT_GET_EFUSE_BURN_GNT_8814B(x) (((x) >> BIT_SHIFT_EFUSE_BURN_GNT_8814B) & BIT_MASK_EFUSE_BURN_GNT_8814B)

+#define BIT_GET_EFUSE_BURN_GNT_8814B(x) (((x) >> BIT_SHIFT_EFUSE_BURN_GNT_8814B) & BIT_MASK_EFUSE_BURN_GNT_8814B)
+
 
 #define BIT_STOP_WL_PMC_8814B BIT(9)
 #define BIT_STOP_SYM_PMC_8814B BIT(8)
@@ -1379,7 +1509,8 @@
 #define BIT_SHIFT_SYSON_REG_ARB_8814B 0
 #define BIT_MASK_SYSON_REG_ARB_8814B 0x3
 #define BIT_SYSON_REG_ARB_8814B(x) (((x) & BIT_MASK_SYSON_REG_ARB_8814B) << BIT_SHIFT_SYSON_REG_ARB_8814B)
-#define BIT_GET_SYSON_REG_ARB_8814B(x) (((x) >> BIT_SHIFT_SYSON_REG_ARB_8814B) & BIT_MASK_SYSON_REG_ARB_8814B)

+#define BIT_GET_SYSON_REG_ARB_8814B(x) (((x) >> BIT_SHIFT_SYSON_REG_ARB_8814B) & BIT_MASK_SYSON_REG_ARB_8814B)
+
 
 
 /* 2 REG_BIST_CTRL_8814B */
@@ -1391,7 +1522,8 @@
 #define BIT_SHIFT_BIST_RPT_SEL_8814B 16
 #define BIT_MASK_BIST_RPT_SEL_8814B 0xf
 #define BIT_BIST_RPT_SEL_8814B(x) (((x) & BIT_MASK_BIST_RPT_SEL_8814B) << BIT_SHIFT_BIST_RPT_SEL_8814B)
-#define BIT_GET_BIST_RPT_SEL_8814B(x) (((x) >> BIT_SHIFT_BIST_RPT_SEL_8814B) & BIT_MASK_BIST_RPT_SEL_8814B)

+#define BIT_GET_BIST_RPT_SEL_8814B(x) (((x) >> BIT_SHIFT_BIST_RPT_SEL_8814B) & BIT_MASK_BIST_RPT_SEL_8814B)
+
 
 #define BIT_BIST_RESUME_PS_8814B BIT(4)
 #define BIT_BIST_RESUME_8814B BIT(3)
@@ -1404,7 +1536,8 @@
 #define BIT_SHIFT_MBIST_REPORT_8814B 0
 #define BIT_MASK_MBIST_REPORT_8814B 0xffffffffL
 #define BIT_MBIST_REPORT_8814B(x) (((x) & BIT_MASK_MBIST_REPORT_8814B) << BIT_SHIFT_MBIST_REPORT_8814B)
-#define BIT_GET_MBIST_REPORT_8814B(x) (((x) >> BIT_SHIFT_MBIST_REPORT_8814B) & BIT_MASK_MBIST_REPORT_8814B)

+#define BIT_GET_MBIST_REPORT_8814B(x) (((x) >> BIT_SHIFT_MBIST_REPORT_8814B) & BIT_MASK_MBIST_REPORT_8814B)
+
 
 
 /* 2 REG_MEM_CTRL_8814B */
@@ -1413,43 +1546,50 @@
 #define BIT_SHIFT_BT_SPRAM_8814B 28
 #define BIT_MASK_BT_SPRAM_8814B 0x3
 #define BIT_BT_SPRAM_8814B(x) (((x) & BIT_MASK_BT_SPRAM_8814B) << BIT_SHIFT_BT_SPRAM_8814B)
-#define BIT_GET_BT_SPRAM_8814B(x) (((x) >> BIT_SHIFT_BT_SPRAM_8814B) & BIT_MASK_BT_SPRAM_8814B)

+#define BIT_GET_BT_SPRAM_8814B(x) (((x) >> BIT_SHIFT_BT_SPRAM_8814B) & BIT_MASK_BT_SPRAM_8814B)
+
 
 
 #define BIT_SHIFT_BT_ROM_8814B 24
 #define BIT_MASK_BT_ROM_8814B 0xf
 #define BIT_BT_ROM_8814B(x) (((x) & BIT_MASK_BT_ROM_8814B) << BIT_SHIFT_BT_ROM_8814B)
-#define BIT_GET_BT_ROM_8814B(x) (((x) >> BIT_SHIFT_BT_ROM_8814B) & BIT_MASK_BT_ROM_8814B)

+#define BIT_GET_BT_ROM_8814B(x) (((x) >> BIT_SHIFT_BT_ROM_8814B) & BIT_MASK_BT_ROM_8814B)
+
 
 
 #define BIT_SHIFT_PCI_DPRAM_8814B 10
 #define BIT_MASK_PCI_DPRAM_8814B 0x3
 #define BIT_PCI_DPRAM_8814B(x) (((x) & BIT_MASK_PCI_DPRAM_8814B) << BIT_SHIFT_PCI_DPRAM_8814B)
-#define BIT_GET_PCI_DPRAM_8814B(x) (((x) >> BIT_SHIFT_PCI_DPRAM_8814B) & BIT_MASK_PCI_DPRAM_8814B)

+#define BIT_GET_PCI_DPRAM_8814B(x) (((x) >> BIT_SHIFT_PCI_DPRAM_8814B) & BIT_MASK_PCI_DPRAM_8814B)
+
 
 
 #define BIT_SHIFT_PCI_SPRAM_8814B 8
 #define BIT_MASK_PCI_SPRAM_8814B 0x3
 #define BIT_PCI_SPRAM_8814B(x) (((x) & BIT_MASK_PCI_SPRAM_8814B) << BIT_SHIFT_PCI_SPRAM_8814B)
-#define BIT_GET_PCI_SPRAM_8814B(x) (((x) >> BIT_SHIFT_PCI_SPRAM_8814B) & BIT_MASK_PCI_SPRAM_8814B)

+#define BIT_GET_PCI_SPRAM_8814B(x) (((x) >> BIT_SHIFT_PCI_SPRAM_8814B) & BIT_MASK_PCI_SPRAM_8814B)
+
 
 
 #define BIT_SHIFT_USB_SPRAM_8814B 6
 #define BIT_MASK_USB_SPRAM_8814B 0x3
 #define BIT_USB_SPRAM_8814B(x) (((x) & BIT_MASK_USB_SPRAM_8814B) << BIT_SHIFT_USB_SPRAM_8814B)
-#define BIT_GET_USB_SPRAM_8814B(x) (((x) >> BIT_SHIFT_USB_SPRAM_8814B) & BIT_MASK_USB_SPRAM_8814B)

+#define BIT_GET_USB_SPRAM_8814B(x) (((x) >> BIT_SHIFT_USB_SPRAM_8814B) & BIT_MASK_USB_SPRAM_8814B)
+
 
 
 #define BIT_SHIFT_USB_SPRF_8814B 4
 #define BIT_MASK_USB_SPRF_8814B 0x3
 #define BIT_USB_SPRF_8814B(x) (((x) & BIT_MASK_USB_SPRF_8814B) << BIT_SHIFT_USB_SPRF_8814B)
-#define BIT_GET_USB_SPRF_8814B(x) (((x) >> BIT_SHIFT_USB_SPRF_8814B) & BIT_MASK_USB_SPRF_8814B)

+#define BIT_GET_USB_SPRF_8814B(x) (((x) >> BIT_SHIFT_USB_SPRF_8814B) & BIT_MASK_USB_SPRF_8814B)
+
 
 
 #define BIT_SHIFT_MCU_ROM_8814B 0
 #define BIT_MASK_MCU_ROM_8814B 0xf
 #define BIT_MCU_ROM_8814B(x) (((x) & BIT_MASK_MCU_ROM_8814B) << BIT_SHIFT_MCU_ROM_8814B)
-#define BIT_GET_MCU_ROM_8814B(x) (((x) >> BIT_SHIFT_MCU_ROM_8814B) & BIT_MASK_MCU_ROM_8814B)

+#define BIT_GET_MCU_ROM_8814B(x) (((x) >> BIT_SHIFT_MCU_ROM_8814B) & BIT_MASK_MCU_ROM_8814B)
+
 
 
 /* 2 REG_AFE_CTRL8_8814B */
@@ -1460,7 +1600,8 @@
 #define BIT_SHIFT_XTAL_SEL_TOK_8814B 0
 #define BIT_MASK_XTAL_SEL_TOK_8814B 0x7
 #define BIT_XTAL_SEL_TOK_8814B(x) (((x) & BIT_MASK_XTAL_SEL_TOK_8814B) << BIT_SHIFT_XTAL_SEL_TOK_8814B)
-#define BIT_GET_XTAL_SEL_TOK_8814B(x) (((x) >> BIT_SHIFT_XTAL_SEL_TOK_8814B) & BIT_MASK_XTAL_SEL_TOK_8814B)

+#define BIT_GET_XTAL_SEL_TOK_8814B(x) (((x) >> BIT_SHIFT_XTAL_SEL_TOK_8814B) & BIT_MASK_XTAL_SEL_TOK_8814B)
+
 
 
 /* 2 REG_USB_SIE_INTF_8814B */
@@ -1472,19 +1613,22 @@
 #define BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8814B 16
 #define BIT_MASK_USB_SIE_INTF_ADDR_V1_8814B 0x1ff
 #define BIT_USB_SIE_INTF_ADDR_V1_8814B(x) (((x) & BIT_MASK_USB_SIE_INTF_ADDR_V1_8814B) << BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8814B)
-#define BIT_GET_USB_SIE_INTF_ADDR_V1_8814B(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8814B) & BIT_MASK_USB_SIE_INTF_ADDR_V1_8814B)

+#define BIT_GET_USB_SIE_INTF_ADDR_V1_8814B(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8814B) & BIT_MASK_USB_SIE_INTF_ADDR_V1_8814B)
+
 
 
 #define BIT_SHIFT_USB_SIE_INTF_RD_8814B 8
 #define BIT_MASK_USB_SIE_INTF_RD_8814B 0xff
 #define BIT_USB_SIE_INTF_RD_8814B(x) (((x) & BIT_MASK_USB_SIE_INTF_RD_8814B) << BIT_SHIFT_USB_SIE_INTF_RD_8814B)
-#define BIT_GET_USB_SIE_INTF_RD_8814B(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_RD_8814B) & BIT_MASK_USB_SIE_INTF_RD_8814B)

+#define BIT_GET_USB_SIE_INTF_RD_8814B(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_RD_8814B) & BIT_MASK_USB_SIE_INTF_RD_8814B)
+
 
 
 #define BIT_SHIFT_USB_SIE_INTF_WD_8814B 0
 #define BIT_MASK_USB_SIE_INTF_WD_8814B 0xff
 #define BIT_USB_SIE_INTF_WD_8814B(x) (((x) & BIT_MASK_USB_SIE_INTF_WD_8814B) << BIT_SHIFT_USB_SIE_INTF_WD_8814B)
-#define BIT_GET_USB_SIE_INTF_WD_8814B(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_WD_8814B) & BIT_MASK_USB_SIE_INTF_WD_8814B)

+#define BIT_GET_USB_SIE_INTF_WD_8814B(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_WD_8814B) & BIT_MASK_USB_SIE_INTF_WD_8814B)
+
 
 
 /* 2 REG_PCIE_MIO_INTF_8814B */
@@ -1494,13 +1638,15 @@
 #define BIT_SHIFT_PCIE_MIO_WE_8814B 8
 #define BIT_MASK_PCIE_MIO_WE_8814B 0xf
 #define BIT_PCIE_MIO_WE_8814B(x) (((x) & BIT_MASK_PCIE_MIO_WE_8814B) << BIT_SHIFT_PCIE_MIO_WE_8814B)
-#define BIT_GET_PCIE_MIO_WE_8814B(x) (((x) >> BIT_SHIFT_PCIE_MIO_WE_8814B) & BIT_MASK_PCIE_MIO_WE_8814B)

+#define BIT_GET_PCIE_MIO_WE_8814B(x) (((x) >> BIT_SHIFT_PCIE_MIO_WE_8814B) & BIT_MASK_PCIE_MIO_WE_8814B)
+
 
 
 #define BIT_SHIFT_PCIE_MIO_ADDR_8814B 0
 #define BIT_MASK_PCIE_MIO_ADDR_8814B 0xff
 #define BIT_PCIE_MIO_ADDR_8814B(x) (((x) & BIT_MASK_PCIE_MIO_ADDR_8814B) << BIT_SHIFT_PCIE_MIO_ADDR_8814B)
-#define BIT_GET_PCIE_MIO_ADDR_8814B(x) (((x) >> BIT_SHIFT_PCIE_MIO_ADDR_8814B) & BIT_MASK_PCIE_MIO_ADDR_8814B)

+#define BIT_GET_PCIE_MIO_ADDR_8814B(x) (((x) >> BIT_SHIFT_PCIE_MIO_ADDR_8814B) & BIT_MASK_PCIE_MIO_ADDR_8814B)
+
 
 
 /* 2 REG_PCIE_MIO_INTD_8814B */
@@ -1508,7 +1654,8 @@
 #define BIT_SHIFT_PCIE_MIO_DATA_8814B 0
 #define BIT_MASK_PCIE_MIO_DATA_8814B 0xffffffffL
 #define BIT_PCIE_MIO_DATA_8814B(x) (((x) & BIT_MASK_PCIE_MIO_DATA_8814B) << BIT_SHIFT_PCIE_MIO_DATA_8814B)
-#define BIT_GET_PCIE_MIO_DATA_8814B(x) (((x) >> BIT_SHIFT_PCIE_MIO_DATA_8814B) & BIT_MASK_PCIE_MIO_DATA_8814B)

+#define BIT_GET_PCIE_MIO_DATA_8814B(x) (((x) >> BIT_SHIFT_PCIE_MIO_DATA_8814B) & BIT_MASK_PCIE_MIO_DATA_8814B)
+
 
 
 /* 2 REG_WLRF1_8814B */
@@ -1516,7 +1663,8 @@
 #define BIT_SHIFT_WLRF1_CTRL_8814B 24
 #define BIT_MASK_WLRF1_CTRL_8814B 0xff
 #define BIT_WLRF1_CTRL_8814B(x) (((x) & BIT_MASK_WLRF1_CTRL_8814B) << BIT_SHIFT_WLRF1_CTRL_8814B)
-#define BIT_GET_WLRF1_CTRL_8814B(x) (((x) >> BIT_SHIFT_WLRF1_CTRL_8814B) & BIT_MASK_WLRF1_CTRL_8814B)

+#define BIT_GET_WLRF1_CTRL_8814B(x) (((x) >> BIT_SHIFT_WLRF1_CTRL_8814B) & BIT_MASK_WLRF1_CTRL_8814B)
+
 
 
 /* 2 REG_SYS_CFG1_8814B */
@@ -1524,7 +1672,8 @@
 #define BIT_SHIFT_TRP_ICFG_8814B 28
 #define BIT_MASK_TRP_ICFG_8814B 0xf
 #define BIT_TRP_ICFG_8814B(x) (((x) & BIT_MASK_TRP_ICFG_8814B) << BIT_SHIFT_TRP_ICFG_8814B)
-#define BIT_GET_TRP_ICFG_8814B(x) (((x) >> BIT_SHIFT_TRP_ICFG_8814B) & BIT_MASK_TRP_ICFG_8814B)

+#define BIT_GET_TRP_ICFG_8814B(x) (((x) >> BIT_SHIFT_TRP_ICFG_8814B) & BIT_MASK_TRP_ICFG_8814B)
+
 
 #define BIT_RF_TYPE_ID_8814B BIT(27)
 #define BIT_BD_HCI_SEL_8814B BIT(26)
@@ -1537,13 +1686,15 @@
 #define BIT_SHIFT_VENDOR_ID_8814B 16
 #define BIT_MASK_VENDOR_ID_8814B 0xf
 #define BIT_VENDOR_ID_8814B(x) (((x) & BIT_MASK_VENDOR_ID_8814B) << BIT_SHIFT_VENDOR_ID_8814B)
-#define BIT_GET_VENDOR_ID_8814B(x) (((x) >> BIT_SHIFT_VENDOR_ID_8814B) & BIT_MASK_VENDOR_ID_8814B)

+#define BIT_GET_VENDOR_ID_8814B(x) (((x) >> BIT_SHIFT_VENDOR_ID_8814B) & BIT_MASK_VENDOR_ID_8814B)
+
 
 
 #define BIT_SHIFT_CHIP_VER_8814B 12
 #define BIT_MASK_CHIP_VER_8814B 0xf
 #define BIT_CHIP_VER_8814B(x) (((x) & BIT_MASK_CHIP_VER_8814B) << BIT_SHIFT_CHIP_VER_8814B)
-#define BIT_GET_CHIP_VER_8814B(x) (((x) >> BIT_SHIFT_CHIP_VER_8814B) & BIT_MASK_CHIP_VER_8814B)

+#define BIT_GET_CHIP_VER_8814B(x) (((x) >> BIT_SHIFT_CHIP_VER_8814B) & BIT_MASK_CHIP_VER_8814B)
+
 
 #define BIT_BD_MAC3_8814B BIT(11)
 #define BIT_BD_MAC1_8814B BIT(10)
@@ -1563,14 +1714,16 @@
 #define BIT_SHIFT_RF_RL_ID_8814B 28
 #define BIT_MASK_RF_RL_ID_8814B 0xf
 #define BIT_RF_RL_ID_8814B(x) (((x) & BIT_MASK_RF_RL_ID_8814B) << BIT_SHIFT_RF_RL_ID_8814B)
-#define BIT_GET_RF_RL_ID_8814B(x) (((x) >> BIT_SHIFT_RF_RL_ID_8814B) & BIT_MASK_RF_RL_ID_8814B)

+#define BIT_GET_RF_RL_ID_8814B(x) (((x) >> BIT_SHIFT_RF_RL_ID_8814B) & BIT_MASK_RF_RL_ID_8814B)
+
 
 #define BIT_HPHY_ICFG_8814B BIT(19)
 
 #define BIT_SHIFT_SEL_0XC0_8814B 16
 #define BIT_MASK_SEL_0XC0_8814B 0x3
 #define BIT_SEL_0XC0_8814B(x) (((x) & BIT_MASK_SEL_0XC0_8814B) << BIT_SHIFT_SEL_0XC0_8814B)
-#define BIT_GET_SEL_0XC0_8814B(x) (((x) >> BIT_SHIFT_SEL_0XC0_8814B) & BIT_MASK_SEL_0XC0_8814B)

+#define BIT_GET_SEL_0XC0_8814B(x) (((x) >> BIT_SHIFT_SEL_0XC0_8814B) & BIT_MASK_SEL_0XC0_8814B)
+
 
 #define BIT_USB_OPERATION_MODE_8814B BIT(10)
 #define BIT_BT_PDN_8814B BIT(9)
@@ -1581,19 +1734,22 @@
 #define BIT_SHIFT_HCI_SEL_8814B 4
 #define BIT_MASK_HCI_SEL_8814B 0x3
 #define BIT_HCI_SEL_8814B(x) (((x) & BIT_MASK_HCI_SEL_8814B) << BIT_SHIFT_HCI_SEL_8814B)
-#define BIT_GET_HCI_SEL_8814B(x) (((x) >> BIT_SHIFT_HCI_SEL_8814B) & BIT_MASK_HCI_SEL_8814B)

+#define BIT_GET_HCI_SEL_8814B(x) (((x) >> BIT_SHIFT_HCI_SEL_8814B) & BIT_MASK_HCI_SEL_8814B)
+
 
 
 #define BIT_SHIFT_PAD_HCI_SEL_8814B 2
 #define BIT_MASK_PAD_HCI_SEL_8814B 0x3
 #define BIT_PAD_HCI_SEL_8814B(x) (((x) & BIT_MASK_PAD_HCI_SEL_8814B) << BIT_SHIFT_PAD_HCI_SEL_8814B)
-#define BIT_GET_PAD_HCI_SEL_8814B(x) (((x) >> BIT_SHIFT_PAD_HCI_SEL_8814B) & BIT_MASK_PAD_HCI_SEL_8814B)

+#define BIT_GET_PAD_HCI_SEL_8814B(x) (((x) >> BIT_SHIFT_PAD_HCI_SEL_8814B) & BIT_MASK_PAD_HCI_SEL_8814B)
+
 
 
 #define BIT_SHIFT_EFS_HCI_SEL_8814B 0
 #define BIT_MASK_EFS_HCI_SEL_8814B 0x3
 #define BIT_EFS_HCI_SEL_8814B(x) (((x) & BIT_MASK_EFS_HCI_SEL_8814B) << BIT_SHIFT_EFS_HCI_SEL_8814B)
-#define BIT_GET_EFS_HCI_SEL_8814B(x) (((x) >> BIT_SHIFT_EFS_HCI_SEL_8814B) & BIT_MASK_EFS_HCI_SEL_8814B)

+#define BIT_GET_EFS_HCI_SEL_8814B(x) (((x) >> BIT_SHIFT_EFS_HCI_SEL_8814B) & BIT_MASK_EFS_HCI_SEL_8814B)
+
 
 
 /* 2 REG_SYS_STATUS2_8814B */
@@ -1605,13 +1761,15 @@
 #define BIT_SHIFT_EPVID1_8814B 8
 #define BIT_MASK_EPVID1_8814B 0xff
 #define BIT_EPVID1_8814B(x) (((x) & BIT_MASK_EPVID1_8814B) << BIT_SHIFT_EPVID1_8814B)
-#define BIT_GET_EPVID1_8814B(x) (((x) >> BIT_SHIFT_EPVID1_8814B) & BIT_MASK_EPVID1_8814B)

+#define BIT_GET_EPVID1_8814B(x) (((x) >> BIT_SHIFT_EPVID1_8814B) & BIT_MASK_EPVID1_8814B)
+
 
 
 #define BIT_SHIFT_EPVID0_8814B 0
 #define BIT_MASK_EPVID0_8814B 0xff
 #define BIT_EPVID0_8814B(x) (((x) & BIT_MASK_EPVID0_8814B) << BIT_SHIFT_EPVID0_8814B)
-#define BIT_GET_EPVID0_8814B(x) (((x) >> BIT_SHIFT_EPVID0_8814B) & BIT_MASK_EPVID0_8814B)

+#define BIT_GET_EPVID0_8814B(x) (((x) >> BIT_SHIFT_EPVID0_8814B) & BIT_MASK_EPVID0_8814B)
+
 
 
 /* 2 REG_SYS_CFG2_8814B */
@@ -1620,7 +1778,8 @@
 #define BIT_SHIFT_HW_ID_8814B 0
 #define BIT_MASK_HW_ID_8814B 0xff
 #define BIT_HW_ID_8814B(x) (((x) & BIT_MASK_HW_ID_8814B) << BIT_SHIFT_HW_ID_8814B)
-#define BIT_GET_HW_ID_8814B(x) (((x) >> BIT_SHIFT_HW_ID_8814B) & BIT_MASK_HW_ID_8814B)

+#define BIT_GET_HW_ID_8814B(x) (((x) >> BIT_SHIFT_HW_ID_8814B) & BIT_MASK_HW_ID_8814B)
+
 
 
 /* 2 REG_SYS_CFG3_8814B */
@@ -1653,7 +1812,8 @@
 #define BIT_SHIFT_CPU_DMEM_CON_8814B 0
 #define BIT_MASK_CPU_DMEM_CON_8814B 0xff
 #define BIT_CPU_DMEM_CON_8814B(x) (((x) & BIT_MASK_CPU_DMEM_CON_8814B) << BIT_SHIFT_CPU_DMEM_CON_8814B)
-#define BIT_GET_CPU_DMEM_CON_8814B(x) (((x) >> BIT_SHIFT_CPU_DMEM_CON_8814B) & BIT_MASK_CPU_DMEM_CON_8814B)

+#define BIT_GET_CPU_DMEM_CON_8814B(x) (((x) >> BIT_SHIFT_CPU_DMEM_CON_8814B) & BIT_MASK_CPU_DMEM_CON_8814B)
+
 
 
 /* 2 REG_BOOT_REASON_8814B */
@@ -1661,7 +1821,8 @@
 #define BIT_SHIFT_BOOT_REASON_8814B 0
 #define BIT_MASK_BOOT_REASON_8814B 0x7
 #define BIT_BOOT_REASON_8814B(x) (((x) & BIT_MASK_BOOT_REASON_8814B) << BIT_SHIFT_BOOT_REASON_8814B)
-#define BIT_GET_BOOT_REASON_8814B(x) (((x) >> BIT_SHIFT_BOOT_REASON_8814B) & BIT_MASK_BOOT_REASON_8814B)

+#define BIT_GET_BOOT_REASON_8814B(x) (((x) >> BIT_SHIFT_BOOT_REASON_8814B) & BIT_MASK_BOOT_REASON_8814B)
+
 
 
 /* 2 REG_NFCPAD_CTRL_8814B */
@@ -1676,19 +1837,22 @@
 #define BIT_SHIFT_NFCPAD_IO_SEL_8814B 8
 #define BIT_MASK_NFCPAD_IO_SEL_8814B 0xf
 #define BIT_NFCPAD_IO_SEL_8814B(x) (((x) & BIT_MASK_NFCPAD_IO_SEL_8814B) << BIT_SHIFT_NFCPAD_IO_SEL_8814B)
-#define BIT_GET_NFCPAD_IO_SEL_8814B(x) (((x) >> BIT_SHIFT_NFCPAD_IO_SEL_8814B) & BIT_MASK_NFCPAD_IO_SEL_8814B)

+#define BIT_GET_NFCPAD_IO_SEL_8814B(x) (((x) >> BIT_SHIFT_NFCPAD_IO_SEL_8814B) & BIT_MASK_NFCPAD_IO_SEL_8814B)
+
 
 
 #define BIT_SHIFT_NFCPAD_OUT_8814B 4
 #define BIT_MASK_NFCPAD_OUT_8814B 0xf
 #define BIT_NFCPAD_OUT_8814B(x) (((x) & BIT_MASK_NFCPAD_OUT_8814B) << BIT_SHIFT_NFCPAD_OUT_8814B)
-#define BIT_GET_NFCPAD_OUT_8814B(x) (((x) >> BIT_SHIFT_NFCPAD_OUT_8814B) & BIT_MASK_NFCPAD_OUT_8814B)

+#define BIT_GET_NFCPAD_OUT_8814B(x) (((x) >> BIT_SHIFT_NFCPAD_OUT_8814B) & BIT_MASK_NFCPAD_OUT_8814B)
+
 
 
 #define BIT_SHIFT_NFCPAD_IN_8814B 0
 #define BIT_MASK_NFCPAD_IN_8814B 0xf
 #define BIT_NFCPAD_IN_8814B(x) (((x) & BIT_MASK_NFCPAD_IN_8814B) << BIT_SHIFT_NFCPAD_IN_8814B)
-#define BIT_GET_NFCPAD_IN_8814B(x) (((x) >> BIT_SHIFT_NFCPAD_IN_8814B) & BIT_MASK_NFCPAD_IN_8814B)

+#define BIT_GET_NFCPAD_IN_8814B(x) (((x) >> BIT_SHIFT_NFCPAD_IN_8814B) & BIT_MASK_NFCPAD_IN_8814B)
+
 
 
 /* 2 REG_HIMR2_8814B */
@@ -1810,7 +1974,8 @@
 #define BIT_SHIFT_H2C_PKT_READADDR_8814B 0
 #define BIT_MASK_H2C_PKT_READADDR_8814B 0x3ffff
 #define BIT_H2C_PKT_READADDR_8814B(x) (((x) & BIT_MASK_H2C_PKT_READADDR_8814B) << BIT_SHIFT_H2C_PKT_READADDR_8814B)
-#define BIT_GET_H2C_PKT_READADDR_8814B(x) (((x) >> BIT_SHIFT_H2C_PKT_READADDR_8814B) & BIT_MASK_H2C_PKT_READADDR_8814B)

+#define BIT_GET_H2C_PKT_READADDR_8814B(x) (((x) >> BIT_SHIFT_H2C_PKT_READADDR_8814B) & BIT_MASK_H2C_PKT_READADDR_8814B)
+
 
 
 /* 2 REG_H2C_PKT_WRITEADDR_8814B */
@@ -1818,7 +1983,8 @@
 #define BIT_SHIFT_H2C_PKT_WRITEADDR_8814B 0
 #define BIT_MASK_H2C_PKT_WRITEADDR_8814B 0x3ffff
 #define BIT_H2C_PKT_WRITEADDR_8814B(x) (((x) & BIT_MASK_H2C_PKT_WRITEADDR_8814B) << BIT_SHIFT_H2C_PKT_WRITEADDR_8814B)
-#define BIT_GET_H2C_PKT_WRITEADDR_8814B(x) (((x) >> BIT_SHIFT_H2C_PKT_WRITEADDR_8814B) & BIT_MASK_H2C_PKT_WRITEADDR_8814B)

+#define BIT_GET_H2C_PKT_WRITEADDR_8814B(x) (((x) >> BIT_SHIFT_H2C_PKT_WRITEADDR_8814B) & BIT_MASK_H2C_PKT_WRITEADDR_8814B)
+
 
 
 /* 2 REG_MEM_PWR_CRTL_8814B */
@@ -1841,7 +2007,8 @@
 #define BIT_SHIFT_FW_DBG0_8814B 0
 #define BIT_MASK_FW_DBG0_8814B 0xffffffffL
 #define BIT_FW_DBG0_8814B(x) (((x) & BIT_MASK_FW_DBG0_8814B) << BIT_SHIFT_FW_DBG0_8814B)
-#define BIT_GET_FW_DBG0_8814B(x) (((x) >> BIT_SHIFT_FW_DBG0_8814B) & BIT_MASK_FW_DBG0_8814B)

+#define BIT_GET_FW_DBG0_8814B(x) (((x) >> BIT_SHIFT_FW_DBG0_8814B) & BIT_MASK_FW_DBG0_8814B)
+
 
 
 /* 2 REG_FW_DBG1_8814B */
@@ -1849,7 +2016,8 @@
 #define BIT_SHIFT_FW_DBG1_8814B 0
 #define BIT_MASK_FW_DBG1_8814B 0xffffffffL
 #define BIT_FW_DBG1_8814B(x) (((x) & BIT_MASK_FW_DBG1_8814B) << BIT_SHIFT_FW_DBG1_8814B)
-#define BIT_GET_FW_DBG1_8814B(x) (((x) >> BIT_SHIFT_FW_DBG1_8814B) & BIT_MASK_FW_DBG1_8814B)

+#define BIT_GET_FW_DBG1_8814B(x) (((x) >> BIT_SHIFT_FW_DBG1_8814B) & BIT_MASK_FW_DBG1_8814B)
+
 
 
 /* 2 REG_FW_DBG2_8814B */
@@ -1857,7 +2025,8 @@
 #define BIT_SHIFT_FW_DBG2_8814B 0
 #define BIT_MASK_FW_DBG2_8814B 0xffffffffL
 #define BIT_FW_DBG2_8814B(x) (((x) & BIT_MASK_FW_DBG2_8814B) << BIT_SHIFT_FW_DBG2_8814B)
-#define BIT_GET_FW_DBG2_8814B(x) (((x) >> BIT_SHIFT_FW_DBG2_8814B) & BIT_MASK_FW_DBG2_8814B)

+#define BIT_GET_FW_DBG2_8814B(x) (((x) >> BIT_SHIFT_FW_DBG2_8814B) & BIT_MASK_FW_DBG2_8814B)
+
 
 
 /* 2 REG_FW_DBG3_8814B */
@@ -1865,7 +2034,8 @@
 #define BIT_SHIFT_FW_DBG3_8814B 0
 #define BIT_MASK_FW_DBG3_8814B 0xffffffffL
 #define BIT_FW_DBG3_8814B(x) (((x) & BIT_MASK_FW_DBG3_8814B) << BIT_SHIFT_FW_DBG3_8814B)
-#define BIT_GET_FW_DBG3_8814B(x) (((x) >> BIT_SHIFT_FW_DBG3_8814B) & BIT_MASK_FW_DBG3_8814B)

+#define BIT_GET_FW_DBG3_8814B(x) (((x) >> BIT_SHIFT_FW_DBG3_8814B) & BIT_MASK_FW_DBG3_8814B)
+
 
 
 /* 2 REG_FW_DBG4_8814B */
@@ -1873,7 +2043,8 @@
 #define BIT_SHIFT_FW_DBG4_8814B 0
 #define BIT_MASK_FW_DBG4_8814B 0xffffffffL
 #define BIT_FW_DBG4_8814B(x) (((x) & BIT_MASK_FW_DBG4_8814B) << BIT_SHIFT_FW_DBG4_8814B)
-#define BIT_GET_FW_DBG4_8814B(x) (((x) >> BIT_SHIFT_FW_DBG4_8814B) & BIT_MASK_FW_DBG4_8814B)

+#define BIT_GET_FW_DBG4_8814B(x) (((x) >> BIT_SHIFT_FW_DBG4_8814B) & BIT_MASK_FW_DBG4_8814B)
+
 
 
 /* 2 REG_FW_DBG5_8814B */
@@ -1881,7 +2052,8 @@
 #define BIT_SHIFT_FW_DBG5_8814B 0
 #define BIT_MASK_FW_DBG5_8814B 0xffffffffL
 #define BIT_FW_DBG5_8814B(x) (((x) & BIT_MASK_FW_DBG5_8814B) << BIT_SHIFT_FW_DBG5_8814B)
-#define BIT_GET_FW_DBG5_8814B(x) (((x) >> BIT_SHIFT_FW_DBG5_8814B) & BIT_MASK_FW_DBG5_8814B)

+#define BIT_GET_FW_DBG5_8814B(x) (((x) >> BIT_SHIFT_FW_DBG5_8814B) & BIT_MASK_FW_DBG5_8814B)
+
 
 
 /* 2 REG_FW_DBG6_8814B */
@@ -1889,7 +2061,8 @@
 #define BIT_SHIFT_FW_DBG6_8814B 0
 #define BIT_MASK_FW_DBG6_8814B 0xffffffffL
 #define BIT_FW_DBG6_8814B(x) (((x) & BIT_MASK_FW_DBG6_8814B) << BIT_SHIFT_FW_DBG6_8814B)
-#define BIT_GET_FW_DBG6_8814B(x) (((x) >> BIT_SHIFT_FW_DBG6_8814B) & BIT_MASK_FW_DBG6_8814B)

+#define BIT_GET_FW_DBG6_8814B(x) (((x) >> BIT_SHIFT_FW_DBG6_8814B) & BIT_MASK_FW_DBG6_8814B)
+
 
 
 /* 2 REG_FW_DBG7_8814B */
@@ -1897,7 +2070,8 @@
 #define BIT_SHIFT_FW_DBG7_8814B 0
 #define BIT_MASK_FW_DBG7_8814B 0xffffffffL
 #define BIT_FW_DBG7_8814B(x) (((x) & BIT_MASK_FW_DBG7_8814B) << BIT_SHIFT_FW_DBG7_8814B)
-#define BIT_GET_FW_DBG7_8814B(x) (((x) >> BIT_SHIFT_FW_DBG7_8814B) & BIT_MASK_FW_DBG7_8814B)

+#define BIT_GET_FW_DBG7_8814B(x) (((x) >> BIT_SHIFT_FW_DBG7_8814B) & BIT_MASK_FW_DBG7_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -1907,19 +2081,22 @@
 #define BIT_SHIFT_LBMODE_8814B 24
 #define BIT_MASK_LBMODE_8814B 0x1f
 #define BIT_LBMODE_8814B(x) (((x) & BIT_MASK_LBMODE_8814B) << BIT_SHIFT_LBMODE_8814B)
-#define BIT_GET_LBMODE_8814B(x) (((x) >> BIT_SHIFT_LBMODE_8814B) & BIT_MASK_LBMODE_8814B)

+#define BIT_GET_LBMODE_8814B(x) (((x) >> BIT_SHIFT_LBMODE_8814B) & BIT_MASK_LBMODE_8814B)
+
 
 
 #define BIT_SHIFT_NETYPE1_8814B 18
 #define BIT_MASK_NETYPE1_8814B 0x3
 #define BIT_NETYPE1_8814B(x) (((x) & BIT_MASK_NETYPE1_8814B) << BIT_SHIFT_NETYPE1_8814B)
-#define BIT_GET_NETYPE1_8814B(x) (((x) >> BIT_SHIFT_NETYPE1_8814B) & BIT_MASK_NETYPE1_8814B)

+#define BIT_GET_NETYPE1_8814B(x) (((x) >> BIT_SHIFT_NETYPE1_8814B) & BIT_MASK_NETYPE1_8814B)
+
 
 
 #define BIT_SHIFT_NETYPE0_8814B 16
 #define BIT_MASK_NETYPE0_8814B 0x3
 #define BIT_NETYPE0_8814B(x) (((x) & BIT_MASK_NETYPE0_8814B) << BIT_SHIFT_NETYPE0_8814B)
-#define BIT_GET_NETYPE0_8814B(x) (((x) >> BIT_SHIFT_NETYPE0_8814B) & BIT_MASK_NETYPE0_8814B)

+#define BIT_GET_NETYPE0_8814B(x) (((x) >> BIT_SHIFT_NETYPE0_8814B) & BIT_MASK_NETYPE0_8814B)
+
 
 #define BIT_I2C_MAILBOX_EN_8814B BIT(12)
 #define BIT_SHCUT_EN_8814B BIT(11)
@@ -1942,7 +2119,8 @@
 #define BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8814B 0
 #define BIT_MASK_PKT_BUFF_ACCESS_CTRL_8814B 0xff
 #define BIT_PKT_BUFF_ACCESS_CTRL_8814B(x) (((x) & BIT_MASK_PKT_BUFF_ACCESS_CTRL_8814B) << BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8814B)
-#define BIT_GET_PKT_BUFF_ACCESS_CTRL_8814B(x) (((x) >> BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8814B) & BIT_MASK_PKT_BUFF_ACCESS_CTRL_8814B)

+#define BIT_GET_PKT_BUFF_ACCESS_CTRL_8814B(x) (((x) >> BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8814B) & BIT_MASK_PKT_BUFF_ACCESS_CTRL_8814B)
+
 
 
 /* 2 REG_TSF_CLK_STATE_8814B */
@@ -1953,37 +2131,43 @@
 #define BIT_SHIFT_TXDMA_HIQ_MAP_8814B 14
 #define BIT_MASK_TXDMA_HIQ_MAP_8814B 0x3
 #define BIT_TXDMA_HIQ_MAP_8814B(x) (((x) & BIT_MASK_TXDMA_HIQ_MAP_8814B) << BIT_SHIFT_TXDMA_HIQ_MAP_8814B)
-#define BIT_GET_TXDMA_HIQ_MAP_8814B(x) (((x) >> BIT_SHIFT_TXDMA_HIQ_MAP_8814B) & BIT_MASK_TXDMA_HIQ_MAP_8814B)

+#define BIT_GET_TXDMA_HIQ_MAP_8814B(x) (((x) >> BIT_SHIFT_TXDMA_HIQ_MAP_8814B) & BIT_MASK_TXDMA_HIQ_MAP_8814B)
+
 
 
 #define BIT_SHIFT_TXDMA_MGQ_MAP_8814B 12
 #define BIT_MASK_TXDMA_MGQ_MAP_8814B 0x3
 #define BIT_TXDMA_MGQ_MAP_8814B(x) (((x) & BIT_MASK_TXDMA_MGQ_MAP_8814B) << BIT_SHIFT_TXDMA_MGQ_MAP_8814B)
-#define BIT_GET_TXDMA_MGQ_MAP_8814B(x) (((x) >> BIT_SHIFT_TXDMA_MGQ_MAP_8814B) & BIT_MASK_TXDMA_MGQ_MAP_8814B)

+#define BIT_GET_TXDMA_MGQ_MAP_8814B(x) (((x) >> BIT_SHIFT_TXDMA_MGQ_MAP_8814B) & BIT_MASK_TXDMA_MGQ_MAP_8814B)
+
 
 
 #define BIT_SHIFT_TXDMA_BKQ_MAP_8814B 10
 #define BIT_MASK_TXDMA_BKQ_MAP_8814B 0x3
 #define BIT_TXDMA_BKQ_MAP_8814B(x) (((x) & BIT_MASK_TXDMA_BKQ_MAP_8814B) << BIT_SHIFT_TXDMA_BKQ_MAP_8814B)
-#define BIT_GET_TXDMA_BKQ_MAP_8814B(x) (((x) >> BIT_SHIFT_TXDMA_BKQ_MAP_8814B) & BIT_MASK_TXDMA_BKQ_MAP_8814B)

+#define BIT_GET_TXDMA_BKQ_MAP_8814B(x) (((x) >> BIT_SHIFT_TXDMA_BKQ_MAP_8814B) & BIT_MASK_TXDMA_BKQ_MAP_8814B)
+
 
 
 #define BIT_SHIFT_TXDMA_BEQ_MAP_8814B 8
 #define BIT_MASK_TXDMA_BEQ_MAP_8814B 0x3
 #define BIT_TXDMA_BEQ_MAP_8814B(x) (((x) & BIT_MASK_TXDMA_BEQ_MAP_8814B) << BIT_SHIFT_TXDMA_BEQ_MAP_8814B)
-#define BIT_GET_TXDMA_BEQ_MAP_8814B(x) (((x) >> BIT_SHIFT_TXDMA_BEQ_MAP_8814B) & BIT_MASK_TXDMA_BEQ_MAP_8814B)

+#define BIT_GET_TXDMA_BEQ_MAP_8814B(x) (((x) >> BIT_SHIFT_TXDMA_BEQ_MAP_8814B) & BIT_MASK_TXDMA_BEQ_MAP_8814B)
+
 
 
 #define BIT_SHIFT_TXDMA_VIQ_MAP_8814B 6
 #define BIT_MASK_TXDMA_VIQ_MAP_8814B 0x3
 #define BIT_TXDMA_VIQ_MAP_8814B(x) (((x) & BIT_MASK_TXDMA_VIQ_MAP_8814B) << BIT_SHIFT_TXDMA_VIQ_MAP_8814B)
-#define BIT_GET_TXDMA_VIQ_MAP_8814B(x) (((x) >> BIT_SHIFT_TXDMA_VIQ_MAP_8814B) & BIT_MASK_TXDMA_VIQ_MAP_8814B)

+#define BIT_GET_TXDMA_VIQ_MAP_8814B(x) (((x) >> BIT_SHIFT_TXDMA_VIQ_MAP_8814B) & BIT_MASK_TXDMA_VIQ_MAP_8814B)
+
 
 
 #define BIT_SHIFT_TXDMA_VOQ_MAP_8814B 4
 #define BIT_MASK_TXDMA_VOQ_MAP_8814B 0x3
 #define BIT_TXDMA_VOQ_MAP_8814B(x) (((x) & BIT_MASK_TXDMA_VOQ_MAP_8814B) << BIT_SHIFT_TXDMA_VOQ_MAP_8814B)
-#define BIT_GET_TXDMA_VOQ_MAP_8814B(x) (((x) >> BIT_SHIFT_TXDMA_VOQ_MAP_8814B) & BIT_MASK_TXDMA_VOQ_MAP_8814B)

+#define BIT_GET_TXDMA_VOQ_MAP_8814B(x) (((x) >> BIT_SHIFT_TXDMA_VOQ_MAP_8814B) & BIT_MASK_TXDMA_VOQ_MAP_8814B)
+
 
 #define BIT_RXDMA_AGG_EN_8814B BIT(2)
 #define BIT_RXSHFT_EN_8814B BIT(1)
@@ -1996,13 +2180,15 @@
 #define BIT_SHIFT_RXFFOVFL_RSV_V2_8814B 8
 #define BIT_MASK_RXFFOVFL_RSV_V2_8814B 0xf
 #define BIT_RXFFOVFL_RSV_V2_8814B(x) (((x) & BIT_MASK_RXFFOVFL_RSV_V2_8814B) << BIT_SHIFT_RXFFOVFL_RSV_V2_8814B)
-#define BIT_GET_RXFFOVFL_RSV_V2_8814B(x) (((x) >> BIT_SHIFT_RXFFOVFL_RSV_V2_8814B) & BIT_MASK_RXFFOVFL_RSV_V2_8814B)

+#define BIT_GET_RXFFOVFL_RSV_V2_8814B(x) (((x) >> BIT_SHIFT_RXFFOVFL_RSV_V2_8814B) & BIT_MASK_RXFFOVFL_RSV_V2_8814B)
+
 
 
 #define BIT_SHIFT_TXPKTBUF_PGBNDY_8814B 0
 #define BIT_MASK_TXPKTBUF_PGBNDY_8814B 0xff
 #define BIT_TXPKTBUF_PGBNDY_8814B(x) (((x) & BIT_MASK_TXPKTBUF_PGBNDY_8814B) << BIT_SHIFT_TXPKTBUF_PGBNDY_8814B)
-#define BIT_GET_TXPKTBUF_PGBNDY_8814B(x) (((x) >> BIT_SHIFT_TXPKTBUF_PGBNDY_8814B) & BIT_MASK_TXPKTBUF_PGBNDY_8814B)

+#define BIT_GET_TXPKTBUF_PGBNDY_8814B(x) (((x) >> BIT_SHIFT_TXPKTBUF_PGBNDY_8814B) & BIT_MASK_TXPKTBUF_PGBNDY_8814B)
+
 
 
 /* 2 REG_PTA_I2C_MBOX_8814B */
@@ -2012,20 +2198,23 @@
 #define BIT_SHIFT_I2C_M_STATUS_8814B 8
 #define BIT_MASK_I2C_M_STATUS_8814B 0xf
 #define BIT_I2C_M_STATUS_8814B(x) (((x) & BIT_MASK_I2C_M_STATUS_8814B) << BIT_SHIFT_I2C_M_STATUS_8814B)
-#define BIT_GET_I2C_M_STATUS_8814B(x) (((x) >> BIT_SHIFT_I2C_M_STATUS_8814B) & BIT_MASK_I2C_M_STATUS_8814B)

+#define BIT_GET_I2C_M_STATUS_8814B(x) (((x) >> BIT_SHIFT_I2C_M_STATUS_8814B) & BIT_MASK_I2C_M_STATUS_8814B)
+
 
 
 #define BIT_SHIFT_I2C_M_BUS_GNT_FW_8814B 4
 #define BIT_MASK_I2C_M_BUS_GNT_FW_8814B 0x7
 #define BIT_I2C_M_BUS_GNT_FW_8814B(x) (((x) & BIT_MASK_I2C_M_BUS_GNT_FW_8814B) << BIT_SHIFT_I2C_M_BUS_GNT_FW_8814B)
-#define BIT_GET_I2C_M_BUS_GNT_FW_8814B(x) (((x) >> BIT_SHIFT_I2C_M_BUS_GNT_FW_8814B) & BIT_MASK_I2C_M_BUS_GNT_FW_8814B)

+#define BIT_GET_I2C_M_BUS_GNT_FW_8814B(x) (((x) >> BIT_SHIFT_I2C_M_BUS_GNT_FW_8814B) & BIT_MASK_I2C_M_BUS_GNT_FW_8814B)
+
 
 #define BIT_I2C_M_GNT_FW_8814B BIT(3)
 
 #define BIT_SHIFT_I2C_M_SPEED_8814B 1
 #define BIT_MASK_I2C_M_SPEED_8814B 0x3
 #define BIT_I2C_M_SPEED_8814B(x) (((x) & BIT_MASK_I2C_M_SPEED_8814B) << BIT_SHIFT_I2C_M_SPEED_8814B)
-#define BIT_GET_I2C_M_SPEED_8814B(x) (((x) >> BIT_SHIFT_I2C_M_SPEED_8814B) & BIT_MASK_I2C_M_SPEED_8814B)

+#define BIT_GET_I2C_M_SPEED_8814B(x) (((x) >> BIT_SHIFT_I2C_M_SPEED_8814B) & BIT_MASK_I2C_M_SPEED_8814B)
+
 
 #define BIT_I2C_M_UNLOCK_8814B BIT(0)
 
@@ -2036,7 +2225,8 @@
 #define BIT_SHIFT_RXFF0_BNDY_V2_8814B 0
 #define BIT_MASK_RXFF0_BNDY_V2_8814B 0x3ffff
 #define BIT_RXFF0_BNDY_V2_8814B(x) (((x) & BIT_MASK_RXFF0_BNDY_V2_8814B) << BIT_SHIFT_RXFF0_BNDY_V2_8814B)
-#define BIT_GET_RXFF0_BNDY_V2_8814B(x) (((x) >> BIT_SHIFT_RXFF0_BNDY_V2_8814B) & BIT_MASK_RXFF0_BNDY_V2_8814B)

+#define BIT_GET_RXFF0_BNDY_V2_8814B(x) (((x) >> BIT_SHIFT_RXFF0_BNDY_V2_8814B) & BIT_MASK_RXFF0_BNDY_V2_8814B)
+
 
 
 /* 2 REG_FE1IMR_8814B */
@@ -2105,7 +2295,8 @@
 #define BIT_SHIFT_CPWM_MOD_8814B 24
 #define BIT_MASK_CPWM_MOD_8814B 0x7f
 #define BIT_CPWM_MOD_8814B(x) (((x) & BIT_MASK_CPWM_MOD_8814B) << BIT_SHIFT_CPWM_MOD_8814B)
-#define BIT_GET_CPWM_MOD_8814B(x) (((x) >> BIT_SHIFT_CPWM_MOD_8814B) & BIT_MASK_CPWM_MOD_8814B)

+#define BIT_GET_CPWM_MOD_8814B(x) (((x) >> BIT_SHIFT_CPWM_MOD_8814B) & BIT_MASK_CPWM_MOD_8814B)
+
 
 
 /* 2 REG_FWIMR_8814B */
@@ -2225,7 +2416,8 @@
 #define BIT_SHIFT_PKTBUF_WRITE_EN_8814B 24
 #define BIT_MASK_PKTBUF_WRITE_EN_8814B 0xff
 #define BIT_PKTBUF_WRITE_EN_8814B(x) (((x) & BIT_MASK_PKTBUF_WRITE_EN_8814B) << BIT_SHIFT_PKTBUF_WRITE_EN_8814B)
-#define BIT_GET_PKTBUF_WRITE_EN_8814B(x) (((x) >> BIT_SHIFT_PKTBUF_WRITE_EN_8814B) & BIT_MASK_PKTBUF_WRITE_EN_8814B)

+#define BIT_GET_PKTBUF_WRITE_EN_8814B(x) (((x) >> BIT_SHIFT_PKTBUF_WRITE_EN_8814B) & BIT_MASK_PKTBUF_WRITE_EN_8814B)
+
 
 #define BIT_TXRPTBUF_DBG_8814B BIT(23)
 
@@ -2236,7 +2428,8 @@
 #define BIT_SHIFT_PKTBUF_DBG_ADDR_8814B 0
 #define BIT_MASK_PKTBUF_DBG_ADDR_8814B 0x1fff
 #define BIT_PKTBUF_DBG_ADDR_8814B(x) (((x) & BIT_MASK_PKTBUF_DBG_ADDR_8814B) << BIT_SHIFT_PKTBUF_DBG_ADDR_8814B)
-#define BIT_GET_PKTBUF_DBG_ADDR_8814B(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_ADDR_8814B) & BIT_MASK_PKTBUF_DBG_ADDR_8814B)

+#define BIT_GET_PKTBUF_DBG_ADDR_8814B(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_ADDR_8814B) & BIT_MASK_PKTBUF_DBG_ADDR_8814B)
+
 
 
 /* 2 REG_PKTBUF_DBG_DATA_L_8814B */
@@ -2244,7 +2437,8 @@
 #define BIT_SHIFT_PKTBUF_DBG_DATA_L_8814B 0
 #define BIT_MASK_PKTBUF_DBG_DATA_L_8814B 0xffffffffL
 #define BIT_PKTBUF_DBG_DATA_L_8814B(x) (((x) & BIT_MASK_PKTBUF_DBG_DATA_L_8814B) << BIT_SHIFT_PKTBUF_DBG_DATA_L_8814B)
-#define BIT_GET_PKTBUF_DBG_DATA_L_8814B(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_L_8814B) & BIT_MASK_PKTBUF_DBG_DATA_L_8814B)

+#define BIT_GET_PKTBUF_DBG_DATA_L_8814B(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_L_8814B) & BIT_MASK_PKTBUF_DBG_DATA_L_8814B)
+
 
 
 /* 2 REG_PKTBUF_DBG_DATA_H_8814B */
@@ -2252,7 +2446,8 @@
 #define BIT_SHIFT_PKTBUF_DBG_DATA_H_8814B 0
 #define BIT_MASK_PKTBUF_DBG_DATA_H_8814B 0xffffffffL
 #define BIT_PKTBUF_DBG_DATA_H_8814B(x) (((x) & BIT_MASK_PKTBUF_DBG_DATA_H_8814B) << BIT_SHIFT_PKTBUF_DBG_DATA_H_8814B)
-#define BIT_GET_PKTBUF_DBG_DATA_H_8814B(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_H_8814B) & BIT_MASK_PKTBUF_DBG_DATA_H_8814B)

+#define BIT_GET_PKTBUF_DBG_DATA_H_8814B(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_H_8814B) & BIT_MASK_PKTBUF_DBG_DATA_H_8814B)
+
 
 
 /* 2 REG_CPWM2_8814B */
@@ -2260,14 +2455,16 @@
 #define BIT_SHIFT_L0S_TO_RCVY_NUM_8814B 16
 #define BIT_MASK_L0S_TO_RCVY_NUM_8814B 0xff
 #define BIT_L0S_TO_RCVY_NUM_8814B(x) (((x) & BIT_MASK_L0S_TO_RCVY_NUM_8814B) << BIT_SHIFT_L0S_TO_RCVY_NUM_8814B)
-#define BIT_GET_L0S_TO_RCVY_NUM_8814B(x) (((x) >> BIT_SHIFT_L0S_TO_RCVY_NUM_8814B) & BIT_MASK_L0S_TO_RCVY_NUM_8814B)

+#define BIT_GET_L0S_TO_RCVY_NUM_8814B(x) (((x) >> BIT_SHIFT_L0S_TO_RCVY_NUM_8814B) & BIT_MASK_L0S_TO_RCVY_NUM_8814B)
+
 
 #define BIT_CPWM2_TOGGLING_8814B BIT(15)
 
 #define BIT_SHIFT_CPWM2_MOD_8814B 0
 #define BIT_MASK_CPWM2_MOD_8814B 0x7fff
 #define BIT_CPWM2_MOD_8814B(x) (((x) & BIT_MASK_CPWM2_MOD_8814B) << BIT_SHIFT_CPWM2_MOD_8814B)
-#define BIT_GET_CPWM2_MOD_8814B(x) (((x) >> BIT_SHIFT_CPWM2_MOD_8814B) & BIT_MASK_CPWM2_MOD_8814B)

+#define BIT_GET_CPWM2_MOD_8814B(x) (((x) >> BIT_SHIFT_CPWM2_MOD_8814B) & BIT_MASK_CPWM2_MOD_8814B)
+
 
 
 /* 2 REG_TC0_CTRL_8814B */
@@ -2278,7 +2475,8 @@
 #define BIT_SHIFT_TC0DATA_8814B 0
 #define BIT_MASK_TC0DATA_8814B 0xffffff
 #define BIT_TC0DATA_8814B(x) (((x) & BIT_MASK_TC0DATA_8814B) << BIT_SHIFT_TC0DATA_8814B)
-#define BIT_GET_TC0DATA_8814B(x) (((x) >> BIT_SHIFT_TC0DATA_8814B) & BIT_MASK_TC0DATA_8814B)

+#define BIT_GET_TC0DATA_8814B(x) (((x) >> BIT_SHIFT_TC0DATA_8814B) & BIT_MASK_TC0DATA_8814B)
+
 
 
 /* 2 REG_TC1_CTRL_8814B */
@@ -2289,7 +2487,8 @@
 #define BIT_SHIFT_TC1DATA_8814B 0
 #define BIT_MASK_TC1DATA_8814B 0xffffff
 #define BIT_TC1DATA_8814B(x) (((x) & BIT_MASK_TC1DATA_8814B) << BIT_SHIFT_TC1DATA_8814B)
-#define BIT_GET_TC1DATA_8814B(x) (((x) >> BIT_SHIFT_TC1DATA_8814B) & BIT_MASK_TC1DATA_8814B)

+#define BIT_GET_TC1DATA_8814B(x) (((x) >> BIT_SHIFT_TC1DATA_8814B) & BIT_MASK_TC1DATA_8814B)
+
 
 
 /* 2 REG_TC2_CTRL_8814B */
@@ -2300,7 +2499,8 @@
 #define BIT_SHIFT_TC2DATA_8814B 0
 #define BIT_MASK_TC2DATA_8814B 0xffffff
 #define BIT_TC2DATA_8814B(x) (((x) & BIT_MASK_TC2DATA_8814B) << BIT_SHIFT_TC2DATA_8814B)
-#define BIT_GET_TC2DATA_8814B(x) (((x) >> BIT_SHIFT_TC2DATA_8814B) & BIT_MASK_TC2DATA_8814B)

+#define BIT_GET_TC2DATA_8814B(x) (((x) >> BIT_SHIFT_TC2DATA_8814B) & BIT_MASK_TC2DATA_8814B)
+
 
 
 /* 2 REG_TC3_CTRL_8814B */
@@ -2311,7 +2511,8 @@
 #define BIT_SHIFT_TC3DATA_8814B 0
 #define BIT_MASK_TC3DATA_8814B 0xffffff
 #define BIT_TC3DATA_8814B(x) (((x) & BIT_MASK_TC3DATA_8814B) << BIT_SHIFT_TC3DATA_8814B)
-#define BIT_GET_TC3DATA_8814B(x) (((x) >> BIT_SHIFT_TC3DATA_8814B) & BIT_MASK_TC3DATA_8814B)

+#define BIT_GET_TC3DATA_8814B(x) (((x) >> BIT_SHIFT_TC3DATA_8814B) & BIT_MASK_TC3DATA_8814B)
+
 
 
 /* 2 REG_TC4_CTRL_8814B */
@@ -2322,7 +2523,8 @@
 #define BIT_SHIFT_TC4DATA_8814B 0
 #define BIT_MASK_TC4DATA_8814B 0xffffff
 #define BIT_TC4DATA_8814B(x) (((x) & BIT_MASK_TC4DATA_8814B) << BIT_SHIFT_TC4DATA_8814B)
-#define BIT_GET_TC4DATA_8814B(x) (((x) >> BIT_SHIFT_TC4DATA_8814B) & BIT_MASK_TC4DATA_8814B)

+#define BIT_GET_TC4DATA_8814B(x) (((x) >> BIT_SHIFT_TC4DATA_8814B) & BIT_MASK_TC4DATA_8814B)
+
 
 
 /* 2 REG_TCUNIT_BASE_8814B */
@@ -2330,7 +2532,8 @@
 #define BIT_SHIFT_TCUNIT_BASE_8814B 0
 #define BIT_MASK_TCUNIT_BASE_8814B 0x3fff
 #define BIT_TCUNIT_BASE_8814B(x) (((x) & BIT_MASK_TCUNIT_BASE_8814B) << BIT_SHIFT_TCUNIT_BASE_8814B)
-#define BIT_GET_TCUNIT_BASE_8814B(x) (((x) >> BIT_SHIFT_TCUNIT_BASE_8814B) & BIT_MASK_TCUNIT_BASE_8814B)

+#define BIT_GET_TCUNIT_BASE_8814B(x) (((x) >> BIT_SHIFT_TCUNIT_BASE_8814B) & BIT_MASK_TCUNIT_BASE_8814B)
+
 
 
 /* 2 REG_TC5_CTRL_8814B */
@@ -2341,7 +2544,8 @@
 #define BIT_SHIFT_TC5DATA_8814B 0
 #define BIT_MASK_TC5DATA_8814B 0xffffff
 #define BIT_TC5DATA_8814B(x) (((x) & BIT_MASK_TC5DATA_8814B) << BIT_SHIFT_TC5DATA_8814B)
-#define BIT_GET_TC5DATA_8814B(x) (((x) >> BIT_SHIFT_TC5DATA_8814B) & BIT_MASK_TC5DATA_8814B)

+#define BIT_GET_TC5DATA_8814B(x) (((x) >> BIT_SHIFT_TC5DATA_8814B) & BIT_MASK_TC5DATA_8814B)
+
 
 
 /* 2 REG_TC6_CTRL_8814B */
@@ -2352,7 +2556,8 @@
 #define BIT_SHIFT_TC6DATA_8814B 0
 #define BIT_MASK_TC6DATA_8814B 0xffffff
 #define BIT_TC6DATA_8814B(x) (((x) & BIT_MASK_TC6DATA_8814B) << BIT_SHIFT_TC6DATA_8814B)
-#define BIT_GET_TC6DATA_8814B(x) (((x) >> BIT_SHIFT_TC6DATA_8814B) & BIT_MASK_TC6DATA_8814B)

+#define BIT_GET_TC6DATA_8814B(x) (((x) >> BIT_SHIFT_TC6DATA_8814B) & BIT_MASK_TC6DATA_8814B)
+
 
 
 /* 2 REG_MBIST_FAIL_8814B */
@@ -2360,25 +2565,29 @@
 #define BIT_SHIFT_8051_MBIST_FAIL_8814B 26
 #define BIT_MASK_8051_MBIST_FAIL_8814B 0x7
 #define BIT_8051_MBIST_FAIL_8814B(x) (((x) & BIT_MASK_8051_MBIST_FAIL_8814B) << BIT_SHIFT_8051_MBIST_FAIL_8814B)
-#define BIT_GET_8051_MBIST_FAIL_8814B(x) (((x) >> BIT_SHIFT_8051_MBIST_FAIL_8814B) & BIT_MASK_8051_MBIST_FAIL_8814B)

+#define BIT_GET_8051_MBIST_FAIL_8814B(x) (((x) >> BIT_SHIFT_8051_MBIST_FAIL_8814B) & BIT_MASK_8051_MBIST_FAIL_8814B)
+
 
 
 #define BIT_SHIFT_USB_MBIST_FAIL_8814B 24
 #define BIT_MASK_USB_MBIST_FAIL_8814B 0x3
 #define BIT_USB_MBIST_FAIL_8814B(x) (((x) & BIT_MASK_USB_MBIST_FAIL_8814B) << BIT_SHIFT_USB_MBIST_FAIL_8814B)
-#define BIT_GET_USB_MBIST_FAIL_8814B(x) (((x) >> BIT_SHIFT_USB_MBIST_FAIL_8814B) & BIT_MASK_USB_MBIST_FAIL_8814B)

+#define BIT_GET_USB_MBIST_FAIL_8814B(x) (((x) >> BIT_SHIFT_USB_MBIST_FAIL_8814B) & BIT_MASK_USB_MBIST_FAIL_8814B)
+
 
 
 #define BIT_SHIFT_PCIE_MBIST_FAIL_8814B 16
 #define BIT_MASK_PCIE_MBIST_FAIL_8814B 0x3f
 #define BIT_PCIE_MBIST_FAIL_8814B(x) (((x) & BIT_MASK_PCIE_MBIST_FAIL_8814B) << BIT_SHIFT_PCIE_MBIST_FAIL_8814B)
-#define BIT_GET_PCIE_MBIST_FAIL_8814B(x) (((x) >> BIT_SHIFT_PCIE_MBIST_FAIL_8814B) & BIT_MASK_PCIE_MBIST_FAIL_8814B)

+#define BIT_GET_PCIE_MBIST_FAIL_8814B(x) (((x) >> BIT_SHIFT_PCIE_MBIST_FAIL_8814B) & BIT_MASK_PCIE_MBIST_FAIL_8814B)
+
 
 
 #define BIT_SHIFT_MAC_MBIST_FAIL_8814B 0
 #define BIT_MASK_MAC_MBIST_FAIL_8814B 0xfff
 #define BIT_MAC_MBIST_FAIL_8814B(x) (((x) & BIT_MASK_MAC_MBIST_FAIL_8814B) << BIT_SHIFT_MAC_MBIST_FAIL_8814B)
-#define BIT_GET_MAC_MBIST_FAIL_8814B(x) (((x) >> BIT_SHIFT_MAC_MBIST_FAIL_8814B) & BIT_MASK_MAC_MBIST_FAIL_8814B)

+#define BIT_GET_MAC_MBIST_FAIL_8814B(x) (((x) >> BIT_SHIFT_MAC_MBIST_FAIL_8814B) & BIT_MASK_MAC_MBIST_FAIL_8814B)
+
 
 
 /* 2 REG_MBIST_START_PAUSE_8814B */
@@ -2386,25 +2595,29 @@
 #define BIT_SHIFT_8051_MBIST_START_PAUSE_8814B 26
 #define BIT_MASK_8051_MBIST_START_PAUSE_8814B 0x7
 #define BIT_8051_MBIST_START_PAUSE_8814B(x) (((x) & BIT_MASK_8051_MBIST_START_PAUSE_8814B) << BIT_SHIFT_8051_MBIST_START_PAUSE_8814B)
-#define BIT_GET_8051_MBIST_START_PAUSE_8814B(x) (((x) >> BIT_SHIFT_8051_MBIST_START_PAUSE_8814B) & BIT_MASK_8051_MBIST_START_PAUSE_8814B)

+#define BIT_GET_8051_MBIST_START_PAUSE_8814B(x) (((x) >> BIT_SHIFT_8051_MBIST_START_PAUSE_8814B) & BIT_MASK_8051_MBIST_START_PAUSE_8814B)
+
 
 
 #define BIT_SHIFT_USB_MBIST_START_PAUSE_8814B 24
 #define BIT_MASK_USB_MBIST_START_PAUSE_8814B 0x3
 #define BIT_USB_MBIST_START_PAUSE_8814B(x) (((x) & BIT_MASK_USB_MBIST_START_PAUSE_8814B) << BIT_SHIFT_USB_MBIST_START_PAUSE_8814B)
-#define BIT_GET_USB_MBIST_START_PAUSE_8814B(x) (((x) >> BIT_SHIFT_USB_MBIST_START_PAUSE_8814B) & BIT_MASK_USB_MBIST_START_PAUSE_8814B)

+#define BIT_GET_USB_MBIST_START_PAUSE_8814B(x) (((x) >> BIT_SHIFT_USB_MBIST_START_PAUSE_8814B) & BIT_MASK_USB_MBIST_START_PAUSE_8814B)
+
 
 
 #define BIT_SHIFT_PCIE_MBIST_START_PAUSE_8814B 16
 #define BIT_MASK_PCIE_MBIST_START_PAUSE_8814B 0x3f
 #define BIT_PCIE_MBIST_START_PAUSE_8814B(x) (((x) & BIT_MASK_PCIE_MBIST_START_PAUSE_8814B) << BIT_SHIFT_PCIE_MBIST_START_PAUSE_8814B)
-#define BIT_GET_PCIE_MBIST_START_PAUSE_8814B(x) (((x) >> BIT_SHIFT_PCIE_MBIST_START_PAUSE_8814B) & BIT_MASK_PCIE_MBIST_START_PAUSE_8814B)

+#define BIT_GET_PCIE_MBIST_START_PAUSE_8814B(x) (((x) >> BIT_SHIFT_PCIE_MBIST_START_PAUSE_8814B) & BIT_MASK_PCIE_MBIST_START_PAUSE_8814B)
+
 
 
 #define BIT_SHIFT_MAC_MBIST_START_PAUSE_8814B 0
 #define BIT_MASK_MAC_MBIST_START_PAUSE_8814B 0xfff
 #define BIT_MAC_MBIST_START_PAUSE_8814B(x) (((x) & BIT_MASK_MAC_MBIST_START_PAUSE_8814B) << BIT_SHIFT_MAC_MBIST_START_PAUSE_8814B)
-#define BIT_GET_MAC_MBIST_START_PAUSE_8814B(x) (((x) >> BIT_SHIFT_MAC_MBIST_START_PAUSE_8814B) & BIT_MASK_MAC_MBIST_START_PAUSE_8814B)

+#define BIT_GET_MAC_MBIST_START_PAUSE_8814B(x) (((x) >> BIT_SHIFT_MAC_MBIST_START_PAUSE_8814B) & BIT_MASK_MAC_MBIST_START_PAUSE_8814B)
+
 
 
 /* 2 REG_MBIST_DONE_8814B */
@@ -2412,25 +2625,29 @@
 #define BIT_SHIFT_8051_MBIST_DONE_8814B 26
 #define BIT_MASK_8051_MBIST_DONE_8814B 0x7
 #define BIT_8051_MBIST_DONE_8814B(x) (((x) & BIT_MASK_8051_MBIST_DONE_8814B) << BIT_SHIFT_8051_MBIST_DONE_8814B)
-#define BIT_GET_8051_MBIST_DONE_8814B(x) (((x) >> BIT_SHIFT_8051_MBIST_DONE_8814B) & BIT_MASK_8051_MBIST_DONE_8814B)

+#define BIT_GET_8051_MBIST_DONE_8814B(x) (((x) >> BIT_SHIFT_8051_MBIST_DONE_8814B) & BIT_MASK_8051_MBIST_DONE_8814B)
+
 
 
 #define BIT_SHIFT_USB_MBIST_DONE_8814B 24
 #define BIT_MASK_USB_MBIST_DONE_8814B 0x3
 #define BIT_USB_MBIST_DONE_8814B(x) (((x) & BIT_MASK_USB_MBIST_DONE_8814B) << BIT_SHIFT_USB_MBIST_DONE_8814B)
-#define BIT_GET_USB_MBIST_DONE_8814B(x) (((x) >> BIT_SHIFT_USB_MBIST_DONE_8814B) & BIT_MASK_USB_MBIST_DONE_8814B)

+#define BIT_GET_USB_MBIST_DONE_8814B(x) (((x) >> BIT_SHIFT_USB_MBIST_DONE_8814B) & BIT_MASK_USB_MBIST_DONE_8814B)
+
 
 
 #define BIT_SHIFT_PCIE_MBIST_DONE_8814B 16
 #define BIT_MASK_PCIE_MBIST_DONE_8814B 0x3f
 #define BIT_PCIE_MBIST_DONE_8814B(x) (((x) & BIT_MASK_PCIE_MBIST_DONE_8814B) << BIT_SHIFT_PCIE_MBIST_DONE_8814B)
-#define BIT_GET_PCIE_MBIST_DONE_8814B(x) (((x) >> BIT_SHIFT_PCIE_MBIST_DONE_8814B) & BIT_MASK_PCIE_MBIST_DONE_8814B)

+#define BIT_GET_PCIE_MBIST_DONE_8814B(x) (((x) >> BIT_SHIFT_PCIE_MBIST_DONE_8814B) & BIT_MASK_PCIE_MBIST_DONE_8814B)
+
 
 
 #define BIT_SHIFT_MAC_MBIST_DONE_8814B 0
 #define BIT_MASK_MAC_MBIST_DONE_8814B 0xfff
 #define BIT_MAC_MBIST_DONE_8814B(x) (((x) & BIT_MASK_MAC_MBIST_DONE_8814B) << BIT_SHIFT_MAC_MBIST_DONE_8814B)
-#define BIT_GET_MAC_MBIST_DONE_8814B(x) (((x) >> BIT_SHIFT_MAC_MBIST_DONE_8814B) & BIT_MASK_MAC_MBIST_DONE_8814B)

+#define BIT_GET_MAC_MBIST_DONE_8814B(x) (((x) >> BIT_SHIFT_MAC_MBIST_DONE_8814B) & BIT_MASK_MAC_MBIST_DONE_8814B)
+
 
 
 /* 2 REG_MBIST_FAIL_NRML_8814B */
@@ -2438,7 +2655,8 @@
 #define BIT_SHIFT_MBIST_FAIL_NRML_8814B 0
 #define BIT_MASK_MBIST_FAIL_NRML_8814B 0xffffffffL
 #define BIT_MBIST_FAIL_NRML_8814B(x) (((x) & BIT_MASK_MBIST_FAIL_NRML_8814B) << BIT_SHIFT_MBIST_FAIL_NRML_8814B)
-#define BIT_GET_MBIST_FAIL_NRML_8814B(x) (((x) >> BIT_SHIFT_MBIST_FAIL_NRML_8814B) & BIT_MASK_MBIST_FAIL_NRML_8814B)

+#define BIT_GET_MBIST_FAIL_NRML_8814B(x) (((x) >> BIT_SHIFT_MBIST_FAIL_NRML_8814B) & BIT_MASK_MBIST_FAIL_NRML_8814B)
+
 
 
 /* 2 REG_AES_DECRPT_DATA_8814B */
@@ -2446,7 +2664,8 @@
 #define BIT_SHIFT_IPS_CFG_ADDR_8814B 0
 #define BIT_MASK_IPS_CFG_ADDR_8814B 0xff
 #define BIT_IPS_CFG_ADDR_8814B(x) (((x) & BIT_MASK_IPS_CFG_ADDR_8814B) << BIT_SHIFT_IPS_CFG_ADDR_8814B)
-#define BIT_GET_IPS_CFG_ADDR_8814B(x) (((x) >> BIT_SHIFT_IPS_CFG_ADDR_8814B) & BIT_MASK_IPS_CFG_ADDR_8814B)

+#define BIT_GET_IPS_CFG_ADDR_8814B(x) (((x) >> BIT_SHIFT_IPS_CFG_ADDR_8814B) & BIT_MASK_IPS_CFG_ADDR_8814B)
+
 
 
 /* 2 REG_AES_DECRPT_CFG_8814B */
@@ -2454,7 +2673,8 @@
 #define BIT_SHIFT_IPS_CFG_DATA_8814B 0
 #define BIT_MASK_IPS_CFG_DATA_8814B 0xffffffffL
 #define BIT_IPS_CFG_DATA_8814B(x) (((x) & BIT_MASK_IPS_CFG_DATA_8814B) << BIT_SHIFT_IPS_CFG_DATA_8814B)
-#define BIT_GET_IPS_CFG_DATA_8814B(x) (((x) >> BIT_SHIFT_IPS_CFG_DATA_8814B) & BIT_MASK_IPS_CFG_DATA_8814B)

+#define BIT_GET_IPS_CFG_DATA_8814B(x) (((x) >> BIT_SHIFT_IPS_CFG_DATA_8814B) & BIT_MASK_IPS_CFG_DATA_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -2467,19 +2687,22 @@
 #define BIT_SHIFT_TEMP_VALUE_8814B 24
 #define BIT_MASK_TEMP_VALUE_8814B 0x3f
 #define BIT_TEMP_VALUE_8814B(x) (((x) & BIT_MASK_TEMP_VALUE_8814B) << BIT_SHIFT_TEMP_VALUE_8814B)
-#define BIT_GET_TEMP_VALUE_8814B(x) (((x) >> BIT_SHIFT_TEMP_VALUE_8814B) & BIT_MASK_TEMP_VALUE_8814B)

+#define BIT_GET_TEMP_VALUE_8814B(x) (((x) >> BIT_SHIFT_TEMP_VALUE_8814B) & BIT_MASK_TEMP_VALUE_8814B)
+
 
 
 #define BIT_SHIFT_REG_TMETER_TIMER_8814B 8
 #define BIT_MASK_REG_TMETER_TIMER_8814B 0xfff
 #define BIT_REG_TMETER_TIMER_8814B(x) (((x) & BIT_MASK_REG_TMETER_TIMER_8814B) << BIT_SHIFT_REG_TMETER_TIMER_8814B)
-#define BIT_GET_REG_TMETER_TIMER_8814B(x) (((x) >> BIT_SHIFT_REG_TMETER_TIMER_8814B) & BIT_MASK_REG_TMETER_TIMER_8814B)

+#define BIT_GET_REG_TMETER_TIMER_8814B(x) (((x) >> BIT_SHIFT_REG_TMETER_TIMER_8814B) & BIT_MASK_REG_TMETER_TIMER_8814B)
+
 
 
 #define BIT_SHIFT_REG_TEMP_DELTA_8814B 2
 #define BIT_MASK_REG_TEMP_DELTA_8814B 0x3f
 #define BIT_REG_TEMP_DELTA_8814B(x) (((x) & BIT_MASK_REG_TEMP_DELTA_8814B) << BIT_SHIFT_REG_TEMP_DELTA_8814B)
-#define BIT_GET_REG_TEMP_DELTA_8814B(x) (((x) >> BIT_SHIFT_REG_TEMP_DELTA_8814B) & BIT_MASK_REG_TEMP_DELTA_8814B)

+#define BIT_GET_REG_TEMP_DELTA_8814B(x) (((x) >> BIT_SHIFT_REG_TEMP_DELTA_8814B) & BIT_MASK_REG_TEMP_DELTA_8814B)
+
 
 #define BIT_REG_TMETER_EN_8814B BIT(0)
 
@@ -2488,13 +2711,15 @@
 #define BIT_SHIFT_OSC_32K_CLKGEN_0_8814B 16
 #define BIT_MASK_OSC_32K_CLKGEN_0_8814B 0xffff
 #define BIT_OSC_32K_CLKGEN_0_8814B(x) (((x) & BIT_MASK_OSC_32K_CLKGEN_0_8814B) << BIT_SHIFT_OSC_32K_CLKGEN_0_8814B)
-#define BIT_GET_OSC_32K_CLKGEN_0_8814B(x) (((x) >> BIT_SHIFT_OSC_32K_CLKGEN_0_8814B) & BIT_MASK_OSC_32K_CLKGEN_0_8814B)

+#define BIT_GET_OSC_32K_CLKGEN_0_8814B(x) (((x) >> BIT_SHIFT_OSC_32K_CLKGEN_0_8814B) & BIT_MASK_OSC_32K_CLKGEN_0_8814B)
+
 
 
 #define BIT_SHIFT_OSC_32K_RES_COMP_8814B 4
 #define BIT_MASK_OSC_32K_RES_COMP_8814B 0x3
 #define BIT_OSC_32K_RES_COMP_8814B(x) (((x) & BIT_MASK_OSC_32K_RES_COMP_8814B) << BIT_SHIFT_OSC_32K_RES_COMP_8814B)
-#define BIT_GET_OSC_32K_RES_COMP_8814B(x) (((x) >> BIT_SHIFT_OSC_32K_RES_COMP_8814B) & BIT_MASK_OSC_32K_RES_COMP_8814B)

+#define BIT_GET_OSC_32K_RES_COMP_8814B(x) (((x) >> BIT_SHIFT_OSC_32K_RES_COMP_8814B) & BIT_MASK_OSC_32K_RES_COMP_8814B)
+
 
 #define BIT_OSC_32K_OUT_SEL_8814B BIT(3)
 #define BIT_ISO_WL_2_OSC_32K_8814B BIT(1)
@@ -2507,13 +2732,15 @@
 #define BIT_SHIFT_CAL_32K_REG_ADDR_8814B 16
 #define BIT_MASK_CAL_32K_REG_ADDR_8814B 0x3f
 #define BIT_CAL_32K_REG_ADDR_8814B(x) (((x) & BIT_MASK_CAL_32K_REG_ADDR_8814B) << BIT_SHIFT_CAL_32K_REG_ADDR_8814B)
-#define BIT_GET_CAL_32K_REG_ADDR_8814B(x) (((x) >> BIT_SHIFT_CAL_32K_REG_ADDR_8814B) & BIT_MASK_CAL_32K_REG_ADDR_8814B)

+#define BIT_GET_CAL_32K_REG_ADDR_8814B(x) (((x) >> BIT_SHIFT_CAL_32K_REG_ADDR_8814B) & BIT_MASK_CAL_32K_REG_ADDR_8814B)
+
 
 
 #define BIT_SHIFT_CAL_32K_REG_DATA_8814B 0
 #define BIT_MASK_CAL_32K_REG_DATA_8814B 0xffff
 #define BIT_CAL_32K_REG_DATA_8814B(x) (((x) & BIT_MASK_CAL_32K_REG_DATA_8814B) << BIT_SHIFT_CAL_32K_REG_DATA_8814B)
-#define BIT_GET_CAL_32K_REG_DATA_8814B(x) (((x) >> BIT_SHIFT_CAL_32K_REG_DATA_8814B) & BIT_MASK_CAL_32K_REG_DATA_8814B)

+#define BIT_GET_CAL_32K_REG_DATA_8814B(x) (((x) >> BIT_SHIFT_CAL_32K_REG_DATA_8814B) & BIT_MASK_CAL_32K_REG_DATA_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -2523,7 +2750,8 @@
 #define BIT_SHIFT_C2HEVT_MSG_V1_8814B 0
 #define BIT_MASK_C2HEVT_MSG_V1_8814B 0xffffffffL
 #define BIT_C2HEVT_MSG_V1_8814B(x) (((x) & BIT_MASK_C2HEVT_MSG_V1_8814B) << BIT_SHIFT_C2HEVT_MSG_V1_8814B)
-#define BIT_GET_C2HEVT_MSG_V1_8814B(x) (((x) >> BIT_SHIFT_C2HEVT_MSG_V1_8814B) & BIT_MASK_C2HEVT_MSG_V1_8814B)

+#define BIT_GET_C2HEVT_MSG_V1_8814B(x) (((x) >> BIT_SHIFT_C2HEVT_MSG_V1_8814B) & BIT_MASK_C2HEVT_MSG_V1_8814B)
+
 
 
 /* 2 REG_C2HEVT_1_8814B */
@@ -2531,7 +2759,8 @@
 #define BIT_SHIFT_C2HEVT_MSG_1_8814B 0
 #define BIT_MASK_C2HEVT_MSG_1_8814B 0xffffffffL
 #define BIT_C2HEVT_MSG_1_8814B(x) (((x) & BIT_MASK_C2HEVT_MSG_1_8814B) << BIT_SHIFT_C2HEVT_MSG_1_8814B)
-#define BIT_GET_C2HEVT_MSG_1_8814B(x) (((x) >> BIT_SHIFT_C2HEVT_MSG_1_8814B) & BIT_MASK_C2HEVT_MSG_1_8814B)

+#define BIT_GET_C2HEVT_MSG_1_8814B(x) (((x) >> BIT_SHIFT_C2HEVT_MSG_1_8814B) & BIT_MASK_C2HEVT_MSG_1_8814B)
+
 
 
 /* 2 REG_C2HEVT_2_8814B */
@@ -2539,7 +2768,8 @@
 #define BIT_SHIFT_C2HEVT_MSG_2_8814B 0
 #define BIT_MASK_C2HEVT_MSG_2_8814B 0xffffffffL
 #define BIT_C2HEVT_MSG_2_8814B(x) (((x) & BIT_MASK_C2HEVT_MSG_2_8814B) << BIT_SHIFT_C2HEVT_MSG_2_8814B)
-#define BIT_GET_C2HEVT_MSG_2_8814B(x) (((x) >> BIT_SHIFT_C2HEVT_MSG_2_8814B) & BIT_MASK_C2HEVT_MSG_2_8814B)

+#define BIT_GET_C2HEVT_MSG_2_8814B(x) (((x) >> BIT_SHIFT_C2HEVT_MSG_2_8814B) & BIT_MASK_C2HEVT_MSG_2_8814B)
+
 
 
 /* 2 REG_C2HEVT_3_8814B */
@@ -2547,7 +2777,8 @@
 #define BIT_SHIFT_C2HEVT_MSG_3_8814B 0
 #define BIT_MASK_C2HEVT_MSG_3_8814B 0xffffffffL
 #define BIT_C2HEVT_MSG_3_8814B(x) (((x) & BIT_MASK_C2HEVT_MSG_3_8814B) << BIT_SHIFT_C2HEVT_MSG_3_8814B)
-#define BIT_GET_C2HEVT_MSG_3_8814B(x) (((x) >> BIT_SHIFT_C2HEVT_MSG_3_8814B) & BIT_MASK_C2HEVT_MSG_3_8814B)

+#define BIT_GET_C2HEVT_MSG_3_8814B(x) (((x) >> BIT_SHIFT_C2HEVT_MSG_3_8814B) & BIT_MASK_C2HEVT_MSG_3_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -2559,7 +2790,8 @@
 #define BIT_SHIFT_SW_DEFINED_PAGE1_V1_8814B 0
 #define BIT_MASK_SW_DEFINED_PAGE1_V1_8814B 0xffffffffL
 #define BIT_SW_DEFINED_PAGE1_V1_8814B(x) (((x) & BIT_MASK_SW_DEFINED_PAGE1_V1_8814B) << BIT_SHIFT_SW_DEFINED_PAGE1_V1_8814B)
-#define BIT_GET_SW_DEFINED_PAGE1_V1_8814B(x) (((x) >> BIT_SHIFT_SW_DEFINED_PAGE1_V1_8814B) & BIT_MASK_SW_DEFINED_PAGE1_V1_8814B)

+#define BIT_GET_SW_DEFINED_PAGE1_V1_8814B(x) (((x) >> BIT_SHIFT_SW_DEFINED_PAGE1_V1_8814B) & BIT_MASK_SW_DEFINED_PAGE1_V1_8814B)
+
 
 
 /* 2 REG_SW_DEFINED_PAGE2_8814B */
@@ -2567,7 +2799,8 @@
 #define BIT_SHIFT_SW_DEFINED_PAGE2_8814B 0
 #define BIT_MASK_SW_DEFINED_PAGE2_8814B 0xffffffffL
 #define BIT_SW_DEFINED_PAGE2_8814B(x) (((x) & BIT_MASK_SW_DEFINED_PAGE2_8814B) << BIT_SHIFT_SW_DEFINED_PAGE2_8814B)
-#define BIT_GET_SW_DEFINED_PAGE2_8814B(x) (((x) >> BIT_SHIFT_SW_DEFINED_PAGE2_8814B) & BIT_MASK_SW_DEFINED_PAGE2_8814B)

+#define BIT_GET_SW_DEFINED_PAGE2_8814B(x) (((x) >> BIT_SHIFT_SW_DEFINED_PAGE2_8814B) & BIT_MASK_SW_DEFINED_PAGE2_8814B)
+
 
 
 /* 2 REG_MCUTST_I_8814B */
@@ -2575,7 +2808,8 @@
 #define BIT_SHIFT_MCUDMSG_I_8814B 0
 #define BIT_MASK_MCUDMSG_I_8814B 0xffffffffL
 #define BIT_MCUDMSG_I_8814B(x) (((x) & BIT_MASK_MCUDMSG_I_8814B) << BIT_SHIFT_MCUDMSG_I_8814B)
-#define BIT_GET_MCUDMSG_I_8814B(x) (((x) >> BIT_SHIFT_MCUDMSG_I_8814B) & BIT_MASK_MCUDMSG_I_8814B)

+#define BIT_GET_MCUDMSG_I_8814B(x) (((x) >> BIT_SHIFT_MCUDMSG_I_8814B) & BIT_MASK_MCUDMSG_I_8814B)
+
 
 
 /* 2 REG_MCUTST_II_8814B */
@@ -2583,7 +2817,8 @@
 #define BIT_SHIFT_MCUDMSG_II_8814B 0
 #define BIT_MASK_MCUDMSG_II_8814B 0xffffffffL
 #define BIT_MCUDMSG_II_8814B(x) (((x) & BIT_MASK_MCUDMSG_II_8814B) << BIT_SHIFT_MCUDMSG_II_8814B)
-#define BIT_GET_MCUDMSG_II_8814B(x) (((x) >> BIT_SHIFT_MCUDMSG_II_8814B) & BIT_MASK_MCUDMSG_II_8814B)

+#define BIT_GET_MCUDMSG_II_8814B(x) (((x) >> BIT_SHIFT_MCUDMSG_II_8814B) & BIT_MASK_MCUDMSG_II_8814B)
+
 
 
 /* 2 REG_FMETHR_8814B */
@@ -2592,7 +2827,8 @@
 #define BIT_SHIFT_FW_MSG_8814B 0
 #define BIT_MASK_FW_MSG_8814B 0xffffffffL
 #define BIT_FW_MSG_8814B(x) (((x) & BIT_MASK_FW_MSG_8814B) << BIT_SHIFT_FW_MSG_8814B)
-#define BIT_GET_FW_MSG_8814B(x) (((x) >> BIT_SHIFT_FW_MSG_8814B) & BIT_MASK_FW_MSG_8814B)

+#define BIT_GET_FW_MSG_8814B(x) (((x) >> BIT_SHIFT_FW_MSG_8814B) & BIT_MASK_FW_MSG_8814B)
+
 
 
 /* 2 REG_HMETFR_8814B */
@@ -2600,7 +2836,8 @@
 #define BIT_SHIFT_HRCV_MSG_8814B 24
 #define BIT_MASK_HRCV_MSG_8814B 0xff
 #define BIT_HRCV_MSG_8814B(x) (((x) & BIT_MASK_HRCV_MSG_8814B) << BIT_SHIFT_HRCV_MSG_8814B)
-#define BIT_GET_HRCV_MSG_8814B(x) (((x) >> BIT_SHIFT_HRCV_MSG_8814B) & BIT_MASK_HRCV_MSG_8814B)

+#define BIT_GET_HRCV_MSG_8814B(x) (((x) >> BIT_SHIFT_HRCV_MSG_8814B) & BIT_MASK_HRCV_MSG_8814B)
+
 
 #define BIT_INT_BOX3_8814B BIT(3)
 #define BIT_INT_BOX2_8814B BIT(2)
@@ -2612,7 +2849,8 @@
 #define BIT_SHIFT_HOST_MSG_0_8814B 0
 #define BIT_MASK_HOST_MSG_0_8814B 0xffffffffL
 #define BIT_HOST_MSG_0_8814B(x) (((x) & BIT_MASK_HOST_MSG_0_8814B) << BIT_SHIFT_HOST_MSG_0_8814B)
-#define BIT_GET_HOST_MSG_0_8814B(x) (((x) >> BIT_SHIFT_HOST_MSG_0_8814B) & BIT_MASK_HOST_MSG_0_8814B)

+#define BIT_GET_HOST_MSG_0_8814B(x) (((x) >> BIT_SHIFT_HOST_MSG_0_8814B) & BIT_MASK_HOST_MSG_0_8814B)
+
 
 
 /* 2 REG_HMEBOX1_8814B */
@@ -2620,7 +2858,8 @@
 #define BIT_SHIFT_HOST_MSG_1_8814B 0
 #define BIT_MASK_HOST_MSG_1_8814B 0xffffffffL
 #define BIT_HOST_MSG_1_8814B(x) (((x) & BIT_MASK_HOST_MSG_1_8814B) << BIT_SHIFT_HOST_MSG_1_8814B)
-#define BIT_GET_HOST_MSG_1_8814B(x) (((x) >> BIT_SHIFT_HOST_MSG_1_8814B) & BIT_MASK_HOST_MSG_1_8814B)

+#define BIT_GET_HOST_MSG_1_8814B(x) (((x) >> BIT_SHIFT_HOST_MSG_1_8814B) & BIT_MASK_HOST_MSG_1_8814B)
+
 
 
 /* 2 REG_HMEBOX2_8814B */
@@ -2628,7 +2867,8 @@
 #define BIT_SHIFT_HOST_MSG_2_8814B 0
 #define BIT_MASK_HOST_MSG_2_8814B 0xffffffffL
 #define BIT_HOST_MSG_2_8814B(x) (((x) & BIT_MASK_HOST_MSG_2_8814B) << BIT_SHIFT_HOST_MSG_2_8814B)
-#define BIT_GET_HOST_MSG_2_8814B(x) (((x) >> BIT_SHIFT_HOST_MSG_2_8814B) & BIT_MASK_HOST_MSG_2_8814B)

+#define BIT_GET_HOST_MSG_2_8814B(x) (((x) >> BIT_SHIFT_HOST_MSG_2_8814B) & BIT_MASK_HOST_MSG_2_8814B)
+
 
 
 /* 2 REG_HMEBOX3_8814B */
@@ -2636,7 +2876,8 @@
 #define BIT_SHIFT_HOST_MSG_3_8814B 0
 #define BIT_MASK_HOST_MSG_3_8814B 0xffffffffL
 #define BIT_HOST_MSG_3_8814B(x) (((x) & BIT_MASK_HOST_MSG_3_8814B) << BIT_SHIFT_HOST_MSG_3_8814B)
-#define BIT_GET_HOST_MSG_3_8814B(x) (((x) >> BIT_SHIFT_HOST_MSG_3_8814B) & BIT_MASK_HOST_MSG_3_8814B)

+#define BIT_GET_HOST_MSG_3_8814B(x) (((x) >> BIT_SHIFT_HOST_MSG_3_8814B) & BIT_MASK_HOST_MSG_3_8814B)
+
 
 
 /* 2 REG_LLT_INIT_8814B */
@@ -2644,19 +2885,22 @@
 #define BIT_SHIFT_LLTE_RWM_8814B 30
 #define BIT_MASK_LLTE_RWM_8814B 0x3
 #define BIT_LLTE_RWM_8814B(x) (((x) & BIT_MASK_LLTE_RWM_8814B) << BIT_SHIFT_LLTE_RWM_8814B)
-#define BIT_GET_LLTE_RWM_8814B(x) (((x) >> BIT_SHIFT_LLTE_RWM_8814B) & BIT_MASK_LLTE_RWM_8814B)

+#define BIT_GET_LLTE_RWM_8814B(x) (((x) >> BIT_SHIFT_LLTE_RWM_8814B) & BIT_MASK_LLTE_RWM_8814B)
+
 
 
 #define BIT_SHIFT_LLTINI_PDATA_V1_8814B 16
 #define BIT_MASK_LLTINI_PDATA_V1_8814B 0xfff
 #define BIT_LLTINI_PDATA_V1_8814B(x) (((x) & BIT_MASK_LLTINI_PDATA_V1_8814B) << BIT_SHIFT_LLTINI_PDATA_V1_8814B)
-#define BIT_GET_LLTINI_PDATA_V1_8814B(x) (((x) >> BIT_SHIFT_LLTINI_PDATA_V1_8814B) & BIT_MASK_LLTINI_PDATA_V1_8814B)

+#define BIT_GET_LLTINI_PDATA_V1_8814B(x) (((x) >> BIT_SHIFT_LLTINI_PDATA_V1_8814B) & BIT_MASK_LLTINI_PDATA_V1_8814B)
+
 
 
 #define BIT_SHIFT_LLTINI_HDATA_V1_8814B 0
 #define BIT_MASK_LLTINI_HDATA_V1_8814B 0xfff
 #define BIT_LLTINI_HDATA_V1_8814B(x) (((x) & BIT_MASK_LLTINI_HDATA_V1_8814B) << BIT_SHIFT_LLTINI_HDATA_V1_8814B)
-#define BIT_GET_LLTINI_HDATA_V1_8814B(x) (((x) >> BIT_SHIFT_LLTINI_HDATA_V1_8814B) & BIT_MASK_LLTINI_HDATA_V1_8814B)

+#define BIT_GET_LLTINI_HDATA_V1_8814B(x) (((x) >> BIT_SHIFT_LLTINI_HDATA_V1_8814B) & BIT_MASK_LLTINI_HDATA_V1_8814B)
+
 
 
 /* 2 REG_LLT_INIT_ADDR_8814B */
@@ -2664,7 +2908,8 @@
 #define BIT_SHIFT_LLTINI_ADDR_V1_8814B 0
 #define BIT_MASK_LLTINI_ADDR_V1_8814B 0xfff
 #define BIT_LLTINI_ADDR_V1_8814B(x) (((x) & BIT_MASK_LLTINI_ADDR_V1_8814B) << BIT_SHIFT_LLTINI_ADDR_V1_8814B)
-#define BIT_GET_LLTINI_ADDR_V1_8814B(x) (((x) >> BIT_SHIFT_LLTINI_ADDR_V1_8814B) & BIT_MASK_LLTINI_ADDR_V1_8814B)

+#define BIT_GET_LLTINI_ADDR_V1_8814B(x) (((x) >> BIT_SHIFT_LLTINI_ADDR_V1_8814B) & BIT_MASK_LLTINI_ADDR_V1_8814B)
+
 
 
 /* 2 REG_BB_ACCESS_CTRL_8814B */
@@ -2672,19 +2917,22 @@
 #define BIT_SHIFT_BB_WRITE_READ_8814B 30
 #define BIT_MASK_BB_WRITE_READ_8814B 0x3
 #define BIT_BB_WRITE_READ_8814B(x) (((x) & BIT_MASK_BB_WRITE_READ_8814B) << BIT_SHIFT_BB_WRITE_READ_8814B)
-#define BIT_GET_BB_WRITE_READ_8814B(x) (((x) >> BIT_SHIFT_BB_WRITE_READ_8814B) & BIT_MASK_BB_WRITE_READ_8814B)

+#define BIT_GET_BB_WRITE_READ_8814B(x) (((x) >> BIT_SHIFT_BB_WRITE_READ_8814B) & BIT_MASK_BB_WRITE_READ_8814B)
+
 
 
 #define BIT_SHIFT_BB_WRITE_EN_8814B 12
 #define BIT_MASK_BB_WRITE_EN_8814B 0xf
 #define BIT_BB_WRITE_EN_8814B(x) (((x) & BIT_MASK_BB_WRITE_EN_8814B) << BIT_SHIFT_BB_WRITE_EN_8814B)
-#define BIT_GET_BB_WRITE_EN_8814B(x) (((x) >> BIT_SHIFT_BB_WRITE_EN_8814B) & BIT_MASK_BB_WRITE_EN_8814B)

+#define BIT_GET_BB_WRITE_EN_8814B(x) (((x) >> BIT_SHIFT_BB_WRITE_EN_8814B) & BIT_MASK_BB_WRITE_EN_8814B)
+
 
 
 #define BIT_SHIFT_BB_ADDR_8814B 2
 #define BIT_MASK_BB_ADDR_8814B 0x1ff
 #define BIT_BB_ADDR_8814B(x) (((x) & BIT_MASK_BB_ADDR_8814B) << BIT_SHIFT_BB_ADDR_8814B)
-#define BIT_GET_BB_ADDR_8814B(x) (((x) >> BIT_SHIFT_BB_ADDR_8814B) & BIT_MASK_BB_ADDR_8814B)

+#define BIT_GET_BB_ADDR_8814B(x) (((x) >> BIT_SHIFT_BB_ADDR_8814B) & BIT_MASK_BB_ADDR_8814B)
+
 
 #define BIT_BB_ERRACC_8814B BIT(0)
 
@@ -2693,7 +2941,8 @@
 #define BIT_SHIFT_BB_DATA_8814B 0
 #define BIT_MASK_BB_DATA_8814B 0xffffffffL
 #define BIT_BB_DATA_8814B(x) (((x) & BIT_MASK_BB_DATA_8814B) << BIT_SHIFT_BB_DATA_8814B)
-#define BIT_GET_BB_DATA_8814B(x) (((x) >> BIT_SHIFT_BB_DATA_8814B) & BIT_MASK_BB_DATA_8814B)

+#define BIT_GET_BB_DATA_8814B(x) (((x) >> BIT_SHIFT_BB_DATA_8814B) & BIT_MASK_BB_DATA_8814B)
+
 
 
 /* 2 REG_HMEBOX_E0_8814B */
@@ -2701,7 +2950,8 @@
 #define BIT_SHIFT_HMEBOX_E0_8814B 0
 #define BIT_MASK_HMEBOX_E0_8814B 0xffffffffL
 #define BIT_HMEBOX_E0_8814B(x) (((x) & BIT_MASK_HMEBOX_E0_8814B) << BIT_SHIFT_HMEBOX_E0_8814B)
-#define BIT_GET_HMEBOX_E0_8814B(x) (((x) >> BIT_SHIFT_HMEBOX_E0_8814B) & BIT_MASK_HMEBOX_E0_8814B)

+#define BIT_GET_HMEBOX_E0_8814B(x) (((x) >> BIT_SHIFT_HMEBOX_E0_8814B) & BIT_MASK_HMEBOX_E0_8814B)
+
 
 
 /* 2 REG_HMEBOX_E1_8814B */
@@ -2709,7 +2959,8 @@
 #define BIT_SHIFT_HMEBOX_E1_8814B 0
 #define BIT_MASK_HMEBOX_E1_8814B 0xffffffffL
 #define BIT_HMEBOX_E1_8814B(x) (((x) & BIT_MASK_HMEBOX_E1_8814B) << BIT_SHIFT_HMEBOX_E1_8814B)
-#define BIT_GET_HMEBOX_E1_8814B(x) (((x) >> BIT_SHIFT_HMEBOX_E1_8814B) & BIT_MASK_HMEBOX_E1_8814B)

+#define BIT_GET_HMEBOX_E1_8814B(x) (((x) >> BIT_SHIFT_HMEBOX_E1_8814B) & BIT_MASK_HMEBOX_E1_8814B)
+
 
 
 /* 2 REG_HMEBOX_E2_8814B */
@@ -2717,7 +2968,8 @@
 #define BIT_SHIFT_HMEBOX_E2_8814B 0
 #define BIT_MASK_HMEBOX_E2_8814B 0xffffffffL
 #define BIT_HMEBOX_E2_8814B(x) (((x) & BIT_MASK_HMEBOX_E2_8814B) << BIT_SHIFT_HMEBOX_E2_8814B)
-#define BIT_GET_HMEBOX_E2_8814B(x) (((x) >> BIT_SHIFT_HMEBOX_E2_8814B) & BIT_MASK_HMEBOX_E2_8814B)

+#define BIT_GET_HMEBOX_E2_8814B(x) (((x) >> BIT_SHIFT_HMEBOX_E2_8814B) & BIT_MASK_HMEBOX_E2_8814B)
+
 
 
 /* 2 REG_HMEBOX_E3_8814B */
@@ -2725,7 +2977,8 @@
 #define BIT_SHIFT_HMEBOX_E3_8814B 0
 #define BIT_MASK_HMEBOX_E3_8814B 0xffffffffL
 #define BIT_HMEBOX_E3_8814B(x) (((x) & BIT_MASK_HMEBOX_E3_8814B) << BIT_SHIFT_HMEBOX_E3_8814B)
-#define BIT_GET_HMEBOX_E3_8814B(x) (((x) >> BIT_SHIFT_HMEBOX_E3_8814B) & BIT_MASK_HMEBOX_E3_8814B)

+#define BIT_GET_HMEBOX_E3_8814B(x) (((x) >> BIT_SHIFT_HMEBOX_E3_8814B) & BIT_MASK_HMEBOX_E3_8814B)
+
 
 
 /* 2 REG_CR_EXT_8814B */
@@ -2733,7 +2986,8 @@
 #define BIT_SHIFT_PHY_REQ_DELAY_8814B 24
 #define BIT_MASK_PHY_REQ_DELAY_8814B 0xf
 #define BIT_PHY_REQ_DELAY_8814B(x) (((x) & BIT_MASK_PHY_REQ_DELAY_8814B) << BIT_SHIFT_PHY_REQ_DELAY_8814B)
-#define BIT_GET_PHY_REQ_DELAY_8814B(x) (((x) >> BIT_SHIFT_PHY_REQ_DELAY_8814B) & BIT_MASK_PHY_REQ_DELAY_8814B)

+#define BIT_GET_PHY_REQ_DELAY_8814B(x) (((x) >> BIT_SHIFT_PHY_REQ_DELAY_8814B) & BIT_MASK_PHY_REQ_DELAY_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -2744,19 +2998,22 @@
 #define BIT_SHIFT_NETYPE4_8814B 4
 #define BIT_MASK_NETYPE4_8814B 0x3
 #define BIT_NETYPE4_8814B(x) (((x) & BIT_MASK_NETYPE4_8814B) << BIT_SHIFT_NETYPE4_8814B)
-#define BIT_GET_NETYPE4_8814B(x) (((x) >> BIT_SHIFT_NETYPE4_8814B) & BIT_MASK_NETYPE4_8814B)

+#define BIT_GET_NETYPE4_8814B(x) (((x) >> BIT_SHIFT_NETYPE4_8814B) & BIT_MASK_NETYPE4_8814B)
+
 
 
 #define BIT_SHIFT_NETYPE3_8814B 2
 #define BIT_MASK_NETYPE3_8814B 0x3
 #define BIT_NETYPE3_8814B(x) (((x) & BIT_MASK_NETYPE3_8814B) << BIT_SHIFT_NETYPE3_8814B)
-#define BIT_GET_NETYPE3_8814B(x) (((x) >> BIT_SHIFT_NETYPE3_8814B) & BIT_MASK_NETYPE3_8814B)

+#define BIT_GET_NETYPE3_8814B(x) (((x) >> BIT_SHIFT_NETYPE3_8814B) & BIT_MASK_NETYPE3_8814B)
+
 
 
 #define BIT_SHIFT_NETYPE2_8814B 0
 #define BIT_MASK_NETYPE2_8814B 0x3
 #define BIT_NETYPE2_8814B(x) (((x) & BIT_MASK_NETYPE2_8814B) << BIT_SHIFT_NETYPE2_8814B)
-#define BIT_GET_NETYPE2_8814B(x) (((x) >> BIT_SHIFT_NETYPE2_8814B) & BIT_MASK_NETYPE2_8814B)

+#define BIT_GET_NETYPE2_8814B(x) (((x) >> BIT_SHIFT_NETYPE2_8814B) & BIT_MASK_NETYPE2_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -2772,19 +3029,22 @@
 #define BIT_SHIFT_PKTNUM_TH_V1_8814B 24
 #define BIT_MASK_PKTNUM_TH_V1_8814B 0xff
 #define BIT_PKTNUM_TH_V1_8814B(x) (((x) & BIT_MASK_PKTNUM_TH_V1_8814B) << BIT_SHIFT_PKTNUM_TH_V1_8814B)
-#define BIT_GET_PKTNUM_TH_V1_8814B(x) (((x) >> BIT_SHIFT_PKTNUM_TH_V1_8814B) & BIT_MASK_PKTNUM_TH_V1_8814B)

+#define BIT_GET_PKTNUM_TH_V1_8814B(x) (((x) >> BIT_SHIFT_PKTNUM_TH_V1_8814B) & BIT_MASK_PKTNUM_TH_V1_8814B)
+
 
 
 #define BIT_SHIFT_TIMER_TH_8814B 16
 #define BIT_MASK_TIMER_TH_8814B 0xff
 #define BIT_TIMER_TH_8814B(x) (((x) & BIT_MASK_TIMER_TH_8814B) << BIT_SHIFT_TIMER_TH_8814B)
-#define BIT_GET_TIMER_TH_8814B(x) (((x) >> BIT_SHIFT_TIMER_TH_8814B) & BIT_MASK_TIMER_TH_8814B)

+#define BIT_GET_TIMER_TH_8814B(x) (((x) >> BIT_SHIFT_TIMER_TH_8814B) & BIT_MASK_TIMER_TH_8814B)
+
 
 
 #define BIT_SHIFT_RXPKT1ENADDR_8814B 0
 #define BIT_MASK_RXPKT1ENADDR_8814B 0xffff
 #define BIT_RXPKT1ENADDR_8814B(x) (((x) & BIT_MASK_RXPKT1ENADDR_8814B) << BIT_SHIFT_RXPKT1ENADDR_8814B)
-#define BIT_GET_RXPKT1ENADDR_8814B(x) (((x) >> BIT_SHIFT_RXPKT1ENADDR_8814B) & BIT_MASK_RXPKT1ENADDR_8814B)

+#define BIT_GET_RXPKT1ENADDR_8814B(x) (((x) >> BIT_SHIFT_RXPKT1ENADDR_8814B) & BIT_MASK_RXPKT1ENADDR_8814B)
+
 
 
 /* 2 REG_RXFF_PTR_V1_8814B */
@@ -2794,7 +3054,8 @@
 #define BIT_SHIFT_RXFF0_RDPTR_V2_8814B 0
 #define BIT_MASK_RXFF0_RDPTR_V2_8814B 0x3ffff
 #define BIT_RXFF0_RDPTR_V2_8814B(x) (((x) & BIT_MASK_RXFF0_RDPTR_V2_8814B) << BIT_SHIFT_RXFF0_RDPTR_V2_8814B)
-#define BIT_GET_RXFF0_RDPTR_V2_8814B(x) (((x) >> BIT_SHIFT_RXFF0_RDPTR_V2_8814B) & BIT_MASK_RXFF0_RDPTR_V2_8814B)

+#define BIT_GET_RXFF0_RDPTR_V2_8814B(x) (((x) >> BIT_SHIFT_RXFF0_RDPTR_V2_8814B) & BIT_MASK_RXFF0_RDPTR_V2_8814B)
+
 
 
 /* 2 REG_RXFF_WTR_V1_8814B */
@@ -2804,7 +3065,8 @@
 #define BIT_SHIFT_RXFF0_WTPTR_V2_8814B 0
 #define BIT_MASK_RXFF0_WTPTR_V2_8814B 0x3ffff
 #define BIT_RXFF0_WTPTR_V2_8814B(x) (((x) & BIT_MASK_RXFF0_WTPTR_V2_8814B) << BIT_SHIFT_RXFF0_WTPTR_V2_8814B)
-#define BIT_GET_RXFF0_WTPTR_V2_8814B(x) (((x) >> BIT_SHIFT_RXFF0_WTPTR_V2_8814B) & BIT_MASK_RXFF0_WTPTR_V2_8814B)

+#define BIT_GET_RXFF0_WTPTR_V2_8814B(x) (((x) >> BIT_SHIFT_RXFF0_WTPTR_V2_8814B) & BIT_MASK_RXFF0_WTPTR_V2_8814B)
+
 
 
 /* 2 REG_FE2IMR_8814B */
@@ -3040,7 +3302,8 @@
 #define BIT_SHIFT_MID_31TO0_8814B 0
 #define BIT_MASK_MID_31TO0_8814B 0xffffffffL
 #define BIT_MID_31TO0_8814B(x) (((x) & BIT_MASK_MID_31TO0_8814B) << BIT_SHIFT_MID_31TO0_8814B)
-#define BIT_GET_MID_31TO0_8814B(x) (((x) >> BIT_SHIFT_MID_31TO0_8814B) & BIT_MASK_MID_31TO0_8814B)

+#define BIT_GET_MID_31TO0_8814B(x) (((x) >> BIT_SHIFT_MID_31TO0_8814B) & BIT_MASK_MID_31TO0_8814B)
+
 
 
 /* 2 REG_SPWR1_8814B */
@@ -3048,7 +3311,8 @@
 #define BIT_SHIFT_MID_63TO32_8814B 0
 #define BIT_MASK_MID_63TO32_8814B 0xffffffffL
 #define BIT_MID_63TO32_8814B(x) (((x) & BIT_MASK_MID_63TO32_8814B) << BIT_SHIFT_MID_63TO32_8814B)
-#define BIT_GET_MID_63TO32_8814B(x) (((x) >> BIT_SHIFT_MID_63TO32_8814B) & BIT_MASK_MID_63TO32_8814B)

+#define BIT_GET_MID_63TO32_8814B(x) (((x) >> BIT_SHIFT_MID_63TO32_8814B) & BIT_MASK_MID_63TO32_8814B)
+
 
 
 /* 2 REG_SPWR2_8814B */
@@ -3056,7 +3320,8 @@
 #define BIT_SHIFT_MID_95O64_8814B 0
 #define BIT_MASK_MID_95O64_8814B 0xffffffffL
 #define BIT_MID_95O64_8814B(x) (((x) & BIT_MASK_MID_95O64_8814B) << BIT_SHIFT_MID_95O64_8814B)
-#define BIT_GET_MID_95O64_8814B(x) (((x) >> BIT_SHIFT_MID_95O64_8814B) & BIT_MASK_MID_95O64_8814B)

+#define BIT_GET_MID_95O64_8814B(x) (((x) >> BIT_SHIFT_MID_95O64_8814B) & BIT_MASK_MID_95O64_8814B)
+
 
 
 /* 2 REG_SPWR3_8814B */
@@ -3064,7 +3329,8 @@
 #define BIT_SHIFT_MID_127TO96_8814B 0
 #define BIT_MASK_MID_127TO96_8814B 0xffffffffL
 #define BIT_MID_127TO96_8814B(x) (((x) & BIT_MASK_MID_127TO96_8814B) << BIT_SHIFT_MID_127TO96_8814B)
-#define BIT_GET_MID_127TO96_8814B(x) (((x) >> BIT_SHIFT_MID_127TO96_8814B) & BIT_MASK_MID_127TO96_8814B)

+#define BIT_GET_MID_127TO96_8814B(x) (((x) >> BIT_SHIFT_MID_127TO96_8814B) & BIT_MASK_MID_127TO96_8814B)
+
 
 
 /* 2 REG_POWSEQ_8814B */
@@ -3072,13 +3338,15 @@
 #define BIT_SHIFT_SEQNUM_MID_8814B 16
 #define BIT_MASK_SEQNUM_MID_8814B 0xffff
 #define BIT_SEQNUM_MID_8814B(x) (((x) & BIT_MASK_SEQNUM_MID_8814B) << BIT_SHIFT_SEQNUM_MID_8814B)
-#define BIT_GET_SEQNUM_MID_8814B(x) (((x) >> BIT_SHIFT_SEQNUM_MID_8814B) & BIT_MASK_SEQNUM_MID_8814B)

+#define BIT_GET_SEQNUM_MID_8814B(x) (((x) >> BIT_SHIFT_SEQNUM_MID_8814B) & BIT_MASK_SEQNUM_MID_8814B)
+
 
 
 #define BIT_SHIFT_REF_MID_8814B 0
 #define BIT_MASK_REF_MID_8814B 0x7f
 #define BIT_REF_MID_8814B(x) (((x) & BIT_MASK_REF_MID_8814B) << BIT_SHIFT_REF_MID_8814B)
-#define BIT_GET_REF_MID_8814B(x) (((x) >> BIT_SHIFT_REF_MID_8814B) & BIT_MASK_REF_MID_8814B)

+#define BIT_GET_REF_MID_8814B(x) (((x) >> BIT_SHIFT_REF_MID_8814B) & BIT_MASK_REF_MID_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -3091,7 +3359,8 @@
 #define BIT_SHIFT_TC7DATA_8814B 0
 #define BIT_MASK_TC7DATA_8814B 0xffffff
 #define BIT_TC7DATA_8814B(x) (((x) & BIT_MASK_TC7DATA_8814B) << BIT_SHIFT_TC7DATA_8814B)
-#define BIT_GET_TC7DATA_8814B(x) (((x) >> BIT_SHIFT_TC7DATA_8814B) & BIT_MASK_TC7DATA_8814B)

+#define BIT_GET_TC7DATA_8814B(x) (((x) >> BIT_SHIFT_TC7DATA_8814B) & BIT_MASK_TC7DATA_8814B)
+
 
 
 /* 2 REG_TC8_CTRL_V1_8814B */
@@ -3102,7 +3371,8 @@
 #define BIT_SHIFT_TC8DATA_8814B 0
 #define BIT_MASK_TC8DATA_8814B 0xffffff
 #define BIT_TC8DATA_8814B(x) (((x) & BIT_MASK_TC8DATA_8814B) << BIT_SHIFT_TC8DATA_8814B)
-#define BIT_GET_TC8DATA_8814B(x) (((x) >> BIT_SHIFT_TC8DATA_8814B) & BIT_MASK_TC8DATA_8814B)

+#define BIT_GET_TC8DATA_8814B(x) (((x) >> BIT_SHIFT_TC8DATA_8814B) & BIT_MASK_TC8DATA_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -3234,7 +3504,8 @@
 #define BIT_SHIFT_FW_MSG2_8814B 0
 #define BIT_MASK_FW_MSG2_8814B 0xffffffffL
 #define BIT_FW_MSG2_8814B(x) (((x) & BIT_MASK_FW_MSG2_8814B) << BIT_SHIFT_FW_MSG2_8814B)
-#define BIT_GET_FW_MSG2_8814B(x) (((x) >> BIT_SHIFT_FW_MSG2_8814B) & BIT_MASK_FW_MSG2_8814B)

+#define BIT_GET_FW_MSG2_8814B(x) (((x) >> BIT_SHIFT_FW_MSG2_8814B) & BIT_MASK_FW_MSG2_8814B)
+
 
 
 /* 2 REG_MSG3_8814B */
@@ -3242,7 +3513,8 @@
 #define BIT_SHIFT_FW_MSG3_8814B 0
 #define BIT_MASK_FW_MSG3_8814B 0xffffffffL
 #define BIT_FW_MSG3_8814B(x) (((x) & BIT_MASK_FW_MSG3_8814B) << BIT_SHIFT_FW_MSG3_8814B)
-#define BIT_GET_FW_MSG3_8814B(x) (((x) >> BIT_SHIFT_FW_MSG3_8814B) & BIT_MASK_FW_MSG3_8814B)

+#define BIT_GET_FW_MSG3_8814B(x) (((x) >> BIT_SHIFT_FW_MSG3_8814B) & BIT_MASK_FW_MSG3_8814B)
+
 
 
 /* 2 REG_MSG4_8814B */
@@ -3250,7 +3522,8 @@
 #define BIT_SHIFT_FW_MSG4_8814B 0
 #define BIT_MASK_FW_MSG4_8814B 0xffffffffL
 #define BIT_FW_MSG4_8814B(x) (((x) & BIT_MASK_FW_MSG4_8814B) << BIT_SHIFT_FW_MSG4_8814B)
-#define BIT_GET_FW_MSG4_8814B(x) (((x) >> BIT_SHIFT_FW_MSG4_8814B) & BIT_MASK_FW_MSG4_8814B)

+#define BIT_GET_FW_MSG4_8814B(x) (((x) >> BIT_SHIFT_FW_MSG4_8814B) & BIT_MASK_FW_MSG4_8814B)
+
 
 
 /* 2 REG_MSG5_8814B */
@@ -3258,7 +3531,8 @@
 #define BIT_SHIFT_FW_MSG5_8814B 0
 #define BIT_MASK_FW_MSG5_8814B 0xffffffffL
 #define BIT_FW_MSG5_8814B(x) (((x) & BIT_MASK_FW_MSG5_8814B) << BIT_SHIFT_FW_MSG5_8814B)
-#define BIT_GET_FW_MSG5_8814B(x) (((x) >> BIT_SHIFT_FW_MSG5_8814B) & BIT_MASK_FW_MSG5_8814B)

+#define BIT_GET_FW_MSG5_8814B(x) (((x) >> BIT_SHIFT_FW_MSG5_8814B) & BIT_MASK_FW_MSG5_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -3270,7 +3544,8 @@
 #define BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8814B 16
 #define BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8814B 0xff
 #define BIT_TX_OQT_HE_FREE_SPACE_V1_8814B(x) (((x) & BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8814B) << BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8814B)
-#define BIT_GET_TX_OQT_HE_FREE_SPACE_V1_8814B(x) (((x) >> BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8814B) & BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8814B)

+#define BIT_GET_TX_OQT_HE_FREE_SPACE_V1_8814B(x) (((x) >> BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8814B) & BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -3278,7 +3553,8 @@
 #define BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8814B 0
 #define BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8814B 0xff
 #define BIT_TX_OQT_NL_FREE_SPACE_V1_8814B(x) (((x) & BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8814B) << BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8814B)
-#define BIT_GET_TX_OQT_NL_FREE_SPACE_V1_8814B(x) (((x) >> BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8814B) & BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8814B)

+#define BIT_GET_TX_OQT_NL_FREE_SPACE_V1_8814B(x) (((x) >> BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8814B) & BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8814B)
+
 
 
 /* 2 REG_FIFOPAGE_CTRL_2_8814B */
@@ -3289,7 +3565,8 @@
 #define BIT_SHIFT_BCN_HEAD_1_V1_8814B 16
 #define BIT_MASK_BCN_HEAD_1_V1_8814B 0xfff
 #define BIT_BCN_HEAD_1_V1_8814B(x) (((x) & BIT_MASK_BCN_HEAD_1_V1_8814B) << BIT_SHIFT_BCN_HEAD_1_V1_8814B)
-#define BIT_GET_BCN_HEAD_1_V1_8814B(x) (((x) >> BIT_SHIFT_BCN_HEAD_1_V1_8814B) & BIT_MASK_BCN_HEAD_1_V1_8814B)

+#define BIT_GET_BCN_HEAD_1_V1_8814B(x) (((x) >> BIT_SHIFT_BCN_HEAD_1_V1_8814B) & BIT_MASK_BCN_HEAD_1_V1_8814B)
+
 
 #define BIT_BCN_VALID_V1_8814B BIT(15)
 
@@ -3298,7 +3575,8 @@
 #define BIT_SHIFT_BCN_HEAD_V1_8814B 0
 #define BIT_MASK_BCN_HEAD_V1_8814B 0xfff
 #define BIT_BCN_HEAD_V1_8814B(x) (((x) & BIT_MASK_BCN_HEAD_V1_8814B) << BIT_SHIFT_BCN_HEAD_V1_8814B)
-#define BIT_GET_BCN_HEAD_V1_8814B(x) (((x) >> BIT_SHIFT_BCN_HEAD_V1_8814B) & BIT_MASK_BCN_HEAD_V1_8814B)

+#define BIT_GET_BCN_HEAD_V1_8814B(x) (((x) >> BIT_SHIFT_BCN_HEAD_V1_8814B) & BIT_MASK_BCN_HEAD_V1_8814B)
+
 
 
 /* 2 REG_AUTO_LLT_V1_8814B */
@@ -3306,19 +3584,22 @@
 #define BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8814B 24
 #define BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8814B 0xff
 #define BIT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8814B(x) (((x) & BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8814B) << BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8814B)
-#define BIT_GET_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8814B(x) (((x) >> BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8814B) & BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8814B)

+#define BIT_GET_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8814B(x) (((x) >> BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8814B) & BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8814B)
+
 
 
 #define BIT_SHIFT_LLT_FREE_PAGE_V1_8814B 8
 #define BIT_MASK_LLT_FREE_PAGE_V1_8814B 0xffff
 #define BIT_LLT_FREE_PAGE_V1_8814B(x) (((x) & BIT_MASK_LLT_FREE_PAGE_V1_8814B) << BIT_SHIFT_LLT_FREE_PAGE_V1_8814B)
-#define BIT_GET_LLT_FREE_PAGE_V1_8814B(x) (((x) >> BIT_SHIFT_LLT_FREE_PAGE_V1_8814B) & BIT_MASK_LLT_FREE_PAGE_V1_8814B)

+#define BIT_GET_LLT_FREE_PAGE_V1_8814B(x) (((x) >> BIT_SHIFT_LLT_FREE_PAGE_V1_8814B) & BIT_MASK_LLT_FREE_PAGE_V1_8814B)
+
 
 
 #define BIT_SHIFT_BLK_DESC_NUM_8814B 4
 #define BIT_MASK_BLK_DESC_NUM_8814B 0xf
 #define BIT_BLK_DESC_NUM_8814B(x) (((x) & BIT_MASK_BLK_DESC_NUM_8814B) << BIT_SHIFT_BLK_DESC_NUM_8814B)
-#define BIT_GET_BLK_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_BLK_DESC_NUM_8814B) & BIT_MASK_BLK_DESC_NUM_8814B)

+#define BIT_GET_BLK_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_BLK_DESC_NUM_8814B) & BIT_MASK_BLK_DESC_NUM_8814B)
+
 
 #define BIT_R_BCN_HEAD_SEL_8814B BIT(3)
 #define BIT_R_EN_BCN_SW_HEAD_SEL_8814B BIT(2)
@@ -3334,7 +3615,8 @@
 #define BIT_SHIFT_PG_UNDER_TH_V1_8814B 16
 #define BIT_MASK_PG_UNDER_TH_V1_8814B 0xfff
 #define BIT_PG_UNDER_TH_V1_8814B(x) (((x) & BIT_MASK_PG_UNDER_TH_V1_8814B) << BIT_SHIFT_PG_UNDER_TH_V1_8814B)
-#define BIT_GET_PG_UNDER_TH_V1_8814B(x) (((x) >> BIT_SHIFT_PG_UNDER_TH_V1_8814B) & BIT_MASK_PG_UNDER_TH_V1_8814B)

+#define BIT_GET_PG_UNDER_TH_V1_8814B(x) (((x) >> BIT_SHIFT_PG_UNDER_TH_V1_8814B) & BIT_MASK_PG_UNDER_TH_V1_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -3348,7 +3630,8 @@
 #define BIT_SHIFT_CHECK_OFFSET_8814B 0
 #define BIT_MASK_CHECK_OFFSET_8814B 0xff
 #define BIT_CHECK_OFFSET_8814B(x) (((x) & BIT_MASK_CHECK_OFFSET_8814B) << BIT_SHIFT_CHECK_OFFSET_8814B)
-#define BIT_GET_CHECK_OFFSET_8814B(x) (((x) >> BIT_SHIFT_CHECK_OFFSET_8814B) & BIT_MASK_CHECK_OFFSET_8814B)

+#define BIT_GET_CHECK_OFFSET_8814B(x) (((x) >> BIT_SHIFT_CHECK_OFFSET_8814B) & BIT_MASK_CHECK_OFFSET_8814B)
+
 
 
 /* 2 REG_TXDMA_STATUS_8814B */
@@ -3379,13 +3662,15 @@
 #define BIT_SHIFT_HPQ_HIGH_TH_V1_8814B 16
 #define BIT_MASK_HPQ_HIGH_TH_V1_8814B 0xfff
 #define BIT_HPQ_HIGH_TH_V1_8814B(x) (((x) & BIT_MASK_HPQ_HIGH_TH_V1_8814B) << BIT_SHIFT_HPQ_HIGH_TH_V1_8814B)
-#define BIT_GET_HPQ_HIGH_TH_V1_8814B(x) (((x) >> BIT_SHIFT_HPQ_HIGH_TH_V1_8814B) & BIT_MASK_HPQ_HIGH_TH_V1_8814B)

+#define BIT_GET_HPQ_HIGH_TH_V1_8814B(x) (((x) >> BIT_SHIFT_HPQ_HIGH_TH_V1_8814B) & BIT_MASK_HPQ_HIGH_TH_V1_8814B)
+
 
 
 #define BIT_SHIFT_HPQ_LOW_TH_V1_8814B 0
 #define BIT_MASK_HPQ_LOW_TH_V1_8814B 0xfff
 #define BIT_HPQ_LOW_TH_V1_8814B(x) (((x) & BIT_MASK_HPQ_LOW_TH_V1_8814B) << BIT_SHIFT_HPQ_LOW_TH_V1_8814B)
-#define BIT_GET_HPQ_LOW_TH_V1_8814B(x) (((x) >> BIT_SHIFT_HPQ_LOW_TH_V1_8814B) & BIT_MASK_HPQ_LOW_TH_V1_8814B)

+#define BIT_GET_HPQ_LOW_TH_V1_8814B(x) (((x) >> BIT_SHIFT_HPQ_LOW_TH_V1_8814B) & BIT_MASK_HPQ_LOW_TH_V1_8814B)
+
 
 
 /* 2 REG_TQPNT2_8814B */
@@ -3393,13 +3678,15 @@
 #define BIT_SHIFT_NPQ_HIGH_TH_V1_8814B 16
 #define BIT_MASK_NPQ_HIGH_TH_V1_8814B 0xfff
 #define BIT_NPQ_HIGH_TH_V1_8814B(x) (((x) & BIT_MASK_NPQ_HIGH_TH_V1_8814B) << BIT_SHIFT_NPQ_HIGH_TH_V1_8814B)
-#define BIT_GET_NPQ_HIGH_TH_V1_8814B(x) (((x) >> BIT_SHIFT_NPQ_HIGH_TH_V1_8814B) & BIT_MASK_NPQ_HIGH_TH_V1_8814B)

+#define BIT_GET_NPQ_HIGH_TH_V1_8814B(x) (((x) >> BIT_SHIFT_NPQ_HIGH_TH_V1_8814B) & BIT_MASK_NPQ_HIGH_TH_V1_8814B)
+
 
 
 #define BIT_SHIFT_NPQ_LOW_TH_V1_8814B 0
 #define BIT_MASK_NPQ_LOW_TH_V1_8814B 0xfff
 #define BIT_NPQ_LOW_TH_V1_8814B(x) (((x) & BIT_MASK_NPQ_LOW_TH_V1_8814B) << BIT_SHIFT_NPQ_LOW_TH_V1_8814B)
-#define BIT_GET_NPQ_LOW_TH_V1_8814B(x) (((x) >> BIT_SHIFT_NPQ_LOW_TH_V1_8814B) & BIT_MASK_NPQ_LOW_TH_V1_8814B)

+#define BIT_GET_NPQ_LOW_TH_V1_8814B(x) (((x) >> BIT_SHIFT_NPQ_LOW_TH_V1_8814B) & BIT_MASK_NPQ_LOW_TH_V1_8814B)
+
 
 
 /* 2 REG_TQPNT3_8814B */
@@ -3407,13 +3694,15 @@
 #define BIT_SHIFT_LPQ_HIGH_TH_V1_8814B 16
 #define BIT_MASK_LPQ_HIGH_TH_V1_8814B 0xfff
 #define BIT_LPQ_HIGH_TH_V1_8814B(x) (((x) & BIT_MASK_LPQ_HIGH_TH_V1_8814B) << BIT_SHIFT_LPQ_HIGH_TH_V1_8814B)
-#define BIT_GET_LPQ_HIGH_TH_V1_8814B(x) (((x) >> BIT_SHIFT_LPQ_HIGH_TH_V1_8814B) & BIT_MASK_LPQ_HIGH_TH_V1_8814B)

+#define BIT_GET_LPQ_HIGH_TH_V1_8814B(x) (((x) >> BIT_SHIFT_LPQ_HIGH_TH_V1_8814B) & BIT_MASK_LPQ_HIGH_TH_V1_8814B)
+
 
 
 #define BIT_SHIFT_LPQ_LOW_TH_V1_8814B 0
 #define BIT_MASK_LPQ_LOW_TH_V1_8814B 0xfff
 #define BIT_LPQ_LOW_TH_V1_8814B(x) (((x) & BIT_MASK_LPQ_LOW_TH_V1_8814B) << BIT_SHIFT_LPQ_LOW_TH_V1_8814B)
-#define BIT_GET_LPQ_LOW_TH_V1_8814B(x) (((x) >> BIT_SHIFT_LPQ_LOW_TH_V1_8814B) & BIT_MASK_LPQ_LOW_TH_V1_8814B)

+#define BIT_GET_LPQ_LOW_TH_V1_8814B(x) (((x) >> BIT_SHIFT_LPQ_LOW_TH_V1_8814B) & BIT_MASK_LPQ_LOW_TH_V1_8814B)
+
 
 
 /* 2 REG_TQPNT4_8814B */
@@ -3421,13 +3710,15 @@
 #define BIT_SHIFT_EXQ_HIGH_TH_V1_8814B 16
 #define BIT_MASK_EXQ_HIGH_TH_V1_8814B 0xfff
 #define BIT_EXQ_HIGH_TH_V1_8814B(x) (((x) & BIT_MASK_EXQ_HIGH_TH_V1_8814B) << BIT_SHIFT_EXQ_HIGH_TH_V1_8814B)
-#define BIT_GET_EXQ_HIGH_TH_V1_8814B(x) (((x) >> BIT_SHIFT_EXQ_HIGH_TH_V1_8814B) & BIT_MASK_EXQ_HIGH_TH_V1_8814B)

+#define BIT_GET_EXQ_HIGH_TH_V1_8814B(x) (((x) >> BIT_SHIFT_EXQ_HIGH_TH_V1_8814B) & BIT_MASK_EXQ_HIGH_TH_V1_8814B)
+
 
 
 #define BIT_SHIFT_EXQ_LOW_TH_V1_8814B 0
 #define BIT_MASK_EXQ_LOW_TH_V1_8814B 0xfff
 #define BIT_EXQ_LOW_TH_V1_8814B(x) (((x) & BIT_MASK_EXQ_LOW_TH_V1_8814B) << BIT_SHIFT_EXQ_LOW_TH_V1_8814B)
-#define BIT_GET_EXQ_LOW_TH_V1_8814B(x) (((x) >> BIT_SHIFT_EXQ_LOW_TH_V1_8814B) & BIT_MASK_EXQ_LOW_TH_V1_8814B)

+#define BIT_GET_EXQ_LOW_TH_V1_8814B(x) (((x) >> BIT_SHIFT_EXQ_LOW_TH_V1_8814B) & BIT_MASK_EXQ_LOW_TH_V1_8814B)
+
 
 
 /* 2 REG_RQPN_CTRL_1_8814B */
@@ -3435,13 +3726,15 @@
 #define BIT_SHIFT_TXPKTNUM_H_8814B 16
 #define BIT_MASK_TXPKTNUM_H_8814B 0xffff
 #define BIT_TXPKTNUM_H_8814B(x) (((x) & BIT_MASK_TXPKTNUM_H_8814B) << BIT_SHIFT_TXPKTNUM_H_8814B)
-#define BIT_GET_TXPKTNUM_H_8814B(x) (((x) >> BIT_SHIFT_TXPKTNUM_H_8814B) & BIT_MASK_TXPKTNUM_H_8814B)

+#define BIT_GET_TXPKTNUM_H_8814B(x) (((x) >> BIT_SHIFT_TXPKTNUM_H_8814B) & BIT_MASK_TXPKTNUM_H_8814B)
+
 
 
 #define BIT_SHIFT_TXPKTNUM_V2_8814B 0
 #define BIT_MASK_TXPKTNUM_V2_8814B 0xffff
 #define BIT_TXPKTNUM_V2_8814B(x) (((x) & BIT_MASK_TXPKTNUM_V2_8814B) << BIT_SHIFT_TXPKTNUM_V2_8814B)
-#define BIT_GET_TXPKTNUM_V2_8814B(x) (((x) >> BIT_SHIFT_TXPKTNUM_V2_8814B) & BIT_MASK_TXPKTNUM_V2_8814B)

+#define BIT_GET_TXPKTNUM_V2_8814B(x) (((x) >> BIT_SHIFT_TXPKTNUM_V2_8814B) & BIT_MASK_TXPKTNUM_V2_8814B)
+
 
 
 /* 2 REG_RQPN_CTRL_2_8814B */
@@ -3455,7 +3748,8 @@
 #define BIT_SHIFT_SDIO_TXAGG_ALIGN_SIZE_8814B 0
 #define BIT_MASK_SDIO_TXAGG_ALIGN_SIZE_8814B 0xfff
 #define BIT_SDIO_TXAGG_ALIGN_SIZE_8814B(x) (((x) & BIT_MASK_SDIO_TXAGG_ALIGN_SIZE_8814B) << BIT_SHIFT_SDIO_TXAGG_ALIGN_SIZE_8814B)
-#define BIT_GET_SDIO_TXAGG_ALIGN_SIZE_8814B(x) (((x) >> BIT_SHIFT_SDIO_TXAGG_ALIGN_SIZE_8814B) & BIT_MASK_SDIO_TXAGG_ALIGN_SIZE_8814B)

+#define BIT_GET_SDIO_TXAGG_ALIGN_SIZE_8814B(x) (((x) >> BIT_SHIFT_SDIO_TXAGG_ALIGN_SIZE_8814B) & BIT_MASK_SDIO_TXAGG_ALIGN_SIZE_8814B)
+
 
 
 /* 2 REG_FIFOPAGE_INFO_1_8814B */
@@ -3463,13 +3757,15 @@
 #define BIT_SHIFT_HPQ_AVAL_PG_V1_8814B 16
 #define BIT_MASK_HPQ_AVAL_PG_V1_8814B 0xfff
 #define BIT_HPQ_AVAL_PG_V1_8814B(x) (((x) & BIT_MASK_HPQ_AVAL_PG_V1_8814B) << BIT_SHIFT_HPQ_AVAL_PG_V1_8814B)
-#define BIT_GET_HPQ_AVAL_PG_V1_8814B(x) (((x) >> BIT_SHIFT_HPQ_AVAL_PG_V1_8814B) & BIT_MASK_HPQ_AVAL_PG_V1_8814B)

+#define BIT_GET_HPQ_AVAL_PG_V1_8814B(x) (((x) >> BIT_SHIFT_HPQ_AVAL_PG_V1_8814B) & BIT_MASK_HPQ_AVAL_PG_V1_8814B)
+
 
 
 #define BIT_SHIFT_HPQ_V1_8814B 0
 #define BIT_MASK_HPQ_V1_8814B 0xfff
 #define BIT_HPQ_V1_8814B(x) (((x) & BIT_MASK_HPQ_V1_8814B) << BIT_SHIFT_HPQ_V1_8814B)
-#define BIT_GET_HPQ_V1_8814B(x) (((x) >> BIT_SHIFT_HPQ_V1_8814B) & BIT_MASK_HPQ_V1_8814B)

+#define BIT_GET_HPQ_V1_8814B(x) (((x) >> BIT_SHIFT_HPQ_V1_8814B) & BIT_MASK_HPQ_V1_8814B)
+
 
 
 /* 2 REG_FIFOPAGE_INFO_2_8814B */
@@ -3477,13 +3773,15 @@
 #define BIT_SHIFT_LPQ_AVAL_PG_V1_8814B 16
 #define BIT_MASK_LPQ_AVAL_PG_V1_8814B 0xfff
 #define BIT_LPQ_AVAL_PG_V1_8814B(x) (((x) & BIT_MASK_LPQ_AVAL_PG_V1_8814B) << BIT_SHIFT_LPQ_AVAL_PG_V1_8814B)
-#define BIT_GET_LPQ_AVAL_PG_V1_8814B(x) (((x) >> BIT_SHIFT_LPQ_AVAL_PG_V1_8814B) & BIT_MASK_LPQ_AVAL_PG_V1_8814B)

+#define BIT_GET_LPQ_AVAL_PG_V1_8814B(x) (((x) >> BIT_SHIFT_LPQ_AVAL_PG_V1_8814B) & BIT_MASK_LPQ_AVAL_PG_V1_8814B)
+
 
 
 #define BIT_SHIFT_LPQ_V1_8814B 0
 #define BIT_MASK_LPQ_V1_8814B 0xfff
 #define BIT_LPQ_V1_8814B(x) (((x) & BIT_MASK_LPQ_V1_8814B) << BIT_SHIFT_LPQ_V1_8814B)
-#define BIT_GET_LPQ_V1_8814B(x) (((x) >> BIT_SHIFT_LPQ_V1_8814B) & BIT_MASK_LPQ_V1_8814B)

+#define BIT_GET_LPQ_V1_8814B(x) (((x) >> BIT_SHIFT_LPQ_V1_8814B) & BIT_MASK_LPQ_V1_8814B)
+
 
 
 /* 2 REG_FIFOPAGE_INFO_3_8814B */
@@ -3491,13 +3789,15 @@
 #define BIT_SHIFT_NPQ_AVAL_PG_V1_8814B 16
 #define BIT_MASK_NPQ_AVAL_PG_V1_8814B 0xfff
 #define BIT_NPQ_AVAL_PG_V1_8814B(x) (((x) & BIT_MASK_NPQ_AVAL_PG_V1_8814B) << BIT_SHIFT_NPQ_AVAL_PG_V1_8814B)
-#define BIT_GET_NPQ_AVAL_PG_V1_8814B(x) (((x) >> BIT_SHIFT_NPQ_AVAL_PG_V1_8814B) & BIT_MASK_NPQ_AVAL_PG_V1_8814B)

+#define BIT_GET_NPQ_AVAL_PG_V1_8814B(x) (((x) >> BIT_SHIFT_NPQ_AVAL_PG_V1_8814B) & BIT_MASK_NPQ_AVAL_PG_V1_8814B)
+
 
 
 #define BIT_SHIFT_NPQ_V1_8814B 0
 #define BIT_MASK_NPQ_V1_8814B 0xfff
 #define BIT_NPQ_V1_8814B(x) (((x) & BIT_MASK_NPQ_V1_8814B) << BIT_SHIFT_NPQ_V1_8814B)
-#define BIT_GET_NPQ_V1_8814B(x) (((x) >> BIT_SHIFT_NPQ_V1_8814B) & BIT_MASK_NPQ_V1_8814B)

+#define BIT_GET_NPQ_V1_8814B(x) (((x) >> BIT_SHIFT_NPQ_V1_8814B) & BIT_MASK_NPQ_V1_8814B)
+
 
 
 /* 2 REG_FIFOPAGE_INFO_4_8814B */
@@ -3505,13 +3805,15 @@
 #define BIT_SHIFT_EXQ_AVAL_PG_V1_8814B 16
 #define BIT_MASK_EXQ_AVAL_PG_V1_8814B 0xfff
 #define BIT_EXQ_AVAL_PG_V1_8814B(x) (((x) & BIT_MASK_EXQ_AVAL_PG_V1_8814B) << BIT_SHIFT_EXQ_AVAL_PG_V1_8814B)
-#define BIT_GET_EXQ_AVAL_PG_V1_8814B(x) (((x) >> BIT_SHIFT_EXQ_AVAL_PG_V1_8814B) & BIT_MASK_EXQ_AVAL_PG_V1_8814B)

+#define BIT_GET_EXQ_AVAL_PG_V1_8814B(x) (((x) >> BIT_SHIFT_EXQ_AVAL_PG_V1_8814B) & BIT_MASK_EXQ_AVAL_PG_V1_8814B)
+
 
 
 #define BIT_SHIFT_EXQ_V1_8814B 0
 #define BIT_MASK_EXQ_V1_8814B 0xfff
 #define BIT_EXQ_V1_8814B(x) (((x) & BIT_MASK_EXQ_V1_8814B) << BIT_SHIFT_EXQ_V1_8814B)
-#define BIT_GET_EXQ_V1_8814B(x) (((x) >> BIT_SHIFT_EXQ_V1_8814B) & BIT_MASK_EXQ_V1_8814B)

+#define BIT_GET_EXQ_V1_8814B(x) (((x) >> BIT_SHIFT_EXQ_V1_8814B) & BIT_MASK_EXQ_V1_8814B)
+
 
 
 /* 2 REG_FIFOPAGE_INFO_5_8814B */
@@ -3519,13 +3821,15 @@
 #define BIT_SHIFT_PUBQ_AVAL_PG_V1_8814B 16
 #define BIT_MASK_PUBQ_AVAL_PG_V1_8814B 0xfff
 #define BIT_PUBQ_AVAL_PG_V1_8814B(x) (((x) & BIT_MASK_PUBQ_AVAL_PG_V1_8814B) << BIT_SHIFT_PUBQ_AVAL_PG_V1_8814B)
-#define BIT_GET_PUBQ_AVAL_PG_V1_8814B(x) (((x) >> BIT_SHIFT_PUBQ_AVAL_PG_V1_8814B) & BIT_MASK_PUBQ_AVAL_PG_V1_8814B)

+#define BIT_GET_PUBQ_AVAL_PG_V1_8814B(x) (((x) >> BIT_SHIFT_PUBQ_AVAL_PG_V1_8814B) & BIT_MASK_PUBQ_AVAL_PG_V1_8814B)
+
 
 
 #define BIT_SHIFT_PUBQ_V1_8814B 0
 #define BIT_MASK_PUBQ_V1_8814B 0xfff
 #define BIT_PUBQ_V1_8814B(x) (((x) & BIT_MASK_PUBQ_V1_8814B) << BIT_SHIFT_PUBQ_V1_8814B)
-#define BIT_GET_PUBQ_V1_8814B(x) (((x) >> BIT_SHIFT_PUBQ_V1_8814B) & BIT_MASK_PUBQ_V1_8814B)

+#define BIT_GET_PUBQ_V1_8814B(x) (((x) >> BIT_SHIFT_PUBQ_V1_8814B) & BIT_MASK_PUBQ_V1_8814B)
+
 
 
 /* 2 REG_H2C_HEAD_8814B */
@@ -3533,7 +3837,8 @@
 #define BIT_SHIFT_H2C_HEAD_8814B 0
 #define BIT_MASK_H2C_HEAD_8814B 0x3ffff
 #define BIT_H2C_HEAD_8814B(x) (((x) & BIT_MASK_H2C_HEAD_8814B) << BIT_SHIFT_H2C_HEAD_8814B)
-#define BIT_GET_H2C_HEAD_8814B(x) (((x) >> BIT_SHIFT_H2C_HEAD_8814B) & BIT_MASK_H2C_HEAD_8814B)

+#define BIT_GET_H2C_HEAD_8814B(x) (((x) >> BIT_SHIFT_H2C_HEAD_8814B) & BIT_MASK_H2C_HEAD_8814B)
+
 
 
 /* 2 REG_H2C_TAIL_8814B */
@@ -3541,7 +3846,8 @@
 #define BIT_SHIFT_H2C_TAIL_8814B 0
 #define BIT_MASK_H2C_TAIL_8814B 0x3ffff
 #define BIT_H2C_TAIL_8814B(x) (((x) & BIT_MASK_H2C_TAIL_8814B) << BIT_SHIFT_H2C_TAIL_8814B)
-#define BIT_GET_H2C_TAIL_8814B(x) (((x) >> BIT_SHIFT_H2C_TAIL_8814B) & BIT_MASK_H2C_TAIL_8814B)

+#define BIT_GET_H2C_TAIL_8814B(x) (((x) >> BIT_SHIFT_H2C_TAIL_8814B) & BIT_MASK_H2C_TAIL_8814B)
+
 
 
 /* 2 REG_H2C_READ_ADDR_8814B */
@@ -3549,7 +3855,8 @@
 #define BIT_SHIFT_H2C_READ_ADDR_8814B 0
 #define BIT_MASK_H2C_READ_ADDR_8814B 0x3ffff
 #define BIT_H2C_READ_ADDR_8814B(x) (((x) & BIT_MASK_H2C_READ_ADDR_8814B) << BIT_SHIFT_H2C_READ_ADDR_8814B)
-#define BIT_GET_H2C_READ_ADDR_8814B(x) (((x) >> BIT_SHIFT_H2C_READ_ADDR_8814B) & BIT_MASK_H2C_READ_ADDR_8814B)

+#define BIT_GET_H2C_READ_ADDR_8814B(x) (((x) >> BIT_SHIFT_H2C_READ_ADDR_8814B) & BIT_MASK_H2C_READ_ADDR_8814B)
+
 
 
 /* 2 REG_H2C_WR_ADDR_8814B */
@@ -3557,7 +3864,8 @@
 #define BIT_SHIFT_H2C_WR_ADDR_8814B 0
 #define BIT_MASK_H2C_WR_ADDR_8814B 0x3ffff
 #define BIT_H2C_WR_ADDR_8814B(x) (((x) & BIT_MASK_H2C_WR_ADDR_8814B) << BIT_SHIFT_H2C_WR_ADDR_8814B)
-#define BIT_GET_H2C_WR_ADDR_8814B(x) (((x) >> BIT_SHIFT_H2C_WR_ADDR_8814B) & BIT_MASK_H2C_WR_ADDR_8814B)

+#define BIT_GET_H2C_WR_ADDR_8814B(x) (((x) >> BIT_SHIFT_H2C_WR_ADDR_8814B) & BIT_MASK_H2C_WR_ADDR_8814B)
+
 
 
 /* 2 REG_H2C_INFO_8814B */
@@ -3567,7 +3875,8 @@
 #define BIT_SHIFT_H2C_LEN_SEL_8814B 0
 #define BIT_MASK_H2C_LEN_SEL_8814B 0x3
 #define BIT_H2C_LEN_SEL_8814B(x) (((x) & BIT_MASK_H2C_LEN_SEL_8814B) << BIT_SHIFT_H2C_LEN_SEL_8814B)
-#define BIT_GET_H2C_LEN_SEL_8814B(x) (((x) >> BIT_SHIFT_H2C_LEN_SEL_8814B) & BIT_MASK_H2C_LEN_SEL_8814B)

+#define BIT_GET_H2C_LEN_SEL_8814B(x) (((x) >> BIT_SHIFT_H2C_LEN_SEL_8814B) & BIT_MASK_H2C_LEN_SEL_8814B)
+
 
 
 /* 2 REG_RXDMA_AGG_PG_TH_8814B */
@@ -3575,25 +3884,29 @@
 #define BIT_SHIFT_RXDMA_AGG_OLD_MOD_8814B 24
 #define BIT_MASK_RXDMA_AGG_OLD_MOD_8814B 0xff
 #define BIT_RXDMA_AGG_OLD_MOD_8814B(x) (((x) & BIT_MASK_RXDMA_AGG_OLD_MOD_8814B) << BIT_SHIFT_RXDMA_AGG_OLD_MOD_8814B)
-#define BIT_GET_RXDMA_AGG_OLD_MOD_8814B(x) (((x) >> BIT_SHIFT_RXDMA_AGG_OLD_MOD_8814B) & BIT_MASK_RXDMA_AGG_OLD_MOD_8814B)

+#define BIT_GET_RXDMA_AGG_OLD_MOD_8814B(x) (((x) >> BIT_SHIFT_RXDMA_AGG_OLD_MOD_8814B) & BIT_MASK_RXDMA_AGG_OLD_MOD_8814B)
+
 
 
 #define BIT_SHIFT_PKT_NUM_WOL_8814B 16
 #define BIT_MASK_PKT_NUM_WOL_8814B 0xff
 #define BIT_PKT_NUM_WOL_8814B(x) (((x) & BIT_MASK_PKT_NUM_WOL_8814B) << BIT_SHIFT_PKT_NUM_WOL_8814B)
-#define BIT_GET_PKT_NUM_WOL_8814B(x) (((x) >> BIT_SHIFT_PKT_NUM_WOL_8814B) & BIT_MASK_PKT_NUM_WOL_8814B)

+#define BIT_GET_PKT_NUM_WOL_8814B(x) (((x) >> BIT_SHIFT_PKT_NUM_WOL_8814B) & BIT_MASK_PKT_NUM_WOL_8814B)
+
 
 
 #define BIT_SHIFT_DMA_AGG_TO_8814B 8
 #define BIT_MASK_DMA_AGG_TO_8814B 0xf
 #define BIT_DMA_AGG_TO_8814B(x) (((x) & BIT_MASK_DMA_AGG_TO_8814B) << BIT_SHIFT_DMA_AGG_TO_8814B)
-#define BIT_GET_DMA_AGG_TO_8814B(x) (((x) >> BIT_SHIFT_DMA_AGG_TO_8814B) & BIT_MASK_DMA_AGG_TO_8814B)

+#define BIT_GET_DMA_AGG_TO_8814B(x) (((x) >> BIT_SHIFT_DMA_AGG_TO_8814B) & BIT_MASK_DMA_AGG_TO_8814B)
+
 
 
 #define BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8814B 0
 #define BIT_MASK_RXDMA_AGG_PG_TH_V1_8814B 0xf
 #define BIT_RXDMA_AGG_PG_TH_V1_8814B(x) (((x) & BIT_MASK_RXDMA_AGG_PG_TH_V1_8814B) << BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8814B)
-#define BIT_GET_RXDMA_AGG_PG_TH_V1_8814B(x) (((x) >> BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8814B) & BIT_MASK_RXDMA_AGG_PG_TH_V1_8814B)

+#define BIT_GET_RXDMA_AGG_PG_TH_V1_8814B(x) (((x) >> BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8814B) & BIT_MASK_RXDMA_AGG_PG_TH_V1_8814B)
+
 
 
 /* 2 REG_RXPKT_NUM_8814B */
@@ -3601,13 +3914,15 @@
 #define BIT_SHIFT_RXPKT_NUM_8814B 24
 #define BIT_MASK_RXPKT_NUM_8814B 0xff
 #define BIT_RXPKT_NUM_8814B(x) (((x) & BIT_MASK_RXPKT_NUM_8814B) << BIT_SHIFT_RXPKT_NUM_8814B)
-#define BIT_GET_RXPKT_NUM_8814B(x) (((x) >> BIT_SHIFT_RXPKT_NUM_8814B) & BIT_MASK_RXPKT_NUM_8814B)

+#define BIT_GET_RXPKT_NUM_8814B(x) (((x) >> BIT_SHIFT_RXPKT_NUM_8814B) & BIT_MASK_RXPKT_NUM_8814B)
+
 
 
 #define BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8814B 20
 #define BIT_MASK_FW_UPD_RDPTR19_TO_16_8814B 0xf
 #define BIT_FW_UPD_RDPTR19_TO_16_8814B(x) (((x) & BIT_MASK_FW_UPD_RDPTR19_TO_16_8814B) << BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8814B)
-#define BIT_GET_FW_UPD_RDPTR19_TO_16_8814B(x) (((x) >> BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8814B) & BIT_MASK_FW_UPD_RDPTR19_TO_16_8814B)

+#define BIT_GET_FW_UPD_RDPTR19_TO_16_8814B(x) (((x) >> BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8814B) & BIT_MASK_FW_UPD_RDPTR19_TO_16_8814B)
+
 
 #define BIT_RXDMA_REQ_8814B BIT(19)
 #define BIT_RW_RELEASE_EN_8814B BIT(18)
@@ -3617,7 +3932,8 @@
 #define BIT_SHIFT_FW_UPD_RDPTR_8814B 0
 #define BIT_MASK_FW_UPD_RDPTR_8814B 0xffff
 #define BIT_FW_UPD_RDPTR_8814B(x) (((x) & BIT_MASK_FW_UPD_RDPTR_8814B) << BIT_SHIFT_FW_UPD_RDPTR_8814B)
-#define BIT_GET_FW_UPD_RDPTR_8814B(x) (((x) >> BIT_SHIFT_FW_UPD_RDPTR_8814B) & BIT_MASK_FW_UPD_RDPTR_8814B)

+#define BIT_GET_FW_UPD_RDPTR_8814B(x) (((x) >> BIT_SHIFT_FW_UPD_RDPTR_8814B) & BIT_MASK_FW_UPD_RDPTR_8814B)
+
 
 
 /* 2 REG_RXDMA_STATUS_8814B */
@@ -3634,7 +3950,8 @@
 #define BIT_SHIFT_RDE_DEBUG_8814B 0
 #define BIT_MASK_RDE_DEBUG_8814B 0xffffffffL
 #define BIT_RDE_DEBUG_8814B(x) (((x) & BIT_MASK_RDE_DEBUG_8814B) << BIT_SHIFT_RDE_DEBUG_8814B)
-#define BIT_GET_RDE_DEBUG_8814B(x) (((x) >> BIT_SHIFT_RDE_DEBUG_8814B) & BIT_MASK_RDE_DEBUG_8814B)

+#define BIT_GET_RDE_DEBUG_8814B(x) (((x) >> BIT_SHIFT_RDE_DEBUG_8814B) & BIT_MASK_RDE_DEBUG_8814B)
+
 
 
 /* 2 REG_RXDMA_MODE_8814B */
@@ -3642,26 +3959,30 @@
 #define BIT_SHIFT_PKTNUM_TH_V2_8814B 24
 #define BIT_MASK_PKTNUM_TH_V2_8814B 0x1f
 #define BIT_PKTNUM_TH_V2_8814B(x) (((x) & BIT_MASK_PKTNUM_TH_V2_8814B) << BIT_SHIFT_PKTNUM_TH_V2_8814B)
-#define BIT_GET_PKTNUM_TH_V2_8814B(x) (((x) >> BIT_SHIFT_PKTNUM_TH_V2_8814B) & BIT_MASK_PKTNUM_TH_V2_8814B)

+#define BIT_GET_PKTNUM_TH_V2_8814B(x) (((x) >> BIT_SHIFT_PKTNUM_TH_V2_8814B) & BIT_MASK_PKTNUM_TH_V2_8814B)
+
 
 #define BIT_TXBA_BREAK_USBAGG_8814B BIT(23)
 
 #define BIT_SHIFT_PKTLEN_PARA_8814B 16
 #define BIT_MASK_PKTLEN_PARA_8814B 0x7
 #define BIT_PKTLEN_PARA_8814B(x) (((x) & BIT_MASK_PKTLEN_PARA_8814B) << BIT_SHIFT_PKTLEN_PARA_8814B)
-#define BIT_GET_PKTLEN_PARA_8814B(x) (((x) >> BIT_SHIFT_PKTLEN_PARA_8814B) & BIT_MASK_PKTLEN_PARA_8814B)

+#define BIT_GET_PKTLEN_PARA_8814B(x) (((x) >> BIT_SHIFT_PKTLEN_PARA_8814B) & BIT_MASK_PKTLEN_PARA_8814B)
+
 
 
 #define BIT_SHIFT_BURST_SIZE_8814B 4
 #define BIT_MASK_BURST_SIZE_8814B 0x3
 #define BIT_BURST_SIZE_8814B(x) (((x) & BIT_MASK_BURST_SIZE_8814B) << BIT_SHIFT_BURST_SIZE_8814B)
-#define BIT_GET_BURST_SIZE_8814B(x) (((x) >> BIT_SHIFT_BURST_SIZE_8814B) & BIT_MASK_BURST_SIZE_8814B)

+#define BIT_GET_BURST_SIZE_8814B(x) (((x) >> BIT_SHIFT_BURST_SIZE_8814B) & BIT_MASK_BURST_SIZE_8814B)
+
 
 
 #define BIT_SHIFT_BURST_CNT_8814B 2
 #define BIT_MASK_BURST_CNT_8814B 0x3
 #define BIT_BURST_CNT_8814B(x) (((x) & BIT_MASK_BURST_CNT_8814B) << BIT_SHIFT_BURST_CNT_8814B)
-#define BIT_GET_BURST_CNT_8814B(x) (((x) >> BIT_SHIFT_BURST_CNT_8814B) & BIT_MASK_BURST_CNT_8814B)

+#define BIT_GET_BURST_CNT_8814B(x) (((x) >> BIT_SHIFT_BURST_CNT_8814B) & BIT_MASK_BURST_CNT_8814B)
+
 
 #define BIT_DMA_MODE_8814B BIT(1)
 
@@ -3670,14 +3991,16 @@
 #define BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8814B 24
 #define BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8814B 0xf
 #define BIT_R_C2H_STR_ADDR_16_TO_19_8814B(x) (((x) & BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8814B) << BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8814B)
-#define BIT_GET_R_C2H_STR_ADDR_16_TO_19_8814B(x) (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8814B) & BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8814B)

+#define BIT_GET_R_C2H_STR_ADDR_16_TO_19_8814B(x) (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8814B) & BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8814B)
+
 
 #define BIT_R_C2H_PKT_REQ_8814B BIT(16)
 
 #define BIT_SHIFT_R_C2H_STR_ADDR_8814B 0
 #define BIT_MASK_R_C2H_STR_ADDR_8814B 0xffff
 #define BIT_R_C2H_STR_ADDR_8814B(x) (((x) & BIT_MASK_R_C2H_STR_ADDR_8814B) << BIT_SHIFT_R_C2H_STR_ADDR_8814B)
-#define BIT_GET_R_C2H_STR_ADDR_8814B(x) (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_8814B) & BIT_MASK_R_C2H_STR_ADDR_8814B)

+#define BIT_GET_R_C2H_STR_ADDR_8814B(x) (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_8814B) & BIT_MASK_R_C2H_STR_ADDR_8814B)
+
 
 
 /* 2 REG_FWFF_C2H_8814B */
@@ -3685,7 +4008,8 @@
 #define BIT_SHIFT_C2H_DMA_ADDR_8814B 0
 #define BIT_MASK_C2H_DMA_ADDR_8814B 0x3ffff
 #define BIT_C2H_DMA_ADDR_8814B(x) (((x) & BIT_MASK_C2H_DMA_ADDR_8814B) << BIT_SHIFT_C2H_DMA_ADDR_8814B)
-#define BIT_GET_C2H_DMA_ADDR_8814B(x) (((x) >> BIT_SHIFT_C2H_DMA_ADDR_8814B) & BIT_MASK_C2H_DMA_ADDR_8814B)

+#define BIT_GET_C2H_DMA_ADDR_8814B(x) (((x) >> BIT_SHIFT_C2H_DMA_ADDR_8814B) & BIT_MASK_C2H_DMA_ADDR_8814B)
+
 
 
 /* 2 REG_FWFF_CTRL_8814B */
@@ -3694,13 +4018,15 @@
 #define BIT_SHIFT_FWFF_DMA_PKT_NUM_8814B 16
 #define BIT_MASK_FWFF_DMA_PKT_NUM_8814B 0xff
 #define BIT_FWFF_DMA_PKT_NUM_8814B(x) (((x) & BIT_MASK_FWFF_DMA_PKT_NUM_8814B) << BIT_SHIFT_FWFF_DMA_PKT_NUM_8814B)
-#define BIT_GET_FWFF_DMA_PKT_NUM_8814B(x) (((x) >> BIT_SHIFT_FWFF_DMA_PKT_NUM_8814B) & BIT_MASK_FWFF_DMA_PKT_NUM_8814B)

+#define BIT_GET_FWFF_DMA_PKT_NUM_8814B(x) (((x) >> BIT_SHIFT_FWFF_DMA_PKT_NUM_8814B) & BIT_MASK_FWFF_DMA_PKT_NUM_8814B)
+
 
 
 #define BIT_SHIFT_FWFF_STR_ADDR_8814B 0
 #define BIT_MASK_FWFF_STR_ADDR_8814B 0xffff
 #define BIT_FWFF_STR_ADDR_8814B(x) (((x) & BIT_MASK_FWFF_STR_ADDR_8814B) << BIT_SHIFT_FWFF_STR_ADDR_8814B)
-#define BIT_GET_FWFF_STR_ADDR_8814B(x) (((x) >> BIT_SHIFT_FWFF_STR_ADDR_8814B) & BIT_MASK_FWFF_STR_ADDR_8814B)

+#define BIT_GET_FWFF_STR_ADDR_8814B(x) (((x) >> BIT_SHIFT_FWFF_STR_ADDR_8814B) & BIT_MASK_FWFF_STR_ADDR_8814B)
+
 
 
 /* 2 REG_FWFF_PKT_INFO_8814B */
@@ -3708,13 +4034,15 @@
 #define BIT_SHIFT_FWFF_PKT_QUEUED_8814B 16
 #define BIT_MASK_FWFF_PKT_QUEUED_8814B 0xff
 #define BIT_FWFF_PKT_QUEUED_8814B(x) (((x) & BIT_MASK_FWFF_PKT_QUEUED_8814B) << BIT_SHIFT_FWFF_PKT_QUEUED_8814B)
-#define BIT_GET_FWFF_PKT_QUEUED_8814B(x) (((x) >> BIT_SHIFT_FWFF_PKT_QUEUED_8814B) & BIT_MASK_FWFF_PKT_QUEUED_8814B)

+#define BIT_GET_FWFF_PKT_QUEUED_8814B(x) (((x) >> BIT_SHIFT_FWFF_PKT_QUEUED_8814B) & BIT_MASK_FWFF_PKT_QUEUED_8814B)
+
 
 
 #define BIT_SHIFT_FWFF_PKT_STR_ADDR_8814B 0
 #define BIT_MASK_FWFF_PKT_STR_ADDR_8814B 0xffff
 #define BIT_FWFF_PKT_STR_ADDR_8814B(x) (((x) & BIT_MASK_FWFF_PKT_STR_ADDR_8814B) << BIT_SHIFT_FWFF_PKT_STR_ADDR_8814B)
-#define BIT_GET_FWFF_PKT_STR_ADDR_8814B(x) (((x) >> BIT_SHIFT_FWFF_PKT_STR_ADDR_8814B) & BIT_MASK_FWFF_PKT_STR_ADDR_8814B)

+#define BIT_GET_FWFF_PKT_STR_ADDR_8814B(x) (((x) >> BIT_SHIFT_FWFF_PKT_STR_ADDR_8814B) & BIT_MASK_FWFF_PKT_STR_ADDR_8814B)
+
 
 
 /* 2 REG_DDMA_CH0SA_8814B */
@@ -3722,7 +4050,8 @@
 #define BIT_SHIFT_DDMACH0_SA_8814B 0
 #define BIT_MASK_DDMACH0_SA_8814B 0xffffffffL
 #define BIT_DDMACH0_SA_8814B(x) (((x) & BIT_MASK_DDMACH0_SA_8814B) << BIT_SHIFT_DDMACH0_SA_8814B)
-#define BIT_GET_DDMACH0_SA_8814B(x) (((x) >> BIT_SHIFT_DDMACH0_SA_8814B) & BIT_MASK_DDMACH0_SA_8814B)

+#define BIT_GET_DDMACH0_SA_8814B(x) (((x) >> BIT_SHIFT_DDMACH0_SA_8814B) & BIT_MASK_DDMACH0_SA_8814B)
+
 
 
 /* 2 REG_DDMA_CH0DA_8814B */
@@ -3730,7 +4059,8 @@
 #define BIT_SHIFT_DDMACH0_DA_8814B 0
 #define BIT_MASK_DDMACH0_DA_8814B 0xffffffffL
 #define BIT_DDMACH0_DA_8814B(x) (((x) & BIT_MASK_DDMACH0_DA_8814B) << BIT_SHIFT_DDMACH0_DA_8814B)
-#define BIT_GET_DDMACH0_DA_8814B(x) (((x) >> BIT_SHIFT_DDMACH0_DA_8814B) & BIT_MASK_DDMACH0_DA_8814B)

+#define BIT_GET_DDMACH0_DA_8814B(x) (((x) >> BIT_SHIFT_DDMACH0_DA_8814B) & BIT_MASK_DDMACH0_DA_8814B)
+
 
 
 /* 2 REG_DDMA_CH0CTRL_8814B */
@@ -3745,7 +4075,8 @@
 #define BIT_SHIFT_DDMACH0_DLEN_8814B 0
 #define BIT_MASK_DDMACH0_DLEN_8814B 0x3ffff
 #define BIT_DDMACH0_DLEN_8814B(x) (((x) & BIT_MASK_DDMACH0_DLEN_8814B) << BIT_SHIFT_DDMACH0_DLEN_8814B)
-#define BIT_GET_DDMACH0_DLEN_8814B(x) (((x) >> BIT_SHIFT_DDMACH0_DLEN_8814B) & BIT_MASK_DDMACH0_DLEN_8814B)

+#define BIT_GET_DDMACH0_DLEN_8814B(x) (((x) >> BIT_SHIFT_DDMACH0_DLEN_8814B) & BIT_MASK_DDMACH0_DLEN_8814B)
+
 
 
 /* 2 REG_DDMA_CH1SA_8814B */
@@ -3753,7 +4084,8 @@
 #define BIT_SHIFT_DDMACH1_SA_8814B 0
 #define BIT_MASK_DDMACH1_SA_8814B 0xffffffffL
 #define BIT_DDMACH1_SA_8814B(x) (((x) & BIT_MASK_DDMACH1_SA_8814B) << BIT_SHIFT_DDMACH1_SA_8814B)
-#define BIT_GET_DDMACH1_SA_8814B(x) (((x) >> BIT_SHIFT_DDMACH1_SA_8814B) & BIT_MASK_DDMACH1_SA_8814B)

+#define BIT_GET_DDMACH1_SA_8814B(x) (((x) >> BIT_SHIFT_DDMACH1_SA_8814B) & BIT_MASK_DDMACH1_SA_8814B)
+
 
 
 /* 2 REG_DDMA_CH1DA_8814B */
@@ -3761,7 +4093,8 @@
 #define BIT_SHIFT_DDMACH1_DA_8814B 0
 #define BIT_MASK_DDMACH1_DA_8814B 0xffffffffL
 #define BIT_DDMACH1_DA_8814B(x) (((x) & BIT_MASK_DDMACH1_DA_8814B) << BIT_SHIFT_DDMACH1_DA_8814B)
-#define BIT_GET_DDMACH1_DA_8814B(x) (((x) >> BIT_SHIFT_DDMACH1_DA_8814B) & BIT_MASK_DDMACH1_DA_8814B)

+#define BIT_GET_DDMACH1_DA_8814B(x) (((x) >> BIT_SHIFT_DDMACH1_DA_8814B) & BIT_MASK_DDMACH1_DA_8814B)
+
 
 
 /* 2 REG_DDMA_CH1CTRL_8814B */
@@ -3776,7 +4109,8 @@
 #define BIT_SHIFT_DDMACH1_DLEN_8814B 0
 #define BIT_MASK_DDMACH1_DLEN_8814B 0x3ffff
 #define BIT_DDMACH1_DLEN_8814B(x) (((x) & BIT_MASK_DDMACH1_DLEN_8814B) << BIT_SHIFT_DDMACH1_DLEN_8814B)
-#define BIT_GET_DDMACH1_DLEN_8814B(x) (((x) >> BIT_SHIFT_DDMACH1_DLEN_8814B) & BIT_MASK_DDMACH1_DLEN_8814B)

+#define BIT_GET_DDMACH1_DLEN_8814B(x) (((x) >> BIT_SHIFT_DDMACH1_DLEN_8814B) & BIT_MASK_DDMACH1_DLEN_8814B)
+
 
 
 /* 2 REG_DDMA_CH2SA_8814B */
@@ -3784,7 +4118,8 @@
 #define BIT_SHIFT_DDMACH2_SA_8814B 0
 #define BIT_MASK_DDMACH2_SA_8814B 0xffffffffL
 #define BIT_DDMACH2_SA_8814B(x) (((x) & BIT_MASK_DDMACH2_SA_8814B) << BIT_SHIFT_DDMACH2_SA_8814B)
-#define BIT_GET_DDMACH2_SA_8814B(x) (((x) >> BIT_SHIFT_DDMACH2_SA_8814B) & BIT_MASK_DDMACH2_SA_8814B)

+#define BIT_GET_DDMACH2_SA_8814B(x) (((x) >> BIT_SHIFT_DDMACH2_SA_8814B) & BIT_MASK_DDMACH2_SA_8814B)
+
 
 
 /* 2 REG_DDMA_CH2DA_8814B */
@@ -3792,7 +4127,8 @@
 #define BIT_SHIFT_DDMACH2_DA_8814B 0
 #define BIT_MASK_DDMACH2_DA_8814B 0xffffffffL
 #define BIT_DDMACH2_DA_8814B(x) (((x) & BIT_MASK_DDMACH2_DA_8814B) << BIT_SHIFT_DDMACH2_DA_8814B)
-#define BIT_GET_DDMACH2_DA_8814B(x) (((x) >> BIT_SHIFT_DDMACH2_DA_8814B) & BIT_MASK_DDMACH2_DA_8814B)

+#define BIT_GET_DDMACH2_DA_8814B(x) (((x) >> BIT_SHIFT_DDMACH2_DA_8814B) & BIT_MASK_DDMACH2_DA_8814B)
+
 
 
 /* 2 REG_DDMA_CH2CTRL_8814B */
@@ -3807,7 +4143,8 @@
 #define BIT_SHIFT_DDMACH2_DLEN_8814B 0
 #define BIT_MASK_DDMACH2_DLEN_8814B 0x3ffff
 #define BIT_DDMACH2_DLEN_8814B(x) (((x) & BIT_MASK_DDMACH2_DLEN_8814B) << BIT_SHIFT_DDMACH2_DLEN_8814B)
-#define BIT_GET_DDMACH2_DLEN_8814B(x) (((x) >> BIT_SHIFT_DDMACH2_DLEN_8814B) & BIT_MASK_DDMACH2_DLEN_8814B)

+#define BIT_GET_DDMACH2_DLEN_8814B(x) (((x) >> BIT_SHIFT_DDMACH2_DLEN_8814B) & BIT_MASK_DDMACH2_DLEN_8814B)
+
 
 
 /* 2 REG_DDMA_CH3SA_8814B */
@@ -3815,7 +4152,8 @@
 #define BIT_SHIFT_DDMACH3_SA_8814B 0
 #define BIT_MASK_DDMACH3_SA_8814B 0xffffffffL
 #define BIT_DDMACH3_SA_8814B(x) (((x) & BIT_MASK_DDMACH3_SA_8814B) << BIT_SHIFT_DDMACH3_SA_8814B)
-#define BIT_GET_DDMACH3_SA_8814B(x) (((x) >> BIT_SHIFT_DDMACH3_SA_8814B) & BIT_MASK_DDMACH3_SA_8814B)

+#define BIT_GET_DDMACH3_SA_8814B(x) (((x) >> BIT_SHIFT_DDMACH3_SA_8814B) & BIT_MASK_DDMACH3_SA_8814B)
+
 
 
 /* 2 REG_DDMA_CH3DA_8814B */
@@ -3823,7 +4161,8 @@
 #define BIT_SHIFT_DDMACH3_DA_8814B 0
 #define BIT_MASK_DDMACH3_DA_8814B 0xffffffffL
 #define BIT_DDMACH3_DA_8814B(x) (((x) & BIT_MASK_DDMACH3_DA_8814B) << BIT_SHIFT_DDMACH3_DA_8814B)
-#define BIT_GET_DDMACH3_DA_8814B(x) (((x) >> BIT_SHIFT_DDMACH3_DA_8814B) & BIT_MASK_DDMACH3_DA_8814B)

+#define BIT_GET_DDMACH3_DA_8814B(x) (((x) >> BIT_SHIFT_DDMACH3_DA_8814B) & BIT_MASK_DDMACH3_DA_8814B)
+
 
 
 /* 2 REG_DDMA_CH3CTRL_8814B */
@@ -3838,7 +4177,8 @@
 #define BIT_SHIFT_DDMACH3_DLEN_8814B 0
 #define BIT_MASK_DDMACH3_DLEN_8814B 0x3ffff
 #define BIT_DDMACH3_DLEN_8814B(x) (((x) & BIT_MASK_DDMACH3_DLEN_8814B) << BIT_SHIFT_DDMACH3_DLEN_8814B)
-#define BIT_GET_DDMACH3_DLEN_8814B(x) (((x) >> BIT_SHIFT_DDMACH3_DLEN_8814B) & BIT_MASK_DDMACH3_DLEN_8814B)

+#define BIT_GET_DDMACH3_DLEN_8814B(x) (((x) >> BIT_SHIFT_DDMACH3_DLEN_8814B) & BIT_MASK_DDMACH3_DLEN_8814B)
+
 
 
 /* 2 REG_DDMA_CH4SA_8814B */
@@ -3846,7 +4186,8 @@
 #define BIT_SHIFT_DDMACH4_SA_8814B 0
 #define BIT_MASK_DDMACH4_SA_8814B 0xffffffffL
 #define BIT_DDMACH4_SA_8814B(x) (((x) & BIT_MASK_DDMACH4_SA_8814B) << BIT_SHIFT_DDMACH4_SA_8814B)
-#define BIT_GET_DDMACH4_SA_8814B(x) (((x) >> BIT_SHIFT_DDMACH4_SA_8814B) & BIT_MASK_DDMACH4_SA_8814B)

+#define BIT_GET_DDMACH4_SA_8814B(x) (((x) >> BIT_SHIFT_DDMACH4_SA_8814B) & BIT_MASK_DDMACH4_SA_8814B)
+
 
 
 /* 2 REG_DDMA_CH4DA_8814B */
@@ -3854,7 +4195,8 @@
 #define BIT_SHIFT_DDMACH4_DA_8814B 0
 #define BIT_MASK_DDMACH4_DA_8814B 0xffffffffL
 #define BIT_DDMACH4_DA_8814B(x) (((x) & BIT_MASK_DDMACH4_DA_8814B) << BIT_SHIFT_DDMACH4_DA_8814B)
-#define BIT_GET_DDMACH4_DA_8814B(x) (((x) >> BIT_SHIFT_DDMACH4_DA_8814B) & BIT_MASK_DDMACH4_DA_8814B)

+#define BIT_GET_DDMACH4_DA_8814B(x) (((x) >> BIT_SHIFT_DDMACH4_DA_8814B) & BIT_MASK_DDMACH4_DA_8814B)
+
 
 
 /* 2 REG_DDMA_CH4CTRL_8814B */
@@ -3869,7 +4211,8 @@
 #define BIT_SHIFT_DDMACH4_DLEN_8814B 0
 #define BIT_MASK_DDMACH4_DLEN_8814B 0x3ffff
 #define BIT_DDMACH4_DLEN_8814B(x) (((x) & BIT_MASK_DDMACH4_DLEN_8814B) << BIT_SHIFT_DDMACH4_DLEN_8814B)
-#define BIT_GET_DDMACH4_DLEN_8814B(x) (((x) >> BIT_SHIFT_DDMACH4_DLEN_8814B) & BIT_MASK_DDMACH4_DLEN_8814B)

+#define BIT_GET_DDMACH4_DLEN_8814B(x) (((x) >> BIT_SHIFT_DDMACH4_DLEN_8814B) & BIT_MASK_DDMACH4_DLEN_8814B)
+
 
 
 /* 2 REG_DDMA_CH5SA_8814B */
@@ -3877,7 +4220,8 @@
 #define BIT_SHIFT_DDMACH5_SA_8814B 0
 #define BIT_MASK_DDMACH5_SA_8814B 0xffffffffL
 #define BIT_DDMACH5_SA_8814B(x) (((x) & BIT_MASK_DDMACH5_SA_8814B) << BIT_SHIFT_DDMACH5_SA_8814B)
-#define BIT_GET_DDMACH5_SA_8814B(x) (((x) >> BIT_SHIFT_DDMACH5_SA_8814B) & BIT_MASK_DDMACH5_SA_8814B)

+#define BIT_GET_DDMACH5_SA_8814B(x) (((x) >> BIT_SHIFT_DDMACH5_SA_8814B) & BIT_MASK_DDMACH5_SA_8814B)
+
 
 
 /* 2 REG_DDMA_CH5DA_8814B */
@@ -3885,7 +4229,8 @@
 #define BIT_SHIFT_DDMACH5_DA_8814B 0
 #define BIT_MASK_DDMACH5_DA_8814B 0xffffffffL
 #define BIT_DDMACH5_DA_8814B(x) (((x) & BIT_MASK_DDMACH5_DA_8814B) << BIT_SHIFT_DDMACH5_DA_8814B)
-#define BIT_GET_DDMACH5_DA_8814B(x) (((x) >> BIT_SHIFT_DDMACH5_DA_8814B) & BIT_MASK_DDMACH5_DA_8814B)

+#define BIT_GET_DDMACH5_DA_8814B(x) (((x) >> BIT_SHIFT_DDMACH5_DA_8814B) & BIT_MASK_DDMACH5_DA_8814B)
+
 
 
 /* 2 REG_DDMA_CH5CTRL_8814B */
@@ -3900,7 +4245,8 @@
 #define BIT_SHIFT_DDMACH5_DLEN_8814B 0
 #define BIT_MASK_DDMACH5_DLEN_8814B 0x3ffff
 #define BIT_DDMACH5_DLEN_8814B(x) (((x) & BIT_MASK_DDMACH5_DLEN_8814B) << BIT_SHIFT_DDMACH5_DLEN_8814B)
-#define BIT_GET_DDMACH5_DLEN_8814B(x) (((x) >> BIT_SHIFT_DDMACH5_DLEN_8814B) & BIT_MASK_DDMACH5_DLEN_8814B)

+#define BIT_GET_DDMACH5_DLEN_8814B(x) (((x) >> BIT_SHIFT_DDMACH5_DLEN_8814B) & BIT_MASK_DDMACH5_DLEN_8814B)
+
 
 
 /* 2 REG_DDMA_INT_MSK_8814B */
@@ -3924,7 +4270,8 @@
 #define BIT_SHIFT_IDDMA0_CHKSUM_8814B 0
 #define BIT_MASK_IDDMA0_CHKSUM_8814B 0xffff
 #define BIT_IDDMA0_CHKSUM_8814B(x) (((x) & BIT_MASK_IDDMA0_CHKSUM_8814B) << BIT_SHIFT_IDDMA0_CHKSUM_8814B)
-#define BIT_GET_IDDMA0_CHKSUM_8814B(x) (((x) >> BIT_SHIFT_IDDMA0_CHKSUM_8814B) & BIT_MASK_IDDMA0_CHKSUM_8814B)

+#define BIT_GET_IDDMA0_CHKSUM_8814B(x) (((x) >> BIT_SHIFT_IDDMA0_CHKSUM_8814B) & BIT_MASK_IDDMA0_CHKSUM_8814B)
+
 
 
 /* 2 REG_DDMA_MONITOR_8814B */
@@ -3946,14 +4293,16 @@
 #define BIT_SHIFT_PCIE_MAX_RXDMA_8814B 28
 #define BIT_MASK_PCIE_MAX_RXDMA_8814B 0x7
 #define BIT_PCIE_MAX_RXDMA_8814B(x) (((x) & BIT_MASK_PCIE_MAX_RXDMA_8814B) << BIT_SHIFT_PCIE_MAX_RXDMA_8814B)
-#define BIT_GET_PCIE_MAX_RXDMA_8814B(x) (((x) >> BIT_SHIFT_PCIE_MAX_RXDMA_8814B) & BIT_MASK_PCIE_MAX_RXDMA_8814B)

+#define BIT_GET_PCIE_MAX_RXDMA_8814B(x) (((x) >> BIT_SHIFT_PCIE_MAX_RXDMA_8814B) & BIT_MASK_PCIE_MAX_RXDMA_8814B)
+
 
 #define BIT_MULRW_8814B BIT(27)
 
 #define BIT_SHIFT_PCIE_MAX_TXDMA_8814B 24
 #define BIT_MASK_PCIE_MAX_TXDMA_8814B 0x7
 #define BIT_PCIE_MAX_TXDMA_8814B(x) (((x) & BIT_MASK_PCIE_MAX_TXDMA_8814B) << BIT_SHIFT_PCIE_MAX_TXDMA_8814B)
-#define BIT_GET_PCIE_MAX_TXDMA_8814B(x) (((x) >> BIT_SHIFT_PCIE_MAX_TXDMA_8814B) & BIT_MASK_PCIE_MAX_TXDMA_8814B)

+#define BIT_GET_PCIE_MAX_TXDMA_8814B(x) (((x) >> BIT_SHIFT_PCIE_MAX_TXDMA_8814B) & BIT_MASK_PCIE_MAX_TXDMA_8814B)
+
 
 #define BIT_EN_CPL_TIMEOUT_PS_8814B BIT(22)
 #define BIT_REG_TXDMA_FAIL_PS_8814B BIT(21)
@@ -3984,31 +4333,36 @@
 #define BIT_SHIFT_TXTTIMER_MATCH_NUM_8814B 28
 #define BIT_MASK_TXTTIMER_MATCH_NUM_8814B 0xf
 #define BIT_TXTTIMER_MATCH_NUM_8814B(x) (((x) & BIT_MASK_TXTTIMER_MATCH_NUM_8814B) << BIT_SHIFT_TXTTIMER_MATCH_NUM_8814B)
-#define BIT_GET_TXTTIMER_MATCH_NUM_8814B(x) (((x) >> BIT_SHIFT_TXTTIMER_MATCH_NUM_8814B) & BIT_MASK_TXTTIMER_MATCH_NUM_8814B)

+#define BIT_GET_TXTTIMER_MATCH_NUM_8814B(x) (((x) >> BIT_SHIFT_TXTTIMER_MATCH_NUM_8814B) & BIT_MASK_TXTTIMER_MATCH_NUM_8814B)
+
 
 
 #define BIT_SHIFT_TXPKT_NUM_MATCH_8814B 24
 #define BIT_MASK_TXPKT_NUM_MATCH_8814B 0xf
 #define BIT_TXPKT_NUM_MATCH_8814B(x) (((x) & BIT_MASK_TXPKT_NUM_MATCH_8814B) << BIT_SHIFT_TXPKT_NUM_MATCH_8814B)
-#define BIT_GET_TXPKT_NUM_MATCH_8814B(x) (((x) >> BIT_SHIFT_TXPKT_NUM_MATCH_8814B) & BIT_MASK_TXPKT_NUM_MATCH_8814B)

+#define BIT_GET_TXPKT_NUM_MATCH_8814B(x) (((x) >> BIT_SHIFT_TXPKT_NUM_MATCH_8814B) & BIT_MASK_TXPKT_NUM_MATCH_8814B)
+
 
 
 #define BIT_SHIFT_RXTTIMER_MATCH_NUM_8814B 20
 #define BIT_MASK_RXTTIMER_MATCH_NUM_8814B 0xf
 #define BIT_RXTTIMER_MATCH_NUM_8814B(x) (((x) & BIT_MASK_RXTTIMER_MATCH_NUM_8814B) << BIT_SHIFT_RXTTIMER_MATCH_NUM_8814B)
-#define BIT_GET_RXTTIMER_MATCH_NUM_8814B(x) (((x) >> BIT_SHIFT_RXTTIMER_MATCH_NUM_8814B) & BIT_MASK_RXTTIMER_MATCH_NUM_8814B)

+#define BIT_GET_RXTTIMER_MATCH_NUM_8814B(x) (((x) >> BIT_SHIFT_RXTTIMER_MATCH_NUM_8814B) & BIT_MASK_RXTTIMER_MATCH_NUM_8814B)
+
 
 
 #define BIT_SHIFT_RXPKT_NUM_MATCH_8814B 16
 #define BIT_MASK_RXPKT_NUM_MATCH_8814B 0xf
 #define BIT_RXPKT_NUM_MATCH_8814B(x) (((x) & BIT_MASK_RXPKT_NUM_MATCH_8814B) << BIT_SHIFT_RXPKT_NUM_MATCH_8814B)
-#define BIT_GET_RXPKT_NUM_MATCH_8814B(x) (((x) >> BIT_SHIFT_RXPKT_NUM_MATCH_8814B) & BIT_MASK_RXPKT_NUM_MATCH_8814B)

+#define BIT_GET_RXPKT_NUM_MATCH_8814B(x) (((x) >> BIT_SHIFT_RXPKT_NUM_MATCH_8814B) & BIT_MASK_RXPKT_NUM_MATCH_8814B)
+
 
 
 #define BIT_SHIFT_MIGRATE_TIMER_8814B 0
 #define BIT_MASK_MIGRATE_TIMER_8814B 0xffff
 #define BIT_MIGRATE_TIMER_8814B(x) (((x) & BIT_MASK_MIGRATE_TIMER_8814B) << BIT_SHIFT_MIGRATE_TIMER_8814B)
-#define BIT_GET_MIGRATE_TIMER_8814B(x) (((x) >> BIT_SHIFT_MIGRATE_TIMER_8814B) & BIT_MASK_MIGRATE_TIMER_8814B)

+#define BIT_GET_MIGRATE_TIMER_8814B(x) (((x) >> BIT_SHIFT_MIGRATE_TIMER_8814B) & BIT_MASK_MIGRATE_TIMER_8814B)
+
 
 
 /* 2 REG_BCNQ_TXBD_DESA_8814B */
@@ -4016,7 +4370,8 @@
 #define BIT_SHIFT_BCNQ_TXBD_DESA_8814B 0
 #define BIT_MASK_BCNQ_TXBD_DESA_8814B 0xffffffffffffffffL
 #define BIT_BCNQ_TXBD_DESA_8814B(x) (((x) & BIT_MASK_BCNQ_TXBD_DESA_8814B) << BIT_SHIFT_BCNQ_TXBD_DESA_8814B)
-#define BIT_GET_BCNQ_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_BCNQ_TXBD_DESA_8814B) & BIT_MASK_BCNQ_TXBD_DESA_8814B)

+#define BIT_GET_BCNQ_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_BCNQ_TXBD_DESA_8814B) & BIT_MASK_BCNQ_TXBD_DESA_8814B)
+
 
 
 /* 2 REG_MGQ_TXBD_DESA_8814B */
@@ -4024,7 +4379,8 @@
 #define BIT_SHIFT_MGQ_TXBD_DESA_8814B 0
 #define BIT_MASK_MGQ_TXBD_DESA_8814B 0xffffffffffffffffL
 #define BIT_MGQ_TXBD_DESA_8814B(x) (((x) & BIT_MASK_MGQ_TXBD_DESA_8814B) << BIT_SHIFT_MGQ_TXBD_DESA_8814B)
-#define BIT_GET_MGQ_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_MGQ_TXBD_DESA_8814B) & BIT_MASK_MGQ_TXBD_DESA_8814B)

+#define BIT_GET_MGQ_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_MGQ_TXBD_DESA_8814B) & BIT_MASK_MGQ_TXBD_DESA_8814B)
+
 
 
 /* 2 REG_VOQ_TXBD_DESA_8814B */
@@ -4032,7 +4388,8 @@
 #define BIT_SHIFT_VOQ_TXBD_DESA_8814B 0
 #define BIT_MASK_VOQ_TXBD_DESA_8814B 0xffffffffffffffffL
 #define BIT_VOQ_TXBD_DESA_8814B(x) (((x) & BIT_MASK_VOQ_TXBD_DESA_8814B) << BIT_SHIFT_VOQ_TXBD_DESA_8814B)
-#define BIT_GET_VOQ_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_VOQ_TXBD_DESA_8814B) & BIT_MASK_VOQ_TXBD_DESA_8814B)

+#define BIT_GET_VOQ_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_VOQ_TXBD_DESA_8814B) & BIT_MASK_VOQ_TXBD_DESA_8814B)
+
 
 
 /* 2 REG_VIQ_TXBD_DESA_8814B */
@@ -4040,7 +4397,8 @@
 #define BIT_SHIFT_VIQ_TXBD_DESA_8814B 0
 #define BIT_MASK_VIQ_TXBD_DESA_8814B 0xffffffffffffffffL
 #define BIT_VIQ_TXBD_DESA_8814B(x) (((x) & BIT_MASK_VIQ_TXBD_DESA_8814B) << BIT_SHIFT_VIQ_TXBD_DESA_8814B)
-#define BIT_GET_VIQ_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_VIQ_TXBD_DESA_8814B) & BIT_MASK_VIQ_TXBD_DESA_8814B)

+#define BIT_GET_VIQ_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_VIQ_TXBD_DESA_8814B) & BIT_MASK_VIQ_TXBD_DESA_8814B)
+
 
 
 /* 2 REG_BEQ_TXBD_DESA_8814B */
@@ -4048,7 +4406,8 @@
 #define BIT_SHIFT_BEQ_TXBD_DESA_8814B 0
 #define BIT_MASK_BEQ_TXBD_DESA_8814B 0xffffffffffffffffL
 #define BIT_BEQ_TXBD_DESA_8814B(x) (((x) & BIT_MASK_BEQ_TXBD_DESA_8814B) << BIT_SHIFT_BEQ_TXBD_DESA_8814B)
-#define BIT_GET_BEQ_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_BEQ_TXBD_DESA_8814B) & BIT_MASK_BEQ_TXBD_DESA_8814B)

+#define BIT_GET_BEQ_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_BEQ_TXBD_DESA_8814B) & BIT_MASK_BEQ_TXBD_DESA_8814B)
+
 
 
 /* 2 REG_BKQ_TXBD_DESA_8814B */
@@ -4056,7 +4415,8 @@
 #define BIT_SHIFT_BKQ_TXBD_DESA_8814B 0
 #define BIT_MASK_BKQ_TXBD_DESA_8814B 0xffffffffffffffffL
 #define BIT_BKQ_TXBD_DESA_8814B(x) (((x) & BIT_MASK_BKQ_TXBD_DESA_8814B) << BIT_SHIFT_BKQ_TXBD_DESA_8814B)
-#define BIT_GET_BKQ_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_BKQ_TXBD_DESA_8814B) & BIT_MASK_BKQ_TXBD_DESA_8814B)

+#define BIT_GET_BKQ_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_BKQ_TXBD_DESA_8814B) & BIT_MASK_BKQ_TXBD_DESA_8814B)
+
 
 
 /* 2 REG_RXQ_RXBD_DESA_8814B */
@@ -4064,7 +4424,8 @@
 #define BIT_SHIFT_RXQ_RXBD_DESA_8814B 0
 #define BIT_MASK_RXQ_RXBD_DESA_8814B 0xffffffffffffffffL
 #define BIT_RXQ_RXBD_DESA_8814B(x) (((x) & BIT_MASK_RXQ_RXBD_DESA_8814B) << BIT_SHIFT_RXQ_RXBD_DESA_8814B)
-#define BIT_GET_RXQ_RXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_RXQ_RXBD_DESA_8814B) & BIT_MASK_RXQ_RXBD_DESA_8814B)

+#define BIT_GET_RXQ_RXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_RXQ_RXBD_DESA_8814B) & BIT_MASK_RXQ_RXBD_DESA_8814B)
+
 
 
 /* 2 REG_HI0Q_TXBD_DESA_8814B */
@@ -4072,7 +4433,8 @@
 #define BIT_SHIFT_HI0Q_TXBD_DESA_8814B 0
 #define BIT_MASK_HI0Q_TXBD_DESA_8814B 0xffffffffffffffffL
 #define BIT_HI0Q_TXBD_DESA_8814B(x) (((x) & BIT_MASK_HI0Q_TXBD_DESA_8814B) << BIT_SHIFT_HI0Q_TXBD_DESA_8814B)
-#define BIT_GET_HI0Q_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_HI0Q_TXBD_DESA_8814B) & BIT_MASK_HI0Q_TXBD_DESA_8814B)

+#define BIT_GET_HI0Q_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_HI0Q_TXBD_DESA_8814B) & BIT_MASK_HI0Q_TXBD_DESA_8814B)
+
 
 
 /* 2 REG_HI1Q_TXBD_DESA_8814B */
@@ -4080,7 +4442,8 @@
 #define BIT_SHIFT_HI1Q_TXBD_DESA_8814B 0
 #define BIT_MASK_HI1Q_TXBD_DESA_8814B 0xffffffffffffffffL
 #define BIT_HI1Q_TXBD_DESA_8814B(x) (((x) & BIT_MASK_HI1Q_TXBD_DESA_8814B) << BIT_SHIFT_HI1Q_TXBD_DESA_8814B)
-#define BIT_GET_HI1Q_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_HI1Q_TXBD_DESA_8814B) & BIT_MASK_HI1Q_TXBD_DESA_8814B)

+#define BIT_GET_HI1Q_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_HI1Q_TXBD_DESA_8814B) & BIT_MASK_HI1Q_TXBD_DESA_8814B)
+
 
 
 /* 2 REG_HI2Q_TXBD_DESA_8814B */
@@ -4088,7 +4451,8 @@
 #define BIT_SHIFT_HI2Q_TXBD_DESA_8814B 0
 #define BIT_MASK_HI2Q_TXBD_DESA_8814B 0xffffffffffffffffL
 #define BIT_HI2Q_TXBD_DESA_8814B(x) (((x) & BIT_MASK_HI2Q_TXBD_DESA_8814B) << BIT_SHIFT_HI2Q_TXBD_DESA_8814B)
-#define BIT_GET_HI2Q_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_HI2Q_TXBD_DESA_8814B) & BIT_MASK_HI2Q_TXBD_DESA_8814B)

+#define BIT_GET_HI2Q_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_HI2Q_TXBD_DESA_8814B) & BIT_MASK_HI2Q_TXBD_DESA_8814B)
+
 
 
 /* 2 REG_HI3Q_TXBD_DESA_8814B */
@@ -4096,7 +4460,8 @@
 #define BIT_SHIFT_HI3Q_TXBD_DESA_8814B 0
 #define BIT_MASK_HI3Q_TXBD_DESA_8814B 0xffffffffffffffffL
 #define BIT_HI3Q_TXBD_DESA_8814B(x) (((x) & BIT_MASK_HI3Q_TXBD_DESA_8814B) << BIT_SHIFT_HI3Q_TXBD_DESA_8814B)
-#define BIT_GET_HI3Q_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_HI3Q_TXBD_DESA_8814B) & BIT_MASK_HI3Q_TXBD_DESA_8814B)

+#define BIT_GET_HI3Q_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_HI3Q_TXBD_DESA_8814B) & BIT_MASK_HI3Q_TXBD_DESA_8814B)
+
 
 
 /* 2 REG_HI4Q_TXBD_DESA_8814B */
@@ -4104,7 +4469,8 @@
 #define BIT_SHIFT_HI4Q_TXBD_DESA_8814B 0
 #define BIT_MASK_HI4Q_TXBD_DESA_8814B 0xffffffffffffffffL
 #define BIT_HI4Q_TXBD_DESA_8814B(x) (((x) & BIT_MASK_HI4Q_TXBD_DESA_8814B) << BIT_SHIFT_HI4Q_TXBD_DESA_8814B)
-#define BIT_GET_HI4Q_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_HI4Q_TXBD_DESA_8814B) & BIT_MASK_HI4Q_TXBD_DESA_8814B)

+#define BIT_GET_HI4Q_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_HI4Q_TXBD_DESA_8814B) & BIT_MASK_HI4Q_TXBD_DESA_8814B)
+
 
 
 /* 2 REG_HI5Q_TXBD_DESA_8814B */
@@ -4112,7 +4478,8 @@
 #define BIT_SHIFT_HI5Q_TXBD_DESA_8814B 0
 #define BIT_MASK_HI5Q_TXBD_DESA_8814B 0xffffffffffffffffL
 #define BIT_HI5Q_TXBD_DESA_8814B(x) (((x) & BIT_MASK_HI5Q_TXBD_DESA_8814B) << BIT_SHIFT_HI5Q_TXBD_DESA_8814B)
-#define BIT_GET_HI5Q_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_HI5Q_TXBD_DESA_8814B) & BIT_MASK_HI5Q_TXBD_DESA_8814B)

+#define BIT_GET_HI5Q_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_HI5Q_TXBD_DESA_8814B) & BIT_MASK_HI5Q_TXBD_DESA_8814B)
+
 
 
 /* 2 REG_HI6Q_TXBD_DESA_8814B */
@@ -4120,7 +4487,8 @@
 #define BIT_SHIFT_HI6Q_TXBD_DESA_8814B 0
 #define BIT_MASK_HI6Q_TXBD_DESA_8814B 0xffffffffffffffffL
 #define BIT_HI6Q_TXBD_DESA_8814B(x) (((x) & BIT_MASK_HI6Q_TXBD_DESA_8814B) << BIT_SHIFT_HI6Q_TXBD_DESA_8814B)
-#define BIT_GET_HI6Q_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_HI6Q_TXBD_DESA_8814B) & BIT_MASK_HI6Q_TXBD_DESA_8814B)

+#define BIT_GET_HI6Q_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_HI6Q_TXBD_DESA_8814B) & BIT_MASK_HI6Q_TXBD_DESA_8814B)
+
 
 
 /* 2 REG_HI7Q_TXBD_DESA_8814B */
@@ -4128,7 +4496,8 @@
 #define BIT_SHIFT_HI7Q_TXBD_DESA_8814B 0
 #define BIT_MASK_HI7Q_TXBD_DESA_8814B 0xffffffffffffffffL
 #define BIT_HI7Q_TXBD_DESA_8814B(x) (((x) & BIT_MASK_HI7Q_TXBD_DESA_8814B) << BIT_SHIFT_HI7Q_TXBD_DESA_8814B)
-#define BIT_GET_HI7Q_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_HI7Q_TXBD_DESA_8814B) & BIT_MASK_HI7Q_TXBD_DESA_8814B)

+#define BIT_GET_HI7Q_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_HI7Q_TXBD_DESA_8814B) & BIT_MASK_HI7Q_TXBD_DESA_8814B)
+
 
 
 /* 2 REG_MGQ_TXBD_NUM_8814B */
@@ -4137,13 +4506,15 @@
 #define BIT_SHIFT_MGQ_DESC_MODE_8814B 12
 #define BIT_MASK_MGQ_DESC_MODE_8814B 0x3
 #define BIT_MGQ_DESC_MODE_8814B(x) (((x) & BIT_MASK_MGQ_DESC_MODE_8814B) << BIT_SHIFT_MGQ_DESC_MODE_8814B)
-#define BIT_GET_MGQ_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_MGQ_DESC_MODE_8814B) & BIT_MASK_MGQ_DESC_MODE_8814B)

+#define BIT_GET_MGQ_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_MGQ_DESC_MODE_8814B) & BIT_MASK_MGQ_DESC_MODE_8814B)
+
 
 
 #define BIT_SHIFT_MGQ_DESC_NUM_8814B 0
 #define BIT_MASK_MGQ_DESC_NUM_8814B 0xfff
 #define BIT_MGQ_DESC_NUM_8814B(x) (((x) & BIT_MASK_MGQ_DESC_NUM_8814B) << BIT_SHIFT_MGQ_DESC_NUM_8814B)
-#define BIT_GET_MGQ_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_MGQ_DESC_NUM_8814B) & BIT_MASK_MGQ_DESC_NUM_8814B)

+#define BIT_GET_MGQ_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_MGQ_DESC_NUM_8814B) & BIT_MASK_MGQ_DESC_NUM_8814B)
+
 
 
 /* 2 REG_RX_RXBD_NUM_8814B */
@@ -4152,14 +4523,16 @@
 #define BIT_SHIFT_BCNQ_DESC_MODE_8814B 13
 #define BIT_MASK_BCNQ_DESC_MODE_8814B 0x3
 #define BIT_BCNQ_DESC_MODE_8814B(x) (((x) & BIT_MASK_BCNQ_DESC_MODE_8814B) << BIT_SHIFT_BCNQ_DESC_MODE_8814B)
-#define BIT_GET_BCNQ_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_BCNQ_DESC_MODE_8814B) & BIT_MASK_BCNQ_DESC_MODE_8814B)

+#define BIT_GET_BCNQ_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_BCNQ_DESC_MODE_8814B) & BIT_MASK_BCNQ_DESC_MODE_8814B)
+
 
 #define BIT_PCIE_BCNQ_FLAG_8814B BIT(12)
 
 #define BIT_SHIFT_RXQ_DESC_NUM_8814B 0
 #define BIT_MASK_RXQ_DESC_NUM_8814B 0xfff
 #define BIT_RXQ_DESC_NUM_8814B(x) (((x) & BIT_MASK_RXQ_DESC_NUM_8814B) << BIT_SHIFT_RXQ_DESC_NUM_8814B)
-#define BIT_GET_RXQ_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_RXQ_DESC_NUM_8814B) & BIT_MASK_RXQ_DESC_NUM_8814B)

+#define BIT_GET_RXQ_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_RXQ_DESC_NUM_8814B) & BIT_MASK_RXQ_DESC_NUM_8814B)
+
 
 
 /* 2 REG_VOQ_TXBD_NUM_8814B */
@@ -4168,13 +4541,15 @@
 #define BIT_SHIFT_VOQ_DESC_MODE_8814B 12
 #define BIT_MASK_VOQ_DESC_MODE_8814B 0x3
 #define BIT_VOQ_DESC_MODE_8814B(x) (((x) & BIT_MASK_VOQ_DESC_MODE_8814B) << BIT_SHIFT_VOQ_DESC_MODE_8814B)
-#define BIT_GET_VOQ_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_VOQ_DESC_MODE_8814B) & BIT_MASK_VOQ_DESC_MODE_8814B)

+#define BIT_GET_VOQ_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_VOQ_DESC_MODE_8814B) & BIT_MASK_VOQ_DESC_MODE_8814B)
+
 
 
 #define BIT_SHIFT_VOQ_DESC_NUM_8814B 0
 #define BIT_MASK_VOQ_DESC_NUM_8814B 0xfff
 #define BIT_VOQ_DESC_NUM_8814B(x) (((x) & BIT_MASK_VOQ_DESC_NUM_8814B) << BIT_SHIFT_VOQ_DESC_NUM_8814B)
-#define BIT_GET_VOQ_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_VOQ_DESC_NUM_8814B) & BIT_MASK_VOQ_DESC_NUM_8814B)

+#define BIT_GET_VOQ_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_VOQ_DESC_NUM_8814B) & BIT_MASK_VOQ_DESC_NUM_8814B)
+
 
 
 /* 2 REG_VIQ_TXBD_NUM_8814B */
@@ -4183,13 +4558,15 @@
 #define BIT_SHIFT_VIQ_DESC_MODE_8814B 12
 #define BIT_MASK_VIQ_DESC_MODE_8814B 0x3
 #define BIT_VIQ_DESC_MODE_8814B(x) (((x) & BIT_MASK_VIQ_DESC_MODE_8814B) << BIT_SHIFT_VIQ_DESC_MODE_8814B)
-#define BIT_GET_VIQ_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_VIQ_DESC_MODE_8814B) & BIT_MASK_VIQ_DESC_MODE_8814B)

+#define BIT_GET_VIQ_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_VIQ_DESC_MODE_8814B) & BIT_MASK_VIQ_DESC_MODE_8814B)
+
 
 
 #define BIT_SHIFT_VIQ_DESC_NUM_8814B 0
 #define BIT_MASK_VIQ_DESC_NUM_8814B 0xfff
 #define BIT_VIQ_DESC_NUM_8814B(x) (((x) & BIT_MASK_VIQ_DESC_NUM_8814B) << BIT_SHIFT_VIQ_DESC_NUM_8814B)
-#define BIT_GET_VIQ_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_VIQ_DESC_NUM_8814B) & BIT_MASK_VIQ_DESC_NUM_8814B)

+#define BIT_GET_VIQ_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_VIQ_DESC_NUM_8814B) & BIT_MASK_VIQ_DESC_NUM_8814B)
+
 
 
 /* 2 REG_BEQ_TXBD_NUM_8814B */
@@ -4198,13 +4575,15 @@
 #define BIT_SHIFT_BEQ_DESC_MODE_8814B 12
 #define BIT_MASK_BEQ_DESC_MODE_8814B 0x3
 #define BIT_BEQ_DESC_MODE_8814B(x) (((x) & BIT_MASK_BEQ_DESC_MODE_8814B) << BIT_SHIFT_BEQ_DESC_MODE_8814B)
-#define BIT_GET_BEQ_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_BEQ_DESC_MODE_8814B) & BIT_MASK_BEQ_DESC_MODE_8814B)

+#define BIT_GET_BEQ_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_BEQ_DESC_MODE_8814B) & BIT_MASK_BEQ_DESC_MODE_8814B)
+
 
 
 #define BIT_SHIFT_BEQ_DESC_NUM_8814B 0
 #define BIT_MASK_BEQ_DESC_NUM_8814B 0xfff
 #define BIT_BEQ_DESC_NUM_8814B(x) (((x) & BIT_MASK_BEQ_DESC_NUM_8814B) << BIT_SHIFT_BEQ_DESC_NUM_8814B)
-#define BIT_GET_BEQ_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_BEQ_DESC_NUM_8814B) & BIT_MASK_BEQ_DESC_NUM_8814B)

+#define BIT_GET_BEQ_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_BEQ_DESC_NUM_8814B) & BIT_MASK_BEQ_DESC_NUM_8814B)
+
 
 
 /* 2 REG_BKQ_TXBD_NUM_8814B */
@@ -4213,13 +4592,15 @@
 #define BIT_SHIFT_BKQ_DESC_MODE_8814B 12
 #define BIT_MASK_BKQ_DESC_MODE_8814B 0x3
 #define BIT_BKQ_DESC_MODE_8814B(x) (((x) & BIT_MASK_BKQ_DESC_MODE_8814B) << BIT_SHIFT_BKQ_DESC_MODE_8814B)
-#define BIT_GET_BKQ_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_BKQ_DESC_MODE_8814B) & BIT_MASK_BKQ_DESC_MODE_8814B)

+#define BIT_GET_BKQ_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_BKQ_DESC_MODE_8814B) & BIT_MASK_BKQ_DESC_MODE_8814B)
+
 
 
 #define BIT_SHIFT_BKQ_DESC_NUM_8814B 0
 #define BIT_MASK_BKQ_DESC_NUM_8814B 0xfff
 #define BIT_BKQ_DESC_NUM_8814B(x) (((x) & BIT_MASK_BKQ_DESC_NUM_8814B) << BIT_SHIFT_BKQ_DESC_NUM_8814B)
-#define BIT_GET_BKQ_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_BKQ_DESC_NUM_8814B) & BIT_MASK_BKQ_DESC_NUM_8814B)

+#define BIT_GET_BKQ_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_BKQ_DESC_NUM_8814B) & BIT_MASK_BKQ_DESC_NUM_8814B)
+
 
 
 /* 2 REG_HI0Q_TXBD_NUM_8814B */
@@ -4228,13 +4609,15 @@
 #define BIT_SHIFT_HI0Q_DESC_MODE_8814B 12
 #define BIT_MASK_HI0Q_DESC_MODE_8814B 0x3
 #define BIT_HI0Q_DESC_MODE_8814B(x) (((x) & BIT_MASK_HI0Q_DESC_MODE_8814B) << BIT_SHIFT_HI0Q_DESC_MODE_8814B)
-#define BIT_GET_HI0Q_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_HI0Q_DESC_MODE_8814B) & BIT_MASK_HI0Q_DESC_MODE_8814B)

+#define BIT_GET_HI0Q_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_HI0Q_DESC_MODE_8814B) & BIT_MASK_HI0Q_DESC_MODE_8814B)
+
 
 
 #define BIT_SHIFT_HI0Q_DESC_NUM_8814B 0
 #define BIT_MASK_HI0Q_DESC_NUM_8814B 0xfff
 #define BIT_HI0Q_DESC_NUM_8814B(x) (((x) & BIT_MASK_HI0Q_DESC_NUM_8814B) << BIT_SHIFT_HI0Q_DESC_NUM_8814B)
-#define BIT_GET_HI0Q_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_HI0Q_DESC_NUM_8814B) & BIT_MASK_HI0Q_DESC_NUM_8814B)

+#define BIT_GET_HI0Q_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_HI0Q_DESC_NUM_8814B) & BIT_MASK_HI0Q_DESC_NUM_8814B)
+
 
 
 /* 2 REG_HI1Q_TXBD_NUM_8814B */
@@ -4243,13 +4626,15 @@
 #define BIT_SHIFT_HI1Q_DESC_MODE_8814B 12
 #define BIT_MASK_HI1Q_DESC_MODE_8814B 0x3
 #define BIT_HI1Q_DESC_MODE_8814B(x) (((x) & BIT_MASK_HI1Q_DESC_MODE_8814B) << BIT_SHIFT_HI1Q_DESC_MODE_8814B)
-#define BIT_GET_HI1Q_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_HI1Q_DESC_MODE_8814B) & BIT_MASK_HI1Q_DESC_MODE_8814B)

+#define BIT_GET_HI1Q_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_HI1Q_DESC_MODE_8814B) & BIT_MASK_HI1Q_DESC_MODE_8814B)
+
 
 
 #define BIT_SHIFT_HI1Q_DESC_NUM_8814B 0
 #define BIT_MASK_HI1Q_DESC_NUM_8814B 0xfff
 #define BIT_HI1Q_DESC_NUM_8814B(x) (((x) & BIT_MASK_HI1Q_DESC_NUM_8814B) << BIT_SHIFT_HI1Q_DESC_NUM_8814B)
-#define BIT_GET_HI1Q_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_HI1Q_DESC_NUM_8814B) & BIT_MASK_HI1Q_DESC_NUM_8814B)

+#define BIT_GET_HI1Q_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_HI1Q_DESC_NUM_8814B) & BIT_MASK_HI1Q_DESC_NUM_8814B)
+
 
 
 /* 2 REG_HI2Q_TXBD_NUM_8814B */
@@ -4258,13 +4643,15 @@
 #define BIT_SHIFT_HI2Q_DESC_MODE_8814B 12
 #define BIT_MASK_HI2Q_DESC_MODE_8814B 0x3
 #define BIT_HI2Q_DESC_MODE_8814B(x) (((x) & BIT_MASK_HI2Q_DESC_MODE_8814B) << BIT_SHIFT_HI2Q_DESC_MODE_8814B)
-#define BIT_GET_HI2Q_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_HI2Q_DESC_MODE_8814B) & BIT_MASK_HI2Q_DESC_MODE_8814B)

+#define BIT_GET_HI2Q_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_HI2Q_DESC_MODE_8814B) & BIT_MASK_HI2Q_DESC_MODE_8814B)
+
 
 
 #define BIT_SHIFT_HI2Q_DESC_NUM_8814B 0
 #define BIT_MASK_HI2Q_DESC_NUM_8814B 0xfff
 #define BIT_HI2Q_DESC_NUM_8814B(x) (((x) & BIT_MASK_HI2Q_DESC_NUM_8814B) << BIT_SHIFT_HI2Q_DESC_NUM_8814B)
-#define BIT_GET_HI2Q_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_HI2Q_DESC_NUM_8814B) & BIT_MASK_HI2Q_DESC_NUM_8814B)

+#define BIT_GET_HI2Q_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_HI2Q_DESC_NUM_8814B) & BIT_MASK_HI2Q_DESC_NUM_8814B)
+
 
 
 /* 2 REG_HI3Q_TXBD_NUM_8814B */
@@ -4273,13 +4660,15 @@
 #define BIT_SHIFT_HI3Q_DESC_MODE_8814B 12
 #define BIT_MASK_HI3Q_DESC_MODE_8814B 0x3
 #define BIT_HI3Q_DESC_MODE_8814B(x) (((x) & BIT_MASK_HI3Q_DESC_MODE_8814B) << BIT_SHIFT_HI3Q_DESC_MODE_8814B)
-#define BIT_GET_HI3Q_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_HI3Q_DESC_MODE_8814B) & BIT_MASK_HI3Q_DESC_MODE_8814B)

+#define BIT_GET_HI3Q_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_HI3Q_DESC_MODE_8814B) & BIT_MASK_HI3Q_DESC_MODE_8814B)
+
 
 
 #define BIT_SHIFT_HI3Q_DESC_NUM_8814B 0
 #define BIT_MASK_HI3Q_DESC_NUM_8814B 0xfff
 #define BIT_HI3Q_DESC_NUM_8814B(x) (((x) & BIT_MASK_HI3Q_DESC_NUM_8814B) << BIT_SHIFT_HI3Q_DESC_NUM_8814B)
-#define BIT_GET_HI3Q_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_HI3Q_DESC_NUM_8814B) & BIT_MASK_HI3Q_DESC_NUM_8814B)

+#define BIT_GET_HI3Q_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_HI3Q_DESC_NUM_8814B) & BIT_MASK_HI3Q_DESC_NUM_8814B)
+
 
 
 /* 2 REG_HI4Q_TXBD_NUM_8814B */
@@ -4288,13 +4677,15 @@
 #define BIT_SHIFT_HI4Q_DESC_MODE_8814B 12
 #define BIT_MASK_HI4Q_DESC_MODE_8814B 0x3
 #define BIT_HI4Q_DESC_MODE_8814B(x) (((x) & BIT_MASK_HI4Q_DESC_MODE_8814B) << BIT_SHIFT_HI4Q_DESC_MODE_8814B)
-#define BIT_GET_HI4Q_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_HI4Q_DESC_MODE_8814B) & BIT_MASK_HI4Q_DESC_MODE_8814B)

+#define BIT_GET_HI4Q_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_HI4Q_DESC_MODE_8814B) & BIT_MASK_HI4Q_DESC_MODE_8814B)
+
 
 
 #define BIT_SHIFT_HI4Q_DESC_NUM_8814B 0
 #define BIT_MASK_HI4Q_DESC_NUM_8814B 0xfff
 #define BIT_HI4Q_DESC_NUM_8814B(x) (((x) & BIT_MASK_HI4Q_DESC_NUM_8814B) << BIT_SHIFT_HI4Q_DESC_NUM_8814B)
-#define BIT_GET_HI4Q_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_HI4Q_DESC_NUM_8814B) & BIT_MASK_HI4Q_DESC_NUM_8814B)

+#define BIT_GET_HI4Q_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_HI4Q_DESC_NUM_8814B) & BIT_MASK_HI4Q_DESC_NUM_8814B)
+
 
 
 /* 2 REG_HI5Q_TXBD_NUM_8814B */
@@ -4303,13 +4694,15 @@
 #define BIT_SHIFT_HI5Q_DESC_MODE_8814B 12
 #define BIT_MASK_HI5Q_DESC_MODE_8814B 0x3
 #define BIT_HI5Q_DESC_MODE_8814B(x) (((x) & BIT_MASK_HI5Q_DESC_MODE_8814B) << BIT_SHIFT_HI5Q_DESC_MODE_8814B)
-#define BIT_GET_HI5Q_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_HI5Q_DESC_MODE_8814B) & BIT_MASK_HI5Q_DESC_MODE_8814B)

+#define BIT_GET_HI5Q_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_HI5Q_DESC_MODE_8814B) & BIT_MASK_HI5Q_DESC_MODE_8814B)
+
 
 
 #define BIT_SHIFT_HI5Q_DESC_NUM_8814B 0
 #define BIT_MASK_HI5Q_DESC_NUM_8814B 0xfff
 #define BIT_HI5Q_DESC_NUM_8814B(x) (((x) & BIT_MASK_HI5Q_DESC_NUM_8814B) << BIT_SHIFT_HI5Q_DESC_NUM_8814B)
-#define BIT_GET_HI5Q_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_HI5Q_DESC_NUM_8814B) & BIT_MASK_HI5Q_DESC_NUM_8814B)

+#define BIT_GET_HI5Q_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_HI5Q_DESC_NUM_8814B) & BIT_MASK_HI5Q_DESC_NUM_8814B)
+
 
 
 /* 2 REG_HI6Q_TXBD_NUM_8814B */
@@ -4318,13 +4711,15 @@
 #define BIT_SHIFT_HI6Q_DESC_MODE_8814B 12
 #define BIT_MASK_HI6Q_DESC_MODE_8814B 0x3
 #define BIT_HI6Q_DESC_MODE_8814B(x) (((x) & BIT_MASK_HI6Q_DESC_MODE_8814B) << BIT_SHIFT_HI6Q_DESC_MODE_8814B)
-#define BIT_GET_HI6Q_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_HI6Q_DESC_MODE_8814B) & BIT_MASK_HI6Q_DESC_MODE_8814B)

+#define BIT_GET_HI6Q_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_HI6Q_DESC_MODE_8814B) & BIT_MASK_HI6Q_DESC_MODE_8814B)
+
 
 
 #define BIT_SHIFT_HI6Q_DESC_NUM_8814B 0
 #define BIT_MASK_HI6Q_DESC_NUM_8814B 0xfff
 #define BIT_HI6Q_DESC_NUM_8814B(x) (((x) & BIT_MASK_HI6Q_DESC_NUM_8814B) << BIT_SHIFT_HI6Q_DESC_NUM_8814B)
-#define BIT_GET_HI6Q_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_HI6Q_DESC_NUM_8814B) & BIT_MASK_HI6Q_DESC_NUM_8814B)

+#define BIT_GET_HI6Q_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_HI6Q_DESC_NUM_8814B) & BIT_MASK_HI6Q_DESC_NUM_8814B)
+
 
 
 /* 2 REG_HI7Q_TXBD_NUM_8814B */
@@ -4333,13 +4728,15 @@
 #define BIT_SHIFT_HI7Q_DESC_MODE_8814B 12
 #define BIT_MASK_HI7Q_DESC_MODE_8814B 0x3
 #define BIT_HI7Q_DESC_MODE_8814B(x) (((x) & BIT_MASK_HI7Q_DESC_MODE_8814B) << BIT_SHIFT_HI7Q_DESC_MODE_8814B)
-#define BIT_GET_HI7Q_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_HI7Q_DESC_MODE_8814B) & BIT_MASK_HI7Q_DESC_MODE_8814B)

+#define BIT_GET_HI7Q_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_HI7Q_DESC_MODE_8814B) & BIT_MASK_HI7Q_DESC_MODE_8814B)
+
 
 
 #define BIT_SHIFT_HI7Q_DESC_NUM_8814B 0
 #define BIT_MASK_HI7Q_DESC_NUM_8814B 0xfff
 #define BIT_HI7Q_DESC_NUM_8814B(x) (((x) & BIT_MASK_HI7Q_DESC_NUM_8814B) << BIT_SHIFT_HI7Q_DESC_NUM_8814B)
-#define BIT_GET_HI7Q_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_HI7Q_DESC_NUM_8814B) & BIT_MASK_HI7Q_DESC_NUM_8814B)

+#define BIT_GET_HI7Q_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_HI7Q_DESC_NUM_8814B) & BIT_MASK_HI7Q_DESC_NUM_8814B)
+
 
 
 /* 2 REG_TSFTIMER_HCI_8814B */
@@ -4347,13 +4744,15 @@
 #define BIT_SHIFT_TSFT2_HCI_8814B 16
 #define BIT_MASK_TSFT2_HCI_8814B 0xffff
 #define BIT_TSFT2_HCI_8814B(x) (((x) & BIT_MASK_TSFT2_HCI_8814B) << BIT_SHIFT_TSFT2_HCI_8814B)
-#define BIT_GET_TSFT2_HCI_8814B(x) (((x) >> BIT_SHIFT_TSFT2_HCI_8814B) & BIT_MASK_TSFT2_HCI_8814B)

+#define BIT_GET_TSFT2_HCI_8814B(x) (((x) >> BIT_SHIFT_TSFT2_HCI_8814B) & BIT_MASK_TSFT2_HCI_8814B)
+
 
 
 #define BIT_SHIFT_TSFT1_HCI_8814B 0
 #define BIT_MASK_TSFT1_HCI_8814B 0xffff
 #define BIT_TSFT1_HCI_8814B(x) (((x) & BIT_MASK_TSFT1_HCI_8814B) << BIT_SHIFT_TSFT1_HCI_8814B)
-#define BIT_GET_TSFT1_HCI_8814B(x) (((x) >> BIT_SHIFT_TSFT1_HCI_8814B) & BIT_MASK_TSFT1_HCI_8814B)

+#define BIT_GET_TSFT1_HCI_8814B(x) (((x) >> BIT_SHIFT_TSFT1_HCI_8814B) & BIT_MASK_TSFT1_HCI_8814B)
+
 
 
 /* 2 REG_BD_RWPTR_CLR_8814B */
@@ -4391,13 +4790,15 @@
 #define BIT_SHIFT_VOQ_HW_IDX_8814B 16
 #define BIT_MASK_VOQ_HW_IDX_8814B 0xfff
 #define BIT_VOQ_HW_IDX_8814B(x) (((x) & BIT_MASK_VOQ_HW_IDX_8814B) << BIT_SHIFT_VOQ_HW_IDX_8814B)
-#define BIT_GET_VOQ_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_VOQ_HW_IDX_8814B) & BIT_MASK_VOQ_HW_IDX_8814B)

+#define BIT_GET_VOQ_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_VOQ_HW_IDX_8814B) & BIT_MASK_VOQ_HW_IDX_8814B)
+
 
 
 #define BIT_SHIFT_VOQ_HOST_IDX_8814B 0
 #define BIT_MASK_VOQ_HOST_IDX_8814B 0xfff
 #define BIT_VOQ_HOST_IDX_8814B(x) (((x) & BIT_MASK_VOQ_HOST_IDX_8814B) << BIT_SHIFT_VOQ_HOST_IDX_8814B)
-#define BIT_GET_VOQ_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_VOQ_HOST_IDX_8814B) & BIT_MASK_VOQ_HOST_IDX_8814B)

+#define BIT_GET_VOQ_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_VOQ_HOST_IDX_8814B) & BIT_MASK_VOQ_HOST_IDX_8814B)
+
 
 
 /* 2 REG_VIQ_TXBD_IDX_8814B */
@@ -4405,13 +4806,15 @@
 #define BIT_SHIFT_VIQ_HW_IDX_8814B 16
 #define BIT_MASK_VIQ_HW_IDX_8814B 0xfff
 #define BIT_VIQ_HW_IDX_8814B(x) (((x) & BIT_MASK_VIQ_HW_IDX_8814B) << BIT_SHIFT_VIQ_HW_IDX_8814B)
-#define BIT_GET_VIQ_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_VIQ_HW_IDX_8814B) & BIT_MASK_VIQ_HW_IDX_8814B)

+#define BIT_GET_VIQ_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_VIQ_HW_IDX_8814B) & BIT_MASK_VIQ_HW_IDX_8814B)
+
 
 
 #define BIT_SHIFT_VIQ_HOST_IDX_8814B 0
 #define BIT_MASK_VIQ_HOST_IDX_8814B 0xfff
 #define BIT_VIQ_HOST_IDX_8814B(x) (((x) & BIT_MASK_VIQ_HOST_IDX_8814B) << BIT_SHIFT_VIQ_HOST_IDX_8814B)
-#define BIT_GET_VIQ_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_VIQ_HOST_IDX_8814B) & BIT_MASK_VIQ_HOST_IDX_8814B)

+#define BIT_GET_VIQ_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_VIQ_HOST_IDX_8814B) & BIT_MASK_VIQ_HOST_IDX_8814B)
+
 
 
 /* 2 REG_BEQ_TXBD_IDX_8814B */
@@ -4419,13 +4822,15 @@
 #define BIT_SHIFT_BEQ_HW_IDX_8814B 16
 #define BIT_MASK_BEQ_HW_IDX_8814B 0xfff
 #define BIT_BEQ_HW_IDX_8814B(x) (((x) & BIT_MASK_BEQ_HW_IDX_8814B) << BIT_SHIFT_BEQ_HW_IDX_8814B)
-#define BIT_GET_BEQ_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_BEQ_HW_IDX_8814B) & BIT_MASK_BEQ_HW_IDX_8814B)

+#define BIT_GET_BEQ_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_BEQ_HW_IDX_8814B) & BIT_MASK_BEQ_HW_IDX_8814B)
+
 
 
 #define BIT_SHIFT_BEQ_HOST_IDX_8814B 0
 #define BIT_MASK_BEQ_HOST_IDX_8814B 0xfff
 #define BIT_BEQ_HOST_IDX_8814B(x) (((x) & BIT_MASK_BEQ_HOST_IDX_8814B) << BIT_SHIFT_BEQ_HOST_IDX_8814B)
-#define BIT_GET_BEQ_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_BEQ_HOST_IDX_8814B) & BIT_MASK_BEQ_HOST_IDX_8814B)

+#define BIT_GET_BEQ_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_BEQ_HOST_IDX_8814B) & BIT_MASK_BEQ_HOST_IDX_8814B)
+
 
 
 /* 2 REG_BKQ_TXBD_IDX_8814B */
@@ -4433,13 +4838,15 @@
 #define BIT_SHIFT_BKQ_HW_IDX_8814B 16
 #define BIT_MASK_BKQ_HW_IDX_8814B 0xfff
 #define BIT_BKQ_HW_IDX_8814B(x) (((x) & BIT_MASK_BKQ_HW_IDX_8814B) << BIT_SHIFT_BKQ_HW_IDX_8814B)
-#define BIT_GET_BKQ_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_BKQ_HW_IDX_8814B) & BIT_MASK_BKQ_HW_IDX_8814B)

+#define BIT_GET_BKQ_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_BKQ_HW_IDX_8814B) & BIT_MASK_BKQ_HW_IDX_8814B)
+
 
 
 #define BIT_SHIFT_BKQ_HOST_IDX_8814B 0
 #define BIT_MASK_BKQ_HOST_IDX_8814B 0xfff
 #define BIT_BKQ_HOST_IDX_8814B(x) (((x) & BIT_MASK_BKQ_HOST_IDX_8814B) << BIT_SHIFT_BKQ_HOST_IDX_8814B)
-#define BIT_GET_BKQ_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_BKQ_HOST_IDX_8814B) & BIT_MASK_BKQ_HOST_IDX_8814B)

+#define BIT_GET_BKQ_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_BKQ_HOST_IDX_8814B) & BIT_MASK_BKQ_HOST_IDX_8814B)
+
 
 
 /* 2 REG_MGQ_TXBD_IDX_8814B */
@@ -4447,13 +4854,15 @@
 #define BIT_SHIFT_MGQ_HW_IDX_8814B 16
 #define BIT_MASK_MGQ_HW_IDX_8814B 0xfff
 #define BIT_MGQ_HW_IDX_8814B(x) (((x) & BIT_MASK_MGQ_HW_IDX_8814B) << BIT_SHIFT_MGQ_HW_IDX_8814B)
-#define BIT_GET_MGQ_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_MGQ_HW_IDX_8814B) & BIT_MASK_MGQ_HW_IDX_8814B)

+#define BIT_GET_MGQ_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_MGQ_HW_IDX_8814B) & BIT_MASK_MGQ_HW_IDX_8814B)
+
 
 
 #define BIT_SHIFT_MGQ_HOST_IDX_8814B 0
 #define BIT_MASK_MGQ_HOST_IDX_8814B 0xfff
 #define BIT_MGQ_HOST_IDX_8814B(x) (((x) & BIT_MASK_MGQ_HOST_IDX_8814B) << BIT_SHIFT_MGQ_HOST_IDX_8814B)
-#define BIT_GET_MGQ_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_MGQ_HOST_IDX_8814B) & BIT_MASK_MGQ_HOST_IDX_8814B)

+#define BIT_GET_MGQ_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_MGQ_HOST_IDX_8814B) & BIT_MASK_MGQ_HOST_IDX_8814B)
+
 
 
 /* 2 REG_RXQ_RXBD_IDX_8814B */
@@ -4461,13 +4870,15 @@
 #define BIT_SHIFT_RXQ_HW_IDX_8814B 16
 #define BIT_MASK_RXQ_HW_IDX_8814B 0xfff
 #define BIT_RXQ_HW_IDX_8814B(x) (((x) & BIT_MASK_RXQ_HW_IDX_8814B) << BIT_SHIFT_RXQ_HW_IDX_8814B)
-#define BIT_GET_RXQ_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_RXQ_HW_IDX_8814B) & BIT_MASK_RXQ_HW_IDX_8814B)

+#define BIT_GET_RXQ_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_RXQ_HW_IDX_8814B) & BIT_MASK_RXQ_HW_IDX_8814B)
+
 
 
 #define BIT_SHIFT_RXQ_HOST_IDX_8814B 0
 #define BIT_MASK_RXQ_HOST_IDX_8814B 0xfff
 #define BIT_RXQ_HOST_IDX_8814B(x) (((x) & BIT_MASK_RXQ_HOST_IDX_8814B) << BIT_SHIFT_RXQ_HOST_IDX_8814B)
-#define BIT_GET_RXQ_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_RXQ_HOST_IDX_8814B) & BIT_MASK_RXQ_HOST_IDX_8814B)

+#define BIT_GET_RXQ_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_RXQ_HOST_IDX_8814B) & BIT_MASK_RXQ_HOST_IDX_8814B)
+
 
 
 /* 2 REG_HI0Q_TXBD_IDX_8814B */
@@ -4475,13 +4886,15 @@
 #define BIT_SHIFT_HI0Q_HW_IDX_8814B 16
 #define BIT_MASK_HI0Q_HW_IDX_8814B 0xfff
 #define BIT_HI0Q_HW_IDX_8814B(x) (((x) & BIT_MASK_HI0Q_HW_IDX_8814B) << BIT_SHIFT_HI0Q_HW_IDX_8814B)
-#define BIT_GET_HI0Q_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_HI0Q_HW_IDX_8814B) & BIT_MASK_HI0Q_HW_IDX_8814B)

+#define BIT_GET_HI0Q_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_HI0Q_HW_IDX_8814B) & BIT_MASK_HI0Q_HW_IDX_8814B)
+
 
 
 #define BIT_SHIFT_HI0Q_HOST_IDX_8814B 0
 #define BIT_MASK_HI0Q_HOST_IDX_8814B 0xfff
 #define BIT_HI0Q_HOST_IDX_8814B(x) (((x) & BIT_MASK_HI0Q_HOST_IDX_8814B) << BIT_SHIFT_HI0Q_HOST_IDX_8814B)
-#define BIT_GET_HI0Q_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_HI0Q_HOST_IDX_8814B) & BIT_MASK_HI0Q_HOST_IDX_8814B)

+#define BIT_GET_HI0Q_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_HI0Q_HOST_IDX_8814B) & BIT_MASK_HI0Q_HOST_IDX_8814B)
+
 
 
 /* 2 REG_HI1Q_TXBD_IDX_8814B */
@@ -4489,13 +4902,15 @@
 #define BIT_SHIFT_HI1Q_HW_IDX_8814B 16
 #define BIT_MASK_HI1Q_HW_IDX_8814B 0xfff
 #define BIT_HI1Q_HW_IDX_8814B(x) (((x) & BIT_MASK_HI1Q_HW_IDX_8814B) << BIT_SHIFT_HI1Q_HW_IDX_8814B)
-#define BIT_GET_HI1Q_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_HI1Q_HW_IDX_8814B) & BIT_MASK_HI1Q_HW_IDX_8814B)

+#define BIT_GET_HI1Q_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_HI1Q_HW_IDX_8814B) & BIT_MASK_HI1Q_HW_IDX_8814B)
+
 
 
 #define BIT_SHIFT_HI1Q_HOST_IDX_8814B 0
 #define BIT_MASK_HI1Q_HOST_IDX_8814B 0xfff
 #define BIT_HI1Q_HOST_IDX_8814B(x) (((x) & BIT_MASK_HI1Q_HOST_IDX_8814B) << BIT_SHIFT_HI1Q_HOST_IDX_8814B)
-#define BIT_GET_HI1Q_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_HI1Q_HOST_IDX_8814B) & BIT_MASK_HI1Q_HOST_IDX_8814B)

+#define BIT_GET_HI1Q_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_HI1Q_HOST_IDX_8814B) & BIT_MASK_HI1Q_HOST_IDX_8814B)
+
 
 
 /* 2 REG_HI2Q_TXBD_IDX_8814B */
@@ -4503,13 +4918,15 @@
 #define BIT_SHIFT_HI2Q_HW_IDX_8814B 16
 #define BIT_MASK_HI2Q_HW_IDX_8814B 0xfff
 #define BIT_HI2Q_HW_IDX_8814B(x) (((x) & BIT_MASK_HI2Q_HW_IDX_8814B) << BIT_SHIFT_HI2Q_HW_IDX_8814B)
-#define BIT_GET_HI2Q_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_HI2Q_HW_IDX_8814B) & BIT_MASK_HI2Q_HW_IDX_8814B)

+#define BIT_GET_HI2Q_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_HI2Q_HW_IDX_8814B) & BIT_MASK_HI2Q_HW_IDX_8814B)
+
 
 
 #define BIT_SHIFT_HI2Q_HOST_IDX_8814B 0
 #define BIT_MASK_HI2Q_HOST_IDX_8814B 0xfff
 #define BIT_HI2Q_HOST_IDX_8814B(x) (((x) & BIT_MASK_HI2Q_HOST_IDX_8814B) << BIT_SHIFT_HI2Q_HOST_IDX_8814B)
-#define BIT_GET_HI2Q_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_HI2Q_HOST_IDX_8814B) & BIT_MASK_HI2Q_HOST_IDX_8814B)

+#define BIT_GET_HI2Q_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_HI2Q_HOST_IDX_8814B) & BIT_MASK_HI2Q_HOST_IDX_8814B)
+
 
 
 /* 2 REG_HI3Q_TXBD_IDX_8814B */
@@ -4517,13 +4934,15 @@
 #define BIT_SHIFT_HI3Q_HW_IDX_8814B 16
 #define BIT_MASK_HI3Q_HW_IDX_8814B 0xfff
 #define BIT_HI3Q_HW_IDX_8814B(x) (((x) & BIT_MASK_HI3Q_HW_IDX_8814B) << BIT_SHIFT_HI3Q_HW_IDX_8814B)
-#define BIT_GET_HI3Q_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_HI3Q_HW_IDX_8814B) & BIT_MASK_HI3Q_HW_IDX_8814B)

+#define BIT_GET_HI3Q_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_HI3Q_HW_IDX_8814B) & BIT_MASK_HI3Q_HW_IDX_8814B)
+
 
 
 #define BIT_SHIFT_HI3Q_HOST_IDX_8814B 0
 #define BIT_MASK_HI3Q_HOST_IDX_8814B 0xfff
 #define BIT_HI3Q_HOST_IDX_8814B(x) (((x) & BIT_MASK_HI3Q_HOST_IDX_8814B) << BIT_SHIFT_HI3Q_HOST_IDX_8814B)
-#define BIT_GET_HI3Q_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_HI3Q_HOST_IDX_8814B) & BIT_MASK_HI3Q_HOST_IDX_8814B)

+#define BIT_GET_HI3Q_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_HI3Q_HOST_IDX_8814B) & BIT_MASK_HI3Q_HOST_IDX_8814B)
+
 
 
 /* 2 REG_HI4Q_TXBD_IDX_8814B */
@@ -4531,13 +4950,15 @@
 #define BIT_SHIFT_HI4Q_HW_IDX_8814B 16
 #define BIT_MASK_HI4Q_HW_IDX_8814B 0xfff
 #define BIT_HI4Q_HW_IDX_8814B(x) (((x) & BIT_MASK_HI4Q_HW_IDX_8814B) << BIT_SHIFT_HI4Q_HW_IDX_8814B)
-#define BIT_GET_HI4Q_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_HI4Q_HW_IDX_8814B) & BIT_MASK_HI4Q_HW_IDX_8814B)

+#define BIT_GET_HI4Q_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_HI4Q_HW_IDX_8814B) & BIT_MASK_HI4Q_HW_IDX_8814B)
+
 
 
 #define BIT_SHIFT_HI4Q_HOST_IDX_8814B 0
 #define BIT_MASK_HI4Q_HOST_IDX_8814B 0xfff
 #define BIT_HI4Q_HOST_IDX_8814B(x) (((x) & BIT_MASK_HI4Q_HOST_IDX_8814B) << BIT_SHIFT_HI4Q_HOST_IDX_8814B)
-#define BIT_GET_HI4Q_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_HI4Q_HOST_IDX_8814B) & BIT_MASK_HI4Q_HOST_IDX_8814B)

+#define BIT_GET_HI4Q_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_HI4Q_HOST_IDX_8814B) & BIT_MASK_HI4Q_HOST_IDX_8814B)
+
 
 
 /* 2 REG_HI5Q_TXBD_IDX_8814B */
@@ -4545,13 +4966,15 @@
 #define BIT_SHIFT_HI5Q_HW_IDX_8814B 16
 #define BIT_MASK_HI5Q_HW_IDX_8814B 0xfff
 #define BIT_HI5Q_HW_IDX_8814B(x) (((x) & BIT_MASK_HI5Q_HW_IDX_8814B) << BIT_SHIFT_HI5Q_HW_IDX_8814B)
-#define BIT_GET_HI5Q_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_HI5Q_HW_IDX_8814B) & BIT_MASK_HI5Q_HW_IDX_8814B)

+#define BIT_GET_HI5Q_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_HI5Q_HW_IDX_8814B) & BIT_MASK_HI5Q_HW_IDX_8814B)
+
 
 
 #define BIT_SHIFT_HI5Q_HOST_IDX_8814B 0
 #define BIT_MASK_HI5Q_HOST_IDX_8814B 0xfff
 #define BIT_HI5Q_HOST_IDX_8814B(x) (((x) & BIT_MASK_HI5Q_HOST_IDX_8814B) << BIT_SHIFT_HI5Q_HOST_IDX_8814B)
-#define BIT_GET_HI5Q_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_HI5Q_HOST_IDX_8814B) & BIT_MASK_HI5Q_HOST_IDX_8814B)

+#define BIT_GET_HI5Q_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_HI5Q_HOST_IDX_8814B) & BIT_MASK_HI5Q_HOST_IDX_8814B)
+
 
 
 /* 2 REG_HI6Q_TXBD_IDX_8814B */
@@ -4559,13 +4982,15 @@
 #define BIT_SHIFT_HI6Q_HW_IDX_8814B 16
 #define BIT_MASK_HI6Q_HW_IDX_8814B 0xfff
 #define BIT_HI6Q_HW_IDX_8814B(x) (((x) & BIT_MASK_HI6Q_HW_IDX_8814B) << BIT_SHIFT_HI6Q_HW_IDX_8814B)
-#define BIT_GET_HI6Q_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_HI6Q_HW_IDX_8814B) & BIT_MASK_HI6Q_HW_IDX_8814B)

+#define BIT_GET_HI6Q_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_HI6Q_HW_IDX_8814B) & BIT_MASK_HI6Q_HW_IDX_8814B)
+
 
 
 #define BIT_SHIFT_HI6Q_HOST_IDX_8814B 0
 #define BIT_MASK_HI6Q_HOST_IDX_8814B 0xfff
 #define BIT_HI6Q_HOST_IDX_8814B(x) (((x) & BIT_MASK_HI6Q_HOST_IDX_8814B) << BIT_SHIFT_HI6Q_HOST_IDX_8814B)
-#define BIT_GET_HI6Q_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_HI6Q_HOST_IDX_8814B) & BIT_MASK_HI6Q_HOST_IDX_8814B)

+#define BIT_GET_HI6Q_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_HI6Q_HOST_IDX_8814B) & BIT_MASK_HI6Q_HOST_IDX_8814B)
+
 
 
 /* 2 REG_HI7Q_TXBD_IDX_8814B */
@@ -4573,13 +4998,15 @@
 #define BIT_SHIFT_HI7Q_HW_IDX_8814B 16
 #define BIT_MASK_HI7Q_HW_IDX_8814B 0xfff
 #define BIT_HI7Q_HW_IDX_8814B(x) (((x) & BIT_MASK_HI7Q_HW_IDX_8814B) << BIT_SHIFT_HI7Q_HW_IDX_8814B)
-#define BIT_GET_HI7Q_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_HI7Q_HW_IDX_8814B) & BIT_MASK_HI7Q_HW_IDX_8814B)

+#define BIT_GET_HI7Q_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_HI7Q_HW_IDX_8814B) & BIT_MASK_HI7Q_HW_IDX_8814B)
+
 
 
 #define BIT_SHIFT_HI7Q_HOST_IDX_8814B 0
 #define BIT_MASK_HI7Q_HOST_IDX_8814B 0xfff
 #define BIT_HI7Q_HOST_IDX_8814B(x) (((x) & BIT_MASK_HI7Q_HOST_IDX_8814B) << BIT_SHIFT_HI7Q_HOST_IDX_8814B)
-#define BIT_GET_HI7Q_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_HI7Q_HOST_IDX_8814B) & BIT_MASK_HI7Q_HOST_IDX_8814B)

+#define BIT_GET_HI7Q_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_HI7Q_HOST_IDX_8814B) & BIT_MASK_HI7Q_HOST_IDX_8814B)
+
 
 
 /* 2 REG_DBG_SEL_V1_8814B */
@@ -4587,7 +5014,8 @@
 #define BIT_SHIFT_DBG_SEL_8814B 0
 #define BIT_MASK_DBG_SEL_8814B 0xff
 #define BIT_DBG_SEL_8814B(x) (((x) & BIT_MASK_DBG_SEL_8814B) << BIT_SHIFT_DBG_SEL_8814B)
-#define BIT_GET_DBG_SEL_8814B(x) (((x) >> BIT_SHIFT_DBG_SEL_8814B) & BIT_MASK_DBG_SEL_8814B)

+#define BIT_GET_DBG_SEL_8814B(x) (((x) >> BIT_SHIFT_DBG_SEL_8814B) & BIT_MASK_DBG_SEL_8814B)
+
 
 
 /* 2 REG_PCIE_HRPWM1_V1_8814B */
@@ -4595,7 +5023,8 @@
 #define BIT_SHIFT_PCIE_HRPWM_8814B 0
 #define BIT_MASK_PCIE_HRPWM_8814B 0xff
 #define BIT_PCIE_HRPWM_8814B(x) (((x) & BIT_MASK_PCIE_HRPWM_8814B) << BIT_SHIFT_PCIE_HRPWM_8814B)
-#define BIT_GET_PCIE_HRPWM_8814B(x) (((x) >> BIT_SHIFT_PCIE_HRPWM_8814B) & BIT_MASK_PCIE_HRPWM_8814B)

+#define BIT_GET_PCIE_HRPWM_8814B(x) (((x) >> BIT_SHIFT_PCIE_HRPWM_8814B) & BIT_MASK_PCIE_HRPWM_8814B)
+
 
 
 /* 2 REG_PCIE_HCPWM1_V1_8814B */
@@ -4603,7 +5032,8 @@
 #define BIT_SHIFT_PCIE_HCPWM_8814B 0
 #define BIT_MASK_PCIE_HCPWM_8814B 0xff
 #define BIT_PCIE_HCPWM_8814B(x) (((x) & BIT_MASK_PCIE_HCPWM_8814B) << BIT_SHIFT_PCIE_HCPWM_8814B)
-#define BIT_GET_PCIE_HCPWM_8814B(x) (((x) >> BIT_SHIFT_PCIE_HCPWM_8814B) & BIT_MASK_PCIE_HCPWM_8814B)

+#define BIT_GET_PCIE_HCPWM_8814B(x) (((x) >> BIT_SHIFT_PCIE_HCPWM_8814B) & BIT_MASK_PCIE_HCPWM_8814B)
+
 
 
 /* 2 REG_PCIE_CTRL2_8814B */
@@ -4613,7 +5043,8 @@
 #define BIT_SHIFT_HPS_CLKR_PCIE_8814B 4
 #define BIT_MASK_HPS_CLKR_PCIE_8814B 0x3
 #define BIT_HPS_CLKR_PCIE_8814B(x) (((x) & BIT_MASK_HPS_CLKR_PCIE_8814B) << BIT_SHIFT_HPS_CLKR_PCIE_8814B)
-#define BIT_GET_HPS_CLKR_PCIE_8814B(x) (((x) >> BIT_SHIFT_HPS_CLKR_PCIE_8814B) & BIT_MASK_HPS_CLKR_PCIE_8814B)

+#define BIT_GET_HPS_CLKR_PCIE_8814B(x) (((x) >> BIT_SHIFT_HPS_CLKR_PCIE_8814B) & BIT_MASK_HPS_CLKR_PCIE_8814B)
+
 
 #define BIT_PCIE_INT_8814B BIT(3)
 #define BIT_TXFLAG_EXIT_L1_EN_8814B BIT(2)
@@ -4625,7 +5056,8 @@
 #define BIT_SHIFT_PCIE_HRPWM2_8814B 0
 #define BIT_MASK_PCIE_HRPWM2_8814B 0xffff
 #define BIT_PCIE_HRPWM2_8814B(x) (((x) & BIT_MASK_PCIE_HRPWM2_8814B) << BIT_SHIFT_PCIE_HRPWM2_8814B)
-#define BIT_GET_PCIE_HRPWM2_8814B(x) (((x) >> BIT_SHIFT_PCIE_HRPWM2_8814B) & BIT_MASK_PCIE_HRPWM2_8814B)

+#define BIT_GET_PCIE_HRPWM2_8814B(x) (((x) >> BIT_SHIFT_PCIE_HRPWM2_8814B) & BIT_MASK_PCIE_HRPWM2_8814B)
+
 
 
 /* 2 REG_PCIE_HCPWM2_V1_8814B */
@@ -4633,7 +5065,8 @@
 #define BIT_SHIFT_PCIE_HCPWM2_8814B 0
 #define BIT_MASK_PCIE_HCPWM2_8814B 0xffff
 #define BIT_PCIE_HCPWM2_8814B(x) (((x) & BIT_MASK_PCIE_HCPWM2_8814B) << BIT_SHIFT_PCIE_HCPWM2_8814B)
-#define BIT_GET_PCIE_HCPWM2_8814B(x) (((x) >> BIT_SHIFT_PCIE_HCPWM2_8814B) & BIT_MASK_PCIE_HCPWM2_8814B)

+#define BIT_GET_PCIE_HCPWM2_8814B(x) (((x) >> BIT_SHIFT_PCIE_HCPWM2_8814B) & BIT_MASK_PCIE_HCPWM2_8814B)
+
 
 
 /* 2 REG_PCIE_H2C_MSG_V1_8814B */
@@ -4641,7 +5074,8 @@
 #define BIT_SHIFT_DRV2FW_INFO_8814B 0
 #define BIT_MASK_DRV2FW_INFO_8814B 0xffffffffL
 #define BIT_DRV2FW_INFO_8814B(x) (((x) & BIT_MASK_DRV2FW_INFO_8814B) << BIT_SHIFT_DRV2FW_INFO_8814B)
-#define BIT_GET_DRV2FW_INFO_8814B(x) (((x) >> BIT_SHIFT_DRV2FW_INFO_8814B) & BIT_MASK_DRV2FW_INFO_8814B)

+#define BIT_GET_DRV2FW_INFO_8814B(x) (((x) >> BIT_SHIFT_DRV2FW_INFO_8814B) & BIT_MASK_DRV2FW_INFO_8814B)
+
 
 
 /* 2 REG_PCIE_C2H_MSG_V1_8814B */
@@ -4649,7 +5083,8 @@
 #define BIT_SHIFT_HCI_PCIE_C2H_MSG_8814B 0
 #define BIT_MASK_HCI_PCIE_C2H_MSG_8814B 0xffffffffL
 #define BIT_HCI_PCIE_C2H_MSG_8814B(x) (((x) & BIT_MASK_HCI_PCIE_C2H_MSG_8814B) << BIT_SHIFT_HCI_PCIE_C2H_MSG_8814B)
-#define BIT_GET_HCI_PCIE_C2H_MSG_8814B(x) (((x) >> BIT_SHIFT_HCI_PCIE_C2H_MSG_8814B) & BIT_MASK_HCI_PCIE_C2H_MSG_8814B)

+#define BIT_GET_HCI_PCIE_C2H_MSG_8814B(x) (((x) >> BIT_SHIFT_HCI_PCIE_C2H_MSG_8814B) & BIT_MASK_HCI_PCIE_C2H_MSG_8814B)
+
 
 
 /* 2 REG_DBI_WDATA_V1_8814B */
@@ -4657,7 +5092,8 @@
 #define BIT_SHIFT_DBI_WDATA_8814B 0
 #define BIT_MASK_DBI_WDATA_8814B 0xffffffffL
 #define BIT_DBI_WDATA_8814B(x) (((x) & BIT_MASK_DBI_WDATA_8814B) << BIT_SHIFT_DBI_WDATA_8814B)
-#define BIT_GET_DBI_WDATA_8814B(x) (((x) >> BIT_SHIFT_DBI_WDATA_8814B) & BIT_MASK_DBI_WDATA_8814B)

+#define BIT_GET_DBI_WDATA_8814B(x) (((x) >> BIT_SHIFT_DBI_WDATA_8814B) & BIT_MASK_DBI_WDATA_8814B)
+
 
 
 /* 2 REG_DBI_RDATA_V1_8814B */
@@ -4665,7 +5101,8 @@
 #define BIT_SHIFT_DBI_RDATA_8814B 0
 #define BIT_MASK_DBI_RDATA_8814B 0xffffffffL
 #define BIT_DBI_RDATA_8814B(x) (((x) & BIT_MASK_DBI_RDATA_8814B) << BIT_SHIFT_DBI_RDATA_8814B)
-#define BIT_GET_DBI_RDATA_8814B(x) (((x) >> BIT_SHIFT_DBI_RDATA_8814B) & BIT_MASK_DBI_RDATA_8814B)

+#define BIT_GET_DBI_RDATA_8814B(x) (((x) >> BIT_SHIFT_DBI_RDATA_8814B) & BIT_MASK_DBI_RDATA_8814B)
+
 
 
 /* 2 REG_DBI_FLAG_V1_8814B */
@@ -4678,13 +5115,15 @@
 #define BIT_SHIFT_DBI_WREN_8814B 12
 #define BIT_MASK_DBI_WREN_8814B 0xf
 #define BIT_DBI_WREN_8814B(x) (((x) & BIT_MASK_DBI_WREN_8814B) << BIT_SHIFT_DBI_WREN_8814B)
-#define BIT_GET_DBI_WREN_8814B(x) (((x) >> BIT_SHIFT_DBI_WREN_8814B) & BIT_MASK_DBI_WREN_8814B)

+#define BIT_GET_DBI_WREN_8814B(x) (((x) >> BIT_SHIFT_DBI_WREN_8814B) & BIT_MASK_DBI_WREN_8814B)
+
 
 
 #define BIT_SHIFT_DBI_ADDR_8814B 0
 #define BIT_MASK_DBI_ADDR_8814B 0xfff
 #define BIT_DBI_ADDR_8814B(x) (((x) & BIT_MASK_DBI_ADDR_8814B) << BIT_SHIFT_DBI_ADDR_8814B)
-#define BIT_GET_DBI_ADDR_8814B(x) (((x) >> BIT_SHIFT_DBI_ADDR_8814B) & BIT_MASK_DBI_ADDR_8814B)

+#define BIT_GET_DBI_ADDR_8814B(x) (((x) >> BIT_SHIFT_DBI_ADDR_8814B) & BIT_MASK_DBI_ADDR_8814B)
+
 
 
 /* 2 REG_MDIO_V1_8814B */
@@ -4692,13 +5131,15 @@
 #define BIT_SHIFT_MDIO_RDATA_8814B 16
 #define BIT_MASK_MDIO_RDATA_8814B 0xffff
 #define BIT_MDIO_RDATA_8814B(x) (((x) & BIT_MASK_MDIO_RDATA_8814B) << BIT_SHIFT_MDIO_RDATA_8814B)
-#define BIT_GET_MDIO_RDATA_8814B(x) (((x) >> BIT_SHIFT_MDIO_RDATA_8814B) & BIT_MASK_MDIO_RDATA_8814B)

+#define BIT_GET_MDIO_RDATA_8814B(x) (((x) >> BIT_SHIFT_MDIO_RDATA_8814B) & BIT_MASK_MDIO_RDATA_8814B)
+
 
 
 #define BIT_SHIFT_MDIO_WDATA_8814B 0
 #define BIT_MASK_MDIO_WDATA_8814B 0xffff
 #define BIT_MDIO_WDATA_8814B(x) (((x) & BIT_MASK_MDIO_WDATA_8814B) << BIT_SHIFT_MDIO_WDATA_8814B)
-#define BIT_GET_MDIO_WDATA_8814B(x) (((x) >> BIT_SHIFT_MDIO_WDATA_8814B) & BIT_MASK_MDIO_WDATA_8814B)

+#define BIT_GET_MDIO_WDATA_8814B(x) (((x) >> BIT_SHIFT_MDIO_WDATA_8814B) & BIT_MASK_MDIO_WDATA_8814B)
+
 
 
 /* 2 REG_PCIE_MIX_CFG_8814B */
@@ -4706,13 +5147,15 @@
 #define BIT_SHIFT_MDIO_PHY_ADDR_8814B 24
 #define BIT_MASK_MDIO_PHY_ADDR_8814B 0x1f
 #define BIT_MDIO_PHY_ADDR_8814B(x) (((x) & BIT_MASK_MDIO_PHY_ADDR_8814B) << BIT_SHIFT_MDIO_PHY_ADDR_8814B)
-#define BIT_GET_MDIO_PHY_ADDR_8814B(x) (((x) >> BIT_SHIFT_MDIO_PHY_ADDR_8814B) & BIT_MASK_MDIO_PHY_ADDR_8814B)

+#define BIT_GET_MDIO_PHY_ADDR_8814B(x) (((x) >> BIT_SHIFT_MDIO_PHY_ADDR_8814B) & BIT_MASK_MDIO_PHY_ADDR_8814B)
+
 
 
 #define BIT_SHIFT_WATCH_DOG_RECORD_V1_8814B 10
 #define BIT_MASK_WATCH_DOG_RECORD_V1_8814B 0x3fff
 #define BIT_WATCH_DOG_RECORD_V1_8814B(x) (((x) & BIT_MASK_WATCH_DOG_RECORD_V1_8814B) << BIT_SHIFT_WATCH_DOG_RECORD_V1_8814B)
-#define BIT_GET_WATCH_DOG_RECORD_V1_8814B(x) (((x) >> BIT_SHIFT_WATCH_DOG_RECORD_V1_8814B) & BIT_MASK_WATCH_DOG_RECORD_V1_8814B)

+#define BIT_GET_WATCH_DOG_RECORD_V1_8814B(x) (((x) >> BIT_SHIFT_WATCH_DOG_RECORD_V1_8814B) & BIT_MASK_WATCH_DOG_RECORD_V1_8814B)
+
 
 #define BIT_R_IO_TIMEOUT_FLAG_V1_8814B BIT(9)
 #define BIT_EN_WATCH_DOG_8814B BIT(8)
@@ -4723,7 +5166,8 @@
 #define BIT_SHIFT_MDIO_REG_ADDR_V1_8814B 0
 #define BIT_MASK_MDIO_REG_ADDR_V1_8814B 0x1f
 #define BIT_MDIO_REG_ADDR_V1_8814B(x) (((x) & BIT_MASK_MDIO_REG_ADDR_V1_8814B) << BIT_SHIFT_MDIO_REG_ADDR_V1_8814B)
-#define BIT_GET_MDIO_REG_ADDR_V1_8814B(x) (((x) >> BIT_SHIFT_MDIO_REG_ADDR_V1_8814B) & BIT_MASK_MDIO_REG_ADDR_V1_8814B)

+#define BIT_GET_MDIO_REG_ADDR_V1_8814B(x) (((x) >> BIT_SHIFT_MDIO_REG_ADDR_V1_8814B) & BIT_MASK_MDIO_REG_ADDR_V1_8814B)
+
 
 
 /* 2 REG_HCI_MIX_CFG_8814B */
@@ -4732,20 +5176,23 @@
 #define BIT_SHIFT_TXDMA_ERR_FLAG_8814B 16
 #define BIT_MASK_TXDMA_ERR_FLAG_8814B 0xf
 #define BIT_TXDMA_ERR_FLAG_8814B(x) (((x) & BIT_MASK_TXDMA_ERR_FLAG_8814B) << BIT_SHIFT_TXDMA_ERR_FLAG_8814B)
-#define BIT_GET_TXDMA_ERR_FLAG_8814B(x) (((x) >> BIT_SHIFT_TXDMA_ERR_FLAG_8814B) & BIT_MASK_TXDMA_ERR_FLAG_8814B)

+#define BIT_GET_TXDMA_ERR_FLAG_8814B(x) (((x) >> BIT_SHIFT_TXDMA_ERR_FLAG_8814B) & BIT_MASK_TXDMA_ERR_FLAG_8814B)
+
 
 
 #define BIT_SHIFT_EARLY_MODE_SEL_8814B 12
 #define BIT_MASK_EARLY_MODE_SEL_8814B 0xf
 #define BIT_EARLY_MODE_SEL_8814B(x) (((x) & BIT_MASK_EARLY_MODE_SEL_8814B) << BIT_SHIFT_EARLY_MODE_SEL_8814B)
-#define BIT_GET_EARLY_MODE_SEL_8814B(x) (((x) >> BIT_SHIFT_EARLY_MODE_SEL_8814B) & BIT_MASK_EARLY_MODE_SEL_8814B)

+#define BIT_GET_EARLY_MODE_SEL_8814B(x) (((x) >> BIT_SHIFT_EARLY_MODE_SEL_8814B) & BIT_MASK_EARLY_MODE_SEL_8814B)
+
 
 #define BIT_EPHY_RX50_EN_8814B BIT(11)
 
 #define BIT_SHIFT_MSI_TIMEOUT_ID_V1_8814B 8
 #define BIT_MASK_MSI_TIMEOUT_ID_V1_8814B 0x7
 #define BIT_MSI_TIMEOUT_ID_V1_8814B(x) (((x) & BIT_MASK_MSI_TIMEOUT_ID_V1_8814B) << BIT_SHIFT_MSI_TIMEOUT_ID_V1_8814B)
-#define BIT_GET_MSI_TIMEOUT_ID_V1_8814B(x) (((x) >> BIT_SHIFT_MSI_TIMEOUT_ID_V1_8814B) & BIT_MASK_MSI_TIMEOUT_ID_V1_8814B)

+#define BIT_GET_MSI_TIMEOUT_ID_V1_8814B(x) (((x) >> BIT_SHIFT_MSI_TIMEOUT_ID_V1_8814B) & BIT_MASK_MSI_TIMEOUT_ID_V1_8814B)
+
 
 #define BIT_RADDR_RD_8814B BIT(7)
 #define BIT_EN_MUL_TAG_8814B BIT(6)
@@ -4761,19 +5208,22 @@
 #define BIT_SHIFT_STC_INT_FLAG_8814B 16
 #define BIT_MASK_STC_INT_FLAG_8814B 0xff
 #define BIT_STC_INT_FLAG_8814B(x) (((x) & BIT_MASK_STC_INT_FLAG_8814B) << BIT_SHIFT_STC_INT_FLAG_8814B)
-#define BIT_GET_STC_INT_FLAG_8814B(x) (((x) >> BIT_SHIFT_STC_INT_FLAG_8814B) & BIT_MASK_STC_INT_FLAG_8814B)

+#define BIT_GET_STC_INT_FLAG_8814B(x) (((x) >> BIT_SHIFT_STC_INT_FLAG_8814B) & BIT_MASK_STC_INT_FLAG_8814B)
+
 
 
 #define BIT_SHIFT_STC_INT_IDX_8814B 8
 #define BIT_MASK_STC_INT_IDX_8814B 0x7
 #define BIT_STC_INT_IDX_8814B(x) (((x) & BIT_MASK_STC_INT_IDX_8814B) << BIT_SHIFT_STC_INT_IDX_8814B)
-#define BIT_GET_STC_INT_IDX_8814B(x) (((x) >> BIT_SHIFT_STC_INT_IDX_8814B) & BIT_MASK_STC_INT_IDX_8814B)

+#define BIT_GET_STC_INT_IDX_8814B(x) (((x) >> BIT_SHIFT_STC_INT_IDX_8814B) & BIT_MASK_STC_INT_IDX_8814B)
+
 
 
 #define BIT_SHIFT_STC_INT_REALTIME_CS_8814B 0
 #define BIT_MASK_STC_INT_REALTIME_CS_8814B 0x3f
 #define BIT_STC_INT_REALTIME_CS_8814B(x) (((x) & BIT_MASK_STC_INT_REALTIME_CS_8814B) << BIT_SHIFT_STC_INT_REALTIME_CS_8814B)
-#define BIT_GET_STC_INT_REALTIME_CS_8814B(x) (((x) >> BIT_SHIFT_STC_INT_REALTIME_CS_8814B) & BIT_MASK_STC_INT_REALTIME_CS_8814B)

+#define BIT_GET_STC_INT_REALTIME_CS_8814B(x) (((x) >> BIT_SHIFT_STC_INT_REALTIME_CS_8814B) & BIT_MASK_STC_INT_REALTIME_CS_8814B)
+
 
 
 /* 2 REG_ST_INT_CFG_8814B(PCIE STATE CHANGE INTERRUPT CONFIGURATION) */
@@ -4782,13 +5232,15 @@
 #define BIT_SHIFT_STC_INT_EXPECT_LS_8814B 8
 #define BIT_MASK_STC_INT_EXPECT_LS_8814B 0x3f
 #define BIT_STC_INT_EXPECT_LS_8814B(x) (((x) & BIT_MASK_STC_INT_EXPECT_LS_8814B) << BIT_SHIFT_STC_INT_EXPECT_LS_8814B)
-#define BIT_GET_STC_INT_EXPECT_LS_8814B(x) (((x) >> BIT_SHIFT_STC_INT_EXPECT_LS_8814B) & BIT_MASK_STC_INT_EXPECT_LS_8814B)

+#define BIT_GET_STC_INT_EXPECT_LS_8814B(x) (((x) >> BIT_SHIFT_STC_INT_EXPECT_LS_8814B) & BIT_MASK_STC_INT_EXPECT_LS_8814B)
+
 
 
 #define BIT_SHIFT_STC_INT_EXPECT_CS_8814B 0
 #define BIT_MASK_STC_INT_EXPECT_CS_8814B 0x3f
 #define BIT_STC_INT_EXPECT_CS_8814B(x) (((x) & BIT_MASK_STC_INT_EXPECT_CS_8814B) << BIT_SHIFT_STC_INT_EXPECT_CS_8814B)
-#define BIT_GET_STC_INT_EXPECT_CS_8814B(x) (((x) >> BIT_SHIFT_STC_INT_EXPECT_CS_8814B) & BIT_MASK_STC_INT_EXPECT_CS_8814B)

+#define BIT_GET_STC_INT_EXPECT_CS_8814B(x) (((x) >> BIT_SHIFT_STC_INT_EXPECT_CS_8814B) & BIT_MASK_STC_INT_EXPECT_CS_8814B)
+
 
 
 /* 2 REG_CMU_DLY_CTRL_8814B(PCIE PHY CLOCK MGT UNIT DELAY CONTROL ) */
@@ -4798,7 +5250,8 @@
 #define BIT_SHIFT_CMU_DLY_PRE_DIV_8814B 0
 #define BIT_MASK_CMU_DLY_PRE_DIV_8814B 0xff
 #define BIT_CMU_DLY_PRE_DIV_8814B(x) (((x) & BIT_MASK_CMU_DLY_PRE_DIV_8814B) << BIT_SHIFT_CMU_DLY_PRE_DIV_8814B)
-#define BIT_GET_CMU_DLY_PRE_DIV_8814B(x) (((x) >> BIT_SHIFT_CMU_DLY_PRE_DIV_8814B) & BIT_MASK_CMU_DLY_PRE_DIV_8814B)

+#define BIT_GET_CMU_DLY_PRE_DIV_8814B(x) (((x) >> BIT_SHIFT_CMU_DLY_PRE_DIV_8814B) & BIT_MASK_CMU_DLY_PRE_DIV_8814B)
+
 
 
 /* 2 REG_CMU_DLY_CFG_8814B(PCIE PHY CLOCK MGT UNIT DELAY CONFIGURATION ) */
@@ -4806,25 +5259,29 @@
 #define BIT_SHIFT_CMU_DLY_LTR_A2I_8814B 24
 #define BIT_MASK_CMU_DLY_LTR_A2I_8814B 0xff
 #define BIT_CMU_DLY_LTR_A2I_8814B(x) (((x) & BIT_MASK_CMU_DLY_LTR_A2I_8814B) << BIT_SHIFT_CMU_DLY_LTR_A2I_8814B)
-#define BIT_GET_CMU_DLY_LTR_A2I_8814B(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_A2I_8814B) & BIT_MASK_CMU_DLY_LTR_A2I_8814B)

+#define BIT_GET_CMU_DLY_LTR_A2I_8814B(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_A2I_8814B) & BIT_MASK_CMU_DLY_LTR_A2I_8814B)
+
 
 
 #define BIT_SHIFT_CMU_DLY_LTR_I2A_8814B 16
 #define BIT_MASK_CMU_DLY_LTR_I2A_8814B 0xff
 #define BIT_CMU_DLY_LTR_I2A_8814B(x) (((x) & BIT_MASK_CMU_DLY_LTR_I2A_8814B) << BIT_SHIFT_CMU_DLY_LTR_I2A_8814B)
-#define BIT_GET_CMU_DLY_LTR_I2A_8814B(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_I2A_8814B) & BIT_MASK_CMU_DLY_LTR_I2A_8814B)

+#define BIT_GET_CMU_DLY_LTR_I2A_8814B(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_I2A_8814B) & BIT_MASK_CMU_DLY_LTR_I2A_8814B)
+
 
 
 #define BIT_SHIFT_CMU_DLY_LTR_IDLE_8814B 8
 #define BIT_MASK_CMU_DLY_LTR_IDLE_8814B 0xff
 #define BIT_CMU_DLY_LTR_IDLE_8814B(x) (((x) & BIT_MASK_CMU_DLY_LTR_IDLE_8814B) << BIT_SHIFT_CMU_DLY_LTR_IDLE_8814B)
-#define BIT_GET_CMU_DLY_LTR_IDLE_8814B(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_IDLE_8814B) & BIT_MASK_CMU_DLY_LTR_IDLE_8814B)

+#define BIT_GET_CMU_DLY_LTR_IDLE_8814B(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_IDLE_8814B) & BIT_MASK_CMU_DLY_LTR_IDLE_8814B)
+
 
 
 #define BIT_SHIFT_CMU_DLY_LTR_ACT_8814B 0
 #define BIT_MASK_CMU_DLY_LTR_ACT_8814B 0xff
 #define BIT_CMU_DLY_LTR_ACT_8814B(x) (((x) & BIT_MASK_CMU_DLY_LTR_ACT_8814B) << BIT_SHIFT_CMU_DLY_LTR_ACT_8814B)
-#define BIT_GET_CMU_DLY_LTR_ACT_8814B(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_ACT_8814B) & BIT_MASK_CMU_DLY_LTR_ACT_8814B)

+#define BIT_GET_CMU_DLY_LTR_ACT_8814B(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_ACT_8814B) & BIT_MASK_CMU_DLY_LTR_ACT_8814B)
+
 
 
 /* 2 REG_H2CQ_TXBD_DESA_8814B */
@@ -4832,7 +5289,8 @@
 #define BIT_SHIFT_H2CQ_TXBD_DESA_8814B 0
 #define BIT_MASK_H2CQ_TXBD_DESA_8814B 0xffffffffffffffffL
 #define BIT_H2CQ_TXBD_DESA_8814B(x) (((x) & BIT_MASK_H2CQ_TXBD_DESA_8814B) << BIT_SHIFT_H2CQ_TXBD_DESA_8814B)
-#define BIT_GET_H2CQ_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_H2CQ_TXBD_DESA_8814B) & BIT_MASK_H2CQ_TXBD_DESA_8814B)

+#define BIT_GET_H2CQ_TXBD_DESA_8814B(x) (((x) >> BIT_SHIFT_H2CQ_TXBD_DESA_8814B) & BIT_MASK_H2CQ_TXBD_DESA_8814B)
+
 
 
 /* 2 REG_H2CQ_TXBD_NUM_8814B */
@@ -4841,13 +5299,15 @@
 #define BIT_SHIFT_H2CQ_DESC_MODE_8814B 12
 #define BIT_MASK_H2CQ_DESC_MODE_8814B 0x3
 #define BIT_H2CQ_DESC_MODE_8814B(x) (((x) & BIT_MASK_H2CQ_DESC_MODE_8814B) << BIT_SHIFT_H2CQ_DESC_MODE_8814B)
-#define BIT_GET_H2CQ_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_H2CQ_DESC_MODE_8814B) & BIT_MASK_H2CQ_DESC_MODE_8814B)

+#define BIT_GET_H2CQ_DESC_MODE_8814B(x) (((x) >> BIT_SHIFT_H2CQ_DESC_MODE_8814B) & BIT_MASK_H2CQ_DESC_MODE_8814B)
+
 
 
 #define BIT_SHIFT_H2CQ_DESC_NUM_8814B 0
 #define BIT_MASK_H2CQ_DESC_NUM_8814B 0xfff
 #define BIT_H2CQ_DESC_NUM_8814B(x) (((x) & BIT_MASK_H2CQ_DESC_NUM_8814B) << BIT_SHIFT_H2CQ_DESC_NUM_8814B)
-#define BIT_GET_H2CQ_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_H2CQ_DESC_NUM_8814B) & BIT_MASK_H2CQ_DESC_NUM_8814B)

+#define BIT_GET_H2CQ_DESC_NUM_8814B(x) (((x) >> BIT_SHIFT_H2CQ_DESC_NUM_8814B) & BIT_MASK_H2CQ_DESC_NUM_8814B)
+
 
 
 /* 2 REG_H2CQ_TXBD_IDX_8814B */
@@ -4855,13 +5315,15 @@
 #define BIT_SHIFT_H2CQ_HW_IDX_8814B 16
 #define BIT_MASK_H2CQ_HW_IDX_8814B 0xfff
 #define BIT_H2CQ_HW_IDX_8814B(x) (((x) & BIT_MASK_H2CQ_HW_IDX_8814B) << BIT_SHIFT_H2CQ_HW_IDX_8814B)
-#define BIT_GET_H2CQ_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_H2CQ_HW_IDX_8814B) & BIT_MASK_H2CQ_HW_IDX_8814B)

+#define BIT_GET_H2CQ_HW_IDX_8814B(x) (((x) >> BIT_SHIFT_H2CQ_HW_IDX_8814B) & BIT_MASK_H2CQ_HW_IDX_8814B)
+
 
 
 #define BIT_SHIFT_H2CQ_HOST_IDX_8814B 0
 #define BIT_MASK_H2CQ_HOST_IDX_8814B 0xfff
 #define BIT_H2CQ_HOST_IDX_8814B(x) (((x) & BIT_MASK_H2CQ_HOST_IDX_8814B) << BIT_SHIFT_H2CQ_HOST_IDX_8814B)
-#define BIT_GET_H2CQ_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_H2CQ_HOST_IDX_8814B) & BIT_MASK_H2CQ_HOST_IDX_8814B)

+#define BIT_GET_H2CQ_HOST_IDX_8814B(x) (((x) >> BIT_SHIFT_H2CQ_HOST_IDX_8814B) & BIT_MASK_H2CQ_HOST_IDX_8814B)
+
 
 
 /* 2 REG_H2CQ_CSR_8814B[31:0] (H2CQ CONTROL AND STATUS) */
@@ -4874,26 +5336,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q0_V1_8814B 25
 #define BIT_MASK_QUEUEMACID_Q0_V1_8814B 0x7f
 #define BIT_QUEUEMACID_Q0_V1_8814B(x) (((x) & BIT_MASK_QUEUEMACID_Q0_V1_8814B) << BIT_SHIFT_QUEUEMACID_Q0_V1_8814B)
-#define BIT_GET_QUEUEMACID_Q0_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q0_V1_8814B) & BIT_MASK_QUEUEMACID_Q0_V1_8814B)

+#define BIT_GET_QUEUEMACID_Q0_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q0_V1_8814B) & BIT_MASK_QUEUEMACID_Q0_V1_8814B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q0_V1_8814B 23
 #define BIT_MASK_QUEUEAC_Q0_V1_8814B 0x3
 #define BIT_QUEUEAC_Q0_V1_8814B(x) (((x) & BIT_MASK_QUEUEAC_Q0_V1_8814B) << BIT_SHIFT_QUEUEAC_Q0_V1_8814B)
-#define BIT_GET_QUEUEAC_Q0_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q0_V1_8814B) & BIT_MASK_QUEUEAC_Q0_V1_8814B)

+#define BIT_GET_QUEUEAC_Q0_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q0_V1_8814B) & BIT_MASK_QUEUEAC_Q0_V1_8814B)
+
 
 #define BIT_TIDEMPTY_Q0_V1_8814B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q0_V2_8814B 11
 #define BIT_MASK_TAIL_PKT_Q0_V2_8814B 0x7ff
 #define BIT_TAIL_PKT_Q0_V2_8814B(x) (((x) & BIT_MASK_TAIL_PKT_Q0_V2_8814B) << BIT_SHIFT_TAIL_PKT_Q0_V2_8814B)
-#define BIT_GET_TAIL_PKT_Q0_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q0_V2_8814B) & BIT_MASK_TAIL_PKT_Q0_V2_8814B)

+#define BIT_GET_TAIL_PKT_Q0_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q0_V2_8814B) & BIT_MASK_TAIL_PKT_Q0_V2_8814B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q0_V1_8814B 0
 #define BIT_MASK_HEAD_PKT_Q0_V1_8814B 0x7ff
 #define BIT_HEAD_PKT_Q0_V1_8814B(x) (((x) & BIT_MASK_HEAD_PKT_Q0_V1_8814B) << BIT_SHIFT_HEAD_PKT_Q0_V1_8814B)
-#define BIT_GET_HEAD_PKT_Q0_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q0_V1_8814B) & BIT_MASK_HEAD_PKT_Q0_V1_8814B)

+#define BIT_GET_HEAD_PKT_Q0_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q0_V1_8814B) & BIT_MASK_HEAD_PKT_Q0_V1_8814B)
+
 
 
 /* 2 REG_Q1_INFO_8814B */
@@ -4901,26 +5367,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q1_V1_8814B 25
 #define BIT_MASK_QUEUEMACID_Q1_V1_8814B 0x7f
 #define BIT_QUEUEMACID_Q1_V1_8814B(x) (((x) & BIT_MASK_QUEUEMACID_Q1_V1_8814B) << BIT_SHIFT_QUEUEMACID_Q1_V1_8814B)
-#define BIT_GET_QUEUEMACID_Q1_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q1_V1_8814B) & BIT_MASK_QUEUEMACID_Q1_V1_8814B)

+#define BIT_GET_QUEUEMACID_Q1_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q1_V1_8814B) & BIT_MASK_QUEUEMACID_Q1_V1_8814B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q1_V1_8814B 23
 #define BIT_MASK_QUEUEAC_Q1_V1_8814B 0x3
 #define BIT_QUEUEAC_Q1_V1_8814B(x) (((x) & BIT_MASK_QUEUEAC_Q1_V1_8814B) << BIT_SHIFT_QUEUEAC_Q1_V1_8814B)
-#define BIT_GET_QUEUEAC_Q1_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q1_V1_8814B) & BIT_MASK_QUEUEAC_Q1_V1_8814B)

+#define BIT_GET_QUEUEAC_Q1_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q1_V1_8814B) & BIT_MASK_QUEUEAC_Q1_V1_8814B)
+
 
 #define BIT_TIDEMPTY_Q1_V1_8814B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q1_V2_8814B 11
 #define BIT_MASK_TAIL_PKT_Q1_V2_8814B 0x7ff
 #define BIT_TAIL_PKT_Q1_V2_8814B(x) (((x) & BIT_MASK_TAIL_PKT_Q1_V2_8814B) << BIT_SHIFT_TAIL_PKT_Q1_V2_8814B)
-#define BIT_GET_TAIL_PKT_Q1_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q1_V2_8814B) & BIT_MASK_TAIL_PKT_Q1_V2_8814B)

+#define BIT_GET_TAIL_PKT_Q1_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q1_V2_8814B) & BIT_MASK_TAIL_PKT_Q1_V2_8814B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q1_V1_8814B 0
 #define BIT_MASK_HEAD_PKT_Q1_V1_8814B 0x7ff
 #define BIT_HEAD_PKT_Q1_V1_8814B(x) (((x) & BIT_MASK_HEAD_PKT_Q1_V1_8814B) << BIT_SHIFT_HEAD_PKT_Q1_V1_8814B)
-#define BIT_GET_HEAD_PKT_Q1_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q1_V1_8814B) & BIT_MASK_HEAD_PKT_Q1_V1_8814B)

+#define BIT_GET_HEAD_PKT_Q1_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q1_V1_8814B) & BIT_MASK_HEAD_PKT_Q1_V1_8814B)
+
 
 
 /* 2 REG_Q2_INFO_8814B */
@@ -4928,26 +5398,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q2_V1_8814B 25
 #define BIT_MASK_QUEUEMACID_Q2_V1_8814B 0x7f
 #define BIT_QUEUEMACID_Q2_V1_8814B(x) (((x) & BIT_MASK_QUEUEMACID_Q2_V1_8814B) << BIT_SHIFT_QUEUEMACID_Q2_V1_8814B)
-#define BIT_GET_QUEUEMACID_Q2_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q2_V1_8814B) & BIT_MASK_QUEUEMACID_Q2_V1_8814B)

+#define BIT_GET_QUEUEMACID_Q2_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q2_V1_8814B) & BIT_MASK_QUEUEMACID_Q2_V1_8814B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q2_V1_8814B 23
 #define BIT_MASK_QUEUEAC_Q2_V1_8814B 0x3
 #define BIT_QUEUEAC_Q2_V1_8814B(x) (((x) & BIT_MASK_QUEUEAC_Q2_V1_8814B) << BIT_SHIFT_QUEUEAC_Q2_V1_8814B)
-#define BIT_GET_QUEUEAC_Q2_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q2_V1_8814B) & BIT_MASK_QUEUEAC_Q2_V1_8814B)

+#define BIT_GET_QUEUEAC_Q2_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q2_V1_8814B) & BIT_MASK_QUEUEAC_Q2_V1_8814B)
+
 
 #define BIT_TIDEMPTY_Q2_V1_8814B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q2_V2_8814B 11
 #define BIT_MASK_TAIL_PKT_Q2_V2_8814B 0x7ff
 #define BIT_TAIL_PKT_Q2_V2_8814B(x) (((x) & BIT_MASK_TAIL_PKT_Q2_V2_8814B) << BIT_SHIFT_TAIL_PKT_Q2_V2_8814B)
-#define BIT_GET_TAIL_PKT_Q2_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q2_V2_8814B) & BIT_MASK_TAIL_PKT_Q2_V2_8814B)

+#define BIT_GET_TAIL_PKT_Q2_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q2_V2_8814B) & BIT_MASK_TAIL_PKT_Q2_V2_8814B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q2_V1_8814B 0
 #define BIT_MASK_HEAD_PKT_Q2_V1_8814B 0x7ff
 #define BIT_HEAD_PKT_Q2_V1_8814B(x) (((x) & BIT_MASK_HEAD_PKT_Q2_V1_8814B) << BIT_SHIFT_HEAD_PKT_Q2_V1_8814B)
-#define BIT_GET_HEAD_PKT_Q2_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q2_V1_8814B) & BIT_MASK_HEAD_PKT_Q2_V1_8814B)

+#define BIT_GET_HEAD_PKT_Q2_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q2_V1_8814B) & BIT_MASK_HEAD_PKT_Q2_V1_8814B)
+
 
 
 /* 2 REG_Q3_INFO_8814B */
@@ -4955,26 +5429,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q3_V1_8814B 25
 #define BIT_MASK_QUEUEMACID_Q3_V1_8814B 0x7f
 #define BIT_QUEUEMACID_Q3_V1_8814B(x) (((x) & BIT_MASK_QUEUEMACID_Q3_V1_8814B) << BIT_SHIFT_QUEUEMACID_Q3_V1_8814B)
-#define BIT_GET_QUEUEMACID_Q3_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q3_V1_8814B) & BIT_MASK_QUEUEMACID_Q3_V1_8814B)

+#define BIT_GET_QUEUEMACID_Q3_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q3_V1_8814B) & BIT_MASK_QUEUEMACID_Q3_V1_8814B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q3_V1_8814B 23
 #define BIT_MASK_QUEUEAC_Q3_V1_8814B 0x3
 #define BIT_QUEUEAC_Q3_V1_8814B(x) (((x) & BIT_MASK_QUEUEAC_Q3_V1_8814B) << BIT_SHIFT_QUEUEAC_Q3_V1_8814B)
-#define BIT_GET_QUEUEAC_Q3_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q3_V1_8814B) & BIT_MASK_QUEUEAC_Q3_V1_8814B)

+#define BIT_GET_QUEUEAC_Q3_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q3_V1_8814B) & BIT_MASK_QUEUEAC_Q3_V1_8814B)
+
 
 #define BIT_TIDEMPTY_Q3_V1_8814B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q3_V2_8814B 11
 #define BIT_MASK_TAIL_PKT_Q3_V2_8814B 0x7ff
 #define BIT_TAIL_PKT_Q3_V2_8814B(x) (((x) & BIT_MASK_TAIL_PKT_Q3_V2_8814B) << BIT_SHIFT_TAIL_PKT_Q3_V2_8814B)
-#define BIT_GET_TAIL_PKT_Q3_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q3_V2_8814B) & BIT_MASK_TAIL_PKT_Q3_V2_8814B)

+#define BIT_GET_TAIL_PKT_Q3_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q3_V2_8814B) & BIT_MASK_TAIL_PKT_Q3_V2_8814B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q3_V1_8814B 0
 #define BIT_MASK_HEAD_PKT_Q3_V1_8814B 0x7ff
 #define BIT_HEAD_PKT_Q3_V1_8814B(x) (((x) & BIT_MASK_HEAD_PKT_Q3_V1_8814B) << BIT_SHIFT_HEAD_PKT_Q3_V1_8814B)
-#define BIT_GET_HEAD_PKT_Q3_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q3_V1_8814B) & BIT_MASK_HEAD_PKT_Q3_V1_8814B)

+#define BIT_GET_HEAD_PKT_Q3_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q3_V1_8814B) & BIT_MASK_HEAD_PKT_Q3_V1_8814B)
+
 
 
 /* 2 REG_MGQ_INFO_8814B */
@@ -4982,26 +5460,30 @@
 #define BIT_SHIFT_QUEUEMACID_MGQ_V1_8814B 25
 #define BIT_MASK_QUEUEMACID_MGQ_V1_8814B 0x7f
 #define BIT_QUEUEMACID_MGQ_V1_8814B(x) (((x) & BIT_MASK_QUEUEMACID_MGQ_V1_8814B) << BIT_SHIFT_QUEUEMACID_MGQ_V1_8814B)
-#define BIT_GET_QUEUEMACID_MGQ_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_MGQ_V1_8814B) & BIT_MASK_QUEUEMACID_MGQ_V1_8814B)

+#define BIT_GET_QUEUEMACID_MGQ_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_MGQ_V1_8814B) & BIT_MASK_QUEUEMACID_MGQ_V1_8814B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_MGQ_V1_8814B 23
 #define BIT_MASK_QUEUEAC_MGQ_V1_8814B 0x3
 #define BIT_QUEUEAC_MGQ_V1_8814B(x) (((x) & BIT_MASK_QUEUEAC_MGQ_V1_8814B) << BIT_SHIFT_QUEUEAC_MGQ_V1_8814B)
-#define BIT_GET_QUEUEAC_MGQ_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_MGQ_V1_8814B) & BIT_MASK_QUEUEAC_MGQ_V1_8814B)

+#define BIT_GET_QUEUEAC_MGQ_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_MGQ_V1_8814B) & BIT_MASK_QUEUEAC_MGQ_V1_8814B)
+
 
 #define BIT_TIDEMPTY_MGQ_V1_8814B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_MGQ_V2_8814B 11
 #define BIT_MASK_TAIL_PKT_MGQ_V2_8814B 0x7ff
 #define BIT_TAIL_PKT_MGQ_V2_8814B(x) (((x) & BIT_MASK_TAIL_PKT_MGQ_V2_8814B) << BIT_SHIFT_TAIL_PKT_MGQ_V2_8814B)
-#define BIT_GET_TAIL_PKT_MGQ_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_MGQ_V2_8814B) & BIT_MASK_TAIL_PKT_MGQ_V2_8814B)

+#define BIT_GET_TAIL_PKT_MGQ_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_MGQ_V2_8814B) & BIT_MASK_TAIL_PKT_MGQ_V2_8814B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_MGQ_V1_8814B 0
 #define BIT_MASK_HEAD_PKT_MGQ_V1_8814B 0x7ff
 #define BIT_HEAD_PKT_MGQ_V1_8814B(x) (((x) & BIT_MASK_HEAD_PKT_MGQ_V1_8814B) << BIT_SHIFT_HEAD_PKT_MGQ_V1_8814B)
-#define BIT_GET_HEAD_PKT_MGQ_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_MGQ_V1_8814B) & BIT_MASK_HEAD_PKT_MGQ_V1_8814B)

+#define BIT_GET_HEAD_PKT_MGQ_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_MGQ_V1_8814B) & BIT_MASK_HEAD_PKT_MGQ_V1_8814B)
+
 
 
 /* 2 REG_HIQ_INFO_8814B */
@@ -5009,26 +5491,30 @@
 #define BIT_SHIFT_QUEUEMACID_HIQ_V1_8814B 25
 #define BIT_MASK_QUEUEMACID_HIQ_V1_8814B 0x7f
 #define BIT_QUEUEMACID_HIQ_V1_8814B(x) (((x) & BIT_MASK_QUEUEMACID_HIQ_V1_8814B) << BIT_SHIFT_QUEUEMACID_HIQ_V1_8814B)
-#define BIT_GET_QUEUEMACID_HIQ_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_HIQ_V1_8814B) & BIT_MASK_QUEUEMACID_HIQ_V1_8814B)

+#define BIT_GET_QUEUEMACID_HIQ_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_HIQ_V1_8814B) & BIT_MASK_QUEUEMACID_HIQ_V1_8814B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_HIQ_V1_8814B 23
 #define BIT_MASK_QUEUEAC_HIQ_V1_8814B 0x3
 #define BIT_QUEUEAC_HIQ_V1_8814B(x) (((x) & BIT_MASK_QUEUEAC_HIQ_V1_8814B) << BIT_SHIFT_QUEUEAC_HIQ_V1_8814B)
-#define BIT_GET_QUEUEAC_HIQ_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_HIQ_V1_8814B) & BIT_MASK_QUEUEAC_HIQ_V1_8814B)

+#define BIT_GET_QUEUEAC_HIQ_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_HIQ_V1_8814B) & BIT_MASK_QUEUEAC_HIQ_V1_8814B)
+
 
 #define BIT_TIDEMPTY_HIQ_V1_8814B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_HIQ_V2_8814B 11
 #define BIT_MASK_TAIL_PKT_HIQ_V2_8814B 0x7ff
 #define BIT_TAIL_PKT_HIQ_V2_8814B(x) (((x) & BIT_MASK_TAIL_PKT_HIQ_V2_8814B) << BIT_SHIFT_TAIL_PKT_HIQ_V2_8814B)
-#define BIT_GET_TAIL_PKT_HIQ_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_HIQ_V2_8814B) & BIT_MASK_TAIL_PKT_HIQ_V2_8814B)

+#define BIT_GET_TAIL_PKT_HIQ_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_HIQ_V2_8814B) & BIT_MASK_TAIL_PKT_HIQ_V2_8814B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_HIQ_V1_8814B 0
 #define BIT_MASK_HEAD_PKT_HIQ_V1_8814B 0x7ff
 #define BIT_HEAD_PKT_HIQ_V1_8814B(x) (((x) & BIT_MASK_HEAD_PKT_HIQ_V1_8814B) << BIT_SHIFT_HEAD_PKT_HIQ_V1_8814B)
-#define BIT_GET_HEAD_PKT_HIQ_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_HIQ_V1_8814B) & BIT_MASK_HEAD_PKT_HIQ_V1_8814B)

+#define BIT_GET_HEAD_PKT_HIQ_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_HIQ_V1_8814B) & BIT_MASK_HEAD_PKT_HIQ_V1_8814B)
+
 
 
 /* 2 REG_BCNQ_INFO_8814B */
@@ -5036,7 +5522,8 @@
 #define BIT_SHIFT_BCNQ_HEAD_PG_V1_8814B 0
 #define BIT_MASK_BCNQ_HEAD_PG_V1_8814B 0xfff
 #define BIT_BCNQ_HEAD_PG_V1_8814B(x) (((x) & BIT_MASK_BCNQ_HEAD_PG_V1_8814B) << BIT_SHIFT_BCNQ_HEAD_PG_V1_8814B)
-#define BIT_GET_BCNQ_HEAD_PG_V1_8814B(x) (((x) >> BIT_SHIFT_BCNQ_HEAD_PG_V1_8814B) & BIT_MASK_BCNQ_HEAD_PG_V1_8814B)

+#define BIT_GET_BCNQ_HEAD_PG_V1_8814B(x) (((x) >> BIT_SHIFT_BCNQ_HEAD_PG_V1_8814B) & BIT_MASK_BCNQ_HEAD_PG_V1_8814B)
+
 
 
 /* 2 REG_TXPKT_EMPTY_8814B */
@@ -5062,7 +5549,8 @@
 #define BIT_SHIFT_FW_FREE_TAIL_V1_8814B 0
 #define BIT_MASK_FW_FREE_TAIL_V1_8814B 0xfff
 #define BIT_FW_FREE_TAIL_V1_8814B(x) (((x) & BIT_MASK_FW_FREE_TAIL_V1_8814B) << BIT_SHIFT_FW_FREE_TAIL_V1_8814B)
-#define BIT_GET_FW_FREE_TAIL_V1_8814B(x) (((x) >> BIT_SHIFT_FW_FREE_TAIL_V1_8814B) & BIT_MASK_FW_FREE_TAIL_V1_8814B)

+#define BIT_GET_FW_FREE_TAIL_V1_8814B(x) (((x) >> BIT_SHIFT_FW_FREE_TAIL_V1_8814B) & BIT_MASK_FW_FREE_TAIL_V1_8814B)
+
 
 
 /* 2 REG_FWHW_TXQ_CTRL_8814B */
@@ -5074,7 +5562,8 @@
 #define BIT_SHIFT_EN_QUEUE_RPT_8814B 8
 #define BIT_MASK_EN_QUEUE_RPT_8814B 0xff
 #define BIT_EN_QUEUE_RPT_8814B(x) (((x) & BIT_MASK_EN_QUEUE_RPT_8814B) << BIT_SHIFT_EN_QUEUE_RPT_8814B)
-#define BIT_GET_EN_QUEUE_RPT_8814B(x) (((x) >> BIT_SHIFT_EN_QUEUE_RPT_8814B) & BIT_MASK_EN_QUEUE_RPT_8814B)

+#define BIT_GET_EN_QUEUE_RPT_8814B(x) (((x) >> BIT_SHIFT_EN_QUEUE_RPT_8814B) & BIT_MASK_EN_QUEUE_RPT_8814B)
+
 
 #define BIT_EN_RTY_BK_8814B BIT(7)
 #define BIT_EN_USE_INI_RAT_8814B BIT(6)
@@ -5091,7 +5580,8 @@
 #define BIT_SHIFT__R_DATA_FALLBACK_SEL_8814B 0
 #define BIT_MASK__R_DATA_FALLBACK_SEL_8814B 0x3
 #define BIT__R_DATA_FALLBACK_SEL_8814B(x) (((x) & BIT_MASK__R_DATA_FALLBACK_SEL_8814B) << BIT_SHIFT__R_DATA_FALLBACK_SEL_8814B)
-#define BIT_GET__R_DATA_FALLBACK_SEL_8814B(x) (((x) >> BIT_SHIFT__R_DATA_FALLBACK_SEL_8814B) & BIT_MASK__R_DATA_FALLBACK_SEL_8814B)

+#define BIT_GET__R_DATA_FALLBACK_SEL_8814B(x) (((x) >> BIT_SHIFT__R_DATA_FALLBACK_SEL_8814B) & BIT_MASK__R_DATA_FALLBACK_SEL_8814B)
+
 
 
 /* 2 REG_BCNQ_BDNY_V1_8814B */
@@ -5099,7 +5589,8 @@
 #define BIT_SHIFT_BCNQ_PGBNDY_V1_8814B 0
 #define BIT_MASK_BCNQ_PGBNDY_V1_8814B 0xfff
 #define BIT_BCNQ_PGBNDY_V1_8814B(x) (((x) & BIT_MASK_BCNQ_PGBNDY_V1_8814B) << BIT_SHIFT_BCNQ_PGBNDY_V1_8814B)
-#define BIT_GET_BCNQ_PGBNDY_V1_8814B(x) (((x) >> BIT_SHIFT_BCNQ_PGBNDY_V1_8814B) & BIT_MASK_BCNQ_PGBNDY_V1_8814B)

+#define BIT_GET_BCNQ_PGBNDY_V1_8814B(x) (((x) >> BIT_SHIFT_BCNQ_PGBNDY_V1_8814B) & BIT_MASK_BCNQ_PGBNDY_V1_8814B)
+
 
 
 /* 2 REG_LIFETIME_EN_8814B */
@@ -5118,13 +5609,15 @@
 #define BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8814B 8
 #define BIT_MASK_SPEC_SIFS_OFDM_PTCL_8814B 0xff
 #define BIT_SPEC_SIFS_OFDM_PTCL_8814B(x) (((x) & BIT_MASK_SPEC_SIFS_OFDM_PTCL_8814B) << BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8814B)
-#define BIT_GET_SPEC_SIFS_OFDM_PTCL_8814B(x) (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8814B) & BIT_MASK_SPEC_SIFS_OFDM_PTCL_8814B)

+#define BIT_GET_SPEC_SIFS_OFDM_PTCL_8814B(x) (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8814B) & BIT_MASK_SPEC_SIFS_OFDM_PTCL_8814B)
+
 
 
 #define BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8814B 0
 #define BIT_MASK_SPEC_SIFS_CCK_PTCL_8814B 0xff
 #define BIT_SPEC_SIFS_CCK_PTCL_8814B(x) (((x) & BIT_MASK_SPEC_SIFS_CCK_PTCL_8814B) << BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8814B)
-#define BIT_GET_SPEC_SIFS_CCK_PTCL_8814B(x) (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8814B) & BIT_MASK_SPEC_SIFS_CCK_PTCL_8814B)

+#define BIT_GET_SPEC_SIFS_CCK_PTCL_8814B(x) (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8814B) & BIT_MASK_SPEC_SIFS_CCK_PTCL_8814B)
+
 
 
 /* 2 REG_RETRY_LIMIT_8814B */
@@ -5132,13 +5625,15 @@
 #define BIT_SHIFT_SRL_8814B 8
 #define BIT_MASK_SRL_8814B 0x3f
 #define BIT_SRL_8814B(x) (((x) & BIT_MASK_SRL_8814B) << BIT_SHIFT_SRL_8814B)
-#define BIT_GET_SRL_8814B(x) (((x) >> BIT_SHIFT_SRL_8814B) & BIT_MASK_SRL_8814B)

+#define BIT_GET_SRL_8814B(x) (((x) >> BIT_SHIFT_SRL_8814B) & BIT_MASK_SRL_8814B)
+
 
 
 #define BIT_SHIFT_LRL_8814B 0
 #define BIT_MASK_LRL_8814B 0x3f
 #define BIT_LRL_8814B(x) (((x) & BIT_MASK_LRL_8814B) << BIT_SHIFT_LRL_8814B)
-#define BIT_GET_LRL_8814B(x) (((x) >> BIT_SHIFT_LRL_8814B) & BIT_MASK_LRL_8814B)

+#define BIT_GET_LRL_8814B(x) (((x) >> BIT_SHIFT_LRL_8814B) & BIT_MASK_LRL_8814B)
+
 
 
 /* 2 REG_TXBF_CTRL_8814B */
@@ -5153,7 +5648,8 @@
 #define BIT_SHIFT_R_TXBF1_AID_8814B 16
 #define BIT_MASK_R_TXBF1_AID_8814B 0x1ff
 #define BIT_R_TXBF1_AID_8814B(x) (((x) & BIT_MASK_R_TXBF1_AID_8814B) << BIT_SHIFT_R_TXBF1_AID_8814B)
-#define BIT_GET_R_TXBF1_AID_8814B(x) (((x) >> BIT_SHIFT_R_TXBF1_AID_8814B) & BIT_MASK_R_TXBF1_AID_8814B)

+#define BIT_GET_R_TXBF1_AID_8814B(x) (((x) >> BIT_SHIFT_R_TXBF1_AID_8814B) & BIT_MASK_R_TXBF1_AID_8814B)
+
 
 #define BIT_DIS_NDP_BFEN_8814B BIT(15)
 #define BIT_R_TXBCN_NOBLOCK_NDP_8814B BIT(14)
@@ -5164,7 +5660,8 @@
 #define BIT_SHIFT_R_TXBF0_AID_8814B 0
 #define BIT_MASK_R_TXBF0_AID_8814B 0x1ff
 #define BIT_R_TXBF0_AID_8814B(x) (((x) & BIT_MASK_R_TXBF0_AID_8814B) << BIT_SHIFT_R_TXBF0_AID_8814B)
-#define BIT_GET_R_TXBF0_AID_8814B(x) (((x) >> BIT_SHIFT_R_TXBF0_AID_8814B) & BIT_MASK_R_TXBF0_AID_8814B)

+#define BIT_GET_R_TXBF0_AID_8814B(x) (((x) >> BIT_SHIFT_R_TXBF0_AID_8814B) & BIT_MASK_R_TXBF0_AID_8814B)
+
 
 
 /* 2 REG_DARFRC_8814B */
@@ -5172,49 +5669,57 @@
 #define BIT_SHIFT_DARF_RC8_8814B (56 & CPU_OPT_WIDTH)
 #define BIT_MASK_DARF_RC8_8814B 0x1f
 #define BIT_DARF_RC8_8814B(x) (((x) & BIT_MASK_DARF_RC8_8814B) << BIT_SHIFT_DARF_RC8_8814B)
-#define BIT_GET_DARF_RC8_8814B(x) (((x) >> BIT_SHIFT_DARF_RC8_8814B) & BIT_MASK_DARF_RC8_8814B)

+#define BIT_GET_DARF_RC8_8814B(x) (((x) >> BIT_SHIFT_DARF_RC8_8814B) & BIT_MASK_DARF_RC8_8814B)
+
 
 
 #define BIT_SHIFT_DARF_RC7_8814B (48 & CPU_OPT_WIDTH)
 #define BIT_MASK_DARF_RC7_8814B 0x1f
 #define BIT_DARF_RC7_8814B(x) (((x) & BIT_MASK_DARF_RC7_8814B) << BIT_SHIFT_DARF_RC7_8814B)
-#define BIT_GET_DARF_RC7_8814B(x) (((x) >> BIT_SHIFT_DARF_RC7_8814B) & BIT_MASK_DARF_RC7_8814B)

+#define BIT_GET_DARF_RC7_8814B(x) (((x) >> BIT_SHIFT_DARF_RC7_8814B) & BIT_MASK_DARF_RC7_8814B)
+
 
 
 #define BIT_SHIFT_DARF_RC6_8814B (40 & CPU_OPT_WIDTH)
 #define BIT_MASK_DARF_RC6_8814B 0x1f
 #define BIT_DARF_RC6_8814B(x) (((x) & BIT_MASK_DARF_RC6_8814B) << BIT_SHIFT_DARF_RC6_8814B)
-#define BIT_GET_DARF_RC6_8814B(x) (((x) >> BIT_SHIFT_DARF_RC6_8814B) & BIT_MASK_DARF_RC6_8814B)

+#define BIT_GET_DARF_RC6_8814B(x) (((x) >> BIT_SHIFT_DARF_RC6_8814B) & BIT_MASK_DARF_RC6_8814B)
+
 
 
 #define BIT_SHIFT_DARF_RC5_8814B (32 & CPU_OPT_WIDTH)
 #define BIT_MASK_DARF_RC5_8814B 0x1f
 #define BIT_DARF_RC5_8814B(x) (((x) & BIT_MASK_DARF_RC5_8814B) << BIT_SHIFT_DARF_RC5_8814B)
-#define BIT_GET_DARF_RC5_8814B(x) (((x) >> BIT_SHIFT_DARF_RC5_8814B) & BIT_MASK_DARF_RC5_8814B)

+#define BIT_GET_DARF_RC5_8814B(x) (((x) >> BIT_SHIFT_DARF_RC5_8814B) & BIT_MASK_DARF_RC5_8814B)
+
 
 
 #define BIT_SHIFT_DARF_RC4_8814B 24
 #define BIT_MASK_DARF_RC4_8814B 0x1f
 #define BIT_DARF_RC4_8814B(x) (((x) & BIT_MASK_DARF_RC4_8814B) << BIT_SHIFT_DARF_RC4_8814B)
-#define BIT_GET_DARF_RC4_8814B(x) (((x) >> BIT_SHIFT_DARF_RC4_8814B) & BIT_MASK_DARF_RC4_8814B)

+#define BIT_GET_DARF_RC4_8814B(x) (((x) >> BIT_SHIFT_DARF_RC4_8814B) & BIT_MASK_DARF_RC4_8814B)
+
 
 
 #define BIT_SHIFT_DARF_RC3_8814B 16
 #define BIT_MASK_DARF_RC3_8814B 0x1f
 #define BIT_DARF_RC3_8814B(x) (((x) & BIT_MASK_DARF_RC3_8814B) << BIT_SHIFT_DARF_RC3_8814B)
-#define BIT_GET_DARF_RC3_8814B(x) (((x) >> BIT_SHIFT_DARF_RC3_8814B) & BIT_MASK_DARF_RC3_8814B)

+#define BIT_GET_DARF_RC3_8814B(x) (((x) >> BIT_SHIFT_DARF_RC3_8814B) & BIT_MASK_DARF_RC3_8814B)
+
 
 
 #define BIT_SHIFT_DARF_RC2_8814B 8
 #define BIT_MASK_DARF_RC2_8814B 0x1f
 #define BIT_DARF_RC2_8814B(x) (((x) & BIT_MASK_DARF_RC2_8814B) << BIT_SHIFT_DARF_RC2_8814B)
-#define BIT_GET_DARF_RC2_8814B(x) (((x) >> BIT_SHIFT_DARF_RC2_8814B) & BIT_MASK_DARF_RC2_8814B)

+#define BIT_GET_DARF_RC2_8814B(x) (((x) >> BIT_SHIFT_DARF_RC2_8814B) & BIT_MASK_DARF_RC2_8814B)
+
 
 
 #define BIT_SHIFT_DARF_RC1_8814B 0
 #define BIT_MASK_DARF_RC1_8814B 0x1f
 #define BIT_DARF_RC1_8814B(x) (((x) & BIT_MASK_DARF_RC1_8814B) << BIT_SHIFT_DARF_RC1_8814B)
-#define BIT_GET_DARF_RC1_8814B(x) (((x) >> BIT_SHIFT_DARF_RC1_8814B) & BIT_MASK_DARF_RC1_8814B)

+#define BIT_GET_DARF_RC1_8814B(x) (((x) >> BIT_SHIFT_DARF_RC1_8814B) & BIT_MASK_DARF_RC1_8814B)
+
 
 
 /* 2 REG_RARFRC_8814B */
@@ -5222,49 +5727,57 @@
 #define BIT_SHIFT_RARF_RC8_8814B (56 & CPU_OPT_WIDTH)
 #define BIT_MASK_RARF_RC8_8814B 0x1f
 #define BIT_RARF_RC8_8814B(x) (((x) & BIT_MASK_RARF_RC8_8814B) << BIT_SHIFT_RARF_RC8_8814B)
-#define BIT_GET_RARF_RC8_8814B(x) (((x) >> BIT_SHIFT_RARF_RC8_8814B) & BIT_MASK_RARF_RC8_8814B)

+#define BIT_GET_RARF_RC8_8814B(x) (((x) >> BIT_SHIFT_RARF_RC8_8814B) & BIT_MASK_RARF_RC8_8814B)
+
 
 
 #define BIT_SHIFT_RARF_RC7_8814B (48 & CPU_OPT_WIDTH)
 #define BIT_MASK_RARF_RC7_8814B 0x1f
 #define BIT_RARF_RC7_8814B(x) (((x) & BIT_MASK_RARF_RC7_8814B) << BIT_SHIFT_RARF_RC7_8814B)
-#define BIT_GET_RARF_RC7_8814B(x) (((x) >> BIT_SHIFT_RARF_RC7_8814B) & BIT_MASK_RARF_RC7_8814B)

+#define BIT_GET_RARF_RC7_8814B(x) (((x) >> BIT_SHIFT_RARF_RC7_8814B) & BIT_MASK_RARF_RC7_8814B)
+
 
 
 #define BIT_SHIFT_RARF_RC6_8814B (40 & CPU_OPT_WIDTH)
 #define BIT_MASK_RARF_RC6_8814B 0x1f
 #define BIT_RARF_RC6_8814B(x) (((x) & BIT_MASK_RARF_RC6_8814B) << BIT_SHIFT_RARF_RC6_8814B)
-#define BIT_GET_RARF_RC6_8814B(x) (((x) >> BIT_SHIFT_RARF_RC6_8814B) & BIT_MASK_RARF_RC6_8814B)

+#define BIT_GET_RARF_RC6_8814B(x) (((x) >> BIT_SHIFT_RARF_RC6_8814B) & BIT_MASK_RARF_RC6_8814B)
+
 
 
 #define BIT_SHIFT_RARF_RC5_8814B (32 & CPU_OPT_WIDTH)
 #define BIT_MASK_RARF_RC5_8814B 0x1f
 #define BIT_RARF_RC5_8814B(x) (((x) & BIT_MASK_RARF_RC5_8814B) << BIT_SHIFT_RARF_RC5_8814B)
-#define BIT_GET_RARF_RC5_8814B(x) (((x) >> BIT_SHIFT_RARF_RC5_8814B) & BIT_MASK_RARF_RC5_8814B)

+#define BIT_GET_RARF_RC5_8814B(x) (((x) >> BIT_SHIFT_RARF_RC5_8814B) & BIT_MASK_RARF_RC5_8814B)
+
 
 
 #define BIT_SHIFT_RARF_RC4_8814B 24
 #define BIT_MASK_RARF_RC4_8814B 0x1f
 #define BIT_RARF_RC4_8814B(x) (((x) & BIT_MASK_RARF_RC4_8814B) << BIT_SHIFT_RARF_RC4_8814B)
-#define BIT_GET_RARF_RC4_8814B(x) (((x) >> BIT_SHIFT_RARF_RC4_8814B) & BIT_MASK_RARF_RC4_8814B)

+#define BIT_GET_RARF_RC4_8814B(x) (((x) >> BIT_SHIFT_RARF_RC4_8814B) & BIT_MASK_RARF_RC4_8814B)
+
 
 
 #define BIT_SHIFT_RARF_RC3_8814B 16
 #define BIT_MASK_RARF_RC3_8814B 0x1f
 #define BIT_RARF_RC3_8814B(x) (((x) & BIT_MASK_RARF_RC3_8814B) << BIT_SHIFT_RARF_RC3_8814B)
-#define BIT_GET_RARF_RC3_8814B(x) (((x) >> BIT_SHIFT_RARF_RC3_8814B) & BIT_MASK_RARF_RC3_8814B)

+#define BIT_GET_RARF_RC3_8814B(x) (((x) >> BIT_SHIFT_RARF_RC3_8814B) & BIT_MASK_RARF_RC3_8814B)
+
 
 
 #define BIT_SHIFT_RARF_RC2_8814B 8
 #define BIT_MASK_RARF_RC2_8814B 0x1f
 #define BIT_RARF_RC2_8814B(x) (((x) & BIT_MASK_RARF_RC2_8814B) << BIT_SHIFT_RARF_RC2_8814B)
-#define BIT_GET_RARF_RC2_8814B(x) (((x) >> BIT_SHIFT_RARF_RC2_8814B) & BIT_MASK_RARF_RC2_8814B)

+#define BIT_GET_RARF_RC2_8814B(x) (((x) >> BIT_SHIFT_RARF_RC2_8814B) & BIT_MASK_RARF_RC2_8814B)
+
 
 
 #define BIT_SHIFT_RARF_RC1_8814B 0
 #define BIT_MASK_RARF_RC1_8814B 0x1f
 #define BIT_RARF_RC1_8814B(x) (((x) & BIT_MASK_RARF_RC1_8814B) << BIT_SHIFT_RARF_RC1_8814B)
-#define BIT_GET_RARF_RC1_8814B(x) (((x) >> BIT_SHIFT_RARF_RC1_8814B) & BIT_MASK_RARF_RC1_8814B)

+#define BIT_GET_RARF_RC1_8814B(x) (((x) >> BIT_SHIFT_RARF_RC1_8814B) & BIT_MASK_RARF_RC1_8814B)
+
 
 
 /* 2 REG_RRSR_8814B */
@@ -5272,14 +5785,16 @@
 #define BIT_SHIFT_RRSR_RSC_8814B 21
 #define BIT_MASK_RRSR_RSC_8814B 0x3
 #define BIT_RRSR_RSC_8814B(x) (((x) & BIT_MASK_RRSR_RSC_8814B) << BIT_SHIFT_RRSR_RSC_8814B)
-#define BIT_GET_RRSR_RSC_8814B(x) (((x) >> BIT_SHIFT_RRSR_RSC_8814B) & BIT_MASK_RRSR_RSC_8814B)

+#define BIT_GET_RRSR_RSC_8814B(x) (((x) >> BIT_SHIFT_RRSR_RSC_8814B) & BIT_MASK_RRSR_RSC_8814B)
+
 
 #define BIT_RRSR_BW_8814B BIT(20)
 
 #define BIT_SHIFT_RRSC_BITMAP_8814B 0
 #define BIT_MASK_RRSC_BITMAP_8814B 0xfffff
 #define BIT_RRSC_BITMAP_8814B(x) (((x) & BIT_MASK_RRSC_BITMAP_8814B) << BIT_SHIFT_RRSC_BITMAP_8814B)
-#define BIT_GET_RRSC_BITMAP_8814B(x) (((x) >> BIT_SHIFT_RRSC_BITMAP_8814B) & BIT_MASK_RRSC_BITMAP_8814B)

+#define BIT_GET_RRSC_BITMAP_8814B(x) (((x) >> BIT_SHIFT_RRSC_BITMAP_8814B) & BIT_MASK_RRSC_BITMAP_8814B)
+
 
 
 /* 2 REG_ARFR0_8814B */
@@ -5287,7 +5802,8 @@
 #define BIT_SHIFT_ARFR0_V1_8814B 0
 #define BIT_MASK_ARFR0_V1_8814B 0xffffffffffffffffL
 #define BIT_ARFR0_V1_8814B(x) (((x) & BIT_MASK_ARFR0_V1_8814B) << BIT_SHIFT_ARFR0_V1_8814B)
-#define BIT_GET_ARFR0_V1_8814B(x) (((x) >> BIT_SHIFT_ARFR0_V1_8814B) & BIT_MASK_ARFR0_V1_8814B)

+#define BIT_GET_ARFR0_V1_8814B(x) (((x) >> BIT_SHIFT_ARFR0_V1_8814B) & BIT_MASK_ARFR0_V1_8814B)
+
 
 
 /* 2 REG_ARFR1_V1_8814B */
@@ -5295,7 +5811,8 @@
 #define BIT_SHIFT_ARFR1_V1_8814B 0
 #define BIT_MASK_ARFR1_V1_8814B 0xffffffffffffffffL
 #define BIT_ARFR1_V1_8814B(x) (((x) & BIT_MASK_ARFR1_V1_8814B) << BIT_SHIFT_ARFR1_V1_8814B)
-#define BIT_GET_ARFR1_V1_8814B(x) (((x) >> BIT_SHIFT_ARFR1_V1_8814B) & BIT_MASK_ARFR1_V1_8814B)

+#define BIT_GET_ARFR1_V1_8814B(x) (((x) >> BIT_SHIFT_ARFR1_V1_8814B) & BIT_MASK_ARFR1_V1_8814B)
+
 
 
 /* 2 REG_CCK_CHECK_8814B */
@@ -5313,7 +5830,8 @@
 #define BIT_SHIFT_AMPDU_MAX_TIME_8814B 0
 #define BIT_MASK_AMPDU_MAX_TIME_8814B 0xff
 #define BIT_AMPDU_MAX_TIME_8814B(x) (((x) & BIT_MASK_AMPDU_MAX_TIME_8814B) << BIT_SHIFT_AMPDU_MAX_TIME_8814B)
-#define BIT_GET_AMPDU_MAX_TIME_8814B(x) (((x) >> BIT_SHIFT_AMPDU_MAX_TIME_8814B) & BIT_MASK_AMPDU_MAX_TIME_8814B)

+#define BIT_GET_AMPDU_MAX_TIME_8814B(x) (((x) >> BIT_SHIFT_AMPDU_MAX_TIME_8814B) & BIT_MASK_AMPDU_MAX_TIME_8814B)
+
 
 
 /* 2 REG_BCNQ1_BDNY_V1_8814B */
@@ -5321,7 +5839,8 @@
 #define BIT_SHIFT_BCNQ1_PGBNDY_V1_8814B 0
 #define BIT_MASK_BCNQ1_PGBNDY_V1_8814B 0xfff
 #define BIT_BCNQ1_PGBNDY_V1_8814B(x) (((x) & BIT_MASK_BCNQ1_PGBNDY_V1_8814B) << BIT_SHIFT_BCNQ1_PGBNDY_V1_8814B)
-#define BIT_GET_BCNQ1_PGBNDY_V1_8814B(x) (((x) >> BIT_SHIFT_BCNQ1_PGBNDY_V1_8814B) & BIT_MASK_BCNQ1_PGBNDY_V1_8814B)

+#define BIT_GET_BCNQ1_PGBNDY_V1_8814B(x) (((x) >> BIT_SHIFT_BCNQ1_PGBNDY_V1_8814B) & BIT_MASK_BCNQ1_PGBNDY_V1_8814B)
+
 
 
 /* 2 REG_AMPDU_MAX_LENGTH_8814B */
@@ -5329,7 +5848,8 @@
 #define BIT_SHIFT_AMPDU_MAX_LENGTH_8814B 0
 #define BIT_MASK_AMPDU_MAX_LENGTH_8814B 0xffffffffL
 #define BIT_AMPDU_MAX_LENGTH_8814B(x) (((x) & BIT_MASK_AMPDU_MAX_LENGTH_8814B) << BIT_SHIFT_AMPDU_MAX_LENGTH_8814B)
-#define BIT_GET_AMPDU_MAX_LENGTH_8814B(x) (((x) >> BIT_SHIFT_AMPDU_MAX_LENGTH_8814B) & BIT_MASK_AMPDU_MAX_LENGTH_8814B)

+#define BIT_GET_AMPDU_MAX_LENGTH_8814B(x) (((x) >> BIT_SHIFT_AMPDU_MAX_LENGTH_8814B) & BIT_MASK_AMPDU_MAX_LENGTH_8814B)
+
 
 
 /* 2 REG_ACQ_STOP_8814B */
@@ -5347,7 +5867,8 @@
 #define BIT_SHIFT_R_NDPA_RATE_V1_8814B 0
 #define BIT_MASK_R_NDPA_RATE_V1_8814B 0xff
 #define BIT_R_NDPA_RATE_V1_8814B(x) (((x) & BIT_MASK_R_NDPA_RATE_V1_8814B) << BIT_SHIFT_R_NDPA_RATE_V1_8814B)
-#define BIT_GET_R_NDPA_RATE_V1_8814B(x) (((x) >> BIT_SHIFT_R_NDPA_RATE_V1_8814B) & BIT_MASK_R_NDPA_RATE_V1_8814B)

+#define BIT_GET_R_NDPA_RATE_V1_8814B(x) (((x) >> BIT_SHIFT_R_NDPA_RATE_V1_8814B) & BIT_MASK_R_NDPA_RATE_V1_8814B)
+
 
 
 /* 2 REG_TX_HANG_CTRL_8814B */
@@ -5362,14 +5883,16 @@
 #define BIT_SHIFT_BW_SIGTA_8814B 3
 #define BIT_MASK_BW_SIGTA_8814B 0x3
 #define BIT_BW_SIGTA_8814B(x) (((x) & BIT_MASK_BW_SIGTA_8814B) << BIT_SHIFT_BW_SIGTA_8814B)
-#define BIT_GET_BW_SIGTA_8814B(x) (((x) >> BIT_SHIFT_BW_SIGTA_8814B) & BIT_MASK_BW_SIGTA_8814B)

+#define BIT_GET_BW_SIGTA_8814B(x) (((x) >> BIT_SHIFT_BW_SIGTA_8814B) & BIT_MASK_BW_SIGTA_8814B)
+
 
 #define BIT_EN_BAR_SIGTA_8814B BIT(2)
 
 #define BIT_SHIFT_R_NDPA_BW_8814B 0
 #define BIT_MASK_R_NDPA_BW_8814B 0x3
 #define BIT_R_NDPA_BW_8814B(x) (((x) & BIT_MASK_R_NDPA_BW_8814B) << BIT_SHIFT_R_NDPA_BW_8814B)
-#define BIT_GET_R_NDPA_BW_8814B(x) (((x) >> BIT_SHIFT_R_NDPA_BW_8814B) & BIT_MASK_R_NDPA_BW_8814B)

+#define BIT_GET_R_NDPA_BW_8814B(x) (((x) >> BIT_SHIFT_R_NDPA_BW_8814B) & BIT_MASK_R_NDPA_BW_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -5381,7 +5904,8 @@
 #define BIT_SHIFT_RD_RESP_PKT_TH_V1_8814B 0
 #define BIT_MASK_RD_RESP_PKT_TH_V1_8814B 0x3f
 #define BIT_RD_RESP_PKT_TH_V1_8814B(x) (((x) & BIT_MASK_RD_RESP_PKT_TH_V1_8814B) << BIT_SHIFT_RD_RESP_PKT_TH_V1_8814B)
-#define BIT_GET_RD_RESP_PKT_TH_V1_8814B(x) (((x) >> BIT_SHIFT_RD_RESP_PKT_TH_V1_8814B) & BIT_MASK_RD_RESP_PKT_TH_V1_8814B)

+#define BIT_GET_RD_RESP_PKT_TH_V1_8814B(x) (((x) >> BIT_SHIFT_RD_RESP_PKT_TH_V1_8814B) & BIT_MASK_RD_RESP_PKT_TH_V1_8814B)
+
 
 
 /* 2 REG_CMDQ_INFO_8814B */
@@ -5389,26 +5913,30 @@
 #define BIT_SHIFT_QUEUEMACID_CMDQ_V1_8814B 25
 #define BIT_MASK_QUEUEMACID_CMDQ_V1_8814B 0x7f
 #define BIT_QUEUEMACID_CMDQ_V1_8814B(x) (((x) & BIT_MASK_QUEUEMACID_CMDQ_V1_8814B) << BIT_SHIFT_QUEUEMACID_CMDQ_V1_8814B)
-#define BIT_GET_QUEUEMACID_CMDQ_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_CMDQ_V1_8814B) & BIT_MASK_QUEUEMACID_CMDQ_V1_8814B)

+#define BIT_GET_QUEUEMACID_CMDQ_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_CMDQ_V1_8814B) & BIT_MASK_QUEUEMACID_CMDQ_V1_8814B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_CMDQ_V1_8814B 23
 #define BIT_MASK_QUEUEAC_CMDQ_V1_8814B 0x3
 #define BIT_QUEUEAC_CMDQ_V1_8814B(x) (((x) & BIT_MASK_QUEUEAC_CMDQ_V1_8814B) << BIT_SHIFT_QUEUEAC_CMDQ_V1_8814B)
-#define BIT_GET_QUEUEAC_CMDQ_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_CMDQ_V1_8814B) & BIT_MASK_QUEUEAC_CMDQ_V1_8814B)

+#define BIT_GET_QUEUEAC_CMDQ_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_CMDQ_V1_8814B) & BIT_MASK_QUEUEAC_CMDQ_V1_8814B)
+
 
 #define BIT_TIDEMPTY_CMDQ_V1_8814B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_CMDQ_V2_8814B 11
 #define BIT_MASK_TAIL_PKT_CMDQ_V2_8814B 0x7ff
 #define BIT_TAIL_PKT_CMDQ_V2_8814B(x) (((x) & BIT_MASK_TAIL_PKT_CMDQ_V2_8814B) << BIT_SHIFT_TAIL_PKT_CMDQ_V2_8814B)
-#define BIT_GET_TAIL_PKT_CMDQ_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_CMDQ_V2_8814B) & BIT_MASK_TAIL_PKT_CMDQ_V2_8814B)

+#define BIT_GET_TAIL_PKT_CMDQ_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_CMDQ_V2_8814B) & BIT_MASK_TAIL_PKT_CMDQ_V2_8814B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_CMDQ_V1_8814B 0
 #define BIT_MASK_HEAD_PKT_CMDQ_V1_8814B 0x7ff
 #define BIT_HEAD_PKT_CMDQ_V1_8814B(x) (((x) & BIT_MASK_HEAD_PKT_CMDQ_V1_8814B) << BIT_SHIFT_HEAD_PKT_CMDQ_V1_8814B)
-#define BIT_GET_HEAD_PKT_CMDQ_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_CMDQ_V1_8814B) & BIT_MASK_HEAD_PKT_CMDQ_V1_8814B)

+#define BIT_GET_HEAD_PKT_CMDQ_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_CMDQ_V1_8814B) & BIT_MASK_HEAD_PKT_CMDQ_V1_8814B)
+
 
 
 /* 2 REG_Q4_INFO_8814B */
@@ -5416,26 +5944,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q4_V1_8814B 25
 #define BIT_MASK_QUEUEMACID_Q4_V1_8814B 0x7f
 #define BIT_QUEUEMACID_Q4_V1_8814B(x) (((x) & BIT_MASK_QUEUEMACID_Q4_V1_8814B) << BIT_SHIFT_QUEUEMACID_Q4_V1_8814B)
-#define BIT_GET_QUEUEMACID_Q4_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q4_V1_8814B) & BIT_MASK_QUEUEMACID_Q4_V1_8814B)

+#define BIT_GET_QUEUEMACID_Q4_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q4_V1_8814B) & BIT_MASK_QUEUEMACID_Q4_V1_8814B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q4_V1_8814B 23
 #define BIT_MASK_QUEUEAC_Q4_V1_8814B 0x3
 #define BIT_QUEUEAC_Q4_V1_8814B(x) (((x) & BIT_MASK_QUEUEAC_Q4_V1_8814B) << BIT_SHIFT_QUEUEAC_Q4_V1_8814B)
-#define BIT_GET_QUEUEAC_Q4_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q4_V1_8814B) & BIT_MASK_QUEUEAC_Q4_V1_8814B)

+#define BIT_GET_QUEUEAC_Q4_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q4_V1_8814B) & BIT_MASK_QUEUEAC_Q4_V1_8814B)
+
 
 #define BIT_TIDEMPTY_Q4_V1_8814B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q4_V2_8814B 11
 #define BIT_MASK_TAIL_PKT_Q4_V2_8814B 0x7ff
 #define BIT_TAIL_PKT_Q4_V2_8814B(x) (((x) & BIT_MASK_TAIL_PKT_Q4_V2_8814B) << BIT_SHIFT_TAIL_PKT_Q4_V2_8814B)
-#define BIT_GET_TAIL_PKT_Q4_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q4_V2_8814B) & BIT_MASK_TAIL_PKT_Q4_V2_8814B)

+#define BIT_GET_TAIL_PKT_Q4_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q4_V2_8814B) & BIT_MASK_TAIL_PKT_Q4_V2_8814B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q4_V1_8814B 0
 #define BIT_MASK_HEAD_PKT_Q4_V1_8814B 0x7ff
 #define BIT_HEAD_PKT_Q4_V1_8814B(x) (((x) & BIT_MASK_HEAD_PKT_Q4_V1_8814B) << BIT_SHIFT_HEAD_PKT_Q4_V1_8814B)
-#define BIT_GET_HEAD_PKT_Q4_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q4_V1_8814B) & BIT_MASK_HEAD_PKT_Q4_V1_8814B)

+#define BIT_GET_HEAD_PKT_Q4_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q4_V1_8814B) & BIT_MASK_HEAD_PKT_Q4_V1_8814B)
+
 
 
 /* 2 REG_Q5_INFO_8814B */
@@ -5443,26 +5975,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q5_V1_8814B 25
 #define BIT_MASK_QUEUEMACID_Q5_V1_8814B 0x7f
 #define BIT_QUEUEMACID_Q5_V1_8814B(x) (((x) & BIT_MASK_QUEUEMACID_Q5_V1_8814B) << BIT_SHIFT_QUEUEMACID_Q5_V1_8814B)
-#define BIT_GET_QUEUEMACID_Q5_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q5_V1_8814B) & BIT_MASK_QUEUEMACID_Q5_V1_8814B)

+#define BIT_GET_QUEUEMACID_Q5_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q5_V1_8814B) & BIT_MASK_QUEUEMACID_Q5_V1_8814B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q5_V1_8814B 23
 #define BIT_MASK_QUEUEAC_Q5_V1_8814B 0x3
 #define BIT_QUEUEAC_Q5_V1_8814B(x) (((x) & BIT_MASK_QUEUEAC_Q5_V1_8814B) << BIT_SHIFT_QUEUEAC_Q5_V1_8814B)
-#define BIT_GET_QUEUEAC_Q5_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q5_V1_8814B) & BIT_MASK_QUEUEAC_Q5_V1_8814B)

+#define BIT_GET_QUEUEAC_Q5_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q5_V1_8814B) & BIT_MASK_QUEUEAC_Q5_V1_8814B)
+
 
 #define BIT_TIDEMPTY_Q5_V1_8814B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q5_V2_8814B 11
 #define BIT_MASK_TAIL_PKT_Q5_V2_8814B 0x7ff
 #define BIT_TAIL_PKT_Q5_V2_8814B(x) (((x) & BIT_MASK_TAIL_PKT_Q5_V2_8814B) << BIT_SHIFT_TAIL_PKT_Q5_V2_8814B)
-#define BIT_GET_TAIL_PKT_Q5_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q5_V2_8814B) & BIT_MASK_TAIL_PKT_Q5_V2_8814B)

+#define BIT_GET_TAIL_PKT_Q5_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q5_V2_8814B) & BIT_MASK_TAIL_PKT_Q5_V2_8814B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q5_V1_8814B 0
 #define BIT_MASK_HEAD_PKT_Q5_V1_8814B 0x7ff
 #define BIT_HEAD_PKT_Q5_V1_8814B(x) (((x) & BIT_MASK_HEAD_PKT_Q5_V1_8814B) << BIT_SHIFT_HEAD_PKT_Q5_V1_8814B)
-#define BIT_GET_HEAD_PKT_Q5_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q5_V1_8814B) & BIT_MASK_HEAD_PKT_Q5_V1_8814B)

+#define BIT_GET_HEAD_PKT_Q5_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q5_V1_8814B) & BIT_MASK_HEAD_PKT_Q5_V1_8814B)
+
 
 
 /* 2 REG_Q6_INFO_8814B */
@@ -5470,26 +6006,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q6_V1_8814B 25
 #define BIT_MASK_QUEUEMACID_Q6_V1_8814B 0x7f
 #define BIT_QUEUEMACID_Q6_V1_8814B(x) (((x) & BIT_MASK_QUEUEMACID_Q6_V1_8814B) << BIT_SHIFT_QUEUEMACID_Q6_V1_8814B)
-#define BIT_GET_QUEUEMACID_Q6_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q6_V1_8814B) & BIT_MASK_QUEUEMACID_Q6_V1_8814B)

+#define BIT_GET_QUEUEMACID_Q6_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q6_V1_8814B) & BIT_MASK_QUEUEMACID_Q6_V1_8814B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q6_V1_8814B 23
 #define BIT_MASK_QUEUEAC_Q6_V1_8814B 0x3
 #define BIT_QUEUEAC_Q6_V1_8814B(x) (((x) & BIT_MASK_QUEUEAC_Q6_V1_8814B) << BIT_SHIFT_QUEUEAC_Q6_V1_8814B)
-#define BIT_GET_QUEUEAC_Q6_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q6_V1_8814B) & BIT_MASK_QUEUEAC_Q6_V1_8814B)

+#define BIT_GET_QUEUEAC_Q6_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q6_V1_8814B) & BIT_MASK_QUEUEAC_Q6_V1_8814B)
+
 
 #define BIT_TIDEMPTY_Q6_V1_8814B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q6_V2_8814B 11
 #define BIT_MASK_TAIL_PKT_Q6_V2_8814B 0x7ff
 #define BIT_TAIL_PKT_Q6_V2_8814B(x) (((x) & BIT_MASK_TAIL_PKT_Q6_V2_8814B) << BIT_SHIFT_TAIL_PKT_Q6_V2_8814B)
-#define BIT_GET_TAIL_PKT_Q6_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q6_V2_8814B) & BIT_MASK_TAIL_PKT_Q6_V2_8814B)

+#define BIT_GET_TAIL_PKT_Q6_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q6_V2_8814B) & BIT_MASK_TAIL_PKT_Q6_V2_8814B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q6_V1_8814B 0
 #define BIT_MASK_HEAD_PKT_Q6_V1_8814B 0x7ff
 #define BIT_HEAD_PKT_Q6_V1_8814B(x) (((x) & BIT_MASK_HEAD_PKT_Q6_V1_8814B) << BIT_SHIFT_HEAD_PKT_Q6_V1_8814B)
-#define BIT_GET_HEAD_PKT_Q6_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q6_V1_8814B) & BIT_MASK_HEAD_PKT_Q6_V1_8814B)

+#define BIT_GET_HEAD_PKT_Q6_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q6_V1_8814B) & BIT_MASK_HEAD_PKT_Q6_V1_8814B)
+
 
 
 /* 2 REG_Q7_INFO_8814B */
@@ -5497,26 +6037,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q7_V1_8814B 25
 #define BIT_MASK_QUEUEMACID_Q7_V1_8814B 0x7f
 #define BIT_QUEUEMACID_Q7_V1_8814B(x) (((x) & BIT_MASK_QUEUEMACID_Q7_V1_8814B) << BIT_SHIFT_QUEUEMACID_Q7_V1_8814B)
-#define BIT_GET_QUEUEMACID_Q7_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q7_V1_8814B) & BIT_MASK_QUEUEMACID_Q7_V1_8814B)

+#define BIT_GET_QUEUEMACID_Q7_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q7_V1_8814B) & BIT_MASK_QUEUEMACID_Q7_V1_8814B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q7_V1_8814B 23
 #define BIT_MASK_QUEUEAC_Q7_V1_8814B 0x3
 #define BIT_QUEUEAC_Q7_V1_8814B(x) (((x) & BIT_MASK_QUEUEAC_Q7_V1_8814B) << BIT_SHIFT_QUEUEAC_Q7_V1_8814B)
-#define BIT_GET_QUEUEAC_Q7_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q7_V1_8814B) & BIT_MASK_QUEUEAC_Q7_V1_8814B)

+#define BIT_GET_QUEUEAC_Q7_V1_8814B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q7_V1_8814B) & BIT_MASK_QUEUEAC_Q7_V1_8814B)
+
 
 #define BIT_TIDEMPTY_Q7_V1_8814B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q7_V2_8814B 11
 #define BIT_MASK_TAIL_PKT_Q7_V2_8814B 0x7ff
 #define BIT_TAIL_PKT_Q7_V2_8814B(x) (((x) & BIT_MASK_TAIL_PKT_Q7_V2_8814B) << BIT_SHIFT_TAIL_PKT_Q7_V2_8814B)
-#define BIT_GET_TAIL_PKT_Q7_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q7_V2_8814B) & BIT_MASK_TAIL_PKT_Q7_V2_8814B)

+#define BIT_GET_TAIL_PKT_Q7_V2_8814B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q7_V2_8814B) & BIT_MASK_TAIL_PKT_Q7_V2_8814B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q7_V1_8814B 0
 #define BIT_MASK_HEAD_PKT_Q7_V1_8814B 0x7ff
 #define BIT_HEAD_PKT_Q7_V1_8814B(x) (((x) & BIT_MASK_HEAD_PKT_Q7_V1_8814B) << BIT_SHIFT_HEAD_PKT_Q7_V1_8814B)
-#define BIT_GET_HEAD_PKT_Q7_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q7_V1_8814B) & BIT_MASK_HEAD_PKT_Q7_V1_8814B)

+#define BIT_GET_HEAD_PKT_Q7_V1_8814B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q7_V1_8814B) & BIT_MASK_HEAD_PKT_Q7_V1_8814B)
+
 
 
 /* 2 REG_WMAC_LBK_BUF_HD_V1_8814B */
@@ -5524,7 +6068,8 @@
 #define BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8814B 0
 #define BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8814B 0xfff
 #define BIT_WMAC_LBK_BUF_HEAD_V1_8814B(x) (((x) & BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8814B) << BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8814B)
-#define BIT_GET_WMAC_LBK_BUF_HEAD_V1_8814B(x) (((x) >> BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8814B) & BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8814B)

+#define BIT_GET_WMAC_LBK_BUF_HEAD_V1_8814B(x) (((x) >> BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8814B) & BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8814B)
+
 
 
 /* 2 REG_MGQ_BDNY_V1_8814B */
@@ -5532,7 +6077,8 @@
 #define BIT_SHIFT_MGQ_PGBNDY_V1_8814B 0
 #define BIT_MASK_MGQ_PGBNDY_V1_8814B 0xfff
 #define BIT_MGQ_PGBNDY_V1_8814B(x) (((x) & BIT_MASK_MGQ_PGBNDY_V1_8814B) << BIT_SHIFT_MGQ_PGBNDY_V1_8814B)
-#define BIT_GET_MGQ_PGBNDY_V1_8814B(x) (((x) >> BIT_SHIFT_MGQ_PGBNDY_V1_8814B) & BIT_MASK_MGQ_PGBNDY_V1_8814B)

+#define BIT_GET_MGQ_PGBNDY_V1_8814B(x) (((x) >> BIT_SHIFT_MGQ_PGBNDY_V1_8814B) & BIT_MASK_MGQ_PGBNDY_V1_8814B)
+
 
 
 /* 2 REG_TXRPT_CTRL_8814B */
@@ -5540,25 +6086,29 @@
 #define BIT_SHIFT_TRXRPT_TIMER_TH_8814B 24
 #define BIT_MASK_TRXRPT_TIMER_TH_8814B 0xff
 #define BIT_TRXRPT_TIMER_TH_8814B(x) (((x) & BIT_MASK_TRXRPT_TIMER_TH_8814B) << BIT_SHIFT_TRXRPT_TIMER_TH_8814B)
-#define BIT_GET_TRXRPT_TIMER_TH_8814B(x) (((x) >> BIT_SHIFT_TRXRPT_TIMER_TH_8814B) & BIT_MASK_TRXRPT_TIMER_TH_8814B)

+#define BIT_GET_TRXRPT_TIMER_TH_8814B(x) (((x) >> BIT_SHIFT_TRXRPT_TIMER_TH_8814B) & BIT_MASK_TRXRPT_TIMER_TH_8814B)
+
 
 
 #define BIT_SHIFT_TRXRPT_LEN_TH_8814B 16
 #define BIT_MASK_TRXRPT_LEN_TH_8814B 0xff
 #define BIT_TRXRPT_LEN_TH_8814B(x) (((x) & BIT_MASK_TRXRPT_LEN_TH_8814B) << BIT_SHIFT_TRXRPT_LEN_TH_8814B)
-#define BIT_GET_TRXRPT_LEN_TH_8814B(x) (((x) >> BIT_SHIFT_TRXRPT_LEN_TH_8814B) & BIT_MASK_TRXRPT_LEN_TH_8814B)

+#define BIT_GET_TRXRPT_LEN_TH_8814B(x) (((x) >> BIT_SHIFT_TRXRPT_LEN_TH_8814B) & BIT_MASK_TRXRPT_LEN_TH_8814B)
+
 
 
 #define BIT_SHIFT_TRXRPT_READ_PTR_8814B 8
 #define BIT_MASK_TRXRPT_READ_PTR_8814B 0xff
 #define BIT_TRXRPT_READ_PTR_8814B(x) (((x) & BIT_MASK_TRXRPT_READ_PTR_8814B) << BIT_SHIFT_TRXRPT_READ_PTR_8814B)
-#define BIT_GET_TRXRPT_READ_PTR_8814B(x) (((x) >> BIT_SHIFT_TRXRPT_READ_PTR_8814B) & BIT_MASK_TRXRPT_READ_PTR_8814B)

+#define BIT_GET_TRXRPT_READ_PTR_8814B(x) (((x) >> BIT_SHIFT_TRXRPT_READ_PTR_8814B) & BIT_MASK_TRXRPT_READ_PTR_8814B)
+
 
 
 #define BIT_SHIFT_TRXRPT_WRITE_PTR_8814B 0
 #define BIT_MASK_TRXRPT_WRITE_PTR_8814B 0xff
 #define BIT_TRXRPT_WRITE_PTR_8814B(x) (((x) & BIT_MASK_TRXRPT_WRITE_PTR_8814B) << BIT_SHIFT_TRXRPT_WRITE_PTR_8814B)
-#define BIT_GET_TRXRPT_WRITE_PTR_8814B(x) (((x) >> BIT_SHIFT_TRXRPT_WRITE_PTR_8814B) & BIT_MASK_TRXRPT_WRITE_PTR_8814B)

+#define BIT_GET_TRXRPT_WRITE_PTR_8814B(x) (((x) >> BIT_SHIFT_TRXRPT_WRITE_PTR_8814B) & BIT_MASK_TRXRPT_WRITE_PTR_8814B)
+
 
 
 /* 2 REG_INIRTS_RATE_SEL_8814B */
@@ -5569,7 +6119,8 @@
 #define BIT_SHIFT_BASIC_CFEND_RATE_8814B 0
 #define BIT_MASK_BASIC_CFEND_RATE_8814B 0x1f
 #define BIT_BASIC_CFEND_RATE_8814B(x) (((x) & BIT_MASK_BASIC_CFEND_RATE_8814B) << BIT_SHIFT_BASIC_CFEND_RATE_8814B)
-#define BIT_GET_BASIC_CFEND_RATE_8814B(x) (((x) >> BIT_SHIFT_BASIC_CFEND_RATE_8814B) & BIT_MASK_BASIC_CFEND_RATE_8814B)

+#define BIT_GET_BASIC_CFEND_RATE_8814B(x) (((x) >> BIT_SHIFT_BASIC_CFEND_RATE_8814B) & BIT_MASK_BASIC_CFEND_RATE_8814B)
+
 
 
 /* 2 REG_STBC_CFEND_RATE_8814B */
@@ -5577,7 +6128,8 @@
 #define BIT_SHIFT_STBC_CFEND_RATE_8814B 0
 #define BIT_MASK_STBC_CFEND_RATE_8814B 0x1f
 #define BIT_STBC_CFEND_RATE_8814B(x) (((x) & BIT_MASK_STBC_CFEND_RATE_8814B) << BIT_SHIFT_STBC_CFEND_RATE_8814B)
-#define BIT_GET_STBC_CFEND_RATE_8814B(x) (((x) >> BIT_SHIFT_STBC_CFEND_RATE_8814B) & BIT_MASK_STBC_CFEND_RATE_8814B)

+#define BIT_GET_STBC_CFEND_RATE_8814B(x) (((x) >> BIT_SHIFT_STBC_CFEND_RATE_8814B) & BIT_MASK_STBC_CFEND_RATE_8814B)
+
 
 
 /* 2 REG_DATA_SC_8814B */
@@ -5585,13 +6137,15 @@
 #define BIT_SHIFT_TXSC_40M_8814B 4
 #define BIT_MASK_TXSC_40M_8814B 0xf
 #define BIT_TXSC_40M_8814B(x) (((x) & BIT_MASK_TXSC_40M_8814B) << BIT_SHIFT_TXSC_40M_8814B)
-#define BIT_GET_TXSC_40M_8814B(x) (((x) >> BIT_SHIFT_TXSC_40M_8814B) & BIT_MASK_TXSC_40M_8814B)

+#define BIT_GET_TXSC_40M_8814B(x) (((x) >> BIT_SHIFT_TXSC_40M_8814B) & BIT_MASK_TXSC_40M_8814B)
+
 
 
 #define BIT_SHIFT_TXSC_20M_8814B 0
 #define BIT_MASK_TXSC_20M_8814B 0xf
 #define BIT_TXSC_20M_8814B(x) (((x) & BIT_MASK_TXSC_20M_8814B) << BIT_SHIFT_TXSC_20M_8814B)
-#define BIT_GET_TXSC_20M_8814B(x) (((x) >> BIT_SHIFT_TXSC_20M_8814B) & BIT_MASK_TXSC_20M_8814B)

+#define BIT_GET_TXSC_20M_8814B(x) (((x) >> BIT_SHIFT_TXSC_20M_8814B) & BIT_MASK_TXSC_20M_8814B)
+
 
 
 /* 2 REG_MACID_SLEEP3_8814B */
@@ -5599,7 +6153,8 @@
 #define BIT_SHIFT_MACID127_96_PKTSLEEP_8814B 0
 #define BIT_MASK_MACID127_96_PKTSLEEP_8814B 0xffffffffL
 #define BIT_MACID127_96_PKTSLEEP_8814B(x) (((x) & BIT_MASK_MACID127_96_PKTSLEEP_8814B) << BIT_SHIFT_MACID127_96_PKTSLEEP_8814B)
-#define BIT_GET_MACID127_96_PKTSLEEP_8814B(x) (((x) >> BIT_SHIFT_MACID127_96_PKTSLEEP_8814B) & BIT_MASK_MACID127_96_PKTSLEEP_8814B)

+#define BIT_GET_MACID127_96_PKTSLEEP_8814B(x) (((x) >> BIT_SHIFT_MACID127_96_PKTSLEEP_8814B) & BIT_MASK_MACID127_96_PKTSLEEP_8814B)
+
 
 
 /* 2 REG_MACID_SLEEP1_8814B */
@@ -5607,7 +6162,8 @@
 #define BIT_SHIFT_MACID63_32_PKTSLEEP_8814B 0
 #define BIT_MASK_MACID63_32_PKTSLEEP_8814B 0xffffffffL
 #define BIT_MACID63_32_PKTSLEEP_8814B(x) (((x) & BIT_MASK_MACID63_32_PKTSLEEP_8814B) << BIT_SHIFT_MACID63_32_PKTSLEEP_8814B)
-#define BIT_GET_MACID63_32_PKTSLEEP_8814B(x) (((x) >> BIT_SHIFT_MACID63_32_PKTSLEEP_8814B) & BIT_MASK_MACID63_32_PKTSLEEP_8814B)

+#define BIT_GET_MACID63_32_PKTSLEEP_8814B(x) (((x) >> BIT_SHIFT_MACID63_32_PKTSLEEP_8814B) & BIT_MASK_MACID63_32_PKTSLEEP_8814B)
+
 
 
 /* 2 REG_ARFR2_V1_8814B */
@@ -5615,7 +6171,8 @@
 #define BIT_SHIFT_ARFR2_V1_8814B 0
 #define BIT_MASK_ARFR2_V1_8814B 0xffffffffffffffffL
 #define BIT_ARFR2_V1_8814B(x) (((x) & BIT_MASK_ARFR2_V1_8814B) << BIT_SHIFT_ARFR2_V1_8814B)
-#define BIT_GET_ARFR2_V1_8814B(x) (((x) >> BIT_SHIFT_ARFR2_V1_8814B) & BIT_MASK_ARFR2_V1_8814B)

+#define BIT_GET_ARFR2_V1_8814B(x) (((x) >> BIT_SHIFT_ARFR2_V1_8814B) & BIT_MASK_ARFR2_V1_8814B)
+
 
 
 /* 2 REG_ARFR3_V1_8814B */
@@ -5623,7 +6180,8 @@
 #define BIT_SHIFT_ARFR3_V1_8814B 0
 #define BIT_MASK_ARFR3_V1_8814B 0xffffffffffffffffL
 #define BIT_ARFR3_V1_8814B(x) (((x) & BIT_MASK_ARFR3_V1_8814B) << BIT_SHIFT_ARFR3_V1_8814B)
-#define BIT_GET_ARFR3_V1_8814B(x) (((x) >> BIT_SHIFT_ARFR3_V1_8814B) & BIT_MASK_ARFR3_V1_8814B)

+#define BIT_GET_ARFR3_V1_8814B(x) (((x) >> BIT_SHIFT_ARFR3_V1_8814B) & BIT_MASK_ARFR3_V1_8814B)
+
 
 
 /* 2 REG_ARFR4_8814B */
@@ -5631,7 +6189,8 @@
 #define BIT_SHIFT_ARFR4_8814B 0
 #define BIT_MASK_ARFR4_8814B 0xffffffffffffffffL
 #define BIT_ARFR4_8814B(x) (((x) & BIT_MASK_ARFR4_8814B) << BIT_SHIFT_ARFR4_8814B)
-#define BIT_GET_ARFR4_8814B(x) (((x) >> BIT_SHIFT_ARFR4_8814B) & BIT_MASK_ARFR4_8814B)

+#define BIT_GET_ARFR4_8814B(x) (((x) >> BIT_SHIFT_ARFR4_8814B) & BIT_MASK_ARFR4_8814B)
+
 
 
 /* 2 REG_ARFR5_8814B */
@@ -5639,7 +6198,8 @@
 #define BIT_SHIFT_ARFR5_8814B 0
 #define BIT_MASK_ARFR5_8814B 0xffffffffffffffffL
 #define BIT_ARFR5_8814B(x) (((x) & BIT_MASK_ARFR5_8814B) << BIT_SHIFT_ARFR5_8814B)
-#define BIT_GET_ARFR5_8814B(x) (((x) >> BIT_SHIFT_ARFR5_8814B) & BIT_MASK_ARFR5_8814B)

+#define BIT_GET_ARFR5_8814B(x) (((x) >> BIT_SHIFT_ARFR5_8814B) & BIT_MASK_ARFR5_8814B)
+
 
 
 /* 2 REG_TXRPT_START_OFFSET_8814B */
@@ -5647,20 +6207,23 @@
 #define BIT_SHIFT_R_MUTAB_TXRPT_OFFSET_8814B 24
 #define BIT_MASK_R_MUTAB_TXRPT_OFFSET_8814B 0xff
 #define BIT_R_MUTAB_TXRPT_OFFSET_8814B(x) (((x) & BIT_MASK_R_MUTAB_TXRPT_OFFSET_8814B) << BIT_SHIFT_R_MUTAB_TXRPT_OFFSET_8814B)
-#define BIT_GET_R_MUTAB_TXRPT_OFFSET_8814B(x) (((x) >> BIT_SHIFT_R_MUTAB_TXRPT_OFFSET_8814B) & BIT_MASK_R_MUTAB_TXRPT_OFFSET_8814B)

+#define BIT_GET_R_MUTAB_TXRPT_OFFSET_8814B(x) (((x) >> BIT_SHIFT_R_MUTAB_TXRPT_OFFSET_8814B) & BIT_MASK_R_MUTAB_TXRPT_OFFSET_8814B)
+
 
 #define BIT__R_RPTFIFO_1K_8814B BIT(16)
 
 #define BIT_SHIFT_MACID_CTRL_OFFSET_8814B 8
 #define BIT_MASK_MACID_CTRL_OFFSET_8814B 0xff
 #define BIT_MACID_CTRL_OFFSET_8814B(x) (((x) & BIT_MASK_MACID_CTRL_OFFSET_8814B) << BIT_SHIFT_MACID_CTRL_OFFSET_8814B)
-#define BIT_GET_MACID_CTRL_OFFSET_8814B(x) (((x) >> BIT_SHIFT_MACID_CTRL_OFFSET_8814B) & BIT_MASK_MACID_CTRL_OFFSET_8814B)

+#define BIT_GET_MACID_CTRL_OFFSET_8814B(x) (((x) >> BIT_SHIFT_MACID_CTRL_OFFSET_8814B) & BIT_MASK_MACID_CTRL_OFFSET_8814B)
+
 
 
 #define BIT_SHIFT_AMPDU_TXRPT_OFFSET_8814B 0
 #define BIT_MASK_AMPDU_TXRPT_OFFSET_8814B 0xff
 #define BIT_AMPDU_TXRPT_OFFSET_8814B(x) (((x) & BIT_MASK_AMPDU_TXRPT_OFFSET_8814B) << BIT_SHIFT_AMPDU_TXRPT_OFFSET_8814B)
-#define BIT_GET_AMPDU_TXRPT_OFFSET_8814B(x) (((x) >> BIT_SHIFT_AMPDU_TXRPT_OFFSET_8814B) & BIT_MASK_AMPDU_TXRPT_OFFSET_8814B)

+#define BIT_GET_AMPDU_TXRPT_OFFSET_8814B(x) (((x) >> BIT_SHIFT_AMPDU_TXRPT_OFFSET_8814B) & BIT_MASK_AMPDU_TXRPT_OFFSET_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -5678,7 +6241,8 @@
 #define BIT_SHIFT_POWER_STAGE1_8814B 0
 #define BIT_MASK_POWER_STAGE1_8814B 0xffffff
 #define BIT_POWER_STAGE1_8814B(x) (((x) & BIT_MASK_POWER_STAGE1_8814B) << BIT_SHIFT_POWER_STAGE1_8814B)
-#define BIT_GET_POWER_STAGE1_8814B(x) (((x) >> BIT_SHIFT_POWER_STAGE1_8814B) & BIT_MASK_POWER_STAGE1_8814B)

+#define BIT_GET_POWER_STAGE1_8814B(x) (((x) >> BIT_SHIFT_POWER_STAGE1_8814B) & BIT_MASK_POWER_STAGE1_8814B)
+
 
 
 /* 2 REG_POWER_STAGE2_8814B */
@@ -5687,7 +6251,8 @@
 #define BIT_SHIFT_POWER_STAGE2_8814B 0
 #define BIT_MASK_POWER_STAGE2_8814B 0xffffff
 #define BIT_POWER_STAGE2_8814B(x) (((x) & BIT_MASK_POWER_STAGE2_8814B) << BIT_SHIFT_POWER_STAGE2_8814B)
-#define BIT_GET_POWER_STAGE2_8814B(x) (((x) >> BIT_SHIFT_POWER_STAGE2_8814B) & BIT_MASK_POWER_STAGE2_8814B)

+#define BIT_GET_POWER_STAGE2_8814B(x) (((x) >> BIT_SHIFT_POWER_STAGE2_8814B) & BIT_MASK_POWER_STAGE2_8814B)
+
 
 
 /* 2 REG_SW_AMPDU_BURST_MODE_CTRL_8814B */
@@ -5695,7 +6260,8 @@
 #define BIT_SHIFT_PAD_NUM_THRES_8814B 24
 #define BIT_MASK_PAD_NUM_THRES_8814B 0x3f
 #define BIT_PAD_NUM_THRES_8814B(x) (((x) & BIT_MASK_PAD_NUM_THRES_8814B) << BIT_SHIFT_PAD_NUM_THRES_8814B)
-#define BIT_GET_PAD_NUM_THRES_8814B(x) (((x) >> BIT_SHIFT_PAD_NUM_THRES_8814B) & BIT_MASK_PAD_NUM_THRES_8814B)

+#define BIT_GET_PAD_NUM_THRES_8814B(x) (((x) >> BIT_SHIFT_PAD_NUM_THRES_8814B) & BIT_MASK_PAD_NUM_THRES_8814B)
+
 
 #define BIT_R_DMA_THIS_QUEUE_BK_8814B BIT(23)
 #define BIT_R_DMA_THIS_QUEUE_BE_8814B BIT(22)
@@ -5705,7 +6271,8 @@
 #define BIT_SHIFT_R_TOTAL_LEN_TH_8814B 8
 #define BIT_MASK_R_TOTAL_LEN_TH_8814B 0xfff
 #define BIT_R_TOTAL_LEN_TH_8814B(x) (((x) & BIT_MASK_R_TOTAL_LEN_TH_8814B) << BIT_SHIFT_R_TOTAL_LEN_TH_8814B)
-#define BIT_GET_R_TOTAL_LEN_TH_8814B(x) (((x) >> BIT_SHIFT_R_TOTAL_LEN_TH_8814B) & BIT_MASK_R_TOTAL_LEN_TH_8814B)

+#define BIT_GET_R_TOTAL_LEN_TH_8814B(x) (((x) >> BIT_SHIFT_R_TOTAL_LEN_TH_8814B) & BIT_MASK_R_TOTAL_LEN_TH_8814B)
+
 
 #define BIT_EN_NEW_EARLY_8814B BIT(7)
 #define BIT_PRE_TX_CMD_8814B BIT(6)
@@ -5713,7 +6280,8 @@
 #define BIT_SHIFT_NUM_SCL_EN_8814B 4
 #define BIT_MASK_NUM_SCL_EN_8814B 0x3
 #define BIT_NUM_SCL_EN_8814B(x) (((x) & BIT_MASK_NUM_SCL_EN_8814B) << BIT_SHIFT_NUM_SCL_EN_8814B)
-#define BIT_GET_NUM_SCL_EN_8814B(x) (((x) >> BIT_SHIFT_NUM_SCL_EN_8814B) & BIT_MASK_NUM_SCL_EN_8814B)

+#define BIT_GET_NUM_SCL_EN_8814B(x) (((x) >> BIT_SHIFT_NUM_SCL_EN_8814B) & BIT_MASK_NUM_SCL_EN_8814B)
+
 
 #define BIT_BK_EN_8814B BIT(3)
 #define BIT_BE_EN_8814B BIT(2)
@@ -5725,13 +6293,15 @@
 #define BIT_SHIFT_PKT_LIFTIME_BEBK_8814B 16
 #define BIT_MASK_PKT_LIFTIME_BEBK_8814B 0xffff
 #define BIT_PKT_LIFTIME_BEBK_8814B(x) (((x) & BIT_MASK_PKT_LIFTIME_BEBK_8814B) << BIT_SHIFT_PKT_LIFTIME_BEBK_8814B)
-#define BIT_GET_PKT_LIFTIME_BEBK_8814B(x) (((x) >> BIT_SHIFT_PKT_LIFTIME_BEBK_8814B) & BIT_MASK_PKT_LIFTIME_BEBK_8814B)

+#define BIT_GET_PKT_LIFTIME_BEBK_8814B(x) (((x) >> BIT_SHIFT_PKT_LIFTIME_BEBK_8814B) & BIT_MASK_PKT_LIFTIME_BEBK_8814B)
+
 
 
 #define BIT_SHIFT_PKT_LIFTIME_VOVI_8814B 0
 #define BIT_MASK_PKT_LIFTIME_VOVI_8814B 0xffff
 #define BIT_PKT_LIFTIME_VOVI_8814B(x) (((x) & BIT_MASK_PKT_LIFTIME_VOVI_8814B) << BIT_SHIFT_PKT_LIFTIME_VOVI_8814B)
-#define BIT_GET_PKT_LIFTIME_VOVI_8814B(x) (((x) >> BIT_SHIFT_PKT_LIFTIME_VOVI_8814B) & BIT_MASK_PKT_LIFTIME_VOVI_8814B)

+#define BIT_GET_PKT_LIFTIME_VOVI_8814B(x) (((x) >> BIT_SHIFT_PKT_LIFTIME_VOVI_8814B) & BIT_MASK_PKT_LIFTIME_VOVI_8814B)
+
 
 
 /* 2 REG_STBC_SETTING_8814B */
@@ -5739,19 +6309,22 @@
 #define BIT_SHIFT_CDEND_TXTIME_L_8814B 4
 #define BIT_MASK_CDEND_TXTIME_L_8814B 0xf
 #define BIT_CDEND_TXTIME_L_8814B(x) (((x) & BIT_MASK_CDEND_TXTIME_L_8814B) << BIT_SHIFT_CDEND_TXTIME_L_8814B)
-#define BIT_GET_CDEND_TXTIME_L_8814B(x) (((x) >> BIT_SHIFT_CDEND_TXTIME_L_8814B) & BIT_MASK_CDEND_TXTIME_L_8814B)

+#define BIT_GET_CDEND_TXTIME_L_8814B(x) (((x) >> BIT_SHIFT_CDEND_TXTIME_L_8814B) & BIT_MASK_CDEND_TXTIME_L_8814B)
+
 
 
 #define BIT_SHIFT_NESS_8814B 2
 #define BIT_MASK_NESS_8814B 0x3
 #define BIT_NESS_8814B(x) (((x) & BIT_MASK_NESS_8814B) << BIT_SHIFT_NESS_8814B)
-#define BIT_GET_NESS_8814B(x) (((x) >> BIT_SHIFT_NESS_8814B) & BIT_MASK_NESS_8814B)

+#define BIT_GET_NESS_8814B(x) (((x) >> BIT_SHIFT_NESS_8814B) & BIT_MASK_NESS_8814B)
+
 
 
 #define BIT_SHIFT_STBC_CFEND_8814B 0
 #define BIT_MASK_STBC_CFEND_8814B 0x3
 #define BIT_STBC_CFEND_8814B(x) (((x) & BIT_MASK_STBC_CFEND_8814B) << BIT_SHIFT_STBC_CFEND_8814B)
-#define BIT_GET_STBC_CFEND_8814B(x) (((x) >> BIT_SHIFT_STBC_CFEND_8814B) & BIT_MASK_STBC_CFEND_8814B)

+#define BIT_GET_STBC_CFEND_8814B(x) (((x) >> BIT_SHIFT_STBC_CFEND_8814B) & BIT_MASK_STBC_CFEND_8814B)
+
 
 
 /* 2 REG_STBC_SETTING2_8814B */
@@ -5759,7 +6332,8 @@
 #define BIT_SHIFT_CDEND_TXTIME_H_8814B 0
 #define BIT_MASK_CDEND_TXTIME_H_8814B 0x1f
 #define BIT_CDEND_TXTIME_H_8814B(x) (((x) & BIT_MASK_CDEND_TXTIME_H_8814B) << BIT_SHIFT_CDEND_TXTIME_H_8814B)
-#define BIT_GET_CDEND_TXTIME_H_8814B(x) (((x) >> BIT_SHIFT_CDEND_TXTIME_H_8814B) & BIT_MASK_CDEND_TXTIME_H_8814B)

+#define BIT_GET_CDEND_TXTIME_H_8814B(x) (((x) >> BIT_SHIFT_CDEND_TXTIME_H_8814B) & BIT_MASK_CDEND_TXTIME_H_8814B)
+
 
 
 /* 2 REG_QUEUE_CTRL_8814B */
@@ -5778,25 +6352,29 @@
 #define BIT_SHIFT_RTS_MAX_AGG_NUM_8814B 24
 #define BIT_MASK_RTS_MAX_AGG_NUM_8814B 0x3f
 #define BIT_RTS_MAX_AGG_NUM_8814B(x) (((x) & BIT_MASK_RTS_MAX_AGG_NUM_8814B) << BIT_SHIFT_RTS_MAX_AGG_NUM_8814B)
-#define BIT_GET_RTS_MAX_AGG_NUM_8814B(x) (((x) >> BIT_SHIFT_RTS_MAX_AGG_NUM_8814B) & BIT_MASK_RTS_MAX_AGG_NUM_8814B)

+#define BIT_GET_RTS_MAX_AGG_NUM_8814B(x) (((x) >> BIT_SHIFT_RTS_MAX_AGG_NUM_8814B) & BIT_MASK_RTS_MAX_AGG_NUM_8814B)
+
 
 
 #define BIT_SHIFT_MAX_AGG_NUM_8814B 16
 #define BIT_MASK_MAX_AGG_NUM_8814B 0x3f
 #define BIT_MAX_AGG_NUM_8814B(x) (((x) & BIT_MASK_MAX_AGG_NUM_8814B) << BIT_SHIFT_MAX_AGG_NUM_8814B)
-#define BIT_GET_MAX_AGG_NUM_8814B(x) (((x) >> BIT_SHIFT_MAX_AGG_NUM_8814B) & BIT_MASK_MAX_AGG_NUM_8814B)

+#define BIT_GET_MAX_AGG_NUM_8814B(x) (((x) >> BIT_SHIFT_MAX_AGG_NUM_8814B) & BIT_MASK_MAX_AGG_NUM_8814B)
+
 
 
 #define BIT_SHIFT_RTS_TXTIME_TH_8814B 8
 #define BIT_MASK_RTS_TXTIME_TH_8814B 0xff
 #define BIT_RTS_TXTIME_TH_8814B(x) (((x) & BIT_MASK_RTS_TXTIME_TH_8814B) << BIT_SHIFT_RTS_TXTIME_TH_8814B)
-#define BIT_GET_RTS_TXTIME_TH_8814B(x) (((x) >> BIT_SHIFT_RTS_TXTIME_TH_8814B) & BIT_MASK_RTS_TXTIME_TH_8814B)

+#define BIT_GET_RTS_TXTIME_TH_8814B(x) (((x) >> BIT_SHIFT_RTS_TXTIME_TH_8814B) & BIT_MASK_RTS_TXTIME_TH_8814B)
+
 
 
 #define BIT_SHIFT_RTS_LEN_TH_8814B 0
 #define BIT_MASK_RTS_LEN_TH_8814B 0xff
 #define BIT_RTS_LEN_TH_8814B(x) (((x) & BIT_MASK_RTS_LEN_TH_8814B) << BIT_SHIFT_RTS_LEN_TH_8814B)
-#define BIT_GET_RTS_LEN_TH_8814B(x) (((x) >> BIT_SHIFT_RTS_LEN_TH_8814B) & BIT_MASK_RTS_LEN_TH_8814B)

+#define BIT_GET_RTS_LEN_TH_8814B(x) (((x) >> BIT_SHIFT_RTS_LEN_TH_8814B) & BIT_MASK_RTS_LEN_TH_8814B)
+
 
 
 /* 2 REG_BAR_MODE_CTRL_8814B */
@@ -5804,20 +6382,23 @@
 #define BIT_SHIFT_BAR_RTY_LMT_8814B 16
 #define BIT_MASK_BAR_RTY_LMT_8814B 0x3
 #define BIT_BAR_RTY_LMT_8814B(x) (((x) & BIT_MASK_BAR_RTY_LMT_8814B) << BIT_SHIFT_BAR_RTY_LMT_8814B)
-#define BIT_GET_BAR_RTY_LMT_8814B(x) (((x) >> BIT_SHIFT_BAR_RTY_LMT_8814B) & BIT_MASK_BAR_RTY_LMT_8814B)

+#define BIT_GET_BAR_RTY_LMT_8814B(x) (((x) >> BIT_SHIFT_BAR_RTY_LMT_8814B) & BIT_MASK_BAR_RTY_LMT_8814B)
+
 
 
 #define BIT_SHIFT_BAR_PKT_TXTIME_TH_8814B 8
 #define BIT_MASK_BAR_PKT_TXTIME_TH_8814B 0xff
 #define BIT_BAR_PKT_TXTIME_TH_8814B(x) (((x) & BIT_MASK_BAR_PKT_TXTIME_TH_8814B) << BIT_SHIFT_BAR_PKT_TXTIME_TH_8814B)
-#define BIT_GET_BAR_PKT_TXTIME_TH_8814B(x) (((x) >> BIT_SHIFT_BAR_PKT_TXTIME_TH_8814B) & BIT_MASK_BAR_PKT_TXTIME_TH_8814B)

+#define BIT_GET_BAR_PKT_TXTIME_TH_8814B(x) (((x) >> BIT_SHIFT_BAR_PKT_TXTIME_TH_8814B) & BIT_MASK_BAR_PKT_TXTIME_TH_8814B)
+
 
 #define BIT_BAR_EN_V1_8814B BIT(6)
 
 #define BIT_SHIFT_BAR_PKTNUM_TH_V1_8814B 0
 #define BIT_MASK_BAR_PKTNUM_TH_V1_8814B 0x3f
 #define BIT_BAR_PKTNUM_TH_V1_8814B(x) (((x) & BIT_MASK_BAR_PKTNUM_TH_V1_8814B) << BIT_SHIFT_BAR_PKTNUM_TH_V1_8814B)
-#define BIT_GET_BAR_PKTNUM_TH_V1_8814B(x) (((x) >> BIT_SHIFT_BAR_PKTNUM_TH_V1_8814B) & BIT_MASK_BAR_PKTNUM_TH_V1_8814B)

+#define BIT_GET_BAR_PKTNUM_TH_V1_8814B(x) (((x) >> BIT_SHIFT_BAR_PKTNUM_TH_V1_8814B) & BIT_MASK_BAR_PKTNUM_TH_V1_8814B)
+
 
 
 /* 2 REG_RA_TRY_RATE_AGG_LMT_8814B */
@@ -5825,7 +6406,8 @@
 #define BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8814B 0
 #define BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8814B 0x3f
 #define BIT_RA_TRY_RATE_AGG_LMT_V1_8814B(x) (((x) & BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8814B) << BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8814B)
-#define BIT_GET_RA_TRY_RATE_AGG_LMT_V1_8814B(x) (((x) >> BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8814B) & BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8814B)

+#define BIT_GET_RA_TRY_RATE_AGG_LMT_V1_8814B(x) (((x) >> BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8814B) & BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8814B)
+
 
 
 /* 2 REG_MACID_SLEEP2_8814B */
@@ -5833,7 +6415,8 @@
 #define BIT_SHIFT_MACID95_64PKTSLEEP_8814B 0
 #define BIT_MASK_MACID95_64PKTSLEEP_8814B 0xffffffffL
 #define BIT_MACID95_64PKTSLEEP_8814B(x) (((x) & BIT_MASK_MACID95_64PKTSLEEP_8814B) << BIT_SHIFT_MACID95_64PKTSLEEP_8814B)
-#define BIT_GET_MACID95_64PKTSLEEP_8814B(x) (((x) >> BIT_SHIFT_MACID95_64PKTSLEEP_8814B) & BIT_MASK_MACID95_64PKTSLEEP_8814B)

+#define BIT_GET_MACID95_64PKTSLEEP_8814B(x) (((x) >> BIT_SHIFT_MACID95_64PKTSLEEP_8814B) & BIT_MASK_MACID95_64PKTSLEEP_8814B)
+
 
 
 /* 2 REG_MACID_SLEEP_8814B */
@@ -5841,7 +6424,8 @@
 #define BIT_SHIFT_MACID31_0_PKTSLEEP_8814B 0
 #define BIT_MASK_MACID31_0_PKTSLEEP_8814B 0xffffffffL
 #define BIT_MACID31_0_PKTSLEEP_8814B(x) (((x) & BIT_MASK_MACID31_0_PKTSLEEP_8814B) << BIT_SHIFT_MACID31_0_PKTSLEEP_8814B)
-#define BIT_GET_MACID31_0_PKTSLEEP_8814B(x) (((x) >> BIT_SHIFT_MACID31_0_PKTSLEEP_8814B) & BIT_MASK_MACID31_0_PKTSLEEP_8814B)

+#define BIT_GET_MACID31_0_PKTSLEEP_8814B(x) (((x) >> BIT_SHIFT_MACID31_0_PKTSLEEP_8814B) & BIT_MASK_MACID31_0_PKTSLEEP_8814B)
+
 
 
 /* 2 REG_HW_SEQ0_8814B */
@@ -5849,7 +6433,8 @@
 #define BIT_SHIFT_HW_SSN_SEQ0_8814B 0
 #define BIT_MASK_HW_SSN_SEQ0_8814B 0xfff
 #define BIT_HW_SSN_SEQ0_8814B(x) (((x) & BIT_MASK_HW_SSN_SEQ0_8814B) << BIT_SHIFT_HW_SSN_SEQ0_8814B)
-#define BIT_GET_HW_SSN_SEQ0_8814B(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ0_8814B) & BIT_MASK_HW_SSN_SEQ0_8814B)

+#define BIT_GET_HW_SSN_SEQ0_8814B(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ0_8814B) & BIT_MASK_HW_SSN_SEQ0_8814B)
+
 
 
 /* 2 REG_HW_SEQ1_8814B */
@@ -5857,7 +6442,8 @@
 #define BIT_SHIFT_HW_SSN_SEQ1_8814B 0
 #define BIT_MASK_HW_SSN_SEQ1_8814B 0xfff
 #define BIT_HW_SSN_SEQ1_8814B(x) (((x) & BIT_MASK_HW_SSN_SEQ1_8814B) << BIT_SHIFT_HW_SSN_SEQ1_8814B)
-#define BIT_GET_HW_SSN_SEQ1_8814B(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ1_8814B) & BIT_MASK_HW_SSN_SEQ1_8814B)

+#define BIT_GET_HW_SSN_SEQ1_8814B(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ1_8814B) & BIT_MASK_HW_SSN_SEQ1_8814B)
+
 
 
 /* 2 REG_HW_SEQ2_8814B */
@@ -5865,7 +6451,8 @@
 #define BIT_SHIFT_HW_SSN_SEQ2_8814B 0
 #define BIT_MASK_HW_SSN_SEQ2_8814B 0xfff
 #define BIT_HW_SSN_SEQ2_8814B(x) (((x) & BIT_MASK_HW_SSN_SEQ2_8814B) << BIT_SHIFT_HW_SSN_SEQ2_8814B)
-#define BIT_GET_HW_SSN_SEQ2_8814B(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ2_8814B) & BIT_MASK_HW_SSN_SEQ2_8814B)

+#define BIT_GET_HW_SSN_SEQ2_8814B(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ2_8814B) & BIT_MASK_HW_SSN_SEQ2_8814B)
+
 
 
 /* 2 REG_HW_SEQ3_8814B */
@@ -5873,7 +6460,8 @@
 #define BIT_SHIFT_HW_SSN_SEQ3_8814B 0
 #define BIT_MASK_HW_SSN_SEQ3_8814B 0xfff
 #define BIT_HW_SSN_SEQ3_8814B(x) (((x) & BIT_MASK_HW_SSN_SEQ3_8814B) << BIT_SHIFT_HW_SSN_SEQ3_8814B)
-#define BIT_GET_HW_SSN_SEQ3_8814B(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ3_8814B) & BIT_MASK_HW_SSN_SEQ3_8814B)

+#define BIT_GET_HW_SSN_SEQ3_8814B(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ3_8814B) & BIT_MASK_HW_SSN_SEQ3_8814B)
+
 
 
 /* 2 REG_NULL_PKT_STATUS_V1_8814B */
@@ -5881,7 +6469,8 @@
 #define BIT_SHIFT_PTCL_TOTAL_PG_V2_8814B 2
 #define BIT_MASK_PTCL_TOTAL_PG_V2_8814B 0x3fff
 #define BIT_PTCL_TOTAL_PG_V2_8814B(x) (((x) & BIT_MASK_PTCL_TOTAL_PG_V2_8814B) << BIT_SHIFT_PTCL_TOTAL_PG_V2_8814B)
-#define BIT_GET_PTCL_TOTAL_PG_V2_8814B(x) (((x) >> BIT_SHIFT_PTCL_TOTAL_PG_V2_8814B) & BIT_MASK_PTCL_TOTAL_PG_V2_8814B)

+#define BIT_GET_PTCL_TOTAL_PG_V2_8814B(x) (((x) >> BIT_SHIFT_PTCL_TOTAL_PG_V2_8814B) & BIT_MASK_PTCL_TOTAL_PG_V2_8814B)
+
 
 #define BIT_TX_NULL_1_8814B BIT(1)
 #define BIT_TX_NULL_0_8814B BIT(0)
@@ -5915,7 +6504,8 @@
 #define BIT_SHIFT_BT_POLLUTE_PKT_CNT_8814B 0
 #define BIT_MASK_BT_POLLUTE_PKT_CNT_8814B 0xffff
 #define BIT_BT_POLLUTE_PKT_CNT_8814B(x) (((x) & BIT_MASK_BT_POLLUTE_PKT_CNT_8814B) << BIT_SHIFT_BT_POLLUTE_PKT_CNT_8814B)
-#define BIT_GET_BT_POLLUTE_PKT_CNT_8814B(x) (((x) >> BIT_SHIFT_BT_POLLUTE_PKT_CNT_8814B) & BIT_MASK_BT_POLLUTE_PKT_CNT_8814B)

+#define BIT_GET_BT_POLLUTE_PKT_CNT_8814B(x) (((x) >> BIT_SHIFT_BT_POLLUTE_PKT_CNT_8814B) & BIT_MASK_BT_POLLUTE_PKT_CNT_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -5925,7 +6515,8 @@
 #define BIT_SHIFT_PTCL_DBG_8814B 0
 #define BIT_MASK_PTCL_DBG_8814B 0xffffffffL
 #define BIT_PTCL_DBG_8814B(x) (((x) & BIT_MASK_PTCL_DBG_8814B) << BIT_SHIFT_PTCL_DBG_8814B)
-#define BIT_GET_PTCL_DBG_8814B(x) (((x) >> BIT_SHIFT_PTCL_DBG_8814B) & BIT_MASK_PTCL_DBG_8814B)

+#define BIT_GET_PTCL_DBG_8814B(x) (((x) >> BIT_SHIFT_PTCL_DBG_8814B) & BIT_MASK_PTCL_DBG_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -5935,14 +6526,16 @@
 #define BIT_SHIFT_TRI_HEAD_ADDR_8814B 16
 #define BIT_MASK_TRI_HEAD_ADDR_8814B 0xfff
 #define BIT_TRI_HEAD_ADDR_8814B(x) (((x) & BIT_MASK_TRI_HEAD_ADDR_8814B) << BIT_SHIFT_TRI_HEAD_ADDR_8814B)
-#define BIT_GET_TRI_HEAD_ADDR_8814B(x) (((x) >> BIT_SHIFT_TRI_HEAD_ADDR_8814B) & BIT_MASK_TRI_HEAD_ADDR_8814B)

+#define BIT_GET_TRI_HEAD_ADDR_8814B(x) (((x) >> BIT_SHIFT_TRI_HEAD_ADDR_8814B) & BIT_MASK_TRI_HEAD_ADDR_8814B)
+
 
 #define BIT_DROP_TH_EN_8814B BIT(8)
 
 #define BIT_SHIFT_DROP_TH_8814B 0
 #define BIT_MASK_DROP_TH_8814B 0xff
 #define BIT_DROP_TH_8814B(x) (((x) & BIT_MASK_DROP_TH_8814B) << BIT_SHIFT_DROP_TH_8814B)
-#define BIT_GET_DROP_TH_8814B(x) (((x) >> BIT_SHIFT_DROP_TH_8814B) & BIT_MASK_DROP_TH_8814B)

+#define BIT_GET_DROP_TH_8814B(x) (((x) >> BIT_SHIFT_DROP_TH_8814B) & BIT_MASK_DROP_TH_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -5962,26 +6555,30 @@
 #define BIT_SHIFT_GTAB_ID_8814B 28
 #define BIT_MASK_GTAB_ID_8814B 0x7
 #define BIT_GTAB_ID_8814B(x) (((x) & BIT_MASK_GTAB_ID_8814B) << BIT_SHIFT_GTAB_ID_8814B)
-#define BIT_GET_GTAB_ID_8814B(x) (((x) >> BIT_SHIFT_GTAB_ID_8814B) & BIT_MASK_GTAB_ID_8814B)

+#define BIT_GET_GTAB_ID_8814B(x) (((x) >> BIT_SHIFT_GTAB_ID_8814B) & BIT_MASK_GTAB_ID_8814B)
+
 
 
 #define BIT_SHIFT_AC1_PKT_INFO_8814B 16
 #define BIT_MASK_AC1_PKT_INFO_8814B 0xfff
 #define BIT_AC1_PKT_INFO_8814B(x) (((x) & BIT_MASK_AC1_PKT_INFO_8814B) << BIT_SHIFT_AC1_PKT_INFO_8814B)
-#define BIT_GET_AC1_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_AC1_PKT_INFO_8814B) & BIT_MASK_AC1_PKT_INFO_8814B)

+#define BIT_GET_AC1_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_AC1_PKT_INFO_8814B) & BIT_MASK_AC1_PKT_INFO_8814B)
+
 
 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8814B BIT(15)
 
 #define BIT_SHIFT_GTAB_ID_V1_8814B 12
 #define BIT_MASK_GTAB_ID_V1_8814B 0x7
 #define BIT_GTAB_ID_V1_8814B(x) (((x) & BIT_MASK_GTAB_ID_V1_8814B) << BIT_SHIFT_GTAB_ID_V1_8814B)
-#define BIT_GET_GTAB_ID_V1_8814B(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8814B) & BIT_MASK_GTAB_ID_V1_8814B)

+#define BIT_GET_GTAB_ID_V1_8814B(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8814B) & BIT_MASK_GTAB_ID_V1_8814B)
+
 
 
 #define BIT_SHIFT_AC0_PKT_INFO_8814B 0
 #define BIT_MASK_AC0_PKT_INFO_8814B 0xfff
 #define BIT_AC0_PKT_INFO_8814B(x) (((x) & BIT_MASK_AC0_PKT_INFO_8814B) << BIT_SHIFT_AC0_PKT_INFO_8814B)
-#define BIT_GET_AC0_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_AC0_PKT_INFO_8814B) & BIT_MASK_AC0_PKT_INFO_8814B)

+#define BIT_GET_AC0_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_AC0_PKT_INFO_8814B) & BIT_MASK_AC0_PKT_INFO_8814B)
+
 
 
 /* 2 REG_Q2_Q3_INFO_8814B */
@@ -5990,26 +6587,30 @@
 #define BIT_SHIFT_GTAB_ID_8814B 28
 #define BIT_MASK_GTAB_ID_8814B 0x7
 #define BIT_GTAB_ID_8814B(x) (((x) & BIT_MASK_GTAB_ID_8814B) << BIT_SHIFT_GTAB_ID_8814B)
-#define BIT_GET_GTAB_ID_8814B(x) (((x) >> BIT_SHIFT_GTAB_ID_8814B) & BIT_MASK_GTAB_ID_8814B)

+#define BIT_GET_GTAB_ID_8814B(x) (((x) >> BIT_SHIFT_GTAB_ID_8814B) & BIT_MASK_GTAB_ID_8814B)
+
 
 
 #define BIT_SHIFT_AC3_PKT_INFO_8814B 16
 #define BIT_MASK_AC3_PKT_INFO_8814B 0xfff
 #define BIT_AC3_PKT_INFO_8814B(x) (((x) & BIT_MASK_AC3_PKT_INFO_8814B) << BIT_SHIFT_AC3_PKT_INFO_8814B)
-#define BIT_GET_AC3_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_AC3_PKT_INFO_8814B) & BIT_MASK_AC3_PKT_INFO_8814B)

+#define BIT_GET_AC3_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_AC3_PKT_INFO_8814B) & BIT_MASK_AC3_PKT_INFO_8814B)
+
 
 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8814B BIT(15)
 
 #define BIT_SHIFT_GTAB_ID_V1_8814B 12
 #define BIT_MASK_GTAB_ID_V1_8814B 0x7
 #define BIT_GTAB_ID_V1_8814B(x) (((x) & BIT_MASK_GTAB_ID_V1_8814B) << BIT_SHIFT_GTAB_ID_V1_8814B)
-#define BIT_GET_GTAB_ID_V1_8814B(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8814B) & BIT_MASK_GTAB_ID_V1_8814B)

+#define BIT_GET_GTAB_ID_V1_8814B(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8814B) & BIT_MASK_GTAB_ID_V1_8814B)
+
 
 
 #define BIT_SHIFT_AC2_PKT_INFO_8814B 0
 #define BIT_MASK_AC2_PKT_INFO_8814B 0xfff
 #define BIT_AC2_PKT_INFO_8814B(x) (((x) & BIT_MASK_AC2_PKT_INFO_8814B) << BIT_SHIFT_AC2_PKT_INFO_8814B)
-#define BIT_GET_AC2_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_AC2_PKT_INFO_8814B) & BIT_MASK_AC2_PKT_INFO_8814B)

+#define BIT_GET_AC2_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_AC2_PKT_INFO_8814B) & BIT_MASK_AC2_PKT_INFO_8814B)
+
 
 
 /* 2 REG_Q4_Q5_INFO_8814B */
@@ -6018,26 +6619,30 @@
 #define BIT_SHIFT_GTAB_ID_8814B 28
 #define BIT_MASK_GTAB_ID_8814B 0x7
 #define BIT_GTAB_ID_8814B(x) (((x) & BIT_MASK_GTAB_ID_8814B) << BIT_SHIFT_GTAB_ID_8814B)
-#define BIT_GET_GTAB_ID_8814B(x) (((x) >> BIT_SHIFT_GTAB_ID_8814B) & BIT_MASK_GTAB_ID_8814B)

+#define BIT_GET_GTAB_ID_8814B(x) (((x) >> BIT_SHIFT_GTAB_ID_8814B) & BIT_MASK_GTAB_ID_8814B)
+
 
 
 #define BIT_SHIFT_AC5_PKT_INFO_8814B 16
 #define BIT_MASK_AC5_PKT_INFO_8814B 0xfff
 #define BIT_AC5_PKT_INFO_8814B(x) (((x) & BIT_MASK_AC5_PKT_INFO_8814B) << BIT_SHIFT_AC5_PKT_INFO_8814B)
-#define BIT_GET_AC5_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_AC5_PKT_INFO_8814B) & BIT_MASK_AC5_PKT_INFO_8814B)

+#define BIT_GET_AC5_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_AC5_PKT_INFO_8814B) & BIT_MASK_AC5_PKT_INFO_8814B)
+
 
 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8814B BIT(15)
 
 #define BIT_SHIFT_GTAB_ID_V1_8814B 12
 #define BIT_MASK_GTAB_ID_V1_8814B 0x7
 #define BIT_GTAB_ID_V1_8814B(x) (((x) & BIT_MASK_GTAB_ID_V1_8814B) << BIT_SHIFT_GTAB_ID_V1_8814B)
-#define BIT_GET_GTAB_ID_V1_8814B(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8814B) & BIT_MASK_GTAB_ID_V1_8814B)

+#define BIT_GET_GTAB_ID_V1_8814B(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8814B) & BIT_MASK_GTAB_ID_V1_8814B)
+
 
 
 #define BIT_SHIFT_AC4_PKT_INFO_8814B 0
 #define BIT_MASK_AC4_PKT_INFO_8814B 0xfff
 #define BIT_AC4_PKT_INFO_8814B(x) (((x) & BIT_MASK_AC4_PKT_INFO_8814B) << BIT_SHIFT_AC4_PKT_INFO_8814B)
-#define BIT_GET_AC4_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_AC4_PKT_INFO_8814B) & BIT_MASK_AC4_PKT_INFO_8814B)

+#define BIT_GET_AC4_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_AC4_PKT_INFO_8814B) & BIT_MASK_AC4_PKT_INFO_8814B)
+
 
 
 /* 2 REG_Q6_Q7_INFO_8814B */
@@ -6046,26 +6651,30 @@
 #define BIT_SHIFT_GTAB_ID_8814B 28
 #define BIT_MASK_GTAB_ID_8814B 0x7
 #define BIT_GTAB_ID_8814B(x) (((x) & BIT_MASK_GTAB_ID_8814B) << BIT_SHIFT_GTAB_ID_8814B)
-#define BIT_GET_GTAB_ID_8814B(x) (((x) >> BIT_SHIFT_GTAB_ID_8814B) & BIT_MASK_GTAB_ID_8814B)

+#define BIT_GET_GTAB_ID_8814B(x) (((x) >> BIT_SHIFT_GTAB_ID_8814B) & BIT_MASK_GTAB_ID_8814B)
+
 
 
 #define BIT_SHIFT_AC7_PKT_INFO_8814B 16
 #define BIT_MASK_AC7_PKT_INFO_8814B 0xfff
 #define BIT_AC7_PKT_INFO_8814B(x) (((x) & BIT_MASK_AC7_PKT_INFO_8814B) << BIT_SHIFT_AC7_PKT_INFO_8814B)
-#define BIT_GET_AC7_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_AC7_PKT_INFO_8814B) & BIT_MASK_AC7_PKT_INFO_8814B)

+#define BIT_GET_AC7_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_AC7_PKT_INFO_8814B) & BIT_MASK_AC7_PKT_INFO_8814B)
+
 
 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8814B BIT(15)
 
 #define BIT_SHIFT_GTAB_ID_V1_8814B 12
 #define BIT_MASK_GTAB_ID_V1_8814B 0x7
 #define BIT_GTAB_ID_V1_8814B(x) (((x) & BIT_MASK_GTAB_ID_V1_8814B) << BIT_SHIFT_GTAB_ID_V1_8814B)
-#define BIT_GET_GTAB_ID_V1_8814B(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8814B) & BIT_MASK_GTAB_ID_V1_8814B)

+#define BIT_GET_GTAB_ID_V1_8814B(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8814B) & BIT_MASK_GTAB_ID_V1_8814B)
+
 
 
 #define BIT_SHIFT_AC6_PKT_INFO_8814B 0
 #define BIT_MASK_AC6_PKT_INFO_8814B 0xfff
 #define BIT_AC6_PKT_INFO_8814B(x) (((x) & BIT_MASK_AC6_PKT_INFO_8814B) << BIT_SHIFT_AC6_PKT_INFO_8814B)
-#define BIT_GET_AC6_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_AC6_PKT_INFO_8814B) & BIT_MASK_AC6_PKT_INFO_8814B)

+#define BIT_GET_AC6_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_AC6_PKT_INFO_8814B) & BIT_MASK_AC6_PKT_INFO_8814B)
+
 
 
 /* 2 REG_MGQ_HIQ_INFO_8814B */
@@ -6073,13 +6682,15 @@
 #define BIT_SHIFT_HIQ_PKT_INFO_8814B 16
 #define BIT_MASK_HIQ_PKT_INFO_8814B 0xfff
 #define BIT_HIQ_PKT_INFO_8814B(x) (((x) & BIT_MASK_HIQ_PKT_INFO_8814B) << BIT_SHIFT_HIQ_PKT_INFO_8814B)
-#define BIT_GET_HIQ_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_HIQ_PKT_INFO_8814B) & BIT_MASK_HIQ_PKT_INFO_8814B)

+#define BIT_GET_HIQ_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_HIQ_PKT_INFO_8814B) & BIT_MASK_HIQ_PKT_INFO_8814B)
+
 
 
 #define BIT_SHIFT_MGQ_PKT_INFO_8814B 0
 #define BIT_MASK_MGQ_PKT_INFO_8814B 0xfff
 #define BIT_MGQ_PKT_INFO_8814B(x) (((x) & BIT_MASK_MGQ_PKT_INFO_8814B) << BIT_SHIFT_MGQ_PKT_INFO_8814B)
-#define BIT_GET_MGQ_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_MGQ_PKT_INFO_8814B) & BIT_MASK_MGQ_PKT_INFO_8814B)

+#define BIT_GET_MGQ_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_MGQ_PKT_INFO_8814B) & BIT_MASK_MGQ_PKT_INFO_8814B)
+
 
 
 /* 2 REG_CMDQ_BCNQ_INFO_8814B */
@@ -6087,13 +6698,15 @@
 #define BIT_SHIFT_CMDQ_PKT_INFO_8814B 16
 #define BIT_MASK_CMDQ_PKT_INFO_8814B 0xfff
 #define BIT_CMDQ_PKT_INFO_8814B(x) (((x) & BIT_MASK_CMDQ_PKT_INFO_8814B) << BIT_SHIFT_CMDQ_PKT_INFO_8814B)
-#define BIT_GET_CMDQ_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_CMDQ_PKT_INFO_8814B) & BIT_MASK_CMDQ_PKT_INFO_8814B)

+#define BIT_GET_CMDQ_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_CMDQ_PKT_INFO_8814B) & BIT_MASK_CMDQ_PKT_INFO_8814B)
+
 
 
 #define BIT_SHIFT_BCNQ_PKT_INFO_8814B 0
 #define BIT_MASK_BCNQ_PKT_INFO_8814B 0xfff
 #define BIT_BCNQ_PKT_INFO_8814B(x) (((x) & BIT_MASK_BCNQ_PKT_INFO_8814B) << BIT_SHIFT_BCNQ_PKT_INFO_8814B)
-#define BIT_GET_BCNQ_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_BCNQ_PKT_INFO_8814B) & BIT_MASK_BCNQ_PKT_INFO_8814B)

+#define BIT_GET_BCNQ_PKT_INFO_8814B(x) (((x) >> BIT_SHIFT_BCNQ_PKT_INFO_8814B) & BIT_MASK_BCNQ_PKT_INFO_8814B)
+
 
 
 /* 2 REG_USEREG_SETTING_8814B */
@@ -6102,13 +6715,15 @@
 #define BIT_SHIFT_RETRY_USEREG_8814B 19
 #define BIT_MASK_RETRY_USEREG_8814B 0x3
 #define BIT_RETRY_USEREG_8814B(x) (((x) & BIT_MASK_RETRY_USEREG_8814B) << BIT_SHIFT_RETRY_USEREG_8814B)
-#define BIT_GET_RETRY_USEREG_8814B(x) (((x) >> BIT_SHIFT_RETRY_USEREG_8814B) & BIT_MASK_RETRY_USEREG_8814B)

+#define BIT_GET_RETRY_USEREG_8814B(x) (((x) >> BIT_SHIFT_RETRY_USEREG_8814B) & BIT_MASK_RETRY_USEREG_8814B)
+
 
 
 #define BIT_SHIFT_TRYPKT_USEREG_8814B 17
 #define BIT_MASK_TRYPKT_USEREG_8814B 0x3
 #define BIT_TRYPKT_USEREG_8814B(x) (((x) & BIT_MASK_TRYPKT_USEREG_8814B) << BIT_SHIFT_TRYPKT_USEREG_8814B)
-#define BIT_GET_TRYPKT_USEREG_8814B(x) (((x) >> BIT_SHIFT_TRYPKT_USEREG_8814B) & BIT_MASK_TRYPKT_USEREG_8814B)

+#define BIT_GET_TRYPKT_USEREG_8814B(x) (((x) >> BIT_SHIFT_TRYPKT_USEREG_8814B) & BIT_MASK_TRYPKT_USEREG_8814B)
+
 
 #define BIT_CTLPKT_USEREG_8814B BIT(16)
 
@@ -6117,7 +6732,8 @@
 #define BIT_SHIFT_AESIV_OFFSET_8814B 0
 #define BIT_MASK_AESIV_OFFSET_8814B 0xfff
 #define BIT_AESIV_OFFSET_8814B(x) (((x) & BIT_MASK_AESIV_OFFSET_8814B) << BIT_SHIFT_AESIV_OFFSET_8814B)
-#define BIT_GET_AESIV_OFFSET_8814B(x) (((x) >> BIT_SHIFT_AESIV_OFFSET_8814B) & BIT_MASK_AESIV_OFFSET_8814B)

+#define BIT_GET_AESIV_OFFSET_8814B(x) (((x) >> BIT_SHIFT_AESIV_OFFSET_8814B) & BIT_MASK_AESIV_OFFSET_8814B)
+
 
 
 /* 2 REG_BF0_TIME_SETTING_8814B */
@@ -6129,13 +6745,15 @@
 #define BIT_SHIFT_BF0_PRETIME_OVER_8814B 16
 #define BIT_MASK_BF0_PRETIME_OVER_8814B 0xfff
 #define BIT_BF0_PRETIME_OVER_8814B(x) (((x) & BIT_MASK_BF0_PRETIME_OVER_8814B) << BIT_SHIFT_BF0_PRETIME_OVER_8814B)
-#define BIT_GET_BF0_PRETIME_OVER_8814B(x) (((x) >> BIT_SHIFT_BF0_PRETIME_OVER_8814B) & BIT_MASK_BF0_PRETIME_OVER_8814B)

+#define BIT_GET_BF0_PRETIME_OVER_8814B(x) (((x) >> BIT_SHIFT_BF0_PRETIME_OVER_8814B) & BIT_MASK_BF0_PRETIME_OVER_8814B)
+
 
 
 #define BIT_SHIFT_BF0_LIFETIME_8814B 0
 #define BIT_MASK_BF0_LIFETIME_8814B 0xffff
 #define BIT_BF0_LIFETIME_8814B(x) (((x) & BIT_MASK_BF0_LIFETIME_8814B) << BIT_SHIFT_BF0_LIFETIME_8814B)
-#define BIT_GET_BF0_LIFETIME_8814B(x) (((x) >> BIT_SHIFT_BF0_LIFETIME_8814B) & BIT_MASK_BF0_LIFETIME_8814B)

+#define BIT_GET_BF0_LIFETIME_8814B(x) (((x) >> BIT_SHIFT_BF0_LIFETIME_8814B) & BIT_MASK_BF0_LIFETIME_8814B)
+
 
 
 /* 2 REG_BF1_TIME_SETTING_8814B */
@@ -6147,13 +6765,15 @@
 #define BIT_SHIFT_BF1_PRETIME_OVER_8814B 16
 #define BIT_MASK_BF1_PRETIME_OVER_8814B 0xfff
 #define BIT_BF1_PRETIME_OVER_8814B(x) (((x) & BIT_MASK_BF1_PRETIME_OVER_8814B) << BIT_SHIFT_BF1_PRETIME_OVER_8814B)
-#define BIT_GET_BF1_PRETIME_OVER_8814B(x) (((x) >> BIT_SHIFT_BF1_PRETIME_OVER_8814B) & BIT_MASK_BF1_PRETIME_OVER_8814B)

+#define BIT_GET_BF1_PRETIME_OVER_8814B(x) (((x) >> BIT_SHIFT_BF1_PRETIME_OVER_8814B) & BIT_MASK_BF1_PRETIME_OVER_8814B)
+
 
 
 #define BIT_SHIFT_BF1_LIFETIME_8814B 0
 #define BIT_MASK_BF1_LIFETIME_8814B 0xffff
 #define BIT_BF1_LIFETIME_8814B(x) (((x) & BIT_MASK_BF1_LIFETIME_8814B) << BIT_SHIFT_BF1_LIFETIME_8814B)
-#define BIT_GET_BF1_LIFETIME_8814B(x) (((x) >> BIT_SHIFT_BF1_LIFETIME_8814B) & BIT_MASK_BF1_LIFETIME_8814B)

+#define BIT_GET_BF1_LIFETIME_8814B(x) (((x) >> BIT_SHIFT_BF1_LIFETIME_8814B) & BIT_MASK_BF1_LIFETIME_8814B)
+
 
 
 /* 2 REG_BF_TIMEOUT_EN_8814B */
@@ -6167,7 +6787,8 @@
 #define BIT_SHIFT_MACID31_0_RELEASE_8814B 0
 #define BIT_MASK_MACID31_0_RELEASE_8814B 0xffffffffL
 #define BIT_MACID31_0_RELEASE_8814B(x) (((x) & BIT_MASK_MACID31_0_RELEASE_8814B) << BIT_SHIFT_MACID31_0_RELEASE_8814B)
-#define BIT_GET_MACID31_0_RELEASE_8814B(x) (((x) >> BIT_SHIFT_MACID31_0_RELEASE_8814B) & BIT_MASK_MACID31_0_RELEASE_8814B)

+#define BIT_GET_MACID31_0_RELEASE_8814B(x) (((x) >> BIT_SHIFT_MACID31_0_RELEASE_8814B) & BIT_MASK_MACID31_0_RELEASE_8814B)
+
 
 
 /* 2 REG_MACID_RELEASE1_8814B */
@@ -6175,7 +6796,8 @@
 #define BIT_SHIFT_MACID63_32_RELEASE_8814B 0
 #define BIT_MASK_MACID63_32_RELEASE_8814B 0xffffffffL
 #define BIT_MACID63_32_RELEASE_8814B(x) (((x) & BIT_MASK_MACID63_32_RELEASE_8814B) << BIT_SHIFT_MACID63_32_RELEASE_8814B)
-#define BIT_GET_MACID63_32_RELEASE_8814B(x) (((x) >> BIT_SHIFT_MACID63_32_RELEASE_8814B) & BIT_MASK_MACID63_32_RELEASE_8814B)

+#define BIT_GET_MACID63_32_RELEASE_8814B(x) (((x) >> BIT_SHIFT_MACID63_32_RELEASE_8814B) & BIT_MASK_MACID63_32_RELEASE_8814B)
+
 
 
 /* 2 REG_MACID_RELEASE2_8814B */
@@ -6183,7 +6805,8 @@
 #define BIT_SHIFT_MACID95_64_RELEASE_8814B 0
 #define BIT_MASK_MACID95_64_RELEASE_8814B 0xffffffffL
 #define BIT_MACID95_64_RELEASE_8814B(x) (((x) & BIT_MASK_MACID95_64_RELEASE_8814B) << BIT_SHIFT_MACID95_64_RELEASE_8814B)
-#define BIT_GET_MACID95_64_RELEASE_8814B(x) (((x) >> BIT_SHIFT_MACID95_64_RELEASE_8814B) & BIT_MASK_MACID95_64_RELEASE_8814B)

+#define BIT_GET_MACID95_64_RELEASE_8814B(x) (((x) >> BIT_SHIFT_MACID95_64_RELEASE_8814B) & BIT_MASK_MACID95_64_RELEASE_8814B)
+
 
 
 /* 2 REG_MACID_RELEASE3_8814B */
@@ -6191,7 +6814,8 @@
 #define BIT_SHIFT_MACID127_96_RELEASE_8814B 0
 #define BIT_MASK_MACID127_96_RELEASE_8814B 0xffffffffL
 #define BIT_MACID127_96_RELEASE_8814B(x) (((x) & BIT_MASK_MACID127_96_RELEASE_8814B) << BIT_SHIFT_MACID127_96_RELEASE_8814B)
-#define BIT_GET_MACID127_96_RELEASE_8814B(x) (((x) >> BIT_SHIFT_MACID127_96_RELEASE_8814B) & BIT_MASK_MACID127_96_RELEASE_8814B)

+#define BIT_GET_MACID127_96_RELEASE_8814B(x) (((x) >> BIT_SHIFT_MACID127_96_RELEASE_8814B) & BIT_MASK_MACID127_96_RELEASE_8814B)
+
 
 
 /* 2 REG_MACID_RELEASE_SETTING_8814B */
@@ -6200,7 +6824,8 @@
 #define BIT_SHIFT_MACID_OFFSET_8814B 0
 #define BIT_MASK_MACID_OFFSET_8814B 0x7f
 #define BIT_MACID_OFFSET_8814B(x) (((x) & BIT_MASK_MACID_OFFSET_8814B) << BIT_SHIFT_MACID_OFFSET_8814B)
-#define BIT_GET_MACID_OFFSET_8814B(x) (((x) >> BIT_SHIFT_MACID_OFFSET_8814B) & BIT_MASK_MACID_OFFSET_8814B)

+#define BIT_GET_MACID_OFFSET_8814B(x) (((x) >> BIT_SHIFT_MACID_OFFSET_8814B) & BIT_MASK_MACID_OFFSET_8814B)
+
 
 
 /* 2 REG_FAST_EDCA_VOVI_SETTING_8814B */
@@ -6208,27 +6833,31 @@
 #define BIT_SHIFT_VI_FAST_EDCA_TO_8814B 24
 #define BIT_MASK_VI_FAST_EDCA_TO_8814B 0xff
 #define BIT_VI_FAST_EDCA_TO_8814B(x) (((x) & BIT_MASK_VI_FAST_EDCA_TO_8814B) << BIT_SHIFT_VI_FAST_EDCA_TO_8814B)
-#define BIT_GET_VI_FAST_EDCA_TO_8814B(x) (((x) >> BIT_SHIFT_VI_FAST_EDCA_TO_8814B) & BIT_MASK_VI_FAST_EDCA_TO_8814B)

+#define BIT_GET_VI_FAST_EDCA_TO_8814B(x) (((x) >> BIT_SHIFT_VI_FAST_EDCA_TO_8814B) & BIT_MASK_VI_FAST_EDCA_TO_8814B)
+
 
 #define BIT_VI_THRESHOLD_SEL_8814B BIT(23)
 
 #define BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8814B 16
 #define BIT_MASK_VI_FAST_EDCA_PKT_TH_8814B 0x7f
 #define BIT_VI_FAST_EDCA_PKT_TH_8814B(x) (((x) & BIT_MASK_VI_FAST_EDCA_PKT_TH_8814B) << BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8814B)
-#define BIT_GET_VI_FAST_EDCA_PKT_TH_8814B(x) (((x) >> BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8814B) & BIT_MASK_VI_FAST_EDCA_PKT_TH_8814B)

+#define BIT_GET_VI_FAST_EDCA_PKT_TH_8814B(x) (((x) >> BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8814B) & BIT_MASK_VI_FAST_EDCA_PKT_TH_8814B)
+
 
 
 #define BIT_SHIFT_VO_FAST_EDCA_TO_8814B 8
 #define BIT_MASK_VO_FAST_EDCA_TO_8814B 0xff
 #define BIT_VO_FAST_EDCA_TO_8814B(x) (((x) & BIT_MASK_VO_FAST_EDCA_TO_8814B) << BIT_SHIFT_VO_FAST_EDCA_TO_8814B)
-#define BIT_GET_VO_FAST_EDCA_TO_8814B(x) (((x) >> BIT_SHIFT_VO_FAST_EDCA_TO_8814B) & BIT_MASK_VO_FAST_EDCA_TO_8814B)

+#define BIT_GET_VO_FAST_EDCA_TO_8814B(x) (((x) >> BIT_SHIFT_VO_FAST_EDCA_TO_8814B) & BIT_MASK_VO_FAST_EDCA_TO_8814B)
+
 
 #define BIT_VO_THRESHOLD_SEL_8814B BIT(7)
 
 #define BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8814B 0
 #define BIT_MASK_VO_FAST_EDCA_PKT_TH_8814B 0x7f
 #define BIT_VO_FAST_EDCA_PKT_TH_8814B(x) (((x) & BIT_MASK_VO_FAST_EDCA_PKT_TH_8814B) << BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8814B)
-#define BIT_GET_VO_FAST_EDCA_PKT_TH_8814B(x) (((x) >> BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8814B) & BIT_MASK_VO_FAST_EDCA_PKT_TH_8814B)

+#define BIT_GET_VO_FAST_EDCA_PKT_TH_8814B(x) (((x) >> BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8814B) & BIT_MASK_VO_FAST_EDCA_PKT_TH_8814B)
+
 
 
 /* 2 REG_FAST_EDCA_BEBK_SETTING_8814B */
@@ -6236,27 +6865,31 @@
 #define BIT_SHIFT_BK_FAST_EDCA_TO_8814B 24
 #define BIT_MASK_BK_FAST_EDCA_TO_8814B 0xff
 #define BIT_BK_FAST_EDCA_TO_8814B(x) (((x) & BIT_MASK_BK_FAST_EDCA_TO_8814B) << BIT_SHIFT_BK_FAST_EDCA_TO_8814B)
-#define BIT_GET_BK_FAST_EDCA_TO_8814B(x) (((x) >> BIT_SHIFT_BK_FAST_EDCA_TO_8814B) & BIT_MASK_BK_FAST_EDCA_TO_8814B)

+#define BIT_GET_BK_FAST_EDCA_TO_8814B(x) (((x) >> BIT_SHIFT_BK_FAST_EDCA_TO_8814B) & BIT_MASK_BK_FAST_EDCA_TO_8814B)
+
 
 #define BIT_BK_THRESHOLD_SEL_8814B BIT(23)
 
 #define BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8814B 16
 #define BIT_MASK_BK_FAST_EDCA_PKT_TH_8814B 0x7f
 #define BIT_BK_FAST_EDCA_PKT_TH_8814B(x) (((x) & BIT_MASK_BK_FAST_EDCA_PKT_TH_8814B) << BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8814B)
-#define BIT_GET_BK_FAST_EDCA_PKT_TH_8814B(x) (((x) >> BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8814B) & BIT_MASK_BK_FAST_EDCA_PKT_TH_8814B)

+#define BIT_GET_BK_FAST_EDCA_PKT_TH_8814B(x) (((x) >> BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8814B) & BIT_MASK_BK_FAST_EDCA_PKT_TH_8814B)
+
 
 
 #define BIT_SHIFT_BE_FAST_EDCA_TO_8814B 8
 #define BIT_MASK_BE_FAST_EDCA_TO_8814B 0xff
 #define BIT_BE_FAST_EDCA_TO_8814B(x) (((x) & BIT_MASK_BE_FAST_EDCA_TO_8814B) << BIT_SHIFT_BE_FAST_EDCA_TO_8814B)
-#define BIT_GET_BE_FAST_EDCA_TO_8814B(x) (((x) >> BIT_SHIFT_BE_FAST_EDCA_TO_8814B) & BIT_MASK_BE_FAST_EDCA_TO_8814B)

+#define BIT_GET_BE_FAST_EDCA_TO_8814B(x) (((x) >> BIT_SHIFT_BE_FAST_EDCA_TO_8814B) & BIT_MASK_BE_FAST_EDCA_TO_8814B)
+
 
 #define BIT_BE_THRESHOLD_SEL_8814B BIT(7)
 
 #define BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8814B 0
 #define BIT_MASK_BE_FAST_EDCA_PKT_TH_8814B 0x7f
 #define BIT_BE_FAST_EDCA_PKT_TH_8814B(x) (((x) & BIT_MASK_BE_FAST_EDCA_PKT_TH_8814B) << BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8814B)
-#define BIT_GET_BE_FAST_EDCA_PKT_TH_8814B(x) (((x) >> BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8814B) & BIT_MASK_BE_FAST_EDCA_PKT_TH_8814B)

+#define BIT_GET_BE_FAST_EDCA_PKT_TH_8814B(x) (((x) >> BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8814B) & BIT_MASK_BE_FAST_EDCA_PKT_TH_8814B)
+
 
 
 /* 2 REG_MACID_DROP0_8814B */
@@ -6264,7 +6897,8 @@
 #define BIT_SHIFT_MACID31_0_DROP_8814B 0
 #define BIT_MASK_MACID31_0_DROP_8814B 0xffffffffL
 #define BIT_MACID31_0_DROP_8814B(x) (((x) & BIT_MASK_MACID31_0_DROP_8814B) << BIT_SHIFT_MACID31_0_DROP_8814B)
-#define BIT_GET_MACID31_0_DROP_8814B(x) (((x) >> BIT_SHIFT_MACID31_0_DROP_8814B) & BIT_MASK_MACID31_0_DROP_8814B)

+#define BIT_GET_MACID31_0_DROP_8814B(x) (((x) >> BIT_SHIFT_MACID31_0_DROP_8814B) & BIT_MASK_MACID31_0_DROP_8814B)
+
 
 
 /* 2 REG_MACID_DROP1_8814B */
@@ -6272,7 +6906,8 @@
 #define BIT_SHIFT_MACID63_32_DROP_8814B 0
 #define BIT_MASK_MACID63_32_DROP_8814B 0xffffffffL
 #define BIT_MACID63_32_DROP_8814B(x) (((x) & BIT_MASK_MACID63_32_DROP_8814B) << BIT_SHIFT_MACID63_32_DROP_8814B)
-#define BIT_GET_MACID63_32_DROP_8814B(x) (((x) >> BIT_SHIFT_MACID63_32_DROP_8814B) & BIT_MASK_MACID63_32_DROP_8814B)

+#define BIT_GET_MACID63_32_DROP_8814B(x) (((x) >> BIT_SHIFT_MACID63_32_DROP_8814B) & BIT_MASK_MACID63_32_DROP_8814B)
+
 
 
 /* 2 REG_MACID_DROP2_8814B */
@@ -6280,7 +6915,8 @@
 #define BIT_SHIFT_MACID95_64_DROP_8814B 0
 #define BIT_MASK_MACID95_64_DROP_8814B 0xffffffffL
 #define BIT_MACID95_64_DROP_8814B(x) (((x) & BIT_MASK_MACID95_64_DROP_8814B) << BIT_SHIFT_MACID95_64_DROP_8814B)
-#define BIT_GET_MACID95_64_DROP_8814B(x) (((x) >> BIT_SHIFT_MACID95_64_DROP_8814B) & BIT_MASK_MACID95_64_DROP_8814B)

+#define BIT_GET_MACID95_64_DROP_8814B(x) (((x) >> BIT_SHIFT_MACID95_64_DROP_8814B) & BIT_MASK_MACID95_64_DROP_8814B)
+
 
 
 /* 2 REG_MACID_DROP3_8814B */
@@ -6288,7 +6924,8 @@
 #define BIT_SHIFT_MACID127_96_DROP_8814B 0
 #define BIT_MASK_MACID127_96_DROP_8814B 0xffffffffL
 #define BIT_MACID127_96_DROP_8814B(x) (((x) & BIT_MASK_MACID127_96_DROP_8814B) << BIT_SHIFT_MACID127_96_DROP_8814B)
-#define BIT_GET_MACID127_96_DROP_8814B(x) (((x) >> BIT_SHIFT_MACID127_96_DROP_8814B) & BIT_MASK_MACID127_96_DROP_8814B)

+#define BIT_GET_MACID127_96_DROP_8814B(x) (((x) >> BIT_SHIFT_MACID127_96_DROP_8814B) & BIT_MASK_MACID127_96_DROP_8814B)
+
 
 
 /* 2 REG_R_MACID_RELEASE_SUCCESS_0_8814B */
@@ -6296,7 +6933,8 @@
 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8814B 0
 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8814B 0xffffffffL
 #define BIT_R_MACID_RELEASE_SUCCESS_0_8814B(x) (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8814B) << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8814B)
-#define BIT_GET_R_MACID_RELEASE_SUCCESS_0_8814B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8814B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8814B)

+#define BIT_GET_R_MACID_RELEASE_SUCCESS_0_8814B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8814B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8814B)
+
 
 
 /* 2 REG_R_MACID_RELEASE_SUCCESS_1_8814B */
@@ -6304,7 +6942,8 @@
 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8814B 0
 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8814B 0xffffffffL
 #define BIT_R_MACID_RELEASE_SUCCESS_1_8814B(x) (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8814B) << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8814B)
-#define BIT_GET_R_MACID_RELEASE_SUCCESS_1_8814B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8814B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8814B)

+#define BIT_GET_R_MACID_RELEASE_SUCCESS_1_8814B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8814B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8814B)
+
 
 
 /* 2 REG_R_MACID_RELEASE_SUCCESS_2_8814B */
@@ -6312,7 +6951,8 @@
 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8814B 0
 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8814B 0xffffffffL
 #define BIT_R_MACID_RELEASE_SUCCESS_2_8814B(x) (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8814B) << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8814B)
-#define BIT_GET_R_MACID_RELEASE_SUCCESS_2_8814B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8814B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8814B)

+#define BIT_GET_R_MACID_RELEASE_SUCCESS_2_8814B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8814B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8814B)
+
 
 
 /* 2 REG_R_MACID_RELEASE_SUCCESS_3_8814B */
@@ -6320,7 +6960,8 @@
 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8814B 0
 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8814B 0xffffffffL
 #define BIT_R_MACID_RELEASE_SUCCESS_3_8814B(x) (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8814B) << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8814B)
-#define BIT_GET_R_MACID_RELEASE_SUCCESS_3_8814B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8814B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8814B)

+#define BIT_GET_R_MACID_RELEASE_SUCCESS_3_8814B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8814B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8814B)
+
 
 
 /* 2 REG_MGG_FIFO_CRTL_8814B */
@@ -6329,26 +6970,30 @@
 #define BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8814B 28
 #define BIT_MASK_R_MGG_FIFO_PG_SIZE_8814B 0x7
 #define BIT_R_MGG_FIFO_PG_SIZE_8814B(x) (((x) & BIT_MASK_R_MGG_FIFO_PG_SIZE_8814B) << BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8814B)
-#define BIT_GET_R_MGG_FIFO_PG_SIZE_8814B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8814B) & BIT_MASK_R_MGG_FIFO_PG_SIZE_8814B)

+#define BIT_GET_R_MGG_FIFO_PG_SIZE_8814B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8814B) & BIT_MASK_R_MGG_FIFO_PG_SIZE_8814B)
+
 
 
 #define BIT_SHIFT_R_MGG_FIFO_START_PG_8814B 16
 #define BIT_MASK_R_MGG_FIFO_START_PG_8814B 0xfff
 #define BIT_R_MGG_FIFO_START_PG_8814B(x) (((x) & BIT_MASK_R_MGG_FIFO_START_PG_8814B) << BIT_SHIFT_R_MGG_FIFO_START_PG_8814B)
-#define BIT_GET_R_MGG_FIFO_START_PG_8814B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_START_PG_8814B) & BIT_MASK_R_MGG_FIFO_START_PG_8814B)

+#define BIT_GET_R_MGG_FIFO_START_PG_8814B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_START_PG_8814B) & BIT_MASK_R_MGG_FIFO_START_PG_8814B)
+
 
 
 #define BIT_SHIFT_R_MGG_FIFO_SIZE_8814B 14
 #define BIT_MASK_R_MGG_FIFO_SIZE_8814B 0x3
 #define BIT_R_MGG_FIFO_SIZE_8814B(x) (((x) & BIT_MASK_R_MGG_FIFO_SIZE_8814B) << BIT_SHIFT_R_MGG_FIFO_SIZE_8814B)
-#define BIT_GET_R_MGG_FIFO_SIZE_8814B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_SIZE_8814B) & BIT_MASK_R_MGG_FIFO_SIZE_8814B)

+#define BIT_GET_R_MGG_FIFO_SIZE_8814B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_SIZE_8814B) & BIT_MASK_R_MGG_FIFO_SIZE_8814B)
+
 
 #define BIT_R_MGG_FIFO_PAUSE_8814B BIT(13)
 
 #define BIT_SHIFT_R_MGG_FIFO_RPTR_8814B 8
 #define BIT_MASK_R_MGG_FIFO_RPTR_8814B 0x1f
 #define BIT_R_MGG_FIFO_RPTR_8814B(x) (((x) & BIT_MASK_R_MGG_FIFO_RPTR_8814B) << BIT_SHIFT_R_MGG_FIFO_RPTR_8814B)
-#define BIT_GET_R_MGG_FIFO_RPTR_8814B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_RPTR_8814B) & BIT_MASK_R_MGG_FIFO_RPTR_8814B)

+#define BIT_GET_R_MGG_FIFO_RPTR_8814B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_RPTR_8814B) & BIT_MASK_R_MGG_FIFO_RPTR_8814B)
+
 
 #define BIT_R_MGG_FIFO_OV_8814B BIT(7)
 #define BIT_R_MGG_FIFO_WPTR_ERROR_8814B BIT(6)
@@ -6357,7 +7002,8 @@
 #define BIT_SHIFT_R_MGG_FIFO_WPTR_8814B 0
 #define BIT_MASK_R_MGG_FIFO_WPTR_8814B 0x1f
 #define BIT_R_MGG_FIFO_WPTR_8814B(x) (((x) & BIT_MASK_R_MGG_FIFO_WPTR_8814B) << BIT_SHIFT_R_MGG_FIFO_WPTR_8814B)
-#define BIT_GET_R_MGG_FIFO_WPTR_8814B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_WPTR_8814B) & BIT_MASK_R_MGG_FIFO_WPTR_8814B)

+#define BIT_GET_R_MGG_FIFO_WPTR_8814B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_WPTR_8814B) & BIT_MASK_R_MGG_FIFO_WPTR_8814B)
+
 
 
 /* 2 REG_MGG_FIFO_INT_8814B */
@@ -6365,13 +7011,15 @@
 #define BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8814B 16
 #define BIT_MASK_R_MGG_FIFO_INT_FLAG_8814B 0xffff
 #define BIT_R_MGG_FIFO_INT_FLAG_8814B(x) (((x) & BIT_MASK_R_MGG_FIFO_INT_FLAG_8814B) << BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8814B)
-#define BIT_GET_R_MGG_FIFO_INT_FLAG_8814B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8814B) & BIT_MASK_R_MGG_FIFO_INT_FLAG_8814B)

+#define BIT_GET_R_MGG_FIFO_INT_FLAG_8814B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8814B) & BIT_MASK_R_MGG_FIFO_INT_FLAG_8814B)
+
 
 
 #define BIT_SHIFT_R_MGG_FIFO_INT_MASK_8814B 0
 #define BIT_MASK_R_MGG_FIFO_INT_MASK_8814B 0xffff
 #define BIT_R_MGG_FIFO_INT_MASK_8814B(x) (((x) & BIT_MASK_R_MGG_FIFO_INT_MASK_8814B) << BIT_SHIFT_R_MGG_FIFO_INT_MASK_8814B)
-#define BIT_GET_R_MGG_FIFO_INT_MASK_8814B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_INT_MASK_8814B) & BIT_MASK_R_MGG_FIFO_INT_MASK_8814B)

+#define BIT_GET_R_MGG_FIFO_INT_MASK_8814B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_INT_MASK_8814B) & BIT_MASK_R_MGG_FIFO_INT_MASK_8814B)
+
 
 
 /* 2 REG_MGG_FIFO_LIFETIME_8814B */
@@ -6379,13 +7027,15 @@
 #define BIT_SHIFT_R_MGG_FIFO_LIFETIME_8814B 16
 #define BIT_MASK_R_MGG_FIFO_LIFETIME_8814B 0xffff
 #define BIT_R_MGG_FIFO_LIFETIME_8814B(x) (((x) & BIT_MASK_R_MGG_FIFO_LIFETIME_8814B) << BIT_SHIFT_R_MGG_FIFO_LIFETIME_8814B)
-#define BIT_GET_R_MGG_FIFO_LIFETIME_8814B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_LIFETIME_8814B) & BIT_MASK_R_MGG_FIFO_LIFETIME_8814B)

+#define BIT_GET_R_MGG_FIFO_LIFETIME_8814B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_LIFETIME_8814B) & BIT_MASK_R_MGG_FIFO_LIFETIME_8814B)
+
 
 
 #define BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8814B 0
 #define BIT_MASK_R_MGG_FIFO_VALID_MAP_8814B 0xffff
 #define BIT_R_MGG_FIFO_VALID_MAP_8814B(x) (((x) & BIT_MASK_R_MGG_FIFO_VALID_MAP_8814B) << BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8814B)
-#define BIT_GET_R_MGG_FIFO_VALID_MAP_8814B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8814B) & BIT_MASK_R_MGG_FIFO_VALID_MAP_8814B)

+#define BIT_GET_R_MGG_FIFO_VALID_MAP_8814B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8814B) & BIT_MASK_R_MGG_FIFO_VALID_MAP_8814B)
+
 
 
 /* 2 REG_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8814B */
@@ -6393,7 +7043,8 @@
 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8814B 0
 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8814B 0x7f
 #define BIT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8814B(x) (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8814B) << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8814B)
-#define BIT_GET_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8814B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8814B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8814B)

+#define BIT_GET_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8814B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8814B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8814B)
+
 
 
 /* 2 REG_MU_TX_CTL_8814B (NOT SUPPORT) */
@@ -6402,7 +7053,8 @@
 #define BIT_SHIFT_R_MU_TAB_SEL_8814B 8
 #define BIT_MASK_R_MU_TAB_SEL_8814B 0x7
 #define BIT_R_MU_TAB_SEL_8814B(x) (((x) & BIT_MASK_R_MU_TAB_SEL_8814B) << BIT_SHIFT_R_MU_TAB_SEL_8814B)
-#define BIT_GET_R_MU_TAB_SEL_8814B(x) (((x) >> BIT_SHIFT_R_MU_TAB_SEL_8814B) & BIT_MASK_R_MU_TAB_SEL_8814B)

+#define BIT_GET_R_MU_TAB_SEL_8814B(x) (((x) >> BIT_SHIFT_R_MU_TAB_SEL_8814B) & BIT_MASK_R_MU_TAB_SEL_8814B)
+
 
 #define BIT_R_EN_MU_MIMO_8814B BIT(7)
 #define BIT_R_EN_REVERS_GTAB_8814B BIT(6)
@@ -6410,7 +7062,8 @@
 #define BIT_SHIFT_R_MU_TABLE_VALID_8814B 0
 #define BIT_MASK_R_MU_TABLE_VALID_8814B 0x3f
 #define BIT_R_MU_TABLE_VALID_8814B(x) (((x) & BIT_MASK_R_MU_TABLE_VALID_8814B) << BIT_SHIFT_R_MU_TABLE_VALID_8814B)
-#define BIT_GET_R_MU_TABLE_VALID_8814B(x) (((x) >> BIT_SHIFT_R_MU_TABLE_VALID_8814B) & BIT_MASK_R_MU_TABLE_VALID_8814B)

+#define BIT_GET_R_MU_TABLE_VALID_8814B(x) (((x) >> BIT_SHIFT_R_MU_TABLE_VALID_8814B) & BIT_MASK_R_MU_TABLE_VALID_8814B)
+
 
 
 /* 2 REG_MU_STA_GID_VLD_8814B	(NOT SUPPORT) */
@@ -6420,13 +7073,15 @@
 #define BIT_SHIFT_R_MU_STA_GTAB_VALID_8814B 0
 #define BIT_MASK_R_MU_STA_GTAB_VALID_8814B 0xffffffffL
 #define BIT_R_MU_STA_GTAB_VALID_8814B(x) (((x) & BIT_MASK_R_MU_STA_GTAB_VALID_8814B) << BIT_SHIFT_R_MU_STA_GTAB_VALID_8814B)
-#define BIT_GET_R_MU_STA_GTAB_VALID_8814B(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_VALID_8814B) & BIT_MASK_R_MU_STA_GTAB_VALID_8814B)

+#define BIT_GET_R_MU_STA_GTAB_VALID_8814B(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_VALID_8814B) & BIT_MASK_R_MU_STA_GTAB_VALID_8814B)
+
 
 
 #define BIT_SHIFT_R_MU_STA_GTAB_VALID_8814B 0
 #define BIT_MASK_R_MU_STA_GTAB_VALID_8814B 0xffffffffL
 #define BIT_R_MU_STA_GTAB_VALID_8814B(x) (((x) & BIT_MASK_R_MU_STA_GTAB_VALID_8814B) << BIT_SHIFT_R_MU_STA_GTAB_VALID_8814B)
-#define BIT_GET_R_MU_STA_GTAB_VALID_8814B(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_VALID_8814B) & BIT_MASK_R_MU_STA_GTAB_VALID_8814B)

+#define BIT_GET_R_MU_STA_GTAB_VALID_8814B(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_VALID_8814B) & BIT_MASK_R_MU_STA_GTAB_VALID_8814B)
+
 
 
 /* 2 REG_MU_STA_USER_POS_INFO_8814B	(NOT SUPPORT) */
@@ -6436,13 +7091,15 @@
 #define BIT_SHIFT_R_MU_STA_GTAB_POSITION_8814B 0
 #define BIT_MASK_R_MU_STA_GTAB_POSITION_8814B 0xffffffffffffffffL
 #define BIT_R_MU_STA_GTAB_POSITION_8814B(x) (((x) & BIT_MASK_R_MU_STA_GTAB_POSITION_8814B) << BIT_SHIFT_R_MU_STA_GTAB_POSITION_8814B)
-#define BIT_GET_R_MU_STA_GTAB_POSITION_8814B(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_8814B) & BIT_MASK_R_MU_STA_GTAB_POSITION_8814B)

+#define BIT_GET_R_MU_STA_GTAB_POSITION_8814B(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_8814B) & BIT_MASK_R_MU_STA_GTAB_POSITION_8814B)
+
 
 
 #define BIT_SHIFT_R_MU_STA_GTAB_POSITION_8814B 0
 #define BIT_MASK_R_MU_STA_GTAB_POSITION_8814B 0xffffffffffffffffL
 #define BIT_R_MU_STA_GTAB_POSITION_8814B(x) (((x) & BIT_MASK_R_MU_STA_GTAB_POSITION_8814B) << BIT_SHIFT_R_MU_STA_GTAB_POSITION_8814B)
-#define BIT_GET_R_MU_STA_GTAB_POSITION_8814B(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_8814B) & BIT_MASK_R_MU_STA_GTAB_POSITION_8814B)

+#define BIT_GET_R_MU_STA_GTAB_POSITION_8814B(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_8814B) & BIT_MASK_R_MU_STA_GTAB_POSITION_8814B)
+
 
 
 /* 2 REG_MU_TRX_DBG_CNT_8814B	(NOT SUPPORT) */
@@ -6451,13 +7108,15 @@
 #define BIT_SHIFT_MU_DBGCNT_SEL_8814B 16
 #define BIT_MASK_MU_DBGCNT_SEL_8814B 0xf
 #define BIT_MU_DBGCNT_SEL_8814B(x) (((x) & BIT_MASK_MU_DBGCNT_SEL_8814B) << BIT_SHIFT_MU_DBGCNT_SEL_8814B)
-#define BIT_GET_MU_DBGCNT_SEL_8814B(x) (((x) >> BIT_SHIFT_MU_DBGCNT_SEL_8814B) & BIT_MASK_MU_DBGCNT_SEL_8814B)

+#define BIT_GET_MU_DBGCNT_SEL_8814B(x) (((x) >> BIT_SHIFT_MU_DBGCNT_SEL_8814B) & BIT_MASK_MU_DBGCNT_SEL_8814B)
+
 
 
 #define BIT_SHIFT_MU_DNGCNT_8814B 0
 #define BIT_MASK_MU_DNGCNT_8814B 0xffff
 #define BIT_MU_DNGCNT_8814B(x) (((x) & BIT_MASK_MU_DNGCNT_8814B) << BIT_SHIFT_MU_DNGCNT_8814B)
-#define BIT_GET_MU_DNGCNT_8814B(x) (((x) >> BIT_SHIFT_MU_DNGCNT_8814B) & BIT_MASK_MU_DNGCNT_8814B)

+#define BIT_GET_MU_DNGCNT_8814B(x) (((x) >> BIT_SHIFT_MU_DNGCNT_8814B) & BIT_MASK_MU_DNGCNT_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -6467,19 +7126,22 @@
 #define BIT_SHIFT_TXOPLIMIT_8814B 16
 #define BIT_MASK_TXOPLIMIT_8814B 0x7ff
 #define BIT_TXOPLIMIT_8814B(x) (((x) & BIT_MASK_TXOPLIMIT_8814B) << BIT_SHIFT_TXOPLIMIT_8814B)
-#define BIT_GET_TXOPLIMIT_8814B(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8814B) & BIT_MASK_TXOPLIMIT_8814B)

+#define BIT_GET_TXOPLIMIT_8814B(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8814B) & BIT_MASK_TXOPLIMIT_8814B)
+
 
 
 #define BIT_SHIFT_CW_8814B 8
 #define BIT_MASK_CW_8814B 0xff
 #define BIT_CW_8814B(x) (((x) & BIT_MASK_CW_8814B) << BIT_SHIFT_CW_8814B)
-#define BIT_GET_CW_8814B(x) (((x) >> BIT_SHIFT_CW_8814B) & BIT_MASK_CW_8814B)

+#define BIT_GET_CW_8814B(x) (((x) >> BIT_SHIFT_CW_8814B) & BIT_MASK_CW_8814B)
+
 
 
 #define BIT_SHIFT_AIFS_8814B 0
 #define BIT_MASK_AIFS_8814B 0xff
 #define BIT_AIFS_8814B(x) (((x) & BIT_MASK_AIFS_8814B) << BIT_SHIFT_AIFS_8814B)
-#define BIT_GET_AIFS_8814B(x) (((x) >> BIT_SHIFT_AIFS_8814B) & BIT_MASK_AIFS_8814B)

+#define BIT_GET_AIFS_8814B(x) (((x) >> BIT_SHIFT_AIFS_8814B) & BIT_MASK_AIFS_8814B)
+
 
 
 /* 2 REG_EDCA_VI_PARAM_8814B */
@@ -6489,19 +7151,22 @@
 #define BIT_SHIFT_TXOPLIMIT_8814B 16
 #define BIT_MASK_TXOPLIMIT_8814B 0x7ff
 #define BIT_TXOPLIMIT_8814B(x) (((x) & BIT_MASK_TXOPLIMIT_8814B) << BIT_SHIFT_TXOPLIMIT_8814B)
-#define BIT_GET_TXOPLIMIT_8814B(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8814B) & BIT_MASK_TXOPLIMIT_8814B)

+#define BIT_GET_TXOPLIMIT_8814B(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8814B) & BIT_MASK_TXOPLIMIT_8814B)
+
 
 
 #define BIT_SHIFT_CW_8814B 8
 #define BIT_MASK_CW_8814B 0xff
 #define BIT_CW_8814B(x) (((x) & BIT_MASK_CW_8814B) << BIT_SHIFT_CW_8814B)
-#define BIT_GET_CW_8814B(x) (((x) >> BIT_SHIFT_CW_8814B) & BIT_MASK_CW_8814B)

+#define BIT_GET_CW_8814B(x) (((x) >> BIT_SHIFT_CW_8814B) & BIT_MASK_CW_8814B)
+
 
 
 #define BIT_SHIFT_AIFS_8814B 0
 #define BIT_MASK_AIFS_8814B 0xff
 #define BIT_AIFS_8814B(x) (((x) & BIT_MASK_AIFS_8814B) << BIT_SHIFT_AIFS_8814B)
-#define BIT_GET_AIFS_8814B(x) (((x) >> BIT_SHIFT_AIFS_8814B) & BIT_MASK_AIFS_8814B)

+#define BIT_GET_AIFS_8814B(x) (((x) >> BIT_SHIFT_AIFS_8814B) & BIT_MASK_AIFS_8814B)
+
 
 
 /* 2 REG_EDCA_BE_PARAM_8814B */
@@ -6511,19 +7176,22 @@
 #define BIT_SHIFT_TXOPLIMIT_8814B 16
 #define BIT_MASK_TXOPLIMIT_8814B 0x7ff
 #define BIT_TXOPLIMIT_8814B(x) (((x) & BIT_MASK_TXOPLIMIT_8814B) << BIT_SHIFT_TXOPLIMIT_8814B)
-#define BIT_GET_TXOPLIMIT_8814B(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8814B) & BIT_MASK_TXOPLIMIT_8814B)

+#define BIT_GET_TXOPLIMIT_8814B(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8814B) & BIT_MASK_TXOPLIMIT_8814B)
+
 
 
 #define BIT_SHIFT_CW_8814B 8
 #define BIT_MASK_CW_8814B 0xff
 #define BIT_CW_8814B(x) (((x) & BIT_MASK_CW_8814B) << BIT_SHIFT_CW_8814B)
-#define BIT_GET_CW_8814B(x) (((x) >> BIT_SHIFT_CW_8814B) & BIT_MASK_CW_8814B)

+#define BIT_GET_CW_8814B(x) (((x) >> BIT_SHIFT_CW_8814B) & BIT_MASK_CW_8814B)
+
 
 
 #define BIT_SHIFT_AIFS_8814B 0
 #define BIT_MASK_AIFS_8814B 0xff
 #define BIT_AIFS_8814B(x) (((x) & BIT_MASK_AIFS_8814B) << BIT_SHIFT_AIFS_8814B)
-#define BIT_GET_AIFS_8814B(x) (((x) >> BIT_SHIFT_AIFS_8814B) & BIT_MASK_AIFS_8814B)

+#define BIT_GET_AIFS_8814B(x) (((x) >> BIT_SHIFT_AIFS_8814B) & BIT_MASK_AIFS_8814B)
+
 
 
 /* 2 REG_EDCA_BK_PARAM_8814B */
@@ -6533,19 +7201,22 @@
 #define BIT_SHIFT_TXOPLIMIT_8814B 16
 #define BIT_MASK_TXOPLIMIT_8814B 0x7ff
 #define BIT_TXOPLIMIT_8814B(x) (((x) & BIT_MASK_TXOPLIMIT_8814B) << BIT_SHIFT_TXOPLIMIT_8814B)
-#define BIT_GET_TXOPLIMIT_8814B(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8814B) & BIT_MASK_TXOPLIMIT_8814B)

+#define BIT_GET_TXOPLIMIT_8814B(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8814B) & BIT_MASK_TXOPLIMIT_8814B)
+
 
 
 #define BIT_SHIFT_CW_8814B 8
 #define BIT_MASK_CW_8814B 0xff
 #define BIT_CW_8814B(x) (((x) & BIT_MASK_CW_8814B) << BIT_SHIFT_CW_8814B)
-#define BIT_GET_CW_8814B(x) (((x) >> BIT_SHIFT_CW_8814B) & BIT_MASK_CW_8814B)

+#define BIT_GET_CW_8814B(x) (((x) >> BIT_SHIFT_CW_8814B) & BIT_MASK_CW_8814B)
+
 
 
 #define BIT_SHIFT_AIFS_8814B 0
 #define BIT_MASK_AIFS_8814B 0xff
 #define BIT_AIFS_8814B(x) (((x) & BIT_MASK_AIFS_8814B) << BIT_SHIFT_AIFS_8814B)
-#define BIT_GET_AIFS_8814B(x) (((x) >> BIT_SHIFT_AIFS_8814B) & BIT_MASK_AIFS_8814B)

+#define BIT_GET_AIFS_8814B(x) (((x) >> BIT_SHIFT_AIFS_8814B) & BIT_MASK_AIFS_8814B)
+
 
 
 /* 2 REG_BCNTCFG_8814B */
@@ -6553,19 +7224,22 @@
 #define BIT_SHIFT_BCNCW_MAX_8814B 12
 #define BIT_MASK_BCNCW_MAX_8814B 0xf
 #define BIT_BCNCW_MAX_8814B(x) (((x) & BIT_MASK_BCNCW_MAX_8814B) << BIT_SHIFT_BCNCW_MAX_8814B)
-#define BIT_GET_BCNCW_MAX_8814B(x) (((x) >> BIT_SHIFT_BCNCW_MAX_8814B) & BIT_MASK_BCNCW_MAX_8814B)

+#define BIT_GET_BCNCW_MAX_8814B(x) (((x) >> BIT_SHIFT_BCNCW_MAX_8814B) & BIT_MASK_BCNCW_MAX_8814B)
+
 
 
 #define BIT_SHIFT_BCNCW_MIN_8814B 8
 #define BIT_MASK_BCNCW_MIN_8814B 0xf
 #define BIT_BCNCW_MIN_8814B(x) (((x) & BIT_MASK_BCNCW_MIN_8814B) << BIT_SHIFT_BCNCW_MIN_8814B)
-#define BIT_GET_BCNCW_MIN_8814B(x) (((x) >> BIT_SHIFT_BCNCW_MIN_8814B) & BIT_MASK_BCNCW_MIN_8814B)

+#define BIT_GET_BCNCW_MIN_8814B(x) (((x) >> BIT_SHIFT_BCNCW_MIN_8814B) & BIT_MASK_BCNCW_MIN_8814B)
+
 
 
 #define BIT_SHIFT_BCNIFS_8814B 0
 #define BIT_MASK_BCNIFS_8814B 0xff
 #define BIT_BCNIFS_8814B(x) (((x) & BIT_MASK_BCNIFS_8814B) << BIT_SHIFT_BCNIFS_8814B)
-#define BIT_GET_BCNIFS_8814B(x) (((x) >> BIT_SHIFT_BCNIFS_8814B) & BIT_MASK_BCNIFS_8814B)

+#define BIT_GET_BCNIFS_8814B(x) (((x) >> BIT_SHIFT_BCNIFS_8814B) & BIT_MASK_BCNIFS_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -6575,7 +7249,8 @@
 #define BIT_SHIFT_PIFS_8814B 0
 #define BIT_MASK_PIFS_8814B 0xff
 #define BIT_PIFS_8814B(x) (((x) & BIT_MASK_PIFS_8814B) << BIT_SHIFT_PIFS_8814B)
-#define BIT_GET_PIFS_8814B(x) (((x) >> BIT_SHIFT_PIFS_8814B) & BIT_MASK_PIFS_8814B)

+#define BIT_GET_PIFS_8814B(x) (((x) >> BIT_SHIFT_PIFS_8814B) & BIT_MASK_PIFS_8814B)
+
 
 
 /* 2 REG_RDG_PIFS_8814B */
@@ -6583,7 +7258,8 @@
 #define BIT_SHIFT_RDG_PIFS_8814B 0
 #define BIT_MASK_RDG_PIFS_8814B 0xff
 #define BIT_RDG_PIFS_8814B(x) (((x) & BIT_MASK_RDG_PIFS_8814B) << BIT_SHIFT_RDG_PIFS_8814B)
-#define BIT_GET_RDG_PIFS_8814B(x) (((x) >> BIT_SHIFT_RDG_PIFS_8814B) & BIT_MASK_RDG_PIFS_8814B)

+#define BIT_GET_RDG_PIFS_8814B(x) (((x) >> BIT_SHIFT_RDG_PIFS_8814B) & BIT_MASK_RDG_PIFS_8814B)
+
 
 
 /* 2 REG_SIFS_8814B */
@@ -6591,25 +7267,29 @@
 #define BIT_SHIFT_SIFS_OFDM_TRX_8814B 24
 #define BIT_MASK_SIFS_OFDM_TRX_8814B 0xff
 #define BIT_SIFS_OFDM_TRX_8814B(x) (((x) & BIT_MASK_SIFS_OFDM_TRX_8814B) << BIT_SHIFT_SIFS_OFDM_TRX_8814B)
-#define BIT_GET_SIFS_OFDM_TRX_8814B(x) (((x) >> BIT_SHIFT_SIFS_OFDM_TRX_8814B) & BIT_MASK_SIFS_OFDM_TRX_8814B)

+#define BIT_GET_SIFS_OFDM_TRX_8814B(x) (((x) >> BIT_SHIFT_SIFS_OFDM_TRX_8814B) & BIT_MASK_SIFS_OFDM_TRX_8814B)
+
 
 
 #define BIT_SHIFT_SIFS_CCK_TRX_8814B 16
 #define BIT_MASK_SIFS_CCK_TRX_8814B 0xff
 #define BIT_SIFS_CCK_TRX_8814B(x) (((x) & BIT_MASK_SIFS_CCK_TRX_8814B) << BIT_SHIFT_SIFS_CCK_TRX_8814B)
-#define BIT_GET_SIFS_CCK_TRX_8814B(x) (((x) >> BIT_SHIFT_SIFS_CCK_TRX_8814B) & BIT_MASK_SIFS_CCK_TRX_8814B)

+#define BIT_GET_SIFS_CCK_TRX_8814B(x) (((x) >> BIT_SHIFT_SIFS_CCK_TRX_8814B) & BIT_MASK_SIFS_CCK_TRX_8814B)
+
 
 
 #define BIT_SHIFT_SIFS_OFDM_CTX_8814B 8
 #define BIT_MASK_SIFS_OFDM_CTX_8814B 0xff
 #define BIT_SIFS_OFDM_CTX_8814B(x) (((x) & BIT_MASK_SIFS_OFDM_CTX_8814B) << BIT_SHIFT_SIFS_OFDM_CTX_8814B)
-#define BIT_GET_SIFS_OFDM_CTX_8814B(x) (((x) >> BIT_SHIFT_SIFS_OFDM_CTX_8814B) & BIT_MASK_SIFS_OFDM_CTX_8814B)

+#define BIT_GET_SIFS_OFDM_CTX_8814B(x) (((x) >> BIT_SHIFT_SIFS_OFDM_CTX_8814B) & BIT_MASK_SIFS_OFDM_CTX_8814B)
+
 
 
 #define BIT_SHIFT_SIFS_CCK_CTX_8814B 0
 #define BIT_MASK_SIFS_CCK_CTX_8814B 0xff
 #define BIT_SIFS_CCK_CTX_8814B(x) (((x) & BIT_MASK_SIFS_CCK_CTX_8814B) << BIT_SHIFT_SIFS_CCK_CTX_8814B)
-#define BIT_GET_SIFS_CCK_CTX_8814B(x) (((x) >> BIT_SHIFT_SIFS_CCK_CTX_8814B) & BIT_MASK_SIFS_CCK_CTX_8814B)

+#define BIT_GET_SIFS_CCK_CTX_8814B(x) (((x) >> BIT_SHIFT_SIFS_CCK_CTX_8814B) & BIT_MASK_SIFS_CCK_CTX_8814B)
+
 
 
 /* 2 REG_TSFTR_SYN_OFFSET_8814B */
@@ -6617,7 +7297,8 @@
 #define BIT_SHIFT_TSFTR_SNC_OFFSET_8814B 0
 #define BIT_MASK_TSFTR_SNC_OFFSET_8814B 0xffff
 #define BIT_TSFTR_SNC_OFFSET_8814B(x) (((x) & BIT_MASK_TSFTR_SNC_OFFSET_8814B) << BIT_SHIFT_TSFTR_SNC_OFFSET_8814B)
-#define BIT_GET_TSFTR_SNC_OFFSET_8814B(x) (((x) >> BIT_SHIFT_TSFTR_SNC_OFFSET_8814B) & BIT_MASK_TSFTR_SNC_OFFSET_8814B)

+#define BIT_GET_TSFTR_SNC_OFFSET_8814B(x) (((x) >> BIT_SHIFT_TSFTR_SNC_OFFSET_8814B) & BIT_MASK_TSFTR_SNC_OFFSET_8814B)
+
 
 
 /* 2 REG_AGGR_BREAK_TIME_8814B */
@@ -6625,7 +7306,8 @@
 #define BIT_SHIFT_AGGR_BK_TIME_8814B 0
 #define BIT_MASK_AGGR_BK_TIME_8814B 0xff
 #define BIT_AGGR_BK_TIME_8814B(x) (((x) & BIT_MASK_AGGR_BK_TIME_8814B) << BIT_SHIFT_AGGR_BK_TIME_8814B)
-#define BIT_GET_AGGR_BK_TIME_8814B(x) (((x) >> BIT_SHIFT_AGGR_BK_TIME_8814B) & BIT_MASK_AGGR_BK_TIME_8814B)

+#define BIT_GET_AGGR_BK_TIME_8814B(x) (((x) >> BIT_SHIFT_AGGR_BK_TIME_8814B) & BIT_MASK_AGGR_BK_TIME_8814B)
+
 
 
 /* 2 REG_SLOT_8814B */
@@ -6633,7 +7315,8 @@
 #define BIT_SHIFT_SLOT_8814B 0
 #define BIT_MASK_SLOT_8814B 0xff
 #define BIT_SLOT_8814B(x) (((x) & BIT_MASK_SLOT_8814B) << BIT_SHIFT_SLOT_8814B)
-#define BIT_GET_SLOT_8814B(x) (((x) >> BIT_SHIFT_SLOT_8814B) & BIT_MASK_SLOT_8814B)

+#define BIT_GET_SLOT_8814B(x) (((x) >> BIT_SHIFT_SLOT_8814B) & BIT_MASK_SLOT_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -6647,7 +7330,8 @@
 #define BIT_SHIFT_TXQ_NAV_MSK_8814B 8
 #define BIT_MASK_TXQ_NAV_MSK_8814B 0xf
 #define BIT_TXQ_NAV_MSK_8814B(x) (((x) & BIT_MASK_TXQ_NAV_MSK_8814B) << BIT_SHIFT_TXQ_NAV_MSK_8814B)
-#define BIT_GET_TXQ_NAV_MSK_8814B(x) (((x) >> BIT_SHIFT_TXQ_NAV_MSK_8814B) & BIT_MASK_TXQ_NAV_MSK_8814B)

+#define BIT_GET_TXQ_NAV_MSK_8814B(x) (((x) >> BIT_SHIFT_TXQ_NAV_MSK_8814B) & BIT_MASK_TXQ_NAV_MSK_8814B)
+
 
 #define BIT_DIS_CW_8814B BIT(7)
 #define BIT_NAV_END_TXOP_8814B BIT(6)
@@ -6724,13 +7408,15 @@
 #define BIT_SHIFT_CCA_FILTER_THRS_8814B 8
 #define BIT_MASK_CCA_FILTER_THRS_8814B 0xff
 #define BIT_CCA_FILTER_THRS_8814B(x) (((x) & BIT_MASK_CCA_FILTER_THRS_8814B) << BIT_SHIFT_CCA_FILTER_THRS_8814B)
-#define BIT_GET_CCA_FILTER_THRS_8814B(x) (((x) >> BIT_SHIFT_CCA_FILTER_THRS_8814B) & BIT_MASK_CCA_FILTER_THRS_8814B)

+#define BIT_GET_CCA_FILTER_THRS_8814B(x) (((x) >> BIT_SHIFT_CCA_FILTER_THRS_8814B) & BIT_MASK_CCA_FILTER_THRS_8814B)
+
 
 
 #define BIT_SHIFT_EDCCA_THRS_8814B 0
 #define BIT_MASK_EDCCA_THRS_8814B 0xff
 #define BIT_EDCCA_THRS_8814B(x) (((x) & BIT_MASK_EDCCA_THRS_8814B) << BIT_SHIFT_EDCCA_THRS_8814B)
-#define BIT_GET_EDCCA_THRS_8814B(x) (((x) >> BIT_SHIFT_EDCCA_THRS_8814B) & BIT_MASK_EDCCA_THRS_8814B)

+#define BIT_GET_EDCCA_THRS_8814B(x) (((x) >> BIT_SHIFT_EDCCA_THRS_8814B) & BIT_MASK_EDCCA_THRS_8814B)
+
 
 
 /* 2 REG_P2PPS_SPEC_STATE_8814B */
@@ -6752,7 +7438,8 @@
 #define BIT_SHIFT_P2PON_DIS_TXTIME_8814B 0
 #define BIT_MASK_P2PON_DIS_TXTIME_8814B 0xff
 #define BIT_P2PON_DIS_TXTIME_8814B(x) (((x) & BIT_MASK_P2PON_DIS_TXTIME_8814B) << BIT_SHIFT_P2PON_DIS_TXTIME_8814B)
-#define BIT_GET_P2PON_DIS_TXTIME_8814B(x) (((x) >> BIT_SHIFT_P2PON_DIS_TXTIME_8814B) & BIT_MASK_P2PON_DIS_TXTIME_8814B)

+#define BIT_GET_P2PON_DIS_TXTIME_8814B(x) (((x) >> BIT_SHIFT_P2PON_DIS_TXTIME_8814B) & BIT_MASK_P2PON_DIS_TXTIME_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -6770,13 +7457,15 @@
 #define BIT_SHIFT_TBTT_HOLD_TIME_AP_8814B 8
 #define BIT_MASK_TBTT_HOLD_TIME_AP_8814B 0xfff
 #define BIT_TBTT_HOLD_TIME_AP_8814B(x) (((x) & BIT_MASK_TBTT_HOLD_TIME_AP_8814B) << BIT_SHIFT_TBTT_HOLD_TIME_AP_8814B)
-#define BIT_GET_TBTT_HOLD_TIME_AP_8814B(x) (((x) >> BIT_SHIFT_TBTT_HOLD_TIME_AP_8814B) & BIT_MASK_TBTT_HOLD_TIME_AP_8814B)

+#define BIT_GET_TBTT_HOLD_TIME_AP_8814B(x) (((x) >> BIT_SHIFT_TBTT_HOLD_TIME_AP_8814B) & BIT_MASK_TBTT_HOLD_TIME_AP_8814B)
+
 
 
 #define BIT_SHIFT_TBTT_PROHIBIT_SETUP_8814B 0
 #define BIT_MASK_TBTT_PROHIBIT_SETUP_8814B 0xf
 #define BIT_TBTT_PROHIBIT_SETUP_8814B(x) (((x) & BIT_MASK_TBTT_PROHIBIT_SETUP_8814B) << BIT_SHIFT_TBTT_PROHIBIT_SETUP_8814B)
-#define BIT_GET_TBTT_PROHIBIT_SETUP_8814B(x) (((x) >> BIT_SHIFT_TBTT_PROHIBIT_SETUP_8814B) & BIT_MASK_TBTT_PROHIBIT_SETUP_8814B)

+#define BIT_GET_TBTT_PROHIBIT_SETUP_8814B(x) (((x) >> BIT_SHIFT_TBTT_PROHIBIT_SETUP_8814B) & BIT_MASK_TBTT_PROHIBIT_SETUP_8814B)
+
 
 
 /* 2 REG_P2PPS_STATE_8814B */
@@ -6794,7 +7483,8 @@
 #define BIT_SHIFT_RD_NAV_PROT_NXT_8814B 0
 #define BIT_MASK_RD_NAV_PROT_NXT_8814B 0xffff
 #define BIT_RD_NAV_PROT_NXT_8814B(x) (((x) & BIT_MASK_RD_NAV_PROT_NXT_8814B) << BIT_SHIFT_RD_NAV_PROT_NXT_8814B)
-#define BIT_GET_RD_NAV_PROT_NXT_8814B(x) (((x) >> BIT_SHIFT_RD_NAV_PROT_NXT_8814B) & BIT_MASK_RD_NAV_PROT_NXT_8814B)

+#define BIT_GET_RD_NAV_PROT_NXT_8814B(x) (((x) >> BIT_SHIFT_RD_NAV_PROT_NXT_8814B) & BIT_MASK_RD_NAV_PROT_NXT_8814B)
+
 
 
 /* 2 REG_NAV_PROT_LEN_8814B */
@@ -6802,7 +7492,8 @@
 #define BIT_SHIFT_NAV_PROT_LEN_8814B 0
 #define BIT_MASK_NAV_PROT_LEN_8814B 0xffff
 #define BIT_NAV_PROT_LEN_8814B(x) (((x) & BIT_MASK_NAV_PROT_LEN_8814B) << BIT_SHIFT_NAV_PROT_LEN_8814B)
-#define BIT_GET_NAV_PROT_LEN_8814B(x) (((x) >> BIT_SHIFT_NAV_PROT_LEN_8814B) & BIT_MASK_NAV_PROT_LEN_8814B)

+#define BIT_GET_NAV_PROT_LEN_8814B(x) (((x) >> BIT_SHIFT_NAV_PROT_LEN_8814B) & BIT_MASK_NAV_PROT_LEN_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -6832,7 +7523,8 @@
 #define BIT_SHIFT_MBID_BCN_NUM_8814B 0
 #define BIT_MASK_MBID_BCN_NUM_8814B 0x7
 #define BIT_MBID_BCN_NUM_8814B(x) (((x) & BIT_MASK_MBID_BCN_NUM_8814B) << BIT_SHIFT_MBID_BCN_NUM_8814B)
-#define BIT_GET_MBID_BCN_NUM_8814B(x) (((x) >> BIT_SHIFT_MBID_BCN_NUM_8814B) & BIT_MASK_MBID_BCN_NUM_8814B)

+#define BIT_GET_MBID_BCN_NUM_8814B(x) (((x) >> BIT_SHIFT_MBID_BCN_NUM_8814B) & BIT_MASK_MBID_BCN_NUM_8814B)
+
 
 
 /* 2 REG_DUAL_TSF_RST_8814B */
@@ -6848,19 +7540,22 @@
 #define BIT_SHIFT_BCN_TIMER_SEL_FWRD_8814B 28
 #define BIT_MASK_BCN_TIMER_SEL_FWRD_8814B 0x7
 #define BIT_BCN_TIMER_SEL_FWRD_8814B(x) (((x) & BIT_MASK_BCN_TIMER_SEL_FWRD_8814B) << BIT_SHIFT_BCN_TIMER_SEL_FWRD_8814B)
-#define BIT_GET_BCN_TIMER_SEL_FWRD_8814B(x) (((x) >> BIT_SHIFT_BCN_TIMER_SEL_FWRD_8814B) & BIT_MASK_BCN_TIMER_SEL_FWRD_8814B)

+#define BIT_GET_BCN_TIMER_SEL_FWRD_8814B(x) (((x) >> BIT_SHIFT_BCN_TIMER_SEL_FWRD_8814B) & BIT_MASK_BCN_TIMER_SEL_FWRD_8814B)
+
 
 
 #define BIT_SHIFT_BCN_SPACE_CLINT0_8814B 16
 #define BIT_MASK_BCN_SPACE_CLINT0_8814B 0xfff
 #define BIT_BCN_SPACE_CLINT0_8814B(x) (((x) & BIT_MASK_BCN_SPACE_CLINT0_8814B) << BIT_SHIFT_BCN_SPACE_CLINT0_8814B)
-#define BIT_GET_BCN_SPACE_CLINT0_8814B(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT0_8814B) & BIT_MASK_BCN_SPACE_CLINT0_8814B)

+#define BIT_GET_BCN_SPACE_CLINT0_8814B(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT0_8814B) & BIT_MASK_BCN_SPACE_CLINT0_8814B)
+
 
 
 #define BIT_SHIFT_BCN_SPACE0_8814B 0
 #define BIT_MASK_BCN_SPACE0_8814B 0xffff
 #define BIT_BCN_SPACE0_8814B(x) (((x) & BIT_MASK_BCN_SPACE0_8814B) << BIT_SHIFT_BCN_SPACE0_8814B)
-#define BIT_GET_BCN_SPACE0_8814B(x) (((x) >> BIT_SHIFT_BCN_SPACE0_8814B) & BIT_MASK_BCN_SPACE0_8814B)

+#define BIT_GET_BCN_SPACE0_8814B(x) (((x) >> BIT_SHIFT_BCN_SPACE0_8814B) & BIT_MASK_BCN_SPACE0_8814B)
+
 
 
 /* 2 REG_DRVERLYINT_8814B */
@@ -6868,7 +7563,8 @@
 #define BIT_SHIFT_DRVERLYITV_8814B 0
 #define BIT_MASK_DRVERLYITV_8814B 0xff
 #define BIT_DRVERLYITV_8814B(x) (((x) & BIT_MASK_DRVERLYITV_8814B) << BIT_SHIFT_DRVERLYITV_8814B)
-#define BIT_GET_DRVERLYITV_8814B(x) (((x) >> BIT_SHIFT_DRVERLYITV_8814B) & BIT_MASK_DRVERLYITV_8814B)

+#define BIT_GET_DRVERLYITV_8814B(x) (((x) >> BIT_SHIFT_DRVERLYITV_8814B) & BIT_MASK_DRVERLYITV_8814B)
+
 
 
 /* 2 REG_BCNDMATIM_8814B */
@@ -6876,7 +7572,8 @@
 #define BIT_SHIFT_BCNDMATIM_8814B 0
 #define BIT_MASK_BCNDMATIM_8814B 0xff
 #define BIT_BCNDMATIM_8814B(x) (((x) & BIT_MASK_BCNDMATIM_8814B) << BIT_SHIFT_BCNDMATIM_8814B)
-#define BIT_GET_BCNDMATIM_8814B(x) (((x) >> BIT_SHIFT_BCNDMATIM_8814B) & BIT_MASK_BCNDMATIM_8814B)

+#define BIT_GET_BCNDMATIM_8814B(x) (((x) >> BIT_SHIFT_BCNDMATIM_8814B) & BIT_MASK_BCNDMATIM_8814B)
+
 
 
 /* 2 REG_ATIMWND_8814B */
@@ -6884,7 +7581,8 @@
 #define BIT_SHIFT_ATIMWND0_8814B 0
 #define BIT_MASK_ATIMWND0_8814B 0xffff
 #define BIT_ATIMWND0_8814B(x) (((x) & BIT_MASK_ATIMWND0_8814B) << BIT_SHIFT_ATIMWND0_8814B)
-#define BIT_GET_ATIMWND0_8814B(x) (((x) >> BIT_SHIFT_ATIMWND0_8814B) & BIT_MASK_ATIMWND0_8814B)

+#define BIT_GET_ATIMWND0_8814B(x) (((x) >> BIT_SHIFT_ATIMWND0_8814B) & BIT_MASK_ATIMWND0_8814B)
+
 
 
 /* 2 REG_USTIME_TSF_8814B */
@@ -6892,7 +7590,8 @@
 #define BIT_SHIFT_USTIME_TSF_V1_8814B 0
 #define BIT_MASK_USTIME_TSF_V1_8814B 0xff
 #define BIT_USTIME_TSF_V1_8814B(x) (((x) & BIT_MASK_USTIME_TSF_V1_8814B) << BIT_SHIFT_USTIME_TSF_V1_8814B)
-#define BIT_GET_USTIME_TSF_V1_8814B(x) (((x) >> BIT_SHIFT_USTIME_TSF_V1_8814B) & BIT_MASK_USTIME_TSF_V1_8814B)

+#define BIT_GET_USTIME_TSF_V1_8814B(x) (((x) >> BIT_SHIFT_USTIME_TSF_V1_8814B) & BIT_MASK_USTIME_TSF_V1_8814B)
+
 
 
 /* 2 REG_BCN_MAX_ERR_8814B */
@@ -6900,7 +7599,8 @@
 #define BIT_SHIFT_BCN_MAX_ERR_8814B 0
 #define BIT_MASK_BCN_MAX_ERR_8814B 0xff
 #define BIT_BCN_MAX_ERR_8814B(x) (((x) & BIT_MASK_BCN_MAX_ERR_8814B) << BIT_SHIFT_BCN_MAX_ERR_8814B)
-#define BIT_GET_BCN_MAX_ERR_8814B(x) (((x) >> BIT_SHIFT_BCN_MAX_ERR_8814B) & BIT_MASK_BCN_MAX_ERR_8814B)

+#define BIT_GET_BCN_MAX_ERR_8814B(x) (((x) >> BIT_SHIFT_BCN_MAX_ERR_8814B) & BIT_MASK_BCN_MAX_ERR_8814B)
+
 
 
 /* 2 REG_RXTSF_OFFSET_CCK_8814B */
@@ -6908,7 +7608,8 @@
 #define BIT_SHIFT_CCK_RXTSF_OFFSET_8814B 0
 #define BIT_MASK_CCK_RXTSF_OFFSET_8814B 0xff
 #define BIT_CCK_RXTSF_OFFSET_8814B(x) (((x) & BIT_MASK_CCK_RXTSF_OFFSET_8814B) << BIT_SHIFT_CCK_RXTSF_OFFSET_8814B)
-#define BIT_GET_CCK_RXTSF_OFFSET_8814B(x) (((x) >> BIT_SHIFT_CCK_RXTSF_OFFSET_8814B) & BIT_MASK_CCK_RXTSF_OFFSET_8814B)

+#define BIT_GET_CCK_RXTSF_OFFSET_8814B(x) (((x) >> BIT_SHIFT_CCK_RXTSF_OFFSET_8814B) & BIT_MASK_CCK_RXTSF_OFFSET_8814B)
+
 
 
 /* 2 REG_RXTSF_OFFSET_OFDM_8814B */
@@ -6916,7 +7617,8 @@
 #define BIT_SHIFT_OFDM_RXTSF_OFFSET_8814B 0
 #define BIT_MASK_OFDM_RXTSF_OFFSET_8814B 0xff
 #define BIT_OFDM_RXTSF_OFFSET_8814B(x) (((x) & BIT_MASK_OFDM_RXTSF_OFFSET_8814B) << BIT_SHIFT_OFDM_RXTSF_OFFSET_8814B)
-#define BIT_GET_OFDM_RXTSF_OFFSET_8814B(x) (((x) >> BIT_SHIFT_OFDM_RXTSF_OFFSET_8814B) & BIT_MASK_OFDM_RXTSF_OFFSET_8814B)

+#define BIT_GET_OFDM_RXTSF_OFFSET_8814B(x) (((x) >> BIT_SHIFT_OFDM_RXTSF_OFFSET_8814B) & BIT_MASK_OFDM_RXTSF_OFFSET_8814B)
+
 
 
 /* 2 REG_TSFTR_8814B */
@@ -6924,7 +7626,8 @@
 #define BIT_SHIFT_TSF_TIMER_V1_8814B 0
 #define BIT_MASK_TSF_TIMER_V1_8814B 0xffffffffL
 #define BIT_TSF_TIMER_V1_8814B(x) (((x) & BIT_MASK_TSF_TIMER_V1_8814B) << BIT_SHIFT_TSF_TIMER_V1_8814B)
-#define BIT_GET_TSF_TIMER_V1_8814B(x) (((x) >> BIT_SHIFT_TSF_TIMER_V1_8814B) & BIT_MASK_TSF_TIMER_V1_8814B)

+#define BIT_GET_TSF_TIMER_V1_8814B(x) (((x) >> BIT_SHIFT_TSF_TIMER_V1_8814B) & BIT_MASK_TSF_TIMER_V1_8814B)
+
 
 
 /* 2 REG_TSFTR_1_8814B */
@@ -6932,7 +7635,8 @@
 #define BIT_SHIFT_TSF_TIMER_V2_8814B 0
 #define BIT_MASK_TSF_TIMER_V2_8814B 0xffffffffL
 #define BIT_TSF_TIMER_V2_8814B(x) (((x) & BIT_MASK_TSF_TIMER_V2_8814B) << BIT_SHIFT_TSF_TIMER_V2_8814B)
-#define BIT_GET_TSF_TIMER_V2_8814B(x) (((x) >> BIT_SHIFT_TSF_TIMER_V2_8814B) & BIT_MASK_TSF_TIMER_V2_8814B)

+#define BIT_GET_TSF_TIMER_V2_8814B(x) (((x) >> BIT_SHIFT_TSF_TIMER_V2_8814B) & BIT_MASK_TSF_TIMER_V2_8814B)
+
 
 
 /* 2 REG_FREERUN_CNT_8814B */
@@ -6940,7 +7644,8 @@
 #define BIT_SHIFT_FREERUN_CNT_V1_8814B 0
 #define BIT_MASK_FREERUN_CNT_V1_8814B 0xffffffffL
 #define BIT_FREERUN_CNT_V1_8814B(x) (((x) & BIT_MASK_FREERUN_CNT_V1_8814B) << BIT_SHIFT_FREERUN_CNT_V1_8814B)
-#define BIT_GET_FREERUN_CNT_V1_8814B(x) (((x) >> BIT_SHIFT_FREERUN_CNT_V1_8814B) & BIT_MASK_FREERUN_CNT_V1_8814B)

+#define BIT_GET_FREERUN_CNT_V1_8814B(x) (((x) >> BIT_SHIFT_FREERUN_CNT_V1_8814B) & BIT_MASK_FREERUN_CNT_V1_8814B)
+
 
 
 /* 2 REG_FREERUN_CNT_1_8814B */
@@ -6948,7 +7653,8 @@
 #define BIT_SHIFT_FREERUN_CNT_V2_8814B 0
 #define BIT_MASK_FREERUN_CNT_V2_8814B 0xffffffffL
 #define BIT_FREERUN_CNT_V2_8814B(x) (((x) & BIT_MASK_FREERUN_CNT_V2_8814B) << BIT_SHIFT_FREERUN_CNT_V2_8814B)
-#define BIT_GET_FREERUN_CNT_V2_8814B(x) (((x) >> BIT_SHIFT_FREERUN_CNT_V2_8814B) & BIT_MASK_FREERUN_CNT_V2_8814B)

+#define BIT_GET_FREERUN_CNT_V2_8814B(x) (((x) >> BIT_SHIFT_FREERUN_CNT_V2_8814B) & BIT_MASK_FREERUN_CNT_V2_8814B)
+
 
 
 /* 2 REG_ATIMWND1_V1_8814B */
@@ -6956,7 +7662,8 @@
 #define BIT_SHIFT_ATIMWND1_V1_8814B 0
 #define BIT_MASK_ATIMWND1_V1_8814B 0xff
 #define BIT_ATIMWND1_V1_8814B(x) (((x) & BIT_MASK_ATIMWND1_V1_8814B) << BIT_SHIFT_ATIMWND1_V1_8814B)
-#define BIT_GET_ATIMWND1_V1_8814B(x) (((x) >> BIT_SHIFT_ATIMWND1_V1_8814B) & BIT_MASK_ATIMWND1_V1_8814B)

+#define BIT_GET_ATIMWND1_V1_8814B(x) (((x) >> BIT_SHIFT_ATIMWND1_V1_8814B) & BIT_MASK_ATIMWND1_V1_8814B)
+
 
 
 /* 2 REG_TBTT_PROHIBIT_INFRA_8814B */
@@ -6964,7 +7671,8 @@
 #define BIT_SHIFT_TBTT_PROHIBIT_INFRA_8814B 0
 #define BIT_MASK_TBTT_PROHIBIT_INFRA_8814B 0xff
 #define BIT_TBTT_PROHIBIT_INFRA_8814B(x) (((x) & BIT_MASK_TBTT_PROHIBIT_INFRA_8814B) << BIT_SHIFT_TBTT_PROHIBIT_INFRA_8814B)
-#define BIT_GET_TBTT_PROHIBIT_INFRA_8814B(x) (((x) >> BIT_SHIFT_TBTT_PROHIBIT_INFRA_8814B) & BIT_MASK_TBTT_PROHIBIT_INFRA_8814B)

+#define BIT_GET_TBTT_PROHIBIT_INFRA_8814B(x) (((x) >> BIT_SHIFT_TBTT_PROHIBIT_INFRA_8814B) & BIT_MASK_TBTT_PROHIBIT_INFRA_8814B)
+
 
 
 /* 2 REG_CTWND_8814B */
@@ -6972,7 +7680,8 @@
 #define BIT_SHIFT_CTWND_8814B 0
 #define BIT_MASK_CTWND_8814B 0xff
 #define BIT_CTWND_8814B(x) (((x) & BIT_MASK_CTWND_8814B) << BIT_SHIFT_CTWND_8814B)
-#define BIT_GET_CTWND_8814B(x) (((x) >> BIT_SHIFT_CTWND_8814B) & BIT_MASK_CTWND_8814B)

+#define BIT_GET_CTWND_8814B(x) (((x) >> BIT_SHIFT_CTWND_8814B) & BIT_MASK_CTWND_8814B)
+
 
 
 /* 2 REG_BCNIVLCUNT_8814B */
@@ -6980,7 +7689,8 @@
 #define BIT_SHIFT_BCNIVLCUNT_8814B 0
 #define BIT_MASK_BCNIVLCUNT_8814B 0x7f
 #define BIT_BCNIVLCUNT_8814B(x) (((x) & BIT_MASK_BCNIVLCUNT_8814B) << BIT_SHIFT_BCNIVLCUNT_8814B)
-#define BIT_GET_BCNIVLCUNT_8814B(x) (((x) >> BIT_SHIFT_BCNIVLCUNT_8814B) & BIT_MASK_BCNIVLCUNT_8814B)

+#define BIT_GET_BCNIVLCUNT_8814B(x) (((x) >> BIT_SHIFT_BCNIVLCUNT_8814B) & BIT_MASK_BCNIVLCUNT_8814B)
+
 
 
 /* 2 REG_BCNDROPCTRL_8814B */
@@ -6989,7 +7699,8 @@
 #define BIT_SHIFT_BEACON_DROP_IVL_8814B 0
 #define BIT_MASK_BEACON_DROP_IVL_8814B 0x7f
 #define BIT_BEACON_DROP_IVL_8814B(x) (((x) & BIT_MASK_BEACON_DROP_IVL_8814B) << BIT_SHIFT_BEACON_DROP_IVL_8814B)
-#define BIT_GET_BEACON_DROP_IVL_8814B(x) (((x) >> BIT_SHIFT_BEACON_DROP_IVL_8814B) & BIT_MASK_BEACON_DROP_IVL_8814B)

+#define BIT_GET_BEACON_DROP_IVL_8814B(x) (((x) >> BIT_SHIFT_BEACON_DROP_IVL_8814B) & BIT_MASK_BEACON_DROP_IVL_8814B)
+
 
 
 /* 2 REG_HGQ_TIMEOUT_PERIOD_8814B */
@@ -6997,7 +7708,8 @@
 #define BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8814B 0
 #define BIT_MASK_HGQ_TIMEOUT_PERIOD_8814B 0xff
 #define BIT_HGQ_TIMEOUT_PERIOD_8814B(x) (((x) & BIT_MASK_HGQ_TIMEOUT_PERIOD_8814B) << BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8814B)
-#define BIT_GET_HGQ_TIMEOUT_PERIOD_8814B(x) (((x) >> BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8814B) & BIT_MASK_HGQ_TIMEOUT_PERIOD_8814B)

+#define BIT_GET_HGQ_TIMEOUT_PERIOD_8814B(x) (((x) >> BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8814B) & BIT_MASK_HGQ_TIMEOUT_PERIOD_8814B)
+
 
 
 /* 2 REG_TXCMD_TIMEOUT_PERIOD_8814B */
@@ -7005,7 +7717,8 @@
 #define BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8814B 0
 #define BIT_MASK_TXCMD_TIMEOUT_PERIOD_8814B 0xff
 #define BIT_TXCMD_TIMEOUT_PERIOD_8814B(x) (((x) & BIT_MASK_TXCMD_TIMEOUT_PERIOD_8814B) << BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8814B)
-#define BIT_GET_TXCMD_TIMEOUT_PERIOD_8814B(x) (((x) >> BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8814B) & BIT_MASK_TXCMD_TIMEOUT_PERIOD_8814B)

+#define BIT_GET_TXCMD_TIMEOUT_PERIOD_8814B(x) (((x) >> BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8814B) & BIT_MASK_TXCMD_TIMEOUT_PERIOD_8814B)
+
 
 
 /* 2 REG_MISC_CTRL_8814B */
@@ -7017,7 +7730,8 @@
 #define BIT_SHIFT_DIS_SECONDARY_CCA_8814B 0
 #define BIT_MASK_DIS_SECONDARY_CCA_8814B 0x3
 #define BIT_DIS_SECONDARY_CCA_8814B(x) (((x) & BIT_MASK_DIS_SECONDARY_CCA_8814B) << BIT_SHIFT_DIS_SECONDARY_CCA_8814B)
-#define BIT_GET_DIS_SECONDARY_CCA_8814B(x) (((x) >> BIT_SHIFT_DIS_SECONDARY_CCA_8814B) & BIT_MASK_DIS_SECONDARY_CCA_8814B)

+#define BIT_GET_DIS_SECONDARY_CCA_8814B(x) (((x) >> BIT_SHIFT_DIS_SECONDARY_CCA_8814B) & BIT_MASK_DIS_SECONDARY_CCA_8814B)
+
 
 
 /* 2 REG_BCN_CTRL_CLINT1_8814B */
@@ -7051,7 +7765,8 @@
 #define BIT_SHIFT_PORT_SEL_8814B 0
 #define BIT_MASK_PORT_SEL_8814B 0x7
 #define BIT_PORT_SEL_8814B(x) (((x) & BIT_MASK_PORT_SEL_8814B) << BIT_SHIFT_PORT_SEL_8814B)
-#define BIT_GET_PORT_SEL_8814B(x) (((x) >> BIT_SHIFT_PORT_SEL_8814B) & BIT_MASK_PORT_SEL_8814B)

+#define BIT_GET_PORT_SEL_8814B(x) (((x) >> BIT_SHIFT_PORT_SEL_8814B) & BIT_MASK_PORT_SEL_8814B)
+
 
 
 /* 2 REG_P2PPS1_SPEC_STATE_8814B */
@@ -7099,7 +7814,8 @@
 #define BIT_SHIFT_PSTIMER0_INT_8814B 5
 #define BIT_MASK_PSTIMER0_INT_8814B 0x7ffffff
 #define BIT_PSTIMER0_INT_8814B(x) (((x) & BIT_MASK_PSTIMER0_INT_8814B) << BIT_SHIFT_PSTIMER0_INT_8814B)
-#define BIT_GET_PSTIMER0_INT_8814B(x) (((x) >> BIT_SHIFT_PSTIMER0_INT_8814B) & BIT_MASK_PSTIMER0_INT_8814B)

+#define BIT_GET_PSTIMER0_INT_8814B(x) (((x) >> BIT_SHIFT_PSTIMER0_INT_8814B) & BIT_MASK_PSTIMER0_INT_8814B)
+
 
 
 /* 2 REG_PS_TIMER1_8814B */
@@ -7107,7 +7823,8 @@
 #define BIT_SHIFT_PSTIMER1_INT_8814B 5
 #define BIT_MASK_PSTIMER1_INT_8814B 0x7ffffff
 #define BIT_PSTIMER1_INT_8814B(x) (((x) & BIT_MASK_PSTIMER1_INT_8814B) << BIT_SHIFT_PSTIMER1_INT_8814B)
-#define BIT_GET_PSTIMER1_INT_8814B(x) (((x) >> BIT_SHIFT_PSTIMER1_INT_8814B) & BIT_MASK_PSTIMER1_INT_8814B)

+#define BIT_GET_PSTIMER1_INT_8814B(x) (((x) >> BIT_SHIFT_PSTIMER1_INT_8814B) & BIT_MASK_PSTIMER1_INT_8814B)
+
 
 
 /* 2 REG_PS_TIMER2_8814B */
@@ -7115,7 +7832,8 @@
 #define BIT_SHIFT_PSTIMER2_INT_8814B 5
 #define BIT_MASK_PSTIMER2_INT_8814B 0x7ffffff
 #define BIT_PSTIMER2_INT_8814B(x) (((x) & BIT_MASK_PSTIMER2_INT_8814B) << BIT_SHIFT_PSTIMER2_INT_8814B)
-#define BIT_GET_PSTIMER2_INT_8814B(x) (((x) >> BIT_SHIFT_PSTIMER2_INT_8814B) & BIT_MASK_PSTIMER2_INT_8814B)

+#define BIT_GET_PSTIMER2_INT_8814B(x) (((x) >> BIT_SHIFT_PSTIMER2_INT_8814B) & BIT_MASK_PSTIMER2_INT_8814B)
+
 
 
 /* 2 REG_TBTT_CTN_AREA_8814B */
@@ -7123,7 +7841,8 @@
 #define BIT_SHIFT_TBTT_CTN_AREA_8814B 0
 #define BIT_MASK_TBTT_CTN_AREA_8814B 0xff
 #define BIT_TBTT_CTN_AREA_8814B(x) (((x) & BIT_MASK_TBTT_CTN_AREA_8814B) << BIT_SHIFT_TBTT_CTN_AREA_8814B)
-#define BIT_GET_TBTT_CTN_AREA_8814B(x) (((x) >> BIT_SHIFT_TBTT_CTN_AREA_8814B) & BIT_MASK_TBTT_CTN_AREA_8814B)

+#define BIT_GET_TBTT_CTN_AREA_8814B(x) (((x) >> BIT_SHIFT_TBTT_CTN_AREA_8814B) & BIT_MASK_TBTT_CTN_AREA_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -7133,7 +7852,8 @@
 #define BIT_SHIFT_FORCE_BCN_IFS_8814B 0
 #define BIT_MASK_FORCE_BCN_IFS_8814B 0xff
 #define BIT_FORCE_BCN_IFS_8814B(x) (((x) & BIT_MASK_FORCE_BCN_IFS_8814B) << BIT_SHIFT_FORCE_BCN_IFS_8814B)
-#define BIT_GET_FORCE_BCN_IFS_8814B(x) (((x) >> BIT_SHIFT_FORCE_BCN_IFS_8814B) & BIT_MASK_FORCE_BCN_IFS_8814B)

+#define BIT_GET_FORCE_BCN_IFS_8814B(x) (((x) >> BIT_SHIFT_FORCE_BCN_IFS_8814B) & BIT_MASK_FORCE_BCN_IFS_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -7143,7 +7863,8 @@
 #define BIT_SHIFT_TXOP_MIN_8814B 0
 #define BIT_MASK_TXOP_MIN_8814B 0x3fff
 #define BIT_TXOP_MIN_8814B(x) (((x) & BIT_MASK_TXOP_MIN_8814B) << BIT_SHIFT_TXOP_MIN_8814B)
-#define BIT_GET_TXOP_MIN_8814B(x) (((x) >> BIT_SHIFT_TXOP_MIN_8814B) & BIT_MASK_TXOP_MIN_8814B)

+#define BIT_GET_TXOP_MIN_8814B(x) (((x) >> BIT_SHIFT_TXOP_MIN_8814B) & BIT_MASK_TXOP_MIN_8814B)
+
 
 
 /* 2 REG_PRE_BKF_TIME_8814B */
@@ -7151,7 +7872,8 @@
 #define BIT_SHIFT_PRE_BKF_TIME_8814B 0
 #define BIT_MASK_PRE_BKF_TIME_8814B 0xff
 #define BIT_PRE_BKF_TIME_8814B(x) (((x) & BIT_MASK_PRE_BKF_TIME_8814B) << BIT_SHIFT_PRE_BKF_TIME_8814B)
-#define BIT_GET_PRE_BKF_TIME_8814B(x) (((x) >> BIT_SHIFT_PRE_BKF_TIME_8814B) & BIT_MASK_PRE_BKF_TIME_8814B)

+#define BIT_GET_PRE_BKF_TIME_8814B(x) (((x) >> BIT_SHIFT_PRE_BKF_TIME_8814B) & BIT_MASK_PRE_BKF_TIME_8814B)
+
 
 
 /* 2 REG_CROSS_TXOP_CTRL_8814B */
@@ -7171,7 +7893,8 @@
 #define BIT_SHIFT_ATIMWND2_8814B 0
 #define BIT_MASK_ATIMWND2_8814B 0xff
 #define BIT_ATIMWND2_8814B(x) (((x) & BIT_MASK_ATIMWND2_8814B) << BIT_SHIFT_ATIMWND2_8814B)
-#define BIT_GET_ATIMWND2_8814B(x) (((x) >> BIT_SHIFT_ATIMWND2_8814B) & BIT_MASK_ATIMWND2_8814B)

+#define BIT_GET_ATIMWND2_8814B(x) (((x) >> BIT_SHIFT_ATIMWND2_8814B) & BIT_MASK_ATIMWND2_8814B)
+
 
 
 /* 2 REG_ATIMWND3_8814B */
@@ -7179,7 +7902,8 @@
 #define BIT_SHIFT_ATIMWND3_8814B 0
 #define BIT_MASK_ATIMWND3_8814B 0xff
 #define BIT_ATIMWND3_8814B(x) (((x) & BIT_MASK_ATIMWND3_8814B) << BIT_SHIFT_ATIMWND3_8814B)
-#define BIT_GET_ATIMWND3_8814B(x) (((x) >> BIT_SHIFT_ATIMWND3_8814B) & BIT_MASK_ATIMWND3_8814B)

+#define BIT_GET_ATIMWND3_8814B(x) (((x) >> BIT_SHIFT_ATIMWND3_8814B) & BIT_MASK_ATIMWND3_8814B)
+
 
 
 /* 2 REG_ATIMWND4_8814B */
@@ -7187,7 +7911,8 @@
 #define BIT_SHIFT_ATIMWND4_8814B 0
 #define BIT_MASK_ATIMWND4_8814B 0xff
 #define BIT_ATIMWND4_8814B(x) (((x) & BIT_MASK_ATIMWND4_8814B) << BIT_SHIFT_ATIMWND4_8814B)
-#define BIT_GET_ATIMWND4_8814B(x) (((x) >> BIT_SHIFT_ATIMWND4_8814B) & BIT_MASK_ATIMWND4_8814B)

+#define BIT_GET_ATIMWND4_8814B(x) (((x) >> BIT_SHIFT_ATIMWND4_8814B) & BIT_MASK_ATIMWND4_8814B)
+
 
 
 /* 2 REG_ATIMWND5_8814B */
@@ -7195,7 +7920,8 @@
 #define BIT_SHIFT_ATIMWND5_8814B 0
 #define BIT_MASK_ATIMWND5_8814B 0xff
 #define BIT_ATIMWND5_8814B(x) (((x) & BIT_MASK_ATIMWND5_8814B) << BIT_SHIFT_ATIMWND5_8814B)
-#define BIT_GET_ATIMWND5_8814B(x) (((x) >> BIT_SHIFT_ATIMWND5_8814B) & BIT_MASK_ATIMWND5_8814B)

+#define BIT_GET_ATIMWND5_8814B(x) (((x) >> BIT_SHIFT_ATIMWND5_8814B) & BIT_MASK_ATIMWND5_8814B)
+
 
 
 /* 2 REG_ATIMWND6_8814B */
@@ -7203,7 +7929,8 @@
 #define BIT_SHIFT_ATIMWND6_8814B 0
 #define BIT_MASK_ATIMWND6_8814B 0xff
 #define BIT_ATIMWND6_8814B(x) (((x) & BIT_MASK_ATIMWND6_8814B) << BIT_SHIFT_ATIMWND6_8814B)
-#define BIT_GET_ATIMWND6_8814B(x) (((x) >> BIT_SHIFT_ATIMWND6_8814B) & BIT_MASK_ATIMWND6_8814B)

+#define BIT_GET_ATIMWND6_8814B(x) (((x) >> BIT_SHIFT_ATIMWND6_8814B) & BIT_MASK_ATIMWND6_8814B)
+
 
 
 /* 2 REG_ATIMWND7_8814B */
@@ -7211,7 +7938,8 @@
 #define BIT_SHIFT_ATIMWND7_8814B 0
 #define BIT_MASK_ATIMWND7_8814B 0xff
 #define BIT_ATIMWND7_8814B(x) (((x) & BIT_MASK_ATIMWND7_8814B) << BIT_SHIFT_ATIMWND7_8814B)
-#define BIT_GET_ATIMWND7_8814B(x) (((x) >> BIT_SHIFT_ATIMWND7_8814B) & BIT_MASK_ATIMWND7_8814B)

+#define BIT_GET_ATIMWND7_8814B(x) (((x) >> BIT_SHIFT_ATIMWND7_8814B) & BIT_MASK_ATIMWND7_8814B)
+
 
 
 /* 2 REG_ATIMUGT_8814B */
@@ -7219,7 +7947,8 @@
 #define BIT_SHIFT_ATIM_URGENT_8814B 0
 #define BIT_MASK_ATIM_URGENT_8814B 0xff
 #define BIT_ATIM_URGENT_8814B(x) (((x) & BIT_MASK_ATIM_URGENT_8814B) << BIT_SHIFT_ATIM_URGENT_8814B)
-#define BIT_GET_ATIM_URGENT_8814B(x) (((x) >> BIT_SHIFT_ATIM_URGENT_8814B) & BIT_MASK_ATIM_URGENT_8814B)

+#define BIT_GET_ATIM_URGENT_8814B(x) (((x) >> BIT_SHIFT_ATIM_URGENT_8814B) & BIT_MASK_ATIM_URGENT_8814B)
+
 
 
 /* 2 REG_HIQ_NO_LMT_EN_8814B */
@@ -7237,7 +7966,8 @@
 #define BIT_SHIFT_DTIM_COUNT_ROOT_8814B 0
 #define BIT_MASK_DTIM_COUNT_ROOT_8814B 0xff
 #define BIT_DTIM_COUNT_ROOT_8814B(x) (((x) & BIT_MASK_DTIM_COUNT_ROOT_8814B) << BIT_SHIFT_DTIM_COUNT_ROOT_8814B)
-#define BIT_GET_DTIM_COUNT_ROOT_8814B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_ROOT_8814B) & BIT_MASK_DTIM_COUNT_ROOT_8814B)

+#define BIT_GET_DTIM_COUNT_ROOT_8814B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_ROOT_8814B) & BIT_MASK_DTIM_COUNT_ROOT_8814B)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP1_8814B */
@@ -7245,7 +7975,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP1_8814B 0
 #define BIT_MASK_DTIM_COUNT_VAP1_8814B 0xff
 #define BIT_DTIM_COUNT_VAP1_8814B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP1_8814B) << BIT_SHIFT_DTIM_COUNT_VAP1_8814B)
-#define BIT_GET_DTIM_COUNT_VAP1_8814B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP1_8814B) & BIT_MASK_DTIM_COUNT_VAP1_8814B)

+#define BIT_GET_DTIM_COUNT_VAP1_8814B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP1_8814B) & BIT_MASK_DTIM_COUNT_VAP1_8814B)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP2_8814B */
@@ -7253,7 +7984,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP2_8814B 0
 #define BIT_MASK_DTIM_COUNT_VAP2_8814B 0xff
 #define BIT_DTIM_COUNT_VAP2_8814B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP2_8814B) << BIT_SHIFT_DTIM_COUNT_VAP2_8814B)
-#define BIT_GET_DTIM_COUNT_VAP2_8814B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP2_8814B) & BIT_MASK_DTIM_COUNT_VAP2_8814B)

+#define BIT_GET_DTIM_COUNT_VAP2_8814B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP2_8814B) & BIT_MASK_DTIM_COUNT_VAP2_8814B)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP3_8814B */
@@ -7261,7 +7993,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP3_8814B 0
 #define BIT_MASK_DTIM_COUNT_VAP3_8814B 0xff
 #define BIT_DTIM_COUNT_VAP3_8814B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP3_8814B) << BIT_SHIFT_DTIM_COUNT_VAP3_8814B)
-#define BIT_GET_DTIM_COUNT_VAP3_8814B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP3_8814B) & BIT_MASK_DTIM_COUNT_VAP3_8814B)

+#define BIT_GET_DTIM_COUNT_VAP3_8814B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP3_8814B) & BIT_MASK_DTIM_COUNT_VAP3_8814B)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP4_8814B */
@@ -7269,7 +8002,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP4_8814B 0
 #define BIT_MASK_DTIM_COUNT_VAP4_8814B 0xff
 #define BIT_DTIM_COUNT_VAP4_8814B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP4_8814B) << BIT_SHIFT_DTIM_COUNT_VAP4_8814B)
-#define BIT_GET_DTIM_COUNT_VAP4_8814B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP4_8814B) & BIT_MASK_DTIM_COUNT_VAP4_8814B)

+#define BIT_GET_DTIM_COUNT_VAP4_8814B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP4_8814B) & BIT_MASK_DTIM_COUNT_VAP4_8814B)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP5_8814B */
@@ -7277,7 +8011,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP5_8814B 0
 #define BIT_MASK_DTIM_COUNT_VAP5_8814B 0xff
 #define BIT_DTIM_COUNT_VAP5_8814B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP5_8814B) << BIT_SHIFT_DTIM_COUNT_VAP5_8814B)
-#define BIT_GET_DTIM_COUNT_VAP5_8814B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP5_8814B) & BIT_MASK_DTIM_COUNT_VAP5_8814B)

+#define BIT_GET_DTIM_COUNT_VAP5_8814B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP5_8814B) & BIT_MASK_DTIM_COUNT_VAP5_8814B)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP6_8814B */
@@ -7285,7 +8020,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP6_8814B 0
 #define BIT_MASK_DTIM_COUNT_VAP6_8814B 0xff
 #define BIT_DTIM_COUNT_VAP6_8814B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP6_8814B) << BIT_SHIFT_DTIM_COUNT_VAP6_8814B)
-#define BIT_GET_DTIM_COUNT_VAP6_8814B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP6_8814B) & BIT_MASK_DTIM_COUNT_VAP6_8814B)

+#define BIT_GET_DTIM_COUNT_VAP6_8814B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP6_8814B) & BIT_MASK_DTIM_COUNT_VAP6_8814B)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP7_8814B */
@@ -7293,7 +8029,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP7_8814B 0
 #define BIT_MASK_DTIM_COUNT_VAP7_8814B 0xff
 #define BIT_DTIM_COUNT_VAP7_8814B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP7_8814B) << BIT_SHIFT_DTIM_COUNT_VAP7_8814B)
-#define BIT_GET_DTIM_COUNT_VAP7_8814B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP7_8814B) & BIT_MASK_DTIM_COUNT_VAP7_8814B)

+#define BIT_GET_DTIM_COUNT_VAP7_8814B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP7_8814B) & BIT_MASK_DTIM_COUNT_VAP7_8814B)
+
 
 
 /* 2 REG_DIS_ATIM_8814B */
@@ -7311,13 +8048,15 @@
 #define BIT_SHIFT_TSFT_SEL_TIMER1_8814B 3
 #define BIT_MASK_TSFT_SEL_TIMER1_8814B 0x7
 #define BIT_TSFT_SEL_TIMER1_8814B(x) (((x) & BIT_MASK_TSFT_SEL_TIMER1_8814B) << BIT_SHIFT_TSFT_SEL_TIMER1_8814B)
-#define BIT_GET_TSFT_SEL_TIMER1_8814B(x) (((x) >> BIT_SHIFT_TSFT_SEL_TIMER1_8814B) & BIT_MASK_TSFT_SEL_TIMER1_8814B)

+#define BIT_GET_TSFT_SEL_TIMER1_8814B(x) (((x) >> BIT_SHIFT_TSFT_SEL_TIMER1_8814B) & BIT_MASK_TSFT_SEL_TIMER1_8814B)
+
 
 
 #define BIT_SHIFT_EARLY_128US_8814B 0
 #define BIT_MASK_EARLY_128US_8814B 0x7
 #define BIT_EARLY_128US_8814B(x) (((x) & BIT_MASK_EARLY_128US_8814B) << BIT_SHIFT_EARLY_128US_8814B)
-#define BIT_GET_EARLY_128US_8814B(x) (((x) >> BIT_SHIFT_EARLY_128US_8814B) & BIT_MASK_EARLY_128US_8814B)

+#define BIT_GET_EARLY_128US_8814B(x) (((x) >> BIT_SHIFT_EARLY_128US_8814B) & BIT_MASK_EARLY_128US_8814B)
+
 
 
 /* 2 REG_P2PPS1_CTRL_8814B */
@@ -7339,13 +8078,15 @@
 #define BIT_SHIFT_SYNC_CLI_SEL_8814B 4
 #define BIT_MASK_SYNC_CLI_SEL_8814B 0x7
 #define BIT_SYNC_CLI_SEL_8814B(x) (((x) & BIT_MASK_SYNC_CLI_SEL_8814B) << BIT_SHIFT_SYNC_CLI_SEL_8814B)
-#define BIT_GET_SYNC_CLI_SEL_8814B(x) (((x) >> BIT_SHIFT_SYNC_CLI_SEL_8814B) & BIT_MASK_SYNC_CLI_SEL_8814B)

+#define BIT_GET_SYNC_CLI_SEL_8814B(x) (((x) >> BIT_SHIFT_SYNC_CLI_SEL_8814B) & BIT_MASK_SYNC_CLI_SEL_8814B)
+
 
 
 #define BIT_SHIFT_TSFT_SEL_TIMER0_8814B 0
 #define BIT_MASK_TSFT_SEL_TIMER0_8814B 0x7
 #define BIT_TSFT_SEL_TIMER0_8814B(x) (((x) & BIT_MASK_TSFT_SEL_TIMER0_8814B) << BIT_SHIFT_TSFT_SEL_TIMER0_8814B)
-#define BIT_GET_TSFT_SEL_TIMER0_8814B(x) (((x) >> BIT_SHIFT_TSFT_SEL_TIMER0_8814B) & BIT_MASK_TSFT_SEL_TIMER0_8814B)

+#define BIT_GET_TSFT_SEL_TIMER0_8814B(x) (((x) >> BIT_SHIFT_TSFT_SEL_TIMER0_8814B) & BIT_MASK_TSFT_SEL_TIMER0_8814B)
+
 
 
 /* 2 REG_NOA_UNIT_SEL_8814B */
@@ -7353,19 +8094,22 @@
 #define BIT_SHIFT_NOA_UNIT2_SEL_8814B 8
 #define BIT_MASK_NOA_UNIT2_SEL_8814B 0x7
 #define BIT_NOA_UNIT2_SEL_8814B(x) (((x) & BIT_MASK_NOA_UNIT2_SEL_8814B) << BIT_SHIFT_NOA_UNIT2_SEL_8814B)
-#define BIT_GET_NOA_UNIT2_SEL_8814B(x) (((x) >> BIT_SHIFT_NOA_UNIT2_SEL_8814B) & BIT_MASK_NOA_UNIT2_SEL_8814B)

+#define BIT_GET_NOA_UNIT2_SEL_8814B(x) (((x) >> BIT_SHIFT_NOA_UNIT2_SEL_8814B) & BIT_MASK_NOA_UNIT2_SEL_8814B)
+
 
 
 #define BIT_SHIFT_NOA_UNIT1_SEL_8814B 4
 #define BIT_MASK_NOA_UNIT1_SEL_8814B 0x7
 #define BIT_NOA_UNIT1_SEL_8814B(x) (((x) & BIT_MASK_NOA_UNIT1_SEL_8814B) << BIT_SHIFT_NOA_UNIT1_SEL_8814B)
-#define BIT_GET_NOA_UNIT1_SEL_8814B(x) (((x) >> BIT_SHIFT_NOA_UNIT1_SEL_8814B) & BIT_MASK_NOA_UNIT1_SEL_8814B)

+#define BIT_GET_NOA_UNIT1_SEL_8814B(x) (((x) >> BIT_SHIFT_NOA_UNIT1_SEL_8814B) & BIT_MASK_NOA_UNIT1_SEL_8814B)
+
 
 
 #define BIT_SHIFT_NOA_UNIT0_SEL_8814B 0
 #define BIT_MASK_NOA_UNIT0_SEL_8814B 0x7
 #define BIT_NOA_UNIT0_SEL_8814B(x) (((x) & BIT_MASK_NOA_UNIT0_SEL_8814B) << BIT_SHIFT_NOA_UNIT0_SEL_8814B)
-#define BIT_GET_NOA_UNIT0_SEL_8814B(x) (((x) >> BIT_SHIFT_NOA_UNIT0_SEL_8814B) & BIT_MASK_NOA_UNIT0_SEL_8814B)

+#define BIT_GET_NOA_UNIT0_SEL_8814B(x) (((x) >> BIT_SHIFT_NOA_UNIT0_SEL_8814B) & BIT_MASK_NOA_UNIT0_SEL_8814B)
+
 
 
 /* 2 REG_P2POFF_DIS_TXTIME_8814B */
@@ -7373,7 +8117,8 @@
 #define BIT_SHIFT_P2POFF_DIS_TXTIME_8814B 0
 #define BIT_MASK_P2POFF_DIS_TXTIME_8814B 0xff
 #define BIT_P2POFF_DIS_TXTIME_8814B(x) (((x) & BIT_MASK_P2POFF_DIS_TXTIME_8814B) << BIT_SHIFT_P2POFF_DIS_TXTIME_8814B)
-#define BIT_GET_P2POFF_DIS_TXTIME_8814B(x) (((x) >> BIT_SHIFT_P2POFF_DIS_TXTIME_8814B) & BIT_MASK_P2POFF_DIS_TXTIME_8814B)

+#define BIT_GET_P2POFF_DIS_TXTIME_8814B(x) (((x) >> BIT_SHIFT_P2POFF_DIS_TXTIME_8814B) & BIT_MASK_P2POFF_DIS_TXTIME_8814B)
+
 
 
 /* 2 REG_MBSSID_BCN_SPACE2_8814B */
@@ -7381,13 +8126,15 @@
 #define BIT_SHIFT_BCN_SPACE_CLINT2_8814B 16
 #define BIT_MASK_BCN_SPACE_CLINT2_8814B 0xfff
 #define BIT_BCN_SPACE_CLINT2_8814B(x) (((x) & BIT_MASK_BCN_SPACE_CLINT2_8814B) << BIT_SHIFT_BCN_SPACE_CLINT2_8814B)
-#define BIT_GET_BCN_SPACE_CLINT2_8814B(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT2_8814B) & BIT_MASK_BCN_SPACE_CLINT2_8814B)

+#define BIT_GET_BCN_SPACE_CLINT2_8814B(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT2_8814B) & BIT_MASK_BCN_SPACE_CLINT2_8814B)
+
 
 
 #define BIT_SHIFT_BCN_SPACE_CLINT1_8814B 0
 #define BIT_MASK_BCN_SPACE_CLINT1_8814B 0xfff
 #define BIT_BCN_SPACE_CLINT1_8814B(x) (((x) & BIT_MASK_BCN_SPACE_CLINT1_8814B) << BIT_SHIFT_BCN_SPACE_CLINT1_8814B)
-#define BIT_GET_BCN_SPACE_CLINT1_8814B(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT1_8814B) & BIT_MASK_BCN_SPACE_CLINT1_8814B)

+#define BIT_GET_BCN_SPACE_CLINT1_8814B(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT1_8814B) & BIT_MASK_BCN_SPACE_CLINT1_8814B)
+
 
 
 /* 2 REG_MBSSID_BCN_SPACE3_8814B */
@@ -7395,13 +8142,15 @@
 #define BIT_SHIFT_SUB_BCN_SPACE_8814B 16
 #define BIT_MASK_SUB_BCN_SPACE_8814B 0xff
 #define BIT_SUB_BCN_SPACE_8814B(x) (((x) & BIT_MASK_SUB_BCN_SPACE_8814B) << BIT_SHIFT_SUB_BCN_SPACE_8814B)
-#define BIT_GET_SUB_BCN_SPACE_8814B(x) (((x) >> BIT_SHIFT_SUB_BCN_SPACE_8814B) & BIT_MASK_SUB_BCN_SPACE_8814B)

+#define BIT_GET_SUB_BCN_SPACE_8814B(x) (((x) >> BIT_SHIFT_SUB_BCN_SPACE_8814B) & BIT_MASK_SUB_BCN_SPACE_8814B)
+
 
 
 #define BIT_SHIFT_BCN_SPACE_CLINT3_8814B 0
 #define BIT_MASK_BCN_SPACE_CLINT3_8814B 0xfff
 #define BIT_BCN_SPACE_CLINT3_8814B(x) (((x) & BIT_MASK_BCN_SPACE_CLINT3_8814B) << BIT_SHIFT_BCN_SPACE_CLINT3_8814B)
-#define BIT_GET_BCN_SPACE_CLINT3_8814B(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT3_8814B) & BIT_MASK_BCN_SPACE_CLINT3_8814B)

+#define BIT_GET_BCN_SPACE_CLINT3_8814B(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT3_8814B) & BIT_MASK_BCN_SPACE_CLINT3_8814B)
+
 
 
 /* 2 REG_ACMHWCTRL_8814B */
@@ -7423,7 +8172,8 @@
 #define BIT_SHIFT_AVGPERIOD_8814B 0
 #define BIT_MASK_AVGPERIOD_8814B 0xffff
 #define BIT_AVGPERIOD_8814B(x) (((x) & BIT_MASK_AVGPERIOD_8814B) << BIT_SHIFT_AVGPERIOD_8814B)
-#define BIT_GET_AVGPERIOD_8814B(x) (((x) >> BIT_SHIFT_AVGPERIOD_8814B) & BIT_MASK_AVGPERIOD_8814B)

+#define BIT_GET_AVGPERIOD_8814B(x) (((x) >> BIT_SHIFT_AVGPERIOD_8814B) & BIT_MASK_AVGPERIOD_8814B)
+
 
 
 /* 2 REG_VO_ADMTIME_8814B */
@@ -7431,7 +8181,8 @@
 #define BIT_SHIFT_VO_ADMITTED_TIME_8814B 0
 #define BIT_MASK_VO_ADMITTED_TIME_8814B 0xffff
 #define BIT_VO_ADMITTED_TIME_8814B(x) (((x) & BIT_MASK_VO_ADMITTED_TIME_8814B) << BIT_SHIFT_VO_ADMITTED_TIME_8814B)
-#define BIT_GET_VO_ADMITTED_TIME_8814B(x) (((x) >> BIT_SHIFT_VO_ADMITTED_TIME_8814B) & BIT_MASK_VO_ADMITTED_TIME_8814B)

+#define BIT_GET_VO_ADMITTED_TIME_8814B(x) (((x) >> BIT_SHIFT_VO_ADMITTED_TIME_8814B) & BIT_MASK_VO_ADMITTED_TIME_8814B)
+
 
 
 /* 2 REG_VI_ADMTIME_8814B */
@@ -7439,7 +8190,8 @@
 #define BIT_SHIFT_VI_ADMITTED_TIME_8814B 0
 #define BIT_MASK_VI_ADMITTED_TIME_8814B 0xffff
 #define BIT_VI_ADMITTED_TIME_8814B(x) (((x) & BIT_MASK_VI_ADMITTED_TIME_8814B) << BIT_SHIFT_VI_ADMITTED_TIME_8814B)
-#define BIT_GET_VI_ADMITTED_TIME_8814B(x) (((x) >> BIT_SHIFT_VI_ADMITTED_TIME_8814B) & BIT_MASK_VI_ADMITTED_TIME_8814B)

+#define BIT_GET_VI_ADMITTED_TIME_8814B(x) (((x) >> BIT_SHIFT_VI_ADMITTED_TIME_8814B) & BIT_MASK_VI_ADMITTED_TIME_8814B)
+
 
 
 /* 2 REG_BE_ADMTIME_8814B */
@@ -7447,7 +8199,8 @@
 #define BIT_SHIFT_BE_ADMITTED_TIME_8814B 0
 #define BIT_MASK_BE_ADMITTED_TIME_8814B 0xffff
 #define BIT_BE_ADMITTED_TIME_8814B(x) (((x) & BIT_MASK_BE_ADMITTED_TIME_8814B) << BIT_SHIFT_BE_ADMITTED_TIME_8814B)
-#define BIT_GET_BE_ADMITTED_TIME_8814B(x) (((x) >> BIT_SHIFT_BE_ADMITTED_TIME_8814B) & BIT_MASK_BE_ADMITTED_TIME_8814B)

+#define BIT_GET_BE_ADMITTED_TIME_8814B(x) (((x) >> BIT_SHIFT_BE_ADMITTED_TIME_8814B) & BIT_MASK_BE_ADMITTED_TIME_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -7459,7 +8212,8 @@
 #define BIT_SHIFT_RANDOM_GEN_8814B 0
 #define BIT_MASK_RANDOM_GEN_8814B 0xffffff
 #define BIT_RANDOM_GEN_8814B(x) (((x) & BIT_MASK_RANDOM_GEN_8814B) << BIT_SHIFT_RANDOM_GEN_8814B)
-#define BIT_GET_RANDOM_GEN_8814B(x) (((x) >> BIT_SHIFT_RANDOM_GEN_8814B) & BIT_MASK_RANDOM_GEN_8814B)

+#define BIT_GET_RANDOM_GEN_8814B(x) (((x) >> BIT_SHIFT_RANDOM_GEN_8814B) & BIT_MASK_RANDOM_GEN_8814B)
+
 
 
 /* 2 REG_TXCMD_NOA_SEL_8814B */
@@ -7467,13 +8221,15 @@
 #define BIT_SHIFT_NOA_SEL_8814B 4
 #define BIT_MASK_NOA_SEL_8814B 0x7
 #define BIT_NOA_SEL_8814B(x) (((x) & BIT_MASK_NOA_SEL_8814B) << BIT_SHIFT_NOA_SEL_8814B)
-#define BIT_GET_NOA_SEL_8814B(x) (((x) >> BIT_SHIFT_NOA_SEL_8814B) & BIT_MASK_NOA_SEL_8814B)

+#define BIT_GET_NOA_SEL_8814B(x) (((x) >> BIT_SHIFT_NOA_SEL_8814B) & BIT_MASK_NOA_SEL_8814B)
+
 
 
 #define BIT_SHIFT_TXCMD_SEG_SEL_8814B 0
 #define BIT_MASK_TXCMD_SEG_SEL_8814B 0xf
 #define BIT_TXCMD_SEG_SEL_8814B(x) (((x) & BIT_MASK_TXCMD_SEG_SEL_8814B) << BIT_SHIFT_TXCMD_SEG_SEL_8814B)
-#define BIT_GET_TXCMD_SEG_SEL_8814B(x) (((x) >> BIT_SHIFT_TXCMD_SEG_SEL_8814B) & BIT_MASK_TXCMD_SEG_SEL_8814B)

+#define BIT_GET_TXCMD_SEG_SEL_8814B(x) (((x) >> BIT_SHIFT_TXCMD_SEG_SEL_8814B) & BIT_MASK_TXCMD_SEG_SEL_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -7489,7 +8245,8 @@
 #define BIT_SHIFT_NOA_DURATION_V1_8814B 0
 #define BIT_MASK_NOA_DURATION_V1_8814B 0xffffffffL
 #define BIT_NOA_DURATION_V1_8814B(x) (((x) & BIT_MASK_NOA_DURATION_V1_8814B) << BIT_SHIFT_NOA_DURATION_V1_8814B)
-#define BIT_GET_NOA_DURATION_V1_8814B(x) (((x) >> BIT_SHIFT_NOA_DURATION_V1_8814B) & BIT_MASK_NOA_DURATION_V1_8814B)

+#define BIT_GET_NOA_DURATION_V1_8814B(x) (((x) >> BIT_SHIFT_NOA_DURATION_V1_8814B) & BIT_MASK_NOA_DURATION_V1_8814B)
+
 
 
 /* 2 REG_NOA_PARAM_1_8814B */
@@ -7497,7 +8254,8 @@
 #define BIT_SHIFT_NOA_INTERVAL_V1_8814B 0
 #define BIT_MASK_NOA_INTERVAL_V1_8814B 0xffffffffL
 #define BIT_NOA_INTERVAL_V1_8814B(x) (((x) & BIT_MASK_NOA_INTERVAL_V1_8814B) << BIT_SHIFT_NOA_INTERVAL_V1_8814B)
-#define BIT_GET_NOA_INTERVAL_V1_8814B(x) (((x) >> BIT_SHIFT_NOA_INTERVAL_V1_8814B) & BIT_MASK_NOA_INTERVAL_V1_8814B)

+#define BIT_GET_NOA_INTERVAL_V1_8814B(x) (((x) >> BIT_SHIFT_NOA_INTERVAL_V1_8814B) & BIT_MASK_NOA_INTERVAL_V1_8814B)
+
 
 
 /* 2 REG_NOA_PARAM_2_8814B */
@@ -7505,7 +8263,8 @@
 #define BIT_SHIFT_NOA_START_TIME_V1_8814B 0
 #define BIT_MASK_NOA_START_TIME_V1_8814B 0xffffffffL
 #define BIT_NOA_START_TIME_V1_8814B(x) (((x) & BIT_MASK_NOA_START_TIME_V1_8814B) << BIT_SHIFT_NOA_START_TIME_V1_8814B)
-#define BIT_GET_NOA_START_TIME_V1_8814B(x) (((x) >> BIT_SHIFT_NOA_START_TIME_V1_8814B) & BIT_MASK_NOA_START_TIME_V1_8814B)

+#define BIT_GET_NOA_START_TIME_V1_8814B(x) (((x) >> BIT_SHIFT_NOA_START_TIME_V1_8814B) & BIT_MASK_NOA_START_TIME_V1_8814B)
+
 
 
 /* 2 REG_NOA_PARAM_3_8814B */
@@ -7513,7 +8272,8 @@
 #define BIT_SHIFT_NOA_COUNT_V1_8814B 0
 #define BIT_MASK_NOA_COUNT_V1_8814B 0xffffffffL
 #define BIT_NOA_COUNT_V1_8814B(x) (((x) & BIT_MASK_NOA_COUNT_V1_8814B) << BIT_SHIFT_NOA_COUNT_V1_8814B)
-#define BIT_GET_NOA_COUNT_V1_8814B(x) (((x) >> BIT_SHIFT_NOA_COUNT_V1_8814B) & BIT_MASK_NOA_COUNT_V1_8814B)

+#define BIT_GET_NOA_COUNT_V1_8814B(x) (((x) >> BIT_SHIFT_NOA_COUNT_V1_8814B) & BIT_MASK_NOA_COUNT_V1_8814B)
+
 
 
 /* 2 REG_P2P_RST_8814B */
@@ -7539,7 +8299,8 @@
 #define BIT_SHIFT_SCH_TXCMD_8814B 0
 #define BIT_MASK_SCH_TXCMD_8814B 0xffffffffL
 #define BIT_SCH_TXCMD_8814B(x) (((x) & BIT_MASK_SCH_TXCMD_8814B) << BIT_SHIFT_SCH_TXCMD_8814B)
-#define BIT_GET_SCH_TXCMD_8814B(x) (((x) >> BIT_SHIFT_SCH_TXCMD_8814B) & BIT_MASK_SCH_TXCMD_8814B)

+#define BIT_GET_SCH_TXCMD_8814B(x) (((x) >> BIT_SHIFT_SCH_TXCMD_8814B) & BIT_MASK_SCH_TXCMD_8814B)
+
 
 
 /* 2 REG_PAGE5_DUMMY_8814B */
@@ -7549,7 +8310,8 @@
 #define BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8814B 0
 #define BIT_MASK_CPUMGQ_TX_TIMER_V1_8814B 0xffffffffL
 #define BIT_CPUMGQ_TX_TIMER_V1_8814B(x) (((x) & BIT_MASK_CPUMGQ_TX_TIMER_V1_8814B) << BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8814B)
-#define BIT_GET_CPUMGQ_TX_TIMER_V1_8814B(x) (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8814B) & BIT_MASK_CPUMGQ_TX_TIMER_V1_8814B)

+#define BIT_GET_CPUMGQ_TX_TIMER_V1_8814B(x) (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8814B) & BIT_MASK_CPUMGQ_TX_TIMER_V1_8814B)
+
 
 
 /* 2 REG_PS_TIMER_A_8814B */
@@ -7557,7 +8319,8 @@
 #define BIT_SHIFT_PS_TIMER_A_V1_8814B 0
 #define BIT_MASK_PS_TIMER_A_V1_8814B 0xffffffffL
 #define BIT_PS_TIMER_A_V1_8814B(x) (((x) & BIT_MASK_PS_TIMER_A_V1_8814B) << BIT_SHIFT_PS_TIMER_A_V1_8814B)
-#define BIT_GET_PS_TIMER_A_V1_8814B(x) (((x) >> BIT_SHIFT_PS_TIMER_A_V1_8814B) & BIT_MASK_PS_TIMER_A_V1_8814B)

+#define BIT_GET_PS_TIMER_A_V1_8814B(x) (((x) >> BIT_SHIFT_PS_TIMER_A_V1_8814B) & BIT_MASK_PS_TIMER_A_V1_8814B)
+
 
 
 /* 2 REG_PS_TIMER_B_8814B */
@@ -7565,7 +8328,8 @@
 #define BIT_SHIFT_PS_TIMER_B_V1_8814B 0
 #define BIT_MASK_PS_TIMER_B_V1_8814B 0xffffffffL
 #define BIT_PS_TIMER_B_V1_8814B(x) (((x) & BIT_MASK_PS_TIMER_B_V1_8814B) << BIT_SHIFT_PS_TIMER_B_V1_8814B)
-#define BIT_GET_PS_TIMER_B_V1_8814B(x) (((x) >> BIT_SHIFT_PS_TIMER_B_V1_8814B) & BIT_MASK_PS_TIMER_B_V1_8814B)

+#define BIT_GET_PS_TIMER_B_V1_8814B(x) (((x) >> BIT_SHIFT_PS_TIMER_B_V1_8814B) & BIT_MASK_PS_TIMER_B_V1_8814B)
+
 
 
 /* 2 REG_PS_TIMER_C_8814B */
@@ -7573,7 +8337,8 @@
 #define BIT_SHIFT_PS_TIMER_C_V1_8814B 0
 #define BIT_MASK_PS_TIMER_C_V1_8814B 0xffffffffL
 #define BIT_PS_TIMER_C_V1_8814B(x) (((x) & BIT_MASK_PS_TIMER_C_V1_8814B) << BIT_SHIFT_PS_TIMER_C_V1_8814B)
-#define BIT_GET_PS_TIMER_C_V1_8814B(x) (((x) >> BIT_SHIFT_PS_TIMER_C_V1_8814B) & BIT_MASK_PS_TIMER_C_V1_8814B)

+#define BIT_GET_PS_TIMER_C_V1_8814B(x) (((x) >> BIT_SHIFT_PS_TIMER_C_V1_8814B) & BIT_MASK_PS_TIMER_C_V1_8814B)
+
 
 
 /* 2 REG_PS_TIMER_ABC_CPUMGQ_TIMER_CRTL_8814B */
@@ -7583,28 +8348,32 @@
 #define BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8814B 24
 #define BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8814B 0x7
 #define BIT_CPUMGQ_TIMER_TSF_SEL_8814B(x) (((x) & BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8814B) << BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8814B)
-#define BIT_GET_CPUMGQ_TIMER_TSF_SEL_8814B(x) (((x) >> BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8814B) & BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8814B)

+#define BIT_GET_CPUMGQ_TIMER_TSF_SEL_8814B(x) (((x) >> BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8814B) & BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8814B)
+
 
 #define BIT_PS_TIMER_C_EN_8814B BIT(23)
 
 #define BIT_SHIFT_PS_TIMER_C_TSF_SEL_8814B 16
 #define BIT_MASK_PS_TIMER_C_TSF_SEL_8814B 0x7
 #define BIT_PS_TIMER_C_TSF_SEL_8814B(x) (((x) & BIT_MASK_PS_TIMER_C_TSF_SEL_8814B) << BIT_SHIFT_PS_TIMER_C_TSF_SEL_8814B)
-#define BIT_GET_PS_TIMER_C_TSF_SEL_8814B(x) (((x) >> BIT_SHIFT_PS_TIMER_C_TSF_SEL_8814B) & BIT_MASK_PS_TIMER_C_TSF_SEL_8814B)

+#define BIT_GET_PS_TIMER_C_TSF_SEL_8814B(x) (((x) >> BIT_SHIFT_PS_TIMER_C_TSF_SEL_8814B) & BIT_MASK_PS_TIMER_C_TSF_SEL_8814B)
+
 
 #define BIT_PS_TIMER_B_EN_8814B BIT(15)
 
 #define BIT_SHIFT_PS_TIMER_B_TSF_SEL_8814B 8
 #define BIT_MASK_PS_TIMER_B_TSF_SEL_8814B 0x7
 #define BIT_PS_TIMER_B_TSF_SEL_8814B(x) (((x) & BIT_MASK_PS_TIMER_B_TSF_SEL_8814B) << BIT_SHIFT_PS_TIMER_B_TSF_SEL_8814B)
-#define BIT_GET_PS_TIMER_B_TSF_SEL_8814B(x) (((x) >> BIT_SHIFT_PS_TIMER_B_TSF_SEL_8814B) & BIT_MASK_PS_TIMER_B_TSF_SEL_8814B)

+#define BIT_GET_PS_TIMER_B_TSF_SEL_8814B(x) (((x) >> BIT_SHIFT_PS_TIMER_B_TSF_SEL_8814B) & BIT_MASK_PS_TIMER_B_TSF_SEL_8814B)
+
 
 #define BIT_PS_TIMER_A_EN_8814B BIT(7)
 
 #define BIT_SHIFT_PS_TIMER_A_TSF_SEL_8814B 0
 #define BIT_MASK_PS_TIMER_A_TSF_SEL_8814B 0x7
 #define BIT_PS_TIMER_A_TSF_SEL_8814B(x) (((x) & BIT_MASK_PS_TIMER_A_TSF_SEL_8814B) << BIT_SHIFT_PS_TIMER_A_TSF_SEL_8814B)
-#define BIT_GET_PS_TIMER_A_TSF_SEL_8814B(x) (((x) >> BIT_SHIFT_PS_TIMER_A_TSF_SEL_8814B) & BIT_MASK_PS_TIMER_A_TSF_SEL_8814B)

+#define BIT_GET_PS_TIMER_A_TSF_SEL_8814B(x) (((x) >> BIT_SHIFT_PS_TIMER_A_TSF_SEL_8814B) & BIT_MASK_PS_TIMER_A_TSF_SEL_8814B)
+
 
 
 /* 2 REG_CPUMGQ_TX_TIMER_EARLY_8814B */
@@ -7612,7 +8381,8 @@
 #define BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8814B 0
 #define BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8814B 0xff
 #define BIT_CPUMGQ_TX_TIMER_EARLY_8814B(x) (((x) & BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8814B) << BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8814B)
-#define BIT_GET_CPUMGQ_TX_TIMER_EARLY_8814B(x) (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8814B) & BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8814B)

+#define BIT_GET_CPUMGQ_TX_TIMER_EARLY_8814B(x) (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8814B) & BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8814B)
+
 
 
 /* 2 REG_PS_TIMER_A_EARLY_8814B */
@@ -7620,7 +8390,8 @@
 #define BIT_SHIFT_PS_TIMER_A_EARLY_8814B 0
 #define BIT_MASK_PS_TIMER_A_EARLY_8814B 0xff
 #define BIT_PS_TIMER_A_EARLY_8814B(x) (((x) & BIT_MASK_PS_TIMER_A_EARLY_8814B) << BIT_SHIFT_PS_TIMER_A_EARLY_8814B)
-#define BIT_GET_PS_TIMER_A_EARLY_8814B(x) (((x) >> BIT_SHIFT_PS_TIMER_A_EARLY_8814B) & BIT_MASK_PS_TIMER_A_EARLY_8814B)

+#define BIT_GET_PS_TIMER_A_EARLY_8814B(x) (((x) >> BIT_SHIFT_PS_TIMER_A_EARLY_8814B) & BIT_MASK_PS_TIMER_A_EARLY_8814B)
+
 
 
 /* 2 REG_PS_TIMER_B_EARLY_8814B */
@@ -7628,7 +8399,8 @@
 #define BIT_SHIFT_PS_TIMER_B_EARLY_8814B 0
 #define BIT_MASK_PS_TIMER_B_EARLY_8814B 0xff
 #define BIT_PS_TIMER_B_EARLY_8814B(x) (((x) & BIT_MASK_PS_TIMER_B_EARLY_8814B) << BIT_SHIFT_PS_TIMER_B_EARLY_8814B)
-#define BIT_GET_PS_TIMER_B_EARLY_8814B(x) (((x) >> BIT_SHIFT_PS_TIMER_B_EARLY_8814B) & BIT_MASK_PS_TIMER_B_EARLY_8814B)

+#define BIT_GET_PS_TIMER_B_EARLY_8814B(x) (((x) >> BIT_SHIFT_PS_TIMER_B_EARLY_8814B) & BIT_MASK_PS_TIMER_B_EARLY_8814B)
+
 
 
 /* 2 REG_PS_TIMER_C_EARLY_8814B */
@@ -7636,7 +8408,8 @@
 #define BIT_SHIFT_PS_TIMER_C_EARLY_8814B 0
 #define BIT_MASK_PS_TIMER_C_EARLY_8814B 0xff
 #define BIT_PS_TIMER_C_EARLY_8814B(x) (((x) & BIT_MASK_PS_TIMER_C_EARLY_8814B) << BIT_SHIFT_PS_TIMER_C_EARLY_8814B)
-#define BIT_GET_PS_TIMER_C_EARLY_8814B(x) (((x) >> BIT_SHIFT_PS_TIMER_C_EARLY_8814B) & BIT_MASK_PS_TIMER_C_EARLY_8814B)

+#define BIT_GET_PS_TIMER_C_EARLY_8814B(x) (((x) >> BIT_SHIFT_PS_TIMER_C_EARLY_8814B) & BIT_MASK_PS_TIMER_C_EARLY_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -7768,7 +8541,8 @@
 #define BIT_SHIFT_APPEND_MHDR_LEN_8814B 0
 #define BIT_MASK_APPEND_MHDR_LEN_8814B 0x7
 #define BIT_APPEND_MHDR_LEN_8814B(x) (((x) & BIT_MASK_APPEND_MHDR_LEN_8814B) << BIT_SHIFT_APPEND_MHDR_LEN_8814B)
-#define BIT_GET_APPEND_MHDR_LEN_8814B(x) (((x) >> BIT_SHIFT_APPEND_MHDR_LEN_8814B) & BIT_MASK_APPEND_MHDR_LEN_8814B)

+#define BIT_GET_APPEND_MHDR_LEN_8814B(x) (((x) >> BIT_SHIFT_APPEND_MHDR_LEN_8814B) & BIT_MASK_APPEND_MHDR_LEN_8814B)
+
 
 
 /* 2 REG_FW_STS_FILTER_8814B */
@@ -7848,7 +8622,8 @@
 #define BIT_SHIFT_DRVINFO_SZ_V1_8814B 0
 #define BIT_MASK_DRVINFO_SZ_V1_8814B 0xf
 #define BIT_DRVINFO_SZ_V1_8814B(x) (((x) & BIT_MASK_DRVINFO_SZ_V1_8814B) << BIT_SHIFT_DRVINFO_SZ_V1_8814B)
-#define BIT_GET_DRVINFO_SZ_V1_8814B(x) (((x) >> BIT_SHIFT_DRVINFO_SZ_V1_8814B) & BIT_MASK_DRVINFO_SZ_V1_8814B)

+#define BIT_GET_DRVINFO_SZ_V1_8814B(x) (((x) >> BIT_SHIFT_DRVINFO_SZ_V1_8814B) & BIT_MASK_DRVINFO_SZ_V1_8814B)
+
 
 
 /* 2 REG_RX_DLK_TIME_8814B (RX DEADLOCK TIME REGISTER) */
@@ -7856,7 +8631,8 @@
 #define BIT_SHIFT_RX_DLK_TIME_8814B 0
 #define BIT_MASK_RX_DLK_TIME_8814B 0xff
 #define BIT_RX_DLK_TIME_8814B(x) (((x) & BIT_MASK_RX_DLK_TIME_8814B) << BIT_SHIFT_RX_DLK_TIME_8814B)
-#define BIT_GET_RX_DLK_TIME_8814B(x) (((x) >> BIT_SHIFT_RX_DLK_TIME_8814B) & BIT_MASK_RX_DLK_TIME_8814B)

+#define BIT_GET_RX_DLK_TIME_8814B(x) (((x) >> BIT_SHIFT_RX_DLK_TIME_8814B) & BIT_MASK_RX_DLK_TIME_8814B)
+
 
 
 /* 2 REG_RX_PKT_LIMIT_8814B (RX PACKET LENGTH LIMIT REGISTER) */
@@ -7864,7 +8640,8 @@
 #define BIT_SHIFT_RXPKTLMT_8814B 0
 #define BIT_MASK_RXPKTLMT_8814B 0x3f
 #define BIT_RXPKTLMT_8814B(x) (((x) & BIT_MASK_RXPKTLMT_8814B) << BIT_SHIFT_RXPKTLMT_8814B)
-#define BIT_GET_RXPKTLMT_8814B(x) (((x) >> BIT_SHIFT_RXPKTLMT_8814B) & BIT_MASK_RXPKTLMT_8814B)

+#define BIT_GET_RXPKTLMT_8814B(x) (((x) >> BIT_SHIFT_RXPKTLMT_8814B) & BIT_MASK_RXPKTLMT_8814B)
+
 
 
 /* 2 REG_MACID_8814B (MAC ID REGISTER) */
@@ -7872,7 +8649,8 @@
 #define BIT_SHIFT_MACID_8814B 0
 #define BIT_MASK_MACID_8814B 0xffffffffffffL
 #define BIT_MACID_8814B(x) (((x) & BIT_MASK_MACID_8814B) << BIT_SHIFT_MACID_8814B)
-#define BIT_GET_MACID_8814B(x) (((x) >> BIT_SHIFT_MACID_8814B) & BIT_MASK_MACID_8814B)

+#define BIT_GET_MACID_8814B(x) (((x) >> BIT_SHIFT_MACID_8814B) & BIT_MASK_MACID_8814B)
+
 
 
 /* 2 REG_BSSID_8814B (BSSID REGISTER) */
@@ -7880,7 +8658,8 @@
 #define BIT_SHIFT_BSSID_8814B 0
 #define BIT_MASK_BSSID_8814B 0xffffffffffffL
 #define BIT_BSSID_8814B(x) (((x) & BIT_MASK_BSSID_8814B) << BIT_SHIFT_BSSID_8814B)
-#define BIT_GET_BSSID_8814B(x) (((x) >> BIT_SHIFT_BSSID_8814B) & BIT_MASK_BSSID_8814B)

+#define BIT_GET_BSSID_8814B(x) (((x) >> BIT_SHIFT_BSSID_8814B) & BIT_MASK_BSSID_8814B)
+
 
 
 /* 2 REG_MAR_8814B (MULTICAST ADDRESS REGISTER) */
@@ -7888,7 +8667,8 @@
 #define BIT_SHIFT_MAR_8814B 0
 #define BIT_MASK_MAR_8814B 0xffffffffffffffffL
 #define BIT_MAR_8814B(x) (((x) & BIT_MASK_MAR_8814B) << BIT_SHIFT_MAR_8814B)
-#define BIT_GET_MAR_8814B(x) (((x) >> BIT_SHIFT_MAR_8814B) & BIT_MASK_MAR_8814B)

+#define BIT_GET_MAR_8814B(x) (((x) >> BIT_SHIFT_MAR_8814B) & BIT_MASK_MAR_8814B)
+
 
 
 /* 2 REG_MBIDCAMCFG_1_8814B (MBSSID CAM CONFIGURATION REGISTER) */
@@ -7896,7 +8676,8 @@
 #define BIT_SHIFT_MBIDCAM_RWDATA_L_8814B 0
 #define BIT_MASK_MBIDCAM_RWDATA_L_8814B 0xffffffffL
 #define BIT_MBIDCAM_RWDATA_L_8814B(x) (((x) & BIT_MASK_MBIDCAM_RWDATA_L_8814B) << BIT_SHIFT_MBIDCAM_RWDATA_L_8814B)
-#define BIT_GET_MBIDCAM_RWDATA_L_8814B(x) (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_L_8814B) & BIT_MASK_MBIDCAM_RWDATA_L_8814B)

+#define BIT_GET_MBIDCAM_RWDATA_L_8814B(x) (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_L_8814B) & BIT_MASK_MBIDCAM_RWDATA_L_8814B)
+
 
 
 /* 2 REG_MBIDCAMCFG_2_8814B (MBSSID CAM CONFIGURATION REGISTER) */
@@ -7906,7 +8687,8 @@
 #define BIT_SHIFT_MBIDCAM_ADDR_8814B 24
 #define BIT_MASK_MBIDCAM_ADDR_8814B 0x1f
 #define BIT_MBIDCAM_ADDR_8814B(x) (((x) & BIT_MASK_MBIDCAM_ADDR_8814B) << BIT_SHIFT_MBIDCAM_ADDR_8814B)
-#define BIT_GET_MBIDCAM_ADDR_8814B(x) (((x) >> BIT_SHIFT_MBIDCAM_ADDR_8814B) & BIT_MASK_MBIDCAM_ADDR_8814B)

+#define BIT_GET_MBIDCAM_ADDR_8814B(x) (((x) >> BIT_SHIFT_MBIDCAM_ADDR_8814B) & BIT_MASK_MBIDCAM_ADDR_8814B)
+
 
 #define BIT_MBIDCAM_VALID_8814B BIT(23)
 #define BIT_LSIC_TXOP_EN_8814B BIT(17)
@@ -7915,7 +8697,8 @@
 #define BIT_SHIFT_MBIDCAM_RWDATA_H_8814B 0
 #define BIT_MASK_MBIDCAM_RWDATA_H_8814B 0xffff
 #define BIT_MBIDCAM_RWDATA_H_8814B(x) (((x) & BIT_MASK_MBIDCAM_RWDATA_H_8814B) << BIT_SHIFT_MBIDCAM_RWDATA_H_8814B)
-#define BIT_GET_MBIDCAM_RWDATA_H_8814B(x) (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_H_8814B) & BIT_MASK_MBIDCAM_RWDATA_H_8814B)

+#define BIT_GET_MBIDCAM_RWDATA_H_8814B(x) (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_H_8814B) & BIT_MASK_MBIDCAM_RWDATA_H_8814B)
+
 
 
 /* 2 REG_ZLD_NUM_8814B */
@@ -7923,7 +8706,8 @@
 #define BIT_SHIFT_ZLD_NUM_8814B 0
 #define BIT_MASK_ZLD_NUM_8814B 0xff
 #define BIT_ZLD_NUM_8814B(x) (((x) & BIT_MASK_ZLD_NUM_8814B) << BIT_SHIFT_ZLD_NUM_8814B)
-#define BIT_GET_ZLD_NUM_8814B(x) (((x) >> BIT_SHIFT_ZLD_NUM_8814B) & BIT_MASK_ZLD_NUM_8814B)

+#define BIT_GET_ZLD_NUM_8814B(x) (((x) >> BIT_SHIFT_ZLD_NUM_8814B) & BIT_MASK_ZLD_NUM_8814B)
+
 
 
 /* 2 REG_UDF_THSD_8814B */
@@ -7931,7 +8715,8 @@
 #define BIT_SHIFT_UDF_THSD_8814B 0
 #define BIT_MASK_UDF_THSD_8814B 0xff
 #define BIT_UDF_THSD_8814B(x) (((x) & BIT_MASK_UDF_THSD_8814B) << BIT_SHIFT_UDF_THSD_8814B)
-#define BIT_GET_UDF_THSD_8814B(x) (((x) >> BIT_SHIFT_UDF_THSD_8814B) & BIT_MASK_UDF_THSD_8814B)

+#define BIT_GET_UDF_THSD_8814B(x) (((x) >> BIT_SHIFT_UDF_THSD_8814B) & BIT_MASK_UDF_THSD_8814B)
+
 
 
 /* 2 REG_WMAC_TCR_TSFT_OFS_8814B */
@@ -7939,7 +8724,8 @@
 #define BIT_SHIFT_WMAC_TCR_TSFT_OFS_8814B 0
 #define BIT_MASK_WMAC_TCR_TSFT_OFS_8814B 0xffff
 #define BIT_WMAC_TCR_TSFT_OFS_8814B(x) (((x) & BIT_MASK_WMAC_TCR_TSFT_OFS_8814B) << BIT_SHIFT_WMAC_TCR_TSFT_OFS_8814B)
-#define BIT_GET_WMAC_TCR_TSFT_OFS_8814B(x) (((x) >> BIT_SHIFT_WMAC_TCR_TSFT_OFS_8814B) & BIT_MASK_WMAC_TCR_TSFT_OFS_8814B)

+#define BIT_GET_WMAC_TCR_TSFT_OFS_8814B(x) (((x) >> BIT_SHIFT_WMAC_TCR_TSFT_OFS_8814B) & BIT_MASK_WMAC_TCR_TSFT_OFS_8814B)
+
 
 
 /* 2 REG_MCU_TEST_2_V1_8814B */
@@ -7947,7 +8733,8 @@
 #define BIT_SHIFT_MCU_RSVD_2_V1_8814B 0
 #define BIT_MASK_MCU_RSVD_2_V1_8814B 0xffff
 #define BIT_MCU_RSVD_2_V1_8814B(x) (((x) & BIT_MASK_MCU_RSVD_2_V1_8814B) << BIT_SHIFT_MCU_RSVD_2_V1_8814B)
-#define BIT_GET_MCU_RSVD_2_V1_8814B(x) (((x) >> BIT_SHIFT_MCU_RSVD_2_V1_8814B) & BIT_MASK_MCU_RSVD_2_V1_8814B)

+#define BIT_GET_MCU_RSVD_2_V1_8814B(x) (((x) >> BIT_SHIFT_MCU_RSVD_2_V1_8814B) & BIT_MASK_MCU_RSVD_2_V1_8814B)
+
 
 
 /* 2 REG_WMAC_TXTIMEOUT_8814B */
@@ -7955,7 +8742,8 @@
 #define BIT_SHIFT_WMAC_TXTIMEOUT_8814B 0
 #define BIT_MASK_WMAC_TXTIMEOUT_8814B 0xff
 #define BIT_WMAC_TXTIMEOUT_8814B(x) (((x) & BIT_MASK_WMAC_TXTIMEOUT_8814B) << BIT_SHIFT_WMAC_TXTIMEOUT_8814B)
-#define BIT_GET_WMAC_TXTIMEOUT_8814B(x) (((x) >> BIT_SHIFT_WMAC_TXTIMEOUT_8814B) & BIT_MASK_WMAC_TXTIMEOUT_8814B)

+#define BIT_GET_WMAC_TXTIMEOUT_8814B(x) (((x) >> BIT_SHIFT_WMAC_TXTIMEOUT_8814B) & BIT_MASK_WMAC_TXTIMEOUT_8814B)
+
 
 
 /* 2 REG_STMP_THSD_8814B */
@@ -7963,7 +8751,8 @@
 #define BIT_SHIFT_STMP_THSD_8814B 0
 #define BIT_MASK_STMP_THSD_8814B 0xff
 #define BIT_STMP_THSD_8814B(x) (((x) & BIT_MASK_STMP_THSD_8814B) << BIT_SHIFT_STMP_THSD_8814B)
-#define BIT_GET_STMP_THSD_8814B(x) (((x) >> BIT_SHIFT_STMP_THSD_8814B) & BIT_MASK_STMP_THSD_8814B)

+#define BIT_GET_STMP_THSD_8814B(x) (((x) >> BIT_SHIFT_STMP_THSD_8814B) & BIT_MASK_STMP_THSD_8814B)
+
 
 
 /* 2 REG_MAC_SPEC_SIFS_8814B (SPECIFICATION SIFS REGISTER) */
@@ -7971,13 +8760,15 @@
 #define BIT_SHIFT_SPEC_SIFS_OFDM_8814B 8
 #define BIT_MASK_SPEC_SIFS_OFDM_8814B 0xff
 #define BIT_SPEC_SIFS_OFDM_8814B(x) (((x) & BIT_MASK_SPEC_SIFS_OFDM_8814B) << BIT_SHIFT_SPEC_SIFS_OFDM_8814B)
-#define BIT_GET_SPEC_SIFS_OFDM_8814B(x) (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_8814B) & BIT_MASK_SPEC_SIFS_OFDM_8814B)

+#define BIT_GET_SPEC_SIFS_OFDM_8814B(x) (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_8814B) & BIT_MASK_SPEC_SIFS_OFDM_8814B)
+
 
 
 #define BIT_SHIFT_SPEC_SIFS_CCK_8814B 0
 #define BIT_MASK_SPEC_SIFS_CCK_8814B 0xff
 #define BIT_SPEC_SIFS_CCK_8814B(x) (((x) & BIT_MASK_SPEC_SIFS_CCK_8814B) << BIT_SHIFT_SPEC_SIFS_CCK_8814B)
-#define BIT_GET_SPEC_SIFS_CCK_8814B(x) (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_8814B) & BIT_MASK_SPEC_SIFS_CCK_8814B)

+#define BIT_GET_SPEC_SIFS_CCK_8814B(x) (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_8814B) & BIT_MASK_SPEC_SIFS_CCK_8814B)
+
 
 
 /* 2 REG_ACKTO_CCK_8814B (ACK TIMEOUT REGISTER FOR CCK RATE) */
@@ -7985,7 +8776,8 @@
 #define BIT_SHIFT_ACKTO_CCK_8814B 0
 #define BIT_MASK_ACKTO_CCK_8814B 0xff
 #define BIT_ACKTO_CCK_8814B(x) (((x) & BIT_MASK_ACKTO_CCK_8814B) << BIT_SHIFT_ACKTO_CCK_8814B)
-#define BIT_GET_ACKTO_CCK_8814B(x) (((x) >> BIT_SHIFT_ACKTO_CCK_8814B) & BIT_MASK_ACKTO_CCK_8814B)

+#define BIT_GET_ACKTO_CCK_8814B(x) (((x) >> BIT_SHIFT_ACKTO_CCK_8814B) & BIT_MASK_ACKTO_CCK_8814B)
+
 
 
 /* 2 REG_USTIME_EDCA_8814B (US TIME TUNING FOR EDCA REGISTER) */
@@ -7993,7 +8785,8 @@
 #define BIT_SHIFT_USTIME_EDCA_V1_8814B 0
 #define BIT_MASK_USTIME_EDCA_V1_8814B 0x1ff
 #define BIT_USTIME_EDCA_V1_8814B(x) (((x) & BIT_MASK_USTIME_EDCA_V1_8814B) << BIT_SHIFT_USTIME_EDCA_V1_8814B)
-#define BIT_GET_USTIME_EDCA_V1_8814B(x) (((x) >> BIT_SHIFT_USTIME_EDCA_V1_8814B) & BIT_MASK_USTIME_EDCA_V1_8814B)

+#define BIT_GET_USTIME_EDCA_V1_8814B(x) (((x) >> BIT_SHIFT_USTIME_EDCA_V1_8814B) & BIT_MASK_USTIME_EDCA_V1_8814B)
+
 
 
 /* 2 REG_RESP_SIFS_OFDM_8814B (RESPONSE SIFS FOR OFDM REGISTER) */
@@ -8001,13 +8794,15 @@
 #define BIT_SHIFT_SIFS_R2T_OFDM_8814B 8
 #define BIT_MASK_SIFS_R2T_OFDM_8814B 0xff
 #define BIT_SIFS_R2T_OFDM_8814B(x) (((x) & BIT_MASK_SIFS_R2T_OFDM_8814B) << BIT_SHIFT_SIFS_R2T_OFDM_8814B)
-#define BIT_GET_SIFS_R2T_OFDM_8814B(x) (((x) >> BIT_SHIFT_SIFS_R2T_OFDM_8814B) & BIT_MASK_SIFS_R2T_OFDM_8814B)

+#define BIT_GET_SIFS_R2T_OFDM_8814B(x) (((x) >> BIT_SHIFT_SIFS_R2T_OFDM_8814B) & BIT_MASK_SIFS_R2T_OFDM_8814B)
+
 
 
 #define BIT_SHIFT_SIFS_T2T_OFDM_8814B 0
 #define BIT_MASK_SIFS_T2T_OFDM_8814B 0xff
 #define BIT_SIFS_T2T_OFDM_8814B(x) (((x) & BIT_MASK_SIFS_T2T_OFDM_8814B) << BIT_SHIFT_SIFS_T2T_OFDM_8814B)
-#define BIT_GET_SIFS_T2T_OFDM_8814B(x) (((x) >> BIT_SHIFT_SIFS_T2T_OFDM_8814B) & BIT_MASK_SIFS_T2T_OFDM_8814B)

+#define BIT_GET_SIFS_T2T_OFDM_8814B(x) (((x) >> BIT_SHIFT_SIFS_T2T_OFDM_8814B) & BIT_MASK_SIFS_T2T_OFDM_8814B)
+
 
 
 /* 2 REG_RESP_SIFS_CCK_8814B (RESPONSE SIFS FOR CCK REGISTER) */
@@ -8015,13 +8810,15 @@
 #define BIT_SHIFT_SIFS_R2T_CCK_8814B 8
 #define BIT_MASK_SIFS_R2T_CCK_8814B 0xff
 #define BIT_SIFS_R2T_CCK_8814B(x) (((x) & BIT_MASK_SIFS_R2T_CCK_8814B) << BIT_SHIFT_SIFS_R2T_CCK_8814B)
-#define BIT_GET_SIFS_R2T_CCK_8814B(x) (((x) >> BIT_SHIFT_SIFS_R2T_CCK_8814B) & BIT_MASK_SIFS_R2T_CCK_8814B)

+#define BIT_GET_SIFS_R2T_CCK_8814B(x) (((x) >> BIT_SHIFT_SIFS_R2T_CCK_8814B) & BIT_MASK_SIFS_R2T_CCK_8814B)
+
 
 
 #define BIT_SHIFT_SIFS_T2T_CCK_8814B 0
 #define BIT_MASK_SIFS_T2T_CCK_8814B 0xff
 #define BIT_SIFS_T2T_CCK_8814B(x) (((x) & BIT_MASK_SIFS_T2T_CCK_8814B) << BIT_SHIFT_SIFS_T2T_CCK_8814B)
-#define BIT_GET_SIFS_T2T_CCK_8814B(x) (((x) >> BIT_SHIFT_SIFS_T2T_CCK_8814B) & BIT_MASK_SIFS_T2T_CCK_8814B)

+#define BIT_GET_SIFS_T2T_CCK_8814B(x) (((x) >> BIT_SHIFT_SIFS_T2T_CCK_8814B) & BIT_MASK_SIFS_T2T_CCK_8814B)
+
 
 
 /* 2 REG_EIFS_8814B (EIFS REGISTER) */
@@ -8029,7 +8826,8 @@
 #define BIT_SHIFT_EIFS_8814B 0
 #define BIT_MASK_EIFS_8814B 0xffff
 #define BIT_EIFS_8814B(x) (((x) & BIT_MASK_EIFS_8814B) << BIT_SHIFT_EIFS_8814B)
-#define BIT_GET_EIFS_8814B(x) (((x) >> BIT_SHIFT_EIFS_8814B) & BIT_MASK_EIFS_8814B)

+#define BIT_GET_EIFS_8814B(x) (((x) >> BIT_SHIFT_EIFS_8814B) & BIT_MASK_EIFS_8814B)
+
 
 
 /* 2 REG_CTS2TO_8814B (CTS2 TIMEOUT REGISTER) */
@@ -8037,7 +8835,8 @@
 #define BIT_SHIFT_CTS2TO_8814B 0
 #define BIT_MASK_CTS2TO_8814B 0xff
 #define BIT_CTS2TO_8814B(x) (((x) & BIT_MASK_CTS2TO_8814B) << BIT_SHIFT_CTS2TO_8814B)
-#define BIT_GET_CTS2TO_8814B(x) (((x) >> BIT_SHIFT_CTS2TO_8814B) & BIT_MASK_CTS2TO_8814B)

+#define BIT_GET_CTS2TO_8814B(x) (((x) >> BIT_SHIFT_CTS2TO_8814B) & BIT_MASK_CTS2TO_8814B)
+
 
 
 /* 2 REG_ACKTO_8814B (ACK TIMEOUT REGISTER) */
@@ -8045,7 +8844,8 @@
 #define BIT_SHIFT_ACKTO_8814B 0
 #define BIT_MASK_ACKTO_8814B 0xff
 #define BIT_ACKTO_8814B(x) (((x) & BIT_MASK_ACKTO_8814B) << BIT_SHIFT_ACKTO_8814B)
-#define BIT_GET_ACKTO_8814B(x) (((x) >> BIT_SHIFT_ACKTO_8814B) & BIT_MASK_ACKTO_8814B)

+#define BIT_GET_ACKTO_8814B(x) (((x) >> BIT_SHIFT_ACKTO_8814B) & BIT_MASK_ACKTO_8814B)
+
 
 
 /* 2 REG_RPFM_MAP0_8814B (RX PAYLOAD FILTER MAP FRAME TYPE CONTROL REGISTER GROUP 0) */
@@ -8092,7 +8892,8 @@
 #define BIT_SHIFT_RPFM_CAM_ADDR_8814B 0
 #define BIT_MASK_RPFM_CAM_ADDR_8814B 0x7f
 #define BIT_RPFM_CAM_ADDR_8814B(x) (((x) & BIT_MASK_RPFM_CAM_ADDR_8814B) << BIT_SHIFT_RPFM_CAM_ADDR_8814B)
-#define BIT_GET_RPFM_CAM_ADDR_8814B(x) (((x) >> BIT_SHIFT_RPFM_CAM_ADDR_8814B) & BIT_MASK_RPFM_CAM_ADDR_8814B)

+#define BIT_GET_RPFM_CAM_ADDR_8814B(x) (((x) >> BIT_SHIFT_RPFM_CAM_ADDR_8814B) & BIT_MASK_RPFM_CAM_ADDR_8814B)
+
 
 
 /* 2 REG_RPFM_CAM_RWD_8814B (ACK TIMEOUT REGISTER) */
@@ -8100,7 +8901,8 @@
 #define BIT_SHIFT_RPFM_CAM_RWD_8814B 0
 #define BIT_MASK_RPFM_CAM_RWD_8814B 0xffffffffL
 #define BIT_RPFM_CAM_RWD_8814B(x) (((x) & BIT_MASK_RPFM_CAM_RWD_8814B) << BIT_SHIFT_RPFM_CAM_RWD_8814B)
-#define BIT_GET_RPFM_CAM_RWD_8814B(x) (((x) >> BIT_SHIFT_RPFM_CAM_RWD_8814B) & BIT_MASK_RPFM_CAM_RWD_8814B)

+#define BIT_GET_RPFM_CAM_RWD_8814B(x) (((x) >> BIT_SHIFT_RPFM_CAM_RWD_8814B) & BIT_MASK_RPFM_CAM_RWD_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -8110,19 +8912,22 @@
 #define BIT_SHIFT_NAV_UPPER_8814B 16
 #define BIT_MASK_NAV_UPPER_8814B 0xff
 #define BIT_NAV_UPPER_8814B(x) (((x) & BIT_MASK_NAV_UPPER_8814B) << BIT_SHIFT_NAV_UPPER_8814B)
-#define BIT_GET_NAV_UPPER_8814B(x) (((x) >> BIT_SHIFT_NAV_UPPER_8814B) & BIT_MASK_NAV_UPPER_8814B)

+#define BIT_GET_NAV_UPPER_8814B(x) (((x) >> BIT_SHIFT_NAV_UPPER_8814B) & BIT_MASK_NAV_UPPER_8814B)
+
 
 
 #define BIT_SHIFT_RXMYRTS_NAV_8814B 8
 #define BIT_MASK_RXMYRTS_NAV_8814B 0xf
 #define BIT_RXMYRTS_NAV_8814B(x) (((x) & BIT_MASK_RXMYRTS_NAV_8814B) << BIT_SHIFT_RXMYRTS_NAV_8814B)
-#define BIT_GET_RXMYRTS_NAV_8814B(x) (((x) >> BIT_SHIFT_RXMYRTS_NAV_8814B) & BIT_MASK_RXMYRTS_NAV_8814B)

+#define BIT_GET_RXMYRTS_NAV_8814B(x) (((x) >> BIT_SHIFT_RXMYRTS_NAV_8814B) & BIT_MASK_RXMYRTS_NAV_8814B)
+
 
 
 #define BIT_SHIFT_RTSRST_8814B 0
 #define BIT_MASK_RTSRST_8814B 0xff
 #define BIT_RTSRST_8814B(x) (((x) & BIT_MASK_RTSRST_8814B) << BIT_SHIFT_RTSRST_8814B)
-#define BIT_GET_RTSRST_8814B(x) (((x) >> BIT_SHIFT_RTSRST_8814B) & BIT_MASK_RTSRST_8814B)

+#define BIT_GET_RTSRST_8814B(x) (((x) >> BIT_SHIFT_RTSRST_8814B) & BIT_MASK_RTSRST_8814B)
+
 
 
 /* 2 REG_BACAMCMD_8814B (BLOCK ACK CAM COMMAND REGISTER) */
@@ -8133,13 +8938,15 @@
 #define BIT_SHIFT_TXSBM_8814B 14
 #define BIT_MASK_TXSBM_8814B 0x3
 #define BIT_TXSBM_8814B(x) (((x) & BIT_MASK_TXSBM_8814B) << BIT_SHIFT_TXSBM_8814B)
-#define BIT_GET_TXSBM_8814B(x) (((x) >> BIT_SHIFT_TXSBM_8814B) & BIT_MASK_TXSBM_8814B)

+#define BIT_GET_TXSBM_8814B(x) (((x) >> BIT_SHIFT_TXSBM_8814B) & BIT_MASK_TXSBM_8814B)
+
 
 
 #define BIT_SHIFT_BACAM_ADDR_8814B 0
 #define BIT_MASK_BACAM_ADDR_8814B 0x3f
 #define BIT_BACAM_ADDR_8814B(x) (((x) & BIT_MASK_BACAM_ADDR_8814B) << BIT_SHIFT_BACAM_ADDR_8814B)
-#define BIT_GET_BACAM_ADDR_8814B(x) (((x) >> BIT_SHIFT_BACAM_ADDR_8814B) & BIT_MASK_BACAM_ADDR_8814B)

+#define BIT_GET_BACAM_ADDR_8814B(x) (((x) >> BIT_SHIFT_BACAM_ADDR_8814B) & BIT_MASK_BACAM_ADDR_8814B)
+
 
 
 /* 2 REG_BACAMCONTENT_8814B (BLOCK ACK CAM CONTENT REGISTER) */
@@ -8147,13 +8954,15 @@
 #define BIT_SHIFT_BA_CONTENT_H_8814B (32 & CPU_OPT_WIDTH)
 #define BIT_MASK_BA_CONTENT_H_8814B 0xffffffffL
 #define BIT_BA_CONTENT_H_8814B(x) (((x) & BIT_MASK_BA_CONTENT_H_8814B) << BIT_SHIFT_BA_CONTENT_H_8814B)
-#define BIT_GET_BA_CONTENT_H_8814B(x) (((x) >> BIT_SHIFT_BA_CONTENT_H_8814B) & BIT_MASK_BA_CONTENT_H_8814B)

+#define BIT_GET_BA_CONTENT_H_8814B(x) (((x) >> BIT_SHIFT_BA_CONTENT_H_8814B) & BIT_MASK_BA_CONTENT_H_8814B)
+
 
 
 #define BIT_SHIFT_BA_CONTENT_L_8814B 0
 #define BIT_MASK_BA_CONTENT_L_8814B 0xffffffffL
 #define BIT_BA_CONTENT_L_8814B(x) (((x) & BIT_MASK_BA_CONTENT_L_8814B) << BIT_SHIFT_BA_CONTENT_L_8814B)
-#define BIT_GET_BA_CONTENT_L_8814B(x) (((x) >> BIT_SHIFT_BA_CONTENT_L_8814B) & BIT_MASK_BA_CONTENT_L_8814B)

+#define BIT_GET_BA_CONTENT_L_8814B(x) (((x) >> BIT_SHIFT_BA_CONTENT_L_8814B) & BIT_MASK_BA_CONTENT_L_8814B)
+
 
 
 /* 2 REG_WMAC_BITMAP_CTL_8814B */
@@ -8165,7 +8974,8 @@
 #define BIT_SHIFT_BITMAP_CONDITION_8814B 2
 #define BIT_MASK_BITMAP_CONDITION_8814B 0x3
 #define BIT_BITMAP_CONDITION_8814B(x) (((x) & BIT_MASK_BITMAP_CONDITION_8814B) << BIT_SHIFT_BITMAP_CONDITION_8814B)
-#define BIT_GET_BITMAP_CONDITION_8814B(x) (((x) >> BIT_SHIFT_BITMAP_CONDITION_8814B) & BIT_MASK_BITMAP_CONDITION_8814B)

+#define BIT_GET_BITMAP_CONDITION_8814B(x) (((x) >> BIT_SHIFT_BITMAP_CONDITION_8814B) & BIT_MASK_BITMAP_CONDITION_8814B)
+
 
 #define BIT_BITMAP_SSNBK_COUNTER_CLR_8814B BIT(1)
 #define BIT_BITMAP_FORCE_8814B BIT(0)
@@ -8175,7 +8985,8 @@
 #define BIT_SHIFT_RXPKT_TYPE_8814B 2
 #define BIT_MASK_RXPKT_TYPE_8814B 0x3f
 #define BIT_RXPKT_TYPE_8814B(x) (((x) & BIT_MASK_RXPKT_TYPE_8814B) << BIT_SHIFT_RXPKT_TYPE_8814B)
-#define BIT_GET_RXPKT_TYPE_8814B(x) (((x) >> BIT_SHIFT_RXPKT_TYPE_8814B) & BIT_MASK_RXPKT_TYPE_8814B)

+#define BIT_GET_RXPKT_TYPE_8814B(x) (((x) >> BIT_SHIFT_RXPKT_TYPE_8814B) & BIT_MASK_RXPKT_TYPE_8814B)
+
 
 #define BIT_TXACT_IND_8814B BIT(1)
 #define BIT_RXACT_IND_8814B BIT(0)
@@ -8185,7 +8996,8 @@
 #define BIT_SHIFT_BITMAP_SSNBK_COUNTER_8814B 2
 #define BIT_MASK_BITMAP_SSNBK_COUNTER_8814B 0x3f
 #define BIT_BITMAP_SSNBK_COUNTER_8814B(x) (((x) & BIT_MASK_BITMAP_SSNBK_COUNTER_8814B) << BIT_SHIFT_BITMAP_SSNBK_COUNTER_8814B)
-#define BIT_GET_BITMAP_SSNBK_COUNTER_8814B(x) (((x) >> BIT_SHIFT_BITMAP_SSNBK_COUNTER_8814B) & BIT_MASK_BITMAP_SSNBK_COUNTER_8814B)

+#define BIT_GET_BITMAP_SSNBK_COUNTER_8814B(x) (((x) >> BIT_SHIFT_BITMAP_SSNBK_COUNTER_8814B) & BIT_MASK_BITMAP_SSNBK_COUNTER_8814B)
+
 
 #define BIT_BITMAP_EN_8814B BIT(1)
 #define BIT_WMAC_BACAM_RPMEN_8814B BIT(0)
@@ -8195,7 +9007,8 @@
 #define BIT_SHIFT_LBDLY_8814B 0
 #define BIT_MASK_LBDLY_8814B 0x1f
 #define BIT_LBDLY_8814B(x) (((x) & BIT_MASK_LBDLY_8814B) << BIT_SHIFT_LBDLY_8814B)
-#define BIT_GET_LBDLY_8814B(x) (((x) >> BIT_SHIFT_LBDLY_8814B) & BIT_MASK_LBDLY_8814B)

+#define BIT_GET_LBDLY_8814B(x) (((x) >> BIT_SHIFT_LBDLY_8814B) & BIT_MASK_LBDLY_8814B)
+
 
 
 /* 2 REG_RXERR_RPT_8814B (RX ERROR REPORT REGISTER) */
@@ -8203,7 +9016,8 @@
 #define BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8814B 28
 #define BIT_MASK_RXERR_RPT_SEL_V1_3_0_8814B 0xf
 #define BIT_RXERR_RPT_SEL_V1_3_0_8814B(x) (((x) & BIT_MASK_RXERR_RPT_SEL_V1_3_0_8814B) << BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8814B)
-#define BIT_GET_RXERR_RPT_SEL_V1_3_0_8814B(x) (((x) >> BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8814B) & BIT_MASK_RXERR_RPT_SEL_V1_3_0_8814B)

+#define BIT_GET_RXERR_RPT_SEL_V1_3_0_8814B(x) (((x) >> BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8814B) & BIT_MASK_RXERR_RPT_SEL_V1_3_0_8814B)
+
 
 #define BIT_RXERR_RPT_RST_8814B BIT(27)
 #define BIT_RXERR_RPT_SEL_V1_4_8814B BIT(26)
@@ -8213,19 +9027,22 @@
 #define BIT_SHIFT_UD_SUB_TYPE_8814B 18
 #define BIT_MASK_UD_SUB_TYPE_8814B 0xf
 #define BIT_UD_SUB_TYPE_8814B(x) (((x) & BIT_MASK_UD_SUB_TYPE_8814B) << BIT_SHIFT_UD_SUB_TYPE_8814B)
-#define BIT_GET_UD_SUB_TYPE_8814B(x) (((x) >> BIT_SHIFT_UD_SUB_TYPE_8814B) & BIT_MASK_UD_SUB_TYPE_8814B)

+#define BIT_GET_UD_SUB_TYPE_8814B(x) (((x) >> BIT_SHIFT_UD_SUB_TYPE_8814B) & BIT_MASK_UD_SUB_TYPE_8814B)
+
 
 
 #define BIT_SHIFT_UD_TYPE_8814B 16
 #define BIT_MASK_UD_TYPE_8814B 0x3
 #define BIT_UD_TYPE_8814B(x) (((x) & BIT_MASK_UD_TYPE_8814B) << BIT_SHIFT_UD_TYPE_8814B)
-#define BIT_GET_UD_TYPE_8814B(x) (((x) >> BIT_SHIFT_UD_TYPE_8814B) & BIT_MASK_UD_TYPE_8814B)

+#define BIT_GET_UD_TYPE_8814B(x) (((x) >> BIT_SHIFT_UD_TYPE_8814B) & BIT_MASK_UD_TYPE_8814B)
+
 
 
 #define BIT_SHIFT_RPT_COUNTER_8814B 0
 #define BIT_MASK_RPT_COUNTER_8814B 0xffff
 #define BIT_RPT_COUNTER_8814B(x) (((x) & BIT_MASK_RPT_COUNTER_8814B) << BIT_SHIFT_RPT_COUNTER_8814B)
-#define BIT_GET_RPT_COUNTER_8814B(x) (((x) >> BIT_SHIFT_RPT_COUNTER_8814B) & BIT_MASK_RPT_COUNTER_8814B)

+#define BIT_GET_RPT_COUNTER_8814B(x) (((x) >> BIT_SHIFT_RPT_COUNTER_8814B) & BIT_MASK_RPT_COUNTER_8814B)
+
 
 
 /* 2 REG_WMAC_TRXPTCL_CTL_8814B (WMAC TX/RX PROTOCOL CONTROL REGISTER) */
@@ -8233,25 +9050,29 @@
 #define BIT_SHIFT_ACKBA_TYPSEL_8814B (60 & CPU_OPT_WIDTH)
 #define BIT_MASK_ACKBA_TYPSEL_8814B 0xf
 #define BIT_ACKBA_TYPSEL_8814B(x) (((x) & BIT_MASK_ACKBA_TYPSEL_8814B) << BIT_SHIFT_ACKBA_TYPSEL_8814B)
-#define BIT_GET_ACKBA_TYPSEL_8814B(x) (((x) >> BIT_SHIFT_ACKBA_TYPSEL_8814B) & BIT_MASK_ACKBA_TYPSEL_8814B)

+#define BIT_GET_ACKBA_TYPSEL_8814B(x) (((x) >> BIT_SHIFT_ACKBA_TYPSEL_8814B) & BIT_MASK_ACKBA_TYPSEL_8814B)
+
 
 
 #define BIT_SHIFT_ACKBA_ACKPCHK_8814B (56 & CPU_OPT_WIDTH)
 #define BIT_MASK_ACKBA_ACKPCHK_8814B 0xf
 #define BIT_ACKBA_ACKPCHK_8814B(x) (((x) & BIT_MASK_ACKBA_ACKPCHK_8814B) << BIT_SHIFT_ACKBA_ACKPCHK_8814B)
-#define BIT_GET_ACKBA_ACKPCHK_8814B(x) (((x) >> BIT_SHIFT_ACKBA_ACKPCHK_8814B) & BIT_MASK_ACKBA_ACKPCHK_8814B)

+#define BIT_GET_ACKBA_ACKPCHK_8814B(x) (((x) >> BIT_SHIFT_ACKBA_ACKPCHK_8814B) & BIT_MASK_ACKBA_ACKPCHK_8814B)
+
 
 
 #define BIT_SHIFT_ACKBAR_TYPESEL_8814B (48 & CPU_OPT_WIDTH)
 #define BIT_MASK_ACKBAR_TYPESEL_8814B 0xff
 #define BIT_ACKBAR_TYPESEL_8814B(x) (((x) & BIT_MASK_ACKBAR_TYPESEL_8814B) << BIT_SHIFT_ACKBAR_TYPESEL_8814B)
-#define BIT_GET_ACKBAR_TYPESEL_8814B(x) (((x) >> BIT_SHIFT_ACKBAR_TYPESEL_8814B) & BIT_MASK_ACKBAR_TYPESEL_8814B)

+#define BIT_GET_ACKBAR_TYPESEL_8814B(x) (((x) >> BIT_SHIFT_ACKBAR_TYPESEL_8814B) & BIT_MASK_ACKBAR_TYPESEL_8814B)
+
 
 
 #define BIT_SHIFT_ACKBAR_ACKPCHK_8814B (44 & CPU_OPT_WIDTH)
 #define BIT_MASK_ACKBAR_ACKPCHK_8814B 0xf
 #define BIT_ACKBAR_ACKPCHK_8814B(x) (((x) & BIT_MASK_ACKBAR_ACKPCHK_8814B) << BIT_SHIFT_ACKBAR_ACKPCHK_8814B)
-#define BIT_GET_ACKBAR_ACKPCHK_8814B(x) (((x) >> BIT_SHIFT_ACKBAR_ACKPCHK_8814B) & BIT_MASK_ACKBAR_ACKPCHK_8814B)

+#define BIT_GET_ACKBAR_ACKPCHK_8814B(x) (((x) >> BIT_SHIFT_ACKBAR_ACKPCHK_8814B) & BIT_MASK_ACKBAR_ACKPCHK_8814B)
+
 
 #define BIT_RXBA_IGNOREA2_8814B BIT(42)
 #define BIT_EN_SAVE_ALL_TXOPADDR_8814B BIT(41)
@@ -8276,7 +9097,8 @@
 #define BIT_SHIFT_RESP_CHNBUSY_8814B 20
 #define BIT_MASK_RESP_CHNBUSY_8814B 0x3
 #define BIT_RESP_CHNBUSY_8814B(x) (((x) & BIT_MASK_RESP_CHNBUSY_8814B) << BIT_SHIFT_RESP_CHNBUSY_8814B)
-#define BIT_GET_RESP_CHNBUSY_8814B(x) (((x) >> BIT_SHIFT_RESP_CHNBUSY_8814B) & BIT_MASK_RESP_CHNBUSY_8814B)

+#define BIT_GET_RESP_CHNBUSY_8814B(x) (((x) >> BIT_SHIFT_RESP_CHNBUSY_8814B) & BIT_MASK_RESP_CHNBUSY_8814B)
+
 
 #define BIT_RESP_DCTS_EN_8814B BIT(19)
 #define BIT_RESP_DCFE_EN_8814B BIT(18)
@@ -8289,19 +9111,22 @@
 #define BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8814B 10
 #define BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8814B 0x7
 #define BIT_R_WMAC_SECOND_CCA_TIMER_8814B(x) (((x) & BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8814B) << BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8814B)
-#define BIT_GET_R_WMAC_SECOND_CCA_TIMER_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8814B) & BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8814B)

+#define BIT_GET_R_WMAC_SECOND_CCA_TIMER_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8814B) & BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8814B)
+
 
 
 #define BIT_SHIFT_RFMOD_8814B 7
 #define BIT_MASK_RFMOD_8814B 0x3
 #define BIT_RFMOD_8814B(x) (((x) & BIT_MASK_RFMOD_8814B) << BIT_SHIFT_RFMOD_8814B)
-#define BIT_GET_RFMOD_8814B(x) (((x) >> BIT_SHIFT_RFMOD_8814B) & BIT_MASK_RFMOD_8814B)

+#define BIT_GET_RFMOD_8814B(x) (((x) >> BIT_SHIFT_RFMOD_8814B) & BIT_MASK_RFMOD_8814B)
+
 
 
 #define BIT_SHIFT_RESP_CTS_DYNBW_SEL_8814B 5
 #define BIT_MASK_RESP_CTS_DYNBW_SEL_8814B 0x3
 #define BIT_RESP_CTS_DYNBW_SEL_8814B(x) (((x) & BIT_MASK_RESP_CTS_DYNBW_SEL_8814B) << BIT_SHIFT_RESP_CTS_DYNBW_SEL_8814B)
-#define BIT_GET_RESP_CTS_DYNBW_SEL_8814B(x) (((x) >> BIT_SHIFT_RESP_CTS_DYNBW_SEL_8814B) & BIT_MASK_RESP_CTS_DYNBW_SEL_8814B)

+#define BIT_GET_RESP_CTS_DYNBW_SEL_8814B(x) (((x) >> BIT_SHIFT_RESP_CTS_DYNBW_SEL_8814B) & BIT_MASK_RESP_CTS_DYNBW_SEL_8814B)
+
 
 #define BIT_DLY_TX_WAIT_RXANTSEL_8814B BIT(4)
 #define BIT_TXRESP_BY_RXANTSEL_8814B BIT(3)
@@ -8309,7 +9134,8 @@
 #define BIT_SHIFT_ORIG_DCTS_CHK_8814B 0
 #define BIT_MASK_ORIG_DCTS_CHK_8814B 0x3
 #define BIT_ORIG_DCTS_CHK_8814B(x) (((x) & BIT_MASK_ORIG_DCTS_CHK_8814B) << BIT_SHIFT_ORIG_DCTS_CHK_8814B)
-#define BIT_GET_ORIG_DCTS_CHK_8814B(x) (((x) >> BIT_SHIFT_ORIG_DCTS_CHK_8814B) & BIT_MASK_ORIG_DCTS_CHK_8814B)

+#define BIT_GET_ORIG_DCTS_CHK_8814B(x) (((x) >> BIT_SHIFT_ORIG_DCTS_CHK_8814B) & BIT_MASK_ORIG_DCTS_CHK_8814B)
+
 
 
 /* 2 REG_CAMCMD_8814B (CAM COMMAND REGISTER) */
@@ -8321,7 +9147,8 @@
 #define BIT_SHIFT_SECCAM_ADDR_V2_8814B 0
 #define BIT_MASK_SECCAM_ADDR_V2_8814B 0x3ff
 #define BIT_SECCAM_ADDR_V2_8814B(x) (((x) & BIT_MASK_SECCAM_ADDR_V2_8814B) << BIT_SHIFT_SECCAM_ADDR_V2_8814B)
-#define BIT_GET_SECCAM_ADDR_V2_8814B(x) (((x) >> BIT_SHIFT_SECCAM_ADDR_V2_8814B) & BIT_MASK_SECCAM_ADDR_V2_8814B)

+#define BIT_GET_SECCAM_ADDR_V2_8814B(x) (((x) >> BIT_SHIFT_SECCAM_ADDR_V2_8814B) & BIT_MASK_SECCAM_ADDR_V2_8814B)
+
 
 
 /* 2 REG_CAMWRITE_8814B (CAM WRITE REGISTER) */
@@ -8329,7 +9156,8 @@
 #define BIT_SHIFT_CAMW_DATA_8814B 0
 #define BIT_MASK_CAMW_DATA_8814B 0xffffffffL
 #define BIT_CAMW_DATA_8814B(x) (((x) & BIT_MASK_CAMW_DATA_8814B) << BIT_SHIFT_CAMW_DATA_8814B)
-#define BIT_GET_CAMW_DATA_8814B(x) (((x) >> BIT_SHIFT_CAMW_DATA_8814B) & BIT_MASK_CAMW_DATA_8814B)

+#define BIT_GET_CAMW_DATA_8814B(x) (((x) >> BIT_SHIFT_CAMW_DATA_8814B) & BIT_MASK_CAMW_DATA_8814B)
+
 
 
 /* 2 REG_CAMREAD_8814B (CAM READ REGISTER) */
@@ -8337,7 +9165,8 @@
 #define BIT_SHIFT_CAMR_DATA_8814B 0
 #define BIT_MASK_CAMR_DATA_8814B 0xffffffffL
 #define BIT_CAMR_DATA_8814B(x) (((x) & BIT_MASK_CAMR_DATA_8814B) << BIT_SHIFT_CAMR_DATA_8814B)
-#define BIT_GET_CAMR_DATA_8814B(x) (((x) >> BIT_SHIFT_CAMR_DATA_8814B) & BIT_MASK_CAMR_DATA_8814B)

+#define BIT_GET_CAMR_DATA_8814B(x) (((x) >> BIT_SHIFT_CAMR_DATA_8814B) & BIT_MASK_CAMR_DATA_8814B)
+
 
 
 /* 2 REG_CAMDBG_8814B (CAM DEBUG REGISTER) */
@@ -8347,20 +9176,23 @@
 #define BIT_SHIFT_CAMDBG_SEC_TYPE_8814B 12
 #define BIT_MASK_CAMDBG_SEC_TYPE_8814B 0x7
 #define BIT_CAMDBG_SEC_TYPE_8814B(x) (((x) & BIT_MASK_CAMDBG_SEC_TYPE_8814B) << BIT_SHIFT_CAMDBG_SEC_TYPE_8814B)
-#define BIT_GET_CAMDBG_SEC_TYPE_8814B(x) (((x) >> BIT_SHIFT_CAMDBG_SEC_TYPE_8814B) & BIT_MASK_CAMDBG_SEC_TYPE_8814B)

+#define BIT_GET_CAMDBG_SEC_TYPE_8814B(x) (((x) >> BIT_SHIFT_CAMDBG_SEC_TYPE_8814B) & BIT_MASK_CAMDBG_SEC_TYPE_8814B)
+
 
 #define BIT_CAMDBG_EXT_SECTYPE_8814B BIT(11)
 
 #define BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8814B 5
 #define BIT_MASK_CAMDBG_MIC_KEY_IDX_8814B 0x1f
 #define BIT_CAMDBG_MIC_KEY_IDX_8814B(x) (((x) & BIT_MASK_CAMDBG_MIC_KEY_IDX_8814B) << BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8814B)
-#define BIT_GET_CAMDBG_MIC_KEY_IDX_8814B(x) (((x) >> BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8814B) & BIT_MASK_CAMDBG_MIC_KEY_IDX_8814B)

+#define BIT_GET_CAMDBG_MIC_KEY_IDX_8814B(x) (((x) >> BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8814B) & BIT_MASK_CAMDBG_MIC_KEY_IDX_8814B)
+
 
 
 #define BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8814B 0
 #define BIT_MASK_CAMDBG_SEC_KEY_IDX_8814B 0x1f
 #define BIT_CAMDBG_SEC_KEY_IDX_8814B(x) (((x) & BIT_MASK_CAMDBG_SEC_KEY_IDX_8814B) << BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8814B)
-#define BIT_GET_CAMDBG_SEC_KEY_IDX_8814B(x) (((x) >> BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8814B) & BIT_MASK_CAMDBG_SEC_KEY_IDX_8814B)

+#define BIT_GET_CAMDBG_SEC_KEY_IDX_8814B(x) (((x) >> BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8814B) & BIT_MASK_CAMDBG_SEC_KEY_IDX_8814B)
+
 
 
 /* 2 REG_RXFILTER_ACTION_1_8814B */
@@ -8368,7 +9200,8 @@
 #define BIT_SHIFT_RXFILTER_ACTION_1_8814B 0
 #define BIT_MASK_RXFILTER_ACTION_1_8814B 0xff
 #define BIT_RXFILTER_ACTION_1_8814B(x) (((x) & BIT_MASK_RXFILTER_ACTION_1_8814B) << BIT_SHIFT_RXFILTER_ACTION_1_8814B)
-#define BIT_GET_RXFILTER_ACTION_1_8814B(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_1_8814B) & BIT_MASK_RXFILTER_ACTION_1_8814B)

+#define BIT_GET_RXFILTER_ACTION_1_8814B(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_1_8814B) & BIT_MASK_RXFILTER_ACTION_1_8814B)
+
 
 
 /* 2 REG_RXFILTER_CATEGORY_1_8814B */
@@ -8376,7 +9209,8 @@
 #define BIT_SHIFT_RXFILTER_CATEGORY_1_8814B 0
 #define BIT_MASK_RXFILTER_CATEGORY_1_8814B 0xff
 #define BIT_RXFILTER_CATEGORY_1_8814B(x) (((x) & BIT_MASK_RXFILTER_CATEGORY_1_8814B) << BIT_SHIFT_RXFILTER_CATEGORY_1_8814B)
-#define BIT_GET_RXFILTER_CATEGORY_1_8814B(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_1_8814B) & BIT_MASK_RXFILTER_CATEGORY_1_8814B)

+#define BIT_GET_RXFILTER_CATEGORY_1_8814B(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_1_8814B) & BIT_MASK_RXFILTER_CATEGORY_1_8814B)
+
 
 
 /* 2 REG_SECCFG_8814B (SECURITY CONFIGURATION REGISTER) */
@@ -8401,7 +9235,8 @@
 #define BIT_SHIFT_RXFILTER_ACTION_3_8814B 0
 #define BIT_MASK_RXFILTER_ACTION_3_8814B 0xff
 #define BIT_RXFILTER_ACTION_3_8814B(x) (((x) & BIT_MASK_RXFILTER_ACTION_3_8814B) << BIT_SHIFT_RXFILTER_ACTION_3_8814B)
-#define BIT_GET_RXFILTER_ACTION_3_8814B(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_3_8814B) & BIT_MASK_RXFILTER_ACTION_3_8814B)

+#define BIT_GET_RXFILTER_ACTION_3_8814B(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_3_8814B) & BIT_MASK_RXFILTER_ACTION_3_8814B)
+
 
 
 /* 2 REG_RXFILTER_CATEGORY_3_8814B */
@@ -8409,7 +9244,8 @@
 #define BIT_SHIFT_RXFILTER_CATEGORY_3_8814B 0
 #define BIT_MASK_RXFILTER_CATEGORY_3_8814B 0xff
 #define BIT_RXFILTER_CATEGORY_3_8814B(x) (((x) & BIT_MASK_RXFILTER_CATEGORY_3_8814B) << BIT_SHIFT_RXFILTER_CATEGORY_3_8814B)
-#define BIT_GET_RXFILTER_CATEGORY_3_8814B(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_3_8814B) & BIT_MASK_RXFILTER_CATEGORY_3_8814B)

+#define BIT_GET_RXFILTER_CATEGORY_3_8814B(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_3_8814B) & BIT_MASK_RXFILTER_CATEGORY_3_8814B)
+
 
 
 /* 2 REG_RXFILTER_ACTION_2_8814B */
@@ -8417,7 +9253,8 @@
 #define BIT_SHIFT_RXFILTER_ACTION_2_8814B 0
 #define BIT_MASK_RXFILTER_ACTION_2_8814B 0xff
 #define BIT_RXFILTER_ACTION_2_8814B(x) (((x) & BIT_MASK_RXFILTER_ACTION_2_8814B) << BIT_SHIFT_RXFILTER_ACTION_2_8814B)
-#define BIT_GET_RXFILTER_ACTION_2_8814B(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_2_8814B) & BIT_MASK_RXFILTER_ACTION_2_8814B)

+#define BIT_GET_RXFILTER_ACTION_2_8814B(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_2_8814B) & BIT_MASK_RXFILTER_ACTION_2_8814B)
+
 
 
 /* 2 REG_RXFILTER_CATEGORY_2_8814B */
@@ -8425,7 +9262,8 @@
 #define BIT_SHIFT_RXFILTER_CATEGORY_2_8814B 0
 #define BIT_MASK_RXFILTER_CATEGORY_2_8814B 0xff
 #define BIT_RXFILTER_CATEGORY_2_8814B(x) (((x) & BIT_MASK_RXFILTER_CATEGORY_2_8814B) << BIT_SHIFT_RXFILTER_CATEGORY_2_8814B)
-#define BIT_GET_RXFILTER_CATEGORY_2_8814B(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_2_8814B) & BIT_MASK_RXFILTER_CATEGORY_2_8814B)

+#define BIT_GET_RXFILTER_CATEGORY_2_8814B(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_2_8814B) & BIT_MASK_RXFILTER_CATEGORY_2_8814B)
+
 
 
 /* 2 REG_RXFLTMAP4_8814B (RX FILTER MAP GROUP 4) */
@@ -8515,7 +9353,8 @@
 #define BIT_SHIFT_PORTSEL__PS_RX_INFO_8814B 5
 #define BIT_MASK_PORTSEL__PS_RX_INFO_8814B 0x7
 #define BIT_PORTSEL__PS_RX_INFO_8814B(x) (((x) & BIT_MASK_PORTSEL__PS_RX_INFO_8814B) << BIT_SHIFT_PORTSEL__PS_RX_INFO_8814B)
-#define BIT_GET_PORTSEL__PS_RX_INFO_8814B(x) (((x) >> BIT_SHIFT_PORTSEL__PS_RX_INFO_8814B) & BIT_MASK_PORTSEL__PS_RX_INFO_8814B)

+#define BIT_GET_PORTSEL__PS_RX_INFO_8814B(x) (((x) >> BIT_SHIFT_PORTSEL__PS_RX_INFO_8814B) & BIT_MASK_PORTSEL__PS_RX_INFO_8814B)
+
 
 #define BIT_RXCTRLIN0_8814B BIT(4)
 #define BIT_RXMGTIN0_8814B BIT(3)
@@ -8533,7 +9372,8 @@
 #define BIT_SHIFT_PSF_BSSIDSEL_B2B1_8814B 6
 #define BIT_MASK_PSF_BSSIDSEL_B2B1_8814B 0x3
 #define BIT_PSF_BSSIDSEL_B2B1_8814B(x) (((x) & BIT_MASK_PSF_BSSIDSEL_B2B1_8814B) << BIT_SHIFT_PSF_BSSIDSEL_B2B1_8814B)
-#define BIT_GET_PSF_BSSIDSEL_B2B1_8814B(x) (((x) >> BIT_SHIFT_PSF_BSSIDSEL_B2B1_8814B) & BIT_MASK_PSF_BSSIDSEL_B2B1_8814B)

+#define BIT_GET_PSF_BSSIDSEL_B2B1_8814B(x) (((x) >> BIT_SHIFT_PSF_BSSIDSEL_B2B1_8814B) & BIT_MASK_PSF_BSSIDSEL_B2B1_8814B)
+
 
 #define BIT_WOWHCI_8814B BIT(5)
 #define BIT_PSF_BSSIDSEL_B0_8814B BIT(4)
@@ -8548,13 +9388,15 @@
 #define BIT_SHIFT_LPNAV_EARLY_8814B 16
 #define BIT_MASK_LPNAV_EARLY_8814B 0x7fff
 #define BIT_LPNAV_EARLY_8814B(x) (((x) & BIT_MASK_LPNAV_EARLY_8814B) << BIT_SHIFT_LPNAV_EARLY_8814B)
-#define BIT_GET_LPNAV_EARLY_8814B(x) (((x) >> BIT_SHIFT_LPNAV_EARLY_8814B) & BIT_MASK_LPNAV_EARLY_8814B)

+#define BIT_GET_LPNAV_EARLY_8814B(x) (((x) >> BIT_SHIFT_LPNAV_EARLY_8814B) & BIT_MASK_LPNAV_EARLY_8814B)
+
 
 
 #define BIT_SHIFT_LPNAV_TH_8814B 0
 #define BIT_MASK_LPNAV_TH_8814B 0xffff
 #define BIT_LPNAV_TH_8814B(x) (((x) & BIT_MASK_LPNAV_TH_8814B) << BIT_SHIFT_LPNAV_TH_8814B)
-#define BIT_GET_LPNAV_TH_8814B(x) (((x) >> BIT_SHIFT_LPNAV_TH_8814B) & BIT_MASK_LPNAV_TH_8814B)

+#define BIT_GET_LPNAV_TH_8814B(x) (((x) >> BIT_SHIFT_LPNAV_TH_8814B) & BIT_MASK_LPNAV_TH_8814B)
+
 
 
 /* 2 REG_WKFMCAM_CMD_8814B (WAKEUP FRAME CAM COMMAND REGISTER) */
@@ -8565,13 +9407,15 @@
 #define BIT_SHIFT_WKFCAM_ADDR_V2_8814B 8
 #define BIT_MASK_WKFCAM_ADDR_V2_8814B 0xff
 #define BIT_WKFCAM_ADDR_V2_8814B(x) (((x) & BIT_MASK_WKFCAM_ADDR_V2_8814B) << BIT_SHIFT_WKFCAM_ADDR_V2_8814B)
-#define BIT_GET_WKFCAM_ADDR_V2_8814B(x) (((x) >> BIT_SHIFT_WKFCAM_ADDR_V2_8814B) & BIT_MASK_WKFCAM_ADDR_V2_8814B)

+#define BIT_GET_WKFCAM_ADDR_V2_8814B(x) (((x) >> BIT_SHIFT_WKFCAM_ADDR_V2_8814B) & BIT_MASK_WKFCAM_ADDR_V2_8814B)
+
 
 
 #define BIT_SHIFT_WKFCAM_CAM_NUM_V1_8814B 0
 #define BIT_MASK_WKFCAM_CAM_NUM_V1_8814B 0xff
 #define BIT_WKFCAM_CAM_NUM_V1_8814B(x) (((x) & BIT_MASK_WKFCAM_CAM_NUM_V1_8814B) << BIT_SHIFT_WKFCAM_CAM_NUM_V1_8814B)
-#define BIT_GET_WKFCAM_CAM_NUM_V1_8814B(x) (((x) >> BIT_SHIFT_WKFCAM_CAM_NUM_V1_8814B) & BIT_MASK_WKFCAM_CAM_NUM_V1_8814B)

+#define BIT_GET_WKFCAM_CAM_NUM_V1_8814B(x) (((x) >> BIT_SHIFT_WKFCAM_CAM_NUM_V1_8814B) & BIT_MASK_WKFCAM_CAM_NUM_V1_8814B)
+
 
 
 /* 2 REG_WKFMCAM_RWD_8814B (WAKEUP FRAME READ/WRITE DATA) */
@@ -8579,7 +9423,8 @@
 #define BIT_SHIFT_WKFMCAM_RWD_8814B 0
 #define BIT_MASK_WKFMCAM_RWD_8814B 0xffffffffL
 #define BIT_WKFMCAM_RWD_8814B(x) (((x) & BIT_MASK_WKFMCAM_RWD_8814B) << BIT_SHIFT_WKFMCAM_RWD_8814B)
-#define BIT_GET_WKFMCAM_RWD_8814B(x) (((x) >> BIT_SHIFT_WKFMCAM_RWD_8814B) & BIT_MASK_WKFMCAM_RWD_8814B)

+#define BIT_GET_WKFMCAM_RWD_8814B(x) (((x) >> BIT_SHIFT_WKFMCAM_RWD_8814B) & BIT_MASK_WKFMCAM_RWD_8814B)
+
 
 
 /* 2 REG_RXFLTMAP1_8814B (RX FILTER MAP GROUP 1) */
@@ -8643,13 +9488,15 @@
 #define BIT_SHIFT_DTIM_CNT_8814B 24
 #define BIT_MASK_DTIM_CNT_8814B 0xff
 #define BIT_DTIM_CNT_8814B(x) (((x) & BIT_MASK_DTIM_CNT_8814B) << BIT_SHIFT_DTIM_CNT_8814B)
-#define BIT_GET_DTIM_CNT_8814B(x) (((x) >> BIT_SHIFT_DTIM_CNT_8814B) & BIT_MASK_DTIM_CNT_8814B)

+#define BIT_GET_DTIM_CNT_8814B(x) (((x) >> BIT_SHIFT_DTIM_CNT_8814B) & BIT_MASK_DTIM_CNT_8814B)
+
 
 
 #define BIT_SHIFT_DTIM_PERIOD_8814B 16
 #define BIT_MASK_DTIM_PERIOD_8814B 0xff
 #define BIT_DTIM_PERIOD_8814B(x) (((x) & BIT_MASK_DTIM_PERIOD_8814B) << BIT_SHIFT_DTIM_PERIOD_8814B)
-#define BIT_GET_DTIM_PERIOD_8814B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD_8814B) & BIT_MASK_DTIM_PERIOD_8814B)

+#define BIT_GET_DTIM_PERIOD_8814B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD_8814B) & BIT_MASK_DTIM_PERIOD_8814B)
+
 
 #define BIT_DTIM_8814B BIT(15)
 #define BIT_TIM_8814B BIT(14)
@@ -8657,7 +9504,8 @@
 #define BIT_SHIFT_PS_AID_0_8814B 0
 #define BIT_MASK_PS_AID_0_8814B 0x7ff
 #define BIT_PS_AID_0_8814B(x) (((x) & BIT_MASK_PS_AID_0_8814B) << BIT_SHIFT_PS_AID_0_8814B)
-#define BIT_GET_PS_AID_0_8814B(x) (((x) >> BIT_SHIFT_PS_AID_0_8814B) & BIT_MASK_PS_AID_0_8814B)

+#define BIT_GET_PS_AID_0_8814B(x) (((x) >> BIT_SHIFT_PS_AID_0_8814B) & BIT_MASK_PS_AID_0_8814B)
+
 
 
 /* 2 REG_FLC_TRPC_8814B (TIMER OF FLC_RPC) */
@@ -8667,7 +9515,8 @@
 #define BIT_SHIFT_TRPCD_8814B 0
 #define BIT_MASK_TRPCD_8814B 0x3f
 #define BIT_TRPCD_8814B(x) (((x) & BIT_MASK_TRPCD_8814B) << BIT_SHIFT_TRPCD_8814B)
-#define BIT_GET_TRPCD_8814B(x) (((x) >> BIT_SHIFT_TRPCD_8814B) & BIT_MASK_TRPCD_8814B)

+#define BIT_GET_TRPCD_8814B(x) (((x) >> BIT_SHIFT_TRPCD_8814B) & BIT_MASK_TRPCD_8814B)
+
 
 
 /* 2 REG_FLC_PTS_8814B (PKT TYPE SELECTION OF FLC_RPC T) */
@@ -8680,7 +9529,8 @@
 #define BIT_SHIFT_FLC_RPCT_8814B 0
 #define BIT_MASK_FLC_RPCT_8814B 0xff
 #define BIT_FLC_RPCT_8814B(x) (((x) & BIT_MASK_FLC_RPCT_8814B) << BIT_SHIFT_FLC_RPCT_8814B)
-#define BIT_GET_FLC_RPCT_8814B(x) (((x) >> BIT_SHIFT_FLC_RPCT_8814B) & BIT_MASK_FLC_RPCT_8814B)

+#define BIT_GET_FLC_RPCT_8814B(x) (((x) >> BIT_SHIFT_FLC_RPCT_8814B) & BIT_MASK_FLC_RPCT_8814B)
+
 
 
 /* 2 REG_FLC_RPC_8814B (FW LPS CONDITION -- RX PKT COUNTER) */
@@ -8688,7 +9538,8 @@
 #define BIT_SHIFT_FLC_RPC_8814B 0
 #define BIT_MASK_FLC_RPC_8814B 0xff
 #define BIT_FLC_RPC_8814B(x) (((x) & BIT_MASK_FLC_RPC_8814B) << BIT_SHIFT_FLC_RPC_8814B)
-#define BIT_GET_FLC_RPC_8814B(x) (((x) >> BIT_SHIFT_FLC_RPC_8814B) & BIT_MASK_FLC_RPC_8814B)

+#define BIT_GET_FLC_RPC_8814B(x) (((x) >> BIT_SHIFT_FLC_RPC_8814B) & BIT_MASK_FLC_RPC_8814B)
+
 
 
 /* 2 REG_RXPKTMON_CTRL_8814B */
@@ -8696,25 +9547,29 @@
 #define BIT_SHIFT_RXBKQPKT_SEQ_8814B 20
 #define BIT_MASK_RXBKQPKT_SEQ_8814B 0xf
 #define BIT_RXBKQPKT_SEQ_8814B(x) (((x) & BIT_MASK_RXBKQPKT_SEQ_8814B) << BIT_SHIFT_RXBKQPKT_SEQ_8814B)
-#define BIT_GET_RXBKQPKT_SEQ_8814B(x) (((x) >> BIT_SHIFT_RXBKQPKT_SEQ_8814B) & BIT_MASK_RXBKQPKT_SEQ_8814B)

+#define BIT_GET_RXBKQPKT_SEQ_8814B(x) (((x) >> BIT_SHIFT_RXBKQPKT_SEQ_8814B) & BIT_MASK_RXBKQPKT_SEQ_8814B)
+
 
 
 #define BIT_SHIFT_RXBEQPKT_SEQ_8814B 16
 #define BIT_MASK_RXBEQPKT_SEQ_8814B 0xf
 #define BIT_RXBEQPKT_SEQ_8814B(x) (((x) & BIT_MASK_RXBEQPKT_SEQ_8814B) << BIT_SHIFT_RXBEQPKT_SEQ_8814B)
-#define BIT_GET_RXBEQPKT_SEQ_8814B(x) (((x) >> BIT_SHIFT_RXBEQPKT_SEQ_8814B) & BIT_MASK_RXBEQPKT_SEQ_8814B)

+#define BIT_GET_RXBEQPKT_SEQ_8814B(x) (((x) >> BIT_SHIFT_RXBEQPKT_SEQ_8814B) & BIT_MASK_RXBEQPKT_SEQ_8814B)
+
 
 
 #define BIT_SHIFT_RXVIQPKT_SEQ_8814B 12
 #define BIT_MASK_RXVIQPKT_SEQ_8814B 0xf
 #define BIT_RXVIQPKT_SEQ_8814B(x) (((x) & BIT_MASK_RXVIQPKT_SEQ_8814B) << BIT_SHIFT_RXVIQPKT_SEQ_8814B)
-#define BIT_GET_RXVIQPKT_SEQ_8814B(x) (((x) >> BIT_SHIFT_RXVIQPKT_SEQ_8814B) & BIT_MASK_RXVIQPKT_SEQ_8814B)

+#define BIT_GET_RXVIQPKT_SEQ_8814B(x) (((x) >> BIT_SHIFT_RXVIQPKT_SEQ_8814B) & BIT_MASK_RXVIQPKT_SEQ_8814B)
+
 
 
 #define BIT_SHIFT_RXVOQPKT_SEQ_8814B 8
 #define BIT_MASK_RXVOQPKT_SEQ_8814B 0xf
 #define BIT_RXVOQPKT_SEQ_8814B(x) (((x) & BIT_MASK_RXVOQPKT_SEQ_8814B) << BIT_SHIFT_RXVOQPKT_SEQ_8814B)
-#define BIT_GET_RXVOQPKT_SEQ_8814B(x) (((x) >> BIT_SHIFT_RXVOQPKT_SEQ_8814B) & BIT_MASK_RXVOQPKT_SEQ_8814B)

+#define BIT_GET_RXVOQPKT_SEQ_8814B(x) (((x) >> BIT_SHIFT_RXVOQPKT_SEQ_8814B) & BIT_MASK_RXVOQPKT_SEQ_8814B)
+
 
 #define BIT_RXBKQPKT_ERR_8814B BIT(7)
 #define BIT_RXBEQPKT_ERR_8814B BIT(6)
@@ -8729,20 +9584,23 @@
 #define BIT_SHIFT_STATE_SEL_8814B 24
 #define BIT_MASK_STATE_SEL_8814B 0x1f
 #define BIT_STATE_SEL_8814B(x) (((x) & BIT_MASK_STATE_SEL_8814B) << BIT_SHIFT_STATE_SEL_8814B)
-#define BIT_GET_STATE_SEL_8814B(x) (((x) >> BIT_SHIFT_STATE_SEL_8814B) & BIT_MASK_STATE_SEL_8814B)

+#define BIT_GET_STATE_SEL_8814B(x) (((x) >> BIT_SHIFT_STATE_SEL_8814B) & BIT_MASK_STATE_SEL_8814B)
+
 
 
 #define BIT_SHIFT_STATE_INFO_8814B 8
 #define BIT_MASK_STATE_INFO_8814B 0xff
 #define BIT_STATE_INFO_8814B(x) (((x) & BIT_MASK_STATE_INFO_8814B) << BIT_SHIFT_STATE_INFO_8814B)
-#define BIT_GET_STATE_INFO_8814B(x) (((x) >> BIT_SHIFT_STATE_INFO_8814B) & BIT_MASK_STATE_INFO_8814B)

+#define BIT_GET_STATE_INFO_8814B(x) (((x) >> BIT_SHIFT_STATE_INFO_8814B) & BIT_MASK_STATE_INFO_8814B)
+
 
 #define BIT_UPD_NXT_STATE_8814B BIT(7)
 
 #define BIT_SHIFT_CUR_STATE_8814B 0
 #define BIT_MASK_CUR_STATE_8814B 0x7f
 #define BIT_CUR_STATE_8814B(x) (((x) & BIT_MASK_CUR_STATE_8814B) << BIT_SHIFT_CUR_STATE_8814B)
-#define BIT_GET_CUR_STATE_8814B(x) (((x) >> BIT_SHIFT_CUR_STATE_8814B) & BIT_MASK_CUR_STATE_8814B)

+#define BIT_GET_CUR_STATE_8814B(x) (((x) >> BIT_SHIFT_CUR_STATE_8814B) & BIT_MASK_CUR_STATE_8814B)
+
 
 
 /* 2 REG_ERROR_MON_8814B */
@@ -8759,7 +9617,8 @@
 #define BIT_SHIFT_INFO_INDEX_OFFSET_8814B 16
 #define BIT_MASK_INFO_INDEX_OFFSET_8814B 0x1fff
 #define BIT_INFO_INDEX_OFFSET_8814B(x) (((x) & BIT_MASK_INFO_INDEX_OFFSET_8814B) << BIT_SHIFT_INFO_INDEX_OFFSET_8814B)
-#define BIT_GET_INFO_INDEX_OFFSET_8814B(x) (((x) >> BIT_SHIFT_INFO_INDEX_OFFSET_8814B) & BIT_MASK_INFO_INDEX_OFFSET_8814B)

+#define BIT_GET_INFO_INDEX_OFFSET_8814B(x) (((x) >> BIT_SHIFT_INFO_INDEX_OFFSET_8814B) & BIT_MASK_INFO_INDEX_OFFSET_8814B)
+
 
 #define BIT_WMAC_SRCH_FIFOFULL_8814B BIT(15)
 #define BIT_DIS_INFOSRCH_8814B BIT(14)
@@ -8768,7 +9627,8 @@
 #define BIT_SHIFT_INFO_ADDR_OFFSET_8814B 0
 #define BIT_MASK_INFO_ADDR_OFFSET_8814B 0x1fff
 #define BIT_INFO_ADDR_OFFSET_8814B(x) (((x) & BIT_MASK_INFO_ADDR_OFFSET_8814B) << BIT_SHIFT_INFO_ADDR_OFFSET_8814B)
-#define BIT_GET_INFO_ADDR_OFFSET_8814B(x) (((x) >> BIT_SHIFT_INFO_ADDR_OFFSET_8814B) & BIT_MASK_INFO_ADDR_OFFSET_8814B)

+#define BIT_GET_INFO_ADDR_OFFSET_8814B(x) (((x) >> BIT_SHIFT_INFO_ADDR_OFFSET_8814B) & BIT_MASK_INFO_ADDR_OFFSET_8814B)
+
 
 
 /* 2 REG_BT_COEX_TABLE_8814B (BT-COEXISTENCE CONTROL REGISTER) */
@@ -8779,13 +9639,15 @@
 #define BIT_SHIFT_PRI_MASK_TXAC_8814B (117 & CPU_OPT_WIDTH)
 #define BIT_MASK_PRI_MASK_TXAC_8814B 0x7f
 #define BIT_PRI_MASK_TXAC_8814B(x) (((x) & BIT_MASK_PRI_MASK_TXAC_8814B) << BIT_SHIFT_PRI_MASK_TXAC_8814B)
-#define BIT_GET_PRI_MASK_TXAC_8814B(x) (((x) >> BIT_SHIFT_PRI_MASK_TXAC_8814B) & BIT_MASK_PRI_MASK_TXAC_8814B)

+#define BIT_GET_PRI_MASK_TXAC_8814B(x) (((x) >> BIT_SHIFT_PRI_MASK_TXAC_8814B) & BIT_MASK_PRI_MASK_TXAC_8814B)
+
 
 
 #define BIT_SHIFT_PRI_MASK_NAV_8814B (109 & CPU_OPT_WIDTH)
 #define BIT_MASK_PRI_MASK_NAV_8814B 0xff
 #define BIT_PRI_MASK_NAV_8814B(x) (((x) & BIT_MASK_PRI_MASK_NAV_8814B) << BIT_SHIFT_PRI_MASK_NAV_8814B)
-#define BIT_GET_PRI_MASK_NAV_8814B(x) (((x) >> BIT_SHIFT_PRI_MASK_NAV_8814B) & BIT_MASK_PRI_MASK_NAV_8814B)

+#define BIT_GET_PRI_MASK_NAV_8814B(x) (((x) >> BIT_SHIFT_PRI_MASK_NAV_8814B) & BIT_MASK_PRI_MASK_NAV_8814B)
+
 
 #define BIT_PRI_MASK_CCK_8814B BIT(108)
 #define BIT_PRI_MASK_OFDM_8814B BIT(107)
@@ -8794,13 +9656,15 @@
 #define BIT_SHIFT_PRI_MASK_NUM_8814B (102 & CPU_OPT_WIDTH)
 #define BIT_MASK_PRI_MASK_NUM_8814B 0xf
 #define BIT_PRI_MASK_NUM_8814B(x) (((x) & BIT_MASK_PRI_MASK_NUM_8814B) << BIT_SHIFT_PRI_MASK_NUM_8814B)
-#define BIT_GET_PRI_MASK_NUM_8814B(x) (((x) >> BIT_SHIFT_PRI_MASK_NUM_8814B) & BIT_MASK_PRI_MASK_NUM_8814B)

+#define BIT_GET_PRI_MASK_NUM_8814B(x) (((x) >> BIT_SHIFT_PRI_MASK_NUM_8814B) & BIT_MASK_PRI_MASK_NUM_8814B)
+
 
 
 #define BIT_SHIFT_PRI_MASK_TYPE_8814B (98 & CPU_OPT_WIDTH)
 #define BIT_MASK_PRI_MASK_TYPE_8814B 0xf
 #define BIT_PRI_MASK_TYPE_8814B(x) (((x) & BIT_MASK_PRI_MASK_TYPE_8814B) << BIT_SHIFT_PRI_MASK_TYPE_8814B)
-#define BIT_GET_PRI_MASK_TYPE_8814B(x) (((x) >> BIT_SHIFT_PRI_MASK_TYPE_8814B) & BIT_MASK_PRI_MASK_TYPE_8814B)

+#define BIT_GET_PRI_MASK_TYPE_8814B(x) (((x) >> BIT_SHIFT_PRI_MASK_TYPE_8814B) & BIT_MASK_PRI_MASK_TYPE_8814B)
+
 
 #define BIT_OOB_8814B BIT(97)
 #define BIT_ANT_SEL_8814B BIT(96)
@@ -8808,25 +9672,29 @@
 #define BIT_SHIFT_BREAK_TABLE_2_8814B (80 & CPU_OPT_WIDTH)
 #define BIT_MASK_BREAK_TABLE_2_8814B 0xffff
 #define BIT_BREAK_TABLE_2_8814B(x) (((x) & BIT_MASK_BREAK_TABLE_2_8814B) << BIT_SHIFT_BREAK_TABLE_2_8814B)
-#define BIT_GET_BREAK_TABLE_2_8814B(x) (((x) >> BIT_SHIFT_BREAK_TABLE_2_8814B) & BIT_MASK_BREAK_TABLE_2_8814B)

+#define BIT_GET_BREAK_TABLE_2_8814B(x) (((x) >> BIT_SHIFT_BREAK_TABLE_2_8814B) & BIT_MASK_BREAK_TABLE_2_8814B)
+
 
 
 #define BIT_SHIFT_BREAK_TABLE_1_8814B (64 & CPU_OPT_WIDTH)
 #define BIT_MASK_BREAK_TABLE_1_8814B 0xffff
 #define BIT_BREAK_TABLE_1_8814B(x) (((x) & BIT_MASK_BREAK_TABLE_1_8814B) << BIT_SHIFT_BREAK_TABLE_1_8814B)
-#define BIT_GET_BREAK_TABLE_1_8814B(x) (((x) >> BIT_SHIFT_BREAK_TABLE_1_8814B) & BIT_MASK_BREAK_TABLE_1_8814B)

+#define BIT_GET_BREAK_TABLE_1_8814B(x) (((x) >> BIT_SHIFT_BREAK_TABLE_1_8814B) & BIT_MASK_BREAK_TABLE_1_8814B)
+
 
 
 #define BIT_SHIFT_COEX_TABLE_2_8814B (32 & CPU_OPT_WIDTH)
 #define BIT_MASK_COEX_TABLE_2_8814B 0xffffffffL
 #define BIT_COEX_TABLE_2_8814B(x) (((x) & BIT_MASK_COEX_TABLE_2_8814B) << BIT_SHIFT_COEX_TABLE_2_8814B)
-#define BIT_GET_COEX_TABLE_2_8814B(x) (((x) >> BIT_SHIFT_COEX_TABLE_2_8814B) & BIT_MASK_COEX_TABLE_2_8814B)

+#define BIT_GET_COEX_TABLE_2_8814B(x) (((x) >> BIT_SHIFT_COEX_TABLE_2_8814B) & BIT_MASK_COEX_TABLE_2_8814B)
+
 
 
 #define BIT_SHIFT_COEX_TABLE_1_8814B 0
 #define BIT_MASK_COEX_TABLE_1_8814B 0xffffffffL
 #define BIT_COEX_TABLE_1_8814B(x) (((x) & BIT_MASK_COEX_TABLE_1_8814B) << BIT_SHIFT_COEX_TABLE_1_8814B)
-#define BIT_GET_COEX_TABLE_1_8814B(x) (((x) >> BIT_SHIFT_COEX_TABLE_1_8814B) & BIT_MASK_COEX_TABLE_1_8814B)

+#define BIT_GET_COEX_TABLE_1_8814B(x) (((x) >> BIT_SHIFT_COEX_TABLE_1_8814B) & BIT_MASK_COEX_TABLE_1_8814B)
+
 
 
 /* 2 REG_RXCMD_0_8814B */
@@ -8835,7 +9703,8 @@
 #define BIT_SHIFT_RXCMD_INFO_8814B 0
 #define BIT_MASK_RXCMD_INFO_8814B 0x7fffffffL
 #define BIT_RXCMD_INFO_8814B(x) (((x) & BIT_MASK_RXCMD_INFO_8814B) << BIT_SHIFT_RXCMD_INFO_8814B)
-#define BIT_GET_RXCMD_INFO_8814B(x) (((x) >> BIT_SHIFT_RXCMD_INFO_8814B) & BIT_MASK_RXCMD_INFO_8814B)

+#define BIT_GET_RXCMD_INFO_8814B(x) (((x) >> BIT_SHIFT_RXCMD_INFO_8814B) & BIT_MASK_RXCMD_INFO_8814B)
+
 
 
 /* 2 REG_RXCMD_1_8814B */
@@ -8843,7 +9712,8 @@
 #define BIT_SHIFT_RXCMD_PRD_8814B 0
 #define BIT_MASK_RXCMD_PRD_8814B 0xffff
 #define BIT_RXCMD_PRD_8814B(x) (((x) & BIT_MASK_RXCMD_PRD_8814B) << BIT_SHIFT_RXCMD_PRD_8814B)
-#define BIT_GET_RXCMD_PRD_8814B(x) (((x) >> BIT_SHIFT_RXCMD_PRD_8814B) & BIT_MASK_RXCMD_PRD_8814B)

+#define BIT_GET_RXCMD_PRD_8814B(x) (((x) >> BIT_SHIFT_RXCMD_PRD_8814B) & BIT_MASK_RXCMD_PRD_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -8853,31 +9723,36 @@
 #define BIT_SHIFT_WMAC_RESP_MFB_8814B 25
 #define BIT_MASK_WMAC_RESP_MFB_8814B 0x7f
 #define BIT_WMAC_RESP_MFB_8814B(x) (((x) & BIT_MASK_WMAC_RESP_MFB_8814B) << BIT_SHIFT_WMAC_RESP_MFB_8814B)
-#define BIT_GET_WMAC_RESP_MFB_8814B(x) (((x) >> BIT_SHIFT_WMAC_RESP_MFB_8814B) & BIT_MASK_WMAC_RESP_MFB_8814B)

+#define BIT_GET_WMAC_RESP_MFB_8814B(x) (((x) >> BIT_SHIFT_WMAC_RESP_MFB_8814B) & BIT_MASK_WMAC_RESP_MFB_8814B)
+
 
 
 #define BIT_SHIFT_WMAC_ANTINF_SEL_8814B 23
 #define BIT_MASK_WMAC_ANTINF_SEL_8814B 0x3
 #define BIT_WMAC_ANTINF_SEL_8814B(x) (((x) & BIT_MASK_WMAC_ANTINF_SEL_8814B) << BIT_SHIFT_WMAC_ANTINF_SEL_8814B)
-#define BIT_GET_WMAC_ANTINF_SEL_8814B(x) (((x) >> BIT_SHIFT_WMAC_ANTINF_SEL_8814B) & BIT_MASK_WMAC_ANTINF_SEL_8814B)

+#define BIT_GET_WMAC_ANTINF_SEL_8814B(x) (((x) >> BIT_SHIFT_WMAC_ANTINF_SEL_8814B) & BIT_MASK_WMAC_ANTINF_SEL_8814B)
+
 
 
 #define BIT_SHIFT_WMAC_ANTSEL_SEL_8814B 21
 #define BIT_MASK_WMAC_ANTSEL_SEL_8814B 0x3
 #define BIT_WMAC_ANTSEL_SEL_8814B(x) (((x) & BIT_MASK_WMAC_ANTSEL_SEL_8814B) << BIT_SHIFT_WMAC_ANTSEL_SEL_8814B)
-#define BIT_GET_WMAC_ANTSEL_SEL_8814B(x) (((x) >> BIT_SHIFT_WMAC_ANTSEL_SEL_8814B) & BIT_MASK_WMAC_ANTSEL_SEL_8814B)

+#define BIT_GET_WMAC_ANTSEL_SEL_8814B(x) (((x) >> BIT_SHIFT_WMAC_ANTSEL_SEL_8814B) & BIT_MASK_WMAC_ANTSEL_SEL_8814B)
+
 
 
 #define BIT_SHIFT_R_WMAC_RESP_TXPOWER_8814B 18
 #define BIT_MASK_R_WMAC_RESP_TXPOWER_8814B 0x7
 #define BIT_R_WMAC_RESP_TXPOWER_8814B(x) (((x) & BIT_MASK_R_WMAC_RESP_TXPOWER_8814B) << BIT_SHIFT_R_WMAC_RESP_TXPOWER_8814B)
-#define BIT_GET_R_WMAC_RESP_TXPOWER_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_RESP_TXPOWER_8814B) & BIT_MASK_R_WMAC_RESP_TXPOWER_8814B)

+#define BIT_GET_R_WMAC_RESP_TXPOWER_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_RESP_TXPOWER_8814B) & BIT_MASK_R_WMAC_RESP_TXPOWER_8814B)
+
 
 
 #define BIT_SHIFT_WMAC_RESP_TXANT_8814B 0
 #define BIT_MASK_WMAC_RESP_TXANT_8814B 0x3ffff
 #define BIT_WMAC_RESP_TXANT_8814B(x) (((x) & BIT_MASK_WMAC_RESP_TXANT_8814B) << BIT_SHIFT_WMAC_RESP_TXANT_8814B)
-#define BIT_GET_WMAC_RESP_TXANT_8814B(x) (((x) >> BIT_SHIFT_WMAC_RESP_TXANT_8814B) & BIT_MASK_WMAC_RESP_TXANT_8814B)

+#define BIT_GET_WMAC_RESP_TXANT_8814B(x) (((x) >> BIT_SHIFT_WMAC_RESP_TXANT_8814B) & BIT_MASK_WMAC_RESP_TXANT_8814B)
+
 
 
 /* 2 REG_BBPSF_CTRL_8814B */
@@ -8887,20 +9762,23 @@
 #define BIT_SHIFT_WMAC_CSI_RATE_8814B 24
 #define BIT_MASK_WMAC_CSI_RATE_8814B 0x3f
 #define BIT_WMAC_CSI_RATE_8814B(x) (((x) & BIT_MASK_WMAC_CSI_RATE_8814B) << BIT_SHIFT_WMAC_CSI_RATE_8814B)
-#define BIT_GET_WMAC_CSI_RATE_8814B(x) (((x) >> BIT_SHIFT_WMAC_CSI_RATE_8814B) & BIT_MASK_WMAC_CSI_RATE_8814B)

+#define BIT_GET_WMAC_CSI_RATE_8814B(x) (((x) >> BIT_SHIFT_WMAC_CSI_RATE_8814B) & BIT_MASK_WMAC_CSI_RATE_8814B)
+
 
 
 #define BIT_SHIFT_WMAC_RESP_TXRATE_8814B 16
 #define BIT_MASK_WMAC_RESP_TXRATE_8814B 0xff
 #define BIT_WMAC_RESP_TXRATE_8814B(x) (((x) & BIT_MASK_WMAC_RESP_TXRATE_8814B) << BIT_SHIFT_WMAC_RESP_TXRATE_8814B)
-#define BIT_GET_WMAC_RESP_TXRATE_8814B(x) (((x) >> BIT_SHIFT_WMAC_RESP_TXRATE_8814B) & BIT_MASK_WMAC_RESP_TXRATE_8814B)

+#define BIT_GET_WMAC_RESP_TXRATE_8814B(x) (((x) >> BIT_SHIFT_WMAC_RESP_TXRATE_8814B) & BIT_MASK_WMAC_RESP_TXRATE_8814B)
+
 
 #define BIT_CSI_FORCE_RATE_EN_8814B BIT(15)
 
 #define BIT_SHIFT_CSI_RSC_8814B 13
 #define BIT_MASK_CSI_RSC_8814B 0x3
 #define BIT_CSI_RSC_8814B(x) (((x) & BIT_MASK_CSI_RSC_8814B) << BIT_SHIFT_CSI_RSC_8814B)
-#define BIT_GET_CSI_RSC_8814B(x) (((x) >> BIT_SHIFT_CSI_RSC_8814B) & BIT_MASK_CSI_RSC_8814B)

+#define BIT_GET_CSI_RSC_8814B(x) (((x) >> BIT_SHIFT_CSI_RSC_8814B) & BIT_MASK_CSI_RSC_8814B)
+
 
 #define BIT_CSI_GID_SEL_8814B BIT(12)
 #define BIT_RDCSIMD_FLAG_TRIG_SEL_8814B BIT(11)
@@ -8914,7 +9792,8 @@
 #define BIT_SHIFT_BBPSF_ERRTHR_8814B 0
 #define BIT_MASK_BBPSF_ERRTHR_8814B 0x7
 #define BIT_BBPSF_ERRTHR_8814B(x) (((x) & BIT_MASK_BBPSF_ERRTHR_8814B) << BIT_SHIFT_BBPSF_ERRTHR_8814B)
-#define BIT_GET_BBPSF_ERRTHR_8814B(x) (((x) >> BIT_SHIFT_BBPSF_ERRTHR_8814B) & BIT_MASK_BBPSF_ERRTHR_8814B)

+#define BIT_GET_BBPSF_ERRTHR_8814B(x) (((x) >> BIT_SHIFT_BBPSF_ERRTHR_8814B) & BIT_MASK_BBPSF_ERRTHR_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -8926,7 +9805,8 @@
 #define BIT_SHIFT_P2P_OUI_TYPE_8814B 0
 #define BIT_MASK_P2P_OUI_TYPE_8814B 0xff
 #define BIT_P2P_OUI_TYPE_8814B(x) (((x) & BIT_MASK_P2P_OUI_TYPE_8814B) << BIT_SHIFT_P2P_OUI_TYPE_8814B)
-#define BIT_GET_P2P_OUI_TYPE_8814B(x) (((x) >> BIT_SHIFT_P2P_OUI_TYPE_8814B) & BIT_MASK_P2P_OUI_TYPE_8814B)

+#define BIT_GET_P2P_OUI_TYPE_8814B(x) (((x) >> BIT_SHIFT_P2P_OUI_TYPE_8814B) & BIT_MASK_P2P_OUI_TYPE_8814B)
+
 
 
 /* 2 REG_ASSOCIATED_BFMER0_INFO_8814B (ASSOCIATED BEAMFORMER0 INFO REGISTER) */
@@ -8934,13 +9814,15 @@
 #define BIT_SHIFT_R_WMAC_TXCSI_AID0_8814B (48 & CPU_OPT_WIDTH)
 #define BIT_MASK_R_WMAC_TXCSI_AID0_8814B 0x1ff
 #define BIT_R_WMAC_TXCSI_AID0_8814B(x) (((x) & BIT_MASK_R_WMAC_TXCSI_AID0_8814B) << BIT_SHIFT_R_WMAC_TXCSI_AID0_8814B)
-#define BIT_GET_R_WMAC_TXCSI_AID0_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID0_8814B) & BIT_MASK_R_WMAC_TXCSI_AID0_8814B)

+#define BIT_GET_R_WMAC_TXCSI_AID0_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID0_8814B) & BIT_MASK_R_WMAC_TXCSI_AID0_8814B)
+
 
 
 #define BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8814B 0
 #define BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8814B 0xffffffffffffL
 #define BIT_R_WMAC_SOUNDING_RXADD_R0_8814B(x) (((x) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8814B) << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8814B)
-#define BIT_GET_R_WMAC_SOUNDING_RXADD_R0_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8814B) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8814B)

+#define BIT_GET_R_WMAC_SOUNDING_RXADD_R0_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8814B) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8814B)
+
 
 
 /* 2 REG_ASSOCIATED_BFMER1_INFO_8814B (ASSOCIATED BEAMFORMER1 INFO REGISTER) */
@@ -8948,13 +9830,15 @@
 #define BIT_SHIFT_R_WMAC_TXCSI_AID1_8814B (48 & CPU_OPT_WIDTH)
 #define BIT_MASK_R_WMAC_TXCSI_AID1_8814B 0x1ff
 #define BIT_R_WMAC_TXCSI_AID1_8814B(x) (((x) & BIT_MASK_R_WMAC_TXCSI_AID1_8814B) << BIT_SHIFT_R_WMAC_TXCSI_AID1_8814B)
-#define BIT_GET_R_WMAC_TXCSI_AID1_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID1_8814B) & BIT_MASK_R_WMAC_TXCSI_AID1_8814B)

+#define BIT_GET_R_WMAC_TXCSI_AID1_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID1_8814B) & BIT_MASK_R_WMAC_TXCSI_AID1_8814B)
+
 
 
 #define BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8814B 0
 #define BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8814B 0xffffffffffffL
 #define BIT_R_WMAC_SOUNDING_RXADD_R1_8814B(x) (((x) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8814B) << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8814B)
-#define BIT_GET_R_WMAC_SOUNDING_RXADD_R1_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8814B) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8814B)

+#define BIT_GET_R_WMAC_SOUNDING_RXADD_R1_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8814B) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -8972,13 +9856,15 @@
 #define BIT_SHIFT_R_WMAC_BFINFO_20M_1_8814B 16
 #define BIT_MASK_R_WMAC_BFINFO_20M_1_8814B 0xfff
 #define BIT_R_WMAC_BFINFO_20M_1_8814B(x) (((x) & BIT_MASK_R_WMAC_BFINFO_20M_1_8814B) << BIT_SHIFT_R_WMAC_BFINFO_20M_1_8814B)
-#define BIT_GET_R_WMAC_BFINFO_20M_1_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_1_8814B) & BIT_MASK_R_WMAC_BFINFO_20M_1_8814B)

+#define BIT_GET_R_WMAC_BFINFO_20M_1_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_1_8814B) & BIT_MASK_R_WMAC_BFINFO_20M_1_8814B)
+
 
 
 #define BIT_SHIFT_R_WMAC_BFINFO_20M_0_8814B 0
 #define BIT_MASK_R_WMAC_BFINFO_20M_0_8814B 0xfff
 #define BIT_R_WMAC_BFINFO_20M_0_8814B(x) (((x) & BIT_MASK_R_WMAC_BFINFO_20M_0_8814B) << BIT_SHIFT_R_WMAC_BFINFO_20M_0_8814B)
-#define BIT_GET_R_WMAC_BFINFO_20M_0_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_0_8814B) & BIT_MASK_R_WMAC_BFINFO_20M_0_8814B)

+#define BIT_GET_R_WMAC_BFINFO_20M_0_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_0_8814B) & BIT_MASK_R_WMAC_BFINFO_20M_0_8814B)
+
 
 
 /* 2 REG_TX_CSI_RPT_PARAM_BW40_8814B (TX CSI REPORT PARAMETER_BW40 REGISTER) */
@@ -8986,7 +9872,8 @@
 #define BIT_SHIFT_WMAC_RESP_ANTCD_8814B 0
 #define BIT_MASK_WMAC_RESP_ANTCD_8814B 0xf
 #define BIT_WMAC_RESP_ANTCD_8814B(x) (((x) & BIT_MASK_WMAC_RESP_ANTCD_8814B) << BIT_SHIFT_WMAC_RESP_ANTCD_8814B)
-#define BIT_GET_WMAC_RESP_ANTCD_8814B(x) (((x) >> BIT_SHIFT_WMAC_RESP_ANTCD_8814B) & BIT_MASK_WMAC_RESP_ANTCD_8814B)

+#define BIT_GET_WMAC_RESP_ANTCD_8814B(x) (((x) >> BIT_SHIFT_WMAC_RESP_ANTCD_8814B) & BIT_MASK_WMAC_RESP_ANTCD_8814B)
+
 
 
 /* 2 REG_TX_CSI_RPT_PARAM_BW80_8814B (TX CSI REPORT PARAMETER_BW80 REGISTER) */
@@ -8996,13 +9883,15 @@
 #define BIT_SHIFT_DTIM_CNT2_8814B 24
 #define BIT_MASK_DTIM_CNT2_8814B 0xff
 #define BIT_DTIM_CNT2_8814B(x) (((x) & BIT_MASK_DTIM_CNT2_8814B) << BIT_SHIFT_DTIM_CNT2_8814B)
-#define BIT_GET_DTIM_CNT2_8814B(x) (((x) >> BIT_SHIFT_DTIM_CNT2_8814B) & BIT_MASK_DTIM_CNT2_8814B)

+#define BIT_GET_DTIM_CNT2_8814B(x) (((x) >> BIT_SHIFT_DTIM_CNT2_8814B) & BIT_MASK_DTIM_CNT2_8814B)
+
 
 
 #define BIT_SHIFT_DTIM_PERIOD2_8814B 16
 #define BIT_MASK_DTIM_PERIOD2_8814B 0xff
 #define BIT_DTIM_PERIOD2_8814B(x) (((x) & BIT_MASK_DTIM_PERIOD2_8814B) << BIT_SHIFT_DTIM_PERIOD2_8814B)
-#define BIT_GET_DTIM_PERIOD2_8814B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD2_8814B) & BIT_MASK_DTIM_PERIOD2_8814B)

+#define BIT_GET_DTIM_PERIOD2_8814B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD2_8814B) & BIT_MASK_DTIM_PERIOD2_8814B)
+
 
 #define BIT_DTIM2_8814B BIT(15)
 #define BIT_TIM2_8814B BIT(14)
@@ -9010,7 +9899,8 @@
 #define BIT_SHIFT_PS_AID_2_8814B 0
 #define BIT_MASK_PS_AID_2_8814B 0x7ff
 #define BIT_PS_AID_2_8814B(x) (((x) & BIT_MASK_PS_AID_2_8814B) << BIT_SHIFT_PS_AID_2_8814B)
-#define BIT_GET_PS_AID_2_8814B(x) (((x) >> BIT_SHIFT_PS_AID_2_8814B) & BIT_MASK_PS_AID_2_8814B)

+#define BIT_GET_PS_AID_2_8814B(x) (((x) >> BIT_SHIFT_PS_AID_2_8814B) & BIT_MASK_PS_AID_2_8814B)
+
 
 
 /* 2 REG_BCN_PSR_RPT3_8814B (BEACON PARSER REPORT REGISTER3) */
@@ -9018,13 +9908,15 @@
 #define BIT_SHIFT_DTIM_CNT3_8814B 24
 #define BIT_MASK_DTIM_CNT3_8814B 0xff
 #define BIT_DTIM_CNT3_8814B(x) (((x) & BIT_MASK_DTIM_CNT3_8814B) << BIT_SHIFT_DTIM_CNT3_8814B)
-#define BIT_GET_DTIM_CNT3_8814B(x) (((x) >> BIT_SHIFT_DTIM_CNT3_8814B) & BIT_MASK_DTIM_CNT3_8814B)

+#define BIT_GET_DTIM_CNT3_8814B(x) (((x) >> BIT_SHIFT_DTIM_CNT3_8814B) & BIT_MASK_DTIM_CNT3_8814B)
+
 
 
 #define BIT_SHIFT_DTIM_PERIOD3_8814B 16
 #define BIT_MASK_DTIM_PERIOD3_8814B 0xff
 #define BIT_DTIM_PERIOD3_8814B(x) (((x) & BIT_MASK_DTIM_PERIOD3_8814B) << BIT_SHIFT_DTIM_PERIOD3_8814B)
-#define BIT_GET_DTIM_PERIOD3_8814B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD3_8814B) & BIT_MASK_DTIM_PERIOD3_8814B)

+#define BIT_GET_DTIM_PERIOD3_8814B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD3_8814B) & BIT_MASK_DTIM_PERIOD3_8814B)
+
 
 #define BIT_DTIM3_8814B BIT(15)
 #define BIT_TIM3_8814B BIT(14)
@@ -9032,7 +9924,8 @@
 #define BIT_SHIFT_PS_AID_3_8814B 0
 #define BIT_MASK_PS_AID_3_8814B 0x7ff
 #define BIT_PS_AID_3_8814B(x) (((x) & BIT_MASK_PS_AID_3_8814B) << BIT_SHIFT_PS_AID_3_8814B)
-#define BIT_GET_PS_AID_3_8814B(x) (((x) >> BIT_SHIFT_PS_AID_3_8814B) & BIT_MASK_PS_AID_3_8814B)

+#define BIT_GET_PS_AID_3_8814B(x) (((x) >> BIT_SHIFT_PS_AID_3_8814B) & BIT_MASK_PS_AID_3_8814B)
+
 
 
 /* 2 REG_BCN_PSR_RPT4_8814B (BEACON PARSER REPORT REGISTER4) */
@@ -9040,13 +9933,15 @@
 #define BIT_SHIFT_DTIM_CNT4_8814B 24
 #define BIT_MASK_DTIM_CNT4_8814B 0xff
 #define BIT_DTIM_CNT4_8814B(x) (((x) & BIT_MASK_DTIM_CNT4_8814B) << BIT_SHIFT_DTIM_CNT4_8814B)
-#define BIT_GET_DTIM_CNT4_8814B(x) (((x) >> BIT_SHIFT_DTIM_CNT4_8814B) & BIT_MASK_DTIM_CNT4_8814B)

+#define BIT_GET_DTIM_CNT4_8814B(x) (((x) >> BIT_SHIFT_DTIM_CNT4_8814B) & BIT_MASK_DTIM_CNT4_8814B)
+
 
 
 #define BIT_SHIFT_DTIM_PERIOD4_8814B 16
 #define BIT_MASK_DTIM_PERIOD4_8814B 0xff
 #define BIT_DTIM_PERIOD4_8814B(x) (((x) & BIT_MASK_DTIM_PERIOD4_8814B) << BIT_SHIFT_DTIM_PERIOD4_8814B)
-#define BIT_GET_DTIM_PERIOD4_8814B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD4_8814B) & BIT_MASK_DTIM_PERIOD4_8814B)

+#define BIT_GET_DTIM_PERIOD4_8814B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD4_8814B) & BIT_MASK_DTIM_PERIOD4_8814B)
+
 
 #define BIT_DTIM4_8814B BIT(15)
 #define BIT_TIM4_8814B BIT(14)
@@ -9054,7 +9949,8 @@
 #define BIT_SHIFT_PS_AID_4_8814B 0
 #define BIT_MASK_PS_AID_4_8814B 0x7ff
 #define BIT_PS_AID_4_8814B(x) (((x) & BIT_MASK_PS_AID_4_8814B) << BIT_SHIFT_PS_AID_4_8814B)
-#define BIT_GET_PS_AID_4_8814B(x) (((x) >> BIT_SHIFT_PS_AID_4_8814B) & BIT_MASK_PS_AID_4_8814B)

+#define BIT_GET_PS_AID_4_8814B(x) (((x) >> BIT_SHIFT_PS_AID_4_8814B) & BIT_MASK_PS_AID_4_8814B)
+
 
 
 /* 2 REG_A1_ADDR_MASK_8814B (A1 ADDR MASK REGISTER) */
@@ -9062,7 +9958,8 @@
 #define BIT_SHIFT_A1_ADDR_MASK_8814B 0
 #define BIT_MASK_A1_ADDR_MASK_8814B 0xffffffffL
 #define BIT_A1_ADDR_MASK_8814B(x) (((x) & BIT_MASK_A1_ADDR_MASK_8814B) << BIT_SHIFT_A1_ADDR_MASK_8814B)
-#define BIT_GET_A1_ADDR_MASK_8814B(x) (((x) >> BIT_SHIFT_A1_ADDR_MASK_8814B) & BIT_MASK_A1_ADDR_MASK_8814B)

+#define BIT_GET_A1_ADDR_MASK_8814B(x) (((x) >> BIT_SHIFT_A1_ADDR_MASK_8814B) & BIT_MASK_A1_ADDR_MASK_8814B)
+
 
 
 /* 2 REG_MACID2_8814B (MAC ID2 REGISTER) */
@@ -9070,7 +9967,8 @@
 #define BIT_SHIFT_MACID2_8814B 0
 #define BIT_MASK_MACID2_8814B 0xffffffffffffL
 #define BIT_MACID2_8814B(x) (((x) & BIT_MASK_MACID2_8814B) << BIT_SHIFT_MACID2_8814B)
-#define BIT_GET_MACID2_8814B(x) (((x) >> BIT_SHIFT_MACID2_8814B) & BIT_MASK_MACID2_8814B)

+#define BIT_GET_MACID2_8814B(x) (((x) >> BIT_SHIFT_MACID2_8814B) & BIT_MASK_MACID2_8814B)
+
 
 
 /* 2 REG_BSSID2_8814B (BSSID2 REGISTER) */
@@ -9078,7 +9976,8 @@
 #define BIT_SHIFT_BSSID2_8814B 0
 #define BIT_MASK_BSSID2_8814B 0xffffffffffffL
 #define BIT_BSSID2_8814B(x) (((x) & BIT_MASK_BSSID2_8814B) << BIT_SHIFT_BSSID2_8814B)
-#define BIT_GET_BSSID2_8814B(x) (((x) >> BIT_SHIFT_BSSID2_8814B) & BIT_MASK_BSSID2_8814B)

+#define BIT_GET_BSSID2_8814B(x) (((x) >> BIT_SHIFT_BSSID2_8814B) & BIT_MASK_BSSID2_8814B)
+
 
 
 /* 2 REG_MACID3_8814B (MAC ID3 REGISTER) */
@@ -9086,7 +9985,8 @@
 #define BIT_SHIFT_MACID3_8814B 0
 #define BIT_MASK_MACID3_8814B 0xffffffffffffL
 #define BIT_MACID3_8814B(x) (((x) & BIT_MASK_MACID3_8814B) << BIT_SHIFT_MACID3_8814B)
-#define BIT_GET_MACID3_8814B(x) (((x) >> BIT_SHIFT_MACID3_8814B) & BIT_MASK_MACID3_8814B)

+#define BIT_GET_MACID3_8814B(x) (((x) >> BIT_SHIFT_MACID3_8814B) & BIT_MASK_MACID3_8814B)
+
 
 
 /* 2 REG_BSSID3_8814B (BSSID3 REGISTER) */
@@ -9094,7 +9994,8 @@
 #define BIT_SHIFT_BSSID3_8814B 0
 #define BIT_MASK_BSSID3_8814B 0xffffffffffffL
 #define BIT_BSSID3_8814B(x) (((x) & BIT_MASK_BSSID3_8814B) << BIT_SHIFT_BSSID3_8814B)
-#define BIT_GET_BSSID3_8814B(x) (((x) >> BIT_SHIFT_BSSID3_8814B) & BIT_MASK_BSSID3_8814B)

+#define BIT_GET_BSSID3_8814B(x) (((x) >> BIT_SHIFT_BSSID3_8814B) & BIT_MASK_BSSID3_8814B)
+
 
 
 /* 2 REG_MACID4_8814B (MAC ID4 REGISTER) */
@@ -9102,7 +10003,8 @@
 #define BIT_SHIFT_MACID4_8814B 0
 #define BIT_MASK_MACID4_8814B 0xffffffffffffL
 #define BIT_MACID4_8814B(x) (((x) & BIT_MASK_MACID4_8814B) << BIT_SHIFT_MACID4_8814B)
-#define BIT_GET_MACID4_8814B(x) (((x) >> BIT_SHIFT_MACID4_8814B) & BIT_MASK_MACID4_8814B)

+#define BIT_GET_MACID4_8814B(x) (((x) >> BIT_SHIFT_MACID4_8814B) & BIT_MASK_MACID4_8814B)
+
 
 
 /* 2 REG_BSSID4_8814B (BSSID4 REGISTER) */
@@ -9110,7 +10012,8 @@
 #define BIT_SHIFT_BSSID4_8814B 0
 #define BIT_MASK_BSSID4_8814B 0xffffffffffffL
 #define BIT_BSSID4_8814B(x) (((x) & BIT_MASK_BSSID4_8814B) << BIT_SHIFT_BSSID4_8814B)
-#define BIT_GET_BSSID4_8814B(x) (((x) >> BIT_SHIFT_BSSID4_8814B) & BIT_MASK_BSSID4_8814B)

+#define BIT_GET_BSSID4_8814B(x) (((x) >> BIT_SHIFT_BSSID4_8814B) & BIT_MASK_BSSID4_8814B)
+
 
 
 /* 2 REG_NOA_REPORT_8814B */
@@ -9132,13 +10035,15 @@
 #define BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8814B 4
 #define BIT_MASK_WMAC_TXMU_ACKPOLICY_8814B 0x3
 #define BIT_WMAC_TXMU_ACKPOLICY_8814B(x) (((x) & BIT_MASK_WMAC_TXMU_ACKPOLICY_8814B) << BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8814B)
-#define BIT_GET_WMAC_TXMU_ACKPOLICY_8814B(x) (((x) >> BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8814B) & BIT_MASK_WMAC_TXMU_ACKPOLICY_8814B)

+#define BIT_GET_WMAC_TXMU_ACKPOLICY_8814B(x) (((x) >> BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8814B) & BIT_MASK_WMAC_TXMU_ACKPOLICY_8814B)
+
 
 
 #define BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8814B 1
 #define BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8814B 0x7
 #define BIT_WMAC_MU_BFEE_PORT_SEL_8814B(x) (((x) & BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8814B) << BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8814B)
-#define BIT_GET_WMAC_MU_BFEE_PORT_SEL_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8814B) & BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8814B)

+#define BIT_GET_WMAC_MU_BFEE_PORT_SEL_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8814B) & BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8814B)
+
 
 #define BIT_WMAC_MU_BFEE_DIS_8814B BIT(0)
 
@@ -9147,7 +10052,8 @@
 #define BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8814B 0
 #define BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8814B 0xff
 #define BIT_WMAC_PAUSE_BB_CLR_TH_8814B(x) (((x) & BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8814B) << BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8814B)
-#define BIT_GET_WMAC_PAUSE_BB_CLR_TH_8814B(x) (((x) >> BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8814B) & BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8814B)

+#define BIT_GET_WMAC_PAUSE_BB_CLR_TH_8814B(x) (((x) >> BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8814B) & BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8814B)
+
 
 
 /* 2 REG_WMAC_MU_ARB_8814B */
@@ -9157,7 +10063,8 @@
 #define BIT_SHIFT_WMAC_ARB_SW_STATE_8814B 0
 #define BIT_MASK_WMAC_ARB_SW_STATE_8814B 0x3f
 #define BIT_WMAC_ARB_SW_STATE_8814B(x) (((x) & BIT_MASK_WMAC_ARB_SW_STATE_8814B) << BIT_SHIFT_WMAC_ARB_SW_STATE_8814B)
-#define BIT_GET_WMAC_ARB_SW_STATE_8814B(x) (((x) >> BIT_SHIFT_WMAC_ARB_SW_STATE_8814B) & BIT_MASK_WMAC_ARB_SW_STATE_8814B)

+#define BIT_GET_WMAC_ARB_SW_STATE_8814B(x) (((x) >> BIT_SHIFT_WMAC_ARB_SW_STATE_8814B) & BIT_MASK_WMAC_ARB_SW_STATE_8814B)
+
 
 
 /* 2 REG_WMAC_MU_OPTION_8814B */
@@ -9165,13 +10072,15 @@
 #define BIT_SHIFT_WMAC_MU_DBGSEL_8814B 5
 #define BIT_MASK_WMAC_MU_DBGSEL_8814B 0x3
 #define BIT_WMAC_MU_DBGSEL_8814B(x) (((x) & BIT_MASK_WMAC_MU_DBGSEL_8814B) << BIT_SHIFT_WMAC_MU_DBGSEL_8814B)
-#define BIT_GET_WMAC_MU_DBGSEL_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_DBGSEL_8814B) & BIT_MASK_WMAC_MU_DBGSEL_8814B)

+#define BIT_GET_WMAC_MU_DBGSEL_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_DBGSEL_8814B) & BIT_MASK_WMAC_MU_DBGSEL_8814B)
+
 
 
 #define BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8814B 0
 #define BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8814B 0x1f
 #define BIT_WMAC_MU_CPRD_TIMEOUT_8814B(x) (((x) & BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8814B) << BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8814B)
-#define BIT_GET_WMAC_MU_CPRD_TIMEOUT_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8814B) & BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8814B)

+#define BIT_GET_WMAC_MU_CPRD_TIMEOUT_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8814B) & BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8814B)
+
 
 
 /* 2 REG_WMAC_MU_BF_CTL_8814B */
@@ -9181,13 +10090,15 @@
 #define BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8814B 12
 #define BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8814B 0x3
 #define BIT_WMAC_MU_BFRPTSEG_SEL_8814B(x) (((x) & BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8814B) << BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8814B)
-#define BIT_GET_WMAC_MU_BFRPTSEG_SEL_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8814B) & BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8814B)

+#define BIT_GET_WMAC_MU_BFRPTSEG_SEL_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8814B) & BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8814B)
+
 
 
 #define BIT_SHIFT_WMAC_MU_BF_MYAID_8814B 0
 #define BIT_MASK_WMAC_MU_BF_MYAID_8814B 0xfff
 #define BIT_WMAC_MU_BF_MYAID_8814B(x) (((x) & BIT_MASK_WMAC_MU_BF_MYAID_8814B) << BIT_SHIFT_WMAC_MU_BF_MYAID_8814B)
-#define BIT_GET_WMAC_MU_BF_MYAID_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_BF_MYAID_8814B) & BIT_MASK_WMAC_MU_BF_MYAID_8814B)

+#define BIT_GET_WMAC_MU_BF_MYAID_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_BF_MYAID_8814B) & BIT_MASK_WMAC_MU_BF_MYAID_8814B)
+
 
 
 /* 2 REG_WMAC_MU_BIT_BFRPT_PARA_8814B */
@@ -9195,13 +10106,15 @@
 #define BIT_SHIFT_BFRPT_PARA_USERID_SEL_8814B 12
 #define BIT_MASK_BFRPT_PARA_USERID_SEL_8814B 0x7
 #define BIT_BFRPT_PARA_USERID_SEL_8814B(x) (((x) & BIT_MASK_BFRPT_PARA_USERID_SEL_8814B) << BIT_SHIFT_BFRPT_PARA_USERID_SEL_8814B)
-#define BIT_GET_BFRPT_PARA_USERID_SEL_8814B(x) (((x) >> BIT_SHIFT_BFRPT_PARA_USERID_SEL_8814B) & BIT_MASK_BFRPT_PARA_USERID_SEL_8814B)

+#define BIT_GET_BFRPT_PARA_USERID_SEL_8814B(x) (((x) >> BIT_SHIFT_BFRPT_PARA_USERID_SEL_8814B) & BIT_MASK_BFRPT_PARA_USERID_SEL_8814B)
+
 
 
 #define BIT_SHIFT_BFRPT_PARA_8814B 0
 #define BIT_MASK_BFRPT_PARA_8814B 0xfff
 #define BIT_BFRPT_PARA_8814B(x) (((x) & BIT_MASK_BFRPT_PARA_8814B) << BIT_SHIFT_BFRPT_PARA_8814B)
-#define BIT_GET_BFRPT_PARA_8814B(x) (((x) >> BIT_SHIFT_BFRPT_PARA_8814B) & BIT_MASK_BFRPT_PARA_8814B)

+#define BIT_GET_BFRPT_PARA_8814B(x) (((x) >> BIT_SHIFT_BFRPT_PARA_8814B) & BIT_MASK_BFRPT_PARA_8814B)
+
 
 
 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE2_8814B */
@@ -9211,7 +10124,8 @@
 #define BIT_SHIFT_WMAC_MU_BFEE2_AID_8814B 0
 #define BIT_MASK_WMAC_MU_BFEE2_AID_8814B 0x1ff
 #define BIT_WMAC_MU_BFEE2_AID_8814B(x) (((x) & BIT_MASK_WMAC_MU_BFEE2_AID_8814B) << BIT_SHIFT_WMAC_MU_BFEE2_AID_8814B)
-#define BIT_GET_WMAC_MU_BFEE2_AID_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE2_AID_8814B) & BIT_MASK_WMAC_MU_BFEE2_AID_8814B)

+#define BIT_GET_WMAC_MU_BFEE2_AID_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE2_AID_8814B) & BIT_MASK_WMAC_MU_BFEE2_AID_8814B)
+
 
 
 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE3_8814B */
@@ -9221,7 +10135,8 @@
 #define BIT_SHIFT_WMAC_MU_BFEE3_AID_8814B 0
 #define BIT_MASK_WMAC_MU_BFEE3_AID_8814B 0x1ff
 #define BIT_WMAC_MU_BFEE3_AID_8814B(x) (((x) & BIT_MASK_WMAC_MU_BFEE3_AID_8814B) << BIT_SHIFT_WMAC_MU_BFEE3_AID_8814B)
-#define BIT_GET_WMAC_MU_BFEE3_AID_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE3_AID_8814B) & BIT_MASK_WMAC_MU_BFEE3_AID_8814B)

+#define BIT_GET_WMAC_MU_BFEE3_AID_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE3_AID_8814B) & BIT_MASK_WMAC_MU_BFEE3_AID_8814B)
+
 
 
 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE4_8814B */
@@ -9231,7 +10146,8 @@
 #define BIT_SHIFT_WMAC_MU_BFEE4_AID_8814B 0
 #define BIT_MASK_WMAC_MU_BFEE4_AID_8814B 0x1ff
 #define BIT_WMAC_MU_BFEE4_AID_8814B(x) (((x) & BIT_MASK_WMAC_MU_BFEE4_AID_8814B) << BIT_SHIFT_WMAC_MU_BFEE4_AID_8814B)
-#define BIT_GET_WMAC_MU_BFEE4_AID_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE4_AID_8814B) & BIT_MASK_WMAC_MU_BFEE4_AID_8814B)

+#define BIT_GET_WMAC_MU_BFEE4_AID_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE4_AID_8814B) & BIT_MASK_WMAC_MU_BFEE4_AID_8814B)
+
 
 
 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE5_8814B */
@@ -9241,7 +10157,8 @@
 #define BIT_SHIFT_WMAC_MU_BFEE5_AID_8814B 0
 #define BIT_MASK_WMAC_MU_BFEE5_AID_8814B 0x1ff
 #define BIT_WMAC_MU_BFEE5_AID_8814B(x) (((x) & BIT_MASK_WMAC_MU_BFEE5_AID_8814B) << BIT_SHIFT_WMAC_MU_BFEE5_AID_8814B)
-#define BIT_GET_WMAC_MU_BFEE5_AID_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE5_AID_8814B) & BIT_MASK_WMAC_MU_BFEE5_AID_8814B)

+#define BIT_GET_WMAC_MU_BFEE5_AID_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE5_AID_8814B) & BIT_MASK_WMAC_MU_BFEE5_AID_8814B)
+
 
 
 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE6_8814B */
@@ -9251,7 +10168,8 @@
 #define BIT_SHIFT_WMAC_MU_BFEE6_AID_8814B 0
 #define BIT_MASK_WMAC_MU_BFEE6_AID_8814B 0x1ff
 #define BIT_WMAC_MU_BFEE6_AID_8814B(x) (((x) & BIT_MASK_WMAC_MU_BFEE6_AID_8814B) << BIT_SHIFT_WMAC_MU_BFEE6_AID_8814B)
-#define BIT_GET_WMAC_MU_BFEE6_AID_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE6_AID_8814B) & BIT_MASK_WMAC_MU_BFEE6_AID_8814B)

+#define BIT_GET_WMAC_MU_BFEE6_AID_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE6_AID_8814B) & BIT_MASK_WMAC_MU_BFEE6_AID_8814B)
+
 
 
 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE7_8814B */
@@ -9261,7 +10179,8 @@
 #define BIT_SHIFT_WMAC_MU_BFEE7_AID_8814B 0
 #define BIT_MASK_WMAC_MU_BFEE7_AID_8814B 0x1ff
 #define BIT_WMAC_MU_BFEE7_AID_8814B(x) (((x) & BIT_MASK_WMAC_MU_BFEE7_AID_8814B) << BIT_SHIFT_WMAC_MU_BFEE7_AID_8814B)
-#define BIT_GET_WMAC_MU_BFEE7_AID_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE7_AID_8814B) & BIT_MASK_WMAC_MU_BFEE7_AID_8814B)

+#define BIT_GET_WMAC_MU_BFEE7_AID_8814B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE7_AID_8814B) & BIT_MASK_WMAC_MU_BFEE7_AID_8814B)
+
 
 
 /* 2 REG_WMAC_BB_STOP_RX_COUNTER_8814B */
@@ -9270,19 +10189,22 @@
 #define BIT_SHIFT_ABORT_RX_VBON_COUNTER_8814B 16
 #define BIT_MASK_ABORT_RX_VBON_COUNTER_8814B 0xff
 #define BIT_ABORT_RX_VBON_COUNTER_8814B(x) (((x) & BIT_MASK_ABORT_RX_VBON_COUNTER_8814B) << BIT_SHIFT_ABORT_RX_VBON_COUNTER_8814B)
-#define BIT_GET_ABORT_RX_VBON_COUNTER_8814B(x) (((x) >> BIT_SHIFT_ABORT_RX_VBON_COUNTER_8814B) & BIT_MASK_ABORT_RX_VBON_COUNTER_8814B)

+#define BIT_GET_ABORT_RX_VBON_COUNTER_8814B(x) (((x) >> BIT_SHIFT_ABORT_RX_VBON_COUNTER_8814B) & BIT_MASK_ABORT_RX_VBON_COUNTER_8814B)
+
 
 
 #define BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8814B 8
 #define BIT_MASK_ABORT_RX_RDRDY_COUNTER_8814B 0xff
 #define BIT_ABORT_RX_RDRDY_COUNTER_8814B(x) (((x) & BIT_MASK_ABORT_RX_RDRDY_COUNTER_8814B) << BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8814B)
-#define BIT_GET_ABORT_RX_RDRDY_COUNTER_8814B(x) (((x) >> BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8814B) & BIT_MASK_ABORT_RX_RDRDY_COUNTER_8814B)

+#define BIT_GET_ABORT_RX_RDRDY_COUNTER_8814B(x) (((x) >> BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8814B) & BIT_MASK_ABORT_RX_RDRDY_COUNTER_8814B)
+
 
 
 #define BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8814B 0
 #define BIT_MASK_VBON_EARLY_FALLING_COUNTER_8814B 0xff
 #define BIT_VBON_EARLY_FALLING_COUNTER_8814B(x) (((x) & BIT_MASK_VBON_EARLY_FALLING_COUNTER_8814B) << BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8814B)
-#define BIT_GET_VBON_EARLY_FALLING_COUNTER_8814B(x) (((x) >> BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8814B) & BIT_MASK_VBON_EARLY_FALLING_COUNTER_8814B)

+#define BIT_GET_VBON_EARLY_FALLING_COUNTER_8814B(x) (((x) >> BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8814B) & BIT_MASK_VBON_EARLY_FALLING_COUNTER_8814B)
+
 
 
 /* 2 REG_WMAC_PLCP_MONITOR_8814B */
@@ -9291,19 +10213,22 @@
 #define BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8814B 28
 #define BIT_MASK_WMAC_PLCP_RDSIG_SEL_8814B 0x7
 #define BIT_WMAC_PLCP_RDSIG_SEL_8814B(x) (((x) & BIT_MASK_WMAC_PLCP_RDSIG_SEL_8814B) << BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8814B)
-#define BIT_GET_WMAC_PLCP_RDSIG_SEL_8814B(x) (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8814B) & BIT_MASK_WMAC_PLCP_RDSIG_SEL_8814B)

+#define BIT_GET_WMAC_PLCP_RDSIG_SEL_8814B(x) (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8814B) & BIT_MASK_WMAC_PLCP_RDSIG_SEL_8814B)
+
 
 
 #define BIT_SHIFT_WMAC_RATE_IDX_8814B 24
 #define BIT_MASK_WMAC_RATE_IDX_8814B 0xf
 #define BIT_WMAC_RATE_IDX_8814B(x) (((x) & BIT_MASK_WMAC_RATE_IDX_8814B) << BIT_SHIFT_WMAC_RATE_IDX_8814B)
-#define BIT_GET_WMAC_RATE_IDX_8814B(x) (((x) >> BIT_SHIFT_WMAC_RATE_IDX_8814B) & BIT_MASK_WMAC_RATE_IDX_8814B)

+#define BIT_GET_WMAC_RATE_IDX_8814B(x) (((x) >> BIT_SHIFT_WMAC_RATE_IDX_8814B) & BIT_MASK_WMAC_RATE_IDX_8814B)
+
 
 
 #define BIT_SHIFT_WMAC_PLCP_RDSIG_8814B 0
 #define BIT_MASK_WMAC_PLCP_RDSIG_8814B 0xffffff
 #define BIT_WMAC_PLCP_RDSIG_8814B(x) (((x) & BIT_MASK_WMAC_PLCP_RDSIG_8814B) << BIT_SHIFT_WMAC_PLCP_RDSIG_8814B)
-#define BIT_GET_WMAC_PLCP_RDSIG_8814B(x) (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_8814B) & BIT_MASK_WMAC_PLCP_RDSIG_8814B)

+#define BIT_GET_WMAC_PLCP_RDSIG_8814B(x) (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_8814B) & BIT_MASK_WMAC_PLCP_RDSIG_8814B)
+
 
 
 /* 2 REG_WMAC_PLCP_MONITOR_MUTX_8814B */
@@ -9312,7 +10237,8 @@
 #define BIT_SHIFT_WMAC_PLCP_RDSIG_8814B 0
 #define BIT_MASK_WMAC_PLCP_RDSIG_8814B 0xffffff
 #define BIT_WMAC_PLCP_RDSIG_8814B(x) (((x) & BIT_MASK_WMAC_PLCP_RDSIG_8814B) << BIT_SHIFT_WMAC_PLCP_RDSIG_8814B)
-#define BIT_GET_WMAC_PLCP_RDSIG_8814B(x) (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_8814B) & BIT_MASK_WMAC_PLCP_RDSIG_8814B)

+#define BIT_GET_WMAC_PLCP_RDSIG_8814B(x) (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_8814B) & BIT_MASK_WMAC_PLCP_RDSIG_8814B)
+
 
 
 /* 2 REG_TRANSMIT_ADDRSS_0_8814B (TA0 REGISTER) */
@@ -9320,7 +10246,8 @@
 #define BIT_SHIFT_TA0_8814B 0
 #define BIT_MASK_TA0_8814B 0xffffffffffffL
 #define BIT_TA0_8814B(x) (((x) & BIT_MASK_TA0_8814B) << BIT_SHIFT_TA0_8814B)
-#define BIT_GET_TA0_8814B(x) (((x) >> BIT_SHIFT_TA0_8814B) & BIT_MASK_TA0_8814B)

+#define BIT_GET_TA0_8814B(x) (((x) >> BIT_SHIFT_TA0_8814B) & BIT_MASK_TA0_8814B)
+
 
 
 /* 2 REG_TRANSMIT_ADDRSS_1_8814B (TA1 REGISTER) */
@@ -9328,7 +10255,8 @@
 #define BIT_SHIFT_TA1_8814B 0
 #define BIT_MASK_TA1_8814B 0xffffffffffffL
 #define BIT_TA1_8814B(x) (((x) & BIT_MASK_TA1_8814B) << BIT_SHIFT_TA1_8814B)
-#define BIT_GET_TA1_8814B(x) (((x) >> BIT_SHIFT_TA1_8814B) & BIT_MASK_TA1_8814B)

+#define BIT_GET_TA1_8814B(x) (((x) >> BIT_SHIFT_TA1_8814B) & BIT_MASK_TA1_8814B)
+
 
 
 /* 2 REG_TRANSMIT_ADDRSS_2_8814B (TA2 REGISTER) */
@@ -9336,7 +10264,8 @@
 #define BIT_SHIFT_TA2_8814B 0
 #define BIT_MASK_TA2_8814B 0xffffffffffffL
 #define BIT_TA2_8814B(x) (((x) & BIT_MASK_TA2_8814B) << BIT_SHIFT_TA2_8814B)
-#define BIT_GET_TA2_8814B(x) (((x) >> BIT_SHIFT_TA2_8814B) & BIT_MASK_TA2_8814B)

+#define BIT_GET_TA2_8814B(x) (((x) >> BIT_SHIFT_TA2_8814B) & BIT_MASK_TA2_8814B)
+
 
 
 /* 2 REG_TRANSMIT_ADDRSS_3_8814B (TA3 REGISTER) */
@@ -9344,7 +10273,8 @@
 #define BIT_SHIFT_TA3_8814B 0
 #define BIT_MASK_TA3_8814B 0xffffffffffffL
 #define BIT_TA3_8814B(x) (((x) & BIT_MASK_TA3_8814B) << BIT_SHIFT_TA3_8814B)
-#define BIT_GET_TA3_8814B(x) (((x) >> BIT_SHIFT_TA3_8814B) & BIT_MASK_TA3_8814B)

+#define BIT_GET_TA3_8814B(x) (((x) >> BIT_SHIFT_TA3_8814B) & BIT_MASK_TA3_8814B)
+
 
 
 /* 2 REG_TRANSMIT_ADDRSS_4_8814B (TA4 REGISTER) */
@@ -9352,7 +10282,8 @@
 #define BIT_SHIFT_TA4_8814B 0
 #define BIT_MASK_TA4_8814B 0xffffffffffffL
 #define BIT_TA4_8814B(x) (((x) & BIT_MASK_TA4_8814B) << BIT_SHIFT_TA4_8814B)
-#define BIT_GET_TA4_8814B(x) (((x) >> BIT_SHIFT_TA4_8814B) & BIT_MASK_TA4_8814B)

+#define BIT_GET_TA4_8814B(x) (((x) >> BIT_SHIFT_TA4_8814B) & BIT_MASK_TA4_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -9362,7 +10293,8 @@
 #define BIT_SHIFT_MACID1_0_8814B 0
 #define BIT_MASK_MACID1_0_8814B 0xffffffffL
 #define BIT_MACID1_0_8814B(x) (((x) & BIT_MASK_MACID1_0_8814B) << BIT_SHIFT_MACID1_0_8814B)
-#define BIT_GET_MACID1_0_8814B(x) (((x) >> BIT_SHIFT_MACID1_0_8814B) & BIT_MASK_MACID1_0_8814B)

+#define BIT_GET_MACID1_0_8814B(x) (((x) >> BIT_SHIFT_MACID1_0_8814B) & BIT_MASK_MACID1_0_8814B)
+
 
 
 /* 2 REG_MACID1_1_8814B */
@@ -9370,7 +10302,8 @@
 #define BIT_SHIFT_MACID1_1_8814B 0
 #define BIT_MASK_MACID1_1_8814B 0xffff
 #define BIT_MACID1_1_8814B(x) (((x) & BIT_MASK_MACID1_1_8814B) << BIT_SHIFT_MACID1_1_8814B)
-#define BIT_GET_MACID1_1_8814B(x) (((x) >> BIT_SHIFT_MACID1_1_8814B) & BIT_MASK_MACID1_1_8814B)

+#define BIT_GET_MACID1_1_8814B(x) (((x) >> BIT_SHIFT_MACID1_1_8814B) & BIT_MASK_MACID1_1_8814B)
+
 
 
 /* 2 REG_BSSID1_8814B */
@@ -9378,7 +10311,8 @@
 #define BIT_SHIFT_BSSID1_0_8814B 0
 #define BIT_MASK_BSSID1_0_8814B 0xffffffffL
 #define BIT_BSSID1_0_8814B(x) (((x) & BIT_MASK_BSSID1_0_8814B) << BIT_SHIFT_BSSID1_0_8814B)
-#define BIT_GET_BSSID1_0_8814B(x) (((x) >> BIT_SHIFT_BSSID1_0_8814B) & BIT_MASK_BSSID1_0_8814B)

+#define BIT_GET_BSSID1_0_8814B(x) (((x) >> BIT_SHIFT_BSSID1_0_8814B) & BIT_MASK_BSSID1_0_8814B)
+
 
 
 /* 2 REG_BSSID1_1_8814B */
@@ -9386,7 +10320,8 @@
 #define BIT_SHIFT_BSSID1_1_8814B 0
 #define BIT_MASK_BSSID1_1_8814B 0xffff
 #define BIT_BSSID1_1_8814B(x) (((x) & BIT_MASK_BSSID1_1_8814B) << BIT_SHIFT_BSSID1_1_8814B)
-#define BIT_GET_BSSID1_1_8814B(x) (((x) >> BIT_SHIFT_BSSID1_1_8814B) & BIT_MASK_BSSID1_1_8814B)

+#define BIT_GET_BSSID1_1_8814B(x) (((x) >> BIT_SHIFT_BSSID1_1_8814B) & BIT_MASK_BSSID1_1_8814B)
+
 
 
 /* 2 REG_BCN_PSR_RPT1_8814B */
@@ -9394,13 +10329,15 @@
 #define BIT_SHIFT_DTIM_CNT1_8814B 24
 #define BIT_MASK_DTIM_CNT1_8814B 0xff
 #define BIT_DTIM_CNT1_8814B(x) (((x) & BIT_MASK_DTIM_CNT1_8814B) << BIT_SHIFT_DTIM_CNT1_8814B)
-#define BIT_GET_DTIM_CNT1_8814B(x) (((x) >> BIT_SHIFT_DTIM_CNT1_8814B) & BIT_MASK_DTIM_CNT1_8814B)

+#define BIT_GET_DTIM_CNT1_8814B(x) (((x) >> BIT_SHIFT_DTIM_CNT1_8814B) & BIT_MASK_DTIM_CNT1_8814B)
+
 
 
 #define BIT_SHIFT_DTIM_PERIOD1_8814B 16
 #define BIT_MASK_DTIM_PERIOD1_8814B 0xff
 #define BIT_DTIM_PERIOD1_8814B(x) (((x) & BIT_MASK_DTIM_PERIOD1_8814B) << BIT_SHIFT_DTIM_PERIOD1_8814B)
-#define BIT_GET_DTIM_PERIOD1_8814B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD1_8814B) & BIT_MASK_DTIM_PERIOD1_8814B)

+#define BIT_GET_DTIM_PERIOD1_8814B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD1_8814B) & BIT_MASK_DTIM_PERIOD1_8814B)
+
 
 #define BIT_DTIM1_8814B BIT(15)
 #define BIT_TIM1_8814B BIT(14)
@@ -9408,7 +10345,8 @@
 #define BIT_SHIFT_PS_AID_1_8814B 0
 #define BIT_MASK_PS_AID_1_8814B 0x7ff
 #define BIT_PS_AID_1_8814B(x) (((x) & BIT_MASK_PS_AID_1_8814B) << BIT_SHIFT_PS_AID_1_8814B)
-#define BIT_GET_PS_AID_1_8814B(x) (((x) >> BIT_SHIFT_PS_AID_1_8814B) & BIT_MASK_PS_AID_1_8814B)

+#define BIT_GET_PS_AID_1_8814B(x) (((x) >> BIT_SHIFT_PS_AID_1_8814B) & BIT_MASK_PS_AID_1_8814B)
+
 
 
 /* 2 REG_ASSOCIATED_BFMEE_SEL_8814B */
@@ -9417,14 +10355,16 @@
 #define BIT_SHIFT_AID1_8814B 16
 #define BIT_MASK_AID1_8814B 0x1ff
 #define BIT_AID1_8814B(x) (((x) & BIT_MASK_AID1_8814B) << BIT_SHIFT_AID1_8814B)
-#define BIT_GET_AID1_8814B(x) (((x) >> BIT_SHIFT_AID1_8814B) & BIT_MASK_AID1_8814B)

+#define BIT_GET_AID1_8814B(x) (((x) >> BIT_SHIFT_AID1_8814B) & BIT_MASK_AID1_8814B)
+
 
 #define BIT_TXUSER_ID0_8814B BIT(9)
 
 #define BIT_SHIFT_AID0_8814B 0
 #define BIT_MASK_AID0_8814B 0x1ff
 #define BIT_AID0_8814B(x) (((x) & BIT_MASK_AID0_8814B) << BIT_SHIFT_AID0_8814B)
-#define BIT_GET_AID0_8814B(x) (((x) >> BIT_SHIFT_AID0_8814B) & BIT_MASK_AID0_8814B)

+#define BIT_GET_AID0_8814B(x) (((x) >> BIT_SHIFT_AID0_8814B) & BIT_MASK_AID0_8814B)
+
 
 
 /* 2 REG_SND_PTCL_CTRL_8814B */
@@ -9432,19 +10372,22 @@
 #define BIT_SHIFT_NDP_RX_STANDBY_TIMER_8814B 24
 #define BIT_MASK_NDP_RX_STANDBY_TIMER_8814B 0xff
 #define BIT_NDP_RX_STANDBY_TIMER_8814B(x) (((x) & BIT_MASK_NDP_RX_STANDBY_TIMER_8814B) << BIT_SHIFT_NDP_RX_STANDBY_TIMER_8814B)
-#define BIT_GET_NDP_RX_STANDBY_TIMER_8814B(x) (((x) >> BIT_SHIFT_NDP_RX_STANDBY_TIMER_8814B) & BIT_MASK_NDP_RX_STANDBY_TIMER_8814B)

+#define BIT_GET_NDP_RX_STANDBY_TIMER_8814B(x) (((x) >> BIT_SHIFT_NDP_RX_STANDBY_TIMER_8814B) & BIT_MASK_NDP_RX_STANDBY_TIMER_8814B)
+
 
 
 #define BIT_SHIFT_CSI_RPT_OFFSET_HT_8814B 16
 #define BIT_MASK_CSI_RPT_OFFSET_HT_8814B 0xff
 #define BIT_CSI_RPT_OFFSET_HT_8814B(x) (((x) & BIT_MASK_CSI_RPT_OFFSET_HT_8814B) << BIT_SHIFT_CSI_RPT_OFFSET_HT_8814B)
-#define BIT_GET_CSI_RPT_OFFSET_HT_8814B(x) (((x) >> BIT_SHIFT_CSI_RPT_OFFSET_HT_8814B) & BIT_MASK_CSI_RPT_OFFSET_HT_8814B)

+#define BIT_GET_CSI_RPT_OFFSET_HT_8814B(x) (((x) >> BIT_SHIFT_CSI_RPT_OFFSET_HT_8814B) & BIT_MASK_CSI_RPT_OFFSET_HT_8814B)
+
 
 
 #define BIT_SHIFT_R_WMAC_VHT_CATEGORY_8814B 8
 #define BIT_MASK_R_WMAC_VHT_CATEGORY_8814B 0xff
 #define BIT_R_WMAC_VHT_CATEGORY_8814B(x) (((x) & BIT_MASK_R_WMAC_VHT_CATEGORY_8814B) << BIT_SHIFT_R_WMAC_VHT_CATEGORY_8814B)
-#define BIT_GET_R_WMAC_VHT_CATEGORY_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_VHT_CATEGORY_8814B) & BIT_MASK_R_WMAC_VHT_CATEGORY_8814B)

+#define BIT_GET_R_WMAC_VHT_CATEGORY_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_VHT_CATEGORY_8814B) & BIT_MASK_R_WMAC_VHT_CATEGORY_8814B)
+
 
 #define BIT_R_WMAC_USE_NSTS_8814B BIT(7)
 #define BIT_R_DISABLE_CHECK_VHTSIGB_CRC_8814B BIT(6)
@@ -9465,19 +10408,22 @@
 #define BIT_SHIFT_R_WMAC_NSARP_MODEN_8814B 6
 #define BIT_MASK_R_WMAC_NSARP_MODEN_8814B 0x3
 #define BIT_R_WMAC_NSARP_MODEN_8814B(x) (((x) & BIT_MASK_R_WMAC_NSARP_MODEN_8814B) << BIT_SHIFT_R_WMAC_NSARP_MODEN_8814B)
-#define BIT_GET_R_WMAC_NSARP_MODEN_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_MODEN_8814B) & BIT_MASK_R_WMAC_NSARP_MODEN_8814B)

+#define BIT_GET_R_WMAC_NSARP_MODEN_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_MODEN_8814B) & BIT_MASK_R_WMAC_NSARP_MODEN_8814B)
+
 
 
 #define BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8814B 4
 #define BIT_MASK_R_WMAC_NSARP_RSPFTP_8814B 0x3
 #define BIT_R_WMAC_NSARP_RSPFTP_8814B(x) (((x) & BIT_MASK_R_WMAC_NSARP_RSPFTP_8814B) << BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8814B)
-#define BIT_GET_R_WMAC_NSARP_RSPFTP_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8814B) & BIT_MASK_R_WMAC_NSARP_RSPFTP_8814B)

+#define BIT_GET_R_WMAC_NSARP_RSPFTP_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8814B) & BIT_MASK_R_WMAC_NSARP_RSPFTP_8814B)
+
 
 
 #define BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8814B 0
 #define BIT_MASK_R_WMAC_NSARP_RSPSEC_8814B 0xf
 #define BIT_R_WMAC_NSARP_RSPSEC_8814B(x) (((x) & BIT_MASK_R_WMAC_NSARP_RSPSEC_8814B) << BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8814B)
-#define BIT_GET_R_WMAC_NSARP_RSPSEC_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8814B) & BIT_MASK_R_WMAC_NSARP_RSPSEC_8814B)

+#define BIT_GET_R_WMAC_NSARP_RSPSEC_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8814B) & BIT_MASK_R_WMAC_NSARP_RSPSEC_8814B)
+
 
 
 /* 2 REG_NS_ARP_INFO_8814B */
@@ -9490,19 +10436,22 @@
 #define BIT_SHIFT_EXPRSP_SECTYPE_8814B 16
 #define BIT_MASK_EXPRSP_SECTYPE_8814B 0x7
 #define BIT_EXPRSP_SECTYPE_8814B(x) (((x) & BIT_MASK_EXPRSP_SECTYPE_8814B) << BIT_SHIFT_EXPRSP_SECTYPE_8814B)
-#define BIT_GET_EXPRSP_SECTYPE_8814B(x) (((x) >> BIT_SHIFT_EXPRSP_SECTYPE_8814B) & BIT_MASK_EXPRSP_SECTYPE_8814B)

+#define BIT_GET_EXPRSP_SECTYPE_8814B(x) (((x) >> BIT_SHIFT_EXPRSP_SECTYPE_8814B) & BIT_MASK_EXPRSP_SECTYPE_8814B)
+
 
 
 #define BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8814B 8
 #define BIT_MASK_EXPRSP_CHKSM_7_TO_0_8814B 0xff
 #define BIT_EXPRSP_CHKSM_7_TO_0_8814B(x) (((x) & BIT_MASK_EXPRSP_CHKSM_7_TO_0_8814B) << BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8814B)
-#define BIT_GET_EXPRSP_CHKSM_7_TO_0_8814B(x) (((x) >> BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8814B) & BIT_MASK_EXPRSP_CHKSM_7_TO_0_8814B)

+#define BIT_GET_EXPRSP_CHKSM_7_TO_0_8814B(x) (((x) >> BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8814B) & BIT_MASK_EXPRSP_CHKSM_7_TO_0_8814B)
+
 
 
 #define BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8814B 0
 #define BIT_MASK_EXPRSP_CHKSM_15_TO_8_8814B 0xff
 #define BIT_EXPRSP_CHKSM_15_TO_8_8814B(x) (((x) & BIT_MASK_EXPRSP_CHKSM_15_TO_8_8814B) << BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8814B)
-#define BIT_GET_EXPRSP_CHKSM_15_TO_8_8814B(x) (((x) >> BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8814B) & BIT_MASK_EXPRSP_CHKSM_15_TO_8_8814B)

+#define BIT_GET_EXPRSP_CHKSM_15_TO_8_8814B(x) (((x) >> BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8814B) & BIT_MASK_EXPRSP_CHKSM_15_TO_8_8814B)
+
 
 
 /* 2 REG_BEAMFORMING_INFO_NSARP_V1_8814B */
@@ -9510,7 +10459,8 @@
 #define BIT_SHIFT_WMAC_ARPIP_8814B 0
 #define BIT_MASK_WMAC_ARPIP_8814B 0xffffffffL
 #define BIT_WMAC_ARPIP_8814B(x) (((x) & BIT_MASK_WMAC_ARPIP_8814B) << BIT_SHIFT_WMAC_ARPIP_8814B)
-#define BIT_GET_WMAC_ARPIP_8814B(x) (((x) >> BIT_SHIFT_WMAC_ARPIP_8814B) & BIT_MASK_WMAC_ARPIP_8814B)

+#define BIT_GET_WMAC_ARPIP_8814B(x) (((x) >> BIT_SHIFT_WMAC_ARPIP_8814B) & BIT_MASK_WMAC_ARPIP_8814B)
+
 
 
 /* 2 REG_BEAMFORMING_INFO_NSARP_8814B */
@@ -9518,7 +10468,8 @@
 #define BIT_SHIFT_BEAMFORMING_INFO_8814B 0
 #define BIT_MASK_BEAMFORMING_INFO_8814B 0xffffffffL
 #define BIT_BEAMFORMING_INFO_8814B(x) (((x) & BIT_MASK_BEAMFORMING_INFO_8814B) << BIT_SHIFT_BEAMFORMING_INFO_8814B)
-#define BIT_GET_BEAMFORMING_INFO_8814B(x) (((x) >> BIT_SHIFT_BEAMFORMING_INFO_8814B) & BIT_MASK_BEAMFORMING_INFO_8814B)

+#define BIT_GET_BEAMFORMING_INFO_8814B(x) (((x) >> BIT_SHIFT_BEAMFORMING_INFO_8814B) & BIT_MASK_BEAMFORMING_INFO_8814B)
+
 
 
 /* 2 REG_IPV6_8814B */
@@ -9526,7 +10477,8 @@
 #define BIT_SHIFT_R_WMAC_IPV6_MYIPAD_0_8814B 0
 #define BIT_MASK_R_WMAC_IPV6_MYIPAD_0_8814B 0xffffffffL
 #define BIT_R_WMAC_IPV6_MYIPAD_0_8814B(x) (((x) & BIT_MASK_R_WMAC_IPV6_MYIPAD_0_8814B) << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_0_8814B)
-#define BIT_GET_R_WMAC_IPV6_MYIPAD_0_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_0_8814B) & BIT_MASK_R_WMAC_IPV6_MYIPAD_0_8814B)

+#define BIT_GET_R_WMAC_IPV6_MYIPAD_0_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_0_8814B) & BIT_MASK_R_WMAC_IPV6_MYIPAD_0_8814B)
+
 
 
 /* 2 REG_IPV6_1_8814B */
@@ -9534,7 +10486,8 @@
 #define BIT_SHIFT_R_WMAC_IPV6_MYIPAD_1_8814B 0
 #define BIT_MASK_R_WMAC_IPV6_MYIPAD_1_8814B 0xffffffffL
 #define BIT_R_WMAC_IPV6_MYIPAD_1_8814B(x) (((x) & BIT_MASK_R_WMAC_IPV6_MYIPAD_1_8814B) << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_1_8814B)
-#define BIT_GET_R_WMAC_IPV6_MYIPAD_1_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_1_8814B) & BIT_MASK_R_WMAC_IPV6_MYIPAD_1_8814B)

+#define BIT_GET_R_WMAC_IPV6_MYIPAD_1_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_1_8814B) & BIT_MASK_R_WMAC_IPV6_MYIPAD_1_8814B)
+
 
 
 /* 2 REG_IPV6_2_8814B */
@@ -9542,7 +10495,8 @@
 #define BIT_SHIFT_R_WMAC_IPV6_MYIPAD_2_8814B 0
 #define BIT_MASK_R_WMAC_IPV6_MYIPAD_2_8814B 0xffffffffL
 #define BIT_R_WMAC_IPV6_MYIPAD_2_8814B(x) (((x) & BIT_MASK_R_WMAC_IPV6_MYIPAD_2_8814B) << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_2_8814B)
-#define BIT_GET_R_WMAC_IPV6_MYIPAD_2_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_2_8814B) & BIT_MASK_R_WMAC_IPV6_MYIPAD_2_8814B)

+#define BIT_GET_R_WMAC_IPV6_MYIPAD_2_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_2_8814B) & BIT_MASK_R_WMAC_IPV6_MYIPAD_2_8814B)
+
 
 
 /* 2 REG_IPV6_3_8814B */
@@ -9550,7 +10504,8 @@
 #define BIT_SHIFT_R_WMAC_IPV6_MYIPAD_3_8814B 0
 #define BIT_MASK_R_WMAC_IPV6_MYIPAD_3_8814B 0xffffffffL
 #define BIT_R_WMAC_IPV6_MYIPAD_3_8814B(x) (((x) & BIT_MASK_R_WMAC_IPV6_MYIPAD_3_8814B) << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_3_8814B)
-#define BIT_GET_R_WMAC_IPV6_MYIPAD_3_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_3_8814B) & BIT_MASK_R_WMAC_IPV6_MYIPAD_3_8814B)

+#define BIT_GET_R_WMAC_IPV6_MYIPAD_3_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_3_8814B) & BIT_MASK_R_WMAC_IPV6_MYIPAD_3_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -9566,13 +10521,15 @@
 #define BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8814B 4
 #define BIT_MASK_R_WMAC_CTX_SUBTYPE_8814B 0xf
 #define BIT_R_WMAC_CTX_SUBTYPE_8814B(x) (((x) & BIT_MASK_R_WMAC_CTX_SUBTYPE_8814B) << BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8814B)
-#define BIT_GET_R_WMAC_CTX_SUBTYPE_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8814B) & BIT_MASK_R_WMAC_CTX_SUBTYPE_8814B)

+#define BIT_GET_R_WMAC_CTX_SUBTYPE_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8814B) & BIT_MASK_R_WMAC_CTX_SUBTYPE_8814B)
+
 
 
 #define BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8814B 0
 #define BIT_MASK_R_WMAC_RTX_SUBTYPE_8814B 0xf
 #define BIT_R_WMAC_RTX_SUBTYPE_8814B(x) (((x) & BIT_MASK_R_WMAC_RTX_SUBTYPE_8814B) << BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8814B)
-#define BIT_GET_R_WMAC_RTX_SUBTYPE_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8814B) & BIT_MASK_R_WMAC_RTX_SUBTYPE_8814B)

+#define BIT_GET_R_WMAC_RTX_SUBTYPE_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8814B) & BIT_MASK_R_WMAC_RTX_SUBTYPE_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -9590,7 +10547,8 @@
 #define BIT_SHIFT_TIMER_8814B 0
 #define BIT_MASK_TIMER_8814B 0xff
 #define BIT_TIMER_8814B(x) (((x) & BIT_MASK_TIMER_8814B) << BIT_SHIFT_TIMER_8814B)
-#define BIT_GET_TIMER_8814B(x) (((x) >> BIT_SHIFT_TIMER_8814B) & BIT_MASK_TIMER_8814B)

+#define BIT_GET_TIMER_8814B(x) (((x) >> BIT_SHIFT_TIMER_8814B) & BIT_MASK_TIMER_8814B)
+
 
 
 /* 2 REG_BT_COEX_8814B */
@@ -9603,7 +10561,8 @@
 #define BIT_SHIFT_R_BT_CNT_THR_8814B 0
 #define BIT_MASK_R_BT_CNT_THR_8814B 0xff
 #define BIT_R_BT_CNT_THR_8814B(x) (((x) & BIT_MASK_R_BT_CNT_THR_8814B) << BIT_SHIFT_R_BT_CNT_THR_8814B)
-#define BIT_GET_R_BT_CNT_THR_8814B(x) (((x) >> BIT_SHIFT_R_BT_CNT_THR_8814B) & BIT_MASK_R_BT_CNT_THR_8814B)

+#define BIT_GET_R_BT_CNT_THR_8814B(x) (((x) >> BIT_SHIFT_R_BT_CNT_THR_8814B) & BIT_MASK_R_BT_CNT_THR_8814B)
+
 
 
 /* 2 REG_WLAN_ACT_MASK_CTRL_8814B */
@@ -9611,13 +10570,15 @@
 #define BIT_SHIFT_RXMYRTS_NAV_V1_8814B 8
 #define BIT_MASK_RXMYRTS_NAV_V1_8814B 0xff
 #define BIT_RXMYRTS_NAV_V1_8814B(x) (((x) & BIT_MASK_RXMYRTS_NAV_V1_8814B) << BIT_SHIFT_RXMYRTS_NAV_V1_8814B)
-#define BIT_GET_RXMYRTS_NAV_V1_8814B(x) (((x) >> BIT_SHIFT_RXMYRTS_NAV_V1_8814B) & BIT_MASK_RXMYRTS_NAV_V1_8814B)

+#define BIT_GET_RXMYRTS_NAV_V1_8814B(x) (((x) >> BIT_SHIFT_RXMYRTS_NAV_V1_8814B) & BIT_MASK_RXMYRTS_NAV_V1_8814B)
+
 
 
 #define BIT_SHIFT_RTSRST_V1_8814B 0
 #define BIT_MASK_RTSRST_V1_8814B 0xff
 #define BIT_RTSRST_V1_8814B(x) (((x) & BIT_MASK_RTSRST_V1_8814B) << BIT_SHIFT_RTSRST_V1_8814B)
-#define BIT_GET_RTSRST_V1_8814B(x) (((x) >> BIT_SHIFT_RTSRST_V1_8814B) & BIT_MASK_RTSRST_V1_8814B)

+#define BIT_GET_RTSRST_V1_8814B(x) (((x) >> BIT_SHIFT_RTSRST_V1_8814B) & BIT_MASK_RTSRST_V1_8814B)
+
 
 
 /* 2 REG_WLAN_ACT_MASK_CTRL_1_8814B */
@@ -9634,19 +10595,22 @@
 #define BIT_SHIFT_BT_STAT_DELAY_8814B 12
 #define BIT_MASK_BT_STAT_DELAY_8814B 0xf
 #define BIT_BT_STAT_DELAY_8814B(x) (((x) & BIT_MASK_BT_STAT_DELAY_8814B) << BIT_SHIFT_BT_STAT_DELAY_8814B)
-#define BIT_GET_BT_STAT_DELAY_8814B(x) (((x) >> BIT_SHIFT_BT_STAT_DELAY_8814B) & BIT_MASK_BT_STAT_DELAY_8814B)

+#define BIT_GET_BT_STAT_DELAY_8814B(x) (((x) >> BIT_SHIFT_BT_STAT_DELAY_8814B) & BIT_MASK_BT_STAT_DELAY_8814B)
+
 
 
 #define BIT_SHIFT_BT_TRX_INIT_DETECT_8814B 8
 #define BIT_MASK_BT_TRX_INIT_DETECT_8814B 0xf
 #define BIT_BT_TRX_INIT_DETECT_8814B(x) (((x) & BIT_MASK_BT_TRX_INIT_DETECT_8814B) << BIT_SHIFT_BT_TRX_INIT_DETECT_8814B)
-#define BIT_GET_BT_TRX_INIT_DETECT_8814B(x) (((x) >> BIT_SHIFT_BT_TRX_INIT_DETECT_8814B) & BIT_MASK_BT_TRX_INIT_DETECT_8814B)

+#define BIT_GET_BT_TRX_INIT_DETECT_8814B(x) (((x) >> BIT_SHIFT_BT_TRX_INIT_DETECT_8814B) & BIT_MASK_BT_TRX_INIT_DETECT_8814B)
+
 
 
 #define BIT_SHIFT_BT_PRI_DETECT_TO_8814B 4
 #define BIT_MASK_BT_PRI_DETECT_TO_8814B 0xf
 #define BIT_BT_PRI_DETECT_TO_8814B(x) (((x) & BIT_MASK_BT_PRI_DETECT_TO_8814B) << BIT_SHIFT_BT_PRI_DETECT_TO_8814B)
-#define BIT_GET_BT_PRI_DETECT_TO_8814B(x) (((x) >> BIT_SHIFT_BT_PRI_DETECT_TO_8814B) & BIT_MASK_BT_PRI_DETECT_TO_8814B)

+#define BIT_GET_BT_PRI_DETECT_TO_8814B(x) (((x) >> BIT_SHIFT_BT_PRI_DETECT_TO_8814B) & BIT_MASK_BT_PRI_DETECT_TO_8814B)
+
 
 #define BIT_R_GRANTALL_WLMASK_8814B BIT(3)
 #define BIT_STATIS_BT_EN_8814B BIT(2)
@@ -9658,13 +10622,15 @@
 #define BIT_SHIFT_STATIS_BT_HI_RX_8814B 16
 #define BIT_MASK_STATIS_BT_HI_RX_8814B 0xffff
 #define BIT_STATIS_BT_HI_RX_8814B(x) (((x) & BIT_MASK_STATIS_BT_HI_RX_8814B) << BIT_SHIFT_STATIS_BT_HI_RX_8814B)
-#define BIT_GET_STATIS_BT_HI_RX_8814B(x) (((x) >> BIT_SHIFT_STATIS_BT_HI_RX_8814B) & BIT_MASK_STATIS_BT_HI_RX_8814B)

+#define BIT_GET_STATIS_BT_HI_RX_8814B(x) (((x) >> BIT_SHIFT_STATIS_BT_HI_RX_8814B) & BIT_MASK_STATIS_BT_HI_RX_8814B)
+
 
 
 #define BIT_SHIFT_STATIS_BT_HI_TX_8814B 0
 #define BIT_MASK_STATIS_BT_HI_TX_8814B 0xffff
 #define BIT_STATIS_BT_HI_TX_8814B(x) (((x) & BIT_MASK_STATIS_BT_HI_TX_8814B) << BIT_SHIFT_STATIS_BT_HI_TX_8814B)
-#define BIT_GET_STATIS_BT_HI_TX_8814B(x) (((x) >> BIT_SHIFT_STATIS_BT_HI_TX_8814B) & BIT_MASK_STATIS_BT_HI_TX_8814B)

+#define BIT_GET_STATIS_BT_HI_TX_8814B(x) (((x) >> BIT_SHIFT_STATIS_BT_HI_TX_8814B) & BIT_MASK_STATIS_BT_HI_TX_8814B)
+
 
 
 /* 2 REG_BT_ACT_STATISTICS_1_8814B */
@@ -9672,13 +10638,15 @@
 #define BIT_SHIFT_STATIS_BT_LO_RX_1_8814B 16
 #define BIT_MASK_STATIS_BT_LO_RX_1_8814B 0xffff
 #define BIT_STATIS_BT_LO_RX_1_8814B(x) (((x) & BIT_MASK_STATIS_BT_LO_RX_1_8814B) << BIT_SHIFT_STATIS_BT_LO_RX_1_8814B)
-#define BIT_GET_STATIS_BT_LO_RX_1_8814B(x) (((x) >> BIT_SHIFT_STATIS_BT_LO_RX_1_8814B) & BIT_MASK_STATIS_BT_LO_RX_1_8814B)

+#define BIT_GET_STATIS_BT_LO_RX_1_8814B(x) (((x) >> BIT_SHIFT_STATIS_BT_LO_RX_1_8814B) & BIT_MASK_STATIS_BT_LO_RX_1_8814B)
+
 
 
 #define BIT_SHIFT_STATIS_BT_LO_TX_1_8814B 0
 #define BIT_MASK_STATIS_BT_LO_TX_1_8814B 0xffff
 #define BIT_STATIS_BT_LO_TX_1_8814B(x) (((x) & BIT_MASK_STATIS_BT_LO_TX_1_8814B) << BIT_SHIFT_STATIS_BT_LO_TX_1_8814B)
-#define BIT_GET_STATIS_BT_LO_TX_1_8814B(x) (((x) >> BIT_SHIFT_STATIS_BT_LO_TX_1_8814B) & BIT_MASK_STATIS_BT_LO_TX_1_8814B)

+#define BIT_GET_STATIS_BT_LO_TX_1_8814B(x) (((x) >> BIT_SHIFT_STATIS_BT_LO_TX_1_8814B) & BIT_MASK_STATIS_BT_LO_TX_1_8814B)
+
 
 
 /* 2 REG_BT_STATISTICS_CONTROL_REGISTER_8814B */
@@ -9686,19 +10654,22 @@
 #define BIT_SHIFT_R_BT_CMD_RPT_8814B 16
 #define BIT_MASK_R_BT_CMD_RPT_8814B 0xffff
 #define BIT_R_BT_CMD_RPT_8814B(x) (((x) & BIT_MASK_R_BT_CMD_RPT_8814B) << BIT_SHIFT_R_BT_CMD_RPT_8814B)
-#define BIT_GET_R_BT_CMD_RPT_8814B(x) (((x) >> BIT_SHIFT_R_BT_CMD_RPT_8814B) & BIT_MASK_R_BT_CMD_RPT_8814B)

+#define BIT_GET_R_BT_CMD_RPT_8814B(x) (((x) >> BIT_SHIFT_R_BT_CMD_RPT_8814B) & BIT_MASK_R_BT_CMD_RPT_8814B)
+
 
 
 #define BIT_SHIFT_R_RPT_FROM_BT_8814B 8
 #define BIT_MASK_R_RPT_FROM_BT_8814B 0xff
 #define BIT_R_RPT_FROM_BT_8814B(x) (((x) & BIT_MASK_R_RPT_FROM_BT_8814B) << BIT_SHIFT_R_RPT_FROM_BT_8814B)
-#define BIT_GET_R_RPT_FROM_BT_8814B(x) (((x) >> BIT_SHIFT_R_RPT_FROM_BT_8814B) & BIT_MASK_R_RPT_FROM_BT_8814B)

+#define BIT_GET_R_RPT_FROM_BT_8814B(x) (((x) >> BIT_SHIFT_R_RPT_FROM_BT_8814B) & BIT_MASK_R_RPT_FROM_BT_8814B)
+
 
 
 #define BIT_SHIFT_BT_HID_ISR_SET_8814B 6
 #define BIT_MASK_BT_HID_ISR_SET_8814B 0x3
 #define BIT_BT_HID_ISR_SET_8814B(x) (((x) & BIT_MASK_BT_HID_ISR_SET_8814B) << BIT_SHIFT_BT_HID_ISR_SET_8814B)
-#define BIT_GET_BT_HID_ISR_SET_8814B(x) (((x) >> BIT_SHIFT_BT_HID_ISR_SET_8814B) & BIT_MASK_BT_HID_ISR_SET_8814B)

+#define BIT_GET_BT_HID_ISR_SET_8814B(x) (((x) >> BIT_SHIFT_BT_HID_ISR_SET_8814B) & BIT_MASK_BT_HID_ISR_SET_8814B)
+
 
 #define BIT_TDMA_BT_START_NOTIFY_8814B BIT(5)
 #define BIT_ENABLE_TDMA_FW_MODE_8814B BIT(4)
@@ -9712,25 +10683,29 @@
 #define BIT_SHIFT_BT_PROFILE_8814B 24
 #define BIT_MASK_BT_PROFILE_8814B 0xff
 #define BIT_BT_PROFILE_8814B(x) (((x) & BIT_MASK_BT_PROFILE_8814B) << BIT_SHIFT_BT_PROFILE_8814B)
-#define BIT_GET_BT_PROFILE_8814B(x) (((x) >> BIT_SHIFT_BT_PROFILE_8814B) & BIT_MASK_BT_PROFILE_8814B)

+#define BIT_GET_BT_PROFILE_8814B(x) (((x) >> BIT_SHIFT_BT_PROFILE_8814B) & BIT_MASK_BT_PROFILE_8814B)
+
 
 
 #define BIT_SHIFT_BT_POWER_8814B 16
 #define BIT_MASK_BT_POWER_8814B 0xff
 #define BIT_BT_POWER_8814B(x) (((x) & BIT_MASK_BT_POWER_8814B) << BIT_SHIFT_BT_POWER_8814B)
-#define BIT_GET_BT_POWER_8814B(x) (((x) >> BIT_SHIFT_BT_POWER_8814B) & BIT_MASK_BT_POWER_8814B)

+#define BIT_GET_BT_POWER_8814B(x) (((x) >> BIT_SHIFT_BT_POWER_8814B) & BIT_MASK_BT_POWER_8814B)
+
 
 
 #define BIT_SHIFT_BT_PREDECT_STATUS_8814B 8
 #define BIT_MASK_BT_PREDECT_STATUS_8814B 0xff
 #define BIT_BT_PREDECT_STATUS_8814B(x) (((x) & BIT_MASK_BT_PREDECT_STATUS_8814B) << BIT_SHIFT_BT_PREDECT_STATUS_8814B)
-#define BIT_GET_BT_PREDECT_STATUS_8814B(x) (((x) >> BIT_SHIFT_BT_PREDECT_STATUS_8814B) & BIT_MASK_BT_PREDECT_STATUS_8814B)

+#define BIT_GET_BT_PREDECT_STATUS_8814B(x) (((x) >> BIT_SHIFT_BT_PREDECT_STATUS_8814B) & BIT_MASK_BT_PREDECT_STATUS_8814B)
+
 
 
 #define BIT_SHIFT_BT_CMD_INFO_8814B 0
 #define BIT_MASK_BT_CMD_INFO_8814B 0xff
 #define BIT_BT_CMD_INFO_8814B(x) (((x) & BIT_MASK_BT_CMD_INFO_8814B) << BIT_SHIFT_BT_CMD_INFO_8814B)
-#define BIT_GET_BT_CMD_INFO_8814B(x) (((x) >> BIT_SHIFT_BT_CMD_INFO_8814B) & BIT_MASK_BT_CMD_INFO_8814B)

+#define BIT_GET_BT_CMD_INFO_8814B(x) (((x) >> BIT_SHIFT_BT_CMD_INFO_8814B) & BIT_MASK_BT_CMD_INFO_8814B)
+
 
 
 /* 2 REG_BT_INTERRUPT_CONTROL_REGISTER_8814B */
@@ -9746,19 +10721,22 @@
 #define BIT_SHIFT_WLAN_RPT_DATA_8814B 16
 #define BIT_MASK_WLAN_RPT_DATA_8814B 0xff
 #define BIT_WLAN_RPT_DATA_8814B(x) (((x) & BIT_MASK_WLAN_RPT_DATA_8814B) << BIT_SHIFT_WLAN_RPT_DATA_8814B)
-#define BIT_GET_WLAN_RPT_DATA_8814B(x) (((x) >> BIT_SHIFT_WLAN_RPT_DATA_8814B) & BIT_MASK_WLAN_RPT_DATA_8814B)

+#define BIT_GET_WLAN_RPT_DATA_8814B(x) (((x) >> BIT_SHIFT_WLAN_RPT_DATA_8814B) & BIT_MASK_WLAN_RPT_DATA_8814B)
+
 
 
 #define BIT_SHIFT_CMD_ID_8814B 8
 #define BIT_MASK_CMD_ID_8814B 0xff
 #define BIT_CMD_ID_8814B(x) (((x) & BIT_MASK_CMD_ID_8814B) << BIT_SHIFT_CMD_ID_8814B)
-#define BIT_GET_CMD_ID_8814B(x) (((x) >> BIT_SHIFT_CMD_ID_8814B) & BIT_MASK_CMD_ID_8814B)

+#define BIT_GET_CMD_ID_8814B(x) (((x) >> BIT_SHIFT_CMD_ID_8814B) & BIT_MASK_CMD_ID_8814B)
+
 
 
 #define BIT_SHIFT_BT_DATA_8814B 0
 #define BIT_MASK_BT_DATA_8814B 0xff
 #define BIT_BT_DATA_8814B(x) (((x) & BIT_MASK_BT_DATA_8814B) << BIT_SHIFT_BT_DATA_8814B)
-#define BIT_GET_BT_DATA_8814B(x) (((x) >> BIT_SHIFT_BT_DATA_8814B) & BIT_MASK_BT_DATA_8814B)

+#define BIT_GET_BT_DATA_8814B(x) (((x) >> BIT_SHIFT_BT_DATA_8814B) & BIT_MASK_BT_DATA_8814B)
+
 
 
 /* 2 REG_WLAN_REPORT_TIME_OUT_CONTROL_REGISTER_8814B */
@@ -9766,7 +10744,8 @@
 #define BIT_SHIFT_WLAN_RPT_TO_8814B 0
 #define BIT_MASK_WLAN_RPT_TO_8814B 0xff
 #define BIT_WLAN_RPT_TO_8814B(x) (((x) & BIT_MASK_WLAN_RPT_TO_8814B) << BIT_SHIFT_WLAN_RPT_TO_8814B)
-#define BIT_GET_WLAN_RPT_TO_8814B(x) (((x) >> BIT_SHIFT_WLAN_RPT_TO_8814B) & BIT_MASK_WLAN_RPT_TO_8814B)

+#define BIT_GET_WLAN_RPT_TO_8814B(x) (((x) >> BIT_SHIFT_WLAN_RPT_TO_8814B) & BIT_MASK_WLAN_RPT_TO_8814B)
+
 
 
 /* 2 REG_BT_ISOLATION_TABLE_REGISTER_REGISTER_8814B */
@@ -9774,7 +10753,8 @@
 #define BIT_SHIFT_ISOLATION_CHK_0_8814B 1
 #define BIT_MASK_ISOLATION_CHK_0_8814B 0x7fffff
 #define BIT_ISOLATION_CHK_0_8814B(x) (((x) & BIT_MASK_ISOLATION_CHK_0_8814B) << BIT_SHIFT_ISOLATION_CHK_0_8814B)
-#define BIT_GET_ISOLATION_CHK_0_8814B(x) (((x) >> BIT_SHIFT_ISOLATION_CHK_0_8814B) & BIT_MASK_ISOLATION_CHK_0_8814B)

+#define BIT_GET_ISOLATION_CHK_0_8814B(x) (((x) >> BIT_SHIFT_ISOLATION_CHK_0_8814B) & BIT_MASK_ISOLATION_CHK_0_8814B)
+
 
 #define BIT_ISOLATION_EN_8814B BIT(0)
 
@@ -9783,7 +10763,8 @@
 #define BIT_SHIFT_ISOLATION_CHK_1_8814B 0
 #define BIT_MASK_ISOLATION_CHK_1_8814B 0xffffffffL
 #define BIT_ISOLATION_CHK_1_8814B(x) (((x) & BIT_MASK_ISOLATION_CHK_1_8814B) << BIT_SHIFT_ISOLATION_CHK_1_8814B)
-#define BIT_GET_ISOLATION_CHK_1_8814B(x) (((x) >> BIT_SHIFT_ISOLATION_CHK_1_8814B) & BIT_MASK_ISOLATION_CHK_1_8814B)

+#define BIT_GET_ISOLATION_CHK_1_8814B(x) (((x) >> BIT_SHIFT_ISOLATION_CHK_1_8814B) & BIT_MASK_ISOLATION_CHK_1_8814B)
+
 
 
 /* 2 REG_BT_ISOLATION_TABLE_REGISTER_REGISTER_2_8814B */
@@ -9791,7 +10772,8 @@
 #define BIT_SHIFT_ISOLATION_CHK_2_8814B 0
 #define BIT_MASK_ISOLATION_CHK_2_8814B 0xffffff
 #define BIT_ISOLATION_CHK_2_8814B(x) (((x) & BIT_MASK_ISOLATION_CHK_2_8814B) << BIT_SHIFT_ISOLATION_CHK_2_8814B)
-#define BIT_GET_ISOLATION_CHK_2_8814B(x) (((x) >> BIT_SHIFT_ISOLATION_CHK_2_8814B) & BIT_MASK_ISOLATION_CHK_2_8814B)

+#define BIT_GET_ISOLATION_CHK_2_8814B(x) (((x) >> BIT_SHIFT_ISOLATION_CHK_2_8814B) & BIT_MASK_ISOLATION_CHK_2_8814B)
+
 
 
 /* 2 REG_BT_INTERRUPT_STATUS_REGISTER_8814B */
@@ -9809,13 +10791,15 @@
 #define BIT_SHIFT_BT_TIME_8814B 6
 #define BIT_MASK_BT_TIME_8814B 0x3ffffff
 #define BIT_BT_TIME_8814B(x) (((x) & BIT_MASK_BT_TIME_8814B) << BIT_SHIFT_BT_TIME_8814B)
-#define BIT_GET_BT_TIME_8814B(x) (((x) >> BIT_SHIFT_BT_TIME_8814B) & BIT_MASK_BT_TIME_8814B)

+#define BIT_GET_BT_TIME_8814B(x) (((x) >> BIT_SHIFT_BT_TIME_8814B) & BIT_MASK_BT_TIME_8814B)
+
 
 
 #define BIT_SHIFT_BT_RPT_SAMPLE_RATE_8814B 0
 #define BIT_MASK_BT_RPT_SAMPLE_RATE_8814B 0x3f
 #define BIT_BT_RPT_SAMPLE_RATE_8814B(x) (((x) & BIT_MASK_BT_RPT_SAMPLE_RATE_8814B) << BIT_SHIFT_BT_RPT_SAMPLE_RATE_8814B)
-#define BIT_GET_BT_RPT_SAMPLE_RATE_8814B(x) (((x) >> BIT_SHIFT_BT_RPT_SAMPLE_RATE_8814B) & BIT_MASK_BT_RPT_SAMPLE_RATE_8814B)

+#define BIT_GET_BT_RPT_SAMPLE_RATE_8814B(x) (((x) >> BIT_SHIFT_BT_RPT_SAMPLE_RATE_8814B) & BIT_MASK_BT_RPT_SAMPLE_RATE_8814B)
+
 
 
 /* 2 REG_BT_ACT_REGISTER_8814B */
@@ -9823,7 +10807,8 @@
 #define BIT_SHIFT_BT_EISR_EN_8814B 16
 #define BIT_MASK_BT_EISR_EN_8814B 0xff
 #define BIT_BT_EISR_EN_8814B(x) (((x) & BIT_MASK_BT_EISR_EN_8814B) << BIT_SHIFT_BT_EISR_EN_8814B)
-#define BIT_GET_BT_EISR_EN_8814B(x) (((x) >> BIT_SHIFT_BT_EISR_EN_8814B) & BIT_MASK_BT_EISR_EN_8814B)

+#define BIT_GET_BT_EISR_EN_8814B(x) (((x) >> BIT_SHIFT_BT_EISR_EN_8814B) & BIT_MASK_BT_EISR_EN_8814B)
+
 
 #define BIT_BT_ACT_FALLING_ISR_8814B BIT(10)
 #define BIT_BT_ACT_RISING_ISR_8814B BIT(9)
@@ -9832,7 +10817,8 @@
 #define BIT_SHIFT_BT_CH_8814B 0
 #define BIT_MASK_BT_CH_8814B 0xff
 #define BIT_BT_CH_8814B(x) (((x) & BIT_MASK_BT_CH_8814B) << BIT_SHIFT_BT_CH_8814B)
-#define BIT_GET_BT_CH_8814B(x) (((x) >> BIT_SHIFT_BT_CH_8814B) & BIT_MASK_BT_CH_8814B)

+#define BIT_GET_BT_CH_8814B(x) (((x) >> BIT_SHIFT_BT_CH_8814B) & BIT_MASK_BT_CH_8814B)
+
 
 
 /* 2 REG_OBFF_CTRL_BASIC_8814B */
@@ -9841,7 +10827,8 @@
 #define BIT_SHIFT_OBFF_STATE_V1_8814B 28
 #define BIT_MASK_OBFF_STATE_V1_8814B 0x3
 #define BIT_OBFF_STATE_V1_8814B(x) (((x) & BIT_MASK_OBFF_STATE_V1_8814B) << BIT_SHIFT_OBFF_STATE_V1_8814B)
-#define BIT_GET_OBFF_STATE_V1_8814B(x) (((x) >> BIT_SHIFT_OBFF_STATE_V1_8814B) & BIT_MASK_OBFF_STATE_V1_8814B)

+#define BIT_GET_OBFF_STATE_V1_8814B(x) (((x) >> BIT_SHIFT_OBFF_STATE_V1_8814B) & BIT_MASK_OBFF_STATE_V1_8814B)
+
 
 #define BIT_OBFF_ACT_RXDMA_EN_8814B BIT(27)
 #define BIT_OBFF_BLOCK_INT_EN_8814B BIT(26)
@@ -9851,25 +10838,29 @@
 #define BIT_SHIFT_WAKE_MAX_PLS_8814B 20
 #define BIT_MASK_WAKE_MAX_PLS_8814B 0x7
 #define BIT_WAKE_MAX_PLS_8814B(x) (((x) & BIT_MASK_WAKE_MAX_PLS_8814B) << BIT_SHIFT_WAKE_MAX_PLS_8814B)
-#define BIT_GET_WAKE_MAX_PLS_8814B(x) (((x) >> BIT_SHIFT_WAKE_MAX_PLS_8814B) & BIT_MASK_WAKE_MAX_PLS_8814B)

+#define BIT_GET_WAKE_MAX_PLS_8814B(x) (((x) >> BIT_SHIFT_WAKE_MAX_PLS_8814B) & BIT_MASK_WAKE_MAX_PLS_8814B)
+
 
 
 #define BIT_SHIFT_WAKE_MIN_PLS_8814B 16
 #define BIT_MASK_WAKE_MIN_PLS_8814B 0x7
 #define BIT_WAKE_MIN_PLS_8814B(x) (((x) & BIT_MASK_WAKE_MIN_PLS_8814B) << BIT_SHIFT_WAKE_MIN_PLS_8814B)
-#define BIT_GET_WAKE_MIN_PLS_8814B(x) (((x) >> BIT_SHIFT_WAKE_MIN_PLS_8814B) & BIT_MASK_WAKE_MIN_PLS_8814B)

+#define BIT_GET_WAKE_MIN_PLS_8814B(x) (((x) >> BIT_SHIFT_WAKE_MIN_PLS_8814B) & BIT_MASK_WAKE_MIN_PLS_8814B)
+
 
 
 #define BIT_SHIFT_WAKE_MAX_F2F_8814B 12
 #define BIT_MASK_WAKE_MAX_F2F_8814B 0x7
 #define BIT_WAKE_MAX_F2F_8814B(x) (((x) & BIT_MASK_WAKE_MAX_F2F_8814B) << BIT_SHIFT_WAKE_MAX_F2F_8814B)
-#define BIT_GET_WAKE_MAX_F2F_8814B(x) (((x) >> BIT_SHIFT_WAKE_MAX_F2F_8814B) & BIT_MASK_WAKE_MAX_F2F_8814B)

+#define BIT_GET_WAKE_MAX_F2F_8814B(x) (((x) >> BIT_SHIFT_WAKE_MAX_F2F_8814B) & BIT_MASK_WAKE_MAX_F2F_8814B)
+
 
 
 #define BIT_SHIFT_WAKE_MIN_F2F_8814B 8
 #define BIT_MASK_WAKE_MIN_F2F_8814B 0x7
 #define BIT_WAKE_MIN_F2F_8814B(x) (((x) & BIT_MASK_WAKE_MIN_F2F_8814B) << BIT_SHIFT_WAKE_MIN_F2F_8814B)
-#define BIT_GET_WAKE_MIN_F2F_8814B(x) (((x) >> BIT_SHIFT_WAKE_MIN_F2F_8814B) & BIT_MASK_WAKE_MIN_F2F_8814B)

+#define BIT_GET_WAKE_MIN_F2F_8814B(x) (((x) >> BIT_SHIFT_WAKE_MIN_F2F_8814B) & BIT_MASK_WAKE_MIN_F2F_8814B)
+
 
 #define BIT_APP_CPU_ACT_V1_8814B BIT(3)
 #define BIT_APP_OBFF_V1_8814B BIT(2)
@@ -9881,25 +10872,29 @@
 #define BIT_SHIFT_RX_HIGH_TIMER_IDX_8814B 24
 #define BIT_MASK_RX_HIGH_TIMER_IDX_8814B 0x7
 #define BIT_RX_HIGH_TIMER_IDX_8814B(x) (((x) & BIT_MASK_RX_HIGH_TIMER_IDX_8814B) << BIT_SHIFT_RX_HIGH_TIMER_IDX_8814B)
-#define BIT_GET_RX_HIGH_TIMER_IDX_8814B(x) (((x) >> BIT_SHIFT_RX_HIGH_TIMER_IDX_8814B) & BIT_MASK_RX_HIGH_TIMER_IDX_8814B)

+#define BIT_GET_RX_HIGH_TIMER_IDX_8814B(x) (((x) >> BIT_SHIFT_RX_HIGH_TIMER_IDX_8814B) & BIT_MASK_RX_HIGH_TIMER_IDX_8814B)
+
 
 
 #define BIT_SHIFT_RX_MED_TIMER_IDX_8814B 16
 #define BIT_MASK_RX_MED_TIMER_IDX_8814B 0x7
 #define BIT_RX_MED_TIMER_IDX_8814B(x) (((x) & BIT_MASK_RX_MED_TIMER_IDX_8814B) << BIT_SHIFT_RX_MED_TIMER_IDX_8814B)
-#define BIT_GET_RX_MED_TIMER_IDX_8814B(x) (((x) >> BIT_SHIFT_RX_MED_TIMER_IDX_8814B) & BIT_MASK_RX_MED_TIMER_IDX_8814B)

+#define BIT_GET_RX_MED_TIMER_IDX_8814B(x) (((x) >> BIT_SHIFT_RX_MED_TIMER_IDX_8814B) & BIT_MASK_RX_MED_TIMER_IDX_8814B)
+
 
 
 #define BIT_SHIFT_RX_LOW_TIMER_IDX_8814B 8
 #define BIT_MASK_RX_LOW_TIMER_IDX_8814B 0x7
 #define BIT_RX_LOW_TIMER_IDX_8814B(x) (((x) & BIT_MASK_RX_LOW_TIMER_IDX_8814B) << BIT_SHIFT_RX_LOW_TIMER_IDX_8814B)
-#define BIT_GET_RX_LOW_TIMER_IDX_8814B(x) (((x) >> BIT_SHIFT_RX_LOW_TIMER_IDX_8814B) & BIT_MASK_RX_LOW_TIMER_IDX_8814B)

+#define BIT_GET_RX_LOW_TIMER_IDX_8814B(x) (((x) >> BIT_SHIFT_RX_LOW_TIMER_IDX_8814B) & BIT_MASK_RX_LOW_TIMER_IDX_8814B)
+
 
 
 #define BIT_SHIFT_OBFF_INT_TIMER_IDX_8814B 0
 #define BIT_MASK_OBFF_INT_TIMER_IDX_8814B 0x7
 #define BIT_OBFF_INT_TIMER_IDX_8814B(x) (((x) & BIT_MASK_OBFF_INT_TIMER_IDX_8814B) << BIT_SHIFT_OBFF_INT_TIMER_IDX_8814B)
-#define BIT_GET_OBFF_INT_TIMER_IDX_8814B(x) (((x) >> BIT_SHIFT_OBFF_INT_TIMER_IDX_8814B) & BIT_MASK_OBFF_INT_TIMER_IDX_8814B)

+#define BIT_GET_OBFF_INT_TIMER_IDX_8814B(x) (((x) >> BIT_SHIFT_OBFF_INT_TIMER_IDX_8814B) & BIT_MASK_OBFF_INT_TIMER_IDX_8814B)
+
 
 
 /* 2 REG_LTR_CTRL_BASIC_8814B */
@@ -9917,31 +10912,36 @@
 #define BIT_SHIFT_HIGH_RATE_TRIG_SEL_8814B 20
 #define BIT_MASK_HIGH_RATE_TRIG_SEL_8814B 0x3
 #define BIT_HIGH_RATE_TRIG_SEL_8814B(x) (((x) & BIT_MASK_HIGH_RATE_TRIG_SEL_8814B) << BIT_SHIFT_HIGH_RATE_TRIG_SEL_8814B)
-#define BIT_GET_HIGH_RATE_TRIG_SEL_8814B(x) (((x) >> BIT_SHIFT_HIGH_RATE_TRIG_SEL_8814B) & BIT_MASK_HIGH_RATE_TRIG_SEL_8814B)

+#define BIT_GET_HIGH_RATE_TRIG_SEL_8814B(x) (((x) >> BIT_SHIFT_HIGH_RATE_TRIG_SEL_8814B) & BIT_MASK_HIGH_RATE_TRIG_SEL_8814B)
+
 
 
 #define BIT_SHIFT_MED_RATE_TRIG_SEL_8814B 18
 #define BIT_MASK_MED_RATE_TRIG_SEL_8814B 0x3
 #define BIT_MED_RATE_TRIG_SEL_8814B(x) (((x) & BIT_MASK_MED_RATE_TRIG_SEL_8814B) << BIT_SHIFT_MED_RATE_TRIG_SEL_8814B)
-#define BIT_GET_MED_RATE_TRIG_SEL_8814B(x) (((x) >> BIT_SHIFT_MED_RATE_TRIG_SEL_8814B) & BIT_MASK_MED_RATE_TRIG_SEL_8814B)

+#define BIT_GET_MED_RATE_TRIG_SEL_8814B(x) (((x) >> BIT_SHIFT_MED_RATE_TRIG_SEL_8814B) & BIT_MASK_MED_RATE_TRIG_SEL_8814B)
+
 
 
 #define BIT_SHIFT_LOW_RATE_TRIG_SEL_8814B 16
 #define BIT_MASK_LOW_RATE_TRIG_SEL_8814B 0x3
 #define BIT_LOW_RATE_TRIG_SEL_8814B(x) (((x) & BIT_MASK_LOW_RATE_TRIG_SEL_8814B) << BIT_SHIFT_LOW_RATE_TRIG_SEL_8814B)
-#define BIT_GET_LOW_RATE_TRIG_SEL_8814B(x) (((x) >> BIT_SHIFT_LOW_RATE_TRIG_SEL_8814B) & BIT_MASK_LOW_RATE_TRIG_SEL_8814B)

+#define BIT_GET_LOW_RATE_TRIG_SEL_8814B(x) (((x) >> BIT_SHIFT_LOW_RATE_TRIG_SEL_8814B) & BIT_MASK_LOW_RATE_TRIG_SEL_8814B)
+
 
 
 #define BIT_SHIFT_HIGH_RATE_BD_IDX_8814B 8
 #define BIT_MASK_HIGH_RATE_BD_IDX_8814B 0x7f
 #define BIT_HIGH_RATE_BD_IDX_8814B(x) (((x) & BIT_MASK_HIGH_RATE_BD_IDX_8814B) << BIT_SHIFT_HIGH_RATE_BD_IDX_8814B)
-#define BIT_GET_HIGH_RATE_BD_IDX_8814B(x) (((x) >> BIT_SHIFT_HIGH_RATE_BD_IDX_8814B) & BIT_MASK_HIGH_RATE_BD_IDX_8814B)

+#define BIT_GET_HIGH_RATE_BD_IDX_8814B(x) (((x) >> BIT_SHIFT_HIGH_RATE_BD_IDX_8814B) & BIT_MASK_HIGH_RATE_BD_IDX_8814B)
+
 
 
 #define BIT_SHIFT_LOW_RATE_BD_IDX_8814B 0
 #define BIT_MASK_LOW_RATE_BD_IDX_8814B 0x7f
 #define BIT_LOW_RATE_BD_IDX_8814B(x) (((x) & BIT_MASK_LOW_RATE_BD_IDX_8814B) << BIT_SHIFT_LOW_RATE_BD_IDX_8814B)
-#define BIT_GET_LOW_RATE_BD_IDX_8814B(x) (((x) >> BIT_SHIFT_LOW_RATE_BD_IDX_8814B) & BIT_MASK_LOW_RATE_BD_IDX_8814B)

+#define BIT_GET_LOW_RATE_BD_IDX_8814B(x) (((x) >> BIT_SHIFT_LOW_RATE_BD_IDX_8814B) & BIT_MASK_LOW_RATE_BD_IDX_8814B)
+
 
 
 /* 2 REG_LTR_CTRL2_TIMER_THRESHOLD_8814B */
@@ -9949,43 +10949,50 @@
 #define BIT_SHIFT_RX_EMPTY_TIMER_IDX_8814B 24
 #define BIT_MASK_RX_EMPTY_TIMER_IDX_8814B 0x7
 #define BIT_RX_EMPTY_TIMER_IDX_8814B(x) (((x) & BIT_MASK_RX_EMPTY_TIMER_IDX_8814B) << BIT_SHIFT_RX_EMPTY_TIMER_IDX_8814B)
-#define BIT_GET_RX_EMPTY_TIMER_IDX_8814B(x) (((x) >> BIT_SHIFT_RX_EMPTY_TIMER_IDX_8814B) & BIT_MASK_RX_EMPTY_TIMER_IDX_8814B)

+#define BIT_GET_RX_EMPTY_TIMER_IDX_8814B(x) (((x) >> BIT_SHIFT_RX_EMPTY_TIMER_IDX_8814B) & BIT_MASK_RX_EMPTY_TIMER_IDX_8814B)
+
 
 
 #define BIT_SHIFT_RX_AFULL_TH_IDX_8814B 20
 #define BIT_MASK_RX_AFULL_TH_IDX_8814B 0x7
 #define BIT_RX_AFULL_TH_IDX_8814B(x) (((x) & BIT_MASK_RX_AFULL_TH_IDX_8814B) << BIT_SHIFT_RX_AFULL_TH_IDX_8814B)
-#define BIT_GET_RX_AFULL_TH_IDX_8814B(x) (((x) >> BIT_SHIFT_RX_AFULL_TH_IDX_8814B) & BIT_MASK_RX_AFULL_TH_IDX_8814B)

+#define BIT_GET_RX_AFULL_TH_IDX_8814B(x) (((x) >> BIT_SHIFT_RX_AFULL_TH_IDX_8814B) & BIT_MASK_RX_AFULL_TH_IDX_8814B)
+
 
 
 #define BIT_SHIFT_RX_HIGH_TH_IDX_8814B 16
 #define BIT_MASK_RX_HIGH_TH_IDX_8814B 0x7
 #define BIT_RX_HIGH_TH_IDX_8814B(x) (((x) & BIT_MASK_RX_HIGH_TH_IDX_8814B) << BIT_SHIFT_RX_HIGH_TH_IDX_8814B)
-#define BIT_GET_RX_HIGH_TH_IDX_8814B(x) (((x) >> BIT_SHIFT_RX_HIGH_TH_IDX_8814B) & BIT_MASK_RX_HIGH_TH_IDX_8814B)

+#define BIT_GET_RX_HIGH_TH_IDX_8814B(x) (((x) >> BIT_SHIFT_RX_HIGH_TH_IDX_8814B) & BIT_MASK_RX_HIGH_TH_IDX_8814B)
+
 
 
 #define BIT_SHIFT_RX_MED_TH_IDX_8814B 12
 #define BIT_MASK_RX_MED_TH_IDX_8814B 0x7
 #define BIT_RX_MED_TH_IDX_8814B(x) (((x) & BIT_MASK_RX_MED_TH_IDX_8814B) << BIT_SHIFT_RX_MED_TH_IDX_8814B)
-#define BIT_GET_RX_MED_TH_IDX_8814B(x) (((x) >> BIT_SHIFT_RX_MED_TH_IDX_8814B) & BIT_MASK_RX_MED_TH_IDX_8814B)

+#define BIT_GET_RX_MED_TH_IDX_8814B(x) (((x) >> BIT_SHIFT_RX_MED_TH_IDX_8814B) & BIT_MASK_RX_MED_TH_IDX_8814B)
+
 
 
 #define BIT_SHIFT_RX_LOW_TH_IDX_8814B 8
 #define BIT_MASK_RX_LOW_TH_IDX_8814B 0x7
 #define BIT_RX_LOW_TH_IDX_8814B(x) (((x) & BIT_MASK_RX_LOW_TH_IDX_8814B) << BIT_SHIFT_RX_LOW_TH_IDX_8814B)
-#define BIT_GET_RX_LOW_TH_IDX_8814B(x) (((x) >> BIT_SHIFT_RX_LOW_TH_IDX_8814B) & BIT_MASK_RX_LOW_TH_IDX_8814B)

+#define BIT_GET_RX_LOW_TH_IDX_8814B(x) (((x) >> BIT_SHIFT_RX_LOW_TH_IDX_8814B) & BIT_MASK_RX_LOW_TH_IDX_8814B)
+
 
 
 #define BIT_SHIFT_LTR_SPACE_IDX_8814B 4
 #define BIT_MASK_LTR_SPACE_IDX_8814B 0x3
 #define BIT_LTR_SPACE_IDX_8814B(x) (((x) & BIT_MASK_LTR_SPACE_IDX_8814B) << BIT_SHIFT_LTR_SPACE_IDX_8814B)
-#define BIT_GET_LTR_SPACE_IDX_8814B(x) (((x) >> BIT_SHIFT_LTR_SPACE_IDX_8814B) & BIT_MASK_LTR_SPACE_IDX_8814B)

+#define BIT_GET_LTR_SPACE_IDX_8814B(x) (((x) >> BIT_SHIFT_LTR_SPACE_IDX_8814B) & BIT_MASK_LTR_SPACE_IDX_8814B)
+
 
 
 #define BIT_SHIFT_LTR_IDLE_TIMER_IDX_8814B 0
 #define BIT_MASK_LTR_IDLE_TIMER_IDX_8814B 0x7
 #define BIT_LTR_IDLE_TIMER_IDX_8814B(x) (((x) & BIT_MASK_LTR_IDLE_TIMER_IDX_8814B) << BIT_SHIFT_LTR_IDLE_TIMER_IDX_8814B)
-#define BIT_GET_LTR_IDLE_TIMER_IDX_8814B(x) (((x) >> BIT_SHIFT_LTR_IDLE_TIMER_IDX_8814B) & BIT_MASK_LTR_IDLE_TIMER_IDX_8814B)

+#define BIT_GET_LTR_IDLE_TIMER_IDX_8814B(x) (((x) >> BIT_SHIFT_LTR_IDLE_TIMER_IDX_8814B) & BIT_MASK_LTR_IDLE_TIMER_IDX_8814B)
+
 
 
 /* 2 REG_LTR_IDLE_LATENCY_V1_8814B */
@@ -9993,7 +11000,8 @@
 #define BIT_SHIFT_LTR_IDLE_L_8814B 0
 #define BIT_MASK_LTR_IDLE_L_8814B 0xffffffffL
 #define BIT_LTR_IDLE_L_8814B(x) (((x) & BIT_MASK_LTR_IDLE_L_8814B) << BIT_SHIFT_LTR_IDLE_L_8814B)
-#define BIT_GET_LTR_IDLE_L_8814B(x) (((x) >> BIT_SHIFT_LTR_IDLE_L_8814B) & BIT_MASK_LTR_IDLE_L_8814B)

+#define BIT_GET_LTR_IDLE_L_8814B(x) (((x) >> BIT_SHIFT_LTR_IDLE_L_8814B) & BIT_MASK_LTR_IDLE_L_8814B)
+
 
 
 /* 2 REG_LTR_ACTIVE_LATENCY_V1_8814B */
@@ -10001,7 +11009,8 @@
 #define BIT_SHIFT_LTR_ACT_L_8814B 0
 #define BIT_MASK_LTR_ACT_L_8814B 0xffffffffL
 #define BIT_LTR_ACT_L_8814B(x) (((x) & BIT_MASK_LTR_ACT_L_8814B) << BIT_SHIFT_LTR_ACT_L_8814B)
-#define BIT_GET_LTR_ACT_L_8814B(x) (((x) >> BIT_SHIFT_LTR_ACT_L_8814B) & BIT_MASK_LTR_ACT_L_8814B)

+#define BIT_GET_LTR_ACT_L_8814B(x) (((x) >> BIT_SHIFT_LTR_ACT_L_8814B) & BIT_MASK_LTR_ACT_L_8814B)
+
 
 
 /* 2 REG_ANTENNA_TRAINING_CONTROL_REGISTER_8814B */
@@ -10009,7 +11018,8 @@
 #define BIT_SHIFT_TRAIN_STA_ADDR_0_8814B 0
 #define BIT_MASK_TRAIN_STA_ADDR_0_8814B 0xffffffffL
 #define BIT_TRAIN_STA_ADDR_0_8814B(x) (((x) & BIT_MASK_TRAIN_STA_ADDR_0_8814B) << BIT_SHIFT_TRAIN_STA_ADDR_0_8814B)
-#define BIT_GET_TRAIN_STA_ADDR_0_8814B(x) (((x) >> BIT_SHIFT_TRAIN_STA_ADDR_0_8814B) & BIT_MASK_TRAIN_STA_ADDR_0_8814B)

+#define BIT_GET_TRAIN_STA_ADDR_0_8814B(x) (((x) >> BIT_SHIFT_TRAIN_STA_ADDR_0_8814B) & BIT_MASK_TRAIN_STA_ADDR_0_8814B)
+
 
 
 /* 2 REG_ANTENNA_TRAINING_CONTROL_REGISTER_1_8814B */
@@ -10020,7 +11030,8 @@
 #define BIT_SHIFT_TRAIN_STA_ADDR_1_8814B 0
 #define BIT_MASK_TRAIN_STA_ADDR_1_8814B 0xffff
 #define BIT_TRAIN_STA_ADDR_1_8814B(x) (((x) & BIT_MASK_TRAIN_STA_ADDR_1_8814B) << BIT_SHIFT_TRAIN_STA_ADDR_1_8814B)
-#define BIT_GET_TRAIN_STA_ADDR_1_8814B(x) (((x) >> BIT_SHIFT_TRAIN_STA_ADDR_1_8814B) & BIT_MASK_TRAIN_STA_ADDR_1_8814B)

+#define BIT_GET_TRAIN_STA_ADDR_1_8814B(x) (((x) >> BIT_SHIFT_TRAIN_STA_ADDR_1_8814B) & BIT_MASK_TRAIN_STA_ADDR_1_8814B)
+
 
 
 /* 2 REG_WMAC_PKTCNT_RWD_8814B */
@@ -10028,7 +11039,8 @@
 #define BIT_SHIFT_PKTCNT_BSSIDMAP_8814B 4
 #define BIT_MASK_PKTCNT_BSSIDMAP_8814B 0xf
 #define BIT_PKTCNT_BSSIDMAP_8814B(x) (((x) & BIT_MASK_PKTCNT_BSSIDMAP_8814B) << BIT_SHIFT_PKTCNT_BSSIDMAP_8814B)
-#define BIT_GET_PKTCNT_BSSIDMAP_8814B(x) (((x) >> BIT_SHIFT_PKTCNT_BSSIDMAP_8814B) & BIT_MASK_PKTCNT_BSSIDMAP_8814B)

+#define BIT_GET_PKTCNT_BSSIDMAP_8814B(x) (((x) >> BIT_SHIFT_PKTCNT_BSSIDMAP_8814B) & BIT_MASK_PKTCNT_BSSIDMAP_8814B)
+
 
 #define BIT_PKTCNT_CNTRST_8814B BIT(1)
 #define BIT_PKTCNT_CNTEN_8814B BIT(0)
@@ -10040,7 +11052,8 @@
 #define BIT_SHIFT_WMAC_PKTCNT_CFGAD_8814B 0
 #define BIT_MASK_WMAC_PKTCNT_CFGAD_8814B 0xff
 #define BIT_WMAC_PKTCNT_CFGAD_8814B(x) (((x) & BIT_MASK_WMAC_PKTCNT_CFGAD_8814B) << BIT_SHIFT_WMAC_PKTCNT_CFGAD_8814B)
-#define BIT_GET_WMAC_PKTCNT_CFGAD_8814B(x) (((x) >> BIT_SHIFT_WMAC_PKTCNT_CFGAD_8814B) & BIT_MASK_WMAC_PKTCNT_CFGAD_8814B)

+#define BIT_GET_WMAC_PKTCNT_CFGAD_8814B(x) (((x) >> BIT_SHIFT_WMAC_PKTCNT_CFGAD_8814B) & BIT_MASK_WMAC_PKTCNT_CFGAD_8814B)
+
 
 
 /* 2 REG_IQ_DUMP_8814B */
@@ -10048,26 +11061,30 @@
 #define BIT_SHIFT_DUMP_OK_ADDR_8814B 15
 #define BIT_MASK_DUMP_OK_ADDR_8814B 0x1ffff
 #define BIT_DUMP_OK_ADDR_8814B(x) (((x) & BIT_MASK_DUMP_OK_ADDR_8814B) << BIT_SHIFT_DUMP_OK_ADDR_8814B)
-#define BIT_GET_DUMP_OK_ADDR_8814B(x) (((x) >> BIT_SHIFT_DUMP_OK_ADDR_8814B) & BIT_MASK_DUMP_OK_ADDR_8814B)

+#define BIT_GET_DUMP_OK_ADDR_8814B(x) (((x) >> BIT_SHIFT_DUMP_OK_ADDR_8814B) & BIT_MASK_DUMP_OK_ADDR_8814B)
+
 
 
 #define BIT_SHIFT_R_TRIG_TIME_SEL_8814B 8
 #define BIT_MASK_R_TRIG_TIME_SEL_8814B 0x7f
 #define BIT_R_TRIG_TIME_SEL_8814B(x) (((x) & BIT_MASK_R_TRIG_TIME_SEL_8814B) << BIT_SHIFT_R_TRIG_TIME_SEL_8814B)
-#define BIT_GET_R_TRIG_TIME_SEL_8814B(x) (((x) >> BIT_SHIFT_R_TRIG_TIME_SEL_8814B) & BIT_MASK_R_TRIG_TIME_SEL_8814B)

+#define BIT_GET_R_TRIG_TIME_SEL_8814B(x) (((x) >> BIT_SHIFT_R_TRIG_TIME_SEL_8814B) & BIT_MASK_R_TRIG_TIME_SEL_8814B)
+
 
 
 #define BIT_SHIFT_R_MAC_TRIG_SEL_8814B 6
 #define BIT_MASK_R_MAC_TRIG_SEL_8814B 0x3
 #define BIT_R_MAC_TRIG_SEL_8814B(x) (((x) & BIT_MASK_R_MAC_TRIG_SEL_8814B) << BIT_SHIFT_R_MAC_TRIG_SEL_8814B)
-#define BIT_GET_R_MAC_TRIG_SEL_8814B(x) (((x) >> BIT_SHIFT_R_MAC_TRIG_SEL_8814B) & BIT_MASK_R_MAC_TRIG_SEL_8814B)

+#define BIT_GET_R_MAC_TRIG_SEL_8814B(x) (((x) >> BIT_SHIFT_R_MAC_TRIG_SEL_8814B) & BIT_MASK_R_MAC_TRIG_SEL_8814B)
+
 
 #define BIT_MAC_TRIG_REG_8814B BIT(5)
 
 #define BIT_SHIFT_R_LEVEL_PULSE_SEL_8814B 3
 #define BIT_MASK_R_LEVEL_PULSE_SEL_8814B 0x3
 #define BIT_R_LEVEL_PULSE_SEL_8814B(x) (((x) & BIT_MASK_R_LEVEL_PULSE_SEL_8814B) << BIT_SHIFT_R_LEVEL_PULSE_SEL_8814B)
-#define BIT_GET_R_LEVEL_PULSE_SEL_8814B(x) (((x) >> BIT_SHIFT_R_LEVEL_PULSE_SEL_8814B) & BIT_MASK_R_LEVEL_PULSE_SEL_8814B)

+#define BIT_GET_R_LEVEL_PULSE_SEL_8814B(x) (((x) >> BIT_SHIFT_R_LEVEL_PULSE_SEL_8814B) & BIT_MASK_R_LEVEL_PULSE_SEL_8814B)
+
 
 #define BIT_EN_LA_MAC_8814B BIT(2)
 #define BIT_R_EN_IQDUMP_8814B BIT(1)
@@ -10078,7 +11095,8 @@
 #define BIT_SHIFT_R_WMAC_MASK_LA_MAC_1_8814B 0
 #define BIT_MASK_R_WMAC_MASK_LA_MAC_1_8814B 0xffffffffL
 #define BIT_R_WMAC_MASK_LA_MAC_1_8814B(x) (((x) & BIT_MASK_R_WMAC_MASK_LA_MAC_1_8814B) << BIT_SHIFT_R_WMAC_MASK_LA_MAC_1_8814B)
-#define BIT_GET_R_WMAC_MASK_LA_MAC_1_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_MASK_LA_MAC_1_8814B) & BIT_MASK_R_WMAC_MASK_LA_MAC_1_8814B)

+#define BIT_GET_R_WMAC_MASK_LA_MAC_1_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_MASK_LA_MAC_1_8814B) & BIT_MASK_R_WMAC_MASK_LA_MAC_1_8814B)
+
 
 
 /* 2 REG_IQ_DUMP_2_8814B */
@@ -10086,7 +11104,8 @@
 #define BIT_SHIFT_R_WMAC_MATCH_REF_MAC_2_8814B 0
 #define BIT_MASK_R_WMAC_MATCH_REF_MAC_2_8814B 0xffffffffL
 #define BIT_R_WMAC_MATCH_REF_MAC_2_8814B(x) (((x) & BIT_MASK_R_WMAC_MATCH_REF_MAC_2_8814B) << BIT_SHIFT_R_WMAC_MATCH_REF_MAC_2_8814B)
-#define BIT_GET_R_WMAC_MATCH_REF_MAC_2_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_MATCH_REF_MAC_2_8814B) & BIT_MASK_R_WMAC_MATCH_REF_MAC_2_8814B)

+#define BIT_GET_R_WMAC_MATCH_REF_MAC_2_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_MATCH_REF_MAC_2_8814B) & BIT_MASK_R_WMAC_MATCH_REF_MAC_2_8814B)
+
 
 
 /* 2 REG_WMAC_FTM_CTL_8814B */
@@ -10104,13 +11123,15 @@
 #define BIT_SHIFT_R_OFDM_LEN_8814B 26
 #define BIT_MASK_R_OFDM_LEN_8814B 0x3f
 #define BIT_R_OFDM_LEN_8814B(x) (((x) & BIT_MASK_R_OFDM_LEN_8814B) << BIT_SHIFT_R_OFDM_LEN_8814B)
-#define BIT_GET_R_OFDM_LEN_8814B(x) (((x) >> BIT_SHIFT_R_OFDM_LEN_8814B) & BIT_MASK_R_OFDM_LEN_8814B)

+#define BIT_GET_R_OFDM_LEN_8814B(x) (((x) >> BIT_SHIFT_R_OFDM_LEN_8814B) & BIT_MASK_R_OFDM_LEN_8814B)
+
 
 
 #define BIT_SHIFT_R_CCK_LEN_8814B 0
 #define BIT_MASK_R_CCK_LEN_8814B 0xffff
 #define BIT_R_CCK_LEN_8814B(x) (((x) & BIT_MASK_R_CCK_LEN_8814B) << BIT_SHIFT_R_CCK_LEN_8814B)
-#define BIT_GET_R_CCK_LEN_8814B(x) (((x) >> BIT_SHIFT_R_CCK_LEN_8814B) & BIT_MASK_R_CCK_LEN_8814B)

+#define BIT_GET_R_CCK_LEN_8814B(x) (((x) >> BIT_SHIFT_R_CCK_LEN_8814B) & BIT_MASK_R_CCK_LEN_8814B)
+
 
 
 /* 2 REG_WMAC_OPTION_FUNCTION_1_8814B */
@@ -10118,7 +11139,8 @@
 #define BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_1_8814B 24
 #define BIT_MASK_R_WMAC_RXFIFO_FULL_TH_1_8814B 0xff
 #define BIT_R_WMAC_RXFIFO_FULL_TH_1_8814B(x) (((x) & BIT_MASK_R_WMAC_RXFIFO_FULL_TH_1_8814B) << BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_1_8814B)
-#define BIT_GET_R_WMAC_RXFIFO_FULL_TH_1_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_1_8814B) & BIT_MASK_R_WMAC_RXFIFO_FULL_TH_1_8814B)

+#define BIT_GET_R_WMAC_RXFIFO_FULL_TH_1_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_1_8814B) & BIT_MASK_R_WMAC_RXFIFO_FULL_TH_1_8814B)
+
 
 #define BIT_R_WMAC_RX_SYNCFIFO_SYNC_1_8814B BIT(23)
 #define BIT_R_WMAC_RXRST_DLY_1_8814B BIT(22)
@@ -10150,7 +11172,8 @@
 #define BIT_SHIFT_R_WMAC_RX_FIL_LEN_2_8814B 0
 #define BIT_MASK_R_WMAC_RX_FIL_LEN_2_8814B 0xffff
 #define BIT_R_WMAC_RX_FIL_LEN_2_8814B(x) (((x) & BIT_MASK_R_WMAC_RX_FIL_LEN_2_8814B) << BIT_SHIFT_R_WMAC_RX_FIL_LEN_2_8814B)
-#define BIT_GET_R_WMAC_RX_FIL_LEN_2_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_RX_FIL_LEN_2_8814B) & BIT_MASK_R_WMAC_RX_FIL_LEN_2_8814B)

+#define BIT_GET_R_WMAC_RX_FIL_LEN_2_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_RX_FIL_LEN_2_8814B) & BIT_MASK_R_WMAC_RX_FIL_LEN_2_8814B)
+
 
 
 /* 2 REG_RX_FILTER_FUNCTION_8814B */
@@ -10177,7 +11200,8 @@
 #define BIT_SHIFT_R_WMAC_TXNDP_SIGB_8814B 0
 #define BIT_MASK_R_WMAC_TXNDP_SIGB_8814B 0x1fffff
 #define BIT_R_WMAC_TXNDP_SIGB_8814B(x) (((x) & BIT_MASK_R_WMAC_TXNDP_SIGB_8814B) << BIT_SHIFT_R_WMAC_TXNDP_SIGB_8814B)
-#define BIT_GET_R_WMAC_TXNDP_SIGB_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_TXNDP_SIGB_8814B) & BIT_MASK_R_WMAC_TXNDP_SIGB_8814B)

+#define BIT_GET_R_WMAC_TXNDP_SIGB_8814B(x) (((x) >> BIT_SHIFT_R_WMAC_TXNDP_SIGB_8814B) & BIT_MASK_R_WMAC_TXNDP_SIGB_8814B)
+
 
 
 /* 2 REG_TXCMD_INFO_FOR_RSP_PKT_8814B */
@@ -10185,13 +11209,15 @@
 #define BIT_SHIFT_R_MAC_DBG_SHIFT_8814B 8
 #define BIT_MASK_R_MAC_DBG_SHIFT_8814B 0x7
 #define BIT_R_MAC_DBG_SHIFT_8814B(x) (((x) & BIT_MASK_R_MAC_DBG_SHIFT_8814B) << BIT_SHIFT_R_MAC_DBG_SHIFT_8814B)
-#define BIT_GET_R_MAC_DBG_SHIFT_8814B(x) (((x) >> BIT_SHIFT_R_MAC_DBG_SHIFT_8814B) & BIT_MASK_R_MAC_DBG_SHIFT_8814B)

+#define BIT_GET_R_MAC_DBG_SHIFT_8814B(x) (((x) >> BIT_SHIFT_R_MAC_DBG_SHIFT_8814B) & BIT_MASK_R_MAC_DBG_SHIFT_8814B)
+
 
 
 #define BIT_SHIFT_R_MAC_DBG_SEL_8814B 0
 #define BIT_MASK_R_MAC_DBG_SEL_8814B 0x3
 #define BIT_R_MAC_DBG_SEL_8814B(x) (((x) & BIT_MASK_R_MAC_DBG_SEL_8814B) << BIT_SHIFT_R_MAC_DBG_SEL_8814B)
-#define BIT_GET_R_MAC_DBG_SEL_8814B(x) (((x) >> BIT_SHIFT_R_MAC_DBG_SEL_8814B) & BIT_MASK_R_MAC_DBG_SEL_8814B)

+#define BIT_GET_R_MAC_DBG_SEL_8814B(x) (((x) >> BIT_SHIFT_R_MAC_DBG_SEL_8814B) & BIT_MASK_R_MAC_DBG_SEL_8814B)
+
 
 
 /* 2 REG_TXCMD_INFO_FOR_RSP_PKT_1_8814B */
@@ -10199,7 +11225,8 @@
 #define BIT_SHIFT_R_MAC_DEBUG_1_8814B 0
 #define BIT_MASK_R_MAC_DEBUG_1_8814B 0xffffffffL
 #define BIT_R_MAC_DEBUG_1_8814B(x) (((x) & BIT_MASK_R_MAC_DEBUG_1_8814B) << BIT_SHIFT_R_MAC_DEBUG_1_8814B)
-#define BIT_GET_R_MAC_DEBUG_1_8814B(x) (((x) >> BIT_SHIFT_R_MAC_DEBUG_1_8814B) & BIT_MASK_R_MAC_DEBUG_1_8814B)

+#define BIT_GET_R_MAC_DEBUG_1_8814B(x) (((x) >> BIT_SHIFT_R_MAC_DEBUG_1_8814B) & BIT_MASK_R_MAC_DEBUG_1_8814B)
+
 
 
 /* 2 REG_WSEC_OPTION_8814B */
@@ -10224,13 +11251,15 @@
 #define BIT_SHIFT_WRITE_BYTE_EN_V1_8814B 16
 #define BIT_MASK_WRITE_BYTE_EN_V1_8814B 0xf
 #define BIT_WRITE_BYTE_EN_V1_8814B(x) (((x) & BIT_MASK_WRITE_BYTE_EN_V1_8814B) << BIT_SHIFT_WRITE_BYTE_EN_V1_8814B)
-#define BIT_GET_WRITE_BYTE_EN_V1_8814B(x) (((x) >> BIT_SHIFT_WRITE_BYTE_EN_V1_8814B) & BIT_MASK_WRITE_BYTE_EN_V1_8814B)

+#define BIT_GET_WRITE_BYTE_EN_V1_8814B(x) (((x) >> BIT_SHIFT_WRITE_BYTE_EN_V1_8814B) & BIT_MASK_WRITE_BYTE_EN_V1_8814B)
+
 
 
 #define BIT_SHIFT_LTECOEX_REG_ADDR_V1_8814B 0
 #define BIT_MASK_LTECOEX_REG_ADDR_V1_8814B 0xffff
 #define BIT_LTECOEX_REG_ADDR_V1_8814B(x) (((x) & BIT_MASK_LTECOEX_REG_ADDR_V1_8814B) << BIT_SHIFT_LTECOEX_REG_ADDR_V1_8814B)
-#define BIT_GET_LTECOEX_REG_ADDR_V1_8814B(x) (((x) >> BIT_SHIFT_LTECOEX_REG_ADDR_V1_8814B) & BIT_MASK_LTECOEX_REG_ADDR_V1_8814B)

+#define BIT_GET_LTECOEX_REG_ADDR_V1_8814B(x) (((x) >> BIT_SHIFT_LTECOEX_REG_ADDR_V1_8814B) & BIT_MASK_LTECOEX_REG_ADDR_V1_8814B)
+
 
 
 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_WRITE_DATA_V1_8814B */
@@ -10238,7 +11267,8 @@
 #define BIT_SHIFT_LTECOEX_W_DATA_V1_8814B 0
 #define BIT_MASK_LTECOEX_W_DATA_V1_8814B 0xffffffffL
 #define BIT_LTECOEX_W_DATA_V1_8814B(x) (((x) & BIT_MASK_LTECOEX_W_DATA_V1_8814B) << BIT_SHIFT_LTECOEX_W_DATA_V1_8814B)
-#define BIT_GET_LTECOEX_W_DATA_V1_8814B(x) (((x) >> BIT_SHIFT_LTECOEX_W_DATA_V1_8814B) & BIT_MASK_LTECOEX_W_DATA_V1_8814B)

+#define BIT_GET_LTECOEX_W_DATA_V1_8814B(x) (((x) >> BIT_SHIFT_LTECOEX_W_DATA_V1_8814B) & BIT_MASK_LTECOEX_W_DATA_V1_8814B)
+
 
 
 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_READ_DATA_V1_8814B */
@@ -10246,7 +11276,8 @@
 #define BIT_SHIFT_LTECOEX_R_DATA_V1_8814B 0
 #define BIT_MASK_LTECOEX_R_DATA_V1_8814B 0xffffffffL
 #define BIT_LTECOEX_R_DATA_V1_8814B(x) (((x) & BIT_MASK_LTECOEX_R_DATA_V1_8814B) << BIT_SHIFT_LTECOEX_R_DATA_V1_8814B)
-#define BIT_GET_LTECOEX_R_DATA_V1_8814B(x) (((x) >> BIT_SHIFT_LTECOEX_R_DATA_V1_8814B) & BIT_MASK_LTECOEX_R_DATA_V1_8814B)

+#define BIT_GET_LTECOEX_R_DATA_V1_8814B(x) (((x) >> BIT_SHIFT_LTECOEX_R_DATA_V1_8814B) & BIT_MASK_LTECOEX_R_DATA_V1_8814B)
+
 
 
 /* 2 REG_NOT_VALID_8814B */
@@ -10376,7 +11407,8 @@
 #define BIT_SHIFT_SDIO_INT_TIMEOUT_8814B 16
 #define BIT_MASK_SDIO_INT_TIMEOUT_8814B 0xffff
 #define BIT_SDIO_INT_TIMEOUT_8814B(x) (((x) & BIT_MASK_SDIO_INT_TIMEOUT_8814B) << BIT_SHIFT_SDIO_INT_TIMEOUT_8814B)
-#define BIT_GET_SDIO_INT_TIMEOUT_8814B(x) (((x) >> BIT_SHIFT_SDIO_INT_TIMEOUT_8814B) & BIT_MASK_SDIO_INT_TIMEOUT_8814B)

+#define BIT_GET_SDIO_INT_TIMEOUT_8814B(x) (((x) >> BIT_SHIFT_SDIO_INT_TIMEOUT_8814B) & BIT_MASK_SDIO_INT_TIMEOUT_8814B)
+
 
 #define BIT_IO_ERR_STATUS_8814B BIT(15)
 #define BIT_REPLY_ERRCRC_IN_DATA_8814B BIT(9)
@@ -10445,7 +11477,8 @@
 #define BIT_SHIFT_RX_REQ_LEN_V1_8814B 0
 #define BIT_MASK_RX_REQ_LEN_V1_8814B 0x3ffff
 #define BIT_RX_REQ_LEN_V1_8814B(x) (((x) & BIT_MASK_RX_REQ_LEN_V1_8814B) << BIT_SHIFT_RX_REQ_LEN_V1_8814B)
-#define BIT_GET_RX_REQ_LEN_V1_8814B(x) (((x) >> BIT_SHIFT_RX_REQ_LEN_V1_8814B) & BIT_MASK_RX_REQ_LEN_V1_8814B)

+#define BIT_GET_RX_REQ_LEN_V1_8814B(x) (((x) >> BIT_SHIFT_RX_REQ_LEN_V1_8814B) & BIT_MASK_RX_REQ_LEN_V1_8814B)
+
 
 
 /* 2 REG_SDIO_FREE_TXPG_SEQ_V1_8814B */
@@ -10453,7 +11486,8 @@
 #define BIT_SHIFT_FREE_TXPG_SEQ_8814B 0
 #define BIT_MASK_FREE_TXPG_SEQ_8814B 0xff
 #define BIT_FREE_TXPG_SEQ_8814B(x) (((x) & BIT_MASK_FREE_TXPG_SEQ_8814B) << BIT_SHIFT_FREE_TXPG_SEQ_8814B)
-#define BIT_GET_FREE_TXPG_SEQ_8814B(x) (((x) >> BIT_SHIFT_FREE_TXPG_SEQ_8814B) & BIT_MASK_FREE_TXPG_SEQ_8814B)

+#define BIT_GET_FREE_TXPG_SEQ_8814B(x) (((x) >> BIT_SHIFT_FREE_TXPG_SEQ_8814B) & BIT_MASK_FREE_TXPG_SEQ_8814B)
+
 
 
 /* 2 REG_SDIO_FREE_TXPG_8814B */
@@ -10461,13 +11495,15 @@
 #define BIT_SHIFT_MID_FREEPG_V1_8814B 16
 #define BIT_MASK_MID_FREEPG_V1_8814B 0xfff
 #define BIT_MID_FREEPG_V1_8814B(x) (((x) & BIT_MASK_MID_FREEPG_V1_8814B) << BIT_SHIFT_MID_FREEPG_V1_8814B)
-#define BIT_GET_MID_FREEPG_V1_8814B(x) (((x) >> BIT_SHIFT_MID_FREEPG_V1_8814B) & BIT_MASK_MID_FREEPG_V1_8814B)

+#define BIT_GET_MID_FREEPG_V1_8814B(x) (((x) >> BIT_SHIFT_MID_FREEPG_V1_8814B) & BIT_MASK_MID_FREEPG_V1_8814B)
+
 
 
 #define BIT_SHIFT_HIQ_FREEPG_V1_8814B 0
 #define BIT_MASK_HIQ_FREEPG_V1_8814B 0xfff
 #define BIT_HIQ_FREEPG_V1_8814B(x) (((x) & BIT_MASK_HIQ_FREEPG_V1_8814B) << BIT_SHIFT_HIQ_FREEPG_V1_8814B)
-#define BIT_GET_HIQ_FREEPG_V1_8814B(x) (((x) >> BIT_SHIFT_HIQ_FREEPG_V1_8814B) & BIT_MASK_HIQ_FREEPG_V1_8814B)

+#define BIT_GET_HIQ_FREEPG_V1_8814B(x) (((x) >> BIT_SHIFT_HIQ_FREEPG_V1_8814B) & BIT_MASK_HIQ_FREEPG_V1_8814B)
+
 
 
 /* 2 REG_SDIO_FREE_TXPG2_8814B */
@@ -10475,13 +11511,15 @@
 #define BIT_SHIFT_PUB_FREEPG_V1_8814B 16
 #define BIT_MASK_PUB_FREEPG_V1_8814B 0xfff
 #define BIT_PUB_FREEPG_V1_8814B(x) (((x) & BIT_MASK_PUB_FREEPG_V1_8814B) << BIT_SHIFT_PUB_FREEPG_V1_8814B)
-#define BIT_GET_PUB_FREEPG_V1_8814B(x) (((x) >> BIT_SHIFT_PUB_FREEPG_V1_8814B) & BIT_MASK_PUB_FREEPG_V1_8814B)

+#define BIT_GET_PUB_FREEPG_V1_8814B(x) (((x) >> BIT_SHIFT_PUB_FREEPG_V1_8814B) & BIT_MASK_PUB_FREEPG_V1_8814B)
+
 
 
 #define BIT_SHIFT_LOW_FREEPG_V1_8814B 0
 #define BIT_MASK_LOW_FREEPG_V1_8814B 0xfff
 #define BIT_LOW_FREEPG_V1_8814B(x) (((x) & BIT_MASK_LOW_FREEPG_V1_8814B) << BIT_SHIFT_LOW_FREEPG_V1_8814B)
-#define BIT_GET_LOW_FREEPG_V1_8814B(x) (((x) >> BIT_SHIFT_LOW_FREEPG_V1_8814B) & BIT_MASK_LOW_FREEPG_V1_8814B)

+#define BIT_GET_LOW_FREEPG_V1_8814B(x) (((x) >> BIT_SHIFT_LOW_FREEPG_V1_8814B) & BIT_MASK_LOW_FREEPG_V1_8814B)
+
 
 
 /* 2 REG_SDIO_OQT_FREE_TXPG_V1_8814B */
@@ -10489,19 +11527,22 @@
 #define BIT_SHIFT_NOAC_OQT_FREEPG_V1_8814B 24
 #define BIT_MASK_NOAC_OQT_FREEPG_V1_8814B 0xff
 #define BIT_NOAC_OQT_FREEPG_V1_8814B(x) (((x) & BIT_MASK_NOAC_OQT_FREEPG_V1_8814B) << BIT_SHIFT_NOAC_OQT_FREEPG_V1_8814B)
-#define BIT_GET_NOAC_OQT_FREEPG_V1_8814B(x) (((x) >> BIT_SHIFT_NOAC_OQT_FREEPG_V1_8814B) & BIT_MASK_NOAC_OQT_FREEPG_V1_8814B)

+#define BIT_GET_NOAC_OQT_FREEPG_V1_8814B(x) (((x) >> BIT_SHIFT_NOAC_OQT_FREEPG_V1_8814B) & BIT_MASK_NOAC_OQT_FREEPG_V1_8814B)
+
 
 
 #define BIT_SHIFT_AC_OQT_FREEPG_V1_8814B 16
 #define BIT_MASK_AC_OQT_FREEPG_V1_8814B 0xff
 #define BIT_AC_OQT_FREEPG_V1_8814B(x) (((x) & BIT_MASK_AC_OQT_FREEPG_V1_8814B) << BIT_SHIFT_AC_OQT_FREEPG_V1_8814B)
-#define BIT_GET_AC_OQT_FREEPG_V1_8814B(x) (((x) >> BIT_SHIFT_AC_OQT_FREEPG_V1_8814B) & BIT_MASK_AC_OQT_FREEPG_V1_8814B)

+#define BIT_GET_AC_OQT_FREEPG_V1_8814B(x) (((x) >> BIT_SHIFT_AC_OQT_FREEPG_V1_8814B) & BIT_MASK_AC_OQT_FREEPG_V1_8814B)
+
 
 
 #define BIT_SHIFT_EXQ_FREEPG_V1_8814B 0
 #define BIT_MASK_EXQ_FREEPG_V1_8814B 0xfff
 #define BIT_EXQ_FREEPG_V1_8814B(x) (((x) & BIT_MASK_EXQ_FREEPG_V1_8814B) << BIT_SHIFT_EXQ_FREEPG_V1_8814B)
-#define BIT_GET_EXQ_FREEPG_V1_8814B(x) (((x) >> BIT_SHIFT_EXQ_FREEPG_V1_8814B) & BIT_MASK_EXQ_FREEPG_V1_8814B)

+#define BIT_GET_EXQ_FREEPG_V1_8814B(x) (((x) >> BIT_SHIFT_EXQ_FREEPG_V1_8814B) & BIT_MASK_EXQ_FREEPG_V1_8814B)
+
 
 
 /* 2 REG_SDIO_HTSFR_INFO_8814B */
@@ -10509,13 +11550,15 @@
 #define BIT_SHIFT_HTSFR1_8814B 16
 #define BIT_MASK_HTSFR1_8814B 0xffff
 #define BIT_HTSFR1_8814B(x) (((x) & BIT_MASK_HTSFR1_8814B) << BIT_SHIFT_HTSFR1_8814B)
-#define BIT_GET_HTSFR1_8814B(x) (((x) >> BIT_SHIFT_HTSFR1_8814B) & BIT_MASK_HTSFR1_8814B)

+#define BIT_GET_HTSFR1_8814B(x) (((x) >> BIT_SHIFT_HTSFR1_8814B) & BIT_MASK_HTSFR1_8814B)
+
 
 
 #define BIT_SHIFT_HTSFR0_8814B 0
 #define BIT_MASK_HTSFR0_8814B 0xffff
 #define BIT_HTSFR0_8814B(x) (((x) & BIT_MASK_HTSFR0_8814B) << BIT_SHIFT_HTSFR0_8814B)
-#define BIT_GET_HTSFR0_8814B(x) (((x) >> BIT_SHIFT_HTSFR0_8814B) & BIT_MASK_HTSFR0_8814B)

+#define BIT_GET_HTSFR0_8814B(x) (((x) >> BIT_SHIFT_HTSFR0_8814B) & BIT_MASK_HTSFR0_8814B)
+
 
 
 /* 2 REG_SDIO_HCPWM1_V2_8814B */
@@ -10533,13 +11576,15 @@
 #define BIT_SHIFT_INDIRECT_REG_SIZE_8814B 16
 #define BIT_MASK_INDIRECT_REG_SIZE_8814B 0x3
 #define BIT_INDIRECT_REG_SIZE_8814B(x) (((x) & BIT_MASK_INDIRECT_REG_SIZE_8814B) << BIT_SHIFT_INDIRECT_REG_SIZE_8814B)
-#define BIT_GET_INDIRECT_REG_SIZE_8814B(x) (((x) >> BIT_SHIFT_INDIRECT_REG_SIZE_8814B) & BIT_MASK_INDIRECT_REG_SIZE_8814B)

+#define BIT_GET_INDIRECT_REG_SIZE_8814B(x) (((x) >> BIT_SHIFT_INDIRECT_REG_SIZE_8814B) & BIT_MASK_INDIRECT_REG_SIZE_8814B)
+
 
 
 #define BIT_SHIFT_INDIRECT_REG_ADDR_8814B 0
 #define BIT_MASK_INDIRECT_REG_ADDR_8814B 0xffff
 #define BIT_INDIRECT_REG_ADDR_8814B(x) (((x) & BIT_MASK_INDIRECT_REG_ADDR_8814B) << BIT_SHIFT_INDIRECT_REG_ADDR_8814B)
-#define BIT_GET_INDIRECT_REG_ADDR_8814B(x) (((x) >> BIT_SHIFT_INDIRECT_REG_ADDR_8814B) & BIT_MASK_INDIRECT_REG_ADDR_8814B)

+#define BIT_GET_INDIRECT_REG_ADDR_8814B(x) (((x) >> BIT_SHIFT_INDIRECT_REG_ADDR_8814B) & BIT_MASK_INDIRECT_REG_ADDR_8814B)
+
 
 
 /* 2 REG_SDIO_INDIRECT_REG_DATA_8814B */
@@ -10547,7 +11592,8 @@
 #define BIT_SHIFT_INDIRECT_REG_DATA_8814B 0
 #define BIT_MASK_INDIRECT_REG_DATA_8814B 0xffffffffL
 #define BIT_INDIRECT_REG_DATA_8814B(x) (((x) & BIT_MASK_INDIRECT_REG_DATA_8814B) << BIT_SHIFT_INDIRECT_REG_DATA_8814B)
-#define BIT_GET_INDIRECT_REG_DATA_8814B(x) (((x) >> BIT_SHIFT_INDIRECT_REG_DATA_8814B) & BIT_MASK_INDIRECT_REG_DATA_8814B)

+#define BIT_GET_INDIRECT_REG_DATA_8814B(x) (((x) >> BIT_SHIFT_INDIRECT_REG_DATA_8814B) & BIT_MASK_INDIRECT_REG_DATA_8814B)
+
 
 
 /* 2 REG_SDIO_H2C_8814B */
@@ -10555,7 +11601,8 @@
 #define BIT_SHIFT_SDIO_H2C_MSG_8814B 0
 #define BIT_MASK_SDIO_H2C_MSG_8814B 0xffffffffL
 #define BIT_SDIO_H2C_MSG_8814B(x) (((x) & BIT_MASK_SDIO_H2C_MSG_8814B) << BIT_SHIFT_SDIO_H2C_MSG_8814B)
-#define BIT_GET_SDIO_H2C_MSG_8814B(x) (((x) >> BIT_SHIFT_SDIO_H2C_MSG_8814B) & BIT_MASK_SDIO_H2C_MSG_8814B)

+#define BIT_GET_SDIO_H2C_MSG_8814B(x) (((x) >> BIT_SHIFT_SDIO_H2C_MSG_8814B) & BIT_MASK_SDIO_H2C_MSG_8814B)
+
 
 
 /* 2 REG_SDIO_C2H_8814B */
@@ -10563,7 +11610,8 @@
 #define BIT_SHIFT_SDIO_C2H_MSG_8814B 0
 #define BIT_MASK_SDIO_C2H_MSG_8814B 0xffffffffL
 #define BIT_SDIO_C2H_MSG_8814B(x) (((x) & BIT_MASK_SDIO_C2H_MSG_8814B) << BIT_SHIFT_SDIO_C2H_MSG_8814B)
-#define BIT_GET_SDIO_C2H_MSG_8814B(x) (((x) >> BIT_SHIFT_SDIO_C2H_MSG_8814B) & BIT_MASK_SDIO_C2H_MSG_8814B)

+#define BIT_GET_SDIO_C2H_MSG_8814B(x) (((x) >> BIT_SHIFT_SDIO_C2H_MSG_8814B) & BIT_MASK_SDIO_C2H_MSG_8814B)
+
 
 
 /* 2 REG_SDIO_HRPWM1_8814B */
@@ -10593,7 +11641,8 @@
 #define BIT_SHIFT_CMDIN_2RESP_TIMER_8814B 0
 #define BIT_MASK_CMDIN_2RESP_TIMER_8814B 0xffff
 #define BIT_CMDIN_2RESP_TIMER_8814B(x) (((x) & BIT_MASK_CMDIN_2RESP_TIMER_8814B) << BIT_SHIFT_CMDIN_2RESP_TIMER_8814B)
-#define BIT_GET_CMDIN_2RESP_TIMER_8814B(x) (((x) >> BIT_SHIFT_CMDIN_2RESP_TIMER_8814B) & BIT_MASK_CMDIN_2RESP_TIMER_8814B)

+#define BIT_GET_CMDIN_2RESP_TIMER_8814B(x) (((x) >> BIT_SHIFT_CMDIN_2RESP_TIMER_8814B) & BIT_MASK_CMDIN_2RESP_TIMER_8814B)
+
 
 
 /* 2 REG_SDIO_CMD_CRC_8814B */
@@ -10601,7 +11650,8 @@
 #define BIT_SHIFT_SDIO_CMD_CRC_V1_8814B 0
 #define BIT_MASK_SDIO_CMD_CRC_V1_8814B 0xff
 #define BIT_SDIO_CMD_CRC_V1_8814B(x) (((x) & BIT_MASK_SDIO_CMD_CRC_V1_8814B) << BIT_SHIFT_SDIO_CMD_CRC_V1_8814B)
-#define BIT_GET_SDIO_CMD_CRC_V1_8814B(x) (((x) >> BIT_SHIFT_SDIO_CMD_CRC_V1_8814B) & BIT_MASK_SDIO_CMD_CRC_V1_8814B)

+#define BIT_GET_SDIO_CMD_CRC_V1_8814B(x) (((x) >> BIT_SHIFT_SDIO_CMD_CRC_V1_8814B) & BIT_MASK_SDIO_CMD_CRC_V1_8814B)
+
 
 
 /* 2 REG_SDIO_HSISR_8814B */
@@ -10625,7 +11675,8 @@
 #define BIT_SHIFT_CMD_CRC_ERR_CNT_8814B 0
 #define BIT_MASK_CMD_CRC_ERR_CNT_8814B 0xff
 #define BIT_CMD_CRC_ERR_CNT_8814B(x) (((x) & BIT_MASK_CMD_CRC_ERR_CNT_8814B) << BIT_SHIFT_CMD_CRC_ERR_CNT_8814B)
-#define BIT_GET_CMD_CRC_ERR_CNT_8814B(x) (((x) >> BIT_SHIFT_CMD_CRC_ERR_CNT_8814B) & BIT_MASK_CMD_CRC_ERR_CNT_8814B)

+#define BIT_GET_CMD_CRC_ERR_CNT_8814B(x) (((x) >> BIT_SHIFT_CMD_CRC_ERR_CNT_8814B) & BIT_MASK_CMD_CRC_ERR_CNT_8814B)
+
 
 
 /* 2 REG_SDIO_DATA_ERRCNT_8814B */
@@ -10633,7 +11684,8 @@
 #define BIT_SHIFT_DATA_CRC_ERR_CNT_8814B 0
 #define BIT_MASK_DATA_CRC_ERR_CNT_8814B 0xff
 #define BIT_DATA_CRC_ERR_CNT_8814B(x) (((x) & BIT_MASK_DATA_CRC_ERR_CNT_8814B) << BIT_SHIFT_DATA_CRC_ERR_CNT_8814B)
-#define BIT_GET_DATA_CRC_ERR_CNT_8814B(x) (((x) >> BIT_SHIFT_DATA_CRC_ERR_CNT_8814B) & BIT_MASK_DATA_CRC_ERR_CNT_8814B)

+#define BIT_GET_DATA_CRC_ERR_CNT_8814B(x) (((x) >> BIT_SHIFT_DATA_CRC_ERR_CNT_8814B) & BIT_MASK_DATA_CRC_ERR_CNT_8814B)
+
 
 
 /* 2 REG_SDIO_CMD_ERR_CONTENT_8814B */
@@ -10641,7 +11693,8 @@
 #define BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8814B 0
 #define BIT_MASK_SDIO_CMD_ERR_CONTENT_8814B 0xffffffffffL
 #define BIT_SDIO_CMD_ERR_CONTENT_8814B(x) (((x) & BIT_MASK_SDIO_CMD_ERR_CONTENT_8814B) << BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8814B)
-#define BIT_GET_SDIO_CMD_ERR_CONTENT_8814B(x) (((x) >> BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8814B) & BIT_MASK_SDIO_CMD_ERR_CONTENT_8814B)

+#define BIT_GET_SDIO_CMD_ERR_CONTENT_8814B(x) (((x) >> BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8814B) & BIT_MASK_SDIO_CMD_ERR_CONTENT_8814B)
+
 
 
 /* 2 REG_SDIO_CRC_ERR_IDX_8814B */
@@ -10656,7 +11709,8 @@
 #define BIT_SHIFT_SDIO_DATA_CRC_8814B 0
 #define BIT_MASK_SDIO_DATA_CRC_8814B 0xff
 #define BIT_SDIO_DATA_CRC_8814B(x) (((x) & BIT_MASK_SDIO_DATA_CRC_8814B) << BIT_SHIFT_SDIO_DATA_CRC_8814B)
-#define BIT_GET_SDIO_DATA_CRC_8814B(x) (((x) >> BIT_SHIFT_SDIO_DATA_CRC_8814B) & BIT_MASK_SDIO_DATA_CRC_8814B)

+#define BIT_GET_SDIO_DATA_CRC_8814B(x) (((x) >> BIT_SHIFT_SDIO_DATA_CRC_8814B) & BIT_MASK_SDIO_DATA_CRC_8814B)
+
 
 
 /* 2 REG_SDIO_DATA_REPLY_TIME_8814B */
@@ -10664,7 +11718,8 @@
 #define BIT_SHIFT_SDIO_DATA_REPLY_TIME_8814B 0
 #define BIT_MASK_SDIO_DATA_REPLY_TIME_8814B 0x7
 #define BIT_SDIO_DATA_REPLY_TIME_8814B(x) (((x) & BIT_MASK_SDIO_DATA_REPLY_TIME_8814B) << BIT_SHIFT_SDIO_DATA_REPLY_TIME_8814B)
-#define BIT_GET_SDIO_DATA_REPLY_TIME_8814B(x) (((x) >> BIT_SHIFT_SDIO_DATA_REPLY_TIME_8814B) & BIT_MASK_SDIO_DATA_REPLY_TIME_8814B)

+#define BIT_GET_SDIO_DATA_REPLY_TIME_8814B(x) (((x) >> BIT_SHIFT_SDIO_DATA_REPLY_TIME_8814B) & BIT_MASK_SDIO_DATA_REPLY_TIME_8814B)
+
 
 
 #endif
diff --git a/rtl8822BU/hal/halmac/halmac_bit_8821c.h b/rtl8822BU/hal/halmac/halmac_bit_8821c.h
index d7568ff..880146b 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_bit_8821c.h
+++ b/rtl8822BU/hal/halmac/halmac_bit_8821c.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef __INC_HALMAC_BIT_8821C_H
 #define __INC_HALMAC_BIT_8821C_H
 
@@ -92,13 +107,15 @@
 #define BIT_SHIFT_VPDIDX_8821C 8
 #define BIT_MASK_VPDIDX_8821C 0xff
 #define BIT_VPDIDX_8821C(x) (((x) & BIT_MASK_VPDIDX_8821C) << BIT_SHIFT_VPDIDX_8821C)
-#define BIT_GET_VPDIDX_8821C(x) (((x) >> BIT_SHIFT_VPDIDX_8821C) & BIT_MASK_VPDIDX_8821C)

+#define BIT_GET_VPDIDX_8821C(x) (((x) >> BIT_SHIFT_VPDIDX_8821C) & BIT_MASK_VPDIDX_8821C)
+
 
 
 #define BIT_SHIFT_EEM1_0_8821C 6
 #define BIT_MASK_EEM1_0_8821C 0x3
 #define BIT_EEM1_0_8821C(x) (((x) & BIT_MASK_EEM1_0_8821C) << BIT_SHIFT_EEM1_0_8821C)
-#define BIT_GET_EEM1_0_8821C(x) (((x) >> BIT_SHIFT_EEM1_0_8821C) & BIT_MASK_EEM1_0_8821C)

+#define BIT_GET_EEM1_0_8821C(x) (((x) >> BIT_SHIFT_EEM1_0_8821C) & BIT_MASK_EEM1_0_8821C)
+
 
 #define BIT_AUTOLOAD_SUS_8821C BIT(5)
 #define BIT_EERPOMSEL_8821C BIT(4)
@@ -112,7 +129,8 @@
 #define BIT_SHIFT_VPD_DATA_8821C 0
 #define BIT_MASK_VPD_DATA_8821C 0xffffffffL
 #define BIT_VPD_DATA_8821C(x) (((x) & BIT_MASK_VPD_DATA_8821C) << BIT_SHIFT_VPD_DATA_8821C)
-#define BIT_GET_VPD_DATA_8821C(x) (((x) >> BIT_SHIFT_VPD_DATA_8821C) & BIT_MASK_VPD_DATA_8821C)

+#define BIT_GET_VPD_DATA_8821C(x) (((x) >> BIT_SHIFT_VPD_DATA_8821C) & BIT_MASK_VPD_DATA_8821C)
+
 
 
 /* 2 REG_SYS_SWR_CTRL1_8821C */
@@ -121,20 +139,23 @@
 #define BIT_SHIFT_C1_L_8821C 29
 #define BIT_MASK_C1_L_8821C 0x3
 #define BIT_C1_L_8821C(x) (((x) & BIT_MASK_C1_L_8821C) << BIT_SHIFT_C1_L_8821C)
-#define BIT_GET_C1_L_8821C(x) (((x) >> BIT_SHIFT_C1_L_8821C) & BIT_MASK_C1_L_8821C)

+#define BIT_GET_C1_L_8821C(x) (((x) >> BIT_SHIFT_C1_L_8821C) & BIT_MASK_C1_L_8821C)
+
 
 
 #define BIT_SHIFT_REG_FREQ_L_8821C 25
 #define BIT_MASK_REG_FREQ_L_8821C 0x7
 #define BIT_REG_FREQ_L_8821C(x) (((x) & BIT_MASK_REG_FREQ_L_8821C) << BIT_SHIFT_REG_FREQ_L_8821C)
-#define BIT_GET_REG_FREQ_L_8821C(x) (((x) >> BIT_SHIFT_REG_FREQ_L_8821C) & BIT_MASK_REG_FREQ_L_8821C)

+#define BIT_GET_REG_FREQ_L_8821C(x) (((x) >> BIT_SHIFT_REG_FREQ_L_8821C) & BIT_MASK_REG_FREQ_L_8821C)
+
 
 #define BIT_REG_EN_DUTY_8821C BIT(24)
 
 #define BIT_SHIFT_REG_MODE_8821C 22
 #define BIT_MASK_REG_MODE_8821C 0x3
 #define BIT_REG_MODE_8821C(x) (((x) & BIT_MASK_REG_MODE_8821C) << BIT_SHIFT_REG_MODE_8821C)
-#define BIT_GET_REG_MODE_8821C(x) (((x) >> BIT_SHIFT_REG_MODE_8821C) & BIT_MASK_REG_MODE_8821C)

+#define BIT_GET_REG_MODE_8821C(x) (((x) >> BIT_SHIFT_REG_MODE_8821C) & BIT_MASK_REG_MODE_8821C)
+
 
 #define BIT_REG_EN_SP_8821C BIT(21)
 #define BIT_REG_AUTO_L_8821C BIT(20)
@@ -144,13 +165,15 @@
 #define BIT_SHIFT_OCP_L1_8821C 15
 #define BIT_MASK_OCP_L1_8821C 0x7
 #define BIT_OCP_L1_8821C(x) (((x) & BIT_MASK_OCP_L1_8821C) << BIT_SHIFT_OCP_L1_8821C)
-#define BIT_GET_OCP_L1_8821C(x) (((x) >> BIT_SHIFT_OCP_L1_8821C) & BIT_MASK_OCP_L1_8821C)

+#define BIT_GET_OCP_L1_8821C(x) (((x) >> BIT_SHIFT_OCP_L1_8821C) & BIT_MASK_OCP_L1_8821C)
+
 
 
 #define BIT_SHIFT_CF_L_8821C 13
 #define BIT_MASK_CF_L_8821C 0x3
 #define BIT_CF_L_8821C(x) (((x) & BIT_MASK_CF_L_8821C) << BIT_SHIFT_CF_L_8821C)
-#define BIT_GET_CF_L_8821C(x) (((x) >> BIT_SHIFT_CF_L_8821C) & BIT_MASK_CF_L_8821C)

+#define BIT_GET_CF_L_8821C(x) (((x) >> BIT_SHIFT_CF_L_8821C) & BIT_MASK_CF_L_8821C)
+
 
 #define BIT_SW18_FPWM_8821C BIT(11)
 #define BIT_SW18_SWEN_8821C BIT(9)
@@ -165,31 +188,36 @@
 #define BIT_SHIFT_REG_DELAY_8821C 28
 #define BIT_MASK_REG_DELAY_8821C 0x3
 #define BIT_REG_DELAY_8821C(x) (((x) & BIT_MASK_REG_DELAY_8821C) << BIT_SHIFT_REG_DELAY_8821C)
-#define BIT_GET_REG_DELAY_8821C(x) (((x) >> BIT_SHIFT_REG_DELAY_8821C) & BIT_MASK_REG_DELAY_8821C)

+#define BIT_GET_REG_DELAY_8821C(x) (((x) >> BIT_SHIFT_REG_DELAY_8821C) & BIT_MASK_REG_DELAY_8821C)
+
 
 
 #define BIT_SHIFT_V15ADJ_L1_V1_8821C 24
 #define BIT_MASK_V15ADJ_L1_V1_8821C 0x7
 #define BIT_V15ADJ_L1_V1_8821C(x) (((x) & BIT_MASK_V15ADJ_L1_V1_8821C) << BIT_SHIFT_V15ADJ_L1_V1_8821C)
-#define BIT_GET_V15ADJ_L1_V1_8821C(x) (((x) >> BIT_SHIFT_V15ADJ_L1_V1_8821C) & BIT_MASK_V15ADJ_L1_V1_8821C)

+#define BIT_GET_V15ADJ_L1_V1_8821C(x) (((x) >> BIT_SHIFT_V15ADJ_L1_V1_8821C) & BIT_MASK_V15ADJ_L1_V1_8821C)
+
 
 
 #define BIT_SHIFT_VOL_L1_V1_8821C 20
 #define BIT_MASK_VOL_L1_V1_8821C 0xf
 #define BIT_VOL_L1_V1_8821C(x) (((x) & BIT_MASK_VOL_L1_V1_8821C) << BIT_SHIFT_VOL_L1_V1_8821C)
-#define BIT_GET_VOL_L1_V1_8821C(x) (((x) >> BIT_SHIFT_VOL_L1_V1_8821C) & BIT_MASK_VOL_L1_V1_8821C)

+#define BIT_GET_VOL_L1_V1_8821C(x) (((x) >> BIT_SHIFT_VOL_L1_V1_8821C) & BIT_MASK_VOL_L1_V1_8821C)
+
 
 
 #define BIT_SHIFT_IN_L1_V1_8821C 17
 #define BIT_MASK_IN_L1_V1_8821C 0x7
 #define BIT_IN_L1_V1_8821C(x) (((x) & BIT_MASK_IN_L1_V1_8821C) << BIT_SHIFT_IN_L1_V1_8821C)
-#define BIT_GET_IN_L1_V1_8821C(x) (((x) >> BIT_SHIFT_IN_L1_V1_8821C) & BIT_MASK_IN_L1_V1_8821C)

+#define BIT_GET_IN_L1_V1_8821C(x) (((x) >> BIT_SHIFT_IN_L1_V1_8821C) & BIT_MASK_IN_L1_V1_8821C)
+
 
 
 #define BIT_SHIFT_TBOX_L1_8821C 15
 #define BIT_MASK_TBOX_L1_8821C 0x3
 #define BIT_TBOX_L1_8821C(x) (((x) & BIT_MASK_TBOX_L1_8821C) << BIT_SHIFT_TBOX_L1_8821C)
-#define BIT_GET_TBOX_L1_8821C(x) (((x) >> BIT_SHIFT_TBOX_L1_8821C) & BIT_MASK_TBOX_L1_8821C)

+#define BIT_GET_TBOX_L1_8821C(x) (((x) >> BIT_SHIFT_TBOX_L1_8821C) & BIT_MASK_TBOX_L1_8821C)
+
 
 #define BIT_SW18_SEL_8821C BIT(13)
 
@@ -199,25 +227,29 @@
 #define BIT_SHIFT_R3_L_8821C 7
 #define BIT_MASK_R3_L_8821C 0x3
 #define BIT_R3_L_8821C(x) (((x) & BIT_MASK_R3_L_8821C) << BIT_SHIFT_R3_L_8821C)
-#define BIT_GET_R3_L_8821C(x) (((x) >> BIT_SHIFT_R3_L_8821C) & BIT_MASK_R3_L_8821C)

+#define BIT_GET_R3_L_8821C(x) (((x) >> BIT_SHIFT_R3_L_8821C) & BIT_MASK_R3_L_8821C)
+
 
 
 #define BIT_SHIFT_SW18_R2_8821C 5
 #define BIT_MASK_SW18_R2_8821C 0x3
 #define BIT_SW18_R2_8821C(x) (((x) & BIT_MASK_SW18_R2_8821C) << BIT_SHIFT_SW18_R2_8821C)
-#define BIT_GET_SW18_R2_8821C(x) (((x) >> BIT_SHIFT_SW18_R2_8821C) & BIT_MASK_SW18_R2_8821C)

+#define BIT_GET_SW18_R2_8821C(x) (((x) >> BIT_SHIFT_SW18_R2_8821C) & BIT_MASK_SW18_R2_8821C)
+
 
 
 #define BIT_SHIFT_SW18_R1_8821C 3
 #define BIT_MASK_SW18_R1_8821C 0x3
 #define BIT_SW18_R1_8821C(x) (((x) & BIT_MASK_SW18_R1_8821C) << BIT_SHIFT_SW18_R1_8821C)
-#define BIT_GET_SW18_R1_8821C(x) (((x) >> BIT_SHIFT_SW18_R1_8821C) & BIT_MASK_SW18_R1_8821C)

+#define BIT_GET_SW18_R1_8821C(x) (((x) >> BIT_SHIFT_SW18_R1_8821C) & BIT_MASK_SW18_R1_8821C)
+
 
 
 #define BIT_SHIFT_C3_L_C3_8821C 1
 #define BIT_MASK_C3_L_C3_8821C 0x3
 #define BIT_C3_L_C3_8821C(x) (((x) & BIT_MASK_C3_L_C3_8821C) << BIT_SHIFT_C3_L_C3_8821C)
-#define BIT_GET_C3_L_C3_8821C(x) (((x) >> BIT_SHIFT_C3_L_C3_8821C) & BIT_MASK_C3_L_C3_8821C)

+#define BIT_GET_C3_L_C3_8821C(x) (((x) >> BIT_SHIFT_C3_L_C3_8821C) & BIT_MASK_C3_L_C3_8821C)
+
 
 #define BIT_C2_L_BIT1_8821C BIT(0)
 
@@ -227,13 +259,15 @@
 #define BIT_SHIFT_SPS18_OCP_TH_8821C 16
 #define BIT_MASK_SPS18_OCP_TH_8821C 0x7fff
 #define BIT_SPS18_OCP_TH_8821C(x) (((x) & BIT_MASK_SPS18_OCP_TH_8821C) << BIT_SHIFT_SPS18_OCP_TH_8821C)
-#define BIT_GET_SPS18_OCP_TH_8821C(x) (((x) >> BIT_SHIFT_SPS18_OCP_TH_8821C) & BIT_MASK_SPS18_OCP_TH_8821C)

+#define BIT_GET_SPS18_OCP_TH_8821C(x) (((x) >> BIT_SHIFT_SPS18_OCP_TH_8821C) & BIT_MASK_SPS18_OCP_TH_8821C)
+
 
 
 #define BIT_SHIFT_OCP_WINDOW_8821C 0
 #define BIT_MASK_OCP_WINDOW_8821C 0xffff
 #define BIT_OCP_WINDOW_8821C(x) (((x) & BIT_MASK_OCP_WINDOW_8821C) << BIT_SHIFT_OCP_WINDOW_8821C)
-#define BIT_GET_OCP_WINDOW_8821C(x) (((x) >> BIT_SHIFT_OCP_WINDOW_8821C) & BIT_MASK_OCP_WINDOW_8821C)

+#define BIT_GET_OCP_WINDOW_8821C(x) (((x) >> BIT_SHIFT_OCP_WINDOW_8821C) & BIT_MASK_OCP_WINDOW_8821C)
+
 
 
 /* 2 REG_RSV_CTRL_8821C */
@@ -258,14 +292,16 @@
 #define BIT_SHIFT_LPLDH12_RSV_8821C 29
 #define BIT_MASK_LPLDH12_RSV_8821C 0x7
 #define BIT_LPLDH12_RSV_8821C(x) (((x) & BIT_MASK_LPLDH12_RSV_8821C) << BIT_SHIFT_LPLDH12_RSV_8821C)
-#define BIT_GET_LPLDH12_RSV_8821C(x) (((x) >> BIT_SHIFT_LPLDH12_RSV_8821C) & BIT_MASK_LPLDH12_RSV_8821C)

+#define BIT_GET_LPLDH12_RSV_8821C(x) (((x) >> BIT_SHIFT_LPLDH12_RSV_8821C) & BIT_MASK_LPLDH12_RSV_8821C)
+
 
 #define BIT_LPLDH12_SLP_8821C BIT(28)
 
 #define BIT_SHIFT_LPLDH12_VADJ_8821C 24
 #define BIT_MASK_LPLDH12_VADJ_8821C 0xf
 #define BIT_LPLDH12_VADJ_8821C(x) (((x) & BIT_MASK_LPLDH12_VADJ_8821C) << BIT_SHIFT_LPLDH12_VADJ_8821C)
-#define BIT_GET_LPLDH12_VADJ_8821C(x) (((x) >> BIT_SHIFT_LPLDH12_VADJ_8821C) & BIT_MASK_LPLDH12_VADJ_8821C)

+#define BIT_GET_LPLDH12_VADJ_8821C(x) (((x) >> BIT_SHIFT_LPLDH12_VADJ_8821C) & BIT_MASK_LPLDH12_VADJ_8821C)
+
 
 #define BIT_PCIE_CALIB_EN_8821C BIT(17)
 #define BIT_LDH12_EN_8821C BIT(16)
@@ -291,39 +327,45 @@
 #define BIT_SHIFT_XTAL_CAP_XI_8821C 25
 #define BIT_MASK_XTAL_CAP_XI_8821C 0x3f
 #define BIT_XTAL_CAP_XI_8821C(x) (((x) & BIT_MASK_XTAL_CAP_XI_8821C) << BIT_SHIFT_XTAL_CAP_XI_8821C)
-#define BIT_GET_XTAL_CAP_XI_8821C(x) (((x) >> BIT_SHIFT_XTAL_CAP_XI_8821C) & BIT_MASK_XTAL_CAP_XI_8821C)

+#define BIT_GET_XTAL_CAP_XI_8821C(x) (((x) >> BIT_SHIFT_XTAL_CAP_XI_8821C) & BIT_MASK_XTAL_CAP_XI_8821C)
+
 
 
 #define BIT_SHIFT_XTAL_DRV_DIGI_8821C 23
 #define BIT_MASK_XTAL_DRV_DIGI_8821C 0x3
 #define BIT_XTAL_DRV_DIGI_8821C(x) (((x) & BIT_MASK_XTAL_DRV_DIGI_8821C) << BIT_SHIFT_XTAL_DRV_DIGI_8821C)
-#define BIT_GET_XTAL_DRV_DIGI_8821C(x) (((x) >> BIT_SHIFT_XTAL_DRV_DIGI_8821C) & BIT_MASK_XTAL_DRV_DIGI_8821C)

+#define BIT_GET_XTAL_DRV_DIGI_8821C(x) (((x) >> BIT_SHIFT_XTAL_DRV_DIGI_8821C) & BIT_MASK_XTAL_DRV_DIGI_8821C)
+
 
 #define BIT_XTAL_DRV_USB_BIT1_8821C BIT(22)
 
 #define BIT_SHIFT_MAC_CLK_SEL_8821C 20
 #define BIT_MASK_MAC_CLK_SEL_8821C 0x3
 #define BIT_MAC_CLK_SEL_8821C(x) (((x) & BIT_MASK_MAC_CLK_SEL_8821C) << BIT_SHIFT_MAC_CLK_SEL_8821C)
-#define BIT_GET_MAC_CLK_SEL_8821C(x) (((x) >> BIT_SHIFT_MAC_CLK_SEL_8821C) & BIT_MASK_MAC_CLK_SEL_8821C)

+#define BIT_GET_MAC_CLK_SEL_8821C(x) (((x) >> BIT_SHIFT_MAC_CLK_SEL_8821C) & BIT_MASK_MAC_CLK_SEL_8821C)
+
 
 #define BIT_XTAL_DRV_USB_BIT0_8821C BIT(19)
 
 #define BIT_SHIFT_XTAL_DRV_AFE_8821C 17
 #define BIT_MASK_XTAL_DRV_AFE_8821C 0x3
 #define BIT_XTAL_DRV_AFE_8821C(x) (((x) & BIT_MASK_XTAL_DRV_AFE_8821C) << BIT_SHIFT_XTAL_DRV_AFE_8821C)
-#define BIT_GET_XTAL_DRV_AFE_8821C(x) (((x) >> BIT_SHIFT_XTAL_DRV_AFE_8821C) & BIT_MASK_XTAL_DRV_AFE_8821C)

+#define BIT_GET_XTAL_DRV_AFE_8821C(x) (((x) >> BIT_SHIFT_XTAL_DRV_AFE_8821C) & BIT_MASK_XTAL_DRV_AFE_8821C)
+
 
 
 #define BIT_SHIFT_XTAL_DRV_RF2_8821C 15
 #define BIT_MASK_XTAL_DRV_RF2_8821C 0x3
 #define BIT_XTAL_DRV_RF2_8821C(x) (((x) & BIT_MASK_XTAL_DRV_RF2_8821C) << BIT_SHIFT_XTAL_DRV_RF2_8821C)
-#define BIT_GET_XTAL_DRV_RF2_8821C(x) (((x) >> BIT_SHIFT_XTAL_DRV_RF2_8821C) & BIT_MASK_XTAL_DRV_RF2_8821C)

+#define BIT_GET_XTAL_DRV_RF2_8821C(x) (((x) >> BIT_SHIFT_XTAL_DRV_RF2_8821C) & BIT_MASK_XTAL_DRV_RF2_8821C)
+
 
 
 #define BIT_SHIFT_XTAL_DRV_RF1_8821C 13
 #define BIT_MASK_XTAL_DRV_RF1_8821C 0x3
 #define BIT_XTAL_DRV_RF1_8821C(x) (((x) & BIT_MASK_XTAL_DRV_RF1_8821C) << BIT_SHIFT_XTAL_DRV_RF1_8821C)
-#define BIT_GET_XTAL_DRV_RF1_8821C(x) (((x) >> BIT_SHIFT_XTAL_DRV_RF1_8821C) & BIT_MASK_XTAL_DRV_RF1_8821C)

+#define BIT_GET_XTAL_DRV_RF1_8821C(x) (((x) >> BIT_SHIFT_XTAL_DRV_RF1_8821C) & BIT_MASK_XTAL_DRV_RF1_8821C)
+
 
 #define BIT_XTAL_DELAY_DIGI_8821C BIT(12)
 #define BIT_XTAL_DELAY_USB_8821C BIT(11)
@@ -332,7 +374,8 @@
 #define BIT_SHIFT_XTAL_LDO_VREF_8821C 7
 #define BIT_MASK_XTAL_LDO_VREF_8821C 0x7
 #define BIT_XTAL_LDO_VREF_8821C(x) (((x) & BIT_MASK_XTAL_LDO_VREF_8821C) << BIT_SHIFT_XTAL_LDO_VREF_8821C)
-#define BIT_GET_XTAL_LDO_VREF_8821C(x) (((x) >> BIT_SHIFT_XTAL_LDO_VREF_8821C) & BIT_MASK_XTAL_LDO_VREF_8821C)

+#define BIT_GET_XTAL_LDO_VREF_8821C(x) (((x) >> BIT_SHIFT_XTAL_LDO_VREF_8821C) & BIT_MASK_XTAL_LDO_VREF_8821C)
+
 
 #define BIT_XTAL_XQSEL_RF_8821C BIT(6)
 #define BIT_XTAL_XQSEL_8821C BIT(5)
@@ -340,13 +383,15 @@
 #define BIT_SHIFT_XTAL_GMN_V2_8821C 3
 #define BIT_MASK_XTAL_GMN_V2_8821C 0x3
 #define BIT_XTAL_GMN_V2_8821C(x) (((x) & BIT_MASK_XTAL_GMN_V2_8821C) << BIT_SHIFT_XTAL_GMN_V2_8821C)
-#define BIT_GET_XTAL_GMN_V2_8821C(x) (((x) >> BIT_SHIFT_XTAL_GMN_V2_8821C) & BIT_MASK_XTAL_GMN_V2_8821C)

+#define BIT_GET_XTAL_GMN_V2_8821C(x) (((x) >> BIT_SHIFT_XTAL_GMN_V2_8821C) & BIT_MASK_XTAL_GMN_V2_8821C)
+
 
 
 #define BIT_SHIFT_XTAL_GMP_V2_8821C 1
 #define BIT_MASK_XTAL_GMP_V2_8821C 0x3
 #define BIT_XTAL_GMP_V2_8821C(x) (((x) & BIT_MASK_XTAL_GMP_V2_8821C) << BIT_SHIFT_XTAL_GMP_V2_8821C)
-#define BIT_GET_XTAL_GMP_V2_8821C(x) (((x) >> BIT_SHIFT_XTAL_GMP_V2_8821C) & BIT_MASK_XTAL_GMP_V2_8821C)

+#define BIT_GET_XTAL_GMP_V2_8821C(x) (((x) >> BIT_SHIFT_XTAL_GMP_V2_8821C) & BIT_MASK_XTAL_GMP_V2_8821C)
+
 
 #define BIT_XTAL_EN_8821C BIT(0)
 
@@ -355,32 +400,37 @@
 #define BIT_SHIFT_REG_C3_V4_8821C 30
 #define BIT_MASK_REG_C3_V4_8821C 0x3
 #define BIT_REG_C3_V4_8821C(x) (((x) & BIT_MASK_REG_C3_V4_8821C) << BIT_SHIFT_REG_C3_V4_8821C)
-#define BIT_GET_REG_C3_V4_8821C(x) (((x) >> BIT_SHIFT_REG_C3_V4_8821C) & BIT_MASK_REG_C3_V4_8821C)

+#define BIT_GET_REG_C3_V4_8821C(x) (((x) >> BIT_SHIFT_REG_C3_V4_8821C) & BIT_MASK_REG_C3_V4_8821C)
+
 
 #define BIT_REG_CP_BIT1_8821C BIT(29)
 
 #define BIT_SHIFT_REG_RS_V4_8821C 26
 #define BIT_MASK_REG_RS_V4_8821C 0x7
 #define BIT_REG_RS_V4_8821C(x) (((x) & BIT_MASK_REG_RS_V4_8821C) << BIT_SHIFT_REG_RS_V4_8821C)
-#define BIT_GET_REG_RS_V4_8821C(x) (((x) >> BIT_SHIFT_REG_RS_V4_8821C) & BIT_MASK_REG_RS_V4_8821C)

+#define BIT_GET_REG_RS_V4_8821C(x) (((x) >> BIT_SHIFT_REG_RS_V4_8821C) & BIT_MASK_REG_RS_V4_8821C)
+
 
 
 #define BIT_SHIFT_REG__CS_8821C 24
 #define BIT_MASK_REG__CS_8821C 0x3
 #define BIT_REG__CS_8821C(x) (((x) & BIT_MASK_REG__CS_8821C) << BIT_SHIFT_REG__CS_8821C)
-#define BIT_GET_REG__CS_8821C(x) (((x) >> BIT_SHIFT_REG__CS_8821C) & BIT_MASK_REG__CS_8821C)

+#define BIT_GET_REG__CS_8821C(x) (((x) >> BIT_SHIFT_REG__CS_8821C) & BIT_MASK_REG__CS_8821C)
+
 
 
 #define BIT_SHIFT_REG_CP_OFFSET_8821C 21
 #define BIT_MASK_REG_CP_OFFSET_8821C 0x7
 #define BIT_REG_CP_OFFSET_8821C(x) (((x) & BIT_MASK_REG_CP_OFFSET_8821C) << BIT_SHIFT_REG_CP_OFFSET_8821C)
-#define BIT_GET_REG_CP_OFFSET_8821C(x) (((x) >> BIT_SHIFT_REG_CP_OFFSET_8821C) & BIT_MASK_REG_CP_OFFSET_8821C)

+#define BIT_GET_REG_CP_OFFSET_8821C(x) (((x) >> BIT_SHIFT_REG_CP_OFFSET_8821C) & BIT_MASK_REG_CP_OFFSET_8821C)
+
 
 
 #define BIT_SHIFT_CP_BIAS_8821C 18
 #define BIT_MASK_CP_BIAS_8821C 0x7
 #define BIT_CP_BIAS_8821C(x) (((x) & BIT_MASK_CP_BIAS_8821C) << BIT_SHIFT_CP_BIAS_8821C)
-#define BIT_GET_CP_BIAS_8821C(x) (((x) >> BIT_SHIFT_CP_BIAS_8821C) & BIT_MASK_CP_BIAS_8821C)

+#define BIT_GET_CP_BIAS_8821C(x) (((x) >> BIT_SHIFT_CP_BIAS_8821C) & BIT_MASK_CP_BIAS_8821C)
+
 
 #define BIT_REG_IDOUBLE_V2_8821C BIT(17)
 #define BIT_EN_SYN_8821C BIT(16)
@@ -388,13 +438,15 @@
 #define BIT_SHIFT_MCCO_8821C 14
 #define BIT_MASK_MCCO_8821C 0x3
 #define BIT_MCCO_8821C(x) (((x) & BIT_MASK_MCCO_8821C) << BIT_SHIFT_MCCO_8821C)
-#define BIT_GET_MCCO_8821C(x) (((x) >> BIT_SHIFT_MCCO_8821C) & BIT_MASK_MCCO_8821C)

+#define BIT_GET_MCCO_8821C(x) (((x) >> BIT_SHIFT_MCCO_8821C) & BIT_MASK_MCCO_8821C)
+
 
 
 #define BIT_SHIFT_REG_LDO_SEL_8821C 12
 #define BIT_MASK_REG_LDO_SEL_8821C 0x3
 #define BIT_REG_LDO_SEL_8821C(x) (((x) & BIT_MASK_REG_LDO_SEL_8821C) << BIT_SHIFT_REG_LDO_SEL_8821C)
-#define BIT_GET_REG_LDO_SEL_8821C(x) (((x) >> BIT_SHIFT_REG_LDO_SEL_8821C) & BIT_MASK_REG_LDO_SEL_8821C)

+#define BIT_GET_REG_LDO_SEL_8821C(x) (((x) >> BIT_SHIFT_REG_LDO_SEL_8821C) & BIT_MASK_REG_LDO_SEL_8821C)
+
 
 #define BIT_REG_KVCO_V2_8821C BIT(10)
 #define BIT_AGPIO_GPO_8821C BIT(9)
@@ -402,13 +454,15 @@
 #define BIT_SHIFT_AGPIO_DRV_8821C 7
 #define BIT_MASK_AGPIO_DRV_8821C 0x3
 #define BIT_AGPIO_DRV_8821C(x) (((x) & BIT_MASK_AGPIO_DRV_8821C) << BIT_SHIFT_AGPIO_DRV_8821C)
-#define BIT_GET_AGPIO_DRV_8821C(x) (((x) >> BIT_SHIFT_AGPIO_DRV_8821C) & BIT_MASK_AGPIO_DRV_8821C)

+#define BIT_GET_AGPIO_DRV_8821C(x) (((x) >> BIT_SHIFT_AGPIO_DRV_8821C) & BIT_MASK_AGPIO_DRV_8821C)
+
 
 
 #define BIT_SHIFT_XTAL_CAP_XO_8821C 1
 #define BIT_MASK_XTAL_CAP_XO_8821C 0x3f
 #define BIT_XTAL_CAP_XO_8821C(x) (((x) & BIT_MASK_XTAL_CAP_XO_8821C) << BIT_SHIFT_XTAL_CAP_XO_8821C)
-#define BIT_GET_XTAL_CAP_XO_8821C(x) (((x) >> BIT_SHIFT_XTAL_CAP_XO_8821C) & BIT_MASK_XTAL_CAP_XO_8821C)

+#define BIT_GET_XTAL_CAP_XO_8821C(x) (((x) >> BIT_SHIFT_XTAL_CAP_XO_8821C) & BIT_MASK_XTAL_CAP_XO_8821C)
+
 
 #define BIT_POW_PLL_8821C BIT(0)
 
@@ -417,7 +471,8 @@
 #define BIT_SHIFT_PS_8821C 7
 #define BIT_MASK_PS_8821C 0x7
 #define BIT_PS_8821C(x) (((x) & BIT_MASK_PS_8821C) << BIT_SHIFT_PS_8821C)
-#define BIT_GET_PS_8821C(x) (((x) >> BIT_SHIFT_PS_8821C) & BIT_MASK_PS_8821C)

+#define BIT_GET_PS_8821C(x) (((x) >> BIT_SHIFT_PS_8821C) & BIT_MASK_PS_8821C)
+
 
 #define BIT_PSEN_8821C BIT(6)
 #define BIT_DOGENB_8821C BIT(5)
@@ -426,7 +481,8 @@
 #define BIT_SHIFT_REG_R3_V4_8821C 1
 #define BIT_MASK_REG_R3_V4_8821C 0x7
 #define BIT_REG_R3_V4_8821C(x) (((x) & BIT_MASK_REG_R3_V4_8821C) << BIT_SHIFT_REG_R3_V4_8821C)
-#define BIT_GET_REG_R3_V4_8821C(x) (((x) >> BIT_SHIFT_REG_R3_V4_8821C) & BIT_MASK_REG_R3_V4_8821C)

+#define BIT_GET_REG_R3_V4_8821C(x) (((x) >> BIT_SHIFT_REG_R3_V4_8821C) & BIT_MASK_REG_R3_V4_8821C)
+
 
 #define BIT_REG_CP_BIT0_8821C BIT(0)
 
@@ -436,19 +492,22 @@
 #define BIT_SHIFT_EF_PGPD_8821C 28
 #define BIT_MASK_EF_PGPD_8821C 0x7
 #define BIT_EF_PGPD_8821C(x) (((x) & BIT_MASK_EF_PGPD_8821C) << BIT_SHIFT_EF_PGPD_8821C)
-#define BIT_GET_EF_PGPD_8821C(x) (((x) >> BIT_SHIFT_EF_PGPD_8821C) & BIT_MASK_EF_PGPD_8821C)

+#define BIT_GET_EF_PGPD_8821C(x) (((x) >> BIT_SHIFT_EF_PGPD_8821C) & BIT_MASK_EF_PGPD_8821C)
+
 
 
 #define BIT_SHIFT_EF_RDT_8821C 24
 #define BIT_MASK_EF_RDT_8821C 0xf
 #define BIT_EF_RDT_8821C(x) (((x) & BIT_MASK_EF_RDT_8821C) << BIT_SHIFT_EF_RDT_8821C)
-#define BIT_GET_EF_RDT_8821C(x) (((x) >> BIT_SHIFT_EF_RDT_8821C) & BIT_MASK_EF_RDT_8821C)

+#define BIT_GET_EF_RDT_8821C(x) (((x) >> BIT_SHIFT_EF_RDT_8821C) & BIT_MASK_EF_RDT_8821C)
+
 
 
 #define BIT_SHIFT_EF_PGTS_8821C 20
 #define BIT_MASK_EF_PGTS_8821C 0xf
 #define BIT_EF_PGTS_8821C(x) (((x) & BIT_MASK_EF_PGTS_8821C) << BIT_SHIFT_EF_PGTS_8821C)
-#define BIT_GET_EF_PGTS_8821C(x) (((x) >> BIT_SHIFT_EF_PGTS_8821C) & BIT_MASK_EF_PGTS_8821C)

+#define BIT_GET_EF_PGTS_8821C(x) (((x) >> BIT_SHIFT_EF_PGTS_8821C) & BIT_MASK_EF_PGTS_8821C)
+
 
 #define BIT_EF_PDWN_8821C BIT(19)
 #define BIT_EF_ALDEN_8821C BIT(18)
@@ -456,13 +515,15 @@
 #define BIT_SHIFT_EF_ADDR_8821C 8
 #define BIT_MASK_EF_ADDR_8821C 0x3ff
 #define BIT_EF_ADDR_8821C(x) (((x) & BIT_MASK_EF_ADDR_8821C) << BIT_SHIFT_EF_ADDR_8821C)
-#define BIT_GET_EF_ADDR_8821C(x) (((x) >> BIT_SHIFT_EF_ADDR_8821C) & BIT_MASK_EF_ADDR_8821C)

+#define BIT_GET_EF_ADDR_8821C(x) (((x) >> BIT_SHIFT_EF_ADDR_8821C) & BIT_MASK_EF_ADDR_8821C)
+
 
 
 #define BIT_SHIFT_EF_DATA_8821C 0
 #define BIT_MASK_EF_DATA_8821C 0xff
 #define BIT_EF_DATA_8821C(x) (((x) & BIT_MASK_EF_DATA_8821C) << BIT_SHIFT_EF_DATA_8821C)
-#define BIT_GET_EF_DATA_8821C(x) (((x) >> BIT_SHIFT_EF_DATA_8821C) & BIT_MASK_EF_DATA_8821C)

+#define BIT_GET_EF_DATA_8821C(x) (((x) >> BIT_SHIFT_EF_DATA_8821C) & BIT_MASK_EF_DATA_8821C)
+
 
 
 /* 2 REG_LDO_EFUSE_CTRL_8821C */
@@ -471,34 +532,39 @@
 #define BIT_SHIFT_LDOE25_V12ADJ_L_8821C 27
 #define BIT_MASK_LDOE25_V12ADJ_L_8821C 0xf
 #define BIT_LDOE25_V12ADJ_L_8821C(x) (((x) & BIT_MASK_LDOE25_V12ADJ_L_8821C) << BIT_SHIFT_LDOE25_V12ADJ_L_8821C)
-#define BIT_GET_LDOE25_V12ADJ_L_8821C(x) (((x) >> BIT_SHIFT_LDOE25_V12ADJ_L_8821C) & BIT_MASK_LDOE25_V12ADJ_L_8821C)

+#define BIT_GET_LDOE25_V12ADJ_L_8821C(x) (((x) >> BIT_SHIFT_LDOE25_V12ADJ_L_8821C) & BIT_MASK_LDOE25_V12ADJ_L_8821C)
+
 
 #define BIT_EF_CRES_SEL_8821C BIT(26)
 
 #define BIT_SHIFT_EF_SCAN_START_V1_8821C 16
 #define BIT_MASK_EF_SCAN_START_V1_8821C 0x3ff
 #define BIT_EF_SCAN_START_V1_8821C(x) (((x) & BIT_MASK_EF_SCAN_START_V1_8821C) << BIT_SHIFT_EF_SCAN_START_V1_8821C)
-#define BIT_GET_EF_SCAN_START_V1_8821C(x) (((x) >> BIT_SHIFT_EF_SCAN_START_V1_8821C) & BIT_MASK_EF_SCAN_START_V1_8821C)

+#define BIT_GET_EF_SCAN_START_V1_8821C(x) (((x) >> BIT_SHIFT_EF_SCAN_START_V1_8821C) & BIT_MASK_EF_SCAN_START_V1_8821C)
+
 
 
 #define BIT_SHIFT_EF_SCAN_END_8821C 12
 #define BIT_MASK_EF_SCAN_END_8821C 0xf
 #define BIT_EF_SCAN_END_8821C(x) (((x) & BIT_MASK_EF_SCAN_END_8821C) << BIT_SHIFT_EF_SCAN_END_8821C)
-#define BIT_GET_EF_SCAN_END_8821C(x) (((x) >> BIT_SHIFT_EF_SCAN_END_8821C) & BIT_MASK_EF_SCAN_END_8821C)

+#define BIT_GET_EF_SCAN_END_8821C(x) (((x) >> BIT_SHIFT_EF_SCAN_END_8821C) & BIT_MASK_EF_SCAN_END_8821C)
+
 
 #define BIT_EF_PD_DIS_8821C BIT(11)
 
 #define BIT_SHIFT_EF_CELL_SEL_8821C 8
 #define BIT_MASK_EF_CELL_SEL_8821C 0x3
 #define BIT_EF_CELL_SEL_8821C(x) (((x) & BIT_MASK_EF_CELL_SEL_8821C) << BIT_SHIFT_EF_CELL_SEL_8821C)
-#define BIT_GET_EF_CELL_SEL_8821C(x) (((x) >> BIT_SHIFT_EF_CELL_SEL_8821C) & BIT_MASK_EF_CELL_SEL_8821C)

+#define BIT_GET_EF_CELL_SEL_8821C(x) (((x) >> BIT_SHIFT_EF_CELL_SEL_8821C) & BIT_MASK_EF_CELL_SEL_8821C)
+
 
 #define BIT_EF_TRPT_8821C BIT(7)
 
 #define BIT_SHIFT_EF_TTHD_8821C 0
 #define BIT_MASK_EF_TTHD_8821C 0x7f
 #define BIT_EF_TTHD_8821C(x) (((x) & BIT_MASK_EF_TTHD_8821C) << BIT_SHIFT_EF_TTHD_8821C)
-#define BIT_GET_EF_TTHD_8821C(x) (((x) >> BIT_SHIFT_EF_TTHD_8821C) & BIT_MASK_EF_TTHD_8821C)

+#define BIT_GET_EF_TTHD_8821C(x) (((x) >> BIT_SHIFT_EF_TTHD_8821C) & BIT_MASK_EF_TTHD_8821C)
+
 
 
 /* 2 REG_PWR_OPTION_CTRL_8821C */
@@ -506,19 +572,22 @@
 #define BIT_SHIFT_DBG_SEL_V1_8821C 16
 #define BIT_MASK_DBG_SEL_V1_8821C 0xff
 #define BIT_DBG_SEL_V1_8821C(x) (((x) & BIT_MASK_DBG_SEL_V1_8821C) << BIT_SHIFT_DBG_SEL_V1_8821C)
-#define BIT_GET_DBG_SEL_V1_8821C(x) (((x) >> BIT_SHIFT_DBG_SEL_V1_8821C) & BIT_MASK_DBG_SEL_V1_8821C)

+#define BIT_GET_DBG_SEL_V1_8821C(x) (((x) >> BIT_SHIFT_DBG_SEL_V1_8821C) & BIT_MASK_DBG_SEL_V1_8821C)
+
 
 
 #define BIT_SHIFT_DBG_SEL_BYTE_8821C 14
 #define BIT_MASK_DBG_SEL_BYTE_8821C 0x3
 #define BIT_DBG_SEL_BYTE_8821C(x) (((x) & BIT_MASK_DBG_SEL_BYTE_8821C) << BIT_SHIFT_DBG_SEL_BYTE_8821C)
-#define BIT_GET_DBG_SEL_BYTE_8821C(x) (((x) >> BIT_SHIFT_DBG_SEL_BYTE_8821C) & BIT_MASK_DBG_SEL_BYTE_8821C)

+#define BIT_GET_DBG_SEL_BYTE_8821C(x) (((x) >> BIT_SHIFT_DBG_SEL_BYTE_8821C) & BIT_MASK_DBG_SEL_BYTE_8821C)
+
 
 
 #define BIT_SHIFT_STD_L1_V1_8821C 12
 #define BIT_MASK_STD_L1_V1_8821C 0x3
 #define BIT_STD_L1_V1_8821C(x) (((x) & BIT_MASK_STD_L1_V1_8821C) << BIT_SHIFT_STD_L1_V1_8821C)
-#define BIT_GET_STD_L1_V1_8821C(x) (((x) >> BIT_SHIFT_STD_L1_V1_8821C) & BIT_MASK_STD_L1_V1_8821C)

+#define BIT_GET_STD_L1_V1_8821C(x) (((x) >> BIT_SHIFT_STD_L1_V1_8821C) & BIT_MASK_STD_L1_V1_8821C)
+
 
 #define BIT_SYSON_DBG_PAD_E2_8821C BIT(11)
 #define BIT_SYSON_LED_PAD_E2_8821C BIT(10)
@@ -529,19 +598,22 @@
 #define BIT_SHIFT_SYSON_SPS0WWV_WT_8821C 4
 #define BIT_MASK_SYSON_SPS0WWV_WT_8821C 0x3
 #define BIT_SYSON_SPS0WWV_WT_8821C(x) (((x) & BIT_MASK_SYSON_SPS0WWV_WT_8821C) << BIT_SHIFT_SYSON_SPS0WWV_WT_8821C)
-#define BIT_GET_SYSON_SPS0WWV_WT_8821C(x) (((x) >> BIT_SHIFT_SYSON_SPS0WWV_WT_8821C) & BIT_MASK_SYSON_SPS0WWV_WT_8821C)

+#define BIT_GET_SYSON_SPS0WWV_WT_8821C(x) (((x) >> BIT_SHIFT_SYSON_SPS0WWV_WT_8821C) & BIT_MASK_SYSON_SPS0WWV_WT_8821C)
+
 
 
 #define BIT_SHIFT_SYSON_SPS0LDO_WT_8821C 2
 #define BIT_MASK_SYSON_SPS0LDO_WT_8821C 0x3
 #define BIT_SYSON_SPS0LDO_WT_8821C(x) (((x) & BIT_MASK_SYSON_SPS0LDO_WT_8821C) << BIT_SHIFT_SYSON_SPS0LDO_WT_8821C)
-#define BIT_GET_SYSON_SPS0LDO_WT_8821C(x) (((x) >> BIT_SHIFT_SYSON_SPS0LDO_WT_8821C) & BIT_MASK_SYSON_SPS0LDO_WT_8821C)

+#define BIT_GET_SYSON_SPS0LDO_WT_8821C(x) (((x) >> BIT_SHIFT_SYSON_SPS0LDO_WT_8821C) & BIT_MASK_SYSON_SPS0LDO_WT_8821C)
+
 
 
 #define BIT_SHIFT_SYSON_RCLK_SCALE_8821C 0
 #define BIT_MASK_SYSON_RCLK_SCALE_8821C 0x3
 #define BIT_SYSON_RCLK_SCALE_8821C(x) (((x) & BIT_MASK_SYSON_RCLK_SCALE_8821C) << BIT_SHIFT_SYSON_RCLK_SCALE_8821C)
-#define BIT_GET_SYSON_RCLK_SCALE_8821C(x) (((x) >> BIT_SHIFT_SYSON_RCLK_SCALE_8821C) & BIT_MASK_SYSON_RCLK_SCALE_8821C)

+#define BIT_GET_SYSON_RCLK_SCALE_8821C(x) (((x) >> BIT_SHIFT_SYSON_RCLK_SCALE_8821C) & BIT_MASK_SYSON_RCLK_SCALE_8821C)
+
 
 
 /* 2 REG_CAL_TIMER_8821C */
@@ -549,13 +621,15 @@
 #define BIT_SHIFT_MATCH_CNT_8821C 8
 #define BIT_MASK_MATCH_CNT_8821C 0xff
 #define BIT_MATCH_CNT_8821C(x) (((x) & BIT_MASK_MATCH_CNT_8821C) << BIT_SHIFT_MATCH_CNT_8821C)
-#define BIT_GET_MATCH_CNT_8821C(x) (((x) >> BIT_SHIFT_MATCH_CNT_8821C) & BIT_MASK_MATCH_CNT_8821C)

+#define BIT_GET_MATCH_CNT_8821C(x) (((x) >> BIT_SHIFT_MATCH_CNT_8821C) & BIT_MASK_MATCH_CNT_8821C)
+
 
 
 #define BIT_SHIFT_CAL_SCAL_8821C 0
 #define BIT_MASK_CAL_SCAL_8821C 0xff
 #define BIT_CAL_SCAL_8821C(x) (((x) & BIT_MASK_CAL_SCAL_8821C) << BIT_SHIFT_CAL_SCAL_8821C)
-#define BIT_GET_CAL_SCAL_8821C(x) (((x) >> BIT_SHIFT_CAL_SCAL_8821C) & BIT_MASK_CAL_SCAL_8821C)

+#define BIT_GET_CAL_SCAL_8821C(x) (((x) >> BIT_SHIFT_CAL_SCAL_8821C) & BIT_MASK_CAL_SCAL_8821C)
+
 
 
 /* 2 REG_ACLK_MON_8821C */
@@ -563,14 +637,16 @@
 #define BIT_SHIFT_RCLK_MON_8821C 5
 #define BIT_MASK_RCLK_MON_8821C 0x7ff
 #define BIT_RCLK_MON_8821C(x) (((x) & BIT_MASK_RCLK_MON_8821C) << BIT_SHIFT_RCLK_MON_8821C)
-#define BIT_GET_RCLK_MON_8821C(x) (((x) >> BIT_SHIFT_RCLK_MON_8821C) & BIT_MASK_RCLK_MON_8821C)

+#define BIT_GET_RCLK_MON_8821C(x) (((x) >> BIT_SHIFT_RCLK_MON_8821C) & BIT_MASK_RCLK_MON_8821C)
+
 
 #define BIT_CAL_EN_8821C BIT(4)
 
 #define BIT_SHIFT_DPSTU_8821C 2
 #define BIT_MASK_DPSTU_8821C 0x3
 #define BIT_DPSTU_8821C(x) (((x) & BIT_MASK_DPSTU_8821C) << BIT_SHIFT_DPSTU_8821C)
-#define BIT_GET_DPSTU_8821C(x) (((x) >> BIT_SHIFT_DPSTU_8821C) & BIT_MASK_DPSTU_8821C)

+#define BIT_GET_DPSTU_8821C(x) (((x) >> BIT_SHIFT_DPSTU_8821C) & BIT_MASK_DPSTU_8821C)
+
 
 #define BIT_SUS_16X_8821C BIT(1)
 
@@ -589,7 +665,8 @@
 #define BIT_SHIFT_BTMODE_8821C 6
 #define BIT_MASK_BTMODE_8821C 0x3
 #define BIT_BTMODE_8821C(x) (((x) & BIT_MASK_BTMODE_8821C) << BIT_SHIFT_BTMODE_8821C)
-#define BIT_GET_BTMODE_8821C(x) (((x) >> BIT_SHIFT_BTMODE_8821C) & BIT_MASK_BTMODE_8821C)

+#define BIT_GET_BTMODE_8821C(x) (((x) >> BIT_SHIFT_BTMODE_8821C) & BIT_MASK_BTMODE_8821C)
+
 
 #define BIT_ENBT_8821C BIT(5)
 #define BIT_EROM_EN_8821C BIT(4)
@@ -599,7 +676,8 @@
 #define BIT_SHIFT_GPIOSEL_8821C 0
 #define BIT_MASK_GPIOSEL_8821C 0x3
 #define BIT_GPIOSEL_8821C(x) (((x) & BIT_MASK_GPIOSEL_8821C) << BIT_SHIFT_GPIOSEL_8821C)
-#define BIT_GET_GPIOSEL_8821C(x) (((x) >> BIT_SHIFT_GPIOSEL_8821C) & BIT_MASK_GPIOSEL_8821C)

+#define BIT_GET_GPIOSEL_8821C(x) (((x) >> BIT_SHIFT_GPIOSEL_8821C) & BIT_MASK_GPIOSEL_8821C)
+
 
 
 /* 2 REG_GPIO_PIN_CTRL_8821C */
@@ -607,25 +685,29 @@
 #define BIT_SHIFT_GPIO_MOD_7_TO_0_8821C 24
 #define BIT_MASK_GPIO_MOD_7_TO_0_8821C 0xff
 #define BIT_GPIO_MOD_7_TO_0_8821C(x) (((x) & BIT_MASK_GPIO_MOD_7_TO_0_8821C) << BIT_SHIFT_GPIO_MOD_7_TO_0_8821C)
-#define BIT_GET_GPIO_MOD_7_TO_0_8821C(x) (((x) >> BIT_SHIFT_GPIO_MOD_7_TO_0_8821C) & BIT_MASK_GPIO_MOD_7_TO_0_8821C)

+#define BIT_GET_GPIO_MOD_7_TO_0_8821C(x) (((x) >> BIT_SHIFT_GPIO_MOD_7_TO_0_8821C) & BIT_MASK_GPIO_MOD_7_TO_0_8821C)
+
 
 
 #define BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8821C 16
 #define BIT_MASK_GPIO_IO_SEL_7_TO_0_8821C 0xff
 #define BIT_GPIO_IO_SEL_7_TO_0_8821C(x) (((x) & BIT_MASK_GPIO_IO_SEL_7_TO_0_8821C) << BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8821C)
-#define BIT_GET_GPIO_IO_SEL_7_TO_0_8821C(x) (((x) >> BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8821C) & BIT_MASK_GPIO_IO_SEL_7_TO_0_8821C)

+#define BIT_GET_GPIO_IO_SEL_7_TO_0_8821C(x) (((x) >> BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8821C) & BIT_MASK_GPIO_IO_SEL_7_TO_0_8821C)
+
 
 
 #define BIT_SHIFT_GPIO_OUT_7_TO_0_8821C 8
 #define BIT_MASK_GPIO_OUT_7_TO_0_8821C 0xff
 #define BIT_GPIO_OUT_7_TO_0_8821C(x) (((x) & BIT_MASK_GPIO_OUT_7_TO_0_8821C) << BIT_SHIFT_GPIO_OUT_7_TO_0_8821C)
-#define BIT_GET_GPIO_OUT_7_TO_0_8821C(x) (((x) >> BIT_SHIFT_GPIO_OUT_7_TO_0_8821C) & BIT_MASK_GPIO_OUT_7_TO_0_8821C)

+#define BIT_GET_GPIO_OUT_7_TO_0_8821C(x) (((x) >> BIT_SHIFT_GPIO_OUT_7_TO_0_8821C) & BIT_MASK_GPIO_OUT_7_TO_0_8821C)
+
 
 
 #define BIT_SHIFT_GPIO_IN_7_TO_0_8821C 0
 #define BIT_MASK_GPIO_IN_7_TO_0_8821C 0xff
 #define BIT_GPIO_IN_7_TO_0_8821C(x) (((x) & BIT_MASK_GPIO_IN_7_TO_0_8821C) << BIT_SHIFT_GPIO_IN_7_TO_0_8821C)
-#define BIT_GET_GPIO_IN_7_TO_0_8821C(x) (((x) >> BIT_SHIFT_GPIO_IN_7_TO_0_8821C) & BIT_MASK_GPIO_IN_7_TO_0_8821C)

+#define BIT_GET_GPIO_IN_7_TO_0_8821C(x) (((x) >> BIT_SHIFT_GPIO_IN_7_TO_0_8821C) & BIT_MASK_GPIO_IN_7_TO_0_8821C)
+
 
 
 /* 2 REG_GPIO_INTM_8821C */
@@ -633,7 +715,8 @@
 #define BIT_SHIFT_MUXDBG_SEL_8821C 30
 #define BIT_MASK_MUXDBG_SEL_8821C 0x3
 #define BIT_MUXDBG_SEL_8821C(x) (((x) & BIT_MASK_MUXDBG_SEL_8821C) << BIT_SHIFT_MUXDBG_SEL_8821C)
-#define BIT_GET_MUXDBG_SEL_8821C(x) (((x) >> BIT_SHIFT_MUXDBG_SEL_8821C) & BIT_MASK_MUXDBG_SEL_8821C)

+#define BIT_GET_MUXDBG_SEL_8821C(x) (((x) >> BIT_SHIFT_MUXDBG_SEL_8821C) & BIT_MASK_MUXDBG_SEL_8821C)
+
 
 #define BIT_EXTWOL_SEL_8821C BIT(17)
 #define BIT_EXTWOL_EN_8821C BIT(16)
@@ -672,7 +755,8 @@
 #define BIT_SHIFT_LED2CM_8821C 16
 #define BIT_MASK_LED2CM_8821C 0x7
 #define BIT_LED2CM_8821C(x) (((x) & BIT_MASK_LED2CM_8821C) << BIT_SHIFT_LED2CM_8821C)
-#define BIT_GET_LED2CM_8821C(x) (((x) >> BIT_SHIFT_LED2CM_8821C) & BIT_MASK_LED2CM_8821C)

+#define BIT_GET_LED2CM_8821C(x) (((x) >> BIT_SHIFT_LED2CM_8821C) & BIT_MASK_LED2CM_8821C)
+
 
 #define BIT_LED1DIS_8821C BIT(15)
 #define BIT_LED1PL_8821C BIT(12)
@@ -681,14 +765,16 @@
 #define BIT_SHIFT_LED1CM_8821C 8
 #define BIT_MASK_LED1CM_8821C 0x7
 #define BIT_LED1CM_8821C(x) (((x) & BIT_MASK_LED1CM_8821C) << BIT_SHIFT_LED1CM_8821C)
-#define BIT_GET_LED1CM_8821C(x) (((x) >> BIT_SHIFT_LED1CM_8821C) & BIT_MASK_LED1CM_8821C)

+#define BIT_GET_LED1CM_8821C(x) (((x) >> BIT_SHIFT_LED1CM_8821C) & BIT_MASK_LED1CM_8821C)
+
 
 #define BIT_LED0DIS_8821C BIT(7)
 
 #define BIT_SHIFT_AFE_LDO_SWR_CHECK_8821C 5
 #define BIT_MASK_AFE_LDO_SWR_CHECK_8821C 0x3
 #define BIT_AFE_LDO_SWR_CHECK_8821C(x) (((x) & BIT_MASK_AFE_LDO_SWR_CHECK_8821C) << BIT_SHIFT_AFE_LDO_SWR_CHECK_8821C)
-#define BIT_GET_AFE_LDO_SWR_CHECK_8821C(x) (((x) >> BIT_SHIFT_AFE_LDO_SWR_CHECK_8821C) & BIT_MASK_AFE_LDO_SWR_CHECK_8821C)

+#define BIT_GET_AFE_LDO_SWR_CHECK_8821C(x) (((x) >> BIT_SHIFT_AFE_LDO_SWR_CHECK_8821C) & BIT_MASK_AFE_LDO_SWR_CHECK_8821C)
+
 
 #define BIT_LED0PL_8821C BIT(4)
 #define BIT_LED0SV_8821C BIT(3)
@@ -696,7 +782,8 @@
 #define BIT_SHIFT_LED0CM_8821C 0
 #define BIT_MASK_LED0CM_8821C 0x7
 #define BIT_LED0CM_8821C(x) (((x) & BIT_MASK_LED0CM_8821C) << BIT_SHIFT_LED0CM_8821C)
-#define BIT_GET_LED0CM_8821C(x) (((x) >> BIT_SHIFT_LED0CM_8821C) & BIT_MASK_LED0CM_8821C)

+#define BIT_GET_LED0CM_8821C(x) (((x) >> BIT_SHIFT_LED0CM_8821C) & BIT_MASK_LED0CM_8821C)
+
 
 
 /* 2 REG_FSIMR_8821C */
@@ -814,25 +901,29 @@
 #define BIT_SHIFT_GPIO_MOD_15_TO_8_8821C 24
 #define BIT_MASK_GPIO_MOD_15_TO_8_8821C 0xff
 #define BIT_GPIO_MOD_15_TO_8_8821C(x) (((x) & BIT_MASK_GPIO_MOD_15_TO_8_8821C) << BIT_SHIFT_GPIO_MOD_15_TO_8_8821C)
-#define BIT_GET_GPIO_MOD_15_TO_8_8821C(x) (((x) >> BIT_SHIFT_GPIO_MOD_15_TO_8_8821C) & BIT_MASK_GPIO_MOD_15_TO_8_8821C)

+#define BIT_GET_GPIO_MOD_15_TO_8_8821C(x) (((x) >> BIT_SHIFT_GPIO_MOD_15_TO_8_8821C) & BIT_MASK_GPIO_MOD_15_TO_8_8821C)
+
 
 
 #define BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8821C 16
 #define BIT_MASK_GPIO_IO_SEL_15_TO_8_8821C 0xff
 #define BIT_GPIO_IO_SEL_15_TO_8_8821C(x) (((x) & BIT_MASK_GPIO_IO_SEL_15_TO_8_8821C) << BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8821C)
-#define BIT_GET_GPIO_IO_SEL_15_TO_8_8821C(x) (((x) >> BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8821C) & BIT_MASK_GPIO_IO_SEL_15_TO_8_8821C)

+#define BIT_GET_GPIO_IO_SEL_15_TO_8_8821C(x) (((x) >> BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8821C) & BIT_MASK_GPIO_IO_SEL_15_TO_8_8821C)
+
 
 
 #define BIT_SHIFT_GPIO_OUT_15_TO_8_8821C 8
 #define BIT_MASK_GPIO_OUT_15_TO_8_8821C 0xff
 #define BIT_GPIO_OUT_15_TO_8_8821C(x) (((x) & BIT_MASK_GPIO_OUT_15_TO_8_8821C) << BIT_SHIFT_GPIO_OUT_15_TO_8_8821C)
-#define BIT_GET_GPIO_OUT_15_TO_8_8821C(x) (((x) >> BIT_SHIFT_GPIO_OUT_15_TO_8_8821C) & BIT_MASK_GPIO_OUT_15_TO_8_8821C)

+#define BIT_GET_GPIO_OUT_15_TO_8_8821C(x) (((x) >> BIT_SHIFT_GPIO_OUT_15_TO_8_8821C) & BIT_MASK_GPIO_OUT_15_TO_8_8821C)
+
 
 
 #define BIT_SHIFT_GPIO_IN_15_TO_8_8821C 0
 #define BIT_MASK_GPIO_IN_15_TO_8_8821C 0xff
 #define BIT_GPIO_IN_15_TO_8_8821C(x) (((x) & BIT_MASK_GPIO_IN_15_TO_8_8821C) << BIT_SHIFT_GPIO_IN_15_TO_8_8821C)
-#define BIT_GET_GPIO_IN_15_TO_8_8821C(x) (((x) >> BIT_SHIFT_GPIO_IN_15_TO_8_8821C) & BIT_MASK_GPIO_IN_15_TO_8_8821C)

+#define BIT_GET_GPIO_IN_15_TO_8_8821C(x) (((x) >> BIT_SHIFT_GPIO_IN_15_TO_8_8821C) & BIT_MASK_GPIO_IN_15_TO_8_8821C)
+
 
 
 /* 2 REG_PAD_CTRL1_8821C */
@@ -851,7 +942,8 @@
 #define BIT_SHIFT_BTGP_GPIO_SL_8821C 16
 #define BIT_MASK_BTGP_GPIO_SL_8821C 0x3
 #define BIT_BTGP_GPIO_SL_8821C(x) (((x) & BIT_MASK_BTGP_GPIO_SL_8821C) << BIT_SHIFT_BTGP_GPIO_SL_8821C)
-#define BIT_GET_BTGP_GPIO_SL_8821C(x) (((x) >> BIT_SHIFT_BTGP_GPIO_SL_8821C) & BIT_MASK_BTGP_GPIO_SL_8821C)

+#define BIT_GET_BTGP_GPIO_SL_8821C(x) (((x) >> BIT_SHIFT_BTGP_GPIO_SL_8821C) & BIT_MASK_BTGP_GPIO_SL_8821C)
+
 
 #define BIT_PAD_SDIO_SR_8821C BIT(14)
 #define BIT_GPIO14_OUTPUT_PL_8821C BIT(13)
@@ -903,7 +995,8 @@
 #define BIT_SHIFT_WLCLK_PHASE_8821C 0
 #define BIT_MASK_WLCLK_PHASE_8821C 0x1f
 #define BIT_WLCLK_PHASE_8821C(x) (((x) & BIT_MASK_WLCLK_PHASE_8821C) << BIT_SHIFT_WLCLK_PHASE_8821C)
-#define BIT_GET_WLCLK_PHASE_8821C(x) (((x) >> BIT_SHIFT_WLCLK_PHASE_8821C) & BIT_MASK_WLCLK_PHASE_8821C)

+#define BIT_GET_WLCLK_PHASE_8821C(x) (((x) >> BIT_SHIFT_WLCLK_PHASE_8821C) & BIT_MASK_WLCLK_PHASE_8821C)
+
 
 
 /* 2 REG_SYS_SDIO_CTRL_8821C */
@@ -926,7 +1019,8 @@
 #define BIT_SHIFT_TSFT_SEL_8821C 29
 #define BIT_MASK_TSFT_SEL_8821C 0x7
 #define BIT_TSFT_SEL_8821C(x) (((x) & BIT_MASK_TSFT_SEL_8821C) << BIT_SHIFT_TSFT_SEL_8821C)
-#define BIT_GET_TSFT_SEL_8821C(x) (((x) >> BIT_SHIFT_TSFT_SEL_8821C) & BIT_MASK_TSFT_SEL_8821C)

+#define BIT_GET_TSFT_SEL_8821C(x) (((x) >> BIT_SHIFT_TSFT_SEL_8821C) & BIT_MASK_TSFT_SEL_8821C)
+
 
 #define BIT_USB_HOST_PWR_OFF_EN_8821C BIT(12)
 #define BIT_SYM_LPS_BLOCK_EN_8821C BIT(11)
@@ -937,7 +1031,8 @@
 #define BIT_SHIFT_SDIO_PAD_E_8821C 5
 #define BIT_MASK_SDIO_PAD_E_8821C 0x7
 #define BIT_SDIO_PAD_E_8821C(x) (((x) & BIT_MASK_SDIO_PAD_E_8821C) << BIT_SHIFT_SDIO_PAD_E_8821C)
-#define BIT_GET_SDIO_PAD_E_8821C(x) (((x) >> BIT_SHIFT_SDIO_PAD_E_8821C) & BIT_MASK_SDIO_PAD_E_8821C)

+#define BIT_GET_SDIO_PAD_E_8821C(x) (((x) >> BIT_SHIFT_SDIO_PAD_E_8821C) & BIT_MASK_SDIO_PAD_E_8821C)
+
 
 #define BIT_USB_LPPLL_EN_8821C BIT(4)
 #define BIT_ROP_SW15_8821C BIT(2)
@@ -953,37 +1048,43 @@
 #define BIT_SHIFT_AUTO_ZCD_IN_CODE_8821C 21
 #define BIT_MASK_AUTO_ZCD_IN_CODE_8821C 0x1f
 #define BIT_AUTO_ZCD_IN_CODE_8821C(x) (((x) & BIT_MASK_AUTO_ZCD_IN_CODE_8821C) << BIT_SHIFT_AUTO_ZCD_IN_CODE_8821C)
-#define BIT_GET_AUTO_ZCD_IN_CODE_8821C(x) (((x) >> BIT_SHIFT_AUTO_ZCD_IN_CODE_8821C) & BIT_MASK_AUTO_ZCD_IN_CODE_8821C)

+#define BIT_GET_AUTO_ZCD_IN_CODE_8821C(x) (((x) >> BIT_SHIFT_AUTO_ZCD_IN_CODE_8821C) & BIT_MASK_AUTO_ZCD_IN_CODE_8821C)
+
 
 
 #define BIT_SHIFT_ZCD_CODE_IN_L_8821C 16
 #define BIT_MASK_ZCD_CODE_IN_L_8821C 0x1f
 #define BIT_ZCD_CODE_IN_L_8821C(x) (((x) & BIT_MASK_ZCD_CODE_IN_L_8821C) << BIT_SHIFT_ZCD_CODE_IN_L_8821C)
-#define BIT_GET_ZCD_CODE_IN_L_8821C(x) (((x) >> BIT_SHIFT_ZCD_CODE_IN_L_8821C) & BIT_MASK_ZCD_CODE_IN_L_8821C)

+#define BIT_GET_ZCD_CODE_IN_L_8821C(x) (((x) >> BIT_SHIFT_ZCD_CODE_IN_L_8821C) & BIT_MASK_ZCD_CODE_IN_L_8821C)
+
 
 
 #define BIT_SHIFT_LDO_HV5_DUMMY_8821C 14
 #define BIT_MASK_LDO_HV5_DUMMY_8821C 0x3
 #define BIT_LDO_HV5_DUMMY_8821C(x) (((x) & BIT_MASK_LDO_HV5_DUMMY_8821C) << BIT_SHIFT_LDO_HV5_DUMMY_8821C)
-#define BIT_GET_LDO_HV5_DUMMY_8821C(x) (((x) >> BIT_SHIFT_LDO_HV5_DUMMY_8821C) & BIT_MASK_LDO_HV5_DUMMY_8821C)

+#define BIT_GET_LDO_HV5_DUMMY_8821C(x) (((x) >> BIT_SHIFT_LDO_HV5_DUMMY_8821C) & BIT_MASK_LDO_HV5_DUMMY_8821C)
+
 
 
 #define BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8821C 12
 #define BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8821C 0x3
 #define BIT_REG_VTUNE33_BIT0_TO_BIT1_8821C(x) (((x) & BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8821C) << BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8821C)
-#define BIT_GET_REG_VTUNE33_BIT0_TO_BIT1_8821C(x) (((x) >> BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8821C) & BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8821C)

+#define BIT_GET_REG_VTUNE33_BIT0_TO_BIT1_8821C(x) (((x) >> BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8821C) & BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8821C)
+
 
 
 #define BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8821C 10
 #define BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8821C 0x3
 #define BIT_REG_STANDBY33_BIT0_TO_BIT1_8821C(x) (((x) & BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8821C) << BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8821C)
-#define BIT_GET_REG_STANDBY33_BIT0_TO_BIT1_8821C(x) (((x) >> BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8821C) & BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8821C)

+#define BIT_GET_REG_STANDBY33_BIT0_TO_BIT1_8821C(x) (((x) >> BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8821C) & BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8821C)
+
 
 
 #define BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8821C 8
 #define BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8821C 0x3
 #define BIT_REG_LOAD33_BIT0_TO_BIT1_8821C(x) (((x) & BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8821C) << BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8821C)
-#define BIT_GET_REG_LOAD33_BIT0_TO_BIT1_8821C(x) (((x) >> BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8821C) & BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8821C)

+#define BIT_GET_REG_LOAD33_BIT0_TO_BIT1_8821C(x) (((x) >> BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8821C) & BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8821C)
+
 
 #define BIT_REG_BYPASS_L_8821C BIT(7)
 #define BIT_REG_LDOF_L_8821C BIT(6)
@@ -993,7 +1094,8 @@
 #define BIT_SHIFT_CFC_L_8821C 1
 #define BIT_MASK_CFC_L_8821C 0x3
 #define BIT_CFC_L_8821C(x) (((x) & BIT_MASK_CFC_L_8821C) << BIT_SHIFT_CFC_L_8821C)
-#define BIT_GET_CFC_L_8821C(x) (((x) >> BIT_SHIFT_CFC_L_8821C) & BIT_MASK_CFC_L_8821C)

+#define BIT_GET_CFC_L_8821C(x) (((x) >> BIT_SHIFT_CFC_L_8821C) & BIT_MASK_CFC_L_8821C)
+
 
 #define BIT_REG_TYPE_L_8821C BIT(0)
 
@@ -1002,7 +1104,8 @@
 #define BIT_SHIFT_RPWM_8821C 24
 #define BIT_MASK_RPWM_8821C 0xff
 #define BIT_RPWM_8821C(x) (((x) & BIT_MASK_RPWM_8821C) << BIT_SHIFT_RPWM_8821C)
-#define BIT_GET_RPWM_8821C(x) (((x) >> BIT_SHIFT_RPWM_8821C) & BIT_MASK_RPWM_8821C)

+#define BIT_GET_RPWM_8821C(x) (((x) >> BIT_SHIFT_RPWM_8821C) & BIT_MASK_RPWM_8821C)
+
 
 #define BIT_ANA_PORT_EN_8821C BIT(22)
 #define BIT_MAC_PORT_EN_8821C BIT(21)
@@ -1012,7 +1115,8 @@
 #define BIT_SHIFT_ROM_PGE_8821C 16
 #define BIT_MASK_ROM_PGE_8821C 0x7
 #define BIT_ROM_PGE_8821C(x) (((x) & BIT_MASK_ROM_PGE_8821C) << BIT_SHIFT_ROM_PGE_8821C)
-#define BIT_GET_ROM_PGE_8821C(x) (((x) >> BIT_SHIFT_ROM_PGE_8821C) & BIT_MASK_ROM_PGE_8821C)

+#define BIT_GET_ROM_PGE_8821C(x) (((x) >> BIT_SHIFT_ROM_PGE_8821C) & BIT_MASK_ROM_PGE_8821C)
+
 
 #define BIT_FW_INIT_RDY_8821C BIT(15)
 #define BIT_FW_DW_RDY_8821C BIT(14)
@@ -1020,7 +1124,8 @@
 #define BIT_SHIFT_CPU_CLK_SEL_8821C 12
 #define BIT_MASK_CPU_CLK_SEL_8821C 0x3
 #define BIT_CPU_CLK_SEL_8821C(x) (((x) & BIT_MASK_CPU_CLK_SEL_8821C) << BIT_SHIFT_CPU_CLK_SEL_8821C)
-#define BIT_GET_CPU_CLK_SEL_8821C(x) (((x) >> BIT_SHIFT_CPU_CLK_SEL_8821C) & BIT_MASK_CPU_CLK_SEL_8821C)

+#define BIT_GET_CPU_CLK_SEL_8821C(x) (((x) >> BIT_SHIFT_CPU_CLK_SEL_8821C) & BIT_MASK_CPU_CLK_SEL_8821C)
+
 
 #define BIT_CCLK_CHG_MASK_8821C BIT(11)
 #define BIT_EMEM__TXBUF_CHKSUM_OK_8821C BIT(10)
@@ -1040,7 +1145,8 @@
 #define BIT_SHIFT_LBKTST_8821C 0
 #define BIT_MASK_LBKTST_8821C 0xffff
 #define BIT_LBKTST_8821C(x) (((x) & BIT_MASK_LBKTST_8821C) << BIT_SHIFT_LBKTST_8821C)
-#define BIT_GET_LBKTST_8821C(x) (((x) >> BIT_SHIFT_LBKTST_8821C) & BIT_MASK_LBKTST_8821C)

+#define BIT_GET_LBKTST_8821C(x) (((x) >> BIT_SHIFT_LBKTST_8821C) & BIT_MASK_LBKTST_8821C)
+
 
 
 /* 2 REG_HMEBOX_E0_E1_8821C */
@@ -1048,13 +1154,15 @@
 #define BIT_SHIFT_HOST_MSG_E1_8821C 16
 #define BIT_MASK_HOST_MSG_E1_8821C 0xffff
 #define BIT_HOST_MSG_E1_8821C(x) (((x) & BIT_MASK_HOST_MSG_E1_8821C) << BIT_SHIFT_HOST_MSG_E1_8821C)
-#define BIT_GET_HOST_MSG_E1_8821C(x) (((x) >> BIT_SHIFT_HOST_MSG_E1_8821C) & BIT_MASK_HOST_MSG_E1_8821C)

+#define BIT_GET_HOST_MSG_E1_8821C(x) (((x) >> BIT_SHIFT_HOST_MSG_E1_8821C) & BIT_MASK_HOST_MSG_E1_8821C)
+
 
 
 #define BIT_SHIFT_HOST_MSG_E0_8821C 0
 #define BIT_MASK_HOST_MSG_E0_8821C 0xffff
 #define BIT_HOST_MSG_E0_8821C(x) (((x) & BIT_MASK_HOST_MSG_E0_8821C) << BIT_SHIFT_HOST_MSG_E0_8821C)
-#define BIT_GET_HOST_MSG_E0_8821C(x) (((x) >> BIT_SHIFT_HOST_MSG_E0_8821C) & BIT_MASK_HOST_MSG_E0_8821C)

+#define BIT_GET_HOST_MSG_E0_8821C(x) (((x) >> BIT_SHIFT_HOST_MSG_E0_8821C) & BIT_MASK_HOST_MSG_E0_8821C)
+
 
 
 /* 2 REG_HMEBOX_E2_E3_8821C */
@@ -1062,13 +1170,15 @@
 #define BIT_SHIFT_HOST_MSG_E3_8821C 16
 #define BIT_MASK_HOST_MSG_E3_8821C 0xffff
 #define BIT_HOST_MSG_E3_8821C(x) (((x) & BIT_MASK_HOST_MSG_E3_8821C) << BIT_SHIFT_HOST_MSG_E3_8821C)
-#define BIT_GET_HOST_MSG_E3_8821C(x) (((x) >> BIT_SHIFT_HOST_MSG_E3_8821C) & BIT_MASK_HOST_MSG_E3_8821C)

+#define BIT_GET_HOST_MSG_E3_8821C(x) (((x) >> BIT_SHIFT_HOST_MSG_E3_8821C) & BIT_MASK_HOST_MSG_E3_8821C)
+
 
 
 #define BIT_SHIFT_HOST_MSG_E2_8821C 0
 #define BIT_MASK_HOST_MSG_E2_8821C 0xffff
 #define BIT_HOST_MSG_E2_8821C(x) (((x) & BIT_MASK_HOST_MSG_E2_8821C) << BIT_SHIFT_HOST_MSG_E2_8821C)
-#define BIT_GET_HOST_MSG_E2_8821C(x) (((x) >> BIT_SHIFT_HOST_MSG_E2_8821C) & BIT_MASK_HOST_MSG_E2_8821C)

+#define BIT_GET_HOST_MSG_E2_8821C(x) (((x) >> BIT_SHIFT_HOST_MSG_E2_8821C) & BIT_MASK_HOST_MSG_E2_8821C)
+
 
 
 /* 2 REG_WLLPS_CTRL_8821C */
@@ -1087,13 +1197,15 @@
 #define BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8821C 12
 #define BIT_MASK_LPLDH12_VADJ_STEP_DN_8821C 0xf
 #define BIT_LPLDH12_VADJ_STEP_DN_8821C(x) (((x) & BIT_MASK_LPLDH12_VADJ_STEP_DN_8821C) << BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8821C)
-#define BIT_GET_LPLDH12_VADJ_STEP_DN_8821C(x) (((x) >> BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8821C) & BIT_MASK_LPLDH12_VADJ_STEP_DN_8821C)

+#define BIT_GET_LPLDH12_VADJ_STEP_DN_8821C(x) (((x) >> BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8821C) & BIT_MASK_LPLDH12_VADJ_STEP_DN_8821C)
+
 
 
 #define BIT_SHIFT_V15ADJ_L1_STEP_DN_8821C 8
 #define BIT_MASK_V15ADJ_L1_STEP_DN_8821C 0x7
 #define BIT_V15ADJ_L1_STEP_DN_8821C(x) (((x) & BIT_MASK_V15ADJ_L1_STEP_DN_8821C) << BIT_SHIFT_V15ADJ_L1_STEP_DN_8821C)
-#define BIT_GET_V15ADJ_L1_STEP_DN_8821C(x) (((x) >> BIT_SHIFT_V15ADJ_L1_STEP_DN_8821C) & BIT_MASK_V15ADJ_L1_STEP_DN_8821C)

+#define BIT_GET_V15ADJ_L1_STEP_DN_8821C(x) (((x) >> BIT_SHIFT_V15ADJ_L1_STEP_DN_8821C) & BIT_MASK_V15ADJ_L1_STEP_DN_8821C)
+
 
 #define BIT_REGU_32K_CLK_EN_8821C BIT(1)
 #define BIT_WL_LPS_EN_8821C BIT(0)
@@ -1106,25 +1218,29 @@
 #define BIT_SHIFT_REF_SEL_8821C 25
 #define BIT_MASK_REF_SEL_8821C 0xf
 #define BIT_REF_SEL_8821C(x) (((x) & BIT_MASK_REF_SEL_8821C) << BIT_SHIFT_REF_SEL_8821C)
-#define BIT_GET_REF_SEL_8821C(x) (((x) >> BIT_SHIFT_REF_SEL_8821C) & BIT_MASK_REF_SEL_8821C)

+#define BIT_GET_REF_SEL_8821C(x) (((x) >> BIT_SHIFT_REF_SEL_8821C) & BIT_MASK_REF_SEL_8821C)
+
 
 
 #define BIT_SHIFT_F0F_SDM_8821C 12
 #define BIT_MASK_F0F_SDM_8821C 0x1fff
 #define BIT_F0F_SDM_8821C(x) (((x) & BIT_MASK_F0F_SDM_8821C) << BIT_SHIFT_F0F_SDM_8821C)
-#define BIT_GET_F0F_SDM_8821C(x) (((x) >> BIT_SHIFT_F0F_SDM_8821C) & BIT_MASK_F0F_SDM_8821C)

+#define BIT_GET_F0F_SDM_8821C(x) (((x) >> BIT_SHIFT_F0F_SDM_8821C) & BIT_MASK_F0F_SDM_8821C)
+
 
 
 #define BIT_SHIFT_F0N_SDM_8821C 9
 #define BIT_MASK_F0N_SDM_8821C 0x7
 #define BIT_F0N_SDM_8821C(x) (((x) & BIT_MASK_F0N_SDM_8821C) << BIT_SHIFT_F0N_SDM_8821C)
-#define BIT_GET_F0N_SDM_8821C(x) (((x) >> BIT_SHIFT_F0N_SDM_8821C) & BIT_MASK_F0N_SDM_8821C)

+#define BIT_GET_F0N_SDM_8821C(x) (((x) >> BIT_SHIFT_F0N_SDM_8821C) & BIT_MASK_F0N_SDM_8821C)
+
 
 
 #define BIT_SHIFT_DIVN_SDM_8821C 3
 #define BIT_MASK_DIVN_SDM_8821C 0x3f
 #define BIT_DIVN_SDM_8821C(x) (((x) & BIT_MASK_DIVN_SDM_8821C) << BIT_SHIFT_DIVN_SDM_8821C)
-#define BIT_GET_DIVN_SDM_8821C(x) (((x) >> BIT_SHIFT_DIVN_SDM_8821C) & BIT_MASK_DIVN_SDM_8821C)

+#define BIT_GET_DIVN_SDM_8821C(x) (((x) >> BIT_SHIFT_DIVN_SDM_8821C) & BIT_MASK_DIVN_SDM_8821C)
+
 
 
 /* 2 REG_GPIO_DEBOUNCE_CTRL_8821C */
@@ -1133,14 +1249,16 @@
 #define BIT_SHIFT_WLGP_DBC1_8821C 8
 #define BIT_MASK_WLGP_DBC1_8821C 0xf
 #define BIT_WLGP_DBC1_8821C(x) (((x) & BIT_MASK_WLGP_DBC1_8821C) << BIT_SHIFT_WLGP_DBC1_8821C)
-#define BIT_GET_WLGP_DBC1_8821C(x) (((x) >> BIT_SHIFT_WLGP_DBC1_8821C) & BIT_MASK_WLGP_DBC1_8821C)

+#define BIT_GET_WLGP_DBC1_8821C(x) (((x) >> BIT_SHIFT_WLGP_DBC1_8821C) & BIT_MASK_WLGP_DBC1_8821C)
+
 
 #define BIT_WLGP_DBC0EN_8821C BIT(7)
 
 #define BIT_SHIFT_WLGP_DBC0_8821C 0
 #define BIT_MASK_WLGP_DBC0_8821C 0xf
 #define BIT_WLGP_DBC0_8821C(x) (((x) & BIT_MASK_WLGP_DBC0_8821C) << BIT_SHIFT_WLGP_DBC0_8821C)
-#define BIT_GET_WLGP_DBC0_8821C(x) (((x) >> BIT_SHIFT_WLGP_DBC0_8821C) & BIT_MASK_WLGP_DBC0_8821C)

+#define BIT_GET_WLGP_DBC0_8821C(x) (((x) >> BIT_SHIFT_WLGP_DBC0_8821C) & BIT_MASK_WLGP_DBC0_8821C)
+
 
 
 /* 2 REG_RPWM2_8821C */
@@ -1148,7 +1266,8 @@
 #define BIT_SHIFT_RPWM2_8821C 16
 #define BIT_MASK_RPWM2_8821C 0xffff
 #define BIT_RPWM2_8821C(x) (((x) & BIT_MASK_RPWM2_8821C) << BIT_SHIFT_RPWM2_8821C)
-#define BIT_GET_RPWM2_8821C(x) (((x) >> BIT_SHIFT_RPWM2_8821C) & BIT_MASK_RPWM2_8821C)

+#define BIT_GET_RPWM2_8821C(x) (((x) >> BIT_SHIFT_RPWM2_8821C) & BIT_MASK_RPWM2_8821C)
+
 
 
 /* 2 REG_SYSON_FSM_MON_8821C */
@@ -1156,7 +1275,8 @@
 #define BIT_SHIFT_FSM_MON_SEL_8821C 24
 #define BIT_MASK_FSM_MON_SEL_8821C 0x7
 #define BIT_FSM_MON_SEL_8821C(x) (((x) & BIT_MASK_FSM_MON_SEL_8821C) << BIT_SHIFT_FSM_MON_SEL_8821C)
-#define BIT_GET_FSM_MON_SEL_8821C(x) (((x) >> BIT_SHIFT_FSM_MON_SEL_8821C) & BIT_MASK_FSM_MON_SEL_8821C)

+#define BIT_GET_FSM_MON_SEL_8821C(x) (((x) >> BIT_SHIFT_FSM_MON_SEL_8821C) & BIT_MASK_FSM_MON_SEL_8821C)
+
 
 #define BIT_DOP_ELDO_8821C BIT(23)
 #define BIT_FSM_MON_UPD_8821C BIT(15)
@@ -1164,7 +1284,8 @@
 #define BIT_SHIFT_FSM_PAR_8821C 0
 #define BIT_MASK_FSM_PAR_8821C 0x7fff
 #define BIT_FSM_PAR_8821C(x) (((x) & BIT_MASK_FSM_PAR_8821C) << BIT_SHIFT_FSM_PAR_8821C)
-#define BIT_GET_FSM_PAR_8821C(x) (((x) >> BIT_SHIFT_FSM_PAR_8821C) & BIT_MASK_FSM_PAR_8821C)

+#define BIT_GET_FSM_PAR_8821C(x) (((x) >> BIT_SHIFT_FSM_PAR_8821C) & BIT_MASK_FSM_PAR_8821C)
+
 
 
 /* 2 REG_AFE_CTRL6_8821C */
@@ -1172,7 +1293,8 @@
 #define BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C 0
 #define BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C 0x7
 #define BIT_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C(x) (((x) & BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C) << BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C)
-#define BIT_GET_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C(x) (((x) >> BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C) & BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C)

+#define BIT_GET_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C(x) (((x) >> BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C) & BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C)
+
 
 
 /* 2 REG_PMC_DBG_CTRL1_8821C */
@@ -1181,14 +1303,16 @@
 #define BIT_SHIFT_RD_WR_WIFI_BT_INFO_8821C 16
 #define BIT_MASK_RD_WR_WIFI_BT_INFO_8821C 0x7fff
 #define BIT_RD_WR_WIFI_BT_INFO_8821C(x) (((x) & BIT_MASK_RD_WR_WIFI_BT_INFO_8821C) << BIT_SHIFT_RD_WR_WIFI_BT_INFO_8821C)
-#define BIT_GET_RD_WR_WIFI_BT_INFO_8821C(x) (((x) >> BIT_SHIFT_RD_WR_WIFI_BT_INFO_8821C) & BIT_MASK_RD_WR_WIFI_BT_INFO_8821C)

+#define BIT_GET_RD_WR_WIFI_BT_INFO_8821C(x) (((x) >> BIT_SHIFT_RD_WR_WIFI_BT_INFO_8821C) & BIT_MASK_RD_WR_WIFI_BT_INFO_8821C)
+
 
 #define BIT_PMC_WR_OVF_8821C BIT(8)
 
 #define BIT_SHIFT_WLPMC_ERRINT_8821C 0
 #define BIT_MASK_WLPMC_ERRINT_8821C 0xff
 #define BIT_WLPMC_ERRINT_8821C(x) (((x) & BIT_MASK_WLPMC_ERRINT_8821C) << BIT_SHIFT_WLPMC_ERRINT_8821C)
-#define BIT_GET_WLPMC_ERRINT_8821C(x) (((x) >> BIT_SHIFT_WLPMC_ERRINT_8821C) & BIT_MASK_WLPMC_ERRINT_8821C)

+#define BIT_GET_WLPMC_ERRINT_8821C(x) (((x) >> BIT_SHIFT_WLPMC_ERRINT_8821C) & BIT_MASK_WLPMC_ERRINT_8821C)
+
 
 
 /* 2 REG_AFE_CTRL7_8821C */
@@ -1196,14 +1320,16 @@
 #define BIT_SHIFT_SEL_V_8821C 30
 #define BIT_MASK_SEL_V_8821C 0x3
 #define BIT_SEL_V_8821C(x) (((x) & BIT_MASK_SEL_V_8821C) << BIT_SHIFT_SEL_V_8821C)
-#define BIT_GET_SEL_V_8821C(x) (((x) >> BIT_SHIFT_SEL_V_8821C) & BIT_MASK_SEL_V_8821C)

+#define BIT_GET_SEL_V_8821C(x) (((x) >> BIT_SHIFT_SEL_V_8821C) & BIT_MASK_SEL_V_8821C)
+
 
 #define BIT_SEL_LDO_PC_8821C BIT(29)
 
 #define BIT_SHIFT_CK_MON_SEL_8821C 26
 #define BIT_MASK_CK_MON_SEL_8821C 0x7
 #define BIT_CK_MON_SEL_8821C(x) (((x) & BIT_MASK_CK_MON_SEL_8821C) << BIT_SHIFT_CK_MON_SEL_8821C)
-#define BIT_GET_CK_MON_SEL_8821C(x) (((x) >> BIT_SHIFT_CK_MON_SEL_8821C) & BIT_MASK_CK_MON_SEL_8821C)

+#define BIT_GET_CK_MON_SEL_8821C(x) (((x) >> BIT_SHIFT_CK_MON_SEL_8821C) & BIT_MASK_CK_MON_SEL_8821C)
+
 
 #define BIT_CK_MON_EN_8821C BIT(25)
 #define BIT_FREF_EDGE_8821C BIT(24)
@@ -1332,7 +1458,8 @@
 #define BIT_SHIFT_DEBUG_ST_8821C 0
 #define BIT_MASK_DEBUG_ST_8821C 0xffffffffL
 #define BIT_DEBUG_ST_8821C(x) (((x) & BIT_MASK_DEBUG_ST_8821C) << BIT_SHIFT_DEBUG_ST_8821C)
-#define BIT_GET_DEBUG_ST_8821C(x) (((x) >> BIT_SHIFT_DEBUG_ST_8821C) & BIT_MASK_DEBUG_ST_8821C)

+#define BIT_GET_DEBUG_ST_8821C(x) (((x) >> BIT_SHIFT_DEBUG_ST_8821C) & BIT_MASK_DEBUG_ST_8821C)
+
 
 
 /* 2 REG_PAD_CTRL2_8821C */
@@ -1341,7 +1468,8 @@
 #define BIT_SHIFT_USB23_SW_MODE_V1_8821C 18
 #define BIT_MASK_USB23_SW_MODE_V1_8821C 0x3
 #define BIT_USB23_SW_MODE_V1_8821C(x) (((x) & BIT_MASK_USB23_SW_MODE_V1_8821C) << BIT_SHIFT_USB23_SW_MODE_V1_8821C)
-#define BIT_GET_USB23_SW_MODE_V1_8821C(x) (((x) >> BIT_SHIFT_USB23_SW_MODE_V1_8821C) & BIT_MASK_USB23_SW_MODE_V1_8821C)

+#define BIT_GET_USB23_SW_MODE_V1_8821C(x) (((x) >> BIT_SHIFT_USB23_SW_MODE_V1_8821C) & BIT_MASK_USB23_SW_MODE_V1_8821C)
+
 
 #define BIT_NO_PDN_CHIPOFF_V1_8821C BIT(17)
 #define BIT_RSM_EN_V1_8821C BIT(16)
@@ -1349,7 +1477,8 @@
 #define BIT_SHIFT_MATCH_CNT_8821C 8
 #define BIT_MASK_MATCH_CNT_8821C 0xff
 #define BIT_MATCH_CNT_8821C(x) (((x) & BIT_MASK_MATCH_CNT_8821C) << BIT_SHIFT_MATCH_CNT_8821C)
-#define BIT_GET_MATCH_CNT_8821C(x) (((x) >> BIT_SHIFT_MATCH_CNT_8821C) & BIT_MASK_MATCH_CNT_8821C)

+#define BIT_GET_MATCH_CNT_8821C(x) (((x) >> BIT_SHIFT_MATCH_CNT_8821C) & BIT_MASK_MATCH_CNT_8821C)
+
 
 #define BIT_LD_B12V_EN_8821C BIT(7)
 #define BIT_EECS_IOSEL_V1_8821C BIT(6)
@@ -1366,7 +1495,8 @@
 #define BIT_SHIFT_EFUSE_BURN_GNT_8821C 24
 #define BIT_MASK_EFUSE_BURN_GNT_8821C 0xff
 #define BIT_EFUSE_BURN_GNT_8821C(x) (((x) & BIT_MASK_EFUSE_BURN_GNT_8821C) << BIT_SHIFT_EFUSE_BURN_GNT_8821C)
-#define BIT_GET_EFUSE_BURN_GNT_8821C(x) (((x) >> BIT_SHIFT_EFUSE_BURN_GNT_8821C) & BIT_MASK_EFUSE_BURN_GNT_8821C)

+#define BIT_GET_EFUSE_BURN_GNT_8821C(x) (((x) >> BIT_SHIFT_EFUSE_BURN_GNT_8821C) & BIT_MASK_EFUSE_BURN_GNT_8821C)
+
 
 #define BIT_STOP_WL_PMC_8821C BIT(9)
 #define BIT_STOP_SYM_PMC_8821C BIT(8)
@@ -1379,7 +1509,8 @@
 #define BIT_SHIFT_SYSON_REG_ARB_8821C 0
 #define BIT_MASK_SYSON_REG_ARB_8821C 0x3
 #define BIT_SYSON_REG_ARB_8821C(x) (((x) & BIT_MASK_SYSON_REG_ARB_8821C) << BIT_SHIFT_SYSON_REG_ARB_8821C)
-#define BIT_GET_SYSON_REG_ARB_8821C(x) (((x) >> BIT_SHIFT_SYSON_REG_ARB_8821C) & BIT_MASK_SYSON_REG_ARB_8821C)

+#define BIT_GET_SYSON_REG_ARB_8821C(x) (((x) >> BIT_SHIFT_SYSON_REG_ARB_8821C) & BIT_MASK_SYSON_REG_ARB_8821C)
+
 
 
 /* 2 REG_BIST_CTRL_8821C */
@@ -1391,7 +1522,8 @@
 #define BIT_SHIFT_BIST_RPT_SEL_8821C 16
 #define BIT_MASK_BIST_RPT_SEL_8821C 0xf
 #define BIT_BIST_RPT_SEL_8821C(x) (((x) & BIT_MASK_BIST_RPT_SEL_8821C) << BIT_SHIFT_BIST_RPT_SEL_8821C)
-#define BIT_GET_BIST_RPT_SEL_8821C(x) (((x) >> BIT_SHIFT_BIST_RPT_SEL_8821C) & BIT_MASK_BIST_RPT_SEL_8821C)

+#define BIT_GET_BIST_RPT_SEL_8821C(x) (((x) >> BIT_SHIFT_BIST_RPT_SEL_8821C) & BIT_MASK_BIST_RPT_SEL_8821C)
+
 
 #define BIT_BIST_RESUME_PS_8821C BIT(4)
 #define BIT_BIST_RESUME_8821C BIT(3)
@@ -1404,7 +1536,8 @@
 #define BIT_SHIFT_MBIST_REPORT_8821C 0
 #define BIT_MASK_MBIST_REPORT_8821C 0xffffffffL
 #define BIT_MBIST_REPORT_8821C(x) (((x) & BIT_MASK_MBIST_REPORT_8821C) << BIT_SHIFT_MBIST_REPORT_8821C)
-#define BIT_GET_MBIST_REPORT_8821C(x) (((x) >> BIT_SHIFT_MBIST_REPORT_8821C) & BIT_MASK_MBIST_REPORT_8821C)

+#define BIT_GET_MBIST_REPORT_8821C(x) (((x) >> BIT_SHIFT_MBIST_REPORT_8821C) & BIT_MASK_MBIST_REPORT_8821C)
+
 
 
 /* 2 REG_MEM_CTRL_8821C */
@@ -1413,43 +1546,50 @@
 #define BIT_SHIFT_BT_SPRAM_8821C 28
 #define BIT_MASK_BT_SPRAM_8821C 0x3
 #define BIT_BT_SPRAM_8821C(x) (((x) & BIT_MASK_BT_SPRAM_8821C) << BIT_SHIFT_BT_SPRAM_8821C)
-#define BIT_GET_BT_SPRAM_8821C(x) (((x) >> BIT_SHIFT_BT_SPRAM_8821C) & BIT_MASK_BT_SPRAM_8821C)

+#define BIT_GET_BT_SPRAM_8821C(x) (((x) >> BIT_SHIFT_BT_SPRAM_8821C) & BIT_MASK_BT_SPRAM_8821C)
+
 
 
 #define BIT_SHIFT_BT_ROM_8821C 24
 #define BIT_MASK_BT_ROM_8821C 0xf
 #define BIT_BT_ROM_8821C(x) (((x) & BIT_MASK_BT_ROM_8821C) << BIT_SHIFT_BT_ROM_8821C)
-#define BIT_GET_BT_ROM_8821C(x) (((x) >> BIT_SHIFT_BT_ROM_8821C) & BIT_MASK_BT_ROM_8821C)

+#define BIT_GET_BT_ROM_8821C(x) (((x) >> BIT_SHIFT_BT_ROM_8821C) & BIT_MASK_BT_ROM_8821C)
+
 
 
 #define BIT_SHIFT_PCI_DPRAM_8821C 10
 #define BIT_MASK_PCI_DPRAM_8821C 0x3
 #define BIT_PCI_DPRAM_8821C(x) (((x) & BIT_MASK_PCI_DPRAM_8821C) << BIT_SHIFT_PCI_DPRAM_8821C)
-#define BIT_GET_PCI_DPRAM_8821C(x) (((x) >> BIT_SHIFT_PCI_DPRAM_8821C) & BIT_MASK_PCI_DPRAM_8821C)

+#define BIT_GET_PCI_DPRAM_8821C(x) (((x) >> BIT_SHIFT_PCI_DPRAM_8821C) & BIT_MASK_PCI_DPRAM_8821C)
+
 
 
 #define BIT_SHIFT_PCI_SPRAM_8821C 8
 #define BIT_MASK_PCI_SPRAM_8821C 0x3
 #define BIT_PCI_SPRAM_8821C(x) (((x) & BIT_MASK_PCI_SPRAM_8821C) << BIT_SHIFT_PCI_SPRAM_8821C)
-#define BIT_GET_PCI_SPRAM_8821C(x) (((x) >> BIT_SHIFT_PCI_SPRAM_8821C) & BIT_MASK_PCI_SPRAM_8821C)

+#define BIT_GET_PCI_SPRAM_8821C(x) (((x) >> BIT_SHIFT_PCI_SPRAM_8821C) & BIT_MASK_PCI_SPRAM_8821C)
+
 
 
 #define BIT_SHIFT_USB_SPRAM_8821C 6
 #define BIT_MASK_USB_SPRAM_8821C 0x3
 #define BIT_USB_SPRAM_8821C(x) (((x) & BIT_MASK_USB_SPRAM_8821C) << BIT_SHIFT_USB_SPRAM_8821C)
-#define BIT_GET_USB_SPRAM_8821C(x) (((x) >> BIT_SHIFT_USB_SPRAM_8821C) & BIT_MASK_USB_SPRAM_8821C)

+#define BIT_GET_USB_SPRAM_8821C(x) (((x) >> BIT_SHIFT_USB_SPRAM_8821C) & BIT_MASK_USB_SPRAM_8821C)
+
 
 
 #define BIT_SHIFT_USB_SPRF_8821C 4
 #define BIT_MASK_USB_SPRF_8821C 0x3
 #define BIT_USB_SPRF_8821C(x) (((x) & BIT_MASK_USB_SPRF_8821C) << BIT_SHIFT_USB_SPRF_8821C)
-#define BIT_GET_USB_SPRF_8821C(x) (((x) >> BIT_SHIFT_USB_SPRF_8821C) & BIT_MASK_USB_SPRF_8821C)

+#define BIT_GET_USB_SPRF_8821C(x) (((x) >> BIT_SHIFT_USB_SPRF_8821C) & BIT_MASK_USB_SPRF_8821C)
+
 
 
 #define BIT_SHIFT_MCU_ROM_8821C 0
 #define BIT_MASK_MCU_ROM_8821C 0xf
 #define BIT_MCU_ROM_8821C(x) (((x) & BIT_MASK_MCU_ROM_8821C) << BIT_SHIFT_MCU_ROM_8821C)
-#define BIT_GET_MCU_ROM_8821C(x) (((x) >> BIT_SHIFT_MCU_ROM_8821C) & BIT_MASK_MCU_ROM_8821C)

+#define BIT_GET_MCU_ROM_8821C(x) (((x) >> BIT_SHIFT_MCU_ROM_8821C) & BIT_MASK_MCU_ROM_8821C)
+
 
 
 /* 2 REG_AFE_CTRL8_8821C */
@@ -1460,7 +1600,8 @@
 #define BIT_SHIFT_XTAL_SEL_TOK_8821C 0
 #define BIT_MASK_XTAL_SEL_TOK_8821C 0x7
 #define BIT_XTAL_SEL_TOK_8821C(x) (((x) & BIT_MASK_XTAL_SEL_TOK_8821C) << BIT_SHIFT_XTAL_SEL_TOK_8821C)
-#define BIT_GET_XTAL_SEL_TOK_8821C(x) (((x) >> BIT_SHIFT_XTAL_SEL_TOK_8821C) & BIT_MASK_XTAL_SEL_TOK_8821C)

+#define BIT_GET_XTAL_SEL_TOK_8821C(x) (((x) >> BIT_SHIFT_XTAL_SEL_TOK_8821C) & BIT_MASK_XTAL_SEL_TOK_8821C)
+
 
 
 /* 2 REG_USB_SIE_INTF_8821C */
@@ -1472,19 +1613,22 @@
 #define BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8821C 16
 #define BIT_MASK_USB_SIE_INTF_ADDR_V1_8821C 0x1ff
 #define BIT_USB_SIE_INTF_ADDR_V1_8821C(x) (((x) & BIT_MASK_USB_SIE_INTF_ADDR_V1_8821C) << BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8821C)
-#define BIT_GET_USB_SIE_INTF_ADDR_V1_8821C(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8821C) & BIT_MASK_USB_SIE_INTF_ADDR_V1_8821C)

+#define BIT_GET_USB_SIE_INTF_ADDR_V1_8821C(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8821C) & BIT_MASK_USB_SIE_INTF_ADDR_V1_8821C)
+
 
 
 #define BIT_SHIFT_USB_SIE_INTF_RD_8821C 8
 #define BIT_MASK_USB_SIE_INTF_RD_8821C 0xff
 #define BIT_USB_SIE_INTF_RD_8821C(x) (((x) & BIT_MASK_USB_SIE_INTF_RD_8821C) << BIT_SHIFT_USB_SIE_INTF_RD_8821C)
-#define BIT_GET_USB_SIE_INTF_RD_8821C(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_RD_8821C) & BIT_MASK_USB_SIE_INTF_RD_8821C)

+#define BIT_GET_USB_SIE_INTF_RD_8821C(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_RD_8821C) & BIT_MASK_USB_SIE_INTF_RD_8821C)
+
 
 
 #define BIT_SHIFT_USB_SIE_INTF_WD_8821C 0
 #define BIT_MASK_USB_SIE_INTF_WD_8821C 0xff
 #define BIT_USB_SIE_INTF_WD_8821C(x) (((x) & BIT_MASK_USB_SIE_INTF_WD_8821C) << BIT_SHIFT_USB_SIE_INTF_WD_8821C)
-#define BIT_GET_USB_SIE_INTF_WD_8821C(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_WD_8821C) & BIT_MASK_USB_SIE_INTF_WD_8821C)

+#define BIT_GET_USB_SIE_INTF_WD_8821C(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_WD_8821C) & BIT_MASK_USB_SIE_INTF_WD_8821C)
+
 
 
 /* 2 REG_PCIE_MIO_INTF_8821C */
@@ -1494,13 +1638,15 @@
 #define BIT_SHIFT_PCIE_MIO_WE_8821C 8
 #define BIT_MASK_PCIE_MIO_WE_8821C 0xf
 #define BIT_PCIE_MIO_WE_8821C(x) (((x) & BIT_MASK_PCIE_MIO_WE_8821C) << BIT_SHIFT_PCIE_MIO_WE_8821C)
-#define BIT_GET_PCIE_MIO_WE_8821C(x) (((x) >> BIT_SHIFT_PCIE_MIO_WE_8821C) & BIT_MASK_PCIE_MIO_WE_8821C)

+#define BIT_GET_PCIE_MIO_WE_8821C(x) (((x) >> BIT_SHIFT_PCIE_MIO_WE_8821C) & BIT_MASK_PCIE_MIO_WE_8821C)
+
 
 
 #define BIT_SHIFT_PCIE_MIO_ADDR_8821C 0
 #define BIT_MASK_PCIE_MIO_ADDR_8821C 0xff
 #define BIT_PCIE_MIO_ADDR_8821C(x) (((x) & BIT_MASK_PCIE_MIO_ADDR_8821C) << BIT_SHIFT_PCIE_MIO_ADDR_8821C)
-#define BIT_GET_PCIE_MIO_ADDR_8821C(x) (((x) >> BIT_SHIFT_PCIE_MIO_ADDR_8821C) & BIT_MASK_PCIE_MIO_ADDR_8821C)

+#define BIT_GET_PCIE_MIO_ADDR_8821C(x) (((x) >> BIT_SHIFT_PCIE_MIO_ADDR_8821C) & BIT_MASK_PCIE_MIO_ADDR_8821C)
+
 
 
 /* 2 REG_PCIE_MIO_INTD_8821C */
@@ -1508,7 +1654,8 @@
 #define BIT_SHIFT_PCIE_MIO_DATA_8821C 0
 #define BIT_MASK_PCIE_MIO_DATA_8821C 0xffffffffL
 #define BIT_PCIE_MIO_DATA_8821C(x) (((x) & BIT_MASK_PCIE_MIO_DATA_8821C) << BIT_SHIFT_PCIE_MIO_DATA_8821C)
-#define BIT_GET_PCIE_MIO_DATA_8821C(x) (((x) >> BIT_SHIFT_PCIE_MIO_DATA_8821C) & BIT_MASK_PCIE_MIO_DATA_8821C)

+#define BIT_GET_PCIE_MIO_DATA_8821C(x) (((x) >> BIT_SHIFT_PCIE_MIO_DATA_8821C) & BIT_MASK_PCIE_MIO_DATA_8821C)
+
 
 
 /* 2 REG_WLRF1_8821C */
@@ -1516,7 +1663,8 @@
 #define BIT_SHIFT_WLRF1_CTRL_8821C 24
 #define BIT_MASK_WLRF1_CTRL_8821C 0xff
 #define BIT_WLRF1_CTRL_8821C(x) (((x) & BIT_MASK_WLRF1_CTRL_8821C) << BIT_SHIFT_WLRF1_CTRL_8821C)
-#define BIT_GET_WLRF1_CTRL_8821C(x) (((x) >> BIT_SHIFT_WLRF1_CTRL_8821C) & BIT_MASK_WLRF1_CTRL_8821C)

+#define BIT_GET_WLRF1_CTRL_8821C(x) (((x) >> BIT_SHIFT_WLRF1_CTRL_8821C) & BIT_MASK_WLRF1_CTRL_8821C)
+
 
 
 /* 2 REG_SYS_CFG1_8821C */
@@ -1524,7 +1672,8 @@
 #define BIT_SHIFT_TRP_ICFG_8821C 28
 #define BIT_MASK_TRP_ICFG_8821C 0xf
 #define BIT_TRP_ICFG_8821C(x) (((x) & BIT_MASK_TRP_ICFG_8821C) << BIT_SHIFT_TRP_ICFG_8821C)
-#define BIT_GET_TRP_ICFG_8821C(x) (((x) >> BIT_SHIFT_TRP_ICFG_8821C) & BIT_MASK_TRP_ICFG_8821C)

+#define BIT_GET_TRP_ICFG_8821C(x) (((x) >> BIT_SHIFT_TRP_ICFG_8821C) & BIT_MASK_TRP_ICFG_8821C)
+
 
 #define BIT_RF_TYPE_ID_8821C BIT(27)
 #define BIT_BD_HCI_SEL_8821C BIT(26)
@@ -1537,13 +1686,15 @@
 #define BIT_SHIFT_VENDOR_ID_8821C 16
 #define BIT_MASK_VENDOR_ID_8821C 0xf
 #define BIT_VENDOR_ID_8821C(x) (((x) & BIT_MASK_VENDOR_ID_8821C) << BIT_SHIFT_VENDOR_ID_8821C)
-#define BIT_GET_VENDOR_ID_8821C(x) (((x) >> BIT_SHIFT_VENDOR_ID_8821C) & BIT_MASK_VENDOR_ID_8821C)

+#define BIT_GET_VENDOR_ID_8821C(x) (((x) >> BIT_SHIFT_VENDOR_ID_8821C) & BIT_MASK_VENDOR_ID_8821C)
+
 
 
 #define BIT_SHIFT_CHIP_VER_8821C 12
 #define BIT_MASK_CHIP_VER_8821C 0xf
 #define BIT_CHIP_VER_8821C(x) (((x) & BIT_MASK_CHIP_VER_8821C) << BIT_SHIFT_CHIP_VER_8821C)
-#define BIT_GET_CHIP_VER_8821C(x) (((x) >> BIT_SHIFT_CHIP_VER_8821C) & BIT_MASK_CHIP_VER_8821C)

+#define BIT_GET_CHIP_VER_8821C(x) (((x) >> BIT_SHIFT_CHIP_VER_8821C) & BIT_MASK_CHIP_VER_8821C)
+
 
 #define BIT_BD_MAC3_8821C BIT(11)
 #define BIT_BD_MAC1_8821C BIT(10)
@@ -1563,14 +1714,16 @@
 #define BIT_SHIFT_RF_RL_ID_8821C 28
 #define BIT_MASK_RF_RL_ID_8821C 0xf
 #define BIT_RF_RL_ID_8821C(x) (((x) & BIT_MASK_RF_RL_ID_8821C) << BIT_SHIFT_RF_RL_ID_8821C)
-#define BIT_GET_RF_RL_ID_8821C(x) (((x) >> BIT_SHIFT_RF_RL_ID_8821C) & BIT_MASK_RF_RL_ID_8821C)

+#define BIT_GET_RF_RL_ID_8821C(x) (((x) >> BIT_SHIFT_RF_RL_ID_8821C) & BIT_MASK_RF_RL_ID_8821C)
+
 
 #define BIT_HPHY_ICFG_8821C BIT(19)
 
 #define BIT_SHIFT_SEL_0XC0_8821C 16
 #define BIT_MASK_SEL_0XC0_8821C 0x3
 #define BIT_SEL_0XC0_8821C(x) (((x) & BIT_MASK_SEL_0XC0_8821C) << BIT_SHIFT_SEL_0XC0_8821C)
-#define BIT_GET_SEL_0XC0_8821C(x) (((x) >> BIT_SHIFT_SEL_0XC0_8821C) & BIT_MASK_SEL_0XC0_8821C)

+#define BIT_GET_SEL_0XC0_8821C(x) (((x) >> BIT_SHIFT_SEL_0XC0_8821C) & BIT_MASK_SEL_0XC0_8821C)
+
 
 #define BIT_USB_OPERATION_MODE_8821C BIT(10)
 #define BIT_BT_PDN_8821C BIT(9)
@@ -1581,19 +1734,22 @@
 #define BIT_SHIFT_HCI_SEL_8821C 4
 #define BIT_MASK_HCI_SEL_8821C 0x3
 #define BIT_HCI_SEL_8821C(x) (((x) & BIT_MASK_HCI_SEL_8821C) << BIT_SHIFT_HCI_SEL_8821C)
-#define BIT_GET_HCI_SEL_8821C(x) (((x) >> BIT_SHIFT_HCI_SEL_8821C) & BIT_MASK_HCI_SEL_8821C)

+#define BIT_GET_HCI_SEL_8821C(x) (((x) >> BIT_SHIFT_HCI_SEL_8821C) & BIT_MASK_HCI_SEL_8821C)
+
 
 
 #define BIT_SHIFT_PAD_HCI_SEL_8821C 2
 #define BIT_MASK_PAD_HCI_SEL_8821C 0x3
 #define BIT_PAD_HCI_SEL_8821C(x) (((x) & BIT_MASK_PAD_HCI_SEL_8821C) << BIT_SHIFT_PAD_HCI_SEL_8821C)
-#define BIT_GET_PAD_HCI_SEL_8821C(x) (((x) >> BIT_SHIFT_PAD_HCI_SEL_8821C) & BIT_MASK_PAD_HCI_SEL_8821C)

+#define BIT_GET_PAD_HCI_SEL_8821C(x) (((x) >> BIT_SHIFT_PAD_HCI_SEL_8821C) & BIT_MASK_PAD_HCI_SEL_8821C)
+
 
 
 #define BIT_SHIFT_EFS_HCI_SEL_8821C 0
 #define BIT_MASK_EFS_HCI_SEL_8821C 0x3
 #define BIT_EFS_HCI_SEL_8821C(x) (((x) & BIT_MASK_EFS_HCI_SEL_8821C) << BIT_SHIFT_EFS_HCI_SEL_8821C)
-#define BIT_GET_EFS_HCI_SEL_8821C(x) (((x) >> BIT_SHIFT_EFS_HCI_SEL_8821C) & BIT_MASK_EFS_HCI_SEL_8821C)

+#define BIT_GET_EFS_HCI_SEL_8821C(x) (((x) >> BIT_SHIFT_EFS_HCI_SEL_8821C) & BIT_MASK_EFS_HCI_SEL_8821C)
+
 
 
 /* 2 REG_SYS_STATUS2_8821C */
@@ -1605,13 +1761,15 @@
 #define BIT_SHIFT_EPVID1_8821C 8
 #define BIT_MASK_EPVID1_8821C 0xff
 #define BIT_EPVID1_8821C(x) (((x) & BIT_MASK_EPVID1_8821C) << BIT_SHIFT_EPVID1_8821C)
-#define BIT_GET_EPVID1_8821C(x) (((x) >> BIT_SHIFT_EPVID1_8821C) & BIT_MASK_EPVID1_8821C)

+#define BIT_GET_EPVID1_8821C(x) (((x) >> BIT_SHIFT_EPVID1_8821C) & BIT_MASK_EPVID1_8821C)
+
 
 
 #define BIT_SHIFT_EPVID0_8821C 0
 #define BIT_MASK_EPVID0_8821C 0xff
 #define BIT_EPVID0_8821C(x) (((x) & BIT_MASK_EPVID0_8821C) << BIT_SHIFT_EPVID0_8821C)
-#define BIT_GET_EPVID0_8821C(x) (((x) >> BIT_SHIFT_EPVID0_8821C) & BIT_MASK_EPVID0_8821C)

+#define BIT_GET_EPVID0_8821C(x) (((x) >> BIT_SHIFT_EPVID0_8821C) & BIT_MASK_EPVID0_8821C)
+
 
 
 /* 2 REG_SYS_CFG2_8821C */
@@ -1620,7 +1778,8 @@
 #define BIT_SHIFT_HW_ID_8821C 0
 #define BIT_MASK_HW_ID_8821C 0xff
 #define BIT_HW_ID_8821C(x) (((x) & BIT_MASK_HW_ID_8821C) << BIT_SHIFT_HW_ID_8821C)
-#define BIT_GET_HW_ID_8821C(x) (((x) >> BIT_SHIFT_HW_ID_8821C) & BIT_MASK_HW_ID_8821C)

+#define BIT_GET_HW_ID_8821C(x) (((x) >> BIT_SHIFT_HW_ID_8821C) & BIT_MASK_HW_ID_8821C)
+
 
 
 /* 2 REG_SYS_CFG3_8821C */
@@ -1653,7 +1812,8 @@
 #define BIT_SHIFT_CPU_DMEM_CON_8821C 0
 #define BIT_MASK_CPU_DMEM_CON_8821C 0xff
 #define BIT_CPU_DMEM_CON_8821C(x) (((x) & BIT_MASK_CPU_DMEM_CON_8821C) << BIT_SHIFT_CPU_DMEM_CON_8821C)
-#define BIT_GET_CPU_DMEM_CON_8821C(x) (((x) >> BIT_SHIFT_CPU_DMEM_CON_8821C) & BIT_MASK_CPU_DMEM_CON_8821C)

+#define BIT_GET_CPU_DMEM_CON_8821C(x) (((x) >> BIT_SHIFT_CPU_DMEM_CON_8821C) & BIT_MASK_CPU_DMEM_CON_8821C)
+
 
 
 /* 2 REG_BOOT_REASON_8821C */
@@ -1661,7 +1821,8 @@
 #define BIT_SHIFT_BOOT_REASON_8821C 0
 #define BIT_MASK_BOOT_REASON_8821C 0x7
 #define BIT_BOOT_REASON_8821C(x) (((x) & BIT_MASK_BOOT_REASON_8821C) << BIT_SHIFT_BOOT_REASON_8821C)
-#define BIT_GET_BOOT_REASON_8821C(x) (((x) >> BIT_SHIFT_BOOT_REASON_8821C) & BIT_MASK_BOOT_REASON_8821C)

+#define BIT_GET_BOOT_REASON_8821C(x) (((x) >> BIT_SHIFT_BOOT_REASON_8821C) & BIT_MASK_BOOT_REASON_8821C)
+
 
 
 /* 2 REG_NFCPAD_CTRL_8821C */
@@ -1676,19 +1837,22 @@
 #define BIT_SHIFT_NFCPAD_IO_SEL_8821C 8
 #define BIT_MASK_NFCPAD_IO_SEL_8821C 0xf
 #define BIT_NFCPAD_IO_SEL_8821C(x) (((x) & BIT_MASK_NFCPAD_IO_SEL_8821C) << BIT_SHIFT_NFCPAD_IO_SEL_8821C)
-#define BIT_GET_NFCPAD_IO_SEL_8821C(x) (((x) >> BIT_SHIFT_NFCPAD_IO_SEL_8821C) & BIT_MASK_NFCPAD_IO_SEL_8821C)

+#define BIT_GET_NFCPAD_IO_SEL_8821C(x) (((x) >> BIT_SHIFT_NFCPAD_IO_SEL_8821C) & BIT_MASK_NFCPAD_IO_SEL_8821C)
+
 
 
 #define BIT_SHIFT_NFCPAD_OUT_8821C 4
 #define BIT_MASK_NFCPAD_OUT_8821C 0xf
 #define BIT_NFCPAD_OUT_8821C(x) (((x) & BIT_MASK_NFCPAD_OUT_8821C) << BIT_SHIFT_NFCPAD_OUT_8821C)
-#define BIT_GET_NFCPAD_OUT_8821C(x) (((x) >> BIT_SHIFT_NFCPAD_OUT_8821C) & BIT_MASK_NFCPAD_OUT_8821C)

+#define BIT_GET_NFCPAD_OUT_8821C(x) (((x) >> BIT_SHIFT_NFCPAD_OUT_8821C) & BIT_MASK_NFCPAD_OUT_8821C)
+
 
 
 #define BIT_SHIFT_NFCPAD_IN_8821C 0
 #define BIT_MASK_NFCPAD_IN_8821C 0xf
 #define BIT_NFCPAD_IN_8821C(x) (((x) & BIT_MASK_NFCPAD_IN_8821C) << BIT_SHIFT_NFCPAD_IN_8821C)
-#define BIT_GET_NFCPAD_IN_8821C(x) (((x) >> BIT_SHIFT_NFCPAD_IN_8821C) & BIT_MASK_NFCPAD_IN_8821C)

+#define BIT_GET_NFCPAD_IN_8821C(x) (((x) >> BIT_SHIFT_NFCPAD_IN_8821C) & BIT_MASK_NFCPAD_IN_8821C)
+
 
 
 /* 2 REG_HIMR2_8821C */
@@ -1810,7 +1974,8 @@
 #define BIT_SHIFT_H2C_PKT_READADDR_8821C 0
 #define BIT_MASK_H2C_PKT_READADDR_8821C 0x3ffff
 #define BIT_H2C_PKT_READADDR_8821C(x) (((x) & BIT_MASK_H2C_PKT_READADDR_8821C) << BIT_SHIFT_H2C_PKT_READADDR_8821C)
-#define BIT_GET_H2C_PKT_READADDR_8821C(x) (((x) >> BIT_SHIFT_H2C_PKT_READADDR_8821C) & BIT_MASK_H2C_PKT_READADDR_8821C)

+#define BIT_GET_H2C_PKT_READADDR_8821C(x) (((x) >> BIT_SHIFT_H2C_PKT_READADDR_8821C) & BIT_MASK_H2C_PKT_READADDR_8821C)
+
 
 
 /* 2 REG_H2C_PKT_WRITEADDR_8821C */
@@ -1818,7 +1983,8 @@
 #define BIT_SHIFT_H2C_PKT_WRITEADDR_8821C 0
 #define BIT_MASK_H2C_PKT_WRITEADDR_8821C 0x3ffff
 #define BIT_H2C_PKT_WRITEADDR_8821C(x) (((x) & BIT_MASK_H2C_PKT_WRITEADDR_8821C) << BIT_SHIFT_H2C_PKT_WRITEADDR_8821C)
-#define BIT_GET_H2C_PKT_WRITEADDR_8821C(x) (((x) >> BIT_SHIFT_H2C_PKT_WRITEADDR_8821C) & BIT_MASK_H2C_PKT_WRITEADDR_8821C)

+#define BIT_GET_H2C_PKT_WRITEADDR_8821C(x) (((x) >> BIT_SHIFT_H2C_PKT_WRITEADDR_8821C) & BIT_MASK_H2C_PKT_WRITEADDR_8821C)
+
 
 
 /* 2 REG_MEM_PWR_CRTL_8821C */
@@ -1841,7 +2007,8 @@
 #define BIT_SHIFT_FW_DBG0_8821C 0
 #define BIT_MASK_FW_DBG0_8821C 0xffffffffL
 #define BIT_FW_DBG0_8821C(x) (((x) & BIT_MASK_FW_DBG0_8821C) << BIT_SHIFT_FW_DBG0_8821C)
-#define BIT_GET_FW_DBG0_8821C(x) (((x) >> BIT_SHIFT_FW_DBG0_8821C) & BIT_MASK_FW_DBG0_8821C)

+#define BIT_GET_FW_DBG0_8821C(x) (((x) >> BIT_SHIFT_FW_DBG0_8821C) & BIT_MASK_FW_DBG0_8821C)
+
 
 
 /* 2 REG_FW_DBG1_8821C */
@@ -1849,7 +2016,8 @@
 #define BIT_SHIFT_FW_DBG1_8821C 0
 #define BIT_MASK_FW_DBG1_8821C 0xffffffffL
 #define BIT_FW_DBG1_8821C(x) (((x) & BIT_MASK_FW_DBG1_8821C) << BIT_SHIFT_FW_DBG1_8821C)
-#define BIT_GET_FW_DBG1_8821C(x) (((x) >> BIT_SHIFT_FW_DBG1_8821C) & BIT_MASK_FW_DBG1_8821C)

+#define BIT_GET_FW_DBG1_8821C(x) (((x) >> BIT_SHIFT_FW_DBG1_8821C) & BIT_MASK_FW_DBG1_8821C)
+
 
 
 /* 2 REG_FW_DBG2_8821C */
@@ -1857,7 +2025,8 @@
 #define BIT_SHIFT_FW_DBG2_8821C 0
 #define BIT_MASK_FW_DBG2_8821C 0xffffffffL
 #define BIT_FW_DBG2_8821C(x) (((x) & BIT_MASK_FW_DBG2_8821C) << BIT_SHIFT_FW_DBG2_8821C)
-#define BIT_GET_FW_DBG2_8821C(x) (((x) >> BIT_SHIFT_FW_DBG2_8821C) & BIT_MASK_FW_DBG2_8821C)

+#define BIT_GET_FW_DBG2_8821C(x) (((x) >> BIT_SHIFT_FW_DBG2_8821C) & BIT_MASK_FW_DBG2_8821C)
+
 
 
 /* 2 REG_FW_DBG3_8821C */
@@ -1865,7 +2034,8 @@
 #define BIT_SHIFT_FW_DBG3_8821C 0
 #define BIT_MASK_FW_DBG3_8821C 0xffffffffL
 #define BIT_FW_DBG3_8821C(x) (((x) & BIT_MASK_FW_DBG3_8821C) << BIT_SHIFT_FW_DBG3_8821C)
-#define BIT_GET_FW_DBG3_8821C(x) (((x) >> BIT_SHIFT_FW_DBG3_8821C) & BIT_MASK_FW_DBG3_8821C)

+#define BIT_GET_FW_DBG3_8821C(x) (((x) >> BIT_SHIFT_FW_DBG3_8821C) & BIT_MASK_FW_DBG3_8821C)
+
 
 
 /* 2 REG_FW_DBG4_8821C */
@@ -1873,7 +2043,8 @@
 #define BIT_SHIFT_FW_DBG4_8821C 0
 #define BIT_MASK_FW_DBG4_8821C 0xffffffffL
 #define BIT_FW_DBG4_8821C(x) (((x) & BIT_MASK_FW_DBG4_8821C) << BIT_SHIFT_FW_DBG4_8821C)
-#define BIT_GET_FW_DBG4_8821C(x) (((x) >> BIT_SHIFT_FW_DBG4_8821C) & BIT_MASK_FW_DBG4_8821C)

+#define BIT_GET_FW_DBG4_8821C(x) (((x) >> BIT_SHIFT_FW_DBG4_8821C) & BIT_MASK_FW_DBG4_8821C)
+
 
 
 /* 2 REG_FW_DBG5_8821C */
@@ -1881,7 +2052,8 @@
 #define BIT_SHIFT_FW_DBG5_8821C 0
 #define BIT_MASK_FW_DBG5_8821C 0xffffffffL
 #define BIT_FW_DBG5_8821C(x) (((x) & BIT_MASK_FW_DBG5_8821C) << BIT_SHIFT_FW_DBG5_8821C)
-#define BIT_GET_FW_DBG5_8821C(x) (((x) >> BIT_SHIFT_FW_DBG5_8821C) & BIT_MASK_FW_DBG5_8821C)

+#define BIT_GET_FW_DBG5_8821C(x) (((x) >> BIT_SHIFT_FW_DBG5_8821C) & BIT_MASK_FW_DBG5_8821C)
+
 
 
 /* 2 REG_FW_DBG6_8821C */
@@ -1889,7 +2061,8 @@
 #define BIT_SHIFT_FW_DBG6_8821C 0
 #define BIT_MASK_FW_DBG6_8821C 0xffffffffL
 #define BIT_FW_DBG6_8821C(x) (((x) & BIT_MASK_FW_DBG6_8821C) << BIT_SHIFT_FW_DBG6_8821C)
-#define BIT_GET_FW_DBG6_8821C(x) (((x) >> BIT_SHIFT_FW_DBG6_8821C) & BIT_MASK_FW_DBG6_8821C)

+#define BIT_GET_FW_DBG6_8821C(x) (((x) >> BIT_SHIFT_FW_DBG6_8821C) & BIT_MASK_FW_DBG6_8821C)
+
 
 
 /* 2 REG_FW_DBG7_8821C */
@@ -1897,7 +2070,8 @@
 #define BIT_SHIFT_FW_DBG7_8821C 0
 #define BIT_MASK_FW_DBG7_8821C 0xffffffffL
 #define BIT_FW_DBG7_8821C(x) (((x) & BIT_MASK_FW_DBG7_8821C) << BIT_SHIFT_FW_DBG7_8821C)
-#define BIT_GET_FW_DBG7_8821C(x) (((x) >> BIT_SHIFT_FW_DBG7_8821C) & BIT_MASK_FW_DBG7_8821C)

+#define BIT_GET_FW_DBG7_8821C(x) (((x) >> BIT_SHIFT_FW_DBG7_8821C) & BIT_MASK_FW_DBG7_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -1907,19 +2081,22 @@
 #define BIT_SHIFT_LBMODE_8821C 24
 #define BIT_MASK_LBMODE_8821C 0x1f
 #define BIT_LBMODE_8821C(x) (((x) & BIT_MASK_LBMODE_8821C) << BIT_SHIFT_LBMODE_8821C)
-#define BIT_GET_LBMODE_8821C(x) (((x) >> BIT_SHIFT_LBMODE_8821C) & BIT_MASK_LBMODE_8821C)

+#define BIT_GET_LBMODE_8821C(x) (((x) >> BIT_SHIFT_LBMODE_8821C) & BIT_MASK_LBMODE_8821C)
+
 
 
 #define BIT_SHIFT_NETYPE1_8821C 18
 #define BIT_MASK_NETYPE1_8821C 0x3
 #define BIT_NETYPE1_8821C(x) (((x) & BIT_MASK_NETYPE1_8821C) << BIT_SHIFT_NETYPE1_8821C)
-#define BIT_GET_NETYPE1_8821C(x) (((x) >> BIT_SHIFT_NETYPE1_8821C) & BIT_MASK_NETYPE1_8821C)

+#define BIT_GET_NETYPE1_8821C(x) (((x) >> BIT_SHIFT_NETYPE1_8821C) & BIT_MASK_NETYPE1_8821C)
+
 
 
 #define BIT_SHIFT_NETYPE0_8821C 16
 #define BIT_MASK_NETYPE0_8821C 0x3
 #define BIT_NETYPE0_8821C(x) (((x) & BIT_MASK_NETYPE0_8821C) << BIT_SHIFT_NETYPE0_8821C)
-#define BIT_GET_NETYPE0_8821C(x) (((x) >> BIT_SHIFT_NETYPE0_8821C) & BIT_MASK_NETYPE0_8821C)

+#define BIT_GET_NETYPE0_8821C(x) (((x) >> BIT_SHIFT_NETYPE0_8821C) & BIT_MASK_NETYPE0_8821C)
+
 
 #define BIT_I2C_MAILBOX_EN_8821C BIT(12)
 #define BIT_SHCUT_EN_8821C BIT(11)
@@ -1942,7 +2119,8 @@
 #define BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8821C 0
 #define BIT_MASK_PKT_BUFF_ACCESS_CTRL_8821C 0xff
 #define BIT_PKT_BUFF_ACCESS_CTRL_8821C(x) (((x) & BIT_MASK_PKT_BUFF_ACCESS_CTRL_8821C) << BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8821C)
-#define BIT_GET_PKT_BUFF_ACCESS_CTRL_8821C(x) (((x) >> BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8821C) & BIT_MASK_PKT_BUFF_ACCESS_CTRL_8821C)

+#define BIT_GET_PKT_BUFF_ACCESS_CTRL_8821C(x) (((x) >> BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8821C) & BIT_MASK_PKT_BUFF_ACCESS_CTRL_8821C)
+
 
 
 /* 2 REG_TSF_CLK_STATE_8821C */
@@ -1953,37 +2131,43 @@
 #define BIT_SHIFT_TXDMA_HIQ_MAP_8821C 14
 #define BIT_MASK_TXDMA_HIQ_MAP_8821C 0x3
 #define BIT_TXDMA_HIQ_MAP_8821C(x) (((x) & BIT_MASK_TXDMA_HIQ_MAP_8821C) << BIT_SHIFT_TXDMA_HIQ_MAP_8821C)
-#define BIT_GET_TXDMA_HIQ_MAP_8821C(x) (((x) >> BIT_SHIFT_TXDMA_HIQ_MAP_8821C) & BIT_MASK_TXDMA_HIQ_MAP_8821C)

+#define BIT_GET_TXDMA_HIQ_MAP_8821C(x) (((x) >> BIT_SHIFT_TXDMA_HIQ_MAP_8821C) & BIT_MASK_TXDMA_HIQ_MAP_8821C)
+
 
 
 #define BIT_SHIFT_TXDMA_MGQ_MAP_8821C 12
 #define BIT_MASK_TXDMA_MGQ_MAP_8821C 0x3
 #define BIT_TXDMA_MGQ_MAP_8821C(x) (((x) & BIT_MASK_TXDMA_MGQ_MAP_8821C) << BIT_SHIFT_TXDMA_MGQ_MAP_8821C)
-#define BIT_GET_TXDMA_MGQ_MAP_8821C(x) (((x) >> BIT_SHIFT_TXDMA_MGQ_MAP_8821C) & BIT_MASK_TXDMA_MGQ_MAP_8821C)

+#define BIT_GET_TXDMA_MGQ_MAP_8821C(x) (((x) >> BIT_SHIFT_TXDMA_MGQ_MAP_8821C) & BIT_MASK_TXDMA_MGQ_MAP_8821C)
+
 
 
 #define BIT_SHIFT_TXDMA_BKQ_MAP_8821C 10
 #define BIT_MASK_TXDMA_BKQ_MAP_8821C 0x3
 #define BIT_TXDMA_BKQ_MAP_8821C(x) (((x) & BIT_MASK_TXDMA_BKQ_MAP_8821C) << BIT_SHIFT_TXDMA_BKQ_MAP_8821C)
-#define BIT_GET_TXDMA_BKQ_MAP_8821C(x) (((x) >> BIT_SHIFT_TXDMA_BKQ_MAP_8821C) & BIT_MASK_TXDMA_BKQ_MAP_8821C)

+#define BIT_GET_TXDMA_BKQ_MAP_8821C(x) (((x) >> BIT_SHIFT_TXDMA_BKQ_MAP_8821C) & BIT_MASK_TXDMA_BKQ_MAP_8821C)
+
 
 
 #define BIT_SHIFT_TXDMA_BEQ_MAP_8821C 8
 #define BIT_MASK_TXDMA_BEQ_MAP_8821C 0x3
 #define BIT_TXDMA_BEQ_MAP_8821C(x) (((x) & BIT_MASK_TXDMA_BEQ_MAP_8821C) << BIT_SHIFT_TXDMA_BEQ_MAP_8821C)
-#define BIT_GET_TXDMA_BEQ_MAP_8821C(x) (((x) >> BIT_SHIFT_TXDMA_BEQ_MAP_8821C) & BIT_MASK_TXDMA_BEQ_MAP_8821C)

+#define BIT_GET_TXDMA_BEQ_MAP_8821C(x) (((x) >> BIT_SHIFT_TXDMA_BEQ_MAP_8821C) & BIT_MASK_TXDMA_BEQ_MAP_8821C)
+
 
 
 #define BIT_SHIFT_TXDMA_VIQ_MAP_8821C 6
 #define BIT_MASK_TXDMA_VIQ_MAP_8821C 0x3
 #define BIT_TXDMA_VIQ_MAP_8821C(x) (((x) & BIT_MASK_TXDMA_VIQ_MAP_8821C) << BIT_SHIFT_TXDMA_VIQ_MAP_8821C)
-#define BIT_GET_TXDMA_VIQ_MAP_8821C(x) (((x) >> BIT_SHIFT_TXDMA_VIQ_MAP_8821C) & BIT_MASK_TXDMA_VIQ_MAP_8821C)

+#define BIT_GET_TXDMA_VIQ_MAP_8821C(x) (((x) >> BIT_SHIFT_TXDMA_VIQ_MAP_8821C) & BIT_MASK_TXDMA_VIQ_MAP_8821C)
+
 
 
 #define BIT_SHIFT_TXDMA_VOQ_MAP_8821C 4
 #define BIT_MASK_TXDMA_VOQ_MAP_8821C 0x3
 #define BIT_TXDMA_VOQ_MAP_8821C(x) (((x) & BIT_MASK_TXDMA_VOQ_MAP_8821C) << BIT_SHIFT_TXDMA_VOQ_MAP_8821C)
-#define BIT_GET_TXDMA_VOQ_MAP_8821C(x) (((x) >> BIT_SHIFT_TXDMA_VOQ_MAP_8821C) & BIT_MASK_TXDMA_VOQ_MAP_8821C)

+#define BIT_GET_TXDMA_VOQ_MAP_8821C(x) (((x) >> BIT_SHIFT_TXDMA_VOQ_MAP_8821C) & BIT_MASK_TXDMA_VOQ_MAP_8821C)
+
 
 #define BIT_RXDMA_AGG_EN_8821C BIT(2)
 #define BIT_RXSHFT_EN_8821C BIT(1)
@@ -1996,13 +2180,15 @@
 #define BIT_SHIFT_RXFFOVFL_RSV_V2_8821C 8
 #define BIT_MASK_RXFFOVFL_RSV_V2_8821C 0xf
 #define BIT_RXFFOVFL_RSV_V2_8821C(x) (((x) & BIT_MASK_RXFFOVFL_RSV_V2_8821C) << BIT_SHIFT_RXFFOVFL_RSV_V2_8821C)
-#define BIT_GET_RXFFOVFL_RSV_V2_8821C(x) (((x) >> BIT_SHIFT_RXFFOVFL_RSV_V2_8821C) & BIT_MASK_RXFFOVFL_RSV_V2_8821C)

+#define BIT_GET_RXFFOVFL_RSV_V2_8821C(x) (((x) >> BIT_SHIFT_RXFFOVFL_RSV_V2_8821C) & BIT_MASK_RXFFOVFL_RSV_V2_8821C)
+
 
 
 #define BIT_SHIFT_TXPKTBUF_PGBNDY_8821C 0
 #define BIT_MASK_TXPKTBUF_PGBNDY_8821C 0xff
 #define BIT_TXPKTBUF_PGBNDY_8821C(x) (((x) & BIT_MASK_TXPKTBUF_PGBNDY_8821C) << BIT_SHIFT_TXPKTBUF_PGBNDY_8821C)
-#define BIT_GET_TXPKTBUF_PGBNDY_8821C(x) (((x) >> BIT_SHIFT_TXPKTBUF_PGBNDY_8821C) & BIT_MASK_TXPKTBUF_PGBNDY_8821C)

+#define BIT_GET_TXPKTBUF_PGBNDY_8821C(x) (((x) >> BIT_SHIFT_TXPKTBUF_PGBNDY_8821C) & BIT_MASK_TXPKTBUF_PGBNDY_8821C)
+
 
 
 /* 2 REG_PTA_I2C_MBOX_8821C */
@@ -2012,20 +2198,23 @@
 #define BIT_SHIFT_I2C_M_STATUS_8821C 8
 #define BIT_MASK_I2C_M_STATUS_8821C 0xf
 #define BIT_I2C_M_STATUS_8821C(x) (((x) & BIT_MASK_I2C_M_STATUS_8821C) << BIT_SHIFT_I2C_M_STATUS_8821C)
-#define BIT_GET_I2C_M_STATUS_8821C(x) (((x) >> BIT_SHIFT_I2C_M_STATUS_8821C) & BIT_MASK_I2C_M_STATUS_8821C)

+#define BIT_GET_I2C_M_STATUS_8821C(x) (((x) >> BIT_SHIFT_I2C_M_STATUS_8821C) & BIT_MASK_I2C_M_STATUS_8821C)
+
 
 
 #define BIT_SHIFT_I2C_M_BUS_GNT_FW_8821C 4
 #define BIT_MASK_I2C_M_BUS_GNT_FW_8821C 0x7
 #define BIT_I2C_M_BUS_GNT_FW_8821C(x) (((x) & BIT_MASK_I2C_M_BUS_GNT_FW_8821C) << BIT_SHIFT_I2C_M_BUS_GNT_FW_8821C)
-#define BIT_GET_I2C_M_BUS_GNT_FW_8821C(x) (((x) >> BIT_SHIFT_I2C_M_BUS_GNT_FW_8821C) & BIT_MASK_I2C_M_BUS_GNT_FW_8821C)

+#define BIT_GET_I2C_M_BUS_GNT_FW_8821C(x) (((x) >> BIT_SHIFT_I2C_M_BUS_GNT_FW_8821C) & BIT_MASK_I2C_M_BUS_GNT_FW_8821C)
+
 
 #define BIT_I2C_M_GNT_FW_8821C BIT(3)
 
 #define BIT_SHIFT_I2C_M_SPEED_8821C 1
 #define BIT_MASK_I2C_M_SPEED_8821C 0x3
 #define BIT_I2C_M_SPEED_8821C(x) (((x) & BIT_MASK_I2C_M_SPEED_8821C) << BIT_SHIFT_I2C_M_SPEED_8821C)
-#define BIT_GET_I2C_M_SPEED_8821C(x) (((x) >> BIT_SHIFT_I2C_M_SPEED_8821C) & BIT_MASK_I2C_M_SPEED_8821C)

+#define BIT_GET_I2C_M_SPEED_8821C(x) (((x) >> BIT_SHIFT_I2C_M_SPEED_8821C) & BIT_MASK_I2C_M_SPEED_8821C)
+
 
 #define BIT_I2C_M_UNLOCK_8821C BIT(0)
 
@@ -2036,7 +2225,8 @@
 #define BIT_SHIFT_RXFF0_BNDY_V2_8821C 0
 #define BIT_MASK_RXFF0_BNDY_V2_8821C 0x3ffff
 #define BIT_RXFF0_BNDY_V2_8821C(x) (((x) & BIT_MASK_RXFF0_BNDY_V2_8821C) << BIT_SHIFT_RXFF0_BNDY_V2_8821C)
-#define BIT_GET_RXFF0_BNDY_V2_8821C(x) (((x) >> BIT_SHIFT_RXFF0_BNDY_V2_8821C) & BIT_MASK_RXFF0_BNDY_V2_8821C)

+#define BIT_GET_RXFF0_BNDY_V2_8821C(x) (((x) >> BIT_SHIFT_RXFF0_BNDY_V2_8821C) & BIT_MASK_RXFF0_BNDY_V2_8821C)
+
 
 
 /* 2 REG_FE1IMR_8821C */
@@ -2105,7 +2295,8 @@
 #define BIT_SHIFT_CPWM_MOD_8821C 24
 #define BIT_MASK_CPWM_MOD_8821C 0x7f
 #define BIT_CPWM_MOD_8821C(x) (((x) & BIT_MASK_CPWM_MOD_8821C) << BIT_SHIFT_CPWM_MOD_8821C)
-#define BIT_GET_CPWM_MOD_8821C(x) (((x) >> BIT_SHIFT_CPWM_MOD_8821C) & BIT_MASK_CPWM_MOD_8821C)

+#define BIT_GET_CPWM_MOD_8821C(x) (((x) >> BIT_SHIFT_CPWM_MOD_8821C) & BIT_MASK_CPWM_MOD_8821C)
+
 
 
 /* 2 REG_FWIMR_8821C */
@@ -2225,7 +2416,8 @@
 #define BIT_SHIFT_PKTBUF_WRITE_EN_8821C 24
 #define BIT_MASK_PKTBUF_WRITE_EN_8821C 0xff
 #define BIT_PKTBUF_WRITE_EN_8821C(x) (((x) & BIT_MASK_PKTBUF_WRITE_EN_8821C) << BIT_SHIFT_PKTBUF_WRITE_EN_8821C)
-#define BIT_GET_PKTBUF_WRITE_EN_8821C(x) (((x) >> BIT_SHIFT_PKTBUF_WRITE_EN_8821C) & BIT_MASK_PKTBUF_WRITE_EN_8821C)

+#define BIT_GET_PKTBUF_WRITE_EN_8821C(x) (((x) >> BIT_SHIFT_PKTBUF_WRITE_EN_8821C) & BIT_MASK_PKTBUF_WRITE_EN_8821C)
+
 
 #define BIT_TXRPTBUF_DBG_8821C BIT(23)
 
@@ -2236,7 +2428,8 @@
 #define BIT_SHIFT_PKTBUF_DBG_ADDR_8821C 0
 #define BIT_MASK_PKTBUF_DBG_ADDR_8821C 0x1fff
 #define BIT_PKTBUF_DBG_ADDR_8821C(x) (((x) & BIT_MASK_PKTBUF_DBG_ADDR_8821C) << BIT_SHIFT_PKTBUF_DBG_ADDR_8821C)
-#define BIT_GET_PKTBUF_DBG_ADDR_8821C(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_ADDR_8821C) & BIT_MASK_PKTBUF_DBG_ADDR_8821C)

+#define BIT_GET_PKTBUF_DBG_ADDR_8821C(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_ADDR_8821C) & BIT_MASK_PKTBUF_DBG_ADDR_8821C)
+
 
 
 /* 2 REG_PKTBUF_DBG_DATA_L_8821C */
@@ -2244,7 +2437,8 @@
 #define BIT_SHIFT_PKTBUF_DBG_DATA_L_8821C 0
 #define BIT_MASK_PKTBUF_DBG_DATA_L_8821C 0xffffffffL
 #define BIT_PKTBUF_DBG_DATA_L_8821C(x) (((x) & BIT_MASK_PKTBUF_DBG_DATA_L_8821C) << BIT_SHIFT_PKTBUF_DBG_DATA_L_8821C)
-#define BIT_GET_PKTBUF_DBG_DATA_L_8821C(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_L_8821C) & BIT_MASK_PKTBUF_DBG_DATA_L_8821C)

+#define BIT_GET_PKTBUF_DBG_DATA_L_8821C(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_L_8821C) & BIT_MASK_PKTBUF_DBG_DATA_L_8821C)
+
 
 
 /* 2 REG_PKTBUF_DBG_DATA_H_8821C */
@@ -2252,7 +2446,8 @@
 #define BIT_SHIFT_PKTBUF_DBG_DATA_H_8821C 0
 #define BIT_MASK_PKTBUF_DBG_DATA_H_8821C 0xffffffffL
 #define BIT_PKTBUF_DBG_DATA_H_8821C(x) (((x) & BIT_MASK_PKTBUF_DBG_DATA_H_8821C) << BIT_SHIFT_PKTBUF_DBG_DATA_H_8821C)
-#define BIT_GET_PKTBUF_DBG_DATA_H_8821C(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_H_8821C) & BIT_MASK_PKTBUF_DBG_DATA_H_8821C)

+#define BIT_GET_PKTBUF_DBG_DATA_H_8821C(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_H_8821C) & BIT_MASK_PKTBUF_DBG_DATA_H_8821C)
+
 
 
 /* 2 REG_CPWM2_8821C */
@@ -2260,14 +2455,16 @@
 #define BIT_SHIFT_L0S_TO_RCVY_NUM_8821C 16
 #define BIT_MASK_L0S_TO_RCVY_NUM_8821C 0xff
 #define BIT_L0S_TO_RCVY_NUM_8821C(x) (((x) & BIT_MASK_L0S_TO_RCVY_NUM_8821C) << BIT_SHIFT_L0S_TO_RCVY_NUM_8821C)
-#define BIT_GET_L0S_TO_RCVY_NUM_8821C(x) (((x) >> BIT_SHIFT_L0S_TO_RCVY_NUM_8821C) & BIT_MASK_L0S_TO_RCVY_NUM_8821C)

+#define BIT_GET_L0S_TO_RCVY_NUM_8821C(x) (((x) >> BIT_SHIFT_L0S_TO_RCVY_NUM_8821C) & BIT_MASK_L0S_TO_RCVY_NUM_8821C)
+
 
 #define BIT_CPWM2_TOGGLING_8821C BIT(15)
 
 #define BIT_SHIFT_CPWM2_MOD_8821C 0
 #define BIT_MASK_CPWM2_MOD_8821C 0x7fff
 #define BIT_CPWM2_MOD_8821C(x) (((x) & BIT_MASK_CPWM2_MOD_8821C) << BIT_SHIFT_CPWM2_MOD_8821C)
-#define BIT_GET_CPWM2_MOD_8821C(x) (((x) >> BIT_SHIFT_CPWM2_MOD_8821C) & BIT_MASK_CPWM2_MOD_8821C)

+#define BIT_GET_CPWM2_MOD_8821C(x) (((x) >> BIT_SHIFT_CPWM2_MOD_8821C) & BIT_MASK_CPWM2_MOD_8821C)
+
 
 
 /* 2 REG_TC0_CTRL_8821C */
@@ -2278,7 +2475,8 @@
 #define BIT_SHIFT_TC0DATA_8821C 0
 #define BIT_MASK_TC0DATA_8821C 0xffffff
 #define BIT_TC0DATA_8821C(x) (((x) & BIT_MASK_TC0DATA_8821C) << BIT_SHIFT_TC0DATA_8821C)
-#define BIT_GET_TC0DATA_8821C(x) (((x) >> BIT_SHIFT_TC0DATA_8821C) & BIT_MASK_TC0DATA_8821C)

+#define BIT_GET_TC0DATA_8821C(x) (((x) >> BIT_SHIFT_TC0DATA_8821C) & BIT_MASK_TC0DATA_8821C)
+
 
 
 /* 2 REG_TC1_CTRL_8821C */
@@ -2289,7 +2487,8 @@
 #define BIT_SHIFT_TC1DATA_8821C 0
 #define BIT_MASK_TC1DATA_8821C 0xffffff
 #define BIT_TC1DATA_8821C(x) (((x) & BIT_MASK_TC1DATA_8821C) << BIT_SHIFT_TC1DATA_8821C)
-#define BIT_GET_TC1DATA_8821C(x) (((x) >> BIT_SHIFT_TC1DATA_8821C) & BIT_MASK_TC1DATA_8821C)

+#define BIT_GET_TC1DATA_8821C(x) (((x) >> BIT_SHIFT_TC1DATA_8821C) & BIT_MASK_TC1DATA_8821C)
+
 
 
 /* 2 REG_TC2_CTRL_8821C */
@@ -2300,7 +2499,8 @@
 #define BIT_SHIFT_TC2DATA_8821C 0
 #define BIT_MASK_TC2DATA_8821C 0xffffff
 #define BIT_TC2DATA_8821C(x) (((x) & BIT_MASK_TC2DATA_8821C) << BIT_SHIFT_TC2DATA_8821C)
-#define BIT_GET_TC2DATA_8821C(x) (((x) >> BIT_SHIFT_TC2DATA_8821C) & BIT_MASK_TC2DATA_8821C)

+#define BIT_GET_TC2DATA_8821C(x) (((x) >> BIT_SHIFT_TC2DATA_8821C) & BIT_MASK_TC2DATA_8821C)
+
 
 
 /* 2 REG_TC3_CTRL_8821C */
@@ -2311,7 +2511,8 @@
 #define BIT_SHIFT_TC3DATA_8821C 0
 #define BIT_MASK_TC3DATA_8821C 0xffffff
 #define BIT_TC3DATA_8821C(x) (((x) & BIT_MASK_TC3DATA_8821C) << BIT_SHIFT_TC3DATA_8821C)
-#define BIT_GET_TC3DATA_8821C(x) (((x) >> BIT_SHIFT_TC3DATA_8821C) & BIT_MASK_TC3DATA_8821C)

+#define BIT_GET_TC3DATA_8821C(x) (((x) >> BIT_SHIFT_TC3DATA_8821C) & BIT_MASK_TC3DATA_8821C)
+
 
 
 /* 2 REG_TC4_CTRL_8821C */
@@ -2322,7 +2523,8 @@
 #define BIT_SHIFT_TC4DATA_8821C 0
 #define BIT_MASK_TC4DATA_8821C 0xffffff
 #define BIT_TC4DATA_8821C(x) (((x) & BIT_MASK_TC4DATA_8821C) << BIT_SHIFT_TC4DATA_8821C)
-#define BIT_GET_TC4DATA_8821C(x) (((x) >> BIT_SHIFT_TC4DATA_8821C) & BIT_MASK_TC4DATA_8821C)

+#define BIT_GET_TC4DATA_8821C(x) (((x) >> BIT_SHIFT_TC4DATA_8821C) & BIT_MASK_TC4DATA_8821C)
+
 
 
 /* 2 REG_TCUNIT_BASE_8821C */
@@ -2330,7 +2532,8 @@
 #define BIT_SHIFT_TCUNIT_BASE_8821C 0
 #define BIT_MASK_TCUNIT_BASE_8821C 0x3fff
 #define BIT_TCUNIT_BASE_8821C(x) (((x) & BIT_MASK_TCUNIT_BASE_8821C) << BIT_SHIFT_TCUNIT_BASE_8821C)
-#define BIT_GET_TCUNIT_BASE_8821C(x) (((x) >> BIT_SHIFT_TCUNIT_BASE_8821C) & BIT_MASK_TCUNIT_BASE_8821C)

+#define BIT_GET_TCUNIT_BASE_8821C(x) (((x) >> BIT_SHIFT_TCUNIT_BASE_8821C) & BIT_MASK_TCUNIT_BASE_8821C)
+
 
 
 /* 2 REG_TC5_CTRL_8821C */
@@ -2341,7 +2544,8 @@
 #define BIT_SHIFT_TC5DATA_8821C 0
 #define BIT_MASK_TC5DATA_8821C 0xffffff
 #define BIT_TC5DATA_8821C(x) (((x) & BIT_MASK_TC5DATA_8821C) << BIT_SHIFT_TC5DATA_8821C)
-#define BIT_GET_TC5DATA_8821C(x) (((x) >> BIT_SHIFT_TC5DATA_8821C) & BIT_MASK_TC5DATA_8821C)

+#define BIT_GET_TC5DATA_8821C(x) (((x) >> BIT_SHIFT_TC5DATA_8821C) & BIT_MASK_TC5DATA_8821C)
+
 
 
 /* 2 REG_TC6_CTRL_8821C */
@@ -2352,7 +2556,8 @@
 #define BIT_SHIFT_TC6DATA_8821C 0
 #define BIT_MASK_TC6DATA_8821C 0xffffff
 #define BIT_TC6DATA_8821C(x) (((x) & BIT_MASK_TC6DATA_8821C) << BIT_SHIFT_TC6DATA_8821C)
-#define BIT_GET_TC6DATA_8821C(x) (((x) >> BIT_SHIFT_TC6DATA_8821C) & BIT_MASK_TC6DATA_8821C)

+#define BIT_GET_TC6DATA_8821C(x) (((x) >> BIT_SHIFT_TC6DATA_8821C) & BIT_MASK_TC6DATA_8821C)
+
 
 
 /* 2 REG_MBIST_FAIL_8821C */
@@ -2360,25 +2565,29 @@
 #define BIT_SHIFT_8051_MBIST_FAIL_8821C 26
 #define BIT_MASK_8051_MBIST_FAIL_8821C 0x7
 #define BIT_8051_MBIST_FAIL_8821C(x) (((x) & BIT_MASK_8051_MBIST_FAIL_8821C) << BIT_SHIFT_8051_MBIST_FAIL_8821C)
-#define BIT_GET_8051_MBIST_FAIL_8821C(x) (((x) >> BIT_SHIFT_8051_MBIST_FAIL_8821C) & BIT_MASK_8051_MBIST_FAIL_8821C)

+#define BIT_GET_8051_MBIST_FAIL_8821C(x) (((x) >> BIT_SHIFT_8051_MBIST_FAIL_8821C) & BIT_MASK_8051_MBIST_FAIL_8821C)
+
 
 
 #define BIT_SHIFT_USB_MBIST_FAIL_8821C 24
 #define BIT_MASK_USB_MBIST_FAIL_8821C 0x3
 #define BIT_USB_MBIST_FAIL_8821C(x) (((x) & BIT_MASK_USB_MBIST_FAIL_8821C) << BIT_SHIFT_USB_MBIST_FAIL_8821C)
-#define BIT_GET_USB_MBIST_FAIL_8821C(x) (((x) >> BIT_SHIFT_USB_MBIST_FAIL_8821C) & BIT_MASK_USB_MBIST_FAIL_8821C)

+#define BIT_GET_USB_MBIST_FAIL_8821C(x) (((x) >> BIT_SHIFT_USB_MBIST_FAIL_8821C) & BIT_MASK_USB_MBIST_FAIL_8821C)
+
 
 
 #define BIT_SHIFT_PCIE_MBIST_FAIL_8821C 16
 #define BIT_MASK_PCIE_MBIST_FAIL_8821C 0x3f
 #define BIT_PCIE_MBIST_FAIL_8821C(x) (((x) & BIT_MASK_PCIE_MBIST_FAIL_8821C) << BIT_SHIFT_PCIE_MBIST_FAIL_8821C)
-#define BIT_GET_PCIE_MBIST_FAIL_8821C(x) (((x) >> BIT_SHIFT_PCIE_MBIST_FAIL_8821C) & BIT_MASK_PCIE_MBIST_FAIL_8821C)

+#define BIT_GET_PCIE_MBIST_FAIL_8821C(x) (((x) >> BIT_SHIFT_PCIE_MBIST_FAIL_8821C) & BIT_MASK_PCIE_MBIST_FAIL_8821C)
+
 
 
 #define BIT_SHIFT_MAC_MBIST_FAIL_8821C 0
 #define BIT_MASK_MAC_MBIST_FAIL_8821C 0xfff
 #define BIT_MAC_MBIST_FAIL_8821C(x) (((x) & BIT_MASK_MAC_MBIST_FAIL_8821C) << BIT_SHIFT_MAC_MBIST_FAIL_8821C)
-#define BIT_GET_MAC_MBIST_FAIL_8821C(x) (((x) >> BIT_SHIFT_MAC_MBIST_FAIL_8821C) & BIT_MASK_MAC_MBIST_FAIL_8821C)

+#define BIT_GET_MAC_MBIST_FAIL_8821C(x) (((x) >> BIT_SHIFT_MAC_MBIST_FAIL_8821C) & BIT_MASK_MAC_MBIST_FAIL_8821C)
+
 
 
 /* 2 REG_MBIST_START_PAUSE_8821C */
@@ -2386,25 +2595,29 @@
 #define BIT_SHIFT_8051_MBIST_START_PAUSE_8821C 26
 #define BIT_MASK_8051_MBIST_START_PAUSE_8821C 0x7
 #define BIT_8051_MBIST_START_PAUSE_8821C(x) (((x) & BIT_MASK_8051_MBIST_START_PAUSE_8821C) << BIT_SHIFT_8051_MBIST_START_PAUSE_8821C)
-#define BIT_GET_8051_MBIST_START_PAUSE_8821C(x) (((x) >> BIT_SHIFT_8051_MBIST_START_PAUSE_8821C) & BIT_MASK_8051_MBIST_START_PAUSE_8821C)

+#define BIT_GET_8051_MBIST_START_PAUSE_8821C(x) (((x) >> BIT_SHIFT_8051_MBIST_START_PAUSE_8821C) & BIT_MASK_8051_MBIST_START_PAUSE_8821C)
+
 
 
 #define BIT_SHIFT_USB_MBIST_START_PAUSE_8821C 24
 #define BIT_MASK_USB_MBIST_START_PAUSE_8821C 0x3
 #define BIT_USB_MBIST_START_PAUSE_8821C(x) (((x) & BIT_MASK_USB_MBIST_START_PAUSE_8821C) << BIT_SHIFT_USB_MBIST_START_PAUSE_8821C)
-#define BIT_GET_USB_MBIST_START_PAUSE_8821C(x) (((x) >> BIT_SHIFT_USB_MBIST_START_PAUSE_8821C) & BIT_MASK_USB_MBIST_START_PAUSE_8821C)

+#define BIT_GET_USB_MBIST_START_PAUSE_8821C(x) (((x) >> BIT_SHIFT_USB_MBIST_START_PAUSE_8821C) & BIT_MASK_USB_MBIST_START_PAUSE_8821C)
+
 
 
 #define BIT_SHIFT_PCIE_MBIST_START_PAUSE_8821C 16
 #define BIT_MASK_PCIE_MBIST_START_PAUSE_8821C 0x3f
 #define BIT_PCIE_MBIST_START_PAUSE_8821C(x) (((x) & BIT_MASK_PCIE_MBIST_START_PAUSE_8821C) << BIT_SHIFT_PCIE_MBIST_START_PAUSE_8821C)
-#define BIT_GET_PCIE_MBIST_START_PAUSE_8821C(x) (((x) >> BIT_SHIFT_PCIE_MBIST_START_PAUSE_8821C) & BIT_MASK_PCIE_MBIST_START_PAUSE_8821C)

+#define BIT_GET_PCIE_MBIST_START_PAUSE_8821C(x) (((x) >> BIT_SHIFT_PCIE_MBIST_START_PAUSE_8821C) & BIT_MASK_PCIE_MBIST_START_PAUSE_8821C)
+
 
 
 #define BIT_SHIFT_MAC_MBIST_START_PAUSE_8821C 0
 #define BIT_MASK_MAC_MBIST_START_PAUSE_8821C 0xfff
 #define BIT_MAC_MBIST_START_PAUSE_8821C(x) (((x) & BIT_MASK_MAC_MBIST_START_PAUSE_8821C) << BIT_SHIFT_MAC_MBIST_START_PAUSE_8821C)
-#define BIT_GET_MAC_MBIST_START_PAUSE_8821C(x) (((x) >> BIT_SHIFT_MAC_MBIST_START_PAUSE_8821C) & BIT_MASK_MAC_MBIST_START_PAUSE_8821C)

+#define BIT_GET_MAC_MBIST_START_PAUSE_8821C(x) (((x) >> BIT_SHIFT_MAC_MBIST_START_PAUSE_8821C) & BIT_MASK_MAC_MBIST_START_PAUSE_8821C)
+
 
 
 /* 2 REG_MBIST_DONE_8821C */
@@ -2412,25 +2625,29 @@
 #define BIT_SHIFT_8051_MBIST_DONE_8821C 26
 #define BIT_MASK_8051_MBIST_DONE_8821C 0x7
 #define BIT_8051_MBIST_DONE_8821C(x) (((x) & BIT_MASK_8051_MBIST_DONE_8821C) << BIT_SHIFT_8051_MBIST_DONE_8821C)
-#define BIT_GET_8051_MBIST_DONE_8821C(x) (((x) >> BIT_SHIFT_8051_MBIST_DONE_8821C) & BIT_MASK_8051_MBIST_DONE_8821C)

+#define BIT_GET_8051_MBIST_DONE_8821C(x) (((x) >> BIT_SHIFT_8051_MBIST_DONE_8821C) & BIT_MASK_8051_MBIST_DONE_8821C)
+
 
 
 #define BIT_SHIFT_USB_MBIST_DONE_8821C 24
 #define BIT_MASK_USB_MBIST_DONE_8821C 0x3
 #define BIT_USB_MBIST_DONE_8821C(x) (((x) & BIT_MASK_USB_MBIST_DONE_8821C) << BIT_SHIFT_USB_MBIST_DONE_8821C)
-#define BIT_GET_USB_MBIST_DONE_8821C(x) (((x) >> BIT_SHIFT_USB_MBIST_DONE_8821C) & BIT_MASK_USB_MBIST_DONE_8821C)

+#define BIT_GET_USB_MBIST_DONE_8821C(x) (((x) >> BIT_SHIFT_USB_MBIST_DONE_8821C) & BIT_MASK_USB_MBIST_DONE_8821C)
+
 
 
 #define BIT_SHIFT_PCIE_MBIST_DONE_8821C 16
 #define BIT_MASK_PCIE_MBIST_DONE_8821C 0x3f
 #define BIT_PCIE_MBIST_DONE_8821C(x) (((x) & BIT_MASK_PCIE_MBIST_DONE_8821C) << BIT_SHIFT_PCIE_MBIST_DONE_8821C)
-#define BIT_GET_PCIE_MBIST_DONE_8821C(x) (((x) >> BIT_SHIFT_PCIE_MBIST_DONE_8821C) & BIT_MASK_PCIE_MBIST_DONE_8821C)

+#define BIT_GET_PCIE_MBIST_DONE_8821C(x) (((x) >> BIT_SHIFT_PCIE_MBIST_DONE_8821C) & BIT_MASK_PCIE_MBIST_DONE_8821C)
+
 
 
 #define BIT_SHIFT_MAC_MBIST_DONE_8821C 0
 #define BIT_MASK_MAC_MBIST_DONE_8821C 0xfff
 #define BIT_MAC_MBIST_DONE_8821C(x) (((x) & BIT_MASK_MAC_MBIST_DONE_8821C) << BIT_SHIFT_MAC_MBIST_DONE_8821C)
-#define BIT_GET_MAC_MBIST_DONE_8821C(x) (((x) >> BIT_SHIFT_MAC_MBIST_DONE_8821C) & BIT_MASK_MAC_MBIST_DONE_8821C)

+#define BIT_GET_MAC_MBIST_DONE_8821C(x) (((x) >> BIT_SHIFT_MAC_MBIST_DONE_8821C) & BIT_MASK_MAC_MBIST_DONE_8821C)
+
 
 
 /* 2 REG_MBIST_FAIL_NRML_8821C */
@@ -2438,7 +2655,8 @@
 #define BIT_SHIFT_MBIST_FAIL_NRML_8821C 0
 #define BIT_MASK_MBIST_FAIL_NRML_8821C 0xffffffffL
 #define BIT_MBIST_FAIL_NRML_8821C(x) (((x) & BIT_MASK_MBIST_FAIL_NRML_8821C) << BIT_SHIFT_MBIST_FAIL_NRML_8821C)
-#define BIT_GET_MBIST_FAIL_NRML_8821C(x) (((x) >> BIT_SHIFT_MBIST_FAIL_NRML_8821C) & BIT_MASK_MBIST_FAIL_NRML_8821C)

+#define BIT_GET_MBIST_FAIL_NRML_8821C(x) (((x) >> BIT_SHIFT_MBIST_FAIL_NRML_8821C) & BIT_MASK_MBIST_FAIL_NRML_8821C)
+
 
 
 /* 2 REG_AES_DECRPT_DATA_8821C */
@@ -2446,7 +2664,8 @@
 #define BIT_SHIFT_IPS_CFG_ADDR_8821C 0
 #define BIT_MASK_IPS_CFG_ADDR_8821C 0xff
 #define BIT_IPS_CFG_ADDR_8821C(x) (((x) & BIT_MASK_IPS_CFG_ADDR_8821C) << BIT_SHIFT_IPS_CFG_ADDR_8821C)
-#define BIT_GET_IPS_CFG_ADDR_8821C(x) (((x) >> BIT_SHIFT_IPS_CFG_ADDR_8821C) & BIT_MASK_IPS_CFG_ADDR_8821C)

+#define BIT_GET_IPS_CFG_ADDR_8821C(x) (((x) >> BIT_SHIFT_IPS_CFG_ADDR_8821C) & BIT_MASK_IPS_CFG_ADDR_8821C)
+
 
 
 /* 2 REG_AES_DECRPT_CFG_8821C */
@@ -2454,7 +2673,8 @@
 #define BIT_SHIFT_IPS_CFG_DATA_8821C 0
 #define BIT_MASK_IPS_CFG_DATA_8821C 0xffffffffL
 #define BIT_IPS_CFG_DATA_8821C(x) (((x) & BIT_MASK_IPS_CFG_DATA_8821C) << BIT_SHIFT_IPS_CFG_DATA_8821C)
-#define BIT_GET_IPS_CFG_DATA_8821C(x) (((x) >> BIT_SHIFT_IPS_CFG_DATA_8821C) & BIT_MASK_IPS_CFG_DATA_8821C)

+#define BIT_GET_IPS_CFG_DATA_8821C(x) (((x) >> BIT_SHIFT_IPS_CFG_DATA_8821C) & BIT_MASK_IPS_CFG_DATA_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -2467,19 +2687,22 @@
 #define BIT_SHIFT_TEMP_VALUE_8821C 24
 #define BIT_MASK_TEMP_VALUE_8821C 0x3f
 #define BIT_TEMP_VALUE_8821C(x) (((x) & BIT_MASK_TEMP_VALUE_8821C) << BIT_SHIFT_TEMP_VALUE_8821C)
-#define BIT_GET_TEMP_VALUE_8821C(x) (((x) >> BIT_SHIFT_TEMP_VALUE_8821C) & BIT_MASK_TEMP_VALUE_8821C)

+#define BIT_GET_TEMP_VALUE_8821C(x) (((x) >> BIT_SHIFT_TEMP_VALUE_8821C) & BIT_MASK_TEMP_VALUE_8821C)
+
 
 
 #define BIT_SHIFT_REG_TMETER_TIMER_8821C 8
 #define BIT_MASK_REG_TMETER_TIMER_8821C 0xfff
 #define BIT_REG_TMETER_TIMER_8821C(x) (((x) & BIT_MASK_REG_TMETER_TIMER_8821C) << BIT_SHIFT_REG_TMETER_TIMER_8821C)
-#define BIT_GET_REG_TMETER_TIMER_8821C(x) (((x) >> BIT_SHIFT_REG_TMETER_TIMER_8821C) & BIT_MASK_REG_TMETER_TIMER_8821C)

+#define BIT_GET_REG_TMETER_TIMER_8821C(x) (((x) >> BIT_SHIFT_REG_TMETER_TIMER_8821C) & BIT_MASK_REG_TMETER_TIMER_8821C)
+
 
 
 #define BIT_SHIFT_REG_TEMP_DELTA_8821C 2
 #define BIT_MASK_REG_TEMP_DELTA_8821C 0x3f
 #define BIT_REG_TEMP_DELTA_8821C(x) (((x) & BIT_MASK_REG_TEMP_DELTA_8821C) << BIT_SHIFT_REG_TEMP_DELTA_8821C)
-#define BIT_GET_REG_TEMP_DELTA_8821C(x) (((x) >> BIT_SHIFT_REG_TEMP_DELTA_8821C) & BIT_MASK_REG_TEMP_DELTA_8821C)

+#define BIT_GET_REG_TEMP_DELTA_8821C(x) (((x) >> BIT_SHIFT_REG_TEMP_DELTA_8821C) & BIT_MASK_REG_TEMP_DELTA_8821C)
+
 
 #define BIT_REG_TMETER_EN_8821C BIT(0)
 
@@ -2488,13 +2711,15 @@
 #define BIT_SHIFT_OSC_32K_CLKGEN_0_8821C 16
 #define BIT_MASK_OSC_32K_CLKGEN_0_8821C 0xffff
 #define BIT_OSC_32K_CLKGEN_0_8821C(x) (((x) & BIT_MASK_OSC_32K_CLKGEN_0_8821C) << BIT_SHIFT_OSC_32K_CLKGEN_0_8821C)
-#define BIT_GET_OSC_32K_CLKGEN_0_8821C(x) (((x) >> BIT_SHIFT_OSC_32K_CLKGEN_0_8821C) & BIT_MASK_OSC_32K_CLKGEN_0_8821C)

+#define BIT_GET_OSC_32K_CLKGEN_0_8821C(x) (((x) >> BIT_SHIFT_OSC_32K_CLKGEN_0_8821C) & BIT_MASK_OSC_32K_CLKGEN_0_8821C)
+
 
 
 #define BIT_SHIFT_OSC_32K_RES_COMP_8821C 4
 #define BIT_MASK_OSC_32K_RES_COMP_8821C 0x3
 #define BIT_OSC_32K_RES_COMP_8821C(x) (((x) & BIT_MASK_OSC_32K_RES_COMP_8821C) << BIT_SHIFT_OSC_32K_RES_COMP_8821C)
-#define BIT_GET_OSC_32K_RES_COMP_8821C(x) (((x) >> BIT_SHIFT_OSC_32K_RES_COMP_8821C) & BIT_MASK_OSC_32K_RES_COMP_8821C)

+#define BIT_GET_OSC_32K_RES_COMP_8821C(x) (((x) >> BIT_SHIFT_OSC_32K_RES_COMP_8821C) & BIT_MASK_OSC_32K_RES_COMP_8821C)
+
 
 #define BIT_OSC_32K_OUT_SEL_8821C BIT(3)
 #define BIT_ISO_WL_2_OSC_32K_8821C BIT(1)
@@ -2507,13 +2732,15 @@
 #define BIT_SHIFT_CAL_32K_REG_ADDR_8821C 16
 #define BIT_MASK_CAL_32K_REG_ADDR_8821C 0x3f
 #define BIT_CAL_32K_REG_ADDR_8821C(x) (((x) & BIT_MASK_CAL_32K_REG_ADDR_8821C) << BIT_SHIFT_CAL_32K_REG_ADDR_8821C)
-#define BIT_GET_CAL_32K_REG_ADDR_8821C(x) (((x) >> BIT_SHIFT_CAL_32K_REG_ADDR_8821C) & BIT_MASK_CAL_32K_REG_ADDR_8821C)

+#define BIT_GET_CAL_32K_REG_ADDR_8821C(x) (((x) >> BIT_SHIFT_CAL_32K_REG_ADDR_8821C) & BIT_MASK_CAL_32K_REG_ADDR_8821C)
+
 
 
 #define BIT_SHIFT_CAL_32K_REG_DATA_8821C 0
 #define BIT_MASK_CAL_32K_REG_DATA_8821C 0xffff
 #define BIT_CAL_32K_REG_DATA_8821C(x) (((x) & BIT_MASK_CAL_32K_REG_DATA_8821C) << BIT_SHIFT_CAL_32K_REG_DATA_8821C)
-#define BIT_GET_CAL_32K_REG_DATA_8821C(x) (((x) >> BIT_SHIFT_CAL_32K_REG_DATA_8821C) & BIT_MASK_CAL_32K_REG_DATA_8821C)

+#define BIT_GET_CAL_32K_REG_DATA_8821C(x) (((x) >> BIT_SHIFT_CAL_32K_REG_DATA_8821C) & BIT_MASK_CAL_32K_REG_DATA_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -2523,7 +2750,8 @@
 #define BIT_SHIFT_C2HEVT_MSG_V1_8821C 0
 #define BIT_MASK_C2HEVT_MSG_V1_8821C 0xffffffffL
 #define BIT_C2HEVT_MSG_V1_8821C(x) (((x) & BIT_MASK_C2HEVT_MSG_V1_8821C) << BIT_SHIFT_C2HEVT_MSG_V1_8821C)
-#define BIT_GET_C2HEVT_MSG_V1_8821C(x) (((x) >> BIT_SHIFT_C2HEVT_MSG_V1_8821C) & BIT_MASK_C2HEVT_MSG_V1_8821C)

+#define BIT_GET_C2HEVT_MSG_V1_8821C(x) (((x) >> BIT_SHIFT_C2HEVT_MSG_V1_8821C) & BIT_MASK_C2HEVT_MSG_V1_8821C)
+
 
 
 /* 2 REG_C2HEVT_1_8821C */
@@ -2531,7 +2759,8 @@
 #define BIT_SHIFT_C2HEVT_MSG_1_8821C 0
 #define BIT_MASK_C2HEVT_MSG_1_8821C 0xffffffffL
 #define BIT_C2HEVT_MSG_1_8821C(x) (((x) & BIT_MASK_C2HEVT_MSG_1_8821C) << BIT_SHIFT_C2HEVT_MSG_1_8821C)
-#define BIT_GET_C2HEVT_MSG_1_8821C(x) (((x) >> BIT_SHIFT_C2HEVT_MSG_1_8821C) & BIT_MASK_C2HEVT_MSG_1_8821C)

+#define BIT_GET_C2HEVT_MSG_1_8821C(x) (((x) >> BIT_SHIFT_C2HEVT_MSG_1_8821C) & BIT_MASK_C2HEVT_MSG_1_8821C)
+
 
 
 /* 2 REG_C2HEVT_2_8821C */
@@ -2539,7 +2768,8 @@
 #define BIT_SHIFT_C2HEVT_MSG_2_8821C 0
 #define BIT_MASK_C2HEVT_MSG_2_8821C 0xffffffffL
 #define BIT_C2HEVT_MSG_2_8821C(x) (((x) & BIT_MASK_C2HEVT_MSG_2_8821C) << BIT_SHIFT_C2HEVT_MSG_2_8821C)
-#define BIT_GET_C2HEVT_MSG_2_8821C(x) (((x) >> BIT_SHIFT_C2HEVT_MSG_2_8821C) & BIT_MASK_C2HEVT_MSG_2_8821C)

+#define BIT_GET_C2HEVT_MSG_2_8821C(x) (((x) >> BIT_SHIFT_C2HEVT_MSG_2_8821C) & BIT_MASK_C2HEVT_MSG_2_8821C)
+
 
 
 /* 2 REG_C2HEVT_3_8821C */
@@ -2547,7 +2777,8 @@
 #define BIT_SHIFT_C2HEVT_MSG_3_8821C 0
 #define BIT_MASK_C2HEVT_MSG_3_8821C 0xffffffffL
 #define BIT_C2HEVT_MSG_3_8821C(x) (((x) & BIT_MASK_C2HEVT_MSG_3_8821C) << BIT_SHIFT_C2HEVT_MSG_3_8821C)
-#define BIT_GET_C2HEVT_MSG_3_8821C(x) (((x) >> BIT_SHIFT_C2HEVT_MSG_3_8821C) & BIT_MASK_C2HEVT_MSG_3_8821C)

+#define BIT_GET_C2HEVT_MSG_3_8821C(x) (((x) >> BIT_SHIFT_C2HEVT_MSG_3_8821C) & BIT_MASK_C2HEVT_MSG_3_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -2559,7 +2790,8 @@
 #define BIT_SHIFT_SW_DEFINED_PAGE1_V1_8821C 0
 #define BIT_MASK_SW_DEFINED_PAGE1_V1_8821C 0xffffffffL
 #define BIT_SW_DEFINED_PAGE1_V1_8821C(x) (((x) & BIT_MASK_SW_DEFINED_PAGE1_V1_8821C) << BIT_SHIFT_SW_DEFINED_PAGE1_V1_8821C)
-#define BIT_GET_SW_DEFINED_PAGE1_V1_8821C(x) (((x) >> BIT_SHIFT_SW_DEFINED_PAGE1_V1_8821C) & BIT_MASK_SW_DEFINED_PAGE1_V1_8821C)

+#define BIT_GET_SW_DEFINED_PAGE1_V1_8821C(x) (((x) >> BIT_SHIFT_SW_DEFINED_PAGE1_V1_8821C) & BIT_MASK_SW_DEFINED_PAGE1_V1_8821C)
+
 
 
 /* 2 REG_SW_DEFINED_PAGE2_8821C */
@@ -2567,7 +2799,8 @@
 #define BIT_SHIFT_SW_DEFINED_PAGE2_8821C 0
 #define BIT_MASK_SW_DEFINED_PAGE2_8821C 0xffffffffL
 #define BIT_SW_DEFINED_PAGE2_8821C(x) (((x) & BIT_MASK_SW_DEFINED_PAGE2_8821C) << BIT_SHIFT_SW_DEFINED_PAGE2_8821C)
-#define BIT_GET_SW_DEFINED_PAGE2_8821C(x) (((x) >> BIT_SHIFT_SW_DEFINED_PAGE2_8821C) & BIT_MASK_SW_DEFINED_PAGE2_8821C)

+#define BIT_GET_SW_DEFINED_PAGE2_8821C(x) (((x) >> BIT_SHIFT_SW_DEFINED_PAGE2_8821C) & BIT_MASK_SW_DEFINED_PAGE2_8821C)
+
 
 
 /* 2 REG_MCUTST_I_8821C */
@@ -2575,7 +2808,8 @@
 #define BIT_SHIFT_MCUDMSG_I_8821C 0
 #define BIT_MASK_MCUDMSG_I_8821C 0xffffffffL
 #define BIT_MCUDMSG_I_8821C(x) (((x) & BIT_MASK_MCUDMSG_I_8821C) << BIT_SHIFT_MCUDMSG_I_8821C)
-#define BIT_GET_MCUDMSG_I_8821C(x) (((x) >> BIT_SHIFT_MCUDMSG_I_8821C) & BIT_MASK_MCUDMSG_I_8821C)

+#define BIT_GET_MCUDMSG_I_8821C(x) (((x) >> BIT_SHIFT_MCUDMSG_I_8821C) & BIT_MASK_MCUDMSG_I_8821C)
+
 
 
 /* 2 REG_MCUTST_II_8821C */
@@ -2583,7 +2817,8 @@
 #define BIT_SHIFT_MCUDMSG_II_8821C 0
 #define BIT_MASK_MCUDMSG_II_8821C 0xffffffffL
 #define BIT_MCUDMSG_II_8821C(x) (((x) & BIT_MASK_MCUDMSG_II_8821C) << BIT_SHIFT_MCUDMSG_II_8821C)
-#define BIT_GET_MCUDMSG_II_8821C(x) (((x) >> BIT_SHIFT_MCUDMSG_II_8821C) & BIT_MASK_MCUDMSG_II_8821C)

+#define BIT_GET_MCUDMSG_II_8821C(x) (((x) >> BIT_SHIFT_MCUDMSG_II_8821C) & BIT_MASK_MCUDMSG_II_8821C)
+
 
 
 /* 2 REG_FMETHR_8821C */
@@ -2592,7 +2827,8 @@
 #define BIT_SHIFT_FW_MSG_8821C 0
 #define BIT_MASK_FW_MSG_8821C 0xffffffffL
 #define BIT_FW_MSG_8821C(x) (((x) & BIT_MASK_FW_MSG_8821C) << BIT_SHIFT_FW_MSG_8821C)
-#define BIT_GET_FW_MSG_8821C(x) (((x) >> BIT_SHIFT_FW_MSG_8821C) & BIT_MASK_FW_MSG_8821C)

+#define BIT_GET_FW_MSG_8821C(x) (((x) >> BIT_SHIFT_FW_MSG_8821C) & BIT_MASK_FW_MSG_8821C)
+
 
 
 /* 2 REG_HMETFR_8821C */
@@ -2600,7 +2836,8 @@
 #define BIT_SHIFT_HRCV_MSG_8821C 24
 #define BIT_MASK_HRCV_MSG_8821C 0xff
 #define BIT_HRCV_MSG_8821C(x) (((x) & BIT_MASK_HRCV_MSG_8821C) << BIT_SHIFT_HRCV_MSG_8821C)
-#define BIT_GET_HRCV_MSG_8821C(x) (((x) >> BIT_SHIFT_HRCV_MSG_8821C) & BIT_MASK_HRCV_MSG_8821C)

+#define BIT_GET_HRCV_MSG_8821C(x) (((x) >> BIT_SHIFT_HRCV_MSG_8821C) & BIT_MASK_HRCV_MSG_8821C)
+
 
 #define BIT_INT_BOX3_8821C BIT(3)
 #define BIT_INT_BOX2_8821C BIT(2)
@@ -2612,7 +2849,8 @@
 #define BIT_SHIFT_HOST_MSG_0_8821C 0
 #define BIT_MASK_HOST_MSG_0_8821C 0xffffffffL
 #define BIT_HOST_MSG_0_8821C(x) (((x) & BIT_MASK_HOST_MSG_0_8821C) << BIT_SHIFT_HOST_MSG_0_8821C)
-#define BIT_GET_HOST_MSG_0_8821C(x) (((x) >> BIT_SHIFT_HOST_MSG_0_8821C) & BIT_MASK_HOST_MSG_0_8821C)

+#define BIT_GET_HOST_MSG_0_8821C(x) (((x) >> BIT_SHIFT_HOST_MSG_0_8821C) & BIT_MASK_HOST_MSG_0_8821C)
+
 
 
 /* 2 REG_HMEBOX1_8821C */
@@ -2620,7 +2858,8 @@
 #define BIT_SHIFT_HOST_MSG_1_8821C 0
 #define BIT_MASK_HOST_MSG_1_8821C 0xffffffffL
 #define BIT_HOST_MSG_1_8821C(x) (((x) & BIT_MASK_HOST_MSG_1_8821C) << BIT_SHIFT_HOST_MSG_1_8821C)
-#define BIT_GET_HOST_MSG_1_8821C(x) (((x) >> BIT_SHIFT_HOST_MSG_1_8821C) & BIT_MASK_HOST_MSG_1_8821C)

+#define BIT_GET_HOST_MSG_1_8821C(x) (((x) >> BIT_SHIFT_HOST_MSG_1_8821C) & BIT_MASK_HOST_MSG_1_8821C)
+
 
 
 /* 2 REG_HMEBOX2_8821C */
@@ -2628,7 +2867,8 @@
 #define BIT_SHIFT_HOST_MSG_2_8821C 0
 #define BIT_MASK_HOST_MSG_2_8821C 0xffffffffL
 #define BIT_HOST_MSG_2_8821C(x) (((x) & BIT_MASK_HOST_MSG_2_8821C) << BIT_SHIFT_HOST_MSG_2_8821C)
-#define BIT_GET_HOST_MSG_2_8821C(x) (((x) >> BIT_SHIFT_HOST_MSG_2_8821C) & BIT_MASK_HOST_MSG_2_8821C)

+#define BIT_GET_HOST_MSG_2_8821C(x) (((x) >> BIT_SHIFT_HOST_MSG_2_8821C) & BIT_MASK_HOST_MSG_2_8821C)
+
 
 
 /* 2 REG_HMEBOX3_8821C */
@@ -2636,7 +2876,8 @@
 #define BIT_SHIFT_HOST_MSG_3_8821C 0
 #define BIT_MASK_HOST_MSG_3_8821C 0xffffffffL
 #define BIT_HOST_MSG_3_8821C(x) (((x) & BIT_MASK_HOST_MSG_3_8821C) << BIT_SHIFT_HOST_MSG_3_8821C)
-#define BIT_GET_HOST_MSG_3_8821C(x) (((x) >> BIT_SHIFT_HOST_MSG_3_8821C) & BIT_MASK_HOST_MSG_3_8821C)

+#define BIT_GET_HOST_MSG_3_8821C(x) (((x) >> BIT_SHIFT_HOST_MSG_3_8821C) & BIT_MASK_HOST_MSG_3_8821C)
+
 
 
 /* 2 REG_LLT_INIT_8821C */
@@ -2644,19 +2885,22 @@
 #define BIT_SHIFT_LLTE_RWM_8821C 30
 #define BIT_MASK_LLTE_RWM_8821C 0x3
 #define BIT_LLTE_RWM_8821C(x) (((x) & BIT_MASK_LLTE_RWM_8821C) << BIT_SHIFT_LLTE_RWM_8821C)
-#define BIT_GET_LLTE_RWM_8821C(x) (((x) >> BIT_SHIFT_LLTE_RWM_8821C) & BIT_MASK_LLTE_RWM_8821C)

+#define BIT_GET_LLTE_RWM_8821C(x) (((x) >> BIT_SHIFT_LLTE_RWM_8821C) & BIT_MASK_LLTE_RWM_8821C)
+
 
 
 #define BIT_SHIFT_LLTINI_PDATA_V1_8821C 16
 #define BIT_MASK_LLTINI_PDATA_V1_8821C 0xfff
 #define BIT_LLTINI_PDATA_V1_8821C(x) (((x) & BIT_MASK_LLTINI_PDATA_V1_8821C) << BIT_SHIFT_LLTINI_PDATA_V1_8821C)
-#define BIT_GET_LLTINI_PDATA_V1_8821C(x) (((x) >> BIT_SHIFT_LLTINI_PDATA_V1_8821C) & BIT_MASK_LLTINI_PDATA_V1_8821C)

+#define BIT_GET_LLTINI_PDATA_V1_8821C(x) (((x) >> BIT_SHIFT_LLTINI_PDATA_V1_8821C) & BIT_MASK_LLTINI_PDATA_V1_8821C)
+
 
 
 #define BIT_SHIFT_LLTINI_HDATA_V1_8821C 0
 #define BIT_MASK_LLTINI_HDATA_V1_8821C 0xfff
 #define BIT_LLTINI_HDATA_V1_8821C(x) (((x) & BIT_MASK_LLTINI_HDATA_V1_8821C) << BIT_SHIFT_LLTINI_HDATA_V1_8821C)
-#define BIT_GET_LLTINI_HDATA_V1_8821C(x) (((x) >> BIT_SHIFT_LLTINI_HDATA_V1_8821C) & BIT_MASK_LLTINI_HDATA_V1_8821C)

+#define BIT_GET_LLTINI_HDATA_V1_8821C(x) (((x) >> BIT_SHIFT_LLTINI_HDATA_V1_8821C) & BIT_MASK_LLTINI_HDATA_V1_8821C)
+
 
 
 /* 2 REG_LLT_INIT_ADDR_8821C */
@@ -2664,7 +2908,8 @@
 #define BIT_SHIFT_LLTINI_ADDR_V1_8821C 0
 #define BIT_MASK_LLTINI_ADDR_V1_8821C 0xfff
 #define BIT_LLTINI_ADDR_V1_8821C(x) (((x) & BIT_MASK_LLTINI_ADDR_V1_8821C) << BIT_SHIFT_LLTINI_ADDR_V1_8821C)
-#define BIT_GET_LLTINI_ADDR_V1_8821C(x) (((x) >> BIT_SHIFT_LLTINI_ADDR_V1_8821C) & BIT_MASK_LLTINI_ADDR_V1_8821C)

+#define BIT_GET_LLTINI_ADDR_V1_8821C(x) (((x) >> BIT_SHIFT_LLTINI_ADDR_V1_8821C) & BIT_MASK_LLTINI_ADDR_V1_8821C)
+
 
 
 /* 2 REG_BB_ACCESS_CTRL_8821C */
@@ -2672,19 +2917,22 @@
 #define BIT_SHIFT_BB_WRITE_READ_8821C 30
 #define BIT_MASK_BB_WRITE_READ_8821C 0x3
 #define BIT_BB_WRITE_READ_8821C(x) (((x) & BIT_MASK_BB_WRITE_READ_8821C) << BIT_SHIFT_BB_WRITE_READ_8821C)
-#define BIT_GET_BB_WRITE_READ_8821C(x) (((x) >> BIT_SHIFT_BB_WRITE_READ_8821C) & BIT_MASK_BB_WRITE_READ_8821C)

+#define BIT_GET_BB_WRITE_READ_8821C(x) (((x) >> BIT_SHIFT_BB_WRITE_READ_8821C) & BIT_MASK_BB_WRITE_READ_8821C)
+
 
 
 #define BIT_SHIFT_BB_WRITE_EN_8821C 12
 #define BIT_MASK_BB_WRITE_EN_8821C 0xf
 #define BIT_BB_WRITE_EN_8821C(x) (((x) & BIT_MASK_BB_WRITE_EN_8821C) << BIT_SHIFT_BB_WRITE_EN_8821C)
-#define BIT_GET_BB_WRITE_EN_8821C(x) (((x) >> BIT_SHIFT_BB_WRITE_EN_8821C) & BIT_MASK_BB_WRITE_EN_8821C)

+#define BIT_GET_BB_WRITE_EN_8821C(x) (((x) >> BIT_SHIFT_BB_WRITE_EN_8821C) & BIT_MASK_BB_WRITE_EN_8821C)
+
 
 
 #define BIT_SHIFT_BB_ADDR_8821C 2
 #define BIT_MASK_BB_ADDR_8821C 0x1ff
 #define BIT_BB_ADDR_8821C(x) (((x) & BIT_MASK_BB_ADDR_8821C) << BIT_SHIFT_BB_ADDR_8821C)
-#define BIT_GET_BB_ADDR_8821C(x) (((x) >> BIT_SHIFT_BB_ADDR_8821C) & BIT_MASK_BB_ADDR_8821C)

+#define BIT_GET_BB_ADDR_8821C(x) (((x) >> BIT_SHIFT_BB_ADDR_8821C) & BIT_MASK_BB_ADDR_8821C)
+
 
 #define BIT_BB_ERRACC_8821C BIT(0)
 
@@ -2693,7 +2941,8 @@
 #define BIT_SHIFT_BB_DATA_8821C 0
 #define BIT_MASK_BB_DATA_8821C 0xffffffffL
 #define BIT_BB_DATA_8821C(x) (((x) & BIT_MASK_BB_DATA_8821C) << BIT_SHIFT_BB_DATA_8821C)
-#define BIT_GET_BB_DATA_8821C(x) (((x) >> BIT_SHIFT_BB_DATA_8821C) & BIT_MASK_BB_DATA_8821C)

+#define BIT_GET_BB_DATA_8821C(x) (((x) >> BIT_SHIFT_BB_DATA_8821C) & BIT_MASK_BB_DATA_8821C)
+
 
 
 /* 2 REG_HMEBOX_E0_8821C */
@@ -2701,7 +2950,8 @@
 #define BIT_SHIFT_HMEBOX_E0_8821C 0
 #define BIT_MASK_HMEBOX_E0_8821C 0xffffffffL
 #define BIT_HMEBOX_E0_8821C(x) (((x) & BIT_MASK_HMEBOX_E0_8821C) << BIT_SHIFT_HMEBOX_E0_8821C)
-#define BIT_GET_HMEBOX_E0_8821C(x) (((x) >> BIT_SHIFT_HMEBOX_E0_8821C) & BIT_MASK_HMEBOX_E0_8821C)

+#define BIT_GET_HMEBOX_E0_8821C(x) (((x) >> BIT_SHIFT_HMEBOX_E0_8821C) & BIT_MASK_HMEBOX_E0_8821C)
+
 
 
 /* 2 REG_HMEBOX_E1_8821C */
@@ -2709,7 +2959,8 @@
 #define BIT_SHIFT_HMEBOX_E1_8821C 0
 #define BIT_MASK_HMEBOX_E1_8821C 0xffffffffL
 #define BIT_HMEBOX_E1_8821C(x) (((x) & BIT_MASK_HMEBOX_E1_8821C) << BIT_SHIFT_HMEBOX_E1_8821C)
-#define BIT_GET_HMEBOX_E1_8821C(x) (((x) >> BIT_SHIFT_HMEBOX_E1_8821C) & BIT_MASK_HMEBOX_E1_8821C)

+#define BIT_GET_HMEBOX_E1_8821C(x) (((x) >> BIT_SHIFT_HMEBOX_E1_8821C) & BIT_MASK_HMEBOX_E1_8821C)
+
 
 
 /* 2 REG_HMEBOX_E2_8821C */
@@ -2717,7 +2968,8 @@
 #define BIT_SHIFT_HMEBOX_E2_8821C 0
 #define BIT_MASK_HMEBOX_E2_8821C 0xffffffffL
 #define BIT_HMEBOX_E2_8821C(x) (((x) & BIT_MASK_HMEBOX_E2_8821C) << BIT_SHIFT_HMEBOX_E2_8821C)
-#define BIT_GET_HMEBOX_E2_8821C(x) (((x) >> BIT_SHIFT_HMEBOX_E2_8821C) & BIT_MASK_HMEBOX_E2_8821C)

+#define BIT_GET_HMEBOX_E2_8821C(x) (((x) >> BIT_SHIFT_HMEBOX_E2_8821C) & BIT_MASK_HMEBOX_E2_8821C)
+
 
 
 /* 2 REG_HMEBOX_E3_8821C */
@@ -2725,7 +2977,8 @@
 #define BIT_SHIFT_HMEBOX_E3_8821C 0
 #define BIT_MASK_HMEBOX_E3_8821C 0xffffffffL
 #define BIT_HMEBOX_E3_8821C(x) (((x) & BIT_MASK_HMEBOX_E3_8821C) << BIT_SHIFT_HMEBOX_E3_8821C)
-#define BIT_GET_HMEBOX_E3_8821C(x) (((x) >> BIT_SHIFT_HMEBOX_E3_8821C) & BIT_MASK_HMEBOX_E3_8821C)

+#define BIT_GET_HMEBOX_E3_8821C(x) (((x) >> BIT_SHIFT_HMEBOX_E3_8821C) & BIT_MASK_HMEBOX_E3_8821C)
+
 
 
 /* 2 REG_CR_EXT_8821C */
@@ -2733,7 +2986,8 @@
 #define BIT_SHIFT_PHY_REQ_DELAY_8821C 24
 #define BIT_MASK_PHY_REQ_DELAY_8821C 0xf
 #define BIT_PHY_REQ_DELAY_8821C(x) (((x) & BIT_MASK_PHY_REQ_DELAY_8821C) << BIT_SHIFT_PHY_REQ_DELAY_8821C)
-#define BIT_GET_PHY_REQ_DELAY_8821C(x) (((x) >> BIT_SHIFT_PHY_REQ_DELAY_8821C) & BIT_MASK_PHY_REQ_DELAY_8821C)

+#define BIT_GET_PHY_REQ_DELAY_8821C(x) (((x) >> BIT_SHIFT_PHY_REQ_DELAY_8821C) & BIT_MASK_PHY_REQ_DELAY_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -2744,19 +2998,22 @@
 #define BIT_SHIFT_NETYPE4_8821C 4
 #define BIT_MASK_NETYPE4_8821C 0x3
 #define BIT_NETYPE4_8821C(x) (((x) & BIT_MASK_NETYPE4_8821C) << BIT_SHIFT_NETYPE4_8821C)
-#define BIT_GET_NETYPE4_8821C(x) (((x) >> BIT_SHIFT_NETYPE4_8821C) & BIT_MASK_NETYPE4_8821C)

+#define BIT_GET_NETYPE4_8821C(x) (((x) >> BIT_SHIFT_NETYPE4_8821C) & BIT_MASK_NETYPE4_8821C)
+
 
 
 #define BIT_SHIFT_NETYPE3_8821C 2
 #define BIT_MASK_NETYPE3_8821C 0x3
 #define BIT_NETYPE3_8821C(x) (((x) & BIT_MASK_NETYPE3_8821C) << BIT_SHIFT_NETYPE3_8821C)
-#define BIT_GET_NETYPE3_8821C(x) (((x) >> BIT_SHIFT_NETYPE3_8821C) & BIT_MASK_NETYPE3_8821C)

+#define BIT_GET_NETYPE3_8821C(x) (((x) >> BIT_SHIFT_NETYPE3_8821C) & BIT_MASK_NETYPE3_8821C)
+
 
 
 #define BIT_SHIFT_NETYPE2_8821C 0
 #define BIT_MASK_NETYPE2_8821C 0x3
 #define BIT_NETYPE2_8821C(x) (((x) & BIT_MASK_NETYPE2_8821C) << BIT_SHIFT_NETYPE2_8821C)
-#define BIT_GET_NETYPE2_8821C(x) (((x) >> BIT_SHIFT_NETYPE2_8821C) & BIT_MASK_NETYPE2_8821C)

+#define BIT_GET_NETYPE2_8821C(x) (((x) >> BIT_SHIFT_NETYPE2_8821C) & BIT_MASK_NETYPE2_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -2772,19 +3029,22 @@
 #define BIT_SHIFT_PKTNUM_TH_V1_8821C 24
 #define BIT_MASK_PKTNUM_TH_V1_8821C 0xff
 #define BIT_PKTNUM_TH_V1_8821C(x) (((x) & BIT_MASK_PKTNUM_TH_V1_8821C) << BIT_SHIFT_PKTNUM_TH_V1_8821C)
-#define BIT_GET_PKTNUM_TH_V1_8821C(x) (((x) >> BIT_SHIFT_PKTNUM_TH_V1_8821C) & BIT_MASK_PKTNUM_TH_V1_8821C)

+#define BIT_GET_PKTNUM_TH_V1_8821C(x) (((x) >> BIT_SHIFT_PKTNUM_TH_V1_8821C) & BIT_MASK_PKTNUM_TH_V1_8821C)
+
 
 
 #define BIT_SHIFT_TIMER_TH_8821C 16
 #define BIT_MASK_TIMER_TH_8821C 0xff
 #define BIT_TIMER_TH_8821C(x) (((x) & BIT_MASK_TIMER_TH_8821C) << BIT_SHIFT_TIMER_TH_8821C)
-#define BIT_GET_TIMER_TH_8821C(x) (((x) >> BIT_SHIFT_TIMER_TH_8821C) & BIT_MASK_TIMER_TH_8821C)

+#define BIT_GET_TIMER_TH_8821C(x) (((x) >> BIT_SHIFT_TIMER_TH_8821C) & BIT_MASK_TIMER_TH_8821C)
+
 
 
 #define BIT_SHIFT_RXPKT1ENADDR_8821C 0
 #define BIT_MASK_RXPKT1ENADDR_8821C 0xffff
 #define BIT_RXPKT1ENADDR_8821C(x) (((x) & BIT_MASK_RXPKT1ENADDR_8821C) << BIT_SHIFT_RXPKT1ENADDR_8821C)
-#define BIT_GET_RXPKT1ENADDR_8821C(x) (((x) >> BIT_SHIFT_RXPKT1ENADDR_8821C) & BIT_MASK_RXPKT1ENADDR_8821C)

+#define BIT_GET_RXPKT1ENADDR_8821C(x) (((x) >> BIT_SHIFT_RXPKT1ENADDR_8821C) & BIT_MASK_RXPKT1ENADDR_8821C)
+
 
 
 /* 2 REG_RXFF_PTR_V1_8821C */
@@ -2794,7 +3054,8 @@
 #define BIT_SHIFT_RXFF0_RDPTR_V2_8821C 0
 #define BIT_MASK_RXFF0_RDPTR_V2_8821C 0x3ffff
 #define BIT_RXFF0_RDPTR_V2_8821C(x) (((x) & BIT_MASK_RXFF0_RDPTR_V2_8821C) << BIT_SHIFT_RXFF0_RDPTR_V2_8821C)
-#define BIT_GET_RXFF0_RDPTR_V2_8821C(x) (((x) >> BIT_SHIFT_RXFF0_RDPTR_V2_8821C) & BIT_MASK_RXFF0_RDPTR_V2_8821C)

+#define BIT_GET_RXFF0_RDPTR_V2_8821C(x) (((x) >> BIT_SHIFT_RXFF0_RDPTR_V2_8821C) & BIT_MASK_RXFF0_RDPTR_V2_8821C)
+
 
 
 /* 2 REG_RXFF_WTR_V1_8821C */
@@ -2804,7 +3065,8 @@
 #define BIT_SHIFT_RXFF0_WTPTR_V2_8821C 0
 #define BIT_MASK_RXFF0_WTPTR_V2_8821C 0x3ffff
 #define BIT_RXFF0_WTPTR_V2_8821C(x) (((x) & BIT_MASK_RXFF0_WTPTR_V2_8821C) << BIT_SHIFT_RXFF0_WTPTR_V2_8821C)
-#define BIT_GET_RXFF0_WTPTR_V2_8821C(x) (((x) >> BIT_SHIFT_RXFF0_WTPTR_V2_8821C) & BIT_MASK_RXFF0_WTPTR_V2_8821C)

+#define BIT_GET_RXFF0_WTPTR_V2_8821C(x) (((x) >> BIT_SHIFT_RXFF0_WTPTR_V2_8821C) & BIT_MASK_RXFF0_WTPTR_V2_8821C)
+
 
 
 /* 2 REG_FE2IMR_8821C */
@@ -3040,7 +3302,8 @@
 #define BIT_SHIFT_MID_31TO0_8821C 0
 #define BIT_MASK_MID_31TO0_8821C 0xffffffffL
 #define BIT_MID_31TO0_8821C(x) (((x) & BIT_MASK_MID_31TO0_8821C) << BIT_SHIFT_MID_31TO0_8821C)
-#define BIT_GET_MID_31TO0_8821C(x) (((x) >> BIT_SHIFT_MID_31TO0_8821C) & BIT_MASK_MID_31TO0_8821C)

+#define BIT_GET_MID_31TO0_8821C(x) (((x) >> BIT_SHIFT_MID_31TO0_8821C) & BIT_MASK_MID_31TO0_8821C)
+
 
 
 /* 2 REG_SPWR1_8821C */
@@ -3048,7 +3311,8 @@
 #define BIT_SHIFT_MID_63TO32_8821C 0
 #define BIT_MASK_MID_63TO32_8821C 0xffffffffL
 #define BIT_MID_63TO32_8821C(x) (((x) & BIT_MASK_MID_63TO32_8821C) << BIT_SHIFT_MID_63TO32_8821C)
-#define BIT_GET_MID_63TO32_8821C(x) (((x) >> BIT_SHIFT_MID_63TO32_8821C) & BIT_MASK_MID_63TO32_8821C)

+#define BIT_GET_MID_63TO32_8821C(x) (((x) >> BIT_SHIFT_MID_63TO32_8821C) & BIT_MASK_MID_63TO32_8821C)
+
 
 
 /* 2 REG_SPWR2_8821C */
@@ -3056,7 +3320,8 @@
 #define BIT_SHIFT_MID_95O64_8821C 0
 #define BIT_MASK_MID_95O64_8821C 0xffffffffL
 #define BIT_MID_95O64_8821C(x) (((x) & BIT_MASK_MID_95O64_8821C) << BIT_SHIFT_MID_95O64_8821C)
-#define BIT_GET_MID_95O64_8821C(x) (((x) >> BIT_SHIFT_MID_95O64_8821C) & BIT_MASK_MID_95O64_8821C)

+#define BIT_GET_MID_95O64_8821C(x) (((x) >> BIT_SHIFT_MID_95O64_8821C) & BIT_MASK_MID_95O64_8821C)
+
 
 
 /* 2 REG_SPWR3_8821C */
@@ -3064,7 +3329,8 @@
 #define BIT_SHIFT_MID_127TO96_8821C 0
 #define BIT_MASK_MID_127TO96_8821C 0xffffffffL
 #define BIT_MID_127TO96_8821C(x) (((x) & BIT_MASK_MID_127TO96_8821C) << BIT_SHIFT_MID_127TO96_8821C)
-#define BIT_GET_MID_127TO96_8821C(x) (((x) >> BIT_SHIFT_MID_127TO96_8821C) & BIT_MASK_MID_127TO96_8821C)

+#define BIT_GET_MID_127TO96_8821C(x) (((x) >> BIT_SHIFT_MID_127TO96_8821C) & BIT_MASK_MID_127TO96_8821C)
+
 
 
 /* 2 REG_POWSEQ_8821C */
@@ -3072,13 +3338,15 @@
 #define BIT_SHIFT_SEQNUM_MID_8821C 16
 #define BIT_MASK_SEQNUM_MID_8821C 0xffff
 #define BIT_SEQNUM_MID_8821C(x) (((x) & BIT_MASK_SEQNUM_MID_8821C) << BIT_SHIFT_SEQNUM_MID_8821C)
-#define BIT_GET_SEQNUM_MID_8821C(x) (((x) >> BIT_SHIFT_SEQNUM_MID_8821C) & BIT_MASK_SEQNUM_MID_8821C)

+#define BIT_GET_SEQNUM_MID_8821C(x) (((x) >> BIT_SHIFT_SEQNUM_MID_8821C) & BIT_MASK_SEQNUM_MID_8821C)
+
 
 
 #define BIT_SHIFT_REF_MID_8821C 0
 #define BIT_MASK_REF_MID_8821C 0x7f
 #define BIT_REF_MID_8821C(x) (((x) & BIT_MASK_REF_MID_8821C) << BIT_SHIFT_REF_MID_8821C)
-#define BIT_GET_REF_MID_8821C(x) (((x) >> BIT_SHIFT_REF_MID_8821C) & BIT_MASK_REF_MID_8821C)

+#define BIT_GET_REF_MID_8821C(x) (((x) >> BIT_SHIFT_REF_MID_8821C) & BIT_MASK_REF_MID_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -3091,7 +3359,8 @@
 #define BIT_SHIFT_TC7DATA_8821C 0
 #define BIT_MASK_TC7DATA_8821C 0xffffff
 #define BIT_TC7DATA_8821C(x) (((x) & BIT_MASK_TC7DATA_8821C) << BIT_SHIFT_TC7DATA_8821C)
-#define BIT_GET_TC7DATA_8821C(x) (((x) >> BIT_SHIFT_TC7DATA_8821C) & BIT_MASK_TC7DATA_8821C)

+#define BIT_GET_TC7DATA_8821C(x) (((x) >> BIT_SHIFT_TC7DATA_8821C) & BIT_MASK_TC7DATA_8821C)
+
 
 
 /* 2 REG_TC8_CTRL_V1_8821C */
@@ -3102,7 +3371,8 @@
 #define BIT_SHIFT_TC8DATA_8821C 0
 #define BIT_MASK_TC8DATA_8821C 0xffffff
 #define BIT_TC8DATA_8821C(x) (((x) & BIT_MASK_TC8DATA_8821C) << BIT_SHIFT_TC8DATA_8821C)
-#define BIT_GET_TC8DATA_8821C(x) (((x) >> BIT_SHIFT_TC8DATA_8821C) & BIT_MASK_TC8DATA_8821C)

+#define BIT_GET_TC8DATA_8821C(x) (((x) >> BIT_SHIFT_TC8DATA_8821C) & BIT_MASK_TC8DATA_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -3234,7 +3504,8 @@
 #define BIT_SHIFT_FW_MSG2_8821C 0
 #define BIT_MASK_FW_MSG2_8821C 0xffffffffL
 #define BIT_FW_MSG2_8821C(x) (((x) & BIT_MASK_FW_MSG2_8821C) << BIT_SHIFT_FW_MSG2_8821C)
-#define BIT_GET_FW_MSG2_8821C(x) (((x) >> BIT_SHIFT_FW_MSG2_8821C) & BIT_MASK_FW_MSG2_8821C)

+#define BIT_GET_FW_MSG2_8821C(x) (((x) >> BIT_SHIFT_FW_MSG2_8821C) & BIT_MASK_FW_MSG2_8821C)
+
 
 
 /* 2 REG_MSG3_8821C */
@@ -3242,7 +3513,8 @@
 #define BIT_SHIFT_FW_MSG3_8821C 0
 #define BIT_MASK_FW_MSG3_8821C 0xffffffffL
 #define BIT_FW_MSG3_8821C(x) (((x) & BIT_MASK_FW_MSG3_8821C) << BIT_SHIFT_FW_MSG3_8821C)
-#define BIT_GET_FW_MSG3_8821C(x) (((x) >> BIT_SHIFT_FW_MSG3_8821C) & BIT_MASK_FW_MSG3_8821C)

+#define BIT_GET_FW_MSG3_8821C(x) (((x) >> BIT_SHIFT_FW_MSG3_8821C) & BIT_MASK_FW_MSG3_8821C)
+
 
 
 /* 2 REG_MSG4_8821C */
@@ -3250,7 +3522,8 @@
 #define BIT_SHIFT_FW_MSG4_8821C 0
 #define BIT_MASK_FW_MSG4_8821C 0xffffffffL
 #define BIT_FW_MSG4_8821C(x) (((x) & BIT_MASK_FW_MSG4_8821C) << BIT_SHIFT_FW_MSG4_8821C)
-#define BIT_GET_FW_MSG4_8821C(x) (((x) >> BIT_SHIFT_FW_MSG4_8821C) & BIT_MASK_FW_MSG4_8821C)

+#define BIT_GET_FW_MSG4_8821C(x) (((x) >> BIT_SHIFT_FW_MSG4_8821C) & BIT_MASK_FW_MSG4_8821C)
+
 
 
 /* 2 REG_MSG5_8821C */
@@ -3258,7 +3531,8 @@
 #define BIT_SHIFT_FW_MSG5_8821C 0
 #define BIT_MASK_FW_MSG5_8821C 0xffffffffL
 #define BIT_FW_MSG5_8821C(x) (((x) & BIT_MASK_FW_MSG5_8821C) << BIT_SHIFT_FW_MSG5_8821C)
-#define BIT_GET_FW_MSG5_8821C(x) (((x) >> BIT_SHIFT_FW_MSG5_8821C) & BIT_MASK_FW_MSG5_8821C)

+#define BIT_GET_FW_MSG5_8821C(x) (((x) >> BIT_SHIFT_FW_MSG5_8821C) & BIT_MASK_FW_MSG5_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -3270,7 +3544,8 @@
 #define BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8821C 16
 #define BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8821C 0xff
 #define BIT_TX_OQT_HE_FREE_SPACE_V1_8821C(x) (((x) & BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8821C) << BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8821C)
-#define BIT_GET_TX_OQT_HE_FREE_SPACE_V1_8821C(x) (((x) >> BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8821C) & BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8821C)

+#define BIT_GET_TX_OQT_HE_FREE_SPACE_V1_8821C(x) (((x) >> BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8821C) & BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -3278,7 +3553,8 @@
 #define BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8821C 0
 #define BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8821C 0xff
 #define BIT_TX_OQT_NL_FREE_SPACE_V1_8821C(x) (((x) & BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8821C) << BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8821C)
-#define BIT_GET_TX_OQT_NL_FREE_SPACE_V1_8821C(x) (((x) >> BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8821C) & BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8821C)

+#define BIT_GET_TX_OQT_NL_FREE_SPACE_V1_8821C(x) (((x) >> BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8821C) & BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8821C)
+
 
 
 /* 2 REG_FIFOPAGE_CTRL_2_8821C */
@@ -3289,7 +3565,8 @@
 #define BIT_SHIFT_BCN_HEAD_1_V1_8821C 16
 #define BIT_MASK_BCN_HEAD_1_V1_8821C 0xfff
 #define BIT_BCN_HEAD_1_V1_8821C(x) (((x) & BIT_MASK_BCN_HEAD_1_V1_8821C) << BIT_SHIFT_BCN_HEAD_1_V1_8821C)
-#define BIT_GET_BCN_HEAD_1_V1_8821C(x) (((x) >> BIT_SHIFT_BCN_HEAD_1_V1_8821C) & BIT_MASK_BCN_HEAD_1_V1_8821C)

+#define BIT_GET_BCN_HEAD_1_V1_8821C(x) (((x) >> BIT_SHIFT_BCN_HEAD_1_V1_8821C) & BIT_MASK_BCN_HEAD_1_V1_8821C)
+
 
 #define BIT_BCN_VALID_V1_8821C BIT(15)
 
@@ -3298,7 +3575,8 @@
 #define BIT_SHIFT_BCN_HEAD_V1_8821C 0
 #define BIT_MASK_BCN_HEAD_V1_8821C 0xfff
 #define BIT_BCN_HEAD_V1_8821C(x) (((x) & BIT_MASK_BCN_HEAD_V1_8821C) << BIT_SHIFT_BCN_HEAD_V1_8821C)
-#define BIT_GET_BCN_HEAD_V1_8821C(x) (((x) >> BIT_SHIFT_BCN_HEAD_V1_8821C) & BIT_MASK_BCN_HEAD_V1_8821C)

+#define BIT_GET_BCN_HEAD_V1_8821C(x) (((x) >> BIT_SHIFT_BCN_HEAD_V1_8821C) & BIT_MASK_BCN_HEAD_V1_8821C)
+
 
 
 /* 2 REG_AUTO_LLT_V1_8821C */
@@ -3306,19 +3584,22 @@
 #define BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C 24
 #define BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C 0xff
 #define BIT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C(x) (((x) & BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C) << BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C)
-#define BIT_GET_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C(x) (((x) >> BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C) & BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C)

+#define BIT_GET_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C(x) (((x) >> BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C) & BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C)
+
 
 
 #define BIT_SHIFT_LLT_FREE_PAGE_V1_8821C 8
 #define BIT_MASK_LLT_FREE_PAGE_V1_8821C 0xffff
 #define BIT_LLT_FREE_PAGE_V1_8821C(x) (((x) & BIT_MASK_LLT_FREE_PAGE_V1_8821C) << BIT_SHIFT_LLT_FREE_PAGE_V1_8821C)
-#define BIT_GET_LLT_FREE_PAGE_V1_8821C(x) (((x) >> BIT_SHIFT_LLT_FREE_PAGE_V1_8821C) & BIT_MASK_LLT_FREE_PAGE_V1_8821C)

+#define BIT_GET_LLT_FREE_PAGE_V1_8821C(x) (((x) >> BIT_SHIFT_LLT_FREE_PAGE_V1_8821C) & BIT_MASK_LLT_FREE_PAGE_V1_8821C)
+
 
 
 #define BIT_SHIFT_BLK_DESC_NUM_8821C 4
 #define BIT_MASK_BLK_DESC_NUM_8821C 0xf
 #define BIT_BLK_DESC_NUM_8821C(x) (((x) & BIT_MASK_BLK_DESC_NUM_8821C) << BIT_SHIFT_BLK_DESC_NUM_8821C)
-#define BIT_GET_BLK_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_BLK_DESC_NUM_8821C) & BIT_MASK_BLK_DESC_NUM_8821C)

+#define BIT_GET_BLK_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_BLK_DESC_NUM_8821C) & BIT_MASK_BLK_DESC_NUM_8821C)
+
 
 #define BIT_R_BCN_HEAD_SEL_8821C BIT(3)
 #define BIT_R_EN_BCN_SW_HEAD_SEL_8821C BIT(2)
@@ -3334,7 +3615,8 @@
 #define BIT_SHIFT_PG_UNDER_TH_V1_8821C 16
 #define BIT_MASK_PG_UNDER_TH_V1_8821C 0xfff
 #define BIT_PG_UNDER_TH_V1_8821C(x) (((x) & BIT_MASK_PG_UNDER_TH_V1_8821C) << BIT_SHIFT_PG_UNDER_TH_V1_8821C)
-#define BIT_GET_PG_UNDER_TH_V1_8821C(x) (((x) >> BIT_SHIFT_PG_UNDER_TH_V1_8821C) & BIT_MASK_PG_UNDER_TH_V1_8821C)

+#define BIT_GET_PG_UNDER_TH_V1_8821C(x) (((x) >> BIT_SHIFT_PG_UNDER_TH_V1_8821C) & BIT_MASK_PG_UNDER_TH_V1_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -3348,7 +3630,8 @@
 #define BIT_SHIFT_CHECK_OFFSET_8821C 0
 #define BIT_MASK_CHECK_OFFSET_8821C 0xff
 #define BIT_CHECK_OFFSET_8821C(x) (((x) & BIT_MASK_CHECK_OFFSET_8821C) << BIT_SHIFT_CHECK_OFFSET_8821C)
-#define BIT_GET_CHECK_OFFSET_8821C(x) (((x) >> BIT_SHIFT_CHECK_OFFSET_8821C) & BIT_MASK_CHECK_OFFSET_8821C)

+#define BIT_GET_CHECK_OFFSET_8821C(x) (((x) >> BIT_SHIFT_CHECK_OFFSET_8821C) & BIT_MASK_CHECK_OFFSET_8821C)
+
 
 
 /* 2 REG_TXDMA_STATUS_8821C */
@@ -3379,13 +3662,15 @@
 #define BIT_SHIFT_HPQ_HIGH_TH_V1_8821C 16
 #define BIT_MASK_HPQ_HIGH_TH_V1_8821C 0xfff
 #define BIT_HPQ_HIGH_TH_V1_8821C(x) (((x) & BIT_MASK_HPQ_HIGH_TH_V1_8821C) << BIT_SHIFT_HPQ_HIGH_TH_V1_8821C)
-#define BIT_GET_HPQ_HIGH_TH_V1_8821C(x) (((x) >> BIT_SHIFT_HPQ_HIGH_TH_V1_8821C) & BIT_MASK_HPQ_HIGH_TH_V1_8821C)

+#define BIT_GET_HPQ_HIGH_TH_V1_8821C(x) (((x) >> BIT_SHIFT_HPQ_HIGH_TH_V1_8821C) & BIT_MASK_HPQ_HIGH_TH_V1_8821C)
+
 
 
 #define BIT_SHIFT_HPQ_LOW_TH_V1_8821C 0
 #define BIT_MASK_HPQ_LOW_TH_V1_8821C 0xfff
 #define BIT_HPQ_LOW_TH_V1_8821C(x) (((x) & BIT_MASK_HPQ_LOW_TH_V1_8821C) << BIT_SHIFT_HPQ_LOW_TH_V1_8821C)
-#define BIT_GET_HPQ_LOW_TH_V1_8821C(x) (((x) >> BIT_SHIFT_HPQ_LOW_TH_V1_8821C) & BIT_MASK_HPQ_LOW_TH_V1_8821C)

+#define BIT_GET_HPQ_LOW_TH_V1_8821C(x) (((x) >> BIT_SHIFT_HPQ_LOW_TH_V1_8821C) & BIT_MASK_HPQ_LOW_TH_V1_8821C)
+
 
 
 /* 2 REG_TQPNT2_8821C */
@@ -3393,13 +3678,15 @@
 #define BIT_SHIFT_NPQ_HIGH_TH_V1_8821C 16
 #define BIT_MASK_NPQ_HIGH_TH_V1_8821C 0xfff
 #define BIT_NPQ_HIGH_TH_V1_8821C(x) (((x) & BIT_MASK_NPQ_HIGH_TH_V1_8821C) << BIT_SHIFT_NPQ_HIGH_TH_V1_8821C)
-#define BIT_GET_NPQ_HIGH_TH_V1_8821C(x) (((x) >> BIT_SHIFT_NPQ_HIGH_TH_V1_8821C) & BIT_MASK_NPQ_HIGH_TH_V1_8821C)

+#define BIT_GET_NPQ_HIGH_TH_V1_8821C(x) (((x) >> BIT_SHIFT_NPQ_HIGH_TH_V1_8821C) & BIT_MASK_NPQ_HIGH_TH_V1_8821C)
+
 
 
 #define BIT_SHIFT_NPQ_LOW_TH_V1_8821C 0
 #define BIT_MASK_NPQ_LOW_TH_V1_8821C 0xfff
 #define BIT_NPQ_LOW_TH_V1_8821C(x) (((x) & BIT_MASK_NPQ_LOW_TH_V1_8821C) << BIT_SHIFT_NPQ_LOW_TH_V1_8821C)
-#define BIT_GET_NPQ_LOW_TH_V1_8821C(x) (((x) >> BIT_SHIFT_NPQ_LOW_TH_V1_8821C) & BIT_MASK_NPQ_LOW_TH_V1_8821C)

+#define BIT_GET_NPQ_LOW_TH_V1_8821C(x) (((x) >> BIT_SHIFT_NPQ_LOW_TH_V1_8821C) & BIT_MASK_NPQ_LOW_TH_V1_8821C)
+
 
 
 /* 2 REG_TQPNT3_8821C */
@@ -3407,13 +3694,15 @@
 #define BIT_SHIFT_LPQ_HIGH_TH_V1_8821C 16
 #define BIT_MASK_LPQ_HIGH_TH_V1_8821C 0xfff
 #define BIT_LPQ_HIGH_TH_V1_8821C(x) (((x) & BIT_MASK_LPQ_HIGH_TH_V1_8821C) << BIT_SHIFT_LPQ_HIGH_TH_V1_8821C)
-#define BIT_GET_LPQ_HIGH_TH_V1_8821C(x) (((x) >> BIT_SHIFT_LPQ_HIGH_TH_V1_8821C) & BIT_MASK_LPQ_HIGH_TH_V1_8821C)

+#define BIT_GET_LPQ_HIGH_TH_V1_8821C(x) (((x) >> BIT_SHIFT_LPQ_HIGH_TH_V1_8821C) & BIT_MASK_LPQ_HIGH_TH_V1_8821C)
+
 
 
 #define BIT_SHIFT_LPQ_LOW_TH_V1_8821C 0
 #define BIT_MASK_LPQ_LOW_TH_V1_8821C 0xfff
 #define BIT_LPQ_LOW_TH_V1_8821C(x) (((x) & BIT_MASK_LPQ_LOW_TH_V1_8821C) << BIT_SHIFT_LPQ_LOW_TH_V1_8821C)
-#define BIT_GET_LPQ_LOW_TH_V1_8821C(x) (((x) >> BIT_SHIFT_LPQ_LOW_TH_V1_8821C) & BIT_MASK_LPQ_LOW_TH_V1_8821C)

+#define BIT_GET_LPQ_LOW_TH_V1_8821C(x) (((x) >> BIT_SHIFT_LPQ_LOW_TH_V1_8821C) & BIT_MASK_LPQ_LOW_TH_V1_8821C)
+
 
 
 /* 2 REG_TQPNT4_8821C */
@@ -3421,13 +3710,15 @@
 #define BIT_SHIFT_EXQ_HIGH_TH_V1_8821C 16
 #define BIT_MASK_EXQ_HIGH_TH_V1_8821C 0xfff
 #define BIT_EXQ_HIGH_TH_V1_8821C(x) (((x) & BIT_MASK_EXQ_HIGH_TH_V1_8821C) << BIT_SHIFT_EXQ_HIGH_TH_V1_8821C)
-#define BIT_GET_EXQ_HIGH_TH_V1_8821C(x) (((x) >> BIT_SHIFT_EXQ_HIGH_TH_V1_8821C) & BIT_MASK_EXQ_HIGH_TH_V1_8821C)

+#define BIT_GET_EXQ_HIGH_TH_V1_8821C(x) (((x) >> BIT_SHIFT_EXQ_HIGH_TH_V1_8821C) & BIT_MASK_EXQ_HIGH_TH_V1_8821C)
+
 
 
 #define BIT_SHIFT_EXQ_LOW_TH_V1_8821C 0
 #define BIT_MASK_EXQ_LOW_TH_V1_8821C 0xfff
 #define BIT_EXQ_LOW_TH_V1_8821C(x) (((x) & BIT_MASK_EXQ_LOW_TH_V1_8821C) << BIT_SHIFT_EXQ_LOW_TH_V1_8821C)
-#define BIT_GET_EXQ_LOW_TH_V1_8821C(x) (((x) >> BIT_SHIFT_EXQ_LOW_TH_V1_8821C) & BIT_MASK_EXQ_LOW_TH_V1_8821C)

+#define BIT_GET_EXQ_LOW_TH_V1_8821C(x) (((x) >> BIT_SHIFT_EXQ_LOW_TH_V1_8821C) & BIT_MASK_EXQ_LOW_TH_V1_8821C)
+
 
 
 /* 2 REG_RQPN_CTRL_1_8821C */
@@ -3435,13 +3726,15 @@
 #define BIT_SHIFT_TXPKTNUM_H_8821C 16
 #define BIT_MASK_TXPKTNUM_H_8821C 0xffff
 #define BIT_TXPKTNUM_H_8821C(x) (((x) & BIT_MASK_TXPKTNUM_H_8821C) << BIT_SHIFT_TXPKTNUM_H_8821C)
-#define BIT_GET_TXPKTNUM_H_8821C(x) (((x) >> BIT_SHIFT_TXPKTNUM_H_8821C) & BIT_MASK_TXPKTNUM_H_8821C)

+#define BIT_GET_TXPKTNUM_H_8821C(x) (((x) >> BIT_SHIFT_TXPKTNUM_H_8821C) & BIT_MASK_TXPKTNUM_H_8821C)
+
 
 
 #define BIT_SHIFT_TXPKTNUM_V2_8821C 0
 #define BIT_MASK_TXPKTNUM_V2_8821C 0xffff
 #define BIT_TXPKTNUM_V2_8821C(x) (((x) & BIT_MASK_TXPKTNUM_V2_8821C) << BIT_SHIFT_TXPKTNUM_V2_8821C)
-#define BIT_GET_TXPKTNUM_V2_8821C(x) (((x) >> BIT_SHIFT_TXPKTNUM_V2_8821C) & BIT_MASK_TXPKTNUM_V2_8821C)

+#define BIT_GET_TXPKTNUM_V2_8821C(x) (((x) >> BIT_SHIFT_TXPKTNUM_V2_8821C) & BIT_MASK_TXPKTNUM_V2_8821C)
+
 
 
 /* 2 REG_RQPN_CTRL_2_8821C */
@@ -3455,7 +3748,8 @@
 #define BIT_SHIFT_SDIO_TXAGG_ALIGN_SIZE_8821C 0
 #define BIT_MASK_SDIO_TXAGG_ALIGN_SIZE_8821C 0xfff
 #define BIT_SDIO_TXAGG_ALIGN_SIZE_8821C(x) (((x) & BIT_MASK_SDIO_TXAGG_ALIGN_SIZE_8821C) << BIT_SHIFT_SDIO_TXAGG_ALIGN_SIZE_8821C)
-#define BIT_GET_SDIO_TXAGG_ALIGN_SIZE_8821C(x) (((x) >> BIT_SHIFT_SDIO_TXAGG_ALIGN_SIZE_8821C) & BIT_MASK_SDIO_TXAGG_ALIGN_SIZE_8821C)

+#define BIT_GET_SDIO_TXAGG_ALIGN_SIZE_8821C(x) (((x) >> BIT_SHIFT_SDIO_TXAGG_ALIGN_SIZE_8821C) & BIT_MASK_SDIO_TXAGG_ALIGN_SIZE_8821C)
+
 
 
 /* 2 REG_FIFOPAGE_INFO_1_8821C */
@@ -3463,13 +3757,15 @@
 #define BIT_SHIFT_HPQ_AVAL_PG_V1_8821C 16
 #define BIT_MASK_HPQ_AVAL_PG_V1_8821C 0xfff
 #define BIT_HPQ_AVAL_PG_V1_8821C(x) (((x) & BIT_MASK_HPQ_AVAL_PG_V1_8821C) << BIT_SHIFT_HPQ_AVAL_PG_V1_8821C)
-#define BIT_GET_HPQ_AVAL_PG_V1_8821C(x) (((x) >> BIT_SHIFT_HPQ_AVAL_PG_V1_8821C) & BIT_MASK_HPQ_AVAL_PG_V1_8821C)

+#define BIT_GET_HPQ_AVAL_PG_V1_8821C(x) (((x) >> BIT_SHIFT_HPQ_AVAL_PG_V1_8821C) & BIT_MASK_HPQ_AVAL_PG_V1_8821C)
+
 
 
 #define BIT_SHIFT_HPQ_V1_8821C 0
 #define BIT_MASK_HPQ_V1_8821C 0xfff
 #define BIT_HPQ_V1_8821C(x) (((x) & BIT_MASK_HPQ_V1_8821C) << BIT_SHIFT_HPQ_V1_8821C)
-#define BIT_GET_HPQ_V1_8821C(x) (((x) >> BIT_SHIFT_HPQ_V1_8821C) & BIT_MASK_HPQ_V1_8821C)

+#define BIT_GET_HPQ_V1_8821C(x) (((x) >> BIT_SHIFT_HPQ_V1_8821C) & BIT_MASK_HPQ_V1_8821C)
+
 
 
 /* 2 REG_FIFOPAGE_INFO_2_8821C */
@@ -3477,13 +3773,15 @@
 #define BIT_SHIFT_LPQ_AVAL_PG_V1_8821C 16
 #define BIT_MASK_LPQ_AVAL_PG_V1_8821C 0xfff
 #define BIT_LPQ_AVAL_PG_V1_8821C(x) (((x) & BIT_MASK_LPQ_AVAL_PG_V1_8821C) << BIT_SHIFT_LPQ_AVAL_PG_V1_8821C)
-#define BIT_GET_LPQ_AVAL_PG_V1_8821C(x) (((x) >> BIT_SHIFT_LPQ_AVAL_PG_V1_8821C) & BIT_MASK_LPQ_AVAL_PG_V1_8821C)

+#define BIT_GET_LPQ_AVAL_PG_V1_8821C(x) (((x) >> BIT_SHIFT_LPQ_AVAL_PG_V1_8821C) & BIT_MASK_LPQ_AVAL_PG_V1_8821C)
+
 
 
 #define BIT_SHIFT_LPQ_V1_8821C 0
 #define BIT_MASK_LPQ_V1_8821C 0xfff
 #define BIT_LPQ_V1_8821C(x) (((x) & BIT_MASK_LPQ_V1_8821C) << BIT_SHIFT_LPQ_V1_8821C)
-#define BIT_GET_LPQ_V1_8821C(x) (((x) >> BIT_SHIFT_LPQ_V1_8821C) & BIT_MASK_LPQ_V1_8821C)

+#define BIT_GET_LPQ_V1_8821C(x) (((x) >> BIT_SHIFT_LPQ_V1_8821C) & BIT_MASK_LPQ_V1_8821C)
+
 
 
 /* 2 REG_FIFOPAGE_INFO_3_8821C */
@@ -3491,13 +3789,15 @@
 #define BIT_SHIFT_NPQ_AVAL_PG_V1_8821C 16
 #define BIT_MASK_NPQ_AVAL_PG_V1_8821C 0xfff
 #define BIT_NPQ_AVAL_PG_V1_8821C(x) (((x) & BIT_MASK_NPQ_AVAL_PG_V1_8821C) << BIT_SHIFT_NPQ_AVAL_PG_V1_8821C)
-#define BIT_GET_NPQ_AVAL_PG_V1_8821C(x) (((x) >> BIT_SHIFT_NPQ_AVAL_PG_V1_8821C) & BIT_MASK_NPQ_AVAL_PG_V1_8821C)

+#define BIT_GET_NPQ_AVAL_PG_V1_8821C(x) (((x) >> BIT_SHIFT_NPQ_AVAL_PG_V1_8821C) & BIT_MASK_NPQ_AVAL_PG_V1_8821C)
+
 
 
 #define BIT_SHIFT_NPQ_V1_8821C 0
 #define BIT_MASK_NPQ_V1_8821C 0xfff
 #define BIT_NPQ_V1_8821C(x) (((x) & BIT_MASK_NPQ_V1_8821C) << BIT_SHIFT_NPQ_V1_8821C)
-#define BIT_GET_NPQ_V1_8821C(x) (((x) >> BIT_SHIFT_NPQ_V1_8821C) & BIT_MASK_NPQ_V1_8821C)

+#define BIT_GET_NPQ_V1_8821C(x) (((x) >> BIT_SHIFT_NPQ_V1_8821C) & BIT_MASK_NPQ_V1_8821C)
+
 
 
 /* 2 REG_FIFOPAGE_INFO_4_8821C */
@@ -3505,13 +3805,15 @@
 #define BIT_SHIFT_EXQ_AVAL_PG_V1_8821C 16
 #define BIT_MASK_EXQ_AVAL_PG_V1_8821C 0xfff
 #define BIT_EXQ_AVAL_PG_V1_8821C(x) (((x) & BIT_MASK_EXQ_AVAL_PG_V1_8821C) << BIT_SHIFT_EXQ_AVAL_PG_V1_8821C)
-#define BIT_GET_EXQ_AVAL_PG_V1_8821C(x) (((x) >> BIT_SHIFT_EXQ_AVAL_PG_V1_8821C) & BIT_MASK_EXQ_AVAL_PG_V1_8821C)

+#define BIT_GET_EXQ_AVAL_PG_V1_8821C(x) (((x) >> BIT_SHIFT_EXQ_AVAL_PG_V1_8821C) & BIT_MASK_EXQ_AVAL_PG_V1_8821C)
+
 
 
 #define BIT_SHIFT_EXQ_V1_8821C 0
 #define BIT_MASK_EXQ_V1_8821C 0xfff
 #define BIT_EXQ_V1_8821C(x) (((x) & BIT_MASK_EXQ_V1_8821C) << BIT_SHIFT_EXQ_V1_8821C)
-#define BIT_GET_EXQ_V1_8821C(x) (((x) >> BIT_SHIFT_EXQ_V1_8821C) & BIT_MASK_EXQ_V1_8821C)

+#define BIT_GET_EXQ_V1_8821C(x) (((x) >> BIT_SHIFT_EXQ_V1_8821C) & BIT_MASK_EXQ_V1_8821C)
+
 
 
 /* 2 REG_FIFOPAGE_INFO_5_8821C */
@@ -3519,13 +3821,15 @@
 #define BIT_SHIFT_PUBQ_AVAL_PG_V1_8821C 16
 #define BIT_MASK_PUBQ_AVAL_PG_V1_8821C 0xfff
 #define BIT_PUBQ_AVAL_PG_V1_8821C(x) (((x) & BIT_MASK_PUBQ_AVAL_PG_V1_8821C) << BIT_SHIFT_PUBQ_AVAL_PG_V1_8821C)
-#define BIT_GET_PUBQ_AVAL_PG_V1_8821C(x) (((x) >> BIT_SHIFT_PUBQ_AVAL_PG_V1_8821C) & BIT_MASK_PUBQ_AVAL_PG_V1_8821C)

+#define BIT_GET_PUBQ_AVAL_PG_V1_8821C(x) (((x) >> BIT_SHIFT_PUBQ_AVAL_PG_V1_8821C) & BIT_MASK_PUBQ_AVAL_PG_V1_8821C)
+
 
 
 #define BIT_SHIFT_PUBQ_V1_8821C 0
 #define BIT_MASK_PUBQ_V1_8821C 0xfff
 #define BIT_PUBQ_V1_8821C(x) (((x) & BIT_MASK_PUBQ_V1_8821C) << BIT_SHIFT_PUBQ_V1_8821C)
-#define BIT_GET_PUBQ_V1_8821C(x) (((x) >> BIT_SHIFT_PUBQ_V1_8821C) & BIT_MASK_PUBQ_V1_8821C)

+#define BIT_GET_PUBQ_V1_8821C(x) (((x) >> BIT_SHIFT_PUBQ_V1_8821C) & BIT_MASK_PUBQ_V1_8821C)
+
 
 
 /* 2 REG_H2C_HEAD_8821C */
@@ -3533,7 +3837,8 @@
 #define BIT_SHIFT_H2C_HEAD_8821C 0
 #define BIT_MASK_H2C_HEAD_8821C 0x3ffff
 #define BIT_H2C_HEAD_8821C(x) (((x) & BIT_MASK_H2C_HEAD_8821C) << BIT_SHIFT_H2C_HEAD_8821C)
-#define BIT_GET_H2C_HEAD_8821C(x) (((x) >> BIT_SHIFT_H2C_HEAD_8821C) & BIT_MASK_H2C_HEAD_8821C)

+#define BIT_GET_H2C_HEAD_8821C(x) (((x) >> BIT_SHIFT_H2C_HEAD_8821C) & BIT_MASK_H2C_HEAD_8821C)
+
 
 
 /* 2 REG_H2C_TAIL_8821C */
@@ -3541,7 +3846,8 @@
 #define BIT_SHIFT_H2C_TAIL_8821C 0
 #define BIT_MASK_H2C_TAIL_8821C 0x3ffff
 #define BIT_H2C_TAIL_8821C(x) (((x) & BIT_MASK_H2C_TAIL_8821C) << BIT_SHIFT_H2C_TAIL_8821C)
-#define BIT_GET_H2C_TAIL_8821C(x) (((x) >> BIT_SHIFT_H2C_TAIL_8821C) & BIT_MASK_H2C_TAIL_8821C)

+#define BIT_GET_H2C_TAIL_8821C(x) (((x) >> BIT_SHIFT_H2C_TAIL_8821C) & BIT_MASK_H2C_TAIL_8821C)
+
 
 
 /* 2 REG_H2C_READ_ADDR_8821C */
@@ -3549,7 +3855,8 @@
 #define BIT_SHIFT_H2C_READ_ADDR_8821C 0
 #define BIT_MASK_H2C_READ_ADDR_8821C 0x3ffff
 #define BIT_H2C_READ_ADDR_8821C(x) (((x) & BIT_MASK_H2C_READ_ADDR_8821C) << BIT_SHIFT_H2C_READ_ADDR_8821C)
-#define BIT_GET_H2C_READ_ADDR_8821C(x) (((x) >> BIT_SHIFT_H2C_READ_ADDR_8821C) & BIT_MASK_H2C_READ_ADDR_8821C)

+#define BIT_GET_H2C_READ_ADDR_8821C(x) (((x) >> BIT_SHIFT_H2C_READ_ADDR_8821C) & BIT_MASK_H2C_READ_ADDR_8821C)
+
 
 
 /* 2 REG_H2C_WR_ADDR_8821C */
@@ -3557,7 +3864,8 @@
 #define BIT_SHIFT_H2C_WR_ADDR_8821C 0
 #define BIT_MASK_H2C_WR_ADDR_8821C 0x3ffff
 #define BIT_H2C_WR_ADDR_8821C(x) (((x) & BIT_MASK_H2C_WR_ADDR_8821C) << BIT_SHIFT_H2C_WR_ADDR_8821C)
-#define BIT_GET_H2C_WR_ADDR_8821C(x) (((x) >> BIT_SHIFT_H2C_WR_ADDR_8821C) & BIT_MASK_H2C_WR_ADDR_8821C)

+#define BIT_GET_H2C_WR_ADDR_8821C(x) (((x) >> BIT_SHIFT_H2C_WR_ADDR_8821C) & BIT_MASK_H2C_WR_ADDR_8821C)
+
 
 
 /* 2 REG_H2C_INFO_8821C */
@@ -3567,7 +3875,8 @@
 #define BIT_SHIFT_H2C_LEN_SEL_8821C 0
 #define BIT_MASK_H2C_LEN_SEL_8821C 0x3
 #define BIT_H2C_LEN_SEL_8821C(x) (((x) & BIT_MASK_H2C_LEN_SEL_8821C) << BIT_SHIFT_H2C_LEN_SEL_8821C)
-#define BIT_GET_H2C_LEN_SEL_8821C(x) (((x) >> BIT_SHIFT_H2C_LEN_SEL_8821C) & BIT_MASK_H2C_LEN_SEL_8821C)

+#define BIT_GET_H2C_LEN_SEL_8821C(x) (((x) >> BIT_SHIFT_H2C_LEN_SEL_8821C) & BIT_MASK_H2C_LEN_SEL_8821C)
+
 
 
 /* 2 REG_RXDMA_AGG_PG_TH_8821C */
@@ -3575,25 +3884,29 @@
 #define BIT_SHIFT_RXDMA_AGG_OLD_MOD_8821C 24
 #define BIT_MASK_RXDMA_AGG_OLD_MOD_8821C 0xff
 #define BIT_RXDMA_AGG_OLD_MOD_8821C(x) (((x) & BIT_MASK_RXDMA_AGG_OLD_MOD_8821C) << BIT_SHIFT_RXDMA_AGG_OLD_MOD_8821C)
-#define BIT_GET_RXDMA_AGG_OLD_MOD_8821C(x) (((x) >> BIT_SHIFT_RXDMA_AGG_OLD_MOD_8821C) & BIT_MASK_RXDMA_AGG_OLD_MOD_8821C)

+#define BIT_GET_RXDMA_AGG_OLD_MOD_8821C(x) (((x) >> BIT_SHIFT_RXDMA_AGG_OLD_MOD_8821C) & BIT_MASK_RXDMA_AGG_OLD_MOD_8821C)
+
 
 
 #define BIT_SHIFT_PKT_NUM_WOL_8821C 16
 #define BIT_MASK_PKT_NUM_WOL_8821C 0xff
 #define BIT_PKT_NUM_WOL_8821C(x) (((x) & BIT_MASK_PKT_NUM_WOL_8821C) << BIT_SHIFT_PKT_NUM_WOL_8821C)
-#define BIT_GET_PKT_NUM_WOL_8821C(x) (((x) >> BIT_SHIFT_PKT_NUM_WOL_8821C) & BIT_MASK_PKT_NUM_WOL_8821C)

+#define BIT_GET_PKT_NUM_WOL_8821C(x) (((x) >> BIT_SHIFT_PKT_NUM_WOL_8821C) & BIT_MASK_PKT_NUM_WOL_8821C)
+
 
 
 #define BIT_SHIFT_DMA_AGG_TO_8821C 8
 #define BIT_MASK_DMA_AGG_TO_8821C 0xf
 #define BIT_DMA_AGG_TO_8821C(x) (((x) & BIT_MASK_DMA_AGG_TO_8821C) << BIT_SHIFT_DMA_AGG_TO_8821C)
-#define BIT_GET_DMA_AGG_TO_8821C(x) (((x) >> BIT_SHIFT_DMA_AGG_TO_8821C) & BIT_MASK_DMA_AGG_TO_8821C)

+#define BIT_GET_DMA_AGG_TO_8821C(x) (((x) >> BIT_SHIFT_DMA_AGG_TO_8821C) & BIT_MASK_DMA_AGG_TO_8821C)
+
 
 
 #define BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8821C 0
 #define BIT_MASK_RXDMA_AGG_PG_TH_V1_8821C 0xf
 #define BIT_RXDMA_AGG_PG_TH_V1_8821C(x) (((x) & BIT_MASK_RXDMA_AGG_PG_TH_V1_8821C) << BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8821C)
-#define BIT_GET_RXDMA_AGG_PG_TH_V1_8821C(x) (((x) >> BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8821C) & BIT_MASK_RXDMA_AGG_PG_TH_V1_8821C)

+#define BIT_GET_RXDMA_AGG_PG_TH_V1_8821C(x) (((x) >> BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8821C) & BIT_MASK_RXDMA_AGG_PG_TH_V1_8821C)
+
 
 
 /* 2 REG_RXPKT_NUM_8821C */
@@ -3601,13 +3914,15 @@
 #define BIT_SHIFT_RXPKT_NUM_8821C 24
 #define BIT_MASK_RXPKT_NUM_8821C 0xff
 #define BIT_RXPKT_NUM_8821C(x) (((x) & BIT_MASK_RXPKT_NUM_8821C) << BIT_SHIFT_RXPKT_NUM_8821C)
-#define BIT_GET_RXPKT_NUM_8821C(x) (((x) >> BIT_SHIFT_RXPKT_NUM_8821C) & BIT_MASK_RXPKT_NUM_8821C)

+#define BIT_GET_RXPKT_NUM_8821C(x) (((x) >> BIT_SHIFT_RXPKT_NUM_8821C) & BIT_MASK_RXPKT_NUM_8821C)
+
 
 
 #define BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8821C 20
 #define BIT_MASK_FW_UPD_RDPTR19_TO_16_8821C 0xf
 #define BIT_FW_UPD_RDPTR19_TO_16_8821C(x) (((x) & BIT_MASK_FW_UPD_RDPTR19_TO_16_8821C) << BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8821C)
-#define BIT_GET_FW_UPD_RDPTR19_TO_16_8821C(x) (((x) >> BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8821C) & BIT_MASK_FW_UPD_RDPTR19_TO_16_8821C)

+#define BIT_GET_FW_UPD_RDPTR19_TO_16_8821C(x) (((x) >> BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8821C) & BIT_MASK_FW_UPD_RDPTR19_TO_16_8821C)
+
 
 #define BIT_RXDMA_REQ_8821C BIT(19)
 #define BIT_RW_RELEASE_EN_8821C BIT(18)
@@ -3617,7 +3932,8 @@
 #define BIT_SHIFT_FW_UPD_RDPTR_8821C 0
 #define BIT_MASK_FW_UPD_RDPTR_8821C 0xffff
 #define BIT_FW_UPD_RDPTR_8821C(x) (((x) & BIT_MASK_FW_UPD_RDPTR_8821C) << BIT_SHIFT_FW_UPD_RDPTR_8821C)
-#define BIT_GET_FW_UPD_RDPTR_8821C(x) (((x) >> BIT_SHIFT_FW_UPD_RDPTR_8821C) & BIT_MASK_FW_UPD_RDPTR_8821C)

+#define BIT_GET_FW_UPD_RDPTR_8821C(x) (((x) >> BIT_SHIFT_FW_UPD_RDPTR_8821C) & BIT_MASK_FW_UPD_RDPTR_8821C)
+
 
 
 /* 2 REG_RXDMA_STATUS_8821C */
@@ -3634,7 +3950,8 @@
 #define BIT_SHIFT_RDE_DEBUG_8821C 0
 #define BIT_MASK_RDE_DEBUG_8821C 0xffffffffL
 #define BIT_RDE_DEBUG_8821C(x) (((x) & BIT_MASK_RDE_DEBUG_8821C) << BIT_SHIFT_RDE_DEBUG_8821C)
-#define BIT_GET_RDE_DEBUG_8821C(x) (((x) >> BIT_SHIFT_RDE_DEBUG_8821C) & BIT_MASK_RDE_DEBUG_8821C)

+#define BIT_GET_RDE_DEBUG_8821C(x) (((x) >> BIT_SHIFT_RDE_DEBUG_8821C) & BIT_MASK_RDE_DEBUG_8821C)
+
 
 
 /* 2 REG_RXDMA_MODE_8821C */
@@ -3642,26 +3959,30 @@
 #define BIT_SHIFT_PKTNUM_TH_V2_8821C 24
 #define BIT_MASK_PKTNUM_TH_V2_8821C 0x1f
 #define BIT_PKTNUM_TH_V2_8821C(x) (((x) & BIT_MASK_PKTNUM_TH_V2_8821C) << BIT_SHIFT_PKTNUM_TH_V2_8821C)
-#define BIT_GET_PKTNUM_TH_V2_8821C(x) (((x) >> BIT_SHIFT_PKTNUM_TH_V2_8821C) & BIT_MASK_PKTNUM_TH_V2_8821C)

+#define BIT_GET_PKTNUM_TH_V2_8821C(x) (((x) >> BIT_SHIFT_PKTNUM_TH_V2_8821C) & BIT_MASK_PKTNUM_TH_V2_8821C)
+
 
 #define BIT_TXBA_BREAK_USBAGG_8821C BIT(23)
 
 #define BIT_SHIFT_PKTLEN_PARA_8821C 16
 #define BIT_MASK_PKTLEN_PARA_8821C 0x7
 #define BIT_PKTLEN_PARA_8821C(x) (((x) & BIT_MASK_PKTLEN_PARA_8821C) << BIT_SHIFT_PKTLEN_PARA_8821C)
-#define BIT_GET_PKTLEN_PARA_8821C(x) (((x) >> BIT_SHIFT_PKTLEN_PARA_8821C) & BIT_MASK_PKTLEN_PARA_8821C)

+#define BIT_GET_PKTLEN_PARA_8821C(x) (((x) >> BIT_SHIFT_PKTLEN_PARA_8821C) & BIT_MASK_PKTLEN_PARA_8821C)
+
 
 
 #define BIT_SHIFT_BURST_SIZE_8821C 4
 #define BIT_MASK_BURST_SIZE_8821C 0x3
 #define BIT_BURST_SIZE_8821C(x) (((x) & BIT_MASK_BURST_SIZE_8821C) << BIT_SHIFT_BURST_SIZE_8821C)
-#define BIT_GET_BURST_SIZE_8821C(x) (((x) >> BIT_SHIFT_BURST_SIZE_8821C) & BIT_MASK_BURST_SIZE_8821C)

+#define BIT_GET_BURST_SIZE_8821C(x) (((x) >> BIT_SHIFT_BURST_SIZE_8821C) & BIT_MASK_BURST_SIZE_8821C)
+
 
 
 #define BIT_SHIFT_BURST_CNT_8821C 2
 #define BIT_MASK_BURST_CNT_8821C 0x3
 #define BIT_BURST_CNT_8821C(x) (((x) & BIT_MASK_BURST_CNT_8821C) << BIT_SHIFT_BURST_CNT_8821C)
-#define BIT_GET_BURST_CNT_8821C(x) (((x) >> BIT_SHIFT_BURST_CNT_8821C) & BIT_MASK_BURST_CNT_8821C)

+#define BIT_GET_BURST_CNT_8821C(x) (((x) >> BIT_SHIFT_BURST_CNT_8821C) & BIT_MASK_BURST_CNT_8821C)
+
 
 #define BIT_DMA_MODE_8821C BIT(1)
 
@@ -3670,14 +3991,16 @@
 #define BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8821C 24
 #define BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8821C 0xf
 #define BIT_R_C2H_STR_ADDR_16_TO_19_8821C(x) (((x) & BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8821C) << BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8821C)
-#define BIT_GET_R_C2H_STR_ADDR_16_TO_19_8821C(x) (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8821C) & BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8821C)

+#define BIT_GET_R_C2H_STR_ADDR_16_TO_19_8821C(x) (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8821C) & BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8821C)
+
 
 #define BIT_R_C2H_PKT_REQ_8821C BIT(16)
 
 #define BIT_SHIFT_R_C2H_STR_ADDR_8821C 0
 #define BIT_MASK_R_C2H_STR_ADDR_8821C 0xffff
 #define BIT_R_C2H_STR_ADDR_8821C(x) (((x) & BIT_MASK_R_C2H_STR_ADDR_8821C) << BIT_SHIFT_R_C2H_STR_ADDR_8821C)
-#define BIT_GET_R_C2H_STR_ADDR_8821C(x) (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_8821C) & BIT_MASK_R_C2H_STR_ADDR_8821C)

+#define BIT_GET_R_C2H_STR_ADDR_8821C(x) (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_8821C) & BIT_MASK_R_C2H_STR_ADDR_8821C)
+
 
 
 /* 2 REG_FWFF_C2H_8821C */
@@ -3685,7 +4008,8 @@
 #define BIT_SHIFT_C2H_DMA_ADDR_8821C 0
 #define BIT_MASK_C2H_DMA_ADDR_8821C 0x3ffff
 #define BIT_C2H_DMA_ADDR_8821C(x) (((x) & BIT_MASK_C2H_DMA_ADDR_8821C) << BIT_SHIFT_C2H_DMA_ADDR_8821C)
-#define BIT_GET_C2H_DMA_ADDR_8821C(x) (((x) >> BIT_SHIFT_C2H_DMA_ADDR_8821C) & BIT_MASK_C2H_DMA_ADDR_8821C)

+#define BIT_GET_C2H_DMA_ADDR_8821C(x) (((x) >> BIT_SHIFT_C2H_DMA_ADDR_8821C) & BIT_MASK_C2H_DMA_ADDR_8821C)
+
 
 
 /* 2 REG_FWFF_CTRL_8821C */
@@ -3694,13 +4018,15 @@
 #define BIT_SHIFT_FWFF_DMA_PKT_NUM_8821C 16
 #define BIT_MASK_FWFF_DMA_PKT_NUM_8821C 0xff
 #define BIT_FWFF_DMA_PKT_NUM_8821C(x) (((x) & BIT_MASK_FWFF_DMA_PKT_NUM_8821C) << BIT_SHIFT_FWFF_DMA_PKT_NUM_8821C)
-#define BIT_GET_FWFF_DMA_PKT_NUM_8821C(x) (((x) >> BIT_SHIFT_FWFF_DMA_PKT_NUM_8821C) & BIT_MASK_FWFF_DMA_PKT_NUM_8821C)

+#define BIT_GET_FWFF_DMA_PKT_NUM_8821C(x) (((x) >> BIT_SHIFT_FWFF_DMA_PKT_NUM_8821C) & BIT_MASK_FWFF_DMA_PKT_NUM_8821C)
+
 
 
 #define BIT_SHIFT_FWFF_STR_ADDR_8821C 0
 #define BIT_MASK_FWFF_STR_ADDR_8821C 0xffff
 #define BIT_FWFF_STR_ADDR_8821C(x) (((x) & BIT_MASK_FWFF_STR_ADDR_8821C) << BIT_SHIFT_FWFF_STR_ADDR_8821C)
-#define BIT_GET_FWFF_STR_ADDR_8821C(x) (((x) >> BIT_SHIFT_FWFF_STR_ADDR_8821C) & BIT_MASK_FWFF_STR_ADDR_8821C)

+#define BIT_GET_FWFF_STR_ADDR_8821C(x) (((x) >> BIT_SHIFT_FWFF_STR_ADDR_8821C) & BIT_MASK_FWFF_STR_ADDR_8821C)
+
 
 
 /* 2 REG_FWFF_PKT_INFO_8821C */
@@ -3708,13 +4034,15 @@
 #define BIT_SHIFT_FWFF_PKT_QUEUED_8821C 16
 #define BIT_MASK_FWFF_PKT_QUEUED_8821C 0xff
 #define BIT_FWFF_PKT_QUEUED_8821C(x) (((x) & BIT_MASK_FWFF_PKT_QUEUED_8821C) << BIT_SHIFT_FWFF_PKT_QUEUED_8821C)
-#define BIT_GET_FWFF_PKT_QUEUED_8821C(x) (((x) >> BIT_SHIFT_FWFF_PKT_QUEUED_8821C) & BIT_MASK_FWFF_PKT_QUEUED_8821C)

+#define BIT_GET_FWFF_PKT_QUEUED_8821C(x) (((x) >> BIT_SHIFT_FWFF_PKT_QUEUED_8821C) & BIT_MASK_FWFF_PKT_QUEUED_8821C)
+
 
 
 #define BIT_SHIFT_FWFF_PKT_STR_ADDR_8821C 0
 #define BIT_MASK_FWFF_PKT_STR_ADDR_8821C 0xffff
 #define BIT_FWFF_PKT_STR_ADDR_8821C(x) (((x) & BIT_MASK_FWFF_PKT_STR_ADDR_8821C) << BIT_SHIFT_FWFF_PKT_STR_ADDR_8821C)
-#define BIT_GET_FWFF_PKT_STR_ADDR_8821C(x) (((x) >> BIT_SHIFT_FWFF_PKT_STR_ADDR_8821C) & BIT_MASK_FWFF_PKT_STR_ADDR_8821C)

+#define BIT_GET_FWFF_PKT_STR_ADDR_8821C(x) (((x) >> BIT_SHIFT_FWFF_PKT_STR_ADDR_8821C) & BIT_MASK_FWFF_PKT_STR_ADDR_8821C)
+
 
 
 /* 2 REG_DDMA_CH0SA_8821C */
@@ -3722,7 +4050,8 @@
 #define BIT_SHIFT_DDMACH0_SA_8821C 0
 #define BIT_MASK_DDMACH0_SA_8821C 0xffffffffL
 #define BIT_DDMACH0_SA_8821C(x) (((x) & BIT_MASK_DDMACH0_SA_8821C) << BIT_SHIFT_DDMACH0_SA_8821C)
-#define BIT_GET_DDMACH0_SA_8821C(x) (((x) >> BIT_SHIFT_DDMACH0_SA_8821C) & BIT_MASK_DDMACH0_SA_8821C)

+#define BIT_GET_DDMACH0_SA_8821C(x) (((x) >> BIT_SHIFT_DDMACH0_SA_8821C) & BIT_MASK_DDMACH0_SA_8821C)
+
 
 
 /* 2 REG_DDMA_CH0DA_8821C */
@@ -3730,7 +4059,8 @@
 #define BIT_SHIFT_DDMACH0_DA_8821C 0
 #define BIT_MASK_DDMACH0_DA_8821C 0xffffffffL
 #define BIT_DDMACH0_DA_8821C(x) (((x) & BIT_MASK_DDMACH0_DA_8821C) << BIT_SHIFT_DDMACH0_DA_8821C)
-#define BIT_GET_DDMACH0_DA_8821C(x) (((x) >> BIT_SHIFT_DDMACH0_DA_8821C) & BIT_MASK_DDMACH0_DA_8821C)

+#define BIT_GET_DDMACH0_DA_8821C(x) (((x) >> BIT_SHIFT_DDMACH0_DA_8821C) & BIT_MASK_DDMACH0_DA_8821C)
+
 
 
 /* 2 REG_DDMA_CH0CTRL_8821C */
@@ -3745,7 +4075,8 @@
 #define BIT_SHIFT_DDMACH0_DLEN_8821C 0
 #define BIT_MASK_DDMACH0_DLEN_8821C 0x3ffff
 #define BIT_DDMACH0_DLEN_8821C(x) (((x) & BIT_MASK_DDMACH0_DLEN_8821C) << BIT_SHIFT_DDMACH0_DLEN_8821C)
-#define BIT_GET_DDMACH0_DLEN_8821C(x) (((x) >> BIT_SHIFT_DDMACH0_DLEN_8821C) & BIT_MASK_DDMACH0_DLEN_8821C)

+#define BIT_GET_DDMACH0_DLEN_8821C(x) (((x) >> BIT_SHIFT_DDMACH0_DLEN_8821C) & BIT_MASK_DDMACH0_DLEN_8821C)
+
 
 
 /* 2 REG_DDMA_CH1SA_8821C */
@@ -3753,7 +4084,8 @@
 #define BIT_SHIFT_DDMACH1_SA_8821C 0
 #define BIT_MASK_DDMACH1_SA_8821C 0xffffffffL
 #define BIT_DDMACH1_SA_8821C(x) (((x) & BIT_MASK_DDMACH1_SA_8821C) << BIT_SHIFT_DDMACH1_SA_8821C)
-#define BIT_GET_DDMACH1_SA_8821C(x) (((x) >> BIT_SHIFT_DDMACH1_SA_8821C) & BIT_MASK_DDMACH1_SA_8821C)

+#define BIT_GET_DDMACH1_SA_8821C(x) (((x) >> BIT_SHIFT_DDMACH1_SA_8821C) & BIT_MASK_DDMACH1_SA_8821C)
+
 
 
 /* 2 REG_DDMA_CH1DA_8821C */
@@ -3761,7 +4093,8 @@
 #define BIT_SHIFT_DDMACH1_DA_8821C 0
 #define BIT_MASK_DDMACH1_DA_8821C 0xffffffffL
 #define BIT_DDMACH1_DA_8821C(x) (((x) & BIT_MASK_DDMACH1_DA_8821C) << BIT_SHIFT_DDMACH1_DA_8821C)
-#define BIT_GET_DDMACH1_DA_8821C(x) (((x) >> BIT_SHIFT_DDMACH1_DA_8821C) & BIT_MASK_DDMACH1_DA_8821C)

+#define BIT_GET_DDMACH1_DA_8821C(x) (((x) >> BIT_SHIFT_DDMACH1_DA_8821C) & BIT_MASK_DDMACH1_DA_8821C)
+
 
 
 /* 2 REG_DDMA_CH1CTRL_8821C */
@@ -3776,7 +4109,8 @@
 #define BIT_SHIFT_DDMACH1_DLEN_8821C 0
 #define BIT_MASK_DDMACH1_DLEN_8821C 0x3ffff
 #define BIT_DDMACH1_DLEN_8821C(x) (((x) & BIT_MASK_DDMACH1_DLEN_8821C) << BIT_SHIFT_DDMACH1_DLEN_8821C)
-#define BIT_GET_DDMACH1_DLEN_8821C(x) (((x) >> BIT_SHIFT_DDMACH1_DLEN_8821C) & BIT_MASK_DDMACH1_DLEN_8821C)

+#define BIT_GET_DDMACH1_DLEN_8821C(x) (((x) >> BIT_SHIFT_DDMACH1_DLEN_8821C) & BIT_MASK_DDMACH1_DLEN_8821C)
+
 
 
 /* 2 REG_DDMA_CH2SA_8821C */
@@ -3784,7 +4118,8 @@
 #define BIT_SHIFT_DDMACH2_SA_8821C 0
 #define BIT_MASK_DDMACH2_SA_8821C 0xffffffffL
 #define BIT_DDMACH2_SA_8821C(x) (((x) & BIT_MASK_DDMACH2_SA_8821C) << BIT_SHIFT_DDMACH2_SA_8821C)
-#define BIT_GET_DDMACH2_SA_8821C(x) (((x) >> BIT_SHIFT_DDMACH2_SA_8821C) & BIT_MASK_DDMACH2_SA_8821C)

+#define BIT_GET_DDMACH2_SA_8821C(x) (((x) >> BIT_SHIFT_DDMACH2_SA_8821C) & BIT_MASK_DDMACH2_SA_8821C)
+
 
 
 /* 2 REG_DDMA_CH2DA_8821C */
@@ -3792,7 +4127,8 @@
 #define BIT_SHIFT_DDMACH2_DA_8821C 0
 #define BIT_MASK_DDMACH2_DA_8821C 0xffffffffL
 #define BIT_DDMACH2_DA_8821C(x) (((x) & BIT_MASK_DDMACH2_DA_8821C) << BIT_SHIFT_DDMACH2_DA_8821C)
-#define BIT_GET_DDMACH2_DA_8821C(x) (((x) >> BIT_SHIFT_DDMACH2_DA_8821C) & BIT_MASK_DDMACH2_DA_8821C)

+#define BIT_GET_DDMACH2_DA_8821C(x) (((x) >> BIT_SHIFT_DDMACH2_DA_8821C) & BIT_MASK_DDMACH2_DA_8821C)
+
 
 
 /* 2 REG_DDMA_CH2CTRL_8821C */
@@ -3807,7 +4143,8 @@
 #define BIT_SHIFT_DDMACH2_DLEN_8821C 0
 #define BIT_MASK_DDMACH2_DLEN_8821C 0x3ffff
 #define BIT_DDMACH2_DLEN_8821C(x) (((x) & BIT_MASK_DDMACH2_DLEN_8821C) << BIT_SHIFT_DDMACH2_DLEN_8821C)
-#define BIT_GET_DDMACH2_DLEN_8821C(x) (((x) >> BIT_SHIFT_DDMACH2_DLEN_8821C) & BIT_MASK_DDMACH2_DLEN_8821C)

+#define BIT_GET_DDMACH2_DLEN_8821C(x) (((x) >> BIT_SHIFT_DDMACH2_DLEN_8821C) & BIT_MASK_DDMACH2_DLEN_8821C)
+
 
 
 /* 2 REG_DDMA_CH3SA_8821C */
@@ -3815,7 +4152,8 @@
 #define BIT_SHIFT_DDMACH3_SA_8821C 0
 #define BIT_MASK_DDMACH3_SA_8821C 0xffffffffL
 #define BIT_DDMACH3_SA_8821C(x) (((x) & BIT_MASK_DDMACH3_SA_8821C) << BIT_SHIFT_DDMACH3_SA_8821C)
-#define BIT_GET_DDMACH3_SA_8821C(x) (((x) >> BIT_SHIFT_DDMACH3_SA_8821C) & BIT_MASK_DDMACH3_SA_8821C)

+#define BIT_GET_DDMACH3_SA_8821C(x) (((x) >> BIT_SHIFT_DDMACH3_SA_8821C) & BIT_MASK_DDMACH3_SA_8821C)
+
 
 
 /* 2 REG_DDMA_CH3DA_8821C */
@@ -3823,7 +4161,8 @@
 #define BIT_SHIFT_DDMACH3_DA_8821C 0
 #define BIT_MASK_DDMACH3_DA_8821C 0xffffffffL
 #define BIT_DDMACH3_DA_8821C(x) (((x) & BIT_MASK_DDMACH3_DA_8821C) << BIT_SHIFT_DDMACH3_DA_8821C)
-#define BIT_GET_DDMACH3_DA_8821C(x) (((x) >> BIT_SHIFT_DDMACH3_DA_8821C) & BIT_MASK_DDMACH3_DA_8821C)

+#define BIT_GET_DDMACH3_DA_8821C(x) (((x) >> BIT_SHIFT_DDMACH3_DA_8821C) & BIT_MASK_DDMACH3_DA_8821C)
+
 
 
 /* 2 REG_DDMA_CH3CTRL_8821C */
@@ -3838,7 +4177,8 @@
 #define BIT_SHIFT_DDMACH3_DLEN_8821C 0
 #define BIT_MASK_DDMACH3_DLEN_8821C 0x3ffff
 #define BIT_DDMACH3_DLEN_8821C(x) (((x) & BIT_MASK_DDMACH3_DLEN_8821C) << BIT_SHIFT_DDMACH3_DLEN_8821C)
-#define BIT_GET_DDMACH3_DLEN_8821C(x) (((x) >> BIT_SHIFT_DDMACH3_DLEN_8821C) & BIT_MASK_DDMACH3_DLEN_8821C)

+#define BIT_GET_DDMACH3_DLEN_8821C(x) (((x) >> BIT_SHIFT_DDMACH3_DLEN_8821C) & BIT_MASK_DDMACH3_DLEN_8821C)
+
 
 
 /* 2 REG_DDMA_CH4SA_8821C */
@@ -3846,7 +4186,8 @@
 #define BIT_SHIFT_DDMACH4_SA_8821C 0
 #define BIT_MASK_DDMACH4_SA_8821C 0xffffffffL
 #define BIT_DDMACH4_SA_8821C(x) (((x) & BIT_MASK_DDMACH4_SA_8821C) << BIT_SHIFT_DDMACH4_SA_8821C)
-#define BIT_GET_DDMACH4_SA_8821C(x) (((x) >> BIT_SHIFT_DDMACH4_SA_8821C) & BIT_MASK_DDMACH4_SA_8821C)

+#define BIT_GET_DDMACH4_SA_8821C(x) (((x) >> BIT_SHIFT_DDMACH4_SA_8821C) & BIT_MASK_DDMACH4_SA_8821C)
+
 
 
 /* 2 REG_DDMA_CH4DA_8821C */
@@ -3854,7 +4195,8 @@
 #define BIT_SHIFT_DDMACH4_DA_8821C 0
 #define BIT_MASK_DDMACH4_DA_8821C 0xffffffffL
 #define BIT_DDMACH4_DA_8821C(x) (((x) & BIT_MASK_DDMACH4_DA_8821C) << BIT_SHIFT_DDMACH4_DA_8821C)
-#define BIT_GET_DDMACH4_DA_8821C(x) (((x) >> BIT_SHIFT_DDMACH4_DA_8821C) & BIT_MASK_DDMACH4_DA_8821C)

+#define BIT_GET_DDMACH4_DA_8821C(x) (((x) >> BIT_SHIFT_DDMACH4_DA_8821C) & BIT_MASK_DDMACH4_DA_8821C)
+
 
 
 /* 2 REG_DDMA_CH4CTRL_8821C */
@@ -3869,7 +4211,8 @@
 #define BIT_SHIFT_DDMACH4_DLEN_8821C 0
 #define BIT_MASK_DDMACH4_DLEN_8821C 0x3ffff
 #define BIT_DDMACH4_DLEN_8821C(x) (((x) & BIT_MASK_DDMACH4_DLEN_8821C) << BIT_SHIFT_DDMACH4_DLEN_8821C)
-#define BIT_GET_DDMACH4_DLEN_8821C(x) (((x) >> BIT_SHIFT_DDMACH4_DLEN_8821C) & BIT_MASK_DDMACH4_DLEN_8821C)

+#define BIT_GET_DDMACH4_DLEN_8821C(x) (((x) >> BIT_SHIFT_DDMACH4_DLEN_8821C) & BIT_MASK_DDMACH4_DLEN_8821C)
+
 
 
 /* 2 REG_DDMA_CH5SA_8821C */
@@ -3877,7 +4220,8 @@
 #define BIT_SHIFT_DDMACH5_SA_8821C 0
 #define BIT_MASK_DDMACH5_SA_8821C 0xffffffffL
 #define BIT_DDMACH5_SA_8821C(x) (((x) & BIT_MASK_DDMACH5_SA_8821C) << BIT_SHIFT_DDMACH5_SA_8821C)
-#define BIT_GET_DDMACH5_SA_8821C(x) (((x) >> BIT_SHIFT_DDMACH5_SA_8821C) & BIT_MASK_DDMACH5_SA_8821C)

+#define BIT_GET_DDMACH5_SA_8821C(x) (((x) >> BIT_SHIFT_DDMACH5_SA_8821C) & BIT_MASK_DDMACH5_SA_8821C)
+
 
 
 /* 2 REG_DDMA_CH5DA_8821C */
@@ -3885,7 +4229,8 @@
 #define BIT_SHIFT_DDMACH5_DA_8821C 0
 #define BIT_MASK_DDMACH5_DA_8821C 0xffffffffL
 #define BIT_DDMACH5_DA_8821C(x) (((x) & BIT_MASK_DDMACH5_DA_8821C) << BIT_SHIFT_DDMACH5_DA_8821C)
-#define BIT_GET_DDMACH5_DA_8821C(x) (((x) >> BIT_SHIFT_DDMACH5_DA_8821C) & BIT_MASK_DDMACH5_DA_8821C)

+#define BIT_GET_DDMACH5_DA_8821C(x) (((x) >> BIT_SHIFT_DDMACH5_DA_8821C) & BIT_MASK_DDMACH5_DA_8821C)
+
 
 
 /* 2 REG_DDMA_CH5CTRL_8821C */
@@ -3900,7 +4245,8 @@
 #define BIT_SHIFT_DDMACH5_DLEN_8821C 0
 #define BIT_MASK_DDMACH5_DLEN_8821C 0x3ffff
 #define BIT_DDMACH5_DLEN_8821C(x) (((x) & BIT_MASK_DDMACH5_DLEN_8821C) << BIT_SHIFT_DDMACH5_DLEN_8821C)
-#define BIT_GET_DDMACH5_DLEN_8821C(x) (((x) >> BIT_SHIFT_DDMACH5_DLEN_8821C) & BIT_MASK_DDMACH5_DLEN_8821C)

+#define BIT_GET_DDMACH5_DLEN_8821C(x) (((x) >> BIT_SHIFT_DDMACH5_DLEN_8821C) & BIT_MASK_DDMACH5_DLEN_8821C)
+
 
 
 /* 2 REG_DDMA_INT_MSK_8821C */
@@ -3924,7 +4270,8 @@
 #define BIT_SHIFT_IDDMA0_CHKSUM_8821C 0
 #define BIT_MASK_IDDMA0_CHKSUM_8821C 0xffff
 #define BIT_IDDMA0_CHKSUM_8821C(x) (((x) & BIT_MASK_IDDMA0_CHKSUM_8821C) << BIT_SHIFT_IDDMA0_CHKSUM_8821C)
-#define BIT_GET_IDDMA0_CHKSUM_8821C(x) (((x) >> BIT_SHIFT_IDDMA0_CHKSUM_8821C) & BIT_MASK_IDDMA0_CHKSUM_8821C)

+#define BIT_GET_IDDMA0_CHKSUM_8821C(x) (((x) >> BIT_SHIFT_IDDMA0_CHKSUM_8821C) & BIT_MASK_IDDMA0_CHKSUM_8821C)
+
 
 
 /* 2 REG_DDMA_MONITOR_8821C */
@@ -3946,14 +4293,16 @@
 #define BIT_SHIFT_PCIE_MAX_RXDMA_8821C 28
 #define BIT_MASK_PCIE_MAX_RXDMA_8821C 0x7
 #define BIT_PCIE_MAX_RXDMA_8821C(x) (((x) & BIT_MASK_PCIE_MAX_RXDMA_8821C) << BIT_SHIFT_PCIE_MAX_RXDMA_8821C)
-#define BIT_GET_PCIE_MAX_RXDMA_8821C(x) (((x) >> BIT_SHIFT_PCIE_MAX_RXDMA_8821C) & BIT_MASK_PCIE_MAX_RXDMA_8821C)

+#define BIT_GET_PCIE_MAX_RXDMA_8821C(x) (((x) >> BIT_SHIFT_PCIE_MAX_RXDMA_8821C) & BIT_MASK_PCIE_MAX_RXDMA_8821C)
+
 
 #define BIT_MULRW_8821C BIT(27)
 
 #define BIT_SHIFT_PCIE_MAX_TXDMA_8821C 24
 #define BIT_MASK_PCIE_MAX_TXDMA_8821C 0x7
 #define BIT_PCIE_MAX_TXDMA_8821C(x) (((x) & BIT_MASK_PCIE_MAX_TXDMA_8821C) << BIT_SHIFT_PCIE_MAX_TXDMA_8821C)
-#define BIT_GET_PCIE_MAX_TXDMA_8821C(x) (((x) >> BIT_SHIFT_PCIE_MAX_TXDMA_8821C) & BIT_MASK_PCIE_MAX_TXDMA_8821C)

+#define BIT_GET_PCIE_MAX_TXDMA_8821C(x) (((x) >> BIT_SHIFT_PCIE_MAX_TXDMA_8821C) & BIT_MASK_PCIE_MAX_TXDMA_8821C)
+
 
 #define BIT_EN_CPL_TIMEOUT_PS_8821C BIT(22)
 #define BIT_REG_TXDMA_FAIL_PS_8821C BIT(21)
@@ -3984,31 +4333,36 @@
 #define BIT_SHIFT_TXTTIMER_MATCH_NUM_8821C 28
 #define BIT_MASK_TXTTIMER_MATCH_NUM_8821C 0xf
 #define BIT_TXTTIMER_MATCH_NUM_8821C(x) (((x) & BIT_MASK_TXTTIMER_MATCH_NUM_8821C) << BIT_SHIFT_TXTTIMER_MATCH_NUM_8821C)
-#define BIT_GET_TXTTIMER_MATCH_NUM_8821C(x) (((x) >> BIT_SHIFT_TXTTIMER_MATCH_NUM_8821C) & BIT_MASK_TXTTIMER_MATCH_NUM_8821C)

+#define BIT_GET_TXTTIMER_MATCH_NUM_8821C(x) (((x) >> BIT_SHIFT_TXTTIMER_MATCH_NUM_8821C) & BIT_MASK_TXTTIMER_MATCH_NUM_8821C)
+
 
 
 #define BIT_SHIFT_TXPKT_NUM_MATCH_8821C 24
 #define BIT_MASK_TXPKT_NUM_MATCH_8821C 0xf
 #define BIT_TXPKT_NUM_MATCH_8821C(x) (((x) & BIT_MASK_TXPKT_NUM_MATCH_8821C) << BIT_SHIFT_TXPKT_NUM_MATCH_8821C)
-#define BIT_GET_TXPKT_NUM_MATCH_8821C(x) (((x) >> BIT_SHIFT_TXPKT_NUM_MATCH_8821C) & BIT_MASK_TXPKT_NUM_MATCH_8821C)

+#define BIT_GET_TXPKT_NUM_MATCH_8821C(x) (((x) >> BIT_SHIFT_TXPKT_NUM_MATCH_8821C) & BIT_MASK_TXPKT_NUM_MATCH_8821C)
+
 
 
 #define BIT_SHIFT_RXTTIMER_MATCH_NUM_8821C 20
 #define BIT_MASK_RXTTIMER_MATCH_NUM_8821C 0xf
 #define BIT_RXTTIMER_MATCH_NUM_8821C(x) (((x) & BIT_MASK_RXTTIMER_MATCH_NUM_8821C) << BIT_SHIFT_RXTTIMER_MATCH_NUM_8821C)
-#define BIT_GET_RXTTIMER_MATCH_NUM_8821C(x) (((x) >> BIT_SHIFT_RXTTIMER_MATCH_NUM_8821C) & BIT_MASK_RXTTIMER_MATCH_NUM_8821C)

+#define BIT_GET_RXTTIMER_MATCH_NUM_8821C(x) (((x) >> BIT_SHIFT_RXTTIMER_MATCH_NUM_8821C) & BIT_MASK_RXTTIMER_MATCH_NUM_8821C)
+
 
 
 #define BIT_SHIFT_RXPKT_NUM_MATCH_8821C 16
 #define BIT_MASK_RXPKT_NUM_MATCH_8821C 0xf
 #define BIT_RXPKT_NUM_MATCH_8821C(x) (((x) & BIT_MASK_RXPKT_NUM_MATCH_8821C) << BIT_SHIFT_RXPKT_NUM_MATCH_8821C)
-#define BIT_GET_RXPKT_NUM_MATCH_8821C(x) (((x) >> BIT_SHIFT_RXPKT_NUM_MATCH_8821C) & BIT_MASK_RXPKT_NUM_MATCH_8821C)

+#define BIT_GET_RXPKT_NUM_MATCH_8821C(x) (((x) >> BIT_SHIFT_RXPKT_NUM_MATCH_8821C) & BIT_MASK_RXPKT_NUM_MATCH_8821C)
+
 
 
 #define BIT_SHIFT_MIGRATE_TIMER_8821C 0
 #define BIT_MASK_MIGRATE_TIMER_8821C 0xffff
 #define BIT_MIGRATE_TIMER_8821C(x) (((x) & BIT_MASK_MIGRATE_TIMER_8821C) << BIT_SHIFT_MIGRATE_TIMER_8821C)
-#define BIT_GET_MIGRATE_TIMER_8821C(x) (((x) >> BIT_SHIFT_MIGRATE_TIMER_8821C) & BIT_MASK_MIGRATE_TIMER_8821C)

+#define BIT_GET_MIGRATE_TIMER_8821C(x) (((x) >> BIT_SHIFT_MIGRATE_TIMER_8821C) & BIT_MASK_MIGRATE_TIMER_8821C)
+
 
 
 /* 2 REG_BCNQ_TXBD_DESA_8821C */
@@ -4016,7 +4370,8 @@
 #define BIT_SHIFT_BCNQ_TXBD_DESA_8821C 0
 #define BIT_MASK_BCNQ_TXBD_DESA_8821C 0xffffffffffffffffL
 #define BIT_BCNQ_TXBD_DESA_8821C(x) (((x) & BIT_MASK_BCNQ_TXBD_DESA_8821C) << BIT_SHIFT_BCNQ_TXBD_DESA_8821C)
-#define BIT_GET_BCNQ_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_BCNQ_TXBD_DESA_8821C) & BIT_MASK_BCNQ_TXBD_DESA_8821C)

+#define BIT_GET_BCNQ_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_BCNQ_TXBD_DESA_8821C) & BIT_MASK_BCNQ_TXBD_DESA_8821C)
+
 
 
 /* 2 REG_MGQ_TXBD_DESA_8821C */
@@ -4024,7 +4379,8 @@
 #define BIT_SHIFT_MGQ_TXBD_DESA_8821C 0
 #define BIT_MASK_MGQ_TXBD_DESA_8821C 0xffffffffffffffffL
 #define BIT_MGQ_TXBD_DESA_8821C(x) (((x) & BIT_MASK_MGQ_TXBD_DESA_8821C) << BIT_SHIFT_MGQ_TXBD_DESA_8821C)
-#define BIT_GET_MGQ_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_MGQ_TXBD_DESA_8821C) & BIT_MASK_MGQ_TXBD_DESA_8821C)

+#define BIT_GET_MGQ_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_MGQ_TXBD_DESA_8821C) & BIT_MASK_MGQ_TXBD_DESA_8821C)
+
 
 
 /* 2 REG_VOQ_TXBD_DESA_8821C */
@@ -4032,7 +4388,8 @@
 #define BIT_SHIFT_VOQ_TXBD_DESA_8821C 0
 #define BIT_MASK_VOQ_TXBD_DESA_8821C 0xffffffffffffffffL
 #define BIT_VOQ_TXBD_DESA_8821C(x) (((x) & BIT_MASK_VOQ_TXBD_DESA_8821C) << BIT_SHIFT_VOQ_TXBD_DESA_8821C)
-#define BIT_GET_VOQ_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_VOQ_TXBD_DESA_8821C) & BIT_MASK_VOQ_TXBD_DESA_8821C)

+#define BIT_GET_VOQ_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_VOQ_TXBD_DESA_8821C) & BIT_MASK_VOQ_TXBD_DESA_8821C)
+
 
 
 /* 2 REG_VIQ_TXBD_DESA_8821C */
@@ -4040,7 +4397,8 @@
 #define BIT_SHIFT_VIQ_TXBD_DESA_8821C 0
 #define BIT_MASK_VIQ_TXBD_DESA_8821C 0xffffffffffffffffL
 #define BIT_VIQ_TXBD_DESA_8821C(x) (((x) & BIT_MASK_VIQ_TXBD_DESA_8821C) << BIT_SHIFT_VIQ_TXBD_DESA_8821C)
-#define BIT_GET_VIQ_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_VIQ_TXBD_DESA_8821C) & BIT_MASK_VIQ_TXBD_DESA_8821C)

+#define BIT_GET_VIQ_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_VIQ_TXBD_DESA_8821C) & BIT_MASK_VIQ_TXBD_DESA_8821C)
+
 
 
 /* 2 REG_BEQ_TXBD_DESA_8821C */
@@ -4048,7 +4406,8 @@
 #define BIT_SHIFT_BEQ_TXBD_DESA_8821C 0
 #define BIT_MASK_BEQ_TXBD_DESA_8821C 0xffffffffffffffffL
 #define BIT_BEQ_TXBD_DESA_8821C(x) (((x) & BIT_MASK_BEQ_TXBD_DESA_8821C) << BIT_SHIFT_BEQ_TXBD_DESA_8821C)
-#define BIT_GET_BEQ_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_BEQ_TXBD_DESA_8821C) & BIT_MASK_BEQ_TXBD_DESA_8821C)

+#define BIT_GET_BEQ_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_BEQ_TXBD_DESA_8821C) & BIT_MASK_BEQ_TXBD_DESA_8821C)
+
 
 
 /* 2 REG_BKQ_TXBD_DESA_8821C */
@@ -4056,7 +4415,8 @@
 #define BIT_SHIFT_BKQ_TXBD_DESA_8821C 0
 #define BIT_MASK_BKQ_TXBD_DESA_8821C 0xffffffffffffffffL
 #define BIT_BKQ_TXBD_DESA_8821C(x) (((x) & BIT_MASK_BKQ_TXBD_DESA_8821C) << BIT_SHIFT_BKQ_TXBD_DESA_8821C)
-#define BIT_GET_BKQ_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_BKQ_TXBD_DESA_8821C) & BIT_MASK_BKQ_TXBD_DESA_8821C)

+#define BIT_GET_BKQ_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_BKQ_TXBD_DESA_8821C) & BIT_MASK_BKQ_TXBD_DESA_8821C)
+
 
 
 /* 2 REG_RXQ_RXBD_DESA_8821C */
@@ -4064,7 +4424,8 @@
 #define BIT_SHIFT_RXQ_RXBD_DESA_8821C 0
 #define BIT_MASK_RXQ_RXBD_DESA_8821C 0xffffffffffffffffL
 #define BIT_RXQ_RXBD_DESA_8821C(x) (((x) & BIT_MASK_RXQ_RXBD_DESA_8821C) << BIT_SHIFT_RXQ_RXBD_DESA_8821C)
-#define BIT_GET_RXQ_RXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_RXQ_RXBD_DESA_8821C) & BIT_MASK_RXQ_RXBD_DESA_8821C)

+#define BIT_GET_RXQ_RXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_RXQ_RXBD_DESA_8821C) & BIT_MASK_RXQ_RXBD_DESA_8821C)
+
 
 
 /* 2 REG_HI0Q_TXBD_DESA_8821C */
@@ -4072,7 +4433,8 @@
 #define BIT_SHIFT_HI0Q_TXBD_DESA_8821C 0
 #define BIT_MASK_HI0Q_TXBD_DESA_8821C 0xffffffffffffffffL
 #define BIT_HI0Q_TXBD_DESA_8821C(x) (((x) & BIT_MASK_HI0Q_TXBD_DESA_8821C) << BIT_SHIFT_HI0Q_TXBD_DESA_8821C)
-#define BIT_GET_HI0Q_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_HI0Q_TXBD_DESA_8821C) & BIT_MASK_HI0Q_TXBD_DESA_8821C)

+#define BIT_GET_HI0Q_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_HI0Q_TXBD_DESA_8821C) & BIT_MASK_HI0Q_TXBD_DESA_8821C)
+
 
 
 /* 2 REG_HI1Q_TXBD_DESA_8821C */
@@ -4080,7 +4442,8 @@
 #define BIT_SHIFT_HI1Q_TXBD_DESA_8821C 0
 #define BIT_MASK_HI1Q_TXBD_DESA_8821C 0xffffffffffffffffL
 #define BIT_HI1Q_TXBD_DESA_8821C(x) (((x) & BIT_MASK_HI1Q_TXBD_DESA_8821C) << BIT_SHIFT_HI1Q_TXBD_DESA_8821C)
-#define BIT_GET_HI1Q_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_HI1Q_TXBD_DESA_8821C) & BIT_MASK_HI1Q_TXBD_DESA_8821C)

+#define BIT_GET_HI1Q_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_HI1Q_TXBD_DESA_8821C) & BIT_MASK_HI1Q_TXBD_DESA_8821C)
+
 
 
 /* 2 REG_HI2Q_TXBD_DESA_8821C */
@@ -4088,7 +4451,8 @@
 #define BIT_SHIFT_HI2Q_TXBD_DESA_8821C 0
 #define BIT_MASK_HI2Q_TXBD_DESA_8821C 0xffffffffffffffffL
 #define BIT_HI2Q_TXBD_DESA_8821C(x) (((x) & BIT_MASK_HI2Q_TXBD_DESA_8821C) << BIT_SHIFT_HI2Q_TXBD_DESA_8821C)
-#define BIT_GET_HI2Q_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_HI2Q_TXBD_DESA_8821C) & BIT_MASK_HI2Q_TXBD_DESA_8821C)

+#define BIT_GET_HI2Q_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_HI2Q_TXBD_DESA_8821C) & BIT_MASK_HI2Q_TXBD_DESA_8821C)
+
 
 
 /* 2 REG_HI3Q_TXBD_DESA_8821C */
@@ -4096,7 +4460,8 @@
 #define BIT_SHIFT_HI3Q_TXBD_DESA_8821C 0
 #define BIT_MASK_HI3Q_TXBD_DESA_8821C 0xffffffffffffffffL
 #define BIT_HI3Q_TXBD_DESA_8821C(x) (((x) & BIT_MASK_HI3Q_TXBD_DESA_8821C) << BIT_SHIFT_HI3Q_TXBD_DESA_8821C)
-#define BIT_GET_HI3Q_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_HI3Q_TXBD_DESA_8821C) & BIT_MASK_HI3Q_TXBD_DESA_8821C)

+#define BIT_GET_HI3Q_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_HI3Q_TXBD_DESA_8821C) & BIT_MASK_HI3Q_TXBD_DESA_8821C)
+
 
 
 /* 2 REG_HI4Q_TXBD_DESA_8821C */
@@ -4104,7 +4469,8 @@
 #define BIT_SHIFT_HI4Q_TXBD_DESA_8821C 0
 #define BIT_MASK_HI4Q_TXBD_DESA_8821C 0xffffffffffffffffL
 #define BIT_HI4Q_TXBD_DESA_8821C(x) (((x) & BIT_MASK_HI4Q_TXBD_DESA_8821C) << BIT_SHIFT_HI4Q_TXBD_DESA_8821C)
-#define BIT_GET_HI4Q_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_HI4Q_TXBD_DESA_8821C) & BIT_MASK_HI4Q_TXBD_DESA_8821C)

+#define BIT_GET_HI4Q_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_HI4Q_TXBD_DESA_8821C) & BIT_MASK_HI4Q_TXBD_DESA_8821C)
+
 
 
 /* 2 REG_HI5Q_TXBD_DESA_8821C */
@@ -4112,7 +4478,8 @@
 #define BIT_SHIFT_HI5Q_TXBD_DESA_8821C 0
 #define BIT_MASK_HI5Q_TXBD_DESA_8821C 0xffffffffffffffffL
 #define BIT_HI5Q_TXBD_DESA_8821C(x) (((x) & BIT_MASK_HI5Q_TXBD_DESA_8821C) << BIT_SHIFT_HI5Q_TXBD_DESA_8821C)
-#define BIT_GET_HI5Q_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_HI5Q_TXBD_DESA_8821C) & BIT_MASK_HI5Q_TXBD_DESA_8821C)

+#define BIT_GET_HI5Q_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_HI5Q_TXBD_DESA_8821C) & BIT_MASK_HI5Q_TXBD_DESA_8821C)
+
 
 
 /* 2 REG_HI6Q_TXBD_DESA_8821C */
@@ -4120,7 +4487,8 @@
 #define BIT_SHIFT_HI6Q_TXBD_DESA_8821C 0
 #define BIT_MASK_HI6Q_TXBD_DESA_8821C 0xffffffffffffffffL
 #define BIT_HI6Q_TXBD_DESA_8821C(x) (((x) & BIT_MASK_HI6Q_TXBD_DESA_8821C) << BIT_SHIFT_HI6Q_TXBD_DESA_8821C)
-#define BIT_GET_HI6Q_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_HI6Q_TXBD_DESA_8821C) & BIT_MASK_HI6Q_TXBD_DESA_8821C)

+#define BIT_GET_HI6Q_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_HI6Q_TXBD_DESA_8821C) & BIT_MASK_HI6Q_TXBD_DESA_8821C)
+
 
 
 /* 2 REG_HI7Q_TXBD_DESA_8821C */
@@ -4128,7 +4496,8 @@
 #define BIT_SHIFT_HI7Q_TXBD_DESA_8821C 0
 #define BIT_MASK_HI7Q_TXBD_DESA_8821C 0xffffffffffffffffL
 #define BIT_HI7Q_TXBD_DESA_8821C(x) (((x) & BIT_MASK_HI7Q_TXBD_DESA_8821C) << BIT_SHIFT_HI7Q_TXBD_DESA_8821C)
-#define BIT_GET_HI7Q_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_HI7Q_TXBD_DESA_8821C) & BIT_MASK_HI7Q_TXBD_DESA_8821C)

+#define BIT_GET_HI7Q_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_HI7Q_TXBD_DESA_8821C) & BIT_MASK_HI7Q_TXBD_DESA_8821C)
+
 
 
 /* 2 REG_MGQ_TXBD_NUM_8821C */
@@ -4137,13 +4506,15 @@
 #define BIT_SHIFT_MGQ_DESC_MODE_8821C 12
 #define BIT_MASK_MGQ_DESC_MODE_8821C 0x3
 #define BIT_MGQ_DESC_MODE_8821C(x) (((x) & BIT_MASK_MGQ_DESC_MODE_8821C) << BIT_SHIFT_MGQ_DESC_MODE_8821C)
-#define BIT_GET_MGQ_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_MGQ_DESC_MODE_8821C) & BIT_MASK_MGQ_DESC_MODE_8821C)

+#define BIT_GET_MGQ_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_MGQ_DESC_MODE_8821C) & BIT_MASK_MGQ_DESC_MODE_8821C)
+
 
 
 #define BIT_SHIFT_MGQ_DESC_NUM_8821C 0
 #define BIT_MASK_MGQ_DESC_NUM_8821C 0xfff
 #define BIT_MGQ_DESC_NUM_8821C(x) (((x) & BIT_MASK_MGQ_DESC_NUM_8821C) << BIT_SHIFT_MGQ_DESC_NUM_8821C)
-#define BIT_GET_MGQ_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_MGQ_DESC_NUM_8821C) & BIT_MASK_MGQ_DESC_NUM_8821C)

+#define BIT_GET_MGQ_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_MGQ_DESC_NUM_8821C) & BIT_MASK_MGQ_DESC_NUM_8821C)
+
 
 
 /* 2 REG_RX_RXBD_NUM_8821C */
@@ -4152,14 +4523,16 @@
 #define BIT_SHIFT_BCNQ_DESC_MODE_8821C 13
 #define BIT_MASK_BCNQ_DESC_MODE_8821C 0x3
 #define BIT_BCNQ_DESC_MODE_8821C(x) (((x) & BIT_MASK_BCNQ_DESC_MODE_8821C) << BIT_SHIFT_BCNQ_DESC_MODE_8821C)
-#define BIT_GET_BCNQ_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_BCNQ_DESC_MODE_8821C) & BIT_MASK_BCNQ_DESC_MODE_8821C)

+#define BIT_GET_BCNQ_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_BCNQ_DESC_MODE_8821C) & BIT_MASK_BCNQ_DESC_MODE_8821C)
+
 
 #define BIT_PCIE_BCNQ_FLAG_8821C BIT(12)
 
 #define BIT_SHIFT_RXQ_DESC_NUM_8821C 0
 #define BIT_MASK_RXQ_DESC_NUM_8821C 0xfff
 #define BIT_RXQ_DESC_NUM_8821C(x) (((x) & BIT_MASK_RXQ_DESC_NUM_8821C) << BIT_SHIFT_RXQ_DESC_NUM_8821C)
-#define BIT_GET_RXQ_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_RXQ_DESC_NUM_8821C) & BIT_MASK_RXQ_DESC_NUM_8821C)

+#define BIT_GET_RXQ_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_RXQ_DESC_NUM_8821C) & BIT_MASK_RXQ_DESC_NUM_8821C)
+
 
 
 /* 2 REG_VOQ_TXBD_NUM_8821C */
@@ -4168,13 +4541,15 @@
 #define BIT_SHIFT_VOQ_DESC_MODE_8821C 12
 #define BIT_MASK_VOQ_DESC_MODE_8821C 0x3
 #define BIT_VOQ_DESC_MODE_8821C(x) (((x) & BIT_MASK_VOQ_DESC_MODE_8821C) << BIT_SHIFT_VOQ_DESC_MODE_8821C)
-#define BIT_GET_VOQ_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_VOQ_DESC_MODE_8821C) & BIT_MASK_VOQ_DESC_MODE_8821C)

+#define BIT_GET_VOQ_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_VOQ_DESC_MODE_8821C) & BIT_MASK_VOQ_DESC_MODE_8821C)
+
 
 
 #define BIT_SHIFT_VOQ_DESC_NUM_8821C 0
 #define BIT_MASK_VOQ_DESC_NUM_8821C 0xfff
 #define BIT_VOQ_DESC_NUM_8821C(x) (((x) & BIT_MASK_VOQ_DESC_NUM_8821C) << BIT_SHIFT_VOQ_DESC_NUM_8821C)
-#define BIT_GET_VOQ_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_VOQ_DESC_NUM_8821C) & BIT_MASK_VOQ_DESC_NUM_8821C)

+#define BIT_GET_VOQ_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_VOQ_DESC_NUM_8821C) & BIT_MASK_VOQ_DESC_NUM_8821C)
+
 
 
 /* 2 REG_VIQ_TXBD_NUM_8821C */
@@ -4183,13 +4558,15 @@
 #define BIT_SHIFT_VIQ_DESC_MODE_8821C 12
 #define BIT_MASK_VIQ_DESC_MODE_8821C 0x3
 #define BIT_VIQ_DESC_MODE_8821C(x) (((x) & BIT_MASK_VIQ_DESC_MODE_8821C) << BIT_SHIFT_VIQ_DESC_MODE_8821C)
-#define BIT_GET_VIQ_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_VIQ_DESC_MODE_8821C) & BIT_MASK_VIQ_DESC_MODE_8821C)

+#define BIT_GET_VIQ_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_VIQ_DESC_MODE_8821C) & BIT_MASK_VIQ_DESC_MODE_8821C)
+
 
 
 #define BIT_SHIFT_VIQ_DESC_NUM_8821C 0
 #define BIT_MASK_VIQ_DESC_NUM_8821C 0xfff
 #define BIT_VIQ_DESC_NUM_8821C(x) (((x) & BIT_MASK_VIQ_DESC_NUM_8821C) << BIT_SHIFT_VIQ_DESC_NUM_8821C)
-#define BIT_GET_VIQ_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_VIQ_DESC_NUM_8821C) & BIT_MASK_VIQ_DESC_NUM_8821C)

+#define BIT_GET_VIQ_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_VIQ_DESC_NUM_8821C) & BIT_MASK_VIQ_DESC_NUM_8821C)
+
 
 
 /* 2 REG_BEQ_TXBD_NUM_8821C */
@@ -4198,13 +4575,15 @@
 #define BIT_SHIFT_BEQ_DESC_MODE_8821C 12
 #define BIT_MASK_BEQ_DESC_MODE_8821C 0x3
 #define BIT_BEQ_DESC_MODE_8821C(x) (((x) & BIT_MASK_BEQ_DESC_MODE_8821C) << BIT_SHIFT_BEQ_DESC_MODE_8821C)
-#define BIT_GET_BEQ_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_BEQ_DESC_MODE_8821C) & BIT_MASK_BEQ_DESC_MODE_8821C)

+#define BIT_GET_BEQ_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_BEQ_DESC_MODE_8821C) & BIT_MASK_BEQ_DESC_MODE_8821C)
+
 
 
 #define BIT_SHIFT_BEQ_DESC_NUM_8821C 0
 #define BIT_MASK_BEQ_DESC_NUM_8821C 0xfff
 #define BIT_BEQ_DESC_NUM_8821C(x) (((x) & BIT_MASK_BEQ_DESC_NUM_8821C) << BIT_SHIFT_BEQ_DESC_NUM_8821C)
-#define BIT_GET_BEQ_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_BEQ_DESC_NUM_8821C) & BIT_MASK_BEQ_DESC_NUM_8821C)

+#define BIT_GET_BEQ_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_BEQ_DESC_NUM_8821C) & BIT_MASK_BEQ_DESC_NUM_8821C)
+
 
 
 /* 2 REG_BKQ_TXBD_NUM_8821C */
@@ -4213,13 +4592,15 @@
 #define BIT_SHIFT_BKQ_DESC_MODE_8821C 12
 #define BIT_MASK_BKQ_DESC_MODE_8821C 0x3
 #define BIT_BKQ_DESC_MODE_8821C(x) (((x) & BIT_MASK_BKQ_DESC_MODE_8821C) << BIT_SHIFT_BKQ_DESC_MODE_8821C)
-#define BIT_GET_BKQ_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_BKQ_DESC_MODE_8821C) & BIT_MASK_BKQ_DESC_MODE_8821C)

+#define BIT_GET_BKQ_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_BKQ_DESC_MODE_8821C) & BIT_MASK_BKQ_DESC_MODE_8821C)
+
 
 
 #define BIT_SHIFT_BKQ_DESC_NUM_8821C 0
 #define BIT_MASK_BKQ_DESC_NUM_8821C 0xfff
 #define BIT_BKQ_DESC_NUM_8821C(x) (((x) & BIT_MASK_BKQ_DESC_NUM_8821C) << BIT_SHIFT_BKQ_DESC_NUM_8821C)
-#define BIT_GET_BKQ_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_BKQ_DESC_NUM_8821C) & BIT_MASK_BKQ_DESC_NUM_8821C)

+#define BIT_GET_BKQ_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_BKQ_DESC_NUM_8821C) & BIT_MASK_BKQ_DESC_NUM_8821C)
+
 
 
 /* 2 REG_HI0Q_TXBD_NUM_8821C */
@@ -4228,13 +4609,15 @@
 #define BIT_SHIFT_HI0Q_DESC_MODE_8821C 12
 #define BIT_MASK_HI0Q_DESC_MODE_8821C 0x3
 #define BIT_HI0Q_DESC_MODE_8821C(x) (((x) & BIT_MASK_HI0Q_DESC_MODE_8821C) << BIT_SHIFT_HI0Q_DESC_MODE_8821C)
-#define BIT_GET_HI0Q_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_HI0Q_DESC_MODE_8821C) & BIT_MASK_HI0Q_DESC_MODE_8821C)

+#define BIT_GET_HI0Q_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_HI0Q_DESC_MODE_8821C) & BIT_MASK_HI0Q_DESC_MODE_8821C)
+
 
 
 #define BIT_SHIFT_HI0Q_DESC_NUM_8821C 0
 #define BIT_MASK_HI0Q_DESC_NUM_8821C 0xfff
 #define BIT_HI0Q_DESC_NUM_8821C(x) (((x) & BIT_MASK_HI0Q_DESC_NUM_8821C) << BIT_SHIFT_HI0Q_DESC_NUM_8821C)
-#define BIT_GET_HI0Q_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_HI0Q_DESC_NUM_8821C) & BIT_MASK_HI0Q_DESC_NUM_8821C)

+#define BIT_GET_HI0Q_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_HI0Q_DESC_NUM_8821C) & BIT_MASK_HI0Q_DESC_NUM_8821C)
+
 
 
 /* 2 REG_HI1Q_TXBD_NUM_8821C */
@@ -4243,13 +4626,15 @@
 #define BIT_SHIFT_HI1Q_DESC_MODE_8821C 12
 #define BIT_MASK_HI1Q_DESC_MODE_8821C 0x3
 #define BIT_HI1Q_DESC_MODE_8821C(x) (((x) & BIT_MASK_HI1Q_DESC_MODE_8821C) << BIT_SHIFT_HI1Q_DESC_MODE_8821C)
-#define BIT_GET_HI1Q_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_HI1Q_DESC_MODE_8821C) & BIT_MASK_HI1Q_DESC_MODE_8821C)

+#define BIT_GET_HI1Q_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_HI1Q_DESC_MODE_8821C) & BIT_MASK_HI1Q_DESC_MODE_8821C)
+
 
 
 #define BIT_SHIFT_HI1Q_DESC_NUM_8821C 0
 #define BIT_MASK_HI1Q_DESC_NUM_8821C 0xfff
 #define BIT_HI1Q_DESC_NUM_8821C(x) (((x) & BIT_MASK_HI1Q_DESC_NUM_8821C) << BIT_SHIFT_HI1Q_DESC_NUM_8821C)
-#define BIT_GET_HI1Q_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_HI1Q_DESC_NUM_8821C) & BIT_MASK_HI1Q_DESC_NUM_8821C)

+#define BIT_GET_HI1Q_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_HI1Q_DESC_NUM_8821C) & BIT_MASK_HI1Q_DESC_NUM_8821C)
+
 
 
 /* 2 REG_HI2Q_TXBD_NUM_8821C */
@@ -4258,13 +4643,15 @@
 #define BIT_SHIFT_HI2Q_DESC_MODE_8821C 12
 #define BIT_MASK_HI2Q_DESC_MODE_8821C 0x3
 #define BIT_HI2Q_DESC_MODE_8821C(x) (((x) & BIT_MASK_HI2Q_DESC_MODE_8821C) << BIT_SHIFT_HI2Q_DESC_MODE_8821C)
-#define BIT_GET_HI2Q_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_HI2Q_DESC_MODE_8821C) & BIT_MASK_HI2Q_DESC_MODE_8821C)

+#define BIT_GET_HI2Q_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_HI2Q_DESC_MODE_8821C) & BIT_MASK_HI2Q_DESC_MODE_8821C)
+
 
 
 #define BIT_SHIFT_HI2Q_DESC_NUM_8821C 0
 #define BIT_MASK_HI2Q_DESC_NUM_8821C 0xfff
 #define BIT_HI2Q_DESC_NUM_8821C(x) (((x) & BIT_MASK_HI2Q_DESC_NUM_8821C) << BIT_SHIFT_HI2Q_DESC_NUM_8821C)
-#define BIT_GET_HI2Q_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_HI2Q_DESC_NUM_8821C) & BIT_MASK_HI2Q_DESC_NUM_8821C)

+#define BIT_GET_HI2Q_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_HI2Q_DESC_NUM_8821C) & BIT_MASK_HI2Q_DESC_NUM_8821C)
+
 
 
 /* 2 REG_HI3Q_TXBD_NUM_8821C */
@@ -4273,13 +4660,15 @@
 #define BIT_SHIFT_HI3Q_DESC_MODE_8821C 12
 #define BIT_MASK_HI3Q_DESC_MODE_8821C 0x3
 #define BIT_HI3Q_DESC_MODE_8821C(x) (((x) & BIT_MASK_HI3Q_DESC_MODE_8821C) << BIT_SHIFT_HI3Q_DESC_MODE_8821C)
-#define BIT_GET_HI3Q_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_HI3Q_DESC_MODE_8821C) & BIT_MASK_HI3Q_DESC_MODE_8821C)

+#define BIT_GET_HI3Q_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_HI3Q_DESC_MODE_8821C) & BIT_MASK_HI3Q_DESC_MODE_8821C)
+
 
 
 #define BIT_SHIFT_HI3Q_DESC_NUM_8821C 0
 #define BIT_MASK_HI3Q_DESC_NUM_8821C 0xfff
 #define BIT_HI3Q_DESC_NUM_8821C(x) (((x) & BIT_MASK_HI3Q_DESC_NUM_8821C) << BIT_SHIFT_HI3Q_DESC_NUM_8821C)
-#define BIT_GET_HI3Q_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_HI3Q_DESC_NUM_8821C) & BIT_MASK_HI3Q_DESC_NUM_8821C)

+#define BIT_GET_HI3Q_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_HI3Q_DESC_NUM_8821C) & BIT_MASK_HI3Q_DESC_NUM_8821C)
+
 
 
 /* 2 REG_HI4Q_TXBD_NUM_8821C */
@@ -4288,13 +4677,15 @@
 #define BIT_SHIFT_HI4Q_DESC_MODE_8821C 12
 #define BIT_MASK_HI4Q_DESC_MODE_8821C 0x3
 #define BIT_HI4Q_DESC_MODE_8821C(x) (((x) & BIT_MASK_HI4Q_DESC_MODE_8821C) << BIT_SHIFT_HI4Q_DESC_MODE_8821C)
-#define BIT_GET_HI4Q_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_HI4Q_DESC_MODE_8821C) & BIT_MASK_HI4Q_DESC_MODE_8821C)

+#define BIT_GET_HI4Q_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_HI4Q_DESC_MODE_8821C) & BIT_MASK_HI4Q_DESC_MODE_8821C)
+
 
 
 #define BIT_SHIFT_HI4Q_DESC_NUM_8821C 0
 #define BIT_MASK_HI4Q_DESC_NUM_8821C 0xfff
 #define BIT_HI4Q_DESC_NUM_8821C(x) (((x) & BIT_MASK_HI4Q_DESC_NUM_8821C) << BIT_SHIFT_HI4Q_DESC_NUM_8821C)
-#define BIT_GET_HI4Q_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_HI4Q_DESC_NUM_8821C) & BIT_MASK_HI4Q_DESC_NUM_8821C)

+#define BIT_GET_HI4Q_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_HI4Q_DESC_NUM_8821C) & BIT_MASK_HI4Q_DESC_NUM_8821C)
+
 
 
 /* 2 REG_HI5Q_TXBD_NUM_8821C */
@@ -4303,13 +4694,15 @@
 #define BIT_SHIFT_HI5Q_DESC_MODE_8821C 12
 #define BIT_MASK_HI5Q_DESC_MODE_8821C 0x3
 #define BIT_HI5Q_DESC_MODE_8821C(x) (((x) & BIT_MASK_HI5Q_DESC_MODE_8821C) << BIT_SHIFT_HI5Q_DESC_MODE_8821C)
-#define BIT_GET_HI5Q_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_HI5Q_DESC_MODE_8821C) & BIT_MASK_HI5Q_DESC_MODE_8821C)

+#define BIT_GET_HI5Q_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_HI5Q_DESC_MODE_8821C) & BIT_MASK_HI5Q_DESC_MODE_8821C)
+
 
 
 #define BIT_SHIFT_HI5Q_DESC_NUM_8821C 0
 #define BIT_MASK_HI5Q_DESC_NUM_8821C 0xfff
 #define BIT_HI5Q_DESC_NUM_8821C(x) (((x) & BIT_MASK_HI5Q_DESC_NUM_8821C) << BIT_SHIFT_HI5Q_DESC_NUM_8821C)
-#define BIT_GET_HI5Q_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_HI5Q_DESC_NUM_8821C) & BIT_MASK_HI5Q_DESC_NUM_8821C)

+#define BIT_GET_HI5Q_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_HI5Q_DESC_NUM_8821C) & BIT_MASK_HI5Q_DESC_NUM_8821C)
+
 
 
 /* 2 REG_HI6Q_TXBD_NUM_8821C */
@@ -4318,13 +4711,15 @@
 #define BIT_SHIFT_HI6Q_DESC_MODE_8821C 12
 #define BIT_MASK_HI6Q_DESC_MODE_8821C 0x3
 #define BIT_HI6Q_DESC_MODE_8821C(x) (((x) & BIT_MASK_HI6Q_DESC_MODE_8821C) << BIT_SHIFT_HI6Q_DESC_MODE_8821C)
-#define BIT_GET_HI6Q_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_HI6Q_DESC_MODE_8821C) & BIT_MASK_HI6Q_DESC_MODE_8821C)

+#define BIT_GET_HI6Q_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_HI6Q_DESC_MODE_8821C) & BIT_MASK_HI6Q_DESC_MODE_8821C)
+
 
 
 #define BIT_SHIFT_HI6Q_DESC_NUM_8821C 0
 #define BIT_MASK_HI6Q_DESC_NUM_8821C 0xfff
 #define BIT_HI6Q_DESC_NUM_8821C(x) (((x) & BIT_MASK_HI6Q_DESC_NUM_8821C) << BIT_SHIFT_HI6Q_DESC_NUM_8821C)
-#define BIT_GET_HI6Q_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_HI6Q_DESC_NUM_8821C) & BIT_MASK_HI6Q_DESC_NUM_8821C)

+#define BIT_GET_HI6Q_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_HI6Q_DESC_NUM_8821C) & BIT_MASK_HI6Q_DESC_NUM_8821C)
+
 
 
 /* 2 REG_HI7Q_TXBD_NUM_8821C */
@@ -4333,13 +4728,15 @@
 #define BIT_SHIFT_HI7Q_DESC_MODE_8821C 12
 #define BIT_MASK_HI7Q_DESC_MODE_8821C 0x3
 #define BIT_HI7Q_DESC_MODE_8821C(x) (((x) & BIT_MASK_HI7Q_DESC_MODE_8821C) << BIT_SHIFT_HI7Q_DESC_MODE_8821C)
-#define BIT_GET_HI7Q_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_HI7Q_DESC_MODE_8821C) & BIT_MASK_HI7Q_DESC_MODE_8821C)

+#define BIT_GET_HI7Q_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_HI7Q_DESC_MODE_8821C) & BIT_MASK_HI7Q_DESC_MODE_8821C)
+
 
 
 #define BIT_SHIFT_HI7Q_DESC_NUM_8821C 0
 #define BIT_MASK_HI7Q_DESC_NUM_8821C 0xfff
 #define BIT_HI7Q_DESC_NUM_8821C(x) (((x) & BIT_MASK_HI7Q_DESC_NUM_8821C) << BIT_SHIFT_HI7Q_DESC_NUM_8821C)
-#define BIT_GET_HI7Q_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_HI7Q_DESC_NUM_8821C) & BIT_MASK_HI7Q_DESC_NUM_8821C)

+#define BIT_GET_HI7Q_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_HI7Q_DESC_NUM_8821C) & BIT_MASK_HI7Q_DESC_NUM_8821C)
+
 
 
 /* 2 REG_TSFTIMER_HCI_8821C */
@@ -4347,13 +4744,15 @@
 #define BIT_SHIFT_TSFT2_HCI_8821C 16
 #define BIT_MASK_TSFT2_HCI_8821C 0xffff
 #define BIT_TSFT2_HCI_8821C(x) (((x) & BIT_MASK_TSFT2_HCI_8821C) << BIT_SHIFT_TSFT2_HCI_8821C)
-#define BIT_GET_TSFT2_HCI_8821C(x) (((x) >> BIT_SHIFT_TSFT2_HCI_8821C) & BIT_MASK_TSFT2_HCI_8821C)

+#define BIT_GET_TSFT2_HCI_8821C(x) (((x) >> BIT_SHIFT_TSFT2_HCI_8821C) & BIT_MASK_TSFT2_HCI_8821C)
+
 
 
 #define BIT_SHIFT_TSFT1_HCI_8821C 0
 #define BIT_MASK_TSFT1_HCI_8821C 0xffff
 #define BIT_TSFT1_HCI_8821C(x) (((x) & BIT_MASK_TSFT1_HCI_8821C) << BIT_SHIFT_TSFT1_HCI_8821C)
-#define BIT_GET_TSFT1_HCI_8821C(x) (((x) >> BIT_SHIFT_TSFT1_HCI_8821C) & BIT_MASK_TSFT1_HCI_8821C)

+#define BIT_GET_TSFT1_HCI_8821C(x) (((x) >> BIT_SHIFT_TSFT1_HCI_8821C) & BIT_MASK_TSFT1_HCI_8821C)
+
 
 
 /* 2 REG_BD_RWPTR_CLR_8821C */
@@ -4391,13 +4790,15 @@
 #define BIT_SHIFT_VOQ_HW_IDX_8821C 16
 #define BIT_MASK_VOQ_HW_IDX_8821C 0xfff
 #define BIT_VOQ_HW_IDX_8821C(x) (((x) & BIT_MASK_VOQ_HW_IDX_8821C) << BIT_SHIFT_VOQ_HW_IDX_8821C)
-#define BIT_GET_VOQ_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_VOQ_HW_IDX_8821C) & BIT_MASK_VOQ_HW_IDX_8821C)

+#define BIT_GET_VOQ_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_VOQ_HW_IDX_8821C) & BIT_MASK_VOQ_HW_IDX_8821C)
+
 
 
 #define BIT_SHIFT_VOQ_HOST_IDX_8821C 0
 #define BIT_MASK_VOQ_HOST_IDX_8821C 0xfff
 #define BIT_VOQ_HOST_IDX_8821C(x) (((x) & BIT_MASK_VOQ_HOST_IDX_8821C) << BIT_SHIFT_VOQ_HOST_IDX_8821C)
-#define BIT_GET_VOQ_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_VOQ_HOST_IDX_8821C) & BIT_MASK_VOQ_HOST_IDX_8821C)

+#define BIT_GET_VOQ_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_VOQ_HOST_IDX_8821C) & BIT_MASK_VOQ_HOST_IDX_8821C)
+
 
 
 /* 2 REG_VIQ_TXBD_IDX_8821C */
@@ -4405,13 +4806,15 @@
 #define BIT_SHIFT_VIQ_HW_IDX_8821C 16
 #define BIT_MASK_VIQ_HW_IDX_8821C 0xfff
 #define BIT_VIQ_HW_IDX_8821C(x) (((x) & BIT_MASK_VIQ_HW_IDX_8821C) << BIT_SHIFT_VIQ_HW_IDX_8821C)
-#define BIT_GET_VIQ_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_VIQ_HW_IDX_8821C) & BIT_MASK_VIQ_HW_IDX_8821C)

+#define BIT_GET_VIQ_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_VIQ_HW_IDX_8821C) & BIT_MASK_VIQ_HW_IDX_8821C)
+
 
 
 #define BIT_SHIFT_VIQ_HOST_IDX_8821C 0
 #define BIT_MASK_VIQ_HOST_IDX_8821C 0xfff
 #define BIT_VIQ_HOST_IDX_8821C(x) (((x) & BIT_MASK_VIQ_HOST_IDX_8821C) << BIT_SHIFT_VIQ_HOST_IDX_8821C)
-#define BIT_GET_VIQ_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_VIQ_HOST_IDX_8821C) & BIT_MASK_VIQ_HOST_IDX_8821C)

+#define BIT_GET_VIQ_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_VIQ_HOST_IDX_8821C) & BIT_MASK_VIQ_HOST_IDX_8821C)
+
 
 
 /* 2 REG_BEQ_TXBD_IDX_8821C */
@@ -4419,13 +4822,15 @@
 #define BIT_SHIFT_BEQ_HW_IDX_8821C 16
 #define BIT_MASK_BEQ_HW_IDX_8821C 0xfff
 #define BIT_BEQ_HW_IDX_8821C(x) (((x) & BIT_MASK_BEQ_HW_IDX_8821C) << BIT_SHIFT_BEQ_HW_IDX_8821C)
-#define BIT_GET_BEQ_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_BEQ_HW_IDX_8821C) & BIT_MASK_BEQ_HW_IDX_8821C)

+#define BIT_GET_BEQ_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_BEQ_HW_IDX_8821C) & BIT_MASK_BEQ_HW_IDX_8821C)
+
 
 
 #define BIT_SHIFT_BEQ_HOST_IDX_8821C 0
 #define BIT_MASK_BEQ_HOST_IDX_8821C 0xfff
 #define BIT_BEQ_HOST_IDX_8821C(x) (((x) & BIT_MASK_BEQ_HOST_IDX_8821C) << BIT_SHIFT_BEQ_HOST_IDX_8821C)
-#define BIT_GET_BEQ_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_BEQ_HOST_IDX_8821C) & BIT_MASK_BEQ_HOST_IDX_8821C)

+#define BIT_GET_BEQ_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_BEQ_HOST_IDX_8821C) & BIT_MASK_BEQ_HOST_IDX_8821C)
+
 
 
 /* 2 REG_BKQ_TXBD_IDX_8821C */
@@ -4433,13 +4838,15 @@
 #define BIT_SHIFT_BKQ_HW_IDX_8821C 16
 #define BIT_MASK_BKQ_HW_IDX_8821C 0xfff
 #define BIT_BKQ_HW_IDX_8821C(x) (((x) & BIT_MASK_BKQ_HW_IDX_8821C) << BIT_SHIFT_BKQ_HW_IDX_8821C)
-#define BIT_GET_BKQ_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_BKQ_HW_IDX_8821C) & BIT_MASK_BKQ_HW_IDX_8821C)

+#define BIT_GET_BKQ_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_BKQ_HW_IDX_8821C) & BIT_MASK_BKQ_HW_IDX_8821C)
+
 
 
 #define BIT_SHIFT_BKQ_HOST_IDX_8821C 0
 #define BIT_MASK_BKQ_HOST_IDX_8821C 0xfff
 #define BIT_BKQ_HOST_IDX_8821C(x) (((x) & BIT_MASK_BKQ_HOST_IDX_8821C) << BIT_SHIFT_BKQ_HOST_IDX_8821C)
-#define BIT_GET_BKQ_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_BKQ_HOST_IDX_8821C) & BIT_MASK_BKQ_HOST_IDX_8821C)

+#define BIT_GET_BKQ_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_BKQ_HOST_IDX_8821C) & BIT_MASK_BKQ_HOST_IDX_8821C)
+
 
 
 /* 2 REG_MGQ_TXBD_IDX_8821C */
@@ -4447,13 +4854,15 @@
 #define BIT_SHIFT_MGQ_HW_IDX_8821C 16
 #define BIT_MASK_MGQ_HW_IDX_8821C 0xfff
 #define BIT_MGQ_HW_IDX_8821C(x) (((x) & BIT_MASK_MGQ_HW_IDX_8821C) << BIT_SHIFT_MGQ_HW_IDX_8821C)
-#define BIT_GET_MGQ_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_MGQ_HW_IDX_8821C) & BIT_MASK_MGQ_HW_IDX_8821C)

+#define BIT_GET_MGQ_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_MGQ_HW_IDX_8821C) & BIT_MASK_MGQ_HW_IDX_8821C)
+
 
 
 #define BIT_SHIFT_MGQ_HOST_IDX_8821C 0
 #define BIT_MASK_MGQ_HOST_IDX_8821C 0xfff
 #define BIT_MGQ_HOST_IDX_8821C(x) (((x) & BIT_MASK_MGQ_HOST_IDX_8821C) << BIT_SHIFT_MGQ_HOST_IDX_8821C)
-#define BIT_GET_MGQ_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_MGQ_HOST_IDX_8821C) & BIT_MASK_MGQ_HOST_IDX_8821C)

+#define BIT_GET_MGQ_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_MGQ_HOST_IDX_8821C) & BIT_MASK_MGQ_HOST_IDX_8821C)
+
 
 
 /* 2 REG_RXQ_RXBD_IDX_8821C */
@@ -4461,13 +4870,15 @@
 #define BIT_SHIFT_RXQ_HW_IDX_8821C 16
 #define BIT_MASK_RXQ_HW_IDX_8821C 0xfff
 #define BIT_RXQ_HW_IDX_8821C(x) (((x) & BIT_MASK_RXQ_HW_IDX_8821C) << BIT_SHIFT_RXQ_HW_IDX_8821C)
-#define BIT_GET_RXQ_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_RXQ_HW_IDX_8821C) & BIT_MASK_RXQ_HW_IDX_8821C)

+#define BIT_GET_RXQ_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_RXQ_HW_IDX_8821C) & BIT_MASK_RXQ_HW_IDX_8821C)
+
 
 
 #define BIT_SHIFT_RXQ_HOST_IDX_8821C 0
 #define BIT_MASK_RXQ_HOST_IDX_8821C 0xfff
 #define BIT_RXQ_HOST_IDX_8821C(x) (((x) & BIT_MASK_RXQ_HOST_IDX_8821C) << BIT_SHIFT_RXQ_HOST_IDX_8821C)
-#define BIT_GET_RXQ_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_RXQ_HOST_IDX_8821C) & BIT_MASK_RXQ_HOST_IDX_8821C)

+#define BIT_GET_RXQ_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_RXQ_HOST_IDX_8821C) & BIT_MASK_RXQ_HOST_IDX_8821C)
+
 
 
 /* 2 REG_HI0Q_TXBD_IDX_8821C */
@@ -4475,13 +4886,15 @@
 #define BIT_SHIFT_HI0Q_HW_IDX_8821C 16
 #define BIT_MASK_HI0Q_HW_IDX_8821C 0xfff
 #define BIT_HI0Q_HW_IDX_8821C(x) (((x) & BIT_MASK_HI0Q_HW_IDX_8821C) << BIT_SHIFT_HI0Q_HW_IDX_8821C)
-#define BIT_GET_HI0Q_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_HI0Q_HW_IDX_8821C) & BIT_MASK_HI0Q_HW_IDX_8821C)

+#define BIT_GET_HI0Q_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_HI0Q_HW_IDX_8821C) & BIT_MASK_HI0Q_HW_IDX_8821C)
+
 
 
 #define BIT_SHIFT_HI0Q_HOST_IDX_8821C 0
 #define BIT_MASK_HI0Q_HOST_IDX_8821C 0xfff
 #define BIT_HI0Q_HOST_IDX_8821C(x) (((x) & BIT_MASK_HI0Q_HOST_IDX_8821C) << BIT_SHIFT_HI0Q_HOST_IDX_8821C)
-#define BIT_GET_HI0Q_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_HI0Q_HOST_IDX_8821C) & BIT_MASK_HI0Q_HOST_IDX_8821C)

+#define BIT_GET_HI0Q_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_HI0Q_HOST_IDX_8821C) & BIT_MASK_HI0Q_HOST_IDX_8821C)
+
 
 
 /* 2 REG_HI1Q_TXBD_IDX_8821C */
@@ -4489,13 +4902,15 @@
 #define BIT_SHIFT_HI1Q_HW_IDX_8821C 16
 #define BIT_MASK_HI1Q_HW_IDX_8821C 0xfff
 #define BIT_HI1Q_HW_IDX_8821C(x) (((x) & BIT_MASK_HI1Q_HW_IDX_8821C) << BIT_SHIFT_HI1Q_HW_IDX_8821C)
-#define BIT_GET_HI1Q_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_HI1Q_HW_IDX_8821C) & BIT_MASK_HI1Q_HW_IDX_8821C)

+#define BIT_GET_HI1Q_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_HI1Q_HW_IDX_8821C) & BIT_MASK_HI1Q_HW_IDX_8821C)
+
 
 
 #define BIT_SHIFT_HI1Q_HOST_IDX_8821C 0
 #define BIT_MASK_HI1Q_HOST_IDX_8821C 0xfff
 #define BIT_HI1Q_HOST_IDX_8821C(x) (((x) & BIT_MASK_HI1Q_HOST_IDX_8821C) << BIT_SHIFT_HI1Q_HOST_IDX_8821C)
-#define BIT_GET_HI1Q_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_HI1Q_HOST_IDX_8821C) & BIT_MASK_HI1Q_HOST_IDX_8821C)

+#define BIT_GET_HI1Q_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_HI1Q_HOST_IDX_8821C) & BIT_MASK_HI1Q_HOST_IDX_8821C)
+
 
 
 /* 2 REG_HI2Q_TXBD_IDX_8821C */
@@ -4503,13 +4918,15 @@
 #define BIT_SHIFT_HI2Q_HW_IDX_8821C 16
 #define BIT_MASK_HI2Q_HW_IDX_8821C 0xfff
 #define BIT_HI2Q_HW_IDX_8821C(x) (((x) & BIT_MASK_HI2Q_HW_IDX_8821C) << BIT_SHIFT_HI2Q_HW_IDX_8821C)
-#define BIT_GET_HI2Q_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_HI2Q_HW_IDX_8821C) & BIT_MASK_HI2Q_HW_IDX_8821C)

+#define BIT_GET_HI2Q_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_HI2Q_HW_IDX_8821C) & BIT_MASK_HI2Q_HW_IDX_8821C)
+
 
 
 #define BIT_SHIFT_HI2Q_HOST_IDX_8821C 0
 #define BIT_MASK_HI2Q_HOST_IDX_8821C 0xfff
 #define BIT_HI2Q_HOST_IDX_8821C(x) (((x) & BIT_MASK_HI2Q_HOST_IDX_8821C) << BIT_SHIFT_HI2Q_HOST_IDX_8821C)
-#define BIT_GET_HI2Q_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_HI2Q_HOST_IDX_8821C) & BIT_MASK_HI2Q_HOST_IDX_8821C)

+#define BIT_GET_HI2Q_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_HI2Q_HOST_IDX_8821C) & BIT_MASK_HI2Q_HOST_IDX_8821C)
+
 
 
 /* 2 REG_HI3Q_TXBD_IDX_8821C */
@@ -4517,13 +4934,15 @@
 #define BIT_SHIFT_HI3Q_HW_IDX_8821C 16
 #define BIT_MASK_HI3Q_HW_IDX_8821C 0xfff
 #define BIT_HI3Q_HW_IDX_8821C(x) (((x) & BIT_MASK_HI3Q_HW_IDX_8821C) << BIT_SHIFT_HI3Q_HW_IDX_8821C)
-#define BIT_GET_HI3Q_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_HI3Q_HW_IDX_8821C) & BIT_MASK_HI3Q_HW_IDX_8821C)

+#define BIT_GET_HI3Q_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_HI3Q_HW_IDX_8821C) & BIT_MASK_HI3Q_HW_IDX_8821C)
+
 
 
 #define BIT_SHIFT_HI3Q_HOST_IDX_8821C 0
 #define BIT_MASK_HI3Q_HOST_IDX_8821C 0xfff
 #define BIT_HI3Q_HOST_IDX_8821C(x) (((x) & BIT_MASK_HI3Q_HOST_IDX_8821C) << BIT_SHIFT_HI3Q_HOST_IDX_8821C)
-#define BIT_GET_HI3Q_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_HI3Q_HOST_IDX_8821C) & BIT_MASK_HI3Q_HOST_IDX_8821C)

+#define BIT_GET_HI3Q_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_HI3Q_HOST_IDX_8821C) & BIT_MASK_HI3Q_HOST_IDX_8821C)
+
 
 
 /* 2 REG_HI4Q_TXBD_IDX_8821C */
@@ -4531,13 +4950,15 @@
 #define BIT_SHIFT_HI4Q_HW_IDX_8821C 16
 #define BIT_MASK_HI4Q_HW_IDX_8821C 0xfff
 #define BIT_HI4Q_HW_IDX_8821C(x) (((x) & BIT_MASK_HI4Q_HW_IDX_8821C) << BIT_SHIFT_HI4Q_HW_IDX_8821C)
-#define BIT_GET_HI4Q_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_HI4Q_HW_IDX_8821C) & BIT_MASK_HI4Q_HW_IDX_8821C)

+#define BIT_GET_HI4Q_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_HI4Q_HW_IDX_8821C) & BIT_MASK_HI4Q_HW_IDX_8821C)
+
 
 
 #define BIT_SHIFT_HI4Q_HOST_IDX_8821C 0
 #define BIT_MASK_HI4Q_HOST_IDX_8821C 0xfff
 #define BIT_HI4Q_HOST_IDX_8821C(x) (((x) & BIT_MASK_HI4Q_HOST_IDX_8821C) << BIT_SHIFT_HI4Q_HOST_IDX_8821C)
-#define BIT_GET_HI4Q_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_HI4Q_HOST_IDX_8821C) & BIT_MASK_HI4Q_HOST_IDX_8821C)

+#define BIT_GET_HI4Q_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_HI4Q_HOST_IDX_8821C) & BIT_MASK_HI4Q_HOST_IDX_8821C)
+
 
 
 /* 2 REG_HI5Q_TXBD_IDX_8821C */
@@ -4545,13 +4966,15 @@
 #define BIT_SHIFT_HI5Q_HW_IDX_8821C 16
 #define BIT_MASK_HI5Q_HW_IDX_8821C 0xfff
 #define BIT_HI5Q_HW_IDX_8821C(x) (((x) & BIT_MASK_HI5Q_HW_IDX_8821C) << BIT_SHIFT_HI5Q_HW_IDX_8821C)
-#define BIT_GET_HI5Q_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_HI5Q_HW_IDX_8821C) & BIT_MASK_HI5Q_HW_IDX_8821C)

+#define BIT_GET_HI5Q_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_HI5Q_HW_IDX_8821C) & BIT_MASK_HI5Q_HW_IDX_8821C)
+
 
 
 #define BIT_SHIFT_HI5Q_HOST_IDX_8821C 0
 #define BIT_MASK_HI5Q_HOST_IDX_8821C 0xfff
 #define BIT_HI5Q_HOST_IDX_8821C(x) (((x) & BIT_MASK_HI5Q_HOST_IDX_8821C) << BIT_SHIFT_HI5Q_HOST_IDX_8821C)
-#define BIT_GET_HI5Q_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_HI5Q_HOST_IDX_8821C) & BIT_MASK_HI5Q_HOST_IDX_8821C)

+#define BIT_GET_HI5Q_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_HI5Q_HOST_IDX_8821C) & BIT_MASK_HI5Q_HOST_IDX_8821C)
+
 
 
 /* 2 REG_HI6Q_TXBD_IDX_8821C */
@@ -4559,13 +4982,15 @@
 #define BIT_SHIFT_HI6Q_HW_IDX_8821C 16
 #define BIT_MASK_HI6Q_HW_IDX_8821C 0xfff
 #define BIT_HI6Q_HW_IDX_8821C(x) (((x) & BIT_MASK_HI6Q_HW_IDX_8821C) << BIT_SHIFT_HI6Q_HW_IDX_8821C)
-#define BIT_GET_HI6Q_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_HI6Q_HW_IDX_8821C) & BIT_MASK_HI6Q_HW_IDX_8821C)

+#define BIT_GET_HI6Q_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_HI6Q_HW_IDX_8821C) & BIT_MASK_HI6Q_HW_IDX_8821C)
+
 
 
 #define BIT_SHIFT_HI6Q_HOST_IDX_8821C 0
 #define BIT_MASK_HI6Q_HOST_IDX_8821C 0xfff
 #define BIT_HI6Q_HOST_IDX_8821C(x) (((x) & BIT_MASK_HI6Q_HOST_IDX_8821C) << BIT_SHIFT_HI6Q_HOST_IDX_8821C)
-#define BIT_GET_HI6Q_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_HI6Q_HOST_IDX_8821C) & BIT_MASK_HI6Q_HOST_IDX_8821C)

+#define BIT_GET_HI6Q_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_HI6Q_HOST_IDX_8821C) & BIT_MASK_HI6Q_HOST_IDX_8821C)
+
 
 
 /* 2 REG_HI7Q_TXBD_IDX_8821C */
@@ -4573,13 +4998,15 @@
 #define BIT_SHIFT_HI7Q_HW_IDX_8821C 16
 #define BIT_MASK_HI7Q_HW_IDX_8821C 0xfff
 #define BIT_HI7Q_HW_IDX_8821C(x) (((x) & BIT_MASK_HI7Q_HW_IDX_8821C) << BIT_SHIFT_HI7Q_HW_IDX_8821C)
-#define BIT_GET_HI7Q_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_HI7Q_HW_IDX_8821C) & BIT_MASK_HI7Q_HW_IDX_8821C)

+#define BIT_GET_HI7Q_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_HI7Q_HW_IDX_8821C) & BIT_MASK_HI7Q_HW_IDX_8821C)
+
 
 
 #define BIT_SHIFT_HI7Q_HOST_IDX_8821C 0
 #define BIT_MASK_HI7Q_HOST_IDX_8821C 0xfff
 #define BIT_HI7Q_HOST_IDX_8821C(x) (((x) & BIT_MASK_HI7Q_HOST_IDX_8821C) << BIT_SHIFT_HI7Q_HOST_IDX_8821C)
-#define BIT_GET_HI7Q_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_HI7Q_HOST_IDX_8821C) & BIT_MASK_HI7Q_HOST_IDX_8821C)

+#define BIT_GET_HI7Q_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_HI7Q_HOST_IDX_8821C) & BIT_MASK_HI7Q_HOST_IDX_8821C)
+
 
 
 /* 2 REG_DBG_SEL_V1_8821C */
@@ -4587,7 +5014,8 @@
 #define BIT_SHIFT_DBG_SEL_8821C 0
 #define BIT_MASK_DBG_SEL_8821C 0xff
 #define BIT_DBG_SEL_8821C(x) (((x) & BIT_MASK_DBG_SEL_8821C) << BIT_SHIFT_DBG_SEL_8821C)
-#define BIT_GET_DBG_SEL_8821C(x) (((x) >> BIT_SHIFT_DBG_SEL_8821C) & BIT_MASK_DBG_SEL_8821C)

+#define BIT_GET_DBG_SEL_8821C(x) (((x) >> BIT_SHIFT_DBG_SEL_8821C) & BIT_MASK_DBG_SEL_8821C)
+
 
 
 /* 2 REG_PCIE_HRPWM1_V1_8821C */
@@ -4595,7 +5023,8 @@
 #define BIT_SHIFT_PCIE_HRPWM_8821C 0
 #define BIT_MASK_PCIE_HRPWM_8821C 0xff
 #define BIT_PCIE_HRPWM_8821C(x) (((x) & BIT_MASK_PCIE_HRPWM_8821C) << BIT_SHIFT_PCIE_HRPWM_8821C)
-#define BIT_GET_PCIE_HRPWM_8821C(x) (((x) >> BIT_SHIFT_PCIE_HRPWM_8821C) & BIT_MASK_PCIE_HRPWM_8821C)

+#define BIT_GET_PCIE_HRPWM_8821C(x) (((x) >> BIT_SHIFT_PCIE_HRPWM_8821C) & BIT_MASK_PCIE_HRPWM_8821C)
+
 
 
 /* 2 REG_PCIE_HCPWM1_V1_8821C */
@@ -4603,7 +5032,8 @@
 #define BIT_SHIFT_PCIE_HCPWM_8821C 0
 #define BIT_MASK_PCIE_HCPWM_8821C 0xff
 #define BIT_PCIE_HCPWM_8821C(x) (((x) & BIT_MASK_PCIE_HCPWM_8821C) << BIT_SHIFT_PCIE_HCPWM_8821C)
-#define BIT_GET_PCIE_HCPWM_8821C(x) (((x) >> BIT_SHIFT_PCIE_HCPWM_8821C) & BIT_MASK_PCIE_HCPWM_8821C)

+#define BIT_GET_PCIE_HCPWM_8821C(x) (((x) >> BIT_SHIFT_PCIE_HCPWM_8821C) & BIT_MASK_PCIE_HCPWM_8821C)
+
 
 
 /* 2 REG_PCIE_CTRL2_8821C */
@@ -4613,7 +5043,8 @@
 #define BIT_SHIFT_HPS_CLKR_PCIE_8821C 4
 #define BIT_MASK_HPS_CLKR_PCIE_8821C 0x3
 #define BIT_HPS_CLKR_PCIE_8821C(x) (((x) & BIT_MASK_HPS_CLKR_PCIE_8821C) << BIT_SHIFT_HPS_CLKR_PCIE_8821C)
-#define BIT_GET_HPS_CLKR_PCIE_8821C(x) (((x) >> BIT_SHIFT_HPS_CLKR_PCIE_8821C) & BIT_MASK_HPS_CLKR_PCIE_8821C)

+#define BIT_GET_HPS_CLKR_PCIE_8821C(x) (((x) >> BIT_SHIFT_HPS_CLKR_PCIE_8821C) & BIT_MASK_HPS_CLKR_PCIE_8821C)
+
 
 #define BIT_PCIE_INT_8821C BIT(3)
 #define BIT_TXFLAG_EXIT_L1_EN_8821C BIT(2)
@@ -4625,7 +5056,8 @@
 #define BIT_SHIFT_PCIE_HRPWM2_8821C 0
 #define BIT_MASK_PCIE_HRPWM2_8821C 0xffff
 #define BIT_PCIE_HRPWM2_8821C(x) (((x) & BIT_MASK_PCIE_HRPWM2_8821C) << BIT_SHIFT_PCIE_HRPWM2_8821C)
-#define BIT_GET_PCIE_HRPWM2_8821C(x) (((x) >> BIT_SHIFT_PCIE_HRPWM2_8821C) & BIT_MASK_PCIE_HRPWM2_8821C)

+#define BIT_GET_PCIE_HRPWM2_8821C(x) (((x) >> BIT_SHIFT_PCIE_HRPWM2_8821C) & BIT_MASK_PCIE_HRPWM2_8821C)
+
 
 
 /* 2 REG_PCIE_HCPWM2_V1_8821C */
@@ -4633,7 +5065,8 @@
 #define BIT_SHIFT_PCIE_HCPWM2_8821C 0
 #define BIT_MASK_PCIE_HCPWM2_8821C 0xffff
 #define BIT_PCIE_HCPWM2_8821C(x) (((x) & BIT_MASK_PCIE_HCPWM2_8821C) << BIT_SHIFT_PCIE_HCPWM2_8821C)
-#define BIT_GET_PCIE_HCPWM2_8821C(x) (((x) >> BIT_SHIFT_PCIE_HCPWM2_8821C) & BIT_MASK_PCIE_HCPWM2_8821C)

+#define BIT_GET_PCIE_HCPWM2_8821C(x) (((x) >> BIT_SHIFT_PCIE_HCPWM2_8821C) & BIT_MASK_PCIE_HCPWM2_8821C)
+
 
 
 /* 2 REG_PCIE_H2C_MSG_V1_8821C */
@@ -4641,7 +5074,8 @@
 #define BIT_SHIFT_DRV2FW_INFO_8821C 0
 #define BIT_MASK_DRV2FW_INFO_8821C 0xffffffffL
 #define BIT_DRV2FW_INFO_8821C(x) (((x) & BIT_MASK_DRV2FW_INFO_8821C) << BIT_SHIFT_DRV2FW_INFO_8821C)
-#define BIT_GET_DRV2FW_INFO_8821C(x) (((x) >> BIT_SHIFT_DRV2FW_INFO_8821C) & BIT_MASK_DRV2FW_INFO_8821C)

+#define BIT_GET_DRV2FW_INFO_8821C(x) (((x) >> BIT_SHIFT_DRV2FW_INFO_8821C) & BIT_MASK_DRV2FW_INFO_8821C)
+
 
 
 /* 2 REG_PCIE_C2H_MSG_V1_8821C */
@@ -4649,7 +5083,8 @@
 #define BIT_SHIFT_HCI_PCIE_C2H_MSG_8821C 0
 #define BIT_MASK_HCI_PCIE_C2H_MSG_8821C 0xffffffffL
 #define BIT_HCI_PCIE_C2H_MSG_8821C(x) (((x) & BIT_MASK_HCI_PCIE_C2H_MSG_8821C) << BIT_SHIFT_HCI_PCIE_C2H_MSG_8821C)
-#define BIT_GET_HCI_PCIE_C2H_MSG_8821C(x) (((x) >> BIT_SHIFT_HCI_PCIE_C2H_MSG_8821C) & BIT_MASK_HCI_PCIE_C2H_MSG_8821C)

+#define BIT_GET_HCI_PCIE_C2H_MSG_8821C(x) (((x) >> BIT_SHIFT_HCI_PCIE_C2H_MSG_8821C) & BIT_MASK_HCI_PCIE_C2H_MSG_8821C)
+
 
 
 /* 2 REG_DBI_WDATA_V1_8821C */
@@ -4657,7 +5092,8 @@
 #define BIT_SHIFT_DBI_WDATA_8821C 0
 #define BIT_MASK_DBI_WDATA_8821C 0xffffffffL
 #define BIT_DBI_WDATA_8821C(x) (((x) & BIT_MASK_DBI_WDATA_8821C) << BIT_SHIFT_DBI_WDATA_8821C)
-#define BIT_GET_DBI_WDATA_8821C(x) (((x) >> BIT_SHIFT_DBI_WDATA_8821C) & BIT_MASK_DBI_WDATA_8821C)

+#define BIT_GET_DBI_WDATA_8821C(x) (((x) >> BIT_SHIFT_DBI_WDATA_8821C) & BIT_MASK_DBI_WDATA_8821C)
+
 
 
 /* 2 REG_DBI_RDATA_V1_8821C */
@@ -4665,7 +5101,8 @@
 #define BIT_SHIFT_DBI_RDATA_8821C 0
 #define BIT_MASK_DBI_RDATA_8821C 0xffffffffL
 #define BIT_DBI_RDATA_8821C(x) (((x) & BIT_MASK_DBI_RDATA_8821C) << BIT_SHIFT_DBI_RDATA_8821C)
-#define BIT_GET_DBI_RDATA_8821C(x) (((x) >> BIT_SHIFT_DBI_RDATA_8821C) & BIT_MASK_DBI_RDATA_8821C)

+#define BIT_GET_DBI_RDATA_8821C(x) (((x) >> BIT_SHIFT_DBI_RDATA_8821C) & BIT_MASK_DBI_RDATA_8821C)
+
 
 
 /* 2 REG_DBI_FLAG_V1_8821C */
@@ -4678,13 +5115,15 @@
 #define BIT_SHIFT_DBI_WREN_8821C 12
 #define BIT_MASK_DBI_WREN_8821C 0xf
 #define BIT_DBI_WREN_8821C(x) (((x) & BIT_MASK_DBI_WREN_8821C) << BIT_SHIFT_DBI_WREN_8821C)
-#define BIT_GET_DBI_WREN_8821C(x) (((x) >> BIT_SHIFT_DBI_WREN_8821C) & BIT_MASK_DBI_WREN_8821C)

+#define BIT_GET_DBI_WREN_8821C(x) (((x) >> BIT_SHIFT_DBI_WREN_8821C) & BIT_MASK_DBI_WREN_8821C)
+
 
 
 #define BIT_SHIFT_DBI_ADDR_8821C 0
 #define BIT_MASK_DBI_ADDR_8821C 0xfff
 #define BIT_DBI_ADDR_8821C(x) (((x) & BIT_MASK_DBI_ADDR_8821C) << BIT_SHIFT_DBI_ADDR_8821C)
-#define BIT_GET_DBI_ADDR_8821C(x) (((x) >> BIT_SHIFT_DBI_ADDR_8821C) & BIT_MASK_DBI_ADDR_8821C)

+#define BIT_GET_DBI_ADDR_8821C(x) (((x) >> BIT_SHIFT_DBI_ADDR_8821C) & BIT_MASK_DBI_ADDR_8821C)
+
 
 
 /* 2 REG_MDIO_V1_8821C */
@@ -4692,13 +5131,15 @@
 #define BIT_SHIFT_MDIO_RDATA_8821C 16
 #define BIT_MASK_MDIO_RDATA_8821C 0xffff
 #define BIT_MDIO_RDATA_8821C(x) (((x) & BIT_MASK_MDIO_RDATA_8821C) << BIT_SHIFT_MDIO_RDATA_8821C)
-#define BIT_GET_MDIO_RDATA_8821C(x) (((x) >> BIT_SHIFT_MDIO_RDATA_8821C) & BIT_MASK_MDIO_RDATA_8821C)

+#define BIT_GET_MDIO_RDATA_8821C(x) (((x) >> BIT_SHIFT_MDIO_RDATA_8821C) & BIT_MASK_MDIO_RDATA_8821C)
+
 
 
 #define BIT_SHIFT_MDIO_WDATA_8821C 0
 #define BIT_MASK_MDIO_WDATA_8821C 0xffff
 #define BIT_MDIO_WDATA_8821C(x) (((x) & BIT_MASK_MDIO_WDATA_8821C) << BIT_SHIFT_MDIO_WDATA_8821C)
-#define BIT_GET_MDIO_WDATA_8821C(x) (((x) >> BIT_SHIFT_MDIO_WDATA_8821C) & BIT_MASK_MDIO_WDATA_8821C)

+#define BIT_GET_MDIO_WDATA_8821C(x) (((x) >> BIT_SHIFT_MDIO_WDATA_8821C) & BIT_MASK_MDIO_WDATA_8821C)
+
 
 
 /* 2 REG_PCIE_MIX_CFG_8821C */
@@ -4706,13 +5147,15 @@
 #define BIT_SHIFT_MDIO_PHY_ADDR_8821C 24
 #define BIT_MASK_MDIO_PHY_ADDR_8821C 0x1f
 #define BIT_MDIO_PHY_ADDR_8821C(x) (((x) & BIT_MASK_MDIO_PHY_ADDR_8821C) << BIT_SHIFT_MDIO_PHY_ADDR_8821C)
-#define BIT_GET_MDIO_PHY_ADDR_8821C(x) (((x) >> BIT_SHIFT_MDIO_PHY_ADDR_8821C) & BIT_MASK_MDIO_PHY_ADDR_8821C)

+#define BIT_GET_MDIO_PHY_ADDR_8821C(x) (((x) >> BIT_SHIFT_MDIO_PHY_ADDR_8821C) & BIT_MASK_MDIO_PHY_ADDR_8821C)
+
 
 
 #define BIT_SHIFT_WATCH_DOG_RECORD_V1_8821C 10
 #define BIT_MASK_WATCH_DOG_RECORD_V1_8821C 0x3fff
 #define BIT_WATCH_DOG_RECORD_V1_8821C(x) (((x) & BIT_MASK_WATCH_DOG_RECORD_V1_8821C) << BIT_SHIFT_WATCH_DOG_RECORD_V1_8821C)
-#define BIT_GET_WATCH_DOG_RECORD_V1_8821C(x) (((x) >> BIT_SHIFT_WATCH_DOG_RECORD_V1_8821C) & BIT_MASK_WATCH_DOG_RECORD_V1_8821C)

+#define BIT_GET_WATCH_DOG_RECORD_V1_8821C(x) (((x) >> BIT_SHIFT_WATCH_DOG_RECORD_V1_8821C) & BIT_MASK_WATCH_DOG_RECORD_V1_8821C)
+
 
 #define BIT_R_IO_TIMEOUT_FLAG_V1_8821C BIT(9)
 #define BIT_EN_WATCH_DOG_8821C BIT(8)
@@ -4723,7 +5166,8 @@
 #define BIT_SHIFT_MDIO_REG_ADDR_V1_8821C 0
 #define BIT_MASK_MDIO_REG_ADDR_V1_8821C 0x1f
 #define BIT_MDIO_REG_ADDR_V1_8821C(x) (((x) & BIT_MASK_MDIO_REG_ADDR_V1_8821C) << BIT_SHIFT_MDIO_REG_ADDR_V1_8821C)
-#define BIT_GET_MDIO_REG_ADDR_V1_8821C(x) (((x) >> BIT_SHIFT_MDIO_REG_ADDR_V1_8821C) & BIT_MASK_MDIO_REG_ADDR_V1_8821C)

+#define BIT_GET_MDIO_REG_ADDR_V1_8821C(x) (((x) >> BIT_SHIFT_MDIO_REG_ADDR_V1_8821C) & BIT_MASK_MDIO_REG_ADDR_V1_8821C)
+
 
 
 /* 2 REG_HCI_MIX_CFG_8821C */
@@ -4732,20 +5176,23 @@
 #define BIT_SHIFT_TXDMA_ERR_FLAG_8821C 16
 #define BIT_MASK_TXDMA_ERR_FLAG_8821C 0xf
 #define BIT_TXDMA_ERR_FLAG_8821C(x) (((x) & BIT_MASK_TXDMA_ERR_FLAG_8821C) << BIT_SHIFT_TXDMA_ERR_FLAG_8821C)
-#define BIT_GET_TXDMA_ERR_FLAG_8821C(x) (((x) >> BIT_SHIFT_TXDMA_ERR_FLAG_8821C) & BIT_MASK_TXDMA_ERR_FLAG_8821C)

+#define BIT_GET_TXDMA_ERR_FLAG_8821C(x) (((x) >> BIT_SHIFT_TXDMA_ERR_FLAG_8821C) & BIT_MASK_TXDMA_ERR_FLAG_8821C)
+
 
 
 #define BIT_SHIFT_EARLY_MODE_SEL_8821C 12
 #define BIT_MASK_EARLY_MODE_SEL_8821C 0xf
 #define BIT_EARLY_MODE_SEL_8821C(x) (((x) & BIT_MASK_EARLY_MODE_SEL_8821C) << BIT_SHIFT_EARLY_MODE_SEL_8821C)
-#define BIT_GET_EARLY_MODE_SEL_8821C(x) (((x) >> BIT_SHIFT_EARLY_MODE_SEL_8821C) & BIT_MASK_EARLY_MODE_SEL_8821C)

+#define BIT_GET_EARLY_MODE_SEL_8821C(x) (((x) >> BIT_SHIFT_EARLY_MODE_SEL_8821C) & BIT_MASK_EARLY_MODE_SEL_8821C)
+
 
 #define BIT_EPHY_RX50_EN_8821C BIT(11)
 
 #define BIT_SHIFT_MSI_TIMEOUT_ID_V1_8821C 8
 #define BIT_MASK_MSI_TIMEOUT_ID_V1_8821C 0x7
 #define BIT_MSI_TIMEOUT_ID_V1_8821C(x) (((x) & BIT_MASK_MSI_TIMEOUT_ID_V1_8821C) << BIT_SHIFT_MSI_TIMEOUT_ID_V1_8821C)
-#define BIT_GET_MSI_TIMEOUT_ID_V1_8821C(x) (((x) >> BIT_SHIFT_MSI_TIMEOUT_ID_V1_8821C) & BIT_MASK_MSI_TIMEOUT_ID_V1_8821C)

+#define BIT_GET_MSI_TIMEOUT_ID_V1_8821C(x) (((x) >> BIT_SHIFT_MSI_TIMEOUT_ID_V1_8821C) & BIT_MASK_MSI_TIMEOUT_ID_V1_8821C)
+
 
 #define BIT_RADDR_RD_8821C BIT(7)
 #define BIT_EN_MUL_TAG_8821C BIT(6)
@@ -4761,19 +5208,22 @@
 #define BIT_SHIFT_STC_INT_FLAG_8821C 16
 #define BIT_MASK_STC_INT_FLAG_8821C 0xff
 #define BIT_STC_INT_FLAG_8821C(x) (((x) & BIT_MASK_STC_INT_FLAG_8821C) << BIT_SHIFT_STC_INT_FLAG_8821C)
-#define BIT_GET_STC_INT_FLAG_8821C(x) (((x) >> BIT_SHIFT_STC_INT_FLAG_8821C) & BIT_MASK_STC_INT_FLAG_8821C)

+#define BIT_GET_STC_INT_FLAG_8821C(x) (((x) >> BIT_SHIFT_STC_INT_FLAG_8821C) & BIT_MASK_STC_INT_FLAG_8821C)
+
 
 
 #define BIT_SHIFT_STC_INT_IDX_8821C 8
 #define BIT_MASK_STC_INT_IDX_8821C 0x7
 #define BIT_STC_INT_IDX_8821C(x) (((x) & BIT_MASK_STC_INT_IDX_8821C) << BIT_SHIFT_STC_INT_IDX_8821C)
-#define BIT_GET_STC_INT_IDX_8821C(x) (((x) >> BIT_SHIFT_STC_INT_IDX_8821C) & BIT_MASK_STC_INT_IDX_8821C)

+#define BIT_GET_STC_INT_IDX_8821C(x) (((x) >> BIT_SHIFT_STC_INT_IDX_8821C) & BIT_MASK_STC_INT_IDX_8821C)
+
 
 
 #define BIT_SHIFT_STC_INT_REALTIME_CS_8821C 0
 #define BIT_MASK_STC_INT_REALTIME_CS_8821C 0x3f
 #define BIT_STC_INT_REALTIME_CS_8821C(x) (((x) & BIT_MASK_STC_INT_REALTIME_CS_8821C) << BIT_SHIFT_STC_INT_REALTIME_CS_8821C)
-#define BIT_GET_STC_INT_REALTIME_CS_8821C(x) (((x) >> BIT_SHIFT_STC_INT_REALTIME_CS_8821C) & BIT_MASK_STC_INT_REALTIME_CS_8821C)

+#define BIT_GET_STC_INT_REALTIME_CS_8821C(x) (((x) >> BIT_SHIFT_STC_INT_REALTIME_CS_8821C) & BIT_MASK_STC_INT_REALTIME_CS_8821C)
+
 
 
 /* 2 REG_ST_INT_CFG_8821C(PCIE STATE CHANGE INTERRUPT CONFIGURATION) */
@@ -4782,13 +5232,15 @@
 #define BIT_SHIFT_STC_INT_EXPECT_LS_8821C 8
 #define BIT_MASK_STC_INT_EXPECT_LS_8821C 0x3f
 #define BIT_STC_INT_EXPECT_LS_8821C(x) (((x) & BIT_MASK_STC_INT_EXPECT_LS_8821C) << BIT_SHIFT_STC_INT_EXPECT_LS_8821C)
-#define BIT_GET_STC_INT_EXPECT_LS_8821C(x) (((x) >> BIT_SHIFT_STC_INT_EXPECT_LS_8821C) & BIT_MASK_STC_INT_EXPECT_LS_8821C)

+#define BIT_GET_STC_INT_EXPECT_LS_8821C(x) (((x) >> BIT_SHIFT_STC_INT_EXPECT_LS_8821C) & BIT_MASK_STC_INT_EXPECT_LS_8821C)
+
 
 
 #define BIT_SHIFT_STC_INT_EXPECT_CS_8821C 0
 #define BIT_MASK_STC_INT_EXPECT_CS_8821C 0x3f
 #define BIT_STC_INT_EXPECT_CS_8821C(x) (((x) & BIT_MASK_STC_INT_EXPECT_CS_8821C) << BIT_SHIFT_STC_INT_EXPECT_CS_8821C)
-#define BIT_GET_STC_INT_EXPECT_CS_8821C(x) (((x) >> BIT_SHIFT_STC_INT_EXPECT_CS_8821C) & BIT_MASK_STC_INT_EXPECT_CS_8821C)

+#define BIT_GET_STC_INT_EXPECT_CS_8821C(x) (((x) >> BIT_SHIFT_STC_INT_EXPECT_CS_8821C) & BIT_MASK_STC_INT_EXPECT_CS_8821C)
+
 
 
 /* 2 REG_CMU_DLY_CTRL_8821C(PCIE PHY CLOCK MGT UNIT DELAY CONTROL ) */
@@ -4798,7 +5250,8 @@
 #define BIT_SHIFT_CMU_DLY_PRE_DIV_8821C 0
 #define BIT_MASK_CMU_DLY_PRE_DIV_8821C 0xff
 #define BIT_CMU_DLY_PRE_DIV_8821C(x) (((x) & BIT_MASK_CMU_DLY_PRE_DIV_8821C) << BIT_SHIFT_CMU_DLY_PRE_DIV_8821C)
-#define BIT_GET_CMU_DLY_PRE_DIV_8821C(x) (((x) >> BIT_SHIFT_CMU_DLY_PRE_DIV_8821C) & BIT_MASK_CMU_DLY_PRE_DIV_8821C)

+#define BIT_GET_CMU_DLY_PRE_DIV_8821C(x) (((x) >> BIT_SHIFT_CMU_DLY_PRE_DIV_8821C) & BIT_MASK_CMU_DLY_PRE_DIV_8821C)
+
 
 
 /* 2 REG_CMU_DLY_CFG_8821C(PCIE PHY CLOCK MGT UNIT DELAY CONFIGURATION ) */
@@ -4806,25 +5259,29 @@
 #define BIT_SHIFT_CMU_DLY_LTR_A2I_8821C 24
 #define BIT_MASK_CMU_DLY_LTR_A2I_8821C 0xff
 #define BIT_CMU_DLY_LTR_A2I_8821C(x) (((x) & BIT_MASK_CMU_DLY_LTR_A2I_8821C) << BIT_SHIFT_CMU_DLY_LTR_A2I_8821C)
-#define BIT_GET_CMU_DLY_LTR_A2I_8821C(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_A2I_8821C) & BIT_MASK_CMU_DLY_LTR_A2I_8821C)

+#define BIT_GET_CMU_DLY_LTR_A2I_8821C(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_A2I_8821C) & BIT_MASK_CMU_DLY_LTR_A2I_8821C)
+
 
 
 #define BIT_SHIFT_CMU_DLY_LTR_I2A_8821C 16
 #define BIT_MASK_CMU_DLY_LTR_I2A_8821C 0xff
 #define BIT_CMU_DLY_LTR_I2A_8821C(x) (((x) & BIT_MASK_CMU_DLY_LTR_I2A_8821C) << BIT_SHIFT_CMU_DLY_LTR_I2A_8821C)
-#define BIT_GET_CMU_DLY_LTR_I2A_8821C(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_I2A_8821C) & BIT_MASK_CMU_DLY_LTR_I2A_8821C)

+#define BIT_GET_CMU_DLY_LTR_I2A_8821C(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_I2A_8821C) & BIT_MASK_CMU_DLY_LTR_I2A_8821C)
+
 
 
 #define BIT_SHIFT_CMU_DLY_LTR_IDLE_8821C 8
 #define BIT_MASK_CMU_DLY_LTR_IDLE_8821C 0xff
 #define BIT_CMU_DLY_LTR_IDLE_8821C(x) (((x) & BIT_MASK_CMU_DLY_LTR_IDLE_8821C) << BIT_SHIFT_CMU_DLY_LTR_IDLE_8821C)
-#define BIT_GET_CMU_DLY_LTR_IDLE_8821C(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_IDLE_8821C) & BIT_MASK_CMU_DLY_LTR_IDLE_8821C)

+#define BIT_GET_CMU_DLY_LTR_IDLE_8821C(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_IDLE_8821C) & BIT_MASK_CMU_DLY_LTR_IDLE_8821C)
+
 
 
 #define BIT_SHIFT_CMU_DLY_LTR_ACT_8821C 0
 #define BIT_MASK_CMU_DLY_LTR_ACT_8821C 0xff
 #define BIT_CMU_DLY_LTR_ACT_8821C(x) (((x) & BIT_MASK_CMU_DLY_LTR_ACT_8821C) << BIT_SHIFT_CMU_DLY_LTR_ACT_8821C)
-#define BIT_GET_CMU_DLY_LTR_ACT_8821C(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_ACT_8821C) & BIT_MASK_CMU_DLY_LTR_ACT_8821C)

+#define BIT_GET_CMU_DLY_LTR_ACT_8821C(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_ACT_8821C) & BIT_MASK_CMU_DLY_LTR_ACT_8821C)
+
 
 
 /* 2 REG_H2CQ_TXBD_DESA_8821C */
@@ -4832,7 +5289,8 @@
 #define BIT_SHIFT_H2CQ_TXBD_DESA_8821C 0
 #define BIT_MASK_H2CQ_TXBD_DESA_8821C 0xffffffffffffffffL
 #define BIT_H2CQ_TXBD_DESA_8821C(x) (((x) & BIT_MASK_H2CQ_TXBD_DESA_8821C) << BIT_SHIFT_H2CQ_TXBD_DESA_8821C)
-#define BIT_GET_H2CQ_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_H2CQ_TXBD_DESA_8821C) & BIT_MASK_H2CQ_TXBD_DESA_8821C)

+#define BIT_GET_H2CQ_TXBD_DESA_8821C(x) (((x) >> BIT_SHIFT_H2CQ_TXBD_DESA_8821C) & BIT_MASK_H2CQ_TXBD_DESA_8821C)
+
 
 
 /* 2 REG_H2CQ_TXBD_NUM_8821C */
@@ -4841,13 +5299,15 @@
 #define BIT_SHIFT_H2CQ_DESC_MODE_8821C 12
 #define BIT_MASK_H2CQ_DESC_MODE_8821C 0x3
 #define BIT_H2CQ_DESC_MODE_8821C(x) (((x) & BIT_MASK_H2CQ_DESC_MODE_8821C) << BIT_SHIFT_H2CQ_DESC_MODE_8821C)
-#define BIT_GET_H2CQ_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_H2CQ_DESC_MODE_8821C) & BIT_MASK_H2CQ_DESC_MODE_8821C)

+#define BIT_GET_H2CQ_DESC_MODE_8821C(x) (((x) >> BIT_SHIFT_H2CQ_DESC_MODE_8821C) & BIT_MASK_H2CQ_DESC_MODE_8821C)
+
 
 
 #define BIT_SHIFT_H2CQ_DESC_NUM_8821C 0
 #define BIT_MASK_H2CQ_DESC_NUM_8821C 0xfff
 #define BIT_H2CQ_DESC_NUM_8821C(x) (((x) & BIT_MASK_H2CQ_DESC_NUM_8821C) << BIT_SHIFT_H2CQ_DESC_NUM_8821C)
-#define BIT_GET_H2CQ_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_H2CQ_DESC_NUM_8821C) & BIT_MASK_H2CQ_DESC_NUM_8821C)

+#define BIT_GET_H2CQ_DESC_NUM_8821C(x) (((x) >> BIT_SHIFT_H2CQ_DESC_NUM_8821C) & BIT_MASK_H2CQ_DESC_NUM_8821C)
+
 
 
 /* 2 REG_H2CQ_TXBD_IDX_8821C */
@@ -4855,13 +5315,15 @@
 #define BIT_SHIFT_H2CQ_HW_IDX_8821C 16
 #define BIT_MASK_H2CQ_HW_IDX_8821C 0xfff
 #define BIT_H2CQ_HW_IDX_8821C(x) (((x) & BIT_MASK_H2CQ_HW_IDX_8821C) << BIT_SHIFT_H2CQ_HW_IDX_8821C)
-#define BIT_GET_H2CQ_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_H2CQ_HW_IDX_8821C) & BIT_MASK_H2CQ_HW_IDX_8821C)

+#define BIT_GET_H2CQ_HW_IDX_8821C(x) (((x) >> BIT_SHIFT_H2CQ_HW_IDX_8821C) & BIT_MASK_H2CQ_HW_IDX_8821C)
+
 
 
 #define BIT_SHIFT_H2CQ_HOST_IDX_8821C 0
 #define BIT_MASK_H2CQ_HOST_IDX_8821C 0xfff
 #define BIT_H2CQ_HOST_IDX_8821C(x) (((x) & BIT_MASK_H2CQ_HOST_IDX_8821C) << BIT_SHIFT_H2CQ_HOST_IDX_8821C)
-#define BIT_GET_H2CQ_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_H2CQ_HOST_IDX_8821C) & BIT_MASK_H2CQ_HOST_IDX_8821C)

+#define BIT_GET_H2CQ_HOST_IDX_8821C(x) (((x) >> BIT_SHIFT_H2CQ_HOST_IDX_8821C) & BIT_MASK_H2CQ_HOST_IDX_8821C)
+
 
 
 /* 2 REG_H2CQ_CSR_8821C[31:0] (H2CQ CONTROL AND STATUS) */
@@ -4874,26 +5336,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q0_V1_8821C 25
 #define BIT_MASK_QUEUEMACID_Q0_V1_8821C 0x7f
 #define BIT_QUEUEMACID_Q0_V1_8821C(x) (((x) & BIT_MASK_QUEUEMACID_Q0_V1_8821C) << BIT_SHIFT_QUEUEMACID_Q0_V1_8821C)
-#define BIT_GET_QUEUEMACID_Q0_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q0_V1_8821C) & BIT_MASK_QUEUEMACID_Q0_V1_8821C)

+#define BIT_GET_QUEUEMACID_Q0_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q0_V1_8821C) & BIT_MASK_QUEUEMACID_Q0_V1_8821C)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q0_V1_8821C 23
 #define BIT_MASK_QUEUEAC_Q0_V1_8821C 0x3
 #define BIT_QUEUEAC_Q0_V1_8821C(x) (((x) & BIT_MASK_QUEUEAC_Q0_V1_8821C) << BIT_SHIFT_QUEUEAC_Q0_V1_8821C)
-#define BIT_GET_QUEUEAC_Q0_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_Q0_V1_8821C) & BIT_MASK_QUEUEAC_Q0_V1_8821C)

+#define BIT_GET_QUEUEAC_Q0_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_Q0_V1_8821C) & BIT_MASK_QUEUEAC_Q0_V1_8821C)
+
 
 #define BIT_TIDEMPTY_Q0_V1_8821C BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q0_V2_8821C 11
 #define BIT_MASK_TAIL_PKT_Q0_V2_8821C 0x7ff
 #define BIT_TAIL_PKT_Q0_V2_8821C(x) (((x) & BIT_MASK_TAIL_PKT_Q0_V2_8821C) << BIT_SHIFT_TAIL_PKT_Q0_V2_8821C)
-#define BIT_GET_TAIL_PKT_Q0_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q0_V2_8821C) & BIT_MASK_TAIL_PKT_Q0_V2_8821C)

+#define BIT_GET_TAIL_PKT_Q0_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q0_V2_8821C) & BIT_MASK_TAIL_PKT_Q0_V2_8821C)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q0_V1_8821C 0
 #define BIT_MASK_HEAD_PKT_Q0_V1_8821C 0x7ff
 #define BIT_HEAD_PKT_Q0_V1_8821C(x) (((x) & BIT_MASK_HEAD_PKT_Q0_V1_8821C) << BIT_SHIFT_HEAD_PKT_Q0_V1_8821C)
-#define BIT_GET_HEAD_PKT_Q0_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q0_V1_8821C) & BIT_MASK_HEAD_PKT_Q0_V1_8821C)

+#define BIT_GET_HEAD_PKT_Q0_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q0_V1_8821C) & BIT_MASK_HEAD_PKT_Q0_V1_8821C)
+
 
 
 /* 2 REG_Q1_INFO_8821C */
@@ -4901,26 +5367,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q1_V1_8821C 25
 #define BIT_MASK_QUEUEMACID_Q1_V1_8821C 0x7f
 #define BIT_QUEUEMACID_Q1_V1_8821C(x) (((x) & BIT_MASK_QUEUEMACID_Q1_V1_8821C) << BIT_SHIFT_QUEUEMACID_Q1_V1_8821C)
-#define BIT_GET_QUEUEMACID_Q1_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q1_V1_8821C) & BIT_MASK_QUEUEMACID_Q1_V1_8821C)

+#define BIT_GET_QUEUEMACID_Q1_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q1_V1_8821C) & BIT_MASK_QUEUEMACID_Q1_V1_8821C)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q1_V1_8821C 23
 #define BIT_MASK_QUEUEAC_Q1_V1_8821C 0x3
 #define BIT_QUEUEAC_Q1_V1_8821C(x) (((x) & BIT_MASK_QUEUEAC_Q1_V1_8821C) << BIT_SHIFT_QUEUEAC_Q1_V1_8821C)
-#define BIT_GET_QUEUEAC_Q1_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_Q1_V1_8821C) & BIT_MASK_QUEUEAC_Q1_V1_8821C)

+#define BIT_GET_QUEUEAC_Q1_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_Q1_V1_8821C) & BIT_MASK_QUEUEAC_Q1_V1_8821C)
+
 
 #define BIT_TIDEMPTY_Q1_V1_8821C BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q1_V2_8821C 11
 #define BIT_MASK_TAIL_PKT_Q1_V2_8821C 0x7ff
 #define BIT_TAIL_PKT_Q1_V2_8821C(x) (((x) & BIT_MASK_TAIL_PKT_Q1_V2_8821C) << BIT_SHIFT_TAIL_PKT_Q1_V2_8821C)
-#define BIT_GET_TAIL_PKT_Q1_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q1_V2_8821C) & BIT_MASK_TAIL_PKT_Q1_V2_8821C)

+#define BIT_GET_TAIL_PKT_Q1_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q1_V2_8821C) & BIT_MASK_TAIL_PKT_Q1_V2_8821C)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q1_V1_8821C 0
 #define BIT_MASK_HEAD_PKT_Q1_V1_8821C 0x7ff
 #define BIT_HEAD_PKT_Q1_V1_8821C(x) (((x) & BIT_MASK_HEAD_PKT_Q1_V1_8821C) << BIT_SHIFT_HEAD_PKT_Q1_V1_8821C)
-#define BIT_GET_HEAD_PKT_Q1_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q1_V1_8821C) & BIT_MASK_HEAD_PKT_Q1_V1_8821C)

+#define BIT_GET_HEAD_PKT_Q1_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q1_V1_8821C) & BIT_MASK_HEAD_PKT_Q1_V1_8821C)
+
 
 
 /* 2 REG_Q2_INFO_8821C */
@@ -4928,26 +5398,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q2_V1_8821C 25
 #define BIT_MASK_QUEUEMACID_Q2_V1_8821C 0x7f
 #define BIT_QUEUEMACID_Q2_V1_8821C(x) (((x) & BIT_MASK_QUEUEMACID_Q2_V1_8821C) << BIT_SHIFT_QUEUEMACID_Q2_V1_8821C)
-#define BIT_GET_QUEUEMACID_Q2_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q2_V1_8821C) & BIT_MASK_QUEUEMACID_Q2_V1_8821C)

+#define BIT_GET_QUEUEMACID_Q2_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q2_V1_8821C) & BIT_MASK_QUEUEMACID_Q2_V1_8821C)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q2_V1_8821C 23
 #define BIT_MASK_QUEUEAC_Q2_V1_8821C 0x3
 #define BIT_QUEUEAC_Q2_V1_8821C(x) (((x) & BIT_MASK_QUEUEAC_Q2_V1_8821C) << BIT_SHIFT_QUEUEAC_Q2_V1_8821C)
-#define BIT_GET_QUEUEAC_Q2_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_Q2_V1_8821C) & BIT_MASK_QUEUEAC_Q2_V1_8821C)

+#define BIT_GET_QUEUEAC_Q2_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_Q2_V1_8821C) & BIT_MASK_QUEUEAC_Q2_V1_8821C)
+
 
 #define BIT_TIDEMPTY_Q2_V1_8821C BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q2_V2_8821C 11
 #define BIT_MASK_TAIL_PKT_Q2_V2_8821C 0x7ff
 #define BIT_TAIL_PKT_Q2_V2_8821C(x) (((x) & BIT_MASK_TAIL_PKT_Q2_V2_8821C) << BIT_SHIFT_TAIL_PKT_Q2_V2_8821C)
-#define BIT_GET_TAIL_PKT_Q2_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q2_V2_8821C) & BIT_MASK_TAIL_PKT_Q2_V2_8821C)

+#define BIT_GET_TAIL_PKT_Q2_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q2_V2_8821C) & BIT_MASK_TAIL_PKT_Q2_V2_8821C)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q2_V1_8821C 0
 #define BIT_MASK_HEAD_PKT_Q2_V1_8821C 0x7ff
 #define BIT_HEAD_PKT_Q2_V1_8821C(x) (((x) & BIT_MASK_HEAD_PKT_Q2_V1_8821C) << BIT_SHIFT_HEAD_PKT_Q2_V1_8821C)
-#define BIT_GET_HEAD_PKT_Q2_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q2_V1_8821C) & BIT_MASK_HEAD_PKT_Q2_V1_8821C)

+#define BIT_GET_HEAD_PKT_Q2_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q2_V1_8821C) & BIT_MASK_HEAD_PKT_Q2_V1_8821C)
+
 
 
 /* 2 REG_Q3_INFO_8821C */
@@ -4955,26 +5429,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q3_V1_8821C 25
 #define BIT_MASK_QUEUEMACID_Q3_V1_8821C 0x7f
 #define BIT_QUEUEMACID_Q3_V1_8821C(x) (((x) & BIT_MASK_QUEUEMACID_Q3_V1_8821C) << BIT_SHIFT_QUEUEMACID_Q3_V1_8821C)
-#define BIT_GET_QUEUEMACID_Q3_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q3_V1_8821C) & BIT_MASK_QUEUEMACID_Q3_V1_8821C)

+#define BIT_GET_QUEUEMACID_Q3_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q3_V1_8821C) & BIT_MASK_QUEUEMACID_Q3_V1_8821C)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q3_V1_8821C 23
 #define BIT_MASK_QUEUEAC_Q3_V1_8821C 0x3
 #define BIT_QUEUEAC_Q3_V1_8821C(x) (((x) & BIT_MASK_QUEUEAC_Q3_V1_8821C) << BIT_SHIFT_QUEUEAC_Q3_V1_8821C)
-#define BIT_GET_QUEUEAC_Q3_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_Q3_V1_8821C) & BIT_MASK_QUEUEAC_Q3_V1_8821C)

+#define BIT_GET_QUEUEAC_Q3_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_Q3_V1_8821C) & BIT_MASK_QUEUEAC_Q3_V1_8821C)
+
 
 #define BIT_TIDEMPTY_Q3_V1_8821C BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q3_V2_8821C 11
 #define BIT_MASK_TAIL_PKT_Q3_V2_8821C 0x7ff
 #define BIT_TAIL_PKT_Q3_V2_8821C(x) (((x) & BIT_MASK_TAIL_PKT_Q3_V2_8821C) << BIT_SHIFT_TAIL_PKT_Q3_V2_8821C)
-#define BIT_GET_TAIL_PKT_Q3_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q3_V2_8821C) & BIT_MASK_TAIL_PKT_Q3_V2_8821C)

+#define BIT_GET_TAIL_PKT_Q3_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q3_V2_8821C) & BIT_MASK_TAIL_PKT_Q3_V2_8821C)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q3_V1_8821C 0
 #define BIT_MASK_HEAD_PKT_Q3_V1_8821C 0x7ff
 #define BIT_HEAD_PKT_Q3_V1_8821C(x) (((x) & BIT_MASK_HEAD_PKT_Q3_V1_8821C) << BIT_SHIFT_HEAD_PKT_Q3_V1_8821C)
-#define BIT_GET_HEAD_PKT_Q3_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q3_V1_8821C) & BIT_MASK_HEAD_PKT_Q3_V1_8821C)

+#define BIT_GET_HEAD_PKT_Q3_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q3_V1_8821C) & BIT_MASK_HEAD_PKT_Q3_V1_8821C)
+
 
 
 /* 2 REG_MGQ_INFO_8821C */
@@ -4982,26 +5460,30 @@
 #define BIT_SHIFT_QUEUEMACID_MGQ_V1_8821C 25
 #define BIT_MASK_QUEUEMACID_MGQ_V1_8821C 0x7f
 #define BIT_QUEUEMACID_MGQ_V1_8821C(x) (((x) & BIT_MASK_QUEUEMACID_MGQ_V1_8821C) << BIT_SHIFT_QUEUEMACID_MGQ_V1_8821C)
-#define BIT_GET_QUEUEMACID_MGQ_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_MGQ_V1_8821C) & BIT_MASK_QUEUEMACID_MGQ_V1_8821C)

+#define BIT_GET_QUEUEMACID_MGQ_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_MGQ_V1_8821C) & BIT_MASK_QUEUEMACID_MGQ_V1_8821C)
+
 
 
 #define BIT_SHIFT_QUEUEAC_MGQ_V1_8821C 23
 #define BIT_MASK_QUEUEAC_MGQ_V1_8821C 0x3
 #define BIT_QUEUEAC_MGQ_V1_8821C(x) (((x) & BIT_MASK_QUEUEAC_MGQ_V1_8821C) << BIT_SHIFT_QUEUEAC_MGQ_V1_8821C)
-#define BIT_GET_QUEUEAC_MGQ_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_MGQ_V1_8821C) & BIT_MASK_QUEUEAC_MGQ_V1_8821C)

+#define BIT_GET_QUEUEAC_MGQ_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_MGQ_V1_8821C) & BIT_MASK_QUEUEAC_MGQ_V1_8821C)
+
 
 #define BIT_TIDEMPTY_MGQ_V1_8821C BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_MGQ_V2_8821C 11
 #define BIT_MASK_TAIL_PKT_MGQ_V2_8821C 0x7ff
 #define BIT_TAIL_PKT_MGQ_V2_8821C(x) (((x) & BIT_MASK_TAIL_PKT_MGQ_V2_8821C) << BIT_SHIFT_TAIL_PKT_MGQ_V2_8821C)
-#define BIT_GET_TAIL_PKT_MGQ_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_MGQ_V2_8821C) & BIT_MASK_TAIL_PKT_MGQ_V2_8821C)

+#define BIT_GET_TAIL_PKT_MGQ_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_MGQ_V2_8821C) & BIT_MASK_TAIL_PKT_MGQ_V2_8821C)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_MGQ_V1_8821C 0
 #define BIT_MASK_HEAD_PKT_MGQ_V1_8821C 0x7ff
 #define BIT_HEAD_PKT_MGQ_V1_8821C(x) (((x) & BIT_MASK_HEAD_PKT_MGQ_V1_8821C) << BIT_SHIFT_HEAD_PKT_MGQ_V1_8821C)
-#define BIT_GET_HEAD_PKT_MGQ_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_MGQ_V1_8821C) & BIT_MASK_HEAD_PKT_MGQ_V1_8821C)

+#define BIT_GET_HEAD_PKT_MGQ_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_MGQ_V1_8821C) & BIT_MASK_HEAD_PKT_MGQ_V1_8821C)
+
 
 
 /* 2 REG_HIQ_INFO_8821C */
@@ -5009,26 +5491,30 @@
 #define BIT_SHIFT_QUEUEMACID_HIQ_V1_8821C 25
 #define BIT_MASK_QUEUEMACID_HIQ_V1_8821C 0x7f
 #define BIT_QUEUEMACID_HIQ_V1_8821C(x) (((x) & BIT_MASK_QUEUEMACID_HIQ_V1_8821C) << BIT_SHIFT_QUEUEMACID_HIQ_V1_8821C)
-#define BIT_GET_QUEUEMACID_HIQ_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_HIQ_V1_8821C) & BIT_MASK_QUEUEMACID_HIQ_V1_8821C)

+#define BIT_GET_QUEUEMACID_HIQ_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_HIQ_V1_8821C) & BIT_MASK_QUEUEMACID_HIQ_V1_8821C)
+
 
 
 #define BIT_SHIFT_QUEUEAC_HIQ_V1_8821C 23
 #define BIT_MASK_QUEUEAC_HIQ_V1_8821C 0x3
 #define BIT_QUEUEAC_HIQ_V1_8821C(x) (((x) & BIT_MASK_QUEUEAC_HIQ_V1_8821C) << BIT_SHIFT_QUEUEAC_HIQ_V1_8821C)
-#define BIT_GET_QUEUEAC_HIQ_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_HIQ_V1_8821C) & BIT_MASK_QUEUEAC_HIQ_V1_8821C)

+#define BIT_GET_QUEUEAC_HIQ_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_HIQ_V1_8821C) & BIT_MASK_QUEUEAC_HIQ_V1_8821C)
+
 
 #define BIT_TIDEMPTY_HIQ_V1_8821C BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_HIQ_V2_8821C 11
 #define BIT_MASK_TAIL_PKT_HIQ_V2_8821C 0x7ff
 #define BIT_TAIL_PKT_HIQ_V2_8821C(x) (((x) & BIT_MASK_TAIL_PKT_HIQ_V2_8821C) << BIT_SHIFT_TAIL_PKT_HIQ_V2_8821C)
-#define BIT_GET_TAIL_PKT_HIQ_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_HIQ_V2_8821C) & BIT_MASK_TAIL_PKT_HIQ_V2_8821C)

+#define BIT_GET_TAIL_PKT_HIQ_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_HIQ_V2_8821C) & BIT_MASK_TAIL_PKT_HIQ_V2_8821C)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_HIQ_V1_8821C 0
 #define BIT_MASK_HEAD_PKT_HIQ_V1_8821C 0x7ff
 #define BIT_HEAD_PKT_HIQ_V1_8821C(x) (((x) & BIT_MASK_HEAD_PKT_HIQ_V1_8821C) << BIT_SHIFT_HEAD_PKT_HIQ_V1_8821C)
-#define BIT_GET_HEAD_PKT_HIQ_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_HIQ_V1_8821C) & BIT_MASK_HEAD_PKT_HIQ_V1_8821C)

+#define BIT_GET_HEAD_PKT_HIQ_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_HIQ_V1_8821C) & BIT_MASK_HEAD_PKT_HIQ_V1_8821C)
+
 
 
 /* 2 REG_BCNQ_INFO_8821C */
@@ -5036,7 +5522,8 @@
 #define BIT_SHIFT_BCNQ_HEAD_PG_V1_8821C 0
 #define BIT_MASK_BCNQ_HEAD_PG_V1_8821C 0xfff
 #define BIT_BCNQ_HEAD_PG_V1_8821C(x) (((x) & BIT_MASK_BCNQ_HEAD_PG_V1_8821C) << BIT_SHIFT_BCNQ_HEAD_PG_V1_8821C)
-#define BIT_GET_BCNQ_HEAD_PG_V1_8821C(x) (((x) >> BIT_SHIFT_BCNQ_HEAD_PG_V1_8821C) & BIT_MASK_BCNQ_HEAD_PG_V1_8821C)

+#define BIT_GET_BCNQ_HEAD_PG_V1_8821C(x) (((x) >> BIT_SHIFT_BCNQ_HEAD_PG_V1_8821C) & BIT_MASK_BCNQ_HEAD_PG_V1_8821C)
+
 
 
 /* 2 REG_TXPKT_EMPTY_8821C */
@@ -5062,7 +5549,8 @@
 #define BIT_SHIFT_FW_FREE_TAIL_V1_8821C 0
 #define BIT_MASK_FW_FREE_TAIL_V1_8821C 0xfff
 #define BIT_FW_FREE_TAIL_V1_8821C(x) (((x) & BIT_MASK_FW_FREE_TAIL_V1_8821C) << BIT_SHIFT_FW_FREE_TAIL_V1_8821C)
-#define BIT_GET_FW_FREE_TAIL_V1_8821C(x) (((x) >> BIT_SHIFT_FW_FREE_TAIL_V1_8821C) & BIT_MASK_FW_FREE_TAIL_V1_8821C)

+#define BIT_GET_FW_FREE_TAIL_V1_8821C(x) (((x) >> BIT_SHIFT_FW_FREE_TAIL_V1_8821C) & BIT_MASK_FW_FREE_TAIL_V1_8821C)
+
 
 
 /* 2 REG_FWHW_TXQ_CTRL_8821C */
@@ -5074,7 +5562,8 @@
 #define BIT_SHIFT_EN_QUEUE_RPT_8821C 8
 #define BIT_MASK_EN_QUEUE_RPT_8821C 0xff
 #define BIT_EN_QUEUE_RPT_8821C(x) (((x) & BIT_MASK_EN_QUEUE_RPT_8821C) << BIT_SHIFT_EN_QUEUE_RPT_8821C)
-#define BIT_GET_EN_QUEUE_RPT_8821C(x) (((x) >> BIT_SHIFT_EN_QUEUE_RPT_8821C) & BIT_MASK_EN_QUEUE_RPT_8821C)

+#define BIT_GET_EN_QUEUE_RPT_8821C(x) (((x) >> BIT_SHIFT_EN_QUEUE_RPT_8821C) & BIT_MASK_EN_QUEUE_RPT_8821C)
+
 
 #define BIT_EN_RTY_BK_8821C BIT(7)
 #define BIT_EN_USE_INI_RAT_8821C BIT(6)
@@ -5091,7 +5580,8 @@
 #define BIT_SHIFT__R_DATA_FALLBACK_SEL_8821C 0
 #define BIT_MASK__R_DATA_FALLBACK_SEL_8821C 0x3
 #define BIT__R_DATA_FALLBACK_SEL_8821C(x) (((x) & BIT_MASK__R_DATA_FALLBACK_SEL_8821C) << BIT_SHIFT__R_DATA_FALLBACK_SEL_8821C)
-#define BIT_GET__R_DATA_FALLBACK_SEL_8821C(x) (((x) >> BIT_SHIFT__R_DATA_FALLBACK_SEL_8821C) & BIT_MASK__R_DATA_FALLBACK_SEL_8821C)

+#define BIT_GET__R_DATA_FALLBACK_SEL_8821C(x) (((x) >> BIT_SHIFT__R_DATA_FALLBACK_SEL_8821C) & BIT_MASK__R_DATA_FALLBACK_SEL_8821C)
+
 
 
 /* 2 REG_BCNQ_BDNY_V1_8821C */
@@ -5099,7 +5589,8 @@
 #define BIT_SHIFT_BCNQ_PGBNDY_V1_8821C 0
 #define BIT_MASK_BCNQ_PGBNDY_V1_8821C 0xfff
 #define BIT_BCNQ_PGBNDY_V1_8821C(x) (((x) & BIT_MASK_BCNQ_PGBNDY_V1_8821C) << BIT_SHIFT_BCNQ_PGBNDY_V1_8821C)
-#define BIT_GET_BCNQ_PGBNDY_V1_8821C(x) (((x) >> BIT_SHIFT_BCNQ_PGBNDY_V1_8821C) & BIT_MASK_BCNQ_PGBNDY_V1_8821C)

+#define BIT_GET_BCNQ_PGBNDY_V1_8821C(x) (((x) >> BIT_SHIFT_BCNQ_PGBNDY_V1_8821C) & BIT_MASK_BCNQ_PGBNDY_V1_8821C)
+
 
 
 /* 2 REG_LIFETIME_EN_8821C */
@@ -5118,13 +5609,15 @@
 #define BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8821C 8
 #define BIT_MASK_SPEC_SIFS_OFDM_PTCL_8821C 0xff
 #define BIT_SPEC_SIFS_OFDM_PTCL_8821C(x) (((x) & BIT_MASK_SPEC_SIFS_OFDM_PTCL_8821C) << BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8821C)
-#define BIT_GET_SPEC_SIFS_OFDM_PTCL_8821C(x) (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8821C) & BIT_MASK_SPEC_SIFS_OFDM_PTCL_8821C)

+#define BIT_GET_SPEC_SIFS_OFDM_PTCL_8821C(x) (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8821C) & BIT_MASK_SPEC_SIFS_OFDM_PTCL_8821C)
+
 
 
 #define BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8821C 0
 #define BIT_MASK_SPEC_SIFS_CCK_PTCL_8821C 0xff
 #define BIT_SPEC_SIFS_CCK_PTCL_8821C(x) (((x) & BIT_MASK_SPEC_SIFS_CCK_PTCL_8821C) << BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8821C)
-#define BIT_GET_SPEC_SIFS_CCK_PTCL_8821C(x) (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8821C) & BIT_MASK_SPEC_SIFS_CCK_PTCL_8821C)

+#define BIT_GET_SPEC_SIFS_CCK_PTCL_8821C(x) (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8821C) & BIT_MASK_SPEC_SIFS_CCK_PTCL_8821C)
+
 
 
 /* 2 REG_RETRY_LIMIT_8821C */
@@ -5132,13 +5625,15 @@
 #define BIT_SHIFT_SRL_8821C 8
 #define BIT_MASK_SRL_8821C 0x3f
 #define BIT_SRL_8821C(x) (((x) & BIT_MASK_SRL_8821C) << BIT_SHIFT_SRL_8821C)
-#define BIT_GET_SRL_8821C(x) (((x) >> BIT_SHIFT_SRL_8821C) & BIT_MASK_SRL_8821C)

+#define BIT_GET_SRL_8821C(x) (((x) >> BIT_SHIFT_SRL_8821C) & BIT_MASK_SRL_8821C)
+
 
 
 #define BIT_SHIFT_LRL_8821C 0
 #define BIT_MASK_LRL_8821C 0x3f
 #define BIT_LRL_8821C(x) (((x) & BIT_MASK_LRL_8821C) << BIT_SHIFT_LRL_8821C)
-#define BIT_GET_LRL_8821C(x) (((x) >> BIT_SHIFT_LRL_8821C) & BIT_MASK_LRL_8821C)

+#define BIT_GET_LRL_8821C(x) (((x) >> BIT_SHIFT_LRL_8821C) & BIT_MASK_LRL_8821C)
+
 
 
 /* 2 REG_TXBF_CTRL_8821C */
@@ -5153,7 +5648,8 @@
 #define BIT_SHIFT_R_TXBF1_AID_8821C 16
 #define BIT_MASK_R_TXBF1_AID_8821C 0x1ff
 #define BIT_R_TXBF1_AID_8821C(x) (((x) & BIT_MASK_R_TXBF1_AID_8821C) << BIT_SHIFT_R_TXBF1_AID_8821C)
-#define BIT_GET_R_TXBF1_AID_8821C(x) (((x) >> BIT_SHIFT_R_TXBF1_AID_8821C) & BIT_MASK_R_TXBF1_AID_8821C)

+#define BIT_GET_R_TXBF1_AID_8821C(x) (((x) >> BIT_SHIFT_R_TXBF1_AID_8821C) & BIT_MASK_R_TXBF1_AID_8821C)
+
 
 #define BIT_DIS_NDP_BFEN_8821C BIT(15)
 #define BIT_R_TXBCN_NOBLOCK_NDP_8821C BIT(14)
@@ -5164,7 +5660,8 @@
 #define BIT_SHIFT_R_TXBF0_AID_8821C 0
 #define BIT_MASK_R_TXBF0_AID_8821C 0x1ff
 #define BIT_R_TXBF0_AID_8821C(x) (((x) & BIT_MASK_R_TXBF0_AID_8821C) << BIT_SHIFT_R_TXBF0_AID_8821C)
-#define BIT_GET_R_TXBF0_AID_8821C(x) (((x) >> BIT_SHIFT_R_TXBF0_AID_8821C) & BIT_MASK_R_TXBF0_AID_8821C)

+#define BIT_GET_R_TXBF0_AID_8821C(x) (((x) >> BIT_SHIFT_R_TXBF0_AID_8821C) & BIT_MASK_R_TXBF0_AID_8821C)
+
 
 
 /* 2 REG_DARFRC_8821C */
@@ -5172,49 +5669,57 @@
 #define BIT_SHIFT_DARF_RC8_8821C (56 & CPU_OPT_WIDTH)
 #define BIT_MASK_DARF_RC8_8821C 0x1f
 #define BIT_DARF_RC8_8821C(x) (((x) & BIT_MASK_DARF_RC8_8821C) << BIT_SHIFT_DARF_RC8_8821C)
-#define BIT_GET_DARF_RC8_8821C(x) (((x) >> BIT_SHIFT_DARF_RC8_8821C) & BIT_MASK_DARF_RC8_8821C)

+#define BIT_GET_DARF_RC8_8821C(x) (((x) >> BIT_SHIFT_DARF_RC8_8821C) & BIT_MASK_DARF_RC8_8821C)
+
 
 
 #define BIT_SHIFT_DARF_RC7_8821C (48 & CPU_OPT_WIDTH)
 #define BIT_MASK_DARF_RC7_8821C 0x1f
 #define BIT_DARF_RC7_8821C(x) (((x) & BIT_MASK_DARF_RC7_8821C) << BIT_SHIFT_DARF_RC7_8821C)
-#define BIT_GET_DARF_RC7_8821C(x) (((x) >> BIT_SHIFT_DARF_RC7_8821C) & BIT_MASK_DARF_RC7_8821C)

+#define BIT_GET_DARF_RC7_8821C(x) (((x) >> BIT_SHIFT_DARF_RC7_8821C) & BIT_MASK_DARF_RC7_8821C)
+
 
 
 #define BIT_SHIFT_DARF_RC6_8821C (40 & CPU_OPT_WIDTH)
 #define BIT_MASK_DARF_RC6_8821C 0x1f
 #define BIT_DARF_RC6_8821C(x) (((x) & BIT_MASK_DARF_RC6_8821C) << BIT_SHIFT_DARF_RC6_8821C)
-#define BIT_GET_DARF_RC6_8821C(x) (((x) >> BIT_SHIFT_DARF_RC6_8821C) & BIT_MASK_DARF_RC6_8821C)

+#define BIT_GET_DARF_RC6_8821C(x) (((x) >> BIT_SHIFT_DARF_RC6_8821C) & BIT_MASK_DARF_RC6_8821C)
+
 
 
 #define BIT_SHIFT_DARF_RC5_8821C (32 & CPU_OPT_WIDTH)
 #define BIT_MASK_DARF_RC5_8821C 0x1f
 #define BIT_DARF_RC5_8821C(x) (((x) & BIT_MASK_DARF_RC5_8821C) << BIT_SHIFT_DARF_RC5_8821C)
-#define BIT_GET_DARF_RC5_8821C(x) (((x) >> BIT_SHIFT_DARF_RC5_8821C) & BIT_MASK_DARF_RC5_8821C)

+#define BIT_GET_DARF_RC5_8821C(x) (((x) >> BIT_SHIFT_DARF_RC5_8821C) & BIT_MASK_DARF_RC5_8821C)
+
 
 
 #define BIT_SHIFT_DARF_RC4_8821C 24
 #define BIT_MASK_DARF_RC4_8821C 0x1f
 #define BIT_DARF_RC4_8821C(x) (((x) & BIT_MASK_DARF_RC4_8821C) << BIT_SHIFT_DARF_RC4_8821C)
-#define BIT_GET_DARF_RC4_8821C(x) (((x) >> BIT_SHIFT_DARF_RC4_8821C) & BIT_MASK_DARF_RC4_8821C)

+#define BIT_GET_DARF_RC4_8821C(x) (((x) >> BIT_SHIFT_DARF_RC4_8821C) & BIT_MASK_DARF_RC4_8821C)
+
 
 
 #define BIT_SHIFT_DARF_RC3_8821C 16
 #define BIT_MASK_DARF_RC3_8821C 0x1f
 #define BIT_DARF_RC3_8821C(x) (((x) & BIT_MASK_DARF_RC3_8821C) << BIT_SHIFT_DARF_RC3_8821C)
-#define BIT_GET_DARF_RC3_8821C(x) (((x) >> BIT_SHIFT_DARF_RC3_8821C) & BIT_MASK_DARF_RC3_8821C)

+#define BIT_GET_DARF_RC3_8821C(x) (((x) >> BIT_SHIFT_DARF_RC3_8821C) & BIT_MASK_DARF_RC3_8821C)
+
 
 
 #define BIT_SHIFT_DARF_RC2_8821C 8
 #define BIT_MASK_DARF_RC2_8821C 0x1f
 #define BIT_DARF_RC2_8821C(x) (((x) & BIT_MASK_DARF_RC2_8821C) << BIT_SHIFT_DARF_RC2_8821C)
-#define BIT_GET_DARF_RC2_8821C(x) (((x) >> BIT_SHIFT_DARF_RC2_8821C) & BIT_MASK_DARF_RC2_8821C)

+#define BIT_GET_DARF_RC2_8821C(x) (((x) >> BIT_SHIFT_DARF_RC2_8821C) & BIT_MASK_DARF_RC2_8821C)
+
 
 
 #define BIT_SHIFT_DARF_RC1_8821C 0
 #define BIT_MASK_DARF_RC1_8821C 0x1f
 #define BIT_DARF_RC1_8821C(x) (((x) & BIT_MASK_DARF_RC1_8821C) << BIT_SHIFT_DARF_RC1_8821C)
-#define BIT_GET_DARF_RC1_8821C(x) (((x) >> BIT_SHIFT_DARF_RC1_8821C) & BIT_MASK_DARF_RC1_8821C)

+#define BIT_GET_DARF_RC1_8821C(x) (((x) >> BIT_SHIFT_DARF_RC1_8821C) & BIT_MASK_DARF_RC1_8821C)
+
 
 
 /* 2 REG_RARFRC_8821C */
@@ -5222,49 +5727,57 @@
 #define BIT_SHIFT_RARF_RC8_8821C (56 & CPU_OPT_WIDTH)
 #define BIT_MASK_RARF_RC8_8821C 0x1f
 #define BIT_RARF_RC8_8821C(x) (((x) & BIT_MASK_RARF_RC8_8821C) << BIT_SHIFT_RARF_RC8_8821C)
-#define BIT_GET_RARF_RC8_8821C(x) (((x) >> BIT_SHIFT_RARF_RC8_8821C) & BIT_MASK_RARF_RC8_8821C)

+#define BIT_GET_RARF_RC8_8821C(x) (((x) >> BIT_SHIFT_RARF_RC8_8821C) & BIT_MASK_RARF_RC8_8821C)
+
 
 
 #define BIT_SHIFT_RARF_RC7_8821C (48 & CPU_OPT_WIDTH)
 #define BIT_MASK_RARF_RC7_8821C 0x1f
 #define BIT_RARF_RC7_8821C(x) (((x) & BIT_MASK_RARF_RC7_8821C) << BIT_SHIFT_RARF_RC7_8821C)
-#define BIT_GET_RARF_RC7_8821C(x) (((x) >> BIT_SHIFT_RARF_RC7_8821C) & BIT_MASK_RARF_RC7_8821C)

+#define BIT_GET_RARF_RC7_8821C(x) (((x) >> BIT_SHIFT_RARF_RC7_8821C) & BIT_MASK_RARF_RC7_8821C)
+
 
 
 #define BIT_SHIFT_RARF_RC6_8821C (40 & CPU_OPT_WIDTH)
 #define BIT_MASK_RARF_RC6_8821C 0x1f
 #define BIT_RARF_RC6_8821C(x) (((x) & BIT_MASK_RARF_RC6_8821C) << BIT_SHIFT_RARF_RC6_8821C)
-#define BIT_GET_RARF_RC6_8821C(x) (((x) >> BIT_SHIFT_RARF_RC6_8821C) & BIT_MASK_RARF_RC6_8821C)

+#define BIT_GET_RARF_RC6_8821C(x) (((x) >> BIT_SHIFT_RARF_RC6_8821C) & BIT_MASK_RARF_RC6_8821C)
+
 
 
 #define BIT_SHIFT_RARF_RC5_8821C (32 & CPU_OPT_WIDTH)
 #define BIT_MASK_RARF_RC5_8821C 0x1f
 #define BIT_RARF_RC5_8821C(x) (((x) & BIT_MASK_RARF_RC5_8821C) << BIT_SHIFT_RARF_RC5_8821C)
-#define BIT_GET_RARF_RC5_8821C(x) (((x) >> BIT_SHIFT_RARF_RC5_8821C) & BIT_MASK_RARF_RC5_8821C)

+#define BIT_GET_RARF_RC5_8821C(x) (((x) >> BIT_SHIFT_RARF_RC5_8821C) & BIT_MASK_RARF_RC5_8821C)
+
 
 
 #define BIT_SHIFT_RARF_RC4_8821C 24
 #define BIT_MASK_RARF_RC4_8821C 0x1f
 #define BIT_RARF_RC4_8821C(x) (((x) & BIT_MASK_RARF_RC4_8821C) << BIT_SHIFT_RARF_RC4_8821C)
-#define BIT_GET_RARF_RC4_8821C(x) (((x) >> BIT_SHIFT_RARF_RC4_8821C) & BIT_MASK_RARF_RC4_8821C)

+#define BIT_GET_RARF_RC4_8821C(x) (((x) >> BIT_SHIFT_RARF_RC4_8821C) & BIT_MASK_RARF_RC4_8821C)
+
 
 
 #define BIT_SHIFT_RARF_RC3_8821C 16
 #define BIT_MASK_RARF_RC3_8821C 0x1f
 #define BIT_RARF_RC3_8821C(x) (((x) & BIT_MASK_RARF_RC3_8821C) << BIT_SHIFT_RARF_RC3_8821C)
-#define BIT_GET_RARF_RC3_8821C(x) (((x) >> BIT_SHIFT_RARF_RC3_8821C) & BIT_MASK_RARF_RC3_8821C)

+#define BIT_GET_RARF_RC3_8821C(x) (((x) >> BIT_SHIFT_RARF_RC3_8821C) & BIT_MASK_RARF_RC3_8821C)
+
 
 
 #define BIT_SHIFT_RARF_RC2_8821C 8
 #define BIT_MASK_RARF_RC2_8821C 0x1f
 #define BIT_RARF_RC2_8821C(x) (((x) & BIT_MASK_RARF_RC2_8821C) << BIT_SHIFT_RARF_RC2_8821C)
-#define BIT_GET_RARF_RC2_8821C(x) (((x) >> BIT_SHIFT_RARF_RC2_8821C) & BIT_MASK_RARF_RC2_8821C)

+#define BIT_GET_RARF_RC2_8821C(x) (((x) >> BIT_SHIFT_RARF_RC2_8821C) & BIT_MASK_RARF_RC2_8821C)
+
 
 
 #define BIT_SHIFT_RARF_RC1_8821C 0
 #define BIT_MASK_RARF_RC1_8821C 0x1f
 #define BIT_RARF_RC1_8821C(x) (((x) & BIT_MASK_RARF_RC1_8821C) << BIT_SHIFT_RARF_RC1_8821C)
-#define BIT_GET_RARF_RC1_8821C(x) (((x) >> BIT_SHIFT_RARF_RC1_8821C) & BIT_MASK_RARF_RC1_8821C)

+#define BIT_GET_RARF_RC1_8821C(x) (((x) >> BIT_SHIFT_RARF_RC1_8821C) & BIT_MASK_RARF_RC1_8821C)
+
 
 
 /* 2 REG_RRSR_8821C */
@@ -5272,14 +5785,16 @@
 #define BIT_SHIFT_RRSR_RSC_8821C 21
 #define BIT_MASK_RRSR_RSC_8821C 0x3
 #define BIT_RRSR_RSC_8821C(x) (((x) & BIT_MASK_RRSR_RSC_8821C) << BIT_SHIFT_RRSR_RSC_8821C)
-#define BIT_GET_RRSR_RSC_8821C(x) (((x) >> BIT_SHIFT_RRSR_RSC_8821C) & BIT_MASK_RRSR_RSC_8821C)

+#define BIT_GET_RRSR_RSC_8821C(x) (((x) >> BIT_SHIFT_RRSR_RSC_8821C) & BIT_MASK_RRSR_RSC_8821C)
+
 
 #define BIT_RRSR_BW_8821C BIT(20)
 
 #define BIT_SHIFT_RRSC_BITMAP_8821C 0
 #define BIT_MASK_RRSC_BITMAP_8821C 0xfffff
 #define BIT_RRSC_BITMAP_8821C(x) (((x) & BIT_MASK_RRSC_BITMAP_8821C) << BIT_SHIFT_RRSC_BITMAP_8821C)
-#define BIT_GET_RRSC_BITMAP_8821C(x) (((x) >> BIT_SHIFT_RRSC_BITMAP_8821C) & BIT_MASK_RRSC_BITMAP_8821C)

+#define BIT_GET_RRSC_BITMAP_8821C(x) (((x) >> BIT_SHIFT_RRSC_BITMAP_8821C) & BIT_MASK_RRSC_BITMAP_8821C)
+
 
 
 /* 2 REG_ARFR0_8821C */
@@ -5287,7 +5802,8 @@
 #define BIT_SHIFT_ARFR0_V1_8821C 0
 #define BIT_MASK_ARFR0_V1_8821C 0xffffffffffffffffL
 #define BIT_ARFR0_V1_8821C(x) (((x) & BIT_MASK_ARFR0_V1_8821C) << BIT_SHIFT_ARFR0_V1_8821C)
-#define BIT_GET_ARFR0_V1_8821C(x) (((x) >> BIT_SHIFT_ARFR0_V1_8821C) & BIT_MASK_ARFR0_V1_8821C)

+#define BIT_GET_ARFR0_V1_8821C(x) (((x) >> BIT_SHIFT_ARFR0_V1_8821C) & BIT_MASK_ARFR0_V1_8821C)
+
 
 
 /* 2 REG_ARFR1_V1_8821C */
@@ -5295,7 +5811,8 @@
 #define BIT_SHIFT_ARFR1_V1_8821C 0
 #define BIT_MASK_ARFR1_V1_8821C 0xffffffffffffffffL
 #define BIT_ARFR1_V1_8821C(x) (((x) & BIT_MASK_ARFR1_V1_8821C) << BIT_SHIFT_ARFR1_V1_8821C)
-#define BIT_GET_ARFR1_V1_8821C(x) (((x) >> BIT_SHIFT_ARFR1_V1_8821C) & BIT_MASK_ARFR1_V1_8821C)

+#define BIT_GET_ARFR1_V1_8821C(x) (((x) >> BIT_SHIFT_ARFR1_V1_8821C) & BIT_MASK_ARFR1_V1_8821C)
+
 
 
 /* 2 REG_CCK_CHECK_8821C */
@@ -5313,7 +5830,8 @@
 #define BIT_SHIFT_AMPDU_MAX_TIME_8821C 0
 #define BIT_MASK_AMPDU_MAX_TIME_8821C 0xff
 #define BIT_AMPDU_MAX_TIME_8821C(x) (((x) & BIT_MASK_AMPDU_MAX_TIME_8821C) << BIT_SHIFT_AMPDU_MAX_TIME_8821C)
-#define BIT_GET_AMPDU_MAX_TIME_8821C(x) (((x) >> BIT_SHIFT_AMPDU_MAX_TIME_8821C) & BIT_MASK_AMPDU_MAX_TIME_8821C)

+#define BIT_GET_AMPDU_MAX_TIME_8821C(x) (((x) >> BIT_SHIFT_AMPDU_MAX_TIME_8821C) & BIT_MASK_AMPDU_MAX_TIME_8821C)
+
 
 
 /* 2 REG_BCNQ1_BDNY_V1_8821C */
@@ -5321,7 +5839,8 @@
 #define BIT_SHIFT_BCNQ1_PGBNDY_V1_8821C 0
 #define BIT_MASK_BCNQ1_PGBNDY_V1_8821C 0xfff
 #define BIT_BCNQ1_PGBNDY_V1_8821C(x) (((x) & BIT_MASK_BCNQ1_PGBNDY_V1_8821C) << BIT_SHIFT_BCNQ1_PGBNDY_V1_8821C)
-#define BIT_GET_BCNQ1_PGBNDY_V1_8821C(x) (((x) >> BIT_SHIFT_BCNQ1_PGBNDY_V1_8821C) & BIT_MASK_BCNQ1_PGBNDY_V1_8821C)

+#define BIT_GET_BCNQ1_PGBNDY_V1_8821C(x) (((x) >> BIT_SHIFT_BCNQ1_PGBNDY_V1_8821C) & BIT_MASK_BCNQ1_PGBNDY_V1_8821C)
+
 
 
 /* 2 REG_AMPDU_MAX_LENGTH_8821C */
@@ -5329,7 +5848,8 @@
 #define BIT_SHIFT_AMPDU_MAX_LENGTH_8821C 0
 #define BIT_MASK_AMPDU_MAX_LENGTH_8821C 0xffffffffL
 #define BIT_AMPDU_MAX_LENGTH_8821C(x) (((x) & BIT_MASK_AMPDU_MAX_LENGTH_8821C) << BIT_SHIFT_AMPDU_MAX_LENGTH_8821C)
-#define BIT_GET_AMPDU_MAX_LENGTH_8821C(x) (((x) >> BIT_SHIFT_AMPDU_MAX_LENGTH_8821C) & BIT_MASK_AMPDU_MAX_LENGTH_8821C)

+#define BIT_GET_AMPDU_MAX_LENGTH_8821C(x) (((x) >> BIT_SHIFT_AMPDU_MAX_LENGTH_8821C) & BIT_MASK_AMPDU_MAX_LENGTH_8821C)
+
 
 
 /* 2 REG_ACQ_STOP_8821C */
@@ -5347,7 +5867,8 @@
 #define BIT_SHIFT_R_NDPA_RATE_V1_8821C 0
 #define BIT_MASK_R_NDPA_RATE_V1_8821C 0xff
 #define BIT_R_NDPA_RATE_V1_8821C(x) (((x) & BIT_MASK_R_NDPA_RATE_V1_8821C) << BIT_SHIFT_R_NDPA_RATE_V1_8821C)
-#define BIT_GET_R_NDPA_RATE_V1_8821C(x) (((x) >> BIT_SHIFT_R_NDPA_RATE_V1_8821C) & BIT_MASK_R_NDPA_RATE_V1_8821C)

+#define BIT_GET_R_NDPA_RATE_V1_8821C(x) (((x) >> BIT_SHIFT_R_NDPA_RATE_V1_8821C) & BIT_MASK_R_NDPA_RATE_V1_8821C)
+
 
 
 /* 2 REG_TX_HANG_CTRL_8821C */
@@ -5362,14 +5883,16 @@
 #define BIT_SHIFT_BW_SIGTA_8821C 3
 #define BIT_MASK_BW_SIGTA_8821C 0x3
 #define BIT_BW_SIGTA_8821C(x) (((x) & BIT_MASK_BW_SIGTA_8821C) << BIT_SHIFT_BW_SIGTA_8821C)
-#define BIT_GET_BW_SIGTA_8821C(x) (((x) >> BIT_SHIFT_BW_SIGTA_8821C) & BIT_MASK_BW_SIGTA_8821C)

+#define BIT_GET_BW_SIGTA_8821C(x) (((x) >> BIT_SHIFT_BW_SIGTA_8821C) & BIT_MASK_BW_SIGTA_8821C)
+
 
 #define BIT_EN_BAR_SIGTA_8821C BIT(2)
 
 #define BIT_SHIFT_R_NDPA_BW_8821C 0
 #define BIT_MASK_R_NDPA_BW_8821C 0x3
 #define BIT_R_NDPA_BW_8821C(x) (((x) & BIT_MASK_R_NDPA_BW_8821C) << BIT_SHIFT_R_NDPA_BW_8821C)
-#define BIT_GET_R_NDPA_BW_8821C(x) (((x) >> BIT_SHIFT_R_NDPA_BW_8821C) & BIT_MASK_R_NDPA_BW_8821C)

+#define BIT_GET_R_NDPA_BW_8821C(x) (((x) >> BIT_SHIFT_R_NDPA_BW_8821C) & BIT_MASK_R_NDPA_BW_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -5381,7 +5904,8 @@
 #define BIT_SHIFT_RD_RESP_PKT_TH_V1_8821C 0
 #define BIT_MASK_RD_RESP_PKT_TH_V1_8821C 0x3f
 #define BIT_RD_RESP_PKT_TH_V1_8821C(x) (((x) & BIT_MASK_RD_RESP_PKT_TH_V1_8821C) << BIT_SHIFT_RD_RESP_PKT_TH_V1_8821C)
-#define BIT_GET_RD_RESP_PKT_TH_V1_8821C(x) (((x) >> BIT_SHIFT_RD_RESP_PKT_TH_V1_8821C) & BIT_MASK_RD_RESP_PKT_TH_V1_8821C)

+#define BIT_GET_RD_RESP_PKT_TH_V1_8821C(x) (((x) >> BIT_SHIFT_RD_RESP_PKT_TH_V1_8821C) & BIT_MASK_RD_RESP_PKT_TH_V1_8821C)
+
 
 
 /* 2 REG_CMDQ_INFO_8821C */
@@ -5389,26 +5913,30 @@
 #define BIT_SHIFT_QUEUEMACID_CMDQ_V1_8821C 25
 #define BIT_MASK_QUEUEMACID_CMDQ_V1_8821C 0x7f
 #define BIT_QUEUEMACID_CMDQ_V1_8821C(x) (((x) & BIT_MASK_QUEUEMACID_CMDQ_V1_8821C) << BIT_SHIFT_QUEUEMACID_CMDQ_V1_8821C)
-#define BIT_GET_QUEUEMACID_CMDQ_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_CMDQ_V1_8821C) & BIT_MASK_QUEUEMACID_CMDQ_V1_8821C)

+#define BIT_GET_QUEUEMACID_CMDQ_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_CMDQ_V1_8821C) & BIT_MASK_QUEUEMACID_CMDQ_V1_8821C)
+
 
 
 #define BIT_SHIFT_QUEUEAC_CMDQ_V1_8821C 23
 #define BIT_MASK_QUEUEAC_CMDQ_V1_8821C 0x3
 #define BIT_QUEUEAC_CMDQ_V1_8821C(x) (((x) & BIT_MASK_QUEUEAC_CMDQ_V1_8821C) << BIT_SHIFT_QUEUEAC_CMDQ_V1_8821C)
-#define BIT_GET_QUEUEAC_CMDQ_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_CMDQ_V1_8821C) & BIT_MASK_QUEUEAC_CMDQ_V1_8821C)

+#define BIT_GET_QUEUEAC_CMDQ_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_CMDQ_V1_8821C) & BIT_MASK_QUEUEAC_CMDQ_V1_8821C)
+
 
 #define BIT_TIDEMPTY_CMDQ_V1_8821C BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_CMDQ_V2_8821C 11
 #define BIT_MASK_TAIL_PKT_CMDQ_V2_8821C 0x7ff
 #define BIT_TAIL_PKT_CMDQ_V2_8821C(x) (((x) & BIT_MASK_TAIL_PKT_CMDQ_V2_8821C) << BIT_SHIFT_TAIL_PKT_CMDQ_V2_8821C)
-#define BIT_GET_TAIL_PKT_CMDQ_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_CMDQ_V2_8821C) & BIT_MASK_TAIL_PKT_CMDQ_V2_8821C)

+#define BIT_GET_TAIL_PKT_CMDQ_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_CMDQ_V2_8821C) & BIT_MASK_TAIL_PKT_CMDQ_V2_8821C)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_CMDQ_V1_8821C 0
 #define BIT_MASK_HEAD_PKT_CMDQ_V1_8821C 0x7ff
 #define BIT_HEAD_PKT_CMDQ_V1_8821C(x) (((x) & BIT_MASK_HEAD_PKT_CMDQ_V1_8821C) << BIT_SHIFT_HEAD_PKT_CMDQ_V1_8821C)
-#define BIT_GET_HEAD_PKT_CMDQ_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_CMDQ_V1_8821C) & BIT_MASK_HEAD_PKT_CMDQ_V1_8821C)

+#define BIT_GET_HEAD_PKT_CMDQ_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_CMDQ_V1_8821C) & BIT_MASK_HEAD_PKT_CMDQ_V1_8821C)
+
 
 
 /* 2 REG_Q4_INFO_8821C */
@@ -5416,26 +5944,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q4_V1_8821C 25
 #define BIT_MASK_QUEUEMACID_Q4_V1_8821C 0x7f
 #define BIT_QUEUEMACID_Q4_V1_8821C(x) (((x) & BIT_MASK_QUEUEMACID_Q4_V1_8821C) << BIT_SHIFT_QUEUEMACID_Q4_V1_8821C)
-#define BIT_GET_QUEUEMACID_Q4_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q4_V1_8821C) & BIT_MASK_QUEUEMACID_Q4_V1_8821C)

+#define BIT_GET_QUEUEMACID_Q4_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q4_V1_8821C) & BIT_MASK_QUEUEMACID_Q4_V1_8821C)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q4_V1_8821C 23
 #define BIT_MASK_QUEUEAC_Q4_V1_8821C 0x3
 #define BIT_QUEUEAC_Q4_V1_8821C(x) (((x) & BIT_MASK_QUEUEAC_Q4_V1_8821C) << BIT_SHIFT_QUEUEAC_Q4_V1_8821C)
-#define BIT_GET_QUEUEAC_Q4_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_Q4_V1_8821C) & BIT_MASK_QUEUEAC_Q4_V1_8821C)

+#define BIT_GET_QUEUEAC_Q4_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_Q4_V1_8821C) & BIT_MASK_QUEUEAC_Q4_V1_8821C)
+
 
 #define BIT_TIDEMPTY_Q4_V1_8821C BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q4_V2_8821C 11
 #define BIT_MASK_TAIL_PKT_Q4_V2_8821C 0x7ff
 #define BIT_TAIL_PKT_Q4_V2_8821C(x) (((x) & BIT_MASK_TAIL_PKT_Q4_V2_8821C) << BIT_SHIFT_TAIL_PKT_Q4_V2_8821C)
-#define BIT_GET_TAIL_PKT_Q4_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q4_V2_8821C) & BIT_MASK_TAIL_PKT_Q4_V2_8821C)

+#define BIT_GET_TAIL_PKT_Q4_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q4_V2_8821C) & BIT_MASK_TAIL_PKT_Q4_V2_8821C)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q4_V1_8821C 0
 #define BIT_MASK_HEAD_PKT_Q4_V1_8821C 0x7ff
 #define BIT_HEAD_PKT_Q4_V1_8821C(x) (((x) & BIT_MASK_HEAD_PKT_Q4_V1_8821C) << BIT_SHIFT_HEAD_PKT_Q4_V1_8821C)
-#define BIT_GET_HEAD_PKT_Q4_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q4_V1_8821C) & BIT_MASK_HEAD_PKT_Q4_V1_8821C)

+#define BIT_GET_HEAD_PKT_Q4_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q4_V1_8821C) & BIT_MASK_HEAD_PKT_Q4_V1_8821C)
+
 
 
 /* 2 REG_Q5_INFO_8821C */
@@ -5443,26 +5975,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q5_V1_8821C 25
 #define BIT_MASK_QUEUEMACID_Q5_V1_8821C 0x7f
 #define BIT_QUEUEMACID_Q5_V1_8821C(x) (((x) & BIT_MASK_QUEUEMACID_Q5_V1_8821C) << BIT_SHIFT_QUEUEMACID_Q5_V1_8821C)
-#define BIT_GET_QUEUEMACID_Q5_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q5_V1_8821C) & BIT_MASK_QUEUEMACID_Q5_V1_8821C)

+#define BIT_GET_QUEUEMACID_Q5_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q5_V1_8821C) & BIT_MASK_QUEUEMACID_Q5_V1_8821C)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q5_V1_8821C 23
 #define BIT_MASK_QUEUEAC_Q5_V1_8821C 0x3
 #define BIT_QUEUEAC_Q5_V1_8821C(x) (((x) & BIT_MASK_QUEUEAC_Q5_V1_8821C) << BIT_SHIFT_QUEUEAC_Q5_V1_8821C)
-#define BIT_GET_QUEUEAC_Q5_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_Q5_V1_8821C) & BIT_MASK_QUEUEAC_Q5_V1_8821C)

+#define BIT_GET_QUEUEAC_Q5_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_Q5_V1_8821C) & BIT_MASK_QUEUEAC_Q5_V1_8821C)
+
 
 #define BIT_TIDEMPTY_Q5_V1_8821C BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q5_V2_8821C 11
 #define BIT_MASK_TAIL_PKT_Q5_V2_8821C 0x7ff
 #define BIT_TAIL_PKT_Q5_V2_8821C(x) (((x) & BIT_MASK_TAIL_PKT_Q5_V2_8821C) << BIT_SHIFT_TAIL_PKT_Q5_V2_8821C)
-#define BIT_GET_TAIL_PKT_Q5_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q5_V2_8821C) & BIT_MASK_TAIL_PKT_Q5_V2_8821C)

+#define BIT_GET_TAIL_PKT_Q5_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q5_V2_8821C) & BIT_MASK_TAIL_PKT_Q5_V2_8821C)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q5_V1_8821C 0
 #define BIT_MASK_HEAD_PKT_Q5_V1_8821C 0x7ff
 #define BIT_HEAD_PKT_Q5_V1_8821C(x) (((x) & BIT_MASK_HEAD_PKT_Q5_V1_8821C) << BIT_SHIFT_HEAD_PKT_Q5_V1_8821C)
-#define BIT_GET_HEAD_PKT_Q5_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q5_V1_8821C) & BIT_MASK_HEAD_PKT_Q5_V1_8821C)

+#define BIT_GET_HEAD_PKT_Q5_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q5_V1_8821C) & BIT_MASK_HEAD_PKT_Q5_V1_8821C)
+
 
 
 /* 2 REG_Q6_INFO_8821C */
@@ -5470,26 +6006,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q6_V1_8821C 25
 #define BIT_MASK_QUEUEMACID_Q6_V1_8821C 0x7f
 #define BIT_QUEUEMACID_Q6_V1_8821C(x) (((x) & BIT_MASK_QUEUEMACID_Q6_V1_8821C) << BIT_SHIFT_QUEUEMACID_Q6_V1_8821C)
-#define BIT_GET_QUEUEMACID_Q6_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q6_V1_8821C) & BIT_MASK_QUEUEMACID_Q6_V1_8821C)

+#define BIT_GET_QUEUEMACID_Q6_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q6_V1_8821C) & BIT_MASK_QUEUEMACID_Q6_V1_8821C)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q6_V1_8821C 23
 #define BIT_MASK_QUEUEAC_Q6_V1_8821C 0x3
 #define BIT_QUEUEAC_Q6_V1_8821C(x) (((x) & BIT_MASK_QUEUEAC_Q6_V1_8821C) << BIT_SHIFT_QUEUEAC_Q6_V1_8821C)
-#define BIT_GET_QUEUEAC_Q6_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_Q6_V1_8821C) & BIT_MASK_QUEUEAC_Q6_V1_8821C)

+#define BIT_GET_QUEUEAC_Q6_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_Q6_V1_8821C) & BIT_MASK_QUEUEAC_Q6_V1_8821C)
+
 
 #define BIT_TIDEMPTY_Q6_V1_8821C BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q6_V2_8821C 11
 #define BIT_MASK_TAIL_PKT_Q6_V2_8821C 0x7ff
 #define BIT_TAIL_PKT_Q6_V2_8821C(x) (((x) & BIT_MASK_TAIL_PKT_Q6_V2_8821C) << BIT_SHIFT_TAIL_PKT_Q6_V2_8821C)
-#define BIT_GET_TAIL_PKT_Q6_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q6_V2_8821C) & BIT_MASK_TAIL_PKT_Q6_V2_8821C)

+#define BIT_GET_TAIL_PKT_Q6_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q6_V2_8821C) & BIT_MASK_TAIL_PKT_Q6_V2_8821C)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q6_V1_8821C 0
 #define BIT_MASK_HEAD_PKT_Q6_V1_8821C 0x7ff
 #define BIT_HEAD_PKT_Q6_V1_8821C(x) (((x) & BIT_MASK_HEAD_PKT_Q6_V1_8821C) << BIT_SHIFT_HEAD_PKT_Q6_V1_8821C)
-#define BIT_GET_HEAD_PKT_Q6_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q6_V1_8821C) & BIT_MASK_HEAD_PKT_Q6_V1_8821C)

+#define BIT_GET_HEAD_PKT_Q6_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q6_V1_8821C) & BIT_MASK_HEAD_PKT_Q6_V1_8821C)
+
 
 
 /* 2 REG_Q7_INFO_8821C */
@@ -5497,26 +6037,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q7_V1_8821C 25
 #define BIT_MASK_QUEUEMACID_Q7_V1_8821C 0x7f
 #define BIT_QUEUEMACID_Q7_V1_8821C(x) (((x) & BIT_MASK_QUEUEMACID_Q7_V1_8821C) << BIT_SHIFT_QUEUEMACID_Q7_V1_8821C)
-#define BIT_GET_QUEUEMACID_Q7_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q7_V1_8821C) & BIT_MASK_QUEUEMACID_Q7_V1_8821C)

+#define BIT_GET_QUEUEMACID_Q7_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q7_V1_8821C) & BIT_MASK_QUEUEMACID_Q7_V1_8821C)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q7_V1_8821C 23
 #define BIT_MASK_QUEUEAC_Q7_V1_8821C 0x3
 #define BIT_QUEUEAC_Q7_V1_8821C(x) (((x) & BIT_MASK_QUEUEAC_Q7_V1_8821C) << BIT_SHIFT_QUEUEAC_Q7_V1_8821C)
-#define BIT_GET_QUEUEAC_Q7_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_Q7_V1_8821C) & BIT_MASK_QUEUEAC_Q7_V1_8821C)

+#define BIT_GET_QUEUEAC_Q7_V1_8821C(x) (((x) >> BIT_SHIFT_QUEUEAC_Q7_V1_8821C) & BIT_MASK_QUEUEAC_Q7_V1_8821C)
+
 
 #define BIT_TIDEMPTY_Q7_V1_8821C BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q7_V2_8821C 11
 #define BIT_MASK_TAIL_PKT_Q7_V2_8821C 0x7ff
 #define BIT_TAIL_PKT_Q7_V2_8821C(x) (((x) & BIT_MASK_TAIL_PKT_Q7_V2_8821C) << BIT_SHIFT_TAIL_PKT_Q7_V2_8821C)
-#define BIT_GET_TAIL_PKT_Q7_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q7_V2_8821C) & BIT_MASK_TAIL_PKT_Q7_V2_8821C)

+#define BIT_GET_TAIL_PKT_Q7_V2_8821C(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q7_V2_8821C) & BIT_MASK_TAIL_PKT_Q7_V2_8821C)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q7_V1_8821C 0
 #define BIT_MASK_HEAD_PKT_Q7_V1_8821C 0x7ff
 #define BIT_HEAD_PKT_Q7_V1_8821C(x) (((x) & BIT_MASK_HEAD_PKT_Q7_V1_8821C) << BIT_SHIFT_HEAD_PKT_Q7_V1_8821C)
-#define BIT_GET_HEAD_PKT_Q7_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q7_V1_8821C) & BIT_MASK_HEAD_PKT_Q7_V1_8821C)

+#define BIT_GET_HEAD_PKT_Q7_V1_8821C(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q7_V1_8821C) & BIT_MASK_HEAD_PKT_Q7_V1_8821C)
+
 
 
 /* 2 REG_WMAC_LBK_BUF_HD_V1_8821C */
@@ -5524,7 +6068,8 @@
 #define BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8821C 0
 #define BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8821C 0xfff
 #define BIT_WMAC_LBK_BUF_HEAD_V1_8821C(x) (((x) & BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8821C) << BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8821C)
-#define BIT_GET_WMAC_LBK_BUF_HEAD_V1_8821C(x) (((x) >> BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8821C) & BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8821C)

+#define BIT_GET_WMAC_LBK_BUF_HEAD_V1_8821C(x) (((x) >> BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8821C) & BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8821C)
+
 
 
 /* 2 REG_MGQ_BDNY_V1_8821C */
@@ -5532,7 +6077,8 @@
 #define BIT_SHIFT_MGQ_PGBNDY_V1_8821C 0
 #define BIT_MASK_MGQ_PGBNDY_V1_8821C 0xfff
 #define BIT_MGQ_PGBNDY_V1_8821C(x) (((x) & BIT_MASK_MGQ_PGBNDY_V1_8821C) << BIT_SHIFT_MGQ_PGBNDY_V1_8821C)
-#define BIT_GET_MGQ_PGBNDY_V1_8821C(x) (((x) >> BIT_SHIFT_MGQ_PGBNDY_V1_8821C) & BIT_MASK_MGQ_PGBNDY_V1_8821C)

+#define BIT_GET_MGQ_PGBNDY_V1_8821C(x) (((x) >> BIT_SHIFT_MGQ_PGBNDY_V1_8821C) & BIT_MASK_MGQ_PGBNDY_V1_8821C)
+
 
 
 /* 2 REG_TXRPT_CTRL_8821C */
@@ -5540,25 +6086,29 @@
 #define BIT_SHIFT_TRXRPT_TIMER_TH_8821C 24
 #define BIT_MASK_TRXRPT_TIMER_TH_8821C 0xff
 #define BIT_TRXRPT_TIMER_TH_8821C(x) (((x) & BIT_MASK_TRXRPT_TIMER_TH_8821C) << BIT_SHIFT_TRXRPT_TIMER_TH_8821C)
-#define BIT_GET_TRXRPT_TIMER_TH_8821C(x) (((x) >> BIT_SHIFT_TRXRPT_TIMER_TH_8821C) & BIT_MASK_TRXRPT_TIMER_TH_8821C)

+#define BIT_GET_TRXRPT_TIMER_TH_8821C(x) (((x) >> BIT_SHIFT_TRXRPT_TIMER_TH_8821C) & BIT_MASK_TRXRPT_TIMER_TH_8821C)
+
 
 
 #define BIT_SHIFT_TRXRPT_LEN_TH_8821C 16
 #define BIT_MASK_TRXRPT_LEN_TH_8821C 0xff
 #define BIT_TRXRPT_LEN_TH_8821C(x) (((x) & BIT_MASK_TRXRPT_LEN_TH_8821C) << BIT_SHIFT_TRXRPT_LEN_TH_8821C)
-#define BIT_GET_TRXRPT_LEN_TH_8821C(x) (((x) >> BIT_SHIFT_TRXRPT_LEN_TH_8821C) & BIT_MASK_TRXRPT_LEN_TH_8821C)

+#define BIT_GET_TRXRPT_LEN_TH_8821C(x) (((x) >> BIT_SHIFT_TRXRPT_LEN_TH_8821C) & BIT_MASK_TRXRPT_LEN_TH_8821C)
+
 
 
 #define BIT_SHIFT_TRXRPT_READ_PTR_8821C 8
 #define BIT_MASK_TRXRPT_READ_PTR_8821C 0xff
 #define BIT_TRXRPT_READ_PTR_8821C(x) (((x) & BIT_MASK_TRXRPT_READ_PTR_8821C) << BIT_SHIFT_TRXRPT_READ_PTR_8821C)
-#define BIT_GET_TRXRPT_READ_PTR_8821C(x) (((x) >> BIT_SHIFT_TRXRPT_READ_PTR_8821C) & BIT_MASK_TRXRPT_READ_PTR_8821C)

+#define BIT_GET_TRXRPT_READ_PTR_8821C(x) (((x) >> BIT_SHIFT_TRXRPT_READ_PTR_8821C) & BIT_MASK_TRXRPT_READ_PTR_8821C)
+
 
 
 #define BIT_SHIFT_TRXRPT_WRITE_PTR_8821C 0
 #define BIT_MASK_TRXRPT_WRITE_PTR_8821C 0xff
 #define BIT_TRXRPT_WRITE_PTR_8821C(x) (((x) & BIT_MASK_TRXRPT_WRITE_PTR_8821C) << BIT_SHIFT_TRXRPT_WRITE_PTR_8821C)
-#define BIT_GET_TRXRPT_WRITE_PTR_8821C(x) (((x) >> BIT_SHIFT_TRXRPT_WRITE_PTR_8821C) & BIT_MASK_TRXRPT_WRITE_PTR_8821C)

+#define BIT_GET_TRXRPT_WRITE_PTR_8821C(x) (((x) >> BIT_SHIFT_TRXRPT_WRITE_PTR_8821C) & BIT_MASK_TRXRPT_WRITE_PTR_8821C)
+
 
 
 /* 2 REG_INIRTS_RATE_SEL_8821C */
@@ -5569,7 +6119,8 @@
 #define BIT_SHIFT_BASIC_CFEND_RATE_8821C 0
 #define BIT_MASK_BASIC_CFEND_RATE_8821C 0x1f
 #define BIT_BASIC_CFEND_RATE_8821C(x) (((x) & BIT_MASK_BASIC_CFEND_RATE_8821C) << BIT_SHIFT_BASIC_CFEND_RATE_8821C)
-#define BIT_GET_BASIC_CFEND_RATE_8821C(x) (((x) >> BIT_SHIFT_BASIC_CFEND_RATE_8821C) & BIT_MASK_BASIC_CFEND_RATE_8821C)

+#define BIT_GET_BASIC_CFEND_RATE_8821C(x) (((x) >> BIT_SHIFT_BASIC_CFEND_RATE_8821C) & BIT_MASK_BASIC_CFEND_RATE_8821C)
+
 
 
 /* 2 REG_STBC_CFEND_RATE_8821C */
@@ -5577,7 +6128,8 @@
 #define BIT_SHIFT_STBC_CFEND_RATE_8821C 0
 #define BIT_MASK_STBC_CFEND_RATE_8821C 0x1f
 #define BIT_STBC_CFEND_RATE_8821C(x) (((x) & BIT_MASK_STBC_CFEND_RATE_8821C) << BIT_SHIFT_STBC_CFEND_RATE_8821C)
-#define BIT_GET_STBC_CFEND_RATE_8821C(x) (((x) >> BIT_SHIFT_STBC_CFEND_RATE_8821C) & BIT_MASK_STBC_CFEND_RATE_8821C)

+#define BIT_GET_STBC_CFEND_RATE_8821C(x) (((x) >> BIT_SHIFT_STBC_CFEND_RATE_8821C) & BIT_MASK_STBC_CFEND_RATE_8821C)
+
 
 
 /* 2 REG_DATA_SC_8821C */
@@ -5585,13 +6137,15 @@
 #define BIT_SHIFT_TXSC_40M_8821C 4
 #define BIT_MASK_TXSC_40M_8821C 0xf
 #define BIT_TXSC_40M_8821C(x) (((x) & BIT_MASK_TXSC_40M_8821C) << BIT_SHIFT_TXSC_40M_8821C)
-#define BIT_GET_TXSC_40M_8821C(x) (((x) >> BIT_SHIFT_TXSC_40M_8821C) & BIT_MASK_TXSC_40M_8821C)

+#define BIT_GET_TXSC_40M_8821C(x) (((x) >> BIT_SHIFT_TXSC_40M_8821C) & BIT_MASK_TXSC_40M_8821C)
+
 
 
 #define BIT_SHIFT_TXSC_20M_8821C 0
 #define BIT_MASK_TXSC_20M_8821C 0xf
 #define BIT_TXSC_20M_8821C(x) (((x) & BIT_MASK_TXSC_20M_8821C) << BIT_SHIFT_TXSC_20M_8821C)
-#define BIT_GET_TXSC_20M_8821C(x) (((x) >> BIT_SHIFT_TXSC_20M_8821C) & BIT_MASK_TXSC_20M_8821C)

+#define BIT_GET_TXSC_20M_8821C(x) (((x) >> BIT_SHIFT_TXSC_20M_8821C) & BIT_MASK_TXSC_20M_8821C)
+
 
 
 /* 2 REG_MACID_SLEEP3_8821C */
@@ -5599,7 +6153,8 @@
 #define BIT_SHIFT_MACID127_96_PKTSLEEP_8821C 0
 #define BIT_MASK_MACID127_96_PKTSLEEP_8821C 0xffffffffL
 #define BIT_MACID127_96_PKTSLEEP_8821C(x) (((x) & BIT_MASK_MACID127_96_PKTSLEEP_8821C) << BIT_SHIFT_MACID127_96_PKTSLEEP_8821C)
-#define BIT_GET_MACID127_96_PKTSLEEP_8821C(x) (((x) >> BIT_SHIFT_MACID127_96_PKTSLEEP_8821C) & BIT_MASK_MACID127_96_PKTSLEEP_8821C)

+#define BIT_GET_MACID127_96_PKTSLEEP_8821C(x) (((x) >> BIT_SHIFT_MACID127_96_PKTSLEEP_8821C) & BIT_MASK_MACID127_96_PKTSLEEP_8821C)
+
 
 
 /* 2 REG_MACID_SLEEP1_8821C */
@@ -5607,7 +6162,8 @@
 #define BIT_SHIFT_MACID63_32_PKTSLEEP_8821C 0
 #define BIT_MASK_MACID63_32_PKTSLEEP_8821C 0xffffffffL
 #define BIT_MACID63_32_PKTSLEEP_8821C(x) (((x) & BIT_MASK_MACID63_32_PKTSLEEP_8821C) << BIT_SHIFT_MACID63_32_PKTSLEEP_8821C)
-#define BIT_GET_MACID63_32_PKTSLEEP_8821C(x) (((x) >> BIT_SHIFT_MACID63_32_PKTSLEEP_8821C) & BIT_MASK_MACID63_32_PKTSLEEP_8821C)

+#define BIT_GET_MACID63_32_PKTSLEEP_8821C(x) (((x) >> BIT_SHIFT_MACID63_32_PKTSLEEP_8821C) & BIT_MASK_MACID63_32_PKTSLEEP_8821C)
+
 
 
 /* 2 REG_ARFR2_V1_8821C */
@@ -5615,7 +6171,8 @@
 #define BIT_SHIFT_ARFR2_V1_8821C 0
 #define BIT_MASK_ARFR2_V1_8821C 0xffffffffffffffffL
 #define BIT_ARFR2_V1_8821C(x) (((x) & BIT_MASK_ARFR2_V1_8821C) << BIT_SHIFT_ARFR2_V1_8821C)
-#define BIT_GET_ARFR2_V1_8821C(x) (((x) >> BIT_SHIFT_ARFR2_V1_8821C) & BIT_MASK_ARFR2_V1_8821C)

+#define BIT_GET_ARFR2_V1_8821C(x) (((x) >> BIT_SHIFT_ARFR2_V1_8821C) & BIT_MASK_ARFR2_V1_8821C)
+
 
 
 /* 2 REG_ARFR3_V1_8821C */
@@ -5623,7 +6180,8 @@
 #define BIT_SHIFT_ARFR3_V1_8821C 0
 #define BIT_MASK_ARFR3_V1_8821C 0xffffffffffffffffL
 #define BIT_ARFR3_V1_8821C(x) (((x) & BIT_MASK_ARFR3_V1_8821C) << BIT_SHIFT_ARFR3_V1_8821C)
-#define BIT_GET_ARFR3_V1_8821C(x) (((x) >> BIT_SHIFT_ARFR3_V1_8821C) & BIT_MASK_ARFR3_V1_8821C)

+#define BIT_GET_ARFR3_V1_8821C(x) (((x) >> BIT_SHIFT_ARFR3_V1_8821C) & BIT_MASK_ARFR3_V1_8821C)
+
 
 
 /* 2 REG_ARFR4_8821C */
@@ -5631,7 +6189,8 @@
 #define BIT_SHIFT_ARFR4_8821C 0
 #define BIT_MASK_ARFR4_8821C 0xffffffffffffffffL
 #define BIT_ARFR4_8821C(x) (((x) & BIT_MASK_ARFR4_8821C) << BIT_SHIFT_ARFR4_8821C)
-#define BIT_GET_ARFR4_8821C(x) (((x) >> BIT_SHIFT_ARFR4_8821C) & BIT_MASK_ARFR4_8821C)

+#define BIT_GET_ARFR4_8821C(x) (((x) >> BIT_SHIFT_ARFR4_8821C) & BIT_MASK_ARFR4_8821C)
+
 
 
 /* 2 REG_ARFR5_8821C */
@@ -5639,7 +6198,8 @@
 #define BIT_SHIFT_ARFR5_8821C 0
 #define BIT_MASK_ARFR5_8821C 0xffffffffffffffffL
 #define BIT_ARFR5_8821C(x) (((x) & BIT_MASK_ARFR5_8821C) << BIT_SHIFT_ARFR5_8821C)
-#define BIT_GET_ARFR5_8821C(x) (((x) >> BIT_SHIFT_ARFR5_8821C) & BIT_MASK_ARFR5_8821C)

+#define BIT_GET_ARFR5_8821C(x) (((x) >> BIT_SHIFT_ARFR5_8821C) & BIT_MASK_ARFR5_8821C)
+
 
 
 /* 2 REG_TXRPT_START_OFFSET_8821C */
@@ -5647,20 +6207,23 @@
 #define BIT_SHIFT_R_MUTAB_TXRPT_OFFSET_8821C 24
 #define BIT_MASK_R_MUTAB_TXRPT_OFFSET_8821C 0xff
 #define BIT_R_MUTAB_TXRPT_OFFSET_8821C(x) (((x) & BIT_MASK_R_MUTAB_TXRPT_OFFSET_8821C) << BIT_SHIFT_R_MUTAB_TXRPT_OFFSET_8821C)
-#define BIT_GET_R_MUTAB_TXRPT_OFFSET_8821C(x) (((x) >> BIT_SHIFT_R_MUTAB_TXRPT_OFFSET_8821C) & BIT_MASK_R_MUTAB_TXRPT_OFFSET_8821C)

+#define BIT_GET_R_MUTAB_TXRPT_OFFSET_8821C(x) (((x) >> BIT_SHIFT_R_MUTAB_TXRPT_OFFSET_8821C) & BIT_MASK_R_MUTAB_TXRPT_OFFSET_8821C)
+
 
 #define BIT__R_RPTFIFO_1K_8821C BIT(16)
 
 #define BIT_SHIFT_MACID_CTRL_OFFSET_8821C 8
 #define BIT_MASK_MACID_CTRL_OFFSET_8821C 0xff
 #define BIT_MACID_CTRL_OFFSET_8821C(x) (((x) & BIT_MASK_MACID_CTRL_OFFSET_8821C) << BIT_SHIFT_MACID_CTRL_OFFSET_8821C)
-#define BIT_GET_MACID_CTRL_OFFSET_8821C(x) (((x) >> BIT_SHIFT_MACID_CTRL_OFFSET_8821C) & BIT_MASK_MACID_CTRL_OFFSET_8821C)

+#define BIT_GET_MACID_CTRL_OFFSET_8821C(x) (((x) >> BIT_SHIFT_MACID_CTRL_OFFSET_8821C) & BIT_MASK_MACID_CTRL_OFFSET_8821C)
+
 
 
 #define BIT_SHIFT_AMPDU_TXRPT_OFFSET_8821C 0
 #define BIT_MASK_AMPDU_TXRPT_OFFSET_8821C 0xff
 #define BIT_AMPDU_TXRPT_OFFSET_8821C(x) (((x) & BIT_MASK_AMPDU_TXRPT_OFFSET_8821C) << BIT_SHIFT_AMPDU_TXRPT_OFFSET_8821C)
-#define BIT_GET_AMPDU_TXRPT_OFFSET_8821C(x) (((x) >> BIT_SHIFT_AMPDU_TXRPT_OFFSET_8821C) & BIT_MASK_AMPDU_TXRPT_OFFSET_8821C)

+#define BIT_GET_AMPDU_TXRPT_OFFSET_8821C(x) (((x) >> BIT_SHIFT_AMPDU_TXRPT_OFFSET_8821C) & BIT_MASK_AMPDU_TXRPT_OFFSET_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -5678,7 +6241,8 @@
 #define BIT_SHIFT_POWER_STAGE1_8821C 0
 #define BIT_MASK_POWER_STAGE1_8821C 0xffffff
 #define BIT_POWER_STAGE1_8821C(x) (((x) & BIT_MASK_POWER_STAGE1_8821C) << BIT_SHIFT_POWER_STAGE1_8821C)
-#define BIT_GET_POWER_STAGE1_8821C(x) (((x) >> BIT_SHIFT_POWER_STAGE1_8821C) & BIT_MASK_POWER_STAGE1_8821C)

+#define BIT_GET_POWER_STAGE1_8821C(x) (((x) >> BIT_SHIFT_POWER_STAGE1_8821C) & BIT_MASK_POWER_STAGE1_8821C)
+
 
 
 /* 2 REG_POWER_STAGE2_8821C */
@@ -5687,7 +6251,8 @@
 #define BIT_SHIFT_POWER_STAGE2_8821C 0
 #define BIT_MASK_POWER_STAGE2_8821C 0xffffff
 #define BIT_POWER_STAGE2_8821C(x) (((x) & BIT_MASK_POWER_STAGE2_8821C) << BIT_SHIFT_POWER_STAGE2_8821C)
-#define BIT_GET_POWER_STAGE2_8821C(x) (((x) >> BIT_SHIFT_POWER_STAGE2_8821C) & BIT_MASK_POWER_STAGE2_8821C)

+#define BIT_GET_POWER_STAGE2_8821C(x) (((x) >> BIT_SHIFT_POWER_STAGE2_8821C) & BIT_MASK_POWER_STAGE2_8821C)
+
 
 
 /* 2 REG_SW_AMPDU_BURST_MODE_CTRL_8821C */
@@ -5695,7 +6260,8 @@
 #define BIT_SHIFT_PAD_NUM_THRES_8821C 24
 #define BIT_MASK_PAD_NUM_THRES_8821C 0x3f
 #define BIT_PAD_NUM_THRES_8821C(x) (((x) & BIT_MASK_PAD_NUM_THRES_8821C) << BIT_SHIFT_PAD_NUM_THRES_8821C)
-#define BIT_GET_PAD_NUM_THRES_8821C(x) (((x) >> BIT_SHIFT_PAD_NUM_THRES_8821C) & BIT_MASK_PAD_NUM_THRES_8821C)

+#define BIT_GET_PAD_NUM_THRES_8821C(x) (((x) >> BIT_SHIFT_PAD_NUM_THRES_8821C) & BIT_MASK_PAD_NUM_THRES_8821C)
+
 
 #define BIT_R_DMA_THIS_QUEUE_BK_8821C BIT(23)
 #define BIT_R_DMA_THIS_QUEUE_BE_8821C BIT(22)
@@ -5705,7 +6271,8 @@
 #define BIT_SHIFT_R_TOTAL_LEN_TH_8821C 8
 #define BIT_MASK_R_TOTAL_LEN_TH_8821C 0xfff
 #define BIT_R_TOTAL_LEN_TH_8821C(x) (((x) & BIT_MASK_R_TOTAL_LEN_TH_8821C) << BIT_SHIFT_R_TOTAL_LEN_TH_8821C)
-#define BIT_GET_R_TOTAL_LEN_TH_8821C(x) (((x) >> BIT_SHIFT_R_TOTAL_LEN_TH_8821C) & BIT_MASK_R_TOTAL_LEN_TH_8821C)

+#define BIT_GET_R_TOTAL_LEN_TH_8821C(x) (((x) >> BIT_SHIFT_R_TOTAL_LEN_TH_8821C) & BIT_MASK_R_TOTAL_LEN_TH_8821C)
+
 
 #define BIT_EN_NEW_EARLY_8821C BIT(7)
 #define BIT_PRE_TX_CMD_8821C BIT(6)
@@ -5713,7 +6280,8 @@
 #define BIT_SHIFT_NUM_SCL_EN_8821C 4
 #define BIT_MASK_NUM_SCL_EN_8821C 0x3
 #define BIT_NUM_SCL_EN_8821C(x) (((x) & BIT_MASK_NUM_SCL_EN_8821C) << BIT_SHIFT_NUM_SCL_EN_8821C)
-#define BIT_GET_NUM_SCL_EN_8821C(x) (((x) >> BIT_SHIFT_NUM_SCL_EN_8821C) & BIT_MASK_NUM_SCL_EN_8821C)

+#define BIT_GET_NUM_SCL_EN_8821C(x) (((x) >> BIT_SHIFT_NUM_SCL_EN_8821C) & BIT_MASK_NUM_SCL_EN_8821C)
+
 
 #define BIT_BK_EN_8821C BIT(3)
 #define BIT_BE_EN_8821C BIT(2)
@@ -5725,13 +6293,15 @@
 #define BIT_SHIFT_PKT_LIFTIME_BEBK_8821C 16
 #define BIT_MASK_PKT_LIFTIME_BEBK_8821C 0xffff
 #define BIT_PKT_LIFTIME_BEBK_8821C(x) (((x) & BIT_MASK_PKT_LIFTIME_BEBK_8821C) << BIT_SHIFT_PKT_LIFTIME_BEBK_8821C)
-#define BIT_GET_PKT_LIFTIME_BEBK_8821C(x) (((x) >> BIT_SHIFT_PKT_LIFTIME_BEBK_8821C) & BIT_MASK_PKT_LIFTIME_BEBK_8821C)

+#define BIT_GET_PKT_LIFTIME_BEBK_8821C(x) (((x) >> BIT_SHIFT_PKT_LIFTIME_BEBK_8821C) & BIT_MASK_PKT_LIFTIME_BEBK_8821C)
+
 
 
 #define BIT_SHIFT_PKT_LIFTIME_VOVI_8821C 0
 #define BIT_MASK_PKT_LIFTIME_VOVI_8821C 0xffff
 #define BIT_PKT_LIFTIME_VOVI_8821C(x) (((x) & BIT_MASK_PKT_LIFTIME_VOVI_8821C) << BIT_SHIFT_PKT_LIFTIME_VOVI_8821C)
-#define BIT_GET_PKT_LIFTIME_VOVI_8821C(x) (((x) >> BIT_SHIFT_PKT_LIFTIME_VOVI_8821C) & BIT_MASK_PKT_LIFTIME_VOVI_8821C)

+#define BIT_GET_PKT_LIFTIME_VOVI_8821C(x) (((x) >> BIT_SHIFT_PKT_LIFTIME_VOVI_8821C) & BIT_MASK_PKT_LIFTIME_VOVI_8821C)
+
 
 
 /* 2 REG_STBC_SETTING_8821C */
@@ -5739,19 +6309,22 @@
 #define BIT_SHIFT_CDEND_TXTIME_L_8821C 4
 #define BIT_MASK_CDEND_TXTIME_L_8821C 0xf
 #define BIT_CDEND_TXTIME_L_8821C(x) (((x) & BIT_MASK_CDEND_TXTIME_L_8821C) << BIT_SHIFT_CDEND_TXTIME_L_8821C)
-#define BIT_GET_CDEND_TXTIME_L_8821C(x) (((x) >> BIT_SHIFT_CDEND_TXTIME_L_8821C) & BIT_MASK_CDEND_TXTIME_L_8821C)

+#define BIT_GET_CDEND_TXTIME_L_8821C(x) (((x) >> BIT_SHIFT_CDEND_TXTIME_L_8821C) & BIT_MASK_CDEND_TXTIME_L_8821C)
+
 
 
 #define BIT_SHIFT_NESS_8821C 2
 #define BIT_MASK_NESS_8821C 0x3
 #define BIT_NESS_8821C(x) (((x) & BIT_MASK_NESS_8821C) << BIT_SHIFT_NESS_8821C)
-#define BIT_GET_NESS_8821C(x) (((x) >> BIT_SHIFT_NESS_8821C) & BIT_MASK_NESS_8821C)

+#define BIT_GET_NESS_8821C(x) (((x) >> BIT_SHIFT_NESS_8821C) & BIT_MASK_NESS_8821C)
+
 
 
 #define BIT_SHIFT_STBC_CFEND_8821C 0
 #define BIT_MASK_STBC_CFEND_8821C 0x3
 #define BIT_STBC_CFEND_8821C(x) (((x) & BIT_MASK_STBC_CFEND_8821C) << BIT_SHIFT_STBC_CFEND_8821C)
-#define BIT_GET_STBC_CFEND_8821C(x) (((x) >> BIT_SHIFT_STBC_CFEND_8821C) & BIT_MASK_STBC_CFEND_8821C)

+#define BIT_GET_STBC_CFEND_8821C(x) (((x) >> BIT_SHIFT_STBC_CFEND_8821C) & BIT_MASK_STBC_CFEND_8821C)
+
 
 
 /* 2 REG_STBC_SETTING2_8821C */
@@ -5759,7 +6332,8 @@
 #define BIT_SHIFT_CDEND_TXTIME_H_8821C 0
 #define BIT_MASK_CDEND_TXTIME_H_8821C 0x1f
 #define BIT_CDEND_TXTIME_H_8821C(x) (((x) & BIT_MASK_CDEND_TXTIME_H_8821C) << BIT_SHIFT_CDEND_TXTIME_H_8821C)
-#define BIT_GET_CDEND_TXTIME_H_8821C(x) (((x) >> BIT_SHIFT_CDEND_TXTIME_H_8821C) & BIT_MASK_CDEND_TXTIME_H_8821C)

+#define BIT_GET_CDEND_TXTIME_H_8821C(x) (((x) >> BIT_SHIFT_CDEND_TXTIME_H_8821C) & BIT_MASK_CDEND_TXTIME_H_8821C)
+
 
 
 /* 2 REG_QUEUE_CTRL_8821C */
@@ -5778,25 +6352,29 @@
 #define BIT_SHIFT_RTS_MAX_AGG_NUM_8821C 24
 #define BIT_MASK_RTS_MAX_AGG_NUM_8821C 0x3f
 #define BIT_RTS_MAX_AGG_NUM_8821C(x) (((x) & BIT_MASK_RTS_MAX_AGG_NUM_8821C) << BIT_SHIFT_RTS_MAX_AGG_NUM_8821C)
-#define BIT_GET_RTS_MAX_AGG_NUM_8821C(x) (((x) >> BIT_SHIFT_RTS_MAX_AGG_NUM_8821C) & BIT_MASK_RTS_MAX_AGG_NUM_8821C)

+#define BIT_GET_RTS_MAX_AGG_NUM_8821C(x) (((x) >> BIT_SHIFT_RTS_MAX_AGG_NUM_8821C) & BIT_MASK_RTS_MAX_AGG_NUM_8821C)
+
 
 
 #define BIT_SHIFT_MAX_AGG_NUM_8821C 16
 #define BIT_MASK_MAX_AGG_NUM_8821C 0x3f
 #define BIT_MAX_AGG_NUM_8821C(x) (((x) & BIT_MASK_MAX_AGG_NUM_8821C) << BIT_SHIFT_MAX_AGG_NUM_8821C)
-#define BIT_GET_MAX_AGG_NUM_8821C(x) (((x) >> BIT_SHIFT_MAX_AGG_NUM_8821C) & BIT_MASK_MAX_AGG_NUM_8821C)

+#define BIT_GET_MAX_AGG_NUM_8821C(x) (((x) >> BIT_SHIFT_MAX_AGG_NUM_8821C) & BIT_MASK_MAX_AGG_NUM_8821C)
+
 
 
 #define BIT_SHIFT_RTS_TXTIME_TH_8821C 8
 #define BIT_MASK_RTS_TXTIME_TH_8821C 0xff
 #define BIT_RTS_TXTIME_TH_8821C(x) (((x) & BIT_MASK_RTS_TXTIME_TH_8821C) << BIT_SHIFT_RTS_TXTIME_TH_8821C)
-#define BIT_GET_RTS_TXTIME_TH_8821C(x) (((x) >> BIT_SHIFT_RTS_TXTIME_TH_8821C) & BIT_MASK_RTS_TXTIME_TH_8821C)

+#define BIT_GET_RTS_TXTIME_TH_8821C(x) (((x) >> BIT_SHIFT_RTS_TXTIME_TH_8821C) & BIT_MASK_RTS_TXTIME_TH_8821C)
+
 
 
 #define BIT_SHIFT_RTS_LEN_TH_8821C 0
 #define BIT_MASK_RTS_LEN_TH_8821C 0xff
 #define BIT_RTS_LEN_TH_8821C(x) (((x) & BIT_MASK_RTS_LEN_TH_8821C) << BIT_SHIFT_RTS_LEN_TH_8821C)
-#define BIT_GET_RTS_LEN_TH_8821C(x) (((x) >> BIT_SHIFT_RTS_LEN_TH_8821C) & BIT_MASK_RTS_LEN_TH_8821C)

+#define BIT_GET_RTS_LEN_TH_8821C(x) (((x) >> BIT_SHIFT_RTS_LEN_TH_8821C) & BIT_MASK_RTS_LEN_TH_8821C)
+
 
 
 /* 2 REG_BAR_MODE_CTRL_8821C */
@@ -5804,20 +6382,23 @@
 #define BIT_SHIFT_BAR_RTY_LMT_8821C 16
 #define BIT_MASK_BAR_RTY_LMT_8821C 0x3
 #define BIT_BAR_RTY_LMT_8821C(x) (((x) & BIT_MASK_BAR_RTY_LMT_8821C) << BIT_SHIFT_BAR_RTY_LMT_8821C)
-#define BIT_GET_BAR_RTY_LMT_8821C(x) (((x) >> BIT_SHIFT_BAR_RTY_LMT_8821C) & BIT_MASK_BAR_RTY_LMT_8821C)

+#define BIT_GET_BAR_RTY_LMT_8821C(x) (((x) >> BIT_SHIFT_BAR_RTY_LMT_8821C) & BIT_MASK_BAR_RTY_LMT_8821C)
+
 
 
 #define BIT_SHIFT_BAR_PKT_TXTIME_TH_8821C 8
 #define BIT_MASK_BAR_PKT_TXTIME_TH_8821C 0xff
 #define BIT_BAR_PKT_TXTIME_TH_8821C(x) (((x) & BIT_MASK_BAR_PKT_TXTIME_TH_8821C) << BIT_SHIFT_BAR_PKT_TXTIME_TH_8821C)
-#define BIT_GET_BAR_PKT_TXTIME_TH_8821C(x) (((x) >> BIT_SHIFT_BAR_PKT_TXTIME_TH_8821C) & BIT_MASK_BAR_PKT_TXTIME_TH_8821C)

+#define BIT_GET_BAR_PKT_TXTIME_TH_8821C(x) (((x) >> BIT_SHIFT_BAR_PKT_TXTIME_TH_8821C) & BIT_MASK_BAR_PKT_TXTIME_TH_8821C)
+
 
 #define BIT_BAR_EN_V1_8821C BIT(6)
 
 #define BIT_SHIFT_BAR_PKTNUM_TH_V1_8821C 0
 #define BIT_MASK_BAR_PKTNUM_TH_V1_8821C 0x3f
 #define BIT_BAR_PKTNUM_TH_V1_8821C(x) (((x) & BIT_MASK_BAR_PKTNUM_TH_V1_8821C) << BIT_SHIFT_BAR_PKTNUM_TH_V1_8821C)
-#define BIT_GET_BAR_PKTNUM_TH_V1_8821C(x) (((x) >> BIT_SHIFT_BAR_PKTNUM_TH_V1_8821C) & BIT_MASK_BAR_PKTNUM_TH_V1_8821C)

+#define BIT_GET_BAR_PKTNUM_TH_V1_8821C(x) (((x) >> BIT_SHIFT_BAR_PKTNUM_TH_V1_8821C) & BIT_MASK_BAR_PKTNUM_TH_V1_8821C)
+
 
 
 /* 2 REG_RA_TRY_RATE_AGG_LMT_8821C */
@@ -5825,7 +6406,8 @@
 #define BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8821C 0
 #define BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8821C 0x3f
 #define BIT_RA_TRY_RATE_AGG_LMT_V1_8821C(x) (((x) & BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8821C) << BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8821C)
-#define BIT_GET_RA_TRY_RATE_AGG_LMT_V1_8821C(x) (((x) >> BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8821C) & BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8821C)

+#define BIT_GET_RA_TRY_RATE_AGG_LMT_V1_8821C(x) (((x) >> BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8821C) & BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8821C)
+
 
 
 /* 2 REG_MACID_SLEEP2_8821C */
@@ -5833,7 +6415,8 @@
 #define BIT_SHIFT_MACID95_64PKTSLEEP_8821C 0
 #define BIT_MASK_MACID95_64PKTSLEEP_8821C 0xffffffffL
 #define BIT_MACID95_64PKTSLEEP_8821C(x) (((x) & BIT_MASK_MACID95_64PKTSLEEP_8821C) << BIT_SHIFT_MACID95_64PKTSLEEP_8821C)
-#define BIT_GET_MACID95_64PKTSLEEP_8821C(x) (((x) >> BIT_SHIFT_MACID95_64PKTSLEEP_8821C) & BIT_MASK_MACID95_64PKTSLEEP_8821C)

+#define BIT_GET_MACID95_64PKTSLEEP_8821C(x) (((x) >> BIT_SHIFT_MACID95_64PKTSLEEP_8821C) & BIT_MASK_MACID95_64PKTSLEEP_8821C)
+
 
 
 /* 2 REG_MACID_SLEEP_8821C */
@@ -5841,7 +6424,8 @@
 #define BIT_SHIFT_MACID31_0_PKTSLEEP_8821C 0
 #define BIT_MASK_MACID31_0_PKTSLEEP_8821C 0xffffffffL
 #define BIT_MACID31_0_PKTSLEEP_8821C(x) (((x) & BIT_MASK_MACID31_0_PKTSLEEP_8821C) << BIT_SHIFT_MACID31_0_PKTSLEEP_8821C)
-#define BIT_GET_MACID31_0_PKTSLEEP_8821C(x) (((x) >> BIT_SHIFT_MACID31_0_PKTSLEEP_8821C) & BIT_MASK_MACID31_0_PKTSLEEP_8821C)

+#define BIT_GET_MACID31_0_PKTSLEEP_8821C(x) (((x) >> BIT_SHIFT_MACID31_0_PKTSLEEP_8821C) & BIT_MASK_MACID31_0_PKTSLEEP_8821C)
+
 
 
 /* 2 REG_HW_SEQ0_8821C */
@@ -5849,7 +6433,8 @@
 #define BIT_SHIFT_HW_SSN_SEQ0_8821C 0
 #define BIT_MASK_HW_SSN_SEQ0_8821C 0xfff
 #define BIT_HW_SSN_SEQ0_8821C(x) (((x) & BIT_MASK_HW_SSN_SEQ0_8821C) << BIT_SHIFT_HW_SSN_SEQ0_8821C)
-#define BIT_GET_HW_SSN_SEQ0_8821C(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ0_8821C) & BIT_MASK_HW_SSN_SEQ0_8821C)

+#define BIT_GET_HW_SSN_SEQ0_8821C(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ0_8821C) & BIT_MASK_HW_SSN_SEQ0_8821C)
+
 
 
 /* 2 REG_HW_SEQ1_8821C */
@@ -5857,7 +6442,8 @@
 #define BIT_SHIFT_HW_SSN_SEQ1_8821C 0
 #define BIT_MASK_HW_SSN_SEQ1_8821C 0xfff
 #define BIT_HW_SSN_SEQ1_8821C(x) (((x) & BIT_MASK_HW_SSN_SEQ1_8821C) << BIT_SHIFT_HW_SSN_SEQ1_8821C)
-#define BIT_GET_HW_SSN_SEQ1_8821C(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ1_8821C) & BIT_MASK_HW_SSN_SEQ1_8821C)

+#define BIT_GET_HW_SSN_SEQ1_8821C(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ1_8821C) & BIT_MASK_HW_SSN_SEQ1_8821C)
+
 
 
 /* 2 REG_HW_SEQ2_8821C */
@@ -5865,7 +6451,8 @@
 #define BIT_SHIFT_HW_SSN_SEQ2_8821C 0
 #define BIT_MASK_HW_SSN_SEQ2_8821C 0xfff
 #define BIT_HW_SSN_SEQ2_8821C(x) (((x) & BIT_MASK_HW_SSN_SEQ2_8821C) << BIT_SHIFT_HW_SSN_SEQ2_8821C)
-#define BIT_GET_HW_SSN_SEQ2_8821C(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ2_8821C) & BIT_MASK_HW_SSN_SEQ2_8821C)

+#define BIT_GET_HW_SSN_SEQ2_8821C(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ2_8821C) & BIT_MASK_HW_SSN_SEQ2_8821C)
+
 
 
 /* 2 REG_HW_SEQ3_8821C */
@@ -5873,7 +6460,8 @@
 #define BIT_SHIFT_HW_SSN_SEQ3_8821C 0
 #define BIT_MASK_HW_SSN_SEQ3_8821C 0xfff
 #define BIT_HW_SSN_SEQ3_8821C(x) (((x) & BIT_MASK_HW_SSN_SEQ3_8821C) << BIT_SHIFT_HW_SSN_SEQ3_8821C)
-#define BIT_GET_HW_SSN_SEQ3_8821C(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ3_8821C) & BIT_MASK_HW_SSN_SEQ3_8821C)

+#define BIT_GET_HW_SSN_SEQ3_8821C(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ3_8821C) & BIT_MASK_HW_SSN_SEQ3_8821C)
+
 
 
 /* 2 REG_NULL_PKT_STATUS_V1_8821C */
@@ -5881,7 +6469,8 @@
 #define BIT_SHIFT_PTCL_TOTAL_PG_V2_8821C 2
 #define BIT_MASK_PTCL_TOTAL_PG_V2_8821C 0x3fff
 #define BIT_PTCL_TOTAL_PG_V2_8821C(x) (((x) & BIT_MASK_PTCL_TOTAL_PG_V2_8821C) << BIT_SHIFT_PTCL_TOTAL_PG_V2_8821C)
-#define BIT_GET_PTCL_TOTAL_PG_V2_8821C(x) (((x) >> BIT_SHIFT_PTCL_TOTAL_PG_V2_8821C) & BIT_MASK_PTCL_TOTAL_PG_V2_8821C)

+#define BIT_GET_PTCL_TOTAL_PG_V2_8821C(x) (((x) >> BIT_SHIFT_PTCL_TOTAL_PG_V2_8821C) & BIT_MASK_PTCL_TOTAL_PG_V2_8821C)
+
 
 #define BIT_TX_NULL_1_8821C BIT(1)
 #define BIT_TX_NULL_0_8821C BIT(0)
@@ -5915,7 +6504,8 @@
 #define BIT_SHIFT_BT_POLLUTE_PKT_CNT_8821C 0
 #define BIT_MASK_BT_POLLUTE_PKT_CNT_8821C 0xffff
 #define BIT_BT_POLLUTE_PKT_CNT_8821C(x) (((x) & BIT_MASK_BT_POLLUTE_PKT_CNT_8821C) << BIT_SHIFT_BT_POLLUTE_PKT_CNT_8821C)
-#define BIT_GET_BT_POLLUTE_PKT_CNT_8821C(x) (((x) >> BIT_SHIFT_BT_POLLUTE_PKT_CNT_8821C) & BIT_MASK_BT_POLLUTE_PKT_CNT_8821C)

+#define BIT_GET_BT_POLLUTE_PKT_CNT_8821C(x) (((x) >> BIT_SHIFT_BT_POLLUTE_PKT_CNT_8821C) & BIT_MASK_BT_POLLUTE_PKT_CNT_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -5925,7 +6515,8 @@
 #define BIT_SHIFT_PTCL_DBG_8821C 0
 #define BIT_MASK_PTCL_DBG_8821C 0xffffffffL
 #define BIT_PTCL_DBG_8821C(x) (((x) & BIT_MASK_PTCL_DBG_8821C) << BIT_SHIFT_PTCL_DBG_8821C)
-#define BIT_GET_PTCL_DBG_8821C(x) (((x) >> BIT_SHIFT_PTCL_DBG_8821C) & BIT_MASK_PTCL_DBG_8821C)

+#define BIT_GET_PTCL_DBG_8821C(x) (((x) >> BIT_SHIFT_PTCL_DBG_8821C) & BIT_MASK_PTCL_DBG_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -5935,14 +6526,16 @@
 #define BIT_SHIFT_TRI_HEAD_ADDR_8821C 16
 #define BIT_MASK_TRI_HEAD_ADDR_8821C 0xfff
 #define BIT_TRI_HEAD_ADDR_8821C(x) (((x) & BIT_MASK_TRI_HEAD_ADDR_8821C) << BIT_SHIFT_TRI_HEAD_ADDR_8821C)
-#define BIT_GET_TRI_HEAD_ADDR_8821C(x) (((x) >> BIT_SHIFT_TRI_HEAD_ADDR_8821C) & BIT_MASK_TRI_HEAD_ADDR_8821C)

+#define BIT_GET_TRI_HEAD_ADDR_8821C(x) (((x) >> BIT_SHIFT_TRI_HEAD_ADDR_8821C) & BIT_MASK_TRI_HEAD_ADDR_8821C)
+
 
 #define BIT_DROP_TH_EN_8821C BIT(8)
 
 #define BIT_SHIFT_DROP_TH_8821C 0
 #define BIT_MASK_DROP_TH_8821C 0xff
 #define BIT_DROP_TH_8821C(x) (((x) & BIT_MASK_DROP_TH_8821C) << BIT_SHIFT_DROP_TH_8821C)
-#define BIT_GET_DROP_TH_8821C(x) (((x) >> BIT_SHIFT_DROP_TH_8821C) & BIT_MASK_DROP_TH_8821C)

+#define BIT_GET_DROP_TH_8821C(x) (((x) >> BIT_SHIFT_DROP_TH_8821C) & BIT_MASK_DROP_TH_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -5962,26 +6555,30 @@
 #define BIT_SHIFT_GTAB_ID_8821C 28
 #define BIT_MASK_GTAB_ID_8821C 0x7
 #define BIT_GTAB_ID_8821C(x) (((x) & BIT_MASK_GTAB_ID_8821C) << BIT_SHIFT_GTAB_ID_8821C)
-#define BIT_GET_GTAB_ID_8821C(x) (((x) >> BIT_SHIFT_GTAB_ID_8821C) & BIT_MASK_GTAB_ID_8821C)

+#define BIT_GET_GTAB_ID_8821C(x) (((x) >> BIT_SHIFT_GTAB_ID_8821C) & BIT_MASK_GTAB_ID_8821C)
+
 
 
 #define BIT_SHIFT_AC1_PKT_INFO_8821C 16
 #define BIT_MASK_AC1_PKT_INFO_8821C 0xfff
 #define BIT_AC1_PKT_INFO_8821C(x) (((x) & BIT_MASK_AC1_PKT_INFO_8821C) << BIT_SHIFT_AC1_PKT_INFO_8821C)
-#define BIT_GET_AC1_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_AC1_PKT_INFO_8821C) & BIT_MASK_AC1_PKT_INFO_8821C)

+#define BIT_GET_AC1_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_AC1_PKT_INFO_8821C) & BIT_MASK_AC1_PKT_INFO_8821C)
+
 
 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8821C BIT(15)
 
 #define BIT_SHIFT_GTAB_ID_V1_8821C 12
 #define BIT_MASK_GTAB_ID_V1_8821C 0x7
 #define BIT_GTAB_ID_V1_8821C(x) (((x) & BIT_MASK_GTAB_ID_V1_8821C) << BIT_SHIFT_GTAB_ID_V1_8821C)
-#define BIT_GET_GTAB_ID_V1_8821C(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8821C) & BIT_MASK_GTAB_ID_V1_8821C)

+#define BIT_GET_GTAB_ID_V1_8821C(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8821C) & BIT_MASK_GTAB_ID_V1_8821C)
+
 
 
 #define BIT_SHIFT_AC0_PKT_INFO_8821C 0
 #define BIT_MASK_AC0_PKT_INFO_8821C 0xfff
 #define BIT_AC0_PKT_INFO_8821C(x) (((x) & BIT_MASK_AC0_PKT_INFO_8821C) << BIT_SHIFT_AC0_PKT_INFO_8821C)
-#define BIT_GET_AC0_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_AC0_PKT_INFO_8821C) & BIT_MASK_AC0_PKT_INFO_8821C)

+#define BIT_GET_AC0_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_AC0_PKT_INFO_8821C) & BIT_MASK_AC0_PKT_INFO_8821C)
+
 
 
 /* 2 REG_Q2_Q3_INFO_8821C */
@@ -5990,26 +6587,30 @@
 #define BIT_SHIFT_GTAB_ID_8821C 28
 #define BIT_MASK_GTAB_ID_8821C 0x7
 #define BIT_GTAB_ID_8821C(x) (((x) & BIT_MASK_GTAB_ID_8821C) << BIT_SHIFT_GTAB_ID_8821C)
-#define BIT_GET_GTAB_ID_8821C(x) (((x) >> BIT_SHIFT_GTAB_ID_8821C) & BIT_MASK_GTAB_ID_8821C)

+#define BIT_GET_GTAB_ID_8821C(x) (((x) >> BIT_SHIFT_GTAB_ID_8821C) & BIT_MASK_GTAB_ID_8821C)
+
 
 
 #define BIT_SHIFT_AC3_PKT_INFO_8821C 16
 #define BIT_MASK_AC3_PKT_INFO_8821C 0xfff
 #define BIT_AC3_PKT_INFO_8821C(x) (((x) & BIT_MASK_AC3_PKT_INFO_8821C) << BIT_SHIFT_AC3_PKT_INFO_8821C)
-#define BIT_GET_AC3_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_AC3_PKT_INFO_8821C) & BIT_MASK_AC3_PKT_INFO_8821C)

+#define BIT_GET_AC3_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_AC3_PKT_INFO_8821C) & BIT_MASK_AC3_PKT_INFO_8821C)
+
 
 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8821C BIT(15)
 
 #define BIT_SHIFT_GTAB_ID_V1_8821C 12
 #define BIT_MASK_GTAB_ID_V1_8821C 0x7
 #define BIT_GTAB_ID_V1_8821C(x) (((x) & BIT_MASK_GTAB_ID_V1_8821C) << BIT_SHIFT_GTAB_ID_V1_8821C)
-#define BIT_GET_GTAB_ID_V1_8821C(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8821C) & BIT_MASK_GTAB_ID_V1_8821C)

+#define BIT_GET_GTAB_ID_V1_8821C(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8821C) & BIT_MASK_GTAB_ID_V1_8821C)
+
 
 
 #define BIT_SHIFT_AC2_PKT_INFO_8821C 0
 #define BIT_MASK_AC2_PKT_INFO_8821C 0xfff
 #define BIT_AC2_PKT_INFO_8821C(x) (((x) & BIT_MASK_AC2_PKT_INFO_8821C) << BIT_SHIFT_AC2_PKT_INFO_8821C)
-#define BIT_GET_AC2_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_AC2_PKT_INFO_8821C) & BIT_MASK_AC2_PKT_INFO_8821C)

+#define BIT_GET_AC2_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_AC2_PKT_INFO_8821C) & BIT_MASK_AC2_PKT_INFO_8821C)
+
 
 
 /* 2 REG_Q4_Q5_INFO_8821C */
@@ -6018,26 +6619,30 @@
 #define BIT_SHIFT_GTAB_ID_8821C 28
 #define BIT_MASK_GTAB_ID_8821C 0x7
 #define BIT_GTAB_ID_8821C(x) (((x) & BIT_MASK_GTAB_ID_8821C) << BIT_SHIFT_GTAB_ID_8821C)
-#define BIT_GET_GTAB_ID_8821C(x) (((x) >> BIT_SHIFT_GTAB_ID_8821C) & BIT_MASK_GTAB_ID_8821C)

+#define BIT_GET_GTAB_ID_8821C(x) (((x) >> BIT_SHIFT_GTAB_ID_8821C) & BIT_MASK_GTAB_ID_8821C)
+
 
 
 #define BIT_SHIFT_AC5_PKT_INFO_8821C 16
 #define BIT_MASK_AC5_PKT_INFO_8821C 0xfff
 #define BIT_AC5_PKT_INFO_8821C(x) (((x) & BIT_MASK_AC5_PKT_INFO_8821C) << BIT_SHIFT_AC5_PKT_INFO_8821C)
-#define BIT_GET_AC5_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_AC5_PKT_INFO_8821C) & BIT_MASK_AC5_PKT_INFO_8821C)

+#define BIT_GET_AC5_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_AC5_PKT_INFO_8821C) & BIT_MASK_AC5_PKT_INFO_8821C)
+
 
 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8821C BIT(15)
 
 #define BIT_SHIFT_GTAB_ID_V1_8821C 12
 #define BIT_MASK_GTAB_ID_V1_8821C 0x7
 #define BIT_GTAB_ID_V1_8821C(x) (((x) & BIT_MASK_GTAB_ID_V1_8821C) << BIT_SHIFT_GTAB_ID_V1_8821C)
-#define BIT_GET_GTAB_ID_V1_8821C(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8821C) & BIT_MASK_GTAB_ID_V1_8821C)

+#define BIT_GET_GTAB_ID_V1_8821C(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8821C) & BIT_MASK_GTAB_ID_V1_8821C)
+
 
 
 #define BIT_SHIFT_AC4_PKT_INFO_8821C 0
 #define BIT_MASK_AC4_PKT_INFO_8821C 0xfff
 #define BIT_AC4_PKT_INFO_8821C(x) (((x) & BIT_MASK_AC4_PKT_INFO_8821C) << BIT_SHIFT_AC4_PKT_INFO_8821C)
-#define BIT_GET_AC4_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_AC4_PKT_INFO_8821C) & BIT_MASK_AC4_PKT_INFO_8821C)

+#define BIT_GET_AC4_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_AC4_PKT_INFO_8821C) & BIT_MASK_AC4_PKT_INFO_8821C)
+
 
 
 /* 2 REG_Q6_Q7_INFO_8821C */
@@ -6046,26 +6651,30 @@
 #define BIT_SHIFT_GTAB_ID_8821C 28
 #define BIT_MASK_GTAB_ID_8821C 0x7
 #define BIT_GTAB_ID_8821C(x) (((x) & BIT_MASK_GTAB_ID_8821C) << BIT_SHIFT_GTAB_ID_8821C)
-#define BIT_GET_GTAB_ID_8821C(x) (((x) >> BIT_SHIFT_GTAB_ID_8821C) & BIT_MASK_GTAB_ID_8821C)

+#define BIT_GET_GTAB_ID_8821C(x) (((x) >> BIT_SHIFT_GTAB_ID_8821C) & BIT_MASK_GTAB_ID_8821C)
+
 
 
 #define BIT_SHIFT_AC7_PKT_INFO_8821C 16
 #define BIT_MASK_AC7_PKT_INFO_8821C 0xfff
 #define BIT_AC7_PKT_INFO_8821C(x) (((x) & BIT_MASK_AC7_PKT_INFO_8821C) << BIT_SHIFT_AC7_PKT_INFO_8821C)
-#define BIT_GET_AC7_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_AC7_PKT_INFO_8821C) & BIT_MASK_AC7_PKT_INFO_8821C)

+#define BIT_GET_AC7_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_AC7_PKT_INFO_8821C) & BIT_MASK_AC7_PKT_INFO_8821C)
+
 
 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8821C BIT(15)
 
 #define BIT_SHIFT_GTAB_ID_V1_8821C 12
 #define BIT_MASK_GTAB_ID_V1_8821C 0x7
 #define BIT_GTAB_ID_V1_8821C(x) (((x) & BIT_MASK_GTAB_ID_V1_8821C) << BIT_SHIFT_GTAB_ID_V1_8821C)
-#define BIT_GET_GTAB_ID_V1_8821C(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8821C) & BIT_MASK_GTAB_ID_V1_8821C)

+#define BIT_GET_GTAB_ID_V1_8821C(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8821C) & BIT_MASK_GTAB_ID_V1_8821C)
+
 
 
 #define BIT_SHIFT_AC6_PKT_INFO_8821C 0
 #define BIT_MASK_AC6_PKT_INFO_8821C 0xfff
 #define BIT_AC6_PKT_INFO_8821C(x) (((x) & BIT_MASK_AC6_PKT_INFO_8821C) << BIT_SHIFT_AC6_PKT_INFO_8821C)
-#define BIT_GET_AC6_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_AC6_PKT_INFO_8821C) & BIT_MASK_AC6_PKT_INFO_8821C)

+#define BIT_GET_AC6_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_AC6_PKT_INFO_8821C) & BIT_MASK_AC6_PKT_INFO_8821C)
+
 
 
 /* 2 REG_MGQ_HIQ_INFO_8821C */
@@ -6073,13 +6682,15 @@
 #define BIT_SHIFT_HIQ_PKT_INFO_8821C 16
 #define BIT_MASK_HIQ_PKT_INFO_8821C 0xfff
 #define BIT_HIQ_PKT_INFO_8821C(x) (((x) & BIT_MASK_HIQ_PKT_INFO_8821C) << BIT_SHIFT_HIQ_PKT_INFO_8821C)
-#define BIT_GET_HIQ_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_HIQ_PKT_INFO_8821C) & BIT_MASK_HIQ_PKT_INFO_8821C)

+#define BIT_GET_HIQ_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_HIQ_PKT_INFO_8821C) & BIT_MASK_HIQ_PKT_INFO_8821C)
+
 
 
 #define BIT_SHIFT_MGQ_PKT_INFO_8821C 0
 #define BIT_MASK_MGQ_PKT_INFO_8821C 0xfff
 #define BIT_MGQ_PKT_INFO_8821C(x) (((x) & BIT_MASK_MGQ_PKT_INFO_8821C) << BIT_SHIFT_MGQ_PKT_INFO_8821C)
-#define BIT_GET_MGQ_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_MGQ_PKT_INFO_8821C) & BIT_MASK_MGQ_PKT_INFO_8821C)

+#define BIT_GET_MGQ_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_MGQ_PKT_INFO_8821C) & BIT_MASK_MGQ_PKT_INFO_8821C)
+
 
 
 /* 2 REG_CMDQ_BCNQ_INFO_8821C */
@@ -6087,13 +6698,15 @@
 #define BIT_SHIFT_CMDQ_PKT_INFO_8821C 16
 #define BIT_MASK_CMDQ_PKT_INFO_8821C 0xfff
 #define BIT_CMDQ_PKT_INFO_8821C(x) (((x) & BIT_MASK_CMDQ_PKT_INFO_8821C) << BIT_SHIFT_CMDQ_PKT_INFO_8821C)
-#define BIT_GET_CMDQ_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_CMDQ_PKT_INFO_8821C) & BIT_MASK_CMDQ_PKT_INFO_8821C)

+#define BIT_GET_CMDQ_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_CMDQ_PKT_INFO_8821C) & BIT_MASK_CMDQ_PKT_INFO_8821C)
+
 
 
 #define BIT_SHIFT_BCNQ_PKT_INFO_8821C 0
 #define BIT_MASK_BCNQ_PKT_INFO_8821C 0xfff
 #define BIT_BCNQ_PKT_INFO_8821C(x) (((x) & BIT_MASK_BCNQ_PKT_INFO_8821C) << BIT_SHIFT_BCNQ_PKT_INFO_8821C)
-#define BIT_GET_BCNQ_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_BCNQ_PKT_INFO_8821C) & BIT_MASK_BCNQ_PKT_INFO_8821C)

+#define BIT_GET_BCNQ_PKT_INFO_8821C(x) (((x) >> BIT_SHIFT_BCNQ_PKT_INFO_8821C) & BIT_MASK_BCNQ_PKT_INFO_8821C)
+
 
 
 /* 2 REG_USEREG_SETTING_8821C */
@@ -6102,13 +6715,15 @@
 #define BIT_SHIFT_RETRY_USEREG_8821C 19
 #define BIT_MASK_RETRY_USEREG_8821C 0x3
 #define BIT_RETRY_USEREG_8821C(x) (((x) & BIT_MASK_RETRY_USEREG_8821C) << BIT_SHIFT_RETRY_USEREG_8821C)
-#define BIT_GET_RETRY_USEREG_8821C(x) (((x) >> BIT_SHIFT_RETRY_USEREG_8821C) & BIT_MASK_RETRY_USEREG_8821C)

+#define BIT_GET_RETRY_USEREG_8821C(x) (((x) >> BIT_SHIFT_RETRY_USEREG_8821C) & BIT_MASK_RETRY_USEREG_8821C)
+
 
 
 #define BIT_SHIFT_TRYPKT_USEREG_8821C 17
 #define BIT_MASK_TRYPKT_USEREG_8821C 0x3
 #define BIT_TRYPKT_USEREG_8821C(x) (((x) & BIT_MASK_TRYPKT_USEREG_8821C) << BIT_SHIFT_TRYPKT_USEREG_8821C)
-#define BIT_GET_TRYPKT_USEREG_8821C(x) (((x) >> BIT_SHIFT_TRYPKT_USEREG_8821C) & BIT_MASK_TRYPKT_USEREG_8821C)

+#define BIT_GET_TRYPKT_USEREG_8821C(x) (((x) >> BIT_SHIFT_TRYPKT_USEREG_8821C) & BIT_MASK_TRYPKT_USEREG_8821C)
+
 
 #define BIT_CTLPKT_USEREG_8821C BIT(16)
 
@@ -6117,7 +6732,8 @@
 #define BIT_SHIFT_AESIV_OFFSET_8821C 0
 #define BIT_MASK_AESIV_OFFSET_8821C 0xfff
 #define BIT_AESIV_OFFSET_8821C(x) (((x) & BIT_MASK_AESIV_OFFSET_8821C) << BIT_SHIFT_AESIV_OFFSET_8821C)
-#define BIT_GET_AESIV_OFFSET_8821C(x) (((x) >> BIT_SHIFT_AESIV_OFFSET_8821C) & BIT_MASK_AESIV_OFFSET_8821C)

+#define BIT_GET_AESIV_OFFSET_8821C(x) (((x) >> BIT_SHIFT_AESIV_OFFSET_8821C) & BIT_MASK_AESIV_OFFSET_8821C)
+
 
 
 /* 2 REG_BF0_TIME_SETTING_8821C */
@@ -6129,13 +6745,15 @@
 #define BIT_SHIFT_BF0_PRETIME_OVER_8821C 16
 #define BIT_MASK_BF0_PRETIME_OVER_8821C 0xfff
 #define BIT_BF0_PRETIME_OVER_8821C(x) (((x) & BIT_MASK_BF0_PRETIME_OVER_8821C) << BIT_SHIFT_BF0_PRETIME_OVER_8821C)
-#define BIT_GET_BF0_PRETIME_OVER_8821C(x) (((x) >> BIT_SHIFT_BF0_PRETIME_OVER_8821C) & BIT_MASK_BF0_PRETIME_OVER_8821C)

+#define BIT_GET_BF0_PRETIME_OVER_8821C(x) (((x) >> BIT_SHIFT_BF0_PRETIME_OVER_8821C) & BIT_MASK_BF0_PRETIME_OVER_8821C)
+
 
 
 #define BIT_SHIFT_BF0_LIFETIME_8821C 0
 #define BIT_MASK_BF0_LIFETIME_8821C 0xffff
 #define BIT_BF0_LIFETIME_8821C(x) (((x) & BIT_MASK_BF0_LIFETIME_8821C) << BIT_SHIFT_BF0_LIFETIME_8821C)
-#define BIT_GET_BF0_LIFETIME_8821C(x) (((x) >> BIT_SHIFT_BF0_LIFETIME_8821C) & BIT_MASK_BF0_LIFETIME_8821C)

+#define BIT_GET_BF0_LIFETIME_8821C(x) (((x) >> BIT_SHIFT_BF0_LIFETIME_8821C) & BIT_MASK_BF0_LIFETIME_8821C)
+
 
 
 /* 2 REG_BF1_TIME_SETTING_8821C */
@@ -6147,13 +6765,15 @@
 #define BIT_SHIFT_BF1_PRETIME_OVER_8821C 16
 #define BIT_MASK_BF1_PRETIME_OVER_8821C 0xfff
 #define BIT_BF1_PRETIME_OVER_8821C(x) (((x) & BIT_MASK_BF1_PRETIME_OVER_8821C) << BIT_SHIFT_BF1_PRETIME_OVER_8821C)
-#define BIT_GET_BF1_PRETIME_OVER_8821C(x) (((x) >> BIT_SHIFT_BF1_PRETIME_OVER_8821C) & BIT_MASK_BF1_PRETIME_OVER_8821C)

+#define BIT_GET_BF1_PRETIME_OVER_8821C(x) (((x) >> BIT_SHIFT_BF1_PRETIME_OVER_8821C) & BIT_MASK_BF1_PRETIME_OVER_8821C)
+
 
 
 #define BIT_SHIFT_BF1_LIFETIME_8821C 0
 #define BIT_MASK_BF1_LIFETIME_8821C 0xffff
 #define BIT_BF1_LIFETIME_8821C(x) (((x) & BIT_MASK_BF1_LIFETIME_8821C) << BIT_SHIFT_BF1_LIFETIME_8821C)
-#define BIT_GET_BF1_LIFETIME_8821C(x) (((x) >> BIT_SHIFT_BF1_LIFETIME_8821C) & BIT_MASK_BF1_LIFETIME_8821C)

+#define BIT_GET_BF1_LIFETIME_8821C(x) (((x) >> BIT_SHIFT_BF1_LIFETIME_8821C) & BIT_MASK_BF1_LIFETIME_8821C)
+
 
 
 /* 2 REG_BF_TIMEOUT_EN_8821C */
@@ -6167,7 +6787,8 @@
 #define BIT_SHIFT_MACID31_0_RELEASE_8821C 0
 #define BIT_MASK_MACID31_0_RELEASE_8821C 0xffffffffL
 #define BIT_MACID31_0_RELEASE_8821C(x) (((x) & BIT_MASK_MACID31_0_RELEASE_8821C) << BIT_SHIFT_MACID31_0_RELEASE_8821C)
-#define BIT_GET_MACID31_0_RELEASE_8821C(x) (((x) >> BIT_SHIFT_MACID31_0_RELEASE_8821C) & BIT_MASK_MACID31_0_RELEASE_8821C)

+#define BIT_GET_MACID31_0_RELEASE_8821C(x) (((x) >> BIT_SHIFT_MACID31_0_RELEASE_8821C) & BIT_MASK_MACID31_0_RELEASE_8821C)
+
 
 
 /* 2 REG_MACID_RELEASE1_8821C */
@@ -6175,7 +6796,8 @@
 #define BIT_SHIFT_MACID63_32_RELEASE_8821C 0
 #define BIT_MASK_MACID63_32_RELEASE_8821C 0xffffffffL
 #define BIT_MACID63_32_RELEASE_8821C(x) (((x) & BIT_MASK_MACID63_32_RELEASE_8821C) << BIT_SHIFT_MACID63_32_RELEASE_8821C)
-#define BIT_GET_MACID63_32_RELEASE_8821C(x) (((x) >> BIT_SHIFT_MACID63_32_RELEASE_8821C) & BIT_MASK_MACID63_32_RELEASE_8821C)

+#define BIT_GET_MACID63_32_RELEASE_8821C(x) (((x) >> BIT_SHIFT_MACID63_32_RELEASE_8821C) & BIT_MASK_MACID63_32_RELEASE_8821C)
+
 
 
 /* 2 REG_MACID_RELEASE2_8821C */
@@ -6183,7 +6805,8 @@
 #define BIT_SHIFT_MACID95_64_RELEASE_8821C 0
 #define BIT_MASK_MACID95_64_RELEASE_8821C 0xffffffffL
 #define BIT_MACID95_64_RELEASE_8821C(x) (((x) & BIT_MASK_MACID95_64_RELEASE_8821C) << BIT_SHIFT_MACID95_64_RELEASE_8821C)
-#define BIT_GET_MACID95_64_RELEASE_8821C(x) (((x) >> BIT_SHIFT_MACID95_64_RELEASE_8821C) & BIT_MASK_MACID95_64_RELEASE_8821C)

+#define BIT_GET_MACID95_64_RELEASE_8821C(x) (((x) >> BIT_SHIFT_MACID95_64_RELEASE_8821C) & BIT_MASK_MACID95_64_RELEASE_8821C)
+
 
 
 /* 2 REG_MACID_RELEASE3_8821C */
@@ -6191,7 +6814,8 @@
 #define BIT_SHIFT_MACID127_96_RELEASE_8821C 0
 #define BIT_MASK_MACID127_96_RELEASE_8821C 0xffffffffL
 #define BIT_MACID127_96_RELEASE_8821C(x) (((x) & BIT_MASK_MACID127_96_RELEASE_8821C) << BIT_SHIFT_MACID127_96_RELEASE_8821C)
-#define BIT_GET_MACID127_96_RELEASE_8821C(x) (((x) >> BIT_SHIFT_MACID127_96_RELEASE_8821C) & BIT_MASK_MACID127_96_RELEASE_8821C)

+#define BIT_GET_MACID127_96_RELEASE_8821C(x) (((x) >> BIT_SHIFT_MACID127_96_RELEASE_8821C) & BIT_MASK_MACID127_96_RELEASE_8821C)
+
 
 
 /* 2 REG_MACID_RELEASE_SETTING_8821C */
@@ -6200,7 +6824,8 @@
 #define BIT_SHIFT_MACID_OFFSET_8821C 0
 #define BIT_MASK_MACID_OFFSET_8821C 0x7f
 #define BIT_MACID_OFFSET_8821C(x) (((x) & BIT_MASK_MACID_OFFSET_8821C) << BIT_SHIFT_MACID_OFFSET_8821C)
-#define BIT_GET_MACID_OFFSET_8821C(x) (((x) >> BIT_SHIFT_MACID_OFFSET_8821C) & BIT_MASK_MACID_OFFSET_8821C)

+#define BIT_GET_MACID_OFFSET_8821C(x) (((x) >> BIT_SHIFT_MACID_OFFSET_8821C) & BIT_MASK_MACID_OFFSET_8821C)
+
 
 
 /* 2 REG_FAST_EDCA_VOVI_SETTING_8821C */
@@ -6208,27 +6833,31 @@
 #define BIT_SHIFT_VI_FAST_EDCA_TO_8821C 24
 #define BIT_MASK_VI_FAST_EDCA_TO_8821C 0xff
 #define BIT_VI_FAST_EDCA_TO_8821C(x) (((x) & BIT_MASK_VI_FAST_EDCA_TO_8821C) << BIT_SHIFT_VI_FAST_EDCA_TO_8821C)
-#define BIT_GET_VI_FAST_EDCA_TO_8821C(x) (((x) >> BIT_SHIFT_VI_FAST_EDCA_TO_8821C) & BIT_MASK_VI_FAST_EDCA_TO_8821C)

+#define BIT_GET_VI_FAST_EDCA_TO_8821C(x) (((x) >> BIT_SHIFT_VI_FAST_EDCA_TO_8821C) & BIT_MASK_VI_FAST_EDCA_TO_8821C)
+
 
 #define BIT_VI_THRESHOLD_SEL_8821C BIT(23)
 
 #define BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8821C 16
 #define BIT_MASK_VI_FAST_EDCA_PKT_TH_8821C 0x7f
 #define BIT_VI_FAST_EDCA_PKT_TH_8821C(x) (((x) & BIT_MASK_VI_FAST_EDCA_PKT_TH_8821C) << BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8821C)
-#define BIT_GET_VI_FAST_EDCA_PKT_TH_8821C(x) (((x) >> BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8821C) & BIT_MASK_VI_FAST_EDCA_PKT_TH_8821C)

+#define BIT_GET_VI_FAST_EDCA_PKT_TH_8821C(x) (((x) >> BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8821C) & BIT_MASK_VI_FAST_EDCA_PKT_TH_8821C)
+
 
 
 #define BIT_SHIFT_VO_FAST_EDCA_TO_8821C 8
 #define BIT_MASK_VO_FAST_EDCA_TO_8821C 0xff
 #define BIT_VO_FAST_EDCA_TO_8821C(x) (((x) & BIT_MASK_VO_FAST_EDCA_TO_8821C) << BIT_SHIFT_VO_FAST_EDCA_TO_8821C)
-#define BIT_GET_VO_FAST_EDCA_TO_8821C(x) (((x) >> BIT_SHIFT_VO_FAST_EDCA_TO_8821C) & BIT_MASK_VO_FAST_EDCA_TO_8821C)

+#define BIT_GET_VO_FAST_EDCA_TO_8821C(x) (((x) >> BIT_SHIFT_VO_FAST_EDCA_TO_8821C) & BIT_MASK_VO_FAST_EDCA_TO_8821C)
+
 
 #define BIT_VO_THRESHOLD_SEL_8821C BIT(7)
 
 #define BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8821C 0
 #define BIT_MASK_VO_FAST_EDCA_PKT_TH_8821C 0x7f
 #define BIT_VO_FAST_EDCA_PKT_TH_8821C(x) (((x) & BIT_MASK_VO_FAST_EDCA_PKT_TH_8821C) << BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8821C)
-#define BIT_GET_VO_FAST_EDCA_PKT_TH_8821C(x) (((x) >> BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8821C) & BIT_MASK_VO_FAST_EDCA_PKT_TH_8821C)

+#define BIT_GET_VO_FAST_EDCA_PKT_TH_8821C(x) (((x) >> BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8821C) & BIT_MASK_VO_FAST_EDCA_PKT_TH_8821C)
+
 
 
 /* 2 REG_FAST_EDCA_BEBK_SETTING_8821C */
@@ -6236,27 +6865,31 @@
 #define BIT_SHIFT_BK_FAST_EDCA_TO_8821C 24
 #define BIT_MASK_BK_FAST_EDCA_TO_8821C 0xff
 #define BIT_BK_FAST_EDCA_TO_8821C(x) (((x) & BIT_MASK_BK_FAST_EDCA_TO_8821C) << BIT_SHIFT_BK_FAST_EDCA_TO_8821C)
-#define BIT_GET_BK_FAST_EDCA_TO_8821C(x) (((x) >> BIT_SHIFT_BK_FAST_EDCA_TO_8821C) & BIT_MASK_BK_FAST_EDCA_TO_8821C)

+#define BIT_GET_BK_FAST_EDCA_TO_8821C(x) (((x) >> BIT_SHIFT_BK_FAST_EDCA_TO_8821C) & BIT_MASK_BK_FAST_EDCA_TO_8821C)
+
 
 #define BIT_BK_THRESHOLD_SEL_8821C BIT(23)
 
 #define BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8821C 16
 #define BIT_MASK_BK_FAST_EDCA_PKT_TH_8821C 0x7f
 #define BIT_BK_FAST_EDCA_PKT_TH_8821C(x) (((x) & BIT_MASK_BK_FAST_EDCA_PKT_TH_8821C) << BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8821C)
-#define BIT_GET_BK_FAST_EDCA_PKT_TH_8821C(x) (((x) >> BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8821C) & BIT_MASK_BK_FAST_EDCA_PKT_TH_8821C)

+#define BIT_GET_BK_FAST_EDCA_PKT_TH_8821C(x) (((x) >> BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8821C) & BIT_MASK_BK_FAST_EDCA_PKT_TH_8821C)
+
 
 
 #define BIT_SHIFT_BE_FAST_EDCA_TO_8821C 8
 #define BIT_MASK_BE_FAST_EDCA_TO_8821C 0xff
 #define BIT_BE_FAST_EDCA_TO_8821C(x) (((x) & BIT_MASK_BE_FAST_EDCA_TO_8821C) << BIT_SHIFT_BE_FAST_EDCA_TO_8821C)
-#define BIT_GET_BE_FAST_EDCA_TO_8821C(x) (((x) >> BIT_SHIFT_BE_FAST_EDCA_TO_8821C) & BIT_MASK_BE_FAST_EDCA_TO_8821C)

+#define BIT_GET_BE_FAST_EDCA_TO_8821C(x) (((x) >> BIT_SHIFT_BE_FAST_EDCA_TO_8821C) & BIT_MASK_BE_FAST_EDCA_TO_8821C)
+
 
 #define BIT_BE_THRESHOLD_SEL_8821C BIT(7)
 
 #define BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8821C 0
 #define BIT_MASK_BE_FAST_EDCA_PKT_TH_8821C 0x7f
 #define BIT_BE_FAST_EDCA_PKT_TH_8821C(x) (((x) & BIT_MASK_BE_FAST_EDCA_PKT_TH_8821C) << BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8821C)
-#define BIT_GET_BE_FAST_EDCA_PKT_TH_8821C(x) (((x) >> BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8821C) & BIT_MASK_BE_FAST_EDCA_PKT_TH_8821C)

+#define BIT_GET_BE_FAST_EDCA_PKT_TH_8821C(x) (((x) >> BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8821C) & BIT_MASK_BE_FAST_EDCA_PKT_TH_8821C)
+
 
 
 /* 2 REG_MACID_DROP0_8821C */
@@ -6264,7 +6897,8 @@
 #define BIT_SHIFT_MACID31_0_DROP_8821C 0
 #define BIT_MASK_MACID31_0_DROP_8821C 0xffffffffL
 #define BIT_MACID31_0_DROP_8821C(x) (((x) & BIT_MASK_MACID31_0_DROP_8821C) << BIT_SHIFT_MACID31_0_DROP_8821C)
-#define BIT_GET_MACID31_0_DROP_8821C(x) (((x) >> BIT_SHIFT_MACID31_0_DROP_8821C) & BIT_MASK_MACID31_0_DROP_8821C)

+#define BIT_GET_MACID31_0_DROP_8821C(x) (((x) >> BIT_SHIFT_MACID31_0_DROP_8821C) & BIT_MASK_MACID31_0_DROP_8821C)
+
 
 
 /* 2 REG_MACID_DROP1_8821C */
@@ -6272,7 +6906,8 @@
 #define BIT_SHIFT_MACID63_32_DROP_8821C 0
 #define BIT_MASK_MACID63_32_DROP_8821C 0xffffffffL
 #define BIT_MACID63_32_DROP_8821C(x) (((x) & BIT_MASK_MACID63_32_DROP_8821C) << BIT_SHIFT_MACID63_32_DROP_8821C)
-#define BIT_GET_MACID63_32_DROP_8821C(x) (((x) >> BIT_SHIFT_MACID63_32_DROP_8821C) & BIT_MASK_MACID63_32_DROP_8821C)

+#define BIT_GET_MACID63_32_DROP_8821C(x) (((x) >> BIT_SHIFT_MACID63_32_DROP_8821C) & BIT_MASK_MACID63_32_DROP_8821C)
+
 
 
 /* 2 REG_MACID_DROP2_8821C */
@@ -6280,7 +6915,8 @@
 #define BIT_SHIFT_MACID95_64_DROP_8821C 0
 #define BIT_MASK_MACID95_64_DROP_8821C 0xffffffffL
 #define BIT_MACID95_64_DROP_8821C(x) (((x) & BIT_MASK_MACID95_64_DROP_8821C) << BIT_SHIFT_MACID95_64_DROP_8821C)
-#define BIT_GET_MACID95_64_DROP_8821C(x) (((x) >> BIT_SHIFT_MACID95_64_DROP_8821C) & BIT_MASK_MACID95_64_DROP_8821C)

+#define BIT_GET_MACID95_64_DROP_8821C(x) (((x) >> BIT_SHIFT_MACID95_64_DROP_8821C) & BIT_MASK_MACID95_64_DROP_8821C)
+
 
 
 /* 2 REG_MACID_DROP3_8821C */
@@ -6288,7 +6924,8 @@
 #define BIT_SHIFT_MACID127_96_DROP_8821C 0
 #define BIT_MASK_MACID127_96_DROP_8821C 0xffffffffL
 #define BIT_MACID127_96_DROP_8821C(x) (((x) & BIT_MASK_MACID127_96_DROP_8821C) << BIT_SHIFT_MACID127_96_DROP_8821C)
-#define BIT_GET_MACID127_96_DROP_8821C(x) (((x) >> BIT_SHIFT_MACID127_96_DROP_8821C) & BIT_MASK_MACID127_96_DROP_8821C)

+#define BIT_GET_MACID127_96_DROP_8821C(x) (((x) >> BIT_SHIFT_MACID127_96_DROP_8821C) & BIT_MASK_MACID127_96_DROP_8821C)
+
 
 
 /* 2 REG_R_MACID_RELEASE_SUCCESS_0_8821C */
@@ -6296,7 +6933,8 @@
 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8821C 0
 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8821C 0xffffffffL
 #define BIT_R_MACID_RELEASE_SUCCESS_0_8821C(x) (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8821C) << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8821C)
-#define BIT_GET_R_MACID_RELEASE_SUCCESS_0_8821C(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8821C) & BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8821C)

+#define BIT_GET_R_MACID_RELEASE_SUCCESS_0_8821C(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8821C) & BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8821C)
+
 
 
 /* 2 REG_R_MACID_RELEASE_SUCCESS_1_8821C */
@@ -6304,7 +6942,8 @@
 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8821C 0
 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8821C 0xffffffffL
 #define BIT_R_MACID_RELEASE_SUCCESS_1_8821C(x) (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8821C) << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8821C)
-#define BIT_GET_R_MACID_RELEASE_SUCCESS_1_8821C(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8821C) & BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8821C)

+#define BIT_GET_R_MACID_RELEASE_SUCCESS_1_8821C(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8821C) & BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8821C)
+
 
 
 /* 2 REG_R_MACID_RELEASE_SUCCESS_2_8821C */
@@ -6312,7 +6951,8 @@
 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8821C 0
 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8821C 0xffffffffL
 #define BIT_R_MACID_RELEASE_SUCCESS_2_8821C(x) (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8821C) << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8821C)
-#define BIT_GET_R_MACID_RELEASE_SUCCESS_2_8821C(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8821C) & BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8821C)

+#define BIT_GET_R_MACID_RELEASE_SUCCESS_2_8821C(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8821C) & BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8821C)
+
 
 
 /* 2 REG_R_MACID_RELEASE_SUCCESS_3_8821C */
@@ -6320,7 +6960,8 @@
 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8821C 0
 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8821C 0xffffffffL
 #define BIT_R_MACID_RELEASE_SUCCESS_3_8821C(x) (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8821C) << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8821C)
-#define BIT_GET_R_MACID_RELEASE_SUCCESS_3_8821C(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8821C) & BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8821C)

+#define BIT_GET_R_MACID_RELEASE_SUCCESS_3_8821C(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8821C) & BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8821C)
+
 
 
 /* 2 REG_MGG_FIFO_CRTL_8821C */
@@ -6329,26 +6970,30 @@
 #define BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8821C 28
 #define BIT_MASK_R_MGG_FIFO_PG_SIZE_8821C 0x7
 #define BIT_R_MGG_FIFO_PG_SIZE_8821C(x) (((x) & BIT_MASK_R_MGG_FIFO_PG_SIZE_8821C) << BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8821C)
-#define BIT_GET_R_MGG_FIFO_PG_SIZE_8821C(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8821C) & BIT_MASK_R_MGG_FIFO_PG_SIZE_8821C)

+#define BIT_GET_R_MGG_FIFO_PG_SIZE_8821C(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8821C) & BIT_MASK_R_MGG_FIFO_PG_SIZE_8821C)
+
 
 
 #define BIT_SHIFT_R_MGG_FIFO_START_PG_8821C 16
 #define BIT_MASK_R_MGG_FIFO_START_PG_8821C 0xfff
 #define BIT_R_MGG_FIFO_START_PG_8821C(x) (((x) & BIT_MASK_R_MGG_FIFO_START_PG_8821C) << BIT_SHIFT_R_MGG_FIFO_START_PG_8821C)
-#define BIT_GET_R_MGG_FIFO_START_PG_8821C(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_START_PG_8821C) & BIT_MASK_R_MGG_FIFO_START_PG_8821C)

+#define BIT_GET_R_MGG_FIFO_START_PG_8821C(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_START_PG_8821C) & BIT_MASK_R_MGG_FIFO_START_PG_8821C)
+
 
 
 #define BIT_SHIFT_R_MGG_FIFO_SIZE_8821C 14
 #define BIT_MASK_R_MGG_FIFO_SIZE_8821C 0x3
 #define BIT_R_MGG_FIFO_SIZE_8821C(x) (((x) & BIT_MASK_R_MGG_FIFO_SIZE_8821C) << BIT_SHIFT_R_MGG_FIFO_SIZE_8821C)
-#define BIT_GET_R_MGG_FIFO_SIZE_8821C(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_SIZE_8821C) & BIT_MASK_R_MGG_FIFO_SIZE_8821C)

+#define BIT_GET_R_MGG_FIFO_SIZE_8821C(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_SIZE_8821C) & BIT_MASK_R_MGG_FIFO_SIZE_8821C)
+
 
 #define BIT_R_MGG_FIFO_PAUSE_8821C BIT(13)
 
 #define BIT_SHIFT_R_MGG_FIFO_RPTR_8821C 8
 #define BIT_MASK_R_MGG_FIFO_RPTR_8821C 0x1f
 #define BIT_R_MGG_FIFO_RPTR_8821C(x) (((x) & BIT_MASK_R_MGG_FIFO_RPTR_8821C) << BIT_SHIFT_R_MGG_FIFO_RPTR_8821C)
-#define BIT_GET_R_MGG_FIFO_RPTR_8821C(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_RPTR_8821C) & BIT_MASK_R_MGG_FIFO_RPTR_8821C)

+#define BIT_GET_R_MGG_FIFO_RPTR_8821C(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_RPTR_8821C) & BIT_MASK_R_MGG_FIFO_RPTR_8821C)
+
 
 #define BIT_R_MGG_FIFO_OV_8821C BIT(7)
 #define BIT_R_MGG_FIFO_WPTR_ERROR_8821C BIT(6)
@@ -6357,7 +7002,8 @@
 #define BIT_SHIFT_R_MGG_FIFO_WPTR_8821C 0
 #define BIT_MASK_R_MGG_FIFO_WPTR_8821C 0x1f
 #define BIT_R_MGG_FIFO_WPTR_8821C(x) (((x) & BIT_MASK_R_MGG_FIFO_WPTR_8821C) << BIT_SHIFT_R_MGG_FIFO_WPTR_8821C)
-#define BIT_GET_R_MGG_FIFO_WPTR_8821C(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_WPTR_8821C) & BIT_MASK_R_MGG_FIFO_WPTR_8821C)

+#define BIT_GET_R_MGG_FIFO_WPTR_8821C(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_WPTR_8821C) & BIT_MASK_R_MGG_FIFO_WPTR_8821C)
+
 
 
 /* 2 REG_MGG_FIFO_INT_8821C */
@@ -6365,13 +7011,15 @@
 #define BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8821C 16
 #define BIT_MASK_R_MGG_FIFO_INT_FLAG_8821C 0xffff
 #define BIT_R_MGG_FIFO_INT_FLAG_8821C(x) (((x) & BIT_MASK_R_MGG_FIFO_INT_FLAG_8821C) << BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8821C)
-#define BIT_GET_R_MGG_FIFO_INT_FLAG_8821C(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8821C) & BIT_MASK_R_MGG_FIFO_INT_FLAG_8821C)

+#define BIT_GET_R_MGG_FIFO_INT_FLAG_8821C(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8821C) & BIT_MASK_R_MGG_FIFO_INT_FLAG_8821C)
+
 
 
 #define BIT_SHIFT_R_MGG_FIFO_INT_MASK_8821C 0
 #define BIT_MASK_R_MGG_FIFO_INT_MASK_8821C 0xffff
 #define BIT_R_MGG_FIFO_INT_MASK_8821C(x) (((x) & BIT_MASK_R_MGG_FIFO_INT_MASK_8821C) << BIT_SHIFT_R_MGG_FIFO_INT_MASK_8821C)
-#define BIT_GET_R_MGG_FIFO_INT_MASK_8821C(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_INT_MASK_8821C) & BIT_MASK_R_MGG_FIFO_INT_MASK_8821C)

+#define BIT_GET_R_MGG_FIFO_INT_MASK_8821C(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_INT_MASK_8821C) & BIT_MASK_R_MGG_FIFO_INT_MASK_8821C)
+
 
 
 /* 2 REG_MGG_FIFO_LIFETIME_8821C */
@@ -6379,13 +7027,15 @@
 #define BIT_SHIFT_R_MGG_FIFO_LIFETIME_8821C 16
 #define BIT_MASK_R_MGG_FIFO_LIFETIME_8821C 0xffff
 #define BIT_R_MGG_FIFO_LIFETIME_8821C(x) (((x) & BIT_MASK_R_MGG_FIFO_LIFETIME_8821C) << BIT_SHIFT_R_MGG_FIFO_LIFETIME_8821C)
-#define BIT_GET_R_MGG_FIFO_LIFETIME_8821C(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_LIFETIME_8821C) & BIT_MASK_R_MGG_FIFO_LIFETIME_8821C)

+#define BIT_GET_R_MGG_FIFO_LIFETIME_8821C(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_LIFETIME_8821C) & BIT_MASK_R_MGG_FIFO_LIFETIME_8821C)
+
 
 
 #define BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8821C 0
 #define BIT_MASK_R_MGG_FIFO_VALID_MAP_8821C 0xffff
 #define BIT_R_MGG_FIFO_VALID_MAP_8821C(x) (((x) & BIT_MASK_R_MGG_FIFO_VALID_MAP_8821C) << BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8821C)
-#define BIT_GET_R_MGG_FIFO_VALID_MAP_8821C(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8821C) & BIT_MASK_R_MGG_FIFO_VALID_MAP_8821C)

+#define BIT_GET_R_MGG_FIFO_VALID_MAP_8821C(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8821C) & BIT_MASK_R_MGG_FIFO_VALID_MAP_8821C)
+
 
 
 /* 2 REG_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C */
@@ -6393,7 +7043,8 @@
 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C 0
 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C 0x7f
 #define BIT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C(x) (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C) << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C)
-#define BIT_GET_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C) & BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C)

+#define BIT_GET_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C) & BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C)
+
 
 
 /* 2 REG_MU_TX_CTL_8821C (NOT SUPPORT) */
@@ -6402,7 +7053,8 @@
 #define BIT_SHIFT_R_MU_TAB_SEL_8821C 8
 #define BIT_MASK_R_MU_TAB_SEL_8821C 0x7
 #define BIT_R_MU_TAB_SEL_8821C(x) (((x) & BIT_MASK_R_MU_TAB_SEL_8821C) << BIT_SHIFT_R_MU_TAB_SEL_8821C)
-#define BIT_GET_R_MU_TAB_SEL_8821C(x) (((x) >> BIT_SHIFT_R_MU_TAB_SEL_8821C) & BIT_MASK_R_MU_TAB_SEL_8821C)

+#define BIT_GET_R_MU_TAB_SEL_8821C(x) (((x) >> BIT_SHIFT_R_MU_TAB_SEL_8821C) & BIT_MASK_R_MU_TAB_SEL_8821C)
+
 
 #define BIT_R_EN_MU_MIMO_8821C BIT(7)
 #define BIT_R_EN_REVERS_GTAB_8821C BIT(6)
@@ -6410,7 +7062,8 @@
 #define BIT_SHIFT_R_MU_TABLE_VALID_8821C 0
 #define BIT_MASK_R_MU_TABLE_VALID_8821C 0x3f
 #define BIT_R_MU_TABLE_VALID_8821C(x) (((x) & BIT_MASK_R_MU_TABLE_VALID_8821C) << BIT_SHIFT_R_MU_TABLE_VALID_8821C)
-#define BIT_GET_R_MU_TABLE_VALID_8821C(x) (((x) >> BIT_SHIFT_R_MU_TABLE_VALID_8821C) & BIT_MASK_R_MU_TABLE_VALID_8821C)

+#define BIT_GET_R_MU_TABLE_VALID_8821C(x) (((x) >> BIT_SHIFT_R_MU_TABLE_VALID_8821C) & BIT_MASK_R_MU_TABLE_VALID_8821C)
+
 
 
 /* 2 REG_MU_STA_GID_VLD_8821C	(NOT SUPPORT) */
@@ -6420,13 +7073,15 @@
 #define BIT_SHIFT_R_MU_STA_GTAB_VALID_8821C 0
 #define BIT_MASK_R_MU_STA_GTAB_VALID_8821C 0xffffffffL
 #define BIT_R_MU_STA_GTAB_VALID_8821C(x) (((x) & BIT_MASK_R_MU_STA_GTAB_VALID_8821C) << BIT_SHIFT_R_MU_STA_GTAB_VALID_8821C)
-#define BIT_GET_R_MU_STA_GTAB_VALID_8821C(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_VALID_8821C) & BIT_MASK_R_MU_STA_GTAB_VALID_8821C)

+#define BIT_GET_R_MU_STA_GTAB_VALID_8821C(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_VALID_8821C) & BIT_MASK_R_MU_STA_GTAB_VALID_8821C)
+
 
 
 #define BIT_SHIFT_R_MU_STA_GTAB_VALID_8821C 0
 #define BIT_MASK_R_MU_STA_GTAB_VALID_8821C 0xffffffffL
 #define BIT_R_MU_STA_GTAB_VALID_8821C(x) (((x) & BIT_MASK_R_MU_STA_GTAB_VALID_8821C) << BIT_SHIFT_R_MU_STA_GTAB_VALID_8821C)
-#define BIT_GET_R_MU_STA_GTAB_VALID_8821C(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_VALID_8821C) & BIT_MASK_R_MU_STA_GTAB_VALID_8821C)

+#define BIT_GET_R_MU_STA_GTAB_VALID_8821C(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_VALID_8821C) & BIT_MASK_R_MU_STA_GTAB_VALID_8821C)
+
 
 
 /* 2 REG_MU_STA_USER_POS_INFO_8821C	(NOT SUPPORT) */
@@ -6436,13 +7091,15 @@
 #define BIT_SHIFT_R_MU_STA_GTAB_POSITION_8821C 0
 #define BIT_MASK_R_MU_STA_GTAB_POSITION_8821C 0xffffffffffffffffL
 #define BIT_R_MU_STA_GTAB_POSITION_8821C(x) (((x) & BIT_MASK_R_MU_STA_GTAB_POSITION_8821C) << BIT_SHIFT_R_MU_STA_GTAB_POSITION_8821C)
-#define BIT_GET_R_MU_STA_GTAB_POSITION_8821C(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_8821C) & BIT_MASK_R_MU_STA_GTAB_POSITION_8821C)

+#define BIT_GET_R_MU_STA_GTAB_POSITION_8821C(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_8821C) & BIT_MASK_R_MU_STA_GTAB_POSITION_8821C)
+
 
 
 #define BIT_SHIFT_R_MU_STA_GTAB_POSITION_8821C 0
 #define BIT_MASK_R_MU_STA_GTAB_POSITION_8821C 0xffffffffffffffffL
 #define BIT_R_MU_STA_GTAB_POSITION_8821C(x) (((x) & BIT_MASK_R_MU_STA_GTAB_POSITION_8821C) << BIT_SHIFT_R_MU_STA_GTAB_POSITION_8821C)
-#define BIT_GET_R_MU_STA_GTAB_POSITION_8821C(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_8821C) & BIT_MASK_R_MU_STA_GTAB_POSITION_8821C)

+#define BIT_GET_R_MU_STA_GTAB_POSITION_8821C(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_8821C) & BIT_MASK_R_MU_STA_GTAB_POSITION_8821C)
+
 
 
 /* 2 REG_MU_TRX_DBG_CNT_8821C	(NOT SUPPORT) */
@@ -6451,13 +7108,15 @@
 #define BIT_SHIFT_MU_DBGCNT_SEL_8821C 16
 #define BIT_MASK_MU_DBGCNT_SEL_8821C 0xf
 #define BIT_MU_DBGCNT_SEL_8821C(x) (((x) & BIT_MASK_MU_DBGCNT_SEL_8821C) << BIT_SHIFT_MU_DBGCNT_SEL_8821C)
-#define BIT_GET_MU_DBGCNT_SEL_8821C(x) (((x) >> BIT_SHIFT_MU_DBGCNT_SEL_8821C) & BIT_MASK_MU_DBGCNT_SEL_8821C)

+#define BIT_GET_MU_DBGCNT_SEL_8821C(x) (((x) >> BIT_SHIFT_MU_DBGCNT_SEL_8821C) & BIT_MASK_MU_DBGCNT_SEL_8821C)
+
 
 
 #define BIT_SHIFT_MU_DNGCNT_8821C 0
 #define BIT_MASK_MU_DNGCNT_8821C 0xffff
 #define BIT_MU_DNGCNT_8821C(x) (((x) & BIT_MASK_MU_DNGCNT_8821C) << BIT_SHIFT_MU_DNGCNT_8821C)
-#define BIT_GET_MU_DNGCNT_8821C(x) (((x) >> BIT_SHIFT_MU_DNGCNT_8821C) & BIT_MASK_MU_DNGCNT_8821C)

+#define BIT_GET_MU_DNGCNT_8821C(x) (((x) >> BIT_SHIFT_MU_DNGCNT_8821C) & BIT_MASK_MU_DNGCNT_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -6467,19 +7126,22 @@
 #define BIT_SHIFT_TXOPLIMIT_8821C 16
 #define BIT_MASK_TXOPLIMIT_8821C 0x7ff
 #define BIT_TXOPLIMIT_8821C(x) (((x) & BIT_MASK_TXOPLIMIT_8821C) << BIT_SHIFT_TXOPLIMIT_8821C)
-#define BIT_GET_TXOPLIMIT_8821C(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8821C) & BIT_MASK_TXOPLIMIT_8821C)

+#define BIT_GET_TXOPLIMIT_8821C(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8821C) & BIT_MASK_TXOPLIMIT_8821C)
+
 
 
 #define BIT_SHIFT_CW_8821C 8
 #define BIT_MASK_CW_8821C 0xff
 #define BIT_CW_8821C(x) (((x) & BIT_MASK_CW_8821C) << BIT_SHIFT_CW_8821C)
-#define BIT_GET_CW_8821C(x) (((x) >> BIT_SHIFT_CW_8821C) & BIT_MASK_CW_8821C)

+#define BIT_GET_CW_8821C(x) (((x) >> BIT_SHIFT_CW_8821C) & BIT_MASK_CW_8821C)
+
 
 
 #define BIT_SHIFT_AIFS_8821C 0
 #define BIT_MASK_AIFS_8821C 0xff
 #define BIT_AIFS_8821C(x) (((x) & BIT_MASK_AIFS_8821C) << BIT_SHIFT_AIFS_8821C)
-#define BIT_GET_AIFS_8821C(x) (((x) >> BIT_SHIFT_AIFS_8821C) & BIT_MASK_AIFS_8821C)

+#define BIT_GET_AIFS_8821C(x) (((x) >> BIT_SHIFT_AIFS_8821C) & BIT_MASK_AIFS_8821C)
+
 
 
 /* 2 REG_EDCA_VI_PARAM_8821C */
@@ -6489,19 +7151,22 @@
 #define BIT_SHIFT_TXOPLIMIT_8821C 16
 #define BIT_MASK_TXOPLIMIT_8821C 0x7ff
 #define BIT_TXOPLIMIT_8821C(x) (((x) & BIT_MASK_TXOPLIMIT_8821C) << BIT_SHIFT_TXOPLIMIT_8821C)
-#define BIT_GET_TXOPLIMIT_8821C(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8821C) & BIT_MASK_TXOPLIMIT_8821C)

+#define BIT_GET_TXOPLIMIT_8821C(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8821C) & BIT_MASK_TXOPLIMIT_8821C)
+
 
 
 #define BIT_SHIFT_CW_8821C 8
 #define BIT_MASK_CW_8821C 0xff
 #define BIT_CW_8821C(x) (((x) & BIT_MASK_CW_8821C) << BIT_SHIFT_CW_8821C)
-#define BIT_GET_CW_8821C(x) (((x) >> BIT_SHIFT_CW_8821C) & BIT_MASK_CW_8821C)

+#define BIT_GET_CW_8821C(x) (((x) >> BIT_SHIFT_CW_8821C) & BIT_MASK_CW_8821C)
+
 
 
 #define BIT_SHIFT_AIFS_8821C 0
 #define BIT_MASK_AIFS_8821C 0xff
 #define BIT_AIFS_8821C(x) (((x) & BIT_MASK_AIFS_8821C) << BIT_SHIFT_AIFS_8821C)
-#define BIT_GET_AIFS_8821C(x) (((x) >> BIT_SHIFT_AIFS_8821C) & BIT_MASK_AIFS_8821C)

+#define BIT_GET_AIFS_8821C(x) (((x) >> BIT_SHIFT_AIFS_8821C) & BIT_MASK_AIFS_8821C)
+
 
 
 /* 2 REG_EDCA_BE_PARAM_8821C */
@@ -6511,19 +7176,22 @@
 #define BIT_SHIFT_TXOPLIMIT_8821C 16
 #define BIT_MASK_TXOPLIMIT_8821C 0x7ff
 #define BIT_TXOPLIMIT_8821C(x) (((x) & BIT_MASK_TXOPLIMIT_8821C) << BIT_SHIFT_TXOPLIMIT_8821C)
-#define BIT_GET_TXOPLIMIT_8821C(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8821C) & BIT_MASK_TXOPLIMIT_8821C)

+#define BIT_GET_TXOPLIMIT_8821C(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8821C) & BIT_MASK_TXOPLIMIT_8821C)
+
 
 
 #define BIT_SHIFT_CW_8821C 8
 #define BIT_MASK_CW_8821C 0xff
 #define BIT_CW_8821C(x) (((x) & BIT_MASK_CW_8821C) << BIT_SHIFT_CW_8821C)
-#define BIT_GET_CW_8821C(x) (((x) >> BIT_SHIFT_CW_8821C) & BIT_MASK_CW_8821C)

+#define BIT_GET_CW_8821C(x) (((x) >> BIT_SHIFT_CW_8821C) & BIT_MASK_CW_8821C)
+
 
 
 #define BIT_SHIFT_AIFS_8821C 0
 #define BIT_MASK_AIFS_8821C 0xff
 #define BIT_AIFS_8821C(x) (((x) & BIT_MASK_AIFS_8821C) << BIT_SHIFT_AIFS_8821C)
-#define BIT_GET_AIFS_8821C(x) (((x) >> BIT_SHIFT_AIFS_8821C) & BIT_MASK_AIFS_8821C)

+#define BIT_GET_AIFS_8821C(x) (((x) >> BIT_SHIFT_AIFS_8821C) & BIT_MASK_AIFS_8821C)
+
 
 
 /* 2 REG_EDCA_BK_PARAM_8821C */
@@ -6533,19 +7201,22 @@
 #define BIT_SHIFT_TXOPLIMIT_8821C 16
 #define BIT_MASK_TXOPLIMIT_8821C 0x7ff
 #define BIT_TXOPLIMIT_8821C(x) (((x) & BIT_MASK_TXOPLIMIT_8821C) << BIT_SHIFT_TXOPLIMIT_8821C)
-#define BIT_GET_TXOPLIMIT_8821C(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8821C) & BIT_MASK_TXOPLIMIT_8821C)

+#define BIT_GET_TXOPLIMIT_8821C(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8821C) & BIT_MASK_TXOPLIMIT_8821C)
+
 
 
 #define BIT_SHIFT_CW_8821C 8
 #define BIT_MASK_CW_8821C 0xff
 #define BIT_CW_8821C(x) (((x) & BIT_MASK_CW_8821C) << BIT_SHIFT_CW_8821C)
-#define BIT_GET_CW_8821C(x) (((x) >> BIT_SHIFT_CW_8821C) & BIT_MASK_CW_8821C)

+#define BIT_GET_CW_8821C(x) (((x) >> BIT_SHIFT_CW_8821C) & BIT_MASK_CW_8821C)
+
 
 
 #define BIT_SHIFT_AIFS_8821C 0
 #define BIT_MASK_AIFS_8821C 0xff
 #define BIT_AIFS_8821C(x) (((x) & BIT_MASK_AIFS_8821C) << BIT_SHIFT_AIFS_8821C)
-#define BIT_GET_AIFS_8821C(x) (((x) >> BIT_SHIFT_AIFS_8821C) & BIT_MASK_AIFS_8821C)

+#define BIT_GET_AIFS_8821C(x) (((x) >> BIT_SHIFT_AIFS_8821C) & BIT_MASK_AIFS_8821C)
+
 
 
 /* 2 REG_BCNTCFG_8821C */
@@ -6553,19 +7224,22 @@
 #define BIT_SHIFT_BCNCW_MAX_8821C 12
 #define BIT_MASK_BCNCW_MAX_8821C 0xf
 #define BIT_BCNCW_MAX_8821C(x) (((x) & BIT_MASK_BCNCW_MAX_8821C) << BIT_SHIFT_BCNCW_MAX_8821C)
-#define BIT_GET_BCNCW_MAX_8821C(x) (((x) >> BIT_SHIFT_BCNCW_MAX_8821C) & BIT_MASK_BCNCW_MAX_8821C)

+#define BIT_GET_BCNCW_MAX_8821C(x) (((x) >> BIT_SHIFT_BCNCW_MAX_8821C) & BIT_MASK_BCNCW_MAX_8821C)
+
 
 
 #define BIT_SHIFT_BCNCW_MIN_8821C 8
 #define BIT_MASK_BCNCW_MIN_8821C 0xf
 #define BIT_BCNCW_MIN_8821C(x) (((x) & BIT_MASK_BCNCW_MIN_8821C) << BIT_SHIFT_BCNCW_MIN_8821C)
-#define BIT_GET_BCNCW_MIN_8821C(x) (((x) >> BIT_SHIFT_BCNCW_MIN_8821C) & BIT_MASK_BCNCW_MIN_8821C)

+#define BIT_GET_BCNCW_MIN_8821C(x) (((x) >> BIT_SHIFT_BCNCW_MIN_8821C) & BIT_MASK_BCNCW_MIN_8821C)
+
 
 
 #define BIT_SHIFT_BCNIFS_8821C 0
 #define BIT_MASK_BCNIFS_8821C 0xff
 #define BIT_BCNIFS_8821C(x) (((x) & BIT_MASK_BCNIFS_8821C) << BIT_SHIFT_BCNIFS_8821C)
-#define BIT_GET_BCNIFS_8821C(x) (((x) >> BIT_SHIFT_BCNIFS_8821C) & BIT_MASK_BCNIFS_8821C)

+#define BIT_GET_BCNIFS_8821C(x) (((x) >> BIT_SHIFT_BCNIFS_8821C) & BIT_MASK_BCNIFS_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -6575,7 +7249,8 @@
 #define BIT_SHIFT_PIFS_8821C 0
 #define BIT_MASK_PIFS_8821C 0xff
 #define BIT_PIFS_8821C(x) (((x) & BIT_MASK_PIFS_8821C) << BIT_SHIFT_PIFS_8821C)
-#define BIT_GET_PIFS_8821C(x) (((x) >> BIT_SHIFT_PIFS_8821C) & BIT_MASK_PIFS_8821C)

+#define BIT_GET_PIFS_8821C(x) (((x) >> BIT_SHIFT_PIFS_8821C) & BIT_MASK_PIFS_8821C)
+
 
 
 /* 2 REG_RDG_PIFS_8821C */
@@ -6583,7 +7258,8 @@
 #define BIT_SHIFT_RDG_PIFS_8821C 0
 #define BIT_MASK_RDG_PIFS_8821C 0xff
 #define BIT_RDG_PIFS_8821C(x) (((x) & BIT_MASK_RDG_PIFS_8821C) << BIT_SHIFT_RDG_PIFS_8821C)
-#define BIT_GET_RDG_PIFS_8821C(x) (((x) >> BIT_SHIFT_RDG_PIFS_8821C) & BIT_MASK_RDG_PIFS_8821C)

+#define BIT_GET_RDG_PIFS_8821C(x) (((x) >> BIT_SHIFT_RDG_PIFS_8821C) & BIT_MASK_RDG_PIFS_8821C)
+
 
 
 /* 2 REG_SIFS_8821C */
@@ -6591,25 +7267,29 @@
 #define BIT_SHIFT_SIFS_OFDM_TRX_8821C 24
 #define BIT_MASK_SIFS_OFDM_TRX_8821C 0xff
 #define BIT_SIFS_OFDM_TRX_8821C(x) (((x) & BIT_MASK_SIFS_OFDM_TRX_8821C) << BIT_SHIFT_SIFS_OFDM_TRX_8821C)
-#define BIT_GET_SIFS_OFDM_TRX_8821C(x) (((x) >> BIT_SHIFT_SIFS_OFDM_TRX_8821C) & BIT_MASK_SIFS_OFDM_TRX_8821C)

+#define BIT_GET_SIFS_OFDM_TRX_8821C(x) (((x) >> BIT_SHIFT_SIFS_OFDM_TRX_8821C) & BIT_MASK_SIFS_OFDM_TRX_8821C)
+
 
 
 #define BIT_SHIFT_SIFS_CCK_TRX_8821C 16
 #define BIT_MASK_SIFS_CCK_TRX_8821C 0xff
 #define BIT_SIFS_CCK_TRX_8821C(x) (((x) & BIT_MASK_SIFS_CCK_TRX_8821C) << BIT_SHIFT_SIFS_CCK_TRX_8821C)
-#define BIT_GET_SIFS_CCK_TRX_8821C(x) (((x) >> BIT_SHIFT_SIFS_CCK_TRX_8821C) & BIT_MASK_SIFS_CCK_TRX_8821C)

+#define BIT_GET_SIFS_CCK_TRX_8821C(x) (((x) >> BIT_SHIFT_SIFS_CCK_TRX_8821C) & BIT_MASK_SIFS_CCK_TRX_8821C)
+
 
 
 #define BIT_SHIFT_SIFS_OFDM_CTX_8821C 8
 #define BIT_MASK_SIFS_OFDM_CTX_8821C 0xff
 #define BIT_SIFS_OFDM_CTX_8821C(x) (((x) & BIT_MASK_SIFS_OFDM_CTX_8821C) << BIT_SHIFT_SIFS_OFDM_CTX_8821C)
-#define BIT_GET_SIFS_OFDM_CTX_8821C(x) (((x) >> BIT_SHIFT_SIFS_OFDM_CTX_8821C) & BIT_MASK_SIFS_OFDM_CTX_8821C)

+#define BIT_GET_SIFS_OFDM_CTX_8821C(x) (((x) >> BIT_SHIFT_SIFS_OFDM_CTX_8821C) & BIT_MASK_SIFS_OFDM_CTX_8821C)
+
 
 
 #define BIT_SHIFT_SIFS_CCK_CTX_8821C 0
 #define BIT_MASK_SIFS_CCK_CTX_8821C 0xff
 #define BIT_SIFS_CCK_CTX_8821C(x) (((x) & BIT_MASK_SIFS_CCK_CTX_8821C) << BIT_SHIFT_SIFS_CCK_CTX_8821C)
-#define BIT_GET_SIFS_CCK_CTX_8821C(x) (((x) >> BIT_SHIFT_SIFS_CCK_CTX_8821C) & BIT_MASK_SIFS_CCK_CTX_8821C)

+#define BIT_GET_SIFS_CCK_CTX_8821C(x) (((x) >> BIT_SHIFT_SIFS_CCK_CTX_8821C) & BIT_MASK_SIFS_CCK_CTX_8821C)
+
 
 
 /* 2 REG_TSFTR_SYN_OFFSET_8821C */
@@ -6617,7 +7297,8 @@
 #define BIT_SHIFT_TSFTR_SNC_OFFSET_8821C 0
 #define BIT_MASK_TSFTR_SNC_OFFSET_8821C 0xffff
 #define BIT_TSFTR_SNC_OFFSET_8821C(x) (((x) & BIT_MASK_TSFTR_SNC_OFFSET_8821C) << BIT_SHIFT_TSFTR_SNC_OFFSET_8821C)
-#define BIT_GET_TSFTR_SNC_OFFSET_8821C(x) (((x) >> BIT_SHIFT_TSFTR_SNC_OFFSET_8821C) & BIT_MASK_TSFTR_SNC_OFFSET_8821C)

+#define BIT_GET_TSFTR_SNC_OFFSET_8821C(x) (((x) >> BIT_SHIFT_TSFTR_SNC_OFFSET_8821C) & BIT_MASK_TSFTR_SNC_OFFSET_8821C)
+
 
 
 /* 2 REG_AGGR_BREAK_TIME_8821C */
@@ -6625,7 +7306,8 @@
 #define BIT_SHIFT_AGGR_BK_TIME_8821C 0
 #define BIT_MASK_AGGR_BK_TIME_8821C 0xff
 #define BIT_AGGR_BK_TIME_8821C(x) (((x) & BIT_MASK_AGGR_BK_TIME_8821C) << BIT_SHIFT_AGGR_BK_TIME_8821C)
-#define BIT_GET_AGGR_BK_TIME_8821C(x) (((x) >> BIT_SHIFT_AGGR_BK_TIME_8821C) & BIT_MASK_AGGR_BK_TIME_8821C)

+#define BIT_GET_AGGR_BK_TIME_8821C(x) (((x) >> BIT_SHIFT_AGGR_BK_TIME_8821C) & BIT_MASK_AGGR_BK_TIME_8821C)
+
 
 
 /* 2 REG_SLOT_8821C */
@@ -6633,7 +7315,8 @@
 #define BIT_SHIFT_SLOT_8821C 0
 #define BIT_MASK_SLOT_8821C 0xff
 #define BIT_SLOT_8821C(x) (((x) & BIT_MASK_SLOT_8821C) << BIT_SHIFT_SLOT_8821C)
-#define BIT_GET_SLOT_8821C(x) (((x) >> BIT_SHIFT_SLOT_8821C) & BIT_MASK_SLOT_8821C)

+#define BIT_GET_SLOT_8821C(x) (((x) >> BIT_SHIFT_SLOT_8821C) & BIT_MASK_SLOT_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -6647,7 +7330,8 @@
 #define BIT_SHIFT_TXQ_NAV_MSK_8821C 8
 #define BIT_MASK_TXQ_NAV_MSK_8821C 0xf
 #define BIT_TXQ_NAV_MSK_8821C(x) (((x) & BIT_MASK_TXQ_NAV_MSK_8821C) << BIT_SHIFT_TXQ_NAV_MSK_8821C)
-#define BIT_GET_TXQ_NAV_MSK_8821C(x) (((x) >> BIT_SHIFT_TXQ_NAV_MSK_8821C) & BIT_MASK_TXQ_NAV_MSK_8821C)

+#define BIT_GET_TXQ_NAV_MSK_8821C(x) (((x) >> BIT_SHIFT_TXQ_NAV_MSK_8821C) & BIT_MASK_TXQ_NAV_MSK_8821C)
+
 
 #define BIT_DIS_CW_8821C BIT(7)
 #define BIT_NAV_END_TXOP_8821C BIT(6)
@@ -6724,13 +7408,15 @@
 #define BIT_SHIFT_CCA_FILTER_THRS_8821C 8
 #define BIT_MASK_CCA_FILTER_THRS_8821C 0xff
 #define BIT_CCA_FILTER_THRS_8821C(x) (((x) & BIT_MASK_CCA_FILTER_THRS_8821C) << BIT_SHIFT_CCA_FILTER_THRS_8821C)
-#define BIT_GET_CCA_FILTER_THRS_8821C(x) (((x) >> BIT_SHIFT_CCA_FILTER_THRS_8821C) & BIT_MASK_CCA_FILTER_THRS_8821C)

+#define BIT_GET_CCA_FILTER_THRS_8821C(x) (((x) >> BIT_SHIFT_CCA_FILTER_THRS_8821C) & BIT_MASK_CCA_FILTER_THRS_8821C)
+
 
 
 #define BIT_SHIFT_EDCCA_THRS_8821C 0
 #define BIT_MASK_EDCCA_THRS_8821C 0xff
 #define BIT_EDCCA_THRS_8821C(x) (((x) & BIT_MASK_EDCCA_THRS_8821C) << BIT_SHIFT_EDCCA_THRS_8821C)
-#define BIT_GET_EDCCA_THRS_8821C(x) (((x) >> BIT_SHIFT_EDCCA_THRS_8821C) & BIT_MASK_EDCCA_THRS_8821C)

+#define BIT_GET_EDCCA_THRS_8821C(x) (((x) >> BIT_SHIFT_EDCCA_THRS_8821C) & BIT_MASK_EDCCA_THRS_8821C)
+
 
 
 /* 2 REG_P2PPS_SPEC_STATE_8821C */
@@ -6752,7 +7438,8 @@
 #define BIT_SHIFT_P2PON_DIS_TXTIME_8821C 0
 #define BIT_MASK_P2PON_DIS_TXTIME_8821C 0xff
 #define BIT_P2PON_DIS_TXTIME_8821C(x) (((x) & BIT_MASK_P2PON_DIS_TXTIME_8821C) << BIT_SHIFT_P2PON_DIS_TXTIME_8821C)
-#define BIT_GET_P2PON_DIS_TXTIME_8821C(x) (((x) >> BIT_SHIFT_P2PON_DIS_TXTIME_8821C) & BIT_MASK_P2PON_DIS_TXTIME_8821C)

+#define BIT_GET_P2PON_DIS_TXTIME_8821C(x) (((x) >> BIT_SHIFT_P2PON_DIS_TXTIME_8821C) & BIT_MASK_P2PON_DIS_TXTIME_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -6770,13 +7457,15 @@
 #define BIT_SHIFT_TBTT_HOLD_TIME_AP_8821C 8
 #define BIT_MASK_TBTT_HOLD_TIME_AP_8821C 0xfff
 #define BIT_TBTT_HOLD_TIME_AP_8821C(x) (((x) & BIT_MASK_TBTT_HOLD_TIME_AP_8821C) << BIT_SHIFT_TBTT_HOLD_TIME_AP_8821C)
-#define BIT_GET_TBTT_HOLD_TIME_AP_8821C(x) (((x) >> BIT_SHIFT_TBTT_HOLD_TIME_AP_8821C) & BIT_MASK_TBTT_HOLD_TIME_AP_8821C)

+#define BIT_GET_TBTT_HOLD_TIME_AP_8821C(x) (((x) >> BIT_SHIFT_TBTT_HOLD_TIME_AP_8821C) & BIT_MASK_TBTT_HOLD_TIME_AP_8821C)
+
 
 
 #define BIT_SHIFT_TBTT_PROHIBIT_SETUP_8821C 0
 #define BIT_MASK_TBTT_PROHIBIT_SETUP_8821C 0xf
 #define BIT_TBTT_PROHIBIT_SETUP_8821C(x) (((x) & BIT_MASK_TBTT_PROHIBIT_SETUP_8821C) << BIT_SHIFT_TBTT_PROHIBIT_SETUP_8821C)
-#define BIT_GET_TBTT_PROHIBIT_SETUP_8821C(x) (((x) >> BIT_SHIFT_TBTT_PROHIBIT_SETUP_8821C) & BIT_MASK_TBTT_PROHIBIT_SETUP_8821C)

+#define BIT_GET_TBTT_PROHIBIT_SETUP_8821C(x) (((x) >> BIT_SHIFT_TBTT_PROHIBIT_SETUP_8821C) & BIT_MASK_TBTT_PROHIBIT_SETUP_8821C)
+
 
 
 /* 2 REG_P2PPS_STATE_8821C */
@@ -6794,7 +7483,8 @@
 #define BIT_SHIFT_RD_NAV_PROT_NXT_8821C 0
 #define BIT_MASK_RD_NAV_PROT_NXT_8821C 0xffff
 #define BIT_RD_NAV_PROT_NXT_8821C(x) (((x) & BIT_MASK_RD_NAV_PROT_NXT_8821C) << BIT_SHIFT_RD_NAV_PROT_NXT_8821C)
-#define BIT_GET_RD_NAV_PROT_NXT_8821C(x) (((x) >> BIT_SHIFT_RD_NAV_PROT_NXT_8821C) & BIT_MASK_RD_NAV_PROT_NXT_8821C)

+#define BIT_GET_RD_NAV_PROT_NXT_8821C(x) (((x) >> BIT_SHIFT_RD_NAV_PROT_NXT_8821C) & BIT_MASK_RD_NAV_PROT_NXT_8821C)
+
 
 
 /* 2 REG_NAV_PROT_LEN_8821C */
@@ -6802,7 +7492,8 @@
 #define BIT_SHIFT_NAV_PROT_LEN_8821C 0
 #define BIT_MASK_NAV_PROT_LEN_8821C 0xffff
 #define BIT_NAV_PROT_LEN_8821C(x) (((x) & BIT_MASK_NAV_PROT_LEN_8821C) << BIT_SHIFT_NAV_PROT_LEN_8821C)
-#define BIT_GET_NAV_PROT_LEN_8821C(x) (((x) >> BIT_SHIFT_NAV_PROT_LEN_8821C) & BIT_MASK_NAV_PROT_LEN_8821C)

+#define BIT_GET_NAV_PROT_LEN_8821C(x) (((x) >> BIT_SHIFT_NAV_PROT_LEN_8821C) & BIT_MASK_NAV_PROT_LEN_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -6832,7 +7523,8 @@
 #define BIT_SHIFT_MBID_BCN_NUM_8821C 0
 #define BIT_MASK_MBID_BCN_NUM_8821C 0x7
 #define BIT_MBID_BCN_NUM_8821C(x) (((x) & BIT_MASK_MBID_BCN_NUM_8821C) << BIT_SHIFT_MBID_BCN_NUM_8821C)
-#define BIT_GET_MBID_BCN_NUM_8821C(x) (((x) >> BIT_SHIFT_MBID_BCN_NUM_8821C) & BIT_MASK_MBID_BCN_NUM_8821C)

+#define BIT_GET_MBID_BCN_NUM_8821C(x) (((x) >> BIT_SHIFT_MBID_BCN_NUM_8821C) & BIT_MASK_MBID_BCN_NUM_8821C)
+
 
 
 /* 2 REG_DUAL_TSF_RST_8821C */
@@ -6848,19 +7540,22 @@
 #define BIT_SHIFT_BCN_TIMER_SEL_FWRD_8821C 28
 #define BIT_MASK_BCN_TIMER_SEL_FWRD_8821C 0x7
 #define BIT_BCN_TIMER_SEL_FWRD_8821C(x) (((x) & BIT_MASK_BCN_TIMER_SEL_FWRD_8821C) << BIT_SHIFT_BCN_TIMER_SEL_FWRD_8821C)
-#define BIT_GET_BCN_TIMER_SEL_FWRD_8821C(x) (((x) >> BIT_SHIFT_BCN_TIMER_SEL_FWRD_8821C) & BIT_MASK_BCN_TIMER_SEL_FWRD_8821C)

+#define BIT_GET_BCN_TIMER_SEL_FWRD_8821C(x) (((x) >> BIT_SHIFT_BCN_TIMER_SEL_FWRD_8821C) & BIT_MASK_BCN_TIMER_SEL_FWRD_8821C)
+
 
 
 #define BIT_SHIFT_BCN_SPACE_CLINT0_8821C 16
 #define BIT_MASK_BCN_SPACE_CLINT0_8821C 0xfff
 #define BIT_BCN_SPACE_CLINT0_8821C(x) (((x) & BIT_MASK_BCN_SPACE_CLINT0_8821C) << BIT_SHIFT_BCN_SPACE_CLINT0_8821C)
-#define BIT_GET_BCN_SPACE_CLINT0_8821C(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT0_8821C) & BIT_MASK_BCN_SPACE_CLINT0_8821C)

+#define BIT_GET_BCN_SPACE_CLINT0_8821C(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT0_8821C) & BIT_MASK_BCN_SPACE_CLINT0_8821C)
+
 
 
 #define BIT_SHIFT_BCN_SPACE0_8821C 0
 #define BIT_MASK_BCN_SPACE0_8821C 0xffff
 #define BIT_BCN_SPACE0_8821C(x) (((x) & BIT_MASK_BCN_SPACE0_8821C) << BIT_SHIFT_BCN_SPACE0_8821C)
-#define BIT_GET_BCN_SPACE0_8821C(x) (((x) >> BIT_SHIFT_BCN_SPACE0_8821C) & BIT_MASK_BCN_SPACE0_8821C)

+#define BIT_GET_BCN_SPACE0_8821C(x) (((x) >> BIT_SHIFT_BCN_SPACE0_8821C) & BIT_MASK_BCN_SPACE0_8821C)
+
 
 
 /* 2 REG_DRVERLYINT_8821C */
@@ -6868,7 +7563,8 @@
 #define BIT_SHIFT_DRVERLYITV_8821C 0
 #define BIT_MASK_DRVERLYITV_8821C 0xff
 #define BIT_DRVERLYITV_8821C(x) (((x) & BIT_MASK_DRVERLYITV_8821C) << BIT_SHIFT_DRVERLYITV_8821C)
-#define BIT_GET_DRVERLYITV_8821C(x) (((x) >> BIT_SHIFT_DRVERLYITV_8821C) & BIT_MASK_DRVERLYITV_8821C)

+#define BIT_GET_DRVERLYITV_8821C(x) (((x) >> BIT_SHIFT_DRVERLYITV_8821C) & BIT_MASK_DRVERLYITV_8821C)
+
 
 
 /* 2 REG_BCNDMATIM_8821C */
@@ -6876,7 +7572,8 @@
 #define BIT_SHIFT_BCNDMATIM_8821C 0
 #define BIT_MASK_BCNDMATIM_8821C 0xff
 #define BIT_BCNDMATIM_8821C(x) (((x) & BIT_MASK_BCNDMATIM_8821C) << BIT_SHIFT_BCNDMATIM_8821C)
-#define BIT_GET_BCNDMATIM_8821C(x) (((x) >> BIT_SHIFT_BCNDMATIM_8821C) & BIT_MASK_BCNDMATIM_8821C)

+#define BIT_GET_BCNDMATIM_8821C(x) (((x) >> BIT_SHIFT_BCNDMATIM_8821C) & BIT_MASK_BCNDMATIM_8821C)
+
 
 
 /* 2 REG_ATIMWND_8821C */
@@ -6884,7 +7581,8 @@
 #define BIT_SHIFT_ATIMWND0_8821C 0
 #define BIT_MASK_ATIMWND0_8821C 0xffff
 #define BIT_ATIMWND0_8821C(x) (((x) & BIT_MASK_ATIMWND0_8821C) << BIT_SHIFT_ATIMWND0_8821C)
-#define BIT_GET_ATIMWND0_8821C(x) (((x) >> BIT_SHIFT_ATIMWND0_8821C) & BIT_MASK_ATIMWND0_8821C)

+#define BIT_GET_ATIMWND0_8821C(x) (((x) >> BIT_SHIFT_ATIMWND0_8821C) & BIT_MASK_ATIMWND0_8821C)
+
 
 
 /* 2 REG_USTIME_TSF_8821C */
@@ -6892,7 +7590,8 @@
 #define BIT_SHIFT_USTIME_TSF_V1_8821C 0
 #define BIT_MASK_USTIME_TSF_V1_8821C 0xff
 #define BIT_USTIME_TSF_V1_8821C(x) (((x) & BIT_MASK_USTIME_TSF_V1_8821C) << BIT_SHIFT_USTIME_TSF_V1_8821C)
-#define BIT_GET_USTIME_TSF_V1_8821C(x) (((x) >> BIT_SHIFT_USTIME_TSF_V1_8821C) & BIT_MASK_USTIME_TSF_V1_8821C)

+#define BIT_GET_USTIME_TSF_V1_8821C(x) (((x) >> BIT_SHIFT_USTIME_TSF_V1_8821C) & BIT_MASK_USTIME_TSF_V1_8821C)
+
 
 
 /* 2 REG_BCN_MAX_ERR_8821C */
@@ -6900,7 +7599,8 @@
 #define BIT_SHIFT_BCN_MAX_ERR_8821C 0
 #define BIT_MASK_BCN_MAX_ERR_8821C 0xff
 #define BIT_BCN_MAX_ERR_8821C(x) (((x) & BIT_MASK_BCN_MAX_ERR_8821C) << BIT_SHIFT_BCN_MAX_ERR_8821C)
-#define BIT_GET_BCN_MAX_ERR_8821C(x) (((x) >> BIT_SHIFT_BCN_MAX_ERR_8821C) & BIT_MASK_BCN_MAX_ERR_8821C)

+#define BIT_GET_BCN_MAX_ERR_8821C(x) (((x) >> BIT_SHIFT_BCN_MAX_ERR_8821C) & BIT_MASK_BCN_MAX_ERR_8821C)
+
 
 
 /* 2 REG_RXTSF_OFFSET_CCK_8821C */
@@ -6908,7 +7608,8 @@
 #define BIT_SHIFT_CCK_RXTSF_OFFSET_8821C 0
 #define BIT_MASK_CCK_RXTSF_OFFSET_8821C 0xff
 #define BIT_CCK_RXTSF_OFFSET_8821C(x) (((x) & BIT_MASK_CCK_RXTSF_OFFSET_8821C) << BIT_SHIFT_CCK_RXTSF_OFFSET_8821C)
-#define BIT_GET_CCK_RXTSF_OFFSET_8821C(x) (((x) >> BIT_SHIFT_CCK_RXTSF_OFFSET_8821C) & BIT_MASK_CCK_RXTSF_OFFSET_8821C)

+#define BIT_GET_CCK_RXTSF_OFFSET_8821C(x) (((x) >> BIT_SHIFT_CCK_RXTSF_OFFSET_8821C) & BIT_MASK_CCK_RXTSF_OFFSET_8821C)
+
 
 
 /* 2 REG_RXTSF_OFFSET_OFDM_8821C */
@@ -6916,7 +7617,8 @@
 #define BIT_SHIFT_OFDM_RXTSF_OFFSET_8821C 0
 #define BIT_MASK_OFDM_RXTSF_OFFSET_8821C 0xff
 #define BIT_OFDM_RXTSF_OFFSET_8821C(x) (((x) & BIT_MASK_OFDM_RXTSF_OFFSET_8821C) << BIT_SHIFT_OFDM_RXTSF_OFFSET_8821C)
-#define BIT_GET_OFDM_RXTSF_OFFSET_8821C(x) (((x) >> BIT_SHIFT_OFDM_RXTSF_OFFSET_8821C) & BIT_MASK_OFDM_RXTSF_OFFSET_8821C)

+#define BIT_GET_OFDM_RXTSF_OFFSET_8821C(x) (((x) >> BIT_SHIFT_OFDM_RXTSF_OFFSET_8821C) & BIT_MASK_OFDM_RXTSF_OFFSET_8821C)
+
 
 
 /* 2 REG_TSFTR_8821C */
@@ -6924,7 +7626,8 @@
 #define BIT_SHIFT_TSF_TIMER_V1_8821C 0
 #define BIT_MASK_TSF_TIMER_V1_8821C 0xffffffffL
 #define BIT_TSF_TIMER_V1_8821C(x) (((x) & BIT_MASK_TSF_TIMER_V1_8821C) << BIT_SHIFT_TSF_TIMER_V1_8821C)
-#define BIT_GET_TSF_TIMER_V1_8821C(x) (((x) >> BIT_SHIFT_TSF_TIMER_V1_8821C) & BIT_MASK_TSF_TIMER_V1_8821C)

+#define BIT_GET_TSF_TIMER_V1_8821C(x) (((x) >> BIT_SHIFT_TSF_TIMER_V1_8821C) & BIT_MASK_TSF_TIMER_V1_8821C)
+
 
 
 /* 2 REG_TSFTR_1_8821C */
@@ -6932,7 +7635,8 @@
 #define BIT_SHIFT_TSF_TIMER_V2_8821C 0
 #define BIT_MASK_TSF_TIMER_V2_8821C 0xffffffffL
 #define BIT_TSF_TIMER_V2_8821C(x) (((x) & BIT_MASK_TSF_TIMER_V2_8821C) << BIT_SHIFT_TSF_TIMER_V2_8821C)
-#define BIT_GET_TSF_TIMER_V2_8821C(x) (((x) >> BIT_SHIFT_TSF_TIMER_V2_8821C) & BIT_MASK_TSF_TIMER_V2_8821C)

+#define BIT_GET_TSF_TIMER_V2_8821C(x) (((x) >> BIT_SHIFT_TSF_TIMER_V2_8821C) & BIT_MASK_TSF_TIMER_V2_8821C)
+
 
 
 /* 2 REG_FREERUN_CNT_8821C */
@@ -6940,7 +7644,8 @@
 #define BIT_SHIFT_FREERUN_CNT_V1_8821C 0
 #define BIT_MASK_FREERUN_CNT_V1_8821C 0xffffffffL
 #define BIT_FREERUN_CNT_V1_8821C(x) (((x) & BIT_MASK_FREERUN_CNT_V1_8821C) << BIT_SHIFT_FREERUN_CNT_V1_8821C)
-#define BIT_GET_FREERUN_CNT_V1_8821C(x) (((x) >> BIT_SHIFT_FREERUN_CNT_V1_8821C) & BIT_MASK_FREERUN_CNT_V1_8821C)

+#define BIT_GET_FREERUN_CNT_V1_8821C(x) (((x) >> BIT_SHIFT_FREERUN_CNT_V1_8821C) & BIT_MASK_FREERUN_CNT_V1_8821C)
+
 
 
 /* 2 REG_FREERUN_CNT_1_8821C */
@@ -6948,7 +7653,8 @@
 #define BIT_SHIFT_FREERUN_CNT_V2_8821C 0
 #define BIT_MASK_FREERUN_CNT_V2_8821C 0xffffffffL
 #define BIT_FREERUN_CNT_V2_8821C(x) (((x) & BIT_MASK_FREERUN_CNT_V2_8821C) << BIT_SHIFT_FREERUN_CNT_V2_8821C)
-#define BIT_GET_FREERUN_CNT_V2_8821C(x) (((x) >> BIT_SHIFT_FREERUN_CNT_V2_8821C) & BIT_MASK_FREERUN_CNT_V2_8821C)

+#define BIT_GET_FREERUN_CNT_V2_8821C(x) (((x) >> BIT_SHIFT_FREERUN_CNT_V2_8821C) & BIT_MASK_FREERUN_CNT_V2_8821C)
+
 
 
 /* 2 REG_ATIMWND1_V1_8821C */
@@ -6956,7 +7662,8 @@
 #define BIT_SHIFT_ATIMWND1_V1_8821C 0
 #define BIT_MASK_ATIMWND1_V1_8821C 0xff
 #define BIT_ATIMWND1_V1_8821C(x) (((x) & BIT_MASK_ATIMWND1_V1_8821C) << BIT_SHIFT_ATIMWND1_V1_8821C)
-#define BIT_GET_ATIMWND1_V1_8821C(x) (((x) >> BIT_SHIFT_ATIMWND1_V1_8821C) & BIT_MASK_ATIMWND1_V1_8821C)

+#define BIT_GET_ATIMWND1_V1_8821C(x) (((x) >> BIT_SHIFT_ATIMWND1_V1_8821C) & BIT_MASK_ATIMWND1_V1_8821C)
+
 
 
 /* 2 REG_TBTT_PROHIBIT_INFRA_8821C */
@@ -6964,7 +7671,8 @@
 #define BIT_SHIFT_TBTT_PROHIBIT_INFRA_8821C 0
 #define BIT_MASK_TBTT_PROHIBIT_INFRA_8821C 0xff
 #define BIT_TBTT_PROHIBIT_INFRA_8821C(x) (((x) & BIT_MASK_TBTT_PROHIBIT_INFRA_8821C) << BIT_SHIFT_TBTT_PROHIBIT_INFRA_8821C)
-#define BIT_GET_TBTT_PROHIBIT_INFRA_8821C(x) (((x) >> BIT_SHIFT_TBTT_PROHIBIT_INFRA_8821C) & BIT_MASK_TBTT_PROHIBIT_INFRA_8821C)

+#define BIT_GET_TBTT_PROHIBIT_INFRA_8821C(x) (((x) >> BIT_SHIFT_TBTT_PROHIBIT_INFRA_8821C) & BIT_MASK_TBTT_PROHIBIT_INFRA_8821C)
+
 
 
 /* 2 REG_CTWND_8821C */
@@ -6972,7 +7680,8 @@
 #define BIT_SHIFT_CTWND_8821C 0
 #define BIT_MASK_CTWND_8821C 0xff
 #define BIT_CTWND_8821C(x) (((x) & BIT_MASK_CTWND_8821C) << BIT_SHIFT_CTWND_8821C)
-#define BIT_GET_CTWND_8821C(x) (((x) >> BIT_SHIFT_CTWND_8821C) & BIT_MASK_CTWND_8821C)

+#define BIT_GET_CTWND_8821C(x) (((x) >> BIT_SHIFT_CTWND_8821C) & BIT_MASK_CTWND_8821C)
+
 
 
 /* 2 REG_BCNIVLCUNT_8821C */
@@ -6980,7 +7689,8 @@
 #define BIT_SHIFT_BCNIVLCUNT_8821C 0
 #define BIT_MASK_BCNIVLCUNT_8821C 0x7f
 #define BIT_BCNIVLCUNT_8821C(x) (((x) & BIT_MASK_BCNIVLCUNT_8821C) << BIT_SHIFT_BCNIVLCUNT_8821C)
-#define BIT_GET_BCNIVLCUNT_8821C(x) (((x) >> BIT_SHIFT_BCNIVLCUNT_8821C) & BIT_MASK_BCNIVLCUNT_8821C)

+#define BIT_GET_BCNIVLCUNT_8821C(x) (((x) >> BIT_SHIFT_BCNIVLCUNT_8821C) & BIT_MASK_BCNIVLCUNT_8821C)
+
 
 
 /* 2 REG_BCNDROPCTRL_8821C */
@@ -6989,7 +7699,8 @@
 #define BIT_SHIFT_BEACON_DROP_IVL_8821C 0
 #define BIT_MASK_BEACON_DROP_IVL_8821C 0x7f
 #define BIT_BEACON_DROP_IVL_8821C(x) (((x) & BIT_MASK_BEACON_DROP_IVL_8821C) << BIT_SHIFT_BEACON_DROP_IVL_8821C)
-#define BIT_GET_BEACON_DROP_IVL_8821C(x) (((x) >> BIT_SHIFT_BEACON_DROP_IVL_8821C) & BIT_MASK_BEACON_DROP_IVL_8821C)

+#define BIT_GET_BEACON_DROP_IVL_8821C(x) (((x) >> BIT_SHIFT_BEACON_DROP_IVL_8821C) & BIT_MASK_BEACON_DROP_IVL_8821C)
+
 
 
 /* 2 REG_HGQ_TIMEOUT_PERIOD_8821C */
@@ -6997,7 +7708,8 @@
 #define BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8821C 0
 #define BIT_MASK_HGQ_TIMEOUT_PERIOD_8821C 0xff
 #define BIT_HGQ_TIMEOUT_PERIOD_8821C(x) (((x) & BIT_MASK_HGQ_TIMEOUT_PERIOD_8821C) << BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8821C)
-#define BIT_GET_HGQ_TIMEOUT_PERIOD_8821C(x) (((x) >> BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8821C) & BIT_MASK_HGQ_TIMEOUT_PERIOD_8821C)

+#define BIT_GET_HGQ_TIMEOUT_PERIOD_8821C(x) (((x) >> BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8821C) & BIT_MASK_HGQ_TIMEOUT_PERIOD_8821C)
+
 
 
 /* 2 REG_TXCMD_TIMEOUT_PERIOD_8821C */
@@ -7005,7 +7717,8 @@
 #define BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8821C 0
 #define BIT_MASK_TXCMD_TIMEOUT_PERIOD_8821C 0xff
 #define BIT_TXCMD_TIMEOUT_PERIOD_8821C(x) (((x) & BIT_MASK_TXCMD_TIMEOUT_PERIOD_8821C) << BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8821C)
-#define BIT_GET_TXCMD_TIMEOUT_PERIOD_8821C(x) (((x) >> BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8821C) & BIT_MASK_TXCMD_TIMEOUT_PERIOD_8821C)

+#define BIT_GET_TXCMD_TIMEOUT_PERIOD_8821C(x) (((x) >> BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8821C) & BIT_MASK_TXCMD_TIMEOUT_PERIOD_8821C)
+
 
 
 /* 2 REG_MISC_CTRL_8821C */
@@ -7017,7 +7730,8 @@
 #define BIT_SHIFT_DIS_SECONDARY_CCA_8821C 0
 #define BIT_MASK_DIS_SECONDARY_CCA_8821C 0x3
 #define BIT_DIS_SECONDARY_CCA_8821C(x) (((x) & BIT_MASK_DIS_SECONDARY_CCA_8821C) << BIT_SHIFT_DIS_SECONDARY_CCA_8821C)
-#define BIT_GET_DIS_SECONDARY_CCA_8821C(x) (((x) >> BIT_SHIFT_DIS_SECONDARY_CCA_8821C) & BIT_MASK_DIS_SECONDARY_CCA_8821C)

+#define BIT_GET_DIS_SECONDARY_CCA_8821C(x) (((x) >> BIT_SHIFT_DIS_SECONDARY_CCA_8821C) & BIT_MASK_DIS_SECONDARY_CCA_8821C)
+
 
 
 /* 2 REG_BCN_CTRL_CLINT1_8821C */
@@ -7051,7 +7765,8 @@
 #define BIT_SHIFT_PORT_SEL_8821C 0
 #define BIT_MASK_PORT_SEL_8821C 0x7
 #define BIT_PORT_SEL_8821C(x) (((x) & BIT_MASK_PORT_SEL_8821C) << BIT_SHIFT_PORT_SEL_8821C)
-#define BIT_GET_PORT_SEL_8821C(x) (((x) >> BIT_SHIFT_PORT_SEL_8821C) & BIT_MASK_PORT_SEL_8821C)

+#define BIT_GET_PORT_SEL_8821C(x) (((x) >> BIT_SHIFT_PORT_SEL_8821C) & BIT_MASK_PORT_SEL_8821C)
+
 
 
 /* 2 REG_P2PPS1_SPEC_STATE_8821C */
@@ -7099,7 +7814,8 @@
 #define BIT_SHIFT_PSTIMER0_INT_8821C 5
 #define BIT_MASK_PSTIMER0_INT_8821C 0x7ffffff
 #define BIT_PSTIMER0_INT_8821C(x) (((x) & BIT_MASK_PSTIMER0_INT_8821C) << BIT_SHIFT_PSTIMER0_INT_8821C)
-#define BIT_GET_PSTIMER0_INT_8821C(x) (((x) >> BIT_SHIFT_PSTIMER0_INT_8821C) & BIT_MASK_PSTIMER0_INT_8821C)

+#define BIT_GET_PSTIMER0_INT_8821C(x) (((x) >> BIT_SHIFT_PSTIMER0_INT_8821C) & BIT_MASK_PSTIMER0_INT_8821C)
+
 
 
 /* 2 REG_PS_TIMER1_8821C */
@@ -7107,7 +7823,8 @@
 #define BIT_SHIFT_PSTIMER1_INT_8821C 5
 #define BIT_MASK_PSTIMER1_INT_8821C 0x7ffffff
 #define BIT_PSTIMER1_INT_8821C(x) (((x) & BIT_MASK_PSTIMER1_INT_8821C) << BIT_SHIFT_PSTIMER1_INT_8821C)
-#define BIT_GET_PSTIMER1_INT_8821C(x) (((x) >> BIT_SHIFT_PSTIMER1_INT_8821C) & BIT_MASK_PSTIMER1_INT_8821C)

+#define BIT_GET_PSTIMER1_INT_8821C(x) (((x) >> BIT_SHIFT_PSTIMER1_INT_8821C) & BIT_MASK_PSTIMER1_INT_8821C)
+
 
 
 /* 2 REG_PS_TIMER2_8821C */
@@ -7115,7 +7832,8 @@
 #define BIT_SHIFT_PSTIMER2_INT_8821C 5
 #define BIT_MASK_PSTIMER2_INT_8821C 0x7ffffff
 #define BIT_PSTIMER2_INT_8821C(x) (((x) & BIT_MASK_PSTIMER2_INT_8821C) << BIT_SHIFT_PSTIMER2_INT_8821C)
-#define BIT_GET_PSTIMER2_INT_8821C(x) (((x) >> BIT_SHIFT_PSTIMER2_INT_8821C) & BIT_MASK_PSTIMER2_INT_8821C)

+#define BIT_GET_PSTIMER2_INT_8821C(x) (((x) >> BIT_SHIFT_PSTIMER2_INT_8821C) & BIT_MASK_PSTIMER2_INT_8821C)
+
 
 
 /* 2 REG_TBTT_CTN_AREA_8821C */
@@ -7123,7 +7841,8 @@
 #define BIT_SHIFT_TBTT_CTN_AREA_8821C 0
 #define BIT_MASK_TBTT_CTN_AREA_8821C 0xff
 #define BIT_TBTT_CTN_AREA_8821C(x) (((x) & BIT_MASK_TBTT_CTN_AREA_8821C) << BIT_SHIFT_TBTT_CTN_AREA_8821C)
-#define BIT_GET_TBTT_CTN_AREA_8821C(x) (((x) >> BIT_SHIFT_TBTT_CTN_AREA_8821C) & BIT_MASK_TBTT_CTN_AREA_8821C)

+#define BIT_GET_TBTT_CTN_AREA_8821C(x) (((x) >> BIT_SHIFT_TBTT_CTN_AREA_8821C) & BIT_MASK_TBTT_CTN_AREA_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -7133,7 +7852,8 @@
 #define BIT_SHIFT_FORCE_BCN_IFS_8821C 0
 #define BIT_MASK_FORCE_BCN_IFS_8821C 0xff
 #define BIT_FORCE_BCN_IFS_8821C(x) (((x) & BIT_MASK_FORCE_BCN_IFS_8821C) << BIT_SHIFT_FORCE_BCN_IFS_8821C)
-#define BIT_GET_FORCE_BCN_IFS_8821C(x) (((x) >> BIT_SHIFT_FORCE_BCN_IFS_8821C) & BIT_MASK_FORCE_BCN_IFS_8821C)

+#define BIT_GET_FORCE_BCN_IFS_8821C(x) (((x) >> BIT_SHIFT_FORCE_BCN_IFS_8821C) & BIT_MASK_FORCE_BCN_IFS_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -7143,7 +7863,8 @@
 #define BIT_SHIFT_TXOP_MIN_8821C 0
 #define BIT_MASK_TXOP_MIN_8821C 0x3fff
 #define BIT_TXOP_MIN_8821C(x) (((x) & BIT_MASK_TXOP_MIN_8821C) << BIT_SHIFT_TXOP_MIN_8821C)
-#define BIT_GET_TXOP_MIN_8821C(x) (((x) >> BIT_SHIFT_TXOP_MIN_8821C) & BIT_MASK_TXOP_MIN_8821C)

+#define BIT_GET_TXOP_MIN_8821C(x) (((x) >> BIT_SHIFT_TXOP_MIN_8821C) & BIT_MASK_TXOP_MIN_8821C)
+
 
 
 /* 2 REG_PRE_BKF_TIME_8821C */
@@ -7151,7 +7872,8 @@
 #define BIT_SHIFT_PRE_BKF_TIME_8821C 0
 #define BIT_MASK_PRE_BKF_TIME_8821C 0xff
 #define BIT_PRE_BKF_TIME_8821C(x) (((x) & BIT_MASK_PRE_BKF_TIME_8821C) << BIT_SHIFT_PRE_BKF_TIME_8821C)
-#define BIT_GET_PRE_BKF_TIME_8821C(x) (((x) >> BIT_SHIFT_PRE_BKF_TIME_8821C) & BIT_MASK_PRE_BKF_TIME_8821C)

+#define BIT_GET_PRE_BKF_TIME_8821C(x) (((x) >> BIT_SHIFT_PRE_BKF_TIME_8821C) & BIT_MASK_PRE_BKF_TIME_8821C)
+
 
 
 /* 2 REG_CROSS_TXOP_CTRL_8821C */
@@ -7171,7 +7893,8 @@
 #define BIT_SHIFT_ATIMWND2_8821C 0
 #define BIT_MASK_ATIMWND2_8821C 0xff
 #define BIT_ATIMWND2_8821C(x) (((x) & BIT_MASK_ATIMWND2_8821C) << BIT_SHIFT_ATIMWND2_8821C)
-#define BIT_GET_ATIMWND2_8821C(x) (((x) >> BIT_SHIFT_ATIMWND2_8821C) & BIT_MASK_ATIMWND2_8821C)

+#define BIT_GET_ATIMWND2_8821C(x) (((x) >> BIT_SHIFT_ATIMWND2_8821C) & BIT_MASK_ATIMWND2_8821C)
+
 
 
 /* 2 REG_ATIMWND3_8821C */
@@ -7179,7 +7902,8 @@
 #define BIT_SHIFT_ATIMWND3_8821C 0
 #define BIT_MASK_ATIMWND3_8821C 0xff
 #define BIT_ATIMWND3_8821C(x) (((x) & BIT_MASK_ATIMWND3_8821C) << BIT_SHIFT_ATIMWND3_8821C)
-#define BIT_GET_ATIMWND3_8821C(x) (((x) >> BIT_SHIFT_ATIMWND3_8821C) & BIT_MASK_ATIMWND3_8821C)

+#define BIT_GET_ATIMWND3_8821C(x) (((x) >> BIT_SHIFT_ATIMWND3_8821C) & BIT_MASK_ATIMWND3_8821C)
+
 
 
 /* 2 REG_ATIMWND4_8821C */
@@ -7187,7 +7911,8 @@
 #define BIT_SHIFT_ATIMWND4_8821C 0
 #define BIT_MASK_ATIMWND4_8821C 0xff
 #define BIT_ATIMWND4_8821C(x) (((x) & BIT_MASK_ATIMWND4_8821C) << BIT_SHIFT_ATIMWND4_8821C)
-#define BIT_GET_ATIMWND4_8821C(x) (((x) >> BIT_SHIFT_ATIMWND4_8821C) & BIT_MASK_ATIMWND4_8821C)

+#define BIT_GET_ATIMWND4_8821C(x) (((x) >> BIT_SHIFT_ATIMWND4_8821C) & BIT_MASK_ATIMWND4_8821C)
+
 
 
 /* 2 REG_ATIMWND5_8821C */
@@ -7195,7 +7920,8 @@
 #define BIT_SHIFT_ATIMWND5_8821C 0
 #define BIT_MASK_ATIMWND5_8821C 0xff
 #define BIT_ATIMWND5_8821C(x) (((x) & BIT_MASK_ATIMWND5_8821C) << BIT_SHIFT_ATIMWND5_8821C)
-#define BIT_GET_ATIMWND5_8821C(x) (((x) >> BIT_SHIFT_ATIMWND5_8821C) & BIT_MASK_ATIMWND5_8821C)

+#define BIT_GET_ATIMWND5_8821C(x) (((x) >> BIT_SHIFT_ATIMWND5_8821C) & BIT_MASK_ATIMWND5_8821C)
+
 
 
 /* 2 REG_ATIMWND6_8821C */
@@ -7203,7 +7929,8 @@
 #define BIT_SHIFT_ATIMWND6_8821C 0
 #define BIT_MASK_ATIMWND6_8821C 0xff
 #define BIT_ATIMWND6_8821C(x) (((x) & BIT_MASK_ATIMWND6_8821C) << BIT_SHIFT_ATIMWND6_8821C)
-#define BIT_GET_ATIMWND6_8821C(x) (((x) >> BIT_SHIFT_ATIMWND6_8821C) & BIT_MASK_ATIMWND6_8821C)

+#define BIT_GET_ATIMWND6_8821C(x) (((x) >> BIT_SHIFT_ATIMWND6_8821C) & BIT_MASK_ATIMWND6_8821C)
+
 
 
 /* 2 REG_ATIMWND7_8821C */
@@ -7211,7 +7938,8 @@
 #define BIT_SHIFT_ATIMWND7_8821C 0
 #define BIT_MASK_ATIMWND7_8821C 0xff
 #define BIT_ATIMWND7_8821C(x) (((x) & BIT_MASK_ATIMWND7_8821C) << BIT_SHIFT_ATIMWND7_8821C)
-#define BIT_GET_ATIMWND7_8821C(x) (((x) >> BIT_SHIFT_ATIMWND7_8821C) & BIT_MASK_ATIMWND7_8821C)

+#define BIT_GET_ATIMWND7_8821C(x) (((x) >> BIT_SHIFT_ATIMWND7_8821C) & BIT_MASK_ATIMWND7_8821C)
+
 
 
 /* 2 REG_ATIMUGT_8821C */
@@ -7219,7 +7947,8 @@
 #define BIT_SHIFT_ATIM_URGENT_8821C 0
 #define BIT_MASK_ATIM_URGENT_8821C 0xff
 #define BIT_ATIM_URGENT_8821C(x) (((x) & BIT_MASK_ATIM_URGENT_8821C) << BIT_SHIFT_ATIM_URGENT_8821C)
-#define BIT_GET_ATIM_URGENT_8821C(x) (((x) >> BIT_SHIFT_ATIM_URGENT_8821C) & BIT_MASK_ATIM_URGENT_8821C)

+#define BIT_GET_ATIM_URGENT_8821C(x) (((x) >> BIT_SHIFT_ATIM_URGENT_8821C) & BIT_MASK_ATIM_URGENT_8821C)
+
 
 
 /* 2 REG_HIQ_NO_LMT_EN_8821C */
@@ -7237,7 +7966,8 @@
 #define BIT_SHIFT_DTIM_COUNT_ROOT_8821C 0
 #define BIT_MASK_DTIM_COUNT_ROOT_8821C 0xff
 #define BIT_DTIM_COUNT_ROOT_8821C(x) (((x) & BIT_MASK_DTIM_COUNT_ROOT_8821C) << BIT_SHIFT_DTIM_COUNT_ROOT_8821C)
-#define BIT_GET_DTIM_COUNT_ROOT_8821C(x) (((x) >> BIT_SHIFT_DTIM_COUNT_ROOT_8821C) & BIT_MASK_DTIM_COUNT_ROOT_8821C)

+#define BIT_GET_DTIM_COUNT_ROOT_8821C(x) (((x) >> BIT_SHIFT_DTIM_COUNT_ROOT_8821C) & BIT_MASK_DTIM_COUNT_ROOT_8821C)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP1_8821C */
@@ -7245,7 +7975,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP1_8821C 0
 #define BIT_MASK_DTIM_COUNT_VAP1_8821C 0xff
 #define BIT_DTIM_COUNT_VAP1_8821C(x) (((x) & BIT_MASK_DTIM_COUNT_VAP1_8821C) << BIT_SHIFT_DTIM_COUNT_VAP1_8821C)
-#define BIT_GET_DTIM_COUNT_VAP1_8821C(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP1_8821C) & BIT_MASK_DTIM_COUNT_VAP1_8821C)

+#define BIT_GET_DTIM_COUNT_VAP1_8821C(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP1_8821C) & BIT_MASK_DTIM_COUNT_VAP1_8821C)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP2_8821C */
@@ -7253,7 +7984,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP2_8821C 0
 #define BIT_MASK_DTIM_COUNT_VAP2_8821C 0xff
 #define BIT_DTIM_COUNT_VAP2_8821C(x) (((x) & BIT_MASK_DTIM_COUNT_VAP2_8821C) << BIT_SHIFT_DTIM_COUNT_VAP2_8821C)
-#define BIT_GET_DTIM_COUNT_VAP2_8821C(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP2_8821C) & BIT_MASK_DTIM_COUNT_VAP2_8821C)

+#define BIT_GET_DTIM_COUNT_VAP2_8821C(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP2_8821C) & BIT_MASK_DTIM_COUNT_VAP2_8821C)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP3_8821C */
@@ -7261,7 +7993,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP3_8821C 0
 #define BIT_MASK_DTIM_COUNT_VAP3_8821C 0xff
 #define BIT_DTIM_COUNT_VAP3_8821C(x) (((x) & BIT_MASK_DTIM_COUNT_VAP3_8821C) << BIT_SHIFT_DTIM_COUNT_VAP3_8821C)
-#define BIT_GET_DTIM_COUNT_VAP3_8821C(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP3_8821C) & BIT_MASK_DTIM_COUNT_VAP3_8821C)

+#define BIT_GET_DTIM_COUNT_VAP3_8821C(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP3_8821C) & BIT_MASK_DTIM_COUNT_VAP3_8821C)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP4_8821C */
@@ -7269,7 +8002,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP4_8821C 0
 #define BIT_MASK_DTIM_COUNT_VAP4_8821C 0xff
 #define BIT_DTIM_COUNT_VAP4_8821C(x) (((x) & BIT_MASK_DTIM_COUNT_VAP4_8821C) << BIT_SHIFT_DTIM_COUNT_VAP4_8821C)
-#define BIT_GET_DTIM_COUNT_VAP4_8821C(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP4_8821C) & BIT_MASK_DTIM_COUNT_VAP4_8821C)

+#define BIT_GET_DTIM_COUNT_VAP4_8821C(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP4_8821C) & BIT_MASK_DTIM_COUNT_VAP4_8821C)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP5_8821C */
@@ -7277,7 +8011,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP5_8821C 0
 #define BIT_MASK_DTIM_COUNT_VAP5_8821C 0xff
 #define BIT_DTIM_COUNT_VAP5_8821C(x) (((x) & BIT_MASK_DTIM_COUNT_VAP5_8821C) << BIT_SHIFT_DTIM_COUNT_VAP5_8821C)
-#define BIT_GET_DTIM_COUNT_VAP5_8821C(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP5_8821C) & BIT_MASK_DTIM_COUNT_VAP5_8821C)

+#define BIT_GET_DTIM_COUNT_VAP5_8821C(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP5_8821C) & BIT_MASK_DTIM_COUNT_VAP5_8821C)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP6_8821C */
@@ -7285,7 +8020,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP6_8821C 0
 #define BIT_MASK_DTIM_COUNT_VAP6_8821C 0xff
 #define BIT_DTIM_COUNT_VAP6_8821C(x) (((x) & BIT_MASK_DTIM_COUNT_VAP6_8821C) << BIT_SHIFT_DTIM_COUNT_VAP6_8821C)
-#define BIT_GET_DTIM_COUNT_VAP6_8821C(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP6_8821C) & BIT_MASK_DTIM_COUNT_VAP6_8821C)

+#define BIT_GET_DTIM_COUNT_VAP6_8821C(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP6_8821C) & BIT_MASK_DTIM_COUNT_VAP6_8821C)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP7_8821C */
@@ -7293,7 +8029,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP7_8821C 0
 #define BIT_MASK_DTIM_COUNT_VAP7_8821C 0xff
 #define BIT_DTIM_COUNT_VAP7_8821C(x) (((x) & BIT_MASK_DTIM_COUNT_VAP7_8821C) << BIT_SHIFT_DTIM_COUNT_VAP7_8821C)
-#define BIT_GET_DTIM_COUNT_VAP7_8821C(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP7_8821C) & BIT_MASK_DTIM_COUNT_VAP7_8821C)

+#define BIT_GET_DTIM_COUNT_VAP7_8821C(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP7_8821C) & BIT_MASK_DTIM_COUNT_VAP7_8821C)
+
 
 
 /* 2 REG_DIS_ATIM_8821C */
@@ -7311,13 +8048,15 @@
 #define BIT_SHIFT_TSFT_SEL_TIMER1_8821C 3
 #define BIT_MASK_TSFT_SEL_TIMER1_8821C 0x7
 #define BIT_TSFT_SEL_TIMER1_8821C(x) (((x) & BIT_MASK_TSFT_SEL_TIMER1_8821C) << BIT_SHIFT_TSFT_SEL_TIMER1_8821C)
-#define BIT_GET_TSFT_SEL_TIMER1_8821C(x) (((x) >> BIT_SHIFT_TSFT_SEL_TIMER1_8821C) & BIT_MASK_TSFT_SEL_TIMER1_8821C)

+#define BIT_GET_TSFT_SEL_TIMER1_8821C(x) (((x) >> BIT_SHIFT_TSFT_SEL_TIMER1_8821C) & BIT_MASK_TSFT_SEL_TIMER1_8821C)
+
 
 
 #define BIT_SHIFT_EARLY_128US_8821C 0
 #define BIT_MASK_EARLY_128US_8821C 0x7
 #define BIT_EARLY_128US_8821C(x) (((x) & BIT_MASK_EARLY_128US_8821C) << BIT_SHIFT_EARLY_128US_8821C)
-#define BIT_GET_EARLY_128US_8821C(x) (((x) >> BIT_SHIFT_EARLY_128US_8821C) & BIT_MASK_EARLY_128US_8821C)

+#define BIT_GET_EARLY_128US_8821C(x) (((x) >> BIT_SHIFT_EARLY_128US_8821C) & BIT_MASK_EARLY_128US_8821C)
+
 
 
 /* 2 REG_P2PPS1_CTRL_8821C */
@@ -7339,13 +8078,15 @@
 #define BIT_SHIFT_SYNC_CLI_SEL_8821C 4
 #define BIT_MASK_SYNC_CLI_SEL_8821C 0x7
 #define BIT_SYNC_CLI_SEL_8821C(x) (((x) & BIT_MASK_SYNC_CLI_SEL_8821C) << BIT_SHIFT_SYNC_CLI_SEL_8821C)
-#define BIT_GET_SYNC_CLI_SEL_8821C(x) (((x) >> BIT_SHIFT_SYNC_CLI_SEL_8821C) & BIT_MASK_SYNC_CLI_SEL_8821C)

+#define BIT_GET_SYNC_CLI_SEL_8821C(x) (((x) >> BIT_SHIFT_SYNC_CLI_SEL_8821C) & BIT_MASK_SYNC_CLI_SEL_8821C)
+
 
 
 #define BIT_SHIFT_TSFT_SEL_TIMER0_8821C 0
 #define BIT_MASK_TSFT_SEL_TIMER0_8821C 0x7
 #define BIT_TSFT_SEL_TIMER0_8821C(x) (((x) & BIT_MASK_TSFT_SEL_TIMER0_8821C) << BIT_SHIFT_TSFT_SEL_TIMER0_8821C)
-#define BIT_GET_TSFT_SEL_TIMER0_8821C(x) (((x) >> BIT_SHIFT_TSFT_SEL_TIMER0_8821C) & BIT_MASK_TSFT_SEL_TIMER0_8821C)

+#define BIT_GET_TSFT_SEL_TIMER0_8821C(x) (((x) >> BIT_SHIFT_TSFT_SEL_TIMER0_8821C) & BIT_MASK_TSFT_SEL_TIMER0_8821C)
+
 
 
 /* 2 REG_NOA_UNIT_SEL_8821C */
@@ -7353,19 +8094,22 @@
 #define BIT_SHIFT_NOA_UNIT2_SEL_8821C 8
 #define BIT_MASK_NOA_UNIT2_SEL_8821C 0x7
 #define BIT_NOA_UNIT2_SEL_8821C(x) (((x) & BIT_MASK_NOA_UNIT2_SEL_8821C) << BIT_SHIFT_NOA_UNIT2_SEL_8821C)
-#define BIT_GET_NOA_UNIT2_SEL_8821C(x) (((x) >> BIT_SHIFT_NOA_UNIT2_SEL_8821C) & BIT_MASK_NOA_UNIT2_SEL_8821C)

+#define BIT_GET_NOA_UNIT2_SEL_8821C(x) (((x) >> BIT_SHIFT_NOA_UNIT2_SEL_8821C) & BIT_MASK_NOA_UNIT2_SEL_8821C)
+
 
 
 #define BIT_SHIFT_NOA_UNIT1_SEL_8821C 4
 #define BIT_MASK_NOA_UNIT1_SEL_8821C 0x7
 #define BIT_NOA_UNIT1_SEL_8821C(x) (((x) & BIT_MASK_NOA_UNIT1_SEL_8821C) << BIT_SHIFT_NOA_UNIT1_SEL_8821C)
-#define BIT_GET_NOA_UNIT1_SEL_8821C(x) (((x) >> BIT_SHIFT_NOA_UNIT1_SEL_8821C) & BIT_MASK_NOA_UNIT1_SEL_8821C)

+#define BIT_GET_NOA_UNIT1_SEL_8821C(x) (((x) >> BIT_SHIFT_NOA_UNIT1_SEL_8821C) & BIT_MASK_NOA_UNIT1_SEL_8821C)
+
 
 
 #define BIT_SHIFT_NOA_UNIT0_SEL_8821C 0
 #define BIT_MASK_NOA_UNIT0_SEL_8821C 0x7
 #define BIT_NOA_UNIT0_SEL_8821C(x) (((x) & BIT_MASK_NOA_UNIT0_SEL_8821C) << BIT_SHIFT_NOA_UNIT0_SEL_8821C)
-#define BIT_GET_NOA_UNIT0_SEL_8821C(x) (((x) >> BIT_SHIFT_NOA_UNIT0_SEL_8821C) & BIT_MASK_NOA_UNIT0_SEL_8821C)

+#define BIT_GET_NOA_UNIT0_SEL_8821C(x) (((x) >> BIT_SHIFT_NOA_UNIT0_SEL_8821C) & BIT_MASK_NOA_UNIT0_SEL_8821C)
+
 
 
 /* 2 REG_P2POFF_DIS_TXTIME_8821C */
@@ -7373,7 +8117,8 @@
 #define BIT_SHIFT_P2POFF_DIS_TXTIME_8821C 0
 #define BIT_MASK_P2POFF_DIS_TXTIME_8821C 0xff
 #define BIT_P2POFF_DIS_TXTIME_8821C(x) (((x) & BIT_MASK_P2POFF_DIS_TXTIME_8821C) << BIT_SHIFT_P2POFF_DIS_TXTIME_8821C)
-#define BIT_GET_P2POFF_DIS_TXTIME_8821C(x) (((x) >> BIT_SHIFT_P2POFF_DIS_TXTIME_8821C) & BIT_MASK_P2POFF_DIS_TXTIME_8821C)

+#define BIT_GET_P2POFF_DIS_TXTIME_8821C(x) (((x) >> BIT_SHIFT_P2POFF_DIS_TXTIME_8821C) & BIT_MASK_P2POFF_DIS_TXTIME_8821C)
+
 
 
 /* 2 REG_MBSSID_BCN_SPACE2_8821C */
@@ -7381,13 +8126,15 @@
 #define BIT_SHIFT_BCN_SPACE_CLINT2_8821C 16
 #define BIT_MASK_BCN_SPACE_CLINT2_8821C 0xfff
 #define BIT_BCN_SPACE_CLINT2_8821C(x) (((x) & BIT_MASK_BCN_SPACE_CLINT2_8821C) << BIT_SHIFT_BCN_SPACE_CLINT2_8821C)
-#define BIT_GET_BCN_SPACE_CLINT2_8821C(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT2_8821C) & BIT_MASK_BCN_SPACE_CLINT2_8821C)

+#define BIT_GET_BCN_SPACE_CLINT2_8821C(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT2_8821C) & BIT_MASK_BCN_SPACE_CLINT2_8821C)
+
 
 
 #define BIT_SHIFT_BCN_SPACE_CLINT1_8821C 0
 #define BIT_MASK_BCN_SPACE_CLINT1_8821C 0xfff
 #define BIT_BCN_SPACE_CLINT1_8821C(x) (((x) & BIT_MASK_BCN_SPACE_CLINT1_8821C) << BIT_SHIFT_BCN_SPACE_CLINT1_8821C)
-#define BIT_GET_BCN_SPACE_CLINT1_8821C(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT1_8821C) & BIT_MASK_BCN_SPACE_CLINT1_8821C)

+#define BIT_GET_BCN_SPACE_CLINT1_8821C(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT1_8821C) & BIT_MASK_BCN_SPACE_CLINT1_8821C)
+
 
 
 /* 2 REG_MBSSID_BCN_SPACE3_8821C */
@@ -7395,13 +8142,15 @@
 #define BIT_SHIFT_SUB_BCN_SPACE_8821C 16
 #define BIT_MASK_SUB_BCN_SPACE_8821C 0xff
 #define BIT_SUB_BCN_SPACE_8821C(x) (((x) & BIT_MASK_SUB_BCN_SPACE_8821C) << BIT_SHIFT_SUB_BCN_SPACE_8821C)
-#define BIT_GET_SUB_BCN_SPACE_8821C(x) (((x) >> BIT_SHIFT_SUB_BCN_SPACE_8821C) & BIT_MASK_SUB_BCN_SPACE_8821C)

+#define BIT_GET_SUB_BCN_SPACE_8821C(x) (((x) >> BIT_SHIFT_SUB_BCN_SPACE_8821C) & BIT_MASK_SUB_BCN_SPACE_8821C)
+
 
 
 #define BIT_SHIFT_BCN_SPACE_CLINT3_8821C 0
 #define BIT_MASK_BCN_SPACE_CLINT3_8821C 0xfff
 #define BIT_BCN_SPACE_CLINT3_8821C(x) (((x) & BIT_MASK_BCN_SPACE_CLINT3_8821C) << BIT_SHIFT_BCN_SPACE_CLINT3_8821C)
-#define BIT_GET_BCN_SPACE_CLINT3_8821C(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT3_8821C) & BIT_MASK_BCN_SPACE_CLINT3_8821C)

+#define BIT_GET_BCN_SPACE_CLINT3_8821C(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT3_8821C) & BIT_MASK_BCN_SPACE_CLINT3_8821C)
+
 
 
 /* 2 REG_ACMHWCTRL_8821C */
@@ -7423,7 +8172,8 @@
 #define BIT_SHIFT_AVGPERIOD_8821C 0
 #define BIT_MASK_AVGPERIOD_8821C 0xffff
 #define BIT_AVGPERIOD_8821C(x) (((x) & BIT_MASK_AVGPERIOD_8821C) << BIT_SHIFT_AVGPERIOD_8821C)
-#define BIT_GET_AVGPERIOD_8821C(x) (((x) >> BIT_SHIFT_AVGPERIOD_8821C) & BIT_MASK_AVGPERIOD_8821C)

+#define BIT_GET_AVGPERIOD_8821C(x) (((x) >> BIT_SHIFT_AVGPERIOD_8821C) & BIT_MASK_AVGPERIOD_8821C)
+
 
 
 /* 2 REG_VO_ADMTIME_8821C */
@@ -7431,7 +8181,8 @@
 #define BIT_SHIFT_VO_ADMITTED_TIME_8821C 0
 #define BIT_MASK_VO_ADMITTED_TIME_8821C 0xffff
 #define BIT_VO_ADMITTED_TIME_8821C(x) (((x) & BIT_MASK_VO_ADMITTED_TIME_8821C) << BIT_SHIFT_VO_ADMITTED_TIME_8821C)
-#define BIT_GET_VO_ADMITTED_TIME_8821C(x) (((x) >> BIT_SHIFT_VO_ADMITTED_TIME_8821C) & BIT_MASK_VO_ADMITTED_TIME_8821C)

+#define BIT_GET_VO_ADMITTED_TIME_8821C(x) (((x) >> BIT_SHIFT_VO_ADMITTED_TIME_8821C) & BIT_MASK_VO_ADMITTED_TIME_8821C)
+
 
 
 /* 2 REG_VI_ADMTIME_8821C */
@@ -7439,7 +8190,8 @@
 #define BIT_SHIFT_VI_ADMITTED_TIME_8821C 0
 #define BIT_MASK_VI_ADMITTED_TIME_8821C 0xffff
 #define BIT_VI_ADMITTED_TIME_8821C(x) (((x) & BIT_MASK_VI_ADMITTED_TIME_8821C) << BIT_SHIFT_VI_ADMITTED_TIME_8821C)
-#define BIT_GET_VI_ADMITTED_TIME_8821C(x) (((x) >> BIT_SHIFT_VI_ADMITTED_TIME_8821C) & BIT_MASK_VI_ADMITTED_TIME_8821C)

+#define BIT_GET_VI_ADMITTED_TIME_8821C(x) (((x) >> BIT_SHIFT_VI_ADMITTED_TIME_8821C) & BIT_MASK_VI_ADMITTED_TIME_8821C)
+
 
 
 /* 2 REG_BE_ADMTIME_8821C */
@@ -7447,7 +8199,8 @@
 #define BIT_SHIFT_BE_ADMITTED_TIME_8821C 0
 #define BIT_MASK_BE_ADMITTED_TIME_8821C 0xffff
 #define BIT_BE_ADMITTED_TIME_8821C(x) (((x) & BIT_MASK_BE_ADMITTED_TIME_8821C) << BIT_SHIFT_BE_ADMITTED_TIME_8821C)
-#define BIT_GET_BE_ADMITTED_TIME_8821C(x) (((x) >> BIT_SHIFT_BE_ADMITTED_TIME_8821C) & BIT_MASK_BE_ADMITTED_TIME_8821C)

+#define BIT_GET_BE_ADMITTED_TIME_8821C(x) (((x) >> BIT_SHIFT_BE_ADMITTED_TIME_8821C) & BIT_MASK_BE_ADMITTED_TIME_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -7459,7 +8212,8 @@
 #define BIT_SHIFT_RANDOM_GEN_8821C 0
 #define BIT_MASK_RANDOM_GEN_8821C 0xffffff
 #define BIT_RANDOM_GEN_8821C(x) (((x) & BIT_MASK_RANDOM_GEN_8821C) << BIT_SHIFT_RANDOM_GEN_8821C)
-#define BIT_GET_RANDOM_GEN_8821C(x) (((x) >> BIT_SHIFT_RANDOM_GEN_8821C) & BIT_MASK_RANDOM_GEN_8821C)

+#define BIT_GET_RANDOM_GEN_8821C(x) (((x) >> BIT_SHIFT_RANDOM_GEN_8821C) & BIT_MASK_RANDOM_GEN_8821C)
+
 
 
 /* 2 REG_TXCMD_NOA_SEL_8821C */
@@ -7467,13 +8221,15 @@
 #define BIT_SHIFT_NOA_SEL_8821C 4
 #define BIT_MASK_NOA_SEL_8821C 0x7
 #define BIT_NOA_SEL_8821C(x) (((x) & BIT_MASK_NOA_SEL_8821C) << BIT_SHIFT_NOA_SEL_8821C)
-#define BIT_GET_NOA_SEL_8821C(x) (((x) >> BIT_SHIFT_NOA_SEL_8821C) & BIT_MASK_NOA_SEL_8821C)

+#define BIT_GET_NOA_SEL_8821C(x) (((x) >> BIT_SHIFT_NOA_SEL_8821C) & BIT_MASK_NOA_SEL_8821C)
+
 
 
 #define BIT_SHIFT_TXCMD_SEG_SEL_8821C 0
 #define BIT_MASK_TXCMD_SEG_SEL_8821C 0xf
 #define BIT_TXCMD_SEG_SEL_8821C(x) (((x) & BIT_MASK_TXCMD_SEG_SEL_8821C) << BIT_SHIFT_TXCMD_SEG_SEL_8821C)
-#define BIT_GET_TXCMD_SEG_SEL_8821C(x) (((x) >> BIT_SHIFT_TXCMD_SEG_SEL_8821C) & BIT_MASK_TXCMD_SEG_SEL_8821C)

+#define BIT_GET_TXCMD_SEG_SEL_8821C(x) (((x) >> BIT_SHIFT_TXCMD_SEG_SEL_8821C) & BIT_MASK_TXCMD_SEG_SEL_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -7489,7 +8245,8 @@
 #define BIT_SHIFT_NOA_DURATION_V1_8821C 0
 #define BIT_MASK_NOA_DURATION_V1_8821C 0xffffffffL
 #define BIT_NOA_DURATION_V1_8821C(x) (((x) & BIT_MASK_NOA_DURATION_V1_8821C) << BIT_SHIFT_NOA_DURATION_V1_8821C)
-#define BIT_GET_NOA_DURATION_V1_8821C(x) (((x) >> BIT_SHIFT_NOA_DURATION_V1_8821C) & BIT_MASK_NOA_DURATION_V1_8821C)

+#define BIT_GET_NOA_DURATION_V1_8821C(x) (((x) >> BIT_SHIFT_NOA_DURATION_V1_8821C) & BIT_MASK_NOA_DURATION_V1_8821C)
+
 
 
 /* 2 REG_NOA_PARAM_1_8821C */
@@ -7497,7 +8254,8 @@
 #define BIT_SHIFT_NOA_INTERVAL_V1_8821C 0
 #define BIT_MASK_NOA_INTERVAL_V1_8821C 0xffffffffL
 #define BIT_NOA_INTERVAL_V1_8821C(x) (((x) & BIT_MASK_NOA_INTERVAL_V1_8821C) << BIT_SHIFT_NOA_INTERVAL_V1_8821C)
-#define BIT_GET_NOA_INTERVAL_V1_8821C(x) (((x) >> BIT_SHIFT_NOA_INTERVAL_V1_8821C) & BIT_MASK_NOA_INTERVAL_V1_8821C)

+#define BIT_GET_NOA_INTERVAL_V1_8821C(x) (((x) >> BIT_SHIFT_NOA_INTERVAL_V1_8821C) & BIT_MASK_NOA_INTERVAL_V1_8821C)
+
 
 
 /* 2 REG_NOA_PARAM_2_8821C */
@@ -7505,7 +8263,8 @@
 #define BIT_SHIFT_NOA_START_TIME_V1_8821C 0
 #define BIT_MASK_NOA_START_TIME_V1_8821C 0xffffffffL
 #define BIT_NOA_START_TIME_V1_8821C(x) (((x) & BIT_MASK_NOA_START_TIME_V1_8821C) << BIT_SHIFT_NOA_START_TIME_V1_8821C)
-#define BIT_GET_NOA_START_TIME_V1_8821C(x) (((x) >> BIT_SHIFT_NOA_START_TIME_V1_8821C) & BIT_MASK_NOA_START_TIME_V1_8821C)

+#define BIT_GET_NOA_START_TIME_V1_8821C(x) (((x) >> BIT_SHIFT_NOA_START_TIME_V1_8821C) & BIT_MASK_NOA_START_TIME_V1_8821C)
+
 
 
 /* 2 REG_NOA_PARAM_3_8821C */
@@ -7513,7 +8272,8 @@
 #define BIT_SHIFT_NOA_COUNT_V1_8821C 0
 #define BIT_MASK_NOA_COUNT_V1_8821C 0xffffffffL
 #define BIT_NOA_COUNT_V1_8821C(x) (((x) & BIT_MASK_NOA_COUNT_V1_8821C) << BIT_SHIFT_NOA_COUNT_V1_8821C)
-#define BIT_GET_NOA_COUNT_V1_8821C(x) (((x) >> BIT_SHIFT_NOA_COUNT_V1_8821C) & BIT_MASK_NOA_COUNT_V1_8821C)

+#define BIT_GET_NOA_COUNT_V1_8821C(x) (((x) >> BIT_SHIFT_NOA_COUNT_V1_8821C) & BIT_MASK_NOA_COUNT_V1_8821C)
+
 
 
 /* 2 REG_P2P_RST_8821C */
@@ -7539,7 +8299,8 @@
 #define BIT_SHIFT_SCH_TXCMD_8821C 0
 #define BIT_MASK_SCH_TXCMD_8821C 0xffffffffL
 #define BIT_SCH_TXCMD_8821C(x) (((x) & BIT_MASK_SCH_TXCMD_8821C) << BIT_SHIFT_SCH_TXCMD_8821C)
-#define BIT_GET_SCH_TXCMD_8821C(x) (((x) >> BIT_SHIFT_SCH_TXCMD_8821C) & BIT_MASK_SCH_TXCMD_8821C)

+#define BIT_GET_SCH_TXCMD_8821C(x) (((x) >> BIT_SHIFT_SCH_TXCMD_8821C) & BIT_MASK_SCH_TXCMD_8821C)
+
 
 
 /* 2 REG_PAGE5_DUMMY_8821C */
@@ -7549,7 +8310,8 @@
 #define BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8821C 0
 #define BIT_MASK_CPUMGQ_TX_TIMER_V1_8821C 0xffffffffL
 #define BIT_CPUMGQ_TX_TIMER_V1_8821C(x) (((x) & BIT_MASK_CPUMGQ_TX_TIMER_V1_8821C) << BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8821C)
-#define BIT_GET_CPUMGQ_TX_TIMER_V1_8821C(x) (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8821C) & BIT_MASK_CPUMGQ_TX_TIMER_V1_8821C)

+#define BIT_GET_CPUMGQ_TX_TIMER_V1_8821C(x) (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8821C) & BIT_MASK_CPUMGQ_TX_TIMER_V1_8821C)
+
 
 
 /* 2 REG_PS_TIMER_A_8821C */
@@ -7557,7 +8319,8 @@
 #define BIT_SHIFT_PS_TIMER_A_V1_8821C 0
 #define BIT_MASK_PS_TIMER_A_V1_8821C 0xffffffffL
 #define BIT_PS_TIMER_A_V1_8821C(x) (((x) & BIT_MASK_PS_TIMER_A_V1_8821C) << BIT_SHIFT_PS_TIMER_A_V1_8821C)
-#define BIT_GET_PS_TIMER_A_V1_8821C(x) (((x) >> BIT_SHIFT_PS_TIMER_A_V1_8821C) & BIT_MASK_PS_TIMER_A_V1_8821C)

+#define BIT_GET_PS_TIMER_A_V1_8821C(x) (((x) >> BIT_SHIFT_PS_TIMER_A_V1_8821C) & BIT_MASK_PS_TIMER_A_V1_8821C)
+
 
 
 /* 2 REG_PS_TIMER_B_8821C */
@@ -7565,7 +8328,8 @@
 #define BIT_SHIFT_PS_TIMER_B_V1_8821C 0
 #define BIT_MASK_PS_TIMER_B_V1_8821C 0xffffffffL
 #define BIT_PS_TIMER_B_V1_8821C(x) (((x) & BIT_MASK_PS_TIMER_B_V1_8821C) << BIT_SHIFT_PS_TIMER_B_V1_8821C)
-#define BIT_GET_PS_TIMER_B_V1_8821C(x) (((x) >> BIT_SHIFT_PS_TIMER_B_V1_8821C) & BIT_MASK_PS_TIMER_B_V1_8821C)

+#define BIT_GET_PS_TIMER_B_V1_8821C(x) (((x) >> BIT_SHIFT_PS_TIMER_B_V1_8821C) & BIT_MASK_PS_TIMER_B_V1_8821C)
+
 
 
 /* 2 REG_PS_TIMER_C_8821C */
@@ -7573,7 +8337,8 @@
 #define BIT_SHIFT_PS_TIMER_C_V1_8821C 0
 #define BIT_MASK_PS_TIMER_C_V1_8821C 0xffffffffL
 #define BIT_PS_TIMER_C_V1_8821C(x) (((x) & BIT_MASK_PS_TIMER_C_V1_8821C) << BIT_SHIFT_PS_TIMER_C_V1_8821C)
-#define BIT_GET_PS_TIMER_C_V1_8821C(x) (((x) >> BIT_SHIFT_PS_TIMER_C_V1_8821C) & BIT_MASK_PS_TIMER_C_V1_8821C)

+#define BIT_GET_PS_TIMER_C_V1_8821C(x) (((x) >> BIT_SHIFT_PS_TIMER_C_V1_8821C) & BIT_MASK_PS_TIMER_C_V1_8821C)
+
 
 
 /* 2 REG_PS_TIMER_ABC_CPUMGQ_TIMER_CRTL_8821C */
@@ -7583,28 +8348,32 @@
 #define BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8821C 24
 #define BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8821C 0x7
 #define BIT_CPUMGQ_TIMER_TSF_SEL_8821C(x) (((x) & BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8821C) << BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8821C)
-#define BIT_GET_CPUMGQ_TIMER_TSF_SEL_8821C(x) (((x) >> BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8821C) & BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8821C)

+#define BIT_GET_CPUMGQ_TIMER_TSF_SEL_8821C(x) (((x) >> BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8821C) & BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8821C)
+
 
 #define BIT_PS_TIMER_C_EN_8821C BIT(23)
 
 #define BIT_SHIFT_PS_TIMER_C_TSF_SEL_8821C 16
 #define BIT_MASK_PS_TIMER_C_TSF_SEL_8821C 0x7
 #define BIT_PS_TIMER_C_TSF_SEL_8821C(x) (((x) & BIT_MASK_PS_TIMER_C_TSF_SEL_8821C) << BIT_SHIFT_PS_TIMER_C_TSF_SEL_8821C)
-#define BIT_GET_PS_TIMER_C_TSF_SEL_8821C(x) (((x) >> BIT_SHIFT_PS_TIMER_C_TSF_SEL_8821C) & BIT_MASK_PS_TIMER_C_TSF_SEL_8821C)

+#define BIT_GET_PS_TIMER_C_TSF_SEL_8821C(x) (((x) >> BIT_SHIFT_PS_TIMER_C_TSF_SEL_8821C) & BIT_MASK_PS_TIMER_C_TSF_SEL_8821C)
+
 
 #define BIT_PS_TIMER_B_EN_8821C BIT(15)
 
 #define BIT_SHIFT_PS_TIMER_B_TSF_SEL_8821C 8
 #define BIT_MASK_PS_TIMER_B_TSF_SEL_8821C 0x7
 #define BIT_PS_TIMER_B_TSF_SEL_8821C(x) (((x) & BIT_MASK_PS_TIMER_B_TSF_SEL_8821C) << BIT_SHIFT_PS_TIMER_B_TSF_SEL_8821C)
-#define BIT_GET_PS_TIMER_B_TSF_SEL_8821C(x) (((x) >> BIT_SHIFT_PS_TIMER_B_TSF_SEL_8821C) & BIT_MASK_PS_TIMER_B_TSF_SEL_8821C)

+#define BIT_GET_PS_TIMER_B_TSF_SEL_8821C(x) (((x) >> BIT_SHIFT_PS_TIMER_B_TSF_SEL_8821C) & BIT_MASK_PS_TIMER_B_TSF_SEL_8821C)
+
 
 #define BIT_PS_TIMER_A_EN_8821C BIT(7)
 
 #define BIT_SHIFT_PS_TIMER_A_TSF_SEL_8821C 0
 #define BIT_MASK_PS_TIMER_A_TSF_SEL_8821C 0x7
 #define BIT_PS_TIMER_A_TSF_SEL_8821C(x) (((x) & BIT_MASK_PS_TIMER_A_TSF_SEL_8821C) << BIT_SHIFT_PS_TIMER_A_TSF_SEL_8821C)
-#define BIT_GET_PS_TIMER_A_TSF_SEL_8821C(x) (((x) >> BIT_SHIFT_PS_TIMER_A_TSF_SEL_8821C) & BIT_MASK_PS_TIMER_A_TSF_SEL_8821C)

+#define BIT_GET_PS_TIMER_A_TSF_SEL_8821C(x) (((x) >> BIT_SHIFT_PS_TIMER_A_TSF_SEL_8821C) & BIT_MASK_PS_TIMER_A_TSF_SEL_8821C)
+
 
 
 /* 2 REG_CPUMGQ_TX_TIMER_EARLY_8821C */
@@ -7612,7 +8381,8 @@
 #define BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8821C 0
 #define BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8821C 0xff
 #define BIT_CPUMGQ_TX_TIMER_EARLY_8821C(x) (((x) & BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8821C) << BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8821C)
-#define BIT_GET_CPUMGQ_TX_TIMER_EARLY_8821C(x) (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8821C) & BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8821C)

+#define BIT_GET_CPUMGQ_TX_TIMER_EARLY_8821C(x) (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8821C) & BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8821C)
+
 
 
 /* 2 REG_PS_TIMER_A_EARLY_8821C */
@@ -7620,7 +8390,8 @@
 #define BIT_SHIFT_PS_TIMER_A_EARLY_8821C 0
 #define BIT_MASK_PS_TIMER_A_EARLY_8821C 0xff
 #define BIT_PS_TIMER_A_EARLY_8821C(x) (((x) & BIT_MASK_PS_TIMER_A_EARLY_8821C) << BIT_SHIFT_PS_TIMER_A_EARLY_8821C)
-#define BIT_GET_PS_TIMER_A_EARLY_8821C(x) (((x) >> BIT_SHIFT_PS_TIMER_A_EARLY_8821C) & BIT_MASK_PS_TIMER_A_EARLY_8821C)

+#define BIT_GET_PS_TIMER_A_EARLY_8821C(x) (((x) >> BIT_SHIFT_PS_TIMER_A_EARLY_8821C) & BIT_MASK_PS_TIMER_A_EARLY_8821C)
+
 
 
 /* 2 REG_PS_TIMER_B_EARLY_8821C */
@@ -7628,7 +8399,8 @@
 #define BIT_SHIFT_PS_TIMER_B_EARLY_8821C 0
 #define BIT_MASK_PS_TIMER_B_EARLY_8821C 0xff
 #define BIT_PS_TIMER_B_EARLY_8821C(x) (((x) & BIT_MASK_PS_TIMER_B_EARLY_8821C) << BIT_SHIFT_PS_TIMER_B_EARLY_8821C)
-#define BIT_GET_PS_TIMER_B_EARLY_8821C(x) (((x) >> BIT_SHIFT_PS_TIMER_B_EARLY_8821C) & BIT_MASK_PS_TIMER_B_EARLY_8821C)

+#define BIT_GET_PS_TIMER_B_EARLY_8821C(x) (((x) >> BIT_SHIFT_PS_TIMER_B_EARLY_8821C) & BIT_MASK_PS_TIMER_B_EARLY_8821C)
+
 
 
 /* 2 REG_PS_TIMER_C_EARLY_8821C */
@@ -7636,7 +8408,8 @@
 #define BIT_SHIFT_PS_TIMER_C_EARLY_8821C 0
 #define BIT_MASK_PS_TIMER_C_EARLY_8821C 0xff
 #define BIT_PS_TIMER_C_EARLY_8821C(x) (((x) & BIT_MASK_PS_TIMER_C_EARLY_8821C) << BIT_SHIFT_PS_TIMER_C_EARLY_8821C)
-#define BIT_GET_PS_TIMER_C_EARLY_8821C(x) (((x) >> BIT_SHIFT_PS_TIMER_C_EARLY_8821C) & BIT_MASK_PS_TIMER_C_EARLY_8821C)

+#define BIT_GET_PS_TIMER_C_EARLY_8821C(x) (((x) >> BIT_SHIFT_PS_TIMER_C_EARLY_8821C) & BIT_MASK_PS_TIMER_C_EARLY_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -7768,7 +8541,8 @@
 #define BIT_SHIFT_APPEND_MHDR_LEN_8821C 0
 #define BIT_MASK_APPEND_MHDR_LEN_8821C 0x7
 #define BIT_APPEND_MHDR_LEN_8821C(x) (((x) & BIT_MASK_APPEND_MHDR_LEN_8821C) << BIT_SHIFT_APPEND_MHDR_LEN_8821C)
-#define BIT_GET_APPEND_MHDR_LEN_8821C(x) (((x) >> BIT_SHIFT_APPEND_MHDR_LEN_8821C) & BIT_MASK_APPEND_MHDR_LEN_8821C)

+#define BIT_GET_APPEND_MHDR_LEN_8821C(x) (((x) >> BIT_SHIFT_APPEND_MHDR_LEN_8821C) & BIT_MASK_APPEND_MHDR_LEN_8821C)
+
 
 
 /* 2 REG_FW_STS_FILTER_8821C */
@@ -7848,7 +8622,8 @@
 #define BIT_SHIFT_DRVINFO_SZ_V1_8821C 0
 #define BIT_MASK_DRVINFO_SZ_V1_8821C 0xf
 #define BIT_DRVINFO_SZ_V1_8821C(x) (((x) & BIT_MASK_DRVINFO_SZ_V1_8821C) << BIT_SHIFT_DRVINFO_SZ_V1_8821C)
-#define BIT_GET_DRVINFO_SZ_V1_8821C(x) (((x) >> BIT_SHIFT_DRVINFO_SZ_V1_8821C) & BIT_MASK_DRVINFO_SZ_V1_8821C)

+#define BIT_GET_DRVINFO_SZ_V1_8821C(x) (((x) >> BIT_SHIFT_DRVINFO_SZ_V1_8821C) & BIT_MASK_DRVINFO_SZ_V1_8821C)
+
 
 
 /* 2 REG_RX_DLK_TIME_8821C (RX DEADLOCK TIME REGISTER) */
@@ -7856,7 +8631,8 @@
 #define BIT_SHIFT_RX_DLK_TIME_8821C 0
 #define BIT_MASK_RX_DLK_TIME_8821C 0xff
 #define BIT_RX_DLK_TIME_8821C(x) (((x) & BIT_MASK_RX_DLK_TIME_8821C) << BIT_SHIFT_RX_DLK_TIME_8821C)
-#define BIT_GET_RX_DLK_TIME_8821C(x) (((x) >> BIT_SHIFT_RX_DLK_TIME_8821C) & BIT_MASK_RX_DLK_TIME_8821C)

+#define BIT_GET_RX_DLK_TIME_8821C(x) (((x) >> BIT_SHIFT_RX_DLK_TIME_8821C) & BIT_MASK_RX_DLK_TIME_8821C)
+
 
 
 /* 2 REG_RX_PKT_LIMIT_8821C (RX PACKET LENGTH LIMIT REGISTER) */
@@ -7864,7 +8640,8 @@
 #define BIT_SHIFT_RXPKTLMT_8821C 0
 #define BIT_MASK_RXPKTLMT_8821C 0x3f
 #define BIT_RXPKTLMT_8821C(x) (((x) & BIT_MASK_RXPKTLMT_8821C) << BIT_SHIFT_RXPKTLMT_8821C)
-#define BIT_GET_RXPKTLMT_8821C(x) (((x) >> BIT_SHIFT_RXPKTLMT_8821C) & BIT_MASK_RXPKTLMT_8821C)

+#define BIT_GET_RXPKTLMT_8821C(x) (((x) >> BIT_SHIFT_RXPKTLMT_8821C) & BIT_MASK_RXPKTLMT_8821C)
+
 
 
 /* 2 REG_MACID_8821C (MAC ID REGISTER) */
@@ -7872,7 +8649,8 @@
 #define BIT_SHIFT_MACID_8821C 0
 #define BIT_MASK_MACID_8821C 0xffffffffffffL
 #define BIT_MACID_8821C(x) (((x) & BIT_MASK_MACID_8821C) << BIT_SHIFT_MACID_8821C)
-#define BIT_GET_MACID_8821C(x) (((x) >> BIT_SHIFT_MACID_8821C) & BIT_MASK_MACID_8821C)

+#define BIT_GET_MACID_8821C(x) (((x) >> BIT_SHIFT_MACID_8821C) & BIT_MASK_MACID_8821C)
+
 
 
 /* 2 REG_BSSID_8821C (BSSID REGISTER) */
@@ -7880,7 +8658,8 @@
 #define BIT_SHIFT_BSSID_8821C 0
 #define BIT_MASK_BSSID_8821C 0xffffffffffffL
 #define BIT_BSSID_8821C(x) (((x) & BIT_MASK_BSSID_8821C) << BIT_SHIFT_BSSID_8821C)
-#define BIT_GET_BSSID_8821C(x) (((x) >> BIT_SHIFT_BSSID_8821C) & BIT_MASK_BSSID_8821C)

+#define BIT_GET_BSSID_8821C(x) (((x) >> BIT_SHIFT_BSSID_8821C) & BIT_MASK_BSSID_8821C)
+
 
 
 /* 2 REG_MAR_8821C (MULTICAST ADDRESS REGISTER) */
@@ -7888,7 +8667,8 @@
 #define BIT_SHIFT_MAR_8821C 0
 #define BIT_MASK_MAR_8821C 0xffffffffffffffffL
 #define BIT_MAR_8821C(x) (((x) & BIT_MASK_MAR_8821C) << BIT_SHIFT_MAR_8821C)
-#define BIT_GET_MAR_8821C(x) (((x) >> BIT_SHIFT_MAR_8821C) & BIT_MASK_MAR_8821C)

+#define BIT_GET_MAR_8821C(x) (((x) >> BIT_SHIFT_MAR_8821C) & BIT_MASK_MAR_8821C)
+
 
 
 /* 2 REG_MBIDCAMCFG_1_8821C (MBSSID CAM CONFIGURATION REGISTER) */
@@ -7896,7 +8676,8 @@
 #define BIT_SHIFT_MBIDCAM_RWDATA_L_8821C 0
 #define BIT_MASK_MBIDCAM_RWDATA_L_8821C 0xffffffffL
 #define BIT_MBIDCAM_RWDATA_L_8821C(x) (((x) & BIT_MASK_MBIDCAM_RWDATA_L_8821C) << BIT_SHIFT_MBIDCAM_RWDATA_L_8821C)
-#define BIT_GET_MBIDCAM_RWDATA_L_8821C(x) (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_L_8821C) & BIT_MASK_MBIDCAM_RWDATA_L_8821C)

+#define BIT_GET_MBIDCAM_RWDATA_L_8821C(x) (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_L_8821C) & BIT_MASK_MBIDCAM_RWDATA_L_8821C)
+
 
 
 /* 2 REG_MBIDCAMCFG_2_8821C (MBSSID CAM CONFIGURATION REGISTER) */
@@ -7906,7 +8687,8 @@
 #define BIT_SHIFT_MBIDCAM_ADDR_8821C 24
 #define BIT_MASK_MBIDCAM_ADDR_8821C 0x1f
 #define BIT_MBIDCAM_ADDR_8821C(x) (((x) & BIT_MASK_MBIDCAM_ADDR_8821C) << BIT_SHIFT_MBIDCAM_ADDR_8821C)
-#define BIT_GET_MBIDCAM_ADDR_8821C(x) (((x) >> BIT_SHIFT_MBIDCAM_ADDR_8821C) & BIT_MASK_MBIDCAM_ADDR_8821C)

+#define BIT_GET_MBIDCAM_ADDR_8821C(x) (((x) >> BIT_SHIFT_MBIDCAM_ADDR_8821C) & BIT_MASK_MBIDCAM_ADDR_8821C)
+
 
 #define BIT_MBIDCAM_VALID_8821C BIT(23)
 #define BIT_LSIC_TXOP_EN_8821C BIT(17)
@@ -7915,7 +8697,8 @@
 #define BIT_SHIFT_MBIDCAM_RWDATA_H_8821C 0
 #define BIT_MASK_MBIDCAM_RWDATA_H_8821C 0xffff
 #define BIT_MBIDCAM_RWDATA_H_8821C(x) (((x) & BIT_MASK_MBIDCAM_RWDATA_H_8821C) << BIT_SHIFT_MBIDCAM_RWDATA_H_8821C)
-#define BIT_GET_MBIDCAM_RWDATA_H_8821C(x) (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_H_8821C) & BIT_MASK_MBIDCAM_RWDATA_H_8821C)

+#define BIT_GET_MBIDCAM_RWDATA_H_8821C(x) (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_H_8821C) & BIT_MASK_MBIDCAM_RWDATA_H_8821C)
+
 
 
 /* 2 REG_ZLD_NUM_8821C */
@@ -7923,7 +8706,8 @@
 #define BIT_SHIFT_ZLD_NUM_8821C 0
 #define BIT_MASK_ZLD_NUM_8821C 0xff
 #define BIT_ZLD_NUM_8821C(x) (((x) & BIT_MASK_ZLD_NUM_8821C) << BIT_SHIFT_ZLD_NUM_8821C)
-#define BIT_GET_ZLD_NUM_8821C(x) (((x) >> BIT_SHIFT_ZLD_NUM_8821C) & BIT_MASK_ZLD_NUM_8821C)

+#define BIT_GET_ZLD_NUM_8821C(x) (((x) >> BIT_SHIFT_ZLD_NUM_8821C) & BIT_MASK_ZLD_NUM_8821C)
+
 
 
 /* 2 REG_UDF_THSD_8821C */
@@ -7931,7 +8715,8 @@
 #define BIT_SHIFT_UDF_THSD_8821C 0
 #define BIT_MASK_UDF_THSD_8821C 0xff
 #define BIT_UDF_THSD_8821C(x) (((x) & BIT_MASK_UDF_THSD_8821C) << BIT_SHIFT_UDF_THSD_8821C)
-#define BIT_GET_UDF_THSD_8821C(x) (((x) >> BIT_SHIFT_UDF_THSD_8821C) & BIT_MASK_UDF_THSD_8821C)

+#define BIT_GET_UDF_THSD_8821C(x) (((x) >> BIT_SHIFT_UDF_THSD_8821C) & BIT_MASK_UDF_THSD_8821C)
+
 
 
 /* 2 REG_WMAC_TCR_TSFT_OFS_8821C */
@@ -7939,7 +8724,8 @@
 #define BIT_SHIFT_WMAC_TCR_TSFT_OFS_8821C 0
 #define BIT_MASK_WMAC_TCR_TSFT_OFS_8821C 0xffff
 #define BIT_WMAC_TCR_TSFT_OFS_8821C(x) (((x) & BIT_MASK_WMAC_TCR_TSFT_OFS_8821C) << BIT_SHIFT_WMAC_TCR_TSFT_OFS_8821C)
-#define BIT_GET_WMAC_TCR_TSFT_OFS_8821C(x) (((x) >> BIT_SHIFT_WMAC_TCR_TSFT_OFS_8821C) & BIT_MASK_WMAC_TCR_TSFT_OFS_8821C)

+#define BIT_GET_WMAC_TCR_TSFT_OFS_8821C(x) (((x) >> BIT_SHIFT_WMAC_TCR_TSFT_OFS_8821C) & BIT_MASK_WMAC_TCR_TSFT_OFS_8821C)
+
 
 
 /* 2 REG_MCU_TEST_2_V1_8821C */
@@ -7947,7 +8733,8 @@
 #define BIT_SHIFT_MCU_RSVD_2_V1_8821C 0
 #define BIT_MASK_MCU_RSVD_2_V1_8821C 0xffff
 #define BIT_MCU_RSVD_2_V1_8821C(x) (((x) & BIT_MASK_MCU_RSVD_2_V1_8821C) << BIT_SHIFT_MCU_RSVD_2_V1_8821C)
-#define BIT_GET_MCU_RSVD_2_V1_8821C(x) (((x) >> BIT_SHIFT_MCU_RSVD_2_V1_8821C) & BIT_MASK_MCU_RSVD_2_V1_8821C)

+#define BIT_GET_MCU_RSVD_2_V1_8821C(x) (((x) >> BIT_SHIFT_MCU_RSVD_2_V1_8821C) & BIT_MASK_MCU_RSVD_2_V1_8821C)
+
 
 
 /* 2 REG_WMAC_TXTIMEOUT_8821C */
@@ -7955,7 +8742,8 @@
 #define BIT_SHIFT_WMAC_TXTIMEOUT_8821C 0
 #define BIT_MASK_WMAC_TXTIMEOUT_8821C 0xff
 #define BIT_WMAC_TXTIMEOUT_8821C(x) (((x) & BIT_MASK_WMAC_TXTIMEOUT_8821C) << BIT_SHIFT_WMAC_TXTIMEOUT_8821C)
-#define BIT_GET_WMAC_TXTIMEOUT_8821C(x) (((x) >> BIT_SHIFT_WMAC_TXTIMEOUT_8821C) & BIT_MASK_WMAC_TXTIMEOUT_8821C)

+#define BIT_GET_WMAC_TXTIMEOUT_8821C(x) (((x) >> BIT_SHIFT_WMAC_TXTIMEOUT_8821C) & BIT_MASK_WMAC_TXTIMEOUT_8821C)
+
 
 
 /* 2 REG_STMP_THSD_8821C */
@@ -7963,7 +8751,8 @@
 #define BIT_SHIFT_STMP_THSD_8821C 0
 #define BIT_MASK_STMP_THSD_8821C 0xff
 #define BIT_STMP_THSD_8821C(x) (((x) & BIT_MASK_STMP_THSD_8821C) << BIT_SHIFT_STMP_THSD_8821C)
-#define BIT_GET_STMP_THSD_8821C(x) (((x) >> BIT_SHIFT_STMP_THSD_8821C) & BIT_MASK_STMP_THSD_8821C)

+#define BIT_GET_STMP_THSD_8821C(x) (((x) >> BIT_SHIFT_STMP_THSD_8821C) & BIT_MASK_STMP_THSD_8821C)
+
 
 
 /* 2 REG_MAC_SPEC_SIFS_8821C (SPECIFICATION SIFS REGISTER) */
@@ -7971,13 +8760,15 @@
 #define BIT_SHIFT_SPEC_SIFS_OFDM_8821C 8
 #define BIT_MASK_SPEC_SIFS_OFDM_8821C 0xff
 #define BIT_SPEC_SIFS_OFDM_8821C(x) (((x) & BIT_MASK_SPEC_SIFS_OFDM_8821C) << BIT_SHIFT_SPEC_SIFS_OFDM_8821C)
-#define BIT_GET_SPEC_SIFS_OFDM_8821C(x) (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_8821C) & BIT_MASK_SPEC_SIFS_OFDM_8821C)

+#define BIT_GET_SPEC_SIFS_OFDM_8821C(x) (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_8821C) & BIT_MASK_SPEC_SIFS_OFDM_8821C)
+
 
 
 #define BIT_SHIFT_SPEC_SIFS_CCK_8821C 0
 #define BIT_MASK_SPEC_SIFS_CCK_8821C 0xff
 #define BIT_SPEC_SIFS_CCK_8821C(x) (((x) & BIT_MASK_SPEC_SIFS_CCK_8821C) << BIT_SHIFT_SPEC_SIFS_CCK_8821C)
-#define BIT_GET_SPEC_SIFS_CCK_8821C(x) (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_8821C) & BIT_MASK_SPEC_SIFS_CCK_8821C)

+#define BIT_GET_SPEC_SIFS_CCK_8821C(x) (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_8821C) & BIT_MASK_SPEC_SIFS_CCK_8821C)
+
 
 
 /* 2 REG_ACKTO_CCK_8821C (ACK TIMEOUT REGISTER FOR CCK RATE) */
@@ -7985,7 +8776,8 @@
 #define BIT_SHIFT_ACKTO_CCK_8821C 0
 #define BIT_MASK_ACKTO_CCK_8821C 0xff
 #define BIT_ACKTO_CCK_8821C(x) (((x) & BIT_MASK_ACKTO_CCK_8821C) << BIT_SHIFT_ACKTO_CCK_8821C)
-#define BIT_GET_ACKTO_CCK_8821C(x) (((x) >> BIT_SHIFT_ACKTO_CCK_8821C) & BIT_MASK_ACKTO_CCK_8821C)

+#define BIT_GET_ACKTO_CCK_8821C(x) (((x) >> BIT_SHIFT_ACKTO_CCK_8821C) & BIT_MASK_ACKTO_CCK_8821C)
+
 
 
 /* 2 REG_USTIME_EDCA_8821C (US TIME TUNING FOR EDCA REGISTER) */
@@ -7993,7 +8785,8 @@
 #define BIT_SHIFT_USTIME_EDCA_V1_8821C 0
 #define BIT_MASK_USTIME_EDCA_V1_8821C 0x1ff
 #define BIT_USTIME_EDCA_V1_8821C(x) (((x) & BIT_MASK_USTIME_EDCA_V1_8821C) << BIT_SHIFT_USTIME_EDCA_V1_8821C)
-#define BIT_GET_USTIME_EDCA_V1_8821C(x) (((x) >> BIT_SHIFT_USTIME_EDCA_V1_8821C) & BIT_MASK_USTIME_EDCA_V1_8821C)

+#define BIT_GET_USTIME_EDCA_V1_8821C(x) (((x) >> BIT_SHIFT_USTIME_EDCA_V1_8821C) & BIT_MASK_USTIME_EDCA_V1_8821C)
+
 
 
 /* 2 REG_RESP_SIFS_OFDM_8821C (RESPONSE SIFS FOR OFDM REGISTER) */
@@ -8001,13 +8794,15 @@
 #define BIT_SHIFT_SIFS_R2T_OFDM_8821C 8
 #define BIT_MASK_SIFS_R2T_OFDM_8821C 0xff
 #define BIT_SIFS_R2T_OFDM_8821C(x) (((x) & BIT_MASK_SIFS_R2T_OFDM_8821C) << BIT_SHIFT_SIFS_R2T_OFDM_8821C)
-#define BIT_GET_SIFS_R2T_OFDM_8821C(x) (((x) >> BIT_SHIFT_SIFS_R2T_OFDM_8821C) & BIT_MASK_SIFS_R2T_OFDM_8821C)

+#define BIT_GET_SIFS_R2T_OFDM_8821C(x) (((x) >> BIT_SHIFT_SIFS_R2T_OFDM_8821C) & BIT_MASK_SIFS_R2T_OFDM_8821C)
+
 
 
 #define BIT_SHIFT_SIFS_T2T_OFDM_8821C 0
 #define BIT_MASK_SIFS_T2T_OFDM_8821C 0xff
 #define BIT_SIFS_T2T_OFDM_8821C(x) (((x) & BIT_MASK_SIFS_T2T_OFDM_8821C) << BIT_SHIFT_SIFS_T2T_OFDM_8821C)
-#define BIT_GET_SIFS_T2T_OFDM_8821C(x) (((x) >> BIT_SHIFT_SIFS_T2T_OFDM_8821C) & BIT_MASK_SIFS_T2T_OFDM_8821C)

+#define BIT_GET_SIFS_T2T_OFDM_8821C(x) (((x) >> BIT_SHIFT_SIFS_T2T_OFDM_8821C) & BIT_MASK_SIFS_T2T_OFDM_8821C)
+
 
 
 /* 2 REG_RESP_SIFS_CCK_8821C (RESPONSE SIFS FOR CCK REGISTER) */
@@ -8015,13 +8810,15 @@
 #define BIT_SHIFT_SIFS_R2T_CCK_8821C 8
 #define BIT_MASK_SIFS_R2T_CCK_8821C 0xff
 #define BIT_SIFS_R2T_CCK_8821C(x) (((x) & BIT_MASK_SIFS_R2T_CCK_8821C) << BIT_SHIFT_SIFS_R2T_CCK_8821C)
-#define BIT_GET_SIFS_R2T_CCK_8821C(x) (((x) >> BIT_SHIFT_SIFS_R2T_CCK_8821C) & BIT_MASK_SIFS_R2T_CCK_8821C)

+#define BIT_GET_SIFS_R2T_CCK_8821C(x) (((x) >> BIT_SHIFT_SIFS_R2T_CCK_8821C) & BIT_MASK_SIFS_R2T_CCK_8821C)
+
 
 
 #define BIT_SHIFT_SIFS_T2T_CCK_8821C 0
 #define BIT_MASK_SIFS_T2T_CCK_8821C 0xff
 #define BIT_SIFS_T2T_CCK_8821C(x) (((x) & BIT_MASK_SIFS_T2T_CCK_8821C) << BIT_SHIFT_SIFS_T2T_CCK_8821C)
-#define BIT_GET_SIFS_T2T_CCK_8821C(x) (((x) >> BIT_SHIFT_SIFS_T2T_CCK_8821C) & BIT_MASK_SIFS_T2T_CCK_8821C)

+#define BIT_GET_SIFS_T2T_CCK_8821C(x) (((x) >> BIT_SHIFT_SIFS_T2T_CCK_8821C) & BIT_MASK_SIFS_T2T_CCK_8821C)
+
 
 
 /* 2 REG_EIFS_8821C (EIFS REGISTER) */
@@ -8029,7 +8826,8 @@
 #define BIT_SHIFT_EIFS_8821C 0
 #define BIT_MASK_EIFS_8821C 0xffff
 #define BIT_EIFS_8821C(x) (((x) & BIT_MASK_EIFS_8821C) << BIT_SHIFT_EIFS_8821C)
-#define BIT_GET_EIFS_8821C(x) (((x) >> BIT_SHIFT_EIFS_8821C) & BIT_MASK_EIFS_8821C)

+#define BIT_GET_EIFS_8821C(x) (((x) >> BIT_SHIFT_EIFS_8821C) & BIT_MASK_EIFS_8821C)
+
 
 
 /* 2 REG_CTS2TO_8821C (CTS2 TIMEOUT REGISTER) */
@@ -8037,7 +8835,8 @@
 #define BIT_SHIFT_CTS2TO_8821C 0
 #define BIT_MASK_CTS2TO_8821C 0xff
 #define BIT_CTS2TO_8821C(x) (((x) & BIT_MASK_CTS2TO_8821C) << BIT_SHIFT_CTS2TO_8821C)
-#define BIT_GET_CTS2TO_8821C(x) (((x) >> BIT_SHIFT_CTS2TO_8821C) & BIT_MASK_CTS2TO_8821C)

+#define BIT_GET_CTS2TO_8821C(x) (((x) >> BIT_SHIFT_CTS2TO_8821C) & BIT_MASK_CTS2TO_8821C)
+
 
 
 /* 2 REG_ACKTO_8821C (ACK TIMEOUT REGISTER) */
@@ -8045,7 +8844,8 @@
 #define BIT_SHIFT_ACKTO_8821C 0
 #define BIT_MASK_ACKTO_8821C 0xff
 #define BIT_ACKTO_8821C(x) (((x) & BIT_MASK_ACKTO_8821C) << BIT_SHIFT_ACKTO_8821C)
-#define BIT_GET_ACKTO_8821C(x) (((x) >> BIT_SHIFT_ACKTO_8821C) & BIT_MASK_ACKTO_8821C)

+#define BIT_GET_ACKTO_8821C(x) (((x) >> BIT_SHIFT_ACKTO_8821C) & BIT_MASK_ACKTO_8821C)
+
 
 
 /* 2 REG_RPFM_MAP0_8821C (RX PAYLOAD FILTER MAP FRAME TYPE CONTROL REGISTER GROUP 0) */
@@ -8092,7 +8892,8 @@
 #define BIT_SHIFT_RPFM_CAM_ADDR_8821C 0
 #define BIT_MASK_RPFM_CAM_ADDR_8821C 0x7f
 #define BIT_RPFM_CAM_ADDR_8821C(x) (((x) & BIT_MASK_RPFM_CAM_ADDR_8821C) << BIT_SHIFT_RPFM_CAM_ADDR_8821C)
-#define BIT_GET_RPFM_CAM_ADDR_8821C(x) (((x) >> BIT_SHIFT_RPFM_CAM_ADDR_8821C) & BIT_MASK_RPFM_CAM_ADDR_8821C)

+#define BIT_GET_RPFM_CAM_ADDR_8821C(x) (((x) >> BIT_SHIFT_RPFM_CAM_ADDR_8821C) & BIT_MASK_RPFM_CAM_ADDR_8821C)
+
 
 
 /* 2 REG_RPFM_CAM_RWD_8821C (ACK TIMEOUT REGISTER) */
@@ -8100,7 +8901,8 @@
 #define BIT_SHIFT_RPFM_CAM_RWD_8821C 0
 #define BIT_MASK_RPFM_CAM_RWD_8821C 0xffffffffL
 #define BIT_RPFM_CAM_RWD_8821C(x) (((x) & BIT_MASK_RPFM_CAM_RWD_8821C) << BIT_SHIFT_RPFM_CAM_RWD_8821C)
-#define BIT_GET_RPFM_CAM_RWD_8821C(x) (((x) >> BIT_SHIFT_RPFM_CAM_RWD_8821C) & BIT_MASK_RPFM_CAM_RWD_8821C)

+#define BIT_GET_RPFM_CAM_RWD_8821C(x) (((x) >> BIT_SHIFT_RPFM_CAM_RWD_8821C) & BIT_MASK_RPFM_CAM_RWD_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -8110,19 +8912,22 @@
 #define BIT_SHIFT_NAV_UPPER_8821C 16
 #define BIT_MASK_NAV_UPPER_8821C 0xff
 #define BIT_NAV_UPPER_8821C(x) (((x) & BIT_MASK_NAV_UPPER_8821C) << BIT_SHIFT_NAV_UPPER_8821C)
-#define BIT_GET_NAV_UPPER_8821C(x) (((x) >> BIT_SHIFT_NAV_UPPER_8821C) & BIT_MASK_NAV_UPPER_8821C)

+#define BIT_GET_NAV_UPPER_8821C(x) (((x) >> BIT_SHIFT_NAV_UPPER_8821C) & BIT_MASK_NAV_UPPER_8821C)
+
 
 
 #define BIT_SHIFT_RXMYRTS_NAV_8821C 8
 #define BIT_MASK_RXMYRTS_NAV_8821C 0xf
 #define BIT_RXMYRTS_NAV_8821C(x) (((x) & BIT_MASK_RXMYRTS_NAV_8821C) << BIT_SHIFT_RXMYRTS_NAV_8821C)
-#define BIT_GET_RXMYRTS_NAV_8821C(x) (((x) >> BIT_SHIFT_RXMYRTS_NAV_8821C) & BIT_MASK_RXMYRTS_NAV_8821C)

+#define BIT_GET_RXMYRTS_NAV_8821C(x) (((x) >> BIT_SHIFT_RXMYRTS_NAV_8821C) & BIT_MASK_RXMYRTS_NAV_8821C)
+
 
 
 #define BIT_SHIFT_RTSRST_8821C 0
 #define BIT_MASK_RTSRST_8821C 0xff
 #define BIT_RTSRST_8821C(x) (((x) & BIT_MASK_RTSRST_8821C) << BIT_SHIFT_RTSRST_8821C)
-#define BIT_GET_RTSRST_8821C(x) (((x) >> BIT_SHIFT_RTSRST_8821C) & BIT_MASK_RTSRST_8821C)

+#define BIT_GET_RTSRST_8821C(x) (((x) >> BIT_SHIFT_RTSRST_8821C) & BIT_MASK_RTSRST_8821C)
+
 
 
 /* 2 REG_BACAMCMD_8821C (BLOCK ACK CAM COMMAND REGISTER) */
@@ -8133,13 +8938,15 @@
 #define BIT_SHIFT_TXSBM_8821C 14
 #define BIT_MASK_TXSBM_8821C 0x3
 #define BIT_TXSBM_8821C(x) (((x) & BIT_MASK_TXSBM_8821C) << BIT_SHIFT_TXSBM_8821C)
-#define BIT_GET_TXSBM_8821C(x) (((x) >> BIT_SHIFT_TXSBM_8821C) & BIT_MASK_TXSBM_8821C)

+#define BIT_GET_TXSBM_8821C(x) (((x) >> BIT_SHIFT_TXSBM_8821C) & BIT_MASK_TXSBM_8821C)
+
 
 
 #define BIT_SHIFT_BACAM_ADDR_8821C 0
 #define BIT_MASK_BACAM_ADDR_8821C 0x3f
 #define BIT_BACAM_ADDR_8821C(x) (((x) & BIT_MASK_BACAM_ADDR_8821C) << BIT_SHIFT_BACAM_ADDR_8821C)
-#define BIT_GET_BACAM_ADDR_8821C(x) (((x) >> BIT_SHIFT_BACAM_ADDR_8821C) & BIT_MASK_BACAM_ADDR_8821C)

+#define BIT_GET_BACAM_ADDR_8821C(x) (((x) >> BIT_SHIFT_BACAM_ADDR_8821C) & BIT_MASK_BACAM_ADDR_8821C)
+
 
 
 /* 2 REG_BACAMCONTENT_8821C (BLOCK ACK CAM CONTENT REGISTER) */
@@ -8147,13 +8954,15 @@
 #define BIT_SHIFT_BA_CONTENT_H_8821C (32 & CPU_OPT_WIDTH)
 #define BIT_MASK_BA_CONTENT_H_8821C 0xffffffffL
 #define BIT_BA_CONTENT_H_8821C(x) (((x) & BIT_MASK_BA_CONTENT_H_8821C) << BIT_SHIFT_BA_CONTENT_H_8821C)
-#define BIT_GET_BA_CONTENT_H_8821C(x) (((x) >> BIT_SHIFT_BA_CONTENT_H_8821C) & BIT_MASK_BA_CONTENT_H_8821C)

+#define BIT_GET_BA_CONTENT_H_8821C(x) (((x) >> BIT_SHIFT_BA_CONTENT_H_8821C) & BIT_MASK_BA_CONTENT_H_8821C)
+
 
 
 #define BIT_SHIFT_BA_CONTENT_L_8821C 0
 #define BIT_MASK_BA_CONTENT_L_8821C 0xffffffffL
 #define BIT_BA_CONTENT_L_8821C(x) (((x) & BIT_MASK_BA_CONTENT_L_8821C) << BIT_SHIFT_BA_CONTENT_L_8821C)
-#define BIT_GET_BA_CONTENT_L_8821C(x) (((x) >> BIT_SHIFT_BA_CONTENT_L_8821C) & BIT_MASK_BA_CONTENT_L_8821C)

+#define BIT_GET_BA_CONTENT_L_8821C(x) (((x) >> BIT_SHIFT_BA_CONTENT_L_8821C) & BIT_MASK_BA_CONTENT_L_8821C)
+
 
 
 /* 2 REG_WMAC_BITMAP_CTL_8821C */
@@ -8165,7 +8974,8 @@
 #define BIT_SHIFT_BITMAP_CONDITION_8821C 2
 #define BIT_MASK_BITMAP_CONDITION_8821C 0x3
 #define BIT_BITMAP_CONDITION_8821C(x) (((x) & BIT_MASK_BITMAP_CONDITION_8821C) << BIT_SHIFT_BITMAP_CONDITION_8821C)
-#define BIT_GET_BITMAP_CONDITION_8821C(x) (((x) >> BIT_SHIFT_BITMAP_CONDITION_8821C) & BIT_MASK_BITMAP_CONDITION_8821C)

+#define BIT_GET_BITMAP_CONDITION_8821C(x) (((x) >> BIT_SHIFT_BITMAP_CONDITION_8821C) & BIT_MASK_BITMAP_CONDITION_8821C)
+
 
 #define BIT_BITMAP_SSNBK_COUNTER_CLR_8821C BIT(1)
 #define BIT_BITMAP_FORCE_8821C BIT(0)
@@ -8175,7 +8985,8 @@
 #define BIT_SHIFT_RXPKT_TYPE_8821C 2
 #define BIT_MASK_RXPKT_TYPE_8821C 0x3f
 #define BIT_RXPKT_TYPE_8821C(x) (((x) & BIT_MASK_RXPKT_TYPE_8821C) << BIT_SHIFT_RXPKT_TYPE_8821C)
-#define BIT_GET_RXPKT_TYPE_8821C(x) (((x) >> BIT_SHIFT_RXPKT_TYPE_8821C) & BIT_MASK_RXPKT_TYPE_8821C)

+#define BIT_GET_RXPKT_TYPE_8821C(x) (((x) >> BIT_SHIFT_RXPKT_TYPE_8821C) & BIT_MASK_RXPKT_TYPE_8821C)
+
 
 #define BIT_TXACT_IND_8821C BIT(1)
 #define BIT_RXACT_IND_8821C BIT(0)
@@ -8185,7 +8996,8 @@
 #define BIT_SHIFT_BITMAP_SSNBK_COUNTER_8821C 2
 #define BIT_MASK_BITMAP_SSNBK_COUNTER_8821C 0x3f
 #define BIT_BITMAP_SSNBK_COUNTER_8821C(x) (((x) & BIT_MASK_BITMAP_SSNBK_COUNTER_8821C) << BIT_SHIFT_BITMAP_SSNBK_COUNTER_8821C)
-#define BIT_GET_BITMAP_SSNBK_COUNTER_8821C(x) (((x) >> BIT_SHIFT_BITMAP_SSNBK_COUNTER_8821C) & BIT_MASK_BITMAP_SSNBK_COUNTER_8821C)

+#define BIT_GET_BITMAP_SSNBK_COUNTER_8821C(x) (((x) >> BIT_SHIFT_BITMAP_SSNBK_COUNTER_8821C) & BIT_MASK_BITMAP_SSNBK_COUNTER_8821C)
+
 
 #define BIT_BITMAP_EN_8821C BIT(1)
 #define BIT_WMAC_BACAM_RPMEN_8821C BIT(0)
@@ -8195,7 +9007,8 @@
 #define BIT_SHIFT_LBDLY_8821C 0
 #define BIT_MASK_LBDLY_8821C 0x1f
 #define BIT_LBDLY_8821C(x) (((x) & BIT_MASK_LBDLY_8821C) << BIT_SHIFT_LBDLY_8821C)
-#define BIT_GET_LBDLY_8821C(x) (((x) >> BIT_SHIFT_LBDLY_8821C) & BIT_MASK_LBDLY_8821C)

+#define BIT_GET_LBDLY_8821C(x) (((x) >> BIT_SHIFT_LBDLY_8821C) & BIT_MASK_LBDLY_8821C)
+
 
 
 /* 2 REG_RXERR_RPT_8821C (RX ERROR REPORT REGISTER) */
@@ -8203,7 +9016,8 @@
 #define BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8821C 28
 #define BIT_MASK_RXERR_RPT_SEL_V1_3_0_8821C 0xf
 #define BIT_RXERR_RPT_SEL_V1_3_0_8821C(x) (((x) & BIT_MASK_RXERR_RPT_SEL_V1_3_0_8821C) << BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8821C)
-#define BIT_GET_RXERR_RPT_SEL_V1_3_0_8821C(x) (((x) >> BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8821C) & BIT_MASK_RXERR_RPT_SEL_V1_3_0_8821C)

+#define BIT_GET_RXERR_RPT_SEL_V1_3_0_8821C(x) (((x) >> BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8821C) & BIT_MASK_RXERR_RPT_SEL_V1_3_0_8821C)
+
 
 #define BIT_RXERR_RPT_RST_8821C BIT(27)
 #define BIT_RXERR_RPT_SEL_V1_4_8821C BIT(26)
@@ -8213,19 +9027,22 @@
 #define BIT_SHIFT_UD_SUB_TYPE_8821C 18
 #define BIT_MASK_UD_SUB_TYPE_8821C 0xf
 #define BIT_UD_SUB_TYPE_8821C(x) (((x) & BIT_MASK_UD_SUB_TYPE_8821C) << BIT_SHIFT_UD_SUB_TYPE_8821C)
-#define BIT_GET_UD_SUB_TYPE_8821C(x) (((x) >> BIT_SHIFT_UD_SUB_TYPE_8821C) & BIT_MASK_UD_SUB_TYPE_8821C)

+#define BIT_GET_UD_SUB_TYPE_8821C(x) (((x) >> BIT_SHIFT_UD_SUB_TYPE_8821C) & BIT_MASK_UD_SUB_TYPE_8821C)
+
 
 
 #define BIT_SHIFT_UD_TYPE_8821C 16
 #define BIT_MASK_UD_TYPE_8821C 0x3
 #define BIT_UD_TYPE_8821C(x) (((x) & BIT_MASK_UD_TYPE_8821C) << BIT_SHIFT_UD_TYPE_8821C)
-#define BIT_GET_UD_TYPE_8821C(x) (((x) >> BIT_SHIFT_UD_TYPE_8821C) & BIT_MASK_UD_TYPE_8821C)

+#define BIT_GET_UD_TYPE_8821C(x) (((x) >> BIT_SHIFT_UD_TYPE_8821C) & BIT_MASK_UD_TYPE_8821C)
+
 
 
 #define BIT_SHIFT_RPT_COUNTER_8821C 0
 #define BIT_MASK_RPT_COUNTER_8821C 0xffff
 #define BIT_RPT_COUNTER_8821C(x) (((x) & BIT_MASK_RPT_COUNTER_8821C) << BIT_SHIFT_RPT_COUNTER_8821C)
-#define BIT_GET_RPT_COUNTER_8821C(x) (((x) >> BIT_SHIFT_RPT_COUNTER_8821C) & BIT_MASK_RPT_COUNTER_8821C)

+#define BIT_GET_RPT_COUNTER_8821C(x) (((x) >> BIT_SHIFT_RPT_COUNTER_8821C) & BIT_MASK_RPT_COUNTER_8821C)
+
 
 
 /* 2 REG_WMAC_TRXPTCL_CTL_8821C (WMAC TX/RX PROTOCOL CONTROL REGISTER) */
@@ -8233,25 +9050,29 @@
 #define BIT_SHIFT_ACKBA_TYPSEL_8821C (60 & CPU_OPT_WIDTH)
 #define BIT_MASK_ACKBA_TYPSEL_8821C 0xf
 #define BIT_ACKBA_TYPSEL_8821C(x) (((x) & BIT_MASK_ACKBA_TYPSEL_8821C) << BIT_SHIFT_ACKBA_TYPSEL_8821C)
-#define BIT_GET_ACKBA_TYPSEL_8821C(x) (((x) >> BIT_SHIFT_ACKBA_TYPSEL_8821C) & BIT_MASK_ACKBA_TYPSEL_8821C)

+#define BIT_GET_ACKBA_TYPSEL_8821C(x) (((x) >> BIT_SHIFT_ACKBA_TYPSEL_8821C) & BIT_MASK_ACKBA_TYPSEL_8821C)
+
 
 
 #define BIT_SHIFT_ACKBA_ACKPCHK_8821C (56 & CPU_OPT_WIDTH)
 #define BIT_MASK_ACKBA_ACKPCHK_8821C 0xf
 #define BIT_ACKBA_ACKPCHK_8821C(x) (((x) & BIT_MASK_ACKBA_ACKPCHK_8821C) << BIT_SHIFT_ACKBA_ACKPCHK_8821C)
-#define BIT_GET_ACKBA_ACKPCHK_8821C(x) (((x) >> BIT_SHIFT_ACKBA_ACKPCHK_8821C) & BIT_MASK_ACKBA_ACKPCHK_8821C)

+#define BIT_GET_ACKBA_ACKPCHK_8821C(x) (((x) >> BIT_SHIFT_ACKBA_ACKPCHK_8821C) & BIT_MASK_ACKBA_ACKPCHK_8821C)
+
 
 
 #define BIT_SHIFT_ACKBAR_TYPESEL_8821C (48 & CPU_OPT_WIDTH)
 #define BIT_MASK_ACKBAR_TYPESEL_8821C 0xff
 #define BIT_ACKBAR_TYPESEL_8821C(x) (((x) & BIT_MASK_ACKBAR_TYPESEL_8821C) << BIT_SHIFT_ACKBAR_TYPESEL_8821C)
-#define BIT_GET_ACKBAR_TYPESEL_8821C(x) (((x) >> BIT_SHIFT_ACKBAR_TYPESEL_8821C) & BIT_MASK_ACKBAR_TYPESEL_8821C)

+#define BIT_GET_ACKBAR_TYPESEL_8821C(x) (((x) >> BIT_SHIFT_ACKBAR_TYPESEL_8821C) & BIT_MASK_ACKBAR_TYPESEL_8821C)
+
 
 
 #define BIT_SHIFT_ACKBAR_ACKPCHK_8821C (44 & CPU_OPT_WIDTH)
 #define BIT_MASK_ACKBAR_ACKPCHK_8821C 0xf
 #define BIT_ACKBAR_ACKPCHK_8821C(x) (((x) & BIT_MASK_ACKBAR_ACKPCHK_8821C) << BIT_SHIFT_ACKBAR_ACKPCHK_8821C)
-#define BIT_GET_ACKBAR_ACKPCHK_8821C(x) (((x) >> BIT_SHIFT_ACKBAR_ACKPCHK_8821C) & BIT_MASK_ACKBAR_ACKPCHK_8821C)

+#define BIT_GET_ACKBAR_ACKPCHK_8821C(x) (((x) >> BIT_SHIFT_ACKBAR_ACKPCHK_8821C) & BIT_MASK_ACKBAR_ACKPCHK_8821C)
+
 
 #define BIT_RXBA_IGNOREA2_8821C BIT(42)
 #define BIT_EN_SAVE_ALL_TXOPADDR_8821C BIT(41)
@@ -8276,7 +9097,8 @@
 #define BIT_SHIFT_RESP_CHNBUSY_8821C 20
 #define BIT_MASK_RESP_CHNBUSY_8821C 0x3
 #define BIT_RESP_CHNBUSY_8821C(x) (((x) & BIT_MASK_RESP_CHNBUSY_8821C) << BIT_SHIFT_RESP_CHNBUSY_8821C)
-#define BIT_GET_RESP_CHNBUSY_8821C(x) (((x) >> BIT_SHIFT_RESP_CHNBUSY_8821C) & BIT_MASK_RESP_CHNBUSY_8821C)

+#define BIT_GET_RESP_CHNBUSY_8821C(x) (((x) >> BIT_SHIFT_RESP_CHNBUSY_8821C) & BIT_MASK_RESP_CHNBUSY_8821C)
+
 
 #define BIT_RESP_DCTS_EN_8821C BIT(19)
 #define BIT_RESP_DCFE_EN_8821C BIT(18)
@@ -8289,19 +9111,22 @@
 #define BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8821C 10
 #define BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8821C 0x7
 #define BIT_R_WMAC_SECOND_CCA_TIMER_8821C(x) (((x) & BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8821C) << BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8821C)
-#define BIT_GET_R_WMAC_SECOND_CCA_TIMER_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8821C) & BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8821C)

+#define BIT_GET_R_WMAC_SECOND_CCA_TIMER_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8821C) & BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8821C)
+
 
 
 #define BIT_SHIFT_RFMOD_8821C 7
 #define BIT_MASK_RFMOD_8821C 0x3
 #define BIT_RFMOD_8821C(x) (((x) & BIT_MASK_RFMOD_8821C) << BIT_SHIFT_RFMOD_8821C)
-#define BIT_GET_RFMOD_8821C(x) (((x) >> BIT_SHIFT_RFMOD_8821C) & BIT_MASK_RFMOD_8821C)

+#define BIT_GET_RFMOD_8821C(x) (((x) >> BIT_SHIFT_RFMOD_8821C) & BIT_MASK_RFMOD_8821C)
+
 
 
 #define BIT_SHIFT_RESP_CTS_DYNBW_SEL_8821C 5
 #define BIT_MASK_RESP_CTS_DYNBW_SEL_8821C 0x3
 #define BIT_RESP_CTS_DYNBW_SEL_8821C(x) (((x) & BIT_MASK_RESP_CTS_DYNBW_SEL_8821C) << BIT_SHIFT_RESP_CTS_DYNBW_SEL_8821C)
-#define BIT_GET_RESP_CTS_DYNBW_SEL_8821C(x) (((x) >> BIT_SHIFT_RESP_CTS_DYNBW_SEL_8821C) & BIT_MASK_RESP_CTS_DYNBW_SEL_8821C)

+#define BIT_GET_RESP_CTS_DYNBW_SEL_8821C(x) (((x) >> BIT_SHIFT_RESP_CTS_DYNBW_SEL_8821C) & BIT_MASK_RESP_CTS_DYNBW_SEL_8821C)
+
 
 #define BIT_DLY_TX_WAIT_RXANTSEL_8821C BIT(4)
 #define BIT_TXRESP_BY_RXANTSEL_8821C BIT(3)
@@ -8309,7 +9134,8 @@
 #define BIT_SHIFT_ORIG_DCTS_CHK_8821C 0
 #define BIT_MASK_ORIG_DCTS_CHK_8821C 0x3
 #define BIT_ORIG_DCTS_CHK_8821C(x) (((x) & BIT_MASK_ORIG_DCTS_CHK_8821C) << BIT_SHIFT_ORIG_DCTS_CHK_8821C)
-#define BIT_GET_ORIG_DCTS_CHK_8821C(x) (((x) >> BIT_SHIFT_ORIG_DCTS_CHK_8821C) & BIT_MASK_ORIG_DCTS_CHK_8821C)

+#define BIT_GET_ORIG_DCTS_CHK_8821C(x) (((x) >> BIT_SHIFT_ORIG_DCTS_CHK_8821C) & BIT_MASK_ORIG_DCTS_CHK_8821C)
+
 
 
 /* 2 REG_CAMCMD_8821C (CAM COMMAND REGISTER) */
@@ -8321,7 +9147,8 @@
 #define BIT_SHIFT_SECCAM_ADDR_V2_8821C 0
 #define BIT_MASK_SECCAM_ADDR_V2_8821C 0x3ff
 #define BIT_SECCAM_ADDR_V2_8821C(x) (((x) & BIT_MASK_SECCAM_ADDR_V2_8821C) << BIT_SHIFT_SECCAM_ADDR_V2_8821C)
-#define BIT_GET_SECCAM_ADDR_V2_8821C(x) (((x) >> BIT_SHIFT_SECCAM_ADDR_V2_8821C) & BIT_MASK_SECCAM_ADDR_V2_8821C)

+#define BIT_GET_SECCAM_ADDR_V2_8821C(x) (((x) >> BIT_SHIFT_SECCAM_ADDR_V2_8821C) & BIT_MASK_SECCAM_ADDR_V2_8821C)
+
 
 
 /* 2 REG_CAMWRITE_8821C (CAM WRITE REGISTER) */
@@ -8329,7 +9156,8 @@
 #define BIT_SHIFT_CAMW_DATA_8821C 0
 #define BIT_MASK_CAMW_DATA_8821C 0xffffffffL
 #define BIT_CAMW_DATA_8821C(x) (((x) & BIT_MASK_CAMW_DATA_8821C) << BIT_SHIFT_CAMW_DATA_8821C)
-#define BIT_GET_CAMW_DATA_8821C(x) (((x) >> BIT_SHIFT_CAMW_DATA_8821C) & BIT_MASK_CAMW_DATA_8821C)

+#define BIT_GET_CAMW_DATA_8821C(x) (((x) >> BIT_SHIFT_CAMW_DATA_8821C) & BIT_MASK_CAMW_DATA_8821C)
+
 
 
 /* 2 REG_CAMREAD_8821C (CAM READ REGISTER) */
@@ -8337,7 +9165,8 @@
 #define BIT_SHIFT_CAMR_DATA_8821C 0
 #define BIT_MASK_CAMR_DATA_8821C 0xffffffffL
 #define BIT_CAMR_DATA_8821C(x) (((x) & BIT_MASK_CAMR_DATA_8821C) << BIT_SHIFT_CAMR_DATA_8821C)
-#define BIT_GET_CAMR_DATA_8821C(x) (((x) >> BIT_SHIFT_CAMR_DATA_8821C) & BIT_MASK_CAMR_DATA_8821C)

+#define BIT_GET_CAMR_DATA_8821C(x) (((x) >> BIT_SHIFT_CAMR_DATA_8821C) & BIT_MASK_CAMR_DATA_8821C)
+
 
 
 /* 2 REG_CAMDBG_8821C (CAM DEBUG REGISTER) */
@@ -8347,20 +9176,23 @@
 #define BIT_SHIFT_CAMDBG_SEC_TYPE_8821C 12
 #define BIT_MASK_CAMDBG_SEC_TYPE_8821C 0x7
 #define BIT_CAMDBG_SEC_TYPE_8821C(x) (((x) & BIT_MASK_CAMDBG_SEC_TYPE_8821C) << BIT_SHIFT_CAMDBG_SEC_TYPE_8821C)
-#define BIT_GET_CAMDBG_SEC_TYPE_8821C(x) (((x) >> BIT_SHIFT_CAMDBG_SEC_TYPE_8821C) & BIT_MASK_CAMDBG_SEC_TYPE_8821C)

+#define BIT_GET_CAMDBG_SEC_TYPE_8821C(x) (((x) >> BIT_SHIFT_CAMDBG_SEC_TYPE_8821C) & BIT_MASK_CAMDBG_SEC_TYPE_8821C)
+
 
 #define BIT_CAMDBG_EXT_SECTYPE_8821C BIT(11)
 
 #define BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8821C 5
 #define BIT_MASK_CAMDBG_MIC_KEY_IDX_8821C 0x1f
 #define BIT_CAMDBG_MIC_KEY_IDX_8821C(x) (((x) & BIT_MASK_CAMDBG_MIC_KEY_IDX_8821C) << BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8821C)
-#define BIT_GET_CAMDBG_MIC_KEY_IDX_8821C(x) (((x) >> BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8821C) & BIT_MASK_CAMDBG_MIC_KEY_IDX_8821C)

+#define BIT_GET_CAMDBG_MIC_KEY_IDX_8821C(x) (((x) >> BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8821C) & BIT_MASK_CAMDBG_MIC_KEY_IDX_8821C)
+
 
 
 #define BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8821C 0
 #define BIT_MASK_CAMDBG_SEC_KEY_IDX_8821C 0x1f
 #define BIT_CAMDBG_SEC_KEY_IDX_8821C(x) (((x) & BIT_MASK_CAMDBG_SEC_KEY_IDX_8821C) << BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8821C)
-#define BIT_GET_CAMDBG_SEC_KEY_IDX_8821C(x) (((x) >> BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8821C) & BIT_MASK_CAMDBG_SEC_KEY_IDX_8821C)

+#define BIT_GET_CAMDBG_SEC_KEY_IDX_8821C(x) (((x) >> BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8821C) & BIT_MASK_CAMDBG_SEC_KEY_IDX_8821C)
+
 
 
 /* 2 REG_RXFILTER_ACTION_1_8821C */
@@ -8368,7 +9200,8 @@
 #define BIT_SHIFT_RXFILTER_ACTION_1_8821C 0
 #define BIT_MASK_RXFILTER_ACTION_1_8821C 0xff
 #define BIT_RXFILTER_ACTION_1_8821C(x) (((x) & BIT_MASK_RXFILTER_ACTION_1_8821C) << BIT_SHIFT_RXFILTER_ACTION_1_8821C)
-#define BIT_GET_RXFILTER_ACTION_1_8821C(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_1_8821C) & BIT_MASK_RXFILTER_ACTION_1_8821C)

+#define BIT_GET_RXFILTER_ACTION_1_8821C(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_1_8821C) & BIT_MASK_RXFILTER_ACTION_1_8821C)
+
 
 
 /* 2 REG_RXFILTER_CATEGORY_1_8821C */
@@ -8376,7 +9209,8 @@
 #define BIT_SHIFT_RXFILTER_CATEGORY_1_8821C 0
 #define BIT_MASK_RXFILTER_CATEGORY_1_8821C 0xff
 #define BIT_RXFILTER_CATEGORY_1_8821C(x) (((x) & BIT_MASK_RXFILTER_CATEGORY_1_8821C) << BIT_SHIFT_RXFILTER_CATEGORY_1_8821C)
-#define BIT_GET_RXFILTER_CATEGORY_1_8821C(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_1_8821C) & BIT_MASK_RXFILTER_CATEGORY_1_8821C)

+#define BIT_GET_RXFILTER_CATEGORY_1_8821C(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_1_8821C) & BIT_MASK_RXFILTER_CATEGORY_1_8821C)
+
 
 
 /* 2 REG_SECCFG_8821C (SECURITY CONFIGURATION REGISTER) */
@@ -8401,7 +9235,8 @@
 #define BIT_SHIFT_RXFILTER_ACTION_3_8821C 0
 #define BIT_MASK_RXFILTER_ACTION_3_8821C 0xff
 #define BIT_RXFILTER_ACTION_3_8821C(x) (((x) & BIT_MASK_RXFILTER_ACTION_3_8821C) << BIT_SHIFT_RXFILTER_ACTION_3_8821C)
-#define BIT_GET_RXFILTER_ACTION_3_8821C(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_3_8821C) & BIT_MASK_RXFILTER_ACTION_3_8821C)

+#define BIT_GET_RXFILTER_ACTION_3_8821C(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_3_8821C) & BIT_MASK_RXFILTER_ACTION_3_8821C)
+
 
 
 /* 2 REG_RXFILTER_CATEGORY_3_8821C */
@@ -8409,7 +9244,8 @@
 #define BIT_SHIFT_RXFILTER_CATEGORY_3_8821C 0
 #define BIT_MASK_RXFILTER_CATEGORY_3_8821C 0xff
 #define BIT_RXFILTER_CATEGORY_3_8821C(x) (((x) & BIT_MASK_RXFILTER_CATEGORY_3_8821C) << BIT_SHIFT_RXFILTER_CATEGORY_3_8821C)
-#define BIT_GET_RXFILTER_CATEGORY_3_8821C(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_3_8821C) & BIT_MASK_RXFILTER_CATEGORY_3_8821C)

+#define BIT_GET_RXFILTER_CATEGORY_3_8821C(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_3_8821C) & BIT_MASK_RXFILTER_CATEGORY_3_8821C)
+
 
 
 /* 2 REG_RXFILTER_ACTION_2_8821C */
@@ -8417,7 +9253,8 @@
 #define BIT_SHIFT_RXFILTER_ACTION_2_8821C 0
 #define BIT_MASK_RXFILTER_ACTION_2_8821C 0xff
 #define BIT_RXFILTER_ACTION_2_8821C(x) (((x) & BIT_MASK_RXFILTER_ACTION_2_8821C) << BIT_SHIFT_RXFILTER_ACTION_2_8821C)
-#define BIT_GET_RXFILTER_ACTION_2_8821C(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_2_8821C) & BIT_MASK_RXFILTER_ACTION_2_8821C)

+#define BIT_GET_RXFILTER_ACTION_2_8821C(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_2_8821C) & BIT_MASK_RXFILTER_ACTION_2_8821C)
+
 
 
 /* 2 REG_RXFILTER_CATEGORY_2_8821C */
@@ -8425,7 +9262,8 @@
 #define BIT_SHIFT_RXFILTER_CATEGORY_2_8821C 0
 #define BIT_MASK_RXFILTER_CATEGORY_2_8821C 0xff
 #define BIT_RXFILTER_CATEGORY_2_8821C(x) (((x) & BIT_MASK_RXFILTER_CATEGORY_2_8821C) << BIT_SHIFT_RXFILTER_CATEGORY_2_8821C)
-#define BIT_GET_RXFILTER_CATEGORY_2_8821C(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_2_8821C) & BIT_MASK_RXFILTER_CATEGORY_2_8821C)

+#define BIT_GET_RXFILTER_CATEGORY_2_8821C(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_2_8821C) & BIT_MASK_RXFILTER_CATEGORY_2_8821C)
+
 
 
 /* 2 REG_RXFLTMAP4_8821C (RX FILTER MAP GROUP 4) */
@@ -8515,7 +9353,8 @@
 #define BIT_SHIFT_PORTSEL__PS_RX_INFO_8821C 5
 #define BIT_MASK_PORTSEL__PS_RX_INFO_8821C 0x7
 #define BIT_PORTSEL__PS_RX_INFO_8821C(x) (((x) & BIT_MASK_PORTSEL__PS_RX_INFO_8821C) << BIT_SHIFT_PORTSEL__PS_RX_INFO_8821C)
-#define BIT_GET_PORTSEL__PS_RX_INFO_8821C(x) (((x) >> BIT_SHIFT_PORTSEL__PS_RX_INFO_8821C) & BIT_MASK_PORTSEL__PS_RX_INFO_8821C)

+#define BIT_GET_PORTSEL__PS_RX_INFO_8821C(x) (((x) >> BIT_SHIFT_PORTSEL__PS_RX_INFO_8821C) & BIT_MASK_PORTSEL__PS_RX_INFO_8821C)
+
 
 #define BIT_RXCTRLIN0_8821C BIT(4)
 #define BIT_RXMGTIN0_8821C BIT(3)
@@ -8533,7 +9372,8 @@
 #define BIT_SHIFT_PSF_BSSIDSEL_B2B1_8821C 6
 #define BIT_MASK_PSF_BSSIDSEL_B2B1_8821C 0x3
 #define BIT_PSF_BSSIDSEL_B2B1_8821C(x) (((x) & BIT_MASK_PSF_BSSIDSEL_B2B1_8821C) << BIT_SHIFT_PSF_BSSIDSEL_B2B1_8821C)
-#define BIT_GET_PSF_BSSIDSEL_B2B1_8821C(x) (((x) >> BIT_SHIFT_PSF_BSSIDSEL_B2B1_8821C) & BIT_MASK_PSF_BSSIDSEL_B2B1_8821C)

+#define BIT_GET_PSF_BSSIDSEL_B2B1_8821C(x) (((x) >> BIT_SHIFT_PSF_BSSIDSEL_B2B1_8821C) & BIT_MASK_PSF_BSSIDSEL_B2B1_8821C)
+
 
 #define BIT_WOWHCI_8821C BIT(5)
 #define BIT_PSF_BSSIDSEL_B0_8821C BIT(4)
@@ -8548,13 +9388,15 @@
 #define BIT_SHIFT_LPNAV_EARLY_8821C 16
 #define BIT_MASK_LPNAV_EARLY_8821C 0x7fff
 #define BIT_LPNAV_EARLY_8821C(x) (((x) & BIT_MASK_LPNAV_EARLY_8821C) << BIT_SHIFT_LPNAV_EARLY_8821C)
-#define BIT_GET_LPNAV_EARLY_8821C(x) (((x) >> BIT_SHIFT_LPNAV_EARLY_8821C) & BIT_MASK_LPNAV_EARLY_8821C)

+#define BIT_GET_LPNAV_EARLY_8821C(x) (((x) >> BIT_SHIFT_LPNAV_EARLY_8821C) & BIT_MASK_LPNAV_EARLY_8821C)
+
 
 
 #define BIT_SHIFT_LPNAV_TH_8821C 0
 #define BIT_MASK_LPNAV_TH_8821C 0xffff
 #define BIT_LPNAV_TH_8821C(x) (((x) & BIT_MASK_LPNAV_TH_8821C) << BIT_SHIFT_LPNAV_TH_8821C)
-#define BIT_GET_LPNAV_TH_8821C(x) (((x) >> BIT_SHIFT_LPNAV_TH_8821C) & BIT_MASK_LPNAV_TH_8821C)

+#define BIT_GET_LPNAV_TH_8821C(x) (((x) >> BIT_SHIFT_LPNAV_TH_8821C) & BIT_MASK_LPNAV_TH_8821C)
+
 
 
 /* 2 REG_WKFMCAM_CMD_8821C (WAKEUP FRAME CAM COMMAND REGISTER) */
@@ -8565,13 +9407,15 @@
 #define BIT_SHIFT_WKFCAM_ADDR_V2_8821C 8
 #define BIT_MASK_WKFCAM_ADDR_V2_8821C 0xff
 #define BIT_WKFCAM_ADDR_V2_8821C(x) (((x) & BIT_MASK_WKFCAM_ADDR_V2_8821C) << BIT_SHIFT_WKFCAM_ADDR_V2_8821C)
-#define BIT_GET_WKFCAM_ADDR_V2_8821C(x) (((x) >> BIT_SHIFT_WKFCAM_ADDR_V2_8821C) & BIT_MASK_WKFCAM_ADDR_V2_8821C)

+#define BIT_GET_WKFCAM_ADDR_V2_8821C(x) (((x) >> BIT_SHIFT_WKFCAM_ADDR_V2_8821C) & BIT_MASK_WKFCAM_ADDR_V2_8821C)
+
 
 
 #define BIT_SHIFT_WKFCAM_CAM_NUM_V1_8821C 0
 #define BIT_MASK_WKFCAM_CAM_NUM_V1_8821C 0xff
 #define BIT_WKFCAM_CAM_NUM_V1_8821C(x) (((x) & BIT_MASK_WKFCAM_CAM_NUM_V1_8821C) << BIT_SHIFT_WKFCAM_CAM_NUM_V1_8821C)
-#define BIT_GET_WKFCAM_CAM_NUM_V1_8821C(x) (((x) >> BIT_SHIFT_WKFCAM_CAM_NUM_V1_8821C) & BIT_MASK_WKFCAM_CAM_NUM_V1_8821C)

+#define BIT_GET_WKFCAM_CAM_NUM_V1_8821C(x) (((x) >> BIT_SHIFT_WKFCAM_CAM_NUM_V1_8821C) & BIT_MASK_WKFCAM_CAM_NUM_V1_8821C)
+
 
 
 /* 2 REG_WKFMCAM_RWD_8821C (WAKEUP FRAME READ/WRITE DATA) */
@@ -8579,7 +9423,8 @@
 #define BIT_SHIFT_WKFMCAM_RWD_8821C 0
 #define BIT_MASK_WKFMCAM_RWD_8821C 0xffffffffL
 #define BIT_WKFMCAM_RWD_8821C(x) (((x) & BIT_MASK_WKFMCAM_RWD_8821C) << BIT_SHIFT_WKFMCAM_RWD_8821C)
-#define BIT_GET_WKFMCAM_RWD_8821C(x) (((x) >> BIT_SHIFT_WKFMCAM_RWD_8821C) & BIT_MASK_WKFMCAM_RWD_8821C)

+#define BIT_GET_WKFMCAM_RWD_8821C(x) (((x) >> BIT_SHIFT_WKFMCAM_RWD_8821C) & BIT_MASK_WKFMCAM_RWD_8821C)
+
 
 
 /* 2 REG_RXFLTMAP1_8821C (RX FILTER MAP GROUP 1) */
@@ -8643,13 +9488,15 @@
 #define BIT_SHIFT_DTIM_CNT_8821C 24
 #define BIT_MASK_DTIM_CNT_8821C 0xff
 #define BIT_DTIM_CNT_8821C(x) (((x) & BIT_MASK_DTIM_CNT_8821C) << BIT_SHIFT_DTIM_CNT_8821C)
-#define BIT_GET_DTIM_CNT_8821C(x) (((x) >> BIT_SHIFT_DTIM_CNT_8821C) & BIT_MASK_DTIM_CNT_8821C)

+#define BIT_GET_DTIM_CNT_8821C(x) (((x) >> BIT_SHIFT_DTIM_CNT_8821C) & BIT_MASK_DTIM_CNT_8821C)
+
 
 
 #define BIT_SHIFT_DTIM_PERIOD_8821C 16
 #define BIT_MASK_DTIM_PERIOD_8821C 0xff
 #define BIT_DTIM_PERIOD_8821C(x) (((x) & BIT_MASK_DTIM_PERIOD_8821C) << BIT_SHIFT_DTIM_PERIOD_8821C)
-#define BIT_GET_DTIM_PERIOD_8821C(x) (((x) >> BIT_SHIFT_DTIM_PERIOD_8821C) & BIT_MASK_DTIM_PERIOD_8821C)

+#define BIT_GET_DTIM_PERIOD_8821C(x) (((x) >> BIT_SHIFT_DTIM_PERIOD_8821C) & BIT_MASK_DTIM_PERIOD_8821C)
+
 
 #define BIT_DTIM_8821C BIT(15)
 #define BIT_TIM_8821C BIT(14)
@@ -8657,7 +9504,8 @@
 #define BIT_SHIFT_PS_AID_0_8821C 0
 #define BIT_MASK_PS_AID_0_8821C 0x7ff
 #define BIT_PS_AID_0_8821C(x) (((x) & BIT_MASK_PS_AID_0_8821C) << BIT_SHIFT_PS_AID_0_8821C)
-#define BIT_GET_PS_AID_0_8821C(x) (((x) >> BIT_SHIFT_PS_AID_0_8821C) & BIT_MASK_PS_AID_0_8821C)

+#define BIT_GET_PS_AID_0_8821C(x) (((x) >> BIT_SHIFT_PS_AID_0_8821C) & BIT_MASK_PS_AID_0_8821C)
+
 
 
 /* 2 REG_FLC_TRPC_8821C (TIMER OF FLC_RPC) */
@@ -8667,7 +9515,8 @@
 #define BIT_SHIFT_TRPCD_8821C 0
 #define BIT_MASK_TRPCD_8821C 0x3f
 #define BIT_TRPCD_8821C(x) (((x) & BIT_MASK_TRPCD_8821C) << BIT_SHIFT_TRPCD_8821C)
-#define BIT_GET_TRPCD_8821C(x) (((x) >> BIT_SHIFT_TRPCD_8821C) & BIT_MASK_TRPCD_8821C)

+#define BIT_GET_TRPCD_8821C(x) (((x) >> BIT_SHIFT_TRPCD_8821C) & BIT_MASK_TRPCD_8821C)
+
 
 
 /* 2 REG_FLC_PTS_8821C (PKT TYPE SELECTION OF FLC_RPC T) */
@@ -8680,7 +9529,8 @@
 #define BIT_SHIFT_FLC_RPCT_8821C 0
 #define BIT_MASK_FLC_RPCT_8821C 0xff
 #define BIT_FLC_RPCT_8821C(x) (((x) & BIT_MASK_FLC_RPCT_8821C) << BIT_SHIFT_FLC_RPCT_8821C)
-#define BIT_GET_FLC_RPCT_8821C(x) (((x) >> BIT_SHIFT_FLC_RPCT_8821C) & BIT_MASK_FLC_RPCT_8821C)

+#define BIT_GET_FLC_RPCT_8821C(x) (((x) >> BIT_SHIFT_FLC_RPCT_8821C) & BIT_MASK_FLC_RPCT_8821C)
+
 
 
 /* 2 REG_FLC_RPC_8821C (FW LPS CONDITION -- RX PKT COUNTER) */
@@ -8688,7 +9538,8 @@
 #define BIT_SHIFT_FLC_RPC_8821C 0
 #define BIT_MASK_FLC_RPC_8821C 0xff
 #define BIT_FLC_RPC_8821C(x) (((x) & BIT_MASK_FLC_RPC_8821C) << BIT_SHIFT_FLC_RPC_8821C)
-#define BIT_GET_FLC_RPC_8821C(x) (((x) >> BIT_SHIFT_FLC_RPC_8821C) & BIT_MASK_FLC_RPC_8821C)

+#define BIT_GET_FLC_RPC_8821C(x) (((x) >> BIT_SHIFT_FLC_RPC_8821C) & BIT_MASK_FLC_RPC_8821C)
+
 
 
 /* 2 REG_RXPKTMON_CTRL_8821C */
@@ -8696,25 +9547,29 @@
 #define BIT_SHIFT_RXBKQPKT_SEQ_8821C 20
 #define BIT_MASK_RXBKQPKT_SEQ_8821C 0xf
 #define BIT_RXBKQPKT_SEQ_8821C(x) (((x) & BIT_MASK_RXBKQPKT_SEQ_8821C) << BIT_SHIFT_RXBKQPKT_SEQ_8821C)
-#define BIT_GET_RXBKQPKT_SEQ_8821C(x) (((x) >> BIT_SHIFT_RXBKQPKT_SEQ_8821C) & BIT_MASK_RXBKQPKT_SEQ_8821C)

+#define BIT_GET_RXBKQPKT_SEQ_8821C(x) (((x) >> BIT_SHIFT_RXBKQPKT_SEQ_8821C) & BIT_MASK_RXBKQPKT_SEQ_8821C)
+
 
 
 #define BIT_SHIFT_RXBEQPKT_SEQ_8821C 16
 #define BIT_MASK_RXBEQPKT_SEQ_8821C 0xf
 #define BIT_RXBEQPKT_SEQ_8821C(x) (((x) & BIT_MASK_RXBEQPKT_SEQ_8821C) << BIT_SHIFT_RXBEQPKT_SEQ_8821C)
-#define BIT_GET_RXBEQPKT_SEQ_8821C(x) (((x) >> BIT_SHIFT_RXBEQPKT_SEQ_8821C) & BIT_MASK_RXBEQPKT_SEQ_8821C)

+#define BIT_GET_RXBEQPKT_SEQ_8821C(x) (((x) >> BIT_SHIFT_RXBEQPKT_SEQ_8821C) & BIT_MASK_RXBEQPKT_SEQ_8821C)
+
 
 
 #define BIT_SHIFT_RXVIQPKT_SEQ_8821C 12
 #define BIT_MASK_RXVIQPKT_SEQ_8821C 0xf
 #define BIT_RXVIQPKT_SEQ_8821C(x) (((x) & BIT_MASK_RXVIQPKT_SEQ_8821C) << BIT_SHIFT_RXVIQPKT_SEQ_8821C)
-#define BIT_GET_RXVIQPKT_SEQ_8821C(x) (((x) >> BIT_SHIFT_RXVIQPKT_SEQ_8821C) & BIT_MASK_RXVIQPKT_SEQ_8821C)

+#define BIT_GET_RXVIQPKT_SEQ_8821C(x) (((x) >> BIT_SHIFT_RXVIQPKT_SEQ_8821C) & BIT_MASK_RXVIQPKT_SEQ_8821C)
+
 
 
 #define BIT_SHIFT_RXVOQPKT_SEQ_8821C 8
 #define BIT_MASK_RXVOQPKT_SEQ_8821C 0xf
 #define BIT_RXVOQPKT_SEQ_8821C(x) (((x) & BIT_MASK_RXVOQPKT_SEQ_8821C) << BIT_SHIFT_RXVOQPKT_SEQ_8821C)
-#define BIT_GET_RXVOQPKT_SEQ_8821C(x) (((x) >> BIT_SHIFT_RXVOQPKT_SEQ_8821C) & BIT_MASK_RXVOQPKT_SEQ_8821C)

+#define BIT_GET_RXVOQPKT_SEQ_8821C(x) (((x) >> BIT_SHIFT_RXVOQPKT_SEQ_8821C) & BIT_MASK_RXVOQPKT_SEQ_8821C)
+
 
 #define BIT_RXBKQPKT_ERR_8821C BIT(7)
 #define BIT_RXBEQPKT_ERR_8821C BIT(6)
@@ -8729,20 +9584,23 @@
 #define BIT_SHIFT_STATE_SEL_8821C 24
 #define BIT_MASK_STATE_SEL_8821C 0x1f
 #define BIT_STATE_SEL_8821C(x) (((x) & BIT_MASK_STATE_SEL_8821C) << BIT_SHIFT_STATE_SEL_8821C)
-#define BIT_GET_STATE_SEL_8821C(x) (((x) >> BIT_SHIFT_STATE_SEL_8821C) & BIT_MASK_STATE_SEL_8821C)

+#define BIT_GET_STATE_SEL_8821C(x) (((x) >> BIT_SHIFT_STATE_SEL_8821C) & BIT_MASK_STATE_SEL_8821C)
+
 
 
 #define BIT_SHIFT_STATE_INFO_8821C 8
 #define BIT_MASK_STATE_INFO_8821C 0xff
 #define BIT_STATE_INFO_8821C(x) (((x) & BIT_MASK_STATE_INFO_8821C) << BIT_SHIFT_STATE_INFO_8821C)
-#define BIT_GET_STATE_INFO_8821C(x) (((x) >> BIT_SHIFT_STATE_INFO_8821C) & BIT_MASK_STATE_INFO_8821C)

+#define BIT_GET_STATE_INFO_8821C(x) (((x) >> BIT_SHIFT_STATE_INFO_8821C) & BIT_MASK_STATE_INFO_8821C)
+
 
 #define BIT_UPD_NXT_STATE_8821C BIT(7)
 
 #define BIT_SHIFT_CUR_STATE_8821C 0
 #define BIT_MASK_CUR_STATE_8821C 0x7f
 #define BIT_CUR_STATE_8821C(x) (((x) & BIT_MASK_CUR_STATE_8821C) << BIT_SHIFT_CUR_STATE_8821C)
-#define BIT_GET_CUR_STATE_8821C(x) (((x) >> BIT_SHIFT_CUR_STATE_8821C) & BIT_MASK_CUR_STATE_8821C)

+#define BIT_GET_CUR_STATE_8821C(x) (((x) >> BIT_SHIFT_CUR_STATE_8821C) & BIT_MASK_CUR_STATE_8821C)
+
 
 
 /* 2 REG_ERROR_MON_8821C */
@@ -8759,7 +9617,8 @@
 #define BIT_SHIFT_INFO_INDEX_OFFSET_8821C 16
 #define BIT_MASK_INFO_INDEX_OFFSET_8821C 0x1fff
 #define BIT_INFO_INDEX_OFFSET_8821C(x) (((x) & BIT_MASK_INFO_INDEX_OFFSET_8821C) << BIT_SHIFT_INFO_INDEX_OFFSET_8821C)
-#define BIT_GET_INFO_INDEX_OFFSET_8821C(x) (((x) >> BIT_SHIFT_INFO_INDEX_OFFSET_8821C) & BIT_MASK_INFO_INDEX_OFFSET_8821C)

+#define BIT_GET_INFO_INDEX_OFFSET_8821C(x) (((x) >> BIT_SHIFT_INFO_INDEX_OFFSET_8821C) & BIT_MASK_INFO_INDEX_OFFSET_8821C)
+
 
 #define BIT_WMAC_SRCH_FIFOFULL_8821C BIT(15)
 #define BIT_DIS_INFOSRCH_8821C BIT(14)
@@ -8768,7 +9627,8 @@
 #define BIT_SHIFT_INFO_ADDR_OFFSET_8821C 0
 #define BIT_MASK_INFO_ADDR_OFFSET_8821C 0x1fff
 #define BIT_INFO_ADDR_OFFSET_8821C(x) (((x) & BIT_MASK_INFO_ADDR_OFFSET_8821C) << BIT_SHIFT_INFO_ADDR_OFFSET_8821C)
-#define BIT_GET_INFO_ADDR_OFFSET_8821C(x) (((x) >> BIT_SHIFT_INFO_ADDR_OFFSET_8821C) & BIT_MASK_INFO_ADDR_OFFSET_8821C)

+#define BIT_GET_INFO_ADDR_OFFSET_8821C(x) (((x) >> BIT_SHIFT_INFO_ADDR_OFFSET_8821C) & BIT_MASK_INFO_ADDR_OFFSET_8821C)
+
 
 
 /* 2 REG_BT_COEX_TABLE_8821C (BT-COEXISTENCE CONTROL REGISTER) */
@@ -8779,13 +9639,15 @@
 #define BIT_SHIFT_PRI_MASK_TXAC_8821C (117 & CPU_OPT_WIDTH)
 #define BIT_MASK_PRI_MASK_TXAC_8821C 0x7f
 #define BIT_PRI_MASK_TXAC_8821C(x) (((x) & BIT_MASK_PRI_MASK_TXAC_8821C) << BIT_SHIFT_PRI_MASK_TXAC_8821C)
-#define BIT_GET_PRI_MASK_TXAC_8821C(x) (((x) >> BIT_SHIFT_PRI_MASK_TXAC_8821C) & BIT_MASK_PRI_MASK_TXAC_8821C)

+#define BIT_GET_PRI_MASK_TXAC_8821C(x) (((x) >> BIT_SHIFT_PRI_MASK_TXAC_8821C) & BIT_MASK_PRI_MASK_TXAC_8821C)
+
 
 
 #define BIT_SHIFT_PRI_MASK_NAV_8821C (109 & CPU_OPT_WIDTH)
 #define BIT_MASK_PRI_MASK_NAV_8821C 0xff
 #define BIT_PRI_MASK_NAV_8821C(x) (((x) & BIT_MASK_PRI_MASK_NAV_8821C) << BIT_SHIFT_PRI_MASK_NAV_8821C)
-#define BIT_GET_PRI_MASK_NAV_8821C(x) (((x) >> BIT_SHIFT_PRI_MASK_NAV_8821C) & BIT_MASK_PRI_MASK_NAV_8821C)

+#define BIT_GET_PRI_MASK_NAV_8821C(x) (((x) >> BIT_SHIFT_PRI_MASK_NAV_8821C) & BIT_MASK_PRI_MASK_NAV_8821C)
+
 
 #define BIT_PRI_MASK_CCK_8821C BIT(108)
 #define BIT_PRI_MASK_OFDM_8821C BIT(107)
@@ -8794,13 +9656,15 @@
 #define BIT_SHIFT_PRI_MASK_NUM_8821C (102 & CPU_OPT_WIDTH)
 #define BIT_MASK_PRI_MASK_NUM_8821C 0xf
 #define BIT_PRI_MASK_NUM_8821C(x) (((x) & BIT_MASK_PRI_MASK_NUM_8821C) << BIT_SHIFT_PRI_MASK_NUM_8821C)
-#define BIT_GET_PRI_MASK_NUM_8821C(x) (((x) >> BIT_SHIFT_PRI_MASK_NUM_8821C) & BIT_MASK_PRI_MASK_NUM_8821C)

+#define BIT_GET_PRI_MASK_NUM_8821C(x) (((x) >> BIT_SHIFT_PRI_MASK_NUM_8821C) & BIT_MASK_PRI_MASK_NUM_8821C)
+
 
 
 #define BIT_SHIFT_PRI_MASK_TYPE_8821C (98 & CPU_OPT_WIDTH)
 #define BIT_MASK_PRI_MASK_TYPE_8821C 0xf
 #define BIT_PRI_MASK_TYPE_8821C(x) (((x) & BIT_MASK_PRI_MASK_TYPE_8821C) << BIT_SHIFT_PRI_MASK_TYPE_8821C)
-#define BIT_GET_PRI_MASK_TYPE_8821C(x) (((x) >> BIT_SHIFT_PRI_MASK_TYPE_8821C) & BIT_MASK_PRI_MASK_TYPE_8821C)

+#define BIT_GET_PRI_MASK_TYPE_8821C(x) (((x) >> BIT_SHIFT_PRI_MASK_TYPE_8821C) & BIT_MASK_PRI_MASK_TYPE_8821C)
+
 
 #define BIT_OOB_8821C BIT(97)
 #define BIT_ANT_SEL_8821C BIT(96)
@@ -8808,25 +9672,29 @@
 #define BIT_SHIFT_BREAK_TABLE_2_8821C (80 & CPU_OPT_WIDTH)
 #define BIT_MASK_BREAK_TABLE_2_8821C 0xffff
 #define BIT_BREAK_TABLE_2_8821C(x) (((x) & BIT_MASK_BREAK_TABLE_2_8821C) << BIT_SHIFT_BREAK_TABLE_2_8821C)
-#define BIT_GET_BREAK_TABLE_2_8821C(x) (((x) >> BIT_SHIFT_BREAK_TABLE_2_8821C) & BIT_MASK_BREAK_TABLE_2_8821C)

+#define BIT_GET_BREAK_TABLE_2_8821C(x) (((x) >> BIT_SHIFT_BREAK_TABLE_2_8821C) & BIT_MASK_BREAK_TABLE_2_8821C)
+
 
 
 #define BIT_SHIFT_BREAK_TABLE_1_8821C (64 & CPU_OPT_WIDTH)
 #define BIT_MASK_BREAK_TABLE_1_8821C 0xffff
 #define BIT_BREAK_TABLE_1_8821C(x) (((x) & BIT_MASK_BREAK_TABLE_1_8821C) << BIT_SHIFT_BREAK_TABLE_1_8821C)
-#define BIT_GET_BREAK_TABLE_1_8821C(x) (((x) >> BIT_SHIFT_BREAK_TABLE_1_8821C) & BIT_MASK_BREAK_TABLE_1_8821C)

+#define BIT_GET_BREAK_TABLE_1_8821C(x) (((x) >> BIT_SHIFT_BREAK_TABLE_1_8821C) & BIT_MASK_BREAK_TABLE_1_8821C)
+
 
 
 #define BIT_SHIFT_COEX_TABLE_2_8821C (32 & CPU_OPT_WIDTH)
 #define BIT_MASK_COEX_TABLE_2_8821C 0xffffffffL
 #define BIT_COEX_TABLE_2_8821C(x) (((x) & BIT_MASK_COEX_TABLE_2_8821C) << BIT_SHIFT_COEX_TABLE_2_8821C)
-#define BIT_GET_COEX_TABLE_2_8821C(x) (((x) >> BIT_SHIFT_COEX_TABLE_2_8821C) & BIT_MASK_COEX_TABLE_2_8821C)

+#define BIT_GET_COEX_TABLE_2_8821C(x) (((x) >> BIT_SHIFT_COEX_TABLE_2_8821C) & BIT_MASK_COEX_TABLE_2_8821C)
+
 
 
 #define BIT_SHIFT_COEX_TABLE_1_8821C 0
 #define BIT_MASK_COEX_TABLE_1_8821C 0xffffffffL
 #define BIT_COEX_TABLE_1_8821C(x) (((x) & BIT_MASK_COEX_TABLE_1_8821C) << BIT_SHIFT_COEX_TABLE_1_8821C)
-#define BIT_GET_COEX_TABLE_1_8821C(x) (((x) >> BIT_SHIFT_COEX_TABLE_1_8821C) & BIT_MASK_COEX_TABLE_1_8821C)

+#define BIT_GET_COEX_TABLE_1_8821C(x) (((x) >> BIT_SHIFT_COEX_TABLE_1_8821C) & BIT_MASK_COEX_TABLE_1_8821C)
+
 
 
 /* 2 REG_RXCMD_0_8821C */
@@ -8835,7 +9703,8 @@
 #define BIT_SHIFT_RXCMD_INFO_8821C 0
 #define BIT_MASK_RXCMD_INFO_8821C 0x7fffffffL
 #define BIT_RXCMD_INFO_8821C(x) (((x) & BIT_MASK_RXCMD_INFO_8821C) << BIT_SHIFT_RXCMD_INFO_8821C)
-#define BIT_GET_RXCMD_INFO_8821C(x) (((x) >> BIT_SHIFT_RXCMD_INFO_8821C) & BIT_MASK_RXCMD_INFO_8821C)

+#define BIT_GET_RXCMD_INFO_8821C(x) (((x) >> BIT_SHIFT_RXCMD_INFO_8821C) & BIT_MASK_RXCMD_INFO_8821C)
+
 
 
 /* 2 REG_RXCMD_1_8821C */
@@ -8843,7 +9712,8 @@
 #define BIT_SHIFT_RXCMD_PRD_8821C 0
 #define BIT_MASK_RXCMD_PRD_8821C 0xffff
 #define BIT_RXCMD_PRD_8821C(x) (((x) & BIT_MASK_RXCMD_PRD_8821C) << BIT_SHIFT_RXCMD_PRD_8821C)
-#define BIT_GET_RXCMD_PRD_8821C(x) (((x) >> BIT_SHIFT_RXCMD_PRD_8821C) & BIT_MASK_RXCMD_PRD_8821C)

+#define BIT_GET_RXCMD_PRD_8821C(x) (((x) >> BIT_SHIFT_RXCMD_PRD_8821C) & BIT_MASK_RXCMD_PRD_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -8853,31 +9723,36 @@
 #define BIT_SHIFT_WMAC_RESP_MFB_8821C 25
 #define BIT_MASK_WMAC_RESP_MFB_8821C 0x7f
 #define BIT_WMAC_RESP_MFB_8821C(x) (((x) & BIT_MASK_WMAC_RESP_MFB_8821C) << BIT_SHIFT_WMAC_RESP_MFB_8821C)
-#define BIT_GET_WMAC_RESP_MFB_8821C(x) (((x) >> BIT_SHIFT_WMAC_RESP_MFB_8821C) & BIT_MASK_WMAC_RESP_MFB_8821C)

+#define BIT_GET_WMAC_RESP_MFB_8821C(x) (((x) >> BIT_SHIFT_WMAC_RESP_MFB_8821C) & BIT_MASK_WMAC_RESP_MFB_8821C)
+
 
 
 #define BIT_SHIFT_WMAC_ANTINF_SEL_8821C 23
 #define BIT_MASK_WMAC_ANTINF_SEL_8821C 0x3
 #define BIT_WMAC_ANTINF_SEL_8821C(x) (((x) & BIT_MASK_WMAC_ANTINF_SEL_8821C) << BIT_SHIFT_WMAC_ANTINF_SEL_8821C)
-#define BIT_GET_WMAC_ANTINF_SEL_8821C(x) (((x) >> BIT_SHIFT_WMAC_ANTINF_SEL_8821C) & BIT_MASK_WMAC_ANTINF_SEL_8821C)

+#define BIT_GET_WMAC_ANTINF_SEL_8821C(x) (((x) >> BIT_SHIFT_WMAC_ANTINF_SEL_8821C) & BIT_MASK_WMAC_ANTINF_SEL_8821C)
+
 
 
 #define BIT_SHIFT_WMAC_ANTSEL_SEL_8821C 21
 #define BIT_MASK_WMAC_ANTSEL_SEL_8821C 0x3
 #define BIT_WMAC_ANTSEL_SEL_8821C(x) (((x) & BIT_MASK_WMAC_ANTSEL_SEL_8821C) << BIT_SHIFT_WMAC_ANTSEL_SEL_8821C)
-#define BIT_GET_WMAC_ANTSEL_SEL_8821C(x) (((x) >> BIT_SHIFT_WMAC_ANTSEL_SEL_8821C) & BIT_MASK_WMAC_ANTSEL_SEL_8821C)

+#define BIT_GET_WMAC_ANTSEL_SEL_8821C(x) (((x) >> BIT_SHIFT_WMAC_ANTSEL_SEL_8821C) & BIT_MASK_WMAC_ANTSEL_SEL_8821C)
+
 
 
 #define BIT_SHIFT_R_WMAC_RESP_TXPOWER_8821C 18
 #define BIT_MASK_R_WMAC_RESP_TXPOWER_8821C 0x7
 #define BIT_R_WMAC_RESP_TXPOWER_8821C(x) (((x) & BIT_MASK_R_WMAC_RESP_TXPOWER_8821C) << BIT_SHIFT_R_WMAC_RESP_TXPOWER_8821C)
-#define BIT_GET_R_WMAC_RESP_TXPOWER_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_RESP_TXPOWER_8821C) & BIT_MASK_R_WMAC_RESP_TXPOWER_8821C)

+#define BIT_GET_R_WMAC_RESP_TXPOWER_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_RESP_TXPOWER_8821C) & BIT_MASK_R_WMAC_RESP_TXPOWER_8821C)
+
 
 
 #define BIT_SHIFT_WMAC_RESP_TXANT_8821C 0
 #define BIT_MASK_WMAC_RESP_TXANT_8821C 0x3ffff
 #define BIT_WMAC_RESP_TXANT_8821C(x) (((x) & BIT_MASK_WMAC_RESP_TXANT_8821C) << BIT_SHIFT_WMAC_RESP_TXANT_8821C)
-#define BIT_GET_WMAC_RESP_TXANT_8821C(x) (((x) >> BIT_SHIFT_WMAC_RESP_TXANT_8821C) & BIT_MASK_WMAC_RESP_TXANT_8821C)

+#define BIT_GET_WMAC_RESP_TXANT_8821C(x) (((x) >> BIT_SHIFT_WMAC_RESP_TXANT_8821C) & BIT_MASK_WMAC_RESP_TXANT_8821C)
+
 
 
 /* 2 REG_BBPSF_CTRL_8821C */
@@ -8887,20 +9762,23 @@
 #define BIT_SHIFT_WMAC_CSI_RATE_8821C 24
 #define BIT_MASK_WMAC_CSI_RATE_8821C 0x3f
 #define BIT_WMAC_CSI_RATE_8821C(x) (((x) & BIT_MASK_WMAC_CSI_RATE_8821C) << BIT_SHIFT_WMAC_CSI_RATE_8821C)
-#define BIT_GET_WMAC_CSI_RATE_8821C(x) (((x) >> BIT_SHIFT_WMAC_CSI_RATE_8821C) & BIT_MASK_WMAC_CSI_RATE_8821C)

+#define BIT_GET_WMAC_CSI_RATE_8821C(x) (((x) >> BIT_SHIFT_WMAC_CSI_RATE_8821C) & BIT_MASK_WMAC_CSI_RATE_8821C)
+
 
 
 #define BIT_SHIFT_WMAC_RESP_TXRATE_8821C 16
 #define BIT_MASK_WMAC_RESP_TXRATE_8821C 0xff
 #define BIT_WMAC_RESP_TXRATE_8821C(x) (((x) & BIT_MASK_WMAC_RESP_TXRATE_8821C) << BIT_SHIFT_WMAC_RESP_TXRATE_8821C)
-#define BIT_GET_WMAC_RESP_TXRATE_8821C(x) (((x) >> BIT_SHIFT_WMAC_RESP_TXRATE_8821C) & BIT_MASK_WMAC_RESP_TXRATE_8821C)

+#define BIT_GET_WMAC_RESP_TXRATE_8821C(x) (((x) >> BIT_SHIFT_WMAC_RESP_TXRATE_8821C) & BIT_MASK_WMAC_RESP_TXRATE_8821C)
+
 
 #define BIT_CSI_FORCE_RATE_EN_8821C BIT(15)
 
 #define BIT_SHIFT_CSI_RSC_8821C 13
 #define BIT_MASK_CSI_RSC_8821C 0x3
 #define BIT_CSI_RSC_8821C(x) (((x) & BIT_MASK_CSI_RSC_8821C) << BIT_SHIFT_CSI_RSC_8821C)
-#define BIT_GET_CSI_RSC_8821C(x) (((x) >> BIT_SHIFT_CSI_RSC_8821C) & BIT_MASK_CSI_RSC_8821C)

+#define BIT_GET_CSI_RSC_8821C(x) (((x) >> BIT_SHIFT_CSI_RSC_8821C) & BIT_MASK_CSI_RSC_8821C)
+
 
 #define BIT_CSI_GID_SEL_8821C BIT(12)
 #define BIT_RDCSIMD_FLAG_TRIG_SEL_8821C BIT(11)
@@ -8914,7 +9792,8 @@
 #define BIT_SHIFT_BBPSF_ERRTHR_8821C 0
 #define BIT_MASK_BBPSF_ERRTHR_8821C 0x7
 #define BIT_BBPSF_ERRTHR_8821C(x) (((x) & BIT_MASK_BBPSF_ERRTHR_8821C) << BIT_SHIFT_BBPSF_ERRTHR_8821C)
-#define BIT_GET_BBPSF_ERRTHR_8821C(x) (((x) >> BIT_SHIFT_BBPSF_ERRTHR_8821C) & BIT_MASK_BBPSF_ERRTHR_8821C)

+#define BIT_GET_BBPSF_ERRTHR_8821C(x) (((x) >> BIT_SHIFT_BBPSF_ERRTHR_8821C) & BIT_MASK_BBPSF_ERRTHR_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -8926,7 +9805,8 @@
 #define BIT_SHIFT_P2P_OUI_TYPE_8821C 0
 #define BIT_MASK_P2P_OUI_TYPE_8821C 0xff
 #define BIT_P2P_OUI_TYPE_8821C(x) (((x) & BIT_MASK_P2P_OUI_TYPE_8821C) << BIT_SHIFT_P2P_OUI_TYPE_8821C)
-#define BIT_GET_P2P_OUI_TYPE_8821C(x) (((x) >> BIT_SHIFT_P2P_OUI_TYPE_8821C) & BIT_MASK_P2P_OUI_TYPE_8821C)

+#define BIT_GET_P2P_OUI_TYPE_8821C(x) (((x) >> BIT_SHIFT_P2P_OUI_TYPE_8821C) & BIT_MASK_P2P_OUI_TYPE_8821C)
+
 
 
 /* 2 REG_ASSOCIATED_BFMER0_INFO_8821C (ASSOCIATED BEAMFORMER0 INFO REGISTER) */
@@ -8934,13 +9814,15 @@
 #define BIT_SHIFT_R_WMAC_TXCSI_AID0_8821C (48 & CPU_OPT_WIDTH)
 #define BIT_MASK_R_WMAC_TXCSI_AID0_8821C 0x1ff
 #define BIT_R_WMAC_TXCSI_AID0_8821C(x) (((x) & BIT_MASK_R_WMAC_TXCSI_AID0_8821C) << BIT_SHIFT_R_WMAC_TXCSI_AID0_8821C)
-#define BIT_GET_R_WMAC_TXCSI_AID0_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID0_8821C) & BIT_MASK_R_WMAC_TXCSI_AID0_8821C)

+#define BIT_GET_R_WMAC_TXCSI_AID0_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID0_8821C) & BIT_MASK_R_WMAC_TXCSI_AID0_8821C)
+
 
 
 #define BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8821C 0
 #define BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8821C 0xffffffffffffL
 #define BIT_R_WMAC_SOUNDING_RXADD_R0_8821C(x) (((x) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8821C) << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8821C)
-#define BIT_GET_R_WMAC_SOUNDING_RXADD_R0_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8821C) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8821C)

+#define BIT_GET_R_WMAC_SOUNDING_RXADD_R0_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8821C) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8821C)
+
 
 
 /* 2 REG_ASSOCIATED_BFMER1_INFO_8821C (ASSOCIATED BEAMFORMER1 INFO REGISTER) */
@@ -8948,13 +9830,15 @@
 #define BIT_SHIFT_R_WMAC_TXCSI_AID1_8821C (48 & CPU_OPT_WIDTH)
 #define BIT_MASK_R_WMAC_TXCSI_AID1_8821C 0x1ff
 #define BIT_R_WMAC_TXCSI_AID1_8821C(x) (((x) & BIT_MASK_R_WMAC_TXCSI_AID1_8821C) << BIT_SHIFT_R_WMAC_TXCSI_AID1_8821C)
-#define BIT_GET_R_WMAC_TXCSI_AID1_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID1_8821C) & BIT_MASK_R_WMAC_TXCSI_AID1_8821C)

+#define BIT_GET_R_WMAC_TXCSI_AID1_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID1_8821C) & BIT_MASK_R_WMAC_TXCSI_AID1_8821C)
+
 
 
 #define BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8821C 0
 #define BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8821C 0xffffffffffffL
 #define BIT_R_WMAC_SOUNDING_RXADD_R1_8821C(x) (((x) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8821C) << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8821C)
-#define BIT_GET_R_WMAC_SOUNDING_RXADD_R1_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8821C) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8821C)

+#define BIT_GET_R_WMAC_SOUNDING_RXADD_R1_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8821C) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -8972,13 +9856,15 @@
 #define BIT_SHIFT_R_WMAC_BFINFO_20M_1_8821C 16
 #define BIT_MASK_R_WMAC_BFINFO_20M_1_8821C 0xfff
 #define BIT_R_WMAC_BFINFO_20M_1_8821C(x) (((x) & BIT_MASK_R_WMAC_BFINFO_20M_1_8821C) << BIT_SHIFT_R_WMAC_BFINFO_20M_1_8821C)
-#define BIT_GET_R_WMAC_BFINFO_20M_1_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_1_8821C) & BIT_MASK_R_WMAC_BFINFO_20M_1_8821C)

+#define BIT_GET_R_WMAC_BFINFO_20M_1_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_1_8821C) & BIT_MASK_R_WMAC_BFINFO_20M_1_8821C)
+
 
 
 #define BIT_SHIFT_R_WMAC_BFINFO_20M_0_8821C 0
 #define BIT_MASK_R_WMAC_BFINFO_20M_0_8821C 0xfff
 #define BIT_R_WMAC_BFINFO_20M_0_8821C(x) (((x) & BIT_MASK_R_WMAC_BFINFO_20M_0_8821C) << BIT_SHIFT_R_WMAC_BFINFO_20M_0_8821C)
-#define BIT_GET_R_WMAC_BFINFO_20M_0_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_0_8821C) & BIT_MASK_R_WMAC_BFINFO_20M_0_8821C)

+#define BIT_GET_R_WMAC_BFINFO_20M_0_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_0_8821C) & BIT_MASK_R_WMAC_BFINFO_20M_0_8821C)
+
 
 
 /* 2 REG_TX_CSI_RPT_PARAM_BW40_8821C (TX CSI REPORT PARAMETER_BW40 REGISTER) */
@@ -8986,7 +9872,8 @@
 #define BIT_SHIFT_WMAC_RESP_ANTCD_8821C 0
 #define BIT_MASK_WMAC_RESP_ANTCD_8821C 0xf
 #define BIT_WMAC_RESP_ANTCD_8821C(x) (((x) & BIT_MASK_WMAC_RESP_ANTCD_8821C) << BIT_SHIFT_WMAC_RESP_ANTCD_8821C)
-#define BIT_GET_WMAC_RESP_ANTCD_8821C(x) (((x) >> BIT_SHIFT_WMAC_RESP_ANTCD_8821C) & BIT_MASK_WMAC_RESP_ANTCD_8821C)

+#define BIT_GET_WMAC_RESP_ANTCD_8821C(x) (((x) >> BIT_SHIFT_WMAC_RESP_ANTCD_8821C) & BIT_MASK_WMAC_RESP_ANTCD_8821C)
+
 
 
 /* 2 REG_TX_CSI_RPT_PARAM_BW80_8821C (TX CSI REPORT PARAMETER_BW80 REGISTER) */
@@ -8996,13 +9883,15 @@
 #define BIT_SHIFT_DTIM_CNT2_8821C 24
 #define BIT_MASK_DTIM_CNT2_8821C 0xff
 #define BIT_DTIM_CNT2_8821C(x) (((x) & BIT_MASK_DTIM_CNT2_8821C) << BIT_SHIFT_DTIM_CNT2_8821C)
-#define BIT_GET_DTIM_CNT2_8821C(x) (((x) >> BIT_SHIFT_DTIM_CNT2_8821C) & BIT_MASK_DTIM_CNT2_8821C)

+#define BIT_GET_DTIM_CNT2_8821C(x) (((x) >> BIT_SHIFT_DTIM_CNT2_8821C) & BIT_MASK_DTIM_CNT2_8821C)
+
 
 
 #define BIT_SHIFT_DTIM_PERIOD2_8821C 16
 #define BIT_MASK_DTIM_PERIOD2_8821C 0xff
 #define BIT_DTIM_PERIOD2_8821C(x) (((x) & BIT_MASK_DTIM_PERIOD2_8821C) << BIT_SHIFT_DTIM_PERIOD2_8821C)
-#define BIT_GET_DTIM_PERIOD2_8821C(x) (((x) >> BIT_SHIFT_DTIM_PERIOD2_8821C) & BIT_MASK_DTIM_PERIOD2_8821C)

+#define BIT_GET_DTIM_PERIOD2_8821C(x) (((x) >> BIT_SHIFT_DTIM_PERIOD2_8821C) & BIT_MASK_DTIM_PERIOD2_8821C)
+
 
 #define BIT_DTIM2_8821C BIT(15)
 #define BIT_TIM2_8821C BIT(14)
@@ -9010,7 +9899,8 @@
 #define BIT_SHIFT_PS_AID_2_8821C 0
 #define BIT_MASK_PS_AID_2_8821C 0x7ff
 #define BIT_PS_AID_2_8821C(x) (((x) & BIT_MASK_PS_AID_2_8821C) << BIT_SHIFT_PS_AID_2_8821C)
-#define BIT_GET_PS_AID_2_8821C(x) (((x) >> BIT_SHIFT_PS_AID_2_8821C) & BIT_MASK_PS_AID_2_8821C)

+#define BIT_GET_PS_AID_2_8821C(x) (((x) >> BIT_SHIFT_PS_AID_2_8821C) & BIT_MASK_PS_AID_2_8821C)
+
 
 
 /* 2 REG_BCN_PSR_RPT3_8821C (BEACON PARSER REPORT REGISTER3) */
@@ -9018,13 +9908,15 @@
 #define BIT_SHIFT_DTIM_CNT3_8821C 24
 #define BIT_MASK_DTIM_CNT3_8821C 0xff
 #define BIT_DTIM_CNT3_8821C(x) (((x) & BIT_MASK_DTIM_CNT3_8821C) << BIT_SHIFT_DTIM_CNT3_8821C)
-#define BIT_GET_DTIM_CNT3_8821C(x) (((x) >> BIT_SHIFT_DTIM_CNT3_8821C) & BIT_MASK_DTIM_CNT3_8821C)

+#define BIT_GET_DTIM_CNT3_8821C(x) (((x) >> BIT_SHIFT_DTIM_CNT3_8821C) & BIT_MASK_DTIM_CNT3_8821C)
+
 
 
 #define BIT_SHIFT_DTIM_PERIOD3_8821C 16
 #define BIT_MASK_DTIM_PERIOD3_8821C 0xff
 #define BIT_DTIM_PERIOD3_8821C(x) (((x) & BIT_MASK_DTIM_PERIOD3_8821C) << BIT_SHIFT_DTIM_PERIOD3_8821C)
-#define BIT_GET_DTIM_PERIOD3_8821C(x) (((x) >> BIT_SHIFT_DTIM_PERIOD3_8821C) & BIT_MASK_DTIM_PERIOD3_8821C)

+#define BIT_GET_DTIM_PERIOD3_8821C(x) (((x) >> BIT_SHIFT_DTIM_PERIOD3_8821C) & BIT_MASK_DTIM_PERIOD3_8821C)
+
 
 #define BIT_DTIM3_8821C BIT(15)
 #define BIT_TIM3_8821C BIT(14)
@@ -9032,7 +9924,8 @@
 #define BIT_SHIFT_PS_AID_3_8821C 0
 #define BIT_MASK_PS_AID_3_8821C 0x7ff
 #define BIT_PS_AID_3_8821C(x) (((x) & BIT_MASK_PS_AID_3_8821C) << BIT_SHIFT_PS_AID_3_8821C)
-#define BIT_GET_PS_AID_3_8821C(x) (((x) >> BIT_SHIFT_PS_AID_3_8821C) & BIT_MASK_PS_AID_3_8821C)

+#define BIT_GET_PS_AID_3_8821C(x) (((x) >> BIT_SHIFT_PS_AID_3_8821C) & BIT_MASK_PS_AID_3_8821C)
+
 
 
 /* 2 REG_BCN_PSR_RPT4_8821C (BEACON PARSER REPORT REGISTER4) */
@@ -9040,13 +9933,15 @@
 #define BIT_SHIFT_DTIM_CNT4_8821C 24
 #define BIT_MASK_DTIM_CNT4_8821C 0xff
 #define BIT_DTIM_CNT4_8821C(x) (((x) & BIT_MASK_DTIM_CNT4_8821C) << BIT_SHIFT_DTIM_CNT4_8821C)
-#define BIT_GET_DTIM_CNT4_8821C(x) (((x) >> BIT_SHIFT_DTIM_CNT4_8821C) & BIT_MASK_DTIM_CNT4_8821C)

+#define BIT_GET_DTIM_CNT4_8821C(x) (((x) >> BIT_SHIFT_DTIM_CNT4_8821C) & BIT_MASK_DTIM_CNT4_8821C)
+
 
 
 #define BIT_SHIFT_DTIM_PERIOD4_8821C 16
 #define BIT_MASK_DTIM_PERIOD4_8821C 0xff
 #define BIT_DTIM_PERIOD4_8821C(x) (((x) & BIT_MASK_DTIM_PERIOD4_8821C) << BIT_SHIFT_DTIM_PERIOD4_8821C)
-#define BIT_GET_DTIM_PERIOD4_8821C(x) (((x) >> BIT_SHIFT_DTIM_PERIOD4_8821C) & BIT_MASK_DTIM_PERIOD4_8821C)

+#define BIT_GET_DTIM_PERIOD4_8821C(x) (((x) >> BIT_SHIFT_DTIM_PERIOD4_8821C) & BIT_MASK_DTIM_PERIOD4_8821C)
+
 
 #define BIT_DTIM4_8821C BIT(15)
 #define BIT_TIM4_8821C BIT(14)
@@ -9054,7 +9949,8 @@
 #define BIT_SHIFT_PS_AID_4_8821C 0
 #define BIT_MASK_PS_AID_4_8821C 0x7ff
 #define BIT_PS_AID_4_8821C(x) (((x) & BIT_MASK_PS_AID_4_8821C) << BIT_SHIFT_PS_AID_4_8821C)
-#define BIT_GET_PS_AID_4_8821C(x) (((x) >> BIT_SHIFT_PS_AID_4_8821C) & BIT_MASK_PS_AID_4_8821C)

+#define BIT_GET_PS_AID_4_8821C(x) (((x) >> BIT_SHIFT_PS_AID_4_8821C) & BIT_MASK_PS_AID_4_8821C)
+
 
 
 /* 2 REG_A1_ADDR_MASK_8821C (A1 ADDR MASK REGISTER) */
@@ -9062,7 +9958,8 @@
 #define BIT_SHIFT_A1_ADDR_MASK_8821C 0
 #define BIT_MASK_A1_ADDR_MASK_8821C 0xffffffffL
 #define BIT_A1_ADDR_MASK_8821C(x) (((x) & BIT_MASK_A1_ADDR_MASK_8821C) << BIT_SHIFT_A1_ADDR_MASK_8821C)
-#define BIT_GET_A1_ADDR_MASK_8821C(x) (((x) >> BIT_SHIFT_A1_ADDR_MASK_8821C) & BIT_MASK_A1_ADDR_MASK_8821C)

+#define BIT_GET_A1_ADDR_MASK_8821C(x) (((x) >> BIT_SHIFT_A1_ADDR_MASK_8821C) & BIT_MASK_A1_ADDR_MASK_8821C)
+
 
 
 /* 2 REG_MACID2_8821C (MAC ID2 REGISTER) */
@@ -9070,7 +9967,8 @@
 #define BIT_SHIFT_MACID2_8821C 0
 #define BIT_MASK_MACID2_8821C 0xffffffffffffL
 #define BIT_MACID2_8821C(x) (((x) & BIT_MASK_MACID2_8821C) << BIT_SHIFT_MACID2_8821C)
-#define BIT_GET_MACID2_8821C(x) (((x) >> BIT_SHIFT_MACID2_8821C) & BIT_MASK_MACID2_8821C)

+#define BIT_GET_MACID2_8821C(x) (((x) >> BIT_SHIFT_MACID2_8821C) & BIT_MASK_MACID2_8821C)
+
 
 
 /* 2 REG_BSSID2_8821C (BSSID2 REGISTER) */
@@ -9078,7 +9976,8 @@
 #define BIT_SHIFT_BSSID2_8821C 0
 #define BIT_MASK_BSSID2_8821C 0xffffffffffffL
 #define BIT_BSSID2_8821C(x) (((x) & BIT_MASK_BSSID2_8821C) << BIT_SHIFT_BSSID2_8821C)
-#define BIT_GET_BSSID2_8821C(x) (((x) >> BIT_SHIFT_BSSID2_8821C) & BIT_MASK_BSSID2_8821C)

+#define BIT_GET_BSSID2_8821C(x) (((x) >> BIT_SHIFT_BSSID2_8821C) & BIT_MASK_BSSID2_8821C)
+
 
 
 /* 2 REG_MACID3_8821C (MAC ID3 REGISTER) */
@@ -9086,7 +9985,8 @@
 #define BIT_SHIFT_MACID3_8821C 0
 #define BIT_MASK_MACID3_8821C 0xffffffffffffL
 #define BIT_MACID3_8821C(x) (((x) & BIT_MASK_MACID3_8821C) << BIT_SHIFT_MACID3_8821C)
-#define BIT_GET_MACID3_8821C(x) (((x) >> BIT_SHIFT_MACID3_8821C) & BIT_MASK_MACID3_8821C)

+#define BIT_GET_MACID3_8821C(x) (((x) >> BIT_SHIFT_MACID3_8821C) & BIT_MASK_MACID3_8821C)
+
 
 
 /* 2 REG_BSSID3_8821C (BSSID3 REGISTER) */
@@ -9094,7 +9994,8 @@
 #define BIT_SHIFT_BSSID3_8821C 0
 #define BIT_MASK_BSSID3_8821C 0xffffffffffffL
 #define BIT_BSSID3_8821C(x) (((x) & BIT_MASK_BSSID3_8821C) << BIT_SHIFT_BSSID3_8821C)
-#define BIT_GET_BSSID3_8821C(x) (((x) >> BIT_SHIFT_BSSID3_8821C) & BIT_MASK_BSSID3_8821C)

+#define BIT_GET_BSSID3_8821C(x) (((x) >> BIT_SHIFT_BSSID3_8821C) & BIT_MASK_BSSID3_8821C)
+
 
 
 /* 2 REG_MACID4_8821C (MAC ID4 REGISTER) */
@@ -9102,7 +10003,8 @@
 #define BIT_SHIFT_MACID4_8821C 0
 #define BIT_MASK_MACID4_8821C 0xffffffffffffL
 #define BIT_MACID4_8821C(x) (((x) & BIT_MASK_MACID4_8821C) << BIT_SHIFT_MACID4_8821C)
-#define BIT_GET_MACID4_8821C(x) (((x) >> BIT_SHIFT_MACID4_8821C) & BIT_MASK_MACID4_8821C)

+#define BIT_GET_MACID4_8821C(x) (((x) >> BIT_SHIFT_MACID4_8821C) & BIT_MASK_MACID4_8821C)
+
 
 
 /* 2 REG_BSSID4_8821C (BSSID4 REGISTER) */
@@ -9110,7 +10012,8 @@
 #define BIT_SHIFT_BSSID4_8821C 0
 #define BIT_MASK_BSSID4_8821C 0xffffffffffffL
 #define BIT_BSSID4_8821C(x) (((x) & BIT_MASK_BSSID4_8821C) << BIT_SHIFT_BSSID4_8821C)
-#define BIT_GET_BSSID4_8821C(x) (((x) >> BIT_SHIFT_BSSID4_8821C) & BIT_MASK_BSSID4_8821C)

+#define BIT_GET_BSSID4_8821C(x) (((x) >> BIT_SHIFT_BSSID4_8821C) & BIT_MASK_BSSID4_8821C)
+
 
 
 /* 2 REG_NOA_REPORT_8821C */
@@ -9132,13 +10035,15 @@
 #define BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8821C 4
 #define BIT_MASK_WMAC_TXMU_ACKPOLICY_8821C 0x3
 #define BIT_WMAC_TXMU_ACKPOLICY_8821C(x) (((x) & BIT_MASK_WMAC_TXMU_ACKPOLICY_8821C) << BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8821C)
-#define BIT_GET_WMAC_TXMU_ACKPOLICY_8821C(x) (((x) >> BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8821C) & BIT_MASK_WMAC_TXMU_ACKPOLICY_8821C)

+#define BIT_GET_WMAC_TXMU_ACKPOLICY_8821C(x) (((x) >> BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8821C) & BIT_MASK_WMAC_TXMU_ACKPOLICY_8821C)
+
 
 
 #define BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8821C 1
 #define BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8821C 0x7
 #define BIT_WMAC_MU_BFEE_PORT_SEL_8821C(x) (((x) & BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8821C) << BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8821C)
-#define BIT_GET_WMAC_MU_BFEE_PORT_SEL_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8821C) & BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8821C)

+#define BIT_GET_WMAC_MU_BFEE_PORT_SEL_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8821C) & BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8821C)
+
 
 #define BIT_WMAC_MU_BFEE_DIS_8821C BIT(0)
 
@@ -9147,7 +10052,8 @@
 #define BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8821C 0
 #define BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8821C 0xff
 #define BIT_WMAC_PAUSE_BB_CLR_TH_8821C(x) (((x) & BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8821C) << BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8821C)
-#define BIT_GET_WMAC_PAUSE_BB_CLR_TH_8821C(x) (((x) >> BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8821C) & BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8821C)

+#define BIT_GET_WMAC_PAUSE_BB_CLR_TH_8821C(x) (((x) >> BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8821C) & BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8821C)
+
 
 
 /* 2 REG_WMAC_MU_ARB_8821C */
@@ -9157,7 +10063,8 @@
 #define BIT_SHIFT_WMAC_ARB_SW_STATE_8821C 0
 #define BIT_MASK_WMAC_ARB_SW_STATE_8821C 0x3f
 #define BIT_WMAC_ARB_SW_STATE_8821C(x) (((x) & BIT_MASK_WMAC_ARB_SW_STATE_8821C) << BIT_SHIFT_WMAC_ARB_SW_STATE_8821C)
-#define BIT_GET_WMAC_ARB_SW_STATE_8821C(x) (((x) >> BIT_SHIFT_WMAC_ARB_SW_STATE_8821C) & BIT_MASK_WMAC_ARB_SW_STATE_8821C)

+#define BIT_GET_WMAC_ARB_SW_STATE_8821C(x) (((x) >> BIT_SHIFT_WMAC_ARB_SW_STATE_8821C) & BIT_MASK_WMAC_ARB_SW_STATE_8821C)
+
 
 
 /* 2 REG_WMAC_MU_OPTION_8821C */
@@ -9165,13 +10072,15 @@
 #define BIT_SHIFT_WMAC_MU_DBGSEL_8821C 5
 #define BIT_MASK_WMAC_MU_DBGSEL_8821C 0x3
 #define BIT_WMAC_MU_DBGSEL_8821C(x) (((x) & BIT_MASK_WMAC_MU_DBGSEL_8821C) << BIT_SHIFT_WMAC_MU_DBGSEL_8821C)
-#define BIT_GET_WMAC_MU_DBGSEL_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_DBGSEL_8821C) & BIT_MASK_WMAC_MU_DBGSEL_8821C)

+#define BIT_GET_WMAC_MU_DBGSEL_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_DBGSEL_8821C) & BIT_MASK_WMAC_MU_DBGSEL_8821C)
+
 
 
 #define BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8821C 0
 #define BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8821C 0x1f
 #define BIT_WMAC_MU_CPRD_TIMEOUT_8821C(x) (((x) & BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8821C) << BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8821C)
-#define BIT_GET_WMAC_MU_CPRD_TIMEOUT_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8821C) & BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8821C)

+#define BIT_GET_WMAC_MU_CPRD_TIMEOUT_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8821C) & BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8821C)
+
 
 
 /* 2 REG_WMAC_MU_BF_CTL_8821C */
@@ -9181,13 +10090,15 @@
 #define BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8821C 12
 #define BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8821C 0x3
 #define BIT_WMAC_MU_BFRPTSEG_SEL_8821C(x) (((x) & BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8821C) << BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8821C)
-#define BIT_GET_WMAC_MU_BFRPTSEG_SEL_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8821C) & BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8821C)

+#define BIT_GET_WMAC_MU_BFRPTSEG_SEL_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8821C) & BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8821C)
+
 
 
 #define BIT_SHIFT_WMAC_MU_BF_MYAID_8821C 0
 #define BIT_MASK_WMAC_MU_BF_MYAID_8821C 0xfff
 #define BIT_WMAC_MU_BF_MYAID_8821C(x) (((x) & BIT_MASK_WMAC_MU_BF_MYAID_8821C) << BIT_SHIFT_WMAC_MU_BF_MYAID_8821C)
-#define BIT_GET_WMAC_MU_BF_MYAID_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_BF_MYAID_8821C) & BIT_MASK_WMAC_MU_BF_MYAID_8821C)

+#define BIT_GET_WMAC_MU_BF_MYAID_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_BF_MYAID_8821C) & BIT_MASK_WMAC_MU_BF_MYAID_8821C)
+
 
 
 /* 2 REG_WMAC_MU_BIT_BFRPT_PARA_8821C */
@@ -9195,13 +10106,15 @@
 #define BIT_SHIFT_BFRPT_PARA_USERID_SEL_8821C 12
 #define BIT_MASK_BFRPT_PARA_USERID_SEL_8821C 0x7
 #define BIT_BFRPT_PARA_USERID_SEL_8821C(x) (((x) & BIT_MASK_BFRPT_PARA_USERID_SEL_8821C) << BIT_SHIFT_BFRPT_PARA_USERID_SEL_8821C)
-#define BIT_GET_BFRPT_PARA_USERID_SEL_8821C(x) (((x) >> BIT_SHIFT_BFRPT_PARA_USERID_SEL_8821C) & BIT_MASK_BFRPT_PARA_USERID_SEL_8821C)

+#define BIT_GET_BFRPT_PARA_USERID_SEL_8821C(x) (((x) >> BIT_SHIFT_BFRPT_PARA_USERID_SEL_8821C) & BIT_MASK_BFRPT_PARA_USERID_SEL_8821C)
+
 
 
 #define BIT_SHIFT_BFRPT_PARA_8821C 0
 #define BIT_MASK_BFRPT_PARA_8821C 0xfff
 #define BIT_BFRPT_PARA_8821C(x) (((x) & BIT_MASK_BFRPT_PARA_8821C) << BIT_SHIFT_BFRPT_PARA_8821C)
-#define BIT_GET_BFRPT_PARA_8821C(x) (((x) >> BIT_SHIFT_BFRPT_PARA_8821C) & BIT_MASK_BFRPT_PARA_8821C)

+#define BIT_GET_BFRPT_PARA_8821C(x) (((x) >> BIT_SHIFT_BFRPT_PARA_8821C) & BIT_MASK_BFRPT_PARA_8821C)
+
 
 
 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE2_8821C */
@@ -9211,7 +10124,8 @@
 #define BIT_SHIFT_WMAC_MU_BFEE2_AID_8821C 0
 #define BIT_MASK_WMAC_MU_BFEE2_AID_8821C 0x1ff
 #define BIT_WMAC_MU_BFEE2_AID_8821C(x) (((x) & BIT_MASK_WMAC_MU_BFEE2_AID_8821C) << BIT_SHIFT_WMAC_MU_BFEE2_AID_8821C)
-#define BIT_GET_WMAC_MU_BFEE2_AID_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE2_AID_8821C) & BIT_MASK_WMAC_MU_BFEE2_AID_8821C)

+#define BIT_GET_WMAC_MU_BFEE2_AID_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE2_AID_8821C) & BIT_MASK_WMAC_MU_BFEE2_AID_8821C)
+
 
 
 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE3_8821C */
@@ -9221,7 +10135,8 @@
 #define BIT_SHIFT_WMAC_MU_BFEE3_AID_8821C 0
 #define BIT_MASK_WMAC_MU_BFEE3_AID_8821C 0x1ff
 #define BIT_WMAC_MU_BFEE3_AID_8821C(x) (((x) & BIT_MASK_WMAC_MU_BFEE3_AID_8821C) << BIT_SHIFT_WMAC_MU_BFEE3_AID_8821C)
-#define BIT_GET_WMAC_MU_BFEE3_AID_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE3_AID_8821C) & BIT_MASK_WMAC_MU_BFEE3_AID_8821C)

+#define BIT_GET_WMAC_MU_BFEE3_AID_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE3_AID_8821C) & BIT_MASK_WMAC_MU_BFEE3_AID_8821C)
+
 
 
 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE4_8821C */
@@ -9231,7 +10146,8 @@
 #define BIT_SHIFT_WMAC_MU_BFEE4_AID_8821C 0
 #define BIT_MASK_WMAC_MU_BFEE4_AID_8821C 0x1ff
 #define BIT_WMAC_MU_BFEE4_AID_8821C(x) (((x) & BIT_MASK_WMAC_MU_BFEE4_AID_8821C) << BIT_SHIFT_WMAC_MU_BFEE4_AID_8821C)
-#define BIT_GET_WMAC_MU_BFEE4_AID_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE4_AID_8821C) & BIT_MASK_WMAC_MU_BFEE4_AID_8821C)

+#define BIT_GET_WMAC_MU_BFEE4_AID_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE4_AID_8821C) & BIT_MASK_WMAC_MU_BFEE4_AID_8821C)
+
 
 
 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE5_8821C */
@@ -9241,7 +10157,8 @@
 #define BIT_SHIFT_WMAC_MU_BFEE5_AID_8821C 0
 #define BIT_MASK_WMAC_MU_BFEE5_AID_8821C 0x1ff
 #define BIT_WMAC_MU_BFEE5_AID_8821C(x) (((x) & BIT_MASK_WMAC_MU_BFEE5_AID_8821C) << BIT_SHIFT_WMAC_MU_BFEE5_AID_8821C)
-#define BIT_GET_WMAC_MU_BFEE5_AID_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE5_AID_8821C) & BIT_MASK_WMAC_MU_BFEE5_AID_8821C)

+#define BIT_GET_WMAC_MU_BFEE5_AID_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE5_AID_8821C) & BIT_MASK_WMAC_MU_BFEE5_AID_8821C)
+
 
 
 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE6_8821C */
@@ -9251,7 +10168,8 @@
 #define BIT_SHIFT_WMAC_MU_BFEE6_AID_8821C 0
 #define BIT_MASK_WMAC_MU_BFEE6_AID_8821C 0x1ff
 #define BIT_WMAC_MU_BFEE6_AID_8821C(x) (((x) & BIT_MASK_WMAC_MU_BFEE6_AID_8821C) << BIT_SHIFT_WMAC_MU_BFEE6_AID_8821C)
-#define BIT_GET_WMAC_MU_BFEE6_AID_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE6_AID_8821C) & BIT_MASK_WMAC_MU_BFEE6_AID_8821C)

+#define BIT_GET_WMAC_MU_BFEE6_AID_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE6_AID_8821C) & BIT_MASK_WMAC_MU_BFEE6_AID_8821C)
+
 
 
 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE7_8821C */
@@ -9261,7 +10179,8 @@
 #define BIT_SHIFT_WMAC_MU_BFEE7_AID_8821C 0
 #define BIT_MASK_WMAC_MU_BFEE7_AID_8821C 0x1ff
 #define BIT_WMAC_MU_BFEE7_AID_8821C(x) (((x) & BIT_MASK_WMAC_MU_BFEE7_AID_8821C) << BIT_SHIFT_WMAC_MU_BFEE7_AID_8821C)
-#define BIT_GET_WMAC_MU_BFEE7_AID_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE7_AID_8821C) & BIT_MASK_WMAC_MU_BFEE7_AID_8821C)

+#define BIT_GET_WMAC_MU_BFEE7_AID_8821C(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE7_AID_8821C) & BIT_MASK_WMAC_MU_BFEE7_AID_8821C)
+
 
 
 /* 2 REG_WMAC_BB_STOP_RX_COUNTER_8821C */
@@ -9270,19 +10189,22 @@
 #define BIT_SHIFT_ABORT_RX_VBON_COUNTER_8821C 16
 #define BIT_MASK_ABORT_RX_VBON_COUNTER_8821C 0xff
 #define BIT_ABORT_RX_VBON_COUNTER_8821C(x) (((x) & BIT_MASK_ABORT_RX_VBON_COUNTER_8821C) << BIT_SHIFT_ABORT_RX_VBON_COUNTER_8821C)
-#define BIT_GET_ABORT_RX_VBON_COUNTER_8821C(x) (((x) >> BIT_SHIFT_ABORT_RX_VBON_COUNTER_8821C) & BIT_MASK_ABORT_RX_VBON_COUNTER_8821C)

+#define BIT_GET_ABORT_RX_VBON_COUNTER_8821C(x) (((x) >> BIT_SHIFT_ABORT_RX_VBON_COUNTER_8821C) & BIT_MASK_ABORT_RX_VBON_COUNTER_8821C)
+
 
 
 #define BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8821C 8
 #define BIT_MASK_ABORT_RX_RDRDY_COUNTER_8821C 0xff
 #define BIT_ABORT_RX_RDRDY_COUNTER_8821C(x) (((x) & BIT_MASK_ABORT_RX_RDRDY_COUNTER_8821C) << BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8821C)
-#define BIT_GET_ABORT_RX_RDRDY_COUNTER_8821C(x) (((x) >> BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8821C) & BIT_MASK_ABORT_RX_RDRDY_COUNTER_8821C)

+#define BIT_GET_ABORT_RX_RDRDY_COUNTER_8821C(x) (((x) >> BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8821C) & BIT_MASK_ABORT_RX_RDRDY_COUNTER_8821C)
+
 
 
 #define BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8821C 0
 #define BIT_MASK_VBON_EARLY_FALLING_COUNTER_8821C 0xff
 #define BIT_VBON_EARLY_FALLING_COUNTER_8821C(x) (((x) & BIT_MASK_VBON_EARLY_FALLING_COUNTER_8821C) << BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8821C)
-#define BIT_GET_VBON_EARLY_FALLING_COUNTER_8821C(x) (((x) >> BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8821C) & BIT_MASK_VBON_EARLY_FALLING_COUNTER_8821C)

+#define BIT_GET_VBON_EARLY_FALLING_COUNTER_8821C(x) (((x) >> BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8821C) & BIT_MASK_VBON_EARLY_FALLING_COUNTER_8821C)
+
 
 
 /* 2 REG_WMAC_PLCP_MONITOR_8821C */
@@ -9291,19 +10213,22 @@
 #define BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8821C 28
 #define BIT_MASK_WMAC_PLCP_RDSIG_SEL_8821C 0x7
 #define BIT_WMAC_PLCP_RDSIG_SEL_8821C(x) (((x) & BIT_MASK_WMAC_PLCP_RDSIG_SEL_8821C) << BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8821C)
-#define BIT_GET_WMAC_PLCP_RDSIG_SEL_8821C(x) (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8821C) & BIT_MASK_WMAC_PLCP_RDSIG_SEL_8821C)

+#define BIT_GET_WMAC_PLCP_RDSIG_SEL_8821C(x) (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8821C) & BIT_MASK_WMAC_PLCP_RDSIG_SEL_8821C)
+
 
 
 #define BIT_SHIFT_WMAC_RATE_IDX_8821C 24
 #define BIT_MASK_WMAC_RATE_IDX_8821C 0xf
 #define BIT_WMAC_RATE_IDX_8821C(x) (((x) & BIT_MASK_WMAC_RATE_IDX_8821C) << BIT_SHIFT_WMAC_RATE_IDX_8821C)
-#define BIT_GET_WMAC_RATE_IDX_8821C(x) (((x) >> BIT_SHIFT_WMAC_RATE_IDX_8821C) & BIT_MASK_WMAC_RATE_IDX_8821C)

+#define BIT_GET_WMAC_RATE_IDX_8821C(x) (((x) >> BIT_SHIFT_WMAC_RATE_IDX_8821C) & BIT_MASK_WMAC_RATE_IDX_8821C)
+
 
 
 #define BIT_SHIFT_WMAC_PLCP_RDSIG_8821C 0
 #define BIT_MASK_WMAC_PLCP_RDSIG_8821C 0xffffff
 #define BIT_WMAC_PLCP_RDSIG_8821C(x) (((x) & BIT_MASK_WMAC_PLCP_RDSIG_8821C) << BIT_SHIFT_WMAC_PLCP_RDSIG_8821C)
-#define BIT_GET_WMAC_PLCP_RDSIG_8821C(x) (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_8821C) & BIT_MASK_WMAC_PLCP_RDSIG_8821C)

+#define BIT_GET_WMAC_PLCP_RDSIG_8821C(x) (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_8821C) & BIT_MASK_WMAC_PLCP_RDSIG_8821C)
+
 
 
 /* 2 REG_WMAC_PLCP_MONITOR_MUTX_8821C */
@@ -9312,7 +10237,8 @@
 #define BIT_SHIFT_WMAC_PLCP_RDSIG_8821C 0
 #define BIT_MASK_WMAC_PLCP_RDSIG_8821C 0xffffff
 #define BIT_WMAC_PLCP_RDSIG_8821C(x) (((x) & BIT_MASK_WMAC_PLCP_RDSIG_8821C) << BIT_SHIFT_WMAC_PLCP_RDSIG_8821C)
-#define BIT_GET_WMAC_PLCP_RDSIG_8821C(x) (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_8821C) & BIT_MASK_WMAC_PLCP_RDSIG_8821C)

+#define BIT_GET_WMAC_PLCP_RDSIG_8821C(x) (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_8821C) & BIT_MASK_WMAC_PLCP_RDSIG_8821C)
+
 
 
 /* 2 REG_TRANSMIT_ADDRSS_0_8821C (TA0 REGISTER) */
@@ -9320,7 +10246,8 @@
 #define BIT_SHIFT_TA0_8821C 0
 #define BIT_MASK_TA0_8821C 0xffffffffffffL
 #define BIT_TA0_8821C(x) (((x) & BIT_MASK_TA0_8821C) << BIT_SHIFT_TA0_8821C)
-#define BIT_GET_TA0_8821C(x) (((x) >> BIT_SHIFT_TA0_8821C) & BIT_MASK_TA0_8821C)

+#define BIT_GET_TA0_8821C(x) (((x) >> BIT_SHIFT_TA0_8821C) & BIT_MASK_TA0_8821C)
+
 
 
 /* 2 REG_TRANSMIT_ADDRSS_1_8821C (TA1 REGISTER) */
@@ -9328,7 +10255,8 @@
 #define BIT_SHIFT_TA1_8821C 0
 #define BIT_MASK_TA1_8821C 0xffffffffffffL
 #define BIT_TA1_8821C(x) (((x) & BIT_MASK_TA1_8821C) << BIT_SHIFT_TA1_8821C)
-#define BIT_GET_TA1_8821C(x) (((x) >> BIT_SHIFT_TA1_8821C) & BIT_MASK_TA1_8821C)

+#define BIT_GET_TA1_8821C(x) (((x) >> BIT_SHIFT_TA1_8821C) & BIT_MASK_TA1_8821C)
+
 
 
 /* 2 REG_TRANSMIT_ADDRSS_2_8821C (TA2 REGISTER) */
@@ -9336,7 +10264,8 @@
 #define BIT_SHIFT_TA2_8821C 0
 #define BIT_MASK_TA2_8821C 0xffffffffffffL
 #define BIT_TA2_8821C(x) (((x) & BIT_MASK_TA2_8821C) << BIT_SHIFT_TA2_8821C)
-#define BIT_GET_TA2_8821C(x) (((x) >> BIT_SHIFT_TA2_8821C) & BIT_MASK_TA2_8821C)

+#define BIT_GET_TA2_8821C(x) (((x) >> BIT_SHIFT_TA2_8821C) & BIT_MASK_TA2_8821C)
+
 
 
 /* 2 REG_TRANSMIT_ADDRSS_3_8821C (TA3 REGISTER) */
@@ -9344,7 +10273,8 @@
 #define BIT_SHIFT_TA3_8821C 0
 #define BIT_MASK_TA3_8821C 0xffffffffffffL
 #define BIT_TA3_8821C(x) (((x) & BIT_MASK_TA3_8821C) << BIT_SHIFT_TA3_8821C)
-#define BIT_GET_TA3_8821C(x) (((x) >> BIT_SHIFT_TA3_8821C) & BIT_MASK_TA3_8821C)

+#define BIT_GET_TA3_8821C(x) (((x) >> BIT_SHIFT_TA3_8821C) & BIT_MASK_TA3_8821C)
+
 
 
 /* 2 REG_TRANSMIT_ADDRSS_4_8821C (TA4 REGISTER) */
@@ -9352,7 +10282,8 @@
 #define BIT_SHIFT_TA4_8821C 0
 #define BIT_MASK_TA4_8821C 0xffffffffffffL
 #define BIT_TA4_8821C(x) (((x) & BIT_MASK_TA4_8821C) << BIT_SHIFT_TA4_8821C)
-#define BIT_GET_TA4_8821C(x) (((x) >> BIT_SHIFT_TA4_8821C) & BIT_MASK_TA4_8821C)

+#define BIT_GET_TA4_8821C(x) (((x) >> BIT_SHIFT_TA4_8821C) & BIT_MASK_TA4_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -9362,7 +10293,8 @@
 #define BIT_SHIFT_MACID1_0_8821C 0
 #define BIT_MASK_MACID1_0_8821C 0xffffffffL
 #define BIT_MACID1_0_8821C(x) (((x) & BIT_MASK_MACID1_0_8821C) << BIT_SHIFT_MACID1_0_8821C)
-#define BIT_GET_MACID1_0_8821C(x) (((x) >> BIT_SHIFT_MACID1_0_8821C) & BIT_MASK_MACID1_0_8821C)

+#define BIT_GET_MACID1_0_8821C(x) (((x) >> BIT_SHIFT_MACID1_0_8821C) & BIT_MASK_MACID1_0_8821C)
+
 
 
 /* 2 REG_MACID1_1_8821C */
@@ -9370,7 +10302,8 @@
 #define BIT_SHIFT_MACID1_1_8821C 0
 #define BIT_MASK_MACID1_1_8821C 0xffff
 #define BIT_MACID1_1_8821C(x) (((x) & BIT_MASK_MACID1_1_8821C) << BIT_SHIFT_MACID1_1_8821C)
-#define BIT_GET_MACID1_1_8821C(x) (((x) >> BIT_SHIFT_MACID1_1_8821C) & BIT_MASK_MACID1_1_8821C)

+#define BIT_GET_MACID1_1_8821C(x) (((x) >> BIT_SHIFT_MACID1_1_8821C) & BIT_MASK_MACID1_1_8821C)
+
 
 
 /* 2 REG_BSSID1_8821C */
@@ -9378,7 +10311,8 @@
 #define BIT_SHIFT_BSSID1_0_8821C 0
 #define BIT_MASK_BSSID1_0_8821C 0xffffffffL
 #define BIT_BSSID1_0_8821C(x) (((x) & BIT_MASK_BSSID1_0_8821C) << BIT_SHIFT_BSSID1_0_8821C)
-#define BIT_GET_BSSID1_0_8821C(x) (((x) >> BIT_SHIFT_BSSID1_0_8821C) & BIT_MASK_BSSID1_0_8821C)

+#define BIT_GET_BSSID1_0_8821C(x) (((x) >> BIT_SHIFT_BSSID1_0_8821C) & BIT_MASK_BSSID1_0_8821C)
+
 
 
 /* 2 REG_BSSID1_1_8821C */
@@ -9386,7 +10320,8 @@
 #define BIT_SHIFT_BSSID1_1_8821C 0
 #define BIT_MASK_BSSID1_1_8821C 0xffff
 #define BIT_BSSID1_1_8821C(x) (((x) & BIT_MASK_BSSID1_1_8821C) << BIT_SHIFT_BSSID1_1_8821C)
-#define BIT_GET_BSSID1_1_8821C(x) (((x) >> BIT_SHIFT_BSSID1_1_8821C) & BIT_MASK_BSSID1_1_8821C)

+#define BIT_GET_BSSID1_1_8821C(x) (((x) >> BIT_SHIFT_BSSID1_1_8821C) & BIT_MASK_BSSID1_1_8821C)
+
 
 
 /* 2 REG_BCN_PSR_RPT1_8821C */
@@ -9394,13 +10329,15 @@
 #define BIT_SHIFT_DTIM_CNT1_8821C 24
 #define BIT_MASK_DTIM_CNT1_8821C 0xff
 #define BIT_DTIM_CNT1_8821C(x) (((x) & BIT_MASK_DTIM_CNT1_8821C) << BIT_SHIFT_DTIM_CNT1_8821C)
-#define BIT_GET_DTIM_CNT1_8821C(x) (((x) >> BIT_SHIFT_DTIM_CNT1_8821C) & BIT_MASK_DTIM_CNT1_8821C)

+#define BIT_GET_DTIM_CNT1_8821C(x) (((x) >> BIT_SHIFT_DTIM_CNT1_8821C) & BIT_MASK_DTIM_CNT1_8821C)
+
 
 
 #define BIT_SHIFT_DTIM_PERIOD1_8821C 16
 #define BIT_MASK_DTIM_PERIOD1_8821C 0xff
 #define BIT_DTIM_PERIOD1_8821C(x) (((x) & BIT_MASK_DTIM_PERIOD1_8821C) << BIT_SHIFT_DTIM_PERIOD1_8821C)
-#define BIT_GET_DTIM_PERIOD1_8821C(x) (((x) >> BIT_SHIFT_DTIM_PERIOD1_8821C) & BIT_MASK_DTIM_PERIOD1_8821C)

+#define BIT_GET_DTIM_PERIOD1_8821C(x) (((x) >> BIT_SHIFT_DTIM_PERIOD1_8821C) & BIT_MASK_DTIM_PERIOD1_8821C)
+
 
 #define BIT_DTIM1_8821C BIT(15)
 #define BIT_TIM1_8821C BIT(14)
@@ -9408,7 +10345,8 @@
 #define BIT_SHIFT_PS_AID_1_8821C 0
 #define BIT_MASK_PS_AID_1_8821C 0x7ff
 #define BIT_PS_AID_1_8821C(x) (((x) & BIT_MASK_PS_AID_1_8821C) << BIT_SHIFT_PS_AID_1_8821C)
-#define BIT_GET_PS_AID_1_8821C(x) (((x) >> BIT_SHIFT_PS_AID_1_8821C) & BIT_MASK_PS_AID_1_8821C)

+#define BIT_GET_PS_AID_1_8821C(x) (((x) >> BIT_SHIFT_PS_AID_1_8821C) & BIT_MASK_PS_AID_1_8821C)
+
 
 
 /* 2 REG_ASSOCIATED_BFMEE_SEL_8821C */
@@ -9417,14 +10355,16 @@
 #define BIT_SHIFT_AID1_8821C 16
 #define BIT_MASK_AID1_8821C 0x1ff
 #define BIT_AID1_8821C(x) (((x) & BIT_MASK_AID1_8821C) << BIT_SHIFT_AID1_8821C)
-#define BIT_GET_AID1_8821C(x) (((x) >> BIT_SHIFT_AID1_8821C) & BIT_MASK_AID1_8821C)

+#define BIT_GET_AID1_8821C(x) (((x) >> BIT_SHIFT_AID1_8821C) & BIT_MASK_AID1_8821C)
+
 
 #define BIT_TXUSER_ID0_8821C BIT(9)
 
 #define BIT_SHIFT_AID0_8821C 0
 #define BIT_MASK_AID0_8821C 0x1ff
 #define BIT_AID0_8821C(x) (((x) & BIT_MASK_AID0_8821C) << BIT_SHIFT_AID0_8821C)
-#define BIT_GET_AID0_8821C(x) (((x) >> BIT_SHIFT_AID0_8821C) & BIT_MASK_AID0_8821C)

+#define BIT_GET_AID0_8821C(x) (((x) >> BIT_SHIFT_AID0_8821C) & BIT_MASK_AID0_8821C)
+
 
 
 /* 2 REG_SND_PTCL_CTRL_8821C */
@@ -9432,19 +10372,22 @@
 #define BIT_SHIFT_NDP_RX_STANDBY_TIMER_8821C 24
 #define BIT_MASK_NDP_RX_STANDBY_TIMER_8821C 0xff
 #define BIT_NDP_RX_STANDBY_TIMER_8821C(x) (((x) & BIT_MASK_NDP_RX_STANDBY_TIMER_8821C) << BIT_SHIFT_NDP_RX_STANDBY_TIMER_8821C)
-#define BIT_GET_NDP_RX_STANDBY_TIMER_8821C(x) (((x) >> BIT_SHIFT_NDP_RX_STANDBY_TIMER_8821C) & BIT_MASK_NDP_RX_STANDBY_TIMER_8821C)

+#define BIT_GET_NDP_RX_STANDBY_TIMER_8821C(x) (((x) >> BIT_SHIFT_NDP_RX_STANDBY_TIMER_8821C) & BIT_MASK_NDP_RX_STANDBY_TIMER_8821C)
+
 
 
 #define BIT_SHIFT_CSI_RPT_OFFSET_HT_8821C 16
 #define BIT_MASK_CSI_RPT_OFFSET_HT_8821C 0xff
 #define BIT_CSI_RPT_OFFSET_HT_8821C(x) (((x) & BIT_MASK_CSI_RPT_OFFSET_HT_8821C) << BIT_SHIFT_CSI_RPT_OFFSET_HT_8821C)
-#define BIT_GET_CSI_RPT_OFFSET_HT_8821C(x) (((x) >> BIT_SHIFT_CSI_RPT_OFFSET_HT_8821C) & BIT_MASK_CSI_RPT_OFFSET_HT_8821C)

+#define BIT_GET_CSI_RPT_OFFSET_HT_8821C(x) (((x) >> BIT_SHIFT_CSI_RPT_OFFSET_HT_8821C) & BIT_MASK_CSI_RPT_OFFSET_HT_8821C)
+
 
 
 #define BIT_SHIFT_R_WMAC_VHT_CATEGORY_8821C 8
 #define BIT_MASK_R_WMAC_VHT_CATEGORY_8821C 0xff
 #define BIT_R_WMAC_VHT_CATEGORY_8821C(x) (((x) & BIT_MASK_R_WMAC_VHT_CATEGORY_8821C) << BIT_SHIFT_R_WMAC_VHT_CATEGORY_8821C)
-#define BIT_GET_R_WMAC_VHT_CATEGORY_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_VHT_CATEGORY_8821C) & BIT_MASK_R_WMAC_VHT_CATEGORY_8821C)

+#define BIT_GET_R_WMAC_VHT_CATEGORY_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_VHT_CATEGORY_8821C) & BIT_MASK_R_WMAC_VHT_CATEGORY_8821C)
+
 
 #define BIT_R_WMAC_USE_NSTS_8821C BIT(7)
 #define BIT_R_DISABLE_CHECK_VHTSIGB_CRC_8821C BIT(6)
@@ -9465,19 +10408,22 @@
 #define BIT_SHIFT_R_WMAC_NSARP_MODEN_8821C 6
 #define BIT_MASK_R_WMAC_NSARP_MODEN_8821C 0x3
 #define BIT_R_WMAC_NSARP_MODEN_8821C(x) (((x) & BIT_MASK_R_WMAC_NSARP_MODEN_8821C) << BIT_SHIFT_R_WMAC_NSARP_MODEN_8821C)
-#define BIT_GET_R_WMAC_NSARP_MODEN_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_MODEN_8821C) & BIT_MASK_R_WMAC_NSARP_MODEN_8821C)

+#define BIT_GET_R_WMAC_NSARP_MODEN_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_MODEN_8821C) & BIT_MASK_R_WMAC_NSARP_MODEN_8821C)
+
 
 
 #define BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8821C 4
 #define BIT_MASK_R_WMAC_NSARP_RSPFTP_8821C 0x3
 #define BIT_R_WMAC_NSARP_RSPFTP_8821C(x) (((x) & BIT_MASK_R_WMAC_NSARP_RSPFTP_8821C) << BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8821C)
-#define BIT_GET_R_WMAC_NSARP_RSPFTP_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8821C) & BIT_MASK_R_WMAC_NSARP_RSPFTP_8821C)

+#define BIT_GET_R_WMAC_NSARP_RSPFTP_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8821C) & BIT_MASK_R_WMAC_NSARP_RSPFTP_8821C)
+
 
 
 #define BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8821C 0
 #define BIT_MASK_R_WMAC_NSARP_RSPSEC_8821C 0xf
 #define BIT_R_WMAC_NSARP_RSPSEC_8821C(x) (((x) & BIT_MASK_R_WMAC_NSARP_RSPSEC_8821C) << BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8821C)
-#define BIT_GET_R_WMAC_NSARP_RSPSEC_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8821C) & BIT_MASK_R_WMAC_NSARP_RSPSEC_8821C)

+#define BIT_GET_R_WMAC_NSARP_RSPSEC_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8821C) & BIT_MASK_R_WMAC_NSARP_RSPSEC_8821C)
+
 
 
 /* 2 REG_NS_ARP_INFO_8821C */
@@ -9490,19 +10436,22 @@
 #define BIT_SHIFT_EXPRSP_SECTYPE_8821C 16
 #define BIT_MASK_EXPRSP_SECTYPE_8821C 0x7
 #define BIT_EXPRSP_SECTYPE_8821C(x) (((x) & BIT_MASK_EXPRSP_SECTYPE_8821C) << BIT_SHIFT_EXPRSP_SECTYPE_8821C)
-#define BIT_GET_EXPRSP_SECTYPE_8821C(x) (((x) >> BIT_SHIFT_EXPRSP_SECTYPE_8821C) & BIT_MASK_EXPRSP_SECTYPE_8821C)

+#define BIT_GET_EXPRSP_SECTYPE_8821C(x) (((x) >> BIT_SHIFT_EXPRSP_SECTYPE_8821C) & BIT_MASK_EXPRSP_SECTYPE_8821C)
+
 
 
 #define BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8821C 8
 #define BIT_MASK_EXPRSP_CHKSM_7_TO_0_8821C 0xff
 #define BIT_EXPRSP_CHKSM_7_TO_0_8821C(x) (((x) & BIT_MASK_EXPRSP_CHKSM_7_TO_0_8821C) << BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8821C)
-#define BIT_GET_EXPRSP_CHKSM_7_TO_0_8821C(x) (((x) >> BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8821C) & BIT_MASK_EXPRSP_CHKSM_7_TO_0_8821C)

+#define BIT_GET_EXPRSP_CHKSM_7_TO_0_8821C(x) (((x) >> BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8821C) & BIT_MASK_EXPRSP_CHKSM_7_TO_0_8821C)
+
 
 
 #define BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8821C 0
 #define BIT_MASK_EXPRSP_CHKSM_15_TO_8_8821C 0xff
 #define BIT_EXPRSP_CHKSM_15_TO_8_8821C(x) (((x) & BIT_MASK_EXPRSP_CHKSM_15_TO_8_8821C) << BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8821C)
-#define BIT_GET_EXPRSP_CHKSM_15_TO_8_8821C(x) (((x) >> BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8821C) & BIT_MASK_EXPRSP_CHKSM_15_TO_8_8821C)

+#define BIT_GET_EXPRSP_CHKSM_15_TO_8_8821C(x) (((x) >> BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8821C) & BIT_MASK_EXPRSP_CHKSM_15_TO_8_8821C)
+
 
 
 /* 2 REG_BEAMFORMING_INFO_NSARP_V1_8821C */
@@ -9510,7 +10459,8 @@
 #define BIT_SHIFT_WMAC_ARPIP_8821C 0
 #define BIT_MASK_WMAC_ARPIP_8821C 0xffffffffL
 #define BIT_WMAC_ARPIP_8821C(x) (((x) & BIT_MASK_WMAC_ARPIP_8821C) << BIT_SHIFT_WMAC_ARPIP_8821C)
-#define BIT_GET_WMAC_ARPIP_8821C(x) (((x) >> BIT_SHIFT_WMAC_ARPIP_8821C) & BIT_MASK_WMAC_ARPIP_8821C)

+#define BIT_GET_WMAC_ARPIP_8821C(x) (((x) >> BIT_SHIFT_WMAC_ARPIP_8821C) & BIT_MASK_WMAC_ARPIP_8821C)
+
 
 
 /* 2 REG_BEAMFORMING_INFO_NSARP_8821C */
@@ -9518,7 +10468,8 @@
 #define BIT_SHIFT_BEAMFORMING_INFO_8821C 0
 #define BIT_MASK_BEAMFORMING_INFO_8821C 0xffffffffL
 #define BIT_BEAMFORMING_INFO_8821C(x) (((x) & BIT_MASK_BEAMFORMING_INFO_8821C) << BIT_SHIFT_BEAMFORMING_INFO_8821C)
-#define BIT_GET_BEAMFORMING_INFO_8821C(x) (((x) >> BIT_SHIFT_BEAMFORMING_INFO_8821C) & BIT_MASK_BEAMFORMING_INFO_8821C)

+#define BIT_GET_BEAMFORMING_INFO_8821C(x) (((x) >> BIT_SHIFT_BEAMFORMING_INFO_8821C) & BIT_MASK_BEAMFORMING_INFO_8821C)
+
 
 
 /* 2 REG_IPV6_8821C */
@@ -9526,7 +10477,8 @@
 #define BIT_SHIFT_R_WMAC_IPV6_MYIPAD_0_8821C 0
 #define BIT_MASK_R_WMAC_IPV6_MYIPAD_0_8821C 0xffffffffL
 #define BIT_R_WMAC_IPV6_MYIPAD_0_8821C(x) (((x) & BIT_MASK_R_WMAC_IPV6_MYIPAD_0_8821C) << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_0_8821C)
-#define BIT_GET_R_WMAC_IPV6_MYIPAD_0_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_0_8821C) & BIT_MASK_R_WMAC_IPV6_MYIPAD_0_8821C)

+#define BIT_GET_R_WMAC_IPV6_MYIPAD_0_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_0_8821C) & BIT_MASK_R_WMAC_IPV6_MYIPAD_0_8821C)
+
 
 
 /* 2 REG_IPV6_1_8821C */
@@ -9534,7 +10486,8 @@
 #define BIT_SHIFT_R_WMAC_IPV6_MYIPAD_1_8821C 0
 #define BIT_MASK_R_WMAC_IPV6_MYIPAD_1_8821C 0xffffffffL
 #define BIT_R_WMAC_IPV6_MYIPAD_1_8821C(x) (((x) & BIT_MASK_R_WMAC_IPV6_MYIPAD_1_8821C) << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_1_8821C)
-#define BIT_GET_R_WMAC_IPV6_MYIPAD_1_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_1_8821C) & BIT_MASK_R_WMAC_IPV6_MYIPAD_1_8821C)

+#define BIT_GET_R_WMAC_IPV6_MYIPAD_1_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_1_8821C) & BIT_MASK_R_WMAC_IPV6_MYIPAD_1_8821C)
+
 
 
 /* 2 REG_IPV6_2_8821C */
@@ -9542,7 +10495,8 @@
 #define BIT_SHIFT_R_WMAC_IPV6_MYIPAD_2_8821C 0
 #define BIT_MASK_R_WMAC_IPV6_MYIPAD_2_8821C 0xffffffffL
 #define BIT_R_WMAC_IPV6_MYIPAD_2_8821C(x) (((x) & BIT_MASK_R_WMAC_IPV6_MYIPAD_2_8821C) << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_2_8821C)
-#define BIT_GET_R_WMAC_IPV6_MYIPAD_2_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_2_8821C) & BIT_MASK_R_WMAC_IPV6_MYIPAD_2_8821C)

+#define BIT_GET_R_WMAC_IPV6_MYIPAD_2_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_2_8821C) & BIT_MASK_R_WMAC_IPV6_MYIPAD_2_8821C)
+
 
 
 /* 2 REG_IPV6_3_8821C */
@@ -9550,7 +10504,8 @@
 #define BIT_SHIFT_R_WMAC_IPV6_MYIPAD_3_8821C 0
 #define BIT_MASK_R_WMAC_IPV6_MYIPAD_3_8821C 0xffffffffL
 #define BIT_R_WMAC_IPV6_MYIPAD_3_8821C(x) (((x) & BIT_MASK_R_WMAC_IPV6_MYIPAD_3_8821C) << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_3_8821C)
-#define BIT_GET_R_WMAC_IPV6_MYIPAD_3_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_3_8821C) & BIT_MASK_R_WMAC_IPV6_MYIPAD_3_8821C)

+#define BIT_GET_R_WMAC_IPV6_MYIPAD_3_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_3_8821C) & BIT_MASK_R_WMAC_IPV6_MYIPAD_3_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -9566,13 +10521,15 @@
 #define BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8821C 4
 #define BIT_MASK_R_WMAC_CTX_SUBTYPE_8821C 0xf
 #define BIT_R_WMAC_CTX_SUBTYPE_8821C(x) (((x) & BIT_MASK_R_WMAC_CTX_SUBTYPE_8821C) << BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8821C)
-#define BIT_GET_R_WMAC_CTX_SUBTYPE_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8821C) & BIT_MASK_R_WMAC_CTX_SUBTYPE_8821C)

+#define BIT_GET_R_WMAC_CTX_SUBTYPE_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8821C) & BIT_MASK_R_WMAC_CTX_SUBTYPE_8821C)
+
 
 
 #define BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8821C 0
 #define BIT_MASK_R_WMAC_RTX_SUBTYPE_8821C 0xf
 #define BIT_R_WMAC_RTX_SUBTYPE_8821C(x) (((x) & BIT_MASK_R_WMAC_RTX_SUBTYPE_8821C) << BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8821C)
-#define BIT_GET_R_WMAC_RTX_SUBTYPE_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8821C) & BIT_MASK_R_WMAC_RTX_SUBTYPE_8821C)

+#define BIT_GET_R_WMAC_RTX_SUBTYPE_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8821C) & BIT_MASK_R_WMAC_RTX_SUBTYPE_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -9590,7 +10547,8 @@
 #define BIT_SHIFT_TIMER_8821C 0
 #define BIT_MASK_TIMER_8821C 0xff
 #define BIT_TIMER_8821C(x) (((x) & BIT_MASK_TIMER_8821C) << BIT_SHIFT_TIMER_8821C)
-#define BIT_GET_TIMER_8821C(x) (((x) >> BIT_SHIFT_TIMER_8821C) & BIT_MASK_TIMER_8821C)

+#define BIT_GET_TIMER_8821C(x) (((x) >> BIT_SHIFT_TIMER_8821C) & BIT_MASK_TIMER_8821C)
+
 
 
 /* 2 REG_BT_COEX_8821C */
@@ -9603,7 +10561,8 @@
 #define BIT_SHIFT_R_BT_CNT_THR_8821C 0
 #define BIT_MASK_R_BT_CNT_THR_8821C 0xff
 #define BIT_R_BT_CNT_THR_8821C(x) (((x) & BIT_MASK_R_BT_CNT_THR_8821C) << BIT_SHIFT_R_BT_CNT_THR_8821C)
-#define BIT_GET_R_BT_CNT_THR_8821C(x) (((x) >> BIT_SHIFT_R_BT_CNT_THR_8821C) & BIT_MASK_R_BT_CNT_THR_8821C)

+#define BIT_GET_R_BT_CNT_THR_8821C(x) (((x) >> BIT_SHIFT_R_BT_CNT_THR_8821C) & BIT_MASK_R_BT_CNT_THR_8821C)
+
 
 
 /* 2 REG_WLAN_ACT_MASK_CTRL_8821C */
@@ -9611,13 +10570,15 @@
 #define BIT_SHIFT_RXMYRTS_NAV_V1_8821C 8
 #define BIT_MASK_RXMYRTS_NAV_V1_8821C 0xff
 #define BIT_RXMYRTS_NAV_V1_8821C(x) (((x) & BIT_MASK_RXMYRTS_NAV_V1_8821C) << BIT_SHIFT_RXMYRTS_NAV_V1_8821C)
-#define BIT_GET_RXMYRTS_NAV_V1_8821C(x) (((x) >> BIT_SHIFT_RXMYRTS_NAV_V1_8821C) & BIT_MASK_RXMYRTS_NAV_V1_8821C)

+#define BIT_GET_RXMYRTS_NAV_V1_8821C(x) (((x) >> BIT_SHIFT_RXMYRTS_NAV_V1_8821C) & BIT_MASK_RXMYRTS_NAV_V1_8821C)
+
 
 
 #define BIT_SHIFT_RTSRST_V1_8821C 0
 #define BIT_MASK_RTSRST_V1_8821C 0xff
 #define BIT_RTSRST_V1_8821C(x) (((x) & BIT_MASK_RTSRST_V1_8821C) << BIT_SHIFT_RTSRST_V1_8821C)
-#define BIT_GET_RTSRST_V1_8821C(x) (((x) >> BIT_SHIFT_RTSRST_V1_8821C) & BIT_MASK_RTSRST_V1_8821C)

+#define BIT_GET_RTSRST_V1_8821C(x) (((x) >> BIT_SHIFT_RTSRST_V1_8821C) & BIT_MASK_RTSRST_V1_8821C)
+
 
 
 /* 2 REG_WLAN_ACT_MASK_CTRL_1_8821C */
@@ -9634,19 +10595,22 @@
 #define BIT_SHIFT_BT_STAT_DELAY_8821C 12
 #define BIT_MASK_BT_STAT_DELAY_8821C 0xf
 #define BIT_BT_STAT_DELAY_8821C(x) (((x) & BIT_MASK_BT_STAT_DELAY_8821C) << BIT_SHIFT_BT_STAT_DELAY_8821C)
-#define BIT_GET_BT_STAT_DELAY_8821C(x) (((x) >> BIT_SHIFT_BT_STAT_DELAY_8821C) & BIT_MASK_BT_STAT_DELAY_8821C)

+#define BIT_GET_BT_STAT_DELAY_8821C(x) (((x) >> BIT_SHIFT_BT_STAT_DELAY_8821C) & BIT_MASK_BT_STAT_DELAY_8821C)
+
 
 
 #define BIT_SHIFT_BT_TRX_INIT_DETECT_8821C 8
 #define BIT_MASK_BT_TRX_INIT_DETECT_8821C 0xf
 #define BIT_BT_TRX_INIT_DETECT_8821C(x) (((x) & BIT_MASK_BT_TRX_INIT_DETECT_8821C) << BIT_SHIFT_BT_TRX_INIT_DETECT_8821C)
-#define BIT_GET_BT_TRX_INIT_DETECT_8821C(x) (((x) >> BIT_SHIFT_BT_TRX_INIT_DETECT_8821C) & BIT_MASK_BT_TRX_INIT_DETECT_8821C)

+#define BIT_GET_BT_TRX_INIT_DETECT_8821C(x) (((x) >> BIT_SHIFT_BT_TRX_INIT_DETECT_8821C) & BIT_MASK_BT_TRX_INIT_DETECT_8821C)
+
 
 
 #define BIT_SHIFT_BT_PRI_DETECT_TO_8821C 4
 #define BIT_MASK_BT_PRI_DETECT_TO_8821C 0xf
 #define BIT_BT_PRI_DETECT_TO_8821C(x) (((x) & BIT_MASK_BT_PRI_DETECT_TO_8821C) << BIT_SHIFT_BT_PRI_DETECT_TO_8821C)
-#define BIT_GET_BT_PRI_DETECT_TO_8821C(x) (((x) >> BIT_SHIFT_BT_PRI_DETECT_TO_8821C) & BIT_MASK_BT_PRI_DETECT_TO_8821C)

+#define BIT_GET_BT_PRI_DETECT_TO_8821C(x) (((x) >> BIT_SHIFT_BT_PRI_DETECT_TO_8821C) & BIT_MASK_BT_PRI_DETECT_TO_8821C)
+
 
 #define BIT_R_GRANTALL_WLMASK_8821C BIT(3)
 #define BIT_STATIS_BT_EN_8821C BIT(2)
@@ -9658,13 +10622,15 @@
 #define BIT_SHIFT_STATIS_BT_HI_RX_8821C 16
 #define BIT_MASK_STATIS_BT_HI_RX_8821C 0xffff
 #define BIT_STATIS_BT_HI_RX_8821C(x) (((x) & BIT_MASK_STATIS_BT_HI_RX_8821C) << BIT_SHIFT_STATIS_BT_HI_RX_8821C)
-#define BIT_GET_STATIS_BT_HI_RX_8821C(x) (((x) >> BIT_SHIFT_STATIS_BT_HI_RX_8821C) & BIT_MASK_STATIS_BT_HI_RX_8821C)

+#define BIT_GET_STATIS_BT_HI_RX_8821C(x) (((x) >> BIT_SHIFT_STATIS_BT_HI_RX_8821C) & BIT_MASK_STATIS_BT_HI_RX_8821C)
+
 
 
 #define BIT_SHIFT_STATIS_BT_HI_TX_8821C 0
 #define BIT_MASK_STATIS_BT_HI_TX_8821C 0xffff
 #define BIT_STATIS_BT_HI_TX_8821C(x) (((x) & BIT_MASK_STATIS_BT_HI_TX_8821C) << BIT_SHIFT_STATIS_BT_HI_TX_8821C)
-#define BIT_GET_STATIS_BT_HI_TX_8821C(x) (((x) >> BIT_SHIFT_STATIS_BT_HI_TX_8821C) & BIT_MASK_STATIS_BT_HI_TX_8821C)

+#define BIT_GET_STATIS_BT_HI_TX_8821C(x) (((x) >> BIT_SHIFT_STATIS_BT_HI_TX_8821C) & BIT_MASK_STATIS_BT_HI_TX_8821C)
+
 
 
 /* 2 REG_BT_ACT_STATISTICS_1_8821C */
@@ -9672,13 +10638,15 @@
 #define BIT_SHIFT_STATIS_BT_LO_RX_1_8821C 16
 #define BIT_MASK_STATIS_BT_LO_RX_1_8821C 0xffff
 #define BIT_STATIS_BT_LO_RX_1_8821C(x) (((x) & BIT_MASK_STATIS_BT_LO_RX_1_8821C) << BIT_SHIFT_STATIS_BT_LO_RX_1_8821C)
-#define BIT_GET_STATIS_BT_LO_RX_1_8821C(x) (((x) >> BIT_SHIFT_STATIS_BT_LO_RX_1_8821C) & BIT_MASK_STATIS_BT_LO_RX_1_8821C)

+#define BIT_GET_STATIS_BT_LO_RX_1_8821C(x) (((x) >> BIT_SHIFT_STATIS_BT_LO_RX_1_8821C) & BIT_MASK_STATIS_BT_LO_RX_1_8821C)
+
 
 
 #define BIT_SHIFT_STATIS_BT_LO_TX_1_8821C 0
 #define BIT_MASK_STATIS_BT_LO_TX_1_8821C 0xffff
 #define BIT_STATIS_BT_LO_TX_1_8821C(x) (((x) & BIT_MASK_STATIS_BT_LO_TX_1_8821C) << BIT_SHIFT_STATIS_BT_LO_TX_1_8821C)
-#define BIT_GET_STATIS_BT_LO_TX_1_8821C(x) (((x) >> BIT_SHIFT_STATIS_BT_LO_TX_1_8821C) & BIT_MASK_STATIS_BT_LO_TX_1_8821C)

+#define BIT_GET_STATIS_BT_LO_TX_1_8821C(x) (((x) >> BIT_SHIFT_STATIS_BT_LO_TX_1_8821C) & BIT_MASK_STATIS_BT_LO_TX_1_8821C)
+
 
 
 /* 2 REG_BT_STATISTICS_CONTROL_REGISTER_8821C */
@@ -9686,19 +10654,22 @@
 #define BIT_SHIFT_R_BT_CMD_RPT_8821C 16
 #define BIT_MASK_R_BT_CMD_RPT_8821C 0xffff
 #define BIT_R_BT_CMD_RPT_8821C(x) (((x) & BIT_MASK_R_BT_CMD_RPT_8821C) << BIT_SHIFT_R_BT_CMD_RPT_8821C)
-#define BIT_GET_R_BT_CMD_RPT_8821C(x) (((x) >> BIT_SHIFT_R_BT_CMD_RPT_8821C) & BIT_MASK_R_BT_CMD_RPT_8821C)

+#define BIT_GET_R_BT_CMD_RPT_8821C(x) (((x) >> BIT_SHIFT_R_BT_CMD_RPT_8821C) & BIT_MASK_R_BT_CMD_RPT_8821C)
+
 
 
 #define BIT_SHIFT_R_RPT_FROM_BT_8821C 8
 #define BIT_MASK_R_RPT_FROM_BT_8821C 0xff
 #define BIT_R_RPT_FROM_BT_8821C(x) (((x) & BIT_MASK_R_RPT_FROM_BT_8821C) << BIT_SHIFT_R_RPT_FROM_BT_8821C)
-#define BIT_GET_R_RPT_FROM_BT_8821C(x) (((x) >> BIT_SHIFT_R_RPT_FROM_BT_8821C) & BIT_MASK_R_RPT_FROM_BT_8821C)

+#define BIT_GET_R_RPT_FROM_BT_8821C(x) (((x) >> BIT_SHIFT_R_RPT_FROM_BT_8821C) & BIT_MASK_R_RPT_FROM_BT_8821C)
+
 
 
 #define BIT_SHIFT_BT_HID_ISR_SET_8821C 6
 #define BIT_MASK_BT_HID_ISR_SET_8821C 0x3
 #define BIT_BT_HID_ISR_SET_8821C(x) (((x) & BIT_MASK_BT_HID_ISR_SET_8821C) << BIT_SHIFT_BT_HID_ISR_SET_8821C)
-#define BIT_GET_BT_HID_ISR_SET_8821C(x) (((x) >> BIT_SHIFT_BT_HID_ISR_SET_8821C) & BIT_MASK_BT_HID_ISR_SET_8821C)

+#define BIT_GET_BT_HID_ISR_SET_8821C(x) (((x) >> BIT_SHIFT_BT_HID_ISR_SET_8821C) & BIT_MASK_BT_HID_ISR_SET_8821C)
+
 
 #define BIT_TDMA_BT_START_NOTIFY_8821C BIT(5)
 #define BIT_ENABLE_TDMA_FW_MODE_8821C BIT(4)
@@ -9712,25 +10683,29 @@
 #define BIT_SHIFT_BT_PROFILE_8821C 24
 #define BIT_MASK_BT_PROFILE_8821C 0xff
 #define BIT_BT_PROFILE_8821C(x) (((x) & BIT_MASK_BT_PROFILE_8821C) << BIT_SHIFT_BT_PROFILE_8821C)
-#define BIT_GET_BT_PROFILE_8821C(x) (((x) >> BIT_SHIFT_BT_PROFILE_8821C) & BIT_MASK_BT_PROFILE_8821C)

+#define BIT_GET_BT_PROFILE_8821C(x) (((x) >> BIT_SHIFT_BT_PROFILE_8821C) & BIT_MASK_BT_PROFILE_8821C)
+
 
 
 #define BIT_SHIFT_BT_POWER_8821C 16
 #define BIT_MASK_BT_POWER_8821C 0xff
 #define BIT_BT_POWER_8821C(x) (((x) & BIT_MASK_BT_POWER_8821C) << BIT_SHIFT_BT_POWER_8821C)
-#define BIT_GET_BT_POWER_8821C(x) (((x) >> BIT_SHIFT_BT_POWER_8821C) & BIT_MASK_BT_POWER_8821C)

+#define BIT_GET_BT_POWER_8821C(x) (((x) >> BIT_SHIFT_BT_POWER_8821C) & BIT_MASK_BT_POWER_8821C)
+
 
 
 #define BIT_SHIFT_BT_PREDECT_STATUS_8821C 8
 #define BIT_MASK_BT_PREDECT_STATUS_8821C 0xff
 #define BIT_BT_PREDECT_STATUS_8821C(x) (((x) & BIT_MASK_BT_PREDECT_STATUS_8821C) << BIT_SHIFT_BT_PREDECT_STATUS_8821C)
-#define BIT_GET_BT_PREDECT_STATUS_8821C(x) (((x) >> BIT_SHIFT_BT_PREDECT_STATUS_8821C) & BIT_MASK_BT_PREDECT_STATUS_8821C)

+#define BIT_GET_BT_PREDECT_STATUS_8821C(x) (((x) >> BIT_SHIFT_BT_PREDECT_STATUS_8821C) & BIT_MASK_BT_PREDECT_STATUS_8821C)
+
 
 
 #define BIT_SHIFT_BT_CMD_INFO_8821C 0
 #define BIT_MASK_BT_CMD_INFO_8821C 0xff
 #define BIT_BT_CMD_INFO_8821C(x) (((x) & BIT_MASK_BT_CMD_INFO_8821C) << BIT_SHIFT_BT_CMD_INFO_8821C)
-#define BIT_GET_BT_CMD_INFO_8821C(x) (((x) >> BIT_SHIFT_BT_CMD_INFO_8821C) & BIT_MASK_BT_CMD_INFO_8821C)

+#define BIT_GET_BT_CMD_INFO_8821C(x) (((x) >> BIT_SHIFT_BT_CMD_INFO_8821C) & BIT_MASK_BT_CMD_INFO_8821C)
+
 
 
 /* 2 REG_BT_INTERRUPT_CONTROL_REGISTER_8821C */
@@ -9746,19 +10721,22 @@
 #define BIT_SHIFT_WLAN_RPT_DATA_8821C 16
 #define BIT_MASK_WLAN_RPT_DATA_8821C 0xff
 #define BIT_WLAN_RPT_DATA_8821C(x) (((x) & BIT_MASK_WLAN_RPT_DATA_8821C) << BIT_SHIFT_WLAN_RPT_DATA_8821C)
-#define BIT_GET_WLAN_RPT_DATA_8821C(x) (((x) >> BIT_SHIFT_WLAN_RPT_DATA_8821C) & BIT_MASK_WLAN_RPT_DATA_8821C)

+#define BIT_GET_WLAN_RPT_DATA_8821C(x) (((x) >> BIT_SHIFT_WLAN_RPT_DATA_8821C) & BIT_MASK_WLAN_RPT_DATA_8821C)
+
 
 
 #define BIT_SHIFT_CMD_ID_8821C 8
 #define BIT_MASK_CMD_ID_8821C 0xff
 #define BIT_CMD_ID_8821C(x) (((x) & BIT_MASK_CMD_ID_8821C) << BIT_SHIFT_CMD_ID_8821C)
-#define BIT_GET_CMD_ID_8821C(x) (((x) >> BIT_SHIFT_CMD_ID_8821C) & BIT_MASK_CMD_ID_8821C)

+#define BIT_GET_CMD_ID_8821C(x) (((x) >> BIT_SHIFT_CMD_ID_8821C) & BIT_MASK_CMD_ID_8821C)
+
 
 
 #define BIT_SHIFT_BT_DATA_8821C 0
 #define BIT_MASK_BT_DATA_8821C 0xff
 #define BIT_BT_DATA_8821C(x) (((x) & BIT_MASK_BT_DATA_8821C) << BIT_SHIFT_BT_DATA_8821C)
-#define BIT_GET_BT_DATA_8821C(x) (((x) >> BIT_SHIFT_BT_DATA_8821C) & BIT_MASK_BT_DATA_8821C)

+#define BIT_GET_BT_DATA_8821C(x) (((x) >> BIT_SHIFT_BT_DATA_8821C) & BIT_MASK_BT_DATA_8821C)
+
 
 
 /* 2 REG_WLAN_REPORT_TIME_OUT_CONTROL_REGISTER_8821C */
@@ -9766,7 +10744,8 @@
 #define BIT_SHIFT_WLAN_RPT_TO_8821C 0
 #define BIT_MASK_WLAN_RPT_TO_8821C 0xff
 #define BIT_WLAN_RPT_TO_8821C(x) (((x) & BIT_MASK_WLAN_RPT_TO_8821C) << BIT_SHIFT_WLAN_RPT_TO_8821C)
-#define BIT_GET_WLAN_RPT_TO_8821C(x) (((x) >> BIT_SHIFT_WLAN_RPT_TO_8821C) & BIT_MASK_WLAN_RPT_TO_8821C)

+#define BIT_GET_WLAN_RPT_TO_8821C(x) (((x) >> BIT_SHIFT_WLAN_RPT_TO_8821C) & BIT_MASK_WLAN_RPT_TO_8821C)
+
 
 
 /* 2 REG_BT_ISOLATION_TABLE_REGISTER_REGISTER_8821C */
@@ -9774,7 +10753,8 @@
 #define BIT_SHIFT_ISOLATION_CHK_0_8821C 1
 #define BIT_MASK_ISOLATION_CHK_0_8821C 0x7fffff
 #define BIT_ISOLATION_CHK_0_8821C(x) (((x) & BIT_MASK_ISOLATION_CHK_0_8821C) << BIT_SHIFT_ISOLATION_CHK_0_8821C)
-#define BIT_GET_ISOLATION_CHK_0_8821C(x) (((x) >> BIT_SHIFT_ISOLATION_CHK_0_8821C) & BIT_MASK_ISOLATION_CHK_0_8821C)

+#define BIT_GET_ISOLATION_CHK_0_8821C(x) (((x) >> BIT_SHIFT_ISOLATION_CHK_0_8821C) & BIT_MASK_ISOLATION_CHK_0_8821C)
+
 
 #define BIT_ISOLATION_EN_8821C BIT(0)
 
@@ -9783,7 +10763,8 @@
 #define BIT_SHIFT_ISOLATION_CHK_1_8821C 0
 #define BIT_MASK_ISOLATION_CHK_1_8821C 0xffffffffL
 #define BIT_ISOLATION_CHK_1_8821C(x) (((x) & BIT_MASK_ISOLATION_CHK_1_8821C) << BIT_SHIFT_ISOLATION_CHK_1_8821C)
-#define BIT_GET_ISOLATION_CHK_1_8821C(x) (((x) >> BIT_SHIFT_ISOLATION_CHK_1_8821C) & BIT_MASK_ISOLATION_CHK_1_8821C)

+#define BIT_GET_ISOLATION_CHK_1_8821C(x) (((x) >> BIT_SHIFT_ISOLATION_CHK_1_8821C) & BIT_MASK_ISOLATION_CHK_1_8821C)
+
 
 
 /* 2 REG_BT_ISOLATION_TABLE_REGISTER_REGISTER_2_8821C */
@@ -9791,7 +10772,8 @@
 #define BIT_SHIFT_ISOLATION_CHK_2_8821C 0
 #define BIT_MASK_ISOLATION_CHK_2_8821C 0xffffff
 #define BIT_ISOLATION_CHK_2_8821C(x) (((x) & BIT_MASK_ISOLATION_CHK_2_8821C) << BIT_SHIFT_ISOLATION_CHK_2_8821C)
-#define BIT_GET_ISOLATION_CHK_2_8821C(x) (((x) >> BIT_SHIFT_ISOLATION_CHK_2_8821C) & BIT_MASK_ISOLATION_CHK_2_8821C)

+#define BIT_GET_ISOLATION_CHK_2_8821C(x) (((x) >> BIT_SHIFT_ISOLATION_CHK_2_8821C) & BIT_MASK_ISOLATION_CHK_2_8821C)
+
 
 
 /* 2 REG_BT_INTERRUPT_STATUS_REGISTER_8821C */
@@ -9809,13 +10791,15 @@
 #define BIT_SHIFT_BT_TIME_8821C 6
 #define BIT_MASK_BT_TIME_8821C 0x3ffffff
 #define BIT_BT_TIME_8821C(x) (((x) & BIT_MASK_BT_TIME_8821C) << BIT_SHIFT_BT_TIME_8821C)
-#define BIT_GET_BT_TIME_8821C(x) (((x) >> BIT_SHIFT_BT_TIME_8821C) & BIT_MASK_BT_TIME_8821C)

+#define BIT_GET_BT_TIME_8821C(x) (((x) >> BIT_SHIFT_BT_TIME_8821C) & BIT_MASK_BT_TIME_8821C)
+
 
 
 #define BIT_SHIFT_BT_RPT_SAMPLE_RATE_8821C 0
 #define BIT_MASK_BT_RPT_SAMPLE_RATE_8821C 0x3f
 #define BIT_BT_RPT_SAMPLE_RATE_8821C(x) (((x) & BIT_MASK_BT_RPT_SAMPLE_RATE_8821C) << BIT_SHIFT_BT_RPT_SAMPLE_RATE_8821C)
-#define BIT_GET_BT_RPT_SAMPLE_RATE_8821C(x) (((x) >> BIT_SHIFT_BT_RPT_SAMPLE_RATE_8821C) & BIT_MASK_BT_RPT_SAMPLE_RATE_8821C)

+#define BIT_GET_BT_RPT_SAMPLE_RATE_8821C(x) (((x) >> BIT_SHIFT_BT_RPT_SAMPLE_RATE_8821C) & BIT_MASK_BT_RPT_SAMPLE_RATE_8821C)
+
 
 
 /* 2 REG_BT_ACT_REGISTER_8821C */
@@ -9823,7 +10807,8 @@
 #define BIT_SHIFT_BT_EISR_EN_8821C 16
 #define BIT_MASK_BT_EISR_EN_8821C 0xff
 #define BIT_BT_EISR_EN_8821C(x) (((x) & BIT_MASK_BT_EISR_EN_8821C) << BIT_SHIFT_BT_EISR_EN_8821C)
-#define BIT_GET_BT_EISR_EN_8821C(x) (((x) >> BIT_SHIFT_BT_EISR_EN_8821C) & BIT_MASK_BT_EISR_EN_8821C)

+#define BIT_GET_BT_EISR_EN_8821C(x) (((x) >> BIT_SHIFT_BT_EISR_EN_8821C) & BIT_MASK_BT_EISR_EN_8821C)
+
 
 #define BIT_BT_ACT_FALLING_ISR_8821C BIT(10)
 #define BIT_BT_ACT_RISING_ISR_8821C BIT(9)
@@ -9832,7 +10817,8 @@
 #define BIT_SHIFT_BT_CH_8821C 0
 #define BIT_MASK_BT_CH_8821C 0xff
 #define BIT_BT_CH_8821C(x) (((x) & BIT_MASK_BT_CH_8821C) << BIT_SHIFT_BT_CH_8821C)
-#define BIT_GET_BT_CH_8821C(x) (((x) >> BIT_SHIFT_BT_CH_8821C) & BIT_MASK_BT_CH_8821C)

+#define BIT_GET_BT_CH_8821C(x) (((x) >> BIT_SHIFT_BT_CH_8821C) & BIT_MASK_BT_CH_8821C)
+
 
 
 /* 2 REG_OBFF_CTRL_BASIC_8821C */
@@ -9841,7 +10827,8 @@
 #define BIT_SHIFT_OBFF_STATE_V1_8821C 28
 #define BIT_MASK_OBFF_STATE_V1_8821C 0x3
 #define BIT_OBFF_STATE_V1_8821C(x) (((x) & BIT_MASK_OBFF_STATE_V1_8821C) << BIT_SHIFT_OBFF_STATE_V1_8821C)
-#define BIT_GET_OBFF_STATE_V1_8821C(x) (((x) >> BIT_SHIFT_OBFF_STATE_V1_8821C) & BIT_MASK_OBFF_STATE_V1_8821C)

+#define BIT_GET_OBFF_STATE_V1_8821C(x) (((x) >> BIT_SHIFT_OBFF_STATE_V1_8821C) & BIT_MASK_OBFF_STATE_V1_8821C)
+
 
 #define BIT_OBFF_ACT_RXDMA_EN_8821C BIT(27)
 #define BIT_OBFF_BLOCK_INT_EN_8821C BIT(26)
@@ -9851,25 +10838,29 @@
 #define BIT_SHIFT_WAKE_MAX_PLS_8821C 20
 #define BIT_MASK_WAKE_MAX_PLS_8821C 0x7
 #define BIT_WAKE_MAX_PLS_8821C(x) (((x) & BIT_MASK_WAKE_MAX_PLS_8821C) << BIT_SHIFT_WAKE_MAX_PLS_8821C)
-#define BIT_GET_WAKE_MAX_PLS_8821C(x) (((x) >> BIT_SHIFT_WAKE_MAX_PLS_8821C) & BIT_MASK_WAKE_MAX_PLS_8821C)

+#define BIT_GET_WAKE_MAX_PLS_8821C(x) (((x) >> BIT_SHIFT_WAKE_MAX_PLS_8821C) & BIT_MASK_WAKE_MAX_PLS_8821C)
+
 
 
 #define BIT_SHIFT_WAKE_MIN_PLS_8821C 16
 #define BIT_MASK_WAKE_MIN_PLS_8821C 0x7
 #define BIT_WAKE_MIN_PLS_8821C(x) (((x) & BIT_MASK_WAKE_MIN_PLS_8821C) << BIT_SHIFT_WAKE_MIN_PLS_8821C)
-#define BIT_GET_WAKE_MIN_PLS_8821C(x) (((x) >> BIT_SHIFT_WAKE_MIN_PLS_8821C) & BIT_MASK_WAKE_MIN_PLS_8821C)

+#define BIT_GET_WAKE_MIN_PLS_8821C(x) (((x) >> BIT_SHIFT_WAKE_MIN_PLS_8821C) & BIT_MASK_WAKE_MIN_PLS_8821C)
+
 
 
 #define BIT_SHIFT_WAKE_MAX_F2F_8821C 12
 #define BIT_MASK_WAKE_MAX_F2F_8821C 0x7
 #define BIT_WAKE_MAX_F2F_8821C(x) (((x) & BIT_MASK_WAKE_MAX_F2F_8821C) << BIT_SHIFT_WAKE_MAX_F2F_8821C)
-#define BIT_GET_WAKE_MAX_F2F_8821C(x) (((x) >> BIT_SHIFT_WAKE_MAX_F2F_8821C) & BIT_MASK_WAKE_MAX_F2F_8821C)

+#define BIT_GET_WAKE_MAX_F2F_8821C(x) (((x) >> BIT_SHIFT_WAKE_MAX_F2F_8821C) & BIT_MASK_WAKE_MAX_F2F_8821C)
+
 
 
 #define BIT_SHIFT_WAKE_MIN_F2F_8821C 8
 #define BIT_MASK_WAKE_MIN_F2F_8821C 0x7
 #define BIT_WAKE_MIN_F2F_8821C(x) (((x) & BIT_MASK_WAKE_MIN_F2F_8821C) << BIT_SHIFT_WAKE_MIN_F2F_8821C)
-#define BIT_GET_WAKE_MIN_F2F_8821C(x) (((x) >> BIT_SHIFT_WAKE_MIN_F2F_8821C) & BIT_MASK_WAKE_MIN_F2F_8821C)

+#define BIT_GET_WAKE_MIN_F2F_8821C(x) (((x) >> BIT_SHIFT_WAKE_MIN_F2F_8821C) & BIT_MASK_WAKE_MIN_F2F_8821C)
+
 
 #define BIT_APP_CPU_ACT_V1_8821C BIT(3)
 #define BIT_APP_OBFF_V1_8821C BIT(2)
@@ -9881,25 +10872,29 @@
 #define BIT_SHIFT_RX_HIGH_TIMER_IDX_8821C 24
 #define BIT_MASK_RX_HIGH_TIMER_IDX_8821C 0x7
 #define BIT_RX_HIGH_TIMER_IDX_8821C(x) (((x) & BIT_MASK_RX_HIGH_TIMER_IDX_8821C) << BIT_SHIFT_RX_HIGH_TIMER_IDX_8821C)
-#define BIT_GET_RX_HIGH_TIMER_IDX_8821C(x) (((x) >> BIT_SHIFT_RX_HIGH_TIMER_IDX_8821C) & BIT_MASK_RX_HIGH_TIMER_IDX_8821C)

+#define BIT_GET_RX_HIGH_TIMER_IDX_8821C(x) (((x) >> BIT_SHIFT_RX_HIGH_TIMER_IDX_8821C) & BIT_MASK_RX_HIGH_TIMER_IDX_8821C)
+
 
 
 #define BIT_SHIFT_RX_MED_TIMER_IDX_8821C 16
 #define BIT_MASK_RX_MED_TIMER_IDX_8821C 0x7
 #define BIT_RX_MED_TIMER_IDX_8821C(x) (((x) & BIT_MASK_RX_MED_TIMER_IDX_8821C) << BIT_SHIFT_RX_MED_TIMER_IDX_8821C)
-#define BIT_GET_RX_MED_TIMER_IDX_8821C(x) (((x) >> BIT_SHIFT_RX_MED_TIMER_IDX_8821C) & BIT_MASK_RX_MED_TIMER_IDX_8821C)

+#define BIT_GET_RX_MED_TIMER_IDX_8821C(x) (((x) >> BIT_SHIFT_RX_MED_TIMER_IDX_8821C) & BIT_MASK_RX_MED_TIMER_IDX_8821C)
+
 
 
 #define BIT_SHIFT_RX_LOW_TIMER_IDX_8821C 8
 #define BIT_MASK_RX_LOW_TIMER_IDX_8821C 0x7
 #define BIT_RX_LOW_TIMER_IDX_8821C(x) (((x) & BIT_MASK_RX_LOW_TIMER_IDX_8821C) << BIT_SHIFT_RX_LOW_TIMER_IDX_8821C)
-#define BIT_GET_RX_LOW_TIMER_IDX_8821C(x) (((x) >> BIT_SHIFT_RX_LOW_TIMER_IDX_8821C) & BIT_MASK_RX_LOW_TIMER_IDX_8821C)

+#define BIT_GET_RX_LOW_TIMER_IDX_8821C(x) (((x) >> BIT_SHIFT_RX_LOW_TIMER_IDX_8821C) & BIT_MASK_RX_LOW_TIMER_IDX_8821C)
+
 
 
 #define BIT_SHIFT_OBFF_INT_TIMER_IDX_8821C 0
 #define BIT_MASK_OBFF_INT_TIMER_IDX_8821C 0x7
 #define BIT_OBFF_INT_TIMER_IDX_8821C(x) (((x) & BIT_MASK_OBFF_INT_TIMER_IDX_8821C) << BIT_SHIFT_OBFF_INT_TIMER_IDX_8821C)
-#define BIT_GET_OBFF_INT_TIMER_IDX_8821C(x) (((x) >> BIT_SHIFT_OBFF_INT_TIMER_IDX_8821C) & BIT_MASK_OBFF_INT_TIMER_IDX_8821C)

+#define BIT_GET_OBFF_INT_TIMER_IDX_8821C(x) (((x) >> BIT_SHIFT_OBFF_INT_TIMER_IDX_8821C) & BIT_MASK_OBFF_INT_TIMER_IDX_8821C)
+
 
 
 /* 2 REG_LTR_CTRL_BASIC_8821C */
@@ -9917,31 +10912,36 @@
 #define BIT_SHIFT_HIGH_RATE_TRIG_SEL_8821C 20
 #define BIT_MASK_HIGH_RATE_TRIG_SEL_8821C 0x3
 #define BIT_HIGH_RATE_TRIG_SEL_8821C(x) (((x) & BIT_MASK_HIGH_RATE_TRIG_SEL_8821C) << BIT_SHIFT_HIGH_RATE_TRIG_SEL_8821C)
-#define BIT_GET_HIGH_RATE_TRIG_SEL_8821C(x) (((x) >> BIT_SHIFT_HIGH_RATE_TRIG_SEL_8821C) & BIT_MASK_HIGH_RATE_TRIG_SEL_8821C)

+#define BIT_GET_HIGH_RATE_TRIG_SEL_8821C(x) (((x) >> BIT_SHIFT_HIGH_RATE_TRIG_SEL_8821C) & BIT_MASK_HIGH_RATE_TRIG_SEL_8821C)
+
 
 
 #define BIT_SHIFT_MED_RATE_TRIG_SEL_8821C 18
 #define BIT_MASK_MED_RATE_TRIG_SEL_8821C 0x3
 #define BIT_MED_RATE_TRIG_SEL_8821C(x) (((x) & BIT_MASK_MED_RATE_TRIG_SEL_8821C) << BIT_SHIFT_MED_RATE_TRIG_SEL_8821C)
-#define BIT_GET_MED_RATE_TRIG_SEL_8821C(x) (((x) >> BIT_SHIFT_MED_RATE_TRIG_SEL_8821C) & BIT_MASK_MED_RATE_TRIG_SEL_8821C)

+#define BIT_GET_MED_RATE_TRIG_SEL_8821C(x) (((x) >> BIT_SHIFT_MED_RATE_TRIG_SEL_8821C) & BIT_MASK_MED_RATE_TRIG_SEL_8821C)
+
 
 
 #define BIT_SHIFT_LOW_RATE_TRIG_SEL_8821C 16
 #define BIT_MASK_LOW_RATE_TRIG_SEL_8821C 0x3
 #define BIT_LOW_RATE_TRIG_SEL_8821C(x) (((x) & BIT_MASK_LOW_RATE_TRIG_SEL_8821C) << BIT_SHIFT_LOW_RATE_TRIG_SEL_8821C)
-#define BIT_GET_LOW_RATE_TRIG_SEL_8821C(x) (((x) >> BIT_SHIFT_LOW_RATE_TRIG_SEL_8821C) & BIT_MASK_LOW_RATE_TRIG_SEL_8821C)

+#define BIT_GET_LOW_RATE_TRIG_SEL_8821C(x) (((x) >> BIT_SHIFT_LOW_RATE_TRIG_SEL_8821C) & BIT_MASK_LOW_RATE_TRIG_SEL_8821C)
+
 
 
 #define BIT_SHIFT_HIGH_RATE_BD_IDX_8821C 8
 #define BIT_MASK_HIGH_RATE_BD_IDX_8821C 0x7f
 #define BIT_HIGH_RATE_BD_IDX_8821C(x) (((x) & BIT_MASK_HIGH_RATE_BD_IDX_8821C) << BIT_SHIFT_HIGH_RATE_BD_IDX_8821C)
-#define BIT_GET_HIGH_RATE_BD_IDX_8821C(x) (((x) >> BIT_SHIFT_HIGH_RATE_BD_IDX_8821C) & BIT_MASK_HIGH_RATE_BD_IDX_8821C)

+#define BIT_GET_HIGH_RATE_BD_IDX_8821C(x) (((x) >> BIT_SHIFT_HIGH_RATE_BD_IDX_8821C) & BIT_MASK_HIGH_RATE_BD_IDX_8821C)
+
 
 
 #define BIT_SHIFT_LOW_RATE_BD_IDX_8821C 0
 #define BIT_MASK_LOW_RATE_BD_IDX_8821C 0x7f
 #define BIT_LOW_RATE_BD_IDX_8821C(x) (((x) & BIT_MASK_LOW_RATE_BD_IDX_8821C) << BIT_SHIFT_LOW_RATE_BD_IDX_8821C)
-#define BIT_GET_LOW_RATE_BD_IDX_8821C(x) (((x) >> BIT_SHIFT_LOW_RATE_BD_IDX_8821C) & BIT_MASK_LOW_RATE_BD_IDX_8821C)

+#define BIT_GET_LOW_RATE_BD_IDX_8821C(x) (((x) >> BIT_SHIFT_LOW_RATE_BD_IDX_8821C) & BIT_MASK_LOW_RATE_BD_IDX_8821C)
+
 
 
 /* 2 REG_LTR_CTRL2_TIMER_THRESHOLD_8821C */
@@ -9949,43 +10949,50 @@
 #define BIT_SHIFT_RX_EMPTY_TIMER_IDX_8821C 24
 #define BIT_MASK_RX_EMPTY_TIMER_IDX_8821C 0x7
 #define BIT_RX_EMPTY_TIMER_IDX_8821C(x) (((x) & BIT_MASK_RX_EMPTY_TIMER_IDX_8821C) << BIT_SHIFT_RX_EMPTY_TIMER_IDX_8821C)
-#define BIT_GET_RX_EMPTY_TIMER_IDX_8821C(x) (((x) >> BIT_SHIFT_RX_EMPTY_TIMER_IDX_8821C) & BIT_MASK_RX_EMPTY_TIMER_IDX_8821C)

+#define BIT_GET_RX_EMPTY_TIMER_IDX_8821C(x) (((x) >> BIT_SHIFT_RX_EMPTY_TIMER_IDX_8821C) & BIT_MASK_RX_EMPTY_TIMER_IDX_8821C)
+
 
 
 #define BIT_SHIFT_RX_AFULL_TH_IDX_8821C 20
 #define BIT_MASK_RX_AFULL_TH_IDX_8821C 0x7
 #define BIT_RX_AFULL_TH_IDX_8821C(x) (((x) & BIT_MASK_RX_AFULL_TH_IDX_8821C) << BIT_SHIFT_RX_AFULL_TH_IDX_8821C)
-#define BIT_GET_RX_AFULL_TH_IDX_8821C(x) (((x) >> BIT_SHIFT_RX_AFULL_TH_IDX_8821C) & BIT_MASK_RX_AFULL_TH_IDX_8821C)

+#define BIT_GET_RX_AFULL_TH_IDX_8821C(x) (((x) >> BIT_SHIFT_RX_AFULL_TH_IDX_8821C) & BIT_MASK_RX_AFULL_TH_IDX_8821C)
+
 
 
 #define BIT_SHIFT_RX_HIGH_TH_IDX_8821C 16
 #define BIT_MASK_RX_HIGH_TH_IDX_8821C 0x7
 #define BIT_RX_HIGH_TH_IDX_8821C(x) (((x) & BIT_MASK_RX_HIGH_TH_IDX_8821C) << BIT_SHIFT_RX_HIGH_TH_IDX_8821C)
-#define BIT_GET_RX_HIGH_TH_IDX_8821C(x) (((x) >> BIT_SHIFT_RX_HIGH_TH_IDX_8821C) & BIT_MASK_RX_HIGH_TH_IDX_8821C)

+#define BIT_GET_RX_HIGH_TH_IDX_8821C(x) (((x) >> BIT_SHIFT_RX_HIGH_TH_IDX_8821C) & BIT_MASK_RX_HIGH_TH_IDX_8821C)
+
 
 
 #define BIT_SHIFT_RX_MED_TH_IDX_8821C 12
 #define BIT_MASK_RX_MED_TH_IDX_8821C 0x7
 #define BIT_RX_MED_TH_IDX_8821C(x) (((x) & BIT_MASK_RX_MED_TH_IDX_8821C) << BIT_SHIFT_RX_MED_TH_IDX_8821C)
-#define BIT_GET_RX_MED_TH_IDX_8821C(x) (((x) >> BIT_SHIFT_RX_MED_TH_IDX_8821C) & BIT_MASK_RX_MED_TH_IDX_8821C)

+#define BIT_GET_RX_MED_TH_IDX_8821C(x) (((x) >> BIT_SHIFT_RX_MED_TH_IDX_8821C) & BIT_MASK_RX_MED_TH_IDX_8821C)
+
 
 
 #define BIT_SHIFT_RX_LOW_TH_IDX_8821C 8
 #define BIT_MASK_RX_LOW_TH_IDX_8821C 0x7
 #define BIT_RX_LOW_TH_IDX_8821C(x) (((x) & BIT_MASK_RX_LOW_TH_IDX_8821C) << BIT_SHIFT_RX_LOW_TH_IDX_8821C)
-#define BIT_GET_RX_LOW_TH_IDX_8821C(x) (((x) >> BIT_SHIFT_RX_LOW_TH_IDX_8821C) & BIT_MASK_RX_LOW_TH_IDX_8821C)

+#define BIT_GET_RX_LOW_TH_IDX_8821C(x) (((x) >> BIT_SHIFT_RX_LOW_TH_IDX_8821C) & BIT_MASK_RX_LOW_TH_IDX_8821C)
+
 
 
 #define BIT_SHIFT_LTR_SPACE_IDX_8821C 4
 #define BIT_MASK_LTR_SPACE_IDX_8821C 0x3
 #define BIT_LTR_SPACE_IDX_8821C(x) (((x) & BIT_MASK_LTR_SPACE_IDX_8821C) << BIT_SHIFT_LTR_SPACE_IDX_8821C)
-#define BIT_GET_LTR_SPACE_IDX_8821C(x) (((x) >> BIT_SHIFT_LTR_SPACE_IDX_8821C) & BIT_MASK_LTR_SPACE_IDX_8821C)

+#define BIT_GET_LTR_SPACE_IDX_8821C(x) (((x) >> BIT_SHIFT_LTR_SPACE_IDX_8821C) & BIT_MASK_LTR_SPACE_IDX_8821C)
+
 
 
 #define BIT_SHIFT_LTR_IDLE_TIMER_IDX_8821C 0
 #define BIT_MASK_LTR_IDLE_TIMER_IDX_8821C 0x7
 #define BIT_LTR_IDLE_TIMER_IDX_8821C(x) (((x) & BIT_MASK_LTR_IDLE_TIMER_IDX_8821C) << BIT_SHIFT_LTR_IDLE_TIMER_IDX_8821C)
-#define BIT_GET_LTR_IDLE_TIMER_IDX_8821C(x) (((x) >> BIT_SHIFT_LTR_IDLE_TIMER_IDX_8821C) & BIT_MASK_LTR_IDLE_TIMER_IDX_8821C)

+#define BIT_GET_LTR_IDLE_TIMER_IDX_8821C(x) (((x) >> BIT_SHIFT_LTR_IDLE_TIMER_IDX_8821C) & BIT_MASK_LTR_IDLE_TIMER_IDX_8821C)
+
 
 
 /* 2 REG_LTR_IDLE_LATENCY_V1_8821C */
@@ -9993,7 +11000,8 @@
 #define BIT_SHIFT_LTR_IDLE_L_8821C 0
 #define BIT_MASK_LTR_IDLE_L_8821C 0xffffffffL
 #define BIT_LTR_IDLE_L_8821C(x) (((x) & BIT_MASK_LTR_IDLE_L_8821C) << BIT_SHIFT_LTR_IDLE_L_8821C)
-#define BIT_GET_LTR_IDLE_L_8821C(x) (((x) >> BIT_SHIFT_LTR_IDLE_L_8821C) & BIT_MASK_LTR_IDLE_L_8821C)

+#define BIT_GET_LTR_IDLE_L_8821C(x) (((x) >> BIT_SHIFT_LTR_IDLE_L_8821C) & BIT_MASK_LTR_IDLE_L_8821C)
+
 
 
 /* 2 REG_LTR_ACTIVE_LATENCY_V1_8821C */
@@ -10001,7 +11009,8 @@
 #define BIT_SHIFT_LTR_ACT_L_8821C 0
 #define BIT_MASK_LTR_ACT_L_8821C 0xffffffffL
 #define BIT_LTR_ACT_L_8821C(x) (((x) & BIT_MASK_LTR_ACT_L_8821C) << BIT_SHIFT_LTR_ACT_L_8821C)
-#define BIT_GET_LTR_ACT_L_8821C(x) (((x) >> BIT_SHIFT_LTR_ACT_L_8821C) & BIT_MASK_LTR_ACT_L_8821C)

+#define BIT_GET_LTR_ACT_L_8821C(x) (((x) >> BIT_SHIFT_LTR_ACT_L_8821C) & BIT_MASK_LTR_ACT_L_8821C)
+
 
 
 /* 2 REG_ANTENNA_TRAINING_CONTROL_REGISTER_8821C */
@@ -10009,7 +11018,8 @@
 #define BIT_SHIFT_TRAIN_STA_ADDR_0_8821C 0
 #define BIT_MASK_TRAIN_STA_ADDR_0_8821C 0xffffffffL
 #define BIT_TRAIN_STA_ADDR_0_8821C(x) (((x) & BIT_MASK_TRAIN_STA_ADDR_0_8821C) << BIT_SHIFT_TRAIN_STA_ADDR_0_8821C)
-#define BIT_GET_TRAIN_STA_ADDR_0_8821C(x) (((x) >> BIT_SHIFT_TRAIN_STA_ADDR_0_8821C) & BIT_MASK_TRAIN_STA_ADDR_0_8821C)

+#define BIT_GET_TRAIN_STA_ADDR_0_8821C(x) (((x) >> BIT_SHIFT_TRAIN_STA_ADDR_0_8821C) & BIT_MASK_TRAIN_STA_ADDR_0_8821C)
+
 
 
 /* 2 REG_ANTENNA_TRAINING_CONTROL_REGISTER_1_8821C */
@@ -10020,7 +11030,8 @@
 #define BIT_SHIFT_TRAIN_STA_ADDR_1_8821C 0
 #define BIT_MASK_TRAIN_STA_ADDR_1_8821C 0xffff
 #define BIT_TRAIN_STA_ADDR_1_8821C(x) (((x) & BIT_MASK_TRAIN_STA_ADDR_1_8821C) << BIT_SHIFT_TRAIN_STA_ADDR_1_8821C)
-#define BIT_GET_TRAIN_STA_ADDR_1_8821C(x) (((x) >> BIT_SHIFT_TRAIN_STA_ADDR_1_8821C) & BIT_MASK_TRAIN_STA_ADDR_1_8821C)

+#define BIT_GET_TRAIN_STA_ADDR_1_8821C(x) (((x) >> BIT_SHIFT_TRAIN_STA_ADDR_1_8821C) & BIT_MASK_TRAIN_STA_ADDR_1_8821C)
+
 
 
 /* 2 REG_WMAC_PKTCNT_RWD_8821C */
@@ -10028,7 +11039,8 @@
 #define BIT_SHIFT_PKTCNT_BSSIDMAP_8821C 4
 #define BIT_MASK_PKTCNT_BSSIDMAP_8821C 0xf
 #define BIT_PKTCNT_BSSIDMAP_8821C(x) (((x) & BIT_MASK_PKTCNT_BSSIDMAP_8821C) << BIT_SHIFT_PKTCNT_BSSIDMAP_8821C)
-#define BIT_GET_PKTCNT_BSSIDMAP_8821C(x) (((x) >> BIT_SHIFT_PKTCNT_BSSIDMAP_8821C) & BIT_MASK_PKTCNT_BSSIDMAP_8821C)

+#define BIT_GET_PKTCNT_BSSIDMAP_8821C(x) (((x) >> BIT_SHIFT_PKTCNT_BSSIDMAP_8821C) & BIT_MASK_PKTCNT_BSSIDMAP_8821C)
+
 
 #define BIT_PKTCNT_CNTRST_8821C BIT(1)
 #define BIT_PKTCNT_CNTEN_8821C BIT(0)
@@ -10040,7 +11052,8 @@
 #define BIT_SHIFT_WMAC_PKTCNT_CFGAD_8821C 0
 #define BIT_MASK_WMAC_PKTCNT_CFGAD_8821C 0xff
 #define BIT_WMAC_PKTCNT_CFGAD_8821C(x) (((x) & BIT_MASK_WMAC_PKTCNT_CFGAD_8821C) << BIT_SHIFT_WMAC_PKTCNT_CFGAD_8821C)
-#define BIT_GET_WMAC_PKTCNT_CFGAD_8821C(x) (((x) >> BIT_SHIFT_WMAC_PKTCNT_CFGAD_8821C) & BIT_MASK_WMAC_PKTCNT_CFGAD_8821C)

+#define BIT_GET_WMAC_PKTCNT_CFGAD_8821C(x) (((x) >> BIT_SHIFT_WMAC_PKTCNT_CFGAD_8821C) & BIT_MASK_WMAC_PKTCNT_CFGAD_8821C)
+
 
 
 /* 2 REG_IQ_DUMP_8821C */
@@ -10048,26 +11061,30 @@
 #define BIT_SHIFT_DUMP_OK_ADDR_8821C 15
 #define BIT_MASK_DUMP_OK_ADDR_8821C 0x1ffff
 #define BIT_DUMP_OK_ADDR_8821C(x) (((x) & BIT_MASK_DUMP_OK_ADDR_8821C) << BIT_SHIFT_DUMP_OK_ADDR_8821C)
-#define BIT_GET_DUMP_OK_ADDR_8821C(x) (((x) >> BIT_SHIFT_DUMP_OK_ADDR_8821C) & BIT_MASK_DUMP_OK_ADDR_8821C)

+#define BIT_GET_DUMP_OK_ADDR_8821C(x) (((x) >> BIT_SHIFT_DUMP_OK_ADDR_8821C) & BIT_MASK_DUMP_OK_ADDR_8821C)
+
 
 
 #define BIT_SHIFT_R_TRIG_TIME_SEL_8821C 8
 #define BIT_MASK_R_TRIG_TIME_SEL_8821C 0x7f
 #define BIT_R_TRIG_TIME_SEL_8821C(x) (((x) & BIT_MASK_R_TRIG_TIME_SEL_8821C) << BIT_SHIFT_R_TRIG_TIME_SEL_8821C)
-#define BIT_GET_R_TRIG_TIME_SEL_8821C(x) (((x) >> BIT_SHIFT_R_TRIG_TIME_SEL_8821C) & BIT_MASK_R_TRIG_TIME_SEL_8821C)

+#define BIT_GET_R_TRIG_TIME_SEL_8821C(x) (((x) >> BIT_SHIFT_R_TRIG_TIME_SEL_8821C) & BIT_MASK_R_TRIG_TIME_SEL_8821C)
+
 
 
 #define BIT_SHIFT_R_MAC_TRIG_SEL_8821C 6
 #define BIT_MASK_R_MAC_TRIG_SEL_8821C 0x3
 #define BIT_R_MAC_TRIG_SEL_8821C(x) (((x) & BIT_MASK_R_MAC_TRIG_SEL_8821C) << BIT_SHIFT_R_MAC_TRIG_SEL_8821C)
-#define BIT_GET_R_MAC_TRIG_SEL_8821C(x) (((x) >> BIT_SHIFT_R_MAC_TRIG_SEL_8821C) & BIT_MASK_R_MAC_TRIG_SEL_8821C)

+#define BIT_GET_R_MAC_TRIG_SEL_8821C(x) (((x) >> BIT_SHIFT_R_MAC_TRIG_SEL_8821C) & BIT_MASK_R_MAC_TRIG_SEL_8821C)
+
 
 #define BIT_MAC_TRIG_REG_8821C BIT(5)
 
 #define BIT_SHIFT_R_LEVEL_PULSE_SEL_8821C 3
 #define BIT_MASK_R_LEVEL_PULSE_SEL_8821C 0x3
 #define BIT_R_LEVEL_PULSE_SEL_8821C(x) (((x) & BIT_MASK_R_LEVEL_PULSE_SEL_8821C) << BIT_SHIFT_R_LEVEL_PULSE_SEL_8821C)
-#define BIT_GET_R_LEVEL_PULSE_SEL_8821C(x) (((x) >> BIT_SHIFT_R_LEVEL_PULSE_SEL_8821C) & BIT_MASK_R_LEVEL_PULSE_SEL_8821C)

+#define BIT_GET_R_LEVEL_PULSE_SEL_8821C(x) (((x) >> BIT_SHIFT_R_LEVEL_PULSE_SEL_8821C) & BIT_MASK_R_LEVEL_PULSE_SEL_8821C)
+
 
 #define BIT_EN_LA_MAC_8821C BIT(2)
 #define BIT_R_EN_IQDUMP_8821C BIT(1)
@@ -10078,7 +11095,8 @@
 #define BIT_SHIFT_R_WMAC_MASK_LA_MAC_1_8821C 0
 #define BIT_MASK_R_WMAC_MASK_LA_MAC_1_8821C 0xffffffffL
 #define BIT_R_WMAC_MASK_LA_MAC_1_8821C(x) (((x) & BIT_MASK_R_WMAC_MASK_LA_MAC_1_8821C) << BIT_SHIFT_R_WMAC_MASK_LA_MAC_1_8821C)
-#define BIT_GET_R_WMAC_MASK_LA_MAC_1_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_MASK_LA_MAC_1_8821C) & BIT_MASK_R_WMAC_MASK_LA_MAC_1_8821C)

+#define BIT_GET_R_WMAC_MASK_LA_MAC_1_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_MASK_LA_MAC_1_8821C) & BIT_MASK_R_WMAC_MASK_LA_MAC_1_8821C)
+
 
 
 /* 2 REG_IQ_DUMP_2_8821C */
@@ -10086,7 +11104,8 @@
 #define BIT_SHIFT_R_WMAC_MATCH_REF_MAC_2_8821C 0
 #define BIT_MASK_R_WMAC_MATCH_REF_MAC_2_8821C 0xffffffffL
 #define BIT_R_WMAC_MATCH_REF_MAC_2_8821C(x) (((x) & BIT_MASK_R_WMAC_MATCH_REF_MAC_2_8821C) << BIT_SHIFT_R_WMAC_MATCH_REF_MAC_2_8821C)
-#define BIT_GET_R_WMAC_MATCH_REF_MAC_2_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_MATCH_REF_MAC_2_8821C) & BIT_MASK_R_WMAC_MATCH_REF_MAC_2_8821C)

+#define BIT_GET_R_WMAC_MATCH_REF_MAC_2_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_MATCH_REF_MAC_2_8821C) & BIT_MASK_R_WMAC_MATCH_REF_MAC_2_8821C)
+
 
 
 /* 2 REG_WMAC_FTM_CTL_8821C */
@@ -10104,13 +11123,15 @@
 #define BIT_SHIFT_R_OFDM_LEN_8821C 26
 #define BIT_MASK_R_OFDM_LEN_8821C 0x3f
 #define BIT_R_OFDM_LEN_8821C(x) (((x) & BIT_MASK_R_OFDM_LEN_8821C) << BIT_SHIFT_R_OFDM_LEN_8821C)
-#define BIT_GET_R_OFDM_LEN_8821C(x) (((x) >> BIT_SHIFT_R_OFDM_LEN_8821C) & BIT_MASK_R_OFDM_LEN_8821C)

+#define BIT_GET_R_OFDM_LEN_8821C(x) (((x) >> BIT_SHIFT_R_OFDM_LEN_8821C) & BIT_MASK_R_OFDM_LEN_8821C)
+
 
 
 #define BIT_SHIFT_R_CCK_LEN_8821C 0
 #define BIT_MASK_R_CCK_LEN_8821C 0xffff
 #define BIT_R_CCK_LEN_8821C(x) (((x) & BIT_MASK_R_CCK_LEN_8821C) << BIT_SHIFT_R_CCK_LEN_8821C)
-#define BIT_GET_R_CCK_LEN_8821C(x) (((x) >> BIT_SHIFT_R_CCK_LEN_8821C) & BIT_MASK_R_CCK_LEN_8821C)

+#define BIT_GET_R_CCK_LEN_8821C(x) (((x) >> BIT_SHIFT_R_CCK_LEN_8821C) & BIT_MASK_R_CCK_LEN_8821C)
+
 
 
 /* 2 REG_WMAC_OPTION_FUNCTION_1_8821C */
@@ -10118,7 +11139,8 @@
 #define BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_1_8821C 24
 #define BIT_MASK_R_WMAC_RXFIFO_FULL_TH_1_8821C 0xff
 #define BIT_R_WMAC_RXFIFO_FULL_TH_1_8821C(x) (((x) & BIT_MASK_R_WMAC_RXFIFO_FULL_TH_1_8821C) << BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_1_8821C)
-#define BIT_GET_R_WMAC_RXFIFO_FULL_TH_1_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_1_8821C) & BIT_MASK_R_WMAC_RXFIFO_FULL_TH_1_8821C)

+#define BIT_GET_R_WMAC_RXFIFO_FULL_TH_1_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_1_8821C) & BIT_MASK_R_WMAC_RXFIFO_FULL_TH_1_8821C)
+
 
 #define BIT_R_WMAC_RX_SYNCFIFO_SYNC_1_8821C BIT(23)
 #define BIT_R_WMAC_RXRST_DLY_1_8821C BIT(22)
@@ -10150,7 +11172,8 @@
 #define BIT_SHIFT_R_WMAC_RX_FIL_LEN_2_8821C 0
 #define BIT_MASK_R_WMAC_RX_FIL_LEN_2_8821C 0xffff
 #define BIT_R_WMAC_RX_FIL_LEN_2_8821C(x) (((x) & BIT_MASK_R_WMAC_RX_FIL_LEN_2_8821C) << BIT_SHIFT_R_WMAC_RX_FIL_LEN_2_8821C)
-#define BIT_GET_R_WMAC_RX_FIL_LEN_2_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_RX_FIL_LEN_2_8821C) & BIT_MASK_R_WMAC_RX_FIL_LEN_2_8821C)

+#define BIT_GET_R_WMAC_RX_FIL_LEN_2_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_RX_FIL_LEN_2_8821C) & BIT_MASK_R_WMAC_RX_FIL_LEN_2_8821C)
+
 
 
 /* 2 REG_RX_FILTER_FUNCTION_8821C */
@@ -10177,7 +11200,8 @@
 #define BIT_SHIFT_R_WMAC_TXNDP_SIGB_8821C 0
 #define BIT_MASK_R_WMAC_TXNDP_SIGB_8821C 0x1fffff
 #define BIT_R_WMAC_TXNDP_SIGB_8821C(x) (((x) & BIT_MASK_R_WMAC_TXNDP_SIGB_8821C) << BIT_SHIFT_R_WMAC_TXNDP_SIGB_8821C)
-#define BIT_GET_R_WMAC_TXNDP_SIGB_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_TXNDP_SIGB_8821C) & BIT_MASK_R_WMAC_TXNDP_SIGB_8821C)

+#define BIT_GET_R_WMAC_TXNDP_SIGB_8821C(x) (((x) >> BIT_SHIFT_R_WMAC_TXNDP_SIGB_8821C) & BIT_MASK_R_WMAC_TXNDP_SIGB_8821C)
+
 
 
 /* 2 REG_TXCMD_INFO_FOR_RSP_PKT_8821C */
@@ -10185,13 +11209,15 @@
 #define BIT_SHIFT_R_MAC_DBG_SHIFT_8821C 8
 #define BIT_MASK_R_MAC_DBG_SHIFT_8821C 0x7
 #define BIT_R_MAC_DBG_SHIFT_8821C(x) (((x) & BIT_MASK_R_MAC_DBG_SHIFT_8821C) << BIT_SHIFT_R_MAC_DBG_SHIFT_8821C)
-#define BIT_GET_R_MAC_DBG_SHIFT_8821C(x) (((x) >> BIT_SHIFT_R_MAC_DBG_SHIFT_8821C) & BIT_MASK_R_MAC_DBG_SHIFT_8821C)

+#define BIT_GET_R_MAC_DBG_SHIFT_8821C(x) (((x) >> BIT_SHIFT_R_MAC_DBG_SHIFT_8821C) & BIT_MASK_R_MAC_DBG_SHIFT_8821C)
+
 
 
 #define BIT_SHIFT_R_MAC_DBG_SEL_8821C 0
 #define BIT_MASK_R_MAC_DBG_SEL_8821C 0x3
 #define BIT_R_MAC_DBG_SEL_8821C(x) (((x) & BIT_MASK_R_MAC_DBG_SEL_8821C) << BIT_SHIFT_R_MAC_DBG_SEL_8821C)
-#define BIT_GET_R_MAC_DBG_SEL_8821C(x) (((x) >> BIT_SHIFT_R_MAC_DBG_SEL_8821C) & BIT_MASK_R_MAC_DBG_SEL_8821C)

+#define BIT_GET_R_MAC_DBG_SEL_8821C(x) (((x) >> BIT_SHIFT_R_MAC_DBG_SEL_8821C) & BIT_MASK_R_MAC_DBG_SEL_8821C)
+
 
 
 /* 2 REG_TXCMD_INFO_FOR_RSP_PKT_1_8821C */
@@ -10199,7 +11225,8 @@
 #define BIT_SHIFT_R_MAC_DEBUG_1_8821C 0
 #define BIT_MASK_R_MAC_DEBUG_1_8821C 0xffffffffL
 #define BIT_R_MAC_DEBUG_1_8821C(x) (((x) & BIT_MASK_R_MAC_DEBUG_1_8821C) << BIT_SHIFT_R_MAC_DEBUG_1_8821C)
-#define BIT_GET_R_MAC_DEBUG_1_8821C(x) (((x) >> BIT_SHIFT_R_MAC_DEBUG_1_8821C) & BIT_MASK_R_MAC_DEBUG_1_8821C)

+#define BIT_GET_R_MAC_DEBUG_1_8821C(x) (((x) >> BIT_SHIFT_R_MAC_DEBUG_1_8821C) & BIT_MASK_R_MAC_DEBUG_1_8821C)
+
 
 
 /* 2 REG_WSEC_OPTION_8821C */
@@ -10224,13 +11251,15 @@
 #define BIT_SHIFT_WRITE_BYTE_EN_V1_8821C 16
 #define BIT_MASK_WRITE_BYTE_EN_V1_8821C 0xf
 #define BIT_WRITE_BYTE_EN_V1_8821C(x) (((x) & BIT_MASK_WRITE_BYTE_EN_V1_8821C) << BIT_SHIFT_WRITE_BYTE_EN_V1_8821C)
-#define BIT_GET_WRITE_BYTE_EN_V1_8821C(x) (((x) >> BIT_SHIFT_WRITE_BYTE_EN_V1_8821C) & BIT_MASK_WRITE_BYTE_EN_V1_8821C)

+#define BIT_GET_WRITE_BYTE_EN_V1_8821C(x) (((x) >> BIT_SHIFT_WRITE_BYTE_EN_V1_8821C) & BIT_MASK_WRITE_BYTE_EN_V1_8821C)
+
 
 
 #define BIT_SHIFT_LTECOEX_REG_ADDR_V1_8821C 0
 #define BIT_MASK_LTECOEX_REG_ADDR_V1_8821C 0xffff
 #define BIT_LTECOEX_REG_ADDR_V1_8821C(x) (((x) & BIT_MASK_LTECOEX_REG_ADDR_V1_8821C) << BIT_SHIFT_LTECOEX_REG_ADDR_V1_8821C)
-#define BIT_GET_LTECOEX_REG_ADDR_V1_8821C(x) (((x) >> BIT_SHIFT_LTECOEX_REG_ADDR_V1_8821C) & BIT_MASK_LTECOEX_REG_ADDR_V1_8821C)

+#define BIT_GET_LTECOEX_REG_ADDR_V1_8821C(x) (((x) >> BIT_SHIFT_LTECOEX_REG_ADDR_V1_8821C) & BIT_MASK_LTECOEX_REG_ADDR_V1_8821C)
+
 
 
 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_WRITE_DATA_V1_8821C */
@@ -10238,7 +11267,8 @@
 #define BIT_SHIFT_LTECOEX_W_DATA_V1_8821C 0
 #define BIT_MASK_LTECOEX_W_DATA_V1_8821C 0xffffffffL
 #define BIT_LTECOEX_W_DATA_V1_8821C(x) (((x) & BIT_MASK_LTECOEX_W_DATA_V1_8821C) << BIT_SHIFT_LTECOEX_W_DATA_V1_8821C)
-#define BIT_GET_LTECOEX_W_DATA_V1_8821C(x) (((x) >> BIT_SHIFT_LTECOEX_W_DATA_V1_8821C) & BIT_MASK_LTECOEX_W_DATA_V1_8821C)

+#define BIT_GET_LTECOEX_W_DATA_V1_8821C(x) (((x) >> BIT_SHIFT_LTECOEX_W_DATA_V1_8821C) & BIT_MASK_LTECOEX_W_DATA_V1_8821C)
+
 
 
 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_READ_DATA_V1_8821C */
@@ -10246,7 +11276,8 @@
 #define BIT_SHIFT_LTECOEX_R_DATA_V1_8821C 0
 #define BIT_MASK_LTECOEX_R_DATA_V1_8821C 0xffffffffL
 #define BIT_LTECOEX_R_DATA_V1_8821C(x) (((x) & BIT_MASK_LTECOEX_R_DATA_V1_8821C) << BIT_SHIFT_LTECOEX_R_DATA_V1_8821C)
-#define BIT_GET_LTECOEX_R_DATA_V1_8821C(x) (((x) >> BIT_SHIFT_LTECOEX_R_DATA_V1_8821C) & BIT_MASK_LTECOEX_R_DATA_V1_8821C)

+#define BIT_GET_LTECOEX_R_DATA_V1_8821C(x) (((x) >> BIT_SHIFT_LTECOEX_R_DATA_V1_8821C) & BIT_MASK_LTECOEX_R_DATA_V1_8821C)
+
 
 
 /* 2 REG_NOT_VALID_8821C */
@@ -10376,7 +11407,8 @@
 #define BIT_SHIFT_SDIO_INT_TIMEOUT_8821C 16
 #define BIT_MASK_SDIO_INT_TIMEOUT_8821C 0xffff
 #define BIT_SDIO_INT_TIMEOUT_8821C(x) (((x) & BIT_MASK_SDIO_INT_TIMEOUT_8821C) << BIT_SHIFT_SDIO_INT_TIMEOUT_8821C)
-#define BIT_GET_SDIO_INT_TIMEOUT_8821C(x) (((x) >> BIT_SHIFT_SDIO_INT_TIMEOUT_8821C) & BIT_MASK_SDIO_INT_TIMEOUT_8821C)

+#define BIT_GET_SDIO_INT_TIMEOUT_8821C(x) (((x) >> BIT_SHIFT_SDIO_INT_TIMEOUT_8821C) & BIT_MASK_SDIO_INT_TIMEOUT_8821C)
+
 
 #define BIT_IO_ERR_STATUS_8821C BIT(15)
 #define BIT_REPLY_ERRCRC_IN_DATA_8821C BIT(9)
@@ -10445,7 +11477,8 @@
 #define BIT_SHIFT_RX_REQ_LEN_V1_8821C 0
 #define BIT_MASK_RX_REQ_LEN_V1_8821C 0x3ffff
 #define BIT_RX_REQ_LEN_V1_8821C(x) (((x) & BIT_MASK_RX_REQ_LEN_V1_8821C) << BIT_SHIFT_RX_REQ_LEN_V1_8821C)
-#define BIT_GET_RX_REQ_LEN_V1_8821C(x) (((x) >> BIT_SHIFT_RX_REQ_LEN_V1_8821C) & BIT_MASK_RX_REQ_LEN_V1_8821C)

+#define BIT_GET_RX_REQ_LEN_V1_8821C(x) (((x) >> BIT_SHIFT_RX_REQ_LEN_V1_8821C) & BIT_MASK_RX_REQ_LEN_V1_8821C)
+
 
 
 /* 2 REG_SDIO_FREE_TXPG_SEQ_V1_8821C */
@@ -10453,7 +11486,8 @@
 #define BIT_SHIFT_FREE_TXPG_SEQ_8821C 0
 #define BIT_MASK_FREE_TXPG_SEQ_8821C 0xff
 #define BIT_FREE_TXPG_SEQ_8821C(x) (((x) & BIT_MASK_FREE_TXPG_SEQ_8821C) << BIT_SHIFT_FREE_TXPG_SEQ_8821C)
-#define BIT_GET_FREE_TXPG_SEQ_8821C(x) (((x) >> BIT_SHIFT_FREE_TXPG_SEQ_8821C) & BIT_MASK_FREE_TXPG_SEQ_8821C)

+#define BIT_GET_FREE_TXPG_SEQ_8821C(x) (((x) >> BIT_SHIFT_FREE_TXPG_SEQ_8821C) & BIT_MASK_FREE_TXPG_SEQ_8821C)
+
 
 
 /* 2 REG_SDIO_FREE_TXPG_8821C */
@@ -10461,13 +11495,15 @@
 #define BIT_SHIFT_MID_FREEPG_V1_8821C 16
 #define BIT_MASK_MID_FREEPG_V1_8821C 0xfff
 #define BIT_MID_FREEPG_V1_8821C(x) (((x) & BIT_MASK_MID_FREEPG_V1_8821C) << BIT_SHIFT_MID_FREEPG_V1_8821C)
-#define BIT_GET_MID_FREEPG_V1_8821C(x) (((x) >> BIT_SHIFT_MID_FREEPG_V1_8821C) & BIT_MASK_MID_FREEPG_V1_8821C)

+#define BIT_GET_MID_FREEPG_V1_8821C(x) (((x) >> BIT_SHIFT_MID_FREEPG_V1_8821C) & BIT_MASK_MID_FREEPG_V1_8821C)
+
 
 
 #define BIT_SHIFT_HIQ_FREEPG_V1_8821C 0
 #define BIT_MASK_HIQ_FREEPG_V1_8821C 0xfff
 #define BIT_HIQ_FREEPG_V1_8821C(x) (((x) & BIT_MASK_HIQ_FREEPG_V1_8821C) << BIT_SHIFT_HIQ_FREEPG_V1_8821C)
-#define BIT_GET_HIQ_FREEPG_V1_8821C(x) (((x) >> BIT_SHIFT_HIQ_FREEPG_V1_8821C) & BIT_MASK_HIQ_FREEPG_V1_8821C)

+#define BIT_GET_HIQ_FREEPG_V1_8821C(x) (((x) >> BIT_SHIFT_HIQ_FREEPG_V1_8821C) & BIT_MASK_HIQ_FREEPG_V1_8821C)
+
 
 
 /* 2 REG_SDIO_FREE_TXPG2_8821C */
@@ -10475,13 +11511,15 @@
 #define BIT_SHIFT_PUB_FREEPG_V1_8821C 16
 #define BIT_MASK_PUB_FREEPG_V1_8821C 0xfff
 #define BIT_PUB_FREEPG_V1_8821C(x) (((x) & BIT_MASK_PUB_FREEPG_V1_8821C) << BIT_SHIFT_PUB_FREEPG_V1_8821C)
-#define BIT_GET_PUB_FREEPG_V1_8821C(x) (((x) >> BIT_SHIFT_PUB_FREEPG_V1_8821C) & BIT_MASK_PUB_FREEPG_V1_8821C)

+#define BIT_GET_PUB_FREEPG_V1_8821C(x) (((x) >> BIT_SHIFT_PUB_FREEPG_V1_8821C) & BIT_MASK_PUB_FREEPG_V1_8821C)
+
 
 
 #define BIT_SHIFT_LOW_FREEPG_V1_8821C 0
 #define BIT_MASK_LOW_FREEPG_V1_8821C 0xfff
 #define BIT_LOW_FREEPG_V1_8821C(x) (((x) & BIT_MASK_LOW_FREEPG_V1_8821C) << BIT_SHIFT_LOW_FREEPG_V1_8821C)
-#define BIT_GET_LOW_FREEPG_V1_8821C(x) (((x) >> BIT_SHIFT_LOW_FREEPG_V1_8821C) & BIT_MASK_LOW_FREEPG_V1_8821C)

+#define BIT_GET_LOW_FREEPG_V1_8821C(x) (((x) >> BIT_SHIFT_LOW_FREEPG_V1_8821C) & BIT_MASK_LOW_FREEPG_V1_8821C)
+
 
 
 /* 2 REG_SDIO_OQT_FREE_TXPG_V1_8821C */
@@ -10489,19 +11527,22 @@
 #define BIT_SHIFT_NOAC_OQT_FREEPG_V1_8821C 24
 #define BIT_MASK_NOAC_OQT_FREEPG_V1_8821C 0xff
 #define BIT_NOAC_OQT_FREEPG_V1_8821C(x) (((x) & BIT_MASK_NOAC_OQT_FREEPG_V1_8821C) << BIT_SHIFT_NOAC_OQT_FREEPG_V1_8821C)
-#define BIT_GET_NOAC_OQT_FREEPG_V1_8821C(x) (((x) >> BIT_SHIFT_NOAC_OQT_FREEPG_V1_8821C) & BIT_MASK_NOAC_OQT_FREEPG_V1_8821C)

+#define BIT_GET_NOAC_OQT_FREEPG_V1_8821C(x) (((x) >> BIT_SHIFT_NOAC_OQT_FREEPG_V1_8821C) & BIT_MASK_NOAC_OQT_FREEPG_V1_8821C)
+
 
 
 #define BIT_SHIFT_AC_OQT_FREEPG_V1_8821C 16
 #define BIT_MASK_AC_OQT_FREEPG_V1_8821C 0xff
 #define BIT_AC_OQT_FREEPG_V1_8821C(x) (((x) & BIT_MASK_AC_OQT_FREEPG_V1_8821C) << BIT_SHIFT_AC_OQT_FREEPG_V1_8821C)
-#define BIT_GET_AC_OQT_FREEPG_V1_8821C(x) (((x) >> BIT_SHIFT_AC_OQT_FREEPG_V1_8821C) & BIT_MASK_AC_OQT_FREEPG_V1_8821C)

+#define BIT_GET_AC_OQT_FREEPG_V1_8821C(x) (((x) >> BIT_SHIFT_AC_OQT_FREEPG_V1_8821C) & BIT_MASK_AC_OQT_FREEPG_V1_8821C)
+
 
 
 #define BIT_SHIFT_EXQ_FREEPG_V1_8821C 0
 #define BIT_MASK_EXQ_FREEPG_V1_8821C 0xfff
 #define BIT_EXQ_FREEPG_V1_8821C(x) (((x) & BIT_MASK_EXQ_FREEPG_V1_8821C) << BIT_SHIFT_EXQ_FREEPG_V1_8821C)
-#define BIT_GET_EXQ_FREEPG_V1_8821C(x) (((x) >> BIT_SHIFT_EXQ_FREEPG_V1_8821C) & BIT_MASK_EXQ_FREEPG_V1_8821C)

+#define BIT_GET_EXQ_FREEPG_V1_8821C(x) (((x) >> BIT_SHIFT_EXQ_FREEPG_V1_8821C) & BIT_MASK_EXQ_FREEPG_V1_8821C)
+
 
 
 /* 2 REG_SDIO_HTSFR_INFO_8821C */
@@ -10509,13 +11550,15 @@
 #define BIT_SHIFT_HTSFR1_8821C 16
 #define BIT_MASK_HTSFR1_8821C 0xffff
 #define BIT_HTSFR1_8821C(x) (((x) & BIT_MASK_HTSFR1_8821C) << BIT_SHIFT_HTSFR1_8821C)
-#define BIT_GET_HTSFR1_8821C(x) (((x) >> BIT_SHIFT_HTSFR1_8821C) & BIT_MASK_HTSFR1_8821C)

+#define BIT_GET_HTSFR1_8821C(x) (((x) >> BIT_SHIFT_HTSFR1_8821C) & BIT_MASK_HTSFR1_8821C)
+
 
 
 #define BIT_SHIFT_HTSFR0_8821C 0
 #define BIT_MASK_HTSFR0_8821C 0xffff
 #define BIT_HTSFR0_8821C(x) (((x) & BIT_MASK_HTSFR0_8821C) << BIT_SHIFT_HTSFR0_8821C)
-#define BIT_GET_HTSFR0_8821C(x) (((x) >> BIT_SHIFT_HTSFR0_8821C) & BIT_MASK_HTSFR0_8821C)

+#define BIT_GET_HTSFR0_8821C(x) (((x) >> BIT_SHIFT_HTSFR0_8821C) & BIT_MASK_HTSFR0_8821C)
+
 
 
 /* 2 REG_SDIO_HCPWM1_V2_8821C */
@@ -10533,13 +11576,15 @@
 #define BIT_SHIFT_INDIRECT_REG_SIZE_8821C 16
 #define BIT_MASK_INDIRECT_REG_SIZE_8821C 0x3
 #define BIT_INDIRECT_REG_SIZE_8821C(x) (((x) & BIT_MASK_INDIRECT_REG_SIZE_8821C) << BIT_SHIFT_INDIRECT_REG_SIZE_8821C)
-#define BIT_GET_INDIRECT_REG_SIZE_8821C(x) (((x) >> BIT_SHIFT_INDIRECT_REG_SIZE_8821C) & BIT_MASK_INDIRECT_REG_SIZE_8821C)

+#define BIT_GET_INDIRECT_REG_SIZE_8821C(x) (((x) >> BIT_SHIFT_INDIRECT_REG_SIZE_8821C) & BIT_MASK_INDIRECT_REG_SIZE_8821C)
+
 
 
 #define BIT_SHIFT_INDIRECT_REG_ADDR_8821C 0
 #define BIT_MASK_INDIRECT_REG_ADDR_8821C 0xffff
 #define BIT_INDIRECT_REG_ADDR_8821C(x) (((x) & BIT_MASK_INDIRECT_REG_ADDR_8821C) << BIT_SHIFT_INDIRECT_REG_ADDR_8821C)
-#define BIT_GET_INDIRECT_REG_ADDR_8821C(x) (((x) >> BIT_SHIFT_INDIRECT_REG_ADDR_8821C) & BIT_MASK_INDIRECT_REG_ADDR_8821C)

+#define BIT_GET_INDIRECT_REG_ADDR_8821C(x) (((x) >> BIT_SHIFT_INDIRECT_REG_ADDR_8821C) & BIT_MASK_INDIRECT_REG_ADDR_8821C)
+
 
 
 /* 2 REG_SDIO_INDIRECT_REG_DATA_8821C */
@@ -10547,7 +11592,8 @@
 #define BIT_SHIFT_INDIRECT_REG_DATA_8821C 0
 #define BIT_MASK_INDIRECT_REG_DATA_8821C 0xffffffffL
 #define BIT_INDIRECT_REG_DATA_8821C(x) (((x) & BIT_MASK_INDIRECT_REG_DATA_8821C) << BIT_SHIFT_INDIRECT_REG_DATA_8821C)
-#define BIT_GET_INDIRECT_REG_DATA_8821C(x) (((x) >> BIT_SHIFT_INDIRECT_REG_DATA_8821C) & BIT_MASK_INDIRECT_REG_DATA_8821C)

+#define BIT_GET_INDIRECT_REG_DATA_8821C(x) (((x) >> BIT_SHIFT_INDIRECT_REG_DATA_8821C) & BIT_MASK_INDIRECT_REG_DATA_8821C)
+
 
 
 /* 2 REG_SDIO_H2C_8821C */
@@ -10555,7 +11601,8 @@
 #define BIT_SHIFT_SDIO_H2C_MSG_8821C 0
 #define BIT_MASK_SDIO_H2C_MSG_8821C 0xffffffffL
 #define BIT_SDIO_H2C_MSG_8821C(x) (((x) & BIT_MASK_SDIO_H2C_MSG_8821C) << BIT_SHIFT_SDIO_H2C_MSG_8821C)
-#define BIT_GET_SDIO_H2C_MSG_8821C(x) (((x) >> BIT_SHIFT_SDIO_H2C_MSG_8821C) & BIT_MASK_SDIO_H2C_MSG_8821C)

+#define BIT_GET_SDIO_H2C_MSG_8821C(x) (((x) >> BIT_SHIFT_SDIO_H2C_MSG_8821C) & BIT_MASK_SDIO_H2C_MSG_8821C)
+
 
 
 /* 2 REG_SDIO_C2H_8821C */
@@ -10563,7 +11610,8 @@
 #define BIT_SHIFT_SDIO_C2H_MSG_8821C 0
 #define BIT_MASK_SDIO_C2H_MSG_8821C 0xffffffffL
 #define BIT_SDIO_C2H_MSG_8821C(x) (((x) & BIT_MASK_SDIO_C2H_MSG_8821C) << BIT_SHIFT_SDIO_C2H_MSG_8821C)
-#define BIT_GET_SDIO_C2H_MSG_8821C(x) (((x) >> BIT_SHIFT_SDIO_C2H_MSG_8821C) & BIT_MASK_SDIO_C2H_MSG_8821C)

+#define BIT_GET_SDIO_C2H_MSG_8821C(x) (((x) >> BIT_SHIFT_SDIO_C2H_MSG_8821C) & BIT_MASK_SDIO_C2H_MSG_8821C)
+
 
 
 /* 2 REG_SDIO_HRPWM1_8821C */
@@ -10593,7 +11641,8 @@
 #define BIT_SHIFT_CMDIN_2RESP_TIMER_8821C 0
 #define BIT_MASK_CMDIN_2RESP_TIMER_8821C 0xffff
 #define BIT_CMDIN_2RESP_TIMER_8821C(x) (((x) & BIT_MASK_CMDIN_2RESP_TIMER_8821C) << BIT_SHIFT_CMDIN_2RESP_TIMER_8821C)
-#define BIT_GET_CMDIN_2RESP_TIMER_8821C(x) (((x) >> BIT_SHIFT_CMDIN_2RESP_TIMER_8821C) & BIT_MASK_CMDIN_2RESP_TIMER_8821C)

+#define BIT_GET_CMDIN_2RESP_TIMER_8821C(x) (((x) >> BIT_SHIFT_CMDIN_2RESP_TIMER_8821C) & BIT_MASK_CMDIN_2RESP_TIMER_8821C)
+
 
 
 /* 2 REG_SDIO_CMD_CRC_8821C */
@@ -10601,7 +11650,8 @@
 #define BIT_SHIFT_SDIO_CMD_CRC_V1_8821C 0
 #define BIT_MASK_SDIO_CMD_CRC_V1_8821C 0xff
 #define BIT_SDIO_CMD_CRC_V1_8821C(x) (((x) & BIT_MASK_SDIO_CMD_CRC_V1_8821C) << BIT_SHIFT_SDIO_CMD_CRC_V1_8821C)
-#define BIT_GET_SDIO_CMD_CRC_V1_8821C(x) (((x) >> BIT_SHIFT_SDIO_CMD_CRC_V1_8821C) & BIT_MASK_SDIO_CMD_CRC_V1_8821C)

+#define BIT_GET_SDIO_CMD_CRC_V1_8821C(x) (((x) >> BIT_SHIFT_SDIO_CMD_CRC_V1_8821C) & BIT_MASK_SDIO_CMD_CRC_V1_8821C)
+
 
 
 /* 2 REG_SDIO_HSISR_8821C */
@@ -10625,7 +11675,8 @@
 #define BIT_SHIFT_CMD_CRC_ERR_CNT_8821C 0
 #define BIT_MASK_CMD_CRC_ERR_CNT_8821C 0xff
 #define BIT_CMD_CRC_ERR_CNT_8821C(x) (((x) & BIT_MASK_CMD_CRC_ERR_CNT_8821C) << BIT_SHIFT_CMD_CRC_ERR_CNT_8821C)
-#define BIT_GET_CMD_CRC_ERR_CNT_8821C(x) (((x) >> BIT_SHIFT_CMD_CRC_ERR_CNT_8821C) & BIT_MASK_CMD_CRC_ERR_CNT_8821C)

+#define BIT_GET_CMD_CRC_ERR_CNT_8821C(x) (((x) >> BIT_SHIFT_CMD_CRC_ERR_CNT_8821C) & BIT_MASK_CMD_CRC_ERR_CNT_8821C)
+
 
 
 /* 2 REG_SDIO_DATA_ERRCNT_8821C */
@@ -10633,7 +11684,8 @@
 #define BIT_SHIFT_DATA_CRC_ERR_CNT_8821C 0
 #define BIT_MASK_DATA_CRC_ERR_CNT_8821C 0xff
 #define BIT_DATA_CRC_ERR_CNT_8821C(x) (((x) & BIT_MASK_DATA_CRC_ERR_CNT_8821C) << BIT_SHIFT_DATA_CRC_ERR_CNT_8821C)
-#define BIT_GET_DATA_CRC_ERR_CNT_8821C(x) (((x) >> BIT_SHIFT_DATA_CRC_ERR_CNT_8821C) & BIT_MASK_DATA_CRC_ERR_CNT_8821C)

+#define BIT_GET_DATA_CRC_ERR_CNT_8821C(x) (((x) >> BIT_SHIFT_DATA_CRC_ERR_CNT_8821C) & BIT_MASK_DATA_CRC_ERR_CNT_8821C)
+
 
 
 /* 2 REG_SDIO_CMD_ERR_CONTENT_8821C */
@@ -10641,7 +11693,8 @@
 #define BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8821C 0
 #define BIT_MASK_SDIO_CMD_ERR_CONTENT_8821C 0xffffffffffL
 #define BIT_SDIO_CMD_ERR_CONTENT_8821C(x) (((x) & BIT_MASK_SDIO_CMD_ERR_CONTENT_8821C) << BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8821C)
-#define BIT_GET_SDIO_CMD_ERR_CONTENT_8821C(x) (((x) >> BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8821C) & BIT_MASK_SDIO_CMD_ERR_CONTENT_8821C)

+#define BIT_GET_SDIO_CMD_ERR_CONTENT_8821C(x) (((x) >> BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8821C) & BIT_MASK_SDIO_CMD_ERR_CONTENT_8821C)
+
 
 
 /* 2 REG_SDIO_CRC_ERR_IDX_8821C */
@@ -10656,7 +11709,8 @@
 #define BIT_SHIFT_SDIO_DATA_CRC_8821C 0
 #define BIT_MASK_SDIO_DATA_CRC_8821C 0xff
 #define BIT_SDIO_DATA_CRC_8821C(x) (((x) & BIT_MASK_SDIO_DATA_CRC_8821C) << BIT_SHIFT_SDIO_DATA_CRC_8821C)
-#define BIT_GET_SDIO_DATA_CRC_8821C(x) (((x) >> BIT_SHIFT_SDIO_DATA_CRC_8821C) & BIT_MASK_SDIO_DATA_CRC_8821C)

+#define BIT_GET_SDIO_DATA_CRC_8821C(x) (((x) >> BIT_SHIFT_SDIO_DATA_CRC_8821C) & BIT_MASK_SDIO_DATA_CRC_8821C)
+
 
 
 /* 2 REG_SDIO_DATA_REPLY_TIME_8821C */
@@ -10664,7 +11718,8 @@
 #define BIT_SHIFT_SDIO_DATA_REPLY_TIME_8821C 0
 #define BIT_MASK_SDIO_DATA_REPLY_TIME_8821C 0x7
 #define BIT_SDIO_DATA_REPLY_TIME_8821C(x) (((x) & BIT_MASK_SDIO_DATA_REPLY_TIME_8821C) << BIT_SHIFT_SDIO_DATA_REPLY_TIME_8821C)
-#define BIT_GET_SDIO_DATA_REPLY_TIME_8821C(x) (((x) >> BIT_SHIFT_SDIO_DATA_REPLY_TIME_8821C) & BIT_MASK_SDIO_DATA_REPLY_TIME_8821C)

+#define BIT_GET_SDIO_DATA_REPLY_TIME_8821C(x) (((x) >> BIT_SHIFT_SDIO_DATA_REPLY_TIME_8821C) & BIT_MASK_SDIO_DATA_REPLY_TIME_8821C)
+
 
 
 #endif
diff --git a/rtl8822BU/hal/halmac/halmac_bit_8822b.h b/rtl8822BU/hal/halmac/halmac_bit_8822b.h
index b3f3064..db8680b 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_bit_8822b.h
+++ b/rtl8822BU/hal/halmac/halmac_bit_8822b.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef __INC_HALMAC_BIT_8822B_H
 #define __INC_HALMAC_BIT_8822B_H
 
@@ -92,13 +107,15 @@
 #define BIT_SHIFT_VPDIDX_8822B 8
 #define BIT_MASK_VPDIDX_8822B 0xff
 #define BIT_VPDIDX_8822B(x) (((x) & BIT_MASK_VPDIDX_8822B) << BIT_SHIFT_VPDIDX_8822B)
-#define BIT_GET_VPDIDX_8822B(x) (((x) >> BIT_SHIFT_VPDIDX_8822B) & BIT_MASK_VPDIDX_8822B)

+#define BIT_GET_VPDIDX_8822B(x) (((x) >> BIT_SHIFT_VPDIDX_8822B) & BIT_MASK_VPDIDX_8822B)
+
 
 
 #define BIT_SHIFT_EEM1_0_8822B 6
 #define BIT_MASK_EEM1_0_8822B 0x3
 #define BIT_EEM1_0_8822B(x) (((x) & BIT_MASK_EEM1_0_8822B) << BIT_SHIFT_EEM1_0_8822B)
-#define BIT_GET_EEM1_0_8822B(x) (((x) >> BIT_SHIFT_EEM1_0_8822B) & BIT_MASK_EEM1_0_8822B)

+#define BIT_GET_EEM1_0_8822B(x) (((x) >> BIT_SHIFT_EEM1_0_8822B) & BIT_MASK_EEM1_0_8822B)
+
 
 #define BIT_AUTOLOAD_SUS_8822B BIT(5)
 #define BIT_EERPOMSEL_8822B BIT(4)
@@ -112,7 +129,8 @@
 #define BIT_SHIFT_VPD_DATA_8822B 0
 #define BIT_MASK_VPD_DATA_8822B 0xffffffffL
 #define BIT_VPD_DATA_8822B(x) (((x) & BIT_MASK_VPD_DATA_8822B) << BIT_SHIFT_VPD_DATA_8822B)
-#define BIT_GET_VPD_DATA_8822B(x) (((x) >> BIT_SHIFT_VPD_DATA_8822B) & BIT_MASK_VPD_DATA_8822B)

+#define BIT_GET_VPD_DATA_8822B(x) (((x) >> BIT_SHIFT_VPD_DATA_8822B) & BIT_MASK_VPD_DATA_8822B)
+
 
 
 /* 2 REG_SYS_SWR_CTRL1_8822B */
@@ -121,20 +139,23 @@
 #define BIT_SHIFT_C1_L_8822B 29
 #define BIT_MASK_C1_L_8822B 0x3
 #define BIT_C1_L_8822B(x) (((x) & BIT_MASK_C1_L_8822B) << BIT_SHIFT_C1_L_8822B)
-#define BIT_GET_C1_L_8822B(x) (((x) >> BIT_SHIFT_C1_L_8822B) & BIT_MASK_C1_L_8822B)

+#define BIT_GET_C1_L_8822B(x) (((x) >> BIT_SHIFT_C1_L_8822B) & BIT_MASK_C1_L_8822B)
+
 
 
 #define BIT_SHIFT_REG_FREQ_L_8822B 25
 #define BIT_MASK_REG_FREQ_L_8822B 0x7
 #define BIT_REG_FREQ_L_8822B(x) (((x) & BIT_MASK_REG_FREQ_L_8822B) << BIT_SHIFT_REG_FREQ_L_8822B)
-#define BIT_GET_REG_FREQ_L_8822B(x) (((x) >> BIT_SHIFT_REG_FREQ_L_8822B) & BIT_MASK_REG_FREQ_L_8822B)

+#define BIT_GET_REG_FREQ_L_8822B(x) (((x) >> BIT_SHIFT_REG_FREQ_L_8822B) & BIT_MASK_REG_FREQ_L_8822B)
+
 
 #define BIT_REG_EN_DUTY_8822B BIT(24)
 
 #define BIT_SHIFT_REG_MODE_8822B 22
 #define BIT_MASK_REG_MODE_8822B 0x3
 #define BIT_REG_MODE_8822B(x) (((x) & BIT_MASK_REG_MODE_8822B) << BIT_SHIFT_REG_MODE_8822B)
-#define BIT_GET_REG_MODE_8822B(x) (((x) >> BIT_SHIFT_REG_MODE_8822B) & BIT_MASK_REG_MODE_8822B)

+#define BIT_GET_REG_MODE_8822B(x) (((x) >> BIT_SHIFT_REG_MODE_8822B) & BIT_MASK_REG_MODE_8822B)
+
 
 #define BIT_REG_EN_SP_8822B BIT(21)
 #define BIT_REG_AUTO_L_8822B BIT(20)
@@ -144,13 +165,15 @@
 #define BIT_SHIFT_OCP_L1_8822B 15
 #define BIT_MASK_OCP_L1_8822B 0x7
 #define BIT_OCP_L1_8822B(x) (((x) & BIT_MASK_OCP_L1_8822B) << BIT_SHIFT_OCP_L1_8822B)
-#define BIT_GET_OCP_L1_8822B(x) (((x) >> BIT_SHIFT_OCP_L1_8822B) & BIT_MASK_OCP_L1_8822B)

+#define BIT_GET_OCP_L1_8822B(x) (((x) >> BIT_SHIFT_OCP_L1_8822B) & BIT_MASK_OCP_L1_8822B)
+
 
 
 #define BIT_SHIFT_CF_L_8822B 13
 #define BIT_MASK_CF_L_8822B 0x3
 #define BIT_CF_L_8822B(x) (((x) & BIT_MASK_CF_L_8822B) << BIT_SHIFT_CF_L_8822B)
-#define BIT_GET_CF_L_8822B(x) (((x) >> BIT_SHIFT_CF_L_8822B) & BIT_MASK_CF_L_8822B)

+#define BIT_GET_CF_L_8822B(x) (((x) >> BIT_SHIFT_CF_L_8822B) & BIT_MASK_CF_L_8822B)
+
 
 #define BIT_SW18_FPWM_8822B BIT(11)
 #define BIT_SW18_SWEN_8822B BIT(9)
@@ -165,31 +188,36 @@
 #define BIT_SHIFT_REG_DELAY_8822B 28
 #define BIT_MASK_REG_DELAY_8822B 0x3
 #define BIT_REG_DELAY_8822B(x) (((x) & BIT_MASK_REG_DELAY_8822B) << BIT_SHIFT_REG_DELAY_8822B)
-#define BIT_GET_REG_DELAY_8822B(x) (((x) >> BIT_SHIFT_REG_DELAY_8822B) & BIT_MASK_REG_DELAY_8822B)

+#define BIT_GET_REG_DELAY_8822B(x) (((x) >> BIT_SHIFT_REG_DELAY_8822B) & BIT_MASK_REG_DELAY_8822B)
+
 
 
 #define BIT_SHIFT_V15ADJ_L1_V1_8822B 24
 #define BIT_MASK_V15ADJ_L1_V1_8822B 0x7
 #define BIT_V15ADJ_L1_V1_8822B(x) (((x) & BIT_MASK_V15ADJ_L1_V1_8822B) << BIT_SHIFT_V15ADJ_L1_V1_8822B)
-#define BIT_GET_V15ADJ_L1_V1_8822B(x) (((x) >> BIT_SHIFT_V15ADJ_L1_V1_8822B) & BIT_MASK_V15ADJ_L1_V1_8822B)

+#define BIT_GET_V15ADJ_L1_V1_8822B(x) (((x) >> BIT_SHIFT_V15ADJ_L1_V1_8822B) & BIT_MASK_V15ADJ_L1_V1_8822B)
+
 
 
 #define BIT_SHIFT_VOL_L1_V1_8822B 20
 #define BIT_MASK_VOL_L1_V1_8822B 0xf
 #define BIT_VOL_L1_V1_8822B(x) (((x) & BIT_MASK_VOL_L1_V1_8822B) << BIT_SHIFT_VOL_L1_V1_8822B)
-#define BIT_GET_VOL_L1_V1_8822B(x) (((x) >> BIT_SHIFT_VOL_L1_V1_8822B) & BIT_MASK_VOL_L1_V1_8822B)

+#define BIT_GET_VOL_L1_V1_8822B(x) (((x) >> BIT_SHIFT_VOL_L1_V1_8822B) & BIT_MASK_VOL_L1_V1_8822B)
+
 
 
 #define BIT_SHIFT_IN_L1_V1_8822B 17
 #define BIT_MASK_IN_L1_V1_8822B 0x7
 #define BIT_IN_L1_V1_8822B(x) (((x) & BIT_MASK_IN_L1_V1_8822B) << BIT_SHIFT_IN_L1_V1_8822B)
-#define BIT_GET_IN_L1_V1_8822B(x) (((x) >> BIT_SHIFT_IN_L1_V1_8822B) & BIT_MASK_IN_L1_V1_8822B)

+#define BIT_GET_IN_L1_V1_8822B(x) (((x) >> BIT_SHIFT_IN_L1_V1_8822B) & BIT_MASK_IN_L1_V1_8822B)
+
 
 
 #define BIT_SHIFT_TBOX_L1_8822B 15
 #define BIT_MASK_TBOX_L1_8822B 0x3
 #define BIT_TBOX_L1_8822B(x) (((x) & BIT_MASK_TBOX_L1_8822B) << BIT_SHIFT_TBOX_L1_8822B)
-#define BIT_GET_TBOX_L1_8822B(x) (((x) >> BIT_SHIFT_TBOX_L1_8822B) & BIT_MASK_TBOX_L1_8822B)

+#define BIT_GET_TBOX_L1_8822B(x) (((x) >> BIT_SHIFT_TBOX_L1_8822B) & BIT_MASK_TBOX_L1_8822B)
+
 
 #define BIT_SW18_SEL_8822B BIT(13)
 
@@ -199,25 +227,29 @@
 #define BIT_SHIFT_R3_L_8822B 7
 #define BIT_MASK_R3_L_8822B 0x3
 #define BIT_R3_L_8822B(x) (((x) & BIT_MASK_R3_L_8822B) << BIT_SHIFT_R3_L_8822B)
-#define BIT_GET_R3_L_8822B(x) (((x) >> BIT_SHIFT_R3_L_8822B) & BIT_MASK_R3_L_8822B)

+#define BIT_GET_R3_L_8822B(x) (((x) >> BIT_SHIFT_R3_L_8822B) & BIT_MASK_R3_L_8822B)
+
 
 
 #define BIT_SHIFT_SW18_R2_8822B 5
 #define BIT_MASK_SW18_R2_8822B 0x3
 #define BIT_SW18_R2_8822B(x) (((x) & BIT_MASK_SW18_R2_8822B) << BIT_SHIFT_SW18_R2_8822B)
-#define BIT_GET_SW18_R2_8822B(x) (((x) >> BIT_SHIFT_SW18_R2_8822B) & BIT_MASK_SW18_R2_8822B)

+#define BIT_GET_SW18_R2_8822B(x) (((x) >> BIT_SHIFT_SW18_R2_8822B) & BIT_MASK_SW18_R2_8822B)
+
 
 
 #define BIT_SHIFT_SW18_R1_8822B 3
 #define BIT_MASK_SW18_R1_8822B 0x3
 #define BIT_SW18_R1_8822B(x) (((x) & BIT_MASK_SW18_R1_8822B) << BIT_SHIFT_SW18_R1_8822B)
-#define BIT_GET_SW18_R1_8822B(x) (((x) >> BIT_SHIFT_SW18_R1_8822B) & BIT_MASK_SW18_R1_8822B)

+#define BIT_GET_SW18_R1_8822B(x) (((x) >> BIT_SHIFT_SW18_R1_8822B) & BIT_MASK_SW18_R1_8822B)
+
 
 
 #define BIT_SHIFT_C3_L_C3_8822B 1
 #define BIT_MASK_C3_L_C3_8822B 0x3
 #define BIT_C3_L_C3_8822B(x) (((x) & BIT_MASK_C3_L_C3_8822B) << BIT_SHIFT_C3_L_C3_8822B)
-#define BIT_GET_C3_L_C3_8822B(x) (((x) >> BIT_SHIFT_C3_L_C3_8822B) & BIT_MASK_C3_L_C3_8822B)

+#define BIT_GET_C3_L_C3_8822B(x) (((x) >> BIT_SHIFT_C3_L_C3_8822B) & BIT_MASK_C3_L_C3_8822B)
+
 
 #define BIT_C2_L_BIT1_8822B BIT(0)
 
@@ -227,13 +259,15 @@
 #define BIT_SHIFT_SPS18_OCP_TH_8822B 16
 #define BIT_MASK_SPS18_OCP_TH_8822B 0x7fff
 #define BIT_SPS18_OCP_TH_8822B(x) (((x) & BIT_MASK_SPS18_OCP_TH_8822B) << BIT_SHIFT_SPS18_OCP_TH_8822B)
-#define BIT_GET_SPS18_OCP_TH_8822B(x) (((x) >> BIT_SHIFT_SPS18_OCP_TH_8822B) & BIT_MASK_SPS18_OCP_TH_8822B)

+#define BIT_GET_SPS18_OCP_TH_8822B(x) (((x) >> BIT_SHIFT_SPS18_OCP_TH_8822B) & BIT_MASK_SPS18_OCP_TH_8822B)
+
 
 
 #define BIT_SHIFT_OCP_WINDOW_8822B 0
 #define BIT_MASK_OCP_WINDOW_8822B 0xffff
 #define BIT_OCP_WINDOW_8822B(x) (((x) & BIT_MASK_OCP_WINDOW_8822B) << BIT_SHIFT_OCP_WINDOW_8822B)
-#define BIT_GET_OCP_WINDOW_8822B(x) (((x) >> BIT_SHIFT_OCP_WINDOW_8822B) & BIT_MASK_OCP_WINDOW_8822B)

+#define BIT_GET_OCP_WINDOW_8822B(x) (((x) >> BIT_SHIFT_OCP_WINDOW_8822B) & BIT_MASK_OCP_WINDOW_8822B)
+
 
 
 /* 2 REG_RSV_CTRL_8822B */
@@ -258,14 +292,16 @@
 #define BIT_SHIFT_LPLDH12_RSV_8822B 29
 #define BIT_MASK_LPLDH12_RSV_8822B 0x7
 #define BIT_LPLDH12_RSV_8822B(x) (((x) & BIT_MASK_LPLDH12_RSV_8822B) << BIT_SHIFT_LPLDH12_RSV_8822B)
-#define BIT_GET_LPLDH12_RSV_8822B(x) (((x) >> BIT_SHIFT_LPLDH12_RSV_8822B) & BIT_MASK_LPLDH12_RSV_8822B)

+#define BIT_GET_LPLDH12_RSV_8822B(x) (((x) >> BIT_SHIFT_LPLDH12_RSV_8822B) & BIT_MASK_LPLDH12_RSV_8822B)
+
 
 #define BIT_LPLDH12_SLP_8822B BIT(28)
 
 #define BIT_SHIFT_LPLDH12_VADJ_8822B 24
 #define BIT_MASK_LPLDH12_VADJ_8822B 0xf
 #define BIT_LPLDH12_VADJ_8822B(x) (((x) & BIT_MASK_LPLDH12_VADJ_8822B) << BIT_SHIFT_LPLDH12_VADJ_8822B)
-#define BIT_GET_LPLDH12_VADJ_8822B(x) (((x) >> BIT_SHIFT_LPLDH12_VADJ_8822B) & BIT_MASK_LPLDH12_VADJ_8822B)

+#define BIT_GET_LPLDH12_VADJ_8822B(x) (((x) >> BIT_SHIFT_LPLDH12_VADJ_8822B) & BIT_MASK_LPLDH12_VADJ_8822B)
+
 
 #define BIT_LDH12_EN_8822B BIT(16)
 #define BIT_WLBBOFF_BIG_PWC_EN_8822B BIT(14)
@@ -290,39 +326,45 @@
 #define BIT_SHIFT_XTAL_CAP_XI_8822B 25
 #define BIT_MASK_XTAL_CAP_XI_8822B 0x3f
 #define BIT_XTAL_CAP_XI_8822B(x) (((x) & BIT_MASK_XTAL_CAP_XI_8822B) << BIT_SHIFT_XTAL_CAP_XI_8822B)
-#define BIT_GET_XTAL_CAP_XI_8822B(x) (((x) >> BIT_SHIFT_XTAL_CAP_XI_8822B) & BIT_MASK_XTAL_CAP_XI_8822B)

+#define BIT_GET_XTAL_CAP_XI_8822B(x) (((x) >> BIT_SHIFT_XTAL_CAP_XI_8822B) & BIT_MASK_XTAL_CAP_XI_8822B)
+
 
 
 #define BIT_SHIFT_XTAL_DRV_DIGI_8822B 23
 #define BIT_MASK_XTAL_DRV_DIGI_8822B 0x3
 #define BIT_XTAL_DRV_DIGI_8822B(x) (((x) & BIT_MASK_XTAL_DRV_DIGI_8822B) << BIT_SHIFT_XTAL_DRV_DIGI_8822B)
-#define BIT_GET_XTAL_DRV_DIGI_8822B(x) (((x) >> BIT_SHIFT_XTAL_DRV_DIGI_8822B) & BIT_MASK_XTAL_DRV_DIGI_8822B)

+#define BIT_GET_XTAL_DRV_DIGI_8822B(x) (((x) >> BIT_SHIFT_XTAL_DRV_DIGI_8822B) & BIT_MASK_XTAL_DRV_DIGI_8822B)
+
 
 #define BIT_XTAL_DRV_USB_BIT1_8822B BIT(22)
 
 #define BIT_SHIFT_MAC_CLK_SEL_8822B 20
 #define BIT_MASK_MAC_CLK_SEL_8822B 0x3
 #define BIT_MAC_CLK_SEL_8822B(x) (((x) & BIT_MASK_MAC_CLK_SEL_8822B) << BIT_SHIFT_MAC_CLK_SEL_8822B)
-#define BIT_GET_MAC_CLK_SEL_8822B(x) (((x) >> BIT_SHIFT_MAC_CLK_SEL_8822B) & BIT_MASK_MAC_CLK_SEL_8822B)

+#define BIT_GET_MAC_CLK_SEL_8822B(x) (((x) >> BIT_SHIFT_MAC_CLK_SEL_8822B) & BIT_MASK_MAC_CLK_SEL_8822B)
+
 
 #define BIT_XTAL_DRV_USB_BIT0_8822B BIT(19)
 
 #define BIT_SHIFT_XTAL_DRV_AFE_8822B 17
 #define BIT_MASK_XTAL_DRV_AFE_8822B 0x3
 #define BIT_XTAL_DRV_AFE_8822B(x) (((x) & BIT_MASK_XTAL_DRV_AFE_8822B) << BIT_SHIFT_XTAL_DRV_AFE_8822B)
-#define BIT_GET_XTAL_DRV_AFE_8822B(x) (((x) >> BIT_SHIFT_XTAL_DRV_AFE_8822B) & BIT_MASK_XTAL_DRV_AFE_8822B)

+#define BIT_GET_XTAL_DRV_AFE_8822B(x) (((x) >> BIT_SHIFT_XTAL_DRV_AFE_8822B) & BIT_MASK_XTAL_DRV_AFE_8822B)
+
 
 
 #define BIT_SHIFT_XTAL_DRV_RF2_8822B 15
 #define BIT_MASK_XTAL_DRV_RF2_8822B 0x3
 #define BIT_XTAL_DRV_RF2_8822B(x) (((x) & BIT_MASK_XTAL_DRV_RF2_8822B) << BIT_SHIFT_XTAL_DRV_RF2_8822B)
-#define BIT_GET_XTAL_DRV_RF2_8822B(x) (((x) >> BIT_SHIFT_XTAL_DRV_RF2_8822B) & BIT_MASK_XTAL_DRV_RF2_8822B)

+#define BIT_GET_XTAL_DRV_RF2_8822B(x) (((x) >> BIT_SHIFT_XTAL_DRV_RF2_8822B) & BIT_MASK_XTAL_DRV_RF2_8822B)
+
 
 
 #define BIT_SHIFT_XTAL_DRV_RF1_8822B 13
 #define BIT_MASK_XTAL_DRV_RF1_8822B 0x3
 #define BIT_XTAL_DRV_RF1_8822B(x) (((x) & BIT_MASK_XTAL_DRV_RF1_8822B) << BIT_SHIFT_XTAL_DRV_RF1_8822B)
-#define BIT_GET_XTAL_DRV_RF1_8822B(x) (((x) >> BIT_SHIFT_XTAL_DRV_RF1_8822B) & BIT_MASK_XTAL_DRV_RF1_8822B)

+#define BIT_GET_XTAL_DRV_RF1_8822B(x) (((x) >> BIT_SHIFT_XTAL_DRV_RF1_8822B) & BIT_MASK_XTAL_DRV_RF1_8822B)
+
 
 #define BIT_XTAL_DELAY_DIGI_8822B BIT(12)
 #define BIT_XTAL_DELAY_USB_8822B BIT(11)
@@ -331,7 +373,8 @@
 #define BIT_SHIFT_XTAL_LDO_VREF_8822B 7
 #define BIT_MASK_XTAL_LDO_VREF_8822B 0x7
 #define BIT_XTAL_LDO_VREF_8822B(x) (((x) & BIT_MASK_XTAL_LDO_VREF_8822B) << BIT_SHIFT_XTAL_LDO_VREF_8822B)
-#define BIT_GET_XTAL_LDO_VREF_8822B(x) (((x) >> BIT_SHIFT_XTAL_LDO_VREF_8822B) & BIT_MASK_XTAL_LDO_VREF_8822B)

+#define BIT_GET_XTAL_LDO_VREF_8822B(x) (((x) >> BIT_SHIFT_XTAL_LDO_VREF_8822B) & BIT_MASK_XTAL_LDO_VREF_8822B)
+
 
 #define BIT_XTAL_XQSEL_RF_8822B BIT(6)
 #define BIT_XTAL_XQSEL_8822B BIT(5)
@@ -339,13 +382,15 @@
 #define BIT_SHIFT_XTAL_GMN_V2_8822B 3
 #define BIT_MASK_XTAL_GMN_V2_8822B 0x3
 #define BIT_XTAL_GMN_V2_8822B(x) (((x) & BIT_MASK_XTAL_GMN_V2_8822B) << BIT_SHIFT_XTAL_GMN_V2_8822B)
-#define BIT_GET_XTAL_GMN_V2_8822B(x) (((x) >> BIT_SHIFT_XTAL_GMN_V2_8822B) & BIT_MASK_XTAL_GMN_V2_8822B)

+#define BIT_GET_XTAL_GMN_V2_8822B(x) (((x) >> BIT_SHIFT_XTAL_GMN_V2_8822B) & BIT_MASK_XTAL_GMN_V2_8822B)
+
 
 
 #define BIT_SHIFT_XTAL_GMP_V2_8822B 1
 #define BIT_MASK_XTAL_GMP_V2_8822B 0x3
 #define BIT_XTAL_GMP_V2_8822B(x) (((x) & BIT_MASK_XTAL_GMP_V2_8822B) << BIT_SHIFT_XTAL_GMP_V2_8822B)
-#define BIT_GET_XTAL_GMP_V2_8822B(x) (((x) >> BIT_SHIFT_XTAL_GMP_V2_8822B) & BIT_MASK_XTAL_GMP_V2_8822B)

+#define BIT_GET_XTAL_GMP_V2_8822B(x) (((x) >> BIT_SHIFT_XTAL_GMP_V2_8822B) & BIT_MASK_XTAL_GMP_V2_8822B)
+
 
 #define BIT_XTAL_EN_8822B BIT(0)
 
@@ -354,32 +399,37 @@
 #define BIT_SHIFT_REG_C3_V4_8822B 30
 #define BIT_MASK_REG_C3_V4_8822B 0x3
 #define BIT_REG_C3_V4_8822B(x) (((x) & BIT_MASK_REG_C3_V4_8822B) << BIT_SHIFT_REG_C3_V4_8822B)
-#define BIT_GET_REG_C3_V4_8822B(x) (((x) >> BIT_SHIFT_REG_C3_V4_8822B) & BIT_MASK_REG_C3_V4_8822B)

+#define BIT_GET_REG_C3_V4_8822B(x) (((x) >> BIT_SHIFT_REG_C3_V4_8822B) & BIT_MASK_REG_C3_V4_8822B)
+
 
 #define BIT_REG_CP_BIT1_8822B BIT(29)
 
 #define BIT_SHIFT_REG_RS_V4_8822B 26
 #define BIT_MASK_REG_RS_V4_8822B 0x7
 #define BIT_REG_RS_V4_8822B(x) (((x) & BIT_MASK_REG_RS_V4_8822B) << BIT_SHIFT_REG_RS_V4_8822B)
-#define BIT_GET_REG_RS_V4_8822B(x) (((x) >> BIT_SHIFT_REG_RS_V4_8822B) & BIT_MASK_REG_RS_V4_8822B)

+#define BIT_GET_REG_RS_V4_8822B(x) (((x) >> BIT_SHIFT_REG_RS_V4_8822B) & BIT_MASK_REG_RS_V4_8822B)
+
 
 
 #define BIT_SHIFT_REG__CS_8822B 24
 #define BIT_MASK_REG__CS_8822B 0x3
 #define BIT_REG__CS_8822B(x) (((x) & BIT_MASK_REG__CS_8822B) << BIT_SHIFT_REG__CS_8822B)
-#define BIT_GET_REG__CS_8822B(x) (((x) >> BIT_SHIFT_REG__CS_8822B) & BIT_MASK_REG__CS_8822B)

+#define BIT_GET_REG__CS_8822B(x) (((x) >> BIT_SHIFT_REG__CS_8822B) & BIT_MASK_REG__CS_8822B)
+
 
 
 #define BIT_SHIFT_REG_CP_OFFSET_8822B 21
 #define BIT_MASK_REG_CP_OFFSET_8822B 0x7
 #define BIT_REG_CP_OFFSET_8822B(x) (((x) & BIT_MASK_REG_CP_OFFSET_8822B) << BIT_SHIFT_REG_CP_OFFSET_8822B)
-#define BIT_GET_REG_CP_OFFSET_8822B(x) (((x) >> BIT_SHIFT_REG_CP_OFFSET_8822B) & BIT_MASK_REG_CP_OFFSET_8822B)

+#define BIT_GET_REG_CP_OFFSET_8822B(x) (((x) >> BIT_SHIFT_REG_CP_OFFSET_8822B) & BIT_MASK_REG_CP_OFFSET_8822B)
+
 
 
 #define BIT_SHIFT_CP_BIAS_8822B 18
 #define BIT_MASK_CP_BIAS_8822B 0x7
 #define BIT_CP_BIAS_8822B(x) (((x) & BIT_MASK_CP_BIAS_8822B) << BIT_SHIFT_CP_BIAS_8822B)
-#define BIT_GET_CP_BIAS_8822B(x) (((x) >> BIT_SHIFT_CP_BIAS_8822B) & BIT_MASK_CP_BIAS_8822B)

+#define BIT_GET_CP_BIAS_8822B(x) (((x) >> BIT_SHIFT_CP_BIAS_8822B) & BIT_MASK_CP_BIAS_8822B)
+
 
 #define BIT_REG_IDOUBLE_V2_8822B BIT(17)
 #define BIT_EN_SYN_8822B BIT(16)
@@ -387,13 +437,15 @@
 #define BIT_SHIFT_MCCO_8822B 14
 #define BIT_MASK_MCCO_8822B 0x3
 #define BIT_MCCO_8822B(x) (((x) & BIT_MASK_MCCO_8822B) << BIT_SHIFT_MCCO_8822B)
-#define BIT_GET_MCCO_8822B(x) (((x) >> BIT_SHIFT_MCCO_8822B) & BIT_MASK_MCCO_8822B)

+#define BIT_GET_MCCO_8822B(x) (((x) >> BIT_SHIFT_MCCO_8822B) & BIT_MASK_MCCO_8822B)
+
 
 
 #define BIT_SHIFT_REG_LDO_SEL_8822B 12
 #define BIT_MASK_REG_LDO_SEL_8822B 0x3
 #define BIT_REG_LDO_SEL_8822B(x) (((x) & BIT_MASK_REG_LDO_SEL_8822B) << BIT_SHIFT_REG_LDO_SEL_8822B)
-#define BIT_GET_REG_LDO_SEL_8822B(x) (((x) >> BIT_SHIFT_REG_LDO_SEL_8822B) & BIT_MASK_REG_LDO_SEL_8822B)

+#define BIT_GET_REG_LDO_SEL_8822B(x) (((x) >> BIT_SHIFT_REG_LDO_SEL_8822B) & BIT_MASK_REG_LDO_SEL_8822B)
+
 
 #define BIT_REG_KVCO_V2_8822B BIT(10)
 #define BIT_AGPIO_GPO_8822B BIT(9)
@@ -401,13 +453,15 @@
 #define BIT_SHIFT_AGPIO_DRV_8822B 7
 #define BIT_MASK_AGPIO_DRV_8822B 0x3
 #define BIT_AGPIO_DRV_8822B(x) (((x) & BIT_MASK_AGPIO_DRV_8822B) << BIT_SHIFT_AGPIO_DRV_8822B)
-#define BIT_GET_AGPIO_DRV_8822B(x) (((x) >> BIT_SHIFT_AGPIO_DRV_8822B) & BIT_MASK_AGPIO_DRV_8822B)

+#define BIT_GET_AGPIO_DRV_8822B(x) (((x) >> BIT_SHIFT_AGPIO_DRV_8822B) & BIT_MASK_AGPIO_DRV_8822B)
+
 
 
 #define BIT_SHIFT_XTAL_CAP_XO_8822B 1
 #define BIT_MASK_XTAL_CAP_XO_8822B 0x3f
 #define BIT_XTAL_CAP_XO_8822B(x) (((x) & BIT_MASK_XTAL_CAP_XO_8822B) << BIT_SHIFT_XTAL_CAP_XO_8822B)
-#define BIT_GET_XTAL_CAP_XO_8822B(x) (((x) >> BIT_SHIFT_XTAL_CAP_XO_8822B) & BIT_MASK_XTAL_CAP_XO_8822B)

+#define BIT_GET_XTAL_CAP_XO_8822B(x) (((x) >> BIT_SHIFT_XTAL_CAP_XO_8822B) & BIT_MASK_XTAL_CAP_XO_8822B)
+
 
 #define BIT_POW_PLL_8822B BIT(0)
 
@@ -416,7 +470,8 @@
 #define BIT_SHIFT_PS_8822B 7
 #define BIT_MASK_PS_8822B 0x7
 #define BIT_PS_8822B(x) (((x) & BIT_MASK_PS_8822B) << BIT_SHIFT_PS_8822B)
-#define BIT_GET_PS_8822B(x) (((x) >> BIT_SHIFT_PS_8822B) & BIT_MASK_PS_8822B)

+#define BIT_GET_PS_8822B(x) (((x) >> BIT_SHIFT_PS_8822B) & BIT_MASK_PS_8822B)
+
 
 #define BIT_PSEN_8822B BIT(6)
 #define BIT_DOGENB_8822B BIT(5)
@@ -425,7 +480,8 @@
 #define BIT_SHIFT_REG_R3_V4_8822B 1
 #define BIT_MASK_REG_R3_V4_8822B 0x7
 #define BIT_REG_R3_V4_8822B(x) (((x) & BIT_MASK_REG_R3_V4_8822B) << BIT_SHIFT_REG_R3_V4_8822B)
-#define BIT_GET_REG_R3_V4_8822B(x) (((x) >> BIT_SHIFT_REG_R3_V4_8822B) & BIT_MASK_REG_R3_V4_8822B)

+#define BIT_GET_REG_R3_V4_8822B(x) (((x) >> BIT_SHIFT_REG_R3_V4_8822B) & BIT_MASK_REG_R3_V4_8822B)
+
 
 #define BIT_REG_CP_BIT0_8822B BIT(0)
 
@@ -435,19 +491,22 @@
 #define BIT_SHIFT_EF_PGPD_8822B 28
 #define BIT_MASK_EF_PGPD_8822B 0x7
 #define BIT_EF_PGPD_8822B(x) (((x) & BIT_MASK_EF_PGPD_8822B) << BIT_SHIFT_EF_PGPD_8822B)
-#define BIT_GET_EF_PGPD_8822B(x) (((x) >> BIT_SHIFT_EF_PGPD_8822B) & BIT_MASK_EF_PGPD_8822B)

+#define BIT_GET_EF_PGPD_8822B(x) (((x) >> BIT_SHIFT_EF_PGPD_8822B) & BIT_MASK_EF_PGPD_8822B)
+
 
 
 #define BIT_SHIFT_EF_RDT_8822B 24
 #define BIT_MASK_EF_RDT_8822B 0xf
 #define BIT_EF_RDT_8822B(x) (((x) & BIT_MASK_EF_RDT_8822B) << BIT_SHIFT_EF_RDT_8822B)
-#define BIT_GET_EF_RDT_8822B(x) (((x) >> BIT_SHIFT_EF_RDT_8822B) & BIT_MASK_EF_RDT_8822B)

+#define BIT_GET_EF_RDT_8822B(x) (((x) >> BIT_SHIFT_EF_RDT_8822B) & BIT_MASK_EF_RDT_8822B)
+
 
 
 #define BIT_SHIFT_EF_PGTS_8822B 20
 #define BIT_MASK_EF_PGTS_8822B 0xf
 #define BIT_EF_PGTS_8822B(x) (((x) & BIT_MASK_EF_PGTS_8822B) << BIT_SHIFT_EF_PGTS_8822B)
-#define BIT_GET_EF_PGTS_8822B(x) (((x) >> BIT_SHIFT_EF_PGTS_8822B) & BIT_MASK_EF_PGTS_8822B)

+#define BIT_GET_EF_PGTS_8822B(x) (((x) >> BIT_SHIFT_EF_PGTS_8822B) & BIT_MASK_EF_PGTS_8822B)
+
 
 #define BIT_EF_PDWN_8822B BIT(19)
 #define BIT_EF_ALDEN_8822B BIT(18)
@@ -455,13 +514,15 @@
 #define BIT_SHIFT_EF_ADDR_8822B 8
 #define BIT_MASK_EF_ADDR_8822B 0x3ff
 #define BIT_EF_ADDR_8822B(x) (((x) & BIT_MASK_EF_ADDR_8822B) << BIT_SHIFT_EF_ADDR_8822B)
-#define BIT_GET_EF_ADDR_8822B(x) (((x) >> BIT_SHIFT_EF_ADDR_8822B) & BIT_MASK_EF_ADDR_8822B)

+#define BIT_GET_EF_ADDR_8822B(x) (((x) >> BIT_SHIFT_EF_ADDR_8822B) & BIT_MASK_EF_ADDR_8822B)
+
 
 
 #define BIT_SHIFT_EF_DATA_8822B 0
 #define BIT_MASK_EF_DATA_8822B 0xff
 #define BIT_EF_DATA_8822B(x) (((x) & BIT_MASK_EF_DATA_8822B) << BIT_SHIFT_EF_DATA_8822B)
-#define BIT_GET_EF_DATA_8822B(x) (((x) >> BIT_SHIFT_EF_DATA_8822B) & BIT_MASK_EF_DATA_8822B)

+#define BIT_GET_EF_DATA_8822B(x) (((x) >> BIT_SHIFT_EF_DATA_8822B) & BIT_MASK_EF_DATA_8822B)
+
 
 
 /* 2 REG_LDO_EFUSE_CTRL_8822B */
@@ -470,34 +531,39 @@
 #define BIT_SHIFT_LDOE25_V12ADJ_L_8822B 27
 #define BIT_MASK_LDOE25_V12ADJ_L_8822B 0xf
 #define BIT_LDOE25_V12ADJ_L_8822B(x) (((x) & BIT_MASK_LDOE25_V12ADJ_L_8822B) << BIT_SHIFT_LDOE25_V12ADJ_L_8822B)
-#define BIT_GET_LDOE25_V12ADJ_L_8822B(x) (((x) >> BIT_SHIFT_LDOE25_V12ADJ_L_8822B) & BIT_MASK_LDOE25_V12ADJ_L_8822B)

+#define BIT_GET_LDOE25_V12ADJ_L_8822B(x) (((x) >> BIT_SHIFT_LDOE25_V12ADJ_L_8822B) & BIT_MASK_LDOE25_V12ADJ_L_8822B)
+
 
 #define BIT_EF_CRES_SEL_8822B BIT(26)
 
 #define BIT_SHIFT_EF_SCAN_START_V1_8822B 16
 #define BIT_MASK_EF_SCAN_START_V1_8822B 0x3ff
 #define BIT_EF_SCAN_START_V1_8822B(x) (((x) & BIT_MASK_EF_SCAN_START_V1_8822B) << BIT_SHIFT_EF_SCAN_START_V1_8822B)
-#define BIT_GET_EF_SCAN_START_V1_8822B(x) (((x) >> BIT_SHIFT_EF_SCAN_START_V1_8822B) & BIT_MASK_EF_SCAN_START_V1_8822B)

+#define BIT_GET_EF_SCAN_START_V1_8822B(x) (((x) >> BIT_SHIFT_EF_SCAN_START_V1_8822B) & BIT_MASK_EF_SCAN_START_V1_8822B)
+
 
 
 #define BIT_SHIFT_EF_SCAN_END_8822B 12
 #define BIT_MASK_EF_SCAN_END_8822B 0xf
 #define BIT_EF_SCAN_END_8822B(x) (((x) & BIT_MASK_EF_SCAN_END_8822B) << BIT_SHIFT_EF_SCAN_END_8822B)
-#define BIT_GET_EF_SCAN_END_8822B(x) (((x) >> BIT_SHIFT_EF_SCAN_END_8822B) & BIT_MASK_EF_SCAN_END_8822B)

+#define BIT_GET_EF_SCAN_END_8822B(x) (((x) >> BIT_SHIFT_EF_SCAN_END_8822B) & BIT_MASK_EF_SCAN_END_8822B)
+
 
 #define BIT_EF_PD_DIS_8822B BIT(11)
 
 #define BIT_SHIFT_EF_CELL_SEL_8822B 8
 #define BIT_MASK_EF_CELL_SEL_8822B 0x3
 #define BIT_EF_CELL_SEL_8822B(x) (((x) & BIT_MASK_EF_CELL_SEL_8822B) << BIT_SHIFT_EF_CELL_SEL_8822B)
-#define BIT_GET_EF_CELL_SEL_8822B(x) (((x) >> BIT_SHIFT_EF_CELL_SEL_8822B) & BIT_MASK_EF_CELL_SEL_8822B)

+#define BIT_GET_EF_CELL_SEL_8822B(x) (((x) >> BIT_SHIFT_EF_CELL_SEL_8822B) & BIT_MASK_EF_CELL_SEL_8822B)
+
 
 #define BIT_EF_TRPT_8822B BIT(7)
 
 #define BIT_SHIFT_EF_TTHD_8822B 0
 #define BIT_MASK_EF_TTHD_8822B 0x7f
 #define BIT_EF_TTHD_8822B(x) (((x) & BIT_MASK_EF_TTHD_8822B) << BIT_SHIFT_EF_TTHD_8822B)
-#define BIT_GET_EF_TTHD_8822B(x) (((x) >> BIT_SHIFT_EF_TTHD_8822B) & BIT_MASK_EF_TTHD_8822B)

+#define BIT_GET_EF_TTHD_8822B(x) (((x) >> BIT_SHIFT_EF_TTHD_8822B) & BIT_MASK_EF_TTHD_8822B)
+
 
 
 /* 2 REG_PWR_OPTION_CTRL_8822B */
@@ -505,19 +571,22 @@
 #define BIT_SHIFT_DBG_SEL_V1_8822B 16
 #define BIT_MASK_DBG_SEL_V1_8822B 0xff
 #define BIT_DBG_SEL_V1_8822B(x) (((x) & BIT_MASK_DBG_SEL_V1_8822B) << BIT_SHIFT_DBG_SEL_V1_8822B)
-#define BIT_GET_DBG_SEL_V1_8822B(x) (((x) >> BIT_SHIFT_DBG_SEL_V1_8822B) & BIT_MASK_DBG_SEL_V1_8822B)

+#define BIT_GET_DBG_SEL_V1_8822B(x) (((x) >> BIT_SHIFT_DBG_SEL_V1_8822B) & BIT_MASK_DBG_SEL_V1_8822B)
+
 
 
 #define BIT_SHIFT_DBG_SEL_BYTE_8822B 14
 #define BIT_MASK_DBG_SEL_BYTE_8822B 0x3
 #define BIT_DBG_SEL_BYTE_8822B(x) (((x) & BIT_MASK_DBG_SEL_BYTE_8822B) << BIT_SHIFT_DBG_SEL_BYTE_8822B)
-#define BIT_GET_DBG_SEL_BYTE_8822B(x) (((x) >> BIT_SHIFT_DBG_SEL_BYTE_8822B) & BIT_MASK_DBG_SEL_BYTE_8822B)

+#define BIT_GET_DBG_SEL_BYTE_8822B(x) (((x) >> BIT_SHIFT_DBG_SEL_BYTE_8822B) & BIT_MASK_DBG_SEL_BYTE_8822B)
+
 
 
 #define BIT_SHIFT_STD_L1_V1_8822B 12
 #define BIT_MASK_STD_L1_V1_8822B 0x3
 #define BIT_STD_L1_V1_8822B(x) (((x) & BIT_MASK_STD_L1_V1_8822B) << BIT_SHIFT_STD_L1_V1_8822B)
-#define BIT_GET_STD_L1_V1_8822B(x) (((x) >> BIT_SHIFT_STD_L1_V1_8822B) & BIT_MASK_STD_L1_V1_8822B)

+#define BIT_GET_STD_L1_V1_8822B(x) (((x) >> BIT_SHIFT_STD_L1_V1_8822B) & BIT_MASK_STD_L1_V1_8822B)
+
 
 #define BIT_SYSON_DBG_PAD_E2_8822B BIT(11)
 #define BIT_SYSON_LED_PAD_E2_8822B BIT(10)
@@ -528,19 +597,22 @@
 #define BIT_SHIFT_SYSON_SPS0WWV_WT_8822B 4
 #define BIT_MASK_SYSON_SPS0WWV_WT_8822B 0x3
 #define BIT_SYSON_SPS0WWV_WT_8822B(x) (((x) & BIT_MASK_SYSON_SPS0WWV_WT_8822B) << BIT_SHIFT_SYSON_SPS0WWV_WT_8822B)
-#define BIT_GET_SYSON_SPS0WWV_WT_8822B(x) (((x) >> BIT_SHIFT_SYSON_SPS0WWV_WT_8822B) & BIT_MASK_SYSON_SPS0WWV_WT_8822B)

+#define BIT_GET_SYSON_SPS0WWV_WT_8822B(x) (((x) >> BIT_SHIFT_SYSON_SPS0WWV_WT_8822B) & BIT_MASK_SYSON_SPS0WWV_WT_8822B)
+
 
 
 #define BIT_SHIFT_SYSON_SPS0LDO_WT_8822B 2
 #define BIT_MASK_SYSON_SPS0LDO_WT_8822B 0x3
 #define BIT_SYSON_SPS0LDO_WT_8822B(x) (((x) & BIT_MASK_SYSON_SPS0LDO_WT_8822B) << BIT_SHIFT_SYSON_SPS0LDO_WT_8822B)
-#define BIT_GET_SYSON_SPS0LDO_WT_8822B(x) (((x) >> BIT_SHIFT_SYSON_SPS0LDO_WT_8822B) & BIT_MASK_SYSON_SPS0LDO_WT_8822B)

+#define BIT_GET_SYSON_SPS0LDO_WT_8822B(x) (((x) >> BIT_SHIFT_SYSON_SPS0LDO_WT_8822B) & BIT_MASK_SYSON_SPS0LDO_WT_8822B)
+
 
 
 #define BIT_SHIFT_SYSON_RCLK_SCALE_8822B 0
 #define BIT_MASK_SYSON_RCLK_SCALE_8822B 0x3
 #define BIT_SYSON_RCLK_SCALE_8822B(x) (((x) & BIT_MASK_SYSON_RCLK_SCALE_8822B) << BIT_SHIFT_SYSON_RCLK_SCALE_8822B)
-#define BIT_GET_SYSON_RCLK_SCALE_8822B(x) (((x) >> BIT_SHIFT_SYSON_RCLK_SCALE_8822B) & BIT_MASK_SYSON_RCLK_SCALE_8822B)

+#define BIT_GET_SYSON_RCLK_SCALE_8822B(x) (((x) >> BIT_SHIFT_SYSON_RCLK_SCALE_8822B) & BIT_MASK_SYSON_RCLK_SCALE_8822B)
+
 
 
 /* 2 REG_CAL_TIMER_8822B */
@@ -548,13 +620,15 @@
 #define BIT_SHIFT_MATCH_CNT_8822B 8
 #define BIT_MASK_MATCH_CNT_8822B 0xff
 #define BIT_MATCH_CNT_8822B(x) (((x) & BIT_MASK_MATCH_CNT_8822B) << BIT_SHIFT_MATCH_CNT_8822B)
-#define BIT_GET_MATCH_CNT_8822B(x) (((x) >> BIT_SHIFT_MATCH_CNT_8822B) & BIT_MASK_MATCH_CNT_8822B)

+#define BIT_GET_MATCH_CNT_8822B(x) (((x) >> BIT_SHIFT_MATCH_CNT_8822B) & BIT_MASK_MATCH_CNT_8822B)
+
 
 
 #define BIT_SHIFT_CAL_SCAL_8822B 0
 #define BIT_MASK_CAL_SCAL_8822B 0xff
 #define BIT_CAL_SCAL_8822B(x) (((x) & BIT_MASK_CAL_SCAL_8822B) << BIT_SHIFT_CAL_SCAL_8822B)
-#define BIT_GET_CAL_SCAL_8822B(x) (((x) >> BIT_SHIFT_CAL_SCAL_8822B) & BIT_MASK_CAL_SCAL_8822B)

+#define BIT_GET_CAL_SCAL_8822B(x) (((x) >> BIT_SHIFT_CAL_SCAL_8822B) & BIT_MASK_CAL_SCAL_8822B)
+
 
 
 /* 2 REG_ACLK_MON_8822B */
@@ -562,14 +636,16 @@
 #define BIT_SHIFT_RCLK_MON_8822B 5
 #define BIT_MASK_RCLK_MON_8822B 0x7ff
 #define BIT_RCLK_MON_8822B(x) (((x) & BIT_MASK_RCLK_MON_8822B) << BIT_SHIFT_RCLK_MON_8822B)
-#define BIT_GET_RCLK_MON_8822B(x) (((x) >> BIT_SHIFT_RCLK_MON_8822B) & BIT_MASK_RCLK_MON_8822B)

+#define BIT_GET_RCLK_MON_8822B(x) (((x) >> BIT_SHIFT_RCLK_MON_8822B) & BIT_MASK_RCLK_MON_8822B)
+
 
 #define BIT_CAL_EN_8822B BIT(4)
 
 #define BIT_SHIFT_DPSTU_8822B 2
 #define BIT_MASK_DPSTU_8822B 0x3
 #define BIT_DPSTU_8822B(x) (((x) & BIT_MASK_DPSTU_8822B) << BIT_SHIFT_DPSTU_8822B)
-#define BIT_GET_DPSTU_8822B(x) (((x) >> BIT_SHIFT_DPSTU_8822B) & BIT_MASK_DPSTU_8822B)

+#define BIT_GET_DPSTU_8822B(x) (((x) >> BIT_SHIFT_DPSTU_8822B) & BIT_MASK_DPSTU_8822B)
+
 
 #define BIT_SUS_16X_8822B BIT(1)
 
@@ -588,7 +664,8 @@
 #define BIT_SHIFT_BTMODE_8822B 6
 #define BIT_MASK_BTMODE_8822B 0x3
 #define BIT_BTMODE_8822B(x) (((x) & BIT_MASK_BTMODE_8822B) << BIT_SHIFT_BTMODE_8822B)
-#define BIT_GET_BTMODE_8822B(x) (((x) >> BIT_SHIFT_BTMODE_8822B) & BIT_MASK_BTMODE_8822B)

+#define BIT_GET_BTMODE_8822B(x) (((x) >> BIT_SHIFT_BTMODE_8822B) & BIT_MASK_BTMODE_8822B)
+
 
 #define BIT_ENBT_8822B BIT(5)
 #define BIT_EROM_EN_8822B BIT(4)
@@ -598,7 +675,8 @@
 #define BIT_SHIFT_GPIOSEL_8822B 0
 #define BIT_MASK_GPIOSEL_8822B 0x3
 #define BIT_GPIOSEL_8822B(x) (((x) & BIT_MASK_GPIOSEL_8822B) << BIT_SHIFT_GPIOSEL_8822B)
-#define BIT_GET_GPIOSEL_8822B(x) (((x) >> BIT_SHIFT_GPIOSEL_8822B) & BIT_MASK_GPIOSEL_8822B)

+#define BIT_GET_GPIOSEL_8822B(x) (((x) >> BIT_SHIFT_GPIOSEL_8822B) & BIT_MASK_GPIOSEL_8822B)
+
 
 
 /* 2 REG_GPIO_PIN_CTRL_8822B */
@@ -606,25 +684,29 @@
 #define BIT_SHIFT_GPIO_MOD_7_TO_0_8822B 24
 #define BIT_MASK_GPIO_MOD_7_TO_0_8822B 0xff
 #define BIT_GPIO_MOD_7_TO_0_8822B(x) (((x) & BIT_MASK_GPIO_MOD_7_TO_0_8822B) << BIT_SHIFT_GPIO_MOD_7_TO_0_8822B)
-#define BIT_GET_GPIO_MOD_7_TO_0_8822B(x) (((x) >> BIT_SHIFT_GPIO_MOD_7_TO_0_8822B) & BIT_MASK_GPIO_MOD_7_TO_0_8822B)

+#define BIT_GET_GPIO_MOD_7_TO_0_8822B(x) (((x) >> BIT_SHIFT_GPIO_MOD_7_TO_0_8822B) & BIT_MASK_GPIO_MOD_7_TO_0_8822B)
+
 
 
 #define BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8822B 16
 #define BIT_MASK_GPIO_IO_SEL_7_TO_0_8822B 0xff
 #define BIT_GPIO_IO_SEL_7_TO_0_8822B(x) (((x) & BIT_MASK_GPIO_IO_SEL_7_TO_0_8822B) << BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8822B)
-#define BIT_GET_GPIO_IO_SEL_7_TO_0_8822B(x) (((x) >> BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8822B) & BIT_MASK_GPIO_IO_SEL_7_TO_0_8822B)

+#define BIT_GET_GPIO_IO_SEL_7_TO_0_8822B(x) (((x) >> BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8822B) & BIT_MASK_GPIO_IO_SEL_7_TO_0_8822B)
+
 
 
 #define BIT_SHIFT_GPIO_OUT_7_TO_0_8822B 8
 #define BIT_MASK_GPIO_OUT_7_TO_0_8822B 0xff
 #define BIT_GPIO_OUT_7_TO_0_8822B(x) (((x) & BIT_MASK_GPIO_OUT_7_TO_0_8822B) << BIT_SHIFT_GPIO_OUT_7_TO_0_8822B)
-#define BIT_GET_GPIO_OUT_7_TO_0_8822B(x) (((x) >> BIT_SHIFT_GPIO_OUT_7_TO_0_8822B) & BIT_MASK_GPIO_OUT_7_TO_0_8822B)

+#define BIT_GET_GPIO_OUT_7_TO_0_8822B(x) (((x) >> BIT_SHIFT_GPIO_OUT_7_TO_0_8822B) & BIT_MASK_GPIO_OUT_7_TO_0_8822B)
+
 
 
 #define BIT_SHIFT_GPIO_IN_7_TO_0_8822B 0
 #define BIT_MASK_GPIO_IN_7_TO_0_8822B 0xff
 #define BIT_GPIO_IN_7_TO_0_8822B(x) (((x) & BIT_MASK_GPIO_IN_7_TO_0_8822B) << BIT_SHIFT_GPIO_IN_7_TO_0_8822B)
-#define BIT_GET_GPIO_IN_7_TO_0_8822B(x) (((x) >> BIT_SHIFT_GPIO_IN_7_TO_0_8822B) & BIT_MASK_GPIO_IN_7_TO_0_8822B)

+#define BIT_GET_GPIO_IN_7_TO_0_8822B(x) (((x) >> BIT_SHIFT_GPIO_IN_7_TO_0_8822B) & BIT_MASK_GPIO_IN_7_TO_0_8822B)
+
 
 
 /* 2 REG_GPIO_INTM_8822B */
@@ -632,7 +714,8 @@
 #define BIT_SHIFT_MUXDBG_SEL_8822B 30
 #define BIT_MASK_MUXDBG_SEL_8822B 0x3
 #define BIT_MUXDBG_SEL_8822B(x) (((x) & BIT_MASK_MUXDBG_SEL_8822B) << BIT_SHIFT_MUXDBG_SEL_8822B)
-#define BIT_GET_MUXDBG_SEL_8822B(x) (((x) >> BIT_SHIFT_MUXDBG_SEL_8822B) & BIT_MASK_MUXDBG_SEL_8822B)

+#define BIT_GET_MUXDBG_SEL_8822B(x) (((x) >> BIT_SHIFT_MUXDBG_SEL_8822B) & BIT_MASK_MUXDBG_SEL_8822B)
+
 
 #define BIT_EXTWOL_SEL_8822B BIT(17)
 #define BIT_EXTWOL_EN_8822B BIT(16)
@@ -671,7 +754,8 @@
 #define BIT_SHIFT_LED2CM_8822B 16
 #define BIT_MASK_LED2CM_8822B 0x7
 #define BIT_LED2CM_8822B(x) (((x) & BIT_MASK_LED2CM_8822B) << BIT_SHIFT_LED2CM_8822B)
-#define BIT_GET_LED2CM_8822B(x) (((x) >> BIT_SHIFT_LED2CM_8822B) & BIT_MASK_LED2CM_8822B)

+#define BIT_GET_LED2CM_8822B(x) (((x) >> BIT_SHIFT_LED2CM_8822B) & BIT_MASK_LED2CM_8822B)
+
 
 #define BIT_LED1DIS_8822B BIT(15)
 #define BIT_LED1PL_8822B BIT(12)
@@ -680,14 +764,16 @@
 #define BIT_SHIFT_LED1CM_8822B 8
 #define BIT_MASK_LED1CM_8822B 0x7
 #define BIT_LED1CM_8822B(x) (((x) & BIT_MASK_LED1CM_8822B) << BIT_SHIFT_LED1CM_8822B)
-#define BIT_GET_LED1CM_8822B(x) (((x) >> BIT_SHIFT_LED1CM_8822B) & BIT_MASK_LED1CM_8822B)

+#define BIT_GET_LED1CM_8822B(x) (((x) >> BIT_SHIFT_LED1CM_8822B) & BIT_MASK_LED1CM_8822B)
+
 
 #define BIT_LED0DIS_8822B BIT(7)
 
 #define BIT_SHIFT_AFE_LDO_SWR_CHECK_8822B 5
 #define BIT_MASK_AFE_LDO_SWR_CHECK_8822B 0x3
 #define BIT_AFE_LDO_SWR_CHECK_8822B(x) (((x) & BIT_MASK_AFE_LDO_SWR_CHECK_8822B) << BIT_SHIFT_AFE_LDO_SWR_CHECK_8822B)
-#define BIT_GET_AFE_LDO_SWR_CHECK_8822B(x) (((x) >> BIT_SHIFT_AFE_LDO_SWR_CHECK_8822B) & BIT_MASK_AFE_LDO_SWR_CHECK_8822B)

+#define BIT_GET_AFE_LDO_SWR_CHECK_8822B(x) (((x) >> BIT_SHIFT_AFE_LDO_SWR_CHECK_8822B) & BIT_MASK_AFE_LDO_SWR_CHECK_8822B)
+
 
 #define BIT_LED0PL_8822B BIT(4)
 #define BIT_LED0SV_8822B BIT(3)
@@ -695,7 +781,8 @@
 #define BIT_SHIFT_LED0CM_8822B 0
 #define BIT_MASK_LED0CM_8822B 0x7
 #define BIT_LED0CM_8822B(x) (((x) & BIT_MASK_LED0CM_8822B) << BIT_SHIFT_LED0CM_8822B)
-#define BIT_GET_LED0CM_8822B(x) (((x) >> BIT_SHIFT_LED0CM_8822B) & BIT_MASK_LED0CM_8822B)

+#define BIT_GET_LED0CM_8822B(x) (((x) >> BIT_SHIFT_LED0CM_8822B) & BIT_MASK_LED0CM_8822B)
+
 
 
 /* 2 REG_FSIMR_8822B */
@@ -811,25 +898,29 @@
 #define BIT_SHIFT_GPIO_MOD_15_TO_8_8822B 24
 #define BIT_MASK_GPIO_MOD_15_TO_8_8822B 0xff
 #define BIT_GPIO_MOD_15_TO_8_8822B(x) (((x) & BIT_MASK_GPIO_MOD_15_TO_8_8822B) << BIT_SHIFT_GPIO_MOD_15_TO_8_8822B)
-#define BIT_GET_GPIO_MOD_15_TO_8_8822B(x) (((x) >> BIT_SHIFT_GPIO_MOD_15_TO_8_8822B) & BIT_MASK_GPIO_MOD_15_TO_8_8822B)

+#define BIT_GET_GPIO_MOD_15_TO_8_8822B(x) (((x) >> BIT_SHIFT_GPIO_MOD_15_TO_8_8822B) & BIT_MASK_GPIO_MOD_15_TO_8_8822B)
+
 
 
 #define BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8822B 16
 #define BIT_MASK_GPIO_IO_SEL_15_TO_8_8822B 0xff
 #define BIT_GPIO_IO_SEL_15_TO_8_8822B(x) (((x) & BIT_MASK_GPIO_IO_SEL_15_TO_8_8822B) << BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8822B)
-#define BIT_GET_GPIO_IO_SEL_15_TO_8_8822B(x) (((x) >> BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8822B) & BIT_MASK_GPIO_IO_SEL_15_TO_8_8822B)

+#define BIT_GET_GPIO_IO_SEL_15_TO_8_8822B(x) (((x) >> BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8822B) & BIT_MASK_GPIO_IO_SEL_15_TO_8_8822B)
+
 
 
 #define BIT_SHIFT_GPIO_OUT_15_TO_8_8822B 8
 #define BIT_MASK_GPIO_OUT_15_TO_8_8822B 0xff
 #define BIT_GPIO_OUT_15_TO_8_8822B(x) (((x) & BIT_MASK_GPIO_OUT_15_TO_8_8822B) << BIT_SHIFT_GPIO_OUT_15_TO_8_8822B)
-#define BIT_GET_GPIO_OUT_15_TO_8_8822B(x) (((x) >> BIT_SHIFT_GPIO_OUT_15_TO_8_8822B) & BIT_MASK_GPIO_OUT_15_TO_8_8822B)

+#define BIT_GET_GPIO_OUT_15_TO_8_8822B(x) (((x) >> BIT_SHIFT_GPIO_OUT_15_TO_8_8822B) & BIT_MASK_GPIO_OUT_15_TO_8_8822B)
+
 
 
 #define BIT_SHIFT_GPIO_IN_15_TO_8_8822B 0
 #define BIT_MASK_GPIO_IN_15_TO_8_8822B 0xff
 #define BIT_GPIO_IN_15_TO_8_8822B(x) (((x) & BIT_MASK_GPIO_IN_15_TO_8_8822B) << BIT_SHIFT_GPIO_IN_15_TO_8_8822B)
-#define BIT_GET_GPIO_IN_15_TO_8_8822B(x) (((x) >> BIT_SHIFT_GPIO_IN_15_TO_8_8822B) & BIT_MASK_GPIO_IN_15_TO_8_8822B)

+#define BIT_GET_GPIO_IN_15_TO_8_8822B(x) (((x) >> BIT_SHIFT_GPIO_IN_15_TO_8_8822B) & BIT_MASK_GPIO_IN_15_TO_8_8822B)
+
 
 
 /* 2 REG_PAD_CTRL1_8822B */
@@ -848,7 +939,8 @@
 #define BIT_SHIFT_BTGP_GPIO_SL_8822B 16
 #define BIT_MASK_BTGP_GPIO_SL_8822B 0x3
 #define BIT_BTGP_GPIO_SL_8822B(x) (((x) & BIT_MASK_BTGP_GPIO_SL_8822B) << BIT_SHIFT_BTGP_GPIO_SL_8822B)
-#define BIT_GET_BTGP_GPIO_SL_8822B(x) (((x) >> BIT_SHIFT_BTGP_GPIO_SL_8822B) & BIT_MASK_BTGP_GPIO_SL_8822B)

+#define BIT_GET_BTGP_GPIO_SL_8822B(x) (((x) >> BIT_SHIFT_BTGP_GPIO_SL_8822B) & BIT_MASK_BTGP_GPIO_SL_8822B)
+
 
 #define BIT_PAD_SDIO_SR_8822B BIT(14)
 #define BIT_GPIO14_OUTPUT_PL_8822B BIT(13)
@@ -900,7 +992,8 @@
 #define BIT_SHIFT_WLCLK_PHASE_8822B 0
 #define BIT_MASK_WLCLK_PHASE_8822B 0x1f
 #define BIT_WLCLK_PHASE_8822B(x) (((x) & BIT_MASK_WLCLK_PHASE_8822B) << BIT_SHIFT_WLCLK_PHASE_8822B)
-#define BIT_GET_WLCLK_PHASE_8822B(x) (((x) >> BIT_SHIFT_WLCLK_PHASE_8822B) & BIT_MASK_WLCLK_PHASE_8822B)

+#define BIT_GET_WLCLK_PHASE_8822B(x) (((x) >> BIT_SHIFT_WLCLK_PHASE_8822B) & BIT_MASK_WLCLK_PHASE_8822B)
+
 
 
 /* 2 REG_SYS_SDIO_CTRL_8822B */
@@ -921,7 +1014,8 @@
 #define BIT_SHIFT_TSFT_SEL_8822B 29
 #define BIT_MASK_TSFT_SEL_8822B 0x7
 #define BIT_TSFT_SEL_8822B(x) (((x) & BIT_MASK_TSFT_SEL_8822B) << BIT_SHIFT_TSFT_SEL_8822B)
-#define BIT_GET_TSFT_SEL_8822B(x) (((x) >> BIT_SHIFT_TSFT_SEL_8822B) & BIT_MASK_TSFT_SEL_8822B)

+#define BIT_GET_TSFT_SEL_8822B(x) (((x) >> BIT_SHIFT_TSFT_SEL_8822B) & BIT_MASK_TSFT_SEL_8822B)
+
 
 #define BIT_USB_HOST_PWR_OFF_EN_8822B BIT(12)
 #define BIT_SYM_LPS_BLOCK_EN_8822B BIT(11)
@@ -932,7 +1026,8 @@
 #define BIT_SHIFT_SDIO_PAD_E_8822B 5
 #define BIT_MASK_SDIO_PAD_E_8822B 0x7
 #define BIT_SDIO_PAD_E_8822B(x) (((x) & BIT_MASK_SDIO_PAD_E_8822B) << BIT_SHIFT_SDIO_PAD_E_8822B)
-#define BIT_GET_SDIO_PAD_E_8822B(x) (((x) >> BIT_SHIFT_SDIO_PAD_E_8822B) & BIT_MASK_SDIO_PAD_E_8822B)

+#define BIT_GET_SDIO_PAD_E_8822B(x) (((x) >> BIT_SHIFT_SDIO_PAD_E_8822B) & BIT_MASK_SDIO_PAD_E_8822B)
+
 
 #define BIT_USB_LPPLL_EN_8822B BIT(4)
 #define BIT_ROP_SW15_8822B BIT(2)
@@ -948,37 +1043,43 @@
 #define BIT_SHIFT_AUTO_ZCD_IN_CODE_8822B 21
 #define BIT_MASK_AUTO_ZCD_IN_CODE_8822B 0x1f
 #define BIT_AUTO_ZCD_IN_CODE_8822B(x) (((x) & BIT_MASK_AUTO_ZCD_IN_CODE_8822B) << BIT_SHIFT_AUTO_ZCD_IN_CODE_8822B)
-#define BIT_GET_AUTO_ZCD_IN_CODE_8822B(x) (((x) >> BIT_SHIFT_AUTO_ZCD_IN_CODE_8822B) & BIT_MASK_AUTO_ZCD_IN_CODE_8822B)

+#define BIT_GET_AUTO_ZCD_IN_CODE_8822B(x) (((x) >> BIT_SHIFT_AUTO_ZCD_IN_CODE_8822B) & BIT_MASK_AUTO_ZCD_IN_CODE_8822B)
+
 
 
 #define BIT_SHIFT_ZCD_CODE_IN_L_8822B 16
 #define BIT_MASK_ZCD_CODE_IN_L_8822B 0x1f
 #define BIT_ZCD_CODE_IN_L_8822B(x) (((x) & BIT_MASK_ZCD_CODE_IN_L_8822B) << BIT_SHIFT_ZCD_CODE_IN_L_8822B)
-#define BIT_GET_ZCD_CODE_IN_L_8822B(x) (((x) >> BIT_SHIFT_ZCD_CODE_IN_L_8822B) & BIT_MASK_ZCD_CODE_IN_L_8822B)

+#define BIT_GET_ZCD_CODE_IN_L_8822B(x) (((x) >> BIT_SHIFT_ZCD_CODE_IN_L_8822B) & BIT_MASK_ZCD_CODE_IN_L_8822B)
+
 
 
 #define BIT_SHIFT_LDO_HV5_DUMMY_8822B 14
 #define BIT_MASK_LDO_HV5_DUMMY_8822B 0x3
 #define BIT_LDO_HV5_DUMMY_8822B(x) (((x) & BIT_MASK_LDO_HV5_DUMMY_8822B) << BIT_SHIFT_LDO_HV5_DUMMY_8822B)
-#define BIT_GET_LDO_HV5_DUMMY_8822B(x) (((x) >> BIT_SHIFT_LDO_HV5_DUMMY_8822B) & BIT_MASK_LDO_HV5_DUMMY_8822B)

+#define BIT_GET_LDO_HV5_DUMMY_8822B(x) (((x) >> BIT_SHIFT_LDO_HV5_DUMMY_8822B) & BIT_MASK_LDO_HV5_DUMMY_8822B)
+
 
 
 #define BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8822B 12
 #define BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8822B 0x3
 #define BIT_REG_VTUNE33_BIT0_TO_BIT1_8822B(x) (((x) & BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8822B) << BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8822B)
-#define BIT_GET_REG_VTUNE33_BIT0_TO_BIT1_8822B(x) (((x) >> BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8822B) & BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8822B)

+#define BIT_GET_REG_VTUNE33_BIT0_TO_BIT1_8822B(x) (((x) >> BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8822B) & BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8822B)
+
 
 
 #define BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8822B 10
 #define BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8822B 0x3
 #define BIT_REG_STANDBY33_BIT0_TO_BIT1_8822B(x) (((x) & BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8822B) << BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8822B)
-#define BIT_GET_REG_STANDBY33_BIT0_TO_BIT1_8822B(x) (((x) >> BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8822B) & BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8822B)

+#define BIT_GET_REG_STANDBY33_BIT0_TO_BIT1_8822B(x) (((x) >> BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8822B) & BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8822B)
+
 
 
 #define BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8822B 8
 #define BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8822B 0x3
 #define BIT_REG_LOAD33_BIT0_TO_BIT1_8822B(x) (((x) & BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8822B) << BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8822B)
-#define BIT_GET_REG_LOAD33_BIT0_TO_BIT1_8822B(x) (((x) >> BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8822B) & BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8822B)

+#define BIT_GET_REG_LOAD33_BIT0_TO_BIT1_8822B(x) (((x) >> BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8822B) & BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8822B)
+
 
 #define BIT_REG_BYPASS_L_8822B BIT(7)
 #define BIT_REG_LDOF_L_8822B BIT(6)
@@ -988,7 +1089,8 @@
 #define BIT_SHIFT_CFC_L_8822B 1
 #define BIT_MASK_CFC_L_8822B 0x3
 #define BIT_CFC_L_8822B(x) (((x) & BIT_MASK_CFC_L_8822B) << BIT_SHIFT_CFC_L_8822B)
-#define BIT_GET_CFC_L_8822B(x) (((x) >> BIT_SHIFT_CFC_L_8822B) & BIT_MASK_CFC_L_8822B)

+#define BIT_GET_CFC_L_8822B(x) (((x) >> BIT_SHIFT_CFC_L_8822B) & BIT_MASK_CFC_L_8822B)
+
 
 #define BIT_REG_OCPS_L_V1_8822B BIT(0)
 
@@ -997,7 +1099,8 @@
 #define BIT_SHIFT_RPWM_8822B 24
 #define BIT_MASK_RPWM_8822B 0xff
 #define BIT_RPWM_8822B(x) (((x) & BIT_MASK_RPWM_8822B) << BIT_SHIFT_RPWM_8822B)
-#define BIT_GET_RPWM_8822B(x) (((x) >> BIT_SHIFT_RPWM_8822B) & BIT_MASK_RPWM_8822B)

+#define BIT_GET_RPWM_8822B(x) (((x) >> BIT_SHIFT_RPWM_8822B) & BIT_MASK_RPWM_8822B)
+
 
 #define BIT_ANA_PORT_EN_8822B BIT(22)
 #define BIT_MAC_PORT_EN_8822B BIT(21)
@@ -1007,7 +1110,8 @@
 #define BIT_SHIFT_ROM_PGE_8822B 16
 #define BIT_MASK_ROM_PGE_8822B 0x7
 #define BIT_ROM_PGE_8822B(x) (((x) & BIT_MASK_ROM_PGE_8822B) << BIT_SHIFT_ROM_PGE_8822B)
-#define BIT_GET_ROM_PGE_8822B(x) (((x) >> BIT_SHIFT_ROM_PGE_8822B) & BIT_MASK_ROM_PGE_8822B)

+#define BIT_GET_ROM_PGE_8822B(x) (((x) >> BIT_SHIFT_ROM_PGE_8822B) & BIT_MASK_ROM_PGE_8822B)
+
 
 #define BIT_FW_INIT_RDY_8822B BIT(15)
 #define BIT_FW_DW_RDY_8822B BIT(14)
@@ -1015,7 +1119,8 @@
 #define BIT_SHIFT_CPU_CLK_SEL_8822B 12
 #define BIT_MASK_CPU_CLK_SEL_8822B 0x3
 #define BIT_CPU_CLK_SEL_8822B(x) (((x) & BIT_MASK_CPU_CLK_SEL_8822B) << BIT_SHIFT_CPU_CLK_SEL_8822B)
-#define BIT_GET_CPU_CLK_SEL_8822B(x) (((x) >> BIT_SHIFT_CPU_CLK_SEL_8822B) & BIT_MASK_CPU_CLK_SEL_8822B)

+#define BIT_GET_CPU_CLK_SEL_8822B(x) (((x) >> BIT_SHIFT_CPU_CLK_SEL_8822B) & BIT_MASK_CPU_CLK_SEL_8822B)
+
 
 #define BIT_CCLK_CHG_MASK_8822B BIT(11)
 #define BIT_EMEM__TXBUF_CHKSUM_OK_8822B BIT(10)
@@ -1035,7 +1140,8 @@
 #define BIT_SHIFT_LBKTST_8822B 0
 #define BIT_MASK_LBKTST_8822B 0xffff
 #define BIT_LBKTST_8822B(x) (((x) & BIT_MASK_LBKTST_8822B) << BIT_SHIFT_LBKTST_8822B)
-#define BIT_GET_LBKTST_8822B(x) (((x) >> BIT_SHIFT_LBKTST_8822B) & BIT_MASK_LBKTST_8822B)

+#define BIT_GET_LBKTST_8822B(x) (((x) >> BIT_SHIFT_LBKTST_8822B) & BIT_MASK_LBKTST_8822B)
+
 
 
 /* 2 REG_HMEBOX_E0_E1_8822B */
@@ -1043,13 +1149,15 @@
 #define BIT_SHIFT_HOST_MSG_E1_8822B 16
 #define BIT_MASK_HOST_MSG_E1_8822B 0xffff
 #define BIT_HOST_MSG_E1_8822B(x) (((x) & BIT_MASK_HOST_MSG_E1_8822B) << BIT_SHIFT_HOST_MSG_E1_8822B)
-#define BIT_GET_HOST_MSG_E1_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_E1_8822B) & BIT_MASK_HOST_MSG_E1_8822B)

+#define BIT_GET_HOST_MSG_E1_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_E1_8822B) & BIT_MASK_HOST_MSG_E1_8822B)
+
 
 
 #define BIT_SHIFT_HOST_MSG_E0_8822B 0
 #define BIT_MASK_HOST_MSG_E0_8822B 0xffff
 #define BIT_HOST_MSG_E0_8822B(x) (((x) & BIT_MASK_HOST_MSG_E0_8822B) << BIT_SHIFT_HOST_MSG_E0_8822B)
-#define BIT_GET_HOST_MSG_E0_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_E0_8822B) & BIT_MASK_HOST_MSG_E0_8822B)

+#define BIT_GET_HOST_MSG_E0_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_E0_8822B) & BIT_MASK_HOST_MSG_E0_8822B)
+
 
 
 /* 2 REG_HMEBOX_E2_E3_8822B */
@@ -1057,13 +1165,15 @@
 #define BIT_SHIFT_HOST_MSG_E3_8822B 16
 #define BIT_MASK_HOST_MSG_E3_8822B 0xffff
 #define BIT_HOST_MSG_E3_8822B(x) (((x) & BIT_MASK_HOST_MSG_E3_8822B) << BIT_SHIFT_HOST_MSG_E3_8822B)
-#define BIT_GET_HOST_MSG_E3_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_E3_8822B) & BIT_MASK_HOST_MSG_E3_8822B)

+#define BIT_GET_HOST_MSG_E3_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_E3_8822B) & BIT_MASK_HOST_MSG_E3_8822B)
+
 
 
 #define BIT_SHIFT_HOST_MSG_E2_8822B 0
 #define BIT_MASK_HOST_MSG_E2_8822B 0xffff
 #define BIT_HOST_MSG_E2_8822B(x) (((x) & BIT_MASK_HOST_MSG_E2_8822B) << BIT_SHIFT_HOST_MSG_E2_8822B)
-#define BIT_GET_HOST_MSG_E2_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_E2_8822B) & BIT_MASK_HOST_MSG_E2_8822B)

+#define BIT_GET_HOST_MSG_E2_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_E2_8822B) & BIT_MASK_HOST_MSG_E2_8822B)
+
 
 
 /* 2 REG_WLLPS_CTRL_8822B */
@@ -1082,13 +1192,15 @@
 #define BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8822B 12
 #define BIT_MASK_LPLDH12_VADJ_STEP_DN_8822B 0xf
 #define BIT_LPLDH12_VADJ_STEP_DN_8822B(x) (((x) & BIT_MASK_LPLDH12_VADJ_STEP_DN_8822B) << BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8822B)
-#define BIT_GET_LPLDH12_VADJ_STEP_DN_8822B(x) (((x) >> BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8822B) & BIT_MASK_LPLDH12_VADJ_STEP_DN_8822B)

+#define BIT_GET_LPLDH12_VADJ_STEP_DN_8822B(x) (((x) >> BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8822B) & BIT_MASK_LPLDH12_VADJ_STEP_DN_8822B)
+
 
 
 #define BIT_SHIFT_V15ADJ_L1_STEP_DN_8822B 8
 #define BIT_MASK_V15ADJ_L1_STEP_DN_8822B 0x7
 #define BIT_V15ADJ_L1_STEP_DN_8822B(x) (((x) & BIT_MASK_V15ADJ_L1_STEP_DN_8822B) << BIT_SHIFT_V15ADJ_L1_STEP_DN_8822B)
-#define BIT_GET_V15ADJ_L1_STEP_DN_8822B(x) (((x) >> BIT_SHIFT_V15ADJ_L1_STEP_DN_8822B) & BIT_MASK_V15ADJ_L1_STEP_DN_8822B)

+#define BIT_GET_V15ADJ_L1_STEP_DN_8822B(x) (((x) >> BIT_SHIFT_V15ADJ_L1_STEP_DN_8822B) & BIT_MASK_V15ADJ_L1_STEP_DN_8822B)
+
 
 #define BIT_REGU_32K_CLK_EN_8822B BIT(1)
 #define BIT_WL_LPS_EN_8822B BIT(0)
@@ -1101,25 +1213,29 @@
 #define BIT_SHIFT_REF_SEL_8822B 25
 #define BIT_MASK_REF_SEL_8822B 0xf
 #define BIT_REF_SEL_8822B(x) (((x) & BIT_MASK_REF_SEL_8822B) << BIT_SHIFT_REF_SEL_8822B)
-#define BIT_GET_REF_SEL_8822B(x) (((x) >> BIT_SHIFT_REF_SEL_8822B) & BIT_MASK_REF_SEL_8822B)

+#define BIT_GET_REF_SEL_8822B(x) (((x) >> BIT_SHIFT_REF_SEL_8822B) & BIT_MASK_REF_SEL_8822B)
+
 
 
 #define BIT_SHIFT_F0F_SDM_8822B 12
 #define BIT_MASK_F0F_SDM_8822B 0x1fff
 #define BIT_F0F_SDM_8822B(x) (((x) & BIT_MASK_F0F_SDM_8822B) << BIT_SHIFT_F0F_SDM_8822B)
-#define BIT_GET_F0F_SDM_8822B(x) (((x) >> BIT_SHIFT_F0F_SDM_8822B) & BIT_MASK_F0F_SDM_8822B)

+#define BIT_GET_F0F_SDM_8822B(x) (((x) >> BIT_SHIFT_F0F_SDM_8822B) & BIT_MASK_F0F_SDM_8822B)
+
 
 
 #define BIT_SHIFT_F0N_SDM_8822B 9
 #define BIT_MASK_F0N_SDM_8822B 0x7
 #define BIT_F0N_SDM_8822B(x) (((x) & BIT_MASK_F0N_SDM_8822B) << BIT_SHIFT_F0N_SDM_8822B)
-#define BIT_GET_F0N_SDM_8822B(x) (((x) >> BIT_SHIFT_F0N_SDM_8822B) & BIT_MASK_F0N_SDM_8822B)

+#define BIT_GET_F0N_SDM_8822B(x) (((x) >> BIT_SHIFT_F0N_SDM_8822B) & BIT_MASK_F0N_SDM_8822B)
+
 
 
 #define BIT_SHIFT_DIVN_SDM_8822B 3
 #define BIT_MASK_DIVN_SDM_8822B 0x3f
 #define BIT_DIVN_SDM_8822B(x) (((x) & BIT_MASK_DIVN_SDM_8822B) << BIT_SHIFT_DIVN_SDM_8822B)
-#define BIT_GET_DIVN_SDM_8822B(x) (((x) >> BIT_SHIFT_DIVN_SDM_8822B) & BIT_MASK_DIVN_SDM_8822B)

+#define BIT_GET_DIVN_SDM_8822B(x) (((x) >> BIT_SHIFT_DIVN_SDM_8822B) & BIT_MASK_DIVN_SDM_8822B)
+
 
 
 /* 2 REG_GPIO_DEBOUNCE_CTRL_8822B */
@@ -1128,14 +1244,16 @@
 #define BIT_SHIFT_WLGP_DBC1_8822B 8
 #define BIT_MASK_WLGP_DBC1_8822B 0xf
 #define BIT_WLGP_DBC1_8822B(x) (((x) & BIT_MASK_WLGP_DBC1_8822B) << BIT_SHIFT_WLGP_DBC1_8822B)
-#define BIT_GET_WLGP_DBC1_8822B(x) (((x) >> BIT_SHIFT_WLGP_DBC1_8822B) & BIT_MASK_WLGP_DBC1_8822B)

+#define BIT_GET_WLGP_DBC1_8822B(x) (((x) >> BIT_SHIFT_WLGP_DBC1_8822B) & BIT_MASK_WLGP_DBC1_8822B)
+
 
 #define BIT_WLGP_DBC0EN_8822B BIT(7)
 
 #define BIT_SHIFT_WLGP_DBC0_8822B 0
 #define BIT_MASK_WLGP_DBC0_8822B 0xf
 #define BIT_WLGP_DBC0_8822B(x) (((x) & BIT_MASK_WLGP_DBC0_8822B) << BIT_SHIFT_WLGP_DBC0_8822B)
-#define BIT_GET_WLGP_DBC0_8822B(x) (((x) >> BIT_SHIFT_WLGP_DBC0_8822B) & BIT_MASK_WLGP_DBC0_8822B)

+#define BIT_GET_WLGP_DBC0_8822B(x) (((x) >> BIT_SHIFT_WLGP_DBC0_8822B) & BIT_MASK_WLGP_DBC0_8822B)
+
 
 
 /* 2 REG_RPWM2_8822B */
@@ -1143,7 +1261,8 @@
 #define BIT_SHIFT_RPWM2_8822B 16
 #define BIT_MASK_RPWM2_8822B 0xffff
 #define BIT_RPWM2_8822B(x) (((x) & BIT_MASK_RPWM2_8822B) << BIT_SHIFT_RPWM2_8822B)
-#define BIT_GET_RPWM2_8822B(x) (((x) >> BIT_SHIFT_RPWM2_8822B) & BIT_MASK_RPWM2_8822B)

+#define BIT_GET_RPWM2_8822B(x) (((x) >> BIT_SHIFT_RPWM2_8822B) & BIT_MASK_RPWM2_8822B)
+
 
 
 /* 2 REG_SYSON_FSM_MON_8822B */
@@ -1151,7 +1270,8 @@
 #define BIT_SHIFT_FSM_MON_SEL_8822B 24
 #define BIT_MASK_FSM_MON_SEL_8822B 0x7
 #define BIT_FSM_MON_SEL_8822B(x) (((x) & BIT_MASK_FSM_MON_SEL_8822B) << BIT_SHIFT_FSM_MON_SEL_8822B)
-#define BIT_GET_FSM_MON_SEL_8822B(x) (((x) >> BIT_SHIFT_FSM_MON_SEL_8822B) & BIT_MASK_FSM_MON_SEL_8822B)

+#define BIT_GET_FSM_MON_SEL_8822B(x) (((x) >> BIT_SHIFT_FSM_MON_SEL_8822B) & BIT_MASK_FSM_MON_SEL_8822B)
+
 
 #define BIT_DOP_ELDO_8822B BIT(23)
 #define BIT_FSM_MON_UPD_8822B BIT(15)
@@ -1159,7 +1279,8 @@
 #define BIT_SHIFT_FSM_PAR_8822B 0
 #define BIT_MASK_FSM_PAR_8822B 0x7fff
 #define BIT_FSM_PAR_8822B(x) (((x) & BIT_MASK_FSM_PAR_8822B) << BIT_SHIFT_FSM_PAR_8822B)
-#define BIT_GET_FSM_PAR_8822B(x) (((x) >> BIT_SHIFT_FSM_PAR_8822B) & BIT_MASK_FSM_PAR_8822B)

+#define BIT_GET_FSM_PAR_8822B(x) (((x) >> BIT_SHIFT_FSM_PAR_8822B) & BIT_MASK_FSM_PAR_8822B)
+
 
 
 /* 2 REG_AFE_CTRL6_8822B */
@@ -1167,7 +1288,8 @@
 #define BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B 0
 #define BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B 0x7
 #define BIT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B(x) (((x) & BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B) << BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B)
-#define BIT_GET_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B(x) (((x) >> BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B) & BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B)

+#define BIT_GET_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B(x) (((x) >> BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B) & BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8822B)
+
 
 
 /* 2 REG_PMC_DBG_CTRL1_8822B */
@@ -1176,14 +1298,16 @@
 #define BIT_SHIFT_RD_WR_WIFI_BT_INFO_8822B 16
 #define BIT_MASK_RD_WR_WIFI_BT_INFO_8822B 0x7fff
 #define BIT_RD_WR_WIFI_BT_INFO_8822B(x) (((x) & BIT_MASK_RD_WR_WIFI_BT_INFO_8822B) << BIT_SHIFT_RD_WR_WIFI_BT_INFO_8822B)
-#define BIT_GET_RD_WR_WIFI_BT_INFO_8822B(x) (((x) >> BIT_SHIFT_RD_WR_WIFI_BT_INFO_8822B) & BIT_MASK_RD_WR_WIFI_BT_INFO_8822B)

+#define BIT_GET_RD_WR_WIFI_BT_INFO_8822B(x) (((x) >> BIT_SHIFT_RD_WR_WIFI_BT_INFO_8822B) & BIT_MASK_RD_WR_WIFI_BT_INFO_8822B)
+
 
 #define BIT_PMC_WR_OVF_8822B BIT(8)
 
 #define BIT_SHIFT_WLPMC_ERRINT_8822B 0
 #define BIT_MASK_WLPMC_ERRINT_8822B 0xff
 #define BIT_WLPMC_ERRINT_8822B(x) (((x) & BIT_MASK_WLPMC_ERRINT_8822B) << BIT_SHIFT_WLPMC_ERRINT_8822B)
-#define BIT_GET_WLPMC_ERRINT_8822B(x) (((x) >> BIT_SHIFT_WLPMC_ERRINT_8822B) & BIT_MASK_WLPMC_ERRINT_8822B)

+#define BIT_GET_WLPMC_ERRINT_8822B(x) (((x) >> BIT_SHIFT_WLPMC_ERRINT_8822B) & BIT_MASK_WLPMC_ERRINT_8822B)
+
 
 
 /* 2 REG_AFE_CTRL7_8822B */
@@ -1191,14 +1315,16 @@
 #define BIT_SHIFT_SEL_V_8822B 30
 #define BIT_MASK_SEL_V_8822B 0x3
 #define BIT_SEL_V_8822B(x) (((x) & BIT_MASK_SEL_V_8822B) << BIT_SHIFT_SEL_V_8822B)
-#define BIT_GET_SEL_V_8822B(x) (((x) >> BIT_SHIFT_SEL_V_8822B) & BIT_MASK_SEL_V_8822B)

+#define BIT_GET_SEL_V_8822B(x) (((x) >> BIT_SHIFT_SEL_V_8822B) & BIT_MASK_SEL_V_8822B)
+
 
 #define BIT_SEL_LDO_PC_8822B BIT(29)
 
 #define BIT_SHIFT_CK_MON_SEL_8822B 26
 #define BIT_MASK_CK_MON_SEL_8822B 0x7
 #define BIT_CK_MON_SEL_8822B(x) (((x) & BIT_MASK_CK_MON_SEL_8822B) << BIT_SHIFT_CK_MON_SEL_8822B)
-#define BIT_GET_CK_MON_SEL_8822B(x) (((x) >> BIT_SHIFT_CK_MON_SEL_8822B) & BIT_MASK_CK_MON_SEL_8822B)

+#define BIT_GET_CK_MON_SEL_8822B(x) (((x) >> BIT_SHIFT_CK_MON_SEL_8822B) & BIT_MASK_CK_MON_SEL_8822B)
+
 
 #define BIT_CK_MON_EN_8822B BIT(25)
 #define BIT_FREF_EDGE_8822B BIT(24)
@@ -1325,7 +1451,8 @@
 #define BIT_SHIFT_DEBUG_ST_8822B 0
 #define BIT_MASK_DEBUG_ST_8822B 0xffffffffL
 #define BIT_DEBUG_ST_8822B(x) (((x) & BIT_MASK_DEBUG_ST_8822B) << BIT_SHIFT_DEBUG_ST_8822B)
-#define BIT_GET_DEBUG_ST_8822B(x) (((x) >> BIT_SHIFT_DEBUG_ST_8822B) & BIT_MASK_DEBUG_ST_8822B)

+#define BIT_GET_DEBUG_ST_8822B(x) (((x) >> BIT_SHIFT_DEBUG_ST_8822B) & BIT_MASK_DEBUG_ST_8822B)
+
 
 
 /* 2 REG_PAD_CTRL2_8822B */
@@ -1334,7 +1461,8 @@
 #define BIT_SHIFT_USB23_SW_MODE_V1_8822B 18
 #define BIT_MASK_USB23_SW_MODE_V1_8822B 0x3
 #define BIT_USB23_SW_MODE_V1_8822B(x) (((x) & BIT_MASK_USB23_SW_MODE_V1_8822B) << BIT_SHIFT_USB23_SW_MODE_V1_8822B)
-#define BIT_GET_USB23_SW_MODE_V1_8822B(x) (((x) >> BIT_SHIFT_USB23_SW_MODE_V1_8822B) & BIT_MASK_USB23_SW_MODE_V1_8822B)

+#define BIT_GET_USB23_SW_MODE_V1_8822B(x) (((x) >> BIT_SHIFT_USB23_SW_MODE_V1_8822B) & BIT_MASK_USB23_SW_MODE_V1_8822B)
+
 
 #define BIT_NO_PDN_CHIPOFF_V1_8822B BIT(17)
 #define BIT_RSM_EN_V1_8822B BIT(16)
@@ -1342,7 +1470,8 @@
 #define BIT_SHIFT_MATCH_CNT_8822B 8
 #define BIT_MASK_MATCH_CNT_8822B 0xff
 #define BIT_MATCH_CNT_8822B(x) (((x) & BIT_MASK_MATCH_CNT_8822B) << BIT_SHIFT_MATCH_CNT_8822B)
-#define BIT_GET_MATCH_CNT_8822B(x) (((x) >> BIT_SHIFT_MATCH_CNT_8822B) & BIT_MASK_MATCH_CNT_8822B)

+#define BIT_GET_MATCH_CNT_8822B(x) (((x) >> BIT_SHIFT_MATCH_CNT_8822B) & BIT_MASK_MATCH_CNT_8822B)
+
 
 #define BIT_LD_B12V_EN_8822B BIT(7)
 #define BIT_EECS_IOSEL_V1_8822B BIT(6)
@@ -1359,7 +1488,8 @@
 #define BIT_SHIFT_EFUSE_BURN_GNT_8822B 24
 #define BIT_MASK_EFUSE_BURN_GNT_8822B 0xff
 #define BIT_EFUSE_BURN_GNT_8822B(x) (((x) & BIT_MASK_EFUSE_BURN_GNT_8822B) << BIT_SHIFT_EFUSE_BURN_GNT_8822B)
-#define BIT_GET_EFUSE_BURN_GNT_8822B(x) (((x) >> BIT_SHIFT_EFUSE_BURN_GNT_8822B) & BIT_MASK_EFUSE_BURN_GNT_8822B)

+#define BIT_GET_EFUSE_BURN_GNT_8822B(x) (((x) >> BIT_SHIFT_EFUSE_BURN_GNT_8822B) & BIT_MASK_EFUSE_BURN_GNT_8822B)
+
 
 #define BIT_STOP_WL_PMC_8822B BIT(9)
 #define BIT_STOP_SYM_PMC_8822B BIT(8)
@@ -1371,7 +1501,8 @@
 #define BIT_SHIFT_SYSON_REG_ARB_8822B 0
 #define BIT_MASK_SYSON_REG_ARB_8822B 0x3
 #define BIT_SYSON_REG_ARB_8822B(x) (((x) & BIT_MASK_SYSON_REG_ARB_8822B) << BIT_SHIFT_SYSON_REG_ARB_8822B)
-#define BIT_GET_SYSON_REG_ARB_8822B(x) (((x) >> BIT_SHIFT_SYSON_REG_ARB_8822B) & BIT_MASK_SYSON_REG_ARB_8822B)

+#define BIT_GET_SYSON_REG_ARB_8822B(x) (((x) >> BIT_SHIFT_SYSON_REG_ARB_8822B) & BIT_MASK_SYSON_REG_ARB_8822B)
+
 
 
 /* 2 REG_BIST_CTRL_8822B */
@@ -1383,7 +1514,8 @@
 #define BIT_SHIFT_BIST_RPT_SEL_8822B 16
 #define BIT_MASK_BIST_RPT_SEL_8822B 0xf
 #define BIT_BIST_RPT_SEL_8822B(x) (((x) & BIT_MASK_BIST_RPT_SEL_8822B) << BIT_SHIFT_BIST_RPT_SEL_8822B)
-#define BIT_GET_BIST_RPT_SEL_8822B(x) (((x) >> BIT_SHIFT_BIST_RPT_SEL_8822B) & BIT_MASK_BIST_RPT_SEL_8822B)

+#define BIT_GET_BIST_RPT_SEL_8822B(x) (((x) >> BIT_SHIFT_BIST_RPT_SEL_8822B) & BIT_MASK_BIST_RPT_SEL_8822B)
+
 
 #define BIT_BIST_RESUME_PS_8822B BIT(4)
 #define BIT_BIST_RESUME_8822B BIT(3)
@@ -1396,7 +1528,8 @@
 #define BIT_SHIFT_MBIST_REPORT_8822B 0
 #define BIT_MASK_MBIST_REPORT_8822B 0xffffffffL
 #define BIT_MBIST_REPORT_8822B(x) (((x) & BIT_MASK_MBIST_REPORT_8822B) << BIT_SHIFT_MBIST_REPORT_8822B)
-#define BIT_GET_MBIST_REPORT_8822B(x) (((x) >> BIT_SHIFT_MBIST_REPORT_8822B) & BIT_MASK_MBIST_REPORT_8822B)

+#define BIT_GET_MBIST_REPORT_8822B(x) (((x) >> BIT_SHIFT_MBIST_REPORT_8822B) & BIT_MASK_MBIST_REPORT_8822B)
+
 
 
 /* 2 REG_MEM_CTRL_8822B */
@@ -1405,43 +1538,50 @@
 #define BIT_SHIFT_BT_SPRAM_8822B 28
 #define BIT_MASK_BT_SPRAM_8822B 0x3
 #define BIT_BT_SPRAM_8822B(x) (((x) & BIT_MASK_BT_SPRAM_8822B) << BIT_SHIFT_BT_SPRAM_8822B)
-#define BIT_GET_BT_SPRAM_8822B(x) (((x) >> BIT_SHIFT_BT_SPRAM_8822B) & BIT_MASK_BT_SPRAM_8822B)

+#define BIT_GET_BT_SPRAM_8822B(x) (((x) >> BIT_SHIFT_BT_SPRAM_8822B) & BIT_MASK_BT_SPRAM_8822B)
+
 
 
 #define BIT_SHIFT_BT_ROM_8822B 24
 #define BIT_MASK_BT_ROM_8822B 0xf
 #define BIT_BT_ROM_8822B(x) (((x) & BIT_MASK_BT_ROM_8822B) << BIT_SHIFT_BT_ROM_8822B)
-#define BIT_GET_BT_ROM_8822B(x) (((x) >> BIT_SHIFT_BT_ROM_8822B) & BIT_MASK_BT_ROM_8822B)

+#define BIT_GET_BT_ROM_8822B(x) (((x) >> BIT_SHIFT_BT_ROM_8822B) & BIT_MASK_BT_ROM_8822B)
+
 
 
 #define BIT_SHIFT_PCI_DPRAM_8822B 10
 #define BIT_MASK_PCI_DPRAM_8822B 0x3
 #define BIT_PCI_DPRAM_8822B(x) (((x) & BIT_MASK_PCI_DPRAM_8822B) << BIT_SHIFT_PCI_DPRAM_8822B)
-#define BIT_GET_PCI_DPRAM_8822B(x) (((x) >> BIT_SHIFT_PCI_DPRAM_8822B) & BIT_MASK_PCI_DPRAM_8822B)

+#define BIT_GET_PCI_DPRAM_8822B(x) (((x) >> BIT_SHIFT_PCI_DPRAM_8822B) & BIT_MASK_PCI_DPRAM_8822B)
+
 
 
 #define BIT_SHIFT_PCI_SPRAM_8822B 8
 #define BIT_MASK_PCI_SPRAM_8822B 0x3
 #define BIT_PCI_SPRAM_8822B(x) (((x) & BIT_MASK_PCI_SPRAM_8822B) << BIT_SHIFT_PCI_SPRAM_8822B)
-#define BIT_GET_PCI_SPRAM_8822B(x) (((x) >> BIT_SHIFT_PCI_SPRAM_8822B) & BIT_MASK_PCI_SPRAM_8822B)

+#define BIT_GET_PCI_SPRAM_8822B(x) (((x) >> BIT_SHIFT_PCI_SPRAM_8822B) & BIT_MASK_PCI_SPRAM_8822B)
+
 
 
 #define BIT_SHIFT_USB_SPRAM_8822B 6
 #define BIT_MASK_USB_SPRAM_8822B 0x3
 #define BIT_USB_SPRAM_8822B(x) (((x) & BIT_MASK_USB_SPRAM_8822B) << BIT_SHIFT_USB_SPRAM_8822B)
-#define BIT_GET_USB_SPRAM_8822B(x) (((x) >> BIT_SHIFT_USB_SPRAM_8822B) & BIT_MASK_USB_SPRAM_8822B)

+#define BIT_GET_USB_SPRAM_8822B(x) (((x) >> BIT_SHIFT_USB_SPRAM_8822B) & BIT_MASK_USB_SPRAM_8822B)
+
 
 
 #define BIT_SHIFT_USB_SPRF_8822B 4
 #define BIT_MASK_USB_SPRF_8822B 0x3
 #define BIT_USB_SPRF_8822B(x) (((x) & BIT_MASK_USB_SPRF_8822B) << BIT_SHIFT_USB_SPRF_8822B)
-#define BIT_GET_USB_SPRF_8822B(x) (((x) >> BIT_SHIFT_USB_SPRF_8822B) & BIT_MASK_USB_SPRF_8822B)

+#define BIT_GET_USB_SPRF_8822B(x) (((x) >> BIT_SHIFT_USB_SPRF_8822B) & BIT_MASK_USB_SPRF_8822B)
+
 
 
 #define BIT_SHIFT_MCU_ROM_8822B 0
 #define BIT_MASK_MCU_ROM_8822B 0xf
 #define BIT_MCU_ROM_8822B(x) (((x) & BIT_MASK_MCU_ROM_8822B) << BIT_SHIFT_MCU_ROM_8822B)
-#define BIT_GET_MCU_ROM_8822B(x) (((x) >> BIT_SHIFT_MCU_ROM_8822B) & BIT_MASK_MCU_ROM_8822B)

+#define BIT_GET_MCU_ROM_8822B(x) (((x) >> BIT_SHIFT_MCU_ROM_8822B) & BIT_MASK_MCU_ROM_8822B)
+
 
 
 /* 2 REG_AFE_CTRL8_8822B */
@@ -1452,7 +1592,8 @@
 #define BIT_SHIFT_XTAL_SEL_TOK_8822B 0
 #define BIT_MASK_XTAL_SEL_TOK_8822B 0x7
 #define BIT_XTAL_SEL_TOK_8822B(x) (((x) & BIT_MASK_XTAL_SEL_TOK_8822B) << BIT_SHIFT_XTAL_SEL_TOK_8822B)
-#define BIT_GET_XTAL_SEL_TOK_8822B(x) (((x) >> BIT_SHIFT_XTAL_SEL_TOK_8822B) & BIT_MASK_XTAL_SEL_TOK_8822B)

+#define BIT_GET_XTAL_SEL_TOK_8822B(x) (((x) >> BIT_SHIFT_XTAL_SEL_TOK_8822B) & BIT_MASK_XTAL_SEL_TOK_8822B)
+
 
 
 /* 2 REG_USB_SIE_INTF_8822B */
@@ -1464,19 +1605,22 @@
 #define BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8822B 16
 #define BIT_MASK_USB_SIE_INTF_ADDR_V1_8822B 0x1ff
 #define BIT_USB_SIE_INTF_ADDR_V1_8822B(x) (((x) & BIT_MASK_USB_SIE_INTF_ADDR_V1_8822B) << BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8822B)
-#define BIT_GET_USB_SIE_INTF_ADDR_V1_8822B(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8822B) & BIT_MASK_USB_SIE_INTF_ADDR_V1_8822B)

+#define BIT_GET_USB_SIE_INTF_ADDR_V1_8822B(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8822B) & BIT_MASK_USB_SIE_INTF_ADDR_V1_8822B)
+
 
 
 #define BIT_SHIFT_USB_SIE_INTF_RD_8822B 8
 #define BIT_MASK_USB_SIE_INTF_RD_8822B 0xff
 #define BIT_USB_SIE_INTF_RD_8822B(x) (((x) & BIT_MASK_USB_SIE_INTF_RD_8822B) << BIT_SHIFT_USB_SIE_INTF_RD_8822B)
-#define BIT_GET_USB_SIE_INTF_RD_8822B(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_RD_8822B) & BIT_MASK_USB_SIE_INTF_RD_8822B)

+#define BIT_GET_USB_SIE_INTF_RD_8822B(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_RD_8822B) & BIT_MASK_USB_SIE_INTF_RD_8822B)
+
 
 
 #define BIT_SHIFT_USB_SIE_INTF_WD_8822B 0
 #define BIT_MASK_USB_SIE_INTF_WD_8822B 0xff
 #define BIT_USB_SIE_INTF_WD_8822B(x) (((x) & BIT_MASK_USB_SIE_INTF_WD_8822B) << BIT_SHIFT_USB_SIE_INTF_WD_8822B)
-#define BIT_GET_USB_SIE_INTF_WD_8822B(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_WD_8822B) & BIT_MASK_USB_SIE_INTF_WD_8822B)

+#define BIT_GET_USB_SIE_INTF_WD_8822B(x) (((x) >> BIT_SHIFT_USB_SIE_INTF_WD_8822B) & BIT_MASK_USB_SIE_INTF_WD_8822B)
+
 
 
 /* 2 REG_PCIE_MIO_INTF_8822B */
@@ -1486,13 +1630,15 @@
 #define BIT_SHIFT_PCIE_MIO_WE_8822B 8
 #define BIT_MASK_PCIE_MIO_WE_8822B 0xf
 #define BIT_PCIE_MIO_WE_8822B(x) (((x) & BIT_MASK_PCIE_MIO_WE_8822B) << BIT_SHIFT_PCIE_MIO_WE_8822B)
-#define BIT_GET_PCIE_MIO_WE_8822B(x) (((x) >> BIT_SHIFT_PCIE_MIO_WE_8822B) & BIT_MASK_PCIE_MIO_WE_8822B)

+#define BIT_GET_PCIE_MIO_WE_8822B(x) (((x) >> BIT_SHIFT_PCIE_MIO_WE_8822B) & BIT_MASK_PCIE_MIO_WE_8822B)
+
 
 
 #define BIT_SHIFT_PCIE_MIO_ADDR_8822B 0
 #define BIT_MASK_PCIE_MIO_ADDR_8822B 0xff
 #define BIT_PCIE_MIO_ADDR_8822B(x) (((x) & BIT_MASK_PCIE_MIO_ADDR_8822B) << BIT_SHIFT_PCIE_MIO_ADDR_8822B)
-#define BIT_GET_PCIE_MIO_ADDR_8822B(x) (((x) >> BIT_SHIFT_PCIE_MIO_ADDR_8822B) & BIT_MASK_PCIE_MIO_ADDR_8822B)

+#define BIT_GET_PCIE_MIO_ADDR_8822B(x) (((x) >> BIT_SHIFT_PCIE_MIO_ADDR_8822B) & BIT_MASK_PCIE_MIO_ADDR_8822B)
+
 
 
 /* 2 REG_PCIE_MIO_INTD_8822B */
@@ -1500,7 +1646,8 @@
 #define BIT_SHIFT_PCIE_MIO_DATA_8822B 0
 #define BIT_MASK_PCIE_MIO_DATA_8822B 0xffffffffL
 #define BIT_PCIE_MIO_DATA_8822B(x) (((x) & BIT_MASK_PCIE_MIO_DATA_8822B) << BIT_SHIFT_PCIE_MIO_DATA_8822B)
-#define BIT_GET_PCIE_MIO_DATA_8822B(x) (((x) >> BIT_SHIFT_PCIE_MIO_DATA_8822B) & BIT_MASK_PCIE_MIO_DATA_8822B)

+#define BIT_GET_PCIE_MIO_DATA_8822B(x) (((x) >> BIT_SHIFT_PCIE_MIO_DATA_8822B) & BIT_MASK_PCIE_MIO_DATA_8822B)
+
 
 
 /* 2 REG_WLRF1_8822B */
@@ -1508,7 +1655,8 @@
 #define BIT_SHIFT_WLRF1_CTRL_8822B 24
 #define BIT_MASK_WLRF1_CTRL_8822B 0xff
 #define BIT_WLRF1_CTRL_8822B(x) (((x) & BIT_MASK_WLRF1_CTRL_8822B) << BIT_SHIFT_WLRF1_CTRL_8822B)
-#define BIT_GET_WLRF1_CTRL_8822B(x) (((x) >> BIT_SHIFT_WLRF1_CTRL_8822B) & BIT_MASK_WLRF1_CTRL_8822B)

+#define BIT_GET_WLRF1_CTRL_8822B(x) (((x) >> BIT_SHIFT_WLRF1_CTRL_8822B) & BIT_MASK_WLRF1_CTRL_8822B)
+
 
 
 /* 2 REG_SYS_CFG1_8822B */
@@ -1516,7 +1664,8 @@
 #define BIT_SHIFT_TRP_ICFG_8822B 28
 #define BIT_MASK_TRP_ICFG_8822B 0xf
 #define BIT_TRP_ICFG_8822B(x) (((x) & BIT_MASK_TRP_ICFG_8822B) << BIT_SHIFT_TRP_ICFG_8822B)
-#define BIT_GET_TRP_ICFG_8822B(x) (((x) >> BIT_SHIFT_TRP_ICFG_8822B) & BIT_MASK_TRP_ICFG_8822B)

+#define BIT_GET_TRP_ICFG_8822B(x) (((x) >> BIT_SHIFT_TRP_ICFG_8822B) & BIT_MASK_TRP_ICFG_8822B)
+
 
 #define BIT_RF_TYPE_ID_8822B BIT(27)
 #define BIT_BD_HCI_SEL_8822B BIT(26)
@@ -1529,13 +1678,15 @@
 #define BIT_SHIFT_VENDOR_ID_8822B 16
 #define BIT_MASK_VENDOR_ID_8822B 0xf
 #define BIT_VENDOR_ID_8822B(x) (((x) & BIT_MASK_VENDOR_ID_8822B) << BIT_SHIFT_VENDOR_ID_8822B)
-#define BIT_GET_VENDOR_ID_8822B(x) (((x) >> BIT_SHIFT_VENDOR_ID_8822B) & BIT_MASK_VENDOR_ID_8822B)

+#define BIT_GET_VENDOR_ID_8822B(x) (((x) >> BIT_SHIFT_VENDOR_ID_8822B) & BIT_MASK_VENDOR_ID_8822B)
+
 
 
 #define BIT_SHIFT_CHIP_VER_8822B 12
 #define BIT_MASK_CHIP_VER_8822B 0xf
 #define BIT_CHIP_VER_8822B(x) (((x) & BIT_MASK_CHIP_VER_8822B) << BIT_SHIFT_CHIP_VER_8822B)
-#define BIT_GET_CHIP_VER_8822B(x) (((x) >> BIT_SHIFT_CHIP_VER_8822B) & BIT_MASK_CHIP_VER_8822B)

+#define BIT_GET_CHIP_VER_8822B(x) (((x) >> BIT_SHIFT_CHIP_VER_8822B) & BIT_MASK_CHIP_VER_8822B)
+
 
 #define BIT_BD_MAC3_8822B BIT(11)
 #define BIT_BD_MAC1_8822B BIT(10)
@@ -1555,20 +1706,23 @@
 #define BIT_SHIFT_RF_RL_ID_8822B 28
 #define BIT_MASK_RF_RL_ID_8822B 0xf
 #define BIT_RF_RL_ID_8822B(x) (((x) & BIT_MASK_RF_RL_ID_8822B) << BIT_SHIFT_RF_RL_ID_8822B)
-#define BIT_GET_RF_RL_ID_8822B(x) (((x) >> BIT_SHIFT_RF_RL_ID_8822B) & BIT_MASK_RF_RL_ID_8822B)

+#define BIT_GET_RF_RL_ID_8822B(x) (((x) >> BIT_SHIFT_RF_RL_ID_8822B) & BIT_MASK_RF_RL_ID_8822B)
+
 
 #define BIT_HPHY_ICFG_8822B BIT(19)
 
 #define BIT_SHIFT_SEL_0XC0_8822B 16
 #define BIT_MASK_SEL_0XC0_8822B 0x3
 #define BIT_SEL_0XC0_8822B(x) (((x) & BIT_MASK_SEL_0XC0_8822B) << BIT_SHIFT_SEL_0XC0_8822B)
-#define BIT_GET_SEL_0XC0_8822B(x) (((x) >> BIT_SHIFT_SEL_0XC0_8822B) & BIT_MASK_SEL_0XC0_8822B)

+#define BIT_GET_SEL_0XC0_8822B(x) (((x) >> BIT_SHIFT_SEL_0XC0_8822B) & BIT_MASK_SEL_0XC0_8822B)
+
 
 
 #define BIT_SHIFT_HCI_SEL_V3_8822B 12
 #define BIT_MASK_HCI_SEL_V3_8822B 0x7
 #define BIT_HCI_SEL_V3_8822B(x) (((x) & BIT_MASK_HCI_SEL_V3_8822B) << BIT_SHIFT_HCI_SEL_V3_8822B)
-#define BIT_GET_HCI_SEL_V3_8822B(x) (((x) >> BIT_SHIFT_HCI_SEL_V3_8822B) & BIT_MASK_HCI_SEL_V3_8822B)

+#define BIT_GET_HCI_SEL_V3_8822B(x) (((x) >> BIT_SHIFT_HCI_SEL_V3_8822B) & BIT_MASK_HCI_SEL_V3_8822B)
+
 
 #define BIT_USB_OPERATION_MODE_8822B BIT(10)
 #define BIT_BT_PDN_8822B BIT(9)
@@ -1579,13 +1733,15 @@
 #define BIT_SHIFT_PAD_HCI_SEL_V1_8822B 3
 #define BIT_MASK_PAD_HCI_SEL_V1_8822B 0x7
 #define BIT_PAD_HCI_SEL_V1_8822B(x) (((x) & BIT_MASK_PAD_HCI_SEL_V1_8822B) << BIT_SHIFT_PAD_HCI_SEL_V1_8822B)
-#define BIT_GET_PAD_HCI_SEL_V1_8822B(x) (((x) >> BIT_SHIFT_PAD_HCI_SEL_V1_8822B) & BIT_MASK_PAD_HCI_SEL_V1_8822B)

+#define BIT_GET_PAD_HCI_SEL_V1_8822B(x) (((x) >> BIT_SHIFT_PAD_HCI_SEL_V1_8822B) & BIT_MASK_PAD_HCI_SEL_V1_8822B)
+
 
 
 #define BIT_SHIFT_EFS_HCI_SEL_V1_8822B 0
 #define BIT_MASK_EFS_HCI_SEL_V1_8822B 0x7
 #define BIT_EFS_HCI_SEL_V1_8822B(x) (((x) & BIT_MASK_EFS_HCI_SEL_V1_8822B) << BIT_SHIFT_EFS_HCI_SEL_V1_8822B)
-#define BIT_GET_EFS_HCI_SEL_V1_8822B(x) (((x) >> BIT_SHIFT_EFS_HCI_SEL_V1_8822B) & BIT_MASK_EFS_HCI_SEL_V1_8822B)

+#define BIT_GET_EFS_HCI_SEL_V1_8822B(x) (((x) >> BIT_SHIFT_EFS_HCI_SEL_V1_8822B) & BIT_MASK_EFS_HCI_SEL_V1_8822B)
+
 
 
 /* 2 REG_SYS_STATUS2_8822B */
@@ -1597,13 +1753,15 @@
 #define BIT_SHIFT_EPVID1_8822B 8
 #define BIT_MASK_EPVID1_8822B 0xff
 #define BIT_EPVID1_8822B(x) (((x) & BIT_MASK_EPVID1_8822B) << BIT_SHIFT_EPVID1_8822B)
-#define BIT_GET_EPVID1_8822B(x) (((x) >> BIT_SHIFT_EPVID1_8822B) & BIT_MASK_EPVID1_8822B)

+#define BIT_GET_EPVID1_8822B(x) (((x) >> BIT_SHIFT_EPVID1_8822B) & BIT_MASK_EPVID1_8822B)
+
 
 
 #define BIT_SHIFT_EPVID0_8822B 0
 #define BIT_MASK_EPVID0_8822B 0xff
 #define BIT_EPVID0_8822B(x) (((x) & BIT_MASK_EPVID0_8822B) << BIT_SHIFT_EPVID0_8822B)
-#define BIT_GET_EPVID0_8822B(x) (((x) >> BIT_SHIFT_EPVID0_8822B) & BIT_MASK_EPVID0_8822B)

+#define BIT_GET_EPVID0_8822B(x) (((x) >> BIT_SHIFT_EPVID0_8822B) & BIT_MASK_EPVID0_8822B)
+
 
 
 /* 2 REG_SYS_CFG2_8822B */
@@ -1612,7 +1770,8 @@
 #define BIT_SHIFT_HW_ID_8822B 0
 #define BIT_MASK_HW_ID_8822B 0xff
 #define BIT_HW_ID_8822B(x) (((x) & BIT_MASK_HW_ID_8822B) << BIT_SHIFT_HW_ID_8822B)
-#define BIT_GET_HW_ID_8822B(x) (((x) >> BIT_SHIFT_HW_ID_8822B) & BIT_MASK_HW_ID_8822B)

+#define BIT_GET_HW_ID_8822B(x) (((x) >> BIT_SHIFT_HW_ID_8822B) & BIT_MASK_HW_ID_8822B)
+
 
 
 /* 2 REG_SYS_CFG3_8822B */
@@ -1642,7 +1801,8 @@
 #define BIT_SHIFT_CPU_DMEM_CON_8822B 0
 #define BIT_MASK_CPU_DMEM_CON_8822B 0xff
 #define BIT_CPU_DMEM_CON_8822B(x) (((x) & BIT_MASK_CPU_DMEM_CON_8822B) << BIT_SHIFT_CPU_DMEM_CON_8822B)
-#define BIT_GET_CPU_DMEM_CON_8822B(x) (((x) >> BIT_SHIFT_CPU_DMEM_CON_8822B) & BIT_MASK_CPU_DMEM_CON_8822B)

+#define BIT_GET_CPU_DMEM_CON_8822B(x) (((x) >> BIT_SHIFT_CPU_DMEM_CON_8822B) & BIT_MASK_CPU_DMEM_CON_8822B)
+
 
 
 /* 2 REG_BOOT_REASON_8822B */
@@ -1650,7 +1810,8 @@
 #define BIT_SHIFT_BOOT_REASON_8822B 0
 #define BIT_MASK_BOOT_REASON_8822B 0x7
 #define BIT_BOOT_REASON_8822B(x) (((x) & BIT_MASK_BOOT_REASON_8822B) << BIT_SHIFT_BOOT_REASON_8822B)
-#define BIT_GET_BOOT_REASON_8822B(x) (((x) >> BIT_SHIFT_BOOT_REASON_8822B) & BIT_MASK_BOOT_REASON_8822B)

+#define BIT_GET_BOOT_REASON_8822B(x) (((x) >> BIT_SHIFT_BOOT_REASON_8822B) & BIT_MASK_BOOT_REASON_8822B)
+
 
 
 /* 2 REG_NFCPAD_CTRL_8822B */
@@ -1665,19 +1826,22 @@
 #define BIT_SHIFT_NFCPAD_IO_SEL_8822B 8
 #define BIT_MASK_NFCPAD_IO_SEL_8822B 0xf
 #define BIT_NFCPAD_IO_SEL_8822B(x) (((x) & BIT_MASK_NFCPAD_IO_SEL_8822B) << BIT_SHIFT_NFCPAD_IO_SEL_8822B)
-#define BIT_GET_NFCPAD_IO_SEL_8822B(x) (((x) >> BIT_SHIFT_NFCPAD_IO_SEL_8822B) & BIT_MASK_NFCPAD_IO_SEL_8822B)

+#define BIT_GET_NFCPAD_IO_SEL_8822B(x) (((x) >> BIT_SHIFT_NFCPAD_IO_SEL_8822B) & BIT_MASK_NFCPAD_IO_SEL_8822B)
+
 
 
 #define BIT_SHIFT_NFCPAD_OUT_8822B 4
 #define BIT_MASK_NFCPAD_OUT_8822B 0xf
 #define BIT_NFCPAD_OUT_8822B(x) (((x) & BIT_MASK_NFCPAD_OUT_8822B) << BIT_SHIFT_NFCPAD_OUT_8822B)
-#define BIT_GET_NFCPAD_OUT_8822B(x) (((x) >> BIT_SHIFT_NFCPAD_OUT_8822B) & BIT_MASK_NFCPAD_OUT_8822B)

+#define BIT_GET_NFCPAD_OUT_8822B(x) (((x) >> BIT_SHIFT_NFCPAD_OUT_8822B) & BIT_MASK_NFCPAD_OUT_8822B)
+
 
 
 #define BIT_SHIFT_NFCPAD_IN_8822B 0
 #define BIT_MASK_NFCPAD_IN_8822B 0xf
 #define BIT_NFCPAD_IN_8822B(x) (((x) & BIT_MASK_NFCPAD_IN_8822B) << BIT_SHIFT_NFCPAD_IN_8822B)
-#define BIT_GET_NFCPAD_IN_8822B(x) (((x) >> BIT_SHIFT_NFCPAD_IN_8822B) & BIT_MASK_NFCPAD_IN_8822B)

+#define BIT_GET_NFCPAD_IN_8822B(x) (((x) >> BIT_SHIFT_NFCPAD_IN_8822B) & BIT_MASK_NFCPAD_IN_8822B)
+
 
 
 /* 2 REG_HIMR2_8822B */
@@ -1799,7 +1963,8 @@
 #define BIT_SHIFT_H2C_PKT_READADDR_8822B 0
 #define BIT_MASK_H2C_PKT_READADDR_8822B 0x3ffff
 #define BIT_H2C_PKT_READADDR_8822B(x) (((x) & BIT_MASK_H2C_PKT_READADDR_8822B) << BIT_SHIFT_H2C_PKT_READADDR_8822B)
-#define BIT_GET_H2C_PKT_READADDR_8822B(x) (((x) >> BIT_SHIFT_H2C_PKT_READADDR_8822B) & BIT_MASK_H2C_PKT_READADDR_8822B)

+#define BIT_GET_H2C_PKT_READADDR_8822B(x) (((x) >> BIT_SHIFT_H2C_PKT_READADDR_8822B) & BIT_MASK_H2C_PKT_READADDR_8822B)
+
 
 
 /* 2 REG_H2C_PKT_WRITEADDR_8822B */
@@ -1807,7 +1972,8 @@
 #define BIT_SHIFT_H2C_PKT_WRITEADDR_8822B 0
 #define BIT_MASK_H2C_PKT_WRITEADDR_8822B 0x3ffff
 #define BIT_H2C_PKT_WRITEADDR_8822B(x) (((x) & BIT_MASK_H2C_PKT_WRITEADDR_8822B) << BIT_SHIFT_H2C_PKT_WRITEADDR_8822B)
-#define BIT_GET_H2C_PKT_WRITEADDR_8822B(x) (((x) >> BIT_SHIFT_H2C_PKT_WRITEADDR_8822B) & BIT_MASK_H2C_PKT_WRITEADDR_8822B)

+#define BIT_GET_H2C_PKT_WRITEADDR_8822B(x) (((x) >> BIT_SHIFT_H2C_PKT_WRITEADDR_8822B) & BIT_MASK_H2C_PKT_WRITEADDR_8822B)
+
 
 
 /* 2 REG_MEM_PWR_CRTL_8822B */
@@ -1830,7 +1996,8 @@
 #define BIT_SHIFT_FW_DBG0_8822B 0
 #define BIT_MASK_FW_DBG0_8822B 0xffffffffL
 #define BIT_FW_DBG0_8822B(x) (((x) & BIT_MASK_FW_DBG0_8822B) << BIT_SHIFT_FW_DBG0_8822B)
-#define BIT_GET_FW_DBG0_8822B(x) (((x) >> BIT_SHIFT_FW_DBG0_8822B) & BIT_MASK_FW_DBG0_8822B)

+#define BIT_GET_FW_DBG0_8822B(x) (((x) >> BIT_SHIFT_FW_DBG0_8822B) & BIT_MASK_FW_DBG0_8822B)
+
 
 
 /* 2 REG_FW_DBG1_8822B */
@@ -1838,7 +2005,8 @@
 #define BIT_SHIFT_FW_DBG1_8822B 0
 #define BIT_MASK_FW_DBG1_8822B 0xffffffffL
 #define BIT_FW_DBG1_8822B(x) (((x) & BIT_MASK_FW_DBG1_8822B) << BIT_SHIFT_FW_DBG1_8822B)
-#define BIT_GET_FW_DBG1_8822B(x) (((x) >> BIT_SHIFT_FW_DBG1_8822B) & BIT_MASK_FW_DBG1_8822B)

+#define BIT_GET_FW_DBG1_8822B(x) (((x) >> BIT_SHIFT_FW_DBG1_8822B) & BIT_MASK_FW_DBG1_8822B)
+
 
 
 /* 2 REG_FW_DBG2_8822B */
@@ -1846,7 +2014,8 @@
 #define BIT_SHIFT_FW_DBG2_8822B 0
 #define BIT_MASK_FW_DBG2_8822B 0xffffffffL
 #define BIT_FW_DBG2_8822B(x) (((x) & BIT_MASK_FW_DBG2_8822B) << BIT_SHIFT_FW_DBG2_8822B)
-#define BIT_GET_FW_DBG2_8822B(x) (((x) >> BIT_SHIFT_FW_DBG2_8822B) & BIT_MASK_FW_DBG2_8822B)

+#define BIT_GET_FW_DBG2_8822B(x) (((x) >> BIT_SHIFT_FW_DBG2_8822B) & BIT_MASK_FW_DBG2_8822B)
+
 
 
 /* 2 REG_FW_DBG3_8822B */
@@ -1854,7 +2023,8 @@
 #define BIT_SHIFT_FW_DBG3_8822B 0
 #define BIT_MASK_FW_DBG3_8822B 0xffffffffL
 #define BIT_FW_DBG3_8822B(x) (((x) & BIT_MASK_FW_DBG3_8822B) << BIT_SHIFT_FW_DBG3_8822B)
-#define BIT_GET_FW_DBG3_8822B(x) (((x) >> BIT_SHIFT_FW_DBG3_8822B) & BIT_MASK_FW_DBG3_8822B)

+#define BIT_GET_FW_DBG3_8822B(x) (((x) >> BIT_SHIFT_FW_DBG3_8822B) & BIT_MASK_FW_DBG3_8822B)
+
 
 
 /* 2 REG_FW_DBG4_8822B */
@@ -1862,7 +2032,8 @@
 #define BIT_SHIFT_FW_DBG4_8822B 0
 #define BIT_MASK_FW_DBG4_8822B 0xffffffffL
 #define BIT_FW_DBG4_8822B(x) (((x) & BIT_MASK_FW_DBG4_8822B) << BIT_SHIFT_FW_DBG4_8822B)
-#define BIT_GET_FW_DBG4_8822B(x) (((x) >> BIT_SHIFT_FW_DBG4_8822B) & BIT_MASK_FW_DBG4_8822B)

+#define BIT_GET_FW_DBG4_8822B(x) (((x) >> BIT_SHIFT_FW_DBG4_8822B) & BIT_MASK_FW_DBG4_8822B)
+
 
 
 /* 2 REG_FW_DBG5_8822B */
@@ -1870,7 +2041,8 @@
 #define BIT_SHIFT_FW_DBG5_8822B 0
 #define BIT_MASK_FW_DBG5_8822B 0xffffffffL
 #define BIT_FW_DBG5_8822B(x) (((x) & BIT_MASK_FW_DBG5_8822B) << BIT_SHIFT_FW_DBG5_8822B)
-#define BIT_GET_FW_DBG5_8822B(x) (((x) >> BIT_SHIFT_FW_DBG5_8822B) & BIT_MASK_FW_DBG5_8822B)

+#define BIT_GET_FW_DBG5_8822B(x) (((x) >> BIT_SHIFT_FW_DBG5_8822B) & BIT_MASK_FW_DBG5_8822B)
+
 
 
 /* 2 REG_FW_DBG6_8822B */
@@ -1878,7 +2050,8 @@
 #define BIT_SHIFT_FW_DBG6_8822B 0
 #define BIT_MASK_FW_DBG6_8822B 0xffffffffL
 #define BIT_FW_DBG6_8822B(x) (((x) & BIT_MASK_FW_DBG6_8822B) << BIT_SHIFT_FW_DBG6_8822B)
-#define BIT_GET_FW_DBG6_8822B(x) (((x) >> BIT_SHIFT_FW_DBG6_8822B) & BIT_MASK_FW_DBG6_8822B)

+#define BIT_GET_FW_DBG6_8822B(x) (((x) >> BIT_SHIFT_FW_DBG6_8822B) & BIT_MASK_FW_DBG6_8822B)
+
 
 
 /* 2 REG_FW_DBG7_8822B */
@@ -1886,7 +2059,8 @@
 #define BIT_SHIFT_FW_DBG7_8822B 0
 #define BIT_MASK_FW_DBG7_8822B 0xffffffffL
 #define BIT_FW_DBG7_8822B(x) (((x) & BIT_MASK_FW_DBG7_8822B) << BIT_SHIFT_FW_DBG7_8822B)
-#define BIT_GET_FW_DBG7_8822B(x) (((x) >> BIT_SHIFT_FW_DBG7_8822B) & BIT_MASK_FW_DBG7_8822B)

+#define BIT_GET_FW_DBG7_8822B(x) (((x) >> BIT_SHIFT_FW_DBG7_8822B) & BIT_MASK_FW_DBG7_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -1896,19 +2070,22 @@
 #define BIT_SHIFT_LBMODE_8822B 24
 #define BIT_MASK_LBMODE_8822B 0x1f
 #define BIT_LBMODE_8822B(x) (((x) & BIT_MASK_LBMODE_8822B) << BIT_SHIFT_LBMODE_8822B)
-#define BIT_GET_LBMODE_8822B(x) (((x) >> BIT_SHIFT_LBMODE_8822B) & BIT_MASK_LBMODE_8822B)

+#define BIT_GET_LBMODE_8822B(x) (((x) >> BIT_SHIFT_LBMODE_8822B) & BIT_MASK_LBMODE_8822B)
+
 
 
 #define BIT_SHIFT_NETYPE1_8822B 18
 #define BIT_MASK_NETYPE1_8822B 0x3
 #define BIT_NETYPE1_8822B(x) (((x) & BIT_MASK_NETYPE1_8822B) << BIT_SHIFT_NETYPE1_8822B)
-#define BIT_GET_NETYPE1_8822B(x) (((x) >> BIT_SHIFT_NETYPE1_8822B) & BIT_MASK_NETYPE1_8822B)

+#define BIT_GET_NETYPE1_8822B(x) (((x) >> BIT_SHIFT_NETYPE1_8822B) & BIT_MASK_NETYPE1_8822B)
+
 
 
 #define BIT_SHIFT_NETYPE0_8822B 16
 #define BIT_MASK_NETYPE0_8822B 0x3
 #define BIT_NETYPE0_8822B(x) (((x) & BIT_MASK_NETYPE0_8822B) << BIT_SHIFT_NETYPE0_8822B)
-#define BIT_GET_NETYPE0_8822B(x) (((x) >> BIT_SHIFT_NETYPE0_8822B) & BIT_MASK_NETYPE0_8822B)

+#define BIT_GET_NETYPE0_8822B(x) (((x) >> BIT_SHIFT_NETYPE0_8822B) & BIT_MASK_NETYPE0_8822B)
+
 
 #define BIT_I2C_MAILBOX_EN_8822B BIT(12)
 #define BIT_SHCUT_EN_8822B BIT(11)
@@ -1932,6 +2109,7 @@
 #define BIT_GET_PKT_BUFF_ACCESS_CTRL_8822B(x) (((x) >> BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8822B) & BIT_MASK_PKT_BUFF_ACCESS_CTRL_8822B)
 
 
+
 /* 2 REG_TSF_CLK_STATE_8822B */
 #define BIT_TSF_CLK_STABLE_8822B BIT(15)
 
@@ -1940,37 +2118,43 @@
 #define BIT_SHIFT_TXDMA_HIQ_MAP_8822B 14
 #define BIT_MASK_TXDMA_HIQ_MAP_8822B 0x3
 #define BIT_TXDMA_HIQ_MAP_8822B(x) (((x) & BIT_MASK_TXDMA_HIQ_MAP_8822B) << BIT_SHIFT_TXDMA_HIQ_MAP_8822B)
-#define BIT_GET_TXDMA_HIQ_MAP_8822B(x) (((x) >> BIT_SHIFT_TXDMA_HIQ_MAP_8822B) & BIT_MASK_TXDMA_HIQ_MAP_8822B)

+#define BIT_GET_TXDMA_HIQ_MAP_8822B(x) (((x) >> BIT_SHIFT_TXDMA_HIQ_MAP_8822B) & BIT_MASK_TXDMA_HIQ_MAP_8822B)
+
 
 
 #define BIT_SHIFT_TXDMA_MGQ_MAP_8822B 12
 #define BIT_MASK_TXDMA_MGQ_MAP_8822B 0x3
 #define BIT_TXDMA_MGQ_MAP_8822B(x) (((x) & BIT_MASK_TXDMA_MGQ_MAP_8822B) << BIT_SHIFT_TXDMA_MGQ_MAP_8822B)
-#define BIT_GET_TXDMA_MGQ_MAP_8822B(x) (((x) >> BIT_SHIFT_TXDMA_MGQ_MAP_8822B) & BIT_MASK_TXDMA_MGQ_MAP_8822B)

+#define BIT_GET_TXDMA_MGQ_MAP_8822B(x) (((x) >> BIT_SHIFT_TXDMA_MGQ_MAP_8822B) & BIT_MASK_TXDMA_MGQ_MAP_8822B)
+
 
 
 #define BIT_SHIFT_TXDMA_BKQ_MAP_8822B 10
 #define BIT_MASK_TXDMA_BKQ_MAP_8822B 0x3
 #define BIT_TXDMA_BKQ_MAP_8822B(x) (((x) & BIT_MASK_TXDMA_BKQ_MAP_8822B) << BIT_SHIFT_TXDMA_BKQ_MAP_8822B)
-#define BIT_GET_TXDMA_BKQ_MAP_8822B(x) (((x) >> BIT_SHIFT_TXDMA_BKQ_MAP_8822B) & BIT_MASK_TXDMA_BKQ_MAP_8822B)

+#define BIT_GET_TXDMA_BKQ_MAP_8822B(x) (((x) >> BIT_SHIFT_TXDMA_BKQ_MAP_8822B) & BIT_MASK_TXDMA_BKQ_MAP_8822B)
+
 
 
 #define BIT_SHIFT_TXDMA_BEQ_MAP_8822B 8
 #define BIT_MASK_TXDMA_BEQ_MAP_8822B 0x3
 #define BIT_TXDMA_BEQ_MAP_8822B(x) (((x) & BIT_MASK_TXDMA_BEQ_MAP_8822B) << BIT_SHIFT_TXDMA_BEQ_MAP_8822B)
-#define BIT_GET_TXDMA_BEQ_MAP_8822B(x) (((x) >> BIT_SHIFT_TXDMA_BEQ_MAP_8822B) & BIT_MASK_TXDMA_BEQ_MAP_8822B)

+#define BIT_GET_TXDMA_BEQ_MAP_8822B(x) (((x) >> BIT_SHIFT_TXDMA_BEQ_MAP_8822B) & BIT_MASK_TXDMA_BEQ_MAP_8822B)
+
 
 
 #define BIT_SHIFT_TXDMA_VIQ_MAP_8822B 6
 #define BIT_MASK_TXDMA_VIQ_MAP_8822B 0x3
 #define BIT_TXDMA_VIQ_MAP_8822B(x) (((x) & BIT_MASK_TXDMA_VIQ_MAP_8822B) << BIT_SHIFT_TXDMA_VIQ_MAP_8822B)
-#define BIT_GET_TXDMA_VIQ_MAP_8822B(x) (((x) >> BIT_SHIFT_TXDMA_VIQ_MAP_8822B) & BIT_MASK_TXDMA_VIQ_MAP_8822B)

+#define BIT_GET_TXDMA_VIQ_MAP_8822B(x) (((x) >> BIT_SHIFT_TXDMA_VIQ_MAP_8822B) & BIT_MASK_TXDMA_VIQ_MAP_8822B)
+
 
 
 #define BIT_SHIFT_TXDMA_VOQ_MAP_8822B 4
 #define BIT_MASK_TXDMA_VOQ_MAP_8822B 0x3
 #define BIT_TXDMA_VOQ_MAP_8822B(x) (((x) & BIT_MASK_TXDMA_VOQ_MAP_8822B) << BIT_SHIFT_TXDMA_VOQ_MAP_8822B)
-#define BIT_GET_TXDMA_VOQ_MAP_8822B(x) (((x) >> BIT_SHIFT_TXDMA_VOQ_MAP_8822B) & BIT_MASK_TXDMA_VOQ_MAP_8822B)

+#define BIT_GET_TXDMA_VOQ_MAP_8822B(x) (((x) >> BIT_SHIFT_TXDMA_VOQ_MAP_8822B) & BIT_MASK_TXDMA_VOQ_MAP_8822B)
+
 
 #define BIT_RXDMA_AGG_EN_8822B BIT(2)
 #define BIT_RXSHFT_EN_8822B BIT(1)
@@ -1981,13 +2165,15 @@
 #define BIT_SHIFT_RXFFOVFL_RSV_V2_8822B 8
 #define BIT_MASK_RXFFOVFL_RSV_V2_8822B 0xf
 #define BIT_RXFFOVFL_RSV_V2_8822B(x) (((x) & BIT_MASK_RXFFOVFL_RSV_V2_8822B) << BIT_SHIFT_RXFFOVFL_RSV_V2_8822B)
-#define BIT_GET_RXFFOVFL_RSV_V2_8822B(x) (((x) >> BIT_SHIFT_RXFFOVFL_RSV_V2_8822B) & BIT_MASK_RXFFOVFL_RSV_V2_8822B)

+#define BIT_GET_RXFFOVFL_RSV_V2_8822B(x) (((x) >> BIT_SHIFT_RXFFOVFL_RSV_V2_8822B) & BIT_MASK_RXFFOVFL_RSV_V2_8822B)
+
 
 
 #define BIT_SHIFT_TXPKTBUF_PGBNDY_8822B 0
 #define BIT_MASK_TXPKTBUF_PGBNDY_8822B 0xff
 #define BIT_TXPKTBUF_PGBNDY_8822B(x) (((x) & BIT_MASK_TXPKTBUF_PGBNDY_8822B) << BIT_SHIFT_TXPKTBUF_PGBNDY_8822B)
-#define BIT_GET_TXPKTBUF_PGBNDY_8822B(x) (((x) >> BIT_SHIFT_TXPKTBUF_PGBNDY_8822B) & BIT_MASK_TXPKTBUF_PGBNDY_8822B)

+#define BIT_GET_TXPKTBUF_PGBNDY_8822B(x) (((x) >> BIT_SHIFT_TXPKTBUF_PGBNDY_8822B) & BIT_MASK_TXPKTBUF_PGBNDY_8822B)
+
 
 
 /* 2 REG_PTA_I2C_MBOX_8822B */
@@ -1997,20 +2183,23 @@
 #define BIT_SHIFT_I2C_M_STATUS_8822B 8
 #define BIT_MASK_I2C_M_STATUS_8822B 0xf
 #define BIT_I2C_M_STATUS_8822B(x) (((x) & BIT_MASK_I2C_M_STATUS_8822B) << BIT_SHIFT_I2C_M_STATUS_8822B)
-#define BIT_GET_I2C_M_STATUS_8822B(x) (((x) >> BIT_SHIFT_I2C_M_STATUS_8822B) & BIT_MASK_I2C_M_STATUS_8822B)

+#define BIT_GET_I2C_M_STATUS_8822B(x) (((x) >> BIT_SHIFT_I2C_M_STATUS_8822B) & BIT_MASK_I2C_M_STATUS_8822B)
+
 
 
 #define BIT_SHIFT_I2C_M_BUS_GNT_FW_8822B 4
 #define BIT_MASK_I2C_M_BUS_GNT_FW_8822B 0x7
 #define BIT_I2C_M_BUS_GNT_FW_8822B(x) (((x) & BIT_MASK_I2C_M_BUS_GNT_FW_8822B) << BIT_SHIFT_I2C_M_BUS_GNT_FW_8822B)
-#define BIT_GET_I2C_M_BUS_GNT_FW_8822B(x) (((x) >> BIT_SHIFT_I2C_M_BUS_GNT_FW_8822B) & BIT_MASK_I2C_M_BUS_GNT_FW_8822B)

+#define BIT_GET_I2C_M_BUS_GNT_FW_8822B(x) (((x) >> BIT_SHIFT_I2C_M_BUS_GNT_FW_8822B) & BIT_MASK_I2C_M_BUS_GNT_FW_8822B)
+
 
 #define BIT_I2C_M_GNT_FW_8822B BIT(3)
 
 #define BIT_SHIFT_I2C_M_SPEED_8822B 1
 #define BIT_MASK_I2C_M_SPEED_8822B 0x3
 #define BIT_I2C_M_SPEED_8822B(x) (((x) & BIT_MASK_I2C_M_SPEED_8822B) << BIT_SHIFT_I2C_M_SPEED_8822B)
-#define BIT_GET_I2C_M_SPEED_8822B(x) (((x) >> BIT_SHIFT_I2C_M_SPEED_8822B) & BIT_MASK_I2C_M_SPEED_8822B)

+#define BIT_GET_I2C_M_SPEED_8822B(x) (((x) >> BIT_SHIFT_I2C_M_SPEED_8822B) & BIT_MASK_I2C_M_SPEED_8822B)
+
 
 #define BIT_I2C_M_UNLOCK_8822B BIT(0)
 
@@ -2021,7 +2210,8 @@
 #define BIT_SHIFT_RXFF0_BNDY_V2_8822B 0
 #define BIT_MASK_RXFF0_BNDY_V2_8822B 0x3ffff
 #define BIT_RXFF0_BNDY_V2_8822B(x) (((x) & BIT_MASK_RXFF0_BNDY_V2_8822B) << BIT_SHIFT_RXFF0_BNDY_V2_8822B)
-#define BIT_GET_RXFF0_BNDY_V2_8822B(x) (((x) >> BIT_SHIFT_RXFF0_BNDY_V2_8822B) & BIT_MASK_RXFF0_BNDY_V2_8822B)

+#define BIT_GET_RXFF0_BNDY_V2_8822B(x) (((x) >> BIT_SHIFT_RXFF0_BNDY_V2_8822B) & BIT_MASK_RXFF0_BNDY_V2_8822B)
+
 
 
 /* 2 REG_FE1IMR_8822B */
@@ -2090,7 +2280,8 @@
 #define BIT_SHIFT_CPWM_MOD_8822B 24
 #define BIT_MASK_CPWM_MOD_8822B 0x7f
 #define BIT_CPWM_MOD_8822B(x) (((x) & BIT_MASK_CPWM_MOD_8822B) << BIT_SHIFT_CPWM_MOD_8822B)
-#define BIT_GET_CPWM_MOD_8822B(x) (((x) >> BIT_SHIFT_CPWM_MOD_8822B) & BIT_MASK_CPWM_MOD_8822B)

+#define BIT_GET_CPWM_MOD_8822B(x) (((x) >> BIT_SHIFT_CPWM_MOD_8822B) & BIT_MASK_CPWM_MOD_8822B)
+
 
 
 /* 2 REG_FWIMR_8822B */
@@ -2210,7 +2401,8 @@
 #define BIT_SHIFT_PKTBUF_WRITE_EN_8822B 24
 #define BIT_MASK_PKTBUF_WRITE_EN_8822B 0xff
 #define BIT_PKTBUF_WRITE_EN_8822B(x) (((x) & BIT_MASK_PKTBUF_WRITE_EN_8822B) << BIT_SHIFT_PKTBUF_WRITE_EN_8822B)
-#define BIT_GET_PKTBUF_WRITE_EN_8822B(x) (((x) >> BIT_SHIFT_PKTBUF_WRITE_EN_8822B) & BIT_MASK_PKTBUF_WRITE_EN_8822B)

+#define BIT_GET_PKTBUF_WRITE_EN_8822B(x) (((x) >> BIT_SHIFT_PKTBUF_WRITE_EN_8822B) & BIT_MASK_PKTBUF_WRITE_EN_8822B)
+
 
 #define BIT_TXRPTBUF_DBG_8822B BIT(23)
 
@@ -2221,7 +2413,8 @@
 #define BIT_SHIFT_PKTBUF_DBG_ADDR_8822B 0
 #define BIT_MASK_PKTBUF_DBG_ADDR_8822B 0x1fff
 #define BIT_PKTBUF_DBG_ADDR_8822B(x) (((x) & BIT_MASK_PKTBUF_DBG_ADDR_8822B) << BIT_SHIFT_PKTBUF_DBG_ADDR_8822B)
-#define BIT_GET_PKTBUF_DBG_ADDR_8822B(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_ADDR_8822B) & BIT_MASK_PKTBUF_DBG_ADDR_8822B)

+#define BIT_GET_PKTBUF_DBG_ADDR_8822B(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_ADDR_8822B) & BIT_MASK_PKTBUF_DBG_ADDR_8822B)
+
 
 
 /* 2 REG_PKTBUF_DBG_DATA_L_8822B */
@@ -2229,7 +2422,8 @@
 #define BIT_SHIFT_PKTBUF_DBG_DATA_L_8822B 0
 #define BIT_MASK_PKTBUF_DBG_DATA_L_8822B 0xffffffffL
 #define BIT_PKTBUF_DBG_DATA_L_8822B(x) (((x) & BIT_MASK_PKTBUF_DBG_DATA_L_8822B) << BIT_SHIFT_PKTBUF_DBG_DATA_L_8822B)
-#define BIT_GET_PKTBUF_DBG_DATA_L_8822B(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_L_8822B) & BIT_MASK_PKTBUF_DBG_DATA_L_8822B)

+#define BIT_GET_PKTBUF_DBG_DATA_L_8822B(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_L_8822B) & BIT_MASK_PKTBUF_DBG_DATA_L_8822B)
+
 
 
 /* 2 REG_PKTBUF_DBG_DATA_H_8822B */
@@ -2237,7 +2431,8 @@
 #define BIT_SHIFT_PKTBUF_DBG_DATA_H_8822B 0
 #define BIT_MASK_PKTBUF_DBG_DATA_H_8822B 0xffffffffL
 #define BIT_PKTBUF_DBG_DATA_H_8822B(x) (((x) & BIT_MASK_PKTBUF_DBG_DATA_H_8822B) << BIT_SHIFT_PKTBUF_DBG_DATA_H_8822B)
-#define BIT_GET_PKTBUF_DBG_DATA_H_8822B(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_H_8822B) & BIT_MASK_PKTBUF_DBG_DATA_H_8822B)

+#define BIT_GET_PKTBUF_DBG_DATA_H_8822B(x) (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_H_8822B) & BIT_MASK_PKTBUF_DBG_DATA_H_8822B)
+
 
 
 /* 2 REG_CPWM2_8822B */
@@ -2245,14 +2440,16 @@
 #define BIT_SHIFT_L0S_TO_RCVY_NUM_8822B 16
 #define BIT_MASK_L0S_TO_RCVY_NUM_8822B 0xff
 #define BIT_L0S_TO_RCVY_NUM_8822B(x) (((x) & BIT_MASK_L0S_TO_RCVY_NUM_8822B) << BIT_SHIFT_L0S_TO_RCVY_NUM_8822B)
-#define BIT_GET_L0S_TO_RCVY_NUM_8822B(x) (((x) >> BIT_SHIFT_L0S_TO_RCVY_NUM_8822B) & BIT_MASK_L0S_TO_RCVY_NUM_8822B)

+#define BIT_GET_L0S_TO_RCVY_NUM_8822B(x) (((x) >> BIT_SHIFT_L0S_TO_RCVY_NUM_8822B) & BIT_MASK_L0S_TO_RCVY_NUM_8822B)
+
 
 #define BIT_CPWM2_TOGGLING_8822B BIT(15)
 
 #define BIT_SHIFT_CPWM2_MOD_8822B 0
 #define BIT_MASK_CPWM2_MOD_8822B 0x7fff
 #define BIT_CPWM2_MOD_8822B(x) (((x) & BIT_MASK_CPWM2_MOD_8822B) << BIT_SHIFT_CPWM2_MOD_8822B)
-#define BIT_GET_CPWM2_MOD_8822B(x) (((x) >> BIT_SHIFT_CPWM2_MOD_8822B) & BIT_MASK_CPWM2_MOD_8822B)

+#define BIT_GET_CPWM2_MOD_8822B(x) (((x) >> BIT_SHIFT_CPWM2_MOD_8822B) & BIT_MASK_CPWM2_MOD_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -2265,7 +2462,8 @@
 #define BIT_SHIFT_TC0DATA_8822B 0
 #define BIT_MASK_TC0DATA_8822B 0xffffff
 #define BIT_TC0DATA_8822B(x) (((x) & BIT_MASK_TC0DATA_8822B) << BIT_SHIFT_TC0DATA_8822B)
-#define BIT_GET_TC0DATA_8822B(x) (((x) >> BIT_SHIFT_TC0DATA_8822B) & BIT_MASK_TC0DATA_8822B)

+#define BIT_GET_TC0DATA_8822B(x) (((x) >> BIT_SHIFT_TC0DATA_8822B) & BIT_MASK_TC0DATA_8822B)
+
 
 
 /* 2 REG_TC1_CTRL_8822B */
@@ -2276,7 +2474,8 @@
 #define BIT_SHIFT_TC1DATA_8822B 0
 #define BIT_MASK_TC1DATA_8822B 0xffffff
 #define BIT_TC1DATA_8822B(x) (((x) & BIT_MASK_TC1DATA_8822B) << BIT_SHIFT_TC1DATA_8822B)
-#define BIT_GET_TC1DATA_8822B(x) (((x) >> BIT_SHIFT_TC1DATA_8822B) & BIT_MASK_TC1DATA_8822B)

+#define BIT_GET_TC1DATA_8822B(x) (((x) >> BIT_SHIFT_TC1DATA_8822B) & BIT_MASK_TC1DATA_8822B)
+
 
 
 /* 2 REG_TC2_CTRL_8822B */
@@ -2287,7 +2486,8 @@
 #define BIT_SHIFT_TC2DATA_8822B 0
 #define BIT_MASK_TC2DATA_8822B 0xffffff
 #define BIT_TC2DATA_8822B(x) (((x) & BIT_MASK_TC2DATA_8822B) << BIT_SHIFT_TC2DATA_8822B)
-#define BIT_GET_TC2DATA_8822B(x) (((x) >> BIT_SHIFT_TC2DATA_8822B) & BIT_MASK_TC2DATA_8822B)

+#define BIT_GET_TC2DATA_8822B(x) (((x) >> BIT_SHIFT_TC2DATA_8822B) & BIT_MASK_TC2DATA_8822B)
+
 
 
 /* 2 REG_TC3_CTRL_8822B */
@@ -2298,7 +2498,8 @@
 #define BIT_SHIFT_TC3DATA_8822B 0
 #define BIT_MASK_TC3DATA_8822B 0xffffff
 #define BIT_TC3DATA_8822B(x) (((x) & BIT_MASK_TC3DATA_8822B) << BIT_SHIFT_TC3DATA_8822B)
-#define BIT_GET_TC3DATA_8822B(x) (((x) >> BIT_SHIFT_TC3DATA_8822B) & BIT_MASK_TC3DATA_8822B)

+#define BIT_GET_TC3DATA_8822B(x) (((x) >> BIT_SHIFT_TC3DATA_8822B) & BIT_MASK_TC3DATA_8822B)
+
 
 
 /* 2 REG_TC4_CTRL_8822B */
@@ -2309,7 +2510,8 @@
 #define BIT_SHIFT_TC4DATA_8822B 0
 #define BIT_MASK_TC4DATA_8822B 0xffffff
 #define BIT_TC4DATA_8822B(x) (((x) & BIT_MASK_TC4DATA_8822B) << BIT_SHIFT_TC4DATA_8822B)
-#define BIT_GET_TC4DATA_8822B(x) (((x) >> BIT_SHIFT_TC4DATA_8822B) & BIT_MASK_TC4DATA_8822B)

+#define BIT_GET_TC4DATA_8822B(x) (((x) >> BIT_SHIFT_TC4DATA_8822B) & BIT_MASK_TC4DATA_8822B)
+
 
 
 /* 2 REG_TCUNIT_BASE_8822B */
@@ -2317,7 +2519,8 @@
 #define BIT_SHIFT_TCUNIT_BASE_8822B 0
 #define BIT_MASK_TCUNIT_BASE_8822B 0x3fff
 #define BIT_TCUNIT_BASE_8822B(x) (((x) & BIT_MASK_TCUNIT_BASE_8822B) << BIT_SHIFT_TCUNIT_BASE_8822B)
-#define BIT_GET_TCUNIT_BASE_8822B(x) (((x) >> BIT_SHIFT_TCUNIT_BASE_8822B) & BIT_MASK_TCUNIT_BASE_8822B)

+#define BIT_GET_TCUNIT_BASE_8822B(x) (((x) >> BIT_SHIFT_TCUNIT_BASE_8822B) & BIT_MASK_TCUNIT_BASE_8822B)
+
 
 
 /* 2 REG_TC5_CTRL_8822B */
@@ -2328,7 +2531,8 @@
 #define BIT_SHIFT_TC5DATA_8822B 0
 #define BIT_MASK_TC5DATA_8822B 0xffffff
 #define BIT_TC5DATA_8822B(x) (((x) & BIT_MASK_TC5DATA_8822B) << BIT_SHIFT_TC5DATA_8822B)
-#define BIT_GET_TC5DATA_8822B(x) (((x) >> BIT_SHIFT_TC5DATA_8822B) & BIT_MASK_TC5DATA_8822B)

+#define BIT_GET_TC5DATA_8822B(x) (((x) >> BIT_SHIFT_TC5DATA_8822B) & BIT_MASK_TC5DATA_8822B)
+
 
 
 /* 2 REG_TC6_CTRL_8822B */
@@ -2339,7 +2543,8 @@
 #define BIT_SHIFT_TC6DATA_8822B 0
 #define BIT_MASK_TC6DATA_8822B 0xffffff
 #define BIT_TC6DATA_8822B(x) (((x) & BIT_MASK_TC6DATA_8822B) << BIT_SHIFT_TC6DATA_8822B)
-#define BIT_GET_TC6DATA_8822B(x) (((x) >> BIT_SHIFT_TC6DATA_8822B) & BIT_MASK_TC6DATA_8822B)

+#define BIT_GET_TC6DATA_8822B(x) (((x) >> BIT_SHIFT_TC6DATA_8822B) & BIT_MASK_TC6DATA_8822B)
+
 
 
 /* 2 REG_MBIST_FAIL_8822B */
@@ -2347,25 +2552,29 @@
 #define BIT_SHIFT_8051_MBIST_FAIL_8822B 26
 #define BIT_MASK_8051_MBIST_FAIL_8822B 0x7
 #define BIT_8051_MBIST_FAIL_8822B(x) (((x) & BIT_MASK_8051_MBIST_FAIL_8822B) << BIT_SHIFT_8051_MBIST_FAIL_8822B)
-#define BIT_GET_8051_MBIST_FAIL_8822B(x) (((x) >> BIT_SHIFT_8051_MBIST_FAIL_8822B) & BIT_MASK_8051_MBIST_FAIL_8822B)

+#define BIT_GET_8051_MBIST_FAIL_8822B(x) (((x) >> BIT_SHIFT_8051_MBIST_FAIL_8822B) & BIT_MASK_8051_MBIST_FAIL_8822B)
+
 
 
 #define BIT_SHIFT_USB_MBIST_FAIL_8822B 24
 #define BIT_MASK_USB_MBIST_FAIL_8822B 0x3
 #define BIT_USB_MBIST_FAIL_8822B(x) (((x) & BIT_MASK_USB_MBIST_FAIL_8822B) << BIT_SHIFT_USB_MBIST_FAIL_8822B)
-#define BIT_GET_USB_MBIST_FAIL_8822B(x) (((x) >> BIT_SHIFT_USB_MBIST_FAIL_8822B) & BIT_MASK_USB_MBIST_FAIL_8822B)

+#define BIT_GET_USB_MBIST_FAIL_8822B(x) (((x) >> BIT_SHIFT_USB_MBIST_FAIL_8822B) & BIT_MASK_USB_MBIST_FAIL_8822B)
+
 
 
 #define BIT_SHIFT_PCIE_MBIST_FAIL_8822B 16
 #define BIT_MASK_PCIE_MBIST_FAIL_8822B 0x3f
 #define BIT_PCIE_MBIST_FAIL_8822B(x) (((x) & BIT_MASK_PCIE_MBIST_FAIL_8822B) << BIT_SHIFT_PCIE_MBIST_FAIL_8822B)
-#define BIT_GET_PCIE_MBIST_FAIL_8822B(x) (((x) >> BIT_SHIFT_PCIE_MBIST_FAIL_8822B) & BIT_MASK_PCIE_MBIST_FAIL_8822B)

+#define BIT_GET_PCIE_MBIST_FAIL_8822B(x) (((x) >> BIT_SHIFT_PCIE_MBIST_FAIL_8822B) & BIT_MASK_PCIE_MBIST_FAIL_8822B)
+
 
 
 #define BIT_SHIFT_MAC_MBIST_FAIL_8822B 0
 #define BIT_MASK_MAC_MBIST_FAIL_8822B 0xfff
 #define BIT_MAC_MBIST_FAIL_8822B(x) (((x) & BIT_MASK_MAC_MBIST_FAIL_8822B) << BIT_SHIFT_MAC_MBIST_FAIL_8822B)
-#define BIT_GET_MAC_MBIST_FAIL_8822B(x) (((x) >> BIT_SHIFT_MAC_MBIST_FAIL_8822B) & BIT_MASK_MAC_MBIST_FAIL_8822B)

+#define BIT_GET_MAC_MBIST_FAIL_8822B(x) (((x) >> BIT_SHIFT_MAC_MBIST_FAIL_8822B) & BIT_MASK_MAC_MBIST_FAIL_8822B)
+
 
 
 /* 2 REG_MBIST_START_PAUSE_8822B */
@@ -2373,25 +2582,29 @@
 #define BIT_SHIFT_8051_MBIST_START_PAUSE_8822B 26
 #define BIT_MASK_8051_MBIST_START_PAUSE_8822B 0x7
 #define BIT_8051_MBIST_START_PAUSE_8822B(x) (((x) & BIT_MASK_8051_MBIST_START_PAUSE_8822B) << BIT_SHIFT_8051_MBIST_START_PAUSE_8822B)
-#define BIT_GET_8051_MBIST_START_PAUSE_8822B(x) (((x) >> BIT_SHIFT_8051_MBIST_START_PAUSE_8822B) & BIT_MASK_8051_MBIST_START_PAUSE_8822B)

+#define BIT_GET_8051_MBIST_START_PAUSE_8822B(x) (((x) >> BIT_SHIFT_8051_MBIST_START_PAUSE_8822B) & BIT_MASK_8051_MBIST_START_PAUSE_8822B)
+
 
 
 #define BIT_SHIFT_USB_MBIST_START_PAUSE_8822B 24
 #define BIT_MASK_USB_MBIST_START_PAUSE_8822B 0x3
 #define BIT_USB_MBIST_START_PAUSE_8822B(x) (((x) & BIT_MASK_USB_MBIST_START_PAUSE_8822B) << BIT_SHIFT_USB_MBIST_START_PAUSE_8822B)
-#define BIT_GET_USB_MBIST_START_PAUSE_8822B(x) (((x) >> BIT_SHIFT_USB_MBIST_START_PAUSE_8822B) & BIT_MASK_USB_MBIST_START_PAUSE_8822B)

+#define BIT_GET_USB_MBIST_START_PAUSE_8822B(x) (((x) >> BIT_SHIFT_USB_MBIST_START_PAUSE_8822B) & BIT_MASK_USB_MBIST_START_PAUSE_8822B)
+
 
 
 #define BIT_SHIFT_PCIE_MBIST_START_PAUSE_8822B 16
 #define BIT_MASK_PCIE_MBIST_START_PAUSE_8822B 0x3f
 #define BIT_PCIE_MBIST_START_PAUSE_8822B(x) (((x) & BIT_MASK_PCIE_MBIST_START_PAUSE_8822B) << BIT_SHIFT_PCIE_MBIST_START_PAUSE_8822B)
-#define BIT_GET_PCIE_MBIST_START_PAUSE_8822B(x) (((x) >> BIT_SHIFT_PCIE_MBIST_START_PAUSE_8822B) & BIT_MASK_PCIE_MBIST_START_PAUSE_8822B)

+#define BIT_GET_PCIE_MBIST_START_PAUSE_8822B(x) (((x) >> BIT_SHIFT_PCIE_MBIST_START_PAUSE_8822B) & BIT_MASK_PCIE_MBIST_START_PAUSE_8822B)
+
 
 
 #define BIT_SHIFT_MAC_MBIST_START_PAUSE_8822B 0
 #define BIT_MASK_MAC_MBIST_START_PAUSE_8822B 0xfff
 #define BIT_MAC_MBIST_START_PAUSE_8822B(x) (((x) & BIT_MASK_MAC_MBIST_START_PAUSE_8822B) << BIT_SHIFT_MAC_MBIST_START_PAUSE_8822B)
-#define BIT_GET_MAC_MBIST_START_PAUSE_8822B(x) (((x) >> BIT_SHIFT_MAC_MBIST_START_PAUSE_8822B) & BIT_MASK_MAC_MBIST_START_PAUSE_8822B)

+#define BIT_GET_MAC_MBIST_START_PAUSE_8822B(x) (((x) >> BIT_SHIFT_MAC_MBIST_START_PAUSE_8822B) & BIT_MASK_MAC_MBIST_START_PAUSE_8822B)
+
 
 
 /* 2 REG_MBIST_DONE_8822B */
@@ -2399,25 +2612,29 @@
 #define BIT_SHIFT_8051_MBIST_DONE_8822B 26
 #define BIT_MASK_8051_MBIST_DONE_8822B 0x7
 #define BIT_8051_MBIST_DONE_8822B(x) (((x) & BIT_MASK_8051_MBIST_DONE_8822B) << BIT_SHIFT_8051_MBIST_DONE_8822B)
-#define BIT_GET_8051_MBIST_DONE_8822B(x) (((x) >> BIT_SHIFT_8051_MBIST_DONE_8822B) & BIT_MASK_8051_MBIST_DONE_8822B)

+#define BIT_GET_8051_MBIST_DONE_8822B(x) (((x) >> BIT_SHIFT_8051_MBIST_DONE_8822B) & BIT_MASK_8051_MBIST_DONE_8822B)
+
 
 
 #define BIT_SHIFT_USB_MBIST_DONE_8822B 24
 #define BIT_MASK_USB_MBIST_DONE_8822B 0x3
 #define BIT_USB_MBIST_DONE_8822B(x) (((x) & BIT_MASK_USB_MBIST_DONE_8822B) << BIT_SHIFT_USB_MBIST_DONE_8822B)
-#define BIT_GET_USB_MBIST_DONE_8822B(x) (((x) >> BIT_SHIFT_USB_MBIST_DONE_8822B) & BIT_MASK_USB_MBIST_DONE_8822B)

+#define BIT_GET_USB_MBIST_DONE_8822B(x) (((x) >> BIT_SHIFT_USB_MBIST_DONE_8822B) & BIT_MASK_USB_MBIST_DONE_8822B)
+
 
 
 #define BIT_SHIFT_PCIE_MBIST_DONE_8822B 16
 #define BIT_MASK_PCIE_MBIST_DONE_8822B 0x3f
 #define BIT_PCIE_MBIST_DONE_8822B(x) (((x) & BIT_MASK_PCIE_MBIST_DONE_8822B) << BIT_SHIFT_PCIE_MBIST_DONE_8822B)
-#define BIT_GET_PCIE_MBIST_DONE_8822B(x) (((x) >> BIT_SHIFT_PCIE_MBIST_DONE_8822B) & BIT_MASK_PCIE_MBIST_DONE_8822B)

+#define BIT_GET_PCIE_MBIST_DONE_8822B(x) (((x) >> BIT_SHIFT_PCIE_MBIST_DONE_8822B) & BIT_MASK_PCIE_MBIST_DONE_8822B)
+
 
 
 #define BIT_SHIFT_MAC_MBIST_DONE_8822B 0
 #define BIT_MASK_MAC_MBIST_DONE_8822B 0xfff
 #define BIT_MAC_MBIST_DONE_8822B(x) (((x) & BIT_MASK_MAC_MBIST_DONE_8822B) << BIT_SHIFT_MAC_MBIST_DONE_8822B)
-#define BIT_GET_MAC_MBIST_DONE_8822B(x) (((x) >> BIT_SHIFT_MAC_MBIST_DONE_8822B) & BIT_MASK_MAC_MBIST_DONE_8822B)

+#define BIT_GET_MAC_MBIST_DONE_8822B(x) (((x) >> BIT_SHIFT_MAC_MBIST_DONE_8822B) & BIT_MASK_MAC_MBIST_DONE_8822B)
+
 
 
 /* 2 REG_MBIST_FAIL_NRML_8822B */
@@ -2425,7 +2642,8 @@
 #define BIT_SHIFT_MBIST_FAIL_NRML_8822B 0
 #define BIT_MASK_MBIST_FAIL_NRML_8822B 0xffffffffL
 #define BIT_MBIST_FAIL_NRML_8822B(x) (((x) & BIT_MASK_MBIST_FAIL_NRML_8822B) << BIT_SHIFT_MBIST_FAIL_NRML_8822B)
-#define BIT_GET_MBIST_FAIL_NRML_8822B(x) (((x) >> BIT_SHIFT_MBIST_FAIL_NRML_8822B) & BIT_MASK_MBIST_FAIL_NRML_8822B)

+#define BIT_GET_MBIST_FAIL_NRML_8822B(x) (((x) >> BIT_SHIFT_MBIST_FAIL_NRML_8822B) & BIT_MASK_MBIST_FAIL_NRML_8822B)
+
 
 
 /* 2 REG_AES_DECRPT_DATA_8822B */
@@ -2433,7 +2651,8 @@
 #define BIT_SHIFT_IPS_CFG_ADDR_8822B 0
 #define BIT_MASK_IPS_CFG_ADDR_8822B 0xff
 #define BIT_IPS_CFG_ADDR_8822B(x) (((x) & BIT_MASK_IPS_CFG_ADDR_8822B) << BIT_SHIFT_IPS_CFG_ADDR_8822B)
-#define BIT_GET_IPS_CFG_ADDR_8822B(x) (((x) >> BIT_SHIFT_IPS_CFG_ADDR_8822B) & BIT_MASK_IPS_CFG_ADDR_8822B)

+#define BIT_GET_IPS_CFG_ADDR_8822B(x) (((x) >> BIT_SHIFT_IPS_CFG_ADDR_8822B) & BIT_MASK_IPS_CFG_ADDR_8822B)
+
 
 
 /* 2 REG_AES_DECRPT_CFG_8822B */
@@ -2441,7 +2660,8 @@
 #define BIT_SHIFT_IPS_CFG_DATA_8822B 0
 #define BIT_MASK_IPS_CFG_DATA_8822B 0xffffffffL
 #define BIT_IPS_CFG_DATA_8822B(x) (((x) & BIT_MASK_IPS_CFG_DATA_8822B) << BIT_SHIFT_IPS_CFG_DATA_8822B)
-#define BIT_GET_IPS_CFG_DATA_8822B(x) (((x) >> BIT_SHIFT_IPS_CFG_DATA_8822B) & BIT_MASK_IPS_CFG_DATA_8822B)

+#define BIT_GET_IPS_CFG_DATA_8822B(x) (((x) >> BIT_SHIFT_IPS_CFG_DATA_8822B) & BIT_MASK_IPS_CFG_DATA_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -2454,19 +2674,22 @@
 #define BIT_SHIFT_TEMP_VALUE_8822B 24
 #define BIT_MASK_TEMP_VALUE_8822B 0x3f
 #define BIT_TEMP_VALUE_8822B(x) (((x) & BIT_MASK_TEMP_VALUE_8822B) << BIT_SHIFT_TEMP_VALUE_8822B)
-#define BIT_GET_TEMP_VALUE_8822B(x) (((x) >> BIT_SHIFT_TEMP_VALUE_8822B) & BIT_MASK_TEMP_VALUE_8822B)

+#define BIT_GET_TEMP_VALUE_8822B(x) (((x) >> BIT_SHIFT_TEMP_VALUE_8822B) & BIT_MASK_TEMP_VALUE_8822B)
+
 
 
 #define BIT_SHIFT_REG_TMETER_TIMER_8822B 8
 #define BIT_MASK_REG_TMETER_TIMER_8822B 0xfff
 #define BIT_REG_TMETER_TIMER_8822B(x) (((x) & BIT_MASK_REG_TMETER_TIMER_8822B) << BIT_SHIFT_REG_TMETER_TIMER_8822B)
-#define BIT_GET_REG_TMETER_TIMER_8822B(x) (((x) >> BIT_SHIFT_REG_TMETER_TIMER_8822B) & BIT_MASK_REG_TMETER_TIMER_8822B)

+#define BIT_GET_REG_TMETER_TIMER_8822B(x) (((x) >> BIT_SHIFT_REG_TMETER_TIMER_8822B) & BIT_MASK_REG_TMETER_TIMER_8822B)
+
 
 
 #define BIT_SHIFT_REG_TEMP_DELTA_8822B 2
 #define BIT_MASK_REG_TEMP_DELTA_8822B 0x3f
 #define BIT_REG_TEMP_DELTA_8822B(x) (((x) & BIT_MASK_REG_TEMP_DELTA_8822B) << BIT_SHIFT_REG_TEMP_DELTA_8822B)
-#define BIT_GET_REG_TEMP_DELTA_8822B(x) (((x) >> BIT_SHIFT_REG_TEMP_DELTA_8822B) & BIT_MASK_REG_TEMP_DELTA_8822B)

+#define BIT_GET_REG_TEMP_DELTA_8822B(x) (((x) >> BIT_SHIFT_REG_TEMP_DELTA_8822B) & BIT_MASK_REG_TEMP_DELTA_8822B)
+
 
 #define BIT_REG_TMETER_EN_8822B BIT(0)
 
@@ -2475,13 +2698,15 @@
 #define BIT_SHIFT_OSC_32K_CLKGEN_0_8822B 16
 #define BIT_MASK_OSC_32K_CLKGEN_0_8822B 0xffff
 #define BIT_OSC_32K_CLKGEN_0_8822B(x) (((x) & BIT_MASK_OSC_32K_CLKGEN_0_8822B) << BIT_SHIFT_OSC_32K_CLKGEN_0_8822B)
-#define BIT_GET_OSC_32K_CLKGEN_0_8822B(x) (((x) >> BIT_SHIFT_OSC_32K_CLKGEN_0_8822B) & BIT_MASK_OSC_32K_CLKGEN_0_8822B)

+#define BIT_GET_OSC_32K_CLKGEN_0_8822B(x) (((x) >> BIT_SHIFT_OSC_32K_CLKGEN_0_8822B) & BIT_MASK_OSC_32K_CLKGEN_0_8822B)
+
 
 
 #define BIT_SHIFT_OSC_32K_RES_COMP_8822B 4
 #define BIT_MASK_OSC_32K_RES_COMP_8822B 0x3
 #define BIT_OSC_32K_RES_COMP_8822B(x) (((x) & BIT_MASK_OSC_32K_RES_COMP_8822B) << BIT_SHIFT_OSC_32K_RES_COMP_8822B)
-#define BIT_GET_OSC_32K_RES_COMP_8822B(x) (((x) >> BIT_SHIFT_OSC_32K_RES_COMP_8822B) & BIT_MASK_OSC_32K_RES_COMP_8822B)

+#define BIT_GET_OSC_32K_RES_COMP_8822B(x) (((x) >> BIT_SHIFT_OSC_32K_RES_COMP_8822B) & BIT_MASK_OSC_32K_RES_COMP_8822B)
+
 
 #define BIT_OSC_32K_OUT_SEL_8822B BIT(3)
 #define BIT_ISO_WL_2_OSC_32K_8822B BIT(1)
@@ -2494,13 +2719,15 @@
 #define BIT_SHIFT_CAL_32K_REG_ADDR_8822B 16
 #define BIT_MASK_CAL_32K_REG_ADDR_8822B 0x3f
 #define BIT_CAL_32K_REG_ADDR_8822B(x) (((x) & BIT_MASK_CAL_32K_REG_ADDR_8822B) << BIT_SHIFT_CAL_32K_REG_ADDR_8822B)
-#define BIT_GET_CAL_32K_REG_ADDR_8822B(x) (((x) >> BIT_SHIFT_CAL_32K_REG_ADDR_8822B) & BIT_MASK_CAL_32K_REG_ADDR_8822B)

+#define BIT_GET_CAL_32K_REG_ADDR_8822B(x) (((x) >> BIT_SHIFT_CAL_32K_REG_ADDR_8822B) & BIT_MASK_CAL_32K_REG_ADDR_8822B)
+
 
 
 #define BIT_SHIFT_CAL_32K_REG_DATA_8822B 0
 #define BIT_MASK_CAL_32K_REG_DATA_8822B 0xffff
 #define BIT_CAL_32K_REG_DATA_8822B(x) (((x) & BIT_MASK_CAL_32K_REG_DATA_8822B) << BIT_SHIFT_CAL_32K_REG_DATA_8822B)
-#define BIT_GET_CAL_32K_REG_DATA_8822B(x) (((x) >> BIT_SHIFT_CAL_32K_REG_DATA_8822B) & BIT_MASK_CAL_32K_REG_DATA_8822B)

+#define BIT_GET_CAL_32K_REG_DATA_8822B(x) (((x) >> BIT_SHIFT_CAL_32K_REG_DATA_8822B) & BIT_MASK_CAL_32K_REG_DATA_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -2510,7 +2737,8 @@
 #define BIT_SHIFT_C2HEVT_MSG_8822B 0
 #define BIT_MASK_C2HEVT_MSG_8822B 0xffffffffffffffffffffffffffffffffL
 #define BIT_C2HEVT_MSG_8822B(x) (((x) & BIT_MASK_C2HEVT_MSG_8822B) << BIT_SHIFT_C2HEVT_MSG_8822B)
-#define BIT_GET_C2HEVT_MSG_8822B(x) (((x) >> BIT_SHIFT_C2HEVT_MSG_8822B) & BIT_MASK_C2HEVT_MSG_8822B)

+#define BIT_GET_C2HEVT_MSG_8822B(x) (((x) >> BIT_SHIFT_C2HEVT_MSG_8822B) & BIT_MASK_C2HEVT_MSG_8822B)
+
 
 
 /* 2 REG_SW_DEFINED_PAGE1_8822B */
@@ -2518,7 +2746,8 @@
 #define BIT_SHIFT_SW_DEFINED_PAGE1_8822B 0
 #define BIT_MASK_SW_DEFINED_PAGE1_8822B 0xffffffffffffffffL
 #define BIT_SW_DEFINED_PAGE1_8822B(x) (((x) & BIT_MASK_SW_DEFINED_PAGE1_8822B) << BIT_SHIFT_SW_DEFINED_PAGE1_8822B)
-#define BIT_GET_SW_DEFINED_PAGE1_8822B(x) (((x) >> BIT_SHIFT_SW_DEFINED_PAGE1_8822B) & BIT_MASK_SW_DEFINED_PAGE1_8822B)

+#define BIT_GET_SW_DEFINED_PAGE1_8822B(x) (((x) >> BIT_SHIFT_SW_DEFINED_PAGE1_8822B) & BIT_MASK_SW_DEFINED_PAGE1_8822B)
+
 
 
 /* 2 REG_MCUTST_I_8822B */
@@ -2526,7 +2755,8 @@
 #define BIT_SHIFT_MCUDMSG_I_8822B 0
 #define BIT_MASK_MCUDMSG_I_8822B 0xffffffffL
 #define BIT_MCUDMSG_I_8822B(x) (((x) & BIT_MASK_MCUDMSG_I_8822B) << BIT_SHIFT_MCUDMSG_I_8822B)
-#define BIT_GET_MCUDMSG_I_8822B(x) (((x) >> BIT_SHIFT_MCUDMSG_I_8822B) & BIT_MASK_MCUDMSG_I_8822B)

+#define BIT_GET_MCUDMSG_I_8822B(x) (((x) >> BIT_SHIFT_MCUDMSG_I_8822B) & BIT_MASK_MCUDMSG_I_8822B)
+
 
 
 /* 2 REG_MCUTST_II_8822B */
@@ -2534,7 +2764,8 @@
 #define BIT_SHIFT_MCUDMSG_II_8822B 0
 #define BIT_MASK_MCUDMSG_II_8822B 0xffffffffL
 #define BIT_MCUDMSG_II_8822B(x) (((x) & BIT_MASK_MCUDMSG_II_8822B) << BIT_SHIFT_MCUDMSG_II_8822B)
-#define BIT_GET_MCUDMSG_II_8822B(x) (((x) >> BIT_SHIFT_MCUDMSG_II_8822B) & BIT_MASK_MCUDMSG_II_8822B)

+#define BIT_GET_MCUDMSG_II_8822B(x) (((x) >> BIT_SHIFT_MCUDMSG_II_8822B) & BIT_MASK_MCUDMSG_II_8822B)
+
 
 
 /* 2 REG_FMETHR_8822B */
@@ -2543,7 +2774,8 @@
 #define BIT_SHIFT_FW_MSG_8822B 0
 #define BIT_MASK_FW_MSG_8822B 0xffffffffL
 #define BIT_FW_MSG_8822B(x) (((x) & BIT_MASK_FW_MSG_8822B) << BIT_SHIFT_FW_MSG_8822B)
-#define BIT_GET_FW_MSG_8822B(x) (((x) >> BIT_SHIFT_FW_MSG_8822B) & BIT_MASK_FW_MSG_8822B)

+#define BIT_GET_FW_MSG_8822B(x) (((x) >> BIT_SHIFT_FW_MSG_8822B) & BIT_MASK_FW_MSG_8822B)
+
 
 
 /* 2 REG_HMETFR_8822B */
@@ -2551,7 +2783,8 @@
 #define BIT_SHIFT_HRCV_MSG_8822B 24
 #define BIT_MASK_HRCV_MSG_8822B 0xff
 #define BIT_HRCV_MSG_8822B(x) (((x) & BIT_MASK_HRCV_MSG_8822B) << BIT_SHIFT_HRCV_MSG_8822B)
-#define BIT_GET_HRCV_MSG_8822B(x) (((x) >> BIT_SHIFT_HRCV_MSG_8822B) & BIT_MASK_HRCV_MSG_8822B)

+#define BIT_GET_HRCV_MSG_8822B(x) (((x) >> BIT_SHIFT_HRCV_MSG_8822B) & BIT_MASK_HRCV_MSG_8822B)
+
 
 #define BIT_INT_BOX3_8822B BIT(3)
 #define BIT_INT_BOX2_8822B BIT(2)
@@ -2563,7 +2796,8 @@
 #define BIT_SHIFT_HOST_MSG_0_8822B 0
 #define BIT_MASK_HOST_MSG_0_8822B 0xffffffffL
 #define BIT_HOST_MSG_0_8822B(x) (((x) & BIT_MASK_HOST_MSG_0_8822B) << BIT_SHIFT_HOST_MSG_0_8822B)
-#define BIT_GET_HOST_MSG_0_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_0_8822B) & BIT_MASK_HOST_MSG_0_8822B)

+#define BIT_GET_HOST_MSG_0_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_0_8822B) & BIT_MASK_HOST_MSG_0_8822B)
+
 
 
 /* 2 REG_HMEBOX1_8822B */
@@ -2571,7 +2805,8 @@
 #define BIT_SHIFT_HOST_MSG_1_8822B 0
 #define BIT_MASK_HOST_MSG_1_8822B 0xffffffffL
 #define BIT_HOST_MSG_1_8822B(x) (((x) & BIT_MASK_HOST_MSG_1_8822B) << BIT_SHIFT_HOST_MSG_1_8822B)
-#define BIT_GET_HOST_MSG_1_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_1_8822B) & BIT_MASK_HOST_MSG_1_8822B)

+#define BIT_GET_HOST_MSG_1_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_1_8822B) & BIT_MASK_HOST_MSG_1_8822B)
+
 
 
 /* 2 REG_HMEBOX2_8822B */
@@ -2579,7 +2814,8 @@
 #define BIT_SHIFT_HOST_MSG_2_8822B 0
 #define BIT_MASK_HOST_MSG_2_8822B 0xffffffffL
 #define BIT_HOST_MSG_2_8822B(x) (((x) & BIT_MASK_HOST_MSG_2_8822B) << BIT_SHIFT_HOST_MSG_2_8822B)
-#define BIT_GET_HOST_MSG_2_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_2_8822B) & BIT_MASK_HOST_MSG_2_8822B)

+#define BIT_GET_HOST_MSG_2_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_2_8822B) & BIT_MASK_HOST_MSG_2_8822B)
+
 
 
 /* 2 REG_HMEBOX3_8822B */
@@ -2587,7 +2823,8 @@
 #define BIT_SHIFT_HOST_MSG_3_8822B 0
 #define BIT_MASK_HOST_MSG_3_8822B 0xffffffffL
 #define BIT_HOST_MSG_3_8822B(x) (((x) & BIT_MASK_HOST_MSG_3_8822B) << BIT_SHIFT_HOST_MSG_3_8822B)
-#define BIT_GET_HOST_MSG_3_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_3_8822B) & BIT_MASK_HOST_MSG_3_8822B)

+#define BIT_GET_HOST_MSG_3_8822B(x) (((x) >> BIT_SHIFT_HOST_MSG_3_8822B) & BIT_MASK_HOST_MSG_3_8822B)
+
 
 
 /* 2 REG_LLT_INIT_8822B */
@@ -2595,19 +2832,22 @@
 #define BIT_SHIFT_LLTE_RWM_8822B 30
 #define BIT_MASK_LLTE_RWM_8822B 0x3
 #define BIT_LLTE_RWM_8822B(x) (((x) & BIT_MASK_LLTE_RWM_8822B) << BIT_SHIFT_LLTE_RWM_8822B)
-#define BIT_GET_LLTE_RWM_8822B(x) (((x) >> BIT_SHIFT_LLTE_RWM_8822B) & BIT_MASK_LLTE_RWM_8822B)

+#define BIT_GET_LLTE_RWM_8822B(x) (((x) >> BIT_SHIFT_LLTE_RWM_8822B) & BIT_MASK_LLTE_RWM_8822B)
+
 
 
 #define BIT_SHIFT_LLTINI_PDATA_V1_8822B 16
 #define BIT_MASK_LLTINI_PDATA_V1_8822B 0xfff
 #define BIT_LLTINI_PDATA_V1_8822B(x) (((x) & BIT_MASK_LLTINI_PDATA_V1_8822B) << BIT_SHIFT_LLTINI_PDATA_V1_8822B)
-#define BIT_GET_LLTINI_PDATA_V1_8822B(x) (((x) >> BIT_SHIFT_LLTINI_PDATA_V1_8822B) & BIT_MASK_LLTINI_PDATA_V1_8822B)

+#define BIT_GET_LLTINI_PDATA_V1_8822B(x) (((x) >> BIT_SHIFT_LLTINI_PDATA_V1_8822B) & BIT_MASK_LLTINI_PDATA_V1_8822B)
+
 
 
 #define BIT_SHIFT_LLTINI_HDATA_V1_8822B 0
 #define BIT_MASK_LLTINI_HDATA_V1_8822B 0xfff
 #define BIT_LLTINI_HDATA_V1_8822B(x) (((x) & BIT_MASK_LLTINI_HDATA_V1_8822B) << BIT_SHIFT_LLTINI_HDATA_V1_8822B)
-#define BIT_GET_LLTINI_HDATA_V1_8822B(x) (((x) >> BIT_SHIFT_LLTINI_HDATA_V1_8822B) & BIT_MASK_LLTINI_HDATA_V1_8822B)

+#define BIT_GET_LLTINI_HDATA_V1_8822B(x) (((x) >> BIT_SHIFT_LLTINI_HDATA_V1_8822B) & BIT_MASK_LLTINI_HDATA_V1_8822B)
+
 
 
 /* 2 REG_LLT_INIT_ADDR_8822B */
@@ -2615,7 +2855,8 @@
 #define BIT_SHIFT_LLTINI_ADDR_V1_8822B 0
 #define BIT_MASK_LLTINI_ADDR_V1_8822B 0xfff
 #define BIT_LLTINI_ADDR_V1_8822B(x) (((x) & BIT_MASK_LLTINI_ADDR_V1_8822B) << BIT_SHIFT_LLTINI_ADDR_V1_8822B)
-#define BIT_GET_LLTINI_ADDR_V1_8822B(x) (((x) >> BIT_SHIFT_LLTINI_ADDR_V1_8822B) & BIT_MASK_LLTINI_ADDR_V1_8822B)

+#define BIT_GET_LLTINI_ADDR_V1_8822B(x) (((x) >> BIT_SHIFT_LLTINI_ADDR_V1_8822B) & BIT_MASK_LLTINI_ADDR_V1_8822B)
+
 
 
 /* 2 REG_BB_ACCESS_CTRL_8822B */
@@ -2623,19 +2864,22 @@
 #define BIT_SHIFT_BB_WRITE_READ_8822B 30
 #define BIT_MASK_BB_WRITE_READ_8822B 0x3
 #define BIT_BB_WRITE_READ_8822B(x) (((x) & BIT_MASK_BB_WRITE_READ_8822B) << BIT_SHIFT_BB_WRITE_READ_8822B)
-#define BIT_GET_BB_WRITE_READ_8822B(x) (((x) >> BIT_SHIFT_BB_WRITE_READ_8822B) & BIT_MASK_BB_WRITE_READ_8822B)

+#define BIT_GET_BB_WRITE_READ_8822B(x) (((x) >> BIT_SHIFT_BB_WRITE_READ_8822B) & BIT_MASK_BB_WRITE_READ_8822B)
+
 
 
 #define BIT_SHIFT_BB_WRITE_EN_8822B 12
 #define BIT_MASK_BB_WRITE_EN_8822B 0xf
 #define BIT_BB_WRITE_EN_8822B(x) (((x) & BIT_MASK_BB_WRITE_EN_8822B) << BIT_SHIFT_BB_WRITE_EN_8822B)
-#define BIT_GET_BB_WRITE_EN_8822B(x) (((x) >> BIT_SHIFT_BB_WRITE_EN_8822B) & BIT_MASK_BB_WRITE_EN_8822B)

+#define BIT_GET_BB_WRITE_EN_8822B(x) (((x) >> BIT_SHIFT_BB_WRITE_EN_8822B) & BIT_MASK_BB_WRITE_EN_8822B)
+
 
 
 #define BIT_SHIFT_BB_ADDR_8822B 2
 #define BIT_MASK_BB_ADDR_8822B 0x1ff
 #define BIT_BB_ADDR_8822B(x) (((x) & BIT_MASK_BB_ADDR_8822B) << BIT_SHIFT_BB_ADDR_8822B)
-#define BIT_GET_BB_ADDR_8822B(x) (((x) >> BIT_SHIFT_BB_ADDR_8822B) & BIT_MASK_BB_ADDR_8822B)

+#define BIT_GET_BB_ADDR_8822B(x) (((x) >> BIT_SHIFT_BB_ADDR_8822B) & BIT_MASK_BB_ADDR_8822B)
+
 
 #define BIT_BB_ERRACC_8822B BIT(0)
 
@@ -2644,7 +2888,8 @@
 #define BIT_SHIFT_BB_DATA_8822B 0
 #define BIT_MASK_BB_DATA_8822B 0xffffffffL
 #define BIT_BB_DATA_8822B(x) (((x) & BIT_MASK_BB_DATA_8822B) << BIT_SHIFT_BB_DATA_8822B)
-#define BIT_GET_BB_DATA_8822B(x) (((x) >> BIT_SHIFT_BB_DATA_8822B) & BIT_MASK_BB_DATA_8822B)

+#define BIT_GET_BB_DATA_8822B(x) (((x) >> BIT_SHIFT_BB_DATA_8822B) & BIT_MASK_BB_DATA_8822B)
+
 
 
 /* 2 REG_HMEBOX_E0_8822B */
@@ -2652,7 +2897,8 @@
 #define BIT_SHIFT_HMEBOX_E0_8822B 0
 #define BIT_MASK_HMEBOX_E0_8822B 0xffffffffL
 #define BIT_HMEBOX_E0_8822B(x) (((x) & BIT_MASK_HMEBOX_E0_8822B) << BIT_SHIFT_HMEBOX_E0_8822B)
-#define BIT_GET_HMEBOX_E0_8822B(x) (((x) >> BIT_SHIFT_HMEBOX_E0_8822B) & BIT_MASK_HMEBOX_E0_8822B)

+#define BIT_GET_HMEBOX_E0_8822B(x) (((x) >> BIT_SHIFT_HMEBOX_E0_8822B) & BIT_MASK_HMEBOX_E0_8822B)
+
 
 
 /* 2 REG_HMEBOX_E1_8822B */
@@ -2660,7 +2906,8 @@
 #define BIT_SHIFT_HMEBOX_E1_8822B 0
 #define BIT_MASK_HMEBOX_E1_8822B 0xffffffffL
 #define BIT_HMEBOX_E1_8822B(x) (((x) & BIT_MASK_HMEBOX_E1_8822B) << BIT_SHIFT_HMEBOX_E1_8822B)
-#define BIT_GET_HMEBOX_E1_8822B(x) (((x) >> BIT_SHIFT_HMEBOX_E1_8822B) & BIT_MASK_HMEBOX_E1_8822B)

+#define BIT_GET_HMEBOX_E1_8822B(x) (((x) >> BIT_SHIFT_HMEBOX_E1_8822B) & BIT_MASK_HMEBOX_E1_8822B)
+
 
 
 /* 2 REG_HMEBOX_E2_8822B */
@@ -2668,7 +2915,8 @@
 #define BIT_SHIFT_HMEBOX_E2_8822B 0
 #define BIT_MASK_HMEBOX_E2_8822B 0xffffffffL
 #define BIT_HMEBOX_E2_8822B(x) (((x) & BIT_MASK_HMEBOX_E2_8822B) << BIT_SHIFT_HMEBOX_E2_8822B)
-#define BIT_GET_HMEBOX_E2_8822B(x) (((x) >> BIT_SHIFT_HMEBOX_E2_8822B) & BIT_MASK_HMEBOX_E2_8822B)

+#define BIT_GET_HMEBOX_E2_8822B(x) (((x) >> BIT_SHIFT_HMEBOX_E2_8822B) & BIT_MASK_HMEBOX_E2_8822B)
+
 
 
 /* 2 REG_HMEBOX_E3_8822B */
@@ -2676,7 +2924,8 @@
 #define BIT_SHIFT_HMEBOX_E3_8822B 0
 #define BIT_MASK_HMEBOX_E3_8822B 0xffffffffL
 #define BIT_HMEBOX_E3_8822B(x) (((x) & BIT_MASK_HMEBOX_E3_8822B) << BIT_SHIFT_HMEBOX_E3_8822B)
-#define BIT_GET_HMEBOX_E3_8822B(x) (((x) >> BIT_SHIFT_HMEBOX_E3_8822B) & BIT_MASK_HMEBOX_E3_8822B)

+#define BIT_GET_HMEBOX_E3_8822B(x) (((x) >> BIT_SHIFT_HMEBOX_E3_8822B) & BIT_MASK_HMEBOX_E3_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -2686,26 +2935,30 @@
 #define BIT_SHIFT_PHY_REQ_DELAY_8822B 24
 #define BIT_MASK_PHY_REQ_DELAY_8822B 0xf
 #define BIT_PHY_REQ_DELAY_8822B(x) (((x) & BIT_MASK_PHY_REQ_DELAY_8822B) << BIT_SHIFT_PHY_REQ_DELAY_8822B)
-#define BIT_GET_PHY_REQ_DELAY_8822B(x) (((x) >> BIT_SHIFT_PHY_REQ_DELAY_8822B) & BIT_MASK_PHY_REQ_DELAY_8822B)

+#define BIT_GET_PHY_REQ_DELAY_8822B(x) (((x) >> BIT_SHIFT_PHY_REQ_DELAY_8822B) & BIT_MASK_PHY_REQ_DELAY_8822B)
+
 
 #define BIT_SPD_DOWN_8822B BIT(16)
 
 #define BIT_SHIFT_NETYPE4_8822B 4
 #define BIT_MASK_NETYPE4_8822B 0x3
 #define BIT_NETYPE4_8822B(x) (((x) & BIT_MASK_NETYPE4_8822B) << BIT_SHIFT_NETYPE4_8822B)
-#define BIT_GET_NETYPE4_8822B(x) (((x) >> BIT_SHIFT_NETYPE4_8822B) & BIT_MASK_NETYPE4_8822B)

+#define BIT_GET_NETYPE4_8822B(x) (((x) >> BIT_SHIFT_NETYPE4_8822B) & BIT_MASK_NETYPE4_8822B)
+
 
 
 #define BIT_SHIFT_NETYPE3_8822B 2
 #define BIT_MASK_NETYPE3_8822B 0x3
 #define BIT_NETYPE3_8822B(x) (((x) & BIT_MASK_NETYPE3_8822B) << BIT_SHIFT_NETYPE3_8822B)
-#define BIT_GET_NETYPE3_8822B(x) (((x) >> BIT_SHIFT_NETYPE3_8822B) & BIT_MASK_NETYPE3_8822B)

+#define BIT_GET_NETYPE3_8822B(x) (((x) >> BIT_SHIFT_NETYPE3_8822B) & BIT_MASK_NETYPE3_8822B)
+
 
 
 #define BIT_SHIFT_NETYPE2_8822B 0
 #define BIT_MASK_NETYPE2_8822B 0x3
 #define BIT_NETYPE2_8822B(x) (((x) & BIT_MASK_NETYPE2_8822B) << BIT_SHIFT_NETYPE2_8822B)
-#define BIT_GET_NETYPE2_8822B(x) (((x) >> BIT_SHIFT_NETYPE2_8822B) & BIT_MASK_NETYPE2_8822B)

+#define BIT_GET_NETYPE2_8822B(x) (((x) >> BIT_SHIFT_NETYPE2_8822B) & BIT_MASK_NETYPE2_8822B)
+
 
 
 /* 2 REG_FWFF_8822B */
@@ -2713,19 +2966,22 @@
 #define BIT_SHIFT_PKTNUM_TH_V1_8822B 24
 #define BIT_MASK_PKTNUM_TH_V1_8822B 0xff
 #define BIT_PKTNUM_TH_V1_8822B(x) (((x) & BIT_MASK_PKTNUM_TH_V1_8822B) << BIT_SHIFT_PKTNUM_TH_V1_8822B)
-#define BIT_GET_PKTNUM_TH_V1_8822B(x) (((x) >> BIT_SHIFT_PKTNUM_TH_V1_8822B) & BIT_MASK_PKTNUM_TH_V1_8822B)

+#define BIT_GET_PKTNUM_TH_V1_8822B(x) (((x) >> BIT_SHIFT_PKTNUM_TH_V1_8822B) & BIT_MASK_PKTNUM_TH_V1_8822B)
+
 
 
 #define BIT_SHIFT_TIMER_TH_8822B 16
 #define BIT_MASK_TIMER_TH_8822B 0xff
 #define BIT_TIMER_TH_8822B(x) (((x) & BIT_MASK_TIMER_TH_8822B) << BIT_SHIFT_TIMER_TH_8822B)
-#define BIT_GET_TIMER_TH_8822B(x) (((x) >> BIT_SHIFT_TIMER_TH_8822B) & BIT_MASK_TIMER_TH_8822B)

+#define BIT_GET_TIMER_TH_8822B(x) (((x) >> BIT_SHIFT_TIMER_TH_8822B) & BIT_MASK_TIMER_TH_8822B)
+
 
 
 #define BIT_SHIFT_RXPKT1ENADDR_8822B 0
 #define BIT_MASK_RXPKT1ENADDR_8822B 0xffff
 #define BIT_RXPKT1ENADDR_8822B(x) (((x) & BIT_MASK_RXPKT1ENADDR_8822B) << BIT_SHIFT_RXPKT1ENADDR_8822B)
-#define BIT_GET_RXPKT1ENADDR_8822B(x) (((x) >> BIT_SHIFT_RXPKT1ENADDR_8822B) & BIT_MASK_RXPKT1ENADDR_8822B)

+#define BIT_GET_RXPKT1ENADDR_8822B(x) (((x) >> BIT_SHIFT_RXPKT1ENADDR_8822B) & BIT_MASK_RXPKT1ENADDR_8822B)
+
 
 
 /* 2 REG_RXFF_PTR_V1_8822B */
@@ -2735,7 +2991,8 @@
 #define BIT_SHIFT_RXFF0_RDPTR_V2_8822B 0
 #define BIT_MASK_RXFF0_RDPTR_V2_8822B 0x3ffff
 #define BIT_RXFF0_RDPTR_V2_8822B(x) (((x) & BIT_MASK_RXFF0_RDPTR_V2_8822B) << BIT_SHIFT_RXFF0_RDPTR_V2_8822B)
-#define BIT_GET_RXFF0_RDPTR_V2_8822B(x) (((x) >> BIT_SHIFT_RXFF0_RDPTR_V2_8822B) & BIT_MASK_RXFF0_RDPTR_V2_8822B)

+#define BIT_GET_RXFF0_RDPTR_V2_8822B(x) (((x) >> BIT_SHIFT_RXFF0_RDPTR_V2_8822B) & BIT_MASK_RXFF0_RDPTR_V2_8822B)
+
 
 
 /* 2 REG_RXFF_WTR_V1_8822B */
@@ -2745,7 +3002,8 @@
 #define BIT_SHIFT_RXFF0_WTPTR_V2_8822B 0
 #define BIT_MASK_RXFF0_WTPTR_V2_8822B 0x3ffff
 #define BIT_RXFF0_WTPTR_V2_8822B(x) (((x) & BIT_MASK_RXFF0_WTPTR_V2_8822B) << BIT_SHIFT_RXFF0_WTPTR_V2_8822B)
-#define BIT_GET_RXFF0_WTPTR_V2_8822B(x) (((x) >> BIT_SHIFT_RXFF0_WTPTR_V2_8822B) & BIT_MASK_RXFF0_WTPTR_V2_8822B)

+#define BIT_GET_RXFF0_WTPTR_V2_8822B(x) (((x) >> BIT_SHIFT_RXFF0_WTPTR_V2_8822B) & BIT_MASK_RXFF0_WTPTR_V2_8822B)
+
 
 
 /* 2 REG_FE2IMR_8822B */
@@ -2981,7 +3239,8 @@
 #define BIT_SHIFT_MID_31TO0_8822B 0
 #define BIT_MASK_MID_31TO0_8822B 0xffffffffL
 #define BIT_MID_31TO0_8822B(x) (((x) & BIT_MASK_MID_31TO0_8822B) << BIT_SHIFT_MID_31TO0_8822B)
-#define BIT_GET_MID_31TO0_8822B(x) (((x) >> BIT_SHIFT_MID_31TO0_8822B) & BIT_MASK_MID_31TO0_8822B)

+#define BIT_GET_MID_31TO0_8822B(x) (((x) >> BIT_SHIFT_MID_31TO0_8822B) & BIT_MASK_MID_31TO0_8822B)
+
 
 
 /* 2 REG_SPWR1_8822B */
@@ -2989,7 +3248,8 @@
 #define BIT_SHIFT_MID_63TO32_8822B 0
 #define BIT_MASK_MID_63TO32_8822B 0xffffffffL
 #define BIT_MID_63TO32_8822B(x) (((x) & BIT_MASK_MID_63TO32_8822B) << BIT_SHIFT_MID_63TO32_8822B)
-#define BIT_GET_MID_63TO32_8822B(x) (((x) >> BIT_SHIFT_MID_63TO32_8822B) & BIT_MASK_MID_63TO32_8822B)

+#define BIT_GET_MID_63TO32_8822B(x) (((x) >> BIT_SHIFT_MID_63TO32_8822B) & BIT_MASK_MID_63TO32_8822B)
+
 
 
 /* 2 REG_SPWR2_8822B */
@@ -2997,7 +3257,8 @@
 #define BIT_SHIFT_MID_95O64_8822B 0
 #define BIT_MASK_MID_95O64_8822B 0xffffffffL
 #define BIT_MID_95O64_8822B(x) (((x) & BIT_MASK_MID_95O64_8822B) << BIT_SHIFT_MID_95O64_8822B)
-#define BIT_GET_MID_95O64_8822B(x) (((x) >> BIT_SHIFT_MID_95O64_8822B) & BIT_MASK_MID_95O64_8822B)

+#define BIT_GET_MID_95O64_8822B(x) (((x) >> BIT_SHIFT_MID_95O64_8822B) & BIT_MASK_MID_95O64_8822B)
+
 
 
 /* 2 REG_SPWR3_8822B */
@@ -3005,7 +3266,8 @@
 #define BIT_SHIFT_MID_127TO96_8822B 0
 #define BIT_MASK_MID_127TO96_8822B 0xffffffffL
 #define BIT_MID_127TO96_8822B(x) (((x) & BIT_MASK_MID_127TO96_8822B) << BIT_SHIFT_MID_127TO96_8822B)
-#define BIT_GET_MID_127TO96_8822B(x) (((x) >> BIT_SHIFT_MID_127TO96_8822B) & BIT_MASK_MID_127TO96_8822B)

+#define BIT_GET_MID_127TO96_8822B(x) (((x) >> BIT_SHIFT_MID_127TO96_8822B) & BIT_MASK_MID_127TO96_8822B)
+
 
 
 /* 2 REG_POWSEQ_8822B */
@@ -3013,13 +3275,15 @@
 #define BIT_SHIFT_SEQNUM_MID_8822B 16
 #define BIT_MASK_SEQNUM_MID_8822B 0xffff
 #define BIT_SEQNUM_MID_8822B(x) (((x) & BIT_MASK_SEQNUM_MID_8822B) << BIT_SHIFT_SEQNUM_MID_8822B)
-#define BIT_GET_SEQNUM_MID_8822B(x) (((x) >> BIT_SHIFT_SEQNUM_MID_8822B) & BIT_MASK_SEQNUM_MID_8822B)

+#define BIT_GET_SEQNUM_MID_8822B(x) (((x) >> BIT_SHIFT_SEQNUM_MID_8822B) & BIT_MASK_SEQNUM_MID_8822B)
+
 
 
 #define BIT_SHIFT_REF_MID_8822B 0
 #define BIT_MASK_REF_MID_8822B 0x7f
 #define BIT_REF_MID_8822B(x) (((x) & BIT_MASK_REF_MID_8822B) << BIT_SHIFT_REF_MID_8822B)
-#define BIT_GET_REF_MID_8822B(x) (((x) >> BIT_SHIFT_REF_MID_8822B) & BIT_MASK_REF_MID_8822B)

+#define BIT_GET_REF_MID_8822B(x) (((x) >> BIT_SHIFT_REF_MID_8822B) & BIT_MASK_REF_MID_8822B)
+
 
 
 /* 2 REG_TC7_CTRL_V1_8822B */
@@ -3030,7 +3294,8 @@
 #define BIT_SHIFT_TC7DATA_8822B 0
 #define BIT_MASK_TC7DATA_8822B 0xffffff
 #define BIT_TC7DATA_8822B(x) (((x) & BIT_MASK_TC7DATA_8822B) << BIT_SHIFT_TC7DATA_8822B)
-#define BIT_GET_TC7DATA_8822B(x) (((x) >> BIT_SHIFT_TC7DATA_8822B) & BIT_MASK_TC7DATA_8822B)

+#define BIT_GET_TC7DATA_8822B(x) (((x) >> BIT_SHIFT_TC7DATA_8822B) & BIT_MASK_TC7DATA_8822B)
+
 
 
 /* 2 REG_TC8_CTRL_V1_8822B */
@@ -3041,7 +3306,8 @@
 #define BIT_SHIFT_TC8DATA_8822B 0
 #define BIT_MASK_TC8DATA_8822B 0xffffff
 #define BIT_TC8DATA_8822B(x) (((x) & BIT_MASK_TC8DATA_8822B) << BIT_SHIFT_TC8DATA_8822B)
-#define BIT_GET_TC8DATA_8822B(x) (((x) >> BIT_SHIFT_TC8DATA_8822B) & BIT_MASK_TC8DATA_8822B)

+#define BIT_GET_TC8DATA_8822B(x) (((x) >> BIT_SHIFT_TC8DATA_8822B) & BIT_MASK_TC8DATA_8822B)
+
 
 
 /* 2 REG_FT2IMR_8822B */
@@ -3105,7 +3371,8 @@
 #define BIT_SHIFT_FW_MSG2_8822B 0
 #define BIT_MASK_FW_MSG2_8822B 0xffffffffL
 #define BIT_FW_MSG2_8822B(x) (((x) & BIT_MASK_FW_MSG2_8822B) << BIT_SHIFT_FW_MSG2_8822B)
-#define BIT_GET_FW_MSG2_8822B(x) (((x) >> BIT_SHIFT_FW_MSG2_8822B) & BIT_MASK_FW_MSG2_8822B)

+#define BIT_GET_FW_MSG2_8822B(x) (((x) >> BIT_SHIFT_FW_MSG2_8822B) & BIT_MASK_FW_MSG2_8822B)
+
 
 
 /* 2 REG_MSG3_8822B */
@@ -3113,7 +3380,8 @@
 #define BIT_SHIFT_FW_MSG3_8822B 0
 #define BIT_MASK_FW_MSG3_8822B 0xffffffffL
 #define BIT_FW_MSG3_8822B(x) (((x) & BIT_MASK_FW_MSG3_8822B) << BIT_SHIFT_FW_MSG3_8822B)
-#define BIT_GET_FW_MSG3_8822B(x) (((x) >> BIT_SHIFT_FW_MSG3_8822B) & BIT_MASK_FW_MSG3_8822B)

+#define BIT_GET_FW_MSG3_8822B(x) (((x) >> BIT_SHIFT_FW_MSG3_8822B) & BIT_MASK_FW_MSG3_8822B)
+
 
 
 /* 2 REG_MSG4_8822B */
@@ -3121,7 +3389,8 @@
 #define BIT_SHIFT_FW_MSG4_8822B 0
 #define BIT_MASK_FW_MSG4_8822B 0xffffffffL
 #define BIT_FW_MSG4_8822B(x) (((x) & BIT_MASK_FW_MSG4_8822B) << BIT_SHIFT_FW_MSG4_8822B)
-#define BIT_GET_FW_MSG4_8822B(x) (((x) >> BIT_SHIFT_FW_MSG4_8822B) & BIT_MASK_FW_MSG4_8822B)

+#define BIT_GET_FW_MSG4_8822B(x) (((x) >> BIT_SHIFT_FW_MSG4_8822B) & BIT_MASK_FW_MSG4_8822B)
+
 
 
 /* 2 REG_MSG5_8822B */
@@ -3129,7 +3398,8 @@
 #define BIT_SHIFT_FW_MSG5_8822B 0
 #define BIT_MASK_FW_MSG5_8822B 0xffffffffL
 #define BIT_FW_MSG5_8822B(x) (((x) & BIT_MASK_FW_MSG5_8822B) << BIT_SHIFT_FW_MSG5_8822B)
-#define BIT_GET_FW_MSG5_8822B(x) (((x) >> BIT_SHIFT_FW_MSG5_8822B) & BIT_MASK_FW_MSG5_8822B)

+#define BIT_GET_FW_MSG5_8822B(x) (((x) >> BIT_SHIFT_FW_MSG5_8822B) & BIT_MASK_FW_MSG5_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -3139,13 +3409,15 @@
 #define BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8822B 16
 #define BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8822B 0xff
 #define BIT_TX_OQT_HE_FREE_SPACE_V1_8822B(x) (((x) & BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8822B) << BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8822B)
-#define BIT_GET_TX_OQT_HE_FREE_SPACE_V1_8822B(x) (((x) >> BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8822B) & BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8822B)

+#define BIT_GET_TX_OQT_HE_FREE_SPACE_V1_8822B(x) (((x) >> BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8822B) & BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8822B)
+
 
 
 #define BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8822B 0
 #define BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8822B 0xff
 #define BIT_TX_OQT_NL_FREE_SPACE_V1_8822B(x) (((x) & BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8822B) << BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8822B)
-#define BIT_GET_TX_OQT_NL_FREE_SPACE_V1_8822B(x) (((x) >> BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8822B) & BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8822B)

+#define BIT_GET_TX_OQT_NL_FREE_SPACE_V1_8822B(x) (((x) >> BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8822B) & BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8822B)
+
 
 
 /* 2 REG_FIFOPAGE_CTRL_2_8822B */
@@ -3154,14 +3426,16 @@
 #define BIT_SHIFT_BCN_HEAD_1_V1_8822B 16
 #define BIT_MASK_BCN_HEAD_1_V1_8822B 0xfff
 #define BIT_BCN_HEAD_1_V1_8822B(x) (((x) & BIT_MASK_BCN_HEAD_1_V1_8822B) << BIT_SHIFT_BCN_HEAD_1_V1_8822B)
-#define BIT_GET_BCN_HEAD_1_V1_8822B(x) (((x) >> BIT_SHIFT_BCN_HEAD_1_V1_8822B) & BIT_MASK_BCN_HEAD_1_V1_8822B)

+#define BIT_GET_BCN_HEAD_1_V1_8822B(x) (((x) >> BIT_SHIFT_BCN_HEAD_1_V1_8822B) & BIT_MASK_BCN_HEAD_1_V1_8822B)
+
 
 #define BIT_BCN_VALID_V1_8822B BIT(15)
 
 #define BIT_SHIFT_BCN_HEAD_V1_8822B 0
 #define BIT_MASK_BCN_HEAD_V1_8822B 0xfff
 #define BIT_BCN_HEAD_V1_8822B(x) (((x) & BIT_MASK_BCN_HEAD_V1_8822B) << BIT_SHIFT_BCN_HEAD_V1_8822B)
-#define BIT_GET_BCN_HEAD_V1_8822B(x) (((x) >> BIT_SHIFT_BCN_HEAD_V1_8822B) & BIT_MASK_BCN_HEAD_V1_8822B)

+#define BIT_GET_BCN_HEAD_V1_8822B(x) (((x) >> BIT_SHIFT_BCN_HEAD_V1_8822B) & BIT_MASK_BCN_HEAD_V1_8822B)
+
 
 
 /* 2 REG_AUTO_LLT_V1_8822B */
@@ -3169,19 +3443,22 @@
 #define BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B 24
 #define BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B 0xff
 #define BIT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B(x) (((x) & BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B) << BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B)
-#define BIT_GET_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B(x) (((x) >> BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B) & BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B)

+#define BIT_GET_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B(x) (((x) >> BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B) & BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8822B)
+
 
 
 #define BIT_SHIFT_LLT_FREE_PAGE_V1_8822B 8
 #define BIT_MASK_LLT_FREE_PAGE_V1_8822B 0xffff
 #define BIT_LLT_FREE_PAGE_V1_8822B(x) (((x) & BIT_MASK_LLT_FREE_PAGE_V1_8822B) << BIT_SHIFT_LLT_FREE_PAGE_V1_8822B)
-#define BIT_GET_LLT_FREE_PAGE_V1_8822B(x) (((x) >> BIT_SHIFT_LLT_FREE_PAGE_V1_8822B) & BIT_MASK_LLT_FREE_PAGE_V1_8822B)

+#define BIT_GET_LLT_FREE_PAGE_V1_8822B(x) (((x) >> BIT_SHIFT_LLT_FREE_PAGE_V1_8822B) & BIT_MASK_LLT_FREE_PAGE_V1_8822B)
+
 
 
 #define BIT_SHIFT_BLK_DESC_NUM_8822B 4
 #define BIT_MASK_BLK_DESC_NUM_8822B 0xf
 #define BIT_BLK_DESC_NUM_8822B(x) (((x) & BIT_MASK_BLK_DESC_NUM_8822B) << BIT_SHIFT_BLK_DESC_NUM_8822B)
-#define BIT_GET_BLK_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_BLK_DESC_NUM_8822B) & BIT_MASK_BLK_DESC_NUM_8822B)

+#define BIT_GET_BLK_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_BLK_DESC_NUM_8822B) & BIT_MASK_BLK_DESC_NUM_8822B)
+
 
 #define BIT_R_BCN_HEAD_SEL_8822B BIT(3)
 #define BIT_R_EN_BCN_SW_HEAD_SEL_8822B BIT(2)
@@ -3197,7 +3474,8 @@
 #define BIT_SHIFT_PG_UNDER_TH_V1_8822B 16
 #define BIT_MASK_PG_UNDER_TH_V1_8822B 0xfff
 #define BIT_PG_UNDER_TH_V1_8822B(x) (((x) & BIT_MASK_PG_UNDER_TH_V1_8822B) << BIT_SHIFT_PG_UNDER_TH_V1_8822B)
-#define BIT_GET_PG_UNDER_TH_V1_8822B(x) (((x) >> BIT_SHIFT_PG_UNDER_TH_V1_8822B) & BIT_MASK_PG_UNDER_TH_V1_8822B)

+#define BIT_GET_PG_UNDER_TH_V1_8822B(x) (((x) >> BIT_SHIFT_PG_UNDER_TH_V1_8822B) & BIT_MASK_PG_UNDER_TH_V1_8822B)
+
 
 #define BIT_RESTORE_H2C_ADDRESS_8822B BIT(15)
 #define BIT_SDIO_TXDESC_CHKSUM_EN_8822B BIT(13)
@@ -3210,7 +3488,8 @@
 #define BIT_SHIFT_CHECK_OFFSET_8822B 0
 #define BIT_MASK_CHECK_OFFSET_8822B 0xff
 #define BIT_CHECK_OFFSET_8822B(x) (((x) & BIT_MASK_CHECK_OFFSET_8822B) << BIT_SHIFT_CHECK_OFFSET_8822B)
-#define BIT_GET_CHECK_OFFSET_8822B(x) (((x) >> BIT_SHIFT_CHECK_OFFSET_8822B) & BIT_MASK_CHECK_OFFSET_8822B)

+#define BIT_GET_CHECK_OFFSET_8822B(x) (((x) >> BIT_SHIFT_CHECK_OFFSET_8822B) & BIT_MASK_CHECK_OFFSET_8822B)
+
 
 
 /* 2 REG_TXDMA_STATUS_8822B */
@@ -3240,13 +3519,15 @@
 #define BIT_SHIFT_HPQ_HIGH_TH_V1_8822B 16
 #define BIT_MASK_HPQ_HIGH_TH_V1_8822B 0xfff
 #define BIT_HPQ_HIGH_TH_V1_8822B(x) (((x) & BIT_MASK_HPQ_HIGH_TH_V1_8822B) << BIT_SHIFT_HPQ_HIGH_TH_V1_8822B)
-#define BIT_GET_HPQ_HIGH_TH_V1_8822B(x) (((x) >> BIT_SHIFT_HPQ_HIGH_TH_V1_8822B) & BIT_MASK_HPQ_HIGH_TH_V1_8822B)

+#define BIT_GET_HPQ_HIGH_TH_V1_8822B(x) (((x) >> BIT_SHIFT_HPQ_HIGH_TH_V1_8822B) & BIT_MASK_HPQ_HIGH_TH_V1_8822B)
+
 
 
 #define BIT_SHIFT_HPQ_LOW_TH_V1_8822B 0
 #define BIT_MASK_HPQ_LOW_TH_V1_8822B 0xfff
 #define BIT_HPQ_LOW_TH_V1_8822B(x) (((x) & BIT_MASK_HPQ_LOW_TH_V1_8822B) << BIT_SHIFT_HPQ_LOW_TH_V1_8822B)
-#define BIT_GET_HPQ_LOW_TH_V1_8822B(x) (((x) >> BIT_SHIFT_HPQ_LOW_TH_V1_8822B) & BIT_MASK_HPQ_LOW_TH_V1_8822B)

+#define BIT_GET_HPQ_LOW_TH_V1_8822B(x) (((x) >> BIT_SHIFT_HPQ_LOW_TH_V1_8822B) & BIT_MASK_HPQ_LOW_TH_V1_8822B)
+
 
 
 /* 2 REG_TQPNT2_8822B */
@@ -3254,13 +3535,15 @@
 #define BIT_SHIFT_NPQ_HIGH_TH_V1_8822B 16
 #define BIT_MASK_NPQ_HIGH_TH_V1_8822B 0xfff
 #define BIT_NPQ_HIGH_TH_V1_8822B(x) (((x) & BIT_MASK_NPQ_HIGH_TH_V1_8822B) << BIT_SHIFT_NPQ_HIGH_TH_V1_8822B)
-#define BIT_GET_NPQ_HIGH_TH_V1_8822B(x) (((x) >> BIT_SHIFT_NPQ_HIGH_TH_V1_8822B) & BIT_MASK_NPQ_HIGH_TH_V1_8822B)

+#define BIT_GET_NPQ_HIGH_TH_V1_8822B(x) (((x) >> BIT_SHIFT_NPQ_HIGH_TH_V1_8822B) & BIT_MASK_NPQ_HIGH_TH_V1_8822B)
+
 
 
 #define BIT_SHIFT_NPQ_LOW_TH_V1_8822B 0
 #define BIT_MASK_NPQ_LOW_TH_V1_8822B 0xfff
 #define BIT_NPQ_LOW_TH_V1_8822B(x) (((x) & BIT_MASK_NPQ_LOW_TH_V1_8822B) << BIT_SHIFT_NPQ_LOW_TH_V1_8822B)
-#define BIT_GET_NPQ_LOW_TH_V1_8822B(x) (((x) >> BIT_SHIFT_NPQ_LOW_TH_V1_8822B) & BIT_MASK_NPQ_LOW_TH_V1_8822B)

+#define BIT_GET_NPQ_LOW_TH_V1_8822B(x) (((x) >> BIT_SHIFT_NPQ_LOW_TH_V1_8822B) & BIT_MASK_NPQ_LOW_TH_V1_8822B)
+
 
 
 /* 2 REG_TQPNT3_8822B */
@@ -3268,13 +3551,15 @@
 #define BIT_SHIFT_LPQ_HIGH_TH_V1_8822B 16
 #define BIT_MASK_LPQ_HIGH_TH_V1_8822B 0xfff
 #define BIT_LPQ_HIGH_TH_V1_8822B(x) (((x) & BIT_MASK_LPQ_HIGH_TH_V1_8822B) << BIT_SHIFT_LPQ_HIGH_TH_V1_8822B)
-#define BIT_GET_LPQ_HIGH_TH_V1_8822B(x) (((x) >> BIT_SHIFT_LPQ_HIGH_TH_V1_8822B) & BIT_MASK_LPQ_HIGH_TH_V1_8822B)

+#define BIT_GET_LPQ_HIGH_TH_V1_8822B(x) (((x) >> BIT_SHIFT_LPQ_HIGH_TH_V1_8822B) & BIT_MASK_LPQ_HIGH_TH_V1_8822B)
+
 
 
 #define BIT_SHIFT_LPQ_LOW_TH_V1_8822B 0
 #define BIT_MASK_LPQ_LOW_TH_V1_8822B 0xfff
 #define BIT_LPQ_LOW_TH_V1_8822B(x) (((x) & BIT_MASK_LPQ_LOW_TH_V1_8822B) << BIT_SHIFT_LPQ_LOW_TH_V1_8822B)
-#define BIT_GET_LPQ_LOW_TH_V1_8822B(x) (((x) >> BIT_SHIFT_LPQ_LOW_TH_V1_8822B) & BIT_MASK_LPQ_LOW_TH_V1_8822B)

+#define BIT_GET_LPQ_LOW_TH_V1_8822B(x) (((x) >> BIT_SHIFT_LPQ_LOW_TH_V1_8822B) & BIT_MASK_LPQ_LOW_TH_V1_8822B)
+
 
 
 /* 2 REG_TQPNT4_8822B */
@@ -3282,13 +3567,15 @@
 #define BIT_SHIFT_EXQ_HIGH_TH_V1_8822B 16
 #define BIT_MASK_EXQ_HIGH_TH_V1_8822B 0xfff
 #define BIT_EXQ_HIGH_TH_V1_8822B(x) (((x) & BIT_MASK_EXQ_HIGH_TH_V1_8822B) << BIT_SHIFT_EXQ_HIGH_TH_V1_8822B)
-#define BIT_GET_EXQ_HIGH_TH_V1_8822B(x) (((x) >> BIT_SHIFT_EXQ_HIGH_TH_V1_8822B) & BIT_MASK_EXQ_HIGH_TH_V1_8822B)

+#define BIT_GET_EXQ_HIGH_TH_V1_8822B(x) (((x) >> BIT_SHIFT_EXQ_HIGH_TH_V1_8822B) & BIT_MASK_EXQ_HIGH_TH_V1_8822B)
+
 
 
 #define BIT_SHIFT_EXQ_LOW_TH_V1_8822B 0
 #define BIT_MASK_EXQ_LOW_TH_V1_8822B 0xfff
 #define BIT_EXQ_LOW_TH_V1_8822B(x) (((x) & BIT_MASK_EXQ_LOW_TH_V1_8822B) << BIT_SHIFT_EXQ_LOW_TH_V1_8822B)
-#define BIT_GET_EXQ_LOW_TH_V1_8822B(x) (((x) >> BIT_SHIFT_EXQ_LOW_TH_V1_8822B) & BIT_MASK_EXQ_LOW_TH_V1_8822B)

+#define BIT_GET_EXQ_LOW_TH_V1_8822B(x) (((x) >> BIT_SHIFT_EXQ_LOW_TH_V1_8822B) & BIT_MASK_EXQ_LOW_TH_V1_8822B)
+
 
 
 /* 2 REG_RQPN_CTRL_1_8822B */
@@ -3296,13 +3583,15 @@
 #define BIT_SHIFT_TXPKTNUM_H_8822B 16
 #define BIT_MASK_TXPKTNUM_H_8822B 0xffff
 #define BIT_TXPKTNUM_H_8822B(x) (((x) & BIT_MASK_TXPKTNUM_H_8822B) << BIT_SHIFT_TXPKTNUM_H_8822B)
-#define BIT_GET_TXPKTNUM_H_8822B(x) (((x) >> BIT_SHIFT_TXPKTNUM_H_8822B) & BIT_MASK_TXPKTNUM_H_8822B)

+#define BIT_GET_TXPKTNUM_H_8822B(x) (((x) >> BIT_SHIFT_TXPKTNUM_H_8822B) & BIT_MASK_TXPKTNUM_H_8822B)
+
 
 
 #define BIT_SHIFT_TXPKTNUM_V2_8822B 0
 #define BIT_MASK_TXPKTNUM_V2_8822B 0xffff
 #define BIT_TXPKTNUM_V2_8822B(x) (((x) & BIT_MASK_TXPKTNUM_V2_8822B) << BIT_SHIFT_TXPKTNUM_V2_8822B)
-#define BIT_GET_TXPKTNUM_V2_8822B(x) (((x) >> BIT_SHIFT_TXPKTNUM_V2_8822B) & BIT_MASK_TXPKTNUM_V2_8822B)

+#define BIT_GET_TXPKTNUM_V2_8822B(x) (((x) >> BIT_SHIFT_TXPKTNUM_V2_8822B) & BIT_MASK_TXPKTNUM_V2_8822B)
+
 
 
 /* 2 REG_RQPN_CTRL_2_8822B */
@@ -3317,13 +3606,15 @@
 #define BIT_SHIFT_HPQ_AVAL_PG_V1_8822B 16
 #define BIT_MASK_HPQ_AVAL_PG_V1_8822B 0xfff
 #define BIT_HPQ_AVAL_PG_V1_8822B(x) (((x) & BIT_MASK_HPQ_AVAL_PG_V1_8822B) << BIT_SHIFT_HPQ_AVAL_PG_V1_8822B)
-#define BIT_GET_HPQ_AVAL_PG_V1_8822B(x) (((x) >> BIT_SHIFT_HPQ_AVAL_PG_V1_8822B) & BIT_MASK_HPQ_AVAL_PG_V1_8822B)

+#define BIT_GET_HPQ_AVAL_PG_V1_8822B(x) (((x) >> BIT_SHIFT_HPQ_AVAL_PG_V1_8822B) & BIT_MASK_HPQ_AVAL_PG_V1_8822B)
+
 
 
 #define BIT_SHIFT_HPQ_V1_8822B 0
 #define BIT_MASK_HPQ_V1_8822B 0xfff
 #define BIT_HPQ_V1_8822B(x) (((x) & BIT_MASK_HPQ_V1_8822B) << BIT_SHIFT_HPQ_V1_8822B)
-#define BIT_GET_HPQ_V1_8822B(x) (((x) >> BIT_SHIFT_HPQ_V1_8822B) & BIT_MASK_HPQ_V1_8822B)

+#define BIT_GET_HPQ_V1_8822B(x) (((x) >> BIT_SHIFT_HPQ_V1_8822B) & BIT_MASK_HPQ_V1_8822B)
+
 
 
 /* 2 REG_FIFOPAGE_INFO_2_8822B */
@@ -3331,13 +3622,15 @@
 #define BIT_SHIFT_LPQ_AVAL_PG_V1_8822B 16
 #define BIT_MASK_LPQ_AVAL_PG_V1_8822B 0xfff
 #define BIT_LPQ_AVAL_PG_V1_8822B(x) (((x) & BIT_MASK_LPQ_AVAL_PG_V1_8822B) << BIT_SHIFT_LPQ_AVAL_PG_V1_8822B)
-#define BIT_GET_LPQ_AVAL_PG_V1_8822B(x) (((x) >> BIT_SHIFT_LPQ_AVAL_PG_V1_8822B) & BIT_MASK_LPQ_AVAL_PG_V1_8822B)

+#define BIT_GET_LPQ_AVAL_PG_V1_8822B(x) (((x) >> BIT_SHIFT_LPQ_AVAL_PG_V1_8822B) & BIT_MASK_LPQ_AVAL_PG_V1_8822B)
+
 
 
 #define BIT_SHIFT_LPQ_V1_8822B 0
 #define BIT_MASK_LPQ_V1_8822B 0xfff
 #define BIT_LPQ_V1_8822B(x) (((x) & BIT_MASK_LPQ_V1_8822B) << BIT_SHIFT_LPQ_V1_8822B)
-#define BIT_GET_LPQ_V1_8822B(x) (((x) >> BIT_SHIFT_LPQ_V1_8822B) & BIT_MASK_LPQ_V1_8822B)

+#define BIT_GET_LPQ_V1_8822B(x) (((x) >> BIT_SHIFT_LPQ_V1_8822B) & BIT_MASK_LPQ_V1_8822B)
+
 
 
 /* 2 REG_FIFOPAGE_INFO_3_8822B */
@@ -3345,13 +3638,15 @@
 #define BIT_SHIFT_NPQ_AVAL_PG_V1_8822B 16
 #define BIT_MASK_NPQ_AVAL_PG_V1_8822B 0xfff
 #define BIT_NPQ_AVAL_PG_V1_8822B(x) (((x) & BIT_MASK_NPQ_AVAL_PG_V1_8822B) << BIT_SHIFT_NPQ_AVAL_PG_V1_8822B)
-#define BIT_GET_NPQ_AVAL_PG_V1_8822B(x) (((x) >> BIT_SHIFT_NPQ_AVAL_PG_V1_8822B) & BIT_MASK_NPQ_AVAL_PG_V1_8822B)

+#define BIT_GET_NPQ_AVAL_PG_V1_8822B(x) (((x) >> BIT_SHIFT_NPQ_AVAL_PG_V1_8822B) & BIT_MASK_NPQ_AVAL_PG_V1_8822B)
+
 
 
 #define BIT_SHIFT_NPQ_V1_8822B 0
 #define BIT_MASK_NPQ_V1_8822B 0xfff
 #define BIT_NPQ_V1_8822B(x) (((x) & BIT_MASK_NPQ_V1_8822B) << BIT_SHIFT_NPQ_V1_8822B)
-#define BIT_GET_NPQ_V1_8822B(x) (((x) >> BIT_SHIFT_NPQ_V1_8822B) & BIT_MASK_NPQ_V1_8822B)

+#define BIT_GET_NPQ_V1_8822B(x) (((x) >> BIT_SHIFT_NPQ_V1_8822B) & BIT_MASK_NPQ_V1_8822B)
+
 
 
 /* 2 REG_FIFOPAGE_INFO_4_8822B */
@@ -3359,13 +3654,15 @@
 #define BIT_SHIFT_EXQ_AVAL_PG_V1_8822B 16
 #define BIT_MASK_EXQ_AVAL_PG_V1_8822B 0xfff
 #define BIT_EXQ_AVAL_PG_V1_8822B(x) (((x) & BIT_MASK_EXQ_AVAL_PG_V1_8822B) << BIT_SHIFT_EXQ_AVAL_PG_V1_8822B)
-#define BIT_GET_EXQ_AVAL_PG_V1_8822B(x) (((x) >> BIT_SHIFT_EXQ_AVAL_PG_V1_8822B) & BIT_MASK_EXQ_AVAL_PG_V1_8822B)

+#define BIT_GET_EXQ_AVAL_PG_V1_8822B(x) (((x) >> BIT_SHIFT_EXQ_AVAL_PG_V1_8822B) & BIT_MASK_EXQ_AVAL_PG_V1_8822B)
+
 
 
 #define BIT_SHIFT_EXQ_V1_8822B 0
 #define BIT_MASK_EXQ_V1_8822B 0xfff
 #define BIT_EXQ_V1_8822B(x) (((x) & BIT_MASK_EXQ_V1_8822B) << BIT_SHIFT_EXQ_V1_8822B)
-#define BIT_GET_EXQ_V1_8822B(x) (((x) >> BIT_SHIFT_EXQ_V1_8822B) & BIT_MASK_EXQ_V1_8822B)

+#define BIT_GET_EXQ_V1_8822B(x) (((x) >> BIT_SHIFT_EXQ_V1_8822B) & BIT_MASK_EXQ_V1_8822B)
+
 
 
 /* 2 REG_FIFOPAGE_INFO_5_8822B */
@@ -3373,13 +3670,15 @@
 #define BIT_SHIFT_PUBQ_AVAL_PG_V1_8822B 16
 #define BIT_MASK_PUBQ_AVAL_PG_V1_8822B 0xfff
 #define BIT_PUBQ_AVAL_PG_V1_8822B(x) (((x) & BIT_MASK_PUBQ_AVAL_PG_V1_8822B) << BIT_SHIFT_PUBQ_AVAL_PG_V1_8822B)
-#define BIT_GET_PUBQ_AVAL_PG_V1_8822B(x) (((x) >> BIT_SHIFT_PUBQ_AVAL_PG_V1_8822B) & BIT_MASK_PUBQ_AVAL_PG_V1_8822B)

+#define BIT_GET_PUBQ_AVAL_PG_V1_8822B(x) (((x) >> BIT_SHIFT_PUBQ_AVAL_PG_V1_8822B) & BIT_MASK_PUBQ_AVAL_PG_V1_8822B)
+
 
 
 #define BIT_SHIFT_PUBQ_V1_8822B 0
 #define BIT_MASK_PUBQ_V1_8822B 0xfff
 #define BIT_PUBQ_V1_8822B(x) (((x) & BIT_MASK_PUBQ_V1_8822B) << BIT_SHIFT_PUBQ_V1_8822B)
-#define BIT_GET_PUBQ_V1_8822B(x) (((x) >> BIT_SHIFT_PUBQ_V1_8822B) & BIT_MASK_PUBQ_V1_8822B)

+#define BIT_GET_PUBQ_V1_8822B(x) (((x) >> BIT_SHIFT_PUBQ_V1_8822B) & BIT_MASK_PUBQ_V1_8822B)
+
 
 
 /* 2 REG_H2C_HEAD_8822B */
@@ -3387,7 +3686,8 @@
 #define BIT_SHIFT_H2C_HEAD_8822B 0
 #define BIT_MASK_H2C_HEAD_8822B 0x3ffff
 #define BIT_H2C_HEAD_8822B(x) (((x) & BIT_MASK_H2C_HEAD_8822B) << BIT_SHIFT_H2C_HEAD_8822B)
-#define BIT_GET_H2C_HEAD_8822B(x) (((x) >> BIT_SHIFT_H2C_HEAD_8822B) & BIT_MASK_H2C_HEAD_8822B)

+#define BIT_GET_H2C_HEAD_8822B(x) (((x) >> BIT_SHIFT_H2C_HEAD_8822B) & BIT_MASK_H2C_HEAD_8822B)
+
 
 
 /* 2 REG_H2C_TAIL_8822B */
@@ -3395,7 +3695,8 @@
 #define BIT_SHIFT_H2C_TAIL_8822B 0
 #define BIT_MASK_H2C_TAIL_8822B 0x3ffff
 #define BIT_H2C_TAIL_8822B(x) (((x) & BIT_MASK_H2C_TAIL_8822B) << BIT_SHIFT_H2C_TAIL_8822B)
-#define BIT_GET_H2C_TAIL_8822B(x) (((x) >> BIT_SHIFT_H2C_TAIL_8822B) & BIT_MASK_H2C_TAIL_8822B)

+#define BIT_GET_H2C_TAIL_8822B(x) (((x) >> BIT_SHIFT_H2C_TAIL_8822B) & BIT_MASK_H2C_TAIL_8822B)
+
 
 
 /* 2 REG_H2C_READ_ADDR_8822B */
@@ -3403,7 +3704,8 @@
 #define BIT_SHIFT_H2C_READ_ADDR_8822B 0
 #define BIT_MASK_H2C_READ_ADDR_8822B 0x3ffff
 #define BIT_H2C_READ_ADDR_8822B(x) (((x) & BIT_MASK_H2C_READ_ADDR_8822B) << BIT_SHIFT_H2C_READ_ADDR_8822B)
-#define BIT_GET_H2C_READ_ADDR_8822B(x) (((x) >> BIT_SHIFT_H2C_READ_ADDR_8822B) & BIT_MASK_H2C_READ_ADDR_8822B)

+#define BIT_GET_H2C_READ_ADDR_8822B(x) (((x) >> BIT_SHIFT_H2C_READ_ADDR_8822B) & BIT_MASK_H2C_READ_ADDR_8822B)
+
 
 
 /* 2 REG_H2C_WR_ADDR_8822B */
@@ -3411,7 +3713,8 @@
 #define BIT_SHIFT_H2C_WR_ADDR_8822B 0
 #define BIT_MASK_H2C_WR_ADDR_8822B 0x3ffff
 #define BIT_H2C_WR_ADDR_8822B(x) (((x) & BIT_MASK_H2C_WR_ADDR_8822B) << BIT_SHIFT_H2C_WR_ADDR_8822B)
-#define BIT_GET_H2C_WR_ADDR_8822B(x) (((x) >> BIT_SHIFT_H2C_WR_ADDR_8822B) & BIT_MASK_H2C_WR_ADDR_8822B)

+#define BIT_GET_H2C_WR_ADDR_8822B(x) (((x) >> BIT_SHIFT_H2C_WR_ADDR_8822B) & BIT_MASK_H2C_WR_ADDR_8822B)
+
 
 
 /* 2 REG_H2C_INFO_8822B */
@@ -3421,7 +3724,8 @@
 #define BIT_SHIFT_H2C_LEN_SEL_8822B 0
 #define BIT_MASK_H2C_LEN_SEL_8822B 0x3
 #define BIT_H2C_LEN_SEL_8822B(x) (((x) & BIT_MASK_H2C_LEN_SEL_8822B) << BIT_SHIFT_H2C_LEN_SEL_8822B)
-#define BIT_GET_H2C_LEN_SEL_8822B(x) (((x) >> BIT_SHIFT_H2C_LEN_SEL_8822B) & BIT_MASK_H2C_LEN_SEL_8822B)

+#define BIT_GET_H2C_LEN_SEL_8822B(x) (((x) >> BIT_SHIFT_H2C_LEN_SEL_8822B) & BIT_MASK_H2C_LEN_SEL_8822B)
+
 
 
 /* 2 REG_RXDMA_AGG_PG_TH_8822B */
@@ -3429,25 +3733,29 @@
 #define BIT_SHIFT_RXDMA_AGG_OLD_MOD_8822B 24
 #define BIT_MASK_RXDMA_AGG_OLD_MOD_8822B 0xff
 #define BIT_RXDMA_AGG_OLD_MOD_8822B(x) (((x) & BIT_MASK_RXDMA_AGG_OLD_MOD_8822B) << BIT_SHIFT_RXDMA_AGG_OLD_MOD_8822B)
-#define BIT_GET_RXDMA_AGG_OLD_MOD_8822B(x) (((x) >> BIT_SHIFT_RXDMA_AGG_OLD_MOD_8822B) & BIT_MASK_RXDMA_AGG_OLD_MOD_8822B)

+#define BIT_GET_RXDMA_AGG_OLD_MOD_8822B(x) (((x) >> BIT_SHIFT_RXDMA_AGG_OLD_MOD_8822B) & BIT_MASK_RXDMA_AGG_OLD_MOD_8822B)
+
 
 
 #define BIT_SHIFT_PKT_NUM_WOL_8822B 16
 #define BIT_MASK_PKT_NUM_WOL_8822B 0xff
 #define BIT_PKT_NUM_WOL_8822B(x) (((x) & BIT_MASK_PKT_NUM_WOL_8822B) << BIT_SHIFT_PKT_NUM_WOL_8822B)
-#define BIT_GET_PKT_NUM_WOL_8822B(x) (((x) >> BIT_SHIFT_PKT_NUM_WOL_8822B) & BIT_MASK_PKT_NUM_WOL_8822B)

+#define BIT_GET_PKT_NUM_WOL_8822B(x) (((x) >> BIT_SHIFT_PKT_NUM_WOL_8822B) & BIT_MASK_PKT_NUM_WOL_8822B)
+
 
 
 #define BIT_SHIFT_DMA_AGG_TO_8822B 8
 #define BIT_MASK_DMA_AGG_TO_8822B 0xf
 #define BIT_DMA_AGG_TO_8822B(x) (((x) & BIT_MASK_DMA_AGG_TO_8822B) << BIT_SHIFT_DMA_AGG_TO_8822B)
-#define BIT_GET_DMA_AGG_TO_8822B(x) (((x) >> BIT_SHIFT_DMA_AGG_TO_8822B) & BIT_MASK_DMA_AGG_TO_8822B)

+#define BIT_GET_DMA_AGG_TO_8822B(x) (((x) >> BIT_SHIFT_DMA_AGG_TO_8822B) & BIT_MASK_DMA_AGG_TO_8822B)
+
 
 
 #define BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8822B 0
 #define BIT_MASK_RXDMA_AGG_PG_TH_V1_8822B 0xf
 #define BIT_RXDMA_AGG_PG_TH_V1_8822B(x) (((x) & BIT_MASK_RXDMA_AGG_PG_TH_V1_8822B) << BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8822B)
-#define BIT_GET_RXDMA_AGG_PG_TH_V1_8822B(x) (((x) >> BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8822B) & BIT_MASK_RXDMA_AGG_PG_TH_V1_8822B)

+#define BIT_GET_RXDMA_AGG_PG_TH_V1_8822B(x) (((x) >> BIT_SHIFT_RXDMA_AGG_PG_TH_V1_8822B) & BIT_MASK_RXDMA_AGG_PG_TH_V1_8822B)
+
 
 
 /* 2 REG_RXPKT_NUM_8822B */
@@ -3455,13 +3763,15 @@
 #define BIT_SHIFT_RXPKT_NUM_8822B 24
 #define BIT_MASK_RXPKT_NUM_8822B 0xff
 #define BIT_RXPKT_NUM_8822B(x) (((x) & BIT_MASK_RXPKT_NUM_8822B) << BIT_SHIFT_RXPKT_NUM_8822B)
-#define BIT_GET_RXPKT_NUM_8822B(x) (((x) >> BIT_SHIFT_RXPKT_NUM_8822B) & BIT_MASK_RXPKT_NUM_8822B)

+#define BIT_GET_RXPKT_NUM_8822B(x) (((x) >> BIT_SHIFT_RXPKT_NUM_8822B) & BIT_MASK_RXPKT_NUM_8822B)
+
 
 
 #define BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8822B 20
 #define BIT_MASK_FW_UPD_RDPTR19_TO_16_8822B 0xf
 #define BIT_FW_UPD_RDPTR19_TO_16_8822B(x) (((x) & BIT_MASK_FW_UPD_RDPTR19_TO_16_8822B) << BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8822B)
-#define BIT_GET_FW_UPD_RDPTR19_TO_16_8822B(x) (((x) >> BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8822B) & BIT_MASK_FW_UPD_RDPTR19_TO_16_8822B)

+#define BIT_GET_FW_UPD_RDPTR19_TO_16_8822B(x) (((x) >> BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8822B) & BIT_MASK_FW_UPD_RDPTR19_TO_16_8822B)
+
 
 #define BIT_RXDMA_REQ_8822B BIT(19)
 #define BIT_RW_RELEASE_EN_8822B BIT(18)
@@ -3471,7 +3781,8 @@
 #define BIT_SHIFT_FW_UPD_RDPTR_8822B 0
 #define BIT_MASK_FW_UPD_RDPTR_8822B 0xffff
 #define BIT_FW_UPD_RDPTR_8822B(x) (((x) & BIT_MASK_FW_UPD_RDPTR_8822B) << BIT_SHIFT_FW_UPD_RDPTR_8822B)
-#define BIT_GET_FW_UPD_RDPTR_8822B(x) (((x) >> BIT_SHIFT_FW_UPD_RDPTR_8822B) & BIT_MASK_FW_UPD_RDPTR_8822B)

+#define BIT_GET_FW_UPD_RDPTR_8822B(x) (((x) >> BIT_SHIFT_FW_UPD_RDPTR_8822B) & BIT_MASK_FW_UPD_RDPTR_8822B)
+
 
 
 /* 2 REG_RXDMA_STATUS_8822B */
@@ -3488,7 +3799,8 @@
 #define BIT_SHIFT_RDE_DEBUG_8822B 0
 #define BIT_MASK_RDE_DEBUG_8822B 0xffffffffL
 #define BIT_RDE_DEBUG_8822B(x) (((x) & BIT_MASK_RDE_DEBUG_8822B) << BIT_SHIFT_RDE_DEBUG_8822B)
-#define BIT_GET_RDE_DEBUG_8822B(x) (((x) >> BIT_SHIFT_RDE_DEBUG_8822B) & BIT_MASK_RDE_DEBUG_8822B)

+#define BIT_GET_RDE_DEBUG_8822B(x) (((x) >> BIT_SHIFT_RDE_DEBUG_8822B) & BIT_MASK_RDE_DEBUG_8822B)
+
 
 
 /* 2 REG_RXDMA_MODE_8822B */
@@ -3496,14 +3808,16 @@
 #define BIT_SHIFT_PKTNUM_TH_V2_8822B 24
 #define BIT_MASK_PKTNUM_TH_V2_8822B 0x1f
 #define BIT_PKTNUM_TH_V2_8822B(x) (((x) & BIT_MASK_PKTNUM_TH_V2_8822B) << BIT_SHIFT_PKTNUM_TH_V2_8822B)
-#define BIT_GET_PKTNUM_TH_V2_8822B(x) (((x) >> BIT_SHIFT_PKTNUM_TH_V2_8822B) & BIT_MASK_PKTNUM_TH_V2_8822B)

+#define BIT_GET_PKTNUM_TH_V2_8822B(x) (((x) >> BIT_SHIFT_PKTNUM_TH_V2_8822B) & BIT_MASK_PKTNUM_TH_V2_8822B)
+
 
 #define BIT_TXBA_BREAK_USBAGG_8822B BIT(23)
 
 #define BIT_SHIFT_PKTLEN_PARA_8822B 16
 #define BIT_MASK_PKTLEN_PARA_8822B 0x7
 #define BIT_PKTLEN_PARA_8822B(x) (((x) & BIT_MASK_PKTLEN_PARA_8822B) << BIT_SHIFT_PKTLEN_PARA_8822B)
-#define BIT_GET_PKTLEN_PARA_8822B(x) (((x) >> BIT_SHIFT_PKTLEN_PARA_8822B) & BIT_MASK_PKTLEN_PARA_8822B)

+#define BIT_GET_PKTLEN_PARA_8822B(x) (((x) >> BIT_SHIFT_PKTLEN_PARA_8822B) & BIT_MASK_PKTLEN_PARA_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -3515,13 +3829,15 @@
 #define BIT_SHIFT_BURST_SIZE_8822B 4
 #define BIT_MASK_BURST_SIZE_8822B 0x3
 #define BIT_BURST_SIZE_8822B(x) (((x) & BIT_MASK_BURST_SIZE_8822B) << BIT_SHIFT_BURST_SIZE_8822B)
-#define BIT_GET_BURST_SIZE_8822B(x) (((x) >> BIT_SHIFT_BURST_SIZE_8822B) & BIT_MASK_BURST_SIZE_8822B)

+#define BIT_GET_BURST_SIZE_8822B(x) (((x) >> BIT_SHIFT_BURST_SIZE_8822B) & BIT_MASK_BURST_SIZE_8822B)
+
 
 
 #define BIT_SHIFT_BURST_CNT_8822B 2
 #define BIT_MASK_BURST_CNT_8822B 0x3
 #define BIT_BURST_CNT_8822B(x) (((x) & BIT_MASK_BURST_CNT_8822B) << BIT_SHIFT_BURST_CNT_8822B)
-#define BIT_GET_BURST_CNT_8822B(x) (((x) >> BIT_SHIFT_BURST_CNT_8822B) & BIT_MASK_BURST_CNT_8822B)

+#define BIT_GET_BURST_CNT_8822B(x) (((x) >> BIT_SHIFT_BURST_CNT_8822B) & BIT_MASK_BURST_CNT_8822B)
+
 
 #define BIT_DMA_MODE_8822B BIT(1)
 
@@ -3530,14 +3846,16 @@
 #define BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8822B 24
 #define BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8822B 0xf
 #define BIT_R_C2H_STR_ADDR_16_TO_19_8822B(x) (((x) & BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8822B) << BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8822B)
-#define BIT_GET_R_C2H_STR_ADDR_16_TO_19_8822B(x) (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8822B) & BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8822B)

+#define BIT_GET_R_C2H_STR_ADDR_16_TO_19_8822B(x) (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8822B) & BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8822B)
+
 
 #define BIT_R_C2H_PKT_REQ_8822B BIT(16)
 
 #define BIT_SHIFT_R_C2H_STR_ADDR_8822B 0
 #define BIT_MASK_R_C2H_STR_ADDR_8822B 0xffff
 #define BIT_R_C2H_STR_ADDR_8822B(x) (((x) & BIT_MASK_R_C2H_STR_ADDR_8822B) << BIT_SHIFT_R_C2H_STR_ADDR_8822B)
-#define BIT_GET_R_C2H_STR_ADDR_8822B(x) (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_8822B) & BIT_MASK_R_C2H_STR_ADDR_8822B)

+#define BIT_GET_R_C2H_STR_ADDR_8822B(x) (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_8822B) & BIT_MASK_R_C2H_STR_ADDR_8822B)
+
 
 
 /* 2 REG_FWFF_C2H_8822B */
@@ -3545,7 +3863,8 @@
 #define BIT_SHIFT_C2H_DMA_ADDR_8822B 0
 #define BIT_MASK_C2H_DMA_ADDR_8822B 0x3ffff
 #define BIT_C2H_DMA_ADDR_8822B(x) (((x) & BIT_MASK_C2H_DMA_ADDR_8822B) << BIT_SHIFT_C2H_DMA_ADDR_8822B)
-#define BIT_GET_C2H_DMA_ADDR_8822B(x) (((x) >> BIT_SHIFT_C2H_DMA_ADDR_8822B) & BIT_MASK_C2H_DMA_ADDR_8822B)

+#define BIT_GET_C2H_DMA_ADDR_8822B(x) (((x) >> BIT_SHIFT_C2H_DMA_ADDR_8822B) & BIT_MASK_C2H_DMA_ADDR_8822B)
+
 
 
 /* 2 REG_FWFF_CTRL_8822B */
@@ -3554,13 +3873,15 @@
 #define BIT_SHIFT_FWFF_DMA_PKT_NUM_8822B 16
 #define BIT_MASK_FWFF_DMA_PKT_NUM_8822B 0xff
 #define BIT_FWFF_DMA_PKT_NUM_8822B(x) (((x) & BIT_MASK_FWFF_DMA_PKT_NUM_8822B) << BIT_SHIFT_FWFF_DMA_PKT_NUM_8822B)
-#define BIT_GET_FWFF_DMA_PKT_NUM_8822B(x) (((x) >> BIT_SHIFT_FWFF_DMA_PKT_NUM_8822B) & BIT_MASK_FWFF_DMA_PKT_NUM_8822B)

+#define BIT_GET_FWFF_DMA_PKT_NUM_8822B(x) (((x) >> BIT_SHIFT_FWFF_DMA_PKT_NUM_8822B) & BIT_MASK_FWFF_DMA_PKT_NUM_8822B)
+
 
 
 #define BIT_SHIFT_FWFF_STR_ADDR_8822B 0
 #define BIT_MASK_FWFF_STR_ADDR_8822B 0xffff
 #define BIT_FWFF_STR_ADDR_8822B(x) (((x) & BIT_MASK_FWFF_STR_ADDR_8822B) << BIT_SHIFT_FWFF_STR_ADDR_8822B)
-#define BIT_GET_FWFF_STR_ADDR_8822B(x) (((x) >> BIT_SHIFT_FWFF_STR_ADDR_8822B) & BIT_MASK_FWFF_STR_ADDR_8822B)

+#define BIT_GET_FWFF_STR_ADDR_8822B(x) (((x) >> BIT_SHIFT_FWFF_STR_ADDR_8822B) & BIT_MASK_FWFF_STR_ADDR_8822B)
+
 
 
 /* 2 REG_FWFF_PKT_INFO_8822B */
@@ -3568,13 +3889,15 @@
 #define BIT_SHIFT_FWFF_PKT_QUEUED_8822B 16
 #define BIT_MASK_FWFF_PKT_QUEUED_8822B 0xff
 #define BIT_FWFF_PKT_QUEUED_8822B(x) (((x) & BIT_MASK_FWFF_PKT_QUEUED_8822B) << BIT_SHIFT_FWFF_PKT_QUEUED_8822B)
-#define BIT_GET_FWFF_PKT_QUEUED_8822B(x) (((x) >> BIT_SHIFT_FWFF_PKT_QUEUED_8822B) & BIT_MASK_FWFF_PKT_QUEUED_8822B)

+#define BIT_GET_FWFF_PKT_QUEUED_8822B(x) (((x) >> BIT_SHIFT_FWFF_PKT_QUEUED_8822B) & BIT_MASK_FWFF_PKT_QUEUED_8822B)
+
 
 
 #define BIT_SHIFT_FWFF_PKT_STR_ADDR_8822B 0
 #define BIT_MASK_FWFF_PKT_STR_ADDR_8822B 0xffff
 #define BIT_FWFF_PKT_STR_ADDR_8822B(x) (((x) & BIT_MASK_FWFF_PKT_STR_ADDR_8822B) << BIT_SHIFT_FWFF_PKT_STR_ADDR_8822B)
-#define BIT_GET_FWFF_PKT_STR_ADDR_8822B(x) (((x) >> BIT_SHIFT_FWFF_PKT_STR_ADDR_8822B) & BIT_MASK_FWFF_PKT_STR_ADDR_8822B)

+#define BIT_GET_FWFF_PKT_STR_ADDR_8822B(x) (((x) >> BIT_SHIFT_FWFF_PKT_STR_ADDR_8822B) & BIT_MASK_FWFF_PKT_STR_ADDR_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -3584,7 +3907,8 @@
 #define BIT_SHIFT_DDMACH0_SA_8822B 0
 #define BIT_MASK_DDMACH0_SA_8822B 0xffffffffL
 #define BIT_DDMACH0_SA_8822B(x) (((x) & BIT_MASK_DDMACH0_SA_8822B) << BIT_SHIFT_DDMACH0_SA_8822B)
-#define BIT_GET_DDMACH0_SA_8822B(x) (((x) >> BIT_SHIFT_DDMACH0_SA_8822B) & BIT_MASK_DDMACH0_SA_8822B)

+#define BIT_GET_DDMACH0_SA_8822B(x) (((x) >> BIT_SHIFT_DDMACH0_SA_8822B) & BIT_MASK_DDMACH0_SA_8822B)
+
 
 
 /* 2 REG_DDMA_CH0DA_8822B */
@@ -3592,7 +3916,8 @@
 #define BIT_SHIFT_DDMACH0_DA_8822B 0
 #define BIT_MASK_DDMACH0_DA_8822B 0xffffffffL
 #define BIT_DDMACH0_DA_8822B(x) (((x) & BIT_MASK_DDMACH0_DA_8822B) << BIT_SHIFT_DDMACH0_DA_8822B)
-#define BIT_GET_DDMACH0_DA_8822B(x) (((x) >> BIT_SHIFT_DDMACH0_DA_8822B) & BIT_MASK_DDMACH0_DA_8822B)

+#define BIT_GET_DDMACH0_DA_8822B(x) (((x) >> BIT_SHIFT_DDMACH0_DA_8822B) & BIT_MASK_DDMACH0_DA_8822B)
+
 
 
 /* 2 REG_DDMA_CH0CTRL_8822B */
@@ -3607,7 +3932,8 @@
 #define BIT_SHIFT_DDMACH0_DLEN_8822B 0
 #define BIT_MASK_DDMACH0_DLEN_8822B 0x3ffff
 #define BIT_DDMACH0_DLEN_8822B(x) (((x) & BIT_MASK_DDMACH0_DLEN_8822B) << BIT_SHIFT_DDMACH0_DLEN_8822B)
-#define BIT_GET_DDMACH0_DLEN_8822B(x) (((x) >> BIT_SHIFT_DDMACH0_DLEN_8822B) & BIT_MASK_DDMACH0_DLEN_8822B)

+#define BIT_GET_DDMACH0_DLEN_8822B(x) (((x) >> BIT_SHIFT_DDMACH0_DLEN_8822B) & BIT_MASK_DDMACH0_DLEN_8822B)
+
 
 
 /* 2 REG_DDMA_CH1SA_8822B */
@@ -3615,7 +3941,8 @@
 #define BIT_SHIFT_DDMACH1_SA_8822B 0
 #define BIT_MASK_DDMACH1_SA_8822B 0xffffffffL
 #define BIT_DDMACH1_SA_8822B(x) (((x) & BIT_MASK_DDMACH1_SA_8822B) << BIT_SHIFT_DDMACH1_SA_8822B)
-#define BIT_GET_DDMACH1_SA_8822B(x) (((x) >> BIT_SHIFT_DDMACH1_SA_8822B) & BIT_MASK_DDMACH1_SA_8822B)

+#define BIT_GET_DDMACH1_SA_8822B(x) (((x) >> BIT_SHIFT_DDMACH1_SA_8822B) & BIT_MASK_DDMACH1_SA_8822B)
+
 
 
 /* 2 REG_DDMA_CH1DA_8822B */
@@ -3623,7 +3950,8 @@
 #define BIT_SHIFT_DDMACH1_DA_8822B 0
 #define BIT_MASK_DDMACH1_DA_8822B 0xffffffffL
 #define BIT_DDMACH1_DA_8822B(x) (((x) & BIT_MASK_DDMACH1_DA_8822B) << BIT_SHIFT_DDMACH1_DA_8822B)
-#define BIT_GET_DDMACH1_DA_8822B(x) (((x) >> BIT_SHIFT_DDMACH1_DA_8822B) & BIT_MASK_DDMACH1_DA_8822B)

+#define BIT_GET_DDMACH1_DA_8822B(x) (((x) >> BIT_SHIFT_DDMACH1_DA_8822B) & BIT_MASK_DDMACH1_DA_8822B)
+
 
 
 /* 2 REG_DDMA_CH1CTRL_8822B */
@@ -3638,7 +3966,8 @@
 #define BIT_SHIFT_DDMACH1_DLEN_8822B 0
 #define BIT_MASK_DDMACH1_DLEN_8822B 0x3ffff
 #define BIT_DDMACH1_DLEN_8822B(x) (((x) & BIT_MASK_DDMACH1_DLEN_8822B) << BIT_SHIFT_DDMACH1_DLEN_8822B)
-#define BIT_GET_DDMACH1_DLEN_8822B(x) (((x) >> BIT_SHIFT_DDMACH1_DLEN_8822B) & BIT_MASK_DDMACH1_DLEN_8822B)

+#define BIT_GET_DDMACH1_DLEN_8822B(x) (((x) >> BIT_SHIFT_DDMACH1_DLEN_8822B) & BIT_MASK_DDMACH1_DLEN_8822B)
+
 
 
 /* 2 REG_DDMA_CH2SA_8822B */
@@ -3646,7 +3975,8 @@
 #define BIT_SHIFT_DDMACH2_SA_8822B 0
 #define BIT_MASK_DDMACH2_SA_8822B 0xffffffffL
 #define BIT_DDMACH2_SA_8822B(x) (((x) & BIT_MASK_DDMACH2_SA_8822B) << BIT_SHIFT_DDMACH2_SA_8822B)
-#define BIT_GET_DDMACH2_SA_8822B(x) (((x) >> BIT_SHIFT_DDMACH2_SA_8822B) & BIT_MASK_DDMACH2_SA_8822B)

+#define BIT_GET_DDMACH2_SA_8822B(x) (((x) >> BIT_SHIFT_DDMACH2_SA_8822B) & BIT_MASK_DDMACH2_SA_8822B)
+
 
 
 /* 2 REG_DDMA_CH2DA_8822B */
@@ -3654,7 +3984,8 @@
 #define BIT_SHIFT_DDMACH2_DA_8822B 0
 #define BIT_MASK_DDMACH2_DA_8822B 0xffffffffL
 #define BIT_DDMACH2_DA_8822B(x) (((x) & BIT_MASK_DDMACH2_DA_8822B) << BIT_SHIFT_DDMACH2_DA_8822B)
-#define BIT_GET_DDMACH2_DA_8822B(x) (((x) >> BIT_SHIFT_DDMACH2_DA_8822B) & BIT_MASK_DDMACH2_DA_8822B)

+#define BIT_GET_DDMACH2_DA_8822B(x) (((x) >> BIT_SHIFT_DDMACH2_DA_8822B) & BIT_MASK_DDMACH2_DA_8822B)
+
 
 
 /* 2 REG_DDMA_CH2CTRL_8822B */
@@ -3669,7 +4000,8 @@
 #define BIT_SHIFT_DDMACH2_DLEN_8822B 0
 #define BIT_MASK_DDMACH2_DLEN_8822B 0x3ffff
 #define BIT_DDMACH2_DLEN_8822B(x) (((x) & BIT_MASK_DDMACH2_DLEN_8822B) << BIT_SHIFT_DDMACH2_DLEN_8822B)
-#define BIT_GET_DDMACH2_DLEN_8822B(x) (((x) >> BIT_SHIFT_DDMACH2_DLEN_8822B) & BIT_MASK_DDMACH2_DLEN_8822B)

+#define BIT_GET_DDMACH2_DLEN_8822B(x) (((x) >> BIT_SHIFT_DDMACH2_DLEN_8822B) & BIT_MASK_DDMACH2_DLEN_8822B)
+
 
 
 /* 2 REG_DDMA_CH3SA_8822B */
@@ -3677,7 +4009,8 @@
 #define BIT_SHIFT_DDMACH3_SA_8822B 0
 #define BIT_MASK_DDMACH3_SA_8822B 0xffffffffL
 #define BIT_DDMACH3_SA_8822B(x) (((x) & BIT_MASK_DDMACH3_SA_8822B) << BIT_SHIFT_DDMACH3_SA_8822B)
-#define BIT_GET_DDMACH3_SA_8822B(x) (((x) >> BIT_SHIFT_DDMACH3_SA_8822B) & BIT_MASK_DDMACH3_SA_8822B)

+#define BIT_GET_DDMACH3_SA_8822B(x) (((x) >> BIT_SHIFT_DDMACH3_SA_8822B) & BIT_MASK_DDMACH3_SA_8822B)
+
 
 
 /* 2 REG_DDMA_CH3DA_8822B */
@@ -3685,7 +4018,8 @@
 #define BIT_SHIFT_DDMACH3_DA_8822B 0
 #define BIT_MASK_DDMACH3_DA_8822B 0xffffffffL
 #define BIT_DDMACH3_DA_8822B(x) (((x) & BIT_MASK_DDMACH3_DA_8822B) << BIT_SHIFT_DDMACH3_DA_8822B)
-#define BIT_GET_DDMACH3_DA_8822B(x) (((x) >> BIT_SHIFT_DDMACH3_DA_8822B) & BIT_MASK_DDMACH3_DA_8822B)

+#define BIT_GET_DDMACH3_DA_8822B(x) (((x) >> BIT_SHIFT_DDMACH3_DA_8822B) & BIT_MASK_DDMACH3_DA_8822B)
+
 
 
 /* 2 REG_DDMA_CH3CTRL_8822B */
@@ -3700,7 +4034,8 @@
 #define BIT_SHIFT_DDMACH3_DLEN_8822B 0
 #define BIT_MASK_DDMACH3_DLEN_8822B 0x3ffff
 #define BIT_DDMACH3_DLEN_8822B(x) (((x) & BIT_MASK_DDMACH3_DLEN_8822B) << BIT_SHIFT_DDMACH3_DLEN_8822B)
-#define BIT_GET_DDMACH3_DLEN_8822B(x) (((x) >> BIT_SHIFT_DDMACH3_DLEN_8822B) & BIT_MASK_DDMACH3_DLEN_8822B)

+#define BIT_GET_DDMACH3_DLEN_8822B(x) (((x) >> BIT_SHIFT_DDMACH3_DLEN_8822B) & BIT_MASK_DDMACH3_DLEN_8822B)
+
 
 
 /* 2 REG_DDMA_CH4SA_8822B */
@@ -3708,7 +4043,8 @@
 #define BIT_SHIFT_DDMACH4_SA_8822B 0
 #define BIT_MASK_DDMACH4_SA_8822B 0xffffffffL
 #define BIT_DDMACH4_SA_8822B(x) (((x) & BIT_MASK_DDMACH4_SA_8822B) << BIT_SHIFT_DDMACH4_SA_8822B)
-#define BIT_GET_DDMACH4_SA_8822B(x) (((x) >> BIT_SHIFT_DDMACH4_SA_8822B) & BIT_MASK_DDMACH4_SA_8822B)

+#define BIT_GET_DDMACH4_SA_8822B(x) (((x) >> BIT_SHIFT_DDMACH4_SA_8822B) & BIT_MASK_DDMACH4_SA_8822B)
+
 
 
 /* 2 REG_DDMA_CH4DA_8822B */
@@ -3716,7 +4052,8 @@
 #define BIT_SHIFT_DDMACH4_DA_8822B 0
 #define BIT_MASK_DDMACH4_DA_8822B 0xffffffffL
 #define BIT_DDMACH4_DA_8822B(x) (((x) & BIT_MASK_DDMACH4_DA_8822B) << BIT_SHIFT_DDMACH4_DA_8822B)
-#define BIT_GET_DDMACH4_DA_8822B(x) (((x) >> BIT_SHIFT_DDMACH4_DA_8822B) & BIT_MASK_DDMACH4_DA_8822B)

+#define BIT_GET_DDMACH4_DA_8822B(x) (((x) >> BIT_SHIFT_DDMACH4_DA_8822B) & BIT_MASK_DDMACH4_DA_8822B)
+
 
 
 /* 2 REG_DDMA_CH4CTRL_8822B */
@@ -3731,7 +4068,8 @@
 #define BIT_SHIFT_DDMACH4_DLEN_8822B 0
 #define BIT_MASK_DDMACH4_DLEN_8822B 0x3ffff
 #define BIT_DDMACH4_DLEN_8822B(x) (((x) & BIT_MASK_DDMACH4_DLEN_8822B) << BIT_SHIFT_DDMACH4_DLEN_8822B)
-#define BIT_GET_DDMACH4_DLEN_8822B(x) (((x) >> BIT_SHIFT_DDMACH4_DLEN_8822B) & BIT_MASK_DDMACH4_DLEN_8822B)

+#define BIT_GET_DDMACH4_DLEN_8822B(x) (((x) >> BIT_SHIFT_DDMACH4_DLEN_8822B) & BIT_MASK_DDMACH4_DLEN_8822B)
+
 
 
 /* 2 REG_DDMA_CH5SA_8822B */
@@ -3739,7 +4077,8 @@
 #define BIT_SHIFT_DDMACH5_SA_8822B 0
 #define BIT_MASK_DDMACH5_SA_8822B 0xffffffffL
 #define BIT_DDMACH5_SA_8822B(x) (((x) & BIT_MASK_DDMACH5_SA_8822B) << BIT_SHIFT_DDMACH5_SA_8822B)
-#define BIT_GET_DDMACH5_SA_8822B(x) (((x) >> BIT_SHIFT_DDMACH5_SA_8822B) & BIT_MASK_DDMACH5_SA_8822B)

+#define BIT_GET_DDMACH5_SA_8822B(x) (((x) >> BIT_SHIFT_DDMACH5_SA_8822B) & BIT_MASK_DDMACH5_SA_8822B)
+
 
 
 /* 2 REG_DDMA_CH5DA_8822B */
@@ -3747,7 +4086,8 @@
 #define BIT_SHIFT_DDMACH5_DA_8822B 0
 #define BIT_MASK_DDMACH5_DA_8822B 0xffffffffL
 #define BIT_DDMACH5_DA_8822B(x) (((x) & BIT_MASK_DDMACH5_DA_8822B) << BIT_SHIFT_DDMACH5_DA_8822B)
-#define BIT_GET_DDMACH5_DA_8822B(x) (((x) >> BIT_SHIFT_DDMACH5_DA_8822B) & BIT_MASK_DDMACH5_DA_8822B)

+#define BIT_GET_DDMACH5_DA_8822B(x) (((x) >> BIT_SHIFT_DDMACH5_DA_8822B) & BIT_MASK_DDMACH5_DA_8822B)
+
 
 
 /* 2 REG_REG_DDMA_CH5CTRL_8822B */
@@ -3762,7 +4102,8 @@
 #define BIT_SHIFT_DDMACH5_DLEN_8822B 0
 #define BIT_MASK_DDMACH5_DLEN_8822B 0x3ffff
 #define BIT_DDMACH5_DLEN_8822B(x) (((x) & BIT_MASK_DDMACH5_DLEN_8822B) << BIT_SHIFT_DDMACH5_DLEN_8822B)
-#define BIT_GET_DDMACH5_DLEN_8822B(x) (((x) >> BIT_SHIFT_DDMACH5_DLEN_8822B) & BIT_MASK_DDMACH5_DLEN_8822B)

+#define BIT_GET_DDMACH5_DLEN_8822B(x) (((x) >> BIT_SHIFT_DDMACH5_DLEN_8822B) & BIT_MASK_DDMACH5_DLEN_8822B)
+
 
 
 /* 2 REG_DDMA_INT_MSK_8822B */
@@ -3786,7 +4127,8 @@
 #define BIT_SHIFT_IDDMA0_CHKSUM_8822B 0
 #define BIT_MASK_IDDMA0_CHKSUM_8822B 0xffff
 #define BIT_IDDMA0_CHKSUM_8822B(x) (((x) & BIT_MASK_IDDMA0_CHKSUM_8822B) << BIT_SHIFT_IDDMA0_CHKSUM_8822B)
-#define BIT_GET_IDDMA0_CHKSUM_8822B(x) (((x) >> BIT_SHIFT_IDDMA0_CHKSUM_8822B) & BIT_MASK_IDDMA0_CHKSUM_8822B)

+#define BIT_GET_IDDMA0_CHKSUM_8822B(x) (((x) >> BIT_SHIFT_IDDMA0_CHKSUM_8822B) & BIT_MASK_IDDMA0_CHKSUM_8822B)
+
 
 
 /* 2 REG_DDMA_MONITOR_8822B */
@@ -3808,14 +4150,16 @@
 #define BIT_SHIFT_PCIE_MAX_RXDMA_8822B 28
 #define BIT_MASK_PCIE_MAX_RXDMA_8822B 0x7
 #define BIT_PCIE_MAX_RXDMA_8822B(x) (((x) & BIT_MASK_PCIE_MAX_RXDMA_8822B) << BIT_SHIFT_PCIE_MAX_RXDMA_8822B)
-#define BIT_GET_PCIE_MAX_RXDMA_8822B(x) (((x) >> BIT_SHIFT_PCIE_MAX_RXDMA_8822B) & BIT_MASK_PCIE_MAX_RXDMA_8822B)

+#define BIT_GET_PCIE_MAX_RXDMA_8822B(x) (((x) >> BIT_SHIFT_PCIE_MAX_RXDMA_8822B) & BIT_MASK_PCIE_MAX_RXDMA_8822B)
+
 
 #define BIT_MULRW_8822B BIT(27)
 
 #define BIT_SHIFT_PCIE_MAX_TXDMA_8822B 24
 #define BIT_MASK_PCIE_MAX_TXDMA_8822B 0x7
 #define BIT_PCIE_MAX_TXDMA_8822B(x) (((x) & BIT_MASK_PCIE_MAX_TXDMA_8822B) << BIT_SHIFT_PCIE_MAX_TXDMA_8822B)
-#define BIT_GET_PCIE_MAX_TXDMA_8822B(x) (((x) >> BIT_SHIFT_PCIE_MAX_TXDMA_8822B) & BIT_MASK_PCIE_MAX_TXDMA_8822B)

+#define BIT_GET_PCIE_MAX_TXDMA_8822B(x) (((x) >> BIT_SHIFT_PCIE_MAX_TXDMA_8822B) & BIT_MASK_PCIE_MAX_TXDMA_8822B)
+
 
 #define BIT_EN_CPL_TIMEOUT_PS_8822B BIT(22)
 #define BIT_REG_TXDMA_FAIL_PS_8822B BIT(21)
@@ -3846,31 +4190,36 @@
 #define BIT_SHIFT_TXTTIMER_MATCH_NUM_8822B 28
 #define BIT_MASK_TXTTIMER_MATCH_NUM_8822B 0xf
 #define BIT_TXTTIMER_MATCH_NUM_8822B(x) (((x) & BIT_MASK_TXTTIMER_MATCH_NUM_8822B) << BIT_SHIFT_TXTTIMER_MATCH_NUM_8822B)
-#define BIT_GET_TXTTIMER_MATCH_NUM_8822B(x) (((x) >> BIT_SHIFT_TXTTIMER_MATCH_NUM_8822B) & BIT_MASK_TXTTIMER_MATCH_NUM_8822B)

+#define BIT_GET_TXTTIMER_MATCH_NUM_8822B(x) (((x) >> BIT_SHIFT_TXTTIMER_MATCH_NUM_8822B) & BIT_MASK_TXTTIMER_MATCH_NUM_8822B)
+
 
 
 #define BIT_SHIFT_TXPKT_NUM_MATCH_8822B 24
 #define BIT_MASK_TXPKT_NUM_MATCH_8822B 0xf
 #define BIT_TXPKT_NUM_MATCH_8822B(x) (((x) & BIT_MASK_TXPKT_NUM_MATCH_8822B) << BIT_SHIFT_TXPKT_NUM_MATCH_8822B)
-#define BIT_GET_TXPKT_NUM_MATCH_8822B(x) (((x) >> BIT_SHIFT_TXPKT_NUM_MATCH_8822B) & BIT_MASK_TXPKT_NUM_MATCH_8822B)

+#define BIT_GET_TXPKT_NUM_MATCH_8822B(x) (((x) >> BIT_SHIFT_TXPKT_NUM_MATCH_8822B) & BIT_MASK_TXPKT_NUM_MATCH_8822B)
+
 
 
 #define BIT_SHIFT_RXTTIMER_MATCH_NUM_8822B 20
 #define BIT_MASK_RXTTIMER_MATCH_NUM_8822B 0xf
 #define BIT_RXTTIMER_MATCH_NUM_8822B(x) (((x) & BIT_MASK_RXTTIMER_MATCH_NUM_8822B) << BIT_SHIFT_RXTTIMER_MATCH_NUM_8822B)
-#define BIT_GET_RXTTIMER_MATCH_NUM_8822B(x) (((x) >> BIT_SHIFT_RXTTIMER_MATCH_NUM_8822B) & BIT_MASK_RXTTIMER_MATCH_NUM_8822B)

+#define BIT_GET_RXTTIMER_MATCH_NUM_8822B(x) (((x) >> BIT_SHIFT_RXTTIMER_MATCH_NUM_8822B) & BIT_MASK_RXTTIMER_MATCH_NUM_8822B)
+
 
 
 #define BIT_SHIFT_RXPKT_NUM_MATCH_8822B 16
 #define BIT_MASK_RXPKT_NUM_MATCH_8822B 0xf
 #define BIT_RXPKT_NUM_MATCH_8822B(x) (((x) & BIT_MASK_RXPKT_NUM_MATCH_8822B) << BIT_SHIFT_RXPKT_NUM_MATCH_8822B)
-#define BIT_GET_RXPKT_NUM_MATCH_8822B(x) (((x) >> BIT_SHIFT_RXPKT_NUM_MATCH_8822B) & BIT_MASK_RXPKT_NUM_MATCH_8822B)

+#define BIT_GET_RXPKT_NUM_MATCH_8822B(x) (((x) >> BIT_SHIFT_RXPKT_NUM_MATCH_8822B) & BIT_MASK_RXPKT_NUM_MATCH_8822B)
+
 
 
 #define BIT_SHIFT_MIGRATE_TIMER_8822B 0
 #define BIT_MASK_MIGRATE_TIMER_8822B 0xffff
 #define BIT_MIGRATE_TIMER_8822B(x) (((x) & BIT_MASK_MIGRATE_TIMER_8822B) << BIT_SHIFT_MIGRATE_TIMER_8822B)
-#define BIT_GET_MIGRATE_TIMER_8822B(x) (((x) >> BIT_SHIFT_MIGRATE_TIMER_8822B) & BIT_MASK_MIGRATE_TIMER_8822B)

+#define BIT_GET_MIGRATE_TIMER_8822B(x) (((x) >> BIT_SHIFT_MIGRATE_TIMER_8822B) & BIT_MASK_MIGRATE_TIMER_8822B)
+
 
 
 /* 2 REG_BCNQ_TXBD_DESA_8822B */
@@ -3878,7 +4227,8 @@
 #define BIT_SHIFT_BCNQ_TXBD_DESA_8822B 0
 #define BIT_MASK_BCNQ_TXBD_DESA_8822B 0xffffffffffffffffL
 #define BIT_BCNQ_TXBD_DESA_8822B(x) (((x) & BIT_MASK_BCNQ_TXBD_DESA_8822B) << BIT_SHIFT_BCNQ_TXBD_DESA_8822B)
-#define BIT_GET_BCNQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_BCNQ_TXBD_DESA_8822B) & BIT_MASK_BCNQ_TXBD_DESA_8822B)

+#define BIT_GET_BCNQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_BCNQ_TXBD_DESA_8822B) & BIT_MASK_BCNQ_TXBD_DESA_8822B)
+
 
 
 /* 2 REG_MGQ_TXBD_DESA_8822B */
@@ -3886,7 +4236,8 @@
 #define BIT_SHIFT_MGQ_TXBD_DESA_8822B 0
 #define BIT_MASK_MGQ_TXBD_DESA_8822B 0xffffffffffffffffL
 #define BIT_MGQ_TXBD_DESA_8822B(x) (((x) & BIT_MASK_MGQ_TXBD_DESA_8822B) << BIT_SHIFT_MGQ_TXBD_DESA_8822B)
-#define BIT_GET_MGQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_MGQ_TXBD_DESA_8822B) & BIT_MASK_MGQ_TXBD_DESA_8822B)

+#define BIT_GET_MGQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_MGQ_TXBD_DESA_8822B) & BIT_MASK_MGQ_TXBD_DESA_8822B)
+
 
 
 /* 2 REG_VOQ_TXBD_DESA_8822B */
@@ -3894,7 +4245,8 @@
 #define BIT_SHIFT_VOQ_TXBD_DESA_8822B 0
 #define BIT_MASK_VOQ_TXBD_DESA_8822B 0xffffffffffffffffL
 #define BIT_VOQ_TXBD_DESA_8822B(x) (((x) & BIT_MASK_VOQ_TXBD_DESA_8822B) << BIT_SHIFT_VOQ_TXBD_DESA_8822B)
-#define BIT_GET_VOQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_VOQ_TXBD_DESA_8822B) & BIT_MASK_VOQ_TXBD_DESA_8822B)

+#define BIT_GET_VOQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_VOQ_TXBD_DESA_8822B) & BIT_MASK_VOQ_TXBD_DESA_8822B)
+
 
 
 /* 2 REG_VIQ_TXBD_DESA_8822B */
@@ -3902,7 +4254,8 @@
 #define BIT_SHIFT_VIQ_TXBD_DESA_8822B 0
 #define BIT_MASK_VIQ_TXBD_DESA_8822B 0xffffffffffffffffL
 #define BIT_VIQ_TXBD_DESA_8822B(x) (((x) & BIT_MASK_VIQ_TXBD_DESA_8822B) << BIT_SHIFT_VIQ_TXBD_DESA_8822B)
-#define BIT_GET_VIQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_VIQ_TXBD_DESA_8822B) & BIT_MASK_VIQ_TXBD_DESA_8822B)

+#define BIT_GET_VIQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_VIQ_TXBD_DESA_8822B) & BIT_MASK_VIQ_TXBD_DESA_8822B)
+
 
 
 /* 2 REG_BEQ_TXBD_DESA_8822B */
@@ -3910,7 +4263,8 @@
 #define BIT_SHIFT_BEQ_TXBD_DESA_8822B 0
 #define BIT_MASK_BEQ_TXBD_DESA_8822B 0xffffffffffffffffL
 #define BIT_BEQ_TXBD_DESA_8822B(x) (((x) & BIT_MASK_BEQ_TXBD_DESA_8822B) << BIT_SHIFT_BEQ_TXBD_DESA_8822B)
-#define BIT_GET_BEQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_BEQ_TXBD_DESA_8822B) & BIT_MASK_BEQ_TXBD_DESA_8822B)

+#define BIT_GET_BEQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_BEQ_TXBD_DESA_8822B) & BIT_MASK_BEQ_TXBD_DESA_8822B)
+
 
 
 /* 2 REG_BKQ_TXBD_DESA_8822B */
@@ -3918,7 +4272,8 @@
 #define BIT_SHIFT_BKQ_TXBD_DESA_8822B 0
 #define BIT_MASK_BKQ_TXBD_DESA_8822B 0xffffffffffffffffL
 #define BIT_BKQ_TXBD_DESA_8822B(x) (((x) & BIT_MASK_BKQ_TXBD_DESA_8822B) << BIT_SHIFT_BKQ_TXBD_DESA_8822B)
-#define BIT_GET_BKQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_BKQ_TXBD_DESA_8822B) & BIT_MASK_BKQ_TXBD_DESA_8822B)

+#define BIT_GET_BKQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_BKQ_TXBD_DESA_8822B) & BIT_MASK_BKQ_TXBD_DESA_8822B)
+
 
 
 /* 2 REG_RXQ_RXBD_DESA_8822B */
@@ -3926,7 +4281,8 @@
 #define BIT_SHIFT_RXQ_RXBD_DESA_8822B 0
 #define BIT_MASK_RXQ_RXBD_DESA_8822B 0xffffffffffffffffL
 #define BIT_RXQ_RXBD_DESA_8822B(x) (((x) & BIT_MASK_RXQ_RXBD_DESA_8822B) << BIT_SHIFT_RXQ_RXBD_DESA_8822B)
-#define BIT_GET_RXQ_RXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_RXQ_RXBD_DESA_8822B) & BIT_MASK_RXQ_RXBD_DESA_8822B)

+#define BIT_GET_RXQ_RXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_RXQ_RXBD_DESA_8822B) & BIT_MASK_RXQ_RXBD_DESA_8822B)
+
 
 
 /* 2 REG_HI0Q_TXBD_DESA_8822B */
@@ -3934,7 +4290,8 @@
 #define BIT_SHIFT_HI0Q_TXBD_DESA_8822B 0
 #define BIT_MASK_HI0Q_TXBD_DESA_8822B 0xffffffffffffffffL
 #define BIT_HI0Q_TXBD_DESA_8822B(x) (((x) & BIT_MASK_HI0Q_TXBD_DESA_8822B) << BIT_SHIFT_HI0Q_TXBD_DESA_8822B)
-#define BIT_GET_HI0Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI0Q_TXBD_DESA_8822B) & BIT_MASK_HI0Q_TXBD_DESA_8822B)

+#define BIT_GET_HI0Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI0Q_TXBD_DESA_8822B) & BIT_MASK_HI0Q_TXBD_DESA_8822B)
+
 
 
 /* 2 REG_HI1Q_TXBD_DESA_8822B */
@@ -3942,7 +4299,8 @@
 #define BIT_SHIFT_HI1Q_TXBD_DESA_8822B 0
 #define BIT_MASK_HI1Q_TXBD_DESA_8822B 0xffffffffffffffffL
 #define BIT_HI1Q_TXBD_DESA_8822B(x) (((x) & BIT_MASK_HI1Q_TXBD_DESA_8822B) << BIT_SHIFT_HI1Q_TXBD_DESA_8822B)
-#define BIT_GET_HI1Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI1Q_TXBD_DESA_8822B) & BIT_MASK_HI1Q_TXBD_DESA_8822B)

+#define BIT_GET_HI1Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI1Q_TXBD_DESA_8822B) & BIT_MASK_HI1Q_TXBD_DESA_8822B)
+
 
 
 /* 2 REG_HI2Q_TXBD_DESA_8822B */
@@ -3950,7 +4308,8 @@
 #define BIT_SHIFT_HI2Q_TXBD_DESA_8822B 0
 #define BIT_MASK_HI2Q_TXBD_DESA_8822B 0xffffffffffffffffL
 #define BIT_HI2Q_TXBD_DESA_8822B(x) (((x) & BIT_MASK_HI2Q_TXBD_DESA_8822B) << BIT_SHIFT_HI2Q_TXBD_DESA_8822B)
-#define BIT_GET_HI2Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI2Q_TXBD_DESA_8822B) & BIT_MASK_HI2Q_TXBD_DESA_8822B)

+#define BIT_GET_HI2Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI2Q_TXBD_DESA_8822B) & BIT_MASK_HI2Q_TXBD_DESA_8822B)
+
 
 
 /* 2 REG_HI3Q_TXBD_DESA_8822B */
@@ -3958,7 +4317,8 @@
 #define BIT_SHIFT_HI3Q_TXBD_DESA_8822B 0
 #define BIT_MASK_HI3Q_TXBD_DESA_8822B 0xffffffffffffffffL
 #define BIT_HI3Q_TXBD_DESA_8822B(x) (((x) & BIT_MASK_HI3Q_TXBD_DESA_8822B) << BIT_SHIFT_HI3Q_TXBD_DESA_8822B)
-#define BIT_GET_HI3Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI3Q_TXBD_DESA_8822B) & BIT_MASK_HI3Q_TXBD_DESA_8822B)

+#define BIT_GET_HI3Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI3Q_TXBD_DESA_8822B) & BIT_MASK_HI3Q_TXBD_DESA_8822B)
+
 
 
 /* 2 REG_HI4Q_TXBD_DESA_8822B */
@@ -3966,7 +4326,8 @@
 #define BIT_SHIFT_HI4Q_TXBD_DESA_8822B 0
 #define BIT_MASK_HI4Q_TXBD_DESA_8822B 0xffffffffffffffffL
 #define BIT_HI4Q_TXBD_DESA_8822B(x) (((x) & BIT_MASK_HI4Q_TXBD_DESA_8822B) << BIT_SHIFT_HI4Q_TXBD_DESA_8822B)
-#define BIT_GET_HI4Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI4Q_TXBD_DESA_8822B) & BIT_MASK_HI4Q_TXBD_DESA_8822B)

+#define BIT_GET_HI4Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI4Q_TXBD_DESA_8822B) & BIT_MASK_HI4Q_TXBD_DESA_8822B)
+
 
 
 /* 2 REG_HI5Q_TXBD_DESA_8822B */
@@ -3974,7 +4335,8 @@
 #define BIT_SHIFT_HI5Q_TXBD_DESA_8822B 0
 #define BIT_MASK_HI5Q_TXBD_DESA_8822B 0xffffffffffffffffL
 #define BIT_HI5Q_TXBD_DESA_8822B(x) (((x) & BIT_MASK_HI5Q_TXBD_DESA_8822B) << BIT_SHIFT_HI5Q_TXBD_DESA_8822B)
-#define BIT_GET_HI5Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI5Q_TXBD_DESA_8822B) & BIT_MASK_HI5Q_TXBD_DESA_8822B)

+#define BIT_GET_HI5Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI5Q_TXBD_DESA_8822B) & BIT_MASK_HI5Q_TXBD_DESA_8822B)
+
 
 
 /* 2 REG_HI6Q_TXBD_DESA_8822B */
@@ -3982,7 +4344,8 @@
 #define BIT_SHIFT_HI6Q_TXBD_DESA_8822B 0
 #define BIT_MASK_HI6Q_TXBD_DESA_8822B 0xffffffffffffffffL
 #define BIT_HI6Q_TXBD_DESA_8822B(x) (((x) & BIT_MASK_HI6Q_TXBD_DESA_8822B) << BIT_SHIFT_HI6Q_TXBD_DESA_8822B)
-#define BIT_GET_HI6Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI6Q_TXBD_DESA_8822B) & BIT_MASK_HI6Q_TXBD_DESA_8822B)

+#define BIT_GET_HI6Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI6Q_TXBD_DESA_8822B) & BIT_MASK_HI6Q_TXBD_DESA_8822B)
+
 
 
 /* 2 REG_HI7Q_TXBD_DESA_8822B */
@@ -3990,7 +4353,8 @@
 #define BIT_SHIFT_HI7Q_TXBD_DESA_8822B 0
 #define BIT_MASK_HI7Q_TXBD_DESA_8822B 0xffffffffffffffffL
 #define BIT_HI7Q_TXBD_DESA_8822B(x) (((x) & BIT_MASK_HI7Q_TXBD_DESA_8822B) << BIT_SHIFT_HI7Q_TXBD_DESA_8822B)
-#define BIT_GET_HI7Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI7Q_TXBD_DESA_8822B) & BIT_MASK_HI7Q_TXBD_DESA_8822B)

+#define BIT_GET_HI7Q_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_HI7Q_TXBD_DESA_8822B) & BIT_MASK_HI7Q_TXBD_DESA_8822B)
+
 
 
 /* 2 REG_MGQ_TXBD_NUM_8822B */
@@ -3999,13 +4363,15 @@
 #define BIT_SHIFT_MGQ_DESC_MODE_8822B 12
 #define BIT_MASK_MGQ_DESC_MODE_8822B 0x3
 #define BIT_MGQ_DESC_MODE_8822B(x) (((x) & BIT_MASK_MGQ_DESC_MODE_8822B) << BIT_SHIFT_MGQ_DESC_MODE_8822B)
-#define BIT_GET_MGQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_MGQ_DESC_MODE_8822B) & BIT_MASK_MGQ_DESC_MODE_8822B)

+#define BIT_GET_MGQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_MGQ_DESC_MODE_8822B) & BIT_MASK_MGQ_DESC_MODE_8822B)
+
 
 
 #define BIT_SHIFT_MGQ_DESC_NUM_8822B 0
 #define BIT_MASK_MGQ_DESC_NUM_8822B 0xfff
 #define BIT_MGQ_DESC_NUM_8822B(x) (((x) & BIT_MASK_MGQ_DESC_NUM_8822B) << BIT_SHIFT_MGQ_DESC_NUM_8822B)
-#define BIT_GET_MGQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_MGQ_DESC_NUM_8822B) & BIT_MASK_MGQ_DESC_NUM_8822B)

+#define BIT_GET_MGQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_MGQ_DESC_NUM_8822B) & BIT_MASK_MGQ_DESC_NUM_8822B)
+
 
 
 /* 2 REG_RX_RXBD_NUM_8822B */
@@ -4014,14 +4380,16 @@
 #define BIT_SHIFT_BCNQ_DESC_MODE_8822B 13
 #define BIT_MASK_BCNQ_DESC_MODE_8822B 0x3
 #define BIT_BCNQ_DESC_MODE_8822B(x) (((x) & BIT_MASK_BCNQ_DESC_MODE_8822B) << BIT_SHIFT_BCNQ_DESC_MODE_8822B)
-#define BIT_GET_BCNQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_BCNQ_DESC_MODE_8822B) & BIT_MASK_BCNQ_DESC_MODE_8822B)

+#define BIT_GET_BCNQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_BCNQ_DESC_MODE_8822B) & BIT_MASK_BCNQ_DESC_MODE_8822B)
+
 
 #define BIT_PCIE_BCNQ_FLAG_8822B BIT(12)
 
 #define BIT_SHIFT_RXQ_DESC_NUM_8822B 0
 #define BIT_MASK_RXQ_DESC_NUM_8822B 0xfff
 #define BIT_RXQ_DESC_NUM_8822B(x) (((x) & BIT_MASK_RXQ_DESC_NUM_8822B) << BIT_SHIFT_RXQ_DESC_NUM_8822B)
-#define BIT_GET_RXQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_RXQ_DESC_NUM_8822B) & BIT_MASK_RXQ_DESC_NUM_8822B)

+#define BIT_GET_RXQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_RXQ_DESC_NUM_8822B) & BIT_MASK_RXQ_DESC_NUM_8822B)
+
 
 
 /* 2 REG_VOQ_TXBD_NUM_8822B */
@@ -4030,13 +4398,15 @@
 #define BIT_SHIFT_VOQ_DESC_MODE_8822B 12
 #define BIT_MASK_VOQ_DESC_MODE_8822B 0x3
 #define BIT_VOQ_DESC_MODE_8822B(x) (((x) & BIT_MASK_VOQ_DESC_MODE_8822B) << BIT_SHIFT_VOQ_DESC_MODE_8822B)
-#define BIT_GET_VOQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_VOQ_DESC_MODE_8822B) & BIT_MASK_VOQ_DESC_MODE_8822B)

+#define BIT_GET_VOQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_VOQ_DESC_MODE_8822B) & BIT_MASK_VOQ_DESC_MODE_8822B)
+
 
 
 #define BIT_SHIFT_VOQ_DESC_NUM_8822B 0
 #define BIT_MASK_VOQ_DESC_NUM_8822B 0xfff
 #define BIT_VOQ_DESC_NUM_8822B(x) (((x) & BIT_MASK_VOQ_DESC_NUM_8822B) << BIT_SHIFT_VOQ_DESC_NUM_8822B)
-#define BIT_GET_VOQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_VOQ_DESC_NUM_8822B) & BIT_MASK_VOQ_DESC_NUM_8822B)

+#define BIT_GET_VOQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_VOQ_DESC_NUM_8822B) & BIT_MASK_VOQ_DESC_NUM_8822B)
+
 
 
 /* 2 REG_VIQ_TXBD_NUM_8822B */
@@ -4045,13 +4415,15 @@
 #define BIT_SHIFT_VIQ_DESC_MODE_8822B 12
 #define BIT_MASK_VIQ_DESC_MODE_8822B 0x3
 #define BIT_VIQ_DESC_MODE_8822B(x) (((x) & BIT_MASK_VIQ_DESC_MODE_8822B) << BIT_SHIFT_VIQ_DESC_MODE_8822B)
-#define BIT_GET_VIQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_VIQ_DESC_MODE_8822B) & BIT_MASK_VIQ_DESC_MODE_8822B)

+#define BIT_GET_VIQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_VIQ_DESC_MODE_8822B) & BIT_MASK_VIQ_DESC_MODE_8822B)
+
 
 
 #define BIT_SHIFT_VIQ_DESC_NUM_8822B 0
 #define BIT_MASK_VIQ_DESC_NUM_8822B 0xfff
 #define BIT_VIQ_DESC_NUM_8822B(x) (((x) & BIT_MASK_VIQ_DESC_NUM_8822B) << BIT_SHIFT_VIQ_DESC_NUM_8822B)
-#define BIT_GET_VIQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_VIQ_DESC_NUM_8822B) & BIT_MASK_VIQ_DESC_NUM_8822B)

+#define BIT_GET_VIQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_VIQ_DESC_NUM_8822B) & BIT_MASK_VIQ_DESC_NUM_8822B)
+
 
 
 /* 2 REG_BEQ_TXBD_NUM_8822B */
@@ -4060,13 +4432,15 @@
 #define BIT_SHIFT_BEQ_DESC_MODE_8822B 12
 #define BIT_MASK_BEQ_DESC_MODE_8822B 0x3
 #define BIT_BEQ_DESC_MODE_8822B(x) (((x) & BIT_MASK_BEQ_DESC_MODE_8822B) << BIT_SHIFT_BEQ_DESC_MODE_8822B)
-#define BIT_GET_BEQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_BEQ_DESC_MODE_8822B) & BIT_MASK_BEQ_DESC_MODE_8822B)

+#define BIT_GET_BEQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_BEQ_DESC_MODE_8822B) & BIT_MASK_BEQ_DESC_MODE_8822B)
+
 
 
 #define BIT_SHIFT_BEQ_DESC_NUM_8822B 0
 #define BIT_MASK_BEQ_DESC_NUM_8822B 0xfff
 #define BIT_BEQ_DESC_NUM_8822B(x) (((x) & BIT_MASK_BEQ_DESC_NUM_8822B) << BIT_SHIFT_BEQ_DESC_NUM_8822B)
-#define BIT_GET_BEQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_BEQ_DESC_NUM_8822B) & BIT_MASK_BEQ_DESC_NUM_8822B)

+#define BIT_GET_BEQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_BEQ_DESC_NUM_8822B) & BIT_MASK_BEQ_DESC_NUM_8822B)
+
 
 
 /* 2 REG_BKQ_TXBD_NUM_8822B */
@@ -4075,13 +4449,15 @@
 #define BIT_SHIFT_BKQ_DESC_MODE_8822B 12
 #define BIT_MASK_BKQ_DESC_MODE_8822B 0x3
 #define BIT_BKQ_DESC_MODE_8822B(x) (((x) & BIT_MASK_BKQ_DESC_MODE_8822B) << BIT_SHIFT_BKQ_DESC_MODE_8822B)
-#define BIT_GET_BKQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_BKQ_DESC_MODE_8822B) & BIT_MASK_BKQ_DESC_MODE_8822B)

+#define BIT_GET_BKQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_BKQ_DESC_MODE_8822B) & BIT_MASK_BKQ_DESC_MODE_8822B)
+
 
 
 #define BIT_SHIFT_BKQ_DESC_NUM_8822B 0
 #define BIT_MASK_BKQ_DESC_NUM_8822B 0xfff
 #define BIT_BKQ_DESC_NUM_8822B(x) (((x) & BIT_MASK_BKQ_DESC_NUM_8822B) << BIT_SHIFT_BKQ_DESC_NUM_8822B)
-#define BIT_GET_BKQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_BKQ_DESC_NUM_8822B) & BIT_MASK_BKQ_DESC_NUM_8822B)

+#define BIT_GET_BKQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_BKQ_DESC_NUM_8822B) & BIT_MASK_BKQ_DESC_NUM_8822B)
+
 
 
 /* 2 REG_HI0Q_TXBD_NUM_8822B */
@@ -4090,13 +4466,15 @@
 #define BIT_SHIFT_HI0Q_DESC_MODE_8822B 12
 #define BIT_MASK_HI0Q_DESC_MODE_8822B 0x3
 #define BIT_HI0Q_DESC_MODE_8822B(x) (((x) & BIT_MASK_HI0Q_DESC_MODE_8822B) << BIT_SHIFT_HI0Q_DESC_MODE_8822B)
-#define BIT_GET_HI0Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI0Q_DESC_MODE_8822B) & BIT_MASK_HI0Q_DESC_MODE_8822B)

+#define BIT_GET_HI0Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI0Q_DESC_MODE_8822B) & BIT_MASK_HI0Q_DESC_MODE_8822B)
+
 
 
 #define BIT_SHIFT_HI0Q_DESC_NUM_8822B 0
 #define BIT_MASK_HI0Q_DESC_NUM_8822B 0xfff
 #define BIT_HI0Q_DESC_NUM_8822B(x) (((x) & BIT_MASK_HI0Q_DESC_NUM_8822B) << BIT_SHIFT_HI0Q_DESC_NUM_8822B)
-#define BIT_GET_HI0Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI0Q_DESC_NUM_8822B) & BIT_MASK_HI0Q_DESC_NUM_8822B)

+#define BIT_GET_HI0Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI0Q_DESC_NUM_8822B) & BIT_MASK_HI0Q_DESC_NUM_8822B)
+
 
 
 /* 2 REG_HI1Q_TXBD_NUM_8822B */
@@ -4105,13 +4483,15 @@
 #define BIT_SHIFT_HI1Q_DESC_MODE_8822B 12
 #define BIT_MASK_HI1Q_DESC_MODE_8822B 0x3
 #define BIT_HI1Q_DESC_MODE_8822B(x) (((x) & BIT_MASK_HI1Q_DESC_MODE_8822B) << BIT_SHIFT_HI1Q_DESC_MODE_8822B)
-#define BIT_GET_HI1Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI1Q_DESC_MODE_8822B) & BIT_MASK_HI1Q_DESC_MODE_8822B)

+#define BIT_GET_HI1Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI1Q_DESC_MODE_8822B) & BIT_MASK_HI1Q_DESC_MODE_8822B)
+
 
 
 #define BIT_SHIFT_HI1Q_DESC_NUM_8822B 0
 #define BIT_MASK_HI1Q_DESC_NUM_8822B 0xfff
 #define BIT_HI1Q_DESC_NUM_8822B(x) (((x) & BIT_MASK_HI1Q_DESC_NUM_8822B) << BIT_SHIFT_HI1Q_DESC_NUM_8822B)
-#define BIT_GET_HI1Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI1Q_DESC_NUM_8822B) & BIT_MASK_HI1Q_DESC_NUM_8822B)

+#define BIT_GET_HI1Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI1Q_DESC_NUM_8822B) & BIT_MASK_HI1Q_DESC_NUM_8822B)
+
 
 
 /* 2 REG_HI2Q_TXBD_NUM_8822B */
@@ -4120,13 +4500,15 @@
 #define BIT_SHIFT_HI2Q_DESC_MODE_8822B 12
 #define BIT_MASK_HI2Q_DESC_MODE_8822B 0x3
 #define BIT_HI2Q_DESC_MODE_8822B(x) (((x) & BIT_MASK_HI2Q_DESC_MODE_8822B) << BIT_SHIFT_HI2Q_DESC_MODE_8822B)
-#define BIT_GET_HI2Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI2Q_DESC_MODE_8822B) & BIT_MASK_HI2Q_DESC_MODE_8822B)

+#define BIT_GET_HI2Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI2Q_DESC_MODE_8822B) & BIT_MASK_HI2Q_DESC_MODE_8822B)
+
 
 
 #define BIT_SHIFT_HI2Q_DESC_NUM_8822B 0
 #define BIT_MASK_HI2Q_DESC_NUM_8822B 0xfff
 #define BIT_HI2Q_DESC_NUM_8822B(x) (((x) & BIT_MASK_HI2Q_DESC_NUM_8822B) << BIT_SHIFT_HI2Q_DESC_NUM_8822B)
-#define BIT_GET_HI2Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI2Q_DESC_NUM_8822B) & BIT_MASK_HI2Q_DESC_NUM_8822B)

+#define BIT_GET_HI2Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI2Q_DESC_NUM_8822B) & BIT_MASK_HI2Q_DESC_NUM_8822B)
+
 
 
 /* 2 REG_HI3Q_TXBD_NUM_8822B */
@@ -4135,13 +4517,15 @@
 #define BIT_SHIFT_HI3Q_DESC_MODE_8822B 12
 #define BIT_MASK_HI3Q_DESC_MODE_8822B 0x3
 #define BIT_HI3Q_DESC_MODE_8822B(x) (((x) & BIT_MASK_HI3Q_DESC_MODE_8822B) << BIT_SHIFT_HI3Q_DESC_MODE_8822B)
-#define BIT_GET_HI3Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI3Q_DESC_MODE_8822B) & BIT_MASK_HI3Q_DESC_MODE_8822B)

+#define BIT_GET_HI3Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI3Q_DESC_MODE_8822B) & BIT_MASK_HI3Q_DESC_MODE_8822B)
+
 
 
 #define BIT_SHIFT_HI3Q_DESC_NUM_8822B 0
 #define BIT_MASK_HI3Q_DESC_NUM_8822B 0xfff
 #define BIT_HI3Q_DESC_NUM_8822B(x) (((x) & BIT_MASK_HI3Q_DESC_NUM_8822B) << BIT_SHIFT_HI3Q_DESC_NUM_8822B)
-#define BIT_GET_HI3Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI3Q_DESC_NUM_8822B) & BIT_MASK_HI3Q_DESC_NUM_8822B)

+#define BIT_GET_HI3Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI3Q_DESC_NUM_8822B) & BIT_MASK_HI3Q_DESC_NUM_8822B)
+
 
 
 /* 2 REG_HI4Q_TXBD_NUM_8822B */
@@ -4150,13 +4534,15 @@
 #define BIT_SHIFT_HI4Q_DESC_MODE_8822B 12
 #define BIT_MASK_HI4Q_DESC_MODE_8822B 0x3
 #define BIT_HI4Q_DESC_MODE_8822B(x) (((x) & BIT_MASK_HI4Q_DESC_MODE_8822B) << BIT_SHIFT_HI4Q_DESC_MODE_8822B)
-#define BIT_GET_HI4Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI4Q_DESC_MODE_8822B) & BIT_MASK_HI4Q_DESC_MODE_8822B)

+#define BIT_GET_HI4Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI4Q_DESC_MODE_8822B) & BIT_MASK_HI4Q_DESC_MODE_8822B)
+
 
 
 #define BIT_SHIFT_HI4Q_DESC_NUM_8822B 0
 #define BIT_MASK_HI4Q_DESC_NUM_8822B 0xfff
 #define BIT_HI4Q_DESC_NUM_8822B(x) (((x) & BIT_MASK_HI4Q_DESC_NUM_8822B) << BIT_SHIFT_HI4Q_DESC_NUM_8822B)
-#define BIT_GET_HI4Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI4Q_DESC_NUM_8822B) & BIT_MASK_HI4Q_DESC_NUM_8822B)

+#define BIT_GET_HI4Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI4Q_DESC_NUM_8822B) & BIT_MASK_HI4Q_DESC_NUM_8822B)
+
 
 
 /* 2 REG_HI5Q_TXBD_NUM_8822B */
@@ -4165,13 +4551,15 @@
 #define BIT_SHIFT_HI5Q_DESC_MODE_8822B 12
 #define BIT_MASK_HI5Q_DESC_MODE_8822B 0x3
 #define BIT_HI5Q_DESC_MODE_8822B(x) (((x) & BIT_MASK_HI5Q_DESC_MODE_8822B) << BIT_SHIFT_HI5Q_DESC_MODE_8822B)
-#define BIT_GET_HI5Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI5Q_DESC_MODE_8822B) & BIT_MASK_HI5Q_DESC_MODE_8822B)

+#define BIT_GET_HI5Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI5Q_DESC_MODE_8822B) & BIT_MASK_HI5Q_DESC_MODE_8822B)
+
 
 
 #define BIT_SHIFT_HI5Q_DESC_NUM_8822B 0
 #define BIT_MASK_HI5Q_DESC_NUM_8822B 0xfff
 #define BIT_HI5Q_DESC_NUM_8822B(x) (((x) & BIT_MASK_HI5Q_DESC_NUM_8822B) << BIT_SHIFT_HI5Q_DESC_NUM_8822B)
-#define BIT_GET_HI5Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI5Q_DESC_NUM_8822B) & BIT_MASK_HI5Q_DESC_NUM_8822B)

+#define BIT_GET_HI5Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI5Q_DESC_NUM_8822B) & BIT_MASK_HI5Q_DESC_NUM_8822B)
+
 
 
 /* 2 REG_HI6Q_TXBD_NUM_8822B */
@@ -4180,13 +4568,15 @@
 #define BIT_SHIFT_HI6Q_DESC_MODE_8822B 12
 #define BIT_MASK_HI6Q_DESC_MODE_8822B 0x3
 #define BIT_HI6Q_DESC_MODE_8822B(x) (((x) & BIT_MASK_HI6Q_DESC_MODE_8822B) << BIT_SHIFT_HI6Q_DESC_MODE_8822B)
-#define BIT_GET_HI6Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI6Q_DESC_MODE_8822B) & BIT_MASK_HI6Q_DESC_MODE_8822B)

+#define BIT_GET_HI6Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI6Q_DESC_MODE_8822B) & BIT_MASK_HI6Q_DESC_MODE_8822B)
+
 
 
 #define BIT_SHIFT_HI6Q_DESC_NUM_8822B 0
 #define BIT_MASK_HI6Q_DESC_NUM_8822B 0xfff
 #define BIT_HI6Q_DESC_NUM_8822B(x) (((x) & BIT_MASK_HI6Q_DESC_NUM_8822B) << BIT_SHIFT_HI6Q_DESC_NUM_8822B)
-#define BIT_GET_HI6Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI6Q_DESC_NUM_8822B) & BIT_MASK_HI6Q_DESC_NUM_8822B)

+#define BIT_GET_HI6Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI6Q_DESC_NUM_8822B) & BIT_MASK_HI6Q_DESC_NUM_8822B)
+
 
 
 /* 2 REG_HI7Q_TXBD_NUM_8822B */
@@ -4195,13 +4585,15 @@
 #define BIT_SHIFT_HI7Q_DESC_MODE_8822B 12
 #define BIT_MASK_HI7Q_DESC_MODE_8822B 0x3
 #define BIT_HI7Q_DESC_MODE_8822B(x) (((x) & BIT_MASK_HI7Q_DESC_MODE_8822B) << BIT_SHIFT_HI7Q_DESC_MODE_8822B)
-#define BIT_GET_HI7Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI7Q_DESC_MODE_8822B) & BIT_MASK_HI7Q_DESC_MODE_8822B)

+#define BIT_GET_HI7Q_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_HI7Q_DESC_MODE_8822B) & BIT_MASK_HI7Q_DESC_MODE_8822B)
+
 
 
 #define BIT_SHIFT_HI7Q_DESC_NUM_8822B 0
 #define BIT_MASK_HI7Q_DESC_NUM_8822B 0xfff
 #define BIT_HI7Q_DESC_NUM_8822B(x) (((x) & BIT_MASK_HI7Q_DESC_NUM_8822B) << BIT_SHIFT_HI7Q_DESC_NUM_8822B)
-#define BIT_GET_HI7Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI7Q_DESC_NUM_8822B) & BIT_MASK_HI7Q_DESC_NUM_8822B)

+#define BIT_GET_HI7Q_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_HI7Q_DESC_NUM_8822B) & BIT_MASK_HI7Q_DESC_NUM_8822B)
+
 
 
 /* 2 REG_TSFTIMER_HCI_8822B */
@@ -4209,13 +4601,15 @@
 #define BIT_SHIFT_TSFT2_HCI_8822B 16
 #define BIT_MASK_TSFT2_HCI_8822B 0xffff
 #define BIT_TSFT2_HCI_8822B(x) (((x) & BIT_MASK_TSFT2_HCI_8822B) << BIT_SHIFT_TSFT2_HCI_8822B)
-#define BIT_GET_TSFT2_HCI_8822B(x) (((x) >> BIT_SHIFT_TSFT2_HCI_8822B) & BIT_MASK_TSFT2_HCI_8822B)

+#define BIT_GET_TSFT2_HCI_8822B(x) (((x) >> BIT_SHIFT_TSFT2_HCI_8822B) & BIT_MASK_TSFT2_HCI_8822B)
+
 
 
 #define BIT_SHIFT_TSFT1_HCI_8822B 0
 #define BIT_MASK_TSFT1_HCI_8822B 0xffff
 #define BIT_TSFT1_HCI_8822B(x) (((x) & BIT_MASK_TSFT1_HCI_8822B) << BIT_SHIFT_TSFT1_HCI_8822B)
-#define BIT_GET_TSFT1_HCI_8822B(x) (((x) >> BIT_SHIFT_TSFT1_HCI_8822B) & BIT_MASK_TSFT1_HCI_8822B)

+#define BIT_GET_TSFT1_HCI_8822B(x) (((x) >> BIT_SHIFT_TSFT1_HCI_8822B) & BIT_MASK_TSFT1_HCI_8822B)
+
 
 
 /* 2 REG_BD_RWPTR_CLR_8822B */
@@ -4253,13 +4647,15 @@
 #define BIT_SHIFT_VOQ_HW_IDX_8822B 16
 #define BIT_MASK_VOQ_HW_IDX_8822B 0xfff
 #define BIT_VOQ_HW_IDX_8822B(x) (((x) & BIT_MASK_VOQ_HW_IDX_8822B) << BIT_SHIFT_VOQ_HW_IDX_8822B)
-#define BIT_GET_VOQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_VOQ_HW_IDX_8822B) & BIT_MASK_VOQ_HW_IDX_8822B)

+#define BIT_GET_VOQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_VOQ_HW_IDX_8822B) & BIT_MASK_VOQ_HW_IDX_8822B)
+
 
 
 #define BIT_SHIFT_VOQ_HOST_IDX_8822B 0
 #define BIT_MASK_VOQ_HOST_IDX_8822B 0xfff
 #define BIT_VOQ_HOST_IDX_8822B(x) (((x) & BIT_MASK_VOQ_HOST_IDX_8822B) << BIT_SHIFT_VOQ_HOST_IDX_8822B)
-#define BIT_GET_VOQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_VOQ_HOST_IDX_8822B) & BIT_MASK_VOQ_HOST_IDX_8822B)

+#define BIT_GET_VOQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_VOQ_HOST_IDX_8822B) & BIT_MASK_VOQ_HOST_IDX_8822B)
+
 
 
 /* 2 REG_VIQ_TXBD_IDX_8822B */
@@ -4267,13 +4663,15 @@
 #define BIT_SHIFT_VIQ_HW_IDX_8822B 16
 #define BIT_MASK_VIQ_HW_IDX_8822B 0xfff
 #define BIT_VIQ_HW_IDX_8822B(x) (((x) & BIT_MASK_VIQ_HW_IDX_8822B) << BIT_SHIFT_VIQ_HW_IDX_8822B)
-#define BIT_GET_VIQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_VIQ_HW_IDX_8822B) & BIT_MASK_VIQ_HW_IDX_8822B)

+#define BIT_GET_VIQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_VIQ_HW_IDX_8822B) & BIT_MASK_VIQ_HW_IDX_8822B)
+
 
 
 #define BIT_SHIFT_VIQ_HOST_IDX_8822B 0
 #define BIT_MASK_VIQ_HOST_IDX_8822B 0xfff
 #define BIT_VIQ_HOST_IDX_8822B(x) (((x) & BIT_MASK_VIQ_HOST_IDX_8822B) << BIT_SHIFT_VIQ_HOST_IDX_8822B)
-#define BIT_GET_VIQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_VIQ_HOST_IDX_8822B) & BIT_MASK_VIQ_HOST_IDX_8822B)

+#define BIT_GET_VIQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_VIQ_HOST_IDX_8822B) & BIT_MASK_VIQ_HOST_IDX_8822B)
+
 
 
 /* 2 REG_BEQ_TXBD_IDX_8822B */
@@ -4281,13 +4679,15 @@
 #define BIT_SHIFT_BEQ_HW_IDX_8822B 16
 #define BIT_MASK_BEQ_HW_IDX_8822B 0xfff
 #define BIT_BEQ_HW_IDX_8822B(x) (((x) & BIT_MASK_BEQ_HW_IDX_8822B) << BIT_SHIFT_BEQ_HW_IDX_8822B)
-#define BIT_GET_BEQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_BEQ_HW_IDX_8822B) & BIT_MASK_BEQ_HW_IDX_8822B)

+#define BIT_GET_BEQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_BEQ_HW_IDX_8822B) & BIT_MASK_BEQ_HW_IDX_8822B)
+
 
 
 #define BIT_SHIFT_BEQ_HOST_IDX_8822B 0
 #define BIT_MASK_BEQ_HOST_IDX_8822B 0xfff
 #define BIT_BEQ_HOST_IDX_8822B(x) (((x) & BIT_MASK_BEQ_HOST_IDX_8822B) << BIT_SHIFT_BEQ_HOST_IDX_8822B)
-#define BIT_GET_BEQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_BEQ_HOST_IDX_8822B) & BIT_MASK_BEQ_HOST_IDX_8822B)

+#define BIT_GET_BEQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_BEQ_HOST_IDX_8822B) & BIT_MASK_BEQ_HOST_IDX_8822B)
+
 
 
 /* 2 REG_BKQ_TXBD_IDX_8822B */
@@ -4295,13 +4695,15 @@
 #define BIT_SHIFT_BKQ_HW_IDX_8822B 16
 #define BIT_MASK_BKQ_HW_IDX_8822B 0xfff
 #define BIT_BKQ_HW_IDX_8822B(x) (((x) & BIT_MASK_BKQ_HW_IDX_8822B) << BIT_SHIFT_BKQ_HW_IDX_8822B)
-#define BIT_GET_BKQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_BKQ_HW_IDX_8822B) & BIT_MASK_BKQ_HW_IDX_8822B)

+#define BIT_GET_BKQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_BKQ_HW_IDX_8822B) & BIT_MASK_BKQ_HW_IDX_8822B)
+
 
 
 #define BIT_SHIFT_BKQ_HOST_IDX_8822B 0
 #define BIT_MASK_BKQ_HOST_IDX_8822B 0xfff
 #define BIT_BKQ_HOST_IDX_8822B(x) (((x) & BIT_MASK_BKQ_HOST_IDX_8822B) << BIT_SHIFT_BKQ_HOST_IDX_8822B)
-#define BIT_GET_BKQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_BKQ_HOST_IDX_8822B) & BIT_MASK_BKQ_HOST_IDX_8822B)

+#define BIT_GET_BKQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_BKQ_HOST_IDX_8822B) & BIT_MASK_BKQ_HOST_IDX_8822B)
+
 
 
 /* 2 REG_MGQ_TXBD_IDX_8822B */
@@ -4309,13 +4711,15 @@
 #define BIT_SHIFT_MGQ_HW_IDX_8822B 16
 #define BIT_MASK_MGQ_HW_IDX_8822B 0xfff
 #define BIT_MGQ_HW_IDX_8822B(x) (((x) & BIT_MASK_MGQ_HW_IDX_8822B) << BIT_SHIFT_MGQ_HW_IDX_8822B)
-#define BIT_GET_MGQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_MGQ_HW_IDX_8822B) & BIT_MASK_MGQ_HW_IDX_8822B)

+#define BIT_GET_MGQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_MGQ_HW_IDX_8822B) & BIT_MASK_MGQ_HW_IDX_8822B)
+
 
 
 #define BIT_SHIFT_MGQ_HOST_IDX_8822B 0
 #define BIT_MASK_MGQ_HOST_IDX_8822B 0xfff
 #define BIT_MGQ_HOST_IDX_8822B(x) (((x) & BIT_MASK_MGQ_HOST_IDX_8822B) << BIT_SHIFT_MGQ_HOST_IDX_8822B)
-#define BIT_GET_MGQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_MGQ_HOST_IDX_8822B) & BIT_MASK_MGQ_HOST_IDX_8822B)

+#define BIT_GET_MGQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_MGQ_HOST_IDX_8822B) & BIT_MASK_MGQ_HOST_IDX_8822B)
+
 
 
 /* 2 REG_RXQ_RXBD_IDX_8822B */
@@ -4323,13 +4727,15 @@
 #define BIT_SHIFT_RXQ_HW_IDX_8822B 16
 #define BIT_MASK_RXQ_HW_IDX_8822B 0xfff
 #define BIT_RXQ_HW_IDX_8822B(x) (((x) & BIT_MASK_RXQ_HW_IDX_8822B) << BIT_SHIFT_RXQ_HW_IDX_8822B)
-#define BIT_GET_RXQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_RXQ_HW_IDX_8822B) & BIT_MASK_RXQ_HW_IDX_8822B)

+#define BIT_GET_RXQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_RXQ_HW_IDX_8822B) & BIT_MASK_RXQ_HW_IDX_8822B)
+
 
 
 #define BIT_SHIFT_RXQ_HOST_IDX_8822B 0
 #define BIT_MASK_RXQ_HOST_IDX_8822B 0xfff
 #define BIT_RXQ_HOST_IDX_8822B(x) (((x) & BIT_MASK_RXQ_HOST_IDX_8822B) << BIT_SHIFT_RXQ_HOST_IDX_8822B)
-#define BIT_GET_RXQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_RXQ_HOST_IDX_8822B) & BIT_MASK_RXQ_HOST_IDX_8822B)

+#define BIT_GET_RXQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_RXQ_HOST_IDX_8822B) & BIT_MASK_RXQ_HOST_IDX_8822B)
+
 
 
 /* 2 REG_HI0Q_TXBD_IDX_8822B */
@@ -4337,13 +4743,15 @@
 #define BIT_SHIFT_HI0Q_HW_IDX_8822B 16
 #define BIT_MASK_HI0Q_HW_IDX_8822B 0xfff
 #define BIT_HI0Q_HW_IDX_8822B(x) (((x) & BIT_MASK_HI0Q_HW_IDX_8822B) << BIT_SHIFT_HI0Q_HW_IDX_8822B)
-#define BIT_GET_HI0Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI0Q_HW_IDX_8822B) & BIT_MASK_HI0Q_HW_IDX_8822B)

+#define BIT_GET_HI0Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI0Q_HW_IDX_8822B) & BIT_MASK_HI0Q_HW_IDX_8822B)
+
 
 
 #define BIT_SHIFT_HI0Q_HOST_IDX_8822B 0
 #define BIT_MASK_HI0Q_HOST_IDX_8822B 0xfff
 #define BIT_HI0Q_HOST_IDX_8822B(x) (((x) & BIT_MASK_HI0Q_HOST_IDX_8822B) << BIT_SHIFT_HI0Q_HOST_IDX_8822B)
-#define BIT_GET_HI0Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI0Q_HOST_IDX_8822B) & BIT_MASK_HI0Q_HOST_IDX_8822B)

+#define BIT_GET_HI0Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI0Q_HOST_IDX_8822B) & BIT_MASK_HI0Q_HOST_IDX_8822B)
+
 
 
 /* 2 REG_HI1Q_TXBD_IDX_8822B */
@@ -4351,13 +4759,15 @@
 #define BIT_SHIFT_HI1Q_HW_IDX_8822B 16
 #define BIT_MASK_HI1Q_HW_IDX_8822B 0xfff
 #define BIT_HI1Q_HW_IDX_8822B(x) (((x) & BIT_MASK_HI1Q_HW_IDX_8822B) << BIT_SHIFT_HI1Q_HW_IDX_8822B)
-#define BIT_GET_HI1Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI1Q_HW_IDX_8822B) & BIT_MASK_HI1Q_HW_IDX_8822B)

+#define BIT_GET_HI1Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI1Q_HW_IDX_8822B) & BIT_MASK_HI1Q_HW_IDX_8822B)
+
 
 
 #define BIT_SHIFT_HI1Q_HOST_IDX_8822B 0
 #define BIT_MASK_HI1Q_HOST_IDX_8822B 0xfff
 #define BIT_HI1Q_HOST_IDX_8822B(x) (((x) & BIT_MASK_HI1Q_HOST_IDX_8822B) << BIT_SHIFT_HI1Q_HOST_IDX_8822B)
-#define BIT_GET_HI1Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI1Q_HOST_IDX_8822B) & BIT_MASK_HI1Q_HOST_IDX_8822B)

+#define BIT_GET_HI1Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI1Q_HOST_IDX_8822B) & BIT_MASK_HI1Q_HOST_IDX_8822B)
+
 
 
 /* 2 REG_HI2Q_TXBD_IDX_8822B */
@@ -4365,13 +4775,15 @@
 #define BIT_SHIFT_HI2Q_HW_IDX_8822B 16
 #define BIT_MASK_HI2Q_HW_IDX_8822B 0xfff
 #define BIT_HI2Q_HW_IDX_8822B(x) (((x) & BIT_MASK_HI2Q_HW_IDX_8822B) << BIT_SHIFT_HI2Q_HW_IDX_8822B)
-#define BIT_GET_HI2Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI2Q_HW_IDX_8822B) & BIT_MASK_HI2Q_HW_IDX_8822B)

+#define BIT_GET_HI2Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI2Q_HW_IDX_8822B) & BIT_MASK_HI2Q_HW_IDX_8822B)
+
 
 
 #define BIT_SHIFT_HI2Q_HOST_IDX_8822B 0
 #define BIT_MASK_HI2Q_HOST_IDX_8822B 0xfff
 #define BIT_HI2Q_HOST_IDX_8822B(x) (((x) & BIT_MASK_HI2Q_HOST_IDX_8822B) << BIT_SHIFT_HI2Q_HOST_IDX_8822B)
-#define BIT_GET_HI2Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI2Q_HOST_IDX_8822B) & BIT_MASK_HI2Q_HOST_IDX_8822B)

+#define BIT_GET_HI2Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI2Q_HOST_IDX_8822B) & BIT_MASK_HI2Q_HOST_IDX_8822B)
+
 
 
 /* 2 REG_HI3Q_TXBD_IDX_8822B */
@@ -4379,13 +4791,15 @@
 #define BIT_SHIFT_HI3Q_HW_IDX_8822B 16
 #define BIT_MASK_HI3Q_HW_IDX_8822B 0xfff
 #define BIT_HI3Q_HW_IDX_8822B(x) (((x) & BIT_MASK_HI3Q_HW_IDX_8822B) << BIT_SHIFT_HI3Q_HW_IDX_8822B)
-#define BIT_GET_HI3Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI3Q_HW_IDX_8822B) & BIT_MASK_HI3Q_HW_IDX_8822B)

+#define BIT_GET_HI3Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI3Q_HW_IDX_8822B) & BIT_MASK_HI3Q_HW_IDX_8822B)
+
 
 
 #define BIT_SHIFT_HI3Q_HOST_IDX_8822B 0
 #define BIT_MASK_HI3Q_HOST_IDX_8822B 0xfff
 #define BIT_HI3Q_HOST_IDX_8822B(x) (((x) & BIT_MASK_HI3Q_HOST_IDX_8822B) << BIT_SHIFT_HI3Q_HOST_IDX_8822B)
-#define BIT_GET_HI3Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI3Q_HOST_IDX_8822B) & BIT_MASK_HI3Q_HOST_IDX_8822B)

+#define BIT_GET_HI3Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI3Q_HOST_IDX_8822B) & BIT_MASK_HI3Q_HOST_IDX_8822B)
+
 
 
 /* 2 REG_HI4Q_TXBD_IDX_8822B */
@@ -4393,13 +4807,15 @@
 #define BIT_SHIFT_HI4Q_HW_IDX_8822B 16
 #define BIT_MASK_HI4Q_HW_IDX_8822B 0xfff
 #define BIT_HI4Q_HW_IDX_8822B(x) (((x) & BIT_MASK_HI4Q_HW_IDX_8822B) << BIT_SHIFT_HI4Q_HW_IDX_8822B)
-#define BIT_GET_HI4Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI4Q_HW_IDX_8822B) & BIT_MASK_HI4Q_HW_IDX_8822B)

+#define BIT_GET_HI4Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI4Q_HW_IDX_8822B) & BIT_MASK_HI4Q_HW_IDX_8822B)
+
 
 
 #define BIT_SHIFT_HI4Q_HOST_IDX_8822B 0
 #define BIT_MASK_HI4Q_HOST_IDX_8822B 0xfff
 #define BIT_HI4Q_HOST_IDX_8822B(x) (((x) & BIT_MASK_HI4Q_HOST_IDX_8822B) << BIT_SHIFT_HI4Q_HOST_IDX_8822B)
-#define BIT_GET_HI4Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI4Q_HOST_IDX_8822B) & BIT_MASK_HI4Q_HOST_IDX_8822B)

+#define BIT_GET_HI4Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI4Q_HOST_IDX_8822B) & BIT_MASK_HI4Q_HOST_IDX_8822B)
+
 
 
 /* 2 REG_HI5Q_TXBD_IDX_8822B */
@@ -4407,13 +4823,15 @@
 #define BIT_SHIFT_HI5Q_HW_IDX_8822B 16
 #define BIT_MASK_HI5Q_HW_IDX_8822B 0xfff
 #define BIT_HI5Q_HW_IDX_8822B(x) (((x) & BIT_MASK_HI5Q_HW_IDX_8822B) << BIT_SHIFT_HI5Q_HW_IDX_8822B)
-#define BIT_GET_HI5Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI5Q_HW_IDX_8822B) & BIT_MASK_HI5Q_HW_IDX_8822B)

+#define BIT_GET_HI5Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI5Q_HW_IDX_8822B) & BIT_MASK_HI5Q_HW_IDX_8822B)
+
 
 
 #define BIT_SHIFT_HI5Q_HOST_IDX_8822B 0
 #define BIT_MASK_HI5Q_HOST_IDX_8822B 0xfff
 #define BIT_HI5Q_HOST_IDX_8822B(x) (((x) & BIT_MASK_HI5Q_HOST_IDX_8822B) << BIT_SHIFT_HI5Q_HOST_IDX_8822B)
-#define BIT_GET_HI5Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI5Q_HOST_IDX_8822B) & BIT_MASK_HI5Q_HOST_IDX_8822B)

+#define BIT_GET_HI5Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI5Q_HOST_IDX_8822B) & BIT_MASK_HI5Q_HOST_IDX_8822B)
+
 
 
 /* 2 REG_HI6Q_TXBD_IDX_8822B */
@@ -4421,13 +4839,15 @@
 #define BIT_SHIFT_HI6Q_HW_IDX_8822B 16
 #define BIT_MASK_HI6Q_HW_IDX_8822B 0xfff
 #define BIT_HI6Q_HW_IDX_8822B(x) (((x) & BIT_MASK_HI6Q_HW_IDX_8822B) << BIT_SHIFT_HI6Q_HW_IDX_8822B)
-#define BIT_GET_HI6Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI6Q_HW_IDX_8822B) & BIT_MASK_HI6Q_HW_IDX_8822B)

+#define BIT_GET_HI6Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI6Q_HW_IDX_8822B) & BIT_MASK_HI6Q_HW_IDX_8822B)
+
 
 
 #define BIT_SHIFT_HI6Q_HOST_IDX_8822B 0
 #define BIT_MASK_HI6Q_HOST_IDX_8822B 0xfff
 #define BIT_HI6Q_HOST_IDX_8822B(x) (((x) & BIT_MASK_HI6Q_HOST_IDX_8822B) << BIT_SHIFT_HI6Q_HOST_IDX_8822B)
-#define BIT_GET_HI6Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI6Q_HOST_IDX_8822B) & BIT_MASK_HI6Q_HOST_IDX_8822B)

+#define BIT_GET_HI6Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI6Q_HOST_IDX_8822B) & BIT_MASK_HI6Q_HOST_IDX_8822B)
+
 
 
 /* 2 REG_HI7Q_TXBD_IDX_8822B */
@@ -4435,13 +4855,15 @@
 #define BIT_SHIFT_HI7Q_HW_IDX_8822B 16
 #define BIT_MASK_HI7Q_HW_IDX_8822B 0xfff
 #define BIT_HI7Q_HW_IDX_8822B(x) (((x) & BIT_MASK_HI7Q_HW_IDX_8822B) << BIT_SHIFT_HI7Q_HW_IDX_8822B)
-#define BIT_GET_HI7Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI7Q_HW_IDX_8822B) & BIT_MASK_HI7Q_HW_IDX_8822B)

+#define BIT_GET_HI7Q_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_HI7Q_HW_IDX_8822B) & BIT_MASK_HI7Q_HW_IDX_8822B)
+
 
 
 #define BIT_SHIFT_HI7Q_HOST_IDX_8822B 0
 #define BIT_MASK_HI7Q_HOST_IDX_8822B 0xfff
 #define BIT_HI7Q_HOST_IDX_8822B(x) (((x) & BIT_MASK_HI7Q_HOST_IDX_8822B) << BIT_SHIFT_HI7Q_HOST_IDX_8822B)
-#define BIT_GET_HI7Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI7Q_HOST_IDX_8822B) & BIT_MASK_HI7Q_HOST_IDX_8822B)

+#define BIT_GET_HI7Q_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_HI7Q_HOST_IDX_8822B) & BIT_MASK_HI7Q_HOST_IDX_8822B)
+
 
 
 /* 2 REG_DBG_SEL_V1_8822B */
@@ -4449,7 +4871,8 @@
 #define BIT_SHIFT_DBG_SEL_8822B 0
 #define BIT_MASK_DBG_SEL_8822B 0xff
 #define BIT_DBG_SEL_8822B(x) (((x) & BIT_MASK_DBG_SEL_8822B) << BIT_SHIFT_DBG_SEL_8822B)
-#define BIT_GET_DBG_SEL_8822B(x) (((x) >> BIT_SHIFT_DBG_SEL_8822B) & BIT_MASK_DBG_SEL_8822B)

+#define BIT_GET_DBG_SEL_8822B(x) (((x) >> BIT_SHIFT_DBG_SEL_8822B) & BIT_MASK_DBG_SEL_8822B)
+
 
 
 /* 2 REG_PCIE_HRPWM1_V1_8822B */
@@ -4457,7 +4880,8 @@
 #define BIT_SHIFT_PCIE_HRPWM_8822B 0
 #define BIT_MASK_PCIE_HRPWM_8822B 0xff
 #define BIT_PCIE_HRPWM_8822B(x) (((x) & BIT_MASK_PCIE_HRPWM_8822B) << BIT_SHIFT_PCIE_HRPWM_8822B)
-#define BIT_GET_PCIE_HRPWM_8822B(x) (((x) >> BIT_SHIFT_PCIE_HRPWM_8822B) & BIT_MASK_PCIE_HRPWM_8822B)

+#define BIT_GET_PCIE_HRPWM_8822B(x) (((x) >> BIT_SHIFT_PCIE_HRPWM_8822B) & BIT_MASK_PCIE_HRPWM_8822B)
+
 
 
 /* 2 REG_PCIE_HCPWM1_V1_8822B */
@@ -4465,7 +4889,8 @@
 #define BIT_SHIFT_PCIE_HCPWM_8822B 0
 #define BIT_MASK_PCIE_HCPWM_8822B 0xff
 #define BIT_PCIE_HCPWM_8822B(x) (((x) & BIT_MASK_PCIE_HCPWM_8822B) << BIT_SHIFT_PCIE_HCPWM_8822B)
-#define BIT_GET_PCIE_HCPWM_8822B(x) (((x) >> BIT_SHIFT_PCIE_HCPWM_8822B) & BIT_MASK_PCIE_HCPWM_8822B)

+#define BIT_GET_PCIE_HCPWM_8822B(x) (((x) >> BIT_SHIFT_PCIE_HCPWM_8822B) & BIT_MASK_PCIE_HCPWM_8822B)
+
 
 
 /* 2 REG_PCIE_CTRL2_8822B */
@@ -4475,7 +4900,8 @@
 #define BIT_SHIFT_HPS_CLKR_PCIE_8822B 4
 #define BIT_MASK_HPS_CLKR_PCIE_8822B 0x3
 #define BIT_HPS_CLKR_PCIE_8822B(x) (((x) & BIT_MASK_HPS_CLKR_PCIE_8822B) << BIT_SHIFT_HPS_CLKR_PCIE_8822B)
-#define BIT_GET_HPS_CLKR_PCIE_8822B(x) (((x) >> BIT_SHIFT_HPS_CLKR_PCIE_8822B) & BIT_MASK_HPS_CLKR_PCIE_8822B)

+#define BIT_GET_HPS_CLKR_PCIE_8822B(x) (((x) >> BIT_SHIFT_HPS_CLKR_PCIE_8822B) & BIT_MASK_HPS_CLKR_PCIE_8822B)
+
 
 #define BIT_PCIE_INT_8822B BIT(3)
 #define BIT_TXFLAG_EXIT_L1_EN_8822B BIT(2)
@@ -4487,7 +4913,8 @@
 #define BIT_SHIFT_PCIE_HRPWM2_8822B 0
 #define BIT_MASK_PCIE_HRPWM2_8822B 0xffff
 #define BIT_PCIE_HRPWM2_8822B(x) (((x) & BIT_MASK_PCIE_HRPWM2_8822B) << BIT_SHIFT_PCIE_HRPWM2_8822B)
-#define BIT_GET_PCIE_HRPWM2_8822B(x) (((x) >> BIT_SHIFT_PCIE_HRPWM2_8822B) & BIT_MASK_PCIE_HRPWM2_8822B)

+#define BIT_GET_PCIE_HRPWM2_8822B(x) (((x) >> BIT_SHIFT_PCIE_HRPWM2_8822B) & BIT_MASK_PCIE_HRPWM2_8822B)
+
 
 
 /* 2 REG_PCIE_HCPWM2_V1_8822B */
@@ -4495,7 +4922,8 @@
 #define BIT_SHIFT_PCIE_HCPWM2_8822B 0
 #define BIT_MASK_PCIE_HCPWM2_8822B 0xffff
 #define BIT_PCIE_HCPWM2_8822B(x) (((x) & BIT_MASK_PCIE_HCPWM2_8822B) << BIT_SHIFT_PCIE_HCPWM2_8822B)
-#define BIT_GET_PCIE_HCPWM2_8822B(x) (((x) >> BIT_SHIFT_PCIE_HCPWM2_8822B) & BIT_MASK_PCIE_HCPWM2_8822B)

+#define BIT_GET_PCIE_HCPWM2_8822B(x) (((x) >> BIT_SHIFT_PCIE_HCPWM2_8822B) & BIT_MASK_PCIE_HCPWM2_8822B)
+
 
 
 /* 2 REG_PCIE_H2C_MSG_V1_8822B */
@@ -4503,7 +4931,8 @@
 #define BIT_SHIFT_DRV2FW_INFO_8822B 0
 #define BIT_MASK_DRV2FW_INFO_8822B 0xffffffffL
 #define BIT_DRV2FW_INFO_8822B(x) (((x) & BIT_MASK_DRV2FW_INFO_8822B) << BIT_SHIFT_DRV2FW_INFO_8822B)
-#define BIT_GET_DRV2FW_INFO_8822B(x) (((x) >> BIT_SHIFT_DRV2FW_INFO_8822B) & BIT_MASK_DRV2FW_INFO_8822B)

+#define BIT_GET_DRV2FW_INFO_8822B(x) (((x) >> BIT_SHIFT_DRV2FW_INFO_8822B) & BIT_MASK_DRV2FW_INFO_8822B)
+
 
 
 /* 2 REG_PCIE_C2H_MSG_V1_8822B */
@@ -4511,7 +4940,8 @@
 #define BIT_SHIFT_HCI_PCIE_C2H_MSG_8822B 0
 #define BIT_MASK_HCI_PCIE_C2H_MSG_8822B 0xffffffffL
 #define BIT_HCI_PCIE_C2H_MSG_8822B(x) (((x) & BIT_MASK_HCI_PCIE_C2H_MSG_8822B) << BIT_SHIFT_HCI_PCIE_C2H_MSG_8822B)
-#define BIT_GET_HCI_PCIE_C2H_MSG_8822B(x) (((x) >> BIT_SHIFT_HCI_PCIE_C2H_MSG_8822B) & BIT_MASK_HCI_PCIE_C2H_MSG_8822B)

+#define BIT_GET_HCI_PCIE_C2H_MSG_8822B(x) (((x) >> BIT_SHIFT_HCI_PCIE_C2H_MSG_8822B) & BIT_MASK_HCI_PCIE_C2H_MSG_8822B)
+
 
 
 /* 2 REG_DBI_WDATA_V1_8822B */
@@ -4519,7 +4949,8 @@
 #define BIT_SHIFT_DBI_WDATA_8822B 0
 #define BIT_MASK_DBI_WDATA_8822B 0xffffffffL
 #define BIT_DBI_WDATA_8822B(x) (((x) & BIT_MASK_DBI_WDATA_8822B) << BIT_SHIFT_DBI_WDATA_8822B)
-#define BIT_GET_DBI_WDATA_8822B(x) (((x) >> BIT_SHIFT_DBI_WDATA_8822B) & BIT_MASK_DBI_WDATA_8822B)

+#define BIT_GET_DBI_WDATA_8822B(x) (((x) >> BIT_SHIFT_DBI_WDATA_8822B) & BIT_MASK_DBI_WDATA_8822B)
+
 
 
 /* 2 REG_DBI_RDATA_V1_8822B */
@@ -4527,7 +4958,8 @@
 #define BIT_SHIFT_DBI_RDATA_8822B 0
 #define BIT_MASK_DBI_RDATA_8822B 0xffffffffL
 #define BIT_DBI_RDATA_8822B(x) (((x) & BIT_MASK_DBI_RDATA_8822B) << BIT_SHIFT_DBI_RDATA_8822B)
-#define BIT_GET_DBI_RDATA_8822B(x) (((x) >> BIT_SHIFT_DBI_RDATA_8822B) & BIT_MASK_DBI_RDATA_8822B)

+#define BIT_GET_DBI_RDATA_8822B(x) (((x) >> BIT_SHIFT_DBI_RDATA_8822B) & BIT_MASK_DBI_RDATA_8822B)
+
 
 
 /* 2 REG_DBI_FLAG_V1_8822B */
@@ -4540,13 +4972,15 @@
 #define BIT_SHIFT_DBI_WREN_8822B 12
 #define BIT_MASK_DBI_WREN_8822B 0xf
 #define BIT_DBI_WREN_8822B(x) (((x) & BIT_MASK_DBI_WREN_8822B) << BIT_SHIFT_DBI_WREN_8822B)
-#define BIT_GET_DBI_WREN_8822B(x) (((x) >> BIT_SHIFT_DBI_WREN_8822B) & BIT_MASK_DBI_WREN_8822B)

+#define BIT_GET_DBI_WREN_8822B(x) (((x) >> BIT_SHIFT_DBI_WREN_8822B) & BIT_MASK_DBI_WREN_8822B)
+
 
 
 #define BIT_SHIFT_DBI_ADDR_8822B 0
 #define BIT_MASK_DBI_ADDR_8822B 0xfff
 #define BIT_DBI_ADDR_8822B(x) (((x) & BIT_MASK_DBI_ADDR_8822B) << BIT_SHIFT_DBI_ADDR_8822B)
-#define BIT_GET_DBI_ADDR_8822B(x) (((x) >> BIT_SHIFT_DBI_ADDR_8822B) & BIT_MASK_DBI_ADDR_8822B)

+#define BIT_GET_DBI_ADDR_8822B(x) (((x) >> BIT_SHIFT_DBI_ADDR_8822B) & BIT_MASK_DBI_ADDR_8822B)
+
 
 
 /* 2 REG_MDIO_V1_8822B */
@@ -4554,13 +4988,15 @@
 #define BIT_SHIFT_MDIO_RDATA_8822B 16
 #define BIT_MASK_MDIO_RDATA_8822B 0xffff
 #define BIT_MDIO_RDATA_8822B(x) (((x) & BIT_MASK_MDIO_RDATA_8822B) << BIT_SHIFT_MDIO_RDATA_8822B)
-#define BIT_GET_MDIO_RDATA_8822B(x) (((x) >> BIT_SHIFT_MDIO_RDATA_8822B) & BIT_MASK_MDIO_RDATA_8822B)

+#define BIT_GET_MDIO_RDATA_8822B(x) (((x) >> BIT_SHIFT_MDIO_RDATA_8822B) & BIT_MASK_MDIO_RDATA_8822B)
+
 
 
 #define BIT_SHIFT_MDIO_WDATA_8822B 0
 #define BIT_MASK_MDIO_WDATA_8822B 0xffff
 #define BIT_MDIO_WDATA_8822B(x) (((x) & BIT_MASK_MDIO_WDATA_8822B) << BIT_SHIFT_MDIO_WDATA_8822B)
-#define BIT_GET_MDIO_WDATA_8822B(x) (((x) >> BIT_SHIFT_MDIO_WDATA_8822B) & BIT_MASK_MDIO_WDATA_8822B)

+#define BIT_GET_MDIO_WDATA_8822B(x) (((x) >> BIT_SHIFT_MDIO_WDATA_8822B) & BIT_MASK_MDIO_WDATA_8822B)
+
 
 
 /* 2 REG_PCIE_MIX_CFG_8822B */
@@ -4568,13 +5004,15 @@
 #define BIT_SHIFT_MDIO_PHY_ADDR_8822B 24
 #define BIT_MASK_MDIO_PHY_ADDR_8822B 0x1f
 #define BIT_MDIO_PHY_ADDR_8822B(x) (((x) & BIT_MASK_MDIO_PHY_ADDR_8822B) << BIT_SHIFT_MDIO_PHY_ADDR_8822B)
-#define BIT_GET_MDIO_PHY_ADDR_8822B(x) (((x) >> BIT_SHIFT_MDIO_PHY_ADDR_8822B) & BIT_MASK_MDIO_PHY_ADDR_8822B)

+#define BIT_GET_MDIO_PHY_ADDR_8822B(x) (((x) >> BIT_SHIFT_MDIO_PHY_ADDR_8822B) & BIT_MASK_MDIO_PHY_ADDR_8822B)
+
 
 
 #define BIT_SHIFT_WATCH_DOG_RECORD_V1_8822B 10
 #define BIT_MASK_WATCH_DOG_RECORD_V1_8822B 0x3fff
 #define BIT_WATCH_DOG_RECORD_V1_8822B(x) (((x) & BIT_MASK_WATCH_DOG_RECORD_V1_8822B) << BIT_SHIFT_WATCH_DOG_RECORD_V1_8822B)
-#define BIT_GET_WATCH_DOG_RECORD_V1_8822B(x) (((x) >> BIT_SHIFT_WATCH_DOG_RECORD_V1_8822B) & BIT_MASK_WATCH_DOG_RECORD_V1_8822B)

+#define BIT_GET_WATCH_DOG_RECORD_V1_8822B(x) (((x) >> BIT_SHIFT_WATCH_DOG_RECORD_V1_8822B) & BIT_MASK_WATCH_DOG_RECORD_V1_8822B)
+
 
 #define BIT_R_IO_TIMEOUT_FLAG_V1_8822B BIT(9)
 #define BIT_EN_WATCH_DOG_8822B BIT(8)
@@ -4585,7 +5023,8 @@
 #define BIT_SHIFT_MDIO_REG_ADDR_V1_8822B 0
 #define BIT_MASK_MDIO_REG_ADDR_V1_8822B 0x1f
 #define BIT_MDIO_REG_ADDR_V1_8822B(x) (((x) & BIT_MASK_MDIO_REG_ADDR_V1_8822B) << BIT_SHIFT_MDIO_REG_ADDR_V1_8822B)
-#define BIT_GET_MDIO_REG_ADDR_V1_8822B(x) (((x) >> BIT_SHIFT_MDIO_REG_ADDR_V1_8822B) & BIT_MASK_MDIO_REG_ADDR_V1_8822B)

+#define BIT_GET_MDIO_REG_ADDR_V1_8822B(x) (((x) >> BIT_SHIFT_MDIO_REG_ADDR_V1_8822B) & BIT_MASK_MDIO_REG_ADDR_V1_8822B)
+
 
 
 /* 2 REG_HCI_MIX_CFG_8822B */
@@ -4594,20 +5033,23 @@
 #define BIT_SHIFT_TXDMA_ERR_FLAG_8822B 16
 #define BIT_MASK_TXDMA_ERR_FLAG_8822B 0xf
 #define BIT_TXDMA_ERR_FLAG_8822B(x) (((x) & BIT_MASK_TXDMA_ERR_FLAG_8822B) << BIT_SHIFT_TXDMA_ERR_FLAG_8822B)
-#define BIT_GET_TXDMA_ERR_FLAG_8822B(x) (((x) >> BIT_SHIFT_TXDMA_ERR_FLAG_8822B) & BIT_MASK_TXDMA_ERR_FLAG_8822B)

+#define BIT_GET_TXDMA_ERR_FLAG_8822B(x) (((x) >> BIT_SHIFT_TXDMA_ERR_FLAG_8822B) & BIT_MASK_TXDMA_ERR_FLAG_8822B)
+
 
 
 #define BIT_SHIFT_EARLY_MODE_SEL_8822B 12
 #define BIT_MASK_EARLY_MODE_SEL_8822B 0xf
 #define BIT_EARLY_MODE_SEL_8822B(x) (((x) & BIT_MASK_EARLY_MODE_SEL_8822B) << BIT_SHIFT_EARLY_MODE_SEL_8822B)
-#define BIT_GET_EARLY_MODE_SEL_8822B(x) (((x) >> BIT_SHIFT_EARLY_MODE_SEL_8822B) & BIT_MASK_EARLY_MODE_SEL_8822B)

+#define BIT_GET_EARLY_MODE_SEL_8822B(x) (((x) >> BIT_SHIFT_EARLY_MODE_SEL_8822B) & BIT_MASK_EARLY_MODE_SEL_8822B)
+
 
 #define BIT_EPHY_RX50_EN_8822B BIT(11)
 
 #define BIT_SHIFT_MSI_TIMEOUT_ID_V1_8822B 8
 #define BIT_MASK_MSI_TIMEOUT_ID_V1_8822B 0x7
 #define BIT_MSI_TIMEOUT_ID_V1_8822B(x) (((x) & BIT_MASK_MSI_TIMEOUT_ID_V1_8822B) << BIT_SHIFT_MSI_TIMEOUT_ID_V1_8822B)
-#define BIT_GET_MSI_TIMEOUT_ID_V1_8822B(x) (((x) >> BIT_SHIFT_MSI_TIMEOUT_ID_V1_8822B) & BIT_MASK_MSI_TIMEOUT_ID_V1_8822B)

+#define BIT_GET_MSI_TIMEOUT_ID_V1_8822B(x) (((x) >> BIT_SHIFT_MSI_TIMEOUT_ID_V1_8822B) & BIT_MASK_MSI_TIMEOUT_ID_V1_8822B)
+
 
 #define BIT_RADDR_RD_8822B BIT(7)
 #define BIT_EN_MUL_TAG_8822B BIT(6)
@@ -4623,19 +5065,22 @@
 #define BIT_SHIFT_STC_INT_FLAG_8822B 16
 #define BIT_MASK_STC_INT_FLAG_8822B 0xff
 #define BIT_STC_INT_FLAG_8822B(x) (((x) & BIT_MASK_STC_INT_FLAG_8822B) << BIT_SHIFT_STC_INT_FLAG_8822B)
-#define BIT_GET_STC_INT_FLAG_8822B(x) (((x) >> BIT_SHIFT_STC_INT_FLAG_8822B) & BIT_MASK_STC_INT_FLAG_8822B)

+#define BIT_GET_STC_INT_FLAG_8822B(x) (((x) >> BIT_SHIFT_STC_INT_FLAG_8822B) & BIT_MASK_STC_INT_FLAG_8822B)
+
 
 
 #define BIT_SHIFT_STC_INT_IDX_8822B 8
 #define BIT_MASK_STC_INT_IDX_8822B 0x7
 #define BIT_STC_INT_IDX_8822B(x) (((x) & BIT_MASK_STC_INT_IDX_8822B) << BIT_SHIFT_STC_INT_IDX_8822B)
-#define BIT_GET_STC_INT_IDX_8822B(x) (((x) >> BIT_SHIFT_STC_INT_IDX_8822B) & BIT_MASK_STC_INT_IDX_8822B)

+#define BIT_GET_STC_INT_IDX_8822B(x) (((x) >> BIT_SHIFT_STC_INT_IDX_8822B) & BIT_MASK_STC_INT_IDX_8822B)
+
 
 
 #define BIT_SHIFT_STC_INT_REALTIME_CS_8822B 0
 #define BIT_MASK_STC_INT_REALTIME_CS_8822B 0x3f
 #define BIT_STC_INT_REALTIME_CS_8822B(x) (((x) & BIT_MASK_STC_INT_REALTIME_CS_8822B) << BIT_SHIFT_STC_INT_REALTIME_CS_8822B)
-#define BIT_GET_STC_INT_REALTIME_CS_8822B(x) (((x) >> BIT_SHIFT_STC_INT_REALTIME_CS_8822B) & BIT_MASK_STC_INT_REALTIME_CS_8822B)

+#define BIT_GET_STC_INT_REALTIME_CS_8822B(x) (((x) >> BIT_SHIFT_STC_INT_REALTIME_CS_8822B) & BIT_MASK_STC_INT_REALTIME_CS_8822B)
+
 
 
 /* 2 REG_ST_INT_CFG_8822B(PCIE STATE CHANGE INTERRUPT CONFIGURATION) */
@@ -4644,13 +5089,15 @@
 #define BIT_SHIFT_STC_INT_EXPECT_LS_8822B 8
 #define BIT_MASK_STC_INT_EXPECT_LS_8822B 0x3f
 #define BIT_STC_INT_EXPECT_LS_8822B(x) (((x) & BIT_MASK_STC_INT_EXPECT_LS_8822B) << BIT_SHIFT_STC_INT_EXPECT_LS_8822B)
-#define BIT_GET_STC_INT_EXPECT_LS_8822B(x) (((x) >> BIT_SHIFT_STC_INT_EXPECT_LS_8822B) & BIT_MASK_STC_INT_EXPECT_LS_8822B)

+#define BIT_GET_STC_INT_EXPECT_LS_8822B(x) (((x) >> BIT_SHIFT_STC_INT_EXPECT_LS_8822B) & BIT_MASK_STC_INT_EXPECT_LS_8822B)
+
 
 
 #define BIT_SHIFT_STC_INT_EXPECT_CS_8822B 0
 #define BIT_MASK_STC_INT_EXPECT_CS_8822B 0x3f
 #define BIT_STC_INT_EXPECT_CS_8822B(x) (((x) & BIT_MASK_STC_INT_EXPECT_CS_8822B) << BIT_SHIFT_STC_INT_EXPECT_CS_8822B)
-#define BIT_GET_STC_INT_EXPECT_CS_8822B(x) (((x) >> BIT_SHIFT_STC_INT_EXPECT_CS_8822B) & BIT_MASK_STC_INT_EXPECT_CS_8822B)

+#define BIT_GET_STC_INT_EXPECT_CS_8822B(x) (((x) >> BIT_SHIFT_STC_INT_EXPECT_CS_8822B) & BIT_MASK_STC_INT_EXPECT_CS_8822B)
+
 
 
 /* 2 REG_CMU_DLY_CTRL_8822B(PCIE PHY CLOCK MGT UNIT DELAY CONTROL ) */
@@ -4660,7 +5107,8 @@
 #define BIT_SHIFT_CMU_DLY_PRE_DIV_8822B 0
 #define BIT_MASK_CMU_DLY_PRE_DIV_8822B 0xff
 #define BIT_CMU_DLY_PRE_DIV_8822B(x) (((x) & BIT_MASK_CMU_DLY_PRE_DIV_8822B) << BIT_SHIFT_CMU_DLY_PRE_DIV_8822B)
-#define BIT_GET_CMU_DLY_PRE_DIV_8822B(x) (((x) >> BIT_SHIFT_CMU_DLY_PRE_DIV_8822B) & BIT_MASK_CMU_DLY_PRE_DIV_8822B)

+#define BIT_GET_CMU_DLY_PRE_DIV_8822B(x) (((x) >> BIT_SHIFT_CMU_DLY_PRE_DIV_8822B) & BIT_MASK_CMU_DLY_PRE_DIV_8822B)
+
 
 
 /* 2 REG_CMU_DLY_CFG_8822B(PCIE PHY CLOCK MGT UNIT DELAY CONFIGURATION ) */
@@ -4668,25 +5116,29 @@
 #define BIT_SHIFT_CMU_DLY_LTR_A2I_8822B 24
 #define BIT_MASK_CMU_DLY_LTR_A2I_8822B 0xff
 #define BIT_CMU_DLY_LTR_A2I_8822B(x) (((x) & BIT_MASK_CMU_DLY_LTR_A2I_8822B) << BIT_SHIFT_CMU_DLY_LTR_A2I_8822B)
-#define BIT_GET_CMU_DLY_LTR_A2I_8822B(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_A2I_8822B) & BIT_MASK_CMU_DLY_LTR_A2I_8822B)

+#define BIT_GET_CMU_DLY_LTR_A2I_8822B(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_A2I_8822B) & BIT_MASK_CMU_DLY_LTR_A2I_8822B)
+
 
 
 #define BIT_SHIFT_CMU_DLY_LTR_I2A_8822B 16
 #define BIT_MASK_CMU_DLY_LTR_I2A_8822B 0xff
 #define BIT_CMU_DLY_LTR_I2A_8822B(x) (((x) & BIT_MASK_CMU_DLY_LTR_I2A_8822B) << BIT_SHIFT_CMU_DLY_LTR_I2A_8822B)
-#define BIT_GET_CMU_DLY_LTR_I2A_8822B(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_I2A_8822B) & BIT_MASK_CMU_DLY_LTR_I2A_8822B)

+#define BIT_GET_CMU_DLY_LTR_I2A_8822B(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_I2A_8822B) & BIT_MASK_CMU_DLY_LTR_I2A_8822B)
+
 
 
 #define BIT_SHIFT_CMU_DLY_LTR_IDLE_8822B 8
 #define BIT_MASK_CMU_DLY_LTR_IDLE_8822B 0xff
 #define BIT_CMU_DLY_LTR_IDLE_8822B(x) (((x) & BIT_MASK_CMU_DLY_LTR_IDLE_8822B) << BIT_SHIFT_CMU_DLY_LTR_IDLE_8822B)
-#define BIT_GET_CMU_DLY_LTR_IDLE_8822B(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_IDLE_8822B) & BIT_MASK_CMU_DLY_LTR_IDLE_8822B)

+#define BIT_GET_CMU_DLY_LTR_IDLE_8822B(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_IDLE_8822B) & BIT_MASK_CMU_DLY_LTR_IDLE_8822B)
+
 
 
 #define BIT_SHIFT_CMU_DLY_LTR_ACT_8822B 0
 #define BIT_MASK_CMU_DLY_LTR_ACT_8822B 0xff
 #define BIT_CMU_DLY_LTR_ACT_8822B(x) (((x) & BIT_MASK_CMU_DLY_LTR_ACT_8822B) << BIT_SHIFT_CMU_DLY_LTR_ACT_8822B)
-#define BIT_GET_CMU_DLY_LTR_ACT_8822B(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_ACT_8822B) & BIT_MASK_CMU_DLY_LTR_ACT_8822B)

+#define BIT_GET_CMU_DLY_LTR_ACT_8822B(x) (((x) >> BIT_SHIFT_CMU_DLY_LTR_ACT_8822B) & BIT_MASK_CMU_DLY_LTR_ACT_8822B)
+
 
 
 /* 2 REG_H2CQ_TXBD_DESA_8822B */
@@ -4694,7 +5146,8 @@
 #define BIT_SHIFT_H2CQ_TXBD_DESA_8822B 0
 #define BIT_MASK_H2CQ_TXBD_DESA_8822B 0xffffffffffffffffL
 #define BIT_H2CQ_TXBD_DESA_8822B(x) (((x) & BIT_MASK_H2CQ_TXBD_DESA_8822B) << BIT_SHIFT_H2CQ_TXBD_DESA_8822B)
-#define BIT_GET_H2CQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_H2CQ_TXBD_DESA_8822B) & BIT_MASK_H2CQ_TXBD_DESA_8822B)

+#define BIT_GET_H2CQ_TXBD_DESA_8822B(x) (((x) >> BIT_SHIFT_H2CQ_TXBD_DESA_8822B) & BIT_MASK_H2CQ_TXBD_DESA_8822B)
+
 
 
 /* 2 REG_H2CQ_TXBD_NUM_8822B */
@@ -4703,13 +5156,15 @@
 #define BIT_SHIFT_H2CQ_DESC_MODE_8822B 12
 #define BIT_MASK_H2CQ_DESC_MODE_8822B 0x3
 #define BIT_H2CQ_DESC_MODE_8822B(x) (((x) & BIT_MASK_H2CQ_DESC_MODE_8822B) << BIT_SHIFT_H2CQ_DESC_MODE_8822B)
-#define BIT_GET_H2CQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_H2CQ_DESC_MODE_8822B) & BIT_MASK_H2CQ_DESC_MODE_8822B)

+#define BIT_GET_H2CQ_DESC_MODE_8822B(x) (((x) >> BIT_SHIFT_H2CQ_DESC_MODE_8822B) & BIT_MASK_H2CQ_DESC_MODE_8822B)
+
 
 
 #define BIT_SHIFT_H2CQ_DESC_NUM_8822B 0
 #define BIT_MASK_H2CQ_DESC_NUM_8822B 0xfff
 #define BIT_H2CQ_DESC_NUM_8822B(x) (((x) & BIT_MASK_H2CQ_DESC_NUM_8822B) << BIT_SHIFT_H2CQ_DESC_NUM_8822B)
-#define BIT_GET_H2CQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_H2CQ_DESC_NUM_8822B) & BIT_MASK_H2CQ_DESC_NUM_8822B)

+#define BIT_GET_H2CQ_DESC_NUM_8822B(x) (((x) >> BIT_SHIFT_H2CQ_DESC_NUM_8822B) & BIT_MASK_H2CQ_DESC_NUM_8822B)
+
 
 
 /* 2 REG_H2CQ_TXBD_IDX_8822B */
@@ -4717,13 +5172,15 @@
 #define BIT_SHIFT_H2CQ_HW_IDX_8822B 16
 #define BIT_MASK_H2CQ_HW_IDX_8822B 0xfff
 #define BIT_H2CQ_HW_IDX_8822B(x) (((x) & BIT_MASK_H2CQ_HW_IDX_8822B) << BIT_SHIFT_H2CQ_HW_IDX_8822B)
-#define BIT_GET_H2CQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_H2CQ_HW_IDX_8822B) & BIT_MASK_H2CQ_HW_IDX_8822B)

+#define BIT_GET_H2CQ_HW_IDX_8822B(x) (((x) >> BIT_SHIFT_H2CQ_HW_IDX_8822B) & BIT_MASK_H2CQ_HW_IDX_8822B)
+
 
 
 #define BIT_SHIFT_H2CQ_HOST_IDX_8822B 0
 #define BIT_MASK_H2CQ_HOST_IDX_8822B 0xfff
 #define BIT_H2CQ_HOST_IDX_8822B(x) (((x) & BIT_MASK_H2CQ_HOST_IDX_8822B) << BIT_SHIFT_H2CQ_HOST_IDX_8822B)
-#define BIT_GET_H2CQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_H2CQ_HOST_IDX_8822B) & BIT_MASK_H2CQ_HOST_IDX_8822B)

+#define BIT_GET_H2CQ_HOST_IDX_8822B(x) (((x) >> BIT_SHIFT_H2CQ_HOST_IDX_8822B) & BIT_MASK_H2CQ_HOST_IDX_8822B)
+
 
 
 /* 2 REG_H2CQ_CSR_8822B[31:0] (H2CQ CONTROL AND STATUS) */
@@ -4737,13 +5194,15 @@
 #define BIT_SHIFT_GEN1_GEN2_8822B 16
 #define BIT_MASK_GEN1_GEN2_8822B 0x3
 #define BIT_GEN1_GEN2_8822B(x) (((x) & BIT_MASK_GEN1_GEN2_8822B) << BIT_SHIFT_GEN1_GEN2_8822B)
-#define BIT_GET_GEN1_GEN2_8822B(x) (((x) >> BIT_SHIFT_GEN1_GEN2_8822B) & BIT_MASK_GEN1_GEN2_8822B)

+#define BIT_GET_GEN1_GEN2_8822B(x) (((x) >> BIT_SHIFT_GEN1_GEN2_8822B) & BIT_MASK_GEN1_GEN2_8822B)
+
 
 
 #define BIT_SHIFT_AUTO_HANG_RELEASE_8822B 0
 #define BIT_MASK_AUTO_HANG_RELEASE_8822B 0x7
 #define BIT_AUTO_HANG_RELEASE_8822B(x) (((x) & BIT_MASK_AUTO_HANG_RELEASE_8822B) << BIT_SHIFT_AUTO_HANG_RELEASE_8822B)
-#define BIT_GET_AUTO_HANG_RELEASE_8822B(x) (((x) >> BIT_SHIFT_AUTO_HANG_RELEASE_8822B) & BIT_MASK_AUTO_HANG_RELEASE_8822B)

+#define BIT_GET_AUTO_HANG_RELEASE_8822B(x) (((x) >> BIT_SHIFT_AUTO_HANG_RELEASE_8822B) & BIT_MASK_AUTO_HANG_RELEASE_8822B)
+
 
 
 /* 2 REG_OLD_DEHANG_8822B */
@@ -4754,26 +5213,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q0_V1_8822B 25
 #define BIT_MASK_QUEUEMACID_Q0_V1_8822B 0x7f
 #define BIT_QUEUEMACID_Q0_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_Q0_V1_8822B) << BIT_SHIFT_QUEUEMACID_Q0_V1_8822B)
-#define BIT_GET_QUEUEMACID_Q0_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q0_V1_8822B) & BIT_MASK_QUEUEMACID_Q0_V1_8822B)

+#define BIT_GET_QUEUEMACID_Q0_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q0_V1_8822B) & BIT_MASK_QUEUEMACID_Q0_V1_8822B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q0_V1_8822B 23
 #define BIT_MASK_QUEUEAC_Q0_V1_8822B 0x3
 #define BIT_QUEUEAC_Q0_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_Q0_V1_8822B) << BIT_SHIFT_QUEUEAC_Q0_V1_8822B)
-#define BIT_GET_QUEUEAC_Q0_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q0_V1_8822B) & BIT_MASK_QUEUEAC_Q0_V1_8822B)

+#define BIT_GET_QUEUEAC_Q0_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q0_V1_8822B) & BIT_MASK_QUEUEAC_Q0_V1_8822B)
+
 
 #define BIT_TIDEMPTY_Q0_V1_8822B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q0_V2_8822B 11
 #define BIT_MASK_TAIL_PKT_Q0_V2_8822B 0x7ff
 #define BIT_TAIL_PKT_Q0_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_Q0_V2_8822B) << BIT_SHIFT_TAIL_PKT_Q0_V2_8822B)
-#define BIT_GET_TAIL_PKT_Q0_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q0_V2_8822B) & BIT_MASK_TAIL_PKT_Q0_V2_8822B)

+#define BIT_GET_TAIL_PKT_Q0_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q0_V2_8822B) & BIT_MASK_TAIL_PKT_Q0_V2_8822B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q0_V1_8822B 0
 #define BIT_MASK_HEAD_PKT_Q0_V1_8822B 0x7ff
 #define BIT_HEAD_PKT_Q0_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_Q0_V1_8822B) << BIT_SHIFT_HEAD_PKT_Q0_V1_8822B)
-#define BIT_GET_HEAD_PKT_Q0_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q0_V1_8822B) & BIT_MASK_HEAD_PKT_Q0_V1_8822B)

+#define BIT_GET_HEAD_PKT_Q0_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q0_V1_8822B) & BIT_MASK_HEAD_PKT_Q0_V1_8822B)
+
 
 
 /* 2 REG_Q1_INFO_8822B */
@@ -4781,26 +5244,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q1_V1_8822B 25
 #define BIT_MASK_QUEUEMACID_Q1_V1_8822B 0x7f
 #define BIT_QUEUEMACID_Q1_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_Q1_V1_8822B) << BIT_SHIFT_QUEUEMACID_Q1_V1_8822B)
-#define BIT_GET_QUEUEMACID_Q1_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q1_V1_8822B) & BIT_MASK_QUEUEMACID_Q1_V1_8822B)

+#define BIT_GET_QUEUEMACID_Q1_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q1_V1_8822B) & BIT_MASK_QUEUEMACID_Q1_V1_8822B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q1_V1_8822B 23
 #define BIT_MASK_QUEUEAC_Q1_V1_8822B 0x3
 #define BIT_QUEUEAC_Q1_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_Q1_V1_8822B) << BIT_SHIFT_QUEUEAC_Q1_V1_8822B)
-#define BIT_GET_QUEUEAC_Q1_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q1_V1_8822B) & BIT_MASK_QUEUEAC_Q1_V1_8822B)

+#define BIT_GET_QUEUEAC_Q1_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q1_V1_8822B) & BIT_MASK_QUEUEAC_Q1_V1_8822B)
+
 
 #define BIT_TIDEMPTY_Q1_V1_8822B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q1_V2_8822B 11
 #define BIT_MASK_TAIL_PKT_Q1_V2_8822B 0x7ff
 #define BIT_TAIL_PKT_Q1_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_Q1_V2_8822B) << BIT_SHIFT_TAIL_PKT_Q1_V2_8822B)
-#define BIT_GET_TAIL_PKT_Q1_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q1_V2_8822B) & BIT_MASK_TAIL_PKT_Q1_V2_8822B)

+#define BIT_GET_TAIL_PKT_Q1_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q1_V2_8822B) & BIT_MASK_TAIL_PKT_Q1_V2_8822B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q1_V1_8822B 0
 #define BIT_MASK_HEAD_PKT_Q1_V1_8822B 0x7ff
 #define BIT_HEAD_PKT_Q1_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_Q1_V1_8822B) << BIT_SHIFT_HEAD_PKT_Q1_V1_8822B)
-#define BIT_GET_HEAD_PKT_Q1_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q1_V1_8822B) & BIT_MASK_HEAD_PKT_Q1_V1_8822B)

+#define BIT_GET_HEAD_PKT_Q1_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q1_V1_8822B) & BIT_MASK_HEAD_PKT_Q1_V1_8822B)
+
 
 
 /* 2 REG_Q2_INFO_8822B */
@@ -4808,26 +5275,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q2_V1_8822B 25
 #define BIT_MASK_QUEUEMACID_Q2_V1_8822B 0x7f
 #define BIT_QUEUEMACID_Q2_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_Q2_V1_8822B) << BIT_SHIFT_QUEUEMACID_Q2_V1_8822B)
-#define BIT_GET_QUEUEMACID_Q2_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q2_V1_8822B) & BIT_MASK_QUEUEMACID_Q2_V1_8822B)

+#define BIT_GET_QUEUEMACID_Q2_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q2_V1_8822B) & BIT_MASK_QUEUEMACID_Q2_V1_8822B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q2_V1_8822B 23
 #define BIT_MASK_QUEUEAC_Q2_V1_8822B 0x3
 #define BIT_QUEUEAC_Q2_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_Q2_V1_8822B) << BIT_SHIFT_QUEUEAC_Q2_V1_8822B)
-#define BIT_GET_QUEUEAC_Q2_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q2_V1_8822B) & BIT_MASK_QUEUEAC_Q2_V1_8822B)

+#define BIT_GET_QUEUEAC_Q2_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q2_V1_8822B) & BIT_MASK_QUEUEAC_Q2_V1_8822B)
+
 
 #define BIT_TIDEMPTY_Q2_V1_8822B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q2_V2_8822B 11
 #define BIT_MASK_TAIL_PKT_Q2_V2_8822B 0x7ff
 #define BIT_TAIL_PKT_Q2_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_Q2_V2_8822B) << BIT_SHIFT_TAIL_PKT_Q2_V2_8822B)
-#define BIT_GET_TAIL_PKT_Q2_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q2_V2_8822B) & BIT_MASK_TAIL_PKT_Q2_V2_8822B)

+#define BIT_GET_TAIL_PKT_Q2_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q2_V2_8822B) & BIT_MASK_TAIL_PKT_Q2_V2_8822B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q2_V1_8822B 0
 #define BIT_MASK_HEAD_PKT_Q2_V1_8822B 0x7ff
 #define BIT_HEAD_PKT_Q2_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_Q2_V1_8822B) << BIT_SHIFT_HEAD_PKT_Q2_V1_8822B)
-#define BIT_GET_HEAD_PKT_Q2_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q2_V1_8822B) & BIT_MASK_HEAD_PKT_Q2_V1_8822B)

+#define BIT_GET_HEAD_PKT_Q2_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q2_V1_8822B) & BIT_MASK_HEAD_PKT_Q2_V1_8822B)
+
 
 
 /* 2 REG_Q3_INFO_8822B */
@@ -4835,26 +5306,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q3_V1_8822B 25
 #define BIT_MASK_QUEUEMACID_Q3_V1_8822B 0x7f
 #define BIT_QUEUEMACID_Q3_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_Q3_V1_8822B) << BIT_SHIFT_QUEUEMACID_Q3_V1_8822B)
-#define BIT_GET_QUEUEMACID_Q3_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q3_V1_8822B) & BIT_MASK_QUEUEMACID_Q3_V1_8822B)

+#define BIT_GET_QUEUEMACID_Q3_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q3_V1_8822B) & BIT_MASK_QUEUEMACID_Q3_V1_8822B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q3_V1_8822B 23
 #define BIT_MASK_QUEUEAC_Q3_V1_8822B 0x3
 #define BIT_QUEUEAC_Q3_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_Q3_V1_8822B) << BIT_SHIFT_QUEUEAC_Q3_V1_8822B)
-#define BIT_GET_QUEUEAC_Q3_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q3_V1_8822B) & BIT_MASK_QUEUEAC_Q3_V1_8822B)

+#define BIT_GET_QUEUEAC_Q3_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q3_V1_8822B) & BIT_MASK_QUEUEAC_Q3_V1_8822B)
+
 
 #define BIT_TIDEMPTY_Q3_V1_8822B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q3_V2_8822B 11
 #define BIT_MASK_TAIL_PKT_Q3_V2_8822B 0x7ff
 #define BIT_TAIL_PKT_Q3_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_Q3_V2_8822B) << BIT_SHIFT_TAIL_PKT_Q3_V2_8822B)
-#define BIT_GET_TAIL_PKT_Q3_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q3_V2_8822B) & BIT_MASK_TAIL_PKT_Q3_V2_8822B)

+#define BIT_GET_TAIL_PKT_Q3_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q3_V2_8822B) & BIT_MASK_TAIL_PKT_Q3_V2_8822B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q3_V1_8822B 0
 #define BIT_MASK_HEAD_PKT_Q3_V1_8822B 0x7ff
 #define BIT_HEAD_PKT_Q3_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_Q3_V1_8822B) << BIT_SHIFT_HEAD_PKT_Q3_V1_8822B)
-#define BIT_GET_HEAD_PKT_Q3_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q3_V1_8822B) & BIT_MASK_HEAD_PKT_Q3_V1_8822B)

+#define BIT_GET_HEAD_PKT_Q3_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q3_V1_8822B) & BIT_MASK_HEAD_PKT_Q3_V1_8822B)
+
 
 
 /* 2 REG_MGQ_INFO_8822B */
@@ -4862,26 +5337,30 @@
 #define BIT_SHIFT_QUEUEMACID_MGQ_V1_8822B 25
 #define BIT_MASK_QUEUEMACID_MGQ_V1_8822B 0x7f
 #define BIT_QUEUEMACID_MGQ_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_MGQ_V1_8822B) << BIT_SHIFT_QUEUEMACID_MGQ_V1_8822B)
-#define BIT_GET_QUEUEMACID_MGQ_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_MGQ_V1_8822B) & BIT_MASK_QUEUEMACID_MGQ_V1_8822B)

+#define BIT_GET_QUEUEMACID_MGQ_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_MGQ_V1_8822B) & BIT_MASK_QUEUEMACID_MGQ_V1_8822B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_MGQ_V1_8822B 23
 #define BIT_MASK_QUEUEAC_MGQ_V1_8822B 0x3
 #define BIT_QUEUEAC_MGQ_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_MGQ_V1_8822B) << BIT_SHIFT_QUEUEAC_MGQ_V1_8822B)
-#define BIT_GET_QUEUEAC_MGQ_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_MGQ_V1_8822B) & BIT_MASK_QUEUEAC_MGQ_V1_8822B)

+#define BIT_GET_QUEUEAC_MGQ_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_MGQ_V1_8822B) & BIT_MASK_QUEUEAC_MGQ_V1_8822B)
+
 
 #define BIT_TIDEMPTY_MGQ_V1_8822B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_MGQ_V2_8822B 11
 #define BIT_MASK_TAIL_PKT_MGQ_V2_8822B 0x7ff
 #define BIT_TAIL_PKT_MGQ_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_MGQ_V2_8822B) << BIT_SHIFT_TAIL_PKT_MGQ_V2_8822B)
-#define BIT_GET_TAIL_PKT_MGQ_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_MGQ_V2_8822B) & BIT_MASK_TAIL_PKT_MGQ_V2_8822B)

+#define BIT_GET_TAIL_PKT_MGQ_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_MGQ_V2_8822B) & BIT_MASK_TAIL_PKT_MGQ_V2_8822B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_MGQ_V1_8822B 0
 #define BIT_MASK_HEAD_PKT_MGQ_V1_8822B 0x7ff
 #define BIT_HEAD_PKT_MGQ_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_MGQ_V1_8822B) << BIT_SHIFT_HEAD_PKT_MGQ_V1_8822B)
-#define BIT_GET_HEAD_PKT_MGQ_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_MGQ_V1_8822B) & BIT_MASK_HEAD_PKT_MGQ_V1_8822B)

+#define BIT_GET_HEAD_PKT_MGQ_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_MGQ_V1_8822B) & BIT_MASK_HEAD_PKT_MGQ_V1_8822B)
+
 
 
 /* 2 REG_HIQ_INFO_8822B */
@@ -4889,26 +5368,30 @@
 #define BIT_SHIFT_QUEUEMACID_HIQ_V1_8822B 25
 #define BIT_MASK_QUEUEMACID_HIQ_V1_8822B 0x7f
 #define BIT_QUEUEMACID_HIQ_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_HIQ_V1_8822B) << BIT_SHIFT_QUEUEMACID_HIQ_V1_8822B)
-#define BIT_GET_QUEUEMACID_HIQ_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_HIQ_V1_8822B) & BIT_MASK_QUEUEMACID_HIQ_V1_8822B)

+#define BIT_GET_QUEUEMACID_HIQ_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_HIQ_V1_8822B) & BIT_MASK_QUEUEMACID_HIQ_V1_8822B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_HIQ_V1_8822B 23
 #define BIT_MASK_QUEUEAC_HIQ_V1_8822B 0x3
 #define BIT_QUEUEAC_HIQ_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_HIQ_V1_8822B) << BIT_SHIFT_QUEUEAC_HIQ_V1_8822B)
-#define BIT_GET_QUEUEAC_HIQ_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_HIQ_V1_8822B) & BIT_MASK_QUEUEAC_HIQ_V1_8822B)

+#define BIT_GET_QUEUEAC_HIQ_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_HIQ_V1_8822B) & BIT_MASK_QUEUEAC_HIQ_V1_8822B)
+
 
 #define BIT_TIDEMPTY_HIQ_V1_8822B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_HIQ_V2_8822B 11
 #define BIT_MASK_TAIL_PKT_HIQ_V2_8822B 0x7ff
 #define BIT_TAIL_PKT_HIQ_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_HIQ_V2_8822B) << BIT_SHIFT_TAIL_PKT_HIQ_V2_8822B)
-#define BIT_GET_TAIL_PKT_HIQ_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_HIQ_V2_8822B) & BIT_MASK_TAIL_PKT_HIQ_V2_8822B)

+#define BIT_GET_TAIL_PKT_HIQ_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_HIQ_V2_8822B) & BIT_MASK_TAIL_PKT_HIQ_V2_8822B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_HIQ_V1_8822B 0
 #define BIT_MASK_HEAD_PKT_HIQ_V1_8822B 0x7ff
 #define BIT_HEAD_PKT_HIQ_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_HIQ_V1_8822B) << BIT_SHIFT_HEAD_PKT_HIQ_V1_8822B)
-#define BIT_GET_HEAD_PKT_HIQ_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_HIQ_V1_8822B) & BIT_MASK_HEAD_PKT_HIQ_V1_8822B)

+#define BIT_GET_HEAD_PKT_HIQ_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_HIQ_V1_8822B) & BIT_MASK_HEAD_PKT_HIQ_V1_8822B)
+
 
 
 /* 2 REG_BCNQ_INFO_8822B */
@@ -4916,7 +5399,8 @@
 #define BIT_SHIFT_BCNQ_HEAD_PG_V1_8822B 0
 #define BIT_MASK_BCNQ_HEAD_PG_V1_8822B 0xfff
 #define BIT_BCNQ_HEAD_PG_V1_8822B(x) (((x) & BIT_MASK_BCNQ_HEAD_PG_V1_8822B) << BIT_SHIFT_BCNQ_HEAD_PG_V1_8822B)
-#define BIT_GET_BCNQ_HEAD_PG_V1_8822B(x) (((x) >> BIT_SHIFT_BCNQ_HEAD_PG_V1_8822B) & BIT_MASK_BCNQ_HEAD_PG_V1_8822B)

+#define BIT_GET_BCNQ_HEAD_PG_V1_8822B(x) (((x) >> BIT_SHIFT_BCNQ_HEAD_PG_V1_8822B) & BIT_MASK_BCNQ_HEAD_PG_V1_8822B)
+
 
 
 /* 2 REG_TXPKT_EMPTY_8822B */
@@ -4942,7 +5426,8 @@
 #define BIT_SHIFT_FW_FREE_TAIL_V1_8822B 0
 #define BIT_MASK_FW_FREE_TAIL_V1_8822B 0xfff
 #define BIT_FW_FREE_TAIL_V1_8822B(x) (((x) & BIT_MASK_FW_FREE_TAIL_V1_8822B) << BIT_SHIFT_FW_FREE_TAIL_V1_8822B)
-#define BIT_GET_FW_FREE_TAIL_V1_8822B(x) (((x) >> BIT_SHIFT_FW_FREE_TAIL_V1_8822B) & BIT_MASK_FW_FREE_TAIL_V1_8822B)

+#define BIT_GET_FW_FREE_TAIL_V1_8822B(x) (((x) >> BIT_SHIFT_FW_FREE_TAIL_V1_8822B) & BIT_MASK_FW_FREE_TAIL_V1_8822B)
+
 
 
 /* 2 REG_FWHW_TXQ_CTRL_8822B */
@@ -4954,7 +5439,8 @@
 #define BIT_SHIFT_EN_QUEUE_RPT_8822B 8
 #define BIT_MASK_EN_QUEUE_RPT_8822B 0xff
 #define BIT_EN_QUEUE_RPT_8822B(x) (((x) & BIT_MASK_EN_QUEUE_RPT_8822B) << BIT_SHIFT_EN_QUEUE_RPT_8822B)
-#define BIT_GET_EN_QUEUE_RPT_8822B(x) (((x) >> BIT_SHIFT_EN_QUEUE_RPT_8822B) & BIT_MASK_EN_QUEUE_RPT_8822B)

+#define BIT_GET_EN_QUEUE_RPT_8822B(x) (((x) >> BIT_SHIFT_EN_QUEUE_RPT_8822B) & BIT_MASK_EN_QUEUE_RPT_8822B)
+
 
 #define BIT_EN_RTY_BK_8822B BIT(7)
 #define BIT_EN_USE_INI_RAT_8822B BIT(6)
@@ -4971,7 +5457,8 @@
 #define BIT_SHIFT__R_DATA_FALLBACK_SEL_8822B 0
 #define BIT_MASK__R_DATA_FALLBACK_SEL_8822B 0x3
 #define BIT__R_DATA_FALLBACK_SEL_8822B(x) (((x) & BIT_MASK__R_DATA_FALLBACK_SEL_8822B) << BIT_SHIFT__R_DATA_FALLBACK_SEL_8822B)
-#define BIT_GET__R_DATA_FALLBACK_SEL_8822B(x) (((x) >> BIT_SHIFT__R_DATA_FALLBACK_SEL_8822B) & BIT_MASK__R_DATA_FALLBACK_SEL_8822B)

+#define BIT_GET__R_DATA_FALLBACK_SEL_8822B(x) (((x) >> BIT_SHIFT__R_DATA_FALLBACK_SEL_8822B) & BIT_MASK__R_DATA_FALLBACK_SEL_8822B)
+
 
 
 /* 2 REG_BCNQ_BDNY_V1_8822B */
@@ -4979,7 +5466,8 @@
 #define BIT_SHIFT_BCNQ_PGBNDY_V1_8822B 0
 #define BIT_MASK_BCNQ_PGBNDY_V1_8822B 0xfff
 #define BIT_BCNQ_PGBNDY_V1_8822B(x) (((x) & BIT_MASK_BCNQ_PGBNDY_V1_8822B) << BIT_SHIFT_BCNQ_PGBNDY_V1_8822B)
-#define BIT_GET_BCNQ_PGBNDY_V1_8822B(x) (((x) >> BIT_SHIFT_BCNQ_PGBNDY_V1_8822B) & BIT_MASK_BCNQ_PGBNDY_V1_8822B)

+#define BIT_GET_BCNQ_PGBNDY_V1_8822B(x) (((x) >> BIT_SHIFT_BCNQ_PGBNDY_V1_8822B) & BIT_MASK_BCNQ_PGBNDY_V1_8822B)
+
 
 
 /* 2 REG_LIFETIME_EN_8822B */
@@ -4996,13 +5484,15 @@
 #define BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8822B 8
 #define BIT_MASK_SPEC_SIFS_OFDM_PTCL_8822B 0xff
 #define BIT_SPEC_SIFS_OFDM_PTCL_8822B(x) (((x) & BIT_MASK_SPEC_SIFS_OFDM_PTCL_8822B) << BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8822B)
-#define BIT_GET_SPEC_SIFS_OFDM_PTCL_8822B(x) (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8822B) & BIT_MASK_SPEC_SIFS_OFDM_PTCL_8822B)

+#define BIT_GET_SPEC_SIFS_OFDM_PTCL_8822B(x) (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8822B) & BIT_MASK_SPEC_SIFS_OFDM_PTCL_8822B)
+
 
 
 #define BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8822B 0
 #define BIT_MASK_SPEC_SIFS_CCK_PTCL_8822B 0xff
 #define BIT_SPEC_SIFS_CCK_PTCL_8822B(x) (((x) & BIT_MASK_SPEC_SIFS_CCK_PTCL_8822B) << BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8822B)
-#define BIT_GET_SPEC_SIFS_CCK_PTCL_8822B(x) (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8822B) & BIT_MASK_SPEC_SIFS_CCK_PTCL_8822B)

+#define BIT_GET_SPEC_SIFS_CCK_PTCL_8822B(x) (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8822B) & BIT_MASK_SPEC_SIFS_CCK_PTCL_8822B)
+
 
 
 /* 2 REG_RETRY_LIMIT_8822B */
@@ -5010,13 +5500,15 @@
 #define BIT_SHIFT_SRL_8822B 8
 #define BIT_MASK_SRL_8822B 0x3f
 #define BIT_SRL_8822B(x) (((x) & BIT_MASK_SRL_8822B) << BIT_SHIFT_SRL_8822B)
-#define BIT_GET_SRL_8822B(x) (((x) >> BIT_SHIFT_SRL_8822B) & BIT_MASK_SRL_8822B)

+#define BIT_GET_SRL_8822B(x) (((x) >> BIT_SHIFT_SRL_8822B) & BIT_MASK_SRL_8822B)
+
 
 
 #define BIT_SHIFT_LRL_8822B 0
 #define BIT_MASK_LRL_8822B 0x3f
 #define BIT_LRL_8822B(x) (((x) & BIT_MASK_LRL_8822B) << BIT_SHIFT_LRL_8822B)
-#define BIT_GET_LRL_8822B(x) (((x) >> BIT_SHIFT_LRL_8822B) & BIT_MASK_LRL_8822B)

+#define BIT_GET_LRL_8822B(x) (((x) >> BIT_SHIFT_LRL_8822B) & BIT_MASK_LRL_8822B)
+
 
 
 /* 2 REG_TXBF_CTRL_8822B */
@@ -5031,7 +5523,8 @@
 #define BIT_SHIFT_R_TXBF1_AID_8822B 16
 #define BIT_MASK_R_TXBF1_AID_8822B 0x1ff
 #define BIT_R_TXBF1_AID_8822B(x) (((x) & BIT_MASK_R_TXBF1_AID_8822B) << BIT_SHIFT_R_TXBF1_AID_8822B)
-#define BIT_GET_R_TXBF1_AID_8822B(x) (((x) >> BIT_SHIFT_R_TXBF1_AID_8822B) & BIT_MASK_R_TXBF1_AID_8822B)

+#define BIT_GET_R_TXBF1_AID_8822B(x) (((x) >> BIT_SHIFT_R_TXBF1_AID_8822B) & BIT_MASK_R_TXBF1_AID_8822B)
+
 
 #define BIT_DIS_NDP_BFEN_8822B BIT(15)
 #define BIT_R_TXBCN_NOBLOCK_NDP_8822B BIT(14)
@@ -5042,7 +5535,8 @@
 #define BIT_SHIFT_R_TXBF0_AID_8822B 0
 #define BIT_MASK_R_TXBF0_AID_8822B 0x1ff
 #define BIT_R_TXBF0_AID_8822B(x) (((x) & BIT_MASK_R_TXBF0_AID_8822B) << BIT_SHIFT_R_TXBF0_AID_8822B)
-#define BIT_GET_R_TXBF0_AID_8822B(x) (((x) >> BIT_SHIFT_R_TXBF0_AID_8822B) & BIT_MASK_R_TXBF0_AID_8822B)

+#define BIT_GET_R_TXBF0_AID_8822B(x) (((x) >> BIT_SHIFT_R_TXBF0_AID_8822B) & BIT_MASK_R_TXBF0_AID_8822B)
+
 
 
 /* 2 REG_DARFRC_8822B */
@@ -5050,49 +5544,57 @@
 #define BIT_SHIFT_DARF_RC8_8822B (56 & CPU_OPT_WIDTH)
 #define BIT_MASK_DARF_RC8_8822B 0x1f
 #define BIT_DARF_RC8_8822B(x) (((x) & BIT_MASK_DARF_RC8_8822B) << BIT_SHIFT_DARF_RC8_8822B)
-#define BIT_GET_DARF_RC8_8822B(x) (((x) >> BIT_SHIFT_DARF_RC8_8822B) & BIT_MASK_DARF_RC8_8822B)

+#define BIT_GET_DARF_RC8_8822B(x) (((x) >> BIT_SHIFT_DARF_RC8_8822B) & BIT_MASK_DARF_RC8_8822B)
+
 
 
 #define BIT_SHIFT_DARF_RC7_8822B (48 & CPU_OPT_WIDTH)
 #define BIT_MASK_DARF_RC7_8822B 0x1f
 #define BIT_DARF_RC7_8822B(x) (((x) & BIT_MASK_DARF_RC7_8822B) << BIT_SHIFT_DARF_RC7_8822B)
-#define BIT_GET_DARF_RC7_8822B(x) (((x) >> BIT_SHIFT_DARF_RC7_8822B) & BIT_MASK_DARF_RC7_8822B)

+#define BIT_GET_DARF_RC7_8822B(x) (((x) >> BIT_SHIFT_DARF_RC7_8822B) & BIT_MASK_DARF_RC7_8822B)
+
 
 
 #define BIT_SHIFT_DARF_RC6_8822B (40 & CPU_OPT_WIDTH)
 #define BIT_MASK_DARF_RC6_8822B 0x1f
 #define BIT_DARF_RC6_8822B(x) (((x) & BIT_MASK_DARF_RC6_8822B) << BIT_SHIFT_DARF_RC6_8822B)
-#define BIT_GET_DARF_RC6_8822B(x) (((x) >> BIT_SHIFT_DARF_RC6_8822B) & BIT_MASK_DARF_RC6_8822B)

+#define BIT_GET_DARF_RC6_8822B(x) (((x) >> BIT_SHIFT_DARF_RC6_8822B) & BIT_MASK_DARF_RC6_8822B)
+
 
 
 #define BIT_SHIFT_DARF_RC5_8822B (32 & CPU_OPT_WIDTH)
 #define BIT_MASK_DARF_RC5_8822B 0x1f
 #define BIT_DARF_RC5_8822B(x) (((x) & BIT_MASK_DARF_RC5_8822B) << BIT_SHIFT_DARF_RC5_8822B)
-#define BIT_GET_DARF_RC5_8822B(x) (((x) >> BIT_SHIFT_DARF_RC5_8822B) & BIT_MASK_DARF_RC5_8822B)

+#define BIT_GET_DARF_RC5_8822B(x) (((x) >> BIT_SHIFT_DARF_RC5_8822B) & BIT_MASK_DARF_RC5_8822B)
+
 
 
 #define BIT_SHIFT_DARF_RC4_8822B 24
 #define BIT_MASK_DARF_RC4_8822B 0x1f
 #define BIT_DARF_RC4_8822B(x) (((x) & BIT_MASK_DARF_RC4_8822B) << BIT_SHIFT_DARF_RC4_8822B)
-#define BIT_GET_DARF_RC4_8822B(x) (((x) >> BIT_SHIFT_DARF_RC4_8822B) & BIT_MASK_DARF_RC4_8822B)

+#define BIT_GET_DARF_RC4_8822B(x) (((x) >> BIT_SHIFT_DARF_RC4_8822B) & BIT_MASK_DARF_RC4_8822B)
+
 
 
 #define BIT_SHIFT_DARF_RC3_8822B 16
 #define BIT_MASK_DARF_RC3_8822B 0x1f
 #define BIT_DARF_RC3_8822B(x) (((x) & BIT_MASK_DARF_RC3_8822B) << BIT_SHIFT_DARF_RC3_8822B)
-#define BIT_GET_DARF_RC3_8822B(x) (((x) >> BIT_SHIFT_DARF_RC3_8822B) & BIT_MASK_DARF_RC3_8822B)

+#define BIT_GET_DARF_RC3_8822B(x) (((x) >> BIT_SHIFT_DARF_RC3_8822B) & BIT_MASK_DARF_RC3_8822B)
+
 
 
 #define BIT_SHIFT_DARF_RC2_8822B 8
 #define BIT_MASK_DARF_RC2_8822B 0x1f
 #define BIT_DARF_RC2_8822B(x) (((x) & BIT_MASK_DARF_RC2_8822B) << BIT_SHIFT_DARF_RC2_8822B)
-#define BIT_GET_DARF_RC2_8822B(x) (((x) >> BIT_SHIFT_DARF_RC2_8822B) & BIT_MASK_DARF_RC2_8822B)

+#define BIT_GET_DARF_RC2_8822B(x) (((x) >> BIT_SHIFT_DARF_RC2_8822B) & BIT_MASK_DARF_RC2_8822B)
+
 
 
 #define BIT_SHIFT_DARF_RC1_8822B 0
 #define BIT_MASK_DARF_RC1_8822B 0x1f
 #define BIT_DARF_RC1_8822B(x) (((x) & BIT_MASK_DARF_RC1_8822B) << BIT_SHIFT_DARF_RC1_8822B)
-#define BIT_GET_DARF_RC1_8822B(x) (((x) >> BIT_SHIFT_DARF_RC1_8822B) & BIT_MASK_DARF_RC1_8822B)

+#define BIT_GET_DARF_RC1_8822B(x) (((x) >> BIT_SHIFT_DARF_RC1_8822B) & BIT_MASK_DARF_RC1_8822B)
+
 
 
 /* 2 REG_RARFRC_8822B */
@@ -5100,49 +5602,57 @@
 #define BIT_SHIFT_RARF_RC8_8822B (56 & CPU_OPT_WIDTH)
 #define BIT_MASK_RARF_RC8_8822B 0x1f
 #define BIT_RARF_RC8_8822B(x) (((x) & BIT_MASK_RARF_RC8_8822B) << BIT_SHIFT_RARF_RC8_8822B)
-#define BIT_GET_RARF_RC8_8822B(x) (((x) >> BIT_SHIFT_RARF_RC8_8822B) & BIT_MASK_RARF_RC8_8822B)

+#define BIT_GET_RARF_RC8_8822B(x) (((x) >> BIT_SHIFT_RARF_RC8_8822B) & BIT_MASK_RARF_RC8_8822B)
+
 
 
 #define BIT_SHIFT_RARF_RC7_8822B (48 & CPU_OPT_WIDTH)
 #define BIT_MASK_RARF_RC7_8822B 0x1f
 #define BIT_RARF_RC7_8822B(x) (((x) & BIT_MASK_RARF_RC7_8822B) << BIT_SHIFT_RARF_RC7_8822B)
-#define BIT_GET_RARF_RC7_8822B(x) (((x) >> BIT_SHIFT_RARF_RC7_8822B) & BIT_MASK_RARF_RC7_8822B)

+#define BIT_GET_RARF_RC7_8822B(x) (((x) >> BIT_SHIFT_RARF_RC7_8822B) & BIT_MASK_RARF_RC7_8822B)
+
 
 
 #define BIT_SHIFT_RARF_RC6_8822B (40 & CPU_OPT_WIDTH)
 #define BIT_MASK_RARF_RC6_8822B 0x1f
 #define BIT_RARF_RC6_8822B(x) (((x) & BIT_MASK_RARF_RC6_8822B) << BIT_SHIFT_RARF_RC6_8822B)
-#define BIT_GET_RARF_RC6_8822B(x) (((x) >> BIT_SHIFT_RARF_RC6_8822B) & BIT_MASK_RARF_RC6_8822B)

+#define BIT_GET_RARF_RC6_8822B(x) (((x) >> BIT_SHIFT_RARF_RC6_8822B) & BIT_MASK_RARF_RC6_8822B)
+
 
 
 #define BIT_SHIFT_RARF_RC5_8822B (32 & CPU_OPT_WIDTH)
 #define BIT_MASK_RARF_RC5_8822B 0x1f
 #define BIT_RARF_RC5_8822B(x) (((x) & BIT_MASK_RARF_RC5_8822B) << BIT_SHIFT_RARF_RC5_8822B)
-#define BIT_GET_RARF_RC5_8822B(x) (((x) >> BIT_SHIFT_RARF_RC5_8822B) & BIT_MASK_RARF_RC5_8822B)

+#define BIT_GET_RARF_RC5_8822B(x) (((x) >> BIT_SHIFT_RARF_RC5_8822B) & BIT_MASK_RARF_RC5_8822B)
+
 
 
 #define BIT_SHIFT_RARF_RC4_8822B 24
 #define BIT_MASK_RARF_RC4_8822B 0x1f
 #define BIT_RARF_RC4_8822B(x) (((x) & BIT_MASK_RARF_RC4_8822B) << BIT_SHIFT_RARF_RC4_8822B)
-#define BIT_GET_RARF_RC4_8822B(x) (((x) >> BIT_SHIFT_RARF_RC4_8822B) & BIT_MASK_RARF_RC4_8822B)

+#define BIT_GET_RARF_RC4_8822B(x) (((x) >> BIT_SHIFT_RARF_RC4_8822B) & BIT_MASK_RARF_RC4_8822B)
+
 
 
 #define BIT_SHIFT_RARF_RC3_8822B 16
 #define BIT_MASK_RARF_RC3_8822B 0x1f
 #define BIT_RARF_RC3_8822B(x) (((x) & BIT_MASK_RARF_RC3_8822B) << BIT_SHIFT_RARF_RC3_8822B)
-#define BIT_GET_RARF_RC3_8822B(x) (((x) >> BIT_SHIFT_RARF_RC3_8822B) & BIT_MASK_RARF_RC3_8822B)

+#define BIT_GET_RARF_RC3_8822B(x) (((x) >> BIT_SHIFT_RARF_RC3_8822B) & BIT_MASK_RARF_RC3_8822B)
+
 
 
 #define BIT_SHIFT_RARF_RC2_8822B 8
 #define BIT_MASK_RARF_RC2_8822B 0x1f
 #define BIT_RARF_RC2_8822B(x) (((x) & BIT_MASK_RARF_RC2_8822B) << BIT_SHIFT_RARF_RC2_8822B)
-#define BIT_GET_RARF_RC2_8822B(x) (((x) >> BIT_SHIFT_RARF_RC2_8822B) & BIT_MASK_RARF_RC2_8822B)

+#define BIT_GET_RARF_RC2_8822B(x) (((x) >> BIT_SHIFT_RARF_RC2_8822B) & BIT_MASK_RARF_RC2_8822B)
+
 
 
 #define BIT_SHIFT_RARF_RC1_8822B 0
 #define BIT_MASK_RARF_RC1_8822B 0x1f
 #define BIT_RARF_RC1_8822B(x) (((x) & BIT_MASK_RARF_RC1_8822B) << BIT_SHIFT_RARF_RC1_8822B)
-#define BIT_GET_RARF_RC1_8822B(x) (((x) >> BIT_SHIFT_RARF_RC1_8822B) & BIT_MASK_RARF_RC1_8822B)

+#define BIT_GET_RARF_RC1_8822B(x) (((x) >> BIT_SHIFT_RARF_RC1_8822B) & BIT_MASK_RARF_RC1_8822B)
+
 
 
 /* 2 REG_RRSR_8822B */
@@ -5150,14 +5660,16 @@
 #define BIT_SHIFT_RRSR_RSC_8822B 21
 #define BIT_MASK_RRSR_RSC_8822B 0x3
 #define BIT_RRSR_RSC_8822B(x) (((x) & BIT_MASK_RRSR_RSC_8822B) << BIT_SHIFT_RRSR_RSC_8822B)
-#define BIT_GET_RRSR_RSC_8822B(x) (((x) >> BIT_SHIFT_RRSR_RSC_8822B) & BIT_MASK_RRSR_RSC_8822B)

+#define BIT_GET_RRSR_RSC_8822B(x) (((x) >> BIT_SHIFT_RRSR_RSC_8822B) & BIT_MASK_RRSR_RSC_8822B)
+
 
 #define BIT_RRSR_BW_8822B BIT(20)
 
 #define BIT_SHIFT_RRSC_BITMAP_8822B 0
 #define BIT_MASK_RRSC_BITMAP_8822B 0xfffff
 #define BIT_RRSC_BITMAP_8822B(x) (((x) & BIT_MASK_RRSC_BITMAP_8822B) << BIT_SHIFT_RRSC_BITMAP_8822B)
-#define BIT_GET_RRSC_BITMAP_8822B(x) (((x) >> BIT_SHIFT_RRSC_BITMAP_8822B) & BIT_MASK_RRSC_BITMAP_8822B)

+#define BIT_GET_RRSC_BITMAP_8822B(x) (((x) >> BIT_SHIFT_RRSC_BITMAP_8822B) & BIT_MASK_RRSC_BITMAP_8822B)
+
 
 
 /* 2 REG_ARFR0_8822B */
@@ -5165,7 +5677,8 @@
 #define BIT_SHIFT_ARFR0_V1_8822B 0
 #define BIT_MASK_ARFR0_V1_8822B 0xffffffffffffffffL
 #define BIT_ARFR0_V1_8822B(x) (((x) & BIT_MASK_ARFR0_V1_8822B) << BIT_SHIFT_ARFR0_V1_8822B)
-#define BIT_GET_ARFR0_V1_8822B(x) (((x) >> BIT_SHIFT_ARFR0_V1_8822B) & BIT_MASK_ARFR0_V1_8822B)

+#define BIT_GET_ARFR0_V1_8822B(x) (((x) >> BIT_SHIFT_ARFR0_V1_8822B) & BIT_MASK_ARFR0_V1_8822B)
+
 
 
 /* 2 REG_ARFR1_V1_8822B */
@@ -5173,7 +5686,8 @@
 #define BIT_SHIFT_ARFR1_V1_8822B 0
 #define BIT_MASK_ARFR1_V1_8822B 0xffffffffffffffffL
 #define BIT_ARFR1_V1_8822B(x) (((x) & BIT_MASK_ARFR1_V1_8822B) << BIT_SHIFT_ARFR1_V1_8822B)
-#define BIT_GET_ARFR1_V1_8822B(x) (((x) >> BIT_SHIFT_ARFR1_V1_8822B) & BIT_MASK_ARFR1_V1_8822B)

+#define BIT_GET_ARFR1_V1_8822B(x) (((x) >> BIT_SHIFT_ARFR1_V1_8822B) & BIT_MASK_ARFR1_V1_8822B)
+
 
 
 /* 2 REG_CCK_CHECK_8822B */
@@ -5191,7 +5705,8 @@
 #define BIT_SHIFT_AMPDU_MAX_TIME_8822B 0
 #define BIT_MASK_AMPDU_MAX_TIME_8822B 0xff
 #define BIT_AMPDU_MAX_TIME_8822B(x) (((x) & BIT_MASK_AMPDU_MAX_TIME_8822B) << BIT_SHIFT_AMPDU_MAX_TIME_8822B)
-#define BIT_GET_AMPDU_MAX_TIME_8822B(x) (((x) >> BIT_SHIFT_AMPDU_MAX_TIME_8822B) & BIT_MASK_AMPDU_MAX_TIME_8822B)

+#define BIT_GET_AMPDU_MAX_TIME_8822B(x) (((x) >> BIT_SHIFT_AMPDU_MAX_TIME_8822B) & BIT_MASK_AMPDU_MAX_TIME_8822B)
+
 
 
 /* 2 REG_BCNQ1_BDNY_V1_8822B */
@@ -5199,7 +5714,8 @@
 #define BIT_SHIFT_BCNQ1_PGBNDY_V1_8822B 0
 #define BIT_MASK_BCNQ1_PGBNDY_V1_8822B 0xfff
 #define BIT_BCNQ1_PGBNDY_V1_8822B(x) (((x) & BIT_MASK_BCNQ1_PGBNDY_V1_8822B) << BIT_SHIFT_BCNQ1_PGBNDY_V1_8822B)
-#define BIT_GET_BCNQ1_PGBNDY_V1_8822B(x) (((x) >> BIT_SHIFT_BCNQ1_PGBNDY_V1_8822B) & BIT_MASK_BCNQ1_PGBNDY_V1_8822B)

+#define BIT_GET_BCNQ1_PGBNDY_V1_8822B(x) (((x) >> BIT_SHIFT_BCNQ1_PGBNDY_V1_8822B) & BIT_MASK_BCNQ1_PGBNDY_V1_8822B)
+
 
 
 /* 2 REG_AMPDU_MAX_LENGTH_8822B */
@@ -5207,7 +5723,8 @@
 #define BIT_SHIFT_AMPDU_MAX_LENGTH_8822B 0
 #define BIT_MASK_AMPDU_MAX_LENGTH_8822B 0xffffffffL
 #define BIT_AMPDU_MAX_LENGTH_8822B(x) (((x) & BIT_MASK_AMPDU_MAX_LENGTH_8822B) << BIT_SHIFT_AMPDU_MAX_LENGTH_8822B)
-#define BIT_GET_AMPDU_MAX_LENGTH_8822B(x) (((x) >> BIT_SHIFT_AMPDU_MAX_LENGTH_8822B) & BIT_MASK_AMPDU_MAX_LENGTH_8822B)

+#define BIT_GET_AMPDU_MAX_LENGTH_8822B(x) (((x) >> BIT_SHIFT_AMPDU_MAX_LENGTH_8822B) & BIT_MASK_AMPDU_MAX_LENGTH_8822B)
+
 
 
 /* 2 REG_ACQ_STOP_8822B */
@@ -5225,7 +5742,8 @@
 #define BIT_SHIFT_R_NDPA_RATE_V1_8822B 0
 #define BIT_MASK_R_NDPA_RATE_V1_8822B 0xff
 #define BIT_R_NDPA_RATE_V1_8822B(x) (((x) & BIT_MASK_R_NDPA_RATE_V1_8822B) << BIT_SHIFT_R_NDPA_RATE_V1_8822B)
-#define BIT_GET_R_NDPA_RATE_V1_8822B(x) (((x) >> BIT_SHIFT_R_NDPA_RATE_V1_8822B) & BIT_MASK_R_NDPA_RATE_V1_8822B)

+#define BIT_GET_R_NDPA_RATE_V1_8822B(x) (((x) >> BIT_SHIFT_R_NDPA_RATE_V1_8822B) & BIT_MASK_R_NDPA_RATE_V1_8822B)
+
 
 
 /* 2 REG_TX_HANG_CTRL_8822B */
@@ -5240,14 +5758,16 @@
 #define BIT_SHIFT_BW_SIGTA_8822B 3
 #define BIT_MASK_BW_SIGTA_8822B 0x3
 #define BIT_BW_SIGTA_8822B(x) (((x) & BIT_MASK_BW_SIGTA_8822B) << BIT_SHIFT_BW_SIGTA_8822B)
-#define BIT_GET_BW_SIGTA_8822B(x) (((x) >> BIT_SHIFT_BW_SIGTA_8822B) & BIT_MASK_BW_SIGTA_8822B)

+#define BIT_GET_BW_SIGTA_8822B(x) (((x) >> BIT_SHIFT_BW_SIGTA_8822B) & BIT_MASK_BW_SIGTA_8822B)
+
 
 #define BIT_EN_BAR_SIGTA_8822B BIT(2)
 
 #define BIT_SHIFT_R_NDPA_BW_8822B 0
 #define BIT_MASK_R_NDPA_BW_8822B 0x3
 #define BIT_R_NDPA_BW_8822B(x) (((x) & BIT_MASK_R_NDPA_BW_8822B) << BIT_SHIFT_R_NDPA_BW_8822B)
-#define BIT_GET_R_NDPA_BW_8822B(x) (((x) >> BIT_SHIFT_R_NDPA_BW_8822B) & BIT_MASK_R_NDPA_BW_8822B)

+#define BIT_GET_R_NDPA_BW_8822B(x) (((x) >> BIT_SHIFT_R_NDPA_BW_8822B) & BIT_MASK_R_NDPA_BW_8822B)
+
 
 
 /* 2 REG_RD_RESP_PKT_TH_8822B */
@@ -5255,7 +5775,8 @@
 #define BIT_SHIFT_RD_RESP_PKT_TH_V1_8822B 0
 #define BIT_MASK_RD_RESP_PKT_TH_V1_8822B 0x3f
 #define BIT_RD_RESP_PKT_TH_V1_8822B(x) (((x) & BIT_MASK_RD_RESP_PKT_TH_V1_8822B) << BIT_SHIFT_RD_RESP_PKT_TH_V1_8822B)
-#define BIT_GET_RD_RESP_PKT_TH_V1_8822B(x) (((x) >> BIT_SHIFT_RD_RESP_PKT_TH_V1_8822B) & BIT_MASK_RD_RESP_PKT_TH_V1_8822B)

+#define BIT_GET_RD_RESP_PKT_TH_V1_8822B(x) (((x) >> BIT_SHIFT_RD_RESP_PKT_TH_V1_8822B) & BIT_MASK_RD_RESP_PKT_TH_V1_8822B)
+
 
 
 /* 2 REG_CMDQ_INFO_8822B */
@@ -5263,26 +5784,30 @@
 #define BIT_SHIFT_QUEUEMACID_CMDQ_V1_8822B 25
 #define BIT_MASK_QUEUEMACID_CMDQ_V1_8822B 0x7f
 #define BIT_QUEUEMACID_CMDQ_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_CMDQ_V1_8822B) << BIT_SHIFT_QUEUEMACID_CMDQ_V1_8822B)
-#define BIT_GET_QUEUEMACID_CMDQ_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_CMDQ_V1_8822B) & BIT_MASK_QUEUEMACID_CMDQ_V1_8822B)

+#define BIT_GET_QUEUEMACID_CMDQ_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_CMDQ_V1_8822B) & BIT_MASK_QUEUEMACID_CMDQ_V1_8822B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_CMDQ_V1_8822B 23
 #define BIT_MASK_QUEUEAC_CMDQ_V1_8822B 0x3
 #define BIT_QUEUEAC_CMDQ_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_CMDQ_V1_8822B) << BIT_SHIFT_QUEUEAC_CMDQ_V1_8822B)
-#define BIT_GET_QUEUEAC_CMDQ_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_CMDQ_V1_8822B) & BIT_MASK_QUEUEAC_CMDQ_V1_8822B)

+#define BIT_GET_QUEUEAC_CMDQ_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_CMDQ_V1_8822B) & BIT_MASK_QUEUEAC_CMDQ_V1_8822B)
+
 
 #define BIT_TIDEMPTY_CMDQ_V1_8822B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_CMDQ_V2_8822B 11
 #define BIT_MASK_TAIL_PKT_CMDQ_V2_8822B 0x7ff
 #define BIT_TAIL_PKT_CMDQ_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_CMDQ_V2_8822B) << BIT_SHIFT_TAIL_PKT_CMDQ_V2_8822B)
-#define BIT_GET_TAIL_PKT_CMDQ_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_CMDQ_V2_8822B) & BIT_MASK_TAIL_PKT_CMDQ_V2_8822B)

+#define BIT_GET_TAIL_PKT_CMDQ_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_CMDQ_V2_8822B) & BIT_MASK_TAIL_PKT_CMDQ_V2_8822B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_CMDQ_V1_8822B 0
 #define BIT_MASK_HEAD_PKT_CMDQ_V1_8822B 0x7ff
 #define BIT_HEAD_PKT_CMDQ_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_CMDQ_V1_8822B) << BIT_SHIFT_HEAD_PKT_CMDQ_V1_8822B)
-#define BIT_GET_HEAD_PKT_CMDQ_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_CMDQ_V1_8822B) & BIT_MASK_HEAD_PKT_CMDQ_V1_8822B)

+#define BIT_GET_HEAD_PKT_CMDQ_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_CMDQ_V1_8822B) & BIT_MASK_HEAD_PKT_CMDQ_V1_8822B)
+
 
 
 /* 2 REG_Q4_INFO_8822B */
@@ -5290,26 +5815,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q4_V1_8822B 25
 #define BIT_MASK_QUEUEMACID_Q4_V1_8822B 0x7f
 #define BIT_QUEUEMACID_Q4_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_Q4_V1_8822B) << BIT_SHIFT_QUEUEMACID_Q4_V1_8822B)
-#define BIT_GET_QUEUEMACID_Q4_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q4_V1_8822B) & BIT_MASK_QUEUEMACID_Q4_V1_8822B)

+#define BIT_GET_QUEUEMACID_Q4_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q4_V1_8822B) & BIT_MASK_QUEUEMACID_Q4_V1_8822B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q4_V1_8822B 23
 #define BIT_MASK_QUEUEAC_Q4_V1_8822B 0x3
 #define BIT_QUEUEAC_Q4_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_Q4_V1_8822B) << BIT_SHIFT_QUEUEAC_Q4_V1_8822B)
-#define BIT_GET_QUEUEAC_Q4_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q4_V1_8822B) & BIT_MASK_QUEUEAC_Q4_V1_8822B)

+#define BIT_GET_QUEUEAC_Q4_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q4_V1_8822B) & BIT_MASK_QUEUEAC_Q4_V1_8822B)
+
 
 #define BIT_TIDEMPTY_Q4_V1_8822B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q4_V2_8822B 11
 #define BIT_MASK_TAIL_PKT_Q4_V2_8822B 0x7ff
 #define BIT_TAIL_PKT_Q4_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_Q4_V2_8822B) << BIT_SHIFT_TAIL_PKT_Q4_V2_8822B)
-#define BIT_GET_TAIL_PKT_Q4_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q4_V2_8822B) & BIT_MASK_TAIL_PKT_Q4_V2_8822B)

+#define BIT_GET_TAIL_PKT_Q4_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q4_V2_8822B) & BIT_MASK_TAIL_PKT_Q4_V2_8822B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q4_V1_8822B 0
 #define BIT_MASK_HEAD_PKT_Q4_V1_8822B 0x7ff
 #define BIT_HEAD_PKT_Q4_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_Q4_V1_8822B) << BIT_SHIFT_HEAD_PKT_Q4_V1_8822B)
-#define BIT_GET_HEAD_PKT_Q4_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q4_V1_8822B) & BIT_MASK_HEAD_PKT_Q4_V1_8822B)

+#define BIT_GET_HEAD_PKT_Q4_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q4_V1_8822B) & BIT_MASK_HEAD_PKT_Q4_V1_8822B)
+
 
 
 /* 2 REG_Q5_INFO_8822B */
@@ -5317,26 +5846,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q5_V1_8822B 25
 #define BIT_MASK_QUEUEMACID_Q5_V1_8822B 0x7f
 #define BIT_QUEUEMACID_Q5_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_Q5_V1_8822B) << BIT_SHIFT_QUEUEMACID_Q5_V1_8822B)
-#define BIT_GET_QUEUEMACID_Q5_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q5_V1_8822B) & BIT_MASK_QUEUEMACID_Q5_V1_8822B)

+#define BIT_GET_QUEUEMACID_Q5_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q5_V1_8822B) & BIT_MASK_QUEUEMACID_Q5_V1_8822B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q5_V1_8822B 23
 #define BIT_MASK_QUEUEAC_Q5_V1_8822B 0x3
 #define BIT_QUEUEAC_Q5_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_Q5_V1_8822B) << BIT_SHIFT_QUEUEAC_Q5_V1_8822B)
-#define BIT_GET_QUEUEAC_Q5_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q5_V1_8822B) & BIT_MASK_QUEUEAC_Q5_V1_8822B)

+#define BIT_GET_QUEUEAC_Q5_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q5_V1_8822B) & BIT_MASK_QUEUEAC_Q5_V1_8822B)
+
 
 #define BIT_TIDEMPTY_Q5_V1_8822B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q5_V2_8822B 11
 #define BIT_MASK_TAIL_PKT_Q5_V2_8822B 0x7ff
 #define BIT_TAIL_PKT_Q5_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_Q5_V2_8822B) << BIT_SHIFT_TAIL_PKT_Q5_V2_8822B)
-#define BIT_GET_TAIL_PKT_Q5_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q5_V2_8822B) & BIT_MASK_TAIL_PKT_Q5_V2_8822B)

+#define BIT_GET_TAIL_PKT_Q5_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q5_V2_8822B) & BIT_MASK_TAIL_PKT_Q5_V2_8822B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q5_V1_8822B 0
 #define BIT_MASK_HEAD_PKT_Q5_V1_8822B 0x7ff
 #define BIT_HEAD_PKT_Q5_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_Q5_V1_8822B) << BIT_SHIFT_HEAD_PKT_Q5_V1_8822B)
-#define BIT_GET_HEAD_PKT_Q5_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q5_V1_8822B) & BIT_MASK_HEAD_PKT_Q5_V1_8822B)

+#define BIT_GET_HEAD_PKT_Q5_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q5_V1_8822B) & BIT_MASK_HEAD_PKT_Q5_V1_8822B)
+
 
 
 /* 2 REG_Q6_INFO_8822B */
@@ -5344,26 +5877,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q6_V1_8822B 25
 #define BIT_MASK_QUEUEMACID_Q6_V1_8822B 0x7f
 #define BIT_QUEUEMACID_Q6_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_Q6_V1_8822B) << BIT_SHIFT_QUEUEMACID_Q6_V1_8822B)
-#define BIT_GET_QUEUEMACID_Q6_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q6_V1_8822B) & BIT_MASK_QUEUEMACID_Q6_V1_8822B)

+#define BIT_GET_QUEUEMACID_Q6_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q6_V1_8822B) & BIT_MASK_QUEUEMACID_Q6_V1_8822B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q6_V1_8822B 23
 #define BIT_MASK_QUEUEAC_Q6_V1_8822B 0x3
 #define BIT_QUEUEAC_Q6_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_Q6_V1_8822B) << BIT_SHIFT_QUEUEAC_Q6_V1_8822B)
-#define BIT_GET_QUEUEAC_Q6_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q6_V1_8822B) & BIT_MASK_QUEUEAC_Q6_V1_8822B)

+#define BIT_GET_QUEUEAC_Q6_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q6_V1_8822B) & BIT_MASK_QUEUEAC_Q6_V1_8822B)
+
 
 #define BIT_TIDEMPTY_Q6_V1_8822B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q6_V2_8822B 11
 #define BIT_MASK_TAIL_PKT_Q6_V2_8822B 0x7ff
 #define BIT_TAIL_PKT_Q6_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_Q6_V2_8822B) << BIT_SHIFT_TAIL_PKT_Q6_V2_8822B)
-#define BIT_GET_TAIL_PKT_Q6_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q6_V2_8822B) & BIT_MASK_TAIL_PKT_Q6_V2_8822B)

+#define BIT_GET_TAIL_PKT_Q6_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q6_V2_8822B) & BIT_MASK_TAIL_PKT_Q6_V2_8822B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q6_V1_8822B 0
 #define BIT_MASK_HEAD_PKT_Q6_V1_8822B 0x7ff
 #define BIT_HEAD_PKT_Q6_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_Q6_V1_8822B) << BIT_SHIFT_HEAD_PKT_Q6_V1_8822B)
-#define BIT_GET_HEAD_PKT_Q6_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q6_V1_8822B) & BIT_MASK_HEAD_PKT_Q6_V1_8822B)

+#define BIT_GET_HEAD_PKT_Q6_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q6_V1_8822B) & BIT_MASK_HEAD_PKT_Q6_V1_8822B)
+
 
 
 /* 2 REG_Q7_INFO_8822B */
@@ -5371,26 +5908,30 @@
 #define BIT_SHIFT_QUEUEMACID_Q7_V1_8822B 25
 #define BIT_MASK_QUEUEMACID_Q7_V1_8822B 0x7f
 #define BIT_QUEUEMACID_Q7_V1_8822B(x) (((x) & BIT_MASK_QUEUEMACID_Q7_V1_8822B) << BIT_SHIFT_QUEUEMACID_Q7_V1_8822B)
-#define BIT_GET_QUEUEMACID_Q7_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q7_V1_8822B) & BIT_MASK_QUEUEMACID_Q7_V1_8822B)

+#define BIT_GET_QUEUEMACID_Q7_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEMACID_Q7_V1_8822B) & BIT_MASK_QUEUEMACID_Q7_V1_8822B)
+
 
 
 #define BIT_SHIFT_QUEUEAC_Q7_V1_8822B 23
 #define BIT_MASK_QUEUEAC_Q7_V1_8822B 0x3
 #define BIT_QUEUEAC_Q7_V1_8822B(x) (((x) & BIT_MASK_QUEUEAC_Q7_V1_8822B) << BIT_SHIFT_QUEUEAC_Q7_V1_8822B)
-#define BIT_GET_QUEUEAC_Q7_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q7_V1_8822B) & BIT_MASK_QUEUEAC_Q7_V1_8822B)

+#define BIT_GET_QUEUEAC_Q7_V1_8822B(x) (((x) >> BIT_SHIFT_QUEUEAC_Q7_V1_8822B) & BIT_MASK_QUEUEAC_Q7_V1_8822B)
+
 
 #define BIT_TIDEMPTY_Q7_V1_8822B BIT(22)
 
 #define BIT_SHIFT_TAIL_PKT_Q7_V2_8822B 11
 #define BIT_MASK_TAIL_PKT_Q7_V2_8822B 0x7ff
 #define BIT_TAIL_PKT_Q7_V2_8822B(x) (((x) & BIT_MASK_TAIL_PKT_Q7_V2_8822B) << BIT_SHIFT_TAIL_PKT_Q7_V2_8822B)
-#define BIT_GET_TAIL_PKT_Q7_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q7_V2_8822B) & BIT_MASK_TAIL_PKT_Q7_V2_8822B)

+#define BIT_GET_TAIL_PKT_Q7_V2_8822B(x) (((x) >> BIT_SHIFT_TAIL_PKT_Q7_V2_8822B) & BIT_MASK_TAIL_PKT_Q7_V2_8822B)
+
 
 
 #define BIT_SHIFT_HEAD_PKT_Q7_V1_8822B 0
 #define BIT_MASK_HEAD_PKT_Q7_V1_8822B 0x7ff
 #define BIT_HEAD_PKT_Q7_V1_8822B(x) (((x) & BIT_MASK_HEAD_PKT_Q7_V1_8822B) << BIT_SHIFT_HEAD_PKT_Q7_V1_8822B)
-#define BIT_GET_HEAD_PKT_Q7_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q7_V1_8822B) & BIT_MASK_HEAD_PKT_Q7_V1_8822B)

+#define BIT_GET_HEAD_PKT_Q7_V1_8822B(x) (((x) >> BIT_SHIFT_HEAD_PKT_Q7_V1_8822B) & BIT_MASK_HEAD_PKT_Q7_V1_8822B)
+
 
 
 /* 2 REG_WMAC_LBK_BUF_HD_V1_8822B */
@@ -5398,7 +5939,8 @@
 #define BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8822B 0
 #define BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8822B 0xfff
 #define BIT_WMAC_LBK_BUF_HEAD_V1_8822B(x) (((x) & BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8822B) << BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8822B)
-#define BIT_GET_WMAC_LBK_BUF_HEAD_V1_8822B(x) (((x) >> BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8822B) & BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8822B)

+#define BIT_GET_WMAC_LBK_BUF_HEAD_V1_8822B(x) (((x) >> BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8822B) & BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8822B)
+
 
 
 /* 2 REG_MGQ_BDNY_V1_8822B */
@@ -5406,7 +5948,8 @@
 #define BIT_SHIFT_MGQ_PGBNDY_V1_8822B 0
 #define BIT_MASK_MGQ_PGBNDY_V1_8822B 0xfff
 #define BIT_MGQ_PGBNDY_V1_8822B(x) (((x) & BIT_MASK_MGQ_PGBNDY_V1_8822B) << BIT_SHIFT_MGQ_PGBNDY_V1_8822B)
-#define BIT_GET_MGQ_PGBNDY_V1_8822B(x) (((x) >> BIT_SHIFT_MGQ_PGBNDY_V1_8822B) & BIT_MASK_MGQ_PGBNDY_V1_8822B)

+#define BIT_GET_MGQ_PGBNDY_V1_8822B(x) (((x) >> BIT_SHIFT_MGQ_PGBNDY_V1_8822B) & BIT_MASK_MGQ_PGBNDY_V1_8822B)
+
 
 
 /* 2 REG_TXRPT_CTRL_8822B */
@@ -5414,25 +5957,29 @@
 #define BIT_SHIFT_TRXRPT_TIMER_TH_8822B 24
 #define BIT_MASK_TRXRPT_TIMER_TH_8822B 0xff
 #define BIT_TRXRPT_TIMER_TH_8822B(x) (((x) & BIT_MASK_TRXRPT_TIMER_TH_8822B) << BIT_SHIFT_TRXRPT_TIMER_TH_8822B)
-#define BIT_GET_TRXRPT_TIMER_TH_8822B(x) (((x) >> BIT_SHIFT_TRXRPT_TIMER_TH_8822B) & BIT_MASK_TRXRPT_TIMER_TH_8822B)

+#define BIT_GET_TRXRPT_TIMER_TH_8822B(x) (((x) >> BIT_SHIFT_TRXRPT_TIMER_TH_8822B) & BIT_MASK_TRXRPT_TIMER_TH_8822B)
+
 
 
 #define BIT_SHIFT_TRXRPT_LEN_TH_8822B 16
 #define BIT_MASK_TRXRPT_LEN_TH_8822B 0xff
 #define BIT_TRXRPT_LEN_TH_8822B(x) (((x) & BIT_MASK_TRXRPT_LEN_TH_8822B) << BIT_SHIFT_TRXRPT_LEN_TH_8822B)
-#define BIT_GET_TRXRPT_LEN_TH_8822B(x) (((x) >> BIT_SHIFT_TRXRPT_LEN_TH_8822B) & BIT_MASK_TRXRPT_LEN_TH_8822B)

+#define BIT_GET_TRXRPT_LEN_TH_8822B(x) (((x) >> BIT_SHIFT_TRXRPT_LEN_TH_8822B) & BIT_MASK_TRXRPT_LEN_TH_8822B)
+
 
 
 #define BIT_SHIFT_TRXRPT_READ_PTR_8822B 8
 #define BIT_MASK_TRXRPT_READ_PTR_8822B 0xff
 #define BIT_TRXRPT_READ_PTR_8822B(x) (((x) & BIT_MASK_TRXRPT_READ_PTR_8822B) << BIT_SHIFT_TRXRPT_READ_PTR_8822B)
-#define BIT_GET_TRXRPT_READ_PTR_8822B(x) (((x) >> BIT_SHIFT_TRXRPT_READ_PTR_8822B) & BIT_MASK_TRXRPT_READ_PTR_8822B)

+#define BIT_GET_TRXRPT_READ_PTR_8822B(x) (((x) >> BIT_SHIFT_TRXRPT_READ_PTR_8822B) & BIT_MASK_TRXRPT_READ_PTR_8822B)
+
 
 
 #define BIT_SHIFT_TRXRPT_WRITE_PTR_8822B 0
 #define BIT_MASK_TRXRPT_WRITE_PTR_8822B 0xff
 #define BIT_TRXRPT_WRITE_PTR_8822B(x) (((x) & BIT_MASK_TRXRPT_WRITE_PTR_8822B) << BIT_SHIFT_TRXRPT_WRITE_PTR_8822B)
-#define BIT_GET_TRXRPT_WRITE_PTR_8822B(x) (((x) >> BIT_SHIFT_TRXRPT_WRITE_PTR_8822B) & BIT_MASK_TRXRPT_WRITE_PTR_8822B)

+#define BIT_GET_TRXRPT_WRITE_PTR_8822B(x) (((x) >> BIT_SHIFT_TRXRPT_WRITE_PTR_8822B) & BIT_MASK_TRXRPT_WRITE_PTR_8822B)
+
 
 
 /* 2 REG_INIRTS_RATE_SEL_8822B */
@@ -5443,7 +5990,8 @@
 #define BIT_SHIFT_BASIC_CFEND_RATE_8822B 0
 #define BIT_MASK_BASIC_CFEND_RATE_8822B 0x1f
 #define BIT_BASIC_CFEND_RATE_8822B(x) (((x) & BIT_MASK_BASIC_CFEND_RATE_8822B) << BIT_SHIFT_BASIC_CFEND_RATE_8822B)
-#define BIT_GET_BASIC_CFEND_RATE_8822B(x) (((x) >> BIT_SHIFT_BASIC_CFEND_RATE_8822B) & BIT_MASK_BASIC_CFEND_RATE_8822B)

+#define BIT_GET_BASIC_CFEND_RATE_8822B(x) (((x) >> BIT_SHIFT_BASIC_CFEND_RATE_8822B) & BIT_MASK_BASIC_CFEND_RATE_8822B)
+
 
 
 /* 2 REG_STBC_CFEND_RATE_8822B */
@@ -5451,7 +5999,8 @@
 #define BIT_SHIFT_STBC_CFEND_RATE_8822B 0
 #define BIT_MASK_STBC_CFEND_RATE_8822B 0x1f
 #define BIT_STBC_CFEND_RATE_8822B(x) (((x) & BIT_MASK_STBC_CFEND_RATE_8822B) << BIT_SHIFT_STBC_CFEND_RATE_8822B)
-#define BIT_GET_STBC_CFEND_RATE_8822B(x) (((x) >> BIT_SHIFT_STBC_CFEND_RATE_8822B) & BIT_MASK_STBC_CFEND_RATE_8822B)

+#define BIT_GET_STBC_CFEND_RATE_8822B(x) (((x) >> BIT_SHIFT_STBC_CFEND_RATE_8822B) & BIT_MASK_STBC_CFEND_RATE_8822B)
+
 
 
 /* 2 REG_DATA_SC_8822B */
@@ -5459,13 +6008,15 @@
 #define BIT_SHIFT_TXSC_40M_8822B 4
 #define BIT_MASK_TXSC_40M_8822B 0xf
 #define BIT_TXSC_40M_8822B(x) (((x) & BIT_MASK_TXSC_40M_8822B) << BIT_SHIFT_TXSC_40M_8822B)
-#define BIT_GET_TXSC_40M_8822B(x) (((x) >> BIT_SHIFT_TXSC_40M_8822B) & BIT_MASK_TXSC_40M_8822B)

+#define BIT_GET_TXSC_40M_8822B(x) (((x) >> BIT_SHIFT_TXSC_40M_8822B) & BIT_MASK_TXSC_40M_8822B)
+
 
 
 #define BIT_SHIFT_TXSC_20M_8822B 0
 #define BIT_MASK_TXSC_20M_8822B 0xf
 #define BIT_TXSC_20M_8822B(x) (((x) & BIT_MASK_TXSC_20M_8822B) << BIT_SHIFT_TXSC_20M_8822B)
-#define BIT_GET_TXSC_20M_8822B(x) (((x) >> BIT_SHIFT_TXSC_20M_8822B) & BIT_MASK_TXSC_20M_8822B)

+#define BIT_GET_TXSC_20M_8822B(x) (((x) >> BIT_SHIFT_TXSC_20M_8822B) & BIT_MASK_TXSC_20M_8822B)
+
 
 
 /* 2 REG_MACID_SLEEP3_8822B */
@@ -5473,7 +6024,8 @@
 #define BIT_SHIFT_MACID127_96_PKTSLEEP_8822B 0
 #define BIT_MASK_MACID127_96_PKTSLEEP_8822B 0xffffffffL
 #define BIT_MACID127_96_PKTSLEEP_8822B(x) (((x) & BIT_MASK_MACID127_96_PKTSLEEP_8822B) << BIT_SHIFT_MACID127_96_PKTSLEEP_8822B)
-#define BIT_GET_MACID127_96_PKTSLEEP_8822B(x) (((x) >> BIT_SHIFT_MACID127_96_PKTSLEEP_8822B) & BIT_MASK_MACID127_96_PKTSLEEP_8822B)

+#define BIT_GET_MACID127_96_PKTSLEEP_8822B(x) (((x) >> BIT_SHIFT_MACID127_96_PKTSLEEP_8822B) & BIT_MASK_MACID127_96_PKTSLEEP_8822B)
+
 
 
 /* 2 REG_MACID_SLEEP1_8822B */
@@ -5481,7 +6033,8 @@
 #define BIT_SHIFT_MACID63_32_PKTSLEEP_8822B 0
 #define BIT_MASK_MACID63_32_PKTSLEEP_8822B 0xffffffffL
 #define BIT_MACID63_32_PKTSLEEP_8822B(x) (((x) & BIT_MASK_MACID63_32_PKTSLEEP_8822B) << BIT_SHIFT_MACID63_32_PKTSLEEP_8822B)
-#define BIT_GET_MACID63_32_PKTSLEEP_8822B(x) (((x) >> BIT_SHIFT_MACID63_32_PKTSLEEP_8822B) & BIT_MASK_MACID63_32_PKTSLEEP_8822B)

+#define BIT_GET_MACID63_32_PKTSLEEP_8822B(x) (((x) >> BIT_SHIFT_MACID63_32_PKTSLEEP_8822B) & BIT_MASK_MACID63_32_PKTSLEEP_8822B)
+
 
 
 /* 2 REG_ARFR2_V1_8822B */
@@ -5489,7 +6042,8 @@
 #define BIT_SHIFT_ARFR2_V1_8822B 0
 #define BIT_MASK_ARFR2_V1_8822B 0xffffffffffffffffL
 #define BIT_ARFR2_V1_8822B(x) (((x) & BIT_MASK_ARFR2_V1_8822B) << BIT_SHIFT_ARFR2_V1_8822B)
-#define BIT_GET_ARFR2_V1_8822B(x) (((x) >> BIT_SHIFT_ARFR2_V1_8822B) & BIT_MASK_ARFR2_V1_8822B)

+#define BIT_GET_ARFR2_V1_8822B(x) (((x) >> BIT_SHIFT_ARFR2_V1_8822B) & BIT_MASK_ARFR2_V1_8822B)
+
 
 
 /* 2 REG_ARFR3_V1_8822B */
@@ -5497,7 +6051,8 @@
 #define BIT_SHIFT_ARFR3_V1_8822B 0
 #define BIT_MASK_ARFR3_V1_8822B 0xffffffffffffffffL
 #define BIT_ARFR3_V1_8822B(x) (((x) & BIT_MASK_ARFR3_V1_8822B) << BIT_SHIFT_ARFR3_V1_8822B)
-#define BIT_GET_ARFR3_V1_8822B(x) (((x) >> BIT_SHIFT_ARFR3_V1_8822B) & BIT_MASK_ARFR3_V1_8822B)

+#define BIT_GET_ARFR3_V1_8822B(x) (((x) >> BIT_SHIFT_ARFR3_V1_8822B) & BIT_MASK_ARFR3_V1_8822B)
+
 
 
 /* 2 REG_ARFR4_8822B */
@@ -5505,7 +6060,8 @@
 #define BIT_SHIFT_ARFR4_8822B 0
 #define BIT_MASK_ARFR4_8822B 0xffffffffffffffffL
 #define BIT_ARFR4_8822B(x) (((x) & BIT_MASK_ARFR4_8822B) << BIT_SHIFT_ARFR4_8822B)
-#define BIT_GET_ARFR4_8822B(x) (((x) >> BIT_SHIFT_ARFR4_8822B) & BIT_MASK_ARFR4_8822B)

+#define BIT_GET_ARFR4_8822B(x) (((x) >> BIT_SHIFT_ARFR4_8822B) & BIT_MASK_ARFR4_8822B)
+
 
 
 /* 2 REG_ARFR5_8822B */
@@ -5513,7 +6069,8 @@
 #define BIT_SHIFT_ARFR5_8822B 0
 #define BIT_MASK_ARFR5_8822B 0xffffffffffffffffL
 #define BIT_ARFR5_8822B(x) (((x) & BIT_MASK_ARFR5_8822B) << BIT_SHIFT_ARFR5_8822B)
-#define BIT_GET_ARFR5_8822B(x) (((x) >> BIT_SHIFT_ARFR5_8822B) & BIT_MASK_ARFR5_8822B)

+#define BIT_GET_ARFR5_8822B(x) (((x) >> BIT_SHIFT_ARFR5_8822B) & BIT_MASK_ARFR5_8822B)
+
 
 
 /* 2 REG_TXRPT_START_OFFSET_8822B */
@@ -5521,20 +6078,23 @@
 #define BIT_SHIFT_MACID_MURATE_OFFSET_8822B 24
 #define BIT_MASK_MACID_MURATE_OFFSET_8822B 0xff
 #define BIT_MACID_MURATE_OFFSET_8822B(x) (((x) & BIT_MASK_MACID_MURATE_OFFSET_8822B) << BIT_SHIFT_MACID_MURATE_OFFSET_8822B)
-#define BIT_GET_MACID_MURATE_OFFSET_8822B(x) (((x) >> BIT_SHIFT_MACID_MURATE_OFFSET_8822B) & BIT_MASK_MACID_MURATE_OFFSET_8822B)

+#define BIT_GET_MACID_MURATE_OFFSET_8822B(x) (((x) >> BIT_SHIFT_MACID_MURATE_OFFSET_8822B) & BIT_MASK_MACID_MURATE_OFFSET_8822B)
+
 
 #define BIT_RPTFIFO_SIZE_OPT_8822B BIT(16)
 
 #define BIT_SHIFT_MACID_CTRL_OFFSET_8822B 8
 #define BIT_MASK_MACID_CTRL_OFFSET_8822B 0xff
 #define BIT_MACID_CTRL_OFFSET_8822B(x) (((x) & BIT_MASK_MACID_CTRL_OFFSET_8822B) << BIT_SHIFT_MACID_CTRL_OFFSET_8822B)
-#define BIT_GET_MACID_CTRL_OFFSET_8822B(x) (((x) >> BIT_SHIFT_MACID_CTRL_OFFSET_8822B) & BIT_MASK_MACID_CTRL_OFFSET_8822B)

+#define BIT_GET_MACID_CTRL_OFFSET_8822B(x) (((x) >> BIT_SHIFT_MACID_CTRL_OFFSET_8822B) & BIT_MASK_MACID_CTRL_OFFSET_8822B)
+
 
 
 #define BIT_SHIFT_AMPDU_TXRPT_OFFSET_8822B 0
 #define BIT_MASK_AMPDU_TXRPT_OFFSET_8822B 0xff
 #define BIT_AMPDU_TXRPT_OFFSET_8822B(x) (((x) & BIT_MASK_AMPDU_TXRPT_OFFSET_8822B) << BIT_SHIFT_AMPDU_TXRPT_OFFSET_8822B)
-#define BIT_GET_AMPDU_TXRPT_OFFSET_8822B(x) (((x) >> BIT_SHIFT_AMPDU_TXRPT_OFFSET_8822B) & BIT_MASK_AMPDU_TXRPT_OFFSET_8822B)

+#define BIT_GET_AMPDU_TXRPT_OFFSET_8822B(x) (((x) >> BIT_SHIFT_AMPDU_TXRPT_OFFSET_8822B) & BIT_MASK_AMPDU_TXRPT_OFFSET_8822B)
+
 
 
 /* 2 REG_POWER_STAGE1_8822B */
@@ -5550,7 +6110,8 @@
 #define BIT_SHIFT_POWER_STAGE1_8822B 0
 #define BIT_MASK_POWER_STAGE1_8822B 0xffffff
 #define BIT_POWER_STAGE1_8822B(x) (((x) & BIT_MASK_POWER_STAGE1_8822B) << BIT_SHIFT_POWER_STAGE1_8822B)
-#define BIT_GET_POWER_STAGE1_8822B(x) (((x) >> BIT_SHIFT_POWER_STAGE1_8822B) & BIT_MASK_POWER_STAGE1_8822B)

+#define BIT_GET_POWER_STAGE1_8822B(x) (((x) >> BIT_SHIFT_POWER_STAGE1_8822B) & BIT_MASK_POWER_STAGE1_8822B)
+
 
 
 /* 2 REG_POWER_STAGE2_8822B */
@@ -5559,7 +6120,8 @@
 #define BIT_SHIFT_POWER_STAGE2_8822B 0
 #define BIT_MASK_POWER_STAGE2_8822B 0xffffff
 #define BIT_POWER_STAGE2_8822B(x) (((x) & BIT_MASK_POWER_STAGE2_8822B) << BIT_SHIFT_POWER_STAGE2_8822B)
-#define BIT_GET_POWER_STAGE2_8822B(x) (((x) >> BIT_SHIFT_POWER_STAGE2_8822B) & BIT_MASK_POWER_STAGE2_8822B)

+#define BIT_GET_POWER_STAGE2_8822B(x) (((x) >> BIT_SHIFT_POWER_STAGE2_8822B) & BIT_MASK_POWER_STAGE2_8822B)
+
 
 
 /* 2 REG_SW_AMPDU_BURST_MODE_CTRL_8822B */
@@ -5567,7 +6129,8 @@
 #define BIT_SHIFT_PAD_NUM_THRES_8822B 24
 #define BIT_MASK_PAD_NUM_THRES_8822B 0x3f
 #define BIT_PAD_NUM_THRES_8822B(x) (((x) & BIT_MASK_PAD_NUM_THRES_8822B) << BIT_SHIFT_PAD_NUM_THRES_8822B)
-#define BIT_GET_PAD_NUM_THRES_8822B(x) (((x) >> BIT_SHIFT_PAD_NUM_THRES_8822B) & BIT_MASK_PAD_NUM_THRES_8822B)

+#define BIT_GET_PAD_NUM_THRES_8822B(x) (((x) >> BIT_SHIFT_PAD_NUM_THRES_8822B) & BIT_MASK_PAD_NUM_THRES_8822B)
+
 
 #define BIT_R_DMA_THIS_QUEUE_BK_8822B BIT(23)
 #define BIT_R_DMA_THIS_QUEUE_BE_8822B BIT(22)
@@ -5577,7 +6140,8 @@
 #define BIT_SHIFT_R_TOTAL_LEN_TH_8822B 8
 #define BIT_MASK_R_TOTAL_LEN_TH_8822B 0xfff
 #define BIT_R_TOTAL_LEN_TH_8822B(x) (((x) & BIT_MASK_R_TOTAL_LEN_TH_8822B) << BIT_SHIFT_R_TOTAL_LEN_TH_8822B)
-#define BIT_GET_R_TOTAL_LEN_TH_8822B(x) (((x) >> BIT_SHIFT_R_TOTAL_LEN_TH_8822B) & BIT_MASK_R_TOTAL_LEN_TH_8822B)

+#define BIT_GET_R_TOTAL_LEN_TH_8822B(x) (((x) >> BIT_SHIFT_R_TOTAL_LEN_TH_8822B) & BIT_MASK_R_TOTAL_LEN_TH_8822B)
+
 
 #define BIT_EN_NEW_EARLY_8822B BIT(7)
 #define BIT_PRE_TX_CMD_8822B BIT(6)
@@ -5585,7 +6149,8 @@
 #define BIT_SHIFT_NUM_SCL_EN_8822B 4
 #define BIT_MASK_NUM_SCL_EN_8822B 0x3
 #define BIT_NUM_SCL_EN_8822B(x) (((x) & BIT_MASK_NUM_SCL_EN_8822B) << BIT_SHIFT_NUM_SCL_EN_8822B)
-#define BIT_GET_NUM_SCL_EN_8822B(x) (((x) >> BIT_SHIFT_NUM_SCL_EN_8822B) & BIT_MASK_NUM_SCL_EN_8822B)

+#define BIT_GET_NUM_SCL_EN_8822B(x) (((x) >> BIT_SHIFT_NUM_SCL_EN_8822B) & BIT_MASK_NUM_SCL_EN_8822B)
+
 
 #define BIT_BK_EN_8822B BIT(3)
 #define BIT_BE_EN_8822B BIT(2)
@@ -5597,13 +6162,15 @@
 #define BIT_SHIFT_PKT_LIFTIME_BEBK_8822B 16
 #define BIT_MASK_PKT_LIFTIME_BEBK_8822B 0xffff
 #define BIT_PKT_LIFTIME_BEBK_8822B(x) (((x) & BIT_MASK_PKT_LIFTIME_BEBK_8822B) << BIT_SHIFT_PKT_LIFTIME_BEBK_8822B)
-#define BIT_GET_PKT_LIFTIME_BEBK_8822B(x) (((x) >> BIT_SHIFT_PKT_LIFTIME_BEBK_8822B) & BIT_MASK_PKT_LIFTIME_BEBK_8822B)

+#define BIT_GET_PKT_LIFTIME_BEBK_8822B(x) (((x) >> BIT_SHIFT_PKT_LIFTIME_BEBK_8822B) & BIT_MASK_PKT_LIFTIME_BEBK_8822B)
+
 
 
 #define BIT_SHIFT_PKT_LIFTIME_VOVI_8822B 0
 #define BIT_MASK_PKT_LIFTIME_VOVI_8822B 0xffff
 #define BIT_PKT_LIFTIME_VOVI_8822B(x) (((x) & BIT_MASK_PKT_LIFTIME_VOVI_8822B) << BIT_SHIFT_PKT_LIFTIME_VOVI_8822B)
-#define BIT_GET_PKT_LIFTIME_VOVI_8822B(x) (((x) >> BIT_SHIFT_PKT_LIFTIME_VOVI_8822B) & BIT_MASK_PKT_LIFTIME_VOVI_8822B)

+#define BIT_GET_PKT_LIFTIME_VOVI_8822B(x) (((x) >> BIT_SHIFT_PKT_LIFTIME_VOVI_8822B) & BIT_MASK_PKT_LIFTIME_VOVI_8822B)
+
 
 
 /* 2 REG_STBC_SETTING_8822B */
@@ -5611,19 +6178,22 @@
 #define BIT_SHIFT_CDEND_TXTIME_L_8822B 4
 #define BIT_MASK_CDEND_TXTIME_L_8822B 0xf
 #define BIT_CDEND_TXTIME_L_8822B(x) (((x) & BIT_MASK_CDEND_TXTIME_L_8822B) << BIT_SHIFT_CDEND_TXTIME_L_8822B)
-#define BIT_GET_CDEND_TXTIME_L_8822B(x) (((x) >> BIT_SHIFT_CDEND_TXTIME_L_8822B) & BIT_MASK_CDEND_TXTIME_L_8822B)

+#define BIT_GET_CDEND_TXTIME_L_8822B(x) (((x) >> BIT_SHIFT_CDEND_TXTIME_L_8822B) & BIT_MASK_CDEND_TXTIME_L_8822B)
+
 
 
 #define BIT_SHIFT_NESS_8822B 2
 #define BIT_MASK_NESS_8822B 0x3
 #define BIT_NESS_8822B(x) (((x) & BIT_MASK_NESS_8822B) << BIT_SHIFT_NESS_8822B)
-#define BIT_GET_NESS_8822B(x) (((x) >> BIT_SHIFT_NESS_8822B) & BIT_MASK_NESS_8822B)

+#define BIT_GET_NESS_8822B(x) (((x) >> BIT_SHIFT_NESS_8822B) & BIT_MASK_NESS_8822B)
+
 
 
 #define BIT_SHIFT_STBC_CFEND_8822B 0
 #define BIT_MASK_STBC_CFEND_8822B 0x3
 #define BIT_STBC_CFEND_8822B(x) (((x) & BIT_MASK_STBC_CFEND_8822B) << BIT_SHIFT_STBC_CFEND_8822B)
-#define BIT_GET_STBC_CFEND_8822B(x) (((x) >> BIT_SHIFT_STBC_CFEND_8822B) & BIT_MASK_STBC_CFEND_8822B)

+#define BIT_GET_STBC_CFEND_8822B(x) (((x) >> BIT_SHIFT_STBC_CFEND_8822B) & BIT_MASK_STBC_CFEND_8822B)
+
 
 
 /* 2 REG_STBC_SETTING2_8822B */
@@ -5631,7 +6201,8 @@
 #define BIT_SHIFT_CDEND_TXTIME_H_8822B 0
 #define BIT_MASK_CDEND_TXTIME_H_8822B 0x1f
 #define BIT_CDEND_TXTIME_H_8822B(x) (((x) & BIT_MASK_CDEND_TXTIME_H_8822B) << BIT_SHIFT_CDEND_TXTIME_H_8822B)
-#define BIT_GET_CDEND_TXTIME_H_8822B(x) (((x) >> BIT_SHIFT_CDEND_TXTIME_H_8822B) & BIT_MASK_CDEND_TXTIME_H_8822B)

+#define BIT_GET_CDEND_TXTIME_H_8822B(x) (((x) >> BIT_SHIFT_CDEND_TXTIME_H_8822B) & BIT_MASK_CDEND_TXTIME_H_8822B)
+
 
 
 /* 2 REG_QUEUE_CTRL_8822B */
@@ -5650,25 +6221,29 @@
 #define BIT_SHIFT_RTS_MAX_AGG_NUM_8822B 24
 #define BIT_MASK_RTS_MAX_AGG_NUM_8822B 0x3f
 #define BIT_RTS_MAX_AGG_NUM_8822B(x) (((x) & BIT_MASK_RTS_MAX_AGG_NUM_8822B) << BIT_SHIFT_RTS_MAX_AGG_NUM_8822B)
-#define BIT_GET_RTS_MAX_AGG_NUM_8822B(x) (((x) >> BIT_SHIFT_RTS_MAX_AGG_NUM_8822B) & BIT_MASK_RTS_MAX_AGG_NUM_8822B)

+#define BIT_GET_RTS_MAX_AGG_NUM_8822B(x) (((x) >> BIT_SHIFT_RTS_MAX_AGG_NUM_8822B) & BIT_MASK_RTS_MAX_AGG_NUM_8822B)
+
 
 
 #define BIT_SHIFT_MAX_AGG_NUM_8822B 16
 #define BIT_MASK_MAX_AGG_NUM_8822B 0x3f
 #define BIT_MAX_AGG_NUM_8822B(x) (((x) & BIT_MASK_MAX_AGG_NUM_8822B) << BIT_SHIFT_MAX_AGG_NUM_8822B)
-#define BIT_GET_MAX_AGG_NUM_8822B(x) (((x) >> BIT_SHIFT_MAX_AGG_NUM_8822B) & BIT_MASK_MAX_AGG_NUM_8822B)

+#define BIT_GET_MAX_AGG_NUM_8822B(x) (((x) >> BIT_SHIFT_MAX_AGG_NUM_8822B) & BIT_MASK_MAX_AGG_NUM_8822B)
+
 
 
 #define BIT_SHIFT_RTS_TXTIME_TH_8822B 8
 #define BIT_MASK_RTS_TXTIME_TH_8822B 0xff
 #define BIT_RTS_TXTIME_TH_8822B(x) (((x) & BIT_MASK_RTS_TXTIME_TH_8822B) << BIT_SHIFT_RTS_TXTIME_TH_8822B)
-#define BIT_GET_RTS_TXTIME_TH_8822B(x) (((x) >> BIT_SHIFT_RTS_TXTIME_TH_8822B) & BIT_MASK_RTS_TXTIME_TH_8822B)

+#define BIT_GET_RTS_TXTIME_TH_8822B(x) (((x) >> BIT_SHIFT_RTS_TXTIME_TH_8822B) & BIT_MASK_RTS_TXTIME_TH_8822B)
+
 
 
 #define BIT_SHIFT_RTS_LEN_TH_8822B 0
 #define BIT_MASK_RTS_LEN_TH_8822B 0xff
 #define BIT_RTS_LEN_TH_8822B(x) (((x) & BIT_MASK_RTS_LEN_TH_8822B) << BIT_SHIFT_RTS_LEN_TH_8822B)
-#define BIT_GET_RTS_LEN_TH_8822B(x) (((x) >> BIT_SHIFT_RTS_LEN_TH_8822B) & BIT_MASK_RTS_LEN_TH_8822B)

+#define BIT_GET_RTS_LEN_TH_8822B(x) (((x) >> BIT_SHIFT_RTS_LEN_TH_8822B) & BIT_MASK_RTS_LEN_TH_8822B)
+
 
 
 /* 2 REG_BAR_MODE_CTRL_8822B */
@@ -5676,20 +6251,23 @@
 #define BIT_SHIFT_BAR_RTY_LMT_8822B 16
 #define BIT_MASK_BAR_RTY_LMT_8822B 0x3
 #define BIT_BAR_RTY_LMT_8822B(x) (((x) & BIT_MASK_BAR_RTY_LMT_8822B) << BIT_SHIFT_BAR_RTY_LMT_8822B)
-#define BIT_GET_BAR_RTY_LMT_8822B(x) (((x) >> BIT_SHIFT_BAR_RTY_LMT_8822B) & BIT_MASK_BAR_RTY_LMT_8822B)

+#define BIT_GET_BAR_RTY_LMT_8822B(x) (((x) >> BIT_SHIFT_BAR_RTY_LMT_8822B) & BIT_MASK_BAR_RTY_LMT_8822B)
+
 
 
 #define BIT_SHIFT_BAR_PKT_TXTIME_TH_8822B 8
 #define BIT_MASK_BAR_PKT_TXTIME_TH_8822B 0xff
 #define BIT_BAR_PKT_TXTIME_TH_8822B(x) (((x) & BIT_MASK_BAR_PKT_TXTIME_TH_8822B) << BIT_SHIFT_BAR_PKT_TXTIME_TH_8822B)
-#define BIT_GET_BAR_PKT_TXTIME_TH_8822B(x) (((x) >> BIT_SHIFT_BAR_PKT_TXTIME_TH_8822B) & BIT_MASK_BAR_PKT_TXTIME_TH_8822B)

+#define BIT_GET_BAR_PKT_TXTIME_TH_8822B(x) (((x) >> BIT_SHIFT_BAR_PKT_TXTIME_TH_8822B) & BIT_MASK_BAR_PKT_TXTIME_TH_8822B)
+
 
 #define BIT_BAR_EN_V1_8822B BIT(6)
 
 #define BIT_SHIFT_BAR_PKTNUM_TH_V1_8822B 0
 #define BIT_MASK_BAR_PKTNUM_TH_V1_8822B 0x3f
 #define BIT_BAR_PKTNUM_TH_V1_8822B(x) (((x) & BIT_MASK_BAR_PKTNUM_TH_V1_8822B) << BIT_SHIFT_BAR_PKTNUM_TH_V1_8822B)
-#define BIT_GET_BAR_PKTNUM_TH_V1_8822B(x) (((x) >> BIT_SHIFT_BAR_PKTNUM_TH_V1_8822B) & BIT_MASK_BAR_PKTNUM_TH_V1_8822B)

+#define BIT_GET_BAR_PKTNUM_TH_V1_8822B(x) (((x) >> BIT_SHIFT_BAR_PKTNUM_TH_V1_8822B) & BIT_MASK_BAR_PKTNUM_TH_V1_8822B)
+
 
 
 /* 2 REG_RA_TRY_RATE_AGG_LMT_8822B */
@@ -5697,7 +6275,8 @@
 #define BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8822B 0
 #define BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8822B 0x3f
 #define BIT_RA_TRY_RATE_AGG_LMT_V1_8822B(x) (((x) & BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8822B) << BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8822B)
-#define BIT_GET_RA_TRY_RATE_AGG_LMT_V1_8822B(x) (((x) >> BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8822B) & BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8822B)

+#define BIT_GET_RA_TRY_RATE_AGG_LMT_V1_8822B(x) (((x) >> BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8822B) & BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8822B)
+
 
 
 /* 2 REG_MACID_SLEEP2_8822B */
@@ -5705,7 +6284,8 @@
 #define BIT_SHIFT_MACID95_64PKTSLEEP_8822B 0
 #define BIT_MASK_MACID95_64PKTSLEEP_8822B 0xffffffffL
 #define BIT_MACID95_64PKTSLEEP_8822B(x) (((x) & BIT_MASK_MACID95_64PKTSLEEP_8822B) << BIT_SHIFT_MACID95_64PKTSLEEP_8822B)
-#define BIT_GET_MACID95_64PKTSLEEP_8822B(x) (((x) >> BIT_SHIFT_MACID95_64PKTSLEEP_8822B) & BIT_MASK_MACID95_64PKTSLEEP_8822B)

+#define BIT_GET_MACID95_64PKTSLEEP_8822B(x) (((x) >> BIT_SHIFT_MACID95_64PKTSLEEP_8822B) & BIT_MASK_MACID95_64PKTSLEEP_8822B)
+
 
 
 /* 2 REG_MACID_SLEEP_8822B */
@@ -5713,7 +6293,8 @@
 #define BIT_SHIFT_MACID31_0_PKTSLEEP_8822B 0
 #define BIT_MASK_MACID31_0_PKTSLEEP_8822B 0xffffffffL
 #define BIT_MACID31_0_PKTSLEEP_8822B(x) (((x) & BIT_MASK_MACID31_0_PKTSLEEP_8822B) << BIT_SHIFT_MACID31_0_PKTSLEEP_8822B)
-#define BIT_GET_MACID31_0_PKTSLEEP_8822B(x) (((x) >> BIT_SHIFT_MACID31_0_PKTSLEEP_8822B) & BIT_MASK_MACID31_0_PKTSLEEP_8822B)

+#define BIT_GET_MACID31_0_PKTSLEEP_8822B(x) (((x) >> BIT_SHIFT_MACID31_0_PKTSLEEP_8822B) & BIT_MASK_MACID31_0_PKTSLEEP_8822B)
+
 
 
 /* 2 REG_HW_SEQ0_8822B */
@@ -5721,7 +6302,8 @@
 #define BIT_SHIFT_HW_SSN_SEQ0_8822B 0
 #define BIT_MASK_HW_SSN_SEQ0_8822B 0xfff
 #define BIT_HW_SSN_SEQ0_8822B(x) (((x) & BIT_MASK_HW_SSN_SEQ0_8822B) << BIT_SHIFT_HW_SSN_SEQ0_8822B)
-#define BIT_GET_HW_SSN_SEQ0_8822B(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ0_8822B) & BIT_MASK_HW_SSN_SEQ0_8822B)

+#define BIT_GET_HW_SSN_SEQ0_8822B(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ0_8822B) & BIT_MASK_HW_SSN_SEQ0_8822B)
+
 
 
 /* 2 REG_HW_SEQ1_8822B */
@@ -5729,7 +6311,8 @@
 #define BIT_SHIFT_HW_SSN_SEQ1_8822B 0
 #define BIT_MASK_HW_SSN_SEQ1_8822B 0xfff
 #define BIT_HW_SSN_SEQ1_8822B(x) (((x) & BIT_MASK_HW_SSN_SEQ1_8822B) << BIT_SHIFT_HW_SSN_SEQ1_8822B)
-#define BIT_GET_HW_SSN_SEQ1_8822B(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ1_8822B) & BIT_MASK_HW_SSN_SEQ1_8822B)

+#define BIT_GET_HW_SSN_SEQ1_8822B(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ1_8822B) & BIT_MASK_HW_SSN_SEQ1_8822B)
+
 
 
 /* 2 REG_HW_SEQ2_8822B */
@@ -5737,7 +6320,8 @@
 #define BIT_SHIFT_HW_SSN_SEQ2_8822B 0
 #define BIT_MASK_HW_SSN_SEQ2_8822B 0xfff
 #define BIT_HW_SSN_SEQ2_8822B(x) (((x) & BIT_MASK_HW_SSN_SEQ2_8822B) << BIT_SHIFT_HW_SSN_SEQ2_8822B)
-#define BIT_GET_HW_SSN_SEQ2_8822B(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ2_8822B) & BIT_MASK_HW_SSN_SEQ2_8822B)

+#define BIT_GET_HW_SSN_SEQ2_8822B(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ2_8822B) & BIT_MASK_HW_SSN_SEQ2_8822B)
+
 
 
 /* 2 REG_HW_SEQ3_8822B */
@@ -5745,7 +6329,8 @@
 #define BIT_SHIFT_HW_SSN_SEQ3_8822B 0
 #define BIT_MASK_HW_SSN_SEQ3_8822B 0xfff
 #define BIT_HW_SSN_SEQ3_8822B(x) (((x) & BIT_MASK_HW_SSN_SEQ3_8822B) << BIT_SHIFT_HW_SSN_SEQ3_8822B)
-#define BIT_GET_HW_SSN_SEQ3_8822B(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ3_8822B) & BIT_MASK_HW_SSN_SEQ3_8822B)

+#define BIT_GET_HW_SSN_SEQ3_8822B(x) (((x) >> BIT_SHIFT_HW_SSN_SEQ3_8822B) & BIT_MASK_HW_SSN_SEQ3_8822B)
+
 
 
 /* 2 REG_NULL_PKT_STATUS_V1_8822B */
@@ -5753,7 +6338,8 @@
 #define BIT_SHIFT_PTCL_TOTAL_PG_V2_8822B 2
 #define BIT_MASK_PTCL_TOTAL_PG_V2_8822B 0x3fff
 #define BIT_PTCL_TOTAL_PG_V2_8822B(x) (((x) & BIT_MASK_PTCL_TOTAL_PG_V2_8822B) << BIT_SHIFT_PTCL_TOTAL_PG_V2_8822B)
-#define BIT_GET_PTCL_TOTAL_PG_V2_8822B(x) (((x) >> BIT_SHIFT_PTCL_TOTAL_PG_V2_8822B) & BIT_MASK_PTCL_TOTAL_PG_V2_8822B)

+#define BIT_GET_PTCL_TOTAL_PG_V2_8822B(x) (((x) >> BIT_SHIFT_PTCL_TOTAL_PG_V2_8822B) & BIT_MASK_PTCL_TOTAL_PG_V2_8822B)
+
 
 #define BIT_TX_NULL_1_8822B BIT(1)
 #define BIT_TX_NULL_0_8822B BIT(0)
@@ -5787,7 +6373,8 @@
 #define BIT_SHIFT_BT_POLLUTE_PKT_CNT_8822B 0
 #define BIT_MASK_BT_POLLUTE_PKT_CNT_8822B 0xffff
 #define BIT_BT_POLLUTE_PKT_CNT_8822B(x) (((x) & BIT_MASK_BT_POLLUTE_PKT_CNT_8822B) << BIT_SHIFT_BT_POLLUTE_PKT_CNT_8822B)
-#define BIT_GET_BT_POLLUTE_PKT_CNT_8822B(x) (((x) >> BIT_SHIFT_BT_POLLUTE_PKT_CNT_8822B) & BIT_MASK_BT_POLLUTE_PKT_CNT_8822B)

+#define BIT_GET_BT_POLLUTE_PKT_CNT_8822B(x) (((x) >> BIT_SHIFT_BT_POLLUTE_PKT_CNT_8822B) & BIT_MASK_BT_POLLUTE_PKT_CNT_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -5797,7 +6384,8 @@
 #define BIT_SHIFT_PTCL_DBG_8822B 0
 #define BIT_MASK_PTCL_DBG_8822B 0xffffffffL
 #define BIT_PTCL_DBG_8822B(x) (((x) & BIT_MASK_PTCL_DBG_8822B) << BIT_SHIFT_PTCL_DBG_8822B)
-#define BIT_GET_PTCL_DBG_8822B(x) (((x) >> BIT_SHIFT_PTCL_DBG_8822B) & BIT_MASK_PTCL_DBG_8822B)

+#define BIT_GET_PTCL_DBG_8822B(x) (((x) >> BIT_SHIFT_PTCL_DBG_8822B) & BIT_MASK_PTCL_DBG_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -5807,14 +6395,16 @@
 #define BIT_SHIFT_TRI_HEAD_ADDR_8822B 16
 #define BIT_MASK_TRI_HEAD_ADDR_8822B 0xfff
 #define BIT_TRI_HEAD_ADDR_8822B(x) (((x) & BIT_MASK_TRI_HEAD_ADDR_8822B) << BIT_SHIFT_TRI_HEAD_ADDR_8822B)
-#define BIT_GET_TRI_HEAD_ADDR_8822B(x) (((x) >> BIT_SHIFT_TRI_HEAD_ADDR_8822B) & BIT_MASK_TRI_HEAD_ADDR_8822B)

+#define BIT_GET_TRI_HEAD_ADDR_8822B(x) (((x) >> BIT_SHIFT_TRI_HEAD_ADDR_8822B) & BIT_MASK_TRI_HEAD_ADDR_8822B)
+
 
 #define BIT_DROP_TH_EN_8822B BIT(8)
 
 #define BIT_SHIFT_DROP_TH_8822B 0
 #define BIT_MASK_DROP_TH_8822B 0xff
 #define BIT_DROP_TH_8822B(x) (((x) & BIT_MASK_DROP_TH_8822B) << BIT_SHIFT_DROP_TH_8822B)
-#define BIT_GET_DROP_TH_8822B(x) (((x) >> BIT_SHIFT_DROP_TH_8822B) & BIT_MASK_DROP_TH_8822B)

+#define BIT_GET_DROP_TH_8822B(x) (((x) >> BIT_SHIFT_DROP_TH_8822B) & BIT_MASK_DROP_TH_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -5836,26 +6426,30 @@
 #define BIT_SHIFT_GTAB_ID_8822B 28
 #define BIT_MASK_GTAB_ID_8822B 0x7
 #define BIT_GTAB_ID_8822B(x) (((x) & BIT_MASK_GTAB_ID_8822B) << BIT_SHIFT_GTAB_ID_8822B)
-#define BIT_GET_GTAB_ID_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_8822B) & BIT_MASK_GTAB_ID_8822B)

+#define BIT_GET_GTAB_ID_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_8822B) & BIT_MASK_GTAB_ID_8822B)
+
 
 
 #define BIT_SHIFT_AC1_PKT_INFO_8822B 16
 #define BIT_MASK_AC1_PKT_INFO_8822B 0xfff
 #define BIT_AC1_PKT_INFO_8822B(x) (((x) & BIT_MASK_AC1_PKT_INFO_8822B) << BIT_SHIFT_AC1_PKT_INFO_8822B)
-#define BIT_GET_AC1_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC1_PKT_INFO_8822B) & BIT_MASK_AC1_PKT_INFO_8822B)

+#define BIT_GET_AC1_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC1_PKT_INFO_8822B) & BIT_MASK_AC1_PKT_INFO_8822B)
+
 
 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8822B BIT(15)
 
 #define BIT_SHIFT_GTAB_ID_V1_8822B 12
 #define BIT_MASK_GTAB_ID_V1_8822B 0x7
 #define BIT_GTAB_ID_V1_8822B(x) (((x) & BIT_MASK_GTAB_ID_V1_8822B) << BIT_SHIFT_GTAB_ID_V1_8822B)
-#define BIT_GET_GTAB_ID_V1_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8822B) & BIT_MASK_GTAB_ID_V1_8822B)

+#define BIT_GET_GTAB_ID_V1_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8822B) & BIT_MASK_GTAB_ID_V1_8822B)
+
 
 
 #define BIT_SHIFT_AC0_PKT_INFO_8822B 0
 #define BIT_MASK_AC0_PKT_INFO_8822B 0xfff
 #define BIT_AC0_PKT_INFO_8822B(x) (((x) & BIT_MASK_AC0_PKT_INFO_8822B) << BIT_SHIFT_AC0_PKT_INFO_8822B)
-#define BIT_GET_AC0_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC0_PKT_INFO_8822B) & BIT_MASK_AC0_PKT_INFO_8822B)

+#define BIT_GET_AC0_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC0_PKT_INFO_8822B) & BIT_MASK_AC0_PKT_INFO_8822B)
+
 
 
 /* 2 REG_Q2_Q3_INFO_8822B */
@@ -5864,26 +6458,30 @@
 #define BIT_SHIFT_GTAB_ID_8822B 28
 #define BIT_MASK_GTAB_ID_8822B 0x7
 #define BIT_GTAB_ID_8822B(x) (((x) & BIT_MASK_GTAB_ID_8822B) << BIT_SHIFT_GTAB_ID_8822B)
-#define BIT_GET_GTAB_ID_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_8822B) & BIT_MASK_GTAB_ID_8822B)

+#define BIT_GET_GTAB_ID_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_8822B) & BIT_MASK_GTAB_ID_8822B)
+
 
 
 #define BIT_SHIFT_AC3_PKT_INFO_8822B 16
 #define BIT_MASK_AC3_PKT_INFO_8822B 0xfff
 #define BIT_AC3_PKT_INFO_8822B(x) (((x) & BIT_MASK_AC3_PKT_INFO_8822B) << BIT_SHIFT_AC3_PKT_INFO_8822B)
-#define BIT_GET_AC3_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC3_PKT_INFO_8822B) & BIT_MASK_AC3_PKT_INFO_8822B)

+#define BIT_GET_AC3_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC3_PKT_INFO_8822B) & BIT_MASK_AC3_PKT_INFO_8822B)
+
 
 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8822B BIT(15)
 
 #define BIT_SHIFT_GTAB_ID_V1_8822B 12
 #define BIT_MASK_GTAB_ID_V1_8822B 0x7
 #define BIT_GTAB_ID_V1_8822B(x) (((x) & BIT_MASK_GTAB_ID_V1_8822B) << BIT_SHIFT_GTAB_ID_V1_8822B)
-#define BIT_GET_GTAB_ID_V1_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8822B) & BIT_MASK_GTAB_ID_V1_8822B)

+#define BIT_GET_GTAB_ID_V1_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8822B) & BIT_MASK_GTAB_ID_V1_8822B)
+
 
 
 #define BIT_SHIFT_AC2_PKT_INFO_8822B 0
 #define BIT_MASK_AC2_PKT_INFO_8822B 0xfff
 #define BIT_AC2_PKT_INFO_8822B(x) (((x) & BIT_MASK_AC2_PKT_INFO_8822B) << BIT_SHIFT_AC2_PKT_INFO_8822B)
-#define BIT_GET_AC2_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC2_PKT_INFO_8822B) & BIT_MASK_AC2_PKT_INFO_8822B)

+#define BIT_GET_AC2_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC2_PKT_INFO_8822B) & BIT_MASK_AC2_PKT_INFO_8822B)
+
 
 
 /* 2 REG_Q4_Q5_INFO_8822B */
@@ -5892,26 +6490,30 @@
 #define BIT_SHIFT_GTAB_ID_8822B 28
 #define BIT_MASK_GTAB_ID_8822B 0x7
 #define BIT_GTAB_ID_8822B(x) (((x) & BIT_MASK_GTAB_ID_8822B) << BIT_SHIFT_GTAB_ID_8822B)
-#define BIT_GET_GTAB_ID_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_8822B) & BIT_MASK_GTAB_ID_8822B)

+#define BIT_GET_GTAB_ID_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_8822B) & BIT_MASK_GTAB_ID_8822B)
+
 
 
 #define BIT_SHIFT_AC5_PKT_INFO_8822B 16
 #define BIT_MASK_AC5_PKT_INFO_8822B 0xfff
 #define BIT_AC5_PKT_INFO_8822B(x) (((x) & BIT_MASK_AC5_PKT_INFO_8822B) << BIT_SHIFT_AC5_PKT_INFO_8822B)
-#define BIT_GET_AC5_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC5_PKT_INFO_8822B) & BIT_MASK_AC5_PKT_INFO_8822B)

+#define BIT_GET_AC5_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC5_PKT_INFO_8822B) & BIT_MASK_AC5_PKT_INFO_8822B)
+
 
 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8822B BIT(15)
 
 #define BIT_SHIFT_GTAB_ID_V1_8822B 12
 #define BIT_MASK_GTAB_ID_V1_8822B 0x7
 #define BIT_GTAB_ID_V1_8822B(x) (((x) & BIT_MASK_GTAB_ID_V1_8822B) << BIT_SHIFT_GTAB_ID_V1_8822B)
-#define BIT_GET_GTAB_ID_V1_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8822B) & BIT_MASK_GTAB_ID_V1_8822B)

+#define BIT_GET_GTAB_ID_V1_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8822B) & BIT_MASK_GTAB_ID_V1_8822B)
+
 
 
 #define BIT_SHIFT_AC4_PKT_INFO_8822B 0
 #define BIT_MASK_AC4_PKT_INFO_8822B 0xfff
 #define BIT_AC4_PKT_INFO_8822B(x) (((x) & BIT_MASK_AC4_PKT_INFO_8822B) << BIT_SHIFT_AC4_PKT_INFO_8822B)
-#define BIT_GET_AC4_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC4_PKT_INFO_8822B) & BIT_MASK_AC4_PKT_INFO_8822B)

+#define BIT_GET_AC4_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC4_PKT_INFO_8822B) & BIT_MASK_AC4_PKT_INFO_8822B)
+
 
 
 /* 2 REG_Q6_Q7_INFO_8822B */
@@ -5920,26 +6522,30 @@
 #define BIT_SHIFT_GTAB_ID_8822B 28
 #define BIT_MASK_GTAB_ID_8822B 0x7
 #define BIT_GTAB_ID_8822B(x) (((x) & BIT_MASK_GTAB_ID_8822B) << BIT_SHIFT_GTAB_ID_8822B)
-#define BIT_GET_GTAB_ID_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_8822B) & BIT_MASK_GTAB_ID_8822B)

+#define BIT_GET_GTAB_ID_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_8822B) & BIT_MASK_GTAB_ID_8822B)
+
 
 
 #define BIT_SHIFT_AC7_PKT_INFO_8822B 16
 #define BIT_MASK_AC7_PKT_INFO_8822B 0xfff
 #define BIT_AC7_PKT_INFO_8822B(x) (((x) & BIT_MASK_AC7_PKT_INFO_8822B) << BIT_SHIFT_AC7_PKT_INFO_8822B)
-#define BIT_GET_AC7_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC7_PKT_INFO_8822B) & BIT_MASK_AC7_PKT_INFO_8822B)

+#define BIT_GET_AC7_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC7_PKT_INFO_8822B) & BIT_MASK_AC7_PKT_INFO_8822B)
+
 
 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8822B BIT(15)
 
 #define BIT_SHIFT_GTAB_ID_V1_8822B 12
 #define BIT_MASK_GTAB_ID_V1_8822B 0x7
 #define BIT_GTAB_ID_V1_8822B(x) (((x) & BIT_MASK_GTAB_ID_V1_8822B) << BIT_SHIFT_GTAB_ID_V1_8822B)
-#define BIT_GET_GTAB_ID_V1_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8822B) & BIT_MASK_GTAB_ID_V1_8822B)

+#define BIT_GET_GTAB_ID_V1_8822B(x) (((x) >> BIT_SHIFT_GTAB_ID_V1_8822B) & BIT_MASK_GTAB_ID_V1_8822B)
+
 
 
 #define BIT_SHIFT_AC6_PKT_INFO_8822B 0
 #define BIT_MASK_AC6_PKT_INFO_8822B 0xfff
 #define BIT_AC6_PKT_INFO_8822B(x) (((x) & BIT_MASK_AC6_PKT_INFO_8822B) << BIT_SHIFT_AC6_PKT_INFO_8822B)
-#define BIT_GET_AC6_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC6_PKT_INFO_8822B) & BIT_MASK_AC6_PKT_INFO_8822B)

+#define BIT_GET_AC6_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_AC6_PKT_INFO_8822B) & BIT_MASK_AC6_PKT_INFO_8822B)
+
 
 
 /* 2 REG_MGQ_HIQ_INFO_8822B */
@@ -5947,13 +6553,15 @@
 #define BIT_SHIFT_HIQ_PKT_INFO_8822B 16
 #define BIT_MASK_HIQ_PKT_INFO_8822B 0xfff
 #define BIT_HIQ_PKT_INFO_8822B(x) (((x) & BIT_MASK_HIQ_PKT_INFO_8822B) << BIT_SHIFT_HIQ_PKT_INFO_8822B)
-#define BIT_GET_HIQ_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_HIQ_PKT_INFO_8822B) & BIT_MASK_HIQ_PKT_INFO_8822B)

+#define BIT_GET_HIQ_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_HIQ_PKT_INFO_8822B) & BIT_MASK_HIQ_PKT_INFO_8822B)
+
 
 
 #define BIT_SHIFT_MGQ_PKT_INFO_8822B 0
 #define BIT_MASK_MGQ_PKT_INFO_8822B 0xfff
 #define BIT_MGQ_PKT_INFO_8822B(x) (((x) & BIT_MASK_MGQ_PKT_INFO_8822B) << BIT_SHIFT_MGQ_PKT_INFO_8822B)
-#define BIT_GET_MGQ_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_MGQ_PKT_INFO_8822B) & BIT_MASK_MGQ_PKT_INFO_8822B)

+#define BIT_GET_MGQ_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_MGQ_PKT_INFO_8822B) & BIT_MASK_MGQ_PKT_INFO_8822B)
+
 
 
 /* 2 REG_CMDQ_BCNQ_INFO_8822B */
@@ -5961,13 +6569,15 @@
 #define BIT_SHIFT_CMDQ_PKT_INFO_8822B 16
 #define BIT_MASK_CMDQ_PKT_INFO_8822B 0xfff
 #define BIT_CMDQ_PKT_INFO_8822B(x) (((x) & BIT_MASK_CMDQ_PKT_INFO_8822B) << BIT_SHIFT_CMDQ_PKT_INFO_8822B)
-#define BIT_GET_CMDQ_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_CMDQ_PKT_INFO_8822B) & BIT_MASK_CMDQ_PKT_INFO_8822B)

+#define BIT_GET_CMDQ_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_CMDQ_PKT_INFO_8822B) & BIT_MASK_CMDQ_PKT_INFO_8822B)
+
 
 
 #define BIT_SHIFT_BCNQ_PKT_INFO_8822B 0
 #define BIT_MASK_BCNQ_PKT_INFO_8822B 0xfff
 #define BIT_BCNQ_PKT_INFO_8822B(x) (((x) & BIT_MASK_BCNQ_PKT_INFO_8822B) << BIT_SHIFT_BCNQ_PKT_INFO_8822B)
-#define BIT_GET_BCNQ_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_BCNQ_PKT_INFO_8822B) & BIT_MASK_BCNQ_PKT_INFO_8822B)

+#define BIT_GET_BCNQ_PKT_INFO_8822B(x) (((x) >> BIT_SHIFT_BCNQ_PKT_INFO_8822B) & BIT_MASK_BCNQ_PKT_INFO_8822B)
+
 
 
 /* 2 REG_USEREG_SETTING_8822B */
@@ -5976,13 +6586,15 @@
 #define BIT_SHIFT_RETRY_USEREG_8822B 19
 #define BIT_MASK_RETRY_USEREG_8822B 0x3
 #define BIT_RETRY_USEREG_8822B(x) (((x) & BIT_MASK_RETRY_USEREG_8822B) << BIT_SHIFT_RETRY_USEREG_8822B)
-#define BIT_GET_RETRY_USEREG_8822B(x) (((x) >> BIT_SHIFT_RETRY_USEREG_8822B) & BIT_MASK_RETRY_USEREG_8822B)

+#define BIT_GET_RETRY_USEREG_8822B(x) (((x) >> BIT_SHIFT_RETRY_USEREG_8822B) & BIT_MASK_RETRY_USEREG_8822B)
+
 
 
 #define BIT_SHIFT_TRYPKT_USEREG_8822B 17
 #define BIT_MASK_TRYPKT_USEREG_8822B 0x3
 #define BIT_TRYPKT_USEREG_8822B(x) (((x) & BIT_MASK_TRYPKT_USEREG_8822B) << BIT_SHIFT_TRYPKT_USEREG_8822B)
-#define BIT_GET_TRYPKT_USEREG_8822B(x) (((x) >> BIT_SHIFT_TRYPKT_USEREG_8822B) & BIT_MASK_TRYPKT_USEREG_8822B)

+#define BIT_GET_TRYPKT_USEREG_8822B(x) (((x) >> BIT_SHIFT_TRYPKT_USEREG_8822B) & BIT_MASK_TRYPKT_USEREG_8822B)
+
 
 #define BIT_CTLPKT_USEREG_8822B BIT(16)
 
@@ -5991,7 +6603,8 @@
 #define BIT_SHIFT_AESIV_OFFSET_8822B 0
 #define BIT_MASK_AESIV_OFFSET_8822B 0xfff
 #define BIT_AESIV_OFFSET_8822B(x) (((x) & BIT_MASK_AESIV_OFFSET_8822B) << BIT_SHIFT_AESIV_OFFSET_8822B)
-#define BIT_GET_AESIV_OFFSET_8822B(x) (((x) >> BIT_SHIFT_AESIV_OFFSET_8822B) & BIT_MASK_AESIV_OFFSET_8822B)

+#define BIT_GET_AESIV_OFFSET_8822B(x) (((x) >> BIT_SHIFT_AESIV_OFFSET_8822B) & BIT_MASK_AESIV_OFFSET_8822B)
+
 
 
 /* 2 REG_BF0_TIME_SETTING_8822B */
@@ -6003,13 +6616,15 @@
 #define BIT_SHIFT_BF0_PRETIME_OVER_8822B 16
 #define BIT_MASK_BF0_PRETIME_OVER_8822B 0xfff
 #define BIT_BF0_PRETIME_OVER_8822B(x) (((x) & BIT_MASK_BF0_PRETIME_OVER_8822B) << BIT_SHIFT_BF0_PRETIME_OVER_8822B)
-#define BIT_GET_BF0_PRETIME_OVER_8822B(x) (((x) >> BIT_SHIFT_BF0_PRETIME_OVER_8822B) & BIT_MASK_BF0_PRETIME_OVER_8822B)

+#define BIT_GET_BF0_PRETIME_OVER_8822B(x) (((x) >> BIT_SHIFT_BF0_PRETIME_OVER_8822B) & BIT_MASK_BF0_PRETIME_OVER_8822B)
+
 
 
 #define BIT_SHIFT_BF0_LIFETIME_8822B 0
 #define BIT_MASK_BF0_LIFETIME_8822B 0xffff
 #define BIT_BF0_LIFETIME_8822B(x) (((x) & BIT_MASK_BF0_LIFETIME_8822B) << BIT_SHIFT_BF0_LIFETIME_8822B)
-#define BIT_GET_BF0_LIFETIME_8822B(x) (((x) >> BIT_SHIFT_BF0_LIFETIME_8822B) & BIT_MASK_BF0_LIFETIME_8822B)

+#define BIT_GET_BF0_LIFETIME_8822B(x) (((x) >> BIT_SHIFT_BF0_LIFETIME_8822B) & BIT_MASK_BF0_LIFETIME_8822B)
+
 
 
 /* 2 REG_BF1_TIME_SETTING_8822B */
@@ -6021,13 +6636,15 @@
 #define BIT_SHIFT_BF1_PRETIME_OVER_8822B 16
 #define BIT_MASK_BF1_PRETIME_OVER_8822B 0xfff
 #define BIT_BF1_PRETIME_OVER_8822B(x) (((x) & BIT_MASK_BF1_PRETIME_OVER_8822B) << BIT_SHIFT_BF1_PRETIME_OVER_8822B)
-#define BIT_GET_BF1_PRETIME_OVER_8822B(x) (((x) >> BIT_SHIFT_BF1_PRETIME_OVER_8822B) & BIT_MASK_BF1_PRETIME_OVER_8822B)

+#define BIT_GET_BF1_PRETIME_OVER_8822B(x) (((x) >> BIT_SHIFT_BF1_PRETIME_OVER_8822B) & BIT_MASK_BF1_PRETIME_OVER_8822B)
+
 
 
 #define BIT_SHIFT_BF1_LIFETIME_8822B 0
 #define BIT_MASK_BF1_LIFETIME_8822B 0xffff
 #define BIT_BF1_LIFETIME_8822B(x) (((x) & BIT_MASK_BF1_LIFETIME_8822B) << BIT_SHIFT_BF1_LIFETIME_8822B)
-#define BIT_GET_BF1_LIFETIME_8822B(x) (((x) >> BIT_SHIFT_BF1_LIFETIME_8822B) & BIT_MASK_BF1_LIFETIME_8822B)

+#define BIT_GET_BF1_LIFETIME_8822B(x) (((x) >> BIT_SHIFT_BF1_LIFETIME_8822B) & BIT_MASK_BF1_LIFETIME_8822B)
+
 
 
 /* 2 REG_BF_TIMEOUT_EN_8822B */
@@ -6041,7 +6658,8 @@
 #define BIT_SHIFT_MACID31_0_RELEASE_8822B 0
 #define BIT_MASK_MACID31_0_RELEASE_8822B 0xffffffffL
 #define BIT_MACID31_0_RELEASE_8822B(x) (((x) & BIT_MASK_MACID31_0_RELEASE_8822B) << BIT_SHIFT_MACID31_0_RELEASE_8822B)
-#define BIT_GET_MACID31_0_RELEASE_8822B(x) (((x) >> BIT_SHIFT_MACID31_0_RELEASE_8822B) & BIT_MASK_MACID31_0_RELEASE_8822B)

+#define BIT_GET_MACID31_0_RELEASE_8822B(x) (((x) >> BIT_SHIFT_MACID31_0_RELEASE_8822B) & BIT_MASK_MACID31_0_RELEASE_8822B)
+
 
 
 /* 2 REG_MACID_RELEASE1_8822B */
@@ -6049,7 +6667,8 @@
 #define BIT_SHIFT_MACID63_32_RELEASE_8822B 0
 #define BIT_MASK_MACID63_32_RELEASE_8822B 0xffffffffL
 #define BIT_MACID63_32_RELEASE_8822B(x) (((x) & BIT_MASK_MACID63_32_RELEASE_8822B) << BIT_SHIFT_MACID63_32_RELEASE_8822B)
-#define BIT_GET_MACID63_32_RELEASE_8822B(x) (((x) >> BIT_SHIFT_MACID63_32_RELEASE_8822B) & BIT_MASK_MACID63_32_RELEASE_8822B)

+#define BIT_GET_MACID63_32_RELEASE_8822B(x) (((x) >> BIT_SHIFT_MACID63_32_RELEASE_8822B) & BIT_MASK_MACID63_32_RELEASE_8822B)
+
 
 
 /* 2 REG_MACID_RELEASE2_8822B */
@@ -6057,7 +6676,8 @@
 #define BIT_SHIFT_MACID95_64_RELEASE_8822B 0
 #define BIT_MASK_MACID95_64_RELEASE_8822B 0xffffffffL
 #define BIT_MACID95_64_RELEASE_8822B(x) (((x) & BIT_MASK_MACID95_64_RELEASE_8822B) << BIT_SHIFT_MACID95_64_RELEASE_8822B)
-#define BIT_GET_MACID95_64_RELEASE_8822B(x) (((x) >> BIT_SHIFT_MACID95_64_RELEASE_8822B) & BIT_MASK_MACID95_64_RELEASE_8822B)

+#define BIT_GET_MACID95_64_RELEASE_8822B(x) (((x) >> BIT_SHIFT_MACID95_64_RELEASE_8822B) & BIT_MASK_MACID95_64_RELEASE_8822B)
+
 
 
 /* 2 REG_MACID_RELEASE3_8822B */
@@ -6065,7 +6685,8 @@
 #define BIT_SHIFT_MACID127_96_RELEASE_8822B 0
 #define BIT_MASK_MACID127_96_RELEASE_8822B 0xffffffffL
 #define BIT_MACID127_96_RELEASE_8822B(x) (((x) & BIT_MASK_MACID127_96_RELEASE_8822B) << BIT_SHIFT_MACID127_96_RELEASE_8822B)
-#define BIT_GET_MACID127_96_RELEASE_8822B(x) (((x) >> BIT_SHIFT_MACID127_96_RELEASE_8822B) & BIT_MASK_MACID127_96_RELEASE_8822B)

+#define BIT_GET_MACID127_96_RELEASE_8822B(x) (((x) >> BIT_SHIFT_MACID127_96_RELEASE_8822B) & BIT_MASK_MACID127_96_RELEASE_8822B)
+
 
 
 /* 2 REG_MACID_RELEASE_SETTING_8822B */
@@ -6074,7 +6695,8 @@
 #define BIT_SHIFT_MACID_OFFSET_8822B 0
 #define BIT_MASK_MACID_OFFSET_8822B 0x7f
 #define BIT_MACID_OFFSET_8822B(x) (((x) & BIT_MASK_MACID_OFFSET_8822B) << BIT_SHIFT_MACID_OFFSET_8822B)
-#define BIT_GET_MACID_OFFSET_8822B(x) (((x) >> BIT_SHIFT_MACID_OFFSET_8822B) & BIT_MASK_MACID_OFFSET_8822B)

+#define BIT_GET_MACID_OFFSET_8822B(x) (((x) >> BIT_SHIFT_MACID_OFFSET_8822B) & BIT_MASK_MACID_OFFSET_8822B)
+
 
 
 /* 2 REG_FAST_EDCA_VOVI_SETTING_8822B */
@@ -6082,27 +6704,31 @@
 #define BIT_SHIFT_VI_FAST_EDCA_TO_8822B 24
 #define BIT_MASK_VI_FAST_EDCA_TO_8822B 0xff
 #define BIT_VI_FAST_EDCA_TO_8822B(x) (((x) & BIT_MASK_VI_FAST_EDCA_TO_8822B) << BIT_SHIFT_VI_FAST_EDCA_TO_8822B)
-#define BIT_GET_VI_FAST_EDCA_TO_8822B(x) (((x) >> BIT_SHIFT_VI_FAST_EDCA_TO_8822B) & BIT_MASK_VI_FAST_EDCA_TO_8822B)

+#define BIT_GET_VI_FAST_EDCA_TO_8822B(x) (((x) >> BIT_SHIFT_VI_FAST_EDCA_TO_8822B) & BIT_MASK_VI_FAST_EDCA_TO_8822B)
+
 
 #define BIT_VI_THRESHOLD_SEL_8822B BIT(23)
 
 #define BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8822B 16
 #define BIT_MASK_VI_FAST_EDCA_PKT_TH_8822B 0x7f
 #define BIT_VI_FAST_EDCA_PKT_TH_8822B(x) (((x) & BIT_MASK_VI_FAST_EDCA_PKT_TH_8822B) << BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8822B)
-#define BIT_GET_VI_FAST_EDCA_PKT_TH_8822B(x) (((x) >> BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8822B) & BIT_MASK_VI_FAST_EDCA_PKT_TH_8822B)

+#define BIT_GET_VI_FAST_EDCA_PKT_TH_8822B(x) (((x) >> BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8822B) & BIT_MASK_VI_FAST_EDCA_PKT_TH_8822B)
+
 
 
 #define BIT_SHIFT_VO_FAST_EDCA_TO_8822B 8
 #define BIT_MASK_VO_FAST_EDCA_TO_8822B 0xff
 #define BIT_VO_FAST_EDCA_TO_8822B(x) (((x) & BIT_MASK_VO_FAST_EDCA_TO_8822B) << BIT_SHIFT_VO_FAST_EDCA_TO_8822B)
-#define BIT_GET_VO_FAST_EDCA_TO_8822B(x) (((x) >> BIT_SHIFT_VO_FAST_EDCA_TO_8822B) & BIT_MASK_VO_FAST_EDCA_TO_8822B)

+#define BIT_GET_VO_FAST_EDCA_TO_8822B(x) (((x) >> BIT_SHIFT_VO_FAST_EDCA_TO_8822B) & BIT_MASK_VO_FAST_EDCA_TO_8822B)
+
 
 #define BIT_VO_THRESHOLD_SEL_8822B BIT(7)
 
 #define BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8822B 0
 #define BIT_MASK_VO_FAST_EDCA_PKT_TH_8822B 0x7f
 #define BIT_VO_FAST_EDCA_PKT_TH_8822B(x) (((x) & BIT_MASK_VO_FAST_EDCA_PKT_TH_8822B) << BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8822B)
-#define BIT_GET_VO_FAST_EDCA_PKT_TH_8822B(x) (((x) >> BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8822B) & BIT_MASK_VO_FAST_EDCA_PKT_TH_8822B)

+#define BIT_GET_VO_FAST_EDCA_PKT_TH_8822B(x) (((x) >> BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8822B) & BIT_MASK_VO_FAST_EDCA_PKT_TH_8822B)
+
 
 
 /* 2 REG_FAST_EDCA_BEBK_SETTING_8822B */
@@ -6110,27 +6736,31 @@
 #define BIT_SHIFT_BK_FAST_EDCA_TO_8822B 24
 #define BIT_MASK_BK_FAST_EDCA_TO_8822B 0xff
 #define BIT_BK_FAST_EDCA_TO_8822B(x) (((x) & BIT_MASK_BK_FAST_EDCA_TO_8822B) << BIT_SHIFT_BK_FAST_EDCA_TO_8822B)
-#define BIT_GET_BK_FAST_EDCA_TO_8822B(x) (((x) >> BIT_SHIFT_BK_FAST_EDCA_TO_8822B) & BIT_MASK_BK_FAST_EDCA_TO_8822B)

+#define BIT_GET_BK_FAST_EDCA_TO_8822B(x) (((x) >> BIT_SHIFT_BK_FAST_EDCA_TO_8822B) & BIT_MASK_BK_FAST_EDCA_TO_8822B)
+
 
 #define BIT_BK_THRESHOLD_SEL_8822B BIT(23)
 
 #define BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8822B 16
 #define BIT_MASK_BK_FAST_EDCA_PKT_TH_8822B 0x7f
 #define BIT_BK_FAST_EDCA_PKT_TH_8822B(x) (((x) & BIT_MASK_BK_FAST_EDCA_PKT_TH_8822B) << BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8822B)
-#define BIT_GET_BK_FAST_EDCA_PKT_TH_8822B(x) (((x) >> BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8822B) & BIT_MASK_BK_FAST_EDCA_PKT_TH_8822B)

+#define BIT_GET_BK_FAST_EDCA_PKT_TH_8822B(x) (((x) >> BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8822B) & BIT_MASK_BK_FAST_EDCA_PKT_TH_8822B)
+
 
 
 #define BIT_SHIFT_BE_FAST_EDCA_TO_8822B 8
 #define BIT_MASK_BE_FAST_EDCA_TO_8822B 0xff
 #define BIT_BE_FAST_EDCA_TO_8822B(x) (((x) & BIT_MASK_BE_FAST_EDCA_TO_8822B) << BIT_SHIFT_BE_FAST_EDCA_TO_8822B)
-#define BIT_GET_BE_FAST_EDCA_TO_8822B(x) (((x) >> BIT_SHIFT_BE_FAST_EDCA_TO_8822B) & BIT_MASK_BE_FAST_EDCA_TO_8822B)

+#define BIT_GET_BE_FAST_EDCA_TO_8822B(x) (((x) >> BIT_SHIFT_BE_FAST_EDCA_TO_8822B) & BIT_MASK_BE_FAST_EDCA_TO_8822B)
+
 
 #define BIT_BE_THRESHOLD_SEL_8822B BIT(7)
 
 #define BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8822B 0
 #define BIT_MASK_BE_FAST_EDCA_PKT_TH_8822B 0x7f
 #define BIT_BE_FAST_EDCA_PKT_TH_8822B(x) (((x) & BIT_MASK_BE_FAST_EDCA_PKT_TH_8822B) << BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8822B)
-#define BIT_GET_BE_FAST_EDCA_PKT_TH_8822B(x) (((x) >> BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8822B) & BIT_MASK_BE_FAST_EDCA_PKT_TH_8822B)

+#define BIT_GET_BE_FAST_EDCA_PKT_TH_8822B(x) (((x) >> BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8822B) & BIT_MASK_BE_FAST_EDCA_PKT_TH_8822B)
+
 
 
 /* 2 REG_MACID_DROP0_8822B */
@@ -6138,7 +6768,8 @@
 #define BIT_SHIFT_MACID31_0_DROP_8822B 0
 #define BIT_MASK_MACID31_0_DROP_8822B 0xffffffffL
 #define BIT_MACID31_0_DROP_8822B(x) (((x) & BIT_MASK_MACID31_0_DROP_8822B) << BIT_SHIFT_MACID31_0_DROP_8822B)
-#define BIT_GET_MACID31_0_DROP_8822B(x) (((x) >> BIT_SHIFT_MACID31_0_DROP_8822B) & BIT_MASK_MACID31_0_DROP_8822B)

+#define BIT_GET_MACID31_0_DROP_8822B(x) (((x) >> BIT_SHIFT_MACID31_0_DROP_8822B) & BIT_MASK_MACID31_0_DROP_8822B)
+
 
 
 /* 2 REG_MACID_DROP1_8822B */
@@ -6146,7 +6777,8 @@
 #define BIT_SHIFT_MACID63_32_DROP_8822B 0
 #define BIT_MASK_MACID63_32_DROP_8822B 0xffffffffL
 #define BIT_MACID63_32_DROP_8822B(x) (((x) & BIT_MASK_MACID63_32_DROP_8822B) << BIT_SHIFT_MACID63_32_DROP_8822B)
-#define BIT_GET_MACID63_32_DROP_8822B(x) (((x) >> BIT_SHIFT_MACID63_32_DROP_8822B) & BIT_MASK_MACID63_32_DROP_8822B)

+#define BIT_GET_MACID63_32_DROP_8822B(x) (((x) >> BIT_SHIFT_MACID63_32_DROP_8822B) & BIT_MASK_MACID63_32_DROP_8822B)
+
 
 
 /* 2 REG_MACID_DROP2_8822B */
@@ -6154,7 +6786,8 @@
 #define BIT_SHIFT_MACID95_64_DROP_8822B 0
 #define BIT_MASK_MACID95_64_DROP_8822B 0xffffffffL
 #define BIT_MACID95_64_DROP_8822B(x) (((x) & BIT_MASK_MACID95_64_DROP_8822B) << BIT_SHIFT_MACID95_64_DROP_8822B)
-#define BIT_GET_MACID95_64_DROP_8822B(x) (((x) >> BIT_SHIFT_MACID95_64_DROP_8822B) & BIT_MASK_MACID95_64_DROP_8822B)

+#define BIT_GET_MACID95_64_DROP_8822B(x) (((x) >> BIT_SHIFT_MACID95_64_DROP_8822B) & BIT_MASK_MACID95_64_DROP_8822B)
+
 
 
 /* 2 REG_MACID_DROP3_8822B */
@@ -6162,7 +6795,8 @@
 #define BIT_SHIFT_MACID127_96_DROP_8822B 0
 #define BIT_MASK_MACID127_96_DROP_8822B 0xffffffffL
 #define BIT_MACID127_96_DROP_8822B(x) (((x) & BIT_MASK_MACID127_96_DROP_8822B) << BIT_SHIFT_MACID127_96_DROP_8822B)
-#define BIT_GET_MACID127_96_DROP_8822B(x) (((x) >> BIT_SHIFT_MACID127_96_DROP_8822B) & BIT_MASK_MACID127_96_DROP_8822B)

+#define BIT_GET_MACID127_96_DROP_8822B(x) (((x) >> BIT_SHIFT_MACID127_96_DROP_8822B) & BIT_MASK_MACID127_96_DROP_8822B)
+
 
 
 /* 2 REG_R_MACID_RELEASE_SUCCESS_0_8822B */
@@ -6170,7 +6804,8 @@
 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8822B 0
 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8822B 0xffffffffL
 #define BIT_R_MACID_RELEASE_SUCCESS_0_8822B(x) (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8822B) << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8822B)
-#define BIT_GET_R_MACID_RELEASE_SUCCESS_0_8822B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8822B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8822B)

+#define BIT_GET_R_MACID_RELEASE_SUCCESS_0_8822B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8822B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8822B)
+
 
 
 /* 2 REG_R_MACID_RELEASE_SUCCESS_1_8822B */
@@ -6178,7 +6813,8 @@
 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8822B 0
 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8822B 0xffffffffL
 #define BIT_R_MACID_RELEASE_SUCCESS_1_8822B(x) (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8822B) << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8822B)
-#define BIT_GET_R_MACID_RELEASE_SUCCESS_1_8822B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8822B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8822B)

+#define BIT_GET_R_MACID_RELEASE_SUCCESS_1_8822B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8822B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8822B)
+
 
 
 /* 2 REG_R_MACID_RELEASE_SUCCESS_2_8822B */
@@ -6186,7 +6822,8 @@
 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8822B 0
 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8822B 0xffffffffL
 #define BIT_R_MACID_RELEASE_SUCCESS_2_8822B(x) (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8822B) << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8822B)
-#define BIT_GET_R_MACID_RELEASE_SUCCESS_2_8822B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8822B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8822B)

+#define BIT_GET_R_MACID_RELEASE_SUCCESS_2_8822B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8822B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8822B)
+
 
 
 /* 2 REG_R_MACID_RELEASE_SUCCESS_3_8822B */
@@ -6194,7 +6831,8 @@
 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8822B 0
 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8822B 0xffffffffL
 #define BIT_R_MACID_RELEASE_SUCCESS_3_8822B(x) (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8822B) << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8822B)
-#define BIT_GET_R_MACID_RELEASE_SUCCESS_3_8822B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8822B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8822B)

+#define BIT_GET_R_MACID_RELEASE_SUCCESS_3_8822B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8822B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8822B)
+
 
 
 /* 2 REG_MGG_FIFO_CRTL_8822B */
@@ -6203,26 +6841,30 @@
 #define BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8822B 28
 #define BIT_MASK_R_MGG_FIFO_PG_SIZE_8822B 0x7
 #define BIT_R_MGG_FIFO_PG_SIZE_8822B(x) (((x) & BIT_MASK_R_MGG_FIFO_PG_SIZE_8822B) << BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8822B)
-#define BIT_GET_R_MGG_FIFO_PG_SIZE_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8822B) & BIT_MASK_R_MGG_FIFO_PG_SIZE_8822B)

+#define BIT_GET_R_MGG_FIFO_PG_SIZE_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_PG_SIZE_8822B) & BIT_MASK_R_MGG_FIFO_PG_SIZE_8822B)
+
 
 
 #define BIT_SHIFT_R_MGG_FIFO_START_PG_8822B 16
 #define BIT_MASK_R_MGG_FIFO_START_PG_8822B 0xfff
 #define BIT_R_MGG_FIFO_START_PG_8822B(x) (((x) & BIT_MASK_R_MGG_FIFO_START_PG_8822B) << BIT_SHIFT_R_MGG_FIFO_START_PG_8822B)
-#define BIT_GET_R_MGG_FIFO_START_PG_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_START_PG_8822B) & BIT_MASK_R_MGG_FIFO_START_PG_8822B)

+#define BIT_GET_R_MGG_FIFO_START_PG_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_START_PG_8822B) & BIT_MASK_R_MGG_FIFO_START_PG_8822B)
+
 
 
 #define BIT_SHIFT_R_MGG_FIFO_SIZE_8822B 14
 #define BIT_MASK_R_MGG_FIFO_SIZE_8822B 0x3
 #define BIT_R_MGG_FIFO_SIZE_8822B(x) (((x) & BIT_MASK_R_MGG_FIFO_SIZE_8822B) << BIT_SHIFT_R_MGG_FIFO_SIZE_8822B)
-#define BIT_GET_R_MGG_FIFO_SIZE_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_SIZE_8822B) & BIT_MASK_R_MGG_FIFO_SIZE_8822B)

+#define BIT_GET_R_MGG_FIFO_SIZE_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_SIZE_8822B) & BIT_MASK_R_MGG_FIFO_SIZE_8822B)
+
 
 #define BIT_R_MGG_FIFO_PAUSE_8822B BIT(13)
 
 #define BIT_SHIFT_R_MGG_FIFO_RPTR_8822B 8
 #define BIT_MASK_R_MGG_FIFO_RPTR_8822B 0x1f
 #define BIT_R_MGG_FIFO_RPTR_8822B(x) (((x) & BIT_MASK_R_MGG_FIFO_RPTR_8822B) << BIT_SHIFT_R_MGG_FIFO_RPTR_8822B)
-#define BIT_GET_R_MGG_FIFO_RPTR_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_RPTR_8822B) & BIT_MASK_R_MGG_FIFO_RPTR_8822B)

+#define BIT_GET_R_MGG_FIFO_RPTR_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_RPTR_8822B) & BIT_MASK_R_MGG_FIFO_RPTR_8822B)
+
 
 #define BIT_R_MGG_FIFO_OV_8822B BIT(7)
 #define BIT_R_MGG_FIFO_WPTR_ERROR_8822B BIT(6)
@@ -6231,7 +6873,8 @@
 #define BIT_SHIFT_R_MGG_FIFO_WPTR_8822B 0
 #define BIT_MASK_R_MGG_FIFO_WPTR_8822B 0x1f
 #define BIT_R_MGG_FIFO_WPTR_8822B(x) (((x) & BIT_MASK_R_MGG_FIFO_WPTR_8822B) << BIT_SHIFT_R_MGG_FIFO_WPTR_8822B)
-#define BIT_GET_R_MGG_FIFO_WPTR_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_WPTR_8822B) & BIT_MASK_R_MGG_FIFO_WPTR_8822B)

+#define BIT_GET_R_MGG_FIFO_WPTR_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_WPTR_8822B) & BIT_MASK_R_MGG_FIFO_WPTR_8822B)
+
 
 
 /* 2 REG_MGG_FIFO_INT_8822B */
@@ -6239,13 +6882,15 @@
 #define BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8822B 16
 #define BIT_MASK_R_MGG_FIFO_INT_FLAG_8822B 0xffff
 #define BIT_R_MGG_FIFO_INT_FLAG_8822B(x) (((x) & BIT_MASK_R_MGG_FIFO_INT_FLAG_8822B) << BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8822B)
-#define BIT_GET_R_MGG_FIFO_INT_FLAG_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8822B) & BIT_MASK_R_MGG_FIFO_INT_FLAG_8822B)

+#define BIT_GET_R_MGG_FIFO_INT_FLAG_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_INT_FLAG_8822B) & BIT_MASK_R_MGG_FIFO_INT_FLAG_8822B)
+
 
 
 #define BIT_SHIFT_R_MGG_FIFO_INT_MASK_8822B 0
 #define BIT_MASK_R_MGG_FIFO_INT_MASK_8822B 0xffff
 #define BIT_R_MGG_FIFO_INT_MASK_8822B(x) (((x) & BIT_MASK_R_MGG_FIFO_INT_MASK_8822B) << BIT_SHIFT_R_MGG_FIFO_INT_MASK_8822B)
-#define BIT_GET_R_MGG_FIFO_INT_MASK_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_INT_MASK_8822B) & BIT_MASK_R_MGG_FIFO_INT_MASK_8822B)

+#define BIT_GET_R_MGG_FIFO_INT_MASK_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_INT_MASK_8822B) & BIT_MASK_R_MGG_FIFO_INT_MASK_8822B)
+
 
 
 /* 2 REG_MGG_FIFO_LIFETIME_8822B */
@@ -6253,13 +6898,15 @@
 #define BIT_SHIFT_R_MGG_FIFO_LIFETIME_8822B 16
 #define BIT_MASK_R_MGG_FIFO_LIFETIME_8822B 0xffff
 #define BIT_R_MGG_FIFO_LIFETIME_8822B(x) (((x) & BIT_MASK_R_MGG_FIFO_LIFETIME_8822B) << BIT_SHIFT_R_MGG_FIFO_LIFETIME_8822B)
-#define BIT_GET_R_MGG_FIFO_LIFETIME_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_LIFETIME_8822B) & BIT_MASK_R_MGG_FIFO_LIFETIME_8822B)

+#define BIT_GET_R_MGG_FIFO_LIFETIME_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_LIFETIME_8822B) & BIT_MASK_R_MGG_FIFO_LIFETIME_8822B)
+
 
 
 #define BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8822B 0
 #define BIT_MASK_R_MGG_FIFO_VALID_MAP_8822B 0xffff
 #define BIT_R_MGG_FIFO_VALID_MAP_8822B(x) (((x) & BIT_MASK_R_MGG_FIFO_VALID_MAP_8822B) << BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8822B)
-#define BIT_GET_R_MGG_FIFO_VALID_MAP_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8822B) & BIT_MASK_R_MGG_FIFO_VALID_MAP_8822B)

+#define BIT_GET_R_MGG_FIFO_VALID_MAP_8822B(x) (((x) >> BIT_SHIFT_R_MGG_FIFO_VALID_MAP_8822B) & BIT_MASK_R_MGG_FIFO_VALID_MAP_8822B)
+
 
 
 /* 2 REG_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B */
@@ -6267,7 +6914,8 @@
 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B 0
 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B 0x7f
 #define BIT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B(x) (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B) << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B)
-#define BIT_GET_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B)

+#define BIT_GET_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B(x) (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B) & BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8822B)
+
 
 
 /* 2 REG_MACID_SHCUT_OFFSET_8822B */
@@ -6275,7 +6923,8 @@
 #define BIT_SHIFT_MACID_SHCUT_OFFSET_V1_8822B 0
 #define BIT_MASK_MACID_SHCUT_OFFSET_V1_8822B 0xff
 #define BIT_MACID_SHCUT_OFFSET_V1_8822B(x) (((x) & BIT_MASK_MACID_SHCUT_OFFSET_V1_8822B) << BIT_SHIFT_MACID_SHCUT_OFFSET_V1_8822B)
-#define BIT_GET_MACID_SHCUT_OFFSET_V1_8822B(x) (((x) >> BIT_SHIFT_MACID_SHCUT_OFFSET_V1_8822B) & BIT_MASK_MACID_SHCUT_OFFSET_V1_8822B)

+#define BIT_GET_MACID_SHCUT_OFFSET_V1_8822B(x) (((x) >> BIT_SHIFT_MACID_SHCUT_OFFSET_V1_8822B) & BIT_MASK_MACID_SHCUT_OFFSET_V1_8822B)
+
 
 
 /* 2 REG_MU_TX_CTL_8822B */
@@ -6284,7 +6933,8 @@
 #define BIT_SHIFT_R_MU_TABLE_VALID_8822B 0
 #define BIT_MASK_R_MU_TABLE_VALID_8822B 0x3f
 #define BIT_R_MU_TABLE_VALID_8822B(x) (((x) & BIT_MASK_R_MU_TABLE_VALID_8822B) << BIT_SHIFT_R_MU_TABLE_VALID_8822B)
-#define BIT_GET_R_MU_TABLE_VALID_8822B(x) (((x) >> BIT_SHIFT_R_MU_TABLE_VALID_8822B) & BIT_MASK_R_MU_TABLE_VALID_8822B)

+#define BIT_GET_R_MU_TABLE_VALID_8822B(x) (((x) >> BIT_SHIFT_R_MU_TABLE_VALID_8822B) & BIT_MASK_R_MU_TABLE_VALID_8822B)
+
 
 
 /* 2 REG_MU_STA_GID_VLD_8822B */
@@ -6294,13 +6944,15 @@
 #define BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B 0
 #define BIT_MASK_R_MU_STA_GTAB_VALID_8822B 0xffffffffL
 #define BIT_R_MU_STA_GTAB_VALID_8822B(x) (((x) & BIT_MASK_R_MU_STA_GTAB_VALID_8822B) << BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B)
-#define BIT_GET_R_MU_STA_GTAB_VALID_8822B(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B) & BIT_MASK_R_MU_STA_GTAB_VALID_8822B)

+#define BIT_GET_R_MU_STA_GTAB_VALID_8822B(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B) & BIT_MASK_R_MU_STA_GTAB_VALID_8822B)
+
 
 
 #define BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B 0
 #define BIT_MASK_R_MU_STA_GTAB_VALID_8822B 0xffffffffL
 #define BIT_R_MU_STA_GTAB_VALID_8822B(x) (((x) & BIT_MASK_R_MU_STA_GTAB_VALID_8822B) << BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B)
-#define BIT_GET_R_MU_STA_GTAB_VALID_8822B(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B) & BIT_MASK_R_MU_STA_GTAB_VALID_8822B)

+#define BIT_GET_R_MU_STA_GTAB_VALID_8822B(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_VALID_8822B) & BIT_MASK_R_MU_STA_GTAB_VALID_8822B)
+
 
 
 /* 2 REG_MU_STA_USER_POS_INFO_8822B */
@@ -6310,13 +6962,15 @@
 #define BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B 0
 #define BIT_MASK_R_MU_STA_GTAB_POSITION_8822B 0xffffffffffffffffL
 #define BIT_R_MU_STA_GTAB_POSITION_8822B(x) (((x) & BIT_MASK_R_MU_STA_GTAB_POSITION_8822B) << BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B)
-#define BIT_GET_R_MU_STA_GTAB_POSITION_8822B(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B) & BIT_MASK_R_MU_STA_GTAB_POSITION_8822B)

+#define BIT_GET_R_MU_STA_GTAB_POSITION_8822B(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B) & BIT_MASK_R_MU_STA_GTAB_POSITION_8822B)
+
 
 
 #define BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B 0
 #define BIT_MASK_R_MU_STA_GTAB_POSITION_8822B 0xffffffffffffffffL
 #define BIT_R_MU_STA_GTAB_POSITION_8822B(x) (((x) & BIT_MASK_R_MU_STA_GTAB_POSITION_8822B) << BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B)
-#define BIT_GET_R_MU_STA_GTAB_POSITION_8822B(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B) & BIT_MASK_R_MU_STA_GTAB_POSITION_8822B)

+#define BIT_GET_R_MU_STA_GTAB_POSITION_8822B(x) (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_8822B) & BIT_MASK_R_MU_STA_GTAB_POSITION_8822B)
+
 
 
 /* 2 REG_MU_TRX_DBG_CNT_8822B */
@@ -6325,13 +6979,15 @@
 #define BIT_SHIFT_MU_DBGCNT_SEL_8822B 16
 #define BIT_MASK_MU_DBGCNT_SEL_8822B 0xf
 #define BIT_MU_DBGCNT_SEL_8822B(x) (((x) & BIT_MASK_MU_DBGCNT_SEL_8822B) << BIT_SHIFT_MU_DBGCNT_SEL_8822B)
-#define BIT_GET_MU_DBGCNT_SEL_8822B(x) (((x) >> BIT_SHIFT_MU_DBGCNT_SEL_8822B) & BIT_MASK_MU_DBGCNT_SEL_8822B)

+#define BIT_GET_MU_DBGCNT_SEL_8822B(x) (((x) >> BIT_SHIFT_MU_DBGCNT_SEL_8822B) & BIT_MASK_MU_DBGCNT_SEL_8822B)
+
 
 
 #define BIT_SHIFT_MU_DNGCNT_8822B 0
 #define BIT_MASK_MU_DNGCNT_8822B 0xffff
 #define BIT_MU_DNGCNT_8822B(x) (((x) & BIT_MASK_MU_DNGCNT_8822B) << BIT_SHIFT_MU_DNGCNT_8822B)
-#define BIT_GET_MU_DNGCNT_8822B(x) (((x) >> BIT_SHIFT_MU_DNGCNT_8822B) & BIT_MASK_MU_DNGCNT_8822B)

+#define BIT_GET_MU_DNGCNT_8822B(x) (((x) >> BIT_SHIFT_MU_DNGCNT_8822B) & BIT_MASK_MU_DNGCNT_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -6341,19 +6997,22 @@
 #define BIT_SHIFT_TXOPLIMIT_8822B 16
 #define BIT_MASK_TXOPLIMIT_8822B 0x7ff
 #define BIT_TXOPLIMIT_8822B(x) (((x) & BIT_MASK_TXOPLIMIT_8822B) << BIT_SHIFT_TXOPLIMIT_8822B)
-#define BIT_GET_TXOPLIMIT_8822B(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8822B) & BIT_MASK_TXOPLIMIT_8822B)

+#define BIT_GET_TXOPLIMIT_8822B(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8822B) & BIT_MASK_TXOPLIMIT_8822B)
+
 
 
 #define BIT_SHIFT_CW_8822B 8
 #define BIT_MASK_CW_8822B 0xff
 #define BIT_CW_8822B(x) (((x) & BIT_MASK_CW_8822B) << BIT_SHIFT_CW_8822B)
-#define BIT_GET_CW_8822B(x) (((x) >> BIT_SHIFT_CW_8822B) & BIT_MASK_CW_8822B)

+#define BIT_GET_CW_8822B(x) (((x) >> BIT_SHIFT_CW_8822B) & BIT_MASK_CW_8822B)
+
 
 
 #define BIT_SHIFT_AIFS_8822B 0
 #define BIT_MASK_AIFS_8822B 0xff
 #define BIT_AIFS_8822B(x) (((x) & BIT_MASK_AIFS_8822B) << BIT_SHIFT_AIFS_8822B)
-#define BIT_GET_AIFS_8822B(x) (((x) >> BIT_SHIFT_AIFS_8822B) & BIT_MASK_AIFS_8822B)

+#define BIT_GET_AIFS_8822B(x) (((x) >> BIT_SHIFT_AIFS_8822B) & BIT_MASK_AIFS_8822B)
+
 
 
 /* 2 REG_EDCA_VI_PARAM_8822B */
@@ -6363,19 +7022,22 @@
 #define BIT_SHIFT_TXOPLIMIT_8822B 16
 #define BIT_MASK_TXOPLIMIT_8822B 0x7ff
 #define BIT_TXOPLIMIT_8822B(x) (((x) & BIT_MASK_TXOPLIMIT_8822B) << BIT_SHIFT_TXOPLIMIT_8822B)
-#define BIT_GET_TXOPLIMIT_8822B(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8822B) & BIT_MASK_TXOPLIMIT_8822B)

+#define BIT_GET_TXOPLIMIT_8822B(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8822B) & BIT_MASK_TXOPLIMIT_8822B)
+
 
 
 #define BIT_SHIFT_CW_8822B 8
 #define BIT_MASK_CW_8822B 0xff
 #define BIT_CW_8822B(x) (((x) & BIT_MASK_CW_8822B) << BIT_SHIFT_CW_8822B)
-#define BIT_GET_CW_8822B(x) (((x) >> BIT_SHIFT_CW_8822B) & BIT_MASK_CW_8822B)

+#define BIT_GET_CW_8822B(x) (((x) >> BIT_SHIFT_CW_8822B) & BIT_MASK_CW_8822B)
+
 
 
 #define BIT_SHIFT_AIFS_8822B 0
 #define BIT_MASK_AIFS_8822B 0xff
 #define BIT_AIFS_8822B(x) (((x) & BIT_MASK_AIFS_8822B) << BIT_SHIFT_AIFS_8822B)
-#define BIT_GET_AIFS_8822B(x) (((x) >> BIT_SHIFT_AIFS_8822B) & BIT_MASK_AIFS_8822B)

+#define BIT_GET_AIFS_8822B(x) (((x) >> BIT_SHIFT_AIFS_8822B) & BIT_MASK_AIFS_8822B)
+
 
 
 /* 2 REG_EDCA_BE_PARAM_8822B */
@@ -6385,19 +7047,22 @@
 #define BIT_SHIFT_TXOPLIMIT_8822B 16
 #define BIT_MASK_TXOPLIMIT_8822B 0x7ff
 #define BIT_TXOPLIMIT_8822B(x) (((x) & BIT_MASK_TXOPLIMIT_8822B) << BIT_SHIFT_TXOPLIMIT_8822B)
-#define BIT_GET_TXOPLIMIT_8822B(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8822B) & BIT_MASK_TXOPLIMIT_8822B)

+#define BIT_GET_TXOPLIMIT_8822B(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8822B) & BIT_MASK_TXOPLIMIT_8822B)
+
 
 
 #define BIT_SHIFT_CW_8822B 8
 #define BIT_MASK_CW_8822B 0xff
 #define BIT_CW_8822B(x) (((x) & BIT_MASK_CW_8822B) << BIT_SHIFT_CW_8822B)
-#define BIT_GET_CW_8822B(x) (((x) >> BIT_SHIFT_CW_8822B) & BIT_MASK_CW_8822B)

+#define BIT_GET_CW_8822B(x) (((x) >> BIT_SHIFT_CW_8822B) & BIT_MASK_CW_8822B)
+
 
 
 #define BIT_SHIFT_AIFS_8822B 0
 #define BIT_MASK_AIFS_8822B 0xff
 #define BIT_AIFS_8822B(x) (((x) & BIT_MASK_AIFS_8822B) << BIT_SHIFT_AIFS_8822B)
-#define BIT_GET_AIFS_8822B(x) (((x) >> BIT_SHIFT_AIFS_8822B) & BIT_MASK_AIFS_8822B)

+#define BIT_GET_AIFS_8822B(x) (((x) >> BIT_SHIFT_AIFS_8822B) & BIT_MASK_AIFS_8822B)
+
 
 
 /* 2 REG_EDCA_BK_PARAM_8822B */
@@ -6407,19 +7072,22 @@
 #define BIT_SHIFT_TXOPLIMIT_8822B 16
 #define BIT_MASK_TXOPLIMIT_8822B 0x7ff
 #define BIT_TXOPLIMIT_8822B(x) (((x) & BIT_MASK_TXOPLIMIT_8822B) << BIT_SHIFT_TXOPLIMIT_8822B)
-#define BIT_GET_TXOPLIMIT_8822B(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8822B) & BIT_MASK_TXOPLIMIT_8822B)

+#define BIT_GET_TXOPLIMIT_8822B(x) (((x) >> BIT_SHIFT_TXOPLIMIT_8822B) & BIT_MASK_TXOPLIMIT_8822B)
+
 
 
 #define BIT_SHIFT_CW_8822B 8
 #define BIT_MASK_CW_8822B 0xff
 #define BIT_CW_8822B(x) (((x) & BIT_MASK_CW_8822B) << BIT_SHIFT_CW_8822B)
-#define BIT_GET_CW_8822B(x) (((x) >> BIT_SHIFT_CW_8822B) & BIT_MASK_CW_8822B)

+#define BIT_GET_CW_8822B(x) (((x) >> BIT_SHIFT_CW_8822B) & BIT_MASK_CW_8822B)
+
 
 
 #define BIT_SHIFT_AIFS_8822B 0
 #define BIT_MASK_AIFS_8822B 0xff
 #define BIT_AIFS_8822B(x) (((x) & BIT_MASK_AIFS_8822B) << BIT_SHIFT_AIFS_8822B)
-#define BIT_GET_AIFS_8822B(x) (((x) >> BIT_SHIFT_AIFS_8822B) & BIT_MASK_AIFS_8822B)

+#define BIT_GET_AIFS_8822B(x) (((x) >> BIT_SHIFT_AIFS_8822B) & BIT_MASK_AIFS_8822B)
+
 
 
 /* 2 REG_BCNTCFG_8822B */
@@ -6427,19 +7095,22 @@
 #define BIT_SHIFT_BCNCW_MAX_8822B 12
 #define BIT_MASK_BCNCW_MAX_8822B 0xf
 #define BIT_BCNCW_MAX_8822B(x) (((x) & BIT_MASK_BCNCW_MAX_8822B) << BIT_SHIFT_BCNCW_MAX_8822B)
-#define BIT_GET_BCNCW_MAX_8822B(x) (((x) >> BIT_SHIFT_BCNCW_MAX_8822B) & BIT_MASK_BCNCW_MAX_8822B)

+#define BIT_GET_BCNCW_MAX_8822B(x) (((x) >> BIT_SHIFT_BCNCW_MAX_8822B) & BIT_MASK_BCNCW_MAX_8822B)
+
 
 
 #define BIT_SHIFT_BCNCW_MIN_8822B 8
 #define BIT_MASK_BCNCW_MIN_8822B 0xf
 #define BIT_BCNCW_MIN_8822B(x) (((x) & BIT_MASK_BCNCW_MIN_8822B) << BIT_SHIFT_BCNCW_MIN_8822B)
-#define BIT_GET_BCNCW_MIN_8822B(x) (((x) >> BIT_SHIFT_BCNCW_MIN_8822B) & BIT_MASK_BCNCW_MIN_8822B)

+#define BIT_GET_BCNCW_MIN_8822B(x) (((x) >> BIT_SHIFT_BCNCW_MIN_8822B) & BIT_MASK_BCNCW_MIN_8822B)
+
 
 
 #define BIT_SHIFT_BCNIFS_8822B 0
 #define BIT_MASK_BCNIFS_8822B 0xff
 #define BIT_BCNIFS_8822B(x) (((x) & BIT_MASK_BCNIFS_8822B) << BIT_SHIFT_BCNIFS_8822B)
-#define BIT_GET_BCNIFS_8822B(x) (((x) >> BIT_SHIFT_BCNIFS_8822B) & BIT_MASK_BCNIFS_8822B)

+#define BIT_GET_BCNIFS_8822B(x) (((x) >> BIT_SHIFT_BCNIFS_8822B) & BIT_MASK_BCNIFS_8822B)
+
 
 
 /* 2 REG_PIFS_8822B */
@@ -6447,7 +7118,8 @@
 #define BIT_SHIFT_PIFS_8822B 0
 #define BIT_MASK_PIFS_8822B 0xff
 #define BIT_PIFS_8822B(x) (((x) & BIT_MASK_PIFS_8822B) << BIT_SHIFT_PIFS_8822B)
-#define BIT_GET_PIFS_8822B(x) (((x) >> BIT_SHIFT_PIFS_8822B) & BIT_MASK_PIFS_8822B)

+#define BIT_GET_PIFS_8822B(x) (((x) >> BIT_SHIFT_PIFS_8822B) & BIT_MASK_PIFS_8822B)
+
 
 
 /* 2 REG_RDG_PIFS_8822B */
@@ -6455,7 +7127,8 @@
 #define BIT_SHIFT_RDG_PIFS_8822B 0
 #define BIT_MASK_RDG_PIFS_8822B 0xff
 #define BIT_RDG_PIFS_8822B(x) (((x) & BIT_MASK_RDG_PIFS_8822B) << BIT_SHIFT_RDG_PIFS_8822B)
-#define BIT_GET_RDG_PIFS_8822B(x) (((x) >> BIT_SHIFT_RDG_PIFS_8822B) & BIT_MASK_RDG_PIFS_8822B)

+#define BIT_GET_RDG_PIFS_8822B(x) (((x) >> BIT_SHIFT_RDG_PIFS_8822B) & BIT_MASK_RDG_PIFS_8822B)
+
 
 
 /* 2 REG_SIFS_8822B */
@@ -6463,25 +7136,29 @@
 #define BIT_SHIFT_SIFS_OFDM_TRX_8822B 24
 #define BIT_MASK_SIFS_OFDM_TRX_8822B 0xff
 #define BIT_SIFS_OFDM_TRX_8822B(x) (((x) & BIT_MASK_SIFS_OFDM_TRX_8822B) << BIT_SHIFT_SIFS_OFDM_TRX_8822B)
-#define BIT_GET_SIFS_OFDM_TRX_8822B(x) (((x) >> BIT_SHIFT_SIFS_OFDM_TRX_8822B) & BIT_MASK_SIFS_OFDM_TRX_8822B)

+#define BIT_GET_SIFS_OFDM_TRX_8822B(x) (((x) >> BIT_SHIFT_SIFS_OFDM_TRX_8822B) & BIT_MASK_SIFS_OFDM_TRX_8822B)
+
 
 
 #define BIT_SHIFT_SIFS_CCK_TRX_8822B 16
 #define BIT_MASK_SIFS_CCK_TRX_8822B 0xff
 #define BIT_SIFS_CCK_TRX_8822B(x) (((x) & BIT_MASK_SIFS_CCK_TRX_8822B) << BIT_SHIFT_SIFS_CCK_TRX_8822B)
-#define BIT_GET_SIFS_CCK_TRX_8822B(x) (((x) >> BIT_SHIFT_SIFS_CCK_TRX_8822B) & BIT_MASK_SIFS_CCK_TRX_8822B)

+#define BIT_GET_SIFS_CCK_TRX_8822B(x) (((x) >> BIT_SHIFT_SIFS_CCK_TRX_8822B) & BIT_MASK_SIFS_CCK_TRX_8822B)
+
 
 
 #define BIT_SHIFT_SIFS_OFDM_CTX_8822B 8
 #define BIT_MASK_SIFS_OFDM_CTX_8822B 0xff
 #define BIT_SIFS_OFDM_CTX_8822B(x) (((x) & BIT_MASK_SIFS_OFDM_CTX_8822B) << BIT_SHIFT_SIFS_OFDM_CTX_8822B)
-#define BIT_GET_SIFS_OFDM_CTX_8822B(x) (((x) >> BIT_SHIFT_SIFS_OFDM_CTX_8822B) & BIT_MASK_SIFS_OFDM_CTX_8822B)

+#define BIT_GET_SIFS_OFDM_CTX_8822B(x) (((x) >> BIT_SHIFT_SIFS_OFDM_CTX_8822B) & BIT_MASK_SIFS_OFDM_CTX_8822B)
+
 
 
 #define BIT_SHIFT_SIFS_CCK_CTX_8822B 0
 #define BIT_MASK_SIFS_CCK_CTX_8822B 0xff
 #define BIT_SIFS_CCK_CTX_8822B(x) (((x) & BIT_MASK_SIFS_CCK_CTX_8822B) << BIT_SHIFT_SIFS_CCK_CTX_8822B)
-#define BIT_GET_SIFS_CCK_CTX_8822B(x) (((x) >> BIT_SHIFT_SIFS_CCK_CTX_8822B) & BIT_MASK_SIFS_CCK_CTX_8822B)

+#define BIT_GET_SIFS_CCK_CTX_8822B(x) (((x) >> BIT_SHIFT_SIFS_CCK_CTX_8822B) & BIT_MASK_SIFS_CCK_CTX_8822B)
+
 
 
 /* 2 REG_TSFTR_SYN_OFFSET_8822B */
@@ -6489,7 +7166,8 @@
 #define BIT_SHIFT_TSFTR_SNC_OFFSET_8822B 0
 #define BIT_MASK_TSFTR_SNC_OFFSET_8822B 0xffff
 #define BIT_TSFTR_SNC_OFFSET_8822B(x) (((x) & BIT_MASK_TSFTR_SNC_OFFSET_8822B) << BIT_SHIFT_TSFTR_SNC_OFFSET_8822B)
-#define BIT_GET_TSFTR_SNC_OFFSET_8822B(x) (((x) >> BIT_SHIFT_TSFTR_SNC_OFFSET_8822B) & BIT_MASK_TSFTR_SNC_OFFSET_8822B)

+#define BIT_GET_TSFTR_SNC_OFFSET_8822B(x) (((x) >> BIT_SHIFT_TSFTR_SNC_OFFSET_8822B) & BIT_MASK_TSFTR_SNC_OFFSET_8822B)
+
 
 
 /* 2 REG_AGGR_BREAK_TIME_8822B */
@@ -6497,7 +7175,8 @@
 #define BIT_SHIFT_AGGR_BK_TIME_8822B 0
 #define BIT_MASK_AGGR_BK_TIME_8822B 0xff
 #define BIT_AGGR_BK_TIME_8822B(x) (((x) & BIT_MASK_AGGR_BK_TIME_8822B) << BIT_SHIFT_AGGR_BK_TIME_8822B)
-#define BIT_GET_AGGR_BK_TIME_8822B(x) (((x) >> BIT_SHIFT_AGGR_BK_TIME_8822B) & BIT_MASK_AGGR_BK_TIME_8822B)

+#define BIT_GET_AGGR_BK_TIME_8822B(x) (((x) >> BIT_SHIFT_AGGR_BK_TIME_8822B) & BIT_MASK_AGGR_BK_TIME_8822B)
+
 
 
 /* 2 REG_SLOT_8822B */
@@ -6505,7 +7184,8 @@
 #define BIT_SHIFT_SLOT_8822B 0
 #define BIT_MASK_SLOT_8822B 0xff
 #define BIT_SLOT_8822B(x) (((x) & BIT_MASK_SLOT_8822B) << BIT_SHIFT_SLOT_8822B)
-#define BIT_GET_SLOT_8822B(x) (((x) >> BIT_SHIFT_SLOT_8822B) & BIT_MASK_SLOT_8822B)

+#define BIT_GET_SLOT_8822B(x) (((x) >> BIT_SHIFT_SLOT_8822B) & BIT_MASK_SLOT_8822B)
+
 
 
 /* 2 REG_TX_PTCL_CTRL_8822B */
@@ -6517,7 +7197,8 @@
 #define BIT_SHIFT_TXQ_NAV_MSK_8822B 8
 #define BIT_MASK_TXQ_NAV_MSK_8822B 0xf
 #define BIT_TXQ_NAV_MSK_8822B(x) (((x) & BIT_MASK_TXQ_NAV_MSK_8822B) << BIT_SHIFT_TXQ_NAV_MSK_8822B)
-#define BIT_GET_TXQ_NAV_MSK_8822B(x) (((x) >> BIT_SHIFT_TXQ_NAV_MSK_8822B) & BIT_MASK_TXQ_NAV_MSK_8822B)

+#define BIT_GET_TXQ_NAV_MSK_8822B(x) (((x) >> BIT_SHIFT_TXQ_NAV_MSK_8822B) & BIT_MASK_TXQ_NAV_MSK_8822B)
+
 
 #define BIT_DIS_CW_8822B BIT(7)
 #define BIT_NAV_END_TXOP_8822B BIT(6)
@@ -6594,13 +7275,15 @@
 #define BIT_SHIFT_CCA_FILTER_THRS_8822B 8
 #define BIT_MASK_CCA_FILTER_THRS_8822B 0xff
 #define BIT_CCA_FILTER_THRS_8822B(x) (((x) & BIT_MASK_CCA_FILTER_THRS_8822B) << BIT_SHIFT_CCA_FILTER_THRS_8822B)
-#define BIT_GET_CCA_FILTER_THRS_8822B(x) (((x) >> BIT_SHIFT_CCA_FILTER_THRS_8822B) & BIT_MASK_CCA_FILTER_THRS_8822B)

+#define BIT_GET_CCA_FILTER_THRS_8822B(x) (((x) >> BIT_SHIFT_CCA_FILTER_THRS_8822B) & BIT_MASK_CCA_FILTER_THRS_8822B)
+
 
 
 #define BIT_SHIFT_EDCCA_THRS_8822B 0
 #define BIT_MASK_EDCCA_THRS_8822B 0xff
 #define BIT_EDCCA_THRS_8822B(x) (((x) & BIT_MASK_EDCCA_THRS_8822B) << BIT_SHIFT_EDCCA_THRS_8822B)
-#define BIT_GET_EDCCA_THRS_8822B(x) (((x) >> BIT_SHIFT_EDCCA_THRS_8822B) & BIT_MASK_EDCCA_THRS_8822B)

+#define BIT_GET_EDCCA_THRS_8822B(x) (((x) >> BIT_SHIFT_EDCCA_THRS_8822B) & BIT_MASK_EDCCA_THRS_8822B)
+
 
 
 /* 2 REG_P2PPS_SPEC_STATE_8822B */
@@ -6620,7 +7303,8 @@
 #define BIT_SHIFT_P2PON_DIS_TXTIME_8822B 0
 #define BIT_MASK_P2PON_DIS_TXTIME_8822B 0xff
 #define BIT_P2PON_DIS_TXTIME_8822B(x) (((x) & BIT_MASK_P2PON_DIS_TXTIME_8822B) << BIT_SHIFT_P2PON_DIS_TXTIME_8822B)
-#define BIT_GET_P2PON_DIS_TXTIME_8822B(x) (((x) >> BIT_SHIFT_P2PON_DIS_TXTIME_8822B) & BIT_MASK_P2PON_DIS_TXTIME_8822B)

+#define BIT_GET_P2PON_DIS_TXTIME_8822B(x) (((x) >> BIT_SHIFT_P2PON_DIS_TXTIME_8822B) & BIT_MASK_P2PON_DIS_TXTIME_8822B)
+
 
 
 /* 2 REG_QUEUE_INCOL_THR_8822B */
@@ -6628,25 +7312,29 @@
 #define BIT_SHIFT_BK_QUEUE_THR_8822B 24
 #define BIT_MASK_BK_QUEUE_THR_8822B 0xff
 #define BIT_BK_QUEUE_THR_8822B(x) (((x) & BIT_MASK_BK_QUEUE_THR_8822B) << BIT_SHIFT_BK_QUEUE_THR_8822B)
-#define BIT_GET_BK_QUEUE_THR_8822B(x) (((x) >> BIT_SHIFT_BK_QUEUE_THR_8822B) & BIT_MASK_BK_QUEUE_THR_8822B)

+#define BIT_GET_BK_QUEUE_THR_8822B(x) (((x) >> BIT_SHIFT_BK_QUEUE_THR_8822B) & BIT_MASK_BK_QUEUE_THR_8822B)
+
 
 
 #define BIT_SHIFT_BE_QUEUE_THR_8822B 16
 #define BIT_MASK_BE_QUEUE_THR_8822B 0xff
 #define BIT_BE_QUEUE_THR_8822B(x) (((x) & BIT_MASK_BE_QUEUE_THR_8822B) << BIT_SHIFT_BE_QUEUE_THR_8822B)
-#define BIT_GET_BE_QUEUE_THR_8822B(x) (((x) >> BIT_SHIFT_BE_QUEUE_THR_8822B) & BIT_MASK_BE_QUEUE_THR_8822B)

+#define BIT_GET_BE_QUEUE_THR_8822B(x) (((x) >> BIT_SHIFT_BE_QUEUE_THR_8822B) & BIT_MASK_BE_QUEUE_THR_8822B)
+
 
 
 #define BIT_SHIFT_VI_QUEUE_THR_8822B 8
 #define BIT_MASK_VI_QUEUE_THR_8822B 0xff
 #define BIT_VI_QUEUE_THR_8822B(x) (((x) & BIT_MASK_VI_QUEUE_THR_8822B) << BIT_SHIFT_VI_QUEUE_THR_8822B)
-#define BIT_GET_VI_QUEUE_THR_8822B(x) (((x) >> BIT_SHIFT_VI_QUEUE_THR_8822B) & BIT_MASK_VI_QUEUE_THR_8822B)

+#define BIT_GET_VI_QUEUE_THR_8822B(x) (((x) >> BIT_SHIFT_VI_QUEUE_THR_8822B) & BIT_MASK_VI_QUEUE_THR_8822B)
+
 
 
 #define BIT_SHIFT_VO_QUEUE_THR_8822B 0
 #define BIT_MASK_VO_QUEUE_THR_8822B 0xff
 #define BIT_VO_QUEUE_THR_8822B(x) (((x) & BIT_MASK_VO_QUEUE_THR_8822B) << BIT_SHIFT_VO_QUEUE_THR_8822B)
-#define BIT_GET_VO_QUEUE_THR_8822B(x) (((x) >> BIT_SHIFT_VO_QUEUE_THR_8822B) & BIT_MASK_VO_QUEUE_THR_8822B)

+#define BIT_GET_VO_QUEUE_THR_8822B(x) (((x) >> BIT_SHIFT_VO_QUEUE_THR_8822B) & BIT_MASK_VO_QUEUE_THR_8822B)
+
 
 
 /* 2 REG_QUEUE_INCOL_EN_8822B */
@@ -6655,25 +7343,29 @@
 #define BIT_SHIFT_BE_TRIGGER_NUM_8822B 12
 #define BIT_MASK_BE_TRIGGER_NUM_8822B 0xf
 #define BIT_BE_TRIGGER_NUM_8822B(x) (((x) & BIT_MASK_BE_TRIGGER_NUM_8822B) << BIT_SHIFT_BE_TRIGGER_NUM_8822B)
-#define BIT_GET_BE_TRIGGER_NUM_8822B(x) (((x) >> BIT_SHIFT_BE_TRIGGER_NUM_8822B) & BIT_MASK_BE_TRIGGER_NUM_8822B)

+#define BIT_GET_BE_TRIGGER_NUM_8822B(x) (((x) >> BIT_SHIFT_BE_TRIGGER_NUM_8822B) & BIT_MASK_BE_TRIGGER_NUM_8822B)
+
 
 
 #define BIT_SHIFT_BK_TRIGGER_NUM_8822B 8
 #define BIT_MASK_BK_TRIGGER_NUM_8822B 0xf
 #define BIT_BK_TRIGGER_NUM_8822B(x) (((x) & BIT_MASK_BK_TRIGGER_NUM_8822B) << BIT_SHIFT_BK_TRIGGER_NUM_8822B)
-#define BIT_GET_BK_TRIGGER_NUM_8822B(x) (((x) >> BIT_SHIFT_BK_TRIGGER_NUM_8822B) & BIT_MASK_BK_TRIGGER_NUM_8822B)

+#define BIT_GET_BK_TRIGGER_NUM_8822B(x) (((x) >> BIT_SHIFT_BK_TRIGGER_NUM_8822B) & BIT_MASK_BK_TRIGGER_NUM_8822B)
+
 
 
 #define BIT_SHIFT_VI_TRIGGER_NUM_8822B 4
 #define BIT_MASK_VI_TRIGGER_NUM_8822B 0xf
 #define BIT_VI_TRIGGER_NUM_8822B(x) (((x) & BIT_MASK_VI_TRIGGER_NUM_8822B) << BIT_SHIFT_VI_TRIGGER_NUM_8822B)
-#define BIT_GET_VI_TRIGGER_NUM_8822B(x) (((x) >> BIT_SHIFT_VI_TRIGGER_NUM_8822B) & BIT_MASK_VI_TRIGGER_NUM_8822B)

+#define BIT_GET_VI_TRIGGER_NUM_8822B(x) (((x) >> BIT_SHIFT_VI_TRIGGER_NUM_8822B) & BIT_MASK_VI_TRIGGER_NUM_8822B)
+
 
 
 #define BIT_SHIFT_VO_TRIGGER_NUM_8822B 0
 #define BIT_MASK_VO_TRIGGER_NUM_8822B 0xf
 #define BIT_VO_TRIGGER_NUM_8822B(x) (((x) & BIT_MASK_VO_TRIGGER_NUM_8822B) << BIT_SHIFT_VO_TRIGGER_NUM_8822B)
-#define BIT_GET_VO_TRIGGER_NUM_8822B(x) (((x) >> BIT_SHIFT_VO_TRIGGER_NUM_8822B) & BIT_MASK_VO_TRIGGER_NUM_8822B)

+#define BIT_GET_VO_TRIGGER_NUM_8822B(x) (((x) >> BIT_SHIFT_VO_TRIGGER_NUM_8822B) & BIT_MASK_VO_TRIGGER_NUM_8822B)
+
 
 
 /* 2 REG_TBTT_PROHIBIT_8822B */
@@ -6681,13 +7373,15 @@
 #define BIT_SHIFT_TBTT_HOLD_TIME_AP_8822B 8
 #define BIT_MASK_TBTT_HOLD_TIME_AP_8822B 0xfff
 #define BIT_TBTT_HOLD_TIME_AP_8822B(x) (((x) & BIT_MASK_TBTT_HOLD_TIME_AP_8822B) << BIT_SHIFT_TBTT_HOLD_TIME_AP_8822B)
-#define BIT_GET_TBTT_HOLD_TIME_AP_8822B(x) (((x) >> BIT_SHIFT_TBTT_HOLD_TIME_AP_8822B) & BIT_MASK_TBTT_HOLD_TIME_AP_8822B)

+#define BIT_GET_TBTT_HOLD_TIME_AP_8822B(x) (((x) >> BIT_SHIFT_TBTT_HOLD_TIME_AP_8822B) & BIT_MASK_TBTT_HOLD_TIME_AP_8822B)
+
 
 
 #define BIT_SHIFT_TBTT_PROHIBIT_SETUP_8822B 0
 #define BIT_MASK_TBTT_PROHIBIT_SETUP_8822B 0xf
 #define BIT_TBTT_PROHIBIT_SETUP_8822B(x) (((x) & BIT_MASK_TBTT_PROHIBIT_SETUP_8822B) << BIT_SHIFT_TBTT_PROHIBIT_SETUP_8822B)
-#define BIT_GET_TBTT_PROHIBIT_SETUP_8822B(x) (((x) >> BIT_SHIFT_TBTT_PROHIBIT_SETUP_8822B) & BIT_MASK_TBTT_PROHIBIT_SETUP_8822B)

+#define BIT_GET_TBTT_PROHIBIT_SETUP_8822B(x) (((x) >> BIT_SHIFT_TBTT_PROHIBIT_SETUP_8822B) & BIT_MASK_TBTT_PROHIBIT_SETUP_8822B)
+
 
 
 /* 2 REG_P2PPS_STATE_8822B */
@@ -6705,7 +7399,8 @@
 #define BIT_SHIFT_RD_NAV_PROT_NXT_8822B 0
 #define BIT_MASK_RD_NAV_PROT_NXT_8822B 0xffff
 #define BIT_RD_NAV_PROT_NXT_8822B(x) (((x) & BIT_MASK_RD_NAV_PROT_NXT_8822B) << BIT_SHIFT_RD_NAV_PROT_NXT_8822B)
-#define BIT_GET_RD_NAV_PROT_NXT_8822B(x) (((x) >> BIT_SHIFT_RD_NAV_PROT_NXT_8822B) & BIT_MASK_RD_NAV_PROT_NXT_8822B)

+#define BIT_GET_RD_NAV_PROT_NXT_8822B(x) (((x) >> BIT_SHIFT_RD_NAV_PROT_NXT_8822B) & BIT_MASK_RD_NAV_PROT_NXT_8822B)
+
 
 
 /* 2 REG_NAV_PROT_LEN_8822B */
@@ -6713,7 +7408,8 @@
 #define BIT_SHIFT_NAV_PROT_LEN_8822B 0
 #define BIT_MASK_NAV_PROT_LEN_8822B 0xffff
 #define BIT_NAV_PROT_LEN_8822B(x) (((x) & BIT_MASK_NAV_PROT_LEN_8822B) << BIT_SHIFT_NAV_PROT_LEN_8822B)
-#define BIT_GET_NAV_PROT_LEN_8822B(x) (((x) >> BIT_SHIFT_NAV_PROT_LEN_8822B) & BIT_MASK_NAV_PROT_LEN_8822B)

+#define BIT_GET_NAV_PROT_LEN_8822B(x) (((x) >> BIT_SHIFT_NAV_PROT_LEN_8822B) & BIT_MASK_NAV_PROT_LEN_8822B)
+
 
 
 /* 2 REG_BCN_CTRL_8822B */
@@ -6739,7 +7435,8 @@
 #define BIT_SHIFT_MBID_BCN_NUM_8822B 0
 #define BIT_MASK_MBID_BCN_NUM_8822B 0x7
 #define BIT_MBID_BCN_NUM_8822B(x) (((x) & BIT_MASK_MBID_BCN_NUM_8822B) << BIT_SHIFT_MBID_BCN_NUM_8822B)
-#define BIT_GET_MBID_BCN_NUM_8822B(x) (((x) >> BIT_SHIFT_MBID_BCN_NUM_8822B) & BIT_MASK_MBID_BCN_NUM_8822B)

+#define BIT_GET_MBID_BCN_NUM_8822B(x) (((x) >> BIT_SHIFT_MBID_BCN_NUM_8822B) & BIT_MASK_MBID_BCN_NUM_8822B)
+
 
 
 /* 2 REG_DUAL_TSF_RST_8822B */
@@ -6755,19 +7452,22 @@
 #define BIT_SHIFT_BCN_TIMER_SEL_FWRD_8822B 28
 #define BIT_MASK_BCN_TIMER_SEL_FWRD_8822B 0x7
 #define BIT_BCN_TIMER_SEL_FWRD_8822B(x) (((x) & BIT_MASK_BCN_TIMER_SEL_FWRD_8822B) << BIT_SHIFT_BCN_TIMER_SEL_FWRD_8822B)
-#define BIT_GET_BCN_TIMER_SEL_FWRD_8822B(x) (((x) >> BIT_SHIFT_BCN_TIMER_SEL_FWRD_8822B) & BIT_MASK_BCN_TIMER_SEL_FWRD_8822B)

+#define BIT_GET_BCN_TIMER_SEL_FWRD_8822B(x) (((x) >> BIT_SHIFT_BCN_TIMER_SEL_FWRD_8822B) & BIT_MASK_BCN_TIMER_SEL_FWRD_8822B)
+
 
 
 #define BIT_SHIFT_BCN_SPACE_CLINT0_8822B 16
 #define BIT_MASK_BCN_SPACE_CLINT0_8822B 0xfff
 #define BIT_BCN_SPACE_CLINT0_8822B(x) (((x) & BIT_MASK_BCN_SPACE_CLINT0_8822B) << BIT_SHIFT_BCN_SPACE_CLINT0_8822B)
-#define BIT_GET_BCN_SPACE_CLINT0_8822B(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT0_8822B) & BIT_MASK_BCN_SPACE_CLINT0_8822B)

+#define BIT_GET_BCN_SPACE_CLINT0_8822B(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT0_8822B) & BIT_MASK_BCN_SPACE_CLINT0_8822B)
+
 
 
 #define BIT_SHIFT_BCN_SPACE0_8822B 0
 #define BIT_MASK_BCN_SPACE0_8822B 0xffff
 #define BIT_BCN_SPACE0_8822B(x) (((x) & BIT_MASK_BCN_SPACE0_8822B) << BIT_SHIFT_BCN_SPACE0_8822B)
-#define BIT_GET_BCN_SPACE0_8822B(x) (((x) >> BIT_SHIFT_BCN_SPACE0_8822B) & BIT_MASK_BCN_SPACE0_8822B)

+#define BIT_GET_BCN_SPACE0_8822B(x) (((x) >> BIT_SHIFT_BCN_SPACE0_8822B) & BIT_MASK_BCN_SPACE0_8822B)
+
 
 
 /* 2 REG_DRVERLYINT_8822B */
@@ -6775,7 +7475,8 @@
 #define BIT_SHIFT_DRVERLYITV_8822B 0
 #define BIT_MASK_DRVERLYITV_8822B 0xff
 #define BIT_DRVERLYITV_8822B(x) (((x) & BIT_MASK_DRVERLYITV_8822B) << BIT_SHIFT_DRVERLYITV_8822B)
-#define BIT_GET_DRVERLYITV_8822B(x) (((x) >> BIT_SHIFT_DRVERLYITV_8822B) & BIT_MASK_DRVERLYITV_8822B)

+#define BIT_GET_DRVERLYITV_8822B(x) (((x) >> BIT_SHIFT_DRVERLYITV_8822B) & BIT_MASK_DRVERLYITV_8822B)
+
 
 
 /* 2 REG_BCNDMATIM_8822B */
@@ -6783,7 +7484,8 @@
 #define BIT_SHIFT_BCNDMATIM_8822B 0
 #define BIT_MASK_BCNDMATIM_8822B 0xff
 #define BIT_BCNDMATIM_8822B(x) (((x) & BIT_MASK_BCNDMATIM_8822B) << BIT_SHIFT_BCNDMATIM_8822B)
-#define BIT_GET_BCNDMATIM_8822B(x) (((x) >> BIT_SHIFT_BCNDMATIM_8822B) & BIT_MASK_BCNDMATIM_8822B)

+#define BIT_GET_BCNDMATIM_8822B(x) (((x) >> BIT_SHIFT_BCNDMATIM_8822B) & BIT_MASK_BCNDMATIM_8822B)
+
 
 
 /* 2 REG_ATIMWND_8822B */
@@ -6791,7 +7493,8 @@
 #define BIT_SHIFT_ATIMWND0_8822B 0
 #define BIT_MASK_ATIMWND0_8822B 0xffff
 #define BIT_ATIMWND0_8822B(x) (((x) & BIT_MASK_ATIMWND0_8822B) << BIT_SHIFT_ATIMWND0_8822B)
-#define BIT_GET_ATIMWND0_8822B(x) (((x) >> BIT_SHIFT_ATIMWND0_8822B) & BIT_MASK_ATIMWND0_8822B)

+#define BIT_GET_ATIMWND0_8822B(x) (((x) >> BIT_SHIFT_ATIMWND0_8822B) & BIT_MASK_ATIMWND0_8822B)
+
 
 
 /* 2 REG_USTIME_TSF_8822B */
@@ -6799,7 +7502,8 @@
 #define BIT_SHIFT_USTIME_TSF_V1_8822B 0
 #define BIT_MASK_USTIME_TSF_V1_8822B 0xff
 #define BIT_USTIME_TSF_V1_8822B(x) (((x) & BIT_MASK_USTIME_TSF_V1_8822B) << BIT_SHIFT_USTIME_TSF_V1_8822B)
-#define BIT_GET_USTIME_TSF_V1_8822B(x) (((x) >> BIT_SHIFT_USTIME_TSF_V1_8822B) & BIT_MASK_USTIME_TSF_V1_8822B)

+#define BIT_GET_USTIME_TSF_V1_8822B(x) (((x) >> BIT_SHIFT_USTIME_TSF_V1_8822B) & BIT_MASK_USTIME_TSF_V1_8822B)
+
 
 
 /* 2 REG_BCN_MAX_ERR_8822B */
@@ -6807,7 +7511,8 @@
 #define BIT_SHIFT_BCN_MAX_ERR_8822B 0
 #define BIT_MASK_BCN_MAX_ERR_8822B 0xff
 #define BIT_BCN_MAX_ERR_8822B(x) (((x) & BIT_MASK_BCN_MAX_ERR_8822B) << BIT_SHIFT_BCN_MAX_ERR_8822B)
-#define BIT_GET_BCN_MAX_ERR_8822B(x) (((x) >> BIT_SHIFT_BCN_MAX_ERR_8822B) & BIT_MASK_BCN_MAX_ERR_8822B)

+#define BIT_GET_BCN_MAX_ERR_8822B(x) (((x) >> BIT_SHIFT_BCN_MAX_ERR_8822B) & BIT_MASK_BCN_MAX_ERR_8822B)
+
 
 
 /* 2 REG_RXTSF_OFFSET_CCK_8822B */
@@ -6815,7 +7520,8 @@
 #define BIT_SHIFT_CCK_RXTSF_OFFSET_8822B 0
 #define BIT_MASK_CCK_RXTSF_OFFSET_8822B 0xff
 #define BIT_CCK_RXTSF_OFFSET_8822B(x) (((x) & BIT_MASK_CCK_RXTSF_OFFSET_8822B) << BIT_SHIFT_CCK_RXTSF_OFFSET_8822B)
-#define BIT_GET_CCK_RXTSF_OFFSET_8822B(x) (((x) >> BIT_SHIFT_CCK_RXTSF_OFFSET_8822B) & BIT_MASK_CCK_RXTSF_OFFSET_8822B)

+#define BIT_GET_CCK_RXTSF_OFFSET_8822B(x) (((x) >> BIT_SHIFT_CCK_RXTSF_OFFSET_8822B) & BIT_MASK_CCK_RXTSF_OFFSET_8822B)
+
 
 
 /* 2 REG_RXTSF_OFFSET_OFDM_8822B */
@@ -6823,7 +7529,8 @@
 #define BIT_SHIFT_OFDM_RXTSF_OFFSET_8822B 0
 #define BIT_MASK_OFDM_RXTSF_OFFSET_8822B 0xff
 #define BIT_OFDM_RXTSF_OFFSET_8822B(x) (((x) & BIT_MASK_OFDM_RXTSF_OFFSET_8822B) << BIT_SHIFT_OFDM_RXTSF_OFFSET_8822B)
-#define BIT_GET_OFDM_RXTSF_OFFSET_8822B(x) (((x) >> BIT_SHIFT_OFDM_RXTSF_OFFSET_8822B) & BIT_MASK_OFDM_RXTSF_OFFSET_8822B)

+#define BIT_GET_OFDM_RXTSF_OFFSET_8822B(x) (((x) >> BIT_SHIFT_OFDM_RXTSF_OFFSET_8822B) & BIT_MASK_OFDM_RXTSF_OFFSET_8822B)
+
 
 
 /* 2 REG_TSFTR_8822B */
@@ -6831,7 +7538,8 @@
 #define BIT_SHIFT_TSF_TIMER_8822B 0
 #define BIT_MASK_TSF_TIMER_8822B 0xffffffffffffffffL
 #define BIT_TSF_TIMER_8822B(x) (((x) & BIT_MASK_TSF_TIMER_8822B) << BIT_SHIFT_TSF_TIMER_8822B)
-#define BIT_GET_TSF_TIMER_8822B(x) (((x) >> BIT_SHIFT_TSF_TIMER_8822B) & BIT_MASK_TSF_TIMER_8822B)

+#define BIT_GET_TSF_TIMER_8822B(x) (((x) >> BIT_SHIFT_TSF_TIMER_8822B) & BIT_MASK_TSF_TIMER_8822B)
+
 
 
 /* 2 REG_FREERUN_CNT_8822B */
@@ -6839,7 +7547,8 @@
 #define BIT_SHIFT_FREERUN_CNT_8822B 0
 #define BIT_MASK_FREERUN_CNT_8822B 0xffffffffffffffffL
 #define BIT_FREERUN_CNT_8822B(x) (((x) & BIT_MASK_FREERUN_CNT_8822B) << BIT_SHIFT_FREERUN_CNT_8822B)
-#define BIT_GET_FREERUN_CNT_8822B(x) (((x) >> BIT_SHIFT_FREERUN_CNT_8822B) & BIT_MASK_FREERUN_CNT_8822B)

+#define BIT_GET_FREERUN_CNT_8822B(x) (((x) >> BIT_SHIFT_FREERUN_CNT_8822B) & BIT_MASK_FREERUN_CNT_8822B)
+
 
 
 /* 2 REG_ATIMWND1_V1_8822B */
@@ -6847,7 +7556,8 @@
 #define BIT_SHIFT_ATIMWND1_V1_8822B 0
 #define BIT_MASK_ATIMWND1_V1_8822B 0xff
 #define BIT_ATIMWND1_V1_8822B(x) (((x) & BIT_MASK_ATIMWND1_V1_8822B) << BIT_SHIFT_ATIMWND1_V1_8822B)
-#define BIT_GET_ATIMWND1_V1_8822B(x) (((x) >> BIT_SHIFT_ATIMWND1_V1_8822B) & BIT_MASK_ATIMWND1_V1_8822B)

+#define BIT_GET_ATIMWND1_V1_8822B(x) (((x) >> BIT_SHIFT_ATIMWND1_V1_8822B) & BIT_MASK_ATIMWND1_V1_8822B)
+
 
 
 /* 2 REG_TBTT_PROHIBIT_INFRA_8822B */
@@ -6855,7 +7565,8 @@
 #define BIT_SHIFT_TBTT_PROHIBIT_INFRA_8822B 0
 #define BIT_MASK_TBTT_PROHIBIT_INFRA_8822B 0xff
 #define BIT_TBTT_PROHIBIT_INFRA_8822B(x) (((x) & BIT_MASK_TBTT_PROHIBIT_INFRA_8822B) << BIT_SHIFT_TBTT_PROHIBIT_INFRA_8822B)
-#define BIT_GET_TBTT_PROHIBIT_INFRA_8822B(x) (((x) >> BIT_SHIFT_TBTT_PROHIBIT_INFRA_8822B) & BIT_MASK_TBTT_PROHIBIT_INFRA_8822B)

+#define BIT_GET_TBTT_PROHIBIT_INFRA_8822B(x) (((x) >> BIT_SHIFT_TBTT_PROHIBIT_INFRA_8822B) & BIT_MASK_TBTT_PROHIBIT_INFRA_8822B)
+
 
 
 /* 2 REG_CTWND_8822B */
@@ -6863,7 +7574,8 @@
 #define BIT_SHIFT_CTWND_8822B 0
 #define BIT_MASK_CTWND_8822B 0xff
 #define BIT_CTWND_8822B(x) (((x) & BIT_MASK_CTWND_8822B) << BIT_SHIFT_CTWND_8822B)
-#define BIT_GET_CTWND_8822B(x) (((x) >> BIT_SHIFT_CTWND_8822B) & BIT_MASK_CTWND_8822B)

+#define BIT_GET_CTWND_8822B(x) (((x) >> BIT_SHIFT_CTWND_8822B) & BIT_MASK_CTWND_8822B)
+
 
 
 /* 2 REG_BCNIVLCUNT_8822B */
@@ -6871,7 +7583,8 @@
 #define BIT_SHIFT_BCNIVLCUNT_8822B 0
 #define BIT_MASK_BCNIVLCUNT_8822B 0x7f
 #define BIT_BCNIVLCUNT_8822B(x) (((x) & BIT_MASK_BCNIVLCUNT_8822B) << BIT_SHIFT_BCNIVLCUNT_8822B)
-#define BIT_GET_BCNIVLCUNT_8822B(x) (((x) >> BIT_SHIFT_BCNIVLCUNT_8822B) & BIT_MASK_BCNIVLCUNT_8822B)

+#define BIT_GET_BCNIVLCUNT_8822B(x) (((x) >> BIT_SHIFT_BCNIVLCUNT_8822B) & BIT_MASK_BCNIVLCUNT_8822B)
+
 
 
 /* 2 REG_BCNDROPCTRL_8822B */
@@ -6880,7 +7593,8 @@
 #define BIT_SHIFT_BEACON_DROP_IVL_8822B 0
 #define BIT_MASK_BEACON_DROP_IVL_8822B 0x7f
 #define BIT_BEACON_DROP_IVL_8822B(x) (((x) & BIT_MASK_BEACON_DROP_IVL_8822B) << BIT_SHIFT_BEACON_DROP_IVL_8822B)
-#define BIT_GET_BEACON_DROP_IVL_8822B(x) (((x) >> BIT_SHIFT_BEACON_DROP_IVL_8822B) & BIT_MASK_BEACON_DROP_IVL_8822B)

+#define BIT_GET_BEACON_DROP_IVL_8822B(x) (((x) >> BIT_SHIFT_BEACON_DROP_IVL_8822B) & BIT_MASK_BEACON_DROP_IVL_8822B)
+
 
 
 /* 2 REG_HGQ_TIMEOUT_PERIOD_8822B */
@@ -6888,7 +7602,8 @@
 #define BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8822B 0
 #define BIT_MASK_HGQ_TIMEOUT_PERIOD_8822B 0xff
 #define BIT_HGQ_TIMEOUT_PERIOD_8822B(x) (((x) & BIT_MASK_HGQ_TIMEOUT_PERIOD_8822B) << BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8822B)
-#define BIT_GET_HGQ_TIMEOUT_PERIOD_8822B(x) (((x) >> BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8822B) & BIT_MASK_HGQ_TIMEOUT_PERIOD_8822B)

+#define BIT_GET_HGQ_TIMEOUT_PERIOD_8822B(x) (((x) >> BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8822B) & BIT_MASK_HGQ_TIMEOUT_PERIOD_8822B)
+
 
 
 /* 2 REG_TXCMD_TIMEOUT_PERIOD_8822B */
@@ -6896,7 +7611,8 @@
 #define BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8822B 0
 #define BIT_MASK_TXCMD_TIMEOUT_PERIOD_8822B 0xff
 #define BIT_TXCMD_TIMEOUT_PERIOD_8822B(x) (((x) & BIT_MASK_TXCMD_TIMEOUT_PERIOD_8822B) << BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8822B)
-#define BIT_GET_TXCMD_TIMEOUT_PERIOD_8822B(x) (((x) >> BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8822B) & BIT_MASK_TXCMD_TIMEOUT_PERIOD_8822B)

+#define BIT_GET_TXCMD_TIMEOUT_PERIOD_8822B(x) (((x) >> BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8822B) & BIT_MASK_TXCMD_TIMEOUT_PERIOD_8822B)
+
 
 
 /* 2 REG_MISC_CTRL_8822B */
@@ -6908,7 +7624,8 @@
 #define BIT_SHIFT_DIS_SECONDARY_CCA_8822B 0
 #define BIT_MASK_DIS_SECONDARY_CCA_8822B 0x3
 #define BIT_DIS_SECONDARY_CCA_8822B(x) (((x) & BIT_MASK_DIS_SECONDARY_CCA_8822B) << BIT_SHIFT_DIS_SECONDARY_CCA_8822B)
-#define BIT_GET_DIS_SECONDARY_CCA_8822B(x) (((x) >> BIT_SHIFT_DIS_SECONDARY_CCA_8822B) & BIT_MASK_DIS_SECONDARY_CCA_8822B)

+#define BIT_GET_DIS_SECONDARY_CCA_8822B(x) (((x) >> BIT_SHIFT_DIS_SECONDARY_CCA_8822B) & BIT_MASK_DIS_SECONDARY_CCA_8822B)
+
 
 
 /* 2 REG_BCN_CTRL_CLINT1_8822B */
@@ -6942,7 +7659,8 @@
 #define BIT_SHIFT_PORT_SEL_8822B 0
 #define BIT_MASK_PORT_SEL_8822B 0x7
 #define BIT_PORT_SEL_8822B(x) (((x) & BIT_MASK_PORT_SEL_8822B) << BIT_SHIFT_PORT_SEL_8822B)
-#define BIT_GET_PORT_SEL_8822B(x) (((x) >> BIT_SHIFT_PORT_SEL_8822B) & BIT_MASK_PORT_SEL_8822B)

+#define BIT_GET_PORT_SEL_8822B(x) (((x) >> BIT_SHIFT_PORT_SEL_8822B) & BIT_MASK_PORT_SEL_8822B)
+
 
 
 /* 2 REG_P2PPS1_SPEC_STATE_8822B */
@@ -6990,7 +7708,8 @@
 #define BIT_SHIFT_PSTIMER0_INT_8822B 5
 #define BIT_MASK_PSTIMER0_INT_8822B 0x7ffffff
 #define BIT_PSTIMER0_INT_8822B(x) (((x) & BIT_MASK_PSTIMER0_INT_8822B) << BIT_SHIFT_PSTIMER0_INT_8822B)
-#define BIT_GET_PSTIMER0_INT_8822B(x) (((x) >> BIT_SHIFT_PSTIMER0_INT_8822B) & BIT_MASK_PSTIMER0_INT_8822B)

+#define BIT_GET_PSTIMER0_INT_8822B(x) (((x) >> BIT_SHIFT_PSTIMER0_INT_8822B) & BIT_MASK_PSTIMER0_INT_8822B)
+
 
 
 /* 2 REG_PS_TIMER1_8822B */
@@ -6998,7 +7717,8 @@
 #define BIT_SHIFT_PSTIMER1_INT_8822B 5
 #define BIT_MASK_PSTIMER1_INT_8822B 0x7ffffff
 #define BIT_PSTIMER1_INT_8822B(x) (((x) & BIT_MASK_PSTIMER1_INT_8822B) << BIT_SHIFT_PSTIMER1_INT_8822B)
-#define BIT_GET_PSTIMER1_INT_8822B(x) (((x) >> BIT_SHIFT_PSTIMER1_INT_8822B) & BIT_MASK_PSTIMER1_INT_8822B)

+#define BIT_GET_PSTIMER1_INT_8822B(x) (((x) >> BIT_SHIFT_PSTIMER1_INT_8822B) & BIT_MASK_PSTIMER1_INT_8822B)
+
 
 
 /* 2 REG_PS_TIMER2_8822B */
@@ -7006,7 +7726,8 @@
 #define BIT_SHIFT_PSTIMER2_INT_8822B 5
 #define BIT_MASK_PSTIMER2_INT_8822B 0x7ffffff
 #define BIT_PSTIMER2_INT_8822B(x) (((x) & BIT_MASK_PSTIMER2_INT_8822B) << BIT_SHIFT_PSTIMER2_INT_8822B)
-#define BIT_GET_PSTIMER2_INT_8822B(x) (((x) >> BIT_SHIFT_PSTIMER2_INT_8822B) & BIT_MASK_PSTIMER2_INT_8822B)

+#define BIT_GET_PSTIMER2_INT_8822B(x) (((x) >> BIT_SHIFT_PSTIMER2_INT_8822B) & BIT_MASK_PSTIMER2_INT_8822B)
+
 
 
 /* 2 REG_TBTT_CTN_AREA_8822B */
@@ -7014,7 +7735,8 @@
 #define BIT_SHIFT_TBTT_CTN_AREA_8822B 0
 #define BIT_MASK_TBTT_CTN_AREA_8822B 0xff
 #define BIT_TBTT_CTN_AREA_8822B(x) (((x) & BIT_MASK_TBTT_CTN_AREA_8822B) << BIT_SHIFT_TBTT_CTN_AREA_8822B)
-#define BIT_GET_TBTT_CTN_AREA_8822B(x) (((x) >> BIT_SHIFT_TBTT_CTN_AREA_8822B) & BIT_MASK_TBTT_CTN_AREA_8822B)

+#define BIT_GET_TBTT_CTN_AREA_8822B(x) (((x) >> BIT_SHIFT_TBTT_CTN_AREA_8822B) & BIT_MASK_TBTT_CTN_AREA_8822B)
+
 
 
 /* 2 REG_FORCE_BCN_IFS_8822B */
@@ -7022,7 +7744,8 @@
 #define BIT_SHIFT_FORCE_BCN_IFS_8822B 0
 #define BIT_MASK_FORCE_BCN_IFS_8822B 0xff
 #define BIT_FORCE_BCN_IFS_8822B(x) (((x) & BIT_MASK_FORCE_BCN_IFS_8822B) << BIT_SHIFT_FORCE_BCN_IFS_8822B)
-#define BIT_GET_FORCE_BCN_IFS_8822B(x) (((x) >> BIT_SHIFT_FORCE_BCN_IFS_8822B) & BIT_MASK_FORCE_BCN_IFS_8822B)

+#define BIT_GET_FORCE_BCN_IFS_8822B(x) (((x) >> BIT_SHIFT_FORCE_BCN_IFS_8822B) & BIT_MASK_FORCE_BCN_IFS_8822B)
+
 
 
 /* 2 REG_TXOP_MIN_8822B */
@@ -7030,7 +7753,8 @@
 #define BIT_SHIFT_TXOP_MIN_8822B 0
 #define BIT_MASK_TXOP_MIN_8822B 0x3fff
 #define BIT_TXOP_MIN_8822B(x) (((x) & BIT_MASK_TXOP_MIN_8822B) << BIT_SHIFT_TXOP_MIN_8822B)
-#define BIT_GET_TXOP_MIN_8822B(x) (((x) >> BIT_SHIFT_TXOP_MIN_8822B) & BIT_MASK_TXOP_MIN_8822B)

+#define BIT_GET_TXOP_MIN_8822B(x) (((x) >> BIT_SHIFT_TXOP_MIN_8822B) & BIT_MASK_TXOP_MIN_8822B)
+
 
 
 /* 2 REG_PRE_BKF_TIME_8822B */
@@ -7038,7 +7762,8 @@
 #define BIT_SHIFT_PRE_BKF_TIME_8822B 0
 #define BIT_MASK_PRE_BKF_TIME_8822B 0xff
 #define BIT_PRE_BKF_TIME_8822B(x) (((x) & BIT_MASK_PRE_BKF_TIME_8822B) << BIT_SHIFT_PRE_BKF_TIME_8822B)
-#define BIT_GET_PRE_BKF_TIME_8822B(x) (((x) >> BIT_SHIFT_PRE_BKF_TIME_8822B) & BIT_MASK_PRE_BKF_TIME_8822B)

+#define BIT_GET_PRE_BKF_TIME_8822B(x) (((x) >> BIT_SHIFT_PRE_BKF_TIME_8822B) & BIT_MASK_PRE_BKF_TIME_8822B)
+
 
 
 /* 2 REG_CROSS_TXOP_CTRL_8822B */
@@ -7051,7 +7776,8 @@
 #define BIT_SHIFT_ATIMWND2_8822B 0
 #define BIT_MASK_ATIMWND2_8822B 0xff
 #define BIT_ATIMWND2_8822B(x) (((x) & BIT_MASK_ATIMWND2_8822B) << BIT_SHIFT_ATIMWND2_8822B)
-#define BIT_GET_ATIMWND2_8822B(x) (((x) >> BIT_SHIFT_ATIMWND2_8822B) & BIT_MASK_ATIMWND2_8822B)

+#define BIT_GET_ATIMWND2_8822B(x) (((x) >> BIT_SHIFT_ATIMWND2_8822B) & BIT_MASK_ATIMWND2_8822B)
+
 
 
 /* 2 REG_ATIMWND3_8822B */
@@ -7059,7 +7785,8 @@
 #define BIT_SHIFT_ATIMWND3_8822B 0
 #define BIT_MASK_ATIMWND3_8822B 0xff
 #define BIT_ATIMWND3_8822B(x) (((x) & BIT_MASK_ATIMWND3_8822B) << BIT_SHIFT_ATIMWND3_8822B)
-#define BIT_GET_ATIMWND3_8822B(x) (((x) >> BIT_SHIFT_ATIMWND3_8822B) & BIT_MASK_ATIMWND3_8822B)

+#define BIT_GET_ATIMWND3_8822B(x) (((x) >> BIT_SHIFT_ATIMWND3_8822B) & BIT_MASK_ATIMWND3_8822B)
+
 
 
 /* 2 REG_ATIMWND4_8822B */
@@ -7067,7 +7794,8 @@
 #define BIT_SHIFT_ATIMWND4_8822B 0
 #define BIT_MASK_ATIMWND4_8822B 0xff
 #define BIT_ATIMWND4_8822B(x) (((x) & BIT_MASK_ATIMWND4_8822B) << BIT_SHIFT_ATIMWND4_8822B)
-#define BIT_GET_ATIMWND4_8822B(x) (((x) >> BIT_SHIFT_ATIMWND4_8822B) & BIT_MASK_ATIMWND4_8822B)

+#define BIT_GET_ATIMWND4_8822B(x) (((x) >> BIT_SHIFT_ATIMWND4_8822B) & BIT_MASK_ATIMWND4_8822B)
+
 
 
 /* 2 REG_ATIMWND5_8822B */
@@ -7075,7 +7803,8 @@
 #define BIT_SHIFT_ATIMWND5_8822B 0
 #define BIT_MASK_ATIMWND5_8822B 0xff
 #define BIT_ATIMWND5_8822B(x) (((x) & BIT_MASK_ATIMWND5_8822B) << BIT_SHIFT_ATIMWND5_8822B)
-#define BIT_GET_ATIMWND5_8822B(x) (((x) >> BIT_SHIFT_ATIMWND5_8822B) & BIT_MASK_ATIMWND5_8822B)

+#define BIT_GET_ATIMWND5_8822B(x) (((x) >> BIT_SHIFT_ATIMWND5_8822B) & BIT_MASK_ATIMWND5_8822B)
+
 
 
 /* 2 REG_ATIMWND6_8822B */
@@ -7083,7 +7812,8 @@
 #define BIT_SHIFT_ATIMWND6_8822B 0
 #define BIT_MASK_ATIMWND6_8822B 0xff
 #define BIT_ATIMWND6_8822B(x) (((x) & BIT_MASK_ATIMWND6_8822B) << BIT_SHIFT_ATIMWND6_8822B)
-#define BIT_GET_ATIMWND6_8822B(x) (((x) >> BIT_SHIFT_ATIMWND6_8822B) & BIT_MASK_ATIMWND6_8822B)

+#define BIT_GET_ATIMWND6_8822B(x) (((x) >> BIT_SHIFT_ATIMWND6_8822B) & BIT_MASK_ATIMWND6_8822B)
+
 
 
 /* 2 REG_ATIMWND7_8822B */
@@ -7091,7 +7821,8 @@
 #define BIT_SHIFT_ATIMWND7_8822B 0
 #define BIT_MASK_ATIMWND7_8822B 0xff
 #define BIT_ATIMWND7_8822B(x) (((x) & BIT_MASK_ATIMWND7_8822B) << BIT_SHIFT_ATIMWND7_8822B)
-#define BIT_GET_ATIMWND7_8822B(x) (((x) >> BIT_SHIFT_ATIMWND7_8822B) & BIT_MASK_ATIMWND7_8822B)

+#define BIT_GET_ATIMWND7_8822B(x) (((x) >> BIT_SHIFT_ATIMWND7_8822B) & BIT_MASK_ATIMWND7_8822B)
+
 
 
 /* 2 REG_ATIMUGT_8822B */
@@ -7099,7 +7830,8 @@
 #define BIT_SHIFT_ATIM_URGENT_8822B 0
 #define BIT_MASK_ATIM_URGENT_8822B 0xff
 #define BIT_ATIM_URGENT_8822B(x) (((x) & BIT_MASK_ATIM_URGENT_8822B) << BIT_SHIFT_ATIM_URGENT_8822B)
-#define BIT_GET_ATIM_URGENT_8822B(x) (((x) >> BIT_SHIFT_ATIM_URGENT_8822B) & BIT_MASK_ATIM_URGENT_8822B)

+#define BIT_GET_ATIM_URGENT_8822B(x) (((x) >> BIT_SHIFT_ATIM_URGENT_8822B) & BIT_MASK_ATIM_URGENT_8822B)
+
 
 
 /* 2 REG_HIQ_NO_LMT_EN_8822B */
@@ -7117,7 +7849,8 @@
 #define BIT_SHIFT_DTIM_COUNT_ROOT_8822B 0
 #define BIT_MASK_DTIM_COUNT_ROOT_8822B 0xff
 #define BIT_DTIM_COUNT_ROOT_8822B(x) (((x) & BIT_MASK_DTIM_COUNT_ROOT_8822B) << BIT_SHIFT_DTIM_COUNT_ROOT_8822B)
-#define BIT_GET_DTIM_COUNT_ROOT_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_ROOT_8822B) & BIT_MASK_DTIM_COUNT_ROOT_8822B)

+#define BIT_GET_DTIM_COUNT_ROOT_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_ROOT_8822B) & BIT_MASK_DTIM_COUNT_ROOT_8822B)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP1_8822B */
@@ -7125,7 +7858,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP1_8822B 0
 #define BIT_MASK_DTIM_COUNT_VAP1_8822B 0xff
 #define BIT_DTIM_COUNT_VAP1_8822B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP1_8822B) << BIT_SHIFT_DTIM_COUNT_VAP1_8822B)
-#define BIT_GET_DTIM_COUNT_VAP1_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP1_8822B) & BIT_MASK_DTIM_COUNT_VAP1_8822B)

+#define BIT_GET_DTIM_COUNT_VAP1_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP1_8822B) & BIT_MASK_DTIM_COUNT_VAP1_8822B)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP2_8822B */
@@ -7133,7 +7867,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP2_8822B 0
 #define BIT_MASK_DTIM_COUNT_VAP2_8822B 0xff
 #define BIT_DTIM_COUNT_VAP2_8822B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP2_8822B) << BIT_SHIFT_DTIM_COUNT_VAP2_8822B)
-#define BIT_GET_DTIM_COUNT_VAP2_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP2_8822B) & BIT_MASK_DTIM_COUNT_VAP2_8822B)

+#define BIT_GET_DTIM_COUNT_VAP2_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP2_8822B) & BIT_MASK_DTIM_COUNT_VAP2_8822B)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP3_8822B */
@@ -7141,7 +7876,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP3_8822B 0
 #define BIT_MASK_DTIM_COUNT_VAP3_8822B 0xff
 #define BIT_DTIM_COUNT_VAP3_8822B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP3_8822B) << BIT_SHIFT_DTIM_COUNT_VAP3_8822B)
-#define BIT_GET_DTIM_COUNT_VAP3_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP3_8822B) & BIT_MASK_DTIM_COUNT_VAP3_8822B)

+#define BIT_GET_DTIM_COUNT_VAP3_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP3_8822B) & BIT_MASK_DTIM_COUNT_VAP3_8822B)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP4_8822B */
@@ -7149,7 +7885,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP4_8822B 0
 #define BIT_MASK_DTIM_COUNT_VAP4_8822B 0xff
 #define BIT_DTIM_COUNT_VAP4_8822B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP4_8822B) << BIT_SHIFT_DTIM_COUNT_VAP4_8822B)
-#define BIT_GET_DTIM_COUNT_VAP4_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP4_8822B) & BIT_MASK_DTIM_COUNT_VAP4_8822B)

+#define BIT_GET_DTIM_COUNT_VAP4_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP4_8822B) & BIT_MASK_DTIM_COUNT_VAP4_8822B)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP5_8822B */
@@ -7157,7 +7894,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP5_8822B 0
 #define BIT_MASK_DTIM_COUNT_VAP5_8822B 0xff
 #define BIT_DTIM_COUNT_VAP5_8822B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP5_8822B) << BIT_SHIFT_DTIM_COUNT_VAP5_8822B)
-#define BIT_GET_DTIM_COUNT_VAP5_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP5_8822B) & BIT_MASK_DTIM_COUNT_VAP5_8822B)

+#define BIT_GET_DTIM_COUNT_VAP5_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP5_8822B) & BIT_MASK_DTIM_COUNT_VAP5_8822B)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP6_8822B */
@@ -7165,7 +7903,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP6_8822B 0
 #define BIT_MASK_DTIM_COUNT_VAP6_8822B 0xff
 #define BIT_DTIM_COUNT_VAP6_8822B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP6_8822B) << BIT_SHIFT_DTIM_COUNT_VAP6_8822B)
-#define BIT_GET_DTIM_COUNT_VAP6_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP6_8822B) & BIT_MASK_DTIM_COUNT_VAP6_8822B)

+#define BIT_GET_DTIM_COUNT_VAP6_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP6_8822B) & BIT_MASK_DTIM_COUNT_VAP6_8822B)
+
 
 
 /* 2 REG_DTIM_COUNTER_VAP7_8822B */
@@ -7173,7 +7912,8 @@
 #define BIT_SHIFT_DTIM_COUNT_VAP7_8822B 0
 #define BIT_MASK_DTIM_COUNT_VAP7_8822B 0xff
 #define BIT_DTIM_COUNT_VAP7_8822B(x) (((x) & BIT_MASK_DTIM_COUNT_VAP7_8822B) << BIT_SHIFT_DTIM_COUNT_VAP7_8822B)
-#define BIT_GET_DTIM_COUNT_VAP7_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP7_8822B) & BIT_MASK_DTIM_COUNT_VAP7_8822B)

+#define BIT_GET_DTIM_COUNT_VAP7_8822B(x) (((x) >> BIT_SHIFT_DTIM_COUNT_VAP7_8822B) & BIT_MASK_DTIM_COUNT_VAP7_8822B)
+
 
 
 /* 2 REG_DIS_ATIM_8822B */
@@ -7191,13 +7931,15 @@
 #define BIT_SHIFT_TSFT_SEL_TIMER1_8822B 3
 #define BIT_MASK_TSFT_SEL_TIMER1_8822B 0x7
 #define BIT_TSFT_SEL_TIMER1_8822B(x) (((x) & BIT_MASK_TSFT_SEL_TIMER1_8822B) << BIT_SHIFT_TSFT_SEL_TIMER1_8822B)
-#define BIT_GET_TSFT_SEL_TIMER1_8822B(x) (((x) >> BIT_SHIFT_TSFT_SEL_TIMER1_8822B) & BIT_MASK_TSFT_SEL_TIMER1_8822B)

+#define BIT_GET_TSFT_SEL_TIMER1_8822B(x) (((x) >> BIT_SHIFT_TSFT_SEL_TIMER1_8822B) & BIT_MASK_TSFT_SEL_TIMER1_8822B)
+
 
 
 #define BIT_SHIFT_EARLY_128US_8822B 0
 #define BIT_MASK_EARLY_128US_8822B 0x7
 #define BIT_EARLY_128US_8822B(x) (((x) & BIT_MASK_EARLY_128US_8822B) << BIT_SHIFT_EARLY_128US_8822B)
-#define BIT_GET_EARLY_128US_8822B(x) (((x) >> BIT_SHIFT_EARLY_128US_8822B) & BIT_MASK_EARLY_128US_8822B)

+#define BIT_GET_EARLY_128US_8822B(x) (((x) >> BIT_SHIFT_EARLY_128US_8822B) & BIT_MASK_EARLY_128US_8822B)
+
 
 
 /* 2 REG_P2PPS1_CTRL_8822B */
@@ -7219,13 +7961,15 @@
 #define BIT_SHIFT_SYNC_CLI_SEL_8822B 4
 #define BIT_MASK_SYNC_CLI_SEL_8822B 0x7
 #define BIT_SYNC_CLI_SEL_8822B(x) (((x) & BIT_MASK_SYNC_CLI_SEL_8822B) << BIT_SHIFT_SYNC_CLI_SEL_8822B)
-#define BIT_GET_SYNC_CLI_SEL_8822B(x) (((x) >> BIT_SHIFT_SYNC_CLI_SEL_8822B) & BIT_MASK_SYNC_CLI_SEL_8822B)

+#define BIT_GET_SYNC_CLI_SEL_8822B(x) (((x) >> BIT_SHIFT_SYNC_CLI_SEL_8822B) & BIT_MASK_SYNC_CLI_SEL_8822B)
+
 
 
 #define BIT_SHIFT_TSFT_SEL_TIMER0_8822B 0
 #define BIT_MASK_TSFT_SEL_TIMER0_8822B 0x7
 #define BIT_TSFT_SEL_TIMER0_8822B(x) (((x) & BIT_MASK_TSFT_SEL_TIMER0_8822B) << BIT_SHIFT_TSFT_SEL_TIMER0_8822B)
-#define BIT_GET_TSFT_SEL_TIMER0_8822B(x) (((x) >> BIT_SHIFT_TSFT_SEL_TIMER0_8822B) & BIT_MASK_TSFT_SEL_TIMER0_8822B)

+#define BIT_GET_TSFT_SEL_TIMER0_8822B(x) (((x) >> BIT_SHIFT_TSFT_SEL_TIMER0_8822B) & BIT_MASK_TSFT_SEL_TIMER0_8822B)
+
 
 
 /* 2 REG_NOA_UNIT_SEL_8822B */
@@ -7233,19 +7977,22 @@
 #define BIT_SHIFT_NOA_UNIT2_SEL_8822B 8
 #define BIT_MASK_NOA_UNIT2_SEL_8822B 0x7
 #define BIT_NOA_UNIT2_SEL_8822B(x) (((x) & BIT_MASK_NOA_UNIT2_SEL_8822B) << BIT_SHIFT_NOA_UNIT2_SEL_8822B)
-#define BIT_GET_NOA_UNIT2_SEL_8822B(x) (((x) >> BIT_SHIFT_NOA_UNIT2_SEL_8822B) & BIT_MASK_NOA_UNIT2_SEL_8822B)

+#define BIT_GET_NOA_UNIT2_SEL_8822B(x) (((x) >> BIT_SHIFT_NOA_UNIT2_SEL_8822B) & BIT_MASK_NOA_UNIT2_SEL_8822B)
+
 
 
 #define BIT_SHIFT_NOA_UNIT1_SEL_8822B 4
 #define BIT_MASK_NOA_UNIT1_SEL_8822B 0x7
 #define BIT_NOA_UNIT1_SEL_8822B(x) (((x) & BIT_MASK_NOA_UNIT1_SEL_8822B) << BIT_SHIFT_NOA_UNIT1_SEL_8822B)
-#define BIT_GET_NOA_UNIT1_SEL_8822B(x) (((x) >> BIT_SHIFT_NOA_UNIT1_SEL_8822B) & BIT_MASK_NOA_UNIT1_SEL_8822B)

+#define BIT_GET_NOA_UNIT1_SEL_8822B(x) (((x) >> BIT_SHIFT_NOA_UNIT1_SEL_8822B) & BIT_MASK_NOA_UNIT1_SEL_8822B)
+
 
 
 #define BIT_SHIFT_NOA_UNIT0_SEL_8822B 0
 #define BIT_MASK_NOA_UNIT0_SEL_8822B 0x7
 #define BIT_NOA_UNIT0_SEL_8822B(x) (((x) & BIT_MASK_NOA_UNIT0_SEL_8822B) << BIT_SHIFT_NOA_UNIT0_SEL_8822B)
-#define BIT_GET_NOA_UNIT0_SEL_8822B(x) (((x) >> BIT_SHIFT_NOA_UNIT0_SEL_8822B) & BIT_MASK_NOA_UNIT0_SEL_8822B)

+#define BIT_GET_NOA_UNIT0_SEL_8822B(x) (((x) >> BIT_SHIFT_NOA_UNIT0_SEL_8822B) & BIT_MASK_NOA_UNIT0_SEL_8822B)
+
 
 
 /* 2 REG_P2POFF_DIS_TXTIME_8822B */
@@ -7253,7 +8000,8 @@
 #define BIT_SHIFT_P2POFF_DIS_TXTIME_8822B 0
 #define BIT_MASK_P2POFF_DIS_TXTIME_8822B 0xff
 #define BIT_P2POFF_DIS_TXTIME_8822B(x) (((x) & BIT_MASK_P2POFF_DIS_TXTIME_8822B) << BIT_SHIFT_P2POFF_DIS_TXTIME_8822B)
-#define BIT_GET_P2POFF_DIS_TXTIME_8822B(x) (((x) >> BIT_SHIFT_P2POFF_DIS_TXTIME_8822B) & BIT_MASK_P2POFF_DIS_TXTIME_8822B)

+#define BIT_GET_P2POFF_DIS_TXTIME_8822B(x) (((x) >> BIT_SHIFT_P2POFF_DIS_TXTIME_8822B) & BIT_MASK_P2POFF_DIS_TXTIME_8822B)
+
 
 
 /* 2 REG_MBSSID_BCN_SPACE2_8822B */
@@ -7261,13 +8009,15 @@
 #define BIT_SHIFT_BCN_SPACE_CLINT2_8822B 16
 #define BIT_MASK_BCN_SPACE_CLINT2_8822B 0xfff
 #define BIT_BCN_SPACE_CLINT2_8822B(x) (((x) & BIT_MASK_BCN_SPACE_CLINT2_8822B) << BIT_SHIFT_BCN_SPACE_CLINT2_8822B)
-#define BIT_GET_BCN_SPACE_CLINT2_8822B(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT2_8822B) & BIT_MASK_BCN_SPACE_CLINT2_8822B)

+#define BIT_GET_BCN_SPACE_CLINT2_8822B(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT2_8822B) & BIT_MASK_BCN_SPACE_CLINT2_8822B)
+
 
 
 #define BIT_SHIFT_BCN_SPACE_CLINT1_8822B 0
 #define BIT_MASK_BCN_SPACE_CLINT1_8822B 0xfff
 #define BIT_BCN_SPACE_CLINT1_8822B(x) (((x) & BIT_MASK_BCN_SPACE_CLINT1_8822B) << BIT_SHIFT_BCN_SPACE_CLINT1_8822B)
-#define BIT_GET_BCN_SPACE_CLINT1_8822B(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT1_8822B) & BIT_MASK_BCN_SPACE_CLINT1_8822B)

+#define BIT_GET_BCN_SPACE_CLINT1_8822B(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT1_8822B) & BIT_MASK_BCN_SPACE_CLINT1_8822B)
+
 
 
 /* 2 REG_MBSSID_BCN_SPACE3_8822B */
@@ -7275,13 +8025,15 @@
 #define BIT_SHIFT_SUB_BCN_SPACE_8822B 16
 #define BIT_MASK_SUB_BCN_SPACE_8822B 0xff
 #define BIT_SUB_BCN_SPACE_8822B(x) (((x) & BIT_MASK_SUB_BCN_SPACE_8822B) << BIT_SHIFT_SUB_BCN_SPACE_8822B)
-#define BIT_GET_SUB_BCN_SPACE_8822B(x) (((x) >> BIT_SHIFT_SUB_BCN_SPACE_8822B) & BIT_MASK_SUB_BCN_SPACE_8822B)

+#define BIT_GET_SUB_BCN_SPACE_8822B(x) (((x) >> BIT_SHIFT_SUB_BCN_SPACE_8822B) & BIT_MASK_SUB_BCN_SPACE_8822B)
+
 
 
 #define BIT_SHIFT_BCN_SPACE_CLINT3_8822B 0
 #define BIT_MASK_BCN_SPACE_CLINT3_8822B 0xfff
 #define BIT_BCN_SPACE_CLINT3_8822B(x) (((x) & BIT_MASK_BCN_SPACE_CLINT3_8822B) << BIT_SHIFT_BCN_SPACE_CLINT3_8822B)
-#define BIT_GET_BCN_SPACE_CLINT3_8822B(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT3_8822B) & BIT_MASK_BCN_SPACE_CLINT3_8822B)

+#define BIT_GET_BCN_SPACE_CLINT3_8822B(x) (((x) >> BIT_SHIFT_BCN_SPACE_CLINT3_8822B) & BIT_MASK_BCN_SPACE_CLINT3_8822B)
+
 
 
 /* 2 REG_ACMHWCTRL_8822B */
@@ -7303,7 +8055,8 @@
 #define BIT_SHIFT_AVGPERIOD_8822B 0
 #define BIT_MASK_AVGPERIOD_8822B 0xffff
 #define BIT_AVGPERIOD_8822B(x) (((x) & BIT_MASK_AVGPERIOD_8822B) << BIT_SHIFT_AVGPERIOD_8822B)
-#define BIT_GET_AVGPERIOD_8822B(x) (((x) >> BIT_SHIFT_AVGPERIOD_8822B) & BIT_MASK_AVGPERIOD_8822B)

+#define BIT_GET_AVGPERIOD_8822B(x) (((x) >> BIT_SHIFT_AVGPERIOD_8822B) & BIT_MASK_AVGPERIOD_8822B)
+
 
 
 /* 2 REG_VO_ADMTIME_8822B */
@@ -7311,7 +8064,8 @@
 #define BIT_SHIFT_VO_ADMITTED_TIME_8822B 0
 #define BIT_MASK_VO_ADMITTED_TIME_8822B 0xffff
 #define BIT_VO_ADMITTED_TIME_8822B(x) (((x) & BIT_MASK_VO_ADMITTED_TIME_8822B) << BIT_SHIFT_VO_ADMITTED_TIME_8822B)
-#define BIT_GET_VO_ADMITTED_TIME_8822B(x) (((x) >> BIT_SHIFT_VO_ADMITTED_TIME_8822B) & BIT_MASK_VO_ADMITTED_TIME_8822B)

+#define BIT_GET_VO_ADMITTED_TIME_8822B(x) (((x) >> BIT_SHIFT_VO_ADMITTED_TIME_8822B) & BIT_MASK_VO_ADMITTED_TIME_8822B)
+
 
 
 /* 2 REG_VI_ADMTIME_8822B */
@@ -7319,7 +8073,8 @@
 #define BIT_SHIFT_VI_ADMITTED_TIME_8822B 0
 #define BIT_MASK_VI_ADMITTED_TIME_8822B 0xffff
 #define BIT_VI_ADMITTED_TIME_8822B(x) (((x) & BIT_MASK_VI_ADMITTED_TIME_8822B) << BIT_SHIFT_VI_ADMITTED_TIME_8822B)
-#define BIT_GET_VI_ADMITTED_TIME_8822B(x) (((x) >> BIT_SHIFT_VI_ADMITTED_TIME_8822B) & BIT_MASK_VI_ADMITTED_TIME_8822B)

+#define BIT_GET_VI_ADMITTED_TIME_8822B(x) (((x) >> BIT_SHIFT_VI_ADMITTED_TIME_8822B) & BIT_MASK_VI_ADMITTED_TIME_8822B)
+
 
 
 /* 2 REG_BE_ADMTIME_8822B */
@@ -7327,7 +8082,8 @@
 #define BIT_SHIFT_BE_ADMITTED_TIME_8822B 0
 #define BIT_MASK_BE_ADMITTED_TIME_8822B 0xffff
 #define BIT_BE_ADMITTED_TIME_8822B(x) (((x) & BIT_MASK_BE_ADMITTED_TIME_8822B) << BIT_SHIFT_BE_ADMITTED_TIME_8822B)
-#define BIT_GET_BE_ADMITTED_TIME_8822B(x) (((x) >> BIT_SHIFT_BE_ADMITTED_TIME_8822B) & BIT_MASK_BE_ADMITTED_TIME_8822B)

+#define BIT_GET_BE_ADMITTED_TIME_8822B(x) (((x) >> BIT_SHIFT_BE_ADMITTED_TIME_8822B) & BIT_MASK_BE_ADMITTED_TIME_8822B)
+
 
 
 /* 2 REG_EDCA_RANDOM_GEN_8822B */
@@ -7335,7 +8091,8 @@
 #define BIT_SHIFT_RANDOM_GEN_8822B 0
 #define BIT_MASK_RANDOM_GEN_8822B 0xffffff
 #define BIT_RANDOM_GEN_8822B(x) (((x) & BIT_MASK_RANDOM_GEN_8822B) << BIT_SHIFT_RANDOM_GEN_8822B)
-#define BIT_GET_RANDOM_GEN_8822B(x) (((x) >> BIT_SHIFT_RANDOM_GEN_8822B) & BIT_MASK_RANDOM_GEN_8822B)

+#define BIT_GET_RANDOM_GEN_8822B(x) (((x) >> BIT_SHIFT_RANDOM_GEN_8822B) & BIT_MASK_RANDOM_GEN_8822B)
+
 
 
 /* 2 REG_TXCMD_NOA_SEL_8822B */
@@ -7343,13 +8100,15 @@
 #define BIT_SHIFT_NOA_SEL_8822B 4
 #define BIT_MASK_NOA_SEL_8822B 0x7
 #define BIT_NOA_SEL_8822B(x) (((x) & BIT_MASK_NOA_SEL_8822B) << BIT_SHIFT_NOA_SEL_8822B)
-#define BIT_GET_NOA_SEL_8822B(x) (((x) >> BIT_SHIFT_NOA_SEL_8822B) & BIT_MASK_NOA_SEL_8822B)

+#define BIT_GET_NOA_SEL_8822B(x) (((x) >> BIT_SHIFT_NOA_SEL_8822B) & BIT_MASK_NOA_SEL_8822B)
+
 
 
 #define BIT_SHIFT_TXCMD_SEG_SEL_8822B 0
 #define BIT_MASK_TXCMD_SEG_SEL_8822B 0xf
 #define BIT_TXCMD_SEG_SEL_8822B(x) (((x) & BIT_MASK_TXCMD_SEG_SEL_8822B) << BIT_SHIFT_TXCMD_SEG_SEL_8822B)
-#define BIT_GET_TXCMD_SEG_SEL_8822B(x) (((x) >> BIT_SHIFT_TXCMD_SEG_SEL_8822B) & BIT_MASK_TXCMD_SEG_SEL_8822B)

+#define BIT_GET_TXCMD_SEG_SEL_8822B(x) (((x) >> BIT_SHIFT_TXCMD_SEG_SEL_8822B) & BIT_MASK_TXCMD_SEG_SEL_8822B)
+
 
 
 /* 2 REG_NOA_PARAM_8822B */
@@ -7357,25 +8116,29 @@
 #define BIT_SHIFT_NOA_COUNT_8822B (96 & CPU_OPT_WIDTH)
 #define BIT_MASK_NOA_COUNT_8822B 0xff
 #define BIT_NOA_COUNT_8822B(x) (((x) & BIT_MASK_NOA_COUNT_8822B) << BIT_SHIFT_NOA_COUNT_8822B)
-#define BIT_GET_NOA_COUNT_8822B(x) (((x) >> BIT_SHIFT_NOA_COUNT_8822B) & BIT_MASK_NOA_COUNT_8822B)

+#define BIT_GET_NOA_COUNT_8822B(x) (((x) >> BIT_SHIFT_NOA_COUNT_8822B) & BIT_MASK_NOA_COUNT_8822B)
+
 
 
 #define BIT_SHIFT_NOA_START_TIME_8822B (64 & CPU_OPT_WIDTH)
 #define BIT_MASK_NOA_START_TIME_8822B 0xffffffffL
 #define BIT_NOA_START_TIME_8822B(x) (((x) & BIT_MASK_NOA_START_TIME_8822B) << BIT_SHIFT_NOA_START_TIME_8822B)
-#define BIT_GET_NOA_START_TIME_8822B(x) (((x) >> BIT_SHIFT_NOA_START_TIME_8822B) & BIT_MASK_NOA_START_TIME_8822B)

+#define BIT_GET_NOA_START_TIME_8822B(x) (((x) >> BIT_SHIFT_NOA_START_TIME_8822B) & BIT_MASK_NOA_START_TIME_8822B)
+
 
 
 #define BIT_SHIFT_NOA_INTERVAL_8822B (32 & CPU_OPT_WIDTH)
 #define BIT_MASK_NOA_INTERVAL_8822B 0xffffffffL
 #define BIT_NOA_INTERVAL_8822B(x) (((x) & BIT_MASK_NOA_INTERVAL_8822B) << BIT_SHIFT_NOA_INTERVAL_8822B)
-#define BIT_GET_NOA_INTERVAL_8822B(x) (((x) >> BIT_SHIFT_NOA_INTERVAL_8822B) & BIT_MASK_NOA_INTERVAL_8822B)

+#define BIT_GET_NOA_INTERVAL_8822B(x) (((x) >> BIT_SHIFT_NOA_INTERVAL_8822B) & BIT_MASK_NOA_INTERVAL_8822B)
+
 
 
 #define BIT_SHIFT_NOA_DURATION_8822B 0
 #define BIT_MASK_NOA_DURATION_8822B 0xffffffffL
 #define BIT_NOA_DURATION_8822B(x) (((x) & BIT_MASK_NOA_DURATION_8822B) << BIT_SHIFT_NOA_DURATION_8822B)
-#define BIT_GET_NOA_DURATION_8822B(x) (((x) >> BIT_SHIFT_NOA_DURATION_8822B) & BIT_MASK_NOA_DURATION_8822B)

+#define BIT_GET_NOA_DURATION_8822B(x) (((x) >> BIT_SHIFT_NOA_DURATION_8822B) & BIT_MASK_NOA_DURATION_8822B)
+
 
 
 /* 2 REG_P2P_RST_8822B */
@@ -7395,7 +8158,8 @@
 #define BIT_SHIFT_SCH_TXCMD_8822B 0
 #define BIT_MASK_SCH_TXCMD_8822B 0xffffffffL
 #define BIT_SCH_TXCMD_8822B(x) (((x) & BIT_MASK_SCH_TXCMD_8822B) << BIT_SHIFT_SCH_TXCMD_8822B)
-#define BIT_GET_SCH_TXCMD_8822B(x) (((x) >> BIT_SHIFT_SCH_TXCMD_8822B) & BIT_MASK_SCH_TXCMD_8822B)

+#define BIT_GET_SCH_TXCMD_8822B(x) (((x) >> BIT_SHIFT_SCH_TXCMD_8822B) & BIT_MASK_SCH_TXCMD_8822B)
+
 
 
 /* 2 REG_PAGE5_DUMMY_8822B */
@@ -7405,7 +8169,8 @@
 #define BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8822B 0
 #define BIT_MASK_CPUMGQ_TX_TIMER_V1_8822B 0xffffffffL
 #define BIT_CPUMGQ_TX_TIMER_V1_8822B(x) (((x) & BIT_MASK_CPUMGQ_TX_TIMER_V1_8822B) << BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8822B)
-#define BIT_GET_CPUMGQ_TX_TIMER_V1_8822B(x) (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8822B) & BIT_MASK_CPUMGQ_TX_TIMER_V1_8822B)

+#define BIT_GET_CPUMGQ_TX_TIMER_V1_8822B(x) (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8822B) & BIT_MASK_CPUMGQ_TX_TIMER_V1_8822B)
+
 
 
 /* 2 REG_PS_TIMER_A_8822B */
@@ -7413,7 +8178,8 @@
 #define BIT_SHIFT_PS_TIMER_A_V1_8822B 0
 #define BIT_MASK_PS_TIMER_A_V1_8822B 0xffffffffL
 #define BIT_PS_TIMER_A_V1_8822B(x) (((x) & BIT_MASK_PS_TIMER_A_V1_8822B) << BIT_SHIFT_PS_TIMER_A_V1_8822B)
-#define BIT_GET_PS_TIMER_A_V1_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_A_V1_8822B) & BIT_MASK_PS_TIMER_A_V1_8822B)

+#define BIT_GET_PS_TIMER_A_V1_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_A_V1_8822B) & BIT_MASK_PS_TIMER_A_V1_8822B)
+
 
 
 /* 2 REG_PS_TIMER_B_8822B */
@@ -7421,7 +8187,8 @@
 #define BIT_SHIFT_PS_TIMER_B_V1_8822B 0
 #define BIT_MASK_PS_TIMER_B_V1_8822B 0xffffffffL
 #define BIT_PS_TIMER_B_V1_8822B(x) (((x) & BIT_MASK_PS_TIMER_B_V1_8822B) << BIT_SHIFT_PS_TIMER_B_V1_8822B)
-#define BIT_GET_PS_TIMER_B_V1_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_B_V1_8822B) & BIT_MASK_PS_TIMER_B_V1_8822B)

+#define BIT_GET_PS_TIMER_B_V1_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_B_V1_8822B) & BIT_MASK_PS_TIMER_B_V1_8822B)
+
 
 
 /* 2 REG_PS_TIMER_C_8822B */
@@ -7429,7 +8196,8 @@
 #define BIT_SHIFT_PS_TIMER_C_V1_8822B 0
 #define BIT_MASK_PS_TIMER_C_V1_8822B 0xffffffffL
 #define BIT_PS_TIMER_C_V1_8822B(x) (((x) & BIT_MASK_PS_TIMER_C_V1_8822B) << BIT_SHIFT_PS_TIMER_C_V1_8822B)
-#define BIT_GET_PS_TIMER_C_V1_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_C_V1_8822B) & BIT_MASK_PS_TIMER_C_V1_8822B)

+#define BIT_GET_PS_TIMER_C_V1_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_C_V1_8822B) & BIT_MASK_PS_TIMER_C_V1_8822B)
+
 
 
 /* 2 REG_PS_TIMER_ABC_CPUMGQ_TIMER_CRTL_8822B */
@@ -7439,28 +8207,32 @@
 #define BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8822B 24
 #define BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8822B 0x7
 #define BIT_CPUMGQ_TIMER_TSF_SEL_8822B(x) (((x) & BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8822B) << BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8822B)
-#define BIT_GET_CPUMGQ_TIMER_TSF_SEL_8822B(x) (((x) >> BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8822B) & BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8822B)

+#define BIT_GET_CPUMGQ_TIMER_TSF_SEL_8822B(x) (((x) >> BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8822B) & BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8822B)
+
 
 #define BIT_PS_TIMER_C_EN_8822B BIT(23)
 
 #define BIT_SHIFT_PS_TIMER_C_TSF_SEL_8822B 16
 #define BIT_MASK_PS_TIMER_C_TSF_SEL_8822B 0x7
 #define BIT_PS_TIMER_C_TSF_SEL_8822B(x) (((x) & BIT_MASK_PS_TIMER_C_TSF_SEL_8822B) << BIT_SHIFT_PS_TIMER_C_TSF_SEL_8822B)
-#define BIT_GET_PS_TIMER_C_TSF_SEL_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_C_TSF_SEL_8822B) & BIT_MASK_PS_TIMER_C_TSF_SEL_8822B)

+#define BIT_GET_PS_TIMER_C_TSF_SEL_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_C_TSF_SEL_8822B) & BIT_MASK_PS_TIMER_C_TSF_SEL_8822B)
+
 
 #define BIT_PS_TIMER_B_EN_8822B BIT(15)
 
 #define BIT_SHIFT_PS_TIMER_B_TSF_SEL_8822B 8
 #define BIT_MASK_PS_TIMER_B_TSF_SEL_8822B 0x7
 #define BIT_PS_TIMER_B_TSF_SEL_8822B(x) (((x) & BIT_MASK_PS_TIMER_B_TSF_SEL_8822B) << BIT_SHIFT_PS_TIMER_B_TSF_SEL_8822B)
-#define BIT_GET_PS_TIMER_B_TSF_SEL_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_B_TSF_SEL_8822B) & BIT_MASK_PS_TIMER_B_TSF_SEL_8822B)

+#define BIT_GET_PS_TIMER_B_TSF_SEL_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_B_TSF_SEL_8822B) & BIT_MASK_PS_TIMER_B_TSF_SEL_8822B)
+
 
 #define BIT_PS_TIMER_A_EN_8822B BIT(7)
 
 #define BIT_SHIFT_PS_TIMER_A_TSF_SEL_8822B 0
 #define BIT_MASK_PS_TIMER_A_TSF_SEL_8822B 0x7
 #define BIT_PS_TIMER_A_TSF_SEL_8822B(x) (((x) & BIT_MASK_PS_TIMER_A_TSF_SEL_8822B) << BIT_SHIFT_PS_TIMER_A_TSF_SEL_8822B)
-#define BIT_GET_PS_TIMER_A_TSF_SEL_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_A_TSF_SEL_8822B) & BIT_MASK_PS_TIMER_A_TSF_SEL_8822B)

+#define BIT_GET_PS_TIMER_A_TSF_SEL_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_A_TSF_SEL_8822B) & BIT_MASK_PS_TIMER_A_TSF_SEL_8822B)
+
 
 
 /* 2 REG_CPUMGQ_TX_TIMER_EARLY_8822B */
@@ -7468,7 +8240,8 @@
 #define BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8822B 0
 #define BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8822B 0xff
 #define BIT_CPUMGQ_TX_TIMER_EARLY_8822B(x) (((x) & BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8822B) << BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8822B)
-#define BIT_GET_CPUMGQ_TX_TIMER_EARLY_8822B(x) (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8822B) & BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8822B)

+#define BIT_GET_CPUMGQ_TX_TIMER_EARLY_8822B(x) (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8822B) & BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8822B)
+
 
 
 /* 2 REG_PS_TIMER_A_EARLY_8822B */
@@ -7476,7 +8249,8 @@
 #define BIT_SHIFT_PS_TIMER_A_EARLY_8822B 0
 #define BIT_MASK_PS_TIMER_A_EARLY_8822B 0xff
 #define BIT_PS_TIMER_A_EARLY_8822B(x) (((x) & BIT_MASK_PS_TIMER_A_EARLY_8822B) << BIT_SHIFT_PS_TIMER_A_EARLY_8822B)
-#define BIT_GET_PS_TIMER_A_EARLY_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_A_EARLY_8822B) & BIT_MASK_PS_TIMER_A_EARLY_8822B)

+#define BIT_GET_PS_TIMER_A_EARLY_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_A_EARLY_8822B) & BIT_MASK_PS_TIMER_A_EARLY_8822B)
+
 
 
 /* 2 REG_PS_TIMER_B_EARLY_8822B */
@@ -7484,7 +8258,8 @@
 #define BIT_SHIFT_PS_TIMER_B_EARLY_8822B 0
 #define BIT_MASK_PS_TIMER_B_EARLY_8822B 0xff
 #define BIT_PS_TIMER_B_EARLY_8822B(x) (((x) & BIT_MASK_PS_TIMER_B_EARLY_8822B) << BIT_SHIFT_PS_TIMER_B_EARLY_8822B)
-#define BIT_GET_PS_TIMER_B_EARLY_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_B_EARLY_8822B) & BIT_MASK_PS_TIMER_B_EARLY_8822B)

+#define BIT_GET_PS_TIMER_B_EARLY_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_B_EARLY_8822B) & BIT_MASK_PS_TIMER_B_EARLY_8822B)
+
 
 
 /* 2 REG_PS_TIMER_C_EARLY_8822B */
@@ -7492,7 +8267,8 @@
 #define BIT_SHIFT_PS_TIMER_C_EARLY_8822B 0
 #define BIT_MASK_PS_TIMER_C_EARLY_8822B 0xff
 #define BIT_PS_TIMER_C_EARLY_8822B(x) (((x) & BIT_MASK_PS_TIMER_C_EARLY_8822B) << BIT_SHIFT_PS_TIMER_C_EARLY_8822B)
-#define BIT_GET_PS_TIMER_C_EARLY_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_C_EARLY_8822B) & BIT_MASK_PS_TIMER_C_EARLY_8822B)

+#define BIT_GET_PS_TIMER_C_EARLY_8822B(x) (((x) >> BIT_SHIFT_PS_TIMER_C_EARLY_8822B) & BIT_MASK_PS_TIMER_C_EARLY_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -7508,7 +8284,8 @@
 #define BIT_SHIFT_APPEND_MHDR_LEN_8822B 0
 #define BIT_MASK_APPEND_MHDR_LEN_8822B 0x7
 #define BIT_APPEND_MHDR_LEN_8822B(x) (((x) & BIT_MASK_APPEND_MHDR_LEN_8822B) << BIT_SHIFT_APPEND_MHDR_LEN_8822B)
-#define BIT_GET_APPEND_MHDR_LEN_8822B(x) (((x) >> BIT_SHIFT_APPEND_MHDR_LEN_8822B) & BIT_MASK_APPEND_MHDR_LEN_8822B)

+#define BIT_GET_APPEND_MHDR_LEN_8822B(x) (((x) >> BIT_SHIFT_APPEND_MHDR_LEN_8822B) & BIT_MASK_APPEND_MHDR_LEN_8822B)
+
 
 
 /* 2 REG_WMAC_CR_8822B (WMAC CR AND APSD CONTROL REGISTER) */
@@ -7583,7 +8360,8 @@
 #define BIT_SHIFT_DRVINFO_SZ_V1_8822B 0
 #define BIT_MASK_DRVINFO_SZ_V1_8822B 0xf
 #define BIT_DRVINFO_SZ_V1_8822B(x) (((x) & BIT_MASK_DRVINFO_SZ_V1_8822B) << BIT_SHIFT_DRVINFO_SZ_V1_8822B)
-#define BIT_GET_DRVINFO_SZ_V1_8822B(x) (((x) >> BIT_SHIFT_DRVINFO_SZ_V1_8822B) & BIT_MASK_DRVINFO_SZ_V1_8822B)

+#define BIT_GET_DRVINFO_SZ_V1_8822B(x) (((x) >> BIT_SHIFT_DRVINFO_SZ_V1_8822B) & BIT_MASK_DRVINFO_SZ_V1_8822B)
+
 
 
 /* 2 REG_RX_DLK_TIME_8822B (RX DEADLOCK TIME REGISTER) */
@@ -7591,7 +8369,8 @@
 #define BIT_SHIFT_RX_DLK_TIME_8822B 0
 #define BIT_MASK_RX_DLK_TIME_8822B 0xff
 #define BIT_RX_DLK_TIME_8822B(x) (((x) & BIT_MASK_RX_DLK_TIME_8822B) << BIT_SHIFT_RX_DLK_TIME_8822B)
-#define BIT_GET_RX_DLK_TIME_8822B(x) (((x) >> BIT_SHIFT_RX_DLK_TIME_8822B) & BIT_MASK_RX_DLK_TIME_8822B)

+#define BIT_GET_RX_DLK_TIME_8822B(x) (((x) >> BIT_SHIFT_RX_DLK_TIME_8822B) & BIT_MASK_RX_DLK_TIME_8822B)
+
 
 
 /* 2 REG_RX_PKT_LIMIT_8822B (RX PACKET LENGTH LIMIT REGISTER) */
@@ -7599,7 +8378,8 @@
 #define BIT_SHIFT_RXPKTLMT_8822B 0
 #define BIT_MASK_RXPKTLMT_8822B 0x3f
 #define BIT_RXPKTLMT_8822B(x) (((x) & BIT_MASK_RXPKTLMT_8822B) << BIT_SHIFT_RXPKTLMT_8822B)
-#define BIT_GET_RXPKTLMT_8822B(x) (((x) >> BIT_SHIFT_RXPKTLMT_8822B) & BIT_MASK_RXPKTLMT_8822B)

+#define BIT_GET_RXPKTLMT_8822B(x) (((x) >> BIT_SHIFT_RXPKTLMT_8822B) & BIT_MASK_RXPKTLMT_8822B)
+
 
 
 /* 2 REG_MACID_8822B (MAC ID REGISTER) */
@@ -7607,7 +8387,8 @@
 #define BIT_SHIFT_MACID_8822B 0
 #define BIT_MASK_MACID_8822B 0xffffffffffffL
 #define BIT_MACID_8822B(x) (((x) & BIT_MASK_MACID_8822B) << BIT_SHIFT_MACID_8822B)
-#define BIT_GET_MACID_8822B(x) (((x) >> BIT_SHIFT_MACID_8822B) & BIT_MASK_MACID_8822B)

+#define BIT_GET_MACID_8822B(x) (((x) >> BIT_SHIFT_MACID_8822B) & BIT_MASK_MACID_8822B)
+
 
 
 /* 2 REG_BSSID_8822B (BSSID REGISTER) */
@@ -7615,7 +8396,8 @@
 #define BIT_SHIFT_BSSID_8822B 0
 #define BIT_MASK_BSSID_8822B 0xffffffffffffL
 #define BIT_BSSID_8822B(x) (((x) & BIT_MASK_BSSID_8822B) << BIT_SHIFT_BSSID_8822B)
-#define BIT_GET_BSSID_8822B(x) (((x) >> BIT_SHIFT_BSSID_8822B) & BIT_MASK_BSSID_8822B)

+#define BIT_GET_BSSID_8822B(x) (((x) >> BIT_SHIFT_BSSID_8822B) & BIT_MASK_BSSID_8822B)
+
 
 
 /* 2 REG_MAR_8822B (MULTICAST ADDRESS REGISTER) */
@@ -7623,7 +8405,8 @@
 #define BIT_SHIFT_MAR_8822B 0
 #define BIT_MASK_MAR_8822B 0xffffffffffffffffL
 #define BIT_MAR_8822B(x) (((x) & BIT_MASK_MAR_8822B) << BIT_SHIFT_MAR_8822B)
-#define BIT_GET_MAR_8822B(x) (((x) >> BIT_SHIFT_MAR_8822B) & BIT_MASK_MAR_8822B)

+#define BIT_GET_MAR_8822B(x) (((x) >> BIT_SHIFT_MAR_8822B) & BIT_MASK_MAR_8822B)
+
 
 
 /* 2 REG_MBIDCAMCFG_1_8822B (MBSSID CAM CONFIGURATION REGISTER) */
@@ -7631,7 +8414,8 @@
 #define BIT_SHIFT_MBIDCAM_RWDATA_L_8822B 0
 #define BIT_MASK_MBIDCAM_RWDATA_L_8822B 0xffffffffL
 #define BIT_MBIDCAM_RWDATA_L_8822B(x) (((x) & BIT_MASK_MBIDCAM_RWDATA_L_8822B) << BIT_SHIFT_MBIDCAM_RWDATA_L_8822B)
-#define BIT_GET_MBIDCAM_RWDATA_L_8822B(x) (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_L_8822B) & BIT_MASK_MBIDCAM_RWDATA_L_8822B)

+#define BIT_GET_MBIDCAM_RWDATA_L_8822B(x) (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_L_8822B) & BIT_MASK_MBIDCAM_RWDATA_L_8822B)
+
 
 
 /* 2 REG_MBIDCAMCFG_2_8822B (MBSSID CAM CONFIGURATION REGISTER) */
@@ -7641,7 +8425,8 @@
 #define BIT_SHIFT_MBIDCAM_ADDR_8822B 24
 #define BIT_MASK_MBIDCAM_ADDR_8822B 0x1f
 #define BIT_MBIDCAM_ADDR_8822B(x) (((x) & BIT_MASK_MBIDCAM_ADDR_8822B) << BIT_SHIFT_MBIDCAM_ADDR_8822B)
-#define BIT_GET_MBIDCAM_ADDR_8822B(x) (((x) >> BIT_SHIFT_MBIDCAM_ADDR_8822B) & BIT_MASK_MBIDCAM_ADDR_8822B)

+#define BIT_GET_MBIDCAM_ADDR_8822B(x) (((x) >> BIT_SHIFT_MBIDCAM_ADDR_8822B) & BIT_MASK_MBIDCAM_ADDR_8822B)
+
 
 #define BIT_MBIDCAM_VALID_8822B BIT(23)
 #define BIT_LSIC_TXOP_EN_8822B BIT(17)
@@ -7650,7 +8435,8 @@
 #define BIT_SHIFT_MBIDCAM_RWDATA_H_8822B 0
 #define BIT_MASK_MBIDCAM_RWDATA_H_8822B 0xffff
 #define BIT_MBIDCAM_RWDATA_H_8822B(x) (((x) & BIT_MASK_MBIDCAM_RWDATA_H_8822B) << BIT_SHIFT_MBIDCAM_RWDATA_H_8822B)
-#define BIT_GET_MBIDCAM_RWDATA_H_8822B(x) (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_H_8822B) & BIT_MASK_MBIDCAM_RWDATA_H_8822B)

+#define BIT_GET_MBIDCAM_RWDATA_H_8822B(x) (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_H_8822B) & BIT_MASK_MBIDCAM_RWDATA_H_8822B)
+
 
 
 /* 2 REG_ZLD_NUM_8822B */
@@ -7658,7 +8444,8 @@
 #define BIT_SHIFT_ZLD_NUM_8822B 0
 #define BIT_MASK_ZLD_NUM_8822B 0xff
 #define BIT_ZLD_NUM_8822B(x) (((x) & BIT_MASK_ZLD_NUM_8822B) << BIT_SHIFT_ZLD_NUM_8822B)
-#define BIT_GET_ZLD_NUM_8822B(x) (((x) >> BIT_SHIFT_ZLD_NUM_8822B) & BIT_MASK_ZLD_NUM_8822B)

+#define BIT_GET_ZLD_NUM_8822B(x) (((x) >> BIT_SHIFT_ZLD_NUM_8822B) & BIT_MASK_ZLD_NUM_8822B)
+
 
 
 /* 2 REG_UDF_THSD_8822B */
@@ -7666,7 +8453,8 @@
 #define BIT_SHIFT_UDF_THSD_8822B 0
 #define BIT_MASK_UDF_THSD_8822B 0xff
 #define BIT_UDF_THSD_8822B(x) (((x) & BIT_MASK_UDF_THSD_8822B) << BIT_SHIFT_UDF_THSD_8822B)
-#define BIT_GET_UDF_THSD_8822B(x) (((x) >> BIT_SHIFT_UDF_THSD_8822B) & BIT_MASK_UDF_THSD_8822B)

+#define BIT_GET_UDF_THSD_8822B(x) (((x) >> BIT_SHIFT_UDF_THSD_8822B) & BIT_MASK_UDF_THSD_8822B)
+
 
 
 /* 2 REG_WMAC_TCR_TSFT_OFS_8822B */
@@ -7674,7 +8462,8 @@
 #define BIT_SHIFT_WMAC_TCR_TSFT_OFS_8822B 0
 #define BIT_MASK_WMAC_TCR_TSFT_OFS_8822B 0xffff
 #define BIT_WMAC_TCR_TSFT_OFS_8822B(x) (((x) & BIT_MASK_WMAC_TCR_TSFT_OFS_8822B) << BIT_SHIFT_WMAC_TCR_TSFT_OFS_8822B)
-#define BIT_GET_WMAC_TCR_TSFT_OFS_8822B(x) (((x) >> BIT_SHIFT_WMAC_TCR_TSFT_OFS_8822B) & BIT_MASK_WMAC_TCR_TSFT_OFS_8822B)

+#define BIT_GET_WMAC_TCR_TSFT_OFS_8822B(x) (((x) >> BIT_SHIFT_WMAC_TCR_TSFT_OFS_8822B) & BIT_MASK_WMAC_TCR_TSFT_OFS_8822B)
+
 
 
 /* 2 REG_MCU_TEST_2_V1_8822B */
@@ -7682,7 +8471,8 @@
 #define BIT_SHIFT_MCU_RSVD_2_V1_8822B 0
 #define BIT_MASK_MCU_RSVD_2_V1_8822B 0xffff
 #define BIT_MCU_RSVD_2_V1_8822B(x) (((x) & BIT_MASK_MCU_RSVD_2_V1_8822B) << BIT_SHIFT_MCU_RSVD_2_V1_8822B)
-#define BIT_GET_MCU_RSVD_2_V1_8822B(x) (((x) >> BIT_SHIFT_MCU_RSVD_2_V1_8822B) & BIT_MASK_MCU_RSVD_2_V1_8822B)

+#define BIT_GET_MCU_RSVD_2_V1_8822B(x) (((x) >> BIT_SHIFT_MCU_RSVD_2_V1_8822B) & BIT_MASK_MCU_RSVD_2_V1_8822B)
+
 
 
 /* 2 REG_WMAC_TXTIMEOUT_8822B */
@@ -7690,7 +8480,8 @@
 #define BIT_SHIFT_WMAC_TXTIMEOUT_8822B 0
 #define BIT_MASK_WMAC_TXTIMEOUT_8822B 0xff
 #define BIT_WMAC_TXTIMEOUT_8822B(x) (((x) & BIT_MASK_WMAC_TXTIMEOUT_8822B) << BIT_SHIFT_WMAC_TXTIMEOUT_8822B)
-#define BIT_GET_WMAC_TXTIMEOUT_8822B(x) (((x) >> BIT_SHIFT_WMAC_TXTIMEOUT_8822B) & BIT_MASK_WMAC_TXTIMEOUT_8822B)

+#define BIT_GET_WMAC_TXTIMEOUT_8822B(x) (((x) >> BIT_SHIFT_WMAC_TXTIMEOUT_8822B) & BIT_MASK_WMAC_TXTIMEOUT_8822B)
+
 
 
 /* 2 REG_STMP_THSD_8822B */
@@ -7698,7 +8489,8 @@
 #define BIT_SHIFT_STMP_THSD_8822B 0
 #define BIT_MASK_STMP_THSD_8822B 0xff
 #define BIT_STMP_THSD_8822B(x) (((x) & BIT_MASK_STMP_THSD_8822B) << BIT_SHIFT_STMP_THSD_8822B)
-#define BIT_GET_STMP_THSD_8822B(x) (((x) >> BIT_SHIFT_STMP_THSD_8822B) & BIT_MASK_STMP_THSD_8822B)

+#define BIT_GET_STMP_THSD_8822B(x) (((x) >> BIT_SHIFT_STMP_THSD_8822B) & BIT_MASK_STMP_THSD_8822B)
+
 
 
 /* 2 REG_MAC_SPEC_SIFS_8822B (SPECIFICATION SIFS REGISTER) */
@@ -7706,13 +8498,15 @@
 #define BIT_SHIFT_SPEC_SIFS_OFDM_8822B 8
 #define BIT_MASK_SPEC_SIFS_OFDM_8822B 0xff
 #define BIT_SPEC_SIFS_OFDM_8822B(x) (((x) & BIT_MASK_SPEC_SIFS_OFDM_8822B) << BIT_SHIFT_SPEC_SIFS_OFDM_8822B)
-#define BIT_GET_SPEC_SIFS_OFDM_8822B(x) (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_8822B) & BIT_MASK_SPEC_SIFS_OFDM_8822B)

+#define BIT_GET_SPEC_SIFS_OFDM_8822B(x) (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_8822B) & BIT_MASK_SPEC_SIFS_OFDM_8822B)
+
 
 
 #define BIT_SHIFT_SPEC_SIFS_CCK_8822B 0
 #define BIT_MASK_SPEC_SIFS_CCK_8822B 0xff
 #define BIT_SPEC_SIFS_CCK_8822B(x) (((x) & BIT_MASK_SPEC_SIFS_CCK_8822B) << BIT_SHIFT_SPEC_SIFS_CCK_8822B)
-#define BIT_GET_SPEC_SIFS_CCK_8822B(x) (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_8822B) & BIT_MASK_SPEC_SIFS_CCK_8822B)

+#define BIT_GET_SPEC_SIFS_CCK_8822B(x) (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_8822B) & BIT_MASK_SPEC_SIFS_CCK_8822B)
+
 
 
 /* 2 REG_USTIME_EDCA_8822B (US TIME TUNING FOR EDCA REGISTER) */
@@ -7720,7 +8514,8 @@
 #define BIT_SHIFT_USTIME_EDCA_V1_8822B 0
 #define BIT_MASK_USTIME_EDCA_V1_8822B 0x1ff
 #define BIT_USTIME_EDCA_V1_8822B(x) (((x) & BIT_MASK_USTIME_EDCA_V1_8822B) << BIT_SHIFT_USTIME_EDCA_V1_8822B)
-#define BIT_GET_USTIME_EDCA_V1_8822B(x) (((x) >> BIT_SHIFT_USTIME_EDCA_V1_8822B) & BIT_MASK_USTIME_EDCA_V1_8822B)

+#define BIT_GET_USTIME_EDCA_V1_8822B(x) (((x) >> BIT_SHIFT_USTIME_EDCA_V1_8822B) & BIT_MASK_USTIME_EDCA_V1_8822B)
+
 
 
 /* 2 REG_RESP_SIFS_OFDM_8822B (RESPONSE SIFS FOR OFDM REGISTER) */
@@ -7728,13 +8523,15 @@
 #define BIT_SHIFT_SIFS_R2T_OFDM_8822B 8
 #define BIT_MASK_SIFS_R2T_OFDM_8822B 0xff
 #define BIT_SIFS_R2T_OFDM_8822B(x) (((x) & BIT_MASK_SIFS_R2T_OFDM_8822B) << BIT_SHIFT_SIFS_R2T_OFDM_8822B)
-#define BIT_GET_SIFS_R2T_OFDM_8822B(x) (((x) >> BIT_SHIFT_SIFS_R2T_OFDM_8822B) & BIT_MASK_SIFS_R2T_OFDM_8822B)

+#define BIT_GET_SIFS_R2T_OFDM_8822B(x) (((x) >> BIT_SHIFT_SIFS_R2T_OFDM_8822B) & BIT_MASK_SIFS_R2T_OFDM_8822B)
+
 
 
 #define BIT_SHIFT_SIFS_T2T_OFDM_8822B 0
 #define BIT_MASK_SIFS_T2T_OFDM_8822B 0xff
 #define BIT_SIFS_T2T_OFDM_8822B(x) (((x) & BIT_MASK_SIFS_T2T_OFDM_8822B) << BIT_SHIFT_SIFS_T2T_OFDM_8822B)
-#define BIT_GET_SIFS_T2T_OFDM_8822B(x) (((x) >> BIT_SHIFT_SIFS_T2T_OFDM_8822B) & BIT_MASK_SIFS_T2T_OFDM_8822B)

+#define BIT_GET_SIFS_T2T_OFDM_8822B(x) (((x) >> BIT_SHIFT_SIFS_T2T_OFDM_8822B) & BIT_MASK_SIFS_T2T_OFDM_8822B)
+
 
 
 /* 2 REG_RESP_SIFS_CCK_8822B (RESPONSE SIFS FOR CCK REGISTER) */
@@ -7742,13 +8539,15 @@
 #define BIT_SHIFT_SIFS_R2T_CCK_8822B 8
 #define BIT_MASK_SIFS_R2T_CCK_8822B 0xff
 #define BIT_SIFS_R2T_CCK_8822B(x) (((x) & BIT_MASK_SIFS_R2T_CCK_8822B) << BIT_SHIFT_SIFS_R2T_CCK_8822B)
-#define BIT_GET_SIFS_R2T_CCK_8822B(x) (((x) >> BIT_SHIFT_SIFS_R2T_CCK_8822B) & BIT_MASK_SIFS_R2T_CCK_8822B)

+#define BIT_GET_SIFS_R2T_CCK_8822B(x) (((x) >> BIT_SHIFT_SIFS_R2T_CCK_8822B) & BIT_MASK_SIFS_R2T_CCK_8822B)
+
 
 
 #define BIT_SHIFT_SIFS_T2T_CCK_8822B 0
 #define BIT_MASK_SIFS_T2T_CCK_8822B 0xff
 #define BIT_SIFS_T2T_CCK_8822B(x) (((x) & BIT_MASK_SIFS_T2T_CCK_8822B) << BIT_SHIFT_SIFS_T2T_CCK_8822B)
-#define BIT_GET_SIFS_T2T_CCK_8822B(x) (((x) >> BIT_SHIFT_SIFS_T2T_CCK_8822B) & BIT_MASK_SIFS_T2T_CCK_8822B)

+#define BIT_GET_SIFS_T2T_CCK_8822B(x) (((x) >> BIT_SHIFT_SIFS_T2T_CCK_8822B) & BIT_MASK_SIFS_T2T_CCK_8822B)
+
 
 
 /* 2 REG_EIFS_8822B (EIFS REGISTER) */
@@ -7756,7 +8555,8 @@
 #define BIT_SHIFT_EIFS_8822B 0
 #define BIT_MASK_EIFS_8822B 0xffff
 #define BIT_EIFS_8822B(x) (((x) & BIT_MASK_EIFS_8822B) << BIT_SHIFT_EIFS_8822B)
-#define BIT_GET_EIFS_8822B(x) (((x) >> BIT_SHIFT_EIFS_8822B) & BIT_MASK_EIFS_8822B)

+#define BIT_GET_EIFS_8822B(x) (((x) >> BIT_SHIFT_EIFS_8822B) & BIT_MASK_EIFS_8822B)
+
 
 
 /* 2 REG_CTS2TO_8822B (CTS2 TIMEOUT REGISTER) */
@@ -7764,7 +8564,8 @@
 #define BIT_SHIFT_CTS2TO_8822B 0
 #define BIT_MASK_CTS2TO_8822B 0xff
 #define BIT_CTS2TO_8822B(x) (((x) & BIT_MASK_CTS2TO_8822B) << BIT_SHIFT_CTS2TO_8822B)
-#define BIT_GET_CTS2TO_8822B(x) (((x) >> BIT_SHIFT_CTS2TO_8822B) & BIT_MASK_CTS2TO_8822B)

+#define BIT_GET_CTS2TO_8822B(x) (((x) >> BIT_SHIFT_CTS2TO_8822B) & BIT_MASK_CTS2TO_8822B)
+
 
 
 /* 2 REG_ACKTO_8822B (ACK TIMEOUT REGISTER) */
@@ -7772,7 +8573,8 @@
 #define BIT_SHIFT_ACKTO_8822B 0
 #define BIT_MASK_ACKTO_8822B 0xff
 #define BIT_ACKTO_8822B(x) (((x) & BIT_MASK_ACKTO_8822B) << BIT_SHIFT_ACKTO_8822B)
-#define BIT_GET_ACKTO_8822B(x) (((x) >> BIT_SHIFT_ACKTO_8822B) & BIT_MASK_ACKTO_8822B)

+#define BIT_GET_ACKTO_8822B(x) (((x) >> BIT_SHIFT_ACKTO_8822B) & BIT_MASK_ACKTO_8822B)
+
 
 
 /* 2 REG_NAV_CTRL_8822B (NAV CONTROL REGISTER) */
@@ -7780,19 +8582,22 @@
 #define BIT_SHIFT_NAV_UPPER_8822B 16
 #define BIT_MASK_NAV_UPPER_8822B 0xff
 #define BIT_NAV_UPPER_8822B(x) (((x) & BIT_MASK_NAV_UPPER_8822B) << BIT_SHIFT_NAV_UPPER_8822B)
-#define BIT_GET_NAV_UPPER_8822B(x) (((x) >> BIT_SHIFT_NAV_UPPER_8822B) & BIT_MASK_NAV_UPPER_8822B)

+#define BIT_GET_NAV_UPPER_8822B(x) (((x) >> BIT_SHIFT_NAV_UPPER_8822B) & BIT_MASK_NAV_UPPER_8822B)
+
 
 
 #define BIT_SHIFT_RXMYRTS_NAV_8822B 8
 #define BIT_MASK_RXMYRTS_NAV_8822B 0xf
 #define BIT_RXMYRTS_NAV_8822B(x) (((x) & BIT_MASK_RXMYRTS_NAV_8822B) << BIT_SHIFT_RXMYRTS_NAV_8822B)
-#define BIT_GET_RXMYRTS_NAV_8822B(x) (((x) >> BIT_SHIFT_RXMYRTS_NAV_8822B) & BIT_MASK_RXMYRTS_NAV_8822B)

+#define BIT_GET_RXMYRTS_NAV_8822B(x) (((x) >> BIT_SHIFT_RXMYRTS_NAV_8822B) & BIT_MASK_RXMYRTS_NAV_8822B)
+
 
 
 #define BIT_SHIFT_RTSRST_8822B 0
 #define BIT_MASK_RTSRST_8822B 0xff
 #define BIT_RTSRST_8822B(x) (((x) & BIT_MASK_RTSRST_8822B) << BIT_SHIFT_RTSRST_8822B)
-#define BIT_GET_RTSRST_8822B(x) (((x) >> BIT_SHIFT_RTSRST_8822B) & BIT_MASK_RTSRST_8822B)

+#define BIT_GET_RTSRST_8822B(x) (((x) >> BIT_SHIFT_RTSRST_8822B) & BIT_MASK_RTSRST_8822B)
+
 
 
 /* 2 REG_BACAMCMD_8822B (BLOCK ACK CAM COMMAND REGISTER) */
@@ -7803,13 +8608,15 @@
 #define BIT_SHIFT_TXSBM_8822B 14
 #define BIT_MASK_TXSBM_8822B 0x3
 #define BIT_TXSBM_8822B(x) (((x) & BIT_MASK_TXSBM_8822B) << BIT_SHIFT_TXSBM_8822B)
-#define BIT_GET_TXSBM_8822B(x) (((x) >> BIT_SHIFT_TXSBM_8822B) & BIT_MASK_TXSBM_8822B)

+#define BIT_GET_TXSBM_8822B(x) (((x) >> BIT_SHIFT_TXSBM_8822B) & BIT_MASK_TXSBM_8822B)
+
 
 
 #define BIT_SHIFT_BACAM_ADDR_8822B 0
 #define BIT_MASK_BACAM_ADDR_8822B 0x3f
 #define BIT_BACAM_ADDR_8822B(x) (((x) & BIT_MASK_BACAM_ADDR_8822B) << BIT_SHIFT_BACAM_ADDR_8822B)
-#define BIT_GET_BACAM_ADDR_8822B(x) (((x) >> BIT_SHIFT_BACAM_ADDR_8822B) & BIT_MASK_BACAM_ADDR_8822B)

+#define BIT_GET_BACAM_ADDR_8822B(x) (((x) >> BIT_SHIFT_BACAM_ADDR_8822B) & BIT_MASK_BACAM_ADDR_8822B)
+
 
 
 /* 2 REG_BACAMCONTENT_8822B (BLOCK ACK CAM CONTENT REGISTER) */
@@ -7817,13 +8624,15 @@
 #define BIT_SHIFT_BA_CONTENT_H_8822B (32 & CPU_OPT_WIDTH)
 #define BIT_MASK_BA_CONTENT_H_8822B 0xffffffffL
 #define BIT_BA_CONTENT_H_8822B(x) (((x) & BIT_MASK_BA_CONTENT_H_8822B) << BIT_SHIFT_BA_CONTENT_H_8822B)
-#define BIT_GET_BA_CONTENT_H_8822B(x) (((x) >> BIT_SHIFT_BA_CONTENT_H_8822B) & BIT_MASK_BA_CONTENT_H_8822B)

+#define BIT_GET_BA_CONTENT_H_8822B(x) (((x) >> BIT_SHIFT_BA_CONTENT_H_8822B) & BIT_MASK_BA_CONTENT_H_8822B)
+
 
 
 #define BIT_SHIFT_BA_CONTENT_L_8822B 0
 #define BIT_MASK_BA_CONTENT_L_8822B 0xffffffffL
 #define BIT_BA_CONTENT_L_8822B(x) (((x) & BIT_MASK_BA_CONTENT_L_8822B) << BIT_SHIFT_BA_CONTENT_L_8822B)
-#define BIT_GET_BA_CONTENT_L_8822B(x) (((x) >> BIT_SHIFT_BA_CONTENT_L_8822B) & BIT_MASK_BA_CONTENT_L_8822B)

+#define BIT_GET_BA_CONTENT_L_8822B(x) (((x) >> BIT_SHIFT_BA_CONTENT_L_8822B) & BIT_MASK_BA_CONTENT_L_8822B)
+
 
 
 /* 2 REG_WMAC_BITMAP_CTL_8822B */
@@ -7835,7 +8644,8 @@
 #define BIT_SHIFT_BITMAP_CONDITION_8822B 2
 #define BIT_MASK_BITMAP_CONDITION_8822B 0x3
 #define BIT_BITMAP_CONDITION_8822B(x) (((x) & BIT_MASK_BITMAP_CONDITION_8822B) << BIT_SHIFT_BITMAP_CONDITION_8822B)
-#define BIT_GET_BITMAP_CONDITION_8822B(x) (((x) >> BIT_SHIFT_BITMAP_CONDITION_8822B) & BIT_MASK_BITMAP_CONDITION_8822B)

+#define BIT_GET_BITMAP_CONDITION_8822B(x) (((x) >> BIT_SHIFT_BITMAP_CONDITION_8822B) & BIT_MASK_BITMAP_CONDITION_8822B)
+
 
 #define BIT_BITMAP_SSNBK_COUNTER_CLR_8822B BIT(1)
 #define BIT_BITMAP_FORCE_8822B BIT(0)
@@ -7845,7 +8655,8 @@
 #define BIT_SHIFT_RXPKT_TYPE_8822B 2
 #define BIT_MASK_RXPKT_TYPE_8822B 0x3f
 #define BIT_RXPKT_TYPE_8822B(x) (((x) & BIT_MASK_RXPKT_TYPE_8822B) << BIT_SHIFT_RXPKT_TYPE_8822B)
-#define BIT_GET_RXPKT_TYPE_8822B(x) (((x) >> BIT_SHIFT_RXPKT_TYPE_8822B) & BIT_MASK_RXPKT_TYPE_8822B)

+#define BIT_GET_RXPKT_TYPE_8822B(x) (((x) >> BIT_SHIFT_RXPKT_TYPE_8822B) & BIT_MASK_RXPKT_TYPE_8822B)
+
 
 #define BIT_TXACT_IND_8822B BIT(1)
 #define BIT_RXACT_IND_8822B BIT(0)
@@ -7855,7 +8666,8 @@
 #define BIT_SHIFT_BITMAP_SSNBK_COUNTER_8822B 2
 #define BIT_MASK_BITMAP_SSNBK_COUNTER_8822B 0x3f
 #define BIT_BITMAP_SSNBK_COUNTER_8822B(x) (((x) & BIT_MASK_BITMAP_SSNBK_COUNTER_8822B) << BIT_SHIFT_BITMAP_SSNBK_COUNTER_8822B)
-#define BIT_GET_BITMAP_SSNBK_COUNTER_8822B(x) (((x) >> BIT_SHIFT_BITMAP_SSNBK_COUNTER_8822B) & BIT_MASK_BITMAP_SSNBK_COUNTER_8822B)

+#define BIT_GET_BITMAP_SSNBK_COUNTER_8822B(x) (((x) >> BIT_SHIFT_BITMAP_SSNBK_COUNTER_8822B) & BIT_MASK_BITMAP_SSNBK_COUNTER_8822B)
+
 
 #define BIT_BITMAP_EN_8822B BIT(1)
 #define BIT_WMAC_BACAM_RPMEN_8822B BIT(0)
@@ -7865,7 +8677,8 @@
 #define BIT_SHIFT_LBDLY_8822B 0
 #define BIT_MASK_LBDLY_8822B 0x1f
 #define BIT_LBDLY_8822B(x) (((x) & BIT_MASK_LBDLY_8822B) << BIT_SHIFT_LBDLY_8822B)
-#define BIT_GET_LBDLY_8822B(x) (((x) >> BIT_SHIFT_LBDLY_8822B) & BIT_MASK_LBDLY_8822B)

+#define BIT_GET_LBDLY_8822B(x) (((x) >> BIT_SHIFT_LBDLY_8822B) & BIT_MASK_LBDLY_8822B)
+
 
 
 /* 2 REG_RXERR_RPT_8822B (RX ERROR REPORT REGISTER) */
@@ -7873,7 +8686,8 @@
 #define BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8822B 28
 #define BIT_MASK_RXERR_RPT_SEL_V1_3_0_8822B 0xf
 #define BIT_RXERR_RPT_SEL_V1_3_0_8822B(x) (((x) & BIT_MASK_RXERR_RPT_SEL_V1_3_0_8822B) << BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8822B)
-#define BIT_GET_RXERR_RPT_SEL_V1_3_0_8822B(x) (((x) >> BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8822B) & BIT_MASK_RXERR_RPT_SEL_V1_3_0_8822B)

+#define BIT_GET_RXERR_RPT_SEL_V1_3_0_8822B(x) (((x) >> BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8822B) & BIT_MASK_RXERR_RPT_SEL_V1_3_0_8822B)
+
 
 #define BIT_RXERR_RPT_RST_8822B BIT(27)
 #define BIT_RXERR_RPT_SEL_V1_4_8822B BIT(26)
@@ -7883,19 +8697,22 @@
 #define BIT_SHIFT_UD_SUB_TYPE_8822B 18
 #define BIT_MASK_UD_SUB_TYPE_8822B 0xf
 #define BIT_UD_SUB_TYPE_8822B(x) (((x) & BIT_MASK_UD_SUB_TYPE_8822B) << BIT_SHIFT_UD_SUB_TYPE_8822B)
-#define BIT_GET_UD_SUB_TYPE_8822B(x) (((x) >> BIT_SHIFT_UD_SUB_TYPE_8822B) & BIT_MASK_UD_SUB_TYPE_8822B)

+#define BIT_GET_UD_SUB_TYPE_8822B(x) (((x) >> BIT_SHIFT_UD_SUB_TYPE_8822B) & BIT_MASK_UD_SUB_TYPE_8822B)
+
 
 
 #define BIT_SHIFT_UD_TYPE_8822B 16
 #define BIT_MASK_UD_TYPE_8822B 0x3
 #define BIT_UD_TYPE_8822B(x) (((x) & BIT_MASK_UD_TYPE_8822B) << BIT_SHIFT_UD_TYPE_8822B)
-#define BIT_GET_UD_TYPE_8822B(x) (((x) >> BIT_SHIFT_UD_TYPE_8822B) & BIT_MASK_UD_TYPE_8822B)

+#define BIT_GET_UD_TYPE_8822B(x) (((x) >> BIT_SHIFT_UD_TYPE_8822B) & BIT_MASK_UD_TYPE_8822B)
+
 
 
 #define BIT_SHIFT_RPT_COUNTER_8822B 0
 #define BIT_MASK_RPT_COUNTER_8822B 0xffff
 #define BIT_RPT_COUNTER_8822B(x) (((x) & BIT_MASK_RPT_COUNTER_8822B) << BIT_SHIFT_RPT_COUNTER_8822B)
-#define BIT_GET_RPT_COUNTER_8822B(x) (((x) >> BIT_SHIFT_RPT_COUNTER_8822B) & BIT_MASK_RPT_COUNTER_8822B)

+#define BIT_GET_RPT_COUNTER_8822B(x) (((x) >> BIT_SHIFT_RPT_COUNTER_8822B) & BIT_MASK_RPT_COUNTER_8822B)
+
 
 
 /* 2 REG_WMAC_TRXPTCL_CTL_8822B (WMAC TX/RX PROTOCOL CONTROL REGISTER) */
@@ -7903,25 +8720,29 @@
 #define BIT_SHIFT_ACKBA_TYPSEL_8822B (60 & CPU_OPT_WIDTH)
 #define BIT_MASK_ACKBA_TYPSEL_8822B 0xf
 #define BIT_ACKBA_TYPSEL_8822B(x) (((x) & BIT_MASK_ACKBA_TYPSEL_8822B) << BIT_SHIFT_ACKBA_TYPSEL_8822B)
-#define BIT_GET_ACKBA_TYPSEL_8822B(x) (((x) >> BIT_SHIFT_ACKBA_TYPSEL_8822B) & BIT_MASK_ACKBA_TYPSEL_8822B)

+#define BIT_GET_ACKBA_TYPSEL_8822B(x) (((x) >> BIT_SHIFT_ACKBA_TYPSEL_8822B) & BIT_MASK_ACKBA_TYPSEL_8822B)
+
 
 
 #define BIT_SHIFT_ACKBA_ACKPCHK_8822B (56 & CPU_OPT_WIDTH)
 #define BIT_MASK_ACKBA_ACKPCHK_8822B 0xf
 #define BIT_ACKBA_ACKPCHK_8822B(x) (((x) & BIT_MASK_ACKBA_ACKPCHK_8822B) << BIT_SHIFT_ACKBA_ACKPCHK_8822B)
-#define BIT_GET_ACKBA_ACKPCHK_8822B(x) (((x) >> BIT_SHIFT_ACKBA_ACKPCHK_8822B) & BIT_MASK_ACKBA_ACKPCHK_8822B)

+#define BIT_GET_ACKBA_ACKPCHK_8822B(x) (((x) >> BIT_SHIFT_ACKBA_ACKPCHK_8822B) & BIT_MASK_ACKBA_ACKPCHK_8822B)
+
 
 
 #define BIT_SHIFT_ACKBAR_TYPESEL_8822B (48 & CPU_OPT_WIDTH)
 #define BIT_MASK_ACKBAR_TYPESEL_8822B 0xff
 #define BIT_ACKBAR_TYPESEL_8822B(x) (((x) & BIT_MASK_ACKBAR_TYPESEL_8822B) << BIT_SHIFT_ACKBAR_TYPESEL_8822B)
-#define BIT_GET_ACKBAR_TYPESEL_8822B(x) (((x) >> BIT_SHIFT_ACKBAR_TYPESEL_8822B) & BIT_MASK_ACKBAR_TYPESEL_8822B)

+#define BIT_GET_ACKBAR_TYPESEL_8822B(x) (((x) >> BIT_SHIFT_ACKBAR_TYPESEL_8822B) & BIT_MASK_ACKBAR_TYPESEL_8822B)
+
 
 
 #define BIT_SHIFT_ACKBAR_ACKPCHK_8822B (44 & CPU_OPT_WIDTH)
 #define BIT_MASK_ACKBAR_ACKPCHK_8822B 0xf
 #define BIT_ACKBAR_ACKPCHK_8822B(x) (((x) & BIT_MASK_ACKBAR_ACKPCHK_8822B) << BIT_SHIFT_ACKBAR_ACKPCHK_8822B)
-#define BIT_GET_ACKBAR_ACKPCHK_8822B(x) (((x) >> BIT_SHIFT_ACKBAR_ACKPCHK_8822B) & BIT_MASK_ACKBAR_ACKPCHK_8822B)

+#define BIT_GET_ACKBAR_ACKPCHK_8822B(x) (((x) >> BIT_SHIFT_ACKBAR_ACKPCHK_8822B) & BIT_MASK_ACKBAR_ACKPCHK_8822B)
+
 
 #define BIT_RXBA_IGNOREA2_8822B BIT(42)
 #define BIT_EN_SAVE_ALL_TXOPADDR_8822B BIT(41)
@@ -7946,7 +8767,8 @@
 #define BIT_SHIFT_RESP_CHNBUSY_8822B 20
 #define BIT_MASK_RESP_CHNBUSY_8822B 0x3
 #define BIT_RESP_CHNBUSY_8822B(x) (((x) & BIT_MASK_RESP_CHNBUSY_8822B) << BIT_SHIFT_RESP_CHNBUSY_8822B)
-#define BIT_GET_RESP_CHNBUSY_8822B(x) (((x) >> BIT_SHIFT_RESP_CHNBUSY_8822B) & BIT_MASK_RESP_CHNBUSY_8822B)

+#define BIT_GET_RESP_CHNBUSY_8822B(x) (((x) >> BIT_SHIFT_RESP_CHNBUSY_8822B) & BIT_MASK_RESP_CHNBUSY_8822B)
+
 
 #define BIT_RESP_DCTS_EN_8822B BIT(19)
 #define BIT_RESP_DCFE_EN_8822B BIT(18)
@@ -7959,19 +8781,22 @@
 #define BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8822B 10
 #define BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8822B 0x7
 #define BIT_R_WMAC_SECOND_CCA_TIMER_8822B(x) (((x) & BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8822B) << BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8822B)
-#define BIT_GET_R_WMAC_SECOND_CCA_TIMER_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8822B) & BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8822B)

+#define BIT_GET_R_WMAC_SECOND_CCA_TIMER_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8822B) & BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8822B)
+
 
 
 #define BIT_SHIFT_RFMOD_8822B 7
 #define BIT_MASK_RFMOD_8822B 0x3
 #define BIT_RFMOD_8822B(x) (((x) & BIT_MASK_RFMOD_8822B) << BIT_SHIFT_RFMOD_8822B)
-#define BIT_GET_RFMOD_8822B(x) (((x) >> BIT_SHIFT_RFMOD_8822B) & BIT_MASK_RFMOD_8822B)

+#define BIT_GET_RFMOD_8822B(x) (((x) >> BIT_SHIFT_RFMOD_8822B) & BIT_MASK_RFMOD_8822B)
+
 
 
 #define BIT_SHIFT_RESP_CTS_DYNBW_SEL_8822B 5
 #define BIT_MASK_RESP_CTS_DYNBW_SEL_8822B 0x3
 #define BIT_RESP_CTS_DYNBW_SEL_8822B(x) (((x) & BIT_MASK_RESP_CTS_DYNBW_SEL_8822B) << BIT_SHIFT_RESP_CTS_DYNBW_SEL_8822B)
-#define BIT_GET_RESP_CTS_DYNBW_SEL_8822B(x) (((x) >> BIT_SHIFT_RESP_CTS_DYNBW_SEL_8822B) & BIT_MASK_RESP_CTS_DYNBW_SEL_8822B)

+#define BIT_GET_RESP_CTS_DYNBW_SEL_8822B(x) (((x) >> BIT_SHIFT_RESP_CTS_DYNBW_SEL_8822B) & BIT_MASK_RESP_CTS_DYNBW_SEL_8822B)
+
 
 #define BIT_DLY_TX_WAIT_RXANTSEL_8822B BIT(4)
 #define BIT_TXRESP_BY_RXANTSEL_8822B BIT(3)
@@ -7979,7 +8804,8 @@
 #define BIT_SHIFT_ORIG_DCTS_CHK_8822B 0
 #define BIT_MASK_ORIG_DCTS_CHK_8822B 0x3
 #define BIT_ORIG_DCTS_CHK_8822B(x) (((x) & BIT_MASK_ORIG_DCTS_CHK_8822B) << BIT_SHIFT_ORIG_DCTS_CHK_8822B)
-#define BIT_GET_ORIG_DCTS_CHK_8822B(x) (((x) >> BIT_SHIFT_ORIG_DCTS_CHK_8822B) & BIT_MASK_ORIG_DCTS_CHK_8822B)

+#define BIT_GET_ORIG_DCTS_CHK_8822B(x) (((x) >> BIT_SHIFT_ORIG_DCTS_CHK_8822B) & BIT_MASK_ORIG_DCTS_CHK_8822B)
+
 
 
 /* 2 REG_CAMCMD_8822B (CAM COMMAND REGISTER) */
@@ -7991,7 +8817,8 @@
 #define BIT_SHIFT_SECCAM_ADDR_V2_8822B 0
 #define BIT_MASK_SECCAM_ADDR_V2_8822B 0x3ff
 #define BIT_SECCAM_ADDR_V2_8822B(x) (((x) & BIT_MASK_SECCAM_ADDR_V2_8822B) << BIT_SHIFT_SECCAM_ADDR_V2_8822B)
-#define BIT_GET_SECCAM_ADDR_V2_8822B(x) (((x) >> BIT_SHIFT_SECCAM_ADDR_V2_8822B) & BIT_MASK_SECCAM_ADDR_V2_8822B)

+#define BIT_GET_SECCAM_ADDR_V2_8822B(x) (((x) >> BIT_SHIFT_SECCAM_ADDR_V2_8822B) & BIT_MASK_SECCAM_ADDR_V2_8822B)
+
 
 
 /* 2 REG_CAMWRITE_8822B (CAM WRITE REGISTER) */
@@ -7999,7 +8826,8 @@
 #define BIT_SHIFT_CAMW_DATA_8822B 0
 #define BIT_MASK_CAMW_DATA_8822B 0xffffffffL
 #define BIT_CAMW_DATA_8822B(x) (((x) & BIT_MASK_CAMW_DATA_8822B) << BIT_SHIFT_CAMW_DATA_8822B)
-#define BIT_GET_CAMW_DATA_8822B(x) (((x) >> BIT_SHIFT_CAMW_DATA_8822B) & BIT_MASK_CAMW_DATA_8822B)

+#define BIT_GET_CAMW_DATA_8822B(x) (((x) >> BIT_SHIFT_CAMW_DATA_8822B) & BIT_MASK_CAMW_DATA_8822B)
+
 
 
 /* 2 REG_CAMREAD_8822B (CAM READ REGISTER) */
@@ -8007,7 +8835,8 @@
 #define BIT_SHIFT_CAMR_DATA_8822B 0
 #define BIT_MASK_CAMR_DATA_8822B 0xffffffffL
 #define BIT_CAMR_DATA_8822B(x) (((x) & BIT_MASK_CAMR_DATA_8822B) << BIT_SHIFT_CAMR_DATA_8822B)
-#define BIT_GET_CAMR_DATA_8822B(x) (((x) >> BIT_SHIFT_CAMR_DATA_8822B) & BIT_MASK_CAMR_DATA_8822B)

+#define BIT_GET_CAMR_DATA_8822B(x) (((x) >> BIT_SHIFT_CAMR_DATA_8822B) & BIT_MASK_CAMR_DATA_8822B)
+
 
 
 /* 2 REG_CAMDBG_8822B (CAM DEBUG REGISTER) */
@@ -8017,20 +8846,23 @@
 #define BIT_SHIFT_CAMDBG_SEC_TYPE_8822B 12
 #define BIT_MASK_CAMDBG_SEC_TYPE_8822B 0x7
 #define BIT_CAMDBG_SEC_TYPE_8822B(x) (((x) & BIT_MASK_CAMDBG_SEC_TYPE_8822B) << BIT_SHIFT_CAMDBG_SEC_TYPE_8822B)
-#define BIT_GET_CAMDBG_SEC_TYPE_8822B(x) (((x) >> BIT_SHIFT_CAMDBG_SEC_TYPE_8822B) & BIT_MASK_CAMDBG_SEC_TYPE_8822B)

+#define BIT_GET_CAMDBG_SEC_TYPE_8822B(x) (((x) >> BIT_SHIFT_CAMDBG_SEC_TYPE_8822B) & BIT_MASK_CAMDBG_SEC_TYPE_8822B)
+
 
 #define BIT_CAMDBG_EXT_SECTYPE_8822B BIT(11)
 
 #define BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8822B 5
 #define BIT_MASK_CAMDBG_MIC_KEY_IDX_8822B 0x1f
 #define BIT_CAMDBG_MIC_KEY_IDX_8822B(x) (((x) & BIT_MASK_CAMDBG_MIC_KEY_IDX_8822B) << BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8822B)
-#define BIT_GET_CAMDBG_MIC_KEY_IDX_8822B(x) (((x) >> BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8822B) & BIT_MASK_CAMDBG_MIC_KEY_IDX_8822B)

+#define BIT_GET_CAMDBG_MIC_KEY_IDX_8822B(x) (((x) >> BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8822B) & BIT_MASK_CAMDBG_MIC_KEY_IDX_8822B)
+
 
 
 #define BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8822B 0
 #define BIT_MASK_CAMDBG_SEC_KEY_IDX_8822B 0x1f
 #define BIT_CAMDBG_SEC_KEY_IDX_8822B(x) (((x) & BIT_MASK_CAMDBG_SEC_KEY_IDX_8822B) << BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8822B)
-#define BIT_GET_CAMDBG_SEC_KEY_IDX_8822B(x) (((x) >> BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8822B) & BIT_MASK_CAMDBG_SEC_KEY_IDX_8822B)

+#define BIT_GET_CAMDBG_SEC_KEY_IDX_8822B(x) (((x) >> BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8822B) & BIT_MASK_CAMDBG_SEC_KEY_IDX_8822B)
+
 
 
 /* 2 REG_RXFILTER_ACTION_1_8822B */
@@ -8038,7 +8870,8 @@
 #define BIT_SHIFT_RXFILTER_ACTION_1_8822B 0
 #define BIT_MASK_RXFILTER_ACTION_1_8822B 0xff
 #define BIT_RXFILTER_ACTION_1_8822B(x) (((x) & BIT_MASK_RXFILTER_ACTION_1_8822B) << BIT_SHIFT_RXFILTER_ACTION_1_8822B)
-#define BIT_GET_RXFILTER_ACTION_1_8822B(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_1_8822B) & BIT_MASK_RXFILTER_ACTION_1_8822B)

+#define BIT_GET_RXFILTER_ACTION_1_8822B(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_1_8822B) & BIT_MASK_RXFILTER_ACTION_1_8822B)
+
 
 
 /* 2 REG_RXFILTER_CATEGORY_1_8822B */
@@ -8046,7 +8879,8 @@
 #define BIT_SHIFT_RXFILTER_CATEGORY_1_8822B 0
 #define BIT_MASK_RXFILTER_CATEGORY_1_8822B 0xff
 #define BIT_RXFILTER_CATEGORY_1_8822B(x) (((x) & BIT_MASK_RXFILTER_CATEGORY_1_8822B) << BIT_SHIFT_RXFILTER_CATEGORY_1_8822B)
-#define BIT_GET_RXFILTER_CATEGORY_1_8822B(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_1_8822B) & BIT_MASK_RXFILTER_CATEGORY_1_8822B)

+#define BIT_GET_RXFILTER_CATEGORY_1_8822B(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_1_8822B) & BIT_MASK_RXFILTER_CATEGORY_1_8822B)
+
 
 
 /* 2 REG_SECCFG_8822B (SECURITY CONFIGURATION REGISTER) */
@@ -8071,7 +8905,8 @@
 #define BIT_SHIFT_RXFILTER_ACTION_3_8822B 0
 #define BIT_MASK_RXFILTER_ACTION_3_8822B 0xff
 #define BIT_RXFILTER_ACTION_3_8822B(x) (((x) & BIT_MASK_RXFILTER_ACTION_3_8822B) << BIT_SHIFT_RXFILTER_ACTION_3_8822B)
-#define BIT_GET_RXFILTER_ACTION_3_8822B(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_3_8822B) & BIT_MASK_RXFILTER_ACTION_3_8822B)

+#define BIT_GET_RXFILTER_ACTION_3_8822B(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_3_8822B) & BIT_MASK_RXFILTER_ACTION_3_8822B)
+
 
 
 /* 2 REG_RXFILTER_CATEGORY_3_8822B */
@@ -8079,7 +8914,8 @@
 #define BIT_SHIFT_RXFILTER_CATEGORY_3_8822B 0
 #define BIT_MASK_RXFILTER_CATEGORY_3_8822B 0xff
 #define BIT_RXFILTER_CATEGORY_3_8822B(x) (((x) & BIT_MASK_RXFILTER_CATEGORY_3_8822B) << BIT_SHIFT_RXFILTER_CATEGORY_3_8822B)
-#define BIT_GET_RXFILTER_CATEGORY_3_8822B(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_3_8822B) & BIT_MASK_RXFILTER_CATEGORY_3_8822B)

+#define BIT_GET_RXFILTER_CATEGORY_3_8822B(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_3_8822B) & BIT_MASK_RXFILTER_CATEGORY_3_8822B)
+
 
 
 /* 2 REG_RXFILTER_ACTION_2_8822B */
@@ -8087,7 +8923,8 @@
 #define BIT_SHIFT_RXFILTER_ACTION_2_8822B 0
 #define BIT_MASK_RXFILTER_ACTION_2_8822B 0xff
 #define BIT_RXFILTER_ACTION_2_8822B(x) (((x) & BIT_MASK_RXFILTER_ACTION_2_8822B) << BIT_SHIFT_RXFILTER_ACTION_2_8822B)
-#define BIT_GET_RXFILTER_ACTION_2_8822B(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_2_8822B) & BIT_MASK_RXFILTER_ACTION_2_8822B)

+#define BIT_GET_RXFILTER_ACTION_2_8822B(x) (((x) >> BIT_SHIFT_RXFILTER_ACTION_2_8822B) & BIT_MASK_RXFILTER_ACTION_2_8822B)
+
 
 
 /* 2 REG_RXFILTER_CATEGORY_2_8822B */
@@ -8095,7 +8932,8 @@
 #define BIT_SHIFT_RXFILTER_CATEGORY_2_8822B 0
 #define BIT_MASK_RXFILTER_CATEGORY_2_8822B 0xff
 #define BIT_RXFILTER_CATEGORY_2_8822B(x) (((x) & BIT_MASK_RXFILTER_CATEGORY_2_8822B) << BIT_SHIFT_RXFILTER_CATEGORY_2_8822B)
-#define BIT_GET_RXFILTER_CATEGORY_2_8822B(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_2_8822B) & BIT_MASK_RXFILTER_CATEGORY_2_8822B)

+#define BIT_GET_RXFILTER_CATEGORY_2_8822B(x) (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_2_8822B) & BIT_MASK_RXFILTER_CATEGORY_2_8822B)
+
 
 
 /* 2 REG_RXFLTMAP4_8822B (RX FILTER MAP GROUP 4) */
@@ -8185,7 +9023,8 @@
 #define BIT_SHIFT_PORTSEL__PS_RX_INFO_8822B 5
 #define BIT_MASK_PORTSEL__PS_RX_INFO_8822B 0x7
 #define BIT_PORTSEL__PS_RX_INFO_8822B(x) (((x) & BIT_MASK_PORTSEL__PS_RX_INFO_8822B) << BIT_SHIFT_PORTSEL__PS_RX_INFO_8822B)
-#define BIT_GET_PORTSEL__PS_RX_INFO_8822B(x) (((x) >> BIT_SHIFT_PORTSEL__PS_RX_INFO_8822B) & BIT_MASK_PORTSEL__PS_RX_INFO_8822B)

+#define BIT_GET_PORTSEL__PS_RX_INFO_8822B(x) (((x) >> BIT_SHIFT_PORTSEL__PS_RX_INFO_8822B) & BIT_MASK_PORTSEL__PS_RX_INFO_8822B)
+
 
 #define BIT_RXCTRLIN0_8822B BIT(4)
 #define BIT_RXMGTIN0_8822B BIT(3)
@@ -8203,7 +9042,8 @@
 #define BIT_SHIFT_PSF_BSSIDSEL_B2B1_8822B 6
 #define BIT_MASK_PSF_BSSIDSEL_B2B1_8822B 0x3
 #define BIT_PSF_BSSIDSEL_B2B1_8822B(x) (((x) & BIT_MASK_PSF_BSSIDSEL_B2B1_8822B) << BIT_SHIFT_PSF_BSSIDSEL_B2B1_8822B)
-#define BIT_GET_PSF_BSSIDSEL_B2B1_8822B(x) (((x) >> BIT_SHIFT_PSF_BSSIDSEL_B2B1_8822B) & BIT_MASK_PSF_BSSIDSEL_B2B1_8822B)

+#define BIT_GET_PSF_BSSIDSEL_B2B1_8822B(x) (((x) >> BIT_SHIFT_PSF_BSSIDSEL_B2B1_8822B) & BIT_MASK_PSF_BSSIDSEL_B2B1_8822B)
+
 
 #define BIT_WOWHCI_8822B BIT(5)
 #define BIT_PSF_BSSIDSEL_B0_8822B BIT(4)
@@ -8218,13 +9058,15 @@
 #define BIT_SHIFT_LPNAV_EARLY_8822B 16
 #define BIT_MASK_LPNAV_EARLY_8822B 0x7fff
 #define BIT_LPNAV_EARLY_8822B(x) (((x) & BIT_MASK_LPNAV_EARLY_8822B) << BIT_SHIFT_LPNAV_EARLY_8822B)
-#define BIT_GET_LPNAV_EARLY_8822B(x) (((x) >> BIT_SHIFT_LPNAV_EARLY_8822B) & BIT_MASK_LPNAV_EARLY_8822B)

+#define BIT_GET_LPNAV_EARLY_8822B(x) (((x) >> BIT_SHIFT_LPNAV_EARLY_8822B) & BIT_MASK_LPNAV_EARLY_8822B)
+
 
 
 #define BIT_SHIFT_LPNAV_TH_8822B 0
 #define BIT_MASK_LPNAV_TH_8822B 0xffff
 #define BIT_LPNAV_TH_8822B(x) (((x) & BIT_MASK_LPNAV_TH_8822B) << BIT_SHIFT_LPNAV_TH_8822B)
-#define BIT_GET_LPNAV_TH_8822B(x) (((x) >> BIT_SHIFT_LPNAV_TH_8822B) & BIT_MASK_LPNAV_TH_8822B)

+#define BIT_GET_LPNAV_TH_8822B(x) (((x) >> BIT_SHIFT_LPNAV_TH_8822B) & BIT_MASK_LPNAV_TH_8822B)
+
 
 
 /* 2 REG_WKFMCAM_CMD_8822B (WAKEUP FRAME CAM COMMAND REGISTER) */
@@ -8235,13 +9077,15 @@
 #define BIT_SHIFT_WKFCAM_ADDR_V2_8822B 8
 #define BIT_MASK_WKFCAM_ADDR_V2_8822B 0xff
 #define BIT_WKFCAM_ADDR_V2_8822B(x) (((x) & BIT_MASK_WKFCAM_ADDR_V2_8822B) << BIT_SHIFT_WKFCAM_ADDR_V2_8822B)
-#define BIT_GET_WKFCAM_ADDR_V2_8822B(x) (((x) >> BIT_SHIFT_WKFCAM_ADDR_V2_8822B) & BIT_MASK_WKFCAM_ADDR_V2_8822B)

+#define BIT_GET_WKFCAM_ADDR_V2_8822B(x) (((x) >> BIT_SHIFT_WKFCAM_ADDR_V2_8822B) & BIT_MASK_WKFCAM_ADDR_V2_8822B)
+
 
 
 #define BIT_SHIFT_WKFCAM_CAM_NUM_V1_8822B 0
 #define BIT_MASK_WKFCAM_CAM_NUM_V1_8822B 0xff
 #define BIT_WKFCAM_CAM_NUM_V1_8822B(x) (((x) & BIT_MASK_WKFCAM_CAM_NUM_V1_8822B) << BIT_SHIFT_WKFCAM_CAM_NUM_V1_8822B)
-#define BIT_GET_WKFCAM_CAM_NUM_V1_8822B(x) (((x) >> BIT_SHIFT_WKFCAM_CAM_NUM_V1_8822B) & BIT_MASK_WKFCAM_CAM_NUM_V1_8822B)

+#define BIT_GET_WKFCAM_CAM_NUM_V1_8822B(x) (((x) >> BIT_SHIFT_WKFCAM_CAM_NUM_V1_8822B) & BIT_MASK_WKFCAM_CAM_NUM_V1_8822B)
+
 
 
 /* 2 REG_WKFMCAM_RWD_8822B (WAKEUP FRAME READ/WRITE DATA) */
@@ -8249,7 +9093,8 @@
 #define BIT_SHIFT_WKFMCAM_RWD_8822B 0
 #define BIT_MASK_WKFMCAM_RWD_8822B 0xffffffffL
 #define BIT_WKFMCAM_RWD_8822B(x) (((x) & BIT_MASK_WKFMCAM_RWD_8822B) << BIT_SHIFT_WKFMCAM_RWD_8822B)
-#define BIT_GET_WKFMCAM_RWD_8822B(x) (((x) >> BIT_SHIFT_WKFMCAM_RWD_8822B) & BIT_MASK_WKFMCAM_RWD_8822B)

+#define BIT_GET_WKFMCAM_RWD_8822B(x) (((x) >> BIT_SHIFT_WKFMCAM_RWD_8822B) & BIT_MASK_WKFMCAM_RWD_8822B)
+
 
 
 /* 2 REG_RXFLTMAP1_8822B (RX FILTER MAP GROUP 1) */
@@ -8313,13 +9158,15 @@
 #define BIT_SHIFT_DTIM_CNT_8822B 24
 #define BIT_MASK_DTIM_CNT_8822B 0xff
 #define BIT_DTIM_CNT_8822B(x) (((x) & BIT_MASK_DTIM_CNT_8822B) << BIT_SHIFT_DTIM_CNT_8822B)
-#define BIT_GET_DTIM_CNT_8822B(x) (((x) >> BIT_SHIFT_DTIM_CNT_8822B) & BIT_MASK_DTIM_CNT_8822B)

+#define BIT_GET_DTIM_CNT_8822B(x) (((x) >> BIT_SHIFT_DTIM_CNT_8822B) & BIT_MASK_DTIM_CNT_8822B)
+
 
 
 #define BIT_SHIFT_DTIM_PERIOD_8822B 16
 #define BIT_MASK_DTIM_PERIOD_8822B 0xff
 #define BIT_DTIM_PERIOD_8822B(x) (((x) & BIT_MASK_DTIM_PERIOD_8822B) << BIT_SHIFT_DTIM_PERIOD_8822B)
-#define BIT_GET_DTIM_PERIOD_8822B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD_8822B) & BIT_MASK_DTIM_PERIOD_8822B)

+#define BIT_GET_DTIM_PERIOD_8822B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD_8822B) & BIT_MASK_DTIM_PERIOD_8822B)
+
 
 #define BIT_DTIM_8822B BIT(15)
 #define BIT_TIM_8822B BIT(14)
@@ -8327,7 +9174,8 @@
 #define BIT_SHIFT_PS_AID_0_8822B 0
 #define BIT_MASK_PS_AID_0_8822B 0x7ff
 #define BIT_PS_AID_0_8822B(x) (((x) & BIT_MASK_PS_AID_0_8822B) << BIT_SHIFT_PS_AID_0_8822B)
-#define BIT_GET_PS_AID_0_8822B(x) (((x) >> BIT_SHIFT_PS_AID_0_8822B) & BIT_MASK_PS_AID_0_8822B)

+#define BIT_GET_PS_AID_0_8822B(x) (((x) >> BIT_SHIFT_PS_AID_0_8822B) & BIT_MASK_PS_AID_0_8822B)
+
 
 
 /* 2 REG_FLC_TRPC_8822B (TIMER OF FLC_RPC) */
@@ -8337,7 +9185,8 @@
 #define BIT_SHIFT_TRPCD_8822B 0
 #define BIT_MASK_TRPCD_8822B 0x3f
 #define BIT_TRPCD_8822B(x) (((x) & BIT_MASK_TRPCD_8822B) << BIT_SHIFT_TRPCD_8822B)
-#define BIT_GET_TRPCD_8822B(x) (((x) >> BIT_SHIFT_TRPCD_8822B) & BIT_MASK_TRPCD_8822B)

+#define BIT_GET_TRPCD_8822B(x) (((x) >> BIT_SHIFT_TRPCD_8822B) & BIT_MASK_TRPCD_8822B)
+
 
 
 /* 2 REG_FLC_PTS_8822B (PKT TYPE SELECTION OF FLC_RPC T) */
@@ -8350,7 +9199,8 @@
 #define BIT_SHIFT_FLC_RPCT_8822B 0
 #define BIT_MASK_FLC_RPCT_8822B 0xff
 #define BIT_FLC_RPCT_8822B(x) (((x) & BIT_MASK_FLC_RPCT_8822B) << BIT_SHIFT_FLC_RPCT_8822B)
-#define BIT_GET_FLC_RPCT_8822B(x) (((x) >> BIT_SHIFT_FLC_RPCT_8822B) & BIT_MASK_FLC_RPCT_8822B)

+#define BIT_GET_FLC_RPCT_8822B(x) (((x) >> BIT_SHIFT_FLC_RPCT_8822B) & BIT_MASK_FLC_RPCT_8822B)
+
 
 
 /* 2 REG_FLC_RPC_8822B (FW LPS CONDITION -- RX PKT COUNTER) */
@@ -8358,7 +9208,8 @@
 #define BIT_SHIFT_FLC_RPC_8822B 0
 #define BIT_MASK_FLC_RPC_8822B 0xff
 #define BIT_FLC_RPC_8822B(x) (((x) & BIT_MASK_FLC_RPC_8822B) << BIT_SHIFT_FLC_RPC_8822B)
-#define BIT_GET_FLC_RPC_8822B(x) (((x) >> BIT_SHIFT_FLC_RPC_8822B) & BIT_MASK_FLC_RPC_8822B)

+#define BIT_GET_FLC_RPC_8822B(x) (((x) >> BIT_SHIFT_FLC_RPC_8822B) & BIT_MASK_FLC_RPC_8822B)
+
 
 
 /* 2 REG_RXPKTMON_CTRL_8822B */
@@ -8366,25 +9217,29 @@
 #define BIT_SHIFT_RXBKQPKT_SEQ_8822B 20
 #define BIT_MASK_RXBKQPKT_SEQ_8822B 0xf
 #define BIT_RXBKQPKT_SEQ_8822B(x) (((x) & BIT_MASK_RXBKQPKT_SEQ_8822B) << BIT_SHIFT_RXBKQPKT_SEQ_8822B)
-#define BIT_GET_RXBKQPKT_SEQ_8822B(x) (((x) >> BIT_SHIFT_RXBKQPKT_SEQ_8822B) & BIT_MASK_RXBKQPKT_SEQ_8822B)

+#define BIT_GET_RXBKQPKT_SEQ_8822B(x) (((x) >> BIT_SHIFT_RXBKQPKT_SEQ_8822B) & BIT_MASK_RXBKQPKT_SEQ_8822B)
+
 
 
 #define BIT_SHIFT_RXBEQPKT_SEQ_8822B 16
 #define BIT_MASK_RXBEQPKT_SEQ_8822B 0xf
 #define BIT_RXBEQPKT_SEQ_8822B(x) (((x) & BIT_MASK_RXBEQPKT_SEQ_8822B) << BIT_SHIFT_RXBEQPKT_SEQ_8822B)
-#define BIT_GET_RXBEQPKT_SEQ_8822B(x) (((x) >> BIT_SHIFT_RXBEQPKT_SEQ_8822B) & BIT_MASK_RXBEQPKT_SEQ_8822B)

+#define BIT_GET_RXBEQPKT_SEQ_8822B(x) (((x) >> BIT_SHIFT_RXBEQPKT_SEQ_8822B) & BIT_MASK_RXBEQPKT_SEQ_8822B)
+
 
 
 #define BIT_SHIFT_RXVIQPKT_SEQ_8822B 12
 #define BIT_MASK_RXVIQPKT_SEQ_8822B 0xf
 #define BIT_RXVIQPKT_SEQ_8822B(x) (((x) & BIT_MASK_RXVIQPKT_SEQ_8822B) << BIT_SHIFT_RXVIQPKT_SEQ_8822B)
-#define BIT_GET_RXVIQPKT_SEQ_8822B(x) (((x) >> BIT_SHIFT_RXVIQPKT_SEQ_8822B) & BIT_MASK_RXVIQPKT_SEQ_8822B)

+#define BIT_GET_RXVIQPKT_SEQ_8822B(x) (((x) >> BIT_SHIFT_RXVIQPKT_SEQ_8822B) & BIT_MASK_RXVIQPKT_SEQ_8822B)
+
 
 
 #define BIT_SHIFT_RXVOQPKT_SEQ_8822B 8
 #define BIT_MASK_RXVOQPKT_SEQ_8822B 0xf
 #define BIT_RXVOQPKT_SEQ_8822B(x) (((x) & BIT_MASK_RXVOQPKT_SEQ_8822B) << BIT_SHIFT_RXVOQPKT_SEQ_8822B)
-#define BIT_GET_RXVOQPKT_SEQ_8822B(x) (((x) >> BIT_SHIFT_RXVOQPKT_SEQ_8822B) & BIT_MASK_RXVOQPKT_SEQ_8822B)

+#define BIT_GET_RXVOQPKT_SEQ_8822B(x) (((x) >> BIT_SHIFT_RXVOQPKT_SEQ_8822B) & BIT_MASK_RXVOQPKT_SEQ_8822B)
+
 
 #define BIT_RXBKQPKT_ERR_8822B BIT(7)
 #define BIT_RXBEQPKT_ERR_8822B BIT(6)
@@ -8399,20 +9254,23 @@
 #define BIT_SHIFT_STATE_SEL_8822B 24
 #define BIT_MASK_STATE_SEL_8822B 0x1f
 #define BIT_STATE_SEL_8822B(x) (((x) & BIT_MASK_STATE_SEL_8822B) << BIT_SHIFT_STATE_SEL_8822B)
-#define BIT_GET_STATE_SEL_8822B(x) (((x) >> BIT_SHIFT_STATE_SEL_8822B) & BIT_MASK_STATE_SEL_8822B)

+#define BIT_GET_STATE_SEL_8822B(x) (((x) >> BIT_SHIFT_STATE_SEL_8822B) & BIT_MASK_STATE_SEL_8822B)
+
 
 
 #define BIT_SHIFT_STATE_INFO_8822B 8
 #define BIT_MASK_STATE_INFO_8822B 0xff
 #define BIT_STATE_INFO_8822B(x) (((x) & BIT_MASK_STATE_INFO_8822B) << BIT_SHIFT_STATE_INFO_8822B)
-#define BIT_GET_STATE_INFO_8822B(x) (((x) >> BIT_SHIFT_STATE_INFO_8822B) & BIT_MASK_STATE_INFO_8822B)

+#define BIT_GET_STATE_INFO_8822B(x) (((x) >> BIT_SHIFT_STATE_INFO_8822B) & BIT_MASK_STATE_INFO_8822B)
+
 
 #define BIT_UPD_NXT_STATE_8822B BIT(7)
 
 #define BIT_SHIFT_CUR_STATE_8822B 0
 #define BIT_MASK_CUR_STATE_8822B 0x7f
 #define BIT_CUR_STATE_8822B(x) (((x) & BIT_MASK_CUR_STATE_8822B) << BIT_SHIFT_CUR_STATE_8822B)
-#define BIT_GET_CUR_STATE_8822B(x) (((x) >> BIT_SHIFT_CUR_STATE_8822B) & BIT_MASK_CUR_STATE_8822B)

+#define BIT_GET_CUR_STATE_8822B(x) (((x) >> BIT_SHIFT_CUR_STATE_8822B) & BIT_MASK_CUR_STATE_8822B)
+
 
 
 /* 2 REG_ERROR_MON_8822B */
@@ -8429,7 +9287,8 @@
 #define BIT_SHIFT_INFO_INDEX_OFFSET_8822B 16
 #define BIT_MASK_INFO_INDEX_OFFSET_8822B 0x1fff
 #define BIT_INFO_INDEX_OFFSET_8822B(x) (((x) & BIT_MASK_INFO_INDEX_OFFSET_8822B) << BIT_SHIFT_INFO_INDEX_OFFSET_8822B)
-#define BIT_GET_INFO_INDEX_OFFSET_8822B(x) (((x) >> BIT_SHIFT_INFO_INDEX_OFFSET_8822B) & BIT_MASK_INFO_INDEX_OFFSET_8822B)

+#define BIT_GET_INFO_INDEX_OFFSET_8822B(x) (((x) >> BIT_SHIFT_INFO_INDEX_OFFSET_8822B) & BIT_MASK_INFO_INDEX_OFFSET_8822B)
+
 
 #define BIT_WMAC_SRCH_FIFOFULL_8822B BIT(15)
 #define BIT_DIS_INFOSRCH_8822B BIT(14)
@@ -8438,7 +9297,8 @@
 #define BIT_SHIFT_INFO_ADDR_OFFSET_8822B 0
 #define BIT_MASK_INFO_ADDR_OFFSET_8822B 0x1fff
 #define BIT_INFO_ADDR_OFFSET_8822B(x) (((x) & BIT_MASK_INFO_ADDR_OFFSET_8822B) << BIT_SHIFT_INFO_ADDR_OFFSET_8822B)
-#define BIT_GET_INFO_ADDR_OFFSET_8822B(x) (((x) >> BIT_SHIFT_INFO_ADDR_OFFSET_8822B) & BIT_MASK_INFO_ADDR_OFFSET_8822B)

+#define BIT_GET_INFO_ADDR_OFFSET_8822B(x) (((x) >> BIT_SHIFT_INFO_ADDR_OFFSET_8822B) & BIT_MASK_INFO_ADDR_OFFSET_8822B)
+
 
 
 /* 2 REG_BT_COEX_TABLE_8822B (BT-COEXISTENCE CONTROL REGISTER) */
@@ -8449,13 +9309,15 @@
 #define BIT_SHIFT_PRI_MASK_TXAC_8822B (117 & CPU_OPT_WIDTH)
 #define BIT_MASK_PRI_MASK_TXAC_8822B 0x7f
 #define BIT_PRI_MASK_TXAC_8822B(x) (((x) & BIT_MASK_PRI_MASK_TXAC_8822B) << BIT_SHIFT_PRI_MASK_TXAC_8822B)
-#define BIT_GET_PRI_MASK_TXAC_8822B(x) (((x) >> BIT_SHIFT_PRI_MASK_TXAC_8822B) & BIT_MASK_PRI_MASK_TXAC_8822B)

+#define BIT_GET_PRI_MASK_TXAC_8822B(x) (((x) >> BIT_SHIFT_PRI_MASK_TXAC_8822B) & BIT_MASK_PRI_MASK_TXAC_8822B)
+
 
 
 #define BIT_SHIFT_PRI_MASK_NAV_8822B (109 & CPU_OPT_WIDTH)
 #define BIT_MASK_PRI_MASK_NAV_8822B 0xff
 #define BIT_PRI_MASK_NAV_8822B(x) (((x) & BIT_MASK_PRI_MASK_NAV_8822B) << BIT_SHIFT_PRI_MASK_NAV_8822B)
-#define BIT_GET_PRI_MASK_NAV_8822B(x) (((x) >> BIT_SHIFT_PRI_MASK_NAV_8822B) & BIT_MASK_PRI_MASK_NAV_8822B)

+#define BIT_GET_PRI_MASK_NAV_8822B(x) (((x) >> BIT_SHIFT_PRI_MASK_NAV_8822B) & BIT_MASK_PRI_MASK_NAV_8822B)
+
 
 #define BIT_PRI_MASK_CCK_8822B BIT(108)
 #define BIT_PRI_MASK_OFDM_8822B BIT(107)
@@ -8464,13 +9326,15 @@
 #define BIT_SHIFT_PRI_MASK_NUM_8822B (102 & CPU_OPT_WIDTH)
 #define BIT_MASK_PRI_MASK_NUM_8822B 0xf
 #define BIT_PRI_MASK_NUM_8822B(x) (((x) & BIT_MASK_PRI_MASK_NUM_8822B) << BIT_SHIFT_PRI_MASK_NUM_8822B)
-#define BIT_GET_PRI_MASK_NUM_8822B(x) (((x) >> BIT_SHIFT_PRI_MASK_NUM_8822B) & BIT_MASK_PRI_MASK_NUM_8822B)

+#define BIT_GET_PRI_MASK_NUM_8822B(x) (((x) >> BIT_SHIFT_PRI_MASK_NUM_8822B) & BIT_MASK_PRI_MASK_NUM_8822B)
+
 
 
 #define BIT_SHIFT_PRI_MASK_TYPE_8822B (98 & CPU_OPT_WIDTH)
 #define BIT_MASK_PRI_MASK_TYPE_8822B 0xf
 #define BIT_PRI_MASK_TYPE_8822B(x) (((x) & BIT_MASK_PRI_MASK_TYPE_8822B) << BIT_SHIFT_PRI_MASK_TYPE_8822B)
-#define BIT_GET_PRI_MASK_TYPE_8822B(x) (((x) >> BIT_SHIFT_PRI_MASK_TYPE_8822B) & BIT_MASK_PRI_MASK_TYPE_8822B)

+#define BIT_GET_PRI_MASK_TYPE_8822B(x) (((x) >> BIT_SHIFT_PRI_MASK_TYPE_8822B) & BIT_MASK_PRI_MASK_TYPE_8822B)
+
 
 #define BIT_OOB_8822B BIT(97)
 #define BIT_ANT_SEL_8822B BIT(96)
@@ -8478,25 +9342,29 @@
 #define BIT_SHIFT_BREAK_TABLE_2_8822B (80 & CPU_OPT_WIDTH)
 #define BIT_MASK_BREAK_TABLE_2_8822B 0xffff
 #define BIT_BREAK_TABLE_2_8822B(x) (((x) & BIT_MASK_BREAK_TABLE_2_8822B) << BIT_SHIFT_BREAK_TABLE_2_8822B)
-#define BIT_GET_BREAK_TABLE_2_8822B(x) (((x) >> BIT_SHIFT_BREAK_TABLE_2_8822B) & BIT_MASK_BREAK_TABLE_2_8822B)

+#define BIT_GET_BREAK_TABLE_2_8822B(x) (((x) >> BIT_SHIFT_BREAK_TABLE_2_8822B) & BIT_MASK_BREAK_TABLE_2_8822B)
+
 
 
 #define BIT_SHIFT_BREAK_TABLE_1_8822B (64 & CPU_OPT_WIDTH)
 #define BIT_MASK_BREAK_TABLE_1_8822B 0xffff
 #define BIT_BREAK_TABLE_1_8822B(x) (((x) & BIT_MASK_BREAK_TABLE_1_8822B) << BIT_SHIFT_BREAK_TABLE_1_8822B)
-#define BIT_GET_BREAK_TABLE_1_8822B(x) (((x) >> BIT_SHIFT_BREAK_TABLE_1_8822B) & BIT_MASK_BREAK_TABLE_1_8822B)

+#define BIT_GET_BREAK_TABLE_1_8822B(x) (((x) >> BIT_SHIFT_BREAK_TABLE_1_8822B) & BIT_MASK_BREAK_TABLE_1_8822B)
+
 
 
 #define BIT_SHIFT_COEX_TABLE_2_8822B (32 & CPU_OPT_WIDTH)
 #define BIT_MASK_COEX_TABLE_2_8822B 0xffffffffL
 #define BIT_COEX_TABLE_2_8822B(x) (((x) & BIT_MASK_COEX_TABLE_2_8822B) << BIT_SHIFT_COEX_TABLE_2_8822B)
-#define BIT_GET_COEX_TABLE_2_8822B(x) (((x) >> BIT_SHIFT_COEX_TABLE_2_8822B) & BIT_MASK_COEX_TABLE_2_8822B)

+#define BIT_GET_COEX_TABLE_2_8822B(x) (((x) >> BIT_SHIFT_COEX_TABLE_2_8822B) & BIT_MASK_COEX_TABLE_2_8822B)
+
 
 
 #define BIT_SHIFT_COEX_TABLE_1_8822B 0
 #define BIT_MASK_COEX_TABLE_1_8822B 0xffffffffL
 #define BIT_COEX_TABLE_1_8822B(x) (((x) & BIT_MASK_COEX_TABLE_1_8822B) << BIT_SHIFT_COEX_TABLE_1_8822B)
-#define BIT_GET_COEX_TABLE_1_8822B(x) (((x) >> BIT_SHIFT_COEX_TABLE_1_8822B) & BIT_MASK_COEX_TABLE_1_8822B)

+#define BIT_GET_COEX_TABLE_1_8822B(x) (((x) >> BIT_SHIFT_COEX_TABLE_1_8822B) & BIT_MASK_COEX_TABLE_1_8822B)
+
 
 
 /* 2 REG_RXCMD_0_8822B */
@@ -8505,7 +9373,8 @@
 #define BIT_SHIFT_RXCMD_INFO_8822B 0
 #define BIT_MASK_RXCMD_INFO_8822B 0x7fffffffL
 #define BIT_RXCMD_INFO_8822B(x) (((x) & BIT_MASK_RXCMD_INFO_8822B) << BIT_SHIFT_RXCMD_INFO_8822B)
-#define BIT_GET_RXCMD_INFO_8822B(x) (((x) >> BIT_SHIFT_RXCMD_INFO_8822B) & BIT_MASK_RXCMD_INFO_8822B)

+#define BIT_GET_RXCMD_INFO_8822B(x) (((x) >> BIT_SHIFT_RXCMD_INFO_8822B) & BIT_MASK_RXCMD_INFO_8822B)
+
 
 
 /* 2 REG_RXCMD_1_8822B */
@@ -8513,7 +9382,8 @@
 #define BIT_SHIFT_RXCMD_PRD_8822B 0
 #define BIT_MASK_RXCMD_PRD_8822B 0xffff
 #define BIT_RXCMD_PRD_8822B(x) (((x) & BIT_MASK_RXCMD_PRD_8822B) << BIT_SHIFT_RXCMD_PRD_8822B)
-#define BIT_GET_RXCMD_PRD_8822B(x) (((x) >> BIT_SHIFT_RXCMD_PRD_8822B) & BIT_MASK_RXCMD_PRD_8822B)

+#define BIT_GET_RXCMD_PRD_8822B(x) (((x) >> BIT_SHIFT_RXCMD_PRD_8822B) & BIT_MASK_RXCMD_PRD_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -8523,31 +9393,36 @@
 #define BIT_SHIFT_WMAC_RESP_MFB_8822B 25
 #define BIT_MASK_WMAC_RESP_MFB_8822B 0x7f
 #define BIT_WMAC_RESP_MFB_8822B(x) (((x) & BIT_MASK_WMAC_RESP_MFB_8822B) << BIT_SHIFT_WMAC_RESP_MFB_8822B)
-#define BIT_GET_WMAC_RESP_MFB_8822B(x) (((x) >> BIT_SHIFT_WMAC_RESP_MFB_8822B) & BIT_MASK_WMAC_RESP_MFB_8822B)

+#define BIT_GET_WMAC_RESP_MFB_8822B(x) (((x) >> BIT_SHIFT_WMAC_RESP_MFB_8822B) & BIT_MASK_WMAC_RESP_MFB_8822B)
+
 
 
 #define BIT_SHIFT_WMAC_ANTINF_SEL_8822B 23
 #define BIT_MASK_WMAC_ANTINF_SEL_8822B 0x3
 #define BIT_WMAC_ANTINF_SEL_8822B(x) (((x) & BIT_MASK_WMAC_ANTINF_SEL_8822B) << BIT_SHIFT_WMAC_ANTINF_SEL_8822B)
-#define BIT_GET_WMAC_ANTINF_SEL_8822B(x) (((x) >> BIT_SHIFT_WMAC_ANTINF_SEL_8822B) & BIT_MASK_WMAC_ANTINF_SEL_8822B)

+#define BIT_GET_WMAC_ANTINF_SEL_8822B(x) (((x) >> BIT_SHIFT_WMAC_ANTINF_SEL_8822B) & BIT_MASK_WMAC_ANTINF_SEL_8822B)
+
 
 
 #define BIT_SHIFT_WMAC_ANTSEL_SEL_8822B 21
 #define BIT_MASK_WMAC_ANTSEL_SEL_8822B 0x3
 #define BIT_WMAC_ANTSEL_SEL_8822B(x) (((x) & BIT_MASK_WMAC_ANTSEL_SEL_8822B) << BIT_SHIFT_WMAC_ANTSEL_SEL_8822B)
-#define BIT_GET_WMAC_ANTSEL_SEL_8822B(x) (((x) >> BIT_SHIFT_WMAC_ANTSEL_SEL_8822B) & BIT_MASK_WMAC_ANTSEL_SEL_8822B)

+#define BIT_GET_WMAC_ANTSEL_SEL_8822B(x) (((x) >> BIT_SHIFT_WMAC_ANTSEL_SEL_8822B) & BIT_MASK_WMAC_ANTSEL_SEL_8822B)
+
 
 
 #define BIT_SHIFT_R_WMAC_RESP_TXPOWER_8822B 18
 #define BIT_MASK_R_WMAC_RESP_TXPOWER_8822B 0x7
 #define BIT_R_WMAC_RESP_TXPOWER_8822B(x) (((x) & BIT_MASK_R_WMAC_RESP_TXPOWER_8822B) << BIT_SHIFT_R_WMAC_RESP_TXPOWER_8822B)
-#define BIT_GET_R_WMAC_RESP_TXPOWER_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_RESP_TXPOWER_8822B) & BIT_MASK_R_WMAC_RESP_TXPOWER_8822B)

+#define BIT_GET_R_WMAC_RESP_TXPOWER_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_RESP_TXPOWER_8822B) & BIT_MASK_R_WMAC_RESP_TXPOWER_8822B)
+
 
 
 #define BIT_SHIFT_WMAC_RESP_TXANT_8822B 0
 #define BIT_MASK_WMAC_RESP_TXANT_8822B 0x3ffff
 #define BIT_WMAC_RESP_TXANT_8822B(x) (((x) & BIT_MASK_WMAC_RESP_TXANT_8822B) << BIT_SHIFT_WMAC_RESP_TXANT_8822B)
-#define BIT_GET_WMAC_RESP_TXANT_8822B(x) (((x) >> BIT_SHIFT_WMAC_RESP_TXANT_8822B) & BIT_MASK_WMAC_RESP_TXANT_8822B)

+#define BIT_GET_WMAC_RESP_TXANT_8822B(x) (((x) >> BIT_SHIFT_WMAC_RESP_TXANT_8822B) & BIT_MASK_WMAC_RESP_TXANT_8822B)
+
 
 
 /* 2 REG_BBPSF_CTRL_8822B */
@@ -8557,13 +9432,15 @@
 #define BIT_SHIFT_WMAC_CSI_RATE_8822B 24
 #define BIT_MASK_WMAC_CSI_RATE_8822B 0x3f
 #define BIT_WMAC_CSI_RATE_8822B(x) (((x) & BIT_MASK_WMAC_CSI_RATE_8822B) << BIT_SHIFT_WMAC_CSI_RATE_8822B)
-#define BIT_GET_WMAC_CSI_RATE_8822B(x) (((x) >> BIT_SHIFT_WMAC_CSI_RATE_8822B) & BIT_MASK_WMAC_CSI_RATE_8822B)

+#define BIT_GET_WMAC_CSI_RATE_8822B(x) (((x) >> BIT_SHIFT_WMAC_CSI_RATE_8822B) & BIT_MASK_WMAC_CSI_RATE_8822B)
+
 
 
 #define BIT_SHIFT_WMAC_RESP_TXRATE_8822B 16
 #define BIT_MASK_WMAC_RESP_TXRATE_8822B 0xff
 #define BIT_WMAC_RESP_TXRATE_8822B(x) (((x) & BIT_MASK_WMAC_RESP_TXRATE_8822B) << BIT_SHIFT_WMAC_RESP_TXRATE_8822B)
-#define BIT_GET_WMAC_RESP_TXRATE_8822B(x) (((x) >> BIT_SHIFT_WMAC_RESP_TXRATE_8822B) & BIT_MASK_WMAC_RESP_TXRATE_8822B)

+#define BIT_GET_WMAC_RESP_TXRATE_8822B(x) (((x) >> BIT_SHIFT_WMAC_RESP_TXRATE_8822B) & BIT_MASK_WMAC_RESP_TXRATE_8822B)
+
 
 #define BIT_BBPSF_MPDUCHKEN_8822B BIT(5)
 #define BIT_BBPSF_MHCHKEN_8822B BIT(4)
@@ -8572,7 +9449,8 @@
 #define BIT_SHIFT_BBPSF_ERRTHR_8822B 0
 #define BIT_MASK_BBPSF_ERRTHR_8822B 0x7
 #define BIT_BBPSF_ERRTHR_8822B(x) (((x) & BIT_MASK_BBPSF_ERRTHR_8822B) << BIT_SHIFT_BBPSF_ERRTHR_8822B)
-#define BIT_GET_BBPSF_ERRTHR_8822B(x) (((x) >> BIT_SHIFT_BBPSF_ERRTHR_8822B) & BIT_MASK_BBPSF_ERRTHR_8822B)

+#define BIT_GET_BBPSF_ERRTHR_8822B(x) (((x) >> BIT_SHIFT_BBPSF_ERRTHR_8822B) & BIT_MASK_BBPSF_ERRTHR_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -8584,7 +9462,8 @@
 #define BIT_SHIFT_P2P_OUI_TYPE_8822B 0
 #define BIT_MASK_P2P_OUI_TYPE_8822B 0xff
 #define BIT_P2P_OUI_TYPE_8822B(x) (((x) & BIT_MASK_P2P_OUI_TYPE_8822B) << BIT_SHIFT_P2P_OUI_TYPE_8822B)
-#define BIT_GET_P2P_OUI_TYPE_8822B(x) (((x) >> BIT_SHIFT_P2P_OUI_TYPE_8822B) & BIT_MASK_P2P_OUI_TYPE_8822B)

+#define BIT_GET_P2P_OUI_TYPE_8822B(x) (((x) >> BIT_SHIFT_P2P_OUI_TYPE_8822B) & BIT_MASK_P2P_OUI_TYPE_8822B)
+
 
 
 /* 2 REG_ASSOCIATED_BFMER0_INFO_8822B (ASSOCIATED BEAMFORMER0 INFO REGISTER) */
@@ -8592,13 +9471,15 @@
 #define BIT_SHIFT_R_WMAC_TXCSI_AID0_8822B (48 & CPU_OPT_WIDTH)
 #define BIT_MASK_R_WMAC_TXCSI_AID0_8822B 0x1ff
 #define BIT_R_WMAC_TXCSI_AID0_8822B(x) (((x) & BIT_MASK_R_WMAC_TXCSI_AID0_8822B) << BIT_SHIFT_R_WMAC_TXCSI_AID0_8822B)
-#define BIT_GET_R_WMAC_TXCSI_AID0_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID0_8822B) & BIT_MASK_R_WMAC_TXCSI_AID0_8822B)

+#define BIT_GET_R_WMAC_TXCSI_AID0_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID0_8822B) & BIT_MASK_R_WMAC_TXCSI_AID0_8822B)
+
 
 
 #define BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8822B 0
 #define BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8822B 0xffffffffffffL
 #define BIT_R_WMAC_SOUNDING_RXADD_R0_8822B(x) (((x) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8822B) << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8822B)
-#define BIT_GET_R_WMAC_SOUNDING_RXADD_R0_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8822B) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8822B)

+#define BIT_GET_R_WMAC_SOUNDING_RXADD_R0_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_8822B) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_8822B)
+
 
 
 /* 2 REG_ASSOCIATED_BFMER1_INFO_8822B (ASSOCIATED BEAMFORMER1 INFO REGISTER) */
@@ -8606,13 +9487,15 @@
 #define BIT_SHIFT_R_WMAC_TXCSI_AID1_8822B (48 & CPU_OPT_WIDTH)
 #define BIT_MASK_R_WMAC_TXCSI_AID1_8822B 0x1ff
 #define BIT_R_WMAC_TXCSI_AID1_8822B(x) (((x) & BIT_MASK_R_WMAC_TXCSI_AID1_8822B) << BIT_SHIFT_R_WMAC_TXCSI_AID1_8822B)
-#define BIT_GET_R_WMAC_TXCSI_AID1_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID1_8822B) & BIT_MASK_R_WMAC_TXCSI_AID1_8822B)

+#define BIT_GET_R_WMAC_TXCSI_AID1_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID1_8822B) & BIT_MASK_R_WMAC_TXCSI_AID1_8822B)
+
 
 
 #define BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8822B 0
 #define BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8822B 0xffffffffffffL
 #define BIT_R_WMAC_SOUNDING_RXADD_R1_8822B(x) (((x) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8822B) << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8822B)
-#define BIT_GET_R_WMAC_SOUNDING_RXADD_R1_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8822B) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8822B)

+#define BIT_GET_R_WMAC_SOUNDING_RXADD_R1_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_8822B) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_8822B)
+
 
 
 /* 2 REG_TX_CSI_RPT_PARAM_BW20_8822B (TX CSI REPORT PARAMETER REGISTER) */
@@ -8620,13 +9503,15 @@
 #define BIT_SHIFT_R_WMAC_BFINFO_20M_1_8822B 16
 #define BIT_MASK_R_WMAC_BFINFO_20M_1_8822B 0xfff
 #define BIT_R_WMAC_BFINFO_20M_1_8822B(x) (((x) & BIT_MASK_R_WMAC_BFINFO_20M_1_8822B) << BIT_SHIFT_R_WMAC_BFINFO_20M_1_8822B)
-#define BIT_GET_R_WMAC_BFINFO_20M_1_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_1_8822B) & BIT_MASK_R_WMAC_BFINFO_20M_1_8822B)

+#define BIT_GET_R_WMAC_BFINFO_20M_1_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_1_8822B) & BIT_MASK_R_WMAC_BFINFO_20M_1_8822B)
+
 
 
 #define BIT_SHIFT_R_WMAC_BFINFO_20M_0_8822B 0
 #define BIT_MASK_R_WMAC_BFINFO_20M_0_8822B 0xfff
 #define BIT_R_WMAC_BFINFO_20M_0_8822B(x) (((x) & BIT_MASK_R_WMAC_BFINFO_20M_0_8822B) << BIT_SHIFT_R_WMAC_BFINFO_20M_0_8822B)
-#define BIT_GET_R_WMAC_BFINFO_20M_0_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_0_8822B) & BIT_MASK_R_WMAC_BFINFO_20M_0_8822B)

+#define BIT_GET_R_WMAC_BFINFO_20M_0_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_0_8822B) & BIT_MASK_R_WMAC_BFINFO_20M_0_8822B)
+
 
 
 /* 2 REG_TX_CSI_RPT_PARAM_BW40_8822B (TX CSI REPORT PARAMETER_BW40 REGISTER) */
@@ -8634,7 +9519,8 @@
 #define BIT_SHIFT_WMAC_RESP_ANTCD_8822B 0
 #define BIT_MASK_WMAC_RESP_ANTCD_8822B 0xf
 #define BIT_WMAC_RESP_ANTCD_8822B(x) (((x) & BIT_MASK_WMAC_RESP_ANTCD_8822B) << BIT_SHIFT_WMAC_RESP_ANTCD_8822B)
-#define BIT_GET_WMAC_RESP_ANTCD_8822B(x) (((x) >> BIT_SHIFT_WMAC_RESP_ANTCD_8822B) & BIT_MASK_WMAC_RESP_ANTCD_8822B)

+#define BIT_GET_WMAC_RESP_ANTCD_8822B(x) (((x) >> BIT_SHIFT_WMAC_RESP_ANTCD_8822B) & BIT_MASK_WMAC_RESP_ANTCD_8822B)
+
 
 
 /* 2 REG_TX_CSI_RPT_PARAM_BW80_8822B (TX CSI REPORT PARAMETER_BW80 REGISTER) */
@@ -8644,13 +9530,15 @@
 #define BIT_SHIFT_DTIM_CNT2_8822B 24
 #define BIT_MASK_DTIM_CNT2_8822B 0xff
 #define BIT_DTIM_CNT2_8822B(x) (((x) & BIT_MASK_DTIM_CNT2_8822B) << BIT_SHIFT_DTIM_CNT2_8822B)
-#define BIT_GET_DTIM_CNT2_8822B(x) (((x) >> BIT_SHIFT_DTIM_CNT2_8822B) & BIT_MASK_DTIM_CNT2_8822B)

+#define BIT_GET_DTIM_CNT2_8822B(x) (((x) >> BIT_SHIFT_DTIM_CNT2_8822B) & BIT_MASK_DTIM_CNT2_8822B)
+
 
 
 #define BIT_SHIFT_DTIM_PERIOD2_8822B 16
 #define BIT_MASK_DTIM_PERIOD2_8822B 0xff
 #define BIT_DTIM_PERIOD2_8822B(x) (((x) & BIT_MASK_DTIM_PERIOD2_8822B) << BIT_SHIFT_DTIM_PERIOD2_8822B)
-#define BIT_GET_DTIM_PERIOD2_8822B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD2_8822B) & BIT_MASK_DTIM_PERIOD2_8822B)

+#define BIT_GET_DTIM_PERIOD2_8822B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD2_8822B) & BIT_MASK_DTIM_PERIOD2_8822B)
+
 
 #define BIT_DTIM2_8822B BIT(15)
 #define BIT_TIM2_8822B BIT(14)
@@ -8658,7 +9546,8 @@
 #define BIT_SHIFT_PS_AID_2_8822B 0
 #define BIT_MASK_PS_AID_2_8822B 0x7ff
 #define BIT_PS_AID_2_8822B(x) (((x) & BIT_MASK_PS_AID_2_8822B) << BIT_SHIFT_PS_AID_2_8822B)
-#define BIT_GET_PS_AID_2_8822B(x) (((x) >> BIT_SHIFT_PS_AID_2_8822B) & BIT_MASK_PS_AID_2_8822B)

+#define BIT_GET_PS_AID_2_8822B(x) (((x) >> BIT_SHIFT_PS_AID_2_8822B) & BIT_MASK_PS_AID_2_8822B)
+
 
 
 /* 2 REG_BCN_PSR_RPT3_8822B (BEACON PARSER REPORT REGISTER3) */
@@ -8666,13 +9555,15 @@
 #define BIT_SHIFT_DTIM_CNT3_8822B 24
 #define BIT_MASK_DTIM_CNT3_8822B 0xff
 #define BIT_DTIM_CNT3_8822B(x) (((x) & BIT_MASK_DTIM_CNT3_8822B) << BIT_SHIFT_DTIM_CNT3_8822B)
-#define BIT_GET_DTIM_CNT3_8822B(x) (((x) >> BIT_SHIFT_DTIM_CNT3_8822B) & BIT_MASK_DTIM_CNT3_8822B)

+#define BIT_GET_DTIM_CNT3_8822B(x) (((x) >> BIT_SHIFT_DTIM_CNT3_8822B) & BIT_MASK_DTIM_CNT3_8822B)
+
 
 
 #define BIT_SHIFT_DTIM_PERIOD3_8822B 16
 #define BIT_MASK_DTIM_PERIOD3_8822B 0xff
 #define BIT_DTIM_PERIOD3_8822B(x) (((x) & BIT_MASK_DTIM_PERIOD3_8822B) << BIT_SHIFT_DTIM_PERIOD3_8822B)
-#define BIT_GET_DTIM_PERIOD3_8822B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD3_8822B) & BIT_MASK_DTIM_PERIOD3_8822B)

+#define BIT_GET_DTIM_PERIOD3_8822B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD3_8822B) & BIT_MASK_DTIM_PERIOD3_8822B)
+
 
 #define BIT_DTIM3_8822B BIT(15)
 #define BIT_TIM3_8822B BIT(14)
@@ -8680,7 +9571,8 @@
 #define BIT_SHIFT_PS_AID_3_8822B 0
 #define BIT_MASK_PS_AID_3_8822B 0x7ff
 #define BIT_PS_AID_3_8822B(x) (((x) & BIT_MASK_PS_AID_3_8822B) << BIT_SHIFT_PS_AID_3_8822B)
-#define BIT_GET_PS_AID_3_8822B(x) (((x) >> BIT_SHIFT_PS_AID_3_8822B) & BIT_MASK_PS_AID_3_8822B)

+#define BIT_GET_PS_AID_3_8822B(x) (((x) >> BIT_SHIFT_PS_AID_3_8822B) & BIT_MASK_PS_AID_3_8822B)
+
 
 
 /* 2 REG_BCN_PSR_RPT4_8822B (BEACON PARSER REPORT REGISTER4) */
@@ -8688,13 +9580,15 @@
 #define BIT_SHIFT_DTIM_CNT4_8822B 24
 #define BIT_MASK_DTIM_CNT4_8822B 0xff
 #define BIT_DTIM_CNT4_8822B(x) (((x) & BIT_MASK_DTIM_CNT4_8822B) << BIT_SHIFT_DTIM_CNT4_8822B)
-#define BIT_GET_DTIM_CNT4_8822B(x) (((x) >> BIT_SHIFT_DTIM_CNT4_8822B) & BIT_MASK_DTIM_CNT4_8822B)

+#define BIT_GET_DTIM_CNT4_8822B(x) (((x) >> BIT_SHIFT_DTIM_CNT4_8822B) & BIT_MASK_DTIM_CNT4_8822B)
+
 
 
 #define BIT_SHIFT_DTIM_PERIOD4_8822B 16
 #define BIT_MASK_DTIM_PERIOD4_8822B 0xff
 #define BIT_DTIM_PERIOD4_8822B(x) (((x) & BIT_MASK_DTIM_PERIOD4_8822B) << BIT_SHIFT_DTIM_PERIOD4_8822B)
-#define BIT_GET_DTIM_PERIOD4_8822B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD4_8822B) & BIT_MASK_DTIM_PERIOD4_8822B)

+#define BIT_GET_DTIM_PERIOD4_8822B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD4_8822B) & BIT_MASK_DTIM_PERIOD4_8822B)
+
 
 #define BIT_DTIM4_8822B BIT(15)
 #define BIT_TIM4_8822B BIT(14)
@@ -8702,7 +9596,8 @@
 #define BIT_SHIFT_PS_AID_4_8822B 0
 #define BIT_MASK_PS_AID_4_8822B 0x7ff
 #define BIT_PS_AID_4_8822B(x) (((x) & BIT_MASK_PS_AID_4_8822B) << BIT_SHIFT_PS_AID_4_8822B)
-#define BIT_GET_PS_AID_4_8822B(x) (((x) >> BIT_SHIFT_PS_AID_4_8822B) & BIT_MASK_PS_AID_4_8822B)

+#define BIT_GET_PS_AID_4_8822B(x) (((x) >> BIT_SHIFT_PS_AID_4_8822B) & BIT_MASK_PS_AID_4_8822B)
+
 
 
 /* 2 REG_A1_ADDR_MASK_8822B (A1 ADDR MASK REGISTER) */
@@ -8710,7 +9605,8 @@
 #define BIT_SHIFT_A1_ADDR_MASK_8822B 0
 #define BIT_MASK_A1_ADDR_MASK_8822B 0xffffffffL
 #define BIT_A1_ADDR_MASK_8822B(x) (((x) & BIT_MASK_A1_ADDR_MASK_8822B) << BIT_SHIFT_A1_ADDR_MASK_8822B)
-#define BIT_GET_A1_ADDR_MASK_8822B(x) (((x) >> BIT_SHIFT_A1_ADDR_MASK_8822B) & BIT_MASK_A1_ADDR_MASK_8822B)

+#define BIT_GET_A1_ADDR_MASK_8822B(x) (((x) >> BIT_SHIFT_A1_ADDR_MASK_8822B) & BIT_MASK_A1_ADDR_MASK_8822B)
+
 
 
 /* 2 REG_MACID2_8822B (MAC ID2 REGISTER) */
@@ -8718,7 +9614,8 @@
 #define BIT_SHIFT_MACID2_8822B 0
 #define BIT_MASK_MACID2_8822B 0xffffffffffffL
 #define BIT_MACID2_8822B(x) (((x) & BIT_MASK_MACID2_8822B) << BIT_SHIFT_MACID2_8822B)
-#define BIT_GET_MACID2_8822B(x) (((x) >> BIT_SHIFT_MACID2_8822B) & BIT_MASK_MACID2_8822B)

+#define BIT_GET_MACID2_8822B(x) (((x) >> BIT_SHIFT_MACID2_8822B) & BIT_MASK_MACID2_8822B)
+
 
 
 /* 2 REG_BSSID2_8822B (BSSID2 REGISTER) */
@@ -8726,7 +9623,8 @@
 #define BIT_SHIFT_BSSID2_8822B 0
 #define BIT_MASK_BSSID2_8822B 0xffffffffffffL
 #define BIT_BSSID2_8822B(x) (((x) & BIT_MASK_BSSID2_8822B) << BIT_SHIFT_BSSID2_8822B)
-#define BIT_GET_BSSID2_8822B(x) (((x) >> BIT_SHIFT_BSSID2_8822B) & BIT_MASK_BSSID2_8822B)

+#define BIT_GET_BSSID2_8822B(x) (((x) >> BIT_SHIFT_BSSID2_8822B) & BIT_MASK_BSSID2_8822B)
+
 
 
 /* 2 REG_MACID3_8822B (MAC ID3 REGISTER) */
@@ -8734,7 +9632,8 @@
 #define BIT_SHIFT_MACID3_8822B 0
 #define BIT_MASK_MACID3_8822B 0xffffffffffffL
 #define BIT_MACID3_8822B(x) (((x) & BIT_MASK_MACID3_8822B) << BIT_SHIFT_MACID3_8822B)
-#define BIT_GET_MACID3_8822B(x) (((x) >> BIT_SHIFT_MACID3_8822B) & BIT_MASK_MACID3_8822B)

+#define BIT_GET_MACID3_8822B(x) (((x) >> BIT_SHIFT_MACID3_8822B) & BIT_MASK_MACID3_8822B)
+
 
 
 /* 2 REG_BSSID3_8822B (BSSID3 REGISTER) */
@@ -8742,7 +9641,8 @@
 #define BIT_SHIFT_BSSID3_8822B 0
 #define BIT_MASK_BSSID3_8822B 0xffffffffffffL
 #define BIT_BSSID3_8822B(x) (((x) & BIT_MASK_BSSID3_8822B) << BIT_SHIFT_BSSID3_8822B)
-#define BIT_GET_BSSID3_8822B(x) (((x) >> BIT_SHIFT_BSSID3_8822B) & BIT_MASK_BSSID3_8822B)

+#define BIT_GET_BSSID3_8822B(x) (((x) >> BIT_SHIFT_BSSID3_8822B) & BIT_MASK_BSSID3_8822B)
+
 
 
 /* 2 REG_MACID4_8822B (MAC ID4 REGISTER) */
@@ -8750,7 +9650,8 @@
 #define BIT_SHIFT_MACID4_8822B 0
 #define BIT_MASK_MACID4_8822B 0xffffffffffffL
 #define BIT_MACID4_8822B(x) (((x) & BIT_MASK_MACID4_8822B) << BIT_SHIFT_MACID4_8822B)
-#define BIT_GET_MACID4_8822B(x) (((x) >> BIT_SHIFT_MACID4_8822B) & BIT_MASK_MACID4_8822B)

+#define BIT_GET_MACID4_8822B(x) (((x) >> BIT_SHIFT_MACID4_8822B) & BIT_MASK_MACID4_8822B)
+
 
 
 /* 2 REG_BSSID4_8822B (BSSID4 REGISTER) */
@@ -8758,7 +9659,8 @@
 #define BIT_SHIFT_BSSID4_8822B 0
 #define BIT_MASK_BSSID4_8822B 0xffffffffffffL
 #define BIT_BSSID4_8822B(x) (((x) & BIT_MASK_BSSID4_8822B) << BIT_SHIFT_BSSID4_8822B)
-#define BIT_GET_BSSID4_8822B(x) (((x) >> BIT_SHIFT_BSSID4_8822B) & BIT_MASK_BSSID4_8822B)

+#define BIT_GET_BSSID4_8822B(x) (((x) >> BIT_SHIFT_BSSID4_8822B) & BIT_MASK_BSSID4_8822B)
+
 
 
 /* 2 REG_NOA_REPORT_8822B */
@@ -8780,13 +9682,15 @@
 #define BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8822B 4
 #define BIT_MASK_WMAC_TXMU_ACKPOLICY_8822B 0x3
 #define BIT_WMAC_TXMU_ACKPOLICY_8822B(x) (((x) & BIT_MASK_WMAC_TXMU_ACKPOLICY_8822B) << BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8822B)
-#define BIT_GET_WMAC_TXMU_ACKPOLICY_8822B(x) (((x) >> BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8822B) & BIT_MASK_WMAC_TXMU_ACKPOLICY_8822B)

+#define BIT_GET_WMAC_TXMU_ACKPOLICY_8822B(x) (((x) >> BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8822B) & BIT_MASK_WMAC_TXMU_ACKPOLICY_8822B)
+
 
 
 #define BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8822B 1
 #define BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8822B 0x7
 #define BIT_WMAC_MU_BFEE_PORT_SEL_8822B(x) (((x) & BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8822B) << BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8822B)
-#define BIT_GET_WMAC_MU_BFEE_PORT_SEL_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8822B) & BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8822B)

+#define BIT_GET_WMAC_MU_BFEE_PORT_SEL_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8822B) & BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8822B)
+
 
 #define BIT_WMAC_MU_BFEE_DIS_8822B BIT(0)
 
@@ -8795,7 +9699,8 @@
 #define BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8822B 0
 #define BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8822B 0xff
 #define BIT_WMAC_PAUSE_BB_CLR_TH_8822B(x) (((x) & BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8822B) << BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8822B)
-#define BIT_GET_WMAC_PAUSE_BB_CLR_TH_8822B(x) (((x) >> BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8822B) & BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8822B)

+#define BIT_GET_WMAC_PAUSE_BB_CLR_TH_8822B(x) (((x) >> BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8822B) & BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8822B)
+
 
 
 /* 2 REG_WMAC_MU_ARB_8822B */
@@ -8805,7 +9710,8 @@
 #define BIT_SHIFT_WMAC_ARB_SW_STATE_8822B 0
 #define BIT_MASK_WMAC_ARB_SW_STATE_8822B 0x3f
 #define BIT_WMAC_ARB_SW_STATE_8822B(x) (((x) & BIT_MASK_WMAC_ARB_SW_STATE_8822B) << BIT_SHIFT_WMAC_ARB_SW_STATE_8822B)
-#define BIT_GET_WMAC_ARB_SW_STATE_8822B(x) (((x) >> BIT_SHIFT_WMAC_ARB_SW_STATE_8822B) & BIT_MASK_WMAC_ARB_SW_STATE_8822B)

+#define BIT_GET_WMAC_ARB_SW_STATE_8822B(x) (((x) >> BIT_SHIFT_WMAC_ARB_SW_STATE_8822B) & BIT_MASK_WMAC_ARB_SW_STATE_8822B)
+
 
 
 /* 2 REG_WMAC_MU_OPTION_8822B */
@@ -8813,13 +9719,15 @@
 #define BIT_SHIFT_WMAC_MU_DBGSEL_8822B 5
 #define BIT_MASK_WMAC_MU_DBGSEL_8822B 0x3
 #define BIT_WMAC_MU_DBGSEL_8822B(x) (((x) & BIT_MASK_WMAC_MU_DBGSEL_8822B) << BIT_SHIFT_WMAC_MU_DBGSEL_8822B)
-#define BIT_GET_WMAC_MU_DBGSEL_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_DBGSEL_8822B) & BIT_MASK_WMAC_MU_DBGSEL_8822B)

+#define BIT_GET_WMAC_MU_DBGSEL_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_DBGSEL_8822B) & BIT_MASK_WMAC_MU_DBGSEL_8822B)
+
 
 
 #define BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8822B 0
 #define BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8822B 0x1f
 #define BIT_WMAC_MU_CPRD_TIMEOUT_8822B(x) (((x) & BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8822B) << BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8822B)
-#define BIT_GET_WMAC_MU_CPRD_TIMEOUT_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8822B) & BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8822B)

+#define BIT_GET_WMAC_MU_CPRD_TIMEOUT_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8822B) & BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8822B)
+
 
 
 /* 2 REG_WMAC_MU_BF_CTL_8822B */
@@ -8829,13 +9737,15 @@
 #define BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8822B 12
 #define BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8822B 0x3
 #define BIT_WMAC_MU_BFRPTSEG_SEL_8822B(x) (((x) & BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8822B) << BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8822B)
-#define BIT_GET_WMAC_MU_BFRPTSEG_SEL_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8822B) & BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8822B)

+#define BIT_GET_WMAC_MU_BFRPTSEG_SEL_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8822B) & BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8822B)
+
 
 
 #define BIT_SHIFT_WMAC_MU_BF_MYAID_8822B 0
 #define BIT_MASK_WMAC_MU_BF_MYAID_8822B 0xfff
 #define BIT_WMAC_MU_BF_MYAID_8822B(x) (((x) & BIT_MASK_WMAC_MU_BF_MYAID_8822B) << BIT_SHIFT_WMAC_MU_BF_MYAID_8822B)
-#define BIT_GET_WMAC_MU_BF_MYAID_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_BF_MYAID_8822B) & BIT_MASK_WMAC_MU_BF_MYAID_8822B)

+#define BIT_GET_WMAC_MU_BF_MYAID_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_BF_MYAID_8822B) & BIT_MASK_WMAC_MU_BF_MYAID_8822B)
+
 
 
 /* 2 REG_WMAC_MU_BFRPT_PARA_8822B */
@@ -8843,13 +9753,15 @@
 #define BIT_SHIFT_BIT_BFRPT_PARA_USERID_SEL_8822B 12
 #define BIT_MASK_BIT_BFRPT_PARA_USERID_SEL_8822B 0x7
 #define BIT_BIT_BFRPT_PARA_USERID_SEL_8822B(x) (((x) & BIT_MASK_BIT_BFRPT_PARA_USERID_SEL_8822B) << BIT_SHIFT_BIT_BFRPT_PARA_USERID_SEL_8822B)
-#define BIT_GET_BIT_BFRPT_PARA_USERID_SEL_8822B(x) (((x) >> BIT_SHIFT_BIT_BFRPT_PARA_USERID_SEL_8822B) & BIT_MASK_BIT_BFRPT_PARA_USERID_SEL_8822B)

+#define BIT_GET_BIT_BFRPT_PARA_USERID_SEL_8822B(x) (((x) >> BIT_SHIFT_BIT_BFRPT_PARA_USERID_SEL_8822B) & BIT_MASK_BIT_BFRPT_PARA_USERID_SEL_8822B)
+
 
 
 #define BIT_SHIFT_BFRPT_PARA_8822B 0
 #define BIT_MASK_BFRPT_PARA_8822B 0xfff
 #define BIT_BFRPT_PARA_8822B(x) (((x) & BIT_MASK_BFRPT_PARA_8822B) << BIT_SHIFT_BFRPT_PARA_8822B)
-#define BIT_GET_BFRPT_PARA_8822B(x) (((x) >> BIT_SHIFT_BFRPT_PARA_8822B) & BIT_MASK_BFRPT_PARA_8822B)

+#define BIT_GET_BFRPT_PARA_8822B(x) (((x) >> BIT_SHIFT_BFRPT_PARA_8822B) & BIT_MASK_BFRPT_PARA_8822B)
+
 
 
 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE2_8822B */
@@ -8859,7 +9771,8 @@
 #define BIT_SHIFT_WMAC_MU_BFEE2_AID_8822B 0
 #define BIT_MASK_WMAC_MU_BFEE2_AID_8822B 0x1ff
 #define BIT_WMAC_MU_BFEE2_AID_8822B(x) (((x) & BIT_MASK_WMAC_MU_BFEE2_AID_8822B) << BIT_SHIFT_WMAC_MU_BFEE2_AID_8822B)
-#define BIT_GET_WMAC_MU_BFEE2_AID_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE2_AID_8822B) & BIT_MASK_WMAC_MU_BFEE2_AID_8822B)

+#define BIT_GET_WMAC_MU_BFEE2_AID_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE2_AID_8822B) & BIT_MASK_WMAC_MU_BFEE2_AID_8822B)
+
 
 
 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE3_8822B */
@@ -8869,7 +9782,8 @@
 #define BIT_SHIFT_WMAC_MU_BFEE3_AID_8822B 0
 #define BIT_MASK_WMAC_MU_BFEE3_AID_8822B 0x1ff
 #define BIT_WMAC_MU_BFEE3_AID_8822B(x) (((x) & BIT_MASK_WMAC_MU_BFEE3_AID_8822B) << BIT_SHIFT_WMAC_MU_BFEE3_AID_8822B)
-#define BIT_GET_WMAC_MU_BFEE3_AID_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE3_AID_8822B) & BIT_MASK_WMAC_MU_BFEE3_AID_8822B)

+#define BIT_GET_WMAC_MU_BFEE3_AID_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE3_AID_8822B) & BIT_MASK_WMAC_MU_BFEE3_AID_8822B)
+
 
 
 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE4_8822B */
@@ -8879,7 +9793,8 @@
 #define BIT_SHIFT_WMAC_MU_BFEE4_AID_8822B 0
 #define BIT_MASK_WMAC_MU_BFEE4_AID_8822B 0x1ff
 #define BIT_WMAC_MU_BFEE4_AID_8822B(x) (((x) & BIT_MASK_WMAC_MU_BFEE4_AID_8822B) << BIT_SHIFT_WMAC_MU_BFEE4_AID_8822B)
-#define BIT_GET_WMAC_MU_BFEE4_AID_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE4_AID_8822B) & BIT_MASK_WMAC_MU_BFEE4_AID_8822B)

+#define BIT_GET_WMAC_MU_BFEE4_AID_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE4_AID_8822B) & BIT_MASK_WMAC_MU_BFEE4_AID_8822B)
+
 
 
 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE5_8822B */
@@ -8889,7 +9804,8 @@
 #define BIT_SHIFT_WMAC_MU_BFEE5_AID_8822B 0
 #define BIT_MASK_WMAC_MU_BFEE5_AID_8822B 0x1ff
 #define BIT_WMAC_MU_BFEE5_AID_8822B(x) (((x) & BIT_MASK_WMAC_MU_BFEE5_AID_8822B) << BIT_SHIFT_WMAC_MU_BFEE5_AID_8822B)
-#define BIT_GET_WMAC_MU_BFEE5_AID_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE5_AID_8822B) & BIT_MASK_WMAC_MU_BFEE5_AID_8822B)

+#define BIT_GET_WMAC_MU_BFEE5_AID_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE5_AID_8822B) & BIT_MASK_WMAC_MU_BFEE5_AID_8822B)
+
 
 
 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE6_8822B */
@@ -8899,7 +9815,8 @@
 #define BIT_SHIFT_WMAC_MU_BFEE6_AID_8822B 0
 #define BIT_MASK_WMAC_MU_BFEE6_AID_8822B 0x1ff
 #define BIT_WMAC_MU_BFEE6_AID_8822B(x) (((x) & BIT_MASK_WMAC_MU_BFEE6_AID_8822B) << BIT_SHIFT_WMAC_MU_BFEE6_AID_8822B)
-#define BIT_GET_WMAC_MU_BFEE6_AID_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE6_AID_8822B) & BIT_MASK_WMAC_MU_BFEE6_AID_8822B)

+#define BIT_GET_WMAC_MU_BFEE6_AID_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE6_AID_8822B) & BIT_MASK_WMAC_MU_BFEE6_AID_8822B)
+
 
 
 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE7_8822B */
@@ -8909,7 +9826,8 @@
 #define BIT_SHIFT_WMAC_MU_BFEE7_AID_8822B 0
 #define BIT_MASK_WMAC_MU_BFEE7_AID_8822B 0x1ff
 #define BIT_WMAC_MU_BFEE7_AID_8822B(x) (((x) & BIT_MASK_WMAC_MU_BFEE7_AID_8822B) << BIT_SHIFT_WMAC_MU_BFEE7_AID_8822B)
-#define BIT_GET_WMAC_MU_BFEE7_AID_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE7_AID_8822B) & BIT_MASK_WMAC_MU_BFEE7_AID_8822B)

+#define BIT_GET_WMAC_MU_BFEE7_AID_8822B(x) (((x) >> BIT_SHIFT_WMAC_MU_BFEE7_AID_8822B) & BIT_MASK_WMAC_MU_BFEE7_AID_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -8918,19 +9836,22 @@
 #define BIT_SHIFT_ABORT_RX_VBON_COUNTER_8822B 16
 #define BIT_MASK_ABORT_RX_VBON_COUNTER_8822B 0xff
 #define BIT_ABORT_RX_VBON_COUNTER_8822B(x) (((x) & BIT_MASK_ABORT_RX_VBON_COUNTER_8822B) << BIT_SHIFT_ABORT_RX_VBON_COUNTER_8822B)
-#define BIT_GET_ABORT_RX_VBON_COUNTER_8822B(x) (((x) >> BIT_SHIFT_ABORT_RX_VBON_COUNTER_8822B) & BIT_MASK_ABORT_RX_VBON_COUNTER_8822B)

+#define BIT_GET_ABORT_RX_VBON_COUNTER_8822B(x) (((x) >> BIT_SHIFT_ABORT_RX_VBON_COUNTER_8822B) & BIT_MASK_ABORT_RX_VBON_COUNTER_8822B)
+
 
 
 #define BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8822B 8
 #define BIT_MASK_ABORT_RX_RDRDY_COUNTER_8822B 0xff
 #define BIT_ABORT_RX_RDRDY_COUNTER_8822B(x) (((x) & BIT_MASK_ABORT_RX_RDRDY_COUNTER_8822B) << BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8822B)
-#define BIT_GET_ABORT_RX_RDRDY_COUNTER_8822B(x) (((x) >> BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8822B) & BIT_MASK_ABORT_RX_RDRDY_COUNTER_8822B)

+#define BIT_GET_ABORT_RX_RDRDY_COUNTER_8822B(x) (((x) >> BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8822B) & BIT_MASK_ABORT_RX_RDRDY_COUNTER_8822B)
+
 
 
 #define BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8822B 0
 #define BIT_MASK_VBON_EARLY_FALLING_COUNTER_8822B 0xff
 #define BIT_VBON_EARLY_FALLING_COUNTER_8822B(x) (((x) & BIT_MASK_VBON_EARLY_FALLING_COUNTER_8822B) << BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8822B)
-#define BIT_GET_VBON_EARLY_FALLING_COUNTER_8822B(x) (((x) >> BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8822B) & BIT_MASK_VBON_EARLY_FALLING_COUNTER_8822B)

+#define BIT_GET_VBON_EARLY_FALLING_COUNTER_8822B(x) (((x) >> BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8822B) & BIT_MASK_VBON_EARLY_FALLING_COUNTER_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -8939,19 +9860,22 @@
 #define BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8822B 28
 #define BIT_MASK_WMAC_PLCP_RDSIG_SEL_8822B 0x7
 #define BIT_WMAC_PLCP_RDSIG_SEL_8822B(x) (((x) & BIT_MASK_WMAC_PLCP_RDSIG_SEL_8822B) << BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8822B)
-#define BIT_GET_WMAC_PLCP_RDSIG_SEL_8822B(x) (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8822B) & BIT_MASK_WMAC_PLCP_RDSIG_SEL_8822B)

+#define BIT_GET_WMAC_PLCP_RDSIG_SEL_8822B(x) (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8822B) & BIT_MASK_WMAC_PLCP_RDSIG_SEL_8822B)
+
 
 
 #define BIT_SHIFT_WMAC_RATE_IDX_8822B 24
 #define BIT_MASK_WMAC_RATE_IDX_8822B 0xf
 #define BIT_WMAC_RATE_IDX_8822B(x) (((x) & BIT_MASK_WMAC_RATE_IDX_8822B) << BIT_SHIFT_WMAC_RATE_IDX_8822B)
-#define BIT_GET_WMAC_RATE_IDX_8822B(x) (((x) >> BIT_SHIFT_WMAC_RATE_IDX_8822B) & BIT_MASK_WMAC_RATE_IDX_8822B)

+#define BIT_GET_WMAC_RATE_IDX_8822B(x) (((x) >> BIT_SHIFT_WMAC_RATE_IDX_8822B) & BIT_MASK_WMAC_RATE_IDX_8822B)
+
 
 
 #define BIT_SHIFT_WMAC_PLCP_RDSIG_8822B 0
 #define BIT_MASK_WMAC_PLCP_RDSIG_8822B 0xffffff
 #define BIT_WMAC_PLCP_RDSIG_8822B(x) (((x) & BIT_MASK_WMAC_PLCP_RDSIG_8822B) << BIT_SHIFT_WMAC_PLCP_RDSIG_8822B)
-#define BIT_GET_WMAC_PLCP_RDSIG_8822B(x) (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_8822B) & BIT_MASK_WMAC_PLCP_RDSIG_8822B)

+#define BIT_GET_WMAC_PLCP_RDSIG_8822B(x) (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_8822B) & BIT_MASK_WMAC_PLCP_RDSIG_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -8960,7 +9884,8 @@
 #define BIT_SHIFT_WMAC_PLCP_RDSIG_8822B 0
 #define BIT_MASK_WMAC_PLCP_RDSIG_8822B 0xffffff
 #define BIT_WMAC_PLCP_RDSIG_8822B(x) (((x) & BIT_MASK_WMAC_PLCP_RDSIG_8822B) << BIT_SHIFT_WMAC_PLCP_RDSIG_8822B)
-#define BIT_GET_WMAC_PLCP_RDSIG_8822B(x) (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_8822B) & BIT_MASK_WMAC_PLCP_RDSIG_8822B)

+#define BIT_GET_WMAC_PLCP_RDSIG_8822B(x) (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_8822B) & BIT_MASK_WMAC_PLCP_RDSIG_8822B)
+
 
 
 /* 2 REG_TRANSMIT_ADDRSS_0_8822B (TA0 REGISTER) */
@@ -8968,7 +9893,8 @@
 #define BIT_SHIFT_TA0_8822B 0
 #define BIT_MASK_TA0_8822B 0xffffffffffffL
 #define BIT_TA0_8822B(x) (((x) & BIT_MASK_TA0_8822B) << BIT_SHIFT_TA0_8822B)
-#define BIT_GET_TA0_8822B(x) (((x) >> BIT_SHIFT_TA0_8822B) & BIT_MASK_TA0_8822B)

+#define BIT_GET_TA0_8822B(x) (((x) >> BIT_SHIFT_TA0_8822B) & BIT_MASK_TA0_8822B)
+
 
 
 /* 2 REG_TRANSMIT_ADDRSS_1_8822B (TA1 REGISTER) */
@@ -8976,7 +9902,8 @@
 #define BIT_SHIFT_TA1_8822B 0
 #define BIT_MASK_TA1_8822B 0xffffffffffffL
 #define BIT_TA1_8822B(x) (((x) & BIT_MASK_TA1_8822B) << BIT_SHIFT_TA1_8822B)
-#define BIT_GET_TA1_8822B(x) (((x) >> BIT_SHIFT_TA1_8822B) & BIT_MASK_TA1_8822B)

+#define BIT_GET_TA1_8822B(x) (((x) >> BIT_SHIFT_TA1_8822B) & BIT_MASK_TA1_8822B)
+
 
 
 /* 2 REG_TRANSMIT_ADDRSS_2_8822B (TA2 REGISTER) */
@@ -8984,7 +9911,8 @@
 #define BIT_SHIFT_TA2_8822B 0
 #define BIT_MASK_TA2_8822B 0xffffffffffffL
 #define BIT_TA2_8822B(x) (((x) & BIT_MASK_TA2_8822B) << BIT_SHIFT_TA2_8822B)
-#define BIT_GET_TA2_8822B(x) (((x) >> BIT_SHIFT_TA2_8822B) & BIT_MASK_TA2_8822B)

+#define BIT_GET_TA2_8822B(x) (((x) >> BIT_SHIFT_TA2_8822B) & BIT_MASK_TA2_8822B)
+
 
 
 /* 2 REG_TRANSMIT_ADDRSS_3_8822B (TA3 REGISTER) */
@@ -8992,7 +9920,8 @@
 #define BIT_SHIFT_TA3_8822B 0
 #define BIT_MASK_TA3_8822B 0xffffffffffffL
 #define BIT_TA3_8822B(x) (((x) & BIT_MASK_TA3_8822B) << BIT_SHIFT_TA3_8822B)
-#define BIT_GET_TA3_8822B(x) (((x) >> BIT_SHIFT_TA3_8822B) & BIT_MASK_TA3_8822B)

+#define BIT_GET_TA3_8822B(x) (((x) >> BIT_SHIFT_TA3_8822B) & BIT_MASK_TA3_8822B)
+
 
 
 /* 2 REG_TRANSMIT_ADDRSS_4_8822B (TA4 REGISTER) */
@@ -9000,7 +9929,8 @@
 #define BIT_SHIFT_TA4_8822B 0
 #define BIT_MASK_TA4_8822B 0xffffffffffffL
 #define BIT_TA4_8822B(x) (((x) & BIT_MASK_TA4_8822B) << BIT_SHIFT_TA4_8822B)
-#define BIT_GET_TA4_8822B(x) (((x) >> BIT_SHIFT_TA4_8822B) & BIT_MASK_TA4_8822B)

+#define BIT_GET_TA4_8822B(x) (((x) >> BIT_SHIFT_TA4_8822B) & BIT_MASK_TA4_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -9010,7 +9940,8 @@
 #define BIT_SHIFT_MACID1_8822B 0
 #define BIT_MASK_MACID1_8822B 0xffffffffffffL
 #define BIT_MACID1_8822B(x) (((x) & BIT_MASK_MACID1_8822B) << BIT_SHIFT_MACID1_8822B)
-#define BIT_GET_MACID1_8822B(x) (((x) >> BIT_SHIFT_MACID1_8822B) & BIT_MASK_MACID1_8822B)

+#define BIT_GET_MACID1_8822B(x) (((x) >> BIT_SHIFT_MACID1_8822B) & BIT_MASK_MACID1_8822B)
+
 
 
 /* 2 REG_BSSID1_8822B */
@@ -9018,7 +9949,8 @@
 #define BIT_SHIFT_BSSID1_8822B 0
 #define BIT_MASK_BSSID1_8822B 0xffffffffffffL
 #define BIT_BSSID1_8822B(x) (((x) & BIT_MASK_BSSID1_8822B) << BIT_SHIFT_BSSID1_8822B)
-#define BIT_GET_BSSID1_8822B(x) (((x) >> BIT_SHIFT_BSSID1_8822B) & BIT_MASK_BSSID1_8822B)

+#define BIT_GET_BSSID1_8822B(x) (((x) >> BIT_SHIFT_BSSID1_8822B) & BIT_MASK_BSSID1_8822B)
+
 
 
 /* 2 REG_BCN_PSR_RPT1_8822B */
@@ -9026,13 +9958,15 @@
 #define BIT_SHIFT_DTIM_CNT1_8822B 24
 #define BIT_MASK_DTIM_CNT1_8822B 0xff
 #define BIT_DTIM_CNT1_8822B(x) (((x) & BIT_MASK_DTIM_CNT1_8822B) << BIT_SHIFT_DTIM_CNT1_8822B)
-#define BIT_GET_DTIM_CNT1_8822B(x) (((x) >> BIT_SHIFT_DTIM_CNT1_8822B) & BIT_MASK_DTIM_CNT1_8822B)

+#define BIT_GET_DTIM_CNT1_8822B(x) (((x) >> BIT_SHIFT_DTIM_CNT1_8822B) & BIT_MASK_DTIM_CNT1_8822B)
+
 
 
 #define BIT_SHIFT_DTIM_PERIOD1_8822B 16
 #define BIT_MASK_DTIM_PERIOD1_8822B 0xff
 #define BIT_DTIM_PERIOD1_8822B(x) (((x) & BIT_MASK_DTIM_PERIOD1_8822B) << BIT_SHIFT_DTIM_PERIOD1_8822B)
-#define BIT_GET_DTIM_PERIOD1_8822B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD1_8822B) & BIT_MASK_DTIM_PERIOD1_8822B)

+#define BIT_GET_DTIM_PERIOD1_8822B(x) (((x) >> BIT_SHIFT_DTIM_PERIOD1_8822B) & BIT_MASK_DTIM_PERIOD1_8822B)
+
 
 #define BIT_DTIM1_8822B BIT(15)
 #define BIT_TIM1_8822B BIT(14)
@@ -9040,7 +9974,8 @@
 #define BIT_SHIFT_PS_AID_1_8822B 0
 #define BIT_MASK_PS_AID_1_8822B 0x7ff
 #define BIT_PS_AID_1_8822B(x) (((x) & BIT_MASK_PS_AID_1_8822B) << BIT_SHIFT_PS_AID_1_8822B)
-#define BIT_GET_PS_AID_1_8822B(x) (((x) >> BIT_SHIFT_PS_AID_1_8822B) & BIT_MASK_PS_AID_1_8822B)

+#define BIT_GET_PS_AID_1_8822B(x) (((x) >> BIT_SHIFT_PS_AID_1_8822B) & BIT_MASK_PS_AID_1_8822B)
+
 
 
 /* 2 REG_ASSOCIATED_BFMEE_SEL_8822B */
@@ -9049,14 +9984,16 @@
 #define BIT_SHIFT_AID1_8822B 16
 #define BIT_MASK_AID1_8822B 0x1ff
 #define BIT_AID1_8822B(x) (((x) & BIT_MASK_AID1_8822B) << BIT_SHIFT_AID1_8822B)
-#define BIT_GET_AID1_8822B(x) (((x) >> BIT_SHIFT_AID1_8822B) & BIT_MASK_AID1_8822B)

+#define BIT_GET_AID1_8822B(x) (((x) >> BIT_SHIFT_AID1_8822B) & BIT_MASK_AID1_8822B)
+
 
 #define BIT_TXUSER_ID0_8822B BIT(9)
 
 #define BIT_SHIFT_AID0_8822B 0
 #define BIT_MASK_AID0_8822B 0x1ff
 #define BIT_AID0_8822B(x) (((x) & BIT_MASK_AID0_8822B) << BIT_SHIFT_AID0_8822B)
-#define BIT_GET_AID0_8822B(x) (((x) >> BIT_SHIFT_AID0_8822B) & BIT_MASK_AID0_8822B)

+#define BIT_GET_AID0_8822B(x) (((x) >> BIT_SHIFT_AID0_8822B) & BIT_MASK_AID0_8822B)
+
 
 
 /* 2 REG_SND_PTCL_CTRL_8822B */
@@ -9064,19 +10001,22 @@
 #define BIT_SHIFT_NDP_RX_STANDBY_TIMER_8822B 24
 #define BIT_MASK_NDP_RX_STANDBY_TIMER_8822B 0xff
 #define BIT_NDP_RX_STANDBY_TIMER_8822B(x) (((x) & BIT_MASK_NDP_RX_STANDBY_TIMER_8822B) << BIT_SHIFT_NDP_RX_STANDBY_TIMER_8822B)
-#define BIT_GET_NDP_RX_STANDBY_TIMER_8822B(x) (((x) >> BIT_SHIFT_NDP_RX_STANDBY_TIMER_8822B) & BIT_MASK_NDP_RX_STANDBY_TIMER_8822B)

+#define BIT_GET_NDP_RX_STANDBY_TIMER_8822B(x) (((x) >> BIT_SHIFT_NDP_RX_STANDBY_TIMER_8822B) & BIT_MASK_NDP_RX_STANDBY_TIMER_8822B)
+
 
 
 #define BIT_SHIFT_CSI_RPT_OFFSET_HT_8822B 16
 #define BIT_MASK_CSI_RPT_OFFSET_HT_8822B 0xff
 #define BIT_CSI_RPT_OFFSET_HT_8822B(x) (((x) & BIT_MASK_CSI_RPT_OFFSET_HT_8822B) << BIT_SHIFT_CSI_RPT_OFFSET_HT_8822B)
-#define BIT_GET_CSI_RPT_OFFSET_HT_8822B(x) (((x) >> BIT_SHIFT_CSI_RPT_OFFSET_HT_8822B) & BIT_MASK_CSI_RPT_OFFSET_HT_8822B)

+#define BIT_GET_CSI_RPT_OFFSET_HT_8822B(x) (((x) >> BIT_SHIFT_CSI_RPT_OFFSET_HT_8822B) & BIT_MASK_CSI_RPT_OFFSET_HT_8822B)
+
 
 
 #define BIT_SHIFT_R_WMAC_VHT_CATEGORY_8822B 8
 #define BIT_MASK_R_WMAC_VHT_CATEGORY_8822B 0xff
 #define BIT_R_WMAC_VHT_CATEGORY_8822B(x) (((x) & BIT_MASK_R_WMAC_VHT_CATEGORY_8822B) << BIT_SHIFT_R_WMAC_VHT_CATEGORY_8822B)
-#define BIT_GET_R_WMAC_VHT_CATEGORY_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_VHT_CATEGORY_8822B) & BIT_MASK_R_WMAC_VHT_CATEGORY_8822B)

+#define BIT_GET_R_WMAC_VHT_CATEGORY_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_VHT_CATEGORY_8822B) & BIT_MASK_R_WMAC_VHT_CATEGORY_8822B)
+
 
 #define BIT_R_WMAC_USE_NSTS_8822B BIT(7)
 #define BIT_R_DISABLE_CHECK_VHTSIGB_CRC_8822B BIT(6)
@@ -9097,19 +10037,22 @@
 #define BIT_SHIFT_R_WMAC_NSARP_MODEN_8822B 6
 #define BIT_MASK_R_WMAC_NSARP_MODEN_8822B 0x3
 #define BIT_R_WMAC_NSARP_MODEN_8822B(x) (((x) & BIT_MASK_R_WMAC_NSARP_MODEN_8822B) << BIT_SHIFT_R_WMAC_NSARP_MODEN_8822B)
-#define BIT_GET_R_WMAC_NSARP_MODEN_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_MODEN_8822B) & BIT_MASK_R_WMAC_NSARP_MODEN_8822B)

+#define BIT_GET_R_WMAC_NSARP_MODEN_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_MODEN_8822B) & BIT_MASK_R_WMAC_NSARP_MODEN_8822B)
+
 
 
 #define BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8822B 4
 #define BIT_MASK_R_WMAC_NSARP_RSPFTP_8822B 0x3
 #define BIT_R_WMAC_NSARP_RSPFTP_8822B(x) (((x) & BIT_MASK_R_WMAC_NSARP_RSPFTP_8822B) << BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8822B)
-#define BIT_GET_R_WMAC_NSARP_RSPFTP_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8822B) & BIT_MASK_R_WMAC_NSARP_RSPFTP_8822B)

+#define BIT_GET_R_WMAC_NSARP_RSPFTP_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8822B) & BIT_MASK_R_WMAC_NSARP_RSPFTP_8822B)
+
 
 
 #define BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8822B 0
 #define BIT_MASK_R_WMAC_NSARP_RSPSEC_8822B 0xf
 #define BIT_R_WMAC_NSARP_RSPSEC_8822B(x) (((x) & BIT_MASK_R_WMAC_NSARP_RSPSEC_8822B) << BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8822B)
-#define BIT_GET_R_WMAC_NSARP_RSPSEC_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8822B) & BIT_MASK_R_WMAC_NSARP_RSPSEC_8822B)

+#define BIT_GET_R_WMAC_NSARP_RSPSEC_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8822B) & BIT_MASK_R_WMAC_NSARP_RSPSEC_8822B)
+
 
 
 /* 2 REG_NS_ARP_INFO_8822B */
@@ -9122,19 +10065,22 @@
 #define BIT_SHIFT_EXPRSP_SECTYPE_8822B 16
 #define BIT_MASK_EXPRSP_SECTYPE_8822B 0x7
 #define BIT_EXPRSP_SECTYPE_8822B(x) (((x) & BIT_MASK_EXPRSP_SECTYPE_8822B) << BIT_SHIFT_EXPRSP_SECTYPE_8822B)
-#define BIT_GET_EXPRSP_SECTYPE_8822B(x) (((x) >> BIT_SHIFT_EXPRSP_SECTYPE_8822B) & BIT_MASK_EXPRSP_SECTYPE_8822B)

+#define BIT_GET_EXPRSP_SECTYPE_8822B(x) (((x) >> BIT_SHIFT_EXPRSP_SECTYPE_8822B) & BIT_MASK_EXPRSP_SECTYPE_8822B)
+
 
 
 #define BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8822B 8
 #define BIT_MASK_EXPRSP_CHKSM_7_TO_0_8822B 0xff
 #define BIT_EXPRSP_CHKSM_7_TO_0_8822B(x) (((x) & BIT_MASK_EXPRSP_CHKSM_7_TO_0_8822B) << BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8822B)
-#define BIT_GET_EXPRSP_CHKSM_7_TO_0_8822B(x) (((x) >> BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8822B) & BIT_MASK_EXPRSP_CHKSM_7_TO_0_8822B)

+#define BIT_GET_EXPRSP_CHKSM_7_TO_0_8822B(x) (((x) >> BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8822B) & BIT_MASK_EXPRSP_CHKSM_7_TO_0_8822B)
+
 
 
 #define BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8822B 0
 #define BIT_MASK_EXPRSP_CHKSM_15_TO_8_8822B 0xff
 #define BIT_EXPRSP_CHKSM_15_TO_8_8822B(x) (((x) & BIT_MASK_EXPRSP_CHKSM_15_TO_8_8822B) << BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8822B)
-#define BIT_GET_EXPRSP_CHKSM_15_TO_8_8822B(x) (((x) >> BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8822B) & BIT_MASK_EXPRSP_CHKSM_15_TO_8_8822B)

+#define BIT_GET_EXPRSP_CHKSM_15_TO_8_8822B(x) (((x) >> BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8822B) & BIT_MASK_EXPRSP_CHKSM_15_TO_8_8822B)
+
 
 
 /* 2 REG_BEAMFORMING_INFO_NSARP_V1_8822B */
@@ -9142,7 +10088,8 @@
 #define BIT_SHIFT_WMAC_ARPIP_8822B 0
 #define BIT_MASK_WMAC_ARPIP_8822B 0xffffffffL
 #define BIT_WMAC_ARPIP_8822B(x) (((x) & BIT_MASK_WMAC_ARPIP_8822B) << BIT_SHIFT_WMAC_ARPIP_8822B)
-#define BIT_GET_WMAC_ARPIP_8822B(x) (((x) >> BIT_SHIFT_WMAC_ARPIP_8822B) & BIT_MASK_WMAC_ARPIP_8822B)

+#define BIT_GET_WMAC_ARPIP_8822B(x) (((x) >> BIT_SHIFT_WMAC_ARPIP_8822B) & BIT_MASK_WMAC_ARPIP_8822B)
+
 
 
 /* 2 REG_BEAMFORMING_INFO_NSARP_8822B */
@@ -9150,7 +10097,8 @@
 #define BIT_SHIFT_BEAMFORMING_INFO_8822B 0
 #define BIT_MASK_BEAMFORMING_INFO_8822B 0xffffffffL
 #define BIT_BEAMFORMING_INFO_8822B(x) (((x) & BIT_MASK_BEAMFORMING_INFO_8822B) << BIT_SHIFT_BEAMFORMING_INFO_8822B)
-#define BIT_GET_BEAMFORMING_INFO_8822B(x) (((x) >> BIT_SHIFT_BEAMFORMING_INFO_8822B) & BIT_MASK_BEAMFORMING_INFO_8822B)

+#define BIT_GET_BEAMFORMING_INFO_8822B(x) (((x) >> BIT_SHIFT_BEAMFORMING_INFO_8822B) & BIT_MASK_BEAMFORMING_INFO_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -9158,7 +10106,8 @@
 #define BIT_SHIFT_R_WMAC_IPV6_MYIPAD_8822B 0
 #define BIT_MASK_R_WMAC_IPV6_MYIPAD_8822B 0xffffffffffffffffffffffffffffffffL
 #define BIT_R_WMAC_IPV6_MYIPAD_8822B(x) (((x) & BIT_MASK_R_WMAC_IPV6_MYIPAD_8822B) << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_8822B)
-#define BIT_GET_R_WMAC_IPV6_MYIPAD_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_8822B) & BIT_MASK_R_WMAC_IPV6_MYIPAD_8822B)

+#define BIT_GET_R_WMAC_IPV6_MYIPAD_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_8822B) & BIT_MASK_R_WMAC_IPV6_MYIPAD_8822B)
+
 
 
 /* 2 REG_RSVD_0X740_8822B */
@@ -9168,13 +10117,15 @@
 #define BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8822B 4
 #define BIT_MASK_R_WMAC_CTX_SUBTYPE_8822B 0xf
 #define BIT_R_WMAC_CTX_SUBTYPE_8822B(x) (((x) & BIT_MASK_R_WMAC_CTX_SUBTYPE_8822B) << BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8822B)
-#define BIT_GET_R_WMAC_CTX_SUBTYPE_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8822B) & BIT_MASK_R_WMAC_CTX_SUBTYPE_8822B)

+#define BIT_GET_R_WMAC_CTX_SUBTYPE_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8822B) & BIT_MASK_R_WMAC_CTX_SUBTYPE_8822B)
+
 
 
 #define BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8822B 0
 #define BIT_MASK_R_WMAC_RTX_SUBTYPE_8822B 0xf
 #define BIT_R_WMAC_RTX_SUBTYPE_8822B(x) (((x) & BIT_MASK_R_WMAC_RTX_SUBTYPE_8822B) << BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8822B)
-#define BIT_GET_R_WMAC_RTX_SUBTYPE_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8822B) & BIT_MASK_R_WMAC_RTX_SUBTYPE_8822B)

+#define BIT_GET_R_WMAC_RTX_SUBTYPE_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8822B) & BIT_MASK_R_WMAC_RTX_SUBTYPE_8822B)
+
 
 
 /* 2 REG_WMAC_SWAES_CFG_8822B */
@@ -9186,7 +10137,8 @@
 #define BIT_SHIFT_TIMER_8822B 0
 #define BIT_MASK_TIMER_8822B 0xff
 #define BIT_TIMER_8822B(x) (((x) & BIT_MASK_TIMER_8822B) << BIT_SHIFT_TIMER_8822B)
-#define BIT_GET_TIMER_8822B(x) (((x) >> BIT_SHIFT_TIMER_8822B) & BIT_MASK_TIMER_8822B)

+#define BIT_GET_TIMER_8822B(x) (((x) >> BIT_SHIFT_TIMER_8822B) & BIT_MASK_TIMER_8822B)
+
 
 
 /* 2 REG_BT_COEX_8822B */
@@ -9199,7 +10151,8 @@
 #define BIT_SHIFT_R_BT_CNT_THR_8822B 0
 #define BIT_MASK_R_BT_CNT_THR_8822B 0xff
 #define BIT_R_BT_CNT_THR_8822B(x) (((x) & BIT_MASK_R_BT_CNT_THR_8822B) << BIT_SHIFT_R_BT_CNT_THR_8822B)
-#define BIT_GET_R_BT_CNT_THR_8822B(x) (((x) >> BIT_SHIFT_R_BT_CNT_THR_8822B) & BIT_MASK_R_BT_CNT_THR_8822B)

+#define BIT_GET_R_BT_CNT_THR_8822B(x) (((x) >> BIT_SHIFT_R_BT_CNT_THR_8822B) & BIT_MASK_R_BT_CNT_THR_8822B)
+
 
 
 /* 2 REG_WLAN_ACT_MASK_CTRL_8822B */
@@ -9214,13 +10167,15 @@
 #define BIT_SHIFT_RXMYRTS_NAV_V1_8822B 8
 #define BIT_MASK_RXMYRTS_NAV_V1_8822B 0xff
 #define BIT_RXMYRTS_NAV_V1_8822B(x) (((x) & BIT_MASK_RXMYRTS_NAV_V1_8822B) << BIT_SHIFT_RXMYRTS_NAV_V1_8822B)
-#define BIT_GET_RXMYRTS_NAV_V1_8822B(x) (((x) >> BIT_SHIFT_RXMYRTS_NAV_V1_8822B) & BIT_MASK_RXMYRTS_NAV_V1_8822B)

+#define BIT_GET_RXMYRTS_NAV_V1_8822B(x) (((x) >> BIT_SHIFT_RXMYRTS_NAV_V1_8822B) & BIT_MASK_RXMYRTS_NAV_V1_8822B)
+
 
 
 #define BIT_SHIFT_RTSRST_V1_8822B 0
 #define BIT_MASK_RTSRST_V1_8822B 0xff
 #define BIT_RTSRST_V1_8822B(x) (((x) & BIT_MASK_RTSRST_V1_8822B) << BIT_SHIFT_RTSRST_V1_8822B)
-#define BIT_GET_RTSRST_V1_8822B(x) (((x) >> BIT_SHIFT_RTSRST_V1_8822B) & BIT_MASK_RTSRST_V1_8822B)

+#define BIT_GET_RTSRST_V1_8822B(x) (((x) >> BIT_SHIFT_RTSRST_V1_8822B) & BIT_MASK_RTSRST_V1_8822B)
+
 
 
 /* 2 REG_BT_COEX_ENHANCED_INTR_CTRL_8822B */
@@ -9228,19 +10183,22 @@
 #define BIT_SHIFT_BT_STAT_DELAY_8822B 12
 #define BIT_MASK_BT_STAT_DELAY_8822B 0xf
 #define BIT_BT_STAT_DELAY_8822B(x) (((x) & BIT_MASK_BT_STAT_DELAY_8822B) << BIT_SHIFT_BT_STAT_DELAY_8822B)
-#define BIT_GET_BT_STAT_DELAY_8822B(x) (((x) >> BIT_SHIFT_BT_STAT_DELAY_8822B) & BIT_MASK_BT_STAT_DELAY_8822B)

+#define BIT_GET_BT_STAT_DELAY_8822B(x) (((x) >> BIT_SHIFT_BT_STAT_DELAY_8822B) & BIT_MASK_BT_STAT_DELAY_8822B)
+
 
 
 #define BIT_SHIFT_BT_TRX_INIT_DETECT_8822B 8
 #define BIT_MASK_BT_TRX_INIT_DETECT_8822B 0xf
 #define BIT_BT_TRX_INIT_DETECT_8822B(x) (((x) & BIT_MASK_BT_TRX_INIT_DETECT_8822B) << BIT_SHIFT_BT_TRX_INIT_DETECT_8822B)
-#define BIT_GET_BT_TRX_INIT_DETECT_8822B(x) (((x) >> BIT_SHIFT_BT_TRX_INIT_DETECT_8822B) & BIT_MASK_BT_TRX_INIT_DETECT_8822B)

+#define BIT_GET_BT_TRX_INIT_DETECT_8822B(x) (((x) >> BIT_SHIFT_BT_TRX_INIT_DETECT_8822B) & BIT_MASK_BT_TRX_INIT_DETECT_8822B)
+
 
 
 #define BIT_SHIFT_BT_PRI_DETECT_TO_8822B 4
 #define BIT_MASK_BT_PRI_DETECT_TO_8822B 0xf
 #define BIT_BT_PRI_DETECT_TO_8822B(x) (((x) & BIT_MASK_BT_PRI_DETECT_TO_8822B) << BIT_SHIFT_BT_PRI_DETECT_TO_8822B)
-#define BIT_GET_BT_PRI_DETECT_TO_8822B(x) (((x) >> BIT_SHIFT_BT_PRI_DETECT_TO_8822B) & BIT_MASK_BT_PRI_DETECT_TO_8822B)

+#define BIT_GET_BT_PRI_DETECT_TO_8822B(x) (((x) >> BIT_SHIFT_BT_PRI_DETECT_TO_8822B) & BIT_MASK_BT_PRI_DETECT_TO_8822B)
+
 
 #define BIT_R_GRANTALL_WLMASK_8822B BIT(3)
 #define BIT_STATIS_BT_EN_8822B BIT(2)
@@ -9252,25 +10210,29 @@
 #define BIT_SHIFT_STATIS_BT_LO_RX_8822B (48 & CPU_OPT_WIDTH)
 #define BIT_MASK_STATIS_BT_LO_RX_8822B 0xffff
 #define BIT_STATIS_BT_LO_RX_8822B(x) (((x) & BIT_MASK_STATIS_BT_LO_RX_8822B) << BIT_SHIFT_STATIS_BT_LO_RX_8822B)
-#define BIT_GET_STATIS_BT_LO_RX_8822B(x) (((x) >> BIT_SHIFT_STATIS_BT_LO_RX_8822B) & BIT_MASK_STATIS_BT_LO_RX_8822B)

+#define BIT_GET_STATIS_BT_LO_RX_8822B(x) (((x) >> BIT_SHIFT_STATIS_BT_LO_RX_8822B) & BIT_MASK_STATIS_BT_LO_RX_8822B)
+
 
 
 #define BIT_SHIFT_STATIS_BT_LO_TX_8822B (32 & CPU_OPT_WIDTH)
 #define BIT_MASK_STATIS_BT_LO_TX_8822B 0xffff
 #define BIT_STATIS_BT_LO_TX_8822B(x) (((x) & BIT_MASK_STATIS_BT_LO_TX_8822B) << BIT_SHIFT_STATIS_BT_LO_TX_8822B)
-#define BIT_GET_STATIS_BT_LO_TX_8822B(x) (((x) >> BIT_SHIFT_STATIS_BT_LO_TX_8822B) & BIT_MASK_STATIS_BT_LO_TX_8822B)

+#define BIT_GET_STATIS_BT_LO_TX_8822B(x) (((x) >> BIT_SHIFT_STATIS_BT_LO_TX_8822B) & BIT_MASK_STATIS_BT_LO_TX_8822B)
+
 
 
 #define BIT_SHIFT_STATIS_BT_HI_RX_8822B 16
 #define BIT_MASK_STATIS_BT_HI_RX_8822B 0xffff
 #define BIT_STATIS_BT_HI_RX_8822B(x) (((x) & BIT_MASK_STATIS_BT_HI_RX_8822B) << BIT_SHIFT_STATIS_BT_HI_RX_8822B)
-#define BIT_GET_STATIS_BT_HI_RX_8822B(x) (((x) >> BIT_SHIFT_STATIS_BT_HI_RX_8822B) & BIT_MASK_STATIS_BT_HI_RX_8822B)

+#define BIT_GET_STATIS_BT_HI_RX_8822B(x) (((x) >> BIT_SHIFT_STATIS_BT_HI_RX_8822B) & BIT_MASK_STATIS_BT_HI_RX_8822B)
+
 
 
 #define BIT_SHIFT_STATIS_BT_HI_TX_8822B 0
 #define BIT_MASK_STATIS_BT_HI_TX_8822B 0xffff
 #define BIT_STATIS_BT_HI_TX_8822B(x) (((x) & BIT_MASK_STATIS_BT_HI_TX_8822B) << BIT_SHIFT_STATIS_BT_HI_TX_8822B)
-#define BIT_GET_STATIS_BT_HI_TX_8822B(x) (((x) >> BIT_SHIFT_STATIS_BT_HI_TX_8822B) & BIT_MASK_STATIS_BT_HI_TX_8822B)

+#define BIT_GET_STATIS_BT_HI_TX_8822B(x) (((x) >> BIT_SHIFT_STATIS_BT_HI_TX_8822B) & BIT_MASK_STATIS_BT_HI_TX_8822B)
+
 
 
 /* 2 REG_BT_STATISTICS_CONTROL_REGISTER_8822B */
@@ -9278,19 +10240,22 @@
 #define BIT_SHIFT_R_BT_CMD_RPT_8822B 16
 #define BIT_MASK_R_BT_CMD_RPT_8822B 0xffff
 #define BIT_R_BT_CMD_RPT_8822B(x) (((x) & BIT_MASK_R_BT_CMD_RPT_8822B) << BIT_SHIFT_R_BT_CMD_RPT_8822B)
-#define BIT_GET_R_BT_CMD_RPT_8822B(x) (((x) >> BIT_SHIFT_R_BT_CMD_RPT_8822B) & BIT_MASK_R_BT_CMD_RPT_8822B)

+#define BIT_GET_R_BT_CMD_RPT_8822B(x) (((x) >> BIT_SHIFT_R_BT_CMD_RPT_8822B) & BIT_MASK_R_BT_CMD_RPT_8822B)
+
 
 
 #define BIT_SHIFT_R_RPT_FROM_BT_8822B 8
 #define BIT_MASK_R_RPT_FROM_BT_8822B 0xff
 #define BIT_R_RPT_FROM_BT_8822B(x) (((x) & BIT_MASK_R_RPT_FROM_BT_8822B) << BIT_SHIFT_R_RPT_FROM_BT_8822B)
-#define BIT_GET_R_RPT_FROM_BT_8822B(x) (((x) >> BIT_SHIFT_R_RPT_FROM_BT_8822B) & BIT_MASK_R_RPT_FROM_BT_8822B)

+#define BIT_GET_R_RPT_FROM_BT_8822B(x) (((x) >> BIT_SHIFT_R_RPT_FROM_BT_8822B) & BIT_MASK_R_RPT_FROM_BT_8822B)
+
 
 
 #define BIT_SHIFT_BT_HID_ISR_SET_8822B 6
 #define BIT_MASK_BT_HID_ISR_SET_8822B 0x3
 #define BIT_BT_HID_ISR_SET_8822B(x) (((x) & BIT_MASK_BT_HID_ISR_SET_8822B) << BIT_SHIFT_BT_HID_ISR_SET_8822B)
-#define BIT_GET_BT_HID_ISR_SET_8822B(x) (((x) >> BIT_SHIFT_BT_HID_ISR_SET_8822B) & BIT_MASK_BT_HID_ISR_SET_8822B)

+#define BIT_GET_BT_HID_ISR_SET_8822B(x) (((x) >> BIT_SHIFT_BT_HID_ISR_SET_8822B) & BIT_MASK_BT_HID_ISR_SET_8822B)
+
 
 #define BIT_TDMA_BT_START_NOTIFY_8822B BIT(5)
 #define BIT_ENABLE_TDMA_FW_MODE_8822B BIT(4)
@@ -9304,25 +10269,29 @@
 #define BIT_SHIFT_BT_PROFILE_8822B 24
 #define BIT_MASK_BT_PROFILE_8822B 0xff
 #define BIT_BT_PROFILE_8822B(x) (((x) & BIT_MASK_BT_PROFILE_8822B) << BIT_SHIFT_BT_PROFILE_8822B)
-#define BIT_GET_BT_PROFILE_8822B(x) (((x) >> BIT_SHIFT_BT_PROFILE_8822B) & BIT_MASK_BT_PROFILE_8822B)

+#define BIT_GET_BT_PROFILE_8822B(x) (((x) >> BIT_SHIFT_BT_PROFILE_8822B) & BIT_MASK_BT_PROFILE_8822B)
+
 
 
 #define BIT_SHIFT_BT_POWER_8822B 16
 #define BIT_MASK_BT_POWER_8822B 0xff
 #define BIT_BT_POWER_8822B(x) (((x) & BIT_MASK_BT_POWER_8822B) << BIT_SHIFT_BT_POWER_8822B)
-#define BIT_GET_BT_POWER_8822B(x) (((x) >> BIT_SHIFT_BT_POWER_8822B) & BIT_MASK_BT_POWER_8822B)

+#define BIT_GET_BT_POWER_8822B(x) (((x) >> BIT_SHIFT_BT_POWER_8822B) & BIT_MASK_BT_POWER_8822B)
+
 
 
 #define BIT_SHIFT_BT_PREDECT_STATUS_8822B 8
 #define BIT_MASK_BT_PREDECT_STATUS_8822B 0xff
 #define BIT_BT_PREDECT_STATUS_8822B(x) (((x) & BIT_MASK_BT_PREDECT_STATUS_8822B) << BIT_SHIFT_BT_PREDECT_STATUS_8822B)
-#define BIT_GET_BT_PREDECT_STATUS_8822B(x) (((x) >> BIT_SHIFT_BT_PREDECT_STATUS_8822B) & BIT_MASK_BT_PREDECT_STATUS_8822B)

+#define BIT_GET_BT_PREDECT_STATUS_8822B(x) (((x) >> BIT_SHIFT_BT_PREDECT_STATUS_8822B) & BIT_MASK_BT_PREDECT_STATUS_8822B)
+
 
 
 #define BIT_SHIFT_BT_CMD_INFO_8822B 0
 #define BIT_MASK_BT_CMD_INFO_8822B 0xff
 #define BIT_BT_CMD_INFO_8822B(x) (((x) & BIT_MASK_BT_CMD_INFO_8822B) << BIT_SHIFT_BT_CMD_INFO_8822B)
-#define BIT_GET_BT_CMD_INFO_8822B(x) (((x) >> BIT_SHIFT_BT_CMD_INFO_8822B) & BIT_MASK_BT_CMD_INFO_8822B)

+#define BIT_GET_BT_CMD_INFO_8822B(x) (((x) >> BIT_SHIFT_BT_CMD_INFO_8822B) & BIT_MASK_BT_CMD_INFO_8822B)
+
 
 
 /* 2 REG_BT_INTERRUPT_CONTROL_REGISTER_8822B */
@@ -9338,19 +10307,22 @@
 #define BIT_SHIFT_WLAN_RPT_DATA_8822B 16
 #define BIT_MASK_WLAN_RPT_DATA_8822B 0xff
 #define BIT_WLAN_RPT_DATA_8822B(x) (((x) & BIT_MASK_WLAN_RPT_DATA_8822B) << BIT_SHIFT_WLAN_RPT_DATA_8822B)
-#define BIT_GET_WLAN_RPT_DATA_8822B(x) (((x) >> BIT_SHIFT_WLAN_RPT_DATA_8822B) & BIT_MASK_WLAN_RPT_DATA_8822B)

+#define BIT_GET_WLAN_RPT_DATA_8822B(x) (((x) >> BIT_SHIFT_WLAN_RPT_DATA_8822B) & BIT_MASK_WLAN_RPT_DATA_8822B)
+
 
 
 #define BIT_SHIFT_CMD_ID_8822B 8
 #define BIT_MASK_CMD_ID_8822B 0xff
 #define BIT_CMD_ID_8822B(x) (((x) & BIT_MASK_CMD_ID_8822B) << BIT_SHIFT_CMD_ID_8822B)
-#define BIT_GET_CMD_ID_8822B(x) (((x) >> BIT_SHIFT_CMD_ID_8822B) & BIT_MASK_CMD_ID_8822B)

+#define BIT_GET_CMD_ID_8822B(x) (((x) >> BIT_SHIFT_CMD_ID_8822B) & BIT_MASK_CMD_ID_8822B)
+
 
 
 #define BIT_SHIFT_BT_DATA_8822B 0
 #define BIT_MASK_BT_DATA_8822B 0xff
 #define BIT_BT_DATA_8822B(x) (((x) & BIT_MASK_BT_DATA_8822B) << BIT_SHIFT_BT_DATA_8822B)
-#define BIT_GET_BT_DATA_8822B(x) (((x) >> BIT_SHIFT_BT_DATA_8822B) & BIT_MASK_BT_DATA_8822B)

+#define BIT_GET_BT_DATA_8822B(x) (((x) >> BIT_SHIFT_BT_DATA_8822B) & BIT_MASK_BT_DATA_8822B)
+
 
 
 /* 2 REG_WLAN_REPORT_TIME_OUT_CONTROL_REGISTER_8822B */
@@ -9358,7 +10330,8 @@
 #define BIT_SHIFT_WLAN_RPT_TO_8822B 0
 #define BIT_MASK_WLAN_RPT_TO_8822B 0xff
 #define BIT_WLAN_RPT_TO_8822B(x) (((x) & BIT_MASK_WLAN_RPT_TO_8822B) << BIT_SHIFT_WLAN_RPT_TO_8822B)
-#define BIT_GET_WLAN_RPT_TO_8822B(x) (((x) >> BIT_SHIFT_WLAN_RPT_TO_8822B) & BIT_MASK_WLAN_RPT_TO_8822B)

+#define BIT_GET_WLAN_RPT_TO_8822B(x) (((x) >> BIT_SHIFT_WLAN_RPT_TO_8822B) & BIT_MASK_WLAN_RPT_TO_8822B)
+
 
 
 /* 2 REG_BT_ISOLATION_TABLE_REGISTER_REGISTER_8822B */
@@ -9366,7 +10339,8 @@
 #define BIT_SHIFT_ISOLATION_CHK_8822B 1
 #define BIT_MASK_ISOLATION_CHK_8822B 0x7fffffffffffffffffffL
 #define BIT_ISOLATION_CHK_8822B(x) (((x) & BIT_MASK_ISOLATION_CHK_8822B) << BIT_SHIFT_ISOLATION_CHK_8822B)
-#define BIT_GET_ISOLATION_CHK_8822B(x) (((x) >> BIT_SHIFT_ISOLATION_CHK_8822B) & BIT_MASK_ISOLATION_CHK_8822B)

+#define BIT_GET_ISOLATION_CHK_8822B(x) (((x) >> BIT_SHIFT_ISOLATION_CHK_8822B) & BIT_MASK_ISOLATION_CHK_8822B)
+
 
 #define BIT_ISOLATION_EN_8822B BIT(0)
 
@@ -9385,13 +10359,15 @@
 #define BIT_SHIFT_BT_TIME_8822B 6
 #define BIT_MASK_BT_TIME_8822B 0x3ffffff
 #define BIT_BT_TIME_8822B(x) (((x) & BIT_MASK_BT_TIME_8822B) << BIT_SHIFT_BT_TIME_8822B)
-#define BIT_GET_BT_TIME_8822B(x) (((x) >> BIT_SHIFT_BT_TIME_8822B) & BIT_MASK_BT_TIME_8822B)

+#define BIT_GET_BT_TIME_8822B(x) (((x) >> BIT_SHIFT_BT_TIME_8822B) & BIT_MASK_BT_TIME_8822B)
+
 
 
 #define BIT_SHIFT_BT_RPT_SAMPLE_RATE_8822B 0
 #define BIT_MASK_BT_RPT_SAMPLE_RATE_8822B 0x3f
 #define BIT_BT_RPT_SAMPLE_RATE_8822B(x) (((x) & BIT_MASK_BT_RPT_SAMPLE_RATE_8822B) << BIT_SHIFT_BT_RPT_SAMPLE_RATE_8822B)
-#define BIT_GET_BT_RPT_SAMPLE_RATE_8822B(x) (((x) >> BIT_SHIFT_BT_RPT_SAMPLE_RATE_8822B) & BIT_MASK_BT_RPT_SAMPLE_RATE_8822B)

+#define BIT_GET_BT_RPT_SAMPLE_RATE_8822B(x) (((x) >> BIT_SHIFT_BT_RPT_SAMPLE_RATE_8822B) & BIT_MASK_BT_RPT_SAMPLE_RATE_8822B)
+
 
 
 /* 2 REG_BT_ACT_REGISTER_8822B */
@@ -9399,7 +10375,8 @@
 #define BIT_SHIFT_BT_EISR_EN_8822B 16
 #define BIT_MASK_BT_EISR_EN_8822B 0xff
 #define BIT_BT_EISR_EN_8822B(x) (((x) & BIT_MASK_BT_EISR_EN_8822B) << BIT_SHIFT_BT_EISR_EN_8822B)
-#define BIT_GET_BT_EISR_EN_8822B(x) (((x) >> BIT_SHIFT_BT_EISR_EN_8822B) & BIT_MASK_BT_EISR_EN_8822B)

+#define BIT_GET_BT_EISR_EN_8822B(x) (((x) >> BIT_SHIFT_BT_EISR_EN_8822B) & BIT_MASK_BT_EISR_EN_8822B)
+
 
 #define BIT_BT_ACT_FALLING_ISR_8822B BIT(10)
 #define BIT_BT_ACT_RISING_ISR_8822B BIT(9)
@@ -9408,7 +10385,8 @@
 #define BIT_SHIFT_BT_CH_8822B 0
 #define BIT_MASK_BT_CH_8822B 0xff
 #define BIT_BT_CH_8822B(x) (((x) & BIT_MASK_BT_CH_8822B) << BIT_SHIFT_BT_CH_8822B)
-#define BIT_GET_BT_CH_8822B(x) (((x) >> BIT_SHIFT_BT_CH_8822B) & BIT_MASK_BT_CH_8822B)

+#define BIT_GET_BT_CH_8822B(x) (((x) >> BIT_SHIFT_BT_CH_8822B) & BIT_MASK_BT_CH_8822B)
+
 
 
 /* 2 REG_OBFF_CTRL_BASIC_8822B */
@@ -9417,7 +10395,8 @@
 #define BIT_SHIFT_OBFF_STATE_V1_8822B 28
 #define BIT_MASK_OBFF_STATE_V1_8822B 0x3
 #define BIT_OBFF_STATE_V1_8822B(x) (((x) & BIT_MASK_OBFF_STATE_V1_8822B) << BIT_SHIFT_OBFF_STATE_V1_8822B)
-#define BIT_GET_OBFF_STATE_V1_8822B(x) (((x) >> BIT_SHIFT_OBFF_STATE_V1_8822B) & BIT_MASK_OBFF_STATE_V1_8822B)

+#define BIT_GET_OBFF_STATE_V1_8822B(x) (((x) >> BIT_SHIFT_OBFF_STATE_V1_8822B) & BIT_MASK_OBFF_STATE_V1_8822B)
+
 
 #define BIT_OBFF_ACT_RXDMA_EN_8822B BIT(27)
 #define BIT_OBFF_BLOCK_INT_EN_8822B BIT(26)
@@ -9427,25 +10406,29 @@
 #define BIT_SHIFT_WAKE_MAX_PLS_8822B 20
 #define BIT_MASK_WAKE_MAX_PLS_8822B 0x7
 #define BIT_WAKE_MAX_PLS_8822B(x) (((x) & BIT_MASK_WAKE_MAX_PLS_8822B) << BIT_SHIFT_WAKE_MAX_PLS_8822B)
-#define BIT_GET_WAKE_MAX_PLS_8822B(x) (((x) >> BIT_SHIFT_WAKE_MAX_PLS_8822B) & BIT_MASK_WAKE_MAX_PLS_8822B)

+#define BIT_GET_WAKE_MAX_PLS_8822B(x) (((x) >> BIT_SHIFT_WAKE_MAX_PLS_8822B) & BIT_MASK_WAKE_MAX_PLS_8822B)
+
 
 
 #define BIT_SHIFT_WAKE_MIN_PLS_8822B 16
 #define BIT_MASK_WAKE_MIN_PLS_8822B 0x7
 #define BIT_WAKE_MIN_PLS_8822B(x) (((x) & BIT_MASK_WAKE_MIN_PLS_8822B) << BIT_SHIFT_WAKE_MIN_PLS_8822B)
-#define BIT_GET_WAKE_MIN_PLS_8822B(x) (((x) >> BIT_SHIFT_WAKE_MIN_PLS_8822B) & BIT_MASK_WAKE_MIN_PLS_8822B)

+#define BIT_GET_WAKE_MIN_PLS_8822B(x) (((x) >> BIT_SHIFT_WAKE_MIN_PLS_8822B) & BIT_MASK_WAKE_MIN_PLS_8822B)
+
 
 
 #define BIT_SHIFT_WAKE_MAX_F2F_8822B 12
 #define BIT_MASK_WAKE_MAX_F2F_8822B 0x7
 #define BIT_WAKE_MAX_F2F_8822B(x) (((x) & BIT_MASK_WAKE_MAX_F2F_8822B) << BIT_SHIFT_WAKE_MAX_F2F_8822B)
-#define BIT_GET_WAKE_MAX_F2F_8822B(x) (((x) >> BIT_SHIFT_WAKE_MAX_F2F_8822B) & BIT_MASK_WAKE_MAX_F2F_8822B)

+#define BIT_GET_WAKE_MAX_F2F_8822B(x) (((x) >> BIT_SHIFT_WAKE_MAX_F2F_8822B) & BIT_MASK_WAKE_MAX_F2F_8822B)
+
 
 
 #define BIT_SHIFT_WAKE_MIN_F2F_8822B 8
 #define BIT_MASK_WAKE_MIN_F2F_8822B 0x7
 #define BIT_WAKE_MIN_F2F_8822B(x) (((x) & BIT_MASK_WAKE_MIN_F2F_8822B) << BIT_SHIFT_WAKE_MIN_F2F_8822B)
-#define BIT_GET_WAKE_MIN_F2F_8822B(x) (((x) >> BIT_SHIFT_WAKE_MIN_F2F_8822B) & BIT_MASK_WAKE_MIN_F2F_8822B)

+#define BIT_GET_WAKE_MIN_F2F_8822B(x) (((x) >> BIT_SHIFT_WAKE_MIN_F2F_8822B) & BIT_MASK_WAKE_MIN_F2F_8822B)
+
 
 #define BIT_APP_CPU_ACT_V1_8822B BIT(3)
 #define BIT_APP_OBFF_V1_8822B BIT(2)
@@ -9457,25 +10440,29 @@
 #define BIT_SHIFT_RX_HIGH_TIMER_IDX_8822B 24
 #define BIT_MASK_RX_HIGH_TIMER_IDX_8822B 0x7
 #define BIT_RX_HIGH_TIMER_IDX_8822B(x) (((x) & BIT_MASK_RX_HIGH_TIMER_IDX_8822B) << BIT_SHIFT_RX_HIGH_TIMER_IDX_8822B)
-#define BIT_GET_RX_HIGH_TIMER_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_HIGH_TIMER_IDX_8822B) & BIT_MASK_RX_HIGH_TIMER_IDX_8822B)

+#define BIT_GET_RX_HIGH_TIMER_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_HIGH_TIMER_IDX_8822B) & BIT_MASK_RX_HIGH_TIMER_IDX_8822B)
+
 
 
 #define BIT_SHIFT_RX_MED_TIMER_IDX_8822B 16
 #define BIT_MASK_RX_MED_TIMER_IDX_8822B 0x7
 #define BIT_RX_MED_TIMER_IDX_8822B(x) (((x) & BIT_MASK_RX_MED_TIMER_IDX_8822B) << BIT_SHIFT_RX_MED_TIMER_IDX_8822B)
-#define BIT_GET_RX_MED_TIMER_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_MED_TIMER_IDX_8822B) & BIT_MASK_RX_MED_TIMER_IDX_8822B)

+#define BIT_GET_RX_MED_TIMER_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_MED_TIMER_IDX_8822B) & BIT_MASK_RX_MED_TIMER_IDX_8822B)
+
 
 
 #define BIT_SHIFT_RX_LOW_TIMER_IDX_8822B 8
 #define BIT_MASK_RX_LOW_TIMER_IDX_8822B 0x7
 #define BIT_RX_LOW_TIMER_IDX_8822B(x) (((x) & BIT_MASK_RX_LOW_TIMER_IDX_8822B) << BIT_SHIFT_RX_LOW_TIMER_IDX_8822B)
-#define BIT_GET_RX_LOW_TIMER_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_LOW_TIMER_IDX_8822B) & BIT_MASK_RX_LOW_TIMER_IDX_8822B)

+#define BIT_GET_RX_LOW_TIMER_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_LOW_TIMER_IDX_8822B) & BIT_MASK_RX_LOW_TIMER_IDX_8822B)
+
 
 
 #define BIT_SHIFT_OBFF_INT_TIMER_IDX_8822B 0
 #define BIT_MASK_OBFF_INT_TIMER_IDX_8822B 0x7
 #define BIT_OBFF_INT_TIMER_IDX_8822B(x) (((x) & BIT_MASK_OBFF_INT_TIMER_IDX_8822B) << BIT_SHIFT_OBFF_INT_TIMER_IDX_8822B)
-#define BIT_GET_OBFF_INT_TIMER_IDX_8822B(x) (((x) >> BIT_SHIFT_OBFF_INT_TIMER_IDX_8822B) & BIT_MASK_OBFF_INT_TIMER_IDX_8822B)

+#define BIT_GET_OBFF_INT_TIMER_IDX_8822B(x) (((x) >> BIT_SHIFT_OBFF_INT_TIMER_IDX_8822B) & BIT_MASK_OBFF_INT_TIMER_IDX_8822B)
+
 
 
 /* 2 REG_LTR_CTRL_BASIC_8822B */
@@ -9493,31 +10480,36 @@
 #define BIT_SHIFT_HIGH_RATE_TRIG_SEL_8822B 20
 #define BIT_MASK_HIGH_RATE_TRIG_SEL_8822B 0x3
 #define BIT_HIGH_RATE_TRIG_SEL_8822B(x) (((x) & BIT_MASK_HIGH_RATE_TRIG_SEL_8822B) << BIT_SHIFT_HIGH_RATE_TRIG_SEL_8822B)
-#define BIT_GET_HIGH_RATE_TRIG_SEL_8822B(x) (((x) >> BIT_SHIFT_HIGH_RATE_TRIG_SEL_8822B) & BIT_MASK_HIGH_RATE_TRIG_SEL_8822B)

+#define BIT_GET_HIGH_RATE_TRIG_SEL_8822B(x) (((x) >> BIT_SHIFT_HIGH_RATE_TRIG_SEL_8822B) & BIT_MASK_HIGH_RATE_TRIG_SEL_8822B)
+
 
 
 #define BIT_SHIFT_MED_RATE_TRIG_SEL_8822B 18
 #define BIT_MASK_MED_RATE_TRIG_SEL_8822B 0x3
 #define BIT_MED_RATE_TRIG_SEL_8822B(x) (((x) & BIT_MASK_MED_RATE_TRIG_SEL_8822B) << BIT_SHIFT_MED_RATE_TRIG_SEL_8822B)
-#define BIT_GET_MED_RATE_TRIG_SEL_8822B(x) (((x) >> BIT_SHIFT_MED_RATE_TRIG_SEL_8822B) & BIT_MASK_MED_RATE_TRIG_SEL_8822B)

+#define BIT_GET_MED_RATE_TRIG_SEL_8822B(x) (((x) >> BIT_SHIFT_MED_RATE_TRIG_SEL_8822B) & BIT_MASK_MED_RATE_TRIG_SEL_8822B)
+
 
 
 #define BIT_SHIFT_LOW_RATE_TRIG_SEL_8822B 16
 #define BIT_MASK_LOW_RATE_TRIG_SEL_8822B 0x3
 #define BIT_LOW_RATE_TRIG_SEL_8822B(x) (((x) & BIT_MASK_LOW_RATE_TRIG_SEL_8822B) << BIT_SHIFT_LOW_RATE_TRIG_SEL_8822B)
-#define BIT_GET_LOW_RATE_TRIG_SEL_8822B(x) (((x) >> BIT_SHIFT_LOW_RATE_TRIG_SEL_8822B) & BIT_MASK_LOW_RATE_TRIG_SEL_8822B)

+#define BIT_GET_LOW_RATE_TRIG_SEL_8822B(x) (((x) >> BIT_SHIFT_LOW_RATE_TRIG_SEL_8822B) & BIT_MASK_LOW_RATE_TRIG_SEL_8822B)
+
 
 
 #define BIT_SHIFT_HIGH_RATE_BD_IDX_8822B 8
 #define BIT_MASK_HIGH_RATE_BD_IDX_8822B 0x7f
 #define BIT_HIGH_RATE_BD_IDX_8822B(x) (((x) & BIT_MASK_HIGH_RATE_BD_IDX_8822B) << BIT_SHIFT_HIGH_RATE_BD_IDX_8822B)
-#define BIT_GET_HIGH_RATE_BD_IDX_8822B(x) (((x) >> BIT_SHIFT_HIGH_RATE_BD_IDX_8822B) & BIT_MASK_HIGH_RATE_BD_IDX_8822B)

+#define BIT_GET_HIGH_RATE_BD_IDX_8822B(x) (((x) >> BIT_SHIFT_HIGH_RATE_BD_IDX_8822B) & BIT_MASK_HIGH_RATE_BD_IDX_8822B)
+
 
 
 #define BIT_SHIFT_LOW_RATE_BD_IDX_8822B 0
 #define BIT_MASK_LOW_RATE_BD_IDX_8822B 0x7f
 #define BIT_LOW_RATE_BD_IDX_8822B(x) (((x) & BIT_MASK_LOW_RATE_BD_IDX_8822B) << BIT_SHIFT_LOW_RATE_BD_IDX_8822B)
-#define BIT_GET_LOW_RATE_BD_IDX_8822B(x) (((x) >> BIT_SHIFT_LOW_RATE_BD_IDX_8822B) & BIT_MASK_LOW_RATE_BD_IDX_8822B)

+#define BIT_GET_LOW_RATE_BD_IDX_8822B(x) (((x) >> BIT_SHIFT_LOW_RATE_BD_IDX_8822B) & BIT_MASK_LOW_RATE_BD_IDX_8822B)
+
 
 
 /* 2 REG_LTR_CTRL2_TIMER_THRESHOLD_8822B */
@@ -9525,43 +10517,50 @@
 #define BIT_SHIFT_RX_EMPTY_TIMER_IDX_8822B 24
 #define BIT_MASK_RX_EMPTY_TIMER_IDX_8822B 0x7
 #define BIT_RX_EMPTY_TIMER_IDX_8822B(x) (((x) & BIT_MASK_RX_EMPTY_TIMER_IDX_8822B) << BIT_SHIFT_RX_EMPTY_TIMER_IDX_8822B)
-#define BIT_GET_RX_EMPTY_TIMER_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_EMPTY_TIMER_IDX_8822B) & BIT_MASK_RX_EMPTY_TIMER_IDX_8822B)

+#define BIT_GET_RX_EMPTY_TIMER_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_EMPTY_TIMER_IDX_8822B) & BIT_MASK_RX_EMPTY_TIMER_IDX_8822B)
+
 
 
 #define BIT_SHIFT_RX_AFULL_TH_IDX_8822B 20
 #define BIT_MASK_RX_AFULL_TH_IDX_8822B 0x7
 #define BIT_RX_AFULL_TH_IDX_8822B(x) (((x) & BIT_MASK_RX_AFULL_TH_IDX_8822B) << BIT_SHIFT_RX_AFULL_TH_IDX_8822B)
-#define BIT_GET_RX_AFULL_TH_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_AFULL_TH_IDX_8822B) & BIT_MASK_RX_AFULL_TH_IDX_8822B)

+#define BIT_GET_RX_AFULL_TH_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_AFULL_TH_IDX_8822B) & BIT_MASK_RX_AFULL_TH_IDX_8822B)
+
 
 
 #define BIT_SHIFT_RX_HIGH_TH_IDX_8822B 16
 #define BIT_MASK_RX_HIGH_TH_IDX_8822B 0x7
 #define BIT_RX_HIGH_TH_IDX_8822B(x) (((x) & BIT_MASK_RX_HIGH_TH_IDX_8822B) << BIT_SHIFT_RX_HIGH_TH_IDX_8822B)
-#define BIT_GET_RX_HIGH_TH_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_HIGH_TH_IDX_8822B) & BIT_MASK_RX_HIGH_TH_IDX_8822B)

+#define BIT_GET_RX_HIGH_TH_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_HIGH_TH_IDX_8822B) & BIT_MASK_RX_HIGH_TH_IDX_8822B)
+
 
 
 #define BIT_SHIFT_RX_MED_TH_IDX_8822B 12
 #define BIT_MASK_RX_MED_TH_IDX_8822B 0x7
 #define BIT_RX_MED_TH_IDX_8822B(x) (((x) & BIT_MASK_RX_MED_TH_IDX_8822B) << BIT_SHIFT_RX_MED_TH_IDX_8822B)
-#define BIT_GET_RX_MED_TH_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_MED_TH_IDX_8822B) & BIT_MASK_RX_MED_TH_IDX_8822B)

+#define BIT_GET_RX_MED_TH_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_MED_TH_IDX_8822B) & BIT_MASK_RX_MED_TH_IDX_8822B)
+
 
 
 #define BIT_SHIFT_RX_LOW_TH_IDX_8822B 8
 #define BIT_MASK_RX_LOW_TH_IDX_8822B 0x7
 #define BIT_RX_LOW_TH_IDX_8822B(x) (((x) & BIT_MASK_RX_LOW_TH_IDX_8822B) << BIT_SHIFT_RX_LOW_TH_IDX_8822B)
-#define BIT_GET_RX_LOW_TH_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_LOW_TH_IDX_8822B) & BIT_MASK_RX_LOW_TH_IDX_8822B)

+#define BIT_GET_RX_LOW_TH_IDX_8822B(x) (((x) >> BIT_SHIFT_RX_LOW_TH_IDX_8822B) & BIT_MASK_RX_LOW_TH_IDX_8822B)
+
 
 
 #define BIT_SHIFT_LTR_SPACE_IDX_8822B 4
 #define BIT_MASK_LTR_SPACE_IDX_8822B 0x3
 #define BIT_LTR_SPACE_IDX_8822B(x) (((x) & BIT_MASK_LTR_SPACE_IDX_8822B) << BIT_SHIFT_LTR_SPACE_IDX_8822B)
-#define BIT_GET_LTR_SPACE_IDX_8822B(x) (((x) >> BIT_SHIFT_LTR_SPACE_IDX_8822B) & BIT_MASK_LTR_SPACE_IDX_8822B)

+#define BIT_GET_LTR_SPACE_IDX_8822B(x) (((x) >> BIT_SHIFT_LTR_SPACE_IDX_8822B) & BIT_MASK_LTR_SPACE_IDX_8822B)
+
 
 
 #define BIT_SHIFT_LTR_IDLE_TIMER_IDX_8822B 0
 #define BIT_MASK_LTR_IDLE_TIMER_IDX_8822B 0x7
 #define BIT_LTR_IDLE_TIMER_IDX_8822B(x) (((x) & BIT_MASK_LTR_IDLE_TIMER_IDX_8822B) << BIT_SHIFT_LTR_IDLE_TIMER_IDX_8822B)
-#define BIT_GET_LTR_IDLE_TIMER_IDX_8822B(x) (((x) >> BIT_SHIFT_LTR_IDLE_TIMER_IDX_8822B) & BIT_MASK_LTR_IDLE_TIMER_IDX_8822B)

+#define BIT_GET_LTR_IDLE_TIMER_IDX_8822B(x) (((x) >> BIT_SHIFT_LTR_IDLE_TIMER_IDX_8822B) & BIT_MASK_LTR_IDLE_TIMER_IDX_8822B)
+
 
 
 /* 2 REG_LTR_IDLE_LATENCY_V1_8822B */
@@ -9569,7 +10568,8 @@
 #define BIT_SHIFT_LTR_IDLE_L_8822B 0
 #define BIT_MASK_LTR_IDLE_L_8822B 0xffffffffL
 #define BIT_LTR_IDLE_L_8822B(x) (((x) & BIT_MASK_LTR_IDLE_L_8822B) << BIT_SHIFT_LTR_IDLE_L_8822B)
-#define BIT_GET_LTR_IDLE_L_8822B(x) (((x) >> BIT_SHIFT_LTR_IDLE_L_8822B) & BIT_MASK_LTR_IDLE_L_8822B)

+#define BIT_GET_LTR_IDLE_L_8822B(x) (((x) >> BIT_SHIFT_LTR_IDLE_L_8822B) & BIT_MASK_LTR_IDLE_L_8822B)
+
 
 
 /* 2 REG_LTR_ACTIVE_LATENCY_V1_8822B */
@@ -9577,7 +10577,8 @@
 #define BIT_SHIFT_LTR_ACT_L_8822B 0
 #define BIT_MASK_LTR_ACT_L_8822B 0xffffffffL
 #define BIT_LTR_ACT_L_8822B(x) (((x) & BIT_MASK_LTR_ACT_L_8822B) << BIT_SHIFT_LTR_ACT_L_8822B)
-#define BIT_GET_LTR_ACT_L_8822B(x) (((x) >> BIT_SHIFT_LTR_ACT_L_8822B) & BIT_MASK_LTR_ACT_L_8822B)

+#define BIT_GET_LTR_ACT_L_8822B(x) (((x) >> BIT_SHIFT_LTR_ACT_L_8822B) & BIT_MASK_LTR_ACT_L_8822B)
+
 
 
 /* 2 REG_ANTENNA_TRAINING_CONTROL_REGISTER_8822B */
@@ -9588,7 +10589,8 @@
 #define BIT_SHIFT_TRAIN_STA_ADDR_8822B 0
 #define BIT_MASK_TRAIN_STA_ADDR_8822B 0xffffffffffffL
 #define BIT_TRAIN_STA_ADDR_8822B(x) (((x) & BIT_MASK_TRAIN_STA_ADDR_8822B) << BIT_SHIFT_TRAIN_STA_ADDR_8822B)
-#define BIT_GET_TRAIN_STA_ADDR_8822B(x) (((x) >> BIT_SHIFT_TRAIN_STA_ADDR_8822B) & BIT_MASK_TRAIN_STA_ADDR_8822B)

+#define BIT_GET_TRAIN_STA_ADDR_8822B(x) (((x) >> BIT_SHIFT_TRAIN_STA_ADDR_8822B) & BIT_MASK_TRAIN_STA_ADDR_8822B)
+
 
 
 /* 2 REG_RSVD_0X7B4_8822B */
@@ -9598,7 +10600,8 @@
 #define BIT_SHIFT_PKTCNT_BSSIDMAP_8822B 4
 #define BIT_MASK_PKTCNT_BSSIDMAP_8822B 0xf
 #define BIT_PKTCNT_BSSIDMAP_8822B(x) (((x) & BIT_MASK_PKTCNT_BSSIDMAP_8822B) << BIT_SHIFT_PKTCNT_BSSIDMAP_8822B)
-#define BIT_GET_PKTCNT_BSSIDMAP_8822B(x) (((x) >> BIT_SHIFT_PKTCNT_BSSIDMAP_8822B) & BIT_MASK_PKTCNT_BSSIDMAP_8822B)

+#define BIT_GET_PKTCNT_BSSIDMAP_8822B(x) (((x) >> BIT_SHIFT_PKTCNT_BSSIDMAP_8822B) & BIT_MASK_PKTCNT_BSSIDMAP_8822B)
+
 
 #define BIT_PKTCNT_CNTRST_8822B BIT(1)
 #define BIT_PKTCNT_CNTEN_8822B BIT(0)
@@ -9610,7 +10613,8 @@
 #define BIT_SHIFT_WMAC_PKTCNT_CFGAD_8822B 0
 #define BIT_MASK_WMAC_PKTCNT_CFGAD_8822B 0xff
 #define BIT_WMAC_PKTCNT_CFGAD_8822B(x) (((x) & BIT_MASK_WMAC_PKTCNT_CFGAD_8822B) << BIT_SHIFT_WMAC_PKTCNT_CFGAD_8822B)
-#define BIT_GET_WMAC_PKTCNT_CFGAD_8822B(x) (((x) >> BIT_SHIFT_WMAC_PKTCNT_CFGAD_8822B) & BIT_MASK_WMAC_PKTCNT_CFGAD_8822B)

+#define BIT_GET_WMAC_PKTCNT_CFGAD_8822B(x) (((x) >> BIT_SHIFT_WMAC_PKTCNT_CFGAD_8822B) & BIT_MASK_WMAC_PKTCNT_CFGAD_8822B)
+
 
 
 /* 2 REG_IQ_DUMP_8822B */
@@ -9618,38 +10622,44 @@
 #define BIT_SHIFT_R_WMAC_MATCH_REF_MAC_8822B (64 & CPU_OPT_WIDTH)
 #define BIT_MASK_R_WMAC_MATCH_REF_MAC_8822B 0xffffffffL
 #define BIT_R_WMAC_MATCH_REF_MAC_8822B(x) (((x) & BIT_MASK_R_WMAC_MATCH_REF_MAC_8822B) << BIT_SHIFT_R_WMAC_MATCH_REF_MAC_8822B)
-#define BIT_GET_R_WMAC_MATCH_REF_MAC_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_MATCH_REF_MAC_8822B) & BIT_MASK_R_WMAC_MATCH_REF_MAC_8822B)

+#define BIT_GET_R_WMAC_MATCH_REF_MAC_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_MATCH_REF_MAC_8822B) & BIT_MASK_R_WMAC_MATCH_REF_MAC_8822B)
+
 
 
 #define BIT_SHIFT_R_WMAC_MASK_LA_MAC_8822B (32 & CPU_OPT_WIDTH)
 #define BIT_MASK_R_WMAC_MASK_LA_MAC_8822B 0xffffffffL
 #define BIT_R_WMAC_MASK_LA_MAC_8822B(x) (((x) & BIT_MASK_R_WMAC_MASK_LA_MAC_8822B) << BIT_SHIFT_R_WMAC_MASK_LA_MAC_8822B)
-#define BIT_GET_R_WMAC_MASK_LA_MAC_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_MASK_LA_MAC_8822B) & BIT_MASK_R_WMAC_MASK_LA_MAC_8822B)

+#define BIT_GET_R_WMAC_MASK_LA_MAC_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_MASK_LA_MAC_8822B) & BIT_MASK_R_WMAC_MASK_LA_MAC_8822B)
+
 
 
 #define BIT_SHIFT_DUMP_OK_ADDR_8822B 15
 #define BIT_MASK_DUMP_OK_ADDR_8822B 0x1ffff
 #define BIT_DUMP_OK_ADDR_8822B(x) (((x) & BIT_MASK_DUMP_OK_ADDR_8822B) << BIT_SHIFT_DUMP_OK_ADDR_8822B)
-#define BIT_GET_DUMP_OK_ADDR_8822B(x) (((x) >> BIT_SHIFT_DUMP_OK_ADDR_8822B) & BIT_MASK_DUMP_OK_ADDR_8822B)

+#define BIT_GET_DUMP_OK_ADDR_8822B(x) (((x) >> BIT_SHIFT_DUMP_OK_ADDR_8822B) & BIT_MASK_DUMP_OK_ADDR_8822B)
+
 
 
 #define BIT_SHIFT_R_TRIG_TIME_SEL_8822B 8
 #define BIT_MASK_R_TRIG_TIME_SEL_8822B 0x7f
 #define BIT_R_TRIG_TIME_SEL_8822B(x) (((x) & BIT_MASK_R_TRIG_TIME_SEL_8822B) << BIT_SHIFT_R_TRIG_TIME_SEL_8822B)
-#define BIT_GET_R_TRIG_TIME_SEL_8822B(x) (((x) >> BIT_SHIFT_R_TRIG_TIME_SEL_8822B) & BIT_MASK_R_TRIG_TIME_SEL_8822B)

+#define BIT_GET_R_TRIG_TIME_SEL_8822B(x) (((x) >> BIT_SHIFT_R_TRIG_TIME_SEL_8822B) & BIT_MASK_R_TRIG_TIME_SEL_8822B)
+
 
 
 #define BIT_SHIFT_R_MAC_TRIG_SEL_8822B 6
 #define BIT_MASK_R_MAC_TRIG_SEL_8822B 0x3
 #define BIT_R_MAC_TRIG_SEL_8822B(x) (((x) & BIT_MASK_R_MAC_TRIG_SEL_8822B) << BIT_SHIFT_R_MAC_TRIG_SEL_8822B)
-#define BIT_GET_R_MAC_TRIG_SEL_8822B(x) (((x) >> BIT_SHIFT_R_MAC_TRIG_SEL_8822B) & BIT_MASK_R_MAC_TRIG_SEL_8822B)

+#define BIT_GET_R_MAC_TRIG_SEL_8822B(x) (((x) >> BIT_SHIFT_R_MAC_TRIG_SEL_8822B) & BIT_MASK_R_MAC_TRIG_SEL_8822B)
+
 
 #define BIT_MAC_TRIG_REG_8822B BIT(5)
 
 #define BIT_SHIFT_R_LEVEL_PULSE_SEL_8822B 3
 #define BIT_MASK_R_LEVEL_PULSE_SEL_8822B 0x3
 #define BIT_R_LEVEL_PULSE_SEL_8822B(x) (((x) & BIT_MASK_R_LEVEL_PULSE_SEL_8822B) << BIT_SHIFT_R_LEVEL_PULSE_SEL_8822B)
-#define BIT_GET_R_LEVEL_PULSE_SEL_8822B(x) (((x) >> BIT_SHIFT_R_LEVEL_PULSE_SEL_8822B) & BIT_MASK_R_LEVEL_PULSE_SEL_8822B)

+#define BIT_GET_R_LEVEL_PULSE_SEL_8822B(x) (((x) >> BIT_SHIFT_R_LEVEL_PULSE_SEL_8822B) & BIT_MASK_R_LEVEL_PULSE_SEL_8822B)
+
 
 #define BIT_EN_LA_MAC_8822B BIT(2)
 #define BIT_R_EN_IQDUMP_8822B BIT(1)
@@ -9670,13 +10680,15 @@
 #define BIT_SHIFT_R_WMAC_RX_FIL_LEN_8822B (64 & CPU_OPT_WIDTH)
 #define BIT_MASK_R_WMAC_RX_FIL_LEN_8822B 0xffff
 #define BIT_R_WMAC_RX_FIL_LEN_8822B(x) (((x) & BIT_MASK_R_WMAC_RX_FIL_LEN_8822B) << BIT_SHIFT_R_WMAC_RX_FIL_LEN_8822B)
-#define BIT_GET_R_WMAC_RX_FIL_LEN_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_RX_FIL_LEN_8822B) & BIT_MASK_R_WMAC_RX_FIL_LEN_8822B)

+#define BIT_GET_R_WMAC_RX_FIL_LEN_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_RX_FIL_LEN_8822B) & BIT_MASK_R_WMAC_RX_FIL_LEN_8822B)
+
 
 
 #define BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_8822B (56 & CPU_OPT_WIDTH)
 #define BIT_MASK_R_WMAC_RXFIFO_FULL_TH_8822B 0xff
 #define BIT_R_WMAC_RXFIFO_FULL_TH_8822B(x) (((x) & BIT_MASK_R_WMAC_RXFIFO_FULL_TH_8822B) << BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_8822B)
-#define BIT_GET_R_WMAC_RXFIFO_FULL_TH_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_8822B) & BIT_MASK_R_WMAC_RXFIFO_FULL_TH_8822B)

+#define BIT_GET_R_WMAC_RXFIFO_FULL_TH_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_8822B) & BIT_MASK_R_WMAC_RXFIFO_FULL_TH_8822B)
+
 
 #define BIT_R_WMAC_RX_SYNCFIFO_SYNC_8822B BIT(55)
 #define BIT_R_WMAC_RXRST_DLY_8822B BIT(54)
@@ -9706,13 +10718,15 @@
 #define BIT_SHIFT_R_OFDM_LEN_8822B 26
 #define BIT_MASK_R_OFDM_LEN_8822B 0x3f
 #define BIT_R_OFDM_LEN_8822B(x) (((x) & BIT_MASK_R_OFDM_LEN_8822B) << BIT_SHIFT_R_OFDM_LEN_8822B)
-#define BIT_GET_R_OFDM_LEN_8822B(x) (((x) >> BIT_SHIFT_R_OFDM_LEN_8822B) & BIT_MASK_R_OFDM_LEN_8822B)

+#define BIT_GET_R_OFDM_LEN_8822B(x) (((x) >> BIT_SHIFT_R_OFDM_LEN_8822B) & BIT_MASK_R_OFDM_LEN_8822B)
+
 
 
 #define BIT_SHIFT_R_CCK_LEN_8822B 0
 #define BIT_MASK_R_CCK_LEN_8822B 0xffff
 #define BIT_R_CCK_LEN_8822B(x) (((x) & BIT_MASK_R_CCK_LEN_8822B) << BIT_SHIFT_R_CCK_LEN_8822B)
-#define BIT_GET_R_CCK_LEN_8822B(x) (((x) >> BIT_SHIFT_R_CCK_LEN_8822B) & BIT_MASK_R_CCK_LEN_8822B)

+#define BIT_GET_R_CCK_LEN_8822B(x) (((x) >> BIT_SHIFT_R_CCK_LEN_8822B) & BIT_MASK_R_CCK_LEN_8822B)
+
 
 
 /* 2 REG_RX_FILTER_FUNCTION_8822B */
@@ -9737,7 +10751,8 @@
 #define BIT_SHIFT_R_WMAC_TXNDP_SIGB_8822B 0
 #define BIT_MASK_R_WMAC_TXNDP_SIGB_8822B 0x1fffff
 #define BIT_R_WMAC_TXNDP_SIGB_8822B(x) (((x) & BIT_MASK_R_WMAC_TXNDP_SIGB_8822B) << BIT_SHIFT_R_WMAC_TXNDP_SIGB_8822B)
-#define BIT_GET_R_WMAC_TXNDP_SIGB_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_TXNDP_SIGB_8822B) & BIT_MASK_R_WMAC_TXNDP_SIGB_8822B)

+#define BIT_GET_R_WMAC_TXNDP_SIGB_8822B(x) (((x) >> BIT_SHIFT_R_WMAC_TXNDP_SIGB_8822B) & BIT_MASK_R_WMAC_TXNDP_SIGB_8822B)
+
 
 
 /* 2 REG_TXCMD_INFO_FOR_RSP_PKT_8822B */
@@ -9745,19 +10760,22 @@
 #define BIT_SHIFT_R_MAC_DEBUG_8822B (32 & CPU_OPT_WIDTH)
 #define BIT_MASK_R_MAC_DEBUG_8822B 0xffffffffL
 #define BIT_R_MAC_DEBUG_8822B(x) (((x) & BIT_MASK_R_MAC_DEBUG_8822B) << BIT_SHIFT_R_MAC_DEBUG_8822B)
-#define BIT_GET_R_MAC_DEBUG_8822B(x) (((x) >> BIT_SHIFT_R_MAC_DEBUG_8822B) & BIT_MASK_R_MAC_DEBUG_8822B)

+#define BIT_GET_R_MAC_DEBUG_8822B(x) (((x) >> BIT_SHIFT_R_MAC_DEBUG_8822B) & BIT_MASK_R_MAC_DEBUG_8822B)
+
 
 
 #define BIT_SHIFT_R_MAC_DBG_SHIFT_8822B 8
 #define BIT_MASK_R_MAC_DBG_SHIFT_8822B 0x7
 #define BIT_R_MAC_DBG_SHIFT_8822B(x) (((x) & BIT_MASK_R_MAC_DBG_SHIFT_8822B) << BIT_SHIFT_R_MAC_DBG_SHIFT_8822B)
-#define BIT_GET_R_MAC_DBG_SHIFT_8822B(x) (((x) >> BIT_SHIFT_R_MAC_DBG_SHIFT_8822B) & BIT_MASK_R_MAC_DBG_SHIFT_8822B)

+#define BIT_GET_R_MAC_DBG_SHIFT_8822B(x) (((x) >> BIT_SHIFT_R_MAC_DBG_SHIFT_8822B) & BIT_MASK_R_MAC_DBG_SHIFT_8822B)
+
 
 
 #define BIT_SHIFT_R_MAC_DBG_SEL_8822B 0
 #define BIT_MASK_R_MAC_DBG_SEL_8822B 0x3
 #define BIT_R_MAC_DBG_SEL_8822B(x) (((x) & BIT_MASK_R_MAC_DBG_SEL_8822B) << BIT_SHIFT_R_MAC_DBG_SEL_8822B)
-#define BIT_GET_R_MAC_DBG_SEL_8822B(x) (((x) >> BIT_SHIFT_R_MAC_DBG_SEL_8822B) & BIT_MASK_R_MAC_DBG_SEL_8822B)

+#define BIT_GET_R_MAC_DBG_SEL_8822B(x) (((x) >> BIT_SHIFT_R_MAC_DBG_SEL_8822B) & BIT_MASK_R_MAC_DBG_SEL_8822B)
+
 
 
 /* 2 REG_RTS_ADDRESS_0_8822B */
@@ -9790,13 +10808,15 @@
 #define BIT_SHIFT_WRITE_BYTE_EN_V1_8822B 16
 #define BIT_MASK_WRITE_BYTE_EN_V1_8822B 0xf
 #define BIT_WRITE_BYTE_EN_V1_8822B(x) (((x) & BIT_MASK_WRITE_BYTE_EN_V1_8822B) << BIT_SHIFT_WRITE_BYTE_EN_V1_8822B)
-#define BIT_GET_WRITE_BYTE_EN_V1_8822B(x) (((x) >> BIT_SHIFT_WRITE_BYTE_EN_V1_8822B) & BIT_MASK_WRITE_BYTE_EN_V1_8822B)

+#define BIT_GET_WRITE_BYTE_EN_V1_8822B(x) (((x) >> BIT_SHIFT_WRITE_BYTE_EN_V1_8822B) & BIT_MASK_WRITE_BYTE_EN_V1_8822B)
+
 
 
 #define BIT_SHIFT_LTECOEX_REG_ADDR_V1_8822B 0
 #define BIT_MASK_LTECOEX_REG_ADDR_V1_8822B 0xffff
 #define BIT_LTECOEX_REG_ADDR_V1_8822B(x) (((x) & BIT_MASK_LTECOEX_REG_ADDR_V1_8822B) << BIT_SHIFT_LTECOEX_REG_ADDR_V1_8822B)
-#define BIT_GET_LTECOEX_REG_ADDR_V1_8822B(x) (((x) >> BIT_SHIFT_LTECOEX_REG_ADDR_V1_8822B) & BIT_MASK_LTECOEX_REG_ADDR_V1_8822B)

+#define BIT_GET_LTECOEX_REG_ADDR_V1_8822B(x) (((x) >> BIT_SHIFT_LTECOEX_REG_ADDR_V1_8822B) & BIT_MASK_LTECOEX_REG_ADDR_V1_8822B)
+
 
 
 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_WRITE_DATA_V1_8822B */
@@ -9804,7 +10824,8 @@
 #define BIT_SHIFT_LTECOEX_W_DATA_V1_8822B 0
 #define BIT_MASK_LTECOEX_W_DATA_V1_8822B 0xffffffffL
 #define BIT_LTECOEX_W_DATA_V1_8822B(x) (((x) & BIT_MASK_LTECOEX_W_DATA_V1_8822B) << BIT_SHIFT_LTECOEX_W_DATA_V1_8822B)
-#define BIT_GET_LTECOEX_W_DATA_V1_8822B(x) (((x) >> BIT_SHIFT_LTECOEX_W_DATA_V1_8822B) & BIT_MASK_LTECOEX_W_DATA_V1_8822B)

+#define BIT_GET_LTECOEX_W_DATA_V1_8822B(x) (((x) >> BIT_SHIFT_LTECOEX_W_DATA_V1_8822B) & BIT_MASK_LTECOEX_W_DATA_V1_8822B)
+
 
 
 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_READ_DATA_V1_8822B */
@@ -9812,7 +10833,8 @@
 #define BIT_SHIFT_LTECOEX_R_DATA_V1_8822B 0
 #define BIT_MASK_LTECOEX_R_DATA_V1_8822B 0xffffffffL
 #define BIT_LTECOEX_R_DATA_V1_8822B(x) (((x) & BIT_MASK_LTECOEX_R_DATA_V1_8822B) << BIT_SHIFT_LTECOEX_R_DATA_V1_8822B)
-#define BIT_GET_LTECOEX_R_DATA_V1_8822B(x) (((x) >> BIT_SHIFT_LTECOEX_R_DATA_V1_8822B) & BIT_MASK_LTECOEX_R_DATA_V1_8822B)

+#define BIT_GET_LTECOEX_R_DATA_V1_8822B(x) (((x) >> BIT_SHIFT_LTECOEX_R_DATA_V1_8822B) & BIT_MASK_LTECOEX_R_DATA_V1_8822B)
+
 
 
 /* 2 REG_NOT_VALID_8822B */
@@ -9822,7 +10844,8 @@
 #define BIT_SHIFT_SDIO_INT_TIMEOUT_8822B 16
 #define BIT_MASK_SDIO_INT_TIMEOUT_8822B 0xffff
 #define BIT_SDIO_INT_TIMEOUT_8822B(x) (((x) & BIT_MASK_SDIO_INT_TIMEOUT_8822B) << BIT_SHIFT_SDIO_INT_TIMEOUT_8822B)
-#define BIT_GET_SDIO_INT_TIMEOUT_8822B(x) (((x) >> BIT_SHIFT_SDIO_INT_TIMEOUT_8822B) & BIT_MASK_SDIO_INT_TIMEOUT_8822B)

+#define BIT_GET_SDIO_INT_TIMEOUT_8822B(x) (((x) >> BIT_SHIFT_SDIO_INT_TIMEOUT_8822B) & BIT_MASK_SDIO_INT_TIMEOUT_8822B)
+
 
 #define BIT_IO_ERR_STATUS_8822B BIT(15)
 #define BIT_REPLY_ERRCRC_IN_DATA_8822B BIT(9)
@@ -9891,7 +10914,8 @@
 #define BIT_SHIFT_RX_REQ_LEN_V1_8822B 0
 #define BIT_MASK_RX_REQ_LEN_V1_8822B 0x3ffff
 #define BIT_RX_REQ_LEN_V1_8822B(x) (((x) & BIT_MASK_RX_REQ_LEN_V1_8822B) << BIT_SHIFT_RX_REQ_LEN_V1_8822B)
-#define BIT_GET_RX_REQ_LEN_V1_8822B(x) (((x) >> BIT_SHIFT_RX_REQ_LEN_V1_8822B) & BIT_MASK_RX_REQ_LEN_V1_8822B)

+#define BIT_GET_RX_REQ_LEN_V1_8822B(x) (((x) >> BIT_SHIFT_RX_REQ_LEN_V1_8822B) & BIT_MASK_RX_REQ_LEN_V1_8822B)
+
 
 
 /* 2 REG_SDIO_FREE_TXPG_SEQ_V1_8822B */
@@ -9899,7 +10923,8 @@
 #define BIT_SHIFT_FREE_TXPG_SEQ_8822B 0
 #define BIT_MASK_FREE_TXPG_SEQ_8822B 0xff
 #define BIT_FREE_TXPG_SEQ_8822B(x) (((x) & BIT_MASK_FREE_TXPG_SEQ_8822B) << BIT_SHIFT_FREE_TXPG_SEQ_8822B)
-#define BIT_GET_FREE_TXPG_SEQ_8822B(x) (((x) >> BIT_SHIFT_FREE_TXPG_SEQ_8822B) & BIT_MASK_FREE_TXPG_SEQ_8822B)

+#define BIT_GET_FREE_TXPG_SEQ_8822B(x) (((x) >> BIT_SHIFT_FREE_TXPG_SEQ_8822B) & BIT_MASK_FREE_TXPG_SEQ_8822B)
+
 
 
 /* 2 REG_SDIO_FREE_TXPG_8822B */
@@ -9907,13 +10932,15 @@
 #define BIT_SHIFT_MID_FREEPG_V1_8822B 16
 #define BIT_MASK_MID_FREEPG_V1_8822B 0xfff
 #define BIT_MID_FREEPG_V1_8822B(x) (((x) & BIT_MASK_MID_FREEPG_V1_8822B) << BIT_SHIFT_MID_FREEPG_V1_8822B)
-#define BIT_GET_MID_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_MID_FREEPG_V1_8822B) & BIT_MASK_MID_FREEPG_V1_8822B)

+#define BIT_GET_MID_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_MID_FREEPG_V1_8822B) & BIT_MASK_MID_FREEPG_V1_8822B)
+
 
 
 #define BIT_SHIFT_HIQ_FREEPG_V1_8822B 0
 #define BIT_MASK_HIQ_FREEPG_V1_8822B 0xfff
 #define BIT_HIQ_FREEPG_V1_8822B(x) (((x) & BIT_MASK_HIQ_FREEPG_V1_8822B) << BIT_SHIFT_HIQ_FREEPG_V1_8822B)
-#define BIT_GET_HIQ_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_HIQ_FREEPG_V1_8822B) & BIT_MASK_HIQ_FREEPG_V1_8822B)

+#define BIT_GET_HIQ_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_HIQ_FREEPG_V1_8822B) & BIT_MASK_HIQ_FREEPG_V1_8822B)
+
 
 
 /* 2 REG_SDIO_FREE_TXPG2_8822B */
@@ -9921,13 +10948,15 @@
 #define BIT_SHIFT_PUB_FREEPG_V1_8822B 16
 #define BIT_MASK_PUB_FREEPG_V1_8822B 0xfff
 #define BIT_PUB_FREEPG_V1_8822B(x) (((x) & BIT_MASK_PUB_FREEPG_V1_8822B) << BIT_SHIFT_PUB_FREEPG_V1_8822B)
-#define BIT_GET_PUB_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_PUB_FREEPG_V1_8822B) & BIT_MASK_PUB_FREEPG_V1_8822B)

+#define BIT_GET_PUB_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_PUB_FREEPG_V1_8822B) & BIT_MASK_PUB_FREEPG_V1_8822B)
+
 
 
 #define BIT_SHIFT_LOW_FREEPG_V1_8822B 0
 #define BIT_MASK_LOW_FREEPG_V1_8822B 0xfff
 #define BIT_LOW_FREEPG_V1_8822B(x) (((x) & BIT_MASK_LOW_FREEPG_V1_8822B) << BIT_SHIFT_LOW_FREEPG_V1_8822B)
-#define BIT_GET_LOW_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_LOW_FREEPG_V1_8822B) & BIT_MASK_LOW_FREEPG_V1_8822B)

+#define BIT_GET_LOW_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_LOW_FREEPG_V1_8822B) & BIT_MASK_LOW_FREEPG_V1_8822B)
+
 
 
 /* 2 REG_SDIO_OQT_FREE_TXPG_V1_8822B */
@@ -9935,19 +10964,22 @@
 #define BIT_SHIFT_NOAC_OQT_FREEPG_V1_8822B 24
 #define BIT_MASK_NOAC_OQT_FREEPG_V1_8822B 0xff
 #define BIT_NOAC_OQT_FREEPG_V1_8822B(x) (((x) & BIT_MASK_NOAC_OQT_FREEPG_V1_8822B) << BIT_SHIFT_NOAC_OQT_FREEPG_V1_8822B)
-#define BIT_GET_NOAC_OQT_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_NOAC_OQT_FREEPG_V1_8822B) & BIT_MASK_NOAC_OQT_FREEPG_V1_8822B)

+#define BIT_GET_NOAC_OQT_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_NOAC_OQT_FREEPG_V1_8822B) & BIT_MASK_NOAC_OQT_FREEPG_V1_8822B)
+
 
 
 #define BIT_SHIFT_AC_OQT_FREEPG_V1_8822B 16
 #define BIT_MASK_AC_OQT_FREEPG_V1_8822B 0xff
 #define BIT_AC_OQT_FREEPG_V1_8822B(x) (((x) & BIT_MASK_AC_OQT_FREEPG_V1_8822B) << BIT_SHIFT_AC_OQT_FREEPG_V1_8822B)
-#define BIT_GET_AC_OQT_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_AC_OQT_FREEPG_V1_8822B) & BIT_MASK_AC_OQT_FREEPG_V1_8822B)

+#define BIT_GET_AC_OQT_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_AC_OQT_FREEPG_V1_8822B) & BIT_MASK_AC_OQT_FREEPG_V1_8822B)
+
 
 
 #define BIT_SHIFT_EXQ_FREEPG_V1_8822B 0
 #define BIT_MASK_EXQ_FREEPG_V1_8822B 0xfff
 #define BIT_EXQ_FREEPG_V1_8822B(x) (((x) & BIT_MASK_EXQ_FREEPG_V1_8822B) << BIT_SHIFT_EXQ_FREEPG_V1_8822B)
-#define BIT_GET_EXQ_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_EXQ_FREEPG_V1_8822B) & BIT_MASK_EXQ_FREEPG_V1_8822B)

+#define BIT_GET_EXQ_FREEPG_V1_8822B(x) (((x) >> BIT_SHIFT_EXQ_FREEPG_V1_8822B) & BIT_MASK_EXQ_FREEPG_V1_8822B)
+
 
 
 /* 2 REG_SDIO_HTSFR_INFO_8822B */
@@ -9955,13 +10987,15 @@
 #define BIT_SHIFT_HTSFR1_8822B 16
 #define BIT_MASK_HTSFR1_8822B 0xffff
 #define BIT_HTSFR1_8822B(x) (((x) & BIT_MASK_HTSFR1_8822B) << BIT_SHIFT_HTSFR1_8822B)
-#define BIT_GET_HTSFR1_8822B(x) (((x) >> BIT_SHIFT_HTSFR1_8822B) & BIT_MASK_HTSFR1_8822B)

+#define BIT_GET_HTSFR1_8822B(x) (((x) >> BIT_SHIFT_HTSFR1_8822B) & BIT_MASK_HTSFR1_8822B)
+
 
 
 #define BIT_SHIFT_HTSFR0_8822B 0
 #define BIT_MASK_HTSFR0_8822B 0xffff
 #define BIT_HTSFR0_8822B(x) (((x) & BIT_MASK_HTSFR0_8822B) << BIT_SHIFT_HTSFR0_8822B)
-#define BIT_GET_HTSFR0_8822B(x) (((x) >> BIT_SHIFT_HTSFR0_8822B) & BIT_MASK_HTSFR0_8822B)

+#define BIT_GET_HTSFR0_8822B(x) (((x) >> BIT_SHIFT_HTSFR0_8822B) & BIT_MASK_HTSFR0_8822B)
+
 
 
 /* 2 REG_SDIO_HCPWM1_V2_8822B */
@@ -9979,13 +11013,15 @@
 #define BIT_SHIFT_INDIRECT_REG_SIZE_8822B 16
 #define BIT_MASK_INDIRECT_REG_SIZE_8822B 0x3
 #define BIT_INDIRECT_REG_SIZE_8822B(x) (((x) & BIT_MASK_INDIRECT_REG_SIZE_8822B) << BIT_SHIFT_INDIRECT_REG_SIZE_8822B)
-#define BIT_GET_INDIRECT_REG_SIZE_8822B(x) (((x) >> BIT_SHIFT_INDIRECT_REG_SIZE_8822B) & BIT_MASK_INDIRECT_REG_SIZE_8822B)

+#define BIT_GET_INDIRECT_REG_SIZE_8822B(x) (((x) >> BIT_SHIFT_INDIRECT_REG_SIZE_8822B) & BIT_MASK_INDIRECT_REG_SIZE_8822B)
+
 
 
 #define BIT_SHIFT_INDIRECT_REG_ADDR_8822B 0
 #define BIT_MASK_INDIRECT_REG_ADDR_8822B 0xffff
 #define BIT_INDIRECT_REG_ADDR_8822B(x) (((x) & BIT_MASK_INDIRECT_REG_ADDR_8822B) << BIT_SHIFT_INDIRECT_REG_ADDR_8822B)
-#define BIT_GET_INDIRECT_REG_ADDR_8822B(x) (((x) >> BIT_SHIFT_INDIRECT_REG_ADDR_8822B) & BIT_MASK_INDIRECT_REG_ADDR_8822B)

+#define BIT_GET_INDIRECT_REG_ADDR_8822B(x) (((x) >> BIT_SHIFT_INDIRECT_REG_ADDR_8822B) & BIT_MASK_INDIRECT_REG_ADDR_8822B)
+
 
 
 /* 2 REG_SDIO_INDIRECT_REG_DATA_8822B */
@@ -9993,7 +11029,8 @@
 #define BIT_SHIFT_INDIRECT_REG_DATA_8822B 0
 #define BIT_MASK_INDIRECT_REG_DATA_8822B 0xffffffffL
 #define BIT_INDIRECT_REG_DATA_8822B(x) (((x) & BIT_MASK_INDIRECT_REG_DATA_8822B) << BIT_SHIFT_INDIRECT_REG_DATA_8822B)
-#define BIT_GET_INDIRECT_REG_DATA_8822B(x) (((x) >> BIT_SHIFT_INDIRECT_REG_DATA_8822B) & BIT_MASK_INDIRECT_REG_DATA_8822B)

+#define BIT_GET_INDIRECT_REG_DATA_8822B(x) (((x) >> BIT_SHIFT_INDIRECT_REG_DATA_8822B) & BIT_MASK_INDIRECT_REG_DATA_8822B)
+
 
 
 /* 2 REG_SDIO_H2C_8822B */
@@ -10001,7 +11038,8 @@
 #define BIT_SHIFT_SDIO_H2C_MSG_8822B 0
 #define BIT_MASK_SDIO_H2C_MSG_8822B 0xffffffffL
 #define BIT_SDIO_H2C_MSG_8822B(x) (((x) & BIT_MASK_SDIO_H2C_MSG_8822B) << BIT_SHIFT_SDIO_H2C_MSG_8822B)
-#define BIT_GET_SDIO_H2C_MSG_8822B(x) (((x) >> BIT_SHIFT_SDIO_H2C_MSG_8822B) & BIT_MASK_SDIO_H2C_MSG_8822B)

+#define BIT_GET_SDIO_H2C_MSG_8822B(x) (((x) >> BIT_SHIFT_SDIO_H2C_MSG_8822B) & BIT_MASK_SDIO_H2C_MSG_8822B)
+
 
 
 /* 2 REG_SDIO_C2H_8822B */
@@ -10009,7 +11047,8 @@
 #define BIT_SHIFT_SDIO_C2H_MSG_8822B 0
 #define BIT_MASK_SDIO_C2H_MSG_8822B 0xffffffffL
 #define BIT_SDIO_C2H_MSG_8822B(x) (((x) & BIT_MASK_SDIO_C2H_MSG_8822B) << BIT_SHIFT_SDIO_C2H_MSG_8822B)
-#define BIT_GET_SDIO_C2H_MSG_8822B(x) (((x) >> BIT_SHIFT_SDIO_C2H_MSG_8822B) & BIT_MASK_SDIO_C2H_MSG_8822B)

+#define BIT_GET_SDIO_C2H_MSG_8822B(x) (((x) >> BIT_SHIFT_SDIO_C2H_MSG_8822B) & BIT_MASK_SDIO_C2H_MSG_8822B)
+
 
 
 /* 2 REG_SDIO_HRPWM1_8822B */
@@ -10039,7 +11078,8 @@
 #define BIT_SHIFT_CMDIN_2RESP_TIMER_8822B 0
 #define BIT_MASK_CMDIN_2RESP_TIMER_8822B 0xffff
 #define BIT_CMDIN_2RESP_TIMER_8822B(x) (((x) & BIT_MASK_CMDIN_2RESP_TIMER_8822B) << BIT_SHIFT_CMDIN_2RESP_TIMER_8822B)
-#define BIT_GET_CMDIN_2RESP_TIMER_8822B(x) (((x) >> BIT_SHIFT_CMDIN_2RESP_TIMER_8822B) & BIT_MASK_CMDIN_2RESP_TIMER_8822B)

+#define BIT_GET_CMDIN_2RESP_TIMER_8822B(x) (((x) >> BIT_SHIFT_CMDIN_2RESP_TIMER_8822B) & BIT_MASK_CMDIN_2RESP_TIMER_8822B)
+
 
 
 /* 2 REG_SDIO_CMD_CRC_8822B */
@@ -10047,7 +11087,8 @@
 #define BIT_SHIFT_SDIO_CMD_CRC_V1_8822B 0
 #define BIT_MASK_SDIO_CMD_CRC_V1_8822B 0xff
 #define BIT_SDIO_CMD_CRC_V1_8822B(x) (((x) & BIT_MASK_SDIO_CMD_CRC_V1_8822B) << BIT_SHIFT_SDIO_CMD_CRC_V1_8822B)
-#define BIT_GET_SDIO_CMD_CRC_V1_8822B(x) (((x) >> BIT_SHIFT_SDIO_CMD_CRC_V1_8822B) & BIT_MASK_SDIO_CMD_CRC_V1_8822B)

+#define BIT_GET_SDIO_CMD_CRC_V1_8822B(x) (((x) >> BIT_SHIFT_SDIO_CMD_CRC_V1_8822B) & BIT_MASK_SDIO_CMD_CRC_V1_8822B)
+
 
 
 /* 2 REG_SDIO_HSISR_8822B */
@@ -10071,7 +11112,8 @@
 #define BIT_SHIFT_CMD_CRC_ERR_CNT_8822B 0
 #define BIT_MASK_CMD_CRC_ERR_CNT_8822B 0xff
 #define BIT_CMD_CRC_ERR_CNT_8822B(x) (((x) & BIT_MASK_CMD_CRC_ERR_CNT_8822B) << BIT_SHIFT_CMD_CRC_ERR_CNT_8822B)
-#define BIT_GET_CMD_CRC_ERR_CNT_8822B(x) (((x) >> BIT_SHIFT_CMD_CRC_ERR_CNT_8822B) & BIT_MASK_CMD_CRC_ERR_CNT_8822B)

+#define BIT_GET_CMD_CRC_ERR_CNT_8822B(x) (((x) >> BIT_SHIFT_CMD_CRC_ERR_CNT_8822B) & BIT_MASK_CMD_CRC_ERR_CNT_8822B)
+
 
 
 /* 2 REG_SDIO_DATA_ERRCNT_8822B */
@@ -10079,7 +11121,8 @@
 #define BIT_SHIFT_DATA_CRC_ERR_CNT_8822B 0
 #define BIT_MASK_DATA_CRC_ERR_CNT_8822B 0xff
 #define BIT_DATA_CRC_ERR_CNT_8822B(x) (((x) & BIT_MASK_DATA_CRC_ERR_CNT_8822B) << BIT_SHIFT_DATA_CRC_ERR_CNT_8822B)
-#define BIT_GET_DATA_CRC_ERR_CNT_8822B(x) (((x) >> BIT_SHIFT_DATA_CRC_ERR_CNT_8822B) & BIT_MASK_DATA_CRC_ERR_CNT_8822B)

+#define BIT_GET_DATA_CRC_ERR_CNT_8822B(x) (((x) >> BIT_SHIFT_DATA_CRC_ERR_CNT_8822B) & BIT_MASK_DATA_CRC_ERR_CNT_8822B)
+
 
 
 /* 2 REG_SDIO_CMD_ERR_CONTENT_8822B */
@@ -10087,7 +11130,8 @@
 #define BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8822B 0
 #define BIT_MASK_SDIO_CMD_ERR_CONTENT_8822B 0xffffffffffL
 #define BIT_SDIO_CMD_ERR_CONTENT_8822B(x) (((x) & BIT_MASK_SDIO_CMD_ERR_CONTENT_8822B) << BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8822B)
-#define BIT_GET_SDIO_CMD_ERR_CONTENT_8822B(x) (((x) >> BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8822B) & BIT_MASK_SDIO_CMD_ERR_CONTENT_8822B)

+#define BIT_GET_SDIO_CMD_ERR_CONTENT_8822B(x) (((x) >> BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8822B) & BIT_MASK_SDIO_CMD_ERR_CONTENT_8822B)
+
 
 
 /* 2 REG_SDIO_CRC_ERR_IDX_8822B */
@@ -10102,7 +11146,8 @@
 #define BIT_SHIFT_SDIO_DATA_CRC_8822B 0
 #define BIT_MASK_SDIO_DATA_CRC_8822B 0xff
 #define BIT_SDIO_DATA_CRC_8822B(x) (((x) & BIT_MASK_SDIO_DATA_CRC_8822B) << BIT_SHIFT_SDIO_DATA_CRC_8822B)
-#define BIT_GET_SDIO_DATA_CRC_8822B(x) (((x) >> BIT_SHIFT_SDIO_DATA_CRC_8822B) & BIT_MASK_SDIO_DATA_CRC_8822B)

+#define BIT_GET_SDIO_DATA_CRC_8822B(x) (((x) >> BIT_SHIFT_SDIO_DATA_CRC_8822B) & BIT_MASK_SDIO_DATA_CRC_8822B)
+
 
 
 /* 2 REG_SDIO_DATA_REPLY_TIME_8822B */
@@ -10110,7 +11155,8 @@
 #define BIT_SHIFT_SDIO_DATA_REPLY_TIME_8822B 0
 #define BIT_MASK_SDIO_DATA_REPLY_TIME_8822B 0x7
 #define BIT_SDIO_DATA_REPLY_TIME_8822B(x) (((x) & BIT_MASK_SDIO_DATA_REPLY_TIME_8822B) << BIT_SHIFT_SDIO_DATA_REPLY_TIME_8822B)
-#define BIT_GET_SDIO_DATA_REPLY_TIME_8822B(x) (((x) >> BIT_SHIFT_SDIO_DATA_REPLY_TIME_8822B) & BIT_MASK_SDIO_DATA_REPLY_TIME_8822B)

+#define BIT_GET_SDIO_DATA_REPLY_TIME_8822B(x) (((x) >> BIT_SHIFT_SDIO_DATA_REPLY_TIME_8822B) & BIT_MASK_SDIO_DATA_REPLY_TIME_8822B)
+
 
 
 #endif
diff --git a/rtl8822BU/hal/halmac/halmac_fw_info.h b/rtl8822BU/hal/halmac/halmac_fw_info.h
index 877e46d..5d2a0a7 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_fw_info.h
+++ b/rtl8822BU/hal/halmac/halmac_fw_info.h
@@ -1,13 +1,28 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_FW_INFO_H_
 #define _HALMAC_FW_INFO_H_
 
-#define H2C_FORMAT_VERSION              5
+#define H2C_FORMAT_VERSION              6
 
 #define H2C_ACK_HDR_CONTENT_LENGTH          8
 #define CFG_PARAMETER_ACK_CONTENT_LENGTH    16
 #define SCAN_STATUS_RPT_CONTENT_LENGTH      4
 #define C2H_DBG_HEADER_LENGTH               4
-#define C2H_DBG_CONTENT_MAX_LENGTH                      228
+#define C2H_DBG_CONTENT_MAX_LENGTH			228
 
 #define C2H_DBG_CONTENT_SEQ_OFFSET          1
 
diff --git a/rtl8822BU/hal/halmac/halmac_fw_offload_c2h_ap.h b/rtl8822BU/hal/halmac/halmac_fw_offload_c2h_ap.h
index 01ca99d..ddd3fbe 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_fw_offload_c2h_ap.h
+++ b/rtl8822BU/hal/halmac/halmac_fw_offload_c2h_ap.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HAL_FWOFFLOADC2HFORMAT_H2C_C2H_AP_H_
 #define _HAL_FWOFFLOADC2HFORMAT_H2C_C2H_AP_H_
 #define C2H_SUB_CMD_ID_C2H_DBG  0X00
@@ -17,6 +32,19 @@
 #define C2H_SUB_CMD_ID_PSD_DATA  0X04
 #define C2H_SUB_CMD_ID_EFUSE_DATA  0X05
 #define C2H_SUB_CMD_ID_IQK_DATA  0X06
+#define C2H_SUB_CMD_ID_C2H_PKT_FTM_DBG   0X07
+#define C2H_SUB_CMD_ID_C2H_PKT_FTM_2_DBG  0X08
+#define C2H_SUB_CMD_ID_C2H_PKT_FTM_3_DBG  0X09
+#define C2H_SUB_CMD_ID_C2H_PKT_FTM_4_DBG    0X0A
+#define C2H_SUB_CMD_ID_FTMACKRPT_HDL_DBG  0X0B
+#define C2H_SUB_CMD_ID_FTMC2H_RPT        0X0C
+#define C2H_SUB_CMD_ID_DRVFTMC2H_RPT  0X0D
+#define C2H_SUB_CMD_ID_C2H_PKT_FTM_5_DBG  0X0E
+#define C2H_SUB_CMD_ID_CCX_RPT  0X0F
+#define C2H_SUB_CMD_ID_C2H_PKT_NAN_RPT  0X10
+#define C2H_SUB_CMD_ID_C2H_PKT_ATM_RPT  0X11
+#define C2H_SUB_CMD_ID_C2H_PKT_FTMSESSION_END  0X1C
+#define C2H_SUB_CMD_ID_C2H_PKT_DETECT_THERMAL  0X1D
 #define H2C_SUB_CMD_ID_CFG_PARAMETER_ACK SUB_CMD_ID_CFG_PARAMETER
 #define H2C_SUB_CMD_ID_BT_COEX_ACK SUB_CMD_ID_BT_COEX
 #define H2C_SUB_CMD_ID_DUMP_PHYSICAL_EFUSE_ACK SUB_CMD_ID_DUMP_PHYSICAL_EFUSE
@@ -27,6 +55,7 @@
 #define H2C_SUB_CMD_ID_IQK_ACK SUB_CMD_ID_IQK
 #define H2C_SUB_CMD_ID_POWER_TRACKING_ACK SUB_CMD_ID_POWER_TRACKING
 #define H2C_SUB_CMD_ID_PSD_ACK SUB_CMD_ID_PSD
+#define H2C_SUB_CMD_ID_CCX_RPT SUB_CMD_ID_CCX_RPT
 #define H2C_CMD_ID_CFG_PARAMETER_ACK  0XFF
 #define H2C_CMD_ID_BT_COEX_ACK  0XFF
 #define H2C_CMD_ID_DUMP_PHYSICAL_EFUSE_ACK  0XFF
@@ -37,6 +66,7 @@
 #define H2C_CMD_ID_IQK_ACK  0XFF
 #define H2C_CMD_ID_POWER_TRACKING_ACK  0XFF
 #define H2C_CMD_ID_PSD_ACK  0XFF
+#define H2C_CMD_ID_CCX_RPT  0XFF
 #define C2H_HDR_GET_CMD_ID(__pC2H)    GET_C2H_FIELD(__pC2H + 0X00, 0, 8)
 #define C2H_HDR_SET_CMD_ID(__pC2H, __Value)    SET_C2H_FIELD_CLR(__pC2H + 0X00, 0, 8, __Value)
 #define C2H_HDR_SET_CMD_ID_NO_CLR(__pC2H, __Value)    SET_C2H_FIELD_NO_CLR(__pC2H + 0X00, 0, 8, __Value)
@@ -136,4 +166,7 @@
 #define IQK_DATA_GET_DATA_START(__pC2H)    GET_C2H_FIELD(__pC2H + 0X8, 16, 8)
 #define IQK_DATA_SET_DATA_START(__pC2H, __Value)    SET_C2H_FIELD_CLR(__pC2H + 0X8, 16, 8, __Value)
 #define IQK_DATA_SET_DATA_START_NO_CLR(__pC2H, __Value)    SET_C2H_FIELD_NO_CLR(__pC2H + 0X8, 16, 8, __Value)
+#define CCX_RPT_GET_CCX_RPT(__pC2H)    GET_C2H_FIELD(__pC2H + 0X4, 0, 129)
+#define CCX_RPT_SET_CCX_RPT(__pC2H, __Value)    SET_C2H_FIELD_CLR(__pC2H + 0X4, 0, 129, __Value)
+#define CCX_RPT_SET_CCX_RPT_NO_CLR(__pC2H, __Value)    SET_C2H_FIELD_NO_CLR(__pC2H + 0X4, 0, 129, __Value)
 #endif
diff --git a/rtl8822BU/hal/halmac/halmac_fw_offload_c2h_nic.h b/rtl8822BU/hal/halmac/halmac_fw_offload_c2h_nic.h
index af6ef0e..cbef4dd 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_fw_offload_c2h_nic.h
+++ b/rtl8822BU/hal/halmac/halmac_fw_offload_c2h_nic.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HAL_FWOFFLOADC2HFORMAT_H2C_C2H_NIC_H_
 #define _HAL_FWOFFLOADC2HFORMAT_H2C_C2H_NIC_H_
 #define C2H_SUB_CMD_ID_C2H_DBG  0X00
@@ -17,6 +32,19 @@
 #define C2H_SUB_CMD_ID_PSD_DATA  0X04
 #define C2H_SUB_CMD_ID_EFUSE_DATA  0X05
 #define C2H_SUB_CMD_ID_IQK_DATA  0X06
+#define C2H_SUB_CMD_ID_C2H_PKT_FTM_DBG   0X07
+#define C2H_SUB_CMD_ID_C2H_PKT_FTM_2_DBG  0X08
+#define C2H_SUB_CMD_ID_C2H_PKT_FTM_3_DBG  0X09
+#define C2H_SUB_CMD_ID_C2H_PKT_FTM_4_DBG    0X0A
+#define C2H_SUB_CMD_ID_FTMACKRPT_HDL_DBG  0X0B
+#define C2H_SUB_CMD_ID_FTMC2H_RPT        0X0C
+#define C2H_SUB_CMD_ID_DRVFTMC2H_RPT  0X0D
+#define C2H_SUB_CMD_ID_C2H_PKT_FTM_5_DBG  0X0E
+#define C2H_SUB_CMD_ID_CCX_RPT  0X0F
+#define C2H_SUB_CMD_ID_C2H_PKT_NAN_RPT  0X10
+#define C2H_SUB_CMD_ID_C2H_PKT_ATM_RPT  0X11
+#define C2H_SUB_CMD_ID_C2H_PKT_FTMSESSION_END  0X1C
+#define C2H_SUB_CMD_ID_C2H_PKT_DETECT_THERMAL  0X1D
 #define H2C_SUB_CMD_ID_CFG_PARAMETER_ACK SUB_CMD_ID_CFG_PARAMETER
 #define H2C_SUB_CMD_ID_BT_COEX_ACK SUB_CMD_ID_BT_COEX
 #define H2C_SUB_CMD_ID_DUMP_PHYSICAL_EFUSE_ACK SUB_CMD_ID_DUMP_PHYSICAL_EFUSE
@@ -27,6 +55,7 @@
 #define H2C_SUB_CMD_ID_IQK_ACK SUB_CMD_ID_IQK
 #define H2C_SUB_CMD_ID_POWER_TRACKING_ACK SUB_CMD_ID_POWER_TRACKING
 #define H2C_SUB_CMD_ID_PSD_ACK SUB_CMD_ID_PSD
+#define H2C_SUB_CMD_ID_CCX_RPT SUB_CMD_ID_CCX_RPT
 #define H2C_CMD_ID_CFG_PARAMETER_ACK  0XFF
 #define H2C_CMD_ID_BT_COEX_ACK  0XFF
 #define H2C_CMD_ID_DUMP_PHYSICAL_EFUSE_ACK  0XFF
@@ -37,6 +66,7 @@
 #define H2C_CMD_ID_IQK_ACK  0XFF
 #define H2C_CMD_ID_POWER_TRACKING_ACK  0XFF
 #define H2C_CMD_ID_PSD_ACK  0XFF
+#define H2C_CMD_ID_CCX_RPT  0XFF
 #define C2H_HDR_GET_CMD_ID(__pC2H)    LE_BITS_TO_4BYTE(__pC2H + 0X00, 0, 8)
 #define C2H_HDR_SET_CMD_ID(__pC2H, __Value)    SET_BITS_TO_LE_4BYTE(__pC2H + 0X00, 0, 8, __Value)
 #define C2H_HDR_GET_SEQ(__pC2H)    LE_BITS_TO_4BYTE(__pC2H + 0X00, 8, 8)
@@ -103,4 +133,6 @@
 #define IQK_DATA_SET_H2C_SEQ(__pC2H, __Value)    SET_BITS_TO_LE_4BYTE(__pC2H + 0X8, 0, 16, __Value)
 #define IQK_DATA_GET_DATA_START(__pC2H)    LE_BITS_TO_4BYTE(__pC2H + 0X8, 16, 8)
 #define IQK_DATA_SET_DATA_START(__pC2H, __Value)    SET_BITS_TO_LE_4BYTE(__pC2H + 0X8, 16, 8, __Value)
+#define CCX_RPT_GET_CCX_RPT(__pC2H)    LE_BITS_TO_4BYTE(__pC2H + 0X4, 0, 129)
+#define CCX_RPT_SET_CCX_RPT(__pC2H, __Value)    SET_BITS_TO_LE_4BYTE(__pC2H + 0X4, 0, 129, __Value)
 #endif
diff --git a/rtl8822BU/hal/halmac/halmac_fw_offload_h2c_ap.h b/rtl8822BU/hal/halmac/halmac_fw_offload_h2c_ap.h
index 7f1954f..e7caaab 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_fw_offload_h2c_ap.h
+++ b/rtl8822BU/hal/halmac/halmac_fw_offload_h2c_ap.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HAL_FWOFFLOADH2CFORMAT_H2C_C2H_AP_H_
 #define _HAL_FWOFFLOADH2CFORMAT_H2C_C2H_AP_H_
 #define CMD_ID_FW_OFFLOAD_H2C  0XFF
@@ -13,7 +28,11 @@
 #define CMD_ID_IQK  0XFF
 #define CMD_ID_POWER_TRACKING  0XFF
 #define CMD_ID_PSD  0XFF
+#define CMD_ID_P2PPS  0XFF
 #define CMD_ID_BT_COEX  0XFF
+#define CMD_ID_NAN_CTRL  0XFF
+#define CMD_ID_NAN_CHANNEL_PLAN_0  0XFF
+#define CMD_ID_NAN_CHANNEL_PLAN_1  0XFF
 #define CATEGORY_H2C_CMD_HEADER  0X00
 #define CATEGORY_FW_OFFLOAD_H2C  0X01
 #define CATEGORY_CHANNEL_SWITCH  0X01
@@ -28,7 +47,11 @@
 #define CATEGORY_IQK  0X01
 #define CATEGORY_POWER_TRACKING  0X01
 #define CATEGORY_PSD  0X01
+#define CATEGORY_P2PPS  0X01
 #define CATEGORY_BT_COEX  0X01
+#define CATEGORY_NAN_CTRL  0X01
+#define CATEGORY_NAN_CHANNEL_PLAN_0  0X01
+#define CATEGORY_NAN_CHANNEL_PLAN_1  0X01
 #define SUB_CMD_ID_CHANNEL_SWITCH  0X02
 #define SUB_CMD_ID_DUMP_PHYSICAL_EFUSE  0X03
 #define SUB_CMD_ID_UPDATE_BEACON_PARSING_INFO  0X05
@@ -41,7 +64,11 @@
 #define SUB_CMD_ID_IQK  0X0E
 #define SUB_CMD_ID_POWER_TRACKING  0X0F
 #define SUB_CMD_ID_PSD  0X10
+#define SUB_CMD_ID_P2PPS  0X24
 #define SUB_CMD_ID_BT_COEX  0X60
+#define SUB_CMD_ID_NAN_CTRL  0XB2
+#define SUB_CMD_ID_NAN_CHANNEL_PLAN_0  0XB4
+#define SUB_CMD_ID_NAN_CHANNEL_PLAN_1  0XB5
 #define H2C_CMD_HEADER_GET_CATEGORY(__pH2C)    GET_H2C_FIELD(__pH2C + 0X00, 0, 7)
 #define H2C_CMD_HEADER_SET_CATEGORY(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X00, 0, 7, __Value)
 #define H2C_CMD_HEADER_SET_CATEGORY_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X00, 0, 7, __Value)
@@ -201,6 +228,9 @@
 #define IQK_GET_CLEAR(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 0, 1)
 #define IQK_SET_CLEAR(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 0, 1, __Value)
 #define IQK_SET_CLEAR_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 0, 1, __Value)
+#define IQK_GET_SEGMENT_IQK(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 1, 1)
+#define IQK_SET_SEGMENT_IQK(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 1, 1, __Value)
+#define IQK_SET_SEGMENT_IQK_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 1, 1, __Value)
 #define POWER_TRACKING_GET_ENABLE_A(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 0, 1)
 #define POWER_TRACKING_SET_ENABLE_A(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 0, 1, __Value)
 #define POWER_TRACKING_SET_ENABLE_A_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 0, 1, __Value)
@@ -261,7 +291,145 @@
 #define PSD_GET_END_PSD(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 16, 16)
 #define PSD_SET_END_PSD(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 16, 16, __Value)
 #define PSD_SET_END_PSD_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 16, 16, __Value)
+#define P2PPS_GET_OFFLOAD_EN(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 0, 1)
+#define P2PPS_SET_OFFLOAD_EN(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 0, 1, __Value)
+#define P2PPS_SET_OFFLOAD_EN_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 0, 1, __Value)
+#define P2PPS_GET_ROLE(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 1, 1)
+#define P2PPS_SET_ROLE(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 1, 1, __Value)
+#define P2PPS_SET_ROLE_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 1, 1, __Value)
+#define P2PPS_GET_CTWINDOW_EN(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 2, 1)
+#define P2PPS_SET_CTWINDOW_EN(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 2, 1, __Value)
+#define P2PPS_SET_CTWINDOW_EN_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 2, 1, __Value)
+#define P2PPS_GET_NOA_EN(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 3, 1)
+#define P2PPS_SET_NOA_EN(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 3, 1, __Value)
+#define P2PPS_SET_NOA_EN_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 3, 1, __Value)
+#define P2PPS_GET_NOA_SEL(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 4, 1)
+#define P2PPS_SET_NOA_SEL(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 4, 1, __Value)
+#define P2PPS_SET_NOA_SEL_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 4, 1, __Value)
+#define P2PPS_GET_ALLSTASLEEP(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 5, 1)
+#define P2PPS_SET_ALLSTASLEEP(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 5, 1, __Value)
+#define P2PPS_SET_ALLSTASLEEP_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 5, 1, __Value)
+#define P2PPS_GET_DISCOVERY(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 6, 1)
+#define P2PPS_SET_DISCOVERY(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 6, 1, __Value)
+#define P2PPS_SET_DISCOVERY_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 6, 1, __Value)
+#define P2PPS_GET_P2P_PORT_ID(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 8, 8)
+#define P2PPS_SET_P2P_PORT_ID(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 8, 8, __Value)
+#define P2PPS_SET_P2P_PORT_ID_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 8, 8, __Value)
+#define P2PPS_GET_P2P_GROUP(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 16, 8)
+#define P2PPS_SET_P2P_GROUP(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 16, 8, __Value)
+#define P2PPS_SET_P2P_GROUP_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 16, 8, __Value)
+#define P2PPS_GET_P2P_MACID(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 24, 8)
+#define P2PPS_SET_P2P_MACID(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 24, 8, __Value)
+#define P2PPS_SET_P2P_MACID_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 24, 8, __Value)
+#define P2PPS_GET_CTWINDOW_LENGTH(__pH2C)    GET_H2C_FIELD(__pH2C + 0X0C, 0, 8)
+#define P2PPS_SET_CTWINDOW_LENGTH(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X0C, 0, 8, __Value)
+#define P2PPS_SET_CTWINDOW_LENGTH_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X0C, 0, 8, __Value)
+#define P2PPS_GET_NOA_DURATION_PARA(__pH2C)    GET_H2C_FIELD(__pH2C + 0X10, 0, 32)
+#define P2PPS_SET_NOA_DURATION_PARA(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X10, 0, 32, __Value)
+#define P2PPS_SET_NOA_DURATION_PARA_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X10, 0, 32, __Value)
+#define P2PPS_GET_NOA_INTERVAL_PARA(__pH2C)    GET_H2C_FIELD(__pH2C + 0X14, 0, 32)
+#define P2PPS_SET_NOA_INTERVAL_PARA(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X14, 0, 32, __Value)
+#define P2PPS_SET_NOA_INTERVAL_PARA_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X14, 0, 32, __Value)
+#define P2PPS_GET_NOA_START_TIME_PARA(__pH2C)    GET_H2C_FIELD(__pH2C + 0X18, 0, 32)
+#define P2PPS_SET_NOA_START_TIME_PARA(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X18, 0, 32, __Value)
+#define P2PPS_SET_NOA_START_TIME_PARA_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X18, 0, 32, __Value)
+#define P2PPS_GET_NOA_COUNT_PARA(__pH2C)    GET_H2C_FIELD(__pH2C + 0X1C, 0, 32)
+#define P2PPS_SET_NOA_COUNT_PARA(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X1C, 0, 32, __Value)
+#define P2PPS_SET_NOA_COUNT_PARA_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X1C, 0, 32, __Value)
 #define BT_COEX_GET_DATA_START(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 0, 8)
 #define BT_COEX_SET_DATA_START(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 0, 8, __Value)
 #define BT_COEX_SET_DATA_START_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 0, 8, __Value)
+#define NAN_CTRL_GET_NAN_EN(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 0, 2)
+#define NAN_CTRL_SET_NAN_EN(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 0, 2, __Value)
+#define NAN_CTRL_SET_NAN_EN_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 0, 2, __Value)
+#define NAN_CTRL_GET_SUPPORT_BAND(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 8, 2)
+#define NAN_CTRL_SET_SUPPORT_BAND(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 8, 2, __Value)
+#define NAN_CTRL_SET_SUPPORT_BAND_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 8, 2, __Value)
+#define NAN_CTRL_GET_DISABLE_2G_DISC_BCN(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 10, 1)
+#define NAN_CTRL_SET_DISABLE_2G_DISC_BCN(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 10, 1, __Value)
+#define NAN_CTRL_SET_DISABLE_2G_DISC_BCN_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 10, 1, __Value)
+#define NAN_CTRL_GET_DISABLE_5G_DISC_BCN(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 11, 1)
+#define NAN_CTRL_SET_DISABLE_5G_DISC_BCN(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 11, 1, __Value)
+#define NAN_CTRL_SET_DISABLE_5G_DISC_BCN_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 11, 1, __Value)
+#define NAN_CTRL_GET_BCN_RSVD_PAGE_OFFSET(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 16, 8)
+#define NAN_CTRL_SET_BCN_RSVD_PAGE_OFFSET(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 16, 8, __Value)
+#define NAN_CTRL_SET_BCN_RSVD_PAGE_OFFSET_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 16, 8, __Value)
+#define NAN_CTRL_GET_CHANNEL_2G(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 24, 8)
+#define NAN_CTRL_SET_CHANNEL_2G(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 24, 8, __Value)
+#define NAN_CTRL_SET_CHANNEL_2G_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 24, 8, __Value)
+#define NAN_CTRL_GET_CHANNEL_5G(__pH2C)    GET_H2C_FIELD(__pH2C + 0X0C, 0, 8)
+#define NAN_CTRL_SET_CHANNEL_5G(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X0C, 0, 8, __Value)
+#define NAN_CTRL_SET_CHANNEL_5G_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X0C, 0, 8, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_CHANNEL_NUMBER_0(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 0, 8)
+#define NAN_CHANNEL_PLAN_0_SET_CHANNEL_NUMBER_0(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 0, 8, __Value)
+#define NAN_CHANNEL_PLAN_0_SET_CHANNEL_NUMBER_0_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 0, 8, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_UNPAUSE_MACID_0(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 8, 8)
+#define NAN_CHANNEL_PLAN_0_SET_UNPAUSE_MACID_0(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 8, 8, __Value)
+#define NAN_CHANNEL_PLAN_0_SET_UNPAUSE_MACID_0_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 8, 8, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_START_TIME_SLOT_0(__pH2C)    GET_H2C_FIELD(__pH2C + 0X0C, 0, 16)
+#define NAN_CHANNEL_PLAN_0_SET_START_TIME_SLOT_0(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X0C, 0, 16, __Value)
+#define NAN_CHANNEL_PLAN_0_SET_START_TIME_SLOT_0_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X0C, 0, 16, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_DURATION_0(__pH2C)    GET_H2C_FIELD(__pH2C + 0X0C, 16, 16)
+#define NAN_CHANNEL_PLAN_0_SET_DURATION_0(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X0C, 16, 16, __Value)
+#define NAN_CHANNEL_PLAN_0_SET_DURATION_0_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X0C, 16, 16, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_CHANNEL_NUMBER_1(__pH2C)    GET_H2C_FIELD(__pH2C + 0X10, 0, 8)
+#define NAN_CHANNEL_PLAN_0_SET_CHANNEL_NUMBER_1(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X10, 0, 8, __Value)
+#define NAN_CHANNEL_PLAN_0_SET_CHANNEL_NUMBER_1_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X10, 0, 8, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_UNPAUSE_MACID_1(__pH2C)    GET_H2C_FIELD(__pH2C + 0X10, 8, 8)
+#define NAN_CHANNEL_PLAN_0_SET_UNPAUSE_MACID_1(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X10, 8, 8, __Value)
+#define NAN_CHANNEL_PLAN_0_SET_UNPAUSE_MACID_1_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X10, 8, 8, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_START_TIME_SLOT_1(__pH2C)    GET_H2C_FIELD(__pH2C + 0X14, 0, 16)
+#define NAN_CHANNEL_PLAN_0_SET_START_TIME_SLOT_1(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X14, 0, 16, __Value)
+#define NAN_CHANNEL_PLAN_0_SET_START_TIME_SLOT_1_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X14, 0, 16, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_DURATION_1(__pH2C)    GET_H2C_FIELD(__pH2C + 0X14, 16, 16)
+#define NAN_CHANNEL_PLAN_0_SET_DURATION_1(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X14, 16, 16, __Value)
+#define NAN_CHANNEL_PLAN_0_SET_DURATION_1_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X14, 16, 16, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_CHANNEL_NUMBER_2(__pH2C)    GET_H2C_FIELD(__pH2C + 0X18, 0, 8)
+#define NAN_CHANNEL_PLAN_0_SET_CHANNEL_NUMBER_2(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X18, 0, 8, __Value)
+#define NAN_CHANNEL_PLAN_0_SET_CHANNEL_NUMBER_2_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X18, 0, 8, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_UNPAUSE_MACID_2(__pH2C)    GET_H2C_FIELD(__pH2C + 0X18, 8, 8)
+#define NAN_CHANNEL_PLAN_0_SET_UNPAUSE_MACID_2(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X18, 8, 8, __Value)
+#define NAN_CHANNEL_PLAN_0_SET_UNPAUSE_MACID_2_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X18, 8, 8, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_START_TIME_SLOT_2(__pH2C)    GET_H2C_FIELD(__pH2C + 0X1C, 0, 16)
+#define NAN_CHANNEL_PLAN_0_SET_START_TIME_SLOT_2(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X1C, 0, 16, __Value)
+#define NAN_CHANNEL_PLAN_0_SET_START_TIME_SLOT_2_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X1C, 0, 16, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_DURATION_2(__pH2C)    GET_H2C_FIELD(__pH2C + 0X1C, 16, 16)
+#define NAN_CHANNEL_PLAN_0_SET_DURATION_2(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X1C, 16, 16, __Value)
+#define NAN_CHANNEL_PLAN_0_SET_DURATION_2_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X1C, 16, 16, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_CHANNEL_NUMBER_3(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 0, 8)
+#define NAN_CHANNEL_PLAN_1_SET_CHANNEL_NUMBER_3(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 0, 8, __Value)
+#define NAN_CHANNEL_PLAN_1_SET_CHANNEL_NUMBER_3_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 0, 8, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_UNPAUSE_MACID_3(__pH2C)    GET_H2C_FIELD(__pH2C + 0X08, 8, 8)
+#define NAN_CHANNEL_PLAN_1_SET_UNPAUSE_MACID_3(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X08, 8, 8, __Value)
+#define NAN_CHANNEL_PLAN_1_SET_UNPAUSE_MACID_3_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X08, 8, 8, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_START_TIME_SLOT_3(__pH2C)    GET_H2C_FIELD(__pH2C + 0X0C, 0, 16)
+#define NAN_CHANNEL_PLAN_1_SET_START_TIME_SLOT_3(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X0C, 0, 16, __Value)
+#define NAN_CHANNEL_PLAN_1_SET_START_TIME_SLOT_3_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X0C, 0, 16, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_DURATION_3(__pH2C)    GET_H2C_FIELD(__pH2C + 0X0C, 16, 16)
+#define NAN_CHANNEL_PLAN_1_SET_DURATION_3(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X0C, 16, 16, __Value)
+#define NAN_CHANNEL_PLAN_1_SET_DURATION_3_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X0C, 16, 16, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_CHANNEL_NUMBER_4(__pH2C)    GET_H2C_FIELD(__pH2C + 0X10, 0, 8)
+#define NAN_CHANNEL_PLAN_1_SET_CHANNEL_NUMBER_4(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X10, 0, 8, __Value)
+#define NAN_CHANNEL_PLAN_1_SET_CHANNEL_NUMBER_4_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X10, 0, 8, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_UNPAUSE_MACID_4(__pH2C)    GET_H2C_FIELD(__pH2C + 0X10, 8, 8)
+#define NAN_CHANNEL_PLAN_1_SET_UNPAUSE_MACID_4(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X10, 8, 8, __Value)
+#define NAN_CHANNEL_PLAN_1_SET_UNPAUSE_MACID_4_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X10, 8, 8, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_START_TIME_SLOT_4(__pH2C)    GET_H2C_FIELD(__pH2C + 0X14, 0, 16)
+#define NAN_CHANNEL_PLAN_1_SET_START_TIME_SLOT_4(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X14, 0, 16, __Value)
+#define NAN_CHANNEL_PLAN_1_SET_START_TIME_SLOT_4_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X14, 0, 16, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_DURATION_4(__pH2C)    GET_H2C_FIELD(__pH2C + 0X14, 16, 16)
+#define NAN_CHANNEL_PLAN_1_SET_DURATION_4(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X14, 16, 16, __Value)
+#define NAN_CHANNEL_PLAN_1_SET_DURATION_4_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X14, 16, 16, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_CHANNEL_NUMBER_5(__pH2C)    GET_H2C_FIELD(__pH2C + 0X18, 0, 8)
+#define NAN_CHANNEL_PLAN_1_SET_CHANNEL_NUMBER_5(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X18, 0, 8, __Value)
+#define NAN_CHANNEL_PLAN_1_SET_CHANNEL_NUMBER_5_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X18, 0, 8, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_UNPAUSE_MACID_5(__pH2C)    GET_H2C_FIELD(__pH2C + 0X18, 8, 8)
+#define NAN_CHANNEL_PLAN_1_SET_UNPAUSE_MACID_5(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X18, 8, 8, __Value)
+#define NAN_CHANNEL_PLAN_1_SET_UNPAUSE_MACID_5_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X18, 8, 8, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_START_TIME_SLOT_5(__pH2C)    GET_H2C_FIELD(__pH2C + 0X1C, 0, 16)
+#define NAN_CHANNEL_PLAN_1_SET_START_TIME_SLOT_5(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X1C, 0, 16, __Value)
+#define NAN_CHANNEL_PLAN_1_SET_START_TIME_SLOT_5_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X1C, 0, 16, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_DURATION_5(__pH2C)    GET_H2C_FIELD(__pH2C + 0X1C, 16, 16)
+#define NAN_CHANNEL_PLAN_1_SET_DURATION_5(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X1C, 16, 16, __Value)
+#define NAN_CHANNEL_PLAN_1_SET_DURATION_5_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X1C, 16, 16, __Value)
 #endif
diff --git a/rtl8822BU/hal/halmac/halmac_fw_offload_h2c_nic.h b/rtl8822BU/hal/halmac/halmac_fw_offload_h2c_nic.h
index 83f5740..a885c85 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_fw_offload_h2c_nic.h
+++ b/rtl8822BU/hal/halmac/halmac_fw_offload_h2c_nic.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HAL_FWOFFLOADH2CFORMAT_H2C_C2H_NIC_H_
 #define _HAL_FWOFFLOADH2CFORMAT_H2C_C2H_NIC_H_
 #define CMD_ID_FW_OFFLOAD_H2C  0XFF
@@ -13,7 +28,11 @@
 #define CMD_ID_IQK  0XFF
 #define CMD_ID_POWER_TRACKING  0XFF
 #define CMD_ID_PSD  0XFF
+#define CMD_ID_P2PPS  0XFF
 #define CMD_ID_BT_COEX  0XFF
+#define CMD_ID_NAN_CTRL  0XFF
+#define CMD_ID_NAN_CHANNEL_PLAN_0  0XFF
+#define CMD_ID_NAN_CHANNEL_PLAN_1  0XFF
 #define CATEGORY_H2C_CMD_HEADER  0X00
 #define CATEGORY_FW_OFFLOAD_H2C  0X01
 #define CATEGORY_CHANNEL_SWITCH  0X01
@@ -28,7 +47,11 @@
 #define CATEGORY_IQK  0X01
 #define CATEGORY_POWER_TRACKING  0X01
 #define CATEGORY_PSD  0X01
+#define CATEGORY_P2PPS  0X01
 #define CATEGORY_BT_COEX  0X01
+#define CATEGORY_NAN_CTRL  0X01
+#define CATEGORY_NAN_CHANNEL_PLAN_0  0X01
+#define CATEGORY_NAN_CHANNEL_PLAN_1  0X01
 #define SUB_CMD_ID_CHANNEL_SWITCH  0X02
 #define SUB_CMD_ID_DUMP_PHYSICAL_EFUSE  0X03
 #define SUB_CMD_ID_UPDATE_BEACON_PARSING_INFO  0X05
@@ -41,7 +64,11 @@
 #define SUB_CMD_ID_IQK  0X0E
 #define SUB_CMD_ID_POWER_TRACKING  0X0F
 #define SUB_CMD_ID_PSD  0X10
+#define SUB_CMD_ID_P2PPS  0X24
 #define SUB_CMD_ID_BT_COEX  0X60
+#define SUB_CMD_ID_NAN_CTRL  0XB2
+#define SUB_CMD_ID_NAN_CHANNEL_PLAN_0  0XB4
+#define SUB_CMD_ID_NAN_CHANNEL_PLAN_1  0XB5
 #define H2C_CMD_HEADER_GET_CATEGORY(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X00, 0, 7)
 #define H2C_CMD_HEADER_SET_CATEGORY(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X00, 0, 7, __Value)
 #define H2C_CMD_HEADER_GET_ACK(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X00, 7, 1)
@@ -148,6 +175,8 @@
 #define GENERAL_INFO_SET_FW_TX_BOUNDARY(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 16, 8, __Value)
 #define IQK_GET_CLEAR(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 0, 1)
 #define IQK_SET_CLEAR(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 0, 1, __Value)
+#define IQK_GET_SEGMENT_IQK(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 1, 1)
+#define IQK_SET_SEGMENT_IQK(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 1, 1, __Value)
 #define POWER_TRACKING_GET_ENABLE_A(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 0, 1)
 #define POWER_TRACKING_SET_ENABLE_A(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 0, 1, __Value)
 #define POWER_TRACKING_GET_ENABLE_B(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 1, 1)
@@ -188,6 +217,98 @@
 #define PSD_SET_START_PSD(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 0, 16, __Value)
 #define PSD_GET_END_PSD(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 16, 16)
 #define PSD_SET_END_PSD(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 16, 16, __Value)
+#define P2PPS_GET_OFFLOAD_EN(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 0, 1)
+#define P2PPS_SET_OFFLOAD_EN(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 0, 1, __Value)
+#define P2PPS_GET_ROLE(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 1, 1)
+#define P2PPS_SET_ROLE(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 1, 1, __Value)
+#define P2PPS_GET_CTWINDOW_EN(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 2, 1)
+#define P2PPS_SET_CTWINDOW_EN(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 2, 1, __Value)
+#define P2PPS_GET_NOA_EN(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 3, 1)
+#define P2PPS_SET_NOA_EN(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 3, 1, __Value)
+#define P2PPS_GET_NOA_SEL(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 4, 1)
+#define P2PPS_SET_NOA_SEL(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 4, 1, __Value)
+#define P2PPS_GET_ALLSTASLEEP(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 5, 1)
+#define P2PPS_SET_ALLSTASLEEP(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 5, 1, __Value)
+#define P2PPS_GET_DISCOVERY(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 6, 1)
+#define P2PPS_SET_DISCOVERY(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 6, 1, __Value)
+#define P2PPS_GET_P2P_PORT_ID(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 8, 8)
+#define P2PPS_SET_P2P_PORT_ID(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 8, 8, __Value)
+#define P2PPS_GET_P2P_GROUP(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 16, 8)
+#define P2PPS_SET_P2P_GROUP(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 16, 8, __Value)
+#define P2PPS_GET_P2P_MACID(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 24, 8)
+#define P2PPS_SET_P2P_MACID(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 24, 8, __Value)
+#define P2PPS_GET_CTWINDOW_LENGTH(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X0C, 0, 8)
+#define P2PPS_SET_CTWINDOW_LENGTH(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X0C, 0, 8, __Value)
+#define P2PPS_GET_NOA_DURATION_PARA(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X10, 0, 32)
+#define P2PPS_SET_NOA_DURATION_PARA(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X10, 0, 32, __Value)
+#define P2PPS_GET_NOA_INTERVAL_PARA(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X14, 0, 32)
+#define P2PPS_SET_NOA_INTERVAL_PARA(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X14, 0, 32, __Value)
+#define P2PPS_GET_NOA_START_TIME_PARA(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X18, 0, 32)
+#define P2PPS_SET_NOA_START_TIME_PARA(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X18, 0, 32, __Value)
+#define P2PPS_GET_NOA_COUNT_PARA(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X1C, 0, 32)
+#define P2PPS_SET_NOA_COUNT_PARA(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X1C, 0, 32, __Value)
 #define BT_COEX_GET_DATA_START(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 0, 8)
 #define BT_COEX_SET_DATA_START(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 0, 8, __Value)
+#define NAN_CTRL_GET_NAN_EN(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 0, 2)
+#define NAN_CTRL_SET_NAN_EN(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 0, 2, __Value)
+#define NAN_CTRL_GET_SUPPORT_BAND(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 8, 2)
+#define NAN_CTRL_SET_SUPPORT_BAND(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 8, 2, __Value)
+#define NAN_CTRL_GET_DISABLE_2G_DISC_BCN(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 10, 1)
+#define NAN_CTRL_SET_DISABLE_2G_DISC_BCN(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 10, 1, __Value)
+#define NAN_CTRL_GET_DISABLE_5G_DISC_BCN(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 11, 1)
+#define NAN_CTRL_SET_DISABLE_5G_DISC_BCN(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 11, 1, __Value)
+#define NAN_CTRL_GET_BCN_RSVD_PAGE_OFFSET(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 16, 8)
+#define NAN_CTRL_SET_BCN_RSVD_PAGE_OFFSET(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 16, 8, __Value)
+#define NAN_CTRL_GET_CHANNEL_2G(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 24, 8)
+#define NAN_CTRL_SET_CHANNEL_2G(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 24, 8, __Value)
+#define NAN_CTRL_GET_CHANNEL_5G(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X0C, 0, 8)
+#define NAN_CTRL_SET_CHANNEL_5G(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X0C, 0, 8, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_CHANNEL_NUMBER_0(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 0, 8)
+#define NAN_CHANNEL_PLAN_0_SET_CHANNEL_NUMBER_0(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 0, 8, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_UNPAUSE_MACID_0(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 8, 8)
+#define NAN_CHANNEL_PLAN_0_SET_UNPAUSE_MACID_0(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 8, 8, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_START_TIME_SLOT_0(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X0C, 0, 16)
+#define NAN_CHANNEL_PLAN_0_SET_START_TIME_SLOT_0(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X0C, 0, 16, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_DURATION_0(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X0C, 16, 16)
+#define NAN_CHANNEL_PLAN_0_SET_DURATION_0(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X0C, 16, 16, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_CHANNEL_NUMBER_1(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X10, 0, 8)
+#define NAN_CHANNEL_PLAN_0_SET_CHANNEL_NUMBER_1(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X10, 0, 8, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_UNPAUSE_MACID_1(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X10, 8, 8)
+#define NAN_CHANNEL_PLAN_0_SET_UNPAUSE_MACID_1(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X10, 8, 8, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_START_TIME_SLOT_1(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X14, 0, 16)
+#define NAN_CHANNEL_PLAN_0_SET_START_TIME_SLOT_1(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X14, 0, 16, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_DURATION_1(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X14, 16, 16)
+#define NAN_CHANNEL_PLAN_0_SET_DURATION_1(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X14, 16, 16, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_CHANNEL_NUMBER_2(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X18, 0, 8)
+#define NAN_CHANNEL_PLAN_0_SET_CHANNEL_NUMBER_2(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X18, 0, 8, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_UNPAUSE_MACID_2(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X18, 8, 8)
+#define NAN_CHANNEL_PLAN_0_SET_UNPAUSE_MACID_2(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X18, 8, 8, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_START_TIME_SLOT_2(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X1C, 0, 16)
+#define NAN_CHANNEL_PLAN_0_SET_START_TIME_SLOT_2(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X1C, 0, 16, __Value)
+#define NAN_CHANNEL_PLAN_0_GET_DURATION_2(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X1C, 16, 16)
+#define NAN_CHANNEL_PLAN_0_SET_DURATION_2(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X1C, 16, 16, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_CHANNEL_NUMBER_3(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 0, 8)
+#define NAN_CHANNEL_PLAN_1_SET_CHANNEL_NUMBER_3(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 0, 8, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_UNPAUSE_MACID_3(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X08, 8, 8)
+#define NAN_CHANNEL_PLAN_1_SET_UNPAUSE_MACID_3(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X08, 8, 8, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_START_TIME_SLOT_3(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X0C, 0, 16)
+#define NAN_CHANNEL_PLAN_1_SET_START_TIME_SLOT_3(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X0C, 0, 16, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_DURATION_3(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X0C, 16, 16)
+#define NAN_CHANNEL_PLAN_1_SET_DURATION_3(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X0C, 16, 16, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_CHANNEL_NUMBER_4(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X10, 0, 8)
+#define NAN_CHANNEL_PLAN_1_SET_CHANNEL_NUMBER_4(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X10, 0, 8, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_UNPAUSE_MACID_4(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X10, 8, 8)
+#define NAN_CHANNEL_PLAN_1_SET_UNPAUSE_MACID_4(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X10, 8, 8, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_START_TIME_SLOT_4(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X14, 0, 16)
+#define NAN_CHANNEL_PLAN_1_SET_START_TIME_SLOT_4(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X14, 0, 16, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_DURATION_4(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X14, 16, 16)
+#define NAN_CHANNEL_PLAN_1_SET_DURATION_4(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X14, 16, 16, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_CHANNEL_NUMBER_5(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X18, 0, 8)
+#define NAN_CHANNEL_PLAN_1_SET_CHANNEL_NUMBER_5(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X18, 0, 8, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_UNPAUSE_MACID_5(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X18, 8, 8)
+#define NAN_CHANNEL_PLAN_1_SET_UNPAUSE_MACID_5(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X18, 8, 8, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_START_TIME_SLOT_5(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X1C, 0, 16)
+#define NAN_CHANNEL_PLAN_1_SET_START_TIME_SLOT_5(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X1C, 0, 16, __Value)
+#define NAN_CHANNEL_PLAN_1_GET_DURATION_5(__pH2C)    LE_BITS_TO_4BYTE(__pH2C + 0X1C, 16, 16)
+#define NAN_CHANNEL_PLAN_1_SET_DURATION_5(__pH2C, __Value)    SET_BITS_TO_LE_4BYTE(__pH2C + 0X1C, 16, 16, __Value)
 #endif
diff --git a/rtl8822BU/hal/halmac/halmac_gpio_cmd.h b/rtl8822BU/hal/halmac/halmac_gpio_cmd.h
new file mode 100644
index 0000000..27e1fb1
--- a/dev/null
+++ b/rtl8822BU/hal/halmac/halmac_gpio_cmd.h
@@ -0,0 +1,84 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
+#ifndef HALMAC_GPIO_CMD
+#define HALMAC_GPIO_CMD
+
+#include "halmac_2_platform.h"
+
+/* GPIO ID */
+#define HALMAC_GPIO0		0
+#define HALMAC_GPIO1		1
+#define HALMAC_GPIO2		2
+#define HALMAC_GPIO3		3
+#define HALMAC_GPIO4		4
+#define HALMAC_GPIO5		5
+#define HALMAC_GPIO6		6
+#define HALMAC_GPIO7		7
+#define HALMAC_GPIO8		8
+#define HALMAC_GPIO9		9
+#define HALMAC_GPIO10		10
+#define HALMAC_GPIO11		11
+#define HALMAC_GPIO12		12
+#define HALMAC_GPIO13		13
+#define HALMAC_GPIO14		14
+#define HALMAC_GPIO15		15
+#define HALMAC_GPIO_NUM		16
+
+/* GPIO type */
+#define HALMAC_GPIO_IN			0
+#define HALMAC_GPIO_OUT			1
+#define HALMAC_GPIO_IN_OUT		2
+
+/* Function name */
+#define HALMAC_WL_HWPDN						0
+#define HALMAC_BT_HWPDN						1
+#define HALMAC_BT_GPIO						2
+#define HALMAC_WL_HW_EXTWOL					3
+#define HALMAC_BT_HW_EXTWOL					4
+#define HALMAC_BT_SFLASH					5
+#define HALMAC_WL_SFLASH					6
+#define HALMAC_WL_LED						7
+#define HALMAC_SDIO_INT						8
+#define HALMAC_UART0						9
+#define HALMAC_EEPROM						10
+#define HALMAC_JTAG							11
+#define HALMAC_LTE_COEX_UART				12
+#define HALMAC_3W_LTE_WL_GPIO				13
+#define HALMAC_GPIO2_3_WL_CTRL_EN			14
+#define HALMAC_GPIO13_14_WL_CTRL_EN			15
+#define HALMAC_DBG_GNT_WL_BT				16
+#define HALMAC_BT_3DDLS_A					17
+#define HALMAC_BT_3DDLS_B					18
+#define HALMAC_BT_PTA						19
+#define HALMAC_WL_PTA						20
+#define HALMAC_WL_UART						21
+#define HALMAC_WLMAC_DBG					22
+#define HALMAC_WLPHY_DBG					23
+#define HALMAC_BT_DBG						24
+#define HALMAC_WLPHY_RFE_CTRL2GPIO			25
+#define HALMAC_EXT_XTAL						26
+#define HALMAC_SW_IO						27
+
+typedef struct _HALMAC_GPIO_PIMUX_LIST {
+	u16 func;
+	u8 id;
+	u8 type;
+	u16 offset;
+	u8 msk;
+	u8 value;
+} HALMAC_GPIO_PIMUX_LIST, *PHALMAC_GPIO_PIMUX_LIST;
+
+#endif
diff --git a/rtl8822BU/hal/halmac/halmac_h2c_extra_info_ap.h b/rtl8822BU/hal/halmac/halmac_h2c_extra_info_ap.h
index f19324a..c9510f5 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_h2c_extra_info_ap.h
+++ b/rtl8822BU/hal/halmac/halmac_h2c_extra_info_ap.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HAL_H2CEXTRAINFO_H2C_C2H_AP_H_
 #define _HAL_H2CEXTRAINFO_H2C_C2H_AP_H_
 #define PHY_PARAMETER_INFO_GET_LENGTH(__pExtraInfo)    GET_C2H_FIELD(__pExtraInfo + 0X00, 0, 8)
diff --git a/rtl8822BU/hal/halmac/halmac_h2c_extra_info_nic.h b/rtl8822BU/hal/halmac/halmac_h2c_extra_info_nic.h
index 20bfb5a..41e4e96 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_h2c_extra_info_nic.h
+++ b/rtl8822BU/hal/halmac/halmac_h2c_extra_info_nic.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HAL_H2CEXTRAINFO_H2C_C2H_NIC_H_
 #define _HAL_H2CEXTRAINFO_H2C_C2H_NIC_H_
 #define PHY_PARAMETER_INFO_GET_LENGTH(__pExtraInfo)    LE_BITS_TO_4BYTE(__pExtraInfo + 0X00, 0, 8)
diff --git a/rtl8822BU/hal/halmac/halmac_hw_cfg.h b/rtl8822BU/hal/halmac/halmac_hw_cfg.h
index abde040..b63cf18 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_hw_cfg.h
+++ b/rtl8822BU/hal/halmac/halmac_hw_cfg.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef __HALMAC__HW_CFG_H__
 #define __HALMAC__HW_CFG_H__
 
@@ -109,6 +124,12 @@
 #define HALMAC_8195A_SUPPORT	0
 #endif
 
+#ifdef CONFIG_RTL8821B
+#define HALMAC_8821B_SUPPORT	1
+#else
+#define HALMAC_8821B_SUPPORT	0
+#endif
+
 #ifdef CONFIG_RTL8196F
 #define HALMAC_8196F_SUPPORT	1
 #else
diff --git a/rtl8822BU/hal/halmac/halmac_intf_phy_cmd.h b/rtl8822BU/hal/halmac/halmac_intf_phy_cmd.h
index bc37f91..a4be694 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_intf_phy_cmd.h
+++ b/rtl8822BU/hal/halmac/halmac_intf_phy_cmd.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef HALMAC_INTF_PHY_CMD
 #define HALMAC_INTF_PHY_CMD
 
@@ -14,6 +29,14 @@ typedef enum _HALMAC_INTF_PHY_CUT {
 	HALMAC_INTF_PHY_CUT_ALL = 0x7FFF,
 } HALMAC_INTF_PHY_CUT;
 
+/* IP selection */
+typedef enum _HALMAC_IP_SEL {
+	HALMAC_IP_SEL_INTF_PHY = 0,
+	HALMAC_IP_SEL_MAC = 1,
+	HALMAC_IP_SEL_PCIE_DBI = 2,
+	HALMAC_IP_SEL_UNDEFINE = 0x7FFF,
+} HALMAC_IP_SEL;
+
 /* Platform mask */
 typedef enum _HALMAC_INTF_PHY_PLATFORM {
 	HALMAC_INTF_PHY_PLATFORM_ALL = 0x7FFF,
diff --git a/rtl8822BU/hal/halmac/halmac_original_c2h_ap.h b/rtl8822BU/hal/halmac/halmac_original_c2h_ap.h
index 433da10..731702a 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_original_c2h_ap.h
+++ b/rtl8822BU/hal/halmac/halmac_original_c2h_ap.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HAL_ORIGINALC2HFORMAT_H2C_C2H_AP_H_
 #define _HAL_ORIGINALC2HFORMAT_H2C_C2H_AP_H_
 #define CMD_ID_C2H  0X00
diff --git a/rtl8822BU/hal/halmac/halmac_original_c2h_nic.h b/rtl8822BU/hal/halmac/halmac_original_c2h_nic.h
index b72c1ce..cd587da 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_original_c2h_nic.h
+++ b/rtl8822BU/hal/halmac/halmac_original_c2h_nic.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HAL_ORIGINALC2HFORMAT_H2C_C2H_NIC_H_
 #define _HAL_ORIGINALC2HFORMAT_H2C_C2H_NIC_H_
 #define CMD_ID_C2H  0X00
diff --git a/rtl8822BU/hal/halmac/halmac_original_h2c_ap.h b/rtl8822BU/hal/halmac/halmac_original_h2c_ap.h
index 1731e7e..c5100a7 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_original_h2c_ap.h
+++ b/rtl8822BU/hal/halmac/halmac_original_h2c_ap.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HAL_ORIGINALH2CFORMAT_H2C_C2H_AP_H_
 #define _HAL_ORIGINALH2CFORMAT_H2C_C2H_AP_H_
 #define CMD_ID_ORIGINAL_H2C  0X00
@@ -506,6 +521,9 @@
 #define MACID_CFG_GET_RATE_ID(__pH2C)    GET_H2C_FIELD(__pH2C + 0X00, 16, 5)
 #define MACID_CFG_SET_RATE_ID(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X00, 16, 5, __Value)
 #define MACID_CFG_SET_RATE_ID_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X00, 16, 5, __Value)
+#define MACID_CFG_GET_INIT_RATE_LV(__pH2C)    GET_H2C_FIELD(__pH2C + 0X00, 21, 2)
+#define MACID_CFG_SET_INIT_RATE_LV(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X00, 21, 2, __Value)
+#define MACID_CFG_SET_INIT_RATE_LV_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X00, 21, 2, __Value)
 #define MACID_CFG_GET_SGI(__pH2C)    GET_H2C_FIELD(__pH2C + 0X00, 23, 1)
 #define MACID_CFG_SET_SGI(__pH2C, __Value)    SET_H2C_FIELD_CLR(__pH2C + 0X00, 23, 1, __Value)
 #define MACID_CFG_SET_SGI_NO_CLR(__pH2C, __Value)    SET_H2C_FIELD_NO_CLR(__pH2C + 0X00, 23, 1, __Value)
diff --git a/rtl8822BU/hal/halmac/halmac_original_h2c_nic.h b/rtl8822BU/hal/halmac/halmac_original_h2c_nic.h
index ad784fe..b6ae5f0 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_original_h2c_nic.h
+++ b/rtl8822BU/hal/halmac/halmac_original_h2c_nic.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HAL_ORIGINALH2CFORMAT_H2C_C2H_NIC_H_
 #define _HAL_ORIGINALH2CFORMAT_H2C_C2H_NIC_H_
 #define CMD_ID_ORIGINAL_H2C  0X00
diff --git a/rtl8822BU/hal/halmac/halmac_pcie_reg.h b/rtl8822BU/hal/halmac/halmac_pcie_reg.h
index 8808e7b..a8a4ee4 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_pcie_reg.h
+++ b/rtl8822BU/hal/halmac/halmac_pcie_reg.h
@@ -1,8 +1,30 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef __HALMAC_PCIE_REG_H__
 #define __HALMAC_PCIE_REG_H__
 
+/* PCIE PHY register */
+#define CLKCAL_CTRL_PHYPARA		0x00
+#define CLKCAL_SET_PHYPARA		0x20
+#define CLKCAL_TRG_VAL_PHYPARA	0x21
+#define PCIE_L1_BACKDOOR		0x719
 
-
-
+/* PCIE MAC register */
+#define LINK_CTRL2_REG_OFFSET	0xA0
+#define GEN2_CTRL_OFFSET		0x80C
+#define LINK_STATUS_REG_OFFSET	0x82
 
 #endif/* __HALMAC_PCIE_REG_H__ */
diff --git a/rtl8822BU/hal/halmac/halmac_pwr_seq_cmd.h b/rtl8822BU/hal/halmac/halmac_pwr_seq_cmd.h
index 0367fe3..5834f01 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_pwr_seq_cmd.h
+++ b/rtl8822BU/hal/halmac/halmac_pwr_seq_cmd.h
@@ -1,10 +1,25 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef HALMAC_POWER_SEQUENCE_CMD
 #define HALMAC_POWER_SEQUENCE_CMD
 
 #include "halmac_2_platform.h"
 #include "halmac_type.h"
 
-#define HALMAC_POLLING_READY_TIMEOUT_COUNT 10000
+#define HALMAC_POLLING_READY_TIMEOUT_COUNT 20000
 
 /*
 * The value of cmd : 4 bits
@@ -64,14 +79,14 @@
 #define	HALMAC_PWR_INTF_SDIO_MSK	BIT(0)
 #define	HALMAC_PWR_INTF_USB_MSK		BIT(1)
 #define	HALMAC_PWR_INTF_PCI_MSK		BIT(2)
-#define	HALMAC_PWR_INTF_ALL_MSK		(BIT(0)|BIT(1)|BIT(2)|BIT(3))
+#define	HALMAC_PWR_INTF_ALL_MSK		(BIT(0) | BIT(1) | BIT(2) | BIT(3))
 
 /*
 * The value of fab_msk : 4 bits
 */
 #define	HALMAC_PWR_FAB_TSMC_MSK		BIT(0)
 #define	HALMAC_PWR_FAB_UMC_MSK		BIT(1)
-#define	HALMAC_PWR_FAB_ALL_MSK		(BIT(0)|BIT(1)|BIT(2)|BIT(3))
+#define	HALMAC_PWR_FAB_ALL_MSK		(BIT(0) | BIT(1) | BIT(2) | BIT(3))
 
 /*
 * The value of cut_msk : 8 bits
diff --git a/rtl8822BU/hal/halmac/halmac_reg2.h b/rtl8822BU/hal/halmac/halmac_reg2.h
index 7a9b61d..f04e7bc 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_reg2.h
+++ b/rtl8822BU/hal/halmac/halmac_reg2.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef __HALMAC_COM_REG_H__
 #define __HALMAC_COM_REG_H__
 /*-------------------------Modification Log-----------------------------------
@@ -662,7 +677,7 @@
 #endif
 
 
-#if (HALMAC_8814B_SUPPORT || HALMAC_8821C_SUPPORT)
+#if (HALMAC_8814B_SUPPORT || HALMAC_8821C_SUPPORT || HALMAC_8822B_SUPPORT)
 
 #define REG_C2HEVT_1					0x01A4
 #define REG_C2HEVT_2					0x01A8
diff --git a/rtl8822BU/hal/halmac/halmac_reg_8197f.h b/rtl8822BU/hal/halmac/halmac_reg_8197f.h
index f7cdb87..997f6b0 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_reg_8197f.h
+++ b/rtl8822BU/hal/halmac/halmac_reg_8197f.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef __INC_HALMAC_REG_8197F_H
 #define __INC_HALMAC_REG_8197F_H
 
diff --git a/rtl8822BU/hal/halmac/halmac_reg_8814b.h b/rtl8822BU/hal/halmac/halmac_reg_8814b.h
index d8bb510..ac587a5 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_reg_8814b.h
+++ b/rtl8822BU/hal/halmac/halmac_reg_8814b.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef __INC_HALMAC_REG_8814B_H
 #define __INC_HALMAC_REG_8814B_H
 
diff --git a/rtl8822BU/hal/halmac/halmac_reg_8821c.h b/rtl8822BU/hal/halmac/halmac_reg_8821c.h
index 4f22ee2..d7198fd 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_reg_8821c.h
+++ b/rtl8822BU/hal/halmac/halmac_reg_8821c.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef __INC_HALMAC_REG_8821C_H
 #define __INC_HALMAC_REG_8821C_H
 
diff --git a/rtl8822BU/hal/halmac/halmac_reg_8822b.h b/rtl8822BU/hal/halmac/halmac_reg_8822b.h
index e956627..b2913c3 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_reg_8822b.h
+++ b/rtl8822BU/hal/halmac/halmac_reg_8822b.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef __INC_HALMAC_REG_8822B_H
 #define __INC_HALMAC_REG_8822B_H
 
diff --git a/rtl8822BU/hal/halmac/halmac_rx_bd_ap.h b/rtl8822BU/hal/halmac/halmac_rx_bd_ap.h
index 5bb01c0..6da7e4b 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_rx_bd_ap.h
+++ b/rtl8822BU/hal/halmac/halmac_rx_bd_ap.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_RX_BD_AP_H_
 #define _HALMAC_RX_BD_AP_H_
 #if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || HALMAC_8821C_SUPPORT || HALMAC_8188F_SUPPORT)
diff --git a/rtl8822BU/hal/halmac/halmac_rx_bd_chip.h b/rtl8822BU/hal/halmac/halmac_rx_bd_chip.h
index 601f11c..5270e07 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_rx_bd_chip.h
+++ b/rtl8822BU/hal/halmac/halmac_rx_bd_chip.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_RX_BD_CHIP_H_
 #define _HALMAC_RX_BD_CHIP_H_
 #if (HALMAC_8814A_SUPPORT)
diff --git a/rtl8822BU/hal/halmac/halmac_rx_bd_nic.h b/rtl8822BU/hal/halmac/halmac_rx_bd_nic.h
index dc7d5cd..73ce816 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_rx_bd_nic.h
+++ b/rtl8822BU/hal/halmac/halmac_rx_bd_nic.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_RX_BD_NIC_H_
 #define _HALMAC_RX_BD_NIC_H_
 #if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || HALMAC_8821C_SUPPORT || HALMAC_8188F_SUPPORT)
diff --git a/rtl8822BU/hal/halmac/halmac_rx_desc_ap.h b/rtl8822BU/hal/halmac/halmac_rx_desc_ap.h
index c71eba1..556a67c 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_rx_desc_ap.h
+++ b/rtl8822BU/hal/halmac/halmac_rx_desc_ap.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_RX_DESC_AP_H_
 #define _HALMAC_RX_DESC_AP_H_
 #if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || HALMAC_8821C_SUPPORT || HALMAC_8188F_SUPPORT)
diff --git a/rtl8822BU/hal/halmac/halmac_rx_desc_chip.h b/rtl8822BU/hal/halmac/halmac_rx_desc_chip.h
index 860eb88..b2dfdf5 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_rx_desc_chip.h
+++ b/rtl8822BU/hal/halmac/halmac_rx_desc_chip.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_RX_DESC_CHIP_H_
 #define _HALMAC_RX_DESC_CHIP_H_
 #if (HALMAC_8814A_SUPPORT)
diff --git a/rtl8822BU/hal/halmac/halmac_rx_desc_nic.h b/rtl8822BU/hal/halmac/halmac_rx_desc_nic.h
index 50231fd..2e9209e 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_rx_desc_nic.h
+++ b/rtl8822BU/hal/halmac/halmac_rx_desc_nic.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_RX_DESC_NIC_H_
 #define _HALMAC_RX_DESC_NIC_H_
 #if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || HALMAC_8821C_SUPPORT || HALMAC_8188F_SUPPORT)
diff --git a/rtl8822BU/hal/halmac/halmac_sdio_reg.h b/rtl8822BU/hal/halmac/halmac_sdio_reg.h
index 18dfbe5..2a47d6f 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_sdio_reg.h
+++ b/rtl8822BU/hal/halmac/halmac_sdio_reg.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef __HALMAC_SDIO_REG_H__
 #define __HALMAC_SDIO_REG_H__
 
@@ -5,7 +20,8 @@
 
 #define HALMAC_SDIO_4BYTE_LEN_MASK      0x1FFF
 #define HALMAC_SDIO_LOCAL_MSK           0x0FFF
-#define HALMAC_WLAN_IOREG_MSK           0xFFFF
+#define HALMAC_WLAN_MAC_REG_MSK			0xFFFF
+#define	HALMAC_WLAN_IOREG_MSK			0xFFFF
 
 /* Sdio Address for SDIO Local Reg, TRX FIFO, MAC Reg */
 typedef enum {
@@ -18,25 +34,20 @@ typedef enum {
 	HALMAC_SDIO_CMD_ADDR_RXFF = 7,
 } HALMAC_SDIO_CMD_ADDR;
 
-
-#if 1
-#define SDIO_LOCAL_DEVICE_ID                            0       /* 0b[16], 000b[15:13] */
-#define WLAN_TX_HIQ_DEVICE_ID                           4       /* 0b[16], 100b[15:13] */
-#define WLAN_TX_MIQ_DEVICE_ID                           5       /* 0b[16], 101b[15:13] */
-#define WLAN_TX_LOQ_DEVICE_ID                           6       /* 0b[16], 110b[15:13] */
-#define WLAN_TX_EPQ_DEVICE_ID                           3       /* 0b[16], 110b[15:13] */
-#define WLAN_RX0FF_DEVICE_ID                            7       /* 0b[16], 111b[15:13] */
-#define WLAN_IOREG_DEVICE_ID                            8       /* 1b[16] */
-
 /* IO Bus domain address mapping */
-#define SDIO_LOCAL_OFFSET                                       0x10250000
-#define WLAN_IOREG_OFFSET                               0x10260000
-#define FW_FIFO_OFFSET                                  0x10270000
-#define TX_HIQ_OFFSET                                           0x10310000
-#define TX_MIQ_OFFSET                                           0x10320000
-#define TX_LOQ_OFFSET                                           0x10330000
-#define TX_EXQ_OFFSET                                           0x10350000
-#define RX_RXOFF_OFFSET                                 0x10340000
+#define SDIO_LOCAL_OFFSET		0x10250000
+#define WLAN_IOREG_OFFSET		0x10260000
+#define FW_FIFO_OFFSET			0x10270000
+#define TX_HIQ_OFFSET			0x10310000
+#define TX_MIQ_OFFSET			0x10320000
+#define TX_LOQ_OFFSET			0x10330000
+#define TX_EXQ_OFFSET			0x10350000
+#define RX_RXOFF_OFFSET			0x10340000
+
+/* Get TX WLAN FIFO information in CMD53 addr  */
+#if (HALMAC_8822B_SUPPORT || HALMAC_8821C_SUPPORT)
+#define GET_WLAN_TXFF_DEVICE_ID(__pCmd53_addr)		LE_BITS_TO_4BYTE((u32 *)__pCmd53_addr, 13, 4)
+#define GET_WLAN_TXFF_PKT_SIZE(__pCmd53_addr)		(LE_BITS_TO_4BYTE((u32 *)__pCmd53_addr, 0, 13) << 2)
 #endif
 
 #endif/* __HALMAC_SDIO_REG_H__ */
diff --git a/rtl8822BU/hal/halmac/halmac_tx_bd_ap.h b/rtl8822BU/hal/halmac/halmac_tx_bd_ap.h
index 1cff6b1..3b9c21a 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_tx_bd_ap.h
+++ b/rtl8822BU/hal/halmac/halmac_tx_bd_ap.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_TX_BD_AP_H_
 #define _HALMAC_TX_BD_AP_H_
 #if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || HALMAC_8821C_SUPPORT || HALMAC_8188F_SUPPORT)
diff --git a/rtl8822BU/hal/halmac/halmac_tx_bd_chip.h b/rtl8822BU/hal/halmac/halmac_tx_bd_chip.h
index 17004bc..0ebf93c 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_tx_bd_chip.h
+++ b/rtl8822BU/hal/halmac/halmac_tx_bd_chip.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_TX_BD_CHIP_H_
 #define _HALMAC_TX_BD_CHIP_H_
 #if (HALMAC_8814A_SUPPORT)
diff --git a/rtl8822BU/hal/halmac/halmac_tx_bd_nic.h b/rtl8822BU/hal/halmac/halmac_tx_bd_nic.h
index 1d53acc..94e4480 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_tx_bd_nic.h
+++ b/rtl8822BU/hal/halmac/halmac_tx_bd_nic.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_TX_BD_NIC_H_
 #define _HALMAC_TX_BD_NIC_H_
 #if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || HALMAC_8821C_SUPPORT || HALMAC_8188F_SUPPORT)
diff --git a/rtl8822BU/hal/halmac/halmac_tx_desc_ap.h b/rtl8822BU/hal/halmac/halmac_tx_desc_ap.h
index e9c1e59..de2cdd6 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_tx_desc_ap.h
+++ b/rtl8822BU/hal/halmac/halmac_tx_desc_ap.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_TX_DESC_AP_H_
 #define _HALMAC_TX_DESC_AP_H_
 #if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || HALMAC_8821C_SUPPORT)
diff --git a/rtl8822BU/hal/halmac/halmac_tx_desc_chip.h b/rtl8822BU/hal/halmac/halmac_tx_desc_chip.h
index d15b6cf..e778594 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_tx_desc_chip.h
+++ b/rtl8822BU/hal/halmac/halmac_tx_desc_chip.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_TX_DESC_CHIP_H_
 #define _HALMAC_TX_DESC_CHIP_H_
 #if (HALMAC_8814A_SUPPORT)
diff --git a/rtl8822BU/hal/halmac/halmac_tx_desc_nic.h b/rtl8822BU/hal/halmac/halmac_tx_desc_nic.h
index 94eefbe..4e82378 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_tx_desc_nic.h
+++ b/rtl8822BU/hal/halmac/halmac_tx_desc_nic.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_TX_DESC_NIC_H_
 #define _HALMAC_TX_DESC_NIC_H_
 #if (HALMAC_8814A_SUPPORT || HALMAC_8822B_SUPPORT || HALMAC_8197F_SUPPORT || HALMAC_8821C_SUPPORT)
diff --git a/rtl8822BU/hal/halmac/halmac_type.h b/rtl8822BU/hal/halmac/halmac_type.h
index 920129c..eb3efbf 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_type.h
+++ b/rtl8822BU/hal/halmac/halmac_type.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef _HALMAC_TYPE_H_
 #define _HALMAC_TYPE_H_
 
@@ -21,6 +36,10 @@
 #define HALMC_DDMA_POLLING_COUNT                1000
 #define API_ARRAY_SIZE							32
 
+#ifndef HALMAC_RX_FIFO_EXPANDING_MODE_PKT_SIZE
+#define HALMAC_RX_FIFO_EXPANDING_MODE_PKT_SIZE	48
+#endif
+
 /* platform api */
 #define PLATFORM_SDIO_CMD52_READ				pHalmac_adapter->pHalmac_platform_api->SDIO_CMD52_READ
 #define PLATFORM_SDIO_CMD53_READ_8              pHalmac_adapter->pHalmac_platform_api->SDIO_CMD53_READ_8
@@ -59,7 +78,7 @@
 #if HALMAC_DBG_MSG_ENABLE
 #define PLATFORM_MSG_PRINT                      pHalmac_adapter->pHalmac_platform_api->MSG_PRINT
 #else
-#define PLATFORM_MSG_PRINT(pDriver_adapter, msg_type, msg_level, fmt, ...)
+#define PLATFORM_MSG_PRINT(pDriver_adapter, msg_type, msg_level, fmt, ...)	 do {} while (0)
 #endif
 
 #if HALMAC_PLATFORM_TESTPROGRAM
@@ -258,6 +277,10 @@
 #define BIT(x)              (1 << (x))
 #endif
 
+#ifndef ARRAY_SIZE
+#define ARRAY_SIZE(arr)		(sizeof(arr) / sizeof((arr)[0]))
+#endif
+
 /* HALMAC API return status*/
 typedef enum _HALMAC_RET_STATUS {
 	HALMAC_RET_SUCCESS = 0x00,
@@ -352,6 +375,14 @@ typedef enum _HALMAC_RET_STATUS {
 	HALMAC_RET_DRV_DL_ERR = 0x59,
 	HALMAC_RET_OQT_NOT_ENOUGH = 0x5A,
 	HALMAC_RET_PWR_UNCHANGE = 0x5B,
+	HALMAC_RET_WRONG_INTF = 0x5C,
+	HALMAC_RET_FW_NO_SUPPORT = 0x60,
+	HALMAC_RET_TXFIFO_NO_EMPTY = 0x61,
+	HALMAC_RET_SDIO_CLOCK_ERR = 0x62,
+	HALMAC_RET_GET_PINMUX_ERR = 0x63,
+	HALMAC_RET_PINMUX_USED = 0x64,
+	HALMAC_RET_WRONG_GPIO = 0x65,
+	HALMAC_RET_LTECOEX_READY_FAIL = 0x66,
 } HALMAC_RET_STATUS;
 
 typedef enum _HALMAC_MAC_CLOCK_HW_DEF {
@@ -360,17 +391,6 @@ typedef enum _HALMAC_MAC_CLOCK_HW_DEF {
 	HALMAC_MAC_CLOCK_HW_DEF_20M = 2,
 } HALMAC_MAC_CLOCK_HW_DEF;
 
-/* Rx aggregation parameters */
-typedef enum _HALMAC_NORMAL_RXAGG_TH_TO {
-	HALMAC_NORMAL_RXAGG_THRESHOLD = 0xFF,
-	HALMAC_NORMAL_RXAGG_TIMEOUT = 0x01,
-} HALMAC_NORMAL_RXAGG_TH_TO;
-
-typedef enum _HALMAC_LOOPBACK_RXAGG_TH_TO {
-	HALMAC_LOOPBACK_RXAGG_THRESHOLD = 0xFF,
-	HALMAC_LOOPBACK_RXAGG_TIMEOUT = 0x01,
-} HALMAC_LOOPBACK_RXAGG_TH_TO;
-
 /* Chip ID*/
 typedef enum _HALMAC_CHIP_ID {
 	HALMAC_CHIP_ID_8822B = 0,
@@ -499,6 +519,13 @@ typedef enum {
 	HALMAC_QUEUE_SELECT_UNDEFINE = 0x7F,
 } HALMAC_QUEUE_SELECT;
 
+typedef enum _HALMAC_ACQ_ID {
+	HALMAC_ACQ_ID_VO = 0,
+	HALMAC_ACQ_ID_VI = 1,
+	HALMAC_ACQ_ID_BE = 2,
+	HALMAC_ACQ_ID_BK = 3,
+	HALMAC_ACQ_ID_MAX = 0x7F,
+} HALMAC_ACQ_ID;
 
 /* USB burst size */
 typedef enum _HALMAC_USB_BURST_SIZE {
@@ -514,6 +541,7 @@ typedef enum _HALMAC_INTERFACE {
 	HALMAC_INTERFACE_PCIE = 0x0,
 	HALMAC_INTERFACE_USB = 0x1,
 	HALMAC_INTERFACE_SDIO = 0x2,
+	HALMAC_INTERFACE_AXI = 0x3,
 	HALMAC_INTERFACE_UNDEFINE = 0x7F,
 } HALMAC_INTERFACE;
 
@@ -534,7 +562,6 @@ typedef struct _HALMAC_RXAGG_CFG {
 	HALMAC_RXAGG_TH threshold;
 } HALMAC_RXAGG_CFG, *PHALMAC_RXAGG_CFG;
 
-
 typedef enum _HALMAC_MAC_POWER {
 	HALMAC_MAC_POWER_OFF = 0x0,
 	HALMAC_MAC_POWER_ON = 0x1,
@@ -555,8 +582,8 @@ typedef enum _HALMAC_TRX_MODE {
 	HALMAC_TRX_MODE_P2P = 0x3,
 	HALMAC_TRX_MODE_LOOPBACK = 0x4,
 	HALMAC_TRX_MODE_DELAY_LOOPBACK = 0x5,
-	HALMAC_TRX_MODE_WMM_LINUX = 0x6,
-	HALMAC_TRX_MODE_MAX = 0x7,
+	HALMAC_TRX_MODE_MAX = 0x6,
+	HALMAC_TRX_MODE_WMM_LINUX = 0x7E,
 	HALMAC_TRX_MODE_UNDEFINE = 0x7F,
 } HALMAC_TRX_MODE;
 
@@ -587,6 +614,10 @@ typedef enum _HALMAC_EFUSE_READ_CFG {
 	HALMAC_EFUSE_R_UNDEFINE = 0x7F,
 } HALMAC_EFUSE_READ_CFG;
 
+typedef enum _HALMAC_DLFW_MEM {
+	HALMAC_DLFW_MEM_EMEM = 0x00,
+	HALMAC_DLFW_MEM_UNDEFINE = 0x7F,
+} HALMAC_DLFW_MEM;
 
 typedef struct _HALMAC_TX_DESC {
 	u32	Dword0;
@@ -612,34 +643,6 @@ typedef struct _HALMAC_RX_DESC {
 	u32	Dword5;
 } HALMAC_RX_DESC, *PHALMAC_RX_DESC;
 
-typedef struct _HALMAC_FWLPS_OPTION {
-	u8	mode;
-	u8	clk_request;
-	u8	rlbm;
-	u8	smart_ps;
-	u8	awake_interval;
-	u8	all_queue_uapsd;
-	u8	pwr_state;
-	u8	low_pwr_rx_beacon;
-	u8	ant_auto_switch;
-	u8	ps_allow_bt_high_Priority;
-	u8	protect_bcn;
-	u8	silence_period;
-	u8	fast_bt_connect;
-	u8	two_antenna_en;
-	u8	adopt_user_Setting;
-	u8	drv_bcn_early_shift;
-	u8	enter_32K;
-} HALMAC_FWLPS_OPTION, *PHALMAC_FWLPS_OPTION;
-
-typedef struct _HALMAC_FWIPS_OPTION {
-	u8 adopt_user_Setting;
-} HALMAC_FWIPS_OPTION, *PHALMAC_FWIPS_OPTION;
-
-typedef struct _HALMAC_WOWLAN_OPTION {
-	u8 adopt_user_Setting;
-} HALMAC_WOWLAN_OPTION, *PHALMAC_WOWLAN_OPTION;
-
 typedef struct _HALMAC_BCN_IE_INFO {
 	u8	func_en;
 	u8	size_th;
@@ -749,6 +752,9 @@ typedef struct _HALMAC_HW_CONFIG_INFO {
 	u16 tx_align_size;
 	u8 page_size_2_power;
 	u8 cam_entry_num; /* Record CAM entry number */
+	u8 ac_oqt_size;
+	u8 non_ac_oqt_size;
+	u8 ac_queue_num;
 } HALMAC_HW_CONFIG_INFO, *PHALMAC_HW_CONFIG_INFO;
 
 typedef struct _HALMAC_SDIO_FREE_SPACE {
@@ -768,6 +774,7 @@ typedef enum _HAL_FIFO_SEL {
 	HAL_FIFO_SEL_RSVD_PAGE,
 	HAL_FIFO_SEL_REPORT,
 	HAL_FIFO_SEL_LLT,
+	HAL_FIFO_SEL_RXBUF_FW,
 } HAL_FIFO_SEL;
 
 typedef enum _HALMAC_DRV_INFO {
@@ -778,18 +785,6 @@ typedef enum _HALMAC_DRV_INFO {
 	HALMAC_DRV_INFO_UNDEFINE,
 } HALMAC_DRV_INFO;
 
-typedef struct _HALMAC_BT_COEX_CMD {
-	u8 element_id;
-	u8 op_code;
-	u8 op_code_ver;
-	u8 req_num;
-	u8 data0;
-	u8 data1;
-	u8 data2;
-	u8 data3;
-	u8 data4;
-} HALMAC_BT_COEX_CMD, *PHALMAC_BT_COEX_CMD;
-
 typedef enum _HALMAC_PRI_CH_IDX {
 	HALMAC_CH_IDX_UNDEFINE = 0,
 	HALMAC_CH_IDX_1 = 1,
@@ -837,10 +832,20 @@ typedef struct _HALMAC_CH_SWITCH_OPTION {
 	u8 phase_2_period;
 } HALMAC_CH_SWITCH_OPTION, *PHALMAC_CH_SWITCH_OPTION;
 
+typedef struct _HALMAC_FW_BUILD_TIME {
+	u16 year;
+	u8 month;
+	u8 date;
+	u8 hour;
+	u8 min;
+} HALMAC_FW_BUILD_TIME, *PHALMAC_FW_BUILD_TIME;
+
 typedef struct _HALMAC_FW_VERSION {
 	u16 version;
 	u8 sub_version;
 	u8 sub_index;
+	u16 h2c_version;
+	HALMAC_FW_BUILD_TIME build_time;
 } HALMAC_FW_VERSION, *PHALMAC_FW_VERSION;
 
 typedef enum _HALMAC_RF_TYPE {
@@ -1035,22 +1040,6 @@ typedef enum _HAL_TX_ID {
 	HAL_TX_ID_MAX
 } HAL_TX_ID;
 
-typedef enum _HAL_QSEL {
-	HAL_QSEL_TID0,
-	HAL_QSEL_TID1,
-	HAL_QSEL_TID2,
-	HAL_QSEL_TID3,
-	HAL_QSEL_TID4,
-	HAL_QSEL_TID5,
-	HAL_QSEL_TID6,
-	HAL_QSEL_TID7,
-
-	HAL_QSEL_BEACON = 0x10,
-	HAL_QSEL_HIGH = 0x11,
-	HAL_QSEL_MGT = 0x12,
-	HAL_QSEL_CMD = 0x13
-} HAL_QSEL;
-
 typedef enum _HAL_RTS_MODE {
 	HAL_RTS_MODE_NONE,
 	HAL_RTS_MODE_CTS2SELF,
@@ -1165,6 +1154,7 @@ typedef struct _HALMAC_CHIP_TYPE {
 #endif /* End of test program */
 
 typedef enum _HALMAC_DBG_MSG_INFO {
+	HALMAC_DBG_ALWAYS,
 	HALMAC_DBG_ERR,
 	HALMAC_DBG_WARN,
 	HALMAC_DBG_TRACE,
@@ -1179,7 +1169,8 @@ typedef enum _HALMAC_DBG_MSG_TYPE {
 	HALMAC_MSG_SND,
 	HALMAC_MSG_COMMON,
 	HALMAC_MSG_DBI,
-	HALMAC_MSG_MDIO
+	HALMAC_MSG_MDIO,
+	HALMAC_MSG_USB
 } HALMAC_DBG_MSG_TYPE;
 
 typedef enum _HALMAC_CMD_PROCESS_STATUS {
@@ -1217,6 +1208,48 @@ typedef enum _HALMAC_PCIE_CFG {
 	HALMAC_PCIE_CFG_UNDEFINE,
 } HALMAC_PCIE_CFG;
 
+typedef enum _HALMAC_PORTID {
+	HALMAC_PORTID0 = 0,
+	HALMAC_PORTID1 = 1,
+	HALMAC_PORTID2 = 2,
+	HALMAC_PORTID3 = 3,
+	HALMAC_PORTID4 = 4,
+	HALMAC_PORTIDMAX
+} HALMAC_PORTID;
+
+typedef struct _HALMAC_P2PPS {
+	/*DW0*/
+	u8  offload_en:1;
+	u8  role:1;
+	u8  ctwindow_en:1;
+	u8  noa_en:1;
+	u8  noa_sel:1;
+	u8  all_sta_sleep:1;
+	u8  discovery:1;
+	u8  rsvd2:1;
+	u8  p2p_port_id;
+	u8  p2p_group;
+	u8  p2p_macid;
+
+	/*DW1*/
+	u8 ctwindow_length;
+	u8 rsvd3;
+	u8 rsvd4;
+	u8 rsvd5;
+
+	/*DW2*/
+	u32 noa_duration_para;
+
+	/*DW3*/
+	u32 noa_interval_para;
+
+	/*DW4*/
+	u32 noa_start_time_para;
+
+	/*DW5*/
+	u32 noa_count_para;
+} HALMAC_P2PPS, *PHALMAC_P2PPS;
+
 
 /* Platform API setting */
 typedef struct _HALMAC_PLATFORM_API {
@@ -1385,6 +1418,12 @@ typedef enum _HALMAC_DLFW_STATE {
 	HALMAC_DLFW_UNDEFINED = 0x7F,
 } HALMAC_DLFW_STATE;
 
+typedef enum _HALMAC_GPIO_CFG_STATE {
+	HALMAC_GPIO_CFG_STATE_IDLE = 0,
+	HALMAC_GPIO_CFG_STATE_BUSY = 1,
+	HALMAC_GPIO_CFG_STATE_UNDEFINED = 0x7F,
+} HALMAC_GPIO_CFG_STATE;
+
 typedef enum _HALMAC_EFUSE_CMD_CONSTRUCT_STATE {
 	HALMAC_EFUSE_CMD_CONSTRUCT_IDLE = 0,
 	HALMAC_EFUSE_CMD_CONSTRUCT_BUSY = 1,
@@ -1476,6 +1515,7 @@ typedef struct _HALMAC_STATE {
 	HALMAC_MAC_POWER mac_power; /* 0 : power off, 1 : power on*/
 	HALMAC_PS_STATE ps_state; /* power saving state */
 	HALMAC_DLFW_STATE dlfw_state; /* download FW state */
+	HALMAC_GPIO_CFG_STATE gpio_cfg_state; /* gpio state */
 } HALMAC_STATE, *PHALMAC_STATE;
 
 typedef struct _HALMAC_VER {
@@ -1566,24 +1606,20 @@ typedef enum _HALMAC_API_ID {
 	HALMAC_API_SU_BFEE_ENTRY_DEL = 0x4B,
 	HALMAC_API_MU_BFER_ENTRY_DEL = 0x4C,
 	HALMAC_API_MU_BFEE_ENTRY_DEL = 0x4D,
-
 	HALMAC_API_ADD_CH_INFO = 0x4E,
 	HALMAC_API_ADD_EXTRA_CH_INFO = 0x4F,
 	HALMAC_API_CTRL_CH_SWITCH = 0x50,
 	HALMAC_API_CLEAR_CH_INFO = 0x51,
-
 	HALMAC_API_SEND_GENERAL_INFO = 0x52,
 	HALMAC_API_START_IQK = 0x53,
 	HALMAC_API_CTRL_PWR_TRACKING = 0x54,
 	HALMAC_API_PSD = 0x55,
 	HALMAC_API_CFG_TX_AGG_ALIGN = 0x56,
-
 	HALMAC_API_QUERY_STATE = 0x57,
 	HALMAC_API_RESET_FEATURE = 0x58,
 	HALMAC_API_CHECK_FW_STATUS = 0x59,
 	HALMAC_API_DUMP_FW_DMEM = 0x5A,
 	HALMAC_API_CFG_MAX_DL_SIZE = 0x5B,
-
 	HALMAC_API_INIT_OBJ = 0x5C,
 	HALMAC_API_DEINIT_OBJ = 0x5D,
 	HALMAC_API_CFG_LA_MODE = 0x5E,
@@ -1598,14 +1634,40 @@ typedef enum _HALMAC_API_ID {
 	HALMAC_API_PHY_CFG = 0x67,
 	HALMAC_API_CFG_RX_FIFO_EXPANDING_MODE = 0x68,
 	HALMAC_API_CFG_CSI_RATE = 0x69,
+	HALMAC_API_P2PPS = 0x6A,
+	HALMAC_API_CFG_TX_ADDR = 0x6B,
+	HALMAC_API_CFG_NET_TYPE = 0x6C,
+	HALMAC_API_CFG_TSF_RESET = 0x6D,
+	HALMAC_API_CFG_BCN_SPACE = 0x6E,
+	HALMAC_API_CFG_BCN_CTRL = 0x6F,
+	HALMAC_API_CFG_SIDEBAND_INT = 0x70,
+	HALMAC_API_REGISTER_API = 0x71,
+	HALMAC_API_FREE_DOWNLOAD_FIRMWARE = 0x72,
+	HALMAC_API_GET_FW_VERSION = 0x73,
+	HALMAC_API_GET_EFUSE_AVAL_SIZE = 0x74,
+	HALMAC_API_CHK_TXDESC = 0x75,
+	HALMAC_API_SDIO_CMD53_4BYTE = 0x76,
+	HALMAC_API_CFG_TRANS_ADDR = 0x77,
+	HALMAC_API_INTF_INTEGRA_TUNING	= 0x78,
+	HALMAC_API_TXFIFO_IS_EMPTY = 0x79,
+	HALMAC_API_DOWNLOAD_FLASH = 0x7A,
+	HALMAC_API_READ_FLASH = 0x7B,
+	HALMAC_API_ERASE_FLASH = 0x7C,
+	HALMAC_API_CHECK_FLASH = 0x7D,
+	HALMAC_API_SDIO_HW_INFO = 0x80,
+	HALMAC_API_READ_EFUSE_BT = 0x81,
+	HALMAC_API_CFG_EFUSE_AUTO_CHECK = 0x82,
+	HALMAC_API_CFG_PINMUX_GET_FUNC = 0x83,
+	HALMAC_API_CFG_PINMUX_SET_FUNC = 0x84,
+	HALMAC_API_CFG_PINMUX_FREE_FUNC = 0x85,
+	HALMAC_API_CFG_PINMUX_WL_LED_MODE = 0x86,
+	HALMAC_API_CFG_PINMUX_WL_LED_SW_CTRL = 0x87,
+	HALMAC_API_CFG_PINMUX_SDIO_INT_POLARITY = 0x88,
+	HALMAC_API_CFG_PINMUX_GPIO_MODE = 0x89,
+	HALMAC_API_CFG_PINMUX_GPIO_OUTPUT = 0x90,
 	HALMAC_API_MAX
 } HALMAC_API_ID;
 
-typedef struct _HALMAC_API_RECORD {
-	HALMAC_API_ID api_array[API_ARRAY_SIZE];
-	u8 array_wptr;
-} HALMAC_API_RECORD, *PHALMAC_API_RECORD;
-
 typedef enum _HALMAC_LA_MODE {
 	HALMAC_LA_MODE_DISABLE = 0,
 	HALMAC_LA_MODE_PARTIAL = 1,
@@ -1621,6 +1683,14 @@ typedef enum _HALMAC_RX_FIFO_EXPANDING_MODE {
 	HALMAC_RX_FIFO_EXPANDING_MODE_UNDEFINE = 0x7F,
 } HALMAC_RX_FIFO_EXPANDING_MODE;
 
+typedef enum _HALMAC_SDIO_CMD53_4BYTE_MODE {
+	HALMAC_SDIO_CMD53_4BYTE_MODE_DISABLE = 0,
+	HALMAC_SDIO_CMD53_4BYTE_MODE_RW = 1,
+	HALMAC_SDIO_CMD53_4BYTE_MODE_R = 2,
+	HALMAC_SDIO_CMD53_4BYTE_MODE_W = 3,
+	HALMAC_SDIO_CMD53_4BYTE_MODE_UNDEFINE = 0x7F,
+} HALMAC_SDIO_CMD53_4BYTE_MODE;
+
 typedef enum _HALMAC_USB_MODE {
 	HALMAC_USB_MODE_U2 = 1,
 	HALMAC_USB_MODE_U3 = 2,
@@ -1648,6 +1718,9 @@ typedef enum _HALMAC_HW_ID {
 	HALMAC_HW_TX_DESC_SIZE = 0x11,
 	HALMAC_HW_RX_DESC_SIZE = 0x12,
 	HALMAC_HW_WLAN_EFUSE_AVAILABLE_SIZE = 0x13,
+	HALMAC_HW_AC_OQT_SIZE = 0x14,
+	HALMAC_HW_NON_AC_OQT_SIZE = 0x15,
+	HALMAC_HW_AC_QUEUE_NUM = 0x16,
 	/* Set HW value */
 	HALMAC_HW_USB_MODE = 0x60,
 	HALMAC_HW_SEQ_EN = 0x61,
@@ -1657,6 +1730,7 @@ typedef enum _HALMAC_HW_ID {
 	HALMAC_HW_EN_BB_RF = 0x65,
 	HALMAC_HW_SDIO_TX_PAGE_THRESHOLD = 0x66,
 	HALMAC_HW_AMPDU_CONFIG = 0x67,
+	HALMAC_HW_RX_SHIFT = 0x68,
 
 	HALMAC_HW_ID_UNDEFINE = 0x7F,
 } HALMAC_HW_ID;
@@ -1669,6 +1743,42 @@ typedef enum _HALMAC_EFUSE_BANK {
 	HALMAC_EFUSE_BANK_UNDEFINE = 0X7F,
 } HALMAC_EFUSE_BANK;
 
+typedef enum _HALMAC_SDIO_SPEC_VER {
+	HALMAC_SDIO_SPEC_VER_2_00 = 0,
+	HALMAC_SDIO_SPEC_VER_3_00 = 1,
+	HALMAC_SDIO_SPEC_VER_UNDEFINE = 0X7F,
+} HALMAC_SDIO_SPEC_VER;
+
+typedef enum _HALMAC_GPIO_FUNC {
+	HALMAC_GPIO_FUNC_WL_LED = 0,
+	HALMAC_GPIO_FUNC_SDIO_INT = 1,
+	HALMAC_GPIO_FUNC_SW_IO_0 = 2,
+	HALMAC_GPIO_FUNC_SW_IO_1 = 3,
+	HALMAC_GPIO_FUNC_SW_IO_2 = 4,
+	HALMAC_GPIO_FUNC_SW_IO_3 = 5,
+	HALMAC_GPIO_FUNC_SW_IO_4 = 6,
+	HALMAC_GPIO_FUNC_SW_IO_5 = 7,
+	HALMAC_GPIO_FUNC_SW_IO_6 = 8,
+	HALMAC_GPIO_FUNC_SW_IO_7 = 9,
+	HALMAC_GPIO_FUNC_SW_IO_8 = 10,
+	HALMAC_GPIO_FUNC_SW_IO_9 = 11,
+	HALMAC_GPIO_FUNC_SW_IO_10 = 12,
+	HALMAC_GPIO_FUNC_SW_IO_11 = 13,
+	HALMAC_GPIO_FUNC_SW_IO_12 = 14,
+	HALMAC_GPIO_FUNC_SW_IO_13 = 15,
+	HALMAC_GPIO_FUNC_SW_IO_14 = 16,
+	HALMAC_GPIO_FUNC_SW_IO_15 = 17,
+	HALMAC_GPIO_FUNC_UNDEFINE = 0X7F,
+} HALMAC_GPIO_FUNC;
+
+typedef enum _HALMAC_WLLED_MODE {
+	HALMAC_WLLED_MODE_TRX = 0,
+	HALMAC_WLLED_MODE_TX = 1,
+	HALMAC_WLLED_MODE_RX = 2,
+	HALMAC_WLLED_MODE_SW_CTRL = 3,
+	HALMAC_WLLED_MODE_UNDEFINE = 0X7F,
+} HALMAC_WLLED_MODE;
+
 typedef struct _HALMAC_TXFF_ALLOCATION {
 	u16 tx_fifo_pg_num;
 	u16 rsvd_pg_num;
@@ -1733,17 +1843,13 @@ typedef struct _HALMAC_CAM_ENTRY_FORMAT {
 typedef struct _HALMAC_TX_PAGE_THRESHOLD_INFO {
 	u32	threshold;
 	HALMAC_DMA_MAPPING dma_queue_sel;
+	u8 enable;
 } HALMAC_TX_PAGE_THRESHOLD_INFO, *PHALMAC_TX_PAGE_THRESHOLD_INFO;
 
 typedef struct _HALMAC_AMPDU_CONFIG {
 	u8 max_agg_num;
 } HALMAC_AMPDU_CONFIG, *PHALMAC_AMPDU_CONFIG;
 
-typedef struct _HALMAC_PORT_CFG {
-	u8 port0_sync_tsf;
-	u8 port1_sync_tsf;
-} HALMAC_PORT_CFG, *PHALMAC_PORT_CFG;
-
 typedef struct _HALMAC_RQPN_ {
 	HALMAC_TRX_MODE mode;
 	HALMAC_DMA_MAPPING dma_map_vo;
@@ -1766,16 +1872,58 @@ typedef struct _HALMAC_PG_NUM_ {
 typedef struct _HALMAC_INTF_PHY_PARA_ {
 	u16 offset;
 	u16 value;
+	u16 ip_sel;
 	u16 cut;
 	u16 plaform;
 } HALMAC_INTF_PHY_PARA, *PHALMAC_INTF_PHY_PARA;
 
+typedef struct _HALMAC_IQK_PARA_ {
+	u8 clear;
+	u8 segment_iqk;
+} HALMAC_IQK_PARA, *PHALMAC_IQK_PARA;
+
+typedef struct _HALMAC_SDIO_HW_INFO {
+	HALMAC_SDIO_SPEC_VER spec_ver;
+	u32 clock_speed;
+	u8 io_hi_speed_flag; /* Halmac internal use */
+} HALMAC_SDIO_HW_INFO, *PHALMAC_SDIO_HW_INFO;
+
+typedef struct _HALMAC_EDCA_PARA {
+	u8 aifs;
+	u8 cw;
+	u16 txop_limit;
+} HALMAC_EDCA_PARA, *PHALMAC_EDCA_PARA;
+
+typedef struct _HALMAC_PINMUX_INFO {
+	/* byte0 */
+	u8 wl_led:1;
+	u8 sdio_int:1;
+	u8 rsvd1:6;
+	/* byte1 */
+	u8 sw_io_0:1;
+	u8 sw_io_1:1;
+	u8 sw_io_2:1;
+	u8 sw_io_3:1;
+	u8 sw_io_4:1;
+	u8 sw_io_5:1;
+	u8 sw_io_6:1;
+	u8 sw_io_7:1;
+	/* byte2 */
+	u8 sw_io_8:1;
+	u8 sw_io_9:1;
+	u8 sw_io_10:1;
+	u8 sw_io_11:1;
+	u8 sw_io_12:1;
+	u8 sw_io_13:1;
+	u8 sw_io_14:1;
+	u8 sw_io_15:1;
+} HALMAC_PINMUX_INFO, *PHALMAC_PINMUX_INFO;
+
 /* Hal mac adapter */
 typedef struct _HALMAC_ADAPTER {
 	HALMAC_DMA_MAPPING halmac_ptcl_queue[HALMAC_PTCL_QUEUE_NUM]; /* Dma mapping of protocol queues */
-	HALMAC_FWLPS_OPTION	fwlps_option; /* low power state option */
-	HALMAC_WLAN_ADDR pHal_mac_addr[2]; /* mac address information, suppot 2 ports */
-	HALMAC_WLAN_ADDR pHal_bss_addr[2]; /* bss address information, suppot 2 ports */
+	HALMAC_WLAN_ADDR pHal_mac_addr[HALMAC_PORTIDMAX]; /* mac address information, suppot 2 ports */
+	HALMAC_WLAN_ADDR pHal_bss_addr[HALMAC_PORTIDMAX]; /* bss address information, suppot 2 ports */
 	HALMAC_MUTEX h2c_seq_mutex; /* Protect h2c_packet_seq packet*/
 	HALMAC_MUTEX EfuseMutex; /* Protect Efuse map memory of halmac_adapter */
 	HALMAC_CONFIG_PARA_INFO config_para_info;
@@ -1784,6 +1932,7 @@ typedef struct _HALMAC_ADAPTER {
 	HALMAC_HW_CONFIG_INFO hw_config_info; /* HW related information */
 	HALMAC_SDIO_FREE_SPACE sdio_free_space;
 	HALMAC_SND_INFO snd_info;
+	HALMAC_PINMUX_INFO pinmux_info;
 	VOID *pHalAdapter_backup; /* Backup HalAdapter address */
 	VOID *pDriver_adapter; /* Driver or FW adapter address. Do not write this memory*/
 	u8 *pHalEfuse_map;
@@ -1807,11 +1956,12 @@ typedef struct _HALMAC_ADAPTER {
 	u8 rpwm_record; /* record rpwm value */
 	u8 low_clk; /*LPS 32K or IPS 32K*/
 	u8 halmac_bulkout_num; /* USB bulkout num */
-	HALMAC_API_RECORD api_record; /* API record */
 	u8 gen_info_valid;
 	HALMAC_GENERAL_INFO general_info;
 	u8 drv_info_size;
-	u8 sdio_cmd53_4byte;
+	HALMAC_SDIO_CMD53_4BYTE_MODE sdio_cmd53_4byte;
+	HALMAC_SDIO_HW_INFO sdio_hw_info;
+	u8 efuse_auto_check_en;
 #if HALMAC_PLATFORM_TESTPROGRAM
 	HALMAC_TXAGG_BUFF_INFO halmac_tx_buf_info[4];
 	HALMAC_MUTEX agg_buff_mutex; /*used for tx_agg_buffer */
@@ -1823,165 +1973,176 @@ typedef struct _HALMAC_ADAPTER {
 
 /* Function pointer of  Hal mac API */
 typedef struct _HALMAC_API {
-	HALMAC_RET_STATUS(*halmac_mac_power_switch)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_MAC_POWER halmac_power);
-	HALMAC_RET_STATUS(*halmac_download_firmware)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pHamacl_fw, u32 halmac_fw_size);
-	HALMAC_RET_STATUS(*halmac_get_fw_version)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_FW_VERSION pFw_version);
-	HALMAC_RET_STATUS(*halmac_cfg_mac_addr)(PHALMAC_ADAPTER pHalmac_adapter, u8 halmac_port, PHALMAC_WLAN_ADDR pHal_address);
-	HALMAC_RET_STATUS(*halmac_cfg_bssid)(PHALMAC_ADAPTER pHalmac_adapter, u8 halmac_port, PHALMAC_WLAN_ADDR pHal_address);
-	HALMAC_RET_STATUS(*halmac_cfg_multicast_addr)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_WLAN_ADDR pHal_address);
-	HALMAC_RET_STATUS(*halmac_pre_init_system_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_init_system_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_init_trx_cfg)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_TRX_MODE Mode);
-	HALMAC_RET_STATUS(*halmac_init_h2c)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_cfg_rx_aggregation)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_RXAGG_CFG phalmac_rxagg_cfg);
-	HALMAC_RET_STATUS(*halmac_init_protocol_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_init_edca_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_cfg_operation_mode)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_WIRELESS_MODE wireless_mode);
-	HALMAC_RET_STATUS(*halmac_cfg_ch_bw)(PHALMAC_ADAPTER pHalmac_adapter, u8 channel, HALMAC_PRI_CH_IDX pri_ch_idx, HALMAC_BW bw);
-	HALMAC_RET_STATUS(*halmac_cfg_bw)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_BW bw);
-	HALMAC_RET_STATUS(*halmac_init_wmac_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_init_mac_cfg)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_TRX_MODE Mode);
-	HALMAC_RET_STATUS(*halmac_init_sdio_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_init_usb_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_init_pcie_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_init_interface_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_deinit_sdio_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_deinit_usb_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_deinit_pcie_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_deinit_interface_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_get_efuse_size)(PHALMAC_ADAPTER pHalmac_adapter, u32 *halmac_size);
-	HALMAC_RET_STATUS(*halmac_get_efuse_available_size)(PHALMAC_ADAPTER pHalmac_adapter, u32 *halmac_size);
-	HALMAC_RET_STATUS(*halmac_dump_efuse_map)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_EFUSE_READ_CFG cfg);
-	HALMAC_RET_STATUS(*halmac_dump_efuse_map_bt)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_EFUSE_BANK halmac_efues_bank, u32 bt_efuse_map_size, u8 *pBT_efuse_map);
-	HALMAC_RET_STATUS(*halmac_write_efuse)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u8 halmac_value);
-	HALMAC_RET_STATUS(*halmac_read_efuse)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u8 *pValue);
-	HALMAC_RET_STATUS(*halmac_switch_efuse_bank)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_EFUSE_BANK halmac_efues_bank);
-	HALMAC_RET_STATUS(*halmac_write_efuse_bt)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u8 halmac_value, HALMAC_EFUSE_BANK halmac_efues_bank);
-	HALMAC_RET_STATUS(*halmac_get_logical_efuse_size)(PHALMAC_ADAPTER pHalmac_adapter, u32 *halmac_size);
-	HALMAC_RET_STATUS(*halmac_dump_logical_efuse_map)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_EFUSE_READ_CFG cfg);
-	HALMAC_RET_STATUS(*halmac_write_logical_efuse)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u8 halmac_value);
-	HALMAC_RET_STATUS(*halmac_read_logical_efuse)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u8 *pValue);
-	HALMAC_RET_STATUS(*halmac_pg_efuse_by_map)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_PG_EFUSE_INFO pPg_efuse_info, HALMAC_EFUSE_READ_CFG cfg);
-	HALMAC_RET_STATUS(*halmac_get_c2h_info)(PHALMAC_ADAPTER pHalmac_adapter, u8 *halmac_buf, u32 halmac_size);
-	HALMAC_RET_STATUS(*halmac_cfg_fwlps_option)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_FWLPS_OPTION pLps_option);
-	HALMAC_RET_STATUS(*halmac_cfg_fwips_option)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_FWIPS_OPTION pIps_option);
-	HALMAC_RET_STATUS(*halmac_enter_wowlan)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_WOWLAN_OPTION pWowlan_option);
-	HALMAC_RET_STATUS(*halmac_leave_wowlan)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_enter_ps)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_PS_STATE ps_state);
-	HALMAC_RET_STATUS(*halmac_leave_ps)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_h2c_lb)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_debug)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_cfg_parameter)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_PHY_PARAMETER_INFO para_info, u8 full_fifo);
-	HALMAC_RET_STATUS(*halmac_update_packet)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_PACKET_ID pkt_id, u8 *pkt, u32 pkt_size);
-	HALMAC_RET_STATUS(*halmac_bcn_ie_filter)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_BCN_IE_INFO pBcn_ie_info);
+	HALMAC_RET_STATUS (*halmac_mac_power_switch)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_MAC_POWER halmac_power);
+	HALMAC_RET_STATUS (*halmac_download_firmware)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pHamacl_fw, u32 halmac_fw_size);
+	HALMAC_RET_STATUS (*halmac_free_download_firmware)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_DLFW_MEM dlfw_mem, u8 *pHamacl_fw, u32 halmac_fw_size);
+	HALMAC_RET_STATUS (*halmac_get_fw_version)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_FW_VERSION pFw_version);
+	HALMAC_RET_STATUS (*halmac_cfg_mac_addr)(PHALMAC_ADAPTER pHalmac_adapter, u8 halmac_port, PHALMAC_WLAN_ADDR pHal_address);
+	HALMAC_RET_STATUS (*halmac_cfg_bssid)(PHALMAC_ADAPTER pHalmac_adapter, u8 halmac_port, PHALMAC_WLAN_ADDR pHal_address);
+	HALMAC_RET_STATUS (*halmac_cfg_multicast_addr)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_WLAN_ADDR pHal_address);
+	HALMAC_RET_STATUS (*halmac_pre_init_system_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_init_system_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_init_trx_cfg)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_TRX_MODE Mode);
+	HALMAC_RET_STATUS (*halmac_init_h2c)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_cfg_rx_aggregation)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_RXAGG_CFG phalmac_rxagg_cfg);
+	HALMAC_RET_STATUS (*halmac_init_protocol_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_init_edca_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_cfg_operation_mode)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_WIRELESS_MODE wireless_mode);
+	HALMAC_RET_STATUS (*halmac_cfg_ch_bw)(PHALMAC_ADAPTER pHalmac_adapter, u8 channel, HALMAC_PRI_CH_IDX pri_ch_idx, HALMAC_BW bw);
+	HALMAC_RET_STATUS (*halmac_cfg_bw)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_BW bw);
+	HALMAC_RET_STATUS (*halmac_init_wmac_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_init_mac_cfg)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_TRX_MODE Mode);
+	HALMAC_RET_STATUS (*halmac_init_sdio_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_init_usb_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_init_pcie_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_init_interface_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_deinit_sdio_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_deinit_usb_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_deinit_pcie_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_deinit_interface_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_get_efuse_size)(PHALMAC_ADAPTER pHalmac_adapter, u32 *halmac_size);
+	HALMAC_RET_STATUS (*halmac_get_efuse_available_size)(PHALMAC_ADAPTER pHalmac_adapter, u32 *halmac_size);
+	HALMAC_RET_STATUS (*halmac_dump_efuse_map)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_EFUSE_READ_CFG cfg);
+	HALMAC_RET_STATUS (*halmac_dump_efuse_map_bt)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_EFUSE_BANK halmac_efues_bank, u32 bt_efuse_map_size, u8 *pBT_efuse_map);
+	HALMAC_RET_STATUS (*halmac_write_efuse)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u8 halmac_value);
+	HALMAC_RET_STATUS (*halmac_read_efuse)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u8 *pValue);
+	HALMAC_RET_STATUS (*halmac_switch_efuse_bank)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_EFUSE_BANK halmac_efues_bank);
+	HALMAC_RET_STATUS (*halmac_write_efuse_bt)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u8 halmac_value, HALMAC_EFUSE_BANK halmac_efues_bank);
+	HALMAC_RET_STATUS (*halmac_read_efuse_bt)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u8 *pValue, HALMAC_EFUSE_BANK halmac_efues_bank);
+	HALMAC_RET_STATUS (*halmac_cfg_efuse_auto_check)(PHALMAC_ADAPTER pHalmac_adapter, u8 enable);
+	HALMAC_RET_STATUS (*halmac_get_logical_efuse_size)(PHALMAC_ADAPTER pHalmac_adapter, u32 *halmac_size);
+	HALMAC_RET_STATUS (*halmac_dump_logical_efuse_map)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_EFUSE_READ_CFG cfg);
+	HALMAC_RET_STATUS (*halmac_write_logical_efuse)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u8 halmac_value);
+	HALMAC_RET_STATUS (*halmac_read_logical_efuse)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u8 *pValue);
+	HALMAC_RET_STATUS (*halmac_pg_efuse_by_map)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_PG_EFUSE_INFO pPg_efuse_info, HALMAC_EFUSE_READ_CFG cfg);
+	HALMAC_RET_STATUS (*halmac_get_c2h_info)(PHALMAC_ADAPTER pHalmac_adapter, u8 *halmac_buf, u32 halmac_size);
+	HALMAC_RET_STATUS (*halmac_h2c_lb)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_debug)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_cfg_parameter)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_PHY_PARAMETER_INFO para_info, u8 full_fifo);
+	HALMAC_RET_STATUS (*halmac_update_packet)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_PACKET_ID pkt_id, u8 *pkt, u32 pkt_size);
+	HALMAC_RET_STATUS (*halmac_bcn_ie_filter)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_BCN_IE_INFO pBcn_ie_info);
 	u8 (*halmac_reg_read_8)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset);
-	HALMAC_RET_STATUS(*halmac_reg_write_8)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u8 halmac_data);
+	HALMAC_RET_STATUS (*halmac_reg_write_8)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u8 halmac_data);
 	u16 (*halmac_reg_read_16)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset);
-	HALMAC_RET_STATUS(*halmac_reg_write_16)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u16 halmac_data);
+	HALMAC_RET_STATUS (*halmac_reg_write_16)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u16 halmac_data);
 	u32 (*halmac_reg_read_32)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset);
 	u32 (*halmac_reg_read_indirect_32)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset);
 	u8 (*halmac_reg_sdio_cmd53_read_n)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u32 halmac_size, u8 *halmac_data);
-	HALMAC_RET_STATUS(*halmac_reg_write_32)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u32 halmac_data);
-	HALMAC_RET_STATUS(*halmac_tx_allowed_sdio)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pHalmac_buf, u32 halmac_size);
-	HALMAC_RET_STATUS(*halmac_set_bulkout_num)(PHALMAC_ADAPTER pHalmac_adapter, u8 bulkout_num);
-	HALMAC_RET_STATUS(*halmac_get_sdio_tx_addr)(PHALMAC_ADAPTER pHalmac_adapter, u8 *halmac_buf, u32 halmac_size, u32 *pcmd53_addr);
-	HALMAC_RET_STATUS(*halmac_get_usb_bulkout_id)(PHALMAC_ADAPTER pHalmac_adapter, u8 *halmac_buf, u32 halmac_size, u8 *bulkout_id);
-	HALMAC_RET_STATUS(*halmac_timer_2s)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_fill_txdesc_checksum)(PHALMAC_ADAPTER pHalmac_adapter, u8 *cur_desc);
-	HALMAC_RET_STATUS(*halmac_update_datapack)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_DATA_TYPE halmac_data_type, PHALMAC_PHY_PARAMETER_INFO para_info);
-	HALMAC_RET_STATUS(*halmac_run_datapack)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_DATA_TYPE halmac_data_type);
-	HALMAC_RET_STATUS(*halmac_cfg_drv_info)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_DRV_INFO halmac_drv_info);
-	HALMAC_RET_STATUS(*halmac_send_bt_coex)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pBt_buf, u32 bt_size, u8 ack);
-	HALMAC_RET_STATUS(*halmac_verify_platform_api)(PHALMAC_ADAPTER pHalmac_adapte);
+	HALMAC_RET_STATUS (*halmac_reg_write_32)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u32 halmac_data);
+	HALMAC_RET_STATUS (*halmac_tx_allowed_sdio)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pHalmac_buf, u32 halmac_size);
+	HALMAC_RET_STATUS (*halmac_set_bulkout_num)(PHALMAC_ADAPTER pHalmac_adapter, u8 bulkout_num);
+	HALMAC_RET_STATUS (*halmac_get_sdio_tx_addr)(PHALMAC_ADAPTER pHalmac_adapter, u8 *halmac_buf, u32 halmac_size, u32 *pcmd53_addr);
+	HALMAC_RET_STATUS (*halmac_get_usb_bulkout_id)(PHALMAC_ADAPTER pHalmac_adapter, u8 *halmac_buf, u32 halmac_size, u8 *bulkout_id);
+	HALMAC_RET_STATUS (*halmac_timer_2s)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_fill_txdesc_checksum)(PHALMAC_ADAPTER pHalmac_adapter, u8 *cur_desc);
+	HALMAC_RET_STATUS (*halmac_update_datapack)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_DATA_TYPE halmac_data_type, PHALMAC_PHY_PARAMETER_INFO para_info);
+	HALMAC_RET_STATUS (*halmac_run_datapack)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_DATA_TYPE halmac_data_type);
+	HALMAC_RET_STATUS (*halmac_cfg_drv_info)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_DRV_INFO halmac_drv_info);
+	HALMAC_RET_STATUS (*halmac_send_bt_coex)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pBt_buf, u32 bt_size, u8 ack);
+	HALMAC_RET_STATUS (*halmac_verify_platform_api)(PHALMAC_ADAPTER pHalmac_adapte);
 	u32 (*halmac_get_fifo_size)(PHALMAC_ADAPTER pHalmac_adapter, HAL_FIFO_SEL halmac_fifo_sel);
-	HALMAC_RET_STATUS(*halmac_dump_fifo)(PHALMAC_ADAPTER pHalmac_adapter, HAL_FIFO_SEL halmac_fifo_sel, u32 halmac_start_addr, u32 halmac_fifo_dump_size, u8 *pFifo_map);
-	HALMAC_RET_STATUS(*halmac_cfg_txbf)(PHALMAC_ADAPTER pHalmac_adapter, u8 userid, HALMAC_BW bw, u8 txbf_en);
-	HALMAC_RET_STATUS(*halmac_cfg_mumimo)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_CFG_MUMIMO_PARA pCfgmu);
-	HALMAC_RET_STATUS(*halmac_cfg_sounding)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_SND_ROLE role, HALMAC_DATA_RATE datarate);
-	HALMAC_RET_STATUS(*halmac_del_sounding)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_SND_ROLE role);
-	HALMAC_RET_STATUS(*halmac_su_bfer_entry_init)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_SU_BFER_INIT_PARA pSu_bfer_init);
-	HALMAC_RET_STATUS(*halmac_su_bfee_entry_init)(PHALMAC_ADAPTER pHalmac_adapter, u8 userid, u16 paid);
-	HALMAC_RET_STATUS(*halmac_mu_bfer_entry_init)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_MU_BFER_INIT_PARA pMu_bfer_init);
-	HALMAC_RET_STATUS(*halmac_mu_bfee_entry_init)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_MU_BFEE_INIT_PARA pMu_bfee_init);
-	HALMAC_RET_STATUS(*halmac_su_bfer_entry_del)(PHALMAC_ADAPTER pHalmac_adapter, u8 userid);
-	HALMAC_RET_STATUS(*halmac_su_bfee_entry_del)(PHALMAC_ADAPTER pHalmac_adapter, u8 userid);
-	HALMAC_RET_STATUS(*halmac_mu_bfer_entry_del)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_mu_bfee_entry_del)(PHALMAC_ADAPTER pHalmac_adapter, u8 userid);
-	HALMAC_RET_STATUS(*halmac_add_ch_info)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_CH_INFO pCh_info);
-	HALMAC_RET_STATUS(*halmac_add_extra_ch_info)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_CH_EXTRA_INFO pCh_extra_info);
-	HALMAC_RET_STATUS(*halmac_ctrl_ch_switch)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_CH_SWITCH_OPTION pCs_option);
-	HALMAC_RET_STATUS(*halmac_clear_ch_info)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_send_general_info)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_GENERAL_INFO pgGeneral_info);
-	HALMAC_RET_STATUS(*halmac_start_iqk)(PHALMAC_ADAPTER pHalmac_adapter, u8 clear);
-	HALMAC_RET_STATUS(*halmac_ctrl_pwr_tracking)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_PWR_TRACKING_OPTION pPwr_tracking_opt);
-	HALMAC_RET_STATUS(*halmac_psd)(PHALMAC_ADAPTER pHalmac_adapter, u16 start_psd, u16 end_psd);
-	HALMAC_RET_STATUS(*halmac_cfg_tx_agg_align)(PHALMAC_ADAPTER pHalmac_adapter, u8 enable, u16 align_size);
-	HALMAC_RET_STATUS(*halmac_query_status)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_FEATURE_ID feature_id, HALMAC_CMD_PROCESS_STATUS *pProcess_status, u8 *data, u32 *size);
-	HALMAC_RET_STATUS(*halmac_reset_feature)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_FEATURE_ID feature_id);
-	HALMAC_RET_STATUS(*halmac_check_fw_status)(PHALMAC_ADAPTER pHalmac_adapter, u8 *fw_status);
-	HALMAC_RET_STATUS(*halmac_dump_fw_dmem)(PHALMAC_ADAPTER pHalmac_adapter, u8 *dmem, u32 *size);
-	HALMAC_RET_STATUS(*halmac_cfg_max_dl_size)(PHALMAC_ADAPTER pHalmac_adapter, u32 size);
-	HALMAC_RET_STATUS(*halmac_cfg_la_mode)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_LA_MODE la_mode);
-	HALMAC_RET_STATUS(*halmac_cfg_rx_fifo_expanding_mode)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_RX_FIFO_EXPANDING_MODE rx_fifo_expanding_mode);
-	HALMAC_RET_STATUS(*halmac_config_security)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_SECURITY_SETTING pSec_setting);
+	HALMAC_RET_STATUS (*halmac_dump_fifo)(PHALMAC_ADAPTER pHalmac_adapter, HAL_FIFO_SEL halmac_fifo_sel, u32 halmac_start_addr, u32 halmac_fifo_dump_size, u8 *pFifo_map);
+	HALMAC_RET_STATUS (*halmac_cfg_txbf)(PHALMAC_ADAPTER pHalmac_adapter, u8 userid, HALMAC_BW bw, u8 txbf_en);
+	HALMAC_RET_STATUS (*halmac_cfg_mumimo)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_CFG_MUMIMO_PARA pCfgmu);
+	HALMAC_RET_STATUS (*halmac_cfg_sounding)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_SND_ROLE role, HALMAC_DATA_RATE datarate);
+	HALMAC_RET_STATUS (*halmac_del_sounding)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_SND_ROLE role);
+	HALMAC_RET_STATUS (*halmac_su_bfer_entry_init)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_SU_BFER_INIT_PARA pSu_bfer_init);
+	HALMAC_RET_STATUS (*halmac_su_bfee_entry_init)(PHALMAC_ADAPTER pHalmac_adapter, u8 userid, u16 paid);
+	HALMAC_RET_STATUS (*halmac_mu_bfer_entry_init)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_MU_BFER_INIT_PARA pMu_bfer_init);
+	HALMAC_RET_STATUS (*halmac_mu_bfee_entry_init)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_MU_BFEE_INIT_PARA pMu_bfee_init);
+	HALMAC_RET_STATUS (*halmac_su_bfer_entry_del)(PHALMAC_ADAPTER pHalmac_adapter, u8 userid);
+	HALMAC_RET_STATUS (*halmac_su_bfee_entry_del)(PHALMAC_ADAPTER pHalmac_adapter, u8 userid);
+	HALMAC_RET_STATUS (*halmac_mu_bfer_entry_del)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_mu_bfee_entry_del)(PHALMAC_ADAPTER pHalmac_adapter, u8 userid);
+	HALMAC_RET_STATUS (*halmac_add_ch_info)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_CH_INFO pCh_info);
+	HALMAC_RET_STATUS (*halmac_add_extra_ch_info)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_CH_EXTRA_INFO pCh_extra_info);
+	HALMAC_RET_STATUS (*halmac_ctrl_ch_switch)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_CH_SWITCH_OPTION pCs_option);
+	HALMAC_RET_STATUS (*halmac_p2pps)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_P2PPS pP2PPS);
+	HALMAC_RET_STATUS (*halmac_clear_ch_info)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_send_general_info)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_GENERAL_INFO pgGeneral_info);
+	HALMAC_RET_STATUS (*halmac_start_iqk)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_IQK_PARA pIqk_para);
+	HALMAC_RET_STATUS (*halmac_ctrl_pwr_tracking)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_PWR_TRACKING_OPTION pPwr_tracking_opt);
+	HALMAC_RET_STATUS (*halmac_psd)(PHALMAC_ADAPTER pHalmac_adapter, u16 start_psd, u16 end_psd);
+	HALMAC_RET_STATUS (*halmac_cfg_tx_agg_align)(PHALMAC_ADAPTER pHalmac_adapter, u8 enable, u16 align_size);
+	HALMAC_RET_STATUS (*halmac_query_status)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_FEATURE_ID feature_id, HALMAC_CMD_PROCESS_STATUS *pProcess_status, u8 *data, u32 *size);
+	HALMAC_RET_STATUS (*halmac_reset_feature)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_FEATURE_ID feature_id);
+	HALMAC_RET_STATUS (*halmac_check_fw_status)(PHALMAC_ADAPTER pHalmac_adapter, u8 *fw_status);
+	HALMAC_RET_STATUS (*halmac_dump_fw_dmem)(PHALMAC_ADAPTER pHalmac_adapter, u8 *dmem, u32 *size);
+	HALMAC_RET_STATUS (*halmac_cfg_max_dl_size)(PHALMAC_ADAPTER pHalmac_adapter, u32 size);
+	HALMAC_RET_STATUS (*halmac_cfg_la_mode)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_LA_MODE la_mode);
+	HALMAC_RET_STATUS (*halmac_cfg_rx_fifo_expanding_mode)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_RX_FIFO_EXPANDING_MODE rx_fifo_expanding_mode);
+	HALMAC_RET_STATUS (*halmac_config_security)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_SECURITY_SETTING pSec_setting);
 	u8 (*halmac_get_used_cam_entry_num)(PHALMAC_ADAPTER pHalmac_adapter, HAL_SECURITY_TYPE sec_type);
-	HALMAC_RET_STATUS(*halmac_write_cam)(PHALMAC_ADAPTER pHalmac_adapter, u32 entry_index, PHALMAC_CAM_ENTRY_INFO pCam_entry_info);
-	HALMAC_RET_STATUS(*halmac_read_cam_entry)(PHALMAC_ADAPTER pHalmac_adapter, u32 entry_index, PHALMAC_CAM_ENTRY_FORMAT pContent);
-	HALMAC_RET_STATUS(*halmac_clear_cam_entry)(PHALMAC_ADAPTER pHalmac_adapter, u32 entry_index);
-	HALMAC_RET_STATUS(*halmac_get_hw_value)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_HW_ID hw_id, VOID *pvalue);
-	HALMAC_RET_STATUS(*halmac_set_hw_value)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_HW_ID hw_id, VOID *pvalue);
-	HALMAC_RET_STATUS(*halmac_cfg_drv_rsvd_pg_num)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_DRV_RSVD_PG_NUM pg_num);
-	HALMAC_RET_STATUS(*halmac_get_chip_version)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_VER *version);
-	HALMAC_RET_STATUS(*halmac_chk_txdesc)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pHalmac_buf, u32 halmac_size);
-	HALMAC_RET_STATUS(*halmac_dl_drv_rsvd_page)(PHALMAC_ADAPTER pHalmac_adapter, u8 pg_offset, u8 *pHal_buf, u32 size);
-	HALMAC_RET_STATUS(*halmac_pcie_switch)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_PCIE_CFG pcie_cfg);
-	HALMAC_RET_STATUS(*halmac_phy_cfg)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_INTF_PHY_PLATFORM platform);
-	HALMAC_RET_STATUS(*halmac_cfg_csi_rate)(PHALMAC_ADAPTER pHalmac_adapter, u8 rssi, u8 current_rate, u8 fixrate_en, u8 *new_rate);
-	HALMAC_RET_STATUS(*halmac_sdio_cmd53_4byte)(PHALMAC_ADAPTER pHalmac_adapter, u8 enable);
-
+	HALMAC_RET_STATUS (*halmac_write_cam)(PHALMAC_ADAPTER pHalmac_adapter, u32 entry_index, PHALMAC_CAM_ENTRY_INFO pCam_entry_info);
+	HALMAC_RET_STATUS (*halmac_read_cam_entry)(PHALMAC_ADAPTER pHalmac_adapter, u32 entry_index, PHALMAC_CAM_ENTRY_FORMAT pContent);
+	HALMAC_RET_STATUS (*halmac_clear_cam_entry)(PHALMAC_ADAPTER pHalmac_adapter, u32 entry_index);
+	HALMAC_RET_STATUS (*halmac_get_hw_value)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_HW_ID hw_id, VOID *pvalue);
+	HALMAC_RET_STATUS (*halmac_set_hw_value)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_HW_ID hw_id, VOID *pvalue);
+	HALMAC_RET_STATUS (*halmac_cfg_drv_rsvd_pg_num)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_DRV_RSVD_PG_NUM pg_num);
+	HALMAC_RET_STATUS (*halmac_get_chip_version)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_VER version);
+	HALMAC_RET_STATUS (*halmac_chk_txdesc)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pHalmac_buf, u32 halmac_size);
+	HALMAC_RET_STATUS (*halmac_dl_drv_rsvd_page)(PHALMAC_ADAPTER pHalmac_adapter, u8 pg_offset, u8 *pHal_buf, u32 size);
+	HALMAC_RET_STATUS (*halmac_pcie_switch)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_PCIE_CFG pcie_cfg);
+	HALMAC_RET_STATUS (*halmac_phy_cfg)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_INTF_PHY_PLATFORM platform);
+	HALMAC_RET_STATUS (*halmac_cfg_csi_rate)(PHALMAC_ADAPTER pHalmac_adapter, u8 rssi, u8 current_rate, u8 fixrate_en, u8 *new_rate);
+	HALMAC_RET_STATUS (*halmac_sdio_cmd53_4byte)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_SDIO_CMD53_4BYTE_MODE cmd53_4byte_mode);
+	HALMAC_RET_STATUS (*halmac_sdio_hw_info)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_SDIO_HW_INFO pSdio_hw_info);
+	HALMAC_RET_STATUS (*halmac_interface_integration_tuning)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_txfifo_is_empty)(PHALMAC_ADAPTER pHalmac_adapter, u32 chk_num);
+	HALMAC_RET_STATUS (*halmac_download_flash)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pHamacl_fw, u32 halmac_fw_size, u32 rom_address);
+	HALMAC_RET_STATUS (*halmac_read_flash)(PHALMAC_ADAPTER pHalmac_adapter, u32 addr);
+	HALMAC_RET_STATUS (*halmac_erase_flash)(PHALMAC_ADAPTER pHalmac_adapter, u8 erase_cmd, u32 addr);
+	HALMAC_RET_STATUS (*halmac_check_flash)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pHalmac_fw, u32 halmac_fw_size, u32 addr);
+	HALMAC_RET_STATUS (*halmac_cfg_edca_para)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_ACQ_ID acq_id, PHALMAC_EDCA_PARA pEdca_para);
+	HALMAC_RET_STATUS (*halmac_pinmux_get_func)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_GPIO_FUNC gpio_func, u8 *pEnable);
+	HALMAC_RET_STATUS (*halmac_pinmux_set_func)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_GPIO_FUNC gpio_func);
+	HALMAC_RET_STATUS (*halmac_pinmux_free_func)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_GPIO_FUNC gpio_func);
+	HALMAC_RET_STATUS (*halmac_pinmux_wl_led_mode)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_WLLED_MODE wlled_mode);
+	VOID (*halmac_pinmux_wl_led_sw_ctrl)(PHALMAC_ADAPTER pHalmac_adapter, u8 led_on);
+	VOID (*halmac_pinmux_sdio_int_polarity)(PHALMAC_ADAPTER pHalmac_adapter, u8 low_active);
+	HALMAC_RET_STATUS (*halmac_pinmux_gpio_mode)(PHALMAC_ADAPTER pHalmac_adapter, u8 gpio_id, u8 output);
+	HALMAC_RET_STATUS (*halmac_pinmux_gpio_output)(PHALMAC_ADAPTER pHalmac_adapter, u8 gpio_id, u8 high);
+	HALMAC_RET_STATUS (*halmac_pinmux_pin_status)(PHALMAC_ADAPTER pHalmac_adapter, u8 gpio_id, u8 *pHigh);
 #if HALMAC_PLATFORM_TESTPROGRAM
-	HALMAC_RET_STATUS(*halmac_gen_txdesc)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pPcket_buffer, PHAL_TXDESC_INFO pTxdesc_info);
-	HALMAC_RET_STATUS(*halmac_txdesc_parser)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pTxdesc, PHAL_TXDESC_PARSER pTxdesc_parser);
-	HALMAC_RET_STATUS(*halmac_rxdesc_parser)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pRxdesc, PHAL_RXDESC_PARSER pRxdesc_parser);
-	HALMAC_RET_STATUS(*halmac_get_txdesc_size)(PHALMAC_ADAPTER pHalmac_adapter, PHAL_TXDESC_INFO pTxdesc_info, u32 *size);
-	HALMAC_RET_STATUS(*halmac_send_packet)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pBuf, u32 size, PHAL_TXDESC_INFO pTxdesc_Info);
-	HALMAC_RET_STATUS(*halmac_get_pcie_packet)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pBuf, u32 *size);
-	HALMAC_RET_STATUS(*halmac_gen_txagg_desc)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pPcket_buffer, u32 agg_num);
-	HALMAC_RET_STATUS(*halmac_parse_packet)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pBuf, PHAL_RXDESC_INFO pRxdesc_info, u8 **next_pkt);
+	HALMAC_RET_STATUS (*halmac_gen_txdesc)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pPcket_buffer, PHAL_TXDESC_INFO pTxdesc_info);
+	HALMAC_RET_STATUS (*halmac_txdesc_parser)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pTxdesc, PHAL_TXDESC_PARSER pTxdesc_parser);
+	HALMAC_RET_STATUS (*halmac_rxdesc_parser)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pRxdesc, PHAL_RXDESC_PARSER pRxdesc_parser);
+	HALMAC_RET_STATUS (*halmac_get_txdesc_size)(PHALMAC_ADAPTER pHalmac_adapter, PHAL_TXDESC_INFO pTxdesc_info, u32 *size);
+	HALMAC_RET_STATUS (*halmac_send_packet)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pBuf, u32 size, PHAL_TXDESC_INFO pTxdesc_Info);
+	HALMAC_RET_STATUS (*halmac_get_pcie_packet)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pBuf, u32 *size);
+	HALMAC_RET_STATUS (*halmac_gen_txagg_desc)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pPcket_buffer, u32 agg_num);
+	HALMAC_RET_STATUS (*halmac_parse_packet)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pBuf, PHAL_RXDESC_INFO pRxdesc_info, u8 **next_pkt);
 	u32 (*halmac_bb_reg_read)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u8 len);
-	HALMAC_RET_STATUS(*halmac_bb_reg_write)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u32 halmac_data, u8 len);
+	HALMAC_RET_STATUS (*halmac_bb_reg_write)(PHALMAC_ADAPTER pHalmac_adapter, u32 halmac_offset, u32 halmac_data, u8 len);
 	u32 (*halmac_rf_reg_read)(PHALMAC_ADAPTER pHalmac_adapter, PHAL_RF_REG_INFO pRf_reg_info);
-	HALMAC_RET_STATUS(*halmac_rf_reg_write)(PHALMAC_ADAPTER pHalmac_adapter, PHAL_RF_REG_INFO pRf_reg_info);
-	HALMAC_RET_STATUS(*halmac_init_antenna_selection)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_bb_preconfig)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_init_crystal_capacity)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_trx_antenna_setting)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_himr_setting_sdio)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_SDIO_HIMR_INFO sdio_himr_sdio);
-	HALMAC_RET_STATUS(*halmac_dump_cam_table)(PHALMAC_ADAPTER pHalmac_adapter, u32 entry_num, PHALMAC_CAM_ENTRY_FORMAT pCam_table);
-	HALMAC_RET_STATUS(*halmac_load_cam_table)(PHALMAC_ADAPTER pHalmac_adapter, u8 entry_num, PHALMAC_CAM_ENTRY_FORMAT pCam_table);
-	HALMAC_RET_STATUS(*halmac_send_beacon)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pBuf, u32 size, PHALMAC_BEACON_INFO pbeacon_info);
-	HALMAC_RET_STATUS(*halmac_get_management_txdesc)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pBuf, u32 *pSize, PHALMAC_MGNT_INFO pmgnt_info);
-	HALMAC_RET_STATUS(*halmac_send_control)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pBuf, u32 size, PHALMAC_CTRL_INFO pctrl_info);
-	HALMAC_RET_STATUS(*halmac_send_hiqueue)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pBuf, u32 size, PHALMAC_HIGH_QUEUE_INFO pHigh_info);
-	HALMAC_RET_STATUS(*halmac_run_pwrseq)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_PWR_SEQ_ID seq);
-	HALMAC_RET_STATUS(*halmac_media_status_rpt)(PHALMAC_ADAPTER pHalmac_adapter, u8 op_mode, u8 mac_id_ind, u8 mac_id, u8 mac_id_end);
-	HALMAC_RET_STATUS(*halmac_stop_beacon)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_check_trx_status)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_set_agg_num)(PHALMAC_ADAPTER pHalmac_adapter, u8 agg_num);
-	HALMAC_RET_STATUS(*halmac_timer_10ms)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_download_firmware_fpag)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pHamacl_fw, u32 halmac_fw_size, u32 iram_address);
-	HALMAC_RET_STATUS(*halmac_download_rom_fpga)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pHamacl_fw, u32 halmac_fw_size, u32 rom_address);
-	HALMAC_RET_STATUS(*halmac_download_flash)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pHamacl_fw, u32 halmac_fw_size, u32 rom_address);
-	HALMAC_RET_STATUS(*halmac_erase_flash)(PHALMAC_ADAPTER pHalmac_adapter);
-	HALMAC_RET_STATUS(*halmac_check_flash)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pHamacl_fw, u32 halmac_fw_size);
-	HALMAC_RET_STATUS(*halmac_send_nlo)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_NLO_CFG pNlo_cfg);
-	HALMAC_RET_STATUS(*halmac_get_chip_type)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_CHIP_TYPE pChip_type);
+	HALMAC_RET_STATUS (*halmac_rf_reg_write)(PHALMAC_ADAPTER pHalmac_adapter, PHAL_RF_REG_INFO pRf_reg_info);
+	HALMAC_RET_STATUS (*halmac_init_antenna_selection)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_bb_preconfig)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_init_crystal_capacity)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_trx_antenna_setting)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_himr_setting_sdio)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_SDIO_HIMR_INFO sdio_himr_sdio);
+	HALMAC_RET_STATUS (*halmac_dump_cam_table)(PHALMAC_ADAPTER pHalmac_adapter, u32 entry_num, PHALMAC_CAM_ENTRY_FORMAT pCam_table);
+	HALMAC_RET_STATUS (*halmac_load_cam_table)(PHALMAC_ADAPTER pHalmac_adapter, u8 entry_num, PHALMAC_CAM_ENTRY_FORMAT pCam_table);
+	HALMAC_RET_STATUS (*halmac_send_beacon)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pBuf, u32 size, PHALMAC_BEACON_INFO pbeacon_info);
+	HALMAC_RET_STATUS (*halmac_get_management_txdesc)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pBuf, u32 *pSize, PHALMAC_MGNT_INFO pmgnt_info);
+	HALMAC_RET_STATUS (*halmac_send_control)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pBuf, u32 size, PHALMAC_CTRL_INFO pctrl_info);
+	HALMAC_RET_STATUS (*halmac_send_hiqueue)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pBuf, u32 size, PHALMAC_HIGH_QUEUE_INFO pHigh_info);
+	HALMAC_RET_STATUS (*halmac_run_pwrseq)(PHALMAC_ADAPTER pHalmac_adapter, HALMAC_PWR_SEQ_ID seq);
+	HALMAC_RET_STATUS (*halmac_stop_beacon)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_check_trx_status)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_set_agg_num)(PHALMAC_ADAPTER pHalmac_adapter, u8 agg_num);
+	HALMAC_RET_STATUS (*halmac_timer_10ms)(PHALMAC_ADAPTER pHalmac_adapter);
+	HALMAC_RET_STATUS (*halmac_download_firmware_fpag)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pHamacl_fw, u32 halmac_fw_size, u32 iram_address);
+	HALMAC_RET_STATUS (*halmac_download_rom_fpga)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pHamacl_fw, u32 halmac_fw_size, u32 rom_address);
+	HALMAC_RET_STATUS (*halmac_send_nlo)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_NLO_CFG pNlo_cfg);
+	HALMAC_RET_STATUS (*halmac_get_chip_type)(PHALMAC_ADAPTER pHalmac_adapter, PHALMAC_CHIP_TYPE pChip_type);
 	u32 (*halmac_get_rx_agg_num)(PHALMAC_ADAPTER pHalmac_adapter, u32 pkt_size, u8 *pPkt_buff);
 	u8 (*halmac_check_rx_scsi_resp)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pRxdesc, PHAL_RXDESC_PARSER pRxdesc_parser);
 	VOID (*halmac_get_hcpwm)(PHALMAC_ADAPTER pHalmac_adapter, u8 *pHcpwm);
 	VOID (*halmac_get_hcpwm2)(PHALMAC_ADAPTER pHalmac_adapter, u16 *pHcpwm2);
 	VOID (*halmac_set_hrpwm)(PHALMAC_ADAPTER pHalmac_adapter, u8 hrpwm);
 	VOID (*halmac_set_hrpwm2)(PHALMAC_ADAPTER pHalmac_adapter, u16 hrpwm2);
+	HALMAC_RET_STATUS (*halmac_coex_cfg)(PHALMAC_ADAPTER pHalmac_adapter);
 #endif
 } HALMAC_API, *PHALMAC_API;
 
@@ -1992,7 +2153,7 @@ halmac_adapter_validate(
 	PHALMAC_ADAPTER pHalmac_adapter
 )
 {
-	if ((NULL == pHalmac_adapter) || (pHalmac_adapter->pHalAdapter_backup != pHalmac_adapter))
+	if ((pHalmac_adapter == NULL) || (pHalmac_adapter->pHalAdapter_backup != pHalmac_adapter))
 		return HALMAC_RET_ADAPTER_INVALID;
 
 	return HALMAC_RET_SUCCESS;
@@ -2003,7 +2164,7 @@ halmac_api_validate(
 	PHALMAC_ADAPTER pHalmac_adapter
 )
 {
-	if (HALMAC_API_STATE_INIT != pHalmac_adapter->halmac_state.api_state)
+	if (pHalmac_adapter->halmac_state.api_state != HALMAC_API_STATE_INIT)
 		return HALMAC_RET_API_INVALID;
 
 	return HALMAC_RET_SUCCESS;
@@ -2014,7 +2175,7 @@ halmac_fw_validate(
 	PHALMAC_ADAPTER pHalmac_adapter
 )
 {
-	if (HALMAC_DLFW_DONE != pHalmac_adapter->halmac_state.dlfw_state && HALMAC_GEN_INFO_SENT != pHalmac_adapter->halmac_state.dlfw_state)
+	if (pHalmac_adapter->halmac_state.dlfw_state != HALMAC_DLFW_DONE && pHalmac_adapter->halmac_state.dlfw_state != HALMAC_GEN_INFO_SENT)
 		return HALMAC_RET_NO_DLFW;
 
 	return HALMAC_RET_SUCCESS;
diff --git a/rtl8822BU/hal/halmac/halmac_usb_reg.h b/rtl8822BU/hal/halmac/halmac_usb_reg.h
index 1ff9bde..b984670 100755..100644
--- a/rtl8822BU/hal/halmac/halmac_usb_reg.h
+++ b/rtl8822BU/hal/halmac/halmac_usb_reg.h
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ ******************************************************************************/
+
 #ifndef __HALMAC_USB_REG_H__
 #define __HALMAC_USB_REG_H__
 
diff --git a/rtl8822BU/hal/led/hal_usb_led.c b/rtl8822BU/hal/led/hal_usb_led.c
index 099ea74..41f1f6a 100755..100644
--- a/rtl8822BU/hal/led/hal_usb_led.c
+++ b/rtl8822BU/hal/led/hal_usb_led.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #include <drv_types.h>
 #include <hal_data.h>
@@ -4267,7 +4262,7 @@ InitLed(
 	pLed->LedPin = LedPin;
 
 	ResetLedStatus(pLed);
-	_init_timer(&(pLed->BlinkTimer), padapter->pnetdev, BlinkTimerCallback, pLed);
+	rtw_init_timer(&(pLed->BlinkTimer), padapter, BlinkTimerCallback, pLed);
 	_init_workitem(&(pLed->BlinkWorkItem), BlinkWorkItemCallback, pLed);
 }
 
diff --git a/rtl8822BU/hal/phydm/ap_makefile.mk b/rtl8822BU/hal/phydm/ap_makefile.mk
new file mode 100644
index 0000000..5731398
--- a/dev/null
+++ b/rtl8822BU/hal/phydm/ap_makefile.mk
@@ -0,0 +1,109 @@
+

+_PHYDM_FILES :=\

+	phydm/phydm.o \

+	phydm/phydm_dig.o\

+	phydm/phydm_antdiv.o\

+	phydm/phydm_dynamicbbpowersaving.o\

+	phydm/phydm_pathdiv.o\

+	phydm/phydm_rainfo.o\

+	phydm/phydm_dynamictxpower.o\

+	phydm/phydm_adaptivity.o\

+	phydm/phydm_debug.o\

+	phydm/phydm_interface.o\

+	phydm/phydm_hwconfig.o\

+	phydm/phydm_dfs.o\

+	phydm/phydm_cfotracking.o\

+	phydm/phydm_acs.o\

+	phydm/phydm_adc_sampling.o\

+	phydm/phydm_ccx.o\

+	phydm/txbf/phydm_hal_txbf_api.o\

+	EdcaTurboCheck.o\

+	phydm/halrf/halrf.o\

+	phydm/halrf/halphyrf_ap.o\

+	phydm/halrf/halrf_powertracking_ap.o\

+	phydm/halrf/halrf_kfree.o

+

+ifeq ($(CONFIG_RTL_88E_SUPPORT),y)

+	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)

+		_PHYDM_FILES += \

+		phydm/rtl8188e/halhwimg8188e_bb.o\

+		phydm/rtl8188e/halhwimg8188e_mac.o\

+		phydm/rtl8188e/halhwimg8188e_rf.o\

+		phydm/rtl8188e/phydm_regconfig8188e.o\

+		phydm/rtl8188e/hal8188erateadaptive.o\

+		phydm/rtl8188e/phydm_rtl8188e.o\

+		phydm/halrf/rtl8188e/halrf_8188e_ap.o

+	endif

+endif

+	

+ifeq ($(CONFIG_RTL_8812_SUPPORT),y)

+	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)

+		_PHYDM_FILES += ./phydm/halrf/rtl8812a/halrf_8812a_ap.o

+	endif

+endif

+	

+ifeq ($(CONFIG_WLAN_HAL_8881A),y)

+	_PHYDM_FILES += phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.o

+endif

+

+ifeq ($(CONFIG_WLAN_HAL_8192EE),y)

+	_PHYDM_FILES += \

+	phydm/halrf/rtl8192e/halrf_8192e_ap.o\

+	phydm/rtl8192e/phydm_rtl8192e.o

+endif

+

+ifeq ($(CONFIG_WLAN_HAL_8814AE),y)

+	rtl8192cd-objs += phydm/halrf/rtl8814a/halrf_8814a_ap.o

+	rtl8192cd-objs += phydm/halrf/rtl8814a/halrf_iqk_8814a.o

+	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)

+		rtl8192cd-objs += \

+		phydm/rtl8814a/halhwimg8814a_bb.o\

+		phydm/rtl8814a/halhwimg8814a_mac.o\

+		phydm/rtl8814a/halhwimg8814a_rf.o\

+		phydm/rtl8814a/phydm_regconfig8814a.o\

+		phydm/rtl8814a/phydm_rtl8814a.o			

+	endif

+endif

+	

+ifeq ($(CONFIG_WLAN_HAL_8822BE),y)

+	_PHYDM_FILES += phydm/halrf/rtl8822b/halrf_8822b.o

+	_PHYDM_FILES += phydm/halrf/rtl8822b/halrf_iqk_8822b.o

+	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)

+		_PHYDM_FILES += \

+		phydm/rtl8822b/halhwimg8822b_bb.o\

+		phydm/rtl8822b/halhwimg8822b_mac.o\

+		phydm/rtl8822b/halhwimg8822b_rf.o\

+		phydm/rtl8822b/halhwimg8822b_fw.o\

+		phydm/rtl8822b/phydm_regconfig8822b.o\

+		phydm/rtl8822b/phydm_hal_api8822b.o\

+		phydm/rtl8822b/phydm_rtl8822b.o

+	endif

+endif

+

+ifeq ($(CONFIG_WLAN_HAL_8821CE),y)

+	_PHYDM_FILES += phydm/halrf/rtl8821c/halrf_8821c.o

+	_PHYDM_FILES += phydm/halrf/rtl8821c/halrf_iqk_8821c.o

+	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)

+		_PHYDM_FILES += \

+		phydm/rtl8821c/halhwimg8821c_bb.o\

+		phydm/rtl8821c/halhwimg8821c_mac.o\

+		phydm/rtl8821c/halhwimg8821c_rf.o\

+		phydm/rtl8821c/phydm_regconfig8821c.o\

+		phydm/rtl8821c/phydm_hal_api8821c.o

+	endif

+endif

+	

+ifeq ($(CONFIG_WLAN_HAL_8197F),y)

+		_PHYDM_FILES += phydm/halrf/rtl8197f/halrf_8197f.o

+		_PHYDM_FILES += phydm/halrf/rtl8197f/halrf_iqk_8197f.o

+		_PHYDM_FILES += efuse_97f/efuse.o

+	ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y)

+		_PHYDM_FILES += \

+		phydm/rtl8197f/halhwimg8197f_bb.o\

+		phydm/rtl8197f/halhwimg8197f_mac.o\

+		phydm/rtl8197f/halhwimg8197f_rf.o\

+		phydm/rtl8197f/phydm_hal_api8197f.o\

+		phydm/rtl8197f/phydm_regconfig8197f.o\

+		phydm/rtl8197f/phydm_rtl8197f.o

+	endif

+endif

diff --git a/rtl8822BU/hal/phydm/halhwimg.h b/rtl8822BU/hal/phydm/halhwimg.h
index 14a9f63..e8f5802 100755..100644
--- a/rtl8822BU/hal/phydm/halhwimg.h
+++ b/rtl8822BU/hal/phydm/halhwimg.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #pragma once
 #ifndef __INC_HW_IMG_H
 #define __INC_HW_IMG_H
diff --git a/rtl8822BU/hal/phydm/halphyrf_ap.c b/rtl8822BU/hal/phydm/halphyrf_ap.c
deleted file mode 100755
index 534d421..0000000
--- a/rtl8822BU/hal/phydm/halphyrf_ap.c
+++ b/dev/null
@@ -1,2665 +0,0 @@
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
-
-#include "mp_precomp.h"
-#include "phydm_precomp.h"
-
-#ifndef index_mapping_NUM_88E
-	#define	index_mapping_NUM_88E	15
-#endif
-
-/* #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) */
-
-#define	CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _delta_thermal) \
-	do {\
-		for (_offset = 0; _offset < _size; _offset++) { \
-			\
-			if (_delta_thermal < thermal_threshold[_direction][_offset]) { \
-				\
-				if (_offset != 0)\
-					_offset--;\
-				break;\
-			} \
-		}			\
-		if (_offset >= _size)\
-			_offset = _size-1;\
-	} while (0)
-
-
-void configure_txpower_track(
-	void		*p_dm_void,
-	struct _TXPWRTRACK_CFG	*p_config
-)
-{
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-#if RTL8812A_SUPPORT
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	/* if (IS_HARDWARE_TYPE_8812(p_dm_odm->adapter)) */
-	if (p_dm_odm->support_ic_type == ODM_RTL8812)
-		configure_txpower_track_8812a(p_config);
-	/* else */
-#endif
-#endif
-
-#if RTL8814A_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8814A)
-		configure_txpower_track_8814a(p_config);
-#endif
-
-
-#if RTL8188E_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8188E)
-		configure_txpower_track_8188e(p_config);
-#endif
-
-#if RTL8197F_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8197F)
-		configure_txpower_track_8197f(p_config);
-#endif
-
-#if RTL8822B_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8822B)
-		configure_txpower_track_8822b(p_config);
-#endif
-
-
-}
-
-#if (RTL8192E_SUPPORT == 1)
-void
-odm_txpowertracking_callback_thermal_meter_92e(
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	void		*p_dm_void
-#else
-	struct _ADAPTER	*adapter
-#endif
-)
-{
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8	thermal_value = 0, delta, delta_IQK, delta_LCK, channel, is_decrease, rf_mimo_mode;
-	u8	thermal_value_avg_count = 0;
-	u8     OFDM_min_index = 10; /* OFDM BB Swing should be less than +2.5dB, which is required by Arthur */
-	s8	OFDM_index[2], index ;
-	u32	thermal_value_avg = 0, reg0x18;
-	u32	i = 0, j = 0, rf;
-	s32	value32, CCK_index = 0, ele_A, ele_D, ele_C, X, Y;
-	struct rtl8192cd_priv	*priv = p_dm_odm->priv;
-
-	rf_mimo_mode = p_dm_odm->rf_type;
-	/* ODM_RT_TRACE(p_dm_odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("%s:%d rf_mimo_mode:%d\n", __FUNCTION__, __LINE__, rf_mimo_mode)); */
-
-#ifdef MP_TEST
-	if ((OPMODE & WIFI_MP_STATE) || priv->pshare->rf_ft_var.mp_specific) {
-		channel = priv->pshare->working_channel;
-		if (priv->pshare->mp_txpwr_tracking == false)
-			return;
-	} else
-#endif
-	{
-		channel = (priv->pmib->dot11RFEntry.dot11channel);
-	}
-
-	thermal_value = (unsigned char)odm_get_rf_reg(p_dm_odm, RF_PATH_A, ODM_RF_T_METER_92E, 0xfc00);	/* 0x42: RF Reg[15:10] 88E */
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther));
-
-
-	switch (rf_mimo_mode) {
-	case MIMO_1T1R:
-		rf = 1;
-		break;
-	case MIMO_2T2R:
-		rf = 2;
-		break;
-	default:
-		rf = 2;
-		break;
-	}
-
-	/* Query OFDM path A default setting 	Bit[31:21] */
-	ele_D = phy_query_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKOFDM_D);
-	for (i = 0; i < OFDM_TABLE_SIZE_92E; i++) {
-		if (ele_D == (ofdm_swing_table_92e[i] >> 22)) {
-			OFDM_index[0] = (unsigned char)i;
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("PathA 0xC80[31:22] = 0x%x, OFDM_index=%d\n", ele_D, OFDM_index[0]));
-			break;
-		}
-	}
-
-	/* Query OFDM path B default setting */
-	if (rf_mimo_mode == MIMO_2T2R) {
-		ele_D = phy_query_bb_reg(priv, REG_OFDM_0_XB_TX_IQ_IMBALANCE, MASKOFDM_D);
-		for (i = 0; i < OFDM_TABLE_SIZE_92E; i++) {
-			if (ele_D == (ofdm_swing_table_92e[i] >> 22)) {
-				OFDM_index[1] = (unsigned char)i;
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("PathB 0xC88[31:22] = 0x%x, OFDM_index=%d\n", ele_D, OFDM_index[1]));
-				break;
-			}
-		}
-	}
-
-	/* calculate average thermal meter */
-	{
-		priv->pshare->thermal_value_avg_88xx[priv->pshare->thermal_value_avg_index_88xx] = thermal_value;
-		priv->pshare->thermal_value_avg_index_88xx++;
-		if (priv->pshare->thermal_value_avg_index_88xx == AVG_THERMAL_NUM_88XX)
-			priv->pshare->thermal_value_avg_index_88xx = 0;
-
-		for (i = 0; i < AVG_THERMAL_NUM_88XX; i++) {
-			if (priv->pshare->thermal_value_avg_88xx[i]) {
-				thermal_value_avg += priv->pshare->thermal_value_avg_88xx[i];
-				thermal_value_avg_count++;
-			}
-		}
-
-		if (thermal_value_avg_count) {
-			thermal_value = (unsigned char)(thermal_value_avg / thermal_value_avg_count);
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("AVG Thermal Meter = 0x%x\n", thermal_value));
-		}
-	}
-
-	/* Initialize */
-	if (!priv->pshare->thermal_value) {
-		priv->pshare->thermal_value = priv->pmib->dot11RFEntry.ther;
-		priv->pshare->thermal_value_iqk = thermal_value;
-		priv->pshare->thermal_value_lck = thermal_value;
-	}
-
-	if (thermal_value != priv->pshare->thermal_value) {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** START POWER TRACKING ********\n"));
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther));
-
-		delta = RTL_ABS(thermal_value, priv->pmib->dot11RFEntry.ther);
-		delta_IQK = RTL_ABS(thermal_value, priv->pshare->thermal_value_iqk);
-		delta_LCK = RTL_ABS(thermal_value, priv->pshare->thermal_value_lck);
-		is_decrease = ((thermal_value < priv->pmib->dot11RFEntry.ther) ? 1 : 0);
-
-#ifdef _TRACKING_TABLE_FILE
-		if (priv->pshare->rf_ft_var.pwr_track_file) {
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("diff: (%s)%d ==> get index from table : %d)\n", (is_decrease ? "-" : "+"), delta, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0)));
-
-			if (is_decrease) {
-				for (i = 0; i < rf; i++) {
-					OFDM_index[i] = priv->pshare->OFDM_index0[i] + get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0);
-					OFDM_index[i] = ((OFDM_index[i] > (OFDM_TABLE_SIZE_92E- 1)) ? (OFDM_TABLE_SIZE_92E - 1) : OFDM_index[i]);
-					ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> decrese power ---> new OFDM_INDEX:%d (%d + %d)\n", OFDM_index[i], priv->pshare->OFDM_index0[i], get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0)));
-					CCK_index = priv->pshare->CCK_index0 + get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1);
-					CCK_index = ((CCK_index > (CCK_TABLE_SIZE_92E - 1)) ? (CCK_TABLE_SIZE_92E - 1) : CCK_index);
-					ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> Decrese power ---> new CCK_INDEX:%d (%d + %d)\n",  CCK_index, priv->pshare->CCK_index0, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1)));
-				}
-			} else {
-				for (i = 0; i < rf; i++) {
-					OFDM_index[i] = priv->pshare->OFDM_index0[i] - get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0);
-					OFDM_index[i] = ((OFDM_index[i] < OFDM_min_index) ?  OFDM_min_index : OFDM_index[i]);
-					ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> Increse power ---> new OFDM_INDEX:%d (%d - %d)\n", OFDM_index[i], priv->pshare->OFDM_index0[i], get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0)));
-					CCK_index = priv->pshare->CCK_index0 - get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1);
-					CCK_index = ((CCK_index < 0) ? 0 : CCK_index);
-					ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> Increse power ---> new CCK_INDEX:%d (%d - %d)\n", CCK_index, priv->pshare->CCK_index0, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1)));
-				}
-			}
-		}
-#endif /* CFG_TRACKING_TABLE_FILE */
-
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("ofdm_swing_table_92e[(unsigned int)OFDM_index[0]] = %x\n", ofdm_swing_table_92e[(unsigned int)OFDM_index[0]]));
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("ofdm_swing_table_92e[(unsigned int)OFDM_index[1]] = %x\n", ofdm_swing_table_92e[(unsigned int)OFDM_index[1]]));
-
-		/* Adujst OFDM Ant_A according to IQK result */
-		ele_D = (ofdm_swing_table_92e[(unsigned int)OFDM_index[0]] & 0xFFC00000) >> 22;
-		X = priv->pshare->rege94;
-		Y = priv->pshare->rege9c;
-
-		if (X != 0) {
-			if ((X & 0x00000200) != 0)
-				X = X | 0xFFFFFC00;
-			ele_A = ((X * ele_D) >> 8) & 0x000003FF;
-
-			/* new element C = element D x Y */
-			if ((Y & 0x00000200) != 0)
-				Y = Y | 0xFFFFFC00;
-			ele_C = ((Y * ele_D) >> 8) & 0x000003FF;
-
-			/* wirte new elements A, C, D to regC80 and regC94, element B is always 0 */
-			value32 = (ele_D << 22) | ((ele_C & 0x3F) << 16) | ele_A;
-			phy_set_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD, value32);
-
-			value32 = (ele_C & 0x000003C0) >> 6;
-			phy_set_bb_reg(priv, REG_OFDM_0_XC_TX_AFE, MASKH4BITS, value32);
-
-			value32 = ((X * ele_D) >> 7) & 0x01;
-			phy_set_bb_reg(priv, REG_OFDM_0_ECCA_THRESHOLD, BIT(24), value32);
-		} else {
-			phy_set_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD, ofdm_swing_table_92e[(unsigned int)OFDM_index[0]]);
-			phy_set_bb_reg(priv, REG_OFDM_0_XC_TX_AFE, MASKH4BITS, 0x00);
-			phy_set_bb_reg(priv, REG_OFDM_0_ECCA_THRESHOLD, BIT(24), 0x00);
-		}
-
-		set_CCK_swing_index(priv, CCK_index);
-
-		if (rf == 2) {
-			ele_D = (ofdm_swing_table_92e[(unsigned int)OFDM_index[1]] & 0xFFC00000) >> 22;
-			X = priv->pshare->regeb4;
-			Y = priv->pshare->regebc;
-
-			if (X != 0) {
-				if ((X & 0x00000200) != 0)	/* consider minus */
-					X = X | 0xFFFFFC00;
-				ele_A = ((X * ele_D) >> 8) & 0x000003FF;
-
-				/* new element C = element D x Y */
-				if ((Y & 0x00000200) != 0)
-					Y = Y | 0xFFFFFC00;
-				ele_C = ((Y * ele_D) >> 8) & 0x00003FF;
-
-				/* wirte new elements A, C, D to regC88 and regC9C, element B is always 0 */
-				value32 = (ele_D << 22) | ((ele_C & 0x3F) << 16) | ele_A;
-				phy_set_bb_reg(priv, REG_OFDM_0_XB_TX_IQ_IMBALANCE, MASKDWORD, value32);
-
-				value32 = (ele_C & 0x000003C0) >> 6;
-				phy_set_bb_reg(priv, REG_OFDM_0_XD_TX_AFE, MASKH4BITS, value32);
-
-				value32 = ((X * ele_D) >> 7) & 0x01;
-				phy_set_bb_reg(priv, REG_OFDM_0_ECCA_THRESHOLD, BIT(28), value32);
-			} else {
-				phy_set_bb_reg(priv, REG_OFDM_0_XB_TX_IQ_IMBALANCE, MASKDWORD, ofdm_swing_table_92e[(unsigned int)OFDM_index[1]]);
-				phy_set_bb_reg(priv, REG_OFDM_0_XD_TX_AFE, MASKH4BITS, 0x00);
-				phy_set_bb_reg(priv, REG_OFDM_0_ECCA_THRESHOLD, BIT(28), 0x00);
-			}
-
-		}
-
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0xc80 = 0x%x\n", phy_query_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD)));
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0xc88 = 0x%x\n", phy_query_bb_reg(priv, REG_OFDM_0_XB_TX_IQ_IMBALANCE, MASKDWORD)));
-
-		if (delta_IQK > 3) {
-			priv->pshare->thermal_value_iqk = thermal_value;
-#ifdef MP_TEST
-			if (!(priv->pshare->rf_ft_var.mp_specific && (OPMODE & (WIFI_MP_CTX_BACKGROUND | WIFI_MP_CTX_PACKET))))
-#endif
-				phy_iq_calibrate_8192e(p_dm_odm, false);
-		}
-
-		if (delta_LCK > 8) {
-			RTL_W8(0x522, 0xff);
-			reg0x18 = phy_query_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, 1);
-			phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 1);
-			phy_set_rf_reg(priv, RF_PATH_A, 0x18, BIT(15), 1);
-			delay_ms(1);
-			phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 0);
-			phy_set_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, reg0x18);
-			RTL_W8(0x522, 0x0);
-			priv->pshare->thermal_value_lck = thermal_value;
-		}
-	}
-
-	/* update thermal meter value */
-	priv->pshare->thermal_value = thermal_value;
-	for (i = 0 ; i < rf ; i++)
-		priv->pshare->OFDM_index[i] = OFDM_index[i];
-	priv->pshare->CCK_index = CCK_index;
-
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** END:%s() ********\n", __FUNCTION__));
-}
-#endif
-
-
-
-#if (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1)
-void
-odm_txpowertracking_callback_thermal_meter_jaguar_series3(
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	void		*p_dm_void
-#else
-	struct _ADAPTER	*adapter
-#endif
-)
-{
-#if 1
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			thermal_value = 0, delta, delta_LCK, delta_IQK, channel, is_increase;
-	u8			thermal_value_avg_count = 0, p = 0, i = 0;
-	u32			thermal_value_avg = 0;
-	struct rtl8192cd_priv		*priv = p_dm_odm->priv;
-	struct _TXPWRTRACK_CFG	c;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
-
-	/*4 1. The following TWO tables decide the final index of OFDM/CCK swing table.*/
-	u8			*delta_swing_table_idx_tup_a = NULL, *delta_swing_table_idx_tdown_a = NULL;
-	u8			*delta_swing_table_idx_tup_b = NULL, *delta_swing_table_idx_tdown_b = NULL;
-	u8			*delta_swing_table_idx_tup_cck_a = NULL, *delta_swing_table_idx_tdown_cck_a = NULL;
-	u8			*delta_swing_table_idx_tup_cck_b = NULL, *delta_swing_table_idx_tdown_cck_b = NULL;
-	/*for 8814 add by Yu Chen*/
-	u8			*delta_swing_table_idx_tup_c = NULL, *delta_swing_table_idx_tdown_c = NULL;
-	u8			*delta_swing_table_idx_tup_d = NULL, *delta_swing_table_idx_tdown_d = NULL;
-	u8			*delta_swing_table_idx_tup_cck_c = NULL, *delta_swing_table_idx_tdown_cck_c = NULL;
-	u8			*delta_swing_table_idx_tup_cck_d = NULL, *delta_swing_table_idx_tdown_cck_d = NULL;
-
-#ifdef MP_TEST
-	if ((OPMODE & WIFI_MP_STATE) || priv->pshare->rf_ft_var.mp_specific) {
-		channel = priv->pshare->working_channel;
-		if (priv->pshare->mp_txpwr_tracking == false)
-			return;
-	} else
-#endif
-	{
-		channel = (priv->pmib->dot11RFEntry.dot11channel);
-	}
-
-	configure_txpower_track(p_dm_odm, &c);
-
-	(*c.get_delta_all_swing_table)(p_dm_odm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a,
-		(u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b,
-		(u8 **)&delta_swing_table_idx_tup_cck_a, (u8 **)&delta_swing_table_idx_tdown_cck_a,
-		(u8 **)&delta_swing_table_idx_tup_cck_b, (u8 **)&delta_swing_table_idx_tdown_cck_b);
-
-	thermal_value = (u8)odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, c.thermal_reg_addr, 0xfc00); /*0x42: RF Reg[15:10] 88E*/
-
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-		("Readback Thermal Meter = 0x%x(%d) EEPROMthermalmeter 0x%x(%d)\n"
-		, thermal_value, thermal_value, priv->pmib->dot11RFEntry.ther, priv->pmib->dot11RFEntry.ther));
-
-	/* Initialize */
-	if (!p_dm_odm->rf_calibrate_info.thermal_value)
-		p_dm_odm->rf_calibrate_info.thermal_value = priv->pmib->dot11RFEntry.ther;
-
-	if (!p_dm_odm->rf_calibrate_info.thermal_value_lck)
-		p_dm_odm->rf_calibrate_info.thermal_value_lck = priv->pmib->dot11RFEntry.ther;
-
-	if (!p_dm_odm->rf_calibrate_info.thermal_value_iqk)
-		p_dm_odm->rf_calibrate_info.thermal_value_iqk = priv->pmib->dot11RFEntry.ther;
-
-	/* calculate average thermal meter */
-	p_dm_odm->rf_calibrate_info.thermal_value_avg[p_dm_odm->rf_calibrate_info.thermal_value_avg_index] = thermal_value;
-	p_dm_odm->rf_calibrate_info.thermal_value_avg_index++;
-
-	if (p_dm_odm->rf_calibrate_info.thermal_value_avg_index == c.average_thermal_num)   /*Average times =  c.average_thermal_num*/
-		p_dm_odm->rf_calibrate_info.thermal_value_avg_index = 0;
-
-	for (i = 0; i < c.average_thermal_num; i++) {
-		if (p_dm_odm->rf_calibrate_info.thermal_value_avg[i]) {
-			thermal_value_avg += p_dm_odm->rf_calibrate_info.thermal_value_avg[i];
-			thermal_value_avg_count++;
-		}
-	}
-
-	if (thermal_value_avg_count) {/*Calculate Average thermal_value after average enough times*/
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("thermal_value_avg=0x%x(%d)  thermal_value_avg_count = %d\n"
-			, thermal_value_avg, thermal_value_avg, thermal_value_avg_count));
-
-		thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count);
-
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("AVG Thermal Meter = 0x%X(%d), EEPROMthermalmeter = 0x%X(%d)\n", thermal_value, thermal_value, priv->pmib->dot11RFEntry.ther, priv->pmib->dot11RFEntry.ther));
-	}
-
-	/*4 Calculate delta, delta_LCK, delta_IQK.*/
-	delta = RTL_ABS(thermal_value, priv->pmib->dot11RFEntry.ther);
-	delta_LCK = RTL_ABS(thermal_value, p_dm_odm->rf_calibrate_info.thermal_value_lck);
-	delta_IQK = RTL_ABS(thermal_value, p_dm_odm->rf_calibrate_info.thermal_value_iqk);
-	is_increase = ((thermal_value < priv->pmib->dot11RFEntry.ther) ? 0 : 1);
-
-	if (delta > 29) { /* power track table index(thermal diff.) upper bound*/
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta(%d) > 29, set delta to 29\n", delta));
-		delta = 29;
-	}
-
-
-	/*4 if necessary, do LCK.*/
-
-	if (delta_LCK > c.threshold_iqk) {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk));
-		p_dm_odm->rf_calibrate_info.thermal_value_lck = thermal_value;
-		if (c.phy_lc_calibrate)
-			(*c.phy_lc_calibrate)(p_dm_odm);
-	}
-
-	if (delta_IQK > c.threshold_iqk) {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk));
-		p_dm_odm->rf_calibrate_info.thermal_value_iqk = thermal_value;
-		if (c.do_iqk)
-			(*c.do_iqk)(p_dm_odm, true, 0, 0);
-	}
-
-	if (!priv->pmib->dot11RFEntry.ther)	/*Don't do power tracking since no calibrated thermal value*/
-		return;
-
-	/*4 Do Power Tracking*/
-
-	if (thermal_value != p_dm_odm->rf_calibrate_info.thermal_value) {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			     ("\n\n******** START POWER TRACKING ********\n"));
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("Readback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n",
-			thermal_value, p_dm_odm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther));
-
-#ifdef _TRACKING_TABLE_FILE
-		if (priv->pshare->rf_ft_var.pwr_track_file) {
-			if (is_increase) {			/*thermal is higher than base*/
-				for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++) {
-					switch (p) {
-					case ODM_RF_PATH_B:
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tup_b[%d] = %d delta_swing_table_idx_tup_cck_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta], delta, delta_swing_table_idx_tup_cck_b[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_b[delta];
-						p_rf_calibrate_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_cck_b[delta];
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is higher and pRF->absolute_ofdm_swing_idx[ODM_RF_PATH_B] = %d pRF->absolute_cck_swing_idx[ODM_RF_PATH_B] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
-						break;
-
-					case ODM_RF_PATH_C:
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tup_c[%d] = %d delta_swing_table_idx_tup_cck_c[%d] = %d\n", delta, delta_swing_table_idx_tup_c[delta], delta, delta_swing_table_idx_tup_cck_c[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_c[delta];
-						p_rf_calibrate_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_cck_c[delta];
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is higher and pRF->absolute_ofdm_swing_idx[ODM_RF_PATH_C] = %d pRF->absolute_cck_swing_idx[ODM_RF_PATH_C] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
-						break;
-
-					case ODM_RF_PATH_D:
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tup_d[%d] = %d delta_swing_table_idx_tup_cck_d[%d] = %d\n", delta, delta_swing_table_idx_tup_d[delta], delta, delta_swing_table_idx_tup_cck_d[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_d[delta];
-						p_rf_calibrate_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_cck_d[delta];
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is higher and pRF->absolute_ofdm_swing_idx[ODM_RF_PATH_D] = %d pRF->absolute_cck_swing_idx[ODM_RF_PATH_D] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
-						break;
-					default:
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tup_a[%d] = %d delta_swing_table_idx_tup_cck_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta], delta, delta_swing_table_idx_tup_cck_a[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_a[delta];
-						p_rf_calibrate_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_cck_a[delta];
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is higher and pRF->absolute_ofdm_swing_idx[ODM_RF_PATH_A] = %d pRF->absolute_cck_swing_idx[ODM_RF_PATH_A] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
-						break;
-					}
-				}
-			} else {			/* thermal is lower than base*/
-				for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++) {
-					switch (p) {
-					case ODM_RF_PATH_B:
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tdown_b[%d] = %d   delta_swing_table_idx_tdown_cck_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta], delta, delta_swing_table_idx_tdown_cck_b[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b[delta];
-						p_rf_calibrate_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_cck_b[delta];
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is lower and pRF->absolute_ofdm_swing_idx[ODM_RF_PATH_B] = %d   pRF->absolute_cck_swing_idx[ODM_RF_PATH_B] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
-						break;
-
-					case ODM_RF_PATH_C:
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tdown_c[%d] = %d   delta_swing_table_idx_tdown_cck_c[%d] = %d\n", delta, delta_swing_table_idx_tdown_c[delta], delta, delta_swing_table_idx_tdown_cck_c[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_c[delta];
-						p_rf_calibrate_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_cck_c[delta];
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is lower and pRF->absolute_ofdm_swing_idx[ODM_RF_PATH_C] = %d   pRF->absolute_cck_swing_idx[ODM_RF_PATH_C] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
-						break;
-
-					case ODM_RF_PATH_D:
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tdown_d[%d] = %d   delta_swing_table_idx_tdown_cck_d[%d] = %d\n", delta, delta_swing_table_idx_tdown_d[delta], delta, delta_swing_table_idx_tdown_cck_d[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_d[delta];
-						p_rf_calibrate_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_cck_d[delta];
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is lower and pRF->absolute_ofdm_swing_idx[ODM_RF_PATH_D] = %d   pRF->absolute_cck_swing_idx[ODM_RF_PATH_D] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
-						break;
-
-					default:
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tdown_a[%d] = %d   delta_swing_table_idx_tdown_cck_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta], delta, delta_swing_table_idx_tdown_cck_a[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a[delta];
-						p_rf_calibrate_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_cck_a[delta];
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is lower and pRF->absolute_ofdm_swing_idx[ODM_RF_PATH_A] = %d   pRF->absolute_cck_swing_idx[ODM_RF_PATH_A] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
-						break;
-					}
-				}
-			}
-
-			if (is_increase) {
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> increse power --->\n"));
-				if (GET_CHIP_VER(priv) == VERSION_8197F) {
-					for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++)
-						(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, BBSWING, p, 0);
-				} else if (GET_CHIP_VER(priv) == VERSION_8822B) {
-					for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++)
-						(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, MIX_MODE, p, 0);
-				}
-			} else {
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> decrese power --->\n"));
-				if (GET_CHIP_VER(priv) == VERSION_8197F) {
-					for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++)
-						(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, BBSWING, p, 0);
-				} else if (GET_CHIP_VER(priv) == VERSION_8822B) {
-					for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++)
-						(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, MIX_MODE, p, 0);
-				}
-			}
-		}
-#endif
-
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** END:%s() ********\n\n", __func__));
-		/*update thermal meter value*/
-		p_dm_odm->rf_calibrate_info.thermal_value =  thermal_value;
-
-	}
-
-#endif
-}
-#endif
-
-/*#if (RTL8814A_SUPPORT == 1)*/
-#if (RTL8814A_SUPPORT == 1)
-
-void
-odm_txpowertracking_callback_thermal_meter_jaguar_series2(
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	void		*p_dm_void
-#else
-	struct _ADAPTER	*adapter
-#endif
-)
-{
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8			thermal_value = 0, delta, delta_LCK, delta_IQK, channel, is_increase;
-	u8			thermal_value_avg_count = 0, p = 0, i = 0;
-	u32			thermal_value_avg = 0, reg0x18;
-	u32			bb_swing_reg[4] = {REG_A_TX_SCALE_JAGUAR, REG_B_TX_SCALE_JAGUAR, REG_C_TX_SCALE_JAGUAR2, REG_D_TX_SCALE_JAGUAR2};
-	s32			ele_D;
-	u32			bb_swing_idx;
-	struct rtl8192cd_priv	*priv = p_dm_odm->priv;
-	struct _TXPWRTRACK_CFG	c;
-	bool			is_tssi_enable = false;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
-
-	/* 4 1. The following TWO tables decide the final index of OFDM/CCK swing table. */
-	u8			*delta_swing_table_idx_tup_a = NULL, *delta_swing_table_idx_tdown_a = NULL;
-	u8			*delta_swing_table_idx_tup_b = NULL, *delta_swing_table_idx_tdown_b = NULL;
-	/* for 8814 add by Yu Chen */
-	u8			*delta_swing_table_idx_tup_c = NULL, *delta_swing_table_idx_tdown_c = NULL;
-	u8			*delta_swing_table_idx_tup_d = NULL, *delta_swing_table_idx_tdown_d = NULL;
-
-#ifdef MP_TEST
-	if ((OPMODE & WIFI_MP_STATE) || priv->pshare->rf_ft_var.mp_specific) {
-		channel = priv->pshare->working_channel;
-		if (priv->pshare->mp_txpwr_tracking == false)
-			return;
-	} else
-#endif
-	{
-		channel = (priv->pmib->dot11RFEntry.dot11channel);
-	}
-
-	configure_txpower_track(p_dm_odm, &c);
-	p_rf_calibrate_info->default_ofdm_index = priv->pshare->OFDM_index0[ODM_RF_PATH_A];
-
-	(*c.get_delta_swing_table)(p_dm_odm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a,
-		(u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b);
-
-	if (p_dm_odm->support_ic_type & ODM_RTL8814A)	/* for 8814 path C & D */
-		(*c.get_delta_swing_table8814only)(p_dm_odm, (u8 **)&delta_swing_table_idx_tup_c, (u8 **)&delta_swing_table_idx_tdown_c,
-			(u8 **)&delta_swing_table_idx_tup_d, (u8 **)&delta_swing_table_idx_tdown_d);
-
-	thermal_value = (u8)odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-		("\nReadback Thermal Meter = 0x%x, pre thermal meter 0x%x, EEPROMthermalmeter 0x%x\n", thermal_value, p_dm_odm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther));
-
-	/* Initialize */
-	if (!p_dm_odm->rf_calibrate_info.thermal_value)
-		p_dm_odm->rf_calibrate_info.thermal_value = priv->pmib->dot11RFEntry.ther;
-
-	if (!p_dm_odm->rf_calibrate_info.thermal_value_lck)
-		p_dm_odm->rf_calibrate_info.thermal_value_lck = priv->pmib->dot11RFEntry.ther;
-
-	if (!p_dm_odm->rf_calibrate_info.thermal_value_iqk)
-		p_dm_odm->rf_calibrate_info.thermal_value_iqk = priv->pmib->dot11RFEntry.ther;
-
-	is_tssi_enable = (bool)odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, REG_RF_TX_GAIN_OFFSET, BIT(7));	/* check TSSI enable */
-
-	/* 4 Query OFDM BB swing default setting 	Bit[31:21] */
-	for (p = ODM_RF_PATH_A ; p < c.rf_path_count ; p++) {
-		ele_D = odm_get_bb_reg(p_dm_odm, bb_swing_reg[p], 0xffe00000);
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("0x%x:0x%x ([31:21] = 0x%x)\n", bb_swing_reg[p], odm_get_bb_reg(p_dm_odm, bb_swing_reg[p], MASKDWORD), ele_D));
-
-		for (bb_swing_idx = 0; bb_swing_idx < TXSCALE_TABLE_SIZE; bb_swing_idx++) {/* 4 */
-			if (ele_D == tx_scaling_table_jaguar[bb_swing_idx]) {
-				p_dm_odm->rf_calibrate_info.OFDM_index[p] = (u8)bb_swing_idx;
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-					("OFDM_index[%d]=%d\n", p, p_dm_odm->rf_calibrate_info.OFDM_index[p]));
-				break;
-			}
-		}
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("kfree_offset[%d]=%d\n", p, p_rf_calibrate_info->kfree_offset[p]));
-
-	}
-
-	/* calculate average thermal meter */
-	p_dm_odm->rf_calibrate_info.thermal_value_avg[p_dm_odm->rf_calibrate_info.thermal_value_avg_index] = thermal_value;
-	p_dm_odm->rf_calibrate_info.thermal_value_avg_index++;
-	if (p_dm_odm->rf_calibrate_info.thermal_value_avg_index == c.average_thermal_num)  /* Average times =  c.average_thermal_num */
-		p_dm_odm->rf_calibrate_info.thermal_value_avg_index = 0;
-
-	for (i = 0; i < c.average_thermal_num; i++) {
-		if (p_dm_odm->rf_calibrate_info.thermal_value_avg[i]) {
-			thermal_value_avg += p_dm_odm->rf_calibrate_info.thermal_value_avg[i];
-			thermal_value_avg_count++;
-		}
-	}
-
-	if (thermal_value_avg_count) {            /* Calculate Average thermal_value after average enough times */
-		thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count);
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("AVG Thermal Meter = 0x%X, EEPROMthermalmeter = 0x%X\n", thermal_value, priv->pmib->dot11RFEntry.ther));
-	}
-
-	/* 4 Calculate delta, delta_LCK, delta_IQK. */
-	delta = RTL_ABS(thermal_value, priv->pmib->dot11RFEntry.ther);
-	delta_LCK = RTL_ABS(thermal_value, p_dm_odm->rf_calibrate_info.thermal_value_lck);
-	delta_IQK = RTL_ABS(thermal_value, p_dm_odm->rf_calibrate_info.thermal_value_iqk);
-	is_increase = ((thermal_value < priv->pmib->dot11RFEntry.ther) ? 0 : 1);
-
-	/* 4 if necessary, do LCK. */
-	if (!(p_dm_odm->support_ic_type & ODM_RTL8821)) {
-		if (delta_LCK > c.threshold_iqk) {
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk));
-			p_dm_odm->rf_calibrate_info.thermal_value_lck = thermal_value;
-
-			/*Use RTLCK, so close power tracking driver LCK*/
-#if (RTL8814A_SUPPORT != 1)
-			if (!(p_dm_odm->support_ic_type & ODM_RTL8814A)) {
-				if (c.phy_lc_calibrate)
-					(*c.phy_lc_calibrate)(p_dm_odm);
-			}
-#endif
-		}
-	}
-
-	if (delta_IQK > c.threshold_iqk) {
-		panic_printk("%s(%d)\n", __FUNCTION__, __LINE__);
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk));
-		p_dm_odm->rf_calibrate_info.thermal_value_iqk = thermal_value;
-		if (c.do_iqk)
-			(*c.do_iqk)(p_dm_odm, true, 0, 0);
-	}
-
-	if (!priv->pmib->dot11RFEntry.ther)	/*Don't do power tracking since no calibrated thermal value*/
-		return;
-
-	/* 4 Do Power Tracking */
-
-	if (is_tssi_enable == true) {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter PURE TSSI MODE**********\n"));
-		for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++)
-			(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, TSSI_MODE, p, 0);
-	} else if (thermal_value != p_dm_odm->rf_calibrate_info.thermal_value) {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			     ("\n******** START POWER TRACKING ********\n"));
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, p_dm_odm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther));
-
-#ifdef _TRACKING_TABLE_FILE
-		if (priv->pshare->rf_ft_var.pwr_track_file) {
-			if (is_increase) {		/* thermal is higher than base */
-				for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++) {
-					switch (p) {
-					case ODM_RF_PATH_B:
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tup_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_b[delta];       /* Record delta swing for mix mode power tracking */
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is higher and p_dm_odm->absolute_ofdm_swing_idx[ODM_RF_PATH_B] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
-						break;
-
-					case ODM_RF_PATH_C:
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tup_c[%d] = %d\n", delta, delta_swing_table_idx_tup_c[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_c[delta];       /* Record delta swing for mix mode power tracking */
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is higher and p_dm_odm->absolute_ofdm_swing_idx[ODM_RF_PATH_C] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
-						break;
-
-					case ODM_RF_PATH_D:
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tup_d[%d] = %d\n", delta, delta_swing_table_idx_tup_d[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_d[delta];       /* Record delta swing for mix mode power tracking */
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is higher and p_dm_odm->absolute_ofdm_swing_idx[ODM_RF_PATH_D] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
-						break;
-
-					default:
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tup_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_a[delta];        /* Record delta swing for mix mode power tracking */
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is higher and p_dm_odm->absolute_ofdm_swing_idx[ODM_RF_PATH_A] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
-						break;
-					}
-				}
-			} else {				/* thermal is lower than base */
-				for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++) {
-					switch (p) {
-					case ODM_RF_PATH_B:
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tdown_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b[delta];        /* Record delta swing for mix mode power tracking */
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is lower and p_dm_odm->absolute_ofdm_swing_idx[ODM_RF_PATH_B] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
-						break;
-
-					case ODM_RF_PATH_C:
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tdown_c[%d] = %d\n", delta, delta_swing_table_idx_tdown_c[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_c[delta];        /* Record delta swing for mix mode power tracking */
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is lower and p_dm_odm->absolute_ofdm_swing_idx[ODM_RF_PATH_C] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
-						break;
-
-					case ODM_RF_PATH_D:
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tdown_d[%d] = %d\n", delta, delta_swing_table_idx_tdown_d[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_d[delta];        /* Record delta swing for mix mode power tracking */
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is lower and p_dm_odm->absolute_ofdm_swing_idx[ODM_RF_PATH_D] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
-						break;
-
-					default:
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("delta_swing_table_idx_tdown_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta]));
-						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a[delta];        /* Record delta swing for mix mode power tracking */
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-							("******Temp is lower and p_dm_odm->absolute_ofdm_swing_idx[ODM_RF_PATH_A] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
-						break;
-					}
-				}
-			}
-
-			if (is_increase) {
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> increse power --->\n"));
-				for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++)
-					(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, MIX_MODE, p, 0);
-			} else {
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> decrese power --->\n"));
-				for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++)
-					(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, MIX_MODE, p, 0);
-			}
-		}
-#endif
-
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** END:%s() ********\n", __FUNCTION__));
-		/* update thermal meter value */
-		p_dm_odm->rf_calibrate_info.thermal_value =  thermal_value;
-
-	}
-}
-#endif
-
-#if (RTL8812A_SUPPORT == 1 || RTL8881A_SUPPORT == 1)
-void
-odm_txpowertracking_callback_thermal_meter_jaguar_series(
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	void		*p_dm_void
-#else
-	struct _ADAPTER	*adapter
-#endif
-)
-{
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	unsigned char			thermal_value = 0, delta, delta_LCK, channel, is_decrease;
-	unsigned char			thermal_value_avg_count = 0;
-	unsigned int			thermal_value_avg = 0, reg0x18;
-	unsigned int			bb_swing_reg[4] = {0xc1c, 0xe1c, 0x181c, 0x1a1c};
-	int					ele_D, value32;
-	char					OFDM_index[2], index;
-	unsigned int			i = 0, j = 0, rf_path, max_rf_path = 2, rf;
-	struct rtl8192cd_priv		*priv = p_dm_odm->priv;
-	unsigned char			OFDM_min_index = 7; /* OFDM BB Swing should be less than +2.5dB, which is required by Arthur and Mimic */
-
-
-
-#ifdef MP_TEST
-	if ((OPMODE & WIFI_MP_STATE) || priv->pshare->rf_ft_var.mp_specific) {
-		channel = priv->pshare->working_channel;
-		if (priv->pshare->mp_txpwr_tracking == false)
-			return;
-	} else
-#endif
-	{
-		channel = (priv->pmib->dot11RFEntry.dot11channel);
-	}
-
-#if RTL8881A_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8881A) {
-		max_rf_path = 1;
-		if ((get_bonding_type_8881A() == BOND_8881AM || get_bonding_type_8881A() == BOND_8881AN)
-		    && priv->pshare->rf_ft_var.use_intpa8881A && (*p_dm_odm->p_band_type == ODM_BAND_2_4G))
-			OFDM_min_index = 6;		/* intPA - upper bond set to +3 dB (base: -2 dB)ot11RFEntry.phy_band_select == PHY_BAND_2G)) */
-		else
-			OFDM_min_index = 10;		/* OFDM BB Swing should be less than +1dB, which is required by Arthur and Mimic */
-	}
-#endif
-
-
-	thermal_value = (unsigned char)phy_query_rf_reg(priv, RF_PATH_A, 0x42, 0xfc00, 1); /* 0x42: RF Reg[15:10] 88E */
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther));
-
-
-	/* 4 Query OFDM BB swing default setting 	Bit[31:21] */
-	for (rf_path = 0 ; rf_path < max_rf_path ; rf_path++) {
-		ele_D = phy_query_bb_reg(priv, bb_swing_reg[rf_path], 0xffe00000);
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0x%x:0x%x ([31:21] = 0x%x)\n", bb_swing_reg[rf_path], phy_query_bb_reg(priv, bb_swing_reg[rf_path], MASKDWORD), ele_D));
-		for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) {/* 4 */
-			if (ele_D == ofdm_swing_table_8812[i]) {
-				OFDM_index[rf_path] = (unsigned char)i;
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("OFDM_index[%d]=%d\n", rf_path, OFDM_index[rf_path]));
-				break;
-			}
-		}
-	}
-#if 0
-	/* Query OFDM path A default setting 	Bit[31:21] */
-	ele_D = phy_query_bb_reg(priv, 0xc1c, 0xffe00000);
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0xc1c:0x%x ([31:21] = 0x%x)\n", phy_query_bb_reg(priv, 0xc1c, MASKDWORD), ele_D));
-	for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) {/* 4 */
-		if (ele_D == ofdm_swing_table_8812[i]) {
-			OFDM_index[0] = (unsigned char)i;
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("OFDM_index[0]=%d\n", OFDM_index[0]));
-			break;
-		}
-	}
-	/* Query OFDM path B default setting */
-	if (rf == 2) {
-		ele_D = phy_query_bb_reg(priv, 0xe1c, 0xffe00000);
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0xe1c:0x%x ([32:21] = 0x%x)\n", phy_query_bb_reg(priv, 0xe1c, MASKDWORD), ele_D));
-		for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) {
-			if (ele_D == ofdm_swing_table_8812[i]) {
-				OFDM_index[1] = (unsigned char)i;
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("OFDM_index[1]=%d\n", OFDM_index[1]));
-				break;
-			}
-		}
-	}
-#endif
-	/* Initialize */
-	if (!priv->pshare->thermal_value) {
-		priv->pshare->thermal_value = priv->pmib->dot11RFEntry.ther;
-		priv->pshare->thermal_value_lck = thermal_value;
-	}
-
-	/* calculate average thermal meter */
-	{
-		priv->pshare->thermal_value_avg_8812[priv->pshare->thermal_value_avg_index_8812] = thermal_value;
-		priv->pshare->thermal_value_avg_index_8812++;
-		if (priv->pshare->thermal_value_avg_index_8812 == AVG_THERMAL_NUM_8812)
-			priv->pshare->thermal_value_avg_index_8812 = 0;
-
-		for (i = 0; i < AVG_THERMAL_NUM_8812; i++) {
-			if (priv->pshare->thermal_value_avg_8812[i]) {
-				thermal_value_avg += priv->pshare->thermal_value_avg_8812[i];
-				thermal_value_avg_count++;
-			}
-		}
-
-		if (thermal_value_avg_count) {
-			thermal_value = (unsigned char)(thermal_value_avg / thermal_value_avg_count);
-			/* printk("AVG Thermal Meter = 0x%x\n", thermal_value); */
-		}
-	}
-
-
-	/* 4 If necessary,  do power tracking */
-
-	if (!priv->pmib->dot11RFEntry.ther) /*Don't do power tracking since no calibrated thermal value*/
-		return;
-
-	if (thermal_value != priv->pshare->thermal_value) {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** START POWER TRACKING ********\n"));
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther));
-		delta = RTL_ABS(thermal_value, priv->pmib->dot11RFEntry.ther);
-		delta_LCK = RTL_ABS(thermal_value, priv->pshare->thermal_value_lck);
-		is_decrease = ((thermal_value < priv->pmib->dot11RFEntry.ther) ? 1 : 0);
-		/* if (*p_dm_odm->p_band_type == ODM_BAND_5G) */
-		{
-#ifdef _TRACKING_TABLE_FILE
-			if (priv->pshare->rf_ft_var.pwr_track_file) {
-				for (rf_path = 0; rf_path < max_rf_path; rf_path++) {
-					ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("diff: (%s)%d ==> get index from table : %d)\n", (is_decrease ? "-" : "+"), delta, get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0)));
-					if (is_decrease) {
-						OFDM_index[rf_path] = priv->pshare->OFDM_index0[rf_path] + get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0);
-						OFDM_index[rf_path] = ((OFDM_index[rf_path] > (OFDM_TABLE_SIZE_8812 - 1)) ? (OFDM_TABLE_SIZE_8812 - 1) : OFDM_index[rf_path]);
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> decrese power ---> new OFDM_INDEX:%d (%d + %d)\n", OFDM_index[rf_path], priv->pshare->OFDM_index0[rf_path], get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0)));
-#if 0/* RTL8881A_SUPPORT */
-						if (p_dm_odm->support_ic_type == ODM_RTL8881A) {
-							if (priv->pshare->rf_ft_var.pwrtrk_tx_agc_enable) {
-								if (priv->pshare->add_tx_agc) { /* tx_agc has been added */
-									add_tx_power88xx_ac(priv, 0);
-									priv->pshare->add_tx_agc = 0;
-									priv->pshare->add_tx_agc_index = 0;
-								}
-							}
-						}
-#endif
-					} else {
-
-						OFDM_index[rf_path] = priv->pshare->OFDM_index0[rf_path] - get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0);
-#if 0/* RTL8881A_SUPPORT */
-						if (p_dm_odm->support_ic_type == ODM_RTL8881A) {
-							if (priv->pshare->rf_ft_var.pwrtrk_tx_agc_enable) {
-								if (OFDM_index[i] < OFDM_min_index) {
-									priv->pshare->add_tx_agc_index = (OFDM_min_index - OFDM_index[i]) / 2; /* Calculate Remnant tx_agc value,  2 index for 1 tx_agc */
-									add_tx_power88xx_ac(priv, priv->pshare->add_tx_agc_index);
-									priv->pshare->add_tx_agc = 1;     /* add_tx_agc Flag = 1 */
-									OFDM_index[i] = OFDM_min_index;
-								} else {
-									if (priv->pshare->add_tx_agc) { /* tx_agc been added */
-										priv->pshare->add_tx_agc = 0;
-										priv->pshare->add_tx_agc_index = 0;
-										add_tx_power88xx_ac(priv, 0); /* minus the added TPI */
-									}
-								}
-							}
-						}
-#else
-						OFDM_index[rf_path] = ((OFDM_index[rf_path] < OFDM_min_index) ?  OFDM_min_index : OFDM_index[rf_path]);
-#endif
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> increse power ---> new OFDM_INDEX:%d (%d - %d)\n", OFDM_index[rf_path], priv->pshare->OFDM_index0[rf_path], get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0)));
-					}
-				}
-			}
-#endif
-			/* 4 Set new BB swing index */
-			for (rf_path = 0; rf_path < max_rf_path; rf_path++) {
-				phy_set_bb_reg(priv, bb_swing_reg[rf_path], 0xffe00000, ofdm_swing_table_8812[(unsigned int)OFDM_index[rf_path]]);
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Readback 0x%x[31:21] = 0x%x, OFDM_index:%d\n", bb_swing_reg[rf_path], phy_query_bb_reg(priv, bb_swing_reg[rf_path], 0xffe00000), OFDM_index[rf_path]));
-			}
-
-		}
-		if (delta_LCK > 8) {
-			RTL_W8(0x522, 0xff);
-			reg0x18 = phy_query_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, 1);
-			phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 1);
-			phy_set_rf_reg(priv, RF_PATH_A, 0x18, BIT(15), 1);
-			delay_ms(200); /* frequency deviation */
-			phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 0);
-			phy_set_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, reg0x18);
-#ifdef CONFIG_RTL_8812_SUPPORT
-			if (GET_CHIP_VER(priv) == VERSION_8812E)
-				update_bbrf_val8812(priv, priv->pmib->dot11RFEntry.dot11channel);
-#endif
-			RTL_W8(0x522, 0x0);
-			priv->pshare->thermal_value_lck = thermal_value;
-		}
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** END:%s() ********\n", __FUNCTION__));
-
-		/* update thermal meter value */
-		priv->pshare->thermal_value = thermal_value;
-		for (rf_path = 0; rf_path < max_rf_path; rf_path++)
-			priv->pshare->OFDM_index[rf_path] = OFDM_index[rf_path];
-	}
-}
-
-#endif
-
-
-void
-odm_txpowertracking_callback_thermal_meter(
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	void		*p_dm_void
-#else
-	struct _ADAPTER	*adapter
-#endif
-)
-{
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
-
-
-#if (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type == ODM_RTL8197F || p_dm_odm->support_ic_type == ODM_RTL8822B) {
-		odm_txpowertracking_callback_thermal_meter_jaguar_series3(p_dm_odm);
-		return;
-	}
-#endif
-#if (RTL8814A_SUPPORT == 1)		/*use this function to do power tracking after 8814 by YuChen*/
-	if (p_dm_odm->support_ic_type & ODM_RTL8814A) {
-		odm_txpowertracking_callback_thermal_meter_jaguar_series2(p_dm_odm);
-		return;
-	}
-#endif
-#if (RTL8881A_SUPPORT || RTL8812A_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type & ODM_RTL8812 || p_dm_odm->support_ic_type & ODM_RTL8881A) {
-		odm_txpowertracking_callback_thermal_meter_jaguar_series(p_dm_odm);
-		return;
-	}
-#endif
-
-#if (RTL8192E_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type == ODM_RTL8192E) {
-		odm_txpowertracking_callback_thermal_meter_92e(p_dm_odm);
-		return;
-	}
-#endif
-
-#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	/* PMGNT_INFO      		p_mgnt_info = &adapter->mgnt_info; */
-#endif
-
-
-	u8			thermal_value = 0, delta, delta_LCK, delta_IQK, offset;
-	u8			thermal_value_avg_count = 0;
-	u32			thermal_value_avg = 0;
-	/*	s32			ele_A=0, ele_D, TempCCk, X, value32;
-	 *	s32			Y, ele_C=0;
-	 *	s8			OFDM_index[2], CCK_index=0, OFDM_index_old[2]={0,0}, CCK_index_old=0, index;
-	 *	s8			deltaPowerIndex = 0; */
-	u32			i = 0;/* , j = 0; */
-	bool		is2T = false;
-	/*	bool 		bInteralPA = false; */
-
-	u8			OFDM_max_index = 34, rf = (is2T) ? 2 : 1; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */
-	u8			indexforchannel = 0;/*get_right_chnl_place_for_iqk(p_hal_data->current_channel)*/
-	enum            _POWER_DEC_INC { POWER_DEC, POWER_INC };
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->odmpriv;
-#endif
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
-#endif
-
-	struct _TXPWRTRACK_CFG	c;
-
-
-	/* 4 1. The following TWO tables decide the final index of OFDM/CCK swing table. */
-	s8			delta_swing_table_idx[2][index_mapping_NUM_88E] = {
-		/* {{Power decreasing(lower temperature)}, {Power increasing(higher temperature)}} */
-		{0, 0, 2, 3, 4, 4, 5, 6, 7, 7, 8, 9, 10, 10, 11}, {0, 0, 1, 2, 3, 4, 4, 4, 4, 5, 7, 8, 9, 9, 10}
-	};
-	u8			thermal_threshold[2][index_mapping_NUM_88E] = {
-		/* {{Power decreasing(lower temperature)}, {Power increasing(higher temperature)}} */
-		{0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 27}, {0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 25, 25, 25}
-	};
-
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	struct rtl8192cd_priv	*priv = p_dm_odm->priv;
-#endif
-
-	/* 4 2. Initilization ( 7 steps in total ) */
-
-	configure_txpower_track(p_dm_odm, &c);
-
-	p_dm_odm->rf_calibrate_info.txpowertracking_callback_cnt++; /* cosa add for debug */
-	p_dm_odm->rf_calibrate_info.is_txpowertracking_init = true;
-
-#if (MP_DRIVER == 1)
-	p_dm_odm->rf_calibrate_info.txpowertrack_control = p_hal_data->txpowertrack_control; /* <Kordan> We should keep updating the control variable according to HalData.
-     * <Kordan> rf_calibrate_info.rega24 will be initialized when ODM HW configuring, but MP configures with para files. */
-	p_dm_odm->rf_calibrate_info.rega24 = 0x090e1317;
-#endif
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_AP) && defined(MP_TEST)
-	if ((OPMODE & WIFI_MP_STATE) || p_dm_odm->priv->pshare->rf_ft_var.mp_specific) {
-		if (p_dm_odm->priv->pshare->mp_txpwr_tracking == false)
-			return;
-	}
-#endif
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("===>odm_txpowertracking_callback_thermal_meter_8188e, p_dm_odm->bb_swing_idx_cck_base: %d, p_dm_odm->bb_swing_idx_ofdm_base: %d\n", p_rf_calibrate_info->bb_swing_idx_cck_base, p_rf_calibrate_info->bb_swing_idx_ofdm_base));
-	/*
-		if (!p_dm_odm->rf_calibrate_info.tm_trigger) {
-			odm_set_rf_reg(p_dm_odm, RF_PATH_A, c.thermal_reg_addr, BIT(17) | BIT(16), 0x3);
-			p_dm_odm->rf_calibrate_info.tm_trigger = 1;
-			return;
-		}
-	*/
-	thermal_value = (u8)odm_get_rf_reg(p_dm_odm, RF_PATH_A, c.thermal_reg_addr, 0xfc00);	/* 0x42: RF Reg[15:10] 88E */
-#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
-	if (!thermal_value || !p_dm_odm->rf_calibrate_info.txpowertrack_control)
-#else
-	if (!p_dm_odm->rf_calibrate_info.txpowertrack_control)
-#endif
-		return;
-
-	/* 4 3. Initialize ThermalValues of rf_calibrate_info */
-
-	if (!p_dm_odm->rf_calibrate_info.thermal_value) {
-		p_dm_odm->rf_calibrate_info.thermal_value_lck = thermal_value;
-		p_dm_odm->rf_calibrate_info.thermal_value_iqk = thermal_value;
-	}
-
-	if (p_dm_odm->rf_calibrate_info.is_reloadtxpowerindex)
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("reload ofdm index for band switch\n"));
-
-	/* 4 4. Calculate average thermal meter */
-
-	p_dm_odm->rf_calibrate_info.thermal_value_avg[p_dm_odm->rf_calibrate_info.thermal_value_avg_index] = thermal_value;
-	p_dm_odm->rf_calibrate_info.thermal_value_avg_index++;
-	if (p_dm_odm->rf_calibrate_info.thermal_value_avg_index == c.average_thermal_num)
-		p_dm_odm->rf_calibrate_info.thermal_value_avg_index = 0;
-
-	for (i = 0; i < c.average_thermal_num; i++) {
-		if (p_dm_odm->rf_calibrate_info.thermal_value_avg[i]) {
-			thermal_value_avg += p_dm_odm->rf_calibrate_info.thermal_value_avg[i];
-			thermal_value_avg_count++;
-		}
-	}
-
-	if (thermal_value_avg_count) {
-		/* Give the new thermo value a weighting */
-		thermal_value_avg += (thermal_value * 4);
-
-		thermal_value = (u8)(thermal_value_avg / (thermal_value_avg_count + 4));
-		p_rf_calibrate_info->thermal_value_delta = thermal_value - priv->pmib->dot11RFEntry.ther;
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("AVG Thermal Meter = 0x%x\n", thermal_value));
-	}
-
-	/* 4 5. Calculate delta, delta_LCK, delta_IQK. */
-
-	delta	  = (thermal_value > p_dm_odm->rf_calibrate_info.thermal_value) ? (thermal_value - p_dm_odm->rf_calibrate_info.thermal_value) : (p_dm_odm->rf_calibrate_info.thermal_value - thermal_value);
-	delta_LCK = (thermal_value > p_dm_odm->rf_calibrate_info.thermal_value_lck) ? (thermal_value - p_dm_odm->rf_calibrate_info.thermal_value_lck) : (p_dm_odm->rf_calibrate_info.thermal_value_lck - thermal_value);
-	delta_IQK = (thermal_value > p_dm_odm->rf_calibrate_info.thermal_value_iqk) ? (thermal_value - p_dm_odm->rf_calibrate_info.thermal_value_iqk) : (p_dm_odm->rf_calibrate_info.thermal_value_iqk - thermal_value);
-
-	/* 4 6. If necessary, do LCK. */
-	if (!(p_dm_odm->support_ic_type & ODM_RTL8821)) {
-		/*if((delta_LCK > p_hal_data->delta_lck) && (p_hal_data->delta_lck != 0))*/
-		if (delta_LCK >= c.threshold_iqk) {
-			/*Delta temperature is equal to or larger than 20 centigrade.*/
-			p_dm_odm->rf_calibrate_info.thermal_value_lck = thermal_value;
-			(*c.phy_lc_calibrate)(p_dm_odm);
-		}
-	}
-
-	/* 3 7. If necessary, move the index of swing table to adjust Tx power. */
-
-	if (delta > 0 && p_dm_odm->rf_calibrate_info.txpowertrack_control) {
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-		delta = thermal_value > p_hal_data->eeprom_thermal_meter ? (thermal_value - p_hal_data->eeprom_thermal_meter) : (p_hal_data->eeprom_thermal_meter - thermal_value);
-#else
-		delta = (thermal_value > p_dm_odm->priv->pmib->dot11RFEntry.ther) ? (thermal_value - p_dm_odm->priv->pmib->dot11RFEntry.ther) : (p_dm_odm->priv->pmib->dot11RFEntry.ther - thermal_value);
-#endif
-
-
-		/* 4 7.1 The Final Power index = BaseIndex + power_index_offset */
-
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-		if (thermal_value > p_hal_data->eeprom_thermal_meter) {
-#else
-		if (thermal_value > p_dm_odm->priv->pmib->dot11RFEntry.ther) {
-#endif
-			CALCULATE_SWINGTALBE_OFFSET(offset, POWER_INC, index_mapping_NUM_88E, delta);
-			p_dm_odm->rf_calibrate_info.delta_power_index_last = p_dm_odm->rf_calibrate_info.delta_power_index;
-			p_dm_odm->rf_calibrate_info.delta_power_index =  delta_swing_table_idx[POWER_INC][offset];
-
-		} else {
-
-			CALCULATE_SWINGTALBE_OFFSET(offset, POWER_DEC, index_mapping_NUM_88E, delta);
-			p_dm_odm->rf_calibrate_info.delta_power_index_last = p_dm_odm->rf_calibrate_info.delta_power_index;
-			p_dm_odm->rf_calibrate_info.delta_power_index = (-1) * delta_swing_table_idx[POWER_DEC][offset];
-		}
-
-		if (p_dm_odm->rf_calibrate_info.delta_power_index == p_dm_odm->rf_calibrate_info.delta_power_index_last)
-			p_dm_odm->rf_calibrate_info.power_index_offset = 0;
-		else
-			p_dm_odm->rf_calibrate_info.power_index_offset = p_dm_odm->rf_calibrate_info.delta_power_index - p_dm_odm->rf_calibrate_info.delta_power_index_last;
-
-		for (i = 0; i < rf; i++)
-			p_dm_odm->rf_calibrate_info.OFDM_index[i] = p_rf_calibrate_info->bb_swing_idx_ofdm_base + p_dm_odm->rf_calibrate_info.power_index_offset;
-		p_dm_odm->rf_calibrate_info.CCK_index = p_rf_calibrate_info->bb_swing_idx_cck_base + p_dm_odm->rf_calibrate_info.power_index_offset;
-
-		p_rf_calibrate_info->bb_swing_idx_cck = p_dm_odm->rf_calibrate_info.CCK_index;
-		p_rf_calibrate_info->bb_swing_idx_ofdm[RF_PATH_A] = p_dm_odm->rf_calibrate_info.OFDM_index[RF_PATH_A];
-
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", p_rf_calibrate_info->bb_swing_idx_cck, p_rf_calibrate_info->bb_swing_idx_cck_base, p_dm_odm->rf_calibrate_info.power_index_offset));
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("The 'OFDM' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", p_rf_calibrate_info->bb_swing_idx_ofdm[RF_PATH_A], p_rf_calibrate_info->bb_swing_idx_ofdm_base, p_dm_odm->rf_calibrate_info.power_index_offset));
-
-		/* 4 7.1 Handle boundary conditions of index. */
-
-
-		for (i = 0; i < rf; i++) {
-			if (p_dm_odm->rf_calibrate_info.OFDM_index[i] > OFDM_max_index)
-				p_dm_odm->rf_calibrate_info.OFDM_index[i] = OFDM_max_index;
-			else if (p_dm_odm->rf_calibrate_info.OFDM_index[i] < 0)
-				p_dm_odm->rf_calibrate_info.OFDM_index[i] = 0;
-		}
-
-		if (p_dm_odm->rf_calibrate_info.CCK_index > c.swing_table_size_cck - 1)
-			p_dm_odm->rf_calibrate_info.CCK_index = c.swing_table_size_cck - 1;
-		else if (p_dm_odm->rf_calibrate_info.CCK_index < 0)
-			p_dm_odm->rf_calibrate_info.CCK_index = 0;
-	} else {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-			("The thermal meter is unchanged or TxPowerTracking OFF: thermal_value: %d, p_dm_odm->rf_calibrate_info.thermal_value: %d)\n", thermal_value, p_dm_odm->rf_calibrate_info.thermal_value));
-		p_dm_odm->rf_calibrate_info.power_index_offset = 0;
-	}
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-		("TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n", p_dm_odm->rf_calibrate_info.CCK_index, p_rf_calibrate_info->bb_swing_idx_cck_base));
-
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
-		("TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index: %d\n", p_dm_odm->rf_calibrate_info.OFDM_index[RF_PATH_A], p_rf_calibrate_info->bb_swing_idx_ofdm_base));
-
-	if (p_dm_odm->rf_calibrate_info.power_index_offset != 0 && p_dm_odm->rf_calibrate_info.txpowertrack_control) {
-		/* 4 7.2 Configure the Swing Table to adjust Tx Power. */
-
-		p_dm_odm->rf_calibrate_info.is_tx_power_changed = true; /* Always true after Tx Power is adjusted by power tracking. */
-		/*  */
-		/* 2012/04/23 MH According to Luke's suggestion, we can not write BB digital */
-		/* to increase TX power. Otherwise, EVM will be bad. */
-		/*  */
-		/* 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. */
-		if (thermal_value > p_dm_odm->rf_calibrate_info.thermal_value) {
-			/* ODM_RT_TRACE(p_dm_odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, */
-			/*	("Temperature Increasing: delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", */
-			/*	p_dm_odm->rf_calibrate_info.power_index_offset, delta, thermal_value, p_hal_data->eeprom_thermal_meter, p_dm_odm->rf_calibrate_info.thermal_value)); */
-		} else if (thermal_value < p_dm_odm->rf_calibrate_info.thermal_value) { /* Low temperature */
-			/* ODM_RT_TRACE(p_dm_odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, */
-			/*	("Temperature Decreasing: delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", */
-			/*		p_dm_odm->rf_calibrate_info.power_index_offset, delta, thermal_value, p_hal_data->eeprom_thermal_meter, p_dm_odm->rf_calibrate_info.thermal_value)); */
-		}
-#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
-		if (thermal_value > p_hal_data->eeprom_thermal_meter)
-#else
-		if (thermal_value > p_dm_odm->priv->pmib->dot11RFEntry.ther)
-#endif
-		{
-			/*				ODM_RT_TRACE(p_dm_odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Temperature(%d) hugher than PG value(%d), increases the power by tx_agc\n", thermal_value, p_hal_data->eeprom_thermal_meter)); */
-			(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, TXAGC, 0, 0);
-		} else {
-			/*			ODM_RT_TRACE(p_dm_odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Temperature(%d) lower than PG value(%d), increases the power by tx_agc\n", thermal_value, p_hal_data->eeprom_thermal_meter)); */
-			(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, BBSWING, RF_PATH_A, indexforchannel);
-			if (is2T)
-				(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, BBSWING, RF_PATH_B, indexforchannel);
-		}
-
-		p_rf_calibrate_info->bb_swing_idx_cck_base = p_rf_calibrate_info->bb_swing_idx_cck;
-		p_rf_calibrate_info->bb_swing_idx_ofdm_base = p_rf_calibrate_info->bb_swing_idx_ofdm[RF_PATH_A];
-		p_dm_odm->rf_calibrate_info.thermal_value = thermal_value;
-
-	}
-
-#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
-	/* if((delta_IQK > p_hal_data->delta_iqk) && (p_hal_data->delta_iqk != 0)) */
-	if ((delta_IQK >= 8)) /* Delta temperature is equal to or larger than 20 centigrade. */
-		(*c.do_iqk)(p_dm_odm, delta_IQK, thermal_value, 8);
-#endif
-
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("<===dm_TXPowerTrackingCallback_ThermalMeter_8188E\n"));
-
-	p_dm_odm->rf_calibrate_info.tx_powercount = 0;
-}
-
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-
-
-void
-phy_path_a_stand_by(
-	struct _ADAPTER	*p_adapter
-)
-{
-	RTPRINT(FINIT, INIT_IQK, ("path-A standby mode!\n"));
-
-	phy_set_bb_reg(p_adapter, REG_FPGA0_IQK, 0xffffff00, 0x0);
-	phy_set_bb_reg(p_adapter, 0x840, MASKDWORD, 0x00010000);
-	phy_set_bb_reg(p_adapter, REG_FPGA0_IQK, 0xffffff00, 0x808000);
-}
-
-/* 1 7.	IQK
- * #define MAX_TOLERANCE		5
- * #define IQK_DELAY_TIME		1 */		/* ms */
-
-u8			/* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */
-phy_path_a_iqk_8192c(
-	struct _ADAPTER	*p_adapter,
-	bool		config_path_b
-)
-{
-
-	u32 reg_eac, reg_e94, reg_e9c, reg_ea4;
-	u8 result = 0x00;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-
-	RTPRINT(FINIT, INIT_IQK, ("path A IQK!\n"));
-
-	/* path-A IQK setting */
-	RTPRINT(FINIT, INIT_IQK, ("path-A IQK setting!\n"));
-	if (p_adapter->interface_index == 0) {
-		phy_set_bb_reg(p_adapter, REG_TX_IQK_TONE_A, MASKDWORD, 0x10008c1f);
-		phy_set_bb_reg(p_adapter, REG_RX_IQK_TONE_A, MASKDWORD, 0x10008c1f);
-	} else {
-		phy_set_bb_reg(p_adapter, REG_TX_IQK_TONE_A, MASKDWORD, 0x10008c22);
-		phy_set_bb_reg(p_adapter, REG_RX_IQK_TONE_A, MASKDWORD, 0x10008c22);
-	}
-
-	phy_set_bb_reg(p_adapter, REG_TX_IQK_PI_A, MASKDWORD, 0x82140102);
-
-	phy_set_bb_reg(p_adapter, REG_RX_IQK_PI_A, MASKDWORD, config_path_b ? 0x28160202 :
-		IS_81xxC_VENDOR_UMC_B_CUT(p_hal_data->version_id) ? 0x28160202 : 0x28160502);
-
-	/* path-B IQK setting */
-	if (config_path_b) {
-		phy_set_bb_reg(p_adapter, REG_TX_IQK_TONE_B, MASKDWORD, 0x10008c22);
-		phy_set_bb_reg(p_adapter, REG_RX_IQK_TONE_B, MASKDWORD, 0x10008c22);
-		phy_set_bb_reg(p_adapter, REG_TX_IQK_PI_B, MASKDWORD, 0x82140102);
-		phy_set_bb_reg(p_adapter, REG_RX_IQK_PI_B, MASKDWORD, 0x28160202);
-	}
-
-	/* LO calibration setting */
-	RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n"));
-	phy_set_bb_reg(p_adapter, REG_IQK_AGC_RSP, MASKDWORD, 0x001028d1);
-
-	/* One shot, path A LOK & IQK */
-	RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n"));
-	phy_set_bb_reg(p_adapter, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000);
-	phy_set_bb_reg(p_adapter, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000);
-
-	/* delay x ms */
-	RTPRINT(FINIT, INIT_IQK, ("delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME));
-	platform_stall_execution(IQK_DELAY_TIME * 1000);
-
-	/* Check failed */
-	reg_eac = phy_query_bb_reg(p_adapter, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD);
-	RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", reg_eac));
-	reg_e94 = phy_query_bb_reg(p_adapter, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD);
-	RTPRINT(FINIT, INIT_IQK, ("0xe94 = 0x%x\n", reg_e94));
-	reg_e9c = phy_query_bb_reg(p_adapter, REG_TX_POWER_AFTER_IQK_A, MASKDWORD);
-	RTPRINT(FINIT, INIT_IQK, ("0xe9c = 0x%x\n", reg_e9c));
-	reg_ea4 = phy_query_bb_reg(p_adapter, REG_RX_POWER_BEFORE_IQK_A_2, MASKDWORD);
-	RTPRINT(FINIT, INIT_IQK, ("0xea4 = 0x%x\n", reg_ea4));
-
-	if (!(reg_eac & BIT(28)) &&
-	    (((reg_e94 & 0x03FF0000) >> 16) != 0x142) &&
-	    (((reg_e9c & 0x03FF0000) >> 16) != 0x42))
-		result |= 0x01;
-	else							/* if Tx not OK, ignore Rx */
-		return result;
-
-	if (!(reg_eac & BIT(27)) &&		/* if Tx is OK, check whether Rx is OK */
-	    (((reg_ea4 & 0x03FF0000) >> 16) != 0x132) &&
-	    (((reg_eac & 0x03FF0000) >> 16) != 0x36))
-		result |= 0x02;
-	else
-		RTPRINT(FINIT, INIT_IQK, ("path A Rx IQK fail!!\n"));
-
-	return result;
-
-
-}
-
-u8				/* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */
-phy_path_b_iqk_8192c(
-	struct _ADAPTER	*p_adapter
-)
-{
-	u32 reg_eac, reg_eb4, reg_ebc, reg_ec4, reg_ecc;
-	u8	result = 0x00;
-	RTPRINT(FINIT, INIT_IQK, ("path B IQK!\n"));
-
-	/* One shot, path B LOK & IQK */
-	RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n"));
-	phy_set_bb_reg(p_adapter, REG_IQK_AGC_CONT, MASKDWORD, 0x00000002);
-	phy_set_bb_reg(p_adapter, REG_IQK_AGC_CONT, MASKDWORD, 0x00000000);
-
-	/* delay x ms */
-	RTPRINT(FINIT, INIT_IQK, ("delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME));
-	platform_stall_execution(IQK_DELAY_TIME * 1000);
-
-	/* Check failed */
-	reg_eac = phy_query_bb_reg(p_adapter, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD);
-	RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", reg_eac));
-	reg_eb4 = phy_query_bb_reg(p_adapter, REG_TX_POWER_BEFORE_IQK_B, MASKDWORD);
-	RTPRINT(FINIT, INIT_IQK, ("0xeb4 = 0x%x\n", reg_eb4));
-	reg_ebc = phy_query_bb_reg(p_adapter, REG_TX_POWER_AFTER_IQK_B, MASKDWORD);
-	RTPRINT(FINIT, INIT_IQK, ("0xebc = 0x%x\n", reg_ebc));
-	reg_ec4 = phy_query_bb_reg(p_adapter, REG_RX_POWER_BEFORE_IQK_B_2, MASKDWORD);
-	RTPRINT(FINIT, INIT_IQK, ("0xec4 = 0x%x\n", reg_ec4));
-	reg_ecc = phy_query_bb_reg(p_adapter, REG_RX_POWER_AFTER_IQK_B_2, MASKDWORD);
-	RTPRINT(FINIT, INIT_IQK, ("0xecc = 0x%x\n", reg_ecc));
-
-	if (!(reg_eac & BIT(31)) &&
-	    (((reg_eb4 & 0x03FF0000) >> 16) != 0x142) &&
-	    (((reg_ebc & 0x03FF0000) >> 16) != 0x42))
-		result |= 0x01;
-	else
-		return result;
-
-	if (!(reg_eac & BIT(30)) &&
-	    (((reg_ec4 & 0x03FF0000) >> 16) != 0x132) &&
-	    (((reg_ecc & 0x03FF0000) >> 16) != 0x36))
-		result |= 0x02;
-	else
-		RTPRINT(FINIT, INIT_IQK, ("path B Rx IQK fail!!\n"));
-
-
-	return result;
-
-}
-
-void
-phy_path_a_fill_iqk_matrix(
-	struct _ADAPTER	*p_adapter,
-	bool	is_iqk_ok,
-	s32		result[][8],
-	u8		final_candidate,
-	bool		is_tx_only
-)
-{
-	u32	oldval_0, X, TX0_A, reg;
-	s32	Y, TX0_C;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-
-	RTPRINT(FINIT, INIT_IQK, ("path A IQ Calibration %s !\n", (is_iqk_ok) ? "Success" : "Failed"));
-
-	if (final_candidate == 0xFF)
-		return;
-
-	else if (is_iqk_ok) {
-		oldval_0 = (phy_query_bb_reg(p_adapter, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD) >> 22) & 0x3FF;
-
-		X = result[final_candidate][0];
-		if ((X & 0x00000200) != 0)
-			X = X | 0xFFFFFC00;
-		TX0_A = (X * oldval_0) >> 8;
-		RTPRINT(FINIT, INIT_IQK, ("X = 0x%x, TX0_A = 0x%x, oldval_0 0x%x\n", X, TX0_A, oldval_0));
-		phy_set_bb_reg(p_adapter, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0x3FF, TX0_A);
-		phy_set_bb_reg(p_adapter, REG_OFDM_0_ECCA_THRESHOLD, BIT(31), ((X * oldval_0 >> 7) & 0x1));
-
-		Y = result[final_candidate][1];
-		if ((Y & 0x00000200) != 0)
-			Y = Y | 0xFFFFFC00;
-
-		/* path B IQK result + 3 */
-		if (p_adapter->interface_index == 1 && p_hal_data->current_band_type == BAND_ON_5G)
-			Y += 3;
-
-		TX0_C = (Y * oldval_0) >> 8;
-		RTPRINT(FINIT, INIT_IQK, ("Y = 0x%x, TX = 0x%x\n", Y, TX0_C));
-		phy_set_bb_reg(p_adapter, REG_OFDM_0_XC_TX_AFE, 0xF0000000, ((TX0_C & 0x3C0) >> 6));
-		phy_set_bb_reg(p_adapter, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0x003F0000, (TX0_C & 0x3F));
-		phy_set_bb_reg(p_adapter, REG_OFDM_0_ECCA_THRESHOLD, BIT(29), ((Y * oldval_0 >> 7) & 0x1));
-
-		if (is_tx_only) {
-			RTPRINT(FINIT, INIT_IQK, ("phy_path_a_fill_iqk_matrix only Tx OK\n"));
-			return;
-		}
-
-		reg = result[final_candidate][2];
-		phy_set_bb_reg(p_adapter, REG_OFDM_0_XA_RX_IQ_IMBALANCE, 0x3FF, reg);
-
-		reg = result[final_candidate][3] & 0x3F;
-		phy_set_bb_reg(p_adapter, REG_OFDM_0_XA_RX_IQ_IMBALANCE, 0xFC00, reg);
-
-		reg = (result[final_candidate][3] >> 6) & 0xF;
-		phy_set_bb_reg(p_adapter, REG_OFDM_0_RX_IQ_EXT_ANTA, 0xF0000000, reg);
-	}
-}
-
-void
-phy_path_b_fill_iqk_matrix(
-	struct _ADAPTER	*p_adapter,
-	bool	is_iqk_ok,
-	s32		result[][8],
-	u8		final_candidate,
-	bool		is_tx_only			/* do Tx only */
-)
-{
-	u32	oldval_1, X, TX1_A, reg;
-	s32	Y, TX1_C;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-
-	RTPRINT(FINIT, INIT_IQK, ("path B IQ Calibration %s !\n", (is_iqk_ok) ? "Success" : "Failed"));
-
-	if (final_candidate == 0xFF)
-		return;
-
-	else if (is_iqk_ok) {
-		oldval_1 = (phy_query_bb_reg(p_adapter, REG_OFDM_0_XB_TX_IQ_IMBALANCE, MASKDWORD) >> 22) & 0x3FF;
-
-		X = result[final_candidate][4];
-		if ((X & 0x00000200) != 0)
-			X = X | 0xFFFFFC00;
-		TX1_A = (X * oldval_1) >> 8;
-		RTPRINT(FINIT, INIT_IQK, ("X = 0x%x, TX1_A = 0x%x\n", X, TX1_A));
-		phy_set_bb_reg(p_adapter, REG_OFDM_0_XB_TX_IQ_IMBALANCE, 0x3FF, TX1_A);
-		phy_set_bb_reg(p_adapter, REG_OFDM_0_ECCA_THRESHOLD, BIT(27), ((X * oldval_1 >> 7) & 0x1));
-
-		Y = result[final_candidate][5];
-		if ((Y & 0x00000200) != 0)
-			Y = Y | 0xFFFFFC00;
-		if (p_hal_data->current_band_type == BAND_ON_5G)
-			Y += 3;		/* temp modify for preformance */
-		TX1_C = (Y * oldval_1) >> 8;
-		RTPRINT(FINIT, INIT_IQK, ("Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C));
-		phy_set_bb_reg(p_adapter, REG_OFDM_0_XD_TX_AFE, 0xF0000000, ((TX1_C & 0x3C0) >> 6));
-		phy_set_bb_reg(p_adapter, REG_OFDM_0_XB_TX_IQ_IMBALANCE, 0x003F0000, (TX1_C & 0x3F));
-		phy_set_bb_reg(p_adapter, REG_OFDM_0_ECCA_THRESHOLD, BIT(25), ((Y * oldval_1 >> 7) & 0x1));
-
-		if (is_tx_only)
-			return;
-
-		reg = result[final_candidate][6];
-		phy_set_bb_reg(p_adapter, REG_OFDM_0_XB_RX_IQ_IMBALANCE, 0x3FF, reg);
-
-		reg = result[final_candidate][7] & 0x3F;
-		phy_set_bb_reg(p_adapter, REG_OFDM_0_XB_RX_IQ_IMBALANCE, 0xFC00, reg);
-
-		reg = (result[final_candidate][7] >> 6) & 0xF;
-		phy_set_bb_reg(p_adapter, REG_OFDM_0_AGC_RSSI_TABLE, 0x0000F000, reg);
-	}
-}
-
-
-bool
-phy_simularity_compare_92c(
-	struct _ADAPTER	*p_adapter,
-	s32		result[][8],
-	u8		 c1,
-	u8		 c2
-)
-{
-	u32		i, j, diff, simularity_bit_map, bound = 0;
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-	u8		final_candidate[2] = {0xFF, 0xFF};	/* for path A and path B */
-	bool		is_result = true, is2T = IS_92C_SERIAL(p_hal_data->version_id);
-
-	if (is2T)
-		bound = 8;
-	else
-		bound = 4;
-
-	simularity_bit_map = 0;
-
-	for (i = 0; i < bound; i++) {
-		diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]);
-		if (diff > MAX_TOLERANCE) {
-			if ((i == 2 || i == 6) && !simularity_bit_map) {
-				if (result[c1][i] + result[c1][i + 1] == 0)
-					final_candidate[(i / 4)] = c2;
-				else if (result[c2][i] + result[c2][i + 1] == 0)
-					final_candidate[(i / 4)] = c1;
-				else
-					simularity_bit_map = simularity_bit_map | (1 << i);
-			} else
-				simularity_bit_map = simularity_bit_map | (1 << i);
-		}
-	}
-
-	if (simularity_bit_map == 0) {
-		for (i = 0; i < (bound / 4); i++) {
-			if (final_candidate[i] != 0xFF) {
-				for (j = i * 4; j < (i + 1) * 4 - 2; j++)
-					result[3][j] = result[final_candidate[i]][j];
-				is_result = false;
-			}
-		}
-		return is_result;
-	} else if (!(simularity_bit_map & 0x0F)) {		/* path A OK */
-		for (i = 0; i < 4; i++)
-			result[3][i] = result[c1][i];
-		return false;
-	} else if (!(simularity_bit_map & 0xF0) && is2T) {	/* path B OK */
-		for (i = 4; i < 8; i++)
-			result[3][i] = result[c1][i];
-		return false;
-	} else
-		return false;
-
-}
-
-/*
-return false => do IQK again
-*/
-bool
-phy_simularity_compare(
-	struct _ADAPTER	*p_adapter,
-	s32		result[][8],
-	u8		 c1,
-	u8		 c2
-)
-{
-	return phy_simularity_compare_92c(p_adapter, result, c1, c2);
-
-}
-
-void
-_phy_iq_calibrate_8192c(
-	struct _ADAPTER	*p_adapter,
-	s32		result[][8],
-	u8		t,
-	bool		is2T
-)
-{
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-	u32			i;
-	u8			path_aok, path_bok;
-	u32			ADDA_REG[IQK_ADDA_REG_NUM] = {
-		REG_FPGA0_XCD_SWITCH_CONTROL,	REG_BLUE_TOOTH,
-		REG_RX_WAIT_CCA,		REG_TX_CCK_RFON,
-		REG_TX_CCK_BBON,	REG_TX_OFDM_RFON,
-		REG_TX_OFDM_BBON,	REG_TX_TO_RX,
-		REG_TX_TO_TX,		REG_RX_CCK,
-		REG_RX_OFDM,		REG_RX_WAIT_RIFS,
-		REG_RX_TO_RX,		REG_STANDBY,
-		REG_SLEEP,			REG_PMPD_ANAEN
-	};
-	u32			IQK_MAC_REG[IQK_MAC_REG_NUM] = {
-		REG_TXPAUSE,		REG_BCN_CTRL,
-		REG_BCN_CTRL_1,	REG_GPIO_MUXCFG
-	};
-
-	/* since 92C & 92D have the different define in IQK_BB_REG */
-	u32	IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
-		REG_OFDM_0_TRX_PATH_ENABLE,		REG_OFDM_0_TR_MUX_PAR,
-		REG_FPGA0_XCD_RF_INTERFACE_SW,	REG_CONFIG_ANT_A,	REG_CONFIG_ANT_B,
-		REG_FPGA0_XAB_RF_INTERFACE_SW,	REG_FPGA0_XA_RF_INTERFACE_OE,
-		REG_FPGA0_XB_RF_INTERFACE_OE,	/*REG_FPGA0_RFMOD*/ REG_CCK_0_AFE_SETTING
-	};
-
-	u32	IQK_BB_REG_92D[IQK_BB_REG_NUM_92D] = {	/* for normal */
-		REG_FPGA0_XAB_RF_INTERFACE_SW,	REG_FPGA0_XA_RF_INTERFACE_OE,
-		REG_FPGA0_XB_RF_INTERFACE_OE,	REG_OFDM_0_TR_MUX_PAR,
-		REG_FPGA0_XCD_RF_INTERFACE_SW,	REG_OFDM_0_TRX_PATH_ENABLE,
-		/*REG_FPGA0_RFMOD*/ REG_CCK_0_AFE_SETTING,			REG_FPGA0_ANALOG_PARAMETER4,
-		REG_OFDM_0_XA_AGC_CORE1,		REG_OFDM_0_XB_AGC_CORE1
-	};
-#if MP_DRIVER
-	const u32	retry_count = 9;
-#else
-	const u32	retry_count = 2;
-#endif
-	/* Neil Chen--2011--05--19--
-	* 3 path Div */
-	u8                 rf_path_switch = 0x0;
-
-	/* Note: IQ calibration must be performed after loading */
-	/*		PHY_REG.txt , and radio_a, radio_b.txt */
-
-	u32 bbvalue;
-
-	if (t == 0) {
-		/* bbvalue = phy_query_bb_reg(p_adapter, REG_FPGA0_RFMOD, MASKDWORD); */
-		/*	RTPRINT(FINIT, INIT_IQK, ("_phy_iq_calibrate_8192c()==>0x%08x\n",bbvalue)); */
-
-		RTPRINT(FINIT, INIT_IQK, ("IQ Calibration for %s\n", (is2T ? "2T2R" : "1T1R")));
-
-		/* Save ADDA parameters, turn path A ADDA on */
-		phy_save_adda_registers(p_adapter, ADDA_REG, p_hal_data->ADDA_backup, IQK_ADDA_REG_NUM);
-		phy_save_mac_registers(p_adapter, IQK_MAC_REG, p_hal_data->IQK_MAC_backup);
-		phy_save_adda_registers(p_adapter, IQK_BB_REG_92C, p_hal_data->IQK_BB_backup, IQK_BB_REG_NUM);
-	}
-
-	phy_path_adda_on(p_adapter, ADDA_REG, true, is2T);
-
-	if (t == 0)
-		p_hal_data->is_rf_pi_enable = (u8)phy_query_bb_reg(p_adapter, REG_FPGA0_XA_HSSI_PARAMETER1, BIT(8));
-
-	if (!p_hal_data->is_rf_pi_enable) {
-		/* Switch BB to PI mode to do IQ Calibration. */
-		phy_pi_mode_switch(p_adapter, true);
-	}
-
-	/* MAC settings */
-	phy_mac_setting_calibration(p_adapter, IQK_MAC_REG, p_hal_data->IQK_MAC_backup);
-
-	/* phy_set_bb_reg(p_adapter, REG_FPGA0_RFMOD, BIT24, 0x00); */
-	phy_set_bb_reg(p_adapter, REG_CCK_0_AFE_SETTING, MASKDWORD, (0x0f000000 | (phy_query_bb_reg(p_adapter, REG_CCK_0_AFE_SETTING, MASKDWORD))));
-	phy_set_bb_reg(p_adapter, REG_OFDM_0_TRX_PATH_ENABLE, MASKDWORD, 0x03a05600);
-	phy_set_bb_reg(p_adapter, REG_OFDM_0_TR_MUX_PAR, MASKDWORD, 0x000800e4);
-	phy_set_bb_reg(p_adapter, REG_FPGA0_XCD_RF_INTERFACE_SW, MASKDWORD, 0x22204000);
-	{
-		phy_set_bb_reg(p_adapter, REG_FPGA0_XAB_RF_INTERFACE_SW, BIT(10), 0x01);
-		phy_set_bb_reg(p_adapter, REG_FPGA0_XAB_RF_INTERFACE_SW, BIT(26), 0x01);
-		phy_set_bb_reg(p_adapter, REG_FPGA0_XA_RF_INTERFACE_OE, BIT(10), 0x00);
-		phy_set_bb_reg(p_adapter, REG_FPGA0_XB_RF_INTERFACE_OE, BIT(10), 0x00);
-	}
-
-	if (is2T) {
-		phy_set_bb_reg(p_adapter, REG_FPGA0_XA_LSSI_PARAMETER, MASKDWORD, 0x00010000);
-		phy_set_bb_reg(p_adapter, REG_FPGA0_XB_LSSI_PARAMETER, MASKDWORD, 0x00010000);
-	}
-
-	{
-		/* Page B init */
-		phy_set_bb_reg(p_adapter, REG_CONFIG_ANT_A, MASKDWORD, 0x00080000);
-
-		if (is2T)
-			phy_set_bb_reg(p_adapter, REG_CONFIG_ANT_B, MASKDWORD, 0x00080000);
-	}
-	/* IQ calibration setting */
-	RTPRINT(FINIT, INIT_IQK, ("IQK setting!\n"));
-	phy_set_bb_reg(p_adapter, REG_FPGA0_IQK, 0xffffff00, 0x808000);
-	phy_set_bb_reg(p_adapter, REG_TX_IQK, MASKDWORD, 0x01007c00);
-	phy_set_bb_reg(p_adapter, REG_RX_IQK, MASKDWORD, 0x01004800);
-
-	for (i = 0 ; i < retry_count ; i++) {
-		path_aok = phy_path_a_iqk_8192c(p_adapter, is2T);
-		if (path_aok == 0x03) {
-			RTPRINT(FINIT, INIT_IQK, ("path A IQK Success!!\n"));
-			result[t][0] = (phy_query_bb_reg(p_adapter, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD) & 0x3FF0000) >> 16;
-			result[t][1] = (phy_query_bb_reg(p_adapter, REG_TX_POWER_AFTER_IQK_A, MASKDWORD) & 0x3FF0000) >> 16;
-			result[t][2] = (phy_query_bb_reg(p_adapter, REG_RX_POWER_BEFORE_IQK_A_2, MASKDWORD) & 0x3FF0000) >> 16;
-			result[t][3] = (phy_query_bb_reg(p_adapter, REG_RX_POWER_AFTER_IQK_A_2, MASKDWORD) & 0x3FF0000) >> 16;
-			break;
-		} else if (i == (retry_count - 1) && path_aok == 0x01) {	/* Tx IQK OK */
-			RTPRINT(FINIT, INIT_IQK, ("path A IQK Only  Tx Success!!\n"));
-
-			result[t][0] = (phy_query_bb_reg(p_adapter, REG_TX_POWER_BEFORE_IQK_A, MASKDWORD) & 0x3FF0000) >> 16;
-			result[t][1] = (phy_query_bb_reg(p_adapter, REG_TX_POWER_AFTER_IQK_A, MASKDWORD) & 0x3FF0000) >> 16;
-		}
-	}
-
-	if (0x00 == path_aok)
-		RTPRINT(FINIT, INIT_IQK, ("path A IQK failed!!\n"));
-
-	if (is2T) {
-		phy_path_a_stand_by(p_adapter);
-
-		/* Turn path B ADDA on */
-		phy_path_adda_on(p_adapter, ADDA_REG, false, is2T);
-
-		for (i = 0 ; i < retry_count ; i++) {
-			path_bok = phy_path_b_iqk_8192c(p_adapter);
-			if (path_bok == 0x03) {
-				RTPRINT(FINIT, INIT_IQK, ("path B IQK Success!!\n"));
-				result[t][4] = (phy_query_bb_reg(p_adapter, REG_TX_POWER_BEFORE_IQK_B, MASKDWORD) & 0x3FF0000) >> 16;
-				result[t][5] = (phy_query_bb_reg(p_adapter, REG_TX_POWER_AFTER_IQK_B, MASKDWORD) & 0x3FF0000) >> 16;
-				result[t][6] = (phy_query_bb_reg(p_adapter, REG_RX_POWER_BEFORE_IQK_B_2, MASKDWORD) & 0x3FF0000) >> 16;
-				result[t][7] = (phy_query_bb_reg(p_adapter, REG_RX_POWER_AFTER_IQK_B_2, MASKDWORD) & 0x3FF0000) >> 16;
-				break;
-			} else if (i == (retry_count - 1) && path_bok == 0x01) {	/* Tx IQK OK */
-				RTPRINT(FINIT, INIT_IQK, ("path B Only Tx IQK Success!!\n"));
-				result[t][4] = (phy_query_bb_reg(p_adapter, REG_TX_POWER_BEFORE_IQK_B, MASKDWORD) & 0x3FF0000) >> 16;
-				result[t][5] = (phy_query_bb_reg(p_adapter, REG_TX_POWER_AFTER_IQK_B, MASKDWORD) & 0x3FF0000) >> 16;
-			}
-		}
-
-		if (0x00 == path_bok)
-			RTPRINT(FINIT, INIT_IQK, ("path B IQK failed!!\n"));
-	}
-
-	/* Back to BB mode, load original value */
-	RTPRINT(FINIT, INIT_IQK, ("IQK:Back to BB mode, load original value!\n"));
-	phy_set_bb_reg(p_adapter, REG_FPGA0_IQK, 0xffffff00, 0);
-
-	if (t != 0) {
-		if (!p_hal_data->is_rf_pi_enable) {
-			/* Switch back BB to SI mode after finish IQ Calibration. */
-			phy_pi_mode_switch(p_adapter, false);
-		}
-
-		/* Reload ADDA power saving parameters */
-		phy_reload_adda_registers(p_adapter, ADDA_REG, p_hal_data->ADDA_backup, IQK_ADDA_REG_NUM);
-
-		/* Reload MAC parameters */
-		phy_reload_mac_registers(p_adapter, IQK_MAC_REG, p_hal_data->IQK_MAC_backup);
-
-		/* Reload BB parameters */
-		phy_reload_adda_registers(p_adapter, IQK_BB_REG_92C, p_hal_data->IQK_BB_backup, IQK_BB_REG_NUM);
-
-		/*Restore RX initial gain*/
-		phy_set_bb_reg(p_adapter, REG_FPGA0_XA_LSSI_PARAMETER, MASKDWORD, 0x00032ed3);
-		if (is2T)
-			phy_set_bb_reg(p_adapter, REG_FPGA0_XB_LSSI_PARAMETER, MASKDWORD, 0x00032ed3);
-		/* load 0xe30 IQC default value */
-		phy_set_bb_reg(p_adapter, REG_TX_IQK_TONE_A, MASKDWORD, 0x01008c00);
-		phy_set_bb_reg(p_adapter, REG_RX_IQK_TONE_A, MASKDWORD, 0x01008c00);
-
-	}
-	RTPRINT(FINIT, INIT_IQK, ("_phy_iq_calibrate_8192c() <==\n"));
-
-}
-
-
-void
-_phy_lccalibrate92c(
-	struct _ADAPTER	*p_adapter,
-	bool		is2T
-)
-{
-	u8	tmp_reg;
-	u32	rf_amode = 0, rf_bmode = 0, lc_cal;
-	/*	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter); */
-
-	/* Check continuous TX and Packet TX */
-	tmp_reg = platform_efio_read_1byte(p_adapter, 0xd03);
-
-	if ((tmp_reg & 0x70) != 0)			/* Deal with contisuous TX case */
-		platform_efio_write_1byte(p_adapter, 0xd03, tmp_reg & 0x8F);	/* disable all continuous TX */
-	else							/* Deal with Packet TX case */
-		platform_efio_write_1byte(p_adapter, REG_TXPAUSE, 0xFF);			/* block all queues */
-
-	if ((tmp_reg & 0x70) != 0) {
-		/* 1. Read original RF mode */
-		/* path-A */
-		rf_amode = phy_query_rf_reg(p_adapter, RF_PATH_A, RF_AC, MASK12BITS);
-
-		/* path-B */
-		if (is2T)
-			rf_bmode = phy_query_rf_reg(p_adapter, RF_PATH_B, RF_AC, MASK12BITS);
-
-		/* 2. Set RF mode = standby mode */
-		/* path-A */
-		phy_set_rf_reg(p_adapter, RF_PATH_A, RF_AC, MASK12BITS, (rf_amode & 0x8FFFF) | 0x10000);
-
-		/* path-B */
-		if (is2T)
-			phy_set_rf_reg(p_adapter, RF_PATH_B, RF_AC, MASK12BITS, (rf_bmode & 0x8FFFF) | 0x10000);
-	}
-
-	/* 3. Read RF reg18 */
-	lc_cal = phy_query_rf_reg(p_adapter, RF_PATH_A, RF_CHNLBW, MASK12BITS);
-
-	/* 4. Set LC calibration begin	bit15 */
-	phy_set_rf_reg(p_adapter, RF_PATH_A, RF_CHNLBW, MASK12BITS, lc_cal | 0x08000);
-
-	delay_ms(100);
-
-
-	/* Restore original situation */
-	if ((tmp_reg & 0x70) != 0) {	/* Deal with contisuous TX case */
-		/* path-A */
-		platform_efio_write_1byte(p_adapter, 0xd03, tmp_reg);
-		phy_set_rf_reg(p_adapter, RF_PATH_A, RF_AC, MASK12BITS, rf_amode);
-
-		/* path-B */
-		if (is2T)
-			phy_set_rf_reg(p_adapter, RF_PATH_B, RF_AC, MASK12BITS, rf_bmode);
-	} else /* Deal with Packet TX case */
-		platform_efio_write_1byte(p_adapter, REG_TXPAUSE, 0x00);
-}
-
-
-void
-phy_lc_calibrate(
-	struct _ADAPTER	*p_adapter,
-	bool		is2T
-)
-{
-	_phy_lccalibrate92c(p_adapter, is2T);
-}
-
-
-
-/* Analog Pre-distortion calibration */
-#define		APK_BB_REG_NUM	8
-#define		APK_CURVE_REG_NUM 4
-#define		PATH_NUM		2
-
-void
-_phy_ap_calibrate_8192c(
-	struct _ADAPTER	*p_adapter,
-	s8		delta,
-	bool		is2T
-)
-{
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-
-	u32			reg_d[PATH_NUM];
-	u32			tmp_reg, index, offset, i, apkbound;
-	u8			path, pathbound = PATH_NUM;
-	u32			BB_backup[APK_BB_REG_NUM];
-	u32			BB_REG[APK_BB_REG_NUM] = {
-		REG_FPGA1_TX_BLOCK,	REG_OFDM_0_TRX_PATH_ENABLE,
-		REG_FPGA0_RFMOD,	REG_OFDM_0_TR_MUX_PAR,
-		REG_FPGA0_XCD_RF_INTERFACE_SW,	REG_FPGA0_XAB_RF_INTERFACE_SW,
-		REG_FPGA0_XA_RF_INTERFACE_OE,	REG_FPGA0_XB_RF_INTERFACE_OE
-	};
-	u32			BB_AP_MODE[APK_BB_REG_NUM] = {
-		0x00000020, 0x00a05430, 0x02040000,
-		0x000800e4, 0x00204000
-	};
-	u32			BB_normal_AP_MODE[APK_BB_REG_NUM] = {
-		0x00000020, 0x00a05430, 0x02040000,
-		0x000800e4, 0x22204000
-	};
-
-	u32			AFE_backup[IQK_ADDA_REG_NUM];
-	u32			AFE_REG[IQK_ADDA_REG_NUM] = {
-		REG_FPGA0_XCD_SWITCH_CONTROL,	REG_BLUE_TOOTH,
-		REG_RX_WAIT_CCA,		REG_TX_CCK_RFON,
-		REG_TX_CCK_BBON,	REG_TX_OFDM_RFON,
-		REG_TX_OFDM_BBON,	REG_TX_TO_RX,
-		REG_TX_TO_TX,		REG_RX_CCK,
-		REG_RX_OFDM,		REG_RX_WAIT_RIFS,
-		REG_RX_TO_RX,		REG_STANDBY,
-		REG_SLEEP,			REG_PMPD_ANAEN
-	};
-
-	u32			MAC_backup[IQK_MAC_REG_NUM];
-	u32			MAC_REG[IQK_MAC_REG_NUM] = {
-		REG_TXPAUSE,		REG_BCN_CTRL,
-		REG_BCN_CTRL_1,	REG_GPIO_MUXCFG
-	};
-
-	u32			APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = {
-		{0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c},
-		{0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e}
-	};
-
-	u32			APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = {
-		{0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c},	/* path settings equal to path b settings */
-		{0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c}
-	};
-
-	u32			APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = {
-		{0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d},
-		{0x5201a, 0x52019, 0x52016, 0x52033, 0x52050}
-	};
-
-	u32			APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = {
-		{0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a},	/* path settings equal to path b settings */
-		{0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}
-	};
-#if 0
-	u32			APK_RF_value_A[PATH_NUM][APK_BB_REG_NUM] = {
-		{0x1adb0, 0x1adb0, 0x1ada0, 0x1ad90, 0x1ad80},
-		{0x00fb0, 0x00fb0, 0x00fa0, 0x00f90, 0x00f80}
-	};
-#endif
-	u32			AFE_on_off[PATH_NUM] = {
-		0x04db25a4, 0x0b1b25a4
-	};	/* path A on path B off / path A off path B on */
-
-	u32			APK_offset[PATH_NUM] = {
-		REG_CONFIG_ANT_A, REG_CONFIG_ANT_B
-	};
-
-	u32			APK_normal_offset[PATH_NUM] = {
-		REG_CONFIG_PMPD_ANT_A, REG_CONFIG_PMPD_ANT_B
-	};
-
-	u32			APK_value[PATH_NUM] = {
-		0x92fc0000, 0x12fc0000
-	};
-
-	u32			APK_normal_value[PATH_NUM] = {
-		0x92680000, 0x12680000
-	};
-
-	s8			APK_delta_mapping[APK_BB_REG_NUM][13] = {
-		{-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
-		{-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
-		{-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
-		{-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6},
-		{-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0}
-	};
-
-	u32			APK_normal_setting_value_1[13] = {
-		0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28,
-		0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3,
-		0x12680000, 0x00880000, 0x00880000
-	};
-
-	u32			APK_normal_setting_value_2[16] = {
-		0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3,
-		0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025,
-		0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008,
-		0x00050006
-	};
-
-	u32			APK_result[PATH_NUM][APK_BB_REG_NUM];	/* val_1_1a, val_1_2a, val_2a, val_3a, val_4a
- *	u32			AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; */
-
-	s32			BB_offset, delta_V, delta_offset;
-
-#if MP_DRIVER == 1
-	PMPT_CONTEXT	p_mpt_ctx = &(p_adapter->mpt_ctx);
-
-	p_mpt_ctx->APK_bound[0] = 45;
-	p_mpt_ctx->APK_bound[1] = 52;
-#endif
-
-	RTPRINT(FINIT, INIT_IQK, ("==>_phy_ap_calibrate_8192c() delta %d\n", delta));
-	RTPRINT(FINIT, INIT_IQK, ("AP Calibration for %s\n", (is2T ? "2T2R" : "1T1R")));
-	if (!is2T)
-		pathbound = 1;
-
-	/* 2 FOR NORMAL CHIP SETTINGS */
-
-	/* Temporarily do not allow normal driver to do the following settings because these offset
-	 * and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal
-	 * will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the
-	 * root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. */
-#if MP_DRIVER != 1
-	return;
-#endif
-	/* settings adjust for normal chip */
-	for (index = 0; index < PATH_NUM; index++) {
-		APK_offset[index] = APK_normal_offset[index];
-		APK_value[index] = APK_normal_value[index];
-		AFE_on_off[index] = 0x6fdb25a4;
-	}
-
-	for (index = 0; index < APK_BB_REG_NUM; index++) {
-		for (path = 0; path < pathbound; path++) {
-			APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index];
-			APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index];
-		}
-		BB_AP_MODE[index] = BB_normal_AP_MODE[index];
-	}
-
-	apkbound = 6;
-
-	/* save BB default value */
-	for (index = 0; index < APK_BB_REG_NUM ; index++) {
-		if (index == 0)		/* skip */
-			continue;
-		BB_backup[index] = phy_query_bb_reg(p_adapter, BB_REG[index], MASKDWORD);
-	}
-
-	/* save MAC default value */
-	phy_save_mac_registers(p_adapter, MAC_REG, MAC_backup);
-
-	/* save AFE default value */
-	phy_save_adda_registers(p_adapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM);
-
-	for (path = 0; path < pathbound; path++) {
-
-
-		if (path == RF_PATH_A) {
-			/* path A APK */
-			/* load APK setting */
-			/* path-A */
-			offset = REG_PDP_ANT_A;
-			for (index = 0; index < 11; index++) {
-				phy_set_bb_reg(p_adapter, offset, MASKDWORD, APK_normal_setting_value_1[index]);
-				RTPRINT(FINIT, INIT_IQK, ("_phy_ap_calibrate_8192c() offset 0x%x value 0x%x\n", offset, phy_query_bb_reg(p_adapter, offset, MASKDWORD)));
-
-				offset += 0x04;
-			}
-
-			phy_set_bb_reg(p_adapter, REG_CONFIG_PMPD_ANT_B, MASKDWORD, 0x12680000);
-
-			offset = REG_CONFIG_ANT_A;
-			for (; index < 13; index++) {
-				phy_set_bb_reg(p_adapter, offset, MASKDWORD, APK_normal_setting_value_1[index]);
-				RTPRINT(FINIT, INIT_IQK, ("_phy_ap_calibrate_8192c() offset 0x%x value 0x%x\n", offset, phy_query_bb_reg(p_adapter, offset, MASKDWORD)));
-
-				offset += 0x04;
-			}
-
-			/* page-B1 */
-			phy_set_bb_reg(p_adapter, REG_FPGA0_IQK, 0xffffff00, 0x400000);
-
-			/* path A */
-			offset = REG_PDP_ANT_A;
-			for (index = 0; index < 16; index++) {
-				phy_set_bb_reg(p_adapter, offset, MASKDWORD, APK_normal_setting_value_2[index]);
-				RTPRINT(FINIT, INIT_IQK, ("_phy_ap_calibrate_8192c() offset 0x%x value 0x%x\n", offset, phy_query_bb_reg(p_adapter, offset, MASKDWORD)));
-
-				offset += 0x04;
-			}
-			phy_set_bb_reg(p_adapter, REG_FPGA0_IQK, 0xffffff00, 0);
-		} else if (path == RF_PATH_B) {
-			/* path B APK */
-			/* load APK setting */
-			/* path-B */
-			offset = REG_PDP_ANT_B;
-			for (index = 0; index < 10; index++) {
-				phy_set_bb_reg(p_adapter, offset, MASKDWORD, APK_normal_setting_value_1[index]);
-				RTPRINT(FINIT, INIT_IQK, ("_phy_ap_calibrate_8192c() offset 0x%x value 0x%x\n", offset, phy_query_bb_reg(p_adapter, offset, MASKDWORD)));
-
-				offset += 0x04;
-			}
-			phy_set_bb_reg(p_adapter, REG_CONFIG_PMPD_ANT_A, MASKDWORD, 0x12680000);
-
-			phy_set_bb_reg(p_adapter, REG_CONFIG_PMPD_ANT_B, MASKDWORD, 0x12680000);
-
-			offset = REG_CONFIG_ANT_A;
-			index = 11;
-			for (; index < 13; index++) { /* offset 0xb68, 0xb6c */
-				phy_set_bb_reg(p_adapter, offset, MASKDWORD, APK_normal_setting_value_1[index]);
-				RTPRINT(FINIT, INIT_IQK, ("_phy_ap_calibrate_8192c() offset 0x%x value 0x%x\n", offset, phy_query_bb_reg(p_adapter, offset, MASKDWORD)));
-
-				offset += 0x04;
-			}
-
-			/* page-B1 */
-			phy_set_bb_reg(p_adapter, REG_FPGA0_IQK, 0xffffff00, 0x400000);
-
-			/* path B */
-			offset = 0xb60;
-			for (index = 0; index < 16; index++) {
-				phy_set_bb_reg(p_adapter, offset, MASKDWORD, APK_normal_setting_value_2[index]);
-				RTPRINT(FINIT, INIT_IQK, ("_phy_ap_calibrate_8192c() offset 0x%x value 0x%x\n", offset, phy_query_bb_reg(p_adapter, offset, MASKDWORD)));
-
-				offset += 0x04;
-			}
-			phy_set_bb_reg(p_adapter, REG_FPGA0_IQK, 0xffffff00, 0);
-		}
-
-		/* save RF default value */
-		reg_d[path] = phy_query_rf_reg(p_adapter, path, RF_TXBIAS_A, RFREGOFFSETMASK);
-
-		/* path A AFE all on, path B AFE All off or vise versa */
-		for (index = 0; index < IQK_ADDA_REG_NUM ; index++)
-			phy_set_bb_reg(p_adapter, AFE_REG[index], MASKDWORD, AFE_on_off[path]);
-		RTPRINT(FINIT, INIT_IQK, ("_phy_ap_calibrate_8192c() offset 0xe70 %x\n", phy_query_bb_reg(p_adapter, REG_RX_WAIT_CCA, MASKDWORD)));
-
-		/* BB to AP mode */
-		if (path == 0) {
-			for (index = 0; index < APK_BB_REG_NUM ; index++) {
-
-				if (index == 0)		/* skip */
-					continue;
-				else if (index < 5)
-					phy_set_bb_reg(p_adapter, BB_REG[index], MASKDWORD, BB_AP_MODE[index]);
-				else if (BB_REG[index] == 0x870)
-					phy_set_bb_reg(p_adapter, BB_REG[index], MASKDWORD, BB_backup[index] | BIT(10) | BIT(26));
-				else
-					phy_set_bb_reg(p_adapter, BB_REG[index], BIT(10), 0x0);
-			}
-
-			phy_set_bb_reg(p_adapter, REG_TX_IQK_TONE_A, MASKDWORD, 0x01008c00);
-			phy_set_bb_reg(p_adapter, REG_RX_IQK_TONE_A, MASKDWORD, 0x01008c00);
-		} else {	/* path B */
-			phy_set_bb_reg(p_adapter, REG_TX_IQK_TONE_B, MASKDWORD, 0x01008c00);
-			phy_set_bb_reg(p_adapter, REG_RX_IQK_TONE_B, MASKDWORD, 0x01008c00);
-
-		}
-
-		RTPRINT(FINIT, INIT_IQK, ("_phy_ap_calibrate_8192c() offset 0x800 %x\n", phy_query_bb_reg(p_adapter, 0x800, MASKDWORD)));
-
-		/* MAC settings */
-		phy_mac_setting_calibration(p_adapter, MAC_REG, MAC_backup);
-
-		if (path == RF_PATH_A)	/* path B to standby mode */
-			phy_set_rf_reg(p_adapter, RF_PATH_B, RF_AC, RFREGOFFSETMASK, 0x10000);
-		else {		/* path A to standby mode */
-			phy_set_rf_reg(p_adapter, RF_PATH_A, RF_AC, RFREGOFFSETMASK, 0x10000);
-			phy_set_rf_reg(p_adapter, RF_PATH_A, RF_MODE1, RFREGOFFSETMASK, 0x1000f);
-			phy_set_rf_reg(p_adapter, RF_PATH_A, RF_MODE2, RFREGOFFSETMASK, 0x20103);
-		}
-
-		delta_offset = ((delta + 14) / 2);
-		if (delta_offset < 0)
-			delta_offset = 0;
-		else if (delta_offset > 12)
-			delta_offset = 12;
-
-		/* AP calibration */
-		for (index = 0; index < APK_BB_REG_NUM; index++) {
-			if (index != 1)	/* only DO PA11+PAD01001, AP RF setting */
-				continue;
-
-			tmp_reg = APK_RF_init_value[path][index];
-#if 1
-			if (!p_hal_data->is_apk_thermal_meter_ignore) {
-				BB_offset = (tmp_reg & 0xF0000) >> 16;
-
-				if (!(tmp_reg & BIT(15))) /* sign bit 0 */
-					BB_offset = -BB_offset;
-
-				delta_V = APK_delta_mapping[index][delta_offset];
-
-				BB_offset += delta_V;
-
-				RTPRINT(FINIT, INIT_IQK, ("_phy_ap_calibrate_8192c() APK index %d tmp_reg 0x%x delta_V %d delta_offset %d\n", index, tmp_reg, delta_V, delta_offset));
-
-				if (BB_offset < 0) {
-					tmp_reg = tmp_reg & (~BIT(15));
-					BB_offset = -BB_offset;
-				} else
-					tmp_reg = tmp_reg | BIT(15);
-				tmp_reg = (tmp_reg & 0xFFF0FFFF) | (BB_offset << 16);
-			}
-#endif
-
-#if DEV_BUS_TYPE == RT_PCI_INTERFACE
-			if (IS_81xxC_VENDOR_UMC_B_CUT(p_hal_data->version_id))
-				phy_set_rf_reg(p_adapter, path, RF_IPA_A, RFREGOFFSETMASK, 0x894ae);
-			else
-#endif
-				phy_set_rf_reg(p_adapter, path, RF_IPA_A, RFREGOFFSETMASK, 0x8992e);
-			RTPRINT(FINIT, INIT_IQK, ("_phy_ap_calibrate_8192c() offset 0xc %x\n", phy_query_rf_reg(p_adapter, path, RF_IPA_A, RFREGOFFSETMASK)));
-			phy_set_rf_reg(p_adapter, path, RF_AC, RFREGOFFSETMASK, APK_RF_value_0[path][index]);
-			RTPRINT(FINIT, INIT_IQK, ("_phy_ap_calibrate_8192c() offset 0x0 %x\n", phy_query_rf_reg(p_adapter, path, RF_AC, RFREGOFFSETMASK)));
-			phy_set_rf_reg(p_adapter, path, RF_TXBIAS_A, RFREGOFFSETMASK, tmp_reg);
-			RTPRINT(FINIT, INIT_IQK, ("_phy_ap_calibrate_8192c() offset 0xd %x\n", phy_query_rf_reg(p_adapter, path, RF_TXBIAS_A, RFREGOFFSETMASK)));
-
-			/* PA11+PAD01111, one shot */
-			i = 0;
-			do {
-				phy_set_bb_reg(p_adapter, REG_FPGA0_IQK, 0xffffff00, 0x800000);
-				{
-					phy_set_bb_reg(p_adapter, APK_offset[path], MASKDWORD, APK_value[0]);
-					RTPRINT(FINIT, INIT_IQK, ("_phy_ap_calibrate_8192c() offset 0x%x value 0x%x\n", APK_offset[path], phy_query_bb_reg(p_adapter, APK_offset[path], MASKDWORD)));
-					delay_ms(3);
-					phy_set_bb_reg(p_adapter, APK_offset[path], MASKDWORD, APK_value[1]);
-					RTPRINT(FINIT, INIT_IQK, ("_phy_ap_calibrate_8192c() offset 0x%x value 0x%x\n", APK_offset[path], phy_query_bb_reg(p_adapter, APK_offset[path], MASKDWORD)));
-
-					delay_ms(20);
-				}
-				phy_set_bb_reg(p_adapter, REG_FPGA0_IQK, 0xffffff00, 0);
-
-				if (path == RF_PATH_A)
-					tmp_reg = phy_query_bb_reg(p_adapter, REG_APK, 0x03E00000);
-				else
-					tmp_reg = phy_query_bb_reg(p_adapter, REG_APK, 0xF8000000);
-				RTPRINT(FINIT, INIT_IQK, ("_phy_ap_calibrate_8192c() offset 0xbd8[25:21] %x\n", tmp_reg));
-
-
-				i++;
-			} while (tmp_reg > apkbound && i < 4);
-
-			APK_result[path][index] = tmp_reg;
-		}
-	}
-
-	/* reload MAC default value */
-	phy_reload_mac_registers(p_adapter, MAC_REG, MAC_backup);
-
-	/* reload BB default value */
-	for (index = 0; index < APK_BB_REG_NUM ; index++) {
-
-		if (index == 0)		/* skip */
-			continue;
-		phy_set_bb_reg(p_adapter, BB_REG[index], MASKDWORD, BB_backup[index]);
-	}
-
-	/* reload AFE default value */
-	phy_reload_adda_registers(p_adapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM);
-
-	/* reload RF path default value */
-	for (path = 0; path < pathbound; path++) {
-		phy_set_rf_reg(p_adapter, path, RF_TXBIAS_A, RFREGOFFSETMASK, reg_d[path]);
-		if (path == RF_PATH_B) {
-			phy_set_rf_reg(p_adapter, RF_PATH_A, RF_MODE1, RFREGOFFSETMASK, 0x1000f);
-			phy_set_rf_reg(p_adapter, RF_PATH_A, RF_MODE2, RFREGOFFSETMASK, 0x20101);
-		}
-
-		/* note no index == 0 */
-		if (APK_result[path][1] > 6)
-			APK_result[path][1] = 6;
-		RTPRINT(FINIT, INIT_IQK, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1]));
-	}
-
-	RTPRINT(FINIT, INIT_IQK, ("\n"));
-
-
-	for (path = 0; path < pathbound; path++) {
-		phy_set_rf_reg(p_adapter, path, RF_BS_PA_APSET_G1_G4, RFREGOFFSETMASK,
-			((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1]));
-		if (path == RF_PATH_A)
-			phy_set_rf_reg(p_adapter, path, RF_BS_PA_APSET_G5_G8, RFREGOFFSETMASK,
-				((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05));
-		else
-			phy_set_rf_reg(p_adapter, path, RF_BS_PA_APSET_G5_G8, RFREGOFFSETMASK,
-				((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05));
-
-		phy_set_rf_reg(p_adapter, path, RF_BS_PA_APSET_G9_G11, RFREGOFFSETMASK, ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08));
-	}
-
-	p_hal_data->is_ap_kdone = true;
-
-	RTPRINT(FINIT, INIT_IQK, ("<==_phy_ap_calibrate_8192c()\n"));
-}
-
-
-void
-phy_iq_calibrate_8192c(
-	struct _ADAPTER	*p_adapter,
-	bool	is_recovery
-)
-{
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-	s32			result[4][8];	/* last is final result */
-	u8			i, final_candidate, indexforchannel;
-	bool			is_patha_ok, is_pathb_ok;
-	s32			rege94, rege9c, regea4, regeac, regeb4, regebc, regec4, regecc, reg_tmp = 0;
-	bool			is12simular, is13simular, is23simular;
-	bool		is_start_cont_tx = false, is_single_tone = false, is_carrier_suppression = false;
-	u32			IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
-		REG_OFDM_0_XA_RX_IQ_IMBALANCE,	REG_OFDM_0_XB_RX_IQ_IMBALANCE,
-		REG_OFDM_0_ECCA_THRESHOLD,	REG_OFDM_0_AGC_RSSI_TABLE,
-		REG_OFDM_0_XA_TX_IQ_IMBALANCE,	REG_OFDM_0_XB_TX_IQ_IMBALANCE,
-		REG_OFDM_0_XC_TX_AFE,			REG_OFDM_0_XD_TX_AFE,
-		REG_OFDM_0_RX_IQ_EXT_ANTA
-	};
-
-	if (odm_check_power_status(p_adapter) == false)
-		return;
-
-#if MP_DRIVER == 1
-	is_start_cont_tx = p_adapter->mpt_ctx.is_start_cont_tx;
-	is_single_tone = p_adapter->mpt_ctx.is_single_tone;
-	is_carrier_suppression = p_adapter->mpt_ctx.is_carrier_suppression;
-#endif
-
-	/* ignore IQK when continuous Tx */
-	if (is_start_cont_tx || is_single_tone || is_carrier_suppression)
-		return;
-
-#ifdef DISABLE_BB_RF
-	return;
-#endif
-	if (p_adapter->is_slave_of_dmsp)
-		return;
-
-	if (is_recovery) {
-		phy_reload_adda_registers(p_adapter, IQK_BB_REG_92C, p_hal_data->IQK_BB_backup_recover, 9);
-		return;
-
-	}
-
-	RTPRINT(FINIT, INIT_IQK, ("IQK:Start!!!\n"));
-
-	for (i = 0; i < 8; i++) {
-		result[0][i] = 0;
-		result[1][i] = 0;
-		result[2][i] = 0;
-		result[3][i] = 0;
-	}
-	final_candidate = 0xff;
-	is_patha_ok = false;
-	is_pathb_ok = false;
-	is12simular = false;
-	is23simular = false;
-	is13simular = false;
-
-	acquire_cck_and_rw_page_a_control(p_adapter);
-	/*RT_TRACE(COMP_INIT,DBG_LOUD,("Acquire Mutex in IQCalibrate\n"));*/
-	for (i = 0; i < 3; i++) {
-		/*For 88C 1T1R*/
-		_phy_iq_calibrate_8192c(p_adapter, result, i, false);
-
-		if (i == 1) {
-			is12simular = phy_simularity_compare(p_adapter, result, 0, 1);
-			if (is12simular) {
-				final_candidate = 0;
-				break;
-			}
-		}
-
-		if (i == 2) {
-			is13simular = phy_simularity_compare(p_adapter, result, 0, 2);
-			if (is13simular) {
-				final_candidate = 0;
-				break;
-			}
-
-			is23simular = phy_simularity_compare(p_adapter, result, 1, 2);
-			if (is23simular)
-				final_candidate = 1;
-			else {
-				for (i = 0; i < 8; i++)
-					reg_tmp += result[3][i];
-
-				if (reg_tmp != 0)
-					final_candidate = 3;
-				else
-					final_candidate = 0xFF;
-			}
-		}
-	}
-	/*	RT_TRACE(COMP_INIT,DBG_LOUD,("Release Mutex in IQCalibrate\n")); */
-	release_cck_and_rw_pagea_control(p_adapter);
-
-	for (i = 0; i < 4; i++) {
-		rege94 = result[i][0];
-		rege9c = result[i][1];
-		regea4 = result[i][2];
-		regeac = result[i][3];
-		regeb4 = result[i][4];
-		regebc = result[i][5];
-		regec4 = result[i][6];
-		regecc = result[i][7];
-		RTPRINT(FINIT, INIT_IQK, ("IQK: rege94=%x rege9c=%x regea4=%x regeac=%x regeb4=%x regebc=%x regec4=%x regecc=%x\n ", rege94, rege9c, regea4, regeac, regeb4, regebc, regec4, regecc));
-	}
-
-	if (final_candidate != 0xff) {
-		p_hal_data->rege94 = rege94 = result[final_candidate][0];
-		p_hal_data->rege9c = rege9c = result[final_candidate][1];
-		regea4 = result[final_candidate][2];
-		regeac = result[final_candidate][3];
-		p_hal_data->regeb4 = regeb4 = result[final_candidate][4];
-		p_hal_data->regebc = regebc = result[final_candidate][5];
-		regec4 = result[final_candidate][6];
-		regecc = result[final_candidate][7];
-		RTPRINT(FINIT, INIT_IQK, ("IQK: final_candidate is %x\n", final_candidate));
-		RTPRINT(FINIT, INIT_IQK, ("IQK: rege94=%x rege9c=%x regea4=%x regeac=%x regeb4=%x regebc=%x regec4=%x regecc=%x\n ", rege94, rege9c, regea4, regeac, regeb4, regebc, regec4, regecc));
-		is_patha_ok = is_pathb_ok = true;
-	} else {
-		rege94 = regeb4 = p_hal_data->rege94 = p_hal_data->regeb4 = 0x100;	/* X default value */
-		rege9c = regebc = p_hal_data->rege9c = p_hal_data->regebc = 0x0;		/* Y default value */
-	}
-
-	if ((rege94 != 0)/*&&(regea4 != 0)*/) {
-		if (p_hal_data->current_band_type == BAND_ON_5G)
-			phy_path_a_fill_iqk_matrix_5g_normal(p_adapter, is_patha_ok, result, final_candidate, (regea4 == 0));
-		else
-			phy_path_a_fill_iqk_matrix(p_adapter, is_patha_ok, result, final_candidate, (regea4 == 0));
-
-	}
-
-	if (IS_92C_SERIAL(p_hal_data->version_id) || IS_92D_SINGLEPHY(p_hal_data->version_id)) {
-		if ((regeb4 != 0)/*&&(regec4 != 0)*/) {
-			if (p_hal_data->current_band_type == BAND_ON_5G)
-				phy_path_b_fill_iqk_matrix_5g_normal(p_adapter, is_pathb_ok, result, final_candidate, (regec4 == 0));
-			else
-				phy_path_b_fill_iqk_matrix(p_adapter, is_pathb_ok, result, final_candidate, (regec4 == 0));
-		}
-	}
-
-	phy_save_adda_registers(p_adapter, IQK_BB_REG_92C, p_hal_data->IQK_BB_backup_recover, 9);
-
-}
-
-
-void
-phy_lc_calibrate_8192c(
-	struct _ADAPTER	*p_adapter
-)
-{
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-	bool		is_start_cont_tx = false, is_single_tone = false, is_carrier_suppression = false;
-	PMGNT_INFO		p_mgnt_info = &p_adapter->mgnt_info;
-	PMGNT_INFO		p_mgnt_info_buddy_adapter;
-	u32			timeout = 2000, timecount = 0;
-	struct _ADAPTER	*buddy_adapter = p_adapter->buddy_adapter;
-
-#if MP_DRIVER == 1
-	is_start_cont_tx = p_adapter->mpt_ctx.is_start_cont_tx;
-	is_single_tone = p_adapter->mpt_ctx.is_single_tone;
-	is_carrier_suppression = p_adapter->mpt_ctx.is_carrier_suppression;
-#endif
-
-#ifdef DISABLE_BB_RF
-	return;
-#endif
-
-	/* ignore LCK when continuous Tx */
-	if (is_start_cont_tx || is_single_tone || is_carrier_suppression)
-		return;
-
-	if (buddy_adapter != NULL &&
-	    ((p_adapter->interface_index == 0 && p_hal_data->current_band_type == BAND_ON_2_4G) ||
-	     (p_adapter->interface_index == 1 && p_hal_data->current_band_type == BAND_ON_5G))) {
-		p_mgnt_info_buddy_adapter = &buddy_adapter->mgnt_info;
-		while (p_mgnt_info_buddy_adapter->is_scan_in_progress && timecount < timeout) {
-			delay_ms(50);
-			timecount += 50;
-		}
-	}
-
-	while (p_mgnt_info->is_scan_in_progress && timecount < timeout) {
-		delay_ms(50);
-		timecount += 50;
-	}
-
-	p_hal_data->is_lck_in_progress = true;
-
-	RTPRINT(FINIT, INIT_IQK, ("LCK:Start!!!interface %d currentband %x delay %d ms\n", p_adapter->interface_index, p_hal_data->current_band_type, timecount));
-
-	/* if(IS_92C_SERIAL(p_hal_data->version_id) || IS_92D_SINGLEPHY(p_hal_data->version_id)) */
-	if (IS_2T2R(p_hal_data->version_id))
-		phy_lc_calibrate(p_adapter, true);
-	else {
-		/* For 88C 1T1R */
-		phy_lc_calibrate(p_adapter, false);
-	}
-
-	p_hal_data->is_lck_in_progress = false;
-
-	RTPRINT(FINIT, INIT_IQK, ("LCK:Finish!!!interface %d\n", p_adapter->interface_index));
-
-
-}
-
-void
-phy_ap_calibrate_8192c(
-	struct _ADAPTER	*p_adapter,
-	s8		delta
-)
-{
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-
-	/* default disable APK, because Tx NG issue, suggest by Jenyu, 2011.11.25 */
-	return;
-
-#ifdef DISABLE_BB_RF
-	return;
-#endif
-
-#if FOR_BRAZIL_PRETEST != 1
-	if (p_hal_data->is_ap_kdone)
-#endif
-		return;
-
-	if (IS_92C_SERIAL(p_hal_data->version_id))
-		_phy_ap_calibrate_8192c(p_adapter, delta, true);
-	else {
-		/* For 88C 1T1R */
-		_phy_ap_calibrate_8192c(p_adapter, delta, false);
-	}
-}
-
-
-#endif
-
-
-/* 3============================================================
- * 3 IQ Calibration
- * 3============================================================ */
-
-void
-odm_reset_iqk_result(
-	void		*p_dm_void
-)
-{
-	return;
-}
-#if 1/* !(DM_ODM_SUPPORT_TYPE & ODM_AP) */
-u8 odm_get_right_chnl_place_for_iqk(u8 chnl)
-{
-	u8	channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = {
-		1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153, 155, 157, 159, 161, 163, 165
-	};
-	u8	place = chnl;
-
-
-	if (chnl > 14) {
-		for (place = 14; place < sizeof(channel_all); place++) {
-			if (channel_all[place] == chnl)
-				return place - 13;
-		}
-	}
-	return 0;
-
-}
-#endif
-
-void
-odm_iq_calibrate(
-	struct PHY_DM_STRUCT	*p_dm_odm
-)
-{
-	struct _ADAPTER	*adapter = p_dm_odm->adapter;
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	if (*p_dm_odm->p_is_fcs_mode_enable)
-		return;
-#endif
-
-
-
-	if (p_dm_odm->is_linked) {
-		if ((*p_dm_odm->p_channel != p_dm_odm->pre_channel) && (!*p_dm_odm->p_is_scan_in_process)) {
-			p_dm_odm->pre_channel = *p_dm_odm->p_channel;
-			p_dm_odm->linked_interval = 0;
-		}
-
-		if (p_dm_odm->linked_interval < 3)
-			p_dm_odm->linked_interval++;
-
-		if (p_dm_odm->linked_interval == 2) {
-
-#if (RTL8814A_SUPPORT == 1)
-			if (p_dm_odm->support_ic_type == ODM_RTL8814A)
-				phy_iq_calibrate_8814a(p_dm_odm, false);
-#endif
-
-#if (RTL8822B_SUPPORT == 1)
-			if (p_dm_odm->support_ic_type == ODM_RTL8822B)
-				phy_iq_calibrate_8822b(p_dm_odm, false);
-#endif
-
-#if (RTL8821C_SUPPORT == 1)
-			if (p_dm_odm->support_ic_type == ODM_RTL8821C)
-				phy_iq_calibrate_8821c(p_dm_odm, false);
-#endif
-
-#if (RTL8821A_SUPPORT == 1)
-			if (p_dm_odm->support_ic_type == ODM_RTL8821)
-				phy_iq_calibrate_8821a(p_dm_odm, false);
-#endif
-
-#if (RTL8812A_SUPPORT == 1)
-			if (p_dm_odm->support_ic_type == ODM_RTL8812)
-				_phy_iq_calibrate_8812a(p_dm_odm, false);
-#endif
-		}
-	} else
-		p_dm_odm->linked_interval = 0;
-
-}
-
-void phydm_rf_init(void		*p_dm_void)
-{
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	odm_txpowertracking_init(p_dm_odm);
-
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	odm_clear_txpowertracking_state(p_dm_odm);
-#endif
-
-#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-#if (RTL8814A_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type & ODM_RTL8814A)
-		phy_iq_calibrate_8814a_init(p_dm_odm);
-#endif
-#endif
-
-}
-
-void phydm_rf_watchdog(void		*p_dm_void)
-{
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	odm_txpowertracking_check(p_dm_odm);
-	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES)
-		odm_iq_calibrate(p_dm_odm);
-#endif
-}
diff --git a/rtl8822BU/hal/phydm/halrf/halphyrf_ap.c b/rtl8822BU/hal/phydm/halrf/halphyrf_ap.c
new file mode 100644
index 0000000..22d6e53
--- a/dev/null
+++ b/rtl8822BU/hal/phydm/halrf/halphyrf_ap.c
@@ -0,0 +1,1369 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+#include "mp_precomp.h"
+#include "phydm_precomp.h"
+
+#ifndef index_mapping_NUM_88E
+	#define	index_mapping_NUM_88E	15
+#endif
+
+/* #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) */
+
+#define	CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _delta_thermal) \
+	do {\
+		for (_offset = 0; _offset < _size; _offset++) { \
+			\
+			if (_delta_thermal < thermal_threshold[_direction][_offset]) { \
+				\
+				if (_offset != 0)\
+					_offset--;\
+				break;\
+			} \
+		}			\
+		if (_offset >= _size)\
+			_offset = _size-1;\
+	} while (0)
+
+
+void configure_txpower_track(
+	void		*p_dm_void,
+	struct _TXPWRTRACK_CFG	*p_config
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+#if RTL8812A_SUPPORT
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+	/* if (IS_HARDWARE_TYPE_8812(p_dm_odm->adapter)) */
+	if (p_dm_odm->support_ic_type == ODM_RTL8812)
+		configure_txpower_track_8812a(p_config);
+	/* else */
+#endif
+#endif
+
+#if RTL8814A_SUPPORT
+	if (p_dm_odm->support_ic_type == ODM_RTL8814A)
+		configure_txpower_track_8814a(p_config);
+#endif
+
+
+#if RTL8188E_SUPPORT
+	if (p_dm_odm->support_ic_type == ODM_RTL8188E)
+		configure_txpower_track_8188e(p_config);
+#endif
+
+#if RTL8197F_SUPPORT
+	if (p_dm_odm->support_ic_type == ODM_RTL8197F)
+		configure_txpower_track_8197f(p_config);
+#endif
+
+#if RTL8822B_SUPPORT
+	if (p_dm_odm->support_ic_type == ODM_RTL8822B)
+		configure_txpower_track_8822b(p_config);
+#endif
+
+
+}
+
+#if (RTL8192E_SUPPORT == 1)
+void
+odm_txpowertracking_callback_thermal_meter_92e(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u8	thermal_value = 0, delta, delta_IQK, delta_LCK, channel, is_decrease, rf_mimo_mode;
+	u8	thermal_value_avg_count = 0;
+	u8     OFDM_min_index = 10; /* OFDM BB Swing should be less than +2.5dB, which is required by Arthur */
+	s8	OFDM_index[2], index ;
+	u32	thermal_value_avg = 0, reg0x18;
+	u32	i = 0, j = 0, rf;
+	s32	value32, CCK_index = 0, ele_A, ele_D, ele_C, X, Y;
+	struct rtl8192cd_priv	*priv = p_dm_odm->priv;
+
+	rf_mimo_mode = p_dm_odm->rf_type;
+	/* ODM_RT_TRACE(p_dm_odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("%s:%d rf_mimo_mode:%d\n", __FUNCTION__, __LINE__, rf_mimo_mode)); */
+
+#ifdef MP_TEST
+	if ((OPMODE & WIFI_MP_STATE) || *(p_dm_odm->p_mp_mode)) {
+		channel = priv->pshare->working_channel;
+		if (priv->pshare->mp_txpwr_tracking == false)
+			return;
+	} else
+#endif
+	{
+		channel = (priv->pmib->dot11RFEntry.dot11channel);
+	}
+
+	thermal_value = (unsigned char)odm_get_rf_reg(p_dm_odm, RF_PATH_A, ODM_RF_T_METER_92E, 0xfc00);	/* 0x42: RF Reg[15:10] 88E */
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther));
+
+
+	switch (rf_mimo_mode) {
+	case MIMO_1T1R:
+		rf = 1;
+		break;
+	case MIMO_2T2R:
+		rf = 2;
+		break;
+	default:
+		rf = 2;
+		break;
+	}
+
+	/* Query OFDM path A default setting 	Bit[31:21] */
+	ele_D = phy_query_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKOFDM_D);
+	for (i = 0; i < OFDM_TABLE_SIZE_92E; i++) {
+		if (ele_D == (ofdm_swing_table_92e[i] >> 22)) {
+			OFDM_index[0] = (unsigned char)i;
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("PathA 0xC80[31:22] = 0x%x, OFDM_index=%d\n", ele_D, OFDM_index[0]));
+			break;
+		}
+	}
+
+	/* Query OFDM path B default setting */
+	if (rf_mimo_mode == MIMO_2T2R) {
+		ele_D = phy_query_bb_reg(priv, REG_OFDM_0_XB_TX_IQ_IMBALANCE, MASKOFDM_D);
+		for (i = 0; i < OFDM_TABLE_SIZE_92E; i++) {
+			if (ele_D == (ofdm_swing_table_92e[i] >> 22)) {
+				OFDM_index[1] = (unsigned char)i;
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("PathB 0xC88[31:22] = 0x%x, OFDM_index=%d\n", ele_D, OFDM_index[1]));
+				break;
+			}
+		}
+	}
+
+	/* calculate average thermal meter */
+	{
+		priv->pshare->thermal_value_avg_88xx[priv->pshare->thermal_value_avg_index_88xx] = thermal_value;
+		priv->pshare->thermal_value_avg_index_88xx++;
+		if (priv->pshare->thermal_value_avg_index_88xx == AVG_THERMAL_NUM_88XX)
+			priv->pshare->thermal_value_avg_index_88xx = 0;
+
+		for (i = 0; i < AVG_THERMAL_NUM_88XX; i++) {
+			if (priv->pshare->thermal_value_avg_88xx[i]) {
+				thermal_value_avg += priv->pshare->thermal_value_avg_88xx[i];
+				thermal_value_avg_count++;
+			}
+		}
+
+		if (thermal_value_avg_count) {
+			thermal_value = (unsigned char)(thermal_value_avg / thermal_value_avg_count);
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("AVG Thermal Meter = 0x%x\n", thermal_value));
+		}
+	}
+
+	/* Initialize */
+	if (!priv->pshare->thermal_value) {
+		priv->pshare->thermal_value = priv->pmib->dot11RFEntry.ther;
+		priv->pshare->thermal_value_iqk = thermal_value;
+		priv->pshare->thermal_value_lck = thermal_value;
+	}
+
+	if (thermal_value != priv->pshare->thermal_value) {
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** START POWER TRACKING ********\n"));
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther));
+
+		delta = RTL_ABS(thermal_value, priv->pmib->dot11RFEntry.ther);
+		delta_IQK = RTL_ABS(thermal_value, priv->pshare->thermal_value_iqk);
+		delta_LCK = RTL_ABS(thermal_value, priv->pshare->thermal_value_lck);
+		is_decrease = ((thermal_value < priv->pmib->dot11RFEntry.ther) ? 1 : 0);
+
+#ifdef _TRACKING_TABLE_FILE
+		if (priv->pshare->rf_ft_var.pwr_track_file) {
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("diff: (%s)%d ==> get index from table : %d)\n", (is_decrease ? "-" : "+"), delta, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0)));
+
+			if (is_decrease) {
+				for (i = 0; i < rf; i++) {
+					OFDM_index[i] = priv->pshare->OFDM_index0[i] + get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0);
+					OFDM_index[i] = ((OFDM_index[i] > (OFDM_TABLE_SIZE_92E- 1)) ? (OFDM_TABLE_SIZE_92E - 1) : OFDM_index[i]);
+					ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> decrese power ---> new OFDM_INDEX:%d (%d + %d)\n", OFDM_index[i], priv->pshare->OFDM_index0[i], get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0)));
+					CCK_index = priv->pshare->CCK_index0 + get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1);
+					CCK_index = ((CCK_index > (CCK_TABLE_SIZE_92E - 1)) ? (CCK_TABLE_SIZE_92E - 1) : CCK_index);
+					ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> Decrese power ---> new CCK_INDEX:%d (%d + %d)\n",  CCK_index, priv->pshare->CCK_index0, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1)));
+				}
+			} else {
+				for (i = 0; i < rf; i++) {
+					OFDM_index[i] = priv->pshare->OFDM_index0[i] - get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0);
+					OFDM_index[i] = ((OFDM_index[i] < OFDM_min_index) ?  OFDM_min_index : OFDM_index[i]);
+					ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> Increse power ---> new OFDM_INDEX:%d (%d - %d)\n", OFDM_index[i], priv->pshare->OFDM_index0[i], get_tx_tracking_index(priv, channel, i, delta, is_decrease, 0)));
+					CCK_index = priv->pshare->CCK_index0 - get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1);
+					CCK_index = ((CCK_index < 0) ? 0 : CCK_index);
+					ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> Increse power ---> new CCK_INDEX:%d (%d - %d)\n", CCK_index, priv->pshare->CCK_index0, get_tx_tracking_index(priv, channel, i, delta, is_decrease, 1)));
+				}
+			}
+		}
+#endif /* CFG_TRACKING_TABLE_FILE */
+
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("ofdm_swing_table_92e[(unsigned int)OFDM_index[0]] = %x\n", ofdm_swing_table_92e[(unsigned int)OFDM_index[0]]));
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("ofdm_swing_table_92e[(unsigned int)OFDM_index[1]] = %x\n", ofdm_swing_table_92e[(unsigned int)OFDM_index[1]]));
+
+		/* Adujst OFDM Ant_A according to IQK result */
+		ele_D = (ofdm_swing_table_92e[(unsigned int)OFDM_index[0]] & 0xFFC00000) >> 22;
+		X = priv->pshare->rege94;
+		Y = priv->pshare->rege9c;
+
+		if (X != 0) {
+			if ((X & 0x00000200) != 0)
+				X = X | 0xFFFFFC00;
+			ele_A = ((X * ele_D) >> 8) & 0x000003FF;
+
+			/* new element C = element D x Y */
+			if ((Y & 0x00000200) != 0)
+				Y = Y | 0xFFFFFC00;
+			ele_C = ((Y * ele_D) >> 8) & 0x000003FF;
+
+			/* wirte new elements A, C, D to regC80 and regC94, element B is always 0 */
+			value32 = (ele_D << 22) | ((ele_C & 0x3F) << 16) | ele_A;
+			phy_set_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD, value32);
+
+			value32 = (ele_C & 0x000003C0) >> 6;
+			phy_set_bb_reg(priv, REG_OFDM_0_XC_TX_AFE, MASKH4BITS, value32);
+
+			value32 = ((X * ele_D) >> 7) & 0x01;
+			phy_set_bb_reg(priv, REG_OFDM_0_ECCA_THRESHOLD, BIT(24), value32);
+		} else {
+			phy_set_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD, ofdm_swing_table_92e[(unsigned int)OFDM_index[0]]);
+			phy_set_bb_reg(priv, REG_OFDM_0_XC_TX_AFE, MASKH4BITS, 0x00);
+			phy_set_bb_reg(priv, REG_OFDM_0_ECCA_THRESHOLD, BIT(24), 0x00);
+		}
+
+		set_CCK_swing_index(priv, CCK_index);
+
+		if (rf == 2) {
+			ele_D = (ofdm_swing_table_92e[(unsigned int)OFDM_index[1]] & 0xFFC00000) >> 22;
+			X = priv->pshare->regeb4;
+			Y = priv->pshare->regebc;
+
+			if (X != 0) {
+				if ((X & 0x00000200) != 0)	/* consider minus */
+					X = X | 0xFFFFFC00;
+				ele_A = ((X * ele_D) >> 8) & 0x000003FF;
+
+				/* new element C = element D x Y */
+				if ((Y & 0x00000200) != 0)
+					Y = Y | 0xFFFFFC00;
+				ele_C = ((Y * ele_D) >> 8) & 0x00003FF;
+
+				/* wirte new elements A, C, D to regC88 and regC9C, element B is always 0 */
+				value32 = (ele_D << 22) | ((ele_C & 0x3F) << 16) | ele_A;
+				phy_set_bb_reg(priv, REG_OFDM_0_XB_TX_IQ_IMBALANCE, MASKDWORD, value32);
+
+				value32 = (ele_C & 0x000003C0) >> 6;
+				phy_set_bb_reg(priv, REG_OFDM_0_XD_TX_AFE, MASKH4BITS, value32);
+
+				value32 = ((X * ele_D) >> 7) & 0x01;
+				phy_set_bb_reg(priv, REG_OFDM_0_ECCA_THRESHOLD, BIT(28), value32);
+			} else {
+				phy_set_bb_reg(priv, REG_OFDM_0_XB_TX_IQ_IMBALANCE, MASKDWORD, ofdm_swing_table_92e[(unsigned int)OFDM_index[1]]);
+				phy_set_bb_reg(priv, REG_OFDM_0_XD_TX_AFE, MASKH4BITS, 0x00);
+				phy_set_bb_reg(priv, REG_OFDM_0_ECCA_THRESHOLD, BIT(28), 0x00);
+			}
+
+		}
+
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0xc80 = 0x%x\n", phy_query_bb_reg(priv, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD)));
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0xc88 = 0x%x\n", phy_query_bb_reg(priv, REG_OFDM_0_XB_TX_IQ_IMBALANCE, MASKDWORD)));
+
+		if (delta_IQK > 3) {
+			priv->pshare->thermal_value_iqk = thermal_value;
+#ifdef MP_TEST
+#endif			if (!(*(p_dm_odm->p_mp_mode) && (OPMODE & (WIFI_MP_CTX_BACKGROUND | WIFI_MP_CTX_PACKET))))
+
+				phy_iq_calibrate_8192e(p_dm_odm, false);
+		}
+
+		if (delta_LCK > 8) {
+			RTL_W8(0x522, 0xff);
+			reg0x18 = phy_query_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, 1);
+			phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 1);
+			phy_set_rf_reg(priv, RF_PATH_A, 0x18, BIT(15), 1);
+			delay_ms(1);
+			phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 0);
+			phy_set_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, reg0x18);
+			RTL_W8(0x522, 0x0);
+			priv->pshare->thermal_value_lck = thermal_value;
+		}
+	}
+
+	/* update thermal meter value */
+	priv->pshare->thermal_value = thermal_value;
+	for (i = 0 ; i < rf ; i++)
+		priv->pshare->OFDM_index[i] = OFDM_index[i];
+	priv->pshare->CCK_index = CCK_index;
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** END:%s() ********\n", __FUNCTION__));
+}
+#endif
+
+
+
+#if (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1)
+void
+odm_txpowertracking_callback_thermal_meter_jaguar_series3(
+	void		*p_dm_void
+)
+{
+#if 1
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u8			thermal_value = 0, delta, delta_LCK, delta_IQK, channel, is_increase;
+	u8			thermal_value_avg_count = 0, p = 0, i = 0;
+	u32			thermal_value_avg = 0;
+	struct rtl8192cd_priv		*priv = p_dm_odm->priv;
+	struct _TXPWRTRACK_CFG	c;
+	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
+
+	/*4 1. The following TWO tables decide the final index of OFDM/CCK swing table.*/
+	u8			*delta_swing_table_idx_tup_a = NULL, *delta_swing_table_idx_tdown_a = NULL;
+	u8			*delta_swing_table_idx_tup_b = NULL, *delta_swing_table_idx_tdown_b = NULL;
+	u8			*delta_swing_table_idx_tup_cck_a = NULL, *delta_swing_table_idx_tdown_cck_a = NULL;
+	u8			*delta_swing_table_idx_tup_cck_b = NULL, *delta_swing_table_idx_tdown_cck_b = NULL;
+	/*for 8814 add by Yu Chen*/
+	u8			*delta_swing_table_idx_tup_c = NULL, *delta_swing_table_idx_tdown_c = NULL;
+	u8			*delta_swing_table_idx_tup_d = NULL, *delta_swing_table_idx_tdown_d = NULL;
+	u8			*delta_swing_table_idx_tup_cck_c = NULL, *delta_swing_table_idx_tdown_cck_c = NULL;
+	u8			*delta_swing_table_idx_tup_cck_d = NULL, *delta_swing_table_idx_tdown_cck_d = NULL;
+
+#ifdef MP_TEST
+	if ((OPMODE & WIFI_MP_STATE) || *(p_dm_odm->p_mp_mode)) {
+		channel = priv->pshare->working_channel;
+		if (priv->pshare->mp_txpwr_tracking == false)
+			return;
+	} else
+#endif
+	{
+		channel = (priv->pmib->dot11RFEntry.dot11channel);
+	}
+
+	configure_txpower_track(p_dm_odm, &c);
+
+	(*c.get_delta_all_swing_table)(p_dm_odm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a,
+		(u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b,
+		(u8 **)&delta_swing_table_idx_tup_cck_a, (u8 **)&delta_swing_table_idx_tdown_cck_a,
+		(u8 **)&delta_swing_table_idx_tup_cck_b, (u8 **)&delta_swing_table_idx_tdown_cck_b);
+
+	thermal_value = (u8)odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, c.thermal_reg_addr, 0xfc00); /*0x42: RF Reg[15:10] 88E*/
+#ifdef THER_TRIM
+	if (GET_CHIP_VER(priv) == VERSION_8197F) {
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+			("orig thermal_value=%d, ther_trim_val=%d\n", thermal_value, priv->pshare->rf_ft_var.ther_trim_val));
+
+		thermal_value += priv->pshare->rf_ft_var.ther_trim_val;
+
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+			("after thermal trim, thermal_value=%d\n", thermal_value));
+	}
+#endif
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+		("Readback Thermal Meter = 0x%x(%d) EEPROMthermalmeter 0x%x(%d)\n"
+		, thermal_value, thermal_value, priv->pmib->dot11RFEntry.ther, priv->pmib->dot11RFEntry.ther));
+
+	/* Initialize */
+	if (!p_dm_odm->rf_calibrate_info.thermal_value)
+		p_dm_odm->rf_calibrate_info.thermal_value = priv->pmib->dot11RFEntry.ther;
+
+	if (!p_dm_odm->rf_calibrate_info.thermal_value_lck)
+		p_dm_odm->rf_calibrate_info.thermal_value_lck = priv->pmib->dot11RFEntry.ther;
+
+	if (!p_dm_odm->rf_calibrate_info.thermal_value_iqk)
+		p_dm_odm->rf_calibrate_info.thermal_value_iqk = priv->pmib->dot11RFEntry.ther;
+
+	/* calculate average thermal meter */
+	p_dm_odm->rf_calibrate_info.thermal_value_avg[p_dm_odm->rf_calibrate_info.thermal_value_avg_index] = thermal_value;
+	p_dm_odm->rf_calibrate_info.thermal_value_avg_index++;
+
+	if (p_dm_odm->rf_calibrate_info.thermal_value_avg_index == c.average_thermal_num)   /*Average times =  c.average_thermal_num*/
+		p_dm_odm->rf_calibrate_info.thermal_value_avg_index = 0;
+
+	for (i = 0; i < c.average_thermal_num; i++) {
+		if (p_dm_odm->rf_calibrate_info.thermal_value_avg[i]) {
+			thermal_value_avg += p_dm_odm->rf_calibrate_info.thermal_value_avg[i];
+			thermal_value_avg_count++;
+		}
+	}
+
+	if (thermal_value_avg_count) {/*Calculate Average thermal_value after average enough times*/
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+			("thermal_value_avg=0x%x(%d)  thermal_value_avg_count = %d\n"
+			, thermal_value_avg, thermal_value_avg, thermal_value_avg_count));
+
+		thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count);
+
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+			("AVG Thermal Meter = 0x%X(%d), EEPROMthermalmeter = 0x%X(%d)\n", thermal_value, thermal_value, priv->pmib->dot11RFEntry.ther, priv->pmib->dot11RFEntry.ther));
+	}
+
+	/*4 Calculate delta, delta_LCK, delta_IQK.*/
+	delta = RTL_ABS(thermal_value, priv->pmib->dot11RFEntry.ther);
+	delta_LCK = RTL_ABS(thermal_value, p_dm_odm->rf_calibrate_info.thermal_value_lck);
+	delta_IQK = RTL_ABS(thermal_value, p_dm_odm->rf_calibrate_info.thermal_value_iqk);
+	is_increase = ((thermal_value < priv->pmib->dot11RFEntry.ther) ? 0 : 1);
+
+	if (delta > 29) { /* power track table index(thermal diff.) upper bound*/
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta(%d) > 29, set delta to 29\n", delta));
+		delta = 29;
+	}
+
+
+	/*4 if necessary, do LCK.*/
+
+	if (delta_LCK > c.threshold_iqk) {
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk));
+		p_dm_odm->rf_calibrate_info.thermal_value_lck = thermal_value;
+		if (c.phy_lc_calibrate)
+			(*c.phy_lc_calibrate)(p_dm_odm);
+	}
+
+	if (delta_IQK > c.threshold_iqk) {
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk));
+		p_dm_odm->rf_calibrate_info.thermal_value_iqk = thermal_value;
+		if (c.do_iqk)
+			(*c.do_iqk)(p_dm_odm, true, 0, 0);
+	}
+
+	if (!priv->pmib->dot11RFEntry.ther)	/*Don't do power tracking since no calibrated thermal value*/
+		return;
+
+	/*4 Do Power Tracking*/
+
+	if (thermal_value != p_dm_odm->rf_calibrate_info.thermal_value) {
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+			     ("\n\n******** START POWER TRACKING ********\n"));
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+			("Readback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n",
+			thermal_value, p_dm_odm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther));
+
+#ifdef _TRACKING_TABLE_FILE
+		if (priv->pshare->rf_ft_var.pwr_track_file) {
+			if (is_increase) {			/*thermal is higher than base*/
+				for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++) {
+					switch (p) {
+					case ODM_RF_PATH_B:
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("delta_swing_table_idx_tup_b[%d] = %d delta_swing_table_idx_tup_cck_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta], delta, delta_swing_table_idx_tup_cck_b[delta]));
+						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_b[delta];
+						p_rf_calibrate_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_cck_b[delta];
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("******Temp is higher and pRF->absolute_ofdm_swing_idx[ODM_RF_PATH_B] = %d pRF->absolute_cck_swing_idx[ODM_RF_PATH_B] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
+						break;
+
+					case ODM_RF_PATH_C:
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("delta_swing_table_idx_tup_c[%d] = %d delta_swing_table_idx_tup_cck_c[%d] = %d\n", delta, delta_swing_table_idx_tup_c[delta], delta, delta_swing_table_idx_tup_cck_c[delta]));
+						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_c[delta];
+						p_rf_calibrate_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_cck_c[delta];
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("******Temp is higher and pRF->absolute_ofdm_swing_idx[ODM_RF_PATH_C] = %d pRF->absolute_cck_swing_idx[ODM_RF_PATH_C] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
+						break;
+
+					case ODM_RF_PATH_D:
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("delta_swing_table_idx_tup_d[%d] = %d delta_swing_table_idx_tup_cck_d[%d] = %d\n", delta, delta_swing_table_idx_tup_d[delta], delta, delta_swing_table_idx_tup_cck_d[delta]));
+						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_d[delta];
+						p_rf_calibrate_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_cck_d[delta];
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("******Temp is higher and pRF->absolute_ofdm_swing_idx[ODM_RF_PATH_D] = %d pRF->absolute_cck_swing_idx[ODM_RF_PATH_D] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
+						break;
+					default:
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("delta_swing_table_idx_tup_a[%d] = %d delta_swing_table_idx_tup_cck_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta], delta, delta_swing_table_idx_tup_cck_a[delta]));
+						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_a[delta];
+						p_rf_calibrate_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_cck_a[delta];
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("******Temp is higher and pRF->absolute_ofdm_swing_idx[ODM_RF_PATH_A] = %d pRF->absolute_cck_swing_idx[ODM_RF_PATH_A] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
+						break;
+					}
+				}
+			} else {			/* thermal is lower than base*/
+				for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++) {
+					switch (p) {
+					case ODM_RF_PATH_B:
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("delta_swing_table_idx_tdown_b[%d] = %d   delta_swing_table_idx_tdown_cck_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta], delta, delta_swing_table_idx_tdown_cck_b[delta]));
+						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b[delta];
+						p_rf_calibrate_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_cck_b[delta];
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("******Temp is lower and pRF->absolute_ofdm_swing_idx[ODM_RF_PATH_B] = %d   pRF->absolute_cck_swing_idx[ODM_RF_PATH_B] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
+						break;
+
+					case ODM_RF_PATH_C:
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("delta_swing_table_idx_tdown_c[%d] = %d   delta_swing_table_idx_tdown_cck_c[%d] = %d\n", delta, delta_swing_table_idx_tdown_c[delta], delta, delta_swing_table_idx_tdown_cck_c[delta]));
+						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_c[delta];
+						p_rf_calibrate_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_cck_c[delta];
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("******Temp is lower and pRF->absolute_ofdm_swing_idx[ODM_RF_PATH_C] = %d   pRF->absolute_cck_swing_idx[ODM_RF_PATH_C] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
+						break;
+
+					case ODM_RF_PATH_D:
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("delta_swing_table_idx_tdown_d[%d] = %d   delta_swing_table_idx_tdown_cck_d[%d] = %d\n", delta, delta_swing_table_idx_tdown_d[delta], delta, delta_swing_table_idx_tdown_cck_d[delta]));
+						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_d[delta];
+						p_rf_calibrate_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_cck_d[delta];
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("******Temp is lower and pRF->absolute_ofdm_swing_idx[ODM_RF_PATH_D] = %d   pRF->absolute_cck_swing_idx[ODM_RF_PATH_D] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
+						break;
+
+					default:
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("delta_swing_table_idx_tdown_a[%d] = %d   delta_swing_table_idx_tdown_cck_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta], delta, delta_swing_table_idx_tdown_cck_a[delta]));
+						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a[delta];
+						p_rf_calibrate_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_cck_a[delta];
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("******Temp is lower and pRF->absolute_ofdm_swing_idx[ODM_RF_PATH_A] = %d   pRF->absolute_cck_swing_idx[ODM_RF_PATH_A] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p], p_rf_calibrate_info->absolute_cck_swing_idx[p]));
+						break;
+					}
+				}
+			}
+
+			if (is_increase) {
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> increse power --->\n"));
+				if (GET_CHIP_VER(priv) == VERSION_8197F) {
+					for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++)
+						(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, BBSWING, p, 0);
+				} else if (GET_CHIP_VER(priv) == VERSION_8822B) {
+					for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++)
+						(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, MIX_MODE, p, 0);
+				}
+			} else {
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> decrese power --->\n"));
+				if (GET_CHIP_VER(priv) == VERSION_8197F) {
+					for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++)
+						(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, BBSWING, p, 0);
+				} else if (GET_CHIP_VER(priv) == VERSION_8822B) {
+					for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++)
+						(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, MIX_MODE, p, 0);
+				}
+			}
+		}
+#endif
+
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** END:%s() ********\n\n", __func__));
+		/*update thermal meter value*/
+		p_dm_odm->rf_calibrate_info.thermal_value =  thermal_value;
+
+	}
+
+#endif
+}
+#endif
+
+/*#if (RTL8814A_SUPPORT == 1)*/
+#if (RTL8814A_SUPPORT == 1)
+
+void
+odm_txpowertracking_callback_thermal_meter_jaguar_series2(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u8			thermal_value = 0, delta, delta_LCK, delta_IQK, channel, is_increase;
+	u8			thermal_value_avg_count = 0, p = 0, i = 0;
+	u32			thermal_value_avg = 0, reg0x18;
+	u32			bb_swing_reg[4] = {REG_A_TX_SCALE_JAGUAR, REG_B_TX_SCALE_JAGUAR, REG_C_TX_SCALE_JAGUAR2, REG_D_TX_SCALE_JAGUAR2};
+	s32			ele_D;
+	u32			bb_swing_idx;
+	struct rtl8192cd_priv	*priv = p_dm_odm->priv;
+	struct _TXPWRTRACK_CFG	c;
+	boolean			is_tssi_enable = false;
+	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
+
+	/* 4 1. The following TWO tables decide the final index of OFDM/CCK swing table. */
+	u8			*delta_swing_table_idx_tup_a = NULL, *delta_swing_table_idx_tdown_a = NULL;
+	u8			*delta_swing_table_idx_tup_b = NULL, *delta_swing_table_idx_tdown_b = NULL;
+	/* for 8814 add by Yu Chen */
+	u8			*delta_swing_table_idx_tup_c = NULL, *delta_swing_table_idx_tdown_c = NULL;
+	u8			*delta_swing_table_idx_tup_d = NULL, *delta_swing_table_idx_tdown_d = NULL;
+
+#ifdef MP_TEST
+	if ((OPMODE & WIFI_MP_STATE) || *(p_dm_odm->p_mp_mode)) {
+		channel = priv->pshare->working_channel;
+		if (priv->pshare->mp_txpwr_tracking == false)
+			return;
+	} else
+#endif
+	{
+		channel = (priv->pmib->dot11RFEntry.dot11channel);
+	}
+
+	configure_txpower_track(p_dm_odm, &c);
+	p_rf_calibrate_info->default_ofdm_index = priv->pshare->OFDM_index0[ODM_RF_PATH_A];
+
+	(*c.get_delta_swing_table)(p_dm_odm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a,
+		(u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b);
+
+	if (p_dm_odm->support_ic_type & ODM_RTL8814A)	/* for 8814 path C & D */
+		(*c.get_delta_swing_table8814only)(p_dm_odm, (u8 **)&delta_swing_table_idx_tup_c, (u8 **)&delta_swing_table_idx_tdown_c,
+			(u8 **)&delta_swing_table_idx_tup_d, (u8 **)&delta_swing_table_idx_tdown_d);
+
+	thermal_value = (u8)odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, c.thermal_reg_addr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+		("\nReadback Thermal Meter = 0x%x, pre thermal meter 0x%x, EEPROMthermalmeter 0x%x\n", thermal_value, p_dm_odm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther));
+
+	/* Initialize */
+	if (!p_dm_odm->rf_calibrate_info.thermal_value)
+		p_dm_odm->rf_calibrate_info.thermal_value = priv->pmib->dot11RFEntry.ther;
+
+	if (!p_dm_odm->rf_calibrate_info.thermal_value_lck)
+		p_dm_odm->rf_calibrate_info.thermal_value_lck = priv->pmib->dot11RFEntry.ther;
+
+	if (!p_dm_odm->rf_calibrate_info.thermal_value_iqk)
+		p_dm_odm->rf_calibrate_info.thermal_value_iqk = priv->pmib->dot11RFEntry.ther;
+
+	is_tssi_enable = (boolean)odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, REG_RF_TX_GAIN_OFFSET, BIT(7));	/* check TSSI enable */
+
+	/* 4 Query OFDM BB swing default setting 	Bit[31:21] */
+	for (p = ODM_RF_PATH_A ; p < c.rf_path_count ; p++) {
+		ele_D = odm_get_bb_reg(p_dm_odm, bb_swing_reg[p], 0xffe00000);
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+			("0x%x:0x%x ([31:21] = 0x%x)\n", bb_swing_reg[p], odm_get_bb_reg(p_dm_odm, bb_swing_reg[p], MASKDWORD), ele_D));
+
+		for (bb_swing_idx = 0; bb_swing_idx < TXSCALE_TABLE_SIZE; bb_swing_idx++) {/* 4 */
+			if (ele_D == tx_scaling_table_jaguar[bb_swing_idx]) {
+				p_dm_odm->rf_calibrate_info.OFDM_index[p] = (u8)bb_swing_idx;
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+					("OFDM_index[%d]=%d\n", p, p_dm_odm->rf_calibrate_info.OFDM_index[p]));
+				break;
+			}
+		}
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("kfree_offset[%d]=%d\n", p, p_rf_calibrate_info->kfree_offset[p]));
+
+	}
+
+	/* calculate average thermal meter */
+	p_dm_odm->rf_calibrate_info.thermal_value_avg[p_dm_odm->rf_calibrate_info.thermal_value_avg_index] = thermal_value;
+	p_dm_odm->rf_calibrate_info.thermal_value_avg_index++;
+	if (p_dm_odm->rf_calibrate_info.thermal_value_avg_index == c.average_thermal_num)  /* Average times =  c.average_thermal_num */
+		p_dm_odm->rf_calibrate_info.thermal_value_avg_index = 0;
+
+	for (i = 0; i < c.average_thermal_num; i++) {
+		if (p_dm_odm->rf_calibrate_info.thermal_value_avg[i]) {
+			thermal_value_avg += p_dm_odm->rf_calibrate_info.thermal_value_avg[i];
+			thermal_value_avg_count++;
+		}
+	}
+
+	if (thermal_value_avg_count) {            /* Calculate Average thermal_value after average enough times */
+		thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count);
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+			("AVG Thermal Meter = 0x%X, EEPROMthermalmeter = 0x%X\n", thermal_value, priv->pmib->dot11RFEntry.ther));
+	}
+
+	/* 4 Calculate delta, delta_LCK, delta_IQK. */
+	delta = RTL_ABS(thermal_value, priv->pmib->dot11RFEntry.ther);
+	delta_LCK = RTL_ABS(thermal_value, p_dm_odm->rf_calibrate_info.thermal_value_lck);
+	delta_IQK = RTL_ABS(thermal_value, p_dm_odm->rf_calibrate_info.thermal_value_iqk);
+	is_increase = ((thermal_value < priv->pmib->dot11RFEntry.ther) ? 0 : 1);
+
+	/* 4 if necessary, do LCK. */
+	if (!(p_dm_odm->support_ic_type & ODM_RTL8821)) {
+		if (delta_LCK > c.threshold_iqk) {
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk));
+			p_dm_odm->rf_calibrate_info.thermal_value_lck = thermal_value;
+
+			/*Use RTLCK, so close power tracking driver LCK*/
+#if (RTL8814A_SUPPORT != 1)
+			if (!(p_dm_odm->support_ic_type & ODM_RTL8814A)) {
+				if (c.phy_lc_calibrate)
+					(*c.phy_lc_calibrate)(p_dm_odm);
+			}
+#endif
+		}
+	}
+
+	if (delta_IQK > c.threshold_iqk) {
+		panic_printk("%s(%d)\n", __FUNCTION__, __LINE__);
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk));
+		p_dm_odm->rf_calibrate_info.thermal_value_iqk = thermal_value;
+		if (c.do_iqk)
+			(*c.do_iqk)(p_dm_odm, true, 0, 0);
+	}
+
+	if (!priv->pmib->dot11RFEntry.ther)	/*Don't do power tracking since no calibrated thermal value*/
+		return;
+
+	/* 4 Do Power Tracking */
+
+	if (is_tssi_enable == true) {
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter PURE TSSI MODE**********\n"));
+		for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++)
+			(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, TSSI_MODE, p, 0);
+	} else if (thermal_value != p_dm_odm->rf_calibrate_info.thermal_value) {
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+			     ("\n******** START POWER TRACKING ********\n"));
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+			("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, p_dm_odm->rf_calibrate_info.thermal_value, priv->pmib->dot11RFEntry.ther));
+
+#ifdef _TRACKING_TABLE_FILE
+		if (priv->pshare->rf_ft_var.pwr_track_file) {
+			if (is_increase) {		/* thermal is higher than base */
+				for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++) {
+					switch (p) {
+					case ODM_RF_PATH_B:
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("delta_swing_table_idx_tup_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta]));
+						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_b[delta];       /* Record delta swing for mix mode power tracking */
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("******Temp is higher and p_dm_odm->absolute_ofdm_swing_idx[ODM_RF_PATH_B] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+						break;
+
+					case ODM_RF_PATH_C:
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("delta_swing_table_idx_tup_c[%d] = %d\n", delta, delta_swing_table_idx_tup_c[delta]));
+						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_c[delta];       /* Record delta swing for mix mode power tracking */
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("******Temp is higher and p_dm_odm->absolute_ofdm_swing_idx[ODM_RF_PATH_C] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+						break;
+
+					case ODM_RF_PATH_D:
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("delta_swing_table_idx_tup_d[%d] = %d\n", delta, delta_swing_table_idx_tup_d[delta]));
+						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_d[delta];       /* Record delta swing for mix mode power tracking */
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("******Temp is higher and p_dm_odm->absolute_ofdm_swing_idx[ODM_RF_PATH_D] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+						break;
+
+					default:
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("delta_swing_table_idx_tup_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta]));
+						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = delta_swing_table_idx_tup_a[delta];        /* Record delta swing for mix mode power tracking */
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("******Temp is higher and p_dm_odm->absolute_ofdm_swing_idx[ODM_RF_PATH_A] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+						break;
+					}
+				}
+			} else {				/* thermal is lower than base */
+				for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++) {
+					switch (p) {
+					case ODM_RF_PATH_B:
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("delta_swing_table_idx_tdown_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta]));
+						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b[delta];        /* Record delta swing for mix mode power tracking */
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("******Temp is lower and p_dm_odm->absolute_ofdm_swing_idx[ODM_RF_PATH_B] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+						break;
+
+					case ODM_RF_PATH_C:
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("delta_swing_table_idx_tdown_c[%d] = %d\n", delta, delta_swing_table_idx_tdown_c[delta]));
+						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_c[delta];        /* Record delta swing for mix mode power tracking */
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("******Temp is lower and p_dm_odm->absolute_ofdm_swing_idx[ODM_RF_PATH_C] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+						break;
+
+					case ODM_RF_PATH_D:
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("delta_swing_table_idx_tdown_d[%d] = %d\n", delta, delta_swing_table_idx_tdown_d[delta]));
+						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_d[delta];        /* Record delta swing for mix mode power tracking */
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("******Temp is lower and p_dm_odm->absolute_ofdm_swing_idx[ODM_RF_PATH_D] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+						break;
+
+					default:
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("delta_swing_table_idx_tdown_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta]));
+						p_rf_calibrate_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a[delta];        /* Record delta swing for mix mode power tracking */
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+							("******Temp is lower and p_dm_odm->absolute_ofdm_swing_idx[ODM_RF_PATH_A] = %d\n", p_rf_calibrate_info->absolute_ofdm_swing_idx[p]));
+						break;
+					}
+				}
+			}
+
+			if (is_increase) {
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> increse power --->\n"));
+				for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++)
+					(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, MIX_MODE, p, 0);
+			} else {
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> decrese power --->\n"));
+				for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++)
+					(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, MIX_MODE, p, 0);
+			}
+		}
+#endif
+
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** END:%s() ********\n", __FUNCTION__));
+		/* update thermal meter value */
+		p_dm_odm->rf_calibrate_info.thermal_value =  thermal_value;
+
+	}
+}
+#endif
+
+#if (RTL8812A_SUPPORT == 1 || RTL8881A_SUPPORT == 1)
+void
+odm_txpowertracking_callback_thermal_meter_jaguar_series(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	unsigned char			thermal_value = 0, delta, delta_LCK, channel, is_decrease;
+	unsigned char			thermal_value_avg_count = 0;
+	unsigned int			thermal_value_avg = 0, reg0x18;
+	unsigned int			bb_swing_reg[4] = {0xc1c, 0xe1c, 0x181c, 0x1a1c};
+	int					ele_D, value32;
+	char					OFDM_index[2], index;
+	unsigned int			i = 0, j = 0, rf_path, max_rf_path = 2, rf;
+	struct rtl8192cd_priv		*priv = p_dm_odm->priv;
+	unsigned char			OFDM_min_index = 7; /* OFDM BB Swing should be less than +2.5dB, which is required by Arthur and Mimic */
+
+
+
+#ifdef MP_TEST
+	if ((OPMODE & WIFI_MP_STATE) || *(p_dm_odm->p_mp_mode)) {
+		channel = priv->pshare->working_channel;
+		if (priv->pshare->mp_txpwr_tracking == false)
+			return;
+	} else
+#endif
+	{
+		channel = (priv->pmib->dot11RFEntry.dot11channel);
+	}
+
+#if RTL8881A_SUPPORT
+	if (p_dm_odm->support_ic_type == ODM_RTL8881A) {
+		max_rf_path = 1;
+		if ((get_bonding_type_8881A() == BOND_8881AM || get_bonding_type_8881A() == BOND_8881AN)
+		    && priv->pshare->rf_ft_var.use_intpa8881A && (*p_dm_odm->p_band_type == ODM_BAND_2_4G))
+			OFDM_min_index = 6;		/* intPA - upper bond set to +3 dB (base: -2 dB)ot11RFEntry.phy_band_select == PHY_BAND_2G)) */
+		else
+			OFDM_min_index = 10;		/* OFDM BB Swing should be less than +1dB, which is required by Arthur and Mimic */
+	}
+#endif
+
+
+	thermal_value = (unsigned char)phy_query_rf_reg(priv, RF_PATH_A, 0x42, 0xfc00, 1); /* 0x42: RF Reg[15:10] 88E */
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther));
+
+
+	/* 4 Query OFDM BB swing default setting 	Bit[31:21] */
+	for (rf_path = 0 ; rf_path < max_rf_path ; rf_path++) {
+		ele_D = phy_query_bb_reg(priv, bb_swing_reg[rf_path], 0xffe00000);
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0x%x:0x%x ([31:21] = 0x%x)\n", bb_swing_reg[rf_path], phy_query_bb_reg(priv, bb_swing_reg[rf_path], MASKDWORD), ele_D));
+		for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) {/* 4 */
+			if (ele_D == ofdm_swing_table_8812[i]) {
+				OFDM_index[rf_path] = (unsigned char)i;
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("OFDM_index[%d]=%d\n", rf_path, OFDM_index[rf_path]));
+				break;
+			}
+		}
+	}
+#if 0
+	/* Query OFDM path A default setting 	Bit[31:21] */
+	ele_D = phy_query_bb_reg(priv, 0xc1c, 0xffe00000);
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0xc1c:0x%x ([31:21] = 0x%x)\n", phy_query_bb_reg(priv, 0xc1c, MASKDWORD), ele_D));
+	for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) {/* 4 */
+		if (ele_D == ofdm_swing_table_8812[i]) {
+			OFDM_index[0] = (unsigned char)i;
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("OFDM_index[0]=%d\n", OFDM_index[0]));
+			break;
+		}
+	}
+	/* Query OFDM path B default setting */
+	if (rf == 2) {
+		ele_D = phy_query_bb_reg(priv, 0xe1c, 0xffe00000);
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("0xe1c:0x%x ([32:21] = 0x%x)\n", phy_query_bb_reg(priv, 0xe1c, MASKDWORD), ele_D));
+		for (i = 0; i < OFDM_TABLE_SIZE_8812; i++) {
+			if (ele_D == ofdm_swing_table_8812[i]) {
+				OFDM_index[1] = (unsigned char)i;
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("OFDM_index[1]=%d\n", OFDM_index[1]));
+				break;
+			}
+		}
+	}
+#endif
+	/* Initialize */
+	if (!priv->pshare->thermal_value) {
+		priv->pshare->thermal_value = priv->pmib->dot11RFEntry.ther;
+		priv->pshare->thermal_value_lck = thermal_value;
+	}
+
+	/* calculate average thermal meter */
+	{
+		priv->pshare->thermal_value_avg_8812[priv->pshare->thermal_value_avg_index_8812] = thermal_value;
+		priv->pshare->thermal_value_avg_index_8812++;
+		if (priv->pshare->thermal_value_avg_index_8812 == AVG_THERMAL_NUM_8812)
+			priv->pshare->thermal_value_avg_index_8812 = 0;
+
+		for (i = 0; i < AVG_THERMAL_NUM_8812; i++) {
+			if (priv->pshare->thermal_value_avg_8812[i]) {
+				thermal_value_avg += priv->pshare->thermal_value_avg_8812[i];
+				thermal_value_avg_count++;
+			}
+		}
+
+		if (thermal_value_avg_count) {
+			thermal_value = (unsigned char)(thermal_value_avg / thermal_value_avg_count);
+			/* printk("AVG Thermal Meter = 0x%x\n", thermal_value); */
+		}
+	}
+
+
+	/* 4 If necessary,  do power tracking */
+
+	if (!priv->pmib->dot11RFEntry.ther) /*Don't do power tracking since no calibrated thermal value*/
+		return;
+
+	if (thermal_value != priv->pshare->thermal_value) {
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** START POWER TRACKING ********\n"));
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", thermal_value, priv->pshare->thermal_value, priv->pmib->dot11RFEntry.ther));
+		delta = RTL_ABS(thermal_value, priv->pmib->dot11RFEntry.ther);
+		delta_LCK = RTL_ABS(thermal_value, priv->pshare->thermal_value_lck);
+		is_decrease = ((thermal_value < priv->pmib->dot11RFEntry.ther) ? 1 : 0);
+		/* if (*p_dm_odm->p_band_type == ODM_BAND_5G) */
+		{
+#ifdef _TRACKING_TABLE_FILE
+			if (priv->pshare->rf_ft_var.pwr_track_file) {
+				for (rf_path = 0; rf_path < max_rf_path; rf_path++) {
+					ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("diff: (%s)%d ==> get index from table : %d)\n", (is_decrease ? "-" : "+"), delta, get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0)));
+					if (is_decrease) {
+						OFDM_index[rf_path] = priv->pshare->OFDM_index0[rf_path] + get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0);
+						OFDM_index[rf_path] = ((OFDM_index[rf_path] > (OFDM_TABLE_SIZE_8812 - 1)) ? (OFDM_TABLE_SIZE_8812 - 1) : OFDM_index[rf_path]);
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> decrese power ---> new OFDM_INDEX:%d (%d + %d)\n", OFDM_index[rf_path], priv->pshare->OFDM_index0[rf_path], get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0)));
+#if 0/* RTL8881A_SUPPORT */
+						if (p_dm_odm->support_ic_type == ODM_RTL8881A) {
+							if (priv->pshare->rf_ft_var.pwrtrk_tx_agc_enable) {
+								if (priv->pshare->add_tx_agc) { /* tx_agc has been added */
+									add_tx_power88xx_ac(priv, 0);
+									priv->pshare->add_tx_agc = 0;
+									priv->pshare->add_tx_agc_index = 0;
+								}
+							}
+						}
+#endif
+					} else {
+
+						OFDM_index[rf_path] = priv->pshare->OFDM_index0[rf_path] - get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0);
+#if 0/* RTL8881A_SUPPORT */
+						if (p_dm_odm->support_ic_type == ODM_RTL8881A) {
+							if (priv->pshare->rf_ft_var.pwrtrk_tx_agc_enable) {
+								if (OFDM_index[i] < OFDM_min_index) {
+									priv->pshare->add_tx_agc_index = (OFDM_min_index - OFDM_index[i]) / 2; /* Calculate Remnant tx_agc value,  2 index for 1 tx_agc */
+									add_tx_power88xx_ac(priv, priv->pshare->add_tx_agc_index);
+									priv->pshare->add_tx_agc = 1;     /* add_tx_agc Flag = 1 */
+									OFDM_index[i] = OFDM_min_index;
+								} else {
+									if (priv->pshare->add_tx_agc) { /* tx_agc been added */
+										priv->pshare->add_tx_agc = 0;
+										priv->pshare->add_tx_agc_index = 0;
+										add_tx_power88xx_ac(priv, 0); /* minus the added TPI */
+									}
+								}
+							}
+						}
+#else
+						OFDM_index[rf_path] = ((OFDM_index[rf_path] < OFDM_min_index) ?  OFDM_min_index : OFDM_index[rf_path]);
+#endif
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, (">>> increse power ---> new OFDM_INDEX:%d (%d - %d)\n", OFDM_index[rf_path], priv->pshare->OFDM_index0[rf_path], get_tx_tracking_index(priv, channel, rf_path, delta, is_decrease, 0)));
+					}
+				}
+			}
+#endif
+			/* 4 Set new BB swing index */
+			for (rf_path = 0; rf_path < max_rf_path; rf_path++) {
+				phy_set_bb_reg(priv, bb_swing_reg[rf_path], 0xffe00000, ofdm_swing_table_8812[(unsigned int)OFDM_index[rf_path]]);
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Readback 0x%x[31:21] = 0x%x, OFDM_index:%d\n", bb_swing_reg[rf_path], phy_query_bb_reg(priv, bb_swing_reg[rf_path], 0xffe00000), OFDM_index[rf_path]));
+			}
+
+		}
+		if (delta_LCK > 8) {
+			RTL_W8(0x522, 0xff);
+			reg0x18 = phy_query_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, 1);
+			phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 1);
+			phy_set_rf_reg(priv, RF_PATH_A, 0x18, BIT(15), 1);
+			delay_ms(200); /* frequency deviation */
+			phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 0);
+			phy_set_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, reg0x18);
+#ifdef CONFIG_RTL_8812_SUPPORT
+			if (GET_CHIP_VER(priv) == VERSION_8812E)
+				update_bbrf_val8812(priv, priv->pmib->dot11RFEntry.dot11channel);
+#endif
+			RTL_W8(0x522, 0x0);
+			priv->pshare->thermal_value_lck = thermal_value;
+		}
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("\n******** END:%s() ********\n", __FUNCTION__));
+
+		/* update thermal meter value */
+		priv->pshare->thermal_value = thermal_value;
+		for (rf_path = 0; rf_path < max_rf_path; rf_path++)
+			priv->pshare->OFDM_index[rf_path] = OFDM_index[rf_path];
+	}
+}
+
+#endif
+
+
+void
+odm_txpowertracking_callback_thermal_meter(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
+
+
+#if (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1)
+	if (p_dm_odm->support_ic_type == ODM_RTL8197F || p_dm_odm->support_ic_type == ODM_RTL8822B) {
+		odm_txpowertracking_callback_thermal_meter_jaguar_series3(p_dm_odm);
+		return;
+	}
+#endif
+#if (RTL8814A_SUPPORT == 1)		/*use this function to do power tracking after 8814 by YuChen*/
+	if (p_dm_odm->support_ic_type & ODM_RTL8814A) {
+		odm_txpowertracking_callback_thermal_meter_jaguar_series2(p_dm_odm);
+		return;
+	}
+#endif
+#if (RTL8881A_SUPPORT || RTL8812A_SUPPORT == 1)
+	if (p_dm_odm->support_ic_type & ODM_RTL8812 || p_dm_odm->support_ic_type & ODM_RTL8881A) {
+		odm_txpowertracking_callback_thermal_meter_jaguar_series(p_dm_odm);
+		return;
+	}
+#endif
+
+#if (RTL8192E_SUPPORT == 1)
+	if (p_dm_odm->support_ic_type == ODM_RTL8192E) {
+		odm_txpowertracking_callback_thermal_meter_92e(p_dm_odm);
+		return;
+	}
+#endif
+
+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
+	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
+	/* PMGNT_INFO      		p_mgnt_info = &adapter->mgnt_info; */
+#endif
+
+
+	u8			thermal_value = 0, delta, delta_LCK, delta_IQK, offset;
+	u8			thermal_value_avg_count = 0;
+	u32			thermal_value_avg = 0;
+	/*	s32			ele_A=0, ele_D, TempCCk, X, value32;
+	 *	s32			Y, ele_C=0;
+	 *	s8			OFDM_index[2], CCK_index=0, OFDM_index_old[2]={0,0}, CCK_index_old=0, index;
+	 *	s8			deltaPowerIndex = 0; */
+	u32			i = 0;/* , j = 0; */
+	boolean		is2T = false;
+	/*	bool 		bInteralPA = false; */
+
+	u8			OFDM_max_index = 34, rf = (is2T) ? 2 : 1; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */
+	u8			indexforchannel = 0;/*get_right_chnl_place_for_iqk(p_hal_data->current_channel)*/
+	enum            _POWER_DEC_INC { POWER_DEC, POWER_INC };
+
+	struct _TXPWRTRACK_CFG	c;
+
+
+	/* 4 1. The following TWO tables decide the final index of OFDM/CCK swing table. */
+	s8			delta_swing_table_idx[2][index_mapping_NUM_88E] = {
+		/* {{Power decreasing(lower temperature)}, {Power increasing(higher temperature)}} */
+		{0, 0, 2, 3, 4, 4, 5, 6, 7, 7, 8, 9, 10, 10, 11}, {0, 0, 1, 2, 3, 4, 4, 4, 4, 5, 7, 8, 9, 9, 10}
+	};
+	u8			thermal_threshold[2][index_mapping_NUM_88E] = {
+		/* {{Power decreasing(lower temperature)}, {Power increasing(higher temperature)}} */
+		{0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 27}, {0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 25, 25, 25}
+	};
+
+#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
+	struct rtl8192cd_priv	*priv = p_dm_odm->priv;
+#endif
+
+	/* 4 2. Initilization ( 7 steps in total ) */
+
+	configure_txpower_track(p_dm_odm, &c);
+
+	p_dm_odm->rf_calibrate_info.txpowertracking_callback_cnt++; /* cosa add for debug */
+	p_dm_odm->rf_calibrate_info.is_txpowertracking_init = true;
+
+#if (MP_DRIVER == 1)
+	p_dm_odm->rf_calibrate_info.txpowertrack_control = p_hal_data->txpowertrack_control; /* <Kordan> We should keep updating the control variable according to HalData.
+     * <Kordan> rf_calibrate_info.rega24 will be initialized when ODM HW configuring, but MP configures with para files. */
+	p_dm_odm->rf_calibrate_info.rega24 = 0x090e1317;
+#endif
+
+#if (DM_ODM_SUPPORT_TYPE == ODM_AP) && defined(MP_TEST)
+	if ((OPMODE & WIFI_MP_STATE) || *(p_dm_odm->p_mp_mode)) {
+		if (p_dm_odm->priv->pshare->mp_txpwr_tracking == false)
+			return;
+	}
+#endif
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("===>odm_txpowertracking_callback_thermal_meter_8188e, p_dm_odm->bb_swing_idx_cck_base: %d, p_dm_odm->bb_swing_idx_ofdm_base: %d\n", p_rf_calibrate_info->bb_swing_idx_cck_base, p_rf_calibrate_info->bb_swing_idx_ofdm_base));
+	/*
+		if (!p_dm_odm->rf_calibrate_info.tm_trigger) {
+			odm_set_rf_reg(p_dm_odm, RF_PATH_A, c.thermal_reg_addr, BIT(17) | BIT(16), 0x3);
+			p_dm_odm->rf_calibrate_info.tm_trigger = 1;
+			return;
+		}
+	*/
+	thermal_value = (u8)odm_get_rf_reg(p_dm_odm, RF_PATH_A, c.thermal_reg_addr, 0xfc00);	/* 0x42: RF Reg[15:10] 88E */
+#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
+	if (!thermal_value || !p_dm_odm->rf_calibrate_info.txpowertrack_control)
+#else
+	if (!p_dm_odm->rf_calibrate_info.txpowertrack_control)
+#endif
+		return;
+
+	/* 4 3. Initialize ThermalValues of rf_calibrate_info */
+
+	if (!p_dm_odm->rf_calibrate_info.thermal_value) {
+		p_dm_odm->rf_calibrate_info.thermal_value_lck = thermal_value;
+		p_dm_odm->rf_calibrate_info.thermal_value_iqk = thermal_value;
+	}
+
+	if (p_dm_odm->rf_calibrate_info.is_reloadtxpowerindex)
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("reload ofdm index for band switch\n"));
+
+	/* 4 4. Calculate average thermal meter */
+
+	p_dm_odm->rf_calibrate_info.thermal_value_avg[p_dm_odm->rf_calibrate_info.thermal_value_avg_index] = thermal_value;
+	p_dm_odm->rf_calibrate_info.thermal_value_avg_index++;
+	if (p_dm_odm->rf_calibrate_info.thermal_value_avg_index == c.average_thermal_num)
+		p_dm_odm->rf_calibrate_info.thermal_value_avg_index = 0;
+
+	for (i = 0; i < c.average_thermal_num; i++) {
+		if (p_dm_odm->rf_calibrate_info.thermal_value_avg[i]) {
+			thermal_value_avg += p_dm_odm->rf_calibrate_info.thermal_value_avg[i];
+			thermal_value_avg_count++;
+		}
+	}
+
+	if (thermal_value_avg_count) {
+		/* Give the new thermo value a weighting */
+		thermal_value_avg += (thermal_value * 4);
+
+		thermal_value = (u8)(thermal_value_avg / (thermal_value_avg_count + 4));
+		p_rf_calibrate_info->thermal_value_delta = thermal_value - priv->pmib->dot11RFEntry.ther;
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("AVG Thermal Meter = 0x%x\n", thermal_value));
+	}
+
+	/* 4 5. Calculate delta, delta_LCK, delta_IQK. */
+
+	delta	  = (thermal_value > p_dm_odm->rf_calibrate_info.thermal_value) ? (thermal_value - p_dm_odm->rf_calibrate_info.thermal_value) : (p_dm_odm->rf_calibrate_info.thermal_value - thermal_value);
+	delta_LCK = (thermal_value > p_dm_odm->rf_calibrate_info.thermal_value_lck) ? (thermal_value - p_dm_odm->rf_calibrate_info.thermal_value_lck) : (p_dm_odm->rf_calibrate_info.thermal_value_lck - thermal_value);
+	delta_IQK = (thermal_value > p_dm_odm->rf_calibrate_info.thermal_value_iqk) ? (thermal_value - p_dm_odm->rf_calibrate_info.thermal_value_iqk) : (p_dm_odm->rf_calibrate_info.thermal_value_iqk - thermal_value);
+
+	/* 4 6. If necessary, do LCK. */
+	if (!(p_dm_odm->support_ic_type & ODM_RTL8821)) {
+		/*if((delta_LCK > p_hal_data->delta_lck) && (p_hal_data->delta_lck != 0))*/
+		if (delta_LCK >= c.threshold_iqk) {
+			/*Delta temperature is equal to or larger than 20 centigrade.*/
+			p_dm_odm->rf_calibrate_info.thermal_value_lck = thermal_value;
+			(*c.phy_lc_calibrate)(p_dm_odm);
+		}
+	}
+
+	/* 3 7. If necessary, move the index of swing table to adjust Tx power. */
+
+	if (delta > 0 && p_dm_odm->rf_calibrate_info.txpowertrack_control) {
+
+		delta = (thermal_value > p_dm_odm->priv->pmib->dot11RFEntry.ther) ? (thermal_value - p_dm_odm->priv->pmib->dot11RFEntry.ther) : (p_dm_odm->priv->pmib->dot11RFEntry.ther - thermal_value);
+
+		/* 4 7.1 The Final Power index = BaseIndex + power_index_offset */
+
+		if (thermal_value > p_dm_odm->priv->pmib->dot11RFEntry.ther) {
+			CALCULATE_SWINGTALBE_OFFSET(offset, POWER_INC, index_mapping_NUM_88E, delta);
+			p_dm_odm->rf_calibrate_info.delta_power_index_last = p_dm_odm->rf_calibrate_info.delta_power_index;
+			p_dm_odm->rf_calibrate_info.delta_power_index =  delta_swing_table_idx[POWER_INC][offset];
+
+		} else {
+
+			CALCULATE_SWINGTALBE_OFFSET(offset, POWER_DEC, index_mapping_NUM_88E, delta);
+			p_dm_odm->rf_calibrate_info.delta_power_index_last = p_dm_odm->rf_calibrate_info.delta_power_index;
+			p_dm_odm->rf_calibrate_info.delta_power_index = (-1) * delta_swing_table_idx[POWER_DEC][offset];
+		}
+
+		if (p_dm_odm->rf_calibrate_info.delta_power_index == p_dm_odm->rf_calibrate_info.delta_power_index_last)
+			p_dm_odm->rf_calibrate_info.power_index_offset = 0;
+		else
+			p_dm_odm->rf_calibrate_info.power_index_offset = p_dm_odm->rf_calibrate_info.delta_power_index - p_dm_odm->rf_calibrate_info.delta_power_index_last;
+
+		for (i = 0; i < rf; i++)
+			p_dm_odm->rf_calibrate_info.OFDM_index[i] = p_rf_calibrate_info->bb_swing_idx_ofdm_base + p_dm_odm->rf_calibrate_info.power_index_offset;
+		p_dm_odm->rf_calibrate_info.CCK_index = p_rf_calibrate_info->bb_swing_idx_cck_base + p_dm_odm->rf_calibrate_info.power_index_offset;
+
+		p_rf_calibrate_info->bb_swing_idx_cck = p_dm_odm->rf_calibrate_info.CCK_index;
+		p_rf_calibrate_info->bb_swing_idx_ofdm[RF_PATH_A] = p_dm_odm->rf_calibrate_info.OFDM_index[RF_PATH_A];
+
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", p_rf_calibrate_info->bb_swing_idx_cck, p_rf_calibrate_info->bb_swing_idx_cck_base, p_dm_odm->rf_calibrate_info.power_index_offset));
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("The 'OFDM' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", p_rf_calibrate_info->bb_swing_idx_ofdm[RF_PATH_A], p_rf_calibrate_info->bb_swing_idx_ofdm_base, p_dm_odm->rf_calibrate_info.power_index_offset));
+
+		/* 4 7.1 Handle boundary conditions of index. */
+
+
+		for (i = 0; i < rf; i++) {
+			if (p_dm_odm->rf_calibrate_info.OFDM_index[i] > OFDM_max_index)
+				p_dm_odm->rf_calibrate_info.OFDM_index[i] = OFDM_max_index;
+			else if (p_dm_odm->rf_calibrate_info.OFDM_index[i] < 0)
+				p_dm_odm->rf_calibrate_info.OFDM_index[i] = 0;
+		}
+
+		if (p_dm_odm->rf_calibrate_info.CCK_index > c.swing_table_size_cck - 1)
+			p_dm_odm->rf_calibrate_info.CCK_index = c.swing_table_size_cck - 1;
+		else if (p_dm_odm->rf_calibrate_info.CCK_index < 0)
+			p_dm_odm->rf_calibrate_info.CCK_index = 0;
+	} else {
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+			("The thermal meter is unchanged or TxPowerTracking OFF: thermal_value: %d, p_dm_odm->rf_calibrate_info.thermal_value: %d)\n", thermal_value, p_dm_odm->rf_calibrate_info.thermal_value));
+		p_dm_odm->rf_calibrate_info.power_index_offset = 0;
+	}
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+		("TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n", p_dm_odm->rf_calibrate_info.CCK_index, p_rf_calibrate_info->bb_swing_idx_cck_base));
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+		("TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index: %d\n", p_dm_odm->rf_calibrate_info.OFDM_index[RF_PATH_A], p_rf_calibrate_info->bb_swing_idx_ofdm_base));
+
+	if (p_dm_odm->rf_calibrate_info.power_index_offset != 0 && p_dm_odm->rf_calibrate_info.txpowertrack_control) {
+		/* 4 7.2 Configure the Swing Table to adjust Tx Power. */
+
+		p_dm_odm->rf_calibrate_info.is_tx_power_changed = true; /* Always true after Tx Power is adjusted by power tracking. */
+		/*  */
+		/* 2012/04/23 MH According to Luke's suggestion, we can not write BB digital */
+		/* to increase TX power. Otherwise, EVM will be bad. */
+		/*  */
+		/* 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. */
+		if (thermal_value > p_dm_odm->rf_calibrate_info.thermal_value) {
+			/* ODM_RT_TRACE(p_dm_odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, */
+			/*	("Temperature Increasing: delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", */
+			/*	p_dm_odm->rf_calibrate_info.power_index_offset, delta, thermal_value, p_hal_data->eeprom_thermal_meter, p_dm_odm->rf_calibrate_info.thermal_value)); */
+		} else if (thermal_value < p_dm_odm->rf_calibrate_info.thermal_value) { /* Low temperature */
+			/* ODM_RT_TRACE(p_dm_odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, */
+			/*	("Temperature Decreasing: delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", */
+			/*		p_dm_odm->rf_calibrate_info.power_index_offset, delta, thermal_value, p_hal_data->eeprom_thermal_meter, p_dm_odm->rf_calibrate_info.thermal_value)); */
+		}
+		if (thermal_value > p_dm_odm->priv->pmib->dot11RFEntry.ther)
+		{
+			/*				ODM_RT_TRACE(p_dm_odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Temperature(%d) hugher than PG value(%d), increases the power by tx_agc\n", thermal_value, p_hal_data->eeprom_thermal_meter)); */
+			(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, TXAGC, 0, 0);
+		} else {
+			/*			ODM_RT_TRACE(p_dm_odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Temperature(%d) lower than PG value(%d), increases the power by tx_agc\n", thermal_value, p_hal_data->eeprom_thermal_meter)); */
+			(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, BBSWING, RF_PATH_A, indexforchannel);
+			if (is2T)
+				(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, BBSWING, RF_PATH_B, indexforchannel);
+		}
+
+		p_rf_calibrate_info->bb_swing_idx_cck_base = p_rf_calibrate_info->bb_swing_idx_cck;
+		p_rf_calibrate_info->bb_swing_idx_ofdm_base = p_rf_calibrate_info->bb_swing_idx_ofdm[RF_PATH_A];
+		p_dm_odm->rf_calibrate_info.thermal_value = thermal_value;
+
+	}
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("<===dm_TXPowerTrackingCallback_ThermalMeter_8188E\n"));
+
+	p_dm_odm->rf_calibrate_info.tx_powercount = 0;
+}
+
+/* 3============================================================
+ * 3 IQ Calibration
+ * 3============================================================ */
+
+void
+odm_reset_iqk_result(
+	void		*p_dm_void
+)
+{
+	return;
+}
+#if 1/* !(DM_ODM_SUPPORT_TYPE & ODM_AP) */
+u8 odm_get_right_chnl_place_for_iqk(u8 chnl)
+{
+	u8	channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = {
+		1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153, 155, 157, 159, 161, 163, 165
+	};
+	u8	place = chnl;
+
+
+	if (chnl > 14) {
+		for (place = 14; place < sizeof(channel_all); place++) {
+			if (channel_all[place] == chnl)
+				return place - 13;
+		}
+	}
+	return 0;
+
+}
+#endif
+
+void
+odm_iq_calibrate(
+	struct PHY_DM_STRUCT	*p_dm_odm
+)
+{
+	if (p_dm_odm->is_linked) {
+		if ((*p_dm_odm->p_channel != p_dm_odm->pre_channel) && (!*p_dm_odm->p_is_scan_in_process)) {
+			p_dm_odm->pre_channel = *p_dm_odm->p_channel;
+			p_dm_odm->linked_interval = 0;
+		}
+
+		if (p_dm_odm->linked_interval < 3)
+			p_dm_odm->linked_interval++;
+
+		if (p_dm_odm->linked_interval == 2) {
+
+#if (RTL8814A_SUPPORT == 1)
+			if (p_dm_odm->support_ic_type == ODM_RTL8814A)
+				phy_iq_calibrate_8814a(p_dm_odm, false);
+#endif
+
+#if (RTL8822B_SUPPORT == 1)
+			if (p_dm_odm->support_ic_type == ODM_RTL8822B)
+				phy_iq_calibrate_8822b(p_dm_odm, false);
+#endif
+
+#if (RTL8821C_SUPPORT == 1)
+			if (p_dm_odm->support_ic_type == ODM_RTL8821C)
+				phy_iq_calibrate_8821c(p_dm_odm, false);
+#endif
+
+#if (RTL8821A_SUPPORT == 1)
+			if (p_dm_odm->support_ic_type == ODM_RTL8821)
+				phy_iq_calibrate_8821a(p_dm_odm, false);
+#endif
+
+#if (RTL8812A_SUPPORT == 1)
+			if (p_dm_odm->support_ic_type == ODM_RTL8812)
+				_phy_iq_calibrate_8812a(p_dm_odm, false);
+#endif
+		}
+	} else
+		p_dm_odm->linked_interval = 0;
+
+}
+
+void phydm_rf_init(void		*p_dm_void)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	odm_txpowertracking_init(p_dm_odm);
+
+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
+#if (RTL8814A_SUPPORT == 1)
+	if (p_dm_odm->support_ic_type & ODM_RTL8814A)
+		phy_iq_calibrate_8814a_init(p_dm_odm);
+#endif
+#endif
+
+}
+
+void phydm_rf_watchdog(void		*p_dm_void)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+	odm_txpowertracking_check(p_dm_odm);
+	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES)
+		odm_iq_calibrate(p_dm_odm);
+#endif
+}
diff --git a/rtl8822BU/hal/phydm/halphyrf_ap.h b/rtl8822BU/hal/phydm/halrf/halphyrf_ap.h
index 30017f1..f3e2eb6 100755..100644
--- a/rtl8822BU/hal/phydm/halphyrf_ap.h
+++ b/rtl8822BU/hal/phydm/halrf/halphyrf_ap.h
@@ -21,17 +21,19 @@
 #ifndef __HAL_PHY_RF_H__
 #define __HAL_PHY_RF_H__
 
-#include "phydm_powertracking_ap.h"
+#include "halrf/halrf_powertracking_ap.h"
+#include "halrf/halrf_kfree.h"
+
 #if (RTL8814A_SUPPORT == 1)
-	#include "rtl8814a/phydm_iqk_8814a.h"
+	#include "halrf/rtl8814a/halrf_iqk_8814a.h"
 #endif
 
 #if (RTL8822B_SUPPORT == 1)
-	#include "rtl8822b/phydm_iqk_8822b.h"
+	#include "halrf/rtl8822b/halrf_iqk_8822b.h"
 #endif
 
 #if (RTL8821C_SUPPORT == 1)
-	#include "rtl8822b/phydm_iqk_8821c.h"
+	#include "halrf/rtl8822b/halrf_iqk_8821c.h"
 #endif
 
 enum pwrtrack_method {
@@ -75,91 +77,38 @@ configure_txpower_track(
 
 void
 odm_txpowertracking_callback_thermal_meter(
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	void		*p_dm_void
-#else
-	struct _ADAPTER	*adapter
-#endif
 );
 
 #if (RTL8192E_SUPPORT == 1)
 void
 odm_txpowertracking_callback_thermal_meter_92e(
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	void		*p_dm_void
-#else
-	struct _ADAPTER	*adapter
-#endif
 );
 #endif
 
 #if (RTL8814A_SUPPORT == 1)
 void
 odm_txpowertracking_callback_thermal_meter_jaguar_series2(
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	void		*p_dm_void
-#else
-	struct _ADAPTER	*adapter
-#endif
 );
 
 #elif ODM_IC_11AC_SERIES_SUPPORT
 void
 odm_txpowertracking_callback_thermal_meter_jaguar_series(
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	void		*p_dm_void
-#else
-	struct _ADAPTER	*adapter
-#endif
 );
 
 #elif (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1)
 void
 odm_txpowertracking_callback_thermal_meter_jaguar_series3(
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	void		*p_dm_void
-#else
-	struct _ADAPTER	*adapter
-#endif
 );
 
 #endif
 
 #define IS_CCK_RATE(_rate)				(ODM_MGN_1M == _rate || _rate == ODM_MGN_2M || _rate == ODM_MGN_5_5M || _rate == ODM_MGN_11M)
 
-
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-#define MAX_TOLERANCE          5
-#define IQK_DELAY_TIME         1               /* ms */
-
-/*
-* BB/MAC/RF other monitor API
-*   */
-
-void	phy_set_monitor_mode8192c(struct _ADAPTER	*p_adapter,
-				  bool		is_enable_monitor_mode);
-
-/*
- * IQ calibrate
- *   */
-void
-phy_iq_calibrate_8192c(struct _ADAPTER	*p_adapter,
-		       bool	is_recovery);
-
-/*
- * LC calibrate
- *   */
-void
-phy_lc_calibrate_8192c(struct _ADAPTER	*p_adapter);
-
-/*
- * AP calibrate
- *   */
-void
-phy_ap_calibrate_8192c(struct _ADAPTER	*p_adapter,
-		       s8		delta);
-#endif
-
 #define ODM_TARGET_CHNL_NUM_2G_5G	59
 
 
diff --git a/rtl8822BU/hal/phydm/halphyrf_ce.c b/rtl8822BU/hal/phydm/halrf/halphyrf_ce.c
index 309c6f3..dcb2e87 100755..100644
--- a/rtl8822BU/hal/phydm/halphyrf_ce.c
+++ b/rtl8822BU/hal/phydm/halrf/halphyrf_ce.c
@@ -83,6 +83,12 @@ void configure_txpower_track(
 	if (p_dm_odm->support_ic_type == ODM_RTL8723D)
 		configure_txpower_track_8723d(p_config);
 #endif
+/* JJ ADD 20161014 */
+#if RTL8710B_SUPPORT
+	if (p_dm_odm->support_ic_type == ODM_RTL8710B)
+		configure_txpower_track_8710b(p_config);
+#endif
+
 #if RTL8822B_SUPPORT
 	if (p_dm_odm->support_ic_type == ODM_RTL8822B)
 		configure_txpower_track_8822b(p_config);
@@ -108,7 +114,12 @@ odm_clear_txpowertracking_state(
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+	struct rtl_efuse *rtlefu = rtl_efuse(rtlpriv);
+#else
 	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(p_dm_odm->adapter);
+#endif
 	u8			p = 0;
 	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
 
@@ -135,7 +146,11 @@ odm_clear_txpowertracking_state(
 	p_rf_calibrate_info->modify_tx_agc_flag_path_c = false;       /*Initial at Modify Tx Scaling mode*/
 	p_rf_calibrate_info->modify_tx_agc_flag_path_d = false;       /*Initial at Modify Tx Scaling mode*/
 	p_rf_calibrate_info->remnant_cck_swing_idx = 0;
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	p_rf_calibrate_info->thermal_value = rtlefu->eeprom_thermalmeter;
+#else
 	p_rf_calibrate_info->thermal_value = p_hal_data->eeprom_thermal_meter;
+#endif
 
 	p_rf_calibrate_info->modify_tx_agc_value_cck = 0;			/* modify by Mingzhi.Guo */
 	p_rf_calibrate_info->modify_tx_agc_value_ofdm = 0;		/* modify by Mingzhi.Guo */
@@ -146,16 +161,23 @@ void
 odm_txpowertracking_callback_thermal_meter(
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	struct PHY_DM_STRUCT		*p_dm_odm
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	void	*p_dm_void
 #else
 	struct _ADAPTER	*adapter
 #endif
 )
 {
 
-#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+	struct rtl_efuse *rtlefu = rtl_efuse(rtlpriv);
+	void *adapter = p_dm_odm->adapter;
+#elif !(DM_ODM_SUPPORT_TYPE & ODM_AP)
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->odmpriv;
 #endif
@@ -170,8 +192,13 @@ odm_txpowertracking_callback_thermal_meter(
 
 	u8			OFDM_min_index = 0;  /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */
 	u8			indexforchannel = 0; /* get_right_chnl_place_for_iqk(p_hal_data->current_channel) */
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	u8			power_tracking_type = 0;	/* no specify type */
+#else
 	u8			power_tracking_type = p_hal_data->rf_power_tracking_type;
+#endif
 	u8			xtal_offset_eanble = 0;
+	s8			thermal_value_temp = 0;
 
 	struct _TXPWRTRACK_CFG	c;
 
@@ -199,8 +226,8 @@ odm_txpowertracking_callback_thermal_meter(
 	if (p_dm_odm->support_ic_type & ODM_RTL8814A)	/*for 8814 path C & D*/
 		(*c.get_delta_swing_table8814only)(p_dm_odm, (u8 **)&delta_swing_table_idx_tup_c, (u8 **)&delta_swing_table_idx_tdown_c,
 			(u8 **)&delta_swing_table_idx_tup_d, (u8 **)&delta_swing_table_idx_tdown_d);
-
-	if (p_dm_odm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D))	/*for Xtal Offset*/
+	/* JJ ADD 20161014 */
+	if (p_dm_odm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B))	/*for Xtal Offset*/
 		(*c.get_delta_swing_xtal_table)(p_dm_odm, (s8 **)&delta_swing_table_xtal_up, (s8 **)&delta_swing_table_xtal_down);
 
 	p_rf_calibrate_info->txpowertracking_callback_cnt++;	/*cosa add for debug*/
@@ -214,7 +241,7 @@ odm_txpowertracking_callback_thermal_meter(
 	p_rf_calibrate_info->rega24 = 0x090e1317;
 #endif
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	if (p_dm_odm->mp_mode == true)
+	if (*(p_dm_odm->p_mp_mode) == true)
 		p_rf_calibrate_info->rega24 = 0x090e1317;
 #endif
 
@@ -222,10 +249,28 @@ odm_txpowertracking_callback_thermal_meter(
 		("===>odm_txpowertracking_callback_thermal_meter\n p_rf_calibrate_info->bb_swing_idx_cck_base: %d, p_rf_calibrate_info->bb_swing_idx_ofdm_base[A]: %d, p_rf_calibrate_info->default_ofdm_index: %d\n",
 		p_rf_calibrate_info->bb_swing_idx_cck_base, p_rf_calibrate_info->bb_swing_idx_ofdm_base[ODM_RF_PATH_A], p_rf_calibrate_info->default_ofdm_index));
 
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+		("p_rf_calibrate_info->txpowertrack_control=%d,  rtlefu->eeprom_thermalmeter %d\n", p_rf_calibrate_info->txpowertrack_control,  rtlefu->eeprom_thermalmeter));
+#else
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
 		("p_rf_calibrate_info->txpowertrack_control=%d,  p_hal_data->eeprom_thermal_meter %d\n", p_rf_calibrate_info->txpowertrack_control,  p_hal_data->eeprom_thermal_meter));
+#endif
+
 	thermal_value = (u8)odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, c.thermal_reg_addr, 0xfc00);	/* 0x42: RF Reg[15:10] 88E */
 
+	thermal_value_temp = thermal_value + phydm_get_thermal_offset(p_dm_odm);
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+		("thermal_value_temp(%d) = thermal_value(%d) + power_trim_thermal(%d)\n", thermal_value_temp, thermal_value, phydm_get_thermal_offset(p_dm_odm)));
+
+	if (thermal_value_temp > 63)
+		thermal_value = 63;
+	else if (thermal_value_temp < 0)
+		thermal_value = 0;
+	else
+		thermal_value = thermal_value_temp;
+
 	/*add log by zhao he, check c80/c94/c14/ca0 value*/
 	if (p_dm_odm->support_ic_type == ODM_RTL8723D) {
 		regc80 = odm_get_bb_reg(p_dm_odm, 0xc80, MASKDWORD);
@@ -234,10 +279,22 @@ odm_txpowertracking_callback_thermal_meter(
 		regab4 = odm_get_bb_reg(p_dm_odm, 0xab4, 0x000007FF);
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4));
 	}
+	/* JJ ADD 20161014 */
+	if (p_dm_odm->support_ic_type == ODM_RTL8710B) {
+		regc80 = odm_get_bb_reg(p_dm_odm, 0xc80, MASKDWORD);
+		regcd0 = odm_get_bb_reg(p_dm_odm, 0xcd0, MASKDWORD);
+		regcd4 = odm_get_bb_reg(p_dm_odm, 0xcd4, MASKDWORD);
+		regab4 = odm_get_bb_reg(p_dm_odm, 0xab4, 0x000007FF);
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4));
+	}
 
 	if (!p_rf_calibrate_info->txpowertrack_control)
 		return;
 
+	if (p_hal_data->eeprom_thermal_meter == 0xff) {
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no pg, p_hal_data->eeprom_thermal_meter = 0x%x\n", p_hal_data->eeprom_thermal_meter));
+		return;
+	}
 
 	/*4 3. Initialize ThermalValues of rf_calibrate_info*/
 
@@ -260,9 +317,15 @@ odm_txpowertracking_callback_thermal_meter(
 
 	if (thermal_value_avg_count) {            /* Calculate Average thermal_value after average enough times */
 		thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count);
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+		p_rf_calibrate_info->thermal_value_delta = thermal_value - rtlefu->eeprom_thermalmeter;
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+			("AVG Thermal Meter = 0x%X, EFUSE Thermal base = 0x%X\n", thermal_value, rtlefu->eeprom_thermalmeter));
+#else
 		p_rf_calibrate_info->thermal_value_delta = thermal_value - p_hal_data->eeprom_thermal_meter;
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
 			("AVG Thermal Meter = 0x%X, EFUSE Thermal base = 0x%X\n", thermal_value, p_hal_data->eeprom_thermal_meter));
+#endif
 	}
 
 	/* 4 5. Calculate delta, delta_LCK, delta_IQK. */
@@ -289,24 +352,23 @@ odm_txpowertracking_callback_thermal_meter(
 			p_rf_calibrate_info->thermal_value_lck = thermal_value;
 
 			/*Use RTLCK, so close power tracking driver LCK*/
-			if (!(p_dm_odm->support_ic_type & ODM_RTL8814A)) {
-				if (c.phy_lc_calibrate)
-					(*c.phy_lc_calibrate)(p_dm_odm);
-			}
+			if (!(p_dm_odm->support_ic_type & ODM_RTL8814A) && c.phy_lc_calibrate)
+				(*c.phy_lc_calibrate)(p_dm_odm);
 
 			delta_LCK = (thermal_value > p_rf_calibrate_info->thermal_value_lck) ? (thermal_value - p_rf_calibrate_info->thermal_value_lck) : (p_rf_calibrate_info->thermal_value_lck - thermal_value);
 		}
 
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK));
 
-		/* Delta temperature is equal to or larger than 20 centigrade.*/
-		if (delta_LCK >= c.threshold_iqk) {
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk));
-			p_rf_calibrate_info->thermal_value_lck = thermal_value;
+		/* Wait sacn to do LCK by RF Jenyu*/
+		if (*p_dm_odm->p_is_scan_in_process == false) {
+			/* Delta temperature is equal to or larger than 20 centigrade.*/
+			if (delta_LCK >= c.threshold_iqk) {
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk));
+				p_rf_calibrate_info->thermal_value_lck = thermal_value;
 
-			/*Use RTLCK, so close power tracking driver LCK*/
-			if (!(p_dm_odm->support_ic_type & ODM_RTL8814A)) {
-				if (c.phy_lc_calibrate)
+				/*Use RTLCK, so close power tracking driver LCK*/
+				if (!(p_dm_odm->support_ic_type & ODM_RTL8814A) && c.phy_lc_calibrate)
 					(*c.phy_lc_calibrate)(p_dm_odm);
 			}
 		}
@@ -317,7 +379,11 @@ odm_txpowertracking_callback_thermal_meter(
 	if (delta > 0 && p_rf_calibrate_info->txpowertrack_control) {
 		/* "delta" here is used to record the absolute value of differrence. */
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+		delta = thermal_value > rtlefu->eeprom_thermalmeter ? (thermal_value - rtlefu->eeprom_thermalmeter) : (rtlefu->eeprom_thermalmeter - thermal_value);
+#else
 		delta = thermal_value > p_hal_data->eeprom_thermal_meter ? (thermal_value - p_hal_data->eeprom_thermal_meter) : (p_hal_data->eeprom_thermal_meter - thermal_value);
+#endif
 #else
 		delta = (thermal_value > p_dm_odm->priv->pmib->dot11RFEntry.ther) ? (thermal_value - p_dm_odm->priv->pmib->dot11RFEntry.ther) : (p_dm_odm->priv->pmib->dot11RFEntry.ther - thermal_value);
 #endif
@@ -327,7 +393,11 @@ odm_txpowertracking_callback_thermal_meter(
 		/*4 7.1 The Final Power index = BaseIndex + power_index_offset*/
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+		if (thermal_value > rtlefu->eeprom_thermalmeter) {
+#else
 		if (thermal_value > p_hal_data->eeprom_thermal_meter) {
+#endif
 #else
 		if (thermal_value > p_dm_odm->priv->pmib->dot11RFEntry.ther) {
 #endif
@@ -376,18 +446,14 @@ odm_txpowertracking_callback_thermal_meter(
 					break;
 				}
 			}
-
-			if (p_dm_odm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D)) {
+			/* JJ ADD 20161014 */
+			if (p_dm_odm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) {
 				/*Save xtal_offset from Xtal table*/
 				p_rf_calibrate_info->xtal_offset_last = p_rf_calibrate_info->xtal_offset;	/*recording last Xtal offset*/
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
 					("[Xtal] delta_swing_table_xtal_up[%d] = %d\n", delta, delta_swing_table_xtal_up[delta]));
 				p_rf_calibrate_info->xtal_offset = delta_swing_table_xtal_up[delta];
-
-				if (p_rf_calibrate_info->xtal_offset_last == p_rf_calibrate_info->xtal_offset)
-					xtal_offset_eanble = 0;
-				else
-					xtal_offset_eanble = 1;
+				xtal_offset_eanble = (p_rf_calibrate_info->xtal_offset_last != p_rf_calibrate_info->xtal_offset);
 			}
 
 		} else {
@@ -432,18 +498,14 @@ odm_txpowertracking_callback_thermal_meter(
 					break;
 				}
 			}
-
-			if (p_dm_odm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D)) {
+			/* JJ ADD 20161014 */
+			if (p_dm_odm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) {
 				/*Save xtal_offset from Xtal table*/
 				p_rf_calibrate_info->xtal_offset_last = p_rf_calibrate_info->xtal_offset;	/*recording last Xtal offset*/
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
 					("[Xtal] delta_swing_table_xtal_down[%d] = %d\n", delta, delta_swing_table_xtal_down[delta]));
 				p_rf_calibrate_info->xtal_offset = delta_swing_table_xtal_down[delta];
-
-				if (p_rf_calibrate_info->xtal_offset_last == p_rf_calibrate_info->xtal_offset)
-					xtal_offset_eanble = 0;
-				else
-					xtal_offset_eanble = 1;
+				xtal_offset_eanble = (p_rf_calibrate_info->xtal_offset_last != p_rf_calibrate_info->xtal_offset);
 			}
 
 		}
@@ -533,7 +595,11 @@ odm_txpowertracking_callback_thermal_meter(
 		p_rf_calibrate_info->power_index_offset[ODM_RF_PATH_B] != 0 ||
 		p_rf_calibrate_info->power_index_offset[ODM_RF_PATH_C] != 0 ||
 		p_rf_calibrate_info->power_index_offset[ODM_RF_PATH_D] != 0) &&
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+		p_rf_calibrate_info->txpowertrack_control && (rtlefu->eeprom_thermalmeter != 0xff)) {
+#else
 		p_rf_calibrate_info->txpowertrack_control && (p_hal_data->eeprom_thermal_meter != 0xff)) {
+#endif
 		/* 4 7.2 Configure the Swing Table to adjust Tx Power. */
 
 		p_rf_calibrate_info->is_tx_power_changed = true;	/*Always true after Tx Power is adjusted by power tracking.*/
@@ -544,31 +610,52 @@ odm_txpowertracking_callback_thermal_meter(
 		/* 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. */
 		if (thermal_value > p_rf_calibrate_info->thermal_value) {
 			for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++) {
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+					("Temperature Increasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
+					p, p_rf_calibrate_info->power_index_offset[p], delta, thermal_value, rtlefu->eeprom_thermalmeter, p_rf_calibrate_info->thermal_value));
+#else
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
 					("Temperature Increasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
 					p, p_rf_calibrate_info->power_index_offset[p], delta, thermal_value, p_hal_data->eeprom_thermal_meter, p_rf_calibrate_info->thermal_value));
+#endif
 			}
 		} else if (thermal_value < p_rf_calibrate_info->thermal_value) {	/*Low temperature*/
 			for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++) {
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+					("Temperature Decreasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
+					p, p_rf_calibrate_info->power_index_offset[p], delta, thermal_value, rtlefu->eeprom_thermalmeter, p_rf_calibrate_info->thermal_value));
+#else
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
 					("Temperature Decreasing(%d): delta_pi: %d, delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
 					p, p_rf_calibrate_info->power_index_offset[p], delta, thermal_value, p_hal_data->eeprom_thermal_meter, p_rf_calibrate_info->thermal_value));
+#endif
 			}
 		}
 
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+		if (thermal_value > rtlefu->eeprom_thermalmeter)
+#else
 		if (thermal_value > p_hal_data->eeprom_thermal_meter)
+#endif
 #else
 		if (thermal_value > p_dm_odm->priv->pmib->dot11RFEntry.ther)
 #endif
 		{
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+				("Temperature(%d) higher than PG value(%d)\n", thermal_value, rtlefu->eeprom_thermalmeter));
+#else
 			ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
 				("Temperature(%d) higher than PG value(%d)\n", thermal_value, p_hal_data->eeprom_thermal_meter));
+#endif
 
 			if (p_dm_odm->support_ic_type == ODM_RTL8188E || p_dm_odm->support_ic_type == ODM_RTL8192E || p_dm_odm->support_ic_type == ODM_RTL8821 ||
 			    p_dm_odm->support_ic_type == ODM_RTL8812 || p_dm_odm->support_ic_type == ODM_RTL8723B || p_dm_odm->support_ic_type == ODM_RTL8814A ||
 			    p_dm_odm->support_ic_type == ODM_RTL8703B || p_dm_odm->support_ic_type == ODM_RTL8188F || p_dm_odm->support_ic_type == ODM_RTL8822B ||
-			    p_dm_odm->support_ic_type == ODM_RTL8723D || p_dm_odm->support_ic_type == ODM_RTL8821C) {
+			    p_dm_odm->support_ic_type == ODM_RTL8723D || p_dm_odm->support_ic_type == ODM_RTL8821C || p_dm_odm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */
 
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n"));
 				for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++)
@@ -579,13 +666,18 @@ odm_txpowertracking_callback_thermal_meter(
 					(*c.odm_tx_pwr_track_set_pwr)(p_dm_odm, BBSWING, p, indexforchannel);
 			}
 		} else {
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+				("Temperature(%d) lower than PG value(%d)\n", thermal_value, rtlefu->eeprom_thermalmeter));
+#else
 			ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
 				("Temperature(%d) lower than PG value(%d)\n", thermal_value, p_hal_data->eeprom_thermal_meter));
+#endif
 
 			if (p_dm_odm->support_ic_type == ODM_RTL8188E || p_dm_odm->support_ic_type == ODM_RTL8192E || p_dm_odm->support_ic_type == ODM_RTL8821 ||
 			    p_dm_odm->support_ic_type == ODM_RTL8812 || p_dm_odm->support_ic_type == ODM_RTL8723B || p_dm_odm->support_ic_type == ODM_RTL8814A ||
 			    p_dm_odm->support_ic_type == ODM_RTL8703B || p_dm_odm->support_ic_type == ODM_RTL8188F || p_dm_odm->support_ic_type == ODM_RTL8822B ||
-			    p_dm_odm->support_ic_type == ODM_RTL8723D || p_dm_odm->support_ic_type == ODM_RTL8821C) {
+			    p_dm_odm->support_ic_type == ODM_RTL8723D || p_dm_odm->support_ic_type == ODM_RTL8821C || p_dm_odm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */
 
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n"));
 				for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++)
@@ -610,23 +702,42 @@ odm_txpowertracking_callback_thermal_meter(
 	}
 
 
-	if (p_dm_odm->support_ic_type == ODM_RTL8703B || p_dm_odm->support_ic_type == ODM_RTL8723D) {
+	if (p_dm_odm->support_ic_type == ODM_RTL8703B || p_dm_odm->support_ic_type == ODM_RTL8723D || p_dm_odm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */
 
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+		if (xtal_offset_eanble != 0 && p_rf_calibrate_info->txpowertrack_control && (rtlefu->eeprom_thermalmeter != 0xff)) {
+#else
 		if (xtal_offset_eanble != 0 && p_rf_calibrate_info->txpowertrack_control && (p_hal_data->eeprom_thermal_meter != 0xff)) {
+#endif
 
 			ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter Xtal Tracking**********\n"));
 
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+			if (thermal_value > rtlefu->eeprom_thermalmeter) {
+#else
 			if (thermal_value > p_hal_data->eeprom_thermal_meter) {
+#endif
 #else
 			if (thermal_value > p_dm_odm->priv->pmib->dot11RFEntry.ther) {
 #endif
+
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+					("Temperature(%d) higher than PG value(%d)\n", thermal_value, rtlefu->eeprom_thermalmeter));
+#else
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
 					("Temperature(%d) higher than PG value(%d)\n", thermal_value, p_hal_data->eeprom_thermal_meter));
+#endif
 				(*c.odm_txxtaltrack_set_xtal)(p_dm_odm);
 			} else {
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+					("Temperature(%d) lower than PG value(%d)\n", thermal_value, rtlefu->eeprom_thermalmeter));
+#else
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
 					("Temperature(%d) lower than PG value(%d)\n", thermal_value, p_hal_data->eeprom_thermal_meter));
+#endif
 				(*c.odm_txxtaltrack_set_xtal)(p_dm_odm);
 			}
 		}
@@ -635,12 +746,16 @@ odm_txpowertracking_callback_thermal_meter(
 
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
 
-	if (!IS_HARDWARE_TYPE_8723B(adapter)) {
-		/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
-		if (delta_IQK >= c.threshold_iqk) {
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk));
-			if (!p_rf_calibrate_info->is_iqk_in_progress)
-				(*c.do_iqk)(p_dm_odm, delta_IQK, thermal_value, 8);
+	/* Wait sacn to do IQK by RF Jenyu*/
+	if (*p_dm_odm->p_is_scan_in_process == false) {
+		if (!IS_HARDWARE_TYPE_8723B(adapter)) {
+			/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
+			if (delta_IQK >= c.threshold_iqk) {
+				p_rf_calibrate_info->thermal_value_iqk = thermal_value;
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk));
+				if (!p_rf_calibrate_info->is_iqk_in_progress)
+					(*c.do_iqk)(p_dm_odm, delta_IQK, thermal_value, 8);
+			}
 		}
 	}
 	if (p_rf_calibrate_info->dpk_thermal[ODM_RF_PATH_A] != 0) {
@@ -793,7 +908,7 @@ void phydm_rf_watchdog(void		*p_dm_void)
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 	odm_txpowertracking_check(p_dm_odm);
-	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES)
-		odm_iq_calibrate(p_dm_odm);
+	/*if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES)*/
+		/*odm_iq_calibrate(p_dm_odm);*/
 #endif
 }
diff --git a/rtl8822BU/hal/phydm/halphyrf_ce.h b/rtl8822BU/hal/phydm/halrf/halphyrf_ce.h
index 71d104a..731842f 100755..100644
--- a/rtl8822BU/hal/phydm/halphyrf_ce.h
+++ b/rtl8822BU/hal/phydm/halrf/halphyrf_ce.h
@@ -21,20 +21,20 @@
 #ifndef __HAL_PHY_RF_H__
 #define __HAL_PHY_RF_H__
 
-#include "phydm_kfree.h"
+#include "halrf/halrf_kfree.h"
 #if (RTL8814A_SUPPORT == 1)
-	#include "rtl8814a/phydm_iqk_8814a.h"
+	#include "halrf/rtl8814a/halrf_iqk_8814a.h"
 #endif
 
 #if (RTL8822B_SUPPORT == 1)
-	#include "rtl8822b/phydm_iqk_8822b.h"
+	#include "halrf/rtl8822b/halrf_iqk_8822b.h"
 #endif
 
 #if (RTL8821C_SUPPORT == 1)
-	#include "rtl8821c/phydm_iqk_8821c.h"
+	#include "halrf/rtl8821c/halrf_iqk_8821c.h"
 #endif
 
-#include "phydm_powertracking_ce.h"
+#include "halrf/halrf_powertracking_ce.h"
 
 
 enum spur_cal_method {
@@ -92,6 +92,8 @@ void
 odm_txpowertracking_callback_thermal_meter(
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	void					*p_dm_void
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	void	*p_dm_odm
 #else
 	struct _ADAPTER	*adapter
 #endif
diff --git a/rtl8822BU/hal/phydm/halphyrf_win.c b/rtl8822BU/hal/phydm/halrf/halphyrf_win.c
index 4184d85..980e0a8 100755..100644
--- a/rtl8822BU/hal/phydm/halphyrf_win.c
+++ b/rtl8822BU/hal/phydm/halrf/halphyrf_win.c
@@ -88,6 +88,12 @@ void configure_txpower_track(
 		configure_txpower_track_8723d(p_config);
 #endif
 
+/* JJ ADD 20161014 */
+#if RTL8710B_SUPPORT
+	if (p_dm_odm->support_ic_type == ODM_RTL8710B)
+		configure_txpower_track_8710b(p_config);
+#endif
+
 #if RTL8821C_SUPPORT
 	if (p_dm_odm->support_ic_type == ODM_RTL8821C)
 		configure_txpower_track_8821c(p_config);
@@ -154,7 +160,7 @@ odm_txpowertracking_callback_thermal_meter(
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->odmpriv;
 #endif
@@ -169,8 +175,9 @@ odm_txpowertracking_callback_thermal_meter(
 
 	u8			OFDM_min_index = 0;  /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */
 	u8			indexforchannel = 0; /* get_right_chnl_place_for_iqk(p_hal_data->current_channel) */
-	u8			power_tracking_type = p_hal_data->rf_power_tracking_type;
+	u8			power_tracking_type = p_hal_data->RfPowerTrackingType;
 	u8			xtal_offset_eanble = 0;
+	s8			thermal_value_temp = 0;
 
 	struct _TXPWRTRACK_CFG	c;
 
@@ -198,8 +205,8 @@ odm_txpowertracking_callback_thermal_meter(
 	if (p_dm_odm->support_ic_type & ODM_RTL8814A)	/*for 8814 path C & D*/
 		(*c.get_delta_swing_table8814only)(p_dm_odm, (u8 **)&delta_swing_table_idx_tup_c, (u8 **)&delta_swing_table_idx_tdown_c,
 			(u8 **)&delta_swing_table_idx_tup_d, (u8 **)&delta_swing_table_idx_tdown_d);
-
-	if (p_dm_odm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D))	/*for Xtal Offset*/
+	/* JJ ADD 20161014 */
+	if (p_dm_odm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B))	/*for Xtal Offset*/
 		(*c.get_delta_swing_xtal_table)(p_dm_odm, (s8 **)&delta_swing_table_xtal_up, (s8 **)&delta_swing_table_xtal_down);
 
 
@@ -214,7 +221,7 @@ odm_txpowertracking_callback_thermal_meter(
 	p_rf_calibrate_info->rega24 = 0x090e1317;
 #endif
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	if (p_dm_odm->mp_mode == true)
+	if (*(p_dm_odm->p_mp_mode) == true)
 		p_rf_calibrate_info->rega24 = 0x090e1317;
 #endif
 
@@ -226,6 +233,18 @@ odm_txpowertracking_callback_thermal_meter(
 		("p_rf_calibrate_info->txpowertrack_control=%d,  p_hal_data->eeprom_thermal_meter %d\n", p_rf_calibrate_info->txpowertrack_control,  p_hal_data->eeprom_thermal_meter));
 	thermal_value = (u8)odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, c.thermal_reg_addr, 0xfc00);	/* 0x42: RF Reg[15:10] 88E */
 
+	thermal_value_temp = thermal_value + phydm_get_thermal_offset(p_dm_odm);
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
+		("thermal_value_temp(%d) = thermal_value(%d) + power_time_thermal(%d)\n", thermal_value_temp, thermal_value, phydm_get_thermal_offset(p_dm_odm)));
+
+	if (thermal_value_temp > 63)
+		thermal_value = 63;
+	else if (thermal_value_temp < 0)
+		thermal_value = 0;
+	else
+		thermal_value = thermal_value_temp;
+
 	/*add log by zhao he, check c80/c94/c14/ca0 value*/
 	if (p_dm_odm->support_ic_type == ODM_RTL8723D) {
 		regc80 = odm_get_bb_reg(p_dm_odm, 0xc80, MASKDWORD);
@@ -235,9 +254,22 @@ odm_txpowertracking_callback_thermal_meter(
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4));
 	}
 
+	/* JJ ADD 20161014 */
+	if (p_dm_odm->support_ic_type == ODM_RTL8710B) {
+		regc80 = odm_get_bb_reg(p_dm_odm, 0xc80, MASKDWORD);
+		regcd0 = odm_get_bb_reg(p_dm_odm, 0xcd0, MASKDWORD);
+		regcd4 = odm_get_bb_reg(p_dm_odm, 0xcd4, MASKDWORD);
+		regab4 = odm_get_bb_reg(p_dm_odm, 0xab4, 0x000007FF);
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", regc80, regcd0, regcd4, regab4));
+	}
+
 	if (!p_rf_calibrate_info->txpowertrack_control)
 		return;
 
+	if (p_hal_data->eeprom_thermal_meter == 0xff) {
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no pg, p_hal_data->eeprom_thermal_meter = 0x%x\n", p_hal_data->eeprom_thermal_meter));
+		return;
+	}
 
 	/*4 3. Initialize ThermalValues of rf_calibrate_info*/
 
@@ -299,15 +331,18 @@ odm_txpowertracking_callback_thermal_meter(
 
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK));
 
-		/* Delta temperature is equal to or larger than 20 centigrade.*/
-		if (delta_LCK >= c.threshold_iqk) {
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk));
-			p_rf_calibrate_info->thermal_value_lck = thermal_value;
-
-			/*Use RTLCK, so close power tracking driver LCK*/
-			if (!(p_dm_odm->support_ic_type & ODM_RTL8814A)) {
-				if (c.phy_lc_calibrate)
-					(*c.phy_lc_calibrate)(p_dm_odm);
+		/* Wait sacn to do LCK by RF Jenyu*/
+		if (*p_dm_odm->p_is_scan_in_process == false) {
+			/* Delta temperature is equal to or larger than 20 centigrade.*/
+			if (delta_LCK >= c.threshold_iqk) {
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk));
+				p_rf_calibrate_info->thermal_value_lck = thermal_value;
+
+				/*Use RTLCK, so close power tracking driver LCK*/
+				if (!(p_dm_odm->support_ic_type & ODM_RTL8814A)) {
+					if (c.phy_lc_calibrate)
+						(*c.phy_lc_calibrate)(p_dm_odm);
+				}
 			}
 		}
 	}
@@ -376,8 +411,8 @@ odm_txpowertracking_callback_thermal_meter(
 					break;
 				}
 			}
-
-			if (p_dm_odm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D)) {
+			/* JJ ADD 20161014 */
+			if (p_dm_odm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) {
 				/*Save xtal_offset from Xtal table*/
 				p_rf_calibrate_info->xtal_offset_last = p_rf_calibrate_info->xtal_offset;	/*recording last Xtal offset*/
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
@@ -432,8 +467,8 @@ odm_txpowertracking_callback_thermal_meter(
 					break;
 				}
 			}
-
-			if (p_dm_odm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D)) {
+			/* JJ ADD 20161014 */
+			if (p_dm_odm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) {
 				/*Save xtal_offset from Xtal table*/
 				p_rf_calibrate_info->xtal_offset_last = p_rf_calibrate_info->xtal_offset;	/*recording last Xtal offset*/
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
@@ -568,7 +603,7 @@ odm_txpowertracking_callback_thermal_meter(
 			if (p_dm_odm->support_ic_type == ODM_RTL8188E || p_dm_odm->support_ic_type == ODM_RTL8192E || p_dm_odm->support_ic_type == ODM_RTL8821 ||
 			    p_dm_odm->support_ic_type == ODM_RTL8812 || p_dm_odm->support_ic_type == ODM_RTL8723B || p_dm_odm->support_ic_type == ODM_RTL8814A ||
 			    p_dm_odm->support_ic_type == ODM_RTL8703B || p_dm_odm->support_ic_type == ODM_RTL8188F || p_dm_odm->support_ic_type == ODM_RTL8822B ||
-			    p_dm_odm->support_ic_type == ODM_RTL8723D || p_dm_odm->support_ic_type == ODM_RTL8821C) {
+			    p_dm_odm->support_ic_type == ODM_RTL8723D || p_dm_odm->support_ic_type == ODM_RTL8821C || p_dm_odm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */
 
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n"));
 				for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++)
@@ -585,7 +620,7 @@ odm_txpowertracking_callback_thermal_meter(
 			if (p_dm_odm->support_ic_type == ODM_RTL8188E || p_dm_odm->support_ic_type == ODM_RTL8192E || p_dm_odm->support_ic_type == ODM_RTL8821 ||
 			    p_dm_odm->support_ic_type == ODM_RTL8812 || p_dm_odm->support_ic_type == ODM_RTL8723B || p_dm_odm->support_ic_type == ODM_RTL8814A ||
 			    p_dm_odm->support_ic_type == ODM_RTL8703B || p_dm_odm->support_ic_type == ODM_RTL8188F || p_dm_odm->support_ic_type == ODM_RTL8822B ||
-			    p_dm_odm->support_ic_type == ODM_RTL8723D || p_dm_odm->support_ic_type == ODM_RTL8821C) {
+			    p_dm_odm->support_ic_type == ODM_RTL8723D || p_dm_odm->support_ic_type == ODM_RTL8821C || p_dm_odm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */
 
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n"));
 				for (p = ODM_RF_PATH_A; p < c.rf_path_count; p++)
@@ -610,7 +645,7 @@ odm_txpowertracking_callback_thermal_meter(
 	}
 
 
-	if (p_dm_odm->support_ic_type == ODM_RTL8703B || p_dm_odm->support_ic_type == ODM_RTL8723D) {
+	if (p_dm_odm->support_ic_type == ODM_RTL8703B || p_dm_odm->support_ic_type == ODM_RTL8723D || p_dm_odm->support_ic_type == ODM_RTL8710B) {/* JJ ADD 20161014 */
 
 		if (xtal_offset_eanble != 0 && p_rf_calibrate_info->txpowertrack_control && (p_hal_data->eeprom_thermal_meter != 0xff)) {
 
@@ -635,13 +670,16 @@ odm_txpowertracking_callback_thermal_meter(
 
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
 
-	if (!IS_HARDWARE_TYPE_8723B(adapter)) {
-		/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
-		if (delta_IQK >= c.threshold_iqk) {
-			p_rf_calibrate_info->thermal_value_iqk = thermal_value;
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk));
-			if (!p_rf_calibrate_info->is_iqk_in_progress)
-				(*c.do_iqk)(p_dm_odm, delta_IQK, thermal_value, 8);
+	/* Wait sacn to do IQK by RF Jenyu*/
+	if (*p_dm_odm->p_is_scan_in_process == false) {
+		if (!IS_HARDWARE_TYPE_8723B(adapter)) {
+			/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
+			if (delta_IQK >= c.threshold_iqk) {
+				p_rf_calibrate_info->thermal_value_iqk = thermal_value;
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk));
+				if (!p_rf_calibrate_info->is_iqk_in_progress)
+					(*c.do_iqk)(p_dm_odm, delta_IQK, thermal_value, 8);
+			}
 		}
 	}
 	if (p_rf_calibrate_info->dpk_thermal[ODM_RF_PATH_A] != 0) {
@@ -725,6 +763,9 @@ odm_iq_calibrate(
 )
 {
 	struct _ADAPTER	*adapter = p_dm_odm->adapter;
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(adapter);
+
+	RT_TRACE(COMP_SCAN, ODM_DBG_LOUD, ("=>%s\n" , __FUNCTION__));
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	if (*p_dm_odm->p_is_fcs_mode_enable)
@@ -732,20 +773,24 @@ odm_iq_calibrate(
 #endif
 
 	if (p_dm_odm->is_linked) {
+		RT_TRACE(COMP_SCAN, ODM_DBG_LOUD, ("interval=%d ch=%d prech=%d scan=%s\n", p_dm_odm->linked_interval,
+			*p_dm_odm->p_channel,  p_dm_odm->pre_channel, *p_dm_odm->p_is_scan_in_process == TRUE ? "TRUE":"FALSE"));
 
-		if ((*p_dm_odm->p_channel != p_dm_odm->pre_channel) && (!*p_dm_odm->p_is_scan_in_process)) {
+		if (*p_dm_odm->p_channel != p_dm_odm->pre_channel) {
 			p_dm_odm->pre_channel = *p_dm_odm->p_channel;
 			p_dm_odm->linked_interval = 0;
 		}
 
-		if (p_dm_odm->linked_interval < 3)
+		if ((p_dm_odm->linked_interval < 3) && (!*p_dm_odm->p_is_scan_in_process))
 			p_dm_odm->linked_interval++;
 
 		if (p_dm_odm->linked_interval == 2)
-			phy_iq_calibrate(adapter, false);
+			PHY_IQCalibrate(adapter, false);
 	} else
 		p_dm_odm->linked_interval = 0;
 
+		RT_TRACE(COMP_SCAN, ODM_DBG_LOUD, ("<=%s interval=%d ch=%d prech=%d scan=%s\n", __FUNCTION__, p_dm_odm->linked_interval,
+			*p_dm_odm->p_channel,  p_dm_odm->pre_channel, *p_dm_odm->p_is_scan_in_process == TRUE?"TRUE":"FALSE"));
 }
 
 void phydm_rf_init(struct PHY_DM_STRUCT		*p_dm_odm)
@@ -766,12 +811,17 @@ void phydm_rf_init(struct PHY_DM_STRUCT		*p_dm_odm)
 
 }
 
-void phydm_rf_watchdog(struct PHY_DM_STRUCT		*p_dm_odm)
+void phydm_rf_watchdog(struct PHY_DM_STRUCT	*p_dm_odm)
 {
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+	struct _ADAPTER	*adapter = p_dm_odm->adapter;
+
 	odm_txpowertracking_check(p_dm_odm);
-	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES)
-		odm_iq_calibrate(p_dm_odm);
+
+	if(!adapter->MgntInfo.IQKBeforeConnection) {
+		if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES)
+			odm_iq_calibrate(p_dm_odm);
+	}
 #endif
 }
diff --git a/rtl8822BU/hal/phydm/halphyrf_win.h b/rtl8822BU/hal/phydm/halrf/halphyrf_win.h
index e82b42a..e11433a 100755..100644
--- a/rtl8822BU/hal/phydm/halphyrf_win.h
+++ b/rtl8822BU/hal/phydm/halrf/halphyrf_win.h
@@ -21,19 +21,18 @@
 #ifndef __HAL_PHY_RF_H__
 #define __HAL_PHY_RF_H__
 
-#include "phydm_kfree.h"
 #if (RTL8814A_SUPPORT == 1)
-	#include "rtl8814a/phydm_iqk_8814a.h"
+	#include "halrf/rtl8814a/halrf_iqk_8814a.h"
 #endif
 
 #if (RTL8822B_SUPPORT == 1)
-	#include "rtl8822b/phydm_iqk_8822b.h"
+	#include "halrf/rtl8822b/halrf_iqk_8822b.h"
 	#include "../mac/Halmac_type.h"
 #endif
-#include "phydm_powertracking_win.h"
-
+#include "halrf/halrf_powertracking_win.h"
+#include "halrf/halrf_kfree.h"
 #if (RTL8821C_SUPPORT == 1)
-	#include "rtl8821c/phydm_iqk_8821c.h"
+	#include "halrf/rtl8821c/halrf_iqk_8821c.h"
 #endif
 
 enum spur_cal_method {
diff --git a/rtl8822BU/hal/phydm/halrf/halrf.c b/rtl8822BU/hal/phydm/halrf/halrf.c
new file mode 100644
index 0000000..1e33d9d
--- a/dev/null
+++ b/rtl8822BU/hal/phydm/halrf/halrf.c
@@ -0,0 +1,291 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+/* ************************************************************
+ * include files
+ * ************************************************************ */
+
+#include "mp_precomp.h"
+#include "phydm_precomp.h"
+
+void phydm_rf_basic_profile(
+	void			*p_dm_void,
+	u32			*_used,
+	char			*output,
+	u32			*_out_len
+)
+{
+#if CONFIG_PHYDM_DEBUG_FUNCTION
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+
+	/* HAL RF version List */
+	PHYDM_SNPRINTF((output + used, out_len - used, "%-35s\n", "% HAL RF version %"));
+	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Power Tracking", HALRF_POWRTRACKING_VER));
+	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "IQK", HALRF_IQK_VER));
+	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "LCK", HALRF_LCK_VER));
+	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "DPK", HALRF_DPK_VER));
+
+	*_used = used;
+	*_out_len = out_len;
+#endif /*#if CONFIG_PHYDM_DEBUG_FUNCTION*/
+}
+
+void
+halrf_support_ability_debug(
+	void		*p_dm_void,
+	char		input[][16],
+	u32		*_used,
+	char		*output,
+	u32		*_out_len
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _hal_rf_				*p_rf = &(p_dm_odm->rf_table);
+	u32	dm_value[10] = {0};
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u8	i;
+
+	for (i = 0; i < 5; i++) {
+		if (input[i + 1]) {
+			PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &dm_value[i]);
+		}
+	}
+	
+	PHYDM_SNPRINTF((output + used, out_len - used, "\n%s\n", "================================"));
+	if (dm_value[0] == 100) {
+		PHYDM_SNPRINTF((output + used, out_len - used, "[RF Supportability]\n"));
+		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));
+		PHYDM_SNPRINTF((output + used, out_len - used, "00. (( %s ))Power Tracking\n", ((p_rf->rf_supportability & HAL_RF_TX_PWR_TRACK) ? ("V") : ("."))));
+		PHYDM_SNPRINTF((output + used, out_len - used, "01. (( %s ))IQK\n", ((p_rf->rf_supportability & HAL_RF_IQK) ? ("V") : ("."))));
+		PHYDM_SNPRINTF((output + used, out_len - used, "02. (( %s ))LCK\n", ((p_rf->rf_supportability & HAL_RF_LCK) ? ("V") : ("."))));
+		PHYDM_SNPRINTF((output + used, out_len - used, "03. (( %s ))DPK\n", ((p_rf->rf_supportability & HAL_RF_DPK) ? ("V") : ("."))));
+		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));		
+	}
+	else {
+
+		if (dm_value[1] == 1) { /* enable */
+			p_rf->rf_supportability |= BIT(dm_value[0]) ;
+		} else if (dm_value[1] == 2) /* disable */
+			p_rf->rf_supportability &= ~(BIT(dm_value[0])) ;
+		else {
+			PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "[Warning!!!]  1:enable,  2:disable"));
+		}
+	}
+	PHYDM_SNPRINTF((output + used, out_len - used, "Curr-RF_supportability =  0x%x\n", p_rf->rf_supportability));
+	PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));
+}
+
+void
+halrf_cmn_info_set(
+	void		*p_dm_void,
+	u32			cmn_info,
+	u64			value
+)
+{
+	/*  */
+	/* This init variable may be changed in run time. */
+	/*  */
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _hal_rf_				*p_rf = &(p_dm_odm->rf_table);
+	
+	switch	(cmn_info) {
+
+		case	HALRF_CMNINFO_ABILITY:
+			p_rf->rf_supportability = (u32)value;
+			break;
+
+		case	ODM_CMNINFO_DPK_EN:
+			p_rf->dpk_en = (u1Byte)value;
+			break;
+			
+		default:
+			/* do nothing */
+			break;
+	}
+}
+
+u64
+halrf_cmn_info_get(
+	void		*p_dm_void,
+	u32			cmn_info
+)
+{
+	/*  */
+	/* This init variable may be changed in run time. */
+	/*  */
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _hal_rf_				*p_rf = &(p_dm_odm->rf_table);
+	u64	return_value = 0;
+	
+	switch	(cmn_info) {
+
+		case	HALRF_CMNINFO_ABILITY:
+			return_value = (u32)p_rf->rf_supportability;
+			break;
+		default:
+			/* do nothing */
+			break;
+	}
+
+	return	return_value;
+}
+
+void
+halrf_supportability_init_mp(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _hal_rf_				*p_rf = &(p_dm_odm->rf_table);
+
+	switch (p_dm_odm->support_ic_type) {
+
+	case ODM_RTL8814B:
+		#if (RTL8814B_SUPPORT == 1) 
+		p_rf->rf_supportability = 
+			HAL_RF_TX_PWR_TRACK	|
+			HAL_RF_IQK				|
+			HAL_RF_LCK				|
+			/*HAL_RF_DPK				|*/
+			0;
+		#endif
+		break;
+	#if (RTL8822B_SUPPORT == 1) 
+	case ODM_RTL8822B:
+		p_rf->rf_supportability = 
+			HAL_RF_TX_PWR_TRACK	|
+			HAL_RF_IQK				|
+			HAL_RF_LCK				|
+			/*HAL_RF_DPK				|*/
+			0;
+		break;
+	#endif
+
+	#if (RTL8821C_SUPPORT == 1) 
+	case ODM_RTL8821C:
+		p_rf->rf_supportability = 
+			HAL_RF_TX_PWR_TRACK	|
+			HAL_RF_IQK				|
+			HAL_RF_LCK				|
+			/*HAL_RF_DPK				|*/
+			0;
+		break;
+	#endif
+
+	default:
+		p_rf->rf_supportability = 
+			HAL_RF_TX_PWR_TRACK	|
+			HAL_RF_IQK				|
+			HAL_RF_LCK				|
+			/*HAL_RF_DPK				|*/
+			0;
+		break;
+
+	}
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IC = ((0x%x)), RF_Supportability Init MP = ((0x%x))\n", p_dm_odm->support_ic_type, p_rf->rf_supportability));
+}
+
+void
+halrf_supportability_init(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _hal_rf_				*p_rf = &(p_dm_odm->rf_table);
+
+	switch (p_dm_odm->support_ic_type) {
+
+	case ODM_RTL8814B:
+		#if (RTL8814B_SUPPORT == 1) 
+		p_rf->rf_supportability = 
+			HAL_RF_TX_PWR_TRACK	|
+			HAL_RF_IQK				|
+			HAL_RF_LCK				|
+			/*HAL_RF_DPK				|*/
+			0;
+		#endif
+		break;
+	#if (RTL8822B_SUPPORT == 1) 
+	case ODM_RTL8822B:
+		p_rf->rf_supportability = 
+			HAL_RF_TX_PWR_TRACK	|
+			HAL_RF_IQK				|
+			HAL_RF_LCK				|
+			/*HAL_RF_DPK				|*/
+			0;
+		break;
+	#endif
+
+	#if (RTL8821C_SUPPORT == 1) 
+	case ODM_RTL8821C:
+		p_rf->rf_supportability = 
+			HAL_RF_TX_PWR_TRACK	|
+			HAL_RF_IQK				|
+			HAL_RF_LCK				|
+			/*HAL_RF_DPK				|*/
+			0;
+		break;
+	#endif
+
+	default:
+		p_rf->rf_supportability = 
+			HAL_RF_TX_PWR_TRACK	|
+			HAL_RF_IQK				|
+			HAL_RF_LCK				|
+			/*HAL_RF_DPK				|*/
+			0;
+		break;
+
+	}
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IC = ((0x%x)), RF_Supportability Init = ((0x%x))\n", p_dm_odm->support_ic_type, p_rf->rf_supportability));
+}
+
+void
+halrf_watchdog(
+	void			*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	phydm_rf_watchdog(p_dm_odm);
+}
+
+void
+halrf_init(
+	void			*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("HALRF_Init\n"));
+
+	if (*(p_dm_odm->p_mp_mode) == true)
+		halrf_supportability_init_mp(p_dm_odm);
+	else
+		halrf_supportability_init(p_dm_odm);
+}
+
+
+
+
diff --git a/rtl8822BU/hal/phydm/halrf/halrf.h b/rtl8822BU/hal/phydm/halrf/halrf.h
new file mode 100644
index 0000000..cc28aff
--- a/dev/null
+++ b/rtl8822BU/hal/phydm/halrf/halrf.h
@@ -0,0 +1,125 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+
+#ifndef	_HALRF_H__
+#define _HALRF_H__
+
+/*============================================================*/
+/*include files*/
+/*============================================================*/
+
+
+
+/*============================================================*/
+/*Definition */
+/*============================================================*/
+
+
+#if 0/*(RTL8821C_SUPPORT == 1)*/
+#define HALRF_IQK_VER	IQK_VERSION
+#define HALRF_LCK_VER	LCK_VERSION
+#define HALRF_DPK_VER	DPK_VERSION
+#else
+#define HALRF_IQK_VER	"1.0"
+#define HALRF_LCK_VER	"1.0"
+#define HALRF_DPK_VER	"1.0"
+#endif
+
+/*============================================================*/
+/* enumeration */
+/*============================================================*/
+enum halrf_ability_e {
+
+	HAL_RF_TX_PWR_TRACK	= BIT(0),
+	HAL_RF_IQK				= BIT(1),
+	HAL_RF_LCK				= BIT(2),
+	HAL_RF_DPK				= BIT(3)
+};
+
+enum halrf_cmninfo_e {
+	
+	HALRF_CMNINFO_ABILITY = 0,
+	HALRF_CMNINFO_DPK_EN = 1,
+	HALRF_CMNINFO_tmp
+};
+
+/*============================================================*/
+/* structure */
+/*============================================================*/
+
+struct _hal_rf_ {
+	u32		rf_supportability;
+	u8		dpk_en;			/*Enable Function DPK OFF/ON = 0/1*/
+	boolean	dpk_done;
+
+};
+
+/*============================================================*/
+/* function prototype */
+/*============================================================*/
+
+void phydm_rf_basic_profile(
+	void			*p_dm_void,
+	u32			*_used,
+	char			*output,
+	u32			*_out_len
+);
+
+void
+halrf_support_ability_debug(
+	void		*p_dm_void,
+	char		input[][16],
+	u32		*_used,
+	char		*output,
+	u32		*_out_len
+);
+
+void
+halrf_cmn_info_set(
+	void		*p_dm_void,
+	u32			cmn_info,
+	u64			value
+);
+
+u64
+halrf_cmn_info_get(
+	void		*p_dm_void,
+	u32			cmn_info
+);
+
+void
+halrf_watchdog(
+	void			*p_dm_void
+);
+
+void
+halrf_supportability_init(
+	void		*p_dm_void
+);
+
+void
+halrf_init(
+	void			*p_dm_void
+);
+
+
+
+#endif
diff --git a/rtl8822BU/hal/phydm/phydm_kfree.h b/rtl8822BU/hal/phydm/halrf/halrf_features.h
index 30235df..f8edbfd 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_kfree.h
+++ b/rtl8822BU/hal/phydm/halrf/halrf_features.h
@@ -1,4 +1,3 @@
-
 /******************************************************************************
  *
  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
@@ -19,27 +18,21 @@
  *
  ******************************************************************************/
 
-#ifndef	__PHYDMKFREE_H__
-#define    __PHYDKFREE_H__
+#ifndef	__HALRF_FEATURES_H__
+#define __HALRF_FEATURES
+
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 
-#define KFREE_VERSION	"1.0"
+	#define	CONFIG_HALRF_POWERTRACKING	1
 
-enum phydm_kfree_channeltosw {
-	PHYDM_2G = 0,
-	PHYDM_5GLB1 = 1,
-	PHYDM_5GLB2 = 2,
-	PHYDM_5GMB1 = 3,
-	PHYDM_5GMB2 = 4,
-	PHYDM_5GHB = 5,
-};
+#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
 
+	#define	CONFIG_HALRF_POWERTRACKING	1
 
-void
-phydm_config_kfree(
-	void	*p_dm_void,
-	u8	channel_to_sw,
-	u8	*kfree_table
-);
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 
+	#define	CONFIG_HALRF_POWERTRACKING	1
+
+#endif
 
 #endif
diff --git a/rtl8822BU/hal/phydm/phydm_iqk.h b/rtl8822BU/hal/phydm/halrf/halrf_iqk.h
index 0726ba2..006b554 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_iqk.h
+++ b/rtl8822BU/hal/phydm/halrf/halrf_iqk.h
@@ -29,34 +29,37 @@
 #define	TXIQK 0
 #define	RXIQK1 1
 #define	RXIQK2 2
+#define kcount_limit_80m 2
+#define kcount_limit_others 4
+#define rxiqk_gs_limit 4
 
 #define	NUM 4
 /*---------------------------End Define Parameters-------------------------------*/
 
 struct _IQK_INFORMATION {
-	bool		LOK_fail[NUM];
-	bool		IQK_fail[2][NUM];
+	boolean		LOK_fail[NUM];
+	boolean		IQK_fail[2][NUM];
 	u32		iqc_matrix[2][NUM];
 	u8      iqk_times;
 	u32		rf_reg18;
 	u32		lna_idx;
-	/*	bool		rxiqk_finish[4]; */
 	u8		rxiqk_step;
 	u8		tmp1bcc;
+	u8		kcount;
 
 	u32		iqk_channel[2];
-	bool		IQK_fail_report[2][4][2]; /*channel/path/TRX(TX:0, RX:1) */
+	boolean		IQK_fail_report[2][4][2]; /*channel/path/TRX(TX:0, RX:1) */
 	u32		IQK_CFIR_real[2][4][2][8]; /*channel / path / TRX(TX:0, RX:1) / CFIR_real*/
 	u32		IQK_CFIR_imag[2][4][2][8]; /*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/
 	u8		retry_count[2][4][3]; /* channel / path / (TXK:0, RXK1:1, RXK2:2) */
 	u8		gs_retry_count[2][4][2]; /* channel / path / (GSRXK1:0, GSRXK2:1) */
 	u8		RXIQK_fail_code[2][4]; /* channel / path 0:SRXK1 fail, 1:RXK1 fail 2:RXK2 fail */
 	u32		LOK_IDAC[2][4];		/*channel / path*/
-	u32		RXIQK_AGC[2][4];	 /*channel / path*/
+	u16		RXIQK_AGC[2][4];	 /*channel / path*/
 	u32		bypass_iqk[2][4];	/*channel / 0xc94/0xe94*/
 	u32		tmp_GNTWL;
-	bool		is_BTG;
-
+	boolean		is_BTG;
+	boolean		isbnd;
 };
 
 #endif
diff --git a/rtl8822BU/hal/phydm/halrf/halrf_kfree.c b/rtl8822BU/hal/phydm/halrf/halrf_kfree.c
new file mode 100644
index 0000000..1e67dc0
--- a/dev/null
+++ b/rtl8822BU/hal/phydm/halrf/halrf_kfree.c
@@ -0,0 +1,716 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+/*============================================================*/
+/*include files*/
+/*============================================================*/
+#include "mp_precomp.h"
+#include "phydm_precomp.h"
+
+
+/*<YuChen, 150720> Add for KFree Feature Requested by RF David.*/
+/*This is a phydm API*/
+
+void
+phydm_set_kfree_to_rf_8814a(
+	void		*p_dm_void,
+	u8		e_rf_path,
+	u8		data
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
+	boolean is_odd;
+
+	if ((data % 2) != 0) {	/*odd->positive*/
+		data = data - 1;
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(19), 1);
+		is_odd = true;
+	} else {		/*even->negative*/
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(19), 0);
+		is_odd = false;
+	}
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("phy_ConfigKFree8814A(): RF_0x55[19]= %d\n", is_odd));
+	switch (data) {
+	case 0:
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 0);
+		p_rf_calibrate_info->kfree_offset[e_rf_path] = 0;
+		break;
+	case 2:
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1);
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 0);
+		p_rf_calibrate_info->kfree_offset[e_rf_path] = 0;
+		break;
+	case 4:
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 1);
+		p_rf_calibrate_info->kfree_offset[e_rf_path] = 1;
+		break;
+	case 6:
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1);
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 1);
+		p_rf_calibrate_info->kfree_offset[e_rf_path] = 1;
+		break;
+	case 8:
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 2);
+		p_rf_calibrate_info->kfree_offset[e_rf_path] = 2;
+		break;
+	case 10:
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1);
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 2);
+		p_rf_calibrate_info->kfree_offset[e_rf_path] = 2;
+		break;
+	case 12:
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 3);
+		p_rf_calibrate_info->kfree_offset[e_rf_path] = 3;
+		break;
+	case 14:
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1);
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 3);
+		p_rf_calibrate_info->kfree_offset[e_rf_path] = 3;
+		break;
+	case 16:
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 4);
+		p_rf_calibrate_info->kfree_offset[e_rf_path] = 4;
+		break;
+	case 18:
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1);
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 4);
+		p_rf_calibrate_info->kfree_offset[e_rf_path] = 4;
+		break;
+	case 20:
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
+		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 5);
+		p_rf_calibrate_info->kfree_offset[e_rf_path] = 5;
+		break;
+
+	default:
+		break;
+	}
+
+	if (is_odd == false) {
+		/*that means Kfree offset is negative, we need to record it.*/
+		p_rf_calibrate_info->kfree_offset[e_rf_path] = (-1) * p_rf_calibrate_info->kfree_offset[e_rf_path];
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("phy_ConfigKFree8814A(): kfree_offset = %d\n", p_rf_calibrate_info->kfree_offset[e_rf_path]));
+	} else
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("phy_ConfigKFree8814A(): kfree_offset = %d\n", p_rf_calibrate_info->kfree_offset[e_rf_path]));
+
+}
+
+
+
+//
+//
+//
+void
+phydm_get_thermal_trim_offset_8821c(
+	void	*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct odm_power_trim_data	*p_power_trim_info = &(p_dm_odm->power_trim_data);
+
+	u8 pg_therm = 0xff;
+
+	odm_efuse_one_byte_read(p_dm_odm, PPG_THERMAL_OFFSET_8821C, &pg_therm, false);
+
+	if (pg_therm != 0xff) {
+		pg_therm = pg_therm & 0x1f;
+		if ((pg_therm & BIT0) == 0)
+			p_power_trim_info->thermal = (-1 * (pg_therm >> 1));
+		else
+			p_power_trim_info->thermal = (pg_therm >> 1);
+
+		p_power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON;
+	}
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8821c thermal trim flag:0x%02x\n", p_power_trim_info->flag));
+
+	if (p_power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON)
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8821c thermal:%d\n", p_power_trim_info->thermal));
+}
+
+
+
+void
+phydm_get_power_trim_offset_8821c(
+	void	*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct odm_power_trim_data	*p_power_trim_info = &(p_dm_odm->power_trim_data);
+
+	u8 pg_power = 0xff, i;
+
+	odm_efuse_one_byte_read(p_dm_odm, PPG_BB_GAIN_2G_TXAB_OFFSET_8821C, &pg_power, false);
+
+	if (pg_power != 0xff) {
+		p_power_trim_info->bb_gain[0][0] = pg_power;
+		odm_efuse_one_byte_read(p_dm_odm, PPG_BB_GAIN_5GL1_TXA_OFFSET_8821C, &pg_power, false);
+		p_power_trim_info->bb_gain[1][0] = pg_power;
+		odm_efuse_one_byte_read(p_dm_odm, PPG_BB_GAIN_5GL2_TXA_OFFSET_8821C, &pg_power, false);
+		p_power_trim_info->bb_gain[2][0] = pg_power;
+		odm_efuse_one_byte_read(p_dm_odm, PPG_BB_GAIN_5GM1_TXA_OFFSET_8821C, &pg_power, false);
+		p_power_trim_info->bb_gain[3][0] = pg_power;
+		odm_efuse_one_byte_read(p_dm_odm, PPG_BB_GAIN_5GM2_TXA_OFFSET_8821C, &pg_power, false);
+		p_power_trim_info->bb_gain[4][0] = pg_power;
+		odm_efuse_one_byte_read(p_dm_odm, PPG_BB_GAIN_5GH1_TXA_OFFSET_8821C, &pg_power, false);
+		p_power_trim_info->bb_gain[5][0] = pg_power;
+		p_power_trim_info->flag = p_power_trim_info->flag | KFREE_FLAG_ON | KFREE_FLAG_ON_2G | KFREE_FLAG_ON_5G;
+	}
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8821c power trim flag:0x%02x\n", p_power_trim_info->flag));
+
+	if (p_power_trim_info->flag & KFREE_FLAG_ON) {
+		for (i = 0; i < 6; i++)
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8821c power_trim_data->bb_gain[%d][0]=0x%X\n", i, p_power_trim_info->bb_gain[i][0]));
+	}
+}
+
+
+
+void
+phydm_set_kfree_to_rf_8821c(
+	void		*p_dm_void,
+	u8		e_rf_path,
+	boolean		wlg_btg,
+	u8		data
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
+	boolean is_odd;
+	u8	wlg, btg;
+
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0xde, BIT(0), 1);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0xde, BIT(5), 1);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x55, BIT(6), 1);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x65, BIT(6), 1);
+
+	if (wlg_btg == true) {
+		wlg = data & 0xf;
+		btg = (data & 0xf0) >> 4;
+
+		odm_set_rf_reg(p_dm_odm, e_rf_path, 0x55, BIT(19), (wlg & BIT(0)));
+		odm_set_rf_reg(p_dm_odm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), (wlg >> 1));
+
+		odm_set_rf_reg(p_dm_odm, e_rf_path, 0x65, BIT(19), (btg & BIT(0)));
+		odm_set_rf_reg(p_dm_odm, e_rf_path, 0x65, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), (btg >> 1));
+	} else {
+		odm_set_rf_reg(p_dm_odm, e_rf_path, 0x55, BIT(19), (data & BIT(0)));
+		odm_set_rf_reg(p_dm_odm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), ((data & 0x1f) >> 1));
+	}
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD,
+		("[kfree] 8821c 0x55[19:14]=0x%X 0x65[19:14]=0x%X\n",
+		odm_get_rf_reg(p_dm_odm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))),
+		odm_get_rf_reg(p_dm_odm, e_rf_path, 0x65, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)))
+		));
+}
+
+
+
+void
+phydm_get_thermal_trim_offset_8822b(
+	void	*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct odm_power_trim_data	*p_power_trim_info = &(p_dm_odm->power_trim_data);
+
+	u8 pg_therm = 0xff, i;
+
+#if 0
+	u32	thermal_trim_enable = 0xff;
+
+	odm_efuse_logical_map_read(p_dm_odm, 1, 0xc8, &thermal_trim_enable);
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b 0xc8:0x%2x\n", thermal_trim_enable));
+
+	thermal_trim_enable = (thermal_trim_enable & BIT(5)) >> 5;
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b thermal trim Enable:%d\n", thermal_trim_enable));
+
+	if ((p_rf_calibrate_info->reg_rf_kfree_enable == 0 && thermal_trim_enable == 1) ||
+		p_rf_calibrate_info->reg_rf_kfree_enable == 1) {
+#endif
+
+		odm_efuse_one_byte_read(p_dm_odm, PPG_THERMAL_OFFSET, &pg_therm, false);
+
+		if (pg_therm != 0xff) {
+			pg_therm = pg_therm & 0x1f;
+			if ((pg_therm & BIT0) == 0)
+				p_power_trim_info->thermal = (-1 * (pg_therm >> 1));
+			else
+				p_power_trim_info->thermal = (pg_therm >> 1);
+
+			p_power_trim_info->flag |= KFREE_FLAG_THERMAL_K_ON;
+		}
+
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b thermal trim flag:0x%02x\n", p_power_trim_info->flag));
+
+		if (p_power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON)
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b thermal:%d\n", p_power_trim_info->thermal));
+#if 0
+	} else
+		return;
+#endif
+
+}
+
+
+
+void
+phydm_get_power_trim_offset_8822b(
+	void	*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct odm_power_trim_data	*p_power_trim_info = &(p_dm_odm->power_trim_data);
+	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
+
+	u8 pg_power = 0xff, i, j;
+
+#if 0
+	u32	power_trim_enable = 0xff;
+
+	odm_efuse_logical_map_read(p_dm_odm, 1, 0xc8, &power_trim_enable);
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b 0xc8:0x%2x\n", power_trim_enable));
+
+	power_trim_enable = (power_trim_enable & BIT(4)) >> 4;
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b power trim Enable:%d\n", power_trim_enable));
+
+	if ((p_rf_calibrate_info->reg_rf_kfree_enable == 0 && power_trim_enable == 1) ||
+		p_rf_calibrate_info->reg_rf_kfree_enable == 1) {
+#endif
+
+		odm_efuse_one_byte_read(p_dm_odm, PPG_BB_GAIN_2G_TXAB_OFFSET, &pg_power, false);
+
+		if (pg_power != 0xff) {
+			/*Path A*/
+			odm_efuse_one_byte_read(p_dm_odm, PPG_BB_GAIN_2G_TXAB_OFFSET, &pg_power, false);
+			p_power_trim_info->bb_gain[0][0] = (pg_power & 0xf);
+
+			/*Path B*/
+			odm_efuse_one_byte_read(p_dm_odm, PPG_BB_GAIN_2G_TXAB_OFFSET, &pg_power, false);
+			p_power_trim_info->bb_gain[0][1] = ((pg_power & 0xf0) >> 4);
+
+			p_power_trim_info->flag |= KFREE_FLAG_ON_2G;
+			p_power_trim_info->flag |= KFREE_FLAG_ON;
+		}
+
+		odm_efuse_one_byte_read(p_dm_odm, PPG_BB_GAIN_5GL1_TXA_OFFSET, &pg_power, false);
+		
+		if (pg_power != 0xff) {
+			/*Path A*/
+			odm_efuse_one_byte_read(p_dm_odm, PPG_BB_GAIN_5GL1_TXA_OFFSET, &pg_power, false);
+			p_power_trim_info->bb_gain[1][0] = pg_power;
+			odm_efuse_one_byte_read(p_dm_odm, PPG_BB_GAIN_5GL2_TXA_OFFSET, &pg_power, false);
+			p_power_trim_info->bb_gain[2][0] = pg_power;
+			odm_efuse_one_byte_read(p_dm_odm, PPG_BB_GAIN_5GM1_TXA_OFFSET, &pg_power, false);
+			p_power_trim_info->bb_gain[3][0] = pg_power;
+			odm_efuse_one_byte_read(p_dm_odm, PPG_BB_GAIN_5GM2_TXA_OFFSET, &pg_power, false);
+			p_power_trim_info->bb_gain[4][0] = pg_power;
+			odm_efuse_one_byte_read(p_dm_odm, PPG_BB_GAIN_5GH1_TXA_OFFSET, &pg_power, false);
+			p_power_trim_info->bb_gain[5][0] = pg_power;
+
+			/*Path B*/
+			odm_efuse_one_byte_read(p_dm_odm, PPG_BB_GAIN_5GL1_TXB_OFFSET, &pg_power, false);
+			p_power_trim_info->bb_gain[1][1] = pg_power;
+			odm_efuse_one_byte_read(p_dm_odm, PPG_BB_GAIN_5GL2_TXB_OFFSET, &pg_power, false);
+			p_power_trim_info->bb_gain[2][1] = pg_power;
+			odm_efuse_one_byte_read(p_dm_odm, PPG_BB_GAIN_5GM1_TXB_OFFSET, &pg_power, false);
+			p_power_trim_info->bb_gain[3][1] = pg_power;
+			odm_efuse_one_byte_read(p_dm_odm, PPG_BB_GAIN_5GM2_TXB_OFFSET, &pg_power, false);
+			p_power_trim_info->bb_gain[4][1] = pg_power;
+			odm_efuse_one_byte_read(p_dm_odm, PPG_BB_GAIN_5GH1_TXB_OFFSET, &pg_power, false);
+			p_power_trim_info->bb_gain[5][1] = pg_power;
+			
+			p_power_trim_info->flag |= KFREE_FLAG_ON_5G;
+			p_power_trim_info->flag |= KFREE_FLAG_ON;
+		}
+
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b power trim flag:0x%02x\n", p_power_trim_info->flag));
+
+		if (p_power_trim_info->flag & KFREE_FLAG_ON) {
+			for (i = 0; i < 6; i++) {
+				for (j = 0; j < 2; j++)
+					ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b power_trim_data->bb_gain[%d][%d]=0x%X\n", i, j, p_power_trim_info->bb_gain[i][j]));
+			}
+		}
+#if 0
+	} else
+		return;
+#endif
+}
+
+
+
+void
+phydm_set_pa_bias_to_rf_8822b(
+	void		*p_dm_void,
+	u8		e_rf_path,
+	s8		tx_pa_bias
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
+
+	tx_pa_bias = tx_pa_bias + (u8)odm_get_rf_reg(p_dm_odm, e_rf_path, 0x51, (BIT(6) | BIT(5) | BIT(4) | BIT(3)));
+
+	if (tx_pa_bias < 0)
+		tx_pa_bias = 0;
+	else if (tx_pa_bias > 7)
+		tx_pa_bias = 7;
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b 2g tx pa bias=0x%X rf 0x51=0x%X path=%d\n", tx_pa_bias,
+		odm_get_rf_reg(p_dm_odm, e_rf_path, 0x51, (BIT(6) | BIT(5) | BIT(4) | BIT(3))), e_rf_path));
+
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0xef, BIT(10), 0x1);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x33, RFREGOFFSETMASK, 0x0);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x3f, (BIT(12) | BIT(11) | BIT(10) | BIT(9)), tx_pa_bias);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x33, BIT(0), 0x1);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x3f, (BIT(12) | BIT(11) | BIT(10) | BIT(9)), tx_pa_bias);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x33, BIT(1), 0x1);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x3f, (BIT(12) | BIT(11) | BIT(10) | BIT(9)), tx_pa_bias);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x33, (BIT(1) | BIT(0)), 0x3);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x3f, (BIT(12) | BIT(11) | BIT(10) | BIT(9)), tx_pa_bias);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0xef, BIT(10), 0x0);
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b 2g tx pa bias rf_0x3f(0x%X) path=%d\n",
+		odm_get_rf_reg(p_dm_odm, e_rf_path, 0x3f, (BIT(12) | BIT(11) | BIT(10) | BIT(9))), e_rf_path));
+
+}
+
+
+
+void
+phydm_get_pa_bias_offset_8822b(
+	void	*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct odm_power_trim_data	*p_power_trim_info = &(p_dm_odm->power_trim_data);
+
+	u8 pg_pa_bias = 0xff, e_rf_path = 0;
+	s8 tx_pa_bias[2] = {0};
+
+	odm_efuse_one_byte_read(p_dm_odm, PPG_PA_BIAS_2G_TXA_OFFSET, &pg_pa_bias, false);
+
+	if (pg_pa_bias != 0xff) {
+		/*paht a*/
+		odm_efuse_one_byte_read(p_dm_odm, PPG_PA_BIAS_2G_TXA_OFFSET, &pg_pa_bias, false);
+		pg_pa_bias = pg_pa_bias & 0xf;
+		
+		if ((pg_pa_bias & BIT0) == 0)
+			tx_pa_bias[0] = (-1 * (pg_pa_bias >> 1));
+		else
+			tx_pa_bias[0] = (pg_pa_bias >> 1);
+
+		/*paht b*/
+		odm_efuse_one_byte_read(p_dm_odm, PPG_PA_BIAS_2G_TXB_OFFSET, &pg_pa_bias, false);
+		pg_pa_bias = pg_pa_bias & 0xf;
+		
+		if ((pg_pa_bias & BIT0) == 0)
+			tx_pa_bias[1] = (-1 * (pg_pa_bias >> 1));
+		else
+			tx_pa_bias[1] = (pg_pa_bias >> 1);
+
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b 2g tx_patha_pa_bias:%d   tx_pathb_pa_bias:%d\n", tx_pa_bias[0], tx_pa_bias[1]));
+
+		for (e_rf_path = ODM_RF_PATH_A;  e_rf_path < 2; e_rf_path++)
+			phydm_set_pa_bias_to_rf_8822b(p_dm_odm, e_rf_path, tx_pa_bias[e_rf_path]);
+	}
+	else
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] 8822b 2g tx pa bias no pg\n"));
+}
+
+
+
+void
+phydm_set_kfree_to_rf_8822b(
+	void		*p_dm_void,
+	u8		e_rf_path,
+	u8		data
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
+
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0xde, BIT(0), 1);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0xde, BIT(4), 1);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x65, bMaskLWord, 0x9000);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x55, BIT(5), 1);
+
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x55, BIT(19), (data & BIT(0)));
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), ((data & 0x1f) >> 1));
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD,
+		("[kfree] 8822b 0x55[19:14]=0x%X path=%d\n",
+		odm_get_rf_reg(p_dm_odm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))),
+		e_rf_path
+		));
+}
+
+
+
+void
+phydm_clear_kfree_to_rf_8822b(
+	void		*p_dm_void,
+	u8		e_rf_path,
+	u8		data
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
+
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0xde, BIT(0), 1);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0xde, BIT(4), 1);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x65, bMaskLWord, 0x9000);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x55, BIT(5), 1);
+
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x55, BIT(19), (data & BIT(0)));
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x55, (BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14)), ((data & 0x1f) >> 1));
+
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0xde, BIT(0), 0);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0xde, BIT(4), 1);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x65, bMaskLWord, 0x9000);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x55, BIT(5), 0);
+	odm_set_rf_reg(p_dm_odm, e_rf_path, 0x55, BIT(7), 0);
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD,
+		("[kfree] 8822b clear power trim 0x55[19:14]=0x%X path=%d\n",
+		odm_get_rf_reg(p_dm_odm, e_rf_path, 0x55, (BIT(19) | BIT(18) | BIT(17) | BIT(16) | BIT(15) | BIT(14))),
+		e_rf_path
+		));
+}
+
+
+
+void
+phydm_set_kfree_to_rf(
+	void		*p_dm_void,
+	u8		e_rf_path,
+	u8		data
+)
+{
+	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+
+	if (p_dm_odm->support_ic_type & ODM_RTL8814A)
+		phydm_set_kfree_to_rf_8814a(p_dm_odm, e_rf_path, data);
+
+	if ((p_dm_odm->support_ic_type & ODM_RTL8821C) && (*p_dm_odm->p_band_type == ODM_BAND_2_4G))
+		phydm_set_kfree_to_rf_8821c(p_dm_odm, e_rf_path, true, data);
+	else if (p_dm_odm->support_ic_type & ODM_RTL8821C)
+		phydm_set_kfree_to_rf_8821c(p_dm_odm, e_rf_path, false, data);
+
+	if (p_dm_odm->support_ic_type & ODM_RTL8822B)
+		phydm_set_kfree_to_rf_8822b(p_dm_odm, e_rf_path, data);
+}
+
+
+
+void
+phydm_clear_kfree_to_rf(
+	void		*p_dm_void,
+	u8		e_rf_path,
+	u8		data
+)
+{
+	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+
+	if (p_dm_odm->support_ic_type & ODM_RTL8822B)
+		phydm_clear_kfree_to_rf_8822b(p_dm_odm, e_rf_path, 1);
+}
+
+
+
+
+void
+phydm_get_thermal_trim_offset(
+	void	*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	struct _ADAPTER		*adapter = p_dm_odm->adapter;
+	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
+	PEFUSE_HAL		pEfuseHal = &(p_hal_data->EfuseHal);
+	u1Byte			eFuseContent[DCMD_EFUSE_MAX_SECTION_NUM * EFUSE_MAX_WORD_UNIT * 2];
+
+	if (HAL_MAC_Dump_EFUSE(&GET_HAL_MAC_INFO(adapter), EFUSE_WIFI, eFuseContent, pEfuseHal->PhysicalLen_WiFi, HAL_MAC_EFUSE_PHYSICAL, HAL_MAC_EFUSE_PARSE_DRV) != RT_STATUS_SUCCESS)
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] dump efuse fail !!!\n"));
+#endif
+
+	if (p_dm_odm->support_ic_type & ODM_RTL8821C)
+		phydm_get_thermal_trim_offset_8821c(p_dm_void);
+	else if (p_dm_odm->support_ic_type & ODM_RTL8822B)
+		phydm_get_thermal_trim_offset_8822b(p_dm_void);
+}
+
+
+
+void
+phydm_get_power_trim_offset(
+	void	*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	struct _ADAPTER		*adapter = p_dm_odm->adapter;
+	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
+	PEFUSE_HAL		pEfuseHal = &(p_hal_data->EfuseHal);
+	u1Byte			eFuseContent[DCMD_EFUSE_MAX_SECTION_NUM * EFUSE_MAX_WORD_UNIT * 2];
+
+	if (HAL_MAC_Dump_EFUSE(&GET_HAL_MAC_INFO(adapter), EFUSE_WIFI, eFuseContent, pEfuseHal->PhysicalLen_WiFi, HAL_MAC_EFUSE_PHYSICAL, HAL_MAC_EFUSE_PARSE_DRV) != RT_STATUS_SUCCESS)
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] dump efuse fail !!!\n"));
+#endif
+
+	if (p_dm_odm->support_ic_type & ODM_RTL8821C)
+		phydm_get_power_trim_offset_8821c(p_dm_void);
+	else if (p_dm_odm->support_ic_type & ODM_RTL8822B)
+		phydm_get_power_trim_offset_8822b(p_dm_void);
+}
+
+
+
+void
+phydm_get_pa_bias_offset(
+	void	*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	struct _ADAPTER		*adapter = p_dm_odm->adapter;
+	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
+	PEFUSE_HAL		pEfuseHal = &(p_hal_data->EfuseHal);
+	u1Byte			eFuseContent[DCMD_EFUSE_MAX_SECTION_NUM * EFUSE_MAX_WORD_UNIT * 2];
+
+	if (HAL_MAC_Dump_EFUSE(&GET_HAL_MAC_INFO(adapter), EFUSE_WIFI, eFuseContent, pEfuseHal->PhysicalLen_WiFi, HAL_MAC_EFUSE_PHYSICAL, HAL_MAC_EFUSE_PARSE_DRV) != RT_STATUS_SUCCESS)
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] dump efuse fail !!!\n"));
+#endif
+
+	if (p_dm_odm->support_ic_type & ODM_RTL8822B)
+		phydm_get_pa_bias_offset_8822b(p_dm_void);
+}
+
+
+
+s8
+phydm_get_thermal_offset(
+	void	*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct odm_power_trim_data	*p_power_trim_info = &(p_dm_odm->power_trim_data);
+
+	if (p_power_trim_info->flag & KFREE_FLAG_THERMAL_K_ON)
+		return p_power_trim_info->thermal;
+	else
+		return 0;
+}
+
+
+
+void
+phydm_config_kfree(
+	void	*p_dm_void,
+	u8	channel_to_sw
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
+	struct odm_power_trim_data	*p_power_trim_info = &(p_dm_odm->power_trim_data);
+
+	u8			rfpath = 0, max_rf_path = 0;
+	u8			channel_idx = 0, i, j;
+
+	if (p_dm_odm->support_ic_type & ODM_RTL8814A)
+		max_rf_path = 4;	/*0~3*/
+	else if (p_dm_odm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E | ODM_RTL8822B))
+		max_rf_path = 2;	/*0~1*/
+	else if (p_dm_odm->support_ic_type & ODM_RTL8821C)
+		max_rf_path = 1;
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("===>[kfree] phy_ConfigKFree()\n"));
+
+	if (p_rf_calibrate_info->reg_rf_kfree_enable == 2) {
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] phy_ConfigKFree(): reg_rf_kfree_enable == 2, Disable\n"));
+		return;
+	} else if (p_rf_calibrate_info->reg_rf_kfree_enable == 1 || p_rf_calibrate_info->reg_rf_kfree_enable == 0) {
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] phy_ConfigKFree(): reg_rf_kfree_enable == true\n"));
+		/*Make sure the targetval is defined*/
+		if (p_power_trim_info->flag & KFREE_FLAG_ON) {
+			/*if kfree_table[0] == 0xff, means no Kfree*/
+
+			for (i = 0; i < BB_GAIN_NUM; i++) {
+				for (j = 0; j < max_rf_path; j++)
+					ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] power_trim_data->bb_gain[%d][%d]=0x%X\n", i, j, p_power_trim_info->bb_gain[i][j]));
+			}
+
+			if (*p_dm_odm->p_band_type == ODM_BAND_2_4G && p_power_trim_info->flag & KFREE_FLAG_ON_2G) {
+				
+				if (channel_to_sw >= 1 && channel_to_sw <= 14)
+					channel_idx = PHYDM_2G;
+
+				for (rfpath = ODM_RF_PATH_A;  rfpath < max_rf_path; rfpath++) {
+					ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] phydm_kfree(): channel_to_sw=%d PATH_%d bb_gain:0x%X\n", channel_to_sw, rfpath, p_power_trim_info->bb_gain[channel_idx][rfpath]));
+					phydm_set_kfree_to_rf(p_dm_odm, rfpath, p_power_trim_info->bb_gain[channel_idx][rfpath]);
+				}
+
+			} else if (*p_dm_odm->p_band_type == ODM_BAND_5G && p_power_trim_info->flag & KFREE_FLAG_ON_5G) {
+
+				if (channel_to_sw >= 36 && channel_to_sw <= 48)
+					channel_idx = PHYDM_5GLB1;
+				if (channel_to_sw >= 52 && channel_to_sw <= 64)
+					channel_idx = PHYDM_5GLB2;
+				if (channel_to_sw >= 100 && channel_to_sw <= 120)
+					channel_idx = PHYDM_5GMB1;
+				if (channel_to_sw >= 122 && channel_to_sw <= 144)
+					channel_idx = PHYDM_5GMB2;
+				if (channel_to_sw >= 149 && channel_to_sw <= 177)
+					channel_idx = PHYDM_5GHB;
+
+				for (rfpath = ODM_RF_PATH_A;  rfpath < max_rf_path; rfpath++) {
+					ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] phydm_kfree(): channel_to_sw=%d PATH_%d bb_gain:0x%X\n", channel_to_sw, rfpath, p_power_trim_info->bb_gain[channel_idx][rfpath]));
+					phydm_set_kfree_to_rf(p_dm_odm, rfpath, p_power_trim_info->bb_gain[channel_idx][rfpath]);
+				}
+			}
+			else {
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] Set default Register\n"));
+				for (rfpath = ODM_RF_PATH_A;  rfpath < max_rf_path; rfpath++)
+					phydm_clear_kfree_to_rf(p_dm_odm, rfpath, p_power_trim_info->bb_gain[channel_idx][rfpath]);
+			}
+		} else {
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("[kfree] phy_ConfigKFree(): targetval not defined, Don't execute KFree Process.\n"));
+			return;
+		}
+	}
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("<===[kfree] phy_ConfigKFree()\n"));
+}
diff --git a/rtl8822BU/hal/phydm/halrf/halrf_kfree.h b/rtl8822BU/hal/phydm/halrf/halrf_kfree.h
new file mode 100644
index 0000000..5bdc8a0
--- a/dev/null
+++ b/rtl8822BU/hal/phydm/halrf/halrf_kfree.h
@@ -0,0 +1,123 @@
+
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+#ifndef	__PHYDMKFREE_H__
+#define    __PHYDKFREE_H__
+
+#define KFREE_VERSION	"1.0"
+
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_AP))
+
+#define	BB_GAIN_NUM		6
+#define KFREE_FLAG_ON				BIT(0)
+#define KFREE_FLAG_THERMAL_K_ON		BIT(1)
+
+#endif
+
+#define KFREE_FLAG_ON_2G				BIT(2)
+#define KFREE_FLAG_ON_5G				BIT(3)
+
+#define PPG_THERMAL_OFFSET_8821C				0x1EF
+#define PPG_BB_GAIN_2G_TXAB_OFFSET_8821C		0x1EE
+#define PPG_BB_GAIN_5GL1_TXA_OFFSET_8821C		0x1EC
+#define PPG_BB_GAIN_5GL2_TXA_OFFSET_8821C		0x1E8
+#define PPG_BB_GAIN_5GM1_TXA_OFFSET_8821C		0x1E4
+#define PPG_BB_GAIN_5GM2_TXA_OFFSET_8821C		0x1E0
+#define PPG_BB_GAIN_5GH1_TXA_OFFSET_8821C		0x1DC
+
+
+
+#define PPG_THERMAL_OFFSET				0x3EF
+#define PPG_BB_GAIN_2G_TXAB_OFFSET		0x3EE
+#define PPG_BB_GAIN_2G_TXCD_OFFSET		0x3ED
+#define PPG_BB_GAIN_5GL1_TXA_OFFSET		0x3EC
+#define PPG_BB_GAIN_5GL1_TXB_OFFSET		0x3EB
+#define PPG_BB_GAIN_5GL1_TXC_OFFSET		0x3EA
+#define PPG_BB_GAIN_5GL1_TXD_OFFSET		0x3E9
+#define PPG_BB_GAIN_5GL2_TXA_OFFSET		0x3E8
+#define PPG_BB_GAIN_5GL2_TXB_OFFSET		0x3E7
+#define PPG_BB_GAIN_5GL2_TXC_OFFSET		0x3E6
+#define PPG_BB_GAIN_5GL2_TXD_OFFSET		0x3E5
+#define PPG_BB_GAIN_5GM1_TXA_OFFSET		0x3E4
+#define PPG_BB_GAIN_5GM1_TXB_OFFSET		0x3E3
+#define PPG_BB_GAIN_5GM1_TXC_OFFSET		0x3E2
+#define PPG_BB_GAIN_5GM1_TXD_OFFSET		0x3E1
+#define PPG_BB_GAIN_5GM2_TXA_OFFSET		0x3E0
+#define PPG_BB_GAIN_5GM2_TXB_OFFSET		0x3DF
+#define PPG_BB_GAIN_5GM2_TXC_OFFSET		0x3DE
+#define PPG_BB_GAIN_5GM2_TXD_OFFSET		0x3DD
+#define PPG_BB_GAIN_5GH1_TXA_OFFSET		0x3DC
+#define PPG_BB_GAIN_5GH1_TXB_OFFSET		0x3DB
+#define PPG_BB_GAIN_5GH1_TXC_OFFSET		0x3DA
+#define PPG_BB_GAIN_5GH1_TXD_OFFSET		0x3D9
+
+#define PPG_PA_BIAS_2G_TXA_OFFSET		0x3D5
+#define PPG_PA_BIAS_2G_TXB_OFFSET		0x3D6
+
+
+
+struct odm_power_trim_data {
+	u8 flag;
+	s8 bb_gain[BB_GAIN_NUM][MAX_RF_PATH];
+	s8 thermal;
+};
+
+
+
+enum phydm_kfree_channeltosw {
+	PHYDM_2G = 0,
+	PHYDM_5GLB1 = 1,
+	PHYDM_5GLB2 = 2,
+	PHYDM_5GMB1 = 3,
+	PHYDM_5GMB2 = 4,
+	PHYDM_5GHB = 5,
+};
+
+
+
+void
+phydm_get_thermal_trim_offset(
+	void	*p_dm_void
+);
+
+void
+phydm_get_power_trim_offset(
+	void	*p_dm_void
+);
+
+void
+phydm_get_pa_bias_offset(
+	void	*p_dm_void
+);
+
+s8
+phydm_get_thermal_offset(
+	void	*p_dm_void
+);
+
+void
+phydm_config_kfree(
+	void	*p_dm_void,
+	u8	channel_to_sw
+);
+
+
+#endif
diff --git a/rtl8822BU/hal/phydm/phydm_powertracking_ap.c b/rtl8822BU/hal/phydm/halrf/halrf_powertracking_ap.c
index 2fae088..3868182 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_powertracking_ap.c
+++ b/rtl8822BU/hal/phydm/halrf/halrf_powertracking_ap.c
@@ -515,50 +515,6 @@ u8 cck_swing_table_ch14_92e[CCK_TABLE_SIZE_92E][8] = {
 	/* Index53 -15.9dB */    {0x09, 0x08, 0x07, 0x06, 0x00, 0x00, 0x00, 0x00}
 };
 #endif
-
-#ifdef AP_BUILD_WORKAROUND
-
-unsigned int tx_pwr_trk_ofdm_swing_tbl[tx_pwr_trk_ofdm_swing_tbl_len] = {
-	/*  +6.0dB */ 0x7f8001fe,
-	/*  +5.5dB */ 0x788001e2,
-	/*  +5.0dB */ 0x71c001c7,
-	/*  +4.5dB */ 0x6b8001ae,
-	/*  +4.0dB */ 0x65400195,
-	/*  +3.5dB */ 0x5fc0017f,
-	/*  +3.0dB */ 0x5a400169,
-	/*  +2.5dB */ 0x55400155,
-	/*  +2.0dB */ 0x50800142,
-	/*  +1.5dB */ 0x4c000130,
-	/*  +1.0dB */ 0x47c0011f,
-	/*  +0.5dB */ 0x43c0010f,
-	/*   0.0dB */ 0x40000100,
-	/*  -0.5dB */ 0x3c8000f2,
-	/*  -1.0dB */ 0x390000e4,
-	/*  -1.5dB */ 0x35c000d7,
-	/*  -2.0dB */ 0x32c000cb,
-	/*  -2.5dB */ 0x300000c0,
-	/*  -3.0dB */ 0x2d4000b5,
-	/*  -3.5dB */ 0x2ac000ab,
-	/*  -4.0dB */ 0x288000a2,
-	/*  -4.5dB */ 0x26000098,
-	/*  -5.0dB */ 0x24000090,
-	/*  -5.5dB */ 0x22000088,
-	/*  -6.0dB */ 0x20000080,
-	/*  -6.5dB */ 0x1a00006c,
-	/*  -7.0dB */ 0x1c800072,
-	/*  -7.5dB */ 0x18000060,
-	/*  -8.0dB */ 0x19800066,
-	/*  -8.5dB */ 0x15800056,
-	/*  -9.0dB */ 0x26c0005b,
-	/*  -9.5dB */ 0x14400051,
-	/* -10.0dB */ 0x24400051,
-	/* -10.5dB */ 0x1300004c,
-	/* -11.0dB */ 0x12000048,
-	/* -11.5dB */ 0x11000044,
-	/* -12.0dB */ 0x10000040
-};
-#endif
-
 #endif
 
 
@@ -872,6 +828,50 @@ u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D] = {
 	0x78C,
 	0x7FF,
 };
+/* JJ ADD 20161014 */
+u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = {
+	0x0CD,
+	0x0D9,
+	0x0E6,
+	0x0F3,
+	0x102,
+	0x111,
+	0x121,
+	0x132,
+	0x144,
+	0x158,
+	0x16C,
+	0x182,
+	0x198,
+	0x1B1,
+	0x1CA,
+	0x1E5,
+	0x202,
+	0x221,
+	0x241,
+	0x263,
+	0x287,
+	0x2AE,
+	0x2D6,
+	0x301,
+	0x32F,
+	0x35F,
+	0x392,
+	0x3C9,
+	0x402,
+	0x43F,
+	0x47F,
+	0x4C3,
+	0x50C,
+	0x558,
+	0x5A9,
+	0x5FF,
+	0x65A,
+	0x6BA,
+	0x720,
+	0x78C,
+	0x7FF,
+};
 
 
 /* #endif */
@@ -955,14 +955,14 @@ odm_txpowertracking_thermal_meter_init(
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	PMGNT_INFO	p_mgnt_info = &adapter->mgnt_info;
+	PMGNT_INFO	p_mgnt_info = &adapter->MgntInfo;
 	HAL_DATA_TYPE		*p_hal_data = GET_HAL_DATA(adapter);
 
 	p_mgnt_info->is_txpowertracking = true;
 	p_hal_data->tx_powercount       = 0;
 	p_hal_data->is_txpowertracking_init = false;
 
-	if (p_dm_odm->mp_mode == false)
+	if (*(p_dm_odm->p_mp_mode) == false)
 		p_hal_data->txpowertrack_control = true;
 	ODM_RT_TRACE(p_dm_odm, COMP_POWER_TRACKING, DBG_LOUD, ("p_mgnt_info->is_txpowertracking = %d\n", p_mgnt_info->is_txpowertracking));
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
@@ -972,7 +972,7 @@ odm_txpowertracking_thermal_meter_init(
 		p_dm_odm->rf_calibrate_info.tx_powercount = 0;
 		p_dm_odm->rf_calibrate_info.is_txpowertracking_init = _FALSE;
 
-		if (p_dm_odm->mp_mode == false)
+		if (*(p_dm_odm->p_mp_mode) == false)
 			p_dm_odm->rf_calibrate_info.txpowertrack_control = _TRUE;
 
 		MSG_8192C("p_dm_odm txpowertrack_control = %d\n", p_dm_odm->rf_calibrate_info.txpowertrack_control);
@@ -989,7 +989,7 @@ odm_txpowertracking_thermal_meter_init(
 			pdmpriv->tx_powercount = 0;
 			pdmpriv->is_txpowertracking_init = _FALSE;
 
-			if (p_dm_odm->mp_mode == false)		/* for mp driver, turn off txpwrtracking as default */
+			if (*(p_dm_odm->p_mp_mode) == false)		/* for mp driver, turn off txpwrtracking as default */
 				pdmpriv->txpowertrack_control = _TRUE;
 
 		}
@@ -1064,10 +1064,10 @@ odm_txpowertracking_check(
 	/* For CE/NIC use struct _ADAPTER* */
 	/*  */
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _hal_rf_				*p_rf = &(p_dm_odm->rf_table);
 
 
-
-	if (!(p_dm_odm->support_ability & ODM_RF_TX_PWR_TRACK))
+	if (!(p_rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
 		return;
 
 	/*  */
@@ -1087,10 +1087,6 @@ odm_txpowertracking_check(
 	case	ODM_AP:
 		odm_txpowertracking_check_ap(p_dm_odm);
 		break;
-
-	case	ODM_ADSL:
-		/*odm_DIGAP(p_dm_odm);*/
-		break;
 	}
 
 }
@@ -1103,11 +1099,13 @@ odm_txpowertracking_check_ce(
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _ADAPTER	*adapter = p_dm_odm->adapter;
+	struct _hal_rf_				*p_rf = &(p_dm_odm->rf_table);
 
 #if (RTL8188E_SUPPORT == 1)
 
 	/* if(!p_mgnt_info->is_txpowertracking || (!pdmpriv->txpowertrack_control && pdmpriv->is_ap_kdone)) */
-	if (!(p_dm_odm->support_ability & ODM_RF_TX_PWR_TRACK))
+
+	if (!(p_rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
 		return;
 
 	if (!p_dm_odm->rf_calibrate_info.tm_trigger) {	/* at least delay 1 sec */
@@ -1166,40 +1164,3 @@ odm_txpowertracking_check_ap(
 #endif
 
 }
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-
-void
-odm_txpowertracking_thermal_meter_check(
-	struct _ADAPTER		*adapter
-)
-{
-#ifndef AP_BUILD_WORKAROUND
-#if (HAL_CODE_BASE == RTL8192_C)
-	PMGNT_INFO		p_mgnt_info = &adapter->mgnt_info;
-	/* HAL_DATA_TYPE			*p_hal_data = GET_HAL_DATA(adapter); */
-	static u8			tm_trigger = 0;
-	/* u8					TxPowerCheckCnt = 5;	 */ /* 10 sec */
-
-	if (!p_mgnt_info->is_txpowertracking /*|| (!p_hal_data->txpowertrack_control && p_hal_data->is_ap_kdone)*/)
-		return;
-
-	if (!tm_trigger) {	/* at least delay 1 sec */
-		if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_8812(adapter))
-			phy_set_rf_reg(adapter, RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03);
-		else
-			phy_set_rf_reg(adapter, RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60);
-		RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("Trigger 92C Thermal Meter!!\n"));
-
-		tm_trigger = 1;
-		return;
-	} else {
-		RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("Schedule TxPowerTracking direct call!!\n"));
-		odm_txpowertracking_direct_call(adapter); /* Using direct call is instead, added by Roger, 2009.06.18. */
-		tm_trigger = 0;
-	}
-#endif
-#endif
-}
-
-#endif
diff --git a/rtl8822BU/hal/phydm/phydm_powertracking_ap.h b/rtl8822BU/hal/phydm/halrf/halrf_powertracking_ap.h
index 30f5bea..e2324d4 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_powertracking_ap.h
+++ b/rtl8822BU/hal/phydm/halrf/halrf_powertracking_ap.h
@@ -21,7 +21,7 @@
 #ifndef	__PHYDMPOWERTRACKING_H__
 #define    __PHYDMPOWERTRACKING_H__
 
-#define POWRTRACKING_VERSION	"1.1"
+#define HALRF_POWRTRACKING_VER	"1.1"
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
 	#ifdef RTK_AC_SUPPORT
@@ -41,6 +41,8 @@
 #define		MAX_RF_PATH	4
 #define		TXSCALE_TABLE_SIZE		37
 #define		CCK_TABLE_SIZE_8723D		41
+/* JJ ADD 20161014 */
+#define		CCK_TABLE_SIZE_8710B		41
 
 #define IQK_MAC_REG_NUM		4
 #define IQK_ADDA_REG_NUM		16
@@ -110,11 +112,13 @@ static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4
 #endif
 
 extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
+/* JJ ADD 20161014 */
+extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
 
 #define dm_check_txpowertracking	odm_txpowertracking_check
 
 struct _IQK_MATRIX_REGS_SETTING {
-	bool	is_iqk_done;
+	boolean	is_iqk_done;
 	s32		value[1][iqk_matrix_reg_num];
 };
 
@@ -129,8 +133,8 @@ struct odm_rf_calibration_structure {
 
 	/* u8 is_txpowertracking; */
 	u8	tx_powercount;
-	bool is_txpowertracking_init;
-	bool is_txpowertracking;
+	boolean is_txpowertracking_init;
+	boolean is_txpowertracking;
 	u8  	txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */
 	u8	tm_trigger;
 	u8  	internal_pa_5g[2];	/* pathA / pathB */
@@ -147,10 +151,10 @@ struct odm_rf_calibration_structure {
 	u8	thermal_value_crystal;
 	u8	thermal_value_dpk_store;
 	u8	thermal_value_dpk_track;
-	bool	txpowertracking_in_progress;
-	bool	is_dpk_enable;
+	boolean	txpowertracking_in_progress;
+	boolean	is_dpk_enable;
 
-	bool	is_reloadtxpowerindex;
+	boolean	is_reloadtxpowerindex;
 	u8	is_rf_pi_enable;
 	u32 	txpowertracking_callback_cnt; /* cosa add for debug */
 
@@ -160,7 +164,7 @@ struct odm_rf_calibration_structure {
 	s8	power_index_offset;
 	s8	delta_power_index;
 	s8	delta_power_index_last;
-	bool is_tx_power_changed;
+	boolean is_tx_power_changed;
 
 	u8	thermal_value_hp[HP_THERMAL_NUM];
 	u8	thermal_value_hp_index;
@@ -212,24 +216,24 @@ struct odm_rf_calibration_structure {
 #else
 	u8			bb_swing_idx_ofdm_base;
 #endif
-	bool			bb_swing_flag_ofdm;
+	boolean			bb_swing_flag_ofdm;
 	u8			bb_swing_idx_cck;
 	u8			bb_swing_idx_cck_current;
 	u8			bb_swing_idx_cck_base;
 	u8			default_ofdm_index;
 	u8			default_cck_index;
-	bool			bb_swing_flag_cck;
+	boolean			bb_swing_flag_cck;
 
 	s8			absolute_ofdm_swing_idx[MAX_RF_PATH];
 	s8			remnant_ofdm_swing_idx[MAX_RF_PATH];
 	s8			absolute_cck_swing_idx[MAX_RF_PATH];
 	s8			remnant_cck_swing_idx;
 	s8			modify_tx_agc_value;       /*Remnat compensate value at tx_agc */
-	bool			modify_tx_agc_flag_path_a;
-	bool			modify_tx_agc_flag_path_b;
-	bool			modify_tx_agc_flag_path_c;
-	bool			modify_tx_agc_flag_path_d;
-	bool			modify_tx_agc_flag_path_a_cck;
+	boolean			modify_tx_agc_flag_path_a;
+	boolean			modify_tx_agc_flag_path_b;
+	boolean			modify_tx_agc_flag_path_c;
+	boolean			modify_tx_agc_flag_path_d;
+	boolean			modify_tx_agc_flag_path_a_cck;
 
 	s8			kfree_offset[MAX_RF_PATH];
 
@@ -245,12 +249,12 @@ struct odm_rf_calibration_structure {
 	u32	reg860;
 	u32	reg864;
 
-	bool	is_iqk_initialized;
-	bool is_lck_in_progress;
-	bool	is_antenna_detected;
-	bool	is_need_iqk;
-	bool	is_iqk_in_progress;
-	bool	is_iqk_pa_off;
+	boolean	is_iqk_initialized;
+	boolean is_lck_in_progress;
+	boolean	is_antenna_detected;
+	boolean	is_need_iqk;
+	boolean	is_iqk_in_progress;
+	boolean	is_iqk_pa_off;
 	u8	delta_iqk;
 	u32	ADDA_backup[IQK_ADDA_REG_NUM];
 	u32	IQK_MAC_backup[IQK_MAC_REG_NUM];
@@ -268,7 +272,7 @@ struct odm_rf_calibration_structure {
 	u8	iqk_step;
 	u8	kcount;
 	u8	retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */
-	bool	is_mp_mode;
+	boolean	is_mp_mode;
 
 	/* for APK */
 	u32 	ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */
diff --git a/rtl8822BU/hal/phydm/phydm_powertracking_ce.c b/rtl8822BU/hal/phydm/halrf/halrf_powertracking_ce.c
index 08c5942..5bc1b5f 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_powertracking_ce.c
+++ b/rtl8822BU/hal/phydm/halrf/halrf_powertracking_ce.c
@@ -379,6 +379,50 @@ u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D] = {
 	0x78C,
 	0x7FF,
 };
+/* JJ ADD 20161014 */
+u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = {
+	0x0CD,          /*0 ,    -20dB*/
+	0x0D9,
+	0x0E6,
+	0x0F3,
+	0x102,
+	0x111,
+	0x121,
+	0x132,
+	0x144,
+	0x158,
+	0x16C,
+	0x182,
+	0x198,
+	0x1B1,
+	0x1CA,
+	0x1E5,
+	0x202,
+	0x221,
+	0x241,
+	0x263,
+	0x287,
+	0x2AE,
+	0x2D6,
+	0x301,
+	0x32F,
+	0x35F,
+	0x392,
+	0x3C9,
+	0x402,
+	0x43F,
+	0x47F,
+	0x4C3,
+	0x50C,
+	0x558,
+	0x5A9,
+	0x5FF,
+	0x65A,
+	0x6BA,
+	0x720,
+	0x78C,
+	0x7FF,
+};
 
 
 u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = {
@@ -421,51 +465,6 @@ u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = {
 	0x3FE  /* 36, +6.0dB	*/
 };
 
-#ifdef AP_BUILD_WORKAROUND
-
-unsigned int tx_pwr_trk_ofdm_swing_tbl[tx_pwr_trk_ofdm_swing_tbl_len] = {
-	/*  +6.0dB */ 0x7f8001fe,
-	/*  +5.5dB */ 0x788001e2,
-	/*  +5.0dB */ 0x71c001c7,
-	/*  +4.5dB */ 0x6b8001ae,
-	/*  +4.0dB */ 0x65400195,
-	/*  +3.5dB */ 0x5fc0017f,
-	/*  +3.0dB */ 0x5a400169,
-	/*  +2.5dB */ 0x55400155,
-	/*  +2.0dB */ 0x50800142,
-	/*  +1.5dB */ 0x4c000130,
-	/*  +1.0dB */ 0x47c0011f,
-	/*  +0.5dB */ 0x43c0010f,
-	/*   0.0dB */ 0x40000100,
-	/*  -0.5dB */ 0x3c8000f2,
-	/*  -1.0dB */ 0x390000e4,
-	/*  -1.5dB */ 0x35c000d7,
-	/*  -2.0dB */ 0x32c000cb,
-	/*  -2.5dB */ 0x300000c0,
-	/*  -3.0dB */ 0x2d4000b5,
-	/*  -3.5dB */ 0x2ac000ab,
-	/*  -4.0dB */ 0x288000a2,
-	/*  -4.5dB */ 0x26000098,
-	/*  -5.0dB */ 0x24000090,
-	/*  -5.5dB */ 0x22000088,
-	/*  -6.0dB */ 0x20000080,
-	/*  -6.5dB */ 0x1a00006c,
-	/*  -7.0dB */ 0x1c800072,
-	/*  -7.5dB */ 0x18000060,
-	/*  -8.0dB */ 0x19800066,
-	/*  -8.5dB */ 0x15800056,
-	/*  -9.0dB */ 0x26c0005b,
-	/*  -9.5dB */ 0x14400051,
-	/* -10.0dB */ 0x24400051,
-	/* -10.5dB */ 0x1300004c,
-	/* -11.0dB */ 0x12000048,
-	/* -11.5dB */ 0x11000044,
-	/* -12.0dB */ 0x10000040
-};
-#endif
-
-
-
 void
 odm_txpowertracking_init(
 	void	*p_dm_void
@@ -486,8 +485,10 @@ get_swing_index(
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
+#endif
 	u8			i = 0;
 	u32			bb_swing;
 	u32			swing_table_size;
@@ -526,6 +527,37 @@ get_swing_index(
 	return i;
 }
 
+u8
+get_cck_swing_index(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+
+	u8			i = 0;
+	u32			bb_cck_swing;
+
+	if (p_dm_odm->support_ic_type == ODM_RTL8188E || p_dm_odm->support_ic_type == ODM_RTL8723B ||
+	    p_dm_odm->support_ic_type == ODM_RTL8192E) {
+		bb_cck_swing = odm_read_1byte(p_dm_odm, 0xa22);
+
+		for (i = 0; i < CCK_TABLE_SIZE; i++) {
+			if (bb_cck_swing == cck_swing_table_ch1_ch13_new[i][0])
+				break;
+		}
+	} else if (p_dm_odm->support_ic_type == ODM_RTL8703B) {
+		bb_cck_swing = odm_read_1byte(p_dm_odm, 0xa22);
+
+		for (i = 0; i < CCK_TABLE_SIZE_88F; i++) {
+			if (bb_cck_swing == cck_swing_table_ch1_ch14_88f[i][0])
+				break;
+		}
+	}
+
+	return i;
+}
+
+
 void
 odm_txpowertracking_thermal_meter_init(
 	void	*p_dm_void
@@ -533,28 +565,34 @@ odm_txpowertracking_thermal_meter_init(
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	u8 default_swing_index = get_swing_index(p_dm_odm);
+	u8 default_cck_swing_index = get_cck_swing_index(p_dm_odm);
 	u8			p = 0;
 	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
 
-	if (p_dm_odm->mp_mode == false)
+	if (*(p_dm_odm->p_mp_mode) == false)
 		p_hal_data->txpowertrack_control = true;
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
+#ifdef DM_ODM_CE_MAC80211
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+	struct rtl_efuse *rtlefu = rtl_efuse(rtlpriv);
+#else
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
+#endif
 
 	p_rf_calibrate_info->is_txpowertracking = _TRUE;
 	p_rf_calibrate_info->tx_powercount = 0;
 	p_rf_calibrate_info->is_txpowertracking_init = _FALSE;
 
-	if (p_dm_odm->mp_mode == false)
+	if (*(p_dm_odm->p_mp_mode) == false)
 		p_rf_calibrate_info->txpowertrack_control = _TRUE;
 	else
 		p_rf_calibrate_info->txpowertrack_control = _FALSE;
 
-	if (p_dm_odm->mp_mode == false)
+	if (*(p_dm_odm->p_mp_mode) == false)
 		p_rf_calibrate_info->txpowertrack_control = _TRUE;
 
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("p_dm_odm txpowertrack_control = %d\n", p_rf_calibrate_info->txpowertrack_control));
@@ -571,22 +609,31 @@ odm_txpowertracking_thermal_meter_init(
 #endif
 
 	/* p_dm_odm->rf_calibrate_info.txpowertrack_control = true; */
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	p_rf_calibrate_info->thermal_value = rtlefu->eeprom_thermalmeter;
+	p_rf_calibrate_info->thermal_value_iqk = rtlefu->eeprom_thermalmeter;
+	p_rf_calibrate_info->thermal_value_lck = rtlefu->eeprom_thermalmeter;
+#else
 	p_rf_calibrate_info->thermal_value = p_hal_data->eeprom_thermal_meter;
 	p_rf_calibrate_info->thermal_value_iqk = p_hal_data->eeprom_thermal_meter;
 	p_rf_calibrate_info->thermal_value_lck = p_hal_data->eeprom_thermal_meter;
+#endif
 
 	if (p_rf_calibrate_info->default_bb_swing_index_flag != true) {
 		/*The index of "0 dB" in SwingTable.*/
 		if (p_dm_odm->support_ic_type == ODM_RTL8188E || p_dm_odm->support_ic_type == ODM_RTL8723B ||
 		    p_dm_odm->support_ic_type == ODM_RTL8192E || p_dm_odm->support_ic_type == ODM_RTL8703B) {
 			p_rf_calibrate_info->default_ofdm_index = (default_swing_index >= OFDM_TABLE_SIZE) ? 30 : default_swing_index;
-			p_rf_calibrate_info->default_cck_index = 20;
+			p_rf_calibrate_info->default_cck_index = (default_cck_swing_index >= CCK_TABLE_SIZE) ? 20 : default_cck_swing_index;
 		} else if (p_dm_odm->support_ic_type == ODM_RTL8188F) {          /*add by Mingzhi.Guo  2015-03-23*/
 			p_rf_calibrate_info->default_ofdm_index = 28;							/*OFDM: -1dB*/
 			p_rf_calibrate_info->default_cck_index = 20;							/*CCK:-6dB*/
 		} else if (p_dm_odm->support_ic_type == ODM_RTL8723D) {			 /*add by zhaohe  2015-10-27*/
 			p_rf_calibrate_info->default_ofdm_index = 28;						 	   /*OFDM: -1dB*/
 			p_rf_calibrate_info->default_cck_index = 28;							/*CCK:   -6dB*/
+		} else if (p_dm_odm->support_ic_type == ODM_RTL8710B) {		/* JJ ADD 20161014 */
+			p_rf_calibrate_info->default_ofdm_index = 28;						 	   /*OFDM: -1dB*/
+			p_rf_calibrate_info->default_cck_index = 28;							   /*CCK:   -6dB*/
 		} else {
 			p_rf_calibrate_info->default_ofdm_index = (default_swing_index >= TXSCALE_TABLE_SIZE) ? 24 : default_swing_index;
 			p_rf_calibrate_info->default_cck_index = 24;
@@ -644,10 +691,12 @@ odm_txpowertracking_check_ce(
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _hal_rf_				*p_rf = &(p_dm_odm->rf_table);
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	struct _ADAPTER	*adapter = p_dm_odm->adapter;
 
-	if (!(p_dm_odm->support_ability & ODM_RF_TX_PWR_TRACK))
+
+	if (!(p_rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
 		return;
 
 	if (!p_dm_odm->rf_calibrate_info.tm_trigger) {
@@ -655,8 +704,8 @@ odm_txpowertracking_check_ce(
 		if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_8188F(adapter) || IS_HARDWARE_TYPE_8192E(adapter)
 		    || IS_HARDWARE_TYPE_8723B(adapter) || IS_HARDWARE_TYPE_JAGUAR(adapter) || IS_HARDWARE_TYPE_8814A(adapter)
 		    || IS_HARDWARE_TYPE_8703B(adapter) || IS_HARDWARE_TYPE_8723D(adapter) || IS_HARDWARE_TYPE_8822B(adapter)
-		    || IS_HARDWARE_TYPE_8821C(adapter)
-		   )
+		    || IS_HARDWARE_TYPE_8821C(adapter)  || (p_dm_odm->support_ic_type == ODM_RTL8710B)
+		   )/* JJ ADD 20161014 */
 			odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, RF_T_METER_NEW, (BIT(17) | BIT(16)), 0x03);
 		else
 			odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, RF_T_METER_OLD, RFREGOFFSETMASK, 0x60);
@@ -667,7 +716,11 @@ odm_txpowertracking_check_ce(
 		return;
 	} else {
 
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+		odm_txpowertracking_callback_thermal_meter(p_dm_odm);
+#else
 		odm_txpowertracking_callback_thermal_meter(adapter);
+#endif
 		p_dm_odm->rf_calibrate_info.tm_trigger = 0;
 	}
 
@@ -679,8 +732,8 @@ odm_txpowertracking_check_mp(
 	void	*p_dm_void
 )
 {
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _ADAPTER	*adapter = p_dm_odm->adapter;
 
 	if (odm_check_power_status(adapter) == false) {
@@ -699,47 +752,11 @@ odm_txpowertracking_check_ap(
 	void	*p_dm_void
 )
 {
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct rtl8192cd_priv	*priv		= p_dm_odm->priv;
 
 	return;
 
 #endif
 }
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void
-odm_txpowertracking_thermal_meter_check(
-	struct _ADAPTER		*adapter
-)
-{
-#ifndef AP_BUILD_WORKAROUND
-	static u8			tm_trigger = 0;
-
-	if (!(GET_HAL_DATA(adapter)->dm_out_src.support_ability & ODM_RF_TX_PWR_TRACK)) {
-		RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,
-			("===>odm_txpowertracking_thermal_meter_check(),p_mgnt_info->is_txpowertracking is false, return!!\n"));
-		return;
-	}
-
-	if (!tm_trigger) {
-		if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_JAGUAR(adapter) || IS_HARDWARE_TYPE_8192E(adapter) ||
-		    IS_HARDWARE_TYPE_8723B(adapter) || IS_HARDWARE_TYPE_8814A(adapter) || IS_HARDWARE_TYPE_8188F(adapter)
-		    || IS_HARDWARE_TYPE_8703B(adapter) || IS_HARDWARE_TYPE_8723D(adapter))
-			phy_set_rf_reg(adapter, ODM_RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03);
-		else
-			phy_set_rf_reg(adapter, ODM_RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60);
-
-		RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("Trigger Thermal Meter!!\n"));
-
-		tm_trigger = 1;
-		return;
-	} else {
-		RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("Schedule TxPowerTracking direct call!!\n"));
-		odm_txpowertracking_direct_call(adapter);
-		tm_trigger = 0;
-	}
-#endif
-}
-#endif
diff --git a/rtl8822BU/hal/phydm/phydm_powertracking_ce.h b/rtl8822BU/hal/phydm/halrf/halrf_powertracking_ce.h
index 72a30d4..c3d4fe0 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_powertracking_ce.h
+++ b/rtl8822BU/hal/phydm/halrf/halrf_powertracking_ce.h
@@ -21,7 +21,7 @@
 #ifndef	__PHYDMPOWERTRACKING_H__
 #define    __PHYDMPOWERTRACKING_H__
 
-#define POWRTRACKING_VERSION	"1.1"
+#define HALRF_POWRTRACKING_VER	"1.1"
 
 #define		DPK_DELTA_MAPPING_NUM	13
 #define		index_mapping_HP_NUM	15
@@ -30,6 +30,8 @@
 #define	CCK_TABLE_SIZE_88F	21
 #define TXSCALE_TABLE_SIZE		37
 #define CCK_TABLE_SIZE_8723D	41
+/* JJ ADD 20161014 */
+#define CCK_TABLE_SIZE_8710B	41
 
 #define TXPWR_TRACK_TABLE_SIZE	30
 #define DELTA_SWINGIDX_SIZE     30
@@ -47,7 +49,10 @@
 
 
 #define iqk_matrix_reg_num	8
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+#else
 #define IQK_MATRIX_SETTINGS_NUM	(14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */
+#endif
 
 extern	u32 ofdm_swing_table[OFDM_TABLE_SIZE];
 extern	u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8];
@@ -60,19 +65,24 @@ extern	u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
 extern	u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
 extern	u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
 extern	u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
+/* JJ ADD 20161014 */
+extern	u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
 
 extern  u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
 
 /* <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+#else
 static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4,  4,  4,  4,  4,  4,  5,  5,  7,  7,  8,  8,  8,  9,  9,  9,  9,  9};
 static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5,  6,  6,  7,  7,  7,  7,  8,  8,  9,  9, 10, 10, 10, 11, 11, 11, 11};
+#endif
 
 #define dm_check_txpowertracking	odm_txpowertracking_check
 
 struct _IQK_MATRIX_REGS_SETTING {
-	bool	is_iqk_done;
+	boolean	is_iqk_done;
 	s32		value[3][iqk_matrix_reg_num];
-	bool	is_bw_iqk_result_saved[3];
+	boolean	is_bw_iqk_result_saved[3];
 };
 
 struct odm_rf_calibration_structure {
@@ -85,8 +95,8 @@ struct odm_rf_calibration_structure {
 	s32	regebc;
 
 	u8	tx_powercount;
-	bool is_txpowertracking_init;
-	bool is_txpowertracking;
+	boolean is_txpowertracking_init;
+	boolean is_txpowertracking;
 	u8  	txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */
 	u8	tm_trigger;
 	u8  	internal_pa_5g[2];	/* pathA / pathB */
@@ -103,9 +113,9 @@ struct odm_rf_calibration_structure {
 	u8	thermal_value_crystal;
 	u8	thermal_value_dpk_store;
 	u8	thermal_value_dpk_track;
-	bool	txpowertracking_in_progress;
+	boolean	txpowertracking_in_progress;
 
-	bool	is_reloadtxpowerindex;
+	boolean	is_reloadtxpowerindex;
 	u8	is_rf_pi_enable;
 	u32 	txpowertracking_callback_cnt; /* cosa add for debug */
 
@@ -117,7 +127,7 @@ struct odm_rf_calibration_structure {
 	s8	power_index_offset[MAX_RF_PATH];
 	s8	delta_power_index[MAX_RF_PATH];
 	s8	delta_power_index_last[MAX_RF_PATH];
-	bool is_tx_power_changed;
+	boolean is_tx_power_changed;
 	s8	xtal_offset;
 	s8	xtal_offset_last;
 
@@ -174,25 +184,25 @@ struct odm_rf_calibration_structure {
 #else
 	u8			bb_swing_idx_ofdm_base;
 #endif
-	bool		default_bb_swing_index_flag;
-	bool			bb_swing_flag_ofdm;
+	boolean		default_bb_swing_index_flag;
+	boolean			bb_swing_flag_ofdm;
 	u8			bb_swing_idx_cck;
 	u8			bb_swing_idx_cck_current;
 	u8			bb_swing_idx_cck_base;
 	u8			default_ofdm_index;
 	u8			default_cck_index;
-	bool			bb_swing_flag_cck;
+	boolean			bb_swing_flag_cck;
 
 	s8			absolute_ofdm_swing_idx[MAX_RF_PATH];
 	s8			remnant_ofdm_swing_idx[MAX_RF_PATH];
 	s8			absolute_cck_swing_idx[MAX_RF_PATH];
 	s8			remnant_cck_swing_idx;
 	s8			modify_tx_agc_value;       /*Remnat compensate value at tx_agc */
-	bool			modify_tx_agc_flag_path_a;
-	bool			modify_tx_agc_flag_path_b;
-	bool			modify_tx_agc_flag_path_c;
-	bool			modify_tx_agc_flag_path_d;
-	bool			modify_tx_agc_flag_path_a_cck;
+	boolean			modify_tx_agc_flag_path_a;
+	boolean			modify_tx_agc_flag_path_b;
+	boolean			modify_tx_agc_flag_path_c;
+	boolean			modify_tx_agc_flag_path_d;
+	boolean			modify_tx_agc_flag_path_a_cck;
 
 	s8			kfree_offset[MAX_RF_PATH];
 
@@ -208,12 +218,12 @@ struct odm_rf_calibration_structure {
 	u32	reg860;
 	u32	reg864;
 
-	bool	is_iqk_initialized;
-	bool is_lck_in_progress;
-	bool	is_antenna_detected;
-	bool	is_need_iqk;
-	bool	is_iqk_in_progress;
-	bool is_iqk_pa_off;
+	boolean	is_iqk_initialized;
+	boolean is_lck_in_progress;
+	boolean	is_antenna_detected;
+	boolean	is_need_iqk;
+	boolean	is_iqk_in_progress;
+	boolean is_iqk_pa_off;
 	u8	delta_iqk;
 	u32	ADDA_backup[IQK_ADDA_REG_NUM];
 	u32	IQK_MAC_backup[IQK_MAC_REG_NUM];
@@ -225,11 +235,14 @@ struct odm_rf_calibration_structure {
 	u32	rx_iqc_8703b[2][2];	/* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}}*/
 	u32	tx_iqc_8723d[2][3][2];	/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
 	u32	rx_iqc_8723d[2][2][2];	/* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}}*/
+	/* JJ ADD 20161014 */
+	u32	tx_iqc_8710b[2][3][2];	/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
+	u32	rx_iqc_8710b[2][2][2];	/* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}}*/
 
 	u8	iqk_step;
 	u8	kcount;
 	u8	retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */
-	bool	is_mp_mode;
+	boolean	is_mp_mode;
 
 
 
@@ -246,7 +259,7 @@ struct odm_rf_calibration_structure {
 	u8	is_apk_thermal_meter_ignore;
 
 	/* DPK */
-	bool is_dpk_fail;
+	boolean is_dpk_fail;
 	u8	is_dp_done;
 	u8	is_dp_path_aok;
 	u8	is_dp_path_bok;
diff --git a/rtl8822BU/hal/phydm/phydm_powertracking_win.c b/rtl8822BU/hal/phydm/halrf/halrf_powertracking_win.c
index ba9f8a8..ba11f51 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_powertracking_win.c
+++ b/rtl8822BU/hal/phydm/halrf/halrf_powertracking_win.c
@@ -18,9 +18,9 @@
  *
  ******************************************************************************/
 
-/* ************************************************************
- * include files
- * ************************************************************ */
+/*============================================================	*/
+/* include files												*/
+/*============================================================	*/
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
@@ -264,8 +264,6 @@ u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16] = {
 };
 
 
-
-
 u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8] = {
 	{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01},	/* 0, -16.0dB */
 	{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},	/* 1, -15.5dB */
@@ -381,6 +379,50 @@ u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D] = {
 	0x78C,
 	0x7FF,
 };
+/* JJ ADD 20161014 */
+u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = {
+	0x0CD,			 /*0 ,    -20dB*/
+	0x0D9,
+	0x0E6,
+	0x0F3,
+	0x102,
+	0x111,
+	0x121,
+	0x132,
+	0x144,
+	0x158,
+	0x16C,
+	0x182,
+	0x198,
+	0x1B1,
+	0x1CA,
+	0x1E5,
+	0x202,
+	0x221,
+	0x241,
+	0x263,		/*19*/
+	0x287,		/*20*/
+	0x2AE,		/*21*/
+	0x2D6,		/*22*/
+	0x301,		/*23*/
+	0x32F,		/*24*/
+	0x35F,		/*25*/
+	0x392,		/*26*/
+	0x3C9,		/*27*/
+	0x402,		/*28*/
+	0x43F,		/*29*/
+	0x47F,		/*30*/
+	0x4C3,		/*31*/
+	0x50C,		/*32*/
+	0x558,		/*33*/
+	0x5A9,		/*34*/
+	0x5FF,		/*35*/
+	0x65A,		/*36*/
+	0x6BA,
+	0x720,
+	0x78C,
+	0x7FF,
+};
 
 
 u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = {
@@ -423,51 +465,6 @@ u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = {
 	0x3FE  /* 36, +6.0dB */
 };
 
-
-#ifdef AP_BUILD_WORKAROUND
-
-unsigned int tx_pwr_trk_ofdm_swing_tbl[tx_pwr_trk_ofdm_swing_tbl_len] = {
-	/*  +6.0dB */ 0x7f8001fe,
-	/*  +5.5dB */ 0x788001e2,
-	/*  +5.0dB */ 0x71c001c7,
-	/*  +4.5dB */ 0x6b8001ae,
-	/*  +4.0dB */ 0x65400195,
-	/*  +3.5dB */ 0x5fc0017f,
-	/*  +3.0dB */ 0x5a400169,
-	/*  +2.5dB */ 0x55400155,
-	/*  +2.0dB */ 0x50800142,
-	/*  +1.5dB */ 0x4c000130,
-	/*  +1.0dB */ 0x47c0011f,
-	/*  +0.5dB */ 0x43c0010f,
-	/*   0.0dB */ 0x40000100,
-	/*  -0.5dB */ 0x3c8000f2,
-	/*  -1.0dB */ 0x390000e4,
-	/*  -1.5dB */ 0x35c000d7,
-	/*  -2.0dB */ 0x32c000cb,
-	/*  -2.5dB */ 0x300000c0,
-	/*  -3.0dB */ 0x2d4000b5,
-	/*  -3.5dB */ 0x2ac000ab,
-	/*  -4.0dB */ 0x288000a2,
-	/*  -4.5dB */ 0x26000098,
-	/*  -5.0dB */ 0x24000090,
-	/*  -5.5dB */ 0x22000088,
-	/*  -6.0dB */ 0x20000080,
-	/*  -6.5dB */ 0x1a00006c,
-	/*  -7.0dB */ 0x1c800072,
-	/*  -7.5dB */ 0x18000060,
-	/*  -8.0dB */ 0x19800066,
-	/*  -8.5dB */ 0x15800056,
-	/*  -9.0dB */ 0x26c0005b,
-	/*  -9.5dB */ 0x14400051,
-	/* -10.0dB */ 0x24400051,
-	/* -10.5dB */ 0x1300004c,
-	/* -11.0dB */ 0x12000048,
-	/* -11.5dB */ 0x11000044,
-	/* -12.0dB */ 0x10000040
-};
-
-#endif
-
 void
 odm_txpowertracking_init(
 	void		*p_dm_void
@@ -502,7 +499,7 @@ get_swing_index(
 		p_swing_table = ofdm_swing_table_new;
 		swing_table_size = OFDM_TABLE_SIZE;
 	} else {
-		bb_swing = phy_get_tx_bb_swing_8812a(adapter, p_hal_data->current_band_type, ODM_RF_PATH_A);
+		bb_swing = PHY_GetTxBBSwing_8812A(adapter, p_hal_data->CurrentBandType, ODM_RF_PATH_A);
 		p_swing_table = tx_scaling_table_jaguar;
 		swing_table_size = TXSCALE_TABLE_SIZE;
 	}
@@ -518,6 +515,37 @@ get_swing_index(
 	return i;
 }
 
+u8
+get_cck_swing_index(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+
+	u8			i = 0;
+	u32			bb_cck_swing;
+
+	if (p_dm_odm->support_ic_type == ODM_RTL8188E || p_dm_odm->support_ic_type == ODM_RTL8723B ||
+	    p_dm_odm->support_ic_type == ODM_RTL8192E) {
+		bb_cck_swing = odm_read_1byte(p_dm_odm, 0xa22);
+
+		for (i = 0; i < CCK_TABLE_SIZE; i++) {
+			if (bb_cck_swing == cck_swing_table_ch1_ch13_new[i][0])
+				break;
+		}
+	} else if (p_dm_odm->support_ic_type == ODM_RTL8703B) {
+		bb_cck_swing = odm_read_1byte(p_dm_odm, 0xa22);
+
+		for (i = 0; i < CCK_TABLE_SIZE_88F; i++) {
+			if (bb_cck_swing == cck_swing_table_ch1_ch14_88f[i][0])
+				break;
+		}
+	}
+
+	return i;
+}
+
+
 void
 odm_txpowertracking_thermal_meter_init(
 	void		*p_dm_void
@@ -525,6 +553,7 @@ odm_txpowertracking_thermal_meter_init(
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	u8 default_swing_index = get_swing_index(p_dm_odm);
+	u8 default_cck_swing_index = get_cck_swing_index(p_dm_odm);
 	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
@@ -532,7 +561,7 @@ odm_txpowertracking_thermal_meter_init(
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
 	u8			p = 0;
 
-	if (p_dm_odm->mp_mode == false)
+	if (*(p_dm_odm->p_mp_mode) == false)
 		p_rf_calibrate_info->txpowertrack_control = true;
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 #ifdef CONFIG_RTL8188E
@@ -541,7 +570,7 @@ odm_txpowertracking_thermal_meter_init(
 		p_rf_calibrate_info->tx_powercount = 0;
 		p_rf_calibrate_info->is_txpowertracking_init = _FALSE;
 
-		if (p_dm_odm->mp_mode == false)
+		if (*(p_dm_odm->p_mp_mode) == false)
 			p_rf_calibrate_info->txpowertrack_control = _TRUE;
 
 		MSG_8192C("p_dm_odm txpowertrack_control = %d\n", p_rf_calibrate_info->txpowertrack_control);
@@ -556,7 +585,7 @@ odm_txpowertracking_thermal_meter_init(
 		pdmpriv->tx_powercount = 0;
 		pdmpriv->is_txpowertracking_init = _FALSE;
 
-		if (p_dm_odm->mp_mode == false)
+		if (*(p_dm_odm->p_mp_mode) == false)
 			pdmpriv->txpowertrack_control = _TRUE;
 
 		MSG_8192C("pdmpriv->txpowertrack_control = %d\n", pdmpriv->txpowertrack_control);
@@ -593,13 +622,17 @@ odm_txpowertracking_thermal_meter_init(
 		if (p_dm_odm->support_ic_type == ODM_RTL8188E || p_dm_odm->support_ic_type == ODM_RTL8723B ||
 		    p_dm_odm->support_ic_type == ODM_RTL8192E || p_dm_odm->support_ic_type == ODM_RTL8703B) {
 			p_rf_calibrate_info->default_ofdm_index = (default_swing_index >= OFDM_TABLE_SIZE) ? 30 : default_swing_index;
-			p_rf_calibrate_info->default_cck_index = 20;
+			p_rf_calibrate_info->default_cck_index = (default_cck_swing_index >= CCK_TABLE_SIZE) ? 20 : default_cck_swing_index;
 		} else if (p_dm_odm->support_ic_type == ODM_RTL8188F) {          /*add by Mingzhi.Guo  2015-03-23*/
 			p_rf_calibrate_info->default_ofdm_index = 28;							/*OFDM: -1dB*/
 			p_rf_calibrate_info->default_cck_index = 20;							/*CCK:-6dB*/
 		} else if (p_dm_odm->support_ic_type == ODM_RTL8723D) {			 /*add by zhaohe  2015-10-27*/
 			p_rf_calibrate_info->default_ofdm_index = 28;						 	   /*OFDM: -1dB*/
 			p_rf_calibrate_info->default_cck_index = 28;							/*CCK:   -6dB*/
+			/* JJ ADD 20161014 */
+		} else if (p_dm_odm->support_ic_type == ODM_RTL8710B) {			
+			p_rf_calibrate_info->default_ofdm_index = 28;					/*OFDM: -1dB*/
+			p_rf_calibrate_info->default_cck_index = 28;					/*CCK:   -6dB*/
 		} else {
 			p_rf_calibrate_info->default_ofdm_index = (default_swing_index >= TXSCALE_TABLE_SIZE) ? 24 : default_swing_index;
 			p_rf_calibrate_info->default_cck_index = 24;
@@ -662,6 +695,7 @@ odm_txpowertracking_check_ce(
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _hal_rf_				*p_rf = &(p_dm_odm->rf_table);
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	struct _ADAPTER	*adapter = p_dm_odm->adapter;
 #if ((RTL8188F_SUPPORT == 1))
@@ -670,7 +704,7 @@ odm_txpowertracking_check_ce(
 
 #if (RTL8188E_SUPPORT == 1)
 
-	if (!(p_dm_odm->support_ability & ODM_RF_TX_PWR_TRACK))
+	if (!(p_rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
 		return;
 
 	if (!p_rf_calibrate_info->tm_trigger) {
@@ -734,7 +768,7 @@ odm_txpowertracking_direct_call(
 )
 {
 	HAL_DATA_TYPE		*p_hal_data	= GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT			*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT			*p_dm_odm = &p_hal_data->DM_OutSrc;
 
 	odm_txpowertracking_callback_thermal_meter(adapter);
 }
@@ -744,10 +778,12 @@ odm_txpowertracking_thermal_meter_check(
 	struct _ADAPTER		*adapter
 )
 {
-#ifndef AP_BUILD_WORKAROUND
 	static u8			tm_trigger = 0;
+	HAL_DATA_TYPE			*pHalData = GET_HAL_DATA(adapter);
+	struct PHY_DM_STRUCT	*p_dm_odm = &(pHalData->DM_OutSrc);
+	struct _hal_rf_			*p_rf = &(p_dm_odm->rf_table);
 
-	if (!(GET_HAL_DATA(adapter)->dm_out_src.support_ability & ODM_RF_TX_PWR_TRACK)) {
+	if (!(p_rf->rf_supportability & HAL_RF_TX_PWR_TRACK)) {
 		RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,
 			("===>odm_txpowertracking_thermal_meter_check(),p_mgnt_info->is_txpowertracking is false, return!!\n"));
 		return;
@@ -756,10 +792,10 @@ odm_txpowertracking_thermal_meter_check(
 	if (!tm_trigger) {
 		if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_JAGUAR(adapter) || IS_HARDWARE_TYPE_8192E(adapter) ||
 		    IS_HARDWARE_TYPE_8723B(adapter) || IS_HARDWARE_TYPE_8814A(adapter) || IS_HARDWARE_TYPE_8188F(adapter) || IS_HARDWARE_TYPE_8703B(adapter)
-		    || IS_HARDWARE_TYPE_8822B(adapter) || IS_HARDWARE_TYPE_8723D(adapter) || IS_HARDWARE_TYPE_8821C(adapter))
-			phy_set_rf_reg(adapter, ODM_RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03);
+		    || IS_HARDWARE_TYPE_8822B(adapter) || IS_HARDWARE_TYPE_8723D(adapter) || IS_HARDWARE_TYPE_8821C(adapter) || IS_HARDWARE_TYPE_8710B(adapter))/* JJ ADD 20161014 */
+			PHY_SetRFReg(adapter, ODM_RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03);
 		else
-			phy_set_rf_reg(adapter, ODM_RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60);
+			PHY_SetRFReg(adapter, ODM_RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60);
 
 		RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("Trigger Thermal Meter!!\n"));
 
@@ -770,7 +806,6 @@ odm_txpowertracking_thermal_meter_check(
 		odm_txpowertracking_direct_call(adapter);
 		tm_trigger = 0;
 	}
-#endif
 }
 
 #endif
diff --git a/rtl8822BU/hal/phydm/phydm_powertracking_win.h b/rtl8822BU/hal/phydm/halrf/halrf_powertracking_win.h
index a158135..88356c4 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_powertracking_win.h
+++ b/rtl8822BU/hal/phydm/halrf/halrf_powertracking_win.h
@@ -21,18 +21,22 @@
 #ifndef	__PHYDMPOWERTRACKING_H__
 #define    __PHYDMPOWERTRACKING_H__
 
-#define POWRTRACKING_VERSION	"1.1"
+#define HALRF_POWRTRACKING_VER	"1.1"
 
 #define	DPK_DELTA_MAPPING_NUM	13
 #define	index_mapping_HP_NUM	15
 #define	TXSCALE_TABLE_SIZE		37
+#define	OFDM_TABLE_SIZE			43
+#define	CCK_TABLE_SIZE			33
 #define	CCK_TABLE_SIZE_8723D    41
 #define	TXPWR_TRACK_TABLE_SIZE	30
 #define	DELTA_SWINGIDX_SIZE     30
-#define DELTA_SWINTSSI_SIZE     61
+#define	DELTA_SWINTSSI_SIZE     61
 #define	BAND_NUM				3
 #define	MAX_RF_PATH	4
 #define	CCK_TABLE_SIZE_88F	21
+/* JJ ADD 20161014 */
+#define	CCK_TABLE_SIZE_8710B   41
 
 
 #define	dm_check_txpowertracking	odm_txpowertracking_check
@@ -58,6 +62,8 @@ extern	u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
 extern	u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
 extern	u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
 extern	u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
+/* JJ ADD 20161014 */
+extern	u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
 
 extern  u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
 
@@ -107,9 +113,9 @@ odm_txpowertracking_thermal_meter_check(
 #endif
 
 struct _IQK_MATRIX_REGS_SETTING {
-	bool	is_iqk_done;
+	boolean	is_iqk_done;
 	s32		value[3][iqk_matrix_reg_num];
-	bool	is_bw_iqk_result_saved[3];
+	boolean	is_bw_iqk_result_saved[3];
 };
 
 struct odm_rf_calibration_structure {
@@ -122,8 +128,8 @@ struct odm_rf_calibration_structure {
 	s32	regebc;
 	/* u8 is_txpowertracking; */
 	u8	tx_powercount;
-	bool is_txpowertracking_init;
-	bool is_txpowertracking;
+	boolean is_txpowertracking_init;
+	boolean is_txpowertracking;
 	u8  	txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */
 	u8	tm_trigger;
 	u8  	internal_pa_5g[2];	/* pathA / pathB */
@@ -132,12 +138,14 @@ struct odm_rf_calibration_structure {
 	u8	thermal_value;
 	u8	thermal_value_lck;
 	u8	thermal_value_iqk;
+	u8  thermal_value_dpk;
 	s8  	thermal_value_delta; /* delta of thermal_value and efuse thermal */
 	u8	thermal_value_avg[AVG_THERMAL_NUM];
 	u8	thermal_value_avg_index;
 	u8	thermal_value_rx_gain;
 
-	bool	is_reloadtxpowerindex;
+
+	boolean	is_reloadtxpowerindex;
 	u8	is_rf_pi_enable;
 	u32 	txpowertracking_callback_cnt; /* cosa add for debug */
 
@@ -149,7 +157,7 @@ struct odm_rf_calibration_structure {
 	s8	power_index_offset[MAX_RF_PATH];
 	s8	delta_power_index[MAX_RF_PATH];
 	s8	delta_power_index_last[MAX_RF_PATH];
-	bool is_tx_power_changed;
+	boolean is_tx_power_changed;
 	s8	xtal_offset;
 	s8	xtal_offset_last;
 
@@ -206,25 +214,25 @@ struct odm_rf_calibration_structure {
 #else
 	u8			bb_swing_idx_ofdm_base;
 #endif
-	bool		default_bb_swing_index_flag;
-	bool			bb_swing_flag_ofdm;
+	boolean		default_bb_swing_index_flag;
+	boolean			bb_swing_flag_ofdm;
 	u8			bb_swing_idx_cck;
 	u8			bb_swing_idx_cck_current;
 	u8			bb_swing_idx_cck_base;
 	u8			default_ofdm_index;
 	u8			default_cck_index;
-	bool			bb_swing_flag_cck;
+	boolean			bb_swing_flag_cck;
 
 	s8			absolute_ofdm_swing_idx[MAX_RF_PATH];
 	s8			remnant_ofdm_swing_idx[MAX_RF_PATH];
 	s8			absolute_cck_swing_idx[MAX_RF_PATH];
 	s8			remnant_cck_swing_idx;
 	s8			modify_tx_agc_value;       /*Remnat compensate value at tx_agc */
-	bool			modify_tx_agc_flag_path_a;
-	bool			modify_tx_agc_flag_path_b;
-	bool			modify_tx_agc_flag_path_c;
-	bool			modify_tx_agc_flag_path_d;
-	bool			modify_tx_agc_flag_path_a_cck;
+	boolean			modify_tx_agc_flag_path_a;
+	boolean			modify_tx_agc_flag_path_b;
+	boolean			modify_tx_agc_flag_path_c;
+	boolean			modify_tx_agc_flag_path_d;
+	boolean			modify_tx_agc_flag_path_a_cck;
 
 	s8			kfree_offset[MAX_RF_PATH];
 
@@ -240,12 +248,12 @@ struct odm_rf_calibration_structure {
 	u32	reg860;
 	u32	reg864;
 
-	bool	is_iqk_initialized;
-	bool is_lck_in_progress;
-	bool	is_antenna_detected;
-	bool	is_need_iqk;
-	bool	is_iqk_in_progress;
-	bool	is_iqk_pa_off;
+	boolean	is_iqk_initialized;
+	boolean is_lck_in_progress;
+	boolean	is_antenna_detected;
+	boolean	is_need_iqk;
+	boolean	is_iqk_in_progress;
+	boolean	is_iqk_pa_off;
 	u8	delta_iqk;
 	u32	ADDA_backup[IQK_ADDA_REG_NUM];
 	u32	IQK_MAC_backup[IQK_MAC_REG_NUM];
@@ -257,6 +265,9 @@ struct odm_rf_calibration_structure {
 	u32	rx_iqc_8703b[2][2];	/* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}}*/
 	u32	tx_iqc_8723d[2][3][2];	/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
 	u32	rx_iqc_8723d[2][2][2];	/* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}}*/
+	/* JJ ADD 20161014 */
+	u32	tx_iqc_8710b[2][3][2];	/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
+	u32	rx_iqc_8710b[2][2][2];	/* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}}*/
 
 	u64	iqk_start_time;
 	u64	iqk_total_progressing_time;
@@ -265,7 +276,7 @@ struct odm_rf_calibration_structure {
 	u8	iqk_step;
 	u8	kcount;
 	u8	retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */
-	bool	is_mp_mode;
+	boolean	is_mp_mode;
 
 	/* for APK */
 	u32 	ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */
@@ -273,7 +284,7 @@ struct odm_rf_calibration_structure {
 	u8	is_apk_thermal_meter_ignore;
 
 	/* DPK */
-	bool is_dpk_fail;
+	boolean is_dpk_fail;
 	u8	is_dp_done;
 	u8	is_dp_path_aok;
 	u8	is_dp_path_bok;
diff --git a/rtl8822BU/hal/phydm/rtl8822b/halphyrf_8822b.c b/rtl8822BU/hal/phydm/halrf/rtl8822b/halrf_8822b.c
index 3f962c6..d22e88c 100755..100644
--- a/rtl8822BU/hal/phydm/rtl8822b/halphyrf_8822b.c
+++ b/rtl8822BU/hal/phydm/halrf/rtl8822b/halrf_8822b.c
@@ -19,11 +19,15 @@
  ******************************************************************************/
 
 #include "mp_precomp.h"
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 #include "../phydm_precomp.h"
+#else
+#include "../../phydm_precomp.h"
+#endif
 
 #if (RTL8822B_SUPPORT == 1)
 
-bool
+boolean
 get_mix_mode_tx_agc_bb_swing_offset_8822b(
 	void				*p_dm_void,
 	enum pwrtrack_method	method,
@@ -94,7 +98,7 @@ odm_tx_pwr_track_set_pwr8822b(
 	struct _ADAPTER	*adapter = p_dm_odm->adapter;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
 	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
-	u8			channel  = p_hal_data->current_channel;
+	u8			channel  = *p_dm_odm->p_channel;
 	u8			band_width  = p_hal_data->current_channel_bw;
 	u8			tx_power_index = 0;
 	u8			tx_rate = 0xFF;
@@ -102,7 +106,7 @@ odm_tx_pwr_track_set_pwr8822b(
 
 	PHALMAC_PWR_TRACKING_OPTION p_pwr_tracking_opt = &(p_rf_calibrate_info->HALMAC_PWR_TRACKING_INFO);
 
-	if (p_dm_odm->mp_mode == true) {
+	if (*(p_dm_odm->p_mp_mode) == true) {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 #if (MP_DRIVER == 1)
@@ -121,7 +125,7 @@ odm_tx_pwr_track_set_pwr8822b(
 
 		if (!rate) { /*auto rate*/
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-			tx_rate = adapter->hal_func.get_hw_rate_from_m_rate_handler(p_dm_odm->tx_rate);
+			tx_rate = adapter->HalFunc.GetHwRateFromMRateHandler(p_dm_odm->tx_rate);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 			if (p_dm_odm->number_linked_client != 0)
 				tx_rate = hw_rate_to_m_rate(p_dm_odm->tx_rate);
@@ -174,32 +178,43 @@ odm_tx_pwr_track_set_pwr8822b(
 
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+	struct rtl_phy *rtlphy = &(rtlpriv->phy);
+	u8			channel  = rtlphy->current_channel;
+	u8			band_width  = rtlphy->current_chan_bw;
+#else
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	u8			channel  = p_hal_data->current_channel;
-	u8			band_width  = p_hal_data->current_channel_bw;
+	u8			channel  = *p_dm_odm->p_channel;
+	u8			band_width  = *p_dm_odm->p_band_width;
+#endif
 	u8			tx_rate = 0xFF;
 
-	if (p_dm_odm->mp_mode == true) {
+	if (*(p_dm_odm->p_mp_mode) == true) {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 #if (MP_DRIVER == 1)
-		PMPT_CONTEXT p_mpt_ctx = &(adapter->mpt_ctx);
+		PMPT_CONTEXT p_mpt_ctx = &(adapter->MptCtx);
 
-		tx_rate = mpt_to_mgnt_rate(p_mpt_ctx->mpt_rate_index);
+		tx_rate = MptToMgntRate(p_mpt_ctx->MptRateIndex);
 #endif
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
+#if (MP_DRIVER == 1)
 		PMPT_CONTEXT p_mpt_ctx = &(adapter->mppriv.mpt_ctx);
 
 		tx_rate = mpt_to_mgnt_rate(p_mpt_ctx->mpt_rate_index);
 #endif
 #endif
+#endif
 	} else {
 		u16	rate	 = *(p_dm_odm->p_forced_data_rate);
 
 		if (!rate) { /*auto rate*/
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-			tx_rate = adapter->hal_func.get_hw_rate_from_m_rate_handler(p_dm_odm->tx_rate);
+			tx_rate = adapter->HalFunc.GetHwRateFromMRateHandler(p_dm_odm->tx_rate);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+			tx_rate = p_dm_odm->tx_rate;
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 			if (p_dm_odm->number_linked_client != 0)
 				tx_rate = hw_rate_to_m_rate(p_dm_odm->tx_rate);
@@ -219,8 +234,15 @@ odm_tx_pwr_track_set_pwr8822b(
 		("pRF->absolute_ofdm_swing_idx=%d   pRF->remnant_ofdm_swing_idx=%d   pRF->absolute_cck_swing_idx=%d   pRF->remnant_cck_swing_idx=%d   rf_path=%d\n",
 		p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path], p_rf_calibrate_info->remnant_ofdm_swing_idx[rf_path], p_rf_calibrate_info->absolute_cck_swing_idx[rf_path], p_rf_calibrate_info->remnant_cck_swing_idx, rf_path));
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	tx_power_index = phy_get_tx_power_index(adapter, (enum odm_rf_radio_path_e) rf_path, tx_rate, band_width, channel);
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	tx_power_index = odm_get_tx_power_index(p_dm_odm, (enum odm_rf_radio_path_e) rf_path, tx_rate, (CHANNEL_WIDTH)band_width, channel);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
+	if (*(p_dm_odm->p_mp_mode) == true)
+		tx_power_index = odm_get_tx_power_index(p_dm_odm, (enum odm_rf_radio_path_e) rf_path, tx_rate, (CHANNEL_WIDTH)band_width, channel);
+	else {
+		if (p_dm_odm->number_linked_client != 0)
+			tx_power_index = odm_get_tx_power_index(p_dm_odm, (enum odm_rf_radio_path_e) rf_path, tx_rate, (CHANNEL_WIDTH)band_width, channel);
+	}
 #else
 	tx_power_index = config_phydm_read_txagc_8822b(p_dm_odm, rf_path, 0x04); /*0x04(TX_AGC_OFDM_6M)*/
 #endif
@@ -305,10 +327,14 @@ get_delta_swing_table_8822b(
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	u8			channel			= *(p_dm_odm->p_channel);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+	struct rtl_phy *rtlphy = &(rtlpriv->phy);
+	u8			channel  = rtlphy->current_channel;
 #else
 	struct _ADAPTER		*adapter			= p_dm_odm->adapter;
 	HAL_DATA_TYPE	*p_hal_data		= GET_HAL_DATA(adapter);
-	u8			channel			= p_hal_data->current_channel;
+	u8			channel			= *p_dm_odm->p_channel;
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
@@ -347,61 +373,88 @@ _phy_lc_calibrate_8822b(
 	struct PHY_DM_STRUCT	*p_dm_odm
 )
 {
-	u32 lc_cal = 0, cnt = 0;
-
+	u32 lc_cal = 0, cnt = 0,tmp0xc00, tmp0xe00;
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[LCK]LCK start!!!!!!!\n"));
+	tmp0xc00 = odm_read_4byte(p_dm_odm, 0xc00);
+	tmp0xe00 = odm_read_4byte(p_dm_odm, 0xe00);
+	odm_write_4byte(p_dm_odm, 0xc00, 0x4);
+	odm_write_4byte(p_dm_odm, 0xe00, 0x4);
+	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x0, bRFRegOffsetMask, 0x10000);
+	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x0, bRFRegOffsetMask, 0x10000);
 	/*backup RF0x18*/
 	lc_cal = odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK);
-
+	/*disable RTK*/
+	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0xc4, RFREGOFFSETMASK, 0x01402);
 	/*Start LCK*/
 	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, lc_cal | 0x08000);
-
 	ODM_delay_ms(100);
-
 	for (cnt = 0; cnt < 100; cnt++) {
 		if (odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, RF_CHNLBW, 0x8000) != 0x1)
 			break;
 		ODM_delay_ms(10);
 	}
-
 	/*Recover channel number*/
 	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, lc_cal);
+	/*enable RTK*/
+	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0xc4, RFREGOFFSETMASK, 0x81402);
+	/**restore*/
+	odm_write_4byte(p_dm_odm, 0xc00, tmp0xc00);
+	odm_write_4byte(p_dm_odm, 0xe00, tmp0xe00);
+	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x0, bRFRegOffsetMask, 0x3ffff);
+	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x0, bRFRegOffsetMask, 0x3ffff);
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[LCK]LCK end!!!!!!!\n"));
 }
 
-
-
+/*LCK VERSION:0x1*/
 void
 phy_lc_calibrate_8822b(
 	void	*p_dm_void
 )
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	bool	is_start_cont_tx = false, is_single_tone = false, is_carrier_suppression = false;
+	boolean	is_start_cont_tx = false, is_single_tone = false, is_carrier_suppression = false;
 	u64		start_time;
 	u64		progressing_time;
 
+	struct _hal_rf_				*p_rf = &(p_dm_odm->rf_table);
 
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
-	struct _ADAPTER		*p_adapter = p_dm_odm->adapter;
-
 #if (MP_DRIVER == 1)
+	struct _ADAPTER		*p_adapter = p_dm_odm->adapter;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	PMPT_CONTEXT	p_mpt_ctx = &(p_adapter->mpt_ctx);
+	PMPT_CONTEXT	p_mpt_ctx = &(p_adapter->MptCtx);
+	is_start_cont_tx = p_mpt_ctx->bStartContTx;
+	is_single_tone = p_mpt_ctx->bSingleTone;
+	is_carrier_suppression = p_mpt_ctx->bCarrierSuppression;
 #else
 	PMPT_CONTEXT	p_mpt_ctx = &(p_adapter->mppriv.mpt_ctx);
-#endif
 	is_start_cont_tx = p_mpt_ctx->is_start_cont_tx;
 	is_single_tone = p_mpt_ctx->is_single_tone;
 	is_carrier_suppression = p_mpt_ctx->is_carrier_suppression;
 #endif
 #endif
+#endif
+
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
+	if (!(p_rf->rf_supportability & HAL_RF_LCK))
+		return;
+#endif
 
 	if (is_start_cont_tx || is_single_tone || is_carrier_suppression) {
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[LCK]continues TX ing !!! LCK return\n"));
 		return;
 	}
 
+	while (*(p_dm_odm->p_is_scan_in_process)) {
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[LCK]scan is in process, bypass LCK\n"));
+		return;
+	}
+
 	start_time = odm_get_current_time(p_dm_odm);
+	p_dm_odm->rf_calibrate_info.is_lck_in_progress = true;
 	_phy_lc_calibrate_8822b(p_dm_odm);
+	p_dm_odm->rf_calibrate_info.is_lck_in_progress = false;
 	progressing_time = odm_get_progressing_time(p_dm_odm, start_time);
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[LCK]LCK progressing_time = %lld\n", progressing_time));
 }
@@ -435,24 +488,28 @@ void configure_txpower_track_8822b(
 void phy_set_rf_path_switch_8822b(
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	struct PHY_DM_STRUCT		*p_dm_odm,
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct PHY_DM_STRUCT		*p_dm_odm,
 #else
 	struct _ADAPTER	*p_adapter,
 #endif
-	bool		is_main
+	boolean		is_main
 )
 {
-#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+#elif !(DM_ODM_SUPPORT_TYPE & ODM_AP)
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->odmpriv;
 #endif
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 #endif
 #endif
 
 	/*BY SY Request */
 	odm_set_bb_reg(p_dm_odm, 0x4C, (BIT(24) | BIT(23)), 0x2);
+
 	odm_set_bb_reg(p_dm_odm, 0x974, 0xff, 0xff);
 
 	/*odm_set_bb_reg(p_dm_odm, 0x1991, 0x3, 0x0);*/
@@ -469,42 +526,47 @@ void phy_set_rf_path_switch_8822b(
 
 	if (is_main) {
 		/*odm_set_bb_reg(p_dm_odm, 0xCBD, 0x3, 0x2);		WiFi */
-		odm_set_bb_reg(p_dm_odm, 0xCBC, (BIT(9) | BIT8), 0x2);		/*WiFi */
+		odm_set_bb_reg(p_dm_odm, 0xCBC, (BIT(9) | BIT(8)), 0x2);		/*WiFi */
 	} else {
 		/*odm_set_bb_reg(p_dm_odm, 0xCBD, 0x3, 0x1);	 BT*/
-		odm_set_bb_reg(p_dm_odm, 0xCBC, (BIT(9) | BIT8), 0x1);	 /*BT*/
+		odm_set_bb_reg(p_dm_odm, 0xCBC, (BIT(9) | BIT(8)), 0x1);	 /*BT*/
 	}
 }
 
-bool
+boolean
 _phy_query_rf_path_switch_8822b(
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	struct PHY_DM_STRUCT	*p_dm_odm
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct PHY_DM_STRUCT	*p_dm_odm
 #else
 	struct _ADAPTER	*p_adapter
 #endif
 )
 {
-#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+#elif !(DM_ODM_SUPPORT_TYPE & ODM_AP)
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->odmpriv;
 #endif
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 #endif
 #endif
 
-	if (odm_get_bb_reg(p_dm_odm, 0xCBC, (BIT(9) | BIT8)) == 0x2)	/*WiFi */
+	if (odm_get_bb_reg(p_dm_odm, 0xCBC, (BIT(9) | BIT(8))) == 0x2)	/*WiFi */
 		return true;
 	else
 		return false;
 }
 
 
-bool phy_query_rf_path_switch_8822b(
+boolean phy_query_rf_path_switch_8822b(
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	struct PHY_DM_STRUCT		*p_dm_odm
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct PHY_DM_STRUCT		*p_dm_odm
 #else
 	struct _ADAPTER	*p_adapter
 #endif
@@ -517,6 +579,8 @@ bool phy_query_rf_path_switch_8822b(
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	return _phy_query_rf_path_switch_8822b(p_dm_odm);
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	return _phy_query_rf_path_switch_8822b(p_dm_odm);
 #else
 	return _phy_query_rf_path_switch_8822b(p_adapter);
 #endif
diff --git a/rtl8822BU/hal/phydm/rtl8822b/halphyrf_8822b.h b/rtl8822BU/hal/phydm/halrf/rtl8822b/halrf_8822b.h
index 8b0824c..a0fce9d 100755..100644
--- a/rtl8822BU/hal/phydm/rtl8822b/halphyrf_8822b.h
+++ b/rtl8822BU/hal/phydm/halrf/rtl8822b/halrf_8822b.h
@@ -24,6 +24,9 @@
 #define AVG_THERMAL_NUM_8822B	4
 #define RF_T_METER_8822B		0x42
 
+#define LCK_VERSION	"0x2" 
+
+
 void configure_txpower_track_8822b(
 	struct _TXPWRTRACK_CFG	*p_config
 );
@@ -66,10 +69,12 @@ phy_lc_calibrate_8822b(
 void phy_set_rf_path_switch_8822b(
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	struct PHY_DM_STRUCT		*p_dm_odm,
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct PHY_DM_STRUCT		*p_dm_odm,
 #else
 	struct _ADAPTER	*p_adapter,
 #endif
-	bool		is_main
+	boolean		is_main
 );
 
 #endif	/* #ifndef __HAL_PHY_RF_8822B_H__ */
diff --git a/rtl8822BU/hal/phydm/rtl8822b/phydm_iqk_8822b.c b/rtl8822BU/hal/phydm/halrf/rtl8822b/halrf_iqk_8822b.c
index 99adef9..8258445 100755..100644
--- a/rtl8822BU/hal/phydm/rtl8822b/phydm_iqk_8822b.c
+++ b/rtl8822BU/hal/phydm/halrf/rtl8822b/halrf_iqk_8822b.c
@@ -19,13 +19,51 @@
  ******************************************************************************/
 
 #include "mp_precomp.h"
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 #include "../phydm_precomp.h"
+#else
+#include "../../phydm_precomp.h"
+#endif
 
 #if (RTL8822B_SUPPORT == 1)
 
 
 /*---------------------------Define Local Constant---------------------------*/
 
+void phydm_set_iqk_cfir(struct PHY_DM_STRUCT *p_dm_odm, struct _IQK_INFORMATION *p_iqk_info, u8 idx, u8 path)
+{
+	u8 i;
+	u32 tmp;
+
+		odm_set_bb_reg(p_dm_odm, 0x1b00, MASKDWORD, 0xf8000008 | path << 1);
+		if (idx == 0)
+			odm_set_bb_reg(p_dm_odm, 0x1b0c, BIT(13) | BIT(12), 0x3);
+		else
+			odm_set_bb_reg(p_dm_odm, 0x1b0c, BIT(13) | BIT(12), 0x1);
+		odm_set_bb_reg(p_dm_odm, 0x1bd4, BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16), 0x10);
+		for (i = 0; i < 8; i++) {
+			odm_set_bb_reg(p_dm_odm, 0x1bd8, MASKDWORD, 0xe0000001 + (i * 4));
+			tmp = odm_get_bb_reg(p_dm_odm, 0x1bfc, MASKDWORD);
+			p_iqk_info->IQK_CFIR_real[0][path][idx][i] = (tmp & 0x0fff0000) >> 16;
+			p_iqk_info->IQK_CFIR_imag[0][path][idx][i] = tmp & 0xfff;
+		}
+	odm_set_bb_reg(p_dm_odm, 0x1bd8, MASKDWORD, 0x0);
+	odm_set_bb_reg(p_dm_odm, 0x1b0c, BIT(13) | BIT(12), 0x0);
+}
+
+void phydm_get_read_counter(struct PHY_DM_STRUCT *p_dm_odm)
+{
+	u32 counter = 0x0;
+
+	while (1) {
+		if ((odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x8, RFREGOFFSETMASK) == 0xabcde) || (counter > 300))
+			break;
+		counter++;
+		ODM_delay_ms(1);
+	};
+	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x8, RFREGOFFSETMASK, 0x0);
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE, ("[IQK]counter = %d\n", counter));
+}
 
 /*---------------------------Define Local Constant---------------------------*/
 
@@ -40,8 +78,11 @@ void do_iqk_8822b(
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+#else
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
+#endif
 
 	odm_reset_iqk_result(p_dm_odm);
 
@@ -60,13 +101,23 @@ void do_iqk_8822b(
 )
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	bool		is_recovery = (bool) delta_thermal_index;
+	boolean		is_recovery = (boolean) delta_thermal_index;
 
 	phy_iq_calibrate_8822b(p_dm_odm, true);
 }
 #endif
 
 void
+_iqk_rf0xb0_workaround(
+	struct PHY_DM_STRUCT	*p_dm_odm
+	)
+{
+	/*add 0xb8 control for the bad phase noise after switching channel*/
+	odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)0x0, 0xb8, RFREGOFFSETMASK, 0x00a00);
+	odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)0x0, 0xb8, RFREGOFFSETMASK, 0x80a00);
+}
+
+void
 _iqk_fill_iqk_report_8822b(
 	void		*p_dm_void,
 	u8			channel
@@ -174,16 +225,18 @@ _iqk_bb_reset_8822b(
 	struct PHY_DM_STRUCT	*p_dm_odm
 )
 {
-	bool		cca_ing = false;
+	boolean		cca_ing = false;
 	u32		count = 0;
 
 	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x0, RFREGOFFSETMASK, 0x10000);
 	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x0, RFREGOFFSETMASK, 0x10000);
+	/*reset BB report*/
+	odm_set_bb_reg(p_dm_odm, 0x8f8, 0x0ff00000, 0x0);
 
 	while (1) {
 		odm_write_4byte(p_dm_odm, 0x8fc, 0x0);
 		odm_set_bb_reg(p_dm_odm, 0x198c, 0x7, 0x7);
-		cca_ing = (bool) odm_get_bb_reg(p_dm_odm, 0xfa0, BIT(3));
+		cca_ing = (boolean) odm_get_bb_reg(p_dm_odm, 0xfa0, BIT(3));
 
 		if (count > 30)
 			cca_ing = false;
@@ -193,7 +246,7 @@ _iqk_bb_reset_8822b(
 			count++;
 		} else {
 			odm_write_1byte(p_dm_odm, 0x808, 0x0);	/*RX ant off*/
-			odm_set_bb_reg(p_dm_odm, 0xa04, BIT(27) | BIT26 | BIT25 | BIT24, 0x0);		/*CCK RX path off*/
+			odm_set_bb_reg(p_dm_odm, 0xa04, BIT(27) | BIT(26) | BIT(25) | BIT(24), 0x0);		/*CCK RX path off*/
 
 			/*BBreset*/
 			odm_set_bb_reg(p_dm_odm, 0x0, BIT(16), 0x0);
@@ -210,7 +263,7 @@ _iqk_bb_reset_8822b(
 void
 _iqk_afe_setting_8822b(
 	struct PHY_DM_STRUCT	*p_dm_odm,
-	bool		do_iqk
+	boolean		do_iqk
 )
 {
 	if (do_iqk) {
@@ -288,15 +341,16 @@ _iqk_restore_rf_8822b(
 void
 _iqk_backup_iqk_8822b(
 	struct PHY_DM_STRUCT			*p_dm_odm,
-	u8				step
+	u8				step,
+	u8				path
 )
 {
 	struct _IQK_INFORMATION	*p_iqk_info = &p_dm_odm->IQK_info;
-	u8		i, j, k, path, idx;
-	u32		tmp;
+	u8		i, j, k;
 	u16		iqk_apply[2] = {0xc94, 0xe94};
 
-	if (step == 0x0) {
+	switch (step) {
+	case 0:
 		p_iqk_info->iqk_channel[1] = p_iqk_info->iqk_channel[0];
 		for (i = 0; i < 2; i++) {
 			p_iqk_info->LOK_IDAC[1][i] = p_iqk_info->LOK_IDAC[0][i];
@@ -322,32 +376,16 @@ _iqk_backup_iqk_8822b(
 			for (j = 0; j < 3; j++)
 				p_iqk_info->retry_count[0][i][j] = 0x0;
 		}
-	} else {
+		/*backup channel*/
 		p_iqk_info->iqk_channel[0] = p_iqk_info->rf_reg18;
-		for (path = 0; path < 2; path++) {
-			p_iqk_info->LOK_IDAC[0][path] = odm_get_rf_reg(p_dm_odm, path, 0x58, RFREGOFFSETMASK);
-			p_iqk_info->bypass_iqk[0][path] = odm_get_bb_reg(p_dm_odm, iqk_apply[path], MASKDWORD);
-
-			for (idx = 0; idx < 2; idx++) {
-				odm_set_bb_reg(p_dm_odm, 0x1b00, MASKDWORD, 0xf8000008 | path << 1);
-
-				if (idx == 0)
-					odm_set_bb_reg(p_dm_odm, 0x1b0c, BIT(13) | BIT(12), 0x3);
-				else
-					odm_set_bb_reg(p_dm_odm, 0x1b0c, BIT(13) | BIT(12), 0x1);
-
-				odm_set_bb_reg(p_dm_odm, 0x1bd4, BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16), 0x10);
-
-				for (i = 0; i < 8; i++) {
-					odm_set_bb_reg(p_dm_odm, 0x1bd8, MASKDWORD, 0xe0000001 + (i * 4));
-					tmp = odm_get_bb_reg(p_dm_odm, 0x1bfc, MASKDWORD);
-					p_iqk_info->IQK_CFIR_real[0][path][idx][i] = (tmp & 0x0fff0000) >> 16;
-					p_iqk_info->IQK_CFIR_imag[0][path][idx][i] = tmp & 0xfff;
-				}
-			}
-			odm_set_bb_reg(p_dm_odm, 0x1bd8, MASKDWORD, 0x0);
-			odm_set_bb_reg(p_dm_odm, 0x1b0c, BIT(13) | BIT(12), 0x0);
-		}
+		break;
+	case 1: /*LOK backup*/
+			p_iqk_info->LOK_IDAC[0][path] = odm_get_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x58, RFREGOFFSETMASK);
+		break;
+	case 2:	/*TXIQK backup*/
+	case 3: /*RXIQK backup*/	
+		phydm_set_iqk_cfir(p_dm_odm, p_iqk_info, (step-2), path);
+		break;
 	}
 }
 
@@ -364,8 +402,8 @@ _iqk_reload_iqk_setting_8822b(
 
 	for (path = 0; path < 2; path++) {
 		if (reload_idx == 2) {
-			odm_set_rf_reg(p_dm_odm, path, 0xdf, BIT(4), 0x1);
-			odm_set_rf_reg(p_dm_odm, path, 0x58, RFREGOFFSETMASK, p_iqk_info->LOK_IDAC[channel][path]);
+			odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0xdf, BIT(4), 0x1);
+			odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x58, RFREGOFFSETMASK, p_iqk_info->LOK_IDAC[channel][path]);
 		}
 
 		for (idx = 0; idx < reload_idx; idx++) {
@@ -374,42 +412,40 @@ _iqk_reload_iqk_setting_8822b(
 			odm_set_bb_reg(p_dm_odm, 0x1b38, MASKDWORD, 0x20000000);
 			odm_set_bb_reg(p_dm_odm, 0x1b3c, MASKDWORD, 0x20000000);
 			odm_set_bb_reg(p_dm_odm, 0x1bcc, MASKDWORD, 0x00000000);
-
 			if (idx == 0)
 				odm_set_bb_reg(p_dm_odm, 0x1b0c, BIT(13) | BIT(12), 0x3);
 			else
 				odm_set_bb_reg(p_dm_odm, 0x1b0c, BIT(13) | BIT(12), 0x1);
-
 			odm_set_bb_reg(p_dm_odm, 0x1bd4, BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16), 0x10);
-
 			for (i = 0; i < 8; i++) {
 				odm_write_4byte(p_dm_odm, 0x1bd8,	((0xc0000000 >> idx) + 0x3) + (i * 4) + (p_iqk_info->IQK_CFIR_real[channel][path][idx][i] << 9));
 				odm_write_4byte(p_dm_odm, 0x1bd8, ((0xc0000000 >> idx) + 0x1) + (i * 4) + (p_iqk_info->IQK_CFIR_imag[channel][path][idx][i] << 9));
 			}
+			if (idx == 0)
+				odm_set_bb_reg(p_dm_odm, iqk_apply[path], BIT(0), ~(p_iqk_info->IQK_fail_report[channel][path][idx]));
+			else
+				odm_set_bb_reg(p_dm_odm, iqk_apply[path], BIT(10), ~(p_iqk_info->IQK_fail_report[channel][path][idx]));
 		}
-		odm_set_bb_reg(p_dm_odm, iqk_apply[path], MASKDWORD, p_iqk_info->bypass_iqk[channel][path]);
-
 		odm_set_bb_reg(p_dm_odm, 0x1bd8, MASKDWORD, 0x0);
 		odm_set_bb_reg(p_dm_odm, 0x1b0c, BIT(13) | BIT(12), 0x0);
 	}
 }
 
-
-bool
+boolean
 _iqk_reload_iqk_8822b(
 	struct PHY_DM_STRUCT			*p_dm_odm,
-	bool			reset
+	boolean			reset
 )
 {
 	struct _IQK_INFORMATION	*p_iqk_info = &p_dm_odm->IQK_info;
 	u8 i;
-	bool reload = false;
+	boolean reload = false;
 
 	if (reset) {
 		for (i = 0; i < 2; i++)
 			p_iqk_info->iqk_channel[i] = 0x0;
 	} else {
-		p_iqk_info->rf_reg18 = odm_get_rf_reg(p_dm_odm, 0, 0x18, RFREGOFFSETMASK);
+		p_iqk_info->rf_reg18 = odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x18, RFREGOFFSETMASK);
 
 		for (i = 0; i < 2; i++) {
 			if (p_iqk_info->rf_reg18 == p_iqk_info->iqk_channel[i]) {
@@ -420,6 +456,8 @@ _iqk_reload_iqk_8822b(
 			}
 		}
 	}
+	/*report*/
+	odm_set_bb_reg(p_dm_odm, 0x1bf0, BIT(16), (u8)reload);
 	return reload;
 }
 
@@ -427,7 +465,7 @@ _iqk_reload_iqk_8822b(
 void
 _iqk_rfe_setting_8822b(
 	struct PHY_DM_STRUCT	*p_dm_odm,
-	bool		ext_pa_on
+	boolean		ext_pa_on
 )
 {
 	if (ext_pa_on) {
@@ -467,25 +505,25 @@ _iqk_rf_setting_8822b(
 
 	for (path = 0; path < 2; path++) {
 		/*0xdf:B11 = 1,B4 = 0, B1 = 1*/
-		tmp = odm_get_rf_reg(p_dm_odm, path, 0xdf, RFREGOFFSETMASK);
+		tmp = odm_get_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0xdf, RFREGOFFSETMASK);
 		tmp = (tmp & (~BIT(4))) | BIT(1) | BIT(11);
-		odm_set_rf_reg(p_dm_odm, path, 0xdf, RFREGOFFSETMASK, tmp);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0xdf, RFREGOFFSETMASK, tmp);
 
 		/*release 0x56 TXBB*/
-		odm_set_rf_reg(p_dm_odm, path, 0x65, RFREGOFFSETMASK, 0x09000);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x65, RFREGOFFSETMASK, 0x09000);
 
 		if (*p_dm_odm->p_band_type == ODM_BAND_5G) {
-			odm_set_rf_reg(p_dm_odm, path, 0xef, BIT(19), 0x1);
-			odm_set_rf_reg(p_dm_odm, path, 0x33, RFREGOFFSETMASK, 0x00026);
-			odm_set_rf_reg(p_dm_odm, path, 0x3e, RFREGOFFSETMASK, 0x00037);
-			odm_set_rf_reg(p_dm_odm, path, 0x3f, RFREGOFFSETMASK, 0xdefce);
-			odm_set_rf_reg(p_dm_odm, path, 0xef, BIT(19), 0x0);
+			odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0xef, BIT(19), 0x1);
+			odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x33, RFREGOFFSETMASK, 0x00026);
+			odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x3e, RFREGOFFSETMASK, 0x00037);
+			odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x3f, RFREGOFFSETMASK, 0xdefce);
+			odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0xef, BIT(19), 0x0);
 		} else {
-			odm_set_rf_reg(p_dm_odm, path, 0xef, BIT(19), 0x1);
-			odm_set_rf_reg(p_dm_odm, path, 0x33, RFREGOFFSETMASK, 0x00026);
-			odm_set_rf_reg(p_dm_odm, path, 0x3e, RFREGOFFSETMASK, 0x00037);
-			odm_set_rf_reg(p_dm_odm, path, 0x3f, RFREGOFFSETMASK, 0x5efce);
-			odm_set_rf_reg(p_dm_odm, path, 0xef, BIT(19), 0x0);
+			odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0xef, BIT(19), 0x1);
+			odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x33, RFREGOFFSETMASK, 0x00026);
+			odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x3e, RFREGOFFSETMASK, 0x00037);
+			odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x3f, RFREGOFFSETMASK, 0x5efce);
+			odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0xef, BIT(19), 0x0);
 		}
 	}
 }
@@ -505,9 +543,13 @@ _iqk_configure_macbb_8822b(
 	/*0xc94[0]=1, 0xe94[0]=1: Åýtx±qiqk¥´¥X¨Ó*/
 	odm_set_bb_reg(p_dm_odm, 0xc94, BIT(0), 0x1);
 	odm_set_bb_reg(p_dm_odm, 0xe94, BIT(0), 0x1);
+	odm_set_bb_reg(p_dm_odm, 0xc94, (BIT(11) | BIT(10)), 0x1);
+	odm_set_bb_reg(p_dm_odm, 0xe94, (BIT(11) | BIT(10)), 0x1);
 	/* 3-wire off*/
 	odm_write_4byte(p_dm_odm, 0xc00, 0x00000004);
 	odm_write_4byte(p_dm_odm, 0xe00, 0x00000004);
+	/*disable PMAC*/
+	odm_set_bb_reg(p_dm_odm, 0xb00, BIT(8), 0x0);
 	/*	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]Set MACBB setting for IQK!!!!\n"));*/
 
 }
@@ -526,19 +568,19 @@ _iqk_lok_setting_8822b(
 	switch (*p_dm_odm->p_band_type) {
 	case ODM_BAND_2_4G:
 		odm_write_1byte(p_dm_odm, 0x1b2b, 0x00);
-		odm_set_rf_reg(p_dm_odm, path, 0x56, RFREGOFFSETMASK, 0x50df2);
-		odm_set_rf_reg(p_dm_odm, path, 0x8f, RFREGOFFSETMASK, 0xadc00);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x56, RFREGOFFSETMASK, 0x50df2);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x8f, RFREGOFFSETMASK, 0xadc00);
 		/* WE_LUT_TX_LOK*/
-		odm_set_rf_reg(p_dm_odm, path, 0xef, BIT(4), 0x1);
-		odm_set_rf_reg(p_dm_odm, path, 0x33, BIT(1) | BIT(0), 0x0);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0xef, BIT(4), 0x1);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x33, BIT(1) | BIT(0), 0x0);
 		break;
 	case ODM_BAND_5G:
 		odm_write_1byte(p_dm_odm, 0x1b2b, 0x80);
-		odm_set_rf_reg(p_dm_odm, path, 0x56, RFREGOFFSETMASK, 0x5086c);
-		odm_set_rf_reg(p_dm_odm, path, 0x8f, RFREGOFFSETMASK, 0xa9c00);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x56, RFREGOFFSETMASK, 0x5086c);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x8f, RFREGOFFSETMASK, 0xa9c00);
 		/* WE_LUT_TX_LOK*/
-		odm_set_rf_reg(p_dm_odm, path, 0xef, BIT(4), 0x1);
-		odm_set_rf_reg(p_dm_odm, path, 0x33, BIT(1) | BIT(0), 0x1);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0xef, BIT(4), 0x1);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x33, BIT(1) | BIT(0), 0x1);
 		break;
 	}
 	/*	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]Set LOK setting!!!!\n"));*/
@@ -563,13 +605,13 @@ _iqk_txk_setting_8822b(
 
 	switch (*p_dm_odm->p_band_type) {
 	case ODM_BAND_2_4G:
-		odm_set_rf_reg(p_dm_odm, path, 0x56, RFREGOFFSETMASK, 0x50df2);
-		odm_set_rf_reg(p_dm_odm, path, 0x8f, RFREGOFFSETMASK, 0xadc00);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x56, RFREGOFFSETMASK, 0x50df2);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x8f, RFREGOFFSETMASK, 0xadc00);
 		odm_write_1byte(p_dm_odm, 0x1b2b, 0x00);
 		break;
 	case ODM_BAND_5G:
-		odm_set_rf_reg(p_dm_odm, path, 0x56, RFREGOFFSETMASK, 0x500ef);
-		odm_set_rf_reg(p_dm_odm, path, 0x8f, RFREGOFFSETMASK, 0xa9c00);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x56, RFREGOFFSETMASK, 0x500ef);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x8f, RFREGOFFSETMASK, 0xa9c00);
 		odm_write_1byte(p_dm_odm, 0x1b2b, 0x80);
 		break;
 	}
@@ -584,28 +626,24 @@ _iqk_rxk1_setting_8822b(
 	u8 path
 )
 {
-	struct _IQK_INFORMATION	*p_iqk_info = &p_dm_odm->IQK_info;
-
 	odm_write_4byte(p_dm_odm, 0x1b00, 0xf8000008 | path << 1);
 
 	switch (*p_dm_odm->p_band_type) {
 	case ODM_BAND_2_4G:
-		p_iqk_info->tmp1bcc = 0x09;
-		odm_write_1byte(p_dm_odm, 0x1bcc, p_iqk_info->tmp1bcc);
+		odm_write_1byte(p_dm_odm, 0x1bcc, 0x9);
 		odm_write_1byte(p_dm_odm, 0x1b2b, 0x00);
 		odm_write_4byte(p_dm_odm, 0x1b20, 0x01450008);
 		odm_write_4byte(p_dm_odm, 0x1b24, 0x01460c88);
-		odm_set_rf_reg(p_dm_odm, path, 0x56, RFREGOFFSETMASK, 0x510e0);
-		odm_set_rf_reg(p_dm_odm, path, 0x8f, RFREGOFFSETMASK, 0xacc00);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x56, RFREGOFFSETMASK, 0x510e0);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x8f, RFREGOFFSETMASK, 0xacc00);
 		break;
 	case ODM_BAND_5G:
-		p_iqk_info->tmp1bcc = 0x09;
 		odm_write_1byte(p_dm_odm, 0x1bcc, 0x09);
 		odm_write_1byte(p_dm_odm, 0x1b2b, 0x80);
 		odm_write_4byte(p_dm_odm, 0x1b20, 0x00850008);
 		odm_write_4byte(p_dm_odm, 0x1b24, 0x00460048);
-		odm_set_rf_reg(p_dm_odm, path, 0x56, RFREGOFFSETMASK, 0x510e0);
-		odm_set_rf_reg(p_dm_odm, path, 0x8f, RFREGOFFSETMASK, 0xadc00);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x56, RFREGOFFSETMASK, 0x510e0);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x8f, RFREGOFFSETMASK, 0xadc00);
 		break;
 	}
 	/*ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]Set RXK setting!!!!\n"));*/
@@ -616,7 +654,8 @@ _iqk_rxk1_setting_8822b(
 void
 _iqk_rxk2_setting_8822b(
 	struct PHY_DM_STRUCT	*p_dm_odm,
-	u8 path
+	u8 path,
+	boolean is_gs
 )
 {
 	struct _IQK_INFORMATION	*p_iqk_info = &p_dm_odm->IQK_info;
@@ -625,27 +664,28 @@ _iqk_rxk2_setting_8822b(
 
 	switch (*p_dm_odm->p_band_type) {
 	case ODM_BAND_2_4G:
-		p_iqk_info->tmp1bcc = 0x12;
+		if (is_gs)
+			p_iqk_info->tmp1bcc = 0x12;
 		odm_write_1byte(p_dm_odm, 0x1bcc, p_iqk_info->tmp1bcc);
 		odm_write_1byte(p_dm_odm, 0x1b2b, 0x00);
 		odm_write_4byte(p_dm_odm, 0x1b20, 0x01450008);
 		odm_write_4byte(p_dm_odm, 0x1b24, 0x01460848);
-		odm_set_rf_reg(p_dm_odm, path, 0x56, RFREGOFFSETMASK, 0x510e0);
-		odm_set_rf_reg(p_dm_odm, path, 0x8f, RFREGOFFSETMASK, 0xa9c00);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x56, RFREGOFFSETMASK, 0x510e0);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x8f, RFREGOFFSETMASK, 0xa9c00);
 		break;
 	case ODM_BAND_5G:
-		if (path == ODM_RF_PATH_A) {
-			p_iqk_info->tmp1bcc = 0x12;
-			odm_write_1byte(p_dm_odm, 0x1bcc, p_iqk_info->tmp1bcc);
-		} else {
-			p_iqk_info->tmp1bcc = 0x09;
-			odm_write_1byte(p_dm_odm, 0x1bcc, p_iqk_info->tmp1bcc);
+		if (is_gs) {
+			if (path == ODM_RF_PATH_A)
+				p_iqk_info->tmp1bcc = 0x12;
+			else
+				p_iqk_info->tmp1bcc = 0x09;
 		}
+			odm_write_1byte(p_dm_odm, 0x1bcc, p_iqk_info->tmp1bcc);
 		odm_write_1byte(p_dm_odm, 0x1b2b, 0x80);
 		odm_write_4byte(p_dm_odm, 0x1b20, 0x00850008);
 		odm_write_4byte(p_dm_odm, 0x1b24, 0x00460848);
-		odm_set_rf_reg(p_dm_odm, path, 0x56, RFREGOFFSETMASK, 0x51060);
-		odm_set_rf_reg(p_dm_odm, path, 0x8f, RFREGOFFSETMASK, 0xa9c00);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x56, RFREGOFFSETMASK, 0x51060);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x8f, RFREGOFFSETMASK, 0xa9c00);
 		break;
 	}
 	/*	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]Set RXK setting!!!!\n"));*/
@@ -653,18 +693,39 @@ _iqk_rxk2_setting_8822b(
 }
 
 
-bool
+void
+halrf_iqk_set_rf0x8(
+	struct PHY_DM_STRUCT	*p_dm_odm,
+	u8	path
+)
+{
+	u16 c = 0x0;
+
+	while (c < 30000) {
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0xef, RFREGOFFSETMASK, 0x0);
+		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x8, RFREGOFFSETMASK, 0x0);
+		if (odm_get_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x8, RFREGOFFSETMASK) == 0x0)
+			break;
+		c++;
+	}
+}
+
+boolean
 _iqk_check_cal_8822b(
-	struct PHY_DM_STRUCT			*p_dm_odm,
-	u32				IQK_CMD
+	struct	PHY_DM_STRUCT	*p_dm_odm,
+	u8	path,
+	u8	cmd
 )
 {
-	bool		notready = true, fail = true;
-	u32		delay_count = 0x0;
+	boolean	notready = true, fail = true;
+	u32	delay_count = 0x0;
 
 	while (notready) {
-		if (odm_read_4byte(p_dm_odm, 0x1b00) == (IQK_CMD & 0xffffff0f)) {
-			fail = (bool) odm_get_bb_reg(p_dm_odm, 0x1b08, BIT(26));
+		if (odm_get_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x8, RFREGOFFSETMASK) == 0x12345) {
+			if (cmd == 0x0)/*LOK*/
+				fail = false;
+			else
+				fail = (boolean) odm_get_bb_reg(p_dm_odm, 0x1b08, BIT(26));
 			notready = false;
 		} else {
 			ODM_delay_ms(1);
@@ -678,13 +739,14 @@ _iqk_check_cal_8822b(
 			break;
 		}
 	}
+	halrf_iqk_set_rf0x8(p_dm_odm, path);
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
 		     ("[IQK]delay count = 0x%x!!!\n", delay_count));
 	return fail;
 }
 
 
-bool
+boolean
 _iqk_rx_iqk_gain_search_fail_8822b(
 	struct PHY_DM_STRUCT			*p_dm_odm,
 	u8		path,
@@ -693,10 +755,17 @@ _iqk_rx_iqk_gain_search_fail_8822b(
 {
 
 	struct _IQK_INFORMATION	*p_iqk_info = &p_dm_odm->IQK_info;
-	bool	fail = true;
+	boolean	fail = true;
 	u32	IQK_CMD = 0x0, rf_reg0, tmp, bb_idx;
+	u8	IQMUX[4] = {0x9, 0x12, 0x1b, 0x24};
+	u8	idx;
+
+	for (idx = 0; idx < 4; idx++)
+		if (p_iqk_info->tmp1bcc == IQMUX[idx])
+			break;
 
 	odm_write_4byte(p_dm_odm, 0x1b00, 0xf8000008 | path << 1);
+	odm_write_4byte(p_dm_odm, 0x1bcc, p_iqk_info->tmp1bcc);
 
 	if (step == RXIQK1)
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]============ S%d RXIQK GainSearch ============\n", path));
@@ -711,19 +780,43 @@ _iqk_rx_iqk_gain_search_fail_8822b(
 	odm_write_4byte(p_dm_odm, 0x1b00, IQK_CMD);
 	odm_write_4byte(p_dm_odm, 0x1b00, IQK_CMD + 0x1);
 	ODM_delay_ms(GS_delay_8822B);
-	fail = _iqk_check_cal_8822b(p_dm_odm, IQK_CMD);
-
-	odm_write_4byte(p_dm_odm, 0x1b00, 0xf8000008 | path << 1);
-	odm_write_4byte(p_dm_odm, 0x1bcc, p_iqk_info->tmp1bcc);
+	fail = _iqk_check_cal_8822b(p_dm_odm, path, 0x1);
 
 	if (step == RXIQK2) {
-		rf_reg0 = odm_get_rf_reg(p_dm_odm, path, 0x0, RFREGOFFSETMASK);
+		rf_reg0 = odm_get_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x0, RFREGOFFSETMASK);
+	odm_write_4byte(p_dm_odm, 0x1b00, 0xf8000008 | path << 1);
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
-			     ("[IQK]S%d ==> RF0x0 = 0x%x\n", path, rf_reg0));
+			("[IQK]S%d ==> RF0x0 = 0x%x, tmp1bcc = 0x%x, idx = %d, 0x1b3c = 0x%x\n", path, rf_reg0, p_iqk_info->tmp1bcc, idx, odm_read_4byte(p_dm_odm, 0x1b3c)));
 		tmp = (rf_reg0 & 0x1fe0) >> 5;
 		p_iqk_info->lna_idx = tmp >> 5;
 		bb_idx = tmp & 0x1f;
+#if 1
+		if (bb_idx == 0x1) {
+			if (p_iqk_info->lna_idx != 0x0)
+				p_iqk_info->lna_idx--;
+			else if (idx != 3)
+				idx++;
+			else
+				p_iqk_info->isbnd = true;
+			fail = true;
+		} else if (bb_idx == 0xa) {
+			if (idx != 0)
+				idx--;
+			else if (p_iqk_info->lna_idx != 0x7)
+				p_iqk_info->lna_idx++;
+			else
+				p_iqk_info->isbnd = true;
+			fail = true;
+		} else
+			fail = false;
+
+		if (p_iqk_info->isbnd == true)
+			fail = false;
+
+		p_iqk_info->tmp1bcc = IQMUX[idx];
+#endif
 
+#if 0
 		if (bb_idx == 0x1) {
 			if (p_iqk_info->lna_idx != 0x0)
 				p_iqk_info->lna_idx--;
@@ -734,7 +827,7 @@ _iqk_rx_iqk_gain_search_fail_8822b(
 			fail = true;
 		} else
 			fail = false;
-
+#endif
 		if (fail) {
 			odm_write_4byte(p_dm_odm, 0x1b00, 0xf8000008 | path << 1);
 			odm_write_4byte(p_dm_odm, 0x1b24, (odm_read_4byte(p_dm_odm, 0x1b24) & 0xffffe3ff) | (p_iqk_info->lna_idx << 10));
@@ -744,55 +837,30 @@ _iqk_rx_iqk_gain_search_fail_8822b(
 	return fail;
 }
 
-bool
+boolean
 _lok_one_shot_8822b(
 	void		*p_dm_void,
 	u8			path
 )
 {
-	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _IQK_INFORMATION	*p_iqk_info = &p_dm_odm->IQK_info;
-	u8		delay_count = 0, ii;
-	bool		LOK_notready = false;
-	u32		LOK_temp = 0;
-	u32		IQK_CMD = 0x0;
-
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
-		     ("[IQK]==========S%d LOK ==========\n", path));
-
+	struct	PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct	_IQK_INFORMATION	*p_iqk_info = &p_dm_odm->IQK_info;
+	u8	delay_count = 0;
+	boolean	LOK_notready = false;
+	u32	LOK_temp = 0;
+	u32	IQK_CMD = 0x0;
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE, ("[IQK]==========S%d LOK ==========\n", path));
 	IQK_CMD = 0xf8000008 | (1 << (4 + path));
-
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE, ("[IQK]LOK_Trigger = 0x%x\n", IQK_CMD));
-
 	odm_write_4byte(p_dm_odm, 0x1b00, IQK_CMD);
 	odm_write_4byte(p_dm_odm, 0x1b00, IQK_CMD + 1);
 	/*LOK: CMD ID = 0	{0xf8000018, 0xf8000028}*/
 	/*LOK: CMD ID = 0	{0xf8000019, 0xf8000029}*/
 	ODM_delay_ms(LOK_delay_8822B);
-
-	delay_count = 0;
-	LOK_notready = true;
-
-	while (LOK_notready) {
-		if (odm_read_4byte(p_dm_odm, 0x1b00) == (IQK_CMD & 0xffffff0f))
-			LOK_notready = false;
-		else
-			LOK_notready = true;
-
-		if (LOK_notready) {
-			ODM_delay_ms(1);
-			delay_count++;
-		}
-
-		if (delay_count >= 50) {
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
-				     ("[IQK]S%d LOK timeout!!!\n", path));
-			break;
-		}
-	}
-
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
-		     ("[IQK]S%d ==> delay_count = 0x%x\n", path, delay_count));
+	LOK_notready = _iqk_check_cal_8822b(p_dm_odm, path, 0x0);
+	if (!LOK_notready)
+		_iqk_backup_iqk_8822b(p_dm_odm, 0x1, path);
 	if (ODM_COMP_CALIBRATION) {
 		if (!LOK_notready) {
 			LOK_temp = odm_get_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x58, RFREGOFFSETMASK);
@@ -807,7 +875,7 @@ _lok_one_shot_8822b(
 
 
 
-bool
+boolean
 _iqk_one_shot_8822b(
 	void		*p_dm_void,
 	u8		path,
@@ -817,8 +885,8 @@ _iqk_one_shot_8822b(
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _IQK_INFORMATION	*p_iqk_info = &p_dm_odm->IQK_info;
 	u8		delay_count = 0;
-	bool		notready = true, fail = true, search_fail = true;
-	u32		IQK_CMD = 0x0, tmp;
+	boolean		notready = true, fail = true;
+	u32		IQK_CMD = 0x0;
 	u16		iqk_apply[2]	= {0xc94, 0xe94};
 
 	if (idx == TXIQK)
@@ -852,31 +920,10 @@ _iqk_one_shot_8822b(
 		odm_write_4byte(p_dm_odm, 0x1b00, 0xf8000008 | path << 1);
 		odm_write_4byte(p_dm_odm, 0x1b24, (odm_read_4byte(p_dm_odm, 0x1b24) & 0xffffe3ff) | ((p_iqk_info->lna_idx & 0x7) << 10));
 	}
-
 	odm_write_4byte(p_dm_odm, 0x1b00, IQK_CMD);
 	odm_write_4byte(p_dm_odm, 0x1b00, IQK_CMD + 0x1);
 	ODM_delay_ms(WBIQK_delay_8822B);
-
-	while (notready) {
-		if (odm_read_4byte(p_dm_odm, 0x1b00) == (IQK_CMD & 0xffffff0f))
-			notready = false;
-		else
-			notready = true;
-
-		if (notready) {
-			ODM_delay_ms(1);
-			delay_count++;
-		} else {
-			fail = (bool) odm_get_bb_reg(p_dm_odm, 0x1b08, BIT(26));
-			break;
-		}
-
-		if (delay_count >= 50) {
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
-				     ("[IQK]S%d IQK timeout!!!\n", path));
-			break;
-		}
-	}
+	fail = _iqk_check_cal_8822b(p_dm_odm, path, 0x1);
 
 	if (p_dm_odm->debug_components && ODM_COMP_CALIBRATION) {
 		odm_write_4byte(p_dm_odm, 0x1b00, 0xf8000008 | path << 1);
@@ -886,19 +933,30 @@ _iqk_one_shot_8822b(
 			("[IQK]S%d ==> delay_count = 0x%x\n", path, delay_count));
 		if (idx != TXIQK)
 			ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
-				("[IQK]S%d ==> RF0x0 = 0x%x, RF0x56 = 0x%x\n", path, odm_get_rf_reg(p_dm_odm, path, 0x0, RFREGOFFSETMASK), odm_get_rf_reg(p_dm_odm, path, 0x56, RFREGOFFSETMASK)));
+				("[IQK]S%d ==> RF0x0 = 0x%x, RF0x56 = 0x%x\n", path, odm_get_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x0, RFREGOFFSETMASK),
+				odm_get_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x56, RFREGOFFSETMASK)));
 	}
 
 	odm_write_4byte(p_dm_odm, 0x1b00, 0xf8000008 | path << 1);
 
+	if (idx == TXIQK) {
+		if (fail)
+			odm_set_bb_reg(p_dm_odm, iqk_apply[path], BIT(0), 0x0);
+		else	
+			_iqk_backup_iqk_8822b(p_dm_odm, 0x2, path);
+	}
+
 	if (idx == RXIQK2) {
-		p_iqk_info->RXIQK_AGC[0][path] = odm_get_rf_reg(p_dm_odm, path, 0x0, RFREGOFFSETMASK) >> 4;
+		p_iqk_info->RXIQK_AGC[0][path] =
+			(u16)(((odm_get_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)path, 0x0, RFREGOFFSETMASK) >> 5) & 0xff) |
+			      (p_iqk_info->tmp1bcc << 8));
+
 		odm_write_4byte(p_dm_odm, 0x1b38, 0x20000000);
 
-		if (!fail)												/*RXIQK success*/
-			odm_set_bb_reg(p_dm_odm, iqk_apply[path], (BIT(11) | BIT(10)), 0x1);
-		else
+		if (fail)
 			odm_set_bb_reg(p_dm_odm, iqk_apply[path], (BIT(11) | BIT(10)), 0x0);
+		else
+			_iqk_backup_iqk_8822b(p_dm_odm, 0x3, path);
 	}
 
 	if (idx == TXIQK)
@@ -910,7 +968,7 @@ _iqk_one_shot_8822b(
 }
 
 
-bool
+boolean
 _iqk_rx_iqk_by_path_8822b(
 	void		*p_dm_void,
 	u8		path
@@ -918,11 +976,9 @@ _iqk_rx_iqk_by_path_8822b(
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _IQK_INFORMATION	*p_iqk_info = &p_dm_odm->IQK_info;
-	bool		KFAIL = true, gonext;
-	u8		i;
+	boolean		KFAIL = true, gonext;
 
 #if 1
-	/*while (1) {*/
 	switch (p_iqk_info->rxiqk_step) {
 	case 1:		/*gain search_RXK1*/
 		_iqk_rxk1_setting_8822b(p_dm_odm, path);
@@ -939,16 +995,16 @@ _iqk_rx_iqk_by_path_8822b(
 				p_iqk_info->rxiqk_step++;
 				gonext = true;
 			}
-
 			if (gonext)
 				break;
 		}
 		break;
 	case 2:		/*gain search_RXK2*/
-		_iqk_rxk2_setting_8822b(p_dm_odm, path);
+		_iqk_rxk2_setting_8822b(p_dm_odm, path, true);
+		p_iqk_info->isbnd = false;
 		while (1) {
 			KFAIL = _iqk_rx_iqk_gain_search_fail_8822b(p_dm_odm, path, RXIQK2);
-			if (KFAIL && (p_iqk_info->gs_retry_count[0][path][RXIQK2] < 2))
+			if (KFAIL && (p_iqk_info->gs_retry_count[0][path][RXIQK2] < rxiqk_gs_limit))
 				p_iqk_info->gs_retry_count[0][path][RXIQK2]++;
 			else {
 				p_iqk_info->rxiqk_step++;
@@ -976,7 +1032,7 @@ _iqk_rx_iqk_by_path_8822b(
 		}
 		break;
 	case 4:		/*RXK2*/
-		_iqk_rxk2_setting_8822b(p_dm_odm, path);
+		_iqk_rxk2_setting_8822b(p_dm_odm, path, false);
 		gonext = false;
 		while (1) {
 			KFAIL = _iqk_one_shot_8822b(p_dm_odm, path,	RXIQK2);
@@ -995,24 +1051,30 @@ _iqk_rx_iqk_by_path_8822b(
 		}
 		break;
 	}
-
 	return KFAIL;
-
 #endif
 }
 
 
 void
 _iqk_iqk_by_path_8822b(
-	void		*p_dm_void
+	void		*p_dm_void,
+	boolean		segment_iqk
 )
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _IQK_INFORMATION	*p_iqk_info = &p_dm_odm->IQK_info;
-	bool		KFAIL = true;
-	u8		i;
+	boolean		KFAIL = true;
+	u8		i, kcount_limit;
 
 	/*	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE, ("[IQK]iqk_step = 0x%x\n", p_dm_odm->rf_calibrate_info.iqk_step)); */
+
+	if (*p_dm_odm->p_band_width == 2)
+		kcount_limit = kcount_limit_80m;
+	else
+		kcount_limit = kcount_limit_others;
+
+	while (1) {
 #if 1
 	switch (p_dm_odm->rf_calibrate_info.iqk_step) {
 	case 1:		/*S0 LOK*/
@@ -1033,6 +1095,7 @@ _iqk_iqk_by_path_8822b(
 #if 1
 		_iqk_txk_setting_8822b(p_dm_odm, ODM_RF_PATH_A);
 		KFAIL = _iqk_one_shot_8822b(p_dm_odm, ODM_RF_PATH_A, TXIQK);
+			p_iqk_info->kcount++;
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE, ("[IQK]S0TXK KFail = 0x%x\n", KFAIL));
 
 		if (KFAIL && (p_iqk_info->retry_count[0][ODM_RF_PATH_A][TXIQK] < 3))
@@ -1045,8 +1108,8 @@ _iqk_iqk_by_path_8822b(
 #if 1
 		_iqk_txk_setting_8822b(p_dm_odm, ODM_RF_PATH_B);
 		KFAIL = _iqk_one_shot_8822b(p_dm_odm, ODM_RF_PATH_B,	TXIQK);
+			p_iqk_info->kcount++;
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE, ("[IQK]S1TXK KFail = 0x%x\n", KFAIL));
-
 		if (KFAIL && p_iqk_info->retry_count[0][ODM_RF_PATH_B][TXIQK] < 3)
 			p_iqk_info->retry_count[0][ODM_RF_PATH_B][TXIQK]++;
 		else
@@ -1054,6 +1117,7 @@ _iqk_iqk_by_path_8822b(
 			p_dm_odm->rf_calibrate_info.iqk_step++;
 		break;
 	case 5:		/*S0 RXIQK*/
+			while (1) {
 		KFAIL = _iqk_rx_iqk_by_path_8822b(p_dm_odm, ODM_RF_PATH_A);
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE, ("[IQK]S0RXK KFail = 0x%x\n", KFAIL));
 		if (p_iqk_info->rxiqk_step == 5) {
@@ -1062,9 +1126,13 @@ _iqk_iqk_by_path_8822b(
 			if (KFAIL)
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
 					("[IQK]S0RXK fail code: %d!!!\n", p_iqk_info->RXIQK_fail_code[0][ODM_RF_PATH_A]));
+					break;
+				}
 		}
+			p_iqk_info->kcount++;
 		break;
 	case 6:		/*S1 RXIQK*/
+			while (1) {
 		KFAIL = _iqk_rx_iqk_by_path_8822b(p_dm_odm, ODM_RF_PATH_B);
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE, ("[IQK]S1RXK KFail = 0x%x\n", KFAIL));
 		if (p_iqk_info->rxiqk_step == 5) {
@@ -1073,7 +1141,10 @@ _iqk_iqk_by_path_8822b(
 			if (KFAIL)
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
 					("[IQK]S1RXK fail code: %d!!!\n", p_iqk_info->RXIQK_fail_code[0][ODM_RF_PATH_B]));
+					break;
+				}
 		}
+			p_iqk_info->kcount++;
 		break;
 	}
 
@@ -1102,21 +1173,25 @@ _iqk_iqk_by_path_8822b(
 			("[IQK]PathA_GS1_retry = %d, PathA_GS2_retry = %d, PathB_GS1_retry = %d, PathB_GS2_retry = %d\n",
 			p_iqk_info->gs_retry_count[0][ODM_RF_PATH_A][RXIQK1], p_iqk_info->gs_retry_count[0][ODM_RF_PATH_A][RXIQK2],
 			p_iqk_info->gs_retry_count[0][ODM_RF_PATH_B][RXIQK1], p_iqk_info->gs_retry_count[0][ODM_RF_PATH_B][RXIQK2]));
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
-			     ("[IQK]================================\n"));
-
 		for (i = 0; i < 2; i++) {
 			odm_write_4byte(p_dm_odm, 0x1b00, 0xf8000008 | i << 1);
 			odm_write_4byte(p_dm_odm, 0x1b2c, 0x7);
 			odm_write_4byte(p_dm_odm, 0x1bcc, 0x0);
+			odm_write_4byte(p_dm_odm, 0x1b38, 0x20000000);
 		}
+			break;
 	}
+
+		if ((segment_iqk == true) && (p_iqk_info->kcount == kcount_limit))
+			break;
 #endif
 }
+}
 
 void
 _iqk_start_iqk_8822b(
-	struct PHY_DM_STRUCT		*p_dm_odm
+	struct PHY_DM_STRUCT		*p_dm_odm,
+	boolean			segment_iqk
 )
 {
 	u32 tmp;
@@ -1130,7 +1205,7 @@ _iqk_start_iqk_8822b(
 	tmp = tmp | BIT(5) | BIT(0);
 	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x1, RFREGOFFSETMASK, tmp);
 
-	_iqk_iqk_by_path_8822b(p_dm_odm);
+	_iqk_iqk_by_path_8822b(p_dm_odm, segment_iqk);
 
 
 }
@@ -1177,25 +1252,32 @@ _iq_calibrate_8822b_init(
 			}
 		}
 	}
+	/*cu_distance (IQK result variation)=111*/
+	odm_write_4byte(p_dm_odm, 0x1b10, 0x88011c00);
 }
 
 
 void
 _phy_iq_calibrate_8822b(
 	struct PHY_DM_STRUCT		*p_dm_odm,
-	bool			reset
+	boolean			reset
 )
 {
 
 	u32	MAC_backup[MAC_REG_NUM_8822B], BB_backup[BB_REG_NUM_8822B], RF_backup[RF_REG_NUM_8822B][SS_8822B];
 	u32	backup_mac_reg[MAC_REG_NUM_8822B] = {0x520, 0x550};
-	u32	backup_bb_reg[BB_REG_NUM_8822B] = {0x808, 0x90c, 0xc00, 0xcb0, 0xcb4, 0xcbc, 0xe00, 0xeb0, 0xeb4, 0xebc, 0x1990, 0x9a4, 0xa04};
+	u32	backup_bb_reg[BB_REG_NUM_8822B] = {0x808, 0x90c, 0xc00, 0xcb0, 0xcb4, 0xcbc, 0xe00, 0xeb0, 0xeb4, 0xebc, 0x1990, 0x9a4, 0xa04, 0xb00};
 	u32	backup_rf_reg[RF_REG_NUM_8822B] = {0xdf, 0x8f, 0x65, 0x0, 0x1};
-	u8	i, j;
+	boolean segment_iqk = false, is_mp = false;
 
 	struct _IQK_INFORMATION	*p_iqk_info = &p_dm_odm->IQK_info;
 
-	if (!p_dm_odm->mp_mode)
+	if (*(p_dm_odm->p_mp_mode))
+		is_mp = true;
+	else if (p_dm_odm->is_linked)
+		segment_iqk = false;
+
+	if (!is_mp)
 		if (_iqk_reload_iqk_8822b(p_dm_odm, reset))
 			return;
 
@@ -1209,27 +1291,39 @@ _phy_iq_calibrate_8822b(
 
 	p_iqk_info->iqk_times++;
 
+	p_iqk_info->kcount = 0;
 	p_dm_odm->rf_calibrate_info.iqk_total_progressing_time = 0;
 	p_dm_odm->rf_calibrate_info.iqk_step = 1;
 	p_iqk_info->rxiqk_step = 1;
 
-	_iqk_backup_iqk_8822b(p_dm_odm, 0);
+	_iqk_backup_iqk_8822b(p_dm_odm, 0x0, 0x0);
 	_iqk_backup_mac_bb_8822b(p_dm_odm, MAC_backup, BB_backup, backup_mac_reg, backup_bb_reg);
 	_iqk_backup_rf_8822b(p_dm_odm, RF_backup, backup_rf_reg);
-
+#if 0
 	_iqk_configure_macbb_8822b(p_dm_odm);
 	_iqk_afe_setting_8822b(p_dm_odm, true);
 	_iqk_rfe_setting_8822b(p_dm_odm, false);
 	_iqk_agc_bnd_int_8822b(p_dm_odm);
 	_iqk_rf_setting_8822b(p_dm_odm);
+#endif
 
 	while (1) {
-		if (!p_dm_odm->mp_mode)
+		if (!is_mp)
 			p_dm_odm->rf_calibrate_info.iqk_start_time = odm_get_current_time(p_dm_odm);
 
-		_iqk_start_iqk_8822b(p_dm_odm);
+		_iqk_configure_macbb_8822b(p_dm_odm);
+		_iqk_afe_setting_8822b(p_dm_odm, true);
+		_iqk_rfe_setting_8822b(p_dm_odm, false);
+		_iqk_agc_bnd_int_8822b(p_dm_odm);
+		_iqk_rf_setting_8822b(p_dm_odm);
 
-		if (!p_dm_odm->mp_mode) {
+		_iqk_start_iqk_8822b(p_dm_odm, segment_iqk);
+
+		_iqk_afe_setting_8822b(p_dm_odm, false);
+		_iqk_restore_mac_bb_8822b(p_dm_odm, MAC_backup, BB_backup, backup_mac_reg, backup_bb_reg);
+		_iqk_restore_rf_8822b(p_dm_odm, backup_rf_reg, RF_backup);
+
+		if (!is_mp) {
 			p_dm_odm->rf_calibrate_info.iqk_progressing_time = odm_get_progressing_time(p_dm_odm, p_dm_odm->rf_calibrate_info.iqk_start_time);
 			p_dm_odm->rf_calibrate_info.iqk_total_progressing_time += odm_get_progressing_time(p_dm_odm, p_dm_odm->rf_calibrate_info.iqk_start_time);
 			ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
@@ -1238,17 +1332,26 @@ _phy_iq_calibrate_8822b(
 
 		if (p_dm_odm->rf_calibrate_info.iqk_step == 7)
 			break;
+
+		p_iqk_info->kcount = 0;
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]delay 50ms!!!\n"));
+		ODM_delay_ms(50);
 	};
 
-	_iqk_backup_iqk_8822b(p_dm_odm, 1);
+	if (segment_iqk)
+		_iqk_reload_iqk_setting_8822b(p_dm_odm, 0x0, 0x1);
+#if 0
 	_iqk_afe_setting_8822b(p_dm_odm, false);
 	_iqk_restore_mac_bb_8822b(p_dm_odm, MAC_backup, BB_backup, backup_mac_reg, backup_bb_reg);
 	_iqk_restore_rf_8822b(p_dm_odm, backup_rf_reg, RF_backup);
+#endif
 	_iqk_fill_iqk_report_8822b(p_dm_odm, 0);
 
-	p_dm_odm->rf_calibrate_info.iqk_total_progressing_time += odm_get_progressing_time(p_dm_odm, p_dm_odm->rf_calibrate_info.iqk_start_time);
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
-		("[IQK]Total IQK progressing_time = %lld ms\n", p_dm_odm->rf_calibrate_info.iqk_total_progressing_time));
+	_iqk_rf0xb0_workaround(p_dm_odm);
+
+	if (!is_mp)
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]Total IQK progressing_time = %lld ms\n",
+			p_dm_odm->rf_calibrate_info.iqk_total_progressing_time));
 
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
 		     ("[IQK]==========IQK end!!!!!==========\n"));
@@ -1261,76 +1364,84 @@ _phy_iq_calibrate_by_fw_8822b(
 	u8		clear
 )
 {
-}
+	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _IQK_INFORMATION	*p_iqk_info = &p_dm_odm->IQK_info;	
+	enum hal_status		status = HAL_STATUS_FAILURE;
+	u8 segment_iqk = 0x0;
+
+	if (*(p_dm_odm->p_mp_mode))
+		clear = 0x1;
+	else if (p_dm_odm->is_linked)
+		segment_iqk = 0x0;
 
+	p_iqk_info->iqk_times++;
+	status = odm_iq_calibrate_by_fw(p_dm_odm, clear, segment_iqk);
 
-/*IQK version:v3.2 , NCTL v0.6*/
-/*1.add LNA boundary of RX gain search*/
+	if (status == HAL_STATUS_SUCCESS)
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]FWIQK OK!!!\n"));
+	else
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]FWIQK fail!!!\n"));
+}
+
+/*IQK_version:0x29 NCTL:0x8*/
+/*1.reset bb report*/
+/*2.check if rf0x8 is expected*/
 void
 phy_iq_calibrate_8822b(
 	void		*p_dm_void,
-	bool		clear
+	boolean		clear
 )
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	u32 counter = 0x0;
-
+	struct _hal_rf_				*p_rf = &(p_dm_odm->rf_table);
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+#else
 	struct _ADAPTER		*p_adapter = p_dm_odm->adapter;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
+#endif
 
 #if (MP_DRIVER == 1)
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	PMPT_CONTEXT	p_mpt_ctx = &(p_adapter->mpt_ctx);
+	PMPT_CONTEXT	p_mpt_ctx = &(p_adapter->MptCtx);
 #else
 	PMPT_CONTEXT	p_mpt_ctx = &(p_adapter->mppriv.mpt_ctx);
 #endif
 #endif
+
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
+	if (!(p_rf->rf_supportability & HAL_RF_IQK))
+		return;
+#endif
+
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
 	if (odm_check_power_status(p_adapter) == false)
 		return;
 #endif
 
 #if MP_DRIVER == 1
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+	if (p_mpt_ctx->bSingleTone || p_mpt_ctx->bCarrierSuppression)
+		return;
+#else
 	if (p_mpt_ctx->is_single_tone || p_mpt_ctx->is_carrier_suppression)
 		return;
 #endif
-
 #endif
-
-	p_dm_odm->iqk_fw_offload = 0;
-
+#endif
+	/*p_dm_odm->iqk_fw_offload = 0;*/
 	/*FW IQK*/
-	if (p_dm_odm->iqk_fw_offload) {
+	if (p_dm_odm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) {
 		if (!p_dm_odm->rf_calibrate_info.is_iqk_in_progress) {
 			odm_acquire_spin_lock(p_dm_odm, RT_IQK_SPINLOCK);
 			p_dm_odm->rf_calibrate_info.is_iqk_in_progress = true;
 			odm_release_spin_lock(p_dm_odm, RT_IQK_SPINLOCK);
 
 			p_dm_odm->rf_calibrate_info.iqk_start_time = odm_get_current_time(p_dm_odm);
-
-			odm_write_4byte(p_dm_odm, 0x1b00, 0xf8000008);
-			odm_set_bb_reg(p_dm_odm, 0x1bf0, 0xff000000, 0xff);
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
-				("[IQK]0x1bf0 = 0x%x\n", odm_read_4byte(p_dm_odm, 0x1bf0)));
-
 			_phy_iq_calibrate_by_fw_8822b(p_dm_odm, clear);
-
-			while (1) {
-				if (((odm_read_4byte(p_dm_odm, 0x1bf0) >> 24) == 0x7f) || (counter > 300))
-					break;
-
-				counter++;
-				ODM_delay_ms(1);
-			};
-
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE,
-				     ("[IQK]counter = %d\n", counter));
-
-			p_dm_odm->rf_calibrate_info.iqk_progressing_time = odm_get_progressing_time(p_dm_odm, p_dm_odm->rf_calibrate_info.iqk_start_time);
-
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQK progressing_time = %lld ms\n", p_dm_odm->rf_calibrate_info.iqk_progressing_time));
+			phydm_get_read_counter(p_dm_odm);
+			p_dm_odm->rf_calibrate_info.iqk_total_progressing_time = odm_get_progressing_time(p_dm_odm, p_dm_odm->rf_calibrate_info.iqk_start_time);
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQK progressing_time = %lld ms\n", p_dm_odm->rf_calibrate_info.iqk_total_progressing_time));
 
 			odm_acquire_spin_lock(p_dm_odm, RT_IQK_SPINLOCK);
 			p_dm_odm->rf_calibrate_info.is_iqk_in_progress = false;
@@ -1339,39 +1450,34 @@ phy_iq_calibrate_8822b(
 			ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("== Return the IQK CMD, because the IQK in Progress ==\n"));
 
 	} else {
-
 		_iq_calibrate_8822b_init(p_dm_void);
-
 		if (!p_dm_odm->rf_calibrate_info.is_iqk_in_progress) {
-
 			odm_acquire_spin_lock(p_dm_odm, RT_IQK_SPINLOCK);
 			p_dm_odm->rf_calibrate_info.is_iqk_in_progress = true;
 			odm_release_spin_lock(p_dm_odm, RT_IQK_SPINLOCK);
-			if (p_dm_odm->mp_mode)
-				p_dm_odm->rf_calibrate_info.iqk_start_time = odm_get_current_time(p_dm_odm);
 
+			if (*(p_dm_odm->p_mp_mode))
+				p_dm_odm->rf_calibrate_info.iqk_start_time = odm_get_current_time(p_dm_odm);
 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
 			_phy_iq_calibrate_8822b(p_dm_odm, clear);
 			/*DBG_871X("%s,%d, do IQK %u ms\n", __func__, __LINE__, rtw_get_passing_time_ms(time_iqk));*/
 #else
 			_phy_iq_calibrate_8822b(p_dm_odm, clear);
 #endif
-			if (p_dm_odm->mp_mode) {
-				p_dm_odm->rf_calibrate_info.iqk_progressing_time = odm_get_progressing_time(p_dm_odm, p_dm_odm->rf_calibrate_info.iqk_start_time);
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQK progressing_time = %lld ms\n", p_dm_odm->rf_calibrate_info.iqk_progressing_time));
+			if (*(p_dm_odm->p_mp_mode)) {
+				p_dm_odm->rf_calibrate_info.iqk_total_progressing_time = odm_get_progressing_time(p_dm_odm, p_dm_odm->rf_calibrate_info.iqk_start_time);
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]IQK progressing_time = %lld ms\n", p_dm_odm->rf_calibrate_info.iqk_total_progressing_time));
 			}
+
 			odm_acquire_spin_lock(p_dm_odm, RT_IQK_SPINLOCK);
 			p_dm_odm->rf_calibrate_info.is_iqk_in_progress = false;
 			odm_release_spin_lock(p_dm_odm, RT_IQK_SPINLOCK);
 		} else
 			ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]== Return the IQK CMD, because the IQK in Progress ==\n"));
-
 	}
-
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	_iqk_iqk_fail_report_8822b(p_dm_odm);
 #endif
-
 }
 
 #endif
diff --git a/rtl8822BU/hal/phydm/rtl8822b/phydm_iqk_8822b.h b/rtl8822BU/hal/phydm/halrf/rtl8822b/halrf_iqk_8822b.h
index 3870d76..9f5de92 100755..100644
--- a/rtl8822BU/hal/phydm/rtl8822b/phydm_iqk_8822b.h
+++ b/rtl8822BU/hal/phydm/halrf/rtl8822b/halrf_iqk_8822b.h
@@ -22,13 +22,11 @@
 
 #if (RTL8822B_SUPPORT == 1)
 
-
+#define IQK_VERSION_8822B	"0x28"
 /*--------------------------Define Parameters-------------------------------*/
 #define	MAC_REG_NUM_8822B 2
-#define		BB_REG_NUM_8822B 13
-#define		RF_REG_NUM_8822B 5
-
-
+#define	BB_REG_NUM_8822B 14
+#define	RF_REG_NUM_8822B 5
 #define	LOK_delay_8822B 2
 #define	GS_delay_8822B 2
 #define	WBIQK_delay_8822B 2
@@ -36,10 +34,7 @@
 #define TXIQK 0
 #define RXIQK 1
 #define SS_8822B 2
-
 /*---------------------------End Define Parameters-------------------------------*/
-
-
 #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
 void
 do_iqk_8822b(
@@ -61,7 +56,7 @@ do_iqk_8822b(
 void
 phy_iq_calibrate_8822b(
 	void		*p_dm_void,
-	bool		clear
+	boolean		clear
 );
 
 #else	/* (RTL8822B_SUPPORT == 0)*/
diff --git a/rtl8822BU/hal/phydm/mp_precomp.h b/rtl8822BU/hal/phydm/mp_precomp.h
index fa483c6..99ca5f4 100755..100644
--- a/rtl8822BU/hal/phydm/mp_precomp.h
+++ b/rtl8822BU/hal/phydm/mp_precomp.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,9 +11,4 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
diff --git a/rtl8822BU/hal/phydm/phydm.c b/rtl8822BU/hal/phydm/phydm.c
index 6ddda5b..e8b6983 100755..100644
--- a/rtl8822BU/hal/phydm/phydm.c
+++ b/rtl8822BU/hal/phydm/phydm.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 /* ************************************************************
  * include files
@@ -40,6 +35,12 @@ const u16 db_invert_table[12][8] = {
 	{	28184,	31623,	35481,	39811,	44668,	50119,	56234,	65535}
 };
 
+const u16 phy_rate_table[] = {	/*20M*/
+	1, 2, 5, 11,
+	6, 9, 12, 18, 24, 36, 48, 54,
+	6, 13, 19, 26, 39, 52, 58, 65,		/*MCS0~7*/
+	13, 26, 39, 52, 78, 104, 117, 130		/*MCS8~15*/
+};
 
 /* ************************************************************
  * Local Function predefine.
@@ -113,7 +114,6 @@ phydm_seq_sorting(
 	u8	seq_length
 )
 {
-	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	u8		i = 0, j = 0;
 	u32		tmp_a, tmp_b;
 	u32		tmp_idx_a, tmp_idx_b;
@@ -152,57 +152,22 @@ phydm_seq_sorting(
 
 }
 
+#if 0/*(DM_ODM_SUPPORT_TYPE & ODM_WIN)*/
 void
 odm_init_mp_driver_status(
 	struct PHY_DM_STRUCT		*p_dm_odm
 )
 {
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-
 	/* Decide when compile time */
-#if (MP_DRIVER == 1)
+	#if (MP_DRIVER == 1)
 	p_dm_odm->mp_mode = true;
-#else
+	#else
 	p_dm_odm->mp_mode = false;
-#endif
-
-#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-
-	struct _ADAPTER	*adapter =  p_dm_odm->adapter;
+	#endif
 
-	/* Update information every period */
-	p_dm_odm->mp_mode = (bool)adapter->registrypriv.mp_mode;
-
-#else
-
-	struct rtl8192cd_priv	*priv = p_dm_odm->priv;
-
-	p_dm_odm->mp_mode = (bool)priv->pshare->rf_ft_var.mp_specific;
-
-#endif
+	odm_cmn_info_hook(p_dm_odm, ODM_CMNINFO_MP_MODE, &(p_dm_odm->mp_mode));
 }
-
-void
-odm_update_mp_driver_status(
-	struct PHY_DM_STRUCT		*p_dm_odm
-)
-{
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-
-	/* Do nothing. */
-
-#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	struct _ADAPTER	*adapter =  p_dm_odm->adapter;
-
-	/* Update information erery period */
-	p_dm_odm->mp_mode = (bool)adapter->registrypriv.mp_mode;
-
-#else
-
-	/* Do nothing. */
-
 #endif
-}
 
 void
 phydm_init_trx_antenna_setting(
@@ -218,7 +183,7 @@ phydm_init_trx_antenna_setting(
 		tx_ant = (u8)odm_get_bb_reg(p_dm_odm, ODM_REG(BB_TX_PATH, p_dm_odm), ODM_BIT(BB_TX_PATH, p_dm_odm));
 		p_dm_odm->tx_ant_status = (tx_ant & 0xf);
 		p_dm_odm->rx_ant_status = (rx_ant & 0xf);
-	} else if (p_dm_odm->support_ic_type & (ODM_RTL8723D | ODM_RTL8821C)) {
+	} else if (p_dm_odm->support_ic_type & (ODM_RTL8723D | ODM_RTL8821C | ODM_RTL8710B)) {/* JJ ADD 20161014 */
 		p_dm_odm->tx_ant_status = 0x1;
 		p_dm_odm->rx_ant_status = 0x1;
 
@@ -232,7 +197,6 @@ phydm_traffic_load_decision(
 )
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _sw_antenna_switch_		*p_dm_swat_table = &p_dm_odm->dm_swat_table;
 
 	/*---TP & Trafic-load calculation---*/
 
@@ -256,6 +220,10 @@ phydm_traffic_load_decision(
 #endif
 	p_dm_odm->total_tp = p_dm_odm->tx_tp + p_dm_odm->rx_tp;
 
+	if (p_dm_odm->total_tp == 0)
+		p_dm_odm->consecutive_idlel_time += PHYDM_WATCH_DOG_PERIOD;
+	else
+		p_dm_odm->consecutive_idlel_time = 0;
 	/*
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("cur_tx_ok_cnt = %d, cur_rx_ok_cnt = %d, last_tx_ok_cnt = %d, last_rx_ok_cnt = %d\n",
 		p_dm_odm->cur_tx_ok_cnt, p_dm_odm->cur_rx_ok_cnt, p_dm_odm->last_tx_ok_cnt, p_dm_odm->last_rx_ok_cnt));
@@ -291,7 +259,9 @@ phydm_config_ofdm_tx_path(
 	u32			path
 )
 {
-	u8	ofdm_rx_path;
+#if ((RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1))
+	u8	ofdm_tx_path = 0x33;
+#endif
 
 #if (RTL8192E_SUPPORT == 1)
 	if (p_dm_odm->support_ic_type & (ODM_RTL8192E)) {
@@ -310,6 +280,24 @@ phydm_config_ofdm_tx_path(
 
 	}
 #endif
+
+#if (RTL8812A_SUPPORT == 1)
+	if (p_dm_odm->support_ic_type & (ODM_RTL8812)) {
+
+		if (path == PHYDM_A) {
+			ofdm_tx_path = 0x11;
+			/**/
+		} else if (path == PHYDM_B) {
+			ofdm_tx_path = 0x22;
+			/**/
+		} else  if (path == PHYDM_AB) {
+			ofdm_tx_path = 0x33;
+			/**/
+		}
+
+		odm_set_bb_reg(p_dm_odm, 0x80c, 0xff00, ofdm_tx_path);
+	}
+#endif
 }
 
 void
@@ -352,7 +340,7 @@ phydm_config_ofdm_rx_path(
 			/**/
 		}
 
-		odm_set_bb_reg(p_dm_odm, 0x808, 0xf, ofdm_rx_path);
+		odm_set_bb_reg(p_dm_odm, 0x808, MASKBYTE0, ((ofdm_rx_path << 4) | ofdm_rx_path));
 	}
 #endif
 }
@@ -362,8 +350,8 @@ phydm_config_cck_rx_antenna_init(
 	struct PHY_DM_STRUCT		*p_dm_odm
 )
 {
-#if (RTL8192E_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type & (ODM_RTL8192E)) {
+#if ((RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1))
+	if (p_dm_odm->support_ic_type & (ODM_RTL8192E | ODM_RTL8812)) {
 
 		/*CCK 2R CCA parameters*/
 		odm_set_bb_reg(p_dm_odm, 0xa2c, BIT(18), 1); /*enable 2R Rx path*/
@@ -384,11 +372,13 @@ phydm_config_cck_rx_path(
 	u8			path_div_en
 )
 {
+#if ((RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1))
 	u8	path_div_select = 0;
 	u8	cck_1_path = 0, cck_2_path = 0;
+#endif
 
-#if (RTL8192E_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type & (ODM_RTL8192E)) {
+#if ((RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1))
+	if (p_dm_odm->support_ic_type & (ODM_RTL8192E | ODM_RTL8812)) {
 
 		if (path == PHYDM_A) {
 			path_div_select = 0;
@@ -426,7 +416,6 @@ phydm_config_trx_path(
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32			pre_support_ability;
 	u32 used = *_used;
 	u32 out_len = *_out_len;
 
@@ -484,9 +473,11 @@ phydm_init_cck_setting(
 	struct PHY_DM_STRUCT		*p_dm_odm
 )
 {
+#if (RTL8192E_SUPPORT == 1)
 	u32 value_824, value_82c;
+#endif
 
-	p_dm_odm->is_cck_high_power = (bool) odm_get_bb_reg(p_dm_odm, ODM_REG(CCK_RPT_FORMAT, p_dm_odm), ODM_BIT(CCK_RPT_FORMAT, p_dm_odm));
+	p_dm_odm->is_cck_high_power = (boolean) odm_get_bb_reg(p_dm_odm, ODM_REG(CCK_RPT_FORMAT, p_dm_odm), ODM_BIT(CCK_RPT_FORMAT, p_dm_odm));
 
 #if (RTL8192E_SUPPORT == 1)
 	if (p_dm_odm->support_ic_type & (ODM_RTL8192E)) {
@@ -502,43 +493,87 @@ phydm_init_cck_setting(
 		if (value_824 != value_82c)
 			odm_set_bb_reg(p_dm_odm, 0x82c, BIT(9), value_824);
 		odm_set_bb_reg(p_dm_odm, 0xa80, BIT(7), value_824);
-		p_dm_odm->cck_agc_report_type = (bool)value_824;
+		p_dm_odm->cck_agc_report_type = (boolean)value_824;
 
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("cck_agc_report_type = (( %d )), ext_lna_gain = (( %d ))\n", p_dm_odm->cck_agc_report_type, p_dm_odm->ext_lna_gain));
 	}
 #endif
-
-#if ((RTL8703B_SUPPORT == 1) || (RTL8723D_SUPPORT == 1))
-	if (p_dm_odm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D)) {
+/* JJ ADD 20161014 */
+#if ((RTL8703B_SUPPORT == 1) || (RTL8723D_SUPPORT == 1) || (RTL8710B_SUPPORT == 1))
+	if (p_dm_odm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8710B)) {
 
 		p_dm_odm->cck_agc_report_type = odm_get_bb_reg(p_dm_odm, 0x950, BIT(11)) ? 1 : 0; /*1: 4bit LNA, 0: 3bit LNA */
 
 		if (p_dm_odm->cck_agc_report_type != 1) {
-			dbg_print("[Warning] 8703B/8723D CCK should be 4bit LNA, ie. 0x950[11] = 1\n");
+			dbg_print("[Warning] 8703B/8723D/8710B CCK should be 4bit LNA, ie. 0x950[11] = 1\n");
 			/**/
 		}
 	}
 #endif
-
-#if ((RTL8723D_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1))
-
-	if (p_dm_odm->support_ic_type & (ODM_RTL8723D | ODM_RTL8822B | ODM_RTL8197F)) {
+/* JJ ADD 20161014 */
+#if ((RTL8723D_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8710B_SUPPORT == 1))
+	if (p_dm_odm->support_ic_type & (ODM_RTL8723D | ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8821C | ODM_RTL8710B))
 		p_dm_odm->cck_new_agc = odm_get_bb_reg(p_dm_odm, 0xa9c, BIT(17)) ? true : false;          /*1: new agc  0: old agc*/
-	} else
+	else
 #endif
 		p_dm_odm->cck_new_agc = false;
 
 }
 
+
+void
+phydm_dynamicsoftmletting(
+	struct PHY_DM_STRUCT		*p_dm_odm
+)
+{
+
+	u32 ret_val;
+
+#if (RTL8822B_SUPPORT == 1)
+	if (*(p_dm_odm->p_mp_mode) == false) {
+		if (p_dm_odm->support_ic_type & ODM_RTL8822B) {
+
+			if ((!p_dm_odm->is_linked)|(p_dm_odm->bLinkedcmw500))
+				return;
+
+			if (true == p_dm_odm->bsomlenabled) {
+				ODM_RT_TRACE(p_dm_odm,ODM_COMP_API,ODM_DBG_TRACE,("PHYDM_DynamicSoftMLSetting(): SoML has been enable, skip dynamic SoML switch\n"));
+				return; 		
+			}
+
+			ret_val = odm_get_bb_reg(p_dm_odm, 0xf8c, MASKBYTE0);
+			ODM_RT_TRACE(p_dm_odm,ODM_COMP_API,ODM_DBG_TRACE,("PHYDM_DynamicSoftMLSetting(): Read 0xF8C = 0x%08X\n",ret_val));
+
+			if (ret_val < 0x16) {
+				ODM_RT_TRACE(p_dm_odm,ODM_COMP_API,ODM_DBG_LOUD,("PHYDM_DynamicSoftMLSetting(): 0xF8C(== 0x%08X) < 0x16, enable SoML\n",ret_val));
+				phydm_somlrxhp_setting(p_dm_odm, true);
+				/* odm_set_bb_reg(p_dm_odm, 0x19a8, MASKDWORD, 0xc10a0000); */
+				p_dm_odm->bsomlenabled = true;
+			}
+		}
+	}
+#endif
+
+}
+
+
 void
 phydm_init_soft_ml_setting(
 	struct PHY_DM_STRUCT		*p_dm_odm
 )
 {
 #if (RTL8822B_SUPPORT == 1)
-	if (p_dm_odm->mp_mode == false) {
+	if (*(p_dm_odm->p_mp_mode) == false) {
 		if (p_dm_odm->support_ic_type & ODM_RTL8822B)
-			odm_set_bb_reg(p_dm_odm, 0x19a8, MASKDWORD, 0xc10a0000);
+			/*odm_set_bb_reg(p_dm_odm, 0x19a8, MASKDWORD, 0xd10a0000);*/
+			phydm_somlrxhp_setting(p_dm_odm, true);
+			p_dm_odm->bsomlenabled = true;
+	}
+#endif
+#if (RTL8821C_SUPPORT == 1)
+	if (*(p_dm_odm->p_mp_mode) == false) {
+		if (p_dm_odm->support_ic_type & ODM_RTL8821C)
+			odm_set_bb_reg(p_dm_odm, 0x19a8, BIT(31)|BIT(30)|BIT(29)|BIT(28), 0xd);
 	}
 #endif
 }
@@ -552,6 +587,14 @@ phydm_init_hw_info_by_rfe(
 	if (p_dm_odm->support_ic_type & ODM_RTL8822B)
 		phydm_init_hw_info_by_rfe_type_8822b(p_dm_odm);
 #endif
+#if (RTL8821C_SUPPORT == 1)
+	if (p_dm_odm->support_ic_type & ODM_RTL8821C)
+		phydm_init_hw_info_by_rfe_type_8821c(p_dm_odm);
+#endif
+#if (RTL8197F_SUPPORT == 1)
+	if (p_dm_odm->support_ic_type & ODM_RTL8197F)
+		phydm_init_hw_info_by_rfe_type_8197f(p_dm_odm);
+#endif
 }
 
 void
@@ -566,7 +609,6 @@ odm_common_info_self_init(
 
 	phydm_init_debug_setting(p_dm_odm);
 #endif
-	odm_init_mp_driver_status(p_dm_odm);
 	phydm_init_trx_antenna_setting(p_dm_odm);
 	phydm_init_soft_ml_setting(p_dm_odm);
 
@@ -583,6 +625,7 @@ odm_common_info_self_init(
 		p_dm_odm->num_rf_path = 4;
 
 	p_dm_odm->tx_rate = 0xFF;
+	p_dm_odm->rssi_min_by_path = 0xFF;
 
 	p_dm_odm->number_linked_client = 0;
 	p_dm_odm->pre_number_linked_client = 0;
@@ -597,6 +640,9 @@ odm_common_info_self_init(
 	p_dm_odm->traffic_load = TRAFFIC_LOW;
 
 	p_dm_odm->nbi_set_result = 0;
+	p_dm_odm->is_init_hw_info_by_rfe = false;
+	p_dm_odm->pre_dbg_priority = BB_DBGPORT_RELEASE;
+	p_dm_odm->tp_active_th = 5;
 
 }
 
@@ -606,29 +652,30 @@ odm_common_info_self_update(
 )
 {
 	u8	entry_cnt = 0, num_active_client = 0;
-	u32	i, one_entry_macid = 0, ma_rx_tp = 0;
+	u32	i, one_entry_macid = 0;
+	u32	ma_rx_tp = 0;
 	struct sta_info	*p_entry;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 
 	struct _ADAPTER	*adapter =  p_dm_odm->adapter;
-	PMGNT_INFO	p_mgnt_info = &adapter->mgnt_info;
+	PMGNT_INFO	p_mgnt_info = &adapter->MgntInfo;
 
 	p_entry = p_dm_odm->p_odm_sta_info[0];
-	if (p_mgnt_info->m_assoc) {
-		p_entry->is_used = true;
+	if (p_mgnt_info->mAssoc) {
+		p_entry->bUsed = true;
 		for (i = 0; i < 6; i++)
-			p_entry->mac_addr[i] = p_mgnt_info->bssid[i];
-	} else if (get_first_client_port(adapter)) {
-		struct _ADAPTER	*p_client_adapter = get_first_client_port(adapter);
+			p_entry->MacAddr[i] = p_mgnt_info->Bssid[i];
+	} else if (GetFirstClientPort(adapter)) {
+		struct _ADAPTER	*p_client_adapter = GetFirstClientPort(adapter);
 
-		p_entry->is_used = true;
+		p_entry->bUsed = true;
 		for (i = 0; i < 6; i++)
-			p_entry->mac_addr[i] = p_client_adapter->mgnt_info.bssid[i];
+			p_entry->MacAddr[i] = p_client_adapter->MgntInfo.Bssid[i];
 	} else {
-		p_entry->is_used = false;
+		p_entry->bUsed = false;
 		for (i = 0; i < 6; i++)
-			p_entry->mac_addr[i] = 0;
+			p_entry->MacAddr[i] = 0;
 	}
 
 	/* STA mode is linked to AP */
@@ -638,30 +685,6 @@ odm_common_info_self_update(
 		p_dm_odm->bsta_state = false;
 #endif
 
-	/* THis variable cannot be used because it is wrong*/
-#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-	if (*(p_dm_odm->p_band_width) == ODM_BW40M) {
-		if (*(p_dm_odm->p_sec_ch_offset) == 1)
-			p_dm_odm->control_channel = *(p_dm_odm->p_channel) + 2;
-		else if (*(p_dm_odm->p_sec_ch_offset) == 2)
-			p_dm_odm->control_channel = *(p_dm_odm->p_channel) - 2;
-	} else if (*(p_dm_odm->p_band_width) == ODM_BW80M)	{
-		if (*(p_dm_odm->p_sec_ch_offset) == 1)
-			p_dm_odm->control_channel = *(p_dm_odm->p_channel) + 6;
-		else if (*(p_dm_odm->p_sec_ch_offset) == 2)
-			p_dm_odm->control_channel = *(p_dm_odm->p_channel) - 6;
-	} else
-		p_dm_odm->control_channel = *(p_dm_odm->p_channel);
-#else
-	if (*(p_dm_odm->p_band_width) == ODM_BW40M) {
-		if (*(p_dm_odm->p_sec_ch_offset) == 1)
-			p_dm_odm->control_channel = *(p_dm_odm->p_channel) - 2;
-		else if (*(p_dm_odm->p_sec_ch_offset) == 2)
-			p_dm_odm->control_channel = *(p_dm_odm->p_channel) + 2;
-	} else
-		p_dm_odm->control_channel = *(p_dm_odm->p_channel);
-#endif
-
 	for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
 		p_entry = p_dm_odm->p_odm_sta_info[i];
 		if (IS_STA_VALID(p_entry)) {
@@ -670,7 +693,7 @@ odm_common_info_self_update(
 				one_entry_macid = i;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-			ma_rx_tp = (p_entry->rx_byte_cnt_low_maw) << 3; /*  low moving average RX  TP   ( bit /sec)*/
+			ma_rx_tp = (p_entry->rx_byte_cnt_low_maw) >> 17; /*  low moving average RX  TP  ( bit /sec), ,  <<3(8bit), >>20(10^6,M)*/
 
 			ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("ClientTP[%d]: ((%d )) bit/sec\n", i, ma_rx_tp));
 
@@ -683,6 +706,18 @@ odm_common_info_self_update(
 	if (entry_cnt == 1) {
 		p_dm_odm->is_one_entry_only = true;
 		p_dm_odm->one_entry_macid = one_entry_macid;
+		p_dm_odm->one_entry_tp = ma_rx_tp;
+
+		p_dm_odm->tp_active_occur = 0;
+
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("one_entry_tp=((%d)), pre_one_entry_tp=((%d))\n",
+			p_dm_odm->one_entry_tp, p_dm_odm->pre_one_entry_tp));
+
+		if ((p_dm_odm->one_entry_tp > p_dm_odm->pre_one_entry_tp) && (p_dm_odm->pre_one_entry_tp <= 2)) {
+			if ((p_dm_odm->one_entry_tp - p_dm_odm->pre_one_entry_tp) > p_dm_odm->tp_active_th)
+				p_dm_odm->tp_active_occur = 1;
+		}
+		p_dm_odm->pre_one_entry_tp = p_dm_odm->one_entry_tp;
 	} else
 		p_dm_odm->is_one_entry_only = false;
 
@@ -692,9 +727,6 @@ odm_common_info_self_update(
 	p_dm_odm->number_linked_client = entry_cnt;
 	p_dm_odm->number_active_client = num_active_client;
 
-	/* Update MP driver status*/
-	odm_update_mp_driver_status(p_dm_odm);
-
 	/*Traffic load information update*/
 	phydm_traffic_load_decision(p_dm_odm);
 
@@ -778,211 +810,856 @@ odm_hw_setting(
 	if (p_dm_odm->support_ic_type & ODM_RTL8822B)
 		phydm_hwsetting_8822b(p_dm_odm);
 #endif
+
+#if (RTL8197F_SUPPORT == 1)
+	if (p_dm_odm->support_ic_type & ODM_RTL8197F)
+		phydm_hwsetting_8197f(p_dm_odm);
+#endif
 }
-#if SUPPORTABLITY_PHYDMLIZE
-void
-phydm_supportability_init(
+
+
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
+u32
+phydm_supportability_init_win(
 	void		*p_dm_void
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	u32			support_ability = 0;
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
-	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	PMGNT_INFO		p_mgnt_info = &adapter->mgnt_info;
-#endif
-
-	if (p_dm_odm->support_ic_type != ODM_RTL8821C)
-		return;
 
 	switch (p_dm_odm->support_ic_type) {
 
 	/*---------------N Series--------------------*/
+	#if (RTL8188E_SUPPORT == 1)	
 	case	ODM_RTL8188E:
 		support_ability |=
-			ODM_BB_DIG			|
-			ODM_BB_RA_MASK		|
-			ODM_BB_DYNAMIC_TXPWR	|
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
 			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR	|
+			ODM_BB_RSSI_MONITOR		|
 			ODM_BB_CCK_PD			|
-			ODM_RF_TX_PWR_TRACK	|
-			ODM_RF_RX_GAIN_TRACK	|
-			ODM_RF_CALIBRATION		|
-			ODM_MAC_EDCA_TURBO	|
-			ODM_BB_CFO_TRACKING	|
-			ODM_BB_NHM_CNT		|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT			|
 			ODM_BB_PRIMARY_CCA;
 		break;
+	#endif
 
+	#if (RTL8192E_SUPPORT == 1)
 	case	ODM_RTL8192E:
 		support_ability |=
-			ODM_BB_DIG			|
-			ODM_RF_TX_PWR_TRACK	|
-			ODM_BB_RA_MASK		|
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
 			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR	|
-			ODM_MAC_EDCA_TURBO	|
-			ODM_BB_CFO_TRACKING	|
-			/*				ODM_BB_PWR_TRAIN		|*/
-			ODM_BB_NHM_CNT		|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT			|
 			ODM_BB_PRIMARY_CCA;
 		break;
+	#endif
 
+	#if (RTL8723B_SUPPORT == 1)
 	case	ODM_RTL8723B:
 		support_ability |=
-			ODM_BB_DIG			|
-			ODM_BB_RA_MASK		|
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
 			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR	|
+			ODM_BB_RSSI_MONITOR		|
 			ODM_BB_CCK_PD			|
-			ODM_RF_TX_PWR_TRACK	|
-			ODM_RF_RX_GAIN_TRACK	|
-			ODM_RF_CALIBRATION		|
-			ODM_MAC_EDCA_TURBO	|
-			ODM_BB_CFO_TRACKING	|
-			/*				ODM_BB_PWR_TRAIN		|*/
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
 			ODM_BB_NHM_CNT;
 		break;
+	#endif
 
+	#if (RTL8703B_SUPPORT == 1)
 	case	ODM_RTL8703B:
 		support_ability |=
-			ODM_BB_DIG			|
-			ODM_BB_RA_MASK		|
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
 			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR	|
+			ODM_BB_RSSI_MONITOR		|
 			ODM_BB_CCK_PD			|
-			ODM_BB_CFO_TRACKING	|
-			/* ODM_BB_PWR_TRAIN	| */
-			ODM_BB_NHM_CNT		|
-			ODM_RF_TX_PWR_TRACK	|
-			/* ODM_RF_RX_GAIN_TRACK	| */
-			ODM_RF_CALIBRATION		|
-			ODM_MAC_EDCA_TURBO;
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
 		break;
+	#endif
 
+	#if (RTL8723D_SUPPORT == 1)
 	case	ODM_RTL8723D:
 		support_ability |=
 			ODM_BB_DIG				|
-			ODM_BB_RA_MASK		|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
 			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR	|
+			ODM_BB_RSSI_MONITOR		|
 			ODM_BB_CCK_PD			|
-			ODM_BB_CFO_TRACKING	|
 			/* ODM_BB_PWR_TRAIN	| */
-			ODM_BB_NHM_CNT		|
-			ODM_RF_TX_PWR_TRACK	|
-			/* ODM_RF_RX_GAIN_TRACK	| */
-			/* ODM_RF_CALIBRATION	| */
-			ODM_MAC_EDCA_TURBO;
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
 		break;
+	#endif
 
+	#if (RTL8710B_SUPPORT == 1)
+	case	ODM_RTL8710B:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
+
+	#if (RTL8188F_SUPPORT == 1)
 	case	ODM_RTL8188F:
 		support_ability |=
-			ODM_BB_DIG			|
-			ODM_BB_RA_MASK		|
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
 			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR	|
+			ODM_BB_RSSI_MONITOR		|
 			ODM_BB_CCK_PD			|
-			ODM_MAC_EDCA_TURBO	|
-			ODM_BB_CFO_TRACKING	|
-			ODM_BB_NHM_CNT		|
-			ODM_RF_TX_PWR_TRACK	|
-			ODM_RF_CALIBRATION;
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
 		break;
+	#endif
+	
 	/*---------------AC Series-------------------*/
 
+	#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
 	case	ODM_RTL8812:
 	case	ODM_RTL8821:
 		support_ability |=
-			ODM_BB_DIG			|
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			ODM_BB_DYNAMIC_TXPWR	|
 			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR	|
-			ODM_BB_RA_MASK		|
-			ODM_RF_TX_PWR_TRACK	|
-			ODM_MAC_EDCA_TURBO	|
-			ODM_BB_CFO_TRACKING	|
-			/*				ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
+
+	#if (RTL8814A_SUPPORT == 1) 
+	case ODM_RTL8814A:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
 			ODM_BB_DYNAMIC_TXPWR	|
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
+	
+	#if (RTL8814B_SUPPORT == 1) 
+	case ODM_RTL8814B:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
+
+	#if (RTL8822B_SUPPORT == 1) 
+	case ODM_RTL8822B:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT			|
+			ODM_BB_DYNAMIC_PSDTOOL;
+		break;
+	#endif
+
+	#if (RTL8821C_SUPPORT == 1) 
+	case ODM_RTL8821C:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
 			ODM_BB_NHM_CNT;
 		break;
+	#endif
 
+	default:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+
+			dbg_print("[Warning] Supportability Init Warning !!!\n");
+		break;
+
+	}
+
+	/*[Config Antenna Diveristy]*/
+	if (*(p_dm_odm->p_enable_antdiv))
+		support_ability |= ODM_BB_ANT_DIV;
+	
+	/*[Config Adaptivity]*/
+	if (*(p_dm_odm->p_enable_adaptivity))
+		support_ability |= ODM_BB_ADAPTIVITY;
+
+	return support_ability;
+}
+#endif
+
+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
+u32
+phydm_supportability_init_ce(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u32			support_ability = 0;
+
+	switch (p_dm_odm->support_ic_type) {
+
+	/*---------------N Series--------------------*/
+	#if (RTL8188E_SUPPORT == 1)	
+	case	ODM_RTL8188E:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT			|
+			ODM_BB_PRIMARY_CCA;
+		break;
+	#endif
+
+	#if (RTL8192E_SUPPORT == 1)
+	case	ODM_RTL8192E:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
+
+	#if (RTL8723B_SUPPORT == 1)
+	case	ODM_RTL8723B:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
+
+	#if (RTL8703B_SUPPORT == 1)
+	case	ODM_RTL8703B:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
+
+	#if (RTL8723D_SUPPORT == 1)
+	case	ODM_RTL8723D:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/* ODM_BB_PWR_TRAIN	| */	
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
+
+	#if (RTL8710B_SUPPORT == 1)
+	case	ODM_RTL8710B:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
+
+	#if (RTL8188F_SUPPORT == 1)
+	case	ODM_RTL8188F:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
+		
+	/*---------------AC Series-------------------*/
+
+	#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
+	case	ODM_RTL8812:
+	case	ODM_RTL8821:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
+
+	#if (RTL8814A_SUPPORT == 1) 
 	case ODM_RTL8814A:
 		support_ability |=
 			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
 			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR	|
-			ODM_BB_RA_MASK		|
-			ODM_RF_TX_PWR_TRACK	|
+			ODM_BB_RSSI_MONITOR		|
 			ODM_BB_CCK_PD			|
-			ODM_MAC_EDCA_TURBO	|
-			ODM_BB_CFO_TRACKING	|
-			ODM_BB_DYNAMIC_TXPWR	|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
 			ODM_BB_NHM_CNT;
 		break;
+	#endif
+	
+	#if (RTL8814B_SUPPORT == 1) 
+	case ODM_RTL8814B:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
 
+	#if (RTL8822B_SUPPORT == 1) 
 	case ODM_RTL8822B:
 		support_ability |=
 			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
 			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
 			ODM_BB_CCK_PD			|
-			ODM_BB_CFO_TRACKING	|
+			/*ODM_BB_PWR_TRAIN		|*/
 			ODM_BB_RATE_ADAPTIVE	|
-			ODM_BB_RSSI_MONITOR	|
-			ODM_BB_RA_MASK		|
-			ODM_RF_TX_PWR_TRACK	|
-			ODM_MAC_EDCA_TURBO;
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT			|
+			ODM_BB_DYNAMIC_PSDTOOL;
 		break;
+	#endif
 
+	#if (RTL8821C_SUPPORT == 1) 
 	case ODM_RTL8821C:
 		support_ability |=
-			ODM_BB_DIG			|
-			ODM_BB_RA_MASK		|
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
 			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
+
+	default:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
 			ODM_BB_FA_CNT			|
-			ODM_BB_RSSI_MONITOR	|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
 			ODM_BB_RATE_ADAPTIVE	|
-			ODM_RF_TX_PWR_TRACK	|
-			ODM_MAC_EDCA_TURBO	|
-			ODM_BB_CFO_TRACKING;	/* |
- *				ODM_BB_DYNAMIC_TXPWR	|
- *				ODM_BB_NHM_CNT;*/
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+
+			dbg_print("[Warning] Supportability Init Warning !!!\n");
 		break;
+
+	}
+	
+	/*[Config Antenna Diveristy]*/
+	if (*(p_dm_odm->p_enable_antdiv))
+		support_ability |= ODM_BB_ANT_DIV;
+	
+	/*[Config Adaptivity]*/
+	if (*(p_dm_odm->p_enable_adaptivity))
+		support_ability |= ODM_BB_ADAPTIVITY;
+	
+	return support_ability;
+}
+#endif
+
+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
+u32
+phydm_supportability_init_ap(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u32			support_ability = 0;
+
+	switch (p_dm_odm->support_ic_type) {
+
+	/*---------------N Series--------------------*/
+	#if (RTL8188E_SUPPORT == 1)	
+	case	ODM_RTL8188E:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			ODM_BB_DYNAMIC_TXPWR	|
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT			|
+			ODM_BB_PRIMARY_CCA;
+		break;
+	#endif
+
+	#if (RTL8192E_SUPPORT == 1)
+	case	ODM_RTL8192E:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			ODM_BB_DYNAMIC_TXPWR	|
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
+
+	#if (RTL8723B_SUPPORT == 1)
+	case	ODM_RTL8723B:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			ODM_BB_DYNAMIC_TXPWR	|
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
+		
+	#if ((RTL8198F_SUPPORT == 1) || (RTL8197F_SUPPORT == 1))
+	case	ODM_RTL8198F:
+	case	ODM_RTL8197F:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			ODM_BB_DYNAMIC_TXPWR	|
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
+	
+	/*---------------AC Series-------------------*/
+
+	#if (RTL8881A_SUPPORT == 1)
+	case	ODM_RTL8881A:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			ODM_BB_DYNAMIC_TXPWR	|
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
+
+	#if (RTL8814A_SUPPORT == 1) 
+	case ODM_RTL8814A:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			ODM_BB_DYNAMIC_TXPWR	|
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
+	
+	#if (RTL8814B_SUPPORT == 1) 
+	case ODM_RTL8814B:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			ODM_BB_DYNAMIC_TXPWR	|
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
+
+	#if (RTL8822B_SUPPORT == 1) 
+	case ODM_RTL8822B:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			ODM_BB_DYNAMIC_TXPWR	|
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT			|
+			ODM_BB_DYNAMIC_PSDTOOL;
+		break;
+	#endif
+
+	#if (RTL8821C_SUPPORT == 1) 
+	case ODM_RTL8821C:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			ODM_BB_DYNAMIC_TXPWR	|
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+
+		break;
+	#endif
+
 	default:
-		dbg_print("[Warning] Supportability Init error !!!\n");
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			ODM_BB_DYNAMIC_TXPWR	|
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+
+			dbg_print("[Warning] Supportability Init Warning !!!\n");
 		break;
 
 	}
 
+	#if 0
+	/*[Config Antenna Diveristy]*/
 	if (*(p_dm_odm->p_enable_antdiv))
 		support_ability |= ODM_BB_ANT_DIV;
+	
+	/*[Config Adaptivity]*/
+	if (*(p_dm_odm->p_enable_adaptivity))
+		support_ability |= ODM_BB_ADAPTIVITY;
+	#endif
 
-	if (*(p_dm_odm->p_enable_adaptivity)) {
+	return support_ability;
+}
+#endif
 
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM adaptivity is set to Enabled!!!\n"));
+#if (DM_ODM_SUPPORT_TYPE & (ODM_IOT))
+u32
+phydm_supportability_init_iot(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u32			support_ability = 0;
 
-		support_ability |= ODM_BB_ADAPTIVITY;
+	switch (p_dm_odm->support_ic_type) {
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
-		phydm_adaptivity_info_init(p_dm_odm, PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE, p_mgnt_info->RegEnableCarrierSense);
-		phydm_adaptivity_info_init(p_dm_odm, PHYDM_ADAPINFO_DCBACKOFF, p_mgnt_info->RegDCbackoff);
-		phydm_adaptivity_info_init(p_dm_odm, PHYDM_ADAPINFO_DYNAMICLINKADAPTIVITY, p_mgnt_info->RegDmLinkAdaptivity);
-		phydm_adaptivity_info_init(p_dm_odm, PHYDM_ADAPINFO_AP_NUM_TH, p_mgnt_info->RegAPNumTH);
-		phydm_adaptivity_info_init(p_dm_odm, PHYDM_ADAPINFO_TH_L2H_INI, p_mgnt_info->RegL2HForAdaptivity);
-		phydm_adaptivity_info_init(p_dm_odm, PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF, p_mgnt_info->RegHLDiffForAdaptivity);
+	#if (RTL8710B_SUPPORT == 1)
+	case	ODM_RTL8710B:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
+
+	#if (RTL8195A_SUPPORT == 1)
+	case	ODM_RTL8195A:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+		break;
+	#endif
+	
+	default:
+		support_ability |=
+			ODM_BB_DIG				|
+			ODM_BB_RA_MASK			|
+			/*ODM_BB_DYNAMIC_TXPWR	|*/
+			ODM_BB_FA_CNT			|
+			ODM_BB_RSSI_MONITOR		|
+			ODM_BB_CCK_PD			|
+			/*ODM_BB_PWR_TRAIN		|*/
+			ODM_BB_RATE_ADAPTIVE	|
+			ODM_BB_CFO_TRACKING		|
+			ODM_BB_NHM_CNT;
+
+			dbg_print("[Warning] Supportability Init Warning !!!\n");
+		break;
+
+	}
+	
+	/*[Config Antenna Diveristy]*/
+	if (*(p_dm_odm->p_enable_antdiv))
+		support_ability |= ODM_BB_ANT_DIV;
+	
+	/*[Config Adaptivity]*/
+	if (*(p_dm_odm->p_enable_adaptivity))
+		support_ability |= ODM_BB_ADAPTIVITY;
+	
+	return support_ability;
+}
 #endif
-	} else {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM adaptivity is set to disnabled!!!\n"));
+
+void
+phydm_fwoffload_ability_init(
+	struct PHY_DM_STRUCT		*p_dm_odm,
+	enum phydm_offload_ability	offload_ability
+)
+{
+
+	switch (offload_ability) {
+
+	case	PHYDM_PHY_PARAM_OFFLOAD:
+		if (p_dm_odm->support_ic_type & ODM_RTL8822B)
+			p_dm_odm->fw_offload_ability |= PHYDM_PHY_PARAM_OFFLOAD;
+		break;
+
+	case	PHYDM_RF_IQK_OFFLOAD:
+		p_dm_odm->fw_offload_ability |= PHYDM_RF_IQK_OFFLOAD;
+		break;
+
+	default:
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("fwofflad, wrong init type!!\n"));
+		break;
+
+	}
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD,
+		("fw_offload_ability = %x\n", p_dm_odm->fw_offload_ability));
+
+}
+void
+phydm_fwoffload_ability_clear(
+	struct PHY_DM_STRUCT		*p_dm_odm,
+	enum phydm_offload_ability	offload_ability
+)
+{
+
+	switch (offload_ability) {
+
+	case	PHYDM_PHY_PARAM_OFFLOAD:
+		if (p_dm_odm->support_ic_type & ODM_RTL8822B)
+			p_dm_odm->fw_offload_ability &= (~PHYDM_PHY_PARAM_OFFLOAD);
+		break;
+
+	case	PHYDM_RF_IQK_OFFLOAD:
+		p_dm_odm->fw_offload_ability &= (~PHYDM_RF_IQK_OFFLOAD);
+		break;
+
+	default:
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("fwofflad, wrong init type!!\n"));
+		break;
+
+	}
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD,
+		("fw_offload_ability = %x\n", p_dm_odm->fw_offload_ability));
+
+}
+
+void
+phydm_supportability_init(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u32	support_ability;
+	
+	if (*(p_dm_odm->p_mp_mode) == true) {
+		support_ability = 0;
 		/**/
+	} else {
+
+		#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
+		support_ability = phydm_supportability_init_win(p_dm_odm);
+		#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP))
+		support_ability = phydm_supportability_init_ap(p_dm_odm);
+		#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE))
+		support_ability = phydm_supportability_init_ce(p_dm_odm);
+		#elif(DM_ODM_SUPPORT_TYPE & (ODM_IOT))
+		support_ability = phydm_supportability_init_iot(p_dm_odm);
+		#endif
 	}
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("PHYDM support_ability = ((0x%x))\n", support_ability));
 	odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_ABILITY, support_ability);
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IC = ((0x%x)), Supportability Init = ((0x%x))\n", p_dm_odm->support_ic_type, p_dm_odm->support_ability));
+}
+
+
+void
+phydm_dm_early_init(
+	struct PHY_DM_STRUCT	*p_dm_odm
+)
+{
+	#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	/*odm_init_mp_driver_status(p_dm_odm);*/
+	halrf_init(p_dm_odm);
+	#endif
 }
-#endif
 
-/*
- * 2011/09/21 MH Add to describe different team necessary resource allocate??
- *   */
 void
 odm_dm_init(
 	struct PHY_DM_STRUCT		*p_dm_odm
@@ -993,9 +1670,8 @@ odm_dm_init(
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
 #endif
 
-#if SUPPORTABLITY_PHYDMLIZE
+	halrf_init(p_dm_odm);
 	phydm_supportability_init(p_dm_odm);
-#endif
 	odm_common_info_self_init(p_dm_odm);
 	odm_dig_init(p_dm_odm);
 	phydm_nhm_counter_statistics_init(p_dm_odm);
@@ -1003,10 +1679,14 @@ odm_dm_init(
 	phydm_ra_info_init(p_dm_odm);
 	odm_rate_adaptive_mask_init(p_dm_odm);
 	odm_cfo_tracking_init(p_dm_odm);
-	odm_edca_turbo_init(p_dm_odm);
 	odm_rssi_monitor_init(p_dm_odm);
 	phydm_rf_init(p_dm_odm);
 	odm_txpowertracking_init(p_dm_odm);
+	phydm_dc_cancellation(p_dm_odm);
+#if (PHYDM_TXA_CALIBRATION == 1)
+	phydm_txcurrentcalibration(p_dm_odm);
+	phydm_get_pa_bias_offset(p_dm_odm);
+#endif
 	odm_antenna_diversity_init(p_dm_odm);
 #if (CONFIG_DYNAMIC_RX_PATH == 1)
 	phydm_dynamic_rx_path_init(p_dm_odm);
@@ -1019,44 +1699,47 @@ odm_dm_init(
 	adc_smp_init(p_dm_odm);
 #endif
 
-
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-#ifdef BEAMFORMING_VERSION_1
+	#ifdef BEAMFORMING_VERSION_1
 	if (p_hal_data->beamforming_version == BEAMFORMING_VERSION_1)
-#endif
+	#endif
 	{
 		phydm_beamforming_init(p_dm_odm);
 	}
 #endif
 
 	if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) {
-#if (defined(CONFIG_BB_POWER_SAVING))
+		#if (defined(CONFIG_BB_POWER_SAVING))
 		odm_dynamic_bb_power_saving_init(p_dm_odm);
-#endif
+		#endif
 
-#if (RTL8188E_SUPPORT == 1)
+		#if (RTL8188E_SUPPORT == 1)
 		if (p_dm_odm->support_ic_type == ODM_RTL8188E) {
 			odm_primary_cca_init(p_dm_odm);
 			odm_ra_info_init_all(p_dm_odm);
 		}
-#endif
+		#endif
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 
-#if (RTL8723B_SUPPORT == 1)
+		#if (RTL8723B_SUPPORT == 1)
 		if (p_dm_odm->support_ic_type == ODM_RTL8723B)
 			odm_sw_ant_detect_init(p_dm_odm);
-#endif
+		#endif
 
-#if (RTL8192E_SUPPORT == 1)
+		#if (RTL8192E_SUPPORT == 1)
 		if (p_dm_odm->support_ic_type == ODM_RTL8192E)
 			odm_primary_cca_check_init(p_dm_odm);
-#endif
+		#endif
 
 #endif
 
 	}
 
+	#if (CONFIG_PSD_TOOL == 1)
+	phydm_psd_init(p_dm_odm);
+	#endif
+
 }
 
 void
@@ -1070,6 +1753,25 @@ odm_dm_reset(
 	phydm_set_edcca_threshold_api(p_dm_odm, p_dm_dig_table->cur_ig_value);
 }
 
+void
+phydm_primary_cca(
+	struct PHY_DM_STRUCT		*p_dm_odm
+)
+{
+#if PHYDM_PRIMARY_CCA
+
+	if (p_dm_odm->support_ic_type == ODM_RTL8188E) {
+		#if (RTL8188E_SUPPORT == 1)
+		odm_dynamic_primary_cca_8188e(p_dm_odm);
+		#endif
+	} else if (p_dm_odm->support_ic_type == ODM_RTL8192E) {
+		#if (RTL8192E_SUPPORT == 1)
+		odm_dynamic_primary_cca_check_8192e(p_dm_odm);
+		#endif
+	}
+	
+#endif
+}
 
 void
 phydm_support_ability_debug(
@@ -1106,11 +1808,9 @@ phydm_support_ability_debug(
 		PHYDM_SNPRINTF((output + used, out_len - used, "16. (( %s ))PRIMARY_CCA\n", ((p_dm_odm->support_ability & ODM_BB_PRIMARY_CCA) ? ("V") : ("."))));
 		PHYDM_SNPRINTF((output + used, out_len - used, "17. (( %s ))TXBF\n", ((p_dm_odm->support_ability & ODM_BB_TXBF) ? ("V") : ("."))));
 		PHYDM_SNPRINTF((output + used, out_len - used, "18. (( %s ))DYNAMIC_ARFR\n", ((p_dm_odm->support_ability & ODM_BB_DYNAMIC_ARFR) ? ("V") : ("."))));
+		PHYDM_SNPRINTF((output + used, out_len - used, "19. (( %s ))DYNAMIC_PSD_TOOL\n", ((p_dm_odm->support_ability & ODM_BB_DYNAMIC_PSDTOOL) ? ("V") : ("."))));
 		PHYDM_SNPRINTF((output + used, out_len - used, "20. (( %s ))EDCA_TURBO\n", ((p_dm_odm->support_ability & ODM_MAC_EDCA_TURBO) ? ("V") : ("."))));
 		PHYDM_SNPRINTF((output + used, out_len - used, "21. (( %s ))DYNAMIC_RX_PATH\n", ((p_dm_odm->support_ability & ODM_BB_DYNAMIC_RX_PATH) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "24. (( %s ))TX_PWR_TRACK\n", ((p_dm_odm->support_ability & ODM_RF_TX_PWR_TRACK) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "25. (( %s ))RX_GAIN_TRACK\n", ((p_dm_odm->support_ability & ODM_RF_RX_GAIN_TRACK) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "26. (( %s ))RF_CALIBRATION\n", ((p_dm_odm->support_ability & ODM_RF_CALIBRATION) ? ("V") : ("."))));
 		PHYDM_SNPRINTF((output + used, out_len - used, "%s\n", "================================"));
 	}
 	/*
@@ -1152,13 +1852,25 @@ odm_dm_watchdog_lps(
 	odm_false_alarm_counter_statistics(p_dm_odm);
 	odm_rssi_monitor_check(p_dm_odm);
 	odm_dig_by_rssi_lps(p_dm_odm);
+#if PHYDM_SUPPORT_CCKPD
 	odm_cck_packet_detection_thresh(p_dm_odm);
+#endif
 	odm_common_info_self_reset(p_dm_odm);
 
 	if (*(p_dm_odm->p_is_power_saving) == true)
 		return;
 }
 #endif
+
+void
+phydm_watchdog_mp(
+	struct PHY_DM_STRUCT		*p_dm_odm
+)
+{
+#if (CONFIG_DYNAMIC_RX_PATH == 1)
+	phydm_dynamic_rx_path_caller(p_dm_odm);
+#endif
+}
 /*
  * 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM.
  * You can not add any dummy function here, be care, you can only use DM structure
@@ -1199,10 +1911,12 @@ odm_dm_watchdog(
 	odm_update_power_training_state(p_dm_odm);
 	odm_DIG(p_dm_odm);
 	phydm_adaptivity(p_dm_odm);
+#if PHYDM_SUPPORT_CCKPD
 	odm_cck_packet_detection_thresh(p_dm_odm);
+#endif
 
 	phydm_ra_info_watchdog(p_dm_odm);
-	odm_edca_turbo_check(p_dm_odm);
+	phydm_receiver_blocking(p_dm_odm);
 	odm_path_diversity(p_dm_odm);
 	odm_cfo_tracking(p_dm_odm);
 	odm_dynamic_tx_power(p_dm_odm);
@@ -1215,23 +1929,8 @@ odm_dm_watchdog(
 	phydm_beamforming_watchdog(p_dm_odm);
 #endif
 
-	phydm_rf_watchdog(p_dm_odm);
-
-	if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) {
-
-#if (RTL8188E_SUPPORT == 1)
-		if (p_dm_odm->support_ic_type == ODM_RTL8188E)
-			odm_dynamic_primary_cca(p_dm_odm);
-#endif
-
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-
-#if (RTL8192E_SUPPORT == 1)
-		if (p_dm_odm->support_ic_type == ODM_RTL8192E)
-			odm_dynamic_primary_cca_check(p_dm_odm);
-#endif
-#endif
-	}
+	halrf_watchdog(p_dm_odm);
+	phydm_primary_cca(p_dm_odm);
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	odm_dtc(p_dm_odm);
@@ -1359,7 +2058,8 @@ odm_cmn_info_init(
 		break;
 
 	case	ODM_CMNINFO_EXT_TRSW:
-		p_dm_odm->ext_trsw = (u8)value;
+		if (!p_dm_odm->is_init_hw_info_by_rfe)
+			p_dm_odm->ext_trsw = (u8)value;
 		break;
 	case	ODM_CMNINFO_EXT_LNA_GAIN:
 		p_dm_odm->ext_lna_gain = (u8)value;
@@ -1368,13 +2068,13 @@ odm_cmn_info_init(
 		p_dm_odm->patch_id = (u8)value;
 		break;
 	case	ODM_CMNINFO_BINHCT_TEST:
-		p_dm_odm->is_in_hct_test = (bool)value;
+		p_dm_odm->is_in_hct_test = (boolean)value;
 		break;
 	case	ODM_CMNINFO_BWIFI_TEST:
 		p_dm_odm->wifi_test = (u8)value;
 		break;
 	case	ODM_CMNINFO_SMART_CONCURRENT:
-		p_dm_odm->is_dual_mac_smart_concurrent = (bool)value;
+		p_dm_odm->is_dual_mac_smart_concurrent = (boolean)value;
 		break;
 	case	ODM_CMNINFO_DOMAIN_CODE_2G:
 		p_dm_odm->odm_regulation_2_4g = (u8)value;
@@ -1383,13 +2083,13 @@ odm_cmn_info_init(
 		p_dm_odm->odm_regulation_5g = (u8)value;
 		break;
 	case	ODM_CMNINFO_CONFIG_BB_RF:
-		p_dm_odm->config_bbrf = (bool)value;
+		p_dm_odm->config_bbrf = (boolean)value;
 		break;
 	case	ODM_CMNINFO_IQKFWOFFLOAD:
 		p_dm_odm->iqk_fw_offload = (u8)value;
 		break;
 	case	ODM_CMNINFO_IQKPAOFF:
-		p_dm_odm->rf_calibrate_info.is_iqk_pa_off = (bool)value;
+		p_dm_odm->rf_calibrate_info.is_iqk_pa_off = (boolean)value;
 		break;
 	case	ODM_CMNINFO_REGRFKFREEENABLE:
 		p_dm_odm->rf_calibrate_info.reg_rf_kfree_enable = (u8)value;
@@ -1400,11 +2100,32 @@ odm_cmn_info_init(
 	case	ODM_CMNINFO_NORMAL_RX_PATH_CHANGE:
 		p_dm_odm->normal_rx_path = (u8)value;
 		break;
+	case	ODM_CMNINFO_EFUSE0X3D8:
+		p_dm_odm->efuse0x3d8 = (u8)value;
+		break;
+	case	ODM_CMNINFO_EFUSE0X3D7:
+		p_dm_odm->efuse0x3d7 = (u8)value;
+		break;
+	case	ODM_CMNINFO_ADVANCE_OTA:
+		p_dm_odm->p_advance_ota = (u8)value;
+		break;
 #ifdef CONFIG_PHYDM_DFS_MASTER
 	case	ODM_CMNINFO_DFS_REGION_DOMAIN:
 		p_dm_odm->dfs_region_domain = (u8)value;
 		break;
 #endif
+	case	ODM_CMNINFO_SOFT_AP_SPECIAL_SETTING:
+		p_dm_odm->soft_ap_special_setting = (u32)value;
+		break;
+
+	case	ODM_CMNINFO_DPK_EN:
+		/*p_dm_odm->dpk_en = (u1Byte)value;*/
+		halrf_cmn_info_set(p_dm_odm, HALRF_CMNINFO_DPK_EN, (u64)value);
+		break;
+
+	case	ODM_CMNINFO_HP_HWID:
+		p_dm_odm->is_hp_hw_id = (boolean)value;
+		break;
 	/* To remove the compiler warning, must add an empty default statement to handle the other values. */
 	default:
 		/* do nothing */
@@ -1466,7 +2187,7 @@ odm_cmn_info_hook(
 		break;
 
 	case	ODM_CMNINFO_DMSP_GET_VALUE:
-		p_dm_odm->p_is_get_value_from_other_mac = (bool *)p_value;
+		p_dm_odm->p_is_get_value_from_other_mac = (boolean *)p_value;
 		break;
 
 	case	ODM_CMNINFO_BUDDY_ADAPTOR:
@@ -1474,15 +2195,15 @@ odm_cmn_info_hook(
 		break;
 
 	case	ODM_CMNINFO_DMSP_IS_MASTER:
-		p_dm_odm->p_is_master_of_dmsp = (bool *)p_value;
+		p_dm_odm->p_is_master_of_dmsp = (boolean *)p_value;
 		break;
 
 	case	ODM_CMNINFO_SCAN:
-		p_dm_odm->p_is_scan_in_process = (bool *)p_value;
+		p_dm_odm->p_is_scan_in_process = (boolean *)p_value;
 		break;
 
 	case	ODM_CMNINFO_POWER_SAVING:
-		p_dm_odm->p_is_power_saving = (bool *)p_value;
+		p_dm_odm->p_is_power_saving = (boolean *)p_value;
 		break;
 
 	case	ODM_CMNINFO_ONE_PATH_CCA:
@@ -1490,15 +2211,15 @@ odm_cmn_info_hook(
 		break;
 
 	case	ODM_CMNINFO_DRV_STOP:
-		p_dm_odm->p_is_driver_stopped = (bool *)p_value;
+		p_dm_odm->p_is_driver_stopped = (boolean *)p_value;
 		break;
 
 	case	ODM_CMNINFO_PNP_IN:
-		p_dm_odm->p_is_driver_is_going_to_pnp_set_power_sleep = (bool *)p_value;
+		p_dm_odm->p_is_driver_is_going_to_pnp_set_power_sleep = (boolean *)p_value;
 		break;
 
 	case	ODM_CMNINFO_INIT_ON:
-		p_dm_odm->pinit_adpt_in_progress = (bool *)p_value;
+		p_dm_odm->pinit_adpt_in_progress = (boolean *)p_value;
 		break;
 
 	case	ODM_CMNINFO_ANT_TEST:
@@ -1506,7 +2227,7 @@ odm_cmn_info_hook(
 		break;
 
 	case	ODM_CMNINFO_NET_CLOSED:
-		p_dm_odm->p_is_net_closed = (bool *)p_value;
+		p_dm_odm->p_is_net_closed = (boolean *)p_value;
 		break;
 
 	case	ODM_CMNINFO_FORCED_RATE:
@@ -1527,7 +2248,7 @@ odm_cmn_info_hook(
 		break;
 
 	case	ODM_CMNINFO_IS1ANTENNA:
-		p_dm_odm->p_is_1_antenna = (bool *)p_value;
+		p_dm_odm->p_is_1_antenna = (boolean *)p_value;
 		break;
 
 	case	ODM_CMNINFO_RFDEFAULTPATH:
@@ -1535,14 +2256,14 @@ odm_cmn_info_hook(
 		break;
 
 	case	ODM_CMNINFO_FCS_MODE:
-		p_dm_odm->p_is_fcs_mode_enable = (bool *)p_value;
+		p_dm_odm->p_is_fcs_mode_enable = (boolean *)p_value;
 		break;
 	/*add by YuChen for beamforming PhyDM*/
 	case	ODM_CMNINFO_HUBUSBMODE:
 		p_dm_odm->hub_usb_mode = (u8 *)p_value;
 		break;
 	case	ODM_CMNINFO_FWDWRSVDPAGEINPROGRESS:
-		p_dm_odm->p_is_fw_dw_rsvd_page_in_progress = (bool *)p_value;
+		p_dm_odm->p_is_fw_dw_rsvd_page_in_progress = (boolean *)p_value;
 		break;
 	case	ODM_CMNINFO_TX_TP:
 		p_dm_odm->p_current_tx_tp = (u32 *)p_value;
@@ -1561,49 +2282,22 @@ odm_cmn_info_hook(
 	case	ODM_CMNINFO_FORCE_TX_ANT_BY_TXDESC:
 		p_dm_odm->dm_fat_table.p_force_tx_ant_by_desc = (u8 *)p_value;
 		break;
-
-	default:
-		/*do nothing*/
+	case	ODM_CMNINFO_SET_S0S1_DEFAULT_ANTENNA:
+		p_dm_odm->dm_fat_table.p_default_s0_s1 = (u8 *)p_value;
 		break;
-
-	}
-
-}
-
-
-void
-odm_cmn_info_ptr_array_hook(
-	struct PHY_DM_STRUCT		*p_dm_odm,
-	enum odm_cmninfo_e	cmn_info,
-	u16			index,
-	void			*p_value
-)
-{
-	/*Hook call by reference pointer.*/
-	switch	(cmn_info) {
-	/*Dynamic call by reference pointer.	*/
-	case	ODM_CMNINFO_STA_STATUS:
-		p_dm_odm->p_odm_sta_info[index] = (struct sta_info *)p_value;
-
-		if (IS_STA_VALID(p_dm_odm->p_odm_sta_info[index]))
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-			p_dm_odm->platform2phydm_macid_table[((struct sta_info *)p_value)->AssociatedMacId] = index; /*associated_mac_id are unique bttween different adapter*/
-#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
-			p_dm_odm->platform2phydm_macid_table[((struct sta_info *)p_value)->aid] = index;
-#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-			p_dm_odm->platform2phydm_macid_table[((struct sta_info *)p_value)->mac_id] = index;
-#endif
-
+	case	ODM_CMNINFO_SOFT_AP_MODE:
+		p_dm_odm->p_soft_ap_mode = (u32 *)p_value;
+		break;
+	case ODM_CMNINFO_MP_MODE:
+		p_dm_odm->p_mp_mode = (u8 *)p_value;
 		break;
-	/* To remove the compiler warning, must add an empty default statement to handle the other values. */
 	default:
-		/* do nothing */
+		/*do nothing*/
 		break;
+
 	}
 
 }
-
-
 /*
  * Update band/CHannel/.. The values are dynamic but non-per-packet.
  *   */
@@ -1619,7 +2313,7 @@ odm_cmn_info_update(
 	/*  */
 	switch	(cmn_info) {
 	case ODM_CMNINFO_LINK_IN_PROGRESS:
-		p_dm_odm->is_link_in_process = (bool)value;
+		p_dm_odm->is_link_in_process = (boolean)value;
 		break;
 
 	case	ODM_CMNINFO_ABILITY:
@@ -1631,25 +2325,37 @@ odm_cmn_info_update(
 		break;
 
 	case	ODM_CMNINFO_WIFI_DIRECT:
-		p_dm_odm->is_wifi_direct = (bool)value;
+		p_dm_odm->is_wifi_direct = (boolean)value;
 		break;
 
 	case	ODM_CMNINFO_WIFI_DISPLAY:
-		p_dm_odm->is_wifi_display = (bool)value;
+		p_dm_odm->is_wifi_display = (boolean)value;
 		break;
 
 	case	ODM_CMNINFO_LINK:
-		p_dm_odm->is_linked = (bool)value;
+		p_dm_odm->is_linked = (boolean)value;
+		break;
+
+	case   ODM_CMNINFO_CMW500LINK:
+		p_dm_odm->bLinkedcmw500 = (boolean)value;
+		break;
+
+	case ODM_CMNINFO_LPSPG:
+		p_dm_odm->is_in_lps_pg = (boolean)value;
 		break;
 
 	case	ODM_CMNINFO_STATION_STATE:
-		p_dm_odm->bsta_state = (bool)value;
+		p_dm_odm->bsta_state = (boolean)value;
 		break;
 
 	case	ODM_CMNINFO_RSSI_MIN:
 		p_dm_odm->rssi_min = (u8)value;
 		break;
 
+	case	ODM_CMNINFO_RSSI_MIN_BY_PATH:
+		p_dm_odm->rssi_min_by_path = (u8)value;
+		break;
+
 	case	ODM_CMNINFO_DBG_COMP:
 		p_dm_odm->debug_components = (u32)value;
 		break;
@@ -1667,11 +2373,11 @@ odm_cmn_info_update(
 #if defined(BT_SUPPORT) && (BT_SUPPORT == 1)
 	/* The following is for BT HS mode and BT coexist mechanism. */
 	case ODM_CMNINFO_BT_ENABLED:
-		p_dm_odm->is_bt_enabled = (bool)value;
+		p_dm_odm->is_bt_enabled = (boolean)value;
 		break;
 
 	case ODM_CMNINFO_BT_HS_CONNECT_PROCESS:
-		p_dm_odm->is_bt_connect_process = (bool)value;
+		p_dm_odm->is_bt_connect_process = (boolean)value;
 		break;
 
 	case ODM_CMNINFO_BT_HS_RSSI:
@@ -1679,11 +2385,11 @@ odm_cmn_info_update(
 		break;
 
 	case	ODM_CMNINFO_BT_OPERATION:
-		p_dm_odm->is_bt_hs_operation = (bool)value;
+		p_dm_odm->is_bt_hs_operation = (boolean)value;
 		break;
 
 	case	ODM_CMNINFO_BT_LIMITED_DIG:
-		p_dm_odm->is_bt_limited_dig = (bool)value;
+		p_dm_odm->is_bt_limited_dig = (boolean)value;
 		break;
 
 	case ODM_CMNINFO_BT_DIG:
@@ -1691,28 +2397,20 @@ odm_cmn_info_update(
 		break;
 
 	case	ODM_CMNINFO_BT_BUSY:
-		p_dm_odm->is_bt_busy = (bool)value;
+		p_dm_odm->is_bt_busy = (boolean)value;
 		break;
 
 	case	ODM_CMNINFO_BT_DISABLE_EDCA:
-		p_dm_odm->is_bt_disable_edca_turbo = (bool)value;
+		p_dm_odm->is_bt_disable_edca_turbo = (boolean)value;
 		break;
 #endif
 
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)		/* for repeater mode add by YuChen 2014.06.23 */
-#ifdef UNIVERSAL_REPEATER
-	case	ODM_CMNINFO_VXD_LINK:
-		p_dm_odm->vxd_linked = (bool)value;
-		break;
-#endif
-#endif
-
 	case	ODM_CMNINFO_AP_TOTAL_NUM:
 		p_dm_odm->ap_total_num = (u8)value;
 		break;
 
 	case	ODM_CMNINFO_POWER_TRAINING:
-		p_dm_odm->is_disable_power_training = (bool)value;
+		p_dm_odm->is_disable_power_training = (boolean)value;
 		break;
 
 #ifdef CONFIG_PHYDM_DFS_MASTER
@@ -1820,6 +2518,13 @@ phydm_cmn_info_query(
 
 	case PHYDM_INFO_DBG_PORT_0:
 		return false_alm_cnt->dbg_port0;
+				
+	case PHYDM_INFO_CRC32_OK_HT_AGG:
+		return false_alm_cnt->cnt_ht_crc32_ok_agg;
+		
+	case PHYDM_INFO_CRC32_ERROR_HT_AGG:
+		return false_alm_cnt->cnt_ht_crc32_error_agg;
+					
 
 	default:
 		return 0xffffffff;
@@ -1835,6 +2540,15 @@ odm_init_all_work_items(struct PHY_DM_STRUCT	*p_dm_odm)
 
 	struct _ADAPTER		*p_adapter = p_dm_odm->adapter;
 #if USE_WORKITEM
+
+#if CONFIG_DYNAMIC_RX_PATH
+	odm_initialize_work_item(p_dm_odm,
+			 &p_dm_odm->dm_drp_table.phydm_dynamic_rx_path_workitem,
+		 (RT_WORKITEM_CALL_BACK)phydm_dynamic_rx_path_workitem_callback,
+				 (void *)p_adapter,
+				 "DynamicRxPathWorkitem");
+
+#endif
 #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
 	odm_initialize_work_item(p_dm_odm,
 		 &p_dm_odm->dm_swat_table.phydm_sw_antenna_switch_workitem,
@@ -1842,7 +2556,7 @@ odm_init_all_work_items(struct PHY_DM_STRUCT	*p_dm_odm)
 				 (void *)p_adapter,
 				 "AntennaSwitchWorkitem");
 #endif
-#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
+#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1)) || (defined(CONFIG_HL_SMART_ANTENNA_TYPE2))
 	odm_initialize_work_item(p_dm_odm,
 			 &p_dm_odm->dm_sat_table.hl_smart_antenna_workitem,
 		 (RT_WORKITEM_CALL_BACK)phydm_beam_switch_workitem_callback,
@@ -1994,7 +2708,13 @@ odm_free_all_work_items(struct PHY_DM_STRUCT	*p_dm_odm)
 	odm_free_work_item(&(p_dm_odm->dm_swat_table.phydm_sw_antenna_switch_workitem));
 #endif
 
-#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
+#if CONFIG_DYNAMIC_RX_PATH
+	odm_free_work_item(&(p_dm_odm->dm_drp_table.phydm_dynamic_rx_path_workitem));
+#endif
+
+
+
+#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1)) || (defined(CONFIG_HL_SMART_ANTENNA_TYPE2))
 	odm_free_work_item(&(p_dm_odm->dm_sat_table.hl_smart_antenna_workitem));
 	odm_free_work_item(&(p_dm_odm->dm_sat_table.hl_smart_antenna_decision_workitem));
 #endif
@@ -2058,7 +2778,7 @@ odm_IsLinked(
 )
 {
 	u32 i;
-	bool Linked = false;
+	boolean Linked = false;
 
 	for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
 		if (IS_STA_VALID(p_dm_odm->p_odm_sta_info[i])) {
@@ -2081,9 +2801,13 @@ odm_init_all_timers(
 	odm_ant_div_timers(p_dm_odm, INIT_ANTDIV_TIMMER);
 #endif
 
+#if (CONFIG_DYNAMIC_RX_PATH == 1)
+	phydm_dynamic_rx_path_timers(p_dm_odm, INIT_DRP_TIMMER);
+#endif
+
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
 #ifdef MP_TEST
-	if (p_dm_odm->priv->pshare->rf_ft_var.mp_specific)
+	if (*(p_dm_odm->p_mp_mode))
 		odm_initialize_timer(p_dm_odm, &p_dm_odm->mpt_dig_timer,
 			(void *)odm_mpt_dig_callback, NULL, "mpt_dig_timer");
 #endif
@@ -2123,16 +2847,20 @@ odm_cancel_all_timers(
 	/* 2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in */
 	/* win7 platform. */
 	/*  */
-	HAL_ADAPTER_STS_CHK(p_dm_odm)
+	HAL_ADAPTER_STS_CHK(p_dm_odm);
 #endif
 
 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
 	odm_ant_div_timers(p_dm_odm, CANCEL_ANTDIV_TIMMER);
 #endif
 
+#if (CONFIG_DYNAMIC_RX_PATH == 1)
+	phydm_dynamic_rx_path_timers(p_dm_odm, CANCEL_DRP_TIMMER);
+#endif
+
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
 #ifdef MP_TEST
-	if (p_dm_odm->priv->pshare->rf_ft_var.mp_specific)
+	if (*(p_dm_odm->p_mp_mode))
 		odm_cancel_timer(p_dm_odm, &p_dm_odm->mpt_dig_timer);
 #endif
 #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
@@ -2167,9 +2895,13 @@ odm_release_all_timers(
 	odm_ant_div_timers(p_dm_odm, RELEASE_ANTDIV_TIMMER);
 #endif
 
+#if (CONFIG_DYNAMIC_RX_PATH == 1)
+	phydm_dynamic_rx_path_timers(p_dm_odm, RELEASE_DRP_TIMMER);
+#endif
+
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
 #ifdef MP_TEST
-	if (p_dm_odm->priv->pshare->rf_ft_var.mp_specific)
+	if (*(p_dm_odm->p_mp_mode))
 		odm_release_timer(p_dm_odm, &p_dm_odm->mpt_dig_timer);
 #endif
 #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
@@ -2228,15 +2960,15 @@ odm_stop_all_threads(
 /*
  * 2011/07/26 MH Add an API for testing IQK fail case.
  *   */
-bool
+boolean
 odm_check_power_status(
 	struct _ADAPTER		*adapter)
 {
 
 	HAL_DATA_TYPE		*p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT			*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT			*p_dm_odm = &p_hal_data->DM_OutSrc;
 	RT_RF_POWER_STATE	rt_state;
-	PMGNT_INFO			p_mgnt_info	= &(adapter->mgnt_info);
+	PMGNT_INFO			p_mgnt_info	= &(adapter->MgntInfo);
 
 	/* 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. */
 	if (p_mgnt_info->init_adpt_in_progress == true) {
@@ -2247,24 +2979,24 @@ odm_check_power_status(
 	/*  */
 	/*	2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. */
 	/*  */
-	adapter->hal_func.get_hw_reg_handler(adapter, HW_VAR_RF_STATE, (u8 *)(&rt_state));
-	if (adapter->is_driver_stopped || adapter->is_driver_is_going_to_pnp_set_power_sleep || rt_state == e_rf_off) {
+	adapter->HalFunc.GetHwRegHandler(adapter, HW_VAR_RF_STATE, (u8 *)(&rt_state));
+	if (adapter->bDriverStopped || adapter->bDriverIsGoingToPnpSetPowerSleep || rt_state == eRfOff) {
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("odm_check_power_status Return false, due to %d/%d/%d\n",
-			adapter->is_driver_stopped, adapter->is_driver_is_going_to_pnp_set_power_sleep, rt_state));
+			adapter->bDriverStopped, adapter->bDriverIsGoingToPnpSetPowerSleep, rt_state));
 		return	false;
 	}
 	return	true;
 }
 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
-bool
+boolean
 odm_check_power_status(
 	struct _ADAPTER		*adapter)
 {
 #if 0
 	/* HAL_DATA_TYPE		*p_hal_data = GET_HAL_DATA(adapter); */
-	struct PHY_DM_STRUCT			*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT			*p_dm_odm = &p_hal_data->DM_OutSrc;
 	RT_RF_POWER_STATE	rt_state;
-	PMGNT_INFO			p_mgnt_info	= &(adapter->mgnt_info);
+	PMGNT_INFO			p_mgnt_info	= &(adapter->MgntInfo);
 
 	/*  2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. */
 	if (p_mgnt_info->init_adpt_in_progress == true) {
@@ -2275,8 +3007,8 @@ odm_check_power_status(
 	/* */
 	/*	2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. */
 	/* */
-	adapter->hal_func.get_hw_reg_handler(adapter, HW_VAR_RF_STATE, (u8 *)(&rt_state));
-	if (adapter->is_driver_stopped || adapter->is_driver_is_going_to_pnp_set_power_sleep || rt_state == e_rf_off) {
+	phydm_get_hw_reg_interface(p_dm_odm, HW_VAR_RF_STATE, (u8 *)(&rt_state));
+	if (adapter->is_driver_stopped || adapter->is_driver_is_going_to_pnp_set_power_sleep || rt_state == eRfOff) {
 		ODM_RT_TRACE(p_dm_odm, COMP_INIT, DBG_LOUD, ("odm_check_power_status Return false, due to %d/%d/%d\n",
 			adapter->is_driver_stopped, adapter->is_driver_is_going_to_pnp_set_power_sleep, rt_state));
 		return	false;
@@ -2289,49 +3021,6 @@ odm_check_power_status(
 /* need to ODM CE Platform
  * move to here for ANT detection mechanism using */
 
-#if ((DM_ODM_SUPPORT_TYPE == ODM_WIN) || (DM_ODM_SUPPORT_TYPE == ODM_CE))
-u32
-get_psd_data(
-	struct PHY_DM_STRUCT	*p_dm_odm,
-	unsigned int	point,
-	u8 initial_gain_psd)
-{
-	/* unsigned int	val, rfval; */
-	/* int	psd_report; */
-	u32	psd_report;
-
-	/* HAL_DATA_TYPE		*p_hal_data = GET_HAL_DATA(adapter); */
-	/* Debug Message */
-	/* val = phy_query_bb_reg(adapter,0x908, MASKDWORD); */
-	/* dbg_print("reg908 = 0x%x\n",val); */
-	/* val = phy_query_bb_reg(adapter,0xDF4, MASKDWORD); */
-	/* rfval = phy_query_rf_reg(adapter, ODM_RF_PATH_A, 0x00, RFREGOFFSETMASK); */
-	/* dbg_print("RegDF4 = 0x%x, RFReg00 = 0x%x\n",val, rfval); */
-	/* dbg_print("PHYTXON = %x, OFDMCCA_PP = %x, CCKCCA_PP = %x, RFReg00 = %x\n", */
-	/* (val&BIT25)>>25, (val&BIT14)>>14, (val&BIT15)>>15, rfval); */
-
-	/* Set DCO frequency index, offset=(40MHz/SamplePts)*point */
-	odm_set_bb_reg(p_dm_odm, 0x808, 0x3FF, point);
-
-	/* Start PSD calculation, Reg808[22]=0->1 */
-	odm_set_bb_reg(p_dm_odm, 0x808, BIT(22), 1);
-	/* Need to wait for HW PSD report */
-	odm_stall_execution(1000);
-	odm_set_bb_reg(p_dm_odm, 0x808, BIT(22), 0);
-	/* Read PSD report, Reg8B4[15:0] */
-	psd_report = odm_get_bb_reg(p_dm_odm, 0x8B4, MASKDWORD) & 0x0000FFFF;
-
-#if 1/* (DEV_BUS_TYPE == RT_PCI_INTERFACE) && ((RT_PLATFORM == PLATFORM_LINUX) || (RT_PLATFORM == PLATFORM_MACOSX)) */
-	psd_report = (u32)(odm_convert_to_db(psd_report)) + (u32)(initial_gain_psd - 0x1c);
-#else
-	psd_report = (int)(20 * log10((double)psd_report)) + (int)(initial_gain_psd - 0x1c);
-#endif
-
-	return psd_report;
-
-}
-#endif
-
 u32
 odm_convert_to_db(
 	u32	value)
@@ -2381,54 +3070,6 @@ odm_convert_to_linear(
 	return linear;
 }
 
-/*
- * ODM multi-port consideration, added by Roger, 2013.10.01.
- *   */
-void
-odm_asoc_entry_init(
-	struct PHY_DM_STRUCT	*p_dm_odm
-)
-{
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER *p_loop_adapter = get_default_adapter(p_dm_odm->adapter);
-	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_loop_adapter);
-	struct PHY_DM_STRUCT		*p_dm_out_src = &p_hal_data->dm_out_src;
-	u8	total_assoc_entry_num = 0;
-	u8	index = 0;
-	u8	adaptercount = 0;
-
-	odm_cmn_info_ptr_array_hook(p_dm_out_src, ODM_CMNINFO_STA_STATUS, 0, &p_loop_adapter->mgnt_info.default_port[0]);
-	p_loop_adapter->mgnt_info.default_port[0].multi_port_station_idx = total_assoc_entry_num;
-
-	adaptercount += 1;
-	RT_TRACE(COMP_INIT, DBG_LOUD, ("adaptercount=%d\n", adaptercount));
-	p_loop_adapter = get_next_ext_adapter(p_loop_adapter);
-	total_assoc_entry_num += 1;
-
-	while (p_loop_adapter) {
-		for (index = 0; index < ASSOCIATE_ENTRY_NUM; index++) {
-			odm_cmn_info_ptr_array_hook(p_dm_out_src, ODM_CMNINFO_STA_STATUS, total_assoc_entry_num + index, &p_loop_adapter->mgnt_info.asoc_entry[index]);
-			p_loop_adapter->mgnt_info.asoc_entry[index].multi_port_station_idx = total_assoc_entry_num + index;
-		}
-
-		total_assoc_entry_num += index;
-		if (IS_HARDWARE_TYPE_8188E((p_dm_odm->adapter)))
-			p_loop_adapter->ra_support = true;
-		adaptercount += 1;
-		RT_TRACE(COMP_INIT, DBG_LOUD, ("adaptercount=%d\n", adaptercount));
-		p_loop_adapter = get_next_ext_adapter(p_loop_adapter);
-	}
-
-	RT_TRACE(COMP_INIT, DBG_LOUD, ("total_assoc_entry_num = %d\n", total_assoc_entry_num));
-	if (total_assoc_entry_num < (ODM_ASSOCIATE_ENTRY_NUM - 1)) {
-
-		RT_TRACE(COMP_INIT, DBG_LOUD, ("In hook null\n"));
-		for (index = total_assoc_entry_num; index < ODM_ASSOCIATE_ENTRY_NUM; index++)
-			odm_cmn_info_ptr_array_hook(p_dm_out_src, ODM_CMNINFO_STA_STATUS, index, NULL);
-	}
-#endif
-}
-
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 /* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */
 void odm_dtc(struct PHY_DM_STRUCT *p_dm_odm)
@@ -2782,8 +3423,6 @@ phydm_set_ext_switch(
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32			used = *_used;
-	u32			out_len = *_out_len;
 	u32			ext_ant_switch =  dm_value[0];
 
 	if (p_dm_odm->support_ic_type & (ODM_RTL8821 | ODM_RTL8881A)) {
@@ -3007,7 +3646,12 @@ phydm_nbi_enable(
 
 	} else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
 
-		odm_set_bb_reg(p_dm_odm, 0x87c, BIT(13), reg_value);
+		if (p_dm_odm->support_ic_type & (ODM_RTL8822B|ODM_RTL8821C)) {
+			odm_set_bb_reg(p_dm_odm, 0xc20, BIT(28), reg_value);
+			if (p_dm_odm->rf_type > ODM_1T1R)
+				odm_set_bb_reg(p_dm_odm, 0xe20, BIT(28), reg_value);
+		} else
+			odm_set_bb_reg(p_dm_odm, 0x87c, BIT(13), reg_value);
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_API, ODM_DBG_LOUD, ("Enable NBI Reg0x87C[13] = ((0x%x))\n", reg_value));
 	}
 }
@@ -3138,7 +3782,6 @@ phydm_csi_mask_setting(
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	u32		fc;
-	u32		int_distance;
 	u8		tone_direction;
 	u32		tone_idx_tmp;
 	u8		set_result = SET_SUCCESS;
@@ -3188,10 +3831,8 @@ phydm_nbi_setting(
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	u32		fc;
-	u32		int_distance;
 	u32		tone_idx_tmp;
 	u8		set_result = SET_SUCCESS;
-	u32		bw_max = 40;
 
 	if (enable == NBI_DISABLE)
 		set_result = SET_SUCCESS;
@@ -3296,3 +3937,207 @@ phydm_api_debug(
 		PHYDM_SNPRINTF((output + used, out_len - used, "[CSI MASK set result: %s]\n", (set_result == SET_SUCCESS) ? "Success" : ((set_result == SET_NO_NEED) ? "No need" : "Error")));
 	}
 }
+
+void
+phydm_stop_ck320(
+	void			*p_dm_void,
+	u8			enable
+) {
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u32		reg_value = (enable == true) ? 1 : 0;
+	
+	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
+		odm_set_bb_reg(p_dm_odm, 0x8b4, BIT(6), reg_value);
+		/**/
+	} else { 
+
+	 	if (p_dm_odm->support_ic_type & ODM_IC_N_2SS) {	/*N-2SS*/
+			odm_set_bb_reg(p_dm_odm, 0x87c, BIT(29), reg_value);
+			/**/
+		} else {	/*N-1SS*/
+			odm_set_bb_reg(p_dm_odm, 0x87c, BIT(31), reg_value);
+			/**/
+		}
+	}
+}
+
+
+/*<20170126, BB-Kevin>8188F D-CUT DC cancellation and 8821C*/
+void
+phydm_dc_cancellation(
+	struct PHY_DM_STRUCT	*p_dm_odm
+
+)
+{	
+#if PHYDM_DC_CANCELLATION
+	u32		offset_i_hex[ODM_RF_PATH_MAX] = {0};
+	u32		offset_q_hex[ODM_RF_PATH_MAX] = {0};
+	u32		reg_value32[ODM_RF_PATH_MAX] = {0};
+	u8		det_num = 0;
+
+	if (!(p_dm_odm->support_ic_type & ODM_DC_CANCELLATION_SUPPORT))
+		return;
+	
+	/*DC_Estimation (only for 2x2 ic now) */
+
+for (det_num = 0; det_num < ODM_RF_PATH_MAX; det_num++) {
+	if (p_dm_odm->support_ic_type & (ODM_RTL8188F | ODM_RTL8710B)) {
+		if (!phydm_set_bb_dbg_port(p_dm_odm, BB_DBGPORT_PRIORITY_2, 0x235))	{/*set debug port to 0x235*/
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[DC Cancellation] Set Debug port Fail"));
+			return;
+		}
+	} else if (p_dm_odm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B)) {
+			/* Path-a */
+		if (det_num == 0) {
+			if (!phydm_set_bb_dbg_port(p_dm_odm, BB_DBGPORT_PRIORITY_2, 0x200)) {/*set debug port to 0x200*/
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[DC Cancellation] Set Debug port Fail"));
+				return;
+			}
+			phydm_bb_dbg_port_header_sel(p_dm_odm, 0x0);
+			/* Path-b */
+			} else if (det_num == 1) {
+
+				if (!(p_dm_odm->support_ic_type & ODM_RTL8822B)) {
+					ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[DC Cancellation] Only one-path now"));
+					break;
+				}
+				
+				if (!phydm_set_bb_dbg_port(p_dm_odm, BB_DBGPORT_PRIORITY_2, 0x202)) {/*set debug port to 0x200*/
+					ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[DC Cancellation] Set Debug port Fail"));
+					return;
+				}
+				phydm_bb_dbg_port_header_sel(p_dm_odm, 0x0);
+			} 
+	}
+	
+	//odm_set_bb_reg(p_dm_odm, 0x908, bMaskDWord, 0x235);
+	//odm_set_bb_reg(p_dm_odm, 0xa78, BIT(3), 0x1);
+	odm_write_dig(p_dm_odm, 0x7E);
+	
+	if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) {
+		odm_set_bb_reg(p_dm_odm, 0x88c, BIT(21)|BIT(20), 0x3);
+	} else {
+		odm_set_bb_reg(p_dm_odm, 0xc00, BIT(1)|BIT(0), 0x0);
+		odm_set_bb_reg(p_dm_odm, 0xe00, BIT(1)|BIT(0), 0x0);
+	}
+	odm_set_bb_reg(p_dm_odm, 0xa78, MASKBYTE1, 0x0); /*disable CCK DCNF*/
+	
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, (" DC cancellation Begin!!!"));
+	
+#if 0
+
+	odm_set_bb_reg(p_dm_odm, 0x87c, BIT(31), 0x1);	/*stop ck320*/
+	offset_i_hex = odm_get_bb_reg(p_dm_odm, 0xDF4, 0xffc0000);
+	offset_q_hex = odm_get_bb_reg(p_dm_odm, 0xDF4, 0x3ff00);
+	odm_set_bb_reg(p_dm_odm, 0x87c, BIT(31), 0x0);	/*start ck320*/
+	
+#else
+	
+	phydm_stop_ck320(p_dm_odm, true);	/*stop ck320*/
+
+		/* the same debug port both for path-a and path-b*/
+		if (det_num == 0)
+			reg_value32[det_num] = phydm_get_bb_dbg_port_value(p_dm_odm);
+		else if (det_num == 1)
+			reg_value32[det_num] = phydm_get_bb_dbg_port_value(p_dm_odm);
+
+	phydm_stop_ck320(p_dm_odm, false);	/*start ck320*/
+
+#endif
+
+		if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) {
+			odm_set_bb_reg(p_dm_odm, 0x88c, BIT(21)|BIT(20), 0x0);
+		} else {
+			odm_set_bb_reg(p_dm_odm, 0xc00, BIT(1)|BIT(0), 0x3);
+			odm_set_bb_reg(p_dm_odm, 0xe00, BIT(1)|BIT(0), 0x3);
+		}
+	odm_write_dig(p_dm_odm, 0x20);
+	phydm_release_bb_dbg_port(p_dm_odm);
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, (" DC cancellation OK!!!"));	
+}
+		
+	/*DC_Cancellation*/
+	odm_set_bb_reg(p_dm_odm, 0xa9c, BIT(20), 0x1); /*DC compensation to CCK data path*/
+	if (p_dm_odm->support_ic_type & (ODM_RTL8188F | ODM_RTL8710B)) {
+		offset_i_hex[0] = (reg_value32[0] & 0xffc0000) >> 18;
+		offset_q_hex[0] = (reg_value32[0] & 0x3ff00) >> 8;
+
+		/*Before filling into registers, offset should be multiplexed (-1)*/
+		offset_i_hex[0] = (offset_i_hex[0] >= 0x200) ? (0x400 - offset_i_hex[1]) : (0x1ff - offset_i_hex[1]);
+		offset_q_hex[0] = (offset_q_hex[0] >= 0x200) ? (0x400 - offset_q_hex[1]) : (0x1ff - offset_q_hex[1]);
+
+		odm_set_bb_reg(p_dm_odm, 0x950, 0x1ff, offset_i_hex[1]);
+		odm_set_bb_reg(p_dm_odm, 0x950, 0x1ff0000, offset_q_hex[1]);
+	} else if (p_dm_odm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B)) {
+	
+		/* Path-a */
+		offset_i_hex[0] = (reg_value32[0] & 0xffc00) >> 10;
+		offset_q_hex[0] = reg_value32[0] & 0x3ff;
+
+		/*Before filling into registers, offset should be multiplexed (-1)*/
+		offset_i_hex[0] = 0x400 - offset_i_hex[0];
+		offset_q_hex[0] = 0x400 - offset_q_hex[0];
+
+		odm_set_bb_reg(p_dm_odm, 0xc10, 0x3c000000, ((0x3c0 & offset_i_hex[0]) >> 6));
+		odm_set_bb_reg(p_dm_odm, 0xc10, 0xfc00, (0x3f & offset_i_hex[0]));
+		odm_set_bb_reg(p_dm_odm, 0xc14, 0x3c000000, ((0x3c0 & offset_q_hex[0]) >> 6));
+		odm_set_bb_reg(p_dm_odm, 0xc14, 0xfc00, (0x3f & offset_q_hex[0]));
+
+		/* Path-b */
+		if (p_dm_odm->support_ic_type & ODM_RTL8822B) {
+			
+			offset_i_hex[1] = (reg_value32[1] & 0xffc00) >> 10;
+			offset_q_hex[1] = reg_value32[1] & 0x3ff;
+
+		/*Before filling into registers, offset should be multiplexed (-1)*/
+			offset_i_hex[1] = 0x400 - offset_i_hex[1];
+			offset_q_hex[1] = 0x400 - offset_q_hex[1];
+
+			odm_set_bb_reg(p_dm_odm, 0xe10, 0x3c000000, ((0x3c0 & offset_i_hex[1]) >> 6));
+			odm_set_bb_reg(p_dm_odm, 0xe10, 0xfc00, (0x3f & offset_i_hex[1]));
+			odm_set_bb_reg(p_dm_odm, 0xe14, 0x3c000000, ((0x3c0 & offset_q_hex[1]) >> 6));
+			odm_set_bb_reg(p_dm_odm, 0xe14, 0xfc00, (0x3f & offset_q_hex[1]));
+		}
+	}
+#endif
+}
+
+void
+phydm_receiver_blocking(
+	void *p_dm_void
+)
+{
+#ifdef CONFIG_RECEIVER_BLOCKING
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u32	channel = *p_dm_odm->p_channel;
+	u8	bw = *p_dm_odm->p_band_width;
+	u8	set_result = 0;
+
+	if (!(p_dm_odm->support_ic_type & ODM_RECEIVER_BLOCKING_SUPPORT))
+		return;
+	
+	if (p_dm_odm->consecutive_idlel_time > 10 && *p_dm_odm->p_mp_mode == false && p_dm_odm->adaptivity_enable == true) {
+		if ((bw == ODM_BW20M) && (channel == 1) && !p_dm_odm->is_nbi_enable) { 
+			set_result = phydm_nbi_setting(p_dm_odm, NBI_ENABLE, channel, 20, 2410, PHYDM_DONT_CARE);
+			p_dm_odm->is_nbi_enable = true;
+		} else if ((bw == ODM_BW20M) && (channel == 13) && !p_dm_odm->is_nbi_enable) {
+			set_result = phydm_nbi_setting(p_dm_odm, NBI_ENABLE, channel, 20, 2473, PHYDM_DONT_CARE);
+			p_dm_odm->is_nbi_enable = true;
+		} else {
+			if (p_dm_odm->is_nbi_enable && channel != 1 && channel != 13) {
+				phydm_nbi_enable(p_dm_odm, NBI_DISABLE);
+				p_dm_odm->is_nbi_enable = false;
+			}
+		}
+	} else {
+		if (p_dm_odm->is_nbi_enable) {
+			phydm_nbi_enable(p_dm_odm, NBI_DISABLE);
+			p_dm_odm->is_nbi_enable = false;
+		}
+	}
+	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, 
+		("[NBI set result: %s]\n", (set_result == SET_SUCCESS ? "Success" : (set_result == SET_NO_NEED ? "No need" : "Error"))));
+#endif
+}
+
diff --git a/rtl8822BU/hal/phydm/phydm.h b/rtl8822BU/hal/phydm/phydm.h
index 927c6b2..25aff31 100755..100644
--- a/rtl8822BU/hal/phydm/phydm.h
+++ b/rtl8822BU/hal/phydm/phydm.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 
 #ifndef	__HALDMOUTSRC_H__
@@ -27,7 +22,6 @@
 /*============================================================*/
 #include "phydm_pre_define.h"
 #include "phydm_dig.h"
-#include "phydm_edcaturbocheck.h"
 #include "phydm_pathdiv.h"
 #include "phydm_antdiv.h"
 #include "phydm_antdect.h"
@@ -37,13 +31,15 @@
 #include "phydm_cfotracking.h"
 #include "phydm_acs.h"
 #include "phydm_adaptivity.h"
-#include "phydm_iqk.h"
 #include "phydm_dfs.h"
 #include "phydm_ccx.h"
 #include "txbf/phydm_hal_txbf_api.h"
 
 #include "phydm_adc_sampling.h"
 #include "phydm_dynamic_rx_path.h"
+#include "phydm_psd.h"
+#include "halrf/halrf_iqk.h"
+#include "halrf/halrf.h"
 
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_WIN))
@@ -51,19 +47,21 @@
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	#include "halphyrf_ap.h"
+	#include "halrf/halphyrf_ap.h"
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
 	#include "phydm_noisemonitor.h"
-	#include "halphyrf_ce.h"
+	#include "halrf/halphyrf_ce.h"
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
-	#include "halphyrf_win.h"
+	#include "halrf/halphyrf_win.h"
 	#include "phydm_noisemonitor.h"
 #endif
 
+extern const u16 phy_rate_table[28];
+
 /*============================================================*/
 /*Definition */
 /*============================================================*/
@@ -116,53 +114,16 @@
 /*structure and define*/
 /*============================================================*/
 
-/*2011/09/20 MH Add for AP/ADSLpseudo DM structuer requirement.*/
-/*We need to remove to other position???*/
-
-#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_WIN))
-struct rtl8192cd_priv {
-		u8		temp;
-
-	};
-#endif
-
-
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-struct _ADAPTER {
-	u8		temp;
-#ifdef AP_BUILD_WORKAROUND
-	HAL_DATA_TYPE		*temp2;
-	struct rtl8192cd_priv		*priv;
-#endif
-};
-#endif
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-
-struct _WLAN_STA {
-	u8		temp;
-};
-
-#endif
-
 struct _dynamic_primary_cca {
 	u8	pri_cca_flag;
 	u8	intf_flag;
 	u8	intf_type;
 	u8	dup_rts_flag;
 	u8	monitor_flag;
-	u8	CH_offset;
-	u8	MF_state;
+	u8	ch_offset;
+	u8	mf_state;
 };
 
-
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	#ifdef ADSL_AP_BUILD_WORKAROUND
-		#define MAX_TOLERANCE			5
-		#define IQK_DELAY_TIME			1		/*ms*/
-	#endif
-#endif	/*#if(DM_ODM_SUPPORT_TYPE & (ODM_AP))*/
-
 #define		dm_type_by_fw			0
 #define		dm_type_by_driver		1
 
@@ -177,6 +138,7 @@ __PACK struct _odm_phy_status_info_ {
 	u8		rx_pwdb_all;
 	u8		signal_quality;					/* in 0-100 index. */
 	u8		rx_mimo_signal_strength[4];		/* in 0~100 index */
+	u8		rx_mimo_evm_dbm[4];			/* per-path's original EVM (dbm) */
 	s8		rx_mimo_signal_quality[4];		/* EVM */
 	s8		rx_snr[4];					/* per-path's SNR */
 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
@@ -188,8 +150,8 @@ __PACK struct _odm_phy_status_info_ {
 #endif
 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
 	u8		channel;						/* channel number---*/
-	bool		is_mu_packet;					/* is MU packet or not---*/
-	bool		is_beamformed;				/* BF packet---*/
+	boolean	is_mu_packet;				/* is MU packet or not---*/
+	boolean	is_beamformed;				/* BF packet---*/
 #endif
 };
 
@@ -202,18 +164,18 @@ struct _odm_phy_status_info_append_ {
 
 struct _odm_phy_status_info_ {
 	/*  */
-	/* Be care, if you want to add any element please insert between */
-	/* rx_pwdb_all & signal_strength. */
-	/*  */
+	/* Be care, if you want to add any element please both add at outer_driver & phydm */
+
+	/*	WIN in _RT_RFD_STATUS*/
 #if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN))
-	u32		rx_pwdb_all;
+	u32		rx_pwdb_all; /*in new Phy-status IC, represent the max PWDB among all path*/
 #else
 	u8		rx_pwdb_all;
 #endif
 	u8		signal_quality;				/* in 0-100 index. */
-	s8		rx_mimo_signal_quality[4];		/* per-path's EVM */
-	u8		rx_mimo_evm_dbm[4];			/* per-path's EVM dbm */
-	u8		rx_mimo_signal_strength[4];	/* in 0~100 index */
+	s8		rx_mimo_signal_quality[4];	/* per-path's EVM translate to 0~100% */
+	u8		rx_mimo_evm_dbm[4];		/* per-path's original EVM (dbm) */
+	u8		rx_mimo_signal_strength[4];	/* RSSI in 0~100 index */
 	s16		cfo_short[4];				/* per-path's cfo_short */
 	s16		cfo_tail[4];					/* per-path's cfo_tail */
 	s8		rx_power;					/* in dBm Translate from PWdB */
@@ -234,9 +196,9 @@ struct _odm_phy_status_info_ {
 	u8		bt_coex_pwr_adjust;
 #endif
 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
-	u8		channel;						/* channel number---*/
-	bool		is_mu_packet;					/* is MU packet or not---*/
-	bool		is_beamformed;				/* BF packet---*/
+	u8		channel;					/* channel number---*/
+	boolean	is_mu_packet;				/* is MU packet or not---*/
+	boolean	is_beamformed;				/* BF packet---*/
 #endif
 };
 #endif
@@ -244,10 +206,11 @@ struct _odm_phy_status_info_ {
 struct _odm_per_pkt_info_ {
 	u8		data_rate;
 	u8		station_id;
-	bool		is_packet_match_bssid;
-	bool		is_packet_to_self;
-	bool		is_packet_beacon;
-	bool		is_to_self;
+	boolean	is_packet_match_bssid;
+	boolean	is_packet_to_self;
+	boolean	is_packet_beacon;
+	boolean	is_to_self;
+	u8		ppdu_cnt;
 };
 
 
@@ -261,35 +224,43 @@ struct _odm_phy_dbg_info_ {
 	u32		num_qry_mu_pkt;
 	u32		num_qry_bf_pkt;
 	u32		num_qry_mu_vht_pkt[40];
-	u32		num_qry_vht_pkt[40];
-	bool		is_ldpc_pkt;
-	bool		is_stbc_pkt;
+	boolean	is_ldpc_pkt;
+	boolean	is_stbc_pkt;
+	u8		num_of_ppdu[4];
+	u8		gid_num[4];
 #endif
 	u8		num_qry_beacon_pkt;
 	/* Others */
 	s32		rx_evm[4];
 
-};
-
-
-/*2011/20/20 MH For MP driver RT_WLAN_STA =  struct sta_info*/
-/*Please declare below ODM relative info in your STA info structure.*/
-
-#if 1
-struct _ODM_STA_INFO {
-	/*Driver Write*/
-	bool		is_used;			/*record the sta status link or not?*/
-	u8		iot_peer;		/*Enum value.	HT_IOT_PEER_E*/
-
-	/*ODM Write*/
-	/*PHY_STATUS_INFO*/
-	u8		rssi_path[4];
-	u8		rssi_ave;
-	u8		RXEVM[4];
-	u8		RXSNR[4];
+	u16		num_qry_legacy_pkt[12];
+	u16		num_qry_ht_pkt[32];
+	u8		ht_pkt_not_zero;
+	#if	ODM_IC_11AC_SERIES_SUPPORT
+	u16		num_qry_vht_pkt[40];
+	u8		vht_pkt_not_zero;
+	#endif
+	
+	u8		rssi_cck_avg;
+	u32		rssi_cck_sum;
+	u32		rssi_cck_cnt;
+	u8		rssi_ofdm_avg;
+	u32		rssi_ofdm_sum;
+	u32		rssi_ofdm_cnt;
+	u8		rssi_1ss_avg;
+	u32		rssi_1ss_sum;
+	u32		rssi_1ss_cnt;
+	u8		rssi_2ss_avg[2];
+	u32		rssi_2ss_sum[2];
+	u32		rssi_2ss_cnt;
+	u8		rssi_3ss_avg[3];
+	u32		rssi_3ss_sum[3];
+	u32		rssi_3ss_cnt;
+	u8		rssi_4ss_avg[4];
+	u32		rssi_4ss_sum[4];
+	u32		rssi_4ss_cnt;
 
 };
-#endif
 
 enum odm_cmninfo_e {
 	/*Fixed value*/
@@ -303,6 +274,7 @@ enum odm_cmninfo_e {
 	ODM_CMNINFO_FAB_VER,
 	ODM_CMNINFO_RF_TYPE,
 	ODM_CMNINFO_RFE_TYPE,
+	ODM_CMNINFO_DPK_EN,
 	ODM_CMNINFO_BOARD_TYPE,
 	ODM_CMNINFO_PACKAGE_TYPE,
 	ODM_CMNINFO_EXT_LNA,
@@ -332,6 +304,11 @@ enum odm_cmninfo_e {
 	ODM_CMNINFO_REGRFKFREEENABLE,
 	ODM_CMNINFO_RFKFREEENABLE,
 	ODM_CMNINFO_NORMAL_RX_PATH_CHANGE,
+	ODM_CMNINFO_EFUSE0X3D8,
+	ODM_CMNINFO_EFUSE0X3D7,
+	ODM_CMNINFO_SOFT_AP_SPECIAL_SETTING,
+	ODM_CMNINFO_HP_HWID,
+        ODM_CMNINFO_ADVANCE_OTA,
 	/*-----------HOOK BEFORE REG INIT-----------*/
 
 	/*Dynamic value:*/
@@ -367,6 +344,9 @@ enum odm_cmninfo_e {
 	ODM_CMNINFO_RFDEFAULTPATH,
 	ODM_CMNINFO_DFS_MASTER_ENABLE,
 	ODM_CMNINFO_FORCE_TX_ANT_BY_TXDESC,
+	ODM_CMNINFO_SET_S0S1_DEFAULT_ANTENNA,
+	ODM_CMNINFO_SOFT_AP_MODE,
+	ODM_CMNINFO_MP_MODE,
 	/*--------- POINTER REFERENCE-----------*/
 
 	/*------------CALL BY VALUE-------------*/
@@ -374,8 +354,11 @@ enum odm_cmninfo_e {
 	ODM_CMNINFO_WIFI_DISPLAY,
 	ODM_CMNINFO_LINK_IN_PROGRESS,
 	ODM_CMNINFO_LINK,
+	ODM_CMNINFO_CMW500LINK,
+	ODM_CMNINFO_LPSPG,
 	ODM_CMNINFO_STATION_STATE,
 	ODM_CMNINFO_RSSI_MIN,
+	ODM_CMNINFO_RSSI_MIN_BY_PATH,
 	ODM_CMNINFO_DBG_COMP,
 	ODM_CMNINFO_DBG_LEVEL,
 	ODM_CMNINFO_RA_THRESHOLD_HIGH,
@@ -391,11 +374,6 @@ enum odm_cmninfo_e {
 	ODM_CMNINFO_BT_DIG,
 	ODM_CMNINFO_BT_BUSY,
 	ODM_CMNINFO_BT_DISABLE_EDCA,
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)		/*for repeater mode add by YuChen 2014.06.23*/
-#ifdef UNIVERSAL_REPEATER
-	ODM_CMNINFO_VXD_LINK,
-#endif
-#endif
 	ODM_CMNINFO_AP_TOTAL_NUM,
 	ODM_CMNINFO_POWER_TRAINING,
 	ODM_CMNINFO_DFS_REGION_DOMAIN,
@@ -426,6 +404,8 @@ enum phydm_info_query_e {
 	PHYDM_INFO_EDCCA_FLAG,
 	PHYDM_INFO_OFDM_ENABLE,
 	PHYDM_INFO_CCK_ENABLE,
+	PHYDM_INFO_CRC32_OK_HT_AGG,
+	PHYDM_INFO_CRC32_ERROR_HT_AGG,
 	PHYDM_INFO_DBG_PORT_0
 };
 
@@ -436,11 +416,8 @@ enum phydm_api_e {
 
 };
 
-
-/*2011/10/20 MH Define ODM support ability.  ODM_CMNINFO_ABILITY*/
 enum odm_ability_e {
 
-	/*BB ODM section BIT 0-19*/
 	ODM_BB_DIG					= BIT(0),
 	ODM_BB_RA_MASK				= BIT(1),
 	ODM_BB_DYNAMIC_TXPWR		= BIT(2),
@@ -448,27 +425,23 @@ enum odm_ability_e {
 	ODM_BB_RSSI_MONITOR			= BIT(4),
 	ODM_BB_CCK_PD					= BIT(5),
 	ODM_BB_ANT_DIV				= BIT(6),
+	/*BIT(7),*/
 	ODM_BB_PWR_TRAIN				= BIT(8),
 	ODM_BB_RATE_ADAPTIVE			= BIT(9),
 	ODM_BB_PATH_DIV				= BIT(10),
+	/*BIT(11),*/
+	/*BIT(12),*/
 	ODM_BB_ADAPTIVITY				= BIT(13),
 	ODM_BB_CFO_TRACKING			= BIT(14),
 	ODM_BB_NHM_CNT				= BIT(15),
 	ODM_BB_PRIMARY_CCA			= BIT(16),
 	ODM_BB_TXBF					= BIT(17),
 	ODM_BB_DYNAMIC_ARFR			= BIT(18),
-
+	ODM_BB_DYNAMIC_PSDTOOL		= BIT(19),
 	ODM_MAC_EDCA_TURBO			= BIT(20),
 	ODM_BB_DYNAMIC_RX_PATH		= BIT(21),
-
-	/*RF ODM section BIT 24-31*/
-	ODM_RF_TX_PWR_TRACK			= BIT(24),
-	ODM_RF_RX_GAIN_TRACK			= BIT(25),
-	ODM_RF_CALIBRATION			= BIT(26),
-
 };
 
-
 /*ODM_CMNINFO_ONE_PATH_CCA*/
 enum odm_cca_path_e {
 	ODM_CCA_2R		= 0,
@@ -477,19 +450,22 @@ enum odm_cca_path_e {
 };
 
 enum cca_pathdiv_en_e {
-	CCA_PATHDIV_DISABLE		= 0,
-	CCA_PATHDIV_ENABLE		= 1,
+	CCA_PATHDIV_DISABLE	= 0,
+	CCA_PATHDIV_ENABLE	= 1,
 
 };
 
+enum phydm_offload_ability {
+	PHYDM_PHY_PARAM_OFFLOAD = BIT(0),
+	PHYDM_RF_IQK_OFFLOAD = BIT(1),
+};
+
 
 enum phy_reg_pg_type {
-	PHY_REG_PG_RELATIVE_VALUE = 0,
-	PHY_REG_PG_EXACT_VALUE = 1
+	PHY_REG_PG_RELATIVE_VALUE	= 0,
+	PHY_REG_PG_EXACT_VALUE		= 1
 };
 
-/*2011/09/22 MH Copy from SD4 defined structure. We use to support PHY DM integration.*/
-
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	#if (RT_PLATFORM != PLATFORM_LINUX)
 		typedef
@@ -504,179 +480,149 @@ enum phy_reg_pg_type {
 	struct _ADAPTER		*adapter;		/*For CE/NIC team*/
 	struct rtl8192cd_priv	*priv;			/*For AP/ADSL team*/
 	/*WHen you use adapter or priv pointer, you must make sure the pointer is ready.*/
-	bool			odm_ready;
-
-#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_WIN))
-	struct rtl8192cd_priv		fake_priv;
-#endif
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	/* ADSL_AP_BUILD_WORKAROUND */
-	struct _ADAPTER			fake_adapter;
-#endif
-
-	enum phy_reg_pg_type		phy_reg_pg_value_type;
-	u8				phy_reg_pg_version;
-
+	boolean		odm_ready;
+	enum phy_reg_pg_type	phy_reg_pg_value_type;
+	u8			phy_reg_pg_version;
 	u32			debug_components;
 	u32			fw_debug_components;
 	u32			debug_level;
-
 	u32			num_qry_phy_status_all;		/*CCK + OFDM*/
 	u32			last_num_qry_phy_status_all;
 	u32			rx_pwdb_ave;
-	bool			MPDIG_2G;				/*off MPDIG*/
 	u8			times_2g;
-	bool			is_init_hw_info_by_rfe;
+	boolean		is_init_hw_info_by_rfe;
 
 	/*------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------*/
-	bool			is_cck_high_power;
+	boolean		is_cck_high_power;
 	u8			rf_path_rx_enable;
-	u8			control_channel;
 	/*------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------*/
 
-
-	/* 1  COMMON INFORMATION */
+	/* COMMON INFORMATION */
 
 	/*Init value*/
 	/*-----------HOOK BEFORE REG INIT-----------*/
-	/*ODM Platform info AP/ADSL/CE/MP = 1/2/3/4*/
-	u8			support_platform;
-	/* ODM Platform info WIN/AP/CE = 1/2/3 */
+
+	u8			support_platform;/*PHYDM Platform info WIN/AP/CE = 1/2/3 */
 	u8			normal_rx_path;
-	/*ODM Support Ability DIG/RATR/TX_PWR_TRACK/ ¡K¡K = 1/2/3/¡K*/
-	u32			support_ability;
-	/*ODM PCIE/USB/SDIO = 1/2/3*/
-	u8			support_interface;
-	/*ODM composite or independent. Bit oriented/ 92C+92D+ .... or any other type = 1/2/3/...*/
-	u32			support_ic_type;
-	/*cut version TestChip/A-cut/B-cut... = 0/1/2/3/...*/
-	u8			cut_version;
-	/*Fab version TSMC/UMC = 0/1*/
-	u8			fab_version;
-	/*RF type 4T4R/3T3R/2T2R/1T2R/1T1R/...*/
-	u8			rf_type;
+	u32			support_ability;	/*PHYDM function Supportability*/
+	u8			support_interface;/*PHYDM PCIE/USB/SDIO = 1/2/3*/
+	u32			support_ic_type;	/*PHYDM supported IC*/
+	u8			cut_version;		/*cut version TestChip/A-cut/B-cut... = 0/1/2/3/...*/
+	u8			fab_version;		/*Fab version TSMC/UMC = 0/1*/
+	u8			rf_type;			/*RF type 4T4R/3T3R/2T2R/1T2R/1T1R/...*/
 	u8			rfe_type;
-	/*Board type Normal/HighPower/MiniCard/SLIM/Combo/... = 0/1/2/3/4/...*/
 	u8			board_type;
 	u8			package_type;
 	u16			type_glna;
 	u16			type_gpa;
 	u16			type_alna;
 	u16			type_apa;
-	/*with external LNA  NO/Yes = 0/1*/
-	u8			ext_lna;		/*2G*/
-	u8			ext_lna_5g;	/*5G*/
-	/*with external PA  NO/Yes = 0/1*/
-	u8			ext_pa;		/*2G*/
-	u8			ext_pa_5g;	/*5G*/
-	/*with external TRSW  NO/Yes = 0/1*/
-	u8			ext_trsw;
-	u8			ext_lna_gain;	/*2G*/
-	u8			patch_id;	/*Customer ID*/
-	bool			is_in_hct_test;
+	u8			ext_lna;			/*with 2G external LNA  NO/Yes = 0/1*/
+	u8			ext_lna_5g;		/*with 5G external LNA  NO/Yes = 0/1*/
+	u8			ext_pa;			/*with 2G external PNA  NO/Yes = 0/1*/
+	u8			ext_pa_5g;		/*with 5G external PNA  NO/Yes = 0/1*/
+	u8 			efuse0x3d7;		/*with Efuse number*/
+	u8 			efuse0x3d8;
+	u8			ext_trsw;		/*with external TRSW  NO/Yes = 0/1*/
+	u8			ext_lna_gain;	/*gain of external lna*/
+	u8			patch_id;		/*Customer ID*/
+	boolean		is_in_hct_test;
 	u8			wifi_test;
-
-	bool			is_dual_mac_smart_concurrent;
-	u32			bk_support_ability;
-	u8			ant_div_type;
+	boolean		is_dual_mac_smart_concurrent;
+    	u32			bk_support_ability; /*SD4 only*/
 	u8			with_extenal_ant_switch;
-	bool			config_bbrf;
+	boolean		config_bbrf;
 	u8			odm_regulation_2_4g;
 	u8			odm_regulation_5g;
 	u8			iqk_fw_offload;
-	bool			cck_new_agc;
+	boolean		cck_new_agc;
 	u8			phydm_period;
 	u32			phydm_sys_up_time;
 	u8			num_rf_path;
-	/*-----------HOOK BEFORE REG INIT-----------*/
-
-	/*Dynamic value*/
-
-	/*--------- POINTER REFERENCE-----------*/
-
+	u32			soft_ap_special_setting;
+	u8			rfe_hwsetting_band;
+	u8			p_advance_ota;
 	u8			u1_byte_temp;
-	bool			BOOLEAN_temp;
-	struct _ADAPTER		*PADAPTER_temp;
-
-	/*MAC PHY mode SMSP/DMSP/DMDP = 0/1/2*/
-	u8			*p_mac_phy_mode;
-	/*TX Unicast byte count*/
-	u64			*p_num_tx_bytes_unicast;
-	/*RX Unicast byte count*/
-	u64			*p_num_rx_bytes_unicast;
-	/*Wireless mode B/G/A/N = BIT0/BIT1/BIT2/BIT3*/
-	u8			*p_wireless_mode;
-	/*Frequence band 2.4G/5G = 0/1*/
-	u8			*p_band_type;
-	/*Secondary channel offset don't_care/below/above = 0/1/2*/
-	u8			*p_sec_ch_offset;
-	/*security mode Open/WEP/AES/TKIP = 0/1/2/3*/
-	u8			*p_security;
-	/*BW info 20M/40M/80M = 0/1/2*/
-	u8			*p_band_width;
-	/*Central channel location Ch1/Ch2/....*/
-	u8			*p_channel;			/*central channel number*/
-	bool			dpk_done;
-	/*Common info for 92D DMSP*/
-
-	bool			*p_is_get_value_from_other_mac;
+	boolean		is_hp_hw_id;
+	boolean		BOOLEAN_temp;
+	u8			is_nbi_enable;
+	u16			fw_offload_ability;
+/*-----------HOOK BEFORE REG INIT-----------*/
+/*===========================================================*/	
+/*====[ CALL BY Reference ]=========================================*/
+/*===========================================================*/	
+	
+	struct _ADAPTER	*PADAPTER_temp;
+
+	u8			*p_mac_phy_mode;			/*MAC PHY mode SMSP/DMSP/DMDP = 0/1/2*/
+	u64			*p_num_tx_bytes_unicast;	/*TX Unicast byte count*/
+	u64			*p_num_rx_bytes_unicast;	/*RX Unicast byte count*/
+	u8			*p_wireless_mode;			/*Wireless mode B/G/A/N = BIT0/BIT1/BIT2/BIT3*/
+	u8			*p_band_type;				/*Frequence band 2.4G/5G = 0/1*/
+	u8			*p_sec_ch_offset;			/*Secondary channel offset don't_care/below/above = 0/1/2*/
+	u8			*p_security;					/*security mode Open/WEP/AES/TKIP = 0/1/2/3*/
+	u8			*p_band_width;				/*BW info 20M/40M/80M = 0/1/2*/
+	u8			*p_channel;					/*central channel number*/
+	boolean		*p_is_get_value_from_other_mac;	/*Common info for 92D DMSP*/
 	struct _ADAPTER **p_buddy_adapter;
-	bool			*p_is_master_of_dmsp; /* MAC0: master, MAC1: slave */
-	/*Common info for status*/
-	bool			*p_is_scan_in_process;
-	bool			*p_is_power_saving;
-	/*CCA path 2-path/path-A/path-B = 0/1/2; using enum odm_cca_path_e.*/
-	u8			*p_one_path_cca;
+	boolean		*p_is_master_of_dmsp;		/* MAC0: master, MAC1: slave */
+	boolean		*p_is_scan_in_process;		/*Common info for status*/
+	boolean		*p_is_power_saving;
+	u8			*p_one_path_cca;			/*CCA path 2-path/path-A/path-B = 0/1/2; using enum odm_cca_path_e.*/
 	u8			*p_antenna_test;
-	bool			*p_is_net_closed;
+	boolean		*p_is_net_closed;
 	u8			*pu1_forced_igi_lb;
-	bool			*p_is_fcs_mode_enable;
-	/*--------- For 8723B IQK-----------*/
-	bool			*p_is_1_antenna;
-	u8			*p_rf_default_path;
-	/* 0:S1, 1:S0 */
+	boolean		*p_is_fcs_mode_enable;
+	/*--------- For 8723B IQK-------------------------------------*/
+	boolean		*p_is_1_antenna;
+	u8			*p_rf_default_path;	/* 0:S1, 1:S0 */
+	/*-----------------------------------------------------------*/
 
-	/*--------- POINTER REFERENCE-----------*/
 	u16			*p_forced_data_rate;
 	u8			*p_enable_antdiv;
 	u8			*p_enable_adaptivity;
-	u8			*hub_usb_mode;
-	bool			*p_is_fw_dw_rsvd_page_in_progress;
+	u8			*hub_usb_mode;		/*1: USB 2.0, 2: USB 3.0*/
+	boolean		*p_is_fw_dw_rsvd_page_in_progress;
 	u32			*p_current_tx_tp;
 	u32			*p_current_rx_tp;
 	u8			*p_sounding_seq;
-	/*------------CALL BY VALUE-------------*/
-	bool			is_link_in_process;
-	bool			is_wifi_direct;
-	bool			is_wifi_display;
-	bool			is_linked;
-	bool			bsta_state;
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)		/*for repeater mode add by YuChen 2014.06.23*/
-#ifdef UNIVERSAL_REPEATER
-	bool			vxd_linked;
-#endif
-#endif
+	u32			*p_soft_ap_mode;
+	u8			*p_mp_mode;
+
+/*===========================================================*/	
+/*====[ CALL BY VALUE ]===========================================*/
+/*===========================================================*/	
+	
+	boolean		is_link_in_process;
+	boolean		is_wifi_direct;
+	boolean		is_wifi_display;
+	boolean		is_linked;
+	boolean		bLinkedcmw500;
+	boolean		is_in_lps_pg;
+	boolean		bsta_state;
 	u8			rssi_min;
-	u8			interface_index;		/*Add for 92D  dual MAC: 0--Mac0 1--Mac1*/
-	bool			is_mp_chip;
-	bool			is_one_entry_only;
-	bool			mp_mode;
+	u8			rssi_min_by_path;
+	boolean		is_mp_chip;
+	boolean		is_one_entry_only;
 	u32			one_entry_macid;
+	u32			one_entry_tp;
+	u32			pre_one_entry_tp;
 	u8			pre_number_linked_client;
 	u8			number_linked_client;
 	u8			pre_number_active_client;
 	u8			number_active_client;
-	/*Common info for BTDM*/
-	bool			is_bt_enabled;			/*BT is enabled*/
-	bool			is_bt_connect_process;	/*BT HS is under connection progress.*/
+	
+	/*---Common info for BTDM-------------------------------------*/
+	boolean		is_bt_enabled;			/*BT is enabled*/
+	boolean		is_bt_connect_process;	/*BT HS is under connection progress.*/
 	u8			bt_hs_rssi;			/*BT HS mode wifi rssi value.*/
-	bool			is_bt_hs_operation;		/*BT HS mode is under progress*/
+	boolean		is_bt_hs_operation;		/*BT HS mode is under progress*/
 	u8			bt_hs_dig_val;			/*use BT rssi to decide the DIG value*/
-	bool			is_bt_disable_edca_turbo;	/*Under some condition, don't enable the EDCA Turbo*/
-	bool			is_bt_busy;			/*BT is busy.*/
-	bool			is_bt_limited_dig;		/*BT is busy.*/
-	bool			is_disable_phy_api;
-	/*------------CALL BY VALUE-------------*/
+	boolean		is_bt_disable_edca_turbo;	/*Under some condition, don't enable the EDCA Turbo*/
+	boolean		is_bt_busy;			/*BT is busy.*/
+	boolean		is_bt_limited_dig;		/*BT is busy.*/
+	boolean		is_disable_phy_api;
+	/*-----------------------------------------------------------*/
 	u8			RSSI_A;
 	u8			RSSI_B;
 	u8			RSSI_C;
@@ -691,16 +637,18 @@ enum phy_reg_pg_type {
 	u8			cck_vga_idx;
 	u8			curr_station_id;
 	u8			ofdm_agc_idx[4];
-
 	u8			rx_rate;
-	bool			is_noisy_state;
+	u8			rate_ss;
 	u8			tx_rate;
 	u8			linked_interval;
 	u8			pre_channel;
 	u32			txagc_offset_value_a;
-	bool			is_txagc_offset_positive_a;
+	boolean		is_txagc_offset_positive_a;
 	u32			txagc_offset_value_b;
-	bool			is_txagc_offset_positive_b;
+	boolean		is_txagc_offset_positive_b;
+	/*[traffic]*/
+	u8			traffic_load;
+	u8			pre_traffic_load;
 	u32			tx_tp;
 	u32			rx_tp;
 	u32			total_tp;
@@ -708,12 +656,24 @@ enum phy_reg_pg_type {
 	u64			cur_rx_ok_cnt;
 	u64			last_tx_ok_cnt;
 	u64			last_rx_ok_cnt;
+	u16			consecutive_idlel_time;	/*unit: second*/
+	/*---------------------------*/
 	u32			bb_swing_offset_a;
-	bool			is_bb_swing_offset_positive_a;
+	boolean		is_bb_swing_offset_positive_a;
 	u32			bb_swing_offset_b;
-	bool			is_bb_swing_offset_positive_b;
+	boolean		is_bb_swing_offset_positive_b;
+
+	/*[DIG]*/
+	boolean		MPDIG_2G;				/*off MPDIG*/
 	u8			igi_lower_bound;
 	u8			igi_upper_bound;
+	u8			dm_dig_max_TH;
+	u8			dm_dig_min_TH;
+	boolean		is_dm_initial_gain_enable;
+	/*---------------------------*/
+
+	/*[AntDiv]*/
+	u8			ant_div_type;
 	u8			antdiv_rssi;
 	u8			fat_comb_a;
 	u8			fat_comb_b;
@@ -723,20 +683,30 @@ enum phy_reg_pg_type {
 	u8			antdiv_period;
 	u8			evm_antdiv_period;
 	u8			antdiv_select;
+	u8			antdiv_train_num;/*training time for each antenna in EVM method*/
+	u8			stop_antdiv_rssi_th;
+	u16			stop_antdiv_tp_diff_th;
+	u16			stop_antdiv_tp_th;
+	u8			antdiv_tp_period;
+	u16			tp_active_th;
+	u8			tp_active_occur;
 	u8			path_select;
 	u8			antdiv_evm_en;
 	u8			bdc_holdstate;
+	/*---------------------------*/
+	
 	u8			ndpa_period;
-	bool			h2c_rarpt_connect;
-	bool			cck_agc_report_type;
-
-	u8			dm_dig_max_TH;
-	u8			dm_dig_min_TH;
+	boolean		h2c_rarpt_connect;
+	boolean		cck_agc_report_type;
 	u8			print_agc;
-	u8			traffic_load;
-	u8			pre_traffic_load;
-
-	/*For Adaptivtiy*/
+	u8			la_mode;
+	/*---8821C Antenna and RF Set BTG/WLG/WLA Select---------------*/
+	u8			current_rf_set_8821c;
+	u8			default_rf_set_8821c;
+	u8			current_ant_num_8821c;
+	u8			default_ant_num_8821c;
+	/*-----------------------------------------------------------*/
+	/*---For Adaptivtiy---------------------------------------------*/
 	u16			nhm_cnt_0;
 	u16			nhm_cnt_1;
 	s8			TH_L2H_default;
@@ -745,40 +715,39 @@ enum phy_reg_pg_type {
 	s8			th_edcca_hl_diff;
 	s8			th_l2h_ini_mode2;
 	s8			th_edcca_hl_diff_mode2;
-	bool			carrier_sense_enable;
+	boolean		carrier_sense_enable;
 	u8			adaptivity_igi_upper;
-	bool			adaptivity_flag;
+	boolean		adaptivity_flag;
 	u8			dc_backoff;
-	bool			adaptivity_enable;
+	boolean		adaptivity_enable;
 	u8			ap_total_num;
-	bool			edcca_enable;
-	struct _ADAPTIVITY_STATISTICS	adaptivity;
-	/*For Adaptivtiy*/
-	u8			last_usb_hub;
-	u8			tx_bf_data_rate;
-
+	boolean		edcca_enable;
+	/*-----------------------------------------------------------*/
+	
+	u8			pre_dbg_priority;
 	u8			nbi_set_result;
+	u8			csi_set_result;
+	u8			csi_set_result_2;
 
 	u8			c2h_cmd_start;
 	u8			fw_debug_trace[60];
 	u8			pre_c2h_seq;
-	bool			fw_buff_is_enpty;
+	boolean		fw_buff_is_enpty;
 	u32			data_frame_num;
 
-	/*for noise detection*/
-	bool			noisy_decision; /*b_noisy*/
-	bool			pre_b_noisy;
+	/*--- for noise detection ---------------------------------------*/
+	boolean		is_noisy_state;
+	boolean		noisy_decision; /*b_noisy*/
+	boolean		pre_b_noisy;
 	u32			noisy_decision_smooth;
+	/*-----------------------------------------------------------*/
+	
+	boolean		is_disable_dym_ecs;
+	boolean		is_disable_dym_ant_weighting;
+	struct sta_info	*p_odm_sta_info[ODM_ASSOCIATE_ENTRY_NUM];/*_ODM_STA_INFO, 2012/01/12 MH For MP, we need to reduce one array pointer for default port.??*/
+	struct cmn_sta_info	*p_phydm_sta_info[ODM_ASSOCIATE_ENTRY_NUM];
+	u16			platform2phydm_macid_table[ODM_ASSOCIATE_ENTRY_NUM];/* platform_macid_table[platform_macid] = phydm_macid */
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_WIN))
-	struct _ODM_NOISE_MONITOR_ noise_level;
-#endif
-	/*Define STA info.*/
-	/*_ODM_STA_INFO*/
-	/*2012/01/12 MH For MP, we need to reduce one array pointer for default port.??*/
-	struct sta_info		*p_odm_sta_info[ODM_ASSOCIATE_ENTRY_NUM];
-	u16			platform2phydm_macid_table[ODM_ASSOCIATE_ENTRY_NUM];
-	/* platform_macid_table[platform_macid] = phydm_macid */
 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
 	s32			accumulate_pwdb[ODM_ASSOCIATE_ENTRY_NUM];
 #endif
@@ -788,154 +757,173 @@ enum phy_reg_pg_type {
 	struct _odm_ra_info_   ra_info[ODM_ASSOCIATE_ENTRY_NUM];
 	/*Use mac_id as array index. STA mac_id=0, VWiFi Client mac_id={1, ODM_ASSOCIATE_ENTRY_NUM-1} //YJ,add,120119*/
 #endif
+	boolean		ra_support88e;	/*2012/02/14 MH Add to share 88E ra with other SW team.We need to colelct all support abilit to a proper area.*/
+	boolean		*p_is_driver_stopped;
+	boolean		*p_is_driver_is_going_to_pnp_set_power_sleep;
+	boolean		*pinit_adpt_in_progress;
+	boolean		is_user_assign_level;
+	u8			RSSI_BT;			/*come from BT*/
+
+	/*---PSD Relative ---------------------------------------------*/
+	boolean		is_psd_in_process;
+	boolean		is_psd_active;
+	/*-----------------------------------------------------------*/
+	
+	u8			is_use_ra_mask;	/*for rate adaptive, in fact,  88c/92c fw will handle this*/
+	boolean		bsomlenabled;		/* for dynamic SoML control */
+	boolean		bhtstfenabled;		/* for dynamic HTSTF gain control	*/
+	u32			n_iqk_cnt;
+	u32			n_iqk_ok_cnt;
+	u32			n_iqk_fail_cnt;
+
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+	u8			force_power_training_state;	/*Power Training*/
+	boolean		is_change_state;
+	u32			PT_score;
+	u64			ofdm_rx_cnt;
+	u64			cck_rx_cnt;
+#endif
+	boolean		is_disable_power_training;
+	u8			dynamic_tx_high_power_lvl;
+	u8			last_dtp_lvl;
+	u32			tx_agc_ofdm_18_6;
+	u8			rx_pkt_type;
+
+#ifdef CONFIG_PHYDM_DFS_MASTER
+	u8			dfs_region_domain;
+	u8			*dfs_master_enabled;
+	/*---phydm_radar_detect_with_dbg_parm start --------------------*/
+	u8			radar_detect_dbg_parm_en;
+	u32			radar_detect_reg_918;
+	u32			radar_detect_reg_91c;
+	u32			radar_detect_reg_920;
+	u32			radar_detect_reg_924;
+	/*-----------------------------------------------------------*/
+#endif
+
+/*=== PHYDM Timer ========================================== (start)*/
+
+	struct timer_list	mpt_dig_timer;	/*MPT DIG timer*/
+	struct timer_list	path_div_switch_timer;
+	struct timer_list	cck_path_diversity_timer;	/*2011.09.27 add for path Diversity*/
+	struct timer_list	fast_ant_training_timer;
+#ifdef ODM_EVM_ENHANCE_ANTDIV
+	struct timer_list	evm_fast_ant_training_timer;
+#endif
+	struct timer_list	sbdcnt_timer;
+
 
-	/*2012/02/14 MH Add to share 88E ra with other SW team.*/
-	/*We need to colelct all support abilit to a proper area.*/
+/*=== PHYDM Workitem ======================================= (start)*/
+
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+#if USE_WORKITEM
+	RT_WORK_ITEM	path_div_switch_workitem;
+	RT_WORK_ITEM	cck_path_diversity_workitem;
+	RT_WORK_ITEM	fast_ant_training_workitem;
+	RT_WORK_ITEM	mpt_dig_workitem;
+	RT_WORK_ITEM	ra_rpt_workitem;
+	RT_WORK_ITEM	sbdcnt_workitem;
+#endif
+#endif
 
-	bool				ra_support88e;
 
-	struct _odm_phy_dbg_info_	 phy_dbg_info;
+/*=== PHYDM Structure ======================================== (start)*/
+	struct _ADAPTIVITY_STATISTICS		adaptivity;
+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_WIN))
+	struct _ODM_NOISE_MONITOR_			noise_level;
+#endif
 
-	/*ODM Structure*/
+	struct _odm_phy_dbg_info_				phy_dbg_info;
 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	struct _BF_DIV_COEX_					dm_bdc_table;
 #endif
 
-#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
-	struct _SMART_ANTENNA_TRAINNING_						dm_sat_table;
+#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1)) || (defined(CONFIG_HL_SMART_ANTENNA_TYPE2))
+	struct _SMART_ANTENNA_TRAINNING_	dm_sat_table;
 #endif
 
 #endif
-	struct _FAST_ANTENNA_TRAINNING_						dm_fat_table;
-	struct _dynamic_initial_gain_threshold_						dm_dig_table;
+	struct _FAST_ANTENNA_TRAINNING_		dm_fat_table;
+	struct _dynamic_initial_gain_threshold_	dm_dig_table;
+	
 #if (defined(CONFIG_BB_POWER_SAVING))
-	struct _dynamic_power_saving						dm_ps_table;
+	struct _dynamic_power_saving			dm_ps_table;
 #endif
-	struct _dynamic_primary_cca					dm_pri_cca;
-	struct _rate_adaptive_table_						dm_ra_table;
+
+	struct _dynamic_primary_cca			dm_pri_cca;
+	struct _rate_adaptive_table_			dm_ra_table;
 	struct _FALSE_ALARM_STATISTICS		false_alm_cnt;
 	struct _FALSE_ALARM_STATISTICS		flase_alm_cnt_buddy_adapter;
-	struct _sw_antenna_switch_						dm_swat_table;
+	struct _sw_antenna_switch_				dm_swat_table;
 	struct _CFO_TRACKING_				dm_cfo_track;
 	struct _ACS_							dm_acs;
-	struct _CCX_INFO				dm_ccx_info;
+	struct _CCX_INFO						dm_ccx_info;
+	struct _hal_rf_						rf_table; 		/*for HALRF function*/
+	struct _ODM_RATE_ADAPTIVE			rate_adaptive;
+	struct odm_rf_calibration_structure		rf_calibrate_info;
+	struct odm_power_trim_data			power_trim_data;	
+#if (RTL8822B_SUPPORT == 1)
+	struct phydm_rtl8822b_struct			phydm_rtl8822b;
+#endif	
+#if (CONFIG_PSD_TOOL == 1)
+	struct _PHYDM_PSD_					dm_psd_table;
+#endif
+
 #if (PHYDM_LA_MODE_SUPPORT == 1)
 	struct _RT_ADCSMP					adcsmp;
 #endif
+
 #if (CONFIG_DYNAMIC_RX_PATH == 1)
-	struct _DYNAMIC_RX_PATH_						dm_drp_table;
+	struct _DYNAMIC_RX_PATH_			dm_drp_table;
 #endif
 
 #if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-	struct _IQK_INFORMATION	IQK_info;
+	struct _IQK_INFORMATION				IQK_info;
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	/*path Div Struct*/
-	struct _path_div_parameter_define_	path_iqk;
+	struct _path_div_parameter_define_		path_iqk;
 #endif
+
 #if (defined(CONFIG_PATH_DIVERSITY))
-	struct _ODM_PATH_DIVERSITY_	dm_path_div;
+	struct _ODM_PATH_DIVERSITY_			dm_path_div;
 #endif
 
-	struct _EDCA_TURBO_		dm_edca_table;
-	u32		WMMEDCA_BE;
-
-	bool			*p_is_driver_stopped;
-	bool			*p_is_driver_is_going_to_pnp_set_power_sleep;
-	bool			*pinit_adpt_in_progress;
-
-	/*PSD*/
-	bool			is_user_assign_level;
-	u8			RSSI_BT;				/*come from BT*/
-	bool			is_psd_in_process;
-	bool			is_psd_active;
-	bool			is_dm_initial_gain_enable;
-
-	/*MPT DIG*/
-	struct timer_list		mpt_dig_timer;
-
-	/*for rate adaptive, in fact,  88c/92c fw will handle this*/
-	u8			is_use_ra_mask;
-
-	struct _ODM_RATE_ADAPTIVE	rate_adaptive;
 #if (defined(CONFIG_ANT_DETECTION))
-	struct _ANT_DETECTED_INFO	ant_detected_info;	/* Antenna detected information for RSSI tool*/
-#endif
-	struct odm_rf_calibration_structure	rf_calibrate_info;
-	u32			n_iqk_cnt;
-	u32			n_iqk_ok_cnt;
-	u32			n_iqk_fail_cnt;
-
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	/*Power Training*/
-	u8			force_power_training_state;
-	bool			is_change_state;
-	u32			PT_score;
-	u64			ofdm_rx_cnt;
-	u64			cck_rx_cnt;
-#endif
-	bool			is_disable_power_training;
-	u8			dynamic_tx_high_power_lvl;
-	u8			last_dtp_lvl;
-	u32			tx_agc_ofdm_18_6;
-	u8			rx_pkt_type;
-
-	/*ODM relative time.*/
-	struct timer_list	path_div_switch_timer;
-	/*2011.09.27 add for path Diversity*/
-	struct timer_list	cck_path_diversity_timer;
-	struct timer_list	fast_ant_training_timer;
-#ifdef ODM_EVM_ENHANCE_ANTDIV
-	struct timer_list			evm_fast_ant_training_timer;
-#endif
-	struct timer_list		sbdcnt_timer;
-
-	/*ODM relative workitem.*/
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-#if USE_WORKITEM
-	RT_WORK_ITEM			path_div_switch_workitem;
-	RT_WORK_ITEM			cck_path_diversity_workitem;
-	RT_WORK_ITEM			fast_ant_training_workitem;
-	RT_WORK_ITEM			mpt_dig_workitem;
-	RT_WORK_ITEM			ra_rpt_workitem;
-	RT_WORK_ITEM			sbdcnt_workitem;
-#endif
+	struct _ANT_DETECTED_INFO			ant_detected_info;	/* Antenna detected information for RSSI tool*/
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 #if (BEAMFORMING_SUPPORT == 1)
-	struct _RT_BEAMFORMING_INFO beamforming_info;
+	struct _RT_BEAMFORMING_INFO 		beamforming_info;
 #endif
 #endif
 
-#ifdef CONFIG_PHYDM_DFS_MASTER
-	u8 dfs_region_domain;
-	u8 *dfs_master_enabled;
-
-	/*====== phydm_radar_detect_with_dbg_parm start ======*/
-	u8 radar_detect_dbg_parm_en;
-	u32 radar_detect_reg_918;
-	u32 radar_detect_reg_91c;
-	u32 radar_detect_reg_920;
-	u32 radar_detect_reg_924;
-	/*====== phydm_radar_detect_with_dbg_parm end ======*/
-#endif
+/*==========================================================*/
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 
 #if (RT_PLATFORM != PLATFORM_LINUX)
-};		/*DM_Dynamic_Mechanism_Structure*/
+}PHY_DM_STRUCT;		/*DM_Dynamic_Mechanism_Structure*/
 #else
 };
 #endif
 
-#else	/*for AP,ADSL,CE Team*/
+#else	/*for AP,CE Team*/
 };
 #endif
 
 
+enum phydm_adv_ota {
+	PHYDM_PATHB_1RCCA = BIT(0),
+	PHYDM_HP_OTA_SETTING_A = BIT(1),
+	PHYDM_HP_OTA_SETTING_B = BIT(2),
+	PHYDM_ASUS_OTA_SETTING = BIT(3),
+	PHYDM_ASUS_OTA_SETTING_CCK_PATH = BIT(4),
+
+};
+
 enum phydm_structure_type {
 	PHYDM_FALSEALMCNT,
 	PHYDM_CFOTRACK,
@@ -944,8 +932,6 @@ enum phydm_structure_type {
 
 };
 
-
-
 enum odm_rf_content {
 	odm_radioa_txt = 0x1000,
 	odm_radiob_txt = 0x1001,
@@ -1001,61 +987,49 @@ enum rt_status {
 /*===========================================================*/
 /*AGC RX High Power mode*/
 /*===========================================================*/
-#define          lna_low_gain_1                      0x64
-#define          lna_low_gain_2                      0x5A
-#define          lna_low_gain_3                      0x58
+#define	lna_low_gain_1		0x64
+#define	lna_low_gain_2		0x5A
+#define	lna_low_gain_3		0x58
 
-#define          FA_RXHP_TH1                           5000
-#define          FA_RXHP_TH2                           1500
-#define          FA_RXHP_TH3                             800
-#define          FA_RXHP_TH4                             600
-#define          FA_RXHP_TH5                             500
+#define	FA_RXHP_TH1		5000
+#define	FA_RXHP_TH2		1500
+#define	FA_RXHP_TH3		800
+#define	FA_RXHP_TH4		600
+#define	FA_RXHP_TH5		500
 
 enum dm_1r_cca_e {
-	CCA_1R = 0,
-	CCA_2R = 1,
-	CCA_MAX = 2,
+	CCA_1R		= 0,
+	CCA_2R		= 1,
+	CCA_MAX	= 2,
 };
 
 enum dm_rf_e {
-	rf_save = 0,
-	rf_normal = 1,
-	RF_MAX = 2,
+	rf_save		= 0,
+	rf_normal	= 1,
+	RF_MAX		= 2,
 };
 
 /*check Sta pointer valid or not*/
-
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	#define IS_STA_VALID(p_sta)		(p_sta && p_sta->expire_to)
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	#define IS_STA_VALID(p_sta)		(p_sta && p_sta->is_used)
+	#define IS_STA_VALID(p_sta)		(p_sta && p_sta->bUsed)
 #else
 	#define IS_STA_VALID(p_sta)		(p_sta)
 #endif
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_AP))
 
-bool
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_AP))
+boolean
 odm_check_power_status(
 	struct _ADAPTER		*adapter
 );
-
 #endif
 
 u32 odm_convert_to_db(u32 value);
 
 u32 odm_convert_to_linear(u32 value);
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-
-u32
-get_psd_data(
-	struct PHY_DM_STRUCT	*p_dm_odm,
-	unsigned int	point,
-	u8 initial_gain_psd);
-
-#endif
-
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 void
 odm_dm_watchdog_lps(
@@ -1063,7 +1037,6 @@ odm_dm_watchdog_lps(
 );
 #endif
 
-
 s32
 odm_pwdb_conversion(
 	s32 X,
@@ -1078,9 +1051,9 @@ odm_sign_conversion(
 );
 
 void
-odm_init_mp_driver_status(
-	struct PHY_DM_STRUCT		*p_dm_odm
-);
+phydm_txcurrentcalibration(
+	struct PHY_DM_STRUCT	*p_dm_odm
+);	
 
 void
 phydm_seq_sorting(
@@ -1092,6 +1065,11 @@ phydm_seq_sorting(
 );
 
 void
+phydm_dm_early_init(
+	struct PHY_DM_STRUCT	*p_dm_odm
+);
+
+void
 odm_dm_init(
 	struct PHY_DM_STRUCT	*p_dm_odm
 );
@@ -1102,17 +1080,30 @@ odm_dm_reset(
 );
 
 void
+phydm_fwoffload_ability_init(
+	struct PHY_DM_STRUCT		*p_dm_odm,
+	enum phydm_offload_ability	offload_ability
+);
+
+void
+phydm_fwoffload_ability_clear(
+	struct PHY_DM_STRUCT		*p_dm_odm,
+	enum phydm_offload_ability	offload_ability
+);
+
+
+void
 phydm_support_ability_debug(
 	void		*p_dm_void,
 	u32		*const dm_value,
-	u32			*_used,
-	char				*output,
-	u32			*_out_len
+	u32		*_used,
+	char		*output,
+	u32		*_out_len
 );
 
 void
 phydm_config_ofdm_rx_path(
-	struct PHY_DM_STRUCT		*p_dm_odm,
+	struct PHY_DM_STRUCT	*p_dm_odm,
 	u32			path
 );
 
@@ -1120,49 +1111,46 @@ void
 phydm_config_trx_path(
 	void		*p_dm_void,
 	u32		*const dm_value,
-	u32			*_used,
-	char			*output,
-	u32			*_out_len
+	u32		*_used,
+	char		*output,
+	u32		*_out_len
 );
 
 void
 odm_dm_watchdog(
-	struct PHY_DM_STRUCT			*p_dm_odm
+	struct PHY_DM_STRUCT	*p_dm_odm
 );
 
 void
-odm_cmn_info_init(
-	struct PHY_DM_STRUCT		*p_dm_odm,
-	enum odm_cmninfo_e	cmn_info,
-	u32			value
+phydm_watchdog_mp(
+	struct PHY_DM_STRUCT	*p_dm_odm
 );
 
 void
-odm_cmn_info_hook(
-	struct PHY_DM_STRUCT		*p_dm_odm,
-	enum odm_cmninfo_e	cmn_info,
-	void			*p_value
+odm_cmn_info_init(
+	struct PHY_DM_STRUCT	*p_dm_odm,
+	enum odm_cmninfo_e		cmn_info,
+	u32						value
 );
 
 void
-odm_cmn_info_ptr_array_hook(
-	struct PHY_DM_STRUCT		*p_dm_odm,
-	enum odm_cmninfo_e	cmn_info,
-	u16			index,
-	void			*p_value
+odm_cmn_info_hook(
+	struct PHY_DM_STRUCT	*p_dm_odm,
+	enum odm_cmninfo_e		cmn_info,
+	void						*p_value
 );
 
 void
 odm_cmn_info_update(
-	struct PHY_DM_STRUCT		*p_dm_odm,
-	u32			cmn_info,
-	u64			value
+	struct PHY_DM_STRUCT	*p_dm_odm,
+	u32						cmn_info,
+	u64						value
 );
 
 u32
 phydm_cmn_info_query(
-	struct PHY_DM_STRUCT					*p_dm_odm,
-	enum phydm_info_query_e			info_type
+	struct PHY_DM_STRUCT	*p_dm_odm,
+	enum phydm_info_query_e	info_type
 );
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
@@ -1184,7 +1172,7 @@ odm_init_all_timers(
 
 void
 odm_cancel_all_timers(
-	struct PHY_DM_STRUCT    *p_dm_odm
+	struct PHY_DM_STRUCT	*p_dm_odm
 );
 
 void
@@ -1206,11 +1194,11 @@ platform_division64(
 #define dm_change_dynamic_init_gain_thresh		odm_change_dynamic_init_gain_thresh
 
 enum dm_dig_connect_e {
-	DIG_STA_DISCONNECT = 0,
-	DIG_STA_CONNECT = 1,
-	DIG_STA_BEFORE_CONNECT = 2,
-	DIG_MULTI_STA_DISCONNECT = 3,
-	DIG_MULTI_STA_CONNECT = 4,
+	DIG_STA_DISCONNECT			= 0,
+	DIG_STA_CONNECT				= 1,
+	DIG_STA_BEFORE_CONNECT		= 2,
+	DIG_MULTI_STA_DISCONNECT		= 3,
+	DIG_MULTI_STA_CONNECT		= 4,
 	DIG_CONNECT_MAX
 };
 
@@ -1225,12 +1213,6 @@ enum dm_dig_connect_e {
 
 #endif	/*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
 
-void
-odm_asoc_entry_init(
-	struct PHY_DM_STRUCT		*p_dm_odm
-);
-
-
 void *
 phydm_get_structure(
 	struct PHY_DM_STRUCT		*p_dm_odm,
@@ -1242,16 +1224,34 @@ phydm_get_structure(
 	/* The following is for compile only*/
 	/*===========================================================*/
 
-	#define	IS_HARDWARE_TYPE_8723A(_adapter)			false
-	#define	IS_HARDWARE_TYPE_8723AE(_adapter)			false
+	#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+		#define IS_HARDWARE_TYPE_8188E(_adapter)		false
+		#define IS_HARDWARE_TYPE_8188F(_adapter)		false
+		#define IS_HARDWARE_TYPE_8703B(_adapter)		false
+		#define IS_HARDWARE_TYPE_8723D(_adapter)		false
+		#define IS_HARDWARE_TYPE_8821C(_adapter)		false
+		#define IS_HARDWARE_TYPE_8812AU(_adapter)	false
+		#define IS_HARDWARE_TYPE_8814A(_adapter)		false
+		#define IS_HARDWARE_TYPE_8814AU(_adapter)	false
+		#define IS_HARDWARE_TYPE_8814AE(_adapter)	false
+		#define IS_HARDWARE_TYPE_8814AS(_adapter)	false
+		#define IS_HARDWARE_TYPE_8723BU(_adapter)	false
+		#define IS_HARDWARE_TYPE_8822BU(_adapter)	false
+		#define IS_HARDWARE_TYPE_8822BS(_adapter)		false
+		#define IS_HARDWARE_TYPE_JAGUAR(_Adapter)		\
+			(IS_HARDWARE_TYPE_8812(_Adapter) || IS_HARDWARE_TYPE_8821(_Adapter))
+	#else
+		#define	IS_HARDWARE_TYPE_8723A(_adapter)	false
+	#endif
+	#define	IS_HARDWARE_TYPE_8723AE(_adapter)		false
 	#define	IS_HARDWARE_TYPE_8192C(_adapter)			false
-	#define	IS_HARDWARE_TYPE_8192D(_adapter)			false
+	#define	IS_HARDWARE_TYPE_8192D(_adapter)		false
 	#define	RF_T_METER_92D	0x42
 
 
 	#define	GET_RX_STATUS_DESC_RX_MCS(__prx_status_desc)	LE_BITS_TO_1BYTE(__prx_status_desc+12, 0, 6)
 
-	#define	REG_CONFIG_RAM64X16				0xb2c
+	#define	REG_CONFIG_RAM64X16		0xb2c
 
 	#define TARGET_CHNL_NUM_2G_5G	59
 
@@ -1264,20 +1264,18 @@ phydm_get_structure(
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	void odm_dtc(struct PHY_DM_STRUCT *p_dm_odm);
-#endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */
-
-
-void phydm_noisy_detection(struct PHY_DM_STRUCT	*p_dm_odm);
-
-
 #endif
 
+void phydm_noisy_detection(
+	struct	PHY_DM_STRUCT	*p_dm_odm
+);
+
 void
 phydm_set_ext_switch(
 	void		*p_dm_void,
 	u32		*const dm_value,
 	u32		*_used,
-	char			*output,
+	char		*output,
 	u32		*_out_len
 );
 
@@ -1287,11 +1285,21 @@ phydm_api_debug(
 	u32		function_map,
 	u32		*const dm_value,
 	u32		*_used,
-	char			*output,
+	char		*output,
 	u32		*_out_len
 );
 
 u8
+phydm_csi_mask_setting(
+	void		*p_dm_void,
+	u32		enable,
+	u32		channel,
+	u32		bw,
+	u32		f_interference,
+	u32		Second_ch
+);
+
+u8
 phydm_nbi_setting(
 	void		*p_dm_void,
 	u32		enable,
@@ -1300,3 +1308,14 @@ phydm_nbi_setting(
 	u32		f_interference,
 	u32		second_ch
 );
+
+void
+phydm_dc_cancellation(
+	struct	PHY_DM_STRUCT	*p_dm_odm
+);
+
+void
+phydm_receiver_blocking(
+	void *p_dm_void
+);
+#endif
diff --git a/rtl8822BU/hal/phydm/phydm.mk b/rtl8822BU/hal/phydm/phydm.mk
new file mode 100644
index 0000000..499a7b0
--- a/dev/null
+++ b/rtl8822BU/hal/phydm/phydm.mk
@@ -0,0 +1,157 @@
+EXTRA_CFLAGS += -I$(src)/hal/phydm
+
+_PHYDM_FILES := hal/phydm/phydm_debug.o	\
+								hal/phydm/phydm_antdiv.o\
+								hal/phydm/phydm_antdect.o\
+								hal/phydm/phydm_interface.o\
+								hal/phydm/phydm_hwconfig.o\
+								hal/phydm/phydm.o\
+								hal/phydm/phydm_dig.o\
+								hal/phydm/phydm_pathdiv.o\
+								hal/phydm/phydm_rainfo.o\
+								hal/phydm/phydm_dynamicbbpowersaving.o\
+								hal/phydm/phydm_dynamictxpower.o\
+								hal/phydm/phydm_adaptivity.o\
+								hal/phydm/phydm_cfotracking.o\
+								hal/phydm/phydm_noisemonitor.o\
+								hal/phydm/phydm_acs.o\
+								hal/phydm/phydm_beamforming.o\
+								hal/phydm/phydm_dfs.o\
+								hal/phydm/txbf/halcomtxbf.o\
+								hal/phydm/txbf/haltxbfinterface.o\
+								hal/phydm/txbf/phydm_hal_txbf_api.o\
+								hal/phydm/phydm_adc_sampling.o\
+								hal/phydm/phydm_ccx.o\
+								hal/phydm/phydm_psd.o\
+								hal/phydm/halrf/halrf.o\
+								hal/phydm/halrf/halphyrf_ce.o\
+								hal/phydm/halrf/halrf_powertracking_ce.o\
+								hal/phydm/halrf/halrf_kfree.o
+		
+ifeq ($(CONFIG_RTL8188E), y)
+RTL871X = rtl8188e
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8188e_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8188e_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8188e_rf.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8188e_ce.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8188e.o\
+								hal/phydm/$(RTL871X)/hal8188erateadaptive.o\
+								hal/phydm/$(RTL871X)/phydm_rtl8188e.o
+endif
+
+ifeq ($(CONFIG_RTL8192E), y)
+RTL871X = rtl8192e
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8192e_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8192e_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8192e_rf.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8192e_ce.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8192e.o\
+								hal/phydm/$(RTL871X)/phydm_rtl8192e.o
+endif
+
+
+ifeq ($(CONFIG_RTL8812A), y)
+RTL871X = rtl8812a
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8812a_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8812a_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8812a_rf.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8812a_ce.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8812a.o\
+								hal/phydm/$(RTL871X)/phydm_rtl8812a.o\
+								hal/phydm/txbf/haltxbfjaguar.o
+endif
+
+ifeq ($(CONFIG_RTL8821A), y)
+RTL871X = rtl8821a
+_PHYDM_FILES += hal/phydm/rtl8821a/halhwimg8821a_mac.o\
+								hal/phydm/rtl8821a/halhwimg8821a_bb.o\
+								hal/phydm/rtl8821a/halhwimg8821a_rf.o\
+								hal/phydm/halrf/rtl8812a/halrf_8812a_ce.o\
+								hal/phydm/halrf/rtl8821a/halrf_8821a_ce.o\
+								hal/phydm/rtl8821a/phydm_regconfig8821a.o\
+								hal/phydm/rtl8821a/phydm_rtl8821a.o\
+								hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.o\
+								hal/phydm/txbf/haltxbfjaguar.o
+endif
+
+
+ifeq ($(CONFIG_RTL8723B), y)
+RTL871X = rtl8723b
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8723b_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8723b_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8723b_rf.o\
+								hal/phydm/$(RTL871X)/halhwimg8723b_mp.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8723b.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8723b_ce.o\
+								hal/phydm/$(RTL871X)/phydm_rtl8723b.o
+endif
+
+
+ifeq ($(CONFIG_RTL8814A), y)
+RTL871X = rtl8814a
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8814a_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8814a_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8814a_rf.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_iqk_8814a.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8814a.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8814a_ce.o\
+								hal/phydm/$(RTL871X)/phydm_rtl8814a.o\
+								hal/phydm/txbf/haltxbf8814a.o
+endif
+
+
+ifeq ($(CONFIG_RTL8723C), y)
+RTL871X = rtl8703b
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8703b_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8703b_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8703b_rf.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8703b.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8703b.o
+endif
+
+ifeq ($(CONFIG_RTL8723D), y)
+RTL871X = rtl8723d
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8723d_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8723d_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8723d_rf.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8723d.o\
+								hal/phydm/$(RTL871X)/phydm_rtl8723d.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8723d.o
+endif
+
+
+ifeq ($(CONFIG_RTL8188F), y)
+RTL871X = rtl8188f
+_PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8188f_bb.o\
+								hal/phydm/$(RTL871X)/halhwimg8188f_mac.o\
+								hal/phydm/$(RTL871X)/halhwimg8188f_rf.o\
+								hal/phydm/$(RTL871X)/phydm_regconfig8188f.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8188f.o \
+								hal/phydm/$(RTL871X)/phydm_rtl8188f.o
+endif
+
+ifeq ($(CONFIG_RTL8822B), y)
+RTL871X = rtl8822b
+_PHYDM_FILES +=	hal/phydm/$(RTL871X)/halhwimg8822b_bb.o \
+								hal/phydm/$(RTL871X)/halhwimg8822b_mac.o \
+								hal/phydm/$(RTL871X)/halhwimg8822b_rf.o \
+								hal/phydm/halrf/$(RTL871X)/halrf_8822b.o \
+								hal/phydm/$(RTL871X)/phydm_hal_api8822b.o \
+								hal/phydm/halrf/$(RTL871X)/halrf_iqk_8822b.o \
+								hal/phydm/$(RTL871X)/phydm_regconfig8822b.o \
+								hal/phydm/$(RTL871X)/phydm_rtl8822b.o
+
+_PHYDM_FILES +=	hal/phydm/txbf/haltxbf8822b.o
+endif
+
+
+ifeq ($(CONFIG_RTL8821C), y)
+RTL871X = rtl8821c
+_PHYDM_FILES +=	hal/phydm/$(RTL871X)/halhwimg8821c_bb.o \
+								hal/phydm/$(RTL871X)/halhwimg8821c_mac.o \
+								hal/phydm/$(RTL871X)/halhwimg8821c_rf.o \
+								hal/phydm/$(RTL871X)/phydm_hal_api8821c.o \
+								hal/phydm/$(RTL871X)/phydm_regconfig8821c.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_8821c.o\
+								hal/phydm/halrf/$(RTL871X)/halrf_iqk_8821c.o
+endif
\ No newline at end of file
diff --git a/rtl8822BU/hal/phydm/phydm_acs.c b/rtl8822BU/hal/phydm/phydm_acs.c
index b340123..47f2ebf 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_acs.c
+++ b/rtl8822BU/hal/phydm/phydm_acs.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 /* ************************************************************
  * include files
@@ -51,7 +46,7 @@ odm_get_auto_channel_select_result(
 void
 odm_auto_channel_select_setting(
 	void			*p_dm_void,
-	bool			is_enable
+	boolean			is_enable
 )
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
@@ -178,11 +173,9 @@ odm_auto_channel_select(
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_auto_channel_select(): Channel_Info[0][%d] = %d, Channel_Info[1][%d] = %d\n", channel_idx, p_acs->channel_info_2g[0][channel_idx], channel_idx, p_acs->channel_info_2g[1][channel_idx]));
 
 		for (search_idx = 0; search_idx < ODM_MAX_CHANNEL_2G; search_idx++) {
-			if (p_acs->channel_info_2g[1][search_idx] != 0) {
-				if (p_acs->channel_info_2g[0][search_idx] >= max_score) {
-					max_score = p_acs->channel_info_2g[0][search_idx];
-					p_acs->clean_channel_2g = search_idx + 1;
-				}
+			if (p_acs->channel_info_2g[1][search_idx] != 0 && p_acs->channel_info_2g[0][search_idx] >= max_score) {
+				max_score = p_acs->channel_info_2g[0][search_idx];
+				p_acs->clean_channel_2g = search_idx + 1;
 			}
 		}
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("(1)odm_auto_channel_select(): 2G: clean_channel_2g = %d, max_score = %d\n",
diff --git a/rtl8822BU/hal/phydm/phydm_acs.h b/rtl8822BU/hal/phydm/phydm_acs.h
index fccbe84..e54d686 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_acs.h
+++ b/rtl8822BU/hal/phydm/phydm_acs.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef	__PHYDMACS_H__
 #define    __PHYDMACS_H__
@@ -33,7 +28,7 @@
 #define ACS_NHM_SETTING                         2
 
 struct _ACS_ {
-	bool		is_force_acs_result;
+	boolean		is_force_acs_result;
 	u8		clean_channel_2g;
 	u8		clean_channel_5g;
 	u16		channel_info_2g[2][ODM_MAX_CHANNEL_2G];		/* Channel_Info[1]: channel score, Channel_Info[2]:Channel_Scan_Times */
diff --git a/rtl8822BU/hal/phydm/phydm_adaptivity.c b/rtl8822BU/hal/phydm/phydm_adaptivity.c
index 4a6ea4c..8cf5e5c 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_adaptivity.c
+++ b/rtl8822BU/hal/phydm/phydm_adaptivity.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 /* ************************************************************
  * include files
@@ -45,9 +40,8 @@ phydm_check_adaptivity(
 			p_dm_odm->adaptivity_enable = false;
 			p_dm_odm->adaptivity_flag = false;
 			ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("AP total num > %d!!, disable adaptivity\n", adaptivity->ap_num_th));
-		} else
+		} else {
 #endif
-		{
 			if (adaptivity->dynamic_link_adaptivity || adaptivity->acs_for_adaptivity) {
 				if (p_dm_odm->is_linked && adaptivity->is_check == false) {
 					phydm_nhm_counter_statistics(p_dm_odm);
@@ -62,25 +56,24 @@ phydm_check_adaptivity(
 				else
 					p_dm_odm->adaptivity_flag = true;
 			}
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 		}
+#endif
 	} else {
 		p_dm_odm->adaptivity_enable = false;
 		p_dm_odm->adaptivity_flag = false;
 	}
-
-
-
 }
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-bool
+boolean
 phydm_check_channel_plan(
 	void			*p_dm_void
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _ADAPTER		*p_adapter	= p_dm_odm->adapter;
-	PMGNT_INFO		p_mgnt_info = &(p_adapter->mgnt_info);
+	PMGNT_INFO		p_mgnt_info = &(p_adapter->MgntInfo);
 
 	if (p_mgnt_info->RegEnableAdaptivity == 2) {
 		if (p_dm_odm->carrier_sense_enable == false) {		/*check domain Code for adaptivity or CarrierSense*/
@@ -134,95 +127,6 @@ phydm_check_channel_plan(
 #endif
 
 void
-phydm_nhm_counter_statistics_init(
-	void			*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) {
-		/*PHY parameters initialize for n series*/
-		odm_write_2byte(p_dm_odm, ODM_REG_CCX_PERIOD_11N + 2, 0xC350);			/*0x894[31:16]=0x0xC350	Time duration for NHM unit: us, 0xc350=200ms*/
-		odm_write_2byte(p_dm_odm, ODM_REG_NHM_TH9_TH10_11N + 2, 0xffff);		/*0x890[31:16]=0xffff		th_9, th_10*/
-		odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH3_TO_TH0_11N, 0xffffff50);		/*0x898=0xffffff52			th_3, th_2, th_1, th_0*/
-		odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffffff);		/*0x89c=0xffffffff			th_7, th_6, th_5, th_4*/
-		odm_set_bb_reg(p_dm_odm, ODM_REG_FPGA0_IQK_11N, MASKBYTE0, 0xff);		/*0xe28[7:0]=0xff			th_8*/
-		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11N, BIT(10) | BIT9 | BIT8, 0x1);	/*0x890[10:8]=1			ignoreCCA ignore PHYTXON enable CCX*/
-		odm_set_bb_reg(p_dm_odm, ODM_REG_OFDM_FA_RSTC_11N, BIT(7), 0x1);			/*0xc0c[7]=1				max power among all RX ants*/
-	}
-#if (RTL8195A_SUPPORT == 0)
-	else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
-		/*PHY parameters initialize for ac series*/
-		odm_write_2byte(p_dm_odm, ODM_REG_CCX_PERIOD_11AC + 2, 0xC350);			/*0x990[31:16]=0xC350	Time duration for NHM unit: us, 0xc350=200ms*/
-		odm_write_2byte(p_dm_odm, ODM_REG_NHM_TH9_TH10_11AC + 2, 0xffff);		/*0x994[31:16]=0xffff		th_9, th_10*/
-		odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0xffffff50);	/*0x998=0xffffff52			th_3, th_2, th_1, th_0*/
-		odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH7_TO_TH4_11AC, 0xffffffff);	/*0x99c=0xffffffff			th_7, th_6, th_5, th_4*/
-		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH8_11AC, MASKBYTE0, 0xff);		/*0x9a0[7:0]=0xff			th_8*/
-		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11AC, BIT(8) | BIT9 | BIT10, 0x1); /*0x994[10:8]=1			ignoreCCA ignore PHYTXON	enable CCX*/
-		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_9E8_11AC, BIT(0), 0x1);				/*0x9e8[7]=1				max power among all RX ants*/
-
-	}
-#endif
-}
-
-void
-phydm_nhm_counter_statistics(
-	void			*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	if (!(p_dm_odm->support_ability & ODM_BB_NHM_CNT))
-		return;
-
-	/*Get NHM report*/
-	phydm_get_nhm_counter_statistics(p_dm_odm);
-
-	/*Reset NHM counter*/
-	phydm_nhm_counter_statistics_reset(p_dm_odm);
-}
-
-void
-phydm_get_nhm_counter_statistics(
-	void			*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32		value32 = 0;
-#if (RTL8195A_SUPPORT == 0)
-	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES)
-		value32 = odm_get_bb_reg(p_dm_odm, ODM_REG_NHM_CNT_11AC, MASKDWORD);
-	else if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES)
-#endif
-		value32 = odm_get_bb_reg(p_dm_odm, ODM_REG_NHM_CNT_11N, MASKDWORD);
-
-	p_dm_odm->nhm_cnt_0 = (u8)(value32 & MASKBYTE0);
-	p_dm_odm->nhm_cnt_1 = (u8)((value32 & MASKBYTE1) >> 8);
-
-}
-
-void
-phydm_nhm_counter_statistics_reset(
-	void			*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) {
-		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11N, BIT(1), 0);
-		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11N, BIT(1), 1);
-	}
-#if (RTL8195A_SUPPORT == 0)
-	else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
-		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11AC, BIT(1), 0);
-		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11AC, BIT(1), 1);
-	}
-
-#endif
-
-}
-
-void
 phydm_set_edcca_threshold(
 	void	*p_dm_void,
 	s8	H2L,
@@ -358,20 +262,20 @@ phydm_set_trx_mux(
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 
 	if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) {
-		odm_set_bb_reg(p_dm_odm, ODM_REG_CCK_RPT_FORMAT_11N, BIT(3) | BIT2 | BIT1, tx_mode);			/*set TXmod to standby mode to remove outside noise affect*/
-		odm_set_bb_reg(p_dm_odm, ODM_REG_CCK_RPT_FORMAT_11N, BIT(22) | BIT21 | BIT20, rx_mode);		/*set RXmod to standby mode to remove outside noise affect*/
+		odm_set_bb_reg(p_dm_odm, ODM_REG_CCK_RPT_FORMAT_11N, BIT(3) | BIT(2) | BIT(1), tx_mode);			/*set TXmod to standby mode to remove outside noise affect*/
+		odm_set_bb_reg(p_dm_odm, ODM_REG_CCK_RPT_FORMAT_11N, BIT(22) | BIT(21) | BIT(20), rx_mode);		/*set RXmod to standby mode to remove outside noise affect*/
 		if (p_dm_odm->rf_type > ODM_1T1R) {
-			odm_set_bb_reg(p_dm_odm, ODM_REG_CCK_RPT_FORMAT_11N_B, BIT(3) | BIT2 | BIT1, tx_mode);		/*set TXmod to standby mode to remove outside noise affect*/
-			odm_set_bb_reg(p_dm_odm, ODM_REG_CCK_RPT_FORMAT_11N_B, BIT(22) | BIT21 | BIT20, rx_mode);	/*set RXmod to standby mode to remove outside noise affect*/
+			odm_set_bb_reg(p_dm_odm, ODM_REG_CCK_RPT_FORMAT_11N_B, BIT(3) | BIT(2) | BIT(1), tx_mode);		/*set TXmod to standby mode to remove outside noise affect*/
+			odm_set_bb_reg(p_dm_odm, ODM_REG_CCK_RPT_FORMAT_11N_B, BIT(22) | BIT(21) | BIT(20), rx_mode);	/*set RXmod to standby mode to remove outside noise affect*/
 		}
 	}
 #if (RTL8195A_SUPPORT == 0)
 	else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
-		odm_set_bb_reg(p_dm_odm, ODM_REG_TRMUX_11AC, BIT(11) | BIT10 | BIT9 | BIT8, tx_mode);				/*set TXmod to standby mode to remove outside noise affect*/
-		odm_set_bb_reg(p_dm_odm, ODM_REG_TRMUX_11AC, BIT(7) | BIT6 | BIT5 | BIT4, rx_mode);				/*set RXmod to standby mode to remove outside noise affect*/
+		odm_set_bb_reg(p_dm_odm, ODM_REG_TRMUX_11AC, BIT(11) | BIT(10) | BIT(9) | BIT(8), tx_mode);				/*set TXmod to standby mode to remove outside noise affect*/
+		odm_set_bb_reg(p_dm_odm, ODM_REG_TRMUX_11AC, BIT(7) | BIT(6) | BIT(5) | BIT(4), rx_mode);				/*set RXmod to standby mode to remove outside noise affect*/
 		if (p_dm_odm->rf_type > ODM_1T1R) {
-			odm_set_bb_reg(p_dm_odm, ODM_REG_TRMUX_11AC_B, BIT(11) | BIT10 | BIT9 | BIT8, tx_mode);		/*set TXmod to standby mode to remove outside noise affect*/
-			odm_set_bb_reg(p_dm_odm, ODM_REG_TRMUX_11AC_B, BIT(7) | BIT6 | BIT5 | BIT4, rx_mode);			/*set RXmod to standby mode to remove outside noise affect*/
+			odm_set_bb_reg(p_dm_odm, ODM_REG_TRMUX_11AC_B, BIT(11) | BIT(10) | BIT(9) | BIT(8), tx_mode);		/*set TXmod to standby mode to remove outside noise affect*/
+			odm_set_bb_reg(p_dm_odm, ODM_REG_TRMUX_11AC_B, BIT(7) | BIT(6) | BIT(5) | BIT(4), rx_mode);			/*set RXmod to standby mode to remove outside noise affect*/
 		}
 	}
 #endif
@@ -396,28 +300,6 @@ phydm_mac_edcca_state(
 
 }
 
-bool
-phydm_cal_nhm_cnt(
-	void		*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u16			base = 0;
-
-	base = p_dm_odm->nhm_cnt_0 + p_dm_odm->nhm_cnt_1;
-
-	if (base != 0) {
-		p_dm_odm->nhm_cnt_0 = ((p_dm_odm->nhm_cnt_0) << 8) / base;
-		p_dm_odm->nhm_cnt_1 = ((p_dm_odm->nhm_cnt_1) << 8) / base;
-	}
-	if ((p_dm_odm->nhm_cnt_0 - p_dm_odm->nhm_cnt_1) >= 100)
-		return true;			/*clean environment*/
-	else
-		return false;		/*noisy environment*/
-
-}
-
-
 void
 phydm_check_environment(
 	void	*p_dm_void
@@ -425,7 +307,7 @@ phydm_check_environment(
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _ADAPTIVITY_STATISTICS	*adaptivity = (struct _ADAPTIVITY_STATISTICS *)phydm_get_structure(p_dm_odm, PHYDM_ADAPTIVITY);
-	bool	is_clean_environment = false;
+	boolean	is_clean_environment = false;
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	struct rtl8192cd_priv	*priv = p_dm_odm->priv;
 #endif
@@ -438,46 +320,46 @@ phydm_check_environment(
 
 		adaptivity->is_first_link = false;
 		return;
-	} else {
-		if (adaptivity->nhm_wait < 3) {		/*Start enter NHM after 4 nhm_wait*/
-			adaptivity->nhm_wait++;
-			phydm_nhm_counter_statistics(p_dm_odm);
-			return;
-		} else {
-			phydm_nhm_counter_statistics(p_dm_odm);
-			is_clean_environment = phydm_cal_nhm_cnt(p_dm_odm);
-			if (is_clean_environment == true) {
-				p_dm_odm->th_l2h_ini = adaptivity->th_l2h_ini_backup;			/*adaptivity mode*/
-				p_dm_odm->th_edcca_hl_diff = adaptivity->th_edcca_hl_diff_backup;
+	}
 
-				p_dm_odm->adaptivity_enable = true;
+	if (adaptivity->nhm_wait < 3) {		/*Start enter NHM after 4 nhm_wait*/
+		adaptivity->nhm_wait++;
+		phydm_nhm_counter_statistics(p_dm_odm);
+		return;
+	}
 
-				if (p_dm_odm->support_ic_type & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA))
-					p_dm_odm->adaptivity_flag = false;
-				else
-					p_dm_odm->adaptivity_flag = true;
+	phydm_nhm_counter_statistics(p_dm_odm);
+	is_clean_environment = phydm_cal_nhm_cnt(p_dm_odm);
+
+	if (is_clean_environment == true) {
+		p_dm_odm->th_l2h_ini = adaptivity->th_l2h_ini_backup;			/*adaptivity mode*/
+		p_dm_odm->th_edcca_hl_diff = adaptivity->th_edcca_hl_diff_backup;
+
+		p_dm_odm->adaptivity_enable = true;
+
+		if (p_dm_odm->support_ic_type & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA))
+			p_dm_odm->adaptivity_flag = false;
+		else
+			p_dm_odm->adaptivity_flag = true;
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-				priv->pshare->rf_ft_var.is_clean_environment = true;
+		priv->pshare->rf_ft_var.is_clean_environment = true;
 #endif
-			} else {
-				if (!adaptivity->acs_for_adaptivity) {
-					p_dm_odm->th_l2h_ini = p_dm_odm->th_l2h_ini_mode2;			/*mode2*/
-					p_dm_odm->th_edcca_hl_diff = p_dm_odm->th_edcca_hl_diff_mode2;
+	} else {
+		if (!adaptivity->acs_for_adaptivity) {
+			p_dm_odm->th_l2h_ini = p_dm_odm->th_l2h_ini_mode2;			/*mode2*/
+			p_dm_odm->th_edcca_hl_diff = p_dm_odm->th_edcca_hl_diff_mode2;
 
-					p_dm_odm->adaptivity_flag = false;
-					p_dm_odm->adaptivity_enable = false;
-				}
+			p_dm_odm->adaptivity_flag = false;
+			p_dm_odm->adaptivity_enable = false;
+		}
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-				priv->pshare->rf_ft_var.is_clean_environment = false;
+		priv->pshare->rf_ft_var.is_clean_environment = false;
 #endif
-			}
-			adaptivity->nhm_wait = 0;
-			adaptivity->is_first_link = true;
-			adaptivity->is_check = true;
-		}
-
 	}
 
+	adaptivity->nhm_wait = 0;
+	adaptivity->is_first_link = true;
+	adaptivity->is_check = true;
 
 }
 
@@ -488,44 +370,51 @@ phydm_search_pwdb_lower_bound(
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _ADAPTIVITY_STATISTICS	*adaptivity = (struct _ADAPTIVITY_STATISTICS *)phydm_get_structure(p_dm_odm, PHYDM_ADAPTIVITY);
-	u32			value32 = 0;
-	u8			cnt;
-	u8			tx_edcca1 = 0, tx_edcca0 = 0;
-	bool			is_adjust = true;
+	u32			value32 = 0, reg_value32 = 0;
+	u8			cnt, try_count = 0;
+	u8			tx_edcca1 = 0;
+	boolean			is_adjust = true;
 	s8			th_l2h_dmc, th_h2l_dmc, igi_target = 0x32;
 	s8			diff;
 	u8			IGI = adaptivity->igi_base + 30 + (u8)p_dm_odm->th_l2h_ini - (u8)p_dm_odm->th_edcca_hl_diff;
 
 	if (p_dm_odm->support_ic_type & (ODM_RTL8723B | ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A))
 		phydm_set_lna(p_dm_odm, phydm_disable_lna);
-	else {
-		phydm_set_trx_mux(p_dm_odm, phydm_standby_mode, phydm_standby_mode);
-		odm_pause_dig(p_dm_odm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_0, 0x7e);
-	}
 
 	diff = igi_target - (s8)IGI;
 	th_l2h_dmc = p_dm_odm->th_l2h_ini + diff;
 	if (th_l2h_dmc > 10)
 		th_l2h_dmc = 10;
-	th_h2l_dmc = th_l2h_dmc - p_dm_odm->th_edcca_hl_diff;
 
+	th_h2l_dmc = th_l2h_dmc - p_dm_odm->th_edcca_hl_diff;
 	phydm_set_edcca_threshold(p_dm_odm, th_h2l_dmc, th_l2h_dmc);
-	ODM_delay_ms(5);
+	ODM_delay_ms(30);
 
 	while (is_adjust) {
+
+		if (phydm_set_bb_dbg_port(p_dm_odm, BB_DBGPORT_PRIORITY_1, 0x0)) {/*set debug port to 0x0*/
+			reg_value32 = phydm_get_bb_dbg_port_value(p_dm_odm);
+
+			while (reg_value32 & BIT(3) && try_count < 3) {
+				ODM_delay_ms(3);
+				try_count = try_count + 1;
+				reg_value32 = phydm_get_bb_dbg_port_value(p_dm_odm);
+			}
+			phydm_release_bb_dbg_port(p_dm_odm);
+			try_count = 0;
+		}
+
 		for (cnt = 0; cnt < 20; cnt++) {
-			if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES)
-				value32 = odm_get_bb_reg(p_dm_odm, ODM_REG_RPT_11N, MASKDWORD);
-#if (RTL8195A_SUPPORT == 0)
-			else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES)
-				value32 = odm_get_bb_reg(p_dm_odm, ODM_REG_RPT_11AC, MASKDWORD);
-#endif
+
+			if (phydm_set_bb_dbg_port(p_dm_odm, BB_DBGPORT_PRIORITY_1, adaptivity->adaptivity_dbg_port)) {
+				value32 = phydm_get_bb_dbg_port_value(p_dm_odm);
+				phydm_release_bb_dbg_port(p_dm_odm);
+			}
+
 			if (value32 & BIT(30) && (p_dm_odm->support_ic_type & (ODM_RTL8723B | ODM_RTL8188E)))
 				tx_edcca1 = tx_edcca1 + 1;
 			else if (value32 & BIT(29))
 				tx_edcca1 = tx_edcca1 + 1;
-			else
-				tx_edcca0 = tx_edcca0 + 1;
 		}
 
 		if (tx_edcca1 > 1) {
@@ -533,50 +422,34 @@ phydm_search_pwdb_lower_bound(
 			th_l2h_dmc = th_l2h_dmc + 1;
 			if (th_l2h_dmc > 10)
 				th_l2h_dmc = 10;
-			th_h2l_dmc = th_l2h_dmc - p_dm_odm->th_edcca_hl_diff;
 
+			th_h2l_dmc = th_l2h_dmc - p_dm_odm->th_edcca_hl_diff;
 			phydm_set_edcca_threshold(p_dm_odm, th_h2l_dmc, th_l2h_dmc);
-			if (th_l2h_dmc == 10) {
-				is_adjust = false;
-				adaptivity->h2l_lb = th_h2l_dmc;
-				adaptivity->l2h_lb = th_l2h_dmc;
-				p_dm_odm->adaptivity_igi_upper = IGI;
-			}
-
 			tx_edcca1 = 0;
-			tx_edcca0 = 0;
+			if (th_l2h_dmc == 10)
+				is_adjust = false;
 
-		} else {
+		} else
 			is_adjust = false;
-			adaptivity->h2l_lb = th_h2l_dmc;
-			adaptivity->l2h_lb = th_l2h_dmc;
-			p_dm_odm->adaptivity_igi_upper = IGI;
-			tx_edcca1 = 0;
-			tx_edcca0 = 0;
-		}
+
 	}
 
-	p_dm_odm->adaptivity_igi_upper = p_dm_odm->adaptivity_igi_upper - p_dm_odm->dc_backoff;
-	adaptivity->h2l_lb = adaptivity->h2l_lb + p_dm_odm->dc_backoff;
-	adaptivity->l2h_lb = adaptivity->l2h_lb + p_dm_odm->dc_backoff;
+	p_dm_odm->adaptivity_igi_upper = IGI - p_dm_odm->dc_backoff;
+	adaptivity->h2l_lb = th_h2l_dmc + p_dm_odm->dc_backoff;
+	adaptivity->l2h_lb = th_l2h_dmc + p_dm_odm->dc_backoff;
 
 	if (p_dm_odm->support_ic_type & (ODM_RTL8723B | ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A))
 		phydm_set_lna(p_dm_odm, phydm_enable_lna);
-	else {
-		phydm_set_trx_mux(p_dm_odm, phydm_tx_mode, phydm_rx_mode);
-		odm_pause_dig(p_dm_odm, PHYDM_RESUME, PHYDM_PAUSE_LEVEL_0, NONE);
-	}
 
 	phydm_set_edcca_threshold(p_dm_odm, 0x7f, 0x7f);				/*resume to no link state*/
 }
 
-bool
+boolean
 phydm_re_search_condition(
 	void				*p_dm_void
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	/*struct _ADAPTIVITY_STATISTICS*	adaptivity = (struct _ADAPTIVITY_STATISTICS*)phydm_get_structure(p_dm_odm, PHYDM_ADAPTIVITY);*/
 	u8			adaptivity_igi_upper;
 	/*s8		TH_L2H_dmc, IGI_target = 0x32;*/
 	/*s8		diff;*/
@@ -587,13 +460,12 @@ phydm_re_search_condition(
 
 	/*diff = TH_L2H_dmc - p_dm_odm->TH_L2H_ini;*/
 	/*lowest_IGI_upper = IGI_target - diff;*/
-
 	/*if ((adaptivity_igi_upper - lowest_IGI_upper) <= 5)*/
+
 	if (adaptivity_igi_upper <= 0x26)
 		return true;
 	else
 		return false;
-
 }
 
 void
@@ -608,7 +480,7 @@ phydm_adaptivity_info_init(
 
 	switch (cmn_info)	{
 	case PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE:
-		p_dm_odm->carrier_sense_enable = (bool)value;
+		p_dm_odm->carrier_sense_enable = (boolean)value;
 		break;
 
 	case PHYDM_ADAPINFO_DCBACKOFF:
@@ -616,7 +488,7 @@ phydm_adaptivity_info_init(
 		break;
 
 	case PHYDM_ADAPINFO_DYNAMICLINKADAPTIVITY:
-		adaptivity->dynamic_link_adaptivity = (bool)value;
+		adaptivity->dynamic_link_adaptivity = (boolean)value;
 		break;
 
 	case PHYDM_ADAPINFO_TH_L2H_INI:
@@ -654,14 +526,14 @@ phydm_adaptivity_init(
 
 	if (p_dm_odm->carrier_sense_enable == false) {
 		if (p_dm_odm->th_l2h_ini == 0)
-			p_dm_odm->th_l2h_ini = 0xf5;
+			phydm_set_l2h_th_ini(p_dm_odm);
 	} else
 		p_dm_odm->th_l2h_ini = 0xa;
 
 	if (p_dm_odm->th_edcca_hl_diff == 0)
 		p_dm_odm->th_edcca_hl_diff = 7;
 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
-	if (p_dm_odm->wifi_test == true || p_dm_odm->mp_mode == true)
+	if (p_dm_odm->wifi_test == true || *(p_dm_odm->p_mp_mode) == true)
 #else
 	if ((p_dm_odm->wifi_test & RT_WIFI_LOGO) == true)
 #endif
@@ -699,6 +571,7 @@ phydm_adaptivity_init(
 
 	p_dm_odm->th_l2h_ini_mode2 = 20;
 	p_dm_odm->th_edcca_hl_diff_mode2 = 8;
+	adaptivity->debug_mode = false;
 	adaptivity->th_l2h_ini_backup = p_dm_odm->th_l2h_ini;
 	adaptivity->th_edcca_hl_diff_backup = p_dm_odm->th_edcca_hl_diff;
 
@@ -713,42 +586,38 @@ phydm_adaptivity_init(
 	adaptivity->is_stop_edcca = false;
 	adaptivity->backup_h2l = 0;
 	adaptivity->backup_l2h = 0;
+	adaptivity->adaptivity_dbg_port = (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) ? 0x208 : 0x209;
 
 	phydm_mac_edcca_state(p_dm_odm, phydm_dont_ignore_edcca);
 
-	/*Search pwdB lower bound*/
-	if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES)
-		odm_set_bb_reg(p_dm_odm, ODM_REG_DBG_RPT_11N, MASKDWORD, 0x208);
-#if (RTL8195A_SUPPORT == 0)
-	else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES)
-		odm_set_bb_reg(p_dm_odm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x209);
-#endif
-
 	if (p_dm_odm->support_ic_type & ODM_IC_11N_GAIN_IDX_EDCCA) {
-		/*odm_set_bb_reg(p_dm_odm, ODM_REG_EDCCA_DOWN_OPT_11N, BIT(12) | BIT11 | BIT10, 0x7);*/		/*interfernce need > 2^x us, and then EDCCA will be 1*/
+		/*odm_set_bb_reg(p_dm_odm, ODM_REG_EDCCA_DOWN_OPT_11N, BIT(12) | BIT(11) | BIT(10), 0x7);*/		/*interfernce need > 2^x us, and then EDCCA will be 1*/
 		if (p_dm_odm->support_ic_type & ODM_RTL8197F) {
 			odm_set_bb_reg(p_dm_odm, ODM_REG_PAGE_B1_97F, BIT(30), 0x1);								/*set to page B1*/
-			odm_set_bb_reg(p_dm_odm, ODM_REG_EDCCA_DCNF_97F, BIT(27) | BIT26, 0x1);		/*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/
+			odm_set_bb_reg(p_dm_odm, ODM_REG_EDCCA_DCNF_97F, BIT(27) | BIT(26), 0x1);		/*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/
 			odm_set_bb_reg(p_dm_odm, ODM_REG_PAGE_B1_97F, BIT(30), 0x0);
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 			if (priv->pshare->rf_ft_var.adaptivity_enable == 1)
 				odm_set_bb_reg(p_dm_odm, 0xce8, BIT(13), 0x1);						/*0: mean, 1:max pwdB*/
 #endif
 		} else
-			odm_set_bb_reg(p_dm_odm, ODM_REG_EDCCA_DCNF_11N, BIT(21) | BIT20, 0x1);		/*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/
+			odm_set_bb_reg(p_dm_odm, ODM_REG_EDCCA_DCNF_11N, BIT(21) | BIT(20), 0x1);		/*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/
 	}
 #if (RTL8195A_SUPPORT == 0)
 	if (p_dm_odm->support_ic_type & ODM_IC_11AC_GAIN_IDX_EDCCA) {		/*8814a no need to find pwdB lower bound, maybe*/
-		/*odm_set_bb_reg(p_dm_odm, ODM_REG_EDCCA_DOWN_OPT, BIT(30) | BIT29 | BIT28, 0x7);*/		/*interfernce need > 2^x us, and then EDCCA will be 1*/
-		odm_set_bb_reg(p_dm_odm, ODM_REG_ACBB_EDCCA_ENHANCE, BIT(29) | BIT28, 0x1);		/*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/
+		/*odm_set_bb_reg(p_dm_odm, ODM_REG_EDCCA_DOWN_OPT, BIT(30) | BIT(29) | BIT(28), 0x7);*/		/*interfernce need > 2^x us, and then EDCCA will be 1*/
+		odm_set_bb_reg(p_dm_odm, ODM_REG_ACBB_EDCCA_ENHANCE, BIT(29) | BIT(28), 0x1);		/*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/
 	}
 
 	if (!(p_dm_odm->support_ic_type & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA))) {
 		phydm_search_pwdb_lower_bound(p_dm_odm);
 		if (phydm_re_search_condition(p_dm_odm))
 			phydm_search_pwdb_lower_bound(p_dm_odm);
-	}
+	} else
+		phydm_set_edcca_threshold(p_dm_odm, 0x7f, 0x7f);				/*resume to no link state*/
 #endif
+	/*forgetting factor setting*/
+	phydm_set_forgetting_factor(p_dm_odm);
 
 	/*we need to consider PwdB upper bound for 8814 later IC*/
 	adaptivity->adajust_igi_level = (u8)((p_dm_odm->th_l2h_ini + igi_target) - pwdb_upper_bound + dfir_loss);	/*IGI = L2H - PwdB - dfir_loss*/
@@ -768,15 +637,16 @@ phydm_adaptivity(
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _dynamic_initial_gain_threshold_			*p_dm_dig_table = &p_dm_odm->dm_dig_table;
-	u8			IGI = p_dm_dig_table->cur_ig_value;
+	u8			igi = p_dm_dig_table->cur_ig_value;
 	s8			th_l2h_dmc, th_h2l_dmc;
-	s8			diff = 0, igi_target;
+	s8			diff = 0, igi_target = 0x32;
 	struct _ADAPTIVITY_STATISTICS	*adaptivity = (struct _ADAPTIVITY_STATISTICS *)phydm_get_structure(p_dm_odm, PHYDM_ADAPTIVITY);
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	struct _ADAPTER		*p_adapter	= p_dm_odm->adapter;
-	bool			is_fw_current_in_ps_mode = false;
+	boolean			is_fw_current_in_ps_mode = false;
+	u8			disable_ap_adapt_setting;
 
-	p_adapter->hal_func.get_hw_reg_handler(p_adapter, HW_VAR_FW_PSMODE_STATUS, (u8 *)(&is_fw_current_in_ps_mode));
+	p_adapter->HalFunc.GetHwRegHandler(p_adapter, HW_VAR_FW_PSMODE_STATUS, (u8 *)(&is_fw_current_in_ps_mode));
 
 	/*Disable EDCCA mode while under LPS mode, added by Roger, 2012.09.14.*/
 	if (is_fw_current_in_ps_mode)
@@ -788,14 +658,20 @@ phydm_adaptivity(
 		return;
 	}
 
-	if (!(p_dm_odm->support_ability & ODM_BB_ADAPTIVITY)) {
+	if ((!(p_dm_odm->support_ability & ODM_BB_ADAPTIVITY)) && adaptivity->debug_mode == false) {
 		ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("adaptivity disable, enable EDCCA mode!!!\n"));
 		p_dm_odm->th_l2h_ini = p_dm_odm->th_l2h_ini_mode2;
 		p_dm_odm->th_edcca_hl_diff = p_dm_odm->th_edcca_hl_diff_mode2;
 	}
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	else {
-		if (phydm_check_channel_plan(p_dm_odm) || (p_dm_odm->ap_total_num > adaptivity->ap_num_th)) {
+	else if (adaptivity->debug_mode == false) {
+		disable_ap_adapt_setting = false;
+		if (p_dm_odm->p_soft_ap_mode != NULL) {
+			if (*(p_dm_odm->p_soft_ap_mode) != 0 && (p_dm_odm->soft_ap_special_setting & BIT(0)))
+				disable_ap_adapt_setting = true;
+			ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("p_dm_odm->soft_ap_special_setting = %x, *(p_dm_odm->p_soft_ap_mode) = %d, disable_ap_adapt_setting = %d\n", p_dm_odm->soft_ap_special_setting, *(p_dm_odm->p_soft_ap_mode), disable_ap_adapt_setting));
+		}
+		if (phydm_check_channel_plan(p_dm_odm) || (p_dm_odm->ap_total_num > adaptivity->ap_num_th) || disable_ap_adapt_setting) {
 			p_dm_odm->th_l2h_ini = p_dm_odm->th_l2h_ini_mode2;
 			p_dm_odm->th_edcca_hl_diff = p_dm_odm->th_edcca_hl_diff_mode2;
 		} else {
@@ -804,7 +680,11 @@ phydm_adaptivity(
 		}
 	}
 #endif
-
+	else if (adaptivity->debug_mode == true) {
+		p_dm_odm->th_l2h_ini = adaptivity->th_l2h_ini_debug;
+		p_dm_odm->th_edcca_hl_diff = 7;
+		adaptivity->adajust_igi_level = (u8)((p_dm_odm->th_l2h_ini + igi_target) - pwdb_upper_bound + dfir_loss);	/*IGI = L2H - PwdB - dfir_loss*/
+	}
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("odm_Adaptivity() =====>\n"));
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("igi_base=0x%x, th_l2h_ini = %d, th_edcca_hl_diff = %d\n",
 		adaptivity->igi_base, p_dm_odm->th_l2h_ini, p_dm_odm->th_edcca_hl_diff));
@@ -815,16 +695,8 @@ phydm_adaptivity(
 		odm_set_bb_reg(p_dm_odm, 0x800, BIT(10), 0);	/*ADC_mask enable*/
 	}
 #endif
-	if (*p_dm_odm->p_band_width == ODM_BW20M)		/*CHANNEL_WIDTH_20*/
-		igi_target = adaptivity->igi_base;
-	else if (*p_dm_odm->p_band_width == ODM_BW40M)
-		igi_target = adaptivity->igi_base + 2;
-#if (RTL8195A_SUPPORT == 0)
-	else if (*p_dm_odm->p_band_width == ODM_BW80M)
-		igi_target = adaptivity->igi_base + 2;
-#endif
-	else
-		igi_target = adaptivity->igi_base;
+
+	igi_target = adaptivity->igi_base;
 	adaptivity->igi_target = (u8) igi_target;
 
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("band_width=%s, igi_target=0x%x, dynamic_link_adaptivity = %d, acs_for_adaptivity = %d\n",
@@ -839,15 +711,17 @@ phydm_adaptivity(
 	}
 
 	if (p_dm_odm->support_ic_type & (ODM_IC_11AC_GAIN_IDX_EDCCA | ODM_IC_11N_GAIN_IDX_EDCCA)) {
-		if ((adaptivity->adajust_igi_level > IGI) && (p_dm_odm->adaptivity_enable == true))
-			diff = adaptivity->adajust_igi_level - IGI;
+		if ((adaptivity->adajust_igi_level > igi) && (p_dm_odm->adaptivity_enable == true))
+			diff = adaptivity->adajust_igi_level - igi;
+		else if (p_dm_odm->adaptivity_enable == false)
+			diff = 0x3e - igi;
 
 		th_l2h_dmc = p_dm_odm->th_l2h_ini - diff + igi_target;
 		th_h2l_dmc = th_l2h_dmc - p_dm_odm->th_edcca_hl_diff;
 	}
 #if (RTL8195A_SUPPORT == 0)
 	else	{
-		diff = igi_target - (s8)IGI;
+		diff = igi_target - (s8)igi;
 		th_l2h_dmc = p_dm_odm->th_l2h_ini + diff;
 		if (th_l2h_dmc > 10 && (p_dm_odm->adaptivity_enable == true))
 			th_l2h_dmc = 10;
@@ -861,9 +735,9 @@ phydm_adaptivity(
 			th_l2h_dmc = adaptivity->l2h_lb;
 	}
 #endif
-	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("IGI=0x%x, th_l2h_dmc = %d, th_h2l_dmc = %d\n", IGI, th_l2h_dmc, th_h2l_dmc));
+	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("IGI=0x%x, th_l2h_dmc = %d, th_h2l_dmc = %d\n", igi, th_l2h_dmc, th_h2l_dmc));
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("adaptivity_igi_upper=0x%x, h2l_lb = 0x%x, l2h_lb = 0x%x\n", p_dm_odm->adaptivity_igi_upper, adaptivity->h2l_lb, adaptivity->l2h_lb));
-
+	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("debug_mode = %d\n", adaptivity->debug_mode));
 	phydm_set_edcca_threshold(p_dm_odm, th_h2l_dmc, th_l2h_dmc);
 
 	if (p_dm_odm->adaptivity_enable == true)
@@ -872,78 +746,11 @@ phydm_adaptivity(
 	return;
 }
 
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-
-void
-phydm_adaptivity_bsod(
-	void		*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER		*p_adapter = p_dm_odm->adapter;
-	PMGNT_INFO		p_mgnt_info = &(p_adapter->mgnt_info);
-	u8			count = 0;
-	u32			u4_value;
-
-	/*
-	1. turn off RF (TRX Mux in standby mode)
-	2. H2C mac id drop
-	3. ignore EDCCA
-	4. wait for clear FIFO
-	5. don't ignore EDCCA
-	6. turn on RF (TRX Mux in TRx mdoe)
-	7. H2C mac id resume
-	*/
-
-	RT_TRACE(COMP_MLME, DBG_WARNING, ("MAC id drop packet!!!!!\n"));
-
-	p_adapter->dropPktByMacIdCnt++;
-	p_mgnt_info->bDropPktInProgress = true;
-
-	p_adapter->HalFunc.GetHwRegHandler(p_adapter, HW_VAR_MAX_Q_PAGE_NUM, (u8 *)(&u4_value));
-	RT_TRACE(COMP_INIT, DBG_LOUD, ("Queue Reserved Page number = 0x%08x\n", u4_value));
-	p_adapter->HalFunc.GetHwRegHandler(p_adapter, HW_VAR_AVBL_Q_PAGE_NUM, (u8 *)(&u4_value));
-	RT_TRACE(COMP_INIT, DBG_LOUD, ("Available Queue Page number = 0x%08x\n", u4_value));
-
-	/*Standby mode*/
-	phydm_set_trx_mux(p_dm_odm, phydm_standby_mode, phydm_standby_mode);
-	odm_write_dig(p_dm_odm, 0x20);
-
-	/*H2C mac id drop*/
-	MacIdIndicateDisconnect(p_adapter);
-
-	/*Ignore EDCCA*/
-	phydm_mac_edcca_state(p_dm_odm, phydm_ignore_edcca);
-
-	delay_ms(50);
-	count = 5;
-
-	/*Resume EDCCA*/
-	phydm_mac_edcca_state(p_dm_odm, phydm_dont_ignore_edcca);
-
-	/*Turn on TRx mode*/
-	phydm_set_trx_mux(p_dm_odm, phydm_tx_mode, phydm_rx_mode);
-	odm_write_dig(p_dm_odm, 0x20);
-
-	/*Resume H2C macid*/
-	MacIdRecoverMediaStatus(p_adapter);
-
-	p_adapter->HalFunc.GetHwRegHandler(p_adapter, HW_VAR_AVBL_Q_PAGE_NUM, (u8 *)(&u4_value));
-	RT_TRACE(COMP_INIT, DBG_LOUD, ("Available Queue Page number = 0x%08x\n", u4_value));
-
-	p_mgnt_info->bDropPktInProgress = false;
-	RT_TRACE(COMP_MLME, DBG_WARNING, ("End of MAC id drop packet, spent %dms\n", count * 10));
-
-}
-
-#endif
-
 /*This API is for solving USB can't Tx problem due to USB3.0 interference in 2.4G*/
 void
 phydm_pause_edcca(
 	void	*p_dm_void,
-	bool	is_pasue_edcca
+	boolean	is_pasue_edcca
 )
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
@@ -1016,7 +823,7 @@ phydm_pause_edcca_work_item_callback(
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 #else
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 #endif
@@ -1041,7 +848,7 @@ phydm_resume_edcca_work_item_callback(
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 #else
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 #endif
@@ -1097,5 +904,75 @@ phydm_set_edcca_threshold_api(
 
 		phydm_set_edcca_threshold(p_dm_odm, th_h2l_dmc, th_l2h_dmc);
 	}
+}
+
+void
+phydm_adaptivity_debug(
+	void		*p_dm_void,
+	u32		*const dm_value,
+	u32		*_used,
+	char		*output,
+	u32		*_out_len
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _ADAPTIVITY_STATISTICS	*adaptivity = (struct _ADAPTIVITY_STATISTICS *)phydm_get_structure(p_dm_odm, PHYDM_ADAPTIVITY);
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+	u32 reg_value32;
+	s8 h2l_diff = 0;
+
+	if (dm_value[0] == PHYDM_ADAPT_DEBUG) {
+		PHYDM_SNPRINTF((output + used, out_len - used, "Adaptivity Debug Mode ===>\n"));
+		adaptivity->debug_mode = true;
+		adaptivity->th_l2h_ini_debug = (s8)dm_value[1];
+		PHYDM_SNPRINTF((output + used, out_len - used, "th_l2h_ini_debug = %d\n", adaptivity->th_l2h_ini_debug));
+	} else if (dm_value[0] == PHYDM_ADAPT_RESUME) {
+		PHYDM_SNPRINTF((output + used, out_len - used, "===> Adaptivity Resume\n"));
+		adaptivity->debug_mode = false;
+	} else if (dm_value[0] == PHYDM_ADAPT_MSG) {
+		PHYDM_SNPRINTF((output + used, out_len - used, "debug_mode = %s, th_l2h_ini = %d\n", (adaptivity->debug_mode ? "TRUE" : "FALSE"), p_dm_odm->th_l2h_ini));
+		if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) {
+			reg_value32 = odm_get_bb_reg(p_dm_odm, 0xc4c, MASKDWORD);
+			h2l_diff = (s8)(0x000000ff & reg_value32) - (s8)((0x00ff0000 & reg_value32)>>16);
+		}
+#if (RTL8195A_SUPPORT == 0)
+		else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
+			reg_value32 = odm_get_bb_reg(p_dm_odm, 0x8a4, MASKDWORD);
+			h2l_diff = (s8)(0x000000ff & reg_value32) - (s8)((0x0000ff00 & reg_value32)>>8);
+		}
+#endif
+		if (h2l_diff == 7)
+			PHYDM_SNPRINTF((output + used, out_len - used, "adaptivity is enabled\n"));
+		else
+			PHYDM_SNPRINTF((output + used, out_len - used, "adaptivity is disabled\n"));
+	}
+
+}
+
+void
+phydm_set_l2h_th_ini(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+
+	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
+		if (p_dm_odm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8814A))
+			p_dm_odm->th_l2h_ini = 0xf2;
+		else
+			p_dm_odm->th_l2h_ini = 0xef;
+	} else
+		p_dm_odm->th_l2h_ini = 0xf5;
+}
+
+void
+phydm_set_forgetting_factor(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 
+	if (p_dm_odm->support_ic_type & (ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8814A))
+		odm_set_bb_reg(p_dm_odm, 0x8a0, BIT(1) | BIT(0), 0);
 }
diff --git a/rtl8822BU/hal/phydm/phydm_adaptivity.h b/rtl8822BU/hal/phydm/phydm_adaptivity.h
index 28f8825..05e7923 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_adaptivity.h
+++ b/rtl8822BU/hal/phydm/phydm_adaptivity.h
@@ -1,7 +1,6 @@
-
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -12,20 +11,15 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef	__PHYDMADAPTIVITY_H__
 #define    __PHYDMADAPTIVITY_H__
 
-#define ADAPTIVITY_VERSION	"9.3.4"	/*20160512 changed by Kevin, modify 0xce8[13]=1 for 8197F when adaptivity is enabled*/
+#define ADAPTIVITY_VERSION	"9.5.2"	/*20170330 changed by Kevin, change th_l2h_ini setting for 5G: v2.1.0*/
 
 #define pwdb_upper_bound	7
-#define dfir_loss	5
+#define dfir_loss	7
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
 enum phydm_regulation_type {
@@ -68,6 +62,12 @@ enum phydm_mac_edcca_type {
 	phydm_dont_ignore_edcca	= 1
 };
 
+enum phydm_adaptivity_mode {
+	PHYDM_ADAPT_MSG	= 0,
+	PHYDM_ADAPT_DEBUG	= 1,
+	PHYDM_ADAPT_RESUME	= 2
+};
+
 struct _ADAPTIVITY_STATISTICS {
 	s8			th_l2h_ini_backup;
 	s8			th_edcca_hl_diff_backup;
@@ -76,25 +76,28 @@ struct _ADAPTIVITY_STATISTICS {
 	u8			nhm_wait;
 	s8			h2l_lb;
 	s8			l2h_lb;
-	bool			is_first_link;
-	bool			is_check;
-	bool			dynamic_link_adaptivity;
+	boolean			is_first_link;
+	boolean			is_check;
+	boolean			dynamic_link_adaptivity;
 	u8			ap_num_th;
 	u8			adajust_igi_level;
-	bool			acs_for_adaptivity;
+	boolean			acs_for_adaptivity;
 	s8			backup_l2h;
 	s8			backup_h2l;
-	bool			is_stop_edcca;
+	boolean			is_stop_edcca;
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	RT_WORK_ITEM	phydm_pause_edcca_work_item;
 	RT_WORK_ITEM	phydm_resume_edcca_work_item;
 #endif
+	u32			adaptivity_dbg_port; /*N:0x208, AC:0x209*/
+	u8			debug_mode;
+	s8			th_l2h_ini_debug;
 };
 
 void
 phydm_pause_edcca(
 	void	*p_dm_void,
-	bool	is_pasue_edcca
+	boolean	is_pasue_edcca
 );
 
 void
@@ -108,26 +111,6 @@ phydm_check_environment(
 );
 
 void
-phydm_nhm_counter_statistics_init(
-	void					*p_dm_void
-);
-
-void
-phydm_nhm_counter_statistics(
-	void					*p_dm_void
-);
-
-void
-phydm_nhm_counter_statistics_reset(
-	void			*p_dm_void
-);
-
-void
-phydm_get_nhm_counter_statistics(
-	void			*p_dm_void
-);
-
-void
 phydm_mac_edcca_state(
 	void					*p_dm_void,
 	enum phydm_mac_edcca_type		state
@@ -147,11 +130,6 @@ phydm_set_trx_mux(
 	enum phydm_trx_mux_type			rx_mode
 );
 
-bool
-phydm_cal_nhm_cnt(
-	void		*p_dm_void
-);
-
 void
 phydm_search_pwdb_lower_bound(
 	void					*p_dm_void
@@ -180,24 +158,6 @@ phydm_set_edcca_threshold_api(
 	u8	IGI
 );
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void
-phydm_disable_edcca(
-	void					*p_dm_void
-);
-
-void
-phydm_dynamic_edcca(
-	void					*p_dm_void
-);
-
-void
-phydm_adaptivity_bsod(
-	void					*p_dm_void
-);
-
-#endif
-
 void
 phydm_pause_edcca_work_item_callback(
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
@@ -216,4 +176,23 @@ phydm_resume_edcca_work_item_callback(
 #endif
 );
 
+void
+phydm_adaptivity_debug(
+	void		*p_dm_void,
+	u32		*const dm_value,
+	u32		*_used,
+	char		*output,
+	u32		*_out_len
+);
+
+void
+phydm_set_l2h_th_ini(
+	void		*p_dm_void
+);
+
+void
+phydm_set_forgetting_factor(
+	void		*p_dm_void
+);
+
 #endif
diff --git a/rtl8822BU/hal/phydm/phydm_adc_sampling.c b/rtl8822BU/hal/phydm/phydm_adc_sampling.c
index 0147de3..0e7cf21 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_adc_sampling.c
+++ b/rtl8822BU/hal/phydm/phydm_adc_sampling.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
@@ -18,27 +32,39 @@
 	#include "phydm_adc_sampling.tmh"
 #endif
 
+#endif
 
-bool
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+boolean
 phydm_la_buffer_allocate(
 	void			*p_dm_void
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _RT_ADCSMP		*adc_smp = &(p_dm_odm->adcsmp);
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
+#endif
 	struct _RT_ADCSMP_STRING	*adc_smp_buf = &(adc_smp->adc_smp_buf);
+	boolean	ret = false;
 
 	dbg_print("[LA mode BufferAllocate]\n");
 
 	if (adc_smp_buf->length == 0) {
-		if (platform_allocate_memory_with_zero(adapter, (void **)&(adc_smp_buf->octet), adc_smp_buf->buffer_size) == RT_STATUS_SUCCESS)
+
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+		if (PlatformAllocateMemoryWithZero(adapter, (void **)&(adc_smp_buf->octet), adc_smp_buf->buffer_size) != RT_STATUS_SUCCESS) {
+#else
+		odm_allocate_memory(p_dm_odm, (void **)&adc_smp_buf->octet, adc_smp_buf->buffer_size);
+		if (!adc_smp_buf->octet)	{
+#endif
+			ret = false;
+		} else
 			adc_smp_buf->length = adc_smp_buf->buffer_size;
-		else
-			return false;
+			ret = true;
 	}
 
-	return true;
+	return ret;
 }
 #endif
 
@@ -53,9 +79,10 @@ phydm_la_get_tx_pkt_buf(
 	u32				i = 0, value32, data_l = 0, data_h = 0;
 	u32				addr, finish_addr;
 	u32				end_addr = (adc_smp_buf->start_pos  + adc_smp_buf->buffer_size) - 1;	/*end_addr = 0x3ffff;*/
-	bool				is_round_up;
+	boolean				is_round_up;
 	static u32			page = 0xFF;
 	u32				smp_cnt = 0, smp_number = 0, addr_8byte = 0;
+	u8				backup_dma = 0;
 
 	odm_memory_set(p_dm_odm, adc_smp_buf->octet, 0, adc_smp_buf->length);
 	odm_write_1byte(p_dm_odm, 0x0106, 0x69);
@@ -63,17 +90,35 @@ phydm_la_get_tx_pkt_buf(
 	dbg_print("GetTxPktBuf\n");
 
 	value32 = odm_read_4byte(p_dm_odm, 0x7c0);
-	is_round_up = (bool)((value32 & BIT(31)) >> 31);
+	is_round_up = (boolean)((value32 & BIT(31)) >> 31);
 	finish_addr = (value32 & 0x7FFF0000) >> 16;	/*Reg7C0[30:16]: finish addr (unit: 8byte)*/
 
+	#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
+	#if (RTL8197F_SUPPORT)
+	if (p_dm_odm->support_ic_type & ODM_RTL8197F) {
+		odm_set_bb_reg(p_dm_odm, 0x7c0, BIT(0), 0x0);
+		
+		/*Stop DMA*/
+		backup_dma = odm_get_mac_reg(p_dm_odm, 0x300, MASKLWORD);
+		odm_set_mac_reg(p_dm_odm, 0x300, 0x7fff, 0x7fff);
+
+		/*move LA mode content from IMEM to TxPktBuffer
+			Source : OCPBASE_IMEM 0x00000000
+			Destination : OCPBASE_TXBUF 0x18780000
+			Length : 64K*/
+		GET_HAL_INTERFACE(p_dm_odm->priv)->init_ddma_handler(p_dm_odm->priv, OCPBASE_IMEM, OCPBASE_TXBUF, 0x10000);
+	}
+	#endif
+	#endif
+
 	if (is_round_up) {
 		addr = (finish_addr + 1) << 3;
 		dbg_print("is_round_up = ((%d)), finish_addr=((0x%x)), 0x7c0=((0x%x))\n", is_round_up, finish_addr, value32);
-		smp_number = ((adc_smp_buf->buffer_size) >> 3);	/*Byte to 64Byte*/
+		smp_number = ((adc_smp_buf->buffer_size) >> 3);	/*Byte to 8Byte (64bit)*/
 	} else	 {
 		addr = adc_smp_buf->start_pos;
-
 		addr_8byte = addr >> 3;
+		
 		if (addr_8byte > finish_addr)
 			smp_number = addr_8byte - finish_addr;
 		else
@@ -86,9 +131,6 @@ phydm_la_get_tx_pkt_buf(
 	dbg_print("is_round_up = %d, finish_addr=0x%x, value32=0x%x\n", is_round_up, finish_addr, value32);
 	dbg_print("end_addr = %x, adc_smp_buf->start_pos = 0x%x, adc_smp_buf->buffer_size = 0x%x\n", end_addr, adc_smp_buf->start_pos, adc_smp_buf->buffer_size);
 	*/
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	watchdog_stop(p_dm_odm->priv);
-#endif
 
 	if (p_dm_odm->support_ic_type & ODM_RTL8197F) {
 		for (addr = 0x0, i = 0; addr < end_addr; addr += 8, i += 2) {	/*64K byte*/
@@ -100,6 +142,8 @@ phydm_la_get_tx_pkt_buf(
 			dbg_print("%08x%08x\n", data_h, data_l);
 		}
 	} else {
+	
+		i = 0;
 		while (addr != (finish_addr << 3)) {
 			if (page != (addr >> 12)) {
 				/*Reg140=0x780+(addr>>12), addr=0x30~0x3F, total 16 pages*/
@@ -111,18 +155,18 @@ phydm_la_get_tx_pkt_buf(
 			data_l = odm_get_bb_reg(p_dm_odm, 0x8000 + (addr & 0xfff), MASKDWORD);
 			data_h = odm_get_bb_reg(p_dm_odm, 0x8000 + (addr & 0xfff) + 4, MASKDWORD);
 
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+			#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 			adc_smp_buf->octet[i] = data_h;
 			adc_smp_buf->octet[i + 1] = data_l;
-#endif
+			#endif
 
-#if DBG
+		#if DBG /*WIN driver check build*/
 			dbg_print("%08x%08x\n", data_h, data_l);
-#else
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+		#else	/*WIN driver free build*/
+			#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 			RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("%08x%08x\n", adc_smp_buf->octet[i], adc_smp_buf->octet[i + 1]));
-#endif
-#endif
+			#endif
+		#endif
 
 			i = i + 2;
 
@@ -136,14 +180,18 @@ phydm_la_get_tx_pkt_buf(
 				break;
 		}
 		dbg_print("smp_cnt = ((%d))\n", smp_cnt);
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+		
+		#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 		RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("smp_cnt = ((%d))\n", smp_cnt));
-#endif
+		#endif
 	}
 
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	watchdog_resume(p_dm_odm->priv);
-#endif
+	#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
+	#if (RTL8197F_SUPPORT)
+	if (p_dm_odm->support_ic_type & ODM_RTL8197F)
+		odm_set_mac_reg(p_dm_odm, 0x300, 0x7fff, backup_dma);	/*Resume DMA*/
+	#endif
+	#endif
 }
 
 void
@@ -162,13 +210,13 @@ phydm_la_mode_set_mac_iq_dump(
 
 		adc_smp->is_bb_trigger = 0;
 		odm_set_mac_reg(p_dm_odm, 0x7c0, BIT(2), 1); /*polling bit for MAC mode*/
-		odm_set_mac_reg(p_dm_odm, 0x7c0, BIT(4) | BIT3, adc_smp->la_trigger_edge); /*trigger mode for MAC*/
+		odm_set_mac_reg(p_dm_odm, 0x7c0, BIT(4) | BIT(3), adc_smp->la_trigger_edge); /*trigger mode for MAC*/
 
-		dbg_print("[MAC_trig] ref_mask = ((0x%x)), ref_value = ((0x%x)), dbg_port = ((0x%x))\n", adc_smp->la_mac_ref_mask, adc_smp->la_trig_sig_sel, adc_smp->la_dbg_port);
+		dbg_print("[MAC_trig] ref_mask = ((0x%x)), ref_value = ((0x%x)), dbg_port = ((0x%x))\n", adc_smp->la_mac_mask_or_hdr_sel, adc_smp->la_trig_sig_sel, adc_smp->la_dbg_port);
 		/*[Set MAC Debug Port]*/
 		odm_set_mac_reg(p_dm_odm, 0xF4, BIT(16), 1);
 		odm_set_mac_reg(p_dm_odm, 0x38, 0xff0000, adc_smp->la_dbg_port);
-		odm_set_mac_reg(p_dm_odm, 0x7c4, MASKDWORD, adc_smp->la_mac_ref_mask);
+		odm_set_mac_reg(p_dm_odm, 0x7c4, MASKDWORD, adc_smp->la_mac_mask_or_hdr_sel);
 		odm_set_mac_reg(p_dm_odm, 0x7c8, MASKDWORD, adc_smp->la_trig_sig_sel);
 
 	} else {
@@ -195,25 +243,6 @@ phydm_la_mode_set_mac_iq_dump(
 }
 
 void
-phydm_la_mode_set_dma_type(
-	void		*p_dm_void,
-	u8		la_dma_type
-)
-{
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	dbg_print("2. [LA mode DMA setting] Dma_type = ((%d))\n", la_dma_type);
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("2. [LA mode DMA setting] Dma_type = ((%d))\n", la_dma_type));
-#endif
-
-	if (p_dm_odm->support_ic_type & ODM_N_ANTDIV_SUPPORT)
-		odm_set_bb_reg(p_dm_odm, 0x9a0, 0xf00, la_dma_type);	/*0x9A0[11:8]*/
-	else
-		odm_set_bb_reg(p_dm_odm, odm_adc_trigger_jaguar2, 0xf00, la_dma_type);	/*0x95C[11:8]*/
-}
-
-void
 phydm_adc_smp_start(
 	void			*p_dm_void
 )
@@ -221,26 +250,24 @@ phydm_adc_smp_start(
 	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _RT_ADCSMP				*adc_smp = &(p_dm_odm->adcsmp);
 	u8					tmp_u1b;
-	u8					backup_DMA, while_cnt = 0;
+	u8					while_cnt = 0;
 	u8					polling_ok = false, target_polling_bit;
 
 	phydm_la_mode_bb_setting(p_dm_odm);
-	phydm_la_mode_set_dma_type(p_dm_odm, adc_smp->la_dma_type);
 	phydm_la_mode_set_trigger_time(p_dm_odm, adc_smp->la_trigger_time);
 
 	if (p_dm_odm->support_ic_type & ODM_RTL8197F)
 		odm_set_bb_reg(p_dm_odm, 0xd00, BIT(26), 0x1);
 	else {	/*for 8814A and 8822B?*/
-		odm_write_1byte(p_dm_odm, 0x198c, 0x7);
 		odm_write_1byte(p_dm_odm, 0x8b4, 0x80);
-		/* odm_set_bb_reg(p_dm_odm, 0x8b4, BIT7, 1); */
+		/* odm_set_bb_reg(p_dm_odm, 0x8b4, BIT(7), 1); */
 	}
 
 	phydm_la_mode_set_mac_iq_dump(p_dm_odm);
-	/* return; */
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
+
+	#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	watchdog_stop(p_dm_odm->priv);
-#endif
+	#endif
 
 	target_polling_bit = (adc_smp->is_bb_trigger) ? BIT(1) : BIT(2);
 	do { /*Polling time always use 100ms, when it exceed 2s, break while loop*/
@@ -257,29 +284,10 @@ phydm_adc_smp_start(
 		} else {
 			dbg_print("[LA Query OK] polling_bit=((0x%x))\n", target_polling_bit);
 			polling_ok = true;
-			if (p_dm_odm->support_ic_type & ODM_RTL8197F)
-				odm_set_bb_reg(p_dm_odm, 0x7c0, BIT(0), 0x0);
 			break;
 		}
 	} while (while_cnt < 20);
 
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	watchdog_resume(p_dm_odm->priv);
-#if (RTL8197F_SUPPORT)
-	if (p_dm_odm->support_ic_type & ODM_RTL8197F) {
-		/*Stop DMA*/
-		backup_DMA = odm_get_mac_reg(p_dm_odm, 0x300, MASKLWORD);
-		odm_set_mac_reg(p_dm_odm, 0x300, 0x7fff, backup_DMA | 0x7fff);
-
-		/*move LA mode content from IMEM to TxPktBuffer
-			Src : OCPBASE_IMEM 0x00000000
-			Dest : OCPBASE_TXBUF 0x18780000
-			Len : 64K*/
-		GET_HAL_INTERFACE(p_dm_odm->priv)->init_ddma_handler(p_dm_odm->priv, OCPBASE_IMEM, OCPBASE_TXBUF, 0x10000);
-	}
-#endif
-#endif
-
 	if (adc_smp->adc_smp_state == ADCSMP_STATE_SET) {
 
 		if (polling_ok)
@@ -288,12 +296,11 @@ phydm_adc_smp_start(
 			dbg_print("[Polling timeout]\n");
 	}
 
-#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
-	if (p_dm_odm->support_ic_type & ODM_RTL8197F)
-		odm_set_mac_reg(p_dm_odm, 0x300, 0x7fff, backup_DMA);	/*Resume DMA*/
-#endif
+	#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
+	watchdog_resume(p_dm_odm->priv);
+	#endif
 
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 	if (adc_smp->adc_smp_state == ADCSMP_STATE_SET)
 		adc_smp->adc_smp_state = ADCSMP_STATE_QUERY;
 #endif
@@ -308,7 +315,12 @@ phydm_adc_smp_start(
 
 	if (adc_smp->la_count == 0) {
 		dbg_print("LA Dump finished ---------->\n\n\n");
-		/**/
+		phydm_release_bb_dbg_port(p_dm_odm);
+		
+		if ((p_dm_odm->support_ic_type & ODM_RTL8821C) && (p_dm_odm->cut_version >= ODM_CUT_B)) {
+			odm_set_bb_reg(p_dm_odm, 0x95c, BIT(23), 0);
+		}
+
 	} else {
 		adc_smp->la_count--;
 		dbg_print("LA Dump more ---------->\n\n\n");
@@ -325,7 +337,7 @@ adc_smp_work_item_callback(
 {
 	struct _ADAPTER			*adapter = (struct _ADAPTER *)p_context;
 	PHAL_DATA_TYPE		p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 	struct _RT_ADCSMP		*adc_smp = &(p_dm_odm->adcsmp);
 
 	dbg_print("[WorkItem Call back] LA_State=((%d))\n", adc_smp->adc_smp_state);
@@ -344,7 +356,7 @@ adc_smp_set(
 )
 {
 	struct PHY_DM_STRUCT			*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	bool				is_set_success = true;
+	boolean				is_set_success = true;
 	struct _RT_ADCSMP			*adc_smp = &(p_dm_odm->adcsmp);
 
 	adc_smp->la_trig_mode = trig_mode;
@@ -352,7 +364,7 @@ adc_smp_set(
 	adc_smp->la_dma_type = dma_data_sig_sel;
 	adc_smp->la_trigger_time = trigger_time;
 
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 	if (adc_smp->adc_smp_state != ADCSMP_STATE_IDLE)
 		is_set_success = false;
 	else if (adc_smp->adc_smp_buf.length == 0)
@@ -419,6 +431,75 @@ adc_smp_query(
 
 	return ret_status;
 }
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
+
+void
+adc_smp_query(
+	void		*p_dm_void,
+	void		*output,
+	u32		out_len,
+	u32		*pused
+)
+{
+	struct PHY_DM_STRUCT			*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _RT_ADCSMP			*adc_smp = &(p_dm_odm->adcsmp);
+	struct _RT_ADCSMP_STRING	*adc_smp_buf = &(adc_smp->adc_smp_buf);
+	u32 used = *pused;
+	u32 i;
+	/* struct timespec t; */
+	/* rtw_get_current_timespec(&t); */
+
+	dbg_print("%s adc_smp_state %d", __func__, adc_smp->adc_smp_state);
+
+	for (i = 0; i < (adc_smp_buf->length >> 2) - 2; i += 2) {
+		PHYDM_SNPRINTF((output + used, out_len - used,
+			"%08x%08x\n", adc_smp_buf->octet[i], adc_smp_buf->octet[i + 1]));
+	}
+
+	PHYDM_SNPRINTF((output + used, out_len - used, "\n"));
+	/* PHYDM_SNPRINTF((output+used, out_len-used, "\n[%lu.%06lu]\n", t.tv_sec, t.tv_nsec)); */
+	*pused = used;
+}
+
+s32
+adc_smp_get_sample_counts(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _RT_ADCSMP		*adc_smp = &(p_dm_odm->adcsmp);
+	struct _RT_ADCSMP_STRING	*adc_smp_buf = &(adc_smp->adc_smp_buf);
+
+	return (adc_smp_buf->length >> 2) - 2;
+}
+
+s32
+adc_smp_query_single_data(
+	void		*p_dm_void,
+	void		*output,
+	u32		out_len,
+	u32		index
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _RT_ADCSMP		*adc_smp = &(p_dm_odm->adcsmp);
+	struct _RT_ADCSMP_STRING	*adc_smp_buf = &(adc_smp->adc_smp_buf);
+	u32 used = 0;
+
+	/* dbg_print("%s adc_smp_state %d\n", __func__, adc_smp->adc_smp_state); */
+	if (adc_smp->adc_smp_state != ADCSMP_STATE_QUERY) {
+		PHYDM_SNPRINTF((output + used, out_len - used,
+				"Error: la data is not ready yet ...\n"));
+		return -1;
+	}
+
+	if (index < ((adc_smp_buf->length >> 2) - 2)) {
+		PHYDM_SNPRINTF((output + used, out_len - used, "%08x%08x\n",
+			adc_smp_buf->octet[index], adc_smp_buf->octet[index + 1]));
+	}
+	return 0;
+}
+
 #endif
 
 void
@@ -460,7 +541,7 @@ adc_smp_init(
 
 }
 
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 void
 adc_smp_de_init(
 	void			*p_dm_void
@@ -494,47 +575,44 @@ phydm_la_mode_bb_setting(
 	u32	dbg_port = adc_smp->la_dbg_port;
 	u8	is_trigger_edge = adc_smp->la_trigger_edge;
 	u8	sampling_rate = adc_smp->la_smp_rate;
+	u8	la_dma_type = adc_smp->la_dma_type;
+	u32	dbg_port_header_sel = 0;
 
-	dbg_print("1. [LA mode bb_setting] trig_mode = ((%d)), dbg_port = ((0x%x)), Trig_Edge = ((%d)), smp_rate = ((%d)), Trig_Sel = ((0x%x))\n",
-		trig_mode, dbg_port, is_trigger_edge, sampling_rate, trig_sig_sel);
+	dbg_print("1. [BB Setting] trig_mode = ((%d)), dbg_port = ((0x%x)), Trig_Edge = ((%d)), smp_rate = ((%d)), Trig_Sel = ((0x%x)), Dma_type = ((%d))\n",
+		trig_mode, dbg_port, is_trigger_edge, sampling_rate, trig_sig_sel, la_dma_type);
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("1. [LA mode bb_setting]trig_mode = ((%d)), dbg_port = ((0x%x)), Trig_Edge = ((%d)), smp_rate = ((%d)), Trig_Sel = ((0x%x))\n",
-		trig_mode, dbg_port, is_trigger_edge, sampling_rate, trig_sig_sel));
+	RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("1. [LA mode bb_setting]trig_mode = ((%d)), dbg_port = ((0x%x)), Trig_Edge = ((%d)), smp_rate = ((%d)), Trig_Sel = ((0x%x)), Dma_type = ((%d))\n",
+		trig_mode, dbg_port, is_trigger_edge, sampling_rate, trig_sig_sel, la_dma_type));
 #endif
 
 	if (trig_mode == PHYDM_MAC_TRIG)
 		trig_sig_sel = 0; /*ignore this setting*/
 
+	/*set BB debug port*/
+	if (phydm_set_bb_dbg_port(p_dm_odm, BB_DBGPORT_PRIORITY_3, dbg_port)) {
+		dbg_print("Set dbg_port((0x%x)) success\n", dbg_port);
+	}
+	
 	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
 
-		if (trig_mode == PHYDM_ADC_RF0_TRIG) {
-			odm_set_bb_reg(p_dm_odm, 0x8f8, BIT(25) | BIT24 | BIT23 | BIT22, 9);	/*DBGOUT_RFC_a[31:0]*/
-		} else if (trig_mode == PHYDM_ADC_RF1_TRIG) {
-			odm_set_bb_reg(p_dm_odm, 0x8f8, BIT(25) | BIT24 | BIT23 | BIT22, 8);	/*DBGOUT_RFC_b[31:0]*/
-		} else
-			odm_set_bb_reg(p_dm_odm, 0x8f8, BIT(25) | BIT(24) | BIT(23) | BIT(22), 0);
-		/*
-			(0:) '{ofdm_dbg[31:0]}'
-			(1:) '{cca,crc32_fail,dbg_ofdm[29:0]}'
-			(2:) '{vbon,crc32_fail,dbg_ofdm[29:0]}'
-			(3:) '{cca,crc32_ok,dbg_ofdm[29:0]}'
-			(4:) '{vbon,crc32_ok,dbg_ofdm[29:0]}'
-			(5:) '{dbg_iqk_anta}'
-			(6:) '{cca,ofdm_crc_ok,dbg_dp_anta[29:0]}'
-			(7:) '{dbg_iqk_antb}'
-			(8:) '{DBGOUT_RFC_b[31:0]}'
-			(9:) '{DBGOUT_RFC_a[31:0]}'
-			(a:) '{dbg_ofdm}'
-			(b:) '{dbg_cck}'
-		*/
+		if (trig_mode == PHYDM_ADC_RF0_TRIG)
+			dbg_port_header_sel = 9;	/*DBGOUT_RFC_a[31:0]*/
+		else if (trig_mode == PHYDM_ADC_RF1_TRIG)
+			dbg_port_header_sel = 8;	/*DBGOUT_RFC_b[31:0]*/
+		else if ((trig_mode == PHYDM_ADC_BB_TRIG) || (trig_mode == PHYDM_ADC_MAC_TRIG)) {
+			
+			if (adc_smp->la_mac_mask_or_hdr_sel <= 0xf) {
+				dbg_port_header_sel = adc_smp->la_mac_mask_or_hdr_sel;
+			} else {
+				dbg_port_header_sel = 0;
+			}
+		}
 
-		odm_set_bb_reg(p_dm_odm, 0x198C, BIT(2) | BIT1 | BIT0, 7); /*disable dbg clk gating*/
+		phydm_bb_dbg_port_header_sel(p_dm_odm, dbg_port_header_sel);
 
-		/*dword= odm_get_bb_reg(p_dm_odm, 0x8FC, MASKDWORD);*/
-		/*dbg_print("dbg_port = ((0x%x))\n", dword);*/
+		odm_set_bb_reg(p_dm_odm, 0x95c, 0xf00, la_dma_type);	/*0x95C[11:8]*/
 		odm_set_bb_reg(p_dm_odm, 0x95C, 0x1f, trig_sig_sel);	/*0x95C[4:0], BB debug port bit*/
-		odm_set_bb_reg(p_dm_odm, 0x8FC, MASKDWORD, dbg_port);
 		odm_set_bb_reg(p_dm_odm, 0x95C, BIT(31), is_trigger_edge); /*0: posedge, 1: negedge*/
 		odm_set_bb_reg(p_dm_odm, 0x95c, 0xe0, sampling_rate);
 		/*	(0:) '80MHz'
@@ -546,9 +624,13 @@ phydm_la_mode_bb_setting(
 			(6:) '1.25MHz'
 			(7:) '160MHz (for BW160 ic)'
 		*/
+		if ((p_dm_odm->support_ic_type & ODM_RTL8821C) && (p_dm_odm->cut_version >= ODM_CUT_B)) {
+			odm_set_bb_reg(p_dm_odm, 0x95c, BIT(23), 1);
+		}
 	} else {
+
+		odm_set_bb_reg(p_dm_odm, 0x9a0, 0xf00, la_dma_type);	/*0x9A0[11:8]*/	
 		odm_set_bb_reg(p_dm_odm, 0x9a0, 0x1f, trig_sig_sel);	/*0x9A0[4:0], BB debug port bit*/
-		odm_set_bb_reg(p_dm_odm, 0x908, MASKDWORD, dbg_port);
 		odm_set_bb_reg(p_dm_odm, 0x9A0, BIT(31), is_trigger_edge); /*0: posedge, 1: negedge*/
 		odm_set_bb_reg(p_dm_odm, 0x9A0, 0xe0, sampling_rate);
 		/*	(0:) '80MHz'
@@ -591,7 +673,7 @@ phydm_la_mode_set_trigger_time(
 
 	trigger_time_unit_num = (u8)(trigger_time_mu_sec >> time_unit);
 
-	dbg_print("3. [Set Trigger Time] Trig_Time = ((%d)) * unit = ((2^%d us))\n", trigger_time_unit_num, time_unit);
+	dbg_print("2. [Set Trigger Time] Trig_Time = ((%d)) * unit = ((2^%d us))\n", trigger_time_unit_num, time_unit);
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	RT_TRACE_EX(COMP_LA_MODE, DBG_LOUD, ("3. [Set Trigger Time] Trig_Time = ((%d)) * unit = ((2^%d us))\n", trigger_time_unit_num, time_unit));
 #endif
@@ -616,10 +698,8 @@ phydm_lamode_trigger_setting(
 	struct _RT_ADCSMP	*adc_smp = &(p_dm_odm->adcsmp);
 	u8		trig_mode, dma_data_sig_sel;
 	u32		trig_sig_sel;
-	bool		is_enable_la_mode, is_trigger_edge;
-	u32		dbg_port, trigger_time_mu_sec;
-	u32		mac_ref_signal_mask;
-	u8		sampling_rate = 0, i;
+	boolean		is_enable_la_mode;
+	u32		trigger_time_mu_sec;
 	char 		help[] = "-h";
 	u32			var1[10] = {0};
 	u32 used = *_used;
@@ -628,11 +708,11 @@ phydm_lamode_trigger_setting(
 	if (p_dm_odm->support_ic_type & PHYDM_IC_SUPPORT_LA_MODE) {
 
 		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
-		is_enable_la_mode = (bool)var1[0];
+		is_enable_la_mode = (boolean)var1[0];
 		/*dbg_print("echo cmd input_num = %d\n", input_num);*/
 
 		if ((strcmp(input[1], help) == 0)) {
-			PHYDM_SNPRINTF((output + used, out_len - used, "{En} {0:BB,1:BB_MAC,2:RF0,3:RF1,4:MAC} \n {BB:dbg_port[bit],BB_MAC:0-ok/1-fail/2-cca,MAC:ref} {DMA type} {TrigTime} \n {polling_time/ref_mask} {dbg_port} {0:P_Edge, 1:N_Edge} {SpRate:0-80M,1-40M,2-20M} {Capture num}\n"));
+			PHYDM_SNPRINTF((output + used, out_len - used, "{En} {0:BB,1:BB_MAC,2:RF0,3:RF1,4:MAC} \n {BB:dbg_port[bit],BB_MAC:0-ok/1-fail/2-cca,MAC:ref} {DMA type} {TrigTime} \n {DbgPort_head/ref_mask} {dbg_port} {0:P_Edge, 1:N_Edge} {SpRate:0-80M,1-40M,2-20M} {Capture num}\n"));
 			/**/
 		} else if ((is_enable_la_mode == 1)) {
 
@@ -657,7 +737,7 @@ phydm_lamode_trigger_setting(
 			dma_data_sig_sel = (u8)var1[3];
 			trigger_time_mu_sec = var1[4]; /*unit: us*/
 
-			adc_smp->la_mac_ref_mask = var1[5];
+			adc_smp->la_mac_mask_or_hdr_sel = var1[5];
 			adc_smp->la_dbg_port = var1[6];
 			adc_smp->la_trigger_edge = (u8) var1[7];
 			adc_smp->la_smp_rate = (u8)(var1[8] & 0x7);
@@ -670,7 +750,7 @@ phydm_lamode_trigger_setting(
 #endif
 
 			PHYDM_SNPRINTF((output + used, out_len - used, "a.En= ((1)),  b.mode = ((%d)), c.Trig_Sel = ((0x%x)), d.Dma_type = ((%d))\n", trig_mode, trig_sig_sel, dma_data_sig_sel));
-			PHYDM_SNPRINTF((output + used, out_len - used, "e.Trig_Time = ((%dus)), f.mac_ref_mask = ((0x%x)), g.dbg_port = ((0x%x))\n", trigger_time_mu_sec, adc_smp->la_mac_ref_mask, adc_smp->la_dbg_port));
+			PHYDM_SNPRINTF((output + used, out_len - used, "e.Trig_Time = ((%dus)), f.Dbg_head/mac_ref_mask = ((0x%x)), g.dbg_port = ((0x%x))\n", trigger_time_mu_sec, adc_smp->la_mac_mask_or_hdr_sel, adc_smp->la_dbg_port));
 			PHYDM_SNPRINTF((output + used, out_len - used, "h.Trig_edge = ((%d)), i.smp rate = ((%d MHz)), j.Cap_num = ((%d))\n", adc_smp->la_trigger_edge, (80 >> adc_smp->la_smp_rate), adc_smp->la_count));
 
 			adc_smp_set(p_dm_odm, trig_mode, trig_sig_sel, dma_data_sig_sel, trigger_time_mu_sec, 0);
diff --git a/rtl8822BU/hal/phydm/phydm_adc_sampling.h b/rtl8822BU/hal/phydm/phydm_adc_sampling.h
index e74a18e..ecc9701 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_adc_sampling.h
+++ b/rtl8822BU/hal/phydm/phydm_adc_sampling.h
@@ -1,7 +1,21 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef __INC_ADCSMP_H
 #define __INC_ADCSMP_H
 
-#define DYNAMIC_LA_MODE	"1.0"  /*2016.07.15  Dino */
+#define DYNAMIC_LA_MODE	"2.0"  /*2017.02.06  Dino */
 
 #if (PHYDM_LA_MODE_SUPPORT == 1)
 
@@ -44,7 +58,7 @@ struct _RT_ADCSMP {
 	u32					la_trig_sig_sel;
 	u8					la_dma_type;
 	u32					la_trigger_time;
-	u32					la_mac_ref_mask;
+	u32					la_mac_mask_or_hdr_sel; /*1.BB mode: for debug port header sel; 2.MAC mode: for reference mask*/
 	u32					la_dbg_port;
 	u8					la_trigger_edge;
 	u8					la_smp_rate;
@@ -83,6 +97,28 @@ adc_smp_query(
 	void	*information_buffer,
 	PULONG	bytes_written
 );
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
+void
+adc_smp_query(
+	void		*p_dm_void,
+	void		*output,
+	u32		out_len,
+	u32		*pused
+);
+
+s32
+adc_smp_get_sample_counts(
+	void		*p_dm_void
+);
+
+s32
+adc_smp_query_single_data(
+	void		*p_dm_void,
+	void		*output,
+	u32		out_len,
+	u32		index
+);
+
 #endif
 void
 adc_smp_stop(
@@ -94,7 +130,7 @@ adc_smp_init(
 	void	*p_dm_void
 );
 
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 void
 adc_smp_de_init(
 	void			*p_dm_void
diff --git a/rtl8822BU/hal/phydm/phydm_antdect.c b/rtl8822BU/hal/phydm/phydm_antdect.c
index e07b539..7980967 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_antdect.c
+++ b/rtl8822BU/hal/phydm/phydm_antdect.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 /* ************************************************************
  * include files
@@ -49,7 +44,7 @@ odm_single_dual_antenna_default_setting(
 	struct _sw_antenna_switch_		*p_dm_swat_table = &p_dm_odm->dm_swat_table;
 	struct _ADAPTER	*p_adapter	 =  p_dm_odm->adapter;
 
-	u8 bt_ant_num = bt_get_pg_ant_num(p_adapter);
+	u8 bt_ant_num = BT_GetPgAntNum(p_adapter);
 	/* Set default antenna A and B status */
 	if (bt_ant_num == 2) {
 		p_dm_swat_table->ANTA_ON = true;
@@ -73,7 +68,7 @@ odm_single_dual_antenna_default_setting(
  *
  * Added by Roger, 2011.12.15
  *   */
-bool
+boolean
 odm_single_dual_antenna_detection(
 	void		*p_dm_void,
 	u8			mode
@@ -88,7 +83,7 @@ odm_single_dual_antenna_detection(
 	u8		initial_gain = 0x5a;
 	u32		PSD_report_tmp;
 	u32		ant_a_report = 0x0, ant_b_report = 0x0, ant_0_report = 0x0;
-	bool		is_result = true;
+	boolean		is_result = true;
 	u32		afe_backup[16];
 	u32		AFE_REG_8723A[16] = {
 		REG_RX_WAIT_CCA,	REG_TX_CCK_RFON,
@@ -183,7 +178,7 @@ odm_single_dual_antenna_detection(
 	/* PSD report of antenna A */
 	PSD_report_tmp = 0x0;
 	for (n = 0; n < 2; n++) {
-		PSD_report_tmp =  get_psd_data(p_dm_odm, 14, initial_gain);
+		PSD_report_tmp = phydm_get_psd_data(p_dm_odm, 14, initial_gain);
 		if (PSD_report_tmp > ant_a_report)
 			ant_a_report = PSD_report_tmp;
 	}
@@ -200,7 +195,7 @@ odm_single_dual_antenna_detection(
 	/* PSD report of antenna B */
 	PSD_report_tmp = 0x0;
 	for (n = 0; n < 2; n++) {
-		PSD_report_tmp =  get_psd_data(p_dm_odm, 14, initial_gain);
+		PSD_report_tmp = phydm_get_psd_data(p_dm_odm, 14, initial_gain);
 		if (PSD_report_tmp > ant_b_report)
 			ant_b_report = PSD_report_tmp;
 	}
@@ -276,7 +271,7 @@ odm_single_dual_antenna_detection(
 
 
 
-bool
+boolean
 odm_sw_ant_div_check_before_link(
 	void		*p_dm_void
 )
@@ -287,7 +282,7 @@ odm_sw_ant_div_check_before_link(
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	PMGNT_INFO		p_mgnt_info = &adapter->mgnt_info;
+	PMGNT_INFO		p_mgnt_info = &adapter->MgntInfo;
 	struct _sw_antenna_switch_			*p_dm_swat_table = &p_dm_odm->dm_swat_table;
 	struct _FAST_ANTENNA_TRAINNING_	*p_dm_fat_table = &p_dm_odm->dm_fat_table;
 	s8			score = 0;
@@ -326,12 +321,12 @@ odm_sw_ant_div_check_before_link(
 
 	/* Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. */
 	odm_acquire_spin_lock(p_dm_odm, RT_RF_STATE_SPINLOCK);
-	if (p_hal_data->e_rf_power_state != e_rf_on || p_mgnt_info->rf_change_in_progress || p_mgnt_info->is_media_connect) {
+	if (p_hal_data->eRFPowerState != eRfOn || p_mgnt_info->RFChangeInProgress || p_mgnt_info->bMediaConnect) {
 		odm_release_spin_lock(p_dm_odm, RT_RF_STATE_SPINLOCK);
 
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
 			("odm_sw_ant_div_check_before_link(): rf_change_in_progress(%x), e_rf_power_state(%x)\n",
-			p_mgnt_info->rf_change_in_progress, p_hal_data->e_rf_power_state));
+			p_mgnt_info->RFChangeInProgress, p_hal_data->eRFPowerState));
 
 		p_dm_swat_table->swas_no_link_state = 0;
 
@@ -347,13 +342,13 @@ odm_sw_ant_div_check_before_link(
 		p_dm_swat_table->swas_no_link_state = 1;
 
 		/* Copy Current Scan list. */
-		p_mgnt_info->tmp_num_bss_desc = p_mgnt_info->num_bss_desc;
-		platform_move_memory((void *)adapter->mgnt_info.tmpbss_desc, (void *)p_mgnt_info->bss_desc, sizeof(RT_WLAN_BSS) * MAX_BSS_DESC);
+		p_mgnt_info->tmpNumBssDesc = p_mgnt_info->NumBssDesc;
+		PlatformMoveMemory((void *)adapter->MgntInfo.tmpbssDesc, (void *)p_mgnt_info->bssDesc, sizeof(RT_WLAN_BSS) * MAX_BSS_DESC);
 
 		/* Go back to scan function again. */
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_sw_ant_div_check_before_link: Scan one more time\n"));
-		p_mgnt_info->scan_step = 0;
-		p_mgnt_info->is_scan_ant_detect = true;
+		p_mgnt_info->ScanStep = 0;
+		p_mgnt_info->bScanAntDetect = true;
 		scan_channel = odm_sw_ant_div_select_scan_chnl(adapter);
 
 
@@ -366,7 +361,7 @@ odm_sw_ant_div_check_before_link(
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
 					("odm_sw_ant_div_check_before_link(): No AP List Avaiable, Using ant(%s)\n", (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? "AUX_ANT" : "MAIN_ANT"));
 
-				if (IS_5G_WIRELESS_MODE(p_mgnt_info->dot11_current_wireless_mode)) {
+				if (IS_5G_WIRELESS_MODE(p_mgnt_info->dot11CurrentWirelessMode)) {
 					p_dm_swat_table->ant_5g = p_dm_fat_table->rx_idle_ant;
 					ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("p_dm_swat_table->ant_5g=%s\n", (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
 				} else {
@@ -397,7 +392,7 @@ odm_sw_ant_div_check_before_link(
 		}
 
 		odm_sw_ant_div_construct_scan_chnl(adapter, scan_channel);
-		platform_set_timer(adapter, &p_mgnt_info->scan_timer, 5);
+		PlatformSetTimer(adapter, &p_mgnt_info->ScanTimer, 5);
 
 		return true;
 	} else { /* p_dm_swat_table->swas_no_link_state == 1 */
@@ -405,51 +400,51 @@ odm_sw_ant_div_check_before_link(
 		/* 1 Check scan result and determine which antenna is going */
 		/* 1 to be used. */
 
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" tmp_num_bss_desc= (( %d ))\n", p_mgnt_info->tmp_num_bss_desc)); /* debug for Dino */
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" tmp_num_bss_desc= (( %d ))\n", p_mgnt_info->tmpNumBssDesc)); /* debug for Dino */
 
-		for (index = 0; index < p_mgnt_info->tmp_num_bss_desc; index++) {
-			p_tmp_bss_desc = &(p_mgnt_info->tmpbss_desc[index]); /* Antenna 1 */
-			p_test_bss_desc = &(p_mgnt_info->bss_desc[index]); /* Antenna 2 */
+		for (index = 0; index < p_mgnt_info->tmpNumBssDesc; index++) {
+			p_tmp_bss_desc = &(p_mgnt_info->tmpbssDesc[index]); /* Antenna 1 */
+			p_test_bss_desc = &(p_mgnt_info->bssDesc[index]); /* Antenna 2 */
 
-			if (platform_compare_memory(p_test_bss_desc->b_d_bssid_buf, p_tmp_bss_desc->b_d_bssid_buf, 6) != 0) {
+			if (PlatformCompareMemory(p_test_bss_desc->bdBssIdBuf, p_tmp_bss_desc->bdBssIdBuf, 6) != 0) {
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_sw_ant_div_check_before_link(): ERROR!! This shall not happen.\n"));
 				continue;
 			}
 
 			if (p_dm_odm->support_ic_type != ODM_RTL8723B) {
-				if (p_tmp_bss_desc->channel_number == scan_channel) {
-					if (p_tmp_bss_desc->recv_signal_power > p_test_bss_desc->recv_signal_power) {
+				if (p_tmp_bss_desc->ChannelNumber == scan_channel) {
+					if (p_tmp_bss_desc->RecvSignalPower > p_test_bss_desc->RecvSignalPower) {
 						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_sw_ant_div_check_before_link: Compare scan entry: score++\n"));
-						RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", p_tmp_bss_desc->b_d_ssid_buf, p_tmp_bss_desc->b_d_ssid_len);
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", p_tmp_bss_desc->channel_number, p_tmp_bss_desc->recv_signal_power, p_test_bss_desc->recv_signal_power));
+						RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", p_tmp_bss_desc->bdSsIdBuf, p_tmp_bss_desc->bdSsIdLen);
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", p_tmp_bss_desc->ChannelNumber, p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower));
 
 						score++;
-						platform_move_memory(p_test_bss_desc, p_tmp_bss_desc, sizeof(RT_WLAN_BSS));
-					} else if (p_tmp_bss_desc->recv_signal_power < p_test_bss_desc->recv_signal_power) {
+						PlatformMoveMemory(p_test_bss_desc, p_tmp_bss_desc, sizeof(RT_WLAN_BSS));
+					} else if (p_tmp_bss_desc->RecvSignalPower < p_test_bss_desc->RecvSignalPower) {
 						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_sw_ant_div_check_before_link: Compare scan entry: score--\n"));
-						RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", p_tmp_bss_desc->b_d_ssid_buf, p_tmp_bss_desc->b_d_ssid_len);
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", p_tmp_bss_desc->channel_number, p_tmp_bss_desc->recv_signal_power, p_test_bss_desc->recv_signal_power));
+						RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", p_tmp_bss_desc->bdSsIdBuf, p_tmp_bss_desc->bdSsIdLen);
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", p_tmp_bss_desc->ChannelNumber, p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower));
 						score--;
 					} else {
-						if (p_test_bss_desc->b_d_tstamp - p_tmp_bss_desc->b_d_tstamp < 5000) {
-							RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", p_tmp_bss_desc->b_d_ssid_buf, p_tmp_bss_desc->b_d_ssid_len);
-							ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n", p_tmp_bss_desc->channel_number, p_tmp_bss_desc->recv_signal_power, p_test_bss_desc->recv_signal_power));
+						if (p_test_bss_desc->bdTstamp - p_tmp_bss_desc->bdTstamp < 5000) {
+							RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", p_tmp_bss_desc->bdSsIdBuf, p_tmp_bss_desc->bdSsIdLen);
+							ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n", p_tmp_bss_desc->ChannelNumber, p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower));
 							ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("The 2nd Antenna didn't get this AP\n\n"));
 						}
 					}
 				}
 			} else { /* 8723B */
-				if (p_tmp_bss_desc->channel_number == scan_channel) {
-					ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("channel_number == scan_channel->(( %d ))\n", p_tmp_bss_desc->channel_number));
+				if (p_tmp_bss_desc->ChannelNumber == scan_channel) {
+					ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("channel_number == scan_channel->(( %d ))\n", p_tmp_bss_desc->ChannelNumber));
 
-					if (p_tmp_bss_desc->recv_signal_power > p_test_bss_desc->recv_signal_power) { /* Pow(Ant1) > Pow(Ant2) */
+					if (p_tmp_bss_desc->RecvSignalPower > p_test_bss_desc->RecvSignalPower) { /* Pow(Ant1) > Pow(Ant2) */
 						counter++;
-						tmp_power_diff = (u8)(p_tmp_bss_desc->recv_signal_power - p_test_bss_desc->recv_signal_power);
+						tmp_power_diff = (u8)(p_tmp_bss_desc->RecvSignalPower - p_test_bss_desc->RecvSignalPower);
 						power_diff = power_diff + tmp_power_diff;
 
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", p_tmp_bss_desc->recv_signal_power, p_test_bss_desc->recv_signal_power));
-						ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), p_tmp_bss_desc->b_d_ssid_buf);
-						ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), p_tmp_bss_desc->b_d_bssid_buf);
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower));
+						ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), p_tmp_bss_desc->bdSsIdBuf);
+						ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), p_tmp_bss_desc->bdSsIdBuf);
 
 						/* ODM_RT_TRACE(p_dm_odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("tmp_power_diff: (( %d)),max_power_diff: (( %d)),min_power_diff: (( %d))\n", tmp_power_diff,max_power_diff,min_power_diff)); */
 						if (tmp_power_diff > max_power_diff)
@@ -458,37 +453,37 @@ odm_sw_ant_div_check_before_link(
 							min_power_diff = tmp_power_diff;
 						/* ODM_RT_TRACE(p_dm_odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("max_power_diff: (( %d)),min_power_diff: (( %d))\n",max_power_diff,min_power_diff)); */
 
-						platform_move_memory(p_test_bss_desc, p_tmp_bss_desc, sizeof(RT_WLAN_BSS));
-					} else if (p_test_bss_desc->recv_signal_power > p_tmp_bss_desc->recv_signal_power) { /* Pow(Ant1) < Pow(Ant2) */
+						PlatformMoveMemory(p_test_bss_desc, p_tmp_bss_desc, sizeof(RT_WLAN_BSS));
+					} else if (p_test_bss_desc->RecvSignalPower > p_tmp_bss_desc->RecvSignalPower) { /* Pow(Ant1) < Pow(Ant2) */
 						counter++;
-						tmp_power_diff = (u8)(p_test_bss_desc->recv_signal_power - p_tmp_bss_desc->recv_signal_power);
+						tmp_power_diff = (u8)(p_test_bss_desc->RecvSignalPower - p_tmp_bss_desc->RecvSignalPower);
 						power_diff = power_diff + tmp_power_diff;
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", p_tmp_bss_desc->recv_signal_power, p_test_bss_desc->recv_signal_power));
-						ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), p_tmp_bss_desc->b_d_ssid_buf);
-						ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), p_tmp_bss_desc->b_d_bssid_buf);
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower));
+						ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), p_tmp_bss_desc->bdSsIdBuf);
+						ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), p_tmp_bss_desc->bdSsIdBuf);
 						if (tmp_power_diff > max_power_diff)
 							max_power_diff = tmp_power_diff;
 						if (tmp_power_diff < min_power_diff)
 							min_power_diff = tmp_power_diff;
 					} else { /* Pow(Ant1) = Pow(Ant2) */
-						if (p_test_bss_desc->b_d_tstamp > p_tmp_bss_desc->b_d_tstamp) { /* Stamp(Ant1) < Stamp(Ant2) */
-							ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("time_diff: %lld\n", (p_test_bss_desc->b_d_tstamp - p_tmp_bss_desc->b_d_tstamp) / 1000));
-							if (p_test_bss_desc->b_d_tstamp - p_tmp_bss_desc->b_d_tstamp > 5000) {
+						if (p_test_bss_desc->bdTstamp > p_tmp_bss_desc->bdTstamp) { /* Stamp(Ant1) < Stamp(Ant2) */
+							ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("time_diff: %lld\n", (p_test_bss_desc->bdTstamp - p_tmp_bss_desc->bdTstamp) / 1000));
+							if (p_test_bss_desc->bdTstamp - p_tmp_bss_desc->bdTstamp > 5000) {
 								counter++;
-								ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", p_tmp_bss_desc->recv_signal_power, p_test_bss_desc->recv_signal_power));
-								ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), p_tmp_bss_desc->b_d_ssid_buf);
-								ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), p_tmp_bss_desc->b_d_bssid_buf);
+								ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower));
+								ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), p_tmp_bss_desc->bdSsIdBuf);
+								ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), p_tmp_bss_desc->bdSsIdBuf);
 								min_power_diff = 0;
 							}
 						} else
-							ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Error !!!]: Time_diff: %lld\n", (p_test_bss_desc->b_d_tstamp - p_tmp_bss_desc->b_d_tstamp) / 1000));
+							ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Error !!!]: Time_diff: %lld\n", (p_test_bss_desc->bdTstamp - p_tmp_bss_desc->bdTstamp) / 1000));
 					}
 				}
 			}
 		}
 
 		if (p_dm_odm->support_ic_type & (ODM_RTL8188E | ODM_RTL8821)) {
-			if (p_mgnt_info->num_bss_desc != 0 && score < 0) {
+			if (p_mgnt_info->NumBssDesc != 0 && score < 0) {
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
 					("odm_sw_ant_div_check_before_link(): Using ant(%s)\n", (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
 			} else {
@@ -501,7 +496,7 @@ odm_sw_ant_div_check_before_link(
 					odm_update_rx_idle_ant(p_dm_odm, MAIN_ANT);
 			}
 
-			if (IS_5G_WIRELESS_MODE(p_mgnt_info->dot11_current_wireless_mode)) {
+			if (IS_5G_WIRELESS_MODE(p_mgnt_info->dot11CurrentWirelessMode)) {
 				p_dm_swat_table->ant_5g = p_dm_fat_table->rx_idle_ant;
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("p_dm_swat_table->ant_5g=%s\n", (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
 			} else {
@@ -517,7 +512,7 @@ odm_sw_ant_div_check_before_link(
 
 					/* 3 [ Scan again ] */
 					odm_sw_ant_div_construct_scan_chnl(adapter, scan_channel);
-					platform_set_timer(adapter, &p_mgnt_info->scan_timer, 5);
+					PlatformSetTimer(adapter, &p_mgnt_info->ScanTimer, 5);
 					return true;
 				} else { /* pre_aux_fail_detec == true */
 					/* 2 [ Single Antenna ] */
@@ -554,7 +549,7 @@ odm_sw_ant_div_check_before_link(
 
 						/* 3 [ Scan again ] */
 						odm_sw_ant_div_construct_scan_chnl(adapter, scan_channel);
-						platform_set_timer(adapter, &p_mgnt_info->scan_timer, 5);
+						PlatformSetTimer(adapter, &p_mgnt_info->ScanTimer, 5);
 						return true;
 					} else {
 						p_dm_odm->dm_swat_table.rssi_ant_dect_result = true;
@@ -564,7 +559,7 @@ odm_sw_ant_div_check_before_link(
 
 				}
 				/* 2 [ Dual Antenna ] */
-				else if ((p_mgnt_info->num_bss_desc != 0) && (avg_power_diff < power_target_L)) {
+				else if ((p_mgnt_info->NumBssDesc != 0) && (avg_power_diff < power_target_L)) {
 					p_dm_odm->dm_swat_table.rssi_ant_dect_result = true;
 					if (p_dm_odm->dm_swat_table.ANTB_ON == false) {
 						p_dm_odm->dm_swat_table.ANTA_ON = true;
@@ -574,7 +569,7 @@ odm_sw_ant_div_check_before_link(
 					p_dm_odm->dm_swat_table.dual_ant_counter++;
 
 					/* set bt coexDM from 1ant coexDM to 2ant coexDM */
-					bt_set_bt_coex_ant_num(adapter, BT_COEX_ANT_TYPE_DETECTED, 2);
+					BT_SetBtCoexAntNum(adapter, BT_COEX_ANT_TYPE_DETECTED, 2);
 
 					/* 3 [ Init antenna diversity ] */
 					p_dm_odm->support_ability |= ODM_BB_ANT_DIV;
@@ -608,7 +603,7 @@ odm_sw_ant_div_check_before_link(
 
 		/* Check state reset to default and wait for next time. */
 		p_dm_swat_table->swas_no_link_state = 0;
-		p_mgnt_info->is_scan_ant_detect = false;
+		p_mgnt_info->bScanAntDetect = false;
 
 		return false;
 	}
@@ -626,31 +621,6 @@ odm_sw_ant_div_check_before_link(
 
 
 /* 1 [3. PSD method] ========================================================== */
-
-
-
-
-u32
-odm_get_psd_data(
-	void			*p_dm_void,
-	u16			point,
-	u8		initial_gain)
-{
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32			psd_report;
-
-	odm_set_bb_reg(p_dm_odm, 0x808, 0x3FF, point);
-	odm_set_bb_reg(p_dm_odm, 0x808, BIT(22), 1);  /* Start PSD calculation, Reg808[22]=0->1 */
-	odm_stall_execution(150);/* Wait for HW PSD report */
-	odm_set_bb_reg(p_dm_odm, 0x808, BIT(22), 0);/* Stop PSD calculation,  Reg808[22]=1->0 */
-	psd_report = odm_get_bb_reg(p_dm_odm, 0x8B4, MASKDWORD) & 0x0000FFFF; /* Read PSD report, Reg8B4[15:0] */
-
-	psd_report = (u32)(odm_convert_to_db(psd_report)); /* +(u32)(initial_gain); */
-	return psd_report;
-}
-
-
-
 void
 odm_single_dual_antenna_detection_psd(
 	void	*p_dm_void
@@ -721,7 +691,7 @@ odm_single_dual_antenna_detection_psd(
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dbg\n"));
 	for (i = 0; i < test_num; i++) {
 		for (tone_idx = 0; tone_idx < tone_lenth_1; tone_idx++) {
-			PSD_report_temp = odm_get_psd_data(p_dm_odm, tone_idx_1[tone_idx], initial_gain);
+			PSD_report_temp = phydm_get_psd_data(p_dm_odm, tone_idx_1[tone_idx], initial_gain);
 			/* if(  PSD_report_temp>psd_report_main[tone_idx]  ) */
 			psd_report_main[tone_idx] += PSD_report_temp;
 		}
@@ -732,7 +702,7 @@ odm_single_dual_antenna_detection_psd(
 	odm_stall_execution(10);
 	for (i = 0; i < test_num; i++) {
 		for (tone_idx = 0; tone_idx < tone_lenth_1; tone_idx++) {
-			PSD_report_temp = odm_get_psd_data(p_dm_odm, tone_idx_1[tone_idx], initial_gain);
+			PSD_report_temp = phydm_get_psd_data(p_dm_odm, tone_idx_1[tone_idx], initial_gain);
 			/* if(  PSD_report_temp>psd_report_aux[tone_idx]  ) */
 			psd_report_aux[tone_idx] += PSD_report_temp;
 		}
@@ -755,7 +725,7 @@ odm_single_dual_antenna_detection_psd(
 
 	for (i = 0; i < test_num; i++) {
 		for (tone_idx = 0; tone_idx < tone_lenth_2; tone_idx++) {
-			PSD_report_temp = odm_get_psd_data(p_dm_odm, tone_idx_2[tone_idx], initial_gain);
+			PSD_report_temp = phydm_get_psd_data(p_dm_odm, tone_idx_2[tone_idx], initial_gain);
 			/* if(  PSD_report_temp>psd_report_main[tone_idx]  ) */
 			psd_report_main[tone_lenth_1 + tone_idx] += PSD_report_temp;
 		}
@@ -768,7 +738,7 @@ odm_single_dual_antenna_detection_psd(
 
 	for (i = 0; i < test_num; i++) {
 		for (tone_idx = 0; tone_idx < tone_lenth_2; tone_idx++) {
-			PSD_report_temp = odm_get_psd_data(p_dm_odm, tone_idx_2[tone_idx], initial_gain);
+			PSD_report_temp = phydm_get_psd_data(p_dm_odm, tone_idx_2[tone_idx], initial_gain);
 			/* if(  PSD_report_temp>psd_report_aux[tone_idx]  ) */
 			psd_report_aux[tone_lenth_1 + tone_idx] += PSD_report_temp;
 		}
@@ -860,5 +830,9 @@ odm_sw_ant_detect_init(
 	p_dm_swat_table->swas_no_link_state = 0;
 	p_dm_swat_table->pre_aux_fail_detec = false;
 	p_dm_swat_table->swas_no_link_bk_reg948 = 0xff;
+
+	#if (CONFIG_PSD_TOOL == 1)
+	phydm_psd_init(p_dm_odm);
+	#endif
 #endif
 }
diff --git a/rtl8822BU/hal/phydm/phydm_antdect.h b/rtl8822BU/hal/phydm/phydm_antdect.h
index 59d279b..74627fc 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_antdect.h
+++ b/rtl8822BU/hal/phydm/phydm_antdect.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef	__PHYDMANTDECT_H__
 #define    __PHYDMANTDECT_H__
@@ -34,7 +29,7 @@
 
 
 struct _ANT_DETECTED_INFO {
-	bool			is_ant_detected;
+	boolean			is_ant_detected;
 	u32			db_for_ant_a;
 	u32			db_for_ant_b;
 	u32			db_for_ant_o;
@@ -58,7 +53,7 @@ odm_single_dual_antenna_default_setting(
 	void		*p_dm_void
 );
 
-bool
+boolean
 odm_single_dual_antenna_detection(
 	void		*p_dm_void,
 	u8			mode
@@ -68,7 +63,7 @@ odm_single_dual_antenna_detection(
 
 #define sw_ant_div_check_before_link	odm_sw_ant_div_check_before_link
 
-bool
+boolean
 odm_sw_ant_div_check_before_link(
 	void		*p_dm_void
 );
diff --git a/rtl8822BU/hal/phydm/phydm_antdiv.c b/rtl8822BU/hal/phydm/phydm_antdiv.c
index 2de18a5..0d79db8 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_antdiv.c
+++ b/rtl8822BU/hal/phydm/phydm_antdiv.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 /* ************************************************************
  * include files
@@ -80,32 +75,48 @@ odm_sw_ant_div_rest_after_link(
 	void		*p_dm_void
 )
 {
+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _sw_antenna_switch_		*p_dm_swat_table = &p_dm_odm->dm_swat_table;
 	struct _FAST_ANTENNA_TRAINNING_		*p_dm_fat_table = &p_dm_odm->dm_fat_table;
-	u32             i;
+	u32	i;
 
 	if (p_dm_odm->ant_div_type == S0S1_SW_ANTDIV) {
 
 		p_dm_swat_table->try_flag = SWAW_STEP_INIT;
 		p_dm_swat_table->rssi_trying = 0;
 		p_dm_swat_table->double_chk_flag = 0;
-
 		p_dm_fat_table->rx_idle_ant = MAIN_ANT;
 
-		for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
-			p_dm_fat_table->main_ant_sum[i] = 0;
-			p_dm_fat_table->aux_ant_sum[i] = 0;
-			p_dm_fat_table->main_ant_cnt[i] = 0;
-			p_dm_fat_table->aux_ant_cnt[i] = 0;
-		}
-
+		for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++)
+			phydm_antdiv_reset_statistic(p_dm_odm, i);
 	}
+	
+#endif	
 }
 
 
 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
 void
+phydm_antdiv_reset_statistic(
+	void	*p_dm_void,
+	u32	macid
+)
+{
+	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _FAST_ANTENNA_TRAINNING_		*p_dm_fat_table = &p_dm_odm->dm_fat_table;
+
+	p_dm_fat_table->main_ant_sum[macid] = 0;
+	p_dm_fat_table->aux_ant_sum[macid] = 0;
+	p_dm_fat_table->main_ant_cnt[macid] = 0;
+	p_dm_fat_table->aux_ant_cnt[macid] = 0;
+	p_dm_fat_table->main_ant_sum_cck[macid] = 0;
+	p_dm_fat_table->aux_ant_sum_cck[macid] = 0;
+	p_dm_fat_table->main_ant_cnt_cck[macid] = 0;
+	p_dm_fat_table->aux_ant_cnt_cck[macid] = 0;
+}
+
+void
 odm_ant_div_on_off(
 	void		*p_dm_void,
 	u8		swch
@@ -123,9 +134,22 @@ odm_ant_div_on_off(
 			odm_set_bb_reg(p_dm_odm, 0xc50, BIT(7), swch);
 			odm_set_bb_reg(p_dm_odm, 0xa00, BIT(15), swch);
 
+#if (RTL8723D_SUPPORT == 1)
+			/*Mingzhi 2017-05-08*/
+			if (p_dm_odm->support_ic_type == ODM_RTL8723D) {
+				if (swch == ANTDIV_ON) {
+					odm_set_bb_reg(p_dm_odm, 0xce0, BIT(1), 1);
+					odm_set_bb_reg(p_dm_odm, 0x948, BIT(6), 1);	/*1:HW ctrl  0:SW ctrl*/
+				} else {
+					odm_set_bb_reg(p_dm_odm, 0xce0, BIT(1), 0);
+					odm_set_bb_reg(p_dm_odm, 0x948, BIT(6), 0);	/*1:HW ctrl  0:SW ctrl*/ 
+				}	
+			}			
+#endif
+
 		} else if (p_dm_odm->support_ic_type & ODM_AC_ANTDIV_SUPPORT) {
 			ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("(( Turn %s )) AC-Series HW-AntDiv block\n", (swch == ANTDIV_ON) ? "ON" : "OFF"));
-			if (p_dm_odm->support_ic_type == ODM_RTL8812) {
+			if (p_dm_odm->support_ic_type & (ODM_RTL8812 | ODM_RTL8822B)) {
 				odm_set_bb_reg(p_dm_odm, 0xc50, BIT(7), swch); /* OFDM AntDiv function block enable */
 				odm_set_bb_reg(p_dm_odm, 0xa00, BIT(15), swch); /* CCK AntDiv function block enable */
 			} else {
@@ -169,7 +193,7 @@ phydm_fast_training_enable(
 	} else if (p_dm_odm->support_ic_type == ODM_RTL8192E) {
 		odm_set_bb_reg(p_dm_odm, 0xB34, BIT(28), enable);	/*enable fast training (path-A)*/
 		/*odm_set_bb_reg(p_dm_odm, 0xB34, BIT(29), enable);*/	/*enable fast training (path-B)*/
-	} else if (p_dm_odm->support_ic_type == ODM_RTL8821) {
+	} else if (p_dm_odm->support_ic_type & (ODM_RTL8821 | ODM_RTL8822B)) {
 		odm_set_bb_reg(p_dm_odm, 0x900, BIT(19), enable);	/*enable fast training */
 		/**/
 	}
@@ -266,17 +290,16 @@ odm_update_rx_idle_ant(
 					ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-ant ] 8723B: Fail to set RX antenna due to 0x948 = 0x280\n"));
 			}
 #endif
+#if (RTL8723D_SUPPORT == 1)         /*Mingzhi 2017-05-08*/
+			else if (p_dm_odm->support_ic_type == ODM_RTL8723D) {
+				phydm_set_tx_ant_pwr_8723d(p_dm_odm, ant);
+				odm_update_rx_idle_ant_8723d(p_dm_odm, ant, default_ant, optional_ant);
+			}
+#endif			
 			else { /*8188E & 8188F*/
-
-				if (p_dm_odm->support_ic_type == ODM_RTL8723D) {
-#if (RTL8723D_SUPPORT == 1)
-					phydm_set_tx_ant_pwr_8723d(p_dm_odm, ant);
-#endif
-				}
 #if (RTL8188F_SUPPORT == 1)
-				else if (p_dm_odm->support_ic_type == ODM_RTL8188F) {
+				if (p_dm_odm->support_ic_type == ODM_RTL8188F) {
 					phydm_update_rx_idle_antenna_8188F(p_dm_odm, default_ant);
-					/**/
 				}
 #endif
 
@@ -521,7 +544,7 @@ odm_bd_ccoex_bfee_rx_div_arbitration(
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _BF_DIV_COEX_    *p_dm_bdc_table = &p_dm_odm->dm_bdc_table;
-	bool stop_bf_flag;
+	boolean stop_bf_flag;
 	u8	bdc_active_mode;
 
 
@@ -767,7 +790,7 @@ odm_rx_hw_ant_div_init_88e(
 	struct _FAST_ANTENNA_TRAINNING_	*p_dm_fat_table = &p_dm_odm->dm_fat_table;
 
 #if 0
-	if (p_dm_odm->mp_mode == true) {
+	if (*(p_dm_odm->p_mp_mode) == true) {
 		odm_set_bb_reg(p_dm_odm, ODM_REG_IGI_A_11N, BIT(7), 0); /* disable HW AntDiv */
 		odm_set_bb_reg(p_dm_odm, ODM_REG_LNA_SWITCH_11N, BIT(31), 1);  /* 1:CG, 0:CS */
 		return;
@@ -805,7 +828,7 @@ odm_trx_hw_ant_div_init_88e(
 	struct _FAST_ANTENNA_TRAINNING_	*p_dm_fat_table = &p_dm_odm->dm_fat_table;
 
 #if 0
-	if (p_dm_odm->mp_mode == true) {
+	if (*(p_dm_odm->p_mp_mode) == true) {
 		odm_set_bb_reg(p_dm_odm, ODM_REG_IGI_A_11N, BIT(7), 0); /* disable HW AntDiv */
 		odm_set_bb_reg(p_dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT(5) | BIT4 | BIT3, 0); /* Default RX   (0/1) */
 		return;
@@ -852,7 +875,7 @@ odm_smart_hw_ant_div_init_88e(
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8188E AntDiv_Init =>  ant_div_type=[CG_TRX_SMART_ANTDIV]\n"));
 
 #if 0
-	if (p_dm_odm->mp_mode == true) {
+	if (*(p_dm_odm->p_mp_mode) == true) {
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("p_dm_odm->ant_div_type: %d\n", p_dm_odm->ant_div_type));
 		return;
 	}
@@ -953,7 +976,7 @@ odm_rx_hw_ant_div_init_92e(
 	struct _FAST_ANTENNA_TRAINNING_	*p_dm_fat_table = &p_dm_odm->dm_fat_table;
 
 #if 0
-	if (p_dm_odm->mp_mode == true) {
+	if (*(p_dm_odm->p_mp_mode) == true) {
 		odm_ant_div_on_off(p_dm_odm, ANTDIV_OFF);
 		odm_set_bb_reg(p_dm_odm, 0xc50, BIT(8), 0); /* r_rxdiv_enable_anta  regc50[8]=1'b0  0: control by c50[9] */
 		odm_set_bb_reg(p_dm_odm, 0xc50, BIT(9), 1);  /* 1:CG, 0:CS */
@@ -981,15 +1004,7 @@ odm_rx_hw_ant_div_init_92e(
 	odm_set_bb_reg(p_dm_odm, 0xa0c, BIT(4), 1); /* CCK complete HW AntDiv within 64 samples */
 
 #ifdef ODM_EVM_ENHANCE_ANTDIV
-	/* EVM enhance AntDiv method init---------------------------------------------------------------------- */
-	p_dm_fat_table->EVM_method_enable = 0;
-	p_dm_fat_table->fat_state = NORMAL_STATE_MIAN;
-	p_dm_odm->antdiv_intvl = 0x64;
-	odm_set_bb_reg(p_dm_odm, 0x910, 0x3f, 0xf);
-	p_dm_odm->antdiv_evm_en = 1;
-	/* p_dm_odm->antdiv_period=1; */
-	p_dm_odm->evm_antdiv_period = 3;
-
+	phydm_evm_sw_antdiv_init(p_dm_odm);
 #endif
 
 }
@@ -1003,7 +1018,7 @@ odm_trx_hw_ant_div_init_92e(
 	struct _FAST_ANTENNA_TRAINNING_	*p_dm_fat_table = &p_dm_odm->dm_fat_table;
 
 #if 0
-	if (p_dm_odm->mp_mode == true) {
+	if (*(p_dm_odm->p_mp_mode) == true) {
 		odm_ant_div_on_off(p_dm_odm, ANTDIV_OFF);
 		odm_set_bb_reg(p_dm_odm, 0xc50, BIT(8), 0); /* r_rxdiv_enable_anta  regc50[8]=1'b0  0: control by c50[9] */
 		odm_set_bb_reg(p_dm_odm, 0xc50, BIT(9), 1);  /* 1:CG, 0:CS */
@@ -1058,14 +1073,7 @@ odm_trx_hw_ant_div_init_92e(
 	odm_set_bb_reg(p_dm_odm, 0xa0c, BIT(4), 1); /* CCK complete HW AntDiv within 64 samples */
 
 #ifdef ODM_EVM_ENHANCE_ANTDIV
-	/* EVM enhance AntDiv method init---------------------------------------------------------------------- */
-	p_dm_fat_table->EVM_method_enable = 0;
-	p_dm_fat_table->fat_state = NORMAL_STATE_MIAN;
-	p_dm_odm->antdiv_intvl = 0x64;
-	odm_set_bb_reg(p_dm_odm, 0x910, 0x3f, 0xf);
-	p_dm_odm->antdiv_evm_en = 1;
-	/* p_dm_odm->antdiv_period=1; */
-	p_dm_odm->evm_antdiv_period = 3;
+	phydm_evm_sw_antdiv_init(p_dm_odm);
 #endif
 }
 
@@ -1111,8 +1119,8 @@ odm_trx_hw_ant_div_init_8723d(
 	/*Mapping Table*/
 	odm_set_bb_reg(p_dm_odm, 0x914, MASKBYTE0, 0);
 	odm_set_bb_reg(p_dm_odm, 0x914, MASKBYTE1, 3);
-	odm_set_bb_reg(p_dm_odm, 0x864, BIT(5) | BIT(4) | BIT(3), 0);
-	odm_set_bb_reg(p_dm_odm, 0x864, BIT(8) | BIT(7) | BIT(6), 1);
+	/* odm_set_bb_reg(p_dm_odm, 0x864, BIT5|BIT4|BIT3, 0); */
+	/* odm_set_bb_reg(p_dm_odm, 0x864, BIT8|BIT7|BIT6, 1); */
 
 	/* Set WLBB_SEL_RF_ON 1 if RXFIR_PWDB > 0xCcc[3:0] */
 	odm_set_bb_reg(p_dm_odm, 0xCcc, BIT(12), 0);
@@ -1148,6 +1156,32 @@ odm_trx_hw_ant_div_init_8723d(
 
 }
 
+/*Mingzhi 2017-05-08*/
+void
+odm_update_rx_idle_ant_8723d(
+	void			*p_dm_void,
+	u8			ant,
+	u32			default_ant,
+	u32			optional_ant
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _FAST_ANTENNA_TRAINNING_			*p_dm_fat_table = &p_dm_odm->dm_fat_table;
+	struct _ADAPTER		*p_adapter = p_dm_odm->adapter;
+	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
+	u8			count = 0;
+	u8			u1_temp;
+	u8			h2c_parameter;
+	
+
+/*	odm_set_bb_reg(p_dm_odm, 0x948, BIT(6), 0x1);	*/
+	odm_set_bb_reg(p_dm_odm, 0x948, BIT(7), default_ant);
+	odm_set_bb_reg(p_dm_odm, 0x864, BIT(5) | BIT(4) | BIT(3), default_ant);      /*Default RX*/
+	odm_set_bb_reg(p_dm_odm, 0x864, BIT(8) | BIT(7) | BIT(6), optional_ant);     /*Optional RX*/
+	odm_set_bb_reg(p_dm_odm, 0x860, BIT(14) | BIT(13) | BIT(12), default_ant);    /*Default TX*/
+	p_dm_fat_table->rx_idle_ant = ant;
+}
+
 void
 phydm_set_tx_ant_pwr_8723d(
 	void			*p_dm_void,
@@ -1162,9 +1196,9 @@ phydm_set_tx_ant_pwr_8723d(
 	p_dm_fat_table->rx_idle_ant = ant;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	p_adapter->hal_func.set_tx_power_level_handler(p_adapter, p_hal_data->current_channel);
+	p_adapter->HalFunc.SetTxPowerLevelHandler(p_adapter, *p_dm_odm->p_channel);
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	rtw_hal_set_tx_power_level(p_adapter, p_hal_data->current_channel);
+	rtw_hal_set_tx_power_level(p_adapter, *p_dm_odm->p_channel);
 #endif
 
 }
@@ -1308,9 +1342,9 @@ odm_update_rx_idle_ant_8723b(
 			/* Set TX AGC by S0/S1 */
 			/* Need to consider Linux driver */
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-			p_adapter->hal_func.set_tx_power_level_handler(p_adapter, p_hal_data->current_channel);
+			p_adapter->hal_func.set_tx_power_level_handler(p_adapter, *p_dm_odm->p_channel);
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-			rtw_hal_set_tx_power_level(p_adapter, p_hal_data->current_channel);
+			rtw_hal_set_tx_power_level(p_adapter, *p_dm_odm->p_channel);
 #endif
 
 			/* Set IQC by S0/S1 */
@@ -1337,9 +1371,9 @@ odm_update_rx_idle_ant_8723b(
 	/* Set TX AGC by S0/S1 */
 	/* Need to consider Linux driver */
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	p_adapter->hal_func.set_tx_power_level_handler(p_adapter, p_hal_data->current_channel);
+	p_adapter->HalFunc.SetTxPowerLevelHandler(p_adapter, *p_dm_odm->p_channel);
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	rtw_hal_set_tx_power_level(p_adapter, p_hal_data->current_channel);
+	rtw_hal_set_tx_power_level(p_adapter, *p_dm_odm->p_channel);
 #endif
 
 	/* Set IQC by S0/S1 */
@@ -1349,7 +1383,7 @@ odm_update_rx_idle_ant_8723b(
 #endif
 }
 
-bool
+boolean
 phydm_is_bt_enable_8723b(
 	void			*p_dm_void
 )
@@ -1404,7 +1438,8 @@ phydm_hl_smart_ant_type1_init_8821a(
 	odm_set_mac_reg(p_dm_odm, 0x40, BIT(1) | BIT0, 0);		/*GPIO function*/
 
 	/*Hong_lin smart antenna HW setting*/
-	pdm_sat_table->data_codeword_bit_num  = 24;/*max=32*/
+	pdm_sat_table->rfu_codeword_total_bit_num  = 24;/*max=32*/
+	pdm_sat_table->rfu_each_ant_bit_num = 4;
 	pdm_sat_table->beam_patten_num_each_ant = 4;
 
 #if DEV_BUS_TYPE == RT_SDIO_INTERFACE
@@ -1475,7 +1510,6 @@ odm_trx_hw_ant_div_init_8821a(
 	odm_set_mac_reg(p_dm_odm, 0x64, BIT(29), 1); /* PAPE by WLAN control */
 	odm_set_mac_reg(p_dm_odm, 0x64, BIT(28), 1); /* LNAON by WLAN control */
 
-	odm_set_bb_reg(p_dm_odm, 0xCB0, MASKDWORD, 0x77775745);
 	odm_set_bb_reg(p_dm_odm, 0xCB8, BIT(16), 0);
 
 	odm_set_mac_reg(p_dm_odm, 0x4C, BIT(23), 0); /* select DPDT_P and DPDT_N as output pin */
@@ -1527,7 +1561,6 @@ odm_s0s1_sw_ant_div_init_8821a(
 	odm_set_mac_reg(p_dm_odm, 0x64, BIT(29), 1); /* PAPE by WLAN control */
 	odm_set_mac_reg(p_dm_odm, 0x64, BIT(28), 1); /* LNAON by WLAN control */
 
-	odm_set_bb_reg(p_dm_odm, 0xCB0, MASKDWORD, 0x77775745);
 	odm_set_bb_reg(p_dm_odm, 0xCB8, BIT(16), 0);
 
 	odm_set_mac_reg(p_dm_odm, 0x4C, BIT(23), 0); /* select DPDT_P and DPDT_N as output pin */
@@ -1573,6 +1606,143 @@ odm_s0s1_sw_ant_div_init_8821a(
 }
 #endif /* #if (RTL8821A_SUPPORT == 1) */
 
+#if (RTL8822B_SUPPORT == 1)
+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
+void
+phydm_hl_smart_ant_type2_init_8822b(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _SMART_ANTENNA_TRAINNING_	*pdm_sat_table = &(p_dm_odm->dm_sat_table);
+	struct _FAST_ANTENNA_TRAINNING_		*p_dm_fat_table = &p_dm_odm->dm_fat_table;
+	u8	j;
+	u8	rfu_codeword_table_init_2g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B] = {
+			{1, 1},/*0*/
+			{1, 2},
+			{2, 1},
+			{2, 2},
+			{4, 0},
+			{5, 0},
+			{6, 0},
+			{7, 0},
+			{8, 0},/*8*/
+			{9, 0},
+			{0xa, 0},
+			{0xb, 0},
+			{0xc, 0},
+			{0xd, 0},
+			{0xe, 0},
+			{0xf, 0}
+		}; 
+	u8	rfu_codeword_table_init_5g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B] ={
+		#if 1
+			{9, 1},/*0*/
+			{9, 9},
+			{1, 9},
+			{9, 6},
+			{2, 1},
+			{2, 9},
+			{9, 2},
+			{2, 2},/*8*/
+			{6, 1},
+			{6, 9},
+			{2, 9},
+			{2, 2},
+			{6, 2},
+			{6, 6},
+			{2, 6},
+			{1, 1}
+		#else
+			{1, 1},/*0*/
+			{9, 1},
+			{9, 9},
+			{1, 9},
+			{1, 2},
+			{9, 2},
+			{9, 6},
+			{1, 6},
+			{2, 1},/*8*/
+			{6, 1},
+			{6, 9},
+			{2, 9},
+			{2, 2},
+			{6, 2},
+			{6, 6},
+			{2, 6}
+		#endif
+		}; 		
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***RTK 8822B SmartAnt_Init: Hong-Bo SmrtAnt Type2]\n"));
+
+	/* ---------------------------------------- */
+	/* GPIO 0-1 for Beam control */
+	/* reg0x66[2:0]=0 */
+	/* reg0x44[25:24] = 0 */
+	/* reg0x44[23:16]  enable_output for P_GPIO[7:0] */
+	/* reg0x44[15:8]  output_value for P_GPIO[7:0] */
+	/* reg0x40[1:0] = 0  GPIO function */
+	/* ------------------------------------------ */
+
+	odm_move_memory(p_dm_odm, pdm_sat_table->rfu_codeword_table_2g, rfu_codeword_table_init_2g, (SUPPORT_BEAM_SET_PATTERN_NUM * MAX_PATH_NUM_8822B));
+	odm_move_memory(p_dm_odm, pdm_sat_table->rfu_codeword_table_5g, rfu_codeword_table_init_5g, (SUPPORT_BEAM_SET_PATTERN_NUM * MAX_PATH_NUM_8822B));
+
+	/*GPIO setting*/
+	odm_set_mac_reg(p_dm_odm, 0x64, (BIT(18) | BIT(17) | BIT(16)), 0);
+	odm_set_mac_reg(p_dm_odm, 0x44, BIT(25) | BIT24, 0);	/*config P_GPIO[3:2] to data port*/
+	odm_set_mac_reg(p_dm_odm, 0x44, BIT(17) | BIT16, 0x3);	/*enable_output for P_GPIO[3:2]*/
+	/*odm_set_mac_reg(p_dm_odm, 0x44, BIT(9)|BIT8, 0);*/ /*P_GPIO[3:2] output value*/
+	odm_set_mac_reg(p_dm_odm, 0x40, BIT(1) | BIT0, 0);		/*GPIO function*/
+
+	/*Hong_lin smart antenna HW setting*/
+	pdm_sat_table->rfu_protocol_type = 2;
+	pdm_sat_table->rfu_protocol_delay_time = 45;
+	
+	pdm_sat_table->rfu_codeword_total_bit_num  = 16;/*max=32bit*/
+	pdm_sat_table->rfu_each_ant_bit_num = 4;
+	
+	pdm_sat_table->total_beam_set_num = 4;
+	pdm_sat_table->total_beam_set_num_2g = 4;
+	pdm_sat_table->total_beam_set_num_5g = 8;
+
+#if DEV_BUS_TYPE == RT_SDIO_INTERFACE
+	pdm_sat_table->latch_time = 100; /*mu sec*/
+#elif DEV_BUS_TYPE == RT_USB_INTERFACE
+	pdm_sat_table->latch_time = 100; /*mu sec*/
+#endif
+	pdm_sat_table->pkt_skip_statistic_en = 0;
+
+	pdm_sat_table->ant_num = 2;
+	pdm_sat_table->ant_num_total = MAX_PATH_NUM_8822B;
+	pdm_sat_table->first_train_ant = MAIN_ANT;
+
+
+
+	pdm_sat_table->fix_beam_pattern_en  = 0;
+	pdm_sat_table->decision_holding_period = 0;
+
+	/*beam training setting*/
+	pdm_sat_table->pkt_counter = 0;
+	pdm_sat_table->per_beam_training_pkt_num = 10;
+
+	/*set default beam*/
+	pdm_sat_table->fast_training_beam_num = 0;
+	pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num;
+
+	for (j = 0; j < SUPPORT_BEAM_SET_PATTERN_NUM; j++) {
+		
+		pdm_sat_table->beam_set_avg_rssi_pre[j] = 0;
+		pdm_sat_table->beam_set_train_val_diff[j] = 0;
+		pdm_sat_table->beam_set_train_cnt[j] = 0;
+	}
+	phydm_set_rfu_beam_pattern_type2(p_dm_odm);
+	p_dm_fat_table->fat_state = FAT_BEFORE_LINK_STATE;
+	
+}
+#endif
+#endif
+
+
 #if (RTL8821C_SUPPORT == 1)
 void
 odm_trx_hw_ant_div_init_8821c(
@@ -1588,7 +1758,6 @@ odm_trx_hw_ant_div_init_8821c(
 	odm_set_mac_reg(p_dm_odm, 0x64, BIT(29), 1); /* PAPE by WLAN control */
 	odm_set_mac_reg(p_dm_odm, 0x64, BIT(28), 1); /* LNAON by WLAN control */
 
-	odm_set_bb_reg(p_dm_odm, 0xCB0, MASKDWORD, 0x77775745);
 	odm_set_bb_reg(p_dm_odm, 0xCB8, BIT(16), 0);
 
 	odm_set_mac_reg(p_dm_odm, 0x4C, BIT(23), 0); /* select DPDT_P and DPDT_N as output pin */
@@ -1727,10 +1896,17 @@ odm_s0s1_sw_ant_div_init_8188f(
 	/*GPIO setting*/
 	/*odm_set_mac_reg(p_dm_odm, 0x64, BIT18, 0); */
 	/*odm_set_mac_reg(p_dm_odm, 0x44, BIT28|BIT27, 0);*/
-	odm_set_mac_reg(p_dm_odm, 0x44, BIT(20) | BIT19, 0x3);	/*enable_output for P_GPIO[4:3]*/
+	/*odm_set_mac_reg(p_dm_odm, 0x44, BIT(20) | BIT19, 0x3);*/	/*enable_output for P_GPIO[4:3]*/
 	/*odm_set_mac_reg(p_dm_odm, 0x44, BIT(12)|BIT11, 0);*/ /*output value*/
 	/*odm_set_mac_reg(p_dm_odm, 0x40, BIT(1)|BIT0, 0);*/		/*GPIO function*/
 
+	 if (p_dm_odm->support_ic_type == ODM_RTL8188F) {
+		if (p_dm_odm->support_interface == ODM_ITRF_USB)
+			odm_set_mac_reg(p_dm_odm, 0x44, BIT(20) | BIT19, 0x3);	/*enable_output for P_GPIO[4:3]*/
+		else if (p_dm_odm->support_interface == ODM_ITRF_SDIO)
+			odm_set_mac_reg(p_dm_odm, 0x44, BIT(18), 0x1);	/*enable_output for P_GPIO[2]*/
+	}
+	
 	p_dm_fat_table->is_become_linked  = false;
 	p_dm_swat_table->try_flag = SWAW_STEP_INIT;
 	p_dm_swat_table->double_chk_flag = 0;
@@ -1745,19 +1921,57 @@ phydm_update_rx_idle_antenna_8188F(
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	u8		codeword;
 
-	if (default_ant == ANT1_2G)
-		codeword = 1; /*2'b01*/
-	else
-		codeword = 2;/*2'b10*/
-
-	odm_set_mac_reg(p_dm_odm, 0x44, (BIT(12) | BIT11), codeword); /*GPIO[4:3] output value*/
+	 if (p_dm_odm->support_ic_type == ODM_RTL8188F) {
+		if (p_dm_odm->support_interface == ODM_ITRF_USB) {
+			if (default_ant == ANT1_2G)
+				codeword = 1; /*2'b01*/
+			else
+				codeword = 2;/*2'b10*/
+			odm_set_mac_reg(p_dm_odm, 0x44, (BIT(12) | BIT11), codeword); /*GPIO[4:3] output value*/
+		} else if (p_dm_odm->support_interface == ODM_ITRF_SDIO) {
+			if (default_ant == ANT1_2G) {
+				codeword = 0; /*1'b0*/
+				odm_set_bb_reg(p_dm_odm, 0x870, BIT(9)|BIT8, 0x3);
+				odm_set_bb_reg(p_dm_odm, 0x860, BIT(9)|BIT8, 0x1);
+			} else {
+				codeword = 1;/*1'b1*/
+				odm_set_bb_reg(p_dm_odm, 0x870, BIT(9)|BIT8, 0x3);
+				odm_set_bb_reg(p_dm_odm, 0x860, BIT(9)|BIT8, 0x2);
+			}
+			odm_set_mac_reg(p_dm_odm, 0x44, BIT(10), codeword); /*GPIO[2] output value*/
+		}	
+	}
 }
-
 #endif
 
 
 
 #ifdef ODM_EVM_ENHANCE_ANTDIV
+void
+phydm_evm_sw_antdiv_init(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _FAST_ANTENNA_TRAINNING_	*p_dm_fat_table = &p_dm_odm->dm_fat_table;
+
+	/*EVM enhance AntDiv method init----------------------------------------------------------------------*/
+	p_dm_fat_table->EVM_method_enable = 0;
+	p_dm_fat_table->fat_state = NORMAL_STATE_MIAN;
+	p_dm_fat_table->fat_state_cnt = 0;
+	p_dm_fat_table->pre_antdiv_rssi = 0;
+
+	p_dm_odm->antdiv_intvl = 30;
+	p_dm_odm->antdiv_train_num = 2;
+	odm_set_bb_reg(p_dm_odm, 0x910, 0x3f, 0xf);
+	p_dm_odm->antdiv_evm_en = 1;
+	/*p_dm_odm->antdiv_period=1;*/
+	p_dm_odm->evm_antdiv_period = 3;
+	p_dm_odm->stop_antdiv_rssi_th = 3;
+	p_dm_odm->stop_antdiv_tp_th = 80;
+	p_dm_odm->antdiv_tp_period = 3;
+	p_dm_odm->stop_antdiv_tp_diff_th = 5;
+}
 
 void
 odm_evm_fast_ant_reset(
@@ -1770,6 +1984,7 @@ odm_evm_fast_ant_reset(
 	p_dm_fat_table->EVM_method_enable = 0;
 	odm_ant_div_on_off(p_dm_odm, ANTDIV_ON);
 	p_dm_fat_table->fat_state = NORMAL_STATE_MIAN;
+	p_dm_fat_table->fat_state_cnt = 0;
 	p_dm_odm->antdiv_period = 0;
 	odm_set_mac_reg(p_dm_odm, 0x608, BIT(8), 0);
 }
@@ -1784,20 +1999,31 @@ odm_evm_enhance_ant_div(
 	u32	main_rssi, aux_rssi ;
 	u32	main_crc_utility = 0, aux_crc_utility = 0, utility_ratio = 1;
 	u32	main_evm, aux_evm, diff_rssi = 0, diff_EVM = 0;
+	u32	main_2ss_evm[2], aux_2ss_evm[2];
+	u32	main_1ss_evm, aux_1ss_evm;
+	u32	main_2ss_evm_sum, aux_2ss_evm_sum;
 	u8	score_EVM = 0, score_CRC = 0;
 	u8	rssi_larger_ant = 0;
 	struct _FAST_ANTENNA_TRAINNING_	*p_dm_fat_table = &p_dm_odm->dm_fat_table;
 	u32	value32, i;
-	bool main_above1 = false, aux_above1 = false;
-	bool force_antenna = false;
+	boolean main_above1 = false, aux_above1 = false;
+	boolean force_antenna = false;
 	struct sta_info	*p_entry;
-	p_dm_fat_table->target_ant_enhance = 0xFF;
+	u32	antdiv_tp_main_avg, antdiv_tp_aux_avg;
+	u8	curr_rssi, rssi_diff;
+	u32	tp_diff;
+	u8	tp_diff_return = 0, tp_return = 0, rssi_return = 0;
+	u8	target_ant_evm_1ss, target_ant_evm_2ss;
+	u8	decision_evm_ss;
+	u8	next_ant;
 
+	p_dm_fat_table->target_ant_enhance = 0xFF;
 
 	if ((p_dm_odm->support_ic_type & ODM_EVM_ENHANCE_ANTDIV_SUPPORT_IC)) {
 		if (p_dm_odm->is_one_entry_only) {
 			/* ODM_RT_TRACE(p_dm_odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[One Client only]\n")); */
 			i = p_dm_odm->one_entry_macid;
+			p_entry = p_dm_odm->p_odm_sta_info[i];
 
 			main_rssi = (p_dm_fat_table->main_ant_cnt[i] != 0) ? (p_dm_fat_table->main_ant_sum[i] / p_dm_fat_table->main_ant_cnt[i]) : 0;
 			aux_rssi = (p_dm_fat_table->aux_ant_cnt[i] != 0) ? (p_dm_fat_table->aux_ant_sum[i] / p_dm_fat_table->aux_ant_cnt[i]) : 0;
@@ -1812,67 +2038,117 @@ odm_evm_enhance_ant_div(
 			else
 				rssi_larger_ant = AUX_ANT;
 
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" Main_Cnt = (( %d ))  , main_rssi= ((  %d ))\n", p_dm_fat_table->main_ant_cnt[i], main_rssi));
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" Aux_Cnt   = (( %d ))  , aux_rssi = ((  %d ))\n", p_dm_fat_table->aux_ant_cnt[i], aux_rssi));
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Main_Cnt=(( %d )), main_rssi=(( %d ))\n", p_dm_fat_table->main_ant_cnt[i], main_rssi));
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Aux_Cnt=(( %d )), aux_rssi=(( %d ))\n", p_dm_fat_table->aux_ant_cnt[i], aux_rssi));
 
 			if (((main_rssi >= evm_rssi_th_high || aux_rssi >= evm_rssi_th_high) || (p_dm_fat_table->EVM_method_enable == 1))
-			    /* && (diff_rssi <= FORCE_RSSI_DIFF + 1) */
-			   ) {
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[> TH_H || EVM_method_enable==1]  && "));
+			/* && (diff_rssi <= FORCE_RSSI_DIFF + 1) */
+			) {
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("> TH_H || EVM_method_enable==1\n"));
 
 				if (((main_rssi >= evm_rssi_th_low) || (aux_rssi >= evm_rssi_th_low))) {
-					ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[> TH_L ]\n"));
+					ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("> TH_L, fat_state_cnt =((%d))\n", p_dm_fat_table->fat_state_cnt));
+
+					/*Traning state: 0(alt) 1(ori) 2(alt) 3(ori)============================================================*/
+					if (p_dm_fat_table->fat_state_cnt < ((p_dm_odm->antdiv_train_num)<<1)) {
+
+						if (p_dm_fat_table->fat_state_cnt == 0) {
+							/*Reset EVM 1SS Method */
+							p_dm_fat_table->main_ant_evm_sum[i] = 0;
+							p_dm_fat_table->aux_ant_evm_sum[i] = 0;
+							p_dm_fat_table->main_ant_evm_cnt[i] = 0;
+							p_dm_fat_table->aux_ant_evm_cnt[i] = 0;
+							/*Reset EVM 2SS Method */
+							p_dm_fat_table->main_ant_evm_2ss_sum[i][0] = 0;
+							p_dm_fat_table->main_ant_evm_2ss_sum[i][1] = 0;
+							p_dm_fat_table->aux_ant_evm_2ss_sum[i][0] = 0;
+							p_dm_fat_table->aux_ant_evm_2ss_sum[i][1] = 0;
+							p_dm_fat_table->main_ant_evm_2ss_cnt[i] = 0;
+							p_dm_fat_table->aux_ant_evm_2ss_cnt[i] = 0;
+							#if 0
+							/*Reset TP Method */
+							p_dm_fat_table->antdiv_tp_main = 0;
+							p_dm_fat_table->antdiv_tp_aux = 0;
+							p_dm_fat_table->antdiv_tp_main_cnt = 0;
+							p_dm_fat_table->antdiv_tp_aux_cnt = 0;
+							#endif
+							/*Reset CRC Method */
+							p_dm_fat_table->main_crc32_ok_cnt = 0;
+							p_dm_fat_table->main_crc32_fail_cnt = 0;
+							p_dm_fat_table->aux_crc32_ok_cnt = 0;
+							p_dm_fat_table->aux_crc32_fail_cnt = 0;
+
+							#if SKIP_EVM_ANTDIV_TRAINING_PATCH
+							if ((*p_dm_odm->p_band_width == ODM_BW20M) && (p_entry->rf_mimo_mode == MIMO_2T2R)) {
+								/*1. Skip training: RSSI*/
+								//ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TargetAnt_enhance=((%d)), RxIdleAnt=((%d))\n", pDM_FatTable->TargetAnt_enhance, pDM_FatTable->RxIdleAnt));
+								curr_rssi = (u8)((p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? main_rssi : aux_rssi);
+								rssi_diff = (curr_rssi > p_dm_fat_table->pre_antdiv_rssi) ? (curr_rssi - p_dm_fat_table->pre_antdiv_rssi) : (p_dm_fat_table->pre_antdiv_rssi - curr_rssi);
+
+								ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[1] rssi_return, curr_rssi=((%d)), pre_rssi=((%d))\n", curr_rssi, p_dm_fat_table->pre_antdiv_rssi));
+
+								p_dm_fat_table->pre_antdiv_rssi = curr_rssi;
+								if ((rssi_diff < (p_dm_odm->stop_antdiv_rssi_th)) && (curr_rssi != 0))
+									rssi_return = 1;
+
+								/*2. Skip training: TP Diff*/
+								tp_diff = (p_dm_odm->rx_tp > p_dm_fat_table->pre_antdiv_tp) ? (p_dm_odm->rx_tp  - p_dm_fat_table->pre_antdiv_tp) : (p_dm_fat_table->pre_antdiv_tp - p_dm_odm->rx_tp);
+
+								ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[2] tp_diff_return, curr_tp=((%d)), pre_tp=((%d))\n", p_dm_odm->rx_tp, p_dm_fat_table->pre_antdiv_tp));
+								p_dm_fat_table->pre_antdiv_tp = p_dm_odm->rx_tp;
+								if ((tp_diff < (u32)(p_dm_odm->stop_antdiv_tp_diff_th)  && (p_dm_odm->rx_tp != 0)))
+									tp_diff_return = 1;
+
+								ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[3] tp_return, curr_rx_tp=((%d))\n", p_dm_odm->rx_tp));
+								/*3. Skip training: TP*/
+								if (p_dm_odm->rx_tp >= (u32)(p_dm_odm->stop_antdiv_tp_th))
+									tp_return = 1;
+
+								ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[4] Return {rssi, tp_diff, tp} = {%d, %d, %d}\n", rssi_return, tp_diff_return, tp_return));
+								/*4. Joint Return Decision*/
+								if (tp_return) {
+									if (tp_diff_return || rssi_diff) {
+
+										ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***Return EVM SW AntDiv\n"));
+										return;
+									}
+								}
+							}
+							#endif
 
-					/* 2 [ Normal state Main] */
-					if (p_dm_fat_table->fat_state == NORMAL_STATE_MIAN) {
+							p_dm_fat_table->EVM_method_enable = 1;
+							odm_ant_div_on_off(p_dm_odm, ANTDIV_OFF);
+							p_dm_odm->antdiv_period = p_dm_odm->evm_antdiv_period;
+							odm_set_mac_reg(p_dm_odm, 0x608, BIT8, 1); /*RCR accepts CRC32-Error packets*/
 
-						p_dm_fat_table->EVM_method_enable = 1;
-						odm_ant_div_on_off(p_dm_odm, ANTDIV_OFF);
-						p_dm_odm->antdiv_period = p_dm_odm->evm_antdiv_period;
+						}
 
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ start training: MIAN]\n"));
-						p_dm_fat_table->main_ant_evm_sum[i] = 0;
-						p_dm_fat_table->aux_ant_evm_sum[i] = 0;
-						p_dm_fat_table->main_ant_evm_cnt[i] = 0;
-						p_dm_fat_table->aux_ant_evm_cnt[i] = 0;
 
-						p_dm_fat_table->fat_state = NORMAL_STATE_AUX;
-						odm_set_mac_reg(p_dm_odm, 0x608, BIT(8), 1); /* Accept CRC32 Error packets. */
-						odm_update_rx_idle_ant(p_dm_odm, MAIN_ANT);
+					p_dm_fat_table->fat_state_cnt++;
+					next_ant = (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? AUX_ANT : MAIN_ANT;
+					odm_update_rx_idle_ant(p_dm_odm, next_ant);
+					odm_set_timer(p_dm_odm, &p_dm_odm->evm_fast_ant_training_timer, p_dm_odm->antdiv_intvl); //ms
 
-						p_dm_fat_table->crc32_ok_cnt = 0;
-						p_dm_fat_table->crc32_fail_cnt = 0;
-						odm_set_timer(p_dm_odm, &p_dm_odm->evm_fast_ant_training_timer, p_dm_odm->antdiv_intvl); /* m */
 					}
-					/* 2 [ Normal state Aux ] */
-					else if (p_dm_fat_table->fat_state == NORMAL_STATE_AUX) {
-						p_dm_fat_table->main_crc32_ok_cnt = p_dm_fat_table->crc32_ok_cnt;
-						p_dm_fat_table->main_crc32_fail_cnt = p_dm_fat_table->crc32_fail_cnt;
-
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ start training: AUX]\n"));
-						p_dm_fat_table->fat_state = TRAINING_STATE;
-						odm_update_rx_idle_ant(p_dm_odm, AUX_ANT);
-
-						p_dm_fat_table->crc32_ok_cnt = 0;
-						p_dm_fat_table->crc32_fail_cnt = 0;
-						odm_set_timer(p_dm_odm, &p_dm_odm->evm_fast_ant_training_timer, p_dm_odm->antdiv_intvl); /* ms */
-					} else if (p_dm_fat_table->fat_state == TRAINING_STATE) {
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Training state ]\n"));
-						p_dm_fat_table->fat_state = NORMAL_STATE_MIAN;
+					/*Decision state: 4==============================================================*/
+					else {
 
-						/* 3 [CRC32 statistic] */
-						p_dm_fat_table->aux_crc32_ok_cnt = p_dm_fat_table->crc32_ok_cnt;
-						p_dm_fat_table->aux_crc32_fail_cnt = p_dm_fat_table->crc32_fail_cnt;
+						p_dm_fat_table->fat_state_cnt = 0;
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Decisoin state ]\n"));
 
-						if ((p_dm_fat_table->main_crc32_ok_cnt > ((p_dm_fat_table->aux_crc32_ok_cnt) << 1)) || ((diff_rssi >= 20) && (rssi_larger_ant == MAIN_ANT))) {
+						/* 3 [CRC32 statistic] */
+						#if 0
+						if ((p_dm_fat_table->main_crc32_ok_cnt > ((p_dm_fat_table->aux_crc32_ok_cnt) << 1)) || ((diff_rssi >= 40) && (rssi_larger_ant == MAIN_ANT))) {
 							p_dm_fat_table->target_ant_crc32 = MAIN_ANT;
 							force_antenna = true;
 							ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("CRC32 Force Main\n"));
-						} else if ((p_dm_fat_table->aux_crc32_ok_cnt > ((p_dm_fat_table->main_crc32_ok_cnt) << 1)) || ((diff_rssi >= 20) && (rssi_larger_ant == AUX_ANT))) {
+						} else if ((p_dm_fat_table->aux_crc32_ok_cnt > ((p_dm_fat_table->main_crc32_ok_cnt) << 1)) || ((diff_rssi >= 40) && (rssi_larger_ant == AUX_ANT))) {
 							p_dm_fat_table->target_ant_crc32 = AUX_ANT;
 							force_antenna = true;
 							ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("CRC32 Force Aux\n"));
-						} else {
+						} else
+						#endif
+						{
 							if (p_dm_fat_table->main_crc32_fail_cnt <= 5)
 								p_dm_fat_table->main_crc32_fail_cnt = 5;
 
@@ -1921,19 +2197,72 @@ odm_evm_enhance_ant_div(
 							}
 						}
 						odm_set_mac_reg(p_dm_odm, 0x608, BIT(8), 0);/* NOT Accept CRC32 Error packets. */
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MAIN_CRC: Ok=((%d)), Fail = ((%d)), Utility = ((%d))\n", p_dm_fat_table->main_crc32_ok_cnt, p_dm_fat_table->main_crc32_fail_cnt, main_crc_utility));
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("AUX__CRC: Ok=((%d)), Fail = ((%d)), Utility = ((%d))\n", p_dm_fat_table->aux_crc32_ok_cnt, p_dm_fat_table->aux_crc32_fail_cnt, aux_crc_utility));
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***1.TargetAnt_CRC32 = ((%s))\n", (p_dm_fat_table->target_ant_crc32 == MAIN_ANT)?"MAIN_ANT":"AUX_ANT"));
 
 						/* 3 [EVM statistic] */
-						main_evm = (p_dm_fat_table->main_ant_evm_cnt[i] != 0) ? (p_dm_fat_table->main_ant_evm_sum[i] / p_dm_fat_table->main_ant_evm_cnt[i]) : 0;
-						aux_evm = (p_dm_fat_table->aux_ant_evm_cnt[i] != 0) ? (p_dm_fat_table->aux_ant_evm_sum[i] / p_dm_fat_table->aux_ant_evm_cnt[i]) : 0;
-						p_dm_fat_table->target_ant_evm = (main_evm == aux_evm) ? (p_dm_fat_table->pre_target_ant_enhance) : ((main_evm >= aux_evm) ? MAIN_ANT : AUX_ANT);
+						/*1SS EVM*/
+						main_1ss_evm = (p_dm_fat_table->main_ant_evm_cnt[i] != 0) ? (p_dm_fat_table->main_ant_evm_sum[i] / p_dm_fat_table->main_ant_evm_cnt[i]) : 0;
+						aux_1ss_evm = (p_dm_fat_table->aux_ant_evm_cnt[i] != 0) ? (p_dm_fat_table->aux_ant_evm_sum[i] / p_dm_fat_table->aux_ant_evm_cnt[i]) : 0;
+						target_ant_evm_1ss = (main_1ss_evm == aux_1ss_evm) ? (p_dm_fat_table->pre_target_ant_enhance) : ((main_1ss_evm >= aux_1ss_evm) ? MAIN_ANT : AUX_ANT);
+
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Cnt = ((%d)), Main1ss_EVM= ((  %d ))\n", p_dm_fat_table->main_ant_evm_cnt[i], main_1ss_evm));
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Cnt = ((%d)), Aux_1ss_EVM = ((  %d ))\n", p_dm_fat_table->main_ant_evm_cnt[i], aux_1ss_evm));
+
+						/*2SS EVM*/
+						main_2ss_evm[0] = (p_dm_fat_table->main_ant_evm_2ss_cnt[i] != 0) ? (p_dm_fat_table->main_ant_evm_2ss_sum[i][0] / p_dm_fat_table->main_ant_evm_2ss_cnt[i]) : 0;
+						main_2ss_evm[1] = (p_dm_fat_table->main_ant_evm_2ss_cnt[i] != 0) ? (p_dm_fat_table->main_ant_evm_2ss_sum[i][1] / p_dm_fat_table->main_ant_evm_2ss_cnt[i]) : 0;
+						main_2ss_evm_sum = main_2ss_evm[0] + main_2ss_evm[1];
+
+						aux_2ss_evm[0] = (p_dm_fat_table->aux_ant_evm_2ss_cnt[i] != 0) ? (p_dm_fat_table->aux_ant_evm_2ss_sum[i][0] / p_dm_fat_table->aux_ant_evm_2ss_cnt[i]) : 0;
+						aux_2ss_evm[1] = (p_dm_fat_table->aux_ant_evm_2ss_cnt[i] != 0) ? (p_dm_fat_table->aux_ant_evm_2ss_sum[i][1] / p_dm_fat_table->aux_ant_evm_2ss_cnt[i]) : 0;
+						aux_2ss_evm_sum = aux_2ss_evm[0] + aux_2ss_evm[1];
+
+						target_ant_evm_2ss = (main_2ss_evm_sum == aux_2ss_evm_sum) ? (p_dm_fat_table->pre_target_ant_enhance) : ((main_2ss_evm_sum >= aux_2ss_evm_sum) ? MAIN_ANT : AUX_ANT);
+
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Cnt = ((%d)), Main2ss_EVM{A,B,Sum} = {%d, %d, %d}\n",
+							p_dm_fat_table->main_ant_evm_2ss_cnt[i], main_2ss_evm[0], main_2ss_evm[1], main_2ss_evm_sum));
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Cnt = ((%d)), Aux_2ss_EVM{A,B,Sum} = {%d, %d, %d}\n",
+							p_dm_fat_table->aux_ant_evm_2ss_cnt[i], aux_2ss_evm[0], aux_2ss_evm[1], aux_2ss_evm_sum));
+
+						if ((main_2ss_evm_sum + aux_2ss_evm_sum) != 0) {
+							decision_evm_ss = 2;
+							main_evm = main_2ss_evm_sum;
+							aux_evm = aux_2ss_evm_sum;
+							p_dm_fat_table->target_ant_evm = target_ant_evm_2ss;
+						} else {
+							decision_evm_ss = 1;
+							main_evm = main_1ss_evm;
+							aux_evm = aux_1ss_evm;
+							p_dm_fat_table->target_ant_evm = target_ant_evm_1ss;
+						}
 
 						if ((main_evm == 0 || aux_evm == 0))
-							diff_EVM = 0;
+							diff_EVM = 100;
 						else if (main_evm >= aux_evm)
 							diff_EVM = main_evm - aux_evm;
 						else
 							diff_EVM = aux_evm - main_evm;
 
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***2.TargetAnt_EVM((%d-ss)) = ((%s))\n", decision_evm_ss, (p_dm_fat_table->target_ant_evm == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
+
+
+						//3 [TP statistic]
+						antdiv_tp_main_avg = (p_dm_fat_table->antdiv_tp_main_cnt != 0) ? (p_dm_fat_table->antdiv_tp_main / p_dm_fat_table->antdiv_tp_main_cnt) : 0;
+						antdiv_tp_aux_avg = (p_dm_fat_table->antdiv_tp_aux_cnt != 0) ? (p_dm_fat_table->antdiv_tp_aux / p_dm_fat_table->antdiv_tp_aux_cnt) : 0;
+						p_dm_fat_table->target_ant_tp = (antdiv_tp_main_avg == antdiv_tp_aux_avg) ? (p_dm_fat_table->pre_target_ant_enhance) : ((antdiv_tp_main_avg >= antdiv_tp_aux_avg) ? MAIN_ANT : AUX_ANT);
+
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Cnt = ((%d)), Main_TP = ((%d))\n", p_dm_fat_table->antdiv_tp_main_cnt, antdiv_tp_main_avg));
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Cnt = ((%d)), Aux_TP = ((%d))\n", p_dm_fat_table->antdiv_tp_aux_cnt, antdiv_tp_aux_avg));
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***3.TargetAnt_TP = ((%s))\n", (p_dm_fat_table->target_ant_tp == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
+
+						/*Reset TP Method */
+						p_dm_fat_table->antdiv_tp_main = 0;
+						p_dm_fat_table->antdiv_tp_aux = 0;
+						p_dm_fat_table->antdiv_tp_main_cnt = 0;
+						p_dm_fat_table->antdiv_tp_aux_cnt = 0;
+
 						/* 2 [ Decision state ] */
 						if (p_dm_fat_table->target_ant_evm == p_dm_fat_table->target_ant_crc32) {
 							ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Decision type 1, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM));
@@ -1942,31 +2271,36 @@ odm_evm_enhance_ant_div(
 								p_dm_fat_table->target_ant_enhance = p_dm_fat_table->pre_target_ant_enhance;
 							else
 								p_dm_fat_table->target_ant_enhance = p_dm_fat_table->target_ant_evm;
-						} else if ((diff_EVM <= 50 && (utility_ratio > 4 && force_antenna == false)) || (force_antenna == true)) {
+						}
+						#if 0
+						else if ((diff_EVM <= 50 && (utility_ratio > 4 && force_antenna == false)) || (force_antenna == true)) {
 							ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Decision type 2, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM));
 							p_dm_fat_table->target_ant_enhance = p_dm_fat_table->target_ant_crc32;
-						} else if (diff_EVM >= 100) {
+						}
+						#endif
+						else if (diff_EVM >= 20) {
 							ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Decision type 3, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM));
 							p_dm_fat_table->target_ant_enhance = p_dm_fat_table->target_ant_evm;
 						} else if (utility_ratio >= 6 && force_antenna == false) {
 							ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Decision type 4, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM));
 							p_dm_fat_table->target_ant_enhance = p_dm_fat_table->target_ant_crc32;
 						} else {
-
 							ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Decision type 5, CRC_utility = ((%d)), EVM_diff = ((%d))\n", utility_ratio, diff_EVM));
 
 							if (force_antenna == true)
-								score_CRC = 3;
-							else if (utility_ratio >= 3) /*>0.5*/
 								score_CRC = 2;
-							else if (utility_ratio >= 2) /*>1*/
+							else if (utility_ratio >= 5) /*>2.5*/
+								score_CRC = 2;
+							else if (utility_ratio >= 4) /*>2*/
 								score_CRC = 1;
 							else
 								score_CRC = 0;
 
-							if (diff_EVM >= 100)
+							if (diff_EVM >= 15)
+								score_EVM = 3;
+							else if (diff_EVM >= 10)
 								score_EVM = 2;
-							else if (diff_EVM  >= 50)
+							else if (diff_EVM >= 5)
 								score_EVM = 1;
 							else
 								score_EVM = 0;
@@ -1980,13 +2314,7 @@ odm_evm_enhance_ant_div(
 						}
 						p_dm_fat_table->pre_target_ant_enhance = p_dm_fat_table->target_ant_enhance;
 
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : MainEVM_Cnt = (( %d ))  , main_evm= ((  %d ))\n", i, p_dm_fat_table->main_ant_evm_cnt[i], main_evm));
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** Client[ %d ] : AuxEVM_Cnt   = (( %d ))  , aux_evm = ((  %d ))\n", i, p_dm_fat_table->aux_ant_evm_cnt[i], aux_evm));
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** target_ant_evm = (( %s ))\n", (p_dm_fat_table->target_ant_evm  == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("M_CRC_Ok = (( %d ))  , M_CRC_Fail = ((  %d )), main_crc_utility = (( %d ))\n", p_dm_fat_table->main_crc32_ok_cnt, p_dm_fat_table->main_crc32_fail_cnt, main_crc_utility));
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("A_CRC_Ok  = (( %d ))  , A_CRC_Fail = ((  %d )), aux_crc_utility   = ((  %d ))\n", p_dm_fat_table->aux_crc32_ok_cnt, p_dm_fat_table->aux_crc32_fail_cnt, aux_crc_utility));
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** target_ant_crc32 = (( %s ))\n", (p_dm_fat_table->target_ant_crc32 == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
-						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("****** target_ant_enhance = (( %s ))******\n", (p_dm_fat_table->target_ant_enhance == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
+						ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** 4.TargetAnt_enhance = (( %s ))******\n", (p_dm_fat_table->target_ant_enhance == MAIN_ANT)?"MAIN_ANT":"AUX_ANT"));
 
 
 					}
@@ -2011,7 +2339,7 @@ odm_evm_fast_ant_training_callback(
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("******odm_evm_fast_ant_training_callback******\n"));
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("******AntDiv_Callback******\n"));
 	odm_hw_ant_div(p_dm_odm);
 }
 #endif
@@ -2106,7 +2434,7 @@ odm_hw_ant_div(
 #ifdef ODM_EVM_ENHANCE_ANTDIV
 	if (p_dm_odm->antdiv_evm_en == 1) {
 		odm_evm_enhance_ant_div(p_dm_odm);
-		if (p_dm_fat_table->fat_state != NORMAL_STATE_MIAN)
+		if (p_dm_fat_table->fat_state_cnt != 0)
 			return;
 	} else
 		odm_evm_fast_ant_reset(p_dm_odm);
@@ -2241,12 +2569,7 @@ odm_hw_ant_div(
 #endif
 #endif
 		{
-			p_dm_fat_table->main_ant_sum[i] = 0;
-			p_dm_fat_table->aux_ant_sum[i] = 0;
-			p_dm_fat_table->main_ant_cnt[i] = 0;
-			p_dm_fat_table->aux_ant_cnt[i] = 0;
-			p_dm_fat_table->main_ant_cnt_cck[i] = 0;
-			p_dm_fat_table->aux_ant_cnt_cck[i] = 0;
+			phydm_antdiv_reset_statistic(p_dm_odm, i);
 		}
 	}
 
@@ -2254,7 +2577,7 @@ odm_hw_ant_div(
 
 	/* 2 Set RX Idle Antenna & TX Antenna(Because of HW Bug ) */
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** rx_idle_ant = (( %s ))\n\n", (rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** rx_idle_ant = (( %s ))\n", (rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
 
 #if (BEAMFORMING_SUPPORT == 1)
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
@@ -2295,6 +2618,7 @@ odm_hw_ant_div(
 		p_dm_dig_table->ant_div_rssi_max = ant_div_max_rssi;
 
 	p_dm_dig_table->RSSI_max = max_rssi;
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***AntDiv End***\n\n"));
 }
 
 
@@ -2333,6 +2657,10 @@ odm_s0s1_sw_ant_div(
 	u8			rx_idle_ant = p_dm_swat_table->pre_antenna, target_ant, next_ant = 0;
 	struct sta_info		*p_entry = NULL;
 	u32			value32;
+	u32			main_ant_sum;
+	u32			aux_ant_sum;
+	u32			main_ant_cnt;
+	u32			aux_ant_cnt;
 
 
 	if (!p_dm_odm->is_linked) { /* is_linked==False */
@@ -2419,7 +2747,11 @@ odm_s0s1_sw_ant_div(
 					train_time_temp += 8;
 					high_traffic_train_time_l = 0x28;
 				}
-
+				
+				if (p_dm_odm->support_ic_type == ODM_RTL8188F) {
+					if (p_dm_odm->support_interface == ODM_ITRF_SDIO)
+						high_traffic_train_time_l += 0xa;
+				}
 
 				/* ODM_RT_TRACE(p_dm_odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** train_time_temp = ((%d))\n",train_time_temp)); */
 
@@ -2456,6 +2788,11 @@ odm_s0s1_sw_ant_div(
 					low_traffic_train_time_l = 50;
 				}
 
+				if (p_dm_odm->support_ic_type == ODM_RTL8188F) {
+					if (p_dm_odm->support_interface == ODM_ITRF_SDIO)
+						low_traffic_train_time_l += 10;
+				}
+
 				/* -- */
 				if (train_time_temp >= low_traffic_train_time_u)
 					train_time_temp = low_traffic_train_time_u;
@@ -2522,30 +2859,36 @@ odm_s0s1_sw_ant_div(
 		/* 1 Decision state */
 		if ((p_dm_swat_table->try_flag == SWAW_STEP_DETERMINE) && (p_dm_swat_table->rssi_trying == 0)) {
 
-			bool is_by_ctrl_frame = false;
+			boolean is_by_ctrl_frame = false;
 			u64	pkt_cnt_total = 0;
 
 			for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
 				p_entry = p_dm_odm->p_odm_sta_info[i];
 				if (IS_STA_VALID(p_entry)) {
 					/* 2 Caculate RSSI per Antenna */
-					main_rssi = (p_dm_fat_table->main_ant_cnt[i] != 0) ? (p_dm_fat_table->main_ant_sum[i] / p_dm_fat_table->main_ant_cnt[i]) : 0;
-					aux_rssi = (p_dm_fat_table->aux_ant_cnt[i] != 0) ? (p_dm_fat_table->aux_ant_sum[i] / p_dm_fat_table->aux_ant_cnt[i]) : 0;
 
-					if (p_dm_fat_table->main_ant_cnt[i] <= 1 && p_dm_fat_table->CCK_counter_main >= 1)
+					main_ant_sum = (u32)p_dm_fat_table->main_ant_sum[i] + (u32)p_dm_fat_table->main_ant_sum_cck[i];
+					aux_ant_sum = (u32)p_dm_fat_table->aux_ant_sum[i] + (u32)p_dm_fat_table->aux_ant_sum_cck[i];
+					main_ant_cnt = (u32)p_dm_fat_table->main_ant_cnt[i] + (u32)p_dm_fat_table->main_ant_cnt_cck[i];
+					aux_ant_cnt = (u32)p_dm_fat_table->aux_ant_cnt[i] + (u32)p_dm_fat_table->aux_ant_cnt_cck[i];
+
+					main_rssi = (main_ant_cnt != 0) ? (main_ant_sum / main_ant_cnt) : 0;
+					aux_rssi = (aux_ant_cnt != 0) ? (aux_ant_sum / aux_ant_cnt) : 0;
+
+					if (p_dm_fat_table->main_ant_cnt[i] <= 1 && p_dm_fat_table->main_ant_cnt_cck[i] >= 1)
 						main_rssi = 0;
 
-					if (p_dm_fat_table->aux_ant_cnt[i] <= 1 && p_dm_fat_table->CCK_counter_aux >= 1)
+					if (p_dm_fat_table->aux_ant_cnt[i] <= 1 && p_dm_fat_table->aux_ant_cnt_cck[i] >= 1)
 						aux_rssi = 0;
 
 					target_ant = (main_rssi == aux_rssi) ? p_dm_swat_table->pre_antenna : ((main_rssi >= aux_rssi) ? MAIN_ANT : AUX_ANT);
 					local_max_rssi = (main_rssi >= aux_rssi) ? main_rssi : aux_rssi;
 					local_min_rssi = (main_rssi >= aux_rssi) ? aux_rssi : main_rssi;
 
-					ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***  CCK_counter_main = (( %d ))  , CCK_counter_aux= ((  %d ))\n", p_dm_fat_table->CCK_counter_main, p_dm_fat_table->CCK_counter_aux));
-					ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***  OFDM_counter_main = (( %d ))  , OFDM_counter_aux= ((  %d ))\n", p_dm_fat_table->OFDM_counter_main, p_dm_fat_table->OFDM_counter_aux));
-					ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***  Main_Cnt = (( %d ))  , main_rssi= ((  %d ))\n", p_dm_fat_table->main_ant_cnt[i], main_rssi));
-					ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***  Aux_Cnt   = (( %d ))  , aux_rssi = ((  %d ))\n", p_dm_fat_table->aux_ant_cnt[i], aux_rssi));
+					ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***  CCK_counter_main = (( %d ))  , CCK_counter_aux= ((  %d ))\n", p_dm_fat_table->main_ant_cnt_cck[i], p_dm_fat_table->aux_ant_cnt_cck[i]));
+					ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***  OFDM_counter_main = (( %d ))  , OFDM_counter_aux= ((  %d ))\n", p_dm_fat_table->main_ant_cnt[i], p_dm_fat_table->aux_ant_cnt[i]));
+					ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***  Main_Cnt = (( %d ))  , main_rssi= ((  %d ))\n", main_ant_cnt, main_rssi));
+					ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***  Aux_Cnt   = (( %d ))  , aux_rssi = ((  %d ))\n", aux_ant_cnt, aux_rssi));
 					ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** MAC ID:[ %d ] , target_ant = (( %s ))\n", i, (target_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
 
 					/* 2 Select RX Idle Antenna */
@@ -2580,10 +2923,8 @@ odm_s0s1_sw_ant_div(
 						p_dm_fat_table->antsel_a[i] = ANT2_2G;
 
 				}
-				p_dm_fat_table->main_ant_sum[i] = 0;
-				p_dm_fat_table->aux_ant_sum[i] = 0;
-				p_dm_fat_table->main_ant_cnt[i] = 0;
-				p_dm_fat_table->aux_ant_cnt[i] = 0;
+				phydm_antdiv_reset_statistic(p_dm_odm, i);
+				pkt_cnt_total += (main_ant_cnt + aux_ant_cnt);
 			}
 
 			if (p_dm_swat_table->is_sw_ant_div_by_ctrl_frame) {
@@ -2591,12 +2932,6 @@ odm_s0s1_sw_ant_div(
 				is_by_ctrl_frame = true;
 			}
 
-			pkt_cnt_total = p_dm_fat_table->CCK_counter_main + p_dm_fat_table->CCK_counter_aux +
-				p_dm_fat_table->OFDM_counter_main + p_dm_fat_table->OFDM_counter_aux;
-			p_dm_fat_table->CCK_counter_main = 0;
-			p_dm_fat_table->CCK_counter_aux = 0;
-			p_dm_fat_table->OFDM_counter_main = 0;
-			p_dm_fat_table->OFDM_counter_aux = 0;
 			ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Control frame packet counter = %d, data frame packet counter = %llu\n",
 				p_dm_swat_table->pkt_cnt_sw_ant_div_by_ctrl_frame, pkt_cnt_total));
 
@@ -2685,6 +3020,25 @@ odm_s0s1_sw_ant_div(
 
 	p_dm_fat_table->rx_idle_ant  = next_ant;
 
+	if (p_dm_odm->support_ic_type == ODM_RTL8188F) {
+		if (p_dm_odm->support_interface == ODM_ITRF_SDIO) {
+
+			ODM_delay_us(200);
+			
+			if (p_dm_fat_table->rx_idle_ant == MAIN_ANT) {
+				p_dm_fat_table->main_ant_sum[0] = 0;
+				p_dm_fat_table->main_ant_cnt[0] = 0;
+				p_dm_fat_table->main_ant_sum_cck[0] = 0;
+				p_dm_fat_table->main_ant_cnt_cck[0] = 0;	
+			} else {
+				p_dm_fat_table->aux_ant_sum[0] = 0;
+				p_dm_fat_table->aux_ant_cnt[0] = 0;
+				p_dm_fat_table->aux_ant_sum_cck[0] = 0;
+				p_dm_fat_table->aux_ant_cnt_cck[0] = 0;	
+			}	
+		}	
+	}
+
 	/* 1 6.Set next timer   (Trying state) */
 
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" Test ((%s)) ant for (( %d )) ms\n", (next_ant == MAIN_ANT ? "MAIN" : "AUX"), p_dm_swat_table->train_time));
@@ -2698,9 +3052,9 @@ odm_sw_antdiv_callback(
 	struct timer_list		*p_timer
 )
 {
-	struct _ADAPTER		*adapter = (struct _ADAPTER *)p_timer->adapter;
+	struct _ADAPTER		*adapter = (struct _ADAPTER *)p_timer->Adapter;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	struct _sw_antenna_switch_			*p_dm_swat_table = &p_hal_data->dm_out_src.dm_swat_table;
+	struct _sw_antenna_switch_			*p_dm_swat_table = &p_hal_data->DM_OutSrc.dm_swat_table;
 
 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
 #if USE_WORKITEM
@@ -2708,7 +3062,7 @@ odm_sw_antdiv_callback(
 #else
 	{
 		/* dbg_print("SW_antdiv_Callback"); */
-		odm_s0s1_sw_ant_div(&p_hal_data->dm_out_src, SWAW_STEP_DETERMINE);
+		odm_s0s1_sw_ant_div(&p_hal_data->DM_OutSrc, SWAW_STEP_DETERMINE);
 	}
 #endif
 #else
@@ -2724,7 +3078,7 @@ odm_sw_antdiv_workitem_callback(
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
 
 	/* dbg_print("SW_antdiv_Workitem_Callback"); */
-	odm_s0s1_sw_ant_div(&p_hal_data->dm_out_src, SWAW_STEP_DETERMINE);
+	odm_s0s1_sw_ant_div(&p_hal_data->DM_OutSrc, SWAW_STEP_DETERMINE);
 }
 
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
@@ -2829,7 +3183,7 @@ odm_s0s1_sw_ant_div_by_ctrl_frame_process_rssi(
 	struct _odm_per_pkt_info_	*p_pktinfo = (struct _odm_per_pkt_info_ *)p_pkt_info_void;
 	struct _sw_antenna_switch_	*p_dm_swat_table = &p_dm_odm->dm_swat_table;
 	struct _FAST_ANTENNA_TRAINNING_		*p_dm_fat_table = &p_dm_odm->dm_fat_table;
-	bool		is_cck_rate;
+	boolean		is_cck_rate;
 
 	if (!(p_dm_odm->support_ability & ODM_BB_ANT_DIV))
 		return;
@@ -2858,6 +3212,8 @@ odm_s0s1_sw_ant_div_by_ctrl_frame_process_rssi(
 
 		odm_antsel_statistics_of_ctrl_frame(p_dm_odm, p_dm_fat_table->antsel_rx_keep_0, p_phy_info->rx_mimo_signal_strength[ODM_RF_PATH_A]);
 	} else {
+		p_dm_fat_table->antsel_rx_keep_0 = (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? ANT1_2G : ANT2_2G;
+		
 		if (p_dm_fat_table->antsel_rx_keep_0 == ANT1_2G)
 			p_dm_fat_table->ofdm_ctrl_frame_cnt_main++;
 		else
@@ -2900,7 +3256,7 @@ odm_set_next_mac_addr_target(
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP | ODM_CE))
 				value32 = (p_entry->hwaddr[5] << 8) | p_entry->hwaddr[4];
 #else
-				value32 = (p_entry->mac_addr[5] << 8) | p_entry->mac_addr[4];
+				value32 = (p_entry->MacAddr[5] << 8) | p_entry->MacAddr[4];
 #endif
 
 				odm_set_mac_reg(p_dm_odm, 0x7b4, 0xFFFF, value32);/*0x7b4~0x7b5*/
@@ -2908,7 +3264,7 @@ odm_set_next_mac_addr_target(
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP | ODM_CE))
 				value32 = (p_entry->hwaddr[3] << 24) | (p_entry->hwaddr[2] << 16) | (p_entry->hwaddr[1] << 8) | p_entry->hwaddr[0];
 #else
-				value32 = (p_entry->mac_addr[3] << 24) | (p_entry->mac_addr[2] << 16) | (p_entry->mac_addr[1] << 8) | p_entry->mac_addr[0];
+				value32 = (p_entry->MacAddr[3] << 24) | (p_entry->MacAddr[2] << 16) | (p_entry->MacAddr[1] << 8) | p_entry->MacAddr[0];
 #endif
 				odm_set_mac_reg(p_dm_odm, 0x7b0, MASKDWORD, value32);/*0x7b0~0x7b3*/
 
@@ -2919,7 +3275,7 @@ odm_set_next_mac_addr_target(
 					p_entry->hwaddr[5], p_entry->hwaddr[4], p_entry->hwaddr[3], p_entry->hwaddr[2], p_entry->hwaddr[1], p_entry->hwaddr[0]));
 #else
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training MAC addr = %x:%x:%x:%x:%x:%x\n",
-					p_entry->mac_addr[5], p_entry->mac_addr[4], p_entry->mac_addr[3], p_entry->mac_addr[2], p_entry->mac_addr[1], p_entry->mac_addr[0]));
+					p_entry->MacAddr[5], p_entry->MacAddr[4], p_entry->MacAddr[3], p_entry->MacAddr[2], p_entry->MacAddr[1], p_entry->MacAddr[0]));
 #endif
 
 				break;
@@ -2934,7 +3290,7 @@ odm_set_next_mac_addr_target(
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	{
 		struct _ADAPTER	*adapter =  p_dm_odm->adapter;
-		PMGNT_INFO	p_mgnt_info = &adapter->mgnt_info;
+		PMGNT_INFO	p_mgnt_info = &adapter->MgntInfo;
 
 		for (i = 0; i < 6; i++) {
 			bssid[i] = p_mgnt_info->bssid[i];
@@ -2977,11 +3333,11 @@ odm_fast_ant_training(
 
 	u32	max_rssi_path_a = 0, pckcnt_path_a = 0;
 	u8	i, target_ant_path_a = 0;
-	bool	is_pkt_filter_macth_path_a = false;
+	boolean	is_pkt_filter_macth_path_a = false;
 #if (RTL8192E_SUPPORT == 1)
 	u32	max_rssi_path_b = 0, pckcnt_path_b = 0;
 	u8	target_ant_path_b = 0;
-	bool	is_pkt_filter_macth_path_b = false;
+	boolean	is_pkt_filter_macth_path_b = false;
 #endif
 
 
@@ -3195,7 +3551,694 @@ odm_fast_ant_training_work_item_callback(
 
 #endif
 
-#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
+
+u32
+phydm_construct_hb_rfu_codeword_type2(
+	void		*p_dm_void,
+	u32		beam_set_idx
+)
+{
+	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _SMART_ANTENNA_TRAINNING_		*pdm_sat_table = &(p_dm_odm->dm_sat_table);
+	u32		sync_codeword = 0x7f;
+	u32		codeword = 0;
+	u32		data_tmp = 0;
+	u32		i;
+
+	for (i = 0; i < pdm_sat_table->ant_num_total; i++) {
+
+		if (*p_dm_odm->p_band_type == ODM_BAND_5G)
+			data_tmp = pdm_sat_table->rfu_codeword_table_5g[beam_set_idx][i];
+		else
+			data_tmp = pdm_sat_table->rfu_codeword_table_2g[beam_set_idx][i];
+			
+		codeword |= (data_tmp << (i * pdm_sat_table->rfu_each_ant_bit_num));
+	}
+
+	codeword = (codeword<<8) | sync_codeword;
+	
+	return codeword;
+}
+
+void
+phydm_update_beam_pattern_type2(
+	void		*p_dm_void,
+	u32		codeword,
+	u32		codeword_length
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _SMART_ANTENNA_TRAINNING_			*pdm_sat_table = &(p_dm_odm->dm_sat_table);
+	u8			i;
+	boolean			beam_ctrl_signal;
+	u32			one = 0x1;
+	u32			reg44_tmp_p, reg44_tmp_n, reg44_ori;
+	u8			devide_num = 4;
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Set codeword = ((0x%x))\n", codeword));
+
+	reg44_ori = odm_get_mac_reg(p_dm_odm, 0x44, MASKDWORD);
+	reg44_tmp_p = reg44_ori;
+	/*ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reg44_ori =0x%x\n", reg44_ori));*/
+
+	/*devide_num = (pdm_sat_table->rfu_protocol_type == 2) ? 8 : 4;*/
+
+	for (i = 0; i <= (codeword_length - 1); i++) {
+		beam_ctrl_signal = (boolean)((codeword & BIT(i)) >> i);
+		
+		#if 1
+		if (p_dm_odm->debug_components & ODM_COMP_ANT_DIV) {
+
+			if (i == (codeword_length - 1)) {
+				dbg_print("%d ]\n", beam_ctrl_signal);
+				/**/
+			} else if (i == 0) {
+				dbg_print("Start sending codeword[1:%d] ---> [ %d ", codeword_length, beam_ctrl_signal);
+				/**/
+			} else if ((i % devide_num) == (devide_num-1)) {
+				dbg_print("%d  |  ", beam_ctrl_signal);
+				/**/
+			} else {
+				dbg_print("%d ", beam_ctrl_signal);
+				/**/
+			}
+		}
+		#endif
+		
+		if (p_dm_odm->support_ic_type == ODM_RTL8821) {
+			#if (RTL8821A_SUPPORT == 1)
+			reg44_tmp_p = reg44_ori & (~(BIT(11) | BIT10)); /*clean bit 10 & 11*/
+			reg44_tmp_p |= ((1 << 11) | (beam_ctrl_signal << 10));
+			reg44_tmp_n = reg44_ori & (~(BIT(11) | BIT(10)));
+
+			/*ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n));*/
+			odm_set_mac_reg(p_dm_odm, 0x44, MASKDWORD, reg44_tmp_p);
+			odm_set_mac_reg(p_dm_odm, 0x44, MASKDWORD, reg44_tmp_n);
+			#endif
+		}
+		#if (RTL8822B_SUPPORT == 1)
+		else if (p_dm_odm->support_ic_type == ODM_RTL8822B) {
+
+			if (pdm_sat_table->rfu_protocol_type == 2) {
+
+				reg44_tmp_p = reg44_tmp_p & ~(BIT(8)); /*clean bit 8*/
+				reg44_tmp_p = reg44_tmp_p ^ BIT(9); /*get new clk high/low, exclusive-or*/
+
+	
+				reg44_tmp_p |= (beam_ctrl_signal << 8);
+				
+				odm_set_mac_reg(p_dm_odm, 0x44, MASKDWORD, reg44_tmp_p);
+				ODM_delay_us(pdm_sat_table->rfu_protocol_delay_time);
+				/*ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reg44 =(( 0x%x )), reg44[9:8] = ((%x)), beam_ctrl_signal =((%x))\n", reg44_tmp_p, ((reg44_tmp_p & 0x300)>>8), beam_ctrl_signal));*/
+				
+			} else {
+				reg44_tmp_p = reg44_ori & (~(BIT(9) | BIT8)); /*clean bit 9 & 8*/
+				reg44_tmp_p |= ((1 << 9) | (beam_ctrl_signal << 8));
+				reg44_tmp_n = reg44_ori & (~(BIT(9) | BIT(8)));
+
+				/*ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n)); */
+				odm_set_mac_reg(p_dm_odm, 0x44, MASKDWORD, reg44_tmp_p);
+				ODM_delay_us(10);
+				odm_set_mac_reg(p_dm_odm, 0x44, MASKDWORD, reg44_tmp_n);
+				ODM_delay_us(10);
+			}
+		}
+		#endif
+	}
+}
+
+void
+phydm_update_rx_idle_beam_type2(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _FAST_ANTENNA_TRAINNING_		*p_dm_fat_table = &p_dm_odm->dm_fat_table;
+	struct _SMART_ANTENNA_TRAINNING_	*pdm_sat_table = &(p_dm_odm->dm_sat_table);
+	u32			i;
+
+	pdm_sat_table->update_beam_codeword = phydm_construct_hb_rfu_codeword_type2(p_dm_odm, pdm_sat_table->rx_idle_beam_set_idx);
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Update Rx-Idle-Beam ] BeamSet idx = ((%d))\n", pdm_sat_table->rx_idle_beam_set_idx));
+
+#if DEV_BUS_TYPE == RT_PCI_INTERFACE
+	phydm_update_beam_pattern_type2(p_dm_odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->rfu_codeword_total_bit_num);
+#else
+	odm_schedule_work_item(&pdm_sat_table->hl_smart_antenna_workitem);
+	/*odm_stall_execution(1);*/
+#endif
+
+	pdm_sat_table->pre_codeword = pdm_sat_table->update_beam_codeword;
+}
+
+
+void
+phydm_hl_smart_ant_debug_type2(
+	void		*p_dm_void,
+	char		input[][16],
+	u32		*_used,
+	char		*output,
+	u32		*_out_len,
+	u32		input_num
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _SMART_ANTENNA_TRAINNING_			*pdm_sat_table = &(p_dm_odm->dm_sat_table);
+	u32			used = *_used;
+	u32			out_len = *_out_len;
+	u32			one = 0x1;
+	u32			codeword_length = pdm_sat_table->rfu_codeword_total_bit_num;
+	u32			beam_ctrl_signal, i;
+	u8			devide_num = 4;
+	char			help[] = "-h";
+	u32			dm_value[10] = {0};
+
+	PHYDM_SSCANF(input[1], DCMD_DECIMAL, &dm_value[0]);
+	PHYDM_SSCANF(input[2], DCMD_DECIMAL, &dm_value[1]);
+	PHYDM_SSCANF(input[3], DCMD_DECIMAL, &dm_value[2]);
+	PHYDM_SSCANF(input[4], DCMD_DECIMAL, &dm_value[3]);
+	PHYDM_SSCANF(input[5], DCMD_DECIMAL, &dm_value[4]);
+
+
+	if (strcmp(input[1], help) == 0) {
+		PHYDM_SNPRINTF((output + used, out_len - used, " 1 {fix_en} {codeword(Hex)}\n"));
+		PHYDM_SNPRINTF((output + used, out_len - used, " 3 {Fix_training_num_en} {Per_beam_training_pkt_num} {Decision_holding_period}\n"));
+		PHYDM_SNPRINTF((output + used, out_len - used, " 5 {0:show, 1:2G, 2:5G} {beam_num} {idxA(Hex)} {idxB(Hex)}\n"));
+		PHYDM_SNPRINTF((output + used, out_len - used, " 7 {0:show, 1:2G, 2:5G} {total_beam_set_num}\n"));
+		PHYDM_SNPRINTF((output + used, out_len - used, " 8 {0:show, 1:set} {RFU delay time(us)}\n"));
+
+	} else if (dm_value[0] == 1) { /*fix beam pattern*/
+
+		pdm_sat_table->fix_beam_pattern_en = dm_value[1];
+
+		if (pdm_sat_table->fix_beam_pattern_en == 1) {
+
+			PHYDM_SSCANF(input[3], DCMD_HEX, &dm_value[2]);
+			pdm_sat_table->fix_beam_pattern_codeword = dm_value[2];
+
+			if (pdm_sat_table->fix_beam_pattern_codeword  > (one << codeword_length)) {
+
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Codeword overflow, Current codeword is ((0x%x)), and should be less than ((%d))bit\n",
+					pdm_sat_table->fix_beam_pattern_codeword, codeword_length));
+				
+				(pdm_sat_table->fix_beam_pattern_codeword) &= 0xffffff;
+				
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Auto modify to (0x%x)\n", pdm_sat_table->fix_beam_pattern_codeword));
+			}
+
+			pdm_sat_table->update_beam_codeword = pdm_sat_table->fix_beam_pattern_codeword;
+
+			/*---------------------------------------------------------*/
+			PHYDM_SNPRINTF((output + used, out_len - used, "Fix Beam Pattern\n"));
+			
+			/*devide_num = (pdm_sat_table->rfu_protocol_type == 2) ? 8 : 4;*/
+			
+			for (i = 0; i <= (codeword_length - 1); i++) {
+				beam_ctrl_signal = (boolean)((pdm_sat_table->update_beam_codeword & BIT(i)) >> i);
+
+				if (i == (codeword_length - 1)) {
+					PHYDM_SNPRINTF((output + used, out_len - used, "%d]\n", beam_ctrl_signal));
+					/**/
+				} else if (i == 0) {
+					PHYDM_SNPRINTF((output + used, out_len - used, "Send Codeword[1:%d] to RFU -> [%d", pdm_sat_table->rfu_codeword_total_bit_num, beam_ctrl_signal));
+					/**/
+				} else if ((i % devide_num) == (devide_num-1)) {
+					PHYDM_SNPRINTF((output + used, out_len - used, "%d|", beam_ctrl_signal));
+					/**/
+				} else {
+					PHYDM_SNPRINTF((output + used, out_len - used, "%d", beam_ctrl_signal));
+					/**/
+				}
+			}
+			/*---------------------------------------------------------*/
+
+
+			#if DEV_BUS_TYPE == RT_PCI_INTERFACE
+			phydm_update_beam_pattern_type2(p_dm_odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->rfu_codeword_total_bit_num);
+			#else
+			odm_schedule_work_item(&pdm_sat_table->hl_smart_antenna_workitem);
+			/*odm_stall_execution(1);*/
+			#endif
+		} else if (pdm_sat_table->fix_beam_pattern_en == 0)
+			PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ] Smart Antenna: Enable\n"));
+
+	} else if (dm_value[0] == 2) { /*set latch time*/
+
+		pdm_sat_table->latch_time = dm_value[1];
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ]  latch_time =0x%x\n", pdm_sat_table->latch_time));
+	} else if (dm_value[0] == 3) {
+
+		pdm_sat_table->fix_training_num_en = dm_value[1];
+
+		if (pdm_sat_table->fix_training_num_en == 1) {
+			pdm_sat_table->per_beam_training_pkt_num = (u8)dm_value[2];
+			pdm_sat_table->decision_holding_period = (u8)dm_value[3];
+
+			PHYDM_SNPRINTF((output + used, out_len - used, "[SmtAnt] Fix_train_en = (( %d )), train_pkt_num = (( %d )), holding_period = (( %d )),\n",
+				pdm_sat_table->fix_training_num_en, pdm_sat_table->per_beam_training_pkt_num, pdm_sat_table->decision_holding_period));
+
+		} else if (pdm_sat_table->fix_training_num_en == 0) {
+			PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ]  AUTO per_beam_training_pkt_num\n"));
+			/**/
+		}
+	} else if (dm_value[0] == 4) {
+		#if 0
+		if (dm_value[1] == 1) {
+			pdm_sat_table->ant_num = 1;
+			pdm_sat_table->first_train_ant = MAIN_ANT;
+
+		} else if (dm_value[1] == 2) {
+			pdm_sat_table->ant_num = 1;
+			pdm_sat_table->first_train_ant = AUX_ANT;
+
+		} else if (dm_value[1] == 3) {
+			pdm_sat_table->ant_num = 2;
+			pdm_sat_table->first_train_ant = MAIN_ANT;
+		}
+
+		PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ]  Set ant Num = (( %d )), first_train_ant = (( %d ))\n",
+			pdm_sat_table->ant_num, (pdm_sat_table->first_train_ant - 1)));
+		#endif
+	} else if (dm_value[0] == 5) {	/*set beam set table*/
+
+		PHYDM_SSCANF(input[4], DCMD_HEX, &dm_value[3]);
+		PHYDM_SSCANF(input[5], DCMD_HEX, &dm_value[4]);
+
+		if (dm_value[1] == 1) { /*2G*/
+			if (dm_value[2] < SUPPORT_BEAM_SET_PATTERN_NUM) {
+				pdm_sat_table->rfu_codeword_table_2g[dm_value[2] ][0] = (u8)dm_value[3];
+				pdm_sat_table->rfu_codeword_table_2g[dm_value[2] ][1] = (u8)dm_value[4];
+				PHYDM_SNPRINTF((output + used, out_len - used, "[SmtAnt] Set 2G Table[%d] = [A:0x%x, B:0x%x]\n",dm_value[2], dm_value[3], dm_value[4]));
+			}
+			
+		} else if (dm_value[1] == 2) { /*5G*/
+			if (dm_value[2] < SUPPORT_BEAM_SET_PATTERN_NUM) {
+				pdm_sat_table->rfu_codeword_table_5g[dm_value[2] ][0] = (u8)dm_value[3];
+				pdm_sat_table->rfu_codeword_table_5g[dm_value[2] ][1] = (u8)dm_value[4];
+				PHYDM_SNPRINTF((output + used, out_len - used, "[SmtAnt] Set5G Table[%d] = [A:0x%x, B:0x%x]\n",dm_value[2], dm_value[3], dm_value[4]));
+			}
+		} else  if (dm_value[1] == 0) {
+			PHYDM_SNPRINTF((output + used, out_len - used, "[SmtAnt] 2G Beam Table==============>\n"));
+			for (i = 0; i < pdm_sat_table->total_beam_set_num_2g; i++) {
+				PHYDM_SNPRINTF((output + used, out_len - used, "2G Table[%d] = [A:0x%x, B:0x%x]\n",
+					i, pdm_sat_table->rfu_codeword_table_2g[i][0], pdm_sat_table->rfu_codeword_table_2g[i][1]));
+			}
+			PHYDM_SNPRINTF((output + used, out_len - used, "[SmtAnt] 5G Beam Table==============>\n"));
+			for (i = 0; i < pdm_sat_table->total_beam_set_num_5g; i++) {
+				PHYDM_SNPRINTF((output + used, out_len - used, "5G Table[%d] = [A:0x%x, B:0x%x]\n",
+					i, pdm_sat_table->rfu_codeword_table_5g[i][0], pdm_sat_table->rfu_codeword_table_5g[i][1]));
+			}
+		}
+
+	} else if (dm_value[0] == 6) {
+		#if 0
+		if (dm_value[1] == 0) {
+			if (dm_value[2] < SUPPORT_BEAM_SET_PATTERN_NUM) {
+				pdm_sat_table->rfu_codeword_table_5g[dm_value[2] ][0] = (u8)dm_value[3];
+				pdm_sat_table->rfu_codeword_table_5g[dm_value[2] ][1] = (u8)dm_value[4];
+				PHYDM_SNPRINTF((output + used, out_len - used, "[SmtAnt] Set5G Table[%d] = [A:0x%x, B:0x%x]\n",dm_value[2], dm_value[3], dm_value[4]));
+			}
+		} else {
+			for (i = 0; i < pdm_sat_table->total_beam_set_num_5g; i++) {
+				PHYDM_SNPRINTF((output + used, out_len - used, "[SmtAnt] Read 5G Table[%d] = [A:0x%x, B:0x%x]\n",
+					i, pdm_sat_table->rfu_codeword_table_5g[i][0], pdm_sat_table->rfu_codeword_table_5g[i][1]));
+			}
+		}
+		#endif
+	} else if (dm_value[0] == 7) {
+
+		if (dm_value[1] == 1) {
+
+			pdm_sat_table->total_beam_set_num_2g = (u8)(dm_value[2]);
+			PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ] total_beam_set_num_2g = ((%d))\n", pdm_sat_table->total_beam_set_num_2g));
+
+		} else if (dm_value[1] == 2) {
+
+			pdm_sat_table->total_beam_set_num_5g = (u8)(dm_value[2]);
+			PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ] total_beam_set_num_5g = ((%d))\n", pdm_sat_table->total_beam_set_num_5g));
+		} else if (dm_value[1] == 0) {
+			PHYDM_SNPRINTF((output + used, out_len - used, "[ SmartAnt ] Show total_beam_set_num{2g,5g} = {%d,%d}\n", 
+				pdm_sat_table->total_beam_set_num_2g, pdm_sat_table->total_beam_set_num_5g));
+		}
+
+	} else if (dm_value[0] == 8) {
+
+			if (dm_value[1] == 1) {
+				pdm_sat_table->rfu_protocol_delay_time = (u16)(dm_value[2]);
+				PHYDM_SNPRINTF((output + used, out_len - used, "[SmtAnt] Set rfu_protocol_delay_time = ((%d))\n", pdm_sat_table->rfu_protocol_delay_time));
+			} else if (dm_value[1] == 0) {
+				PHYDM_SNPRINTF((output + used, out_len - used, "[SmtAnt] Read rfu_protocol_delay_time = ((%d))\n", pdm_sat_table->rfu_protocol_delay_time));
+			}
+	}
+
+}
+
+void
+phydm_set_rfu_beam_pattern_type2(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _SMART_ANTENNA_TRAINNING_	*pdm_sat_table = &(p_dm_odm->dm_sat_table);
+
+	if (p_dm_odm->ant_div_type != HL_SW_SMART_ANT_TYPE2)
+		return;
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training beam_set index = (( 0x%x ))\n", pdm_sat_table->fast_training_beam_num));
+	pdm_sat_table->update_beam_codeword = phydm_construct_hb_rfu_codeword_type2(p_dm_odm, pdm_sat_table->fast_training_beam_num);
+
+	#if DEV_BUS_TYPE == RT_PCI_INTERFACE
+	phydm_update_beam_pattern_type2(p_dm_odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->rfu_codeword_total_bit_num);
+	#else
+	odm_schedule_work_item(&pdm_sat_table->hl_smart_antenna_workitem);
+	/*odm_stall_execution(1);*/
+	#endif
+}
+
+void
+phydm_fast_ant_training_hl_smart_antenna_type2(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _SMART_ANTENNA_TRAINNING_	*pdm_sat_table = &(p_dm_odm->dm_sat_table);
+	struct _FAST_ANTENNA_TRAINNING_		*p_dm_fat_table	 = &(p_dm_odm->dm_fat_table);
+	struct _sw_antenna_switch_				*p_dm_swat_table = &p_dm_odm->dm_swat_table;
+	u32		codeword = 0;
+	u8		i = 0, j=0;
+	u8		avg_rssi_tmp;
+	u8		avg_rssi_tmp_ma;
+	u8		max_beam_ant_rssi = 0;
+	u8		rssi_target_beam = 0, target_beam_max_rssi = 0;
+	u8		evm1ss_target_beam = 0, evm2ss_target_beam = 0;
+	u32		target_beam_max_evm1ss = 0, target_beam_max_evm2ss = 0;
+	u32		beam_tmp;
+	u8		per_beam_val_diff_tmp = 0, training_pkt_num_offset;
+	u32		avg_evm2ss[2] = {0}, avg_evm2ss_sum = 0;
+	u32		avg_evm1ss = 0;
+	u32		beam_path_evm_2ss_cnt_all = 0; /*sum of all 2SS-pattern cnt*/
+	u32		beam_path_evm_1ss_cnt_all = 0; /*sum of all 1SS-pattern cnt*/
+	u8		decision_type;
+
+	if (!p_dm_odm->is_linked) {
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[No Link!!!]\n"));
+
+		if (p_dm_fat_table->is_become_linked == true) {
+
+			pdm_sat_table->decision_holding_period = 0;
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Link->no Link\n"));
+			p_dm_fat_table->fat_state = FAT_BEFORE_LINK_STATE;
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("change to (( %d )) FAT_state\n", p_dm_fat_table->fat_state));
+			p_dm_fat_table->is_become_linked = p_dm_odm->is_linked;
+		}
+		return;
+
+	} else {
+		if (p_dm_fat_table->is_become_linked == false) {
+
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Linked !!!]\n"));
+
+			p_dm_fat_table->fat_state = FAT_PREPARE_STATE;
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("change to (( %d )) FAT_state\n", p_dm_fat_table->fat_state));
+
+			/*pdm_sat_table->fast_training_beam_num = 0;*/
+			/*phydm_set_rfu_beam_pattern_type2(p_dm_odm);*/
+
+			p_dm_fat_table->is_become_linked = p_dm_odm->is_linked;
+		}
+	}
+
+
+	/*ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("HL Smart ant Training: state (( %d ))\n", p_dm_fat_table->fat_state));*/
+
+	/* [DECISION STATE] */
+	/*=======================================================================================*/
+	if (p_dm_fat_table->fat_state == FAT_DECISION_STATE) {
+
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 3. In Decision state]\n"));
+
+		/*compute target beam in each antenna*/
+
+		for (j = 0; j < (pdm_sat_table->total_beam_set_num); j++) {
+
+			/*[Decision1: RSSI]-------------------------------------------------------------------*/
+			if (pdm_sat_table->statistic_pkt_cnt[j] == 0) {	/*if new RSSI = 0 -> MA_RSSI-=2*/
+				avg_rssi_tmp = pdm_sat_table->beam_set_avg_rssi_pre[j];
+				avg_rssi_tmp = (avg_rssi_tmp >= 2) ? (avg_rssi_tmp - 2) : avg_rssi_tmp;
+				avg_rssi_tmp_ma = avg_rssi_tmp;
+			} else {
+				avg_rssi_tmp = (u8)((pdm_sat_table->beam_set_rssi_avg_sum[j]) / (pdm_sat_table->statistic_pkt_cnt[j]));
+				avg_rssi_tmp_ma = (avg_rssi_tmp + pdm_sat_table->beam_set_avg_rssi_pre[j]) >> 1;
+			}
+
+			pdm_sat_table->beam_set_avg_rssi_pre[j] = avg_rssi_tmp;
+
+			if (avg_rssi_tmp > target_beam_max_rssi) {
+				rssi_target_beam = j;
+				target_beam_max_rssi = avg_rssi_tmp;
+			}
+
+			/*[Decision2: EVM 2ss]-------------------------------------------------------------------*/
+			if (pdm_sat_table->beam_path_evm_2ss_cnt[j] != 0) {
+				avg_evm2ss[0] =  pdm_sat_table->beam_path_evm_2ss_sum[j][0] / pdm_sat_table->beam_path_evm_2ss_cnt[j];
+				avg_evm2ss[1] =  pdm_sat_table->beam_path_evm_2ss_sum[j][1] / pdm_sat_table->beam_path_evm_2ss_cnt[j];
+				avg_evm2ss_sum = avg_evm2ss[0] + avg_evm2ss[1];
+				beam_path_evm_2ss_cnt_all += pdm_sat_table->beam_path_evm_2ss_cnt[j];
+
+				pdm_sat_table->beam_set_avg_evm_2ss_pre[j] = (u8)avg_evm2ss_sum;
+			}
+
+			if (avg_evm2ss_sum > target_beam_max_evm2ss) {
+				evm2ss_target_beam = j;
+				target_beam_max_evm2ss = avg_evm2ss_sum;
+			}
+
+			/*[Decision3: EVM 1ss]-------------------------------------------------------------------*/
+			if (pdm_sat_table->beam_path_evm_1ss_cnt[j] != 0) {
+				avg_evm1ss =  pdm_sat_table->beam_path_evm_1ss_sum[j] / pdm_sat_table->beam_path_evm_1ss_cnt[j];
+				beam_path_evm_1ss_cnt_all += pdm_sat_table->beam_path_evm_1ss_cnt[j];
+
+				pdm_sat_table->beam_set_avg_evm_1ss_pre[j] = (u8)avg_evm1ss;
+			}
+				
+			if (avg_evm1ss > target_beam_max_evm1ss) {
+				evm1ss_target_beam = j;
+				target_beam_max_evm1ss = avg_evm1ss;
+			}
+
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Beam[%d] Pkt_cnt=(( %d )), avg{MA,rssi}={%d, %d}, EVM1={%d}, EVM2={%d, %d, %d}\n",
+				j, pdm_sat_table->statistic_pkt_cnt[j], avg_rssi_tmp_ma, avg_rssi_tmp, avg_evm1ss, avg_evm2ss[0], avg_evm2ss[1], avg_evm2ss_sum));
+
+			/*reset counter value*/
+			pdm_sat_table->beam_set_rssi_avg_sum[j] = 0;
+			pdm_sat_table->beam_path_rssi_sum[j][0] = 0;
+			pdm_sat_table->beam_path_rssi_sum[j][1] = 0;
+			pdm_sat_table->statistic_pkt_cnt[j] = 0;
+			
+			pdm_sat_table->beam_path_evm_2ss_sum[j][0] = 0;
+			pdm_sat_table->beam_path_evm_2ss_sum[j][1] = 0;
+			pdm_sat_table->beam_path_evm_2ss_cnt[j] = 0;
+			
+			pdm_sat_table->beam_path_evm_1ss_sum[j] = 0;
+			pdm_sat_table->beam_path_evm_1ss_cnt[j] = 0;
+		}
+		
+		/*[Joint Decision]-------------------------------------------------------------------*/
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("--->1.[RSSI]      Target Beam(( %d )) RSSI_max=((%d))\n", rssi_target_beam, target_beam_max_rssi));
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("--->2.[Evm2SS] Target Beam(( %d )) EVM2SS_max=((%d))\n", evm2ss_target_beam, target_beam_max_evm2ss));
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("--->3.[Evm1SS] Target Beam(( %d )) EVM1SS_max=((%d))\n", evm1ss_target_beam, target_beam_max_evm1ss));
+
+		if (target_beam_max_rssi <= 10) {
+			pdm_sat_table->rx_idle_beam_set_idx = rssi_target_beam;
+			decision_type = 1;
+		} else {
+			if (beam_path_evm_2ss_cnt_all != 0) {
+				pdm_sat_table->rx_idle_beam_set_idx = evm2ss_target_beam;
+				decision_type = 2;
+			} else if (beam_path_evm_1ss_cnt_all != 0) {
+				pdm_sat_table->rx_idle_beam_set_idx = evm1ss_target_beam;
+				decision_type = 3;
+			} else {
+				pdm_sat_table->rx_idle_beam_set_idx = rssi_target_beam;
+				decision_type = 1;
+			}
+		}
+
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("---> Decision_type=((%d)), Final Target Beam(( %d ))\n", decision_type, pdm_sat_table->rx_idle_beam_set_idx ));
+
+		/*Calculate packet counter offset*/
+		for (j = 0; j < (pdm_sat_table->total_beam_set_num); j++) {
+
+			if (decision_type == 1) {
+				per_beam_val_diff_tmp = target_beam_max_rssi - pdm_sat_table->beam_set_avg_rssi_pre[j];
+				
+			} else if (decision_type == 2) {
+				per_beam_val_diff_tmp = ((u8)target_beam_max_evm2ss - pdm_sat_table->beam_set_avg_evm_2ss_pre[j]) >> 1;
+			} else if (decision_type == 3) {
+				per_beam_val_diff_tmp = (u8)target_beam_max_evm1ss - pdm_sat_table->beam_set_avg_evm_1ss_pre[j];
+			}
+			pdm_sat_table->beam_set_train_val_diff[j] = per_beam_val_diff_tmp;
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Beam_Set[%d]: diff= ((%d))\n", j, per_beam_val_diff_tmp));
+		}
+
+		/*set beam in each antenna*/
+		phydm_update_rx_idle_beam_type2(p_dm_odm);
+		p_dm_fat_table->fat_state = FAT_PREPARE_STATE;
+
+	}
+	/* [TRAINING STATE] */
+	else if (p_dm_fat_table->fat_state == FAT_TRAINING_STATE) {
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2. In Training state]\n"));
+
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("curr_beam_idx = (( %d )), pre_beam_idx = (( %d ))\n",
+			pdm_sat_table->fast_training_beam_num, pdm_sat_table->pre_fast_training_beam_num));
+
+		if (pdm_sat_table->fast_training_beam_num > pdm_sat_table->pre_fast_training_beam_num)
+
+			pdm_sat_table->force_update_beam_en = 0;
+
+		else {
+
+			pdm_sat_table->force_update_beam_en = 1;
+
+			pdm_sat_table->pkt_counter = 0;
+			beam_tmp = pdm_sat_table->fast_training_beam_num;
+			if (pdm_sat_table->fast_training_beam_num >= ((u32)pdm_sat_table->total_beam_set_num - 1)) {
+
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Timeout Update]  Beam_num (( %d )) -> (( decision ))\n", pdm_sat_table->fast_training_beam_num));
+				p_dm_fat_table->fat_state = FAT_DECISION_STATE;
+				phydm_fast_ant_training_hl_smart_antenna_type2(p_dm_odm);
+
+			} else {
+				pdm_sat_table->fast_training_beam_num++;
+
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Timeout Update]  Beam_num (( %d )) -> (( %d ))\n", beam_tmp, pdm_sat_table->fast_training_beam_num));
+				phydm_set_rfu_beam_pattern_type2(p_dm_odm);
+				p_dm_fat_table->fat_state = FAT_TRAINING_STATE;
+
+			}
+		}
+		pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num;
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Update Pre_Beam =(( %d ))\n", pdm_sat_table->pre_fast_training_beam_num));
+	}
+	/*  [Prepare state] */
+	/*=======================================================================================*/
+	else if (p_dm_fat_table->fat_state == FAT_PREPARE_STATE) {
+
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\n\n[ 1. In Prepare state]\n"));
+
+		if (p_dm_odm->pre_traffic_load == (p_dm_odm->traffic_load)) {
+			if (pdm_sat_table->decision_holding_period != 0) {
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Holding_period = (( %d )), return!!!\n", pdm_sat_table->decision_holding_period));
+				pdm_sat_table->decision_holding_period--;
+				return;
+			}
+		}
+
+		/* Set training packet number*/
+		if (pdm_sat_table->fix_training_num_en == 0) {
+
+			switch (p_dm_odm->traffic_load) {
+
+			case TRAFFIC_HIGH:
+				pdm_sat_table->per_beam_training_pkt_num = 8;
+				pdm_sat_table->decision_holding_period = 2;
+				break;
+			case TRAFFIC_MID:
+				pdm_sat_table->per_beam_training_pkt_num = 6;
+				pdm_sat_table->decision_holding_period = 3;
+				break;
+			case TRAFFIC_LOW:
+				pdm_sat_table->per_beam_training_pkt_num = 3; /*ping 60000*/
+				pdm_sat_table->decision_holding_period = 4;
+				break;
+			case TRAFFIC_ULTRA_LOW:
+				pdm_sat_table->per_beam_training_pkt_num = 1;
+				pdm_sat_table->decision_holding_period = 6;
+				break;
+			default:
+				break;
+			}
+		}
+		
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TrafficLoad = (( %d )), Fix_beam = (( %d )), per_beam_training_pkt_num = (( %d )), decision_holding_period = ((%d))\n",
+			p_dm_odm->traffic_load, pdm_sat_table->fix_training_num_en, pdm_sat_table->per_beam_training_pkt_num, pdm_sat_table->decision_holding_period));
+
+		/*Beam_set number*/
+		if (*p_dm_odm->p_band_type == ODM_BAND_5G) {
+			pdm_sat_table->total_beam_set_num = pdm_sat_table->total_beam_set_num_5g;
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("5G beam_set num = ((%d))\n", pdm_sat_table->total_beam_set_num));
+		} else {
+			pdm_sat_table->total_beam_set_num = pdm_sat_table->total_beam_set_num_2g;
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("2G beam_set num = ((%d))\n", pdm_sat_table->total_beam_set_num));
+		}
+
+		for (j = 0; j < (pdm_sat_table->total_beam_set_num); j++) {
+
+			training_pkt_num_offset = pdm_sat_table->beam_set_train_val_diff[j];
+
+			if ((pdm_sat_table->per_beam_training_pkt_num) > training_pkt_num_offset)
+				pdm_sat_table->beam_set_train_cnt[j] = pdm_sat_table->per_beam_training_pkt_num - training_pkt_num_offset;
+			else
+				pdm_sat_table->beam_set_train_cnt[j] = 1;
+
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Beam_Set[ %d ] training_pkt_offset = ((%d)), training_pkt_num = ((%d))\n",
+				j, pdm_sat_table->beam_set_train_val_diff[j], pdm_sat_table->beam_set_train_cnt[j]));
+		}
+		
+		pdm_sat_table->pre_beacon_counter = pdm_sat_table->beacon_counter;
+		pdm_sat_table->update_beam_idx = 0;
+		pdm_sat_table->pkt_counter = 0;
+		
+		pdm_sat_table->fast_training_beam_num = 0;
+		phydm_set_rfu_beam_pattern_type2(p_dm_odm);
+		pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num;
+		p_dm_fat_table->fat_state = FAT_TRAINING_STATE;
+	}
+
+}
+
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+
+void
+phydm_beam_switch_workitem_callback(
+	void	*p_context
+)
+{
+	struct _ADAPTER		*p_adapter = (struct _ADAPTER *)p_context;
+	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
+	struct _SMART_ANTENNA_TRAINNING_			*pdm_sat_table = &(p_dm_odm->dm_sat_table);
+
+#if DEV_BUS_TYPE != RT_PCI_INTERFACE
+	pdm_sat_table->pkt_skip_statistic_en = 1;
+#endif
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Beam Switch Workitem Callback, pkt_skip_statistic_en = (( %d ))\n", pdm_sat_table->pkt_skip_statistic_en));
+
+	phydm_update_beam_pattern_type2(p_dm_odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->rfu_codeword_total_bit_num);
+
+#if DEV_BUS_TYPE != RT_PCI_INTERFACE
+	/*odm_stall_execution(pdm_sat_table->latch_time);*/
+	pdm_sat_table->pkt_skip_statistic_en = 0;
+#endif
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pkt_skip_statistic_en = (( %d )), latch_time = (( %d ))\n", pdm_sat_table->pkt_skip_statistic_en, pdm_sat_table->latch_time));
+}
+
+void
+phydm_beam_decision_workitem_callback(
+	void	*p_context
+)
+{
+	struct _ADAPTER		*p_adapter = (struct _ADAPTER *)p_context;
+	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Beam decision Workitem Callback\n"));
+	phydm_fast_ant_training_hl_smart_antenna_type2(p_dm_odm);
+}
+#endif
+
+#elif (defined(CONFIG_HL_SMART_ANTENNA_TYPE1))
 
 u32
 phydm_construct_hl_beam_codeword(
@@ -3271,17 +4314,21 @@ phydm_update_beam_pattern(
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _SMART_ANTENNA_TRAINNING_			*pdm_sat_table = &(p_dm_odm->dm_sat_table);
 	u8			i;
-	bool			beam_ctrl_signal;
+	boolean			beam_ctrl_signal;
 	u32			one = 0x1;
 	u32			reg44_tmp_p, reg44_tmp_n, reg44_ori;
+	u8			devide_num = 4;
 
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Set Beam Pattern =0x%x\n", codeword));
 
 	reg44_ori = odm_get_mac_reg(p_dm_odm, 0x44, MASKDWORD);
+	reg44_tmp_p = reg44_ori;
 	/*ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reg44_ori =0x%x\n", reg44_ori));*/
 
+	devide_num = (pdm_sat_table->rfu_protocol_type == 2) ? 6 : 4;
+
 	for (i = 0; i <= (codeword_length - 1); i++) {
-		beam_ctrl_signal = (bool)((codeword & BIT(i)) >> i);
+		beam_ctrl_signal = (boolean)((codeword & BIT(i)) >> i);
 
 		if (p_dm_odm->debug_components & ODM_COMP_ANT_DIV) {
 
@@ -3289,9 +4336,9 @@ phydm_update_beam_pattern(
 				dbg_print("%d ]\n", beam_ctrl_signal);
 				/**/
 			} else if (i == 0) {
-				dbg_print("Send codeword[1:24] ---> [ %d ", beam_ctrl_signal);
+				dbg_print("Send codeword[1:%d] ---> [ %d ", codeword_length, beam_ctrl_signal);
 				/**/
-			} else if ((i % 4) == 3) {
+			} else if ((i % devide_num) == (devide_num-1)) {
 				dbg_print("%d  |  ", beam_ctrl_signal);
 				/**/
 			} else {
@@ -3300,19 +4347,45 @@ phydm_update_beam_pattern(
 			}
 		}
 
-#if 1
-		reg44_tmp_p = reg44_ori & (~(BIT(11) | BIT10)); /*clean bit 10 & 11*/
-		reg44_tmp_p |= ((1 << 11) | (beam_ctrl_signal << 10));
-		reg44_tmp_n = reg44_ori & (~(BIT(11) | BIT(10)));
+		if (p_dm_odm->support_ic_type == ODM_RTL8821) {
+			#if (RTL8821A_SUPPORT == 1)
+			reg44_tmp_p = reg44_ori & (~(BIT(11) | BIT10)); /*clean bit 10 & 11*/
+			reg44_tmp_p |= ((1 << 11) | (beam_ctrl_signal << 10));
+			reg44_tmp_n = reg44_ori & (~(BIT(11) | BIT(10)));
 
-		/*ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n));*/
-		odm_set_mac_reg(p_dm_odm, 0x44, MASKDWORD, reg44_tmp_p);
-		odm_set_mac_reg(p_dm_odm, 0x44, MASKDWORD, reg44_tmp_n);
-#else
-		odm_set_mac_reg(p_dm_odm, 0x44, BIT(11) | BIT(10), ((1 << 1) | beam_ctrl_signal));
-		odm_set_mac_reg(p_dm_odm, 0x44, BIT(11), 0);
-#endif
+			/*ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n));*/
+			odm_set_mac_reg(p_dm_odm, 0x44, MASKDWORD, reg44_tmp_p);
+			odm_set_mac_reg(p_dm_odm, 0x44, MASKDWORD, reg44_tmp_n);
+			#endif
+		}
+		#if (RTL8822B_SUPPORT == 1)
+		else if (p_dm_odm->support_ic_type == ODM_RTL8822B) {
 
+			if (pdm_sat_table->rfu_protocol_type == 2) {
+
+				reg44_tmp_p = reg44_tmp_p & ~(BIT(8)); /*clean bit 8*/
+				reg44_tmp_p = reg44_tmp_p ^ BIT(9); /*get new clk high/low, exclusive-or*/
+
+	
+				reg44_tmp_p |= (beam_ctrl_signal << 8);
+				
+				odm_set_mac_reg(p_dm_odm, 0x44, MASKDWORD, reg44_tmp_p);
+				ODM_delay_us(10);
+				/*ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reg44 =(( 0x%x )), reg44[9:8] = ((%x)), beam_ctrl_signal =((%x))\n", reg44_tmp_p, ((reg44_tmp_p & 0x300)>>8), beam_ctrl_signal));*/
+				
+			} else {
+				reg44_tmp_p = reg44_ori & (~(BIT(9) | BIT8)); /*clean bit 9 & 8*/
+				reg44_tmp_p |= ((1 << 9) | (beam_ctrl_signal << 8));
+				reg44_tmp_n = reg44_ori & (~(BIT(9) | BIT(8)));
+
+				/*ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n)); */
+				odm_set_mac_reg(p_dm_odm, 0x44, MASKDWORD, reg44_tmp_p);
+				ODM_delay_us(10);
+				odm_set_mac_reg(p_dm_odm, 0x44, MASKDWORD, reg44_tmp_n);
+				ODM_delay_us(10);
+			}
+		}
+		#endif
 	}
 }
 
@@ -3335,7 +4408,7 @@ phydm_update_rx_idle_beam(
 	}
 
 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
-	phydm_update_beam_pattern(p_dm_odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->data_codeword_bit_num);
+	phydm_update_beam_pattern(p_dm_odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->rfu_codeword_total_bit_num);
 #else
 	odm_schedule_work_item(&pdm_sat_table->hl_smart_antenna_workitem);
 	/*odm_stall_execution(1);*/
@@ -3347,10 +4420,11 @@ phydm_update_rx_idle_beam(
 void
 phydm_hl_smart_ant_debug(
 	void		*p_dm_void,
-	u32		*const dm_value,
+	char		input[][16],
 	u32		*_used,
-	char			*output,
-	u32		*_out_len
+	char		*output,
+	u32		*_out_len,
+	u32		input_num
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
@@ -3358,8 +4432,9 @@ phydm_hl_smart_ant_debug(
 	u32			used = *_used;
 	u32			out_len = *_out_len;
 	u32			one = 0x1;
-	u32			codeword_length = pdm_sat_table->data_codeword_bit_num;
+	u32			codeword_length = pdm_sat_table->rfu_codeword_total_bit_num;
 	u32			beam_ctrl_signal, i;
+	u8			devide_num = 4;
 
 	if (dm_value[0] == 1) { /*fix beam pattern*/
 
@@ -3373,7 +4448,9 @@ phydm_hl_smart_ant_debug(
 
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Codeword overflow, Current codeword is ((0x%x)), and should be less than ((%d))bit\n",
 					pdm_sat_table->fix_beam_pattern_codeword, codeword_length));
+				
 				(pdm_sat_table->fix_beam_pattern_codeword) &= 0xffffff;
+				
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Auto modify to (0x%x)\n", pdm_sat_table->fix_beam_pattern_codeword));
 			}
 
@@ -3381,8 +4458,11 @@ phydm_hl_smart_ant_debug(
 
 			/*---------------------------------------------------------*/
 			PHYDM_SNPRINTF((output + used, out_len - used, "Fix Beam Pattern\n"));
+			
+			devide_num = (pdm_sat_table->rfu_protocol_type == 2) ? 6 : 4;
+			
 			for (i = 0; i <= (codeword_length - 1); i++) {
-				beam_ctrl_signal = (bool)((pdm_sat_table->update_beam_codeword & BIT(i)) >> i);
+				beam_ctrl_signal = (boolean)((pdm_sat_table->update_beam_codeword & BIT(i)) >> i);
 
 				if (i == (codeword_length - 1)) {
 					PHYDM_SNPRINTF((output + used, out_len - used, "%d]\n", beam_ctrl_signal));
@@ -3390,7 +4470,7 @@ phydm_hl_smart_ant_debug(
 				} else if (i == 0) {
 					PHYDM_SNPRINTF((output + used, out_len - used, "Send Codeword[1:24] to RFU -> [%d", beam_ctrl_signal));
 					/**/
-				} else if ((i % 4) == 3) {
+				} else if ((i % devide_num) == (devide_num-1)) {
 					PHYDM_SNPRINTF((output + used, out_len - used, "%d|", beam_ctrl_signal));
 					/**/
 				} else {
@@ -3402,7 +4482,7 @@ phydm_hl_smart_ant_debug(
 
 
 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
-			phydm_update_beam_pattern(p_dm_odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->data_codeword_bit_num);
+			phydm_update_beam_pattern(p_dm_odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->rfu_codeword_total_bit_num);
 #else
 			odm_schedule_work_item(&pdm_sat_table->hl_smart_antenna_workitem);
 			/*odm_stall_execution(1);*/
@@ -3506,7 +4586,7 @@ phydm_set_all_ant_same_beam_num(
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Set all ant beam_pattern: codeword = (( 0x%x ))\n", pdm_sat_table->update_beam_codeword));
 
 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
-	phydm_update_beam_pattern(p_dm_odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->data_codeword_bit_num);
+	phydm_update_beam_pattern(p_dm_odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->rfu_codeword_total_bit_num);
 #else
 	odm_schedule_work_item(&pdm_sat_table->hl_smart_antenna_workitem);
 	/*odm_stall_execution(1);*/
@@ -3677,6 +4757,7 @@ odm_fast_ant_training_hl_smart_antenna_type1(
 
 		odm_ant_div_on_off(p_dm_odm, ANTDIV_ON);
 		p_dm_fat_table->fat_state = FAT_PREPARE_STATE;
+		return;
 
 	}
 	/* [TRAINING STATE] */
@@ -3712,7 +4793,7 @@ odm_fast_ant_training_hl_smart_antenna_type1(
 			}
 		}
 		pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num;
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Update Pre_Beam =(( %d ))\n", pdm_sat_table->pre_fast_training_beam_num));
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[prepare state] Update Pre_Beam =(( %d ))\n", pdm_sat_table->pre_fast_training_beam_num));
 	}
 	/*  [Prepare state] */
 	/*=======================================================================================*/
@@ -3821,7 +4902,7 @@ phydm_beam_switch_workitem_callback(
 {
 	struct _ADAPTER		*p_adapter = (struct _ADAPTER *)p_context;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 	struct _SMART_ANTENNA_TRAINNING_			*pdm_sat_table = &(p_dm_odm->dm_sat_table);
 
 #if DEV_BUS_TYPE != RT_PCI_INTERFACE
@@ -3829,7 +4910,7 @@ phydm_beam_switch_workitem_callback(
 #endif
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Beam Switch Workitem Callback, pkt_skip_statistic_en = (( %d ))\n", pdm_sat_table->pkt_skip_statistic_en));
 
-	phydm_update_beam_pattern(p_dm_odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->data_codeword_bit_num);
+	phydm_update_beam_pattern(p_dm_odm, pdm_sat_table->update_beam_codeword, pdm_sat_table->rfu_codeword_total_bit_num);
 
 #if DEV_BUS_TYPE != RT_PCI_INTERFACE
 	/*odm_stall_execution(pdm_sat_table->latch_time);*/
@@ -3845,7 +4926,7 @@ phydm_beam_decision_workitem_callback(
 {
 	struct _ADAPTER		*p_adapter = (struct _ADAPTER *)p_context;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ SmartAnt ] Beam decision Workitem Callback\n"));
 	odm_fast_ant_training_hl_smart_antenna_type1(p_dm_odm);
@@ -3903,10 +4984,6 @@ odm_ant_div_init(
 #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	p_dm_swat_table->ant_5g = MAIN_ANT;
 	p_dm_swat_table->ant_2g = MAIN_ANT;
-	p_dm_fat_table->CCK_counter_main = 0;
-	p_dm_fat_table->CCK_counter_aux = 0;
-	p_dm_fat_table->OFDM_counter_main = 0;
-	p_dm_fat_table->OFDM_counter_aux = 0;
 #endif
 
 	/* 2 [---Set MAIN_ANT as default antenna if Auto-ant enable---] */
@@ -3919,10 +4996,15 @@ odm_ant_div_init(
 	phydm_keep_rx_ack_ant_by_tx_ant_time(p_dm_odm, 0);  /* Timming issue: keep Rx ant after tx for ACK ( 5 x 3.2 mu = 16mu sec)*/
 
 	/* 2 [---Set TX Antenna---] */
+	if (p_dm_fat_table->p_force_tx_ant_by_desc == NULL) {
 	p_dm_fat_table->force_tx_ant_by_desc = 0;
 	p_dm_fat_table->p_force_tx_ant_by_desc = &(p_dm_fat_table->force_tx_ant_by_desc);
+	}
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("p_force_tx_ant_by_desc = %d\n", *p_dm_fat_table->p_force_tx_ant_by_desc));
 
+	if (*(p_dm_fat_table->p_force_tx_ant_by_desc) == true)
+		odm_tx_by_tx_desc_or_reg(p_dm_odm, TX_BY_DESC);
+	else
 	odm_tx_by_tx_desc_or_reg(p_dm_odm, TX_BY_REG);
 
 
@@ -3996,6 +5078,17 @@ odm_ant_div_init(
 	/*2 [--8723D---]*/
 #if (RTL8723D_SUPPORT == 1)
 	else if (p_dm_odm->support_ic_type == ODM_RTL8723D) {
+		if (p_dm_fat_table->p_default_s0_s1 == NULL) {
+			p_dm_fat_table->default_s0_s1 = 1;
+			p_dm_fat_table->p_default_s0_s1 = &(p_dm_fat_table->default_s0_s1);
+		}
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("default_s0_s1 = %d\n", *p_dm_fat_table->p_default_s0_s1));
+
+		if (*(p_dm_fat_table->p_default_s0_s1) == true)
+			odm_update_rx_idle_ant(p_dm_odm, MAIN_ANT);
+		else
+			odm_update_rx_idle_ant(p_dm_odm, AUX_ANT);
+
 		if (p_dm_odm->ant_div_type == S0S1_TRX_HW_ANTDIV)
 			odm_trx_hw_ant_div_init_8723d(p_dm_odm);
 		else {
@@ -4009,7 +5102,7 @@ odm_ant_div_init(
 	/* 2 [--8811A 8821A---] */
 #if (RTL8821A_SUPPORT == 1)
 	else if (p_dm_odm->support_ic_type == ODM_RTL8821) {
-#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
+		#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
 		p_dm_odm->ant_div_type = HL_SW_SMART_ANT_TYPE1;
 
 		if (p_dm_odm->ant_div_type == HL_SW_SMART_ANT_TYPE1) {
@@ -4017,7 +5110,7 @@ odm_ant_div_init(
 			odm_trx_hw_ant_div_init_8821a(p_dm_odm);
 			phydm_hl_smart_ant_type1_init_8821a(p_dm_odm);
 		} else
-#endif
+		#endif
 		{
 			/*p_dm_odm->ant_div_type = CG_TRX_HW_ANTDIV;*/
 			p_dm_odm->ant_div_type = S0S1_SW_ANTDIV;
@@ -4091,6 +5184,19 @@ odm_ant_div_init(
 		odm_s0s1_sw_ant_div_init_8188f(p_dm_odm);
 	}
 #endif
+
+	/*[--8822B---]*/
+#if (RTL8822B_SUPPORT == 1)
+	else if (p_dm_odm->support_ic_type == ODM_RTL8822B) {
+		#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
+		p_dm_odm->ant_div_type = HL_SW_SMART_ANT_TYPE2;
+
+		if (p_dm_odm->ant_div_type == HL_SW_SMART_ANT_TYPE2)
+			phydm_hl_smart_ant_type2_init_8822b(p_dm_odm);
+		#endif
+	}
+#endif
+
 	/*
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** support_ic_type=[%lu]\n",p_dm_odm->support_ic_type));
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** AntDiv support_ability=[%lu]\n",(p_dm_odm->support_ability & ODM_BB_ANT_DIV)>>6));
@@ -4106,10 +5212,24 @@ odm_ant_div(
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _ADAPTER		*p_adapter	= p_dm_odm->adapter;
 	struct _FAST_ANTENNA_TRAINNING_			*p_dm_fat_table = &p_dm_odm->dm_fat_table;
-#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
+#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1)) || (defined(CONFIG_HL_SMART_ANTENNA_TYPE2))
 	struct _SMART_ANTENNA_TRAINNING_			*pdm_sat_table = &(p_dm_odm->dm_sat_table);
 #endif
 
+#ifdef ODM_EVM_ENHANCE_ANTDIV
+
+	if (p_dm_odm->is_linked) {
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("tp_active_occur=((%d)), EVM_method_enable=((%d))\n",
+		p_dm_odm->tp_active_occur, p_dm_fat_table->EVM_method_enable));
+
+		if ((p_dm_odm->tp_active_occur == 1) && (p_dm_fat_table->EVM_method_enable == 1)) {
+
+			p_dm_fat_table->idx_ant_div_counter_5g = p_dm_odm->antdiv_period;
+			p_dm_fat_table->idx_ant_div_counter_2g = p_dm_odm->antdiv_period;
+		}
+	}
+#endif
+
 	if (*p_dm_odm->p_band_type == ODM_BAND_5G) {
 		if (p_dm_fat_table->idx_ant_div_counter_5g <  p_dm_odm->antdiv_period) {
 			p_dm_fat_table->idx_ant_div_counter_5g++;
@@ -4144,7 +5264,7 @@ odm_ant_div(
 		p_dm_odm->data_frame_num = 0;
 	}
 
-	if (p_adapter->mgnt_info.antenna_test)
+	if (p_adapter->MgntInfo.AntennaTest)
 		return;
 
 	{
@@ -4290,7 +5410,7 @@ odm_ant_div(
 	/* 2 [--8821A---] */
 #if (RTL8821A_SUPPORT == 1)
 	else if (p_dm_odm->support_ic_type == ODM_RTL8821) {
-#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
+		#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
 		if (p_dm_odm->ant_div_type == HL_SW_SMART_ANT_TYPE1) {
 
 			if (pdm_sat_table->fix_beam_pattern_en != 0) {
@@ -4302,7 +5422,7 @@ odm_ant_div(
 			}
 
 		} else
-#endif
+		#endif
 		{
 
 			if (!p_dm_odm->is_bt_enabled) { /*BT disabled*/
@@ -4363,12 +5483,29 @@ odm_ant_div(
 	}
 #endif
 
+	/* [--8822B---]*/
+#if (RTL8822B_SUPPORT == 1)
+	else if (p_dm_odm->support_ic_type == ODM_RTL8822B) {
+		#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
+		if (p_dm_odm->ant_div_type == HL_SW_SMART_ANT_TYPE2) {
+
+			if (pdm_sat_table->fix_beam_pattern_en != 0)
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" [ SmartAnt ] Fix SmartAnt Pattern = 0x%x\n", pdm_sat_table->fix_beam_pattern_codeword));
+			else
+				phydm_fast_ant_training_hl_smart_antenna_type2(p_dm_odm);
+		}
+		#endif
+	}
+#endif
+
+
 }
 
 
 void
 odm_antsel_statistics(
 	void			*p_dm_void,
+	void			*p_phy_info_void,
 	u8			antsel_tr_mux,
 	u32			mac_id,
 	u32			utility,
@@ -4379,6 +5516,7 @@ odm_antsel_statistics(
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _FAST_ANTENNA_TRAINNING_	*p_dm_fat_table = &p_dm_odm->dm_fat_table;
+	struct _odm_phy_status_info_	*p_phy_info = (struct _odm_phy_status_info_ *)p_phy_info_void;
 
 	if (method == RSSI_METHOD) {
 
@@ -4416,63 +5554,218 @@ odm_antsel_statistics(
 	}
 #ifdef ODM_EVM_ENHANCE_ANTDIV
 	else if (method == EVM_METHOD) {
+		if (p_dm_odm->rate_ss == 1) {
+
+			if (antsel_tr_mux == ANT1_2G) {
+				p_dm_fat_table->main_ant_evm_sum[mac_id] += ((p_phy_info->rx_mimo_evm_dbm[0])<<5);
+				p_dm_fat_table->main_ant_evm_cnt[mac_id]++;
+			} else {
+				p_dm_fat_table->aux_ant_evm_sum[mac_id] += ((p_phy_info->rx_mimo_evm_dbm[0])<<5);
+				p_dm_fat_table->aux_ant_evm_cnt[mac_id]++;
+			}
+
+		} else {/*>= 2SS*/
+
+			if (antsel_tr_mux == ANT1_2G) {
+
+				p_dm_fat_table->main_ant_evm_2ss_sum[mac_id][0] += (p_phy_info->rx_mimo_evm_dbm[0]<<5);
+				p_dm_fat_table->main_ant_evm_2ss_sum[mac_id][1] += (p_phy_info->rx_mimo_evm_dbm[1]<<5);
+				p_dm_fat_table->main_ant_evm_2ss_cnt[mac_id]++;
+
+			} else {
+
+				p_dm_fat_table->aux_ant_evm_2ss_sum[mac_id][0] += (p_phy_info->rx_mimo_evm_dbm[0]<<5);
+				p_dm_fat_table->aux_ant_evm_2ss_sum[mac_id][1] += (p_phy_info->rx_mimo_evm_dbm[1]<<5);
+				p_dm_fat_table->aux_ant_evm_2ss_cnt[mac_id]++;
+			}
+		}
+
+	} else if (method == CRC32_METHOD) {
+
 		if (antsel_tr_mux == ANT1_2G) {
-			p_dm_fat_table->main_ant_evm_sum[mac_id] += (utility << 5);
-			p_dm_fat_table->main_ant_evm_cnt[mac_id]++;
+			p_dm_fat_table->main_crc32_ok_cnt += utility;
+			p_dm_fat_table->main_crc32_fail_cnt++;
 		} else {
-			p_dm_fat_table->aux_ant_evm_sum[mac_id] += (utility << 5);
-			p_dm_fat_table->aux_ant_evm_cnt[mac_id]++;
+			p_dm_fat_table->aux_crc32_ok_cnt += utility;
+			p_dm_fat_table->aux_crc32_fail_cnt++;
+		}
+
+	} else if (method == TP_METHOD) {
+		if (((utility <= ODM_RATEMCS15) && (utility >= ODM_RATEMCS0)) &&
+			(p_dm_fat_table->fat_state_cnt <= p_dm_odm->antdiv_tp_period)
+		) {
+
+			if (antsel_tr_mux == ANT1_2G) {
+				p_dm_fat_table->antdiv_tp_main += (phy_rate_table[utility])<<5;
+				p_dm_fat_table->antdiv_tp_main_cnt++;
+			} else {
+				p_dm_fat_table->antdiv_tp_aux += (phy_rate_table[utility])<<5;
+				p_dm_fat_table->antdiv_tp_aux_cnt++;
+			}
 		}
-	} else if (method == CRC32_METHOD) {
-		if (utility == 0)
-			p_dm_fat_table->crc32_fail_cnt++;
-		else
-			p_dm_fat_table->crc32_ok_cnt += utility;
 	}
 #endif
 }
 
+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
+void
+phydm_process_rssi_for_hb_smtant_type2(
+	void		*p_dm_void,
+	void		*p_phy_info_void,
+	void		*p_pkt_info_void,
+	u8		rssi_avg	
+)
+{
+	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _odm_phy_status_info_			*p_phy_info = (struct _odm_phy_status_info_ *)p_phy_info_void;
+	struct _odm_per_pkt_info_				*p_pktinfo = (struct _odm_per_pkt_info_ *)p_pkt_info_void;
+	struct _FAST_ANTENNA_TRAINNING_		*p_dm_fat_table = &p_dm_odm->dm_fat_table;
+	struct _SMART_ANTENNA_TRAINNING_	*pdm_sat_table = &(p_dm_odm->dm_sat_table);
+	u8		train_pkt_number;
+	u32		beam_tmp;
+	u8		is_cck_rate;
+	u8		rx_power_ant0 = p_phy_info->rx_mimo_signal_strength[0];
+	u8		rx_power_ant1 = p_phy_info->rx_mimo_signal_strength[1];
+	u8		rx_evm_ant0 = p_phy_info->rx_mimo_evm_dbm[0];
+	u8		rx_evm_ant1 = p_phy_info->rx_mimo_evm_dbm[1];
+	u8		rate_ss = phydm_rate_to_num_ss(p_dm_odm, p_pktinfo->data_rate);
+
+	is_cck_rate = (p_pktinfo->data_rate <= ODM_RATE11M) ? TRUE : FALSE;
+
+
+	/*[Beacon]*/
+	if (p_pktinfo->is_packet_beacon) {
+
+		pdm_sat_table->beacon_counter++;
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MatchBSSID_beacon_counter = ((%d))\n", pdm_sat_table->beacon_counter));
+
+		if (pdm_sat_table->beacon_counter >= pdm_sat_table->pre_beacon_counter + 2) {
+
+			pdm_sat_table->update_beam_idx++;
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pre_beacon_counter = ((%d)), pkt_counter = ((%d)), update_beam_idx = ((%d))\n",
+				pdm_sat_table->pre_beacon_counter, pdm_sat_table->pkt_counter, pdm_sat_table->update_beam_idx));
+			
+			pdm_sat_table->pre_beacon_counter = pdm_sat_table->beacon_counter;
+			pdm_sat_table->pkt_counter = 0;
+		}
+	}
+	/*[data]*/
+	else if (p_pktinfo->is_packet_to_self) {
+
+		if (pdm_sat_table->pkt_skip_statistic_en == 0) {
+
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ID[%d] pkt_cnt=((%d)): Beam_set = ((%d)), RSSI{A,B,avg} = {%d, %d, %d}\n",
+				p_pktinfo->station_id, pdm_sat_table->pkt_counter,  pdm_sat_table->fast_training_beam_num, rx_power_ant0, rx_power_ant1, rssi_avg));
+
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Rate_ss = ((%d)), EVM{A,B} = {%d, %d}, RX Rate =", rate_ss,  rx_evm_ant0, rx_evm_ant1));
+			phydm_print_rate(p_dm_odm, p_dm_odm->rx_rate, ODM_COMP_ANT_DIV);
+
+
+			if (pdm_sat_table->pkt_counter >= 1)  /*packet skip count*/
+			{
+				pdm_sat_table->beam_set_rssi_avg_sum[pdm_sat_table->fast_training_beam_num] += rssi_avg;
+				pdm_sat_table->statistic_pkt_cnt[pdm_sat_table->fast_training_beam_num]++;
+				
+				pdm_sat_table->beam_path_rssi_sum[pdm_sat_table->fast_training_beam_num][0] += rx_power_ant0;
+				pdm_sat_table->beam_path_rssi_sum[pdm_sat_table->fast_training_beam_num][1] += rx_power_ant1;
+
+				if (rate_ss == 2) {
+					pdm_sat_table->beam_path_evm_2ss_sum[pdm_sat_table->fast_training_beam_num][0] += rx_evm_ant0;
+					pdm_sat_table->beam_path_evm_2ss_sum[pdm_sat_table->fast_training_beam_num][1] += rx_evm_ant1;
+					pdm_sat_table->beam_path_evm_2ss_cnt[pdm_sat_table->fast_training_beam_num]++;
+				} else {
+					pdm_sat_table->beam_path_evm_1ss_sum[pdm_sat_table->fast_training_beam_num] += rx_evm_ant0;
+					pdm_sat_table->beam_path_evm_1ss_cnt[pdm_sat_table->fast_training_beam_num]++;
+				}
+			}
+			
+			pdm_sat_table->pkt_counter++;
+
+			train_pkt_number = pdm_sat_table->beam_set_train_cnt[pdm_sat_table->fast_training_beam_num];
+
+			if (pdm_sat_table->pkt_counter >= train_pkt_number) {
+
+				pdm_sat_table->update_beam_idx++;
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pre_beacon_counter = ((%d)), Update_new_beam = ((%d))\n",
+					pdm_sat_table->pre_beacon_counter, pdm_sat_table->update_beam_idx));
+				
+				pdm_sat_table->pre_beacon_counter = pdm_sat_table->beacon_counter;
+				pdm_sat_table->pkt_counter = 0;
+			}
+		}
+	}
+
+	if (pdm_sat_table->update_beam_idx > 0) {
+		
+		pdm_sat_table->update_beam_idx = 0;
+
+		if (pdm_sat_table->fast_training_beam_num >= ((u32)pdm_sat_table->total_beam_set_num - 1)) {
+
+			p_dm_fat_table->fat_state = FAT_DECISION_STATE;
+
+			#if DEV_BUS_TYPE == RT_PCI_INTERFACE
+			phydm_fast_ant_training_hl_smart_antenna_type2(p_dm_odm); /*go to make decision*/
+			#else
+			odm_schedule_work_item(&pdm_sat_table->hl_smart_antenna_decision_workitem);
+			#endif
+
+
+		} else {
+			beam_tmp = pdm_sat_table->fast_training_beam_num;
+			pdm_sat_table->fast_training_beam_num++;
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Update Beam_num (( %d )) -> (( %d ))\n", beam_tmp, pdm_sat_table->fast_training_beam_num));
+			phydm_set_rfu_beam_pattern_type2(p_dm_odm);
+			pdm_sat_table->pre_fast_training_beam_num = pdm_sat_table->fast_training_beam_num;
+
+			p_dm_fat_table->fat_state = FAT_TRAINING_STATE;
+		}
+	}
+	
+}
+#endif
 
 void
 odm_process_rssi_for_ant_div(
 	void			*p_dm_void,
 	void			*p_phy_info_void,
 	void			*p_pkt_info_void
-	/*	struct _odm_phy_status_info_*				p_phy_info, */
-	/*	struct _odm_per_pkt_info_*			p_pktinfo */
 )
 {
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _odm_phy_status_info_	*p_phy_info = (struct _odm_phy_status_info_ *)p_phy_info_void;
-	struct _odm_per_pkt_info_	*p_pktinfo = (struct _odm_per_pkt_info_ *)p_pkt_info_void;
-	u8			is_cck_rate = 0, cck_max_rate = ODM_RATE11M;
-	struct _FAST_ANTENNA_TRAINNING_			*p_dm_fat_table = &p_dm_odm->dm_fat_table;
-#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
-	struct _SMART_ANTENNA_TRAINNING_			*pdm_sat_table = &(p_dm_odm->dm_sat_table);
+	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _odm_phy_status_info_			*p_phy_info = (struct _odm_phy_status_info_ *)p_phy_info_void;
+	struct _odm_per_pkt_info_				*p_pktinfo = (struct _odm_per_pkt_info_ *)p_pkt_info_void;
+	struct _FAST_ANTENNA_TRAINNING_		*p_dm_fat_table = &p_dm_odm->dm_fat_table;
+#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1)) || (defined(CONFIG_HL_SMART_ANTENNA_TYPE2))
+	struct _SMART_ANTENNA_TRAINNING_	*pdm_sat_table = &(p_dm_odm->dm_sat_table);
 	u32			beam_tmp;
 	u8			next_ant;
 	u8			train_pkt_number;
 #endif
+	u8			is_cck_rate = FALSE;
+	u8			rx_power_ant0 = p_phy_info->rx_mimo_signal_strength[0];
+	u8			rx_power_ant1 = p_phy_info->rx_mimo_signal_strength[1];
+	u8			rx_evm_ant0 = p_phy_info->rx_mimo_signal_quality[0];
+	u8			rx_evm_ant1 = p_phy_info->rx_mimo_signal_quality[1];
+	u8			rssi_avg;
 
-#if (DM_ODM_SUPPORT_TYPE &  (ODM_WIN))
-	u32			rx_power_ant0, rx_power_ant1;
-	u32			rx_evm_ant0, rx_evm_ant1;
-#else
-	u8			rx_power_ant0, rx_power_ant1;
-	u8			rx_evm_ant0, rx_evm_ant1;
-#endif
-
-	cck_max_rate = ODM_RATE11M;
-	is_cck_rate = (p_pktinfo->data_rate <= cck_max_rate) ? true : false;
+	is_cck_rate = (p_pktinfo->data_rate <= ODM_RATE11M) ? TRUE : FALSE;
 
-	if ((p_dm_odm->support_ic_type & (ODM_RTL8192E | ODM_RTL8812)) && (p_pktinfo->data_rate > cck_max_rate)) {
-		rx_power_ant0 = p_phy_info->rx_mimo_signal_strength[0];
-		rx_power_ant1 = p_phy_info->rx_mimo_signal_strength[1];
+	if ((p_dm_odm->support_ic_type & ODM_IC_2SS) && (!is_cck_rate)) {
 
-		rx_evm_ant0 = p_phy_info->rx_mimo_signal_quality[0];
-		rx_evm_ant1 = p_phy_info->rx_mimo_signal_quality[1];
+		if (rx_power_ant1 < 100)
+			rssi_avg = (u8)odm_convert_to_db((odm_convert_to_linear(rx_power_ant0) + odm_convert_to_linear(rx_power_ant1))>>1); /*averaged PWDB*/
+		
+	} else {
+		rx_power_ant0 = (u8)p_phy_info->rx_pwdb_all;
+		rssi_avg = rx_power_ant0;
+	}
+	
+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
+	if ((p_dm_odm->ant_div_type == HL_SW_SMART_ANT_TYPE2) && (p_dm_fat_table->fat_state == FAT_TRAINING_STATE)) {
+			/*for 8822B*/
+			phydm_process_rssi_for_hb_smtant_type2(p_dm_odm, p_phy_info, p_pktinfo, rssi_avg);
 	} else
-		rx_power_ant0 = p_phy_info->rx_pwdb_all;
+#endif
 
 #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
 #ifdef CONFIG_FAT_PATCH
@@ -4515,11 +5808,11 @@ odm_process_rssi_for_ant_div(
 				pdm_sat_table->pkt_rssi_cnt[p_dm_fat_table->antsel_rx_keep_0][pdm_sat_table->fast_training_beam_num]++;
 				pdm_sat_table->pkt_counter++;
 
-#if 1
+				#if 1
 				train_pkt_number = pdm_sat_table->beam_train_cnt[p_dm_fat_table->rx_idle_ant - 1][pdm_sat_table->fast_training_beam_num];
-#else
+				#else
 				train_pkt_number =  pdm_sat_table->per_beam_training_pkt_num;
-#endif
+				#endif
 
 				/*Swich Antenna erery N pkts*/
 				if (pdm_sat_table->pkt_counter == train_pkt_number) {
@@ -4552,11 +5845,11 @@ odm_process_rssi_for_ant_div(
 
 				p_dm_fat_table->fat_state = FAT_DECISION_STATE;
 
-#if DEV_BUS_TYPE == RT_PCI_INTERFACE
+				#if DEV_BUS_TYPE == RT_PCI_INTERFACE
 				odm_fast_ant_training_hl_smart_antenna_type1(p_dm_odm);
-#else
+				#else
 				odm_schedule_work_item(&pdm_sat_table->hl_smart_antenna_decision_workitem);
-#endif
+				#endif
 
 
 			} else {
@@ -4600,11 +5893,11 @@ odm_process_rssi_for_ant_div(
 
 						p_dm_fat_table->fat_state = FAT_DECISION_STATE;
 
-#if DEV_BUS_TYPE == RT_PCI_INTERFACE
+						#if DEV_BUS_TYPE == RT_PCI_INTERFACE
 						odm_fast_ant_training_hl_smart_antenna_type1(p_dm_odm);
-#else
+						#else
 						odm_schedule_work_item(&pdm_sat_table->hl_smart_antenna_decision_workitem);
-#endif
+						#endif
 
 
 					} else {
@@ -4633,37 +5926,24 @@ odm_process_rssi_for_ant_div(
 
 				if (p_dm_odm->ant_div_type == S0S1_SW_ANTDIV) {
 
-					if (is_cck_rate) {
-
+					if (is_cck_rate || (p_dm_odm->support_ic_type == ODM_RTL8188F))
 						p_dm_fat_table->antsel_rx_keep_0 = (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? ANT1_2G : ANT2_2G;
 
-						if (p_dm_fat_table->antsel_rx_keep_0 == ANT1_2G)
-							p_dm_fat_table->CCK_counter_main++;
-						else
-							p_dm_fat_table->CCK_counter_aux++;
-
-						odm_antsel_statistics(p_dm_odm, p_dm_fat_table->antsel_rx_keep_0, p_pktinfo->station_id, rx_power_ant0, RSSI_METHOD, is_cck_rate);
+						odm_antsel_statistics(p_dm_odm, p_phy_info, p_dm_fat_table->antsel_rx_keep_0, p_pktinfo->station_id, rx_power_ant0, RSSI_METHOD, is_cck_rate);
 
-					} else {
-
-						if (p_dm_fat_table->antsel_rx_keep_0 == ANT1_2G)
-							p_dm_fat_table->OFDM_counter_main++;
-						else
-							p_dm_fat_table->OFDM_counter_aux++;
-
-						odm_antsel_statistics(p_dm_odm, p_dm_fat_table->antsel_rx_keep_0, p_pktinfo->station_id, rx_power_ant0, RSSI_METHOD, is_cck_rate);
-					}
 				} else {
+					
+					odm_antsel_statistics(p_dm_odm, p_phy_info, p_dm_fat_table->antsel_rx_keep_0, p_pktinfo->station_id, rx_power_ant0, RSSI_METHOD, is_cck_rate);
 
-					odm_antsel_statistics(p_dm_odm, p_dm_fat_table->antsel_rx_keep_0, p_pktinfo->station_id, rx_power_ant0, RSSI_METHOD, is_cck_rate);
-
-#ifdef ODM_EVM_ENHANCE_ANTDIV
+					#ifdef ODM_EVM_ENHANCE_ANTDIV
 					if (p_dm_odm->support_ic_type == ODM_RTL8192E) {
-						if (!is_cck_rate)
-							odm_antsel_statistics(p_dm_odm, p_dm_fat_table->antsel_rx_keep_0, p_pktinfo->station_id, rx_evm_ant0, EVM_METHOD, is_cck_rate);
+						if (!is_cck_rate) {
+							odm_antsel_statistics(p_dm_odm, p_phy_info, p_dm_fat_table->antsel_rx_keep_0, p_pktinfo->station_id, rx_evm_ant0, EVM_METHOD, is_cck_rate);
+							odm_antsel_statistics(p_dm_odm, p_phy_info, p_dm_fat_table->antsel_rx_keep_0, p_pktinfo->station_id, rx_evm_ant0, TP_METHOD, is_cck_rate);
+						}
 
 					}
-#endif
+					#endif
 				}
 			}
 		}
@@ -4727,9 +6007,8 @@ odm_set_tx_ant_by_tx_info(
 	unsigned short			aid
 )
 {
-	struct PHY_DM_STRUCT	*p_dm_odm = &(priv->pshare->_dmodm);
-	struct _FAST_ANTENNA_TRAINNING_		*p_dm_fat_table = &priv->pshare->_dmodm.dm_fat_table;
-	u32		support_ic_type = priv->pshare->_dmodm.support_ic_type;
+	struct PHY_DM_STRUCT	*p_dm_odm = GET_PDM_ODM(priv);/*&(priv->pshare->_dmODM);*/
+	struct _FAST_ANTENNA_TRAINNING_		*p_dm_fat_table = &(p_dm_odm->dm_fat_table);
 
 	if (!(p_dm_odm->support_ability & ODM_BB_ANT_DIV))
 		return;
@@ -4737,36 +6016,36 @@ odm_set_tx_ant_by_tx_info(
 	if (p_dm_odm->ant_div_type == CGCS_RX_HW_ANTDIV)
 		return;
 
-	if (support_ic_type == ODM_RTL8881A) {
+	if (p_dm_odm->support_ic_type == ODM_RTL8881A) {
 		/*panic_printk("[%s] [%d]   ******ODM_SetTxAntByTxInfo_8881E******\n",__FUNCTION__,__LINE__);	*/
-		pdesc->dword6 &= set_desc(~(BIT(18) | BIT(17) | BIT(16)));
-		pdesc->dword6 |= set_desc(p_dm_fat_table->antsel_a[aid] << 16);
-	} else if (support_ic_type == ODM_RTL8192E) {
+		pdesc->Dword6 &= set_desc(~(BIT(18) | BIT(17) | BIT(16)));
+		pdesc->Dword6 |= set_desc(p_dm_fat_table->antsel_a[aid] << 16);
+	} else if (p_dm_odm->support_ic_type == ODM_RTL8192E) {
 		/*panic_printk("[%s] [%d]   ******ODM_SetTxAntByTxInfo_8192E******\n",__FUNCTION__,__LINE__);	*/
-		pdesc->dword6 &= set_desc(~(BIT(18) | BIT(17) | BIT(16)));
-		pdesc->dword6 |= set_desc(p_dm_fat_table->antsel_a[aid] << 16);
-	} else if (support_ic_type == ODM_RTL8188E) {
+		pdesc->Dword6 &= set_desc(~(BIT(18) | BIT(17) | BIT(16)));
+		pdesc->Dword6 |= set_desc(p_dm_fat_table->antsel_a[aid] << 16);
+	} else if (p_dm_odm->support_ic_type == ODM_RTL8188E) {
 		/*panic_printk("[%s] [%d]   ******ODM_SetTxAntByTxInfo_8188E******\n",__FUNCTION__,__LINE__);*/
-		pdesc->dword2 &= set_desc(~BIT(24));
-		pdesc->dword2 &= set_desc(~BIT(25));
-		pdesc->dword7 &= set_desc(~BIT(29));
+		pdesc->Dword2 &= set_desc(~BIT(24));
+		pdesc->Dword2 &= set_desc(~BIT(25));
+		pdesc->Dword7 &= set_desc(~BIT(29));
 
-		pdesc->dword2 |= set_desc(p_dm_fat_table->antsel_a[aid] << 24);
-		pdesc->dword2 |= set_desc(p_dm_fat_table->antsel_b[aid] << 25);
-		pdesc->dword7 |= set_desc(p_dm_fat_table->antsel_c[aid] << 29);
+		pdesc->Dword2 |= set_desc(p_dm_fat_table->antsel_a[aid] << 24);
+		pdesc->Dword2 |= set_desc(p_dm_fat_table->antsel_b[aid] << 25);
+		pdesc->Dword7 |= set_desc(p_dm_fat_table->antsel_c[aid] << 29);
 
 
-	} else if (support_ic_type == ODM_RTL8812) {
+	} else if (p_dm_odm->support_ic_type == ODM_RTL8812) {
 		/*[path-A]*/
 		/*panic_printk("[%s] [%d]   ******ODM_SetTxAntByTxInfo_8881E******\n",__FUNCTION__,__LINE__);*/
 
-		pdesc->dword6 &= set_desc(~BIT(16));
-		pdesc->dword6 &= set_desc(~BIT(17));
-		pdesc->dword6 &= set_desc(~BIT(18));
+		pdesc->Dword6 &= set_desc(~BIT(16));
+		pdesc->Dword6 &= set_desc(~BIT(17));
+		pdesc->Dword6 &= set_desc(~BIT(18));
 
-		pdesc->dword6 |= set_desc(p_dm_fat_table->antsel_a[aid] << 16);
-		pdesc->dword6 |= set_desc(p_dm_fat_table->antsel_b[aid] << 17);
-		pdesc->dword6 |= set_desc(p_dm_fat_table->antsel_c[aid] << 18);
+		pdesc->Dword6 |= set_desc(p_dm_fat_table->antsel_a[aid] << 16);
+		pdesc->Dword6 |= set_desc(p_dm_fat_table->antsel_b[aid] << 17);
+		pdesc->Dword6 |= set_desc(p_dm_fat_table->antsel_c[aid] << 18);
 
 	}
 }
@@ -4780,9 +6059,8 @@ odm_set_tx_ant_by_tx_info_hal(
 	u16					aid
 )
 {
-	struct PHY_DM_STRUCT	*p_dm_odm = &(priv->pshare->_dmodm);
-	struct _FAST_ANTENNA_TRAINNING_		*p_dm_fat_table = &priv->pshare->_dmodm.dm_fat_table;
-	u32		support_ic_type = priv->pshare->_dmodm.support_ic_type;
+	struct PHY_DM_STRUCT	*p_dm_odm = GET_PDM_ODM(priv);/*&(priv->pshare->_dmODM);*/
+	struct _FAST_ANTENNA_TRAINNING_		*p_dm_fat_table = &(p_dm_odm->dm_fat_table);
 	PTX_DESC_DATA_88XX	pdescdata = (PTX_DESC_DATA_88XX)pdesc_data;
 
 	if (!(p_dm_odm->support_ability & ODM_BB_ANT_DIV))
@@ -4791,7 +6069,7 @@ odm_set_tx_ant_by_tx_info_hal(
 	if (p_dm_odm->ant_div_type == CGCS_RX_HW_ANTDIV)
 		return;
 
-	if (support_ic_type == ODM_RTL8881A || support_ic_type == ODM_RTL8192E || support_ic_type == ODM_RTL8814A) {
+	if (p_dm_odm->support_ic_type & (ODM_RTL8881A |ODM_RTL8192E |ODM_RTL8814A)) {
 		/*panic_printk("[%s] [%d] ******odm_set_tx_ant_by_tx_info_hal******\n",__FUNCTION__,__LINE__);*/
 		pdescdata->ant_sel = 1;
 		pdescdata->ant_sel_a = p_dm_fat_table->antsel_a[aid];
@@ -5040,14 +6318,14 @@ odm_antenna_diversity_init(
 	void		*p_dm_void
 )
 {
+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 
 #if 0
-	if (p_dm_odm->mp_mode == true)
+	if (*(p_dm_odm->p_mp_mode) == true)
 		return;
 #endif
 
-#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
 	odm_ant_div_config(p_dm_odm);
 	odm_ant_div_init(p_dm_odm);
 #endif
@@ -5059,7 +6337,7 @@ odm_antenna_diversity(
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	if (p_dm_odm->mp_mode == true)
+	if (*(p_dm_odm->p_mp_mode) == true)
 		return;
 
 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
diff --git a/rtl8822BU/hal/phydm/phydm_antdiv.h b/rtl8822BU/hal/phydm/phydm_antdiv.h
index cae951d..175b59d 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_antdiv.h
+++ b/rtl8822BU/hal/phydm/phydm_antdiv.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef	__PHYDMANTDIV_H__
 #define    __PHYDMANTDIV_H__
@@ -44,13 +39,15 @@
 #define	AUX_ANT		2		/*AntB or ant Aux   or S0*/
 #define	MAX_ANT		3		/* 3 for AP using*/
 
-#define ANT1_2G 0 /* = ANT2_5G              for 8723D  BTG S1 RX S0S1 diversity for 8723D, TX fixed at S1 */
-#define ANT2_2G 1 /* = ANT1_5G             for 8723D  BTG S0  RX S0S1 diversity for 8723D, TX fixed at S1 */
+#define ANT1_2G 0 /* = ANT2_5G	for 8723D  BTG S1 RX S0S1 diversity for 8723D, TX fixed at S1 */
+#define ANT2_2G 1 /* = ANT1_5G	for 8723D  BTG S0  RX S0S1 diversity for 8723D, TX fixed at S1 */
 /*smart antenna*/
 #define SUPPORT_RF_PATH_NUM 4
 #define SUPPORT_BEAM_PATTERN_NUM 4
 #define NUM_ANTENNA_8821A	2
 
+#define SUPPORT_BEAM_SET_PATTERN_NUM		16
+
 #define	NO_FIX_TX_ANT		0
 #define	FIX_TX_AT_MAIN	1
 #define	FIX_AUX_AT_MAIN	2
@@ -61,10 +58,10 @@
 #define	ODM_FIX_AUX_ANT	2
 
 #define ODM_N_ANTDIV_SUPPORT		(ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8188F | ODM_RTL8723D | ODM_RTL8195A)
-#define ODM_AC_ANTDIV_SUPPORT	(ODM_RTL8821 | ODM_RTL8881A | ODM_RTL8812 | ODM_RTL8821C)
+#define ODM_AC_ANTDIV_SUPPORT	(ODM_RTL8821 | ODM_RTL8881A | ODM_RTL8812 | ODM_RTL8821C | ODM_RTL8822B | ODM_RTL8814B)
 #define ODM_ANTDIV_SUPPORT		(ODM_N_ANTDIV_SUPPORT | ODM_AC_ANTDIV_SUPPORT)
 #define ODM_SMART_ANT_SUPPORT	(ODM_RTL8188E | ODM_RTL8192E)
-#define ODM_HL_SMART_ANT_TYPE1_SUPPORT		(ODM_RTL8821)
+#define ODM_HL_SMART_ANT_TYPE1_SUPPORT		(ODM_RTL8821 | ODM_RTL8822B)
 
 #define ODM_ANTDIV_2G_SUPPORT_IC			(ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8881A | ODM_RTL8188F | ODM_RTL8723D)
 #define ODM_ANTDIV_5G_SUPPORT_IC			(ODM_RTL8821 | ODM_RTL8881A | ODM_RTL8812 | ODM_RTL8821C)
@@ -83,9 +80,10 @@
 #define TX_BY_DESC	1
 #define TX_BY_REG	0
 
-#define RSSI_METHOD		0
+#define RSSI_METHOD	0
 #define EVM_METHOD		1
 #define CRC32_METHOD	2
+#define TP_METHOD		3
 
 #define INIT_ANTDIV_TIMMER		0
 #define CANCEL_ANTDIV_TIMMER	1
@@ -149,7 +147,7 @@ struct _sw_antenna_switch_ {
 	u8		train_time_flag; /*base on RSSI difference between two antennas*/
 	struct timer_list	phydm_sw_antenna_switch_timer;
 	u32		pkt_cnt_sw_ant_div_by_ctrl_frame;
-	bool		is_sw_ant_div_by_ctrl_frame;
+	boolean		is_sw_ant_div_by_ctrl_frame;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 #if USE_WORKITEM
@@ -164,10 +162,10 @@ struct _sw_antenna_switch_ {
 	u16		retry_counter;
 	u8		swas_no_link_state;
 	u32		swas_no_link_bk_reg948;
-	bool		ANTA_ON;	/*To indicate ant A is or not*/
-	bool		ANTB_ON;	/*To indicate ant B is on or not*/
-	bool		pre_aux_fail_detec;
-	bool		rssi_ant_dect_result;
+	boolean		ANTA_ON;	/*To indicate ant A is or not*/
+	boolean		ANTB_ON;	/*To indicate ant B is on or not*/
+	boolean		pre_aux_fail_detec;
+	boolean		rssi_ant_dect_result;
 	u8		ant_5g;
 	u8		ant_2g;
 
@@ -178,8 +176,8 @@ struct _sw_antenna_switch_ {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
 struct _BF_DIV_COEX_ {
-	bool w_bfer_client[ODM_ASSOCIATE_ENTRY_NUM];
-	bool w_bfee_client[ODM_ASSOCIATE_ENTRY_NUM];
+	boolean w_bfer_client[ODM_ASSOCIATE_ENTRY_NUM];
+	boolean w_bfee_client[ODM_ASSOCIATE_ENTRY_NUM];
 	u32	MA_rx_TP[ODM_ASSOCIATE_ENTRY_NUM];
 	u32	MA_rx_TP_DIV[ODM_ASSOCIATE_ENTRY_NUM];
 
@@ -197,51 +195,88 @@ struct _BF_DIV_COEX_ {
 	u8 num_bf_tar;
 	u8 num_div_tar;
 
-	bool is_all_div_sta_idle;
-	bool is_all_bf_sta_idle;
-	bool bdc_try_flag;
-	bool BF_pass;
-	bool DIV_pass;
+	boolean is_all_div_sta_idle;
+	boolean is_all_bf_sta_idle;
+	boolean bdc_try_flag;
+	boolean BF_pass;
+	boolean DIV_pass;
 };
 #endif
 #endif
 
-#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
+#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1)) || (defined(CONFIG_HL_SMART_ANTENNA_TYPE2))
 struct _SMART_ANTENNA_TRAINNING_ {
 	u32	latch_time;
-	bool	pkt_skip_statistic_en;
+	boolean	pkt_skip_statistic_en;
 	u32	fix_beam_pattern_en;
 	u32	fix_training_num_en;
 	u32	fix_beam_pattern_codeword;
 	u32	update_beam_codeword;
-	u32	ant_num; /*number of used smart beam antenna*/
-	u32	ant_num_total;/*number of total smart beam antenna*/
+	u32	ant_num; /*number of "used" smart beam antenna*/
+	u32	ant_num_total;/*number of "total" smart beam antenna*/
 	u32	first_train_ant; /*decide witch antenna to train first*/
+
+	#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
+	u32	pkt_rssi_pre[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM];/*rssi of each path with a certain beam pattern*/
+	u8	beam_train_rssi_diff[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM];
+	u8	beam_train_cnt[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM];
 	u32	rfu_codeword_table[4]; /*2G beam truth table*/
 	u32	rfu_codeword_table_5g[4]; /*5G beam truth table*/
 	u32	beam_patten_num_each_ant;/*number of  beam can be switched in each antenna*/
-	u32	data_codeword_bit_num;
-	u8	per_beam_training_pkt_num;
-	u8	decision_holding_period;
-	u8	pkt_counter;
-	u32	fast_training_beam_num;
-	u32	pre_fast_training_beam_num;
-	u32	pkt_rssi_pre[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM];
-	u8	beam_train_cnt[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM];
-	u8	beam_train_rssi_diff[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM];
+	u32	rx_idle_beam[SUPPORT_RF_PATH_NUM];
 	u32	pkt_rssi_sum[8][SUPPORT_BEAM_PATTERN_NUM];
 	u32	pkt_rssi_cnt[8][SUPPORT_BEAM_PATTERN_NUM];
-	u32	rx_idle_beam[SUPPORT_RF_PATH_NUM];
+	#endif
+	
+	u32	fast_training_beam_num;/*current training beam_set index*/
+	u32	pre_fast_training_beam_num;/*pre training beam_set index*/
+	u32	rfu_codeword_total_bit_num; /* total bit number of RFU protocol*/
+	u32	rfu_each_ant_bit_num; /* bit number of RFU protocol for each ant*/
+	u8	per_beam_training_pkt_num;
+	u8	decision_holding_period;
+	
+	
 	u32	pre_codeword;
-	bool	force_update_beam_en;
+	boolean	force_update_beam_en;
 	u32	beacon_counter;
 	u32	pre_beacon_counter;
-	u8	update_beam_idx;
+	u8	pkt_counter;		/*packet number that each beam-set should be colected in training state*/
+	u8	update_beam_idx;	/*the index announce that the beam can be updated*/
+	u8	rfu_protocol_type;
+	u16	rfu_protocol_delay_time;
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+	#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	RT_WORK_ITEM	hl_smart_antenna_workitem;
 	RT_WORK_ITEM	hl_smart_antenna_decision_workitem;
-#endif
+	#endif
+
+
+	#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
+	u8	beam_set_avg_rssi_pre[SUPPORT_BEAM_SET_PATTERN_NUM];		/*avg pre_rssi of each beam set*/
+	u8	beam_set_train_val_diff[SUPPORT_BEAM_SET_PATTERN_NUM];	/*rssi of a beam pattern set, ex: a set = {ant1_beam=1, ant2_beam=3}*/
+	u8	beam_set_train_cnt[SUPPORT_BEAM_SET_PATTERN_NUM];			/*training pkt num of each beam set*/
+	u32	beam_set_rssi_avg_sum[SUPPORT_BEAM_SET_PATTERN_NUM];			/*RSSI_sum of avg(pathA,pathB) for each beam-set)*/
+	u32	beam_path_rssi_sum[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B];/*RSSI_sum of each path for each beam-set)*/
+
+	u8	beam_set_avg_evm_2ss_pre[SUPPORT_BEAM_SET_PATTERN_NUM];	
+	u32	beam_path_evm_2ss_sum[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B];/*2SS evm_sum of each path for each beam-set)*/
+	u32	beam_path_evm_2ss_cnt[SUPPORT_BEAM_SET_PATTERN_NUM];
+
+	u8	beam_set_avg_evm_1ss_pre[SUPPORT_BEAM_SET_PATTERN_NUM];
+	u32	beam_path_evm_1ss_sum[SUPPORT_BEAM_SET_PATTERN_NUM];/*1SS evm_sum of each path for each beam-set)*/
+	u32	beam_path_evm_1ss_cnt[SUPPORT_BEAM_SET_PATTERN_NUM];
+	
+	u32	statistic_pkt_cnt[SUPPORT_BEAM_SET_PATTERN_NUM];				/*statistic_pkt_cnt for SmtAnt make decision*/
+	
+	u8	total_beam_set_num;	/*number of  beam set can be switched*/
+	u8	total_beam_set_num_2g;/*number of  beam set can be switched in 2G*/
+	u8	total_beam_set_num_5g;/*number of  beam set can be switched in 5G*/
+
+	u8	rfu_codeword_table_2g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B]; /*2G beam truth table*/
+	u8	rfu_codeword_table_5g[SUPPORT_BEAM_SET_PATTERN_NUM][MAX_PATH_NUM_8822B]; /*5G beam truth table*/
+	u8	rx_idle_beam_set_idx;	/*the filanl decsion result*/
+	#endif
+	
 
 };
 #endif
@@ -256,6 +291,7 @@ struct _FAST_ANTENNA_TRAINNING_ {
 	u32	ant_rssi_cnt[7];
 	u32	ant_ave_rssi[7];
 	u8	fat_state;
+	u8	fat_state_cnt;
 	u32	train_idx;
 	u8	antsel_a[ODM_ASSOCIATE_ENTRY_NUM];
 	u8	antsel_b[ODM_ASSOCIATE_ENTRY_NUM];
@@ -270,24 +306,29 @@ struct _FAST_ANTENNA_TRAINNING_ {
 	u16	aux_ant_cnt_cck[ODM_ASSOCIATE_ENTRY_NUM];
 	u8	rx_idle_ant;
 	u8	ant_div_on_off;
-	bool	is_become_linked;
+	boolean	is_become_linked;
 	u32	min_max_rssi;
 	u8	idx_ant_div_counter_2g;
 	u8	idx_ant_div_counter_5g;
 	u8	ant_div_2g_5g;
-	u32    CCK_counter_main;
-	u32    CCK_counter_aux;
-	u32    OFDM_counter_main;
-	u32    OFDM_counter_aux;
 
 #ifdef ODM_EVM_ENHANCE_ANTDIV
+	/*For 1SS RX phy rate*/
 	u32	main_ant_evm_sum[ODM_ASSOCIATE_ENTRY_NUM];
 	u32	aux_ant_evm_sum[ODM_ASSOCIATE_ENTRY_NUM];
 	u32	main_ant_evm_cnt[ODM_ASSOCIATE_ENTRY_NUM];
 	u32	aux_ant_evm_cnt[ODM_ASSOCIATE_ENTRY_NUM];
-	bool	EVM_method_enable;
+
+	/*For 2SS RX phy rate*/
+	u32	main_ant_evm_2ss_sum[ODM_ASSOCIATE_ENTRY_NUM][2];	/*2SS with A1+B*/
+	u32	aux_ant_evm_2ss_sum[ODM_ASSOCIATE_ENTRY_NUM][2];	/*2SS with A2+B*/
+	u32	main_ant_evm_2ss_cnt[ODM_ASSOCIATE_ENTRY_NUM];
+	u32	aux_ant_evm_2ss_cnt[ODM_ASSOCIATE_ENTRY_NUM];
+
+	boolean	EVM_method_enable;
 	u8	target_ant_evm;
 	u8	target_ant_crc32;
+	u8	target_ant_tp;
 	u8	target_ant_enhance;
 	u8	pre_target_ant_enhance;
 	u16	main_mpdu_ok_cnt;
@@ -299,6 +340,14 @@ struct _FAST_ANTENNA_TRAINNING_ {
 	u32	aux_crc32_ok_cnt;
 	u32	main_crc32_fail_cnt;
 	u32	aux_crc32_fail_cnt;
+
+	u32	antdiv_tp_main;
+	u32	antdiv_tp_aux;
+	u32	antdiv_tp_main_cnt;
+	u32	antdiv_tp_aux_cnt;
+
+	u8	pre_antdiv_rssi;
+	u8	pre_antdiv_tp;
 #endif
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 	u32    cck_ctrl_frame_cnt_main;
@@ -311,12 +360,14 @@ struct _FAST_ANTENNA_TRAINNING_ {
 	u32	aux_ant_ctrl_frame_cnt;
 #endif
 	u8	b_fix_tx_ant;
-	bool	fix_ant_bfee;
-	bool	enable_ctrl_frame_antdiv;
-	bool	use_ctrl_frame_antdiv;
+	boolean	fix_ant_bfee;
+	boolean	enable_ctrl_frame_antdiv;
+	boolean	use_ctrl_frame_antdiv;
 	u8	hw_antsw_occur;
 	u8	*p_force_tx_ant_by_desc;
 	u8	force_tx_ant_by_desc; /*A temp value, will hook to driver team's outer parameter later*/
+	u8    *p_default_s0_s1;
+	u8    default_s0_s1;
 };
 
 
@@ -343,7 +394,8 @@ enum ant_div_type_e {
 	CGCS_RX_SW_ANTDIV	= 0x05,
 	S0S1_SW_ANTDIV          = 0x06, /*8723B intrnal switch S0 S1*/
 	S0S1_TRX_HW_ANTDIV     = 0x07, /*TRX S0S1 diversity for 8723D*/
-	HL_SW_SMART_ANT_TYPE1	= 0x10 /*Hong-Lin Smart antenna use for 8821AE which is a 2 ant. entitys, and each ant. is equipped with 4 antenna patterns*/
+	HL_SW_SMART_ANT_TYPE1	= 0x10, /*Hong-Lin Smart antenna use for 8821AE which is a 2 ant. entitys, and each ant. is equipped with 4 antenna patterns*/
+	HL_SW_SMART_ANT_TYPE2	= 0x11 /*Hong-Bo Smart antenna use for 8822B which is a 2 ant. entitys*/
 };
 
 
@@ -378,6 +430,12 @@ void odm_sw_ant_div_rest_after_link(
 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
 
 void
+phydm_antdiv_reset_statistic(
+	void	*p_dm_void,
+	u32	macid
+);
+
+void
 odm_update_rx_idle_ant(
 	void		*p_dm_void,
 	u8		ant
@@ -409,6 +467,14 @@ phydm_set_tx_ant_pwr_8723d(
 	u8			ant
 );
 
+void
+odm_update_rx_idle_ant_8723d(
+	void			*p_dm_void,
+	u8			ant,
+	u32			default_ant,
+	u32			optional_ant
+);
+
 #endif
 
 #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
@@ -462,6 +528,11 @@ odm_s0s1_sw_ant_div_by_ctrl_frame_process_rssi(
 #endif
 
 #ifdef ODM_EVM_ENHANCE_ANTDIV
+VOID
+phydm_evm_sw_antdiv_init(
+	void		*p_dm_void
+);
+
 void
 odm_evm_fast_ant_training_callback(
 	void		*p_dm_void
@@ -491,7 +562,7 @@ odm_fast_ant_training_work_item_callback(
 #endif
 
 
-#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
+#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1)) || (defined(CONFIG_HL_SMART_ANTENNA_TYPE2))
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 void
@@ -506,6 +577,34 @@ phydm_beam_decision_workitem_callback(
 
 #endif
 
+
+
+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
+
+void
+phydm_update_beam_pattern_type2(
+	void		*p_dm_void,
+	u32		codeword,
+	u32		codeword_length
+);
+
+void
+phydm_set_rfu_beam_pattern_type2(
+	void		*p_dm_void
+);
+
+void
+phydm_hl_smart_ant_debug_type2(
+	void		*p_dm_void,
+	char		input[][16],
+	u32		*_used,
+	char		*output,
+	u32		*_out_len,
+	u32		input_num
+);
+
+#elif (defined(CONFIG_HL_SMART_ANTENNA_TYPE1))
+
 void
 phydm_update_beam_pattern(
 	void		*p_dm_void,
@@ -521,13 +620,17 @@ phydm_set_all_ant_same_beam_num(
 void
 phydm_hl_smart_ant_debug(
 	void		*p_dm_void,
-	u32		*const dm_value,
+	char		input[][16],
 	u32		*_used,
-	char			*output,
-	u32		*_out_len
+	char		*output,
+	u32		*_out_len,
+	u32		input_num
 );
 
-#endif/*#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1*/
+#endif
+
+
+#endif/*#if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1)) || (defined(CONFIG_HL_SMART_ANTENNA_TYPE2))*/
 
 void
 odm_ant_div_init(
@@ -542,6 +645,7 @@ odm_ant_div(
 void
 odm_antsel_statistics(
 	void			*p_dm_void,
+	void			*p_phy_info_void,
 	u8			antsel_tr_mux,
 	u32			mac_id,
 	u32			utility,
diff --git a/rtl8822BU/hal/phydm/phydm_beamforming.c b/rtl8822BU/hal/phydm/phydm_beamforming.c
index eecbaa1..0587e3b 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_beamforming.c
+++ b/rtl8822BU/hal/phydm/phydm_beamforming.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
@@ -20,40 +34,42 @@ phydm_sta_info_init(
 	struct sta_info					*p_sta = p_dm_odm->p_odm_sta_info[sta_idx];
 	struct _ADAPTER					*adapter = p_dm_odm->adapter;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	PMGNT_INFO					p_mgnt_info = &adapter->mgnt_info;
-	PRT_HIGH_THROUGHPUT		p_ht_info = GET_HT_INFO(p_mgnt_info);
-	PRT_VERY_HIGH_THROUGHPUT	p_vht_info = GET_VHT_INFO(p_mgnt_info);
-
-	odm_move_memory(p_dm_odm, p_entry->my_mac_addr, adapter->current_address, 6);
+	PMGNT_INFO					p_MgntInfo = &adapter->MgntInfo;
+	PRT_HIGH_THROUGHPUT		p_ht_info = GET_HT_INFO(p_MgntInfo);
+	PRT_VERY_HIGH_THROUGHPUT	p_vht_info = GET_VHT_INFO(p_MgntInfo);
+	u1Byte						iotpeer = 0;
 
-	p_entry->ht_beamform_cap = p_ht_info->ht_beamform_cap;
-	p_entry->vht_beamform_cap = p_vht_info->vht_beamform_cap;
+	iotpeer = p_MgntInfo->IOTPeer;
+	odm_move_memory(p_dm_odm, p_entry->my_mac_addr, adapter->CurrentAddress, 6);
 
+	p_entry->ht_beamform_cap = p_ht_info->HtBeamformCap;
+	p_entry->vht_beamform_cap = p_vht_info->VhtBeamformCap;
+	
 	/*IBSS, AP mode*/
 	if (sta_idx != 0) {
-		p_entry->AID = p_sta->AID;
-		p_entry->RA = p_sta->mac_addr;
-		p_entry->mac_id = p_sta->associated_mac_id;
-		p_entry->wireless_mode = p_sta->wireless_mode;
-		p_entry->BW = p_sta->band_width;
-		p_entry->cur_beamform = p_sta->ht_info.ht_cur_beamform;
+		p_entry->aid = p_sta->AID;
+		p_entry->ra = p_sta->MacAddr;
+		p_entry->mac_id = p_sta->AssociatedMacId;
+		p_entry->wireless_mode = p_sta->WirelessMode;
+		p_entry->bw = p_sta->BandWidth;
+		p_entry->cur_beamform = p_sta->HTInfo.HtCurBeamform;
 	} else {/*client mode*/
-		p_entry->AID = p_mgnt_info->m_aid;
-		p_entry->RA = p_mgnt_info->bssid;
-		p_entry->mac_id = p_mgnt_info->m_mac_id;
-		p_entry->wireless_mode = p_mgnt_info->dot11_current_wireless_mode;
-		p_entry->BW = p_mgnt_info->dot11_current_channel_band_width;
-		p_entry->cur_beamform = p_ht_info->ht_cur_beamform;
+		p_entry->aid = p_MgntInfo->mAId;
+		p_entry->ra = p_MgntInfo->Bssid;
+		p_entry->mac_id = p_MgntInfo->mMacId;
+		p_entry->wireless_mode = p_MgntInfo->dot11CurrentWirelessMode;
+		p_entry->bw = p_MgntInfo->dot11CurrentChannelBandWidth;
+		p_entry->cur_beamform = p_ht_info->HtCurBeamform;
 	}
 
 	if ((p_entry->wireless_mode & WIRELESS_MODE_AC_5G) || (p_entry->wireless_mode & WIRELESS_MODE_AC_24G)) {
 		if (sta_idx != 0)
-			p_entry->cur_beamform_vht = p_sta->vht_info.vht_cur_beamform;
+			p_entry->cur_beamform_vht = p_sta->VHTInfo.VhtCurBeamform;
 		else
-			p_entry->cur_beamform_vht = p_vht_info->vht_cur_beamform;
+			p_entry->cur_beamform_vht = p_vht_info->VhtCurBeamform;
 	}
 
-	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("p_sta->wireless_mode = 0x%x, staidx = %d\n", p_sta->wireless_mode, sta_idx));
+	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("p_sta->wireless_mode = 0x%x, staidx = %d\n", p_sta->WirelessMode, sta_idx));
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 
 	if (!IS_STA_VALID(p_sta)) {
@@ -63,15 +79,18 @@ phydm_sta_info_init(
 	}
 
 	odm_move_memory(p_dm_odm, p_entry->my_mac_addr, adapter_mac_addr(p_sta->padapter), 6);
+	#ifdef CONFIG_80211N_HT
 	p_entry->ht_beamform_cap = p_sta->htpriv.beamform_cap;
+	#endif
 
-	p_entry->AID = p_sta->aid;
-	p_entry->RA = p_sta->hwaddr;
+	p_entry->aid = p_sta->aid;
+	p_entry->ra = p_sta->hwaddr;
 	p_entry->mac_id = p_sta->mac_id;
 	p_entry->wireless_mode = p_sta->wireless_mode;
-	p_entry->BW = p_sta->bw_mode;
-
+	p_entry->bw = p_sta->bw_mode;
+	#ifdef CONFIG_80211N_HT
 	p_entry->cur_beamform = p_sta->htpriv.beamform_cap;
+	#endif
 #if	ODM_IC_11AC_SERIES_SUPPORT
 	if ((p_entry->wireless_mode & WIRELESS_MODE_AC_5G) || (p_entry->wireless_mode & WIRELESS_MODE_AC_24G)) {
 		p_entry->cur_beamform_vht = p_sta->vhtpriv.beamform_cap;
@@ -96,8 +115,8 @@ void phydm_sta_info_update(
 		return;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	p_sta->txbf_paid = p_beamform_entry->P_AID;
-	p_sta->txbf_gid = p_beamform_entry->G_ID;
+	p_sta->txbf_paid = p_beamform_entry->p_aid;
+	p_sta->txbf_gid = p_beamform_entry->g_id;
 #endif
 }
 
@@ -244,7 +263,7 @@ phydm_beamforming_get_first_mu_bfee_entry_idx(
 	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	u8					idx = 0xFF;
 	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm_odm->beamforming_info;
-	bool					is_found = false;
+	boolean					is_found = false;
 
 	for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
 		if (p_beam_info->beamformee_entry[idx].is_used && p_beam_info->beamformee_entry[idx].is_mu_sta) {
@@ -279,32 +298,32 @@ beamforming_add_bfee_entry(
 
 	if (p_entry != NULL) {
 		p_entry->is_used = true;
-		p_entry->AID = p_sta->AID;
+		p_entry->aid = p_sta->aid;
 		p_entry->mac_id = p_sta->mac_id;
-		p_entry->sound_bw = p_sta->BW;
+		p_entry->sound_bw = p_sta->bw;
 		odm_move_memory(p_dm_odm, p_entry->my_mac_addr, p_sta->my_mac_addr, 6);
 
 		if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ap)) {
 			/*BSSID[44:47] xor BSSID[40:43]*/
-			u16 BSSID = ((p_sta->my_mac_addr[5] & 0xf0) >> 4) ^ (p_sta->my_mac_addr[5] & 0xf);
+			u16 bssid = ((p_sta->my_mac_addr[5] & 0xf0) >> 4) ^ (p_sta->my_mac_addr[5] & 0xf);
 			/*(dec(A) + dec(B)*32) mod 512*/
-			p_entry->P_AID = (p_sta->AID + BSSID * 32) & 0x1ff;
-			p_entry->G_ID = 63;
-			ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BFee P_AID addressed to STA=%d\n", __func__, p_entry->P_AID));
+			p_entry->p_aid = (p_sta->aid + bssid * 32) & 0x1ff;
+			p_entry->g_id = 63;
+			ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BFee P_AID addressed to STA=%d\n", __func__, p_entry->p_aid));
 		} else if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss)) {
 			/*ad hoc mode*/
-			p_entry->P_AID = 0;
-			p_entry->G_ID = 63;
-			ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BFee P_AID as IBSS=%d\n", __func__, p_entry->P_AID));
+			p_entry->p_aid = 0;
+			p_entry->g_id = 63;
+			ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BFee P_AID as IBSS=%d\n", __func__, p_entry->p_aid));
 		} else {
 			/*client mode*/
-			p_entry->P_AID =  p_sta->RA[5];
+			p_entry->p_aid =  p_sta->ra[5];
 			/*BSSID[39:47]*/
-			p_entry->P_AID = (p_entry->P_AID << 1) | (p_sta->RA[4] >> 7);
-			p_entry->G_ID = 0;
-			ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BFee P_AID addressed to AP=0x%X\n", __func__, p_entry->P_AID));
+			p_entry->p_aid = (p_entry->p_aid << 1) | (p_sta->ra[4] >> 7);
+			p_entry->g_id = 0;
+			ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: BFee P_AID addressed to AP=0x%X\n", __func__, p_entry->p_aid));
 		}
-		cp_mac_addr(p_entry->mac_addr, p_sta->RA);
+		cp_mac_addr(p_entry->mac_addr, p_sta->ra);
 		p_entry->is_txbf = false;
 		p_entry->is_sound = false;
 		p_entry->sound_period = 400;
@@ -354,23 +373,23 @@ beamforming_add_bfer_entry(
 		odm_move_memory(p_dm_odm, p_entry->my_mac_addr, p_sta->my_mac_addr, 6);
 		if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ap)) {
 			/*BSSID[44:47] xor BSSID[40:43]*/
-			u16 BSSID = ((p_sta->my_mac_addr[5] & 0xf0) >> 4) ^ (p_sta->my_mac_addr[5] & 0xf);
+			u16 bssid = ((p_sta->my_mac_addr[5] & 0xf0) >> 4) ^ (p_sta->my_mac_addr[5] & 0xf);
 
-			p_entry->P_AID = (p_sta->AID + BSSID * 32) & 0x1ff;
-			p_entry->G_ID = 63;
+			p_entry->p_aid = (p_sta->aid + bssid * 32) & 0x1ff;
+			p_entry->g_id = 63;
 			/*(dec(A) + dec(B)*32) mod 512*/
 		} else if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss)) {
-			p_entry->P_AID = 0;
-			p_entry->G_ID = 63;
+			p_entry->p_aid = 0;
+			p_entry->g_id = 63;
 		} else {
-			p_entry->P_AID =  p_sta->RA[5];
+			p_entry->p_aid =  p_sta->ra[5];
 			/*BSSID[39:47]*/
-			p_entry->P_AID = (p_entry->P_AID << 1) | (p_sta->RA[4] >> 7);
-			p_entry->G_ID = 0;
-			ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: P_AID addressed to AP=0x%X\n", __func__, p_entry->P_AID));
+			p_entry->p_aid = (p_entry->p_aid << 1) | (p_sta->ra[4] >> 7);
+			p_entry->g_id = 0;
+			ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: P_AID addressed to AP=0x%X\n", __func__, p_entry->p_aid));
 		}
 
-		cp_mac_addr(p_entry->mac_addr, p_sta->RA);
+		cp_mac_addr(p_entry->mac_addr, p_sta->ra);
 		p_entry->beamform_entry_cap = beamform_cap;
 
 		p_entry->pre_log_seq = 0;	/*Modified by Jeffery @2015-04-13*/
@@ -384,7 +403,7 @@ beamforming_add_bfer_entry(
 		if (beamform_cap & BEAMFORMEE_CAP_VHT_MU) {
 			p_dm_odm->beamforming_info.beamformer_mu_cnt += 1;
 			p_entry->is_mu_ap = true;
-			p_entry->AID = p_sta->AID;
+			p_entry->aid = p_sta->aid;
 		} else if (beamform_cap & (BEAMFORMEE_CAP_VHT_SU | BEAMFORMEE_CAP_HT_EXPLICIT)) {
 			p_dm_odm->beamforming_info.beamformer_su_cnt += 1;
 			p_entry->is_mu_ap = false;
@@ -396,7 +415,7 @@ beamforming_add_bfer_entry(
 }
 
 #if 0
-bool
+boolean
 beamforming_remove_entry(
 	struct _ADAPTER			*adapter,
 	u8		*RA,
@@ -404,11 +423,11 @@ beamforming_remove_entry(
 )
 {
 	HAL_DATA_TYPE			*p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT				*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT				*p_dm_odm = &p_hal_data->DM_OutSrc;
 
 	struct _RT_BEAMFORMER_ENTRY	*p_bfer_entry = phydm_beamforming_get_bfer_entry_by_addr(p_dm_odm, RA, idx);
 	struct _RT_BEAMFORMEE_ENTRY	*p_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm_odm, RA, idx);
-	bool ret = false;
+	boolean ret = false;
 
 	RT_DISP(FBEAM, FBEAM_FUN, ("[Beamforming]@%s Start!\n", __func__));
 	RT_DISP(FBEAM, FBEAM_FUN, ("[Beamforming]@%s, p_bfer_entry=0x%x\n", __func__, p_bfer_entry));
@@ -469,14 +488,9 @@ phydm_beamforming_dym_ndpa_rate(
 	u16			ndpa_rate = ODM_RATE6M, BW;
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 
-	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__));
-
-	if (p_dm_odm->rssi_min > 30)	/*link RSSI > 30%*/
-		ndpa_rate = ODM_RATE24M;
-	else
-		ndpa_rate = ODM_RATE6M;
-
+	ndpa_rate = ODM_RATE6M;
 	BW = ODM_BW20M;
+
 	ndpa_rate = ndpa_rate << 8 | BW;
 	hal_com_txbf_set(p_dm_odm, TXBF_SET_SOUNDING_RATE, (u8 *)&ndpa_rate);
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s End, NDPA rate = 0x%X\n", __func__, ndpa_rate));
@@ -494,7 +508,7 @@ beamforming_dym_period(
 )
 {
 	u8					idx;
-	bool					is_change_period = false;
+	boolean					is_change_period = false;
 	u16					sound_period_sw, sound_period_fw;
 	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 
@@ -545,7 +559,7 @@ beamforming_dym_period(
 
 
 
-bool
+boolean
 beamforming_send_ht_ndpa_packet(
 	void			*p_dm_void,
 	u8			*RA,
@@ -553,7 +567,7 @@ beamforming_send_ht_ndpa_packet(
 	u8			q_idx
 )
 {
-	bool		ret = true;
+	boolean		ret = true;
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 
 	if (q_idx == BEACON_QUEUE)
@@ -566,7 +580,7 @@ beamforming_send_ht_ndpa_packet(
 
 
 
-bool
+boolean
 beamforming_send_vht_ndpa_packet(
 	void			*p_dm_void,
 	u8			*RA,
@@ -576,12 +590,12 @@ beamforming_send_vht_ndpa_packet(
 )
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	bool		ret = true;
 	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm_odm->beamforming_info);
+	boolean					ret = true;
 
 	hal_com_txbf_set(p_dm_odm, TXBF_SET_GET_TX_RATE, NULL);
 
-	if ((p_dm_odm->tx_bf_data_rate >= ODM_RATEVHTSS3MCS7) && (p_dm_odm->tx_bf_data_rate <= ODM_RATEVHTSS3MCS9) && (p_beam_info->snding3SS == false))
+	if ((p_beam_info->tx_bf_data_rate >= ODM_RATEVHTSS3MCS7) && (p_beam_info->tx_bf_data_rate <= ODM_RATEVHTSS3MCS9) && (p_beam_info->snding3ss == false))
 		ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s: 3SS VHT 789 don't sounding\n", __func__));
 
 	else  {
@@ -780,7 +794,7 @@ phydm_beamforming_sounding_bw(
 }
 
 
-bool
+boolean
 phydm_beamforming_select_beam_entry(
 	void				*p_dm_void,
 	struct _RT_BEAMFORMING_INFO	*p_beam_info
@@ -810,14 +824,14 @@ phydm_beamforming_select_beam_entry(
 }
 
 /*SU BFee Entry Only*/
-bool
+boolean
 phydm_beamforming_start_period(
 	void				*p_dm_void
 )
 {
 	struct PHY_DM_STRUCT					*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _ADAPTER					*adapter = p_dm_odm->adapter;
-	bool						ret = true;
+	boolean						ret = true;
 	struct _RT_BEAMFORMING_INFO		*p_beam_info = &p_dm_odm->beamforming_info;
 	struct _RT_SOUNDING_INFO			*p_sound_info = &(p_beam_info->sounding_info);
 
@@ -833,14 +847,14 @@ phydm_beamforming_start_period(
 		u32	val = (p_sound_info->sound_period | (timer_type << 16));
 
 		/* HW timer stop: All IC has the same setting */
-		adapter->hal_func.set_hw_reg_handler(adapter, HW_VAR_HW_REG_TIMER_STOP, (u8 *)(&timer_type));
+		phydm_set_hw_reg_handler_interface(p_dm_odm, HW_VAR_HW_REG_TIMER_STOP, (u8 *)(&timer_type));
 		/* odm_write_1byte(p_dm_odm, 0x15F, 0); */
 		/* HW timer init: All IC has the same setting, but 92E & 8812A only write 2 bytes */
-		adapter->hal_func.set_hw_reg_handler(adapter, HW_VAR_HW_REG_TIMER_INIT, (u8 *)(&val));
+		phydm_set_hw_reg_handler_interface(p_dm_odm, HW_VAR_HW_REG_TIMER_INIT, (u8 *)(&val));
 		/* odm_write_1byte(p_dm_odm, 0x164, 1); */
 		/* odm_write_4byte(p_dm_odm, 0x15C, val); */
 		/* HW timer start: All IC has the same setting */
-		adapter->hal_func.set_hw_reg_handler(adapter, HW_VAR_HW_REG_TIMER_START, (u8 *)(&timer_type));
+		phydm_set_hw_reg_handler_interface(p_dm_odm, HW_VAR_HW_REG_TIMER_START, (u8 *)(&timer_type));
 		/* odm_write_1byte(p_dm_odm, 0x15F, 0x5); */
 	} else if (p_sound_info->sound_mode == SOUNDING_FW_VHT_TIMER || p_sound_info->sound_mode == SOUNDING_FW_HT_TIMER)
 		ret = beamforming_start_fw(p_dm_odm, p_sound_info->sound_idx);
@@ -874,7 +888,7 @@ phydm_beamforming_end_period_sw(
 	else if (p_sound_info->sound_mode == SOUNDING_HW_VHT_TIMER || p_sound_info->sound_mode == SOUNDING_HW_HT_TIMER ||
 		p_sound_info->sound_mode == SOUNDING_AUTO_VHT_TIMER || p_sound_info->sound_mode == SOUNDING_AUTO_HT_TIMER)
 		/*HW timer stop: All IC has the same setting*/
-		adapter->hal_func.set_hw_reg_handler(adapter, HW_VAR_HW_REG_TIMER_STOP, (u8 *)(&timer_type));
+		phydm_set_hw_reg_handler_interface(p_dm_odm, HW_VAR_HW_REG_TIMER_STOP, (u8 *)(&timer_type));
 	/*odm_write_1byte(p_dm_odm, 0x15F, 0);*/
 }
 
@@ -895,7 +909,7 @@ phydm_beamforming_end_period_fw(
 void
 phydm_beamforming_clear_entry_sw(
 	void			*p_dm_void,
-	bool				is_delete,
+	boolean				is_delete,
 	u8				delete_idx
 )
 {
@@ -956,7 +970,7 @@ phydm_beamforming_clear_entry_sw(
 void
 phydm_beamforming_clear_entry_fw(
 	void			*p_dm_void,
-	bool				is_delete,
+	boolean				is_delete,
 	u8				delete_idx
 )
 {
@@ -1089,7 +1103,7 @@ phydm_beamforming_notify(
 
 
 
-bool
+boolean
 beamforming_init_entry(
 	void		*p_dm_void,
 	u16		sta_idx,
@@ -1171,7 +1185,7 @@ beamforming_init_entry(
 
 	/*We are BFee, so the entry is BFer*/
 	if (beamform_cap & (BEAMFORMEE_CAP_VHT_MU | BEAMFORMEE_CAP_VHT_SU | BEAMFORMEE_CAP_HT_EXPLICIT)) {
-		p_beamformer_entry = phydm_beamforming_get_bfer_entry_by_addr(p_dm_odm, p_sta->RA, &bfer_idx);
+		p_beamformer_entry = phydm_beamforming_get_bfer_entry_by_addr(p_dm_odm, p_sta->ra, &bfer_idx);
 
 		if (p_beamformer_entry == NULL) {
 			p_beamformer_entry = beamforming_add_bfer_entry(p_dm_odm, p_sta, beamform_cap, num_of_sounding_dim, &bfer_idx);
@@ -1182,13 +1196,13 @@ beamforming_init_entry(
 
 	/*We are BFer, so the entry is BFee*/
 	if (beamform_cap & (BEAMFORMER_CAP_VHT_MU | BEAMFORMER_CAP_VHT_SU | BEAMFORMER_CAP_HT_EXPLICIT)) {
-		p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm_odm, p_sta->RA, &bfee_idx);
+		p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm_odm, p_sta->ra, &bfee_idx);
 
 		/*¦pªGBFeeIdx = 0xF «h¥Nªí¥Ø«eentry·í¤¤¨S¦³¬Û¦PªºMACID¦b¤º*/
 		ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Get BFee entry 0x%X by address\n", __func__, bfee_idx));
 		if (p_beamform_entry == NULL) {
 			p_beamform_entry = beamforming_add_bfee_entry(p_dm_odm, p_sta, beamform_cap, num_of_sounding_dim, comp_steering_num_of_bfer, &bfee_idx);
-			ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]: p_sta->AID=%d, p_sta->mac_id=%d\n", __func__, p_sta->AID, p_sta->mac_id));
+			ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]: p_sta->AID=%d, p_sta->mac_id=%d\n", __func__, p_sta->aid, p_sta->mac_id));
 
 			ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]: Add BFee entry %d\n", __func__, bfee_idx));
 
@@ -1226,7 +1240,7 @@ beamforming_deinit_entry(
 
 	struct _RT_BEAMFORMER_ENTRY	*p_bfer_entry = phydm_beamforming_get_bfer_entry_by_addr(p_dm_odm, RA, &idx);
 	struct _RT_BEAMFORMEE_ENTRY	*p_bfee_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm_odm, RA, &idx);
-	bool ret = false;
+	boolean ret = false;
 
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n",  __func__));
 
@@ -1261,11 +1275,11 @@ beamforming_deinit_entry(
 }
 
 
-bool
+boolean
 beamforming_start_v1(
 	void		*p_dm_void,
 	u8			*RA,
-	bool			mode,
+	boolean			mode,
 	CHANNEL_WIDTH	BW,
 	u8			rate
 )
@@ -1273,7 +1287,7 @@ beamforming_start_v1(
 	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	u8					idx = 0;
 	struct _RT_BEAMFORMEE_ENTRY	*p_entry;
-	bool					ret = true;
+	boolean					ret = true;
 	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm_odm->beamforming_info);
 
 	p_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm_odm, RA, &idx);
@@ -1316,7 +1330,7 @@ beamforming_start_v1(
 	if (mode == 1)
 		ret = beamforming_send_ht_ndpa_packet(p_dm_odm, RA, BW, NORMAL_QUEUE);
 	else
-		ret = beamforming_send_vht_ndpa_packet(p_dm_odm, RA, p_entry->AID, BW, NORMAL_QUEUE);
+		ret = beamforming_send_vht_ndpa_packet(p_dm_odm, RA, p_entry->aid, BW, NORMAL_QUEUE);
 
 	if (ret == false) {
 		beamforming_leave(p_dm_odm, RA);
@@ -1329,7 +1343,7 @@ beamforming_start_v1(
 }
 
 
-bool
+boolean
 beamforming_start_sw(
 	void		*p_dm_void,
 	u8			idx,
@@ -1337,16 +1351,16 @@ beamforming_start_sw(
 	CHANNEL_WIDTH	BW
 )
 {
-	u8					*RA = NULL;
+	u8					*ra = NULL;
 	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _RT_BEAMFORMEE_ENTRY	*p_entry;
-	bool					ret = true;
+	boolean					ret = true;
 	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm_odm->beamforming_info);
 
 	if (p_beam_info->is_mu_sounding) {
 		p_beam_info->is_mu_sounding_in_progress = true;
 		p_entry = &(p_beam_info->beamformee_entry[idx]);
-		RA = p_entry->mac_addr;
+		ra = p_entry->mac_addr;
 
 	} else {
 		p_entry = &(p_beam_info->beamformee_entry[idx]);
@@ -1362,7 +1376,7 @@ beamforming_start_sw(
 			}
 
 			p_entry->is_beamforming_in_progress = true;
-			RA = p_entry->mac_addr;
+			ra = p_entry->mac_addr;
 
 			if (mode == SOUNDING_SW_HT_TIMER || mode == SOUNDING_HW_HT_TIMER || mode == SOUNDING_AUTO_HT_TIMER) {
 				if (!(p_entry->beamform_entry_cap & BEAMFORMER_CAP_HT_EXPLICIT)) {
@@ -1394,12 +1408,12 @@ beamforming_start_sw(
 	/*GET_TXBF_INFO(adapter)->fTxbfSet(adapter, TXBF_SET_SOUNDING_STATUS, (u8*)&idx);*/
 
 	if (mode == SOUNDING_SW_HT_TIMER || mode == SOUNDING_HW_HT_TIMER || mode == SOUNDING_AUTO_HT_TIMER)
-		ret = beamforming_send_ht_ndpa_packet(p_dm_odm, RA, BW, NORMAL_QUEUE);
+		ret = beamforming_send_ht_ndpa_packet(p_dm_odm, ra, BW, NORMAL_QUEUE);
 	else
-		ret = beamforming_send_vht_ndpa_packet(p_dm_odm, RA, p_entry->AID, BW, NORMAL_QUEUE);
+		ret = beamforming_send_vht_ndpa_packet(p_dm_odm, ra, p_entry->aid, BW, NORMAL_QUEUE);
 
 	if (ret == false) {
-		beamforming_leave(p_dm_odm, RA);
+		beamforming_leave(p_dm_odm, ra);
 		p_entry->is_beamforming_in_progress = false;
 		return false;
 	}
@@ -1412,7 +1426,7 @@ beamforming_start_sw(
 #if (SUPPORT_MU_BF == 1)
 	{
 		u8				idx, poll_sta_cnt = 0;
-		bool				is_get_first_bfee = false;
+		boolean				is_get_first_bfee = false;
 
 		if (p_beam_info->beamformee_mu_cnt > 1) { /* More than 1 MU STA*/
 
@@ -1437,7 +1451,7 @@ beamforming_start_sw(
 }
 
 
-bool
+boolean
 beamforming_start_fw(
 	void		*p_dm_void,
 	u8			idx
@@ -1464,7 +1478,7 @@ beamforming_start_fw(
 void
 beamforming_check_sounding_success(
 	void			*p_dm_void,
-	bool			status
+	boolean			status
 )
 {
 	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
@@ -1491,7 +1505,7 @@ beamforming_check_sounding_success(
 void
 phydm_beamforming_end_sw(
 	void		*p_dm_void,
-	bool			status
+	boolean			status
 )
 {
 	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
@@ -1508,7 +1522,7 @@ phydm_beamforming_end_sw(
 			return;
 		}
 
-		if ((p_dm_odm->tx_bf_data_rate >= ODM_RATEVHTSS3MCS7) && (p_dm_odm->tx_bf_data_rate <= ODM_RATEVHTSS3MCS9) && (p_beam_info->snding3SS == false)) {
+		if ((p_beam_info->tx_bf_data_rate >= ODM_RATEVHTSS3MCS7) && (p_beam_info->tx_bf_data_rate <= ODM_RATEVHTSS3MCS9) && (p_beam_info->snding3ss == false)) {
 			ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] VHT3SS 7,8,9, do not apply V matrix.\n", __func__));
 			p_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_INITIALIZED;
 			hal_com_txbf_set(p_dm_odm, TXBF_SET_SOUNDING_STATUS, (u8 *)&(p_beam_info->beamformee_cur_idx));
@@ -1555,11 +1569,11 @@ beamforming_timer_callback(
 	PHAL_DATA_TYPE				p_hal_data = GET_HAL_DATA(adapter);
 	struct PHY_DM_STRUCT					*p_dm_odm = &p_hal_data->odmpriv;
 #endif
-	bool						ret = false;
+	boolean						ret = false;
 	struct _RT_BEAMFORMING_INFO		*p_beam_info = &(p_dm_odm->beamforming_info);
 	struct _RT_BEAMFORMEE_ENTRY		*p_entry = &(p_beam_info->beamformee_entry[p_beam_info->beamformee_cur_idx]);
 	struct _RT_SOUNDING_INFO			*p_sound_info = &(p_beam_info->sounding_info);
-	bool					is_beamforming_in_progress;
+	boolean					is_beamforming_in_progress;
 
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__));
 
@@ -1590,7 +1604,7 @@ beamforming_timer_callback(
 			odm_set_timer(p_dm_odm, &p_beam_info->beamforming_timer, p_sound_info->sound_period);
 		else {
 			u32	val = (p_sound_info->sound_period << 16) | HAL_TIMER_TXBF;
-			adapter->hal_func.set_hw_reg_handler(adapter, HW_VAR_HW_REG_TIMER_RESTART, (u8 *)(&val));
+			phydm_set_hw_reg_handler_interface(p_dm_odm, HW_VAR_HW_REG_TIMER_RESTART, (u8 *)(&val));
 		}
 	}
 }
@@ -1606,9 +1620,9 @@ beamforming_sw_timer_callback(
 )
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER		*adapter = (struct _ADAPTER *)p_timer->adapter;
+	struct _ADAPTER		*adapter = (struct _ADAPTER *)p_timer->Adapter;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
 	beamforming_timer_callback(p_dm_odm);
@@ -1645,7 +1659,7 @@ phydm_beamforming_init(
 	p_beam_info->is_mu_sounding = false;
 	p_beam_info->first_mu_bfee_index = 0xFF;
 	p_beam_info->apply_v_matrix = true;
-	p_beam_info->snding3SS = false;
+	p_beam_info->snding3ss = false;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	p_beam_info->source_adapter = p_dm_odm->adapter;
@@ -1654,14 +1668,14 @@ phydm_beamforming_init(
 }
 
 
-bool
+boolean
 phydm_acting_determine(
 	void			*p_dm_void,
 	enum phydm_acting_type	type
 )
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	bool		ret = false;
+	boolean		ret = false;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	struct _ADAPTER	*adapter = p_dm_odm->beamforming_info.source_adapter;
 #else
@@ -1724,7 +1738,7 @@ void
 phydm_beamforming_set_txbf_en(
 	void		*p_dm_void,
 	u8			mac_id,
-	bool			is_txbf
+	boolean			is_txbf
 )
 {
 	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
@@ -1753,8 +1767,8 @@ phydm_beamforming_get_beam_cap(
 )
 {
 	u8					i;
-	bool				is_self_beamformer = false;
-	bool				is_self_beamformee = false;
+	boolean				is_self_beamformer = false;
+	boolean				is_self_beamformee = false;
 	struct _RT_BEAMFORMEE_ENTRY	beamformee_entry;
 	struct _RT_BEAMFORMER_ENTRY	beamformer_entry;
 	enum beamforming_cap		beamform_cap = BEAMFORMING_CAP_NONE;
@@ -1791,7 +1805,7 @@ phydm_beamforming_get_beam_cap(
 }
 
 
-bool
+boolean
 beamforming_control_v1(
 	void			*p_dm_void,
 	u8			*RA,
@@ -1802,7 +1816,7 @@ beamforming_control_v1(
 )
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	bool		ret = true;
+	boolean		ret = true;
 
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Start!\n", __func__));
 
@@ -1828,7 +1842,7 @@ beamforming_control_v1(
 }
 
 /*Only OID uses this function*/
-bool
+boolean
 phydm_beamforming_control_v2(
 	void		*p_dm_void,
 	u8			idx,
@@ -1869,8 +1883,6 @@ phydm_beamforming_watchdog(
 		return;
 
 	beamforming_dym_period(p_dm_odm, 0);
-	phydm_beamforming_dym_ndpa_rate(p_dm_odm);
-
 }
 
 
diff --git a/rtl8822BU/hal/phydm/phydm_beamforming.h b/rtl8822BU/hal/phydm/phydm_beamforming.h
index 1359d7a..89f9bed 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_beamforming.h
+++ b/rtl8822BU/hal/phydm/phydm_beamforming.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef __INC_PHYDM_BEAMFORMING_H
 #define __INC_PHYDM_BEAMFORMING_H
 
@@ -15,6 +29,13 @@
 
 #if (BEAMFORMING_SUPPORT == 1)
 
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+
+#define eq_mac_addr(a,b)						( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
+#define cp_mac_addr(des,src)					((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])
+
+#endif
+
 #define MAX_BEAMFORMEE_SU	2
 #define MAX_BEAMFORMER_SU	2
 #if (RTL8822B_SUPPORT == 1)
@@ -83,12 +104,12 @@ enum sounding_mode {
 };
 
 struct _RT_BEAMFORM_STAINFO {
-	u8						*RA;
-	u16						AID;
+	u8						*ra;
+	u16						aid;
 	u16						mac_id;
 	u8						my_mac_addr[6];
 	WIRELESS_MODE				wireless_mode;
-	CHANNEL_WIDTH				BW;
+	CHANNEL_WIDTH				bw;
 	enum beamforming_cap			beamform_cap;
 	u8						ht_beamform_cap;
 	u16						vht_beamform_cap;
@@ -98,20 +119,20 @@ struct _RT_BEAMFORM_STAINFO {
 
 
 struct _RT_BEAMFORMEE_ENTRY {
-	bool is_used;
-	bool	is_txbf;
-	bool is_sound;
-	u16	AID;				/*Used to construct AID field of NDPA packet.*/
+	boolean is_used;
+	boolean	is_txbf;
+	boolean is_sound;
+	u16	aid;				/*Used to construct AID field of NDPA packet.*/
 	u16	mac_id;				/*Used to Set Reg42C in IBSS mode. */
-	u16	P_AID;				/*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */
-	u16	G_ID;				/*Used to fill Tx DESC*/
+	u16	p_aid;				/*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */
+	u16	g_id;				/*Used to fill Tx DESC*/
 	u8	my_mac_addr[6];
 	u8	mac_addr[6];			/*Used to fill Reg6E4 to fill Mac address of CSI report frame.*/
 	CHANNEL_WIDTH			sound_bw;		/*Sounding band_width*/
 	u16					sound_period;
 	enum beamforming_cap			beamform_entry_cap;
 	enum beamforming_entry_state	beamform_entry_state;
-	bool						is_beamforming_in_progress;
+	boolean						is_beamforming_in_progress;
 	/*u8	log_seq;									// Move to _RT_BEAMFORMER_ENTRY*/
 	/*u16	log_retry_cnt:3;		// 0~4				// Move to _RT_BEAMFORMER_ENTRY*/
 	/*u16	LogSuccessCnt:2;		// 0~2				// Move to _RT_BEAMFORMER_ENTRY*/
@@ -123,17 +144,17 @@ struct _RT_BEAMFORMEE_ENTRY {
 	u8	comp_steering_num_of_bfer;
 	u8	su_reg_index;
 	/*For MU-MIMO*/
-	bool	is_mu_sta;
+	boolean	is_mu_sta;
 	u8	mu_reg_index;
 	u8	gid_valid[8];
 	u8	user_position[16];
 };
 
 struct _RT_BEAMFORMER_ENTRY {
-	bool			is_used;
+	boolean			is_used;
 	/*P_AID of BFer entry is probably not used*/
-	u16				P_AID;					/*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */
-	u16				G_ID;
+	u16				p_aid;					/*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */
+	u16				g_id;
 	u8				my_mac_addr[6];
 	u8				mac_addr[6];
 	enum beamforming_cap		beamform_entry_cap;
@@ -145,10 +166,10 @@ struct _RT_BEAMFORMER_ENTRY {
 	u16				log_success:2;			/*Modified by Jeffery @2014-10-29*/
 	u8				su_reg_index;
 	/*For MU-MIMO*/
-	bool				is_mu_ap;
+	boolean				is_mu_ap;
 	u8				gid_valid[8];
 	u8				user_position[16];
-	u16				AID;
+	u16				aid;
 };
 
 struct _RT_SOUNDING_INFO {
@@ -189,22 +210,24 @@ struct _RT_BEAMFORMING_INFO {
 	u8					beamformer_mu_cnt;
 	u32					beamformee_mu_reg_maping;
 	u8					mu_ap_index;
-	bool					is_mu_sounding;
+	boolean					is_mu_sounding;
 	u8					first_mu_bfee_index;
-	bool					is_mu_sounding_in_progress;
-	bool					dbg_disable_mu_tx;
-	bool					apply_v_matrix;
-	bool					snding3SS;
+	boolean					is_mu_sounding_in_progress;
+	boolean					dbg_disable_mu_tx;
+	boolean					apply_v_matrix;
+	boolean					snding3ss;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	struct _ADAPTER				*source_adapter;
 #endif
 	/* Control register */
 	u32					reg_mu_tx_ctrl;		/* For USB/SDIO interfaces aync I/O */
+	u8					tx_bf_data_rate;
+	u8					last_usb_hub;
 };
 
 
 struct _RT_NDPA_STA_INFO {
-	u16	AID:12;
+	u16	aid:12;
 	u16	feedback_type:1;
 	u16	nc_index:3;
 };
@@ -240,7 +263,7 @@ phydm_beamforming_notify(
 	void	*p_dm_void
 );
 
-bool
+boolean
 phydm_acting_determine(
 	void		*p_dm_void,
 	enum phydm_acting_type	type
@@ -258,7 +281,7 @@ beamforming_leave(
 	u8			*RA
 );
 
-bool
+boolean
 beamforming_start_fw(
 	void			*p_dm_void,
 	u8			idx
@@ -267,13 +290,13 @@ beamforming_start_fw(
 void
 beamforming_check_sounding_success(
 	void			*p_dm_void,
-	bool			status
+	boolean			status
 );
 
 void
 phydm_beamforming_end_sw(
 	void		*p_dm_void,
-	bool			status
+	boolean			status
 );
 
 void
@@ -295,7 +318,7 @@ phydm_beamforming_get_beam_cap(
 );
 
 
-bool
+boolean
 beamforming_control_v1(
 	void			*p_dm_void,
 	u8			*RA,
@@ -306,7 +329,7 @@ beamforming_control_v1(
 );
 
 
-bool
+boolean
 phydm_beamforming_control_v2(
 	void		*p_dm_void,
 	u8			idx,
@@ -329,7 +352,7 @@ beamforming_sw_timer_callback(
 #endif
 );
 
-bool
+boolean
 beamforming_send_ht_ndpa_packet(
 	void			*p_dm_void,
 	u8			*RA,
@@ -338,7 +361,7 @@ beamforming_send_ht_ndpa_packet(
 );
 
 
-bool
+boolean
 beamforming_send_vht_ndpa_packet(
 	void			*p_dm_void,
 	u8			*RA,
diff --git a/rtl8822BU/hal/phydm/phydm_ccx.c b/rtl8822BU/hal/phydm/phydm_ccx.c
index acdd32d..388a2a4 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_ccx.c
+++ b/rtl8822BU/hal/phydm/phydm_ccx.c
@@ -1,8 +1,131 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
 /*Set NHM period, threshold, disable ignore cca or not, disable ignore txon or not*/
 void
+phydm_nhm_counter_statistics_init(
+	void			*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+
+	if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) {
+		/*PHY parameters initialize for n series*/
+		odm_write_2byte(p_dm_odm, ODM_REG_CCX_PERIOD_11N + 2, 0xC350);			/*0x894[31:16]=0x0xC350	Time duration for NHM unit: us, 0xc350=200ms*/
+		odm_write_2byte(p_dm_odm, ODM_REG_NHM_TH9_TH10_11N + 2, 0xffff);		/*0x890[31:16]=0xffff		th_9, th_10*/
+		odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH3_TO_TH0_11N, 0xffffff50);		/*0x898=0xffffff52			th_3, th_2, th_1, th_0*/
+		odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffffff);		/*0x89c=0xffffffff			th_7, th_6, th_5, th_4*/
+		odm_set_bb_reg(p_dm_odm, ODM_REG_FPGA0_IQK_11N, MASKBYTE0, 0xff);		/*0xe28[7:0]=0xff			th_8*/
+		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11N, BIT(10) | BIT(9) | BIT(8), 0x1);	/*0x890[10:8]=1			ignoreCCA ignore PHYTXON enable CCX*/
+		odm_set_bb_reg(p_dm_odm, ODM_REG_OFDM_FA_RSTC_11N, BIT(7), 0x1);			/*0xc0c[7]=1				max power among all RX ants*/
+	}
+#if (RTL8195A_SUPPORT == 0)
+	else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
+		/*PHY parameters initialize for ac series*/
+		odm_write_2byte(p_dm_odm, ODM_REG_CCX_PERIOD_11AC + 2, 0xC350);			/*0x990[31:16]=0xC350	Time duration for NHM unit: us, 0xc350=200ms*/
+		odm_write_2byte(p_dm_odm, ODM_REG_NHM_TH9_TH10_11AC + 2, 0xffff);		/*0x994[31:16]=0xffff		th_9, th_10*/
+		odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0xffffff50);	/*0x998=0xffffff52			th_3, th_2, th_1, th_0*/
+		odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH7_TO_TH4_11AC, 0xffffffff);	/*0x99c=0xffffffff			th_7, th_6, th_5, th_4*/
+		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH8_11AC, MASKBYTE0, 0xff);		/*0x9a0[7:0]=0xff			th_8*/
+		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11AC, BIT(8) | BIT(9) | BIT(10), 0x1); /*0x994[10:8]=1			ignoreCCA ignore PHYTXON	enable CCX*/
+		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_9E8_11AC, BIT(0), 0x1);				/*0x9e8[7]=1				max power among all RX ants*/
+
+	}
+#endif
+}
+
+void
+phydm_nhm_counter_statistics(
+	void			*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+
+	if (!(p_dm_odm->support_ability & ODM_BB_NHM_CNT))
+		return;
+
+	/*Get NHM report*/
+	phydm_get_nhm_counter_statistics(p_dm_odm);
+
+	/*Reset NHM counter*/
+	phydm_nhm_counter_statistics_reset(p_dm_odm);
+}
+
+void
+phydm_get_nhm_counter_statistics(
+	void			*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u32		value32 = 0;
+#if (RTL8195A_SUPPORT == 0)
+	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES)
+		value32 = odm_get_bb_reg(p_dm_odm, ODM_REG_NHM_CNT_11AC, MASKDWORD);
+	else if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES)
+#endif
+		value32 = odm_get_bb_reg(p_dm_odm, ODM_REG_NHM_CNT_11N, MASKDWORD);
+
+	p_dm_odm->nhm_cnt_0 = (u8)(value32 & MASKBYTE0);
+	p_dm_odm->nhm_cnt_1 = (u8)((value32 & MASKBYTE1) >> 8);
+
+}
+
+void
+phydm_nhm_counter_statistics_reset(
+	void			*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+
+	if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) {
+		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11N, BIT(1), 0);
+		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11N, BIT(1), 1);
+	}
+#if (RTL8195A_SUPPORT == 0)
+	else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
+		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11AC, BIT(1), 0);
+		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11AC, BIT(1), 1);
+	}
+
+#endif
+
+}
+
+boolean
+phydm_cal_nhm_cnt(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u16			base = 0;
+
+	base = p_dm_odm->nhm_cnt_0 + p_dm_odm->nhm_cnt_1;
+
+	if (base != 0) {
+		p_dm_odm->nhm_cnt_0 = ((p_dm_odm->nhm_cnt_0) << 8) / base;
+		p_dm_odm->nhm_cnt_1 = ((p_dm_odm->nhm_cnt_1) << 8) / base;
+	}
+	if ((p_dm_odm->nhm_cnt_0 - p_dm_odm->nhm_cnt_1) >= 100)
+		return true;			/*clean environment*/
+	else
+		return false;		/*noisy environment*/
+}
+
+void
 phydm_nhm_setting(
 	void		*p_dm_void,
 	u8	nhm_setting
@@ -41,8 +164,8 @@ phydm_nhm_setting(
 		} else if (nhm_setting == STORE_NHM_SETTING) {
 
 			/*Store pervious disable_ignore_cca, disable_ignore_txon*/
-			ccx_info->NHM_inexclude_cca_restore = (bool)odm_get_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11AC, BIT(9));
-			ccx_info->NHM_inexclude_txon_restore = (bool)odm_get_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11AC, BIT(10));
+			ccx_info->NHM_inexclude_cca_restore = (enum nhm_inexclude_cca)odm_get_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11AC, BIT(9));
+			ccx_info->NHM_inexclude_txon_restore = (enum nhm_inexclude_txon)odm_get_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11AC, BIT(10));
 
 			/*Store pervious NHM period*/
 			ccx_info->NHM_period_restore = (u16)odm_get_bb_reg(p_dm_odm, ODM_REG_CCX_PERIOD_11AC, MASKHWORD);
@@ -113,8 +236,8 @@ phydm_nhm_setting(
 		} else if (nhm_setting == STORE_NHM_SETTING) {
 
 			/*Store pervious disable_ignore_cca, disable_ignore_txon*/
-			ccx_info->NHM_inexclude_cca_restore = (bool)odm_get_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11N, BIT(9));
-			ccx_info->NHM_inexclude_txon_restore = (bool)odm_get_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11N, BIT(10));
+			ccx_info->NHM_inexclude_cca_restore = (enum nhm_inexclude_cca)odm_get_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11N, BIT(9));
+			ccx_info->NHM_inexclude_txon_restore = (enum nhm_inexclude_txon)odm_get_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11N, BIT(10));
 
 			/*Store pervious NHM period*/
 			ccx_info->NHM_period_restore = (u16)odm_get_bb_reg(p_dm_odm, ODM_REG_CCX_PERIOD_11N, MASKHWORD);
@@ -165,7 +288,6 @@ phydm_nhm_trigger(
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO		*ccx_info = &p_dm_odm->dm_ccx_info;
 
 	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
 
@@ -245,7 +367,7 @@ phydm_get_nhm_result(
 
 }
 
-bool
+boolean
 phydm_check_nhm_ready(
 	void		*p_dm_void
 )
@@ -253,7 +375,7 @@ phydm_check_nhm_ready(
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	u32			value32 = 0;
 	u8			i;
-	bool			ret = false;
+	boolean			ret = false;
 
 	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
 
@@ -291,7 +413,6 @@ phydm_store_nhm_setting(
 )
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _CCX_INFO	*ccx_info = &p_dm_odm->dm_ccx_info;
 
 	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
 
@@ -343,14 +464,14 @@ phydm_clm_trigger(
 	}
 }
 
-bool
-phydm_check_cl_mready(
+boolean
+phydm_check_clm_ready(
 	void			*p_dm_void
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	u32			value32 = 0;
-	bool			ret = false;
+	boolean			ret = false;
 
 	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES)
 		value32 = odm_get_bb_reg(p_dm_odm, ODM_REG_CLM_RESULT_11AC, MASKDWORD);				/*make sure CLM calc is ready*/
@@ -359,7 +480,7 @@ phydm_check_cl_mready(
 
 	if ((p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) && (value32 & BIT(16)))
 		ret = true;
-	else if ((p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) && (value32 & BIT(17)))
+	else if ((p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) && (value32 & BIT(16)))
 		ret = true;
 	else
 		ret = false;
@@ -370,7 +491,7 @@ phydm_check_cl_mready(
 }
 
 void
-phydm_get_cl_mresult(
+phydm_get_clm_result(
 	void			*p_dm_void
 )
 {
@@ -378,7 +499,6 @@ phydm_get_cl_mresult(
 	struct _CCX_INFO	*ccx_info = &p_dm_odm->dm_ccx_info;
 
 	u32			value32 = 0;
-	u16			results = 0;
 
 	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES)
 		value32 = odm_get_bb_reg(p_dm_odm, ODM_REG_CLM_RESULT_11AC, MASKDWORD);				/*read CLM calc result*/
diff --git a/rtl8822BU/hal/phydm/phydm_ccx.h b/rtl8822BU/hal/phydm/phydm_ccx.h
index d9adf63..af0a617 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_ccx.h
+++ b/rtl8822BU/hal/phydm/phydm_ccx.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef	__PHYDMCCX_H__
 #define    __PHYDMCCX_H__
 
@@ -47,8 +61,8 @@ struct _CCX_INFO {
 	u16		CLM_result;
 
 
-	bool		echo_NHM_en;
-	bool		echo_CLM_en;
+	boolean		echo_NHM_en;
+	boolean		echo_CLM_en;
 	u8		echo_IGI;
 
 };
@@ -56,6 +70,31 @@ struct _CCX_INFO {
 /*NHM*/
 
 void
+phydm_nhm_counter_statistics_init(
+	void					*p_dm_void
+);
+
+void
+phydm_nhm_counter_statistics(
+	void					*p_dm_void
+);
+
+void
+phydm_nhm_counter_statistics_reset(
+	void			*p_dm_void
+);
+
+void
+phydm_get_nhm_counter_statistics(
+	void			*p_dm_void
+);
+
+boolean
+phydm_cal_nhm_cnt(
+	void		*p_dm_void
+);
+
+void
 phydm_nhm_setting(
 	void		*p_dm_void,
 	u8	nhm_setting
@@ -71,7 +110,7 @@ phydm_get_nhm_result(
 	void		*p_dm_void
 );
 
-bool
+boolean
 phydm_check_nhm_ready(
 	void		*p_dm_void
 );
@@ -88,13 +127,13 @@ phydm_clm_trigger(
 	void			*p_dm_void
 );
 
-bool
-phydm_check_cl_mready(
+boolean
+phydm_check_clm_ready(
 	void			*p_dm_void
 );
 
 void
-phydm_get_cl_mresult(
+phydm_get_clm_result(
 	void			*p_dm_void
 );
 
diff --git a/rtl8822BU/hal/phydm/phydm_cfotracking.c b/rtl8822BU/hal/phydm/phydm_cfotracking.c
index 8eafb3a..40c5a02 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_cfotracking.c
+++ b/rtl8822BU/hal/phydm/phydm_cfotracking.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,58 +11,75 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
 void
-odm_set_crystal_cap(
+phydm_set_crystal_cap(
 	void					*p_dm_void,
 	u8					crystal_cap
 )
 {
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-	struct PHY_DM_STRUCT					*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _CFO_TRACKING_				*p_cfo_track = (struct _CFO_TRACKING_ *)phydm_get_structure(p_dm_odm, PHYDM_CFOTRACK);
 
 	if (p_cfo_track->crystal_cap == crystal_cap)
 		return;
 
+	crystal_cap = crystal_cap & 0x3F;
 	p_cfo_track->crystal_cap = crystal_cap;
 
 	if (p_dm_odm->support_ic_type & (ODM_RTL8188E | ODM_RTL8188F)) {
+		#if (RTL8188E_SUPPORT == 1) || (RTL8188F_SUPPORT == 1)
 		/* write 0x24[22:17] = 0x24[16:11] = crystal_cap */
-		crystal_cap = crystal_cap & 0x3F;
 		odm_set_bb_reg(p_dm_odm, REG_AFE_XTAL_CTRL, 0x007ff800, (crystal_cap | (crystal_cap << 6)));
-	} else if (p_dm_odm->support_ic_type & ODM_RTL8812) {
+		#endif
+	}
+	#if (RTL8812A_SUPPORT == 1)
+	else if (p_dm_odm->support_ic_type & ODM_RTL8812) {
+	
 		/* write 0x2C[30:25] = 0x2C[24:19] = crystal_cap */
-		crystal_cap = crystal_cap & 0x3F;
 		odm_set_bb_reg(p_dm_odm, REG_MAC_PHY_CTRL, 0x7FF80000, (crystal_cap | (crystal_cap << 6)));
-	} else if ((p_dm_odm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723B | ODM_RTL8192E | ODM_RTL8821))) {
+		
+	} 
+	#endif
+	#if (RTL8703B_SUPPORT == 1) || (RTL8723B_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8821A_SUPPORT == 1) || (RTL8723D_SUPPORT == 1)
+	else if ((p_dm_odm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723B | ODM_RTL8192E | ODM_RTL8821 | ODM_RTL8723D))) {
+	
 		/* 0x2C[23:18] = 0x2C[17:12] = crystal_cap */
-		crystal_cap = crystal_cap & 0x3F;
 		odm_set_bb_reg(p_dm_odm, REG_MAC_PHY_CTRL, 0x00FFF000, (crystal_cap | (crystal_cap << 6)));
-	}  else if (p_dm_odm->support_ic_type & ODM_RTL8814A) {
+		
+	}
+	#endif
+	#if (RTL8814A_SUPPORT == 1)	
+	else if (p_dm_odm->support_ic_type & ODM_RTL8814A) {
+	
 		/* write 0x2C[26:21] = 0x2C[20:15] = crystal_cap */
-		crystal_cap = crystal_cap & 0x3F;
 		odm_set_bb_reg(p_dm_odm, REG_MAC_PHY_CTRL, 0x07FF8000, (crystal_cap | (crystal_cap << 6)));
-	} else if (p_dm_odm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) {
+		
+	}
+	#endif
+	#if (RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8197F_SUPPORT == 1)
+	else if (p_dm_odm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8197F)) {
+	
 		/* write 0x24[30:25] = 0x28[6:1] = crystal_cap */
-		crystal_cap = crystal_cap & 0x3F;
 		odm_set_bb_reg(p_dm_odm, REG_AFE_XTAL_CTRL, 0x7e000000, crystal_cap);
 		odm_set_bb_reg(p_dm_odm, REG_AFE_PLL_CTRL, 0x7e, crystal_cap);
-	} else {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("odm_set_crystal_cap(): Use default setting.\n"));
-		odm_set_bb_reg(p_dm_odm, REG_MAC_PHY_CTRL, 0xFFF000, (crystal_cap | (crystal_cap << 6)));
+		
+	}
+	#endif
+	#if (RTL8710B_SUPPORT == 1)
+	else if (p_dm_odm->support_ic_type & (ODM_RTL8710B)) {
+	
+		#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)		
+		/* write 0x60[29:24] = 0x60[23:18] = crystal_cap */
+		HAL_SetSYSOnReg(p_dm_odm->adapter, REG_SYS_XTAL_CTRL0, 0x3FFC0000, (crystal_cap | (crystal_cap << 6)));
+		#endif
 	}
+	#endif
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("Set rystal_cap = 0x%x\n", p_cfo_track->crystal_cap));
 
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("odm_set_crystal_cap(): crystal_cap = 0x%x\n", crystal_cap));
-#endif
 }
 
 u8
@@ -73,7 +90,12 @@ odm_get_default_crytaltal_cap(
 	struct PHY_DM_STRUCT					*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	u8						crystal_cap = 0x20;
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+	struct rtl_efuse *rtlefuse = rtl_efuse(rtlpriv);
+
+	crystal_cap = rtlefuse->crystalcap;
+#elif (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 	struct _ADAPTER					*adapter = p_dm_odm->adapter;
 	HAL_DATA_TYPE				*p_hal_data = GET_HAL_DATA(adapter);
 
@@ -93,7 +115,7 @@ odm_get_default_crytaltal_cap(
 void
 odm_set_atc_status(
 	void					*p_dm_void,
-	bool					atc_status
+	boolean					atc_status
 )
 {
 	struct PHY_DM_STRUCT					*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
@@ -106,15 +128,15 @@ odm_set_atc_status(
 	p_cfo_track->is_atc_status = atc_status;
 }
 
-bool
+boolean
 odm_get_atc_status(
 	void					*p_dm_void
 )
 {
-	bool						atc_status;
+	boolean						atc_status;
 	struct PHY_DM_STRUCT					*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 
-	atc_status = (bool)odm_get_bb_reg(p_dm_odm, ODM_REG(BB_ATC, p_dm_odm), ODM_BIT(BB_ATC, p_dm_odm));
+	atc_status = (boolean)odm_get_bb_reg(p_dm_odm, ODM_REG(BB_ATC, p_dm_odm), ODM_BIT(BB_ATC, p_dm_odm));
 	return atc_status;
 }
 
@@ -130,11 +152,11 @@ odm_cfo_tracking_reset(
 	p_cfo_track->is_adjust = true;
 
 	if (p_cfo_track->crystal_cap > p_cfo_track->def_x_cap) {
-		odm_set_crystal_cap(p_dm_odm, p_cfo_track->crystal_cap - 1);
+		phydm_set_crystal_cap(p_dm_odm, p_cfo_track->crystal_cap - 1);
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD,
 			("odm_cfo_tracking_reset(): approch default value (0x%x)\n", p_cfo_track->crystal_cap));
 	} else if (p_cfo_track->crystal_cap < p_cfo_track->def_x_cap) {
-		odm_set_crystal_cap(p_dm_odm, p_cfo_track->crystal_cap + 1);
+		phydm_set_crystal_cap(p_dm_odm, p_cfo_track->crystal_cap + 1);
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD,
 			("odm_cfo_tracking_reset(): approch default value (0x%x)\n", p_cfo_track->crystal_cap));
 	}
@@ -264,7 +286,7 @@ odm_cfo_tracking(
 		/* 4 1.5 BT case: Disable CFO tracking */
 		if (p_dm_odm->is_bt_enabled) {
 			p_cfo_track->is_adjust = false;
-			odm_set_crystal_cap(p_dm_odm, p_cfo_track->def_x_cap);
+			phydm_set_crystal_cap(p_dm_odm, p_cfo_track->def_x_cap);
 			ODM_RT_TRACE(p_dm_odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("odm_cfo_tracking(): Disable CFO tracking for BT!!\n"));
 		}
 #if 0
@@ -292,7 +314,7 @@ odm_cfo_tracking(
 			else if (crystal_cap < 0)
 				crystal_cap = 0;
 
-			odm_set_crystal_cap(p_dm_odm, (u8)crystal_cap);
+			phydm_set_crystal_cap(p_dm_odm, (u8)crystal_cap);
 		}
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("odm_cfo_tracking(): Crystal cap = 0x%x, Default Crystal cap = 0x%x\n",
 			p_cfo_track->crystal_cap, p_cfo_track->def_x_cap));
diff --git a/rtl8822BU/hal/phydm/phydm_cfotracking.h b/rtl8822BU/hal/phydm/phydm_cfotracking.h
index 565c3dc..4dbaeb7 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_cfotracking.h
+++ b/rtl8822BU/hal/phydm/phydm_cfotracking.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef	__PHYDMCFOTRACK_H__
 #define    __PHYDMCFOTRACK_H__
@@ -28,9 +23,9 @@
 #define		CFO_TH_ATC					80			/* kHz */
 
 struct _CFO_TRACKING_ {
-	bool			is_atc_status;
-	bool			large_cfo_hit;
-	bool			is_adjust;
+	boolean			is_atc_status;
+	boolean			large_cfo_hit;
+	boolean			is_adjust;
 	u8			crystal_cap;
 	u8			def_x_cap;
 	s32			CFO_tail[4];
@@ -39,11 +34,17 @@ struct _CFO_TRACKING_ {
 	u32			packet_count;
 	u32			packet_count_pre;
 
-	bool			is_force_xtal_cap;
-	bool			is_reset;
+	boolean			is_force_xtal_cap;
+	boolean			is_reset;
 };
 
 void
+phydm_set_crystal_cap(
+	void					*p_dm_void,
+	u8					crystal_cap
+);
+
+void
 odm_cfo_tracking_reset(
 	void					*p_dm_void
 );
diff --git a/rtl8822BU/hal/phydm/phydm_debug.c b/rtl8822BU/hal/phydm/phydm_debug.c
index 1346904..31958ce 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_debug.c
+++ b/rtl8822BU/hal/phydm/phydm_debug.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 /* ************************************************************
  * include files
@@ -57,6 +52,7 @@ phydm_init_debug_setting(
 
 		/*MAC Functions*/
 		/*									ODM_COMP_EDCA_TURBO			|*/
+		/*									ODM_COMP_DYNAMIC_RX_PATH		|*/
 		/*									ODM_FW_DEBUG_TRACE				|*/
 
 		/*RF Functions*/
@@ -78,6 +74,114 @@ phydm_init_debug_setting(
 }
 
 void
+phydm_bb_dbg_port_header_sel(
+	void			*p_dm_void,
+	u32			header_idx
+) {
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	
+	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
+		
+		odm_set_bb_reg(p_dm_odm, 0x8f8, (BIT(25) | BIT(24) | BIT(23) | BIT(22)), header_idx);
+		
+		/*
+		header_idx:
+			(0:) '{ofdm_dbg[31:0]}'
+			(1:) '{cca,crc32_fail,dbg_ofdm[29:0]}'
+			(2:) '{vbon,crc32_fail,dbg_ofdm[29:0]}'
+			(3:) '{cca,crc32_ok,dbg_ofdm[29:0]}'
+			(4:) '{vbon,crc32_ok,dbg_ofdm[29:0]}'
+			(5:) '{dbg_iqk_anta}'
+			(6:) '{cca,ofdm_crc_ok,dbg_dp_anta[29:0]}'
+			(7:) '{dbg_iqk_antb}'
+			(8:) '{DBGOUT_RFC_b[31:0]}'
+			(9:) '{DBGOUT_RFC_a[31:0]}'
+			(a:) '{dbg_ofdm}'
+			(b:) '{dbg_cck}'
+		*/
+	}
+}
+
+void
+phydm_bb_dbg_port_clock_en(
+	void			*p_dm_void,
+	u8			enable
+) {
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u32		reg_value = 0;
+	
+	if (p_dm_odm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8814A | ODM_RTL8814B)) {
+		
+		reg_value = (enable == true) ? 0x7 : 0;
+		odm_set_bb_reg(p_dm_odm, 0x198c, 0x7, reg_value); /*enable/disable debug port clock, for power saving*/
+	}
+}
+
+u8
+phydm_set_bb_dbg_port(
+	void			*p_dm_void,
+	u8			curr_dbg_priority,
+	u32			debug_port
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u8	dbg_port_result = false;
+
+	if (curr_dbg_priority > p_dm_odm->pre_dbg_priority) {
+
+		if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
+			
+			phydm_bb_dbg_port_clock_en(p_dm_odm, TRUE);
+			
+			odm_set_bb_reg(p_dm_odm, 0x8fc, MASKDWORD, debug_port);
+			/**/
+		} else /*if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES)*/ {
+			odm_set_bb_reg(p_dm_odm, 0x908, MASKDWORD, debug_port);
+			/**/
+		}
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_API, ODM_DBG_LOUD, ("DbgPort set success, Reg((0x%x)), Cur_priority=((%d)), Pre_priority=((%d))\n", debug_port, curr_dbg_priority, p_dm_odm->pre_dbg_priority));
+		p_dm_odm->pre_dbg_priority = curr_dbg_priority;
+		dbg_port_result = true;
+	}
+		
+	return dbg_port_result;
+}
+
+void
+phydm_release_bb_dbg_port(
+	void			*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+
+	phydm_bb_dbg_port_clock_en(p_dm_odm, FALSE);
+	phydm_bb_dbg_port_header_sel(p_dm_odm, 0);
+
+	p_dm_odm->pre_dbg_priority = BB_DBGPORT_RELEASE;
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_API, ODM_DBG_LOUD, ("Release BB dbg_port\n"));
+}
+
+u32
+phydm_get_bb_dbg_port_value(
+	void			*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u32	dbg_port_value = 0;
+
+	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
+		dbg_port_value = odm_get_bb_reg(p_dm_odm, 0xfa0, MASKDWORD);
+		/**/
+	} else /*if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES)*/ {
+		dbg_port_value = odm_get_bb_reg(p_dm_odm, 0xdf4, MASKDWORD);
+		/**/
+	}
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_API, ODM_DBG_LOUD, ("dbg_port_value = 0x%x\n", dbg_port_value));
+	return	dbg_port_value;
+}
+
+#if CONFIG_PHYDM_DEBUG_FUNCTION
+void
 phydm_bb_rx_hang_info(
 	void			*p_dm_void,
 	u32			*_used,
@@ -255,6 +359,177 @@ phydm_bb_rx_hang_info(
 }
 
 void
+phydm_bb_debug_info_n_series(
+	void			*p_dm_void,
+	u32			*_used,
+	char				*output,
+	u32			*_out_len
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u32 used = *_used;
+	u32 out_len = *_out_len;
+
+	u32	value32 = 0, value32_1 = 0;
+	u8	rf_gain_a = 0, rf_gain_b = 0, rf_gain_c = 0, rf_gain_d = 0;
+	u8	rx_snr_a = 0, rx_snr_b = 0, rx_snr_c = 0, rx_snr_d = 0;
+
+	s8    rxevm_0 = 0, rxevm_1 = 0;
+	s32	short_cfo_a = 0, short_cfo_b = 0, long_cfo_a = 0, long_cfo_b = 0;
+	s32	scfo_a = 0, scfo_b = 0, avg_cfo_a = 0, avg_cfo_b = 0;
+	s32	cfo_end_a = 0, cfo_end_b = 0, acq_cfo_a = 0, acq_cfo_b = 0;
+
+	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s\n", "BB Report Info"));
+
+	/*AGC result*/
+	value32 = odm_get_bb_reg(p_dm_odm, 0xdd0, MASKDWORD);
+	rf_gain_a = (u8)(value32 & 0x3f);
+	rf_gain_a = rf_gain_a << 1;
+
+	rf_gain_b = (u8)((value32 >> 8) & 0x3f);
+	rf_gain_b = rf_gain_b << 1;
+
+	rf_gain_c = (u8)((value32 >> 16) & 0x3f);
+	rf_gain_c = rf_gain_c << 1;
+
+	rf_gain_d = (u8)((value32 >> 24) & 0x3f);
+	rf_gain_d = rf_gain_d << 1;
+
+	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)", rf_gain_a, rf_gain_b, rf_gain_c, rf_gain_d));
+
+	/*SNR report*/
+	value32 = odm_get_bb_reg(p_dm_odm, 0xdd4, MASKDWORD);
+	rx_snr_a = (u8)(value32 & 0xff);
+	rx_snr_a = rx_snr_a >> 1;
+
+	rx_snr_b = (u8)((value32 >> 8) & 0xff);
+	rx_snr_b = rx_snr_b >> 1;
+
+	rx_snr_c = (u8)((value32 >> 16) & 0xff);
+	rx_snr_c = rx_snr_c >> 1;
+
+	rx_snr_d = (u8)((value32 >> 24) & 0xff);
+	rx_snr_d = rx_snr_d >> 1;
+
+	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D, dB)", rx_snr_a, rx_snr_b, rx_snr_c, rx_snr_d));
+
+	/* PostFFT related info*/
+	value32 = odm_get_bb_reg(p_dm_odm, 0xdd8, MASKDWORD);
+
+	rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16);
+	rxevm_0 /= 2;
+	if (rxevm_0 < -63)
+		rxevm_0 = 0;
+
+	rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24);
+	rxevm_1 /= 2;
+	if (rxevm_1 < -63)
+		rxevm_1 = 0;
+
+	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "RXEVM (1ss/2ss)", rxevm_0, rxevm_1));
+
+	/*CFO Report Info*/
+	odm_set_bb_reg(p_dm_odm, 0xd00, BIT(26), 1);
+
+	/*Short CFO*/
+	value32 = odm_get_bb_reg(p_dm_odm, 0xdac, MASKDWORD);
+	value32_1 = odm_get_bb_reg(p_dm_odm, 0xdb0, MASKDWORD);
+
+	short_cfo_b = (s32)(value32 & 0xfff);			/*S(12,11)*/
+	short_cfo_a = (s32)((value32 & 0x0fff0000) >> 16);
+
+	long_cfo_b = (s32)(value32_1 & 0x1fff);		/*S(13,12)*/
+	long_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
+
+	/*SFO 2's to dec*/
+	if (short_cfo_a > 2047)
+		short_cfo_a = short_cfo_a - 4096;
+	if (short_cfo_b > 2047)
+		short_cfo_b = short_cfo_b - 4096;
+
+	short_cfo_a = (short_cfo_a * 312500) / 2048;
+	short_cfo_b = (short_cfo_b * 312500) / 2048;
+
+	/*LFO 2's to dec*/
+
+	if (long_cfo_a > 4095)
+		long_cfo_a = long_cfo_a - 8192;
+
+	if (long_cfo_b > 4095)
+		long_cfo_b = long_cfo_b - 8192;
+
+	long_cfo_a = long_cfo_a * 312500 / 4096;
+	long_cfo_b = long_cfo_b * 312500 / 4096;
+
+	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s", "CFO Report Info"));
+	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "Short CFO(Hz) <A/B>", short_cfo_a, short_cfo_b));
+	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "Long CFO(Hz) <A/B>", long_cfo_a, long_cfo_b));
+
+	/*SCFO*/
+	value32 = odm_get_bb_reg(p_dm_odm, 0xdb8, MASKDWORD);
+	value32_1 = odm_get_bb_reg(p_dm_odm, 0xdb4, MASKDWORD);
+
+	scfo_b = (s32)(value32 & 0x7ff);			/*S(11,10)*/
+	scfo_a = (s32)((value32 & 0x07ff0000) >> 16);
+
+	if (scfo_a > 1023)
+		scfo_a = scfo_a - 2048;
+
+	if (scfo_b > 1023)
+		scfo_b = scfo_b - 2048;
+
+	scfo_a = scfo_a * 312500 / 1024;
+	scfo_b = scfo_b * 312500 / 1024;
+
+	avg_cfo_b = (s32)(value32_1 & 0x1fff);	/*S(13,12)*/
+	avg_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
+
+	if (avg_cfo_a > 4095)
+		avg_cfo_a = avg_cfo_a - 8192;
+
+	if (avg_cfo_b > 4095)
+		avg_cfo_b = avg_cfo_b - 8192;
+
+	avg_cfo_a = avg_cfo_a * 312500 / 4096;
+	avg_cfo_b = avg_cfo_b * 312500 / 4096;
+
+	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "value SCFO(Hz) <A/B>", scfo_a, scfo_b));
+	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "Avg CFO(Hz) <A/B>", avg_cfo_a, avg_cfo_b));
+
+	value32 = odm_get_bb_reg(p_dm_odm, 0xdbc, MASKDWORD);
+	value32_1 = odm_get_bb_reg(p_dm_odm, 0xde0, MASKDWORD);
+
+	cfo_end_b = (s32)(value32 & 0x1fff);		/*S(13,12)*/
+	cfo_end_a = (s32)((value32 & 0x1fff0000) >> 16);
+
+	if (cfo_end_a > 4095)
+		cfo_end_a = cfo_end_a - 8192;
+
+	if (cfo_end_b > 4095)
+		cfo_end_b = cfo_end_b - 8192;
+
+	cfo_end_a = cfo_end_a * 312500 / 4096;
+	cfo_end_b = cfo_end_b * 312500 / 4096;
+
+	acq_cfo_b = (s32)(value32_1 & 0x1fff);	/*S(13,12)*/
+	acq_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
+
+	if (acq_cfo_a > 4095)
+		acq_cfo_a = acq_cfo_a - 8192;
+
+	if (acq_cfo_b > 4095)
+		acq_cfo_b = acq_cfo_b - 8192;
+
+	acq_cfo_a = acq_cfo_a * 312500 / 4096;
+	acq_cfo_b = acq_cfo_b * 312500 / 4096;
+
+	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "End CFO(Hz) <A/B>", cfo_end_a, cfo_end_b));
+	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d / %d", "ACQ CFO(Hz) <A/B>", acq_cfo_a, acq_cfo_b));
+
+}
+
+
+void
 phydm_bb_debug_info(
 	void			*p_dm_void,
 	u32			*_used,
@@ -294,8 +569,10 @@ phydm_bb_debug_info(
 	const double evm_comp_160M = 0.244245993314183; /* 10*log10(512.0/484.0) */
 #endif
 
-	if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES)
+	if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) {
+		phydm_bb_debug_info_n_series(p_dm_odm, &used, output, &out_len);
 		return;
+	}
 
 	PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s\n", "BB Report Info"));
 
@@ -697,15 +974,21 @@ phydm_bb_debug_info(
 		PHYDM_SNPRINTF((output + used, out_len - used, "\r\n %-35s = %d (factor = %s)", "Condition number", condition_num, factor));
 
 	}
+	*_used = used;
+    *_out_len = out_len;
 
 }
+#endif /*#if CONFIG_PHYDM_DEBUG_FUNCTION*/
+
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+
+#if CONFIG_PHYDM_DEBUG_FUNCTION
 void phydm_sbd_check(
 	struct PHY_DM_STRUCT					*p_dm_odm
 )
 {
 	static u32	pkt_cnt = 0;
-	static bool sbd_state = 0;
+	static boolean sbd_state = 0;
 	u32	sym_count, count, value32;
 
 	if (sbd_state == 0) {
@@ -722,33 +1005,176 @@ void phydm_sbd_check(
 		sbd_state = 0;
 	}
 }
+#endif /*#if CONFIG_PHYDM_DEBUG_FUNCTION*/
 
 void phydm_sbd_callback(
 	struct timer_list		*p_timer
 )
 {
-	struct _ADAPTER		*adapter = (struct _ADAPTER *)p_timer->adapter;
+#if CONFIG_PHYDM_DEBUG_FUNCTION
+	struct _ADAPTER		*adapter = (struct _ADAPTER *)p_timer->Adapter;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 
 #if USE_WORKITEM
 	odm_schedule_work_item(&p_dm_odm->sbdcnt_workitem);
 #else
 	phydm_sbd_check(p_dm_odm);
 #endif
+#endif /*#if CONFIG_PHYDM_DEBUG_FUNCTION*/
 }
 
 void phydm_sbd_workitem_callback(
 	void            *p_context
 )
 {
+#if CONFIG_PHYDM_DEBUG_FUNCTION
 	struct _ADAPTER	*p_adapter = (struct _ADAPTER *)p_context;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 
 	phydm_sbd_check(p_dm_odm);
+#endif /*#if CONFIG_PHYDM_DEBUG_FUNCTION*/
 }
 #endif
+
+void
+phydm_rx_rate_distribution
+(
+	void			*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _odm_phy_dbg_info_		*p_dbg = &(p_dm_odm->phy_dbg_info);
+	u8	i = 0, j = 0;
+	u8	rate_num = 1, rate_ss_shift = 0;
+
+	if (p_dm_odm->support_ic_type & ODM_IC_4SS)
+		rate_num = 4;
+	else if (p_dm_odm->support_ic_type & ODM_IC_3SS)
+		rate_num = 3;
+	else if (p_dm_odm->support_ic_type & ODM_IC_2SS)
+		rate_num = 2;
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[RxRate Cnt] =============> \n"));
+
+	/*======CCK=============================================================*/
+	if (*(p_dm_odm->p_channel) <= 14) {
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("* CCK = {%d, %d, %d, %d}\n",
+			p_dbg->num_qry_legacy_pkt[0],
+			p_dbg->num_qry_legacy_pkt[1],
+			p_dbg->num_qry_legacy_pkt[2],
+			p_dbg->num_qry_legacy_pkt[3]
+			));
+	}
+	/*======OFDM============================================================*/
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("* OFDM = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
+		p_dbg->num_qry_legacy_pkt[4], p_dbg->num_qry_legacy_pkt[5],
+		p_dbg->num_qry_legacy_pkt[6], p_dbg->num_qry_legacy_pkt[7],
+		p_dbg->num_qry_legacy_pkt[8], p_dbg->num_qry_legacy_pkt[9],
+		p_dbg->num_qry_legacy_pkt[10], p_dbg->num_qry_legacy_pkt[11]));
+
+	for (j = 0; j < 11; j++) {
+		p_dbg->num_qry_legacy_pkt[j] = 0;
+	}
+	
+	/*======HT==============================================================*/
+	if (p_dbg->ht_pkt_not_zero) {
+		
+		for (i = 0; i < rate_num; i++) {
+			
+			rate_ss_shift = (i << 3);
+			
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("* HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
+				(rate_ss_shift), (rate_ss_shift+7),
+				p_dbg->num_qry_ht_pkt[rate_ss_shift + 0], p_dbg->num_qry_ht_pkt[rate_ss_shift + 1],
+				p_dbg->num_qry_ht_pkt[rate_ss_shift + 2], p_dbg->num_qry_ht_pkt[rate_ss_shift + 3],
+				p_dbg->num_qry_ht_pkt[rate_ss_shift + 4], p_dbg->num_qry_ht_pkt[rate_ss_shift + 5],
+				p_dbg->num_qry_ht_pkt[rate_ss_shift + 6], p_dbg->num_qry_ht_pkt[rate_ss_shift + 7]));
+
+			for (j = 0; j < 8; j++) {
+				p_dbg->num_qry_ht_pkt[rate_ss_shift + j] = 0;
+			}
+			p_dbg->ht_pkt_not_zero = false;
+		}
+	}
+	
+#if	ODM_IC_11AC_SERIES_SUPPORT
+	/*======VHT=============================================================*/
+	if (p_dbg->vht_pkt_not_zero){
+		
+		for (i = 0; i < rate_num; i++) {
+			
+			rate_ss_shift = 10 * i;
+			
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("* VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
+				(i + 1),
+				p_dbg->num_qry_vht_pkt[rate_ss_shift + 0], p_dbg->num_qry_vht_pkt[rate_ss_shift + 1],
+				p_dbg->num_qry_vht_pkt[rate_ss_shift + 2], p_dbg->num_qry_vht_pkt[rate_ss_shift + 3],
+				p_dbg->num_qry_vht_pkt[rate_ss_shift + 4], p_dbg->num_qry_vht_pkt[rate_ss_shift + 5],
+				p_dbg->num_qry_vht_pkt[rate_ss_shift + 6], p_dbg->num_qry_vht_pkt[rate_ss_shift + 7],
+				p_dbg->num_qry_vht_pkt[rate_ss_shift + 8], p_dbg->num_qry_vht_pkt[rate_ss_shift + 9]));
+
+			for (j = 0; j < 10; j++) {
+				p_dbg->num_qry_vht_pkt[rate_ss_shift + j] = 0;
+			}
+			p_dbg->vht_pkt_not_zero = false;
+		}
+	}
+#endif
+	
+}
+
+void
+phydm_show_avg_rssi
+(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _odm_phy_dbg_info_		*p_dbg = &(p_dm_odm->phy_dbg_info);
+	
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[Avg RSSI] ==============> \n"));
+
+	p_dbg->rssi_cck_avg = (u8)((p_dbg->rssi_cck_cnt != 0) ? (p_dbg->rssi_cck_sum/p_dbg->rssi_cck_cnt) : 0);
+	p_dbg->rssi_ofdm_avg = (u8)((p_dbg->rssi_ofdm_cnt != 0) ? (p_dbg->rssi_ofdm_sum/p_dbg->rssi_ofdm_cnt) : 0);
+	p_dbg->rssi_1ss_avg = (u8)((p_dbg->rssi_1ss_cnt != 0) ? (p_dbg->rssi_1ss_sum/p_dbg->rssi_1ss_cnt) : 0);
+	
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("* cck Cnt= ((%d)) avg_RSSI:{%d}\n", p_dbg->rssi_cck_cnt, p_dbg->rssi_cck_avg));
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("* ofdm Cnt= ((%d)) avg_RSSI:{%d}\n", p_dbg->rssi_ofdm_cnt, p_dbg->rssi_ofdm_avg));
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("* 1-ss Cnt= ((%d)) avg_RSSI:{%d}\n", p_dbg->rssi_1ss_cnt, p_dbg->rssi_1ss_avg));
+
+	if (p_dm_odm->support_ic_type & (ODM_IC_2SS |ODM_IC_3SS |ODM_IC_4SS)) {
+
+		p_dbg->rssi_2ss_avg[0] = (u8)((p_dbg->rssi_2ss_cnt != 0) ? (p_dbg->rssi_2ss_sum[0] /p_dbg->rssi_2ss_cnt) : 0);
+		p_dbg->rssi_2ss_avg[1] = (u8)((p_dbg->rssi_2ss_cnt != 0) ? (p_dbg->rssi_2ss_sum[1] /p_dbg->rssi_2ss_cnt) : 0);
+		
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("* 2-ss Cnt= ((%d)) avg_RSSI:{%d, %d}\n",
+			p_dbg->rssi_2ss_cnt, p_dbg->rssi_2ss_avg[0], p_dbg->rssi_2ss_avg[1]));
+	}
+	if (p_dm_odm->support_ic_type & (ODM_IC_3SS |ODM_IC_4SS)) {
+
+		p_dbg->rssi_3ss_avg[0] = (u8)((p_dbg->rssi_3ss_cnt != 0) ? (p_dbg->rssi_3ss_sum[0] /p_dbg->rssi_3ss_cnt) : 0);
+		p_dbg->rssi_3ss_avg[1] = (u8)((p_dbg->rssi_3ss_cnt != 0) ? (p_dbg->rssi_3ss_sum[1] /p_dbg->rssi_3ss_cnt) : 0);
+		p_dbg->rssi_3ss_avg[2] = (u8)((p_dbg->rssi_3ss_cnt != 0) ? (p_dbg->rssi_3ss_sum[2] /p_dbg->rssi_3ss_cnt) : 0);
+		
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("* 3-ss Cnt= ((%d)) avg_RSSI:{%d, %d, %d}\n",
+			p_dbg->rssi_3ss_cnt, p_dbg->rssi_3ss_avg[0], p_dbg->rssi_3ss_avg[1], p_dbg->rssi_3ss_avg[2]));
+	}
+	if (p_dm_odm->support_ic_type & ODM_IC_4SS) {
+
+		p_dbg->rssi_4ss_avg[0] = (u8)((p_dbg->rssi_4ss_cnt != 0) ? (p_dbg->rssi_4ss_sum[0] /p_dbg->rssi_4ss_cnt) : 0);
+		p_dbg->rssi_4ss_avg[1] = (u8)((p_dbg->rssi_4ss_cnt != 0) ? (p_dbg->rssi_4ss_sum[1] /p_dbg->rssi_4ss_cnt) : 0);
+		p_dbg->rssi_4ss_avg[2] = (u8)((p_dbg->rssi_4ss_cnt != 0) ? (p_dbg->rssi_4ss_sum[2] /p_dbg->rssi_4ss_cnt) : 0);
+		p_dbg->rssi_4ss_avg[3] = (u8)((p_dbg->rssi_4ss_cnt != 0) ? (p_dbg->rssi_4ss_sum[3] /p_dbg->rssi_4ss_cnt) : 0);
+		
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("* 4-ss Cnt= ((%d)) avg_RSSI:{%d, %d, %d, %d}\n",
+			p_dbg->rssi_4ss_cnt, p_dbg->rssi_4ss_avg[0], p_dbg->rssi_4ss_avg[1], p_dbg->rssi_4ss_avg[2], p_dbg->rssi_4ss_avg[3]));
+	}
+
+	phydm_reset_avg_rssi_for_ss(p_dm_odm);
+}
+
 void
 phydm_basic_dbg_message
 (
@@ -766,21 +1192,26 @@ phydm_basic_dbg_message
 	s32	tmp_val = 0;
 	u8	tmp_val_u1 = 0;
 
+	if (!(ODM_COMP_COMMON & p_dm_odm->debug_components))
+		return;
+
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[PHYDM Common MSG] System up time: ((%d sec))----->\n", p_dm_odm->phydm_sys_up_time));
 
 	if (p_dm_odm->is_linked) {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Curr_STA_ID =  0x%x\n", p_dm_odm->curr_station_id));
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ID=((%d)), BW=((%d)), CH=((%d))\n", p_dm_odm->curr_station_id, 20<<(*(p_dm_odm->p_band_width)), *(p_dm_odm->p_channel)));
 
-		/*Print RX rate*/
-		if (p_dm_odm->rx_rate <= ODM_RATE11M) {
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[CCK AGC Report] LNA_idx = 0x%x, VGA_idx = 0x%x\n",
-				p_dm_odm->cck_lna_idx, p_dm_odm->cck_vga_idx));
-		} else {
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[OFDM AGC Report] { 0x%x, 0x%x, 0x%x, 0x%x }\n",
+
+		if ((p_dm_odm->support_ic_type & ODM_IC_PHY_STATUE_NEW_TYPE) || p_dm_odm->rx_rate > ODM_RATE11M) {
+			
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[AGC Idx] {0x%x, 0x%x, 0x%x, 0x%x}\n",
 				p_dm_odm->ofdm_agc_idx[0], p_dm_odm->ofdm_agc_idx[1], p_dm_odm->ofdm_agc_idx[2], p_dm_odm->ofdm_agc_idx[3]));
+		} else {
+		
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[CCK AGC Idx] {LNA, VGA}={0x%x, 0x%x}\n",
+				p_dm_odm->cck_lna_idx, p_dm_odm->cck_vga_idx));
 		}
 
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI: { %d,  %d,  %d,  %d },    rx_rate:",
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI:{%d, %d, %d, %d}, RxRate:",
 			(p_dm_odm->RSSI_A == 0xff) ? 0 : p_dm_odm->RSSI_A,
 			(p_dm_odm->RSSI_B == 0xff) ? 0 : p_dm_odm->RSSI_B,
 			(p_dm_odm->RSSI_C == 0xff) ? 0 : p_dm_odm->RSSI_C,
@@ -788,42 +1219,47 @@ phydm_basic_dbg_message
 
 		phydm_print_rate(p_dm_odm, p_dm_odm->rx_rate, ODM_COMP_COMMON);
 
+		phydm_rx_rate_distribution(p_dm_odm);
+		phydm_show_avg_rssi(p_dm_odm);
+
 		/*Print TX rate*/
 		for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
 
 			p_entry = p_dm_odm->p_odm_sta_info[macid];
-			if (IS_STA_VALID(p_entry)) {
+			if (!IS_STA_VALID(p_entry)) {
+				continue;
+			}
 
-				phydm_macid = (p_dm_odm->platform2phydm_macid_table[macid]);
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("TXRate [%d]:", macid));
-				phydm_print_rate(p_dm_odm, p_ra_table->link_tx_rate[macid], ODM_COMP_COMMON);
+			phydm_macid = (p_dm_odm->platform2phydm_macid_table[macid]);
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("TxRate[%d]:", macid));
+			phydm_print_rate(p_dm_odm, p_ra_table->link_tx_rate[macid], ODM_COMP_COMMON);
 
-				client_cnt++;
+			client_cnt++;
 
-				if (client_cnt == p_dm_odm->number_linked_client)
-					break;
-			}
+			if (client_cnt >= p_dm_odm->number_linked_client)
+				break;
 		}
 
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("TP { TX, RX, total} = {%d, %d, %d }Mbps, traffic_load = (%d))\n",
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("TP {Tx, Rx, Total} = {%d, %d, %d}Mbps, Traffic_Load=(%d))\n",
 			p_dm_odm->tx_tp, p_dm_odm->rx_tp, p_dm_odm->total_tp, p_dm_odm->traffic_load));
 
 		tmp_val_u1 = (p_cfo_track->crystal_cap > p_cfo_track->def_x_cap) ? (p_cfo_track->crystal_cap - p_cfo_track->def_x_cap) : (p_cfo_track->def_x_cap - p_cfo_track->crystal_cap);
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("CFO_avg = ((%d kHz)) , CrystalCap_tracking = ((%s%d))\n",
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("CFO_avg = ((%d kHz)) , CFO_tracking = ((%s%d))\n",
 			p_cfo_track->CFO_ave_pre, ((p_cfo_track->crystal_cap > p_cfo_track->def_x_cap) ? "+" : "-"), tmp_val_u1));
 
 		/* Condition number */
-#if (RTL8822B_SUPPORT == 1)
+	#if (RTL8822B_SUPPORT == 1)
 		if (p_dm_odm->support_ic_type == ODM_RTL8822B) {
 			tmp_val = phydm_get_condition_number_8822B(p_dm_odm);
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Condition number = ((%d))\n", tmp_val));
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Condi_Num=((%d))\n", tmp_val));
 		}
-#endif
+	#endif
 
-#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
+	#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
 		/*STBC or LDPC pkt*/
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("LDPC = %s, STBC = %s\n", (p_dm_odm->phy_dbg_info.is_ldpc_pkt) ? "Y" : "N", (p_dm_odm->phy_dbg_info.is_stbc_pkt) ? "Y" : "N"));
-#endif
+		if (p_dm_odm->support_ic_type & ODM_IC_PHY_STATUE_NEW_TYPE)
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Coding: LDPC=((%s)), STBC=((%s))\n", (p_dm_odm->phy_dbg_info.is_ldpc_pkt) ? "Y" : "N", (p_dm_odm->phy_dbg_info.is_stbc_pkt) ? "Y" : "N"));
+	#endif
 	} else
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("No Link !!!\n"));
 
@@ -833,30 +1269,16 @@ phydm_basic_dbg_message
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
 		false_alm_cnt->cnt_cck_fail, false_alm_cnt->cnt_ofdm_fail, false_alm_cnt->cnt_all));
 
-#if (ODM_IC_11N_SERIES_SUPPORT == 1)
+	#if (ODM_IC_11N_SERIES_SUPPORT == 1)
 	if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) {
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("[OFDM FA Detail] Parity_Fail = (( %d )), Rate_Illegal = (( %d )), CRC8_fail = (( %d )), Mcs_fail = (( %d )), Fast_Fsync = (( %d )), SB_Search_fail = (( %d ))\n",
 			false_alm_cnt->cnt_parity_fail, false_alm_cnt->cnt_rate_illegal, false_alm_cnt->cnt_crc8_fail, false_alm_cnt->cnt_mcs_fail, false_alm_cnt->cnt_fast_fsync, false_alm_cnt->cnt_sb_search_fail));
 	}
-#endif
+	#endif
 
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("is_linked = %d, Num_client = %d, rssi_min = %d, current_igi = 0x%x, bNoisy=%d\n\n",
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x, bNoisy=%d\n\n",
 		p_dm_odm->is_linked, p_dm_odm->number_linked_client, p_dm_odm->rssi_min, p_dm_dig_table->cur_ig_value, p_dm_odm->noisy_decision));
 
-	/*
-		temp_reg = odm_get_bb_reg(p_dm_odm, 0xDD0, MASKBYTE0);
-		ODM_RT_TRACE(p_dm_odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("0xDD0 = 0x%x\n",temp_reg));
-
-		temp_reg = odm_get_bb_reg(p_dm_odm, 0xDDc, MASKBYTE1);
-		ODM_RT_TRACE(p_dm_odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("0xDDD = 0x%x\n",temp_reg));
-
-		temp_reg = odm_get_bb_reg(p_dm_odm, 0xc50, MASKBYTE0);
-		ODM_RT_TRACE(p_dm_odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("0xC50 = 0x%x\n",temp_reg));
-
-		temp_reg = odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x0, 0x3fe0);
-		ODM_RT_TRACE(p_dm_odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("RF 0x0[13:5] = 0x%x\n\n",temp_reg));
-	*/
-
 #endif
 }
 
@@ -868,12 +1290,12 @@ void phydm_basic_profile(
 	u32			*_out_len
 )
 {
+#if CONFIG_PHYDM_DEBUG_FUNCTION
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	char  *cut = NULL;
 	char *ic_type = NULL;
 	u32 used = *_used;
 	u32 out_len = *_out_len;
-	u32	commit_ver = 0;
 	u32	date = 0;
 	char	*commit_by = NULL;
 	u32	release_ver = 0;
@@ -984,6 +1406,18 @@ void phydm_basic_profile(
 		/**/
 	}
 #endif
+
+/* JJ ADD 20161014 */
+#if (RTL8710B_SUPPORT == 1)
+	else if (p_dm_odm->support_ic_type == ODM_RTL8710B) {
+		ic_type = "RTL8710B";
+		date = RELEASE_DATE_8710B;
+		commit_by = COMMIT_BY_8710B;
+		release_ver = RELEASE_VERSION_8710B;
+		/**/
+	}
+#endif
+
 #if (RTL8821C_SUPPORT == 1)
 	else if (p_dm_odm->support_ic_type == ODM_RTL8821C) {
 		ic_type = "RTL8821C";
@@ -1017,13 +1451,20 @@ void phydm_basic_profile(
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	{
 		struct _ADAPTER		*adapter = p_dm_odm->adapter;
-		PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %d (Subversion: %d)\n", "FW version", adapter->mgnt_info.firmware_version, adapter->mgnt_info.firmware_sub_version));
+		PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %d (Subversion: %d)\n", "FW version", adapter->MgntInfo.FirmwareVersion, adapter->MgntInfo.FirmwareSubVersion));
 	}
 #elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	{
 		struct rtl8192cd_priv *priv = p_dm_odm->priv;
 		PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %d (Subversion: %d)\n", "FW version", priv->pshare->fw_version, priv->pshare->fw_sub_version));
 	}
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	{
+		struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+		struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
+
+		PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %d (Subversion: %d)\n", "FW version", rtlhal->fw_version, rtlhal->fw_subversion));
+	}
 #else
 	{
 		struct _ADAPTER		*adapter = p_dm_odm->adapter;
@@ -1040,14 +1481,12 @@ void phydm_basic_profile(
 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Dynamic BB PowerSaving", DYNAMIC_BBPWRSAV_VERSION));
 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "CFO Tracking", CFO_TRACKING_VERSION));
 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Antenna Diversity", ANTDIV_VERSION));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Power Tracking", POWRTRACKING_VERSION));
 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Dynamic TxPower", DYNAMIC_TXPWR_VERSION));
 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "RA Info", RAINFO_VERSION));
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Antenna Detection", ANTDECT_VERSION));
 #endif
 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Auto channel Selection", ACS_VERSION));
-	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "EDCA Turbo", EDCATURBO_VERSION));
 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "path Diversity", PATHDIV_VERSION));
 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "LA mode", DYNAMIC_LA_MODE));
 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s\n", "Dynamic RX path", DYNAMIC_RX_PATH_VERSION));
@@ -1063,13 +1502,14 @@ void phydm_basic_profile(
 #endif
 	*_used = used;
 	*_out_len = out_len;
-
+#endif /*#if CONFIG_PHYDM_DEBUG_FUNCTION*/
 }
 
+#if CONFIG_PHYDM_DEBUG_FUNCTION
 void
 phydm_fw_trace_en_h2c(
 	void		*p_dm_void,
-	bool		enable,
+	boolean		enable,
 	u32		fw_debug_component,
 	u32		monitor_mode,
 	u32		macid
@@ -1109,16 +1549,19 @@ phydm_fw_trace_en_h2c(
 
 
 #if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-bool
+boolean
 phydm_api_set_txagc(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	u32					power_index,
 	enum odm_rf_radio_path_e		path,
 	u8					hw_rate,
-	bool					is_single_rate
+	boolean					is_single_rate
 )
 {
-	bool		ret = false;
+	boolean		ret = false;
+	#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
+	u8	i;
+	#endif
 
 #if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1))
 	if (p_dm_odm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) {
@@ -1136,7 +1579,7 @@ phydm_api_set_txagc(
 #endif
 
 		} else {
-			u8	i;
+
 #if (RTL8822B_SUPPORT == 1)
 			if (p_dm_odm->support_ic_type == ODM_RTL8822B)
 				ret = config_phydm_write_txagc_8822b(p_dm_odm, power_index, path, hw_rate);
@@ -1190,7 +1633,7 @@ phydm_api_get_txagc(
 }
 
 
-bool
+boolean
 phydm_api_switch_bw_channel(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	u8					central_ch,
@@ -1198,7 +1641,7 @@ phydm_api_switch_bw_channel(
 	enum odm_bw_e				bandwidth
 )
 {
-	bool		ret = false;
+	boolean		ret = false;
 
 #if (RTL8822B_SUPPORT == 1)
 	if (p_dm_odm->support_ic_type & ODM_RTL8822B)
@@ -1218,15 +1661,15 @@ phydm_api_switch_bw_channel(
 	return ret;
 }
 
-bool
+boolean
 phydm_api_trx_mode(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	enum odm_rf_path_e			tx_path,
 	enum odm_rf_path_e			rx_path,
-	bool					is_tx2_path
+	boolean					is_tx2_path
 )
 {
-	bool		ret = false;
+	boolean		ret = false;
 
 #if (RTL8822B_SUPPORT == 1)
 	if (p_dm_odm->support_ic_type & ODM_RTL8822B)
@@ -1351,7 +1794,7 @@ phydm_set_txagc(
 			} else {
 				u8	i;
 				u32	power_index;
-				bool	status = true;
+				boolean	status = true;
 
 				power_index = (dm_value[3] & 0x3f);
 
@@ -1409,12 +1852,11 @@ phydm_debug_trace(
 		PHYDM_SNPRINTF((output + used, out_len - used, "10. (( %s ))PATH_DIV\n", ((p_dm_odm->debug_components & ODM_COMP_PATH_DIV) ? ("V") : ("."))));
 		PHYDM_SNPRINTF((output + used, out_len - used, "12. (( %s ))DYNAMIC_PRICCA\n", ((p_dm_odm->debug_components & ODM_COMP_DYNAMIC_PRICCA) ? ("V") : ("."))));
 		PHYDM_SNPRINTF((output + used, out_len - used, "14. (( %s ))MP\n", ((p_dm_odm->debug_components & ODM_COMP_MP) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "15. (( %s ))struct _CFO_TRACKING_\n", ((p_dm_odm->debug_components & ODM_COMP_CFO_TRACKING) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "16. (( %s ))struct _ACS_\n", ((p_dm_odm->debug_components & ODM_COMP_ACS) ? ("V") : ("."))));
+		PHYDM_SNPRINTF((output + used, out_len - used, "15. (( %s ))CFO_TRACKING\n", ((p_dm_odm->debug_components & ODM_COMP_CFO_TRACKING) ? ("V") : ("."))));
+		PHYDM_SNPRINTF((output + used, out_len - used, "16. (( %s ))ACS\n", ((p_dm_odm->debug_components & ODM_COMP_ACS) ? ("V") : ("."))));
 		PHYDM_SNPRINTF((output + used, out_len - used, "17. (( %s ))ADAPTIVITY\n", ((p_dm_odm->debug_components & PHYDM_COMP_ADAPTIVITY) ? ("V") : ("."))));
 		PHYDM_SNPRINTF((output + used, out_len - used, "18. (( %s ))RA_DBG\n", ((p_dm_odm->debug_components & PHYDM_COMP_RA_DBG) ? ("V") : ("."))));
 		PHYDM_SNPRINTF((output + used, out_len - used, "19. (( %s ))TXBF\n", ((p_dm_odm->debug_components & PHYDM_COMP_TXBF) ? ("V") : ("."))));
-		PHYDM_SNPRINTF((output + used, out_len - used, "20. (( %s ))EDCA_TURBO\n", ((p_dm_odm->debug_components & ODM_COMP_EDCA_TURBO) ? ("V") : ("."))));
 		PHYDM_SNPRINTF((output + used, out_len - used, "22. (( %s ))FW_DEBUG_TRACE\n", ((p_dm_odm->debug_components & ODM_FW_DEBUG_TRACE) ? ("V") : ("."))));
 
 		PHYDM_SNPRINTF((output + used, out_len - used, "24. (( %s ))TX_PWR_TRACK\n", ((p_dm_odm->debug_components & ODM_COMP_TX_PWR_TRACK) ? ("V") : ("."))));
@@ -1590,7 +2032,7 @@ phydm_dump_all_reg(
 void
 phydm_enable_big_jump(
 	struct PHY_DM_STRUCT	*p_dm_odm,
-	bool		state
+	boolean		state
 )
 {
 #if (RTL8822B_SUPPORT == 1)
@@ -1604,7 +2046,7 @@ phydm_enable_big_jump(
 #endif
 }
 
-#if (RTL8822B_SUPPORT == 1)
+#if (RTL8822B_SUPPORT == 1 | RTL8821C_SUPPORT == 1 | RTL8814B_SUPPORT == 1)
 
 void
 phydm_show_rx_rate(
@@ -1649,6 +2091,39 @@ phydm_show_rx_rate(
 
 #endif
 
+void
+phydm_parameter_adjust(
+	void		*p_dm_void,
+	char		input[][16],
+	u32		*_used,
+	char		*output,
+	u32		*_out_len,
+	u32		input_num
+)
+{
+	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _CFO_TRACKING_				*p_cfo_track = (struct _CFO_TRACKING_ *)phydm_get_structure(p_dm_odm, PHYDM_CFOTRACK);
+	char		help[] = "-h";
+	u32		var1[10] = {0};
+	u32		used = *_used;
+	u32		out_len = *_out_len;
+	u8		i;
+
+	if ((strcmp(input[1], help) == 0)) {
+		PHYDM_SNPRINTF((output + used, out_len - used, "1. X_cap = ((0x%x))\n", p_cfo_track->crystal_cap));
+
+	} else {
+	
+		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
+
+		if (var1[0] == 0) {
+
+			PHYDM_SSCANF(input[2], DCMD_HEX, &var1[1]);
+			phydm_set_crystal_cap(p_dm_odm, (u8)var1[1]);
+			PHYDM_SNPRINTF((output + used, out_len - used, "X_cap = ((0x%x))\n", p_cfo_track->crystal_cap));
+		}
+	}
+}
 
 struct _PHYDM_COMMAND {
 	char name[16];
@@ -1665,6 +2140,8 @@ enum PHYDM_CMD_ID {
 	PHYDM_DEBUG,
 	PHYDM_FW_DEBUG,
 	PHYDM_SUPPORT_ABILITY,
+	PHYDM_RF_SUPPORTABILITY,
+	PHYDM_RF_PROFILE,
 	PHYDM_GET_TXAGC,
 	PHYDM_SET_TXAGC,
 	PHYDM_SMART_ANT,
@@ -1672,7 +2149,6 @@ enum PHYDM_CMD_ID {
 	PHYDM_TRX_PATH,
 	PHYDM_LA_MODE,
 	PHYDM_DUMP_REG,
-	PHYDM_MU_MIMO,
 	PHYDM_HANG,
 	PHYDM_BIG_JUMP,
 	PHYDM_SHOW_RXRATE,
@@ -1686,7 +2162,13 @@ enum PHYDM_CMD_ID {
 	PHYDM_TXBF,
 	PHYDM_PAUSE_DIG_EN,
 	PHYDM_H2C,
-	PHYDM_ANT_SWITCH
+	PHYDM_ANT_SWITCH,
+	PHYDM_DYNAMIC_RA_PATH,
+	PHYDM_PSD,
+	PHYDM_DEBUG_PORT,
+	PHYDM_HTSTF_CONTROL,
+	PHYDM_TUNE_PARAMETER,
+	PHYDM_ADAPTIVITY_DEBUG
 };
 
 struct _PHYDM_COMMAND phy_dm_ary[] = {
@@ -1699,6 +2181,8 @@ struct _PHYDM_COMMAND phy_dm_ary[] = {
 	{"dbg", PHYDM_DEBUG},
 	{"fw_dbg", PHYDM_FW_DEBUG},
 	{"ability", PHYDM_SUPPORT_ABILITY},
+	{"rf_ability", PHYDM_RF_SUPPORTABILITY},
+	{"rf_profile", PHYDM_RF_PROFILE},
 	{"get_txagc", PHYDM_GET_TXAGC},
 	{"set_txagc", PHYDM_SET_TXAGC},
 	{"smtant", PHYDM_SMART_ANT},
@@ -1706,7 +2190,6 @@ struct _PHYDM_COMMAND phy_dm_ary[] = {
 	{"trxpath", PHYDM_TRX_PATH},
 	{"lamode", PHYDM_LA_MODE},
 	{"dumpreg", PHYDM_DUMP_REG},
-	{"mu", PHYDM_MU_MIMO},
 	{"hang", PHYDM_HANG},
 	{"bigjump", PHYDM_BIG_JUMP},
 	{"rxrate", PHYDM_SHOW_RXRATE},
@@ -1720,9 +2203,17 @@ struct _PHYDM_COMMAND phy_dm_ary[] = {
 	{"txbf", PHYDM_TXBF},
 	{"pause_dig", PHYDM_PAUSE_DIG_EN},
 	{"h2c", PHYDM_H2C},
-	{"ant_switch", PHYDM_ANT_SWITCH}
+	{"ant_switch", PHYDM_ANT_SWITCH},
+	{"drp", PHYDM_DYNAMIC_RA_PATH},
+	{"psd", PHYDM_PSD},
+	{"dbgport", PHYDM_DEBUG_PORT},
+	{"htstf", PHYDM_HTSTF_CONTROL},
+	{"tune_para", PHYDM_TUNE_PARAMETER},
+	{"adapt_debug", PHYDM_ADAPTIVITY_DEBUG}
 };
 
+#endif /*#if CONFIG_PHYDM_DEBUG_FUNCTION*/
+
 void
 phydm_cmd_parser(
 	struct PHY_DM_STRUCT	*p_dm_odm,
@@ -1733,6 +2224,7 @@ phydm_cmd_parser(
 	u32	out_len
 )
 {
+#if CONFIG_PHYDM_DEBUG_FUNCTION
 	u32 used = 0;
 	u8 id = 0;
 	int var1[10] = {0};
@@ -1908,6 +2400,14 @@ phydm_cmd_parser(
 
 		break;
 
+	case PHYDM_RF_SUPPORTABILITY:
+		halrf_support_ability_debug(p_dm_odm, &input[0], &used, output, &out_len);
+		break;
+
+	case PHYDM_RF_PROFILE:
+		phydm_rf_basic_profile(p_dm_odm, &used, output, &out_len);
+		break;
+		
 	case PHYDM_SMART_ANT:
 
 		for (i = 0; i < 5; i++) {
@@ -1919,9 +2419,12 @@ phydm_cmd_parser(
 
 		if (input_idx >= 1) {
 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
-#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
-			phydm_hl_smart_ant_debug(p_dm_odm, (u32 *)var1, &used, output, &out_len);
-#endif
+
+	#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
+		phydm_hl_smart_ant_debug_type2(p_dm_odm, &input[0], &used, output, &out_len, input_num);
+	#elif (defined(CONFIG_HL_SMART_ANTENNA_TYPE1))
+		phydm_hl_smart_ant_debug(p_dm_odm, &input[0], &used, output, &out_len, input_num);
+	#endif
 #endif
 		}
 
@@ -1931,7 +2434,7 @@ phydm_cmd_parser(
 #if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
 		{
 			if (p_dm_odm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8821C)) {
-				bool	is_enable_dbg_mode;
+				boolean	is_enable_dbg_mode;
 				u8 central_ch, primary_ch_idx, bandwidth;
 
 				for (i = 0; i < 4; i++) {
@@ -1939,7 +2442,7 @@ phydm_cmd_parser(
 						PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
 				}
 
-				is_enable_dbg_mode = (bool)var1[0];
+				is_enable_dbg_mode = (boolean)var1[0];
 				central_ch = (u8) var1[1];
 				primary_ch_idx = (u8) var1[2];
 				bandwidth = (enum odm_bw_e) var1[3];
@@ -1961,7 +2464,7 @@ phydm_cmd_parser(
 #endif
 		break;
 
-	case PHYDM_PROFILE: /*echo profile, >cmd*/
+	case PHYDM_PROFILE:
 		phydm_basic_profile(p_dm_odm, &used, output, &out_len);
 		break;
 
@@ -1971,7 +2474,7 @@ phydm_cmd_parser(
 
 	case PHYDM_SET_TXAGC:
 	{
-		bool		is_enable_dbg_mode;
+		boolean		is_enable_dbg_mode;
 
 		for (i = 0; i < 5; i++) {
 			if (input[i + 1]) {
@@ -1986,7 +2489,7 @@ phydm_cmd_parser(
 
 		} else {
 
-			is_enable_dbg_mode = (bool)var1[0];
+			is_enable_dbg_mode = (boolean)var1[0];
 			if (is_enable_dbg_mode) {
 				p_dm_odm->is_disable_phy_api = false;
 				phydm_set_txagc(p_dm_odm, (u32 *)var1, &used, output, &out_len);
@@ -2008,12 +2511,12 @@ phydm_cmd_parser(
 #if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1)
 		if (p_dm_odm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F)) {
 			u8		tx_path, rx_path;
-			bool		is_enable_dbg_mode, is_tx2_path;
+			boolean		is_enable_dbg_mode, is_tx2_path;
 
-			is_enable_dbg_mode = (bool)var1[0];
+			is_enable_dbg_mode = (boolean)var1[0];
 			tx_path = (u8) var1[1];
 			rx_path = (u8) var1[2];
-			is_tx2_path = (bool) var1[3];
+			is_tx2_path = (boolean) var1[3];
 
 			if (is_enable_dbg_mode) {
 				p_dm_odm->is_disable_phy_api = false;
@@ -2033,7 +2536,9 @@ phydm_cmd_parser(
 	case PHYDM_LA_MODE:
 
 #if (PHYDM_LA_MODE_SUPPORT == 1)
+		p_dm_odm->support_ability &= ~(ODM_BB_FA_CNT);
 		phydm_lamode_trigger_setting(p_dm_odm, &input[0], &used, output, &out_len, input_num);
+		p_dm_odm->support_ability |= ODM_BB_FA_CNT;
 #else
 		PHYDM_SNPRINTF((output + used, out_len - used, "This IC doesn't support LA mode\n"));
 #endif
@@ -2056,85 +2561,17 @@ phydm_cmd_parser(
 	}
 	break;
 
-	case PHYDM_MU_MIMO:
-#if (RTL8822B_SUPPORT == 1)
-
-		if (input[1])
-			PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
-		else
-			var1[0] = 0;
-
-		if (var1[0] == 1) {
-			int index, ptr;
-			u32 dword_h, dword_l;
-
-			PHYDM_SNPRINTF((output + used, out_len - used, "Get MU BFee CSI\n"));
-			odm_set_bb_reg(p_dm_odm, 0x9e8, BIT(17) | BIT16, 2); /*Read BFee*/
-			odm_set_bb_reg(p_dm_odm, 0x1910, BIT(15), 1); /*Select BFee's CSI report*/
-			odm_set_bb_reg(p_dm_odm, 0x19b8, BIT(6), 1); /*set as CSI report*/
-			odm_set_bb_reg(p_dm_odm, 0x19a8, 0xFFFF, 0xFFFF); /*disable gated_clk*/
-
-			for (index = 0; index < 80; index++) {
-				ptr = index + 256;
-				if (ptr > 311)
-					ptr -= 312;
-				odm_set_bb_reg(p_dm_odm, 0x1910, 0x03FF0000, ptr); /*Select Address*/
-				dword_h = odm_get_bb_reg(p_dm_odm, 0xF74, MASKDWORD);
-				dword_l = odm_get_bb_reg(p_dm_odm, 0xF5C, MASKDWORD);
-				if (index % 2 == 0)
-					PHYDM_SNPRINTF((output + used, out_len - used, "%02x  %02x  %02x  %02x  %02x  %02x  %02x  %02x\n",
-						dword_l & MASKBYTE0, (dword_l & MASKBYTE1) >> 8, (dword_l & MASKBYTE2) >> 16, (dword_l & MASKBYTE3) >> 24,
-						dword_h & MASKBYTE0, (dword_h & MASKBYTE1) >> 8, (dword_h & MASKBYTE2) >> 16, (dword_h & MASKBYTE3) >> 24));
-				else
-					PHYDM_SNPRINTF((output + used, out_len - used, "%02x  %02x  %02x  %02x  %02x  %02x  %02x  %02x\n",
-						dword_l & MASKBYTE0, (dword_l & MASKBYTE1) >> 8, (dword_l & MASKBYTE2) >> 16, (dword_l & MASKBYTE3) >> 24,
-						dword_h & MASKBYTE0, (dword_h & MASKBYTE1) >> 8, (dword_h & MASKBYTE2) >> 16, (dword_h & MASKBYTE3) >> 24));
-			}
-		} else if (var1[0] == 2) {
-			int index, ptr;
-			u32 dword_h, dword_l;
-
-			PHYDM_SSCANF(input[2], DCMD_DECIMAL, &var1[1]);
-			PHYDM_SNPRINTF((output + used, out_len - used, "Get MU BFer's STA%d CSI\n", var1[1]));
-			odm_set_bb_reg(p_dm_odm, 0x9e8, BIT(24), 0); /*Read BFer*/
-			odm_set_bb_reg(p_dm_odm, 0x9e8, BIT(25), 1); /*enable Read/Write RAM*/
-			odm_set_bb_reg(p_dm_odm, 0x9e8, BIT(30) | BIT29 | BIT28, var1[1]); /*read which STA's CSI report*/
-			odm_set_bb_reg(p_dm_odm, 0x1910, BIT(15), 0); /*select BFer's CSI*/
-			odm_set_bb_reg(p_dm_odm, 0x19e0, 0x00003FC0, 0xFF); /*disable gated_clk*/
-
-			for (index = 0; index < 80; index++) {
-				ptr = index + 256;
-				if (ptr > 311)
-					ptr -= 312;
-				odm_set_bb_reg(p_dm_odm, 0x1910, 0x03FF0000, ptr); /*Select Address*/
-				dword_h = odm_get_bb_reg(p_dm_odm, 0xF74, MASKDWORD);
-				dword_l = odm_get_bb_reg(p_dm_odm, 0xF5C, MASKDWORD);
-				if (index % 2 == 0)
-					PHYDM_SNPRINTF((output + used, out_len - used, "%02x  %02x  %02x  %02x  %02x  %02x  %02x  %02x\n",
-						dword_l & MASKBYTE0, (dword_l & MASKBYTE1) >> 8, (dword_l & MASKBYTE2) >> 16, (dword_l & MASKBYTE3) >> 24,
-						dword_h & MASKBYTE0, (dword_h & MASKBYTE1) >> 8, (dword_h & MASKBYTE2) >> 16, (dword_h & MASKBYTE3) >> 24));
-				else
-					PHYDM_SNPRINTF((output + used, out_len - used, "%02x  %02x  %02x  %02x  %02x  %02x  %02x  %02x\n",
-						dword_l & MASKBYTE0, (dword_l & MASKBYTE1) >> 8, (dword_l & MASKBYTE2) >> 16, (dword_l & MASKBYTE3) >> 24,
-						dword_h & MASKBYTE0, (dword_h & MASKBYTE1) >> 8, (dword_h & MASKBYTE2) >> 16, (dword_h & MASKBYTE3) >> 24));
-
-				PHYDM_SNPRINTF((output + used, out_len - used, "ptr=%d : 0x%8x  %8x\n", ptr, dword_h, dword_l));
-			}
-
-		}
-#endif
-		break;
-
 	case PHYDM_BIG_JUMP:
 	{
 #if (RTL8822B_SUPPORT == 1)
-		if (input[1]) {
-			PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
-			phydm_enable_big_jump(p_dm_odm, (bool)(var1[0]));
+		if (p_dm_odm->support_ic_type & ODM_RTL8822B) {
+			if (input[1]) {
+				PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
+				phydm_enable_big_jump(p_dm_odm, (boolean)(var1[0]));
+			} else
+				PHYDM_SNPRINTF((output + used, out_len - used, "unknown command!\n"));
 		} else
-			PHYDM_SNPRINTF((output + used, out_len - used, "unknown command!\n"));
-#else
-		PHYDM_SNPRINTF((output + used, out_len - used, "The command is only for 8822B!\n"));
+			PHYDM_SNPRINTF((output + used, out_len - used, "The command is only for 8822B!\n"));
 #endif
 		break;
 	}
@@ -2144,8 +2581,8 @@ phydm_cmd_parser(
 		break;
 
 	case PHYDM_SHOW_RXRATE:
-#if (RTL8822B_SUPPORT == 1)
-		{
+#if (RTL8822B_SUPPORT == 1 | RTL8821C_SUPPORT == 1 | RTL8814B_SUPPORT == 1)
+		if (p_dm_odm->support_ic_type & PHYDM_IC_SUPPORT_MU_BFEE) {
 			u8	rate_idx;
 
 			if (input[1])
@@ -2224,7 +2661,7 @@ phydm_cmd_parser(
 		phy_iq_calibrate(p_dm_odm->priv);
 		PHYDM_SNPRINTF((output + used, out_len - used, "IQK !!\n"));
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-		phy_iq_calibrate(p_dm_odm->adapter, false);
+		PHY_IQCalibrate(p_dm_odm->adapter, false);
 		PHYDM_SNPRINTF((output + used, out_len - used, "IQK !!\n"));
 #endif
 		break;
@@ -2232,7 +2669,6 @@ phydm_cmd_parser(
 	case PHYDM_NHM:
 	{
 		u8		target_rssi;
-		u32		value32;
 		u16		nhm_period = 0xC350;	/* 200ms */
 		u8		IGI;
 		struct _CCX_INFO	*ccx_info = &p_dm_odm->dm_ccx_info;
@@ -2361,7 +2797,7 @@ phydm_cmd_parser(
 		else if (var1[0] == 2) {
 
 			ccx_info->echo_CLM_en = false;
-			phydm_get_cl_mresult(p_dm_odm);
+			phydm_get_clm_result(p_dm_odm);
 			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n CLM_result = %d us\n", ccx_info->CLM_result * 4));
 
 		} else {
@@ -2398,14 +2834,18 @@ phydm_cmd_parser(
 		struct _RT_BEAMFORMING_INFO	*p_beamforming_info = &p_dm_odm->beamforming_info;
 
 		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
-		if (var1[0] == 1) {
-			p_beamforming_info->apply_v_matrix = true;
-			p_beamforming_info->snding3SS = false;
-			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n apply V matrix and 3SS 789 dont snding\n"));
-		} else if (var1[0] == 0) {
+		if (var1[0] == 0) {
 			p_beamforming_info->apply_v_matrix = false;
-			p_beamforming_info->snding3SS = true;
+			p_beamforming_info->snding3ss = true;
 			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n dont apply V matrix and 3SS 789 snding\n"));
+		} else if (var1[0] == 1) {
+			p_beamforming_info->apply_v_matrix = true;
+			p_beamforming_info->snding3ss = true;
+			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n apply V matrix and 3SS 789 snding\n"));
+		} else if (var1[0] == 2) {
+			p_beamforming_info->apply_v_matrix = true;
+			p_beamforming_info->snding3ss = false;
+			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n default txbf setting\n"));
 		} else
 			PHYDM_SNPRINTF((output + used, out_len - used, "\r\n unknown cmd!!\n"));
 #else
@@ -2474,11 +2914,90 @@ phydm_cmd_parser(
 
 		break;
 
+	case PHYDM_DYNAMIC_RA_PATH:
+
+#if (CONFIG_DYNAMIC_RX_PATH == 1)
+		for (i = 0; i < 8; i++) {
+			if (input[i + 1]) {
+				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
+				input_idx++;
+			}
+		}
+
+		if (input_idx >= 1)
+			phydm_drp_debug(p_dm_odm, (u32 *)var1, &used, output, &out_len);
+
+#else
+		PHYDM_SNPRINTF((output + used, out_len - used, "Not Support IC"));
+#endif
+
+		break;
+
+	case PHYDM_PSD:
+
+		#if (CONFIG_PSD_TOOL== 1)
+		phydm_psd_debug(p_dm_odm, &input[0], &used, output, &out_len, input_num);
+		#endif
+
+		break;
+		
+	case PHYDM_DEBUG_PORT:
+		{
+			u32	dbg_port_value;
+
+			PHYDM_SSCANF(input[1], DCMD_HEX, &var1[0]);
+			
+			if (phydm_set_bb_dbg_port(p_dm_odm, BB_DBGPORT_PRIORITY_3, var1[0])) {/*set debug port to 0x0*/
+
+				dbg_port_value = phydm_get_bb_dbg_port_value(p_dm_odm);
+				phydm_release_bb_dbg_port(p_dm_odm);
+				
+				PHYDM_SNPRINTF((output + used, out_len - used, "Debug Port[0x%x] = ((0x%x))\n", var1[1], dbg_port_value));
+			}
+		}
+		break;
+		
+	case PHYDM_HTSTF_CONTROL:
+		{
+			if (input[1])
+				PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
+
+			if (var1[0] == 1) {
+				/* phydm_dynamic_switch_htstf_mumimo_8822b(p_dm_odm);*/
+				p_dm_odm->bhtstfenabled = TRUE;
+				PHYDM_SNPRINTF((output + used, out_len - used, "Dynamic HT-STF Gain Control is Enable\n"));
+			}
+			else {
+				p_dm_odm->bhtstfenabled = FALSE;
+				PHYDM_SNPRINTF((output + used, out_len - used, "Dynamic HT-STF Gain Control is Disable\n"));
+			}
+		}
+		break;
+		
+	case PHYDM_TUNE_PARAMETER:
+		phydm_parameter_adjust(p_dm_odm, &input[0], &used, output, &out_len, input_num);
+		break;
+
+	case PHYDM_ADAPTIVITY_DEBUG:
+
+		for (i = 0; i < 5; i++) {
+			if (input[i + 1]) {
+				PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
+				input_idx++;
+			}
+		}
+
+		if (input_idx >= 1)
+			phydm_adaptivity_debug(p_dm_odm, (u32 *)var1, &used, output, &out_len);
+
+		break;
+
 	default:
 		PHYDM_SNPRINTF((output + used, out_len - used, "SET, unknown command!\n"));
 		break;
 
 	}
+#endif /*#if CONFIG_PHYDM_DEBUG_FUNCTION*/
 }
 
 #ifdef __ECOS
@@ -2539,6 +3058,7 @@ phydm_fw_trace_handler(
 	u8	cmd_len
 )
 {
+#if CONFIG_PHYDM_DEBUG_FUNCTION
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 
 	/*u8	debug_trace_11byte[60];*/
@@ -2596,6 +3116,7 @@ phydm_fw_trace_handler(
 	}
 
 	p_dm_odm->pre_c2h_seq = c2h_seq;
+#endif /*#if CONFIG_PHYDM_DEBUG_FUNCTION*/
 }
 
 void
@@ -2605,6 +3126,7 @@ phydm_fw_trace_handler_code(
 	u8	cmd_len
 )
 {
+#if CONFIG_PHYDM_DEBUG_FUNCTION
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	u8	function = buffer[0];
 	u8	dbg_num = buffer[1];
@@ -2777,7 +3299,7 @@ phydm_fw_trace_handler_code(
 #endif
 	/*--------------------------------------------*/
 
-
+#endif /*#if CONFIG_PHYDM_DEBUG_FUNCTION*/
 }
 
 void
@@ -2787,6 +3309,7 @@ phydm_fw_trace_handler_8051(
 	u8	cmd_len
 )
 {
+#if CONFIG_PHYDM_DEBUG_FUNCTION
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 #if 0
 	if (cmd_len >= 3)
@@ -2807,10 +3330,10 @@ phydm_fw_trace_handler_8051(
 	extend_c2h_dbg_content = buffer + 2; /*DbgSeq+DbgContent  for show HEX*/
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	RT_DISP(FC2H, c2h_summary, ("[Extend C2H packet], Extend_c2hSubId=0x%x, extend_c2h_dbg_len=%d\n",
+	RT_DISP(FC2H, C2H_Summary, ("[Extend C2H packet], Extend_c2hSubId=0x%x, extend_c2h_dbg_len=%d\n",
 				    extend_c2h_sub_id, extend_c2h_dbg_len));
 
-	RT_DISP_DATA(FC2H, c2h_summary, "[Extend C2H packet], Content Hex:", extend_c2h_dbg_content, cmd_len - 2);
+	RT_DISP_DATA(FC2H, C2H_Summary, "[Extend C2H packet], Content Hex:", extend_c2h_dbg_content, cmd_len - 2);
 #endif
 
 go_backfor_aggre_dbg_pkt:
@@ -2819,7 +3342,7 @@ go_backfor_aggre_dbg_pkt:
 	extend_c2h_dbg_content = buffer + 3;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	RT_DISP(FC2H, c2h_summary, ("[RTKFW, SEQ= %d] :", extend_c2h_dbg_seq));
+	RT_DISP(FC2H, C2H_Summary, ("[RTKFW, SEQ= %d] :", extend_c2h_dbg_seq));
 #endif
 
 	for (; ; i++) {
@@ -2838,4 +3361,5 @@ go_backfor_aggre_dbg_pkt:
 
 
 #endif
+#endif /*#if CONFIG_PHYDM_DEBUG_FUNCTION*/
 }
diff --git a/rtl8822BU/hal/phydm/phydm_debug.h b/rtl8822BU/hal/phydm/phydm_debug.h
index 70d6468..5cd1ecf 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_debug.h
+++ b/rtl8822BU/hal/phydm/phydm_debug.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 
 #ifndef	__ODM_DBG_H__
@@ -135,13 +130,20 @@
 	#define	dcmd_printf				DCMD_Printf
 	#define	dcmd_scanf				DCMD_Scanf
 	#define RT_PRINTK				dbg_print
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	#define dbg_print(args...)
+	#define RT_PRINTK(fmt, args...)	\
+			RT_TRACE(((struct rtl_priv *)p_dm_odm->adapter),	\
+				 COMP_PHYDM, DBG_DMESG, fmt, ## args)
+	#define	RT_DISP(dbgtype, dbgflag, printstr)
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	#define dbg_print	printk
-	#define RT_PRINTK(fmt, args...)	dbg_print("%s(): " fmt, __FUNCTION__, ## args);
+	#define RT_PRINTK(fmt, args...)	dbg_print(fmt, ## args)
 	#define	RT_DISP(dbgtype, dbgflag, printstr)
 #else
 	#define dbg_print	panic_printk
-	#define RT_PRINTK(fmt, args...)	dbg_print("%s(): " fmt, __FUNCTION__, ## args);
+	/*#define RT_PRINTK(fmt, args...)	dbg_print("%s(): " fmt, __FUNCTION__, ## args);*/
+	#define RT_PRINTK(args...)	dbg_print(args)
 #endif
 
 #ifndef ASSERT
@@ -218,10 +220,37 @@
 #define ODM_PRINT_ADDR(p_dm_odm, comp, level, title_str, ptr)
 #endif
 
+#define	BB_DBGPORT_PRIORITY_3	3	/*Debug function (the highest priority)*/
+#define	BB_DBGPORT_PRIORITY_2	2	/*Check hang function & Strong function*/
+#define	BB_DBGPORT_PRIORITY_1	1	/*Watch dog function*/
+#define	BB_DBGPORT_RELEASE		0	/*Init value (the lowest priority)*/
 
 void
 phydm_init_debug_setting(struct PHY_DM_STRUCT		*p_dm_odm);
 
+void
+phydm_bb_dbg_port_header_sel(
+	void			*p_dm_void,
+	u32			header_idx
+);
+
+u8
+phydm_set_bb_dbg_port(
+	void			*p_dm_void,
+	u8			curr_dbg_priority,
+	u32			debug_port
+);
+
+void
+phydm_release_bb_dbg_port(
+	void			*p_dm_void
+);
+
+u32
+phydm_get_bb_dbg_port_value(
+	void			*p_dm_void
+);
+
 void phydm_basic_dbg_message(void			*p_dm_void);
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
@@ -304,6 +333,13 @@ phydm_cmd_parser(
 	u32	out_len
 );
 
+boolean
+phydm_api_trx_mode(
+	struct PHY_DM_STRUCT				*p_dm_odm,
+	enum odm_rf_path_e			tx_path,
+	enum odm_rf_path_e			rx_path,
+	boolean					is_tx2_path
+);
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 void phydm_sbd_check(
@@ -322,7 +358,7 @@ void phydm_sbd_workitem_callback(
 void
 phydm_fw_trace_en_h2c(
 	void		*p_dm_void,
-	bool		enable,
+	boolean		enable,
 	u32		fw_debug_component,
 	u32		monitor_mode,
 	u32		macid
diff --git a/rtl8822BU/hal/phydm/phydm_dfs.c b/rtl8822BU/hal/phydm/phydm_dfs.c
index 68b3b36..297f973 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_dfs.c
+++ b/rtl8822BU/hal/phydm/phydm_dfs.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 /*
 ============================================================
@@ -41,6 +36,7 @@ void phydm_radar_detect_disable(void *p_dm_void)
 	struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 
 	odm_set_bb_reg(p_dm_odm, 0x924, BIT(15), 0);
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DFS, ODM_DBG_LOUD, ("\n"));
 }
 
 static void phydm_radar_detect_with_dbg_parm(void *p_dm_void)
@@ -59,10 +55,12 @@ void phydm_radar_detect_enable(void *p_dm_void)
 	struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	u8 region_domain = p_dm_odm->dfs_region_domain;
 	u8 c_channel = *(p_dm_odm->p_channel);
+	u8 band_width = *(p_dm_odm->p_band_width);
+	u8 enable = 0;
 
 	if (region_domain == PHYDM_DFS_DOMAIN_UNKNOWN) {
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DFS, ODM_DBG_LOUD, ("PHYDM_DFS_DOMAIN_UNKNOWN\n"));
-		return;
+		goto exit;
 	}
 
 	if (p_dm_odm->support_ic_type & (ODM_RTL8821 | ODM_RTL8812 | ODM_RTL8881A)) {
@@ -72,6 +70,7 @@ void phydm_radar_detect_enable(void *p_dm_void)
 
 		if (p_dm_odm->radar_detect_dbg_parm_en) {
 			phydm_radar_detect_with_dbg_parm(p_dm_odm);
+			enable = 1;
 			goto exit;
 		}
 
@@ -90,7 +89,7 @@ void phydm_radar_detect_enable(void *p_dm_void)
 				odm_set_bb_reg(p_dm_odm, 0x91c, MASKDWORD, 0x0f141a20);
 			} else {
 				odm_set_bb_reg(p_dm_odm, 0x918, MASKDWORD, 0x1c16acdf);
-				if (p_dm_odm->p_band_width == ODM_BW20M)
+				if (band_width == ODM_BW20M)
 					odm_set_bb_reg(p_dm_odm, 0x91c, MASKDWORD, 0x64721a20);
 				else
 					odm_set_bb_reg(p_dm_odm, 0x91c, MASKDWORD, 0x68721a20);
@@ -100,23 +99,25 @@ void phydm_radar_detect_enable(void *p_dm_void)
 			odm_set_bb_reg(p_dm_odm, 0x918, MASKDWORD, 0x1c16acdf);
 			odm_set_bb_reg(p_dm_odm, 0x924, MASKDWORD, 0x01528500);
 			odm_set_bb_reg(p_dm_odm, 0x920, MASKDWORD, 0xe0d67231);
-			if (p_dm_odm->p_band_width == ODM_BW20M)
+			if (band_width == ODM_BW20M)
 				odm_set_bb_reg(p_dm_odm, 0x91c, MASKDWORD, 0x64741a20);
 			else
 				odm_set_bb_reg(p_dm_odm, 0x91c, MASKDWORD, 0x68741a20);
+
 		} else {
 			/* not supported */
 			ODM_RT_TRACE(p_dm_odm, ODM_COMP_DFS, ODM_DBG_LOUD, ("Unsupported dfs_region_domain:%d\n", region_domain));
+			goto exit;
 		}
 
-	} else if (p_dm_odm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B)) {
+	} else if (p_dm_odm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) {
 
 		odm_set_bb_reg(p_dm_odm, 0x814, 0x3fffffff, 0x04cc4d10);
 		odm_set_bb_reg(p_dm_odm, 0x834, MASKBYTE0, 0x06);
 
 		/* 8822B only, when BW = 20M, DFIR output is 40Mhz, but DFS input is 80MMHz, so it need to upgrade to 80MHz */
-		if (p_dm_odm->support_ic_type & ODM_RTL8822B) {
-			if (p_dm_odm->p_band_width == ODM_BW20M)
+		if (p_dm_odm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) {
+			if (band_width == ODM_BW20M)
 				odm_set_bb_reg(p_dm_odm, 0x1984, BIT(26), 1);
 			else
 				odm_set_bb_reg(p_dm_odm, 0x1984, BIT(26), 0);
@@ -124,6 +125,7 @@ void phydm_radar_detect_enable(void *p_dm_void)
 
 		if (p_dm_odm->radar_detect_dbg_parm_en) {
 			phydm_radar_detect_with_dbg_parm(p_dm_odm);
+			enable = 1;
 			goto exit;
 		}
 
@@ -142,37 +144,47 @@ void phydm_radar_detect_enable(void *p_dm_void)
 				odm_set_bb_reg(p_dm_odm, 0x91c, MASKDWORD, 0x0f141a20);
 			} else {
 				odm_set_bb_reg(p_dm_odm, 0x918, MASKDWORD, 0x1c166cdf);
-				if (p_dm_odm->p_band_width == ODM_BW20M)
+				if (band_width == ODM_BW20M)
 					odm_set_bb_reg(p_dm_odm, 0x91c, MASKDWORD, 0x64721a20);
 				else
 					odm_set_bb_reg(p_dm_odm, 0x91c, MASKDWORD, 0x68721a20);
 			}
+
 		} else if (region_domain == PHYDM_DFS_DOMAIN_FCC) {
 			odm_set_bb_reg(p_dm_odm, 0x918, MASKDWORD, 0x1c166cdf);
 			odm_set_bb_reg(p_dm_odm, 0x924, MASKDWORD, 0x095a8500);
 			odm_set_bb_reg(p_dm_odm, 0x920, MASKDWORD, 0xe0d67231);
-			if (p_dm_odm->p_band_width == ODM_BW20M)
+			if (band_width == ODM_BW20M)
 				odm_set_bb_reg(p_dm_odm, 0x91c, MASKDWORD, 0x64741a20);
 			else
 				odm_set_bb_reg(p_dm_odm, 0x91c, MASKDWORD, 0x68741a20);
+
 		} else {
 			/* not supported */
 			ODM_RT_TRACE(p_dm_odm, ODM_COMP_DFS, ODM_DBG_LOUD, ("Unsupported dfs_region_domain:%d\n", region_domain));
+			goto exit;
 		}
 	} else {
 		/* not supported IC type*/
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DFS, ODM_DBG_LOUD, ("Unsupported IC type:%d\n", p_dm_odm->support_ic_type));
+		goto exit;
 	}
 
+	enable = 1;
+
 exit:
-	phydm_radar_detect_reset(p_dm_odm);
+	if (enable) {
+		phydm_radar_detect_reset(p_dm_odm);
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DFS, ODM_DBG_LOUD, ("on cch:%u, bw:%u\n", c_channel, band_width));
+	} else
+		phydm_radar_detect_disable(p_dm_odm);
 }
 
-bool phydm_radar_detect(void *p_dm_void)
+boolean phydm_radar_detect(void *p_dm_void)
 {
 	struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	bool enable_DFS = false;
-	bool radar_detected = false;
+	boolean enable_DFS = false;
+	boolean radar_detected = false;
 	u8 region_domain = p_dm_odm->dfs_region_domain;
 
 	if (region_domain == PHYDM_DFS_DOMAIN_UNKNOWN) {
@@ -200,7 +212,7 @@ exit:
 }
 #endif /* defined(CONFIG_PHYDM_DFS_MASTER) */
 
-bool
+boolean
 phydm_dfs_master_enabled(
 	void		*p_dm_void
 )
@@ -223,13 +235,13 @@ phydm_dfs_debug(
 	u32		*_out_len
 )
 {
+#if defined(CONFIG_PHYDM_DFS_MASTER)
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	u32 used = *_used;
 	u32 out_len = *_out_len;
 
 	switch (argv[0]) {
 	case 1:
-#if defined(CONFIG_PHYDM_DFS_MASTER)
 		/* set dbg parameters for radar detection instead of the default value */
 		if (argv[1] == 1) {
 			p_dm_odm->radar_detect_reg_918 = argv[2];
@@ -248,10 +260,10 @@ phydm_dfs_debug(
 			PHYDM_SNPRINTF((output + used, out_len - used, "Radar detection with default parameter\n"));
 		}
 		phydm_radar_detect_enable(p_dm_odm);
-#endif /* defined(CONFIG_PHYDM_DFS_MASTER) */
 
 		break;
 	default:
 		break;
 	}
+#endif /* defined(CONFIG_PHYDM_DFS_MASTER) */
 }
diff --git a/rtl8822BU/hal/phydm/phydm_dfs.h b/rtl8822BU/hal/phydm/phydm_dfs.h
index 3c06c49..6856e25 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_dfs.h
+++ b/rtl8822BU/hal/phydm/phydm_dfs.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef __PHYDM_DFS_H__
 #define __PHYDM_DFS_H__
@@ -55,10 +50,10 @@ enum phydm_dfs_region_domain {
 	void phydm_radar_detect_reset(void *p_dm_void);
 	void phydm_radar_detect_disable(void *p_dm_void);
 	void phydm_radar_detect_enable(void *p_dm_void);
-	bool phydm_radar_detect(void *p_dm_void);
+	boolean phydm_radar_detect(void *p_dm_void);
 #endif /* defined(CONFIG_PHYDM_DFS_MASTER) */
 
-bool
+boolean
 phydm_dfs_master_enabled(
 	void		*p_dm_void
 );
diff --git a/rtl8822BU/hal/phydm/phydm_dig.c b/rtl8822BU/hal/phydm/phydm_dig.c
index a8b6fe3..ccaae50 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_dig.c
+++ b/rtl8822BU/hal/phydm/phydm_dig.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 /* ************************************************************
  * include files
@@ -76,8 +71,8 @@ get_igi_for_diff(int value_IGI)
 void
 odm_fa_threshold_check(
 	void			*p_dm_void,
-	bool			is_dfs_band,
-	bool			is_performance,
+	boolean			is_dfs_band,
+	boolean			is_performance,
 	u32			rx_tp,
 	u32			tx_tp,
 	u32			*dm_FA_thres
@@ -88,6 +83,11 @@ odm_fa_threshold_check(
 	if (p_dm_odm->is_linked && (is_performance || is_dfs_band)) {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 		/*For AP*/
+#if (DIG_HW == 1)
+		dm_FA_thres[0] = p_dm_odm->priv->pshare->rf_ft_var.dbg_dig_th1;
+		dm_FA_thres[1] = p_dm_odm->priv->pshare->rf_ft_var.dbg_dig_th2;
+		dm_FA_thres[2] = p_dm_odm->priv->pshare->rf_ft_var.dbg_dig_th3;
+#else
 		if ((rx_tp >> 2) > tx_tp && rx_tp < 10000 && rx_tp > 500) {			/*10Mbps & 0.5Mbps*/
 			dm_FA_thres[0] = 0x080;
 			dm_FA_thres[1] = 0x100;
@@ -97,6 +97,7 @@ odm_fa_threshold_check(
 			dm_FA_thres[1] = 0x200;
 			dm_FA_thres[2] = 0x300;
 		}
+#endif
 #else
 		/*For NIC*/
 		dm_FA_thres[0] = DM_DIG_FA_TH0;
@@ -235,7 +236,7 @@ odm_inband_noise_calculate(
 	struct PHY_DM_STRUCT			*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _dynamic_initial_gain_threshold_				*p_dm_dig_table = &p_dm_odm->dm_dig_table;
 	u8				igi_backup, time_cnt = 0, valid_cnt = 0;
-	bool				is_timeout = true;
+	boolean				is_timeout = true;
 	s8				s_noise_a, s_noise_b;
 	s32				noise_rpt_a = 0, noise_rpt_b = 0;
 	u32				tmp = 0;
@@ -536,7 +537,7 @@ odm_pause_dig(
 	case PHYDM_PAUSE:
 	{
 		/* Disable DIG */
-		odm_cmn_info_update(p_dm_odm, ODM_CMNINFO_ABILITY, p_dm_odm->support_ability & (~ODM_BB_DIG));
+		p_dm_odm->support_ability &= ~ODM_BB_DIG;
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_pause_dig(): Pause DIG !!\n"));
 
 		/* Backup IGI value */
@@ -579,7 +580,7 @@ odm_pause_dig(
 			ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_pause_dig(): Write original IGI = 0x%x\n", p_dm_dig_table->igi_backup));
 
 			/* Enable DIG */
-			odm_cmn_info_update(p_dm_odm, ODM_CMNINFO_ABILITY, p_dm_odm->support_ability | ODM_BB_DIG);
+			p_dm_odm->support_ability |= ODM_BB_DIG;
 			break;
 		}
 
@@ -612,7 +613,7 @@ odm_pause_dig(
 
 }
 
-bool
+boolean
 odm_dig_abort(
 	void			*p_dm_void
 )
@@ -658,7 +659,7 @@ odm_dig_abort(
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 #if OS_WIN_FROM_WIN7(OS_VERSION)
-	if (is_ap_mode_exist(p_adapter) && p_adapter->is_in_hct_test) {
+	if (IsAPModeExist(p_adapter) && p_adapter->bInHctTest) {
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: Is AP mode or In HCT Test\n"));
 		return	true;
 	}
@@ -710,8 +711,10 @@ odm_dig_init(
 	p_dm_dig_table->backoff_val = DM_DIG_BACKOFF_DEFAULT;
 	p_dm_dig_table->backoff_val_range_max = DM_DIG_BACKOFF_MAX;
 	p_dm_dig_table->backoff_val_range_min = DM_DIG_BACKOFF_MIN;
+	#if PHYDM_SUPPORT_CCKPD
 	p_dm_dig_table->pre_cck_cca_thres = 0xFF;
 	p_dm_dig_table->cur_cck_cca_thres = 0x83;
+	#endif
 	p_dm_dig_table->forbidden_igi = DM_DIG_MIN_NIC;
 	p_dm_dig_table->large_fa_hit = 0;
 	p_dm_dig_table->large_fa_timeout = 0;
@@ -748,8 +751,10 @@ odm_dig_init(
 
 	odm_memory_set(p_dm_odm, p_dm_dig_table->pause_dig_value, 0, (DM_DIG_MAX_PAUSE_TYPE + 1));
 	p_dm_dig_table->pause_dig_level = 0;
+	#if PHYDM_SUPPORT_CCKPD
 	odm_memory_set(p_dm_odm, p_dm_dig_table->pause_cckpd_value, 0, (DM_DIG_MAX_PAUSE_TYPE + 1));
 	p_dm_dig_table->pause_cckpd_level = 0;
+	#endif
 #endif
 
 	if (p_dm_odm->board_type & (ODM_BOARD_EXT_PA | ODM_BOARD_EXT_LNA)) {
@@ -781,6 +786,11 @@ odm_dig_init(
 		}
 	}
 #endif
+
+
+#if (DIG_HW == 1)
+	p_dm_dig_table->pre_rssi_min = 0;
+#endif
 }
 
 
@@ -801,27 +811,50 @@ odm_DIG(
 	/* Common parameters */
 	struct _dynamic_initial_gain_threshold_						*p_dm_dig_table = &p_dm_odm->dm_dig_table;
 	struct _FALSE_ALARM_STATISTICS		*p_false_alm_cnt = (struct _FALSE_ALARM_STATISTICS *)phydm_get_structure(p_dm_odm, PHYDM_FALSEALMCNT);
-	bool						first_connect, first_dis_connect;
+	boolean						first_connect, first_dis_connect;
 	u8						dig_max_of_min, dig_dynamic_min;
 	u8						dm_dig_max, dm_dig_min;
 	u8						current_igi = p_dm_dig_table->cur_ig_value;
 	u8						offset;
 	u32						dm_FA_thres[3];
 	u32						tx_tp = 0, rx_tp = 0;
-	bool						dig_go_up_check = true;
-	bool						is_dfs_band = false;
-	bool						is_performance = true, is_first_tp_target = false, is_first_coverage = false;
+	boolean						is_dfs_band = false;
+	boolean						is_performance = true, is_first_tp_target = false, is_first_coverage = false;
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	u32						tp_train_th_min = dm_dig_tp_target_th0;
 	static		u8			time_cnt = 0;
 	u8						i;
 #endif
+#if (DIG_HW == 1)
+	boolean						dig_go_up_check = true;
+	u8						step_size_1 = 0, step_size_2 = 0, step_size_3 = 0;
+#endif
 
 	if (odm_dig_abort(p_dm_odm) == true)
 		return;
 
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()===========================>\n\n"));
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG Start===>\n"));
 
+#if (DIG_HW == 1)
+	if (p_dm_odm->is_linked) {
+		if (p_dm_dig_table->pre_rssi_min <= p_dm_odm->rssi_min) {
+			step_size_1 = 2;
+			step_size_2 = 1;
+			step_size_3 = 2;
+		} else {
+			step_size_1 = 4;
+			step_size_2 = 2;
+			step_size_3 = 2;
+		}
+		p_dm_dig_table->pre_rssi_min = p_dm_odm->rssi_min;
+	} else {
+		step_size_1 = 2;
+		step_size_2 = 1;
+		step_size_3 = 2;
+	}
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("rssi_min = %d, pre_rssi_min = %d\n", p_dm_odm->rssi_min, p_dm_dig_table->pre_rssi_min));
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("step_size_1 = %d, step_size_2 = %d, step_size_3 = %d\n", step_size_1, step_size_2, step_size_3));
+#endif
 
 	/* 1 Update status */
 	{
@@ -845,7 +878,7 @@ odm_DIG(
 				tx_tp += (u32)(p_entry->tx_byte_cnt_low_maw >> 7);			/* Kbps */
 			}
 		}
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TX TP = %dkbps, RX TP = %dkbps\n", tx_tp, rx_tp));
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: TX TP = %dkbps, RX TP = %dkbps\n", tx_tp, rx_tp));
 	}
 
 	switch (p_dm_odm->priv->pshare->rf_ft_var.dig_cov_enable) {
@@ -868,7 +901,7 @@ odm_DIG(
 			if (p_dm_dig_table->tp_train_th_min > dm_dig_tp_target_th1)
 				tp_train_th_min = dm_dig_tp_target_th1;
 
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TP training mode lower bound = %dkbps\n", tp_train_th_min));
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: TP training mode lower bound = %dkbps\n", tp_train_th_min));
 
 			/* 2 Decide DIG mode by total TP */
 			if ((tx_tp + rx_tp) > dm_dig_tp_target_th1) {		/* change to performance mode */
@@ -927,7 +960,12 @@ odm_DIG(
 		if (!is_performance) {
 			dm_dig_max = DM_DIG_MAX_AP_COVERAGR;
 			dm_dig_min = DM_DIG_MIN_AP_COVERAGE;
+#if (DIG_HW == 1)
+			dig_max_of_min = DM_DIG_MIN_AP_COVERAGE;
+#else
 			dig_max_of_min = DM_DIG_MAX_OF_MIN_COVERAGE;
+#endif
+
 		} else {
 			if (p_dm_odm->rf_type == ODM_1T1R)
 				dm_dig_max = DM_DIG_MAX_AP - 6;
@@ -936,9 +974,17 @@ odm_DIG(
 
 			if ((*p_dm_odm->p_band_type == ODM_BAND_2_4G) && (p_dm_odm->support_ic_type & ODM_RTL8814A)) /* for 2G 8814 */
 				dm_dig_min = 0x1c;
+			else if (p_dm_odm->support_ic_type & ODM_RTL8197F)
+				dm_dig_min = 0x1e;
 			else
 				dm_dig_min = DM_DIG_MIN_AP;
+
+#if (DIG_HW == 1)
+			dig_max_of_min = DM_DIG_MIN_AP_COVERAGE;
+#else
 			dig_max_of_min = DM_DIG_MAX_OF_MIN;
+#endif
+
 		}
 
 		/* 4 TX2path */
@@ -992,15 +1038,15 @@ odm_DIG(
 				dm_dig_min = DM_DIG_MIN_AP_DFS + 2;
 			else
 				dm_dig_min = DM_DIG_MIN_AP_DFS;
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): ====== In DFS band ======\n"));
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: ====== In DFS band ======\n"));
 		}
 #endif
 	}
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Absolutly upper bound = 0x%x, lower bound = 0x%x\n", dm_dig_max, dm_dig_min));
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: Absolutly upper bound = 0x%x, lower bound = 0x%x\n", dm_dig_max, dm_dig_min));
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 	if (p_dm_odm->pu1_forced_igi_lb && (0 < *p_dm_odm->pu1_forced_igi_lb)) {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Force IGI lb to: 0x%02x !!!!!!\n", *p_dm_odm->pu1_forced_igi_lb));
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: Force IGI lb to: 0x%02x\n", *p_dm_odm->pu1_forced_igi_lb));
 		dm_dig_min = *p_dm_odm->pu1_forced_igi_lb;
 		dm_dig_max = (dm_dig_min <= dm_dig_max) ? (dm_dig_max) : (dm_dig_min + 1);
 	}
@@ -1015,7 +1061,7 @@ odm_DIG(
 		/* 4 Modify DIG upper bound for 92E, 8723A\B, 8821 & 8812 BT */
 		if ((p_dm_odm->support_ic_type & (ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8812 | ODM_RTL8821)) && (p_dm_odm->is_bt_limited_dig == 1)) {
 			offset = 10;
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Coex. case: Force upper bound to RSSI + %d !!!!!!\n", offset));
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: Coex. case: Force upper bound to RSSI + %d\n", offset));
 		} else
 			offset = 15;
 #endif
@@ -1041,7 +1087,7 @@ odm_DIG(
 #if (DM_ODM_SUPPORT_TYPE & ODM_CE)
 			if (is_dfs_band) {
 				dig_dynamic_min = dm_dig_min;
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: Force lower bound to 0x%x after link !!!!!!\n", dm_dig_min));
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: DFS band: Force lower bound to 0x%x after link\n", dm_dig_min));
 			}
 #endif
 		}
@@ -1055,7 +1101,7 @@ odm_DIG(
 #endif
 			if (is_dfs_band) {
 				dig_dynamic_min = dm_dig_min;
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: Force lower bound to 0x%x after link !!!!!!\n", dm_dig_min));
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: DFS band: Force lower bound to 0x%x after link\n", dm_dig_min));
 			} else {
 				if (p_dm_odm->rssi_min < dm_dig_min)
 					dig_dynamic_min = dm_dig_min;
@@ -1070,7 +1116,7 @@ odm_DIG(
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP | ODM_CE))
 		if (is_performance && is_dfs_band) {
 			p_dm_dig_table->rx_gain_range_max = 0x28;
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: Force upper bound to 0x%x before link !!!!!!\n", p_dm_dig_table->rx_gain_range_max));
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: DFS band: Force upper bound to 0x%x before link\n", p_dm_dig_table->rx_gain_range_max));
 		} else
 #endif
 		{
@@ -1090,14 +1136,14 @@ odm_DIG(
 					dig_dynamic_min = dig_max_of_min;
 				else
 					dig_dynamic_min = (u8) p_dm_dig_table->ant_div_rssi_max;
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Antenna diversity case: Force lower bound to 0x%x !!!!!!\n", dig_dynamic_min));
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Antenna diversity case: RSSI_max = 0x%x !!!!!!\n", p_dm_dig_table->ant_div_rssi_max));
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: AntDiv case: Force lower bound to 0x%x\n", dig_dynamic_min));
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: AntDiv case: RSSI_max = 0x%x\n", p_dm_dig_table->ant_div_rssi_max));
 			}
 		}
 	}
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust boundary by RSSI Upper bound = 0x%x, Lower bound = 0x%x\n",
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: Adjust boundary by RSSI Upper bound = 0x%x, Lower bound = 0x%x\n",
 			p_dm_dig_table->rx_gain_range_max, dig_dynamic_min));
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Link status: is_linked = %d, RSSI = %d, bFirstConnect = %d, bFirsrDisConnect = %d\n\n",
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: Link status: is_linked = %d, RSSI = %d, bFirstConnect = %d, bFirsrDisConnect = %d\n",
 		p_dm_odm->is_linked, p_dm_odm->rssi_min, first_connect, first_dis_connect));
 
 	/* 1 Modify DIG lower bound, deal with abnormal case */
@@ -1121,29 +1167,33 @@ odm_DIG(
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 	if (p_dm_odm->is_linked && !first_connect) {
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("Beacon Num (%d)\n", p_dm_odm->phy_dbg_info.num_qry_beacon_pkt));
-		if ((p_dm_odm->phy_dbg_info.num_qry_beacon_pkt < 5) && (p_dm_odm->bsta_state)) {
-			p_dm_dig_table->rx_gain_range_min = 0x1c;
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnrormal #beacon (%d) case in STA mode: Force lower bound to 0x%x !!!!!!\n\n",
-				p_dm_odm->phy_dbg_info.num_qry_beacon_pkt, p_dm_dig_table->rx_gain_range_min));
+#if (RTL8723D_SUPPORT == 1)
+		if (p_dm_odm->support_ic_type != ODM_RTL8723D) {
+			if ((p_dm_odm->phy_dbg_info.num_qry_beacon_pkt < 5) && (p_dm_odm->bsta_state)) {
+				p_dm_dig_table->rx_gain_range_min = 0x1c;
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: Abnrormal #beacon (%d) case in STA mode: Force lower bound to 0x%x\n",
+					p_dm_odm->phy_dbg_info.num_qry_beacon_pkt, p_dm_dig_table->rx_gain_range_min));
+			}
 		}
+#endif
 	}
 #endif
 
 	/* 2 Abnormal lower bound case */
 	if (p_dm_dig_table->rx_gain_range_min > p_dm_dig_table->rx_gain_range_max) {
 		p_dm_dig_table->rx_gain_range_min = p_dm_dig_table->rx_gain_range_max;
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnrormal lower bound case: Force lower bound to 0x%x !!!!!!\n\n", p_dm_dig_table->rx_gain_range_min));
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: Abnrormal lower bound case: Force lower bound to 0x%x\n", p_dm_dig_table->rx_gain_range_min));
 	}
 
 
 	/* 1 False alarm threshold decision */
 	odm_fa_threshold_check(p_dm_odm, is_dfs_band, is_performance, rx_tp, tx_tp, dm_FA_thres);
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): False alarm threshold = %d, %d, %d \n\n", dm_FA_thres[0], dm_FA_thres[1], dm_FA_thres[2]));
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: False alarm threshold = %d, %d, %d\n", dm_FA_thres[0], dm_FA_thres[1], dm_FA_thres[2]));
 
 	/* 1 Adjust initial gain by false alarm */
 	if (p_dm_odm->is_linked && is_performance) {
 		/* 2 After link */
-		ODM_RT_TRACE(p_dm_odm,	ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust IGI after link\n"));
+		ODM_RT_TRACE(p_dm_odm,	ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: Adjust IGI after link\n"));
 
 		if (is_first_tp_target || (first_connect && is_performance)) {
 			p_dm_dig_table->large_fa_hit = 0;
@@ -1154,7 +1204,7 @@ odm_DIG(
 					current_igi = 0x28;
 				else
 					current_igi = p_dm_odm->rssi_min;
-				ODM_RT_TRACE(p_dm_odm,	ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: One-shot to 0x28 upmost!!!!!!\n"));
+				ODM_RT_TRACE(p_dm_odm,	ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: DFS band: One-shot to 0x28 upmost\n"));
 			} else
 #endif
 			{
@@ -1174,52 +1224,69 @@ odm_DIG(
 #endif
 			}
 
-			ODM_RT_TRACE(p_dm_odm,	ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First connect case: IGI does on-shot to 0x%x\n", current_igi));
+			ODM_RT_TRACE(p_dm_odm,	ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: First connect case: IGI does on-shot to 0x%x\n", current_igi));
 
 		} else {
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-
+#if ((DM_ODM_SUPPORT_TYPE & (ODM_AP)) && (DIG_HW == 1))
 			if (priv->pshare->rf_ft_var.dig_upcheck_enable)
 				dig_go_up_check = phydm_dig_go_up_check(p_dm_odm);
 #endif
 
+#if (DIG_HW == 1)
 			if ((p_false_alm_cnt->cnt_all > dm_FA_thres[2]) && dig_go_up_check)
-				current_igi = current_igi + 4;
+				current_igi = current_igi + step_size_1;
 			else if ((p_false_alm_cnt->cnt_all > dm_FA_thres[1]) && dig_go_up_check)
+				current_igi = current_igi + step_size_2;
+			else if (p_false_alm_cnt->cnt_all < dm_FA_thres[0])
+				current_igi = current_igi - step_size_3;
+#else
+			if (p_false_alm_cnt->cnt_all > dm_FA_thres[2])
+				current_igi = current_igi + 4;
+			else if (p_false_alm_cnt->cnt_all > dm_FA_thres[1])
 				current_igi = current_igi + 2;
 			else if (p_false_alm_cnt->cnt_all < dm_FA_thres[0])
 				current_igi = current_igi - 2;
+#endif
 
 			/* 4 Abnormal # beacon case */
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 			if ((p_dm_odm->phy_dbg_info.num_qry_beacon_pkt < 5) && (p_false_alm_cnt->cnt_all < DM_DIG_FA_TH1) && (p_dm_odm->bsta_state)) {
 				current_igi = p_dm_dig_table->rx_gain_range_min;
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormal #beacon (%d) case: IGI does one-shot to 0x%x\n",
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: Abnormal #beacon (%d) case: IGI does one-shot to 0x%x\n",
 					p_dm_odm->phy_dbg_info.num_qry_beacon_pkt, current_igi));
 			}
 #endif
 		}
 	} else {
 		/* 2 Before link */
-		ODM_RT_TRACE(p_dm_odm,	ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust IGI before link\n"));
+		ODM_RT_TRACE(p_dm_odm,	ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: Adjust IGI before link\n"));
 
 		if (first_dis_connect || is_first_coverage) {
 			current_igi = dm_dig_min;
-			ODM_RT_TRACE(p_dm_odm,	ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First disconnect case: IGI does on-shot to lower bound\n"));
+			ODM_RT_TRACE(p_dm_odm,	ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: First disconnect case: IGI does on-shot to lower bound\n"));
 		} else {
 
-#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
+#if ((DM_ODM_SUPPORT_TYPE & (ODM_AP)) && (DIG_HW == 1))
 			if (priv->pshare->rf_ft_var.dig_upcheck_enable)
 				dig_go_up_check = phydm_dig_go_up_check(p_dm_odm);
 #endif
 
+#if (DIG_HW == 1)
 			if ((p_false_alm_cnt->cnt_all > dm_FA_thres[2]) && dig_go_up_check)
-				current_igi = current_igi + 4;
+				current_igi = current_igi + step_size_1;
 			else if ((p_false_alm_cnt->cnt_all > dm_FA_thres[1]) && dig_go_up_check)
+				current_igi = current_igi + step_size_2;
+			else if (p_false_alm_cnt->cnt_all < dm_FA_thres[0])
+				current_igi = current_igi - step_size_3;
+#else
+			if (p_false_alm_cnt->cnt_all > dm_FA_thres[2])
+				current_igi = current_igi + 4;
+			else if (p_false_alm_cnt->cnt_all > dm_FA_thres[1])
 				current_igi = current_igi + 2;
 			else if (p_false_alm_cnt->cnt_all < dm_FA_thres[0])
 				current_igi = current_igi - 2;
+#endif
 		}
 	}
 
@@ -1230,7 +1297,7 @@ odm_DIG(
 	if (current_igi > p_dm_dig_table->rx_gain_range_max)
 		current_igi = p_dm_dig_table->rx_gain_range_max;
 
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): cur_ig_value=0x%x, TotalFA = %d\n\n", current_igi, p_false_alm_cnt->cnt_all));
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: cur_ig_value=0x%x, TotalFA = %d\n", current_igi, p_false_alm_cnt->cnt_all));
 
 	/* 1 Update status */
 	{
@@ -1260,6 +1327,7 @@ odm_DIG(
 			p_dm_dig_table->dig_dynamic_min_0 = dig_dynamic_min;
 		}
 	}
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG end\n"));
 }
 
 void
@@ -1324,9 +1392,7 @@ odm_false_alarm_counter_statistics(
 {
 	struct PHY_DM_STRUCT					*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _FALSE_ALARM_STATISTICS	*false_alm_cnt = (struct _FALSE_ALARM_STATISTICS *)phydm_get_structure(p_dm_odm, PHYDM_FALSEALMCNT);
-#if (PHYDM_LA_MODE_SUPPORT == 1)
-	struct _RT_ADCSMP					*adc_smp = &(p_dm_odm->adcsmp);
-#endif
+	struct _ADAPTIVITY_STATISTICS	*adaptivity = (struct _ADAPTIVITY_STATISTICS *)phydm_get_structure(p_dm_odm, PHYDM_ADAPTIVITY);
 	u32						ret_value;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
@@ -1341,7 +1407,7 @@ odm_false_alarm_counter_statistics(
 	if (!(p_dm_odm->support_ability & ODM_BB_FA_CNT))
 		return;
 
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_false_alarm_counter_statistics()======>\n"));
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("FA_Counter()======>\n"));
 
 #if (ODM_IC_11N_SERIES_SUPPORT == 1)
 	if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) {
@@ -1386,6 +1452,16 @@ odm_false_alarm_counter_statistics(
 		/* read VHT CRC32 counter */
 		false_alm_cnt->cnt_vht_crc32_error = 0;
 		false_alm_cnt->cnt_vht_crc32_ok = 0;
+		
+#if (RTL8723D_SUPPORT == 1)
+		if (p_dm_odm->support_ic_type == ODM_RTL8723D) {
+			/* read HT CRC32 agg counter */
+			ret_value = odm_get_bb_reg(p_dm_odm, ODM_REG_HT_CRC32_CNT_11N_AGG, MASKDWORD);
+			false_alm_cnt->cnt_ht_crc32_error_agg = (ret_value & 0xffff0000) >> 16;
+			false_alm_cnt->cnt_ht_crc32_ok_agg= ret_value & 0xffff;
+		}
+#endif
+		
 
 #if (RTL8188E_SUPPORT == 1)
 		if (p_dm_odm->support_ic_type == ODM_RTL8188E) {
@@ -1445,21 +1521,10 @@ odm_false_alarm_counter_statistics(
 			odm_set_bb_reg(p_dm_odm, ODM_REG_PAGE_F_RST_11N, BIT(16), 1);
 			odm_set_bb_reg(p_dm_odm, ODM_REG_PAGE_F_RST_11N, BIT(16), 0);
 		}
-
-		/* Get debug port 0 */
-		odm_set_bb_reg(p_dm_odm, ODM_REG_DBG_RPT_11N, MASKDWORD, 0x0);
-		false_alm_cnt->dbg_port0 = odm_get_bb_reg(p_dm_odm, ODM_REG_RPT_11N, MASKDWORD);
-
-		/* Get EDCCA flag */
-		odm_set_bb_reg(p_dm_odm, ODM_REG_DBG_RPT_11N, MASKDWORD, 0x208);
-		false_alm_cnt->edcca_flag = (bool)odm_get_bb_reg(p_dm_odm, ODM_REG_RPT_11N, BIT(30));
-
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_false_alarm_counter_statistics(): cnt_fast_fsync=%d, cnt_sb_search_fail=%d\n",
-			false_alm_cnt->cnt_fast_fsync, false_alm_cnt->cnt_sb_search_fail));
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_false_alarm_counter_statistics(): cnt_parity_fail=%d, cnt_rate_illegal=%d\n",
-			false_alm_cnt->cnt_parity_fail, false_alm_cnt->cnt_rate_illegal));
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_false_alarm_counter_statistics(): cnt_crc8_fail=%d, cnt_mcs_fail=%d\n",
-			false_alm_cnt->cnt_crc8_fail, false_alm_cnt->cnt_mcs_fail));
+	
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("[OFDM FA Detail] Parity_Fail = (( %d )), Rate_Illegal = (( %d )), CRC8_fail = (( %d )), Mcs_fail = (( %d )), Fast_Fsync = (( %d )), SB_Search_fail = (( %d ))\n",
+			false_alm_cnt->cnt_parity_fail, false_alm_cnt->cnt_rate_illegal, false_alm_cnt->cnt_crc8_fail, false_alm_cnt->cnt_mcs_fail, false_alm_cnt->cnt_fast_fsync, false_alm_cnt->cnt_sb_search_fail));
+		
 	}
 #endif
 
@@ -1543,40 +1608,38 @@ odm_false_alarm_counter_statistics(
 			false_alm_cnt->cnt_all = false_alm_cnt->cnt_ofdm_fail;
 			false_alm_cnt->cnt_cca_all = false_alm_cnt->cnt_ofdm_cca;
 		}
-
-#if (PHYDM_LA_MODE_SUPPORT == 1)
-		if (adc_smp->adc_smp_state == ADCSMP_STATE_IDLE)
+	}
 #endif
-		{
-			/* Get debug port 0 */
-			odm_set_bb_reg(p_dm_odm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x0);
-			false_alm_cnt->dbg_port0 = odm_get_bb_reg(p_dm_odm, ODM_REG_RPT_11AC, MASKDWORD);
-
-			/* Get EDCCA flag */
-			odm_set_bb_reg(p_dm_odm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x209);
-			false_alm_cnt->edcca_flag = (bool)odm_get_bb_reg(p_dm_odm, ODM_REG_RPT_11AC, BIT(30));
+	if (p_dm_odm->support_ic_type != ODM_RTL8723D) {
+		if (phydm_set_bb_dbg_port(p_dm_odm, BB_DBGPORT_PRIORITY_1, 0x0)) {/*set debug port to 0x0*/
+			false_alm_cnt->dbg_port0 = phydm_get_bb_dbg_port_value(p_dm_odm);
+			phydm_release_bb_dbg_port(p_dm_odm);
 		}
 
+		if (phydm_set_bb_dbg_port(p_dm_odm, BB_DBGPORT_PRIORITY_1, adaptivity->adaptivity_dbg_port)) {
+			if (p_dm_odm->support_ic_type & (ODM_RTL8723B | ODM_RTL8188E))
+				false_alm_cnt->edcca_flag = (boolean)((phydm_get_bb_dbg_port_value(p_dm_odm) & BIT(30)) >> 30);
+			else
+				false_alm_cnt->edcca_flag = (boolean)((phydm_get_bb_dbg_port_value(p_dm_odm) & BIT(29)) >> 29);
+			phydm_release_bb_dbg_port(p_dm_odm);
+		}
 	}
-#endif
-
-
 	false_alm_cnt->cnt_crc32_error_all = false_alm_cnt->cnt_vht_crc32_error + false_alm_cnt->cnt_ht_crc32_error + false_alm_cnt->cnt_ofdm_crc32_error + false_alm_cnt->cnt_cck_crc32_error;
 	false_alm_cnt->cnt_crc32_ok_all = false_alm_cnt->cnt_vht_crc32_ok + false_alm_cnt->cnt_ht_crc32_ok + false_alm_cnt->cnt_ofdm_crc32_ok + false_alm_cnt->cnt_cck_crc32_ok;
 
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_false_alarm_counter_statistics(): cnt_ofdm_cca=%d\n", false_alm_cnt->cnt_ofdm_cca));
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_false_alarm_counter_statistics(): cnt_cck_cca=%d\n", false_alm_cnt->cnt_cck_cca));
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_false_alarm_counter_statistics(): cnt_cca_all=%d\n", false_alm_cnt->cnt_cca_all));
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_false_alarm_counter_statistics(): cnt_ofdm_fail=%d\n", false_alm_cnt->cnt_ofdm_fail));
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_false_alarm_counter_statistics(): cnt_cck_fail=%d\n", false_alm_cnt->cnt_cck_fail));
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_false_alarm_counter_statistics(): cnt_ofdm_fail=%d\n", false_alm_cnt->cnt_ofdm_fail));
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_false_alarm_counter_statistics(): Total False Alarm=%d\n", false_alm_cnt->cnt_all));
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_false_alarm_counter_statistics(): CCK CRC32 fail: %d, ok: %d\n", false_alm_cnt->cnt_cck_crc32_error, false_alm_cnt->cnt_cck_crc32_ok));
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_false_alarm_counter_statistics(): OFDM CRC32 fail: %d, ok: %d\n", false_alm_cnt->cnt_ofdm_crc32_error, false_alm_cnt->cnt_ofdm_crc32_ok));
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_false_alarm_counter_statistics(): HT CRC32 fail: %d, ok: %d\n", false_alm_cnt->cnt_ht_crc32_error, false_alm_cnt->cnt_ht_crc32_ok));
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_false_alarm_counter_statistics(): VHT CRC32 fail: %d, ok: %d\n", false_alm_cnt->cnt_vht_crc32_error, false_alm_cnt->cnt_vht_crc32_ok));
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_false_alarm_counter_statistics(): Total CRC32 fail: %d, ok: %d\n", false_alm_cnt->cnt_crc32_error_all, false_alm_cnt->cnt_crc32_ok_all));
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("odm_false_alarm_counter_statistics(): dbg port 0x0 = 0x%x, EDCCA = %d\n\n", false_alm_cnt->dbg_port0, false_alm_cnt->edcca_flag));
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
+		false_alm_cnt->cnt_cck_cca, false_alm_cnt->cnt_ofdm_cca, false_alm_cnt->cnt_cca_all));
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
+		false_alm_cnt->cnt_cck_fail, false_alm_cnt->cnt_ofdm_fail, false_alm_cnt->cnt_all));
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("[CCK]  CRC32 {error, ok}= {%d, %d}\n", false_alm_cnt->cnt_cck_crc32_error, false_alm_cnt->cnt_cck_crc32_ok));
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("[OFDM]CRC32 {error, ok}= {%d, %d}\n", false_alm_cnt->cnt_ofdm_crc32_error, false_alm_cnt->cnt_ofdm_crc32_ok));
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("[ HT ]  CRC32 {error, ok}= {%d, %d}\n", false_alm_cnt->cnt_ht_crc32_error, false_alm_cnt->cnt_ht_crc32_ok));
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("[VHT]  CRC32 {error, ok}= {%d, %d}\n", false_alm_cnt->cnt_vht_crc32_error, false_alm_cnt->cnt_vht_crc32_ok));
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("[VHT]  CRC32 {error, ok}= {%d, %d}\n", false_alm_cnt->cnt_crc32_error_all, false_alm_cnt->cnt_crc32_ok_all));
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("FA_Cnt: Dbg port 0x0 = 0x%x, EDCCA = %d\n\n", false_alm_cnt->dbg_port0, false_alm_cnt->edcca_flag));
 }
 
 /* 3============================================================
@@ -1591,6 +1654,7 @@ odm_pause_cck_packet_detection(
 	u8					cck_pd_threshold
 )
 {
+#if PHYDM_SUPPORT_CCKPD
 	struct PHY_DM_STRUCT			*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _dynamic_initial_gain_threshold_				*p_dm_dig_table = &p_dm_odm->dm_dig_table;
 
@@ -1617,7 +1681,7 @@ odm_pause_cck_packet_detection(
 	case PHYDM_PAUSE:
 	{
 		/* Disable CCK PD */
-		odm_cmn_info_update(p_dm_odm, ODM_CMNINFO_ABILITY, p_dm_odm->support_ability & (~ODM_BB_CCK_PD));
+		p_dm_odm->support_ability &= ~ODM_BB_CCK_PD;
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_pause_cck_packet_detection(): Pause CCK packet detection threshold !!\n"));
 
 		/* Backup original CCK PD threshold decided by CCK PD mechanism */
@@ -1661,7 +1725,7 @@ odm_pause_cck_packet_detection(
 			ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_pause_cck_packet_detection(): Write original CCKPD = 0x%x\n", p_dm_dig_table->cck_pd_backup));
 
 			/* Enable DIG */
-			odm_cmn_info_update(p_dm_odm, ODM_CMNINFO_ABILITY, p_dm_odm->support_ability | ODM_BB_CCK_PD);
+			p_dm_odm->support_ability |= ODM_BB_CCK_PD;
 			break;
 		}
 
@@ -1691,9 +1755,10 @@ odm_pause_cck_packet_detection(
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_pause_cck_packet_detection(): pause value = 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
 		p_dm_dig_table->pause_cckpd_value[7], p_dm_dig_table->pause_cckpd_value[6], p_dm_dig_table->pause_cckpd_value[5], p_dm_dig_table->pause_cckpd_value[4],
 		p_dm_dig_table->pause_cckpd_value[3], p_dm_dig_table->pause_cckpd_value[2], p_dm_dig_table->pause_cckpd_value[1], p_dm_dig_table->pause_cckpd_value[0]));
+#endif
 }
 
-
+#if PHYDM_SUPPORT_CCKPD
 void
 odm_cck_packet_detection_thresh(
 	void		*p_dm_void
@@ -1703,25 +1768,28 @@ odm_cck_packet_detection_thresh(
 	struct _dynamic_initial_gain_threshold_					*p_dm_dig_table = &p_dm_odm->dm_dig_table;
 	struct _FALSE_ALARM_STATISTICS	*false_alm_cnt = (struct _FALSE_ALARM_STATISTICS *)phydm_get_structure(p_dm_odm, PHYDM_FALSEALMCNT);
 	u8					cur_cck_cca_thres = p_dm_dig_table->cur_cck_cca_thres, RSSI_thd = 35;
+#if (RTL8197F_SUPPORT == 1)
+	u8					pd_th = 0, cs_ration = 0;
+#endif
 
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	/* modify by Guo.Mingzhi 2011-12-29 */
 	if (p_dm_odm->is_dual_mac_smart_concurrent == true)
-		/*	if (p_dm_odm->is_dual_mac_smart_concurrent == false) */
 		return;
+	
 	if (p_dm_odm->is_bt_hs_operation) {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_cck_packet_detection_thresh() write 0xcd for BT HS mode!!\n"));
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("CCK_PD: 0xcd for BT HS mode!!\n"));
 		odm_write_cck_cca_thres(p_dm_odm, 0xcd);
 		return;
 	}
 #endif
 
 	if ((!(p_dm_odm->support_ability & ODM_BB_CCK_PD)) || (!(p_dm_odm->support_ability & ODM_BB_FA_CNT))) {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_cck_packet_detection_thresh()  return==========\n"));
-#ifdef MCR_WIRELESS_EXTEND
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("CCK_PD: return==========\n"));
+		#ifdef MCR_WIRELESS_EXTEND
 		odm_write_cck_cca_thres(p_dm_odm, 0x43);
-#endif
+		#endif
 		return;
 	}
 
@@ -1730,23 +1798,29 @@ odm_cck_packet_detection_thresh(
 		return;
 #endif
 
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_cck_packet_detection_thresh()  ==========>\n"));
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("CCK_PD: ==========>\n"));
 
 	if (p_dm_dig_table->cck_fa_ma == 0xffffffff)
 		p_dm_dig_table->cck_fa_ma = false_alm_cnt->cnt_cck_fail;
 	else
 		p_dm_dig_table->cck_fa_ma = ((p_dm_dig_table->cck_fa_ma << 1) + p_dm_dig_table->cck_fa_ma + false_alm_cnt->cnt_cck_fail) >> 2;
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_cck_packet_detection_thresh(): CCK FA moving average = %d\n", p_dm_dig_table->cck_fa_ma));
+	
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("CCK_PD: CCK FA moving average = %d\n", p_dm_dig_table->cck_fa_ma));
 
 	if (p_dm_odm->is_linked) {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-#if 0 /*for [PCIE-1596]*/
+
+		#if 0 /*for [PCIE-1596]*/
 		if (p_dm_odm->rssi_min > (RSSI_thd + 14))
 			cur_cck_cca_thres = 0xed;
 		else if (p_dm_odm->rssi_min > (RSSI_thd + 6))
 			cur_cck_cca_thres = 0xdd;
 		else
-#endif
+		#endif
+		/*Add hp_hw_id condition due to 22B LPS power consumption issue and [PCIE-1596]*/
+		if (p_dm_odm->is_hp_hw_id && (p_dm_odm->traffic_load == TRAFFIC_ULTRA_LOW))
+			cur_cck_cca_thres = 0x40;
+		else {
 			if (p_dm_odm->rssi_min > RSSI_thd)
 				cur_cck_cca_thres = 0xcd;
 			else if (p_dm_odm->rssi_min > 20) {
@@ -1754,36 +1828,112 @@ odm_cck_packet_detection_thresh(
 					cur_cck_cca_thres = 0xcd;
 				else if (p_dm_dig_table->cck_fa_ma < (DM_DIG_FA_TH0 >> 1))
 					cur_cck_cca_thres = 0x83;
-			} else if (p_dm_odm->rssi_min > 7)
-				cur_cck_cca_thres = 0x83;
-			else
-				cur_cck_cca_thres = 0x40;
-#else
-		if (p_dm_dig_table->cur_ig_value > (0x24 + 14))
-			cur_cck_cca_thres = 0xed;
-		else if (p_dm_dig_table->cur_ig_value > (0x24 + 6))
-			cur_cck_cca_thres = 0xdd;
-		else if (p_dm_dig_table->cur_ig_value > 0x24)
-			cur_cck_cca_thres = 0xcd;
-		else {
-			if (p_dm_dig_table->cck_fa_ma > 0x400)
-				cur_cck_cca_thres = 0x83;
-			else if (p_dm_dig_table->cck_fa_ma < 0x200)
+			} else if (p_dm_odm->rssi_min > 3) {
+				if(p_dm_odm->p_advance_ota & PHYDM_ASUS_OTA_SETTING) {	/*for ASUS OTA test*/
+					if (p_dm_dig_table->cck_fa_ma > 200)
+						cur_cck_cca_thres = 0xc3;
+					else
+						cur_cck_cca_thres = 0x83;
+				} else if (p_dm_odm->rssi_min > 7)
+					cur_cck_cca_thres = 0x83;
+			} else
 				cur_cck_cca_thres = 0x40;
 		}
+			
+#else	/*ODM_AP*/
+
+		if (p_dm_odm->support_ic_type & ODM_RTL8197F) {
+			if ((p_dm_dig_table->cur_ig_value > (0x24 + 14)) || (p_dm_odm->rssi_min > 32))
+				cur_cck_cca_thres = 0xed;
+			else if ((p_dm_dig_table->cur_ig_value > (0x24 + 6)) || (p_dm_odm->rssi_min > 32))
+				cur_cck_cca_thres = 0xdd;
+			else if ((p_dm_dig_table->cur_ig_value > 0x24) || (p_dm_odm->rssi_min > 24 && p_dm_odm->rssi_min <= 30))
+				cur_cck_cca_thres = 0xcd;
+			else if ((p_dm_dig_table->cur_ig_value <= 0x24) || (p_dm_odm->rssi_min < 22)) {
+				if (p_dm_dig_table->cck_fa_ma > 0x400)
+					cur_cck_cca_thres = 0x83;
+				else if (p_dm_dig_table->cck_fa_ma < 0x200)
+					cur_cck_cca_thres = 0x40;
+			}
+		} else {
+			if (p_dm_dig_table->cur_ig_value > (0x24 + 14))
+				cur_cck_cca_thres = 0xed;
+			else if (p_dm_dig_table->cur_ig_value > (0x24 + 6))
+				cur_cck_cca_thres = 0xdd;
+			else if (p_dm_dig_table->cur_ig_value > 0x24)
+				cur_cck_cca_thres = 0xcd;
+			else {
+				#if 0
+				if (p_dm_dig_table->cck_fa_ma > 0x400)
+					cur_cck_cca_thres = 0x83;
+				else if (p_dm_dig_table->cck_fa_ma < 0x200)
+					cur_cck_cca_thres = 0x40;
+				#else
+					cur_cck_cca_thres = 0x83;
+				#endif
+			}
+		}
 
 #endif
 	} else {
+	
 		if (p_dm_dig_table->cck_fa_ma > 0x400)
 			cur_cck_cca_thres = 0x83;
 		else if (p_dm_dig_table->cck_fa_ma < 0x200)
 			cur_cck_cca_thres = 0x40;
 	}
 
-	odm_write_cck_cca_thres(p_dm_odm, cur_cck_cca_thres);
+	#if (RTL8197F_SUPPORT == 1)
+	/*Add by Yu Chen 20160902, pd_th for 0xa0a, cs_ration for 0xaaa*/
+	if (p_dm_odm->support_ic_type & ODM_RTL8197F) {
+		switch (cur_cck_cca_thres) {
+			case 0xed:
+				cs_ration = p_dm_dig_table->aaa_default + AAA_BASE + AAA_STEP*2;
+				pd_th = 0xd;
+				break;
+
+			case 0xdd:
+				cs_ration = p_dm_dig_table->aaa_default + AAA_BASE + AAA_STEP;
+				pd_th = 0xd;
+				break;
 
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_cck_packet_detection_thresh()  cur_cck_cca_thres = 0x%x\n", cur_cck_cca_thres));
+			case 0xcd:
+				cs_ration = p_dm_dig_table->aaa_default + AAA_BASE;
+				pd_th = 0xd;
+				break;
+
+			case 0x83:
+				cs_ration = p_dm_dig_table->aaa_default + AAA_STEP;
+				pd_th = 0x7;
+				break;
+
+			case 0x40:
+				cs_ration = p_dm_dig_table->aaa_default;
+				pd_th = 0x3;
+				break;
+
+			default:
+				cs_ration = p_dm_dig_table->aaa_default;
+				pd_th = 0x3;
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("cck pd use default\n"));
+				break;
+		}
+	}
+	#endif  /*#if (RTL8197F_SUPPORT == 1)*/
+
+	#if (RTL8197F_SUPPORT == 1)
+	if (p_dm_odm->support_ic_type & ODM_RTL8197F) {
+		odm_set_bb_reg(p_dm_odm, 0xa08, 0xf0000, pd_th);
+		odm_set_bb_reg(p_dm_odm, 0xaa8, 0x1f0000, cs_ration);
+	} else
+	#endif
+	{
+		odm_write_cck_cca_thres(p_dm_odm, cur_cck_cca_thres);
+	}
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("CCK_PD: cck_cca_th=((0x%x))\n\n", cur_cck_cca_thres));
 }
+#endif
 
 void
 odm_write_cck_cca_thres(
@@ -1791,22 +1941,34 @@ odm_write_cck_cca_thres(
 	u8			cur_cck_cca_thres
 )
 {
+#if PHYDM_SUPPORT_CCKPD
 	struct PHY_DM_STRUCT			*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _dynamic_initial_gain_threshold_				*p_dm_dig_table = &p_dm_odm->dm_dig_table;
 
 	if (p_dm_dig_table->cur_cck_cca_thres != cur_cck_cca_thres) {	/* modify by Guo.Mingzhi 2012-01-03 */
 		odm_write_1byte(p_dm_odm, ODM_REG(CCK_CCA, p_dm_odm), cur_cck_cca_thres);
 		p_dm_dig_table->cck_fa_ma = 0xffffffff;
+		
+#if (RTL8723D_SUPPORT == 1)
+		if (p_dm_odm->support_ic_type & ODM_RTL8723D) {	/* modify by David_Ding for 8723D no Beacon issue */
+			if (cur_cck_cca_thres == 0x40)
+				odm_write_1byte(p_dm_odm, 0xAAA, 0x0C);
+			else
+				odm_write_1byte(p_dm_odm, 0xAAA, 0x10);
+		}
+#endif
 	}
 	p_dm_dig_table->pre_cck_cca_thres = p_dm_dig_table->cur_cck_cca_thres;
 	p_dm_dig_table->cur_cck_cca_thres = cur_cck_cca_thres;
+#endif
 }
 
-bool
+boolean
 phydm_dig_go_up_check(
 	void		*p_dm_void
 )
 {
+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _CCX_INFO				*ccx_info = &p_dm_odm->dm_ccx_info;
 	struct _dynamic_initial_gain_threshold_					*p_dm_dig_table = &p_dm_odm->dm_dig_table;
@@ -1819,7 +1981,8 @@ phydm_dig_go_up_check(
 	u32					total_NHM_cnt;
 	u32					DIG_cover_cnt;
 	u32					over_DIG_cover_cnt;
-	bool					ret = true;
+#endif
+	boolean					ret = true;
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	struct rtl8192cd_priv				*priv = p_dm_odm->priv;
@@ -1953,7 +2116,7 @@ odm_mpt_dig_work_item_callback(
 {
 	struct _ADAPTER	*adapter = (struct _ADAPTER *)p_context;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 
 	ODM_MPT_DIG(p_dm_odm);
 }
@@ -1963,9 +2126,9 @@ odm_mpt_dig_callback(
 	struct timer_list		*p_timer
 )
 {
-	struct _ADAPTER		*adapter = (struct _ADAPTER *)p_timer->adapter;
+	struct _ADAPTER		*adapter = (struct _ADAPTER *)p_timer->Adapter;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 
 
 #if DEV_BUS_TYPE == RT_PCI_INTERFACE
@@ -2054,7 +2217,7 @@ ODM_MPT_DIG(
 #endif
 
 #else
-	if (!(p_dm_odm->priv->pshare->rf_ft_var.mp_specific && p_dm_odm->priv->pshare->mp_dig_on))
+	if (!(*(p_dm_odm->p_mp_mode) && p_dm_odm->priv->pshare->mp_dig_on))
 		return;
 
 	if (*p_dm_odm->p_band_type == ODM_BAND_5G)
diff --git a/rtl8822BU/hal/phydm/phydm_dig.h b/rtl8822BU/hal/phydm/phydm_dig.h
index 23e83d4..77ece7c 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_dig.h
+++ b/rtl8822BU/hal/phydm/phydm_dig.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,17 +11,13 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef	__PHYDMDIG_H__
 #define    __PHYDMDIG_H__
 
-#define DIG_VERSION	"1.24"	/* 2016.06.01  Stanley. Modify IGI setting for 1R-CCA path-B */
+#define DIG_VERSION	"1.32"	/* 2016.09.02  YuChen. add CCK PD for 8197F*/
+#define DIG_HW		0
 
 /* Pause DIG & CCKPD */
 #define		DM_DIG_MAX_PAUSE_TYPE		0x7
@@ -35,15 +31,15 @@ enum dig_goupcheck_level {
 };
 
 struct _dynamic_initial_gain_threshold_ {
-	bool		is_stop_dig;		/* for debug */
-	bool		is_ignore_dig;
-	bool		is_psd_in_progress;
+	boolean		is_stop_dig;		/* for debug */
+	boolean		is_ignore_dig;
+	boolean		is_psd_in_progress;
 
 	u8		dig_enable_flag;
 	u8		dig_ext_port_stage;
 
-	int			rssi_low_thresh;
-	int			rssi_high_thresh;
+	int		rssi_low_thresh;
+	int		rssi_high_thresh;
 
 	u32		fa_low_thresh;
 	u32		fa_high_thresh;
@@ -65,13 +61,16 @@ struct _dynamic_initial_gain_threshold_ {
 	u8		rx_gain_range_min;
 	u8		rssi_val_min;
 
+#if PHYDM_SUPPORT_CCKPD
 	u8		pre_cck_cca_thres;
 	u8		cur_cck_cca_thres;
+	u32		cck_fa_ma;
 	u8		pre_cck_pd_state;
 	u8		cur_cck_pd_state;
 	u8		cck_pd_backup;
 	u8		pause_cckpd_level;
 	u8		pause_cckpd_value[DM_DIG_MAX_PAUSE_TYPE + 1];
+#endif
 
 	u8		large_fa_hit;
 	u8		large_fa_timeout;		/*if (large_fa_hit), monitor "large_fa_timeout" sec, if timeout, large_fa_hit=0*/
@@ -80,8 +79,8 @@ struct _dynamic_initial_gain_threshold_ {
 
 	u8		dig_dynamic_min_0;
 	u8		dig_dynamic_min_1;
-	bool		is_media_connect_0;
-	bool		is_media_connect_1;
+	boolean		is_media_connect_0;
+	boolean		is_media_connect_1;
 
 	u32		ant_div_rssi_max;
 	u32		RSSI_max;
@@ -91,12 +90,12 @@ struct _dynamic_initial_gain_threshold_ {
 	u8		pause_dig_level;
 	u8		pause_dig_value[DM_DIG_MAX_PAUSE_TYPE + 1];
 
-	u32		cck_fa_ma;
 	enum dig_goupcheck_level		dig_go_up_check_level;
+	u8		aaa_default;
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
-	bool					is_tp_target;
-	bool					is_noise_est;
+	boolean					is_tp_target;
+	boolean					is_noise_est;
 	u32					tp_train_th_min;
 	u8					igi_offset_a;
 	u8					igi_offset_b;
@@ -111,6 +110,10 @@ struct _dynamic_initial_gain_threshold_ {
 	u8		big_jump_step2:2;
 	u8		big_jump_step3:2;
 #endif
+
+#if (DIG_HW == 1)
+	u8		pre_rssi_min;
+#endif
 };
 
 struct _FALSE_ALARM_STATISTICS {
@@ -136,14 +139,16 @@ struct _FALSE_ALARM_STATISTICS {
 	u32		cnt_ofdm_crc32_ok;
 	u32		cnt_ht_crc32_error;
 	u32		cnt_ht_crc32_ok;
+	u32		cnt_ht_crc32_error_agg;
+	u32		cnt_ht_crc32_ok_agg;
 	u32		cnt_vht_crc32_error;
 	u32		cnt_vht_crc32_ok;
 	u32		cnt_crc32_error_all;
 	u32		cnt_crc32_ok_all;
-	bool		cck_block_enable;
-	bool		ofdm_block_enable;
+	boolean		cck_block_enable;
+	boolean		ofdm_block_enable;
 	u32		dbg_port0;
-	bool		edcca_flag;
+	boolean		edcca_flag;
 };
 
 enum dm_dig_op_e {
@@ -211,6 +216,14 @@ enum phydm_pause_level {
 	PHYDM_PAUSE_LEVEL_7 = DM_DIG_MAX_PAUSE_TYPE		/* maximum level */
 };
 
+/*CCK PD*/
+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
+	#if (RTL8197F_SUPPORT == 1)
+    #define     AAA_BASE    p_dm_odm->priv->pshare->rf_ft_var.dbg_aaa_base   /*4*/
+    #define     AAA_STEP    p_dm_odm->priv->pshare->rf_ft_var.dbg_aaa_step   /*2*/
+	#endif
+#endif
+
 #define		DM_DIG_THRESH_HIGH			40
 #define		DM_DIG_THRESH_LOW			35
 
@@ -221,8 +234,13 @@ enum phydm_pause_level {
 #define		DM_DIG_MIN_NIC				0x20
 #define		DM_DIG_MAX_OF_MIN_NIC		0x3e
 
+#if (DIG_HW == 1)
+#define		DM_DIG_MAX_AP					p_dm_odm->priv->pshare->rf_ft_var.dbg_dig_upper /* 0x3e */
+#define		DM_DIG_MIN_AP					((p_dm_odm->support_ic_type & (ODM_RTL8812 | ODM_RTL8822B)) ? 0x1c : 0x20)/* 0x1c */
+#else
 #define		DM_DIG_MAX_AP					0x3e
 #define		DM_DIG_MIN_AP					0x20
+#endif
 #define		DM_DIG_MAX_OF_MIN			0x2A	/* 0x32 */
 #define		DM_DIG_MIN_AP_DFS				0x20
 
@@ -234,7 +252,11 @@ enum phydm_pause_level {
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	#define		DM_DIG_MAX_AP_COVERAGR		0x26
+#if (DIG_HW == 1)
+	#define		DM_DIG_MIN_AP_COVERAGE		((p_dm_odm->support_ic_type & (ODM_RTL8812 | ODM_RTL8822B)) ? 0x1c : 0x20)
+#else
 	#define		DM_DIG_MIN_AP_COVERAGE		0x1c
+#endif
 	#define		DM_DIG_MAX_OF_MIN_COVERAGE	0x22
 
 	#define		dm_dig_tp_target_th0			500
@@ -332,7 +354,7 @@ odm_write_cck_cca_thres(
 	u8					cur_cck_cca_thres
 );
 
-bool
+boolean
 phydm_dig_go_up_check(
 	void		*p_dm_void
 );
diff --git a/rtl8822BU/hal/phydm/phydm_dynamic_rx_path.c b/rtl8822BU/hal/phydm/phydm_dynamic_rx_path.c
index 9c93c69..ed32eed 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_dynamic_rx_path.c
+++ b/rtl8822BU/hal/phydm/phydm_dynamic_rx_path.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 /* ************************************************************
  * include files
@@ -43,6 +38,23 @@ phydm_process_phy_status_for_dynamic_rx_path(
 
 }
 
+void
+phydm_drp_get_statistic(
+	void			*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT					*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _DYNAMIC_RX_PATH_						*p_dm_drp_table = &(p_dm_odm->dm_drp_table);
+	struct _FALSE_ALARM_STATISTICS		*false_alm_cnt = (struct _FALSE_ALARM_STATISTICS *)phydm_get_structure(p_dm_odm, PHYDM_FALSEALMCNT);
+
+	odm_false_alarm_counter_statistics(p_dm_odm);
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
+		false_alm_cnt->cnt_cck_cca, false_alm_cnt->cnt_ofdm_cca, false_alm_cnt->cnt_cca_all));
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
+		false_alm_cnt->cnt_cck_fail, false_alm_cnt->cnt_ofdm_fail, false_alm_cnt->cnt_all));
+}
 
 void
 phydm_dynamic_rx_path(
@@ -51,17 +63,204 @@ phydm_dynamic_rx_path(
 {
 	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _DYNAMIC_RX_PATH_					*p_dm_drp_table	= &(p_dm_odm->dm_drp_table);
+	u8		training_set_timmer_en;
+	u8		curr_drp_state;
+	u32		rx_ok_cal;
+	u32		RSSI = 0;
+	struct _FALSE_ALARM_STATISTICS		*false_alm_cnt = (struct _FALSE_ALARM_STATISTICS *)phydm_get_structure(p_dm_odm, PHYDM_FALSEALMCNT);
 
 	if (!(p_dm_odm->support_ability & ODM_BB_DYNAMIC_RX_PATH)) {
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[Return Init]   Not Support Dynamic RX PAth\n"));
 		return;
 	}
 
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("Current drp_state = ((%d))\n", p_dm_drp_table->drp_state));
+
+	curr_drp_state = p_dm_drp_table->drp_state;
+
+	if (p_dm_drp_table->drp_state == DRP_INIT_STATE) {
+
+		phydm_drp_get_statistic(p_dm_odm);
+
+		if (false_alm_cnt->cnt_crc32_ok_all > 20) {
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[Stop DRP Training] cnt_crc32_ok_all = ((%d))\n", false_alm_cnt->cnt_crc32_ok_all));
+			p_dm_drp_table->drp_state  = DRP_INIT_STATE;
+			training_set_timmer_en = false;
+		} else {
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[Start DRP Training] cnt_crc32_ok_all = ((%d))\n", false_alm_cnt->cnt_crc32_ok_all));
+			p_dm_drp_table->drp_state  = DRP_TRAINING_STATE_0;
+			p_dm_drp_table->curr_rx_path = PHYDM_AB;
+			training_set_timmer_en = true;
+		}
+
+	} else if (p_dm_drp_table->drp_state == DRP_TRAINING_STATE_0) {
+
+		phydm_drp_get_statistic(p_dm_odm);
+
+		p_dm_drp_table->curr_cca_all_cnt_0 = false_alm_cnt->cnt_cca_all;
+		p_dm_drp_table->curr_fa_all_cnt_0 = false_alm_cnt->cnt_all;
+
+		p_dm_drp_table->drp_state  = DRP_TRAINING_STATE_1;
+		p_dm_drp_table->curr_rx_path = PHYDM_B;
+		training_set_timmer_en = true;
+
+	} else if (p_dm_drp_table->drp_state == DRP_TRAINING_STATE_1) {
+
+		phydm_drp_get_statistic(p_dm_odm);
+
+		p_dm_drp_table->curr_cca_all_cnt_1 = false_alm_cnt->cnt_cca_all;
+		p_dm_drp_table->curr_fa_all_cnt_1 = false_alm_cnt->cnt_all;
+
+#if 1
+		p_dm_drp_table->drp_state  = DRP_DECISION_STATE;
+#else
+
+		if (*(p_dm_odm->p_mp_mode)) {
+			rx_ok_cal = p_dm_odm->phy_dbg_info.num_qry_phy_status_cck + p_dm_odm->phy_dbg_info.num_qry_phy_status_ofdm;
+			RSSI = (rx_ok_cal != 0) ? p_dm_odm->rx_pwdb_ave / rx_ok_cal : 0;
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("MP RSSI = ((%d))\n", RSSI));
+		}
+
+		if (RSSI > p_dm_drp_table->rssi_threshold)
+
+			p_dm_drp_table->drp_state  = DRP_DECISION_STATE;
 
+		else  {
+
+			p_dm_drp_table->drp_state  = DRP_TRAINING_STATE_2;
+			p_dm_drp_table->curr_rx_path = PHYDM_A;
+			training_set_timmer_en = true;
+		}
+#endif
+	} else if (p_dm_drp_table->drp_state == DRP_TRAINING_STATE_2) {
+
+		phydm_drp_get_statistic(p_dm_odm);
+
+		p_dm_drp_table->curr_cca_all_cnt_2 = false_alm_cnt->cnt_cca_all;
+		p_dm_drp_table->curr_fa_all_cnt_2 = false_alm_cnt->cnt_all;
+		p_dm_drp_table->drp_state  = DRP_DECISION_STATE;
+	}
+
+	if (p_dm_drp_table->drp_state == DRP_DECISION_STATE) {
+
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("Current drp_state = ((%d))\n", p_dm_drp_table->drp_state));
+
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[0] {CCA, FA} = {%d, %d}\n", p_dm_drp_table->curr_cca_all_cnt_0, p_dm_drp_table->curr_fa_all_cnt_0));
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[1] {CCA, FA} = {%d, %d}\n", p_dm_drp_table->curr_cca_all_cnt_1, p_dm_drp_table->curr_fa_all_cnt_1));
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[2] {CCA, FA} = {%d, %d}\n", p_dm_drp_table->curr_cca_all_cnt_2, p_dm_drp_table->curr_fa_all_cnt_2));
+
+		if (p_dm_drp_table->curr_fa_all_cnt_1 < p_dm_drp_table->curr_fa_all_cnt_0) {
+
+			if ((p_dm_drp_table->curr_fa_all_cnt_0 - p_dm_drp_table->curr_fa_all_cnt_1) > p_dm_drp_table->fa_diff_threshold)
+				p_dm_drp_table->curr_rx_path = PHYDM_B;
+			else
+				p_dm_drp_table->curr_rx_path = PHYDM_AB;
+		} else
+			p_dm_drp_table->curr_rx_path = PHYDM_AB;
+
+		phydm_config_ofdm_rx_path(p_dm_odm, p_dm_drp_table->curr_rx_path);
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[Training Result]  curr_rx_path = ((%s%s)),\n",
+			((p_dm_drp_table->curr_rx_path & PHYDM_A)  ? "A"  : " "), ((p_dm_drp_table->curr_rx_path & PHYDM_B)  ? "B"  : " ")));
+
+		p_dm_drp_table->drp_state = DRP_INIT_STATE;
+		training_set_timmer_en = false;
+	}
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("DRP_state: ((%d)) -> ((%d))\n", curr_drp_state, p_dm_drp_table->drp_state));
+
+	if (training_set_timmer_en) {
+
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[Training en]  curr_rx_path = ((%s%s)), training_time = ((%d ms))\n",
+			((p_dm_drp_table->curr_rx_path & PHYDM_A)  ? "A"  : " "), ((p_dm_drp_table->curr_rx_path & PHYDM_B)  ? "B"  : " "), p_dm_drp_table->training_time));
+
+		phydm_config_ofdm_rx_path(p_dm_odm, p_dm_drp_table->curr_rx_path);
+		odm_set_timer(p_dm_odm, &(p_dm_drp_table->phydm_dynamic_rx_path_timer), p_dm_drp_table->training_time); /*ms*/
+	} else
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("DRP period end\n\n", curr_drp_state, p_dm_drp_table->drp_state));
 
-	phydm_config_ofdm_rx_path(p_dm_odm, PHYDM_AB);
 }
 
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+void
+phydm_dynamic_rx_path_callback(
+	struct timer_list		*p_timer
+)
+{
+	struct _ADAPTER		*adapter = (struct _ADAPTER *)p_timer->adapter;
+	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
+	struct PHY_DM_STRUCT		*p_dm_odm = &(p_hal_data->DM_OutSrc);
+	struct _DYNAMIC_RX_PATH_			*p_dm_drp_table = &(p_dm_odm->dm_drp_table);
+
+#if DEV_BUS_TYPE == RT_PCI_INTERFACE
+#if USE_WORKITEM
+	odm_schedule_work_item(&(p_dm_drp_table->phydm_dynamic_rx_path_workitem));
+#else
+	{
+		/* dbg_print("phydm_dynamic_rx_path\n"); */
+		phydm_dynamic_rx_path(p_dm_odm);
+	}
+#endif
+#else
+	odm_schedule_work_item(&(p_dm_drp_table->phydm_dynamic_rx_path_workitem));
+#endif
+}
+
+void
+phydm_dynamic_rx_path_workitem_callback(
+	void		*p_context
+)
+{
+	struct _ADAPTER		*p_adapter = (struct _ADAPTER *)p_context;
+	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
+	struct PHY_DM_STRUCT		*p_dm_odm = &(p_hal_data->DM_OutSrc);
+
+	/* dbg_print("phydm_dynamic_rx_path\n"); */
+	phydm_dynamic_rx_path(p_dm_odm);
+}
+#else if (DM_ODM_SUPPORT_TYPE == ODM_CE)
+
+void
+phydm_dynamic_rx_path_callback(
+	void *function_context
+)
+{
+	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)function_context;
+	struct _ADAPTER	*padapter = p_dm_odm->adapter;
+
+	if (padapter->net_closed == _TRUE)
+		return;
+
+#if 0 /* Can't do I/O in timer callback*/
+	odm_s0s1_sw_ant_div(p_dm_odm, SWAW_STEP_DETERMINE);
+#else
+	/*rtw_run_in_thread_cmd(padapter, odm_sw_antdiv_workitem_callback, padapter);*/
+#endif
+}
+
+#endif
+
+void
+phydm_dynamic_rx_path_timers(
+	void		*p_dm_void,
+	u8		state
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _DYNAMIC_RX_PATH_			*p_dm_drp_table	= &(p_dm_odm->dm_drp_table);
+
+	if (state == INIT_DRP_TIMMER) {
+
+		odm_initialize_timer(p_dm_odm, &(p_dm_drp_table->phydm_dynamic_rx_path_timer),
+			(void *)phydm_dynamic_rx_path_callback, NULL, "phydm_sw_antenna_switch_timer");
+	} else if (state == CANCEL_DRP_TIMMER)
+
+		odm_cancel_timer(p_dm_odm, &(p_dm_drp_table->phydm_dynamic_rx_path_timer));
+
+	else if (state == RELEASE_DRP_TIMMER)
+
+		odm_release_timer(p_dm_odm, &(p_dm_drp_table->phydm_dynamic_rx_path_timer));
+
+}
 
 void
 phydm_dynamic_rx_path_init(
@@ -70,15 +269,84 @@ phydm_dynamic_rx_path_init(
 {
 	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _DYNAMIC_RX_PATH_					*p_dm_drp_table	= &(p_dm_odm->dm_drp_table);
+	boolean			ret_value;
 
 	if (!(p_dm_odm->support_ability & ODM_BB_DYNAMIC_RX_PATH)) {
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("[Return]   Not Support Dynamic RX PAth\n"));
 		return;
 	}
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_RX_PATH, ODM_DBG_LOUD, ("phydm_dynamic_rx_path_init\n"));
+
+	p_dm_drp_table->drp_state = DRP_INIT_STATE;
+	p_dm_drp_table->rssi_threshold = DRP_RSSI_TH;
+	p_dm_drp_table->fa_count_thresold = 50;
+	p_dm_drp_table->fa_diff_threshold = 50;
+	p_dm_drp_table->training_time = 100; /*ms*/
+	p_dm_drp_table->drp_skip_counter = 0;
+	p_dm_drp_table->drp_period  = 0;
+	p_dm_drp_table->drp_init_finished = true;
 
+	ret_value = phydm_api_trx_mode(p_dm_odm, (enum odm_rf_path_e)(ODM_RF_A | ODM_RF_B), (enum odm_rf_path_e)(ODM_RF_A | ODM_RF_B), true);
+
+}
+
+void
+phydm_drp_debug(
+	void		*p_dm_void,
+	u32		*const dm_value,
+	u32		*_used,
+	char			*output,
+	u32		*_out_len
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u32			used = *_used;
+	u32			out_len = *_out_len;
+	struct _DYNAMIC_RX_PATH_			*p_dm_drp_table = &(p_dm_odm->dm_drp_table);
 
+	switch (dm_value[0])	{
 
+	case DRP_TRAINING_TIME:
+		p_dm_drp_table->training_time = (u16)dm_value[1];
+		break;
+	case DRP_TRAINING_PERIOD:
+		p_dm_drp_table->drp_period = (u8)dm_value[1];
+		break;
+	case DRP_RSSI_THRESHOLD:
+		p_dm_drp_table->rssi_threshold = (u8)dm_value[1];
+		break;
+	case DRP_FA_THRESHOLD:
+		p_dm_drp_table->fa_count_thresold = dm_value[1];
+		break;
+	case DRP_FA_DIFF_THRESHOLD:
+		p_dm_drp_table->fa_diff_threshold = dm_value[1];
+		break;
+	default:
+		PHYDM_SNPRINTF((output + used, out_len - used, "[DRP] unknown command\n"));
+		break;
 }
+}
+
+void
+phydm_dynamic_rx_path_caller(
+	void			*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _DYNAMIC_RX_PATH_			*p_dm_drp_table	= &(p_dm_odm->dm_drp_table);
 
+	if (p_dm_drp_table->drp_skip_counter <  p_dm_drp_table->drp_period)
+		p_dm_drp_table->drp_skip_counter++;
+	else
+		p_dm_drp_table->drp_skip_counter = 0;
 
+	if (p_dm_drp_table->drp_skip_counter != 0)
+		return;
+
+	if (p_dm_drp_table->drp_init_finished != true)
+		return;
+
+	phydm_dynamic_rx_path(p_dm_odm);
+
+}
 #endif
diff --git a/rtl8822BU/hal/phydm/phydm_dynamic_rx_path.h b/rtl8822BU/hal/phydm/phydm_dynamic_rx_path.h
index 5141fb2..fa9e794 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_dynamic_rx_path.h
+++ b/rtl8822BU/hal/phydm/phydm_dynamic_rx_path.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,23 +11,70 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef	__PHYDMDYMICRXPATH_H__
 #define    __PHYDMDYMICRXPATH_H__
 
 #define DYNAMIC_RX_PATH_VERSION	"1.0"  /*2016.07.15  Dino */
 
+
+#define	DRP_RSSI_TH	35
+
+#define INIT_DRP_TIMMER		0
+#define CANCEL_DRP_TIMMER		1
+#define RELEASE_DRP_TIMMER		2
+
+#if (RTL8822B_SUPPORT == 1)
+struct phydm_rtl8822b_struct {
+	enum odm_rf_path_e	path_judge;
+	u16	path_a_cck_fa;
+	u16	path_b_cck_fa;
+	
+};
+#endif
+
 #if (CONFIG_DYNAMIC_RX_PATH == 1)
 
+enum drp_state_e {
+	DRP_INIT_STATE				= 0,
+	DRP_TRAINING_STATE_0	= 1,
+	DRP_TRAINING_STATE_1		= 2,
+	DRP_TRAINING_STATE_2		= 3,
+	DRP_DECISION_STATE		= 4
+};
+
+enum adjustable_value_e {
+	DRP_TRAINING_TIME		= 0,
+	DRP_TRAINING_PERIOD	= 1,
+	DRP_RSSI_THRESHOLD	= 2,
+	DRP_FA_THRESHOLD		= 3,
+	DRP_FA_DIFF_THRESHOLD = 4
+};
 
 struct _DYNAMIC_RX_PATH_ {
-	u8	rx_path;
+	u8			curr_rx_path;
+	u8			drp_state;
+	u16			training_time;
+	u8			rssi_threshold;
+	u32			fa_count_thresold;
+	u32			fa_diff_threshold;
+	u32			curr_cca_all_cnt_0;
+	u32			curr_fa_all_cnt_0;
+	u32			curr_cca_all_cnt_1;
+	u32			curr_fa_all_cnt_1;
+	u32			curr_cca_all_cnt_2;
+	u32			curr_fa_all_cnt_2;
+	u8			drp_skip_counter;
+	u8			drp_period;
+	u8			drp_init_finished;
+
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+#if USE_WORKITEM
+	RT_WORK_ITEM	phydm_dynamic_rx_path_workitem;
+#endif
+#endif
+	struct timer_list		phydm_dynamic_rx_path_timer;
 
 };
 
@@ -45,10 +92,50 @@ phydm_dynamic_rx_path(
 	void			*p_dm_void
 );
 
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+void
+phydm_dynamic_rx_path_callback(
+	struct timer_list		*p_timer
+);
+
+void
+phydm_dynamic_rx_path_workitem_callback(
+	void		*p_context
+);
+
+#else if (DM_ODM_SUPPORT_TYPE == ODM_CE)
+
+void
+phydm_dynamic_rx_path_callback(
+	void *function_context
+);
+
+#endif
+
+void
+phydm_dynamic_rx_path_timers(
+	void		*p_dm_void,
+	u8		state
+);
+
 void
 phydm_dynamic_rx_path_init(
 	void			*p_dm_void
 );
 
+void
+phydm_drp_debug(
+	void		*p_dm_void,
+	u32		*const dm_value,
+	u32		*_used,
+	char			*output,
+	u32		*_out_len
+);
+
+void
+phydm_dynamic_rx_path_caller(
+	void			*p_dm_void
+);
+
 #endif
 #endif
diff --git a/rtl8822BU/hal/phydm/phydm_dynamicbbpowersaving.c b/rtl8822BU/hal/phydm/phydm_dynamicbbpowersaving.c
index 50db607..fc2ec27 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_dynamicbbpowersaving.c
+++ b/rtl8822BU/hal/phydm/phydm_dynamicbbpowersaving.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 /* ************************************************************
  * include files
diff --git a/rtl8822BU/hal/phydm/phydm_dynamicbbpowersaving.h b/rtl8822BU/hal/phydm/phydm_dynamicbbpowersaving.h
index c4a7047..0c4a236 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_dynamicbbpowersaving.h
+++ b/rtl8822BU/hal/phydm/phydm_dynamicbbpowersaving.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef	__PHYDMDYNAMICBBPOWERSAVING_H__
 #define    __PHYDMDYNAMICBBPOWERSAVING_H__
diff --git a/rtl8822BU/hal/phydm/phydm_dynamictxpower.c b/rtl8822BU/hal/phydm/phydm_dynamictxpower.c
index 85a8cd7..3474fa6 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_dynamictxpower.c
+++ b/rtl8822BU/hal/phydm/phydm_dynamictxpower.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 /* ************************************************************
  * include files
@@ -32,7 +27,7 @@ odm_dynamic_tx_power_init(
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	struct _ADAPTER	*adapter = p_dm_odm->adapter;
-	PMGNT_INFO			p_mgnt_info = &adapter->mgnt_info;
+	PMGNT_INFO			p_mgnt_info = &adapter->MgntInfo;
 	HAL_DATA_TYPE		*p_hal_data = GET_HAL_DATA(adapter);
 
 	/*if (!IS_HARDWARE_TYPE_8814A(adapter)) {*/
@@ -41,24 +36,24 @@ odm_dynamic_tx_power_init(
 	/*	return;*/
 	/*} else*/
 	{
-		p_mgnt_info->is_dynamic_tx_power_enable = true;
+		p_mgnt_info->bDynamicTxPowerEnable = true;
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD,
-			("odm_dynamic_tx_power_init DynamicTxPowerEnable=%d\n", p_mgnt_info->is_dynamic_tx_power_enable));
+			("odm_dynamic_tx_power_init DynamicTxPowerEnable=%d\n", p_mgnt_info->bDynamicTxPowerEnable));
 	}
 
 #if DEV_BUS_TYPE == RT_USB_INTERFACE
-	if (rt_get_interface_selection(adapter) == intf_sel1_usb_high_power) {
+	if (RT_GetInterfaceSelection(adapter) == INTF_SEL1_USB_High_Power) {
 		odm_dynamic_tx_power_save_power_index(p_dm_odm);
-		p_mgnt_info->is_dynamic_tx_power_enable = true;
+		p_mgnt_info->bDynamicTxPowerEnable = true;
 	} else
 #else
 	/* so 92c pci do not need dynamic tx power? vivi check it later */
-	p_mgnt_info->is_dynamic_tx_power_enable = false;
+	p_mgnt_info->bDynamicTxPowerEnable = false;
 #endif
 
 
-		p_hal_data->last_dtp_lvl = tx_high_pwr_level_normal;
-	p_hal_data->dynamic_tx_high_power_lvl = tx_high_pwr_level_normal;
+		p_hal_data->LastDTPLvl = tx_high_pwr_level_normal;
+	p_hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_normal;
 
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 
@@ -75,8 +70,8 @@ odm_dynamic_tx_power_save_power_index(
 	void					*p_dm_void
 )
 {
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_WIN))
 	u8		index;
 	u32		power_index_reg[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
 
@@ -84,7 +79,7 @@ odm_dynamic_tx_power_save_power_index(
 	struct _ADAPTER	*adapter = p_dm_odm->adapter;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
 	for (index = 0; index < 6; index++)
-		p_hal_data->power_index_backup[index] = platform_efio_read_1byte(adapter, power_index_reg[index]);
+		p_hal_data->PowerIndex_backup[index] = PlatformEFIORead1Byte(adapter, power_index_reg[index]);
 
 
 #endif
@@ -96,18 +91,18 @@ odm_dynamic_tx_power_restore_power_index(
 	void					*p_dm_void
 )
 {
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_WIN))
 	u8			index;
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
 	u32			power_index_reg[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+
 	for (index = 0; index < 6; index++)
-		platform_efio_write_1byte(adapter, power_index_reg[index], p_hal_data->power_index_backup[index]);
+		PlatformEFIOWrite1Byte(adapter, power_index_reg[index], p_hal_data->PowerIndex_backup[index]);
+
 
 
-#endif
 #endif
 }
 
@@ -246,9 +241,9 @@ odm_dynamic_tx_power_nic(
 		odm_dynamic_tx_power_8814a(p_dm_odm);
 	else if (p_dm_odm->support_ic_type & ODM_RTL8821) {
 		struct _ADAPTER		*adapter	 =  p_dm_odm->adapter;
-		PMGNT_INFO		p_mgnt_info = get_default_mgnt_info(adapter);
+		PMGNT_INFO		p_mgnt_info = GetDefaultMgntInfo(adapter);
 
-		if (p_mgnt_info->reg_rsp_pwr == 1)	{
+		if (p_mgnt_info->RegRspPwr == 1)	{
 			if (p_dm_odm->rssi_min > 60)
 				odm_set_mac_reg(p_dm_odm, ODM_REG_RESP_TX_11AC, BIT(20) | BIT19 | BIT18, 1); /*Resp TXAGC offset = -3dB*/
 			else if (p_dm_odm->rssi_min < 55)
@@ -264,8 +259,8 @@ odm_dynamic_tx_power_ap(
 
 )
 {
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 
 	/* #if ((RTL8192C_SUPPORT==1) || (RTL8192D_SUPPORT==1) || (RTL8188E_SUPPORT==1) || (RTL8812E_SUPPORT==1)) */
 
@@ -277,8 +272,8 @@ odm_dynamic_tx_power_ap(
 	if (!priv->pshare->rf_ft_var.tx_pwr_ctrl)
 		return;
 
-#if ((RTL8812A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) || (RTL8814A_SUPPORT == 1))
-	if (p_dm_odm->support_ic_type & (ODM_RTL8812 | ODM_RTL8881A | ODM_RTL8814A))
+#if ((RTL8812A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1))
+	if (p_dm_odm->support_ic_type & (ODM_RTL8812 | ODM_RTL8881A | ODM_RTL8814A | ODM_RTL8822B))
 		pwr_thd = TX_POWER_NEAR_FIELD_THRESH_LVL1;
 #endif
 
@@ -385,65 +380,65 @@ odm_dynamic_tx_power_8814a(
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _ADAPTER *adapter = p_dm_odm->adapter;
-	PMGNT_INFO			p_mgnt_info = &adapter->mgnt_info;
+	PMGNT_INFO			p_mgnt_info = &adapter->MgntInfo;
 	HAL_DATA_TYPE		*p_hal_data = GET_HAL_DATA(adapter);
 	s32				undecorated_smoothed_pwdb;
 
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD,
 		("TxLevel=%d p_mgnt_info->iot_action=%x p_mgnt_info->is_dynamic_tx_power_enable=%d\n",
-		p_hal_data->dynamic_tx_high_power_lvl, p_mgnt_info->iot_action, p_mgnt_info->is_dynamic_tx_power_enable));
+		p_hal_data->DynamicTxHighPowerLvl, p_mgnt_info->IOTAction, p_mgnt_info->bDynamicTxPowerEnable));
 
 	/*STA not connected and AP not connected*/
-	if ((!p_mgnt_info->is_media_connect) && (p_hal_data->entry_min_undecorated_smoothed_pwdb == 0)) {
+	if ((!p_mgnt_info->bMediaConnect) && (p_hal_data->EntryMinUndecoratedSmoothedPWDB == 0)) {
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("Not connected to any reset power lvl\n"));
-		p_hal_data->dynamic_tx_high_power_lvl = tx_high_pwr_level_normal;
+		p_hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_normal;
 		return;
 	}
 
 
-	if ((p_mgnt_info->is_dynamic_tx_power_enable != true) || p_mgnt_info->iot_action & HT_IOT_ACT_DISABLE_HIGH_POWER)
-		p_hal_data->dynamic_tx_high_power_lvl = tx_high_pwr_level_normal;
+	if ((p_mgnt_info->bDynamicTxPowerEnable != true) || p_mgnt_info->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER)
+		p_hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_normal;
 	else {
-		if (p_mgnt_info->is_media_connect) {	/*Default port*/
+		if (p_mgnt_info->bMediaConnect) {	/*Default port*/
 			if (ACTING_AS_AP(adapter) || ACTING_AS_IBSS(adapter)) {
-				undecorated_smoothed_pwdb = p_hal_data->entry_min_undecorated_smoothed_pwdb;
+				undecorated_smoothed_pwdb = p_hal_data->EntryMinUndecoratedSmoothedPWDB;
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Client PWDB = 0x%x\n", undecorated_smoothed_pwdb));
 			} else {
-				undecorated_smoothed_pwdb = p_hal_data->undecorated_smoothed_pwdb;
+				undecorated_smoothed_pwdb = p_hal_data->UndecoratedSmoothedPWDB;
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x\n", undecorated_smoothed_pwdb));
 			}
 		} else {/*associated entry pwdb*/
-			undecorated_smoothed_pwdb = p_hal_data->entry_min_undecorated_smoothed_pwdb;
+			undecorated_smoothed_pwdb = p_hal_data->EntryMinUndecoratedSmoothedPWDB;
 			ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x\n", undecorated_smoothed_pwdb));
 		}
 
 		/*Should we separate as 2.4G/5G band?*/
 
 		if (undecorated_smoothed_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL2) {
-			p_hal_data->dynamic_tx_high_power_lvl = tx_high_pwr_level_level2;
+			p_hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_level2;
 			ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("tx_high_pwr_level_level1 (TxPwr=0x0)\n"));
 		} else if ((undecorated_smoothed_pwdb < (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) &&
 			(undecorated_smoothed_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
-			p_hal_data->dynamic_tx_high_power_lvl = tx_high_pwr_level_level1;
+			p_hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_level1;
 			ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("tx_high_pwr_level_level1 (TxPwr=0x10)\n"));
 		} else if (undecorated_smoothed_pwdb < (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
-			p_hal_data->dynamic_tx_high_power_lvl = tx_high_pwr_level_normal;
+			p_hal_data->DynamicTxHighPowerLvl = tx_high_pwr_level_normal;
 			ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("tx_high_pwr_level_normal\n"));
 		}
 	}
 
 
-	if (p_hal_data->dynamic_tx_high_power_lvl != p_hal_data->last_dtp_lvl) {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("odm_dynamic_tx_power_8814a() channel = %d\n", p_hal_data->current_channel));
-		odm_set_tx_power_level8814(adapter, p_hal_data->current_channel, p_hal_data->dynamic_tx_high_power_lvl);
+	if (p_hal_data->DynamicTxHighPowerLvl != p_hal_data->LastDTPLvl) {
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("odm_dynamic_tx_power_8814a() channel = %d\n", p_hal_data->CurrentChannel));
+		odm_set_tx_power_level8814(adapter, p_hal_data->CurrentChannel, p_hal_data->DynamicTxHighPowerLvl);
 	}
 
 
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD,
 		("odm_dynamic_tx_power_8814a() channel = %d  TXpower lvl=%d/%d\n",
-		p_hal_data->current_channel, p_hal_data->last_dtp_lvl, p_hal_data->dynamic_tx_high_power_lvl));
+		p_hal_data->CurrentChannel, p_hal_data->LastDTPLvl, p_hal_data->DynamicTxHighPowerLvl));
 
-	p_hal_data->last_dtp_lvl = p_hal_data->dynamic_tx_high_power_lvl;
+	p_hal_data->LastDTPLvl = p_hal_data->DynamicTxHighPowerLvl;
 
 }
 
@@ -488,9 +483,9 @@ odm_set_tx_power_level8814(
 
 	for (path = ODM_RF_PATH_A; path <= ODM_RF_PATH_D; ++path) {
 
-		u8	usb_host = usb_mode_query_hub_usb_type(adapter);
-		u8	usb_rfset = usb_mode_query_rf_set(adapter);
-		u8	usb_rf_type = rt_get_rftype(adapter);
+		u8	usb_host = UsbModeQueryHubUsbType(adapter);
+		u8	usb_rfset = UsbModeQueryRfSet(adapter);
+		u8	usb_rf_type = RT_GetRFType(adapter);
 
 		for (i = 0; i <= 16; i++) {
 			for (j = 0; j <= 3; j++) {
@@ -498,7 +493,7 @@ odm_set_tx_power_level8814(
 					continue;
 
 				txagc_table_wd =  0x00801000;
-				power_index = (u32) phy_get_tx_power_index(adapter, (u8)path, jaguar2_rates[i][j], p_hal_data->current_channel_bw, channel);
+				power_index = (u32) PHY_GetTxPowerIndex(adapter, (u8)path, jaguar2_rates[i][j], p_hal_data->CurrentChannelBW, channel);
 
 				/*for Query bus type to recude tx power.*/
 				if (usb_host != USB_MODE_U3 && usb_rfset == 1 && IS_HARDWARE_TYPE_8814AU(adapter) && usb_rf_type == RF_3T3R) {
@@ -519,17 +514,17 @@ odm_set_tx_power_level8814(
 				} else if (pwr_lvl == tx_high_pwr_level_level2)
 					power_index = 0;
 
-				txagc_table_wd |= (path << 8) | m_rate_to_hw_rate(jaguar2_rates[i][j]) | (power_index << 24);
+				txagc_table_wd |= (path << 8) | MRateToHwRate(jaguar2_rates[i][j]) | (power_index << 24);
 
-				phy_set_tx_power_index_shadow(adapter, (u8)power_index, (u8)path, jaguar2_rates[i][j]);
+				PHY_SetTxPowerIndexShadow(adapter, (u8)power_index, (u8)path, jaguar2_rates[i][j]);
 
 				value[k++] = txagc_table_wd;
 			}
 		}
 	}
 
-	if (adapter->mgnt_info.is_scan_in_progress == false &&  adapter->mgnt_info.reg_fw_offload == 2)
-		hal_download_tx_power_level8814(adapter, value);
+	if (adapter->MgntInfo.bScanInProgress == false &&  adapter->MgntInfo.RegFWOffload == 2)
+		HalDownloadTxPowerLevel8814(adapter, value);
 #endif
 }
 #endif
diff --git a/rtl8822BU/hal/phydm/phydm_dynamictxpower.h b/rtl8822BU/hal/phydm/phydm_dynamictxpower.h
index badae89..36b004c 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_dynamictxpower.h
+++ b/rtl8822BU/hal/phydm/phydm_dynamictxpower.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef	__PHYDMDYNAMICTXPOWER_H__
 #define    __PHYDMDYNAMICTXPOWER_H__
diff --git a/rtl8822BU/hal/phydm/phydm_edcaturbocheck.c b/rtl8822BU/hal/phydm/phydm_edcaturbocheck.c
deleted file mode 100755
index 4ccb9ba..0000000
--- a/rtl8822BU/hal/phydm/phydm_edcaturbocheck.c
+++ b/dev/null
@@ -1,687 +0,0 @@
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
-
-/* ************************************************************
- * include files
- * ************************************************************ */
-#include "mp_precomp.h"
-#include "phydm_precomp.h"
-
-void
-odm_edca_turbo_init(
-	void		*p_dm_void)
-{
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	struct _ADAPTER	*adapter = NULL;
-	HAL_DATA_TYPE	*p_hal_data = NULL;
-
-	if (p_dm_odm->adapter == NULL)	{
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("EdcaTurboInit fail!!!\n"));
-		return;
-	}
-
-	adapter = p_dm_odm->adapter;
-	p_hal_data = GET_HAL_DATA(adapter);
-
-	p_dm_odm->dm_edca_table.is_current_turbo_edca = false;
-	p_dm_odm->dm_edca_table.is_cur_rdl_state = false;
-	p_hal_data->is_any_non_be_pkts = false;
-
-#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	struct _ADAPTER	*adapter = p_dm_odm->adapter;
-	p_dm_odm->dm_edca_table.is_current_turbo_edca = false;
-	p_dm_odm->dm_edca_table.is_cur_rdl_state = false;
-	adapter->recvpriv.is_any_non_be_pkts = false;
-
-#endif
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VO PARAM: 0x%x\n", odm_read_4byte(p_dm_odm, ODM_EDCA_VO_PARAM)));
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VI PARAM: 0x%x\n", odm_read_4byte(p_dm_odm, ODM_EDCA_VI_PARAM)));
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BE PARAM: 0x%x\n", odm_read_4byte(p_dm_odm, ODM_EDCA_BE_PARAM)));
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BK PARAM: 0x%x\n", odm_read_4byte(p_dm_odm, ODM_EDCA_BK_PARAM)));
-
-
-}	/* ODM_InitEdcaTurbo */
-
-void
-odm_edca_turbo_check(
-	void		*p_dm_void
-)
-{
-	/*  */
-	/* For AP/ADSL use struct rtl8192cd_priv* */
-	/* For CE/NIC use struct _ADAPTER* */
-	/*  */
-
-	/*  */
-	/* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
-	/* at the same time. In the stage2/3, we need to prive universal interface and merge all */
-	/* HW dynamic mechanism. */
-	/*  */
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("odm_edca_turbo_check========================>\n"));
-
-	if (!(p_dm_odm->support_ability & ODM_MAC_EDCA_TURBO))
-		return;
-
-	switch	(p_dm_odm->support_platform) {
-	case	ODM_WIN:
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-		odm_edca_turbo_check_mp(p_dm_odm);
-#endif
-		break;
-
-	case	ODM_CE:
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-		odm_edca_turbo_check_ce(p_dm_odm);
-#endif
-		break;
-	}
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("<========================odm_edca_turbo_check\n"));
-
-}	/* odm_CheckEdcaTurbo */
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-
-
-void
-odm_edca_turbo_check_ce(
-	void		*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	u32	EDCA_BE_UL = 0x5ea42b;/* Parameter suggested by Scott  */ /* edca_setting_UL[p_mgnt_info->iot_peer]; */
-	u32	EDCA_BE_DL = 0x5ea42b;/* Parameter suggested by Scott  */ /* edca_setting_DL[p_mgnt_info->iot_peer]; */
-	u32	ic_type = p_dm_odm->support_ic_type;
-	u32	iot_peer = 0;
-	u8	wireless_mode = 0xFF;                 /* invalid value */
-	u32	traffic_index;
-	u32	edca_param;
-	u64	cur_tx_bytes = 0;
-	u64	cur_rx_bytes = 0;
-	u8	bbtchange = _FALSE;
-	u8	is_bias_on_rx = _FALSE;
-	HAL_DATA_TYPE		*p_hal_data = GET_HAL_DATA(adapter);
-	struct dvobj_priv		*pdvobjpriv = adapter_to_dvobj(adapter);
-	struct xmit_priv		*pxmitpriv = &(adapter->xmitpriv);
-	struct recv_priv		*precvpriv = &(adapter->recvpriv);
-	struct registry_priv	*pregpriv = &adapter->registrypriv;
-	struct mlme_ext_priv	*pmlmeext = &(adapter->mlmeextpriv);
-	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
-
-	if (p_dm_odm->is_linked != _TRUE) {
-		precvpriv->is_any_non_be_pkts = _FALSE;
-		return;
-	}
-
-	if ((pregpriv->wifi_spec == 1)) { /* || (pmlmeinfo->HT_enable == 0)) */
-		precvpriv->is_any_non_be_pkts = _FALSE;
-		return;
-	}
-
-	if (p_dm_odm->p_wireless_mode != NULL)
-		wireless_mode = *(p_dm_odm->p_wireless_mode);
-
-	iot_peer = pmlmeinfo->assoc_AP_vendor;
-
-	if (iot_peer >=  HT_IOT_PEER_MAX) {
-		precvpriv->is_any_non_be_pkts = _FALSE;
-		return;
-	}
-
-	if (p_dm_odm->support_ic_type & ODM_RTL8188E) {
-		if ((iot_peer == HT_IOT_PEER_RALINK) || (iot_peer == HT_IOT_PEER_ATHEROS))
-			is_bias_on_rx = _TRUE;
-	}
-
-	/* Check if the status needs to be changed. */
-	if ((bbtchange) || (!precvpriv->is_any_non_be_pkts)) {
-		cur_tx_bytes = pdvobjpriv->traffic_stat.cur_tx_bytes;
-		cur_rx_bytes = pdvobjpriv->traffic_stat.cur_rx_bytes;
-
-		/* traffic, TX or RX */
-		if (is_bias_on_rx) {
-			if (cur_tx_bytes > (cur_rx_bytes << 2)) {
-				/* Uplink TP is present. */
-				traffic_index = UP_LINK;
-			} else {
-				/* Balance TP is present. */
-				traffic_index = DOWN_LINK;
-			}
-		} else {
-			if (cur_rx_bytes > (cur_tx_bytes << 2)) {
-				/* Downlink TP is present. */
-				traffic_index = DOWN_LINK;
-			} else {
-				/* Balance TP is present. */
-				traffic_index = UP_LINK;
-			}
-		}
-
-		/* if ((p_dm_odm->dm_edca_table.prv_traffic_idx != traffic_index) || (!p_dm_odm->dm_edca_table.is_current_turbo_edca)) */
-		{
-			if (p_dm_odm->support_interface == ODM_ITRF_PCIE) {
-				EDCA_BE_UL = 0x6ea42b;
-				EDCA_BE_DL = 0x6ea42b;
-			}
-
-			/* 92D txop can't be set to 0x3e for cisco1250 */
-			if ((iot_peer == HT_IOT_PEER_CISCO) && (wireless_mode == ODM_WM_N24G)) {
-				EDCA_BE_DL = edca_setting_DL[iot_peer];
-				EDCA_BE_UL = edca_setting_UL[iot_peer];
-			}
-			/* merge from 92s_92c_merge temp brunch v2445    20120215 */
-			else if ((iot_peer == HT_IOT_PEER_CISCO) && ((wireless_mode == ODM_WM_G) || (wireless_mode == (ODM_WM_B | ODM_WM_G)) || (wireless_mode == ODM_WM_A) || (wireless_mode == ODM_WM_B)))
-				EDCA_BE_DL = edca_setting_dl_g_mode[iot_peer];
-			else if ((iot_peer == HT_IOT_PEER_AIRGO) && ((wireless_mode == ODM_WM_G) || (wireless_mode == ODM_WM_A)))
-				EDCA_BE_DL = 0xa630;
-			else if (iot_peer == HT_IOT_PEER_MARVELL) {
-				EDCA_BE_DL = edca_setting_DL[iot_peer];
-				EDCA_BE_UL = edca_setting_UL[iot_peer];
-			} else if (iot_peer == HT_IOT_PEER_ATHEROS) {
-				/* Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. */
-				EDCA_BE_DL = edca_setting_DL[iot_peer];
-			}
-
-			if ((ic_type == ODM_RTL8812) || (ic_type == ODM_RTL8821) || (ic_type == ODM_RTL8192E)) { /* add 8812AU/8812AE */
-				EDCA_BE_UL = 0x5ea42b;
-				EDCA_BE_DL = 0x5ea42b;
-
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("8812A: EDCA_BE_UL=0x%x EDCA_BE_DL =0x%x", EDCA_BE_UL, EDCA_BE_DL));
-			}
-
-			if (traffic_index == DOWN_LINK)
-				edca_param = EDCA_BE_DL;
-			else
-				edca_param = EDCA_BE_UL;
-
-			rtw_write32(adapter, REG_EDCA_BE_PARAM, edca_param);
-
-			p_dm_odm->dm_edca_table.prv_traffic_idx = traffic_index;
-		}
-
-		p_dm_odm->dm_edca_table.is_current_turbo_edca = _TRUE;
-	} else {
-		/*  */
-		/* Turn Off EDCA turbo here. */
-		/* Restore original EDCA according to the declaration of AP. */
-		/*  */
-		if (p_dm_odm->dm_edca_table.is_current_turbo_edca) {
-			rtw_write32(adapter, REG_EDCA_BE_PARAM, p_hal_data->ac_param_be);
-			p_dm_odm->dm_edca_table.is_current_turbo_edca = _FALSE;
-		}
-	}
-
-}
-
-
-#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void
-odm_edca_turbo_check_mp(
-	void		*p_dm_void
-)
-{
-
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	HAL_DATA_TYPE		*p_hal_data = GET_HAL_DATA(adapter);
-
-	struct _ADAPTER			*p_default_adapter = get_default_adapter(adapter);
-	struct _ADAPTER			*p_ext_adapter = get_first_ext_adapter(adapter); /* NULL; */
-	PMGNT_INFO			p_mgnt_info = &adapter->mgnt_info;
-	PSTA_QOS			p_sta_qos = adapter->mgnt_info.p_sta_qos;
-	/* [Win7 count Tx/Rx statistic for Extension Port] odm_CheckEdcaTurbo's adapter is always Default. 2009.08.20, by Bohn */
-	u64				ext_cur_tx_ok_cnt = 0;
-	u64				ext_cur_rx_ok_cnt = 0;
-	/* For future Win7  Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. */
-	u8 two_port_status = (u8)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE;
-
-	/* Keep past Tx/Rx packet count for RT-to-RT EDCA turbo. */
-	u64				cur_tx_ok_cnt = 0;
-	u64				cur_rx_ok_cnt = 0;
-	u32				EDCA_BE_UL = 0x5ea42b;/* Parameter suggested by Scott  */ /* edca_setting_UL[p_mgnt_info->iot_peer]; */
-	u32				EDCA_BE_DL = 0x5ea42b;/* Parameter suggested by Scott  */ /* edca_setting_DL[p_mgnt_info->iot_peer]; */
-	u32                         EDCA_BE = 0x5ea42b;
-	u8                         iot_peer = 0;
-	bool                      *p_is_cur_rdl_state = NULL;
-	bool                      is_last_is_cur_rdl_state = false;
-	bool				 is_bias_on_rx = false;
-	bool				is_edca_turbo_on = false;
-	u8				tx_rate = 0xFF;
-	u64				value64;
-
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("odm_edca_turbo_check_mp========================>"));
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BE PARAM: 0x%x\n", odm_read_4byte(p_dm_odm, ODM_EDCA_BE_PARAM)));
-
-	/* *******************************
-	 * list paramter for different platform
-	 * ******************************* */
-	is_last_is_cur_rdl_state = p_dm_odm->dm_edca_table.is_cur_rdl_state;
-	p_is_cur_rdl_state = &(p_dm_odm->dm_edca_table.is_cur_rdl_state);
-
-	/* 2012/09/14 MH Add */
-	if (p_mgnt_info->num_non_be_pkt > p_mgnt_info->reg_edca_thresh && !(adapter->mgnt_info.wifi_confg & RT_WIFI_LOGO))
-		p_hal_data->is_any_non_be_pkts = true;
-
-	p_mgnt_info->num_non_be_pkt = 0;
-
-	/* Caculate TX/RX TP: */
-	cur_tx_ok_cnt = p_dm_odm->cur_tx_ok_cnt;
-	cur_rx_ok_cnt = p_dm_odm->cur_rx_ok_cnt;
-
-
-	if (p_ext_adapter == NULL)
-		p_ext_adapter = p_default_adapter;
-
-	ext_cur_tx_ok_cnt = p_ext_adapter->tx_stats.num_tx_bytes_unicast - p_mgnt_info->ext_last_tx_ok_cnt;
-	ext_cur_rx_ok_cnt = p_ext_adapter->rx_stats.num_rx_bytes_unicast - p_mgnt_info->ext_last_rx_ok_cnt;
-	get_two_port_shared_resource(adapter, TWO_PORT_SHARED_OBJECT__STATUS, NULL, &two_port_status);
-	/* For future Win7  Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. */
-	if (two_port_status == TWO_PORT_STATUS__EXTENSION_ONLY) {
-		cur_tx_ok_cnt = ext_cur_tx_ok_cnt ;
-		cur_rx_ok_cnt = ext_cur_rx_ok_cnt ;
-	}
-	/*  */
-	iot_peer = p_mgnt_info->iot_peer;
-	is_bias_on_rx = (p_mgnt_info->iot_action & HT_IOT_ACT_EDCA_BIAS_ON_RX) ? true : false;
-	is_edca_turbo_on = ((!p_hal_data->is_any_non_be_pkts)) ? true : false;
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("is_any_non_be_pkts : 0x%lx\n", p_hal_data->is_any_non_be_pkts));
-
-
-	/* *******************************
-	 * check if edca turbo is disabled
-	 * ******************************* */
-	if (odm_is_edca_turbo_disable(p_dm_odm)) {
-		p_hal_data->is_any_non_be_pkts = false;
-		p_mgnt_info->last_tx_ok_cnt = adapter->tx_stats.num_tx_bytes_unicast;
-		p_mgnt_info->last_rx_ok_cnt = adapter->rx_stats.num_rx_bytes_unicast;
-		p_mgnt_info->ext_last_tx_ok_cnt = p_ext_adapter->tx_stats.num_tx_bytes_unicast;
-		p_mgnt_info->ext_last_rx_ok_cnt = p_ext_adapter->rx_stats.num_rx_bytes_unicast;
-
-	}
-
-	/* *******************************
-	 * remove iot case out
-	 * ******************************* */
-	odm_edca_para_sel_by_iot(p_dm_odm, &EDCA_BE_UL, &EDCA_BE_DL);
-
-
-	/* *******************************
-	 * Check if the status needs to be changed.
-	 * ******************************* */
-	if (is_edca_turbo_on) {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("is_edca_turbo_on : 0x%x is_bias_on_rx : 0x%x\n", is_edca_turbo_on, is_bias_on_rx));
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("cur_tx_ok_cnt : 0x%lx\n", cur_tx_ok_cnt));
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("cur_rx_ok_cnt : 0x%lx\n", cur_rx_ok_cnt));
-		if (is_bias_on_rx)
-			odm_edca_choose_traffic_idx(p_dm_odm, cur_tx_ok_cnt, cur_rx_ok_cnt,   true,  p_is_cur_rdl_state);
-		else
-			odm_edca_choose_traffic_idx(p_dm_odm, cur_tx_ok_cnt, cur_rx_ok_cnt,   false,  p_is_cur_rdl_state);
-
-		/* modify by Guo.Mingzhi 2011-12-29 */
-		if (adapter->AP_EDCA_PARAM[0] != EDCA_BE)
-			EDCA_BE = adapter->AP_EDCA_PARAM[0];
-		else
-			EDCA_BE = ((*p_is_cur_rdl_state) == true) ? EDCA_BE_DL : EDCA_BE_UL;
-		if (IS_HARDWARE_TYPE_8821U(adapter)) {
-			if (p_mgnt_info->reg_tx_duty_enable) {
-				/* 2013.01.23 LukeLee: debug for 8811AU thermal issue (reduce Tx duty cycle) */
-				if (!p_mgnt_info->forced_data_rate) { /* auto rate */
-					if (p_dm_odm->tx_rate != 0xFF)
-						tx_rate = adapter->hal_func.get_hw_rate_from_m_rate_handler(p_dm_odm->tx_rate);
-				} else /* force rate */
-					tx_rate = (u8) p_mgnt_info->forced_data_rate;
-
-				value64 = (cur_rx_ok_cnt << 2);
-				if (cur_tx_ok_cnt < value64) /* Downlink */
-					odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
-				else { /* Uplink */
-					/*dbg_print("p_rf_calibrate_info->thermal_value = 0x%X\n", p_rf_calibrate_info->thermal_value);*/
-					/*if(p_rf_calibrate_info->thermal_value < p_hal_data->eeprom_thermal_meter)*/
-					if ((p_dm_odm->rf_calibrate_info.thermal_value < 0x2c) || (*p_dm_odm->p_band_type == BAND_ON_2_4G))
-						odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
-					else {
-						switch (tx_rate) {
-						case MGN_VHT1SS_MCS6:
-						case MGN_VHT1SS_MCS5:
-						case MGN_MCS6:
-						case MGN_MCS5:
-						case MGN_48M:
-						case MGN_54M:
-							odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0x1ea42b);
-							break;
-						case MGN_VHT1SS_MCS4:
-						case MGN_MCS4:
-						case MGN_36M:
-							odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa42b);
-							break;
-						case MGN_VHT1SS_MCS3:
-						case MGN_MCS3:
-						case MGN_24M:
-							odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa47f);
-							break;
-						case MGN_VHT1SS_MCS2:
-						case MGN_MCS2:
-						case MGN_18M:
-							odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa57f);
-							break;
-						case MGN_VHT1SS_MCS1:
-						case MGN_MCS1:
-						case MGN_9M:
-						case MGN_12M:
-							odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa77f);
-							break;
-						case MGN_VHT1SS_MCS0:
-						case MGN_MCS0:
-						case MGN_6M:
-							odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa87f);
-							break;
-						default:
-							odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
-							break;
-						}
-					}
-				}
-			} else
-				odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
-
-		} else if (IS_HARDWARE_TYPE_8812AU(adapter)) {
-			if (p_mgnt_info->reg_tx_duty_enable) {
-				/* 2013.07.26 Wilson: debug for 8812AU thermal issue (reduce Tx duty cycle) */
-				/* it;s the same issue as 8811AU */
-				if (!p_mgnt_info->forced_data_rate) { /* auto rate */
-					if (p_dm_odm->tx_rate != 0xFF)
-						tx_rate = adapter->hal_func.get_hw_rate_from_m_rate_handler(p_dm_odm->tx_rate);
-				} else /* force rate */
-					tx_rate = (u8) p_mgnt_info->forced_data_rate;
-
-				value64 = (cur_rx_ok_cnt << 2);
-				if (cur_tx_ok_cnt < value64) /* Downlink */
-					odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
-				else { /* Uplink */
-					/*dbg_print("p_rf_calibrate_info->thermal_value = 0x%X\n", p_rf_calibrate_info->thermal_value);*/
-					/*if(p_rf_calibrate_info->thermal_value < p_hal_data->eeprom_thermal_meter)*/
-					if ((p_dm_odm->rf_calibrate_info.thermal_value < 0x2c) || (*p_dm_odm->p_band_type == BAND_ON_2_4G))
-						odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
-					else {
-						switch (tx_rate) {
-						case MGN_VHT2SS_MCS9:
-						case MGN_VHT1SS_MCS9:
-						case MGN_VHT1SS_MCS8:
-						case MGN_MCS15:
-						case MGN_MCS7:
-							odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0x1ea44f);
-						case MGN_VHT2SS_MCS8:
-						case MGN_VHT1SS_MCS7:
-						case MGN_MCS14:
-						case MGN_MCS6:
-						case MGN_54M:
-							odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa44f);
-						case MGN_VHT2SS_MCS7:
-						case MGN_VHT2SS_MCS6:
-						case MGN_VHT1SS_MCS6:
-						case MGN_VHT1SS_MCS5:
-						case MGN_MCS13:
-						case MGN_MCS5:
-						case MGN_48M:
-							odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa630);
-							break;
-						case MGN_VHT2SS_MCS5:
-						case MGN_VHT2SS_MCS4:
-						case MGN_VHT1SS_MCS4:
-						case MGN_VHT1SS_MCS3:
-						case MGN_MCS12:
-						case MGN_MCS4:
-						case MGN_MCS3:
-						case MGN_36M:
-						case MGN_24M:
-							odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa730);
-							break;
-						case MGN_VHT2SS_MCS3:
-						case MGN_VHT2SS_MCS2:
-						case MGN_VHT2SS_MCS1:
-						case MGN_VHT1SS_MCS2:
-						case MGN_VHT1SS_MCS1:
-						case MGN_MCS11:
-						case MGN_MCS10:
-						case MGN_MCS9:
-						case MGN_MCS2:
-						case MGN_MCS1:
-						case MGN_18M:
-						case MGN_12M:
-							odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa830);
-							break;
-						case MGN_VHT2SS_MCS0:
-						case MGN_VHT1SS_MCS0:
-						case MGN_MCS0:
-						case MGN_MCS8:
-						case MGN_9M:
-						case MGN_6M:
-							odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, 0xa87f);
-							break;
-						default:
-							odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
-							break;
-						}
-					}
-				}
-			} else
-				odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
-		} else
-			odm_write_4byte(p_dm_odm, ODM_EDCA_BE_PARAM, EDCA_BE);
-
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("EDCA Turbo on: EDCA_BE:0x%lx\n", EDCA_BE));
-
-		p_dm_odm->dm_edca_table.is_current_turbo_edca = true;
-
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("EDCA_BE_DL : 0x%lx  EDCA_BE_UL : 0x%lx  EDCA_BE : 0x%lx\n", EDCA_BE_DL, EDCA_BE_UL, EDCA_BE));
-
-	} else {
-		/* Turn Off EDCA turbo here. */
-		/* Restore original EDCA according to the declaration of AP. */
-		if (p_dm_odm->dm_edca_table.is_current_turbo_edca) {
-			adapter->hal_func.set_hw_reg_handler(adapter, HW_VAR_AC_PARAM, GET_WMM_PARAM_ELE_SINGLE_AC_PARAM(p_sta_qos->wmm_param_ele, AC0_BE));
-
-			p_dm_odm->dm_edca_table.is_current_turbo_edca = false;
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Restore EDCA BE: 0x%lx\n", p_dm_odm->WMMEDCA_BE));
-
-		}
-	}
-
-}
-
-
-/* check if edca turbo is disabled */
-bool
-odm_is_edca_turbo_disable(
-	void		*p_dm_void
-)
-{
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	PMGNT_INFO			p_mgnt_info = &adapter->mgnt_info;
-	u32				iot_peer = p_mgnt_info->iot_peer;
-
-	if (p_dm_odm->is_bt_disable_edca_turbo) {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("EdcaTurboDisable for BT!!\n"));
-		return true;
-	}
-
-	if ((!(p_dm_odm->support_ability & ODM_MAC_EDCA_TURBO)) ||
-	    (p_dm_odm->wifi_test & RT_WIFI_LOGO) ||
-	    (iot_peer >= HT_IOT_PEER_MAX)) {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("EdcaTurboDisable\n"));
-		return true;
-	}
-
-
-	/* 1. We do not turn on EDCA turbo mode for some AP that has IOT issue */
-	/* 2. User may disable EDCA Turbo mode with OID settings. */
-	if (p_mgnt_info->iot_action & HT_IOT_ACT_DISABLE_EDCA_TURBO) {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("iot_action:EdcaTurboDisable\n"));
-		return	true;
-	}
-
-	return	false;
-
-
-}
-
-/* add iot case here: for MP/CE */
-void
-odm_edca_para_sel_by_iot(
-	void		*p_dm_void,
-	u32		*EDCA_BE_UL,
-	u32		*EDCA_BE_DL
-)
-{
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	u32                         iot_peer = 0;
-	u32                         ic_type = p_dm_odm->support_ic_type;
-	u8                         wireless_mode = 0xFF;                 /* invalid value */
-	u32                         iot_peer_sub_type = 0;
-
-	PMGNT_INFO			p_mgnt_info = &adapter->mgnt_info;
-	u8				two_port_status = (u8)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE;
-
-	if (p_dm_odm->p_wireless_mode != NULL)
-		wireless_mode = *(p_dm_odm->p_wireless_mode);
-
-	/* ========================================================= */
-	/* list paramter for different platform */
-
-	iot_peer = p_mgnt_info->iot_peer;
-	iot_peer_sub_type = p_mgnt_info->iot_peer_subtype;
-	get_two_port_shared_resource(adapter, TWO_PORT_SHARED_OBJECT__STATUS, NULL, &two_port_status);
-
-	/* ****************************
-	 * / IOT case for MP
-	 * **************************** */
-	if (p_dm_odm->support_interface == ODM_ITRF_PCIE) {
-		(*EDCA_BE_UL) = 0x6ea42b;
-		(*EDCA_BE_DL) = 0x6ea42b;
-	}
-
-	if (two_port_status == TWO_PORT_STATUS__EXTENSION_ONLY) {
-		(*EDCA_BE_UL) = 0x5ea42b;/* Parameter suggested by Scott  */ /* edca_setting_UL[ExtAdapter->mgnt_info.iot_peer]; */
-		(*EDCA_BE_DL) = 0x5ea42b;/* Parameter suggested by Scott  */ /* edca_setting_DL[ExtAdapter->mgnt_info.iot_peer]; */
-	}
-
-#if (INTEL_PROXIMITY_SUPPORT == 1)
-	if (p_mgnt_info->intel_class_mode_info.is_enable_ca == true)
-		(*EDCA_BE_UL) = (*EDCA_BE_DL) = 0xa44f;
-	else
-#endif
-	{
-		if ((p_mgnt_info->iot_action & (HT_IOT_ACT_FORCED_ENABLE_BE_TXOP | HT_IOT_ACT_AMSDU_ENABLE))) {
-			/* To check whether we shall force turn on TXOP configuration. */
-			if (!((*EDCA_BE_UL) & 0xffff0000))
-				(*EDCA_BE_UL) |= 0x005e0000; /* Force TxOP limit to 0x005e for UL. */
-			if (!((*EDCA_BE_DL) & 0xffff0000))
-				(*EDCA_BE_DL) |= 0x005e0000; /* Force TxOP limit to 0x005e for DL. */
-		}
-
-		/* 92D txop can't be set to 0x3e for cisco1250 */
-		if ((iot_peer == HT_IOT_PEER_CISCO) && (wireless_mode == ODM_WM_N24G)) {
-			(*EDCA_BE_DL) = edca_setting_DL[iot_peer];
-			(*EDCA_BE_UL) = edca_setting_UL[iot_peer];
-		}
-		/* merge from 92s_92c_merge temp brunch v2445    20120215 */
-		else if ((iot_peer == HT_IOT_PEER_CISCO) && ((wireless_mode == ODM_WM_G) || (wireless_mode == (ODM_WM_B | ODM_WM_G)) || (wireless_mode == ODM_WM_A) || (wireless_mode == ODM_WM_B)))
-			(*EDCA_BE_DL) = edca_setting_dl_g_mode[iot_peer];
-		else if ((iot_peer == HT_IOT_PEER_AIRGO) && ((wireless_mode == ODM_WM_G) || (wireless_mode == ODM_WM_A)))
-			(*EDCA_BE_DL) = 0xa630;
-
-		else if (iot_peer == HT_IOT_PEER_MARVELL) {
-			(*EDCA_BE_DL) = edca_setting_DL[iot_peer];
-			(*EDCA_BE_UL) = edca_setting_UL[iot_peer];
-		} else if (iot_peer == HT_IOT_PEER_ATHEROS && iot_peer_sub_type != HT_IOT_PEER_TPLINK_AC1750) {
-			/* Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. */
-			if (wireless_mode == ODM_WM_G)
-				(*EDCA_BE_DL) = edca_setting_dl_g_mode[iot_peer];
-			else
-				(*EDCA_BE_DL) = edca_setting_DL[iot_peer];
-
-			if (ic_type == ODM_RTL8821)
-				(*EDCA_BE_DL) = 0x5ea630;
-
-		}
-	}
-
-	if ((ic_type == ODM_RTL8812) || (ic_type == ODM_RTL8192E)) {  /* add 8812AU/8812AE */
-		(*EDCA_BE_UL) = 0x5ea42b;
-		(*EDCA_BE_DL) = 0x5ea42b;
-
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("8812A: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx\n", (*EDCA_BE_UL), (*EDCA_BE_DL)));
-	}
-
-	if ((ic_type == ODM_RTL8814A) && (iot_peer == HT_IOT_PEER_REALTEK)) {      /*8814AU and 8814AR*/
-		(*EDCA_BE_UL) = 0x5ea42b;
-		(*EDCA_BE_DL) = 0xa42b;
-
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("8814A: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx\n", (*EDCA_BE_UL), (*EDCA_BE_DL)));
-	}
-
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Special: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx, iot_peer = %d\n", (*EDCA_BE_UL), (*EDCA_BE_DL), iot_peer));
-
-}
-
-
-void
-odm_edca_choose_traffic_idx(
-	void		*p_dm_void,
-	u64			cur_tx_bytes,
-	u64			cur_rx_bytes,
-	bool		is_bias_on_rx,
-	bool		*p_is_cur_rdl_state
-)
-{
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	if (is_bias_on_rx) {
-
-		if (cur_tx_bytes > (cur_rx_bytes * 4)) {
-			*p_is_cur_rdl_state = false;
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Uplink Traffic\n "));
-
-		} else {
-			*p_is_cur_rdl_state = true;
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Balance Traffic\n"));
-
-		}
-	} else {
-		if (cur_rx_bytes > (cur_tx_bytes * 4)) {
-			*p_is_cur_rdl_state = true;
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Downlink	Traffic\n"));
-
-		} else {
-			*p_is_cur_rdl_state = false;
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Balance Traffic\n"));
-		}
-	}
-
-	return ;
-}
-
-#endif
diff --git a/rtl8822BU/hal/phydm/phydm_edcaturbocheck.h b/rtl8822BU/hal/phydm/phydm_edcaturbocheck.h
deleted file mode 100755
index 044d4af..0000000
--- a/rtl8822BU/hal/phydm/phydm_edcaturbocheck.h
+++ b/dev/null
@@ -1,99 +0,0 @@
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
-
-#ifndef	__PHYDMEDCATURBOCHECK_H__
-#define    __PHYDMEDCATURBOCHECK_H__
-
-/*#define EDCATURBO_VERSION	"2.1"*/
-#define EDCATURBO_VERSION	"2.3"	/*2015.07.29 by YuChen*/
-
-struct _EDCA_TURBO_ {
-	bool is_current_turbo_edca;
-	bool is_cur_rdl_state;
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	u32	prv_traffic_idx; /* edca turbo */
-#endif
-
-};
-
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
-static u32 edca_setting_UL[HT_IOT_PEER_MAX] =
-	/* UNKNOWN		REALTEK_90	REALTEK_92SE	BROADCOM		RALINK		ATHEROS		CISCO		MERU        MARVELL	92U_AP		SELF_AP(DownLink/Tx) */
-{ 0x5e4322,		0xa44f,		0x5e4322,		0x5ea32b,		0x5ea422,	0x5ea322,	0x3ea430,	0x5ea42b, 0x5ea44f,	0x5e4322,	0x5e4322};
-
-
-static u32 edca_setting_DL[HT_IOT_PEER_MAX] =
-	/* UNKNOWN		REALTEK_90	REALTEK_92SE	BROADCOM		RALINK		ATHEROS		CISCO		MERU,       MARVELL	92U_AP		SELF_AP(UpLink/Rx) */
-{ 0xa44f,		0x5ea44f,	0x5e4322,		0x5ea42b,		0xa44f,		0xa630,		0x5ea630,	0x5ea42b, 0xa44f,		0xa42b,		0xa42b};
-
-static u32 edca_setting_dl_g_mode[HT_IOT_PEER_MAX] =
-	/* UNKNOWN		REALTEK_90	REALTEK_92SE	BROADCOM		RALINK		ATHEROS		CISCO		MERU,       MARVELL	92U_AP		SELF_AP */
-{ 0x4322,		0xa44f,		0x5e4322,		0xa42b,			0x5e4322,	0x4322,		0xa42b,		0x5ea42b, 0xa44f,		0x5e4322,	0x5ea42b};
-
-#endif
-
-
-
-void
-odm_edca_turbo_check(
-	void		*p_dm_void
-);
-void
-odm_edca_turbo_init(
-	void		*p_dm_void
-);
-
-#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-void
-odm_edca_turbo_check_mp(
-	void		*p_dm_void
-);
-
-/* check if edca turbo is disabled */
-bool
-odm_is_edca_turbo_disable(
-	void		*p_dm_void
-);
-/* choose edca paramter for special IOT case */
-void
-odm_edca_para_sel_by_iot(
-	void					*p_dm_void,
-	u32		*EDCA_BE_UL,
-	u32		*EDCA_BE_DL
-);
-/* check if it is UL or DL */
-void
-odm_edca_choose_traffic_idx(
-	void		*p_dm_void,
-	u64			cur_tx_bytes,
-	u64			cur_rx_bytes,
-	bool		is_bias_on_rx,
-	bool		*p_is_cur_rdl_state
-);
-
-#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-void
-odm_edca_turbo_check_ce(
-	void		*p_dm_void
-);
-#endif
-
-#endif
diff --git a/rtl8822BU/hal/phydm/phydm_features.h b/rtl8822BU/hal/phydm/phydm_features.h
index 86624e9..325e7c1 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_features.h
+++ b/rtl8822BU/hal/phydm/phydm_features.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,16 +11,13 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef	__PHYDM_FEATURES_H__
 #define __PHYDM_FEATURES
 
+#define ODM_DC_CANCELLATION_SUPPORT		(ODM_RTL8188F | ODM_RTL8710B)
+#define ODM_RECEIVER_BLOCKING_SUPPORT	(ODM_RTL8188E | ODM_RTL8192E)
 
 #if ((RTL8814A_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1))
 	#define PHYDM_LA_MODE_SUPPORT			1
@@ -29,6 +26,30 @@
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+
+	#if (RTL8822B_SUPPORT == 1)
+	#define PHYDM_TXA_CALIBRATION			1
+	#else
+	#define PHYDM_TXA_CALIBRATION			0
+	#endif
+
+	#if (RTL8188E_SUPPORT == 1 || RTL8192E_SUPPORT == 1)
+	#define	PHYDM_PRIMARY_CCA			1
+	#else
+	#define	PHYDM_PRIMARY_CCA			0
+	#endif
+
+
+	#if (RTL8188F_SUPPORT == 1 || RTL8710B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 || RTL8822B_SUPPORT == 1)
+	#define	PHYDM_DC_CANCELLATION			1
+	#else
+	#define	PHYDM_DC_CANCELLATION			0
+	#endif
+	
+	#define	CONFIG_PSD_TOOL					1
+	/*phydm debyg report & tools*/
+	#define CONFIG_PHYDM_DEBUG_FUNCTION		1
+
 	/*Antenna Diversity*/
 	#define CONFIG_PHYDM_ANTENNA_DIVERSITY
 	#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
@@ -41,6 +62,11 @@
 			/*#define CONFIG_HL_SMART_ANTENNA_TYPE1*/
 			#define CONFIG_FAT_PATCH
 		#endif
+
+		#if (RTL8822B_SUPPORT == 1)
+			/*#define CONFIG_HL_SMART_ANTENNA_TYPE2*/
+		#endif
+
 	#endif
 
 	#if (RTL8822B_SUPPORT == 1)
@@ -49,7 +75,10 @@
 		#define	CONFIG_DYNAMIC_RX_PATH	0
 	#endif
 
-	#define SUPPORTABLITY_PHYDMLIZE	1
+	#if (RTL8188E_SUPPORT == 1 || RTL8192E_SUPPORT == 1)
+		#define	CONFIG_RECEIVER_BLOCKING
+	#endif
+	#define PHYDM_SUPPORT_CCKPD		1
 	#define RA_MASK_PHYDMLIZE_WIN	1
 	/*#define CONFIG_PATH_DIVERSITY*/
 	/*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/
@@ -63,12 +92,32 @@
 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
 
 	#if (RTL8822B_SUPPORT == 1)
+	#define PHYDM_TXA_CALIBRATION			1
+	#else
+	#define PHYDM_TXA_CALIBRATION			0
+	#endif
+
+	#if (RTL8188E_SUPPORT == 1)
+	#define	PHYDM_PRIMARY_CCA			1
+	#else
+	#define	PHYDM_PRIMARY_CCA			0
+	#endif
+
+	#define	CONFIG_PSD_TOOL						0
+	/*phydm debyg report & tools*/
+	#if defined(CONFIG_DISABLE_PHYDM_DEBUG_FUNCTION)
+		#define CONFIG_PHYDM_DEBUG_FUNCTION		0
+	#else
+		#define CONFIG_PHYDM_DEBUG_FUNCTION		1
+	#endif
+
+	#if (RTL8822B_SUPPORT == 1)
 		#define	CONFIG_DYNAMIC_RX_PATH	0
 	#else
 		#define	CONFIG_DYNAMIC_RX_PATH	0
 	#endif
 
-	#define SUPPORTABLITY_PHYDMLIZE	0
+	#define PHYDM_SUPPORT_CCKPD		1
 	#define RA_MASK_PHYDMLIZE_AP	1
 
 	/* #define CONFIG_RA_DBG_CMD*/
@@ -84,6 +133,7 @@
 	#if defined(CONFIG_RTL_8881A_ANT_SWITCH) || defined(CONFIG_SLOT_0_ANT_SWITCH) || defined(CONFIG_SLOT_1_ANT_SWITCH)
 		#define CONFIG_PHYDM_ANTENNA_DIVERSITY
 		#define ODM_EVM_ENHANCE_ANTDIV
+		#define SKIP_EVM_ANTDIV_TRAINING_PATCH	1
 
 		/*----------*/
 
@@ -119,12 +169,34 @@
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 
 	#if (RTL8822B_SUPPORT == 1)
+	#define PHYDM_TXA_CALIBRATION			1
+	#else
+	#define PHYDM_TXA_CALIBRATION			0
+	#endif
+
+	#if (RTL8192E_SUPPORT == 1)
+	#define	PHYDM_PRIMARY_CCA			1
+	#else
+	#define	PHYDM_PRIMARY_CCA			0
+	#endif
+
+	#if (RTL8188F_SUPPORT == 1 || RTL8710B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
+	#define	PHYDM_DC_CANCELLATION			1
+	#else
+	#define	PHYDM_DC_CANCELLATION			0
+	#endif
+
+	#define	CONFIG_PSD_TOOL					1
+	/*phydm debyg report & tools*/
+	#define CONFIG_PHYDM_DEBUG_FUNCTION		1
+
+	#if (RTL8822B_SUPPORT == 1)
 		#define	CONFIG_DYNAMIC_RX_PATH	0
 	#else
 		#define	CONFIG_DYNAMIC_RX_PATH	0
 	#endif
 
-	#define SUPPORTABLITY_PHYDMLIZE	1
+	#define PHYDM_SUPPORT_CCKPD		1
 	#define RA_MASK_PHYDMLIZE_CE	1
 
 	/*Antenna Diversity*/
@@ -140,6 +212,10 @@
 			#if (RTL8821A_SUPPORT == 1)
 				/*#define CONFIG_HL_SMART_ANTENNA_TYPE1*/
 			#endif
+
+			#if (RTL8822B_SUPPORT == 1)
+				/*#define CONFIG_HL_SMART_ANTENNA_TYPE2*/
+			#endif
 		#endif
 	#endif
 
@@ -147,6 +223,9 @@
 		#define CONFIG_PHYDM_DFS_MASTER
 	#endif
 
+	#if (RTL8188E_SUPPORT == 1 || RTL8192E_SUPPORT == 1)
+		#define	CONFIG_RECEIVER_BLOCKING
+	#endif
 	/*#define CONFIG_RA_DBG_CMD*/
 	#define	CONFIG_RA_FW_DBG_CODE	0
 	/*#define CONFIG_ANT_DETECTION*/
@@ -163,4 +242,10 @@
 #endif
 
 
+	/*20170103 YuChen add for FW API*/
+	#define PHYDM_FW_API_ENABLE_8822B			1
+	#define PHYDM_FW_API_FUNC_ENABLE_8822B		1
+	#define PHYDM_FW_API_ENABLE_8821C			1
+	#define PHYDM_FW_API_FUNC_ENABLE_8821C		1
+
 #endif
diff --git a/rtl8822BU/hal/phydm/phydm_hwconfig.c b/rtl8822BU/hal/phydm/phydm_hwconfig.c
index a913b41..1aa3a94 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_hwconfig.c
+++ b/rtl8822BU/hal/phydm/phydm_hwconfig.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 /* ************************************************************
  * include files
@@ -64,6 +59,137 @@
 	#define GET_VERSION(ic, txt) GET_VERSION_MP(ic, txt)
 #endif
 
+void
+phydm_rx_statistic_cal(
+	struct PHY_DM_STRUCT				*p_phydm,
+	u8									*p_phy_status,
+	struct _odm_per_pkt_info_				*p_pktinfo
+)
+{
+#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
+	struct _phy_status_rpt_jaguar2_type1	*p_phy_sta_rpt = (struct _phy_status_rpt_jaguar2_type1 *)p_phy_status;
+#endif
+	u8									date_rate = (p_pktinfo->data_rate & 0x7f);
+
+	if (date_rate <= ODM_RATE54M) {
+		
+		p_phydm->phy_dbg_info.num_qry_legacy_pkt[date_rate]++;
+		/**/	
+	} else if (date_rate <= ODM_RATEMCS31) {
+		
+		p_phydm->phy_dbg_info.num_qry_ht_pkt[date_rate - ODM_RATEMCS0]++;
+		p_phydm->phy_dbg_info.ht_pkt_not_zero = true;
+			
+	} 
+	#if ODM_IC_11AC_SERIES_SUPPORT
+	else if (date_rate <= ODM_RATEVHTSS4MCS9) {
+
+		#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
+		if ((p_phy_sta_rpt->gid != 0) && (p_phy_sta_rpt->gid != 63) && (p_phydm->support_ic_type & ODM_IC_PHY_STATUE_NEW_TYPE)) {
+
+			p_phydm->phy_dbg_info.num_qry_mu_vht_pkt[date_rate - ODM_RATEVHTSS1MCS0]++;
+			p_phydm->phy_dbg_info.num_of_ppdu[p_pktinfo->ppdu_cnt] = date_rate | BIT(7);
+			p_phydm->phy_dbg_info.gid_num[p_pktinfo->ppdu_cnt] = p_phy_sta_rpt->gid;
+			
+		} else 
+		#endif
+		{
+			p_phydm->phy_dbg_info.num_qry_vht_pkt[date_rate - ODM_RATEVHTSS1MCS0]++;
+			p_phydm->phy_dbg_info.vht_pkt_not_zero = true;
+			#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
+			p_phydm->phy_dbg_info.num_of_ppdu[p_pktinfo->ppdu_cnt] = date_rate;
+			p_phydm->phy_dbg_info.gid_num[p_pktinfo->ppdu_cnt] = p_phy_sta_rpt->gid;
+			#endif
+		}
+	}
+	#endif
+}
+
+void
+phydm_reset_avg_rssi_for_ss(
+	struct PHY_DM_STRUCT	*p_dm_odm
+)
+{
+	p_dm_odm->phy_dbg_info.rssi_cck_sum = 0;
+	p_dm_odm->phy_dbg_info.rssi_cck_cnt = 0;
+
+	p_dm_odm->phy_dbg_info.rssi_ofdm_sum = 0;
+	p_dm_odm->phy_dbg_info.rssi_ofdm_cnt = 0;
+
+	p_dm_odm->phy_dbg_info.rssi_1ss_sum = 0;
+	p_dm_odm->phy_dbg_info.rssi_1ss_cnt = 0;
+
+	p_dm_odm->phy_dbg_info.rssi_2ss_sum[0] = 0;
+	p_dm_odm->phy_dbg_info.rssi_2ss_sum[1] = 0;
+	p_dm_odm->phy_dbg_info.rssi_2ss_cnt = 0;
+
+	p_dm_odm->phy_dbg_info.rssi_3ss_sum[0] = 0;
+	p_dm_odm->phy_dbg_info.rssi_3ss_sum[1] = 0;
+	p_dm_odm->phy_dbg_info.rssi_3ss_sum[2] = 0;
+	p_dm_odm->phy_dbg_info.rssi_3ss_cnt = 0;
+
+	p_dm_odm->phy_dbg_info.rssi_4ss_sum[0] = 0;
+	p_dm_odm->phy_dbg_info.rssi_4ss_sum[1] = 0;
+	p_dm_odm->phy_dbg_info.rssi_4ss_sum[2] = 0;
+	p_dm_odm->phy_dbg_info.rssi_4ss_sum[3] = 0;
+	p_dm_odm->phy_dbg_info.rssi_4ss_cnt = 0;
+
+}
+
+void
+phydm_avg_rssi_for_ss(
+	struct PHY_DM_STRUCT			*p_dm_odm,
+	struct _odm_phy_status_info_		*p_phy_info,
+	struct _odm_per_pkt_info_			*p_pktinfo
+)
+{
+	u8	rate_ss = phydm_rate_to_num_ss(p_dm_odm, p_pktinfo->data_rate);
+	
+	if (p_pktinfo->data_rate <= ODM_RATE11M) {
+		p_dm_odm->phy_dbg_info.rssi_cck_sum += p_phy_info->rx_mimo_signal_strength[0];
+		p_dm_odm->phy_dbg_info.rssi_cck_cnt++;
+	} else if (p_pktinfo->data_rate <= ODM_RATE54M) {
+		p_dm_odm->phy_dbg_info.rssi_ofdm_sum += p_phy_info->rx_mimo_signal_strength[0];
+		p_dm_odm->phy_dbg_info.rssi_ofdm_cnt++;
+	} else if (rate_ss == 1) {
+		p_dm_odm->phy_dbg_info.rssi_1ss_sum += p_phy_info->rx_mimo_signal_strength[0];
+		p_dm_odm->phy_dbg_info.rssi_1ss_cnt++;
+	} else if (rate_ss == 2) {
+		p_dm_odm->phy_dbg_info.rssi_2ss_sum[0] += p_phy_info->rx_mimo_signal_strength[0];
+		p_dm_odm->phy_dbg_info.rssi_2ss_sum[1] += p_phy_info->rx_mimo_signal_strength[1];
+		p_dm_odm->phy_dbg_info.rssi_2ss_cnt++;
+	} else if (rate_ss == 3) {
+		p_dm_odm->phy_dbg_info.rssi_3ss_sum[0] += p_phy_info->rx_mimo_signal_strength[0];
+		p_dm_odm->phy_dbg_info.rssi_3ss_sum[1] += p_phy_info->rx_mimo_signal_strength[1];
+		p_dm_odm->phy_dbg_info.rssi_3ss_sum[2] += p_phy_info->rx_mimo_signal_strength[2];
+		p_dm_odm->phy_dbg_info.rssi_3ss_cnt++;
+	} else if (rate_ss == 4) {
+		p_dm_odm->phy_dbg_info.rssi_4ss_sum[0] += p_phy_info->rx_mimo_signal_strength[0];
+		p_dm_odm->phy_dbg_info.rssi_4ss_sum[1] += p_phy_info->rx_mimo_signal_strength[1];
+		p_dm_odm->phy_dbg_info.rssi_4ss_sum[2] += p_phy_info->rx_mimo_signal_strength[2];
+		p_dm_odm->phy_dbg_info.rssi_4ss_sum[3] += p_phy_info->rx_mimo_signal_strength[3];
+		p_dm_odm->phy_dbg_info.rssi_4ss_cnt++;
+	}
+}
+
+u8 phydm_get_signal_quality(struct _odm_phy_status_info_ *p_phy_info,struct PHY_DM_STRUCT *p_dm_odm, struct _phy_status_rpt_8192cd *p_phy_sta_rpt)
+{
+	u8 SQ_rpt;
+	if (p_phy_info->rx_pwdb_all > 40 && !p_dm_odm->is_in_hct_test)
+		return 100;
+	else {
+		SQ_rpt = p_phy_sta_rpt->cck_sig_qual_ofdm_pwdb_all;
+
+		if (SQ_rpt > 64)
+			return 0;
+		else if (SQ_rpt < 20)
+			return 100;
+		else
+			return ((64 - SQ_rpt) * 100) / 44;
+
+	}
+}
+
 u8
 odm_query_rx_pwr_percentage(
 	s8		ant_power
@@ -334,6 +460,7 @@ static u8 odm_sq_process_patch_rt_cid_819x_lenovo(
 	return SQ;
 }
 
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 static u8 odm_sq_process_patch_rt_cid_819x_acer(
 	struct PHY_DM_STRUCT	*p_dm_odm,
 	u8		is_cck_rate,
@@ -413,6 +540,7 @@ static u8 odm_sq_process_patch_rt_cid_819x_acer(
 #endif
 	return SQ;
 }
+#endif
 
 static u8
 odm_evm_db_to_percentage(
@@ -637,21 +765,21 @@ odm_rx_phy_status92c_series_parsing(
 	struct _odm_per_pkt_info_			*p_pktinfo
 )
 {
-	struct _sw_antenna_switch_				*p_dm_swat_table = &p_dm_odm->dm_swat_table;
 	u8				i, max_spatial_stream;
 	s8				rx_pwr[4], rx_pwr_all = 0;
 	u8				EVM, PWDB_ALL = 0, PWDB_ALL_BT;
 	u8				RSSI, total_rssi = 0;
-	bool				is_cck_rate = false;
+	boolean				is_cck_rate = false;
 	u8				rf_rx_num = 0;
-	u8				cck_highpwr = 0;
 	u8				LNA_idx = 0;
 	u8				VGA_idx = 0;
 	u8				cck_agc_rpt;
 	u8				num_ss;
+	u8				stream_rxevm_tmp = 0;
 	struct _phy_status_rpt_8192cd *p_phy_sta_rpt = (struct _phy_status_rpt_8192cd *)p_phy_status;
 
 	is_cck_rate = (p_pktinfo->data_rate <= ODM_RATE11M) ? true : false;
+	p_dm_odm->rate_ss = phydm_rate_to_num_ss(p_dm_odm, p_pktinfo->data_rate);
 
 	if (p_pktinfo->is_to_self)
 		p_dm_odm->curr_station_id = p_pktinfo->station_id;
@@ -742,30 +870,17 @@ odm_rx_phy_status92c_series_parsing(
 		/*  */
 		/* if(p_pktinfo->is_packet_match_bssid) */
 		{
-			u8	SQ, SQ_rpt;
-
+			u8	SQ;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 			if ((p_dm_odm->support_platform == ODM_WIN) &&
-			    (p_dm_odm->patch_id == RT_CID_819X_LENOVO))
+				(p_dm_odm->patch_id == RT_CID_819X_LENOVO))
 				SQ = odm_sq_process_patch_rt_cid_819x_lenovo(p_dm_odm, is_cck_rate, PWDB_ALL, 0, 0);
 			else if ((p_dm_odm->support_platform == ODM_WIN) &&
 				 (p_dm_odm->patch_id == RT_CID_819X_ACER))
 				SQ = odm_sq_process_patch_rt_cid_819x_acer(p_dm_odm, is_cck_rate, PWDB_ALL, 0, 0);
 			else
 #endif
-				if (p_phy_info->rx_pwdb_all > 40 && !p_dm_odm->is_in_hct_test)
-					SQ = 100;
-				else {
-					SQ_rpt = p_phy_sta_rpt->cck_sig_qual_ofdm_pwdb_all;
-
-					if (SQ_rpt > 64)
-						SQ = 0;
-					else if (SQ_rpt < 20)
-						SQ = 100;
-					else
-						SQ = ((64 - SQ_rpt) * 100) / 44;
-
-				}
+				SQ = phydm_get_signal_quality(p_phy_info, p_dm_odm, p_phy_sta_rpt);
 
 			/* dbg_print("cck SQ = %d\n", SQ); */
 			p_phy_info->signal_quality = SQ;
@@ -869,13 +984,24 @@ odm_rx_phy_status92c_series_parsing(
 				EVM = odm_evm_db_to_percentage((p_phy_sta_rpt->stream_rxevm[i]));	/* dbm */
 
 				/* GET_RX_STATUS_DESC_RX_MCS(p_desc), p_drv_info->rxevm[i], "%", EVM)); */
-
+#if 0
 				/* if(p_pktinfo->is_packet_match_bssid) */
 				{
+#endif
 					if (i == ODM_RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */
 						p_phy_info->signal_quality = (u8)(EVM & 0xff);
 					p_phy_info->rx_mimo_signal_quality[i] = (u8)(EVM & 0xff);
+
+					if (p_phy_sta_rpt->stream_rxevm[i] < 0)
+						stream_rxevm_tmp = (u8)(0 - (p_phy_sta_rpt->stream_rxevm[i]));
+
+					if (stream_rxevm_tmp == 64)
+						stream_rxevm_tmp = 0;
+
+					p_phy_info->rx_mimo_evm_dbm[i] = stream_rxevm_tmp;
+#if 0
 				}
+#endif
 			}
 		}
 
@@ -889,7 +1015,7 @@ odm_rx_phy_status92c_series_parsing(
 	if (is_cck_rate) {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 		/* 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ */
-		p_phy_info->signal_strength = signal_scale_proc(p_dm_odm->adapter, PWDB_ALL, true, true);
+		p_phy_info->signal_strength = SignalScaleProc(p_dm_odm->adapter, PWDB_ALL, true, true);
 #else
 		p_phy_info->signal_strength = (u8)(odm_signal_scale_mapping(p_dm_odm, PWDB_ALL));/*PWDB_ALL;*/
 #endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
@@ -897,7 +1023,7 @@ odm_rx_phy_status92c_series_parsing(
 		if (rf_rx_num != 0) {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 			/* 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ */
-			p_phy_info->signal_strength = signal_scale_proc(p_dm_odm->adapter, (total_rssi /= rf_rx_num), true, false);
+			p_phy_info->signal_strength = SignalScaleProc(p_dm_odm->adapter, (total_rssi /= rf_rx_num), true, false);
 #else
 			p_phy_info->signal_strength = (u8)(odm_signal_scale_mapping(p_dm_odm, total_rssi /= rf_rx_num));
 #endif
@@ -915,6 +1041,12 @@ odm_rx_phy_status92c_series_parsing(
 	p_dm_odm->dm_fat_table.antsel_rx_keep_1 = p_phy_sta_rpt->ant_sel_b;
 	p_dm_odm->dm_fat_table.antsel_rx_keep_2 = p_phy_sta_rpt->antsel_rx_keep_2;
 #endif
+
+	if (p_pktinfo->is_packet_match_bssid) {
+		phydm_avg_rssi_for_ss(p_dm_odm, p_phy_info, p_pktinfo);
+		phydm_rx_statistic_cal(p_dm_odm, p_phy_status, p_pktinfo);
+	}
+
 }
 #endif
 
@@ -957,10 +1089,10 @@ odm_rx_phy_bw_jaguar_series_parsing(
 
 void
 odm_rx_phy_status_jaguar_series_parsing(
-	struct PHY_DM_STRUCT					*p_dm_odm,
-	struct _odm_phy_status_info_			*p_phy_info,
-	u8						*p_phy_status,
-	struct _odm_per_pkt_info_			*p_pktinfo
+	struct PHY_DM_STRUCT		*p_dm_odm,
+	struct _odm_phy_status_info_	*p_phy_info,
+	u8							*p_phy_status,
+	struct _odm_per_pkt_info_		*p_pktinfo
 )
 {
 	u8					i, max_spatial_stream;
@@ -977,10 +1109,8 @@ odm_rx_phy_status_jaguar_series_parsing(
 
 	odm_rx_phy_bw_jaguar_series_parsing(p_phy_info, p_pktinfo, p_phy_sta_rpt);
 
-	if (p_pktinfo->data_rate <= ODM_RATE11M)
-		is_cck_rate = true;
-	else
-		is_cck_rate = false;
+	is_cck_rate = (p_pktinfo->data_rate <= ODM_RATE11M) ? true : false;
+	p_dm_odm->rate_ss = phydm_rate_to_num_ss(p_dm_odm, p_pktinfo->data_rate);
 
 	if (p_pktinfo->is_to_self)
 		p_dm_odm->curr_station_id = p_pktinfo->station_id;
@@ -1174,9 +1304,13 @@ odm_rx_phy_status_jaguar_series_parsing(
 			/* continue; */
 			/*2012.05.25 LukeLee: Testchip AGC report is wrong, it should be restored back to old formula in MP chip*/
 			/* if((p_dm_odm->support_ic_type & (ODM_RTL8812|ODM_RTL8821)) && (!p_dm_odm->is_mp_chip)) */
-			if (i < ODM_RF_PATH_C)
+			if (i < ODM_RF_PATH_C) {
 				rx_pwr[i] = (p_phy_sta_rpt->gain_trsw[i] & 0x7F) - 110;
-			else
+
+				if (p_pktinfo->is_to_self) 
+					p_dm_odm->ofdm_agc_idx[i] = p_phy_sta_rpt->gain_trsw[i];
+				
+			} else
 				rx_pwr[i] = (p_phy_sta_rpt->gain_trsw_cd[i - 2] & 0x7F) - 110;
 			/* else */
 			/*rx_pwr[i] = ((p_phy_sta_rpt->gain_trsw[i]& 0x3F)*2) - 110;  OLD FORMULA*/
@@ -1328,7 +1462,7 @@ odm_rx_phy_status_jaguar_series_parsing(
 	if (is_cck_rate) {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 		/*2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/*/
-		p_phy_info->signal_strength = signal_scale_proc(p_dm_odm->adapter, PWDB_ALL, false, true);
+		p_phy_info->signal_strength = SignalScaleProc(p_dm_odm->adapter, PWDB_ALL, false, true);
 #else
 		p_phy_info->signal_strength = (u8)(odm_signal_scale_mapping(p_dm_odm, PWDB_ALL));/*PWDB_ALL;*/
 #endif
@@ -1341,7 +1475,7 @@ odm_rx_phy_status_jaguar_series_parsing(
 				avg_rssi = (best_rssi + second_rssi) / 2;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 			/* 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/*/
-			p_phy_info->signal_strength = signal_scale_proc(p_dm_odm->adapter, avg_rssi, false, false);
+			p_phy_info->signal_strength = SignalScaleProc(p_dm_odm->adapter, avg_rssi, false, false);
 #else
 			p_phy_info->signal_strength = (u8)(odm_signal_scale_mapping(p_dm_odm, avg_rssi));
 #endif
@@ -1354,6 +1488,11 @@ odm_rx_phy_status_jaguar_series_parsing(
 	p_dm_odm->dm_fat_table.antsel_rx_keep_1 = p_phy_sta_rpt->antidx_antb;
 	p_dm_odm->dm_fat_table.antsel_rx_keep_2 = p_phy_sta_rpt->antidx_antc;
 	p_dm_odm->dm_fat_table.antsel_rx_keep_3 = p_phy_sta_rpt->antidx_antd;
+
+	if (p_pktinfo->is_packet_match_bssid) {
+		phydm_avg_rssi_for_ss(p_dm_odm, p_phy_info, p_pktinfo);
+		phydm_rx_statistic_cal(p_dm_odm, p_phy_status, p_pktinfo);
+	}
 	/*ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("StaID[%d]:  antidx_anta = ((%d)), MatchBSSID =  ((%d))\n", p_pktinfo->station_id, p_phy_sta_rpt->antidx_anta, p_pktinfo->is_packet_match_bssid));*/
 
 
@@ -1416,10 +1555,10 @@ phydm_reset_rssi_for_dm(
 
 	/*in WIN Driver: sta_ID==0->p_entry==NULL -> default port HAL_Data*/
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
-	p_entry->is_used = 0;
+	p_entry->bUsed = 0;
 	if (station_id == 0) {
 
-		p_hal_data->undecorated_smoothed_pwdb = -1;
+		p_hal_data->UndecoratedSmoothedPWDB = -1;
 		/**/
 	}
 #endif
@@ -1442,7 +1581,7 @@ odm_process_rssi_for_dm(
 )
 {
 
-	s32			undecorated_smoothed_pwdb, undecorated_smoothed_cck, undecorated_smoothed_ofdm, rssi_ave, cck_pkt;
+	s32			undecorated_smoothed_pwdb, undecorated_smoothed_cck, undecorated_smoothed_ofdm, rssi_ave;
 	u8			i, is_cck_rate = 0;
 	u8			RSSI_max, RSSI_min;
 	u32			weighting = 0;
@@ -1712,8 +1851,10 @@ odm_process_rssi_for_dm(
 					undecorated_smoothed_pwdb, p_entry->rssi_stat.ofdm_pkt, p_entry->rssi_stat.cck_pkt));
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
+#ifndef DM_ODM_CE_MAC80211
 				phydm_ra_rssi_rpt_wk(p_dm_odm);
 #endif
+#endif
 			}
 
 
@@ -1722,7 +1863,7 @@ odm_process_rssi_for_dm(
 
 			if (p_pktinfo->station_id == 0) {
 				/**/
-				p_hal_data->undecorated_smoothed_pwdb = undecorated_smoothed_pwdb;
+				p_hal_data->UndecoratedSmoothedPWDB = undecorated_smoothed_pwdb;
 			}
 #endif
 
@@ -1761,13 +1902,13 @@ odm_phy_status_query_92c_series(
 
 void
 odm_phy_status_query_jaguar_series(
-	struct PHY_DM_STRUCT					*p_dm_odm,
-	struct _odm_phy_status_info_			*p_phy_info,
-	u8						*p_phy_status,
-	struct _odm_per_pkt_info_			*p_pktinfo
+	struct PHY_DM_STRUCT		*p_dm_odm,
+	struct _odm_phy_status_info_	*p_phy_info,
+	u8							*p_phy_status,
+	struct _odm_per_pkt_info_		*p_pktinfo
 )
 {
-	odm_rx_phy_status_jaguar_series_parsing(p_dm_odm, p_phy_info,	p_phy_status, p_pktinfo);
+	odm_rx_phy_status_jaguar_series_parsing(p_dm_odm, p_phy_info, p_phy_status, p_pktinfo);
 	odm_process_rssi_for_dm(p_dm_odm, p_phy_info, p_pktinfo);
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
@@ -1897,28 +2038,28 @@ phydm_normal_driver_rx_sniffer(
 
 void
 odm_phy_status_query(
-	struct PHY_DM_STRUCT					*p_dm_odm,
-	struct _odm_phy_status_info_			*p_phy_info,
-	u8						*p_phy_status,
-	struct _odm_per_pkt_info_			*p_pktinfo
+	struct PHY_DM_STRUCT		*p_dm_odm,
+	struct _odm_phy_status_info_	*p_phy_info,
+	u8							*p_phy_status,
+	struct _odm_per_pkt_info_		*p_pktinfo
 )
 {
-#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
+
 	if (p_dm_odm->support_ic_type & ODM_IC_PHY_STATUE_NEW_TYPE) {
+		#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
 		phydm_rx_phy_status_new_type(p_dm_odm, p_phy_status, p_pktinfo, p_phy_info);
-		return;
+		#endif
 	}
-#endif
 
-#if	ODM_IC_11AC_SERIES_SUPPORT
-	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES)
+	#if	ODM_IC_11AC_SERIES_SUPPORT
+	else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES)
 		odm_phy_status_query_jaguar_series(p_dm_odm, p_phy_info, p_phy_status, p_pktinfo);
-#endif
+	#endif
 
-#if	ODM_IC_11N_SERIES_SUPPORT
-	if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES)
+	#if	ODM_IC_11N_SERIES_SUPPORT
+	else if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES)
 		odm_phy_status_query_92c_series(p_dm_odm, p_phy_info, p_phy_status, p_pktinfo);
-#endif
+	#endif
 }
 
 /* For future use. */
@@ -1927,9 +2068,9 @@ odm_mac_status_query(
 	struct PHY_DM_STRUCT					*p_dm_odm,
 	u8						*p_mac_status,
 	u8						mac_id,
-	bool						is_packet_match_bssid,
-	bool						is_packet_to_self,
-	bool						is_packet_beacon
+	boolean						is_packet_match_bssid,
+	boolean						is_packet_to_self,
+	boolean						is_packet_beacon
 )
 {
 	/* 2011/10/19 Driver team will handle in the future. */
@@ -1951,13 +2092,14 @@ odm_config_rf_with_header_file(
 {
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	PMGNT_INFO		p_mgnt_info = &(adapter->mgnt_info);
+	PMGNT_INFO		p_mgnt_info = &(adapter->MgntInfo);
 #endif
+	enum hal_status	result = HAL_STATUS_SUCCESS;
 
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD,
 		("===>odm_config_rf_with_header_file (%s)\n", (p_dm_odm->is_mp_chip) ? "MPChip" : "TestChip"));
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD,
-		("p_dm_odm->support_platform: 0x%X, p_dm_odm->support_interface: 0x%X, p_dm_odm->board_type: 0x%X\n",
+		("support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
 		p_dm_odm->support_platform, p_dm_odm->support_interface, p_dm_odm->board_type));
 
 	/* 1 AP doesn't use PHYDM power tracking table in these ICs */
@@ -1995,9 +2137,9 @@ odm_config_rf_with_header_file(
 					READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8811a_u_ipa);
 			} else {
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-				if (p_mgnt_info->customer_id == RT_CID_8821AE_ASUS_MB)
+				if (p_mgnt_info->CustomerID == RT_CID_8821AE_ASUS_MB)
 					READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a_sar_8mm);
-				else if (p_mgnt_info->customer_id == RT_CID_ASUS_NB)
+				else if (p_mgnt_info->CustomerID == RT_CID_ASUS_NB)
 					READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a_sar_5mm);
 				else
 #endif
@@ -2036,6 +2178,17 @@ odm_config_rf_with_header_file(
 			READ_AND_CONFIG_MP(8723d, _txpwr_lmt);
 	}
 #endif
+/* JJ ADD 20161014 */
+#if (RTL8710B_SUPPORT == 1)
+	if (p_dm_odm->support_ic_type == ODM_RTL8710B) {
+		if (config_type == CONFIG_RF_RADIO) {
+			if (e_rf_path == ODM_RF_PATH_A)
+				READ_AND_CONFIG_MP(8710b, _radioa);
+		} else if (config_type == CONFIG_RF_TXPWR_LMT)
+			READ_AND_CONFIG_MP(8710b, _txpwr_lmt);
+	}
+#endif
+
 #endif/* (DM_ODM_SUPPORT_TYPE !=  ODM_AP) */
 
 	/* 1 All platforms support */
@@ -2069,7 +2222,7 @@ odm_config_rf_with_header_file(
 				READ_AND_CONFIG_MP(8814a, _radiod);
 		} else if (config_type == CONFIG_RF_TXPWR_LMT) {
 			if (p_dm_odm->rfe_type == 0) 
-				READ_AND_CONFIG_MP(8814a,_txpwr_lmt);
+				READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type0);
 			else if (p_dm_odm->rfe_type == 1)
 				READ_AND_CONFIG_MP(8814a,_txpwr_lmt_type1);				
 			else if (p_dm_odm->rfe_type == 2)
@@ -2109,6 +2262,11 @@ odm_config_rf_with_header_file(
 				READ_AND_CONFIG_MP(8822b, _radioa);
 			else if (e_rf_path == ODM_RF_PATH_B)
 				READ_AND_CONFIG_MP(8822b, _radiob);
+		} else if (config_type == CONFIG_RF_TXPWR_LMT) {
+			if (p_dm_odm->rfe_type == 5)
+				READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type5);
+			else
+				READ_AND_CONFIG_MP(8822b, _txpwr_lmt);
 		}
 	}
 #endif
@@ -2134,7 +2292,22 @@ odm_config_rf_with_header_file(
 	}
 #endif
 
-	return HAL_STATUS_SUCCESS;
+	if (config_type == CONFIG_RF_RADIO) {
+		if (p_dm_odm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
+
+			result = phydm_set_reg_by_fw(p_dm_odm,
+							PHYDM_HALMAC_CMD_END,
+							0,
+							0,
+							0,
+							0,
+							0);
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD,
+				("rf param offload end!result = %d", result));
+		}
+	}
+
+	return result;
 }
 
 enum hal_status
@@ -2196,6 +2369,20 @@ odm_config_rf_with_tx_pwr_track_header_file(
 		READ_AND_CONFIG_MP(8723d, _txxtaltrack);
 	}
 #endif
+/* JJ ADD 20161014 */
+#if RTL8710B_SUPPORT
+	if (p_dm_odm->support_ic_type == ODM_RTL8710B) {
+		if (p_dm_odm->support_interface == ODM_ITRF_PCIE)
+			READ_AND_CONFIG_MP(8710b, _txpowertrack_pcie);
+		else if (p_dm_odm->support_interface == ODM_ITRF_USB)
+			READ_AND_CONFIG_MP(8710b, _txpowertrack_usb);
+		else if (p_dm_odm->support_interface == ODM_ITRF_SDIO)
+			READ_AND_CONFIG_MP(8710b, _txpowertrack_sdio);
+
+		READ_AND_CONFIG_MP(8710b, _txxtaltrack);
+	}
+#endif
+
 #if RTL8188E_SUPPORT
 	if (p_dm_odm->support_ic_type == ODM_RTL8188E) {
 		if (odm_get_mac_reg(p_dm_odm, 0xF0, 0xF000) >= 8) {		/*if 0xF0[15:12] >= 8, SMIC*/
@@ -2269,12 +2456,26 @@ odm_config_rf_with_tx_pwr_track_header_file(
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type0);
 		else if (p_dm_odm->rfe_type == 1)
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type1);
+		else if (p_dm_odm->rfe_type == 2)
+			READ_AND_CONFIG_MP(8822b, _txpowertrack_type2);
 		else if ((p_dm_odm->rfe_type == 3) || (p_dm_odm->rfe_type == 5))
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type3_type5);
+		else if (p_dm_odm->rfe_type == 4)
+			READ_AND_CONFIG_MP(8822b, _txpowertrack_type4);
 		else if (p_dm_odm->rfe_type == 6)
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type6);
 		else if (p_dm_odm->rfe_type == 7)
 			READ_AND_CONFIG_MP(8822b, _txpowertrack_type7);
+		else if (p_dm_odm->rfe_type == 8)
+			READ_AND_CONFIG_MP(8822b, _txpowertrack_type8);
+		else if (p_dm_odm->rfe_type == 9)
+			READ_AND_CONFIG_MP(8822b, _txpowertrack_type9);
+		else if (p_dm_odm->rfe_type == 10)
+			READ_AND_CONFIG_MP(8822b, _txpowertrack_type10);
+		else if (p_dm_odm->rfe_type == 11)
+			READ_AND_CONFIG_MP(8822b, _txpowertrack_type11);
+		else if (p_dm_odm->rfe_type == 12)
+			READ_AND_CONFIG_MP(8822b, _txpowertrack_type12);
 		else
 			READ_AND_CONFIG_MP(8822b, _txpowertrack);
 	}
@@ -2307,8 +2508,9 @@ odm_config_bb_with_header_file(
 {
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	PMGNT_INFO		p_mgnt_info = &(adapter->mgnt_info);
+	PMGNT_INFO		p_mgnt_info = &(adapter->MgntInfo);
 #endif
+	enum hal_status	result = HAL_STATUS_SUCCESS;
 
 	/* 1 AP doesn't use PHYDM initialization in these ICs */
 #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
@@ -2322,14 +2524,14 @@ odm_config_bb_with_header_file(
 			if (p_dm_odm->rfe_type == 3 && p_dm_odm->is_mp_chip)
 				READ_AND_CONFIG_MP(8812a, _phy_reg_pg_asus);
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-			else if (p_mgnt_info->customer_id == RT_CID_WNC_NEC && p_dm_odm->is_mp_chip)
+			else if (p_mgnt_info->CustomerID == RT_CID_WNC_NEC && p_dm_odm->is_mp_chip)
 				READ_AND_CONFIG_MP(8812a, _phy_reg_pg_nec);
 #if RT_PLATFORM == PLATFORM_MACOSX
 			/*{1827}{1024} for BUFFALO power by rate table. Isaiah 2013-11-29*/
-			else if (p_mgnt_info->customer_id == RT_CID_DNI_BUFFALO)
+			else if (p_mgnt_info->CustomerID == RT_CID_DNI_BUFFALO)
 				READ_AND_CONFIG_MP(8812a, _phy_reg_pg_dni);
 			/* TP-Link T4UH, Isaiah 2015-03-16*/
-			else if (p_mgnt_info->customer_id == RT_CID_TPLINK_HPWR) {
+			else if (p_mgnt_info->CustomerID == RT_CID_TPLINK_HPWR) {
 				dbg_print("RT_CID_TPLINK_HPWR:: _PHY_REG_PG_TPLINK\n");
 				READ_AND_CONFIG_MP(8812a, _phy_reg_pg_tplink);
 			}
@@ -2340,13 +2542,13 @@ odm_config_bb_with_header_file(
 		} else if (config_type == CONFIG_BB_PHY_REG_MP)
 			READ_AND_CONFIG_MP(8812a, _phy_reg_mp);
 		else if (config_type == CONFIG_BB_AGC_TAB_DIFF) {
+			p_dm_odm->fw_offload_ability &= ~PHYDM_PHY_PARAM_OFFLOAD;
+			/*AGC_TAB DIFF dont support FW offload*/
 			if ((36 <= *p_dm_odm->p_channel)  && (*p_dm_odm->p_channel  <= 64))
 				AGC_DIFF_CONFIG_MP(8812a, lb);
 			else if (100 <= *p_dm_odm->p_channel)
 				AGC_DIFF_CONFIG_MP(8812a, hb);
 		}
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8812AGCTABArray\n"));
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8812PHY_REGArray\n"));
 	}
 #endif
 #if (RTL8821A_SUPPORT == 1)
@@ -2366,7 +2568,7 @@ odm_config_bb_with_header_file(
 #endif
 #if (RT_PLATFORM == PLATFORM_MACOSX)
 				/*{1827}{1022} for BUFFALO power by rate table. Isaiah 2013-10-18*/
-				if (p_mgnt_info->customer_id == RT_CID_DNI_BUFFALO) {
+				if (p_mgnt_info->CustomerID == RT_CID_DNI_BUFFALO) {
 					/*{1024} for BUFFALO power by rate table. (JP/US)*/
 					if (p_mgnt_info->channel_plan == RT_CHANNEL_DOMAIN_US_2G_CANADA_5G)
 						READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_us);
@@ -2377,8 +2579,6 @@ odm_config_bb_with_header_file(
 #endif
 					READ_AND_CONFIG_MP(8821a, _phy_reg_pg);
 		}
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8821AGCTABArray\n"));
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8821PHY_REGArray\n"));
 	}
 #endif
 #if (RTL8192E_SUPPORT == 1)
@@ -2401,6 +2601,18 @@ odm_config_bb_with_header_file(
 			READ_AND_CONFIG_MP(8723d, _phy_reg_pg);
 	}
 #endif
+/* JJ ADD 20161014 */
+#if (RTL8710B_SUPPORT == 1)
+	if (p_dm_odm->support_ic_type == ODM_RTL8710B) {
+		if (config_type == CONFIG_BB_PHY_REG)
+			READ_AND_CONFIG_MP(8710b, _phy_reg);
+		else if (config_type == CONFIG_BB_AGC_TAB)
+			READ_AND_CONFIG_MP(8710b, _agc_tab);
+		else if (config_type == CONFIG_BB_PHY_REG_PG)
+			READ_AND_CONFIG_MP(8710b, _phy_reg_pg);
+	}
+#endif
+
 #endif/* (DM_ODM_SUPPORT_TYPE !=  ODM_AP) */
 
 
@@ -2433,7 +2645,7 @@ odm_config_bb_with_header_file(
 			READ_AND_CONFIG_MP(8814a, _agc_tab);
 		else if (config_type == CONFIG_BB_PHY_REG_PG) {
 			if (p_dm_odm->rfe_type == 0) 
-				READ_AND_CONFIG_MP(8814a,_phy_reg_pg);
+				READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type0);
 			else if (p_dm_odm->rfe_type == 2)
 				READ_AND_CONFIG_MP(8814a,_phy_reg_pg_type2);				
 			else if (p_dm_odm->rfe_type == 3)
@@ -2479,8 +2691,6 @@ odm_config_bb_with_header_file(
 			READ_AND_CONFIG_MP(8822b, _agc_tab);
 		else if (config_type == CONFIG_BB_PHY_REG_PG)
 			READ_AND_CONFIG_MP(8822b, _phy_reg_pg);
-		/*else if (config_type == CONFIG_BB_PHY_REG_MP)*/
-		/*READ_AND_CONFIG_MP(8822b, _phy_reg_mp);*/
 	}
 #endif
 
@@ -2492,10 +2702,6 @@ odm_config_bb_with_header_file(
 				phydm_phypara_a_cut(p_dm_odm);
 		} else if (config_type == CONFIG_BB_AGC_TAB)
 			READ_AND_CONFIG_MP(8197f, _agc_tab);
-		/*		else if(config_type == CONFIG_BB_PHY_REG_PG)
-					READ_AND_CONFIG_MP(8197f, _phy_reg_pg);
-				else if(config_type == CONFIG_BB_PHY_REG_MP)
-					READ_AND_CONFIG_MP(8197f, _phy_reg_mp); */
 	}
 #endif
 
@@ -2506,10 +2712,18 @@ odm_config_bb_with_header_file(
 		else if (config_type == CONFIG_BB_AGC_TAB) {
 			READ_AND_CONFIG(8821c, _agc_tab);
 			/* According to RFEtype, choosing correct AGC table*/
-			if (p_dm_odm->rfe_type == 2 || p_dm_odm->rfe_type == 4 || p_dm_odm->rfe_type == 7)
+			if (p_dm_odm->default_rf_set_8821c == SWITCH_TO_BTG)
 				AGC_DIFF_CONFIG_MP(8821c, btg);
 		} else if (config_type == CONFIG_BB_PHY_REG_PG)
 			READ_AND_CONFIG(8821c, _phy_reg_pg);
+		else if (config_type == CONFIG_BB_AGC_TAB_DIFF) {
+			p_dm_odm->fw_offload_ability &= ~PHYDM_PHY_PARAM_OFFLOAD;
+			/*AGC_TAB DIFF dont support FW offload*/
+			if (p_dm_odm->current_rf_set_8821c == SWITCH_TO_BTG)
+				AGC_DIFF_CONFIG_MP(8821c, btg);
+			else if (p_dm_odm->current_rf_set_8821c == SWITCH_TO_WLG)
+				AGC_DIFF_CONFIG_MP(8821c, wlg);
+		}
 	}
 #endif
 
@@ -2524,7 +2738,21 @@ odm_config_bb_with_header_file(
 	}
 #endif
 
-	return HAL_STATUS_SUCCESS;
+	if (config_type == CONFIG_BB_PHY_REG || config_type == CONFIG_BB_AGC_TAB)
+		if (p_dm_odm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
+
+			result = phydm_set_reg_by_fw(p_dm_odm,
+								PHYDM_HALMAC_CMD_END,
+								0,
+								0,
+								0,
+								0,
+								0);
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD,
+				("phy param offload end!result = %d", result));
+		}
+
+	return result;
 }
 
 enum hal_status
@@ -2532,14 +2760,11 @@ odm_config_mac_with_header_file(
 	struct PHY_DM_STRUCT	*p_dm_odm
 )
 {
-#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-#endif
-
+	enum hal_status	result = HAL_STATUS_SUCCESS;
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD,
 		("===>odm_config_mac_with_header_file (%s)\n", (p_dm_odm->is_mp_chip) ? "MPChip" : "TestChip"));
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD,
-		("p_dm_odm->support_platform: 0x%X, p_dm_odm->support_interface: 0x%X, p_dm_odm->board_type: 0x%X\n",
+		("support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
 		p_dm_odm->support_platform, p_dm_odm->support_interface, p_dm_odm->board_type));
 
 	/* 1 AP doesn't use PHYDM initialization in these ICs */
@@ -2549,11 +2774,8 @@ odm_config_mac_with_header_file(
 		READ_AND_CONFIG_MP(8812a, _mac_reg);
 #endif
 #if (RTL8821A_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type == ODM_RTL8821) {
+	if (p_dm_odm->support_ic_type == ODM_RTL8821)
 		READ_AND_CONFIG_MP(8821a, _mac_reg);
-
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigMACwithHeaderFile\n"));
-	}
 #endif
 #if (RTL8192E_SUPPORT == 1)
 	if (p_dm_odm->support_ic_type == ODM_RTL8192E)
@@ -2563,6 +2785,12 @@ odm_config_mac_with_header_file(
 	if (p_dm_odm->support_ic_type == ODM_RTL8723D)
 		READ_AND_CONFIG_MP(8723d, _mac_reg);
 #endif
+/* JJ ADD 20161014 */
+#if (RTL8710B_SUPPORT == 1)
+	if (p_dm_odm->support_ic_type == ODM_RTL8710B)
+		READ_AND_CONFIG_MP(8710b, _mac_reg);
+#endif
+
 #endif/* (DM_ODM_SUPPORT_TYPE !=  ODM_AP) */
 
 	/* 1 All platforms support */
@@ -2606,7 +2834,20 @@ odm_config_mac_with_header_file(
 		READ_AND_CONFIG_MP(8195a, _mac_reg);
 #endif
 
-	return HAL_STATUS_SUCCESS;
+	if (p_dm_odm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
+
+		result = phydm_set_reg_by_fw(p_dm_odm,
+							PHYDM_HALMAC_CMD_END,
+							0,
+							0,
+							0,
+							0,
+							0);
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD,
+			("mac param offload end!result = %d", result));
+	}
+
+	return result;
 }
 
 enum hal_status
@@ -2714,24 +2955,27 @@ odm_config_fw_with_header_file(
 		}
 	}
 #endif
-	/*#if (RTL8814A_SUPPORT == 1)
-		if (p_dm_odm->support_ic_type == ODM_RTL8814A)
-		{
+/* JJ ADD 20161014 */
+#if (RTL8710B_SUPPORT == 1)
+		if (p_dm_odm->support_ic_type == ODM_RTL8710B) {
 			if (config_type == CONFIG_FW_NIC)
-				READ_FIRMWARE_MP(8814a, _fw_nic);
-			else if (config_type == config_fw_wowlan)
-				READ_FIRMWARE_MP(8814a, _fw_wowlan);
-			#ifdef CONFIG_AP_WOWLAN
-			else if (config_type == config_fw_ap_wowlan)
-				READ_FIRMWARE_MP(8814a, _fw_ap);
-			#endif
+				READ_FIRMWARE_MP(8710b, _fw_nic);
+			else if (config_type == CONFIG_FW_WOWLAN) {
+				READ_FIRMWARE_MP(8710b, _fw_wowlan);
+#ifdef CONFIG_AP_WOWLAN
+				else if (config_type == config_fw_ap_wowlan)
+					READ_FIRMWARE_MP(8710b, _fw_ap);
+#endif
+			}
 		}
-	#endif */
+#endif
 
 #if (RTL8814A_SUPPORT == 1)
 	if (p_dm_odm->support_ic_type == ODM_RTL8814A) {
 		if (config_type == CONFIG_FW_NIC)
 			READ_FIRMWARE_MP(8814a, _fw_nic);
+		else if (config_type == CONFIG_FW_WOWLAN)
+			READ_FIRMWARE_MP(8814a, _fw_wowlan);
 #ifdef CONFIG_AP_WOWLAN
 		else if (config_type == config_fw_ap_wowlan)
 			READ_FIRMWARE_MP(8814a, _fw_ap);
@@ -2834,6 +3078,12 @@ odm_get_hw_img_version(
 	if (p_dm_odm->support_ic_type == ODM_RTL8723D)
 		version = GET_VERSION_MP(8723d, _mac_reg);
 #endif
+/* JJ ADD 20161014 */
+#if (RTL8710B_SUPPORT == 1)
+	if (p_dm_odm->support_ic_type == ODM_RTL8710B)
+		version = GET_VERSION_MP(8710b, _mac_reg);
+#endif
+
 #endif /* (DM_ODM_SUPPORT_TYPE != ODM_AP) */
 
 	/*1 All platforms support*/
@@ -2879,6 +3129,33 @@ odm_get_hw_img_version(
 /* For 8822B only!! need to move to FW finally */
 /*==============================================*/
 
+boolean
+phydm_query_is_mu_api(
+	struct PHY_DM_STRUCT					*p_phydm,
+	u8							ppdu_idx,
+	u8							*p_data_rate,
+	u8							*p_gid
+)
+{
+	u8	data_rate = 0, gid = 0;
+	boolean is_mu = false;
+
+	data_rate = p_phydm->phy_dbg_info.num_of_ppdu[ppdu_idx];
+	gid = p_phydm->phy_dbg_info.gid_num[ppdu_idx];
+
+	if (data_rate & BIT(7)) {
+		is_mu = true;
+		data_rate = data_rate & ~(BIT(7));
+	} else
+		is_mu = false;
+
+	*p_data_rate = data_rate;
+	*p_gid = gid;
+
+	return is_mu;
+	
+}
+
 void
 phydm_reset_phy_info(
 	struct PHY_DM_STRUCT					*p_phydm,
@@ -2904,10 +3181,11 @@ phydm_reset_phy_info(
 	p_phy_info->is_beamformed = 0;
 	p_phy_info->rxsc = 0;
 	odm_memory_set(p_phydm, p_phy_info->rx_pwr, -110, 4);
-	odm_memory_set(p_phydm, p_phy_info->rx_mimo_evm_dbm, 0, 4);
+	/*odm_memory_set(p_phydm, p_phy_info->rx_mimo_evm_dbm, 0, 4);*/
 	odm_memory_set(p_phydm, p_phy_info->cfo_short, 0, 8);
 	odm_memory_set(p_phydm, p_phy_info->cfo_tail, 0, 8);
 #endif
+	odm_memory_set(p_phydm, p_phy_info->rx_mimo_evm_dbm, 0, 4);
 }
 
 void
@@ -2917,7 +3195,7 @@ phydm_set_per_path_phy_info(
 	s8							rx_evm,
 	s8							cfo_tail,
 	s8							rx_snr,
-	struct _odm_phy_status_info_				*p_phy_info
+	struct _odm_phy_status_info_	*p_phy_info
 )
 {
 	u8			evm_dbm = 0;
@@ -2930,7 +3208,7 @@ phydm_set_per_path_phy_info(
 		evm_dbm = ((u8)(0 - rx_evm) >> 1);
 
 		/* Calculate EVM in percentage */
-		if (evm_dbm >= 33)
+		if (evm_dbm >= 34)
 			evm_percentage = 100;
 		else
 			evm_percentage = (evm_dbm << 1) + (evm_dbm);
@@ -2939,13 +3217,16 @@ phydm_set_per_path_phy_info(
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 	p_phy_info->rx_pwr[rx_path] = rx_pwr;
-	p_phy_info->rx_mimo_evm_dbm[rx_path] = evm_dbm;
 
 	/* CFO = CFO_tail * 312.5 / 2^7 ~= CFO tail * 39/512 (kHz)*/
 	p_phy_info->cfo_tail[rx_path] = cfo_tail;
 	p_phy_info->cfo_tail[rx_path] = ((p_phy_info->cfo_tail[rx_path] << 5) + (p_phy_info->cfo_tail[rx_path] << 2) +
 		(p_phy_info->cfo_tail[rx_path] << 1) + (p_phy_info->cfo_tail[rx_path])) >> 9;
 #endif
+	if (evm_dbm == 64)
+		evm_dbm = 0; /*if 1SS rate, evm_dbm [2nd stream] =64*/
+	
+	p_phy_info->rx_mimo_evm_dbm[rx_path] = evm_dbm;
 
 	p_phy_info->rx_mimo_signal_strength[rx_path] = odm_query_rx_pwr_percentage(rx_pwr);
 	p_phy_info->rx_mimo_signal_quality[rx_path] = evm_percentage;
@@ -2966,8 +3247,8 @@ void
 phydm_set_common_phy_info(
 	s8							rx_power,
 	u8							channel,
-	bool							is_beamformed,
-	bool							is_mu_packet,
+	boolean							is_beamformed,
+	boolean							is_mu_packet,
 	u8							bandwidth,
 	u8							signal_quality,
 	u8							rxsc,
@@ -2999,23 +3280,46 @@ phydm_set_common_phy_info(
 
 void
 phydm_get_rx_phy_status_type0(
-	struct PHY_DM_STRUCT						*p_dm_odm,
+	struct PHY_DM_STRUCT		*p_dm_odm,
 	u8							*p_phy_status,
-	struct _odm_per_pkt_info_				*p_pktinfo,
-	struct _odm_phy_status_info_				*p_phy_info
+	struct _odm_per_pkt_info_		*p_pktinfo,
+	struct _odm_phy_status_info_	*p_phy_info
 )
 {
 	/* type 0 is used for cck packet */
 
 	struct _phy_status_rpt_jaguar2_type0	*p_phy_sta_rpt = (struct _phy_status_rpt_jaguar2_type0 *)p_phy_status;
-	u8							i, SQ = 0;
+	u8							SQ = 0;
 	s8							rx_power = p_phy_sta_rpt->pwdb - 110;
 
 
-#if (RTL8723D_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type & ODM_RTL8723D)
+	
+	if (p_dm_odm->support_ic_type & ODM_RTL8723D) {
+#if (RTL8723D_SUPPORT == 1)	
 		rx_power = p_phy_sta_rpt->pwdb - 97;
 #endif
+	}
+#if (RTL8710B_SUPPORT == 1)
+	else if (p_dm_odm->support_ic_type & ODM_RTL8710B)
+		rx_power = p_phy_sta_rpt->pwdb - 97;
+#endif
+
+#if (RTL8821C_SUPPORT == 1)
+	else if (p_dm_odm->support_ic_type & ODM_RTL8821C) {
+		if (p_phy_sta_rpt->pwdb >= -57)
+			rx_power = p_phy_sta_rpt->pwdb - 100;
+		else
+			rx_power = p_phy_sta_rpt->pwdb - 102;
+	}
+#endif
+
+	if (p_pktinfo->is_to_self) {
+		p_dm_odm->ofdm_agc_idx[0] = p_phy_sta_rpt->pwdb;
+		p_dm_odm->ofdm_agc_idx[1] = 0;
+		p_dm_odm->ofdm_agc_idx[2] = 0;
+		p_dm_odm->ofdm_agc_idx[3] = 0;
+	}
+
 
 	/* Calculate Signal Quality*/
 	if (p_pktinfo->is_packet_match_bssid) {
@@ -3032,20 +3336,26 @@ phydm_get_rx_phy_status_type0(
 
 	/* Modify CCK PWDB if old AGC */
 	if (p_dm_odm->cck_new_agc == false) {
-		u8	LNA_idx, VGA_idx;
+		u8	lna_idx, vga_idx;
 
 #if (RTL8197F_SUPPORT == 1)
 		if (p_dm_odm->support_ic_type & ODM_RTL8197F)
-			LNA_idx = p_phy_sta_rpt->lna_l;
+			lna_idx = p_phy_sta_rpt->lna_l;
 		else
 #endif
-			LNA_idx = ((p_phy_sta_rpt->lna_h << 3) | p_phy_sta_rpt->lna_l);
-		VGA_idx = p_phy_sta_rpt->vga;
+			lna_idx = ((p_phy_sta_rpt->lna_h << 3) | p_phy_sta_rpt->lna_l);
+		vga_idx = p_phy_sta_rpt->vga;
 
 #if (RTL8723D_SUPPORT == 1)
 		if (p_dm_odm->support_ic_type & ODM_RTL8723D)
-			rx_power = odm_CCKRSSI_8723D(LNA_idx, VGA_idx);
+			rx_power = odm_cckrssi_8723d(lna_idx, vga_idx);
 #endif
+/* JJ ADD 20161014 */
+#if (RTL8710B_SUPPORT == 1)
+		if (p_dm_odm->support_ic_type & ODM_RTL8710B)
+			rx_power = odm_cckrssi_8710b(lna_idx, vga_idx);
+#endif
+
 #if (RTL8822B_SUPPORT == 1)
 		/* Need to do !! */
 		/*if (p_dm_odm->support_ic_type & ODM_RTL8822B) */
@@ -3053,7 +3363,7 @@ phydm_get_rx_phy_status_type0(
 #endif
 #if (RTL8197F_SUPPORT == 1)
 		if (p_dm_odm->support_ic_type & ODM_RTL8197F)
-			rx_power = odm_CCKRSSI_8197F(p_dm_odm, LNA_idx, VGA_idx);
+			rx_power = odm_cckrssi_8197f(p_dm_odm, lna_idx, vga_idx);
 #endif
 	}
 
@@ -3092,10 +3402,10 @@ phydm_get_rx_phy_status_type0(
 
 void
 phydm_get_rx_phy_status_type1(
-	struct PHY_DM_STRUCT						*p_dm_odm,
+	struct PHY_DM_STRUCT		*p_dm_odm,
 	u8							*p_phy_status,
-	struct _odm_per_pkt_info_				*p_pktinfo,
-	struct _odm_phy_status_info_				*p_phy_info
+	struct _odm_per_pkt_info_		*p_pktinfo,
+	struct _odm_phy_status_info_	*p_phy_info
 )
 {
 	/* type 1 is used for ofdm packet */
@@ -3103,7 +3413,7 @@ phydm_get_rx_phy_status_type1(
 	struct _phy_status_rpt_jaguar2_type1	*p_phy_sta_rpt = (struct _phy_status_rpt_jaguar2_type1 *)p_phy_status;
 	s8							rx_pwr_db = -120;
 	u8							i, rxsc, bw = ODM_BW20M, rx_count = 0;
-	bool							is_mu;
+	boolean						is_mu;
 	u8							num_ss;
 
 	/* Update OFDM packet counter */
@@ -3120,6 +3430,10 @@ phydm_get_rx_phy_status_type1(
 			/* Update per-path information (RSSI_dB RSSI_percentage EVM SNR CFO SQ) */
 			/* EVM report is reported by stream, not path */
 			rx_path_pwr_db = p_phy_sta_rpt->pwdb[i] - 110;					/* per-path pwdb in dB domain */
+			
+			if (p_pktinfo->is_to_self) 
+				p_dm_odm->ofdm_agc_idx[i] = p_phy_sta_rpt->pwdb[i];
+			
 			phydm_set_per_path_phy_info(i, rx_path_pwr_db, p_phy_sta_rpt->rxevm[rx_count - 1],
 				p_phy_sta_rpt->cfo_tail[i], p_phy_sta_rpt->rxsnr[i], p_phy_info);
 
@@ -3163,7 +3477,7 @@ phydm_get_rx_phy_status_type1(
 			bw = ODM_BW80M;
 		else
 			bw = p_phy_sta_rpt->rf_mode;
-	} else if (p_dm_odm->support_ic_type & (ODM_RTL8197F | ODM_RTL8723D)) {
+	} else if (p_dm_odm->support_ic_type & (ODM_RTL8197F | ODM_RTL8723D | ODM_RTL8710B)) {/* JJ ADD 20161014 */
 		if (p_phy_sta_rpt->rf_mode == 0)
 			bw = ODM_BW20M;
 		else if ((rxsc == 1) || (rxsc == 2))
@@ -3173,7 +3487,7 @@ phydm_get_rx_phy_status_type1(
 	}
 
 	/* Update packet information */
-	phydm_set_common_phy_info(rx_pwr_db, p_phy_sta_rpt->channel, (bool)p_phy_sta_rpt->beamformed,
+	phydm_set_common_phy_info(rx_pwr_db, p_phy_sta_rpt->channel, (boolean)p_phy_sta_rpt->beamformed,
 		is_mu, bw, odm_evm_db_to_percentage(p_phy_sta_rpt->rxevm[0]), rxsc, p_phy_info);
 
 	num_ss = phydm_rate_to_num_ss(p_dm_odm, p_pktinfo->data_rate);
@@ -3183,32 +3497,26 @@ phydm_get_rx_phy_status_type1(
 	p_dm_odm->dm_fat_table.antsel_rx_keep_1 = p_phy_sta_rpt->antidx_b;
 	p_dm_odm->dm_fat_table.antsel_rx_keep_2 = p_phy_sta_rpt->antidx_c;
 	p_dm_odm->dm_fat_table.antsel_rx_keep_3 = p_phy_sta_rpt->antidx_d;
-
+	
+	#if 0
 	if (p_pktinfo->is_packet_match_bssid) {
-		/*
-				dbg_print("channel = %d, band = %d, l_rxsc = %d, ht_rxsc = %d, rf_mode = %d\n", p_phy_sta_rpt->channel, p_phy_sta_rpt->band, p_phy_sta_rpt->l_rxsc, p_phy_sta_rpt->ht_rxsc, p_phy_sta_rpt->rf_mode);
-				dbg_print("Antidx A = %d, B = %d, C = %d, D = %d\n", p_phy_sta_rpt->antidx_a, p_phy_sta_rpt->antidx_b, p_phy_sta_rpt->antidx_c, p_phy_sta_rpt->antidx_d);
-				dbg_print("pwdb A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", p_phy_sta_rpt->pwdb[0], p_phy_sta_rpt->pwdb[1], p_phy_sta_rpt->pwdb[2], p_phy_sta_rpt->pwdb[3]);
-				dbg_print("EVM  A: %d, B: %d, C: %d, D: %d\n", p_phy_sta_rpt->rxevm[0], p_phy_sta_rpt->rxevm[1], p_phy_sta_rpt->rxevm[2], p_phy_sta_rpt->rxevm[3]);
-				dbg_print("SNR  A: %d, B: %d, C: %d, D: %d\n", p_phy_sta_rpt->rxsnr[0], p_phy_sta_rpt->rxsnr[1], p_phy_sta_rpt->rxsnr[2], p_phy_sta_rpt->rxsnr[3]);
-				dbg_print("CFO  A: %d, B: %d, C: %d, D: %d\n", p_phy_sta_rpt->cfo_tail[0], p_phy_sta_rpt->cfo_tail[1], p_phy_sta_rpt->cfo_tail[2], p_phy_sta_rpt->cfo_tail[3]);
-				dbg_print("paid = %d, gid = %d, length = %d\n", (p_phy_sta_rpt->paid + (p_phy_sta_rpt->paid_msb<<8)), p_phy_sta_rpt->gid, p_phy_sta_rpt->lsig_length);
-				dbg_print("ldpc: %d, stbc: %d, bf: %d, gnt_bt: %d, antsw: %d\n", p_phy_sta_rpt->ldpc, p_phy_sta_rpt->stbc, p_phy_sta_rpt->beamformed, p_phy_sta_rpt->gnt_bt, p_phy_sta_rpt->hw_antsw_occu);
-				dbg_print("NBI: %d, pos: %d\n", p_phy_sta_rpt->nb_intf_flag, (p_phy_sta_rpt->intf_pos + (p_phy_sta_rpt->intf_pos_msb<<8)));
-				dbg_print("rsvd_0 = %d, rsvd_1 = %d, rsvd_2 = %d, rsvd_3 = %d, rsvd_4 = %d, rsvd_5 = %d\n", p_phy_sta_rpt->rsvd_0, p_phy_sta_rpt->rsvd_1, p_phy_sta_rpt->rsvd_2, p_phy_sta_rpt->rsvd_3, p_phy_sta_rpt->rsvd_4, p_phy_sta_rpt->rsvd_5);
-		*/
-		if ((p_phy_sta_rpt->gid != 0) && (p_phy_sta_rpt->gid != 63)) {
-			if (p_pktinfo->data_rate >= ODM_RATEVHTSS1MCS0)
-				p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[p_pktinfo->data_rate - 0x2C]++;
-		} else {
-			if (p_pktinfo->data_rate >= ODM_RATEVHTSS1MCS0)
-				p_dm_odm->phy_dbg_info.num_qry_vht_pkt[p_pktinfo->data_rate - 0x2C]++;
-		}
+	
+		dbg_print("channel = %d, band = %d, l_rxsc = %d, ht_rxsc = %d, rf_mode = %d\n", p_phy_sta_rpt->channel, p_phy_sta_rpt->band, p_phy_sta_rpt->l_rxsc, p_phy_sta_rpt->ht_rxsc, p_phy_sta_rpt->rf_mode);
+		dbg_print("Antidx A = %d, B = %d, C = %d, D = %d\n", p_phy_sta_rpt->antidx_a, p_phy_sta_rpt->antidx_b, p_phy_sta_rpt->antidx_c, p_phy_sta_rpt->antidx_d);
+		dbg_print("pwdb A: 0x%x, B: 0x%x, C: 0x%x, D: 0x%x\n", p_phy_sta_rpt->pwdb[0], p_phy_sta_rpt->pwdb[1], p_phy_sta_rpt->pwdb[2], p_phy_sta_rpt->pwdb[3]);
+		dbg_print("EVM  A: %d, B: %d, C: %d, D: %d\n", p_phy_sta_rpt->rxevm[0], p_phy_sta_rpt->rxevm[1], p_phy_sta_rpt->rxevm[2], p_phy_sta_rpt->rxevm[3]);
+		dbg_print("SNR  A: %d, B: %d, C: %d, D: %d\n", p_phy_sta_rpt->rxsnr[0], p_phy_sta_rpt->rxsnr[1], p_phy_sta_rpt->rxsnr[2], p_phy_sta_rpt->rxsnr[3]);
+		dbg_print("CFO  A: %d, B: %d, C: %d, D: %d\n", p_phy_sta_rpt->cfo_tail[0], p_phy_sta_rpt->cfo_tail[1], p_phy_sta_rpt->cfo_tail[2], p_phy_sta_rpt->cfo_tail[3]);
+		dbg_print("paid = %d, gid = %d, length = %d\n", (p_phy_sta_rpt->paid + (p_phy_sta_rpt->paid_msb<<8)), p_phy_sta_rpt->gid, p_phy_sta_rpt->lsig_length);
+		dbg_print("ldpc: %d, stbc: %d, bf: %d, gnt_bt: %d, antsw: %d\n", p_phy_sta_rpt->ldpc, p_phy_sta_rpt->stbc, p_phy_sta_rpt->beamformed, p_phy_sta_rpt->gnt_bt, p_phy_sta_rpt->hw_antsw_occu);
+		dbg_print("NBI: %d, pos: %d\n", p_phy_sta_rpt->nb_intf_flag, (p_phy_sta_rpt->intf_pos + (p_phy_sta_rpt->intf_pos_msb<<8)));
+		dbg_print("rsvd_0 = %d, rsvd_1 = %d, rsvd_2 = %d, rsvd_3 = %d, rsvd_4 = %d, rsvd_5 = %d\n", p_phy_sta_rpt->rsvd_0, p_phy_sta_rpt->rsvd_1, p_phy_sta_rpt->rsvd_2, p_phy_sta_rpt->rsvd_3, p_phy_sta_rpt->rsvd_4, p_phy_sta_rpt->rsvd_5);
+
 	}
-	/*
-		dbg_print("phydm_get_rx_phy_status_type1   p_pktinfo->is_packet_match_bssid = %d\n", p_pktinfo->is_packet_match_bssid);
-		dbg_print("p_pktinfo->data_rate = 0x%x\n", p_pktinfo->data_rate);
-	*/
+	
+	dbg_print("phydm_get_rx_phy_status_type1   p_pktinfo->is_packet_match_bssid = %d\n", p_pktinfo->is_packet_match_bssid);
+	dbg_print("p_pktinfo->data_rate = 0x%x\n", p_pktinfo->data_rate);
+	#endif
 }
 
 void
@@ -3284,7 +3592,7 @@ phydm_get_rx_phy_status_type2(
 			bw = ODM_BW80M;
 		else
 			bw = ODM_BW20M;
-	} else if (p_dm_odm->support_ic_type & (ODM_RTL8197F | ODM_RTL8723D)) {
+	} else if (p_dm_odm->support_ic_type & (ODM_RTL8197F | ODM_RTL8723D | ODM_RTL8710B)) {/* JJ ADD 20161014 */
 		if (rxsc == 3)
 			bw = ODM_BW40M;
 		else if ((rxsc == 1) || (rxsc == 2))
@@ -3294,7 +3602,7 @@ phydm_get_rx_phy_status_type2(
 	}
 
 	/* Update packet information */
-	phydm_set_common_phy_info(rx_pwr_db, p_phy_sta_rpt->channel, (bool)p_phy_sta_rpt->beamformed,
+	phydm_set_common_phy_info(rx_pwr_db, p_phy_sta_rpt->channel, (boolean)p_phy_sta_rpt->beamformed,
 				  false, bw, 0, rxsc, p_phy_info);
 
 #if 0
@@ -3335,8 +3643,8 @@ phydm_get_rx_phy_status_type5(
 
 void
 phydm_process_rssi_for_dm_new_type(
-	struct PHY_DM_STRUCT					*p_dm_odm,
-	struct _odm_phy_status_info_			*p_phy_info,
+	struct PHY_DM_STRUCT			*p_dm_odm,
+	struct _odm_phy_status_info_		*p_phy_info,
 	struct _odm_per_pkt_info_			*p_pktinfo
 )
 {
@@ -3364,8 +3672,10 @@ phydm_process_rssi_for_dm_new_type(
 	if (p_dm_odm->support_ability & ODM_BB_ANT_DIV)
 		odm_process_rssi_for_ant_div(p_dm_odm, p_phy_info, p_pktinfo);
 #endif
+
 #if (CONFIG_DYNAMIC_RX_PATH == 1)
 	phydm_process_phy_status_for_dynamic_rx_path(p_dm_odm, p_phy_info, p_pktinfo);
+	dbg_print("====>\n");
 #endif
 
 	if (p_pktinfo->is_packet_to_self || p_pktinfo->is_packet_beacon) {
@@ -3406,9 +3716,11 @@ phydm_process_rssi_for_dm_new_type(
 		}
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
+#ifndef DM_ODM_CE_MAC80211
 		if (p_entry->rssi_stat.undecorated_smoothed_pwdb == -1)
 			phydm_ra_rssi_rpt_wk(p_dm_odm);
 #endif
+#endif
 		p_entry->rssi_stat.undecorated_smoothed_pwdb = undecorated_smoothed_pwdb;
 		p_dm_odm->accumulate_pwdb[p_pktinfo->station_id] = accumulate_pwdb;
 
@@ -3416,7 +3728,7 @@ phydm_process_rssi_for_dm_new_type(
 		if (p_pktinfo->station_id == 0) {
 			HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_dm_odm->adapter);
 
-			p_hal_data->undecorated_smoothed_pwdb = undecorated_smoothed_pwdb;
+			p_hal_data->UndecoratedSmoothedPWDB = undecorated_smoothed_pwdb;
 		}
 #endif
 	}
@@ -3424,10 +3736,10 @@ phydm_process_rssi_for_dm_new_type(
 
 void
 phydm_rx_phy_status_new_type(
-	struct PHY_DM_STRUCT					*p_phydm,
-	u8						*p_phy_status,
-	struct _odm_per_pkt_info_			*p_pktinfo,
-	struct _odm_phy_status_info_			*p_phy_info
+	struct PHY_DM_STRUCT		*p_dm_odm,
+	u8							*p_phy_status,
+	struct _odm_per_pkt_info_		*p_pktinfo,
+	struct _odm_phy_status_info_	*p_phy_info
 )
 {
 	u8		phy_status_type = (*p_phy_status & 0xf);
@@ -3435,23 +3747,24 @@ phydm_rx_phy_status_new_type(
 	/*dbg_print("phydm_rx_phy_status_new_type================> (page: %d)\n", phy_status_type);*/
 
 	/* Memory reset */
-	phydm_reset_phy_info(p_phydm, p_phy_info);
+	phydm_reset_phy_info(p_dm_odm, p_phy_info);
+	p_dm_odm->rate_ss = phydm_rate_to_num_ss(p_dm_odm, p_pktinfo->data_rate);
 
 	/* Phy status parsing */
 	switch (phy_status_type) {
 	case 0:
 	{
-		phydm_get_rx_phy_status_type0(p_phydm, p_phy_status, p_pktinfo, p_phy_info);
+		phydm_get_rx_phy_status_type0(p_dm_odm, p_phy_status, p_pktinfo, p_phy_info);
 		break;
 	}
 	case 1:
 	{
-		phydm_get_rx_phy_status_type1(p_phydm, p_phy_status, p_pktinfo, p_phy_info);
+		phydm_get_rx_phy_status_type1(p_dm_odm, p_phy_status, p_pktinfo, p_phy_info);
 		break;
 	}
 	case 2:
 	{
-		phydm_get_rx_phy_status_type2(p_phydm, p_phy_status, p_pktinfo, p_phy_info);
+		phydm_get_rx_phy_status_type2(p_dm_odm, p_phy_status, p_pktinfo, p_phy_info);
 		break;
 	}
 #if 0
@@ -3464,16 +3777,21 @@ phydm_rx_phy_status_new_type(
 	default:
 		return;
 	}
+	
+	if (p_pktinfo->is_packet_match_bssid) {
+		phydm_avg_rssi_for_ss(p_dm_odm, p_phy_info, p_pktinfo);
+		phydm_rx_statistic_cal(p_dm_odm, p_phy_status, p_pktinfo);
+	}
 
 	/* Update signal strength to UI, and p_phy_info->rx_pwdb_all is the maximum RSSI of all path */
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	p_phy_info->signal_strength = signal_scale_proc(p_phydm->adapter, p_phy_info->rx_pwdb_all, false, false);
+	p_phy_info->signal_strength = SignalScaleProc(p_dm_odm->adapter, p_phy_info->rx_pwdb_all, false, false);
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	p_phy_info->signal_strength = (u8)(odm_signal_scale_mapping(p_phydm, p_phy_info->rx_pwdb_all));
+	p_phy_info->signal_strength = (u8)(odm_signal_scale_mapping(p_dm_odm, p_phy_info->rx_pwdb_all));
 #endif
 
 	/* Calculate average RSSI and smoothed RSSI */
-	phydm_process_rssi_for_dm_new_type(p_phydm, p_phy_info, p_pktinfo);
+	phydm_process_rssi_for_dm_new_type(p_dm_odm, p_phy_info, p_pktinfo);
 
 }
 /*==============================================*/
diff --git a/rtl8822BU/hal/phydm/phydm_hwconfig.h b/rtl8822BU/hal/phydm/phydm_hwconfig.h
index d898614..ff317f0 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_hwconfig.h
+++ b/rtl8822BU/hal/phydm/phydm_hwconfig.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 
 #ifndef	__HALHWOUTSRC_H__
@@ -185,11 +180,22 @@ struct _phy_status_rpt_8812 {
 };
 
 void
+phydm_reset_avg_rssi_for_ss(
+	struct PHY_DM_STRUCT	*p_dm_odm
+);
+
+void
 phydm_reset_rssi_for_dm(
 	struct PHY_DM_STRUCT	*p_dm_odm,
 	u8		station_id
 );
 
+u8
+phydm_rate_to_num_ss(
+	struct PHY_DM_STRUCT		*p_dm_odm,
+	u8			data_rate
+);
+
 void
 odm_init_rssi_for_dm(
 	struct PHY_DM_STRUCT	*p_dm_odm
@@ -219,9 +225,9 @@ odm_mac_status_query(
 	struct PHY_DM_STRUCT					*p_dm_odm,
 	u8						*p_mac_status,
 	u8						mac_id,
-	bool						is_packet_match_bssid,
-	bool						is_packet_to_self,
-	bool						is_packet_beacon
+	boolean						is_packet_match_bssid,
+	boolean						is_packet_to_self,
+	boolean						is_packet_beacon
 );
 
 enum hal_status
@@ -277,6 +283,14 @@ phydm_rx_phy_status_new_type(
 	struct _odm_phy_status_info_			*p_phy_info
 );
 
+boolean
+phydm_query_is_mu_api(
+	struct PHY_DM_STRUCT			*p_phydm,
+	u8								ppdu_idx,
+	u8								*p_data_rate,
+	u8								*p_gid
+);
+
 struct _phy_status_rpt_jaguar2_type0 {
 	/* DW0 */
 	u8		page_num;
diff --git a/rtl8822BU/hal/phydm/phydm_interface.c b/rtl8822BU/hal/phydm/phydm_interface.c
index 84d9674..1a9264d 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_interface.c
+++ b/rtl8822BU/hal/phydm/phydm_interface.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 /* ************************************************************
  * include files
@@ -38,12 +33,16 @@ odm_read_1byte(
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	struct rtl8192cd_priv	*priv	= p_dm_odm->priv;
 	return	RTL_R8(reg_addr);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+
+	return rtl_read_byte(rtlpriv, reg_addr);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
 	return rtw_read8(adapter, reg_addr);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	return	platform_efio_read_1byte(adapter, reg_addr);
+	return	PlatformEFIORead1Byte(adapter, reg_addr);
 #endif
 
 }
@@ -58,12 +57,16 @@ odm_read_2byte(
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	struct rtl8192cd_priv	*priv	= p_dm_odm->priv;
 	return	RTL_R16(reg_addr);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+
+	return rtl_read_word(rtlpriv, reg_addr);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
 	return rtw_read16(adapter, reg_addr);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	return	platform_efio_read_2byte(adapter, reg_addr);
+	return	PlatformEFIORead2Byte(adapter, reg_addr);
 #endif
 
 }
@@ -78,12 +81,16 @@ odm_read_4byte(
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	struct rtl8192cd_priv	*priv	= p_dm_odm->priv;
 	return	RTL_R32(reg_addr);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+
+	return rtl_read_dword(rtlpriv, reg_addr);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
 	return rtw_read32(adapter, reg_addr);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	return	platform_efio_read_4byte(adapter, reg_addr);
+	return	PlatformEFIORead4Byte(adapter, reg_addr);
 #endif
 
 }
@@ -99,12 +106,16 @@ odm_write_1byte(
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	struct rtl8192cd_priv	*priv	= p_dm_odm->priv;
 	RTL_W8(reg_addr, data);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+
+	rtl_write_byte(rtlpriv, reg_addr, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
 	rtw_write8(adapter, reg_addr, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	platform_efio_write_1byte(adapter, reg_addr, data);
+	PlatformEFIOWrite1Byte(adapter, reg_addr, data);
 #endif
 
 }
@@ -120,12 +131,16 @@ odm_write_2byte(
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	struct rtl8192cd_priv	*priv	= p_dm_odm->priv;
 	RTL_W16(reg_addr, data);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+
+	rtl_write_word(rtlpriv, reg_addr, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
 	rtw_write16(adapter, reg_addr, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	platform_efio_write_2byte(adapter, reg_addr, data);
+	PlatformEFIOWrite2Byte(adapter, reg_addr, data);
 #endif
 
 }
@@ -141,12 +156,16 @@ odm_write_4byte(
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	struct rtl8192cd_priv	*priv	= p_dm_odm->priv;
 	RTL_W32(reg_addr, data);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+
+	rtl_write_dword(rtlpriv, reg_addr, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
 	rtw_write32(adapter, reg_addr, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	platform_efio_write_4byte(adapter, reg_addr, data);
+	PlatformEFIOWrite4Byte(adapter, reg_addr, data);
 #endif
 
 }
@@ -162,9 +181,15 @@ odm_set_mac_reg(
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	phy_set_bb_reg(p_dm_odm->priv, reg_addr, bit_mask, data);
-#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_WIN))
+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	phy_set_bb_reg(adapter, reg_addr, bit_mask, data);
+	PHY_SetBBReg(adapter, reg_addr, bit_mask, data);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+
+	rtl_set_bbreg(rtlpriv->hw, reg_addr, bit_mask, data);
+#else
+	phy_set_bb_reg(p_dm_odm->adapter, reg_addr, bit_mask, data);
 #endif
 }
 
@@ -178,7 +203,13 @@ odm_get_mac_reg(
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	return phy_query_bb_reg(p_dm_odm->priv, reg_addr, bit_mask);
-#elif (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	return PHY_QueryMacReg(p_dm_odm->adapter, reg_addr, bit_mask);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+
+	return rtl_get_bbreg(rtlpriv->hw, reg_addr, bit_mask);
+#else
 	return phy_query_mac_reg(p_dm_odm->adapter, reg_addr, bit_mask);
 #endif
 }
@@ -194,9 +225,15 @@ odm_set_bb_reg(
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	phy_set_bb_reg(p_dm_odm->priv, reg_addr, bit_mask, data);
-#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_WIN))
+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	phy_set_bb_reg(adapter, reg_addr, bit_mask, data);
+	PHY_SetBBReg(adapter, reg_addr, bit_mask, data);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+
+	rtl_set_bbreg(rtlpriv->hw, reg_addr, bit_mask, data);
+#else
+	phy_set_bb_reg(p_dm_odm->adapter, reg_addr, bit_mask, data);
 #endif
 }
 
@@ -210,9 +247,15 @@ odm_get_bb_reg(
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	return phy_query_bb_reg(p_dm_odm->priv, reg_addr, bit_mask);
-#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_WIN))
+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	return phy_query_bb_reg(adapter, reg_addr, bit_mask);
+	return PHY_QueryBBReg(adapter, reg_addr, bit_mask);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+
+	return rtl_get_bbreg(rtlpriv->hw, reg_addr, bit_mask);
+#else
+	return phy_query_bb_reg(p_dm_odm->adapter, reg_addr, bit_mask);
 #endif
 }
 
@@ -230,9 +273,13 @@ odm_set_rf_reg(
 	phy_set_rf_reg(p_dm_odm->priv, e_rf_path, reg_addr, bit_mask, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	phy_set_rf_reg(adapter, e_rf_path, reg_addr, bit_mask, data);
+	PHY_SetRFReg(adapter, e_rf_path, reg_addr, bit_mask, data);
 	ODM_delay_us(2);
 
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+
+	rtl_set_rfreg(rtlpriv->hw, e_rf_path, reg_addr, bit_mask, data);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	phy_set_rf_reg(p_dm_odm->adapter, e_rf_path, reg_addr, bit_mask, data);
 #endif
@@ -248,13 +295,50 @@ odm_get_rf_reg(
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	return phy_query_rf_reg(p_dm_odm->priv, e_rf_path, reg_addr, bit_mask, 1);
-#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_WIN))
+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	return phy_query_rf_reg(adapter, e_rf_path, reg_addr, bit_mask);
+	return PHY_QueryRFReg(adapter, e_rf_path, reg_addr, bit_mask);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+
+	return rtl_get_rfreg(rtlpriv->hw, e_rf_path, reg_addr, bit_mask);
+#else
+	return phy_query_rf_reg(p_dm_odm->adapter, e_rf_path, reg_addr, bit_mask);
 #endif
 }
 
+enum hal_status
+phydm_set_reg_by_fw(
+	struct PHY_DM_STRUCT			*p_dm_odm,
+	enum phydm_halmac_param	config_type,
+	u32	offset,
+	u32	data,
+	u32	mask,
+	enum odm_rf_radio_path_e	e_rf_path,
+	u32 delay_time
+)
+{
+	enum hal_status	stat = HAL_STATUS_SUCCESS;
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
+	stat = HAL_MAC_Config_PHY_WriteNByte(p_dm_odm,
+									config_type,
+									offset,
+									data,
+									mask,
+									e_rf_path,
+									delay_time);
+#elif (0)/*(DM_ODM_SUPPORT_TYPE & ODM_CE)*/
+	return rtw_phydm_cfg_phy_para(p_dm_odm,
+							config_type,
+							offset,
+							data,
+							mask,
+							e_rf_path,
+							delay_time);
+#endif
+	return stat;
 
+}
 
 
 /*
@@ -269,11 +353,13 @@ odm_allocate_memory(
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	*p_ptr = kmalloc(length, GFP_ATOMIC);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	*p_ptr = kmalloc(length, GFP_ATOMIC);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	*p_ptr = rtw_zvmalloc(length);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	platform_allocate_memory(adapter, p_ptr, length);
+	PlatformAllocateMemory(adapter, p_ptr, length);
 #endif
 }
 
@@ -287,11 +373,13 @@ odm_free_memory(
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	kfree(p_ptr);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	kfree(p_ptr);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	rtw_vmfree(p_ptr, length);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	/* struct _ADAPTER*    adapter = p_dm_odm->adapter; */
-	platform_free_memory(p_ptr, length);
+	PlatformFreeMemory(p_ptr, length);
 #endif
 }
 
@@ -305,10 +393,12 @@ odm_move_memory(
 {
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	memcpy(p_dest, p_src, length);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	memcpy(p_dest, p_src, length);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	_rtw_memcpy(p_dest, p_src, length);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	platform_move_memory(p_dest, p_src, length);
+	PlatformMoveMemory(p_dest, p_src, length);
 #endif
 }
 
@@ -321,10 +411,12 @@ void odm_memory_set(
 {
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	memset(pbuf, value, length);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	memset(pbuf, value, length);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	_rtw_memset(pbuf, value, length);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	platform_fill_memory(pbuf, length, value);
+	PlatformFillMemory(pbuf, length, value);
 #endif
 }
 s32 odm_compare_memory(
@@ -336,10 +428,12 @@ s32 odm_compare_memory(
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	return memcmp(p_buf1, p_buf2, length);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	return memcmp(p_buf1, p_buf2, length);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	return _rtw_memcmp(p_buf1, p_buf2, length);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	return platform_compare_memory(p_buf1, p_buf2, length);
+	return PlatformCompareMemory(p_buf1, p_buf2, length);
 #endif
 }
 
@@ -356,12 +450,13 @@ odm_acquire_spin_lock(
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	struct _ADAPTER *adapter = p_dm_odm->adapter;
 	rtw_odm_acquirespinlock(adapter, type);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	platform_acquire_spin_lock(adapter, type);
+	PlatformAcquireSpinLock(adapter, type);
 #endif
 }
 void
@@ -372,12 +467,13 @@ odm_release_spin_lock(
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	struct _ADAPTER *adapter = p_dm_odm->adapter;
 	rtw_odm_releasespinlock(adapter, type);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	platform_release_spin_lock(adapter, type);
+	PlatformReleaseSpinLock(adapter, type);
 #endif
 }
 
@@ -400,7 +496,7 @@ odm_initialize_work_item(
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	platform_initialize_work_item(adapter, p_rt_work_item, rt_work_item_callback, p_context, sz_id);
+	PlatformInitializeWorkItem(adapter, p_rt_work_item, rt_work_item_callback, p_context, sz_id);
 #endif
 }
 
@@ -415,7 +511,7 @@ odm_start_work_item(
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	platform_start_work_item(p_rt_work_item);
+	PlatformStartWorkItem(p_rt_work_item);
 #endif
 }
 
@@ -430,7 +526,7 @@ odm_stop_work_item(
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	platform_stop_work_item(p_rt_work_item);
+	PlatformStopWorkItem(p_rt_work_item);
 #endif
 }
 
@@ -445,7 +541,7 @@ odm_free_work_item(
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	platform_free_work_item(p_rt_work_item);
+	PlatformFreeWorkItem(p_rt_work_item);
 #endif
 }
 
@@ -460,12 +556,12 @@ odm_schedule_work_item(
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	platform_schedule_work_item(p_rt_work_item);
+	PlatformScheduleWorkItem(p_rt_work_item);
 #endif
 }
 
 
-bool
+boolean
 odm_is_work_item_scheduled(
 	PRT_WORK_ITEM	p_rt_work_item
 )
@@ -475,7 +571,7 @@ odm_is_work_item_scheduled(
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	platform_is_work_item_scheduled(p_rt_work_item);
+	return PlatformIsWorkItemScheduled(p_rt_work_item);
 #endif
 }
 #endif
@@ -491,10 +587,12 @@ odm_stall_execution(
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	udelay(us_delay);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	rtw_udelay_os(us_delay);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	platform_stall_execution(us_delay);
+	PlatformStallExecution(us_delay);
 #endif
 }
 
@@ -503,6 +601,8 @@ ODM_delay_ms(u32	ms)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	delay_ms(ms);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	mdelay(ms);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	rtw_mdelay_os(ms);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
@@ -515,10 +615,12 @@ ODM_delay_us(u32	us)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	delay_us(us);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	udelay(us);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	rtw_udelay_os(us);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	platform_stall_execution(us);
+	PlatformStallExecution(us);
 #endif
 }
 
@@ -527,6 +629,8 @@ ODM_sleep_ms(u32	ms)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	msleep(ms);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	rtw_msleep_os(ms);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
@@ -538,6 +642,8 @@ ODM_sleep_us(u32	us)
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	usleep_range(us, us + 1);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	rtw_usleep_os(us);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
@@ -553,11 +659,13 @@ odm_set_timer(
 {
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	mod_timer(p_timer, jiffies + RTL_MILISECONDS_TO_JIFFIES(ms_delay));
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	mod_timer(p_timer, jiffies + msecs_to_jiffies(ms_delay));
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	_set_timer(p_timer, ms_delay); /* ms */
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
-	platform_set_timer(adapter, p_timer, ms_delay);
+	PlatformSetTimer(adapter, p_timer, ms_delay);
 #endif
 
 }
@@ -576,12 +684,17 @@ odm_initialize_timer(
 	p_timer->function = call_back_func;
 	p_timer->data = (unsigned long)p_dm_odm;
 	/*mod_timer(p_timer, jiffies+RTL_MILISECONDS_TO_JIFFIES(10));	*/
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	init_timer(p_timer);
+	p_timer->function = call_back_func;
+	p_timer->data = (unsigned long)p_dm_odm;
+	/*mod_timer(p_timer, jiffies+RTL_MILISECONDS_TO_JIFFIES(10));	*/
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	struct _ADAPTER *adapter = p_dm_odm->adapter;
 	_init_timer(p_timer, adapter->pnetdev, call_back_func, p_dm_odm);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER *adapter = p_dm_odm->adapter;
-	platform_initialize_timer(adapter, p_timer, call_back_func, p_context, sz_id);
+	PlatformInitializeTimer(adapter, p_timer, call_back_func, p_context, sz_id);
 #endif
 }
 
@@ -594,11 +707,13 @@ odm_cancel_timer(
 {
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
 	del_timer(p_timer);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	del_timer(p_timer);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	_cancel_timer_ex(p_timer);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	struct _ADAPTER *adapter = p_dm_odm->adapter;
-	platform_cancel_timer(adapter, p_timer);
+	PlatformCancelTimer(adapter, p_timer);
 #endif
 }
 
@@ -624,7 +739,7 @@ odm_release_timer(
 		return;
 	}
 
-	platform_release_timer(adapter, p_timer);
+	PlatformReleaseTimer(adapter, p_timer);
 #endif
 }
 
@@ -649,6 +764,7 @@ phydm_trans_h2c_id(
 		else
 			platform_h2c_id = H2C_RSSI_REPORT;
 
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 		platform_h2c_id = H2C_RSSI_SETTING;
 
@@ -704,6 +820,7 @@ phydm_trans_h2c_id(
 			platform_h2c_id = H2C_8814A_RA_PARA_ADJUST;
 		else
 			platform_h2c_id = H2C_RA_PARA_ADJUST;
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 #if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
 		platform_h2c_id = H2C_8812_RA_PARA_ADJUST;
@@ -814,7 +931,11 @@ odm_fill_h2c_cmd(
 	u8			*p_cmd_buffer
 )
 {
+#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	struct rtl_priv *rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+#else
 	struct _ADAPTER	*adapter = p_dm_odm->adapter;
+#endif
 	u8		platform_h2c_id;
 
 	platform_h2c_id = phydm_trans_h2c_id(p_dm_odm, phydm_h2c_id);
@@ -824,18 +945,25 @@ odm_fill_h2c_cmd(
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	if (p_dm_odm->support_ic_type == ODM_RTL8188E)	{
 		if (!p_dm_odm->ra_support88e)
-			fill_h2c_cmd88e(adapter, platform_h2c_id, cmd_len, p_cmd_buffer);
+			FillH2CCmd88E(adapter, platform_h2c_id, cmd_len, p_cmd_buffer);
 	} else if (p_dm_odm->support_ic_type == ODM_RTL8814A)
-		fill_h2c_cmd8814a(adapter, platform_h2c_id, cmd_len, p_cmd_buffer);
+		FillH2CCmd8814A(adapter, platform_h2c_id, cmd_len, p_cmd_buffer);
 	else if (p_dm_odm->support_ic_type == ODM_RTL8822B)
 #if (RTL8822B_SUPPORT == 1)
-		fill_h2c_cmd8822b(adapter, platform_h2c_id, cmd_len, p_cmd_buffer);
+		FillH2CCmd8822B(adapter, platform_h2c_id, cmd_len, p_cmd_buffer);
 #endif
 	else
-		fill_h2c_cmd(adapter, platform_h2c_id, cmd_len, p_cmd_buffer);
+		FillH2CCmd(adapter, platform_h2c_id, cmd_len, p_cmd_buffer);
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
+
+#ifdef DM_ODM_CE_MAC80211
+	rtlpriv->cfg->ops->fill_h2c_cmd(rtlpriv->hw, platform_h2c_id,
+					cmd_len, p_cmd_buffer);
+#else
+
 	rtw_hal_fill_h2c_cmd(adapter, platform_h2c_id, cmd_len, p_cmd_buffer);
+#endif
 
 #elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
 #if ((RTL8881A_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1))
@@ -928,10 +1056,12 @@ odm_get_current_time(
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	return  0;
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	return jiffies;
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	return (u64)rtw_get_current_time();
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	return  platform_get_current_time();
+	return  PlatformGetCurrentTime();
 #endif
 }
 
@@ -943,9 +1073,210 @@ odm_get_progressing_time(
 {
 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	return  0;
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	return jiffies_to_msecs(jiffies - (u32)start_time);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	return rtw_get_passing_time_ms((u32)start_time);
 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
-	return ((platform_get_current_time() - start_time) >> 10);
+	return ((PlatformGetCurrentTime() - start_time) >> 10);
+#endif
+}
+
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) && !defined(DM_ODM_CE_MAC80211)
+
+void
+phydm_set_hw_reg_handler_interface (
+	struct PHY_DM_STRUCT		*p_dm_odm,
+	u8				RegName,
+	u8				*val
+	)
+{
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
+	struct _ADAPTER *adapter = p_dm_odm->adapter;
+
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	adapter->HalFunc.SetHwRegHandler(adapter, RegName, val);
+#else
+	adapter->hal_func.set_hw_reg_handler(adapter, RegName, val);
+#endif
+
+#endif
+
+}
+
+void
+phydm_get_hal_def_var_handler_interface (
+	struct PHY_DM_STRUCT		*p_dm_odm,
+	enum _HAL_DEF_VARIABLE		e_variable,
+	void						*p_value
+	)
+{
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
+	struct _ADAPTER *adapter = p_dm_odm->adapter;
+
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	adapter->HalFunc.GetHalDefVarHandler(adapter, e_variable, p_value);
+#else
+	adapter->hal_func.get_hal_def_var_handler(adapter, e_variable, p_value);
+#endif
+
+#endif
+}
+
+#endif
+
+void
+odm_set_tx_power_index_by_rate_section (
+	struct PHY_DM_STRUCT	*p_dm_odm,
+	u8				RFPath,
+	u8				Channel,
+	u8				RateSection
+	)
+{
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	struct _ADAPTER		*adapter = p_dm_odm->adapter;
+	PHY_SetTxPowerIndexByRateSection(adapter, RFPath, Channel, RateSection);
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	void *adapter = p_dm_odm->adapter;
+
+	phy_set_tx_power_index_by_rs(adapter, Channel, RFPath, RateSection);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
+	phy_set_tx_power_index_by_rate_section(p_dm_odm->adapter, RFPath, Channel, RateSection);
+#endif
+}
+
+
+u8
+odm_get_tx_power_index (
+	struct PHY_DM_STRUCT	*p_dm_odm,
+	u8				RFPath,
+	u8				tx_rate,
+	u8				band_width,
+	u8				Channel
+	)
+{
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	struct _ADAPTER		*adapter = p_dm_odm->adapter;
+	return PHY_GetTxPowerIndex(p_dm_odm->adapter, RFPath, tx_rate, band_width, Channel);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	void		*adapter = p_dm_odm->adapter;
+	return phy_get_tx_power_index(adapter, (enum odm_rf_radio_path_e)RFPath, tx_rate, band_width, Channel);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
+	return phy_get_tx_power_index(p_dm_odm->adapter, RFPath, tx_rate, band_width, Channel);
+#endif
+}
+
+
+
+u8
+odm_efuse_one_byte_read(
+	struct PHY_DM_STRUCT	*p_dm_odm,
+	u16			addr,
+	u8			*data,
+	boolean		b_pseu_do_test
+	)
+{
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	struct	_ADAPTER	*adapter = p_dm_odm->adapter;
+
+	return (u8)EFUSE_OneByteRead(adapter, addr, data, b_pseu_do_test);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	void		*adapter = p_dm_odm->adapter;
+
+	return efuse_onebyte_read(adapter, addr, data, b_pseu_do_test);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
+	return efuse_onebyte_read(p_dm_odm->adapter, addr, data, b_pseu_do_test);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_AP)
+	/*ReadEFuseByte(p_dm_odm->priv, addr, data);*/
+	/*return true;*/
+#endif
+}
+
+
+
+void
+odm_efuse_logical_map_read(
+	struct	PHY_DM_STRUCT	*p_dm_odm,
+	u8	type,
+	u16	offset,
+	u32	*data
+)
+{
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	struct	_ADAPTER *adapter = p_dm_odm->adapter;
+
+	EFUSE_ShadowRead(adapter, type, offset, data);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
+	efuse_logical_map_read(p_dm_odm->adapter, type, offset, data);
+#endif
+}
+
+enum hal_status
+odm_iq_calibrate_by_fw(
+	struct PHY_DM_STRUCT	*p_dm_odm,
+	u8 clear,
+	u8 segment
+	)
+{
+	enum hal_status iqk_result = HAL_STATUS_FAILURE;
+
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	struct	_ADAPTER	*adapter = p_dm_odm->adapter;
+
+	if (HAL_MAC_FWIQK_Trigger(&GET_HAL_MAC_INFO(adapter), clear, segment) == 0)
+		iqk_result = HAL_STATUS_SUCCESS;
+#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
+	#ifdef RTW_HALMAC
+	#include "../hal_halmac.h"
+	struct	_ADAPTER	*adapter = p_dm_odm->adapter;
+	
+	if (rtw_halmac_iqk(adapter_to_dvobj(adapter), clear, segment) == 0)
+		iqk_result = HAL_STATUS_SUCCESS;
+	#endif
 #endif
+	return iqk_result;
 }
+
+void
+odm_cmn_info_ptr_array_hook(
+	struct PHY_DM_STRUCT		*p_dm_odm,
+	enum odm_cmninfo_e	cmn_info,
+	u16			index,
+	void			*p_value
+)
+{
+	switch	(cmn_info) {
+	/*Dynamic call by reference pointer.	*/
+	case	ODM_CMNINFO_STA_STATUS:
+		p_dm_odm->p_odm_sta_info[index] = (struct sta_info *)p_value;
+
+		if (IS_STA_VALID(p_dm_odm->p_odm_sta_info[index]))
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+			p_dm_odm->platform2phydm_macid_table[((struct sta_info *)p_value)->AssociatedMacId] = index; /*associated_mac_id are unique bttween different adapter*/
+#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
+			p_dm_odm->platform2phydm_macid_table[((struct sta_info *)p_value)->aid] = index;
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+			p_dm_odm->platform2phydm_macid_table[index] = index;
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
+			p_dm_odm->platform2phydm_macid_table[((struct sta_info *)p_value)->mac_id] = index;
+#endif
+		break;
+	/* To remove the compiler warning, must add an empty default statement to handle the other values. */
+	default:
+		/* do nothing */
+		break;
+	}
+
+}
+
+void
+phydm_cmn_sta_info_hook(
+	struct PHY_DM_STRUCT		*p_dm_odm,
+	u8			mac_id,
+	struct cmn_sta_info *pcmn_sta_info
+)
+{
+	p_dm_odm->p_phydm_sta_info[mac_id] = pcmn_sta_info;
+
+}
+
diff --git a/rtl8822BU/hal/phydm/phydm_interface.h b/rtl8822BU/hal/phydm/phydm_interface.h
index 4e928b4..3c24a6e 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_interface.h
+++ b/rtl8822BU/hal/phydm/phydm_interface.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 
 #ifndef	__ODM_INTERFACE_H__
@@ -102,6 +97,7 @@ enum phydm_h2c_cmd {
 	PHYDM_H2C_FW_TRACE_EN	= 0x49,
 	ODM_H2C_WIFI_CALIBRATION	= 0x6d,
 	PHYDM_H2C_MU				= 0x4a,
+	PHYDM_H2C_FW_GENERAL_INIT = 0x4c,
 	ODM_MAX_H2CCMD
 };
 
@@ -125,6 +121,18 @@ enum phydm_extend_c2h_evt {
 
 };
 
+enum phydm_halmac_param {
+	PHYDM_HALMAC_CMD_MAC_W8 = 0,
+	PHYDM_HALMAC_CMD_MAC_W16 = 1,
+	PHYDM_HALMAC_CMD_MAC_W32 = 2,
+	PHYDM_HALMAC_CMD_BB_W8,
+	PHYDM_HALMAC_CMD_BB_W16,
+	PHYDM_HALMAC_CMD_BB_W32,
+	PHYDM_HALMAC_CMD_RF_W,
+	PHYDM_HALMAC_CMD_DELAY_US,
+	PHYDM_HALMAC_CMD_DELAY_MS,
+	PHYDM_HALMAC_CMD_END = 0XFF,
+};
 
 /*
  * =========== Extern Variable ??? It should be forbidden.
@@ -223,6 +231,17 @@ odm_get_rf_reg(
 );
 
 
+enum hal_status
+phydm_set_reg_by_fw(
+	struct PHY_DM_STRUCT			*p_dm_odm,
+	enum phydm_halmac_param	config_type,
+	u32	offset,
+	u32	data,
+	u32	mask,
+	enum odm_rf_radio_path_e	e_rf_path,
+	u32 delay_time
+);
+
 /*
  * Memory Relative Function.
  *   */
@@ -308,7 +327,7 @@ odm_schedule_work_item(
 	PRT_WORK_ITEM	p_rt_work_item
 );
 
-bool
+boolean
 odm_is_work_item_scheduled(
 	PRT_WORK_ITEM	p_rt_work_item
 );
@@ -393,4 +412,78 @@ odm_get_progressing_time(
 	u64			start_time
 );
 
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) && !defined(DM_ODM_CE_MAC80211)
+
+void
+phydm_set_hw_reg_handler_interface (
+	struct PHY_DM_STRUCT		*p_dm_odm,
+	u8				reg_Name,
+	u8				*val
+	);
+
+void
+phydm_get_hal_def_var_handler_interface (
+	struct PHY_DM_STRUCT		*p_dm_odm,
+	enum _HAL_DEF_VARIABLE		e_variable,
+	void						*p_value
+	);
+
+#endif
+
+void
+odm_set_tx_power_index_by_rate_section (
+	struct PHY_DM_STRUCT	*p_dm_odm,
+	u8				RFPath,
+	u8				Channel,
+	u8				RateSection
+);
+
+u8
+odm_get_tx_power_index (
+	struct PHY_DM_STRUCT	*p_dm_odm,
+	u8				RFPath,
+	u8				tx_rate,
+	u8				band_width,
+	u8				Channel
+);
+
+u8
+odm_efuse_one_byte_read(
+	struct PHY_DM_STRUCT	*p_dm_odm,
+	u16			addr,
+	u8			*data,
+	boolean		b_pseu_do_test
+);
+
+void
+odm_efuse_logical_map_read(
+	struct	PHY_DM_STRUCT	*p_dm_odm,
+	u8	type,
+	u16	offset,
+	u32	*data
+);
+
+enum hal_status
+odm_iq_calibrate_by_fw(
+	struct PHY_DM_STRUCT	*p_dm_odm,
+	u8 clear,
+	u8 segment
+);
+
+void
+odm_cmn_info_ptr_array_hook(
+	struct PHY_DM_STRUCT		*p_dm_odm,
+	enum odm_cmninfo_e	cmn_info,
+	u16			index,
+	void			*p_value
+);
+
+void
+phydm_cmn_sta_info_hook(
+	struct PHY_DM_STRUCT		*p_dm_odm,
+	u8			index,
+	struct cmn_sta_info *pcmn_sta_info
+);
+
 #endif /* __ODM_INTERFACE_H__ */
+
diff --git a/rtl8822BU/hal/phydm/phydm_kfree.c b/rtl8822BU/hal/phydm/phydm_kfree.c
deleted file mode 100755
index f063b78..0000000
--- a/rtl8822BU/hal/phydm/phydm_kfree.c
+++ b/dev/null
@@ -1,190 +0,0 @@
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
-
-/*============================================================*/
-/*include files*/
-/*============================================================*/
-#include "mp_precomp.h"
-#include "phydm_precomp.h"
-
-
-/*<YuChen, 150720> Add for KFree Feature Requested by RF David.*/
-/*This is a phydm API*/
-
-void
-phydm_set_kfree_to_rf_8814a(
-	void		*p_dm_void,
-	u8		e_rf_path,
-	u8		data
-)
-{
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
-	bool is_odd;
-
-	if ((data % 2) != 0) {	/*odd->positive*/
-		data = data - 1;
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(19), 1);
-		is_odd = true;
-	} else {		/*even->negative*/
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(19), 0);
-		is_odd = false;
-	}
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("phy_ConfigKFree8814A(): RF_0x55[19]= %d\n", is_odd));
-	switch (data) {
-	case 0:
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 0);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 0;
-		break;
-	case 2:
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1);
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 0);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 0;
-		break;
-	case 4:
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 1);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 1;
-		break;
-	case 6:
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1);
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 1);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 1;
-		break;
-	case 8:
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 2);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 2;
-		break;
-	case 10:
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1);
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 2);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 2;
-		break;
-	case 12:
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 3);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 3;
-		break;
-	case 14:
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1);
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 3);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 3;
-		break;
-	case 16:
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 4);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 4;
-		break;
-	case 18:
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1);
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 4);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 4;
-		break;
-	case 20:
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0);
-		odm_set_rf_reg(p_dm_odm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 5);
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = 5;
-		break;
-
-	default:
-		break;
-	}
-
-	if (is_odd == false) {
-		/*that means Kfree offset is negative, we need to record it.*/
-		p_rf_calibrate_info->kfree_offset[e_rf_path] = (-1) * p_rf_calibrate_info->kfree_offset[e_rf_path];
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("phy_ConfigKFree8814A(): kfree_offset = %d\n", p_rf_calibrate_info->kfree_offset[e_rf_path]));
-	} else
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("phy_ConfigKFree8814A(): kfree_offset = %d\n", p_rf_calibrate_info->kfree_offset[e_rf_path]));
-
-}
-
-
-void
-phydm_set_kfree_to_rf(
-	void		*p_dm_void,
-	u8		e_rf_path,
-	u8		data
-)
-{
-	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-	if (p_dm_odm->support_ic_type & ODM_RTL8814A)
-		phydm_set_kfree_to_rf_8814a(p_dm_odm, e_rf_path, data);
-}
-
-void
-phydm_config_kfree(
-	void	*p_dm_void,
-	u8	channel_to_sw,
-	u8	*kfree_table
-)
-{
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct odm_rf_calibration_structure	*p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
-	u8			rfpath = 0, max_rf_path = 0;
-	u8			channel_idx = 0;
-
-	if (p_dm_odm->support_ic_type & ODM_RTL8814A)
-		max_rf_path = 4;	/*0~3*/
-	else if (p_dm_odm->support_ic_type & (ODM_RTL8812 | ODM_RTL8192E | ODM_RTL8822B))
-		max_rf_path = 2;	/*0~1*/
-	else
-		max_rf_path = 1;
-
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("===>phy_ConfigKFree8814A()\n"));
-
-	if (p_rf_calibrate_info->reg_rf_kfree_enable == 2) {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("phy_ConfigKFree8814A(): reg_rf_kfree_enable == 2, Disable\n"));
-		return;
-	} else if (p_rf_calibrate_info->reg_rf_kfree_enable == 1 || p_rf_calibrate_info->reg_rf_kfree_enable == 0) {
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("phy_ConfigKFree8814A(): reg_rf_kfree_enable == true\n"));
-		/*Make sure the targetval is defined*/
-		if (((p_rf_calibrate_info->reg_rf_kfree_enable == 1) && (kfree_table[0] != 0xFF)) || (p_rf_calibrate_info->rf_kfree_enable == true)) {
-			/*if kfree_table[0] == 0xff, means no Kfree*/
-			if (*p_dm_odm->p_band_type == ODM_BAND_2_4G) {
-				if (channel_to_sw <= 14 && channel_to_sw >= 1)
-					channel_idx = PHYDM_2G;
-			} else if (*p_dm_odm->p_band_type == ODM_BAND_5G) {
-				if (channel_to_sw >= 36 && channel_to_sw <= 48)
-					channel_idx = PHYDM_5GLB1;
-				if (channel_to_sw >= 52 && channel_to_sw <= 64)
-					channel_idx = PHYDM_5GLB2;
-				if (channel_to_sw >= 100 && channel_to_sw <= 120)
-					channel_idx = PHYDM_5GMB1;
-				if (channel_to_sw >= 124 && channel_to_sw <= 144)
-					channel_idx = PHYDM_5GMB2;
-				if (channel_to_sw >= 149 && channel_to_sw <= 177)
-					channel_idx = PHYDM_5GHB;
-			}
-
-			for (rfpath = ODM_RF_PATH_A;  rfpath < max_rf_path; rfpath++) {
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("phydm_kfree(): PATH_%d: %#x\n", rfpath, kfree_table[channel_idx * max_rf_path + rfpath]));
-				phydm_set_kfree_to_rf(p_dm_odm, rfpath, kfree_table[channel_idx * max_rf_path + rfpath]);
-			}
-		} else {
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("phy_ConfigKFree8814A(): targetval not defined, Don't execute KFree Process.\n"));
-			return;
-		}
-	}
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("<===phy_ConfigKFree8814A()\n"));
-}
diff --git a/rtl8822BU/hal/phydm/phydm_noisemonitor.c b/rtl8822BU/hal/phydm/phydm_noisemonitor.c
index 8501907..8a34ba1 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_noisemonitor.c
+++ b/rtl8822BU/hal/phydm/phydm_noisemonitor.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 /* ************************************************************
  * include files
@@ -41,6 +36,19 @@
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_WIN))
 
+void phydm_set_noise_data_sum(struct noise_level *noise_data, u8 max_rf_path)
+{
+	u8 rf_path;
+
+	for (rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) {
+		/* printk("%s PATH_%d - sum = %d, VALID_CNT = %d\n",__FUNCTION__,rf_path,noise_data.sum[rf_path], noise_data.valid_cnt[rf_path]); */
+		if (noise_data->valid_cnt[rf_path])
+			noise_data->sum[rf_path] /= noise_data->valid_cnt[rf_path];
+		else
+			noise_data->sum[rf_path]  = 0;
+	}
+}
+
 s16 odm_inband_noise_monitor_n_series(struct PHY_DM_STRUCT	*p_dm_odm, u8 is_pause_dig, u8 igi_value, u32 max_time)
 {
 	u32				tmp4b;
@@ -110,43 +118,38 @@ s16 odm_inband_noise_monitor_n_series(struct PHY_DM_STRUCT	*p_dm_odm, u8 is_paus
 		/* ODM_sleep_ms(10); */
 
 		for (rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) {
-			if ((noise_data.valid_cnt[rf_path] < VALID_CNT) && (noise_data.sval[rf_path] < VALID_MAX && noise_data.sval[rf_path] >= VALID_MIN)) {
-				noise_data.valid_cnt[rf_path]++;
-				noise_data.sum[rf_path] += noise_data.sval[rf_path];
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("rf_path:%d Valid sval = %d\n", rf_path, noise_data.sval[rf_path]));
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Sum of sval = %d,\n", noise_data.sum[rf_path]));
-				if (noise_data.valid_cnt[rf_path] == VALID_CNT) {
-					valid_done++;
-					ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("After divided, rf_path:%d,sum = %d\n", rf_path, noise_data.sum[rf_path]));
-				}
+			if (!(noise_data.valid_cnt[rf_path] < VALID_CNT) || !(noise_data.sval[rf_path] < VALID_MAX && noise_data.sval[rf_path] >= VALID_MIN)) {
+				continue;
+			}
 
+			noise_data.valid_cnt[rf_path]++;
+			noise_data.sum[rf_path] += noise_data.sval[rf_path];
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("rf_path:%d Valid sval = %d\n", rf_path, noise_data.sval[rf_path]));
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Sum of sval = %d,\n", noise_data.sum[rf_path]));
+			if (noise_data.valid_cnt[rf_path] == VALID_CNT) {
+				valid_done++;
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("After divided, rf_path:%d,sum = %d\n", rf_path, noise_data.sum[rf_path]));
 			}
 
 		}
 
 		/* printk("####### valid_done:%d #############\n",valid_done); */
 		if ((valid_done == max_rf_path) || (odm_get_progressing_time(p_dm_odm, start) > max_time)) {
-			for (rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) {
-				/* printk("%s PATH_%d - sum = %d, VALID_CNT = %d\n",__FUNCTION__,rf_path,noise_data.sum[rf_path], noise_data.valid_cnt[rf_path]); */
-				if (noise_data.valid_cnt[rf_path])
-					noise_data.sum[rf_path] /= noise_data.valid_cnt[rf_path];
-				else
-					noise_data.sum[rf_path]  = 0;
-			}
+			phydm_set_noise_data_sum(&noise_data, max_rf_path);
 			break;
 		}
 	}
 	reg_c50 = (u8)odm_get_bb_reg(p_dm_odm, REG_OFDM_0_XA_AGC_CORE1, MASKBYTE0);
 	reg_c50 &= ~BIT(7);
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("0x%x = 0x%02x(%d)\n", REG_OFDM_0_XA_AGC_CORE1, reg_c50, reg_c50));
-	p_dm_odm->noise_level.noise[ODM_RF_PATH_A] = (u8)(-110 + reg_c50 + noise_data.sum[ODM_RF_PATH_A]);
+	p_dm_odm->noise_level.noise[ODM_RF_PATH_A] = (s8)(-110 + reg_c50 + noise_data.sum[ODM_RF_PATH_A]);
 	p_dm_odm->noise_level.noise_all += p_dm_odm->noise_level.noise[ODM_RF_PATH_A];
 
 	if (max_rf_path == 2) {
 		reg_c58 = (u8)odm_get_bb_reg(p_dm_odm, REG_OFDM_0_XB_AGC_CORE1, MASKBYTE0);
 		reg_c58 &= ~BIT(7);
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("0x%x = 0x%02x(%d)\n", REG_OFDM_0_XB_AGC_CORE1, reg_c58, reg_c58));
-		p_dm_odm->noise_level.noise[ODM_RF_PATH_B] = (u8)(-110 + reg_c58 + noise_data.sum[ODM_RF_PATH_B]);
+		p_dm_odm->noise_level.noise[ODM_RF_PATH_B] = (s8)(-110 + reg_c58 + noise_data.sum[ODM_RF_PATH_B]);
 		p_dm_odm->noise_level.noise_all += p_dm_odm->noise_level.noise[ODM_RF_PATH_B];
 	}
 	p_dm_odm->noise_level.noise_all /= max_rf_path;
@@ -173,8 +176,8 @@ odm_inband_noise_monitor_ac_series(struct PHY_DM_STRUCT	*p_dm_odm, u8 is_pause_d
 {
 	s32          rxi_buf_anta, rxq_buf_anta; /*rxi_buf_antb, rxq_buf_antb;*/
 	s32	        value32, pwdb_A = 0, sval, noise, sum;
-	bool	        pd_flag;
-	u8			i, valid_cnt;
+	boolean	        pd_flag;
+	u8		valid_cnt;
 	u64	start = 0, func_start = 0, func_end = 0;
 
 
@@ -213,7 +216,7 @@ odm_inband_noise_monitor_ac_series(struct PHY_DM_STRUCT	*p_dm_odm, u8 is_pause_d
 		rxi_buf_anta = (value32 & 0xFFC00) >> 10; /*rxi_buf_anta=RegFA0[19:10]*/
 		rxq_buf_anta = value32 & 0x3FF; /*rxq_buf_anta=RegFA0[19:10]*/
 
-		pd_flag = (bool)((value32 & BIT(31)) >> 31);
+		pd_flag = (boolean)((value32 & BIT(31)) >> 31);
 
 		/*Not in packet detection period or Tx state */
 		if ((!pd_flag) || (rxi_buf_anta != 0x200)) {
@@ -241,17 +244,15 @@ odm_inband_noise_monitor_ac_series(struct PHY_DM_STRUCT	*p_dm_odm, u8 is_pause_d
 
 		sval = pwdb_A;
 
-		if (sval < 0 && sval >= -27) {
-			if (valid_cnt < VALID_CNT) {
-				valid_cnt++;
-				sum += sval;
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Valid sval = %d\n", sval));
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Sum of sval = %d,\n", sum));
-				if ((valid_cnt >= VALID_CNT) || (odm_get_progressing_time(p_dm_odm, start) > max_time)) {
-					sum /= VALID_CNT;
-					ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("After divided, sum = %d\n", sum));
-					break;
-				}
+		if ((sval < 0 && sval >= -27) && (valid_cnt < VALID_CNT)){
+			valid_cnt++;
+			sum += sval;
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Valid sval = %d\n", sval));
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Sum of sval = %d,\n", sum));
+			if ((valid_cnt >= VALID_CNT) || (odm_get_progressing_time(p_dm_odm, start) > max_time)) {
+				sum /= VALID_CNT;
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("After divided, sum = %d\n", sum));
+				break;
 			}
 		}
 	}
diff --git a/rtl8822BU/hal/phydm/phydm_noisemonitor.h b/rtl8822BU/hal/phydm/phydm_noisemonitor.h
index 3dbf1e8..05b2e50 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_noisemonitor.h
+++ b/rtl8822BU/hal/phydm/phydm_noisemonitor.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,11 +11,6 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
  *****************************************************************************/
 #ifndef	__ODMNOISEMONITOR_H__
 #define __ODMNOISEMONITOR_H__
diff --git a/rtl8822BU/hal/phydm/phydm_pathdiv.c b/rtl8822BU/hal/phydm/phydm_pathdiv.c
index aec5bbd..9a2ada6 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_pathdiv.c
+++ b/rtl8822BU/hal/phydm/phydm_pathdiv.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 /* ************************************************************
  * include files
@@ -436,19 +431,16 @@ phydm_dynamic_tx_path_init(
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _ODM_PATH_DIVERSITY_		*p_dm_path_div  = &(p_dm_odm->dm_path_div);
 	struct _ADAPTER		*p_adapter = p_dm_odm->adapter;
-#if ((DM_ODM_SUPPORT_TYPE == ODM_WIN) && USB_SWITCH_SUPPORT)
-	USB_MODE_MECH	*p_usb_mode_mech = &p_adapter->usb_mode_mechanism;
-#endif
 	u8			search_space_2[NUM_CHOOSE2_FROM4] = {PHYDM_AB, PHYDM_AC, PHYDM_AD, PHYDM_BC, PHYDM_BD, PHYDM_CD };
 	u8			search_space_3[NUM_CHOOSE3_FROM4] = {PHYDM_BCD, PHYDM_ACD,  PHYDM_ABD, PHYDM_ABC};
 
 #if ((DM_ODM_SUPPORT_TYPE == ODM_WIN) && USB_SWITCH_SUPPORT)
-	p_dm_path_div->is_u3_mode = (p_usb_mode_mech->cur_usb_mode == USB_MODE_U3) ? 1 : 0 ;
+	p_dm_path_div->is_u3_mode = (*p_dm_odm->hub_usb_mode == 2) ? 1 : 0 ;
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("[WIN USB] is_u3_mode = (( %d ))\n", p_dm_path_div->is_u3_mode));
 #else
 	p_dm_path_div->is_u3_mode = 1;
 #endif
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("Dynamic TX path Init 8814\n"));
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("is_u3_mode = (( %d ))\n", p_dm_path_div->is_u3_mode));
 
 	memcpy(&(p_dm_path_div->search_space_2[0]), &(search_space_2[0]), NUM_CHOOSE2_FROM4);
 	memcpy(&(p_dm_path_div->search_space_3[0]), &(search_space_3[0]), NUM_CHOOSE3_FROM4);
@@ -621,7 +613,7 @@ odm_path_diversity_init(
 
 	/*p_dm_odm->support_ability |= ODM_BB_PATH_DIV;*/
 
-	if (p_dm_odm->mp_mode == true)
+	if (*(p_dm_odm->p_mp_mode) == true)
 		return;
 
 	if (!(p_dm_odm->support_ability & ODM_BB_PATH_DIV)) {
diff --git a/rtl8822BU/hal/phydm/phydm_pathdiv.h b/rtl8822BU/hal/phydm/phydm_pathdiv.h
index 33e8f9e..e12b56f 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_pathdiv.h
+++ b/rtl8822BU/hal/phydm/phydm_pathdiv.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef	__PHYDMPATHDIV_H__
 #define    __PHYDMPATHDIV_H__
@@ -99,8 +94,8 @@ struct _ODM_PATH_DIVERSITY_ {
 	u32	path_d_cnt_all;
 
 	u8	dtp_period;
-	bool	is_become_linked;
-	bool	is_u3_mode;
+	boolean	is_become_linked;
+	boolean	is_u3_mode;
 	u8	num_tx_path;
 	u8	default_path;
 	u8	num_candidate;
@@ -109,13 +104,13 @@ struct _ODM_PATH_DIVERSITY_ {
 	u8	ant_candidate_3;
 	u8     phydm_dtp_state;
 	u8	dtp_check_patha_counter;
-	bool	fix_path_bfer;
+	boolean	fix_path_bfer;
 	u8	search_space_2[NUM_CHOOSE2_FROM4];
 	u8	search_space_3[NUM_CHOOSE3_FROM4];
 
 	u8	pre_tx_path;
 	u8	use_path_a_as_default_ant;
-	bool is_path_a_exist;
+	boolean is_path_a_exist;
 
 #endif
 };
@@ -203,12 +198,12 @@ odm_1t_path_diversity_init_92c(
 	struct _ADAPTER	*adapter
 );
 
-bool
+boolean
 odm_is_connected_92c(
 	struct _ADAPTER	*adapter
 );
 
-bool
+boolean
 odm_path_diversity_before_link92c(
 	/* struct _ADAPTER*	adapter */
 	struct PHY_DM_STRUCT		*p_dm_odm
@@ -269,8 +264,8 @@ odm_path_div_chk_ant_switch(
 void
 odm_cck_path_diversity_chk_per_pkt_rssi(
 	struct _ADAPTER		*adapter,
-	bool			is_def_port,
-	bool			is_match_bssid,
+	boolean			is_def_port,
+	boolean			is_match_bssid,
 	struct _WLAN_STA	*p_entry,
 	PRT_RFD			p_rfd,
 	u8			*p_desc
@@ -279,8 +274,8 @@ odm_cck_path_diversity_chk_per_pkt_rssi(
 void
 odm_path_div_chk_per_pkt_rssi(
 	struct _ADAPTER		*adapter,
-	bool			is_def_port,
-	bool			is_match_bssid,
+	boolean			is_def_port,
+	boolean			is_match_bssid,
 	struct _WLAN_STA	*p_entry,
 	PRT_RFD			p_rfd
 );
diff --git a/rtl8822BU/hal/phydm/phydm_pre_define.h b/rtl8822BU/hal/phydm/phydm_pre_define.h
index bca7782..95a8708 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_pre_define.h
+++ b/rtl8822BU/hal/phydm/phydm_pre_define.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 
 #ifndef	__PHYDMPREDEFINE_H__
@@ -26,8 +21,8 @@
  * 1  Definition
  * 1 ============================================================ */
 
-#define PHYDM_CODE_BASE		"PHYDM_TRUNK"
-#define PHYDM_RELEASE_DATE		"00000000"
+#define PHYDM_CODE_BASE		"PHYDM_v017"
+#define PHYDM_RELEASE_DATE		"20170306"
 
 /* Max path of IC */
 #define MAX_PATH_NUM_8188E		1
@@ -43,6 +38,8 @@
 #define MAX_PATH_NUM_8723D		1
 #define MAX_PATH_NUM_8197F		2
 #define MAX_PATH_NUM_8821C		1
+/* JJ ADD 20161014 */
+#define MAX_PATH_NUM_8710B		1
 
 /* Max RF path */
 #define ODM_RF_PATH_MAX 2
@@ -67,15 +64,23 @@
 
 /* number of entry */
 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
-	#define	ASSOCIATE_ENTRY_NUM					MACID_NUM_SW_LIMIT  /* Max size of asoc_entry[].*/
+	#ifdef DM_ODM_CE_MAC80211
+		/* defined in wifi.h (32+1) */
+	#else
+		#define	ASSOCIATE_ENTRY_NUM					MACID_NUM_SW_LIMIT  /* Max size of asoc_entry[].*/
+	#endif
 	#define	ODM_ASSOCIATE_ENTRY_NUM				ASSOCIATE_ENTRY_NUM
-	#elif(DM_ODM_SUPPORT_TYPE & (ODM_AP))
+#elif(DM_ODM_SUPPORT_TYPE & (ODM_AP))
 	#define ASSOCIATE_ENTRY_NUM					NUM_STAT
 	#define	ODM_ASSOCIATE_ENTRY_NUM				(ASSOCIATE_ENTRY_NUM+1)
 #else
 	#define ODM_ASSOCIATE_ENTRY_NUM				((ASSOCIATE_ENTRY_NUM*3)+1)
 #endif
 
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	#define RX_SMOOTH_FACTOR	20
+#endif
+
 /* -----MGN rate--------------------------------- */
 
 enum ODM_MGN_RATE {
@@ -194,16 +199,16 @@ enum ODM_MGN_RATE {
 #define ODM_RATE1M				0x00
 #define ODM_RATE2M				0x01
 #define ODM_RATE5_5M			0x02
-#define ODM_RATE11M				0x03
+#define ODM_RATE11M			0x03
 /* OFDM Rates, TxHT = 0 */
 #define ODM_RATE6M				0x04
 #define ODM_RATE9M				0x05
-#define ODM_RATE12M				0x06
-#define ODM_RATE18M				0x07
-#define ODM_RATE24M				0x08
-#define ODM_RATE36M				0x09
-#define ODM_RATE48M				0x0A
-#define ODM_RATE54M				0x0B
+#define ODM_RATE12M			0x06
+#define ODM_RATE18M			0x07
+#define ODM_RATE24M			0x08
+#define ODM_RATE36M			0x09
+#define ODM_RATE48M			0x0A
+#define ODM_RATE54M			0x0B
 /* MCS Rates, TxHT = 1 */
 #define ODM_RATEMCS0			0x0C
 #define ODM_RATEMCS1			0x0D
@@ -330,74 +335,97 @@ enum odm_ic_type_e {
 	ODM_RTL8197F	=	BIT(12),
 	ODM_RTL8821C	=	BIT(13),
 	ODM_RTL8814B	=	BIT(14),
-	ODM_RTL8198F	=	BIT(15)
+	ODM_RTL8198F	=	BIT(15),
+	ODM_RTL8710B	=	BIT(16),
+	ODM_RTL8192F	=	BIT(17),
+	ODM_RTL8822C	=	BIT(18)
 };
 
+/*========[Run time ic flag] ===============================================================================]*/
+
+#define ODM_IC_N_2SS	(ODM_RTL8192E | ODM_RTL8197F | ODM_RTL8192F)
+#define ODM_IC_AC_2SS	(ODM_RTL8812 | ODM_RTL8822B | ODM_RTL8822C)
 
-#define ODM_IC_1SS	(ODM_RTL8188E | ODM_RTL8188F | ODM_RTL8723B | ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8881A | ODM_RTL8821 | ODM_RTL8821C | ODM_RTL8195A)
-#define ODM_IC_2SS	(ODM_RTL8192E | ODM_RTL8197F | ODM_RTL8812 | ODM_RTL8822B)
+#define ODM_IC_1SS	(ODM_RTL8188E | ODM_RTL8188F | ODM_RTL8723B | ODM_RTL8703B | ODM_RTL8723D | ODM_RTL8881A | ODM_RTL8821 | ODM_RTL8821C | ODM_RTL8195A | ODM_RTL8710B)
+#define ODM_IC_2SS	(ODM_IC_N_2SS | ODM_IC_AC_2SS)
 #define ODM_IC_3SS	(ODM_RTL8814A)
 #define ODM_IC_4SS	(ODM_RTL8814B | ODM_RTL8198F)
 
-
-#define ODM_IC_11N_SERIES		(ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8703B | ODM_RTL8188F | ODM_RTL8723D | ODM_RTL8197F)
+#define ODM_IC_11N_SERIES		(ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8703B | ODM_RTL8188F | ODM_RTL8723D | ODM_RTL8197F | ODM_RTL8710B)
 #define ODM_IC_11AC_SERIES		(ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8881A | ODM_RTL8822B | ODM_RTL8821C)
+
 #define ODM_IC_11AC_1_SERIES		(ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8881A)
 #define ODM_IC_11AC_2_SERIES		(ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)
+
 #define ODM_IC_TXBF_SUPPORT		(ODM_RTL8192E | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8881A | ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8821C)
-#define ODM_IC_11N_GAIN_IDX_EDCCA		(ODM_RTL8195A | ODM_RTL8703B | ODM_RTL8188F | ODM_RTL8723D | ODM_RTL8197F)
+#define ODM_IC_11N_GAIN_IDX_EDCCA		(ODM_RTL8195A | ODM_RTL8703B | ODM_RTL8188F | ODM_RTL8723D | ODM_RTL8197F | ODM_RTL8710B)
 #define ODM_IC_11AC_GAIN_IDX_EDCCA		(ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)
-#define ODM_IC_PHY_STATUE_NEW_TYPE		(ODM_RTL8197F | ODM_RTL8822B | ODM_RTL8723D | ODM_RTL8821C)
+#define ODM_IC_PHY_STATUE_NEW_TYPE		(ODM_RTL8197F | ODM_RTL8822B | ODM_RTL8723D | ODM_RTL8821C | ODM_RTL8710B)
 
 #define PHYDM_IC_8051_SERIES		(ODM_RTL8881A | ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8703B | ODM_RTL8188F)
 #define PHYDM_IC_3081_SERIES		(ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8821C)
 
 #define PHYDM_IC_SUPPORT_LA_MODE	(ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8821C)
+#define PHYDM_IC_SUPPORT_MU_BFEE	(ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8814B)
+#define PHYDM_IC_SUPPORT_MU_BFER	(ODM_RTL8822B | ODM_RTL8814B)
+
 
+/*========[AC/N Support] ===============================================================================]*/
 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
 
-#ifdef RTK_AC_SUPPORT
+	#ifdef RTK_AC_SUPPORT
 	#define ODM_IC_11AC_SERIES_SUPPORT		1
-#else
+	#else
 	#define ODM_IC_11AC_SERIES_SUPPORT		0
-#endif
+	#endif
 
-#define ODM_IC_11N_SERIES_SUPPORT			1
-#define ODM_CONFIG_BT_COEXIST				0
+	#define ODM_IC_11N_SERIES_SUPPORT			1
+	#define ODM_CONFIG_BT_COEXIST				0
 
 #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 
-#define ODM_IC_11AC_SERIES_SUPPORT		1
-#define ODM_IC_11N_SERIES_SUPPORT			1
-#define ODM_CONFIG_BT_COEXIST				1
-
-#else
+	#define ODM_IC_11AC_SERIES_SUPPORT		1
+	#define ODM_IC_11N_SERIES_SUPPORT			1
+	#define ODM_CONFIG_BT_COEXIST				1
 
-#if ((RTL8188E_SUPPORT == 1) || \
-(RTL8723B_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8195A_SUPPORT == 1) || (RTL8703B_SUPPORT == 1) || \
-(RTL8188F_SUPPORT == 1) || (RTL8723D_SUPPORT == 1) || (RTL8197F_SUPPORT == 1))
-#define ODM_IC_11N_SERIES_SUPPORT			1
-#define ODM_IC_11AC_SERIES_SUPPORT		0
-#else
-#define ODM_IC_11N_SERIES_SUPPORT			0
-#define ODM_IC_11AC_SERIES_SUPPORT		1
-#endif
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
 
-#ifdef CONFIG_BT_COEXIST
+	#define ODM_IC_11AC_SERIES_SUPPORT		1
+	#define ODM_IC_11N_SERIES_SUPPORT			1
 	#define ODM_CONFIG_BT_COEXIST				1
+
 #else
-	#define ODM_CONFIG_BT_COEXIST				0
-#endif
+
+	#if ((RTL8188E_SUPPORT == 1) || \
+	(RTL8723B_SUPPORT == 1) || (RTL8192E_SUPPORT == 1) || (RTL8195A_SUPPORT == 1) || (RTL8703B_SUPPORT == 1) || \
+	(RTL8188F_SUPPORT == 1) || (RTL8723D_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8710B_SUPPORT == 1))
+		#define ODM_IC_11N_SERIES_SUPPORT			1
+		#define ODM_IC_11AC_SERIES_SUPPORT		0
+	#else
+		#define ODM_IC_11N_SERIES_SUPPORT			0
+		#define ODM_IC_11AC_SERIES_SUPPORT		1
+	#endif
+
+	#ifdef CONFIG_BT_COEXIST
+		#define ODM_CONFIG_BT_COEXIST				1
+	#else
+		#define ODM_CONFIG_BT_COEXIST				0
+	#endif
 
 #endif
 
 
-#if ((RTL8197F_SUPPORT == 1) || (RTL8723D_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1))
+/*========[New Phy-Status Support] =========================================================================]*/
+
+#if ((RTL8197F_SUPPORT == 1) || (RTL8723D_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8710B_SUPPORT == 1) )
 	#define ODM_PHY_STATUS_NEW_TYPE_SUPPORT			1
 #else
 	#define ODM_PHY_STATUS_NEW_TYPE_SUPPORT			0
 #endif
 
+/*==================================================================================================]*/
+
+
 /* ODM_CMNINFO_CUT_VER */
 enum odm_cut_version_e {
 	ODM_CUT_A		=	0,
@@ -672,6 +700,7 @@ enum odm_rf_radio_path_e {
 enum odm_parameter_init_e {
 	ODM_PRE_SETTING = 0,
 	ODM_POST_SETTING = 1,
+	ODM_INIT_FW_SETTING
 };
 
 #endif
diff --git a/rtl8822BU/hal/phydm/phydm_precomp.h b/rtl8822BU/hal/phydm/phydm_precomp.h
index 5ca623d..a2b8a90 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_precomp.h
+++ b/rtl8822BU/hal/phydm/phydm_precomp.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,17 +11,14 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef	__ODM_PRECOMP_H__
 #define __ODM_PRECOMP_H__
 
 #include "phydm_types.h"
+#include "phydm_features.h"
+#include "halrf/halrf_features.h"
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	#include "Precomp.h"		/* We need to include mp_precomp.h due to batch file setting. */
@@ -43,12 +40,14 @@
 		#define	ODM_ENDIAN_TYPE				ODM_ENDIAN_LITTLE
 	#endif
 
-	#ifdef AP_BUILD_WORKAROUND
-		#include "../8192cd_headers.h"
-		#include "../8192cd_debug.h"
-	#endif
+	#include "../8192cd_headers.h"
+	#include "../8192cd_debug.h"
 
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
+	#ifdef DM_ODM_CE_MAC80211
+		#include "../wifi.h"
+		#include "rtl_phydm.h"
+	#endif
 	#define __PACK
 	#define __WLAN_ATTRIB_PACK__
 #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
@@ -70,7 +69,7 @@
 
 #include "phydm_adc_sampling.h"
 
-#if (DM_ODM_SUPPORT_TYPE & ODM_CE)
+#if (DM_ODM_SUPPORT_TYPE & ODM_CE) && !defined(DM_ODM_CE_MAC80211)
 
 void
 phy_set_tx_power_limit(
@@ -83,7 +82,6 @@ phy_set_tx_power_limit(
 	u8	*channel,
 	u8	*power_limit
 );
-
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
@@ -92,6 +90,11 @@ phy_set_tx_power_limit(
 	#define RTL8723D_SUPPORT		0
 #endif
 
+/* JJ ADD 20161014 */
+#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP|ODM_IOT))
+#define RTL8710B_SUPPORT		0
+#endif
+
 #if RTL8188E_SUPPORT == 1
 	#define RTL8188E_T_SUPPORT 1
 	#ifdef CONFIG_SFW_SUPPORTED
@@ -114,24 +117,24 @@ phy_set_tx_power_limit(
 	#include "rtl8188e/version_rtl8188e.h"
 	#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 		#include "rtl8188e_hal.h"
-		#include "rtl8188e/halphyrf_8188e_ce.h"
+		#include "halrf/rtl8188e/halrf_8188e_ce.h"
 	#endif
 	#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-		#include "rtl8188e/halphyrf_8188e_win.h"
+		#include "halrf/rtl8188e/halrf_8188e_win.h"
 	#endif
 	#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-		#include "rtl8188e/halphyrf_8188e_ap.h"
+		#include "halrf/rtl8188e/halrf_8188e_ap.h"
 	#endif
 #endif /* 88E END */
 
 #if (RTL8192E_SUPPORT == 1)
 
 	#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-		#include "rtl8192e/halphyrf_8192e_win.h" /*FOR_8192E_IQK*/
+		#include "halrf/rtl8192e/halrf_8192e_win.h" /*FOR_8192E_IQK*/
 	#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
-		#include "rtl8192e/halphyrf_8192e_ap.h" /*FOR_8192E_IQK*/
+		#include "halrf/rtl8192e/halrf_8192e_ap.h" /*FOR_8192E_IQK*/
 	#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-		#include "rtl8192e/halphyrf_8192e_ce.h" /*FOR_8192E_IQK*/
+		#include "halrf/rtl8192e/halrf_8192e_ce.h" /*FOR_8192E_IQK*/
 	#endif
 
 	#include "rtl8192e/phydm_rtl8192e.h" /* FOR_8192E_IQK */
@@ -152,14 +155,14 @@ phy_set_tx_power_limit(
 #if (RTL8812A_SUPPORT == 1)
 
 	#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-		#include "rtl8812a/halphyrf_8812a_win.h"
+		#include "halrf/rtl8812a/halrf_8812a_win.h"
 	#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
-		#include "rtl8812a/halphyrf_8812a_ap.h"
+		#include "halrf/rtl8812a/halrf_8812a_ap.h"
 	#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-		#include "rtl8812a/halphyrf_8812a_ce.h"
+		#include "halrf/rtl8812a/halrf_8812a_ce.h"
 	#endif
 
-	/* #include "rtl8812a/HalPhyRf_8812A.h"  */ /* FOR_8812_IQK */
+	/* #include "halrf/rtl8812a/halrf_8812a.h"  */ /* FOR_8812_IQK */
 	#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
 		#include "rtl8812a/halhwimg8812a_bb.h"
 		#include "rtl8812a/halhwimg8812a_mac.h"
@@ -187,26 +190,26 @@ phy_set_tx_power_limit(
 		#include "rtl8814a/halhwimg8814a_fw.h"
 	#endif
 	#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-		#include "rtl8814a/halphyrf_8814a_win.h"
+		#include "halrf/rtl8814a/halrf_8814a_win.h"
 	#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-		#include "rtl8814a/halphyrf_8814a_ce.h"
+		#include "halrf/rtl8814a/halrf_8814a_ce.h"
 	#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
-		#include "rtl8814a/halphyrf_8814a_ap.h"
+		#include "halrf/rtl8814a/halrf_8814a_ap.h"
 	#endif
 	#include "rtl8814a/phydm_regconfig8814a.h"
 	#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 		#include "rtl8814a_hal.h"
-		#include "rtl8814a/phydm_iqk_8814a.h"
+		#include "halrf/rtl8814a/halrf_iqk_8814a.h"
 	#endif
 #endif /* 8814 END */
 
 #if (RTL8881A_SUPPORT == 1)/* FOR_8881_IQK */
 	#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-		#include "rtl8821a/phydm_iqk_8821a_win.h"
+		#include "halrf/rtl8821a/halrf_iqk_8821a_win.h"
 	#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-		#include "rtl8821a/phydm_iqk_8821a_ce.h"
+		#include "halrf/rtl8821a/halrf_iqk_8821a_ce.h"
 	#else
-		#include "rtl8821a/phydm_iqk_8821a_ap.h"
+		#include "halrf/rtl8821a/halrf_iqk_8821a_ap.h"
 	#endif
 	/* #include "rtl8881a/HalHWImg8881A_BB.h" */
 	/* #include "rtl8881a/HalHWImg8881A_MAC.h" */
@@ -224,13 +227,13 @@ phy_set_tx_power_limit(
 	#include "rtl8723b/hal8723breg.h"
 	#include "rtl8723b/version_rtl8723b.h"
 	#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-		#include "rtl8723b/halphyrf_8723b_win.h"
+		#include "halrf/rtl8723b/halrf_8723b_win.h"
 	#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-		#include "rtl8723b/halphyrf_8723b_ce.h"
+		#include "halrf/rtl8723b/halrf_8723b_ce.h"
 		#include "rtl8723b/halhwimg8723b_mp.h"
 		#include "rtl8723b_hal.h"
 	#else
-		#include "rtl8723b/halphyrf_8723b_ap.h"
+		#include "halrf/rtl8723b/halrf_8723b_ap.h"
 	#endif
 #endif
 
@@ -243,31 +246,61 @@ phy_set_tx_power_limit(
 	#include "rtl8821a/phydm_rtl8821a.h"
 	#include "rtl8821a/version_rtl8821a.h"
 	#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-		#include "rtl8821a/halphyrf_8821a_win.h"
+		#include "halrf/rtl8821a/halrf_8821a_win.h"
 	#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-		#include "rtl8821a/halphyrf_8821a_ce.h"
-		#include "rtl8821a/phydm_iqk_8821a_ce.h"/*for IQK*/
-		#include "rtl8812a/halphyrf_8812a_ce.h"/*for IQK,LCK,Power-tracking*/
+		#include "halrf/rtl8821a/halrf_8821a_ce.h"
+		#include "halrf/rtl8821a/halrf_iqk_8821a_ce.h"/*for IQK*/
+		#include "halrf/rtl8812a/halrf_8812a_ce.h"/*for IQK,LCK,Power-tracking*/
 		#include "rtl8812a_hal.h"
 	#else
 	#endif
 #endif
 
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+#include "../halmac/halmac_reg2.h"
+
+#define	LDPC_HT_ENABLE_RX			BIT(0)
+#define	LDPC_HT_ENABLE_TX			BIT(1)
+#define	LDPC_HT_TEST_TX_ENABLE			BIT(2)
+#define	LDPC_HT_CAP_TX				BIT(3)
+
+#define	STBC_HT_ENABLE_RX			BIT(0)
+#define	STBC_HT_ENABLE_TX			BIT(1)
+#define	STBC_HT_TEST_TX_ENABLE			BIT(2)
+#define	STBC_HT_CAP_TX				BIT(3)
+
+
+#define	LDPC_VHT_ENABLE_RX			BIT(0)
+#define	LDPC_VHT_ENABLE_TX			BIT(1)
+#define	LDPC_VHT_TEST_TX_ENABLE			BIT(2)
+#define	LDPC_VHT_CAP_TX				BIT(3)
+
+#define	STBC_VHT_ENABLE_RX			BIT(0)
+#define	STBC_VHT_ENABLE_TX			BIT(1)
+#define	STBC_VHT_TEST_TX_ENABLE			BIT(2)
+#define	STBC_VHT_CAP_TX				BIT(3)
+#endif
+
+
 #if (RTL8822B_SUPPORT == 1)
 	#include "rtl8822b/halhwimg8822b_mac.h"
 	#include "rtl8822b/halhwimg8822b_rf.h"
 	#include "rtl8822b/halhwimg8822b_bb.h"
 	#include "rtl8822b/halhwimg8822b_fw.h"
 	#include "rtl8822b/phydm_regconfig8822b.h"
-	#include "rtl8822b/halphyrf_8822b.h"
+	#include "halrf/rtl8822b/halrf_8822b.h"
 	#include "rtl8822b/phydm_rtl8822b.h"
 	#include "rtl8822b/phydm_hal_api8822b.h"
 	#include "rtl8822b/version_rtl8822b.h"
 
 	#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-		#include <hal_data.h>		/* struct HAL_DATA_TYPE */
-		#include <rtl8822b_hal.h>	/* RX_SMOOTH_FACTOR, reg definition and etc.*/
+		#ifdef DM_ODM_CE_MAC80211
+			#include "../halmac/halmac_reg_8822b.h"
+		#else
+			#include <hal_data.h>		/* struct HAL_DATA_TYPE */
+			#include <rtl8822b_hal.h>	/* RX_SMOOTH_FACTOR, reg definition and etc.*/
+		#endif
 	#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
 	#endif
 
@@ -279,7 +312,7 @@ phy_set_tx_power_limit(
 	#include "rtl8703b/halhwimg8703b_rf.h"
 	#include "rtl8703b/halhwimg8703b_bb.h"
 	#include "rtl8703b/halhwimg8703b_fw.h"
-	#include "rtl8703b/halphyrf_8703b.h"
+	#include "halrf/rtl8703b/halrf_8703b.h"
 	#include "rtl8703b/version_rtl8703b.h"
 	#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 		#include "rtl8703b_hal.h"
@@ -294,7 +327,7 @@ phy_set_tx_power_limit(
 	#include "rtl8188f/hal8188freg.h"
 	#include "rtl8188f/phydm_rtl8188f.h"
 	#include "rtl8188f/phydm_regconfig8188f.h"
-	#include "rtl8188f/halphyrf_8188f.h" /* for IQK,LCK,Power-tracking */
+	#include "halrf/rtl8188f/halrf_8188f.h" /* for IQK,LCK,Power-tracking */
 	#include "rtl8188f/version_rtl8188f.h"
 	#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 		#include "rtl8188f_hal.h"
@@ -311,7 +344,7 @@ phy_set_tx_power_limit(
 		#include "rtl8723d/halhwimg8723d_fw.h"
 		#include "rtl8723d/hal8723dreg.h"
 		#include "rtl8723d/phydm_rtl8723d.h"
-		#include "rtl8723d/halphyrf_8723d.h"
+		#include "halrf/rtl8723d/halrf_8723d.h"
 		#include "rtl8723d/version_rtl8723d.h"
 	#endif
 	#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
@@ -319,6 +352,25 @@ phy_set_tx_power_limit(
 	#endif
 #endif /* 8723D End */
 
+/* JJ ADD 20161014 */
+#if (RTL8710B_SUPPORT == 1)
+	#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
+
+		#include "rtl8710b/halhwimg8710b_bb.h"
+		#include "rtl8710b/halhwimg8710b_mac.h"
+		#include "rtl8710b/halhwimg8710b_rf.h"
+		#include "rtl8710b/phydm_regconfig8710b.h"
+		#include "rtl8710b/halhwimg8710b_fw.h"
+		#include "rtl8710b/hal8710breg.h"
+		#include "rtl8710b/phydm_rtl8710b.h"
+		#include "halrf/rtl8710b/halrf_8710b.h"
+		#include "rtl8710b/version_rtl8710b.h"
+	#endif
+	#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
+		#include "rtl8710b_hal.h"
+	#endif
+#endif /* 8710B End */
+
 #if (RTL8197F_SUPPORT == 1)
 	#include "rtl8197f/halhwimg8197f_mac.h"
 	#include "rtl8197f/halhwimg8197f_rf.h"
@@ -327,8 +379,8 @@ phy_set_tx_power_limit(
 	#include "rtl8197f/version_rtl8197f.h"
 	#include "rtl8197f/phydm_rtl8197f.h"
 	#include "rtl8197f/phydm_regconfig8197f.h"
-	#include "rtl8197f/halphyrf_8197f.h"
-	#include "rtl8197f/phydm_iqk_8197f.h"
+	#include "halrf/rtl8197f/halrf_8197f.h"
+	#include "halrf/rtl8197f/halrf_iqk_8197f.h"
 #endif
 
 #if (RTL8821C_SUPPORT == 1)
@@ -341,7 +393,7 @@ phy_set_tx_power_limit(
 	#include "rtl8821c/halhwimg8821c_bb.h"
 	#include "rtl8821c/halhwimg8821c_fw.h"
 	#include "rtl8821c/phydm_regconfig8821c.h"
-	#include "rtl8821c/halphyrf_8821c.h"
+	#include "halrf/rtl8821c/halrf_8821c.h"
 	#include "rtl8821c/version_rtl8821c.h"
 	#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 		#include "rtl8821c_hal.h"
diff --git a/rtl8822BU/hal/phydm/phydm_psd.c b/rtl8822BU/hal/phydm/phydm_psd.c
new file mode 100644
index 0000000..f870621
--- a/dev/null
+++ b/rtl8822BU/hal/phydm/phydm_psd.c
@@ -0,0 +1,439 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+

+//============================================================

+// include files

+//============================================================

+#include "mp_precomp.h"
+#include "phydm_precomp.h"

+

+#if (CONFIG_PSD_TOOL == 1)

+

+u32

+phydm_get_psd_data(

+	void			*p_dm_void,

+	u32			psd_tone_idx,

+	u32			igi

+	)

+{

+	struct	PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;

+	struct	_PHYDM_PSD_	*p_dm_psd_table = &(p_dm_odm->dm_psd_table);

+	u32		psd_report = 0;

+	

+	odm_set_bb_reg(p_dm_odm, p_dm_psd_table->psd_reg, 0x3ff, psd_tone_idx);

+	

+	odm_set_bb_reg(p_dm_odm, p_dm_psd_table->psd_reg, BIT(22), 1); /*PSD trigger start*/

+	ODM_delay_us(10);

+	odm_set_bb_reg(p_dm_odm, p_dm_psd_table->psd_reg, BIT(22), 0); /*PSD trigger stop*/

+

+	psd_report = odm_get_bb_reg(p_dm_odm, p_dm_psd_table->psd_report_reg, 0xffff);

+	psd_report = odm_convert_to_db(psd_report) + igi;

+

+	return psd_report;

+}

+

+u8

+phydm_psd_stop_trx(

+	void		*p_dm_void

+	)

+{

+	struct	PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;

+	u32		i;

+	u8		trx_idle_success = false;

+	u32		dbg_port_value = 0;

+

+	/*[Stop TRX]---------------------------------------------------------------------*/

+	if (phydm_set_bb_dbg_port(p_dm_odm, BB_DBGPORT_PRIORITY_3, 0x0) == false) /*set debug port to 0x0*/

+		return STOP_TRX_FAIL;

+	

+	for (i = 0; i<10000; i++) {

+		dbg_port_value = phydm_get_bb_dbg_port_value(p_dm_odm);

+		if ((dbg_port_value & (BIT(17) | BIT(3))) == 0)	/* PHYTXON && CCA_all */ {

+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_API, ODM_DBG_LOUD, ("PSD wait for ((%d)) times\n", i));

+			

+			trx_idle_success = true;

+			break;

+		}

+	}

+	

+	if (trx_idle_success) {

+		

+		odm_set_bb_reg(p_dm_odm, 0x520, 0xff0000, 0xff); /*pause all TX queue*/

+		

+		if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {

+			odm_set_bb_reg(p_dm_odm, 0x808, BIT(28), 0); /*disable CCK block*/

+			odm_set_bb_reg(p_dm_odm, 0x838, BIT(1), 1); /*disable OFDM RX CCA*/

+		} else {

+			/*TBD*/

+			odm_set_bb_reg(p_dm_odm, 0x800, BIT(24), 0); /* disable whole CCK block */

+			odm_set_bb_reg(p_dm_odm, 0xC14, MASKDWORD, 0x0); /* [ Set IQK Matrix = 0 ] equivalent to [ Turn off CCA] */

+		}

+			

+	} else {

+		return STOP_TRX_FAIL;

+	}

+

+	phydm_release_bb_dbg_port(p_dm_odm);

+	

+	return STOP_TRX_SUCCESS;

+	

+}

+

+u8		psd_result_cali_tone_8821[7]= {21, 28, 33, 93, 98, 105, 127};

+u8		psd_result_cali_val_8821[7] = {67,69,71,72,71,69,67};	

+

+void

+phydm_psd(

+	void		*p_dm_void,

+	u32		igi,

+	u16		start_point,

+	u16		stop_point

+	)

+{

+	struct	PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;

+	struct	_PHYDM_PSD_	*p_dm_psd_table = &(p_dm_odm->dm_psd_table);

+	u32		i = 0, mod_tone_idx;

+	u32		t = 0;

+	u16		fft_max_half_bw;

+	u32		psd_igi_a_reg;

+	u32		psd_igi_b_reg;

+	u16		psd_fc_channel = p_dm_psd_table->psd_fc_channel;

+	u8		ag_rf_mode_reg = 0;

+	u8		rf_reg18_9_8 = 0;

+	u32		psd_result_tmp = 0;

+	u8		psd_result = 0;

+	u8		psd_result_cali_tone[7] = {0};

+	u8		psd_result_cali_val[7] = {0};

+	u8		noise_table_idx = 0;

+

+	if (p_dm_odm->support_ic_type == ODM_RTL8821) {

+		odm_move_memory(p_dm_odm, psd_result_cali_tone, psd_result_cali_tone_8821, 7);

+		odm_move_memory(p_dm_odm, psd_result_cali_val, psd_result_cali_val_8821, 7);

+	}

+	

+	p_dm_psd_table->psd_in_progress = 1;

+

+	/*[Stop DIG]*/

+	p_dm_odm->support_ability &= ~(ODM_BB_DIG);

+	p_dm_odm->support_ability &= ~(ODM_BB_FA_CNT);

+

+

+

+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_API, ODM_DBG_LOUD, ("PSD Start =>\n"));

+

+	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {

+		psd_igi_a_reg = 0xc50;

+		psd_igi_b_reg = 0xe50;

+	} else {

+		psd_igi_a_reg = 0xc50;

+		psd_igi_b_reg = 0xc58;

+	}

+	

+	/*[back up IGI]*/

+	p_dm_psd_table->initial_gain_backup = odm_get_bb_reg(p_dm_odm, psd_igi_a_reg, 0xff); 

+	odm_set_bb_reg(p_dm_odm, psd_igi_a_reg, 0xff, 0x6e); /*IGI target at 0dBm & make it can't CCA*/

+	odm_set_bb_reg(p_dm_odm, psd_igi_b_reg, 0xff, 0x6e); /*IGI target at 0dBm & make it can't CCA*/

+	ODM_delay_us(10);

+	

+	if (phydm_psd_stop_trx(p_dm_odm) == STOP_TRX_FAIL) {

+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_API, ODM_DBG_LOUD, ("STOP_TRX_FAIL\n"));

+		return;

+	}

+

+	/*[Set IGI]*/

+	odm_set_bb_reg(p_dm_odm, psd_igi_a_reg, 0xff, igi);

+	odm_set_bb_reg(p_dm_odm, psd_igi_b_reg, 0xff, igi);

+	

+	/*[Backup RF Reg]*/

+	p_dm_psd_table->rf_0x18_bkp = odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x18, RFREGOFFSETMASK);

+

+	if (psd_fc_channel > 14) {

+		

+		rf_reg18_9_8 = 1;

+		

+		if (36 <= psd_fc_channel && psd_fc_channel <= 64) 

+			ag_rf_mode_reg = 0x1;

+		else if (100 <= psd_fc_channel && psd_fc_channel <= 140) 

+			ag_rf_mode_reg = 0x3; 

+		else if (140 < psd_fc_channel) 

+			ag_rf_mode_reg = 0x5; 

+	}

+

+	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x18, 0xff, psd_fc_channel);     /* Set RF fc*/

+	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x18, 0x300, rf_reg18_9_8);

+	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x18, 0xc00, p_dm_psd_table->psd_bw_rf_reg);     /*2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */

+	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x18, 0xf0000, ag_rf_mode_reg);     /* Set RF ag fc mode*/

+

+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_API, ODM_DBG_LOUD, ("0xc50=((0x%x))\n", odm_get_bb_reg(p_dm_odm, 0xc50, MASKDWORD)));

+	/*ODM_RT_TRACE(p_dm_odm, ODM_COMP_API, ODM_DBG_LOUD, ("RF0x0=((0x%x))\n", odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x0, RFREGOFFSETMASK)));*/

+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_API, ODM_DBG_LOUD, ("RF0x18=((0x%x))\n", odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x18, RFREGOFFSETMASK)));

+	

+	/*[Stop 3-wires]*/

+	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {

+		odm_set_bb_reg(p_dm_odm, 0xc00, 0xf, 0x4);/*	hardware 3-wire off */

+		odm_set_bb_reg(p_dm_odm, 0xe00, 0xf, 0x4);/*	hardware 3-wire off */

+	} else {

+		odm_set_bb_reg(p_dm_odm, 0x88c, 0xf00000, 0xf);	/* 3 wire Disable    88c[23:20]=0xf */

+	}

+	ODM_delay_us(10);

+

+	if (stop_point > (p_dm_psd_table->fft_smp_point-1))

+		stop_point = (p_dm_psd_table->fft_smp_point-1);	

+

+	if (start_point > (p_dm_psd_table->fft_smp_point-1))

+		start_point = (p_dm_psd_table->fft_smp_point-1);

+

+	if (start_point > stop_point)

+		stop_point = start_point;

+

+

+	for (i = start_point; i <= stop_point; i++ ) {

+

+		fft_max_half_bw = (p_dm_psd_table->fft_smp_point)>>1;

+

+		if (i < fft_max_half_bw) {

+			mod_tone_idx = i + fft_max_half_bw;

+		} else {

+			mod_tone_idx = i - fft_max_half_bw;

+		}

+		

+		psd_result_tmp = 0;

+		for (t = 0; t < p_dm_psd_table->sw_avg_time; t++) {

+			psd_result_tmp += phydm_get_psd_data(p_dm_odm, mod_tone_idx, igi);

+			/**/

+		}

+		psd_result = (u8)((psd_result_tmp/p_dm_psd_table->sw_avg_time)) - p_dm_psd_table->psd_pwr_common_offset;

+

+		if( p_dm_psd_table->fft_smp_point == 128 && (p_dm_psd_table->noise_k_en)) {

+

+			if (i > psd_result_cali_tone[noise_table_idx]) {

+				noise_table_idx ++;

+			}

+

+			if (noise_table_idx > 6)

+				noise_table_idx = 6;

+

+			if (psd_result >= psd_result_cali_val[noise_table_idx])

+				psd_result = psd_result - psd_result_cali_val[noise_table_idx];

+			else

+				psd_result = 0;

+			

+

+			p_dm_psd_table->psd_result[i] = psd_result;

+		}

+		

+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_API, ODM_DBG_LOUD, ("[%d] N_cali = %d, PSD = %d\n", mod_tone_idx, psd_result_cali_val[noise_table_idx],  psd_result));

+

+	}

+

+	/*[Start 3-wires]*/

+	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {

+		odm_set_bb_reg(p_dm_odm, 0xc00, 0xf, 0x7);/*	hardware 3-wire on */

+		odm_set_bb_reg(p_dm_odm, 0xe00, 0xf, 0x7);/*	hardware 3-wire on */

+	} else {

+		odm_set_bb_reg(p_dm_odm, 0x88c, 0xf00000, 0x0);	/* 3 wire enable    88c[23:20]=0x0 */

+	}

+	ODM_delay_us(10);

+

+	/*[Revert Reg]*/

+	odm_set_bb_reg(p_dm_odm, 0x520, 0xff0000, 0x0); /*start all TX queue*/

+	odm_set_bb_reg(p_dm_odm, 0x808, BIT(28), 1); /*enable CCK block*/

+	odm_set_bb_reg(p_dm_odm, 0x838, BIT(1), 0); /*enable OFDM RX CCA*/

+	

+	odm_set_bb_reg(p_dm_odm, psd_igi_a_reg, 0xff, p_dm_psd_table->initial_gain_backup);

+	odm_set_bb_reg(p_dm_odm, psd_igi_b_reg, 0xff, p_dm_psd_table->initial_gain_backup);

+	

+	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x18, RFREGOFFSETMASK, p_dm_psd_table->rf_0x18_bkp);

+	

+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_API, ODM_DBG_LOUD, ("PSD finished\n\n"));

+	

+	p_dm_odm->support_ability |= ODM_BB_DIG;

+	p_dm_odm->support_ability |= ODM_BB_FA_CNT;

+	p_dm_psd_table->psd_in_progress = 0;

+	

+

+}

+

+void

+phydm_psd_para_setting(

+	void		*p_dm_void,

+	u8		sw_avg_time,

+	u8		hw_avg_time,	

+	u8		i_q_setting,

+	u16		fft_smp_point,

+	u8		ant_sel,

+	u8		psd_input,

+	u8		channel,

+	u8		noise_k_en

+	)

+{

+	struct	PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;

+	struct	_PHYDM_PSD_	*p_dm_psd_table = &(p_dm_odm->dm_psd_table);

+	u8		fft_smp_point_idx = 0;

+

+	p_dm_psd_table->fft_smp_point = fft_smp_point;

+

+	if (sw_avg_time == 0)

+		sw_avg_time = 1;

+	

+	p_dm_psd_table->sw_avg_time = sw_avg_time;

+	p_dm_psd_table->psd_fc_channel = channel;

+	p_dm_psd_table->noise_k_en = noise_k_en;

+		

+	if (fft_smp_point == 128)

+		fft_smp_point_idx = 0;

+	else if (fft_smp_point == 256)

+		fft_smp_point_idx = 1;

+	else if (fft_smp_point == 512)

+		fft_smp_point_idx = 2;

+	else if (fft_smp_point == 1024)

+		fft_smp_point_idx = 3;

+		

+	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {

+		

+		odm_set_bb_reg(p_dm_odm, 0x910, BIT(11) | BIT(10), i_q_setting);

+		odm_set_bb_reg(p_dm_odm, 0x910, BIT(13) | BIT(12), hw_avg_time);

+		odm_set_bb_reg(p_dm_odm, 0x910, BIT(15) | BIT(14), fft_smp_point_idx);

+		odm_set_bb_reg(p_dm_odm, 0x910, BIT(17) | BIT(16), ant_sel);

+		odm_set_bb_reg(p_dm_odm, 0x910, BIT(23), psd_input);

+

+	} else {

+

+	}

+

+	/*bw = (*p_dm_odm->p_band_width); //ODM_BW20M */

+	/*channel = *(p_dm_odm->p_channel);*/

+	

+	

+

+

+}

+

+void

+phydm_psd_init(

+	void		*p_dm_void

+	)

+{

+	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;

+	struct	_PHYDM_PSD_	*p_dm_psd_table = &(p_dm_odm->dm_psd_table);

+

+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_API, ODM_DBG_LOUD, ("PSD para init\n"));

+

+	p_dm_psd_table->psd_in_progress = false;

+	

+	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {

+		

+		p_dm_psd_table->psd_reg = 0x910;

+		p_dm_psd_table->psd_report_reg = 0xF44;

+

+		if (ODM_IC_11AC_2_SERIES)

+			p_dm_psd_table->psd_bw_rf_reg = 1;	/*2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */

+		else

+			p_dm_psd_table->psd_bw_rf_reg = 2;	/*2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */

+		

+	} else {

+	

+		p_dm_psd_table->psd_reg = 0x808;

+		p_dm_psd_table->psd_report_reg = 0x8B4;

+		p_dm_psd_table->psd_bw_rf_reg = 2; /*2b'11: 20MHz, 2b'10: 40MHz, 2b'01: 80MHz */

+	}

+

+	if (p_dm_odm->support_ic_type == ODM_RTL8812)

+		p_dm_psd_table->psd_pwr_common_offset = 0;

+	else if (p_dm_odm->support_ic_type == ODM_RTL8821)

+		p_dm_psd_table->psd_pwr_common_offset = 0;

+	else

+		p_dm_psd_table->psd_pwr_common_offset = 0;

+	

+	phydm_psd_para_setting(p_dm_odm, 1, 2, 3, 128, 0, 0, 7, 0);

+	/*phydm_psd(p_dm_odm, 0x3c, 0, 127);*/			/* target at -50dBm */

+

+

+}

+

+void
+phydm_psd_debug(

+	void		*p_dm_void,
+	char		input[][16],

+	u32		*_used,
+	char		*output,

+	u32		*_out_len,
+	u32		input_num
+)
+{
+	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	char		help[] = "-h";

+	u32		var1[10] = {0};

+	u32		used = *_used;

+	u32		out_len = *_out_len;

+	u8		i;

+

+	if ((strcmp(input[1], help) == 0)) {

+		PHYDM_SNPRINTF((output + used, out_len - used, "{0} {sw_avg} {hw_avg 0:3} {1:I,2:Q,3:IQ} {fft_point: 128*(1:4)} {path_sel 0~3} {0:ADC, 1:RXIQC} {CH} {noise_k}\n"));

+		PHYDM_SNPRINTF((output + used, out_len - used, "{1} {IGI(hex)} {start_point} {stop_point}\n"));

+

+	} else {

+	

+

+		PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);

+

+		if (var1[0] == 0) {

+

+			for (i = 1; i < 10; i++) {

+				if (input[i + 1]) {

+					PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);

+				}

+			}

+			

+			PHYDM_SNPRINTF((output + used, out_len - used, "sw_avg_time=((%d)), hw_avg_time=((%d)), IQ=((%d)), fft=((%d)), path=((%d)), input =((%d)) ch=((%d)), noise_k=((%d))\n", 

+				var1[1], var1[2], var1[3], var1[4], var1[5], var1[6], (u8)var1[7], (u8)var1[8]));

+			phydm_psd_para_setting(p_dm_odm, (u8)var1[1], (u8)var1[2], (u8)var1[3], (u16)var1[4], (u8)var1[5], (u8)var1[6], (u8)var1[7], (u8)var1[8]);

+			

+		} else if (var1[0] == 1) {

+

+			PHYDM_SSCANF(input[2], DCMD_HEX, &var1[1]);

+			PHYDM_SSCANF(input[3], DCMD_DECIMAL, &var1[2]);

+			PHYDM_SSCANF(input[4], DCMD_DECIMAL, &var1[3]);

+			PHYDM_SNPRINTF((output + used, out_len - used, "IGI=((0x%x)), start_point=((%d)), stop_point=((%d))\n", var1[1], var1[2], var1[3]));

+			p_dm_odm->debug_components |= ODM_COMP_API;

+			phydm_psd(p_dm_odm, var1[1], (u16)var1[2], (u16)var1[3]);

+			p_dm_odm->debug_components &= (~ODM_COMP_API);

+		}

+

+	}

+

+

+	

+}

+

+u8

+phydm_get_psd_result_table(

+	void		*p_dm_void,

+	int 		index

+	)

+{

+	struct	PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;

+	struct	_PHYDM_PSD_	*p_dm_psd_table = &(p_dm_odm->dm_psd_table);

+	u8 		temp_result = 0;

+

+	if(index<128)

+		temp_result = p_dm_psd_table->psd_result[index];

+

+	return temp_result;

+	

+}

+

+#endif

+

diff --git a/rtl8822BU/hal/phydm/phydm_psd.h b/rtl8822BU/hal/phydm/phydm_psd.h
new file mode 100644
index 0000000..80d3617
--- a/dev/null
+++ b/rtl8822BU/hal/phydm/phydm_psd.h
@@ -0,0 +1,96 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+

+#ifndef	__PHYDMPSD_H__

+#define    __PHYDMPSD_H__

+

+/*#define PSD_VERSION	"1.0"*/  /*2016.09.22  Dino*/

+#define PSD_VERSION	"1.1"  /*2016.10.07  Dino, Add Option for PSD Tone index Selection */

+

+#if (CONFIG_PSD_TOOL == 1)

+

+

+#define	STOP_TRX_SUCCESS	1

+#define	STOP_TRX_FAIL	0

+

+

+struct _PHYDM_PSD_ {

+

+	u8	psd_in_progress;

+	u32	psd_reg;

+	u32	psd_report_reg;

+	u8	psd_pwr_common_offset;

+	u16	sw_avg_time;

+	u16	fft_smp_point;

+	u32	initial_gain_backup;

+	u32	rf_0x18_bkp;

+	u16	psd_fc_channel;

+	u32	psd_bw_rf_reg;

+	u8	psd_result[128];

+	u8	noise_k_en;

+};

+

+u32

+phydm_get_psd_data(

+	void			*p_dm_void,

+	u32			psd_tone_idx,

+	u32			igi

+);

+

+void
+phydm_psd_debug(

+	void		*p_dm_void,
+	char		input[][16],

+	u32		*_used,
+	char		*output,

+	u32		*_out_len,
+	u32		input_num
+);

+

+void

+phydm_psd(

+	void		*p_dm_void,

+	u32		igi,

+	u16		start_point,

+	u16		stop_point

+);

+

+void

+phydm_psd_para_setting(

+	void		*p_dm_void,

+	u8		sw_avg_time,

+	u8		hw_avg_time,

+	u8		i_q_setting,

+	u16		fft_smp_point,

+	u8		ant_sel,

+	u8		psd_input,

+	u8		channel,

+	u8		noise_k_en

+);

+

+void

+phydm_psd_init(

+	void		*p_dm_void

+);

+

+u8

+phydm_get_psd_result_table(

+	void		*p_dm_void,

+	int		index

+);

+

+#endif

+#endif

+

diff --git a/rtl8822BU/hal/phydm/phydm_rainfo.c b/rtl8822BU/hal/phydm/phydm_rainfo.c
index 3b936c3..991cecf 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_rainfo.c
+++ b/rtl8822BU/hal/phydm/phydm_rainfo.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 /* ************************************************************
  * include files
@@ -238,7 +233,8 @@ odm_ra_para_adjust_init(
 #endif
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("odm_ra_para_adjust_init\n"));
 
-	if (p_dm_odm->support_ic_type & (ODM_RTL8188F | ODM_RTL8195A | ODM_RTL8703B | ODM_RTL8723B | ODM_RTL8188E | ODM_RTL8723D))
+/* JJ ADD 20161014 */
+	if (p_dm_odm->support_ic_type & (ODM_RTL8188F | ODM_RTL8195A | ODM_RTL8703B | ODM_RTL8723B | ODM_RTL8188E | ODM_RTL8723D | ODM_RTL8710B))
 		p_ra_table->rate_length = rate_size_ht_1ss;
 	else if (p_dm_odm->support_ic_type & (ODM_RTL8192E | ODM_RTL8197F))
 		p_ra_table->rate_length = rate_size_ht_2ss;
@@ -303,11 +299,15 @@ odm_c2h_ra_para_report_handler(
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+#if (defined(CONFIG_RA_DBG_CMD))
 	struct _rate_adaptive_table_			*p_ra_table = &p_dm_odm->dm_ra_table;
+#endif
 
 	u8	para_idx = cmd_buf[0]; /*Retry Penalty, NH, NL*/
+#if (defined(CONFIG_RA_DBG_CMD))
 	u8	rate_type_start = cmd_buf[1];
 	u8	rate_type_length = cmd_len - 2;
+#endif
 	u8	i;
 
 
@@ -418,10 +418,6 @@ phydm_ra_dynamic_retry_count(
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _rate_adaptive_table_		*p_ra_table = &p_dm_odm->dm_ra_table;
-	struct sta_info		*p_entry;
-	u8	i, retry_offset;
-	u32	ma_rx_tp;
 
 	if (!(p_dm_odm->support_ability & ODM_BB_DYNAMIC_ARFR))
 		return;
@@ -538,7 +534,6 @@ phydm_ra_dynamic_retry_limit(
 #if (defined(CONFIG_RA_DYNAMIC_RTY_LIMIT))
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _rate_adaptive_table_		*p_ra_table = &p_dm_odm->dm_ra_table;
-	struct sta_info		*p_entry;
 	u8	i, retry_offset;
 	u32	ma_rx_tp;
 
@@ -707,16 +702,14 @@ phydm_c2h_ra_report_handler(
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _rate_adaptive_table_		*p_ra_table = &p_dm_odm->dm_ra_table;
-	u8	legacy_table[12] = {1, 2, 5, 11, 6, 9, 12, 18, 24, 36, 48, 54};
 	u8	macid = cmd_buf[1];
 	u8	rate = cmd_buf[0];
 	u8	rate_idx = rate & 0x7f; /*remove bit7 SGI*/
-	u8	pre_rate = p_ra_table->link_tx_rate[macid];
 	u8	rate_order;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	struct _ADAPTER	*adapter = p_dm_odm->adapter;
 
-	GET_HAL_DATA(adapter)->current_ra_rate = hw_rate_to_m_rate(rate_idx);
+	GET_HAL_DATA(adapter)->CurrentRARate = HwRateToMRate(rate_idx);
 #endif
 
 
@@ -790,7 +783,7 @@ odm_rssi_monitor_init(
 
 	p_ra_table->PT_collision_pre = true;	/*used in odm_dynamic_arfb_select(WIN only)*/
 
-	p_hal_data->undecorated_smoothed_pwdb = -1;
+	p_hal_data->UndecoratedSmoothedPWDB = -1;
 	p_hal_data->ra_rpt_linked = false;
 #endif
 
@@ -805,12 +798,13 @@ odm_ra_post_action_on_assoc(
 	void	*p_dm_void
 )
 {
+#if 0
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	/*
-		p_dm_odm->h2c_rarpt_connect = 1;
-		odm_rssi_monitor_check(p_dm_odm);
-		p_dm_odm->h2c_rarpt_connect = 0;
-	*/
+
+	p_dm_odm->h2c_rarpt_connect = 1;
+	odm_rssi_monitor_check(p_dm_odm);
+	p_dm_odm->h2c_rarpt_connect = 0;
+#endif
 }
 
 void
@@ -856,7 +850,7 @@ odm_rssi_monitor_check_mp(
 	struct _rate_adaptive_table_			*p_ra_table = &p_dm_odm->dm_ra_table;
 	u8			h2c_parameter[H2C_0X42_LENGTH] = {0};
 	u32			i;
-	bool			is_ext_ra_info = true;
+	boolean			is_ext_ra_info = true;
 	u8			cmdlen = H2C_0X42_LENGTH;
 	u8			tx_bf_en = 0, stbc_en = 0;
 
@@ -864,15 +858,15 @@ odm_rssi_monitor_check_mp(
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
 	struct sta_info		*p_entry = NULL;
 	s32			tmp_entry_max_pwdb = 0, tmp_entry_min_pwdb = 0xff;
-	PMGNT_INFO		p_mgnt_info = &adapter->mgnt_info;
-	PMGNT_INFO		p_default_mgnt_info = &adapter->mgnt_info;
+	PMGNT_INFO		p_mgnt_info = &adapter->MgntInfo;
+	PMGNT_INFO		p_default_mgnt_info = &adapter->MgntInfo;
 	u64			cur_tx_ok_cnt = 0, cur_rx_ok_cnt = 0;
 #if (BEAMFORMING_SUPPORT == 1)
 #ifndef BEAMFORMING_VERSION_1
 	enum beamforming_cap beamform_cap = BEAMFORMING_CAP_NONE;
 #endif
 #endif
-	struct _ADAPTER	*p_loop_adapter = get_default_adapter(adapter);
+	struct _ADAPTER	*p_loop_adapter = GetDefaultAdapter(adapter);
 
 	if (p_dm_odm->support_ic_type == ODM_RTL8188E) {
 		is_ext_ra_info = false;
@@ -882,48 +876,48 @@ odm_rssi_monitor_check_mp(
 	while (p_loop_adapter) {
 
 		if (p_loop_adapter != NULL) {
-			p_mgnt_info = &p_loop_adapter->mgnt_info;
-			cur_tx_ok_cnt = p_loop_adapter->tx_stats.num_tx_bytes_unicast - p_mgnt_info->last_tx_ok_cnt;
-			cur_rx_ok_cnt = p_loop_adapter->rx_stats.num_rx_bytes_unicast - p_mgnt_info->last_rx_ok_cnt;
-			p_mgnt_info->last_tx_ok_cnt = cur_tx_ok_cnt;
-			p_mgnt_info->last_rx_ok_cnt = cur_rx_ok_cnt;
+			p_mgnt_info = &p_loop_adapter->MgntInfo;
+			cur_tx_ok_cnt = p_loop_adapter->TxStats.NumTxBytesUnicast - p_mgnt_info->lastTxOkCnt;
+			cur_rx_ok_cnt = p_loop_adapter->RxStats.NumRxBytesUnicast - p_mgnt_info->lastRxOkCnt;
+			p_mgnt_info->lastTxOkCnt = cur_tx_ok_cnt;
+			p_mgnt_info->lastRxOkCnt = cur_rx_ok_cnt;
 		}
 
 		for (i = 0; i < ASSOCIATE_ENTRY_NUM; i++) {
 
-			if (is_ap_mode_exist(p_loop_adapter)) {
-				if (get_first_ext_adapter(p_loop_adapter) != NULL &&
-				    get_first_ext_adapter(p_loop_adapter) == p_loop_adapter)
-					p_entry = asoc_entry_enum_station(p_loop_adapter, i);
-				else if (get_first_go_port(p_loop_adapter) != NULL &&
-					 is_first_go_adapter(p_loop_adapter))
-					p_entry = asoc_entry_enum_station(p_loop_adapter, i);
+			if (IsAPModeExist(p_loop_adapter)) {
+				if (GetFirstExtAdapter(p_loop_adapter) != NULL &&
+				    GetFirstExtAdapter(p_loop_adapter) == p_loop_adapter)
+				p_entry = AsocEntry_EnumStation(p_loop_adapter, i);
+				else if (GetFirstGOPort(p_loop_adapter) != NULL &&
+					 IsFirstGoAdapter(p_loop_adapter))
+				p_entry = AsocEntry_EnumStation(p_loop_adapter, i);
 			} else {
-				if (get_default_adapter(p_loop_adapter) == p_loop_adapter)
-					p_entry = asoc_entry_enum_station(p_loop_adapter, i);
+				if (GetDefaultAdapter(p_loop_adapter) == p_loop_adapter)
+					p_entry = AsocEntry_EnumStation(p_loop_adapter, i);
 			}
 
 			if (p_entry != NULL) {
-				if (p_entry->is_associated) {
+				if (p_entry->bAssociated) {
 
-					RT_DISP_ADDR(FDM, DM_PWDB, ("p_entry->mac_addr ="), p_entry->mac_addr);
+					RT_DISP_ADDR(FDM, DM_PWDB, ("p_entry->mac_addr ="), p_entry->MacAddr);
 					RT_DISP(FDM, DM_PWDB, ("p_entry->rssi = 0x%x(%d)\n",
 						p_entry->rssi_stat.undecorated_smoothed_pwdb, p_entry->rssi_stat.undecorated_smoothed_pwdb));
 
 					/* 2 BF_en */
 #if (BEAMFORMING_SUPPORT == 1)
 #ifndef BEAMFORMING_VERSION_1
-					beamform_cap = phydm_beamforming_get_entry_beam_cap_by_mac_id(p_dm_odm, p_entry->associated_mac_id);
+					beamform_cap = phydm_beamforming_get_entry_beam_cap_by_mac_id(p_dm_odm, p_entry->AssociatedMacId);
 					if (beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU))
 						tx_bf_en = 1;
 #else
-					if (beamform_get_support_beamformer_cap(get_default_adapter(adapter), p_entry))
+					if (Beamform_GetSupportBeamformerCap(GetDefaultAdapter(adapter), p_entry))
 						tx_bf_en = 1;
 #endif
 #endif
 					/* 2 STBC_en */
-					if ((IS_WIRELESS_MODE_AC(adapter) && TEST_FLAG(p_entry->vht_info.STBC, STBC_VHT_ENABLE_TX)) ||
-					    TEST_FLAG(p_entry->ht_info.STBC, STBC_HT_ENABLE_TX))
+					if ((IS_WIRELESS_MODE_AC(adapter) && TEST_FLAG(p_entry->VHTInfo.STBC, STBC_VHT_ENABLE_TX)) ||
+					    TEST_FLAG(p_entry->HTInfo.STBC, STBC_HT_ENABLE_TX))
 						stbc_en = 1;
 
 					if (p_entry->rssi_stat.undecorated_smoothed_pwdb < tmp_entry_min_pwdb)
@@ -968,7 +962,7 @@ odm_rssi_monitor_check_mp(
 
 					h2c_parameter[2] = (u8)(p_entry->rssi_stat.undecorated_smoothed_pwdb & 0xFF);
 					/* h2c_parameter[1] = 0x20;   */ /* fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 */
-					h2c_parameter[0] = (p_entry->associated_mac_id);
+					h2c_parameter[0] = (p_entry->AssociatedMacId);
 
 					odm_fill_h2c_cmd(p_dm_odm, ODM_H2C_RSSI_REPORT, cmdlen, h2c_parameter);
 				}
@@ -976,29 +970,29 @@ odm_rssi_monitor_check_mp(
 				break;
 		}
 
-		p_loop_adapter = get_next_ext_adapter(p_loop_adapter);
+		p_loop_adapter = GetNextExtAdapter(p_loop_adapter);
 	}
 
 
 	/*Default port*/
 	if (tmp_entry_max_pwdb != 0) {	/* If associated entry is found */
-		p_hal_data->entry_max_undecorated_smoothed_pwdb = tmp_entry_max_pwdb;
+		p_hal_data->EntryMaxUndecoratedSmoothedPWDB = tmp_entry_max_pwdb;
 		RT_DISP(FDM, DM_PWDB, ("EntryMaxPWDB = 0x%x(%d)\n",	tmp_entry_max_pwdb, tmp_entry_max_pwdb));
 	} else
-		p_hal_data->entry_max_undecorated_smoothed_pwdb = 0;
+		p_hal_data->EntryMaxUndecoratedSmoothedPWDB = 0;
 
 	if (tmp_entry_min_pwdb != 0xff) { /* If associated entry is found */
-		p_hal_data->entry_min_undecorated_smoothed_pwdb = tmp_entry_min_pwdb;
+		p_hal_data->EntryMinUndecoratedSmoothedPWDB = tmp_entry_min_pwdb;
 		RT_DISP(FDM, DM_PWDB, ("EntryMinPWDB = 0x%x(%d)\n", tmp_entry_min_pwdb, tmp_entry_min_pwdb));
 
 	} else
-		p_hal_data->entry_min_undecorated_smoothed_pwdb = 0;
+		p_hal_data->EntryMinUndecoratedSmoothedPWDB = 0;
 
 	/* Default porti sent RSSI to FW */
-	if (p_hal_data->is_use_ra_mask) {
+	if (p_hal_data->bUseRAMask) {
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("1 RA First Link, RSSI[%d] = ((%d)) , ra_rpt_linked = ((%d))\n",
-			WIN_DEFAULT_PORT_MACID, p_hal_data->undecorated_smoothed_pwdb, p_hal_data->ra_rpt_linked));
-		if (p_hal_data->undecorated_smoothed_pwdb > 0) {
+			WIN_DEFAULT_PORT_MACID, p_hal_data->UndecoratedSmoothedPWDB, p_hal_data->ra_rpt_linked));
+		if (p_hal_data->UndecoratedSmoothedPWDB > 0) {
 
 			PRT_HIGH_THROUGHPUT			p_ht_info = GET_HT_INFO(p_default_mgnt_info);
 			PRT_VERY_HIGH_THROUGHPUT	p_vht_info = GET_VHT_INFO(p_default_mgnt_info);
@@ -1011,14 +1005,14 @@ odm_rssi_monitor_check_mp(
 			if (beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT | BEAMFORMER_CAP_VHT_SU))
 				tx_bf_en = 1;
 #else
-			if (beamform_get_support_beamformer_cap(get_default_adapter(adapter), NULL))
+			if (Beamform_GetSupportBeamformerCap(GetDefaultAdapter(adapter), NULL))
 				tx_bf_en = 1;
 #endif
 #endif
 
 			/* STBC_en*/
-			if ((IS_WIRELESS_MODE_AC(adapter) && TEST_FLAG(p_vht_info->vht_cur_stbc, STBC_VHT_ENABLE_TX)) ||
-			    TEST_FLAG(p_ht_info->ht_cur_stbc, STBC_HT_ENABLE_TX))
+			if ((IS_WIRELESS_MODE_AC(adapter) && TEST_FLAG(p_vht_info->VhtCurStbc, STBC_VHT_ENABLE_TX)) ||
+			    TEST_FLAG(p_ht_info->HtCurStbc, STBC_HT_ENABLE_TX))
 				stbc_en = 1;
 
 			h2c_parameter[4] = (p_ra_table->RA_threshold_offset & 0x7f) | (p_ra_table->RA_offset_direction << 7);
@@ -1062,7 +1056,7 @@ odm_rssi_monitor_check_mp(
 				ODM_RT_TRACE(p_dm_odm, ODM_COMP_NOISY_DETECT, ODM_DBG_LOUD, ("[RSSIMonitorCheckMP] h2c_parameter=%x\n", h2c_parameter[3]));
 			}
 
-			h2c_parameter[2] = (u8)(p_hal_data->undecorated_smoothed_pwdb & 0xFF);
+			h2c_parameter[2] = (u8)(p_hal_data->UndecoratedSmoothedPWDB & 0xFF);
 			/*h2c_parameter[1] = 0x20;*/	/* fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1*/
 			h2c_parameter[0] = WIN_DEFAULT_PORT_MACID;		/* fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1*/
 
@@ -1078,17 +1072,17 @@ odm_rssi_monitor_check_mp(
 			odm_fill_h2c_cmd(p_dm_odm, ODM_H2C_RSSI_REPORT, cmdlen, h2c_parameter);
 		}
 	} else
-		platform_efio_write_1byte(adapter, 0x4fe, (u8)p_hal_data->undecorated_smoothed_pwdb);
+		PlatformEFIOWrite1Byte(adapter, 0x4fe, (u8)p_hal_data->UndecoratedSmoothedPWDB);
 
 	if ((p_dm_odm->support_ic_type == ODM_RTL8812) || (p_dm_odm->support_ic_type == ODM_RTL8192E))
 		odm_rssi_dump_to_register(p_dm_odm);
 
 
 	{
-		struct _ADAPTER *p_loop_adapter = get_default_adapter(adapter);
-		bool		default_pointer_value, *p_is_link_temp = &default_pointer_value;
+		struct _ADAPTER *p_loop_adapter = GetDefaultAdapter(adapter);
+		boolean		default_pointer_value, *p_is_link_temp = &default_pointer_value;
 		s32	global_rssi_min = 0xFF, local_rssi_min;
-		bool		is_link = false;
+		boolean		is_link = false;
 
 		while (p_loop_adapter) {
 			local_rssi_min = phydm_find_minimum_rssi(p_dm_odm, p_loop_adapter, p_is_link_temp);
@@ -1100,23 +1094,23 @@ odm_rssi_monitor_check_mp(
 			if ((local_rssi_min < global_rssi_min) && (*p_is_link_temp))
 				global_rssi_min = local_rssi_min;
 
-			p_loop_adapter = get_next_ext_adapter(p_loop_adapter);
+			p_loop_adapter = GetNextExtAdapter(p_loop_adapter);
 		}
 
-		p_hal_data->is_linked = is_link;
-		odm_cmn_info_update(&p_hal_data->dm_out_src, ODM_CMNINFO_LINK, (u64)is_link);
+		p_hal_data->bLinked = is_link;
+		odm_cmn_info_update(&p_hal_data->DM_OutSrc, ODM_CMNINFO_LINK, (u64)is_link);
 
 		if (is_link)
-			odm_cmn_info_update(&p_hal_data->dm_out_src, ODM_CMNINFO_RSSI_MIN, (u64)global_rssi_min);
+			odm_cmn_info_update(&p_hal_data->DM_OutSrc, ODM_CMNINFO_RSSI_MIN, (u64)global_rssi_min);
 		else
-			odm_cmn_info_update(&p_hal_data->dm_out_src, ODM_CMNINFO_RSSI_MIN, 0);
+			odm_cmn_info_update(&p_hal_data->DM_OutSrc, ODM_CMNINFO_RSSI_MIN, 0);
 
 	}
 
 #endif	/*  #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) */
 }
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && !defined(DM_ODM_CE_MAC80211)
 /*H2C_RSSI_REPORT*/
 s8 phydm_rssi_report(struct PHY_DM_STRUCT *p_dm_odm, u8 mac_id)
 {
@@ -1142,6 +1136,9 @@ s8 phydm_rssi_report(struct PHY_DM_STRUCT *p_dm_odm, u8 mac_id)
 	if (IS_MCAST(p_entry->hwaddr))  /*if(psta->mac_id ==1)*/
 		return _FAIL;
 
+	if (p_dm_odm->is_in_lps_pg)
+		return _FAIL;
+
 	if (p_entry->rssi_stat.undecorated_smoothed_pwdb == (-1)) {
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("%s mac_id:%u, mac:"MAC_FMT", rssi == -1\n", __func__, p_entry->mac_id, MAC_ARG(p_entry->hwaddr)));
 		return _FAIL;
@@ -1177,7 +1174,9 @@ s8 phydm_rssi_report(struct PHY_DM_STRUCT *p_dm_odm, u8 mac_id)
 			STBC_TX = TEST_FLAG(p_entry->vhtpriv.stbc_cap, STBC_VHT_ENABLE_TX);
 		else
 #endif
+#ifdef CONFIG_80211N_HT
 			STBC_TX = TEST_FLAG(p_entry->htpriv.stbc_cap, STBC_HT_ENABLE_TX);
+#endif
 	}
 
 	h2c_parameter[0] = (u8)(p_entry->mac_id & 0xFF);
@@ -1258,6 +1257,87 @@ void phydm_ra_rssi_rpt_wk(void *p_context)
 }
 #endif
 
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+void
+odm_rssi_monitor_check_ce(
+	void		*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	struct _rate_adaptive_table_	*p_ra_table = &p_dm_odm->dm_ra_table;
+	struct rtl_priv		*rtlpriv = (struct rtl_priv *)p_dm_odm->adapter;
+	struct rtl_mac *mac = rtl_mac(rtlpriv);
+	struct rtl_sta_info           *p_entry;
+	int	i;
+	int	tmp_entry_min_pwdb = 0xff;
+	unsigned long	cur_tx_ok_cnt = 0, cur_rx_ok_cnt = 0;
+	u8 UL_DL_STATE = 0, STBC_TX = 0, tx_bf_en = 0;
+	u8 h2c_parameter[H2C_0X42_LENGTH] = {0};
+	u8 cmdlen = H2C_0X42_LENGTH;
+	u8 macid = 0;
+
+	if (p_dm_odm->is_linked != _TRUE)
+		return;
+
+	for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
+		p_entry = (struct rtl_sta_info *)p_dm_odm->p_odm_sta_info[i];
+		if (!IS_STA_VALID(p_entry))
+			continue;
+
+		if (is_multicast_ether_addr(p_entry->mac_addr) ||
+		    is_broadcast_ether_addr(p_entry->mac_addr))
+			continue;
+
+		if (p_entry->rssi_stat.undecorated_smoothed_pwdb == (-1))
+			continue;
+
+		/* calculate min_pwdb */
+		if (p_entry->rssi_stat.undecorated_smoothed_pwdb < tmp_entry_min_pwdb)
+			tmp_entry_min_pwdb = p_entry->rssi_stat.undecorated_smoothed_pwdb;
+
+		/* report RSSI */
+		cur_tx_ok_cnt = rtlpriv->stats.txbytesunicast_inperiod;
+		cur_rx_ok_cnt = rtlpriv->stats.rxbytesunicast_inperiod;
+
+		if (cur_rx_ok_cnt > (cur_tx_ok_cnt * 6))
+			UL_DL_STATE = 1;
+		else
+			UL_DL_STATE = 0;
+
+		if (mac->opmode == NL80211_IFTYPE_AP ||
+		    mac->opmode == NL80211_IFTYPE_ADHOC) {
+			struct ieee80211_sta *sta =
+				container_of((void *)p_entry, struct ieee80211_sta, drv_priv);
+			macid = sta->aid + 1;
+		}
+
+		h2c_parameter[0] = macid;
+		h2c_parameter[2] = p_entry->rssi_stat.undecorated_smoothed_pwdb & 0x7F;
+
+		if (UL_DL_STATE)
+			h2c_parameter[3] |= RAINFO_BE_RX_STATE;
+
+		if (tx_bf_en)
+			h2c_parameter[3] |= RAINFO_BF_STATE;
+		if (STBC_TX)
+			h2c_parameter[3] |= RAINFO_STBC_STATE;
+		if (p_dm_odm->noisy_decision)
+			h2c_parameter[3] |= RAINFO_NOISY_STATE;
+
+		if (p_entry->rssi_stat.is_send_rssi == RA_RSSI_STATE_SEND) {
+			h2c_parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
+			p_entry->rssi_stat.is_send_rssi = RA_RSSI_STATE_HOLD;
+		}
+
+		h2c_parameter[4] = (p_ra_table->RA_threshold_offset & 0x7f) | (p_ra_table->RA_offset_direction << 7);
+
+		odm_fill_h2c_cmd(p_dm_odm, ODM_H2C_RSSI_REPORT, cmdlen, h2c_parameter);
+	}
+
+	if (tmp_entry_min_pwdb != 0xff)
+		p_dm_odm->rssi_min = tmp_entry_min_pwdb;
+}
+#else
 void
 odm_rssi_monitor_check_ce(
 	void		*p_dm_void
@@ -1311,6 +1391,7 @@ odm_rssi_monitor_check_ce(
 	/* odm_cmn_info_update(&p_hal_data->odmpriv,ODM_CMNINFO_RSSI_MIN, pdmpriv->min_undecorated_pwdb_for_dm); */
 #endif/* if (DM_ODM_SUPPORT_TYPE == ODM_CE) */
 }
+#endif
 
 
 void
@@ -1325,13 +1406,13 @@ odm_rssi_monitor_check_ap(
 	struct _rate_adaptive_table_			*p_ra_table = &p_dm_odm->dm_ra_table;
 	u8			h2c_parameter[H2C_0X42_LENGTH] = {0};
 	u32			 i;
-	bool			is_ext_ra_info = true;
+	boolean			is_ext_ra_info = true;
 	u8			cmdlen = H2C_0X42_LENGTH;
 	u8			tx_bf_en = 0, stbc_en = 0;
 
 	struct rtl8192cd_priv	*priv		= p_dm_odm->priv;
 	struct sta_info	*pstat;
-	bool			act_bfer = false;
+	boolean			act_bfer = false;
 
 #if (BEAMFORMING_SUPPORT == 1)
 	u8	idx = 0xff;
@@ -1482,15 +1563,15 @@ odm_rate_adaptive_mask_init(
 	struct _ODM_RATE_ADAPTIVE	*p_odm_ra = &p_dm_odm->rate_adaptive;
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	PMGNT_INFO		p_mgnt_info = &p_dm_odm->adapter->mgnt_info;
+	PMGNT_INFO		p_mgnt_info = &p_dm_odm->adapter->MgntInfo;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_dm_odm->adapter);
 
-	p_mgnt_info->ratr_state = DM_RATR_STA_INIT;
+	p_mgnt_info->Ratr_State = DM_RATR_STA_INIT;
 
-	if (p_mgnt_info->dm_type == dm_type_by_driver)
-		p_hal_data->is_use_ra_mask = true;
+	if (p_mgnt_info->DM_Type == dm_type_by_driver)
+		p_hal_data->bUseRAMask = true;
 	else
-		p_hal_data->is_use_ra_mask = false;
+		p_hal_data->bUseRAMask = false;
 
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	p_odm_ra->type = dm_type_by_driver;
@@ -1623,6 +1704,17 @@ phydm_trans_platform_bw(
 	else if (BW == HT_CHANNEL_WIDTH_5)
 		BW = PHYDM_BW_5;
 
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+
+	if (BW == HT_CHANNEL_WIDTH_20)
+		BW = PHYDM_BW_20;
+
+	else if (BW == HT_CHANNEL_WIDTH_20_40)
+		BW = PHYDM_BW_40;
+
+	else if (BW == HT_CHANNEL_WIDTH_80)
+		BW = PHYDM_BW_80;
+
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 
 	if (BW == CHANNEL_WIDTH_20)
@@ -1750,6 +1842,7 @@ phydm_trans_platform_wireless_mode(
 
 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
 
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 
 	if (wireless_mode == WIRELESS_11A)
@@ -1899,6 +1992,7 @@ phydm_rate_id_mapping(
 
 	case PHYDM_WIRELESS_MODE_AC_24G:
 	{
+		/*Becareful to set "Lowest rate" while using PHYDM_ARFR4_AC_3SS in 2.4G/5G*/
 		if (phydm_BW >= PHYDM_BW_80) {
 			if (phydm_rf_type == PHYDM_RF_1T1R)
 				rate_id_idx = PHYDM_ARFR1_AC_1SS;
@@ -1910,8 +2004,10 @@ phydm_rate_id_mapping(
 
 			if (phydm_rf_type == PHYDM_RF_1T1R)
 				rate_id_idx = PHYDM_ARFR2_AC_2G_1SS;
-			else
+			else if (phydm_rf_type == PHYDM_RF_2T2R)
 				rate_id_idx = PHYDM_ARFR3_AC_2G_2SS;
+			else
+				rate_id_idx = PHYDM_ARFR4_AC_3SS;
 		}
 	}
 	break;
@@ -1940,7 +2036,6 @@ phydm_update_hal_ra_mask(
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u32			mask_rate_threshold;
 	u8			phydm_rf_type;
 	u8			phydm_BW;
 	u32			ratr_bitmap = *ratr_bitmap_lsb_in, ratr_bitmap_msb = *ratr_bitmap_msb_in;
@@ -2083,7 +2178,6 @@ phydm_RA_level_decision(
 )
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	u8	ra_lowest_rate;
 	u8	ra_rate_floor_table[RA_FLOOR_TABLE_SIZE] = {20, 34, 38, 42, 46, 50, 100}; /*MCS0 ~ MCS4 , VHT1SS MCS0 ~ MCS4 , G 6M~24M*/
 	u8	new_ratr_state = 0;
 	u8	i;
@@ -2125,87 +2219,102 @@ odm_refresh_rate_adaptive_mask_mp(
 	struct _ADAPTER				*p_adapter	 =  p_dm_odm->adapter;
 	struct _ADAPTER				*p_target_adapter = NULL;
 	HAL_DATA_TYPE			*p_hal_data = GET_HAL_DATA(p_adapter);
-	PMGNT_INFO				p_mgnt_info = get_default_mgnt_info(p_adapter);
+	PMGNT_INFO				p_mgnt_info = GetDefaultMgntInfo(p_adapter);
+	struct _ADAPTER			*p_loop_adapter = GetDefaultAdapter(p_adapter);
+	PMGNT_INFO					p_loop_mgnt_info = &(p_loop_adapter->MgntInfo);
+	HAL_DATA_TYPE				*p_loop_hal_data = GET_HAL_DATA(p_loop_adapter);
+	
 	u32		i;
 	struct sta_info *p_entry;
 	u8		ratr_state_new;
 
-	if (p_adapter->is_driver_stopped) {
+	if (p_adapter->bDriverStopped) {
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_refresh_rate_adaptive_mask(): driver is going to unload\n"));
 		return;
 	}
 
-	if (!p_hal_data->is_use_ra_mask) {
+	if (!p_hal_data->bUseRAMask) {
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_refresh_rate_adaptive_mask(): driver does not control rate adaptive mask\n"));
 		return;
 	}
 
 	/* if default port is connected, update RA table for default port (infrastructure mode only) */
-	if (p_mgnt_info->m_assoc && (!ACTING_AS_AP(p_adapter))) {
-		odm_refresh_ldpc_rts_mp(p_adapter, p_dm_odm, p_mgnt_info->m_mac_id,  p_mgnt_info->iot_peer, p_hal_data->undecorated_smoothed_pwdb);
+	/* Need to consider other ports for P2P cases*/
+
+	while(p_loop_adapter){
+
+		p_loop_mgnt_info = &(p_loop_adapter->MgntInfo);
+		p_loop_hal_data = GET_HAL_DATA(p_loop_adapter);
+	
+		if (p_loop_mgnt_info->mAssoc && (!ACTING_AS_AP(p_loop_adapter))) {
+			odm_refresh_ldpc_rts_mp(p_loop_adapter, p_dm_odm, p_loop_mgnt_info->mMacId, p_loop_mgnt_info->IOTPeer, p_loop_hal_data->UndecoratedSmoothedPWDB);
 		/*ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Infrasture mode\n"));*/
 
 #if RA_MASK_PHYDMLIZE_WIN
-		ratr_state_new = phydm_RA_level_decision(p_dm_odm, p_hal_data->undecorated_smoothed_pwdb, p_mgnt_info->ratr_state);
+			ratr_state_new = phydm_RA_level_decision(p_dm_odm, p_loop_hal_data->UndecoratedSmoothedPWDB, p_loop_mgnt_info->Ratr_State);
 
-		if ((p_mgnt_info->ratr_state != ratr_state_new) || (p_ra_table->force_update_ra_mask_count >= FORCED_UPDATE_RAMASK_PERIOD)) {
+			if ((p_loop_mgnt_info->Ratr_State != ratr_state_new) || (p_ra_table->force_update_ra_mask_count >= FORCED_UPDATE_RAMASK_PERIOD)) {
 
 			p_ra_table->force_update_ra_mask_count = 0;
-			ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr :"), p_mgnt_info->bssid);
+				ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr :"), p_loop_mgnt_info->Bssid);
 			ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Update RA Level: ((%x)) -> ((%x)),  RSSI = ((%d))\n\n",
-				p_mgnt_info->ratr_state, ratr_state_new, p_hal_data->undecorated_smoothed_pwdb));
+					p_mgnt_info->Ratr_State, ratr_state_new, p_loop_hal_data->UndecoratedSmoothedPWDB));
 
-			p_mgnt_info->ratr_state = ratr_state_new;
-			p_adapter->hal_func.update_hal_ra_mask_handler(p_adapter, p_mgnt_info->m_mac_id, NULL, ratr_state_new);
-		} else {
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Stay in RA level  = (( %d ))\n\n", ratr_state_new));
-			/**/
-		}
+				p_loop_mgnt_info->Ratr_State = ratr_state_new;
+				p_adapter->HalFunc.UpdateHalRAMaskHandler(p_loop_adapter, p_loop_mgnt_info->mMacId, NULL, ratr_state_new);
+			} else {
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Stay in RA level  = (( %d ))\n\n", ratr_state_new));
+				/**/
+			}
 
 #else
-		if (odm_ra_state_check(p_dm_odm, p_hal_data->undecorated_smoothed_pwdb, p_mgnt_info->is_set_tx_power_training_by_oid, &p_mgnt_info->ratr_state)) {
-			ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), p_mgnt_info->bssid);
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", p_hal_data->undecorated_smoothed_pwdb, p_mgnt_info->ratr_state));
-			p_adapter->hal_func.update_hal_ra_mask_handler(p_adapter, p_mgnt_info->m_mac_id, NULL, p_mgnt_info->ratr_state);
-		} else if (p_dm_odm->is_change_state) {
-			ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), p_mgnt_info->bssid);
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training state, is_disable_power_training = %d\n", p_dm_odm->is_disable_power_training));
-			p_adapter->hal_func.update_hal_ra_mask_handler(p_adapter, p_mgnt_info->m_mac_id, NULL, p_mgnt_info->ratr_state);
-		}
+			if (odm_ra_state_check(p_dm_odm, p_hal_data->UndecoratedSmoothedPWDB, p_mgnt_info->bSetTXPowerTrainingByOid, &p_mgnt_info->Ratr_State)) {
+				ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), p_mgnt_info->Bssid);
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", p_hal_data->UndecoratedSmoothedPWDB, p_mgnt_info->Ratr_State));
+				p_adapter->HalFunc.UpdateHalRAMaskHandler(p_adapter, p_mgnt_info->mMacId, NULL, p_mgnt_info->Ratr_State);
+			} else if (p_dm_odm->is_change_state) {
+				ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), p_mgnt_info->Bssid);
+				ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training state, is_disable_power_training = %d\n", p_dm_odm->is_disable_power_training));
+				p_adapter->HalFunc.UpdateHalRAMaskHandler(p_adapter, p_mgnt_info->mMacId, NULL, p_mgnt_info->Ratr_State);
+			}
 #endif
+
+		}
+
+		p_loop_adapter = GetNextExtAdapter(p_loop_adapter);
 	}
 
 	/*  */
 	/* The following part configure AP/VWifi/IBSS rate adaptive mask. */
 	/*  */
 
-	if (p_mgnt_info->m_ibss)	/* Target: AP/IBSS peer. */
-		p_target_adapter = get_default_adapter(p_adapter);
+	if (p_mgnt_info->mIbss)	/* Target: AP/IBSS peer. */
+		p_target_adapter = GetDefaultAdapter(p_adapter);
 	else
-		p_target_adapter = get_first_ap_adapter(p_adapter);
+		p_target_adapter = GetFirstAPAdapter(p_adapter);
 
 	/* if extension port (softap) is started, updaet RA table for more than one clients associate */
 	if (p_target_adapter != NULL) {
 		for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
 
-			p_entry = asoc_entry_enum_station(p_target_adapter, i);
+			p_entry = AsocEntry_EnumStation(p_target_adapter, i);
 
 			if (IS_STA_VALID(p_entry)) {
 
-				odm_refresh_ldpc_rts_mp(p_adapter, p_dm_odm, p_entry->associated_mac_id, p_entry->iot_peer, p_entry->rssi_stat.undecorated_smoothed_pwdb);
+				odm_refresh_ldpc_rts_mp(p_target_adapter, p_dm_odm, p_entry->AssociatedMacId, p_entry->IOTPeer, p_entry->rssi_stat.undecorated_smoothed_pwdb);
 
 #if RA_MASK_PHYDMLIZE_WIN
-				ratr_state_new = phydm_RA_level_decision(p_dm_odm, p_entry->rssi_stat.undecorated_smoothed_pwdb, p_entry->ratr_state);
+				ratr_state_new = phydm_RA_level_decision(p_dm_odm, p_entry->rssi_stat.undecorated_smoothed_pwdb, p_entry->Ratr_State);
 
-				if ((p_entry->ratr_state != ratr_state_new) || (p_ra_table->force_update_ra_mask_count >= FORCED_UPDATE_RAMASK_PERIOD)) {
+				if ((p_entry->Ratr_State != ratr_state_new) || (p_ra_table->force_update_ra_mask_count >= FORCED_UPDATE_RAMASK_PERIOD)) {
 
 					p_ra_table->force_update_ra_mask_count = 0;
-					ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr :"), p_entry->mac_addr);
+					ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr :"), p_entry->MacAddr);
 					ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Update Tx RA Level: ((%x)) -> ((%x)),  RSSI = ((%d))\n",
-						p_entry->ratr_state, ratr_state_new,  p_entry->rssi_stat.undecorated_smoothed_pwdb));
+						p_entry->Ratr_State, ratr_state_new,  p_entry->rssi_stat.undecorated_smoothed_pwdb));
 
-					p_entry->ratr_state = ratr_state_new;
-					p_adapter->hal_func.update_hal_ra_mask_handler(p_adapter, p_entry->associated_mac_id, NULL, ratr_state_new);
+					p_entry->Ratr_State = ratr_state_new;
+					p_adapter->HalFunc.UpdateHalRAMaskHandler(p_target_adapter, p_entry->AssociatedMacId, p_entry, ratr_state_new);
 				} else {
 					ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Stay in RA level  = (( %d ))\n\n", ratr_state_new));
 					/**/
@@ -2214,13 +2323,13 @@ odm_refresh_rate_adaptive_mask_mp(
 
 #else
 
-				if (odm_ra_state_check(p_dm_odm, p_entry->rssi_stat.undecorated_smoothed_pwdb, p_mgnt_info->is_set_tx_power_training_by_oid, &p_entry->ratr_state)) {
+				if (odm_ra_state_check(p_dm_odm, p_entry->rssi_stat.undecorated_smoothed_pwdb, p_mgnt_info->bSetTXPowerTrainingByOid, &p_entry->Ratr_State)) {
 					ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), p_entry->mac_addr);
-					ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", p_entry->rssi_stat.undecorated_smoothed_pwdb, p_entry->ratr_state));
-					p_adapter->hal_func.update_hal_ra_mask_handler(p_target_adapter, p_entry->associated_mac_id, p_entry, p_entry->ratr_state);
+					ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", p_entry->rssi_stat.undecorated_smoothed_pwdb, p_entry->Ratr_State));
+					p_adapter->hal_func.update_hal_ra_mask_handler(p_target_adapter, p_entry->AssociatedMacId, p_entry, p_entry->Ratr_State);
 				} else if (p_dm_odm->is_change_state) {
 					ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training state, is_disable_power_training = %d\n", p_dm_odm->is_disable_power_training));
-					p_adapter->hal_func.update_hal_ra_mask_handler(p_adapter, p_mgnt_info->m_mac_id, NULL, p_mgnt_info->ratr_state);
+					p_adapter->HalFunc.UpdateHalRAMaskHandler(p_adapter, p_mgnt_info->mMacId, NULL, p_mgnt_info->Ratr_State);
 				}
 #endif
 
@@ -2231,8 +2340,8 @@ odm_refresh_rate_adaptive_mask_mp(
 #if RA_MASK_PHYDMLIZE_WIN
 
 #else
-	if (p_mgnt_info->is_set_tx_power_training_by_oid)
-		p_mgnt_info->is_set_tx_power_training_by_oid = false;
+	if (p_mgnt_info->bSetTXPowerTrainingByOid)
+		p_mgnt_info->bSetTXPowerTrainingByOid = false;
 #endif
 #endif	/*  #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) */
 }
@@ -2247,15 +2356,19 @@ odm_refresh_rate_adaptive_mask_ce(
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _rate_adaptive_table_			*p_ra_table = &p_dm_odm->dm_ra_table;
 	struct _ADAPTER	*p_adapter	 =  p_dm_odm->adapter;
+#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
 	struct _ODM_RATE_ADAPTIVE		*p_ra = &p_dm_odm->rate_adaptive;
+#endif
 	u32		i;
 	struct sta_info *p_entry;
 	u8		ratr_state_new;
 
+#ifndef DM_ODM_CE_MAC80211
 	if (RTW_CANNOT_RUN(p_adapter)) {
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_refresh_rate_adaptive_mask(): driver is going to unload\n"));
 		return;
 	}
+#endif
 
 	if (!p_dm_odm->is_use_ra_mask) {
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_refresh_rate_adaptive_mask(): driver does not control rate adaptive mask\n"));
@@ -2266,57 +2379,70 @@ odm_refresh_rate_adaptive_mask_ce(
 
 		p_entry = p_dm_odm->p_odm_sta_info[i];
 
-		if (IS_STA_VALID(p_entry)) {
+		if (!IS_STA_VALID(p_entry)) {
+			continue;
+		}
 
-			if (IS_MCAST(p_entry->hwaddr))
-				continue;
+#ifdef DM_ODM_CE_MAC80211
+		if (is_multicast_ether_addr(p_entry->mac_addr))
+			continue;
+		else if (is_broadcast_ether_addr(p_entry->mac_addr))
+			continue;
+#else
+		if (IS_MCAST(p_entry->hwaddr))
+			continue;
+#endif
 
 #if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
-			if ((p_dm_odm->support_ic_type == ODM_RTL8812) || (p_dm_odm->support_ic_type == ODM_RTL8821)) {
-				if (p_entry->rssi_stat.undecorated_smoothed_pwdb < p_ra->ldpc_thres) {
-					p_ra->is_use_ldpc = true;
-					p_ra->is_lower_rts_rate = true;
-					if ((p_dm_odm->support_ic_type == ODM_RTL8821) && (p_dm_odm->cut_version == ODM_CUT_A))
-						set_ra_ldpc_8812(p_entry, true);
-					/* dbg_print("RSSI=%d, is_use_ldpc = true\n", p_hal_data->undecorated_smoothed_pwdb); */
-				} else if (p_entry->rssi_stat.undecorated_smoothed_pwdb > (p_ra->ldpc_thres - 5)) {
-					p_ra->is_use_ldpc = false;
-					p_ra->is_lower_rts_rate = false;
-					if ((p_dm_odm->support_ic_type == ODM_RTL8821) && (p_dm_odm->cut_version == ODM_CUT_A))
-						set_ra_ldpc_8812(p_entry, false);
-					/* dbg_print("RSSI=%d, is_use_ldpc = false\n", p_hal_data->undecorated_smoothed_pwdb); */
-				}
+		if ((p_dm_odm->support_ic_type == ODM_RTL8812) || (p_dm_odm->support_ic_type == ODM_RTL8821)) {
+			if (p_entry->rssi_stat.undecorated_smoothed_pwdb < p_ra->ldpc_thres) {
+				p_ra->is_use_ldpc = true;
+				p_ra->is_lower_rts_rate = true;
+				if ((p_dm_odm->support_ic_type == ODM_RTL8821) && (p_dm_odm->cut_version == ODM_CUT_A))
+					set_ra_ldpc_8812(p_entry, true);
+				/* dbg_print("RSSI=%d, is_use_ldpc = true\n", p_hal_data->undecorated_smoothed_pwdb); */
+			} else if (p_entry->rssi_stat.undecorated_smoothed_pwdb > (p_ra->ldpc_thres - 5)) {
+				p_ra->is_use_ldpc = false;
+				p_ra->is_lower_rts_rate = false;
+				if ((p_dm_odm->support_ic_type == ODM_RTL8821) && (p_dm_odm->cut_version == ODM_CUT_A))
+					set_ra_ldpc_8812(p_entry, false);
+				/* dbg_print("RSSI=%d, is_use_ldpc = false\n", p_hal_data->undecorated_smoothed_pwdb); */
 			}
+		}
 #endif
 
 #if RA_MASK_PHYDMLIZE_CE
-			ratr_state_new = phydm_RA_level_decision(p_dm_odm, p_entry->rssi_stat.undecorated_smoothed_pwdb, p_entry->rssi_level);
+		ratr_state_new = phydm_RA_level_decision(p_dm_odm, p_entry->rssi_stat.undecorated_smoothed_pwdb, p_entry->rssi_level);
 
-			if ((p_entry->rssi_level != ratr_state_new) || (p_ra_table->force_update_ra_mask_count >= FORCED_UPDATE_RAMASK_PERIOD)) {
+		if ((p_entry->rssi_level != ratr_state_new) || (p_ra_table->force_update_ra_mask_count >= FORCED_UPDATE_RAMASK_PERIOD)) {
 
-				p_ra_table->force_update_ra_mask_count = 0;
-				/*ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr :"), pstat->hwaddr);*/
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Update Tx RA Level: ((%x)) -> ((%x)),  RSSI = ((%d))\n",
-					p_entry->rssi_level, ratr_state_new, p_entry->rssi_stat.undecorated_smoothed_pwdb));
+			p_ra_table->force_update_ra_mask_count = 0;
+			/*ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr :"), pstat->hwaddr);*/
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Update Tx RA Level: ((%x)) -> ((%x)),  RSSI = ((%d))\n",
+						p_entry->rssi_level, ratr_state_new, p_entry->rssi_stat.undecorated_smoothed_pwdb));
 
-				p_entry->rssi_level = ratr_state_new;
-				rtw_hal_update_ra_mask(p_entry, p_entry->rssi_level);
-			} else {
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Stay in RA level  = (( %d ))\n\n", ratr_state_new));
-				/**/
-			}
+			p_entry->rssi_level = ratr_state_new;
+#ifdef DM_ODM_CE_MAC80211
+			rtl_hal_update_ra_mask(p_adapter, p_entry, p_entry->rssi_level);
 #else
-			if (true == odm_ra_state_check(p_dm_odm, p_entry->rssi_stat.undecorated_smoothed_pwdb, false, &p_entry->rssi_level)) {
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", p_entry->rssi_stat.undecorated_smoothed_pwdb, p_entry->rssi_level));
-				/* printk("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.undecorated_smoothed_pwdb, pstat->rssi_level); */
-				rtw_hal_update_ra_mask(p_entry, p_entry->rssi_level);
-			} else if (p_dm_odm->is_change_state) {
-				ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training state, is_disable_power_training = %d\n", p_dm_odm->is_disable_power_training));
-				rtw_hal_update_ra_mask(p_entry, p_entry->rssi_level);
-			}
+			rtw_hal_update_ra_mask(p_entry, p_entry->rssi_level, _FALSE);
 #endif
-
+		} else {
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Stay in RA level  = (( %d ))\n\n", ratr_state_new));
+			/**/
+		}
+#else
+		if (true == odm_ra_state_check(p_dm_odm, p_entry->rssi_stat.undecorated_smoothed_pwdb, false, &p_entry->rssi_level)) {
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", p_entry->rssi_stat.undecorated_smoothed_pwdb, p_entry->rssi_level));
+			/* printk("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.undecorated_smoothed_pwdb, pstat->rssi_level); */
+			rtw_hal_update_ra_mask(p_entry, p_entry->rssi_level, _FALSE);
+		} else if (p_dm_odm->is_change_state) {
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training state, is_disable_power_training = %d\n", p_dm_odm->is_disable_power_training));
+			rtw_hal_update_ra_mask(p_entry, p_entry->rssi_level, _FALSE);
 		}
+#endif
+
+
 	}
 
 #endif
@@ -2453,7 +2579,7 @@ odm_refresh_basic_rate_mask(
 	static u8		stage = 0;
 	u8			cur_stage = 0;
 	OCTET_STRING	os_rate_set;
-	PMGNT_INFO		p_mgnt_info = get_default_mgnt_info(adapter);
+	PMGNT_INFO		p_mgnt_info = GetDefaultMgntInfo(adapter);
 	u8			rate_set[5] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M, MGN_6M};
 
 	if (p_dm_odm->support_ic_type != ODM_RTL8812 && p_dm_odm->support_ic_type != ODM_RTL8821)
@@ -2470,11 +2596,11 @@ odm_refresh_basic_rate_mask(
 
 	if (cur_stage != stage) {
 		if (cur_stage == 1) {
-			fill_octet_string(os_rate_set, rate_set, 5);
-			filter_support_rate(p_mgnt_info->m_brates, &os_rate_set, false);
-			adapter->hal_func.set_hw_reg_handler(adapter, HW_VAR_BASIC_RATE, (u8 *)&os_rate_set);
+			FillOctetString(os_rate_set, rate_set, 5);
+			FilterSupportRate(p_mgnt_info->mBrates, &os_rate_set, false);
+			phydm_set_hw_reg_handler_interface(p_dm_odm, HW_VAR_BASIC_RATE, (u8 *)&os_rate_set);
 		} else if (cur_stage == 3 && (stage == 1 || stage == 2))
-			adapter->hal_func.set_hw_reg_handler(adapter, HW_VAR_BASIC_RATE, (u8 *)(&p_mgnt_info->m_brates));
+			phydm_set_hw_reg_handler_interface(p_dm_odm, HW_VAR_BASIC_RATE, (u8 *)(&p_mgnt_info->mBrates));
 	}
 
 	stage = cur_stage;
@@ -2487,7 +2613,6 @@ phydm_rate_order_compute(
 	u8	rate_idx
 )
 {
-	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	u8		rate_order = 0;
 
 	if (rate_idx >= ODM_RATEVHTSS4MCS0) {
@@ -2604,7 +2729,7 @@ u8
 odm_find_rts_rate(
 	void			*p_dm_void,
 	u8			tx_rate,
-	bool			is_erp_protect
+	boolean			is_erp_protect
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
@@ -2717,14 +2842,15 @@ odm_set_ra_dm_arfb_by_noisy(
 void
 odm_update_noisy_state(
 	void		*p_dm_void,
-	bool		is_noisy_state_from_c2h
+	boolean		is_noisy_state_from_c2h
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 
+/* JJ ADD 20161014 */
 	/*dbg_print("Get C2H Command! NoisyState=0x%x\n ", is_noisy_state_from_c2h);*/
 	if (p_dm_odm->support_ic_type == ODM_RTL8821  || p_dm_odm->support_ic_type == ODM_RTL8812  ||
-	    p_dm_odm->support_ic_type == ODM_RTL8723B || p_dm_odm->support_ic_type == ODM_RTL8192E || p_dm_odm->support_ic_type == ODM_RTL8188E || p_dm_odm->support_ic_type == ODM_RTL8723D)
+	    p_dm_odm->support_ic_type == ODM_RTL8723B || p_dm_odm->support_ic_type == ODM_RTL8192E || p_dm_odm->support_ic_type == ODM_RTL8188E || p_dm_odm->support_ic_type == ODM_RTL8723D || p_dm_odm->support_ic_type == ODM_RTL8710B)
 		p_dm_odm->is_noisy_state = is_noisy_state_from_c2h;
 	odm_set_ra_dm_arfb_by_noisy(p_dm_odm);
 };
@@ -2736,7 +2862,9 @@ phydm_update_pwr_track(
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	u8			path_idx = 0;
+#endif
 
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Pwr Track Get rate=0x%x\n", rate));
 
@@ -2786,40 +2914,40 @@ s32
 phydm_find_minimum_rssi(
 	struct PHY_DM_STRUCT		*p_dm_odm,
 	struct _ADAPTER		*p_adapter,
-	OUT	bool			*p_is_link_temp
+	OUT	boolean			*p_is_link_temp
 
 )
 {
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(p_adapter);
-	PMGNT_INFO		p_mgnt_info = &(p_adapter->mgnt_info);
-	bool			act_as_ap = ACTING_AS_AP(p_adapter);
+	PMGNT_INFO		p_mgnt_info = &(p_adapter->MgntInfo);
+	boolean			act_as_ap = ACTING_AS_AP(p_adapter);
 
 	/* 1.Determine the minimum RSSI */
-	if ((!p_mgnt_info->is_media_connect) ||
-	    (act_as_ap && (p_hal_data->entry_min_undecorated_smoothed_pwdb == 0))) {/* We should check AP mode and Entry info.into consideration, revised by Roger, 2013.10.18*/
+	if ((!p_mgnt_info->bMediaConnect) ||
+	    (act_as_ap && (p_hal_data->EntryMinUndecoratedSmoothedPWDB == 0))) {/* We should check AP mode and Entry info.into consideration, revised by Roger, 2013.10.18*/
 
-		p_hal_data->min_undecorated_pwdb_for_dm = 0;
+		p_hal_data->MinUndecoratedPWDBForDM = 0;
 		*p_is_link_temp = false;
 
 	} else
 		*p_is_link_temp = true;
 
 
-	if (p_mgnt_info->is_media_connect) {	/* Default port*/
+	if (p_mgnt_info->bMediaConnect) {	/* Default port*/
 
-		if (act_as_ap || p_mgnt_info->m_ibss) {
-			p_hal_data->min_undecorated_pwdb_for_dm = p_hal_data->entry_min_undecorated_smoothed_pwdb;
+		if (act_as_ap || p_mgnt_info->mIbss) {
+			p_hal_data->MinUndecoratedPWDBForDM = p_hal_data->EntryMinUndecoratedSmoothedPWDB;
 			/**/
 		} else {
-			p_hal_data->min_undecorated_pwdb_for_dm = p_hal_data->undecorated_smoothed_pwdb;
+			p_hal_data->MinUndecoratedPWDBForDM = p_hal_data->UndecoratedSmoothedPWDB;
 			/**/
 		}
 	} else { /* associated entry pwdb*/
-		p_hal_data->min_undecorated_pwdb_for_dm = p_hal_data->entry_min_undecorated_smoothed_pwdb;
+		p_hal_data->MinUndecoratedPWDBForDM = p_hal_data->EntryMinUndecoratedSmoothedPWDB;
 		/**/
 	}
 
-	return p_hal_data->min_undecorated_pwdb_for_dm;
+	return p_hal_data->MinUndecoratedPWDBForDM;
 }
 
 void
@@ -2829,7 +2957,7 @@ odm_update_init_rate_work_item_callback(
 {
 	struct _ADAPTER	*adapter = (struct _ADAPTER *)p_context;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 	u8		p = 0;
 
 	if (p_dm_odm->support_ic_type == ODM_RTL8821) {
@@ -2864,39 +2992,39 @@ odm_rssi_dump_to_register(
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
 
 	if (p_dm_odm->support_ic_type == ODM_RTL8812) {
-		platform_efio_write_1byte(adapter, REG_A_RSSI_DUMP_JAGUAR, adapter->rx_stats.rx_rssi_percentage[0]);
-		platform_efio_write_1byte(adapter, REG_B_RSSI_DUMP_JAGUAR, adapter->rx_stats.rx_rssi_percentage[1]);
+		PlatformEFIOWrite1Byte(adapter, REG_A_RSSI_DUMP_JAGUAR, adapter->RxStats.RxRSSIPercentage[0]);
+		PlatformEFIOWrite1Byte(adapter, REG_B_RSSI_DUMP_JAGUAR, adapter->RxStats.RxRSSIPercentage[1]);
 
 		/* Rx EVM*/
-		platform_efio_write_1byte(adapter, REG_S1_RXEVM_DUMP_JAGUAR, adapter->rx_stats.rx_evm_dbm[0]);
-		platform_efio_write_1byte(adapter, REG_S2_RXEVM_DUMP_JAGUAR, adapter->rx_stats.rx_evm_dbm[1]);
+		PlatformEFIOWrite1Byte(adapter, REG_S1_RXEVM_DUMP_JAGUAR, adapter->RxStats.RxEVMdbm[0]);
+		PlatformEFIOWrite1Byte(adapter, REG_S2_RXEVM_DUMP_JAGUAR, adapter->RxStats.RxEVMdbm[1]);
 
 		/* Rx SNR*/
-		platform_efio_write_1byte(adapter, REG_A_RX_SNR_DUMP_JAGUAR, (u8)(adapter->rx_stats.rx_snr_db[0]));
-		platform_efio_write_1byte(adapter, REG_B_RX_SNR_DUMP_JAGUAR, (u8)(adapter->rx_stats.rx_snr_db[1]));
+		PlatformEFIOWrite1Byte(adapter, REG_A_RX_SNR_DUMP_JAGUAR, (u8)(adapter->RxStats.RxSNRdB[0]));
+		PlatformEFIOWrite1Byte(adapter, REG_B_RX_SNR_DUMP_JAGUAR, (u8)(adapter->RxStats.RxSNRdB[1]));
 
 		/* Rx Cfo_Short*/
-		platform_efio_write_2byte(adapter, REG_A_CFO_SHORT_DUMP_JAGUAR, adapter->rx_stats.rx_cfo_short[0]);
-		platform_efio_write_2byte(adapter, REG_B_CFO_SHORT_DUMP_JAGUAR, adapter->rx_stats.rx_cfo_short[1]);
+		PlatformEFIOWrite2Byte(adapter, REG_A_CFO_SHORT_DUMP_JAGUAR, adapter->RxStats.RxCfoShort[0]);
+		PlatformEFIOWrite2Byte(adapter, REG_B_CFO_SHORT_DUMP_JAGUAR, adapter->RxStats.RxCfoShort[1]);
 
 		/* Rx Cfo_Tail*/
-		platform_efio_write_2byte(adapter, REG_A_CFO_LONG_DUMP_JAGUAR, adapter->rx_stats.rx_cfo_tail[0]);
-		platform_efio_write_2byte(adapter, REG_B_CFO_LONG_DUMP_JAGUAR, adapter->rx_stats.rx_cfo_tail[1]);
+		PlatformEFIOWrite2Byte(adapter, REG_A_CFO_LONG_DUMP_JAGUAR, adapter->RxStats.RxCfoTail[0]);
+		PlatformEFIOWrite2Byte(adapter, REG_B_CFO_LONG_DUMP_JAGUAR, adapter->RxStats.RxCfoTail[1]);
 	} else if (p_dm_odm->support_ic_type == ODM_RTL8192E) {
-		platform_efio_write_1byte(adapter, REG_A_RSSI_DUMP_92E, adapter->rx_stats.rx_rssi_percentage[0]);
-		platform_efio_write_1byte(adapter, REG_B_RSSI_DUMP_92E, adapter->rx_stats.rx_rssi_percentage[1]);
+		PlatformEFIOWrite1Byte(adapter, REG_A_RSSI_DUMP_92E, adapter->RxStats.RxRSSIPercentage[0]);
+		PlatformEFIOWrite1Byte(adapter, REG_B_RSSI_DUMP_92E, adapter->RxStats.RxRSSIPercentage[1]);
 		/* Rx EVM*/
-		platform_efio_write_1byte(adapter, REG_S1_RXEVM_DUMP_92E, adapter->rx_stats.rx_evm_dbm[0]);
-		platform_efio_write_1byte(adapter, REG_S2_RXEVM_DUMP_92E, adapter->rx_stats.rx_evm_dbm[1]);
+		PlatformEFIOWrite1Byte(adapter, REG_S1_RXEVM_DUMP_92E, adapter->RxStats.RxEVMdbm[0]);
+		PlatformEFIOWrite1Byte(adapter, REG_S2_RXEVM_DUMP_92E, adapter->RxStats.RxEVMdbm[1]);
 		/* Rx SNR*/
-		platform_efio_write_1byte(adapter, REG_A_RX_SNR_DUMP_92E, (u8)(adapter->rx_stats.rx_snr_db[0]));
-		platform_efio_write_1byte(adapter, REG_B_RX_SNR_DUMP_92E, (u8)(adapter->rx_stats.rx_snr_db[1]));
+		PlatformEFIOWrite1Byte(adapter, REG_A_RX_SNR_DUMP_92E, (u8)(adapter->RxStats.RxSNRdB[0]));
+		PlatformEFIOWrite1Byte(adapter, REG_B_RX_SNR_DUMP_92E, (u8)(adapter->RxStats.RxSNRdB[1]));
 		/* Rx Cfo_Short*/
-		platform_efio_write_2byte(adapter, REG_A_CFO_SHORT_DUMP_92E, adapter->rx_stats.rx_cfo_short[0]);
-		platform_efio_write_2byte(adapter, REG_B_CFO_SHORT_DUMP_92E, adapter->rx_stats.rx_cfo_short[1]);
+		PlatformEFIOWrite2Byte(adapter, REG_A_CFO_SHORT_DUMP_92E, adapter->RxStats.RxCfoShort[0]);
+		PlatformEFIOWrite2Byte(adapter, REG_B_CFO_SHORT_DUMP_92E, adapter->RxStats.RxCfoShort[1]);
 		/* Rx Cfo_Tail*/
-		platform_efio_write_2byte(adapter, REG_A_CFO_LONG_DUMP_92E, adapter->rx_stats.rx_cfo_tail[0]);
-		platform_efio_write_2byte(adapter, REG_B_CFO_LONG_DUMP_92E, adapter->rx_stats.rx_cfo_tail[1]);
+		PlatformEFIOWrite2Byte(adapter, REG_A_CFO_LONG_DUMP_92E, adapter->RxStats.RxCfoTail[0]);
+		PlatformEFIOWrite2Byte(adapter, REG_B_CFO_LONG_DUMP_92E, adapter->RxStats.RxCfoTail[1]);
 	}
 }
 
@@ -2909,7 +3037,7 @@ odm_refresh_ldpc_rts_mp(
 	s32				undecorated_smoothed_pwdb
 )
 {
-	bool					is_ctl_ldpc = false;
+	boolean					is_ctl_ldpc = false;
 	struct _ODM_RATE_ADAPTIVE		*p_ra = &p_dm_odm->rate_adaptive;
 
 	if (p_dm_odm->support_ic_type != ODM_RTL8821 && p_dm_odm->support_ic_type != ODM_RTL8812)
@@ -2923,9 +3051,9 @@ odm_refresh_ldpc_rts_mp(
 
 	if (is_ctl_ldpc) {
 		if (undecorated_smoothed_pwdb < (p_ra->ldpc_thres - 5))
-			mgnt_set_tx_ldpc(p_adapter, m_mac_id, true);
+			MgntSet_TX_LDPC(p_adapter, m_mac_id, true);
 		else if (undecorated_smoothed_pwdb > p_ra->ldpc_thres)
-			mgnt_set_tx_ldpc(p_adapter, m_mac_id, false);
+			MgntSet_TX_LDPC(p_adapter, m_mac_id, false);
 	}
 
 	if (undecorated_smoothed_pwdb < (p_ra->rts_thres - 5))
@@ -2939,7 +3067,7 @@ void
 odm_dynamic_arfb_select(
 	void		*p_dm_void,
 	u8			rate,
-	bool			collision_state
+	boolean			collision_state
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
@@ -3047,8 +3175,11 @@ odm_rate_adaptive_state_ap_init(
 )
 {
 	struct _ADAPTER		*adapter = (struct _ADAPTER *)PADAPTER_VOID;
-	p_entry->ratr_state = DM_RATR_STA_INIT;
+	p_entry->Ratr_State = DM_RATR_STA_INIT;
 }
+
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
 
 static void
@@ -3342,11 +3473,11 @@ odm_get_rate_bitmap(
 
 #if (RA_MASK_PHYDMLIZE_CE || RA_MASK_PHYDMLIZE_AP || RA_MASK_PHYDMLIZE_WIN)
 
-bool
+boolean
 odm_ra_state_check(
 	void			*p_dm_void,
 	s32			RSSI,
-	bool			is_force_update,
+	boolean			is_force_update,
 	u8			*p_ra_tr_state
 )
 {
diff --git a/rtl8822BU/hal/phydm/phydm_rainfo.h b/rtl8822BU/hal/phydm/phydm_rainfo.h
index 2ca1b07..82d58cb 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_rainfo.h
+++ b/rtl8822BU/hal/phydm/phydm_rainfo.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef	__PHYDMRAINFO_H__
 #define    __PHYDMRAINFO_H__
@@ -39,7 +34,7 @@
 #define	RA_FLOOR_UP_GAP		3
 #define	RA_FLOOR_TABLE_SIZE	7
 
-#define	ACTIVE_TP_THRESHOLD	150
+#define	ACTIVE_TP_THRESHOLD	1
 #define	RA_RETRY_DESCEND_NUM	2
 #define	RA_RETRY_LIMIT_LOW	4
 #define	RA_RETRY_LIMIT_HIGH	32
@@ -73,7 +68,11 @@
 	#define		RA_FIRST_MACID	0
 #endif
 
+#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+#define AP_InitRateAdaptiveState		odm_rate_adaptive_state_ap_init
+#else
 #define ap_init_rate_adaptive_state	odm_rate_adaptive_state_ap_init
+#endif
 
 #if (RA_MASK_PHYDMLIZE_CE || RA_MASK_PHYDMLIZE_AP || RA_MASK_PHYDMLIZE_WIN)
 	#define		DM_RATR_STA_INIT			0
@@ -221,25 +220,25 @@ struct _odm_ra_info_ {
 struct _rate_adaptive_table_ {
 	u8		firstconnect;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	bool		PT_collision_pre;
+	boolean		PT_collision_pre;
 #endif
 
 #if (defined(CONFIG_RA_DBG_CMD))
-	bool		is_ra_dbg_init;
+	boolean		is_ra_dbg_init;
 
 	u8	RTY_P[ODM_NUM_RATE_IDX];
 	u8	RTY_P_default[ODM_NUM_RATE_IDX];
-	bool	RTY_P_modify_note[ODM_NUM_RATE_IDX];
+	boolean	RTY_P_modify_note[ODM_NUM_RATE_IDX];
 
 	u8	RATE_UP_RTY_RATIO[ODM_NUM_RATE_IDX];
 	u8	RATE_UP_RTY_RATIO_default[ODM_NUM_RATE_IDX];
-	bool	RATE_UP_RTY_RATIO_modify_note[ODM_NUM_RATE_IDX];
+	boolean	RATE_UP_RTY_RATIO_modify_note[ODM_NUM_RATE_IDX];
 
 	u8	RATE_DOWN_RTY_RATIO[ODM_NUM_RATE_IDX];
 	u8	RATE_DOWN_RTY_RATIO_default[ODM_NUM_RATE_IDX];
-	bool	RATE_DOWN_RTY_RATIO_modify_note[ODM_NUM_RATE_IDX];
+	boolean	RATE_DOWN_RTY_RATIO_modify_note[ODM_NUM_RATE_IDX];
 
-	bool ra_para_feedback_req;
+	boolean ra_para_feedback_req;
 
 	u8   para_idx;
 	u8	rate_idx;
@@ -274,13 +273,13 @@ struct _ODM_RATE_ADAPTIVE {
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 	u8				ldpc_thres;			/* if RSSI > ldpc_thres => switch from LPDC to BCC */
-	bool				is_lower_rts_rate;
+	boolean				is_lower_rts_rate;
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
 	u8				rts_thres;
 #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
-	bool				is_use_ldpc;
+	boolean				is_use_ldpc;
 #else
 	u8				ultra_low_rssi_thresh;
 	u32				last_ratr;			/* RATR Register Content */
@@ -463,11 +462,11 @@ phydm_RA_level_decision(
 	u8			ratr_state
 );
 
-bool
+boolean
 odm_ra_state_check(
 	void		*p_dm_void,
 	s32			RSSI,
-	bool			is_force_update,
+	boolean			is_force_update,
 	u8			*p_ra_tr_state
 );
 
@@ -486,13 +485,13 @@ u8
 odm_find_rts_rate(
 	void		*p_dm_void,
 	u8			tx_rate,
-	bool			is_erp_protect
+	boolean			is_erp_protect
 );
 
 void
 odm_update_noisy_state(
 	void		*p_dm_void,
-	bool		is_noisy_state_from_c2h
+	boolean		is_noisy_state_from_c2h
 );
 
 void
@@ -507,7 +506,7 @@ s32
 phydm_find_minimum_rssi(
 	struct PHY_DM_STRUCT		*p_dm_odm,
 	struct _ADAPTER		*p_adapter,
-	OUT	bool	*p_is_link_temp
+	OUT	boolean	*p_is_link_temp
 );
 
 void
@@ -534,7 +533,7 @@ void
 odm_dynamic_arfb_select(
 	void		*p_dm_void,
 	u8		rate,
-	bool		collision_state
+	boolean		collision_state
 );
 #endif
 
@@ -543,6 +542,8 @@ odm_rate_adaptive_state_ap_init(
 	void			*PADAPTER_VOID,
 	struct sta_info	*p_entry
 );
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 
 static void
diff --git a/rtl8822BU/hal/phydm/phydm_reg.h b/rtl8822BU/hal/phydm/phydm_reg.h
index 16328fe..9bb5dde 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_reg.h
+++ b/rtl8822BU/hal/phydm/phydm_reg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 /* ************************************************************
  * File Name: odm_reg.h
  *
@@ -209,6 +204,21 @@
 
 #define	BIT_FA_RESET					BIT(0)
 
-
+#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
+	#define REG_OFDM_0_XA_TX_IQ_IMBALANCE	0xC80
+	#define REG_OFDM_0_ECCA_THRESHOLD	0xC4C
+	#define REG_FPGA0_XB_LSSI_READ_BACK	0x8A4
+	#define REG_FPGA0_TX_GAIN_STAGE		0x80C
+	#define REG_OFDM_0_XA_AGC_CORE1		0xC50
+	#define REG_OFDM_0_XB_AGC_CORE1		0xC58
+	#define REG_A_TX_SCALE_JAGUAR		0xC1C
+	#define REG_B_TX_SCALE_JAGUAR		0xE1C
+
+	#define REG_AFE_XTAL_CTRL		0x0024
+	#define REG_AFE_PLL_CTRL		0x0028
+	#define REG_MAC_PHY_CTRL		0x002C
+
+	#define RF_CHNLBW			0x18
+#endif
 
 #endif
diff --git a/rtl8822BU/hal/phydm/phydm_regdefine11ac.h b/rtl8822BU/hal/phydm/phydm_regdefine11ac.h
index 171348c..7bcd4d8 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_regdefine11ac.h
+++ b/rtl8822BU/hal/phydm/phydm_regdefine11ac.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef	__ODM_REGDEFINE11AC_H__
 #define __ODM_REGDEFINE11AC_H__
diff --git a/rtl8822BU/hal/phydm/phydm_regdefine11n.h b/rtl8822BU/hal/phydm/phydm_regdefine11n.h
index 643f8b4..7d85b94 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_regdefine11n.h
+++ b/rtl8822BU/hal/phydm/phydm_regdefine11n.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef	__ODM_REGDEFINE11N_H__
 #define __ODM_REGDEFINE11N_H__
@@ -186,6 +181,7 @@
 #define	ODM_REG_CCK_CRC32_OK_CNT_11N		0xF88
 #define	ODM_REG_HT_CRC32_CNT_11N		0xF90
 #define	ODM_REG_OFDM_CRC32_CNT_11N		0xF94
+#define	ODM_REG_HT_CRC32_CNT_11N_AGG	0xFB8
 
 /* 2 MAC REG LIST */
 #define	ODM_REG_BB_RST_11N				0x02
diff --git a/rtl8822BU/hal/phydm/phydm_types.h b/rtl8822BU/hal/phydm/phydm_types.h
index 09a1b45..2d4417c 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_types.h
+++ b/rtl8822BU/hal/phydm/phydm_types.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __ODM_TYPES_H__
 #define __ODM_TYPES_H__
 
@@ -25,17 +20,22 @@
 #define	ODM_AP			0x01	/*BIT0*/
 #define	ODM_CE			0x04	/*BIT2*/
 #define	ODM_WIN		0x08	/*BIT3*/
-#define	ODM_ADSL		0x10	/*BIT4*/
+#define	ODM_ADSL		0x10	/*BIT4*/		/*already combine with ODM_AP, and is nouse now*/
 #define	ODM_IOT		0x20	/*BIT5*/
 
+/*For FW API*/
+#define	__iram_odm_func__
+
 /*Deifne HW endian support*/
 #define	ODM_ENDIAN_BIG	0
 #define	ODM_ENDIAN_LITTLE	1
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	#define GET_PDM_ODM(__padapter)	((struct PHY_DM_STRUCT*)(&((GET_HAL_DATA(__padapter))->dm_out_src)))
+	#define GET_PDM_ODM(__padapter)	((struct PHY_DM_STRUCT*)(&((GET_HAL_DATA(__padapter))->DM_OutSrc)))
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	#define GET_PDM_ODM(__padapter)	((struct PHY_DM_STRUCT*)(&((GET_HAL_DATA(__padapter))->odmpriv)))
+#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
+	#define GET_PDM_ODM(__padapter)	((struct PHY_DM_STRUCT*)(&(__padapter->pshare->_dmODM)))
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE != ODM_WIN)
@@ -55,9 +55,6 @@ enum hal_status {
 	RT_STATUS_OS_API_FAILED,*/
 };
 
-#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
-	#define		MP_DRIVER		0
-#endif
 #if (DM_ODM_SUPPORT_TYPE != ODM_WIN)
 
 #define		VISTA_USB_RX_REVISE			0
@@ -114,9 +111,9 @@ enum rt_spinlock_type {
 
 #endif
 
-
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	#define sta_info 	_RT_WLAN_STA
+	#define cmn_sta_info	_RT_WLAN_STA	/*tmp add for compile*/
 	#define	__func__		__FUNCTION__
 	#define	PHYDM_TESTCHIP_SUPPORT	TESTCHIP_SUPPORT
 	#define MASKH3BYTES			0xffffff00
@@ -135,38 +132,11 @@ enum rt_spinlock_type {
 	#define	u64		u8Byte
 	#define	s64		s8Byte
 
-	#define	bool	BOOLEAN
-
 	#define	timer_list	_RT_TIMER
 	
 
 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
-
-	/* To let ADSL/AP project compile ok; it should be removed after all conflict are solved. Added by Annie, 2011-10-07. */
-	#define ADSL_AP_BUILD_WORKAROUND
-	#define AP_BUILD_WORKAROUND
-
-	#ifdef AP_BUILD_WORKAROUND
-		#include "../typedef.h"
-	#else
-		typedef void					void, *void *;
-		typedef unsigned char			bool, *bool *;
-		typedef unsigned char			u8, *u8 *;
-		typedef unsigned short			u16, *u16 *;
-		typedef unsigned int			u32, *u32 *;
-		typedef unsigned long long		u64, *u64 *;
-		#if 1
-			/* In ARM platform, system would use the type -- "char" as "unsigned char"
-			* And we only use s8/s8* as INT8 now, so changes the type of s8.*/
-			typedef signed char				s8, *s8 *;
-		#else
-			typedef char					s8, *s8 *;
-		#endif
-		typedef short					s16, *s16 *;
-		typedef long					s32, *s32 *;
-		typedef long long				s64, *s64 *;
-	#endif
-
+	#include "../typedef.h"
 
 	#ifdef CONFIG_PCI_HCI
 		#define DEV_BUS_TYPE		RT_PCI_INTERFACE
@@ -182,44 +152,57 @@ enum rt_spinlock_type {
 	#endif
 
 	#define	sta_info stat_info
+	#define	cmn_sta_info stat_info	/*tmp add for compile*/
+	#define	boolean	bool
 
-#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
-	#include <drv_types.h>
-	#if 0
-		typedef u8					u8, *u8 *;
-		typedef u16					u16, *u16 *;
-		typedef u32					u32, *u32 *;
-		typedef u64					u64, *u64 *;
-		typedef s8					s8, *s8 *;
-		typedef s16					s16, *s16 *;
-		typedef s32					s32, *s32 *;
-		typedef s64					s64, *s64 *;
-	#elif 0
-		#define u8		u8
-		#define	u8 *u8*
-
-		#define u16		u16
-		#define	u16 *u16*
-
-		#define u32		u32
-		#define	u32 *u32*
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
 
-		#define u64		u64
-		#define	u64*	u64*
+	#include <asm/byteorder.h>
 
-		#define s8		s8
-		#define	s8*	s8*
+	#define DEV_BUS_TYPE	RT_PCI_INTERFACE
 
-		#define s16		s16
-		#define	s16*	s16*
+	#if defined(__LITTLE_ENDIAN)
+		#define	ODM_ENDIAN_TYPE			ODM_ENDIAN_LITTLE
+	#elif defined(__BIG_ENDIAN)
+		#define	ODM_ENDIAN_TYPE			ODM_ENDIAN_BIG
+	#else
+		#error
+	#endif
 
-		#define s32		s32
-		#define	s32*	s32*
+	/* define useless flag to avoid compile warning */
+	#define	USE_WORKITEM 0
+	#define	FOR_BRAZIL_PRETEST 0
+	#define	FPGA_TWO_MAC_VERIFICATION	0
+	#define	RTL8881A_SUPPORT	0
+	#define	PHYDM_TESTCHIP_SUPPORT 0
+
+	/* support list */
+	#define RTL8188E_SUPPORT				0
+	#define RTL8812A_SUPPORT				0
+	#define RTL8821A_SUPPORT				0
+	#define RTL8723B_SUPPORT				0
+	#define RTL8723D_SUPPORT				0
+	#define RTL8192E_SUPPORT				0
+	#define RTL8814A_SUPPORT				0
+	#define RTL8195A_SUPPORT				0
+	#define RTL8197F_SUPPORT				0
+	#define RTL8703B_SUPPORT				0
+	#define RTL8188F_SUPPORT				0
+	#define RTL8822B_SUPPORT				1
+	#define RTL8821B_SUPPORT				0
+	#define RTL8821C_SUPPORT				0
+
+	#define RATE_ADAPTIVE_SUPPORT			0
+	#define POWER_TRAINING_ACTIVE			0
+
+	#define sta_info	rtl_sta_info
+	#define cmn_sta_info	rtl_sta_info	/*tmp add for compile*/
+	#define _FALSE		false
+	#define	boolean		bool
 
-		#define s64		s64
-		#define	s64*	s64*
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
+	#include <drv_types.h>
 
-	#endif
 	#ifdef CONFIG_USB_HCI
 		#define DEV_BUS_TYPE	RT_USB_INTERFACE
 	#elif defined(CONFIG_PCI_HCI)
@@ -237,10 +220,7 @@ enum rt_spinlock_type {
 		#define	ODM_ENDIAN_TYPE			ODM_ENDIAN_BIG
 	#endif
 
-	//#define	struct sta_info			struct sta_info
-	//#define	struct sta_info*		struct sta_info *
-
-
+	#define	boolean	bool
 
 	#define true	_TRUE
 	#define false	_FALSE
@@ -288,7 +268,4 @@ enum rt_spinlock_type {
 #define	MASKL3BYTES			0x00ffffff
 #define RFREGOFFSETMASK	0xfffff
 
-
-#include "phydm_features.h"
-
 #endif /* __ODM_TYPES_H__ */
diff --git a/rtl8822BU/hal/phydm/rtchnlplan.c b/rtl8822BU/hal/phydm/rtchnlplan.c
deleted file mode 100755
index d3e190f..0000000
--- a/rtl8822BU/hal/phydm/rtchnlplan.c
+++ b/dev/null
@@ -1,475 +0,0 @@
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
-
-/******************************************************************************
-
- History:
-	data		Who		Remark (Internal History)
-
-	05/14/2012	MH		Collect RTK inernal infromation and generate channel plan draft.
-
-******************************************************************************/
-
-/* ************************************************************
- * include files
- * ************************************************************ */
-#include "mp_precomp.h"
-#include "phydm_precomp.h"
-#include "rtchnlplan.h"
-
-
-
-/*
- *	channel Plan Domain Code
- *   */
-
-/*
-	channel Plan Contents
-	Domain Code		EEPROM	Countries in Specific Domain
-			2G RD		5G RD		Bit[6:0]	2G	5G
-	Case	Old Define				00h~1Fh	Old Define	Old Define
-	1		2G_WORLD	5G_NULL		20h		Worldwird 13	NA
-	2		2G_ETSI1	5G_NULL		21h		Europe 2G		NA
-	3		2G_FCC1		5G_NULL		22h		US 2G			NA
-	4		2G_MKK1		5G_NULL		23h		Japan 2G		NA
-	5		2G_ETSI2	5G_NULL		24h		France 2G		NA
-	6		2G_FCC1		5G_FCC1		25h		US 2G			US 5G					¤K¤j°ê»{ÃÒ
-	7		2G_WORLD	5G_ETSI1	26h		Worldwird 13	Europe					¤K¤j°ê»{ÃÒ
-	8		2G_MKK1		5G_MKK1		27h		Japan 2G		Japan 5G				¤K¤j°ê»{ÃÒ
-	9		2G_WORLD	5G_KCC1		28h		Worldwird 13	Korea					¤K¤j°ê»{ÃÒ
-	10		2G_WORLD	5G_FCC2		29h		Worldwird 13	US o/w DFS Channels
-	11		2G_WORLD	5G_FCC3		30h		Worldwird 13	India, Mexico
-	12		2G_WORLD	5G_FCC4		31h		Worldwird 13	Venezuela
-	13		2G_WORLD	5G_FCC5		32h		Worldwird 13	China
-	14		2G_WORLD	5G_FCC6		33h		Worldwird 13	Israel
-	15		2G_FCC1		5G_FCC7		34h		US 2G			US/Canada				¤K¤j°ê»{ÃÒ
-	16		2G_WORLD	5G_ETSI2	35h		Worldwird 13	Australia, New Zealand	¤K¤j°ê»{ÃÒ
-	17		2G_WORLD	5G_ETSI3	36h		Worldwird 13	Russia
-	18		2G_MKK1		5G_MKK2		37h		Japan 2G		Japan (W52, W53)
-	19		2G_MKK1		5G_MKK3		38h		Japan 2G		Japan (W56)
-	20		2G_FCC1		5G_NCC1		39h		US 2G			Taiwan					¤K¤j°ê»{ÃÒ
-
-	NA		2G_WORLD	5G_FCC1		7F		FCC	FCC DFS Channels	Realtek Define
-
-
-
-
-
-	2.4G	Regulatory	Domains
-	Case	2G RD		regulation	Channels	Frequencyes		Note					Countries in Specific Domain
-	1		2G_WORLD	ETSI		1~13		2412~2472		Passive scan CH 12, 13	Worldwird 13
-	2		2G_ETSI1	ETSI		1~13		2412~2472								Europe
-	3		2G_FCC1		FCC			1~11		2412~2462								US
-	4		2G_MKK1		MKK			1~13, 14	2412~2472, 2484							Japan
-	5		2G_ETSI2	ETSI		10~13		2457~2472								France
-
-
-
-
-	5G Regulatory Domains
-	Case	5G RD		regulation	Channels			Frequencyes					Note											Countries in Specific Domain
-	1		5G_NULL		NA			NA					NA							Do not support 5GHz
-	2		5G_ETSI1	ETSI		"36~48, 52~64,
-									100~140"			"5180~5240, 5260~5230
-														5500~5700"					Band1, Ban2, Band3								Europe
-	3		5G_ETSI2	ETSI		"36~48, 52~64,
-									100~140, 149~165"	"5180~5240, 5260~5230
-														5500~5700, 5745~5825"		Band1, Ban2, Band3, Band4						Australia, New Zealand
-	4		5G_ETSI3	ETSI		"36~48, 52~64,
-														100~132, 149~165"
-														"5180~5240, 5260~5230
-														5500~5660, 5745~5825"		Band1, Ban2, Band3(except CH 136, 140), Band4"	Russia
-	5		5G_FCC1		FCC			"36~48, 52~64,
-									100~140, 149~165"
-														"5180~5240, 5260~5230
-														5500~5700, 5745~5825"		Band1(5150~5250MHz),
-																					Band2(5250~5350MHz),
-																					Band3(5470~5725MHz),
-																					Band4(5725~5850MHz)"							US
-	6		5G_FCC2		FCC			36~48, 149~165		5180~5240, 5745~5825		Band1, Band4	FCC o/w DFS Channels
-	7		5G_FCC3		FCC			"36~48, 52~64,
-									149~165"			"5180~5240, 5260~5230
-														5745~5825"					Band1, Ban2, Band4								India, Mexico
-	8		5G_FCC4		FCC			"36~48, 52~64,
-									149~161"			"5180~5240, 5260~5230
-														5745~5805"					Band1, Ban2,
-																					Band4(except CH 165)"							Venezuela
-	9		5G_FCC5		FCC			149~165				5745~5825					Band4											China
-	10		5G_FCC6		FCC			36~48, 52~64		5180~5240, 5260~5230		Band1, Band2									Israel
-	11		5G_FCC7
-			5G_IC1		FCC
-						IC"			"36~48, 52~64,
-									100~116, 136, 140,
-									149~165"			"5180~5240, 5260~5230
-														5500~5580, 5680, 5700,
-														5745~5825"					"Band1, Band2,
-																					Band3(except 5600~5650MHz),
-																					Band4"											"US
-																																	Canada"
-	12		5G_KCC1		KCC			"36~48, 52~64,
-									100~124, 149~165"	"5180~5240, 5260~5230
-														5500~5620, 5745~5825"		"Band1, Ban2,
-																					Band3(5470~5650MHz),
-																					Band4"											Korea
-	13		5G_MKK1		MKK			"36~48, 52~64,
-									100~140"			"5180~5240, 5260~5230
-														5500~5700"					W52, W53, W56									Japan
-	14		5G_MKK2		MKK			36~48, 52~64		5180~5240, 5260~5230		W52, W53										Japan (W52, W53)
-	15		5G_MKK3		MKK			100~140				5500~5700					W56	Japan (W56)
-	16		5G_NCC1		NCC			"56~64,
-									100~116, 136, 140,
-									149~165"			"5260~5320
-														5500~5580, 5680, 5700,
-														5745~5825"					"Band2(except CH 52),
-																					Band3(except 5600~5650MHz),
-																					Band4"											Taiwan
-
-
-*/
-
-/*
- * 2.4G CHannel
- *
- *
-
-	2.4G band		Regulatory Domains																RTL8192D
-	channel number	channel Frequency	US		Canada	Europe	Spain	France	Japan	Japan		20M		40M
-					(MHz)				(FCC)	(IC)	(ETSI)							(MPHPT)
-	1				2412				v		v		v								v			v
-	2				2417				v		v		v								v			v
-	3				2422				v		v		v								v			v		v
-	4				2427				v		v		v								v			v		v
-	5				2432				v		v		v								v			v		v
-	6				2437				v		v		v								v			v		v
-	7				2442				v		v		v								v			v		v
-	8				2447				v		v		v								v			v		v
-	9				2452				v		v		v								v			v		v
-	10				2457				v		v		v		v		v				v			v		v
-	11				2462				v		v		v		v		v				v			v		v
-	12				2467								v				v				v			v		v
-	13				2472								v				v				v			v
-	14				2484														v					v
-
-
-*/
-
-
-/*
- * 5G Operating channel
- *
- *
-
-	5G band		RTL8192D	RTL8195 (Jaguar)				Jaguar 2	Regulatory Domains
-	channel number	channel Frequency	Global	Global				Global	"US
-(FCC 15.407)"	"Canada
-(FCC, except 5.6~5.65GHz)"	Argentina, Australia, New Zealand, Brazil, S. Africa (FCC/ETSI)	"Europe
-(CE 301 893)"	China	India, Mexico, Singapore	Israel, Turkey	"Japan
-(MIC Item 19-3, 19-3-2)"	Korea	Russia, Ukraine	"Taiwan
-(NCC)"	Venezuela
-		(MHz)	(20MHz)	(20MHz)	(40MHz)	(80MHz)	(160MHz)	(20MHz)	(20MHz)	(20MHz)	(20MHz)	(20MHz)	(20MHz)	(20MHz)	(20MHz)	(20MHz)	(20MHz)	(20MHz)	(20MHz)	(20MHz)
-"band 1
-5.15GHz
-~
-5.25GHz"	36	5180	v	v	v	v		v	Indoor	Indoor	v	Indoor		v	Indoor	Indoor	v	v		v
-	40	5200	v	v				v	Indoor	Indoor	v	Indoor		v	Indoor	Indoor	v	v		v
-	44	5220	v	v	v			v	Indoor	Indoor	v	Indoor		v	Indoor	Indoor	v	v		v
-	48	5240	v	v				v	Indoor	Indoor	v	Indoor		v	Indoor	Indoor	v	v		v
-"band 2
-5.25GHz
-~
-5.35GHz
-(DFS)"	52	5260	v	v	v	v		v	v	v	v	Indoor		v	Indoor	Indoor	v	v		v
-	56	5280	v	v				v	v	v	v	Indoor		v	Indoor	Indoor	v	v	Indoor	v
-	60	5300	v	v	v			v	v	v	v	Indoor		v	Indoor	Indoor	v	v	Indoor	v
-	64	5320	v	v				v	v	v	v	Indoor		v	Indoor	Indoor	v	v	Indoor	v
-
-"band 3
-5.47GHz
-~
-5.725GHz
-(DFS)"	100	5500	v	v	v	v		v	v	v	v	v				v	v	v	v
-	104	5520	v	v				v	v	v	v	v				v	v	v	v
-	108	5540	v	v	v			v	v	v	v	v				v	v	v	v
-	112	5560	v	v				v	v	v	v	v				v	v	v	v
-	116	5580	v	v	v	v		v	v	v	v	v				v	v	v	v
-	120	5600	v	v				v	Indoor		v	Indoor				v	v	v
-	124	5620	v	v	v			v	Indoor		v	Indoor				v	v	v
-	128	5640	v	v				v	Indoor		v	Indoor				v		v
-	132	5660	v	v	v	E		v	Indoor		v	Indoor				v		v
-	136	5680	v	v				v	v	v	v	v				v			v
-	140	5700	v	v	E			v	v	v	v	v				v			v
-	144	5720	E	E				E
-"band 4
-5.725GHz
-~
-5.85GHz
-(~5.9GHz)"	149	5745	v	v	v	v		v	v	v	v		v	v			v	v	v	v
-	153	5765	v	v				v	v	v	v		v	v			v	v	v	v
-	157	5785	v	v	v			v	v	v	v		v	v			v	v	v	v
-	161	5805	v	v				v	v	v	v		v	v			v	v	v	v
-	165	5825	v	v	P	P		v	v	v	v		v	v			v	v	v
-	169	5845	P	P				P
-	173	5865	P	P	P			P
-	177	5885	P	P				P
-channel count			28	28	14	7	0	28	24	20	24	19	5	13	8	19	20	22	15	12
-			E: FCC accepted the ask for CH144 from Accord.					PS: 160MHz ¥Î 80MHz+80MHz¹ê²{¡H			Argentina	Belgium (¤ñ§Q®É)		India	Israel			Russia
-			P: Customer's requirement from James.								Australia	The Netherlands (²üÄõ)		Mexico	Turkey			Ukraine
-											New Zealand	UK (­^°ê)		Singapore
-											Brazil	Switzerland (·ç¤h)
-
-
-*/
-
-/*---------------------------Define Local Constant---------------------------*/
-
-
-/* define Maximum Power v.s each band for each region
- * ISRAEL
- * Format:
- * RT_CHANNEL_DOMAIN_Region ={{{chnl_start, chnl_end, Pwr_dB_Max}, {Chn2_Start, Chn2_end, Pwr_dB_Max}, {Chn3_Start, Chn3_end, Pwr_dB_Max}, {Chn4_Start, Chn4_end, Pwr_dB_Max}, {Chn5_Start, Chn5_end, Pwr_dB_Max}}, Limit_Num}
- * RT_CHANNEL_DOMAIN_FCC ={{{01,11,30}, {36,48,17}, {52,64,24}, {100,140,24}, {149,165,30}}, 5}
- * "NR" is non-release channle.
- * Issue--- Israel--Russia--New Zealand
- * DOMAIN_01= (2G_WORLD, 5G_NULL)
- * DOMAIN_02= (2G_ETSI1, 5G_NULL)
- * DOMAIN_03= (2G_FCC1, 5G_NULL)
- * DOMAIN_04= (2G_MKK1, 5G_NULL)
- * DOMAIN_05= (2G_ETSI2, 5G_NULL)
- * DOMAIN_06= (2G_FCC1, 5G_FCC1)
- * DOMAIN_07= (2G_WORLD, 5G_ETSI1)
- * DOMAIN_08= (2G_MKK1, 5G_MKK1)
- * DOMAIN_09= (2G_WORLD, 5G_KCC1)
- * DOMAIN_10= (2G_WORLD, 5G_FCC2)
- * DOMAIN_11= (2G_WORLD, 5G_FCC3)----india
- * DOMAIN_12= (2G_WORLD, 5G_FCC4)----Venezuela
- * DOMAIN_13= (2G_WORLD, 5G_FCC5)----China
- * DOMAIN_14= (2G_WORLD, 5G_FCC6)----Israel
- * DOMAIN_15= (2G_FCC1, 5G_FCC7)-----Canada
- * DOMAIN_16= (2G_WORLD, 5G_ETSI2)---Australia
- * DOMAIN_17= (2G_WORLD, 5G_ETSI3)---Russia
- * DOMAIN_18= (2G_MKK1, 5G_MKK2)-----Japan
- * DOMAIN_19= (2G_MKK1, 5G_MKK3)-----Japan
- * DOMAIN_20= (2G_FCC1, 5G_NCC1)-----Taiwan
- * DOMAIN_21= (2G_FCC1, 5G_NCC1)-----Taiwan */
-
-
-static	struct _RT_CHANNEL_PLAN_MAXPWR	chnl_plan_pwr_max_2g[] = {
-
-	/* 2G_WORLD, */
-	{{1, 13, 20}, 1},
-
-	/* 2G_ETSI1 */
-	{{1, 13, 20}, 1},
-
-	/* RT_CHANNEL_DOMAIN_ETSI */
-	{{{1, 11, 17}, {40, 56, 17}, {60, 128, 17}, {0, 0, 0}, {149, 165, 17}}, 4},
-
-	/* RT_CHANNEL_DOMAIN_MKK */
-	{{{1, 11, 17}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}}, 1},
-
-	/* Add new channel plan mex power table. */
-	/* ...... */
-};
-
-
-#if 0
-/* ===========================================1:(2G_WORLD, 5G_NULL) */
-
-struct _RT_CHANNEL_PLAN_MAXPWR	RT_DOMAIN_01 = {{{01, 13, 20}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}}, 1}
-
-/* ===========================================2:(2G_ETSI1, 5G_NULL) */
-
-RT_DOMAIN_02 = {{{01, 13, 20}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}}, 1}
-
-/* ===========================================3:(2G_FCC1, 5G_NULL) */
-
-RT_DOMAIN_03 = {{{01, 11, 30}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}}, 1}
-
-/* ===========================================4:(2G_MKK1, 5G_NULL) */
-
-RT_DOMAIN_04 = {{{01, 14, 23}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}}, 1}
-
-/* ===========================================5:(2G_ETSI2, 5G_NULL) */
-
-RT_DOMAIN_05 = {{{10, 13, 20}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}}, 1}
-
-/* ===========================================6:(2G_FCC1, 5G_FCC1) */
-
-RT_DOMAIN_06 = {{{01, 13, 30}, {36, 48, 17}, {52, 64, 24}, {100, 140, 24}, {149, 165, 30}}, 5}
-
-/* ===========================================7:(2G_WORLD, 5G_ETSI1) */
-
-RT_DOMAIN_07 = {{{01, 13, 20}, {36, 48, 23}, {52, 64, 23}, {100, 140, 30}, {NR, NR, 0}}, 4}
-
-/* ===========================================8:(2G_MKK1, 5G_MKK1) */
-
-RT_DOMAIN_08 = {{{01, 14, 23}, {36, 48, 23}, {52, 64, 23}, {100, 140, 23}, {NR, NR, 0}}, 4}
-
-/* ===========================================9:(2G_WORLD, 5G_KCC1) */
-
-RT_DOMAIN_09 = {{{01, 13, 20}, {36, 48, 17}, {52, 64, 23}, {100, 124, 23}, {149, 165, 23}}, 5}
-
-/* ===========================================10:(2G_WORLD, 5G_FCC2) */
-
-RT_DOMAIN_10 = {{{01, 13, 20}, {36, 48, 17}, {NR, NR, 0}, {NR, NR, 0}, {149, 165, 30}}, 3}
-
-/* ===========================================11:(2G_WORLD, 5G_FCC3) */
-RT_DOMAIN_11 = {{{01, 13, 20}, {36, 48, 23}, {52, 64, 23}, {NR, NR, 0}, {149, 165, 23}}, 4}
-
-/* ===========================================12:(2G_WORLD, 5G_FCC4) */
-RT_DOMAIN_12 = {{{01, 13, 20}, {36, 48, 24}, {52, 64, 24}, {NR, NR, 0}, {149, 161, 27}}, 4}
-
-/* ===========================================13:(2G_WORLD, 5G_FCC5) */
-RT_DOMAIN_13 = {{{01, 13, 20}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}, {149, 165, 27}}, 2}
-
-/* ===========================================14:(2G_WORLD, 5G_FCC6) */
-RT_DOMAIN_14 = {{{01, 13, 20}, {36, 48, 17}, {52, 64, 17}, {NR, NR, 0}, {NR, NR, 0}}, 3}
-
-/* ===========================================15:(2G_FCC1, 5G_FCC7) */
-RT_DOMAIN_15 = {{{01, 11, 30}, {36, 48, 23}, {52, 64, 24}, {100, 140, 24}, {149, 165, 30}}, 5}
-
-/* ===========================================16:(2G_WORLD, 5G_ETSI2) */
-RT_DOMAIN_16 = {{{01, 13, 20}, {36, 48, 23}, {52, 64, 23}, {100, 140, 30}, {149, 165, 30}}, 5}
-
-/* ===========================================17:(2G_WORLD, 5G_ETSI3) */
-RT_DOMAIN_17 = {{{01, 13, 20}, {36, 48, 23}, {52, 64, 23}, {100, 132, 30}, {149, 165, 20}}, 5}
-
-/* ===========================================18:(2G_MKK1, 5G_MKK2) */
-RT_DOMAIN_18 = {{{01, 14, 23}, {36, 48, 23}, {52, 64, 23}, {NR, NR, 0}, {NR, NR, 0}}, 3}
-
-/* ===========================================19:(2G_MKK1, 5G_MKK3) */
-RT_DOMAIN_19 = {{{01, 14, 23}, {NR, NR, 0}, {NR, NR, 0}, {100, 140, 23}, {NR, NR, 0}}, 2}
-
-/* ===========================================20:(2G_FCC1, 5G_NCC1) */
-RT_DOMAIN_20 = {{{01, 11, 30}, {NR, NR, 0}, {56, 64, 23}, {100, 140, 24}, {149, 165, 30}}, 4}
-
-/* ===========================================21:(2G_FCC1, 5G_NCC2) */
-RT_DOMAIN_21 = {{{01, 11, 30}, {NR, NR, 0}, {56, 64, 23}, {NR, NR, 0}, {149, 165, 30}}, 3}
-
-/* ===========================================22:(2G_WORLD, 5G_FCC3) */
-RT_DOMAIN_22 = {{{01, 13, 24}, {36, 48, 20}, {52, 64, 24}, {NR, NR, 0}, {149, 165, 30}}, 4}
-
-/* ===========================================23:(2G_WORLD, 5G_ETSI2) */
-RT_DOMAIN_23 = {{{01, 13, 20}, {36, 48, 23}, {52, 64, 23}, {100, 140, 30}, {149, 165, 30}}, 5}
-
-#endif
-
-/*
- * counter & Realtek channel plan transfer table.
- *   */
-struct _RT_CHANNEL_PLAN_COUNTRY_TRANSFER_TABLE	rt_ctry_chnl_tbl[] = {
-
-	{
-		RT_CTRY_AL,							/*	"Albaniaªüº¸¤Ú¥§¨È" */
-		"AL",
-		RT_2G_WORLD,
-		RT_5G_WORLD,
-		RT_CHANNEL_DOMAIN_UNDEFINED			/* 2G/5G world. */
-	},
-#if 0
-	{
-		RT_CTRY_BB,							/* "Barbados¤Ú¤Ú¦h´µ" */
-		"BB",
-		RT_2G_WORLD,
-		RT_5G_NULL,
-		RT_CHANNEL_DOMAIN_EFUSE_0x20		/* 2G world. 5G_NULL */
-	},
-
-	{
-		RT_CTRY_DE,							/* "Germany¼w°ê" */
-		"DE",
-		RT_2G_WORLD,
-		RT_5G_ETSI1,
-		RT_CHANNEL_DOMAIN_EFUSE_0x26
-	},
-
-	{
-		RT_CTRY_US,							/* "Germany¼w°ê" */
-		"US",
-		RT_2G_FCC1,
-		RT_5G_FCC7,
-		RT_CHANNEL_DOMAIN_EFUSE_0x34
-	},
-
-	{
-		RT_CTRY_JP,							/* "Germany¼w°ê" */
-		"JP",
-		RT_2G_MKK1,
-		RT_5G_MKK1,
-		RT_CHANNEL_DOMAIN_EFUSE_0x34
-	},
-
-	{
-		RT_CTRY_TW,							/* "Germany¼w°ê" */
-		"TW",
-		RT_2G_FCC1,
-		RT_5G_NCC1,
-		RT_CHANNEL_DOMAIN_EFUSE_0x39
-	},
-#endif
-
-};	/* rt_ctry_chnl_tbl */
-
-/*
- * Realtek Defined channel plan.
- *   */
-#if 0
-
-static	struct _RT_CHANNEL_PLAN_NEW		rt_chnl_plan[] = {
-	/* channel Plan   0x20. */
-	{
-		&rt_ctry_chnl_tbl[1],					/* struct _RT_CHANNEL_PLAN_COUNTRY_TRANSFER_TABLE Country & channel plan transfer table. */
-		RT_CHANNEL_DOMAIN_EFUSE_0x20,		/* RT_CHANNEL_DOMAIN RT channel Plan Define */
-		RT_2G_WORLD,						/* enum rt_regulation_2g */
-		RT_5G_NULL,							/* enum rt_regulation_5g */
-		RT_WORLD,							/* enum rt_regulation_cmn RT Regulatory domain definition. */
-		RT_SREQ_NA,							/* RT channel plan special & customerize requirement. */
-
-		CHNL_RT_2G_WORLD,
-		CHNL_RT_2G_WORLD_SCAN_TYPE,
-		&chnl_plan_pwr_max_2g[0],
-
-		CHNL_RT_5G_NULL,
-		CHNL_RT_5G_NULL_SCAN_TYPE,
-
-
-	},
-
-	/* channel Plan   0x26. */
-	{
-		&rt_ctry_chnl_tbl[1],					/* struct _RT_CHANNEL_PLAN_COUNTRY_TRANSFER_TABLE Country & channel plan transfer table. */
-		RT_CHANNEL_DOMAIN_EFUSE_0x26,		/* RT_CHANNEL_DOMAIN RT channel Plan Define */
-		RT_2G_WORLD,						/* enum rt_regulation_2g */
-		RT_5G_ETSI1,						/* enum rt_regulation_5g */
-		RT_WORLD,							/* enum rt_regulation_cmn RT Regulatory domain definition. */
-		RT_SREQ_NA,							/* RT channel plan special & customerize requirement. */
-
-		CHNL_RT_2G_WORLD,					/* 2G workd cannel */
-		CHNL_RT_2G_WORLD_SCAN_TYPE,
-		&chnl_plan_pwr_max_2g[1],
-
-		CHNL_RT_5G_ETSI1,
-		CHNL_RT_5G_ETSI1_SCAN_TYPE,
-
-	}
-
-
-};
-#endif
diff --git a/rtl8822BU/hal/phydm/rtchnlplan.h b/rtl8822BU/hal/phydm/rtchnlplan.h
deleted file mode 100755
index 2e5a24c..0000000
--- a/rtl8822BU/hal/phydm/rtchnlplan.h
+++ b/dev/null
@@ -1,682 +0,0 @@
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
-
-
-#ifndef	__RT_CHANNELPLAN_H__
-#define __RT_CHANNELPLAN_H__
-
-enum rt_channel_domain_new {
-
-	/* ===== Add new channel plan above this line =============== */
-
-	/* For new architecture we define different 2G/5G CH area for all country. */
-	/* 2.4 G only */
-	RT_CHANNEL_DOMAIN_2G_WORLD_5G_NULL				= 0x20,
-	RT_CHANNEL_DOMAIN_2G_ETSI1_5G_NULL				= 0x21,
-	RT_CHANNEL_DOMAIN_2G_FCC1_5G_NULL				= 0x22,
-	RT_CHANNEL_DOMAIN_2G_MKK1_5G_NULL				= 0x23,
-	RT_CHANNEL_DOMAIN_2G_ETSI2_5G_NULL				= 0x24,
-	/* 2.4 G + 5G type 1 */
-	RT_CHANNEL_DOMAIN_2G_FCC1_5G_FCC1				= 0x25,
-	RT_CHANNEL_DOMAIN_2G_WORLD_5G_ETSI1				= 0x26,
-	/* RT_CHANNEL_DOMAIN_2G_WORLD_5G_ETSI1				= 0x27, */
-	/* ..... */
-
-	RT_CHANNEL_DOMAIN_MAX_NEW,
-
-};
-
-
-#if 0
-#define DOMAIN_CODE_2G_WORLD \
-	{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13
-#define DOMAIN_CODE_2G_ETSI1 \
-	{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13
-#define DOMAIN_CODE_2G_ETSI2 \
-	{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11}, 11
-#define DOMAIN_CODE_2G_FCC1 \
-	{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14
-#define DOMAIN_CODE_2G_MKK1 \
-	{10, 11, 12, 13}, 4
-
-#define DOMAIN_CODE_5G_ETSI1 \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 19
-#define DOMAIN_CODE_5G_ETSI2 \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 24
-#define DOMAIN_CODE_5G_ETSI3 \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 149, 153, 157, 161, 165}, 22
-#define DOMAIN_CODE_5G_FCC1 \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 24
-#define DOMAIN_CODE_5G_FCC2 \
-	{36, 40, 44, 48, 149, 153, 157, 161, 165}, 9
-#define DOMAIN_CODE_5G_FCC3 \
-	{36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165}, 13
-#define DOMAIN_CODE_5G_FCC4 \
-	{36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161}, 12
-#define DOMAIN_CODE_5G_FCC5 \
-	{149, 153, 157, 161, 165}, 5
-#define DOMAIN_CODE_5G_FCC6 \
-	{36, 40, 44, 48, 52, 56, 60, 64}, 8
-#define DOMAIN_CODE_5G_FCC7 \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 20
-#define DOMAIN_CODE_5G_IC1 \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 20
-#define DOMAIN_CODE_5G_KCC1 \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165}, 20
-#define DOMAIN_CODE_5G_MKK1 \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 19
-#define DOMAIN_CODE_5G_MKK2 \
-	{36, 40, 44, 48, 52, 56, 60, 64}, 8
-#define DOMAIN_CODE_5G_MKK3 \
-	{100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 11
-#define DOMAIN_CODE_5G_NCC1 \
-	{56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 24
-#define DOMAIN_CODE_5G_NCC2 \
-	{56, 60, 64, 149, 153, 157, 161, 165}, 8
-#define UNDEFINED \
-	{0}, 0
-#endif
-
-/*
- *
- *
- *
-
-Countries							"Country Abbreviation"	Domain Code					SKU's	Ch# of 20MHz
-															2G			5G						Ch# of 40MHz
-"Albaniaªüº¸¤Ú¥§¨È"					AL													Local Test
-
-"Algeriaªüº¸¤Î§Q¨È"					DZ									CE TCF
-
-"Antigua & Barbuda¦w´£¥Ê®q&¤Ú¥¬¹F"	AG						2G_WORLD					FCC TCF
-
-"Argentinaªü®Ú§Ê"					AR						2G_WORLD					Local Test
-
-"Armenia¨È¬ü¥§¨È"					AM						2G_WORLD					ETSI
-
-"Arubaªü¾|¤Ú®q"						AW						2G_WORLD					FCC TCF
-
-"Australia¿D¬w"						AU						2G_WORLD		5G_ETSI2
-
-"Austria¶ø¦a§Q"						AT						2G_WORLD		5G_ETSI1	CE
-
-"Azerbaijanªü¶ë«ô¾Ê"				AZ						2G_WORLD					CE TCF
-
-"Bahamas¤Ú«¢°¨"						BS						2G_WORLD
-
-"Barbados¤Ú¤Ú¦h´µ"					BB						2G_WORLD					FCC TCF
-
-"Belgium¤ñ§Q®É"						BE						2G_WORLD		5G_ETSI1	CE
-
-"Bermuda¦Ê¼}¹F"						BM						2G_WORLD					FCC TCF
-
-"Brazil¤Ú¦è"						BR						2G_WORLD					Local Test
-
-"Bulgaria«O¥[§Q¨È"					BG						2G_WORLD		5G_ETSI1	CE
-
-"Canada¥[®³¤j"						CA						2G_FCC1			5G_FCC7		IC / FCC	IC / FCC
-
-"Cayman Islands¶}°Ò¸s®q"			KY						2G_WORLD		5G_ETSI1	CE
-
-"Chile´¼§Q"							CL						2G_WORLD					FCC TCF
-
-"China¤¤°ê"							CN						2G_WORLD		5G_FCC5		«H³¡?¡i2002¡j353?
-
-"Columbia­ô­Û¤ñ¨È"					CO						2G_WORLD					Voluntary
-
-"Costa Rica­ô´µ¹F¾¤¥["				CR						2G_WORLD					FCC TCF
-
-"Cyprus¶ë®ú¸ô´µ"					CY						2G_WORLD		5G_ETSI1	CE
-
-"Czech ±¶§J"						CZ						2G_WORLD		5G_ETSI1	CE
-
-"Denmark¤¦³Á"						DK						2G_WORLD		5G_ETSI1	CE
-
-"Dominican Republic¦h©ú¥§¥[¦@©M°ê"	DO						2G_WORLD					FCC TCF
-
-"Egypt®J¤Î"	EG	2G_WORLD			CE T												CF
-
-"El SalvadorÂĺ¸¥Ë¦h"				SV						2G_WORLD					Voluntary
-
-"Estonia·R¨F¥§¨È"					EE						2G_WORLD		5G_ETSI1	CE
-
-"FinlandªâÄõ"						FI						2G_WORLD		5G_ETSI1	CE
-
-"Franceªk°ê"						FR										5G_E		TSI1	CE
-
-"Germany¼w°ê"						DE						2G_WORLD		5G_ETSI1	CE
-
-"Greece §Æþ"						GR						2G_WORLD		5G_ETSI1	CE
-
-"GuamÃö®q"							GU						2G_WORLD
-
-"Guatemala¥Ê¦a°¨©Ô"					GT						2G_WORLD
-
-"Haiti®ü¦a"							HT						2G_WORLD					FCC TCF
-
-"Honduras§»³£©Ô´µ"					HN						2G_WORLD					FCC TCF
-
-"Hungary¦I¤ú§Q"						HU						2G_WORLD		5G_ETSI1	CE
-
-"Iceland¦B®q"						IS						2G_WORLD		5G_ETSI1	CE
-
-"India¦L«×"												2G_WORLD		5G_FCC3		FCC/CE TCF
-
-"Ireland·Rº¸Äõ"						IE						2G_WORLD		5G_ETSI1	CE
-
-"Israel¥H¦â¦C"						IL										5G_F		CC6	CE TCF
-
-"Italy¸q¤j§Q"						IT						2G_WORLD		5G_ETSI1	CE
-
-"Japan¤é¥»"							JP						2G_MKK1			5G_MKK1		MKK	MKK
-
-"KoreaÁú°ê"							KR						2G_WORLD		5G_KCC1		KCC	KCC
-
-"Latvia©Ô²æºû¨È"					LV						2G_WORLD		5G_ETSI1	CE
-
-"Lithuania¥ß³³©{"					LT						2G_WORLD		5G_ETSI1	CE
-
-"Luxembourg¿c´Ë³ù"					LU						2G_WORLD		5G_ETSI1	CE
-
-"Malaysia°¨¨Ó¦è¨È"					MY						2G_WORLD					Local Test
-
-"Malta°¨º¸¥L"						MT						2G_WORLD		5G_ETSI1	CE
-
-"Mexico¾¥¦è­ô"						MX						2G_WORLD		5G_FCC3		Local Test
-
-"Morocco¼¯¬¥­ô"						MA													CE TCF
-
-"Netherlands²üÄõ"					NL						2G_WORLD		5G_ETSI1	CE
-
-"New Zealand¯Ã¦èÄõ"					NZ						2G_WORLD		5G_ETSI2
-
-"Norway®¿«Â"						NO						2G_WORLD		5G_ETSI1	CE
-
-"Panama¤Ú®³°¨ "						PA						2G_FCC1						Voluntary
-
-"Philippines栮ᯮ"					PH						2G_WORLD					FCC TCF
-
-"PolandªiÄõ"						PL						2G_WORLD		5G_ETSI1	CE
-
-"Portugal¸²µå¤ú"					PT						2G_WORLD		5G_ETSI1	CE
-
-"Romaniaù°¨¥§¨È"					RO						2G_WORLD		5G_ETSI1	CE
-
-"Russia«Xù´µ"						RU						2G_WORLD		5G_ETSI3	CE TCF
-
-"Saudi Arabia¨F¦aªü©Ô§B"			SA						2G_WORLD					CE TCF
-
-"Singapore·s¥[©Y"					SG						2G_WORLD
-
-"Slovakia´µ¬¥¥ï§J"					SK						2G_WORLD		5G_ETSI1	CE
-
-"Slovenia´µ¬¥ºû¥§¨È"				SI						2G_WORLD		5G_ETSI1	CE
-
-"South Africa«n«D"					ZA						2G_WORLD					CE TCF
-
-"Spain¦è¯Z¤ú"						ES										5G_ETSI1	CE
-
-"Sweden·ç¨å"						SE						2G_WORLD		5G_ETSI1	CE
-
-"Switzerland·ç¤h"					CH						2G_WORLD		5G_ETSI1	CE
-
-"Taiwan»OÆW"						TW						2G_FCC1			5G_NCC1	NCC
-
-"Thailand®õ°ê"						TH						2G_WORLD					FCC/CE TCF
-
-"Turkey¤g¦Õ¨ä"						TR						2G_WORLD
-
-"Ukraine¯Q§JÄõ"						UA						2G_WORLD					Local Test
-
-"United Kingdom­^°ê"				GB						2G_WORLD		5G_ETSI1	CE	ETSI
-
-"United States¬ü°ê"					US						2G_FCC1			5G_FCC7		FCC	FCC
-
-"Venezuela©e¤º·ç©Ô"					VE						2G_WORLD		5G_FCC4		FCC TCF
-
-"Vietnam¶V«n"						VN						2G_WORLD					FCC/CE TCF
-
-
-
-*/
-
-/* counter abbervation. */
-enum rt_country_name {
-	RT_CTRY_AL,				/*	"Albaniaªüº¸¤Ú¥§¨È" */
-	RT_CTRY_DZ,             /* "Algeriaªüº¸¤Î§Q¨È" */
-	RT_CTRY_AG,             /* "Antigua & Barbuda¦w´£¥Ê®q&¤Ú¥¬¹F" */
-	RT_CTRY_AR,             /* "Argentinaªü®Ú§Ê" */
-	RT_CTRY_AM,             /* "Armenia¨È¬ü¥§¨È" */
-	RT_CTRY_AW,             /* "Arubaªü¾|¤Ú®q" */
-	RT_CTRY_AU,             /* "Australia¿D¬w" */
-	RT_CTRY_AT,             /* "Austria¶ø¦a§Q" */
-	RT_CTRY_AZ,             /* "Azerbaijanªü¶ë«ô¾Ê" */
-	RT_CTRY_BS,             /* "Bahamas¤Ú«¢°¨" */
-	RT_CTRY_BB,             /* "Barbados¤Ú¤Ú¦h´µ" */
-	RT_CTRY_BE,             /* "Belgium¤ñ§Q®É" */
-	RT_CTRY_BM,             /* "Bermuda¦Ê¼}¹F" */
-	RT_CTRY_BR,             /* "Brazil¤Ú¦è" */
-	RT_CTRY_BG,             /* "Bulgaria«O¥[§Q¨È" */
-	RT_CTRY_CA,             /* "Canada¥[®³¤j" */
-	RT_CTRY_KY,             /* "Cayman Islands¶}°Ò¸s®q" */
-	RT_CTRY_CL,             /* "Chile´¼§Q" */
-	RT_CTRY_CN,             /* "China¤¤°ê" */
-	RT_CTRY_CO,             /* "Columbia­ô­Û¤ñ¨È" */
-	RT_CTRY_CR,             /* "Costa Rica­ô´µ¹F¾¤¥[" */
-	RT_CTRY_CY,             /* "Cyprus¶ë®ú¸ô´µ" */
-	RT_CTRY_CZ,             /* "Czech ±¶§J" */
-	RT_CTRY_DK,             /* "Denmark¤¦³Á" */
-	RT_CTRY_DO,             /* "Dominican Republic¦h©ú¥§¥[¦@©M°ê" */
-	RT_CTRY_CE,             /* "Egypt®J¤Î"	EG	2G_WORLD */
-	RT_CTRY_SV,             /* "El SalvadorÂĺ¸¥Ë¦h" */
-	RT_CTRY_EE,             /* "Estonia·R¨F¥§¨È" */
-	RT_CTRY_FI,             /* "FinlandªâÄõ" */
-	RT_CTRY_FR,             /* "Franceªk°ê" */
-	RT_CTRY_DE,             /* "Germany¼w°ê" */
-	RT_CTRY_GR,             /* "Greece §Æþ" */
-	RT_CTRY_GU,             /* "GuamÃö®q" */
-	RT_CTRY_GT,             /* "Guatemala¥Ê¦a°¨©Ô" */
-	RT_CTRY_HT,             /* "Haiti®ü¦a" */
-	RT_CTRY_HN,             /* "Honduras§»³£©Ô´µ" */
-	RT_CTRY_HU,             /* "Hungary¦I¤ú§Q" */
-	RT_CTRY_IS,             /* "Iceland¦B®q" */
-	RT_CTRY_IN,             /* "India¦L«×" */
-	RT_CTRY_IE,             /* "Ireland·Rº¸Äõ" */
-	RT_CTRY_IL,             /* "Israel¥H¦â¦C" */
-	RT_CTRY_IT,             /* "Italy¸q¤j§Q" */
-	RT_CTRY_JP,             /* "Japan¤é¥»" */
-	RT_CTRY_KR,             /* "KoreaÁú°ê" */
-	RT_CTRY_LV,             /* "Latvia©Ô²æºû¨È" */
-	RT_CTRY_LT,             /* "Lithuania¥ß³³©{" */
-	RT_CTRY_LU,             /* "Luxembourg¿c´Ë³ù" */
-	RT_CTRY_MY,             /* "Malaysia°¨¨Ó¦è¨È" */
-	RT_CTRY_MT,             /* "Malta°¨º¸¥L" */
-	RT_CTRY_MX,             /* "Mexico¾¥¦è­ô" */
-	RT_CTRY_MA,             /* "Morocco¼¯¬¥­ô" */
-	RT_CTRY_NL,             /* "Netherlands²üÄõ" */
-	RT_CTRY_NZ,             /* "New Zealand¯Ã¦èÄõ" */
-	RT_CTRY_NO,             /* "Norway®¿«Â" */
-	RT_CTRY_PA,             /* "Panama¤Ú®³°¨ " */
-	RT_CTRY_PH,             /* "Philippines栮ᯮ" */
-	RT_CTRY_PL,             /* "PolandªiÄõ" */
-	RT_CTRY_PT,             /* "Portugal¸²µå¤ú" */
-	RT_CTRY_RO,             /* "Romaniaù°¨¥§¨È" */
-	RT_CTRY_RU,             /* "Russia«Xù´µ" */
-	RT_CTRY_SA,             /* "Saudi Arabia¨F¦aªü©Ô§B" */
-	RT_CTRY_SG,             /* "Singapore·s¥[©Y" */
-	RT_CTRY_SK,             /* "Slovakia´µ¬¥¥ï§J" */
-	RT_CTRY_SI,             /* "Slovenia´µ¬¥ºû¥§¨È" */
-	RT_CTRY_ZA,             /* "South Africa«n«D" */
-	RT_CTRY_ES,             /* "Spain¦è¯Z¤ú" */
-	RT_CTRY_SE,             /* "Sweden·ç¨å" */
-	RT_CTRY_CH,             /* "Switzerland·ç¤h" */
-	RT_CTRY_TW,             /* "Taiwan»OÆW" */
-	RT_CTRY_TH,             /* "Thailand®õ°ê" */
-	RT_CTRY_TR,             /* "Turkey¤g¦Õ¨ä" */
-	RT_CTRY_UA,             /* "Ukraine¯Q§JÄõ" */
-	RT_CTRY_GB,             /* "United Kingdom­^°ê" */
-	RT_CTRY_US,             /* "United States¬ü°ê" */
-	RT_CTRY_VE,             /* "Venezuela©e¤º·ç©Ô" */
-	RT_CTRY_VN,             /* "Vietnam¶V«n" */
-	RT_CTRY_MAX,
-
-};
-
-/* Scan type including active and passive scan. */
-enum rt_scan_type_new {
-	SCAN_NULL,
-	SCAN_ACT,
-	SCAN_PAS,
-	SCAN_BOTH,
-};
-
-
-/* Power table sample. */
-
-struct _RT_CHNL_PLAN_LIMIT {
-	u16	chnl_start;
-	u16	chnl_end;
-
-	u16	freq_start;
-	u16	freq_end;
-};
-
-
-/*
- * 2.4G Regulatory Domains
- *   */
-enum rt_regulation_2g {
-	RT_2G_NULL,
-	RT_2G_WORLD,
-	RT_2G_ETSI1,
-	RT_2G_FCC1,
-	RT_2G_MKK1,
-	RT_2G_ETSI2
-
-};
-
-
-/* typedef struct _RT_CHANNEL_BEHAVIOR
- * {
- *	u8	chnl;
- *	enum rt_scan_type_new
- *
- * }RT_CHANNEL_BEHAVIOR, *PRT_CHANNEL_BEHAVIOR; */
-
-/* typedef struct _RT_CHANNEL_PLAN_TYPE
- * {
- *	RT_CHANNEL_BEHAVIOR
- *	u8					Chnl_num;
- * }RT_CHNL_PLAN_TYPE, *PRT_CHNL_PLAN_TYPE; */
-
-/*
- * 2.4G channel number
- * channel definition & number
- *   */
-#define CHNL_RT_2G_NULL \
-	{0}, 0
-#define CHNL_RT_2G_WORLD \
-	{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13
-#define CHNL_RT_2G_WORLD_TEST \
-	{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13
-
-#define CHNL_RT_2G_EFSI1 \
-	{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13
-#define CHNL_RT_2G_FCC1 \
-	{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11}, 11
-#define CHNL_RT_2G_MKK1 \
-	{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14
-#define CHNL_RT_2G_ETSI2 \
-	{10, 11, 12, 13}, 4
-
-/*
- * 2.4G channel active or passive scan.
- *   */
-#define CHNL_RT_2G_NULL_SCAN_TYPE \
-	{SCAN_NULL}
-#define CHNL_RT_2G_WORLD_SCAN_TYPE \
-	{1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0}
-#define CHNL_RT_2G_EFSI1_SCAN_TYPE \
-	{1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
-#define CHNL_RT_2G_FCC1_SCAN_TYPE \
-	{1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
-#define CHNL_RT_2G_MKK1_SCAN_TYPE \
-	{1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
-#define CHNL_RT_2G_ETSI2_SCAN_TYPE \
-	{1, 1, 1, 1}
-
-
-/*
- * 2.4G band & Frequency Section
- * Freqency start & end / band number
- *   */
-#define FREQ_RT_2G_NULL \
-	{0}, 0
-/* Passive scan CH 12, 13 */
-#define FREQ_RT_2G_WORLD \
-	{2412, 2472}, 1
-#define FREQ_RT_2G_EFSI1 \
-	{2412, 2472}, 1
-#define FREQ_RT_2G_FCC1 \
-	{2412, 2462}, 1
-#define FREQ_RT_2G_MKK1 \
-	{2412, 2484}, 1
-#define FREQ_RT_2G_ETSI2 \
-	{2457, 2472}, 1
-
-
-/*
- * 5G Regulatory Domains
- *   */
-enum rt_regulation_5g {
-	RT_5G_NULL,
-	RT_5G_WORLD,
-	RT_5G_ETSI1,
-	RT_5G_ETSI2,
-	RT_5G_ETSI3,
-	RT_5G_FCC1,
-	RT_5G_FCC2,
-	RT_5G_FCC3,
-	RT_5G_FCC4,
-	RT_5G_FCC5,
-	RT_5G_FCC6,
-	RT_5G_FCC7,
-	RT_5G_IC1,
-	RT_5G_KCC1,
-	RT_5G_MKK1,
-	RT_5G_MKK2,
-	RT_5G_MKK3,
-	RT_5G_NCC1,
-
-};
-
-/*
- * 5G channel number
- *   */
-#define CHNL_RT_5G_NULL \
-	{0}, 0
-#define CHNL_RT_5G_WORLD \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 19
-#define CHNL_RT_5G_ETSI1 \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 24
-#define CHNL_RT_5G_ETSI2 \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 149, 153, 157, 161, 165}, 22
-#define CHNL_RT_5G_ETSI3 \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 24
-#define CHNL_RT_5G_FCC1 \
-	{36, 40, 44, 48, 149, 153, 157, 161, 165}, 9
-#define CHNL_RT_5G_FCC2 \
-	{36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165}, 13
-#define CHNL_RT_5G_FCC3 \
-	{36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161}, 12
-#define CHNL_RT_5G_FCC4 \
-	{149, 153, 157, 161, 165}, 5
-#define CHNL_RT_5G_FCC5 \
-	{36, 40, 44, 48, 52, 56, 60, 64}, 8
-#define CHNL_RT_5G_FCC6 \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 20
-#define CHNL_RT_5G_FCC7 \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 20
-#define CHNL_RT_5G_IC1 \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165}, 20
-#define CHNL_RT_5G_KCC1 \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 19
-#define CHNL_RT_5G_MKK1 \
-	{36, 40, 44, 48, 52, 56, 60, 64}, 8
-#define CHNL_RT_5G_MKK2 \
-	{100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 11
-#define CHNL_RT_5G_MKK3 \
-	{56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 24
-#define CHNL_RT_5G_NCC1 \
-	{56, 60, 64, 149, 153, 157, 161, 165}, 8
-
-/*
- * 5G channel active or passive scan.
- *   */
-#define CHNL_RT_5G_NULL_SCAN_TYPE \
-	{SCAN_NULL}
-#define CHNL_RT_5G_WORLD_SCAN_TYPE \
-	{1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
-#define CHNL_RT_5G_ETSI1_SCAN_TYPE \
-	{1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
-#define CHNL_RT_5G_ETSI2_SCAN_TYPE \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 149, 153, 157, 161, 165}, 22
-#define CHNL_RT_5G_ETSI3_SCAN_TYPE \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 24
-#define CHNL_RT_5G_FCC1_SCAN_TYPE \
-	{36, 40, 44, 48, 149, 153, 157, 161, 165}, 9
-#define CHNL_RT_5G_FCC2_SCAN_TYPE \
-	{36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165}, 13
-#define CHNL_RT_5G_FCC3_SCAN_TYPE \
-	{36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161}, 12
-#define CHNL_RT_5G_FCC4_SCAN_TYPE \
-	{149, 153, 157, 161, 165}, 5
-#define CHNL_RT_5G_FCC5_SCAN_TYPE \
-	{36, 40, 44, 48, 52, 56, 60, 64}, 8
-#define CHNL_RT_5G_FCC6_SCAN_TYPE \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 20
-#define CHNL_RT_5G_FCC7_SCAN_TYPE \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 20
-#define CHNL_RT_5G_IC1_SCAN_TYPE \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165}, 20
-#define CHNL_RT_5G_KCC1_SCAN_TYPE \
-	{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 19
-#define CHNL_RT_5G_MKK1_SCAN_TYPE \
-	{36, 40, 44, 48, 52, 56, 60, 64}, 8
-#define CHNL_RT_5G_MKK2_SCAN_TYPE \
-	{100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 11
-#define CHNL_RT_5G_MKK3_SCAN_TYPE \
-	{56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 24
-#define CHNL_RT_5G_NCC1_SCAN_TYPE \
-	{56, 60, 64, 149, 153, 157, 161, 165}, 8
-
-/*
- * Global regulation
- *   */
-enum rt_regulation_cmn {
-	RT_WORLD,
-	RT_FCC,
-	RT_MKK,
-	RT_ETSI,
-	RT_IC,
-	RT_CE,
-	RT_NCC,
-
-};
-
-
-
-/*
- * Special requirement for different regulation domain.
- * For internal test or customerize special request.
- *   */
-enum rt_chnlplan_sreq {
-	RT_SREQ_NA						= 0x0,
-	RT_SREQ_2G_ADHOC_11N			= 0x00000001,
-	RT_SREQ_2G_ADHOC_11B			= 0x00000002,
-	RT_SREQ_2G_ALL_PASS				= 0x00000004,
-	RT_SREQ_2G_ALL_ACT				= 0x00000008,
-	RT_SREQ_5G_ADHOC_11N			= 0x00000010,
-	RT_SREQ_5G_ADHOC_11AC			= 0x00000020,
-	RT_SREQ_5G_ALL_PASS				= 0x00000040,
-	RT_SREQ_5G_ALL_ACT				= 0x00000080,
-	RT_SREQ_C1_PLAN					= 0x00000100,
-	RT_SREQ_C2_PLAN					= 0x00000200,
-	RT_SREQ_C3_PLAN					= 0x00000400,
-	RT_SREQ_C4_PLAN					= 0x00000800,
-	RT_SREQ_NFC_ON					= 0x00001000,
-	RT_SREQ_MASK					= 0x0000FFFF,   /* Requirements bit mask */
-
-};
-
-
-/*
- * enum rt_country_name & enum rt_regulation_2g & enum rt_regulation_5g transfer table
- *
- *   */
-struct _RT_CHANNEL_PLAN_COUNTRY_TRANSFER_TABLE {
-	/*  */
-	/* Define countery domain and corresponding */
-	/*  */
-	enum rt_country_name		country_enum;
-	char				country_name[3];
-
-	/* char		Domain_Name[12]; */
-	enum rt_regulation_2g	domain_2g;
-
-	enum rt_regulation_5g	domain_5g;
-
-	RT_CHANNEL_DOMAIN	rt_ch_domain;
-	/* u8		Country_Area; */
-
-};
-
-
-#define		RT_MAX_CHNL_NUM_2G		13
-#define		RT_MAX_CHNL_NUM_5G		44
-
-/* Power table sample. */
-
-struct _RT_CHNL_PLAN_PWR_LIMIT {
-	u16	chnl_start;
-	u16	chnl_end;
-	u8	db_max;
-	u16	m_w_max;
-};
-
-
-#define		RT_MAX_BAND_NUM			5
-
-struct _RT_CHANNEL_PLAN_MAXPWR {
-	/*	STRING_T */
-	struct _RT_CHNL_PLAN_PWR_LIMIT	chnl[RT_MAX_BAND_NUM];
-	u8				band_useful_num;
-
-
-};
-
-
-/*
- * Power By rate Table.
- *   */
-
-
-
-struct _RT_CHANNEL_PLAN_NEW {
-	/*  */
-	/* Define countery domain and corresponding */
-	/*  */
-	/* char		country_name[36]; */
-	/* u8		country_enum; */
-
-	/* char		Domain_Name[12]; */
-
-
-	struct _RT_CHANNEL_PLAN_COUNTRY_TRANSFER_TABLE		*p_ctry_transfer;
-
-	RT_CHANNEL_DOMAIN		rt_ch_domain;
-
-	enum rt_regulation_2g		domain_2g;
-
-	enum rt_regulation_5g		domain_5g;
-
-	enum rt_regulation_cmn		regulator;
-
-	enum rt_chnlplan_sreq		chnl_sreq;
-
-	/* struct _RT_CHNL_PLAN_LIMIT		RtChnl; */
-
-	u8	chnl_2g[MAX_CHANNEL_NUM];				/* CHNL_RT_2G_WORLD */
-	u8	len_2g;
-	u8	chnl_2g_scan_tp[MAX_CHANNEL_NUM];			/* CHNL_RT_2G_WORLD_SCAN_TYPE */
-	/* u8	Freq2G[2];								 */ /* FREQ_RT_2G_WORLD */
-
-	u8	chnl_5g[MAX_CHANNEL_NUM];
-	u8	len_5g;
-	u8	chnl_5g_scan_tp[MAX_CHANNEL_NUM];
-	/* u8	Freq2G[2];								 */ /* FREQ_RT_2G_WORLD */
-
-	struct _RT_CHANNEL_PLAN_MAXPWR	chnl_max_pwr;
-
-
-};
-
-
-#endif /* __RT_CHANNELPLAN_H__ */
diff --git a/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_bb.c b/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_bb.c
index fc3c613..a23b07e 100755..100644
--- a/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_bb.c
+++ b/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_bb.c
@@ -1,6 +1,6 @@
 /******************************************************************************
 *
-* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+* Copyright(c) 2007 - 2017 Realtek Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of version 2 of the GNU General Public License as
@@ -11,19 +11,14 @@
 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
 * more details.
 *
-* You should have received a copy of the GNU General Public License along with
-* this program; if not, write to the Free Software Foundation, Inc.,
-* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
-*
-*
 ******************************************************************************/
 
-/*Image2HeaderVersion: 3.1*/
+/*Image2HeaderVersion: R2 1.2.1*/
 #include "mp_precomp.h"
 #include "../phydm_precomp.h"
 
 #if (RTL8822B_SUPPORT == 1)
-static bool
+static boolean
 check_positive(
 	struct PHY_DM_STRUCT *p_dm_odm,
 	const u32	condition1,
@@ -32,19 +27,17 @@ check_positive(
 	const u32	condition4
 )
 {
-	u8	_board_type = ((p_dm_odm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/
-			((p_dm_odm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/
-			((p_dm_odm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/
-			((p_dm_odm->board_type & BIT(6)) >> 6) << 3 | /* _APA */
-			((p_dm_odm->board_type & BIT(2)) >> 2) << 4;  /* _BT*/
-
 	u32	cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4;
-	u32	driver1 = p_dm_odm->cut_version << 24 |
+
+	u8	cut_version_for_para = (p_dm_odm->cut_version ==  ODM_CUT_A) ? 15 : p_dm_odm->cut_version;
+	u8	pkg_type_for_para = (p_dm_odm->package_type == 0) ? 15 : p_dm_odm->package_type;
+
+	u32	driver1 = cut_version_for_para << 24 |
 			(p_dm_odm->support_interface & 0xF0) << 16 |
 			p_dm_odm->support_platform << 16 |
-			p_dm_odm->package_type << 12 |
+			pkg_type_for_para << 12 |
 			(p_dm_odm->support_interface & 0x0F) << 8  |
-			_board_type;
+			p_dm_odm->rfe_type;
 
 	u32	driver2 = (p_dm_odm->type_glna & 0xFF) <<  0 |
 			(p_dm_odm->type_gpa & 0xFF)  <<  8 |
@@ -66,46 +59,32 @@ check_positive(
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_TRACE,
 	("	(Platform, Interface) = (0x%X, 0x%X)\n", p_dm_odm->support_platform, p_dm_odm->support_interface));
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_TRACE,
-	("	(Board, Package) = (0x%X, 0x%X)\n", p_dm_odm->board_type, p_dm_odm->package_type));
+	("	(RFE, Package) = (0x%X, 0x%X)\n", p_dm_odm->rfe_type, p_dm_odm->package_type));
 
 
 	/*============== value Defined Check ===============*/
-	/*QFN type [15:12] and cut version [27:24] need to do value check*/
+	/*cut version [27:24] need to do value check*/
 
-	if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000)))
-		return false;
 	if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000)))
 		return false;
 
-	/*=============== Bit Defined Check ================*/
-	/* We don't care [31:28] */
+	/*pkg type [15:12] need to do value check*/
 
-	cond1 &= 0x00FF0FFF;
-	driver1 &= 0x00FF0FFF;
-
-	if ((cond1 & driver1) == cond1) {
-		u32	bit_mask = 0;
+	if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000)))
+		return false;
 
-		if ((cond1 & 0x0F) == 0) /* board_type is DONTCARE*/
-			return true;
+	/*=============== Bit Defined Check ================*/
+	/* We don't care [31:28] */
 
-		if ((cond1 & BIT(0)) != 0) /*GLNA*/
-			bit_mask |= 0x000000FF;
-		if ((cond1 & BIT(1)) != 0) /*GPA*/
-			bit_mask |= 0x0000FF00;
-		if ((cond1 & BIT(2)) != 0) /*ALNA*/
-			bit_mask |= 0x00FF0000;
-		if ((cond1 & BIT(3)) != 0) /*APA*/
-			bit_mask |= 0xFF000000;
+	cond1 &= 0x000000FF;
+	driver1 &= 0x000000FF;
 
-		if (((cond2 & bit_mask) == (driver2 & bit_mask)) && ((cond4 & bit_mask) == (driver4 & bit_mask)))  /* board_type of each RF path is matched*/
-			return true;
-		else
-			return false;
-	} else
+	if (cond1 == driver1)
+		return true;
+	else
 		return false;
 }
-static bool
+static boolean
 check_negative(
 	struct PHY_DM_STRUCT *p_dm_odm,
 	const u32	condition1,
@@ -120,7 +99,73 @@ check_negative(
 ******************************************************************************/
 
 u32 array_mp_8822b_agc_tab[] = {
-	0x8000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x80000000,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFF000003,
+		0x81C, 0xFE000003,
+		0x81C, 0xFD020003,
+		0x81C, 0xFC040003,
+		0x81C, 0xFB060003,
+		0x81C, 0xFA080003,
+		0x81C, 0xF90A0003,
+		0x81C, 0xF80C0003,
+		0x81C, 0xF70E0003,
+		0x81C, 0xF6100003,
+		0x81C, 0xF5120003,
+		0x81C, 0xF4140003,
+		0x81C, 0xF3160003,
+		0x81C, 0xF2180003,
+		0x81C, 0xF11A0003,
+		0x81C, 0xF01C0003,
+		0x81C, 0xEF1E0003,
+		0x81C, 0xEE200003,
+		0x81C, 0xED220003,
+		0x81C, 0xEC240003,
+		0x81C, 0xEB260003,
+		0x81C, 0xEA280003,
+		0x81C, 0xE92A0003,
+		0x81C, 0xE82C0003,
+		0x81C, 0xE72E0003,
+		0x81C, 0xE6300003,
+		0x81C, 0xE5320003,
+		0x81C, 0xC8340003,
+		0x81C, 0xC7360003,
+		0x81C, 0xC6380003,
+		0x81C, 0xC53A0003,
+		0x81C, 0xC43C0003,
+		0x81C, 0xC33E0003,
+		0x81C, 0xC2400003,
+		0x81C, 0xC1420003,
+		0x81C, 0xC0440003,
+		0x81C, 0xA3460003,
+		0x81C, 0xA2480003,
+		0x81C, 0xA14A0003,
+		0x81C, 0xA04C0003,
+		0x81C, 0x824E0003,
+		0x81C, 0x81500003,
+		0x81C, 0x80520003,
+		0x81C, 0x64540003,
+		0x81C, 0x63560003,
+		0x81C, 0x62580003,
+		0x81C, 0x445A0003,
+		0x81C, 0x435C0003,
+		0x81C, 0x425E0003,
+		0x81C, 0x41600003,
+		0x81C, 0x40620003,
+		0x81C, 0x05640003,
+		0x81C, 0x04660003,
+		0x81C, 0x03680003,
+		0x81C, 0x026A0003,
+		0x81C, 0x016C0003,
+		0x81C, 0x006E0003,
+		0x81C, 0x00700003,
+		0x81C, 0x00720003,
+		0x81C, 0x00740003,
+		0x81C, 0x00760003,
+		0x81C, 0x00780003,
+		0x81C, 0x007A0003,
+		0x81C, 0x007C0003,
+		0x81C, 0x007E0003,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFF000003,
 		0x81C, 0xF5000003,
 		0x81C, 0xF4020003,
@@ -186,59 +231,191 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0003,
 		0x81C, 0x007C0003,
 		0x81C, 0x007E0003,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFF000003,
-		0x81C, 0xF5000003,
-		0x81C, 0xF4020003,
-		0x81C, 0xF3040003,
-		0x81C, 0xF2060003,
-		0x81C, 0xF1080003,
-		0x81C, 0xF00A0003,
-		0x81C, 0xEF0C0003,
-		0x81C, 0xEE0E0003,
-		0x81C, 0xED100003,
-		0x81C, 0xEC120003,
-		0x81C, 0xEB140003,
-		0x81C, 0xEA160003,
-		0x81C, 0xE9180003,
-		0x81C, 0xE81A0003,
-		0x81C, 0xE71C0003,
-		0x81C, 0xE61E0003,
-		0x81C, 0xE5200003,
-		0x81C, 0xE4220003,
-		0x81C, 0xE3240003,
-		0x81C, 0xE2260003,
-		0x81C, 0xE1280003,
-		0x81C, 0xE02A0003,
-		0x81C, 0xC32C0003,
-		0x81C, 0xC22E0003,
-		0x81C, 0xC1300003,
-		0x81C, 0xC0320003,
-		0x81C, 0xA4340003,
-		0x81C, 0xA3360003,
-		0x81C, 0xA2380003,
-		0x81C, 0xA13A0003,
-		0x81C, 0xA03C0003,
-		0x81C, 0x823E0003,
-		0x81C, 0x81400003,
-		0x81C, 0x80420003,
-		0x81C, 0x64440003,
-		0x81C, 0x63460003,
-		0x81C, 0x62480003,
-		0x81C, 0x614A0003,
-		0x81C, 0x604C0003,
+		0x81C, 0xFD000003,
+		0x81C, 0xFC020003,
+		0x81C, 0xFB040003,
+		0x81C, 0xFA060003,
+		0x81C, 0xF9080003,
+		0x81C, 0xF80A0003,
+		0x81C, 0xF70C0003,
+		0x81C, 0xF60E0003,
+		0x81C, 0xF5100003,
+		0x81C, 0xF4120003,
+		0x81C, 0xF3140003,
+		0x81C, 0xF2160003,
+		0x81C, 0xF1180003,
+		0x81C, 0xF01A0003,
+		0x81C, 0xEF1C0003,
+		0x81C, 0xEE1E0003,
+		0x81C, 0xED200003,
+		0x81C, 0xEC220003,
+		0x81C, 0xEB240003,
+		0x81C, 0xEA260003,
+		0x81C, 0xE9280003,
+		0x81C, 0xE82A0003,
+		0x81C, 0xE72C0003,
+		0x81C, 0xE62E0003,
+		0x81C, 0xE5300003,
+		0x81C, 0xC8320003,
+		0x81C, 0xC7340003,
+		0x81C, 0xC6360003,
+		0x81C, 0xC5380003,
+		0x81C, 0xC43A0003,
+		0x81C, 0xC33C0003,
+		0x81C, 0xC23E0003,
+		0x81C, 0xC1400003,
+		0x81C, 0xC0420003,
+		0x81C, 0xA5440003,
+		0x81C, 0xA4460003,
+		0x81C, 0xA3480003,
+		0x81C, 0xA24A0003,
+		0x81C, 0xA14C0003,
+		0x81C, 0x834E0003,
+		0x81C, 0x82500003,
+		0x81C, 0x81520003,
+		0x81C, 0x80540003,
+		0x81C, 0x65560003,
+		0x81C, 0x64580003,
+		0x81C, 0x635A0003,
+		0x81C, 0x625C0003,
+		0x81C, 0x435E0003,
+		0x81C, 0x42600003,
+		0x81C, 0x41620003,
+		0x81C, 0x40640003,
+		0x81C, 0x06660003,
+		0x81C, 0x05680003,
+		0x81C, 0x046A0003,
+		0x81C, 0x036C0003,
+		0x81C, 0x026E0003,
+		0x81C, 0x01700003,
+		0x81C, 0x00720003,
+		0x81C, 0x00740003,
+		0x81C, 0x00760003,
+		0x81C, 0x00780003,
+		0x81C, 0x007A0003,
+		0x81C, 0x007C0003,
+		0x81C, 0x007E0003,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFF000003,
+		0x81C, 0xFD000003,
+		0x81C, 0xFC020003,
+		0x81C, 0xFB040003,
+		0x81C, 0xFA060003,
+		0x81C, 0xF9080003,
+		0x81C, 0xF80A0003,
+		0x81C, 0xF70C0003,
+		0x81C, 0xF60E0003,
+		0x81C, 0xF5100003,
+		0x81C, 0xF4120003,
+		0x81C, 0xF3140003,
+		0x81C, 0xF2160003,
+		0x81C, 0xF1180003,
+		0x81C, 0xF01A0003,
+		0x81C, 0xEF1C0003,
+		0x81C, 0xEE1E0003,
+		0x81C, 0xED200003,
+		0x81C, 0xEC220003,
+		0x81C, 0xEB240003,
+		0x81C, 0xEA260003,
+		0x81C, 0xE9280003,
+		0x81C, 0xE82A0003,
+		0x81C, 0xE72C0003,
+		0x81C, 0xE62E0003,
+		0x81C, 0xE5300003,
+		0x81C, 0xC8320003,
+		0x81C, 0xC7340003,
+		0x81C, 0xC6360003,
+		0x81C, 0xC5380003,
+		0x81C, 0xC43A0003,
+		0x81C, 0xC33C0003,
+		0x81C, 0xC23E0003,
+		0x81C, 0xC1400003,
+		0x81C, 0xC0420003,
+		0x81C, 0xA5440003,
+		0x81C, 0xA4460003,
+		0x81C, 0xA3480003,
+		0x81C, 0xA24A0003,
+		0x81C, 0xA14C0003,
+		0x81C, 0x834E0003,
+		0x81C, 0x82500003,
+		0x81C, 0x81520003,
+		0x81C, 0x80540003,
+		0x81C, 0x65560003,
+		0x81C, 0x64580003,
+		0x81C, 0x635A0003,
+		0x81C, 0x625C0003,
+		0x81C, 0x435E0003,
+		0x81C, 0x42600003,
+		0x81C, 0x41620003,
+		0x81C, 0x40640003,
+		0x81C, 0x06660003,
+		0x81C, 0x05680003,
+		0x81C, 0x046A0003,
+		0x81C, 0x036C0003,
+		0x81C, 0x026E0003,
+		0x81C, 0x01700003,
+		0x81C, 0x00720003,
+		0x81C, 0x00740003,
+		0x81C, 0x00760003,
+		0x81C, 0x00780003,
+		0x81C, 0x007A0003,
+		0x81C, 0x007C0003,
+		0x81C, 0x007E0003,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFF000003,
+		0x81C, 0xDC000003,
+		0x81C, 0xDB020003,
+		0x81C, 0xDA040003,
+		0x81C, 0xD9060003,
+		0x81C, 0xD8080003,
+		0x81C, 0xD70A0003,
+		0x81C, 0xD60C0003,
+		0x81C, 0xD50E0003,
+		0x81C, 0xD4100003,
+		0x81C, 0xD3120003,
+		0x81C, 0xD2140003,
+		0x81C, 0xD1160003,
+		0x81C, 0xD0180003,
+		0x81C, 0xB41A0003,
+		0x81C, 0xB31C0003,
+		0x81C, 0xB21E0003,
+		0x81C, 0xB1200003,
+		0x81C, 0xB0220003,
+		0x81C, 0xAF240003,
+		0x81C, 0xAE260003,
+		0x81C, 0xAD280003,
+		0x81C, 0xAC2A0003,
+		0x81C, 0xAB2C0003,
+		0x81C, 0x8C2E0003,
+		0x81C, 0x8B300003,
+		0x81C, 0x8A320003,
+		0x81C, 0x89340003,
+		0x81C, 0x88360003,
+		0x81C, 0x87380003,
+		0x81C, 0x863A0003,
+		0x81C, 0x853C0003,
+		0x81C, 0x693E0003,
+		0x81C, 0x68400003,
+		0x81C, 0x67420003,
+		0x81C, 0x66440003,
+		0x81C, 0x65460003,
+		0x81C, 0x48480003,
+		0x81C, 0x474A0003,
+		0x81C, 0x464C0003,
 		0x81C, 0x454E0003,
 		0x81C, 0x44500003,
 		0x81C, 0x43520003,
-		0x81C, 0x42540003,
-		0x81C, 0x41560003,
-		0x81C, 0x40580003,
-		0x81C, 0x055A0003,
-		0x81C, 0x045C0003,
-		0x81C, 0x035E0003,
-		0x81C, 0x02600003,
-		0x81C, 0x01620003,
-		0x81C, 0x00640003,
+		0x81C, 0x27540003,
+		0x81C, 0x26560003,
+		0x81C, 0x25580003,
+		0x81C, 0x245A0003,
+		0x81C, 0x235C0003,
+		0x81C, 0x045E0003,
+		0x81C, 0x03600003,
+		0x81C, 0x02620003,
+		0x81C, 0x01640003,
 		0x81C, 0x00660003,
 		0x81C, 0x00680003,
 		0x81C, 0x006A0003,
@@ -252,7 +429,73 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0003,
 		0x81C, 0x007C0003,
 		0x81C, 0x007E0003,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFF000003,
+		0x81C, 0xFD000003,
+		0x81C, 0xFC020003,
+		0x81C, 0xFB040003,
+		0x81C, 0xFA060003,
+		0x81C, 0xF9080003,
+		0x81C, 0xF80A0003,
+		0x81C, 0xF70C0003,
+		0x81C, 0xF60E0003,
+		0x81C, 0xF5100003,
+		0x81C, 0xF4120003,
+		0x81C, 0xF3140003,
+		0x81C, 0xF2160003,
+		0x81C, 0xF1180003,
+		0x81C, 0xF01A0003,
+		0x81C, 0xEF1C0003,
+		0x81C, 0xEE1E0003,
+		0x81C, 0xED200003,
+		0x81C, 0xEC220003,
+		0x81C, 0xEB240003,
+		0x81C, 0xEA260003,
+		0x81C, 0xE9280003,
+		0x81C, 0xE82A0003,
+		0x81C, 0xE72C0003,
+		0x81C, 0xE62E0003,
+		0x81C, 0xE5300003,
+		0x81C, 0xC8320003,
+		0x81C, 0xC7340003,
+		0x81C, 0xC6360003,
+		0x81C, 0xC5380003,
+		0x81C, 0xC43A0003,
+		0x81C, 0xC33C0003,
+		0x81C, 0xC23E0003,
+		0x81C, 0xC1400003,
+		0x81C, 0xC0420003,
+		0x81C, 0xA5440003,
+		0x81C, 0xA4460003,
+		0x81C, 0xA3480003,
+		0x81C, 0xA24A0003,
+		0x81C, 0xA14C0003,
+		0x81C, 0x834E0003,
+		0x81C, 0x82500003,
+		0x81C, 0x81520003,
+		0x81C, 0x80540003,
+		0x81C, 0x65560003,
+		0x81C, 0x64580003,
+		0x81C, 0x635A0003,
+		0x81C, 0x625C0003,
+		0x81C, 0x435E0003,
+		0x81C, 0x42600003,
+		0x81C, 0x41620003,
+		0x81C, 0x40640003,
+		0x81C, 0x06660003,
+		0x81C, 0x05680003,
+		0x81C, 0x046A0003,
+		0x81C, 0x036C0003,
+		0x81C, 0x026E0003,
+		0x81C, 0x01700003,
+		0x81C, 0x00720003,
+		0x81C, 0x00740003,
+		0x81C, 0x00760003,
+		0x81C, 0x00780003,
+		0x81C, 0x007A0003,
+		0x81C, 0x007C0003,
+		0x81C, 0x007E0003,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFF000003,
 		0x81C, 0xF5000003,
 		0x81C, 0xF4020003,
@@ -318,7 +561,7 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0003,
 		0x81C, 0x007C0003,
 		0x81C, 0x007E0003,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFF000003,
 		0x81C, 0xF5000003,
 		0x81C, 0xF4020003,
@@ -384,7 +627,7 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0003,
 		0x81C, 0x007C0003,
 		0x81C, 0x007E0003,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x90000008,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFF000003,
 		0x81C, 0xFE000003,
 		0x81C, 0xFD020003,
@@ -450,7 +693,73 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0003,
 		0x81C, 0x007C0003,
 		0x81C, 0x007E0003,
-	0x90012100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000009,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFF000003,
+		0x81C, 0xF5000003,
+		0x81C, 0xF4020003,
+		0x81C, 0xF3040003,
+		0x81C, 0xF2060003,
+		0x81C, 0xF1080003,
+		0x81C, 0xF00A0003,
+		0x81C, 0xEF0C0003,
+		0x81C, 0xEE0E0003,
+		0x81C, 0xED100003,
+		0x81C, 0xEC120003,
+		0x81C, 0xEB140003,
+		0x81C, 0xEA160003,
+		0x81C, 0xE9180003,
+		0x81C, 0xE81A0003,
+		0x81C, 0xE71C0003,
+		0x81C, 0xE61E0003,
+		0x81C, 0xE5200003,
+		0x81C, 0xE4220003,
+		0x81C, 0xE3240003,
+		0x81C, 0xE2260003,
+		0x81C, 0xE1280003,
+		0x81C, 0xE02A0003,
+		0x81C, 0xC32C0003,
+		0x81C, 0xC22E0003,
+		0x81C, 0xC1300003,
+		0x81C, 0xC0320003,
+		0x81C, 0xA4340003,
+		0x81C, 0xA3360003,
+		0x81C, 0xA2380003,
+		0x81C, 0xA13A0003,
+		0x81C, 0xA03C0003,
+		0x81C, 0x823E0003,
+		0x81C, 0x81400003,
+		0x81C, 0x80420003,
+		0x81C, 0x64440003,
+		0x81C, 0x63460003,
+		0x81C, 0x62480003,
+		0x81C, 0x614A0003,
+		0x81C, 0x604C0003,
+		0x81C, 0x454E0003,
+		0x81C, 0x44500003,
+		0x81C, 0x43520003,
+		0x81C, 0x42540003,
+		0x81C, 0x41560003,
+		0x81C, 0x40580003,
+		0x81C, 0x055A0003,
+		0x81C, 0x045C0003,
+		0x81C, 0x035E0003,
+		0x81C, 0x02600003,
+		0x81C, 0x01620003,
+		0x81C, 0x00640003,
+		0x81C, 0x00660003,
+		0x81C, 0x00680003,
+		0x81C, 0x006A0003,
+		0x81C, 0x006C0003,
+		0x81C, 0x006E0003,
+		0x81C, 0x00700003,
+		0x81C, 0x00720003,
+		0x81C, 0x00740003,
+		0x81C, 0x00760003,
+		0x81C, 0x00780003,
+		0x81C, 0x007A0003,
+		0x81C, 0x007C0003,
+		0x81C, 0x007E0003,
+	0x9000000a,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFF000003,
 		0x81C, 0xFE000003,
 		0x81C, 0xFD020003,
@@ -516,7 +825,7 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0003,
 		0x81C, 0x007C0003,
 		0x81C, 0x007E0003,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x9000000b,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFF000003,
 		0x81C, 0xF5000003,
 		0x81C, 0xF4020003,
@@ -582,7 +891,7 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0003,
 		0x81C, 0x007C0003,
 		0x81C, 0x007E0003,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+	0x9000000c,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFF000003,
 		0x81C, 0xFE000003,
 		0x81C, 0xFD020003,
@@ -648,7 +957,73 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0003,
 		0x81C, 0x007C0003,
 		0x81C, 0x007E0003,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x9000000d,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFF000003,
+		0x81C, 0xFE000003,
+		0x81C, 0xFD020003,
+		0x81C, 0xFC040003,
+		0x81C, 0xFB060003,
+		0x81C, 0xFA080003,
+		0x81C, 0xF90A0003,
+		0x81C, 0xF80C0003,
+		0x81C, 0xF70E0003,
+		0x81C, 0xF6100003,
+		0x81C, 0xF5120003,
+		0x81C, 0xF4140003,
+		0x81C, 0xF3160003,
+		0x81C, 0xF2180003,
+		0x81C, 0xF11A0003,
+		0x81C, 0xF01C0003,
+		0x81C, 0xEF1E0003,
+		0x81C, 0xEE200003,
+		0x81C, 0xED220003,
+		0x81C, 0xEC240003,
+		0x81C, 0xEB260003,
+		0x81C, 0xEA280003,
+		0x81C, 0xE92A0003,
+		0x81C, 0xE82C0003,
+		0x81C, 0xE72E0003,
+		0x81C, 0xE6300003,
+		0x81C, 0xE5320003,
+		0x81C, 0xC8340003,
+		0x81C, 0xC7360003,
+		0x81C, 0xC6380003,
+		0x81C, 0xC53A0003,
+		0x81C, 0xC43C0003,
+		0x81C, 0xC33E0003,
+		0x81C, 0xC2400003,
+		0x81C, 0xC1420003,
+		0x81C, 0xC0440003,
+		0x81C, 0xA3460003,
+		0x81C, 0xA2480003,
+		0x81C, 0xA14A0003,
+		0x81C, 0xA04C0003,
+		0x81C, 0x824E0003,
+		0x81C, 0x81500003,
+		0x81C, 0x80520003,
+		0x81C, 0x64540003,
+		0x81C, 0x63560003,
+		0x81C, 0x62580003,
+		0x81C, 0x445A0003,
+		0x81C, 0x435C0003,
+		0x81C, 0x425E0003,
+		0x81C, 0x41600003,
+		0x81C, 0x40620003,
+		0x81C, 0x05640003,
+		0x81C, 0x04660003,
+		0x81C, 0x03680003,
+		0x81C, 0x026A0003,
+		0x81C, 0x016C0003,
+		0x81C, 0x006E0003,
+		0x81C, 0x00700003,
+		0x81C, 0x00720003,
+		0x81C, 0x00740003,
+		0x81C, 0x00760003,
+		0x81C, 0x00780003,
+		0x81C, 0x007A0003,
+		0x81C, 0x007C0003,
+		0x81C, 0x007E0003,
+	0x9000000e,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFF000003,
 		0x81C, 0xFE000003,
 		0x81C, 0xFD020003,
@@ -781,7 +1156,72 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007C0003,
 		0x81C, 0x007E0003,
 	0xB0000000,	0x00000000,
-	0x8000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x80000000,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFD000103,
+		0x81C, 0xFC020103,
+		0x81C, 0xFB040103,
+		0x81C, 0xFA060103,
+		0x81C, 0xF9080103,
+		0x81C, 0xF80A0103,
+		0x81C, 0xF70C0103,
+		0x81C, 0xF60E0103,
+		0x81C, 0xF5100103,
+		0x81C, 0xF4120103,
+		0x81C, 0xF3140103,
+		0x81C, 0xF2160103,
+		0x81C, 0xF1180103,
+		0x81C, 0xF01A0103,
+		0x81C, 0xEE1C0103,
+		0x81C, 0xED1E0103,
+		0x81C, 0xEC200103,
+		0x81C, 0xEB220103,
+		0x81C, 0xEA240103,
+		0x81C, 0xE9260103,
+		0x81C, 0xE8280103,
+		0x81C, 0xE72A0103,
+		0x81C, 0xE62C0103,
+		0x81C, 0xE52E0103,
+		0x81C, 0xE4300103,
+		0x81C, 0xE3320103,
+		0x81C, 0xE2340103,
+		0x81C, 0xC5360103,
+		0x81C, 0xC4380103,
+		0x81C, 0xC33A0103,
+		0x81C, 0xC23C0103,
+		0x81C, 0xA53E0103,
+		0x81C, 0xA4400103,
+		0x81C, 0xA3420103,
+		0x81C, 0xA2440103,
+		0x81C, 0xA1460103,
+		0x81C, 0x83480103,
+		0x81C, 0x824A0103,
+		0x81C, 0x814C0103,
+		0x81C, 0x804E0103,
+		0x81C, 0x63500103,
+		0x81C, 0x62520103,
+		0x81C, 0x61540103,
+		0x81C, 0x43560103,
+		0x81C, 0x42580103,
+		0x81C, 0x415A0103,
+		0x81C, 0x405C0103,
+		0x81C, 0x225E0103,
+		0x81C, 0x21600103,
+		0x81C, 0x20620103,
+		0x81C, 0x03640103,
+		0x81C, 0x02660103,
+		0x81C, 0x01680103,
+		0x81C, 0x006A0103,
+		0x81C, 0x006C0103,
+		0x81C, 0x006E0103,
+		0x81C, 0x00700103,
+		0x81C, 0x00720103,
+		0x81C, 0x00740103,
+		0x81C, 0x00760103,
+		0x81C, 0x00780103,
+		0x81C, 0x007A0103,
+		0x81C, 0x007C0103,
+		0x81C, 0x007E0103,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xF8000103,
 		0x81C, 0xF7020103,
 		0x81C, 0xF6040103,
@@ -804,10 +1244,10 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0xE5260103,
 		0x81C, 0xE4280103,
 		0x81C, 0xE32A0103,
-		0x81C, 0xE22C0103,
-		0x81C, 0xC32E0103,
-		0x81C, 0xC2300103,
-		0x81C, 0xC1320103,
+		0x81C, 0xC32C0103,
+		0x81C, 0xC22E0103,
+		0x81C, 0xC1300103,
+		0x81C, 0xC0320103,
 		0x81C, 0xA3340103,
 		0x81C, 0xA2360103,
 		0x81C, 0xA1380103,
@@ -815,71 +1255,6 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x823C0103,
 		0x81C, 0x813E0103,
 		0x81C, 0x80400103,
-		0x81C, 0x64420103,
-		0x81C, 0x63440103,
-		0x81C, 0x62460103,
-		0x81C, 0x61480103,
-		0x81C, 0x434A0103,
-		0x81C, 0x424C0103,
-		0x81C, 0x414E0103,
-		0x81C, 0x40500103,
-		0x81C, 0x22520103,
-		0x81C, 0x21540103,
-		0x81C, 0x20560103,
-		0x81C, 0x04580103,
-		0x81C, 0x035A0103,
-		0x81C, 0x025C0103,
-		0x81C, 0x015E0103,
-		0x81C, 0x00600103,
-		0x81C, 0x00620103,
-		0x81C, 0x00640103,
-		0x81C, 0x00660103,
-		0x81C, 0x00680103,
-		0x81C, 0x006A0103,
-		0x81C, 0x006C0103,
-		0x81C, 0x006E0103,
-		0x81C, 0x00700103,
-		0x81C, 0x00720103,
-		0x81C, 0x00740103,
-		0x81C, 0x00760103,
-		0x81C, 0x00780103,
-		0x81C, 0x007A0103,
-		0x81C, 0x007C0103,
-		0x81C, 0x007E0103,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
-		0x81C, 0xFA000103,
-		0x81C, 0xF9020103,
-		0x81C, 0xF8040103,
-		0x81C, 0xF7060103,
-		0x81C, 0xF6080103,
-		0x81C, 0xF50A0103,
-		0x81C, 0xF40C0103,
-		0x81C, 0xF30E0103,
-		0x81C, 0xF2100103,
-		0x81C, 0xF1120103,
-		0x81C, 0xF0140103,
-		0x81C, 0xEF160103,
-		0x81C, 0xEE180103,
-		0x81C, 0xED1A0103,
-		0x81C, 0xEC1C0103,
-		0x81C, 0xEB1E0103,
-		0x81C, 0xEA200103,
-		0x81C, 0xE9220103,
-		0x81C, 0xE8240103,
-		0x81C, 0xE7260103,
-		0x81C, 0xE6280103,
-		0x81C, 0xE52A0103,
-		0x81C, 0xC42C0103,
-		0x81C, 0xC32E0103,
-		0x81C, 0xC2300103,
-		0x81C, 0xC1320103,
-		0x81C, 0xA4340103,
-		0x81C, 0xA3360103,
-		0x81C, 0xA2380103,
-		0x81C, 0xA13A0103,
-		0x81C, 0x833C0103,
-		0x81C, 0x823E0103,
-		0x81C, 0x81400103,
 		0x81C, 0x63420103,
 		0x81C, 0x62440103,
 		0x81C, 0x61460103,
@@ -887,9 +1262,9 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x424A0103,
 		0x81C, 0x414C0103,
 		0x81C, 0x404E0103,
-		0x81C, 0x22500103,
-		0x81C, 0x21520103,
-		0x81C, 0x20540103,
+		0x81C, 0x06500103,
+		0x81C, 0x05520103,
+		0x81C, 0x04540103,
 		0x81C, 0x03560103,
 		0x81C, 0x02580103,
 		0x81C, 0x015A0103,
@@ -911,7 +1286,7 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0103,
 		0x81C, 0x007C0103,
 		0x81C, 0x007E0103,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xF8000103,
 		0x81C, 0xF7020103,
 		0x81C, 0xF6040103,
@@ -976,7 +1351,72 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0103,
 		0x81C, 0x007C0103,
 		0x81C, 0x007E0103,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFE000103,
+		0x81C, 0xFD020103,
+		0x81C, 0xFC040103,
+		0x81C, 0xFB060103,
+		0x81C, 0xFA080103,
+		0x81C, 0xF90A0103,
+		0x81C, 0xF80C0103,
+		0x81C, 0xF70E0103,
+		0x81C, 0xF6100103,
+		0x81C, 0xF5120103,
+		0x81C, 0xF4140103,
+		0x81C, 0xF3160103,
+		0x81C, 0xF2180103,
+		0x81C, 0xF11A0103,
+		0x81C, 0xF01C0103,
+		0x81C, 0xEF1E0103,
+		0x81C, 0xEE200103,
+		0x81C, 0xED220103,
+		0x81C, 0xEC240103,
+		0x81C, 0xEB260103,
+		0x81C, 0xEA280103,
+		0x81C, 0xE92A0103,
+		0x81C, 0xE82C0103,
+		0x81C, 0xE72E0103,
+		0x81C, 0xE6300103,
+		0x81C, 0xE5320103,
+		0x81C, 0xE4340103,
+		0x81C, 0xE3360103,
+		0x81C, 0xC6380103,
+		0x81C, 0xC53A0103,
+		0x81C, 0xC43C0103,
+		0x81C, 0xC33E0103,
+		0x81C, 0xA5400103,
+		0x81C, 0xA4420103,
+		0x81C, 0xA3440103,
+		0x81C, 0xA2460103,
+		0x81C, 0xA1480103,
+		0x81C, 0xA04A0103,
+		0x81C, 0x824C0103,
+		0x81C, 0x814E0103,
+		0x81C, 0x80500103,
+		0x81C, 0x64520103,
+		0x81C, 0x63540103,
+		0x81C, 0x62560103,
+		0x81C, 0x61580103,
+		0x81C, 0x605A0103,
+		0x81C, 0x235C0103,
+		0x81C, 0x225E0103,
+		0x81C, 0x21600103,
+		0x81C, 0x20620103,
+		0x81C, 0x03640103,
+		0x81C, 0x02660103,
+		0x81C, 0x01680103,
+		0x81C, 0x006A0103,
+		0x81C, 0x006C0103,
+		0x81C, 0x006E0103,
+		0x81C, 0x00700103,
+		0x81C, 0x00720103,
+		0x81C, 0x00740103,
+		0x81C, 0x00760103,
+		0x81C, 0x00780103,
+		0x81C, 0x007A0103,
+		0x81C, 0x007C0103,
+		0x81C, 0x007E0103,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xF8000103,
 		0x81C, 0xF7020103,
 		0x81C, 0xF6040103,
@@ -1041,7 +1481,137 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0103,
 		0x81C, 0x007C0103,
 		0x81C, 0x007E0103,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFD000103,
+		0x81C, 0xFC020103,
+		0x81C, 0xFB040103,
+		0x81C, 0xFA060103,
+		0x81C, 0xF9080103,
+		0x81C, 0xF80A0103,
+		0x81C, 0xF70C0103,
+		0x81C, 0xF60E0103,
+		0x81C, 0xF5100103,
+		0x81C, 0xF4120103,
+		0x81C, 0xF3140103,
+		0x81C, 0xF2160103,
+		0x81C, 0xF1180103,
+		0x81C, 0xF01A0103,
+		0x81C, 0xEF1C0103,
+		0x81C, 0xEE1E0103,
+		0x81C, 0xED200103,
+		0x81C, 0xEC220103,
+		0x81C, 0xEB240103,
+		0x81C, 0xEA260103,
+		0x81C, 0xE9280103,
+		0x81C, 0xE82A0103,
+		0x81C, 0xE72C0103,
+		0x81C, 0xE62E0103,
+		0x81C, 0xE5300103,
+		0x81C, 0xE4320103,
+		0x81C, 0xE3340103,
+		0x81C, 0xE2360103,
+		0x81C, 0xC5380103,
+		0x81C, 0xC43A0103,
+		0x81C, 0xC33C0103,
+		0x81C, 0xC23E0103,
+		0x81C, 0xA5400103,
+		0x81C, 0xA4420103,
+		0x81C, 0xA3440103,
+		0x81C, 0xA2460103,
+		0x81C, 0xA1480103,
+		0x81C, 0x834A0103,
+		0x81C, 0x824C0103,
+		0x81C, 0x814E0103,
+		0x81C, 0x64500103,
+		0x81C, 0x63520103,
+		0x81C, 0x62540103,
+		0x81C, 0x61560103,
+		0x81C, 0x42580103,
+		0x81C, 0x415A0103,
+		0x81C, 0x405C0103,
+		0x81C, 0x065E0103,
+		0x81C, 0x05600103,
+		0x81C, 0x04620103,
+		0x81C, 0x03640103,
+		0x81C, 0x02660103,
+		0x81C, 0x01680103,
+		0x81C, 0x006A0103,
+		0x81C, 0x006C0103,
+		0x81C, 0x006E0103,
+		0x81C, 0x00700103,
+		0x81C, 0x00720103,
+		0x81C, 0x00740103,
+		0x81C, 0x00760103,
+		0x81C, 0x00780103,
+		0x81C, 0x007A0103,
+		0x81C, 0x007C0103,
+		0x81C, 0x007E0103,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFA000103,
+		0x81C, 0xF9020103,
+		0x81C, 0xF8040103,
+		0x81C, 0xF7060103,
+		0x81C, 0xF6080103,
+		0x81C, 0xF50A0103,
+		0x81C, 0xF40C0103,
+		0x81C, 0xF30E0103,
+		0x81C, 0xF2100103,
+		0x81C, 0xF1120103,
+		0x81C, 0xF0140103,
+		0x81C, 0xEF160103,
+		0x81C, 0xEE180103,
+		0x81C, 0xED1A0103,
+		0x81C, 0xEC1C0103,
+		0x81C, 0xEB1E0103,
+		0x81C, 0xEA200103,
+		0x81C, 0xE9220103,
+		0x81C, 0xE8240103,
+		0x81C, 0xE7260103,
+		0x81C, 0xE6280103,
+		0x81C, 0xE52A0103,
+		0x81C, 0xC42C0103,
+		0x81C, 0xC32E0103,
+		0x81C, 0xC2300103,
+		0x81C, 0xC1320103,
+		0x81C, 0xA4340103,
+		0x81C, 0xA3360103,
+		0x81C, 0xA2380103,
+		0x81C, 0xA13A0103,
+		0x81C, 0x833C0103,
+		0x81C, 0x823E0103,
+		0x81C, 0x81400103,
+		0x81C, 0x63420103,
+		0x81C, 0x62440103,
+		0x81C, 0x61460103,
+		0x81C, 0x60480103,
+		0x81C, 0x424A0103,
+		0x81C, 0x414C0103,
+		0x81C, 0x404E0103,
+		0x81C, 0x22500103,
+		0x81C, 0x21520103,
+		0x81C, 0x20540103,
+		0x81C, 0x03560103,
+		0x81C, 0x02580103,
+		0x81C, 0x015A0103,
+		0x81C, 0x005C0103,
+		0x81C, 0x005E0103,
+		0x81C, 0x00600103,
+		0x81C, 0x00620103,
+		0x81C, 0x00640103,
+		0x81C, 0x00660103,
+		0x81C, 0x00680103,
+		0x81C, 0x006A0103,
+		0x81C, 0x006C0103,
+		0x81C, 0x006E0103,
+		0x81C, 0x00700103,
+		0x81C, 0x00720103,
+		0x81C, 0x00740103,
+		0x81C, 0x00760103,
+		0x81C, 0x00780103,
+		0x81C, 0x007A0103,
+		0x81C, 0x007C0103,
+		0x81C, 0x007E0103,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xF8000103,
 		0x81C, 0xF7020103,
 		0x81C, 0xF6040103,
@@ -1064,10 +1634,10 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0xE5260103,
 		0x81C, 0xE4280103,
 		0x81C, 0xE32A0103,
-		0x81C, 0xC32C0103,
-		0x81C, 0xC22E0103,
-		0x81C, 0xC1300103,
-		0x81C, 0xC0320103,
+		0x81C, 0xE22C0103,
+		0x81C, 0xC32E0103,
+		0x81C, 0xC2300103,
+		0x81C, 0xC1320103,
 		0x81C, 0xA3340103,
 		0x81C, 0xA2360103,
 		0x81C, 0xA1380103,
@@ -1075,21 +1645,21 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x823C0103,
 		0x81C, 0x813E0103,
 		0x81C, 0x80400103,
-		0x81C, 0x63420103,
-		0x81C, 0x62440103,
-		0x81C, 0x61460103,
-		0x81C, 0x60480103,
-		0x81C, 0x424A0103,
-		0x81C, 0x414C0103,
-		0x81C, 0x404E0103,
-		0x81C, 0x22500103,
-		0x81C, 0x21520103,
-		0x81C, 0x20540103,
-		0x81C, 0x03560103,
-		0x81C, 0x02580103,
-		0x81C, 0x015A0103,
-		0x81C, 0x005C0103,
-		0x81C, 0x005E0103,
+		0x81C, 0x64420103,
+		0x81C, 0x63440103,
+		0x81C, 0x62460103,
+		0x81C, 0x61480103,
+		0x81C, 0x434A0103,
+		0x81C, 0x424C0103,
+		0x81C, 0x414E0103,
+		0x81C, 0x40500103,
+		0x81C, 0x22520103,
+		0x81C, 0x21540103,
+		0x81C, 0x20560103,
+		0x81C, 0x04580103,
+		0x81C, 0x035A0103,
+		0x81C, 0x025C0103,
+		0x81C, 0x015E0103,
 		0x81C, 0x00600103,
 		0x81C, 0x00620103,
 		0x81C, 0x00640103,
@@ -1106,7 +1676,7 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0103,
 		0x81C, 0x007C0103,
 		0x81C, 0x007E0103,
-	0x90012100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000008,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFD000103,
 		0x81C, 0xFC020103,
 		0x81C, 0xFB040103,
@@ -1171,7 +1741,7 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0103,
 		0x81C, 0x007C0103,
 		0x81C, 0x007E0103,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x90000009,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xF8000103,
 		0x81C, 0xF7020103,
 		0x81C, 0xF6040103,
@@ -1236,7 +1806,7 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0103,
 		0x81C, 0x007C0103,
 		0x81C, 0x007E0103,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+	0x9000000a,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFD000103,
 		0x81C, 0xFC020103,
 		0x81C, 0xFB040103,
@@ -1251,42 +1821,42 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0xF2160103,
 		0x81C, 0xF1180103,
 		0x81C, 0xF01A0103,
-		0x81C, 0xEF1C0103,
-		0x81C, 0xEE1E0103,
-		0x81C, 0xED200103,
-		0x81C, 0xEC220103,
-		0x81C, 0xEB240103,
-		0x81C, 0xEA260103,
-		0x81C, 0xE9280103,
-		0x81C, 0xE82A0103,
-		0x81C, 0xE72C0103,
-		0x81C, 0xE62E0103,
-		0x81C, 0xE5300103,
-		0x81C, 0xE4320103,
-		0x81C, 0xE3340103,
-		0x81C, 0xE2360103,
-		0x81C, 0xC5380103,
-		0x81C, 0xC43A0103,
-		0x81C, 0xC33C0103,
-		0x81C, 0xC23E0103,
-		0x81C, 0xA5400103,
-		0x81C, 0xA4420103,
-		0x81C, 0xA3440103,
-		0x81C, 0xA2460103,
-		0x81C, 0xA1480103,
-		0x81C, 0x834A0103,
-		0x81C, 0x824C0103,
-		0x81C, 0x814E0103,
-		0x81C, 0x64500103,
-		0x81C, 0x63520103,
-		0x81C, 0x62540103,
-		0x81C, 0x61560103,
+		0x81C, 0xEE1C0103,
+		0x81C, 0xED1E0103,
+		0x81C, 0xEC200103,
+		0x81C, 0xEB220103,
+		0x81C, 0xEA240103,
+		0x81C, 0xE9260103,
+		0x81C, 0xE8280103,
+		0x81C, 0xE72A0103,
+		0x81C, 0xE62C0103,
+		0x81C, 0xE52E0103,
+		0x81C, 0xE4300103,
+		0x81C, 0xE3320103,
+		0x81C, 0xE2340103,
+		0x81C, 0xC5360103,
+		0x81C, 0xC4380103,
+		0x81C, 0xC33A0103,
+		0x81C, 0xC23C0103,
+		0x81C, 0xA53E0103,
+		0x81C, 0xA4400103,
+		0x81C, 0xA3420103,
+		0x81C, 0xA2440103,
+		0x81C, 0xA1460103,
+		0x81C, 0x83480103,
+		0x81C, 0x824A0103,
+		0x81C, 0x814C0103,
+		0x81C, 0x804E0103,
+		0x81C, 0x63500103,
+		0x81C, 0x62520103,
+		0x81C, 0x61540103,
+		0x81C, 0x43560103,
 		0x81C, 0x42580103,
 		0x81C, 0x415A0103,
 		0x81C, 0x405C0103,
-		0x81C, 0x065E0103,
-		0x81C, 0x05600103,
-		0x81C, 0x04620103,
+		0x81C, 0x225E0103,
+		0x81C, 0x21600103,
+		0x81C, 0x20620103,
 		0x81C, 0x03640103,
 		0x81C, 0x02660103,
 		0x81C, 0x01680103,
@@ -1301,54 +1871,249 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0103,
 		0x81C, 0x007C0103,
 		0x81C, 0x007E0103,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
-		0x81C, 0xFE000103,
-		0x81C, 0xFD020103,
-		0x81C, 0xFC040103,
-		0x81C, 0xFB060103,
-		0x81C, 0xFA080103,
-		0x81C, 0xF90A0103,
-		0x81C, 0xF80C0103,
-		0x81C, 0xF70E0103,
-		0x81C, 0xF6100103,
-		0x81C, 0xF5120103,
-		0x81C, 0xF4140103,
-		0x81C, 0xF3160103,
-		0x81C, 0xF2180103,
-		0x81C, 0xF11A0103,
-		0x81C, 0xF01C0103,
-		0x81C, 0xEF1E0103,
-		0x81C, 0xEE200103,
-		0x81C, 0xED220103,
-		0x81C, 0xEC240103,
-		0x81C, 0xEB260103,
-		0x81C, 0xEA280103,
-		0x81C, 0xE92A0103,
-		0x81C, 0xE82C0103,
-		0x81C, 0xE72E0103,
-		0x81C, 0xE6300103,
-		0x81C, 0xE5320103,
-		0x81C, 0xE4340103,
-		0x81C, 0xE3360103,
-		0x81C, 0xC6380103,
-		0x81C, 0xC53A0103,
-		0x81C, 0xC43C0103,
-		0x81C, 0xC33E0103,
-		0x81C, 0xA5400103,
-		0x81C, 0xA4420103,
-		0x81C, 0xA3440103,
-		0x81C, 0xA2460103,
-		0x81C, 0xA1480103,
-		0x81C, 0xA04A0103,
-		0x81C, 0x824C0103,
-		0x81C, 0x814E0103,
-		0x81C, 0x80500103,
-		0x81C, 0x64520103,
-		0x81C, 0x63540103,
-		0x81C, 0x62560103,
-		0x81C, 0x61580103,
-		0x81C, 0x605A0103,
-		0x81C, 0x235C0103,
+	0x9000000b,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xF9000103,
+		0x81C, 0xF8020103,
+		0x81C, 0xF7040103,
+		0x81C, 0xF6060103,
+		0x81C, 0xF5080103,
+		0x81C, 0xF40A0103,
+		0x81C, 0xF30C0103,
+		0x81C, 0xF20E0103,
+		0x81C, 0xF1100103,
+		0x81C, 0xF0120103,
+		0x81C, 0xEF140103,
+		0x81C, 0xEE160103,
+		0x81C, 0xED180103,
+		0x81C, 0xEC1A0103,
+		0x81C, 0xEB1C0103,
+		0x81C, 0xEA1E0103,
+		0x81C, 0xE9200103,
+		0x81C, 0xE8220103,
+		0x81C, 0xE7240103,
+		0x81C, 0xE6260103,
+		0x81C, 0xE5280103,
+		0x81C, 0xE42A0103,
+		0x81C, 0xE32C0103,
+		0x81C, 0xC32E0103,
+		0x81C, 0xC2300103,
+		0x81C, 0xC1320103,
+		0x81C, 0xA4340103,
+		0x81C, 0xA3360103,
+		0x81C, 0xA2380103,
+		0x81C, 0xA13A0103,
+		0x81C, 0xA03C0103,
+		0x81C, 0x823E0103,
+		0x81C, 0x81400103,
+		0x81C, 0x80420103,
+		0x81C, 0x63440103,
+		0x81C, 0x62460103,
+		0x81C, 0x61480103,
+		0x81C, 0x604A0103,
+		0x81C, 0x244C0103,
+		0x81C, 0x234E0103,
+		0x81C, 0x22500103,
+		0x81C, 0x21520103,
+		0x81C, 0x20540103,
+		0x81C, 0x05560103,
+		0x81C, 0x04580103,
+		0x81C, 0x035A0103,
+		0x81C, 0x025C0103,
+		0x81C, 0x015E0103,
+		0x81C, 0x00600103,
+		0x81C, 0x00620103,
+		0x81C, 0x00640103,
+		0x81C, 0x00660103,
+		0x81C, 0x00680103,
+		0x81C, 0x006A0103,
+		0x81C, 0x006C0103,
+		0x81C, 0x006E0103,
+		0x81C, 0x00700103,
+		0x81C, 0x00720103,
+		0x81C, 0x00740103,
+		0x81C, 0x00760103,
+		0x81C, 0x00780103,
+		0x81C, 0x007A0103,
+		0x81C, 0x007C0103,
+		0x81C, 0x007E0103,
+	0x9000000c,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFD000103,
+		0x81C, 0xFC020103,
+		0x81C, 0xFB040103,
+		0x81C, 0xFA060103,
+		0x81C, 0xF9080103,
+		0x81C, 0xF80A0103,
+		0x81C, 0xF70C0103,
+		0x81C, 0xF60E0103,
+		0x81C, 0xF5100103,
+		0x81C, 0xF4120103,
+		0x81C, 0xF3140103,
+		0x81C, 0xF2160103,
+		0x81C, 0xF1180103,
+		0x81C, 0xF01A0103,
+		0x81C, 0xEE1C0103,
+		0x81C, 0xED1E0103,
+		0x81C, 0xEC200103,
+		0x81C, 0xEB220103,
+		0x81C, 0xEA240103,
+		0x81C, 0xE9260103,
+		0x81C, 0xE8280103,
+		0x81C, 0xE72A0103,
+		0x81C, 0xE62C0103,
+		0x81C, 0xE52E0103,
+		0x81C, 0xE4300103,
+		0x81C, 0xE3320103,
+		0x81C, 0xE2340103,
+		0x81C, 0xC5360103,
+		0x81C, 0xC4380103,
+		0x81C, 0xC33A0103,
+		0x81C, 0xC23C0103,
+		0x81C, 0xA53E0103,
+		0x81C, 0xA4400103,
+		0x81C, 0xA3420103,
+		0x81C, 0xA2440103,
+		0x81C, 0xA1460103,
+		0x81C, 0x83480103,
+		0x81C, 0x824A0103,
+		0x81C, 0x814C0103,
+		0x81C, 0x804E0103,
+		0x81C, 0x63500103,
+		0x81C, 0x62520103,
+		0x81C, 0x61540103,
+		0x81C, 0x43560103,
+		0x81C, 0x42580103,
+		0x81C, 0x415A0103,
+		0x81C, 0x405C0103,
+		0x81C, 0x225E0103,
+		0x81C, 0x21600103,
+		0x81C, 0x20620103,
+		0x81C, 0x03640103,
+		0x81C, 0x02660103,
+		0x81C, 0x01680103,
+		0x81C, 0x006A0103,
+		0x81C, 0x006C0103,
+		0x81C, 0x006E0103,
+		0x81C, 0x00700103,
+		0x81C, 0x00720103,
+		0x81C, 0x00740103,
+		0x81C, 0x00760103,
+		0x81C, 0x00780103,
+		0x81C, 0x007A0103,
+		0x81C, 0x007C0103,
+		0x81C, 0x007E0103,
+	0x9000000d,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFD000103,
+		0x81C, 0xFC020103,
+		0x81C, 0xFB040103,
+		0x81C, 0xFA060103,
+		0x81C, 0xF9080103,
+		0x81C, 0xF80A0103,
+		0x81C, 0xF70C0103,
+		0x81C, 0xF60E0103,
+		0x81C, 0xF5100103,
+		0x81C, 0xF4120103,
+		0x81C, 0xF3140103,
+		0x81C, 0xF2160103,
+		0x81C, 0xF1180103,
+		0x81C, 0xF01A0103,
+		0x81C, 0xEE1C0103,
+		0x81C, 0xED1E0103,
+		0x81C, 0xEC200103,
+		0x81C, 0xEB220103,
+		0x81C, 0xEA240103,
+		0x81C, 0xE9260103,
+		0x81C, 0xE8280103,
+		0x81C, 0xE72A0103,
+		0x81C, 0xE62C0103,
+		0x81C, 0xE52E0103,
+		0x81C, 0xE4300103,
+		0x81C, 0xE3320103,
+		0x81C, 0xE2340103,
+		0x81C, 0xC5360103,
+		0x81C, 0xC4380103,
+		0x81C, 0xC33A0103,
+		0x81C, 0xC23C0103,
+		0x81C, 0xA53E0103,
+		0x81C, 0xA4400103,
+		0x81C, 0xA3420103,
+		0x81C, 0xA2440103,
+		0x81C, 0xA1460103,
+		0x81C, 0x83480103,
+		0x81C, 0x824A0103,
+		0x81C, 0x814C0103,
+		0x81C, 0x804E0103,
+		0x81C, 0x63500103,
+		0x81C, 0x62520103,
+		0x81C, 0x61540103,
+		0x81C, 0x43560103,
+		0x81C, 0x42580103,
+		0x81C, 0x415A0103,
+		0x81C, 0x405C0103,
+		0x81C, 0x225E0103,
+		0x81C, 0x21600103,
+		0x81C, 0x20620103,
+		0x81C, 0x03640103,
+		0x81C, 0x02660103,
+		0x81C, 0x01680103,
+		0x81C, 0x006A0103,
+		0x81C, 0x006C0103,
+		0x81C, 0x006E0103,
+		0x81C, 0x00700103,
+		0x81C, 0x00720103,
+		0x81C, 0x00740103,
+		0x81C, 0x00760103,
+		0x81C, 0x00780103,
+		0x81C, 0x007A0103,
+		0x81C, 0x007C0103,
+		0x81C, 0x007E0103,
+	0x9000000e,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFD000103,
+		0x81C, 0xFC020103,
+		0x81C, 0xFB040103,
+		0x81C, 0xFA060103,
+		0x81C, 0xF9080103,
+		0x81C, 0xF80A0103,
+		0x81C, 0xF70C0103,
+		0x81C, 0xF60E0103,
+		0x81C, 0xF5100103,
+		0x81C, 0xF4120103,
+		0x81C, 0xF3140103,
+		0x81C, 0xF2160103,
+		0x81C, 0xF1180103,
+		0x81C, 0xF01A0103,
+		0x81C, 0xEE1C0103,
+		0x81C, 0xED1E0103,
+		0x81C, 0xEC200103,
+		0x81C, 0xEB220103,
+		0x81C, 0xEA240103,
+		0x81C, 0xE9260103,
+		0x81C, 0xE8280103,
+		0x81C, 0xE72A0103,
+		0x81C, 0xE62C0103,
+		0x81C, 0xE52E0103,
+		0x81C, 0xE4300103,
+		0x81C, 0xE3320103,
+		0x81C, 0xE2340103,
+		0x81C, 0xC5360103,
+		0x81C, 0xC4380103,
+		0x81C, 0xC33A0103,
+		0x81C, 0xC23C0103,
+		0x81C, 0xA53E0103,
+		0x81C, 0xA4400103,
+		0x81C, 0xA3420103,
+		0x81C, 0xA2440103,
+		0x81C, 0xA1460103,
+		0x81C, 0x83480103,
+		0x81C, 0x824A0103,
+		0x81C, 0x814C0103,
+		0x81C, 0x804E0103,
+		0x81C, 0x63500103,
+		0x81C, 0x62520103,
+		0x81C, 0x61540103,
+		0x81C, 0x43560103,
+		0x81C, 0x42580103,
+		0x81C, 0x415A0103,
+		0x81C, 0x405C0103,
 		0x81C, 0x225E0103,
 		0x81C, 0x21600103,
 		0x81C, 0x20620103,
@@ -1432,60 +2197,60 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007C0103,
 		0x81C, 0x007E0103,
 	0xB0000000,	0x00000000,
-	0x8000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x81C, 0xF8000203,
-		0x81C, 0xF7020203,
-		0x81C, 0xF6040203,
-		0x81C, 0xF5060203,
-		0x81C, 0xF4080203,
-		0x81C, 0xF30A0203,
-		0x81C, 0xF20C0203,
-		0x81C, 0xF10E0203,
-		0x81C, 0xF0100203,
-		0x81C, 0xEF120203,
-		0x81C, 0xEE140203,
-		0x81C, 0xED160203,
-		0x81C, 0xEC180203,
-		0x81C, 0xEB1A0203,
-		0x81C, 0xEA1C0203,
-		0x81C, 0xE91E0203,
-		0x81C, 0xE8200203,
-		0x81C, 0xE7220203,
-		0x81C, 0xE6240203,
-		0x81C, 0xE5260203,
-		0x81C, 0xE4280203,
-		0x81C, 0xE32A0203,
-		0x81C, 0xC42C0203,
-		0x81C, 0xC32E0203,
-		0x81C, 0xC2300203,
-		0x81C, 0xC1320203,
-		0x81C, 0xA3340203,
-		0x81C, 0xA2360203,
-		0x81C, 0xA1380203,
-		0x81C, 0xA03A0203,
-		0x81C, 0x823C0203,
-		0x81C, 0x813E0203,
-		0x81C, 0x80400203,
-		0x81C, 0x65420203,
-		0x81C, 0x64440203,
-		0x81C, 0x63460203,
-		0x81C, 0x62480203,
-		0x81C, 0x614A0203,
-		0x81C, 0x424C0203,
-		0x81C, 0x414E0203,
-		0x81C, 0x40500203,
-		0x81C, 0x22520203,
-		0x81C, 0x21540203,
-		0x81C, 0x20560203,
-		0x81C, 0x04580203,
-		0x81C, 0x035A0203,
-		0x81C, 0x025C0203,
-		0x81C, 0x015E0203,
-		0x81C, 0x00600203,
-		0x81C, 0x00620203,
-		0x81C, 0x00640203,
-		0x81C, 0x00660203,
-		0x81C, 0x00680203,
+	0x80000000,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFC000203,
+		0x81C, 0xFB020203,
+		0x81C, 0xFA040203,
+		0x81C, 0xF9060203,
+		0x81C, 0xF8080203,
+		0x81C, 0xF70A0203,
+		0x81C, 0xF60C0203,
+		0x81C, 0xF50E0203,
+		0x81C, 0xF4100203,
+		0x81C, 0xF3120203,
+		0x81C, 0xF2140203,
+		0x81C, 0xF1160203,
+		0x81C, 0xF0180203,
+		0x81C, 0xEE1A0203,
+		0x81C, 0xED1C0203,
+		0x81C, 0xEC1E0203,
+		0x81C, 0xEB200203,
+		0x81C, 0xEA220203,
+		0x81C, 0xE9240203,
+		0x81C, 0xE8260203,
+		0x81C, 0xE7280203,
+		0x81C, 0xE62A0203,
+		0x81C, 0xE52C0203,
+		0x81C, 0xE42E0203,
+		0x81C, 0xE3300203,
+		0x81C, 0xE2320203,
+		0x81C, 0xC6340203,
+		0x81C, 0xC5360203,
+		0x81C, 0xC4380203,
+		0x81C, 0xC33A0203,
+		0x81C, 0xA63C0203,
+		0x81C, 0xA53E0203,
+		0x81C, 0xA4400203,
+		0x81C, 0xA3420203,
+		0x81C, 0xA2440203,
+		0x81C, 0xA1460203,
+		0x81C, 0x83480203,
+		0x81C, 0x824A0203,
+		0x81C, 0x814C0203,
+		0x81C, 0x804E0203,
+		0x81C, 0x63500203,
+		0x81C, 0x62520203,
+		0x81C, 0x61540203,
+		0x81C, 0x42560203,
+		0x81C, 0x41580203,
+		0x81C, 0x405A0203,
+		0x81C, 0x225C0203,
+		0x81C, 0x215E0203,
+		0x81C, 0x20600203,
+		0x81C, 0x04620203,
+		0x81C, 0x03640203,
+		0x81C, 0x02660203,
+		0x81C, 0x01680203,
 		0x81C, 0x006A0203,
 		0x81C, 0x006C0203,
 		0x81C, 0x006E0203,
@@ -1497,28 +2262,28 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0203,
 		0x81C, 0x007C0203,
 		0x81C, 0x007E0203,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
-		0x81C, 0xF9000203,
-		0x81C, 0xF8020203,
-		0x81C, 0xF7040203,
-		0x81C, 0xF6060203,
-		0x81C, 0xF5080203,
-		0x81C, 0xF40A0203,
-		0x81C, 0xF30C0203,
-		0x81C, 0xF20E0203,
-		0x81C, 0xF1100203,
-		0x81C, 0xF0120203,
-		0x81C, 0xEF140203,
-		0x81C, 0xEE160203,
-		0x81C, 0xED180203,
-		0x81C, 0xEC1A0203,
-		0x81C, 0xEB1C0203,
-		0x81C, 0xEA1E0203,
-		0x81C, 0xE9200203,
-		0x81C, 0xE8220203,
-		0x81C, 0xE7240203,
-		0x81C, 0xE6260203,
-		0x81C, 0xE5280203,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xF7000203,
+		0x81C, 0xF6020203,
+		0x81C, 0xF5040203,
+		0x81C, 0xF4060203,
+		0x81C, 0xF3080203,
+		0x81C, 0xF20A0203,
+		0x81C, 0xF10C0203,
+		0x81C, 0xF00E0203,
+		0x81C, 0xEF100203,
+		0x81C, 0xEE120203,
+		0x81C, 0xED140203,
+		0x81C, 0xEC160203,
+		0x81C, 0xEB180203,
+		0x81C, 0xEA1A0203,
+		0x81C, 0xE91C0203,
+		0x81C, 0xE81E0203,
+		0x81C, 0xE7200203,
+		0x81C, 0xE6220203,
+		0x81C, 0xE5240203,
+		0x81C, 0xE4260203,
+		0x81C, 0xE3280203,
 		0x81C, 0xC42A0203,
 		0x81C, 0xC32C0203,
 		0x81C, 0xC22E0203,
@@ -1531,16 +2296,16 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x823C0203,
 		0x81C, 0x813E0203,
 		0x81C, 0x80400203,
-		0x81C, 0x64420203,
-		0x81C, 0x63440203,
-		0x81C, 0x62460203,
-		0x81C, 0x61480203,
-		0x81C, 0x604A0203,
+		0x81C, 0x63420203,
+		0x81C, 0x62440203,
+		0x81C, 0x61460203,
+		0x81C, 0x60480203,
+		0x81C, 0x424A0203,
 		0x81C, 0x414C0203,
 		0x81C, 0x404E0203,
-		0x81C, 0x22500203,
-		0x81C, 0x21520203,
-		0x81C, 0x20540203,
+		0x81C, 0x06500203,
+		0x81C, 0x05520203,
+		0x81C, 0x04540203,
 		0x81C, 0x03560203,
 		0x81C, 0x02580203,
 		0x81C, 0x015A0203,
@@ -1562,7 +2327,7 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0203,
 		0x81C, 0x007C0203,
 		0x81C, 0x007E0203,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xF7000203,
 		0x81C, 0xF6020203,
 		0x81C, 0xF5040203,
@@ -1596,11 +2361,11 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x823C0203,
 		0x81C, 0x813E0203,
 		0x81C, 0x80400203,
-		0x81C, 0x63420203,
-		0x81C, 0x62440203,
-		0x81C, 0x61460203,
-		0x81C, 0x60480203,
-		0x81C, 0x424A0203,
+		0x81C, 0x64420203,
+		0x81C, 0x63440203,
+		0x81C, 0x62460203,
+		0x81C, 0x61480203,
+		0x81C, 0x604A0203,
 		0x81C, 0x414C0203,
 		0x81C, 0x404E0203,
 		0x81C, 0x22500203,
@@ -1627,7 +2392,72 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0203,
 		0x81C, 0x007C0203,
 		0x81C, 0x007E0203,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFC000203,
+		0x81C, 0xFB020203,
+		0x81C, 0xFA040203,
+		0x81C, 0xF9060203,
+		0x81C, 0xF8080203,
+		0x81C, 0xF70A0203,
+		0x81C, 0xF60C0203,
+		0x81C, 0xF50E0203,
+		0x81C, 0xF4100203,
+		0x81C, 0xF3120203,
+		0x81C, 0xF2140203,
+		0x81C, 0xF1160203,
+		0x81C, 0xF0180203,
+		0x81C, 0xEF1A0203,
+		0x81C, 0xEE1C0203,
+		0x81C, 0xED1E0203,
+		0x81C, 0xEC200203,
+		0x81C, 0xEB220203,
+		0x81C, 0xEA240203,
+		0x81C, 0xE9260203,
+		0x81C, 0xE8280203,
+		0x81C, 0xE72A0203,
+		0x81C, 0xE62C0203,
+		0x81C, 0xE52E0203,
+		0x81C, 0xE4300203,
+		0x81C, 0xE3320203,
+		0x81C, 0xE2340203,
+		0x81C, 0xC6360203,
+		0x81C, 0xC5380203,
+		0x81C, 0xC43A0203,
+		0x81C, 0xC33C0203,
+		0x81C, 0xA63E0203,
+		0x81C, 0xA5400203,
+		0x81C, 0xA4420203,
+		0x81C, 0xA3440203,
+		0x81C, 0xA2460203,
+		0x81C, 0xA1480203,
+		0x81C, 0x834A0203,
+		0x81C, 0x824C0203,
+		0x81C, 0x814E0203,
+		0x81C, 0x64500203,
+		0x81C, 0x63520203,
+		0x81C, 0x62540203,
+		0x81C, 0x61560203,
+		0x81C, 0x60580203,
+		0x81C, 0x405A0203,
+		0x81C, 0x215C0203,
+		0x81C, 0x205E0203,
+		0x81C, 0x03600203,
+		0x81C, 0x02620203,
+		0x81C, 0x01640203,
+		0x81C, 0x00660203,
+		0x81C, 0x00680203,
+		0x81C, 0x006A0203,
+		0x81C, 0x006C0203,
+		0x81C, 0x006E0203,
+		0x81C, 0x00700203,
+		0x81C, 0x00720203,
+		0x81C, 0x00740203,
+		0x81C, 0x00760203,
+		0x81C, 0x00780203,
+		0x81C, 0x007A0203,
+		0x81C, 0x007C0203,
+		0x81C, 0x007E0203,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xF7000203,
 		0x81C, 0xF6020203,
 		0x81C, 0xF5040203,
@@ -1692,28 +2522,93 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0203,
 		0x81C, 0x007C0203,
 		0x81C, 0x007E0203,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
-		0x81C, 0xF7000203,
-		0x81C, 0xF6020203,
-		0x81C, 0xF5040203,
-		0x81C, 0xF4060203,
-		0x81C, 0xF3080203,
-		0x81C, 0xF20A0203,
-		0x81C, 0xF10C0203,
-		0x81C, 0xF00E0203,
-		0x81C, 0xEF100203,
-		0x81C, 0xEE120203,
-		0x81C, 0xED140203,
-		0x81C, 0xEC160203,
-		0x81C, 0xEB180203,
-		0x81C, 0xEA1A0203,
-		0x81C, 0xE91C0203,
-		0x81C, 0xE81E0203,
-		0x81C, 0xE7200203,
-		0x81C, 0xE6220203,
-		0x81C, 0xE5240203,
-		0x81C, 0xE4260203,
-		0x81C, 0xE3280203,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFC000203,
+		0x81C, 0xFB020203,
+		0x81C, 0xFA040203,
+		0x81C, 0xF9060203,
+		0x81C, 0xF8080203,
+		0x81C, 0xF70A0203,
+		0x81C, 0xF60C0203,
+		0x81C, 0xF50E0203,
+		0x81C, 0xF4100203,
+		0x81C, 0xF3120203,
+		0x81C, 0xF2140203,
+		0x81C, 0xF1160203,
+		0x81C, 0xF0180203,
+		0x81C, 0xEF1A0203,
+		0x81C, 0xEE1C0203,
+		0x81C, 0xED1E0203,
+		0x81C, 0xEC200203,
+		0x81C, 0xEB220203,
+		0x81C, 0xEA240203,
+		0x81C, 0xE9260203,
+		0x81C, 0xE8280203,
+		0x81C, 0xE72A0203,
+		0x81C, 0xE62C0203,
+		0x81C, 0xE52E0203,
+		0x81C, 0xE4300203,
+		0x81C, 0xE3320203,
+		0x81C, 0xE2340203,
+		0x81C, 0xE1360203,
+		0x81C, 0xC5380203,
+		0x81C, 0xC43A0203,
+		0x81C, 0xC33C0203,
+		0x81C, 0xC23E0203,
+		0x81C, 0xC1400203,
+		0x81C, 0xA3420203,
+		0x81C, 0xA2440203,
+		0x81C, 0xA1460203,
+		0x81C, 0xA0480203,
+		0x81C, 0x834A0203,
+		0x81C, 0x824C0203,
+		0x81C, 0x814E0203,
+		0x81C, 0x64500203,
+		0x81C, 0x63520203,
+		0x81C, 0x62540203,
+		0x81C, 0x61560203,
+		0x81C, 0x25580203,
+		0x81C, 0x245A0203,
+		0x81C, 0x235C0203,
+		0x81C, 0x225E0203,
+		0x81C, 0x21600203,
+		0x81C, 0x04620203,
+		0x81C, 0x03640203,
+		0x81C, 0x02660203,
+		0x81C, 0x01680203,
+		0x81C, 0x006A0203,
+		0x81C, 0x006C0203,
+		0x81C, 0x006E0203,
+		0x81C, 0x00700203,
+		0x81C, 0x00720203,
+		0x81C, 0x00740203,
+		0x81C, 0x00760203,
+		0x81C, 0x00780203,
+		0x81C, 0x007A0203,
+		0x81C, 0x007C0203,
+		0x81C, 0x007E0203,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xF9000203,
+		0x81C, 0xF8020203,
+		0x81C, 0xF7040203,
+		0x81C, 0xF6060203,
+		0x81C, 0xF5080203,
+		0x81C, 0xF40A0203,
+		0x81C, 0xF30C0203,
+		0x81C, 0xF20E0203,
+		0x81C, 0xF1100203,
+		0x81C, 0xF0120203,
+		0x81C, 0xEF140203,
+		0x81C, 0xEE160203,
+		0x81C, 0xED180203,
+		0x81C, 0xEC1A0203,
+		0x81C, 0xEB1C0203,
+		0x81C, 0xEA1E0203,
+		0x81C, 0xE9200203,
+		0x81C, 0xE8220203,
+		0x81C, 0xE7240203,
+		0x81C, 0xE6260203,
+		0x81C, 0xE5280203,
 		0x81C, 0xC42A0203,
 		0x81C, 0xC32C0203,
 		0x81C, 0xC22E0203,
@@ -1757,7 +2652,72 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0203,
 		0x81C, 0x007C0203,
 		0x81C, 0x007E0203,
-	0x90012100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xF8000203,
+		0x81C, 0xF7020203,
+		0x81C, 0xF6040203,
+		0x81C, 0xF5060203,
+		0x81C, 0xF4080203,
+		0x81C, 0xF30A0203,
+		0x81C, 0xF20C0203,
+		0x81C, 0xF10E0203,
+		0x81C, 0xF0100203,
+		0x81C, 0xEF120203,
+		0x81C, 0xEE140203,
+		0x81C, 0xED160203,
+		0x81C, 0xEC180203,
+		0x81C, 0xEB1A0203,
+		0x81C, 0xEA1C0203,
+		0x81C, 0xE91E0203,
+		0x81C, 0xE8200203,
+		0x81C, 0xE7220203,
+		0x81C, 0xE6240203,
+		0x81C, 0xE5260203,
+		0x81C, 0xE4280203,
+		0x81C, 0xE32A0203,
+		0x81C, 0xC42C0203,
+		0x81C, 0xC32E0203,
+		0x81C, 0xC2300203,
+		0x81C, 0xC1320203,
+		0x81C, 0xA3340203,
+		0x81C, 0xA2360203,
+		0x81C, 0xA1380203,
+		0x81C, 0xA03A0203,
+		0x81C, 0x823C0203,
+		0x81C, 0x813E0203,
+		0x81C, 0x80400203,
+		0x81C, 0x65420203,
+		0x81C, 0x64440203,
+		0x81C, 0x63460203,
+		0x81C, 0x62480203,
+		0x81C, 0x614A0203,
+		0x81C, 0x424C0203,
+		0x81C, 0x414E0203,
+		0x81C, 0x40500203,
+		0x81C, 0x22520203,
+		0x81C, 0x21540203,
+		0x81C, 0x20560203,
+		0x81C, 0x04580203,
+		0x81C, 0x035A0203,
+		0x81C, 0x025C0203,
+		0x81C, 0x015E0203,
+		0x81C, 0x00600203,
+		0x81C, 0x00620203,
+		0x81C, 0x00640203,
+		0x81C, 0x00660203,
+		0x81C, 0x00680203,
+		0x81C, 0x006A0203,
+		0x81C, 0x006C0203,
+		0x81C, 0x006E0203,
+		0x81C, 0x00700203,
+		0x81C, 0x00720203,
+		0x81C, 0x00740203,
+		0x81C, 0x00760203,
+		0x81C, 0x00780203,
+		0x81C, 0x007A0203,
+		0x81C, 0x007C0203,
+		0x81C, 0x007E0203,
+	0x90000008,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFB000203,
 		0x81C, 0xFA020203,
 		0x81C, 0xF9040203,
@@ -1822,7 +2782,7 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0203,
 		0x81C, 0x007C0203,
 		0x81C, 0x007E0203,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x90000009,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xF8000203,
 		0x81C, 0xF7020203,
 		0x81C, 0xF6040203,
@@ -1887,7 +2847,7 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0203,
 		0x81C, 0x007C0203,
 		0x81C, 0x007E0203,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+	0x9000000a,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFC000203,
 		0x81C, 0xFB020203,
 		0x81C, 0xFA040203,
@@ -1901,42 +2861,42 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0xF2140203,
 		0x81C, 0xF1160203,
 		0x81C, 0xF0180203,
-		0x81C, 0xEF1A0203,
-		0x81C, 0xEE1C0203,
-		0x81C, 0xED1E0203,
-		0x81C, 0xEC200203,
-		0x81C, 0xEB220203,
-		0x81C, 0xEA240203,
-		0x81C, 0xE9260203,
-		0x81C, 0xE8280203,
-		0x81C, 0xE72A0203,
-		0x81C, 0xE62C0203,
-		0x81C, 0xE52E0203,
-		0x81C, 0xE4300203,
-		0x81C, 0xE3320203,
-		0x81C, 0xE2340203,
-		0x81C, 0xE1360203,
-		0x81C, 0xC5380203,
-		0x81C, 0xC43A0203,
-		0x81C, 0xC33C0203,
-		0x81C, 0xC23E0203,
-		0x81C, 0xC1400203,
+		0x81C, 0xEE1A0203,
+		0x81C, 0xED1C0203,
+		0x81C, 0xEC1E0203,
+		0x81C, 0xEB200203,
+		0x81C, 0xEA220203,
+		0x81C, 0xE9240203,
+		0x81C, 0xE8260203,
+		0x81C, 0xE7280203,
+		0x81C, 0xE62A0203,
+		0x81C, 0xE52C0203,
+		0x81C, 0xE42E0203,
+		0x81C, 0xE3300203,
+		0x81C, 0xE2320203,
+		0x81C, 0xC6340203,
+		0x81C, 0xC5360203,
+		0x81C, 0xC4380203,
+		0x81C, 0xC33A0203,
+		0x81C, 0xA63C0203,
+		0x81C, 0xA53E0203,
+		0x81C, 0xA4400203,
 		0x81C, 0xA3420203,
 		0x81C, 0xA2440203,
 		0x81C, 0xA1460203,
-		0x81C, 0xA0480203,
-		0x81C, 0x834A0203,
-		0x81C, 0x824C0203,
-		0x81C, 0x814E0203,
-		0x81C, 0x64500203,
-		0x81C, 0x63520203,
-		0x81C, 0x62540203,
-		0x81C, 0x61560203,
-		0x81C, 0x25580203,
-		0x81C, 0x245A0203,
-		0x81C, 0x235C0203,
-		0x81C, 0x225E0203,
-		0x81C, 0x21600203,
+		0x81C, 0x83480203,
+		0x81C, 0x824A0203,
+		0x81C, 0x814C0203,
+		0x81C, 0x804E0203,
+		0x81C, 0x63500203,
+		0x81C, 0x62520203,
+		0x81C, 0x61540203,
+		0x81C, 0x42560203,
+		0x81C, 0x41580203,
+		0x81C, 0x405A0203,
+		0x81C, 0x225C0203,
+		0x81C, 0x215E0203,
+		0x81C, 0x20600203,
 		0x81C, 0x04620203,
 		0x81C, 0x03640203,
 		0x81C, 0x02660203,
@@ -1952,7 +2912,72 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0203,
 		0x81C, 0x007C0203,
 		0x81C, 0x007E0203,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x9000000b,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xF9000203,
+		0x81C, 0xF8020203,
+		0x81C, 0xF7040203,
+		0x81C, 0xF6060203,
+		0x81C, 0xF5080203,
+		0x81C, 0xF40A0203,
+		0x81C, 0xF30C0203,
+		0x81C, 0xF20E0203,
+		0x81C, 0xF1100203,
+		0x81C, 0xF0120203,
+		0x81C, 0xEF140203,
+		0x81C, 0xEE160203,
+		0x81C, 0xED180203,
+		0x81C, 0xEC1A0203,
+		0x81C, 0xEB1C0203,
+		0x81C, 0xEA1E0203,
+		0x81C, 0xE9200203,
+		0x81C, 0xE8220203,
+		0x81C, 0xE7240203,
+		0x81C, 0xE6260203,
+		0x81C, 0xE5280203,
+		0x81C, 0xE42A0203,
+		0x81C, 0xC42C0203,
+		0x81C, 0xC32E0203,
+		0x81C, 0xC2300203,
+		0x81C, 0xC1320203,
+		0x81C, 0xA3340203,
+		0x81C, 0xA2360203,
+		0x81C, 0xA1380203,
+		0x81C, 0xA03A0203,
+		0x81C, 0x823C0203,
+		0x81C, 0x813E0203,
+		0x81C, 0x80400203,
+		0x81C, 0x64420203,
+		0x81C, 0x63440203,
+		0x81C, 0x62460203,
+		0x81C, 0x61480203,
+		0x81C, 0x604A0203,
+		0x81C, 0x244C0203,
+		0x81C, 0x234E0203,
+		0x81C, 0x22500203,
+		0x81C, 0x21520203,
+		0x81C, 0x20540203,
+		0x81C, 0x05560203,
+		0x81C, 0x04580203,
+		0x81C, 0x035A0203,
+		0x81C, 0x025C0203,
+		0x81C, 0x015E0203,
+		0x81C, 0x00600203,
+		0x81C, 0x00620203,
+		0x81C, 0x00640203,
+		0x81C, 0x00660203,
+		0x81C, 0x00680203,
+		0x81C, 0x006A0203,
+		0x81C, 0x006C0203,
+		0x81C, 0x006E0203,
+		0x81C, 0x00700203,
+		0x81C, 0x00720203,
+		0x81C, 0x00740203,
+		0x81C, 0x00760203,
+		0x81C, 0x00780203,
+		0x81C, 0x007A0203,
+		0x81C, 0x007C0203,
+		0x81C, 0x007E0203,
+	0x9000000c,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFC000203,
 		0x81C, 0xFB020203,
 		0x81C, 0xFA040203,
@@ -1966,46 +2991,176 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0xF2140203,
 		0x81C, 0xF1160203,
 		0x81C, 0xF0180203,
-		0x81C, 0xEF1A0203,
-		0x81C, 0xEE1C0203,
-		0x81C, 0xED1E0203,
-		0x81C, 0xEC200203,
-		0x81C, 0xEB220203,
-		0x81C, 0xEA240203,
-		0x81C, 0xE9260203,
-		0x81C, 0xE8280203,
-		0x81C, 0xE72A0203,
-		0x81C, 0xE62C0203,
-		0x81C, 0xE52E0203,
-		0x81C, 0xE4300203,
-		0x81C, 0xE3320203,
-		0x81C, 0xE2340203,
-		0x81C, 0xC6360203,
-		0x81C, 0xC5380203,
-		0x81C, 0xC43A0203,
-		0x81C, 0xC33C0203,
-		0x81C, 0xA63E0203,
-		0x81C, 0xA5400203,
-		0x81C, 0xA4420203,
-		0x81C, 0xA3440203,
-		0x81C, 0xA2460203,
-		0x81C, 0xA1480203,
-		0x81C, 0x834A0203,
-		0x81C, 0x824C0203,
-		0x81C, 0x814E0203,
-		0x81C, 0x64500203,
-		0x81C, 0x63520203,
-		0x81C, 0x62540203,
-		0x81C, 0x61560203,
-		0x81C, 0x60580203,
+		0x81C, 0xEE1A0203,
+		0x81C, 0xED1C0203,
+		0x81C, 0xEC1E0203,
+		0x81C, 0xEB200203,
+		0x81C, 0xEA220203,
+		0x81C, 0xE9240203,
+		0x81C, 0xE8260203,
+		0x81C, 0xE7280203,
+		0x81C, 0xE62A0203,
+		0x81C, 0xE52C0203,
+		0x81C, 0xE42E0203,
+		0x81C, 0xE3300203,
+		0x81C, 0xE2320203,
+		0x81C, 0xC6340203,
+		0x81C, 0xC5360203,
+		0x81C, 0xC4380203,
+		0x81C, 0xC33A0203,
+		0x81C, 0xA63C0203,
+		0x81C, 0xA53E0203,
+		0x81C, 0xA4400203,
+		0x81C, 0xA3420203,
+		0x81C, 0xA2440203,
+		0x81C, 0xA1460203,
+		0x81C, 0x83480203,
+		0x81C, 0x824A0203,
+		0x81C, 0x814C0203,
+		0x81C, 0x804E0203,
+		0x81C, 0x63500203,
+		0x81C, 0x62520203,
+		0x81C, 0x61540203,
+		0x81C, 0x42560203,
+		0x81C, 0x41580203,
 		0x81C, 0x405A0203,
-		0x81C, 0x215C0203,
-		0x81C, 0x205E0203,
-		0x81C, 0x03600203,
-		0x81C, 0x02620203,
-		0x81C, 0x01640203,
-		0x81C, 0x00660203,
-		0x81C, 0x00680203,
+		0x81C, 0x225C0203,
+		0x81C, 0x215E0203,
+		0x81C, 0x20600203,
+		0x81C, 0x04620203,
+		0x81C, 0x03640203,
+		0x81C, 0x02660203,
+		0x81C, 0x01680203,
+		0x81C, 0x006A0203,
+		0x81C, 0x006C0203,
+		0x81C, 0x006E0203,
+		0x81C, 0x00700203,
+		0x81C, 0x00720203,
+		0x81C, 0x00740203,
+		0x81C, 0x00760203,
+		0x81C, 0x00780203,
+		0x81C, 0x007A0203,
+		0x81C, 0x007C0203,
+		0x81C, 0x007E0203,
+	0x9000000d,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFC000203,
+		0x81C, 0xFB020203,
+		0x81C, 0xFA040203,
+		0x81C, 0xF9060203,
+		0x81C, 0xF8080203,
+		0x81C, 0xF70A0203,
+		0x81C, 0xF60C0203,
+		0x81C, 0xF50E0203,
+		0x81C, 0xF4100203,
+		0x81C, 0xF3120203,
+		0x81C, 0xF2140203,
+		0x81C, 0xF1160203,
+		0x81C, 0xF0180203,
+		0x81C, 0xEE1A0203,
+		0x81C, 0xED1C0203,
+		0x81C, 0xEC1E0203,
+		0x81C, 0xEB200203,
+		0x81C, 0xEA220203,
+		0x81C, 0xE9240203,
+		0x81C, 0xE8260203,
+		0x81C, 0xE7280203,
+		0x81C, 0xE62A0203,
+		0x81C, 0xE52C0203,
+		0x81C, 0xE42E0203,
+		0x81C, 0xE3300203,
+		0x81C, 0xE2320203,
+		0x81C, 0xC6340203,
+		0x81C, 0xC5360203,
+		0x81C, 0xC4380203,
+		0x81C, 0xC33A0203,
+		0x81C, 0xA63C0203,
+		0x81C, 0xA53E0203,
+		0x81C, 0xA4400203,
+		0x81C, 0xA3420203,
+		0x81C, 0xA2440203,
+		0x81C, 0xA1460203,
+		0x81C, 0x83480203,
+		0x81C, 0x824A0203,
+		0x81C, 0x814C0203,
+		0x81C, 0x804E0203,
+		0x81C, 0x63500203,
+		0x81C, 0x62520203,
+		0x81C, 0x61540203,
+		0x81C, 0x42560203,
+		0x81C, 0x41580203,
+		0x81C, 0x405A0203,
+		0x81C, 0x225C0203,
+		0x81C, 0x215E0203,
+		0x81C, 0x20600203,
+		0x81C, 0x04620203,
+		0x81C, 0x03640203,
+		0x81C, 0x02660203,
+		0x81C, 0x01680203,
+		0x81C, 0x006A0203,
+		0x81C, 0x006C0203,
+		0x81C, 0x006E0203,
+		0x81C, 0x00700203,
+		0x81C, 0x00720203,
+		0x81C, 0x00740203,
+		0x81C, 0x00760203,
+		0x81C, 0x00780203,
+		0x81C, 0x007A0203,
+		0x81C, 0x007C0203,
+		0x81C, 0x007E0203,
+	0x9000000e,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFC000203,
+		0x81C, 0xFB020203,
+		0x81C, 0xFA040203,
+		0x81C, 0xF9060203,
+		0x81C, 0xF8080203,
+		0x81C, 0xF70A0203,
+		0x81C, 0xF60C0203,
+		0x81C, 0xF50E0203,
+		0x81C, 0xF4100203,
+		0x81C, 0xF3120203,
+		0x81C, 0xF2140203,
+		0x81C, 0xF1160203,
+		0x81C, 0xF0180203,
+		0x81C, 0xEE1A0203,
+		0x81C, 0xED1C0203,
+		0x81C, 0xEC1E0203,
+		0x81C, 0xEB200203,
+		0x81C, 0xEA220203,
+		0x81C, 0xE9240203,
+		0x81C, 0xE8260203,
+		0x81C, 0xE7280203,
+		0x81C, 0xE62A0203,
+		0x81C, 0xE52C0203,
+		0x81C, 0xE42E0203,
+		0x81C, 0xE3300203,
+		0x81C, 0xE2320203,
+		0x81C, 0xC6340203,
+		0x81C, 0xC5360203,
+		0x81C, 0xC4380203,
+		0x81C, 0xC33A0203,
+		0x81C, 0xA63C0203,
+		0x81C, 0xA53E0203,
+		0x81C, 0xA4400203,
+		0x81C, 0xA3420203,
+		0x81C, 0xA2440203,
+		0x81C, 0xA1460203,
+		0x81C, 0x83480203,
+		0x81C, 0x824A0203,
+		0x81C, 0x814C0203,
+		0x81C, 0x804E0203,
+		0x81C, 0x63500203,
+		0x81C, 0x62520203,
+		0x81C, 0x61540203,
+		0x81C, 0x42560203,
+		0x81C, 0x41580203,
+		0x81C, 0x405A0203,
+		0x81C, 0x225C0203,
+		0x81C, 0x215E0203,
+		0x81C, 0x20600203,
+		0x81C, 0x04620203,
+		0x81C, 0x03640203,
+		0x81C, 0x02660203,
+		0x81C, 0x01680203,
 		0x81C, 0x006A0203,
 		0x81C, 0x006C0203,
 		0x81C, 0x006E0203,
@@ -2083,60 +3238,60 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007C0203,
 		0x81C, 0x007E0203,
 	0xB0000000,	0x00000000,
-	0x8000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x81C, 0xF8000303,
-		0x81C, 0xF7020303,
-		0x81C, 0xF6040303,
-		0x81C, 0xF5060303,
-		0x81C, 0xF4080303,
-		0x81C, 0xF30A0303,
-		0x81C, 0xF20C0303,
-		0x81C, 0xF10E0303,
-		0x81C, 0xF0100303,
-		0x81C, 0xEF120303,
-		0x81C, 0xEE140303,
-		0x81C, 0xED160303,
-		0x81C, 0xEC180303,
-		0x81C, 0xEB1A0303,
-		0x81C, 0xEA1C0303,
-		0x81C, 0xE91E0303,
-		0x81C, 0xCA200303,
-		0x81C, 0xC9220303,
-		0x81C, 0xC8240303,
-		0x81C, 0xC7260303,
-		0x81C, 0xC6280303,
-		0x81C, 0xC52A0303,
-		0x81C, 0xC42C0303,
-		0x81C, 0xC32E0303,
-		0x81C, 0xC2300303,
-		0x81C, 0xC1320303,
-		0x81C, 0xA3340303,
-		0x81C, 0xA2360303,
-		0x81C, 0xA1380303,
-		0x81C, 0xA03A0303,
-		0x81C, 0x823C0303,
-		0x81C, 0x813E0303,
-		0x81C, 0x80400303,
-		0x81C, 0x65420303,
-		0x81C, 0x64440303,
-		0x81C, 0x63460303,
-		0x81C, 0x62480303,
-		0x81C, 0x614A0303,
-		0x81C, 0x424C0303,
-		0x81C, 0x414E0303,
-		0x81C, 0x40500303,
-		0x81C, 0x22520303,
-		0x81C, 0x21540303,
-		0x81C, 0x20560303,
-		0x81C, 0x04580303,
-		0x81C, 0x035A0303,
-		0x81C, 0x025C0303,
-		0x81C, 0x015E0303,
-		0x81C, 0x00600303,
-		0x81C, 0x00620303,
-		0x81C, 0x00640303,
-		0x81C, 0x00660303,
-		0x81C, 0x00680303,
+	0x80000000,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFC000303,
+		0x81C, 0xFB020303,
+		0x81C, 0xFA040303,
+		0x81C, 0xF9060303,
+		0x81C, 0xF8080303,
+		0x81C, 0xF70A0303,
+		0x81C, 0xF60C0303,
+		0x81C, 0xF50E0303,
+		0x81C, 0xF4100303,
+		0x81C, 0xF3120303,
+		0x81C, 0xF2140303,
+		0x81C, 0xF1160303,
+		0x81C, 0xEF180303,
+		0x81C, 0xEE1A0303,
+		0x81C, 0xED1C0303,
+		0x81C, 0xEC1E0303,
+		0x81C, 0xEB200303,
+		0x81C, 0xEA220303,
+		0x81C, 0xE9240303,
+		0x81C, 0xE8260303,
+		0x81C, 0xE7280303,
+		0x81C, 0xE62A0303,
+		0x81C, 0xE52C0303,
+		0x81C, 0xE42E0303,
+		0x81C, 0xE3300303,
+		0x81C, 0xE2320303,
+		0x81C, 0xC6340303,
+		0x81C, 0xC5360303,
+		0x81C, 0xC4380303,
+		0x81C, 0xC33A0303,
+		0x81C, 0xA63C0303,
+		0x81C, 0xA53E0303,
+		0x81C, 0xA4400303,
+		0x81C, 0xA3420303,
+		0x81C, 0xA2440303,
+		0x81C, 0xA1460303,
+		0x81C, 0x83480303,
+		0x81C, 0x824A0303,
+		0x81C, 0x814C0303,
+		0x81C, 0x804E0303,
+		0x81C, 0x63500303,
+		0x81C, 0x62520303,
+		0x81C, 0x61540303,
+		0x81C, 0x42560303,
+		0x81C, 0x41580303,
+		0x81C, 0x405A0303,
+		0x81C, 0x225C0303,
+		0x81C, 0x215E0303,
+		0x81C, 0x20600303,
+		0x81C, 0x04620303,
+		0x81C, 0x03640303,
+		0x81C, 0x02660303,
+		0x81C, 0x01680303,
 		0x81C, 0x006A0303,
 		0x81C, 0x006C0303,
 		0x81C, 0x006E0303,
@@ -2148,23 +3303,23 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0303,
 		0x81C, 0x007C0303,
 		0x81C, 0x007E0303,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
-		0x81C, 0xF9000303,
-		0x81C, 0xF8020303,
-		0x81C, 0xF7040303,
-		0x81C, 0xF6060303,
-		0x81C, 0xF5080303,
-		0x81C, 0xF40A0303,
-		0x81C, 0xF30C0303,
-		0x81C, 0xF20E0303,
-		0x81C, 0xF1100303,
-		0x81C, 0xF0120303,
-		0x81C, 0xEF140303,
-		0x81C, 0xEE160303,
-		0x81C, 0xED180303,
-		0x81C, 0xEC1A0303,
-		0x81C, 0xEB1C0303,
-		0x81C, 0xEA1E0303,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xF7000303,
+		0x81C, 0xF6020303,
+		0x81C, 0xF5040303,
+		0x81C, 0xF4060303,
+		0x81C, 0xF3080303,
+		0x81C, 0xF20A0303,
+		0x81C, 0xF10C0303,
+		0x81C, 0xF00E0303,
+		0x81C, 0xEF100303,
+		0x81C, 0xEE120303,
+		0x81C, 0xED140303,
+		0x81C, 0xEC160303,
+		0x81C, 0xEB180303,
+		0x81C, 0xEA1A0303,
+		0x81C, 0xE91C0303,
+		0x81C, 0xCA1E0303,
 		0x81C, 0xC9200303,
 		0x81C, 0xC8220303,
 		0x81C, 0xC7240303,
@@ -2174,7 +3329,7 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0xC32C0303,
 		0x81C, 0xC22E0303,
 		0x81C, 0xC1300303,
-		0x81C, 0xC0320303,
+		0x81C, 0xA4320303,
 		0x81C, 0xA3340303,
 		0x81C, 0xA2360303,
 		0x81C, 0xA1380303,
@@ -2189,9 +3344,9 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x604A0303,
 		0x81C, 0x414C0303,
 		0x81C, 0x404E0303,
-		0x81C, 0x22500303,
-		0x81C, 0x21520303,
-		0x81C, 0x20540303,
+		0x81C, 0x06500303,
+		0x81C, 0x05520303,
+		0x81C, 0x04540303,
 		0x81C, 0x03560303,
 		0x81C, 0x02580303,
 		0x81C, 0x015A0303,
@@ -2213,7 +3368,7 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0303,
 		0x81C, 0x007C0303,
 		0x81C, 0x007E0303,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xF7000303,
 		0x81C, 0xF6020303,
 		0x81C, 0xF5040303,
@@ -2278,7 +3433,72 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0303,
 		0x81C, 0x007C0303,
 		0x81C, 0x007E0303,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFC000303,
+		0x81C, 0xFB020303,
+		0x81C, 0xFA040303,
+		0x81C, 0xF9060303,
+		0x81C, 0xF8080303,
+		0x81C, 0xF70A0303,
+		0x81C, 0xF60C0303,
+		0x81C, 0xF50E0303,
+		0x81C, 0xF4100303,
+		0x81C, 0xF3120303,
+		0x81C, 0xF2140303,
+		0x81C, 0xF1160303,
+		0x81C, 0xF0180303,
+		0x81C, 0xEF1A0303,
+		0x81C, 0xEE1C0303,
+		0x81C, 0xED1E0303,
+		0x81C, 0xEC200303,
+		0x81C, 0xEB220303,
+		0x81C, 0xEA240303,
+		0x81C, 0xE9260303,
+		0x81C, 0xE8280303,
+		0x81C, 0xE72A0303,
+		0x81C, 0xE62C0303,
+		0x81C, 0xE52E0303,
+		0x81C, 0xE4300303,
+		0x81C, 0xE3320303,
+		0x81C, 0xE2340303,
+		0x81C, 0xC6360303,
+		0x81C, 0xC5380303,
+		0x81C, 0xC43A0303,
+		0x81C, 0xC33C0303,
+		0x81C, 0xA63E0303,
+		0x81C, 0xA5400303,
+		0x81C, 0xA4420303,
+		0x81C, 0xA3440303,
+		0x81C, 0xA2460303,
+		0x81C, 0x84480303,
+		0x81C, 0x834A0303,
+		0x81C, 0x824C0303,
+		0x81C, 0x814E0303,
+		0x81C, 0x80500303,
+		0x81C, 0x63520303,
+		0x81C, 0x62540303,
+		0x81C, 0x61560303,
+		0x81C, 0x60580303,
+		0x81C, 0x225A0303,
+		0x81C, 0x055C0303,
+		0x81C, 0x045E0303,
+		0x81C, 0x03600303,
+		0x81C, 0x02620303,
+		0x81C, 0x01640303,
+		0x81C, 0x00660303,
+		0x81C, 0x00680303,
+		0x81C, 0x006A0303,
+		0x81C, 0x006C0303,
+		0x81C, 0x006E0303,
+		0x81C, 0x00700303,
+		0x81C, 0x00720303,
+		0x81C, 0x00740303,
+		0x81C, 0x00760303,
+		0x81C, 0x00780303,
+		0x81C, 0x007A0303,
+		0x81C, 0x007C0303,
+		0x81C, 0x007E0303,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xF7000303,
 		0x81C, 0xF6020303,
 		0x81C, 0xF5040303,
@@ -2343,23 +3563,88 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0303,
 		0x81C, 0x007C0303,
 		0x81C, 0x007E0303,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
-		0x81C, 0xF7000303,
-		0x81C, 0xF6020303,
-		0x81C, 0xF5040303,
-		0x81C, 0xF4060303,
-		0x81C, 0xF3080303,
-		0x81C, 0xF20A0303,
-		0x81C, 0xF10C0303,
-		0x81C, 0xF00E0303,
-		0x81C, 0xEF100303,
-		0x81C, 0xEE120303,
-		0x81C, 0xED140303,
-		0x81C, 0xEC160303,
-		0x81C, 0xEB180303,
-		0x81C, 0xEA1A0303,
-		0x81C, 0xE91C0303,
-		0x81C, 0xCA1E0303,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFB000303,
+		0x81C, 0xFA020303,
+		0x81C, 0xF9040303,
+		0x81C, 0xF8060303,
+		0x81C, 0xF7080303,
+		0x81C, 0xF60A0303,
+		0x81C, 0xF50C0303,
+		0x81C, 0xF40E0303,
+		0x81C, 0xF3100303,
+		0x81C, 0xF2120303,
+		0x81C, 0xF1140303,
+		0x81C, 0xF0160303,
+		0x81C, 0xEF180303,
+		0x81C, 0xEE1A0303,
+		0x81C, 0xED1C0303,
+		0x81C, 0xEC1E0303,
+		0x81C, 0xEB200303,
+		0x81C, 0xEA220303,
+		0x81C, 0xE9240303,
+		0x81C, 0xE8260303,
+		0x81C, 0xE7280303,
+		0x81C, 0xE62A0303,
+		0x81C, 0xE52C0303,
+		0x81C, 0xE42E0303,
+		0x81C, 0xE3300303,
+		0x81C, 0xE2320303,
+		0x81C, 0xE1340303,
+		0x81C, 0xC5360303,
+		0x81C, 0xC4380303,
+		0x81C, 0xC33A0303,
+		0x81C, 0xC23C0303,
+		0x81C, 0xC13E0303,
+		0x81C, 0xA4400303,
+		0x81C, 0xA3420303,
+		0x81C, 0xA2440303,
+		0x81C, 0xA1460303,
+		0x81C, 0x83480303,
+		0x81C, 0x824A0303,
+		0x81C, 0x814C0303,
+		0x81C, 0x804E0303,
+		0x81C, 0x64500303,
+		0x81C, 0x63520303,
+		0x81C, 0x62540303,
+		0x81C, 0x61560303,
+		0x81C, 0x60580303,
+		0x81C, 0x235A0303,
+		0x81C, 0x225C0303,
+		0x81C, 0x215E0303,
+		0x81C, 0x20600303,
+		0x81C, 0x04620303,
+		0x81C, 0x03640303,
+		0x81C, 0x02660303,
+		0x81C, 0x01680303,
+		0x81C, 0x006A0303,
+		0x81C, 0x006C0303,
+		0x81C, 0x006E0303,
+		0x81C, 0x00700303,
+		0x81C, 0x00720303,
+		0x81C, 0x00740303,
+		0x81C, 0x00760303,
+		0x81C, 0x00780303,
+		0x81C, 0x007A0303,
+		0x81C, 0x007C0303,
+		0x81C, 0x007E0303,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xF9000303,
+		0x81C, 0xF8020303,
+		0x81C, 0xF7040303,
+		0x81C, 0xF6060303,
+		0x81C, 0xF5080303,
+		0x81C, 0xF40A0303,
+		0x81C, 0xF30C0303,
+		0x81C, 0xF20E0303,
+		0x81C, 0xF1100303,
+		0x81C, 0xF0120303,
+		0x81C, 0xEF140303,
+		0x81C, 0xEE160303,
+		0x81C, 0xED180303,
+		0x81C, 0xEC1A0303,
+		0x81C, 0xEB1C0303,
+		0x81C, 0xEA1E0303,
 		0x81C, 0xC9200303,
 		0x81C, 0xC8220303,
 		0x81C, 0xC7240303,
@@ -2369,7 +3654,7 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0xC32C0303,
 		0x81C, 0xC22E0303,
 		0x81C, 0xC1300303,
-		0x81C, 0xA4320303,
+		0x81C, 0xC0320303,
 		0x81C, 0xA3340303,
 		0x81C, 0xA2360303,
 		0x81C, 0xA1380303,
@@ -2408,7 +3693,72 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0303,
 		0x81C, 0x007C0303,
 		0x81C, 0x007E0303,
-	0x90012100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xF8000303,
+		0x81C, 0xF7020303,
+		0x81C, 0xF6040303,
+		0x81C, 0xF5060303,
+		0x81C, 0xF4080303,
+		0x81C, 0xF30A0303,
+		0x81C, 0xF20C0303,
+		0x81C, 0xF10E0303,
+		0x81C, 0xF0100303,
+		0x81C, 0xEF120303,
+		0x81C, 0xEE140303,
+		0x81C, 0xED160303,
+		0x81C, 0xEC180303,
+		0x81C, 0xEB1A0303,
+		0x81C, 0xEA1C0303,
+		0x81C, 0xE91E0303,
+		0x81C, 0xCA200303,
+		0x81C, 0xC9220303,
+		0x81C, 0xC8240303,
+		0x81C, 0xC7260303,
+		0x81C, 0xC6280303,
+		0x81C, 0xC52A0303,
+		0x81C, 0xC42C0303,
+		0x81C, 0xC32E0303,
+		0x81C, 0xC2300303,
+		0x81C, 0xC1320303,
+		0x81C, 0xA3340303,
+		0x81C, 0xA2360303,
+		0x81C, 0xA1380303,
+		0x81C, 0xA03A0303,
+		0x81C, 0x823C0303,
+		0x81C, 0x813E0303,
+		0x81C, 0x80400303,
+		0x81C, 0x65420303,
+		0x81C, 0x64440303,
+		0x81C, 0x63460303,
+		0x81C, 0x62480303,
+		0x81C, 0x614A0303,
+		0x81C, 0x424C0303,
+		0x81C, 0x414E0303,
+		0x81C, 0x40500303,
+		0x81C, 0x22520303,
+		0x81C, 0x21540303,
+		0x81C, 0x20560303,
+		0x81C, 0x04580303,
+		0x81C, 0x035A0303,
+		0x81C, 0x025C0303,
+		0x81C, 0x015E0303,
+		0x81C, 0x00600303,
+		0x81C, 0x00620303,
+		0x81C, 0x00640303,
+		0x81C, 0x00660303,
+		0x81C, 0x00680303,
+		0x81C, 0x006A0303,
+		0x81C, 0x006C0303,
+		0x81C, 0x006E0303,
+		0x81C, 0x00700303,
+		0x81C, 0x00720303,
+		0x81C, 0x00740303,
+		0x81C, 0x00760303,
+		0x81C, 0x00780303,
+		0x81C, 0x007A0303,
+		0x81C, 0x007C0303,
+		0x81C, 0x007E0303,
+	0x90000008,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFB000303,
 		0x81C, 0xFA020303,
 		0x81C, 0xF9040303,
@@ -2473,7 +3823,7 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0303,
 		0x81C, 0x007C0303,
 		0x81C, 0x007E0303,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x90000009,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xF8000303,
 		0x81C, 0xF7020303,
 		0x81C, 0xF6040303,
@@ -2538,19 +3888,19 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0303,
 		0x81C, 0x007C0303,
 		0x81C, 0x007E0303,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
-		0x81C, 0xFB000303,
-		0x81C, 0xFA020303,
-		0x81C, 0xF9040303,
-		0x81C, 0xF8060303,
-		0x81C, 0xF7080303,
-		0x81C, 0xF60A0303,
-		0x81C, 0xF50C0303,
-		0x81C, 0xF40E0303,
-		0x81C, 0xF3100303,
-		0x81C, 0xF2120303,
-		0x81C, 0xF1140303,
-		0x81C, 0xF0160303,
+	0x9000000a,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFC000303,
+		0x81C, 0xFB020303,
+		0x81C, 0xFA040303,
+		0x81C, 0xF9060303,
+		0x81C, 0xF8080303,
+		0x81C, 0xF70A0303,
+		0x81C, 0xF60C0303,
+		0x81C, 0xF50E0303,
+		0x81C, 0xF4100303,
+		0x81C, 0xF3120303,
+		0x81C, 0xF2140303,
+		0x81C, 0xF1160303,
 		0x81C, 0xEF180303,
 		0x81C, 0xEE1A0303,
 		0x81C, 0xED1C0303,
@@ -2565,12 +3915,12 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0xE42E0303,
 		0x81C, 0xE3300303,
 		0x81C, 0xE2320303,
-		0x81C, 0xE1340303,
+		0x81C, 0xC6340303,
 		0x81C, 0xC5360303,
 		0x81C, 0xC4380303,
 		0x81C, 0xC33A0303,
-		0x81C, 0xC23C0303,
-		0x81C, 0xC13E0303,
+		0x81C, 0xA63C0303,
+		0x81C, 0xA53E0303,
 		0x81C, 0xA4400303,
 		0x81C, 0xA3420303,
 		0x81C, 0xA2440303,
@@ -2579,12 +3929,12 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x824A0303,
 		0x81C, 0x814C0303,
 		0x81C, 0x804E0303,
-		0x81C, 0x64500303,
-		0x81C, 0x63520303,
-		0x81C, 0x62540303,
-		0x81C, 0x61560303,
-		0x81C, 0x60580303,
-		0x81C, 0x235A0303,
+		0x81C, 0x63500303,
+		0x81C, 0x62520303,
+		0x81C, 0x61540303,
+		0x81C, 0x42560303,
+		0x81C, 0x41580303,
+		0x81C, 0x405A0303,
 		0x81C, 0x225C0303,
 		0x81C, 0x215E0303,
 		0x81C, 0x20600303,
@@ -2603,7 +3953,72 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0303,
 		0x81C, 0x007C0303,
 		0x81C, 0x007E0303,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x9000000b,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xF8000303,
+		0x81C, 0xF7020303,
+		0x81C, 0xF6040303,
+		0x81C, 0xF5060303,
+		0x81C, 0xF4080303,
+		0x81C, 0xF30A0303,
+		0x81C, 0xF20C0303,
+		0x81C, 0xF10E0303,
+		0x81C, 0xF0100303,
+		0x81C, 0xEF120303,
+		0x81C, 0xEE140303,
+		0x81C, 0xED160303,
+		0x81C, 0xEC180303,
+		0x81C, 0xEB1A0303,
+		0x81C, 0xEA1C0303,
+		0x81C, 0xE91E0303,
+		0x81C, 0xCA200303,
+		0x81C, 0xC9220303,
+		0x81C, 0xC8240303,
+		0x81C, 0xC7260303,
+		0x81C, 0xC6280303,
+		0x81C, 0xC52A0303,
+		0x81C, 0xC42C0303,
+		0x81C, 0xC32E0303,
+		0x81C, 0xC2300303,
+		0x81C, 0xC1320303,
+		0x81C, 0xA3340303,
+		0x81C, 0xA2360303,
+		0x81C, 0xA1380303,
+		0x81C, 0xA03A0303,
+		0x81C, 0x823C0303,
+		0x81C, 0x813E0303,
+		0x81C, 0x80400303,
+		0x81C, 0x64420303,
+		0x81C, 0x63440303,
+		0x81C, 0x62460303,
+		0x81C, 0x61480303,
+		0x81C, 0x604A0303,
+		0x81C, 0x234C0303,
+		0x81C, 0x224E0303,
+		0x81C, 0x21500303,
+		0x81C, 0x20520303,
+		0x81C, 0x06540303,
+		0x81C, 0x05560303,
+		0x81C, 0x04580303,
+		0x81C, 0x035A0303,
+		0x81C, 0x025C0303,
+		0x81C, 0x015E0303,
+		0x81C, 0x00600303,
+		0x81C, 0x00620303,
+		0x81C, 0x00640303,
+		0x81C, 0x00660303,
+		0x81C, 0x00680303,
+		0x81C, 0x006A0303,
+		0x81C, 0x006C0303,
+		0x81C, 0x006E0303,
+		0x81C, 0x00700303,
+		0x81C, 0x00720303,
+		0x81C, 0x00740303,
+		0x81C, 0x00760303,
+		0x81C, 0x00780303,
+		0x81C, 0x007A0303,
+		0x81C, 0x007C0303,
+		0x81C, 0x007E0303,
+	0x9000000c,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFC000303,
 		0x81C, 0xFB020303,
 		0x81C, 0xFA040303,
@@ -2616,47 +4031,177 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0xF3120303,
 		0x81C, 0xF2140303,
 		0x81C, 0xF1160303,
-		0x81C, 0xF0180303,
-		0x81C, 0xEF1A0303,
-		0x81C, 0xEE1C0303,
-		0x81C, 0xED1E0303,
-		0x81C, 0xEC200303,
-		0x81C, 0xEB220303,
-		0x81C, 0xEA240303,
-		0x81C, 0xE9260303,
-		0x81C, 0xE8280303,
-		0x81C, 0xE72A0303,
-		0x81C, 0xE62C0303,
-		0x81C, 0xE52E0303,
-		0x81C, 0xE4300303,
-		0x81C, 0xE3320303,
-		0x81C, 0xE2340303,
-		0x81C, 0xC6360303,
-		0x81C, 0xC5380303,
-		0x81C, 0xC43A0303,
-		0x81C, 0xC33C0303,
-		0x81C, 0xA63E0303,
-		0x81C, 0xA5400303,
-		0x81C, 0xA4420303,
-		0x81C, 0xA3440303,
-		0x81C, 0xA2460303,
-		0x81C, 0x84480303,
-		0x81C, 0x834A0303,
-		0x81C, 0x824C0303,
-		0x81C, 0x814E0303,
-		0x81C, 0x80500303,
-		0x81C, 0x63520303,
-		0x81C, 0x62540303,
-		0x81C, 0x61560303,
-		0x81C, 0x60580303,
-		0x81C, 0x225A0303,
-		0x81C, 0x055C0303,
-		0x81C, 0x045E0303,
-		0x81C, 0x03600303,
-		0x81C, 0x02620303,
-		0x81C, 0x01640303,
-		0x81C, 0x00660303,
-		0x81C, 0x00680303,
+		0x81C, 0xEF180303,
+		0x81C, 0xEE1A0303,
+		0x81C, 0xED1C0303,
+		0x81C, 0xEC1E0303,
+		0x81C, 0xEB200303,
+		0x81C, 0xEA220303,
+		0x81C, 0xE9240303,
+		0x81C, 0xE8260303,
+		0x81C, 0xE7280303,
+		0x81C, 0xE62A0303,
+		0x81C, 0xE52C0303,
+		0x81C, 0xE42E0303,
+		0x81C, 0xE3300303,
+		0x81C, 0xE2320303,
+		0x81C, 0xC6340303,
+		0x81C, 0xC5360303,
+		0x81C, 0xC4380303,
+		0x81C, 0xC33A0303,
+		0x81C, 0xA63C0303,
+		0x81C, 0xA53E0303,
+		0x81C, 0xA4400303,
+		0x81C, 0xA3420303,
+		0x81C, 0xA2440303,
+		0x81C, 0xA1460303,
+		0x81C, 0x83480303,
+		0x81C, 0x824A0303,
+		0x81C, 0x814C0303,
+		0x81C, 0x804E0303,
+		0x81C, 0x63500303,
+		0x81C, 0x62520303,
+		0x81C, 0x61540303,
+		0x81C, 0x42560303,
+		0x81C, 0x41580303,
+		0x81C, 0x405A0303,
+		0x81C, 0x225C0303,
+		0x81C, 0x215E0303,
+		0x81C, 0x20600303,
+		0x81C, 0x04620303,
+		0x81C, 0x03640303,
+		0x81C, 0x02660303,
+		0x81C, 0x01680303,
+		0x81C, 0x006A0303,
+		0x81C, 0x006C0303,
+		0x81C, 0x006E0303,
+		0x81C, 0x00700303,
+		0x81C, 0x00720303,
+		0x81C, 0x00740303,
+		0x81C, 0x00760303,
+		0x81C, 0x00780303,
+		0x81C, 0x007A0303,
+		0x81C, 0x007C0303,
+		0x81C, 0x007E0303,
+	0x9000000d,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFB000303,
+		0x81C, 0xFA020303,
+		0x81C, 0xF9040303,
+		0x81C, 0xF8060303,
+		0x81C, 0xF7080303,
+		0x81C, 0xF60A0303,
+		0x81C, 0xF50C0303,
+		0x81C, 0xF40E0303,
+		0x81C, 0xF3100303,
+		0x81C, 0xF2120303,
+		0x81C, 0xF1140303,
+		0x81C, 0xEF160303,
+		0x81C, 0xEE180303,
+		0x81C, 0xED1A0303,
+		0x81C, 0xEC1C0303,
+		0x81C, 0xEB1E0303,
+		0x81C, 0xEA200303,
+		0x81C, 0xE9220303,
+		0x81C, 0xE8240303,
+		0x81C, 0xE7260303,
+		0x81C, 0xE6280303,
+		0x81C, 0xE52A0303,
+		0x81C, 0xE42C0303,
+		0x81C, 0xE32E0303,
+		0x81C, 0xE2300303,
+		0x81C, 0xE1320303,
+		0x81C, 0xC6340303,
+		0x81C, 0xC5360303,
+		0x81C, 0xC4380303,
+		0x81C, 0xC33A0303,
+		0x81C, 0xA63C0303,
+		0x81C, 0xA53E0303,
+		0x81C, 0xA4400303,
+		0x81C, 0xA3420303,
+		0x81C, 0xA2440303,
+		0x81C, 0xA1460303,
+		0x81C, 0x83480303,
+		0x81C, 0x824A0303,
+		0x81C, 0x814C0303,
+		0x81C, 0x804E0303,
+		0x81C, 0x63500303,
+		0x81C, 0x62520303,
+		0x81C, 0x61540303,
+		0x81C, 0x42560303,
+		0x81C, 0x41580303,
+		0x81C, 0x405A0303,
+		0x81C, 0x225C0303,
+		0x81C, 0x215E0303,
+		0x81C, 0x20600303,
+		0x81C, 0x04620303,
+		0x81C, 0x03640303,
+		0x81C, 0x02660303,
+		0x81C, 0x01680303,
+		0x81C, 0x006A0303,
+		0x81C, 0x006C0303,
+		0x81C, 0x006E0303,
+		0x81C, 0x00700303,
+		0x81C, 0x00720303,
+		0x81C, 0x00740303,
+		0x81C, 0x00760303,
+		0x81C, 0x00780303,
+		0x81C, 0x007A0303,
+		0x81C, 0x007C0303,
+		0x81C, 0x007E0303,
+	0x9000000e,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFB000303,
+		0x81C, 0xFA020303,
+		0x81C, 0xF9040303,
+		0x81C, 0xF8060303,
+		0x81C, 0xF7080303,
+		0x81C, 0xF60A0303,
+		0x81C, 0xF50C0303,
+		0x81C, 0xF40E0303,
+		0x81C, 0xF3100303,
+		0x81C, 0xF2120303,
+		0x81C, 0xF1140303,
+		0x81C, 0xEF160303,
+		0x81C, 0xEE180303,
+		0x81C, 0xED1A0303,
+		0x81C, 0xEC1C0303,
+		0x81C, 0xEB1E0303,
+		0x81C, 0xEA200303,
+		0x81C, 0xE9220303,
+		0x81C, 0xE8240303,
+		0x81C, 0xE7260303,
+		0x81C, 0xE6280303,
+		0x81C, 0xE52A0303,
+		0x81C, 0xE42C0303,
+		0x81C, 0xE32E0303,
+		0x81C, 0xE2300303,
+		0x81C, 0xE1320303,
+		0x81C, 0xC6340303,
+		0x81C, 0xC5360303,
+		0x81C, 0xC4380303,
+		0x81C, 0xC33A0303,
+		0x81C, 0xA63C0303,
+		0x81C, 0xA53E0303,
+		0x81C, 0xA4400303,
+		0x81C, 0xA3420303,
+		0x81C, 0xA2440303,
+		0x81C, 0xA1460303,
+		0x81C, 0x83480303,
+		0x81C, 0x824A0303,
+		0x81C, 0x814C0303,
+		0x81C, 0x804E0303,
+		0x81C, 0x63500303,
+		0x81C, 0x62520303,
+		0x81C, 0x61540303,
+		0x81C, 0x42560303,
+		0x81C, 0x41580303,
+		0x81C, 0x405A0303,
+		0x81C, 0x225C0303,
+		0x81C, 0x215E0303,
+		0x81C, 0x20600303,
+		0x81C, 0x04620303,
+		0x81C, 0x03640303,
+		0x81C, 0x02660303,
+		0x81C, 0x01680303,
 		0x81C, 0x006A0303,
 		0x81C, 0x006C0303,
 		0x81C, 0x006E0303,
@@ -2734,7 +4279,73 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007C0303,
 		0x81C, 0x007E0303,
 	0xB0000000,	0x00000000,
-	0x8000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x80000000,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFF000403,
+		0x81C, 0xFF000403,
+		0x81C, 0xFF020403,
+		0x81C, 0xFE040403,
+		0x81C, 0xFD060403,
+		0x81C, 0xFC080403,
+		0x81C, 0xFB0A0403,
+		0x81C, 0xFA0C0403,
+		0x81C, 0xF90E0403,
+		0x81C, 0xF8100403,
+		0x81C, 0xF7120403,
+		0x81C, 0xF6140403,
+		0x81C, 0xF5160403,
+		0x81C, 0xF4180403,
+		0x81C, 0xF31A0403,
+		0x81C, 0xF21C0403,
+		0x81C, 0xD51E0403,
+		0x81C, 0xD4200403,
+		0x81C, 0xD3220403,
+		0x81C, 0xD2240403,
+		0x81C, 0xB6260403,
+		0x81C, 0xB5280403,
+		0x81C, 0xB42A0403,
+		0x81C, 0xB32C0403,
+		0x81C, 0xB22E0403,
+		0x81C, 0xB1300403,
+		0x81C, 0xB0320403,
+		0x81C, 0xAF340403,
+		0x81C, 0xAE360403,
+		0x81C, 0xAD380403,
+		0x81C, 0xAC3A0403,
+		0x81C, 0xAB3C0403,
+		0x81C, 0xAA3E0403,
+		0x81C, 0xA9400403,
+		0x81C, 0xA8420403,
+		0x81C, 0xA7440403,
+		0x81C, 0xA6460403,
+		0x81C, 0xA5480403,
+		0x81C, 0xA44A0403,
+		0x81C, 0xA34C0403,
+		0x81C, 0x854E0403,
+		0x81C, 0x84500403,
+		0x81C, 0x83520403,
+		0x81C, 0x82540403,
+		0x81C, 0x81560403,
+		0x81C, 0x80580403,
+		0x81C, 0x485A0403,
+		0x81C, 0x475C0403,
+		0x81C, 0x465E0403,
+		0x81C, 0x45600403,
+		0x81C, 0x44620403,
+		0x81C, 0x0A640403,
+		0x81C, 0x09660403,
+		0x81C, 0x08680403,
+		0x81C, 0x076A0403,
+		0x81C, 0x066C0403,
+		0x81C, 0x056E0403,
+		0x81C, 0x04700403,
+		0x81C, 0x03720403,
+		0x81C, 0x02740403,
+		0x81C, 0x01760403,
+		0x81C, 0x00780403,
+		0x81C, 0x007A0403,
+		0x81C, 0x007C0403,
+		0x81C, 0x007E0403,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFF000403,
 		0x81C, 0xF5000403,
 		0x81C, 0xF4020403,
@@ -2800,60 +4411,192 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0403,
 		0x81C, 0x007C0403,
 		0x81C, 0x007E0403,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFF000403,
-		0x81C, 0xF5000403,
-		0x81C, 0xF4020403,
-		0x81C, 0xF3040403,
-		0x81C, 0xF2060403,
-		0x81C, 0xF1080403,
-		0x81C, 0xF00A0403,
-		0x81C, 0xEF0C0403,
-		0x81C, 0xEE0E0403,
-		0x81C, 0xED100403,
-		0x81C, 0xEC120403,
-		0x81C, 0xEB140403,
-		0x81C, 0xEA160403,
-		0x81C, 0xE9180403,
-		0x81C, 0xE81A0403,
-		0x81C, 0xE71C0403,
-		0x81C, 0xE61E0403,
-		0x81C, 0xE5200403,
-		0x81C, 0xE4220403,
-		0x81C, 0xE3240403,
-		0x81C, 0xE2260403,
-		0x81C, 0xE1280403,
-		0x81C, 0xE02A0403,
-		0x81C, 0xC32C0403,
-		0x81C, 0xC22E0403,
-		0x81C, 0xC1300403,
-		0x81C, 0xC0320403,
-		0x81C, 0xA4340403,
-		0x81C, 0xA3360403,
-		0x81C, 0xA2380403,
-		0x81C, 0xA13A0403,
-		0x81C, 0xA03C0403,
-		0x81C, 0x823E0403,
-		0x81C, 0x81400403,
-		0x81C, 0x80420403,
-		0x81C, 0x64440403,
-		0x81C, 0x63460403,
-		0x81C, 0x62480403,
-		0x81C, 0x614A0403,
-		0x81C, 0x604C0403,
-		0x81C, 0x454E0403,
-		0x81C, 0x44500403,
-		0x81C, 0x43520403,
-		0x81C, 0x42540403,
-		0x81C, 0x41560403,
-		0x81C, 0x40580403,
-		0x81C, 0x055A0403,
-		0x81C, 0x045C0403,
-		0x81C, 0x035E0403,
-		0x81C, 0x02600403,
-		0x81C, 0x01620403,
-		0x81C, 0x00640403,
-		0x81C, 0x00660403,
+		0x81C, 0xFF000403,
+		0x81C, 0xFF020403,
+		0x81C, 0xFE040403,
+		0x81C, 0xFD060403,
+		0x81C, 0xFC080403,
+		0x81C, 0xFB0A0403,
+		0x81C, 0xFA0C0403,
+		0x81C, 0xF90E0403,
+		0x81C, 0xF8100403,
+		0x81C, 0xF7120403,
+		0x81C, 0xF6140403,
+		0x81C, 0xF5160403,
+		0x81C, 0xF4180403,
+		0x81C, 0xF31A0403,
+		0x81C, 0xF21C0403,
+		0x81C, 0xD51E0403,
+		0x81C, 0xD4200403,
+		0x81C, 0xD3220403,
+		0x81C, 0xD2240403,
+		0x81C, 0xB6260403,
+		0x81C, 0xB5280403,
+		0x81C, 0xB42A0403,
+		0x81C, 0xB32C0403,
+		0x81C, 0xB22E0403,
+		0x81C, 0xB1300403,
+		0x81C, 0xB0320403,
+		0x81C, 0xAF340403,
+		0x81C, 0xAE360403,
+		0x81C, 0xAD380403,
+		0x81C, 0xAC3A0403,
+		0x81C, 0xAB3C0403,
+		0x81C, 0xAA3E0403,
+		0x81C, 0xA9400403,
+		0x81C, 0xA8420403,
+		0x81C, 0xA7440403,
+		0x81C, 0xA6460403,
+		0x81C, 0xA5480403,
+		0x81C, 0xA44A0403,
+		0x81C, 0xA34C0403,
+		0x81C, 0x854E0403,
+		0x81C, 0x84500403,
+		0x81C, 0x83520403,
+		0x81C, 0x82540403,
+		0x81C, 0x81560403,
+		0x81C, 0x80580403,
+		0x81C, 0x485A0403,
+		0x81C, 0x475C0403,
+		0x81C, 0x465E0403,
+		0x81C, 0x45600403,
+		0x81C, 0x44620403,
+		0x81C, 0x0A640403,
+		0x81C, 0x09660403,
+		0x81C, 0x08680403,
+		0x81C, 0x076A0403,
+		0x81C, 0x066C0403,
+		0x81C, 0x056E0403,
+		0x81C, 0x04700403,
+		0x81C, 0x03720403,
+		0x81C, 0x02740403,
+		0x81C, 0x01760403,
+		0x81C, 0x00780403,
+		0x81C, 0x007A0403,
+		0x81C, 0x007C0403,
+		0x81C, 0x007E0403,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFF000403,
+		0x81C, 0xFF000403,
+		0x81C, 0xFF020403,
+		0x81C, 0xFE040403,
+		0x81C, 0xFD060403,
+		0x81C, 0xFC080403,
+		0x81C, 0xFB0A0403,
+		0x81C, 0xFA0C0403,
+		0x81C, 0xF90E0403,
+		0x81C, 0xF8100403,
+		0x81C, 0xF7120403,
+		0x81C, 0xF6140403,
+		0x81C, 0xF5160403,
+		0x81C, 0xF4180403,
+		0x81C, 0xF31A0403,
+		0x81C, 0xF21C0403,
+		0x81C, 0xD51E0403,
+		0x81C, 0xD4200403,
+		0x81C, 0xD3220403,
+		0x81C, 0xD2240403,
+		0x81C, 0xB6260403,
+		0x81C, 0xB5280403,
+		0x81C, 0xB42A0403,
+		0x81C, 0xB32C0403,
+		0x81C, 0xB22E0403,
+		0x81C, 0xB1300403,
+		0x81C, 0xB0320403,
+		0x81C, 0xAF340403,
+		0x81C, 0xAE360403,
+		0x81C, 0xAD380403,
+		0x81C, 0xAC3A0403,
+		0x81C, 0xAB3C0403,
+		0x81C, 0xAA3E0403,
+		0x81C, 0xA9400403,
+		0x81C, 0xA8420403,
+		0x81C, 0xA7440403,
+		0x81C, 0xA6460403,
+		0x81C, 0xA5480403,
+		0x81C, 0xA44A0403,
+		0x81C, 0xA34C0403,
+		0x81C, 0x854E0403,
+		0x81C, 0x84500403,
+		0x81C, 0x83520403,
+		0x81C, 0x82540403,
+		0x81C, 0x81560403,
+		0x81C, 0x80580403,
+		0x81C, 0x485A0403,
+		0x81C, 0x475C0403,
+		0x81C, 0x465E0403,
+		0x81C, 0x45600403,
+		0x81C, 0x44620403,
+		0x81C, 0x0A640403,
+		0x81C, 0x09660403,
+		0x81C, 0x08680403,
+		0x81C, 0x076A0403,
+		0x81C, 0x066C0403,
+		0x81C, 0x056E0403,
+		0x81C, 0x04700403,
+		0x81C, 0x03720403,
+		0x81C, 0x02740403,
+		0x81C, 0x01760403,
+		0x81C, 0x00780403,
+		0x81C, 0x007A0403,
+		0x81C, 0x007C0403,
+		0x81C, 0x007E0403,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFF000403,
+		0x81C, 0xF6000403,
+		0x81C, 0xF5020403,
+		0x81C, 0xF4040403,
+		0x81C, 0xF3060403,
+		0x81C, 0xF2080403,
+		0x81C, 0xF10A0403,
+		0x81C, 0xF00C0403,
+		0x81C, 0xEF0E0403,
+		0x81C, 0xD6100403,
+		0x81C, 0xD5120403,
+		0x81C, 0xD4140403,
+		0x81C, 0xD3160403,
+		0x81C, 0xD2180403,
+		0x81C, 0xD11A0403,
+		0x81C, 0xD01C0403,
+		0x81C, 0xCF1E0403,
+		0x81C, 0x95200403,
+		0x81C, 0x94220403,
+		0x81C, 0x93240403,
+		0x81C, 0x92260403,
+		0x81C, 0x91280403,
+		0x81C, 0x902A0403,
+		0x81C, 0x8F2C0403,
+		0x81C, 0x8E2E0403,
+		0x81C, 0x8D300403,
+		0x81C, 0x8C320403,
+		0x81C, 0x8B340403,
+		0x81C, 0x8A360403,
+		0x81C, 0x89380403,
+		0x81C, 0x883A0403,
+		0x81C, 0x873C0403,
+		0x81C, 0x863E0403,
+		0x81C, 0x68400403,
+		0x81C, 0x67420403,
+		0x81C, 0x66440403,
+		0x81C, 0x65460403,
+		0x81C, 0x64480403,
+		0x81C, 0x634A0403,
+		0x81C, 0x484C0403,
+		0x81C, 0x474E0403,
+		0x81C, 0x46500403,
+		0x81C, 0x45520403,
+		0x81C, 0x44540403,
+		0x81C, 0x27560403,
+		0x81C, 0x26580403,
+		0x81C, 0x255A0403,
+		0x81C, 0x245C0403,
+		0x81C, 0x235E0403,
+		0x81C, 0x04600403,
+		0x81C, 0x03620403,
+		0x81C, 0x02640403,
+		0x81C, 0x01660403,
 		0x81C, 0x00680403,
 		0x81C, 0x006A0403,
 		0x81C, 0x006C0403,
@@ -2866,7 +4609,73 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0403,
 		0x81C, 0x007C0403,
 		0x81C, 0x007E0403,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFF000403,
+		0x81C, 0xFF000403,
+		0x81C, 0xFF020403,
+		0x81C, 0xFE040403,
+		0x81C, 0xFD060403,
+		0x81C, 0xFC080403,
+		0x81C, 0xFB0A0403,
+		0x81C, 0xFA0C0403,
+		0x81C, 0xF90E0403,
+		0x81C, 0xF8100403,
+		0x81C, 0xF7120403,
+		0x81C, 0xF6140403,
+		0x81C, 0xF5160403,
+		0x81C, 0xF4180403,
+		0x81C, 0xF31A0403,
+		0x81C, 0xF21C0403,
+		0x81C, 0xD51E0403,
+		0x81C, 0xD4200403,
+		0x81C, 0xD3220403,
+		0x81C, 0xD2240403,
+		0x81C, 0xB6260403,
+		0x81C, 0xB5280403,
+		0x81C, 0xB42A0403,
+		0x81C, 0xB32C0403,
+		0x81C, 0xB22E0403,
+		0x81C, 0xB1300403,
+		0x81C, 0xB0320403,
+		0x81C, 0xAF340403,
+		0x81C, 0xAE360403,
+		0x81C, 0xAD380403,
+		0x81C, 0xAC3A0403,
+		0x81C, 0xAB3C0403,
+		0x81C, 0xAA3E0403,
+		0x81C, 0xA9400403,
+		0x81C, 0xA8420403,
+		0x81C, 0xA7440403,
+		0x81C, 0xA6460403,
+		0x81C, 0xA5480403,
+		0x81C, 0xA44A0403,
+		0x81C, 0xA34C0403,
+		0x81C, 0x854E0403,
+		0x81C, 0x84500403,
+		0x81C, 0x83520403,
+		0x81C, 0x82540403,
+		0x81C, 0x81560403,
+		0x81C, 0x80580403,
+		0x81C, 0x485A0403,
+		0x81C, 0x475C0403,
+		0x81C, 0x465E0403,
+		0x81C, 0x45600403,
+		0x81C, 0x44620403,
+		0x81C, 0x0A640403,
+		0x81C, 0x09660403,
+		0x81C, 0x08680403,
+		0x81C, 0x076A0403,
+		0x81C, 0x066C0403,
+		0x81C, 0x056E0403,
+		0x81C, 0x04700403,
+		0x81C, 0x03720403,
+		0x81C, 0x02740403,
+		0x81C, 0x01760403,
+		0x81C, 0x00780403,
+		0x81C, 0x007A0403,
+		0x81C, 0x007C0403,
+		0x81C, 0x007E0403,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFF000403,
 		0x81C, 0xF5000403,
 		0x81C, 0xF4020403,
@@ -2932,7 +4741,7 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0403,
 		0x81C, 0x007C0403,
 		0x81C, 0x007E0403,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFF000403,
 		0x81C, 0xF5000403,
 		0x81C, 0xF4020403,
@@ -2998,7 +4807,7 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0403,
 		0x81C, 0x007C0403,
 		0x81C, 0x007E0403,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x90000008,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFF000403,
 		0x81C, 0xFF000403,
 		0x81C, 0xFF020403,
@@ -3064,7 +4873,73 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0403,
 		0x81C, 0x007C0403,
 		0x81C, 0x007E0403,
-	0x90012100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000009,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFF000403,
+		0x81C, 0xF5000403,
+		0x81C, 0xF4020403,
+		0x81C, 0xF3040403,
+		0x81C, 0xF2060403,
+		0x81C, 0xF1080403,
+		0x81C, 0xF00A0403,
+		0x81C, 0xEF0C0403,
+		0x81C, 0xEE0E0403,
+		0x81C, 0xED100403,
+		0x81C, 0xEC120403,
+		0x81C, 0xEB140403,
+		0x81C, 0xEA160403,
+		0x81C, 0xE9180403,
+		0x81C, 0xE81A0403,
+		0x81C, 0xE71C0403,
+		0x81C, 0xE61E0403,
+		0x81C, 0xE5200403,
+		0x81C, 0xE4220403,
+		0x81C, 0xE3240403,
+		0x81C, 0xE2260403,
+		0x81C, 0xE1280403,
+		0x81C, 0xE02A0403,
+		0x81C, 0xC32C0403,
+		0x81C, 0xC22E0403,
+		0x81C, 0xC1300403,
+		0x81C, 0xC0320403,
+		0x81C, 0xA4340403,
+		0x81C, 0xA3360403,
+		0x81C, 0xA2380403,
+		0x81C, 0xA13A0403,
+		0x81C, 0xA03C0403,
+		0x81C, 0x823E0403,
+		0x81C, 0x81400403,
+		0x81C, 0x80420403,
+		0x81C, 0x64440403,
+		0x81C, 0x63460403,
+		0x81C, 0x62480403,
+		0x81C, 0x614A0403,
+		0x81C, 0x604C0403,
+		0x81C, 0x454E0403,
+		0x81C, 0x44500403,
+		0x81C, 0x43520403,
+		0x81C, 0x42540403,
+		0x81C, 0x41560403,
+		0x81C, 0x40580403,
+		0x81C, 0x055A0403,
+		0x81C, 0x045C0403,
+		0x81C, 0x035E0403,
+		0x81C, 0x02600403,
+		0x81C, 0x01620403,
+		0x81C, 0x00640403,
+		0x81C, 0x00660403,
+		0x81C, 0x00680403,
+		0x81C, 0x006A0403,
+		0x81C, 0x006C0403,
+		0x81C, 0x006E0403,
+		0x81C, 0x00700403,
+		0x81C, 0x00720403,
+		0x81C, 0x00740403,
+		0x81C, 0x00760403,
+		0x81C, 0x00780403,
+		0x81C, 0x007A0403,
+		0x81C, 0x007C0403,
+		0x81C, 0x007E0403,
+	0x9000000a,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFF000403,
 		0x81C, 0xFF000403,
 		0x81C, 0xFF020403,
@@ -3130,7 +5005,7 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0403,
 		0x81C, 0x007C0403,
 		0x81C, 0x007E0403,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x9000000b,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFF000403,
 		0x81C, 0xF5000403,
 		0x81C, 0xF4020403,
@@ -3196,7 +5071,73 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0403,
 		0x81C, 0x007C0403,
 		0x81C, 0x007E0403,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+	0x9000000c,	0x00000000,	0x40000000,	0x00000000,
+		0x81C, 0xFF000403,
+		0x81C, 0xFF000403,
+		0x81C, 0xFF020403,
+		0x81C, 0xFE040403,
+		0x81C, 0xFD060403,
+		0x81C, 0xFC080403,
+		0x81C, 0xFB0A0403,
+		0x81C, 0xFA0C0403,
+		0x81C, 0xF90E0403,
+		0x81C, 0xF8100403,
+		0x81C, 0xF7120403,
+		0x81C, 0xF6140403,
+		0x81C, 0xF5160403,
+		0x81C, 0xF4180403,
+		0x81C, 0xF31A0403,
+		0x81C, 0xF21C0403,
+		0x81C, 0xD51E0403,
+		0x81C, 0xD4200403,
+		0x81C, 0xD3220403,
+		0x81C, 0xD2240403,
+		0x81C, 0xB6260403,
+		0x81C, 0xB5280403,
+		0x81C, 0xB42A0403,
+		0x81C, 0xB32C0403,
+		0x81C, 0xB22E0403,
+		0x81C, 0xB1300403,
+		0x81C, 0xB0320403,
+		0x81C, 0xAF340403,
+		0x81C, 0xAE360403,
+		0x81C, 0xAD380403,
+		0x81C, 0xAC3A0403,
+		0x81C, 0xAB3C0403,
+		0x81C, 0xAA3E0403,
+		0x81C, 0xA9400403,
+		0x81C, 0xA8420403,
+		0x81C, 0xA7440403,
+		0x81C, 0xA6460403,
+		0x81C, 0xA5480403,
+		0x81C, 0xA44A0403,
+		0x81C, 0xA34C0403,
+		0x81C, 0x854E0403,
+		0x81C, 0x84500403,
+		0x81C, 0x83520403,
+		0x81C, 0x82540403,
+		0x81C, 0x81560403,
+		0x81C, 0x80580403,
+		0x81C, 0x485A0403,
+		0x81C, 0x475C0403,
+		0x81C, 0x465E0403,
+		0x81C, 0x45600403,
+		0x81C, 0x44620403,
+		0x81C, 0x0A640403,
+		0x81C, 0x09660403,
+		0x81C, 0x08680403,
+		0x81C, 0x076A0403,
+		0x81C, 0x066C0403,
+		0x81C, 0x056E0403,
+		0x81C, 0x04700403,
+		0x81C, 0x03720403,
+		0x81C, 0x02740403,
+		0x81C, 0x01760403,
+		0x81C, 0x00780403,
+		0x81C, 0x007A0403,
+		0x81C, 0x007C0403,
+		0x81C, 0x007E0403,
+	0x9000000d,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFF000403,
 		0x81C, 0xFF000403,
 		0x81C, 0xFF020403,
@@ -3262,7 +5203,7 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007A0403,
 		0x81C, 0x007C0403,
 		0x81C, 0x007E0403,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x9000000e,	0x00000000,	0x40000000,	0x00000000,
 		0x81C, 0xFF000403,
 		0x81C, 0xFF000403,
 		0x81C, 0xFF020403,
@@ -3395,10 +5336,27 @@ u32 array_mp_8822b_agc_tab[] = {
 		0x81C, 0x007C0403,
 		0x81C, 0x007E0403,
 	0xB0000000,	0x00000000,
+	0x80000000,	0x00000000,	0x40000000,	0x00000000,
+		0xC50, 0x00000022,
+		0xC50, 0x00000020,
+		0xE50, 0x00000022,
+		0xE50, 0x00000020,
+	0x9000000d,	0x00000000,	0x40000000,	0x00000000,
 		0xC50, 0x00000022,
 		0xC50, 0x00000020,
 		0xE50, 0x00000022,
 		0xE50, 0x00000020,
+	0x9000000e,	0x00000000,	0x40000000,	0x00000000,
+		0xC50, 0x00000022,
+		0xC50, 0x00000020,
+		0xE50, 0x00000022,
+		0xE50, 0x00000020,
+	0xA0000000,	0x00000000,
+		0xC50, 0x00000022,
+		0xC50, 0x00000020,
+		0xE50, 0x00000022,
+		0xE50, 0x00000020,
+	0xB0000000,	0x00000000,
 
 };
 
@@ -3409,7 +5367,7 @@ odm_read_and_config_mp_8822b_agc_tab(
 {
 	u32	i = 0;
 	u8	c_cond;
-	bool	is_matched = true, is_skipped = false;
+	boolean	is_matched = true, is_skipped = false;
 	u32	array_len = sizeof(array_mp_8822b_agc_tab)/sizeof(u32);
 	u32	*array = array_mp_8822b_agc_tab;
 
@@ -3459,7 +5417,7 @@ odm_read_and_config_mp_8822b_agc_tab(
 u32
 odm_get_version_mp_8822b_agc_tab(void)
 {
-		return 63;
+		return 85;
 }
 
 /******************************************************************************
@@ -3471,7 +5429,7 @@ u32 array_mp_8822b_phy_reg[] = {
 		0x804, 0x800181A0,
 		0x808, 0x0E028233,
 		0x80C, 0x10000013,
-		0x810, 0x21101263,
+		0x810, 0x21101243,
 		0x814, 0x020C3D10,
 		0x818, 0x84A10385,
 		0x81C, 0x1E1E081F,
@@ -3482,9 +5440,9 @@ u32 array_mp_8822b_phy_reg[] = {
 		0x830, 0x79A0EA2A,
 		0x834, 0x072E6986,
 		0x838, 0x87766441,
-		0x83C, 0x9194B2B6,
-		0x840, 0x171740E0,
-		0x844, 0x4D3D7CDB,
+		0x83C, 0x9194B2B7,
+		0x840, 0x171750E0,
+		0x844, 0x4C3D7CDB,
 		0x848, 0x4AD0408B,
 		0x84C, 0x6AFBF7A5,
 		0x850, 0x28A74706,
@@ -3494,8 +5452,8 @@ u32 array_mp_8822b_phy_reg[] = {
 		0x860, 0x68A7C321,
 		0x864, 0x79F27432,
 		0x868, 0x8CA7A314,
-		0x86C, 0xAA8C2878,
-		0x870, 0xAAAAAAAA,
+		0x86C, 0x778C2878,
+		0x870, 0x77777777,
 		0x874, 0x27612C2E,
 		0x878, 0xC0003152,
 		0x87C, 0x5C8FC000,
@@ -3518,13 +5476,13 @@ u32 array_mp_8822b_phy_reg[] = {
 		0x8C0, 0xFFE04020,
 		0x8C4, 0x47C00000,
 		0x8C8, 0x000251A5,
-		0x8CC, 0x08108000,
+		0x8CC, 0x08108492,
 		0x8D0, 0x0000B800,
 		0x8D4, 0x860308A0,
-		0x8D8, 0x21095612,
+		0x8D8, 0x29095612,
 		0x8DC, 0x00000000,
 		0x8E0, 0x32D16777,
-		0x8E4, 0x49092935,
+		0x8E4, 0x4C098935,
 		0x8E8, 0xFFFFC42C,
 		0x8EC, 0x99999999,
 		0x8F0, 0x00009999,
@@ -3566,7 +5524,7 @@ u32 array_mp_8822b_phy_reg[] = {
 		0x980, 0x00000000,
 		0x984, 0x00000000,
 		0x988, 0x00000000,
-		0x98C, 0x23440000,
+		0x98C, 0x43440000,
 		0x990, 0x27100000,
 		0x994, 0xFFFF0100,
 		0x998, 0xFFFFFF5C,
@@ -3659,7 +5617,7 @@ u32 array_mp_8822b_phy_reg[] = {
 		0xB88, 0x00000000,
 		0xB8C, 0x00000000,
 		0xC00, 0x00000007,
-		0xC04, 0x00000020,
+		0xC04, 0x00240020,
 		0xC08, 0x60403231,
 		0xC0C, 0x00012345,
 		0xC10, 0x00000100,
@@ -3716,7 +5674,7 @@ u32 array_mp_8822b_phy_reg[] = {
 		0xCE8, 0x00000000,
 		0xCEC, 0x00000000,
 		0xE00, 0x00000007,
-		0xE04, 0x00000020,
+		0xE04, 0x00240020,
 		0xE08, 0x60403231,
 		0xE0C, 0x00012345,
 		0xE10, 0x00000100,
@@ -3959,7 +5917,7 @@ u32 array_mp_8822b_phy_reg[] = {
 		0x1B04, 0xE24629D2,
 		0x1B08, 0x00000080,
 		0x1B0C, 0x00000000,
-		0x1B10, 0x00010C00,
+		0x1B10, 0x00011C00,
 		0x1B14, 0x00000000,
 		0x1B18, 0x00292903,
 		0x1B1C, 0xA2193C32,
@@ -4031,16 +5989,16 @@ u32 array_mp_8822b_phy_reg[] = {
 		0x1B80, 0x85030157,
 		0x1B80, 0x40090165,
 		0x1B80, 0x40090167,
-		0x1B80, 0xE0210175,
-		0x1B80, 0xE0210177,
+		0x1B80, 0xE0280175,
+		0x1B80, 0xE0280177,
 		0x1B80, 0x4B050185,
 		0x1B80, 0x4B050187,
 		0x1B80, 0x86030195,
 		0x1B80, 0x86030197,
 		0x1B80, 0x400B01A5,
 		0x1B80, 0x400B01A7,
-		0x1B80, 0xE02101B5,
-		0x1B80, 0xE02101B7,
+		0x1B80, 0xE02801B5,
+		0x1B80, 0xE02801B7,
 		0x1B80, 0x4B0001C5,
 		0x1B80, 0x4B0001C7,
 		0x1B80, 0x000701D5,
@@ -4049,716 +6007,914 @@ u32 array_mp_8822b_phy_reg[] = {
 		0x1B80, 0x4C0001E7,
 		0x1B80, 0x000401F5,
 		0x1B80, 0x000401F7,
-		0x1B80, 0x30000205,
-		0x1B80, 0x30000207,
-		0x1B80, 0xFE000215,
-		0x1B80, 0xFE000217,
-		0x1B80, 0xFF000225,
-		0x1B80, 0xFF000227,
-		0x1B80, 0xE1750235,
-		0x1B80, 0xE1750237,
-		0x1B80, 0xF00D0245,
-		0x1B80, 0xF00D0247,
-		0x1B80, 0xF10D0255,
-		0x1B80, 0xF10D0257,
-		0x1B80, 0xF20D0265,
-		0x1B80, 0xF20D0267,
-		0x1B80, 0xF30D0275,
-		0x1B80, 0xF30D0277,
-		0x1B80, 0xF40D0285,
-		0x1B80, 0xF40D0287,
-		0x1B80, 0xF50D0295,
-		0x1B80, 0xF50D0297,
-		0x1B80, 0xF60D02A5,
-		0x1B80, 0xF60D02A7,
-		0x1B80, 0xF70D02B5,
-		0x1B80, 0xF70D02B7,
-		0x1B80, 0xF80D02C5,
-		0x1B80, 0xF80D02C7,
-		0x1B80, 0xF90D02D5,
-		0x1B80, 0xF90D02D7,
-		0x1B80, 0xFA0D02E5,
-		0x1B80, 0xFA0D02E7,
-		0x1B80, 0xFB0D02F5,
-		0x1B80, 0xFB0D02F7,
-		0x1B80, 0x00010305,
-		0x1B80, 0x00010307,
-		0x1B80, 0x303D0315,
-		0x1B80, 0x303D0317,
-		0x1B80, 0x30550325,
-		0x1B80, 0x30550327,
-		0x1B80, 0x30A00335,
-		0x1B80, 0x30A00337,
-		0x1B80, 0x30A30345,
-		0x1B80, 0x30A30347,
-		0x1B80, 0x30570355,
-		0x1B80, 0x30570357,
-		0x1B80, 0x30620365,
-		0x1B80, 0x30620367,
-		0x1B80, 0x306D0375,
-		0x1B80, 0x306D0377,
-		0x1B80, 0x30AD0385,
-		0x1B80, 0x30AD0387,
-		0x1B80, 0x30A70395,
-		0x1B80, 0x30A70397,
-		0x1B80, 0x30BB03A5,
-		0x1B80, 0x30BB03A7,
-		0x1B80, 0x30C603B5,
-		0x1B80, 0x30C603B7,
-		0x1B80, 0x30D103C5,
-		0x1B80, 0x30D103C7,
-		0x1B80, 0xE11403D5,
-		0x1B80, 0xE11403D7,
-		0x1B80, 0x4D0403E5,
-		0x1B80, 0x4D0403E7,
-		0x1B80, 0x208003F5,
-		0x1B80, 0x208003F7,
-		0x1B80, 0x00000405,
-		0x1B80, 0x00000407,
-		0x1B80, 0x4D000415,
-		0x1B80, 0x4D000417,
-		0x1B80, 0x55070425,
-		0x1B80, 0x55070427,
-		0x1B80, 0xE10C0435,
-		0x1B80, 0xE10C0437,
-		0x1B80, 0xE10C0445,
-		0x1B80, 0xE10C0447,
-		0x1B80, 0x4D040455,
-		0x1B80, 0x4D040457,
-		0x1B80, 0x20880465,
-		0x1B80, 0x20880467,
-		0x1B80, 0x02000475,
-		0x1B80, 0x02000477,
-		0x1B80, 0x4D000485,
-		0x1B80, 0x4D000487,
-		0x1B80, 0x550F0495,
-		0x1B80, 0x550F0497,
-		0x1B80, 0xE10C04A5,
-		0x1B80, 0xE10C04A7,
-		0x1B80, 0x4F0204B5,
-		0x1B80, 0x4F0204B7,
-		0x1B80, 0x4E0004C5,
-		0x1B80, 0x4E0004C7,
-		0x1B80, 0x530204D5,
-		0x1B80, 0x530204D7,
-		0x1B80, 0x520104E5,
-		0x1B80, 0x520104E7,
-		0x1B80, 0xE11004F5,
-		0x1B80, 0xE11004F7,
-		0x1B80, 0x4D080505,
-		0x1B80, 0x4D080507,
-		0x1B80, 0x57100515,
-		0x1B80, 0x57100517,
-		0x1B80, 0x57000525,
-		0x1B80, 0x57000527,
-		0x1B80, 0x4D000535,
-		0x1B80, 0x4D000537,
-		0x1B80, 0x00010545,
-		0x1B80, 0x00010547,
-		0x1B80, 0xE1140555,
-		0x1B80, 0xE1140557,
-		0x1B80, 0x00010565,
-		0x1B80, 0x00010567,
-		0x1B80, 0x30770575,
-		0x1B80, 0x30770577,
-		0x1B80, 0x00230585,
-		0x1B80, 0x00230587,
-		0x1B80, 0xE1680595,
-		0x1B80, 0xE1680597,
-		0x1B80, 0x000205A5,
-		0x1B80, 0x000205A7,
-		0x1B80, 0x54E905B5,
-		0x1B80, 0x54E905B7,
-		0x1B80, 0x0BA605C5,
-		0x1B80, 0x0BA605C7,
-		0x1B80, 0x002305D5,
-		0x1B80, 0x002305D7,
-		0x1B80, 0xE16805E5,
-		0x1B80, 0xE16805E7,
-		0x1B80, 0x000205F5,
-		0x1B80, 0x000205F7,
-		0x1B80, 0x4D300605,
-		0x1B80, 0x4D300607,
-		0x1B80, 0x30900615,
-		0x1B80, 0x30900617,
-		0x1B80, 0x30730625,
-		0x1B80, 0x30730627,
-		0x1B80, 0x00220635,
-		0x1B80, 0x00220637,
-		0x1B80, 0xE1680645,
-		0x1B80, 0xE1680647,
-		0x1B80, 0x00020655,
-		0x1B80, 0x00020657,
-		0x1B80, 0x54E80665,
-		0x1B80, 0x54E80667,
-		0x1B80, 0x0BA60675,
-		0x1B80, 0x0BA60677,
-		0x1B80, 0x00220685,
-		0x1B80, 0x00220687,
-		0x1B80, 0xE1680695,
-		0x1B80, 0xE1680697,
-		0x1B80, 0x000206A5,
-		0x1B80, 0x000206A7,
-		0x1B80, 0x4D3006B5,
-		0x1B80, 0x4D3006B7,
-		0x1B80, 0x309006C5,
-		0x1B80, 0x309006C7,
-		0x1B80, 0x63F106D5,
-		0x1B80, 0x63F106D7,
-		0x1B80, 0xE11406E5,
-		0x1B80, 0xE11406E7,
-		0x1B80, 0xE16806F5,
-		0x1B80, 0xE16806F7,
-		0x1B80, 0x63F40705,
-		0x1B80, 0x63F40707,
-		0x1B80, 0xE1140715,
-		0x1B80, 0xE1140717,
-		0x1B80, 0xE1680725,
-		0x1B80, 0xE1680727,
-		0x1B80, 0x0BA80735,
-		0x1B80, 0x0BA80737,
-		0x1B80, 0x63F80745,
-		0x1B80, 0x63F80747,
-		0x1B80, 0xE1140755,
-		0x1B80, 0xE1140757,
-		0x1B80, 0xE1680765,
-		0x1B80, 0xE1680767,
-		0x1B80, 0x0BA90775,
-		0x1B80, 0x0BA90777,
-		0x1B80, 0x63FC0785,
-		0x1B80, 0x63FC0787,
-		0x1B80, 0xE1140795,
-		0x1B80, 0xE1140797,
-		0x1B80, 0xE16807A5,
-		0x1B80, 0xE16807A7,
-		0x1B80, 0x63FF07B5,
-		0x1B80, 0x63FF07B7,
-		0x1B80, 0xE11407C5,
-		0x1B80, 0xE11407C7,
-		0x1B80, 0xE16807D5,
-		0x1B80, 0xE16807D7,
-		0x1B80, 0x630007E5,
-		0x1B80, 0x630007E7,
-		0x1B80, 0xE11407F5,
-		0x1B80, 0xE11407F7,
-		0x1B80, 0xE1680805,
-		0x1B80, 0xE1680807,
-		0x1B80, 0x63030815,
-		0x1B80, 0x63030817,
-		0x1B80, 0xE1140825,
-		0x1B80, 0xE1140827,
-		0x1B80, 0xE1680835,
-		0x1B80, 0xE1680837,
-		0x1B80, 0xF4D40845,
-		0x1B80, 0xF4D40847,
-		0x1B80, 0x63070855,
-		0x1B80, 0x63070857,
-		0x1B80, 0xE1140865,
-		0x1B80, 0xE1140867,
-		0x1B80, 0xE1680875,
-		0x1B80, 0xE1680877,
-		0x1B80, 0xF5DB0885,
-		0x1B80, 0xF5DB0887,
-		0x1B80, 0x630B0895,
-		0x1B80, 0x630B0897,
-		0x1B80, 0xE11408A5,
-		0x1B80, 0xE11408A7,
-		0x1B80, 0xE16808B5,
-		0x1B80, 0xE16808B7,
-		0x1B80, 0x630E08C5,
-		0x1B80, 0x630E08C7,
-		0x1B80, 0xE11408D5,
-		0x1B80, 0xE11408D7,
-		0x1B80, 0xE16808E5,
-		0x1B80, 0xE16808E7,
-		0x1B80, 0x4D3008F5,
-		0x1B80, 0x4D3008F7,
-		0x1B80, 0x55010905,
-		0x1B80, 0x55010907,
-		0x1B80, 0x57040915,
-		0x1B80, 0x57040917,
-		0x1B80, 0x57000925,
-		0x1B80, 0x57000927,
-		0x1B80, 0x96000935,
-		0x1B80, 0x96000937,
-		0x1B80, 0x57080945,
-		0x1B80, 0x57080947,
-		0x1B80, 0x57000955,
-		0x1B80, 0x57000957,
-		0x1B80, 0x95000965,
-		0x1B80, 0x95000967,
-		0x1B80, 0x4D000975,
-		0x1B80, 0x4D000977,
-		0x1B80, 0x6C070985,
-		0x1B80, 0x6C070987,
-		0x1B80, 0x7B200995,
-		0x1B80, 0x7B200997,
-		0x1B80, 0x7A0009A5,
-		0x1B80, 0x7A0009A7,
-		0x1B80, 0x790009B5,
-		0x1B80, 0x790009B7,
-		0x1B80, 0x7F2009C5,
-		0x1B80, 0x7F2009C7,
-		0x1B80, 0x7E0009D5,
-		0x1B80, 0x7E0009D7,
-		0x1B80, 0x7D0009E5,
-		0x1B80, 0x7D0009E7,
-		0x1B80, 0x000109F5,
-		0x1B80, 0x000109F7,
-		0x1B80, 0x62850A05,
-		0x1B80, 0x62850A07,
-		0x1B80, 0xE1140A15,
-		0x1B80, 0xE1140A17,
-		0x1B80, 0x00010A25,
-		0x1B80, 0x00010A27,
-		0x1B80, 0x5C320A35,
-		0x1B80, 0x5C320A37,
-		0x1B80, 0xE1640A45,
-		0x1B80, 0xE1640A47,
-		0x1B80, 0xE1420A55,
-		0x1B80, 0xE1420A57,
-		0x1B80, 0x00010A65,
-		0x1B80, 0x00010A67,
-		0x1B80, 0x5C320A75,
-		0x1B80, 0x5C320A77,
-		0x1B80, 0x63F40A85,
-		0x1B80, 0x63F40A87,
-		0x1B80, 0x62850A95,
-		0x1B80, 0x62850A97,
-		0x1B80, 0x0BB00AA5,
-		0x1B80, 0x0BB00AA7,
-		0x1B80, 0xE1140AB5,
-		0x1B80, 0xE1140AB7,
-		0x1B80, 0xE1680AC5,
-		0x1B80, 0xE1680AC7,
-		0x1B80, 0x5C320AD5,
-		0x1B80, 0x5C320AD7,
-		0x1B80, 0x63FC0AE5,
-		0x1B80, 0x63FC0AE7,
-		0x1B80, 0x62850AF5,
-		0x1B80, 0x62850AF7,
-		0x1B80, 0x0BB10B05,
-		0x1B80, 0x0BB10B07,
-		0x1B80, 0xE1140B15,
-		0x1B80, 0xE1140B17,
-		0x1B80, 0xE1680B25,
-		0x1B80, 0xE1680B27,
-		0x1B80, 0x63030B35,
-		0x1B80, 0x63030B37,
-		0x1B80, 0xE1140B45,
-		0x1B80, 0xE1140B47,
-		0x1B80, 0xE1680B55,
-		0x1B80, 0xE1680B57,
-		0x1B80, 0xF7040B65,
-		0x1B80, 0xF7040B67,
-		0x1B80, 0x630B0B75,
-		0x1B80, 0x630B0B77,
-		0x1B80, 0xE1140B85,
-		0x1B80, 0xE1140B87,
-		0x1B80, 0xE1680B95,
-		0x1B80, 0xE1680B97,
+		0x1B80, 0x4D040205,
+		0x1B80, 0x4D040207,
+		0x1B80, 0x2EF00215,
+		0x1B80, 0x2EF00217,
+		0x1B80, 0x00000225,
+		0x1B80, 0x00000227,
+		0x1B80, 0x20810235,
+		0x1B80, 0x20810237,
+		0x1B80, 0x23450245,
+		0x1B80, 0x23450247,
+		0x1B80, 0x4D000255,
+		0x1B80, 0x4D000257,
+		0x1B80, 0x00040265,
+		0x1B80, 0x00040267,
+		0x1B80, 0x30000275,
+		0x1B80, 0x30000277,
+		0x1B80, 0xE1D80285,
+		0x1B80, 0xE1D80287,
+		0x1B80, 0xF0110295,
+		0x1B80, 0xF0110297,
+		0x1B80, 0xF11102A5,
+		0x1B80, 0xF11102A7,
+		0x1B80, 0xF21102B5,
+		0x1B80, 0xF21102B7,
+		0x1B80, 0xF31102C5,
+		0x1B80, 0xF31102C7,
+		0x1B80, 0xF41102D5,
+		0x1B80, 0xF41102D7,
+		0x1B80, 0xF51102E5,
+		0x1B80, 0xF51102E7,
+		0x1B80, 0xF61102F5,
+		0x1B80, 0xF61102F7,
+		0x1B80, 0xF7110305,
+		0x1B80, 0xF7110307,
+		0x1B80, 0xF8110315,
+		0x1B80, 0xF8110317,
+		0x1B80, 0xF9110325,
+		0x1B80, 0xF9110327,
+		0x1B80, 0xFA110335,
+		0x1B80, 0xFA110337,
+		0x1B80, 0xFB110345,
+		0x1B80, 0xFB110347,
+		0x1B80, 0xFC110355,
+		0x1B80, 0xFC110357,
+		0x1B80, 0xFD110365,
+		0x1B80, 0xFD110367,
+		0x1B80, 0xFE110375,
+		0x1B80, 0xFE110377,
+		0x1B80, 0xFF110385,
+		0x1B80, 0xFF110387,
+		0x1B80, 0x00010395,
+		0x1B80, 0x00010397,
+		0x1B80, 0x305103A5,
+		0x1B80, 0x305103A7,
+		0x1B80, 0x306903B5,
+		0x1B80, 0x306903B7,
+		0x1B80, 0x30B403C5,
+		0x1B80, 0x30B403C7,
+		0x1B80, 0x30B703D5,
+		0x1B80, 0x30B703D7,
+		0x1B80, 0x306B03E5,
+		0x1B80, 0x306B03E7,
+		0x1B80, 0x307603F5,
+		0x1B80, 0x307603F7,
+		0x1B80, 0x30810405,
+		0x1B80, 0x30810407,
+		0x1B80, 0x30C10415,
+		0x1B80, 0x30C10417,
+		0x1B80, 0x30BB0425,
+		0x1B80, 0x30BB0427,
+		0x1B80, 0x30CF0435,
+		0x1B80, 0x30CF0437,
+		0x1B80, 0x30DA0445,
+		0x1B80, 0x30DA0447,
+		0x1B80, 0x30E50455,
+		0x1B80, 0x30E50457,
+		0x1B80, 0x304A0465,
+		0x1B80, 0x304A0467,
+		0x1B80, 0x31140475,
+		0x1B80, 0x31140477,
+		0x1B80, 0x31250485,
+		0x1B80, 0x31250487,
+		0x1B80, 0x313A0495,
+		0x1B80, 0x313A0497,
+		0x1B80, 0x4D0404A5,
+		0x1B80, 0x4D0404A7,
+		0x1B80, 0x2EF004B5,
+		0x1B80, 0x2EF004B7,
+		0x1B80, 0x000004C5,
+		0x1B80, 0x000004C7,
+		0x1B80, 0x208104D5,
+		0x1B80, 0x208104D7,
+		0x1B80, 0xA3B504E5,
+		0x1B80, 0xA3B504E7,
+		0x1B80, 0x4D0004F5,
+		0x1B80, 0x4D0004F7,
+		0x1B80, 0x30000505,
+		0x1B80, 0x30000507,
+		0x1B80, 0xE1650515,
+		0x1B80, 0xE1650517,
+		0x1B80, 0x4D040525,
+		0x1B80, 0x4D040527,
+		0x1B80, 0x20800535,
+		0x1B80, 0x20800537,
+		0x1B80, 0x00000545,
+		0x1B80, 0x00000547,
+		0x1B80, 0x4D000555,
+		0x1B80, 0x4D000557,
+		0x1B80, 0x55070565,
+		0x1B80, 0x55070567,
+		0x1B80, 0xE15D0575,
+		0x1B80, 0xE15D0577,
+		0x1B80, 0xE15D0585,
+		0x1B80, 0xE15D0587,
+		0x1B80, 0x4D040595,
+		0x1B80, 0x4D040597,
+		0x1B80, 0x208805A5,
+		0x1B80, 0x208805A7,
+		0x1B80, 0x020005B5,
+		0x1B80, 0x020005B7,
+		0x1B80, 0x4D0005C5,
+		0x1B80, 0x4D0005C7,
+		0x1B80, 0x550F05D5,
+		0x1B80, 0x550F05D7,
+		0x1B80, 0xE15D05E5,
+		0x1B80, 0xE15D05E7,
+		0x1B80, 0x4F0205F5,
+		0x1B80, 0x4F0205F7,
+		0x1B80, 0x4E000605,
+		0x1B80, 0x4E000607,
+		0x1B80, 0x53020615,
+		0x1B80, 0x53020617,
+		0x1B80, 0x52010625,
+		0x1B80, 0x52010627,
+		0x1B80, 0xE1610635,
+		0x1B80, 0xE1610637,
+		0x1B80, 0x4D080645,
+		0x1B80, 0x4D080647,
+		0x1B80, 0x57100655,
+		0x1B80, 0x57100657,
+		0x1B80, 0x57000665,
+		0x1B80, 0x57000667,
+		0x1B80, 0x4D000675,
+		0x1B80, 0x4D000677,
+		0x1B80, 0x00010685,
+		0x1B80, 0x00010687,
+		0x1B80, 0xE1650695,
+		0x1B80, 0xE1650697,
+		0x1B80, 0x000106A5,
+		0x1B80, 0x000106A7,
+		0x1B80, 0x308B06B5,
+		0x1B80, 0x308B06B7,
+		0x1B80, 0x002306C5,
+		0x1B80, 0x002306C7,
+		0x1B80, 0xE1CB06D5,
+		0x1B80, 0xE1CB06D7,
+		0x1B80, 0x000206E5,
+		0x1B80, 0x000206E7,
+		0x1B80, 0x54E906F5,
+		0x1B80, 0x54E906F7,
+		0x1B80, 0x0BA60705,
+		0x1B80, 0x0BA60707,
+		0x1B80, 0x00230715,
+		0x1B80, 0x00230717,
+		0x1B80, 0xE1CB0725,
+		0x1B80, 0xE1CB0727,
+		0x1B80, 0x00020735,
+		0x1B80, 0x00020737,
+		0x1B80, 0x4D300745,
+		0x1B80, 0x4D300747,
+		0x1B80, 0x30A40755,
+		0x1B80, 0x30A40757,
+		0x1B80, 0x30870765,
+		0x1B80, 0x30870767,
+		0x1B80, 0x00220775,
+		0x1B80, 0x00220777,
+		0x1B80, 0xE1CB0785,
+		0x1B80, 0xE1CB0787,
+		0x1B80, 0x00020795,
+		0x1B80, 0x00020797,
+		0x1B80, 0x54E807A5,
+		0x1B80, 0x54E807A7,
+		0x1B80, 0x0BA607B5,
+		0x1B80, 0x0BA607B7,
+		0x1B80, 0x002207C5,
+		0x1B80, 0x002207C7,
+		0x1B80, 0xE1CB07D5,
+		0x1B80, 0xE1CB07D7,
+		0x1B80, 0x000207E5,
+		0x1B80, 0x000207E7,
+		0x1B80, 0x4D3007F5,
+		0x1B80, 0x4D3007F7,
+		0x1B80, 0x30A40805,
+		0x1B80, 0x30A40807,
+		0x1B80, 0x63F10815,
+		0x1B80, 0x63F10817,
+		0x1B80, 0xE1650825,
+		0x1B80, 0xE1650827,
+		0x1B80, 0xE1CB0835,
+		0x1B80, 0xE1CB0837,
+		0x1B80, 0x63F40845,
+		0x1B80, 0x63F40847,
+		0x1B80, 0xE1650855,
+		0x1B80, 0xE1650857,
+		0x1B80, 0xE1CB0865,
+		0x1B80, 0xE1CB0867,
+		0x1B80, 0x0BA80875,
+		0x1B80, 0x0BA80877,
+		0x1B80, 0x63F80885,
+		0x1B80, 0x63F80887,
+		0x1B80, 0xE1650895,
+		0x1B80, 0xE1650897,
+		0x1B80, 0xE1CB08A5,
+		0x1B80, 0xE1CB08A7,
+		0x1B80, 0x0BA908B5,
+		0x1B80, 0x0BA908B7,
+		0x1B80, 0x63FC08C5,
+		0x1B80, 0x63FC08C7,
+		0x1B80, 0xE16508D5,
+		0x1B80, 0xE16508D7,
+		0x1B80, 0xE1CB08E5,
+		0x1B80, 0xE1CB08E7,
+		0x1B80, 0x63FF08F5,
+		0x1B80, 0x63FF08F7,
+		0x1B80, 0xE1650905,
+		0x1B80, 0xE1650907,
+		0x1B80, 0xE1CB0915,
+		0x1B80, 0xE1CB0917,
+		0x1B80, 0x63000925,
+		0x1B80, 0x63000927,
+		0x1B80, 0xE1650935,
+		0x1B80, 0xE1650937,
+		0x1B80, 0xE1CB0945,
+		0x1B80, 0xE1CB0947,
+		0x1B80, 0x63030955,
+		0x1B80, 0x63030957,
+		0x1B80, 0xE1650965,
+		0x1B80, 0xE1650967,
+		0x1B80, 0xE1CB0975,
+		0x1B80, 0xE1CB0977,
+		0x1B80, 0xF4D40985,
+		0x1B80, 0xF4D40987,
+		0x1B80, 0x63070995,
+		0x1B80, 0x63070997,
+		0x1B80, 0xE16509A5,
+		0x1B80, 0xE16509A7,
+		0x1B80, 0xE1CB09B5,
+		0x1B80, 0xE1CB09B7,
+		0x1B80, 0xF5DB09C5,
+		0x1B80, 0xF5DB09C7,
+		0x1B80, 0x630B09D5,
+		0x1B80, 0x630B09D7,
+		0x1B80, 0xE16509E5,
+		0x1B80, 0xE16509E7,
+		0x1B80, 0xE1CB09F5,
+		0x1B80, 0xE1CB09F7,
+		0x1B80, 0x630E0A05,
+		0x1B80, 0x630E0A07,
+		0x1B80, 0xE1650A15,
+		0x1B80, 0xE1650A17,
+		0x1B80, 0xE1CB0A25,
+		0x1B80, 0xE1CB0A27,
+		0x1B80, 0x4D300A35,
+		0x1B80, 0x4D300A37,
+		0x1B80, 0x55010A45,
+		0x1B80, 0x55010A47,
+		0x1B80, 0x57040A55,
+		0x1B80, 0x57040A57,
+		0x1B80, 0x57000A65,
+		0x1B80, 0x57000A67,
+		0x1B80, 0x96000A75,
+		0x1B80, 0x96000A77,
+		0x1B80, 0x57080A85,
+		0x1B80, 0x57080A87,
+		0x1B80, 0x57000A95,
+		0x1B80, 0x57000A97,
+		0x1B80, 0x95000AA5,
+		0x1B80, 0x95000AA7,
+		0x1B80, 0x4D000AB5,
+		0x1B80, 0x4D000AB7,
+		0x1B80, 0x6C070AC5,
+		0x1B80, 0x6C070AC7,
+		0x1B80, 0x7B200AD5,
+		0x1B80, 0x7B200AD7,
+		0x1B80, 0x7A000AE5,
+		0x1B80, 0x7A000AE7,
+		0x1B80, 0x79000AF5,
+		0x1B80, 0x79000AF7,
+		0x1B80, 0x7F200B05,
+		0x1B80, 0x7F200B07,
+		0x1B80, 0x7E000B15,
+		0x1B80, 0x7E000B17,
+		0x1B80, 0x7D000B25,
+		0x1B80, 0x7D000B27,
+		0x1B80, 0x00010B35,
+		0x1B80, 0x00010B37,
+		0x1B80, 0x62850B45,
+		0x1B80, 0x62850B47,
+		0x1B80, 0xE1650B55,
+		0x1B80, 0xE1650B57,
+		0x1B80, 0x00010B65,
+		0x1B80, 0x00010B67,
+		0x1B80, 0x5C320B75,
+		0x1B80, 0x5C320B77,
+		0x1B80, 0xE1C70B85,
+		0x1B80, 0xE1C70B87,
+		0x1B80, 0xE1930B95,
+		0x1B80, 0xE1930B97,
 		0x1B80, 0x00010BA5,
 		0x1B80, 0x00010BA7,
-		0x1B80, 0x30DF0BB5,
-		0x1B80, 0x30DF0BB7,
-		0x1B80, 0x00230BC5,
-		0x1B80, 0x00230BC7,
-		0x1B80, 0xE16D0BD5,
-		0x1B80, 0xE16D0BD7,
-		0x1B80, 0x00020BE5,
-		0x1B80, 0x00020BE7,
-		0x1B80, 0x54E90BF5,
-		0x1B80, 0x54E90BF7,
-		0x1B80, 0x0BA60C05,
-		0x1B80, 0x0BA60C07,
-		0x1B80, 0x00230C15,
-		0x1B80, 0x00230C17,
-		0x1B80, 0xE16D0C25,
-		0x1B80, 0xE16D0C27,
-		0x1B80, 0x00020C35,
-		0x1B80, 0x00020C37,
-		0x1B80, 0x4D100C45,
-		0x1B80, 0x4D100C47,
-		0x1B80, 0x30900C55,
-		0x1B80, 0x30900C57,
-		0x1B80, 0x30D90C65,
-		0x1B80, 0x30D90C67,
-		0x1B80, 0x00220C75,
-		0x1B80, 0x00220C77,
-		0x1B80, 0xE16D0C85,
-		0x1B80, 0xE16D0C87,
-		0x1B80, 0x00020C95,
-		0x1B80, 0x00020C97,
-		0x1B80, 0x54E80CA5,
-		0x1B80, 0x54E80CA7,
-		0x1B80, 0x0BA60CB5,
-		0x1B80, 0x0BA60CB7,
-		0x1B80, 0x00220CC5,
-		0x1B80, 0x00220CC7,
-		0x1B80, 0xE16D0CD5,
-		0x1B80, 0xE16D0CD7,
-		0x1B80, 0x00020CE5,
-		0x1B80, 0x00020CE7,
-		0x1B80, 0x4D100CF5,
-		0x1B80, 0x4D100CF7,
-		0x1B80, 0x30900D05,
-		0x1B80, 0x30900D07,
-		0x1B80, 0x5C320D15,
-		0x1B80, 0x5C320D17,
-		0x1B80, 0x54F00D25,
-		0x1B80, 0x54F00D27,
-		0x1B80, 0x67F10D35,
-		0x1B80, 0x67F10D37,
-		0x1B80, 0xE1420D45,
-		0x1B80, 0xE1420D47,
-		0x1B80, 0xE16D0D55,
-		0x1B80, 0xE16D0D57,
-		0x1B80, 0x67F40D65,
-		0x1B80, 0x67F40D67,
-		0x1B80, 0xE1420D75,
-		0x1B80, 0xE1420D77,
-		0x1B80, 0xE16D0D85,
-		0x1B80, 0xE16D0D87,
-		0x1B80, 0x5C320D95,
-		0x1B80, 0x5C320D97,
-		0x1B80, 0x54F10DA5,
-		0x1B80, 0x54F10DA7,
-		0x1B80, 0x0BA80DB5,
-		0x1B80, 0x0BA80DB7,
-		0x1B80, 0x67F80DC5,
-		0x1B80, 0x67F80DC7,
-		0x1B80, 0xE1420DD5,
-		0x1B80, 0xE1420DD7,
-		0x1B80, 0xE16D0DE5,
-		0x1B80, 0xE16D0DE7,
-		0x1B80, 0x5C320DF5,
-		0x1B80, 0x5C320DF7,
-		0x1B80, 0x54F10E05,
-		0x1B80, 0x54F10E07,
-		0x1B80, 0x0BA90E15,
-		0x1B80, 0x0BA90E17,
-		0x1B80, 0x67FC0E25,
-		0x1B80, 0x67FC0E27,
-		0x1B80, 0xE1420E35,
-		0x1B80, 0xE1420E37,
-		0x1B80, 0xE16D0E45,
-		0x1B80, 0xE16D0E47,
-		0x1B80, 0x67FF0E55,
-		0x1B80, 0x67FF0E57,
-		0x1B80, 0xE1420E65,
-		0x1B80, 0xE1420E67,
-		0x1B80, 0xE16D0E75,
-		0x1B80, 0xE16D0E77,
-		0x1B80, 0x5C320E85,
-		0x1B80, 0x5C320E87,
-		0x1B80, 0x54F20E95,
-		0x1B80, 0x54F20E97,
-		0x1B80, 0x67000EA5,
-		0x1B80, 0x67000EA7,
-		0x1B80, 0xE1420EB5,
-		0x1B80, 0xE1420EB7,
-		0x1B80, 0xE16D0EC5,
-		0x1B80, 0xE16D0EC7,
-		0x1B80, 0x67030ED5,
-		0x1B80, 0x67030ED7,
-		0x1B80, 0xE1420EE5,
-		0x1B80, 0xE1420EE7,
-		0x1B80, 0xE16D0EF5,
-		0x1B80, 0xE16D0EF7,
-		0x1B80, 0xF9CC0F05,
-		0x1B80, 0xF9CC0F07,
-		0x1B80, 0x67070F15,
-		0x1B80, 0x67070F17,
-		0x1B80, 0xE1420F25,
-		0x1B80, 0xE1420F27,
-		0x1B80, 0xE16D0F35,
-		0x1B80, 0xE16D0F37,
-		0x1B80, 0xFAD30F45,
-		0x1B80, 0xFAD30F47,
-		0x1B80, 0x5C320F55,
-		0x1B80, 0x5C320F57,
-		0x1B80, 0x54F30F65,
-		0x1B80, 0x54F30F67,
-		0x1B80, 0x670B0F75,
-		0x1B80, 0x670B0F77,
-		0x1B80, 0xE1420F85,
-		0x1B80, 0xE1420F87,
-		0x1B80, 0xE16D0F95,
-		0x1B80, 0xE16D0F97,
-		0x1B80, 0x670E0FA5,
-		0x1B80, 0x670E0FA7,
-		0x1B80, 0xE1420FB5,
-		0x1B80, 0xE1420FB7,
-		0x1B80, 0xE16D0FC5,
-		0x1B80, 0xE16D0FC7,
-		0x1B80, 0x4D100FD5,
-		0x1B80, 0x4D100FD7,
-		0x1B80, 0x30900FE5,
-		0x1B80, 0x30900FE7,
-		0x1B80, 0x00010FF5,
-		0x1B80, 0x00010FF7,
-		0x1B80, 0x7B241005,
-		0x1B80, 0x7B241007,
-		0x1B80, 0x7A401015,
-		0x1B80, 0x7A401017,
-		0x1B80, 0x79001025,
-		0x1B80, 0x79001027,
-		0x1B80, 0x55031035,
-		0x1B80, 0x55031037,
-		0x1B80, 0x310C1045,
-		0x1B80, 0x310C1047,
-		0x1B80, 0x7B1C1055,
-		0x1B80, 0x7B1C1057,
-		0x1B80, 0x7A401065,
-		0x1B80, 0x7A401067,
-		0x1B80, 0x550B1075,
-		0x1B80, 0x550B1077,
-		0x1B80, 0x310C1085,
-		0x1B80, 0x310C1087,
-		0x1B80, 0x7B201095,
-		0x1B80, 0x7B201097,
-		0x1B80, 0x7A0010A5,
-		0x1B80, 0x7A0010A7,
-		0x1B80, 0x551310B5,
-		0x1B80, 0x551310B7,
-		0x1B80, 0x740110C5,
-		0x1B80, 0x740110C7,
-		0x1B80, 0x740010D5,
-		0x1B80, 0x740010D7,
-		0x1B80, 0x8E0010E5,
-		0x1B80, 0x8E0010E7,
-		0x1B80, 0x000110F5,
-		0x1B80, 0x000110F7,
-		0x1B80, 0x57021105,
-		0x1B80, 0x57021107,
-		0x1B80, 0x57001115,
-		0x1B80, 0x57001117,
-		0x1B80, 0x97001125,
-		0x1B80, 0x97001127,
+		0x1B80, 0x5C320BB5,
+		0x1B80, 0x5C320BB7,
+		0x1B80, 0x63F40BC5,
+		0x1B80, 0x63F40BC7,
+		0x1B80, 0x62850BD5,
+		0x1B80, 0x62850BD7,
+		0x1B80, 0x0BB00BE5,
+		0x1B80, 0x0BB00BE7,
+		0x1B80, 0xE1650BF5,
+		0x1B80, 0xE1650BF7,
+		0x1B80, 0xE1CB0C05,
+		0x1B80, 0xE1CB0C07,
+		0x1B80, 0x5C320C15,
+		0x1B80, 0x5C320C17,
+		0x1B80, 0x63FC0C25,
+		0x1B80, 0x63FC0C27,
+		0x1B80, 0x62850C35,
+		0x1B80, 0x62850C37,
+		0x1B80, 0x0BB10C45,
+		0x1B80, 0x0BB10C47,
+		0x1B80, 0xE1650C55,
+		0x1B80, 0xE1650C57,
+		0x1B80, 0xE1CB0C65,
+		0x1B80, 0xE1CB0C67,
+		0x1B80, 0x63030C75,
+		0x1B80, 0x63030C77,
+		0x1B80, 0xE1650C85,
+		0x1B80, 0xE1650C87,
+		0x1B80, 0xE1CB0C95,
+		0x1B80, 0xE1CB0C97,
+		0x1B80, 0xF7040CA5,
+		0x1B80, 0xF7040CA7,
+		0x1B80, 0x630B0CB5,
+		0x1B80, 0x630B0CB7,
+		0x1B80, 0xE1650CC5,
+		0x1B80, 0xE1650CC7,
+		0x1B80, 0xE1CB0CD5,
+		0x1B80, 0xE1CB0CD7,
+		0x1B80, 0x00010CE5,
+		0x1B80, 0x00010CE7,
+		0x1B80, 0x30F30CF5,
+		0x1B80, 0x30F30CF7,
+		0x1B80, 0x00230D05,
+		0x1B80, 0x00230D07,
+		0x1B80, 0xE1D00D15,
+		0x1B80, 0xE1D00D17,
+		0x1B80, 0x00020D25,
+		0x1B80, 0x00020D27,
+		0x1B80, 0x54E90D35,
+		0x1B80, 0x54E90D37,
+		0x1B80, 0x0BA60D45,
+		0x1B80, 0x0BA60D47,
+		0x1B80, 0x00230D55,
+		0x1B80, 0x00230D57,
+		0x1B80, 0xE1D00D65,
+		0x1B80, 0xE1D00D67,
+		0x1B80, 0x00020D75,
+		0x1B80, 0x00020D77,
+		0x1B80, 0x4D100D85,
+		0x1B80, 0x4D100D87,
+		0x1B80, 0x30A40D95,
+		0x1B80, 0x30A40D97,
+		0x1B80, 0x30ED0DA5,
+		0x1B80, 0x30ED0DA7,
+		0x1B80, 0x00220DB5,
+		0x1B80, 0x00220DB7,
+		0x1B80, 0xE1D00DC5,
+		0x1B80, 0xE1D00DC7,
+		0x1B80, 0x00020DD5,
+		0x1B80, 0x00020DD7,
+		0x1B80, 0x54E80DE5,
+		0x1B80, 0x54E80DE7,
+		0x1B80, 0x0BA60DF5,
+		0x1B80, 0x0BA60DF7,
+		0x1B80, 0x00220E05,
+		0x1B80, 0x00220E07,
+		0x1B80, 0xE1D00E15,
+		0x1B80, 0xE1D00E17,
+		0x1B80, 0x00020E25,
+		0x1B80, 0x00020E27,
+		0x1B80, 0x4D100E35,
+		0x1B80, 0x4D100E37,
+		0x1B80, 0x30A40E45,
+		0x1B80, 0x30A40E47,
+		0x1B80, 0x5C320E55,
+		0x1B80, 0x5C320E57,
+		0x1B80, 0x54F00E65,
+		0x1B80, 0x54F00E67,
+		0x1B80, 0x67F10E75,
+		0x1B80, 0x67F10E77,
+		0x1B80, 0xE1930E85,
+		0x1B80, 0xE1930E87,
+		0x1B80, 0xE1D00E95,
+		0x1B80, 0xE1D00E97,
+		0x1B80, 0x67F40EA5,
+		0x1B80, 0x67F40EA7,
+		0x1B80, 0xE1930EB5,
+		0x1B80, 0xE1930EB7,
+		0x1B80, 0xE1D00EC5,
+		0x1B80, 0xE1D00EC7,
+		0x1B80, 0x5C320ED5,
+		0x1B80, 0x5C320ED7,
+		0x1B80, 0x54F10EE5,
+		0x1B80, 0x54F10EE7,
+		0x1B80, 0x0BA80EF5,
+		0x1B80, 0x0BA80EF7,
+		0x1B80, 0x67F80F05,
+		0x1B80, 0x67F80F07,
+		0x1B80, 0xE1930F15,
+		0x1B80, 0xE1930F17,
+		0x1B80, 0xE1D00F25,
+		0x1B80, 0xE1D00F27,
+		0x1B80, 0x5C320F35,
+		0x1B80, 0x5C320F37,
+		0x1B80, 0x54F10F45,
+		0x1B80, 0x54F10F47,
+		0x1B80, 0x0BA90F55,
+		0x1B80, 0x0BA90F57,
+		0x1B80, 0x67FC0F65,
+		0x1B80, 0x67FC0F67,
+		0x1B80, 0xE1930F75,
+		0x1B80, 0xE1930F77,
+		0x1B80, 0xE1D00F85,
+		0x1B80, 0xE1D00F87,
+		0x1B80, 0x67FF0F95,
+		0x1B80, 0x67FF0F97,
+		0x1B80, 0xE1930FA5,
+		0x1B80, 0xE1930FA7,
+		0x1B80, 0xE1D00FB5,
+		0x1B80, 0xE1D00FB7,
+		0x1B80, 0x5C320FC5,
+		0x1B80, 0x5C320FC7,
+		0x1B80, 0x54F20FD5,
+		0x1B80, 0x54F20FD7,
+		0x1B80, 0x67000FE5,
+		0x1B80, 0x67000FE7,
+		0x1B80, 0xE1930FF5,
+		0x1B80, 0xE1930FF7,
+		0x1B80, 0xE1D01005,
+		0x1B80, 0xE1D01007,
+		0x1B80, 0x67031015,
+		0x1B80, 0x67031017,
+		0x1B80, 0xE1931025,
+		0x1B80, 0xE1931027,
+		0x1B80, 0xE1D01035,
+		0x1B80, 0xE1D01037,
+		0x1B80, 0xF9CC1045,
+		0x1B80, 0xF9CC1047,
+		0x1B80, 0x67071055,
+		0x1B80, 0x67071057,
+		0x1B80, 0xE1931065,
+		0x1B80, 0xE1931067,
+		0x1B80, 0xE1D01075,
+		0x1B80, 0xE1D01077,
+		0x1B80, 0xFAD31085,
+		0x1B80, 0xFAD31087,
+		0x1B80, 0x5C321095,
+		0x1B80, 0x5C321097,
+		0x1B80, 0x54F310A5,
+		0x1B80, 0x54F310A7,
+		0x1B80, 0x670B10B5,
+		0x1B80, 0x670B10B7,
+		0x1B80, 0xE19310C5,
+		0x1B80, 0xE19310C7,
+		0x1B80, 0xE1D010D5,
+		0x1B80, 0xE1D010D7,
+		0x1B80, 0x670E10E5,
+		0x1B80, 0x670E10E7,
+		0x1B80, 0xE19310F5,
+		0x1B80, 0xE19310F7,
+		0x1B80, 0xE1D01105,
+		0x1B80, 0xE1D01107,
+		0x1B80, 0x4D101115,
+		0x1B80, 0x4D101117,
+		0x1B80, 0x30A41125,
+		0x1B80, 0x30A41127,
 		0x1B80, 0x00011135,
 		0x1B80, 0x00011137,
-		0x1B80, 0x4F781145,
-		0x1B80, 0x4F781147,
-		0x1B80, 0x53881155,
-		0x1B80, 0x53881157,
-		0x1B80, 0xE1221165,
-		0x1B80, 0xE1221167,
-		0x1B80, 0x54801175,
-		0x1B80, 0x54801177,
-		0x1B80, 0x54001185,
-		0x1B80, 0x54001187,
-		0x1B80, 0xE1221195,
-		0x1B80, 0xE1221197,
-		0x1B80, 0x548111A5,
-		0x1B80, 0x548111A7,
-		0x1B80, 0x540011B5,
-		0x1B80, 0x540011B7,
-		0x1B80, 0xE12211C5,
-		0x1B80, 0xE12211C7,
-		0x1B80, 0x548211D5,
-		0x1B80, 0x548211D7,
-		0x1B80, 0x540011E5,
-		0x1B80, 0x540011E7,
-		0x1B80, 0xE12D11F5,
-		0x1B80, 0xE12D11F7,
-		0x1B80, 0xBF1D1205,
-		0x1B80, 0xBF1D1207,
-		0x1B80, 0x301D1215,
-		0x1B80, 0x301D1217,
-		0x1B80, 0xE1001225,
-		0x1B80, 0xE1001227,
-		0x1B80, 0xE1051235,
-		0x1B80, 0xE1051237,
-		0x1B80, 0xE1091245,
-		0x1B80, 0xE1091247,
-		0x1B80, 0xE1101255,
-		0x1B80, 0xE1101257,
-		0x1B80, 0xE1641265,
-		0x1B80, 0xE1641267,
-		0x1B80, 0x55131275,
-		0x1B80, 0x55131277,
-		0x1B80, 0xE10C1285,
-		0x1B80, 0xE10C1287,
-		0x1B80, 0x55151295,
-		0x1B80, 0x55151297,
-		0x1B80, 0xE11012A5,
-		0x1B80, 0xE11012A7,
-		0x1B80, 0xE16412B5,
-		0x1B80, 0xE16412B7,
-		0x1B80, 0x000112C5,
-		0x1B80, 0x000112C7,
-		0x1B80, 0x54BF12D5,
-		0x1B80, 0x54BF12D7,
-		0x1B80, 0x54C012E5,
-		0x1B80, 0x54C012E7,
-		0x1B80, 0x54A312F5,
-		0x1B80, 0x54A312F7,
-		0x1B80, 0x54C11305,
-		0x1B80, 0x54C11307,
-		0x1B80, 0x54A41315,
-		0x1B80, 0x54A41317,
-		0x1B80, 0x4C181325,
-		0x1B80, 0x4C181327,
-		0x1B80, 0xBF071335,
-		0x1B80, 0xBF071337,
-		0x1B80, 0x54C21345,
-		0x1B80, 0x54C21347,
-		0x1B80, 0x54A41355,
-		0x1B80, 0x54A41357,
-		0x1B80, 0xBF041365,
-		0x1B80, 0xBF041367,
-		0x1B80, 0x54C11375,
-		0x1B80, 0x54C11377,
-		0x1B80, 0x54A31385,
-		0x1B80, 0x54A31387,
-		0x1B80, 0xBF011395,
-		0x1B80, 0xBF011397,
-		0x1B80, 0xE17213A5,
-		0x1B80, 0xE17213A7,
-		0x1B80, 0x54DF13B5,
-		0x1B80, 0x54DF13B7,
-		0x1B80, 0x000113C5,
-		0x1B80, 0x000113C7,
-		0x1B80, 0x54BF13D5,
-		0x1B80, 0x54BF13D7,
-		0x1B80, 0x54E513E5,
-		0x1B80, 0x54E513E7,
-		0x1B80, 0x050A13F5,
-		0x1B80, 0x050A13F7,
-		0x1B80, 0x54DF1405,
-		0x1B80, 0x54DF1407,
-		0x1B80, 0x00011415,
-		0x1B80, 0x00011417,
-		0x1B80, 0x7F201425,
-		0x1B80, 0x7F201427,
-		0x1B80, 0x7E001435,
-		0x1B80, 0x7E001437,
-		0x1B80, 0x7D001445,
-		0x1B80, 0x7D001447,
-		0x1B80, 0x55011455,
-		0x1B80, 0x55011457,
-		0x1B80, 0x5C311465,
-		0x1B80, 0x5C311467,
-		0x1B80, 0xE10C1475,
-		0x1B80, 0xE10C1477,
-		0x1B80, 0xE1101485,
-		0x1B80, 0xE1101487,
-		0x1B80, 0x54801495,
-		0x1B80, 0x54801497,
-		0x1B80, 0x540014A5,
-		0x1B80, 0x540014A7,
-		0x1B80, 0xE10C14B5,
-		0x1B80, 0xE10C14B7,
-		0x1B80, 0xE11014C5,
-		0x1B80, 0xE11014C7,
-		0x1B80, 0x548114D5,
-		0x1B80, 0x548114D7,
-		0x1B80, 0x540014E5,
-		0x1B80, 0x540014E7,
-		0x1B80, 0xE10C14F5,
-		0x1B80, 0xE10C14F7,
-		0x1B80, 0xE1101505,
-		0x1B80, 0xE1101507,
-		0x1B80, 0x54821515,
-		0x1B80, 0x54821517,
-		0x1B80, 0x54001525,
-		0x1B80, 0x54001527,
-		0x1B80, 0xE12D1535,
-		0x1B80, 0xE12D1537,
-		0x1B80, 0xBFE91545,
-		0x1B80, 0xBFE91547,
-		0x1B80, 0x301D1555,
-		0x1B80, 0x301D1557,
-		0x1B80, 0x00231565,
-		0x1B80, 0x00231567,
-		0x1B80, 0x7B201575,
-		0x1B80, 0x7B201577,
-		0x1B80, 0x7A001585,
-		0x1B80, 0x7A001587,
-		0x1B80, 0x79001595,
-		0x1B80, 0x79001597,
-		0x1B80, 0xE16815A5,
-		0x1B80, 0xE16815A7,
-		0x1B80, 0x000215B5,
-		0x1B80, 0x000215B7,
-		0x1B80, 0x000115C5,
-		0x1B80, 0x000115C7,
-		0x1B80, 0x002215D5,
-		0x1B80, 0x002215D7,
-		0x1B80, 0x7B2015E5,
-		0x1B80, 0x7B2015E7,
-		0x1B80, 0x7A0015F5,
-		0x1B80, 0x7A0015F7,
-		0x1B80, 0x79001605,
-		0x1B80, 0x79001607,
-		0x1B80, 0xE1681615,
-		0x1B80, 0xE1681617,
-		0x1B80, 0x00021625,
-		0x1B80, 0x00021627,
-		0x1B80, 0x00011635,
-		0x1B80, 0x00011637,
-		0x1B80, 0x549F1645,
-		0x1B80, 0x549F1647,
-		0x1B80, 0x54FF1655,
-		0x1B80, 0x54FF1657,
-		0x1B80, 0x54001665,
-		0x1B80, 0x54001667,
-		0x1B80, 0x00011675,
-		0x1B80, 0x00011677,
-		0x1B80, 0x5C311685,
-		0x1B80, 0x5C311687,
-		0x1B80, 0x07141695,
-		0x1B80, 0x07141697,
-		0x1B80, 0x540016A5,
-		0x1B80, 0x540016A7,
-		0x1B80, 0x5C3216B5,
-		0x1B80, 0x5C3216B7,
-		0x1B80, 0x000116C5,
-		0x1B80, 0x000116C7,
-		0x1B80, 0x5C3216D5,
-		0x1B80, 0x5C3216D7,
-		0x1B80, 0x071416E5,
-		0x1B80, 0x071416E7,
+		0x1B80, 0x6C001145,
+		0x1B80, 0x6C001147,
+		0x1B80, 0x00061155,
+		0x1B80, 0x00061157,
+		0x1B80, 0x53001165,
+		0x1B80, 0x53001167,
+		0x1B80, 0x57F71175,
+		0x1B80, 0x57F71177,
+		0x1B80, 0x58211185,
+		0x1B80, 0x58211187,
+		0x1B80, 0x592E1195,
+		0x1B80, 0x592E1197,
+		0x1B80, 0x5A3811A5,
+		0x1B80, 0x5A3811A7,
+		0x1B80, 0x5B4111B5,
+		0x1B80, 0x5B4111B7,
+		0x1B80, 0x000711C5,
+		0x1B80, 0x000711C7,
+		0x1B80, 0x5C0011D5,
+		0x1B80, 0x5C0011D7,
+		0x1B80, 0x4B0011E5,
+		0x1B80, 0x4B0011E7,
+		0x1B80, 0x4E8F11F5,
+		0x1B80, 0x4E8F11F7,
+		0x1B80, 0x4F151205,
+		0x1B80, 0x4F151207,
+		0x1B80, 0x00041215,
+		0x1B80, 0x00041217,
+		0x1B80, 0xE1B51225,
+		0x1B80, 0xE1B51227,
+		0x1B80, 0xAB001235,
+		0x1B80, 0xAB001237,
+		0x1B80, 0x00011245,
+		0x1B80, 0x00011247,
+		0x1B80, 0x6C001255,
+		0x1B80, 0x6C001257,
+		0x1B80, 0x00061265,
+		0x1B80, 0x00061267,
+		0x1B80, 0x53001275,
+		0x1B80, 0x53001277,
+		0x1B80, 0x57F71285,
+		0x1B80, 0x57F71287,
+		0x1B80, 0x58211295,
+		0x1B80, 0x58211297,
+		0x1B80, 0x592E12A5,
+		0x1B80, 0x592E12A7,
+		0x1B80, 0x5A3812B5,
+		0x1B80, 0x5A3812B7,
+		0x1B80, 0x5B4112C5,
+		0x1B80, 0x5B4112C7,
+		0x1B80, 0x000712D5,
+		0x1B80, 0x000712D7,
+		0x1B80, 0x5C0012E5,
+		0x1B80, 0x5C0012E7,
+		0x1B80, 0x4B4012F5,
+		0x1B80, 0x4B4012F7,
+		0x1B80, 0x4E971305,
+		0x1B80, 0x4E971307,
+		0x1B80, 0x4F111315,
+		0x1B80, 0x4F111317,
+		0x1B80, 0x00041325,
+		0x1B80, 0x00041327,
+		0x1B80, 0xE1B51335,
+		0x1B80, 0xE1B51337,
+		0x1B80, 0xAB001345,
+		0x1B80, 0xAB001347,
+		0x1B80, 0x8B001355,
+		0x1B80, 0x8B001357,
+		0x1B80, 0xAB001365,
+		0x1B80, 0xAB001367,
+		0x1B80, 0x8A191375,
+		0x1B80, 0x8A191377,
+		0x1B80, 0x301D1385,
+		0x1B80, 0x301D1387,
+		0x1B80, 0x00011395,
+		0x1B80, 0x00011397,
+		0x1B80, 0x6C0113A5,
+		0x1B80, 0x6C0113A7,
+		0x1B80, 0x000613B5,
+		0x1B80, 0x000613B7,
+		0x1B80, 0x530113C5,
+		0x1B80, 0x530113C7,
+		0x1B80, 0x57F713D5,
+		0x1B80, 0x57F713D7,
+		0x1B80, 0x582113E5,
+		0x1B80, 0x582113E7,
+		0x1B80, 0x592E13F5,
+		0x1B80, 0x592E13F7,
+		0x1B80, 0x5A381405,
+		0x1B80, 0x5A381407,
+		0x1B80, 0x5B411415,
+		0x1B80, 0x5B411417,
+		0x1B80, 0x00071425,
+		0x1B80, 0x00071427,
+		0x1B80, 0x5C001435,
+		0x1B80, 0x5C001437,
+		0x1B80, 0x4B001445,
+		0x1B80, 0x4B001447,
+		0x1B80, 0x4E871455,
+		0x1B80, 0x4E871457,
+		0x1B80, 0x4F111465,
+		0x1B80, 0x4F111467,
+		0x1B80, 0x00041475,
+		0x1B80, 0x00041477,
+		0x1B80, 0xE1B51485,
+		0x1B80, 0xE1B51487,
+		0x1B80, 0xAB001495,
+		0x1B80, 0xAB001497,
+		0x1B80, 0x000614A5,
+		0x1B80, 0x000614A7,
+		0x1B80, 0x577714B5,
+		0x1B80, 0x577714B7,
+		0x1B80, 0x000714C5,
+		0x1B80, 0x000714C7,
+		0x1B80, 0x4E8614D5,
+		0x1B80, 0x4E8614D7,
+		0x1B80, 0x000414E5,
+		0x1B80, 0x000414E7,
+		0x1B80, 0x000114F5,
+		0x1B80, 0x000114F7,
+		0x1B80, 0x00011505,
+		0x1B80, 0x00011507,
+		0x1B80, 0x7B241515,
+		0x1B80, 0x7B241517,
+		0x1B80, 0x7A401525,
+		0x1B80, 0x7A401527,
+		0x1B80, 0x79001535,
+		0x1B80, 0x79001537,
+		0x1B80, 0x55031545,
+		0x1B80, 0x55031547,
+		0x1B80, 0x315D1555,
+		0x1B80, 0x315D1557,
+		0x1B80, 0x7B1C1565,
+		0x1B80, 0x7B1C1567,
+		0x1B80, 0x7A401575,
+		0x1B80, 0x7A401577,
+		0x1B80, 0x550B1585,
+		0x1B80, 0x550B1587,
+		0x1B80, 0x315D1595,
+		0x1B80, 0x315D1597,
+		0x1B80, 0x7B2015A5,
+		0x1B80, 0x7B2015A7,
+		0x1B80, 0x7A0015B5,
+		0x1B80, 0x7A0015B7,
+		0x1B80, 0x551315C5,
+		0x1B80, 0x551315C7,
+		0x1B80, 0x740115D5,
+		0x1B80, 0x740115D7,
+		0x1B80, 0x740015E5,
+		0x1B80, 0x740015E7,
+		0x1B80, 0x8E0015F5,
+		0x1B80, 0x8E0015F7,
+		0x1B80, 0x00011605,
+		0x1B80, 0x00011607,
+		0x1B80, 0x57021615,
+		0x1B80, 0x57021617,
+		0x1B80, 0x57001625,
+		0x1B80, 0x57001627,
+		0x1B80, 0x97001635,
+		0x1B80, 0x97001637,
+		0x1B80, 0x00011645,
+		0x1B80, 0x00011647,
+		0x1B80, 0x4F781655,
+		0x1B80, 0x4F781657,
+		0x1B80, 0x53881665,
+		0x1B80, 0x53881667,
+		0x1B80, 0xE1731675,
+		0x1B80, 0xE1731677,
+		0x1B80, 0x54801685,
+		0x1B80, 0x54801687,
+		0x1B80, 0x54001695,
+		0x1B80, 0x54001697,
+		0x1B80, 0xE17316A5,
+		0x1B80, 0xE17316A7,
+		0x1B80, 0x548116B5,
+		0x1B80, 0x548116B7,
+		0x1B80, 0x540016C5,
+		0x1B80, 0x540016C7,
+		0x1B80, 0xE17316D5,
+		0x1B80, 0xE17316D7,
+		0x1B80, 0x548216E5,
+		0x1B80, 0x548216E7,
 		0x1B80, 0x540016F5,
 		0x1B80, 0x540016F7,
-		0x1B80, 0x5C311705,
-		0x1B80, 0x5C311707,
-		0x1B80, 0x00011715,
-		0x1B80, 0x00011717,
-		0x1B80, 0x4C981725,
-		0x1B80, 0x4C981727,
-		0x1B80, 0x4C181735,
-		0x1B80, 0x4C181737,
-		0x1B80, 0x00011745,
-		0x1B80, 0x00011747,
-		0x1B80, 0x5C321755,
-		0x1B80, 0x5C321757,
-		0x1B80, 0x62841765,
-		0x1B80, 0x62841767,
-		0x1B80, 0x66861775,
-		0x1B80, 0x66861777,
-		0x1B80, 0x6C031785,
-		0x1B80, 0x6C031787,
-		0x1B80, 0x7B201795,
-		0x1B80, 0x7B201797,
-		0x1B80, 0x7A0017A5,
-		0x1B80, 0x7A0017A7,
-		0x1B80, 0x790017B5,
-		0x1B80, 0x790017B7,
-		0x1B80, 0x7F2017C5,
-		0x1B80, 0x7F2017C7,
-		0x1B80, 0x7E0017D5,
-		0x1B80, 0x7E0017D7,
-		0x1B80, 0x7D0017E5,
-		0x1B80, 0x7D0017E7,
-		0x1B80, 0x090117F5,
-		0x1B80, 0x090117F7,
-		0x1B80, 0x0C011805,
-		0x1B80, 0x0C011807,
-		0x1B80, 0x0BA61815,
-		0x1B80, 0x0BA61817,
-		0x1B80, 0x00011825,
-		0x1B80, 0x00011827,
+		0x1B80, 0xE17E1705,
+		0x1B80, 0xE17E1707,
+		0x1B80, 0xBF1D1715,
+		0x1B80, 0xBF1D1717,
+		0x1B80, 0x301D1725,
+		0x1B80, 0x301D1727,
+		0x1B80, 0xE1511735,
+		0x1B80, 0xE1511737,
+		0x1B80, 0xE1561745,
+		0x1B80, 0xE1561747,
+		0x1B80, 0xE15A1755,
+		0x1B80, 0xE15A1757,
+		0x1B80, 0xE1611765,
+		0x1B80, 0xE1611767,
+		0x1B80, 0xE1C71775,
+		0x1B80, 0xE1C71777,
+		0x1B80, 0x55131785,
+		0x1B80, 0x55131787,
+		0x1B80, 0xE15D1795,
+		0x1B80, 0xE15D1797,
+		0x1B80, 0x551517A5,
+		0x1B80, 0x551517A7,
+		0x1B80, 0xE16117B5,
+		0x1B80, 0xE16117B7,
+		0x1B80, 0xE1C717C5,
+		0x1B80, 0xE1C717C7,
+		0x1B80, 0x000117D5,
+		0x1B80, 0x000117D7,
+		0x1B80, 0x54BF17E5,
+		0x1B80, 0x54BF17E7,
+		0x1B80, 0x54C017F5,
+		0x1B80, 0x54C017F7,
+		0x1B80, 0x54A31805,
+		0x1B80, 0x54A31807,
+		0x1B80, 0x54C11815,
+		0x1B80, 0x54C11817,
+		0x1B80, 0x54A41825,
+		0x1B80, 0x54A41827,
+		0x1B80, 0x4C181835,
+		0x1B80, 0x4C181837,
+		0x1B80, 0xBF071845,
+		0x1B80, 0xBF071847,
+		0x1B80, 0x54C21855,
+		0x1B80, 0x54C21857,
+		0x1B80, 0x54A41865,
+		0x1B80, 0x54A41867,
+		0x1B80, 0xBF041875,
+		0x1B80, 0xBF041877,
+		0x1B80, 0x54C11885,
+		0x1B80, 0x54C11887,
+		0x1B80, 0x54A31895,
+		0x1B80, 0x54A31897,
+		0x1B80, 0xBF0118A5,
+		0x1B80, 0xBF0118A7,
+		0x1B80, 0xE1D518B5,
+		0x1B80, 0xE1D518B7,
+		0x1B80, 0x54DF18C5,
+		0x1B80, 0x54DF18C7,
+		0x1B80, 0x000118D5,
+		0x1B80, 0x000118D7,
+		0x1B80, 0x54BF18E5,
+		0x1B80, 0x54BF18E7,
+		0x1B80, 0x54E518F5,
+		0x1B80, 0x54E518F7,
+		0x1B80, 0x050A1905,
+		0x1B80, 0x050A1907,
+		0x1B80, 0x54DF1915,
+		0x1B80, 0x54DF1917,
+		0x1B80, 0x00011925,
+		0x1B80, 0x00011927,
+		0x1B80, 0x7F201935,
+		0x1B80, 0x7F201937,
+		0x1B80, 0x7E001945,
+		0x1B80, 0x7E001947,
+		0x1B80, 0x7D001955,
+		0x1B80, 0x7D001957,
+		0x1B80, 0x55011965,
+		0x1B80, 0x55011967,
+		0x1B80, 0x5C311975,
+		0x1B80, 0x5C311977,
+		0x1B80, 0xE15D1985,
+		0x1B80, 0xE15D1987,
+		0x1B80, 0xE1611995,
+		0x1B80, 0xE1611997,
+		0x1B80, 0x548019A5,
+		0x1B80, 0x548019A7,
+		0x1B80, 0x540019B5,
+		0x1B80, 0x540019B7,
+		0x1B80, 0xE15D19C5,
+		0x1B80, 0xE15D19C7,
+		0x1B80, 0xE16119D5,
+		0x1B80, 0xE16119D7,
+		0x1B80, 0x548119E5,
+		0x1B80, 0x548119E7,
+		0x1B80, 0x540019F5,
+		0x1B80, 0x540019F7,
+		0x1B80, 0xE15D1A05,
+		0x1B80, 0xE15D1A07,
+		0x1B80, 0xE1611A15,
+		0x1B80, 0xE1611A17,
+		0x1B80, 0x54821A25,
+		0x1B80, 0x54821A27,
+		0x1B80, 0x54001A35,
+		0x1B80, 0x54001A37,
+		0x1B80, 0xE17E1A45,
+		0x1B80, 0xE17E1A47,
+		0x1B80, 0xBFE91A55,
+		0x1B80, 0xBFE91A57,
+		0x1B80, 0x301D1A65,
+		0x1B80, 0x301D1A67,
+		0x1B80, 0x00231A75,
+		0x1B80, 0x00231A77,
+		0x1B80, 0x7B201A85,
+		0x1B80, 0x7B201A87,
+		0x1B80, 0x7A001A95,
+		0x1B80, 0x7A001A97,
+		0x1B80, 0x79001AA5,
+		0x1B80, 0x79001AA7,
+		0x1B80, 0xE1CB1AB5,
+		0x1B80, 0xE1CB1AB7,
+		0x1B80, 0x00021AC5,
+		0x1B80, 0x00021AC7,
+		0x1B80, 0x00011AD5,
+		0x1B80, 0x00011AD7,
+		0x1B80, 0x00221AE5,
+		0x1B80, 0x00221AE7,
+		0x1B80, 0x7B201AF5,
+		0x1B80, 0x7B201AF7,
+		0x1B80, 0x7A001B05,
+		0x1B80, 0x7A001B07,
+		0x1B80, 0x79001B15,
+		0x1B80, 0x79001B17,
+		0x1B80, 0xE1CB1B25,
+		0x1B80, 0xE1CB1B27,
+		0x1B80, 0x00021B35,
+		0x1B80, 0x00021B37,
+		0x1B80, 0x00011B45,
+		0x1B80, 0x00011B47,
+		0x1B80, 0x74021B55,
+		0x1B80, 0x74021B57,
+		0x1B80, 0x003F1B65,
+		0x1B80, 0x003F1B67,
+		0x1B80, 0x74001B75,
+		0x1B80, 0x74001B77,
+		0x1B80, 0x00021B85,
+		0x1B80, 0x00021B87,
+		0x1B80, 0x00011B95,
+		0x1B80, 0x00011B97,
+		0x1B80, 0x4D041BA5,
+		0x1B80, 0x4D041BA7,
+		0x1B80, 0x2EF81BB5,
+		0x1B80, 0x2EF81BB7,
+		0x1B80, 0x00001BC5,
+		0x1B80, 0x00001BC7,
+		0x1B80, 0x23301BD5,
+		0x1B80, 0x23301BD7,
+		0x1B80, 0x00241BE5,
+		0x1B80, 0x00241BE7,
+		0x1B80, 0x23E01BF5,
+		0x1B80, 0x23E01BF7,
+		0x1B80, 0x003F1C05,
+		0x1B80, 0x003F1C07,
+		0x1B80, 0x23FC1C15,
+		0x1B80, 0x23FC1C17,
+		0x1B80, 0xBFCE1C25,
+		0x1B80, 0xBFCE1C27,
+		0x1B80, 0x2EF01C35,
+		0x1B80, 0x2EF01C37,
+		0x1B80, 0x00001C45,
+		0x1B80, 0x00001C47,
+		0x1B80, 0x4D001C55,
+		0x1B80, 0x4D001C57,
+		0x1B80, 0x00011C65,
+		0x1B80, 0x00011C67,
+		0x1B80, 0x549F1C75,
+		0x1B80, 0x549F1C77,
+		0x1B80, 0x54FF1C85,
+		0x1B80, 0x54FF1C87,
+		0x1B80, 0x54001C95,
+		0x1B80, 0x54001C97,
+		0x1B80, 0x00011CA5,
+		0x1B80, 0x00011CA7,
+		0x1B80, 0x5C311CB5,
+		0x1B80, 0x5C311CB7,
+		0x1B80, 0x07141CC5,
+		0x1B80, 0x07141CC7,
+		0x1B80, 0x54001CD5,
+		0x1B80, 0x54001CD7,
+		0x1B80, 0x5C321CE5,
+		0x1B80, 0x5C321CE7,
+		0x1B80, 0x00011CF5,
+		0x1B80, 0x00011CF7,
+		0x1B80, 0x5C321D05,
+		0x1B80, 0x5C321D07,
+		0x1B80, 0x07141D15,
+		0x1B80, 0x07141D17,
+		0x1B80, 0x54001D25,
+		0x1B80, 0x54001D27,
+		0x1B80, 0x5C311D35,
+		0x1B80, 0x5C311D37,
+		0x1B80, 0x00011D45,
+		0x1B80, 0x00011D47,
+		0x1B80, 0x4C981D55,
+		0x1B80, 0x4C981D57,
+		0x1B80, 0x4C181D65,
+		0x1B80, 0x4C181D67,
+		0x1B80, 0x00011D75,
+		0x1B80, 0x00011D77,
+		0x1B80, 0x5C321D85,
+		0x1B80, 0x5C321D87,
+		0x1B80, 0x62841D95,
+		0x1B80, 0x62841D97,
+		0x1B80, 0x66861DA5,
+		0x1B80, 0x66861DA7,
+		0x1B80, 0x6C031DB5,
+		0x1B80, 0x6C031DB7,
+		0x1B80, 0x7B201DC5,
+		0x1B80, 0x7B201DC7,
+		0x1B80, 0x7A001DD5,
+		0x1B80, 0x7A001DD7,
+		0x1B80, 0x79001DE5,
+		0x1B80, 0x79001DE7,
+		0x1B80, 0x7F201DF5,
+		0x1B80, 0x7F201DF7,
+		0x1B80, 0x7E001E05,
+		0x1B80, 0x7E001E07,
+		0x1B80, 0x7D001E15,
+		0x1B80, 0x7D001E17,
+		0x1B80, 0x09011E25,
+		0x1B80, 0x09011E27,
+		0x1B80, 0x0C011E35,
+		0x1B80, 0x0C011E37,
+		0x1B80, 0x0BA61E45,
+		0x1B80, 0x0BA61E47,
+		0x1B80, 0x00011E55,
+		0x1B80, 0x00011E57,
 		0x1B80, 0x00000006,
 		0x1B80, 0x00000002,
 
@@ -4771,7 +6927,7 @@ odm_read_and_config_mp_8822b_phy_reg(
 {
 	u32	i = 0;
 	u8	c_cond;
-	bool	is_matched = true, is_skipped = false;
+	boolean	is_matched = true, is_skipped = false;
 	u32	array_len = sizeof(array_mp_8822b_phy_reg)/sizeof(u32);
 	u32	*array = array_mp_8822b_phy_reg;
 
@@ -4821,7 +6977,7 @@ odm_read_and_config_mp_8822b_phy_reg(
 u32
 odm_get_version_mp_8822b_phy_reg(void)
 {
-		return 63;
+		return 85;
 }
 
 /******************************************************************************
diff --git a/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_bb.h b/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_bb.h
index 31a8825..cd0ba96 100755..100644
--- a/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_bb.h
+++ b/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_bb.h
@@ -1,6 +1,6 @@
 /******************************************************************************
 *
-* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+* Copyright(c) 2007 - 2017 Realtek Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of version 2 of the GNU General Public License as
@@ -11,14 +11,9 @@
 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
 * more details.
 *
-* You should have received a copy of the GNU General Public License along with
-* this program; if not, write to the Free Software Foundation, Inc.,
-* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
-*
-*
 ******************************************************************************/
 
-/*Image2HeaderVersion: 3.1*/
+/*Image2HeaderVersion: R2 1.2.1*/
 #if (RTL8822B_SUPPORT == 1)
 #ifndef __INC_MP_BB_HW_IMG_8822B_H
 #define __INC_MP_BB_HW_IMG_8822B_H
diff --git a/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_fw.c b/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_fw.c
index 6b5ed8e..6b5ed8e 100755..100644
--- a/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_fw.c
+++ b/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_fw.c
diff --git a/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_fw.h b/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_fw.h
index 9c52383..9c52383 100755..100644
--- a/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_fw.h
+++ b/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_fw.h
diff --git a/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_mac.c b/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_mac.c
index ece42fe..f3212bb 100755..100644
--- a/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_mac.c
+++ b/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_mac.c
@@ -1,6 +1,6 @@
 /******************************************************************************
 *
-* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+* Copyright(c) 2007 - 2017 Realtek Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of version 2 of the GNU General Public License as
@@ -11,19 +11,14 @@
 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
 * more details.
 *
-* You should have received a copy of the GNU General Public License along with
-* this program; if not, write to the Free Software Foundation, Inc.,
-* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
-*
-*
 ******************************************************************************/
 
-/*Image2HeaderVersion: 3.1*/
+/*Image2HeaderVersion: R2 1.2.1*/
 #include "mp_precomp.h"
 #include "../phydm_precomp.h"
 
 #if (RTL8822B_SUPPORT == 1)
-static bool
+static boolean
 check_positive(
 	struct PHY_DM_STRUCT *p_dm_odm,
 	const u32	condition1,
@@ -32,19 +27,17 @@ check_positive(
 	const u32	condition4
 )
 {
-	u8	_board_type = ((p_dm_odm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/
-			((p_dm_odm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/
-			((p_dm_odm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/
-			((p_dm_odm->board_type & BIT(6)) >> 6) << 3 | /* _APA */
-			((p_dm_odm->board_type & BIT(2)) >> 2) << 4;  /* _BT*/
-
 	u32	cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4;
-	u32	driver1 = p_dm_odm->cut_version << 24 |
+
+	u8	cut_version_for_para = (p_dm_odm->cut_version ==  ODM_CUT_A) ? 15 : p_dm_odm->cut_version;
+	u8	pkg_type_for_para = (p_dm_odm->package_type == 0) ? 15 : p_dm_odm->package_type;
+
+	u32	driver1 = cut_version_for_para << 24 |
 			(p_dm_odm->support_interface & 0xF0) << 16 |
 			p_dm_odm->support_platform << 16 |
-			p_dm_odm->package_type << 12 |
+			pkg_type_for_para << 12 |
 			(p_dm_odm->support_interface & 0x0F) << 8  |
-			_board_type;
+			p_dm_odm->rfe_type;
 
 	u32	driver2 = (p_dm_odm->type_glna & 0xFF) <<  0 |
 			(p_dm_odm->type_gpa & 0xFF)  <<  8 |
@@ -66,46 +59,32 @@ check_positive(
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_TRACE,
 	("	(Platform, Interface) = (0x%X, 0x%X)\n", p_dm_odm->support_platform, p_dm_odm->support_interface));
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_TRACE,
-	("	(Board, Package) = (0x%X, 0x%X)\n", p_dm_odm->board_type, p_dm_odm->package_type));
+	("	(RFE, Package) = (0x%X, 0x%X)\n", p_dm_odm->rfe_type, p_dm_odm->package_type));
 
 
 	/*============== value Defined Check ===============*/
-	/*QFN type [15:12] and cut version [27:24] need to do value check*/
+	/*cut version [27:24] need to do value check*/
 
-	if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000)))
-		return false;
 	if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000)))
 		return false;
 
-	/*=============== Bit Defined Check ================*/
-	/* We don't care [31:28] */
+	/*pkg type [15:12] need to do value check*/
 
-	cond1 &= 0x00FF0FFF;
-	driver1 &= 0x00FF0FFF;
-
-	if ((cond1 & driver1) == cond1) {
-		u32	bit_mask = 0;
+	if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000)))
+		return false;
 
-		if ((cond1 & 0x0F) == 0) /* board_type is DONTCARE*/
-			return true;
+	/*=============== Bit Defined Check ================*/
+	/* We don't care [31:28] */
 
-		if ((cond1 & BIT(0)) != 0) /*GLNA*/
-			bit_mask |= 0x000000FF;
-		if ((cond1 & BIT(1)) != 0) /*GPA*/
-			bit_mask |= 0x0000FF00;
-		if ((cond1 & BIT(2)) != 0) /*ALNA*/
-			bit_mask |= 0x00FF0000;
-		if ((cond1 & BIT(3)) != 0) /*APA*/
-			bit_mask |= 0xFF000000;
+	cond1 &= 0x000000FF;
+	driver1 &= 0x000000FF;
 
-		if (((cond2 & bit_mask) == (driver2 & bit_mask)) && ((cond4 & bit_mask) == (driver4 & bit_mask)))  /* board_type of each RF path is matched*/
-			return true;
-		else
-			return false;
-	} else
+	if (cond1 == driver1)
+		return true;
+	else
 		return false;
 }
-static bool
+static boolean
 check_negative(
 	struct PHY_DM_STRUCT *p_dm_odm,
 	const u32	condition1,
@@ -255,7 +234,7 @@ odm_read_and_config_mp_8822b_mac_reg(
 {
 	u32	i = 0;
 	u8	c_cond;
-	bool	is_matched = true, is_skipped = false;
+	boolean	is_matched = true, is_skipped = false;
 	u32	array_len = sizeof(array_mp_8822b_mac_reg)/sizeof(u32);
 	u32	*array = array_mp_8822b_mac_reg;
 
@@ -305,7 +284,7 @@ odm_read_and_config_mp_8822b_mac_reg(
 u32
 odm_get_version_mp_8822b_mac_reg(void)
 {
-		return 63;
+		return 85;
 }
 
 #endif /* end of HWIMG_SUPPORT*/
diff --git a/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_mac.h b/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_mac.h
index a105c2b..17c9c57 100755..100644
--- a/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_mac.h
+++ b/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_mac.h
@@ -1,6 +1,6 @@
 /******************************************************************************
 *
-* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+* Copyright(c) 2007 - 2017 Realtek Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of version 2 of the GNU General Public License as
@@ -11,14 +11,9 @@
 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
 * more details.
 *
-* You should have received a copy of the GNU General Public License along with
-* this program; if not, write to the Free Software Foundation, Inc.,
-* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
-*
-*
 ******************************************************************************/
 
-/*Image2HeaderVersion: 3.1*/
+/*Image2HeaderVersion: R2 1.2.1*/
 #if (RTL8822B_SUPPORT == 1)
 #ifndef __INC_MP_MAC_HW_IMG_8822B_H
 #define __INC_MP_MAC_HW_IMG_8822B_H
diff --git a/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_rf.c b/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_rf.c
index 705a591..0228bde 100755..100644
--- a/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_rf.c
+++ b/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_rf.c
@@ -1,6 +1,6 @@
 /******************************************************************************
 *
-* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+* Copyright(c) 2007 - 2017 Realtek Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of version 2 of the GNU General Public License as
@@ -11,19 +11,14 @@
 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
 * more details.
 *
-* You should have received a copy of the GNU General Public License along with
-* this program; if not, write to the Free Software Foundation, Inc.,
-* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
-*
-*
 ******************************************************************************/
 
-/*Image2HeaderVersion: 3.1*/
+/*Image2HeaderVersion: R2 1.2.1*/
 #include "mp_precomp.h"
 #include "../phydm_precomp.h"
 
 #if (RTL8822B_SUPPORT == 1)
-static bool
+static boolean
 check_positive(
 	struct PHY_DM_STRUCT *p_dm_odm,
 	const u32	condition1,
@@ -32,19 +27,17 @@ check_positive(
 	const u32	condition4
 )
 {
-	u8	_board_type = ((p_dm_odm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/
-			((p_dm_odm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/
-			((p_dm_odm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/
-			((p_dm_odm->board_type & BIT(6)) >> 6) << 3 | /* _APA */
-			((p_dm_odm->board_type & BIT(2)) >> 2) << 4;  /* _BT*/
-
 	u32	cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4;
-	u32	driver1 = p_dm_odm->cut_version << 24 |
+
+	u8	cut_version_for_para = (p_dm_odm->cut_version ==  ODM_CUT_A) ? 15 : p_dm_odm->cut_version;
+	u8	pkg_type_for_para = (p_dm_odm->package_type == 0) ? 15 : p_dm_odm->package_type;
+
+	u32	driver1 = cut_version_for_para << 24 |
 			(p_dm_odm->support_interface & 0xF0) << 16 |
 			p_dm_odm->support_platform << 16 |
-			p_dm_odm->package_type << 12 |
+			pkg_type_for_para << 12 |
 			(p_dm_odm->support_interface & 0x0F) << 8  |
-			_board_type;
+			p_dm_odm->rfe_type;
 
 	u32	driver2 = (p_dm_odm->type_glna & 0xFF) <<  0 |
 			(p_dm_odm->type_gpa & 0xFF)  <<  8 |
@@ -66,46 +59,32 @@ check_positive(
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_TRACE,
 	("	(Platform, Interface) = (0x%X, 0x%X)\n", p_dm_odm->support_platform, p_dm_odm->support_interface));
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_TRACE,
-	("	(Board, Package) = (0x%X, 0x%X)\n", p_dm_odm->board_type, p_dm_odm->package_type));
+	("	(RFE, Package) = (0x%X, 0x%X)\n", p_dm_odm->rfe_type, p_dm_odm->package_type));
 
 
 	/*============== value Defined Check ===============*/
-	/*QFN type [15:12] and cut version [27:24] need to do value check*/
+	/*cut version [27:24] need to do value check*/
 
-	if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000)))
-		return false;
 	if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000)))
 		return false;
 
+	/*pkg type [15:12] need to do value check*/
+
+	if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000)))
+		return false;
+
 	/*=============== Bit Defined Check ================*/
 	/* We don't care [31:28] */
 
-	cond1 &= 0x00FF0FFF;
-	driver1 &= 0x00FF0FFF;
-
-	if ((cond1 & driver1) == cond1) {
-		u32	bit_mask = 0;
-
-		if ((cond1 & 0x0F) == 0) /* board_type is DONTCARE*/
-			return true;
-
-		if ((cond1 & BIT(0)) != 0) /*GLNA*/
-			bit_mask |= 0x000000FF;
-		if ((cond1 & BIT(1)) != 0) /*GPA*/
-			bit_mask |= 0x0000FF00;
-		if ((cond1 & BIT(2)) != 0) /*ALNA*/
-			bit_mask |= 0x00FF0000;
-		if ((cond1 & BIT(3)) != 0) /*APA*/
-			bit_mask |= 0xFF000000;
-
-		if (((cond2 & bit_mask) == (driver2 & bit_mask)) && ((cond4 & bit_mask) == (driver4 & bit_mask)))  /* board_type of each RF path is matched*/
-			return true;
-		else
-			return false;
-	} else
+	cond1 &= 0x000000FF;
+	driver1 &= 0x000000FF;
+
+	if (cond1 == driver1)
+		return true;
+	else
 		return false;
 }
-static bool
+static boolean
 check_negative(
 	struct PHY_DM_STRUCT *p_dm_odm,
 	const u32	condition1,
@@ -121,38 +100,44 @@ check_negative(
 
 u32 array_mp_8822b_radioa[] = {
 		0x000, 0x00030000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x001, 0x0004002D,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
-		0x001, 0x0004002D,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
-		0x001, 0x0004002D,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x0004002D,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x001, 0x0004002D,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
+		0x001, 0x00040029,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
+		0x001, 0x00040029,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x0004002D,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
+		0x001, 0x00040029,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x0004002D,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x0004002D,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x00040029,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x00040029,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x00040029,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x00040029,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x00040029,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
+		0x001, 0x0004002D,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x00040029,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x00040029,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x001, 0x0004002D,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x00040029,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x001, 0x0004002D,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x001, 0x0004002D,
 	0xA0000000,	0x00000000,
 		0x001, 0x00040029,
 	0xB0000000,	0x00000000,
@@ -160,7 +145,11 @@ u32 array_mp_8822b_radioa[] = {
 		0x0EF, 0x00080000,
 		0x033, 0x00000002,
 		0x03E, 0x0000003F,
+	0x8300000c,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000D0F4E,
+	0xA0000000,	0x00000000,
 		0x03F, 0x000C0F4E,
+	0xB0000000,	0x00000000,
 		0x033, 0x00000001,
 		0x03E, 0x00000034,
 		0x03F, 0x0004080E,
@@ -181,67 +170,79 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x000DEFCE,
 		0x0EF, 0x00000000,
 		0x07F, 0x00000000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x0B0, 0x000FF0F8,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
 		0x0B0, 0x000FF0F8,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x0B0, 0x000FF0F8,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
+		0x0B0, 0x000FB0F8,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
+		0x0B0, 0x000FB0F8,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
+		0x0B0, 0x000FB0F8,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
 		0x0B0, 0x000FB0F8,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x0B0, 0x000FF0F8,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x0B0, 0x000FF0F8,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
+		0x0B0, 0x000FB0F8,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
+		0x0B0, 0x000FF0F8,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
 		0x0B0, 0x000FF0F8,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x0B0, 0x000FB0F8,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
 		0x0B0, 0x000FB0F8,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
+		0x0B0, 0x000FF0F8,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
+		0x0B0, 0x000FF0F8,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
+		0x0B0, 0x000FF0F8,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
 		0x0B0, 0x000FB0F8,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
 		0x0B0, 0x000FB0F8,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
 		0x0B0, 0x000FB0F8,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
-		0x0B0, 0x000FF0F8,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
 		0x0B0, 0x000FB0F8,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x0B0, 0x000FF0F8,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x0B0, 0x000FF0F8,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
-		0x0B0, 0x000FB0F8,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
-		0x0B0, 0x000FB0F8,
 	0xA0000000,	0x00000000,
 		0x0B0, 0x000FF0F8,
 	0xB0000000,	0x00000000,
 		0x0B1, 0x0007DBE4,
 		0x0B2, 0x000225D1,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
+		0x0B3, 0x000FC760,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x0B3, 0x000FC760,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x0B3, 0x000FC760,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
+		0x0B3, 0x0007C330,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x0B3, 0x000FC760,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x0B3, 0x000FC760,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
 		0x0B3, 0x000FC760,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x0B3, 0x000FC760,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x0B3, 0x000FC760,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
 		0x0B3, 0x000FC760,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x0B3, 0x000FC760,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x0B3, 0x000FC760,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
-		0x0B3, 0x0007C330,
 	0xA0000000,	0x00000000,
 		0x0B3, 0x000FC760,
 	0xB0000000,	0x00000000,
@@ -266,7 +267,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x0C6, 0x00040299,
 		0x0C7, 0x00055555,
 		0x0C8, 0x0000C16C,
-		0x0C9, 0x0001C140,
+		0x0C9, 0x0001C146,
 		0x0CA, 0x00000000,
 		0x0CB, 0x00000000,
 		0x0CC, 0x00000000,
@@ -276,28 +277,30 @@ u32 array_mp_8822b_radioa[] = {
 		0x0DF, 0x00000009,
 		0x018, 0x00010524,
 		0x089, 0x00000207,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
 		0x08A, 0x000FF186,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
-		0x08A, 0x000FE186,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
-		0x08A, 0x000FF186,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x08A, 0x000FF186,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x08A, 0x000FF186,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
+		0x08A, 0x000FE186,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x08A, 0x000FE186,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x08A, 0x000FF186,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
 		0x08A, 0x000FF186,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x08A, 0x000FF186,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x08A, 0x000FF186,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x08A, 0x000FF186,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x08A, 0x000FE186,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x08A, 0x000FF186,
 	0xA0000000,	0x00000000,
 		0x08A, 0x000FF186,
 	0xB0000000,	0x00000000,
@@ -307,246 +310,300 @@ u32 array_mp_8822b_radioa[] = {
 		0x08E, 0x00064D40,
 		0x0EF, 0x00020000,
 		0x033, 0x00000007,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
-		0x03E, 0x00004080,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004080,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004000,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004000,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
 	0xA0000000,	0x00000000,
 		0x03E, 0x00004000,
 	0xB0000000,	0x00000000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C0006,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000DFF86,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C0006,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000DFF86,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
-		0x03F, 0x000C0006,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C3186,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C3186,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C3186,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
 	0xA0000000,	0x00000000,
 		0x03F, 0x000C3186,
 	0xB0000000,	0x00000000,
 		0x033, 0x00000006,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004080,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004080,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004080,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004080,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004080,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004080,
 	0xA0000000,	0x00000000,
 		0x03E, 0x00004080,
 	0xB0000000,	0x00000000,
 		0x03F, 0x000C3186,
 		0x033, 0x00000005,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x000040C8,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x000040C8,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x000040C8,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x000040C8,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x000040C8,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004084,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x000040C8,
 	0xA0000000,	0x00000000,
 		0x03E, 0x000040C8,
 	0xB0000000,	0x00000000,
 		0x03F, 0x000C3186,
 		0x033, 0x00000004,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004190,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004190,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004190,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004190,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004190,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004108,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004190,
 	0xA0000000,	0x00000000,
 		0x03E, 0x00004190,
 	0xB0000000,	0x00000000,
 		0x03F, 0x000C3186,
 		0x033, 0x00000003,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004998,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004998,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004998,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004998,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004998,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x0000490C,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004998,
 	0xA0000000,	0x00000000,
 		0x03E, 0x00004998,
 	0xB0000000,	0x00000000,
 		0x03F, 0x000C3186,
 		0x033, 0x00000002,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00005840,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00005840,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00005840,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00005840,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00005840,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00005E00,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00005840,
 	0xA0000000,	0x00000000,
 		0x03E, 0x00005840,
 	0xB0000000,	0x00000000,
 		0x03F, 0x000C3186,
 		0x033, 0x00000001,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x000058C2,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x000058C2,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x000058C2,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x000058C2,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x000058C2,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00005862,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x000058C2,
 	0xA0000000,	0x00000000,
 		0x03E, 0x000058C2,
 	0xB0000000,	0x00000000,
 		0x03F, 0x000C3186,
 		0x033, 0x00000000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00005930,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00005930,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00005930,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00005930,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00005930,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00005948,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00005930,
 	0xA0000000,	0x00000000,
 		0x03E, 0x00005930,
 	0xB0000000,	0x00000000,
 		0x03F, 0x000C3186,
 		0x033, 0x0000000F,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
-		0x03E, 0x00004080,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004080,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004000,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004000,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004080,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
 	0xA0000000,	0x00000000,
 		0x03E, 0x00004000,
 	0xB0000000,	0x00000000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C0006,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000DFF86,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000DFF86,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
-		0x03F, 0x000DFF86,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
-		0x03F, 0x000DFF86,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C0006,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
-		0x03F, 0x000C0006,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C3186,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C3186,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C3186,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C3186,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
 	0xA0000000,	0x00000000,
 		0x03F, 0x000C3186,
@@ -573,64 +630,84 @@ u32 array_mp_8822b_radioa[] = {
 		0x03E, 0x00005930,
 		0x03F, 0x000C3186,
 		0x033, 0x00000017,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
-		0x03E, 0x00004080,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004080,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004000,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004000,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004080,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
 	0xA0000000,	0x00000000,
 		0x03E, 0x00004000,
 	0xB0000000,	0x00000000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C0006,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C0006,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
-		0x03F, 0x000C0006,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C3186,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C3186,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C3186,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C3186,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
 	0xA0000000,	0x00000000,
 		0x03F, 0x000C3186,
@@ -661,39 +738,49 @@ u32 array_mp_8822b_radioa[] = {
 		0x033, 0x00000000,
 		0x03F, 0x0000000A,
 		0x033, 0x00000001,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000005,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000006,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000005,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000005,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000005,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
-		0x03F, 0x00000006,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000005,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
-		0x03F, 0x00000005,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000000,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
 	0xA0000000,	0x00000000,
 		0x03F, 0x00000005,
@@ -704,21 +791,23 @@ u32 array_mp_8822b_radioa[] = {
 		0x018, 0x00000401,
 		0x084, 0x00001209,
 		0x086, 0x000001A0,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
 		0x087, 0x00068080,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x087, 0x00068080,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x087, 0x00068080,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x087, 0x00068080,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x087, 0x00068080,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x087, 0x00068080,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
 		0x087, 0x00068080,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x087, 0x00068080,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x087, 0x00068080,
 	0xA0000000,	0x00000000,
 		0x087, 0x000E8180,
@@ -760,11 +849,15 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000008,
 		0x0EF, 0x00000000,
 		0x0B8, 0x00080A00,
+		0x0FE, 0x00000000,
 		0x0B0, 0x000FF0FA,
 		0x0FE, 0x00000000,
+		0x0FE, 0x00000000,
 		0x0CA, 0x00080000,
+		0x0FE, 0x00000000,
 		0x0C9, 0x0001C141,
 		0x0FE, 0x00000000,
+		0x0FE, 0x00000000,
 		0x0B0, 0x000FF0F8,
 		0x018, 0x00018D24,
 		0xFFE, 0x00000000,
@@ -787,84 +880,119 @@ u32 array_mp_8822b_radioa[] = {
 		0x033, 0x00000005,
 		0x03F, 0x00000006,
 		0x033, 0x00000006,
-		0x03F, 0x00000002,
+		0x03F, 0x00000004,
 		0x033, 0x00000007,
 		0x03F, 0x00000000,
 		0x0EE, 0x00000000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x061, 0x0005D4A0,
-		0x062, 0x0000D203,
-		0x063, 0x00000062,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
-		0x061, 0x0005D4A0,
-		0x062, 0x0000D203,
-		0x063, 0x00000062,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
-		0x061, 0x0005D4A0,
-		0x062, 0x0000D203,
-		0x063, 0x00000062,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
-		0x061, 0x0005D2A1,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D3D1,
 		0x062, 0x0000D3A2,
-		0x063, 0x00000062,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x061, 0x0005D4A0,
-		0x062, 0x0000D203,
-		0x063, 0x00000062,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
-		0x061, 0x0005D4A0,
-		0x062, 0x0000D203,
-		0x063, 0x00000062,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+		0x063, 0x00000002,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x061, 0x0005D4A0,
 		0x062, 0x0000D203,
 		0x063, 0x00000062,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x061, 0x0005D2A1,
 		0x062, 0x0000D3A2,
 		0x063, 0x00000062,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D301,
+		0x062, 0x0000D303,
+		0x063, 0x00000002,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x061, 0x0005D2A1,
 		0x062, 0x0000D3A2,
 		0x063, 0x00000062,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
 		0x061, 0x0005D301,
 		0x062, 0x0000D303,
 		0x063, 0x00000002,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D4A0,
+		0x062, 0x0000D203,
+		0x063, 0x00000062,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D4A0,
+		0x062, 0x0000D203,
+		0x063, 0x00000062,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
 		0x061, 0x0005D301,
 		0x062, 0x0000D303,
 		0x063, 0x00000002,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
-		0x061, 0x0005D2A1,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D3D1,
 		0x062, 0x0000D3A2,
-		0x063, 0x00000062,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+		0x063, 0x00000002,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
 		0x061, 0x0005D3D1,
 		0x062, 0x0000D3A2,
 		0x063, 0x00000002,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D4A0,
+		0x062, 0x0000D203,
+		0x063, 0x00000062,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
 		0x061, 0x0005D301,
 		0x062, 0x0000D303,
 		0x063, 0x00000002,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
 		0x061, 0x0005D3D1,
 		0x062, 0x0000D3A2,
 		0x063, 0x00000002,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D3D1,
+		0x062, 0x0000D3A2,
+		0x063, 0x00000002,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D4A0,
+		0x062, 0x0000D203,
+		0x063, 0x00000062,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D2A1,
+		0x062, 0x0000D3A2,
+		0x063, 0x00000062,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
 		0x061, 0x0005D301,
 		0x062, 0x0000D303,
 		0x063, 0x00000002,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D2A1,
+		0x062, 0x0000D3A2,
+		0x063, 0x00000062,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
 		0x061, 0x0005D301,
 		0x062, 0x0000D303,
 		0x063, 0x00000002,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D4A0,
+		0x062, 0x0000D203,
+		0x063, 0x00000062,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D4A0,
+		0x062, 0x0000D203,
+		0x063, 0x00000062,
 	0xA0000000,	0x00000000,
 		0x061, 0x0005D3D0,
 		0x062, 0x0000D303,
 		0x063, 0x00000002,
 	0xB0000000,	0x00000000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000200,
+		0x030, 0x000003A2,
+		0x030, 0x000013A2,
+		0x030, 0x000023A2,
+		0x030, 0x000033A2,
+		0x030, 0x000043A2,
+		0x030, 0x000053A2,
+		0x030, 0x000063A2,
+		0x030, 0x000073A2,
+		0x030, 0x000083A3,
+		0x030, 0x000093A3,
+		0x030, 0x0000A3A3,
+		0x030, 0x0000B3A3,
+		0x0EF, 0x00000000,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000200,
 		0x030, 0x000004A3,
 		0x030, 0x000014A3,
@@ -879,7 +1007,67 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x0000A4A3,
 		0x030, 0x0000B4A3,
 		0x0EF, 0x00000000,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000200,
+		0x030, 0x000002A6,
+		0x030, 0x000012A6,
+		0x030, 0x000022A6,
+		0x030, 0x000032A6,
+		0x030, 0x000042A6,
+		0x030, 0x000052A6,
+		0x030, 0x000062A6,
+		0x030, 0x000072A6,
+		0x030, 0x000082A6,
+		0x030, 0x000092A6,
+		0x030, 0x0000A2A6,
+		0x030, 0x0000B2A6,
+		0x0EF, 0x00000000,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000200,
+		0x030, 0x00000303,
+		0x030, 0x00001303,
+		0x030, 0x00002303,
+		0x030, 0x00003303,
+		0x030, 0x000043A4,
+		0x030, 0x000053A4,
+		0x030, 0x000063A4,
+		0x030, 0x000073A4,
+		0x030, 0x00008365,
+		0x030, 0x00009365,
+		0x030, 0x0000A365,
+		0x030, 0x0000B365,
+		0x0EF, 0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000200,
+		0x030, 0x000002A6,
+		0x030, 0x000012A6,
+		0x030, 0x000022A6,
+		0x030, 0x000032A6,
+		0x030, 0x000042A6,
+		0x030, 0x000052A6,
+		0x030, 0x000062A6,
+		0x030, 0x000072A6,
+		0x030, 0x000082A6,
+		0x030, 0x000092A6,
+		0x030, 0x0000A2A6,
+		0x030, 0x0000B2A6,
+		0x0EF, 0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000200,
+		0x030, 0x000003A3,
+		0x030, 0x000013A3,
+		0x030, 0x000023A3,
+		0x030, 0x000033A3,
+		0x030, 0x00004355,
+		0x030, 0x00005355,
+		0x030, 0x00006355,
+		0x030, 0x00007355,
+		0x030, 0x00008314,
+		0x030, 0x00009314,
+		0x030, 0x0000A314,
+		0x030, 0x0000B314,
+		0x0EF, 0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000200,
 		0x030, 0x000004A3,
 		0x030, 0x000014A3,
@@ -894,7 +1082,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x0000A4A3,
 		0x030, 0x0000B4A3,
 		0x0EF, 0x00000000,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000200,
 		0x030, 0x000004A3,
 		0x030, 0x000014A3,
@@ -909,52 +1097,112 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x0000A4A3,
 		0x030, 0x0000B4A3,
 		0x0EF, 0x00000000,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000200,
-		0x030, 0x000002A6,
-		0x030, 0x000012A6,
-		0x030, 0x000022A6,
-		0x030, 0x000032A6,
-		0x030, 0x000042A6,
-		0x030, 0x000052A6,
-		0x030, 0x000062A6,
-		0x030, 0x000072A6,
-		0x030, 0x000082A6,
-		0x030, 0x000092A6,
-		0x030, 0x0000A2A6,
-		0x030, 0x0000B2A6,
+		0x030, 0x00000384,
+		0x030, 0x00001384,
+		0x030, 0x00002384,
+		0x030, 0x00003384,
+		0x030, 0x00004425,
+		0x030, 0x00005425,
+		0x030, 0x00006425,
+		0x030, 0x00007425,
+		0x030, 0x000084A6,
+		0x030, 0x000094A6,
+		0x030, 0x0000A4A6,
+		0x030, 0x0000B4A6,
 		0x0EF, 0x00000000,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000200,
-		0x030, 0x000004A0,
-		0x030, 0x000014A0,
-		0x030, 0x000024A0,
-		0x030, 0x000034A0,
-		0x030, 0x000044A0,
-		0x030, 0x000054A0,
-		0x030, 0x000064A0,
-		0x030, 0x000074A0,
-		0x030, 0x000084A0,
-		0x030, 0x000094A0,
-		0x030, 0x0000A4A0,
-		0x030, 0x0000B4A0,
+		0x030, 0x00000463,
+		0x030, 0x00001463,
+		0x030, 0x00002463,
+		0x030, 0x00003463,
+		0x030, 0x00004545,
+		0x030, 0x00005545,
+		0x030, 0x00006545,
+		0x030, 0x00007545,
+		0x030, 0x00008565,
+		0x030, 0x00009565,
+		0x030, 0x0000A565,
+		0x030, 0x0000B565,
 		0x0EF, 0x00000000,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000200,
-		0x030, 0x000004A0,
-		0x030, 0x000014A0,
-		0x030, 0x000024A0,
-		0x030, 0x000034A0,
-		0x030, 0x000044A0,
-		0x030, 0x000054A0,
-		0x030, 0x000064A0,
-		0x030, 0x000074A0,
-		0x030, 0x000084A0,
-		0x030, 0x000094A0,
-		0x030, 0x0000A4A0,
-		0x030, 0x0000B4A0,
+		0x030, 0x000003A2,
+		0x030, 0x000013A2,
+		0x030, 0x000023A2,
+		0x030, 0x000033A2,
+		0x030, 0x000043A2,
+		0x030, 0x000053A2,
+		0x030, 0x000063A2,
+		0x030, 0x000073A2,
+		0x030, 0x000083A3,
+		0x030, 0x000093A3,
+		0x030, 0x0000A3A3,
+		0x030, 0x0000B3A3,
 		0x0EF, 0x00000000,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000200,
+		0x030, 0x000004A3,
+		0x030, 0x000014A3,
+		0x030, 0x000024A3,
+		0x030, 0x000034A3,
+		0x030, 0x000044A3,
+		0x030, 0x000054A3,
+		0x030, 0x000064A3,
+		0x030, 0x000074A3,
+		0x030, 0x000084A3,
+		0x030, 0x000094A3,
+		0x030, 0x0000A4A3,
+		0x030, 0x0000B4A3,
+		0x0EF, 0x00000000,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000200,
+		0x030, 0x00000443,
+		0x030, 0x00001443,
+		0x030, 0x00002443,
+		0x030, 0x00003443,
+		0x030, 0x000043A4,
+		0x030, 0x000053A4,
+		0x030, 0x000063A4,
+		0x030, 0x000073A4,
+		0x030, 0x00008365,
+		0x030, 0x00009365,
+		0x030, 0x0000A365,
+		0x030, 0x0000B365,
+		0x0EF, 0x00000000,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000200,
+		0x030, 0x00000443,
+		0x030, 0x00001443,
+		0x030, 0x00002443,
+		0x030, 0x00003443,
+		0x030, 0x00004383,
+		0x030, 0x00005383,
+		0x030, 0x00006383,
+		0x030, 0x00007383,
+		0x030, 0x000084A4,
+		0x030, 0x000094A4,
+		0x030, 0x0000A4A4,
+		0x030, 0x0000B4A4,
+		0x0EF, 0x00000000,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000200,
+		0x030, 0x00000363,
+		0x030, 0x00001363,
+		0x030, 0x00002363,
+		0x030, 0x00003363,
+		0x030, 0x000043A3,
+		0x030, 0x000053A3,
+		0x030, 0x000063A3,
+		0x030, 0x000073A3,
+		0x030, 0x000084A4,
+		0x030, 0x000094A4,
+		0x030, 0x0000A4A4,
+		0x030, 0x0000B4A4,
+		0x0EF, 0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000200,
 		0x030, 0x000004A0,
 		0x030, 0x000014A0,
@@ -969,7 +1217,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x0000A4A0,
 		0x030, 0x0000B4A0,
 		0x0EF, 0x00000000,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000200,
 		0x030, 0x000002A1,
 		0x030, 0x000012A1,
@@ -984,52 +1232,22 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x0000A2A1,
 		0x030, 0x0000B2A1,
 		0x0EF, 0x00000000,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
-		0x0EF, 0x00000200,
-		0x030, 0x000002A6,
-		0x030, 0x000012A6,
-		0x030, 0x000022A6,
-		0x030, 0x000032A6,
-		0x030, 0x000042A6,
-		0x030, 0x000052A6,
-		0x030, 0x000062A6,
-		0x030, 0x000072A6,
-		0x030, 0x000082A6,
-		0x030, 0x000092A6,
-		0x030, 0x0000A2A6,
-		0x030, 0x0000B2A6,
-		0x0EF, 0x00000000,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000200,
-		0x030, 0x00000384,
-		0x030, 0x00001384,
-		0x030, 0x00002384,
-		0x030, 0x00003384,
-		0x030, 0x00004425,
-		0x030, 0x00005425,
-		0x030, 0x00006425,
-		0x030, 0x00007425,
-		0x030, 0x000083A4,
-		0x030, 0x000093A4,
-		0x030, 0x0000A3A4,
-		0x030, 0x0000B3A4,
-		0x0EF, 0x00000000,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
-		0x0EF, 0x00000200,
-		0x030, 0x000003A3,
-		0x030, 0x000013A3,
-		0x030, 0x000023A3,
-		0x030, 0x000033A3,
-		0x030, 0x00004355,
-		0x030, 0x00005355,
-		0x030, 0x00006355,
-		0x030, 0x00007355,
-		0x030, 0x00008365,
-		0x030, 0x00009365,
-		0x030, 0x0000A365,
-		0x030, 0x0000B365,
+		0x030, 0x000003A0,
+		0x030, 0x000013A0,
+		0x030, 0x000023A0,
+		0x030, 0x000033A0,
+		0x030, 0x000043A1,
+		0x030, 0x000053A1,
+		0x030, 0x000063A1,
+		0x030, 0x000073A1,
+		0x030, 0x000083A2,
+		0x030, 0x000093A2,
+		0x030, 0x0000A3A2,
+		0x030, 0x0000B3A2,
 		0x0EF, 0x00000000,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000200,
 		0x030, 0x000002A1,
 		0x030, 0x000012A1,
@@ -1044,52 +1262,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x0000A2A1,
 		0x030, 0x0000B2A1,
 		0x0EF, 0x00000000,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
-		0x0EF, 0x00000200,
-		0x030, 0x00000463,
-		0x030, 0x00001463,
-		0x030, 0x00002463,
-		0x030, 0x00003463,
-		0x030, 0x00004545,
-		0x030, 0x00005545,
-		0x030, 0x00006545,
-		0x030, 0x00007545,
-		0x030, 0x00008565,
-		0x030, 0x00009565,
-		0x030, 0x0000A565,
-		0x030, 0x0000B565,
-		0x0EF, 0x00000000,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
-		0x0EF, 0x00000200,
-		0x030, 0x00000303,
-		0x030, 0x00001303,
-		0x030, 0x00002303,
-		0x030, 0x00003303,
-		0x030, 0x000043A4,
-		0x030, 0x000053A4,
-		0x030, 0x000063A4,
-		0x030, 0x000073A4,
-		0x030, 0x00008365,
-		0x030, 0x00009365,
-		0x030, 0x0000A365,
-		0x030, 0x0000B365,
-		0x0EF, 0x00000000,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
-		0x0EF, 0x00000200,
-		0x030, 0x000003A2,
-		0x030, 0x000013A2,
-		0x030, 0x000023A2,
-		0x030, 0x000033A2,
-		0x030, 0x00004343,
-		0x030, 0x00005343,
-		0x030, 0x00006343,
-		0x030, 0x00007343,
-		0x030, 0x00008364,
-		0x030, 0x00009364,
-		0x030, 0x0000A364,
-		0x030, 0x0000B364,
-		0x0EF, 0x00000000,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000200,
 		0x030, 0x000003A0,
 		0x030, 0x000013A0,
@@ -1104,20 +1277,35 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x0000A372,
 		0x030, 0x0000B372,
 		0x0EF, 0x00000000,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000200,
-		0x030, 0x000003A0,
-		0x030, 0x000013A0,
-		0x030, 0x000023A0,
-		0x030, 0x000033A0,
-		0x030, 0x000043A1,
-		0x030, 0x000053A1,
-		0x030, 0x000063A1,
-		0x030, 0x000073A1,
-		0x030, 0x000083A2,
-		0x030, 0x000093A2,
-		0x030, 0x0000A3A2,
-		0x030, 0x0000B3A2,
+		0x030, 0x000004A0,
+		0x030, 0x000014A0,
+		0x030, 0x000024A0,
+		0x030, 0x000034A0,
+		0x030, 0x000044A0,
+		0x030, 0x000054A0,
+		0x030, 0x000064A0,
+		0x030, 0x000074A0,
+		0x030, 0x000084A0,
+		0x030, 0x000094A0,
+		0x030, 0x0000A4A0,
+		0x030, 0x0000B4A0,
+		0x0EF, 0x00000000,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000200,
+		0x030, 0x000004A0,
+		0x030, 0x000014A0,
+		0x030, 0x000024A0,
+		0x030, 0x000034A0,
+		0x030, 0x000044A0,
+		0x030, 0x000054A0,
+		0x030, 0x000064A0,
+		0x030, 0x000074A0,
+		0x030, 0x000084A0,
+		0x030, 0x000094A0,
+		0x030, 0x0000A4A0,
+		0x030, 0x0000B4A0,
 		0x0EF, 0x00000000,
 	0xA0000000,	0x00000000,
 		0x0EF, 0x00000200,
@@ -1135,21 +1323,21 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x0000B3D0,
 		0x0EF, 0x00000000,
 	0xB0000000,	0x00000000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000080,
-		0x030, 0x00000203,
-		0x030, 0x00001203,
-		0x030, 0x00002203,
-		0x030, 0x00003203,
-		0x030, 0x00004203,
-		0x030, 0x00005203,
-		0x030, 0x00006203,
-		0x030, 0x00007203,
-		0x030, 0x00008203,
-		0x030, 0x00009203,
-		0x030, 0x0000A203,
-		0x030, 0x0000B203,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+		0x030, 0x000003A2,
+		0x030, 0x000013A2,
+		0x030, 0x000023A2,
+		0x030, 0x000033A2,
+		0x030, 0x000043A2,
+		0x030, 0x000053A2,
+		0x030, 0x000063A2,
+		0x030, 0x000073A2,
+		0x030, 0x000083A2,
+		0x030, 0x000093A2,
+		0x030, 0x0000A3A2,
+		0x030, 0x0000B3A2,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000080,
 		0x030, 0x00000203,
 		0x030, 0x00001203,
@@ -1163,21 +1351,21 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x00009203,
 		0x030, 0x0000A203,
 		0x030, 0x0000B203,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000080,
-		0x030, 0x00000203,
-		0x030, 0x00001203,
-		0x030, 0x00002203,
-		0x030, 0x00003203,
-		0x030, 0x00004203,
-		0x030, 0x00005203,
-		0x030, 0x00006203,
-		0x030, 0x00007203,
-		0x030, 0x00008203,
-		0x030, 0x00009203,
-		0x030, 0x0000A203,
-		0x030, 0x0000B203,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x000003A2,
+		0x030, 0x000013A2,
+		0x030, 0x000023A2,
+		0x030, 0x000033A2,
+		0x030, 0x000043A2,
+		0x030, 0x000053A2,
+		0x030, 0x000063A2,
+		0x030, 0x000073A2,
+		0x030, 0x000083A2,
+		0x030, 0x000093A2,
+		0x030, 0x0000A3A2,
+		0x030, 0x0000B3A2,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000080,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
@@ -1191,21 +1379,35 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x000093A2,
 		0x030, 0x0000A3A2,
 		0x030, 0x0000B3A2,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000080,
-		0x030, 0x00000203,
-		0x030, 0x00001203,
-		0x030, 0x00002203,
-		0x030, 0x00003203,
-		0x030, 0x00004203,
-		0x030, 0x00005203,
-		0x030, 0x00006203,
-		0x030, 0x00007203,
-		0x030, 0x00008203,
-		0x030, 0x00009203,
-		0x030, 0x0000A203,
-		0x030, 0x0000B203,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+		0x030, 0x000003A2,
+		0x030, 0x000013A2,
+		0x030, 0x000023A2,
+		0x030, 0x000033A2,
+		0x030, 0x000043A2,
+		0x030, 0x000053A2,
+		0x030, 0x000063A2,
+		0x030, 0x000073A2,
+		0x030, 0x000083A2,
+		0x030, 0x000093A2,
+		0x030, 0x0000A3A2,
+		0x030, 0x0000B3A2,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000080,
+		0x030, 0x000003A2,
+		0x030, 0x000013A2,
+		0x030, 0x000023A2,
+		0x030, 0x000033A2,
+		0x030, 0x000043A2,
+		0x030, 0x000053A2,
+		0x030, 0x000063A2,
+		0x030, 0x000073A2,
+		0x030, 0x000083A2,
+		0x030, 0x000093A2,
+		0x030, 0x0000A3A2,
+		0x030, 0x0000B3A2,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000080,
 		0x030, 0x00000203,
 		0x030, 0x00001203,
@@ -1219,7 +1421,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x00009203,
 		0x030, 0x0000A203,
 		0x030, 0x0000B203,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000080,
 		0x030, 0x00000203,
 		0x030, 0x00001203,
@@ -1233,7 +1435,21 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x00009203,
 		0x030, 0x0000A203,
 		0x030, 0x0000B203,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000080,
+		0x030, 0x000003A3,
+		0x030, 0x000013A3,
+		0x030, 0x000023A3,
+		0x030, 0x000033A3,
+		0x030, 0x000043A3,
+		0x030, 0x000053A3,
+		0x030, 0x000063A3,
+		0x030, 0x000073A3,
+		0x030, 0x000083A3,
+		0x030, 0x000093A3,
+		0x030, 0x0000A3A3,
+		0x030, 0x0000B3A3,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000080,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
@@ -1247,7 +1463,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x000093A2,
 		0x030, 0x0000A3A2,
 		0x030, 0x0000B3A2,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000080,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
@@ -1261,21 +1477,21 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x000093A2,
 		0x030, 0x0000A3A2,
 		0x030, 0x0000B3A2,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000080,
-		0x030, 0x000003A3,
-		0x030, 0x000013A3,
-		0x030, 0x000023A3,
-		0x030, 0x000033A3,
-		0x030, 0x000043A3,
-		0x030, 0x000053A3,
-		0x030, 0x000063A3,
-		0x030, 0x000073A3,
-		0x030, 0x000083A3,
-		0x030, 0x000093A3,
-		0x030, 0x0000A3A3,
-		0x030, 0x0000B3A3,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000203,
+		0x030, 0x00001203,
+		0x030, 0x00002203,
+		0x030, 0x00003203,
+		0x030, 0x00004203,
+		0x030, 0x00005203,
+		0x030, 0x00006203,
+		0x030, 0x00007203,
+		0x030, 0x00008203,
+		0x030, 0x00009203,
+		0x030, 0x0000A203,
+		0x030, 0x0000B203,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000080,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
@@ -1289,7 +1505,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x000093A2,
 		0x030, 0x0000A3A2,
 		0x030, 0x0000B3A2,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000080,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
@@ -1303,7 +1519,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x000093A2,
 		0x030, 0x0000A3A2,
 		0x030, 0x0000B3A2,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000080,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
@@ -1317,7 +1533,21 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x000093A2,
 		0x030, 0x0000A3A2,
 		0x030, 0x0000B3A2,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000080,
+		0x030, 0x00000203,
+		0x030, 0x00001203,
+		0x030, 0x00002203,
+		0x030, 0x00003203,
+		0x030, 0x00004203,
+		0x030, 0x00005203,
+		0x030, 0x00006203,
+		0x030, 0x00007203,
+		0x030, 0x00008203,
+		0x030, 0x00009203,
+		0x030, 0x0000A203,
+		0x030, 0x0000B203,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000080,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
@@ -1331,7 +1561,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x000093A2,
 		0x030, 0x0000A3A2,
 		0x030, 0x0000B3A2,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000080,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
@@ -1345,7 +1575,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x000093A2,
 		0x030, 0x0000A3A2,
 		0x030, 0x0000B3A2,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000080,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
@@ -1359,7 +1589,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x000093A2,
 		0x030, 0x0000A3A2,
 		0x030, 0x0000B3A2,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000080,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
@@ -1373,6 +1603,34 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x000093A2,
 		0x030, 0x0000A3A2,
 		0x030, 0x0000B3A2,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000080,
+		0x030, 0x00000203,
+		0x030, 0x00001203,
+		0x030, 0x00002203,
+		0x030, 0x00003203,
+		0x030, 0x00004203,
+		0x030, 0x00005203,
+		0x030, 0x00006203,
+		0x030, 0x00007203,
+		0x030, 0x00008203,
+		0x030, 0x00009203,
+		0x030, 0x0000A203,
+		0x030, 0x0000B203,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000080,
+		0x030, 0x00000203,
+		0x030, 0x00001203,
+		0x030, 0x00002203,
+		0x030, 0x00003203,
+		0x030, 0x00004203,
+		0x030, 0x00005203,
+		0x030, 0x00006203,
+		0x030, 0x00007203,
+		0x030, 0x00008203,
+		0x030, 0x00009203,
+		0x030, 0x0000A203,
+		0x030, 0x0000B203,
 	0xA0000000,	0x00000000,
 		0x0EF, 0x00000080,
 		0x030, 0x000003A2,
@@ -1389,15 +1647,15 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x0000B3A2,
 	0xB0000000,	0x00000000,
 		0x0EF, 0x00000000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000040,
-		0x030, 0x00000645,
-		0x030, 0x00001333,
-		0x030, 0x00002011,
+		0x030, 0x00000764,
+		0x030, 0x00001632,
+		0x030, 0x00002421,
 		0x030, 0x00004000,
 		0x030, 0x00005000,
 		0x030, 0x00006000,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000040,
 		0x030, 0x00000645,
 		0x030, 0x00001333,
@@ -1405,39 +1663,39 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x00004000,
 		0x030, 0x00005000,
 		0x030, 0x00006000,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000040,
 		0x030, 0x00000645,
 		0x030, 0x00001333,
 		0x030, 0x00002011,
-		0x030, 0x00004000,
-		0x030, 0x00005000,
-		0x030, 0x00006000,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00004777,
+		0x030, 0x00005777,
+		0x030, 0x00006777,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000040,
-		0x030, 0x00000645,
-		0x030, 0x00001333,
-		0x030, 0x00002011,
+		0x030, 0x00000777,
+		0x030, 0x00001442,
+		0x030, 0x00002222,
 		0x030, 0x00004777,
 		0x030, 0x00005777,
 		0x030, 0x00006777,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000040,
 		0x030, 0x00000645,
 		0x030, 0x00001333,
 		0x030, 0x00002011,
-		0x030, 0x00004000,
-		0x030, 0x00005000,
-		0x030, 0x00006000,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+		0x030, 0x00004777,
+		0x030, 0x00005777,
+		0x030, 0x00006777,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000040,
-		0x030, 0x00000645,
-		0x030, 0x00001333,
-		0x030, 0x00002011,
-		0x030, 0x00004000,
-		0x030, 0x00005000,
-		0x030, 0x00006000,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000776,
+		0x030, 0x00001455,
+		0x030, 0x00002325,
+		0x030, 0x00004777,
+		0x030, 0x00005777,
+		0x030, 0x00006777,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000040,
 		0x030, 0x00000645,
 		0x030, 0x00001333,
@@ -1445,7 +1703,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x00004000,
 		0x030, 0x00005000,
 		0x030, 0x00006000,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000040,
 		0x030, 0x00000645,
 		0x030, 0x00001333,
@@ -1453,15 +1711,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x00004000,
 		0x030, 0x00005000,
 		0x030, 0x00006000,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
-		0x0EF, 0x00000040,
-		0x030, 0x00000645,
-		0x030, 0x00001333,
-		0x030, 0x00002011,
-		0x030, 0x00004777,
-		0x030, 0x00005777,
-		0x030, 0x00006777,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000040,
 		0x030, 0x00000660,
 		0x030, 0x00001443,
@@ -1469,23 +1719,15 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x00004777,
 		0x030, 0x00005777,
 		0x030, 0x00006777,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
-		0x0EF, 0x00000040,
-		0x030, 0x00000776,
-		0x030, 0x00001455,
-		0x030, 0x00002325,
-		0x030, 0x00004777,
-		0x030, 0x00005777,
-		0x030, 0x00006777,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000040,
-		0x030, 0x00000645,
-		0x030, 0x00001333,
-		0x030, 0x00002011,
+		0x030, 0x00000764,
+		0x030, 0x00001632,
+		0x030, 0x00002421,
 		0x030, 0x00004000,
 		0x030, 0x00005000,
 		0x030, 0x00006000,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000040,
 		0x030, 0x00000764,
 		0x030, 0x00001632,
@@ -1493,15 +1735,31 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x00004000,
 		0x030, 0x00005000,
 		0x030, 0x00006000,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000040,
-		0x030, 0x00000777,
+		0x030, 0x00000645,
+		0x030, 0x00001333,
+		0x030, 0x00002011,
+		0x030, 0x00004000,
+		0x030, 0x00005000,
+		0x030, 0x00006000,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000040,
+		0x030, 0x00000767,
 		0x030, 0x00001442,
 		0x030, 0x00002222,
 		0x030, 0x00004777,
 		0x030, 0x00005777,
 		0x030, 0x00006777,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000040,
+		0x030, 0x00000767,
+		0x030, 0x00001632,
+		0x030, 0x00002451,
+		0x030, 0x00004000,
+		0x030, 0x00005000,
+		0x030, 0x00006000,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000040,
 		0x030, 0x00000764,
 		0x030, 0x00001632,
@@ -1509,22 +1767,62 @@ u32 array_mp_8822b_radioa[] = {
 		0x030, 0x00004000,
 		0x030, 0x00005000,
 		0x030, 0x00006000,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000040,
+		0x030, 0x00000645,
+		0x030, 0x00001333,
+		0x030, 0x00002011,
+		0x030, 0x00004000,
+		0x030, 0x00005000,
+		0x030, 0x00006000,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000040,
+		0x030, 0x00000645,
+		0x030, 0x00001333,
+		0x030, 0x00002011,
+		0x030, 0x00004000,
+		0x030, 0x00005000,
+		0x030, 0x00006000,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000040,
 		0x030, 0x00000775,
-		0x030, 0x00001343,
+		0x030, 0x00001422,
 		0x030, 0x00002210,
 		0x030, 0x00004000,
 		0x030, 0x00005000,
 		0x030, 0x00006000,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000040,
+		0x030, 0x00000645,
+		0x030, 0x00001333,
+		0x030, 0x00002011,
+		0x030, 0x00004000,
+		0x030, 0x00005000,
+		0x030, 0x00006000,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
 		0x0EF, 0x00000040,
 		0x030, 0x00000775,
-		0x030, 0x00001422,
+		0x030, 0x00001343,
 		0x030, 0x00002210,
 		0x030, 0x00004000,
 		0x030, 0x00005000,
 		0x030, 0x00006000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000040,
+		0x030, 0x00000645,
+		0x030, 0x00001333,
+		0x030, 0x00002011,
+		0x030, 0x00004000,
+		0x030, 0x00005000,
+		0x030, 0x00006000,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000040,
+		0x030, 0x00000645,
+		0x030, 0x00001333,
+		0x030, 0x00002011,
+		0x030, 0x00004000,
+		0x030, 0x00005000,
+		0x030, 0x00006000,
 	0xA0000000,	0x00000000,
 		0x0EF, 0x00000040,
 		0x030, 0x00000764,
@@ -1536,30 +1834,30 @@ u32 array_mp_8822b_radioa[] = {
 	0xB0000000,	0x00000000,
 		0x0EF, 0x00000000,
 		0x0EF, 0x00000800,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
-		0x03F, 0x00000007,
+		0x03F, 0x00000C09,
 		0x033, 0x00000021,
-		0x03F, 0x0000000A,
+		0x03F, 0x00000C0C,
 		0x033, 0x00000022,
-		0x03F, 0x0000000D,
+		0x03F, 0x00000C0F,
 		0x033, 0x00000023,
-		0x03F, 0x0000002A,
+		0x03F, 0x00000C2C,
 		0x033, 0x00000024,
-		0x03F, 0x0000002D,
+		0x03F, 0x00000C2F,
 		0x033, 0x00000025,
-		0x03F, 0x00000030,
+		0x03F, 0x00000C8A,
 		0x033, 0x00000026,
-		0x03F, 0x0000006D,
+		0x03F, 0x00000C8D,
 		0x033, 0x00000027,
-		0x03F, 0x00000070,
+		0x03F, 0x00000C90,
 		0x033, 0x00000028,
-		0x03F, 0x000000ED,
+		0x03F, 0x00000CD0,
 		0x033, 0x00000029,
-		0x03F, 0x000000F0,
+		0x03F, 0x00000CF2,
 		0x033, 0x0000002A,
-		0x03F, 0x000000F3,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF5,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
 		0x03F, 0x00000007,
 		0x033, 0x00000021,
@@ -1582,30 +1880,53 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x000000F0,
 		0x033, 0x0000002A,
 		0x03F, 0x000000F3,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
-		0x03F, 0x00000007,
+		0x03F, 0x00000005,
 		0x033, 0x00000021,
-		0x03F, 0x0000000A,
+		0x03F, 0x00000008,
 		0x033, 0x00000022,
-		0x03F, 0x0000000D,
+		0x03F, 0x0000000B,
 		0x033, 0x00000023,
-		0x03F, 0x0000002A,
+		0x03F, 0x0000000E,
 		0x033, 0x00000024,
-		0x03F, 0x0000002D,
+		0x03F, 0x0000002B,
 		0x033, 0x00000025,
-		0x03F, 0x00000030,
+		0x03F, 0x00000068,
 		0x033, 0x00000026,
-		0x03F, 0x0000006D,
+		0x03F, 0x0000006B,
 		0x033, 0x00000027,
-		0x03F, 0x00000070,
+		0x03F, 0x0000006E,
 		0x033, 0x00000028,
-		0x03F, 0x000000ED,
+		0x03F, 0x00000071,
 		0x033, 0x00000029,
-		0x03F, 0x000000F0,
+		0x03F, 0x00000074,
 		0x033, 0x0000002A,
-		0x03F, 0x000000F3,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000077,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000020,
+		0x03F, 0x00000429,
+		0x033, 0x00000021,
+		0x03F, 0x00000828,
+		0x033, 0x00000022,
+		0x03F, 0x00000847,
+		0x033, 0x00000023,
+		0x03F, 0x0000084A,
+		0x033, 0x00000024,
+		0x03F, 0x00000C4B,
+		0x033, 0x00000025,
+		0x03F, 0x00000C8A,
+		0x033, 0x00000026,
+		0x03F, 0x00000CEA,
+		0x033, 0x00000027,
+		0x03F, 0x00000CED,
+		0x033, 0x00000028,
+		0x03F, 0x00000CF0,
+		0x033, 0x00000029,
+		0x03F, 0x00000CF3,
+		0x033, 0x0000002A,
+		0x03F, 0x00000CF6,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
 		0x03F, 0x00000005,
 		0x033, 0x00000021,
@@ -1628,30 +1949,30 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000074,
 		0x033, 0x0000002A,
 		0x03F, 0x00000077,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
-		0x03F, 0x00000007,
+		0x03F, 0x0000042B,
 		0x033, 0x00000021,
-		0x03F, 0x0000000A,
+		0x03F, 0x0000082A,
 		0x033, 0x00000022,
-		0x03F, 0x0000000D,
+		0x03F, 0x00000849,
 		0x033, 0x00000023,
-		0x03F, 0x0000002A,
+		0x03F, 0x0000084C,
 		0x033, 0x00000024,
-		0x03F, 0x0000002D,
+		0x03F, 0x00000C4C,
 		0x033, 0x00000025,
-		0x03F, 0x00000030,
+		0x03F, 0x00000CA9,
 		0x033, 0x00000026,
-		0x03F, 0x0000006D,
+		0x03F, 0x00000CEA,
 		0x033, 0x00000027,
-		0x03F, 0x00000070,
+		0x03F, 0x00000CED,
 		0x033, 0x00000028,
-		0x03F, 0x000000ED,
+		0x03F, 0x00000CF0,
 		0x033, 0x00000029,
-		0x03F, 0x000000F0,
+		0x03F, 0x00000CF3,
 		0x033, 0x0000002A,
-		0x03F, 0x000000F3,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF6,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
 		0x03F, 0x00000007,
 		0x033, 0x00000021,
@@ -1674,7 +1995,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x000000F0,
 		0x033, 0x0000002A,
 		0x03F, 0x000000F3,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
 		0x03F, 0x00000007,
 		0x033, 0x00000021,
@@ -1697,122 +2018,145 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x000000F0,
 		0x033, 0x0000002A,
 		0x03F, 0x000000F3,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
-		0x03F, 0x00000005,
+		0x03F, 0x00000C0C,
 		0x033, 0x00000021,
-		0x03F, 0x00000008,
+		0x03F, 0x00000C29,
 		0x033, 0x00000022,
-		0x03F, 0x0000000B,
+		0x03F, 0x00000C2C,
 		0x033, 0x00000023,
-		0x03F, 0x0000000E,
+		0x03F, 0x00000C69,
 		0x033, 0x00000024,
-		0x03F, 0x0000002B,
+		0x03F, 0x00000CA8,
 		0x033, 0x00000025,
-		0x03F, 0x00000068,
+		0x03F, 0x00000CE8,
 		0x033, 0x00000026,
-		0x03F, 0x0000006B,
+		0x03F, 0x00000CEB,
 		0x033, 0x00000027,
-		0x03F, 0x0000006E,
+		0x03F, 0x00000CEE,
 		0x033, 0x00000028,
-		0x03F, 0x00000071,
+		0x03F, 0x00000CF1,
 		0x033, 0x00000029,
-		0x03F, 0x00000074,
+		0x03F, 0x00000CF4,
 		0x033, 0x0000002A,
-		0x03F, 0x00000077,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF7,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
-		0x03F, 0x00000005,
+		0x03F, 0x00000C09,
 		0x033, 0x00000021,
-		0x03F, 0x00000008,
+		0x03F, 0x00000C0C,
 		0x033, 0x00000022,
-		0x03F, 0x0000000B,
+		0x03F, 0x00000C0F,
 		0x033, 0x00000023,
-		0x03F, 0x0000000E,
+		0x03F, 0x00000C2C,
 		0x033, 0x00000024,
-		0x03F, 0x0000002B,
+		0x03F, 0x00000C2F,
 		0x033, 0x00000025,
-		0x03F, 0x00000068,
+		0x03F, 0x00000C8A,
 		0x033, 0x00000026,
-		0x03F, 0x0000006B,
+		0x03F, 0x00000C8D,
 		0x033, 0x00000027,
-		0x03F, 0x0000006E,
+		0x03F, 0x00000C90,
 		0x033, 0x00000028,
-		0x03F, 0x00000071,
+		0x03F, 0x00000CD0,
 		0x033, 0x00000029,
-		0x03F, 0x00000074,
+		0x03F, 0x00000CF2,
 		0x033, 0x0000002A,
-		0x03F, 0x00000077,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF5,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
-		0x03F, 0x00000C0C,
+		0x03F, 0x00000C09,
 		0x033, 0x00000021,
-		0x03F, 0x00000C29,
+		0x03F, 0x00000C0C,
 		0x033, 0x00000022,
+		0x03F, 0x00000C0F,
+		0x033, 0x00000023,
 		0x03F, 0x00000C2C,
+		0x033, 0x00000024,
+		0x03F, 0x00000C2F,
+		0x033, 0x00000025,
+		0x03F, 0x00000C8A,
+		0x033, 0x00000026,
+		0x03F, 0x00000C8D,
+		0x033, 0x00000027,
+		0x03F, 0x00000C90,
+		0x033, 0x00000028,
+		0x03F, 0x00000CD0,
+		0x033, 0x00000029,
+		0x03F, 0x00000CF2,
+		0x033, 0x0000002A,
+		0x03F, 0x00000CF5,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000020,
+		0x03F, 0x00000007,
+		0x033, 0x00000021,
+		0x03F, 0x0000000A,
+		0x033, 0x00000022,
+		0x03F, 0x0000000D,
 		0x033, 0x00000023,
-		0x03F, 0x00000C69,
+		0x03F, 0x0000002A,
 		0x033, 0x00000024,
-		0x03F, 0x00000CA8,
+		0x03F, 0x0000002D,
 		0x033, 0x00000025,
-		0x03F, 0x00000CE8,
+		0x03F, 0x00000030,
 		0x033, 0x00000026,
-		0x03F, 0x00000CEB,
+		0x03F, 0x0000006D,
 		0x033, 0x00000027,
-		0x03F, 0x00000CEE,
+		0x03F, 0x00000070,
 		0x033, 0x00000028,
-		0x03F, 0x00000CF1,
+		0x03F, 0x000000ED,
 		0x033, 0x00000029,
-		0x03F, 0x00000CF4,
+		0x03F, 0x000000F0,
 		0x033, 0x0000002A,
-		0x03F, 0x00000CF7,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000000F3,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
-		0x03F, 0x0000042B,
+		0x03F, 0x00000429,
 		0x033, 0x00000021,
-		0x03F, 0x0000082A,
+		0x03F, 0x00000828,
 		0x033, 0x00000022,
-		0x03F, 0x00000849,
+		0x03F, 0x00000847,
 		0x033, 0x00000023,
-		0x03F, 0x0000084C,
+		0x03F, 0x0000084A,
 		0x033, 0x00000024,
-		0x03F, 0x00000C4C,
+		0x03F, 0x00000C4B,
 		0x033, 0x00000025,
-		0x03F, 0x00000CA9,
+		0x03F, 0x00000CE5,
 		0x033, 0x00000026,
-		0x03F, 0x00000CEA,
+		0x03F, 0x00000CE8,
 		0x033, 0x00000027,
-		0x03F, 0x00000CED,
+		0x03F, 0x00000CEB,
 		0x033, 0x00000028,
-		0x03F, 0x00000CF0,
+		0x03F, 0x00000CEE,
 		0x033, 0x00000029,
-		0x03F, 0x00000CF3,
+		0x03F, 0x00000CF1,
 		0x033, 0x0000002A,
-		0x03F, 0x00000CF6,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF4,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
-		0x03F, 0x00000005,
+		0x03F, 0x00000C0A,
 		0x033, 0x00000021,
-		0x03F, 0x00000008,
+		0x03F, 0x00000C0D,
 		0x033, 0x00000022,
-		0x03F, 0x0000000B,
+		0x03F, 0x00000C2A,
 		0x033, 0x00000023,
-		0x03F, 0x0000000E,
+		0x03F, 0x00000C2D,
 		0x033, 0x00000024,
-		0x03F, 0x0000002B,
+		0x03F, 0x00000C6A,
 		0x033, 0x00000025,
-		0x03F, 0x00000068,
+		0x03F, 0x00000CAA,
 		0x033, 0x00000026,
-		0x03F, 0x0000006B,
+		0x03F, 0x00000CAD,
 		0x033, 0x00000027,
-		0x03F, 0x0000006E,
+		0x03F, 0x00000CB0,
 		0x033, 0x00000028,
-		0x03F, 0x00000071,
+		0x03F, 0x00000CF1,
 		0x033, 0x00000029,
-		0x03F, 0x00000074,
+		0x03F, 0x00000CF4,
 		0x033, 0x0000002A,
-		0x03F, 0x00000077,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF7,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
 		0x03F, 0x00000C09,
 		0x033, 0x00000021,
@@ -1835,53 +2179,53 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000CF2,
 		0x033, 0x0000002A,
 		0x03F, 0x00000CF5,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
-		0x03F, 0x00000429,
+		0x03F, 0x00000007,
 		0x033, 0x00000021,
-		0x03F, 0x00000828,
+		0x03F, 0x0000000A,
 		0x033, 0x00000022,
-		0x03F, 0x00000847,
+		0x03F, 0x0000000D,
 		0x033, 0x00000023,
-		0x03F, 0x0000084A,
+		0x03F, 0x0000002A,
 		0x033, 0x00000024,
-		0x03F, 0x00000C4B,
+		0x03F, 0x0000002D,
 		0x033, 0x00000025,
-		0x03F, 0x00000C8A,
+		0x03F, 0x00000030,
 		0x033, 0x00000026,
-		0x03F, 0x00000CEA,
+		0x03F, 0x0000006D,
 		0x033, 0x00000027,
-		0x03F, 0x00000CED,
+		0x03F, 0x00000070,
 		0x033, 0x00000028,
-		0x03F, 0x00000CF0,
+		0x03F, 0x000000ED,
 		0x033, 0x00000029,
-		0x03F, 0x00000CF3,
+		0x03F, 0x000000F0,
 		0x033, 0x0000002A,
-		0x03F, 0x00000CF6,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000000F3,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
-		0x03F, 0x00000C09,
+		0x03F, 0x00000005,
 		0x033, 0x00000021,
-		0x03F, 0x00000C0C,
+		0x03F, 0x00000008,
 		0x033, 0x00000022,
-		0x03F, 0x00000C0F,
+		0x03F, 0x0000000B,
 		0x033, 0x00000023,
-		0x03F, 0x00000C2C,
+		0x03F, 0x0000000E,
 		0x033, 0x00000024,
-		0x03F, 0x00000C2F,
+		0x03F, 0x0000002B,
 		0x033, 0x00000025,
-		0x03F, 0x00000C8A,
+		0x03F, 0x00000068,
 		0x033, 0x00000026,
-		0x03F, 0x00000C8D,
+		0x03F, 0x0000006B,
 		0x033, 0x00000027,
-		0x03F, 0x00000C90,
+		0x03F, 0x0000006E,
 		0x033, 0x00000028,
-		0x03F, 0x00000CD0,
+		0x03F, 0x00000071,
 		0x033, 0x00000029,
-		0x03F, 0x00000CF2,
+		0x03F, 0x00000074,
 		0x033, 0x0000002A,
-		0x03F, 0x00000CF5,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000077,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
 		0x03F, 0x0000042B,
 		0x033, 0x00000021,
@@ -1904,7 +2248,30 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000CF1,
 		0x033, 0x0000002A,
 		0x03F, 0x00000CF4,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000020,
+		0x03F, 0x00000005,
+		0x033, 0x00000021,
+		0x03F, 0x00000008,
+		0x033, 0x00000022,
+		0x03F, 0x0000000B,
+		0x033, 0x00000023,
+		0x03F, 0x0000000E,
+		0x033, 0x00000024,
+		0x03F, 0x0000002B,
+		0x033, 0x00000025,
+		0x03F, 0x00000068,
+		0x033, 0x00000026,
+		0x03F, 0x0000006B,
+		0x033, 0x00000027,
+		0x03F, 0x0000006E,
+		0x033, 0x00000028,
+		0x03F, 0x00000071,
+		0x033, 0x00000029,
+		0x03F, 0x00000074,
+		0x033, 0x0000002A,
+		0x03F, 0x00000077,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
 		0x03F, 0x0000042B,
 		0x033, 0x00000021,
@@ -1927,6 +2294,52 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000CF1,
 		0x033, 0x0000002A,
 		0x03F, 0x00000CF4,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000020,
+		0x03F, 0x00000007,
+		0x033, 0x00000021,
+		0x03F, 0x0000000A,
+		0x033, 0x00000022,
+		0x03F, 0x0000000D,
+		0x033, 0x00000023,
+		0x03F, 0x0000002A,
+		0x033, 0x00000024,
+		0x03F, 0x0000002D,
+		0x033, 0x00000025,
+		0x03F, 0x00000030,
+		0x033, 0x00000026,
+		0x03F, 0x0000006D,
+		0x033, 0x00000027,
+		0x03F, 0x00000070,
+		0x033, 0x00000028,
+		0x03F, 0x000000ED,
+		0x033, 0x00000029,
+		0x03F, 0x000000F0,
+		0x033, 0x0000002A,
+		0x03F, 0x000000F3,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000020,
+		0x03F, 0x00000007,
+		0x033, 0x00000021,
+		0x03F, 0x0000000A,
+		0x033, 0x00000022,
+		0x03F, 0x0000000D,
+		0x033, 0x00000023,
+		0x03F, 0x0000002A,
+		0x033, 0x00000024,
+		0x03F, 0x0000002D,
+		0x033, 0x00000025,
+		0x03F, 0x00000030,
+		0x033, 0x00000026,
+		0x03F, 0x0000006D,
+		0x033, 0x00000027,
+		0x03F, 0x00000070,
+		0x033, 0x00000028,
+		0x03F, 0x000000ED,
+		0x033, 0x00000029,
+		0x03F, 0x000000F0,
+		0x033, 0x0000002A,
+		0x03F, 0x000000F3,
 	0xA0000000,	0x00000000,
 		0x033, 0x00000020,
 		0x03F, 0x00000C09,
@@ -1951,30 +2364,30 @@ u32 array_mp_8822b_radioa[] = {
 		0x033, 0x0000002A,
 		0x03F, 0x00000CF5,
 	0xB0000000,	0x00000000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
-		0x03F, 0x00000007,
+		0x03F, 0x00000C0A,
 		0x033, 0x00000061,
-		0x03F, 0x0000000A,
+		0x03F, 0x00000C0D,
 		0x033, 0x00000062,
-		0x03F, 0x0000000D,
+		0x03F, 0x00000C2A,
 		0x033, 0x00000063,
-		0x03F, 0x0000002A,
+		0x03F, 0x00000C2D,
 		0x033, 0x00000064,
-		0x03F, 0x0000002D,
+		0x03F, 0x00000C6A,
 		0x033, 0x00000065,
-		0x03F, 0x00000030,
+		0x03F, 0x00000CAA,
 		0x033, 0x00000066,
-		0x03F, 0x0000006D,
+		0x03F, 0x00000CAD,
 		0x033, 0x00000067,
-		0x03F, 0x00000070,
+		0x03F, 0x00000CB0,
 		0x033, 0x00000068,
-		0x03F, 0x000000ED,
+		0x03F, 0x00000CF1,
 		0x033, 0x00000069,
-		0x03F, 0x000000F0,
+		0x03F, 0x00000CF4,
 		0x033, 0x0000006A,
-		0x03F, 0x000000F3,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF7,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
 		0x03F, 0x00000007,
 		0x033, 0x00000061,
@@ -1997,30 +2410,53 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x000000F0,
 		0x033, 0x0000006A,
 		0x03F, 0x000000F3,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
-		0x03F, 0x00000007,
+		0x03F, 0x00000005,
 		0x033, 0x00000061,
-		0x03F, 0x0000000A,
+		0x03F, 0x00000008,
 		0x033, 0x00000062,
-		0x03F, 0x0000000D,
+		0x03F, 0x0000000B,
 		0x033, 0x00000063,
-		0x03F, 0x0000002A,
+		0x03F, 0x0000000E,
 		0x033, 0x00000064,
-		0x03F, 0x0000002D,
+		0x03F, 0x0000002B,
 		0x033, 0x00000065,
-		0x03F, 0x00000030,
+		0x03F, 0x00000068,
 		0x033, 0x00000066,
-		0x03F, 0x0000006D,
+		0x03F, 0x0000006B,
 		0x033, 0x00000067,
-		0x03F, 0x00000070,
+		0x03F, 0x0000006E,
 		0x033, 0x00000068,
-		0x03F, 0x000000ED,
+		0x03F, 0x00000071,
 		0x033, 0x00000069,
-		0x03F, 0x000000F0,
+		0x03F, 0x00000074,
 		0x033, 0x0000006A,
-		0x03F, 0x000000F3,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000077,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000060,
+		0x03F, 0x00000429,
+		0x033, 0x00000061,
+		0x03F, 0x00000828,
+		0x033, 0x00000062,
+		0x03F, 0x00000847,
+		0x033, 0x00000063,
+		0x03F, 0x0000084A,
+		0x033, 0x00000064,
+		0x03F, 0x00000C4B,
+		0x033, 0x00000065,
+		0x03F, 0x00000C8A,
+		0x033, 0x00000066,
+		0x03F, 0x00000CEA,
+		0x033, 0x00000067,
+		0x03F, 0x00000CED,
+		0x033, 0x00000068,
+		0x03F, 0x00000CF0,
+		0x033, 0x00000069,
+		0x03F, 0x00000CF3,
+		0x033, 0x0000006A,
+		0x03F, 0x00000CF6,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
 		0x03F, 0x00000005,
 		0x033, 0x00000061,
@@ -2043,30 +2479,30 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000074,
 		0x033, 0x0000006A,
 		0x03F, 0x00000077,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
-		0x03F, 0x00000007,
+		0x03F, 0x0000042B,
 		0x033, 0x00000061,
-		0x03F, 0x0000000A,
+		0x03F, 0x0000082A,
 		0x033, 0x00000062,
-		0x03F, 0x0000000D,
+		0x03F, 0x00000849,
 		0x033, 0x00000063,
-		0x03F, 0x0000002A,
+		0x03F, 0x0000084C,
 		0x033, 0x00000064,
-		0x03F, 0x0000002D,
+		0x03F, 0x00000C4C,
 		0x033, 0x00000065,
-		0x03F, 0x00000030,
+		0x03F, 0x00000CA9,
 		0x033, 0x00000066,
-		0x03F, 0x0000006D,
+		0x03F, 0x00000CEA,
 		0x033, 0x00000067,
-		0x03F, 0x00000070,
+		0x03F, 0x00000CED,
 		0x033, 0x00000068,
-		0x03F, 0x000000ED,
+		0x03F, 0x00000CF0,
 		0x033, 0x00000069,
-		0x03F, 0x000000F0,
+		0x03F, 0x00000CF3,
 		0x033, 0x0000006A,
-		0x03F, 0x000000F3,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF6,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
 		0x03F, 0x00000007,
 		0x033, 0x00000061,
@@ -2089,7 +2525,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x000000F0,
 		0x033, 0x0000006A,
 		0x03F, 0x000000F3,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
 		0x03F, 0x00000007,
 		0x033, 0x00000061,
@@ -2112,99 +2548,76 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x000000F0,
 		0x033, 0x0000006A,
 		0x03F, 0x000000F3,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
-		0x03F, 0x00000005,
-		0x033, 0x00000061,
-		0x03F, 0x00000008,
-		0x033, 0x00000062,
-		0x03F, 0x0000000B,
-		0x033, 0x00000063,
-		0x03F, 0x0000000E,
-		0x033, 0x00000064,
-		0x03F, 0x0000002B,
-		0x033, 0x00000065,
-		0x03F, 0x00000068,
-		0x033, 0x00000066,
-		0x03F, 0x0000006B,
-		0x033, 0x00000067,
-		0x03F, 0x0000006E,
-		0x033, 0x00000068,
-		0x03F, 0x00000071,
-		0x033, 0x00000069,
-		0x03F, 0x00000074,
-		0x033, 0x0000006A,
-		0x03F, 0x00000077,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
-		0x033, 0x00000060,
-		0x03F, 0x00000005,
+		0x03F, 0x0000080B,
 		0x033, 0x00000061,
-		0x03F, 0x00000008,
+		0x03F, 0x0000080E,
 		0x033, 0x00000062,
-		0x03F, 0x0000000B,
+		0x03F, 0x00000848,
 		0x033, 0x00000063,
-		0x03F, 0x0000000E,
+		0x03F, 0x00000869,
 		0x033, 0x00000064,
-		0x03F, 0x0000002B,
+		0x03F, 0x000008A9,
 		0x033, 0x00000065,
-		0x03F, 0x00000068,
+		0x03F, 0x00000CE8,
 		0x033, 0x00000066,
-		0x03F, 0x0000006B,
+		0x03F, 0x00000CEB,
 		0x033, 0x00000067,
-		0x03F, 0x0000006E,
+		0x03F, 0x00000CEE,
 		0x033, 0x00000068,
-		0x03F, 0x00000071,
+		0x03F, 0x00000CF1,
 		0x033, 0x00000069,
-		0x03F, 0x00000074,
+		0x03F, 0x00000CF4,
 		0x033, 0x0000006A,
-		0x03F, 0x00000077,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF7,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
-		0x03F, 0x0000080B,
+		0x03F, 0x00000C0A,
 		0x033, 0x00000061,
-		0x03F, 0x0000080E,
+		0x03F, 0x00000C0D,
 		0x033, 0x00000062,
-		0x03F, 0x00000848,
+		0x03F, 0x00000C2A,
 		0x033, 0x00000063,
-		0x03F, 0x00000869,
+		0x03F, 0x00000C2D,
 		0x033, 0x00000064,
-		0x03F, 0x000008A9,
+		0x03F, 0x00000C6A,
 		0x033, 0x00000065,
-		0x03F, 0x00000CE8,
+		0x03F, 0x00000CAA,
 		0x033, 0x00000066,
-		0x03F, 0x00000CEB,
+		0x03F, 0x00000CAD,
 		0x033, 0x00000067,
-		0x03F, 0x00000CEE,
+		0x03F, 0x00000CB0,
 		0x033, 0x00000068,
 		0x03F, 0x00000CF1,
 		0x033, 0x00000069,
 		0x03F, 0x00000CF4,
 		0x033, 0x0000006A,
 		0x03F, 0x00000CF7,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
-		0x03F, 0x0000042B,
+		0x03F, 0x00000C0A,
 		0x033, 0x00000061,
-		0x03F, 0x0000082A,
+		0x03F, 0x00000C0D,
 		0x033, 0x00000062,
-		0x03F, 0x00000849,
+		0x03F, 0x00000C2A,
 		0x033, 0x00000063,
-		0x03F, 0x0000084C,
+		0x03F, 0x00000C2D,
 		0x033, 0x00000064,
-		0x03F, 0x00000C4C,
+		0x03F, 0x00000C6A,
 		0x033, 0x00000065,
-		0x03F, 0x00000CA9,
+		0x03F, 0x00000CAA,
 		0x033, 0x00000066,
-		0x03F, 0x00000CEA,
+		0x03F, 0x00000CAD,
 		0x033, 0x00000067,
-		0x03F, 0x00000CED,
+		0x03F, 0x00000CB0,
 		0x033, 0x00000068,
-		0x03F, 0x00000CF0,
+		0x03F, 0x00000CF1,
 		0x033, 0x00000069,
-		0x03F, 0x00000CF3,
+		0x03F, 0x00000CF4,
 		0x033, 0x0000006A,
-		0x03F, 0x00000CF6,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF7,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
 		0x03F, 0x00000005,
 		0x033, 0x00000061,
@@ -2227,53 +2640,53 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000074,
 		0x033, 0x0000006A,
 		0x03F, 0x00000077,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
-		0x03F, 0x00000C0A,
+		0x03F, 0x00000429,
 		0x033, 0x00000061,
-		0x03F, 0x00000C0D,
+		0x03F, 0x00000828,
 		0x033, 0x00000062,
-		0x03F, 0x00000C2A,
+		0x03F, 0x00000847,
 		0x033, 0x00000063,
-		0x03F, 0x00000C2D,
+		0x03F, 0x0000084A,
 		0x033, 0x00000064,
-		0x03F, 0x00000C6A,
+		0x03F, 0x00000C4B,
 		0x033, 0x00000065,
-		0x03F, 0x00000CAA,
+		0x03F, 0x00000CE5,
 		0x033, 0x00000066,
-		0x03F, 0x00000CAD,
+		0x03F, 0x00000CE8,
 		0x033, 0x00000067,
-		0x03F, 0x00000CB0,
+		0x03F, 0x00000CEB,
 		0x033, 0x00000068,
-		0x03F, 0x00000CF1,
+		0x03F, 0x00000CEE,
 		0x033, 0x00000069,
-		0x03F, 0x00000CF4,
+		0x03F, 0x00000CF1,
 		0x033, 0x0000006A,
-		0x03F, 0x00000CF7,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF4,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
-		0x03F, 0x00000429,
+		0x03F, 0x00000C0A,
 		0x033, 0x00000061,
-		0x03F, 0x00000828,
+		0x03F, 0x00000C0D,
 		0x033, 0x00000062,
-		0x03F, 0x00000847,
+		0x03F, 0x00000C2A,
 		0x033, 0x00000063,
-		0x03F, 0x0000084A,
+		0x03F, 0x00000C2D,
 		0x033, 0x00000064,
-		0x03F, 0x00000C4B,
+		0x03F, 0x00000C6A,
 		0x033, 0x00000065,
-		0x03F, 0x00000C8A,
+		0x03F, 0x00000CAA,
 		0x033, 0x00000066,
-		0x03F, 0x00000CEA,
+		0x03F, 0x00000CAD,
 		0x033, 0x00000067,
-		0x03F, 0x00000CED,
+		0x03F, 0x00000CB0,
 		0x033, 0x00000068,
-		0x03F, 0x00000CF0,
+		0x03F, 0x00000CF1,
 		0x033, 0x00000069,
-		0x03F, 0x00000CF3,
+		0x03F, 0x00000CF4,
 		0x033, 0x0000006A,
-		0x03F, 0x00000CF6,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF7,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
 		0x03F, 0x00000C0A,
 		0x033, 0x00000061,
@@ -2296,7 +2709,53 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000CF4,
 		0x033, 0x0000006A,
 		0x03F, 0x00000CF7,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000060,
+		0x03F, 0x00000007,
+		0x033, 0x00000061,
+		0x03F, 0x0000000A,
+		0x033, 0x00000062,
+		0x03F, 0x0000000D,
+		0x033, 0x00000063,
+		0x03F, 0x0000002A,
+		0x033, 0x00000064,
+		0x03F, 0x0000002D,
+		0x033, 0x00000065,
+		0x03F, 0x00000030,
+		0x033, 0x00000066,
+		0x03F, 0x0000006D,
+		0x033, 0x00000067,
+		0x03F, 0x00000070,
+		0x033, 0x00000068,
+		0x03F, 0x000000ED,
+		0x033, 0x00000069,
+		0x03F, 0x000000F0,
+		0x033, 0x0000006A,
+		0x03F, 0x000000F3,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000060,
+		0x03F, 0x00000005,
+		0x033, 0x00000061,
+		0x03F, 0x00000008,
+		0x033, 0x00000062,
+		0x03F, 0x0000000B,
+		0x033, 0x00000063,
+		0x03F, 0x0000000E,
+		0x033, 0x00000064,
+		0x03F, 0x0000002B,
+		0x033, 0x00000065,
+		0x03F, 0x00000068,
+		0x033, 0x00000066,
+		0x03F, 0x0000006B,
+		0x033, 0x00000067,
+		0x03F, 0x0000006E,
+		0x033, 0x00000068,
+		0x03F, 0x00000071,
+		0x033, 0x00000069,
+		0x03F, 0x00000074,
+		0x033, 0x0000006A,
+		0x03F, 0x00000077,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
 		0x03F, 0x0000042C,
 		0x033, 0x00000061,
@@ -2319,7 +2778,30 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000CF2,
 		0x033, 0x0000006A,
 		0x03F, 0x00000CF5,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000060,
+		0x03F, 0x00000005,
+		0x033, 0x00000061,
+		0x03F, 0x00000008,
+		0x033, 0x00000062,
+		0x03F, 0x0000000B,
+		0x033, 0x00000063,
+		0x03F, 0x0000000E,
+		0x033, 0x00000064,
+		0x03F, 0x0000002B,
+		0x033, 0x00000065,
+		0x03F, 0x00000068,
+		0x033, 0x00000066,
+		0x03F, 0x0000006B,
+		0x033, 0x00000067,
+		0x03F, 0x0000006E,
+		0x033, 0x00000068,
+		0x03F, 0x00000071,
+		0x033, 0x00000069,
+		0x03F, 0x00000074,
+		0x033, 0x0000006A,
+		0x03F, 0x00000077,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
 		0x03F, 0x0000042C,
 		0x033, 0x00000061,
@@ -2342,6 +2824,52 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000CF2,
 		0x033, 0x0000006A,
 		0x03F, 0x00000CF5,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000060,
+		0x03F, 0x00000007,
+		0x033, 0x00000061,
+		0x03F, 0x0000000A,
+		0x033, 0x00000062,
+		0x03F, 0x0000000D,
+		0x033, 0x00000063,
+		0x03F, 0x0000002A,
+		0x033, 0x00000064,
+		0x03F, 0x0000002D,
+		0x033, 0x00000065,
+		0x03F, 0x00000030,
+		0x033, 0x00000066,
+		0x03F, 0x0000006D,
+		0x033, 0x00000067,
+		0x03F, 0x00000070,
+		0x033, 0x00000068,
+		0x03F, 0x000000ED,
+		0x033, 0x00000069,
+		0x03F, 0x000000F0,
+		0x033, 0x0000006A,
+		0x03F, 0x000000F3,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000060,
+		0x03F, 0x00000007,
+		0x033, 0x00000061,
+		0x03F, 0x0000000A,
+		0x033, 0x00000062,
+		0x03F, 0x0000000D,
+		0x033, 0x00000063,
+		0x03F, 0x0000002A,
+		0x033, 0x00000064,
+		0x03F, 0x0000002D,
+		0x033, 0x00000065,
+		0x03F, 0x00000030,
+		0x033, 0x00000066,
+		0x03F, 0x0000006D,
+		0x033, 0x00000067,
+		0x03F, 0x00000070,
+		0x033, 0x00000068,
+		0x03F, 0x000000ED,
+		0x033, 0x00000069,
+		0x03F, 0x000000F0,
+		0x033, 0x0000006A,
+		0x03F, 0x000000F3,
 	0xA0000000,	0x00000000,
 		0x033, 0x00000060,
 		0x03F, 0x00000C0A,
@@ -2366,30 +2894,30 @@ u32 array_mp_8822b_radioa[] = {
 		0x033, 0x0000006A,
 		0x03F, 0x00000CF7,
 	0xB0000000,	0x00000000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
-		0x03F, 0x00000007,
+		0x03F, 0x00000C09,
 		0x033, 0x000000A1,
-		0x03F, 0x0000000A,
+		0x03F, 0x00000C0C,
 		0x033, 0x000000A2,
-		0x03F, 0x0000000D,
+		0x03F, 0x00000C0F,
 		0x033, 0x000000A3,
-		0x03F, 0x0000002A,
+		0x03F, 0x00000C2C,
 		0x033, 0x000000A4,
-		0x03F, 0x0000002D,
+		0x03F, 0x00000C2F,
 		0x033, 0x000000A5,
-		0x03F, 0x00000030,
+		0x03F, 0x00000C8A,
 		0x033, 0x000000A6,
-		0x03F, 0x0000006D,
+		0x03F, 0x00000C8D,
 		0x033, 0x000000A7,
-		0x03F, 0x00000070,
+		0x03F, 0x00000C90,
 		0x033, 0x000000A8,
-		0x03F, 0x000000ED,
+		0x03F, 0x00000CEF,
 		0x033, 0x000000A9,
-		0x03F, 0x000000F0,
+		0x03F, 0x00000CF2,
 		0x033, 0x000000AA,
-		0x03F, 0x000000F3,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF5,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
 		0x03F, 0x00000007,
 		0x033, 0x000000A1,
@@ -2412,30 +2940,53 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x000000F0,
 		0x033, 0x000000AA,
 		0x03F, 0x000000F3,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
-		0x03F, 0x00000007,
+		0x03F, 0x00000005,
 		0x033, 0x000000A1,
-		0x03F, 0x0000000A,
+		0x03F, 0x00000008,
 		0x033, 0x000000A2,
-		0x03F, 0x0000000D,
+		0x03F, 0x0000000B,
 		0x033, 0x000000A3,
-		0x03F, 0x0000002A,
+		0x03F, 0x0000000E,
 		0x033, 0x000000A4,
-		0x03F, 0x0000002D,
+		0x03F, 0x00000047,
 		0x033, 0x000000A5,
-		0x03F, 0x00000030,
+		0x03F, 0x0000004A,
 		0x033, 0x000000A6,
-		0x03F, 0x0000006D,
+		0x03F, 0x0000004D,
 		0x033, 0x000000A7,
-		0x03F, 0x00000070,
+		0x03F, 0x00000050,
 		0x033, 0x000000A8,
-		0x03F, 0x000000ED,
+		0x03F, 0x00000053,
 		0x033, 0x000000A9,
-		0x03F, 0x000000F0,
+		0x03F, 0x00000056,
 		0x033, 0x000000AA,
-		0x03F, 0x000000F3,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000094,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x000000A0,
+		0x03F, 0x00000429,
+		0x033, 0x000000A1,
+		0x03F, 0x00000828,
+		0x033, 0x000000A2,
+		0x03F, 0x00000847,
+		0x033, 0x000000A3,
+		0x03F, 0x0000084A,
+		0x033, 0x000000A4,
+		0x03F, 0x00000C4B,
+		0x033, 0x000000A5,
+		0x03F, 0x00000C8A,
+		0x033, 0x000000A6,
+		0x03F, 0x00000CEA,
+		0x033, 0x000000A7,
+		0x03F, 0x00000CED,
+		0x033, 0x000000A8,
+		0x03F, 0x00000CF0,
+		0x033, 0x000000A9,
+		0x03F, 0x00000CF3,
+		0x033, 0x000000AA,
+		0x03F, 0x00000CF6,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
 		0x03F, 0x00000005,
 		0x033, 0x000000A1,
@@ -2458,30 +3009,30 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000056,
 		0x033, 0x000000AA,
 		0x03F, 0x00000094,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
-		0x03F, 0x00000007,
+		0x03F, 0x0000042A,
 		0x033, 0x000000A1,
-		0x03F, 0x0000000A,
+		0x03F, 0x00000829,
 		0x033, 0x000000A2,
-		0x03F, 0x0000000D,
+		0x03F, 0x00000848,
 		0x033, 0x000000A3,
-		0x03F, 0x0000002A,
+		0x03F, 0x0000084B,
 		0x033, 0x000000A4,
-		0x03F, 0x0000002D,
+		0x03F, 0x00000C4C,
 		0x033, 0x000000A5,
-		0x03F, 0x00000030,
+		0x03F, 0x00000CA9,
 		0x033, 0x000000A6,
-		0x03F, 0x0000006D,
+		0x03F, 0x00000CEA,
 		0x033, 0x000000A7,
-		0x03F, 0x00000070,
+		0x03F, 0x00000CED,
 		0x033, 0x000000A8,
-		0x03F, 0x000000ED,
+		0x03F, 0x00000CF0,
 		0x033, 0x000000A9,
-		0x03F, 0x000000F0,
+		0x03F, 0x00000CF3,
 		0x033, 0x000000AA,
-		0x03F, 0x000000F3,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF6,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
 		0x03F, 0x00000007,
 		0x033, 0x000000A1,
@@ -2504,7 +3055,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x000000F0,
 		0x033, 0x000000AA,
 		0x03F, 0x000000F3,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
 		0x03F, 0x00000007,
 		0x033, 0x000000A1,
@@ -2527,122 +3078,122 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x000000F0,
 		0x033, 0x000000AA,
 		0x03F, 0x000000F3,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
-		0x03F, 0x00000005,
+		0x03F, 0x00000C0A,
 		0x033, 0x000000A1,
-		0x03F, 0x00000008,
+		0x03F, 0x00000C0D,
 		0x033, 0x000000A2,
-		0x03F, 0x0000000B,
+		0x03F, 0x00000C2A,
 		0x033, 0x000000A3,
-		0x03F, 0x0000000E,
+		0x03F, 0x00000C2D,
 		0x033, 0x000000A4,
-		0x03F, 0x00000047,
+		0x03F, 0x00000C6A,
 		0x033, 0x000000A5,
-		0x03F, 0x0000004A,
+		0x03F, 0x00000CE8,
 		0x033, 0x000000A6,
-		0x03F, 0x0000004D,
+		0x03F, 0x00000CEB,
 		0x033, 0x000000A7,
-		0x03F, 0x00000050,
+		0x03F, 0x00000CEE,
 		0x033, 0x000000A8,
-		0x03F, 0x00000053,
+		0x03F, 0x00000CF1,
 		0x033, 0x000000A9,
-		0x03F, 0x00000056,
+		0x03F, 0x00000CF4,
 		0x033, 0x000000AA,
-		0x03F, 0x00000094,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF7,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
-		0x03F, 0x00000005,
+		0x03F, 0x00000C09,
 		0x033, 0x000000A1,
-		0x03F, 0x00000008,
+		0x03F, 0x00000C0C,
 		0x033, 0x000000A2,
-		0x03F, 0x0000000B,
+		0x03F, 0x00000C0F,
 		0x033, 0x000000A3,
-		0x03F, 0x0000000E,
+		0x03F, 0x00000C2C,
 		0x033, 0x000000A4,
-		0x03F, 0x00000047,
+		0x03F, 0x00000C2F,
 		0x033, 0x000000A5,
-		0x03F, 0x0000004A,
+		0x03F, 0x00000C8A,
 		0x033, 0x000000A6,
-		0x03F, 0x0000004D,
+		0x03F, 0x00000C8D,
 		0x033, 0x000000A7,
-		0x03F, 0x00000050,
+		0x03F, 0x00000C90,
 		0x033, 0x000000A8,
-		0x03F, 0x00000053,
+		0x03F, 0x00000CEF,
 		0x033, 0x000000A9,
-		0x03F, 0x00000056,
+		0x03F, 0x00000CF2,
 		0x033, 0x000000AA,
-		0x03F, 0x00000094,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF5,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
-		0x03F, 0x00000C0A,
+		0x03F, 0x00000C09,
 		0x033, 0x000000A1,
-		0x03F, 0x00000C0D,
+		0x03F, 0x00000C0C,
 		0x033, 0x000000A2,
-		0x03F, 0x00000C2A,
+		0x03F, 0x00000C0F,
 		0x033, 0x000000A3,
-		0x03F, 0x00000C2D,
+		0x03F, 0x00000C2C,
 		0x033, 0x000000A4,
-		0x03F, 0x00000C6A,
+		0x03F, 0x00000C2F,
 		0x033, 0x000000A5,
-		0x03F, 0x00000CE8,
+		0x03F, 0x00000C8A,
 		0x033, 0x000000A6,
-		0x03F, 0x00000CEB,
+		0x03F, 0x00000C8D,
 		0x033, 0x000000A7,
-		0x03F, 0x00000CEE,
+		0x03F, 0x00000C90,
 		0x033, 0x000000A8,
-		0x03F, 0x00000CF1,
+		0x03F, 0x00000CEF,
 		0x033, 0x000000A9,
-		0x03F, 0x00000CF4,
+		0x03F, 0x00000CF2,
 		0x033, 0x000000AA,
-		0x03F, 0x00000CF7,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF5,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
-		0x03F, 0x0000042A,
+		0x03F, 0x00000007,
 		0x033, 0x000000A1,
-		0x03F, 0x00000829,
+		0x03F, 0x0000000A,
 		0x033, 0x000000A2,
-		0x03F, 0x00000848,
+		0x03F, 0x0000000D,
 		0x033, 0x000000A3,
-		0x03F, 0x0000084B,
+		0x03F, 0x0000002A,
 		0x033, 0x000000A4,
-		0x03F, 0x00000C4C,
+		0x03F, 0x0000002D,
 		0x033, 0x000000A5,
-		0x03F, 0x00000CA9,
+		0x03F, 0x00000030,
 		0x033, 0x000000A6,
-		0x03F, 0x00000CEA,
+		0x03F, 0x0000006D,
 		0x033, 0x000000A7,
-		0x03F, 0x00000CED,
+		0x03F, 0x00000070,
 		0x033, 0x000000A8,
-		0x03F, 0x00000CF0,
+		0x03F, 0x000000ED,
 		0x033, 0x000000A9,
-		0x03F, 0x00000CF3,
+		0x03F, 0x000000F0,
 		0x033, 0x000000AA,
-		0x03F, 0x00000CF6,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000000F3,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
-		0x03F, 0x00000005,
+		0x03F, 0x00000429,
 		0x033, 0x000000A1,
-		0x03F, 0x00000008,
+		0x03F, 0x00000828,
 		0x033, 0x000000A2,
-		0x03F, 0x0000000B,
+		0x03F, 0x00000847,
 		0x033, 0x000000A3,
-		0x03F, 0x0000000E,
+		0x03F, 0x0000084A,
 		0x033, 0x000000A4,
-		0x03F, 0x00000047,
+		0x03F, 0x00000C4B,
 		0x033, 0x000000A5,
-		0x03F, 0x0000004A,
+		0x03F, 0x00000CE5,
 		0x033, 0x000000A6,
-		0x03F, 0x0000004D,
+		0x03F, 0x00000CE8,
 		0x033, 0x000000A7,
-		0x03F, 0x00000050,
+		0x03F, 0x00000CEB,
 		0x033, 0x000000A8,
-		0x03F, 0x00000053,
+		0x03F, 0x00000CEE,
 		0x033, 0x000000A9,
-		0x03F, 0x00000056,
+		0x03F, 0x00000CF1,
 		0x033, 0x000000AA,
-		0x03F, 0x00000094,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF4,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
 		0x03F, 0x00000C09,
 		0x033, 0x000000A1,
@@ -2665,53 +3216,76 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000CF2,
 		0x033, 0x000000AA,
 		0x03F, 0x00000CF5,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
-		0x03F, 0x00000429,
+		0x03F, 0x00000C09,
 		0x033, 0x000000A1,
-		0x03F, 0x00000828,
+		0x03F, 0x00000C0C,
 		0x033, 0x000000A2,
-		0x03F, 0x00000847,
+		0x03F, 0x00000C0F,
 		0x033, 0x000000A3,
-		0x03F, 0x0000084A,
+		0x03F, 0x00000C2C,
 		0x033, 0x000000A4,
-		0x03F, 0x00000C4B,
+		0x03F, 0x00000C2F,
 		0x033, 0x000000A5,
 		0x03F, 0x00000C8A,
 		0x033, 0x000000A6,
-		0x03F, 0x00000CEA,
+		0x03F, 0x00000C8D,
 		0x033, 0x000000A7,
-		0x03F, 0x00000CED,
+		0x03F, 0x00000C90,
 		0x033, 0x000000A8,
-		0x03F, 0x00000CF0,
+		0x03F, 0x00000CEF,
 		0x033, 0x000000A9,
-		0x03F, 0x00000CF3,
+		0x03F, 0x00000CF2,
 		0x033, 0x000000AA,
-		0x03F, 0x00000CF6,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF5,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
-		0x03F, 0x00000C09,
+		0x03F, 0x00000007,
 		0x033, 0x000000A1,
-		0x03F, 0x00000C0C,
+		0x03F, 0x0000000A,
 		0x033, 0x000000A2,
-		0x03F, 0x00000C0F,
+		0x03F, 0x0000000D,
 		0x033, 0x000000A3,
-		0x03F, 0x00000C2C,
+		0x03F, 0x0000002A,
 		0x033, 0x000000A4,
-		0x03F, 0x00000C2F,
+		0x03F, 0x0000002D,
 		0x033, 0x000000A5,
-		0x03F, 0x00000C8A,
+		0x03F, 0x00000030,
 		0x033, 0x000000A6,
-		0x03F, 0x00000C8D,
+		0x03F, 0x0000006D,
 		0x033, 0x000000A7,
-		0x03F, 0x00000C90,
+		0x03F, 0x00000070,
 		0x033, 0x000000A8,
-		0x03F, 0x00000CEF,
+		0x03F, 0x000000ED,
 		0x033, 0x000000A9,
-		0x03F, 0x00000CF2,
+		0x03F, 0x000000F0,
 		0x033, 0x000000AA,
-		0x03F, 0x00000CF5,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000000F3,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x000000A0,
+		0x03F, 0x00000005,
+		0x033, 0x000000A1,
+		0x03F, 0x00000008,
+		0x033, 0x000000A2,
+		0x03F, 0x0000000B,
+		0x033, 0x000000A3,
+		0x03F, 0x0000000E,
+		0x033, 0x000000A4,
+		0x03F, 0x00000047,
+		0x033, 0x000000A5,
+		0x03F, 0x0000004A,
+		0x033, 0x000000A6,
+		0x03F, 0x0000004D,
+		0x033, 0x000000A7,
+		0x03F, 0x00000050,
+		0x033, 0x000000A8,
+		0x03F, 0x00000053,
+		0x033, 0x000000A9,
+		0x03F, 0x00000056,
+		0x033, 0x000000AA,
+		0x03F, 0x00000094,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
 		0x03F, 0x0000042A,
 		0x033, 0x000000A1,
@@ -2734,7 +3308,30 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000CF1,
 		0x033, 0x000000AA,
 		0x03F, 0x00000CF4,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x000000A0,
+		0x03F, 0x00000005,
+		0x033, 0x000000A1,
+		0x03F, 0x00000008,
+		0x033, 0x000000A2,
+		0x03F, 0x0000000B,
+		0x033, 0x000000A3,
+		0x03F, 0x0000000E,
+		0x033, 0x000000A4,
+		0x03F, 0x00000047,
+		0x033, 0x000000A5,
+		0x03F, 0x0000004A,
+		0x033, 0x000000A6,
+		0x03F, 0x0000004D,
+		0x033, 0x000000A7,
+		0x03F, 0x00000050,
+		0x033, 0x000000A8,
+		0x03F, 0x00000053,
+		0x033, 0x000000A9,
+		0x03F, 0x00000056,
+		0x033, 0x000000AA,
+		0x03F, 0x00000094,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
 		0x03F, 0x0000042A,
 		0x033, 0x000000A1,
@@ -2757,6 +3354,52 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000CF1,
 		0x033, 0x000000AA,
 		0x03F, 0x00000CF4,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x000000A0,
+		0x03F, 0x00000007,
+		0x033, 0x000000A1,
+		0x03F, 0x0000000A,
+		0x033, 0x000000A2,
+		0x03F, 0x0000000D,
+		0x033, 0x000000A3,
+		0x03F, 0x0000002A,
+		0x033, 0x000000A4,
+		0x03F, 0x0000002D,
+		0x033, 0x000000A5,
+		0x03F, 0x00000030,
+		0x033, 0x000000A6,
+		0x03F, 0x0000006D,
+		0x033, 0x000000A7,
+		0x03F, 0x00000070,
+		0x033, 0x000000A8,
+		0x03F, 0x000000ED,
+		0x033, 0x000000A9,
+		0x03F, 0x000000F0,
+		0x033, 0x000000AA,
+		0x03F, 0x000000F3,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x000000A0,
+		0x03F, 0x00000007,
+		0x033, 0x000000A1,
+		0x03F, 0x0000000A,
+		0x033, 0x000000A2,
+		0x03F, 0x0000000D,
+		0x033, 0x000000A3,
+		0x03F, 0x0000002A,
+		0x033, 0x000000A4,
+		0x03F, 0x0000002D,
+		0x033, 0x000000A5,
+		0x03F, 0x00000030,
+		0x033, 0x000000A6,
+		0x03F, 0x0000006D,
+		0x033, 0x000000A7,
+		0x03F, 0x00000070,
+		0x033, 0x000000A8,
+		0x03F, 0x000000ED,
+		0x033, 0x000000A9,
+		0x03F, 0x000000F0,
+		0x033, 0x000000AA,
+		0x03F, 0x000000F3,
 	0xA0000000,	0x00000000,
 		0x033, 0x000000A0,
 		0x03F, 0x00000C09,
@@ -2783,7 +3426,7 @@ u32 array_mp_8822b_radioa[] = {
 	0xB0000000,	0x00000000,
 		0x0EF, 0x00000000,
 		0x0EF, 0x00000400,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x0000047C,
 		0x033, 0x00000001,
@@ -2792,7 +3435,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x0000047C,
 		0x033, 0x00000003,
 		0x03F, 0x0000047C,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x0000047C,
 		0x033, 0x00000001,
@@ -2801,7 +3444,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x0000047C,
 		0x033, 0x00000003,
 		0x03F, 0x0000047C,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x0000047C,
 		0x033, 0x00000001,
@@ -2810,7 +3453,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x0000047C,
 		0x033, 0x00000003,
 		0x03F, 0x0000047C,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x0000047C,
 		0x033, 0x00000001,
@@ -2819,7 +3462,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x0000047C,
 		0x033, 0x00000003,
 		0x03F, 0x0000047C,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x0000047C,
 		0x033, 0x00000001,
@@ -2828,7 +3471,25 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x0000047C,
 		0x033, 0x00000003,
 		0x03F, 0x0000047C,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000000,
+		0x03F, 0x000008BB,
+		0x033, 0x00000001,
+		0x03F, 0x000008BB,
+		0x033, 0x00000002,
+		0x03F, 0x000008BB,
+		0x033, 0x00000003,
+		0x03F, 0x000008BB,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000000,
+		0x03F, 0x0000047C,
+		0x033, 0x00000001,
+		0x03F, 0x0000047C,
+		0x033, 0x00000002,
+		0x03F, 0x0000047C,
+		0x033, 0x00000003,
+		0x03F, 0x0000047C,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x0000047C,
 		0x033, 0x00000001,
@@ -2837,7 +3498,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x0000047C,
 		0x033, 0x00000003,
 		0x03F, 0x0000047C,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x0000047C,
 		0x033, 0x00000001,
@@ -2846,7 +3507,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x0000047C,
 		0x033, 0x00000003,
 		0x03F, 0x0000047C,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x0000047C,
 		0x033, 0x00000001,
@@ -2867,7 +3528,16 @@ u32 array_mp_8822b_radioa[] = {
 	0xB0000000,	0x00000000,
 		0x0EF, 0x00000000,
 		0x0EF, 0x00000100,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000000,
+		0x03F, 0x00001726,
+		0x033, 0x00000001,
+		0x03F, 0x00001726,
+		0x033, 0x00000002,
+		0x03F, 0x00001726,
+		0x033, 0x00000003,
+		0x03F, 0x00001726,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00001726,
 		0x033, 0x00000001,
@@ -2876,7 +3546,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00001726,
 		0x033, 0x00000003,
 		0x03F, 0x00001726,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00001726,
 		0x033, 0x00000001,
@@ -2885,7 +3555,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00001726,
 		0x033, 0x00000003,
 		0x03F, 0x00001726,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00001726,
 		0x033, 0x00000001,
@@ -2894,7 +3564,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00001726,
 		0x033, 0x00000003,
 		0x03F, 0x00001726,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00001726,
 		0x033, 0x00000001,
@@ -2903,7 +3573,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00001726,
 		0x033, 0x00000003,
 		0x03F, 0x00001726,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00001726,
 		0x033, 0x00000001,
@@ -2912,7 +3582,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00001726,
 		0x033, 0x00000003,
 		0x03F, 0x00001726,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00001726,
 		0x033, 0x00000001,
@@ -2921,7 +3591,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00001726,
 		0x033, 0x00000003,
 		0x03F, 0x00001726,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00001726,
 		0x033, 0x00000001,
@@ -2930,7 +3600,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00001726,
 		0x033, 0x00000003,
 		0x03F, 0x00001726,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00001726,
 		0x033, 0x00000001,
@@ -2950,7 +3620,17 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000F34,
 	0xB0000000,	0x00000000,
 		0x0EF, 0x00000000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
+		0x081, 0x0000F400,
+		0x087, 0x00016040,
+		0x051, 0x00000808,
+		0x052, 0x00098002,
+		0x053, 0x0000FA47,
+		0x054, 0x00058032,
+		0x056, 0x00051000,
+		0x057, 0x0000CE0A,
+		0x058, 0x00082030,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x081, 0x0000F400,
 		0x087, 0x00016040,
 		0x051, 0x00000808,
@@ -2960,7 +3640,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x056, 0x00051000,
 		0x057, 0x0000CE0A,
 		0x058, 0x00082030,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x081, 0x0000F400,
 		0x087, 0x00016040,
 		0x051, 0x00000808,
@@ -2970,7 +3650,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x056, 0x00051000,
 		0x057, 0x0000CE0A,
 		0x058, 0x00082030,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x081, 0x0000F400,
 		0x087, 0x00016040,
 		0x051, 0x00000808,
@@ -2980,7 +3660,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x056, 0x00051000,
 		0x057, 0x0000CE0A,
 		0x058, 0x00082030,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x081, 0x0000F400,
 		0x087, 0x00016040,
 		0x051, 0x00000808,
@@ -2990,7 +3670,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x056, 0x00051000,
 		0x057, 0x0000CE0A,
 		0x058, 0x00082030,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x081, 0x0000F400,
 		0x087, 0x00016040,
 		0x051, 0x00000808,
@@ -3000,7 +3680,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x056, 0x00051000,
 		0x057, 0x0000CE0A,
 		0x058, 0x00082030,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
 		0x081, 0x0000F400,
 		0x087, 0x00016040,
 		0x051, 0x00000808,
@@ -3010,7 +3690,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x056, 0x00051000,
 		0x057, 0x0000CE0A,
 		0x058, 0x00082030,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x081, 0x0000F400,
 		0x087, 0x00016040,
 		0x051, 0x00000808,
@@ -3020,7 +3700,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x056, 0x00051000,
 		0x057, 0x0000CE0A,
 		0x058, 0x00082030,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x081, 0x0000F400,
 		0x087, 0x00016040,
 		0x051, 0x00000808,
@@ -3041,7 +3721,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x058, 0x00058750,
 	0xB0000000,	0x00000000,
 		0x0EF, 0x00000800,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000003,
 		0x033, 0x00000001,
@@ -3064,7 +3744,30 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000039,
 		0x033, 0x0000000A,
 		0x03F, 0x0000003C,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000000,
+		0x03F, 0x00000002,
+		0x033, 0x00000001,
+		0x03F, 0x00000005,
+		0x033, 0x00000002,
+		0x03F, 0x00000008,
+		0x033, 0x00000003,
+		0x03F, 0x0000000B,
+		0x033, 0x00000004,
+		0x03F, 0x0000000E,
+		0x033, 0x00000005,
+		0x03F, 0x0000002B,
+		0x033, 0x00000006,
+		0x03F, 0x0000002E,
+		0x033, 0x00000007,
+		0x03F, 0x00000031,
+		0x033, 0x00000008,
+		0x03F, 0x0000006E,
+		0x033, 0x00000009,
+		0x03F, 0x00000071,
+		0x033, 0x0000000A,
+		0x03F, 0x00000074,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000003,
 		0x033, 0x00000001,
@@ -3087,7 +3790,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000039,
 		0x033, 0x0000000A,
 		0x03F, 0x0000003C,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000003,
 		0x033, 0x00000001,
@@ -3110,7 +3813,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000039,
 		0x033, 0x0000000A,
 		0x03F, 0x0000003C,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000003,
 		0x033, 0x00000001,
@@ -3133,7 +3836,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000039,
 		0x033, 0x0000000A,
 		0x03F, 0x0000003C,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000003,
 		0x033, 0x00000001,
@@ -3156,7 +3859,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000039,
 		0x033, 0x0000000A,
 		0x03F, 0x0000003C,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000003,
 		0x033, 0x00000001,
@@ -3179,7 +3882,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000039,
 		0x033, 0x0000000A,
 		0x03F, 0x0000003C,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000003,
 		0x033, 0x00000001,
@@ -3202,7 +3905,7 @@ u32 array_mp_8822b_radioa[] = {
 		0x03F, 0x00000039,
 		0x033, 0x0000000A,
 		0x03F, 0x0000003C,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000003,
 		0x033, 0x00000001,
@@ -3259,13 +3962,40 @@ u32 array_mp_8822b_radioa[] = {
 		0x033, 0x000000A2,
 		0x0EF, 0x00080000,
 		0x03E, 0x0000593F,
+	0x8300000c,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000D0F4F,
+	0xA0000000,	0x00000000,
 		0x03F, 0x000C0F4F,
+	0xB0000000,	0x00000000,
 		0x0EF, 0x00000000,
 		0x033, 0x000000A3,
 		0x0EF, 0x00080000,
 		0x03E, 0x00005934,
 		0x03F, 0x0005AFCF,
 		0x0EF, 0x00000000,
+	0x8300000c,	0x00000000,	0x40000000,	0x00000000,
+		0x0CF, 0x00064700,
+	0xA0000000,	0x00000000,
+		0x0CF, 0x00064700,
+	0xB0000000,	0x00000000,
+	0x8300000c,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000004,
+		0x033, 0x00000000,
+		0x03F, 0x00000096,
+		0x033, 0x00000001,
+		0x03F, 0x000000D6,
+		0x0EF, 0x00000000,
+	0xA0000000,	0x00000000,
+		0x0EF, 0x00000000,
+		0x033, 0x00000000,
+		0x03F, 0x00000096,
+		0x033, 0x00000001,
+		0x03F, 0x000000D6,
+		0x0EF, 0x00000000,
+	0xB0000000,	0x00000000,
+		0x0B0, 0x000FF0FC,
+		0x0C4, 0x00081402,
+		0x0CC, 0x00080000,
 
 };
 
@@ -3276,7 +4006,7 @@ odm_read_and_config_mp_8822b_radioa(
 {
 	u32	i = 0;
 	u8	c_cond;
-	bool	is_matched = true, is_skipped = false;
+	boolean	is_matched = true, is_skipped = false;
 	u32	array_len = sizeof(array_mp_8822b_radioa)/sizeof(u32);
 	u32	*array = array_mp_8822b_radioa;
 
@@ -3326,7 +4056,7 @@ odm_read_and_config_mp_8822b_radioa(
 u32
 odm_get_version_mp_8822b_radioa(void)
 {
-		return 63;
+		return 85;
 }
 
 /******************************************************************************
@@ -3335,38 +4065,44 @@ odm_get_version_mp_8822b_radioa(void)
 
 u32 array_mp_8822b_radiob[] = {
 		0x000, 0x00030000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x001, 0x0004002D,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
-		0x001, 0x0004002D,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
-		0x001, 0x0004002D,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x0004002D,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x001, 0x0004002D,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
+		0x001, 0x00040029,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
+		0x001, 0x00040029,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x0004002D,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
+		0x001, 0x00040029,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x0004002D,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x0004002D,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x00040029,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x00040029,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x00040029,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
-		0x001, 0x00040029,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
+		0x001, 0x0004002D,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x00040029,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
+		0x001, 0x0004002D,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x00040029,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x00040029,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x001, 0x0004002D,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
 		0x001, 0x00040029,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x001, 0x0004002D,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x001, 0x0004002D,
 	0xA0000000,	0x00000000,
 		0x001, 0x00040029,
 	0xB0000000,	0x00000000,
@@ -3374,7 +4110,11 @@ u32 array_mp_8822b_radiob[] = {
 		0x0EF, 0x00080000,
 		0x033, 0x00000002,
 		0x03E, 0x0000003F,
+	0x8300000c,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000D0F4E,
+	0xA0000000,	0x00000000,
 		0x03F, 0x000C0F4E,
+	0xB0000000,	0x00000000,
 		0x033, 0x00000001,
 		0x03E, 0x00000034,
 		0x03F, 0x0004080E,
@@ -3397,18 +4137,20 @@ u32 array_mp_8822b_radiob[] = {
 		0x0DF, 0x00000009,
 		0x018, 0x00010524,
 		0x089, 0x00000207,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
 		0x08A, 0x000FF186,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
-		0x08A, 0x000FE186,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x08A, 0x000FF186,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
+		0x08A, 0x000FE186,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x08A, 0x000FF186,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x08A, 0x000FF186,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x08A, 0x000FE186,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x08A, 0x000FF186,
 	0xA0000000,	0x00000000,
 		0x08A, 0x000FF186,
 	0xB0000000,	0x00000000,
@@ -3418,68 +4160,68 @@ u32 array_mp_8822b_radiob[] = {
 		0x08E, 0x00064D40,
 		0x0EF, 0x00020000,
 		0x033, 0x00000007,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
-		0x03E, 0x00004080,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
-		0x03E, 0x00004080,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004000,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
-		0x03E, 0x00004000,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C3186,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C3186,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
-		0x03E, 0x00004000,
-	0xA0000000,	0x00000000,
+		0x03F, 0x000C3186,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004000,
-	0xB0000000,	0x00000000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+		0x03F, 0x000C0006,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
+		0x03F, 0x000C0006,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004080,
 		0x03F, 0x000C3186,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
 		0x03F, 0x000C3186,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
 		0x03F, 0x000C3186,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
+		0x03F, 0x000C0006,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
+		0x03F, 0x000DFF86,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
 		0x03F, 0x000C3186,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
-		0x03F, 0x000C0006,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004080,
 		0x03F, 0x000C3186,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
-		0x03F, 0x000C0006,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
 	0xA0000000,	0x00000000,
+		0x03E, 0x00004000,
 		0x03F, 0x000C3186,
 	0xB0000000,	0x00000000,
 		0x033, 0x00000006,
@@ -3504,68 +4246,68 @@ u32 array_mp_8822b_radiob[] = {
 		0x03E, 0x00005930,
 		0x03F, 0x000C3186,
 		0x033, 0x0000000F,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
-		0x03E, 0x00004080,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
-		0x03E, 0x00004080,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
-		0x03E, 0x00004000,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004000,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C3186,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C3186,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C3186,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004000,
-	0xA0000000,	0x00000000,
+		0x03F, 0x000C0006,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
+		0x03F, 0x000C3186,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004000,
-	0xB0000000,	0x00000000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
 		0x03F, 0x000C3186,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004080,
 		0x03F, 0x000C3186,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
 		0x03F, 0x000C3186,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
 		0x03F, 0x000C3186,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
+		0x03F, 0x000C0006,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
 		0x03F, 0x000C3186,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
 		0x03F, 0x000C3186,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004080,
 		0x03F, 0x000C3186,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
-		0x03F, 0x000C0006,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
 	0xA0000000,	0x00000000,
+		0x03E, 0x00004000,
 		0x03F, 0x000C3186,
 	0xB0000000,	0x00000000,
 		0x033, 0x0000000E,
@@ -3590,68 +4332,68 @@ u32 array_mp_8822b_radiob[] = {
 		0x03E, 0x00005930,
 		0x03F, 0x000C3186,
 		0x033, 0x00000017,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
-		0x03E, 0x00004080,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
-		0x03E, 0x00004080,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
-		0x03E, 0x00004040,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
-		0x03E, 0x00004000,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004000,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C3186,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C3186,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004040,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000C3186,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004000,
-	0xA0000000,	0x00000000,
+		0x03F, 0x000C0006,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
+		0x03F, 0x000C3186,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
 		0x03E, 0x00004000,
-	0xB0000000,	0x00000000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+		0x03F, 0x000DFF86,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004080,
 		0x03F, 0x000C3186,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
 		0x03F, 0x000C3186,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
 		0x03F, 0x000C3186,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
+		0x03F, 0x000C0006,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
 		0x03F, 0x000C3186,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004000,
 		0x03F, 0x000C3186,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
-		0x03F, 0x000DFF86,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004080,
 		0x03F, 0x000C3186,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
-		0x03F, 0x000C0006,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x03E, 0x00004040,
 		0x03F, 0x000C3186,
 	0xA0000000,	0x00000000,
+		0x03E, 0x00004000,
 		0x03F, 0x000C3186,
 	0xB0000000,	0x00000000,
 		0x033, 0x00000016,
@@ -3680,39 +4422,49 @@ u32 array_mp_8822b_radiob[] = {
 		0x033, 0x00000000,
 		0x03F, 0x0000000A,
 		0x033, 0x00000001,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000005,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000002,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000005,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
-		0x03F, 0x00000002,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000005,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000005,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
-		0x03F, 0x00000005,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000000,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000000,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x03F, 0x00000000,
 	0xA0000000,	0x00000000,
 		0x03F, 0x00000005,
@@ -3723,21 +4475,23 @@ u32 array_mp_8822b_radiob[] = {
 		0x018, 0x00000401,
 		0x084, 0x00001209,
 		0x086, 0x000001A0,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
+		0x087, 0x00068080,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x087, 0x00068080,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x087, 0x00068080,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x087, 0x00068080,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x087, 0x00068080,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x087, 0x00068080,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
 		0x087, 0x00068080,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x087, 0x00068080,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x087, 0x00068080,
 	0xA0000000,	0x00000000,
 		0x087, 0x000E8180,
@@ -3799,85 +4553,118 @@ u32 array_mp_8822b_radiob[] = {
 		0x033, 0x00000005,
 		0x03F, 0x00000006,
 		0x033, 0x00000006,
-		0x03F, 0x00000002,
+		0x03F, 0x00000004,
 		0x033, 0x00000007,
 		0x03F, 0x00000000,
 		0x0EE, 0x00000000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x061, 0x0005D4A0,
-		0x062, 0x0000D203,
-		0x063, 0x00000062,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
-		0x061, 0x0005D4A0,
-		0x062, 0x0000D203,
-		0x063, 0x00000062,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D3D1,
+		0x062, 0x0000D3A2,
+		0x063, 0x00000002,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x061, 0x0005D4A0,
 		0x062, 0x0000D203,
 		0x063, 0x00000062,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x061, 0x0005D2A1,
 		0x062, 0x0000D3A2,
 		0x063, 0x00000062,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x061, 0x0005D4A0,
-		0x062, 0x0000D203,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D2A1,
+		0x062, 0x0000D3A2,
+		0x063, 0x00000002,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D2A1,
+		0x062, 0x0000D3A2,
 		0x063, 0x00000062,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D2A1,
+		0x062, 0x0000D3A2,
+		0x063, 0x00000002,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x061, 0x0005D4A0,
 		0x062, 0x0000D203,
 		0x063, 0x00000062,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x061, 0x0005D4A0,
 		0x062, 0x0000D203,
 		0x063, 0x00000062,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
 		0x061, 0x0005D2A1,
 		0x062, 0x0000D3A2,
-		0x063, 0x00000062,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
-		0x061, 0x0005D2A1,
+		0x063, 0x00000002,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D3D1,
 		0x062, 0x0000D3A2,
-		0x063, 0x00000062,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
-		0x061, 0x0005D2A1,
+		0x063, 0x00000002,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D3D1,
 		0x062, 0x0000D3A2,
 		0x063, 0x00000002,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D4A0,
+		0x062, 0x0000D203,
+		0x063, 0x00000062,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
 		0x061, 0x0005D2A1,
 		0x062, 0x0000D3A2,
 		0x063, 0x00000002,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
-		0x061, 0x0005D2A1,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D3D1,
 		0x062, 0x0000D3A2,
-		0x063, 0x00000062,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+		0x063, 0x00000002,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
 		0x061, 0x0005D3D1,
 		0x062, 0x0000D3A2,
 		0x063, 0x00000002,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D4A0,
+		0x062, 0x0000D203,
+		0x063, 0x00000062,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
 		0x061, 0x0005D2A1,
 		0x062, 0x0000D3A2,
-		0x063, 0x00000002,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
-		0x061, 0x0005D3D1,
+		0x063, 0x00000062,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D2A1,
 		0x062, 0x0000D3A2,
 		0x063, 0x00000002,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
 		0x061, 0x0005D2A1,
 		0x062, 0x0000D3A2,
-		0x063, 0x00000002,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+		0x063, 0x00000062,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
 		0x061, 0x0005D2A1,
 		0x062, 0x0000D3A2,
 		0x063, 0x00000002,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D4A0,
+		0x062, 0x0000D203,
+		0x063, 0x00000062,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x061, 0x0005D4A0,
+		0x062, 0x0000D203,
+		0x063, 0x00000062,
 	0xA0000000,	0x00000000,
 		0x061, 0x0005D3D0,
 		0x062, 0x0000D303,
 		0x063, 0x00000002,
 	0xB0000000,	0x00000000,
 		0x0EF, 0x00000200,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x000003A2,
+		0x030, 0x000013A2,
+		0x030, 0x000023A2,
+		0x030, 0x000033A2,
+		0x030, 0x000043A3,
+		0x030, 0x000053A3,
+		0x030, 0x000063A3,
+		0x030, 0x000073A3,
+		0x030, 0x000083A3,
+		0x030, 0x000093A3,
+		0x030, 0x0000A3A3,
+		0x030, 0x0000B3A3,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x000004A3,
 		0x030, 0x000014A3,
 		0x030, 0x000024A3,
@@ -3890,7 +4677,59 @@ u32 array_mp_8822b_radiob[] = {
 		0x030, 0x000094A3,
 		0x030, 0x0000A4A3,
 		0x030, 0x0000B4A3,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x000002A6,
+		0x030, 0x000012A6,
+		0x030, 0x000022A6,
+		0x030, 0x000032A6,
+		0x030, 0x000042A6,
+		0x030, 0x000052A6,
+		0x030, 0x000062A6,
+		0x030, 0x000072A6,
+		0x030, 0x000082A6,
+		0x030, 0x000092A6,
+		0x030, 0x0000A2A6,
+		0x030, 0x0000B2A6,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000303,
+		0x030, 0x00001303,
+		0x030, 0x00002303,
+		0x030, 0x00003303,
+		0x030, 0x000043A4,
+		0x030, 0x000053A4,
+		0x030, 0x000063A4,
+		0x030, 0x000073A4,
+		0x030, 0x00008365,
+		0x030, 0x00009365,
+		0x030, 0x0000A365,
+		0x030, 0x0000B365,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x000002A6,
+		0x030, 0x000012A6,
+		0x030, 0x000022A6,
+		0x030, 0x000032A6,
+		0x030, 0x000042A6,
+		0x030, 0x000052A6,
+		0x030, 0x000062A6,
+		0x030, 0x000072A6,
+		0x030, 0x000082A6,
+		0x030, 0x000092A6,
+		0x030, 0x0000A2A6,
+		0x030, 0x0000B2A6,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x000004A4,
+		0x030, 0x000014A4,
+		0x030, 0x000024A4,
+		0x030, 0x000034A4,
+		0x030, 0x000043A4,
+		0x030, 0x000053A4,
+		0x030, 0x000063A4,
+		0x030, 0x000073A4,
+		0x030, 0x000083A5,
+		0x030, 0x000093A5,
+		0x030, 0x0000A3A5,
+		0x030, 0x0000B3A5,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x000004A3,
 		0x030, 0x000014A3,
 		0x030, 0x000024A3,
@@ -3903,7 +4742,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x030, 0x000094A3,
 		0x030, 0x0000A4A3,
 		0x030, 0x0000B4A3,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x000004A3,
 		0x030, 0x000014A3,
 		0x030, 0x000024A3,
@@ -3916,46 +4755,98 @@ u32 array_mp_8822b_radiob[] = {
 		0x030, 0x000094A3,
 		0x030, 0x0000A4A3,
 		0x030, 0x0000B4A3,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
-		0x030, 0x000002A6,
-		0x030, 0x000012A6,
-		0x030, 0x000022A6,
-		0x030, 0x000032A6,
-		0x030, 0x000042A6,
-		0x030, 0x000052A6,
-		0x030, 0x000062A6,
-		0x030, 0x000072A6,
-		0x030, 0x000082A6,
-		0x030, 0x000092A6,
-		0x030, 0x0000A2A6,
-		0x030, 0x0000B2A6,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x030, 0x000004A0,
-		0x030, 0x000014A0,
-		0x030, 0x000024A0,
-		0x030, 0x000034A0,
-		0x030, 0x000044A0,
-		0x030, 0x000054A0,
-		0x030, 0x000064A0,
-		0x030, 0x000074A0,
-		0x030, 0x000084A0,
-		0x030, 0x000094A0,
-		0x030, 0x0000A4A0,
-		0x030, 0x0000B4A0,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
-		0x030, 0x000004A0,
-		0x030, 0x000014A0,
-		0x030, 0x000024A0,
-		0x030, 0x000034A0,
-		0x030, 0x000044A0,
-		0x030, 0x000054A0,
-		0x030, 0x000064A0,
-		0x030, 0x000074A0,
-		0x030, 0x000084A0,
-		0x030, 0x000094A0,
-		0x030, 0x0000A4A0,
-		0x030, 0x0000B4A0,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x000002F4,
+		0x030, 0x000012F4,
+		0x030, 0x000022F4,
+		0x030, 0x000032F4,
+		0x030, 0x00004365,
+		0x030, 0x00005365,
+		0x030, 0x00006365,
+		0x030, 0x00007365,
+		0x030, 0x000082A4,
+		0x030, 0x000092A4,
+		0x030, 0x0000A2A4,
+		0x030, 0x0000B2A4,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000382,
+		0x030, 0x00001382,
+		0x030, 0x00002382,
+		0x030, 0x00003382,
+		0x030, 0x00004445,
+		0x030, 0x00005445,
+		0x030, 0x00006445,
+		0x030, 0x00007445,
+		0x030, 0x00008425,
+		0x030, 0x00009425,
+		0x030, 0x0000A425,
+		0x030, 0x0000B425,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x000003A2,
+		0x030, 0x000013A2,
+		0x030, 0x000023A2,
+		0x030, 0x000033A2,
+		0x030, 0x000043A3,
+		0x030, 0x000053A3,
+		0x030, 0x000063A3,
+		0x030, 0x000073A3,
+		0x030, 0x000083A3,
+		0x030, 0x000093A3,
+		0x030, 0x0000A3A3,
+		0x030, 0x0000B3A3,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x000004A3,
+		0x030, 0x000014A3,
+		0x030, 0x000024A3,
+		0x030, 0x000034A3,
+		0x030, 0x000044A3,
+		0x030, 0x000054A3,
+		0x030, 0x000064A3,
+		0x030, 0x000074A3,
+		0x030, 0x000084A3,
+		0x030, 0x000094A3,
+		0x030, 0x0000A4A3,
+		0x030, 0x0000B4A3,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000443,
+		0x030, 0x00001443,
+		0x030, 0x00002443,
+		0x030, 0x00003443,
+		0x030, 0x000043A4,
+		0x030, 0x000053A4,
+		0x030, 0x000063A4,
+		0x030, 0x000073A4,
+		0x030, 0x00008365,
+		0x030, 0x00009365,
+		0x030, 0x0000A365,
+		0x030, 0x0000B365,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000443,
+		0x030, 0x00001443,
+		0x030, 0x00002443,
+		0x030, 0x00003443,
+		0x030, 0x00004383,
+		0x030, 0x00005383,
+		0x030, 0x00006383,
+		0x030, 0x00007383,
+		0x030, 0x000084A4,
+		0x030, 0x000094A4,
+		0x030, 0x0000A4A4,
+		0x030, 0x0000B4A4,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000363,
+		0x030, 0x00001363,
+		0x030, 0x00002363,
+		0x030, 0x00003363,
+		0x030, 0x000043A3,
+		0x030, 0x000053A3,
+		0x030, 0x000063A3,
+		0x030, 0x000073A3,
+		0x030, 0x000083A4,
+		0x030, 0x000093A4,
+		0x030, 0x0000A3A4,
+		0x030, 0x0000B3A4,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x000004A0,
 		0x030, 0x000014A0,
 		0x030, 0x000024A0,
@@ -3968,7 +4859,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x030, 0x000094A0,
 		0x030, 0x0000A4A0,
 		0x030, 0x0000B4A0,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x000002A1,
 		0x030, 0x000012A1,
 		0x030, 0x000022A1,
@@ -3981,46 +4872,20 @@ u32 array_mp_8822b_radiob[] = {
 		0x030, 0x000092A1,
 		0x030, 0x0000A2A1,
 		0x030, 0x0000B2A1,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
-		0x030, 0x000002A6,
-		0x030, 0x000012A6,
-		0x030, 0x000022A6,
-		0x030, 0x000032A6,
-		0x030, 0x000042A6,
-		0x030, 0x000052A6,
-		0x030, 0x000062A6,
-		0x030, 0x000072A6,
-		0x030, 0x000082A6,
-		0x030, 0x000092A6,
-		0x030, 0x0000A2A6,
-		0x030, 0x0000B2A6,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
-		0x030, 0x000002F4,
-		0x030, 0x000012F4,
-		0x030, 0x000022F4,
-		0x030, 0x000032F4,
-		0x030, 0x00004365,
-		0x030, 0x00005365,
-		0x030, 0x00006365,
-		0x030, 0x00007365,
-		0x030, 0x000082A4,
-		0x030, 0x000092A4,
-		0x030, 0x0000A2A4,
-		0x030, 0x0000B2A4,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
-		0x030, 0x000005A4,
-		0x030, 0x000015A4,
-		0x030, 0x000025A4,
-		0x030, 0x000035A4,
-		0x030, 0x000043A4,
-		0x030, 0x000053A4,
-		0x030, 0x000063A4,
-		0x030, 0x000073A4,
-		0x030, 0x000083A5,
-		0x030, 0x000093A5,
-		0x030, 0x0000A3A5,
-		0x030, 0x0000B3A5,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x000004A0,
+		0x030, 0x000014A0,
+		0x030, 0x000024A0,
+		0x030, 0x000034A0,
+		0x030, 0x000043A1,
+		0x030, 0x000053A1,
+		0x030, 0x000063A1,
+		0x030, 0x000073A1,
+		0x030, 0x000083A2,
+		0x030, 0x000093A2,
+		0x030, 0x0000A3A2,
+		0x030, 0x0000B3A2,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x000002A1,
 		0x030, 0x000012A1,
 		0x030, 0x000022A1,
@@ -4033,46 +4898,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x030, 0x000092A1,
 		0x030, 0x0000A2A1,
 		0x030, 0x0000B2A1,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
-		0x030, 0x00000382,
-		0x030, 0x00001382,
-		0x030, 0x00002382,
-		0x030, 0x00003382,
-		0x030, 0x00004445,
-		0x030, 0x00005445,
-		0x030, 0x00006445,
-		0x030, 0x00007445,
-		0x030, 0x00008425,
-		0x030, 0x00009425,
-		0x030, 0x0000A425,
-		0x030, 0x0000B425,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
-		0x030, 0x00000303,
-		0x030, 0x00001303,
-		0x030, 0x00002303,
-		0x030, 0x00003303,
-		0x030, 0x000043A4,
-		0x030, 0x000053A4,
-		0x030, 0x000063A4,
-		0x030, 0x000073A4,
-		0x030, 0x00008365,
-		0x030, 0x00009365,
-		0x030, 0x0000A365,
-		0x030, 0x0000B365,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
-		0x030, 0x000003A1,
-		0x030, 0x000013A1,
-		0x030, 0x000023A1,
-		0x030, 0x000033A1,
-		0x030, 0x00004364,
-		0x030, 0x00005364,
-		0x030, 0x00006364,
-		0x030, 0x00007364,
-		0x030, 0x00008564,
-		0x030, 0x00009564,
-		0x030, 0x0000A564,
-		0x030, 0x0000B564,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x000004A1,
 		0x030, 0x000014A1,
 		0x030, 0x000024A1,
@@ -4085,19 +4911,32 @@ u32 array_mp_8822b_radiob[] = {
 		0x030, 0x000093A1,
 		0x030, 0x0000A3A1,
 		0x030, 0x0000B3A1,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x000004A0,
 		0x030, 0x000014A0,
 		0x030, 0x000024A0,
 		0x030, 0x000034A0,
-		0x030, 0x000043A1,
-		0x030, 0x000053A1,
-		0x030, 0x000063A1,
-		0x030, 0x000073A1,
-		0x030, 0x000083A2,
-		0x030, 0x000093A2,
-		0x030, 0x0000A3A2,
-		0x030, 0x0000B3A2,
+		0x030, 0x000044A0,
+		0x030, 0x000054A0,
+		0x030, 0x000064A0,
+		0x030, 0x000074A0,
+		0x030, 0x000084A0,
+		0x030, 0x000094A0,
+		0x030, 0x0000A4A0,
+		0x030, 0x0000B4A0,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x000004A0,
+		0x030, 0x000014A0,
+		0x030, 0x000024A0,
+		0x030, 0x000034A0,
+		0x030, 0x000044A0,
+		0x030, 0x000054A0,
+		0x030, 0x000064A0,
+		0x030, 0x000074A0,
+		0x030, 0x000084A0,
+		0x030, 0x000094A0,
+		0x030, 0x0000A4A0,
+		0x030, 0x0000B4A0,
 	0xA0000000,	0x00000000,
 		0x030, 0x000002D0,
 		0x030, 0x000012D0,
@@ -4114,46 +4953,7 @@ u32 array_mp_8822b_radiob[] = {
 	0xB0000000,	0x00000000,
 		0x0EF, 0x00000000,
 		0x0EF, 0x00000080,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x030, 0x00000203,
-		0x030, 0x00001203,
-		0x030, 0x00002203,
-		0x030, 0x00003203,
-		0x030, 0x00004203,
-		0x030, 0x00005203,
-		0x030, 0x00006203,
-		0x030, 0x00007203,
-		0x030, 0x00008203,
-		0x030, 0x00009203,
-		0x030, 0x0000A203,
-		0x030, 0x0000B203,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
-		0x030, 0x00000203,
-		0x030, 0x00001203,
-		0x030, 0x00002203,
-		0x030, 0x00003203,
-		0x030, 0x00004203,
-		0x030, 0x00005203,
-		0x030, 0x00006203,
-		0x030, 0x00007203,
-		0x030, 0x00008203,
-		0x030, 0x00009203,
-		0x030, 0x0000A203,
-		0x030, 0x0000B203,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
-		0x030, 0x00000203,
-		0x030, 0x00001203,
-		0x030, 0x00002203,
-		0x030, 0x00003203,
-		0x030, 0x00004203,
-		0x030, 0x00005203,
-		0x030, 0x00006203,
-		0x030, 0x00007203,
-		0x030, 0x00008203,
-		0x030, 0x00009203,
-		0x030, 0x0000A203,
-		0x030, 0x0000B203,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
 		0x030, 0x000023A2,
@@ -4166,7 +4966,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x030, 0x000093A2,
 		0x030, 0x0000A3A2,
 		0x030, 0x0000B3A2,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x00000203,
 		0x030, 0x00001203,
 		0x030, 0x00002203,
@@ -4179,7 +4979,59 @@ u32 array_mp_8822b_radiob[] = {
 		0x030, 0x00009203,
 		0x030, 0x0000A203,
 		0x030, 0x0000B203,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x000003A2,
+		0x030, 0x000013A2,
+		0x030, 0x000023A2,
+		0x030, 0x000033A2,
+		0x030, 0x000043A2,
+		0x030, 0x000053A2,
+		0x030, 0x000063A2,
+		0x030, 0x000073A2,
+		0x030, 0x000083A2,
+		0x030, 0x000093A2,
+		0x030, 0x0000A3A2,
+		0x030, 0x0000B3A2,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x000003A2,
+		0x030, 0x000013A2,
+		0x030, 0x000023A2,
+		0x030, 0x000033A2,
+		0x030, 0x000043A2,
+		0x030, 0x000053A2,
+		0x030, 0x000063A2,
+		0x030, 0x000073A2,
+		0x030, 0x000083A2,
+		0x030, 0x000093A2,
+		0x030, 0x0000A3A2,
+		0x030, 0x0000B3A2,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x000003A2,
+		0x030, 0x000013A2,
+		0x030, 0x000023A2,
+		0x030, 0x000033A2,
+		0x030, 0x000043A2,
+		0x030, 0x000053A2,
+		0x030, 0x000063A2,
+		0x030, 0x000073A2,
+		0x030, 0x000083A2,
+		0x030, 0x000093A2,
+		0x030, 0x0000A3A2,
+		0x030, 0x0000B3A2,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x000003A2,
+		0x030, 0x000013A2,
+		0x030, 0x000023A2,
+		0x030, 0x000033A2,
+		0x030, 0x000043A2,
+		0x030, 0x000053A2,
+		0x030, 0x000063A2,
+		0x030, 0x000073A2,
+		0x030, 0x000083A2,
+		0x030, 0x000093A2,
+		0x030, 0x0000A3A2,
+		0x030, 0x0000B3A2,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x00000203,
 		0x030, 0x00001203,
 		0x030, 0x00002203,
@@ -4192,7 +5044,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x030, 0x00009203,
 		0x030, 0x0000A203,
 		0x030, 0x0000B203,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x00000203,
 		0x030, 0x00001203,
 		0x030, 0x00002203,
@@ -4205,7 +5057,20 @@ u32 array_mp_8822b_radiob[] = {
 		0x030, 0x00009203,
 		0x030, 0x0000A203,
 		0x030, 0x0000B203,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x000003A3,
+		0x030, 0x000013A3,
+		0x030, 0x000023A3,
+		0x030, 0x000033A3,
+		0x030, 0x000043A4,
+		0x030, 0x000053A4,
+		0x030, 0x000063A4,
+		0x030, 0x000073A4,
+		0x030, 0x000083A3,
+		0x030, 0x000093A3,
+		0x030, 0x0000A3A3,
+		0x030, 0x0000B3A3,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
 		0x030, 0x000023A2,
@@ -4218,7 +5083,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x030, 0x000093A2,
 		0x030, 0x0000A3A2,
 		0x030, 0x0000B3A2,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
 		0x030, 0x000023A2,
@@ -4231,20 +5096,20 @@ u32 array_mp_8822b_radiob[] = {
 		0x030, 0x000093A2,
 		0x030, 0x0000A3A2,
 		0x030, 0x0000B3A2,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
-		0x030, 0x000003A3,
-		0x030, 0x000013A3,
-		0x030, 0x000023A3,
-		0x030, 0x000033A3,
-		0x030, 0x000043A4,
-		0x030, 0x000053A4,
-		0x030, 0x000063A4,
-		0x030, 0x000073A4,
-		0x030, 0x000083A3,
-		0x030, 0x000093A3,
-		0x030, 0x0000A3A3,
-		0x030, 0x0000B3A3,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000203,
+		0x030, 0x00001203,
+		0x030, 0x00002203,
+		0x030, 0x00003203,
+		0x030, 0x00004203,
+		0x030, 0x00005203,
+		0x030, 0x00006203,
+		0x030, 0x00007203,
+		0x030, 0x00008203,
+		0x030, 0x00009203,
+		0x030, 0x0000A203,
+		0x030, 0x0000B203,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
 		0x030, 0x000023A2,
@@ -4257,7 +5122,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x030, 0x000093A2,
 		0x030, 0x0000A3A2,
 		0x030, 0x0000B3A2,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
 		0x030, 0x000023A2,
@@ -4270,7 +5135,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x030, 0x000093A2,
 		0x030, 0x0000A3A2,
 		0x030, 0x0000B3A2,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
 		0x030, 0x000023A2,
@@ -4283,7 +5148,20 @@ u32 array_mp_8822b_radiob[] = {
 		0x030, 0x000093A2,
 		0x030, 0x0000A3A2,
 		0x030, 0x0000B3A2,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000203,
+		0x030, 0x00001203,
+		0x030, 0x00002203,
+		0x030, 0x00003203,
+		0x030, 0x00004203,
+		0x030, 0x00005203,
+		0x030, 0x00006203,
+		0x030, 0x00007203,
+		0x030, 0x00008203,
+		0x030, 0x00009203,
+		0x030, 0x0000A203,
+		0x030, 0x0000B203,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
 		0x030, 0x000023A2,
@@ -4296,7 +5174,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x030, 0x000093A2,
 		0x030, 0x0000A3A2,
 		0x030, 0x0000B3A2,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
 		0x030, 0x000023A2,
@@ -4309,7 +5187,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x030, 0x000093A2,
 		0x030, 0x0000A3A2,
 		0x030, 0x0000B3A2,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
 		0x030, 0x000023A2,
@@ -4322,7 +5200,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x030, 0x000093A2,
 		0x030, 0x0000A3A2,
 		0x030, 0x0000B3A2,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
 		0x030, 0x000023A2,
@@ -4335,6 +5213,32 @@ u32 array_mp_8822b_radiob[] = {
 		0x030, 0x000093A2,
 		0x030, 0x0000A3A2,
 		0x030, 0x0000B3A2,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000203,
+		0x030, 0x00001203,
+		0x030, 0x00002203,
+		0x030, 0x00003203,
+		0x030, 0x00004203,
+		0x030, 0x00005203,
+		0x030, 0x00006203,
+		0x030, 0x00007203,
+		0x030, 0x00008203,
+		0x030, 0x00009203,
+		0x030, 0x0000A203,
+		0x030, 0x0000B203,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000203,
+		0x030, 0x00001203,
+		0x030, 0x00002203,
+		0x030, 0x00003203,
+		0x030, 0x00004203,
+		0x030, 0x00005203,
+		0x030, 0x00006203,
+		0x030, 0x00007203,
+		0x030, 0x00008203,
+		0x030, 0x00009203,
+		0x030, 0x0000A203,
+		0x030, 0x0000B203,
 	0xA0000000,	0x00000000,
 		0x030, 0x000003A2,
 		0x030, 0x000013A2,
@@ -4351,125 +5255,160 @@ u32 array_mp_8822b_radiob[] = {
 	0xB0000000,	0x00000000,
 		0x0EF, 0x00000000,
 		0x0EF, 0x00000040,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x030, 0x00000645,
-		0x030, 0x00001333,
-		0x030, 0x00002011,
-		0x030, 0x00004000,
-		0x030, 0x00005000,
-		0x030, 0x00006000,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
-		0x030, 0x00000645,
-		0x030, 0x00001333,
-		0x030, 0x00002011,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000764,
+		0x030, 0x00001632,
+		0x030, 0x00002421,
 		0x030, 0x00004000,
 		0x030, 0x00005000,
 		0x030, 0x00006000,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x00000645,
 		0x030, 0x00001333,
 		0x030, 0x00002011,
 		0x030, 0x00004000,
 		0x030, 0x00005000,
 		0x030, 0x00006000,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x00000645,
 		0x030, 0x00001333,
 		0x030, 0x00002011,
 		0x030, 0x00004777,
 		0x030, 0x00005777,
 		0x030, 0x00006777,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
-		0x030, 0x00000645,
-		0x030, 0x00001333,
-		0x030, 0x00002011,
-		0x030, 0x00004000,
-		0x030, 0x00005000,
-		0x030, 0x00006000,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000777,
+		0x030, 0x00001442,
+		0x030, 0x00002222,
+		0x030, 0x00004777,
+		0x030, 0x00005777,
+		0x030, 0x00006777,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x00000645,
 		0x030, 0x00001333,
 		0x030, 0x00002011,
-		0x030, 0x00004000,
-		0x030, 0x00005000,
-		0x030, 0x00006000,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00004777,
+		0x030, 0x00005777,
+		0x030, 0x00006777,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000764,
+		0x030, 0x00001452,
+		0x030, 0x00002220,
+		0x030, 0x00004777,
+		0x030, 0x00005777,
+		0x030, 0x00006777,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x00000645,
 		0x030, 0x00001333,
 		0x030, 0x00002011,
 		0x030, 0x00004000,
 		0x030, 0x00005000,
 		0x030, 0x00006000,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x00000645,
 		0x030, 0x00001333,
 		0x030, 0x00002011,
 		0x030, 0x00004000,
 		0x030, 0x00005000,
 		0x030, 0x00006000,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
-		0x030, 0x00000645,
-		0x030, 0x00001333,
-		0x030, 0x00002011,
-		0x030, 0x00004777,
-		0x030, 0x00005777,
-		0x030, 0x00006777,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x00000660,
 		0x030, 0x00001341,
 		0x030, 0x00002220,
 		0x030, 0x00004777,
 		0x030, 0x00005777,
 		0x030, 0x00006777,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x00000764,
-		0x030, 0x00001452,
-		0x030, 0x00002220,
-		0x030, 0x00004777,
-		0x030, 0x00005777,
-		0x030, 0x00006777,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
-		0x030, 0x00000645,
-		0x030, 0x00001333,
-		0x030, 0x00002011,
+		0x030, 0x00001632,
+		0x030, 0x00002421,
 		0x030, 0x00004000,
 		0x030, 0x00005000,
 		0x030, 0x00006000,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x00000764,
 		0x030, 0x00001632,
 		0x030, 0x00002421,
 		0x030, 0x00004000,
 		0x030, 0x00005000,
 		0x030, 0x00006000,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
-		0x030, 0x00000777,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000645,
+		0x030, 0x00001333,
+		0x030, 0x00002011,
+		0x030, 0x00004000,
+		0x030, 0x00005000,
+		0x030, 0x00006000,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000767,
 		0x030, 0x00001442,
 		0x030, 0x00002222,
 		0x030, 0x00004777,
 		0x030, 0x00005777,
 		0x030, 0x00006777,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000767,
+		0x030, 0x00001632,
+		0x030, 0x00002451,
+		0x030, 0x00004000,
+		0x030, 0x00005000,
+		0x030, 0x00006000,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x00000764,
 		0x030, 0x00001632,
 		0x030, 0x00002421,
 		0x030, 0x00004000,
 		0x030, 0x00005000,
 		0x030, 0x00006000,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000645,
+		0x030, 0x00001333,
+		0x030, 0x00002011,
+		0x030, 0x00004000,
+		0x030, 0x00005000,
+		0x030, 0x00006000,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000645,
+		0x030, 0x00001333,
+		0x030, 0x00002011,
+		0x030, 0x00004000,
+		0x030, 0x00005000,
+		0x030, 0x00006000,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x00000775,
-		0x030, 0x00001222,
+		0x030, 0x00001422,
 		0x030, 0x00002210,
 		0x030, 0x00004000,
 		0x030, 0x00005000,
 		0x030, 0x00006000,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000645,
+		0x030, 0x00001333,
+		0x030, 0x00002011,
+		0x030, 0x00004000,
+		0x030, 0x00005000,
+		0x030, 0x00006000,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
 		0x030, 0x00000775,
-		0x030, 0x00001422,
+		0x030, 0x00001222,
 		0x030, 0x00002210,
 		0x030, 0x00004000,
 		0x030, 0x00005000,
 		0x030, 0x00006000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000645,
+		0x030, 0x00001333,
+		0x030, 0x00002011,
+		0x030, 0x00004000,
+		0x030, 0x00005000,
+		0x030, 0x00006000,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x030, 0x00000645,
+		0x030, 0x00001333,
+		0x030, 0x00002011,
+		0x030, 0x00004000,
+		0x030, 0x00005000,
+		0x030, 0x00006000,
 	0xA0000000,	0x00000000,
 		0x030, 0x00000764,
 		0x030, 0x00001632,
@@ -4480,30 +5419,30 @@ u32 array_mp_8822b_radiob[] = {
 	0xB0000000,	0x00000000,
 		0x0EF, 0x00000000,
 		0x0EF, 0x00000800,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
-		0x03F, 0x00000007,
+		0x03F, 0x00000C09,
 		0x033, 0x00000021,
-		0x03F, 0x0000000A,
+		0x03F, 0x00000C0C,
 		0x033, 0x00000022,
-		0x03F, 0x0000000D,
+		0x03F, 0x00000C0F,
 		0x033, 0x00000023,
-		0x03F, 0x0000002A,
+		0x03F, 0x00000C2C,
 		0x033, 0x00000024,
-		0x03F, 0x0000002D,
+		0x03F, 0x00000C2F,
 		0x033, 0x00000025,
-		0x03F, 0x00000030,
+		0x03F, 0x00000C8A,
 		0x033, 0x00000026,
-		0x03F, 0x0000006D,
+		0x03F, 0x00000C8D,
 		0x033, 0x00000027,
-		0x03F, 0x00000070,
+		0x03F, 0x00000C90,
 		0x033, 0x00000028,
-		0x03F, 0x000000ED,
+		0x03F, 0x00000CD0,
 		0x033, 0x00000029,
-		0x03F, 0x000000F0,
+		0x03F, 0x00000CF2,
 		0x033, 0x0000002A,
-		0x03F, 0x000000F3,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF5,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
 		0x03F, 0x00000007,
 		0x033, 0x00000021,
@@ -4526,30 +5465,53 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x000000F0,
 		0x033, 0x0000002A,
 		0x03F, 0x000000F3,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
-		0x03F, 0x00000007,
+		0x03F, 0x00000005,
 		0x033, 0x00000021,
-		0x03F, 0x0000000A,
+		0x03F, 0x00000008,
 		0x033, 0x00000022,
-		0x03F, 0x0000000D,
+		0x03F, 0x0000000B,
 		0x033, 0x00000023,
-		0x03F, 0x0000002A,
+		0x03F, 0x0000000E,
 		0x033, 0x00000024,
-		0x03F, 0x0000002D,
+		0x03F, 0x0000002B,
 		0x033, 0x00000025,
-		0x03F, 0x00000030,
+		0x03F, 0x00000068,
 		0x033, 0x00000026,
-		0x03F, 0x0000006D,
+		0x03F, 0x0000006B,
 		0x033, 0x00000027,
-		0x03F, 0x00000070,
+		0x03F, 0x0000006E,
 		0x033, 0x00000028,
-		0x03F, 0x000000ED,
+		0x03F, 0x00000071,
 		0x033, 0x00000029,
-		0x03F, 0x000000F0,
+		0x03F, 0x00000074,
 		0x033, 0x0000002A,
-		0x03F, 0x000000F3,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000077,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000020,
+		0x03F, 0x00000429,
+		0x033, 0x00000021,
+		0x03F, 0x00000828,
+		0x033, 0x00000022,
+		0x03F, 0x00000847,
+		0x033, 0x00000023,
+		0x03F, 0x0000084A,
+		0x033, 0x00000024,
+		0x03F, 0x00000C4B,
+		0x033, 0x00000025,
+		0x03F, 0x00000C8A,
+		0x033, 0x00000026,
+		0x03F, 0x00000CEA,
+		0x033, 0x00000027,
+		0x03F, 0x00000CED,
+		0x033, 0x00000028,
+		0x03F, 0x00000CF0,
+		0x033, 0x00000029,
+		0x03F, 0x00000CF3,
+		0x033, 0x0000002A,
+		0x03F, 0x00000CF6,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
 		0x03F, 0x00000005,
 		0x033, 0x00000021,
@@ -4572,30 +5534,30 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000074,
 		0x033, 0x0000002A,
 		0x03F, 0x00000077,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
-		0x03F, 0x00000007,
+		0x03F, 0x0000042A,
 		0x033, 0x00000021,
-		0x03F, 0x0000000A,
+		0x03F, 0x00000829,
 		0x033, 0x00000022,
-		0x03F, 0x0000000D,
+		0x03F, 0x00000848,
 		0x033, 0x00000023,
-		0x03F, 0x0000002A,
+		0x03F, 0x0000084B,
 		0x033, 0x00000024,
-		0x03F, 0x0000002D,
+		0x03F, 0x00000C4C,
 		0x033, 0x00000025,
-		0x03F, 0x00000030,
+		0x03F, 0x00000C8B,
 		0x033, 0x00000026,
-		0x03F, 0x0000006D,
+		0x03F, 0x00000CEA,
 		0x033, 0x00000027,
-		0x03F, 0x00000070,
+		0x03F, 0x00000CED,
 		0x033, 0x00000028,
-		0x03F, 0x000000ED,
+		0x03F, 0x00000CF0,
 		0x033, 0x00000029,
-		0x03F, 0x000000F0,
+		0x03F, 0x00000CF3,
 		0x033, 0x0000002A,
-		0x03F, 0x000000F3,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF6,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
 		0x03F, 0x00000007,
 		0x033, 0x00000021,
@@ -4618,7 +5580,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x000000F0,
 		0x033, 0x0000002A,
 		0x03F, 0x000000F3,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
 		0x03F, 0x00000007,
 		0x033, 0x00000021,
@@ -4641,122 +5603,145 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x000000F0,
 		0x033, 0x0000002A,
 		0x03F, 0x000000F3,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
-		0x03F, 0x00000005,
+		0x03F, 0x00000828,
 		0x033, 0x00000021,
-		0x03F, 0x00000008,
+		0x03F, 0x0000082B,
 		0x033, 0x00000022,
-		0x03F, 0x0000000B,
+		0x03F, 0x00000868,
 		0x033, 0x00000023,
-		0x03F, 0x0000000E,
+		0x03F, 0x00000889,
 		0x033, 0x00000024,
-		0x03F, 0x0000002B,
+		0x03F, 0x000008AA,
 		0x033, 0x00000025,
-		0x03F, 0x00000068,
+		0x03F, 0x00000CE8,
 		0x033, 0x00000026,
-		0x03F, 0x0000006B,
+		0x03F, 0x00000CEB,
 		0x033, 0x00000027,
-		0x03F, 0x0000006E,
+		0x03F, 0x00000CEE,
 		0x033, 0x00000028,
-		0x03F, 0x00000071,
+		0x03F, 0x00000CF1,
 		0x033, 0x00000029,
-		0x03F, 0x00000074,
+		0x03F, 0x00000CF4,
 		0x033, 0x0000002A,
-		0x03F, 0x00000077,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF7,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
-		0x03F, 0x00000005,
+		0x03F, 0x00000C09,
 		0x033, 0x00000021,
-		0x03F, 0x00000008,
+		0x03F, 0x00000C0C,
 		0x033, 0x00000022,
-		0x03F, 0x0000000B,
+		0x03F, 0x00000C0F,
 		0x033, 0x00000023,
-		0x03F, 0x0000000E,
+		0x03F, 0x00000C2C,
 		0x033, 0x00000024,
-		0x03F, 0x0000002B,
+		0x03F, 0x00000C2F,
 		0x033, 0x00000025,
-		0x03F, 0x00000068,
+		0x03F, 0x00000C8A,
 		0x033, 0x00000026,
-		0x03F, 0x0000006B,
+		0x03F, 0x00000C8D,
 		0x033, 0x00000027,
-		0x03F, 0x0000006E,
+		0x03F, 0x00000C90,
 		0x033, 0x00000028,
-		0x03F, 0x00000071,
+		0x03F, 0x00000CD0,
 		0x033, 0x00000029,
-		0x03F, 0x00000074,
+		0x03F, 0x00000CF2,
 		0x033, 0x0000002A,
-		0x03F, 0x00000077,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF5,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
-		0x03F, 0x00000828,
+		0x03F, 0x00000C09,
 		0x033, 0x00000021,
-		0x03F, 0x0000082B,
+		0x03F, 0x00000C0C,
 		0x033, 0x00000022,
-		0x03F, 0x00000868,
+		0x03F, 0x00000C0F,
 		0x033, 0x00000023,
-		0x03F, 0x00000889,
+		0x03F, 0x00000C2C,
 		0x033, 0x00000024,
-		0x03F, 0x000008AA,
+		0x03F, 0x00000C2F,
 		0x033, 0x00000025,
-		0x03F, 0x00000CE8,
+		0x03F, 0x00000C8A,
 		0x033, 0x00000026,
-		0x03F, 0x00000CEB,
+		0x03F, 0x00000C8D,
 		0x033, 0x00000027,
-		0x03F, 0x00000CEE,
+		0x03F, 0x00000C90,
 		0x033, 0x00000028,
-		0x03F, 0x00000CF1,
+		0x03F, 0x00000CD0,
 		0x033, 0x00000029,
-		0x03F, 0x00000CF4,
+		0x03F, 0x00000CF2,
 		0x033, 0x0000002A,
-		0x03F, 0x00000CF7,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF5,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
-		0x03F, 0x0000042A,
+		0x03F, 0x00000007,
 		0x033, 0x00000021,
-		0x03F, 0x00000829,
+		0x03F, 0x0000000A,
 		0x033, 0x00000022,
-		0x03F, 0x00000848,
+		0x03F, 0x0000000D,
 		0x033, 0x00000023,
-		0x03F, 0x0000084B,
+		0x03F, 0x0000002A,
 		0x033, 0x00000024,
-		0x03F, 0x00000C4C,
+		0x03F, 0x0000002D,
 		0x033, 0x00000025,
-		0x03F, 0x00000C8B,
+		0x03F, 0x00000030,
 		0x033, 0x00000026,
-		0x03F, 0x00000CEA,
+		0x03F, 0x0000006D,
 		0x033, 0x00000027,
-		0x03F, 0x00000CED,
+		0x03F, 0x00000070,
 		0x033, 0x00000028,
-		0x03F, 0x00000CF0,
+		0x03F, 0x000000ED,
 		0x033, 0x00000029,
-		0x03F, 0x00000CF3,
+		0x03F, 0x000000F0,
 		0x033, 0x0000002A,
-		0x03F, 0x00000CF6,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000000F3,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
-		0x03F, 0x00000005,
+		0x03F, 0x00000429,
 		0x033, 0x00000021,
-		0x03F, 0x00000008,
+		0x03F, 0x00000828,
 		0x033, 0x00000022,
-		0x03F, 0x0000000B,
+		0x03F, 0x00000847,
 		0x033, 0x00000023,
-		0x03F, 0x0000000E,
+		0x03F, 0x0000084A,
 		0x033, 0x00000024,
-		0x03F, 0x0000002B,
+		0x03F, 0x00000C4B,
 		0x033, 0x00000025,
-		0x03F, 0x00000068,
+		0x03F, 0x00000CE5,
 		0x033, 0x00000026,
-		0x03F, 0x0000006B,
+		0x03F, 0x00000CE8,
 		0x033, 0x00000027,
-		0x03F, 0x0000006E,
+		0x03F, 0x00000CEB,
 		0x033, 0x00000028,
-		0x03F, 0x00000071,
+		0x03F, 0x00000CEE,
 		0x033, 0x00000029,
-		0x03F, 0x00000074,
+		0x03F, 0x00000CF1,
 		0x033, 0x0000002A,
-		0x03F, 0x00000077,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF4,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000020,
+		0x03F, 0x00000C0A,
+		0x033, 0x00000021,
+		0x03F, 0x00000C0D,
+		0x033, 0x00000022,
+		0x03F, 0x00000C2A,
+		0x033, 0x00000023,
+		0x03F, 0x00000C2D,
+		0x033, 0x00000024,
+		0x03F, 0x00000C6A,
+		0x033, 0x00000025,
+		0x03F, 0x00000CAA,
+		0x033, 0x00000026,
+		0x03F, 0x00000CAD,
+		0x033, 0x00000027,
+		0x03F, 0x00000CB0,
+		0x033, 0x00000028,
+		0x03F, 0x00000CF1,
+		0x033, 0x00000029,
+		0x03F, 0x00000CF4,
+		0x033, 0x0000002A,
+		0x03F, 0x00000CF7,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
 		0x03F, 0x00000C09,
 		0x033, 0x00000021,
@@ -4779,53 +5764,53 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000CF2,
 		0x033, 0x0000002A,
 		0x03F, 0x00000CF5,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
-		0x03F, 0x00000429,
+		0x03F, 0x00000007,
 		0x033, 0x00000021,
-		0x03F, 0x00000828,
+		0x03F, 0x0000000A,
 		0x033, 0x00000022,
-		0x03F, 0x00000847,
+		0x03F, 0x0000000D,
 		0x033, 0x00000023,
-		0x03F, 0x0000084A,
+		0x03F, 0x0000002A,
 		0x033, 0x00000024,
-		0x03F, 0x00000C4B,
+		0x03F, 0x0000002D,
 		0x033, 0x00000025,
-		0x03F, 0x00000C8A,
+		0x03F, 0x00000030,
 		0x033, 0x00000026,
-		0x03F, 0x00000CEA,
+		0x03F, 0x0000006D,
 		0x033, 0x00000027,
-		0x03F, 0x00000CED,
+		0x03F, 0x00000070,
 		0x033, 0x00000028,
-		0x03F, 0x00000CF0,
+		0x03F, 0x000000ED,
 		0x033, 0x00000029,
-		0x03F, 0x00000CF3,
+		0x03F, 0x000000F0,
 		0x033, 0x0000002A,
-		0x03F, 0x00000CF6,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000000F3,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
-		0x03F, 0x00000C09,
+		0x03F, 0x00000005,
 		0x033, 0x00000021,
-		0x03F, 0x00000C0C,
+		0x03F, 0x00000008,
 		0x033, 0x00000022,
-		0x03F, 0x00000C0F,
+		0x03F, 0x0000000B,
 		0x033, 0x00000023,
-		0x03F, 0x00000C2C,
+		0x03F, 0x0000000E,
 		0x033, 0x00000024,
-		0x03F, 0x00000C2F,
+		0x03F, 0x0000002B,
 		0x033, 0x00000025,
-		0x03F, 0x00000C8A,
+		0x03F, 0x00000068,
 		0x033, 0x00000026,
-		0x03F, 0x00000C8D,
+		0x03F, 0x0000006B,
 		0x033, 0x00000027,
-		0x03F, 0x00000C90,
+		0x03F, 0x0000006E,
 		0x033, 0x00000028,
-		0x03F, 0x00000CD0,
+		0x03F, 0x00000071,
 		0x033, 0x00000029,
-		0x03F, 0x00000CF2,
+		0x03F, 0x00000074,
 		0x033, 0x0000002A,
-		0x03F, 0x00000CF5,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000077,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
 		0x03F, 0x0000042B,
 		0x033, 0x00000021,
@@ -4848,7 +5833,30 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000CF1,
 		0x033, 0x0000002A,
 		0x03F, 0x00000CF4,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000020,
+		0x03F, 0x00000005,
+		0x033, 0x00000021,
+		0x03F, 0x00000008,
+		0x033, 0x00000022,
+		0x03F, 0x0000000B,
+		0x033, 0x00000023,
+		0x03F, 0x0000000E,
+		0x033, 0x00000024,
+		0x03F, 0x0000002B,
+		0x033, 0x00000025,
+		0x03F, 0x00000068,
+		0x033, 0x00000026,
+		0x03F, 0x0000006B,
+		0x033, 0x00000027,
+		0x03F, 0x0000006E,
+		0x033, 0x00000028,
+		0x03F, 0x00000071,
+		0x033, 0x00000029,
+		0x03F, 0x00000074,
+		0x033, 0x0000002A,
+		0x03F, 0x00000077,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000020,
 		0x03F, 0x0000042B,
 		0x033, 0x00000021,
@@ -4871,6 +5879,52 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000CF1,
 		0x033, 0x0000002A,
 		0x03F, 0x00000CF4,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000020,
+		0x03F, 0x00000007,
+		0x033, 0x00000021,
+		0x03F, 0x0000000A,
+		0x033, 0x00000022,
+		0x03F, 0x0000000D,
+		0x033, 0x00000023,
+		0x03F, 0x0000002A,
+		0x033, 0x00000024,
+		0x03F, 0x0000002D,
+		0x033, 0x00000025,
+		0x03F, 0x00000030,
+		0x033, 0x00000026,
+		0x03F, 0x0000006D,
+		0x033, 0x00000027,
+		0x03F, 0x00000070,
+		0x033, 0x00000028,
+		0x03F, 0x000000ED,
+		0x033, 0x00000029,
+		0x03F, 0x000000F0,
+		0x033, 0x0000002A,
+		0x03F, 0x000000F3,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000020,
+		0x03F, 0x00000007,
+		0x033, 0x00000021,
+		0x03F, 0x0000000A,
+		0x033, 0x00000022,
+		0x03F, 0x0000000D,
+		0x033, 0x00000023,
+		0x03F, 0x0000002A,
+		0x033, 0x00000024,
+		0x03F, 0x0000002D,
+		0x033, 0x00000025,
+		0x03F, 0x00000030,
+		0x033, 0x00000026,
+		0x03F, 0x0000006D,
+		0x033, 0x00000027,
+		0x03F, 0x00000070,
+		0x033, 0x00000028,
+		0x03F, 0x000000ED,
+		0x033, 0x00000029,
+		0x03F, 0x000000F0,
+		0x033, 0x0000002A,
+		0x03F, 0x000000F3,
 	0xA0000000,	0x00000000,
 		0x033, 0x00000020,
 		0x03F, 0x00000C09,
@@ -4895,30 +5949,30 @@ u32 array_mp_8822b_radiob[] = {
 		0x033, 0x0000002A,
 		0x03F, 0x00000CF5,
 	0xB0000000,	0x00000000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
-		0x03F, 0x00000007,
+		0x03F, 0x00000C0A,
 		0x033, 0x00000061,
-		0x03F, 0x0000000A,
+		0x03F, 0x00000C0D,
 		0x033, 0x00000062,
-		0x03F, 0x0000000D,
+		0x03F, 0x00000C2A,
 		0x033, 0x00000063,
-		0x03F, 0x0000002A,
+		0x03F, 0x00000C2D,
 		0x033, 0x00000064,
-		0x03F, 0x0000002D,
+		0x03F, 0x00000C6A,
 		0x033, 0x00000065,
-		0x03F, 0x00000030,
+		0x03F, 0x00000CAA,
 		0x033, 0x00000066,
-		0x03F, 0x0000006D,
+		0x03F, 0x00000CAD,
 		0x033, 0x00000067,
-		0x03F, 0x00000070,
+		0x03F, 0x00000CB0,
 		0x033, 0x00000068,
-		0x03F, 0x000000ED,
+		0x03F, 0x00000CF1,
 		0x033, 0x00000069,
-		0x03F, 0x000000F0,
+		0x03F, 0x00000CF4,
 		0x033, 0x0000006A,
-		0x03F, 0x000000F3,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF7,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
 		0x03F, 0x00000007,
 		0x033, 0x00000061,
@@ -4941,30 +5995,53 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x000000F0,
 		0x033, 0x0000006A,
 		0x03F, 0x000000F3,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
-		0x03F, 0x00000007,
+		0x03F, 0x00000005,
 		0x033, 0x00000061,
-		0x03F, 0x0000000A,
+		0x03F, 0x00000008,
 		0x033, 0x00000062,
-		0x03F, 0x0000000D,
+		0x03F, 0x0000000B,
 		0x033, 0x00000063,
-		0x03F, 0x0000002A,
+		0x03F, 0x0000000E,
 		0x033, 0x00000064,
-		0x03F, 0x0000002D,
+		0x03F, 0x0000002B,
 		0x033, 0x00000065,
-		0x03F, 0x00000030,
+		0x03F, 0x00000068,
 		0x033, 0x00000066,
-		0x03F, 0x0000006D,
+		0x03F, 0x0000006B,
 		0x033, 0x00000067,
-		0x03F, 0x00000070,
+		0x03F, 0x0000006E,
 		0x033, 0x00000068,
-		0x03F, 0x000000ED,
+		0x03F, 0x00000071,
 		0x033, 0x00000069,
-		0x03F, 0x000000F0,
+		0x03F, 0x00000074,
 		0x033, 0x0000006A,
-		0x03F, 0x000000F3,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000077,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000060,
+		0x03F, 0x00000429,
+		0x033, 0x00000061,
+		0x03F, 0x00000828,
+		0x033, 0x00000062,
+		0x03F, 0x00000847,
+		0x033, 0x00000063,
+		0x03F, 0x0000084A,
+		0x033, 0x00000064,
+		0x03F, 0x00000C4B,
+		0x033, 0x00000065,
+		0x03F, 0x00000C8A,
+		0x033, 0x00000066,
+		0x03F, 0x00000CEA,
+		0x033, 0x00000067,
+		0x03F, 0x00000CED,
+		0x033, 0x00000068,
+		0x03F, 0x00000CF0,
+		0x033, 0x00000069,
+		0x03F, 0x00000CF3,
+		0x033, 0x0000006A,
+		0x03F, 0x00000CF6,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
 		0x03F, 0x00000005,
 		0x033, 0x00000061,
@@ -4987,30 +6064,30 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000074,
 		0x033, 0x0000006A,
 		0x03F, 0x00000077,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
-		0x03F, 0x00000007,
+		0x03F, 0x0000042A,
 		0x033, 0x00000061,
-		0x03F, 0x0000000A,
+		0x03F, 0x00000829,
 		0x033, 0x00000062,
-		0x03F, 0x0000000D,
+		0x03F, 0x00000848,
 		0x033, 0x00000063,
-		0x03F, 0x0000002A,
+		0x03F, 0x0000084B,
 		0x033, 0x00000064,
-		0x03F, 0x0000002D,
+		0x03F, 0x00000C69,
 		0x033, 0x00000065,
-		0x03F, 0x00000030,
+		0x03F, 0x00000CA9,
 		0x033, 0x00000066,
-		0x03F, 0x0000006D,
+		0x03F, 0x00000CEA,
 		0x033, 0x00000067,
-		0x03F, 0x00000070,
+		0x03F, 0x00000CED,
 		0x033, 0x00000068,
-		0x03F, 0x000000ED,
+		0x03F, 0x00000CF0,
 		0x033, 0x00000069,
-		0x03F, 0x000000F0,
+		0x03F, 0x00000CF3,
 		0x033, 0x0000006A,
-		0x03F, 0x000000F3,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF6,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
 		0x03F, 0x00000007,
 		0x033, 0x00000061,
@@ -5033,7 +6110,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x000000F0,
 		0x033, 0x0000006A,
 		0x03F, 0x000000F3,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
 		0x03F, 0x00000007,
 		0x033, 0x00000061,
@@ -5056,99 +6133,76 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x000000F0,
 		0x033, 0x0000006A,
 		0x03F, 0x000000F3,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
-		0x033, 0x00000060,
-		0x03F, 0x00000005,
-		0x033, 0x00000061,
-		0x03F, 0x00000008,
-		0x033, 0x00000062,
-		0x03F, 0x0000000B,
-		0x033, 0x00000063,
-		0x03F, 0x0000000E,
-		0x033, 0x00000064,
-		0x03F, 0x0000002B,
-		0x033, 0x00000065,
-		0x03F, 0x00000068,
-		0x033, 0x00000066,
-		0x03F, 0x0000006B,
-		0x033, 0x00000067,
-		0x03F, 0x0000006E,
-		0x033, 0x00000068,
-		0x03F, 0x00000071,
-		0x033, 0x00000069,
-		0x03F, 0x00000074,
-		0x033, 0x0000006A,
-		0x03F, 0x00000077,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
-		0x03F, 0x00000005,
+		0x03F, 0x00000842,
 		0x033, 0x00000061,
-		0x03F, 0x00000008,
+		0x03F, 0x00000845,
 		0x033, 0x00000062,
-		0x03F, 0x0000000B,
+		0x03F, 0x00000866,
 		0x033, 0x00000063,
-		0x03F, 0x0000000E,
+		0x03F, 0x000008A6,
 		0x033, 0x00000064,
-		0x03F, 0x0000002B,
+		0x03F, 0x000008C8,
 		0x033, 0x00000065,
-		0x03F, 0x00000068,
+		0x03F, 0x00000CE8,
 		0x033, 0x00000066,
-		0x03F, 0x0000006B,
+		0x03F, 0x00000CEB,
 		0x033, 0x00000067,
-		0x03F, 0x0000006E,
+		0x03F, 0x00000CEE,
 		0x033, 0x00000068,
-		0x03F, 0x00000071,
+		0x03F, 0x00000CF1,
 		0x033, 0x00000069,
-		0x03F, 0x00000074,
+		0x03F, 0x00000CF4,
 		0x033, 0x0000006A,
-		0x03F, 0x00000077,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF7,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
-		0x03F, 0x00000842,
+		0x03F, 0x00000C0A,
 		0x033, 0x00000061,
-		0x03F, 0x00000845,
+		0x03F, 0x00000C0D,
 		0x033, 0x00000062,
-		0x03F, 0x00000866,
+		0x03F, 0x00000C2A,
 		0x033, 0x00000063,
-		0x03F, 0x000008A6,
+		0x03F, 0x00000C2D,
 		0x033, 0x00000064,
-		0x03F, 0x000008C8,
+		0x03F, 0x00000C6A,
 		0x033, 0x00000065,
-		0x03F, 0x00000CE8,
+		0x03F, 0x00000CAA,
 		0x033, 0x00000066,
-		0x03F, 0x00000CEB,
+		0x03F, 0x00000CAD,
 		0x033, 0x00000067,
-		0x03F, 0x00000CEE,
+		0x03F, 0x00000CB0,
 		0x033, 0x00000068,
 		0x03F, 0x00000CF1,
 		0x033, 0x00000069,
 		0x03F, 0x00000CF4,
 		0x033, 0x0000006A,
 		0x03F, 0x00000CF7,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
-		0x03F, 0x0000042A,
+		0x03F, 0x00000C0A,
 		0x033, 0x00000061,
-		0x03F, 0x00000829,
+		0x03F, 0x00000C0D,
 		0x033, 0x00000062,
-		0x03F, 0x00000848,
+		0x03F, 0x00000C2A,
 		0x033, 0x00000063,
-		0x03F, 0x0000084B,
+		0x03F, 0x00000C2D,
 		0x033, 0x00000064,
-		0x03F, 0x00000C69,
+		0x03F, 0x00000C6A,
 		0x033, 0x00000065,
-		0x03F, 0x00000CA9,
+		0x03F, 0x00000CAA,
 		0x033, 0x00000066,
-		0x03F, 0x00000CEA,
+		0x03F, 0x00000CAD,
 		0x033, 0x00000067,
-		0x03F, 0x00000CED,
+		0x03F, 0x00000CB0,
 		0x033, 0x00000068,
-		0x03F, 0x00000CF0,
+		0x03F, 0x00000CF1,
 		0x033, 0x00000069,
-		0x03F, 0x00000CF3,
+		0x03F, 0x00000CF4,
 		0x033, 0x0000006A,
-		0x03F, 0x00000CF6,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF7,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
 		0x03F, 0x00000005,
 		0x033, 0x00000061,
@@ -5171,53 +6225,53 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000074,
 		0x033, 0x0000006A,
 		0x03F, 0x00000077,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
-		0x03F, 0x00000C0A,
+		0x03F, 0x00000429,
 		0x033, 0x00000061,
-		0x03F, 0x00000C0D,
+		0x03F, 0x00000828,
 		0x033, 0x00000062,
-		0x03F, 0x00000C2A,
+		0x03F, 0x00000847,
 		0x033, 0x00000063,
-		0x03F, 0x00000C2D,
+		0x03F, 0x0000084A,
 		0x033, 0x00000064,
-		0x03F, 0x00000C6A,
+		0x03F, 0x00000C4B,
 		0x033, 0x00000065,
-		0x03F, 0x00000CAA,
+		0x03F, 0x00000CE5,
 		0x033, 0x00000066,
-		0x03F, 0x00000CAD,
+		0x03F, 0x00000CE8,
 		0x033, 0x00000067,
-		0x03F, 0x00000CB0,
+		0x03F, 0x00000CEB,
 		0x033, 0x00000068,
-		0x03F, 0x00000CF1,
+		0x03F, 0x00000CEE,
 		0x033, 0x00000069,
-		0x03F, 0x00000CF4,
+		0x03F, 0x00000CF1,
 		0x033, 0x0000006A,
-		0x03F, 0x00000CF7,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF4,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
-		0x03F, 0x00000429,
+		0x03F, 0x00000C0A,
 		0x033, 0x00000061,
-		0x03F, 0x00000828,
+		0x03F, 0x00000C0D,
 		0x033, 0x00000062,
-		0x03F, 0x00000847,
+		0x03F, 0x00000C2A,
 		0x033, 0x00000063,
-		0x03F, 0x0000084A,
+		0x03F, 0x00000C2D,
 		0x033, 0x00000064,
-		0x03F, 0x00000C4B,
+		0x03F, 0x00000C6A,
 		0x033, 0x00000065,
-		0x03F, 0x00000C8A,
+		0x03F, 0x00000CAA,
 		0x033, 0x00000066,
-		0x03F, 0x00000CEA,
+		0x03F, 0x00000CAD,
 		0x033, 0x00000067,
-		0x03F, 0x00000CED,
+		0x03F, 0x00000CB0,
 		0x033, 0x00000068,
-		0x03F, 0x00000CF0,
+		0x03F, 0x00000CF1,
 		0x033, 0x00000069,
-		0x03F, 0x00000CF3,
+		0x03F, 0x00000CF4,
 		0x033, 0x0000006A,
-		0x03F, 0x00000CF6,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF7,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
 		0x03F, 0x00000C0A,
 		0x033, 0x00000061,
@@ -5240,7 +6294,53 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000CF4,
 		0x033, 0x0000006A,
 		0x03F, 0x00000CF7,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000060,
+		0x03F, 0x00000007,
+		0x033, 0x00000061,
+		0x03F, 0x0000000A,
+		0x033, 0x00000062,
+		0x03F, 0x0000000D,
+		0x033, 0x00000063,
+		0x03F, 0x0000002A,
+		0x033, 0x00000064,
+		0x03F, 0x0000002D,
+		0x033, 0x00000065,
+		0x03F, 0x00000030,
+		0x033, 0x00000066,
+		0x03F, 0x0000006D,
+		0x033, 0x00000067,
+		0x03F, 0x00000070,
+		0x033, 0x00000068,
+		0x03F, 0x000000ED,
+		0x033, 0x00000069,
+		0x03F, 0x000000F0,
+		0x033, 0x0000006A,
+		0x03F, 0x000000F3,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000060,
+		0x03F, 0x00000005,
+		0x033, 0x00000061,
+		0x03F, 0x00000008,
+		0x033, 0x00000062,
+		0x03F, 0x0000000B,
+		0x033, 0x00000063,
+		0x03F, 0x0000000E,
+		0x033, 0x00000064,
+		0x03F, 0x0000002B,
+		0x033, 0x00000065,
+		0x03F, 0x00000068,
+		0x033, 0x00000066,
+		0x03F, 0x0000006B,
+		0x033, 0x00000067,
+		0x03F, 0x0000006E,
+		0x033, 0x00000068,
+		0x03F, 0x00000071,
+		0x033, 0x00000069,
+		0x03F, 0x00000074,
+		0x033, 0x0000006A,
+		0x03F, 0x00000077,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
 		0x03F, 0x0000042C,
 		0x033, 0x00000061,
@@ -5263,7 +6363,30 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000CF2,
 		0x033, 0x0000006A,
 		0x03F, 0x00000CF5,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000060,
+		0x03F, 0x00000005,
+		0x033, 0x00000061,
+		0x03F, 0x00000008,
+		0x033, 0x00000062,
+		0x03F, 0x0000000B,
+		0x033, 0x00000063,
+		0x03F, 0x0000000E,
+		0x033, 0x00000064,
+		0x03F, 0x0000002B,
+		0x033, 0x00000065,
+		0x03F, 0x00000068,
+		0x033, 0x00000066,
+		0x03F, 0x0000006B,
+		0x033, 0x00000067,
+		0x03F, 0x0000006E,
+		0x033, 0x00000068,
+		0x03F, 0x00000071,
+		0x033, 0x00000069,
+		0x03F, 0x00000074,
+		0x033, 0x0000006A,
+		0x03F, 0x00000077,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000060,
 		0x03F, 0x0000042C,
 		0x033, 0x00000061,
@@ -5286,6 +6409,52 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000CF2,
 		0x033, 0x0000006A,
 		0x03F, 0x00000CF5,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000060,
+		0x03F, 0x00000007,
+		0x033, 0x00000061,
+		0x03F, 0x0000000A,
+		0x033, 0x00000062,
+		0x03F, 0x0000000D,
+		0x033, 0x00000063,
+		0x03F, 0x0000002A,
+		0x033, 0x00000064,
+		0x03F, 0x0000002D,
+		0x033, 0x00000065,
+		0x03F, 0x00000030,
+		0x033, 0x00000066,
+		0x03F, 0x0000006D,
+		0x033, 0x00000067,
+		0x03F, 0x00000070,
+		0x033, 0x00000068,
+		0x03F, 0x000000ED,
+		0x033, 0x00000069,
+		0x03F, 0x000000F0,
+		0x033, 0x0000006A,
+		0x03F, 0x000000F3,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000060,
+		0x03F, 0x00000007,
+		0x033, 0x00000061,
+		0x03F, 0x0000000A,
+		0x033, 0x00000062,
+		0x03F, 0x0000000D,
+		0x033, 0x00000063,
+		0x03F, 0x0000002A,
+		0x033, 0x00000064,
+		0x03F, 0x0000002D,
+		0x033, 0x00000065,
+		0x03F, 0x00000030,
+		0x033, 0x00000066,
+		0x03F, 0x0000006D,
+		0x033, 0x00000067,
+		0x03F, 0x00000070,
+		0x033, 0x00000068,
+		0x03F, 0x000000ED,
+		0x033, 0x00000069,
+		0x03F, 0x000000F0,
+		0x033, 0x0000006A,
+		0x03F, 0x000000F3,
 	0xA0000000,	0x00000000,
 		0x033, 0x00000060,
 		0x03F, 0x00000C0A,
@@ -5310,30 +6479,30 @@ u32 array_mp_8822b_radiob[] = {
 		0x033, 0x0000006A,
 		0x03F, 0x00000CF7,
 	0xB0000000,	0x00000000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000000,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
-		0x03F, 0x00000007,
+		0x03F, 0x00000C09,
 		0x033, 0x000000A1,
-		0x03F, 0x0000000A,
+		0x03F, 0x00000C0C,
 		0x033, 0x000000A2,
-		0x03F, 0x0000000D,
+		0x03F, 0x00000C0F,
 		0x033, 0x000000A3,
-		0x03F, 0x0000002A,
+		0x03F, 0x00000C2C,
 		0x033, 0x000000A4,
-		0x03F, 0x0000002D,
+		0x03F, 0x00000C2F,
 		0x033, 0x000000A5,
-		0x03F, 0x00000030,
+		0x03F, 0x00000C8A,
 		0x033, 0x000000A6,
-		0x03F, 0x0000006D,
+		0x03F, 0x00000C8D,
 		0x033, 0x000000A7,
-		0x03F, 0x00000070,
+		0x03F, 0x00000C90,
 		0x033, 0x000000A8,
-		0x03F, 0x000000ED,
+		0x03F, 0x00000CEF,
 		0x033, 0x000000A9,
-		0x03F, 0x000000F0,
+		0x03F, 0x00000CF2,
 		0x033, 0x000000AA,
-		0x03F, 0x000000F3,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF5,
+	0x93000001,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
 		0x03F, 0x00000007,
 		0x033, 0x000000A1,
@@ -5356,30 +6525,53 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x000000F0,
 		0x033, 0x000000AA,
 		0x03F, 0x000000F3,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000002,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
-		0x03F, 0x00000007,
+		0x03F, 0x00000005,
 		0x033, 0x000000A1,
-		0x03F, 0x0000000A,
+		0x03F, 0x00000008,
 		0x033, 0x000000A2,
-		0x03F, 0x0000000D,
+		0x03F, 0x0000000B,
 		0x033, 0x000000A3,
-		0x03F, 0x0000002A,
+		0x03F, 0x0000000E,
 		0x033, 0x000000A4,
-		0x03F, 0x0000002D,
+		0x03F, 0x00000047,
 		0x033, 0x000000A5,
-		0x03F, 0x00000030,
+		0x03F, 0x0000004A,
 		0x033, 0x000000A6,
-		0x03F, 0x0000006D,
+		0x03F, 0x0000004D,
 		0x033, 0x000000A7,
-		0x03F, 0x00000070,
+		0x03F, 0x00000050,
 		0x033, 0x000000A8,
-		0x03F, 0x000000ED,
+		0x03F, 0x00000053,
 		0x033, 0x000000A9,
-		0x03F, 0x000000F0,
+		0x03F, 0x00000056,
 		0x033, 0x000000AA,
-		0x03F, 0x000000F3,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000094,
+	0x93000003,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x000000A0,
+		0x03F, 0x00000429,
+		0x033, 0x000000A1,
+		0x03F, 0x00000828,
+		0x033, 0x000000A2,
+		0x03F, 0x00000847,
+		0x033, 0x000000A3,
+		0x03F, 0x0000084A,
+		0x033, 0x000000A4,
+		0x03F, 0x00000C4B,
+		0x033, 0x000000A5,
+		0x03F, 0x00000C8A,
+		0x033, 0x000000A6,
+		0x03F, 0x00000CEA,
+		0x033, 0x000000A7,
+		0x03F, 0x00000CED,
+		0x033, 0x000000A8,
+		0x03F, 0x00000CF0,
+		0x033, 0x000000A9,
+		0x03F, 0x00000CF3,
+		0x033, 0x000000AA,
+		0x03F, 0x00000CF6,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
 		0x03F, 0x00000005,
 		0x033, 0x000000A1,
@@ -5402,30 +6594,30 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000056,
 		0x033, 0x000000AA,
 		0x03F, 0x00000094,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x93000005,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
-		0x03F, 0x00000007,
+		0x03F, 0x0000042A,
 		0x033, 0x000000A1,
-		0x03F, 0x0000000A,
+		0x03F, 0x00000829,
 		0x033, 0x000000A2,
-		0x03F, 0x0000000D,
+		0x03F, 0x00000848,
 		0x033, 0x000000A3,
-		0x03F, 0x0000002A,
+		0x03F, 0x0000084B,
 		0x033, 0x000000A4,
-		0x03F, 0x0000002D,
+		0x03F, 0x00000C4C,
 		0x033, 0x000000A5,
-		0x03F, 0x00000030,
+		0x03F, 0x00000CA9,
 		0x033, 0x000000A6,
-		0x03F, 0x0000006D,
+		0x03F, 0x00000CEA,
 		0x033, 0x000000A7,
-		0x03F, 0x00000070,
+		0x03F, 0x00000CED,
 		0x033, 0x000000A8,
-		0x03F, 0x000000ED,
+		0x03F, 0x00000CF0,
 		0x033, 0x000000A9,
-		0x03F, 0x000000F0,
+		0x03F, 0x00000CF3,
 		0x033, 0x000000AA,
-		0x03F, 0x000000F3,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF6,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
 		0x03F, 0x00000007,
 		0x033, 0x000000A1,
@@ -5448,7 +6640,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x000000F0,
 		0x033, 0x000000AA,
 		0x03F, 0x000000F3,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
 		0x03F, 0x00000007,
 		0x033, 0x000000A1,
@@ -5471,122 +6663,122 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x000000F0,
 		0x033, 0x000000AA,
 		0x03F, 0x000000F3,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000008,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
-		0x03F, 0x00000005,
+		0x03F, 0x00000826,
 		0x033, 0x000000A1,
-		0x03F, 0x00000008,
+		0x03F, 0x00000829,
 		0x033, 0x000000A2,
-		0x03F, 0x0000000B,
+		0x03F, 0x0000082C,
 		0x033, 0x000000A3,
-		0x03F, 0x0000000E,
+		0x03F, 0x0000082F,
 		0x033, 0x000000A4,
-		0x03F, 0x00000047,
+		0x03F, 0x0000086C,
 		0x033, 0x000000A5,
-		0x03F, 0x0000004A,
+		0x03F, 0x00000CE8,
 		0x033, 0x000000A6,
-		0x03F, 0x0000004D,
+		0x03F, 0x00000CEB,
 		0x033, 0x000000A7,
-		0x03F, 0x00000050,
+		0x03F, 0x00000CEE,
 		0x033, 0x000000A8,
-		0x03F, 0x00000053,
+		0x03F, 0x00000CF1,
 		0x033, 0x000000A9,
-		0x03F, 0x00000056,
+		0x03F, 0x00000CF4,
 		0x033, 0x000000AA,
-		0x03F, 0x00000094,
-	0x9300200c,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF7,
+	0x93000009,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
-		0x03F, 0x00000005,
+		0x03F, 0x00000C09,
 		0x033, 0x000000A1,
-		0x03F, 0x00000008,
+		0x03F, 0x00000C0C,
 		0x033, 0x000000A2,
-		0x03F, 0x0000000B,
+		0x03F, 0x00000C0F,
 		0x033, 0x000000A3,
-		0x03F, 0x0000000E,
+		0x03F, 0x00000C2C,
 		0x033, 0x000000A4,
-		0x03F, 0x00000047,
+		0x03F, 0x00000C2F,
 		0x033, 0x000000A5,
-		0x03F, 0x0000004A,
+		0x03F, 0x00000C8A,
 		0x033, 0x000000A6,
-		0x03F, 0x0000004D,
+		0x03F, 0x00000C8D,
 		0x033, 0x000000A7,
-		0x03F, 0x00000050,
+		0x03F, 0x00000C90,
 		0x033, 0x000000A8,
-		0x03F, 0x00000053,
+		0x03F, 0x00000CEF,
 		0x033, 0x000000A9,
-		0x03F, 0x00000056,
+		0x03F, 0x00000CF2,
 		0x033, 0x000000AA,
-		0x03F, 0x00000094,
-	0x93012100,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF5,
+	0x9300000a,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
-		0x03F, 0x00000826,
+		0x03F, 0x00000C09,
 		0x033, 0x000000A1,
-		0x03F, 0x00000829,
+		0x03F, 0x00000C0C,
 		0x033, 0x000000A2,
-		0x03F, 0x0000082C,
+		0x03F, 0x00000C0F,
 		0x033, 0x000000A3,
-		0x03F, 0x0000082F,
+		0x03F, 0x00000C2C,
 		0x033, 0x000000A4,
-		0x03F, 0x0000086C,
+		0x03F, 0x00000C2F,
 		0x033, 0x000000A5,
-		0x03F, 0x00000CE8,
+		0x03F, 0x00000C8A,
 		0x033, 0x000000A6,
-		0x03F, 0x00000CEB,
+		0x03F, 0x00000C8D,
 		0x033, 0x000000A7,
-		0x03F, 0x00000CEE,
+		0x03F, 0x00000C90,
 		0x033, 0x000000A8,
-		0x03F, 0x00000CF1,
+		0x03F, 0x00000CEF,
 		0x033, 0x000000A9,
-		0x03F, 0x00000CF4,
+		0x03F, 0x00000CF2,
 		0x033, 0x000000AA,
-		0x03F, 0x00000CF7,
-	0x93002100,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF5,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
-		0x03F, 0x0000042A,
+		0x03F, 0x00000007,
 		0x033, 0x000000A1,
-		0x03F, 0x00000829,
+		0x03F, 0x0000000A,
 		0x033, 0x000000A2,
-		0x03F, 0x00000848,
+		0x03F, 0x0000000D,
 		0x033, 0x000000A3,
-		0x03F, 0x0000084B,
+		0x03F, 0x0000002A,
 		0x033, 0x000000A4,
-		0x03F, 0x00000C4C,
+		0x03F, 0x0000002D,
 		0x033, 0x000000A5,
-		0x03F, 0x00000CA9,
+		0x03F, 0x00000030,
 		0x033, 0x000000A6,
-		0x03F, 0x00000CEA,
+		0x03F, 0x0000006D,
 		0x033, 0x000000A7,
-		0x03F, 0x00000CED,
+		0x03F, 0x00000070,
 		0x033, 0x000000A8,
-		0x03F, 0x00000CF0,
+		0x03F, 0x000000ED,
 		0x033, 0x000000A9,
-		0x03F, 0x00000CF3,
+		0x03F, 0x000000F0,
 		0x033, 0x000000AA,
-		0x03F, 0x00000CF6,
-	0x9000200c,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000000F3,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
-		0x03F, 0x00000005,
+		0x03F, 0x00000429,
 		0x033, 0x000000A1,
-		0x03F, 0x00000008,
+		0x03F, 0x00000828,
 		0x033, 0x000000A2,
-		0x03F, 0x0000000B,
+		0x03F, 0x00000847,
 		0x033, 0x000000A3,
-		0x03F, 0x0000000E,
+		0x03F, 0x0000084A,
 		0x033, 0x000000A4,
-		0x03F, 0x00000047,
+		0x03F, 0x00000C4B,
 		0x033, 0x000000A5,
-		0x03F, 0x0000004A,
+		0x03F, 0x00000CE5,
 		0x033, 0x000000A6,
-		0x03F, 0x0000004D,
+		0x03F, 0x00000CE8,
 		0x033, 0x000000A7,
-		0x03F, 0x00000050,
+		0x03F, 0x00000CEB,
 		0x033, 0x000000A8,
-		0x03F, 0x00000053,
+		0x03F, 0x00000CEE,
 		0x033, 0x000000A9,
-		0x03F, 0x00000056,
+		0x03F, 0x00000CF1,
 		0x033, 0x000000AA,
-		0x03F, 0x00000094,
-	0x90001004,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF4,
+	0x9300000d,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
 		0x03F, 0x00000C09,
 		0x033, 0x000000A1,
@@ -5609,53 +6801,76 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000CF2,
 		0x033, 0x000000AA,
 		0x03F, 0x00000CF5,
-	0x93002000,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000e,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
-		0x03F, 0x00000429,
+		0x03F, 0x00000C09,
 		0x033, 0x000000A1,
-		0x03F, 0x00000828,
+		0x03F, 0x00000C0C,
 		0x033, 0x000000A2,
-		0x03F, 0x00000847,
+		0x03F, 0x00000C0F,
 		0x033, 0x000000A3,
-		0x03F, 0x0000084A,
+		0x03F, 0x00000C2C,
 		0x033, 0x000000A4,
-		0x03F, 0x00000C4B,
+		0x03F, 0x00000C2F,
 		0x033, 0x000000A5,
 		0x03F, 0x00000C8A,
 		0x033, 0x000000A6,
-		0x03F, 0x00000CEA,
+		0x03F, 0x00000C8D,
 		0x033, 0x000000A7,
-		0x03F, 0x00000CED,
+		0x03F, 0x00000C90,
 		0x033, 0x000000A8,
-		0x03F, 0x00000CF0,
+		0x03F, 0x00000CEF,
 		0x033, 0x000000A9,
-		0x03F, 0x00000CF3,
+		0x03F, 0x00000CF2,
 		0x033, 0x000000AA,
-		0x03F, 0x00000CF6,
-	0x93001000,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x00000CF5,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
-		0x03F, 0x00000C09,
+		0x03F, 0x00000007,
 		0x033, 0x000000A1,
-		0x03F, 0x00000C0C,
+		0x03F, 0x0000000A,
 		0x033, 0x000000A2,
-		0x03F, 0x00000C0F,
+		0x03F, 0x0000000D,
 		0x033, 0x000000A3,
-		0x03F, 0x00000C2C,
+		0x03F, 0x0000002A,
 		0x033, 0x000000A4,
-		0x03F, 0x00000C2F,
+		0x03F, 0x0000002D,
 		0x033, 0x000000A5,
-		0x03F, 0x00000C8A,
+		0x03F, 0x00000030,
 		0x033, 0x000000A6,
-		0x03F, 0x00000C8D,
+		0x03F, 0x0000006D,
 		0x033, 0x000000A7,
-		0x03F, 0x00000C90,
+		0x03F, 0x00000070,
 		0x033, 0x000000A8,
-		0x03F, 0x00000CEF,
+		0x03F, 0x000000ED,
 		0x033, 0x000000A9,
-		0x03F, 0x00000CF2,
+		0x03F, 0x000000F0,
 		0x033, 0x000000AA,
-		0x03F, 0x00000CF5,
-	0x90002100,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000000F3,
+	0x90000002,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x000000A0,
+		0x03F, 0x00000005,
+		0x033, 0x000000A1,
+		0x03F, 0x00000008,
+		0x033, 0x000000A2,
+		0x03F, 0x0000000B,
+		0x033, 0x000000A3,
+		0x03F, 0x0000000E,
+		0x033, 0x000000A4,
+		0x03F, 0x00000047,
+		0x033, 0x000000A5,
+		0x03F, 0x0000004A,
+		0x033, 0x000000A6,
+		0x03F, 0x0000004D,
+		0x033, 0x000000A7,
+		0x03F, 0x00000050,
+		0x033, 0x000000A8,
+		0x03F, 0x00000053,
+		0x033, 0x000000A9,
+		0x03F, 0x00000056,
+		0x033, 0x000000AA,
+		0x03F, 0x00000094,
+	0x90000003,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
 		0x03F, 0x0000042A,
 		0x033, 0x000000A1,
@@ -5678,7 +6893,30 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000CF2,
 		0x033, 0x000000AA,
 		0x03F, 0x00000CF5,
-	0x90002000,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x000000A0,
+		0x03F, 0x00000005,
+		0x033, 0x000000A1,
+		0x03F, 0x00000008,
+		0x033, 0x000000A2,
+		0x03F, 0x0000000B,
+		0x033, 0x000000A3,
+		0x03F, 0x0000000E,
+		0x033, 0x000000A4,
+		0x03F, 0x00000047,
+		0x033, 0x000000A5,
+		0x03F, 0x0000004A,
+		0x033, 0x000000A6,
+		0x03F, 0x0000004D,
+		0x033, 0x000000A7,
+		0x03F, 0x00000050,
+		0x033, 0x000000A8,
+		0x03F, 0x00000053,
+		0x033, 0x000000A9,
+		0x03F, 0x00000056,
+		0x033, 0x000000AA,
+		0x03F, 0x00000094,
+	0x90000005,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x000000A0,
 		0x03F, 0x0000042A,
 		0x033, 0x000000A1,
@@ -5701,6 +6939,52 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000CF2,
 		0x033, 0x000000AA,
 		0x03F, 0x00000CF5,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x000000A0,
+		0x03F, 0x00000007,
+		0x033, 0x000000A1,
+		0x03F, 0x0000000A,
+		0x033, 0x000000A2,
+		0x03F, 0x0000000D,
+		0x033, 0x000000A3,
+		0x03F, 0x0000002A,
+		0x033, 0x000000A4,
+		0x03F, 0x0000002D,
+		0x033, 0x000000A5,
+		0x03F, 0x00000030,
+		0x033, 0x000000A6,
+		0x03F, 0x0000006D,
+		0x033, 0x000000A7,
+		0x03F, 0x00000070,
+		0x033, 0x000000A8,
+		0x03F, 0x000000ED,
+		0x033, 0x000000A9,
+		0x03F, 0x000000F0,
+		0x033, 0x000000AA,
+		0x03F, 0x000000F3,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x000000A0,
+		0x03F, 0x00000007,
+		0x033, 0x000000A1,
+		0x03F, 0x0000000A,
+		0x033, 0x000000A2,
+		0x03F, 0x0000000D,
+		0x033, 0x000000A3,
+		0x03F, 0x0000002A,
+		0x033, 0x000000A4,
+		0x03F, 0x0000002D,
+		0x033, 0x000000A5,
+		0x03F, 0x00000030,
+		0x033, 0x000000A6,
+		0x03F, 0x0000006D,
+		0x033, 0x000000A7,
+		0x03F, 0x00000070,
+		0x033, 0x000000A8,
+		0x03F, 0x000000ED,
+		0x033, 0x000000A9,
+		0x03F, 0x000000F0,
+		0x033, 0x000000AA,
+		0x03F, 0x000000F3,
 	0xA0000000,	0x00000000,
 		0x033, 0x000000A0,
 		0x03F, 0x00000C09,
@@ -5727,7 +7011,16 @@ u32 array_mp_8822b_radiob[] = {
 	0xB0000000,	0x00000000,
 		0x0EF, 0x00000000,
 		0x0EF, 0x00000400,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000000,
+		0x03F, 0x0000265A,
+		0x033, 0x00000001,
+		0x03F, 0x0000265A,
+		0x033, 0x00000002,
+		0x03F, 0x0000265A,
+		0x033, 0x00000003,
+		0x03F, 0x0000265A,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x0000265A,
 		0x033, 0x00000001,
@@ -5736,7 +7029,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x0000265A,
 		0x033, 0x00000003,
 		0x03F, 0x0000265A,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x0000265A,
 		0x033, 0x00000001,
@@ -5745,7 +7038,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x0000265A,
 		0x033, 0x00000003,
 		0x03F, 0x0000265A,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x0000265A,
 		0x033, 0x00000001,
@@ -5754,7 +7047,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x0000265A,
 		0x033, 0x00000003,
 		0x03F, 0x0000265A,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x0000265A,
 		0x033, 0x00000001,
@@ -5763,7 +7056,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x0000265A,
 		0x033, 0x00000003,
 		0x03F, 0x0000265A,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x0000265A,
 		0x033, 0x00000001,
@@ -5772,7 +7065,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x0000265A,
 		0x033, 0x00000003,
 		0x03F, 0x0000265A,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x0000265A,
 		0x033, 0x00000001,
@@ -5781,7 +7074,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x0000265A,
 		0x033, 0x00000003,
 		0x03F, 0x0000265A,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x0000265A,
 		0x033, 0x00000001,
@@ -5790,7 +7083,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x0000265A,
 		0x033, 0x00000003,
 		0x03F, 0x0000265A,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x0000265A,
 		0x033, 0x00000001,
@@ -5811,7 +7104,7 @@ u32 array_mp_8822b_radiob[] = {
 	0xB0000000,	0x00000000,
 		0x0EF, 0x00000000,
 		0x0EF, 0x00000100,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000745,
 		0x033, 0x00000001,
@@ -5820,7 +7113,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000745,
 		0x033, 0x00000003,
 		0x03F, 0x00000745,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000745,
 		0x033, 0x00000001,
@@ -5829,7 +7122,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000745,
 		0x033, 0x00000003,
 		0x03F, 0x00000745,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000745,
 		0x033, 0x00000001,
@@ -5838,7 +7131,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000745,
 		0x033, 0x00000003,
 		0x03F, 0x00000745,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000745,
 		0x033, 0x00000001,
@@ -5847,7 +7140,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000745,
 		0x033, 0x00000003,
 		0x03F, 0x00000745,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000745,
 		0x033, 0x00000001,
@@ -5856,7 +7149,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000745,
 		0x033, 0x00000003,
 		0x03F, 0x00000745,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000745,
 		0x033, 0x00000001,
@@ -5865,7 +7158,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000745,
 		0x033, 0x00000003,
 		0x03F, 0x00000745,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000745,
 		0x033, 0x00000001,
@@ -5874,7 +7167,16 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000745,
 		0x033, 0x00000003,
 		0x03F, 0x00000745,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000000,
+		0x03F, 0x00000745,
+		0x033, 0x00000001,
+		0x03F, 0x00000745,
+		0x033, 0x00000002,
+		0x03F, 0x00000745,
+		0x033, 0x00000003,
+		0x03F, 0x00000745,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000745,
 		0x033, 0x00000001,
@@ -5894,7 +7196,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000F34,
 	0xB0000000,	0x00000000,
 		0x0EF, 0x00000000,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
 		0x081, 0x0000F400,
 		0x087, 0x00016040,
 		0x051, 0x00000808,
@@ -5904,7 +7206,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x056, 0x00051000,
 		0x057, 0x0000CE0A,
 		0x058, 0x00082030,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
 		0x081, 0x0000F400,
 		0x087, 0x00016040,
 		0x051, 0x00000808,
@@ -5914,7 +7216,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x056, 0x00051000,
 		0x057, 0x0000CE0A,
 		0x058, 0x00082030,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x081, 0x0000F400,
 		0x087, 0x00016040,
 		0x051, 0x00000808,
@@ -5924,7 +7226,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x056, 0x00051000,
 		0x057, 0x0000CE0A,
 		0x058, 0x00082030,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x081, 0x0000F400,
 		0x087, 0x00016040,
 		0x051, 0x00000808,
@@ -5934,7 +7236,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x056, 0x00051000,
 		0x057, 0x0000CE0A,
 		0x058, 0x00082030,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x081, 0x0000F400,
 		0x087, 0x00016040,
 		0x051, 0x00000808,
@@ -5944,7 +7246,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x056, 0x00051000,
 		0x057, 0x0000CE0A,
 		0x058, 0x00082030,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x081, 0x0000F400,
 		0x087, 0x00016040,
 		0x051, 0x00000808,
@@ -5954,7 +7256,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x056, 0x00051000,
 		0x057, 0x0000CE0A,
 		0x058, 0x00082030,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
 		0x081, 0x0000F400,
 		0x087, 0x00016040,
 		0x051, 0x00000808,
@@ -5964,7 +7266,17 @@ u32 array_mp_8822b_radiob[] = {
 		0x056, 0x00051000,
 		0x057, 0x0000CE0A,
 		0x058, 0x00082030,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
+		0x081, 0x0000F400,
+		0x087, 0x00016040,
+		0x051, 0x00000808,
+		0x052, 0x00098002,
+		0x053, 0x0000FA47,
+		0x054, 0x00058032,
+		0x056, 0x00051000,
+		0x057, 0x0000CE0A,
+		0x058, 0x00082030,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x081, 0x0000F400,
 		0x087, 0x00016040,
 		0x051, 0x00000808,
@@ -5985,7 +7297,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x058, 0x00058750,
 	0xB0000000,	0x00000000,
 		0x0EF, 0x00000800,
-	0x8300100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x83000001,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000003,
 		0x033, 0x00000001,
@@ -6008,7 +7320,30 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000039,
 		0x033, 0x0000000A,
 		0x03F, 0x0000003C,
-	0x9300100f,	0x05050505,	0x40000000,	0x00000000,
+	0x93000004,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000000,
+		0x03F, 0x00000002,
+		0x033, 0x00000001,
+		0x03F, 0x00000005,
+		0x033, 0x00000002,
+		0x03F, 0x00000008,
+		0x033, 0x00000003,
+		0x03F, 0x0000000B,
+		0x033, 0x00000004,
+		0x03F, 0x0000000E,
+		0x033, 0x00000005,
+		0x03F, 0x0000002B,
+		0x033, 0x00000006,
+		0x03F, 0x0000002E,
+		0x033, 0x00000007,
+		0x03F, 0x00000031,
+		0x033, 0x00000008,
+		0x03F, 0x0000006E,
+		0x033, 0x00000009,
+		0x03F, 0x00000071,
+		0x033, 0x0000000A,
+		0x03F, 0x00000074,
+	0x93000006,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000003,
 		0x033, 0x00000001,
@@ -6031,7 +7366,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000039,
 		0x033, 0x0000000A,
 		0x03F, 0x0000003C,
-	0x9300100f,	0x00000000,	0x40000000,	0x00000000,
+	0x93000007,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000003,
 		0x033, 0x00000001,
@@ -6054,7 +7389,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000039,
 		0x033, 0x0000000A,
 		0x03F, 0x0000003C,
-	0x9300200f,	0x00000000,	0x40000000,	0x00000000,
+	0x9300000b,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000003,
 		0x033, 0x00000001,
@@ -6077,7 +7412,30 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000039,
 		0x033, 0x0000000A,
 		0x03F, 0x0000003C,
-	0x9000100f,	0x0a0a0a0a,	0x40000000,	0x00000000,
+	0x9300000c,	0x00000000,	0x40000000,	0x00000000,
+		0x033, 0x00000000,
+		0x03F, 0x0005142C,
+		0x033, 0x00000001,
+		0x03F, 0x0005142F,
+		0x033, 0x00000002,
+		0x03F, 0x00051432,
+		0x033, 0x00000003,
+		0x03F, 0x00051CA5,
+		0x033, 0x00000004,
+		0x03F, 0x00051CA8,
+		0x033, 0x00000005,
+		0x03F, 0x00051CAB,
+		0x033, 0x00000006,
+		0x03F, 0x00051CEB,
+		0x033, 0x00000007,
+		0x03F, 0x00051CEE,
+		0x033, 0x00000008,
+		0x03F, 0x00051CF1,
+		0x033, 0x00000009,
+		0x03F, 0x00051CF4,
+		0x033, 0x0000000A,
+		0x03F, 0x00051CF7,
+	0x90000001,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000003,
 		0x033, 0x00000001,
@@ -6100,7 +7458,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000039,
 		0x033, 0x0000000A,
 		0x03F, 0x0000003C,
-	0x9000100f,	0x05050505,	0x40000000,	0x00000000,
+	0x90000004,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000003,
 		0x033, 0x00000001,
@@ -6123,7 +7481,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000039,
 		0x033, 0x0000000A,
 		0x03F, 0x0000003C,
-	0x9000100f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000006,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000003,
 		0x033, 0x00000001,
@@ -6146,7 +7504,7 @@ u32 array_mp_8822b_radiob[] = {
 		0x03F, 0x00000039,
 		0x033, 0x0000000A,
 		0x03F, 0x0000003C,
-	0x9000200f,	0x00000000,	0x40000000,	0x00000000,
+	0x90000007,	0x00000000,	0x40000000,	0x00000000,
 		0x033, 0x00000000,
 		0x03F, 0x00000003,
 		0x033, 0x00000001,
@@ -6193,7 +7551,11 @@ u32 array_mp_8822b_radiob[] = {
 		0x033, 0x0000000A,
 		0x03F, 0x00051CF7,
 	0xB0000000,	0x00000000,
+	0x8300000c,	0x00000000,	0x40000000,	0x00000000,
+		0x0EF, 0x00000000,
+	0xA0000000,	0x00000000,
 		0x0EF, 0x00000000,
+	0xB0000000,	0x00000000,
 		0x0EF, 0x00000010,
 		0x033, 0x00000000,
 		0x008, 0x0009C060,
@@ -6203,7 +7565,11 @@ u32 array_mp_8822b_radiob[] = {
 		0x033, 0x000000A2,
 		0x0EF, 0x00080000,
 		0x03E, 0x0000593F,
+	0x8300000c,	0x00000000,	0x40000000,	0x00000000,
+		0x03F, 0x000D0F4F,
+	0xA0000000,	0x00000000,
 		0x03F, 0x000C0F4F,
+	0xB0000000,	0x00000000,
 		0x0EF, 0x00000000,
 		0x033, 0x000000A3,
 		0x0EF, 0x00080000,
@@ -6220,7 +7586,7 @@ odm_read_and_config_mp_8822b_radiob(
 {
 	u32	i = 0;
 	u8	c_cond;
-	bool	is_matched = true, is_skipped = false;
+	boolean	is_matched = true, is_skipped = false;
 	u32	array_len = sizeof(array_mp_8822b_radiob)/sizeof(u32);
 	u32	*array = array_mp_8822b_radiob;
 
@@ -6270,7 +7636,7 @@ odm_read_and_config_mp_8822b_radiob(
 u32
 odm_get_version_mp_8822b_radiob(void)
 {
-		return 63;
+		return 85;
 }
 
 /******************************************************************************
@@ -6451,6 +7817,301 @@ odm_read_and_config_mp_8822b_txpowertrack_type1(
 }
 
 /******************************************************************************
+*                           txpowertrack_type10.TXT
+******************************************************************************/
+
+u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_type10_8822b[][DELTA_SWINGIDX_SIZE] = {
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14},
+	{0, 1, 1, 2, 2, 3, 3, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 15, 15},
+};
+u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_type10_8822b[][DELTA_SWINGIDX_SIZE] = {
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 12, 13, 13, 14, 14, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 10, 10, 11, 12, 13, 14, 14, 15, 15, 15, 16, 16},
+};
+u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_type10_8822b[][DELTA_SWINGIDX_SIZE] = {
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 13, 14, 14},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14},
+};
+u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_type10_8822b[][DELTA_SWINGIDX_SIZE] = {
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 13, 14, 14, 15, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 12, 13, 13, 14, 14, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15, 15},
+};
+u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_type10_8822b[]    = {0, 1, 2, 3, 3, 4, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 13, 14, 15, 16, 16, 17, 18, 18, 18, 18, 18, 18, 18, 18};
+u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_type10_8822b[]    = {0, 1, 1, 2, 3, 4, 4, 5, 6, 7, 7, 8, 9, 10, 11, 12, 12, 13, 14, 15, 16, 17, 17, 18, 19, 20, 21, 22, 22, 22};
+u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_type10_8822b[]    = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 10, 11, 12, 13, 13, 14, 15, 16, 17, 18, 18, 18, 18, 18, 18, 18, 18, 18};
+u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_type10_8822b[]    = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 16, 17, 18, 19, 19, 20, 21, 22, 22, 22};
+u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_type10_8822b[] = {0, 1, 1, 2, 3, 4, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 13, 14, 15, 16, 16, 17, 17, 17, 17, 17, 17, 17, 17, 17};
+u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_type10_8822b[] = {0, 1, 1, 2, 3, 4, 4, 5, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 16, 17, 18, 19, 19, 20, 21, 22, 22, 22};
+u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_type10_8822b[] = {0, 1, 2, 3, 3, 4, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 13, 14, 15, 16, 17, 18, 18, 18, 18, 18, 18, 18, 18, 18};
+u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_type10_8822b[] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 16, 17, 18, 19, 19, 20, 21, 22, 22, 22};
+
+void
+odm_read_and_config_mp_8822b_txpowertrack_type10(
+	struct PHY_DM_STRUCT	 *p_dm_odm
+)
+{
+	struct odm_rf_calibration_structure  *p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_mp_8822b\n"));
+
+
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_type10_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2ga_n, g_delta_swing_table_idx_mp_2ga_n_txpowertrack_type10_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2gb_p, g_delta_swing_table_idx_mp_2gb_p_txpowertrack_type10_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2gb_n, g_delta_swing_table_idx_mp_2gb_n_txpowertrack_type10_8822b, DELTA_SWINGIDX_SIZE);
+
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_p, g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_type10_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_n, g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_type10_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_p, g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_type10_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_n, g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_type10_8822b, DELTA_SWINGIDX_SIZE);
+
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5ga_p, g_delta_swing_table_idx_mp_5ga_p_txpowertrack_type10_8822b, DELTA_SWINGIDX_SIZE*3);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_type10_8822b, DELTA_SWINGIDX_SIZE*3);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_type10_8822b, DELTA_SWINGIDX_SIZE*3);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_type10_8822b, DELTA_SWINGIDX_SIZE*3);
+}
+
+/******************************************************************************
+*                           txpowertrack_type11.TXT
+******************************************************************************/
+
+u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_type11_8822b[][DELTA_SWINGIDX_SIZE] = {
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14},
+	{0, 1, 1, 2, 2, 3, 3, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 15, 15},
+};
+u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_type11_8822b[][DELTA_SWINGIDX_SIZE] = {
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 12, 13, 13, 14, 14, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 10, 10, 11, 12, 13, 14, 14, 15, 15, 15, 16, 16},
+};
+u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_type11_8822b[][DELTA_SWINGIDX_SIZE] = {
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 13, 14, 14},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14},
+};
+u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_type11_8822b[][DELTA_SWINGIDX_SIZE] = {
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 13, 14, 14, 15, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 12, 13, 13, 14, 14, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15, 15},
+};
+u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_type11_8822b[]    = {0, 1, 2, 3, 3, 4, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 13, 14, 15, 16, 16, 17, 18, 18, 18, 18, 18, 18, 18, 18};
+u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_type11_8822b[]    = {0, 1, 1, 2, 3, 4, 4, 5, 6, 7, 7, 8, 9, 10, 11, 12, 12, 13, 14, 15, 16, 17, 17, 18, 19, 20, 21, 22, 22, 22};
+u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_type11_8822b[]    = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 10, 11, 12, 13, 13, 14, 15, 16, 17, 18, 18, 18, 18, 18, 18, 18, 18, 18};
+u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_type11_8822b[]    = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 16, 17, 18, 19, 19, 20, 21, 22, 22, 22};
+u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_type11_8822b[] = {0, 1, 1, 2, 3, 4, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 13, 14, 15, 16, 16, 17, 17, 17, 17, 17, 17, 17, 17, 17};
+u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_type11_8822b[] = {0, 1, 1, 2, 3, 4, 4, 5, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 16, 17, 18, 19, 19, 20, 21, 22, 22, 22};
+u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_type11_8822b[] = {0, 1, 2, 3, 3, 4, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 13, 14, 15, 16, 17, 18, 18, 18, 18, 18, 18, 18, 18, 18};
+u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_type11_8822b[] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 16, 17, 18, 19, 19, 20, 21, 22, 22, 22};
+
+void
+odm_read_and_config_mp_8822b_txpowertrack_type11(
+	struct PHY_DM_STRUCT	 *p_dm_odm
+)
+{
+	struct odm_rf_calibration_structure  *p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_mp_8822b\n"));
+
+
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_type11_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2ga_n, g_delta_swing_table_idx_mp_2ga_n_txpowertrack_type11_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2gb_p, g_delta_swing_table_idx_mp_2gb_p_txpowertrack_type11_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2gb_n, g_delta_swing_table_idx_mp_2gb_n_txpowertrack_type11_8822b, DELTA_SWINGIDX_SIZE);
+
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_p, g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_type11_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_n, g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_type11_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_p, g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_type11_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_n, g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_type11_8822b, DELTA_SWINGIDX_SIZE);
+
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5ga_p, g_delta_swing_table_idx_mp_5ga_p_txpowertrack_type11_8822b, DELTA_SWINGIDX_SIZE*3);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_type11_8822b, DELTA_SWINGIDX_SIZE*3);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_type11_8822b, DELTA_SWINGIDX_SIZE*3);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_type11_8822b, DELTA_SWINGIDX_SIZE*3);
+}
+
+/******************************************************************************
+*                           txpowertrack_type12.TXT
+******************************************************************************/
+
+u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_type12_8822b[][DELTA_SWINGIDX_SIZE] = {
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15},
+};
+u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_type12_8822b[][DELTA_SWINGIDX_SIZE] = {
+	{0, 1, 1, 2, 2, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16, 17},
+	{0, 1, 1, 2, 2, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16, 17},
+	{0, 1, 1, 2, 2, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16, 17},
+};
+u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_type12_8822b[][DELTA_SWINGIDX_SIZE] = {
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15},
+};
+u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_type12_8822b[][DELTA_SWINGIDX_SIZE] = {
+	{0, 1, 1, 2, 2, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16, 17},
+	{0, 1, 1, 2, 2, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16, 17},
+	{0, 1, 1, 2, 2, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16, 17},
+};
+u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_type12_8822b[]    = {0, 1, 1, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 7, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 11, 12};
+u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_type12_8822b[]    = {0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15};
+u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_type12_8822b[]    = {0, 1, 1, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 7, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 11, 12};
+u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_type12_8822b[]    = {0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15};
+u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_type12_8822b[] = {0, 1, 1, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 7, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 11, 12};
+u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_type12_8822b[] = {0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15};
+u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_type12_8822b[] = {0, 1, 1, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 7, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 11, 12};
+u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_type12_8822b[] = {0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15};
+
+void
+odm_read_and_config_mp_8822b_txpowertrack_type12(
+	struct PHY_DM_STRUCT	 *p_dm_odm
+)
+{
+	struct odm_rf_calibration_structure  *p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_mp_8822b\n"));
+
+
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_type12_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2ga_n, g_delta_swing_table_idx_mp_2ga_n_txpowertrack_type12_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2gb_p, g_delta_swing_table_idx_mp_2gb_p_txpowertrack_type12_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2gb_n, g_delta_swing_table_idx_mp_2gb_n_txpowertrack_type12_8822b, DELTA_SWINGIDX_SIZE);
+
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_p, g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_type12_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_n, g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_type12_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_p, g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_type12_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_n, g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_type12_8822b, DELTA_SWINGIDX_SIZE);
+
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5ga_p, g_delta_swing_table_idx_mp_5ga_p_txpowertrack_type12_8822b, DELTA_SWINGIDX_SIZE*3);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_type12_8822b, DELTA_SWINGIDX_SIZE*3);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_type12_8822b, DELTA_SWINGIDX_SIZE*3);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_type12_8822b, DELTA_SWINGIDX_SIZE*3);
+}
+
+/******************************************************************************
+*                           txpowertrack_type13.TXT
+******************************************************************************/
+
+u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_type13_8822b[][DELTA_SWINGIDX_SIZE] = {
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14},
+	{0, 1, 1, 2, 2, 3, 3, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 15, 15},
+};
+u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_type13_8822b[][DELTA_SWINGIDX_SIZE] = {
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 12, 13, 13, 14, 14, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 10, 10, 11, 12, 13, 14, 14, 15, 15, 15, 16, 16},
+};
+u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_type13_8822b[][DELTA_SWINGIDX_SIZE] = {
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 13, 14, 14},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14},
+};
+u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_type13_8822b[][DELTA_SWINGIDX_SIZE] = {
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 13, 14, 14, 15, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 12, 13, 13, 14, 14, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15, 15},
+};
+u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_type13_8822b[]    = {0, 1, 2, 3, 3, 4, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 13, 14, 15, 16, 16, 17, 18, 18, 18, 18, 18, 18, 18, 18};
+u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_type13_8822b[]    = {0, 1, 1, 2, 3, 4, 4, 5, 6, 7, 7, 8, 9, 10, 11, 12, 12, 13, 14, 15, 16, 17, 17, 18, 19, 20, 21, 22, 22, 22};
+u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_type13_8822b[]    = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 10, 11, 12, 13, 13, 14, 15, 16, 17, 18, 18, 18, 18, 18, 18, 18, 18, 18};
+u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_type13_8822b[]    = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 16, 17, 18, 19, 19, 20, 21, 22, 22, 22};
+u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_type13_8822b[] = {0, 1, 1, 2, 3, 4, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 13, 14, 15, 16, 16, 17, 17, 17, 17, 17, 17, 17, 17, 17};
+u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_type13_8822b[] = {0, 1, 1, 2, 3, 4, 4, 5, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 16, 17, 18, 19, 19, 20, 21, 22, 22, 22};
+u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_type13_8822b[] = {0, 1, 2, 3, 3, 4, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 13, 14, 15, 16, 17, 18, 18, 18, 18, 18, 18, 18, 18, 18};
+u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_type13_8822b[] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 16, 17, 18, 19, 19, 20, 21, 22, 22, 22};
+
+void
+odm_read_and_config_mp_8822b_txpowertrack_type13(
+	struct PHY_DM_STRUCT	 *p_dm_odm
+)
+{
+	struct odm_rf_calibration_structure  *p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_mp_8822b\n"));
+
+
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_type13_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2ga_n, g_delta_swing_table_idx_mp_2ga_n_txpowertrack_type13_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2gb_p, g_delta_swing_table_idx_mp_2gb_p_txpowertrack_type13_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2gb_n, g_delta_swing_table_idx_mp_2gb_n_txpowertrack_type13_8822b, DELTA_SWINGIDX_SIZE);
+
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_p, g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_type13_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_n, g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_type13_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_p, g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_type13_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_n, g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_type13_8822b, DELTA_SWINGIDX_SIZE);
+
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5ga_p, g_delta_swing_table_idx_mp_5ga_p_txpowertrack_type13_8822b, DELTA_SWINGIDX_SIZE*3);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_type13_8822b, DELTA_SWINGIDX_SIZE*3);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_type13_8822b, DELTA_SWINGIDX_SIZE*3);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_type13_8822b, DELTA_SWINGIDX_SIZE*3);
+}
+
+/******************************************************************************
+*                           txpowertrack_type14.TXT
+******************************************************************************/
+
+u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_type14_8822b[][DELTA_SWINGIDX_SIZE] = {
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14},
+	{0, 1, 1, 2, 2, 3, 3, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 15, 15},
+};
+u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_type14_8822b[][DELTA_SWINGIDX_SIZE] = {
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 12, 13, 13, 14, 14, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 10, 10, 11, 12, 13, 14, 14, 15, 15, 15, 16, 16},
+};
+u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_type14_8822b[][DELTA_SWINGIDX_SIZE] = {
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 13, 14, 14},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14},
+};
+u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_type14_8822b[][DELTA_SWINGIDX_SIZE] = {
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 13, 13, 14, 14, 15, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 12, 12, 13, 13, 14, 14, 15, 15},
+	{0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15, 15},
+};
+u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_type14_8822b[]    = {0, 1, 2, 3, 3, 4, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 13, 14, 15, 16, 16, 17, 18, 18, 18, 18, 18, 18, 18, 18};
+u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_type14_8822b[]    = {0, 1, 1, 2, 3, 4, 4, 5, 6, 7, 7, 8, 9, 10, 11, 12, 12, 13, 14, 15, 16, 17, 17, 18, 19, 20, 21, 22, 22, 22};
+u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_type14_8822b[]    = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 10, 11, 12, 13, 13, 14, 15, 16, 17, 18, 18, 18, 18, 18, 18, 18, 18, 18};
+u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_type14_8822b[]    = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 16, 17, 18, 19, 19, 20, 21, 22, 22, 22};
+u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_type14_8822b[] = {0, 1, 1, 2, 3, 4, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 13, 14, 15, 16, 16, 17, 17, 17, 17, 17, 17, 17, 17, 17};
+u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_type14_8822b[] = {0, 1, 1, 2, 3, 4, 4, 5, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 16, 17, 18, 19, 19, 20, 21, 22, 22, 22};
+u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_type14_8822b[] = {0, 1, 2, 3, 3, 4, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 13, 14, 15, 16, 17, 18, 18, 18, 18, 18, 18, 18, 18, 18};
+u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_type14_8822b[] = {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 16, 17, 18, 19, 19, 20, 21, 22, 22, 22};
+
+void
+odm_read_and_config_mp_8822b_txpowertrack_type14(
+	struct PHY_DM_STRUCT	 *p_dm_odm
+)
+{
+	struct odm_rf_calibration_structure  *p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_mp_8822b\n"));
+
+
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_type14_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2ga_n, g_delta_swing_table_idx_mp_2ga_n_txpowertrack_type14_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2gb_p, g_delta_swing_table_idx_mp_2gb_p_txpowertrack_type14_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2gb_n, g_delta_swing_table_idx_mp_2gb_n_txpowertrack_type14_8822b, DELTA_SWINGIDX_SIZE);
+
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_p, g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_type14_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_n, g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_type14_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_p, g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_type14_8822b, DELTA_SWINGIDX_SIZE);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_n, g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_type14_8822b, DELTA_SWINGIDX_SIZE);
+
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5ga_p, g_delta_swing_table_idx_mp_5ga_p_txpowertrack_type14_8822b, DELTA_SWINGIDX_SIZE*3);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_type14_8822b, DELTA_SWINGIDX_SIZE*3);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_type14_8822b, DELTA_SWINGIDX_SIZE*3);
+	odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_type14_8822b, DELTA_SWINGIDX_SIZE*3);
+}
+
+/******************************************************************************
 *                           txpowertrack_type2.TXT
 ******************************************************************************/
 
diff --git a/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_rf.h b/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_rf.h
index adf52e5..203aec1 100755..100644
--- a/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_rf.h
+++ b/rtl8822BU/hal/phydm/rtl8822b/halhwimg8822b_rf.h
@@ -1,6 +1,6 @@
 /******************************************************************************
 *
-* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+* Copyright(c) 2007 - 2017 Realtek Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of version 2 of the GNU General Public License as
@@ -11,14 +11,9 @@
 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
 * more details.
 *
-* You should have received a copy of the GNU General Public License along with
-* this program; if not, write to the Free Software Foundation, Inc.,
-* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
-*
-*
 ******************************************************************************/
 
-/*Image2HeaderVersion: 3.1*/
+/*Image2HeaderVersion: R2 1.2.1*/
 #if (RTL8822B_SUPPORT == 1)
 #ifndef __INC_MP_RF_HW_IMG_8822B_H
 #define __INC_MP_RF_HW_IMG_8822B_H
@@ -75,6 +70,56 @@ odm_read_and_config_mp_8822b_txpowertrack_type1(/* tc: Test Chip, mp: mp Chip*/
 u32	odm_get_version_mp_8822b_txpowertrack_type1(void);
 
 /******************************************************************************
+*                           txpowertrack_type10.TXT
+******************************************************************************/
+
+void
+odm_read_and_config_mp_8822b_txpowertrack_type10(/* tc: Test Chip, mp: mp Chip*/
+	struct	PHY_DM_STRUCT *p_dm_odm
+);
+u32	odm_get_version_mp_8822b_txpowertrack_type10(void);
+
+/******************************************************************************
+*                           txpowertrack_type11.TXT
+******************************************************************************/
+
+void
+odm_read_and_config_mp_8822b_txpowertrack_type11(/* tc: Test Chip, mp: mp Chip*/
+	struct	PHY_DM_STRUCT *p_dm_odm
+);
+u32	odm_get_version_mp_8822b_txpowertrack_type11(void);
+
+/******************************************************************************
+*                           txpowertrack_type12.TXT
+******************************************************************************/
+
+void
+odm_read_and_config_mp_8822b_txpowertrack_type12(/* tc: Test Chip, mp: mp Chip*/
+	struct	PHY_DM_STRUCT *p_dm_odm
+);
+u32	odm_get_version_mp_8822b_txpowertrack_type12(void);
+
+/******************************************************************************
+*                           txpowertrack_type13.TXT
+******************************************************************************/
+
+void
+odm_read_and_config_mp_8822b_txpowertrack_type13(/* tc: Test Chip, mp: mp Chip*/
+	struct	PHY_DM_STRUCT *p_dm_odm
+);
+u32	odm_get_version_mp_8822b_txpowertrack_type13(void);
+
+/******************************************************************************
+*                           txpowertrack_type14.TXT
+******************************************************************************/
+
+void
+odm_read_and_config_mp_8822b_txpowertrack_type14(/* tc: Test Chip, mp: mp Chip*/
+	struct	PHY_DM_STRUCT *p_dm_odm
+);
+u32	odm_get_version_mp_8822b_txpowertrack_type14(void);
+
+/******************************************************************************
 *                           txpowertrack_type2.TXT
 ******************************************************************************/
 
diff --git a/rtl8822BU/hal/phydm/phydm_kfree.h b/rtl8822BU/hal/phydm/rtl8822b/mp_precomp.h
index 30235df..fa483c6 100755..100644
--- a/rtl8822BU/hal/phydm/phydm_kfree.h
+++ b/rtl8822BU/hal/phydm/rtl8822b/mp_precomp.h
@@ -1,4 +1,3 @@
-
 /******************************************************************************
  *
  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
@@ -18,28 +17,3 @@
  *
  *
  ******************************************************************************/
-
-#ifndef	__PHYDMKFREE_H__
-#define    __PHYDKFREE_H__
-
-#define KFREE_VERSION	"1.0"
-
-enum phydm_kfree_channeltosw {
-	PHYDM_2G = 0,
-	PHYDM_5GLB1 = 1,
-	PHYDM_5GLB2 = 2,
-	PHYDM_5GMB1 = 3,
-	PHYDM_5GMB2 = 4,
-	PHYDM_5GHB = 5,
-};
-
-
-void
-phydm_config_kfree(
-	void	*p_dm_void,
-	u8	channel_to_sw,
-	u8	*kfree_table
-);
-
-
-#endif
diff --git a/rtl8822BU/hal/phydm/rtl8822b/phydm_hal_api8822b.c b/rtl8822BU/hal/phydm/rtl8822b/phydm_hal_api8822b.c
index f8f64d7..c0f33ad 100755..100644
--- a/rtl8822BU/hal/phydm/rtl8822b/phydm_hal_api8822b.c
+++ b/rtl8822BU/hal/phydm/rtl8822b/phydm_hal_api8822b.c
@@ -17,101 +17,94 @@
  *
  *
  ******************************************************************************/
-
 #include "mp_precomp.h"
 #include "../phydm_precomp.h"
 
-#if (RTL8822B_SUPPORT == 1)
 
+#if (RTL8822B_SUPPORT == 1)
+#if (PHYDM_FW_API_ENABLE_8822B == 1)
 /* ======================================================================== */
 /* These following functions can be used for PHY DM only*/
 
-u32	reg82c_8822b;
-u32	reg838_8822b;
-u32	reg830_8822b;
-u32	reg83c_8822b;
-u32	rega20_8822b;
-u32	rega24_8822b;
-u32	rega28_8822b;
 enum odm_bw_e	bw_8822b;
 u8	central_ch_8822b;
 
-u32 cca_ifem_ccut[12][4] = {
-	/*20M*/
-	{0x75D97010, 0x75D97010, 0x75D97010, 0x75D97010}, /*Reg82C*/
-	{0x00000000, 0x79a0ea2c, 0x00000000, 0x00000000}, /*Reg830*/
-	{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg838*/
-	{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg83C*/
-	/*40M*/
-	{0x75D97010, 0x75D97010, 0x75D97010, 0x75D97010}, /*Reg82C*/
-	{0x00000000, 0x79a0ea2c, 0x00000000, 0x79a0ea28}, /*Reg830*/
-	{0x87765541, 0x87766341, 0x87765541, 0x87766341}, /*Reg838*/
-	{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg83C*/
-	/*80M*/
-	{0x75C97010, 0x75C97010, 0x75C97010, 0x75C97010}, /*Reg82C*/
-	{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg830*/
-	{0x00000000, 0x87746641, 0x00000000, 0x87746641}, /*Reg838*/
-	{0x00000000, 0x00000000, 0x00000000, 0x00000000}
-}; /*Reg83C*/
-u32 cca_efem_ccut[12][4] = {
-	/*20M*/
-	{0x75A76010, 0x75A76010, 0x75A76010, 0x75A75010}, /*Reg82C*/
-	{0x00000000, 0x79a0ea2c, 0x00000000, 0x00000000}, /*Reg830*/
-	{0x87766651, 0x87766431, 0x87766451, 0x87766431}, /*Reg838*/
-	{0x9194b2b9, 0x9194b2b9, 0x9194b2b9, 0x9194b2b9}, /*Reg83C*/
-	/*40M*/
-	{0x75A85010, 0x75A75010, 0x75A85010, 0x75A75010}, /*Reg82C*/
-	{0x00000000, 0x79a0ea2c, 0x00000000, 0x00000000}, /*Reg830*/
-	{0x87766431, 0x87766431, 0x87766431, 0x87766431}, /*Reg838*/
-	{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg83C*/
-	/*80M*/
-	{0x76BA7010, 0x75BA7010, 0x76BA7010, 0x75BA7010}, /*Reg82C*/
-	{0x79a0ea28, 0x00000000, 0x79a0ea28, 0x00000000}, /*Reg830*/
-	{0x87766431, 0x87766431, 0x87766431, 0x87766431}, /*Reg838*/
-	{0x00000000, 0x00000000, 0x00000000, 0x00000000}
-}; /*Reg83C*/
-u32 cca_ifem_ccut_rfetype5[12][4] = {
-	/*20M*/
-	{0x75D97010, 0x75D97010, 0x75D97010, 0x75D97010}, /*Reg82C*/
-	{0x00000000, 0x79a0ea2c, 0x00000000, 0x00000000}, /*Reg830*/
-	{0x00000000, 0x00000000, 0x87766461, 0x87766461}, /*Reg838*/
-	{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg83C*/
-	/*40M*/
-	{0x75D97010, 0x75D97010, 0x75D97010, 0x75D97010}, /*Reg82C*/
-	{0x00000000, 0x79a0ea2c, 0x00000000, 0x79a0ea28}, /*Reg830*/
-	{0x87765541, 0x87766341, 0x87765541, 0x87766341}, /*Reg838*/
-	{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg83C*/
-	/*80M*/
-	{0x75C97010, 0x75C97010, 0x75C97010, 0x75C97010}, /*Reg82C*/
-	{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg830*/
-	{0x00000000, 0x76666641, 0x00000000, 0x76666641}, /*Reg838*/
-	{0x00000000, 0x00000000, 0x00000000, 0x00000000}
-}; /*Reg83C*/
-u32 cca_ifem_ccut_rfetype3[12][4] = {
-	/*20M*/
-	{0x75D97010, 0x75D97010, 0x75D97010, 0x75D97010}, /*Reg82C*/
-	{0x00000000, 0x79a0ea2c, 0x00000000, 0x00000000}, /*Reg830*/
-	{0x00000000, 0x00000000, 0x87766461, 0x87766461}, /*Reg838*/
-	{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg83C*/
-	/*40M*/
-	{0x75D97010, 0x75D97010, 0x75D97010, 0x75D97010}, /*Reg82C*/
-	{0x00000000, 0x79a0ea2c, 0x00000000, 0x79a0ea28}, /*Reg830*/
-	{0x87765541, 0x87766341, 0x87765541, 0x87766341}, /*Reg838*/
-	{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg83C*/
-	/*80M*/
+#if !(DM_ODM_SUPPORT_TYPE == ODM_CE)
+	u32	cca_ifem_bcut[3][4] = {
+		{0x75D97010, 0x75D97010, 0x75D97010, 0x75D97010}, /*Reg82C*/
+		{0x79a0ea2a, 0x79a0ea2a, 0x79a0ea2a, 0x79a0ea2a}, /*Reg830*/
+		{0x87766441, 0x87746341, 0x87765541, 0x87746341} /*Reg838*/
+	};
+	u32	cca_efem_bcut[3][4] = {
+		{0x75B76010, 0x75B76010, 0x75B76010, 0x75B75010}, /*Reg82C*/
+		{0x79a0ea2a, 0x79a0ea2a, 0x79a0ea2a, 0x79a0ea2a}, /*Reg830*/
+		{0x87766451, 0x87766431, 0x87766451, 0x87766431} /*Reg838*/
+	};
+#endif
+
+u32 cca_ifem_ccut[3][4] = {
 	{0x75C97010, 0x75C97010, 0x75C97010, 0x75C97010}, /*Reg82C*/
-	{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg830*/
-	{0x00000000, 0x76666641, 0x00000000, 0x76666641}, /*Reg838*/
-	{0x00000000, 0x00000000, 0x00000000, 0x00000000}
-}; /*Reg83C*/
+	{0x79a0ea2a, 0x79A0EA2C, 0x79a0ea2a, 0x79a0ea2a}, /*Reg830*/
+	{0x87765541, 0x87746341, 0x87765541, 0x87746341} /*Reg838*/
+};
+u32 cca_efem_ccut[3][4] = {
+	{0x75B86010, 0x75B76010, 0x75B86010, 0x75B76010}, /*Reg82C*/
+	{0x79A0EA28, 0x79A0EA2C, 0x79A0EA28, 0x79a0ea2a}, /*Reg830*/
+	{0x87766451, 0x87766431, 0x87766451, 0x87766431} /*Reg838*/
+};
+u32 cca_ifem_ccut_rfetype[3][4] = {
+	{0x75da8010, 0x75da8010, 0x75da8010, 0x75da8010}, /*Reg82C*/
+	{0x79a0ea2a, 0x97A0EA2C, 0x79a0ea2a, 0x79a0ea2a}, /*Reg830*/
+	{0x87765541, 0x86666341, 0x87765561, 0x86666361} /*Reg838*/
+};
+
+__iram_odm_func__
+void
+phydm_igi_toggle_8822b(
+	struct PHY_DM_STRUCT				*p_dm_odm
+)
+{
+	u32 igi = 0x20;
+
+	igi = odm_get_bb_reg(p_dm_odm, 0xc50, 0x7f);
+	odm_set_bb_reg(p_dm_odm, 0xc50, 0x7f, (igi - 2));
+	odm_set_bb_reg(p_dm_odm, 0xc50, 0x7f, igi);
+	odm_set_bb_reg(p_dm_odm, 0xe50, 0x7f, (igi - 2));
+	odm_set_bb_reg(p_dm_odm, 0xe50, 0x7f, igi);
+}
+
+__iram_odm_func__
+u32
+phydm_check_bit_mask(u32 bit_mask, u32 data_original, u32 data)
+{
+	u8 bit_shift;
+	if (bit_mask != 0xfffff) {
+		for (bit_shift = 0; bit_shift <= 19; bit_shift++) {
+			if (((bit_mask >> bit_shift) & 0x1) == 1)
+				break;
+		}
+		return ((data_original)&(~bit_mask)) | (data << bit_shift);
+	}
+
+	return data;
+}
 
-bool
+__iram_odm_func__
+boolean
 phydm_rfe_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	u8					channel
 )
 {
-	if (p_dm_odm->rfe_type == 4) {
+
+	/* Distinguish the setting band */
+	if (channel <= 14)
+		p_dm_odm->rfe_hwsetting_band = 1;
+	else
+		p_dm_odm->rfe_hwsetting_band = 2;
+
+	/* HW Setting for each RFE type */
+	if ((p_dm_odm->rfe_type == 4) || (p_dm_odm->rfe_type == 11)) {
 
 		/*TRSW  = trsw_forced_BT ? 0x804[0] : (0xCB8[2] ? 0xCB8[0] : trsw_lut);	trsw_lut = TXON*/
 		/*TRSWB = trsw_forced_BT ? (~0x804[0]) : (0xCB8[2] ? 0xCB8[1] : trswb_lut);	trswb_lut = TXON*/
@@ -178,8 +171,9 @@ phydm_rfe_8822b(
 			return false;
 
 
-	} else {
-		if (((p_dm_odm->cut_version == ODM_CUT_A) || (p_dm_odm->cut_version == ODM_CUT_B)) && (p_dm_odm->rfe_type < 2)) {
+	} else if ((p_dm_odm->rfe_type == 1) || (p_dm_odm->rfe_type == 2) || (p_dm_odm->rfe_type == 6) || (p_dm_odm->rfe_type == 7) || (p_dm_odm->rfe_type == 9)) {
+		/* eFem */
+		if ((p_dm_odm->cut_version == ODM_CUT_B) && (p_dm_odm->rfe_type < 2)) {
 			if (channel <= 14) {
 				/* signal source */
 				odm_set_bb_reg(p_dm_odm, 0xcb0, (MASKBYTE2 | MASKLWORD), 0x704570);
@@ -211,16 +205,20 @@ phydm_rfe_8822b(
 		} else {
 			if (channel <= 14) {
 				/* signal source */
-				odm_set_bb_reg(p_dm_odm, 0xcb0, (MASKBYTE2 | MASKLWORD), 0x745774);
-				odm_set_bb_reg(p_dm_odm, 0xeb0, (MASKBYTE2 | MASKLWORD), 0x745774);
+				odm_set_bb_reg(p_dm_odm, 0xcb0, (MASKBYTE2 | MASKLWORD), 0x705770);
+				odm_set_bb_reg(p_dm_odm, 0xeb0, (MASKBYTE2 | MASKLWORD), 0x705770);
 				odm_set_bb_reg(p_dm_odm, 0xcb4, MASKBYTE1, 0x57);
 				odm_set_bb_reg(p_dm_odm, 0xeb4, MASKBYTE1, 0x57);
+				odm_set_bb_reg(p_dm_odm, 0xcb8, BIT(4), 0);
+				odm_set_bb_reg(p_dm_odm, 0xeb8, BIT(4), 0);
 			} else if (channel > 35) {
 				/* signal source */
-				odm_set_bb_reg(p_dm_odm, 0xcb0, (MASKBYTE2 | MASKLWORD), 0x477547);
-				odm_set_bb_reg(p_dm_odm, 0xeb0, (MASKBYTE2 | MASKLWORD), 0x477547);
+				odm_set_bb_reg(p_dm_odm, 0xcb0, (MASKBYTE2 | MASKLWORD), 0x177517);
+				odm_set_bb_reg(p_dm_odm, 0xeb0, (MASKBYTE2 | MASKLWORD), 0x177517);
 				odm_set_bb_reg(p_dm_odm, 0xcb4, MASKBYTE1, 0x75);
 				odm_set_bb_reg(p_dm_odm, 0xeb4, MASKBYTE1, 0x75);
+				odm_set_bb_reg(p_dm_odm, 0xcb8, BIT(5), 0);
+				odm_set_bb_reg(p_dm_odm, 0xeb8, BIT(5), 0);
 			} else
 				return false;
 
@@ -248,6 +246,50 @@ phydm_rfe_8822b(
 				odm_set_bb_reg(p_dm_odm, 0xea0, MASKLWORD, 0xa005);
 			}
 		}
+	} else if ((p_dm_odm->rfe_type == 0) || (p_dm_odm->rfe_type == 3) || (p_dm_odm->rfe_type == 5) || (p_dm_odm->rfe_type == 8) || (p_dm_odm->rfe_type == 10) || (p_dm_odm->rfe_type == 12)) {
+		/* iFEM */
+		if (channel <= 14) {
+			/* signal source */
+			odm_set_bb_reg(p_dm_odm, 0xcb0, (MASKBYTE2 | MASKLWORD), 0x745774);
+			odm_set_bb_reg(p_dm_odm, 0xeb0, (MASKBYTE2 | MASKLWORD), 0x745774);
+			odm_set_bb_reg(p_dm_odm, 0xcb4, MASKBYTE1, 0x57);
+			odm_set_bb_reg(p_dm_odm, 0xeb4, MASKBYTE1, 0x57);
+	
+		} else if (channel > 35) {
+			/* signal source */
+			odm_set_bb_reg(p_dm_odm, 0xcb0, (MASKBYTE2 | MASKLWORD), 0x477547);
+			odm_set_bb_reg(p_dm_odm, 0xeb0, (MASKBYTE2 | MASKLWORD), 0x477547);
+			odm_set_bb_reg(p_dm_odm, 0xcb4, MASKBYTE1, 0x75);
+			odm_set_bb_reg(p_dm_odm, 0xeb4, MASKBYTE1, 0x75);
+			
+		} else
+			return false;
+
+		/* inverse or not */
+		odm_set_bb_reg(p_dm_odm, 0xcbc, (BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1) | BIT(0)), 0x0);
+		odm_set_bb_reg(p_dm_odm, 0xcbc, (BIT(11) | BIT(10)), 0x0);
+		odm_set_bb_reg(p_dm_odm, 0xebc, (BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1) | BIT(0)), 0x0);
+		odm_set_bb_reg(p_dm_odm, 0xebc, (BIT(11) | BIT(10)), 0x0);
+
+		/* antenna switch table */
+		if (channel <= 14) {
+			if ((p_dm_odm->rx_ant_status == (ODM_RF_A | ODM_RF_B)) || (p_dm_odm->tx_ant_status == (ODM_RF_A | ODM_RF_B))) {
+				/* 2TX or 2RX */
+				odm_set_bb_reg(p_dm_odm, 0xca0, MASKLWORD, 0xa501);
+				odm_set_bb_reg(p_dm_odm, 0xea0, MASKLWORD, 0xa501);
+			} else if (p_dm_odm->rx_ant_status == p_dm_odm->tx_ant_status) {
+				/* TXA+RXA or TXB+RXB */
+				odm_set_bb_reg(p_dm_odm, 0xca0, MASKLWORD, 0xa500);
+				odm_set_bb_reg(p_dm_odm, 0xea0, MASKLWORD, 0xa500);
+			} else {
+				/* TXB+RXA or TXA+RXB */
+				odm_set_bb_reg(p_dm_odm, 0xca0, MASKLWORD, 0xa005);
+				odm_set_bb_reg(p_dm_odm, 0xea0, MASKLWORD, 0xa005);
+			}
+		} else if (channel > 35) {
+			odm_set_bb_reg(p_dm_odm, 0xca0, MASKLWORD, 0xa5a5);
+			odm_set_bb_reg(p_dm_odm, 0xea0, MASKLWORD, 0xa5a5);
+		}
 	}
 
 	/* chip top mux */
@@ -268,202 +310,109 @@ phydm_rfe_8822b(
 	return true;
 }
 
+__iram_odm_func__
+u8
+phydm_is_dfs_channel(u8 channel_num)
+{
+	if(channel_num >= 52 && channel_num <= 140)
+		return 1;
+	else
+		return 0;
+}
+
+__iram_odm_func__
 void
 phydm_ccapar_by_rfe_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm
 )
 {
-#if !(DM_ODM_SUPPORT_TYPE == ODM_CE)
-	u32	cca_ifem_bcut[12][4] = {
-		/*20M*/
-		{0x75D97010, 0x75D97010, 0x75D97010, 0x75D97010}, /*Reg82C*/
-		{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg830*/
-		{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg838*/
-		{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg83C*/
-		/*40M*/
-		{0x75D97010, 0x75D97010, 0x75D97010, 0x75D97010}, /*Reg82C*/
-		{0x00000000, 0x79a0ea28, 0x00000000, 0x79a0ea28}, /*Reg830*/
-		{0x87765541, 0x87766341, 0x87765541, 0x87766341}, /*Reg838*/
-		{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg83C*/
-		/*80M*/
-		{0x75D97010, 0x75D97010, 0x75D97010, 0x75D97010}, /*Reg82C*/
-		{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg830*/
-		{0x00000000, 0x87746641, 0x00000000, 0x87746641}, /*Reg838*/
-		{0x00000000, 0x00000000, 0x00000000, 0x00000000}
-	}; /*Reg83C*/
-	u32	cca_efem_bcut[12][4] = {
-		/*20M*/
-		{0x75A76010, 0x75A76010, 0x75A76010, 0x75A75010}, /*Reg82C*/
-		{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg830*/
-		{0x87766651, 0x87766431, 0x87766451, 0x87766431}, /*Reg838*/
-		{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg83C*/
-		/*40M*/
-		{0x75A75010, 0x75A75010, 0x75A75010, 0x75A75010}, /*Reg82C*/
-		{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg830*/
-		{0x87766431, 0x87766431, 0x87766431, 0x87766431}, /*Reg838*/
-		{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg83C*/
-		/*80M*/
-		{0x75BA7010, 0x75BA7010, 0x75BA7010, 0x75BA7010}, /*Reg82C*/
-		{0x00000000, 0x00000000, 0x00000000, 0x00000000}, /*Reg830*/
-		{0x87766431, 0x87766431, 0x87766431, 0x87766431}, /*Reg838*/
-		{0x00000000, 0x00000000, 0x00000000, 0x00000000}
-	}; /*Reg83C*/
-#endif
-
-	u32	cca_ifem[12][4], cca_efem[12][4];
-	u8	row, col;
-	u32	reg82c, reg830, reg838, reg83c;
+	u32	cca_ifem[3][4], cca_efem[3][4];
+	u8	col;
+	u32	reg82c, reg830, reg838;
+	boolean	is_efem_cca = false, is_ifem_cca = false, is_rfe_type = false;
 
-	if (p_dm_odm->cut_version == ODM_CUT_A)
-		return;
 #if !(DM_ODM_SUPPORT_TYPE == ODM_CE)
 	if (p_dm_odm->cut_version == ODM_CUT_B) {
-		odm_move_memory(p_dm_odm, cca_efem, cca_efem_bcut, 48 * 4);
-		odm_move_memory(p_dm_odm, cca_ifem, cca_ifem_bcut, 48 * 4);
+		odm_move_memory(p_dm_odm, cca_efem, cca_efem_bcut, 12 * 4);
+		odm_move_memory(p_dm_odm, cca_ifem, cca_ifem_bcut, 12 * 4);
 		ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("%s: Update CCA parameters for Bcut\n", __func__));
 	} else
 #endif
 	{
-		odm_move_memory(p_dm_odm, cca_efem, cca_efem_ccut, 48 * 4);
-	if (p_dm_odm->rfe_type == 5)
-		odm_move_memory(p_dm_odm, cca_ifem, cca_ifem_ccut_rfetype5, 48 * 4);
-	else if (p_dm_odm->rfe_type == 3)
-		odm_move_memory(p_dm_odm, cca_ifem, cca_ifem_ccut_rfetype3, 48 * 4);
-	else
-		odm_move_memory(p_dm_odm, cca_ifem, cca_ifem_ccut, 48 * 4);
+		odm_move_memory(p_dm_odm, cca_efem, cca_efem_ccut, 12 * 4);
+	if ((p_dm_odm->rfe_type == 3) || (p_dm_odm->rfe_type == 5)) {
+		odm_move_memory(p_dm_odm, cca_ifem, cca_ifem_ccut_rfetype, 12 * 4);
+		is_rfe_type = true;
+	} else
+		odm_move_memory(p_dm_odm, cca_ifem, cca_ifem_ccut, 12 * 4);
 	
 	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("%s: Update CCA parameters for Ccut\n", __func__));
 	}
 
-	if (bw_8822b == ODM_BW20M)
-		row = 0;
-	else if (bw_8822b == ODM_BW40M)
-		row = 4;
-	else
-		row = 8;
-
 	if (central_ch_8822b <= 14) {
 		if ((p_dm_odm->rx_ant_status == ODM_RF_A) || (p_dm_odm->rx_ant_status == ODM_RF_B))
-			col = 0;
+			col = 0;	/*1R 2G*/
 		else
-			col = 1;
+			col = 1;	/*2R 2G*/
 	} else {
 		if ((p_dm_odm->rx_ant_status == ODM_RF_A) || (p_dm_odm->rx_ant_status == ODM_RF_B))
-			col = 2;
+			col = 2;	/*1R 5G*/
 		else
-			col = 3;
+			col = 3;	/*2R 5G*/
 	}
 
-	if ((p_dm_odm->rfe_type == 1) || (p_dm_odm->rfe_type == 4) || (p_dm_odm->rfe_type == 6) || (p_dm_odm->rfe_type == 7)) {
-		/*eFEM => RFE type 1 & RFE type 4 & RFE type 6 & RFE type 7*/
-		reg82c = (cca_efem[row][col] != 0) ? cca_efem[row][col] : reg82c_8822b;
-		reg830 = (cca_efem[row + 1][col] != 0) ? cca_efem[row + 1][col] : reg830_8822b;
-		reg838 = (cca_efem[row + 2][col] != 0) ? cca_efem[row + 2][col] : reg838_8822b;
-		reg83c = (cca_efem[row + 3][col] != 0) ? cca_efem[row + 3][col] : reg83c_8822b;
+	if ((p_dm_odm->rfe_type == 1) || (p_dm_odm->rfe_type == 4) || (p_dm_odm->rfe_type == 6) || (p_dm_odm->rfe_type == 7) || (p_dm_odm->rfe_type == 11)) {
+		/*eFEM => RFE type 1 & RFE type 4 & RFE type 6 & RFE type 7 & RFE type 11*/
+		reg82c = cca_efem[0][col];
+		reg830 = cca_efem[1][col];
+		reg838 = cca_efem[2][col];
+		is_efem_cca = true;
 	} else if ((p_dm_odm->rfe_type == 2) || (p_dm_odm->rfe_type == 9)) {
 		/*5G eFEM, 2G iFEM => RFE type 2, 5G eFEM => RFE type 9 */
 		if (central_ch_8822b <= 14) {
-			reg82c = (cca_ifem[row][col] != 0) ? cca_ifem[row][col] : reg82c_8822b;
-			reg830 = (cca_ifem[row + 1][col] != 0) ? cca_ifem[row + 1][col] : reg830_8822b;
-			reg838 = (cca_ifem[row + 2][col] != 0) ? cca_ifem[row + 2][col] : reg838_8822b;
-			reg83c = (cca_ifem[row + 3][col] != 0) ? cca_ifem[row + 3][col] : reg83c_8822b;
+			reg82c = cca_ifem[0][col];
+			reg830 = cca_ifem[1][col];
+			reg838 = cca_ifem[2][col];
+			is_ifem_cca = true;
 		} else {
-			reg82c = (cca_efem[row][col] != 0) ? cca_efem[row][col] : reg82c_8822b;
-			reg830 = (cca_efem[row + 1][col] != 0) ? cca_efem[row + 1][col] : reg830_8822b;
-			reg838 = (cca_efem[row + 2][col] != 0) ? cca_efem[row + 2][col] : reg838_8822b;
-			reg83c = (cca_efem[row + 3][col] != 0) ? cca_efem[row + 3][col] : reg83c_8822b;
+			reg82c = cca_efem[0][col];
+			reg830 = cca_efem[1][col];
+			reg838 = cca_efem[2][col];
+			is_efem_cca = true;
 		}
 	} else {
-		/*iFEM =>RFEtype 3 & RFE type 5 & RFE type 0 & RFE type 8*/
-		reg82c = (cca_ifem[row][col] != 0) ? cca_ifem[row][col] : reg82c_8822b;
-		reg830 = (cca_ifem[row + 1][col] != 0) ? cca_ifem[row + 1][col] : reg830_8822b;
-		reg838 = (cca_ifem[row + 2][col] != 0) ? cca_ifem[row + 2][col] : reg838_8822b;
-		reg83c = (cca_ifem[row + 3][col] != 0) ? cca_ifem[row + 3][col] : reg83c_8822b;
-	}
-
-	odm_set_bb_reg(p_dm_odm, 0x82c, MASKDWORD, reg82c);
-	odm_set_bb_reg(p_dm_odm, 0x830, MASKDWORD, reg830);
-	odm_set_bb_reg(p_dm_odm, 0x838, MASKDWORD, reg838);
-	odm_set_bb_reg(p_dm_odm, 0x83c, MASKDWORD, reg83c);
-	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("%s: (Pkt%d, Intf%d, RFE%d), row = %d, col = %d\n",
-		__func__, p_dm_odm->package_type, p_dm_odm->support_interface, p_dm_odm->rfe_type, row, col));
-}
-
-void
-phydm_ccapar_by_bw_8822b(
-	struct PHY_DM_STRUCT				*p_dm_odm,
-	enum odm_bw_e				bandwidth
-)
-{
-	u32		reg82c;
-
-
-	if (p_dm_odm->cut_version != ODM_CUT_A)
-		return;
-
-	/* A-cut */
-	reg82c = odm_get_bb_reg(p_dm_odm, 0x82c, MASKDWORD);
-
-	if (bandwidth == ODM_BW20M) {
-		/* 82c[15:12] = 4 */
-		/* 82c[27:24] = 6 */
-
-		reg82c &= (~(0x0f00f000));
-		reg82c |= ((0x4) << 12);
-		reg82c |= ((0x6) << 24);
-	} else if (bandwidth == ODM_BW40M) {
-		/* 82c[19:16] = 9 */
-		/* 82c[27:24] = 6 */
-
-		reg82c &= (~(0x0f0f0000));
-		reg82c |= ((0x9) << 16);
-		reg82c |= ((0x6) << 24);
-	} else if (bandwidth == ODM_BW80M) {
-		/* 82c[15:12] 7 */
-		/* 82c[19:16] b */
-		/* 82c[23:20] d */
-		/* 82c[27:24] 3 */
-
-		reg82c &= (~(0x0ffff000));
-		reg82c |= ((0xdb7) << 12);
-		reg82c |= ((0x3) << 24);
+		/* iFEM =>RFEtype 3 & RFE type 5 & RFE type 0 & RFE type 8 & RFE type 10 & RFE type 12*/
+		reg82c = cca_ifem[0][col];
+		reg830 = cca_ifem[1][col];
+		reg838 = cca_ifem[2][col];
+		is_ifem_cca = true;
 	}
 
 	odm_set_bb_reg(p_dm_odm, 0x82c, MASKDWORD, reg82c);
-	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("phydm_CcaParByBw_8822b(): Update CCA parameters for Acut\n"));
-
-}
 
-void
-phydm_ccapar_by_rxpath_8822b(
-	struct PHY_DM_STRUCT				*p_dm_odm
-)
-{
+	if (is_ifem_cca == true)
+		if (((p_dm_odm->cut_version == ODM_CUT_B) && (col == 1 || col == 3) && (bw_8822b == ODM_BW40M)) ||
+			((is_rfe_type == false) && (col == 3) && (bw_8822b == ODM_BW40M)) ||
+			((p_dm_odm->rfe_type == 5) && (col == 3)))
+			odm_set_bb_reg(p_dm_odm, 0x830, MASKDWORD, 0x79a0ea28);
+		else
+			odm_set_bb_reg(p_dm_odm, 0x830, MASKDWORD, reg830);
+	else
+		odm_set_bb_reg(p_dm_odm, 0x830, MASKDWORD, reg830);
 
-	if (p_dm_odm->cut_version != ODM_CUT_A)
-		return;
+	odm_set_bb_reg(p_dm_odm, 0x838, MASKDWORD, reg838);
 
-	if ((p_dm_odm->rx_ant_status == ODM_RF_A) || (p_dm_odm->rx_ant_status == ODM_RF_B)) {
-		/* 838[7:4] = 8 */
-		/* 838[11:8] = 7 */
-		/* 838[15:12] = 6 */
-		/* 838[19:16] = 7 */
-		/* 838[23:20] = 7 */
-		/* 838[27:24] = 7 */
-		odm_set_bb_reg(p_dm_odm, 0x838, 0x0ffffff0, 0x777678);
-	} else {
-		/* 838[7:4] = 3 */
-		/* 838[11:8] = 3 */
-		/* 838[15:12] = 6 */
-		/* 838[19:16] = 6 */
-		/* 838[23:20] = 7 */
-		/* 838[27:24] = 7 */
-		odm_set_bb_reg(p_dm_odm, 0x838, 0x0ffffff0, 0x776633);
-	}
-	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("phydm_CcaParByRxPath_8822b(): Update CCA parameters for Acut\n"));
+	if ((is_efem_cca == true) && !(p_dm_odm->cut_version == ODM_CUT_B))
+		odm_set_bb_reg(p_dm_odm, 0x83c, MASKDWORD, 0x9194b2b9);
 
+	if (phydm_is_dfs_channel(central_ch_8822b) && (bw_8822b == ODM_BW80M))
+		odm_set_bb_reg(p_dm_odm, 0x838, 0x1, 0);
+	
+	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("%s: (Pkt%d, Intf%d, RFE%d), col = %d\n",
+		__func__, p_dm_odm->package_type, p_dm_odm->support_interface, p_dm_odm->rfe_type, col));
 }
 
+__iram_odm_func__
 void
 phydm_rxdfirpar_by_bw_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
@@ -491,7 +440,8 @@ phydm_rxdfirpar_by_bw_8822b(
 	}
 }
 
-bool
+__iram_odm_func__
+boolean
 phydm_write_txagc_1byte_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	u32					power_index,
@@ -499,6 +449,8 @@ phydm_write_txagc_1byte_8822b(
 	u8					hw_rate
 )
 {
+#if (PHYDM_FW_API_FUNC_ENABLE_8822B == 1)
+
 	u32	offset_txagc[2] = {0x1d00, 0x1d80};
 	u8	rate_idx = (hw_rate & 0xfc), i;
 	u8	rate_offset = (hw_rate & 0x3);
@@ -524,13 +476,18 @@ phydm_write_txagc_1byte_8822b(
 	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("phydm_write_txagc_1byte_8822b(): path-%d rate index 0x%x (0x%x) = 0x%x\n",
 		path, hw_rate, (offset_txagc[path] + hw_rate), power_index));
 	return true;
+#else
+	return false;
+#endif
 }
 
+__iram_odm_func__
 void
 phydm_init_hw_info_by_rfe_type_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm
 )
 {
+#if (PHYDM_FW_API_FUNC_ENABLE_8822B == 1)
 	u16	mask_path_a = 0x0303;
 	u16	mask_path_b = 0x0c0c;
 	/*u16	mask_path_c = 0x3030;*/
@@ -585,9 +542,8 @@ phydm_init_hw_info_by_rfe_type_8822b(
 		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_5G_EXT_LNA, true);
 		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_EXT_PA, false);
 		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_5G_EXT_PA, false);
-	} else if ((p_dm_odm->rfe_type == 3) || (p_dm_odm->rfe_type == 5)) {
+	} else if (p_dm_odm->rfe_type == 3) {
 		/* RFE type 3: 8822BS\8822BU TFBGA iFEM */
-		/* RFE type 5: 8822BE TFBGA iFEM */
 		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_BOARD_TYPE, 0);
 
 		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_PACKAGE_TYPE, 2);
@@ -596,6 +552,26 @@ phydm_init_hw_info_by_rfe_type_8822b(
 		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_5G_EXT_LNA, false);
 		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_EXT_PA, false);
 		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_5G_EXT_PA, false);
+	} else if (p_dm_odm->rfe_type == 5) {
+		/* RFE type 5: 8822BE TFBGA iFEM */
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_BOARD_TYPE, ODM_BOARD_SLIM);
+
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_PACKAGE_TYPE, 2);
+
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_EXT_LNA, false);
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_5G_EXT_LNA, false);
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_EXT_PA, false);
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_5G_EXT_PA, false);
+	} else if (p_dm_odm->rfe_type == 12) {
+		/* RFE type 12: QFN iFEM */
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_BOARD_TYPE, 0);
+
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_PACKAGE_TYPE, 1);
+		
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_EXT_LNA, false);
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_5G_EXT_LNA, false);
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_EXT_PA, false);
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_5G_EXT_PA, false);
 	} else if (p_dm_odm->rfe_type == 4) {
 		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_BOARD_TYPE, (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_LNA_5G | ODM_BOARD_EXT_PA | ODM_BOARD_EXT_PA_5G));
 		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_GPA, (TYPE_GPA0 & (mask_path_a | mask_path_b)));
@@ -609,7 +585,22 @@ phydm_init_hw_info_by_rfe_type_8822b(
 		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_5G_EXT_LNA, true);
 		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_EXT_PA, true);
 		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_5G_EXT_PA, true);
+	} else if (p_dm_odm->rfe_type == 11) {
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_BOARD_TYPE, (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_LNA_5G | ODM_BOARD_EXT_PA | ODM_BOARD_EXT_PA_5G));
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_GPA, (TYPE_GPA1 & (mask_path_a | mask_path_b)));
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_APA, (TYPE_APA1 & (mask_path_a | mask_path_b)));
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_GLNA, (TYPE_GLNA1 & (mask_path_a | mask_path_b)));
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_ALNA, (TYPE_ALNA1 & (mask_path_a | mask_path_b)));
+		
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_PACKAGE_TYPE, 2);
+		
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_EXT_LNA, true);
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_5G_EXT_LNA, true);
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_EXT_PA, true);
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_5G_EXT_PA, true);
+
 	} else if (p_dm_odm->rfe_type == 8) {
+	/* RFE type 8: TFBGA iFEM AP */
 		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_BOARD_TYPE, 0);
 
 		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_PACKAGE_TYPE, 2);
@@ -618,7 +609,18 @@ phydm_init_hw_info_by_rfe_type_8822b(
 		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_5G_EXT_LNA, false);
 		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_EXT_PA, false);
 		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_5G_EXT_PA, false);
+	} else if (p_dm_odm->rfe_type == 10) {
+	/* RFE type 10: QFN iFEM AP PCIE TRSW */
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_BOARD_TYPE, ODM_BOARD_EXT_TRSW);
+
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_PACKAGE_TYPE, 1);
+
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_EXT_LNA, false);
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_5G_EXT_LNA, false);
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_EXT_PA, false);
+		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_5G_EXT_PA, false);
 	} else {
+	/* RFE Type 0: QFN iFEM */
 		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_BOARD_TYPE, 0);
 
 		odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_PACKAGE_TYPE, 1);
@@ -631,11 +633,17 @@ phydm_init_hw_info_by_rfe_type_8822b(
 
 	p_dm_odm->is_init_hw_info_by_rfe = true;
 
-	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("phydm_init_hw_info_by_rfe_type_8822b(): RFE type (%d), Board type (0x%x), Package type (%d)\n", p_dm_odm->rfe_type, p_dm_odm->board_type, p_dm_odm->package_type));
-	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("phydm_init_hw_info_by_rfe_type_8822b(): 5G ePA (%d), 5G eLNA (%d), 2G ePA (%d), 2G eLNA (%d)\n", p_dm_odm->ext_pa_5g, p_dm_odm->ext_lna_5g, p_dm_odm->ext_pa, p_dm_odm->ext_lna));
-	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("phydm_init_hw_info_by_rfe_type_8822b(): 5G PA type (%d), 5G LNA type (%d), 2G PA type (%d), 2G LNA type (%d)\n", p_dm_odm->type_apa, p_dm_odm->type_alna, p_dm_odm->type_gpa, p_dm_odm->type_glna));
+	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE,
+		("%s: RFE type (%d), Board type (0x%x), Package type (%d)\n", __func__, p_dm_odm->rfe_type, p_dm_odm->board_type, p_dm_odm->package_type));
+	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE,
+		("%s: 5G ePA (%d), 5G eLNA (%d), 2G ePA (%d), 2G eLNA (%d)\n", __func__, p_dm_odm->ext_pa_5g, p_dm_odm->ext_lna_5g, p_dm_odm->ext_pa, p_dm_odm->ext_lna));
+	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE,
+		("%s: 5G PA type (%d), 5G LNA type (%d), 2G PA type (%d), 2G LNA type (%d)\n", __func__, p_dm_odm->type_apa, p_dm_odm->type_alna, p_dm_odm->type_gpa, p_dm_odm->type_glna));
+
+#endif	/*PHYDM_FW_API_FUNC_ENABLE_8822B == 1*/
 }
 
+__iram_odm_func__
 s32
 phydm_get_condition_number_8822B(
 	struct PHY_DM_STRUCT				*p_dm_odm
@@ -660,15 +668,15 @@ phydm_get_condition_number_8822B(
 	return ret_val;
 }
 
-
 /* ======================================================================== */
 
 /* ======================================================================== */
 /* These following functions can be used by driver*/
 
+__iram_odm_func__
 u32
 config_phydm_read_rf_reg_8822b(
-	struct PHY_DM_STRUCT				*p_dm_odm,
+	struct PHY_DM_STRUCT		*p_dm_odm,
 	enum odm_rf_radio_path_e		rf_path,
 	u32					reg_addr,
 	u32					bit_mask
@@ -676,7 +684,6 @@ config_phydm_read_rf_reg_8822b(
 {
 	u32	readback_value, direct_addr;
 	u32	offset_read_rf[2] = {0x2800, 0x2c00};
-	u32	power_RF[2] = {0x1c, 0xec};
 
 	/* Error handling.*/
 	if (rf_path > ODM_RF_PATH_B) {
@@ -684,13 +691,6 @@ config_phydm_read_rf_reg_8822b(
 		return INVALID_RF_DATA;
 	}
 
-	/*  Error handling. Check if RF power is enable or not */
-	/*  0xffffffff means RF power is disable */
-	if (odm_get_mac_reg(p_dm_odm, power_RF[rf_path], MASKBYTE3) != 0x7) {
-		ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("config_phydm_read_rf_reg_8822b(): Read fail, RF is disabled\n"));
-		return INVALID_RF_DATA;
-	}
-
 	/* Calculate offset */
 	reg_addr &= 0xff;
 	direct_addr = offset_read_rf[rf_path] + (reg_addr << 2);
@@ -705,7 +705,8 @@ config_phydm_read_rf_reg_8822b(
 	return readback_value;
 }
 
-bool
+__iram_odm_func__
+boolean
 config_phydm_write_rf_reg_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	enum odm_rf_radio_path_e		rf_path,
@@ -716,8 +717,6 @@ config_phydm_write_rf_reg_8822b(
 {
 	u32	data_and_addr = 0, data_original = 0;
 	u32	offset_write_rf[2] = {0xc90, 0xe90};
-	u32	power_RF[2] = {0x1c, 0xec};
-	u8	bit_shift;
 
 	/* Error handling.*/
 	if (rf_path > ODM_RF_PATH_B) {
@@ -739,16 +738,7 @@ config_phydm_write_rf_reg_8822b(
 		}
 
 		/* check bit mask */
-		if (bit_mask != 0xfffff) {
-			for (bit_shift = 0; bit_shift <= 19; bit_shift++) {
-				if (((bit_mask >> bit_shift) & 0x1) == 1)
-					break;
-			}
-			data = ((data_original)&(~bit_mask)) | (data << bit_shift);
-		}
-	} else if (odm_get_mac_reg(p_dm_odm, power_RF[rf_path], MASKBYTE3) != 0x7) {
-		ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("config_phydm_write_rf_reg_8822b(): Write fail, RF is disabled\n"));
-		return false;
+		data = phydm_check_bit_mask(bit_mask, data_original, data);
 	}
 
 	/* Put write addr in [27:20]  and write data in [19:00] */
@@ -761,7 +751,8 @@ config_phydm_write_rf_reg_8822b(
 	return true;
 }
 
-bool
+__iram_odm_func__
+boolean
 config_phydm_write_txagc_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	u32					power_index,
@@ -769,6 +760,8 @@ config_phydm_write_txagc_8822b(
 	u8					hw_rate
 )
 {
+#if (PHYDM_FW_API_FUNC_ENABLE_8822B == 1)
+
 	u32	offset_txagc[2] = {0x1d00, 0x1d80};
 	u8	rate_idx = (hw_rate & 0xfc);
 
@@ -791,8 +784,13 @@ config_phydm_write_txagc_8822b(
 	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("config_phydm_write_txagc_8822b(): path-%d rate index 0x%x (0x%x) = 0x%x\n",
 		path, hw_rate, (offset_txagc[path] + hw_rate), power_index));
 	return true;
+
+#else
+	return false;
+#endif
 }
 
+__iram_odm_func__
 u8
 config_phydm_read_txagc_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
@@ -800,6 +798,7 @@ config_phydm_read_txagc_8822b(
 	u8					hw_rate
 )
 {
+#if (PHYDM_FW_API_FUNC_ENABLE_8822B == 1)
 	u8	read_back_data;
 
 	/* Input need to be HW rate index, not driver rate index!!!! */
@@ -827,16 +826,313 @@ config_phydm_read_txagc_8822b(
 
 	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("config_phydm_read_txagc_8822b(): path-%d rate index 0x%x = 0x%x\n", path, hw_rate, read_back_data));
 	return read_back_data;
+#else
+	return 0;
+#endif
 }
 
-bool
+__iram_odm_func__
+void
+phydm_dynamic_spur_det_elimitor(
+	struct PHY_DM_STRUCT				*p_dm_odm
+)
+{
+#if (PHYDM_FW_API_FUNC_ENABLE_8822B == 1)
+
+	u32		freq_2g[number_of_2g_freq_pt] = {0xFC67, 0xFC27, 0xFFE6, 0xFFA6, 0xFC67, 0xFCE7, 0xFCA7, 0xFC67, 0xFC27, 0xFFE6, 0xFFA6, 0xFF66, 0xFF26, 0xFCE7};
+	u32		freq_5g[number_of_5g_freq_pt] = {0xFFC0, 0xFFC0, 0xFC81, 0xFC81, 0xFC41, 0xFC40, 0xFF80, 0xFF80, 0xFF40, 0xFD42};
+	u32		freq_2g_n1[number_of_2g_freq_pt] = {0}, freq_2g_p1[number_of_2g_freq_pt] = {0};
+	u32		freq_5g_n1[number_of_5g_freq_pt] = {0}, freq_5g_p1[number_of_5g_freq_pt] = {0};
+	u32		freq_pt_2g_final = 0, freq_pt_5g_final = 0, freq_pt_2g_b_final = 0, freq_pt_5g_b_final = 0;
+	u32		max_ret_psd_final = 0, max_ret_psd_b_final = 0;
+	u32		max_ret_psd_2nd[number_of_sample] = {0}, max_ret_psd_b_2nd[number_of_sample] = {0};
+	u32		psd_set[number_of_psd_value] = {0}, psd_set_B[number_of_psd_value] = {0};
+	u32		rank_psd_index_in[number_of_psd_value] = {0}, rank_sample_index_in[number_of_sample] = {0};
+	u32		rank_psd_index_out[number_of_psd_value] = {0};
+	u32		rank_sample_index_out[number_of_sample] = {0};
+	u32		reg_910_15_12 = 0;
+	u8		j = 0, k = 0, threshold_nbi = 0x8D, threshold_csi = 0x8D;
+	u8		idx = 0, set_result_nbi = SET_NO_NEED, set_result_csi = SET_NO_NEED;
+	boolean	s_dopsd = false, s_donbi_a = false, s_docsi = false, s_donbi_b = false;
+
+	if (!(p_dm_odm->support_ability & ODM_BB_DYNAMIC_PSDTOOL)) {
+		ODM_RT_TRACE(p_dm_odm, ODM_BB_DYNAMIC_PSDTOOL, ODM_DBG_LOUD, ("[Return Init]   Not Support Dynamic Spur Detection and Eliminator\n"));
+		return;
+	}
+
+	ODM_RT_TRACE(p_dm_odm, ODM_BB_DYNAMIC_PSDTOOL, ODM_DBG_LOUD, ("Dynamic Spur Detection and Eliminator is ON\n"));
+
+	/* 2G Channel Setting > 20M: 5, 6, 7, 8, 13; 40M: 3~11 */
+	if ((*p_dm_odm->p_channel >= 1) && (*p_dm_odm->p_channel <= 14)) {
+		if (*p_dm_odm->p_band_width == ODM_BW20M) {
+
+			if (*p_dm_odm->p_channel >= 5 && *p_dm_odm->p_channel <= 8)
+				idx = *p_dm_odm->p_channel - 5;
+			else if (*p_dm_odm->p_channel == 13)
+				idx = 4;
+			else
+				idx = 16;
+		} else {
+
+			if (*p_dm_odm->p_channel >= 3 && *p_dm_odm->p_channel <= 11)
+				idx = *p_dm_odm->p_channel + 2;
+			else
+				idx = 16;
+		}
+	} else { /* 5G Channel Setting > 20M: 153, 161; 40M: 54, 118, 151, 159; 80M: 58, 122, 155, 155 */
+		switch (*p_dm_odm->p_channel) {
+		case 153:
+			idx = 0;
+			break;
+		case 161:
+			idx = 1;
+			break;
+		case 54:
+			idx = 2;
+			break;
+		case 118:
+			idx = 3;
+			break;
+		case 151:
+			idx = 4;
+			break;
+		case 159:
+			idx = 5;
+			break;
+		case 58:
+			idx = 6;
+			break;
+		case 122:
+			idx = 7;
+			break;
+		case 155:
+			idx = 8;
+			break;
+		default:
+			idx = 16;
+			break;
+		}
+	}
+
+	if (idx == 16)
+		s_dopsd = false;
+	else
+		s_dopsd = true;
+
+	ODM_RT_TRACE(p_dm_odm, ODM_BB_DYNAMIC_PSDTOOL, ODM_DBG_LOUD, ("[%s] idx = %d, BW = %d, Channel = %d\n", __func__, idx, *p_dm_odm->p_band_width, *p_dm_odm->p_channel));
+
+	for (k = 0; k < number_of_2g_freq_pt; k++) {
+		freq_2g_n1[k] = freq_2g[k] - 1;
+		freq_2g_p1[k] = freq_2g[k] + 1;
+	}
+
+	for (k = 0; k < number_of_5g_freq_pt; k++) {
+		freq_5g_n1[k] = freq_5g[k] - 1;
+		freq_5g_p1[k] = freq_5g[k] + 1;
+	}
+
+	if ((s_dopsd == TRUE) && (idx <= 13)) {
+		for (k = 0; k < number_of_sample; k++) {
+			if (k == 0) {
+				freq_pt_2g_final = freq_2g_n1[idx];
+				freq_pt_5g_final = freq_5g_n1[idx];
+				freq_pt_2g_b_final = freq_2g_n1[idx] | BIT(16);
+				freq_pt_5g_b_final = freq_5g_n1[idx] | BIT(16);
+			} else if (k == 1) {
+				freq_pt_2g_final = freq_2g[idx];
+				freq_pt_5g_final = freq_5g[idx];
+				freq_pt_2g_b_final = freq_2g[idx] | BIT(16);
+				freq_pt_5g_b_final = freq_5g[idx] | BIT(16);
+			} else if (k == 2) {
+				freq_pt_2g_final = freq_2g_p1[idx];
+				freq_pt_5g_final = freq_5g_p1[idx];
+				freq_pt_2g_b_final = freq_2g_p1[idx] | BIT(16);
+				freq_pt_5g_b_final = freq_5g_p1[idx] | BIT(16);
+			}
+
+			for (j = 0; j < number_of_psd_value; j++) {
+				odm_set_bb_reg(p_dm_odm, 0xc00, MASKBYTE0, 0x4);/* disable 3-wire, path-A */
+				odm_set_bb_reg(p_dm_odm, 0xe00, MASKBYTE0, 0x4);/* disable 3-wire, path-B */
+				reg_910_15_12 = odm_get_bb_reg(p_dm_odm, 0x910, (BIT15 | BIT14 | BIT13 | BIT12));
+
+				if (p_dm_odm->rx_ant_status & ODM_RF_A) {
+					odm_set_bb_reg(p_dm_odm, 0x808, MASKBYTE0, (((ODM_RF_A)<<4) | ODM_RF_A));/*path-A*/
+
+					if ((*p_dm_odm->p_channel >= 1) && (*p_dm_odm->p_channel <= 14))
+						odm_set_bb_reg(p_dm_odm, 0x910, MASKDWORD, BIT(22) | freq_pt_2g_final);/* Start PSD */
+					else
+						odm_set_bb_reg(p_dm_odm, 0x910, MASKDWORD, BIT(22) | freq_pt_5g_final);/* Start PSD */
+
+					ODM_delay_us(500);
+
+					psd_set[j] = odm_get_bb_reg(p_dm_odm, 0xf44, MASKLWORD);
+
+					odm_set_bb_reg(p_dm_odm, 0x910, BIT22, 0x0);/* turn off PSD */
+				}
+
+				if (p_dm_odm->rx_ant_status & ODM_RF_B) {
+					odm_set_bb_reg(p_dm_odm, 0x808, MASKBYTE0, (((ODM_RF_B)<<4) | ODM_RF_B));/*path-B*/
+
+					if ((*p_dm_odm->p_channel > 0) && (*p_dm_odm->p_channel <= 14))
+						odm_set_bb_reg(p_dm_odm, 0x910, MASKDWORD, BIT(22) | freq_pt_2g_b_final);/* Start PSD */
+					else
+						odm_set_bb_reg(p_dm_odm, 0x910, MASKDWORD, BIT(22) | freq_pt_5g_b_final);/* Start PSD */
+
+					ODM_delay_us(500);
+
+					psd_set_B[j] = odm_get_bb_reg(p_dm_odm, 0xf44, MASKLWORD);
+
+					odm_set_bb_reg(p_dm_odm, 0x910, BIT22, 0x0);/* turn off PSD */
+				}
+
+				odm_set_bb_reg(p_dm_odm, 0xc00, MASKBYTE0, 0x7);/*eanble 3-wire*/
+				odm_set_bb_reg(p_dm_odm, 0xe00, MASKBYTE0, 0x7);
+				odm_set_bb_reg(p_dm_odm, 0x910, (BIT15 | BIT14 | BIT13 | BIT12), reg_910_15_12);
+
+				odm_set_bb_reg(p_dm_odm, 0x808, MASKBYTE0, (((p_dm_odm->rx_ant_status)<<4) | p_dm_odm->rx_ant_status));
+
+				/* Toggle IGI to let RF enter RX mode, because BB doesn't send 3-wire command when RX path is enable */
+				phydm_igi_toggle_8822b(p_dm_odm);
+
+			}
+			if (p_dm_odm->rx_ant_status & ODM_RF_A) {
+				phydm_seq_sorting(p_dm_odm, psd_set, rank_psd_index_in, rank_psd_index_out, number_of_psd_value);
+				max_ret_psd_2nd[k] = psd_set[0];
+			}
+			if (p_dm_odm->rx_ant_status & ODM_RF_B) {
+				phydm_seq_sorting(p_dm_odm, psd_set_B, rank_psd_index_in, rank_psd_index_out, number_of_psd_value);
+				max_ret_psd_b_2nd[k] = psd_set_B[0];
+			}
+		}
+
+		if (p_dm_odm->rx_ant_status & ODM_RF_A) {
+			phydm_seq_sorting(p_dm_odm, max_ret_psd_2nd, rank_sample_index_in, rank_sample_index_out, number_of_sample);
+			max_ret_psd_final = max_ret_psd_2nd[0];
+
+			if (max_ret_psd_final >= threshold_nbi)
+				s_donbi_a = true;
+			else
+				s_donbi_a = false;
+		}
+		if (p_dm_odm->rx_ant_status & ODM_RF_B) {
+			phydm_seq_sorting(p_dm_odm, max_ret_psd_b_2nd, rank_sample_index_in, rank_sample_index_out, number_of_sample);
+			max_ret_psd_b_final = max_ret_psd_b_2nd[0];
+
+			if (max_ret_psd_b_final >= threshold_nbi)
+				s_donbi_b = true;
+			else
+				s_donbi_b = false;
+		}
+
+		ODM_RT_TRACE(p_dm_odm, ODM_BB_DYNAMIC_PSDTOOL, ODM_DBG_LOUD, ("[%s] max_ret_psd_final = %d, max_ret_psd_b_final = %d\n", __func__, max_ret_psd_final, max_ret_psd_b_final));
+
+		if ((max_ret_psd_final >= threshold_csi) || (max_ret_psd_b_final >= threshold_csi))
+			s_docsi = true;
+		else
+			s_docsi = false;
+
+	}
+
+	/* Reset NBI/CSI everytime after changing channel/BW/band  */
+	odm_set_bb_reg(p_dm_odm, 0x880, MASKDWORD, 0);
+	odm_set_bb_reg(p_dm_odm, 0x884, MASKDWORD, 0);
+	odm_set_bb_reg(p_dm_odm, 0x888, MASKDWORD, 0);
+	odm_set_bb_reg(p_dm_odm, 0x88c, MASKDWORD, 0);
+	odm_set_bb_reg(p_dm_odm, 0x890, MASKDWORD, 0);
+	odm_set_bb_reg(p_dm_odm, 0x894, MASKDWORD, 0);
+	odm_set_bb_reg(p_dm_odm, 0x898, MASKDWORD, 0);
+	odm_set_bb_reg(p_dm_odm, 0x89c, MASKDWORD, 0);
+	odm_set_bb_reg(p_dm_odm, 0x874, BIT(0), 0x0);
+
+	odm_set_bb_reg(p_dm_odm, 0x87c, BIT(13), 0x0);
+	odm_set_bb_reg(p_dm_odm, 0xc20, BIT(28), 0x0);
+	odm_set_bb_reg(p_dm_odm, 0xe20, BIT(28), 0x0);
+
+	if (s_donbi_a == true || s_donbi_b == true) {
+		if (*p_dm_odm->p_band_width == ODM_BW20M) {
+			if (*p_dm_odm->p_channel == 153)
+				set_result_nbi = phydm_nbi_setting(p_dm_odm, NBI_ENABLE, *p_dm_odm->p_channel, 20, 5760, PHYDM_DONT_CARE);
+			else if (*p_dm_odm->p_channel == 161)
+				set_result_nbi = phydm_nbi_setting(p_dm_odm, NBI_ENABLE, *p_dm_odm->p_channel, 20, 5800, PHYDM_DONT_CARE);
+			else if (*p_dm_odm->p_channel >= 5 && *p_dm_odm->p_channel <= 8)
+				set_result_nbi = phydm_nbi_setting(p_dm_odm, NBI_ENABLE, *p_dm_odm->p_channel, 20, 2440, PHYDM_DONT_CARE);
+			else if (*p_dm_odm->p_channel == 13)
+				set_result_nbi = phydm_nbi_setting(p_dm_odm, NBI_ENABLE, *p_dm_odm->p_channel, 20, 2480, PHYDM_DONT_CARE);
+			else
+				set_result_nbi = SET_NO_NEED;
+		} else if (*p_dm_odm->p_band_width == ODM_BW40M) {
+			if (*p_dm_odm->p_channel == 54) {
+				set_result_nbi = phydm_nbi_setting(p_dm_odm, NBI_ENABLE, *p_dm_odm->p_channel, 40, 5280, PHYDM_DONT_CARE);
+			} else if (*p_dm_odm->p_channel == 118) {
+				set_result_nbi = phydm_nbi_setting(p_dm_odm, NBI_ENABLE, *p_dm_odm->p_channel, 40, 5600, PHYDM_DONT_CARE);
+			} else if (*p_dm_odm->p_channel == 151) {
+				set_result_nbi = phydm_nbi_setting(p_dm_odm, NBI_ENABLE, *p_dm_odm->p_channel, 40, 5760, PHYDM_DONT_CARE);
+			} else if (*p_dm_odm->p_channel == 159) {
+				set_result_nbi = phydm_nbi_setting(p_dm_odm, NBI_ENABLE, *p_dm_odm->p_channel, 40, 5800, PHYDM_DONT_CARE);
+				/* 2.4G */
+			} else if ((*p_dm_odm->p_channel >= 4) && (*p_dm_odm->p_channel <= 6)) {
+				set_result_nbi = phydm_nbi_setting(p_dm_odm, NBI_ENABLE, *p_dm_odm->p_channel, 40, 2440, PHYDM_DONT_CARE);
+			} else if (*p_dm_odm->p_channel == 11) {
+				set_result_nbi = phydm_nbi_setting(p_dm_odm, NBI_ENABLE, *p_dm_odm->p_channel, 40, 2480, PHYDM_DONT_CARE);
+			} else
+				set_result_nbi = SET_NO_NEED;
+		} else
+			set_result_nbi = SET_NO_NEED;
+	}
+
+	if (s_docsi == true) {
+		if (*p_dm_odm->p_band_width == ODM_BW20M) {
+			if (*p_dm_odm->p_channel == 153)
+				set_result_csi = phydm_csi_mask_setting(p_dm_odm, CSI_MASK_ENABLE, *p_dm_odm->p_channel, 20, 5760, PHYDM_DONT_CARE);
+			else if (*p_dm_odm->p_channel == 161)
+				set_result_csi = phydm_csi_mask_setting(p_dm_odm, CSI_MASK_ENABLE, *p_dm_odm->p_channel, 20, 5800, PHYDM_DONT_CARE);
+			else if (*p_dm_odm->p_channel >= 5 && *p_dm_odm->p_channel <= 8)
+				set_result_csi = phydm_csi_mask_setting(p_dm_odm, CSI_MASK_ENABLE, *p_dm_odm->p_channel, 20, 2440, PHYDM_DONT_CARE);
+			else if (*p_dm_odm->p_channel == 13)
+				set_result_csi = phydm_csi_mask_setting(p_dm_odm, CSI_MASK_ENABLE, *p_dm_odm->p_channel, 20, 2480, PHYDM_DONT_CARE);
+			else
+				set_result_csi = SET_NO_NEED;
+		} else if (*p_dm_odm->p_band_width == ODM_BW40M) {
+			if (*p_dm_odm->p_channel == 54)
+				set_result_csi = phydm_csi_mask_setting(p_dm_odm, CSI_MASK_ENABLE, *p_dm_odm->p_channel, 40, 5280, PHYDM_DONT_CARE);
+			else if (*p_dm_odm->p_channel == 118)
+				set_result_csi = phydm_csi_mask_setting(p_dm_odm, CSI_MASK_ENABLE, *p_dm_odm->p_channel, 40, 5600, PHYDM_DONT_CARE);
+			else if (*p_dm_odm->p_channel == 151)
+				set_result_csi = phydm_csi_mask_setting(p_dm_odm, CSI_MASK_ENABLE, *p_dm_odm->p_channel, 40, 5760, PHYDM_DONT_CARE);
+			else if (*p_dm_odm->p_channel == 159)
+				set_result_csi = phydm_csi_mask_setting(p_dm_odm, CSI_MASK_ENABLE, *p_dm_odm->p_channel, 40, 5800, PHYDM_DONT_CARE);
+			else if ((*p_dm_odm->p_channel >= 3) && (*p_dm_odm->p_channel <= 10))
+				set_result_csi = phydm_csi_mask_setting(p_dm_odm, CSI_MASK_ENABLE, *p_dm_odm->p_channel, 40, 2440, PHYDM_DONT_CARE);
+			else if (*p_dm_odm->p_channel == 11)
+				set_result_csi = phydm_csi_mask_setting(p_dm_odm, CSI_MASK_ENABLE, *p_dm_odm->p_channel, 40, 2480, PHYDM_DONT_CARE);
+			else
+				set_result_csi = SET_NO_NEED;
+		} else if (*p_dm_odm->p_band_width == ODM_BW80M) {
+			if (*p_dm_odm->p_channel == 58)
+				set_result_csi = phydm_csi_mask_setting(p_dm_odm, CSI_MASK_ENABLE, *p_dm_odm->p_channel, 80, 5280, PHYDM_DONT_CARE);
+			else if (*p_dm_odm->p_channel == 122)
+				set_result_csi = phydm_csi_mask_setting(p_dm_odm, CSI_MASK_ENABLE, *p_dm_odm->p_channel, 80, 5600, PHYDM_DONT_CARE);
+			else if (*p_dm_odm->p_channel == 155)
+				set_result_csi = phydm_csi_mask_setting(p_dm_odm, CSI_MASK_ENABLE, *p_dm_odm->p_channel, 80, 5760, PHYDM_DONT_CARE);
+			else
+				set_result_csi = SET_NO_NEED;
+		} else
+			set_result_csi = SET_NO_NEED;
+	}
+
+#endif	/*PHYDM_SPUR_CANCELL_ENABLE_8822B == 1*/
+}
+
+__iram_odm_func__
+boolean
 config_phydm_switch_band_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	u8					central_ch
 )
 {
 	u32		rf_reg18;
-	bool		rf_reg_status = true;
+	boolean		rf_reg_status = true;
+	u32		reg_8;
 
 	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("config_phydm_switch_band_8822b()======================>\n"));
 
@@ -865,6 +1161,29 @@ config_phydm_switch_band_8822b(
 
 		/* RF band */
 		rf_reg18 = (rf_reg18 & (~(BIT(16) | BIT(9) | BIT(8))));
+
+		/* RxHP dynamic control */
+		/* QFN eFEM RxHP are always low at 2G */
+		reg_8 = odm_get_bb_reg(p_dm_odm, 0x19a8, BIT(31));
+		
+		if (!((p_dm_odm->rfe_type == 1) || (p_dm_odm->rfe_type == 6) || (p_dm_odm->rfe_type == 7) || (p_dm_odm->rfe_type == 9))) {
+			/* SoML on */
+			if ((reg_8 == 0x1) && (!((p_dm_odm->rfe_type == 3) || (p_dm_odm->rfe_type == 5)))) {
+				odm_set_bb_reg(p_dm_odm, 0x8cc, MASKDWORD, 0x08100000);
+				odm_set_bb_reg(p_dm_odm, 0x8d8, BIT(27), 0x0);
+				odm_set_bb_reg(p_dm_odm, 0xc04, (BIT(18)|BIT(21)), 0x0);
+				odm_set_bb_reg(p_dm_odm, 0xe04, (BIT(18)|BIT(21)), 0x0);
+			/* SoML off */
+			} else {
+				odm_set_bb_reg(p_dm_odm, 0x8cc, MASKDWORD, 0x08108492);
+				odm_set_bb_reg(p_dm_odm, 0x8d8, BIT(27), 0x1);
+				odm_set_bb_reg(p_dm_odm, 0xc04, BIT(18), 0x1);
+				odm_set_bb_reg(p_dm_odm, 0xe04, BIT(18), 0x1);
+				odm_set_bb_reg(p_dm_odm, 0xc04, BIT(21), 0x1);
+				odm_set_bb_reg(p_dm_odm, 0xe04, BIT(21), 0x1);
+			}
+		}
+		
 	} else if (central_ch > 35) {
 		/* 5G */
 
@@ -878,12 +1197,32 @@ config_phydm_switch_band_8822b(
 		odm_set_bb_reg(p_dm_odm, 0x808, BIT(28), 0x0);
 
 		/*CCA Mask*/
-		odm_set_bb_reg(p_dm_odm, 0x814, 0x0000FC00, 15); /*default value*/
-		//odm_set_bb_reg(p_dm_odm, 0x814, 0x0000FC00, 34); /*CCA mask = 13.6us*/
+		if (!p_dm_odm->wifi_test)
+			odm_set_bb_reg(p_dm_odm, 0x814, 0x0000FC00, 34); /*CCA mask = 13.6us*/
+		else
+			odm_set_bb_reg(p_dm_odm, 0x814, 0x0000FC00, 15); /*default value*/
 
 		/* RF band */
 		rf_reg18 = (rf_reg18 & (~(BIT(16) | BIT(9) | BIT(8))));
 		rf_reg18 = (rf_reg18 | BIT(8) | BIT(16));
+
+		/* RxHP dynamic control */
+		reg_8 = odm_get_bb_reg(p_dm_odm, 0x19a8, BIT(31));
+
+		if ((reg_8 == 0x1) && (!((p_dm_odm->rfe_type == 1) || (p_dm_odm->rfe_type == 6) || (p_dm_odm->rfe_type == 7) || (p_dm_odm->rfe_type == 9)))) {
+			odm_set_bb_reg(p_dm_odm, 0x8cc, MASKDWORD, 0x08100000);
+			odm_set_bb_reg(p_dm_odm, 0x8d8, BIT(27), 0x0);
+			odm_set_bb_reg(p_dm_odm, 0xc04, (BIT(18)|BIT(21)), 0x0);
+			odm_set_bb_reg(p_dm_odm, 0xe04, (BIT(18)|BIT(21)), 0x0);
+		} else {
+			odm_set_bb_reg(p_dm_odm, 0x8cc, MASKDWORD, 0x08108492);
+			odm_set_bb_reg(p_dm_odm, 0x8d8, BIT(27), 0x1);
+			odm_set_bb_reg(p_dm_odm, 0xc04, BIT(18), 0x1);
+			odm_set_bb_reg(p_dm_odm, 0xe04, BIT(18), 0x1);
+			odm_set_bb_reg(p_dm_odm, 0xc04, BIT(21), 0x1);
+			odm_set_bb_reg(p_dm_odm, 0xe04, BIT(21), 0x1);
+		}
+
 	} else {
 		ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("config_phydm_switch_band_8822b(): Fail to switch band (ch: %d)\n", central_ch));
 		return false;
@@ -902,22 +1241,28 @@ config_phydm_switch_band_8822b(
 		return false;
 	}
 
+	/* Dynamic spur detection by PSD and NBI/CSI mask */
+	if (*(p_dm_odm->p_mp_mode))
+		phydm_dynamic_spur_det_elimitor(p_dm_odm);
+
 	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("config_phydm_switch_band_8822b(): Success to switch band (ch: %d)\n", central_ch));
 	return true;
 }
 
-bool
+__iram_odm_func__
+boolean
 config_phydm_switch_channel_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	u8					central_ch
 )
 {
 	struct _dynamic_initial_gain_threshold_		*p_dm_dig_table = &p_dm_odm->dm_dig_table;
-	u32		rf_reg18 = 0, rf_reg_b8 = 0, rf_reg_be = 0xff;
-	bool		rf_reg_status = true;
+	u32		rf_reg18 = 0, rf_reg_be = 0xff;
+	boolean		rf_reg_status = true;
 	u8		low_band[15] = {0x7, 0x6, 0x6, 0x5, 0x0, 0x0, 0x7, 0xff, 0x6, 0x5, 0x0, 0x0, 0x7, 0x6, 0x6};
 	u8		middle_band[23] = {0x6, 0x5, 0x0, 0x0, 0x7, 0x6, 0x6, 0xff, 0x0, 0x0, 0x7, 0x6, 0x6, 0x5, 0x0, 0xff, 0x7, 0x6, 0x6, 0x5, 0x0, 0x0, 0x7};
 	u8		high_band[15] = {0x5, 0x5, 0x0, 0x7, 0x7, 0x6, 0x5, 0xff, 0x0, 0x7, 0x7, 0x6, 0x5, 0x5, 0x0};
+	u8		band_index = 0;
 
 	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("config_phydm_switch_channel_8822b()====================>\n"));
 
@@ -927,15 +1272,21 @@ config_phydm_switch_channel_8822b(
 	}
 
 	central_ch_8822b = central_ch;
+
+	/* Errir handling for wrong HW setting due to wrong channel setting */
+	if (central_ch_8822b <= 14)
+		band_index = 1;
+	else
+		band_index = 2;
+
+	if (p_dm_odm->rfe_hwsetting_band != band_index)
+		phydm_rfe_8822b(p_dm_odm, central_ch_8822b);
+
+	/* RF register setting */
 	rf_reg18 = config_phydm_read_rf_reg_8822b(p_dm_odm, ODM_RF_PATH_A, 0x18, RFREGOFFSETMASK);
 	rf_reg_status = rf_reg_status & config_phydm_read_rf_check_8822b(rf_reg18);
 	rf_reg18 = (rf_reg18 & (~(BIT(18) | BIT(17) | MASKBYTE0)));
 
-	if (p_dm_odm->cut_version == ODM_CUT_A) {
-		rf_reg_b8 = config_phydm_read_rf_reg_8822b(p_dm_odm, ODM_RF_PATH_A, 0xb8, RFREGOFFSETMASK);
-		rf_reg_status = rf_reg_status & config_phydm_read_rf_check_8822b(rf_reg_b8);
-	}
-
 	/* Switch band and channel */
 	if (central_ch <= 14) {
 		/* 2.4G */
@@ -950,19 +1301,14 @@ config_phydm_switch_channel_8822b(
 		/* 3. Set central frequency for clock offset tracking */
 		odm_set_bb_reg(p_dm_odm, 0x860, 0x1ffe0000, 0x96a);
 
-		/* Fix A-cut LCK fail issue @ 5285MHz~5375MHz, 0xb8[19]=0x0 */
-		if (p_dm_odm->cut_version == ODM_CUT_A)
-			rf_reg_b8 = rf_reg_b8 | BIT(19);
-
 		/* CCK TX filter parameters */
+
 		if (central_ch == 14) {
-			odm_set_bb_reg(p_dm_odm, 0xa20, MASKHWORD, 0x8488);
 			odm_set_bb_reg(p_dm_odm, 0xa24, MASKDWORD, 0x00006577);
 			odm_set_bb_reg(p_dm_odm, 0xa28, MASKLWORD, 0x0000);
 		} else {
-			odm_set_bb_reg(p_dm_odm, 0xa20, MASKHWORD, (rega20_8822b >> 16));
-			odm_set_bb_reg(p_dm_odm, 0xa24, MASKDWORD, rega24_8822b);
-			odm_set_bb_reg(p_dm_odm, 0xa28, MASKLWORD, (rega28_8822b & MASKLWORD));
+			odm_set_bb_reg(p_dm_odm, 0xa24, MASKDWORD, 0x384f6577);
+			odm_set_bb_reg(p_dm_odm, 0xa28, MASKLWORD, 0x1525);
 		}
 
 	} else if (central_ch > 35) {
@@ -1000,20 +1346,13 @@ config_phydm_switch_channel_8822b(
 			return false;
 		}
 
-		/* Fix A-cut LCK fail issue @ 5285MHz~5375MHz, 0xb8[19]=0x0 */
-		if (p_dm_odm->cut_version == ODM_CUT_A) {
-			if ((central_ch >= 57) && (central_ch <= 75))
-				rf_reg_b8 = rf_reg_b8 & (~BIT(19));
-			else
-				rf_reg_b8 = rf_reg_b8 | BIT(19);
-		}
 	} else {
 		ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("config_phydm_switch_channel_8822b(): Fail to switch channel (ch: %d)\n", central_ch));
 		return false;
 	}
 
 	/* Modify IGI for MP driver to aviod PCIE interference */
-	if ((p_dm_odm->mp_mode == true) && ((p_dm_odm->rfe_type == 3) || (p_dm_odm->rfe_type == 5))) {
+	if ((*(p_dm_odm->p_mp_mode) == true) && ((p_dm_odm->rfe_type == 3) || (p_dm_odm->rfe_type == 5))) {
 		if (central_ch == 14)
 			odm_write_dig(p_dm_odm, 0x26);
 		else
@@ -1056,27 +1395,30 @@ config_phydm_switch_channel_8822b(
 
 	rf_reg_status = rf_reg_status & config_phydm_write_rf_reg_8822b(p_dm_odm, ODM_RF_PATH_A, 0x18, RFREGOFFSETMASK, rf_reg18);
 
-	if (p_dm_odm->cut_version == ODM_CUT_A)
-		rf_reg_status = rf_reg_status & config_phydm_write_rf_reg_8822b(p_dm_odm, ODM_RF_PATH_A, 0xb8, RFREGOFFSETMASK, rf_reg_b8);
-
-	if (p_dm_odm->rf_type > ODM_1T1R) {
+	if (p_dm_odm->rf_type > ODM_1T1R)
 		rf_reg_status = rf_reg_status & config_phydm_write_rf_reg_8822b(p_dm_odm, ODM_RF_PATH_B, 0x18, RFREGOFFSETMASK, rf_reg18);
 
-		if (p_dm_odm->cut_version == ODM_CUT_A)
-			rf_reg_status = rf_reg_status & config_phydm_write_rf_reg_8822b(p_dm_odm, ODM_RF_PATH_B, 0xb8, RFREGOFFSETMASK, rf_reg_b8);
-	}
-
 	if (rf_reg_status == false) {
 		ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("config_phydm_switch_channel_8822b(): Fail to switch channel (ch: %d), because writing RF register is fail\n", central_ch));
 		return false;
 	}
 
+	/* Debug for RF resister reading error during synthesizer parameters parsing */
+	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0xb8, BIT(19), 0);
+	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0xb8, BIT(19), 1);
+
+	phydm_igi_toggle_8822b(p_dm_odm);
+	/* Dynamic spur detection by PSD and NBI/CSI mask */
+	if (*(p_dm_odm->p_mp_mode))
+		phydm_dynamic_spur_det_elimitor(p_dm_odm);
+
 	phydm_ccapar_by_rfe_8822b(p_dm_odm);
 	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("config_phydm_switch_channel_8822b(): Success to switch channel (ch: %d)\n", central_ch));
 	return true;
 }
 
-bool
+__iram_odm_func__
+boolean
 config_phydm_switch_bandwidth_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	u8					primary_ch_idx,
@@ -1084,8 +1426,7 @@ config_phydm_switch_bandwidth_8822b(
 )
 {
 	u32		rf_reg18;
-	bool		rf_reg_status = true;
-	u8		IGI = 0;
+	boolean		rf_reg_status = true;
 
 	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("config_phydm_switch_bandwidth_8822b()===================>\n"));
 
@@ -1239,26 +1580,26 @@ config_phydm_switch_bandwidth_8822b(
 	/* Modify RX DFIR parameters */
 	phydm_rxdfirpar_by_bw_8822b(p_dm_odm, bandwidth);
 
+	/* Toggle IGI to let RF enter RX mode */
+	phydm_igi_toggle_8822b(p_dm_odm);
+
+	/* Dynamic spur detection by PSD and NBI/CSI mask */
+	if (*(p_dm_odm->p_mp_mode))
+		phydm_dynamic_spur_det_elimitor(p_dm_odm);
+
 	/* Modify CCA parameters */
-	phydm_ccapar_by_bw_8822b(p_dm_odm, bandwidth);
 	phydm_ccapar_by_rfe_8822b(p_dm_odm);
 
 	/* Toggle RX path to avoid RX dead zone issue */
 	odm_set_bb_reg(p_dm_odm, 0x808, MASKBYTE0, 0x0);
 	odm_set_bb_reg(p_dm_odm, 0x808, MASKBYTE0, (p_dm_odm->rx_ant_status | (p_dm_odm->rx_ant_status << 4)));
 
-	/* Toggle IGI to let RF enter RX mode */
-	IGI = (u8)odm_get_bb_reg(p_dm_odm, ODM_REG(IGI_A, p_dm_odm), ODM_BIT(IGI, p_dm_odm));
-	odm_set_bb_reg(p_dm_odm, ODM_REG(IGI_A, p_dm_odm), ODM_BIT(IGI, p_dm_odm), IGI - 2);
-	odm_set_bb_reg(p_dm_odm, ODM_REG(IGI_B, p_dm_odm), ODM_BIT(IGI, p_dm_odm), IGI - 2);
-	odm_set_bb_reg(p_dm_odm, ODM_REG(IGI_A, p_dm_odm), ODM_BIT(IGI, p_dm_odm), IGI);
-	odm_set_bb_reg(p_dm_odm, ODM_REG(IGI_B, p_dm_odm), ODM_BIT(IGI, p_dm_odm), IGI);
-
 	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("config_phydm_switch_bandwidth_8822b(): Success to switch bandwidth (bw: %d, primary ch: %d)\n", bandwidth, primary_ch_idx));
 	return true;
 }
 
-bool
+__iram_odm_func__
+boolean
 config_phydm_switch_channel_bw_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	u8					central_ch,
@@ -1282,16 +1623,16 @@ config_phydm_switch_channel_bw_8822b(
 	return true;
 }
 
-bool
+__iram_odm_func__
+boolean
 config_phydm_trx_mode_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	enum odm_rf_path_e			tx_path,
 	enum odm_rf_path_e			rx_path,
-	bool					is_tx2_path
+	boolean					is_tx2_path
 )
 {
-	bool		rf_reg_status = true;
-	u8		IGI;
+	boolean		rf_reg_status = true;
 	u32		rf_reg33 = 0;
 	u16		counter = 0;
 	/* struct PHY_DM_STRUCT*		p_dm_odm = (struct PHY_DM_STRUCT*)p_dm_void; */
@@ -1354,7 +1695,7 @@ config_phydm_trx_mode_8822b(
 
 	/* Tx2path for 1ss */
 	if (!((tx_path == ODM_RF_A) || (tx_path == ODM_RF_B))) {
-		if (is_tx2_path || p_dm_odm->mp_mode) {
+		if (is_tx2_path || *(p_dm_odm->p_mp_mode)) {
 			/* 2Tx for OFDM */
 			odm_set_bb_reg(p_dm_odm, 0x93c, 0xfff00000, 0x043);
 
@@ -1434,7 +1775,7 @@ config_phydm_trx_mode_8822b(
 		}
 	}
 
-	if ((p_dm_odm->mp_mode) || (*p_dm_odm->p_antenna_test) || (p_dm_odm->normal_rx_path)) {
+	if (*(p_dm_odm->p_mp_mode) || (*p_dm_odm->p_antenna_test) || (p_dm_odm->normal_rx_path)) {
 		/*	0xef 0x80000  0x33 0x00001  0x3e 0x00034  0x3f 0x4080e  0xef 0x00000    suggested by Lucas*/
 		rf_reg_status = rf_reg_status & config_phydm_write_rf_reg_8822b(p_dm_odm, ODM_RF_PATH_A, 0xef, RFREGOFFSETMASK, 0x80000);
 		rf_reg_status = rf_reg_status & config_phydm_write_rf_reg_8822b(p_dm_odm, ODM_RF_PATH_A, 0x33, RFREGOFFSETMASK, 0x00001);
@@ -1459,41 +1800,47 @@ config_phydm_trx_mode_8822b(
 		return false;
 	}
 
-	/* Toggle IGI to let RF enter RX mode, because BB doesn't send 3-wire command when RX path is enable */
-	IGI = (u8)odm_get_bb_reg(p_dm_odm, ODM_REG(IGI_A, p_dm_odm), ODM_BIT(IGI, p_dm_odm));
-	odm_write_dig(p_dm_odm, IGI - 2);
-	odm_write_dig(p_dm_odm, IGI);
+	/* Toggle igi to let RF enter RX mode, because BB doesn't send 3-wire command when RX path is enable */
+	phydm_igi_toggle_8822b(p_dm_odm);
 
 	/* Modify CCA parameters */
-	phydm_ccapar_by_rxpath_8822b(p_dm_odm);
 	phydm_ccapar_by_rfe_8822b(p_dm_odm);
 	phydm_rfe_8822b(p_dm_odm, central_ch_8822b);
 
+	/* Dynamic spur detection by PSD and NBI/CSI mask */
+	if (*(p_dm_odm->p_mp_mode))
+		phydm_dynamic_spur_det_elimitor(p_dm_odm);
+
 	ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("config_phydm_trx_mode_8822b(): Success to set TRx mode setting (TX: 0x%x, RX: 0x%x)\n", tx_path, rx_path));
 	return true;
 }
 
-bool
-config_phydm_parameter_init(
+__iram_odm_func__
+boolean
+config_phydm_parameter_init_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	enum odm_parameter_init_e	type
 )
 {
 	if (type == ODM_PRE_SETTING) {
 		odm_set_bb_reg(p_dm_odm, 0x808, (BIT(28) | BIT(29)), 0x0);
-		ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("config_phydm_parameter_init(): Pre setting: disable OFDM and CCK block\n"));
+		ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("%s: Pre setting: disable OFDM and CCK block\n", __func__));
 	} else if (type == ODM_POST_SETTING) {
 		odm_set_bb_reg(p_dm_odm, 0x808, (BIT(28) | BIT(29)), 0x3);
-		ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("config_phydm_parameter_init(): Post setting: enable OFDM and CCK block\n"));
-		reg82c_8822b = odm_get_bb_reg(p_dm_odm, 0x82c, MASKDWORD);
-		reg838_8822b = odm_get_bb_reg(p_dm_odm, 0x838, MASKDWORD);
-		reg830_8822b = odm_get_bb_reg(p_dm_odm, 0x830, MASKDWORD);
-		reg83c_8822b = odm_get_bb_reg(p_dm_odm, 0x83c, MASKDWORD);
-		rega20_8822b = odm_get_bb_reg(p_dm_odm, 0xa20, MASKDWORD);
-		rega24_8822b = odm_get_bb_reg(p_dm_odm, 0xa24, MASKDWORD);
-		rega28_8822b = odm_get_bb_reg(p_dm_odm, 0xa28, MASKDWORD);
+		ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("%s: Post setting: enable OFDM and CCK block\n", __func__));
+#if (PHYDM_FW_API_FUNC_ENABLE_8822B == 1)
+	} else if (type == ODM_INIT_FW_SETTING) {
+		u8	h2c_content[4] = {0};
+		
+		h2c_content[0] = p_dm_odm->rfe_type;
+		h2c_content[1] = p_dm_odm->rf_type;
+		h2c_content[2] = p_dm_odm->cut_version;
+		h2c_content[3] = (p_dm_odm->tx_ant_status << 4) | p_dm_odm->rx_ant_status;
+		
+		odm_fill_h2c_cmd(p_dm_odm, PHYDM_H2C_FW_GENERAL_INIT, 4, h2c_content);
+#endif
 	} else {
-		ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("config_phydm_parameter_init(): Wrong type!!\n"));
+		ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_TRACE, ("%s: Wrong type!!\n", __func__));
 		return false;
 	}
 
@@ -1501,4 +1848,5 @@ config_phydm_parameter_init(
 }
 
 /* ======================================================================== */
+#endif	/*PHYDM_FW_API_ENABLE_8822B == 1*/
 #endif	/* RTL8822B_SUPPORT == 1 */
diff --git a/rtl8822BU/hal/phydm/rtl8822b/phydm_hal_api8822b.h b/rtl8822BU/hal/phydm/rtl8822b/phydm_hal_api8822b.h
index 696a160..1f74a1c 100755..100644
--- a/rtl8822BU/hal/phydm/rtl8822b/phydm_hal_api8822b.h
+++ b/rtl8822BU/hal/phydm/rtl8822b/phydm_hal_api8822b.h
@@ -22,11 +22,16 @@
 
 #if (RTL8822B_SUPPORT == 1)
 
-#define	PHY_CONFIG_VERSION_8822B			"27.5.31"	/*2016.08.01     (HW user guide version: R27, SW user guide version: R05, Modification: R31)*/
+#define	PHY_CONFIG_VERSION_8822B			"28.5.34"	/*2017.01.18     (HW user guide version: R28, SW user guide version: R05, Modification: R34), remove A cut setting, refine CCK txfilter and OFDM CCA setting by YuChen*/
 
 #define	INVALID_RF_DATA					0xffffffff
 #define	INVALID_TXAGC_DATA				0xff
 
+#define number_of_psd_value				5
+#define number_of_sample                3
+#define number_of_2g_freq_pt			14
+#define number_of_5g_freq_pt			10
+
 #define	config_phydm_read_rf_check_8822b(data)			(data != INVALID_RF_DATA)
 #define	config_phydm_read_txagc_check_8822b(data)		(data != INVALID_TXAGC_DATA)
 
@@ -38,7 +43,7 @@ config_phydm_read_rf_reg_8822b(
 	u32					bit_mask
 );
 
-bool
+boolean
 config_phydm_write_rf_reg_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	enum odm_rf_radio_path_e		rf_path,
@@ -47,7 +52,7 @@ config_phydm_write_rf_reg_8822b(
 	u32					data
 );
 
-bool
+boolean
 config_phydm_write_txagc_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	u32					power_index,
@@ -62,26 +67,31 @@ config_phydm_read_txagc_8822b(
 	u8					hw_rate
 );
 
-bool
+void
+phydm_dynamic_spur_det_elimitor(
+	struct PHY_DM_STRUCT				*p_dm_odm
+);
+
+boolean
 config_phydm_switch_band_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	u8					central_ch
 );
 
-bool
+boolean
 config_phydm_switch_channel_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	u8					central_ch
 );
 
-bool
+boolean
 config_phydm_switch_bandwidth_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	u8					primary_ch_idx,
 	enum odm_bw_e				bandwidth
 );
 
-bool
+boolean
 config_phydm_switch_channel_bw_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	u8					central_ch,
@@ -89,16 +99,16 @@ config_phydm_switch_channel_bw_8822b(
 	enum odm_bw_e				bandwidth
 );
 
-bool
+boolean
 config_phydm_trx_mode_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	enum odm_rf_path_e			tx_path,
 	enum odm_rf_path_e			rx_path,
-	bool					is_tx2_path
+	boolean					is_tx2_path
 );
 
-bool
-config_phydm_parameter_init(
+boolean
+config_phydm_parameter_init_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	enum odm_parameter_init_e	type
 );
@@ -107,7 +117,7 @@ config_phydm_parameter_init(
 /* ======================================================================== */
 /* These following functions can be used for PHY DM only*/
 
-bool
+boolean
 phydm_write_txagc_1byte_8822b(
 	struct PHY_DM_STRUCT				*p_dm_odm,
 	u32					power_index,
diff --git a/rtl8822BU/hal/phydm/rtl8822b/phydm_regconfig8822b.c b/rtl8822BU/hal/phydm/rtl8822b/phydm_regconfig8822b.c
index 0e65b43..7a06ebf 100755..100644
--- a/rtl8822BU/hal/phydm/rtl8822b/phydm_regconfig8822b.c
+++ b/rtl8822BU/hal/phydm/rtl8822b/phydm_regconfig8822b.c
@@ -32,17 +32,58 @@ odm_config_rf_reg_8822b(
 	u32					reg_addr
 )
 {
-	if ((addr == 0xfe) || (addr == 0xffe)) {
+	if (p_dm_odm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
+		if (addr == 0xffe)
+			phydm_set_reg_by_fw(p_dm_odm,
+							PHYDM_HALMAC_CMD_DELAY_MS,
+							reg_addr,
+							data,
+							RFREGOFFSETMASK,
+							RF_PATH,
+							50);
+		else if (addr == 0xfe)
+			phydm_set_reg_by_fw(p_dm_odm,
+							PHYDM_HALMAC_CMD_DELAY_US,
+							reg_addr,
+							data,
+							RFREGOFFSETMASK,
+							RF_PATH,
+							100);
+		else {	
+			phydm_set_reg_by_fw(p_dm_odm,
+								PHYDM_HALMAC_CMD_RF_W,
+								reg_addr,
+								data,
+								RFREGOFFSETMASK,
+								RF_PATH,
+								0);
+			phydm_set_reg_by_fw(p_dm_odm,
+								PHYDM_HALMAC_CMD_DELAY_US,
+								reg_addr,
+								data,
+								RFREGOFFSETMASK,
+								RF_PATH,
+								1);
+		}
+	} else {
+		if (addr == 0xffe) {
 #ifdef CONFIG_LONG_DELAY_ISSUE
-		ODM_sleep_ms(50);
+			ODM_sleep_ms(50);
 #else
-		ODM_delay_ms(50);
+			ODM_delay_ms(50);
 #endif
-	} else {
-		odm_set_rf_reg(p_dm_odm, RF_PATH, reg_addr, RFREGOFFSETMASK, data);
+		} else if (addr == 0xfe) {
+#ifdef CONFIG_LONG_DELAY_ISSUE
+			ODM_sleep_us(100);
+#else
+			ODM_delay_us(100);
+#endif
+		} else {
+			odm_set_rf_reg(p_dm_odm, RF_PATH, reg_addr, RFREGOFFSETMASK, data);
 
-		/* Add 1us delay between BB/RF register setting. */
-		ODM_delay_us(1);
+			/* Add 1us delay between BB/RF register setting. */
+			ODM_delay_us(1);
+		}
 	}
 }
 
@@ -83,8 +124,17 @@ odm_config_mac_8822b(
 	u8					data
 )
 {
-	odm_write_1byte(p_dm_odm, addr, data);
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> odm_config_mac_with_header_file: [MAC_REG] %08X %08X\n", addr, data));
+	if (p_dm_odm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD)
+		phydm_set_reg_by_fw(p_dm_odm,
+							PHYDM_HALMAC_CMD_MAC_W8,
+							addr,
+							data,
+							0,
+							0,
+							0);
+	else
+		odm_write_1byte(p_dm_odm, addr, data);
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> config_mac: [MAC_REG] %08X %08X\n", addr, data));
 }
 
 void
@@ -98,7 +148,7 @@ odm_update_agc_big_jump_lmt_8822b(
 	u8	rf_gain_idx = (u8)((data & 0xFF000000) >> 24);
 	u8	bb_gain_idx = (u8)((data & 0x00ff0000) >> 16);
 	u8	agc_table_idx = (u8)((data & 0x00000f00) >> 8);
-	static	bool	is_limit;
+	static	boolean	is_limit;
 
 	if (addr != 0x81c)
 		return;
@@ -129,10 +179,16 @@ odm_config_bb_agc_8822b(
 {
 	odm_update_agc_big_jump_lmt_8822b(p_dm_odm, addr, data);
 
-	odm_set_bb_reg(p_dm_odm, addr, bitmask, data);
-
-	/* Add 1us delay between BB/RF register setting. */
-	ODM_delay_us(1);
+	if (p_dm_odm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD)
+		phydm_set_reg_by_fw(p_dm_odm,
+							PHYDM_HALMAC_CMD_BB_W32,
+							addr,
+							data,
+							bitmask,
+							0,
+							0);
+	else
+		odm_set_bb_reg(p_dm_odm, addr, bitmask, data);
 
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> odm_config_bb_with_header_file: [AGC_TAB] %08X %08X\n", addr, data));
 }
@@ -155,8 +211,10 @@ odm_config_bb_phy_reg_pg_8822b(
 		ODM_delay_ms(50);
 #endif
 	} else {
-#if (!(DM_ODM_SUPPORT_TYPE&ODM_AP))
+#if (DM_ODM_SUPPORT_TYPE & ODM_CE)
 		phy_store_tx_power_by_rate(p_dm_odm->adapter, band, rf_path, tx_num, addr, bitmask, data);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+		PHY_StoreTxPowerByRate(p_dm_odm->adapter, band, rf_path, tx_num, addr, bitmask, data);
 #endif
 
 	}
@@ -171,28 +229,63 @@ odm_config_bb_phy_8822b(
 	u32					data
 )
 {
-	if (addr == 0xfe)
+	if (p_dm_odm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
+		u32 delay_time = 0;
+
+		if (addr >= 0xf9 && addr <= 0xfe) {
+			if (addr == 0xfe || addr == 0xfb)
+				delay_time = 50;
+			else if (addr == 0xfd || addr == 0xfa)
+				delay_time = 5;
+			else
+				delay_time = 1;
+
+			if (addr >= 0xfc && addr <=0xfe)
+				phydm_set_reg_by_fw(p_dm_odm,
+									PHYDM_HALMAC_CMD_DELAY_MS,
+									addr,
+									data,
+									bitmask,
+									0,
+									delay_time);
+			else
+				phydm_set_reg_by_fw(p_dm_odm,
+									PHYDM_HALMAC_CMD_DELAY_US,
+									addr,
+									data,
+									bitmask,
+									0,
+									delay_time);
+		} else 
+			phydm_set_reg_by_fw(p_dm_odm,
+								PHYDM_HALMAC_CMD_BB_W32,
+								addr,
+								data,
+								bitmask,
+								0,
+								0);
+	} else {
+		if (addr == 0xfe)
 #ifdef CONFIG_LONG_DELAY_ISSUE
-		ODM_sleep_ms(50);
+			ODM_sleep_ms(50);
 #else
-		ODM_delay_ms(50);
+			ODM_delay_ms(50);
 #endif
-	else if (addr == 0xfd)
-		ODM_delay_ms(5);
-	else if (addr == 0xfc)
-		ODM_delay_ms(1);
-	else if (addr == 0xfb)
-		ODM_delay_us(50);
-	else if (addr == 0xfa)
-		ODM_delay_us(5);
-	else if (addr == 0xf9)
-		ODM_delay_us(1);
-	else
-		odm_set_bb_reg(p_dm_odm, addr, bitmask, data);
-
-	/* Add 1us delay between BB/RF register setting. */
-	ODM_delay_us(1);
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> odm_config_bb_with_header_file: [PHY_REG] %08X %08X\n", addr, data));
+		else if (addr == 0xfd)
+			ODM_delay_ms(5);
+		else if (addr == 0xfc)
+			ODM_delay_ms(1);
+		else if (addr == 0xfb)
+			ODM_delay_us(50);
+		else if (addr == 0xfa)
+			ODM_delay_us(5);
+		else if (addr == 0xf9)
+			ODM_delay_us(1);
+		else
+			odm_set_bb_reg(p_dm_odm, addr, bitmask, data);
+	}
+	
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> config_bb: [PHY_REG] %08X %08X\n", addr, data));
 }
 
 void
@@ -207,9 +300,12 @@ odm_config_bb_txpwr_lmt_8822b(
 	u8					*power_limit
 )
 {
-#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
+#if (DM_ODM_SUPPORT_TYPE & ODM_CE)
 	phy_set_tx_power_limit(p_dm_odm, regulation, band,
 		       bandwidth, rate_section, rf_path, channel, power_limit);
+#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
+	PHY_SetTxPowerLimit(p_dm_odm, regulation, band,
+		       bandwidth, rate_section, rf_path, channel, power_limit);
 #endif
 }
 
diff --git a/rtl8822BU/hal/phydm/rtl8822b/phydm_regconfig8822b.h b/rtl8822BU/hal/phydm/rtl8822b/phydm_regconfig8822b.h
index 0b9ef68..0b9ef68 100755..100644
--- a/rtl8822BU/hal/phydm/rtl8822b/phydm_regconfig8822b.h
+++ b/rtl8822BU/hal/phydm/rtl8822b/phydm_regconfig8822b.h
diff --git a/rtl8822BU/hal/phydm/rtl8822b/phydm_rtl8822b.c b/rtl8822BU/hal/phydm/rtl8822b/phydm_rtl8822b.c
index 24dab21..85c3c25 100755..100644
--- a/rtl8822BU/hal/phydm/rtl8822b/phydm_rtl8822b.c
+++ b/rtl8822BU/hal/phydm/rtl8822b/phydm_rtl8822b.c
@@ -35,22 +35,388 @@ phydm_dynamic_switch_htstf_mumimo_8822b(
 	struct PHY_DM_STRUCT		*p_dm_odm
 )
 {
-	/*if rssi > 40dBm, enable HT-STF gain controller, otherwise, if rssi < 40dBm, disable the controller*/
-	/*add by Chun-Hung Ho 20160711 */
-	if (p_dm_odm->rssi_min >= 40)
+	s32		sig_power;
+	u32		value32;
+	u8		pwdb;
+
+	value32 = odm_get_bb_reg(p_dm_odm, 0xF90, MASKDWORD);
+	pwdb = (u8)((value32 & MASKBYTE1) >> 8);
+	pwdb = pwdb >> 1;
+	sig_power = -110 + pwdb;
+
+	/*if Pin > -60dBm, enable HT-STF gain controller, otherwise, if rssi < -65dBm, disable the controller*/
+
+	if (sig_power >= -60)
 		odm_set_bb_reg(p_dm_odm, 0x8d8, BIT(17), 0x1);
-	else if (p_dm_odm->rssi_min < 35)
+	else if (sig_power < -65)
 		odm_set_bb_reg(p_dm_odm, 0x8d8, BIT(17), 0x0);
 
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("%s, rssi_min = %d\n", __func__, p_dm_odm->rssi_min));
 }
 
 void
+phydm_dynamic_parameters_ota(
+	struct PHY_DM_STRUCT		*p_dm_odm
+)
+{
+	s32    	sig_power;
+	u32		value32, bktreg, bktreg1, bktreg2, bktreg3;
+	u8    	pwdb;
+	
+	value32 = odm_get_bb_reg(p_dm_odm, 0xF90, MASKDWORD);
+	pwdb = (u8)((value32 & MASKBYTE1) >> 8);
+	pwdb = pwdb >> 1;
+	sig_power = -110 + pwdb;
+
+	bktreg = odm_get_bb_reg(p_dm_odm, 0x98c, MASKDWORD);
+	bktreg1 = odm_get_bb_reg(p_dm_odm, 0x818, MASKDWORD);
+	bktreg2 = odm_get_bb_reg(p_dm_odm, 0x98c, MASKDWORD);
+	bktreg3 = odm_get_bb_reg(p_dm_odm, 0x818, MASKDWORD);
+
+	if ((*p_dm_odm->p_channel <= 14) && (*p_dm_odm->p_band_width == ODM_BW20M)) {
+		if (sig_power >= -60) {
+			odm_set_bb_reg(p_dm_odm, 0x8d8, BIT(17), 0x1);
+			odm_set_bb_reg(p_dm_odm, 0x98c, 0x7fc0000, 0x0);
+			odm_set_bb_reg(p_dm_odm, 0x818, 0x7000000, 0x1);
+			odm_set_bb_reg(p_dm_odm, 0xc04, BIT(18), 0x1);
+			odm_set_bb_reg(p_dm_odm, 0xe04, BIT(18), 0x1);
+			if (p_dm_odm->p_advance_ota & BIT(1)) {
+				odm_set_bb_reg(p_dm_odm, 0x19d8, MASKDWORD, 0x444);
+				odm_set_bb_reg(p_dm_odm, 0x19d4, MASKDWORD, 0x4444aaaa);
+			} else if (p_dm_odm->p_advance_ota & BIT(2)) {
+				odm_set_bb_reg(p_dm_odm, 0x19d8, MASKDWORD, 0x444);
+				odm_set_bb_reg(p_dm_odm, 0x19d4, MASKDWORD, 0x444444aa);
+			}
+		} else if (sig_power < -65) {
+			odm_set_bb_reg(p_dm_odm, 0x8d8, BIT(17), 0x0);
+			odm_set_bb_reg(p_dm_odm, 0x98c, MASKDWORD, 0x43440000);
+			odm_set_bb_reg(p_dm_odm, 0x818, 0x7000000, 0x4);
+			odm_set_bb_reg(p_dm_odm, 0xc04, (BIT(18)|BIT(21)), 0x0);
+			odm_set_bb_reg(p_dm_odm, 0xe04, (BIT(18)|BIT(21)), 0x0);
+			odm_set_bb_reg(p_dm_odm, 0x19d8, MASKDWORD, 0xaaa);
+			odm_set_bb_reg(p_dm_odm, 0x19d4, MASKDWORD, 0xaaaaaaaa);
+		}
+	} else {
+			//odm_set_bb_reg(p_dm_odm, 0x8d8, BIT(17), 0x0);
+			odm_set_bb_reg(p_dm_odm, 0x98c, MASKDWORD, 0x43440000);
+			odm_set_bb_reg(p_dm_odm, 0x818, 0x7000000, 0x4);
+			odm_set_bb_reg(p_dm_odm, 0xc04, (BIT(18)|BIT(21)), 0x0);
+			odm_set_bb_reg(p_dm_odm, 0xe04, (BIT(18)|BIT(21)), 0x0);
+			odm_set_bb_reg(p_dm_odm, 0x19d8, MASKDWORD, 0xaaa);
+			odm_set_bb_reg(p_dm_odm, 0x19d4, MASKDWORD, 0xaaaaaaaa);
+		}
+}
+
+
+static
+void
+_setTxACaliValue(
+	struct PHY_DM_STRUCT		*p_dm_odm,
+	u8						eRFPath,
+	u8 						offset,
+	u8 						TxABiaOffset
+	)
+{
+	u32 modiTxAValue = 0;
+	u8 tmp1Byte = 0;
+	boolean bMinus = false;
+	u8 compValue = 0;
+
+	
+		switch (offset) {
+		case 0x0:
+			odm_set_rf_reg(p_dm_odm, eRFPath, 0x18, 0xFFFFF, 0X10124);
+			break;
+		case 0x1:
+			odm_set_rf_reg(p_dm_odm, eRFPath, 0x18, 0xFFFFF, 0X10524);
+			break;
+		case 0x2:
+			odm_set_rf_reg(p_dm_odm, eRFPath, 0x18, 0xFFFFF, 0X10924);
+			break;
+		case 0x3:
+			odm_set_rf_reg(p_dm_odm, eRFPath, 0x18, 0xFFFFF, 0X10D24);
+			break;
+		case 0x4:
+			odm_set_rf_reg(p_dm_odm, eRFPath, 0x18, 0xFFFFF, 0X30164);
+			break;
+		case 0x5:
+			odm_set_rf_reg(p_dm_odm, eRFPath, 0x18, 0xFFFFF, 0X30564);
+			break;
+		case 0x6:
+			odm_set_rf_reg(p_dm_odm, eRFPath, 0x18, 0xFFFFF, 0X30964);
+			break;
+		case 0x7:
+			odm_set_rf_reg(p_dm_odm, eRFPath, 0x18, 0xFFFFF, 0X30D64);
+			break;
+		case 0x8:
+			odm_set_rf_reg(p_dm_odm, eRFPath, 0x18, 0xFFFFF, 0X50195);
+			break;
+		case 0x9:
+			odm_set_rf_reg(p_dm_odm, eRFPath, 0x18, 0xFFFFF, 0X50595);
+			break;
+		case 0xa:
+			odm_set_rf_reg(p_dm_odm, eRFPath, 0x18, 0xFFFFF, 0X50995);
+			break;
+		case 0xb:
+			odm_set_rf_reg(p_dm_odm, eRFPath, 0x18, 0xFFFFF, 0X50D95);
+			break;
+		default:
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Invalid TxA band offset...\n"));
+			return;
+			break;
+	}
+
+	/* Get TxA value */
+	modiTxAValue = odm_get_rf_reg(p_dm_odm, eRFPath, 0x61, 0xFFFFF);
+	tmp1Byte = (u8)modiTxAValue&(BIT(3)|BIT(2)|BIT(1)|BIT(0));
+
+	/* check how much need to calibration */
+		switch (TxABiaOffset) {
+		case 0xF6:
+			bMinus = true;
+			compValue = 3;
+			break;
+			
+		case 0xF4:
+			bMinus = true;
+			compValue = 2;
+			break;
+			
+		case 0xF2:
+			bMinus = true;
+			compValue = 1;
+			break;
+			
+		case 0xF3:
+			bMinus = false;
+			compValue = 1;
+			break;
+			
+		case 0xF5:
+			bMinus = false;
+			compValue = 2;
+			break;
+			
+		case 0xF7:
+			bMinus = false;
+			compValue = 3;
+			break;
+			
+		case 0xF9:
+			bMinus = false;
+			compValue = 4;
+			break;
+		
+		/* do nothing case */
+		case 0xF0:
+		default:
+			ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("No need to do TxA bias current calibration\n"));
+			return;
+			break;
+	}
+
+	/* calc correct value to calibrate */
+	if (bMinus) {
+		if (tmp1Byte >= compValue) {
+			tmp1Byte -= compValue;
+			//modiTxAValue += tmp1Byte;
+		} else {
+			tmp1Byte = 0;
+		}
+	} else {
+		tmp1Byte += compValue;
+		if (tmp1Byte >= 7) {
+			tmp1Byte = 7;
+		}
+	}
+
+	/* Write back to RF reg */
+	odm_set_rf_reg(p_dm_odm, eRFPath, 0x30, 0xFFFF, (offset<<12|(modiTxAValue&0xFF0)|tmp1Byte));
+}
+
+static
+void
+_txaBiasCali4eachPath(
+	struct PHY_DM_STRUCT		*p_dm_odm,
+	u8	 eRFPath,
+	u8	 efuseValue
+	)
+{
+	/* switch on set TxA bias */
+	odm_set_rf_reg(p_dm_odm, eRFPath, 0xEF, 0xFFFFF, 0x200);
+
+	/* Set 12 sets of TxA value */
+	_setTxACaliValue(p_dm_odm, eRFPath, 0x0, efuseValue);
+	_setTxACaliValue(p_dm_odm, eRFPath, 0x1, efuseValue);
+	_setTxACaliValue(p_dm_odm, eRFPath, 0x2, efuseValue);
+	_setTxACaliValue(p_dm_odm, eRFPath, 0x3, efuseValue);
+	_setTxACaliValue(p_dm_odm, eRFPath, 0x4, efuseValue);
+	_setTxACaliValue(p_dm_odm, eRFPath, 0x5, efuseValue);
+	_setTxACaliValue(p_dm_odm, eRFPath, 0x6, efuseValue);
+	_setTxACaliValue(p_dm_odm, eRFPath, 0x7, efuseValue);
+	_setTxACaliValue(p_dm_odm, eRFPath, 0x8, efuseValue);
+	_setTxACaliValue(p_dm_odm, eRFPath, 0x9, efuseValue);
+	_setTxACaliValue(p_dm_odm, eRFPath, 0xa, efuseValue);
+	_setTxACaliValue(p_dm_odm, eRFPath, 0xb, efuseValue);
+
+	// switch off set TxA bias
+	odm_set_rf_reg(p_dm_odm, eRFPath, 0xEF, 0xFFFFF, 0x0);
+}
+
+/* for 8822B PCIE D-cut patch only */
+/* Normal driver and MP driver need this patch */
+
+void
+phydm_txcurrentcalibration(
+	struct PHY_DM_STRUCT		*p_dm_odm
+	)
+{
+	u8			efuse0x3D8, efuse0x3D7;
+	u32			origRF0x18PathA = 0, origRF0x18PathB = 0;
+
+	if (!(p_dm_odm->support_ic_type & ODM_RTL8822B))
+		return;
+
+	ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("8822b 5g tx current calibration 0x3d7=0x%X 0x3d8=0x%X\n", p_dm_odm->efuse0x3d7, p_dm_odm->efuse0x3d8));
+
+	/* save original 0x18 value */
+	origRF0x18PathA = odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x18, 0xFFFFF);
+	origRF0x18PathB = odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x18, 0xFFFFF);
+	
+	/* define efuse content */
+		efuse0x3D8 = p_dm_odm->efuse0x3d8;
+		efuse0x3D7 = p_dm_odm->efuse0x3d7;
+	
+	/* check efuse content to judge whether need to calibration or not */
+	if (0xFF == efuse0x3D7) {
+		ODM_RT_TRACE(p_dm_odm, ODM_COMP_MP, ODM_DBG_LOUD, ("efuse content 0x3D7 == 0xFF, No need to do TxA cali\n"));
+		return;
+	}
+
+	/* write RF register for calibration */
+	_txaBiasCali4eachPath(p_dm_odm, ODM_RF_PATH_A, efuse0x3D7);
+	_txaBiasCali4eachPath(p_dm_odm, ODM_RF_PATH_B, efuse0x3D8);
+	
+	/* restore original 0x18 value */
+	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x18, 0xFFFFF, origRF0x18PathA);
+	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x18, 0xFFFFF, origRF0x18PathB);
+}
+
+void
+phydm_dynamic_select_cck_path_8822b(
+	struct 	PHY_DM_STRUCT		*p_dm
+)
+{
+	struct _FALSE_ALARM_STATISTICS	*p_fa_cnt = (struct _FALSE_ALARM_STATISTICS *)phydm_get_structure(p_dm, PHYDM_FALSEALMCNT);
+	struct phydm_rtl8822b_struct	*p_8822b = &p_dm->phydm_rtl8822b;
+
+	if (p_dm->ap_total_num > 10) {
+		if (p_8822b->path_judge & BIT(2))
+			odm_set_bb_reg(p_dm, 0xa04, 0x0f000000, 0x0);	/*fix CCK Path A if AP nums > 10*/
+		return;
+	}
+
+	if (p_8822b->path_judge & BIT(2))
+		return;
+
+	ODM_RT_TRACE(p_dm, ODM_PHY_CONFIG, ODM_DBG_LOUD,
+		("phydm 8822b cck rx path selection start\n"));
+
+	if (p_8822b->path_judge & ODM_RF_A) {
+		p_8822b->path_a_cck_fa = (u16)p_fa_cnt->cnt_cck_fail;
+		p_8822b->path_judge &= ~ODM_RF_A;
+		odm_set_bb_reg(p_dm, 0xa04, 0x0f000000, 0x5);	/*change to path B collect CCKFA*/
+	} else if (p_8822b->path_judge & ODM_RF_B) {
+		p_8822b->path_b_cck_fa = (u16)p_fa_cnt->cnt_cck_fail;
+		p_8822b->path_judge &= ~ODM_RF_B;
+
+		if (p_8822b->path_a_cck_fa <= p_8822b->path_b_cck_fa)
+			odm_set_bb_reg(p_dm, 0xa04, 0x0f000000, 0x0);	/*FA A<=B choose A*/
+		else
+			odm_set_bb_reg(p_dm, 0xa04, 0x0f000000, 0x5);	/*FA B>A choose B*/
+
+		p_8822b->path_judge |= BIT(2);	/*it means we have already choosed cck rx path*/
+	}
+
+	ODM_RT_TRACE(p_dm, ODM_PHY_CONFIG, ODM_DBG_LOUD,
+		("path_a_fa = %d, path_b_fa = %d\n", p_8822b->path_a_cck_fa, p_8822b->path_b_cck_fa));
+	
+}
+
+void
+phydm_somlrxhp_setting(
+	struct 	PHY_DM_STRUCT		*p_dm_odm,
+	boolean switch_soml
+)
+{
+	if (switch_soml == true)
+		odm_set_bb_reg(p_dm_odm, 0x19a8, MASKDWORD, 0xd10a0000);
+	else
+		odm_set_bb_reg(p_dm_odm, 0x19a8, MASKDWORD, 0x010a0000);
+
+		/* Dynamic RxHP setting with SoML on/off apply on all RFE type, except of QFN eFEM (1,6,7,9) */
+		/* SoML on -> 2.4G: high-to-low; 5G: always low */
+		/* SoML off-> 2.4G, 5G: high-to-low */
+	if (!((p_dm_odm->rfe_type == 1) || (p_dm_odm->rfe_type == 6) || (p_dm_odm->rfe_type == 7) || (p_dm_odm->rfe_type == 9))) {
+		if (*p_dm_odm->p_channel <= 14) {
+			/* TFBGA iFEM SoML on/off with RxHP always high-to-low */
+			if (!((p_dm_odm->rfe_type == 3) || (p_dm_odm->rfe_type == 5))) {
+				if (switch_soml == true) {
+				odm_set_bb_reg(p_dm_odm, 0x8cc, MASKDWORD, 0x08100000);
+				odm_set_bb_reg(p_dm_odm, 0x8d8, BIT(27), 0x0);
+				odm_set_bb_reg(p_dm_odm, 0xc04, (BIT(18)|BIT(21)), 0x0);
+				odm_set_bb_reg(p_dm_odm, 0xe04, (BIT(18)|BIT(21)), 0x0);
+				} else {
+				odm_set_bb_reg(p_dm_odm, 0x8cc, MASKDWORD, 0x08108492);
+				odm_set_bb_reg(p_dm_odm, 0x8d8, BIT(27), 0x1);
+				}
+			}
+		} else if (*p_dm_odm->p_channel > 35) {
+			if ((switch_soml == true) && (!((p_dm_odm->rfe_type == 1) || (p_dm_odm->rfe_type == 6) || (p_dm_odm->rfe_type == 7) || (p_dm_odm->rfe_type == 9)))) {
+				odm_set_bb_reg(p_dm_odm, 0x8cc, MASKDWORD, 0x08100000);
+				odm_set_bb_reg(p_dm_odm, 0x8d8, BIT(27), 0x0);
+				odm_set_bb_reg(p_dm_odm, 0xc04, (BIT(18)|BIT(21)), 0x0);
+				odm_set_bb_reg(p_dm_odm, 0xe04, (BIT(18)|BIT(21)), 0x0);
+			} else {
+				odm_set_bb_reg(p_dm_odm, 0x8cc, MASKDWORD, 0x08108492);
+				odm_set_bb_reg(p_dm_odm, 0x8d8, BIT(27), 0x1);
+			}	
+		}
+		/* ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Dynamic RxHP control with SoML is enable !!\n")); */
+	} 
+}
+
+
+void
 phydm_hwsetting_8822b(
 	struct PHY_DM_STRUCT		*p_dm_odm
 )
 {
-	phydm_dynamic_switch_htstf_mumimo_8822b(p_dm_odm);
+	struct phydm_rtl8822b_struct	*p_8822b = &p_dm_odm->phydm_rtl8822b;
+
+	if((p_dm_odm->p_advance_ota & PHYDM_HP_OTA_SETTING_A) || (p_dm_odm->p_advance_ota & PHYDM_HP_OTA_SETTING_B)) {
+		phydm_dynamic_parameters_ota(p_dm_odm);
+	} else {
+		if (p_dm_odm->bhtstfenabled == TRUE)
+			phydm_dynamic_switch_htstf_mumimo_8822b(p_dm_odm);
+		else
+			/* odm_set_bb_reg(p_dm_odm, 0x8d8, BIT(17), 0x1);*/
+			ODM_RT_TRACE(p_dm_odm, ODM_PHY_CONFIG, ODM_DBG_LOUD, ("Default HT-STF gain control setting\n"));
+        }
+
+	if (p_dm_odm->p_advance_ota & PHYDM_ASUS_OTA_SETTING) {
+		if (p_dm_odm->rssi_min <= 20)
+			phydm_somlrxhp_setting(p_dm_odm, false);
+		else if (p_dm_odm->rssi_min >= 25)
+			phydm_somlrxhp_setting(p_dm_odm, true);
+	}
+
+	if (p_dm_odm->p_advance_ota & PHYDM_ASUS_OTA_SETTING_CCK_PATH) {
+		if (p_dm_odm->is_linked)
+			phydm_dynamic_select_cck_path_8822b(p_dm_odm);
+		else
+			p_8822b->path_judge |= ((~ BIT(2)) | ODM_RF_A | ODM_RF_B);
+	}
+	
 }
 
 #endif	/* RTL8822B_SUPPORT == 1 */
diff --git a/rtl8822BU/hal/phydm/rtl8822b/phydm_rtl8822b.h b/rtl8822BU/hal/phydm/rtl8822b/phydm_rtl8822b.h
index b678b67..3b23b13 100755..100644
--- a/rtl8822BU/hal/phydm/rtl8822b/phydm_rtl8822b.h
+++ b/rtl8822BU/hal/phydm/rtl8822b/phydm_rtl8822b.h
@@ -22,6 +22,12 @@
 #define __ODM_RTL8822B_H__
 
 void
+phydm_somlrxhp_setting(
+	struct 	PHY_DM_STRUCT		*p_dm_odm,
+	boolean switch_soml
+);
+
+void
 phydm_hwsetting_8822b(
 	struct PHY_DM_STRUCT		*p_dm_odm
 );
diff --git a/rtl8822BU/hal/phydm/rtl8822b/phydm_rtl8822b_ram.c b/rtl8822BU/hal/phydm/rtl8822b/phydm_rtl8822b_ram.c
new file mode 100644
index 0000000..55c568f
--- a/dev/null
+++ b/rtl8822BU/hal/phydm/rtl8822b/phydm_rtl8822b_ram.c
@@ -0,0 +1,7 @@
+//alex temp disable for merge, 20160328

+//#include "phydm_precomp.h"

+

+//__iram_odm_func__ void phydm_InitFuncPtrTableRAM8822B(void){

+

+

+//}
\ No newline at end of file
diff --git a/rtl8822BU/hal/phydm/rtl8822b/phydm_rtl8822b_ram.h b/rtl8822BU/hal/phydm/rtl8822b/phydm_rtl8822b_ram.h
new file mode 100644
index 0000000..908a549
--- a/dev/null
+++ b/rtl8822BU/hal/phydm/rtl8822b/phydm_rtl8822b_ram.h
@@ -0,0 +1,34 @@
+#ifndef __PHYDM_RTL8822B_RAM_H__

+#define __PHYDM_RTL8822B_RAM_H__

+

+//============================================================

+//3

+//3 This file defines 8822B RAM code function pointer

+//3 

+//============================================================

+

+//#define phydm_InitFuncPtrTableRAM   phydm_InitFuncPtrTableRAM8822B

+

+//void phydm_InitFuncPtrTableRAM8822B(void);

+

+#if IS_CUT_TEST(CONFIG_CHIP_SEL)

+#define FW_FIFO_Parsing_pu1Byte     FW_FIFO_Parsing_pu1Byte_RAM

+#define odm_ConvertTo_dB                    odm_ConvertTo_dB_RAM

+#define odm_ConvertTo_linear                odm_ConvertTo_linear_RAM

+#define odm_QueryRxPwrPercentage    odm_QueryRxPwrPercentage_RAM

+#define odm_EVMdbToPercentage           odm_EVMdbToPercentage_RAM

+#define phydm_ResetPhyInfo                  phydm_ResetPhyInfo_RAM

+#define phydm_SetPerPathPhyInfo         phydm_SetPerPathPhyInfo_RAM

+#define phydm_SetCommonPhyInfo      phydm_SetCommonPhyInfo_RAM

+#define phydm_GetRxPhyStatusType0   phydm_GetRxPhyStatusType0_RAM

+#define phydm_GetRxPhyStatusType1   phydm_GetRxPhyStatusType1_RAM

+#define phydm_GetRxPhyStatusType2   phydm_GetRxPhyStatusType2_RAM

+#define phydm_GetRxPhyStatusType5   phydm_GetRxPhyStatusType5_RAM

+#define phydm_Process_RSSIForDM_Jaguar2 phydm_Process_RSSIForDM_Jaguar2_RAM

+#define phydm_RxPhyStatusJaguarSeries2      phydm_RxPhyStatusJaguarSeries2_RAM

+#define phystatus_parsing                               phystatus_parsing_RAM

+#elif IS_CUT_B(CONFIG_CHIP_SEL)

+

+#endif

+

+#endif //__PHYDM_RTL8821C_RAM_H__
\ No newline at end of file
diff --git a/rtl8822BU/hal/phydm/rtl8822b/version_rtl8822b.h b/rtl8822BU/hal/phydm/rtl8822b/version_rtl8822b.h
index 5f6357a..85de71d 100755..100644
--- a/rtl8822BU/hal/phydm/rtl8822b/version_rtl8822b.h
+++ b/rtl8822BU/hal/phydm/rtl8822b/version_rtl8822b.h
@@ -1,9 +1,9 @@
-/*RTL8822B PHY Parameters*/

-/* 

-[Caution] 

-  Since 01/Aug/2015, the commit rules will be simplified. You do not need to fill up the version.h anymore, 

-  only the maintenance supervisor fills it before formal release.

-*/

-#define	RELEASE_DATE_8822B		20160926

-#define	COMMIT_BY_8822B			"BB_JOE"

-#define	RELEASE_VERSION_8822B	63

+/*RTL8822B PHY Parameters*/
+/* 
+[Caution] 
+  Since 01/Aug/2015, the commit rules will be simplified. You do not need to fill up the version.h anymore, 
+  only the maintenance supervisor fills it before formal release.
+*/
+#define	RELEASE_DATE_8822B		20170526
+#define	COMMIT_BY_8822B			"BB_JOE"
+#define	RELEASE_VERSION_8822B	85
diff --git a/rtl8822BU/hal/phydm/txbf/halcomtxbf.c b/rtl8822BU/hal/phydm/txbf/halcomtxbf.c
index f13db85..090b239 100755..100644
--- a/rtl8822BU/hal/phydm/txbf/halcomtxbf.c
+++ b/rtl8822BU/hal/phydm/txbf/halcomtxbf.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 /* ************************************************************
  * Description:
  *
@@ -16,9 +30,12 @@ hal_com_txbf_beamform_init(
 )
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	boolean		is_iqgen_setting_ok = false;
 
-	if (p_dm_odm->support_ic_type & ODM_RTL8822B)
-		hal_txbf_8822b_init(p_dm_odm);
+	if (p_dm_odm->support_ic_type & ODM_RTL8814A) {
+		is_iqgen_setting_ok = phydm_beamforming_set_iqgen_8814A(p_dm_odm);
+		ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] is_iqgen_setting_ok = %d\n", __func__, is_iqgen_setting_ok));
+	}
 }
 
 /*Only used for MU BFer Entry when get GID management frame (self is as MU STA)*/
@@ -178,7 +195,7 @@ hal_com_txbf_enter_work_item_callback(
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 #else
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 #endif
@@ -208,7 +225,7 @@ hal_com_txbf_leave_work_item_callback(
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 #else
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 #endif
@@ -240,7 +257,7 @@ hal_com_txbf_fw_ndpa_work_item_callback(
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 #else
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 #endif
@@ -270,7 +287,7 @@ hal_com_txbf_clk_work_item_callback(
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 #else
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 #endif
@@ -294,7 +311,7 @@ hal_com_txbf_rate_work_item_callback(
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 #else
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 #endif
@@ -321,9 +338,9 @@ hal_com_txbf_fw_ndpa_timer_callback(
 )
 {
 
-	struct _ADAPTER		*adapter = (struct _ADAPTER *)p_timer->adapter;
+	struct _ADAPTER		*adapter = (struct _ADAPTER *)p_timer->Adapter;
 	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 
 	struct _HAL_TXBF_INFO	*p_txbf_info = &p_dm_odm->beamforming_info.txbf_info;
 
@@ -333,7 +350,7 @@ hal_com_txbf_fw_ndpa_timer_callback(
 	if (*p_dm_odm->p_is_fw_dw_rsvd_page_in_progress)
 		odm_set_timer(p_dm_odm, &(p_txbf_info->txbf_fw_ndpa_timer), 5);
 	else
-		platform_schedule_work_item(&(p_txbf_info->txbf_fw_ndpa_work_item));
+		odm_schedule_work_item(&(p_txbf_info->txbf_fw_ndpa_work_item));
 }
 #endif
 
@@ -349,7 +366,7 @@ hal_com_txbf_status_work_item_callback(
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 #else
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 #endif
@@ -380,7 +397,7 @@ hal_com_txbf_reset_tx_path_work_item_callback(
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 #else
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 #endif
@@ -404,7 +421,7 @@ hal_com_txbf_get_tx_rate_work_item_callback(
 {
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	PHAL_DATA_TYPE	p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 #else
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 #endif
@@ -414,7 +431,7 @@ hal_com_txbf_get_tx_rate_work_item_callback(
 }
 
 
-bool
+boolean
 hal_com_txbf_set(
 	void			*p_dm_void,
 	u8			set_type,
@@ -473,7 +490,7 @@ hal_com_txbf_set(
 }
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-bool
+boolean
 hal_com_txbf_get(
 	struct _ADAPTER		*adapter,
 	u8			get_type,
@@ -481,8 +498,8 @@ hal_com_txbf_get(
 )
 {
 	PHAL_DATA_TYPE		p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT			*p_dm_odm = &p_hal_data->dm_out_src;
-	bool			*p_boolean = (bool *)p_out_buf;
+	struct PHY_DM_STRUCT			*p_dm_odm = &p_hal_data->DM_OutSrc;
+	boolean			*p_boolean = (boolean *)p_out_buf;
 
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
 
@@ -503,7 +520,7 @@ hal_com_txbf_get(
 			IS_HARDWARE_TYPE_8821B(adapter)	||
 			IS_HARDWARE_TYPE_8192E(adapter)	||
 			IS_HARDWARE_TYPE_JAGUAR(adapter) || IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter)) {
-			if (p_hal_data->rf_type == RF_2T2R || p_hal_data->rf_type == RF_3T3R)
+			if (p_hal_data->RF_Type == RF_2T2R || p_hal_data->RF_Type == RF_3T3R)
 				*p_boolean = true;
 			else
 				*p_boolean = false;
diff --git a/rtl8822BU/hal/phydm/txbf/halcomtxbf.h b/rtl8822BU/hal/phydm/txbf/halcomtxbf.h
index 37beb45..0d95b69 100755..100644
--- a/rtl8822BU/hal/phydm/txbf/halcomtxbf.h
+++ b/rtl8822BU/hal/phydm/txbf/halcomtxbf.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef __HAL_COM_TXBF_H__
 #define __HAL_COM_TXBF_H__
 
@@ -148,14 +162,14 @@ hal_com_txbf_status_work_item_callback(
 #endif
 );
 
-bool
+boolean
 hal_com_txbf_set(
 	void			*p_dm_void,
 	u8			set_type,
 	void			*p_in_buf
 );
 
-bool
+boolean
 hal_com_txbf_get(
 	struct _ADAPTER		*adapter,
 	u8			get_type,
diff --git a/rtl8822BU/hal/phydm/txbf/haltxbf8192e.c b/rtl8822BU/hal/phydm/txbf/haltxbf8192e.c
index fca6021..8b1df1e 100755..100644
--- a/rtl8822BU/hal/phydm/txbf/haltxbf8192e.c
+++ b/rtl8822BU/hal/phydm/txbf/haltxbf8192e.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 /* ************************************************************
  * Description:
  *
@@ -30,8 +44,8 @@ hal_txbf_8192e_rf_mode(
 )
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	bool				is_self_beamformer = false;
-	bool				is_self_beamformee = false;
+	boolean				is_self_beamformer = false;
+	boolean				is_self_beamformee = false;
 	enum beamforming_cap	beamform_cap = BEAMFORMING_CAP_NONE;
 
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
@@ -122,7 +136,7 @@ hal_txbf_8192e_download_ndpa(
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	u8			u1b_tmp = 0, tmp_reg422 = 0, head_page;
 	u8			bcn_valid_reg = 0, count = 0, dl_bcn_count = 0;
-	bool			is_send_beacon = false;
+	boolean			is_send_beacon = false;
 	struct _ADAPTER		*adapter = p_dm_odm->adapter;
 	u8			tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812;
 	/*default reseved 1 page for the IC type which is undefined.*/
@@ -138,7 +152,7 @@ hal_txbf_8192e_download_ndpa(
 	else
 		head_page = 0xFE;
 
-	adapter->hal_func.get_hal_def_var_handler(adapter, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&tx_page_bndy);
+	phydm_get_hal_def_var_handler_interface(p_dm_odm, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&tx_page_bndy);
 
 	/*Set REG_CR bit 8. DMA beacon by SW.*/
 	u1b_tmp = odm_read_1byte(p_dm_odm, REG_CR_8192E+1);
@@ -268,7 +282,7 @@ hal_txbf_8192e_enter(
 		if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss))
 			sta_id = beamformee_entry.mac_id;
 		else
-			sta_id = beamformee_entry.P_AID;
+			sta_id = beamformee_entry.p_aid;
 
 		ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s], sta_id=0x%X\n", __func__, sta_id));
 
@@ -345,7 +359,7 @@ hal_txbf_8192e_status(
 	if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss))
 		beam_ctrl_val = beamform_entry.mac_id;
 	else
-		beam_ctrl_val = beamform_entry.P_AID;
+		beam_ctrl_val = beamform_entry.p_aid;
 
 	if (idx == 0)
 		beam_ctrl_reg = REG_TXBF_CTRL_8192E;
diff --git a/rtl8822BU/hal/phydm/txbf/haltxbf8192e.h b/rtl8822BU/hal/phydm/txbf/haltxbf8192e.h
index 618ca80..636e0d5 100755..100644
--- a/rtl8822BU/hal/phydm/txbf/haltxbf8192e.h
+++ b/rtl8822BU/hal/phydm/txbf/haltxbf8192e.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef __HAL_TXBF_8192E_H__
 #define __HAL_TXBF_8192E_H__
 
diff --git a/rtl8822BU/hal/phydm/txbf/haltxbf8814a.c b/rtl8822BU/hal/phydm/txbf/haltxbf8814a.c
index edc6a10..0c700c3 100755..100644
--- a/rtl8822BU/hal/phydm/txbf/haltxbf8814a.c
+++ b/rtl8822BU/hal/phydm/txbf/haltxbf8814a.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 /* ************************************************************
  * Description:
  *
@@ -11,6 +25,52 @@
 #if (BEAMFORMING_SUPPORT == 1)
 #if (RTL8814A_SUPPORT == 1)
 
+boolean
+phydm_beamforming_set_iqgen_8814A(
+	void			*p_dm_void
+)
+{
+	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
+	u8 i = 0;
+	u16 counter = 0;
+	u32 rf_mode[4];
+
+	for (i = ODM_RF_PATH_A ; i < MAX_RF_PATH ; i++)
+		odm_set_rf_reg(p_dm_odm, i, RF_WE_LUT, 0x80000, 0x1);	/*RF mode table write enable*/
+
+	while (1) {
+		counter++;
+		for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++)
+			odm_set_rf_reg(p_dm_odm, i, RF_RCK_OS, 0xfffff, 0x18000);	/*Select Rx mode*/
+
+		ODM_delay_us(2);
+
+		for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++)
+			rf_mode[i] = odm_get_rf_reg(p_dm_odm, i, RF_RCK_OS, 0xfffff);
+
+		if ((rf_mode[0] == 0x18000) && (rf_mode[1] == 0x18000) && (rf_mode[2] == 0x18000) && (rf_mode[3] == 0x18000))
+			break;
+		else if (counter == 100) {
+			ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_TRACE, ("iqgen setting fail:8814A\n"));
+			return false;
+		}
+	}
+
+	for (i = ODM_RF_PATH_A ; i < MAX_RF_PATH ; i++) {
+		odm_set_rf_reg(p_dm_odm, i, RF_TXPA_G1, 0xfffff, 0xBE77F); /*Set Table data*/
+		odm_set_rf_reg(p_dm_odm, i, RF_TXPA_G2, 0xfffff, 0x226BF); /*Enable TXIQGEN in Rx mode*/
+	}
+	odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, RF_TXPA_G2, 0xfffff, 0xE26BF); /*Enable TXIQGEN in Rx mode*/
+
+	for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++)
+		odm_set_rf_reg(p_dm_odm, i, RF_WE_LUT, 0x80000, 0x0);	/*RF mode table write disable*/
+
+	return true;
+
+}
+
+
+
 void
 hal_txbf_8814a_set_ndpa_rate(
 	void			*p_dm_void,
@@ -24,7 +84,7 @@ hal_txbf_8814a_set_ndpa_rate(
 	odm_write_1byte(p_dm_odm, REG_NDPA_RATE_8814A, (u8) rate);
 
 }
-
+#if 0
 #define PHYDM_MEMORY_MAP_BUF_READ	0x8000
 #define PHYDM_CTRL_INFO_PAGE			0x660
 
@@ -52,6 +112,7 @@ phydm_data_rate_8814a(
 		*(data + i) = odm_read_2byte(p_dm_odm, x_read_data_addr + i);
 
 }
+#endif
 
 void
 hal_txbf_8814a_get_tx_rate(
@@ -61,18 +122,18 @@ hal_txbf_8814a_get_tx_rate(
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm_odm->beamforming_info;
 	struct _RT_BEAMFORMEE_ENTRY	*p_entry;
+	struct _rate_adaptive_table_	*p_ra_table = &p_dm_odm->dm_ra_table;
 	u32	tx_rpt_data = 0;
 	u8	data_rate = 0xFF;
 
 	p_entry = &(p_beam_info->beamformee_entry[p_beam_info->beamformee_cur_idx]);
 
-	phydm_data_rate_8814a(p_dm_odm, (u8)p_entry->mac_id, &tx_rpt_data, 1);
-	data_rate = (u8)tx_rpt_data;
+	data_rate = p_ra_table->link_tx_rate[(u8)p_entry->mac_id];
 	data_rate &= 0x7f;   /*Bit7 indicates SGI*/
 
-	p_dm_odm->tx_bf_data_rate = data_rate;
+	p_beam_info->tx_bf_data_rate = data_rate;
 
-	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] p_dm_odm->tx_bf_data_rate = 0x%x\n", __func__, p_dm_odm->tx_bf_data_rate));
+	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] p_dm_odm->tx_bf_data_rate = 0x%x\n", __func__, p_beam_info->tx_bf_data_rate));
 }
 
 void
@@ -92,7 +153,7 @@ hal_txbf_8814a_reset_tx_path(
 	else
 		return;
 
-	if ((p_dm_odm->last_usb_hub) != (*p_dm_odm->hub_usb_mode)) {
+	if ((p_beamforming_info->last_usb_hub) != (*p_dm_odm->hub_usb_mode)) {
 		nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(p_dm_odm), beamformee_entry.comp_steering_num_of_bfer);
 
 		if (*p_dm_odm->hub_usb_mode == 2) {
@@ -154,7 +215,7 @@ hal_txbf_8814a_reset_tx_path(
 			}
 		}
 
-		p_dm_odm->last_usb_hub = *p_dm_odm->hub_usb_mode;
+		p_beamforming_info->last_usb_hub = *p_dm_odm->hub_usb_mode;
 	} else
 		return;
 #endif
@@ -239,32 +300,9 @@ hal_txbf_8814a_rf_mode(
 	if (p_dm_odm->rf_type == ODM_1T1R)
 		return;
 
-	for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++) {
-		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)i, 0xef, 0x80000, 0x1);
-		/*RF mode table write enable*/
-	}
-
-	if (p_beamforming_info->beamformee_su_cnt > 0) {
-		for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++) {
-			odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)i, 0x30, 0xfffff, 0x18000);
-			/*Select RX mode*/
-			odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)i, 0x31, 0xfffff, 0xBE77F);
-			/*Set Table data*/
-			odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)i, 0x32, 0xfffff, 0x226BF);
-			/*Enable TXIQGEN in RX mode*/
-		}
-		odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xE26BF);
-		/*Enable TXIQGEN in RX mode*/
-	}
-
-	for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++) {
-		odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)i, 0xef, 0x80000, 0x0);
-		/*RF mode table write disable*/
-	}
-
 	if (p_beamforming_info->beamformee_su_cnt > 0) {
 #if DEV_BUS_TYPE == RT_USB_INTERFACE
-		p_dm_odm->last_usb_hub = *p_dm_odm->hub_usb_mode;
+		p_beamforming_info->last_usb_hub = *p_dm_odm->hub_usb_mode;
 		tx_ss = *p_dm_odm->hub_usb_mode;
 #endif
 		if (tx_ss == 3 || tx_ss == 2) {
@@ -292,6 +330,7 @@ hal_txbf_8814a_rf_mode(
 
 		/*for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/
 		odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8814A, BIT(28) | BIT29, 0x2);			/*enable BB TxBF ant mapping register*/
+		odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8814A, BIT30, 0x1);			/*if Nsts > Nc don't apply V matrix*/
 
 		if (idx == 0) {
 			switch (nr_index) {
@@ -347,7 +386,7 @@ hal_txbf_8814a_download_ndpa(
 	u8			u1b_tmp = 0, tmp_reg422 = 0;
 	u8			bcn_valid_reg = 0, count = 0, dl_bcn_count = 0;
 	u16			head_page = 0x7FE;
-	bool			is_send_beacon = false;
+	boolean			is_send_beacon = false;
 	u16			tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*default reseved 1 page for the IC type which is undefined.*/
 	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm_odm->beamforming_info;
 	struct _RT_BEAMFORMEE_ENTRY	*p_beam_entry = p_beam_info->beamformee_entry + idx;
@@ -358,7 +397,7 @@ hal_txbf_8814a_download_ndpa(
 #endif
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
 
-	adapter->hal_func.get_hal_def_var_handler(adapter, HAL_DEF_TX_PAGE_BOUNDARY, (u16 *)&tx_page_bndy);
+	phydm_get_hal_def_var_handler_interface(p_dm_odm, HAL_DEF_TX_PAGE_BOUNDARY, (u16 *)&tx_page_bndy);
 
 	/*Set REG_CR bit 8. DMA beacon by SW.*/
 	u1b_tmp = odm_read_1byte(p_dm_odm, REG_CR_8814A + 1);
@@ -524,7 +563,7 @@ hal_txbf_8814a_enter(
 		if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss))
 			sta_id = beamformee_entry.mac_id;
 		else
-			sta_id = beamformee_entry.P_AID;
+			sta_id = beamformee_entry.p_aid;
 
 		/*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/
 		if (bfee_idx == 0) {
@@ -617,7 +656,7 @@ hal_txbf_8814a_status(
 	if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss))
 		beam_ctrl_val = beamform_entry.mac_id;
 	else
-		beam_ctrl_val = beamform_entry.P_AID;
+		beam_ctrl_val = beamform_entry.p_aid;
 
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, beamform_entry.beamform_entry_state = %d", __func__, beamform_entry.beamform_entry_state));
 
diff --git a/rtl8822BU/hal/phydm/txbf/haltxbf8814a.h b/rtl8822BU/hal/phydm/txbf/haltxbf8814a.h
index 4846956..b070564 100755..100644
--- a/rtl8822BU/hal/phydm/txbf/haltxbf8814a.h
+++ b/rtl8822BU/hal/phydm/txbf/haltxbf8814a.h
@@ -1,9 +1,28 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef __HAL_TXBF_8814A_H__
 #define __HAL_TXBF_8814A_H__
 
 #if (RTL8814A_SUPPORT == 1)
 #if (BEAMFORMING_SUPPORT == 1)
 
+boolean
+phydm_beamforming_set_iqgen_8814A(
+	void			*p_dm_void
+);
+
 void
 hal_txbf_8814a_set_ndpa_rate(
 	void			*p_dm_void,
@@ -64,6 +83,7 @@ hal_txbf_8814a_fw_txbf(
 #define hal_txbf_8814a_reset_tx_path(p_dm_void,	idx)
 #define hal_txbf_8814a_get_tx_rate(p_dm_void)
 #define hal_txbf_8814a_fw_txbf(p_dm_void,	idx)
+#define phydm_beamforming_set_iqgen_8814A(p_dm_void)	0
 
 #endif
 
@@ -77,6 +97,7 @@ hal_txbf_8814a_fw_txbf(
 #define hal_txbf_8814a_reset_tx_path(p_dm_void,	idx)
 #define hal_txbf_8814a_get_tx_rate(p_dm_void)
 #define hal_txbf_8814a_fw_txbf(p_dm_void,	idx)
+#define phydm_beamforming_set_iqgen_8814A(p_dm_void)	0
 #endif
 
 #endif
diff --git a/rtl8822BU/hal/phydm/txbf/haltxbf8822b.c b/rtl8822BU/hal/phydm/txbf/haltxbf8822b.c
index b706adb..56ad3e7 100755..100644
--- a/rtl8822BU/hal/phydm/txbf/haltxbf8822b.c
+++ b/rtl8822BU/hal/phydm/txbf/haltxbf8822b.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 /*============================================================*/
 /* Description:                                              */
 /*                                                           */
@@ -87,8 +101,8 @@ hal_txbf_8822b_rf_mode(
 #if 0
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	u8				i, nr_index = 0;
-	bool				is_self_beamformer = false;
-	bool				is_self_beamformee = false;
+	boolean				is_self_beamformer = false;
+	boolean				is_self_beamformee = false;
 	struct _RT_BEAMFORMEE_ENTRY	beamformee_entry;
 
 	if (idx < BEAMFORMEE_ENTRY_NUM)
@@ -161,14 +175,14 @@ hal_txbf_8822b_download_ndpa(
 	u8			u1b_tmp = 0, tmp_reg422 = 0;
 	u8			bcn_valid_reg = 0, count = 0, dl_bcn_count = 0;
 	u16			head_page = 0x7FE;
-	bool			is_send_beacon = false;
+	boolean			is_send_beacon = false;
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
 	u16			tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*default reseved 1 page for the IC type which is undefined.*/
 	struct _RT_BEAMFORMING_INFO	*p_beam_info = GET_BEAMFORM_INFO(adapter);
 	struct _RT_BEAMFORMEE_ENTRY	*p_beam_entry = p_beam_info->beamformee_entry + idx;
 
 	p_hal_data->is_fw_dw_rsvd_page_in_progress = true;
-	adapter->hal_func.get_hal_def_var_handler(adapter, HAL_DEF_TX_PAGE_BOUNDARY, (u16 *)&tx_page_bndy);
+	phydm_get_hal_def_var_handler_interface(p_dm_odm, HAL_DEF_TX_PAGE_BOUNDARY, (u16 *)&tx_page_bndy);
 
 	/*Set REG_CR bit 8. DMA beacon by SW.*/
 	u1b_tmp = platform_efio_read_1byte(adapter, REG_CR_8814A + 1);
@@ -242,7 +256,7 @@ hal_txbf_8822b_fw_txbf_cmd(
 	u8	PageNum0 = 0xFF, PageNum1 = 0xFF;
 	u8	u1_tx_bf_parm[3] = {0};
 
-	PMGNT_INFO				p_mgnt_info = &(adapter->mgnt_info);
+	PMGNT_INFO				p_mgnt_info = &(adapter->MgntInfo);
 	struct _RT_BEAMFORMING_INFO	*p_beam_info = GET_BEAMFORM_INFO(adapter);
 
 	for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
@@ -267,6 +281,7 @@ hal_txbf_8822b_fw_txbf_cmd(
 }
 #endif
 
+#if 0
 void
 hal_txbf_8822b_init(
 	void			*p_dm_void
@@ -307,10 +322,11 @@ hal_txbf_8822b_init(
 	/* Config HW to receive packet on the user position from registry for sniffer mode. */
 	/* odm_set_bb_reg(p_dm_odm, 0xB00, BIT(9), 1);*/ /* For A-cut only. RegB00[9] = 1 (enable PMAC Rx) */
 	odm_set_bb_reg(p_dm_odm, 0xB54, BIT(30), 1); /* RegB54[30] = 1 (force user position) */
-	odm_set_bb_reg(p_dm_odm, 0xB54, (BIT(29) | BIT28), adapter->mgnt_info.sniff_user_position); /* RegB54[29:28] = user position (0~3) */
-	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Set adapter->mgnt_info.sniff_user_position=%#X\n", adapter->mgnt_info.sniff_user_position));
+	odm_set_bb_reg(p_dm_odm, 0xB54, (BIT(29) | BIT28), adapter->MgntInfo.sniff_user_position); /* RegB54[29:28] = user position (0~3) */
+	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("Set adapter->MgntInfo.sniff_user_position=%#X\n", adapter->MgntInfo.sniff_user_position));
 #endif
 }
+#endif
 
 void
 hal_txbf_8822b_enter(
@@ -394,7 +410,7 @@ hal_txbf_8822b_enter(
 		if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss))
 			sta_id = p_beamformee_entry->mac_id;
 		else
-			sta_id = p_beamformee_entry->P_AID;
+			sta_id = p_beamformee_entry->p_aid;
 
 		for (i = 0; i < MAX_BEAMFORMEE_SU; i++) {
 			if ((p_beamforming_info->beamformee_su_reg_maping & BIT(i)) == 0) {
@@ -442,11 +458,11 @@ hal_txbf_8822b_enter(
 			odm_write_1byte(p_dm_odm, (REG_ASSOCIATED_BFMER0_INFO_8822B + i), p_beamformer_entry->mac_addr[i]);
 
 		/* Set partial AID */
-		odm_write_2byte(p_dm_odm, (REG_ASSOCIATED_BFMER0_INFO_8822B + 6), p_beamformer_entry->P_AID);
+		odm_write_2byte(p_dm_odm, (REG_ASSOCIATED_BFMER0_INFO_8822B + 6), p_beamformer_entry->p_aid);
 
 		/* Fill our AID to 0x1680[11:0] and [13:12] = 2b'00, BF report segment select to 3895 bytes*/
 		u1b_tmp = odm_read_1byte(p_dm_odm, 0x1680);
-		u1b_tmp = (p_beamformer_entry->AID) & 0xFFF;
+		u1b_tmp = (p_beamformer_entry->p_aid) & 0xFFF;
 		odm_write_1byte(p_dm_odm, 0x1680, u1b_tmp);
 
 		/* Set 80us for leaving ndp_rx_standby_state */
@@ -567,7 +583,7 @@ hal_txbf_8822b_enter(
 		value16 = odm_read_2byte(p_dm_odm, mu_reg[p_beamformee_entry->mu_reg_index]);
 		value16 &= 0xFE00; /*Clear PAID*/
 		value16 |= BIT(9); /*Enable MU BFee*/
-		value16 |= p_beamformee_entry->P_AID;
+		value16 |= p_beamformee_entry->p_aid;
 		odm_write_2byte(p_dm_odm, mu_reg[p_beamformee_entry->mu_reg_index], value16);
 
 		/* 0x42C[30] = 1 (0: from Tx desc, 1: from 0x45F) */
@@ -711,7 +727,7 @@ hal_txbf_8822b_status(
 	u32					beam_ctrl_reg;
 	struct _RT_BEAMFORMING_INFO	*p_beamforming_info = &p_dm_odm->beamforming_info;
 	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry;
-	bool	is_mu_sounding = p_beamforming_info->is_mu_sounding, is_bitmap_ready = false;
+	boolean	is_mu_sounding = p_beamforming_info->is_mu_sounding, is_bitmap_ready = false;
 	u16 bitmap;
 	u8 idx, gid, i;
 	u8 id1, id0;
@@ -719,7 +735,7 @@ hal_txbf_8822b_status(
 	u32 user_position_lsb[6] = {0};
 	u32 user_position_msb[6] = {0};
 	u32 value32;
-	bool is_sounding_success[6] = {false};
+	boolean is_sounding_success[6] = {false};
 
 	if (beamform_idx < BEAMFORMEE_ENTRY_NUM)
 		p_beamform_entry = &p_beamforming_info->beamformee_entry[beamform_idx];
@@ -732,7 +748,7 @@ hal_txbf_8822b_status(
 		if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss))
 			beam_ctrl_val = p_beamform_entry->mac_id;
 		else
-			beam_ctrl_val = p_beamform_entry->P_AID;
+			beam_ctrl_val = p_beamform_entry->p_aid;
 
 		ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, beamform_entry.beamform_entry_state = %d", __func__, p_beamform_entry->beamform_entry_state));
 
@@ -781,7 +797,7 @@ hal_txbf_8822b_status(
 			value32 = odm_get_bb_reg(p_dm_odm, 0xF4C, 0xFFFF0000);
 			/* odm_set_bb_reg(p_dm_odm, 0x19E0, MASKHWORD, 0xFFFF);Let MAC ignore bitmap */
 
-			is_bitmap_ready = (bool)((value32 & BIT(15)) >> 15);
+			is_bitmap_ready = (boolean)((value32 & BIT(15)) >> 15);
 			bitmap = (u16)(value32 & 0x3FFF);
 
 			for (idx = 0; idx < 15; idx++) {
@@ -1021,18 +1037,21 @@ phydm_8822btxbf_rfmode(
 
 	if ((su_bfee_cnt > 0) || (mu_bfee_cnt > 0)) {
 		for (i = ODM_RF_PATH_A; i <= ODM_RF_PATH_B; i++) {
-			odm_set_rf_reg(p_dm_odm, i, 0xEF, BIT(19), 0x1); /*RF mode table write enable*/
-			odm_set_rf_reg(p_dm_odm, i, 0x33, 0xF, 3); /*Select RX mode*/
-			odm_set_rf_reg(p_dm_odm, i, 0x3E, 0xfffff, 0x00036); /*Set Table data*/
-			odm_set_rf_reg(p_dm_odm, i, 0x3F, 0xfffff, 0x5AFCE); /*Set Table data*/
-			odm_set_rf_reg(p_dm_odm, i, 0xEF, BIT(19), 0x0); /*RF mode table write disable*/
+			odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)i, 0xEF, BIT(19), 0x1); /*RF mode table write enable*/
+			odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)i, 0x33, 0xF, 3); /*Select RX mode*/
+			odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)i, 0x3E, 0xfffff, 0x00036); /*Set Table data*/
+			odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)i, 0x3F, 0xfffff, 0x5AFCE); /*Set Table data*/
+			odm_set_rf_reg(p_dm_odm, (enum odm_rf_radio_path_e)i, 0xEF, BIT(19), 0x0); /*RF mode table write disable*/
 		}
 	}
 
+	odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(30), 1);			/*if Nsts > Nc, don't apply V matrix*/
+
 	if (su_bfee_cnt > 0 || mu_bfee_cnt > 0) {
 		/*for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/
 		odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(28) | BIT29, 0x2);	/*enable BB TxBF ant mapping register*/
 		odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(31), 1);			/*ignore user since 8822B only 2Tx*/
+		
 
 		/*Nsts = 2	AB*/
 		odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8822B, 0xffff, 0x0433);
@@ -1053,13 +1072,13 @@ phydm_8822btxbf_rfmode(
 void
 phydm_8822b_sutxbfer_workaroud(
 	void		*p_dm_void,
-	bool	enable_su_bfer,
+	boolean	enable_su_bfer,
 	u8	nc,
 	u8	nr,
 	u8	ng,
 	u8	CB,
 	u8	BW,
-	bool	is_vht
+	boolean	is_vht
 )
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
diff --git a/rtl8822BU/hal/phydm/txbf/haltxbf8822b.h b/rtl8822BU/hal/phydm/txbf/haltxbf8822b.h
index b14c754..2ff19bd 100755..100644
--- a/rtl8822BU/hal/phydm/txbf/haltxbf8822b.h
+++ b/rtl8822BU/hal/phydm/txbf/haltxbf8822b.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef __HAL_TXBF_8822B_H__
 #define __HAL_TXBF_8822B_H__
 
@@ -5,11 +19,6 @@
 #if (BEAMFORMING_SUPPORT == 1)
 
 void
-hal_txbf_8822b_init(
-	void			*p_dm_void
-);
-
-void
 hal_txbf_8822b_enter(
 	void			*p_dm_void,
 	u8				idx
@@ -40,7 +49,6 @@ hal_txbf_8822b_fw_txbf(
 	u8				idx
 );
 #else
-#define hal_txbf_8822b_init(p_dm_void)
 #define hal_txbf_8822b_enter(p_dm_void, idx)
 #define hal_txbf_8822b_leave(p_dm_void, idx)
 #define hal_txbf_8822b_status(p_dm_void, idx)
@@ -60,13 +68,13 @@ phydm_8822btxbf_rfmode(
 void
 phydm_8822b_sutxbfer_workaroud(
 	void		*p_dm_void,
-	bool	enable_su_bfer,
+	boolean	enable_su_bfer,
 	u8	nc,
 	u8	nr,
 	u8	ng,
 	u8	CB,
 	u8	BW,
-	bool	is_vht
+	boolean	is_vht
 );
 
 #else
@@ -75,7 +83,6 @@ phydm_8822b_sutxbfer_workaroud(
 #endif
 
 #else
-#define hal_txbf_8822b_init(p_dm_void)
 #define hal_txbf_8822b_enter(p_dm_void, idx)
 #define hal_txbf_8822b_leave(p_dm_void, idx)
 #define hal_txbf_8822b_status(p_dm_void, idx)
diff --git a/rtl8822BU/hal/phydm/txbf/haltxbfinterface.c b/rtl8822BU/hal/phydm/txbf/haltxbfinterface.c
index fe795c1..5be3016 100755..100644
--- a/rtl8822BU/hal/phydm/txbf/haltxbfinterface.c
+++ b/rtl8822BU/hal/phydm/txbf/haltxbfinterface.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 /* ************************************************************
  * Description:
  *
@@ -19,10 +33,10 @@ beamforming_gid_paid(
 	u8		RA[6] = {0};
 	u8		*p_header = GET_FRAME_OF_FIRST_FRAG(adapter, p_tcb);
 	HAL_DATA_TYPE			*p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT				*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT				*p_dm_odm = &p_hal_data->DM_OutSrc;
 	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm_odm->beamforming_info);
 
-	if (adapter->hardware_type < HARDWARE_TYPE_RTL8192EE)
+	if (adapter->HardwareType < HARDWARE_TYPE_RTL8192EE)
 		return;
 	else if (IS_WIRELESS_MODE_N(adapter) == false)
 		return;
@@ -35,7 +49,7 @@ beamforming_gid_paid(
 		/* Fill G_ID and P_AID */
 		p_tcb->G_ID = 63;
 		if (p_beam_info->first_mu_bfee_index < BEAMFORMEE_ENTRY_NUM) {
-			p_tcb->P_AID = p_beam_info->beamformee_entry[p_beam_info->first_mu_bfee_index].P_AID;
+			p_tcb->P_AID = p_beam_info->beamformee_entry[p_beam_info->first_mu_bfee_index].p_aid;
 			RT_DISP(FBEAM, FBEAM_FUN, ("[David]@%s End, G_ID=0x%X, P_AID=0x%X\n", __func__, p_tcb->G_ID, p_tcb->P_AID));
 		}
 	} else {
@@ -43,11 +57,11 @@ beamforming_gid_paid(
 
 		/* VHT SU PPDU carrying one or more group addressed MPDUs or */
 		/* Transmitting a VHT NDP intended for multiple recipients */
-		if (mac_addr_is_bcst(RA) || mac_addr_is_multicast(RA)	|| p_tcb->mac_id == MAC_ID_STATIC_FOR_BROADCAST_MULTICAST) {
+		if (MacAddr_isBcst(RA) || MacAddr_isMulticast(RA)	|| p_tcb->macId == MAC_ID_STATIC_FOR_BROADCAST_MULTICAST) {
 			p_tcb->G_ID = 63;
 			p_tcb->P_AID = 0;
 		} else if (ACTING_AS_AP(adapter)) {
-			u16	AID = (u16)(mac_id_get_owner_associated_client_aid(adapter, p_tcb->mac_id) & 0x1ff);		/*AID[0:8]*/
+			u16	AID = (u16)(MacIdGetOwnerAssociatedClientAID(adapter, p_tcb->macId) & 0x1ff);		/*AID[0:8]*/
 
 			/*RT_DISP(FBEAM, FBEAM_FUN, ("@%s  p_tcb->mac_id=0x%X, AID=0x%X\n", __func__, p_tcb->mac_id, AID));*/
 			p_tcb->G_ID = 63;
@@ -63,8 +77,8 @@ beamforming_gid_paid(
 		} else if (ACTING_AS_IBSS(adapter)) {
 			p_tcb->G_ID = 63;
 			/*P_AID for infrasturcture mode; MACID for ad-hoc mode. */
-			p_tcb->P_AID = p_tcb->mac_id;
-		} else if (mgnt_link_status_query(adapter)) {				/*Addressed to AP*/
+			p_tcb->P_AID = p_tcb->macId;
+		} else if (MgntLinkStatusQuery(adapter)) {				/*Addressed to AP*/
 			p_tcb->G_ID = 0;
 			GET_80211_HDR_ADDRESS1(p_header, &RA);
 			p_tcb->P_AID =  RA[5];							/*RA[39:47]*/
@@ -86,7 +100,7 @@ beamforming_get_report_frame(
 )
 {
 	HAL_DATA_TYPE				*p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT					*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT					*p_dm_odm = &p_hal_data->DM_OutSrc;
 	struct _RT_BEAMFORMEE_ENTRY		*p_beamform_entry = NULL;
 	u8						*p_mimo_ctrl_field, p_csi_report, p_csi_matrix;
 	u8						idx, nc, nr, CH_W;
@@ -95,30 +109,30 @@ beamforming_get_report_frame(
 	ACT_PKT_TYPE				pkt_type = ACT_PKT_TYPE_UNKNOWN;
 
 	/* Memory comparison to see if CSI report is the same with previous one */
-	p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm_odm, frame_addr2(*p_pdu_os), &idx);
+	p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm_odm, Frame_Addr2(*p_pdu_os), &idx);
 
 	if (p_beamform_entry == NULL) {
 		ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("beamforming_get_report_frame: Cannot find entry by addr\n"));
 		return RT_STATUS_FAILURE;
 	}
 
-	pkt_type = packet_get_action_frame_type(p_pdu_os);
+	pkt_type = PacketGetActionFrameType(p_pdu_os);
 
 	/* -@ Modified by David */
 	if (pkt_type == ACT_PKT_VHT_COMPRESSED_BEAMFORMING) {
-		p_mimo_ctrl_field = p_pdu_os->octet + 26;
+		p_mimo_ctrl_field = p_pdu_os->Octet + 26;
 		nc = ((*p_mimo_ctrl_field) & 0x7) + 1;
 		nr = (((*p_mimo_ctrl_field) & 0x38) >> 3) + 1;
 		CH_W = (((*p_mimo_ctrl_field) & 0xC0) >> 6);
-		p_csi_matrix = p_mimo_ctrl_field + 3 + nc; /* 24+(1+1+3)+2  MAC header+(Category+ActionCode+MIMOControlField) +SNR(nc=2) */
-		csi_matrix_len = p_pdu_os->length  - 26 - 3 - nc;
+		/*p_csi_matrix = p_mimo_ctrl_field + 3 + nc;*/ /* 24+(1+1+3)+2  MAC header+(Category+ActionCode+MIMOControlField) +SNR(nc=2) */
+		csi_matrix_len = p_pdu_os->Length  - 26 - 3 - nc;
 	} else if (pkt_type == ACT_PKT_HT_COMPRESSED_BEAMFORMING) {
-		p_mimo_ctrl_field = p_pdu_os->octet + 26;
+		p_mimo_ctrl_field = p_pdu_os->Octet + 26;
 		nc = ((*p_mimo_ctrl_field) & 0x3) + 1;
 		nr = (((*p_mimo_ctrl_field) & 0xC) >> 2) + 1;
 		CH_W = (((*p_mimo_ctrl_field) & 0x10) >> 4);
-		p_csi_matrix = p_mimo_ctrl_field + 6 + nr;	/* 24+(1+1+6)+2  MAC header+(Category+ActionCode+MIMOControlField) +SNR(nc=2) */
-		csi_matrix_len = p_pdu_os->length  - 26 - 6 - nr;
+		/*p_csi_matrix = p_mimo_ctrl_field + 6 + nr;*/	/* 24+(1+1+6)+2  MAC header+(Category+ActionCode+MIMOControlField) +SNR(nc=2) */
+		csi_matrix_len = p_pdu_os->Length  - 26 - 6 - nr;
 	} else
 		return RT_STATUS_SUCCESS;
 
@@ -138,22 +152,22 @@ construct_ht_ndpa_packet(
 )
 {
 	u16					duration = 0;
-	PMGNT_INFO				p_mgnt_info = &(adapter->mgnt_info);
+	PMGNT_INFO				p_mgnt_info = &(adapter->MgntInfo);
 	OCTET_STRING			p_ndpa_frame, action_content;
 	u8					action_hdr[4] = {ACT_CAT_VENDOR, 0x00, 0xe0, 0x4c};
 
-	platform_zero_memory(buffer, 32);
+	PlatformZeroMemory(buffer, 32);
 
 	SET_80211_HDR_FRAME_CONTROL(buffer, 0);
 
 	SET_80211_HDR_ORDER(buffer, 1);
-	SET_80211_HDR_TYPE_AND_SUBTYPE(buffer, type_action_no_ack);
+	SET_80211_HDR_TYPE_AND_SUBTYPE(buffer, Type_Action_No_Ack);
 
 	SET_80211_HDR_ADDRESS1(buffer, RA);
-	SET_80211_HDR_ADDRESS2(buffer, adapter->current_address);
-	SET_80211_HDR_ADDRESS3(buffer, p_mgnt_info->bssid);
+	SET_80211_HDR_ADDRESS2(buffer, adapter->CurrentAddress);
+	SET_80211_HDR_ADDRESS3(buffer, p_mgnt_info->Bssid);
 
-	duration = 2 * a_sifs_time + 40;
+	duration = 2 * a_SifsTime + 40;
 
 	if (BW == CHANNEL_WIDTH_40)
 		duration += 87;
@@ -163,13 +177,13 @@ construct_ht_ndpa_packet(
 	SET_80211_HDR_DURATION(buffer, duration);
 
 	/* HT control field */
-	SET_HT_CTRL_CSI_STEERING(buffer + s_mac_hdr_lng, 3);
-	SET_HT_CTRL_NDP_ANNOUNCEMENT(buffer + s_mac_hdr_lng, 1);
+	SET_HT_CTRL_CSI_STEERING(buffer + sMacHdrLng, 3);
+	SET_HT_CTRL_NDP_ANNOUNCEMENT(buffer + sMacHdrLng, 1);
 
-	fill_octet_string(p_ndpa_frame, buffer, s_mac_hdr_lng + s_htc_lng);
+	FillOctetString(p_ndpa_frame, buffer, sMacHdrLng + sHTCLng);
 
-	fill_octet_string(action_content, action_hdr, 4);
-	packet_append_data(&p_ndpa_frame, action_content);
+	FillOctetString(action_content, action_hdr, 4);
+	PacketAppendData(&p_ndpa_frame, action_content);
 
 	*p_length = 32;
 }
@@ -177,7 +191,7 @@ construct_ht_ndpa_packet(
 
 
 
-bool
+boolean
 send_fw_ht_ndpa_packet(
 	void			*p_dm_void,
 	u8			*RA,
@@ -188,11 +202,11 @@ send_fw_ht_ndpa_packet(
 	struct _ADAPTER				*adapter = p_dm_odm->adapter;
 	PRT_TCB				p_tcb;
 	PRT_TX_LOCAL_BUFFER	p_buf;
-	bool				ret = true;
+	boolean				ret = true;
 	u32					buf_len;
 	u8					*buf_addr;
 	u8					desc_len = 0, idx = 0, ndp_tx_rate;
-	struct _ADAPTER				*p_def_adapter = get_default_adapter(adapter);
+	struct _ADAPTER				*p_def_adapter = GetDefaultAdapter(adapter);
 	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm_odm->beamforming_info;
 	HAL_DATA_TYPE			*p_hal_data = GET_HAL_DATA(adapter);
 	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm_odm, RA, &idx);
@@ -204,13 +218,13 @@ send_fw_ht_ndpa_packet(
 
 	ndp_tx_rate = beamforming_get_htndp_tx_rate(p_dm_odm, p_beamform_entry->comp_steering_num_of_bfer);
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate));
-	platform_acquire_spin_lock(adapter, RT_TX_SPINLOCK);
+	PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK);
 
-	if (mgnt_get_fw_buffer(p_def_adapter, &p_tcb, &p_buf)) {
+	if (MgntGetFWBuffer(p_def_adapter, &p_tcb, &p_buf)) {
 #if (DEV_BUS_TYPE != RT_PCI_INTERFACE)
-		desc_len = adapter->hw_desc_head_length - p_hal_data->usb_all_dummy_length;
+		desc_len = adapter->HWDescHeadLength - p_hal_data->USBALLDummyLength;
 #endif
-		buf_addr = p_buf->buffer.virtual_address + desc_len;
+		buf_addr = p_buf->Buffer.VirtualAddress + desc_len;
 
 		construct_ht_ndpa_packet(
 			adapter,
@@ -220,32 +234,32 @@ send_fw_ht_ndpa_packet(
 			BW
 		);
 
-		p_tcb->packet_length = buf_len + desc_len;
+		p_tcb->PacketLength = buf_len + desc_len;
 
-		p_tcb->is_tx_enable_sw_calc_dur = true;
+		p_tcb->bTxEnableSwCalcDur = true;
 
-		p_tcb->bw_of_packet = BW;
+		p_tcb->BWOfPacket = BW;
 
 		if (ACTING_AS_IBSS(adapter) || ACTING_AS_AP(adapter))
 			p_tcb->G_ID = 63;
 
-		p_tcb->P_AID = p_beamform_entry->P_AID;
-		p_tcb->data_rate = ndp_tx_rate;	/*rate of NDP decide by nr*/
+		p_tcb->P_AID = p_beamform_entry->p_aid;
+		p_tcb->DataRate = ndp_tx_rate;	/*rate of NDP decide by nr*/
 
-		adapter->hal_func.cmd_send_packet_handler(adapter, p_tcb, p_buf, p_tcb->packet_length, DESC_PACKET_TYPE_NORMAL, false);
+		adapter->HalFunc.CmdSendPacketHandler(adapter, p_tcb, p_buf, p_tcb->PacketLength, DESC_PACKET_TYPE_NORMAL, false);
 	} else
 		ret = false;
 
-	platform_release_spin_lock(adapter, RT_TX_SPINLOCK);
+	PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK);
 
 	if (ret)
-		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->buffer.virtual_address, p_tcb->packet_length);
+		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, p_tcb->PacketLength);
 
 	return ret;
 }
 
 
-bool
+boolean
 send_sw_ht_ndpa_packet(
 	void			*p_dm_void,
 	u8			*RA,
@@ -256,7 +270,7 @@ send_sw_ht_ndpa_packet(
 	struct _ADAPTER				*adapter = p_dm_odm->adapter;
 	PRT_TCB					p_tcb;
 	PRT_TX_LOCAL_BUFFER		p_buf;
-	bool					ret = true;
+	boolean					ret = true;
 	u8					idx = 0, ndp_tx_rate = 0;
 	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm_odm->beamforming_info;
 	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm_odm, RA, &idx);
@@ -266,29 +280,29 @@ send_sw_ht_ndpa_packet(
 	ndp_tx_rate = beamforming_get_htndp_tx_rate(p_dm_odm, p_beamform_entry->comp_steering_num_of_bfer);
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate));
 
-	platform_acquire_spin_lock(adapter, RT_TX_SPINLOCK);
+	PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK);
 
-	if (mgnt_get_buffer(adapter, &p_tcb, &p_buf)) {
+	if (MgntGetBuffer(adapter, &p_tcb, &p_buf)) {
 		construct_ht_ndpa_packet(
 			adapter,
 			RA,
-			p_buf->buffer.virtual_address,
-			&p_tcb->packet_length,
+			p_buf->Buffer.VirtualAddress,
+			&p_tcb->PacketLength,
 			BW
 		);
 
-		p_tcb->is_tx_enable_sw_calc_dur = true;
+		p_tcb->bTxEnableSwCalcDur = true;
 
-		p_tcb->bw_of_packet = BW;
+		p_tcb->BWOfPacket = BW;
 
-		mgnt_send_packet(adapter, p_tcb, p_buf, p_tcb->packet_length, NORMAL_QUEUE, ndp_tx_rate);
+		MgntSendPacket(adapter, p_tcb, p_buf, p_tcb->PacketLength, NORMAL_QUEUE, ndp_tx_rate);
 	} else
 		ret = false;
 
-	platform_release_spin_lock(adapter, RT_TX_SPINLOCK);
+	PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK);
 
 	if (ret)
-		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->buffer.virtual_address, p_tcb->packet_length);
+		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, p_tcb->PacketLength);
 
 	return ret;
 }
@@ -314,12 +328,12 @@ construct_vht_ndpa_packet(
 	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm_odm, RA, &idx);
 	/* Frame control. */
 	SET_80211_HDR_FRAME_CONTROL(p_ndpa_frame, 0);
-	SET_80211_HDR_TYPE_AND_SUBTYPE(p_ndpa_frame, type_ndpa);
+	SET_80211_HDR_TYPE_AND_SUBTYPE(p_ndpa_frame, Type_NDPA);
 
 	SET_80211_HDR_ADDRESS1(p_ndpa_frame, RA);
 	SET_80211_HDR_ADDRESS2(p_ndpa_frame, p_beamform_entry->my_mac_addr);
 
-	duration = 2 * a_sifs_time + 44;
+	duration = 2 * a_SifsTime + 44;
 
 	if (BW == CHANNEL_WIDTH_80)
 		duration += 40;
@@ -336,7 +350,7 @@ construct_vht_ndpa_packet(
 	if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss) || phydm_acting_determine(p_dm_odm, phydm_acting_as_ap) == false)
 		AID = 0;
 
-	sta_info.AID = AID;
+	sta_info.aid = AID;
 	sta_info.feedback_type = 0;
 	sta_info.nc_index = 0;
 
@@ -346,7 +360,7 @@ construct_vht_ndpa_packet(
 }
 
 
-bool
+boolean
 send_fw_vht_ndpa_packet(
 	void			*p_dm_void,
 	u8			*RA,
@@ -358,11 +372,11 @@ send_fw_vht_ndpa_packet(
 	struct _ADAPTER				*adapter = p_dm_odm->adapter;
 	PRT_TCB					p_tcb;
 	PRT_TX_LOCAL_BUFFER		p_buf;
-	bool					ret = true;
+	boolean					ret = true;
 	u32					buf_len;
 	u8					*buf_addr;
 	u8					desc_len = 0, idx = 0, ndp_tx_rate = 0;
-	struct _ADAPTER				*p_def_adapter = get_default_adapter(adapter);
+	struct _ADAPTER				*p_def_adapter = GetDefaultAdapter(adapter);
 	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm_odm->beamforming_info;
 	HAL_DATA_TYPE			*p_hal_data = GET_HAL_DATA(adapter);
 	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm_odm, RA, &idx);
@@ -375,13 +389,13 @@ send_fw_vht_ndpa_packet(
 	ndp_tx_rate = beamforming_get_vht_ndp_tx_rate(p_dm_odm, p_beamform_entry->comp_steering_num_of_bfer);
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate));
 
-	platform_acquire_spin_lock(adapter, RT_TX_SPINLOCK);
+	PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK);
 
-	if (mgnt_get_fw_buffer(p_def_adapter, &p_tcb, &p_buf)) {
+	if (MgntGetFWBuffer(p_def_adapter, &p_tcb, &p_buf)) {
 #if (DEV_BUS_TYPE != RT_PCI_INTERFACE)
-		desc_len = adapter->hw_desc_head_length - p_hal_data->usb_all_dummy_length;
+		desc_len = adapter->HWDescHeadLength - p_hal_data->USBALLDummyLength;
 #endif
-		buf_addr = p_buf->buffer.virtual_address + desc_len;
+		buf_addr = p_buf->Buffer.VirtualAddress + desc_len;
 
 		construct_vht_ndpa_packet(
 			p_dm_odm,
@@ -392,35 +406,35 @@ send_fw_vht_ndpa_packet(
 			BW
 		);
 
-		p_tcb->packet_length = buf_len + desc_len;
+		p_tcb->PacketLength = buf_len + desc_len;
 
-		p_tcb->is_tx_enable_sw_calc_dur = true;
+		p_tcb->bTxEnableSwCalcDur = true;
 
-		p_tcb->bw_of_packet = BW;
+		p_tcb->BWOfPacket = BW;
 
 		if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss) || phydm_acting_determine(p_dm_odm, phydm_acting_as_ap))
 			p_tcb->G_ID = 63;
 
-		p_tcb->P_AID = p_beamform_entry->P_AID;
-		p_tcb->data_rate = ndp_tx_rate;	/*decide by nr*/
+		p_tcb->P_AID = p_beamform_entry->p_aid;
+		p_tcb->DataRate = ndp_tx_rate;	/*decide by nr*/
 
-		adapter->hal_func.cmd_send_packet_handler(adapter, p_tcb, p_buf, p_tcb->packet_length, DESC_PACKET_TYPE_NORMAL, false);
+		adapter->HalFunc.CmdSendPacketHandler(adapter, p_tcb, p_buf, p_tcb->PacketLength, DESC_PACKET_TYPE_NORMAL, false);
 	} else
 		ret = false;
 
-	platform_release_spin_lock(adapter, RT_TX_SPINLOCK);
+	PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK);
 
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] End, ret=%d\n", __func__, ret));
 
 	if (ret)
-		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->buffer.virtual_address, p_tcb->packet_length);
+		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, p_tcb->PacketLength);
 
 	return ret;
 }
 
 
 
-bool
+boolean
 send_sw_vht_ndpa_packet(
 	void			*p_dm_void,
 	u8			*RA,
@@ -432,7 +446,7 @@ send_sw_vht_ndpa_packet(
 	struct _ADAPTER				*adapter = p_dm_odm->adapter;
 	PRT_TCB					p_tcb;
 	PRT_TX_LOCAL_BUFFER		p_buf;
-	bool					ret = true;
+	boolean					ret = true;
 	u8					idx = 0, ndp_tx_rate = 0;
 	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm_odm->beamforming_info);
 	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm_odm, RA, &idx);
@@ -440,30 +454,30 @@ send_sw_vht_ndpa_packet(
 	ndp_tx_rate = beamforming_get_vht_ndp_tx_rate(p_dm_odm, p_beamform_entry->comp_steering_num_of_bfer);
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate));
 
-	platform_acquire_spin_lock(adapter, RT_TX_SPINLOCK);
+	PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK);
 
-	if (mgnt_get_buffer(adapter, &p_tcb, &p_buf)) {
+	if (MgntGetBuffer(adapter, &p_tcb, &p_buf)) {
 		construct_vht_ndpa_packet(
 			p_dm_odm,
 			RA,
 			AID,
-			p_buf->buffer.virtual_address,
-			&p_tcb->packet_length,
+			p_buf->Buffer.VirtualAddress,
+			&p_tcb->PacketLength,
 			BW
 		);
 
-		p_tcb->is_tx_enable_sw_calc_dur = true;
-		p_tcb->bw_of_packet = BW;
+		p_tcb->bTxEnableSwCalcDur = true;
+		p_tcb->BWOfPacket = BW;
 
 		/*rate of NDP decide by nr*/
-		mgnt_send_packet(adapter, p_tcb, p_buf, p_tcb->packet_length, NORMAL_QUEUE, ndp_tx_rate);
+		MgntSendPacket(adapter, p_tcb, p_buf, p_tcb->PacketLength, NORMAL_QUEUE, ndp_tx_rate);
 	} else
 		ret = false;
 
-	platform_release_spin_lock(adapter, RT_TX_SPINLOCK);
+	PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK);
 
 	if (ret)
-		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->buffer.virtual_address, p_tcb->packet_length);
+		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, p_tcb->PacketLength);
 
 	return ret;
 }
@@ -483,7 +497,7 @@ beamforming_get_vht_gid_mgnt_frame(
 )
 {
 	HAL_DATA_TYPE	*p_hal_data = GET_HAL_DATA(adapter);
-	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->dm_out_src;
+	struct PHY_DM_STRUCT		*p_dm_odm = &p_hal_data->DM_OutSrc;
 	enum rt_status		rt_status = RT_STATUS_SUCCESS;
 	u8			*p_buffer = NULL;
 	u8			*p_raddr = NULL;
@@ -501,16 +515,16 @@ beamforming_get_vht_gid_mgnt_frame(
 	}
 
 	/* Check RA*/
-	p_raddr = (u8 *)(p_pdu_os->octet) + 4;
-	if (!eq_mac_addr(p_raddr, adapter->current_address)) {
+	p_raddr = (u8 *)(p_pdu_os->Octet) + 4;
+	if (!eq_mac_addr(p_raddr, adapter->CurrentAddress)) {
 		ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("beamforming_get_vht_gid_mgnt_frame(): Drop because of RA error.\n"));
 		return RT_STATUS_PKT_DROP;
 	}
 
-	RT_DISP_DATA(FBEAM, FBEAM_DATA, "On VHT GID Mgnt Frame ==>:\n", p_pdu_os->octet, p_pdu_os->length);
+	RT_DISP_DATA(FBEAM, FBEAM_DATA, "On VHT GID Mgnt Frame ==>:\n", p_pdu_os->Octet, p_pdu_os->length);
 
 	/*Parsing Membership status array*/
-	p_buffer = p_pdu_os->octet + FRAME_OFFSET_VHT_GID_MGNT_MEMBERSHIP_STATUS_ARRAY;
+	p_buffer = p_pdu_os->Octet + FRAME_OFFSET_VHT_GID_MGNT_MEMBERSHIP_STATUS_ARRAY;
 	for (idx = 0; idx < 8; idx++) {
 		mem_status[idx] = GET_VHT_GID_MGNT_INFO_MEMBERSHIP_STATUS(p_buffer + idx);
 		p_beamform_entry->gid_valid[idx] = GET_VHT_GID_MGNT_INFO_MEMBERSHIP_STATUS(p_buffer + idx);
@@ -519,7 +533,7 @@ beamforming_get_vht_gid_mgnt_frame(
 	RT_DISP_DATA(FBEAM, FBEAM_DATA, "mem_status: ", mem_status, 8);
 
 	/* Parsing User Position array*/
-	p_buffer = p_pdu_os->octet + FRAME_OFFSET_VHT_GID_MGNT_USER_POSITION_ARRAY;
+	p_buffer = p_pdu_os->Octet + FRAME_OFFSET_VHT_GID_MGNT_USER_POSITION_ARRAY;
 	for (idx = 0; idx < 16; idx++) {
 		user_pos[idx] = GET_VHT_GID_MGNT_INFO_USER_POSITION(p_buffer + idx);
 		p_beamform_entry->user_position[idx] = GET_VHT_GID_MGNT_INFO_USER_POSITION(p_buffer + idx);
@@ -550,12 +564,12 @@ beamforming_get_vht_gid_mgnt_frame(
 		u8	indibuffer[24] = {0};
 		u8	indioffset = 0;
 
-		platform_move_memory(indibuffer + indioffset, p_beamform_entry->gid_valid, 8);
+		PlatformMoveMemory(indibuffer + indioffset, p_beamform_entry->gid_valid, 8);
 		indioffset += 8;
-		platform_move_memory(indibuffer + indioffset, p_beamform_entry->user_position, 16);
+		PlatformMoveMemory(indibuffer + indioffset, p_beamform_entry->user_position, 16);
 		indioffset += 16;
 
-		platform_indicate_custom_status(
+		PlatformIndicateCustomStatus(
 			adapter,
 			RT_CUSTOM_EVENT_VHT_RECV_GID_MGNT_FRAME,
 			RT_CUSTOM_INDI_TARGET_IHV,
@@ -588,10 +602,10 @@ construct_vht_gid_mgnt_frame(
 	struct _ADAPTER				*adapter = p_beam_info->source_adapter;
 	OCTET_STRING		os_ftm_frame, tmp;
 
-	fill_octet_string(os_ftm_frame, buffer, 0);
+	FillOctetString(os_ftm_frame, buffer, 0);
 	*p_length = 0;
 
-	construct_ma_frame_hdr(
+	ConstructMaFrameHdr(
 		adapter,
 		RA,
 		ACT_CAT_VHT,
@@ -599,19 +613,19 @@ construct_vht_gid_mgnt_frame(
 		&os_ftm_frame);
 
 	/* Membership status array*/
-	fill_octet_string(tmp, p_beamform_entry->gid_valid, 8);
-	packet_append_data(&os_ftm_frame, tmp);
+	FillOctetString(tmp, p_beamform_entry->gid_valid, 8);
+	PacketAppendData(&os_ftm_frame, tmp);
 
 	/* User Position array*/
-	fill_octet_string(tmp, p_beamform_entry->user_position, 16);
-	packet_append_data(&os_ftm_frame, tmp);
+	FillOctetString(tmp, p_beamform_entry->user_position, 16);
+	PacketAppendData(&os_ftm_frame, tmp);
 
 	*p_length = os_ftm_frame.length;
 
 	RT_DISP_DATA(FBEAM, FBEAM_DATA, "construct_vht_gid_mgnt_frame():\n", buffer, *p_length);
 }
 
-bool
+boolean
 send_sw_vht_gid_mgnt_frame(
 	void			*p_dm_void,
 	u8			*RA,
@@ -621,7 +635,7 @@ send_sw_vht_gid_mgnt_frame(
 	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	PRT_TCB					p_tcb;
 	PRT_TX_LOCAL_BUFFER		p_buf;
-	bool					ret = true;
+	boolean					ret = true;
 	u8					data_rate = 0;
 	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm_odm->beamforming_info);
 	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry = &p_beam_info->beamformee_entry[idx];
@@ -629,27 +643,27 @@ send_sw_vht_gid_mgnt_frame(
 
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
 
-	platform_acquire_spin_lock(adapter, RT_TX_SPINLOCK);
+	PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK);
 
-	if (mgnt_get_buffer(adapter, &p_tcb, &p_buf)) {
+	if (MgntGetBuffer(adapter, &p_tcb, &p_buf)) {
 		construct_vht_gid_mgnt_frame(
 			p_dm_odm,
 			RA,
 			p_beamform_entry,
-			p_buf->buffer.virtual_address,
-			&p_tcb->packet_length
+			p_buf->Buffer.VirtualAddress,
+			&p_tcb->PacketLength
 		);
 
 		p_tcb->bw_of_packet = CHANNEL_WIDTH_20;
 		data_rate = MGN_6M;
-		mgnt_send_packet(adapter, p_tcb, p_buf, p_tcb->packet_length, NORMAL_QUEUE, data_rate);
+		MgntSendPacket(adapter, p_tcb, p_buf, p_tcb->PacketLength, NORMAL_QUEUE, data_rate);
 	} else
 		ret = false;
 
-	platform_release_spin_lock(adapter, RT_TX_SPINLOCK);
+	PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK);
 
 	if (ret)
-		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->buffer.virtual_address, p_tcb->packet_length);
+		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, p_tcb->PacketLength);
 
 	return ret;
 }
@@ -674,7 +688,7 @@ construct_vht_bf_report_poll(
 
 	/* Frame control*/
 	SET_80211_HDR_FRAME_CONTROL(p_bf_rpt_poll, 0);
-	SET_80211_HDR_TYPE_AND_SUBTYPE(p_bf_rpt_poll, type_beamforming_report_poll);
+	SET_80211_HDR_TYPE_AND_SUBTYPE(p_bf_rpt_poll, Type_Beamforming_Report_Poll);
 
 	/* duration*/
 	SET_80211_HDR_DURATION(p_bf_rpt_poll, 100);
@@ -683,7 +697,7 @@ construct_vht_bf_report_poll(
 	SET_VHT_BF_REPORT_POLL_RA(p_bf_rpt_poll, RA);
 
 	/* TA*/
-	SET_VHT_BF_REPORT_POLL_TA(p_bf_rpt_poll, adapter->current_address);
+	SET_VHT_BF_REPORT_POLL_TA(p_bf_rpt_poll, adapter->CurrentAddress);
 
 	/* Feedback Segment Retransmission Bitmap*/
 	SET_VHT_BF_REPORT_POLL_FEEDBACK_SEG_RETRAN_BITMAP(p_bf_rpt_poll, 0xFF);
@@ -694,17 +708,17 @@ construct_vht_bf_report_poll(
 
 }
 
-bool
+boolean
 send_sw_vht_bf_report_poll(
 	void			*p_dm_void,
 	u8			*RA,
-	bool			is_final_poll
+	boolean			is_final_poll
 )
 {
 	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	PRT_TCB					p_tcb;
 	PRT_TX_LOCAL_BUFFER		p_buf;
-	bool					ret = true;
+	boolean					ret = true;
 	u8					idx = 0, data_rate = 0;
 	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm_odm->beamforming_info);
 	struct _RT_BEAMFORMEE_ENTRY	*p_beamform_entry = phydm_beamforming_get_bfee_entry_by_addr(p_dm_odm, RA, &idx);
@@ -712,33 +726,33 @@ send_sw_vht_bf_report_poll(
 
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
 
-	platform_acquire_spin_lock(adapter, RT_TX_SPINLOCK);
+	PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK);
 
-	if (mgnt_get_buffer(adapter, &p_tcb, &p_buf)) {
+	if (MgntGetBuffer(adapter, &p_tcb, &p_buf)) {
 		construct_vht_bf_report_poll(
 			p_dm_odm,
 			RA,
-			p_buf->buffer.virtual_address,
-			&p_tcb->packet_length
+			p_buf->Buffer.VirtualAddress,
+			&p_tcb->PacketLength
 		);
 
-		p_tcb->is_tx_enable_sw_calc_dur = true; /* <tynli_note> need?*/
-		p_tcb->bw_of_packet = CHANNEL_WIDTH_20;
+		p_tcb->bTxEnableSwCalcDur = true; /* <tynli_note> need?*/
+		p_tcb->BWOfPacket = CHANNEL_WIDTH_20;
 
 		if (is_final_poll)
-			p_tcb->tx_bf_pkt_type = RT_BF_PKT_TYPE_FINAL_BF_REPORT_POLL;
+			p_tcb->TxBFPktType = RT_BF_PKT_TYPE_FINAL_BF_REPORT_POLL;
 		else
-			p_tcb->tx_bf_pkt_type = RT_BF_PKT_TYPE_BF_REPORT_POLL;
+			p_tcb->TxBFPktType = RT_BF_PKT_TYPE_BF_REPORT_POLL;
 
 		data_rate = MGN_6M;	/* Legacy OFDM rate*/
-		mgnt_send_packet(adapter, p_tcb, p_buf, p_tcb->packet_length, NORMAL_QUEUE, data_rate);
+		MgntSendPacket(adapter, p_tcb, p_buf, p_tcb->PacketLength, NORMAL_QUEUE, data_rate);
 	} else
 		ret = false;
 
-	platform_release_spin_lock(adapter, RT_TX_SPINLOCK);
+	PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK);
 
 	if (ret)
-		RT_DISP_DATA(FBEAM, FBEAM_DATA, "send_sw_vht_bf_report_poll():\n", p_buf->buffer.virtual_address, p_tcb->packet_length);
+		RT_DISP_DATA(FBEAM, FBEAM_DATA, "send_sw_vht_bf_report_poll():\n", p_buf->Buffer.VirtualAddress, p_tcb->PacketLength);
 
 	return ret;
 
@@ -783,14 +797,14 @@ construct_vht_mu_ndpa_packet(
 
 	/* Frame control.*/
 	SET_80211_HDR_FRAME_CONTROL(p_ndpa_frame, 0);
-	SET_80211_HDR_TYPE_AND_SUBTYPE(p_ndpa_frame, type_ndpa);
+	SET_80211_HDR_TYPE_AND_SUBTYPE(p_ndpa_frame, Type_NDPA);
 
 	SET_80211_HDR_ADDRESS1(p_ndpa_frame, dest_addr);
 	SET_80211_HDR_ADDRESS2(p_ndpa_frame, p_entry->my_mac_addr);
 
 	/*--------------------------------------------*/
 	/* <Note> Need to modify "duration" to MU consideration. */
-	duration = 2 * a_sifs_time + 44;
+	duration = 2 * a_SifsTime + 44;
 
 	if (BW == CHANNEL_WIDTH_80)
 		duration += 40;
@@ -811,7 +825,7 @@ construct_vht_mu_ndpa_packet(
 	for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
 		p_entry = &(p_beam_info->beamformee_entry[idx]);
 		if (p_entry->is_mu_sta) {
-			sta_info.AID = p_entry->AID;
+			sta_info.aid = p_entry->AID;
 			sta_info.feedback_type = 1; /* 1'b1: MU*/
 			sta_info.nc_index = 0;
 
@@ -824,7 +838,7 @@ construct_vht_mu_ndpa_packet(
 
 }
 
-bool
+boolean
 send_sw_vht_mu_ndpa_packet(
 	void			*p_dm_void,
 	CHANNEL_WIDTH	BW
@@ -833,7 +847,7 @@ send_sw_vht_mu_ndpa_packet(
 	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	PRT_TCB					p_tcb;
 	PRT_TX_LOCAL_BUFFER		p_buf;
-	bool					ret = true;
+	boolean					ret = true;
 	u8					ndp_tx_rate = 0;
 	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm_odm->beamforming_info);
 	struct _ADAPTER				*adapter = p_beam_info->source_adapter;
@@ -841,29 +855,29 @@ send_sw_vht_mu_ndpa_packet(
 	ndp_tx_rate = MGN_VHT2SS_MCS0;
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate));
 
-	platform_acquire_spin_lock(adapter, RT_TX_SPINLOCK);
+	PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK);
 
-	if (mgnt_get_buffer(adapter, &p_tcb, &p_buf)) {
+	if (MgntGetBuffer(adapter, &p_tcb, &p_buf)) {
 		construct_vht_mu_ndpa_packet(
 			p_dm_odm,
 			BW,
-			p_buf->buffer.virtual_address,
-			&p_tcb->packet_length
+			p_buf->Buffer.VirtualAddress,
+			&p_tcb->PacketLength
 		);
 
-		p_tcb->is_tx_enable_sw_calc_dur = true;
-		p_tcb->bw_of_packet = BW;
-		p_tcb->tx_bf_pkt_type = RT_BF_PKT_TYPE_BROADCAST_NDPA;
+		p_tcb->bTxEnableSwCalcDur = true;
+		p_tcb->BWOfPacket = BW;
+		p_tcb->TxBFPktType = RT_BF_PKT_TYPE_BROADCAST_NDPA;
 
 		/*rate of NDP decide by nr*/
-		mgnt_send_packet(adapter, p_tcb, p_buf, p_tcb->packet_length, NORMAL_QUEUE, ndp_tx_rate);
+		MgntSendPacket(adapter, p_tcb, p_buf, p_tcb->PacketLength, NORMAL_QUEUE, ndp_tx_rate);
 	} else
 		ret = false;
 
-	platform_release_spin_lock(adapter, RT_TX_SPINLOCK);
+	PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK);
 
 	if (ret)
-		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->buffer.virtual_address, p_tcb->packet_length);
+		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, p_tcb->PacketLength);
 
 	return ret;
 }
@@ -887,7 +901,7 @@ dbg_construct_vht_mundpa_packet(
 	u8					dest_addr[6] = {0};
 	struct _RT_BEAMFORMEE_ENTRY	*p_entry = NULL;
 
-	bool	is_STA1 = false;
+	boolean	is_STA1 = false;
 
 
 	/* Fill the first MU BFee entry (STA1) MAC addr to destination address then
@@ -907,14 +921,14 @@ dbg_construct_vht_mundpa_packet(
 
 	/* Frame control.*/
 	SET_80211_HDR_FRAME_CONTROL(p_ndpa_frame, 0);
-	SET_80211_HDR_TYPE_AND_SUBTYPE(p_ndpa_frame, type_ndpa);
+	SET_80211_HDR_TYPE_AND_SUBTYPE(p_ndpa_frame, Type_NDPA);
 
 	SET_80211_HDR_ADDRESS1(p_ndpa_frame, dest_addr);
-	SET_80211_HDR_ADDRESS2(p_ndpa_frame, p_dm_odm->current_address);
+	SET_80211_HDR_ADDRESS2(p_ndpa_frame, p_dm_odm->CurrentAddress);
 
 	/*--------------------------------------------*/
 	/* <Note> Need to modify "duration" to MU consideration. */
-	duration = 2 * a_sifs_time + 44;
+	duration = 2 * a_SifsTime + 44;
 
 	if (BW == CHANNEL_WIDTH_80)
 		duration += 40;
@@ -932,18 +946,18 @@ dbg_construct_vht_mundpa_packet(
 	*p_length = 17;
 
 	/*STA2's STA Info*/
-	sta_info.AID = p_entry->AID;
+	sta_info.aid = p_entry->aid;
 	sta_info.feedback_type = 1; /* 1'b1: MU */
 	sta_info.nc_index = 0;
 
-	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Get beamformee_entry idx(%d), AID =%d\n", __func__, idx, p_entry->AID));
+	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Get beamformee_entry idx(%d), AID =%d\n", __func__, idx, p_entry->aid));
 
 	odm_move_memory(p_dm_odm, p_ndpa_frame + (*p_length), (u8 *)&sta_info, 2);
 	*p_length += 2;
 
 }
 
-bool
+boolean
 dbg_send_sw_vht_mundpa_packet(
 	void			*p_dm_void,
 	CHANNEL_WIDTH	BW
@@ -952,7 +966,7 @@ dbg_send_sw_vht_mundpa_packet(
 	struct PHY_DM_STRUCT				*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	PRT_TCB					p_tcb;
 	PRT_TX_LOCAL_BUFFER		p_buf;
-	bool					ret = true;
+	boolean					ret = true;
 	u8					ndp_tx_rate = 0;
 	struct _RT_BEAMFORMING_INFO	*p_beam_info = &(p_dm_odm->beamforming_info);
 	struct _ADAPTER				*adapter = p_beam_info->source_adapter;
@@ -960,29 +974,29 @@ dbg_send_sw_vht_mundpa_packet(
 	ndp_tx_rate = MGN_VHT2SS_MCS0;
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] ndp_tx_rate =%d\n", __func__, ndp_tx_rate));
 
-	platform_acquire_spin_lock(adapter, RT_TX_SPINLOCK);
+	PlatformAcquireSpinLock(adapter, RT_TX_SPINLOCK);
 
-	if (mgnt_get_buffer(adapter, &p_tcb, &p_buf)) {
+	if (MgntGetBuffer(adapter, &p_tcb, &p_buf)) {
 		dbg_construct_vht_mundpa_packet(
 			p_dm_odm,
 			BW,
-			p_buf->buffer.virtual_address,
-			&p_tcb->packet_length
+			p_buf->Buffer.VirtualAddress,
+			&p_tcb->PacketLength
 		);
 
-		p_tcb->is_tx_enable_sw_calc_dur = true;
-		p_tcb->bw_of_packet = BW;
-		p_tcb->tx_bf_pkt_type = RT_BF_PKT_TYPE_UNICAST_NDPA;
+		p_tcb->bTxEnableSwCalcDur = true;
+		p_tcb->BWOfPacket = BW;
+		p_tcb->TxBFPktType = RT_BF_PKT_TYPE_UNICAST_NDPA;
 
 		/*rate of NDP decide by nr*/
-		mgnt_send_packet(adapter, p_tcb, p_buf, p_tcb->packet_length, NORMAL_QUEUE, ndp_tx_rate);
+		MgntSendPacket(adapter, p_tcb, p_buf, p_tcb->PacketLength, NORMAL_QUEUE, ndp_tx_rate);
 	} else
 		ret = false;
 
-	platform_release_spin_lock(adapter, RT_TX_SPINLOCK);
+	PlatformReleaseSpinLock(adapter, RT_TX_SPINLOCK);
 
 	if (ret)
-		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->buffer.virtual_address, p_tcb->packet_length);
+		RT_DISP_DATA(FBEAM, FBEAM_DATA, "", p_buf->Buffer.VirtualAddress, p_tcb->PacketLength);
 
 	return ret;
 }
@@ -1024,7 +1038,7 @@ beamforming_get_report_frame(
 }
 
 
-bool
+boolean
 send_fw_ht_ndpa_packet(
 	void			*p_dm_void,
 	u8			*RA,
@@ -1112,7 +1126,7 @@ send_fw_ht_ndpa_packet(
 }
 
 
-bool
+boolean
 send_sw_ht_ndpa_packet(
 	void			*p_dm_void,
 	u8			*RA,
@@ -1199,7 +1213,7 @@ send_sw_ht_ndpa_packet(
 }
 
 
-bool
+boolean
 send_fw_vht_ndpa_packet(
 	void			*p_dm_void,
 	u8			*RA,
@@ -1284,7 +1298,7 @@ send_fw_vht_ndpa_packet(
 	if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE))
 		AID = 0;
 
-	sta_info.AID = AID;
+	sta_info.aid = AID;
 	sta_info.feedback_type = 0;
 	sta_info.nc_index = 0;
 
@@ -1301,7 +1315,7 @@ send_fw_vht_ndpa_packet(
 
 
 
-bool
+boolean
 send_sw_vht_ndpa_packet(
 	void			*p_dm_void,
 	u8			*RA,
@@ -1385,7 +1399,7 @@ send_sw_vht_ndpa_packet(
 	if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE))
 		AID = 0;
 
-	ndpa_sta_info.AID = AID;
+	ndpa_sta_info.aid = AID;
 	ndpa_sta_info.feedback_type = 0;
 	ndpa_sta_info.nc_index = 0;
 
@@ -1420,7 +1434,7 @@ beamforming_get_ndpa_frame(
 	u8						*TA ;
 	u8						idx, sequence;
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	u8						*p_ndpa_frame = pdu_os.octet;
+	u8						*p_ndpa_frame = pdu_os.Octet;
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	u8						*p_ndpa_frame = precv_frame->u.hdr.rx_data;
 #endif
@@ -1428,8 +1442,8 @@ beamforming_get_ndpa_frame(
 
 
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	RT_DISP_DATA(FBEAM, FBEAM_DATA, "beamforming_get_ndpa_frame\n", pdu_os.octet, pdu_os.length);
-	if (is_ctrl_ndpa(p_ndpa_frame) == false)
+	RT_DISP_DATA(FBEAM, FBEAM_DATA, "beamforming_get_ndpa_frame\n", pdu_os.Octet, pdu_os.Length);
+	if (IsCtrlNDPA(p_ndpa_frame) == false)
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	if (get_frame_sub_type(p_ndpa_frame) != WIFI_NDPA)
 #endif
@@ -1439,7 +1453,7 @@ beamforming_get_ndpa_frame(
 		return;
 	}
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
-	TA = frame_addr2(pdu_os);
+	TA = Frame_Addr2(pdu_os);
 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 	TA = get_addr2_ptr(p_ndpa_frame);
 #endif
diff --git a/rtl8822BU/hal/phydm/txbf/haltxbfinterface.h b/rtl8822BU/hal/phydm/txbf/haltxbfinterface.h
index d3c4d28..fcaae54 100755..100644
--- a/rtl8822BU/hal/phydm/txbf/haltxbfinterface.h
+++ b/rtl8822BU/hal/phydm/txbf/haltxbfinterface.h
@@ -1,8 +1,25 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef __HAL_TXBF_INTERFACE_H__
 #define __HAL_TXBF_INTERFACE_H__
 
 #if (BEAMFORMING_SUPPORT == 1)
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
+
+#define a_SifsTime					((IS_WIRELESS_MODE_5G(adapter)|| IS_WIRELESS_MODE_N_24G(adapter))? 16 : 10)
+
 void
 beamforming_gid_paid(
 	struct _ADAPTER	*adapter,
@@ -22,14 +39,14 @@ beamforming_get_ndpa_frame(
 	OCTET_STRING	pdu_os
 );
 
-bool
+boolean
 send_fw_ht_ndpa_packet(
 	void			*p_dm_void,
 	u8			*RA,
 	CHANNEL_WIDTH	BW
 );
 
-bool
+boolean
 send_fw_vht_ndpa_packet(
 	void			*p_dm_void,
 	u8			*RA,
@@ -37,7 +54,7 @@ send_fw_vht_ndpa_packet(
 	CHANNEL_WIDTH	BW
 );
 
-bool
+boolean
 send_sw_vht_ndpa_packet(
 	void			*p_dm_void,
 	u8			*RA,
@@ -45,7 +62,7 @@ send_sw_vht_ndpa_packet(
 	CHANNEL_WIDTH	BW
 );
 
-bool
+boolean
 send_sw_ht_ndpa_packet(
 	void			*p_dm_void,
 	u8			*RA,
@@ -60,21 +77,21 @@ beamforming_get_vht_gid_mgnt_frame(
 	POCTET_STRING	p_pdu_os
 );
 
-bool
+boolean
 send_sw_vht_gid_mgnt_frame(
 	void			*p_dm_void,
 	u8			*RA,
 	u8			idx
 );
 
-bool
+boolean
 send_sw_vht_bf_report_poll(
 	void			*p_dm_void,
 	u8			*RA,
-	bool			is_final_poll
+	boolean			is_final_poll
 );
 
-bool
+boolean
 send_sw_vht_mu_ndpa_packet(
 	void			*p_dm_void,
 	CHANNEL_WIDTH	BW
@@ -95,21 +112,21 @@ beamforming_get_report_frame(
 	union recv_frame *precv_frame
 );
 
-bool
+boolean
 send_fw_ht_ndpa_packet(
 	void			*p_dm_void,
 	u8			*RA,
 	CHANNEL_WIDTH	BW
 );
 
-bool
+boolean
 send_sw_ht_ndpa_packet(
 	void			*p_dm_void,
 	u8			*RA,
 	CHANNEL_WIDTH	BW
 );
 
-bool
+boolean
 send_fw_vht_ndpa_packet(
 	void			*p_dm_void,
 	u8			*RA,
@@ -117,7 +134,7 @@ send_fw_vht_ndpa_packet(
 	CHANNEL_WIDTH	BW
 );
 
-bool
+boolean
 send_sw_vht_ndpa_packet(
 	void			*p_dm_void,
 	u8			*RA,
@@ -136,7 +153,7 @@ beamforming_get_ndpa_frame(
 #endif
 );
 
-bool
+boolean
 dbg_send_sw_vht_mundpa_packet(
 	void			*p_dm_void,
 	CHANNEL_WIDTH	BW
diff --git a/rtl8822BU/hal/phydm/txbf/haltxbfjaguar.c b/rtl8822BU/hal/phydm/txbf/haltxbfjaguar.c
index b0d31aa..4525771 100755..100644
--- a/rtl8822BU/hal/phydm/txbf/haltxbfjaguar.c
+++ b/rtl8822BU/hal/phydm/txbf/haltxbfjaguar.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 /* ************************************************************
  * Description:
  *
@@ -77,7 +91,7 @@ hal_txbf_jaguar_download_ndpa(
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	u8			u1b_tmp = 0, tmp_reg422 = 0, head_page;
 	u8			bcn_valid_reg = 0, count = 0, dl_bcn_count = 0;
-	bool			is_send_beacon = false;
+	boolean			is_send_beacon = false;
 	u8			tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812;	/*default reseved 1 page for the IC type which is undefined.*/
 	struct _RT_BEAMFORMING_INFO	*p_beam_info = &p_dm_odm->beamforming_info;
 	struct _RT_BEAMFORMEE_ENTRY	*p_beam_entry = p_beam_info->beamformee_entry + idx;
@@ -92,7 +106,7 @@ hal_txbf_jaguar_download_ndpa(
 	else
 		head_page = 0xFE;
 
-	adapter->hal_func.get_hal_def_var_handler(adapter, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&tx_page_bndy);
+	phydm_get_hal_def_var_handler_interface(p_dm_odm, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&tx_page_bndy);
 
 	/*Set REG_CR bit 8. DMA beacon by SW.*/
 	u1b_tmp = odm_read_1byte(p_dm_odm, REG_CR_8812A + 1);
@@ -118,7 +132,7 @@ hal_txbf_jaguar_download_ndpa(
 
 		/*download NDPA rsvd page.*/
 		if (p_beam_entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU)
-			beamforming_send_vht_ndpa_packet(p_dm_odm, p_beam_entry->mac_addr, p_beam_entry->AID, p_beam_entry->sound_bw, BEACON_QUEUE);
+			beamforming_send_vht_ndpa_packet(p_dm_odm, p_beam_entry->mac_addr, p_beam_entry->aid, p_beam_entry->sound_bw, BEACON_QUEUE);
 		else
 			beamforming_send_ht_ndpa_packet(p_dm_odm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE);
 
@@ -271,7 +285,7 @@ hal_txbf_jaguar_enter(
 		if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss))
 			sta_id = beamformee_entry.mac_id;
 		else
-			sta_id = beamformee_entry.P_AID;
+			sta_id = beamformee_entry.p_aid;
 
 		/*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/
 		if (bfee_idx == 0) {
@@ -365,7 +379,7 @@ hal_txbf_jaguar_status(
 	if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss))
 		beam_ctrl_val = beamform_entry.mac_id;
 	else
-		beam_ctrl_val = beamform_entry.P_AID;
+		beam_ctrl_val = beamform_entry.p_aid;
 
 	if (idx == 0)
 		beam_ctrl_reg = REG_TXBF_CTRL_8812A;
@@ -455,7 +469,7 @@ hal_txbf_jaguar_clk_8812a(
 	/*Stop Usb TxDMA*/
 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 	RT_DISABLE_FUNC(adapter, DF_TX_BIT);
-	platform_return_all_pending_tx_packets(adapter);
+	PlatformReturnAllPendingTxPackets(adapter);
 #else
 	rtw_write_port_cancel(adapter);
 #endif
diff --git a/rtl8822BU/hal/phydm/txbf/haltxbfjaguar.h b/rtl8822BU/hal/phydm/txbf/haltxbfjaguar.h
index 7c7f73e..4b1b320 100755..100644
--- a/rtl8822BU/hal/phydm/txbf/haltxbfjaguar.h
+++ b/rtl8822BU/hal/phydm/txbf/haltxbfjaguar.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef __HAL_TXBF_JAGUAR_H__
 #define __HAL_TXBF_JAGUAR_H__
 #if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
diff --git a/rtl8822BU/hal/phydm/txbf/phydm_hal_txbf_api.c b/rtl8822BU/hal/phydm/txbf/phydm_hal_txbf_api.c
index 317204d..eed3487 100755..100644
--- a/rtl8822BU/hal/phydm/txbf/phydm_hal_txbf_api.c
+++ b/rtl8822BU/hal/phydm/txbf/phydm_hal_txbf_api.c
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
diff --git a/rtl8822BU/hal/phydm/txbf/phydm_hal_txbf_api.h b/rtl8822BU/hal/phydm/txbf/phydm_hal_txbf_api.h
index 93fb784..3dd0bb3 100755..100644
--- a/rtl8822BU/hal/phydm/txbf/phydm_hal_txbf_api.h
+++ b/rtl8822BU/hal/phydm/txbf/phydm_hal_txbf_api.h
@@ -1,21 +1,18 @@
-/********************************************************************************/
-/**/
-/*Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.*/
-/**/
-/*This program is free software; you can redistribute it and/or modify it*/
-/*under the terms of version 2 of the GNU General Public License as*/
-/*published by the Free Software Foundation.*/
-/**/
-/*This program is distributed in the hope that it will be useful, but WITHOUT*/
-/*ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or*/
-/*FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for*/
-/*more details.*/
-/*You should have received a copy of the GNU General Public License along with*/
-/*this program; if not, write to the Free Software Foundation, Inc.,*/
-/*51 Franklin Street, Fifth Floor, Boston, MA 02110, USA*/
-/**/
-/**/
-/********************************************************************************/
+/******************************************************************************
+ *
+ * Copyright(c) 2011 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+
 #ifndef	__PHYDM_HAL_TXBF_API_H__
 #define __PHYDM_HAL_TXBF_API_H__
 
diff --git a/rtl8822BU/hal/rtl8822b/hal8822b_fw.c b/rtl8822BU/hal/rtl8822b/hal8822b_fw.c
index 0ffad85..f935d13 100755..100644
--- a/rtl8822BU/hal/rtl8822b/hal8822b_fw.c
+++ b/rtl8822BU/hal/rtl8822b/hal8822b_fw.c
@@ -1,3 +1,18 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+
 #ifdef CONFIG_RTL8822B
 
 #include "drv_types.h"
@@ -7,13 +22,13 @@
 #if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP)))
 
 u8 array_mp_8822b_fw_ap[] = {
-0x22, 0x88, 0x00, 0x00, 0x08, 0x00, 0x01, 0x00,
-0x10, 0x3C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x0A, 0x05, 0x11, 0x22, 0xE0, 0x07, 0x00, 0x00,
-0x08, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x20, 0x80, 0x90, 0x2A, 0x00, 0x00,
+0x22, 0x88, 0x00, 0x00, 0x0D, 0x00, 0x01, 0x00,
+0x67, 0x47, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x03, 0x0D, 0x0F, 0x28, 0xE1, 0x07, 0x00, 0x00,
+0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x20, 0x80, 0xC8, 0x28, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0xD0, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x48, 0x15, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x10, 0x12, 0x80, 0x00, 0x00, 0x00, 0x80,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -24,11 +39,11 @@ u8 array_mp_8822b_fw_ap[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0xA1, 0x2E, 0x00, 0x80, 0xA5, 0x06, 0x00, 0x80,
+0x9D, 0x29, 0x00, 0x80, 0xE9, 0x06, 0x00, 0x80,
 0x03, 0x02, 0x01, 0xFE, 0x03, 0x03, 0x01, 0xFE,
 0x03, 0x04, 0x01, 0xFE, 0x03, 0x05, 0x01, 0xFE,
 0x03, 0x06, 0x01, 0xFE, 0x03, 0x07, 0x01, 0xFE,
-0x41, 0x4B, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00,
+0x61, 0x50, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -36,7 +51,7 @@ u8 array_mp_8822b_fw_ap[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x29, 0x4C, 0x00, 0x80, 0x01, 0x00, 0x00, 0x00,
+0x75, 0x51, 0x00, 0x80, 0x01, 0x00, 0x00, 0x00,
 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -44,335 +59,287 @@ u8 array_mp_8822b_fw_ap[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x90, 0x2A, 0x20, 0x80, 0xA1, 0x4C, 0x00, 0x80,
-0x03, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x98, 0x2A, 0x20, 0x80,
-0x41, 0x4E, 0x59, 0x00, 0x61, 0x6E, 0x79, 0x00,
-0x81, 0x00, 0x88, 0x00, 0x90, 0x00, 0x99, 0x00,
-0xA2, 0x00, 0xAC, 0x00, 0xB6, 0x00, 0xC0, 0x00,
-0xCC, 0x00, 0xD8, 0x00, 0xE5, 0x00, 0xF2, 0x00,
-0x01, 0x01, 0x10, 0x01, 0x20, 0x01, 0x31, 0x01,
-0x43, 0x01, 0x56, 0x01, 0x6A, 0x01, 0x80, 0x01,
-0x97, 0x01, 0xAF, 0x01, 0xC8, 0x01, 0xE3, 0x01,
-0x00, 0x02, 0x1E, 0x02, 0x3E, 0x02, 0x61, 0x02,
-0x85, 0x02, 0xAB, 0x02, 0xD3, 0x02, 0xFE, 0x02,
-0x2B, 0x03, 0x5C, 0x03, 0x8E, 0x03, 0xC4, 0x03,
-0xFE, 0x03, 0x00, 0x00, 0x22, 0x05, 0x50, 0x05,
-0x51, 0x05, 0x00, 0x00, 0x08, 0x08, 0x0C, 0x09,
-0x00, 0x0C, 0xB0, 0x0C, 0xB4, 0x0C, 0xBC, 0x0C,
-0x00, 0x0E, 0xB0, 0x0E, 0xB4, 0x0E, 0xBC, 0x0E,
-0x90, 0x19, 0xA4, 0x09, 0x04, 0x0A, 0x00, 0x00,
-0xDF, 0x8F, 0x65, 0x00, 0x01, 0x00, 0x00, 0x00,
-0x03, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00,
+0xC8, 0x28, 0x20, 0x80, 0x41, 0x4E, 0x59, 0x00,
+0x61, 0x6E, 0x79, 0x00, 0x81, 0x00, 0x88, 0x00,
+0x90, 0x00, 0x99, 0x00, 0xA2, 0x00, 0xAC, 0x00,
+0xB6, 0x00, 0xC0, 0x00, 0xCC, 0x00, 0xD8, 0x00,
+0xE5, 0x00, 0xF2, 0x00, 0x01, 0x01, 0x10, 0x01,
+0x20, 0x01, 0x31, 0x01, 0x43, 0x01, 0x56, 0x01,
+0x6A, 0x01, 0x80, 0x01, 0x97, 0x01, 0xAF, 0x01,
+0xC8, 0x01, 0xE3, 0x01, 0x00, 0x02, 0x1E, 0x02,
+0x3E, 0x02, 0x61, 0x02, 0x85, 0x02, 0xAB, 0x02,
+0xD3, 0x02, 0xFE, 0x02, 0x2B, 0x03, 0x5C, 0x03,
+0x8E, 0x03, 0xC4, 0x03, 0xFE, 0x03, 0x00, 0x00,
+0x22, 0x05, 0x50, 0x05, 0x51, 0x05, 0x00, 0x00,
+0x08, 0x08, 0x0C, 0x09, 0x00, 0x0C, 0xB0, 0x0C,
+0xB4, 0x0C, 0xBC, 0x0C, 0x00, 0x0E, 0xB0, 0x0E,
+0xB4, 0x0E, 0xBC, 0x0E, 0x90, 0x19, 0xA4, 0x09,
+0x04, 0x0A, 0x00, 0x0B, 0xDF, 0x8F, 0x65, 0x00,
+0x01, 0x00, 0x00, 0x00, 0x2C, 0x00, 0x04, 0x00,
+0x2D, 0x00, 0x2C, 0x01, 0x2D, 0x01, 0x2C, 0x02,
+0x2E, 0x01, 0xFF, 0x00, 0x2D, 0x02, 0xFF, 0x00,
+0x03, 0x00, 0x00, 0x00, 0x10, 0x70, 0xC9, 0x75,
+0x10, 0x70, 0xC9, 0x75, 0x10, 0x70, 0xC9, 0x75,
+0x10, 0x70, 0xC9, 0x75, 0x2A, 0xEA, 0xA0, 0x79,
+0x2C, 0xEA, 0xA0, 0x79, 0x2A, 0xEA, 0xA0, 0x79,
+0x2A, 0xEA, 0xA0, 0x79, 0x41, 0x55, 0x76, 0x87,
+0x41, 0x63, 0x74, 0x87, 0x41, 0x55, 0x76, 0x87,
+0x41, 0x63, 0x74, 0x87, 0x10, 0x60, 0xB8, 0x75,
+0x10, 0x60, 0xB7, 0x75, 0x10, 0x60, 0xB8, 0x75,
+0x10, 0x60, 0xB7, 0x75, 0x28, 0xEA, 0xA0, 0x79,
+0x2C, 0xEA, 0xA0, 0x79, 0x28, 0xEA, 0xA0, 0x79,
+0x2A, 0xEA, 0xA0, 0x79, 0x51, 0x64, 0x76, 0x87,
+0x31, 0x64, 0x76, 0x87, 0x51, 0x64, 0x76, 0x87,
+0x31, 0x64, 0x76, 0x87, 0x10, 0x70, 0xC9, 0x75,
+0x10, 0x70, 0xC9, 0x75, 0x10, 0x70, 0xC9, 0x75,
+0x10, 0x70, 0xC9, 0x75, 0x2A, 0xEA, 0xA0, 0x79,
+0x2C, 0xEA, 0xA0, 0x97, 0x2A, 0xEA, 0xA0, 0x79,
+0x2A, 0xEA, 0xA0, 0x79, 0x41, 0x55, 0x76, 0x87,
+0x41, 0x63, 0x66, 0x86, 0x61, 0x55, 0x76, 0x87,
+0x61, 0x63, 0x66, 0x86, 0x06, 0x00, 0x00, 0x00,
 0x05, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
-0x40, 0x00, 0x00, 0x00, 0x10, 0x00, 0x40, 0x00,
-0xC7, 0x43, 0x00, 0x80, 0x07, 0x44, 0x00, 0x80,
-0x63, 0x44, 0x00, 0x80, 0xBD, 0x44, 0x00, 0x80,
-0x17, 0x45, 0x00, 0x80, 0x41, 0x4A, 0x00, 0x80,
-0x3B, 0x4A, 0x00, 0x80, 0x47, 0x4A, 0x00, 0x80,
-0x4D, 0x4A, 0x00, 0x80, 0x53, 0x4A, 0x00, 0x80,
-0x59, 0x4A, 0x00, 0x80, 0x87, 0x91, 0x00, 0x80,
-0x91, 0x91, 0x00, 0x80, 0x9F, 0x91, 0x00, 0x80,
-0xC7, 0x91, 0x00, 0x80, 0x03, 0x92, 0x00, 0x80,
-0x07, 0x92, 0x00, 0x80, 0x94, 0x0C, 0x94, 0x0E,
-0x94, 0x18, 0x94, 0x1A, 0xA5, 0xA2, 0x00, 0x80,
-0xE5, 0xA2, 0x00, 0x80, 0xAD, 0xA2, 0x00, 0x80,
-0xDD, 0xA2, 0x00, 0x80, 0xEB, 0xA2, 0x00, 0x80,
-0xEB, 0xA2, 0x00, 0x80, 0xB5, 0xA2, 0x00, 0x80,
-0xBD, 0xA2, 0x00, 0x80, 0xC5, 0xA2, 0x00, 0x80,
-0xCD, 0xA2, 0x00, 0x80, 0xD5, 0xA2, 0x00, 0x80,
+0x40, 0x00, 0x00, 0x00, 0x40, 0x00, 0x40, 0x00,
+0x67, 0x3E, 0x00, 0x80, 0xC3, 0x3E, 0x00, 0x80,
+0x57, 0x3F, 0x00, 0x80, 0xEB, 0x3F, 0x00, 0x80,
+0x83, 0x40, 0x00, 0x80, 0x61, 0x4F, 0x00, 0x80,
+0x5B, 0x4F, 0x00, 0x80, 0x67, 0x4F, 0x00, 0x80,
+0x6D, 0x4F, 0x00, 0x80, 0x73, 0x4F, 0x00, 0x80,
+0x79, 0x4F, 0x00, 0x80, 0x57, 0x9E, 0x00, 0x80,
+0x61, 0x9E, 0x00, 0x80, 0x6F, 0x9E, 0x00, 0x80,
+0xA1, 0x9E, 0x00, 0x80, 0xE7, 0x9E, 0x00, 0x80,
+0xFF, 0x9E, 0x00, 0x80, 0x94, 0x0C, 0x94, 0x0E,
+0x94, 0x18, 0x94, 0x1A, 0x09, 0x12, 0x1B, 0x24,
+0x39, 0xB1, 0x00, 0x80, 0x85, 0xB1, 0x00, 0x80,
+0x41, 0xB1, 0x00, 0x80, 0x77, 0xB1, 0x00, 0x80,
+0x85, 0xB1, 0x00, 0x80, 0x85, 0xB1, 0x00, 0x80,
+0x49, 0xB1, 0x00, 0x80, 0x51, 0xB1, 0x00, 0x80,
+0x59, 0xB1, 0x00, 0x80, 0x61, 0xB1, 0x00, 0x80,
+0x69, 0xB1, 0x00, 0x80, 0x71, 0xB1, 0x00, 0x80,
+0x7F, 0xB1, 0x00, 0x80, 0x02, 0x04, 0x06, 0x08,
+0x0A, 0x01, 0x0C, 0x0E, 0x10, 0x12, 0x03, 0x0B,
+0x14, 0x16, 0x18, 0x05, 0x0D, 0x13, 0x1A, 0x1C,
+0x07, 0x0F, 0x15, 0x19, 0x1E, 0x09, 0x11, 0x17,
+0x1B, 0x1D, 0x00, 0x00, 0x01, 0x03, 0x05, 0x07,
+0x09, 0x02, 0x0B, 0x0D, 0x0F, 0x11, 0x04, 0x0C,
+0x13, 0x15, 0x17, 0x06, 0x0E, 0x14, 0x19, 0x1B,
+0x08, 0x10, 0x16, 0x1A, 0x1D, 0x0A, 0x12, 0x18,
+0x1C, 0x1E, 0x00, 0x00, 0x04, 0x08, 0x08, 0x08,
+0x08, 0x08, 0x0A, 0x0A, 0x0A, 0x00, 0x00, 0x00,
+0x00, 0x04, 0x0C, 0x14, 0x1C, 0x24, 0x2C, 0x36,
+0x40, 0x00, 0x00, 0x00, 0xB5, 0xD5, 0x00, 0x80,
+0xCB, 0xD5, 0x00, 0x80, 0xB5, 0xD5, 0x00, 0x80,
+0xCB, 0xD5, 0x00, 0x80, 0xB5, 0xD5, 0x00, 0x80,
+0xCB, 0xD5, 0x00, 0x80, 0xF5, 0xD5, 0x00, 0x80,
+0xF5, 0xD5, 0x00, 0x80, 0xF5, 0xD5, 0x00, 0x80,
+0xB9, 0xD5, 0x00, 0x80, 0xDD, 0xD5, 0x00, 0x80,
+0xDD, 0xD5, 0x00, 0x80, 0xB9, 0xD5, 0x00, 0x80,
+0x09, 0xD6, 0x00, 0x80, 0x1F, 0xD6, 0x00, 0x80,
 0x02, 0x04, 0x06, 0x08, 0x0A, 0x01, 0x0C, 0x0E,
 0x10, 0x12, 0x03, 0x0B, 0x14, 0x16, 0x18, 0x05,
 0x0D, 0x13, 0x1A, 0x1C, 0x07, 0x0F, 0x15, 0x19,
 0x1E, 0x09, 0x11, 0x17, 0x1B, 0x1D, 0x00, 0x00,
-0x01, 0x03, 0x05, 0x07, 0x09, 0x02, 0x0B, 0x0D,
-0x0F, 0x11, 0x04, 0x0C, 0x13, 0x15, 0x17, 0x06,
-0x0E, 0x14, 0x19, 0x1B, 0x08, 0x10, 0x16, 0x1A,
-0x1D, 0x0A, 0x12, 0x18, 0x1C, 0x1E, 0x00, 0x00,
-0x04, 0x08, 0x08, 0x08, 0x08, 0x08, 0x0A, 0x0A,
-0x0A, 0x00, 0x00, 0x00, 0x00, 0x04, 0x0C, 0x14,
-0x1C, 0x24, 0x2C, 0x36, 0x40, 0x00, 0x00, 0x00,
-0xED, 0xBD, 0x00, 0x80, 0x07, 0xBE, 0x00, 0x80,
-0xED, 0xBD, 0x00, 0x80, 0x07, 0xBE, 0x00, 0x80,
-0xED, 0xBD, 0x00, 0x80, 0x07, 0xBE, 0x00, 0x80,
-0x31, 0xBE, 0x00, 0x80, 0x31, 0xBE, 0x00, 0x80,
-0x31, 0xBE, 0x00, 0x80, 0xF1, 0xBD, 0x00, 0x80,
-0x19, 0xBE, 0x00, 0x80, 0x19, 0xBE, 0x00, 0x80,
-0xF1, 0xBD, 0x00, 0x80, 0x45, 0xBE, 0x00, 0x80,
-0x5D, 0xBE, 0x00, 0x80, 0x01, 0x03, 0x05, 0x07,
-0x09, 0x02, 0x0B, 0x0D, 0x0F, 0x11, 0x04, 0x0C,
-0x13, 0x15, 0x17, 0x06, 0x0E, 0x14, 0x19, 0x1B,
-0x08, 0x10, 0x16, 0x1A, 0x1D, 0x0A, 0x12, 0x18,
-0x1C, 0x1E, 0x00, 0x00, 0x02, 0x04, 0x06, 0x08,
-0x0A, 0x01, 0x0C, 0x0E, 0x10, 0x12, 0x03, 0x0B,
-0x14, 0x16, 0x18, 0x05, 0x0D, 0x13, 0x1A, 0x1C,
-0x07, 0x0F, 0x15, 0x19, 0x1E, 0x09, 0x11, 0x17,
-0x1B, 0x1D, 0x00, 0x00, 0x06, 0x07, 0x08, 0x09,
-0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0E, 0x00, 0x00,
-0x1E, 0x28, 0x1E, 0x14, 0x14, 0x12, 0x0E, 0x0C,
-0x09, 0x08, 0x08, 0x07, 0x15, 0x11, 0x0E, 0x0A,
-0x0A, 0x09, 0x08, 0x07, 0x15, 0x11, 0x0E, 0x0A,
-0x0A, 0x09, 0x08, 0x07, 0x15, 0x11, 0x0E, 0x0A,
-0x0A, 0x09, 0x08, 0x06, 0x0C, 0x0C, 0x0A, 0x0A,
-0x09, 0x07, 0x07, 0x06, 0x15, 0x0E, 0x0E, 0x0A,
-0x0A, 0x09, 0x08, 0x07, 0x07, 0x07, 0x15, 0x11,
-0x0E, 0x0A, 0x0A, 0x09, 0x08, 0x07, 0x07, 0x07,
+0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
+0x0E, 0x0E, 0x00, 0x00, 0x1E, 0x28, 0x1E, 0x14,
+0x14, 0x12, 0x0E, 0x0C, 0x09, 0x08, 0x08, 0x07,
 0x15, 0x11, 0x0E, 0x0A, 0x0A, 0x09, 0x08, 0x07,
-0x07, 0x07, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A,
-0x0A, 0x0A, 0x0A, 0x0A, 0x2D, 0x2D, 0x3C, 0x2D,
-0x2D, 0x23, 0x19, 0x1E, 0x19, 0x1E, 0x19, 0x0F,
-0x30, 0x2A, 0x21, 0x1C, 0x20, 0x1A, 0x0B, 0x10,
-0x30, 0x2A, 0x21, 0x1C, 0x20, 0x1A, 0x0B, 0x10,
-0x30, 0x2A, 0x19, 0x1C, 0x18, 0x14, 0x0F, 0x0D,
-0x1E, 0x1E, 0x19, 0x1E, 0x19, 0x18, 0x0F, 0x0D,
-0x30, 0x21, 0x21, 0x1C, 0x23, 0x1B, 0x0D, 0x10,
-0x0D, 0x0C, 0x30, 0x2A, 0x23, 0x1C, 0x23, 0x1B,
-0x0D, 0x10, 0x0D, 0x0C, 0x30, 0x2A, 0x23, 0x1C,
-0x23, 0x1B, 0x0D, 0x10, 0x0D, 0x0C, 0x0A, 0x0A,
+0x15, 0x11, 0x0E, 0x0A, 0x0A, 0x09, 0x08, 0x07,
+0x15, 0x11, 0x0E, 0x0A, 0x0A, 0x09, 0x08, 0x06,
+0x0C, 0x0C, 0x0A, 0x0A, 0x09, 0x07, 0x07, 0x06,
+0x15, 0x0E, 0x0E, 0x0A, 0x0A, 0x09, 0x08, 0x07,
+0x07, 0x07, 0x15, 0x11, 0x0E, 0x0A, 0x0A, 0x09,
+0x08, 0x07, 0x07, 0x07, 0x15, 0x11, 0x0E, 0x0A,
+0x0A, 0x09, 0x08, 0x07, 0x07, 0x07, 0x0A, 0x0A,
 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A,
-0x37, 0xF7, 0x00, 0x80, 0x8F, 0xF7, 0x00, 0x80,
-0x21, 0xF8, 0x00, 0x80, 0x89, 0xF9, 0x00, 0x80,
-0x99, 0xF8, 0x00, 0x80, 0x11, 0xF9, 0x00, 0x80,
-0x05, 0x05, 0x00, 0x07, 0x07, 0x06, 0x05, 0xFF,
-0x00, 0x07, 0x07, 0x06, 0x05, 0x05, 0x00, 0x00,
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+0xCC, 0x00, 0x60, 0xB8, 0x02, 0x00, 0x60, 0xB8,
 0xE8, 0x12, 0x64, 0xB8, 0xF8, 0x10, 0x60, 0xB8,
 0x00, 0x00, 0x00, 0x04, 0xFF, 0xFF, 0xFF, 0xFB,
 0xFF, 0xFF, 0xFF, 0xDF, 0xFF, 0xFF, 0xFF, 0x1F,
 0x04, 0x00, 0x60, 0xB8, 0x04, 0x00, 0x64, 0xB8,
 0x08, 0x00, 0x60, 0xB8, 0x08, 0x00, 0x64, 0xB8,
 0x24, 0x00, 0x60, 0xB8, 0x80, 0x00, 0x60, 0xB8,
-0xCC, 0x07, 0x64, 0xB8, 0x00, 0x00, 0x78, 0xB8,
-0x00, 0x00, 0x70, 0xB8, 0x00, 0x0C, 0x01, 0x00,
-0x77, 0x77, 0x77, 0x77, 0x50, 0x05, 0x64, 0xB8,
-0x51, 0x05, 0x64, 0xB8, 0x08, 0x00, 0x00, 0xF8,
-0x08, 0x70, 0x0A, 0xF8, 0x08, 0x50, 0x01, 0xF8,
-0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x3E,
-0x00, 0x00, 0xE0, 0xFF, 0xFF, 0xFF, 0x0F, 0x00,
-0x00, 0x00, 0x00, 0xFF, 0x08, 0x00, 0x45, 0x01,
-0x48, 0x08, 0x46, 0x01, 0xE0, 0x10, 0x05, 0x00,
+0x00, 0x00, 0x03, 0x00, 0xCC, 0x07, 0x64, 0xB8,
+0x00, 0x00, 0x78, 0xB8, 0x00, 0x00, 0x70, 0xB8,
+0x00, 0x0C, 0x01, 0x00, 0x77, 0x77, 0x77, 0x77,
+0x50, 0x05, 0x64, 0xB8, 0x51, 0x05, 0x64, 0xB8,
+0x08, 0x00, 0x00, 0xF8, 0x08, 0x70, 0x0A, 0xF8,
+0x08, 0x50, 0x01, 0xF8, 0xFF, 0xFF, 0xFF, 0x00,
+0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0xE0, 0xFF,
+0x00, 0x1C, 0x01, 0x88, 0x00, 0x00, 0x00, 0xFF,
+0x08, 0x00, 0x45, 0x01, 0x48, 0x08, 0x46, 0x01,
+0xFF, 0xFF, 0x0F, 0x00, 0xE0, 0x10, 0x05, 0x00,
 0x00, 0x9C, 0x0A, 0x00, 0x08, 0x00, 0x85, 0x00,
 0x48, 0x08, 0x46, 0x00, 0x60, 0x10, 0x05, 0x00,
 0x88, 0x0C, 0x46, 0x01, 0x00, 0xCC, 0x0A, 0x00,
 0x48, 0x00, 0x46, 0x00, 0x00, 0xDC, 0x0A, 0x00,
 0x08, 0x00, 0x44, 0x01, 0xF2, 0x0D, 0x05, 0x00,
 0xEF, 0x00, 0x05, 0x00, 0x6C, 0x08, 0x05, 0x00,
-0x00, 0x00, 0x08, 0x00, 0xCE, 0xEF, 0x0D, 0x00,
-0xCE, 0xEF, 0x05, 0x00, 0x00, 0x00, 0x1F, 0x00,
-0x00, 0x00, 0x00, 0xC0, 0x01, 0x00, 0x00, 0xE0,
-0x00, 0x00, 0xFF, 0x0F, 0x21, 0x00, 0x00, 0xE0,
+0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, 0x00, 0xC0,
+0x00, 0x0A, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00,
+0xCE, 0xEF, 0x0D, 0x00, 0xCE, 0xEF, 0x05, 0x00,
+0x01, 0x00, 0x00, 0xE0, 0x00, 0x00, 0xFF, 0x0F,
+0x21, 0x00, 0x00, 0xE0, 0x45, 0x23, 0x01, 0x00,
 0x08, 0x08, 0x00, 0xF8, 0x08, 0x07, 0x00, 0xF8,
 0x08, 0x02, 0x00, 0xF8, 0x08, 0x03, 0x00, 0xF8,
-0x00, 0x00, 0x00, 0x0F, 0x02, 0x00, 0x60, 0xB8,
-0x62, 0x06, 0x64, 0xB8, 0xB4, 0x06, 0x64, 0xB8,
-0x06, 0x00, 0x00, 0x89, 0x00, 0x00, 0x00, 0x50,
-0x40, 0x00, 0x07, 0x70, 0x02, 0x04, 0x00, 0xD8,
-0x20, 0x01, 0x00, 0xD1, 0x40, 0x80, 0x03, 0x70,
-0x02, 0x04, 0x02, 0xD8, 0x20, 0x01, 0x00, 0xDE,
+0x00, 0x00, 0x00, 0x0F, 0x62, 0x06, 0x64, 0xB8,
+0xB4, 0x06, 0x64, 0xB8, 0x06, 0x00, 0x00, 0x89,
+0x00, 0x00, 0x00, 0x50, 0x40, 0x00, 0x07, 0x70,
+0x02, 0x04, 0x00, 0xD8, 0x20, 0x01, 0x00, 0xD1,
+0x40, 0x80, 0x03, 0x70, 0x02, 0x04, 0x02, 0xD8,
+0x20, 0x01, 0x00, 0xDE, 0xDE, 0xBC, 0x0A, 0x00,
 0x01, 0x00, 0x66, 0xB8, 0x00, 0x00, 0x02, 0x00,
-0x00, 0x00, 0x66, 0xB8, 0xCD, 0x9B, 0x78, 0x56,
-0x04, 0x1C, 0x66, 0xB8, 0xFF, 0xFF, 0xFF, 0x3F,
-0x1F, 0x00, 0x60, 0xB8, 0x05, 0xEA, 0xEF, 0xFD,
-0x06, 0xEA, 0xEF, 0xFD, 0x00, 0x1C, 0x66, 0xB8,
-0xFF, 0xFF, 0x3F, 0x00, 0x04, 0xEA, 0xEF, 0xFD,
-0x07, 0xEA, 0xEF, 0xFD, 0x08, 0xEA, 0xEF, 0xFD,
-0x09, 0xEA, 0xEF, 0xFD, 0x0A, 0xEA, 0xEF, 0xFD,
-0x00, 0xF0, 0x0F, 0x00, 0x00, 0xF0, 0x3F, 0x00,
-0x00, 0x00, 0xF0, 0x0F, 0x00, 0x00, 0xC0, 0xFF,
-0x00, 0x00, 0x00, 0xF0, 0x00, 0xFC, 0x0F, 0x00,
-0x80, 0x81, 0x81, 0x81, 0x81, 0x81, 0x01, 0x06,
-0x00, 0x0E, 0x0E, 0x0E, 0x0E, 0x0E, 0x0E, 0x38,
-0xE0, 0x80, 0x03, 0x00, 0x00, 0x00, 0x30, 0xC0,
-0x00, 0x03, 0x0C, 0x00, 0x4A, 0x04, 0x64, 0xB8,
-0x49, 0x04, 0x64, 0xB8, 0x01, 0x00, 0x60, 0xB8,
-0x01, 0x00, 0x64, 0xB8, 0x02, 0x00, 0x64, 0xB8,
-0x03, 0x00, 0x60, 0xB8, 0x03, 0x00, 0x64, 0xB8,
-0x23, 0x04, 0x64, 0xB8, 0x30, 0x04, 0x64, 0xB8,
-0x00, 0x00, 0x00, 0x02, 0x34, 0x04, 0x64, 0xB8,
-0x04, 0x05, 0x07, 0x08, 0x00, 0x01, 0x01, 0x02,
-0x81, 0x18, 0x66, 0xB8, 0x80, 0x18, 0x66, 0xB8,
-0xF0, 0x10, 0x60, 0xB8, 0x00, 0x00, 0xF0, 0x00,
-0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x30,
-0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x30, 0x00,
-0x00, 0x00, 0xC0, 0x00, 0x53, 0x04, 0x64, 0xB8,
-0x06, 0x00, 0x66, 0xB8, 0x03, 0x1C, 0x66, 0xB8,
-0x02, 0x1C, 0x66, 0xB8, 0x01, 0x1C, 0x66, 0xB8,
-0x07, 0x1C, 0x66, 0xB8, 0x06, 0x1C, 0x66, 0xB8,
-0x05, 0x1C, 0x66, 0xB8, 0x08, 0x1C, 0x66, 0xB8,
+0x00, 0x00, 0x66, 0xB8, 0x00, 0xFF, 0xFF, 0x00,
+0xCD, 0x9B, 0x78, 0x56, 0x04, 0x1C, 0x66, 0xB8,
+0xFF, 0xFF, 0xFF, 0x3F, 0x1F, 0x00, 0x60, 0xB8,
+0x05, 0xEA, 0xEF, 0xFD, 0x06, 0xEA, 0xEF, 0xFD,
+0x00, 0x1C, 0x66, 0xB8, 0xFF, 0xFF, 0x3F, 0x00,
+0x04, 0xEA, 0xEF, 0xFD, 0x07, 0xEA, 0xEF, 0xFD,
+0x08, 0xEA, 0xEF, 0xFD, 0x09, 0xEA, 0xEF, 0xFD,
+0x0A, 0xEA, 0xEF, 0xFD, 0x00, 0xF0, 0x0F, 0x00,
+0x00, 0xF0, 0x3F, 0x00, 0x00, 0x00, 0xF0, 0x0F,
+0x00, 0x00, 0xC0, 0xFF, 0x00, 0x00, 0x00, 0xF0,
+0x00, 0xFC, 0x0F, 0x00, 0x80, 0x81, 0x81, 0x81,
+0x81, 0x81, 0x01, 0x06, 0x00, 0x0E, 0x0E, 0x0E,
+0x0E, 0x0E, 0x0E, 0x38, 0xE0, 0x80, 0x03, 0x00,
+0x00, 0x00, 0x30, 0xC0, 0x00, 0x03, 0x0C, 0x00,
+0x4A, 0x04, 0x64, 0xB8, 0x49, 0x04, 0x64, 0xB8,
+0x01, 0x00, 0x60, 0xB8, 0x01, 0x00, 0x64, 0xB8,
+0x02, 0x00, 0x64, 0xB8, 0x03, 0x00, 0x60, 0xB8,
+0x03, 0x00, 0x64, 0xB8, 0x23, 0x04, 0x64, 0xB8,
+0x30, 0x04, 0x64, 0xB8, 0x00, 0x00, 0x00, 0x02,
+0x34, 0x04, 0x64, 0xB8, 0x04, 0x05, 0x07, 0x08,
+0x00, 0x01, 0x01, 0x02, 0x81, 0x18, 0x66, 0xB8,
+0x53, 0x04, 0x64, 0xB8, 0x80, 0x18, 0x66, 0xB8,
 0x82, 0x18, 0x66, 0xB8, 0x83, 0x18, 0x66, 0xB8,
 0x84, 0x18, 0x66, 0xB8, 0x85, 0x18, 0x66, 0xB8,
+0x2D, 0x04, 0x64, 0xB8, 0xF0, 0x10, 0x60, 0xB8,
+0x00, 0x00, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x0C,
+0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x0F, 0x00,
+0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0xC0, 0x00,
+0x06, 0x00, 0x66, 0xB8, 0x08, 0x1C, 0x66, 0xB8,
+0xFF, 0xFF, 0xCF, 0x3F, 0xFF, 0xFC, 0x3F, 0xFF,
 0x50, 0x04, 0x64, 0xB8, 0x51, 0x04, 0x64, 0xB8,
-0x52, 0x04, 0x64, 0xB8, 0x0D, 0x10, 0x66, 0xB8,
-0x08, 0x10, 0x66, 0xB8, 0x02, 0x10, 0x66, 0xB8,
-0x04, 0x10, 0x66, 0xB8, 0x05, 0x10, 0x66, 0xB8,
-0x0C, 0x10, 0x66, 0xB8, 0x00, 0x10, 0x66, 0xB8,
-0x03, 0x10, 0x66, 0xB8, 0x09, 0x10, 0x66, 0xB8,
-0x01, 0x10, 0x66, 0xB8, 0x06, 0x10, 0x66, 0xB8,
-0x00, 0x00, 0x40, 0x00, 0xF0, 0xFF, 0xFF, 0x0F,
-0x78, 0x76, 0x77, 0x00, 0x33, 0x66, 0x77, 0x00,
-0x74, 0x57, 0x74, 0x00, 0x47, 0x75, 0x47, 0x00,
-0x70, 0x45, 0x70, 0x00, 0x17, 0x45, 0x17, 0x00,
-0x00, 0x00, 0xF0, 0xFF, 0x00, 0x00, 0x00, 0x06,
-0x00, 0x00, 0x7F, 0x00, 0xFF, 0x0F, 0xFF, 0xF0,
-0x00, 0x40, 0x00, 0x06, 0xFF, 0xFF, 0xF0, 0xF0,
-0x00, 0x00, 0x09, 0x06, 0xFF, 0x0F, 0x00, 0xF0,
-0x00, 0x70, 0xDB, 0x03, 0xFF, 0xFF, 0xFF, 0x0F,
+0x52, 0x04, 0x64, 0xB8, 0x01, 0x1C, 0x66, 0xB8,
+0x02, 0x1C, 0x66, 0xB8, 0x03, 0x1C, 0x66, 0xB8,
+0x05, 0x1C, 0x66, 0xB8, 0x06, 0x1C, 0x66, 0xB8,
+0x07, 0x1C, 0x66, 0xB8, 0x00, 0x10, 0x66, 0xB8,
+0x08, 0x10, 0x66, 0xB8, 0x03, 0x10, 0x66, 0xB8,
+0x09, 0x10, 0x66, 0xB8, 0x04, 0x10, 0x66, 0xB8,
+0x05, 0x10, 0x66, 0xB8, 0x0C, 0x10, 0x66, 0xB8,
+0x02, 0x10, 0x66, 0xB8, 0x01, 0x10, 0x66, 0xB8,
+0x0D, 0x10, 0x66, 0xB8, 0x06, 0x10, 0x66, 0xB8,
+0x00, 0x00, 0x40, 0x00, 0x74, 0x57, 0x74, 0x00,
+0x47, 0x75, 0x47, 0x00, 0x70, 0x45, 0x70, 0x00,
+0x17, 0x45, 0x17, 0x00, 0x00, 0x00, 0xF0, 0xFF,
+0x70, 0x57, 0x70, 0x00, 0x17, 0x75, 0x17, 0x00,
+0x00, 0x00, 0x00, 0x06, 0xFF, 0xFF, 0xFF, 0x0F,
 0x00, 0x00, 0x00, 0x10, 0xFF, 0xFC, 0xFE, 0xFF,
-0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00,
+0x92, 0x84, 0x10, 0x08, 0x12, 0x56, 0x09, 0x29,
+0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x10, 0x08,
+0x12, 0x56, 0x09, 0x21, 0x28, 0xEA, 0xA0, 0x79,
+0xB9, 0xB2, 0x94, 0x91, 0x00, 0x00, 0x0C, 0x00,
 0x00, 0x00, 0x80, 0x00, 0x0E, 0x08, 0x04, 0x00,
 0x0C, 0x08, 0x04, 0x00, 0x00, 0xFF, 0xF9, 0xFF,
-0x00, 0x00, 0xFE, 0x1F, 0xFF, 0xFF, 0xF7, 0xFF,
+0x00, 0x00, 0xFE, 0x1F, 0x77, 0x65, 0x4F, 0x38,
 0x00, 0x80, 0x03, 0x00, 0x18, 0x00, 0x70, 0xB8,
-0x0B, 0x00, 0x70, 0xB8, 0x02, 0x00, 0x70, 0xB8,
-0x96, 0x02, 0x64, 0xB8, 0x94, 0x02, 0x64, 0xB8,
+0x18, 0x00, 0x78, 0xB8, 0x0B, 0x00, 0x78, 0xB8,
+0x0B, 0x00, 0x70, 0xB8, 0x02, 0x00, 0x78, 0xB8,
+0x02, 0x00, 0x70, 0xB8, 0x96, 0x02, 0x64, 0xB8,
+0x01, 0xA0, 0x02, 0x00, 0x94, 0x02, 0x64, 0xB8,
 0x97, 0x02, 0x64, 0xB8, 0xCC, 0x01, 0x64, 0xB8,
 0x54, 0x02, 0x64, 0xB8, 0x50, 0x02, 0x64, 0xB8,
 0x4C, 0x02, 0x64, 0xB8, 0x04, 0x00, 0x78, 0xB8,
@@ -381,185 +348,251 @@ u8 array_mp_8822b_fw_ap[] = {
 0x84, 0x04, 0x60, 0xB8, 0x84, 0x04, 0x64, 0xB8,
 0xC8, 0x04, 0x60, 0xB8, 0xC8, 0x04, 0x64, 0xB8,
 0x78, 0x04, 0x60, 0xB8, 0x78, 0x04, 0x64, 0xB8,
-0x30, 0x01, 0x64, 0xB8, 0x01, 0xEA, 0xEF, 0xFD,
-0x02, 0xEA, 0xEF, 0xFD, 0xC8, 0x01, 0x64, 0xB8,
-0xC9, 0x01, 0x64, 0xB8, 0xA0, 0x01, 0x64, 0xB8,
-0x44, 0x00, 0x60, 0xB8, 0x4C, 0x00, 0x60, 0xB8,
-0xFF, 0xFF, 0xBF, 0xFF, 0x60, 0x00, 0x60, 0xB8,
-0x00, 0x00, 0x00, 0x05, 0x53, 0x05, 0x64, 0xB8,
-0x77, 0x05, 0x64, 0xB8, 0x68, 0x05, 0x64, 0xB8,
+0x01, 0xEA, 0xEF, 0xFD, 0x02, 0xEA, 0xEF, 0xFD,
+0xC8, 0x01, 0x64, 0xB8, 0xC9, 0x01, 0x64, 0xB8,
+0xA0, 0x01, 0x64, 0xB8, 0x44, 0x00, 0x60, 0xB8,
+0x60, 0x00, 0x60, 0xB8, 0x4C, 0x00, 0x60, 0xB8,
+0xFF, 0xFF, 0xBF, 0xFF, 0x00, 0x00, 0x00, 0x05,
+0x53, 0x05, 0x64, 0xB8, 0x77, 0x05, 0x64, 0xB8,
+0x68, 0x05, 0x64, 0xB8, 0x80, 0x34, 0x00, 0xB8,
 0x94, 0x01, 0x64, 0xB8, 0x34, 0x01, 0x64, 0xB8,
-0x24, 0x01, 0x64, 0xB8, 0x20, 0x01, 0x64, 0xB8,
-0x24, 0x11, 0x64, 0xB8, 0x20, 0x11, 0x64, 0xB8,
-0x2C, 0x11, 0x64, 0xB8, 0x28, 0x11, 0x64, 0xB8,
-0x34, 0x11, 0x64, 0xB8, 0x30, 0x11, 0x64, 0xB8,
-0x38, 0x01, 0x64, 0xB8, 0x3C, 0x11, 0x64, 0xB8,
-0x38, 0x11, 0x64, 0xB8, 0xE4, 0x11, 0x64, 0xB8,
-0xE0, 0x11, 0x64, 0xB8, 0x50, 0x00, 0x60, 0xB8,
-0x54, 0x00, 0x60, 0xB8, 0xD0, 0x03, 0x01, 0x00,
-0xFF, 0x0F, 0xFF, 0x0F, 0x9A, 0x01, 0x64, 0xB8,
-0x99, 0x01, 0x64, 0xB8, 0xC6, 0x01, 0x64, 0xB8,
-0xE0, 0x12, 0x64, 0xB8, 0x02, 0x01, 0x64, 0xB8,
-0x21, 0x05, 0x64, 0xB8, 0x00, 0x28, 0x64, 0xB8,
-0x00, 0x2C, 0x64, 0xB8, 0x00, 0x38, 0x64, 0xB8,
-0x00, 0x3C, 0x64, 0xB8, 0x30, 0x00, 0x78, 0xB8,
+0x30, 0x01, 0x64, 0xB8, 0x24, 0x01, 0x64, 0xB8,
+0x20, 0x01, 0x64, 0xB8, 0x24, 0x11, 0x64, 0xB8,
+0x20, 0x11, 0x64, 0xB8, 0x2C, 0x11, 0x64, 0xB8,
+0x28, 0x11, 0x64, 0xB8, 0x34, 0x11, 0x64, 0xB8,
+0x30, 0x11, 0x64, 0xB8, 0x38, 0x01, 0x64, 0xB8,
+0x3C, 0x11, 0x64, 0xB8, 0x38, 0x11, 0x64, 0xB8,
+0xE4, 0x11, 0x64, 0xB8, 0xE0, 0x11, 0x64, 0xB8,
+0x50, 0x00, 0x60, 0xB8, 0x54, 0x00, 0x60, 0xB8,
+0x9A, 0x01, 0x64, 0xB8, 0x99, 0x01, 0x64, 0xB8,
+0xC6, 0x01, 0x64, 0xB8, 0xE0, 0x12, 0x64, 0xB8,
+0x02, 0x01, 0x64, 0xB8, 0x21, 0x05, 0x64, 0xB8,
+0x00, 0x28, 0x64, 0xB8, 0x00, 0x2C, 0x64, 0xB8,
+0x00, 0x38, 0x64, 0xB8, 0x00, 0x3C, 0x64, 0xB8,
 0x92, 0x06, 0x64, 0xB8, 0xF8, 0x05, 0x64, 0xB8,
 0xF9, 0x05, 0x64, 0xB8, 0xFA, 0x05, 0x64, 0xB8,
-0xFB, 0x05, 0x64, 0xB8, 0x20, 0x00, 0x78, 0xB8,
-0x10, 0x00, 0x78, 0xB8, 0x03, 0x00, 0x78, 0xB8,
-0xFF, 0xFF, 0x01, 0xFF, 0x1F, 0x07, 0x64, 0xB8,
-0x1C, 0x07, 0x64, 0xB8, 0x2D, 0x04, 0x64, 0xB8,
-0x2C, 0x04, 0x64, 0xB8, 0x1F, 0x04, 0x64, 0xB8,
-0x5F, 0x01, 0x64, 0xB8, 0x4C, 0x00, 0x00, 0xB5,
+0xFB, 0x05, 0x64, 0xB8, 0x1F, 0x07, 0x64, 0xB8,
+0x1C, 0x07, 0x64, 0xB8, 0x54, 0x05, 0x64, 0xB8,
+0xB8, 0x05, 0x64, 0xB8, 0xBC, 0x05, 0x64, 0xB8,
+0x6F, 0x01, 0x64, 0xB8, 0x40, 0x00, 0x00, 0xB5,
+0x44, 0x00, 0x00, 0xB5, 0x48, 0x00, 0x00, 0xB5,
+0x4C, 0x00, 0x00, 0xB5, 0xA8, 0x04, 0x64, 0xB8,
+0xC0, 0x01, 0x64, 0xB8, 0x00, 0x00, 0x10, 0x00,
 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x02, 0x02,
 0x00, 0x00, 0x04, 0x04, 0x00, 0x00, 0x08, 0x08,
 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x10, 0x10,
 0x00, 0x00, 0x20, 0x20, 0x00, 0x00, 0x40, 0x40,
 0x00, 0x00, 0x80, 0x80, 0x7E, 0x04, 0x64, 0xB8,
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@@ -1126,10 +1045,19 @@ u8 array_mp_8822b_fw_ap[] = {
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@@ -1138,29 +1066,49 @@ u8 array_mp_8822b_fw_ap[] = {
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@@ -1168,7 +1116,6 @@ u8 array_mp_8822b_fw_ap[] = {
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@@ -1184,75 +1131,86 @@ u8 array_mp_8822b_fw_ap[] = {
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-0x06, 0x08, 0x0A, 0x0C, 0x12, 0x18, 0x1E, 0x30,
-0x38, 0x42, 0x0A, 0x0C, 0x0C, 0x12, 0x16, 0x1C,
-0x20, 0x24, 0x24, 0x30, 0x01, 0x01, 0x01, 0x01,
-0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-0x02, 0x04, 0x06, 0x07, 0x08, 0x0A, 0x0B, 0x0C,
-0x03, 0x05, 0x06, 0x07, 0x08, 0x0A, 0x0B, 0x0C,
+0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C,
+0x00, 0x00, 0x00, 0x00, 0x06, 0x09, 0x0C, 0x12,
+0x18, 0x24, 0x30, 0x36, 0x01, 0x02, 0x05, 0x0B,
+0x00, 0x00, 0x00, 0x00, 0x0A, 0x08, 0x03, 0x03,
+0x00, 0x04, 0x09, 0x07, 0x03, 0x03, 0x00, 0x04,
+0x08, 0x06, 0x03, 0x02, 0x00, 0x04, 0x08, 0x05,
+0x03, 0x01, 0x00, 0x04, 0x0D, 0x0A, 0x07, 0x05,
+0x00, 0x08, 0x0C, 0x0A, 0x07, 0x04, 0x00, 0x08,
+0x0B, 0x0A, 0x06, 0x05, 0x00, 0x08, 0x0B, 0x0A,
+0x05, 0x03, 0x00, 0x08, 0x0B, 0x0A, 0x03, 0x02,
+0x00, 0x08, 0x14, 0x12, 0x0C, 0x04, 0x00, 0x10,
+0x14, 0x12, 0x09, 0x04, 0x00, 0x10, 0x24, 0x22,
+0x1C, 0x12, 0x00, 0x20, 0x24, 0x22, 0x18, 0x0C,
+0x00, 0x20, 0x24, 0x22, 0x14, 0x06, 0x00, 0x20,
+0x24, 0x22, 0x0F, 0x04, 0x00, 0x20, 0x24, 0x21,
+0x0A, 0x04, 0x00, 0x20, 0x23, 0x21, 0x0C, 0x04,
+0x00, 0x20, 0x23, 0x1F, 0x0A, 0x04, 0x00, 0x20,
+0x22, 0x1F, 0x0F, 0x04, 0x00, 0x20, 0x21, 0x1F,
+0x16, 0x0C, 0x00, 0x20, 0x31, 0x2F, 0x20, 0x14,
+0x00, 0x30, 0x31, 0x2F, 0x18, 0x10, 0x00, 0x30,
+0x31, 0x2C, 0x18, 0x0C, 0x00, 0x30, 0x31, 0x2A,
+0x14, 0x0C, 0x00, 0x30, 0x31, 0x28, 0x14, 0x00,
+0x00, 0x30, 0x31, 0x24, 0x14, 0x00, 0x00, 0x30,
+0x31, 0x1E, 0x14, 0x00, 0x00, 0x30, 0x31, 0x18,
+0x0A, 0x00, 0x00, 0x30, 0x15, 0xF0, 0xFF, 0x0F,
+0x00, 0x00, 0x00, 0x00, 0x15, 0xF0, 0x0F, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x05, 0xF0, 0xFF, 0x0F,
+0x00, 0x00, 0x00, 0x00, 0x05, 0xF0, 0x0F, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x10, 0xF0, 0xFF, 0x0F,
+0x00, 0x00, 0x00, 0x00, 0x10, 0xF0, 0x0F, 0x00,
+0x00, 0x00, 0x00, 0x00, 0xF5, 0x0F, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0xF0, 0x0F, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0xFF, 0xFF,
+0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x3F, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x15, 0xF0, 0x3F, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x15, 0xF0, 0xFF, 0xFF,
+0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0xFF, 0xFF,
+0xFF, 0x03, 0x00, 0x00, 0x15, 0xF0, 0xFF, 0xFF,
+0x0F, 0x00, 0x00, 0x00, 0x01, 0x02, 0x03, 0x06,
+0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x2C,
+0xFF, 0x00, 0x01, 0x02, 0x02, 0x04, 0x05, 0x06,
+0x07, 0x08, 0x09, 0x0A, 0x02, 0x02, 0x02, 0x04,
+0x02, 0x04, 0x06, 0x06, 0x08, 0x08, 0x09, 0x09,
+0x03, 0x06, 0x08, 0x08, 0x0A, 0x0E, 0x10, 0x18,
+0x05, 0x08, 0x08, 0x08, 0x0A, 0x0E, 0x10, 0x18,
+0x05, 0x08, 0x08, 0x09, 0x10, 0x14, 0x1C, 0x20,
+0x04, 0x06, 0x08, 0x0A, 0x10, 0x18, 0x18, 0x20,
+0x03, 0x06, 0x08, 0x09, 0x10, 0x14, 0x1C, 0x24,
+0x34, 0x3A, 0x05, 0x07, 0x09, 0x0A, 0x10, 0x14,
+0x1C, 0x28, 0x34, 0x3C, 0x06, 0x08, 0x0A, 0x0C,
+0x12, 0x18, 0x1E, 0x2E, 0x36, 0x40, 0x0A, 0x0C,
+0x0C, 0x12, 0x16, 0x1C, 0x20, 0x24, 0x24, 0x30,
+0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x03, 0x04,
+0x05, 0x06, 0x07, 0x08, 0x01, 0x02, 0x03, 0x04,
+0x05, 0x06, 0x07, 0x08, 0x02, 0x04, 0x06, 0x07,
+0x08, 0x0A, 0x0B, 0x0C, 0x03, 0x05, 0x06, 0x07,
+0x08, 0x0A, 0x0B, 0x0C, 0x05, 0x06, 0x07, 0x08,
+0x09, 0x0A, 0x0B, 0x0C, 0x02, 0x04, 0x06, 0x07,
+0x08, 0x09, 0x0B, 0x0C, 0x0C, 0x0C, 0x03, 0x05,
+0x06, 0x07, 0x08, 0x09, 0x0B, 0x0C, 0x0C, 0x0C,
 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C,
-0x02, 0x04, 0x06, 0x07, 0x08, 0x09, 0x0B, 0x0C,
-0x0C, 0x0C, 0x03, 0x05, 0x06, 0x07, 0x08, 0x09,
-0x0B, 0x0C, 0x0C, 0x0C, 0x05, 0x06, 0x07, 0x08,
-0x09, 0x0A, 0x0B, 0x0C, 0x0C, 0x0C, 0x05, 0x06,
-0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0C, 0x0C,
+0x0C, 0x0C, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A,
+0x0B, 0x0C, 0x0C, 0x0C, 0x02, 0x04, 0x08, 0x10,
+0x10, 0x14, 0x18, 0x1C, 0x1C, 0x20, 0x20, 0x20,
+0x10, 0x14, 0x18, 0x1C, 0x1C, 0x20, 0x20, 0x20,
+0x10, 0x14, 0x18, 0x1C, 0x1C, 0x20, 0x20, 0x20,
+0x10, 0x14, 0x18, 0x1C, 0x1C, 0x20, 0x20, 0x20,
+0x10, 0x14, 0x18, 0x1C, 0x1C, 0x20, 0x20, 0x20,
+0x10, 0x14, 0x18, 0x1C, 0x1C, 0x20, 0x20, 0x20,
+0x24, 0x28, 0x10, 0x14, 0x18, 0x1C, 0x1C, 0x20,
+0x20, 0x20, 0x24, 0x28, 0x10, 0x14, 0x18, 0x1C,
+0x1C, 0x20, 0x20, 0x20, 0x24, 0x28, 0x10, 0x14,
+0x18, 0x1C, 0x1C, 0x20, 0x20, 0x20, 0x24, 0x28,
 0x2D, 0xFF, 0xFF, 0x2E, 0x36, 0xFF, 0x2F, 0x37,
 0xFF, 0x30, 0x38, 0x41, 0x31, 0x39, 0x42, 0x42,
 0x3A, 0x32, 0x43, 0x3A, 0x33, 0x43, 0x3A, 0x34,
 0x3A, 0x44, 0x35, 0x44, 0x3B, 0xFF, 0x2E, 0x37,
 0x40, 0x38, 0x30, 0x41, 0x39, 0x42, 0x31, 0x3A,
-0x43, 0x32, 0x3B, 0x43, 0x35, 0x3C, 0x44, 0xFF,
+0x42, 0x32, 0x3B, 0x43, 0x35, 0x3C, 0x44, 0xFF,
 0x3D, 0x45, 0xFF, 0x3E, 0x45, 0xFF, 0x45, 0x3F,
 0xFF, 0x46, 0xFF, 0xFF, 0x37, 0x41, 0x2F, 0x39,
 0x42, 0x31, 0x43, 0x3A, 0x33, 0x44, 0x3B, 0x35,
@@ -1377,7 +1335,7 @@ u8 array_mp_8822b_fw_ap[] = {
 0xE0, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x0E, 0x38,
 0x18, 0x00, 0x00, 0x00, 0x00, 0x83, 0x01, 0x06,
 0x80, 0x03, 0x00, 0x00, 0x00, 0x00, 0x70, 0xE0,
-0xF8, 0xDD, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x5C, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x18, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -1396,7 +1354,7 @@ u8 array_mp_8822b_fw_ap[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x7B, 0xB9, 0x00, 0x65, 0x00, 0x65, 0x00, 0x65,
 0x5A, 0xB9, 0x00, 0x65, 0x00, 0x65, 0x00, 0x65,
-0x10, 0xF0, 0x20, 0x6A, 0x40, 0xF3, 0x1D, 0x4A,
+0x10, 0xF0, 0x20, 0x6A, 0x20, 0xF3, 0x0D, 0x4A,
 0x00, 0xEA, 0x00, 0x65, 0x00, 0x65, 0x00, 0x65,
 0x00, 0x65, 0x00, 0x65, 0x00, 0x65, 0x00, 0x65,
 0x00, 0x65, 0x00, 0x65, 0x00, 0x65, 0x00, 0x65,
@@ -1452,78 +1410,82 @@ u8 array_mp_8822b_fw_ap[] = {
 0x00, 0x6E, 0x30, 0xF0, 0x20, 0x6F, 0x00, 0xF0,
 0x00, 0x4F, 0xC0, 0xDC, 0x04, 0x4C, 0xE3, 0xEC,
 0xB8, 0x67, 0xFB, 0x2D, 0x30, 0xF0, 0x20, 0x6C,
-0x85, 0xF2, 0x10, 0x4C, 0x00, 0x6E, 0x30, 0xF0,
-0x21, 0x6F, 0x10, 0xF3, 0x00, 0x4F, 0xC0, 0xDC,
+0xC5, 0xF0, 0x08, 0x4C, 0x00, 0x6E, 0x30, 0xF0,
+0x21, 0x6F, 0x71, 0xF0, 0x00, 0x4F, 0xC0, 0xDC,
 0x04, 0x4C, 0xE3, 0xEC, 0xB8, 0x67, 0xFB, 0x2D,
 0x10, 0xF0, 0x20, 0x6C, 0x60, 0xF2, 0x15, 0x4C,
 0x00, 0xEC, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x30, 0xF0, 0x20, 0x6B, 0x20, 0xF7, 0x68, 0x9B,
+0x30, 0xF0, 0x20, 0x6B, 0x60, 0xF5, 0x70, 0x9B,
 0x10, 0xF0, 0x20, 0x6A, 0x60, 0xF2, 0x15, 0x4A,
-0x40, 0xDB, 0x00, 0x18, 0xC5, 0x06, 0x00, 0x18,
-0xDC, 0x06, 0x00, 0x18, 0x38, 0x09, 0x00, 0x18,
-0xF7, 0x06, 0x00, 0x18, 0xE3, 0x08, 0x00, 0x18,
-0xBA, 0x0E, 0x30, 0xF0, 0x20, 0x6C, 0x30, 0xF0,
+0x40, 0xDB, 0x00, 0x18, 0x85, 0x04, 0x00, 0x18,
+0x9C, 0x04, 0x00, 0x18, 0x0C, 0x07, 0x00, 0x18,
+0xB7, 0x04, 0x00, 0x18, 0xB7, 0x06, 0x00, 0x18,
+0xCD, 0x0D, 0x30, 0xF0, 0x20, 0x6C, 0x30, 0xF0,
 0x21, 0x6A, 0x60, 0xF0, 0x08, 0x4C, 0x15, 0xF0,
 0x00, 0x4A, 0x43, 0xDC, 0x00, 0x6D, 0x00, 0x18,
-0x79, 0x0E, 0x30, 0xF0, 0x20, 0x6C, 0x30, 0xF0,
+0x88, 0x0D, 0x30, 0xF0, 0x20, 0x6C, 0x30, 0xF0,
 0x20, 0x6B, 0xE0, 0xF0, 0x08, 0x4C, 0x01, 0x6D,
-0x0F, 0xF3, 0x58, 0xDB, 0x00, 0x18, 0x3E, 0x0D,
-0x30, 0xF0, 0x20, 0x6B, 0x2F, 0xF3, 0x44, 0xDB,
+0xAF, 0xF7, 0x58, 0xDB, 0x00, 0x18, 0x41, 0x0C,
+0x30, 0xF0, 0x20, 0x6B, 0xCF, 0xF7, 0x40, 0xDB,
 0x30, 0xF0, 0x20, 0x6C, 0x30, 0xF0, 0x21, 0x6A,
 0xA0, 0xF0, 0x08, 0x4C, 0x15, 0xF4, 0x00, 0x4A,
-0x43, 0xDC, 0x00, 0x6D, 0x00, 0x18, 0x79, 0x0E,
-0x30, 0xF0, 0x20, 0x6C, 0x30, 0xF0, 0x20, 0x6B,
-0x20, 0xF1, 0x0C, 0x4C, 0x01, 0x6D, 0x0F, 0xF3,
-0x5C, 0xDB, 0x00, 0x18, 0x3E, 0x0D, 0x30, 0xF0,
-0x20, 0x6B, 0x2F, 0xF3, 0x48, 0xDB, 0x30, 0xF0,
-0x20, 0x6C, 0x30, 0xF0, 0x21, 0x6A, 0xE0, 0xF0,
-0x0C, 0x4C, 0x16, 0xF0, 0x00, 0x4A, 0x43, 0xDC,
-0x00, 0x6D, 0x00, 0x18, 0x79, 0x0E, 0x30, 0xF0,
-0x20, 0x6B, 0x2F, 0xF3, 0x40, 0xDB, 0x00, 0x18,
-0x00, 0x09, 0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF0,
-0x74, 0x9A, 0xFF, 0xF7, 0x1F, 0x6C, 0x10, 0xF0,
-0x00, 0x6D, 0x40, 0xAB, 0xAB, 0xED, 0x8C, 0xEA,
-0xAD, 0xEA, 0x8C, 0xEA, 0x40, 0xCB, 0x00, 0x18,
-0xB9, 0x0C, 0x00, 0x18, 0xBC, 0x0B, 0xFF, 0x17,
+0x43, 0xDC, 0x00, 0x6D, 0x00, 0x18, 0x88, 0x0D,
+0x30, 0xF0, 0x20, 0x6B, 0xAF, 0xF7, 0x5C, 0xDB,
+0x00, 0x18, 0xD4, 0x06, 0x00, 0x18, 0x2E, 0x08,
+0x30, 0xF0, 0x20, 0x6A, 0xE0, 0xF6, 0x6C, 0x9A,
+0xFF, 0xF7, 0x1F, 0x6C, 0x10, 0xF0, 0x00, 0x6D,
+0x40, 0xAB, 0xAB, 0xED, 0x8C, 0xEA, 0xAD, 0xEA,
+0x8C, 0xEA, 0x40, 0xCB, 0x00, 0x18, 0xB0, 0x0B,
+0x00, 0x18, 0x7B, 0x0A, 0xFF, 0x17, 0x00, 0x65,
 0x20, 0xE8, 0x00, 0x65, 0x6D, 0xB8, 0x00, 0x65,
 0x00, 0xF0, 0x20, 0x6A, 0x7C, 0x4A, 0x6C, 0xEA,
-0x0F, 0x22, 0x00, 0xF0, 0x20, 0x6B, 0x28, 0x4B,
-0x6A, 0xEA, 0x05, 0x61, 0x10, 0xF0, 0x20, 0x6A,
-0xC0, 0xF3, 0x13, 0x4A, 0x00, 0xEA, 0x10, 0xF0,
-0x20, 0x6A, 0xA5, 0xF6, 0x01, 0x4A, 0x00, 0xEA,
-0x00, 0xF0, 0x20, 0x6A, 0x1F, 0xF7, 0x00, 0x6A,
-0x4C, 0xEB, 0x4C, 0xB8, 0x00, 0x65, 0x6C, 0xEA,
-0x42, 0x32, 0x30, 0xF0, 0x20, 0x6B, 0x84, 0xF3,
-0x0C, 0x4B, 0x49, 0xE3, 0x40, 0xA2, 0x30, 0xF0,
-0x20, 0x6B, 0x40, 0xF0, 0x08, 0x4B, 0x69, 0xE2,
-0x30, 0xF0, 0x21, 0x6B, 0xF0, 0xF1, 0x1C, 0x4B,
-0x60, 0x9B, 0x05, 0x2B, 0x10, 0xF0, 0x20, 0x6B,
-0x00, 0xF5, 0x01, 0x4B, 0x00, 0xEB, 0x10, 0xF0,
-0x20, 0x6B, 0x80, 0xF5, 0x15, 0x4B, 0x00, 0xEB,
-0x00, 0x65, 0x30, 0xF0, 0x20, 0x6A, 0x0F, 0xF3,
-0x04, 0x4A, 0x00, 0xF0, 0x20, 0x6B, 0x01, 0x6B,
-0x60, 0xDA, 0x10, 0xF0, 0x20, 0x6B, 0xE0, 0xF3,
-0x0D, 0x4B, 0x00, 0xEB, 0x5A, 0xB8, 0x00, 0x65,
-0x7B, 0xB8, 0x00, 0x65, 0x40, 0xE8, 0x5A, 0xB9,
-0x00, 0x65, 0x00, 0x65, 0x00, 0x65, 0x7B, 0xB9,
-0x00, 0x65, 0x00, 0x65, 0x00, 0x65, 0x30, 0xF0,
-0x20, 0x6A, 0x0F, 0xF3, 0x04, 0x4A, 0x00, 0xF0,
-0x20, 0x6B, 0x60, 0xDA, 0x30, 0xF0, 0x20, 0x6A,
-0x6F, 0xF3, 0x04, 0x4A, 0x60, 0x9A, 0x41, 0x9A,
-0x6A, 0xEA, 0x0D, 0x61, 0x6E, 0xB8, 0x00, 0x65,
-0x62, 0x43, 0xCB, 0xB9, 0x00, 0x65, 0x00, 0x65,
-0x00, 0x65, 0x5A, 0xB8, 0x00, 0x65, 0x7B, 0xB8,
-0x00, 0x65, 0x00, 0xBA, 0x00, 0x65, 0x24, 0x23,
-0xDF, 0xF7, 0x00, 0x03, 0x86, 0xDB, 0xA7, 0xDB,
-0xC8, 0xDB, 0xE9, 0xDB, 0x0A, 0xDB, 0x2B, 0xDB,
-0x98, 0x67, 0x8C, 0xDB, 0x9F, 0x67, 0x8E, 0xDB,
-0x12, 0xEC, 0x10, 0xED, 0x82, 0xDB, 0xA3, 0xDB,
-0x9A, 0xB8, 0x00, 0x65, 0x84, 0xDB, 0x9B, 0xB8,
-0x00, 0x65, 0x85, 0xDB, 0x8E, 0xB8, 0x00, 0x65,
-0x82, 0x44, 0x81, 0xDB, 0x8C, 0xB8, 0x00, 0x65,
-0x80, 0xDB, 0x30, 0xF0, 0x20, 0x6B, 0x6F, 0xF3,
-0x04, 0x4B, 0x60, 0x9B, 0x9D, 0x67, 0x89, 0xDB,
-0x30, 0xF0, 0x20, 0x6B, 0x6F, 0xF3, 0x04, 0x4B,
+0x20, 0x22, 0x00, 0xF0, 0x20, 0x6B, 0x28, 0x4B,
+0x6A, 0xEA, 0x0F, 0x61, 0x30, 0xF0, 0x21, 0x6B,
+0x50, 0xF7, 0x18, 0x4B, 0x77, 0xF0, 0x24, 0x6A,
+0xA0, 0xF4, 0x04, 0x4A, 0x60, 0xDA, 0x30, 0xF0,
+0x21, 0x6A, 0x50, 0xF7, 0x18, 0x4A, 0x6A, 0xEA,
+0x31, 0x60, 0x77, 0xF0, 0x24, 0x6A, 0xA0, 0xF1,
+0x1C, 0x4A, 0x1D, 0xF4, 0x00, 0x6B, 0x60, 0xDA,
+0x10, 0xF0, 0x20, 0x6A, 0x85, 0xF1, 0x1D, 0x4A,
+0x00, 0xEA, 0x00, 0xF0, 0x20, 0x6A, 0x1F, 0xF7,
+0x00, 0x6A, 0x4C, 0xEB, 0x4C, 0xB8, 0x00, 0x65,
+0x6C, 0xEA, 0x42, 0x32, 0x30, 0xF0, 0x20, 0x6B,
+0x64, 0xF1, 0x10, 0x4B, 0x49, 0xE3, 0x40, 0xA2,
+0x30, 0xF0, 0x20, 0x6B, 0x40, 0xF0, 0x08, 0x4B,
+0x69, 0xE2, 0x30, 0xF0, 0x21, 0x6B, 0x50, 0xF7,
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@@ -1545,7 +1507,7 @@ u8 array_mp_8822b_fw_ap[] = {
 0x9A, 0xB8, 0x00, 0x65, 0x84, 0xDB, 0x9B, 0xB8,
 0x00, 0x65, 0x85, 0xDB, 0x7D, 0x67, 0x5B, 0xB9,
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 0xBB, 0x65, 0xDF, 0xF7, 0x00, 0x03, 0x82, 0x9B,
@@ -1557,7 +1519,7 @@ u8 array_mp_8822b_fw_ap[] = {
 0xC8, 0x9B, 0xA7, 0x9B, 0x86, 0x9B, 0x5A, 0xB8,
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 0xE9, 0xDB, 0x0A, 0xDB, 0x2B, 0xDB, 0x98, 0x67,
 0x8C, 0xDB, 0x9F, 0x67, 0x8E, 0xDB, 0x12, 0xEC,
@@ -1565,796 +1527,515 @@ u8 array_mp_8822b_fw_ap[] = {
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 0x10, 0x6A, 0x1F, 0xF7, 0x00, 0x6B, 0x4C, 0xEB,
 0x02, 0xF0, 0x00, 0x73, 0x01, 0x60, 0x05, 0x2B,
-0x30, 0xF0, 0x20, 0x6B, 0x40, 0xF7, 0x7C, 0x9B,
-0x04, 0x10, 0x30, 0xF0, 0x20, 0x6B, 0x60, 0xF7,
-0x60, 0x9B, 0x6D, 0xE2, 0x04, 0x4A, 0x00, 0x6C,
+0x30, 0xF0, 0x20, 0x6B, 0x80, 0xF6, 0x6C, 0x9B,
+0x04, 0x10, 0x30, 0xF0, 0x20, 0x6B, 0x80, 0xF6,
+0x70, 0x9B, 0x6D, 0xE2, 0x04, 0x4A, 0x00, 0x6C,
 0x62, 0xF4, 0x00, 0x72, 0x80, 0xDB, 0xE9, 0x61,
 0x20, 0xE8, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF0, 0x50, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0xE0, 0xF6, 0x48, 0x9A,
 0x03, 0x6D, 0xFF, 0x6B, 0x80, 0x9A, 0x30, 0xF0,
-0x20, 0x6A, 0x81, 0xF0, 0x54, 0x9A, 0x00, 0xF5,
+0x20, 0x6A, 0xE0, 0xF6, 0x4C, 0x9A, 0x00, 0xF5,
 0x82, 0x34, 0xAC, 0xEC, 0x40, 0x9A, 0x01, 0x74,
 0x42, 0x32, 0x52, 0x32, 0xAC, 0xEA, 0x06, 0x60,
 0x0A, 0x2C, 0x02, 0x5A, 0x28, 0x6C, 0x0D, 0x60,
 0x50, 0x6C, 0x0B, 0x10, 0x02, 0x5A, 0x14, 0x6C,
 0x08, 0x60, 0x28, 0x6C, 0x04, 0x10, 0x02, 0x5A,
 0x0A, 0x6C, 0x03, 0x60, 0x14, 0x6C, 0x84, 0xEA,
-0x6C, 0xEC, 0x00, 0x18, 0xEC, 0x08, 0x00, 0x18,
-0xD3, 0x11, 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF,
+0x6C, 0xEC, 0x00, 0x18, 0xC0, 0x06, 0x00, 0x18,
+0x0B, 0x13, 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF,
 0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x30, 0xF0,
-0x20, 0x68, 0xC5, 0xF2, 0x10, 0x48, 0x00, 0x6A,
+0x20, 0x68, 0xE5, 0xF0, 0x10, 0x48, 0x00, 0x6A,
 0x80, 0xF0, 0x4C, 0xD8, 0x20, 0xF1, 0x57, 0xC0,
-0x00, 0x18, 0xA0, 0x06, 0xA0, 0xF0, 0x7E, 0xA0,
+0x00, 0x18, 0x60, 0x04, 0xA0, 0xF0, 0x7E, 0xA0,
 0x01, 0x6A, 0x6D, 0xEA, 0xA0, 0xF0, 0x5E, 0xC0,
-0x00, 0x18, 0x99, 0x07, 0x30, 0xF0, 0x20, 0x6A,
-0x30, 0xF0, 0x20, 0x6C, 0x67, 0xF5, 0x1B, 0x4A,
-0x87, 0xF5, 0x0B, 0x4C, 0x00, 0x6B, 0x60, 0xC2,
+0x00, 0x18, 0x6F, 0x05, 0x30, 0xF0, 0x20, 0x6A,
+0x30, 0xF0, 0x20, 0x6C, 0x87, 0xF7, 0x1B, 0x4A,
+0xA7, 0xF7, 0x0B, 0x4C, 0x00, 0x6B, 0x60, 0xC2,
 0x70, 0xC2, 0x01, 0x4A, 0x62, 0x67, 0x8E, 0xEB,
-0xF9, 0x2B, 0x30, 0xF0, 0x20, 0x6A, 0xC5, 0xF2,
-0x10, 0x4A, 0xA2, 0xF2, 0x68, 0xC2, 0xA2, 0xF2,
-0x69, 0xC2, 0xA2, 0xF2, 0x6A, 0xC2, 0xA2, 0xF2,
+0xF9, 0x2B, 0x30, 0xF0, 0x20, 0x6A, 0xE5, 0xF0,
+0x10, 0x4A, 0xA2, 0xF6, 0x68, 0xC2, 0xA2, 0xF6,
+0x69, 0xC2, 0xA2, 0xF6, 0x6A, 0xC2, 0xA2, 0xF6,
 0x67, 0xC2, 0x05, 0x97, 0x04, 0x90, 0x03, 0x63,
-0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x00, 0x18, 0xB2, 0x06, 0x00, 0x18, 0x01, 0x07,
-0x00, 0x18, 0x46, 0x09, 0x00, 0x18, 0xB5, 0x25,
-0x00, 0x18, 0x79, 0x1B, 0x00, 0x18, 0x6D, 0x03,
-0x00, 0x18, 0xFE, 0x18, 0x05, 0x97, 0x03, 0x63,
+0x00, 0xEF, 0x00, 0x65, 0xFB, 0x63, 0x09, 0x62,
+0x08, 0xD1, 0x07, 0xD0, 0x01, 0x68, 0x00, 0x18,
+0x72, 0x04, 0x0B, 0xE8, 0x00, 0x18, 0xD7, 0x04,
+0x00, 0x18, 0x1A, 0x07, 0x00, 0x18, 0x08, 0x29,
+0x00, 0x18, 0xDF, 0x10, 0x00, 0x18, 0x30, 0x1A,
+0x00, 0x18, 0x28, 0x1E, 0x10, 0xF0, 0x20, 0x6C,
+0xF0, 0x67, 0x01, 0x69, 0x6E, 0xF3, 0x01, 0x4C,
+0x00, 0x6D, 0x64, 0x6E, 0x04, 0xD1, 0x00, 0x18,
+0x55, 0x1D, 0xD0, 0x67, 0x00, 0x6C, 0x42, 0x6D,
+0x00, 0x18, 0xC1, 0x1B, 0x30, 0xF0, 0x20, 0x6B,
+0xE0, 0xF6, 0xF0, 0x9B, 0xD0, 0x67, 0x00, 0x6C,
+0x4D, 0xEF, 0x42, 0x6D, 0x00, 0x18, 0x1E, 0x1C,
+0x10, 0xF0, 0x21, 0x6C, 0xF0, 0x67, 0xF0, 0xF0,
+0x09, 0x4C, 0x00, 0x6D, 0x64, 0x6E, 0x04, 0xD1,
+0x00, 0x18, 0x55, 0x1D, 0x00, 0x18, 0x0E, 0x1E,
+0x09, 0x97, 0x08, 0x91, 0x07, 0x90, 0x05, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6A,
-0xC5, 0xF2, 0x10, 0x4A, 0x00, 0x6B, 0xC0, 0xF1,
+0xE5, 0xF0, 0x10, 0x4A, 0x00, 0x6B, 0xC0, 0xF1,
 0x7A, 0xC2, 0xC0, 0xF1, 0x7B, 0xC2, 0x20, 0xF1,
 0x77, 0xC2, 0x20, 0xF1, 0x78, 0xC2, 0x20, 0xE8,
 0xFC, 0x63, 0x07, 0x62, 0x06, 0xD0, 0x30, 0xF0,
-0x20, 0x68, 0xC5, 0xF2, 0x10, 0x48, 0x02, 0xF3,
-0x43, 0xA0, 0x0B, 0x2A, 0xE0, 0xF3, 0x1A, 0x6C,
-0x04, 0x05, 0x00, 0x18, 0xC0, 0x1C, 0x9D, 0x67,
-0x70, 0xA4, 0x07, 0x6A, 0x6C, 0xEA, 0x02, 0xF3,
-0x43, 0xC0, 0x30, 0xF0, 0x20, 0x68, 0xC5, 0xF2,
-0x10, 0x48, 0x02, 0xF3, 0x45, 0xA0, 0x0A, 0x2A,
+0x20, 0x68, 0xE5, 0xF0, 0x10, 0x48, 0xC2, 0xF7,
+0x51, 0xA0, 0x0B, 0x2A, 0xE0, 0xF3, 0x1A, 0x6C,
+0x04, 0x05, 0x00, 0x18, 0xDD, 0x1E, 0x9D, 0x67,
+0x70, 0xA4, 0x07, 0x6A, 0x6C, 0xEA, 0xC2, 0xF7,
+0x51, 0xC0, 0x30, 0xF0, 0x20, 0x68, 0xE5, 0xF0,
+0x10, 0x48, 0xC2, 0xF7, 0x53, 0xA0, 0x0A, 0x2A,
 0xE0, 0xF3, 0x1A, 0x6C, 0x04, 0x05, 0x00, 0x18,
-0xC0, 0x1C, 0x7D, 0x67, 0x50, 0xA3, 0x56, 0x32,
-0x02, 0xF3, 0x45, 0xC0, 0x30, 0xF0, 0x20, 0x68,
-0xC5, 0xF2, 0x10, 0x48, 0x02, 0xF3, 0x46, 0xA0,
+0xDD, 0x1E, 0x7D, 0x67, 0x50, 0xA3, 0x56, 0x32,
+0xC2, 0xF7, 0x53, 0xC0, 0x30, 0xF0, 0x20, 0x68,
+0xE5, 0xF0, 0x10, 0x48, 0xC2, 0xF7, 0x54, 0xA0,
 0x0B, 0x2A, 0xE0, 0xF3, 0x1D, 0x6C, 0x04, 0x05,
-0x00, 0x18, 0xC0, 0x1C, 0x9D, 0x67, 0x70, 0xA4,
-0x03, 0x6A, 0x6C, 0xEA, 0x02, 0xF3, 0x46, 0xC0,
-0x30, 0xF0, 0x20, 0x68, 0xC5, 0xF2, 0x10, 0x48,
-0x02, 0xF3, 0x47, 0xA0, 0x0C, 0x2A, 0xE0, 0xF3,
-0x1D, 0x6C, 0x04, 0x05, 0x00, 0x18, 0xC0, 0x1C,
+0x00, 0x18, 0xDD, 0x1E, 0x9D, 0x67, 0x70, 0xA4,
+0x03, 0x6A, 0x6C, 0xEA, 0xC2, 0xF7, 0x54, 0xC0,
+0x30, 0xF0, 0x20, 0x68, 0xE5, 0xF0, 0x10, 0x48,
+0xC2, 0xF7, 0x55, 0xA0, 0x0C, 0x2A, 0xE0, 0xF3,
+0x1D, 0x6C, 0x04, 0x05, 0x00, 0x18, 0xDD, 0x1E,
 0x7D, 0x67, 0x50, 0xA3, 0x30, 0x6B, 0x6C, 0xEA,
-0x53, 0x32, 0x02, 0xF3, 0x47, 0xC0, 0x07, 0x97,
+0x53, 0x32, 0xC2, 0xF7, 0x55, 0xC0, 0x07, 0x97,
 0x06, 0x90, 0x04, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFB, 0x63, 0x09, 0x62, 0x08, 0xD1, 0x07, 0xD0,
 0x04, 0x01, 0x04, 0x67, 0xB1, 0x67, 0xE0, 0xF3,
-0x10, 0x6C, 0x00, 0x18, 0xC0, 0x1C, 0x7D, 0x67,
+0x10, 0x6C, 0x00, 0x18, 0xDD, 0x1E, 0x7D, 0x67,
 0x50, 0xA3, 0xB1, 0x67, 0xE0, 0xF3, 0x11, 0x6C,
-0x40, 0xC0, 0x00, 0x18, 0xC0, 0x1C, 0x7D, 0x67,
+0x40, 0xC0, 0x00, 0x18, 0xDD, 0x1E, 0x7D, 0x67,
 0x50, 0xA3, 0xB1, 0x67, 0xE0, 0xF3, 0x12, 0x6C,
-0x41, 0xC0, 0x00, 0x18, 0xC0, 0x1C, 0x7D, 0x67,
+0x41, 0xC0, 0x00, 0x18, 0xDD, 0x1E, 0x7D, 0x67,
 0x50, 0xA3, 0xB1, 0x67, 0xE0, 0xF3, 0x13, 0x6C,
-0x42, 0xC0, 0x00, 0x18, 0xC0, 0x1C, 0x7D, 0x67,
+0x42, 0xC0, 0x00, 0x18, 0xDD, 0x1E, 0x7D, 0x67,
 0x50, 0xA3, 0xB1, 0x67, 0xE0, 0xF3, 0x1C, 0x6C,
-0x43, 0xC0, 0x00, 0x18, 0xC0, 0x1C, 0x7D, 0x67,
+0x43, 0xC0, 0x00, 0x18, 0xDD, 0x1E, 0x7D, 0x67,
 0x50, 0xA3, 0x09, 0x97, 0x08, 0x91, 0x44, 0xC0,
 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFB, 0x63, 0x09, 0x62, 0x08, 0xD1, 0x07, 0xD0,
 0x04, 0x01, 0x04, 0x67, 0xB1, 0x67, 0xE0, 0xF3,
-0x14, 0x6C, 0x00, 0x18, 0xC0, 0x1C, 0x7D, 0x67,
+0x14, 0x6C, 0x00, 0x18, 0xDD, 0x1E, 0x7D, 0x67,
 0x50, 0xA3, 0xB1, 0x67, 0xE0, 0xF3, 0x15, 0x6C,
-0x40, 0xC0, 0x00, 0x18, 0xC0, 0x1C, 0x7D, 0x67,
+0x40, 0xC0, 0x00, 0x18, 0xDD, 0x1E, 0x7D, 0x67,
 0x50, 0xA3, 0xB1, 0x67, 0xE0, 0xF3, 0x16, 0x6C,
-0x41, 0xC0, 0x00, 0x18, 0xC0, 0x1C, 0x7D, 0x67,
+0x41, 0xC0, 0x00, 0x18, 0xDD, 0x1E, 0x7D, 0x67,
 0x50, 0xA3, 0xB1, 0x67, 0xE0, 0xF3, 0x17, 0x6C,
-0x42, 0xC0, 0x00, 0x18, 0xC0, 0x1C, 0x7D, 0x67,
+0x42, 0xC0, 0x00, 0x18, 0xDD, 0x1E, 0x7D, 0x67,
 0x50, 0xA3, 0xB1, 0x67, 0xE0, 0xF3, 0x18, 0x6C,
-0x43, 0xC0, 0x00, 0x18, 0xC0, 0x1C, 0x7D, 0x67,
+0x43, 0xC0, 0x00, 0x18, 0xDD, 0x1E, 0x7D, 0x67,
 0x50, 0xA3, 0xB1, 0x67, 0xE0, 0xF3, 0x19, 0x6C,
-0x44, 0xC0, 0x00, 0x18, 0xC0, 0x1C, 0x7D, 0x67,
+0x44, 0xC0, 0x00, 0x18, 0xDD, 0x1E, 0x7D, 0x67,
 0x50, 0xA3, 0x09, 0x97, 0x08, 0x91, 0x45, 0xC0,
-0x30, 0xF0, 0x20, 0x6A, 0xC5, 0xF2, 0x10, 0x4A,
-0x02, 0xF3, 0x64, 0xA2, 0x02, 0xF3, 0x85, 0xA2,
-0x6C, 0x33, 0x94, 0x34, 0x8D, 0xEB, 0x02, 0xF3,
-0x83, 0xA2, 0x8D, 0xEB, 0x66, 0xC0, 0x02, 0xF3,
-0x66, 0xA2, 0x02, 0xF3, 0x47, 0xA2, 0x68, 0x33,
+0x30, 0xF0, 0x20, 0x6A, 0xE5, 0xF0, 0x10, 0x4A,
+0xC2, 0xF7, 0x72, 0xA2, 0xC2, 0xF7, 0x93, 0xA2,
+0x6C, 0x33, 0x94, 0x34, 0x8D, 0xEB, 0xC2, 0xF7,
+0x91, 0xA2, 0x8D, 0xEB, 0x66, 0xC0, 0xC2, 0xF7,
+0x74, 0xA2, 0xC2, 0xF7, 0x55, 0xA2, 0x68, 0x33,
 0x58, 0x32, 0x4D, 0xEB, 0x33, 0x6A, 0x4D, 0xEB,
 0x67, 0xC0, 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF,
 0xFB, 0x63, 0x09, 0x62, 0x08, 0xD0, 0x04, 0x00,
-0x90, 0x67, 0x00, 0x18, 0x4A, 0x07, 0xA0, 0xF1,
+0x90, 0x67, 0x00, 0x18, 0x20, 0x05, 0xA0, 0xF1,
 0x02, 0x6A, 0x1F, 0xF7, 0x00, 0x6B, 0x4C, 0xEB,
 0x02, 0xF0, 0x00, 0x73, 0x01, 0x60, 0x05, 0x2B,
-0x30, 0xF0, 0x20, 0x6B, 0x40, 0xF7, 0x7C, 0x9B,
-0x04, 0x10, 0x30, 0xF0, 0x20, 0x6B, 0x60, 0xF7,
-0x60, 0x9B, 0x80, 0xA0, 0x6D, 0xE2, 0x01, 0x4A,
+0x30, 0xF0, 0x20, 0x6B, 0x80, 0xF6, 0x6C, 0x9B,
+0x04, 0x10, 0x30, 0xF0, 0x20, 0x6B, 0x80, 0xF6,
+0x70, 0x9B, 0x80, 0xA0, 0x6D, 0xE2, 0x01, 0x4A,
 0xA0, 0xF1, 0x0A, 0x72, 0x80, 0xC3, 0x01, 0x48,
 0xE8, 0x61, 0x04, 0x00, 0x90, 0x67, 0x00, 0x18,
-0x30, 0x07, 0xA0, 0xF1, 0x0A, 0x6A, 0x1F, 0xF7,
+0x06, 0x05, 0xA0, 0xF1, 0x0A, 0x6A, 0x1F, 0xF7,
 0x00, 0x6B, 0x4C, 0xEB, 0x02, 0xF0, 0x00, 0x73,
 0x01, 0x60, 0x05, 0x2B, 0x30, 0xF0, 0x20, 0x6B,
-0x40, 0xF7, 0x7C, 0x9B, 0x04, 0x10, 0x30, 0xF0,
-0x20, 0x6B, 0x60, 0xF7, 0x60, 0x9B, 0x80, 0xA0,
+0x80, 0xF6, 0x6C, 0x9B, 0x04, 0x10, 0x30, 0xF0,
+0x20, 0x6B, 0x80, 0xF6, 0x70, 0x9B, 0x80, 0xA0,
 0x6D, 0xE2, 0x01, 0x4A, 0xA0, 0xF1, 0x0F, 0x72,
 0x80, 0xC3, 0x01, 0x48, 0xE8, 0x61, 0x30, 0xF0,
-0x20, 0x6A, 0x81, 0xF3, 0x44, 0x9A, 0x19, 0x6B,
+0x20, 0x6A, 0x01, 0xF2, 0x40, 0x9A, 0x19, 0x6B,
 0x60, 0xC2, 0x09, 0x97, 0x08, 0x90, 0x05, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0xFB, 0x63, 0x09, 0x62,
 0x08, 0xD1, 0x07, 0xD0, 0x04, 0x01, 0xE0, 0xF3,
-0x19, 0x6C, 0xB1, 0x67, 0x00, 0x18, 0xC0, 0x1C,
+0x19, 0x6C, 0xB1, 0x67, 0x00, 0x18, 0xDD, 0x1E,
 0x9D, 0x67, 0x50, 0xA4, 0x30, 0xF0, 0x20, 0x68,
-0xC5, 0xF2, 0x10, 0x48, 0x02, 0xF3, 0x82, 0xA0,
+0xE5, 0xF0, 0x10, 0x48, 0xC2, 0xF7, 0x90, 0xA0,
 0x01, 0x6B, 0x4C, 0xEB, 0x02, 0x6A, 0x4B, 0xEA,
 0x8C, 0xEA, 0x6D, 0xEA, 0x7D, 0x67, 0x90, 0xA3,
 0x03, 0x6D, 0xAB, 0xED, 0x02, 0x6B, 0x8C, 0xEB,
@@ -2362,255 +2043,370 @@ u8 array_mp_8822b_fw_ap[] = {
 0x8C, 0xEB, 0xAC, 0xEA, 0x6D, 0xEA, 0x08, 0x6B,
 0x8C, 0xEB, 0x09, 0x6C, 0x8B, 0xEC, 0x8C, 0xEA,
 0x6D, 0xEA, 0x00, 0xF4, 0x04, 0x4C, 0xB1, 0x67,
-0x02, 0xF3, 0x42, 0xC0, 0x00, 0x18, 0xC0, 0x1C,
+0xC2, 0xF7, 0x50, 0xC0, 0x00, 0x18, 0xDD, 0x1E,
 0x9D, 0x67, 0x70, 0xA4, 0x07, 0x6A, 0xE0, 0xF3,
-0x1D, 0x6C, 0x6C, 0xEA, 0x02, 0xF3, 0x43, 0xC0,
+0x1D, 0x6C, 0x6C, 0xEA, 0xC2, 0xF7, 0x51, 0xC0,
 0x18, 0x6A, 0x6C, 0xEA, 0x4F, 0x32, 0x76, 0x33,
-0xB1, 0x67, 0x02, 0xF3, 0x65, 0xC0, 0x02, 0xF3,
-0x44, 0xC0, 0x00, 0x18, 0xC0, 0x1C, 0x5D, 0x67,
+0xB1, 0x67, 0xC2, 0xF7, 0x73, 0xC0, 0xC2, 0xF7,
+0x52, 0xC0, 0x00, 0x18, 0xDD, 0x1E, 0x5D, 0x67,
 0x70, 0xA2, 0x0C, 0x6A, 0x6C, 0xEA, 0x4B, 0x32,
-0x7A, 0x33, 0x02, 0xF3, 0x46, 0xC0, 0x02, 0xF3,
-0x67, 0xC0, 0x00, 0x18, 0x08, 0x07, 0x30, 0xF0,
-0x20, 0x6A, 0x81, 0xF3, 0x44, 0x9A, 0x60, 0xA2,
+0x7A, 0x33, 0xC2, 0xF7, 0x54, 0xC0, 0xC2, 0xF7,
+0x75, 0xC0, 0x00, 0x18, 0xDE, 0x04, 0x30, 0xF0,
+0x20, 0x6A, 0x01, 0xF2, 0x40, 0x9A, 0x60, 0xA2,
 0xFF, 0x6A, 0x6C, 0xEA, 0xFD, 0x72, 0x02, 0x61,
-0x00, 0x18, 0x74, 0x07, 0x09, 0x97, 0x08, 0x91,
+0x00, 0x18, 0x4A, 0x05, 0x09, 0x97, 0x08, 0x91,
 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0x30, 0xF0, 0x20, 0x6A, 0x40, 0xF7, 0x48, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x80, 0xF5, 0x50, 0x9A,
 0x01, 0x6B, 0x60, 0xC2, 0x20, 0xE8, 0x00, 0x65,
-0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF3, 0x9C, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF2, 0x98, 0x9A,
 0xFF, 0x6B, 0x20, 0x6D, 0x40, 0xA4, 0x6C, 0xEA,
 0xAD, 0xEA, 0x6C, 0xEA, 0x40, 0xC4, 0x30, 0xF0,
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+0x4C, 0xEB, 0xAD, 0xEB, 0x4C, 0xEB, 0x30, 0xF0,
+0x20, 0x6A, 0x60, 0xC4, 0x61, 0xF3, 0x64, 0x9A,
+0x30, 0xF0, 0x20, 0x6C, 0x61, 0xF3, 0x88, 0x9C,
+0x40, 0x9B, 0x8D, 0xEA, 0x1A, 0x10, 0x30, 0xF0,
+0x20, 0x6A, 0xA0, 0xF6, 0x7C, 0x9A, 0xFC, 0x6A,
+0x80, 0xA3, 0x8C, 0xEA, 0x40, 0xC3, 0x30, 0xF0,
+0x20, 0x6A, 0xE0, 0xF7, 0x74, 0x9A, 0xF8, 0x6A,
+0x80, 0xA3, 0x8C, 0xEA, 0x40, 0xC3, 0x30, 0xF0,
+0x20, 0x6A, 0x61, 0xF3, 0x64, 0x9A, 0x30, 0xF0,
+0x20, 0x6C, 0x61, 0xF3, 0x8C, 0x9C, 0x40, 0x9B,
+0x8C, 0xEA, 0x40, 0xDB, 0x20, 0xE8, 0x00, 0x65,
 0xFD, 0x63, 0x05, 0x62, 0x30, 0xF0, 0x20, 0x6A,
-0x20, 0xF7, 0x6C, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
-0x20, 0xF7, 0x48, 0x9A, 0x60, 0xDA, 0x30, 0xF0,
+0xA1, 0xF0, 0xB0, 0x9A, 0x01, 0xF0, 0x08, 0x6C,
+0x03, 0x6E, 0x00, 0x18, 0xF8, 0x1B, 0x05, 0x97,
+0x03, 0x63, 0x00, 0xEF, 0xFD, 0x63, 0x05, 0x62,
+0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF0, 0xB0, 0x9A,
+0x01, 0xF0, 0x08, 0x6C, 0x00, 0x6E, 0x00, 0x18,
+0xF8, 0x1B, 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF,
+0xFB, 0x63, 0x09, 0x62, 0x08, 0xD1, 0x07, 0xD0,
+0xAA, 0x35, 0x04, 0xD5, 0x04, 0x67, 0x01, 0x69,
+0x08, 0x10, 0x80, 0xA8, 0xC1, 0x98, 0x01, 0x6D,
+0xAB, 0xED, 0x00, 0x18, 0xF8, 0x1B, 0x02, 0x49,
+0x08, 0x48, 0x04, 0x92, 0x43, 0xE9, 0xF5, 0x61,
+0x09, 0x97, 0x08, 0x91, 0x07, 0x90, 0x05, 0x63,
+0x00, 0xEF, 0x00, 0x65, 0xFB, 0x63, 0x09, 0x62,
+0x08, 0xD1, 0x07, 0xD0, 0xAA, 0x35, 0x04, 0xD5,
+0x04, 0x67, 0x01, 0x69, 0x08, 0x10, 0x80, 0xA8,
+0xC1, 0x98, 0x01, 0x6D, 0xAB, 0xED, 0x00, 0x18,
+0xF8, 0x1B, 0x02, 0x49, 0x08, 0x48, 0x04, 0x92,
+0x43, 0xE9, 0xF5, 0x61, 0x09, 0x97, 0x08, 0x91,
+0x07, 0x90, 0x05, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0xFB, 0x63, 0x09, 0x62, 0x08, 0xD1, 0x07, 0xD0,
+0xAA, 0x35, 0x24, 0x67, 0x04, 0xD5, 0x00, 0x68,
+0x14, 0x10, 0x08, 0x33, 0x6D, 0xE1, 0x60, 0x9B,
+0x48, 0x34, 0x91, 0xE1, 0xE1, 0xF7, 0x1E, 0x73,
+0xE0, 0x9C, 0x02, 0x61, 0x02, 0x67, 0x09, 0x10,
+0xFF, 0xF7, 0x1F, 0x6D, 0x01, 0x6E, 0x01, 0x6C,
+0x6C, 0xED, 0xCB, 0xEE, 0x00, 0x18, 0x1E, 0x1C,
+0x02, 0x48, 0x04, 0x93, 0x41, 0x40, 0x63, 0xEA,
+0xE8, 0x61, 0x09, 0x97, 0x08, 0x91, 0x07, 0x90,
+0x05, 0x63, 0x00, 0xEF, 0xFB, 0x63, 0x09, 0x62,
+0x08, 0xD1, 0x07, 0xD0, 0xAA, 0x35, 0x24, 0x67,
+0x04, 0xD5, 0x00, 0x68, 0x14, 0x10, 0x08, 0x33,
+0x6D, 0xE1, 0x60, 0x9B, 0x48, 0x34, 0x91, 0xE1,
+0xE1, 0xF7, 0x1E, 0x73, 0xE0, 0x9C, 0x02, 0x61,
+0x02, 0x67, 0x09, 0x10, 0xFF, 0xF7, 0x1F, 0x6D,
+0x01, 0x6E, 0x00, 0x6C, 0x6C, 0xED, 0xCB, 0xEE,
+0x00, 0x18, 0x1E, 0x1C, 0x02, 0x48, 0x04, 0x93,
+0x41, 0x40, 0x63, 0xEA, 0xE8, 0x61, 0x09, 0x97,
+0x08, 0x91, 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF,
+0xFC, 0x63, 0x07, 0x62, 0xE0, 0xF3, 0x10, 0x6C,
+0x04, 0x05, 0x00, 0x18, 0xDD, 0x1E, 0x7D, 0x67,
+0x50, 0x83, 0x00, 0x52, 0x19, 0x61, 0x30, 0xF0,
+0x20, 0x6A, 0x41, 0xF3, 0x5C, 0x9A, 0x60, 0xA2,
+0xFF, 0x6A, 0x6C, 0xEA, 0xA5, 0x72, 0x10, 0x60,
+0x30, 0xF0, 0x20, 0x6A, 0xE0, 0xF7, 0x54, 0x9A,
+0x00, 0x6B, 0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A,
+0x81, 0xF3, 0x60, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
+0x60, 0xF5, 0x50, 0x9A, 0x60, 0xDA, 0xF0, 0x17,
+0x07, 0x97, 0x04, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0xFD, 0x63, 0x05, 0x62, 0x30, 0xF0, 0x20, 0x6A,
+0x60, 0xF5, 0x74, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
+0x60, 0xF5, 0x50, 0x9A, 0x60, 0xDA, 0x30, 0xF0,
 0x20, 0x6A, 0x00, 0xF0, 0x00, 0x4A, 0x30, 0xF0,
-0x20, 0x6B, 0xEF, 0x9A, 0x20, 0xF7, 0x70, 0x9B,
+0x20, 0x6B, 0xEF, 0x9A, 0x60, 0xF5, 0x78, 0x9B,
 0x8C, 0x9A, 0xCE, 0x9A, 0xAD, 0x9A, 0xE0, 0xDB,
-0x30, 0xF0, 0x20, 0x6B, 0x20, 0xF7, 0x74, 0x9B,
-0xC0, 0xDB, 0x30, 0xF0, 0x20, 0x6B, 0x20, 0xF7,
-0x78, 0x9B, 0xA0, 0xDB, 0x30, 0xF0, 0x20, 0x6B,
-0x20, 0xF7, 0x7C, 0x9B, 0x80, 0xDB, 0x30, 0xF0,
-0x20, 0x6B, 0x89, 0x9A, 0x40, 0xF7, 0x60, 0x9B,
+0x30, 0xF0, 0x20, 0x6B, 0x60, 0xF5, 0x7C, 0x9B,
+0xC0, 0xDB, 0x30, 0xF0, 0x20, 0x6B, 0x80, 0xF5,
+0x60, 0x9B, 0xA0, 0xDB, 0x30, 0xF0, 0x20, 0x6B,
+0x80, 0xF5, 0x64, 0x9B, 0x80, 0xDB, 0x30, 0xF0,
+0x20, 0x6B, 0x89, 0x9A, 0x80, 0xF5, 0x68, 0x9B,
 0x80, 0xDB, 0x68, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
-0x40, 0xF7, 0x44, 0x9A, 0x60, 0xDA, 0x00, 0x18,
-0xBD, 0x0B, 0xFF, 0x17, 0x71, 0xAC, 0x4A, 0x9C,
+0x80, 0xF5, 0x4C, 0x9A, 0x60, 0xDA, 0x00, 0x18,
+0x7C, 0x0A, 0xFF, 0x17, 0x71, 0xAC, 0x4A, 0x9C,
 0x6A, 0x33, 0x68, 0x33, 0x6D, 0xE2, 0x04, 0x6A,
 0x6C, 0xEA, 0x01, 0x22, 0xFC, 0x4B, 0x48, 0x43,
 0xC8, 0x4A, 0xC2, 0x67, 0x00, 0x6F, 0xE0, 0xDE,
@@ -2619,10 +2415,10 @@ u8 array_mp_8822b_fw_ap[] = {
 0x40, 0x4A, 0x49, 0xDC, 0xAB, 0xDC, 0x20, 0xE8,
 0x49, 0x9C, 0x10, 0x4A, 0x20, 0xE8, 0x00, 0x65,
 0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x05, 0x67,
-0x00, 0x18, 0xAE, 0x09, 0x00, 0xDA, 0x05, 0x97,
+0x00, 0x18, 0x6A, 0x08, 0x00, 0xDA, 0x05, 0x97,
 0x04, 0x90, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
-0x05, 0x67, 0x26, 0x67, 0x00, 0x18, 0xAE, 0x09,
+0x05, 0x67, 0x26, 0x67, 0x00, 0x18, 0x6A, 0x08,
 0x40, 0x9A, 0x00, 0xDA, 0x21, 0xDA, 0x07, 0x97,
 0x06, 0x91, 0x05, 0x90, 0x04, 0x63, 0x00, 0xEF,
 0x60, 0xA4, 0xC2, 0xA5, 0x41, 0x9C, 0x02, 0x10,
@@ -2636,14 +2432,14 @@ u8 array_mp_8822b_fw_ap[] = {
 0x08, 0x60, 0x61, 0x9A, 0x03, 0x23, 0x82, 0xDB,
 0x00, 0x6B, 0x61, 0xDA, 0x00, 0x6B, 0x62, 0xDA,
 0x20, 0xE8, 0x00, 0x6B, 0x61, 0xDA, 0x20, 0xE8,
-0x30, 0xF0, 0x20, 0x6A, 0x2F, 0xF3, 0x0C, 0x4A,
+0x30, 0xF0, 0x20, 0x6A, 0xCF, 0xF7, 0x04, 0x4A,
 0x61, 0x9A, 0x61, 0xDC, 0x00, 0x6B, 0x62, 0xDC,
 0x81, 0xDA, 0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6B,
-0x2F, 0xF3, 0x0C, 0x4B, 0x30, 0xF0, 0x20, 0x6C,
-0x41, 0x9B, 0x6F, 0xF3, 0x84, 0x9C, 0xA2, 0xA2,
+0xCF, 0xF7, 0x04, 0x4B, 0x30, 0xF0, 0x20, 0x6C,
+0x41, 0x9B, 0xEF, 0xF7, 0x9C, 0x9C, 0xA2, 0xA2,
 0x82, 0xA4, 0xAE, 0xEC, 0x02, 0x24, 0x00, 0x6A,
 0x20, 0xE8, 0x81, 0x9A, 0x81, 0xDB, 0x20, 0xE8,
-0x30, 0xF0, 0x20, 0x6B, 0x4F, 0xF3, 0x00, 0x4B,
+0x30, 0xF0, 0x20, 0x6B, 0xCF, 0xF7, 0x18, 0x4B,
 0xC3, 0x9B, 0xFF, 0xF7, 0x1F, 0x6A, 0xAC, 0xEA,
 0x00, 0x6D, 0x04, 0x26, 0xA1, 0xAB, 0x0D, 0x10,
 0xC3, 0x9B, 0x08, 0x2E, 0x00, 0x6E, 0xAB, 0xE2,
@@ -2654,36 +2450,36 @@ u8 array_mp_8822b_fw_ap[] = {
 0x01, 0x26, 0x84, 0xDE, 0x4B, 0xE5, 0x4A, 0xCC,
 0xAA, 0xAB, 0x4B, 0xE5, 0x4A, 0xCB, 0x20, 0xE8,
 0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x30, 0xF0,
-0x20, 0x6A, 0x4F, 0xF3, 0x00, 0x4A, 0x63, 0x9A,
+0x20, 0x6A, 0xCF, 0xF7, 0x18, 0x4A, 0x63, 0x9A,
 0x3C, 0x23, 0x61, 0xAA, 0xFF, 0x4B, 0x61, 0xCA,
 0x30, 0x10, 0x42, 0x98, 0x09, 0x22, 0x81, 0x98,
 0x81, 0xDA, 0x41, 0x98, 0x03, 0x22, 0x82, 0x98,
 0x82, 0xDA, 0x61, 0xD8, 0x00, 0x6A, 0x42, 0xD8,
-0x30, 0xF0, 0x20, 0x6C, 0x2F, 0xF3, 0x0C, 0x4C,
-0xB0, 0x67, 0x00, 0x18, 0xBE, 0x09, 0x6A, 0xA8,
-0x30, 0xF0, 0x20, 0x6A, 0x4F, 0xF3, 0x62, 0xCA,
+0x30, 0xF0, 0x20, 0x6C, 0xCF, 0xF7, 0x04, 0x4C,
+0xB0, 0x67, 0x00, 0x18, 0x7A, 0x08, 0x6A, 0xA8,
+0x30, 0xF0, 0x20, 0x6A, 0xCF, 0xF7, 0x7A, 0xCA,
 0x41, 0xA0, 0x04, 0x72, 0x07, 0x61, 0x30, 0xF0,
-0x20, 0x6A, 0x4F, 0xF3, 0x7C, 0x9A, 0x4B, 0xA8,
+0x20, 0x6A, 0xEF, 0xF7, 0x74, 0x9A, 0x4B, 0xA8,
 0x49, 0xE3, 0x4A, 0xC8, 0x01, 0x6A, 0x63, 0x98,
-0x41, 0xC0, 0x30, 0xF0, 0x20, 0x6A, 0x4F, 0xF3,
-0x00, 0x4A, 0x63, 0xDA, 0x63, 0x98, 0x03, 0x23,
+0x41, 0xC0, 0x30, 0xF0, 0x20, 0x6A, 0xCF, 0xF7,
+0x18, 0x4A, 0x63, 0xDA, 0x63, 0x98, 0x03, 0x23,
 0x44, 0xDB, 0x00, 0x6A, 0x43, 0xD8, 0x00, 0x6A,
-0x44, 0xD8, 0x30, 0xF0, 0x20, 0x6A, 0x4F, 0xF3,
-0x00, 0x4A, 0x61, 0xAA, 0x02, 0x2B, 0x03, 0x9A,
+0x44, 0xD8, 0x30, 0xF0, 0x20, 0x6A, 0xCF, 0xF7,
+0x18, 0x4A, 0x61, 0xAA, 0x02, 0x2B, 0x03, 0x9A,
 0xC8, 0x28, 0x05, 0x97, 0x04, 0x90, 0x03, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0x42, 0x9C, 0x07, 0x22,
 0x61, 0x9C, 0x61, 0xDA, 0x41, 0x9C, 0x10, 0x22,
 0x62, 0x9C, 0x62, 0xDA, 0x20, 0xE8, 0x30, 0xF0,
-0x20, 0x6A, 0x2F, 0xF3, 0x0C, 0x4A, 0x07, 0x10,
+0x20, 0x6A, 0xCF, 0xF7, 0x04, 0x4A, 0x07, 0x10,
 0x61, 0x9A, 0x8A, 0xEB, 0x03, 0x61, 0x61, 0x9B,
 0x61, 0xDA, 0x20, 0xE8, 0x43, 0x67, 0xF8, 0x2A,
 0x20, 0xE8, 0x00, 0x65, 0xFC, 0x63, 0x07, 0x62,
 0x06, 0xD1, 0x05, 0xD0, 0x02, 0x9C, 0x24, 0x67,
 0x09, 0x28, 0x41, 0xA4, 0x01, 0x72, 0x0F, 0x61,
-0x30, 0xF0, 0x20, 0x68, 0x2F, 0xF3, 0x0C, 0x48,
+0x30, 0xF0, 0x20, 0x68, 0xCF, 0xF7, 0x04, 0x48,
 0x03, 0x10, 0x02, 0x98, 0x40, 0xA0, 0xFD, 0x22,
-0x91, 0x67, 0x00, 0x18, 0x1B, 0x0A, 0x90, 0x67,
-0xB1, 0x67, 0x00, 0x18, 0xBE, 0x09, 0x07, 0x97,
+0x91, 0x67, 0x00, 0x18, 0xD7, 0x08, 0x90, 0x67,
+0xB1, 0x67, 0x00, 0x18, 0x7A, 0x08, 0x07, 0x97,
 0x06, 0x91, 0x05, 0x90, 0x04, 0x63, 0x00, 0xEF,
 0x44, 0x9C, 0x10, 0x22, 0x63, 0x9C, 0x63, 0xDA,
 0x63, 0x9C, 0x09, 0x23, 0x6A, 0xAA, 0xAA, 0xAC,
@@ -2691,988 +2487,1306 @@ u8 array_mp_8822b_fw_ap[] = {
 0x00, 0x6A, 0x43, 0xDC, 0x01, 0x10, 0x6A, 0xCA,
 0x00, 0x6A, 0x44, 0xDC, 0x20, 0xE8, 0x00, 0x65,
 0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
-0x30, 0xF0, 0x20, 0x68, 0xCF, 0xF7, 0x1C, 0x48,
+0x30, 0xF0, 0x21, 0x68, 0x30, 0xF0, 0x14, 0x48,
 0x09, 0xD5, 0x24, 0x67, 0x83, 0xA0, 0xA2, 0x40,
-0xD0, 0x67, 0x00, 0x18, 0x25, 0x10, 0x63, 0xA0,
+0xD0, 0x67, 0x00, 0x18, 0x3C, 0x0F, 0x63, 0xA0,
 0x63, 0xEA, 0x06, 0x60, 0x4C, 0x32, 0x41, 0xE0,
 0x21, 0xD8, 0x09, 0x92, 0x42, 0xD8, 0x03, 0x10,
-0x02, 0x6C, 0x00, 0x18, 0x8C, 0x0B, 0x07, 0x97,
+0x02, 0x6C, 0x00, 0x18, 0x47, 0x0A, 0x07, 0x97,
 0x06, 0x91, 0x05, 0x90, 0x04, 0x63, 0x00, 0xEF,
 0x20, 0xE8, 0x00, 0x65, 0x20, 0xE8, 0x00, 0x65,
-0x30, 0xF0, 0x20, 0x6A, 0x4F, 0xF3, 0x5C, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0xEF, 0xF7, 0x54, 0x9A,
 0x20, 0xE8, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6B,
-0xFF, 0xF7, 0x1F, 0x6A, 0x8C, 0xEA, 0x6F, 0xF3,
-0x84, 0x9B, 0x4B, 0xCC, 0x30, 0xF0, 0x20, 0x6C,
-0x4F, 0xF3, 0x9C, 0x9C, 0x6F, 0xF3, 0x64, 0x9B,
+0xFF, 0xF7, 0x1F, 0x6A, 0x8C, 0xEA, 0xEF, 0xF7,
+0x9C, 0x9B, 0x4B, 0xCC, 0x30, 0xF0, 0x20, 0x6C,
+0xEF, 0xF7, 0x94, 0x9C, 0xEF, 0xF7, 0x7C, 0x9B,
 0x89, 0xE2, 0x4A, 0xCB, 0x20, 0xE8, 0x00, 0x65,
 0xFD, 0x63, 0x05, 0x62, 0x30, 0xF0, 0x20, 0x6A,
-0x6F, 0xF3, 0x44, 0x9A, 0x30, 0xF0, 0x20, 0x6B,
-0x4F, 0xF3, 0x9C, 0x9B, 0x6A, 0xAA, 0xFF, 0xF7,
+0xEF, 0xF7, 0x5C, 0x9A, 0x30, 0xF0, 0x20, 0x6B,
+0xEF, 0xF7, 0x94, 0x9B, 0x6A, 0xAA, 0xFF, 0xF7,
 0x1F, 0x6D, 0x93, 0xE3, 0xAC, 0xEC, 0xAB, 0xAA,
 0x6D, 0xE5, 0x6A, 0xCA, 0x82, 0x32, 0x5E, 0x32,
-0x03, 0x2A, 0x04, 0x6D, 0x00, 0x18, 0xD1, 0x0A,
+0x03, 0x2A, 0x04, 0x6D, 0x00, 0x18, 0x8A, 0x09,
 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFD, 0x63, 0x05, 0x62, 0xFF, 0xF7, 0x1F, 0x6A,
-0x4C, 0xEC, 0x03, 0x6D, 0x00, 0x18, 0xD1, 0x0A,
+0x4C, 0xEC, 0x03, 0x6D, 0x00, 0x18, 0x8A, 0x09,
 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0x20, 0xE8, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x30, 0xF0, 0x20, 0x6A, 0x6F, 0xF3, 0x64, 0x9A,
-0x01, 0x6C, 0x81, 0xC3, 0x6F, 0xF3, 0x84, 0x9A,
-0x00, 0x18, 0xD4, 0x09, 0x00, 0x18, 0x51, 0x0A,
-0x30, 0xF0, 0x20, 0x6A, 0x4F, 0xF3, 0x7C, 0x9A,
-0x01, 0x4B, 0x4F, 0xF3, 0x7C, 0xDA, 0x00, 0x18,
-0xF6, 0x09, 0x30, 0xF0, 0x20, 0x6C, 0x2F, 0xF3,
-0x0C, 0x4C, 0x00, 0x18, 0xCA, 0x09, 0x82, 0x67,
-0x00, 0x18, 0xB4, 0x0A, 0x05, 0x97, 0x03, 0x63,
-0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x04, 0xD0, 0x30, 0xF0, 0x20, 0x6A, 0x6F, 0xF3,
-0x64, 0x9A, 0x01, 0x6C, 0x81, 0xC3, 0x6F, 0xF3,
-0x84, 0x9A, 0x00, 0x18, 0xD4, 0x09, 0x30, 0xF0,
-0x20, 0x6A, 0xCF, 0xF7, 0x1D, 0xA2, 0x1A, 0x10,
-0x0C, 0x33, 0x69, 0xE2, 0x81, 0x9A, 0x60, 0xA4,
-0x04, 0x2B, 0xA4, 0xAA, 0x00, 0x18, 0x34, 0x0F,
-0x02, 0x10, 0x00, 0x18, 0xCF, 0x0E, 0x30, 0xF0,
-0x20, 0x6A, 0xCF, 0xF7, 0x1C, 0x4A, 0x83, 0xA2,
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+0x38, 0x1F, 0x30, 0xF0, 0x20, 0x6A, 0x20, 0xF6,
+0x4C, 0x9A, 0x23, 0x6B, 0x6B, 0xEB, 0x60, 0xC2,
+0x05, 0x11, 0x32, 0x90, 0x40, 0x6A, 0x4B, 0xEA,
+0x0C, 0xEA, 0x6C, 0xEA, 0x04, 0x22, 0x2C, 0x94,
+0x00, 0x18, 0x38, 0x1F, 0xFB, 0x10, 0x30, 0xF0,
+0x20, 0x6A, 0x20, 0xF6, 0x50, 0x9A, 0x2E, 0x94,
+0x49, 0xE1, 0x89, 0xE2, 0x80, 0xA2, 0x30, 0xF0,
+0x20, 0x6A, 0x20, 0xF6, 0x54, 0x9A, 0x6C, 0xEC,
+0x80, 0xC2, 0x30, 0xF0, 0x20, 0x6A, 0x20, 0xF6,
+0x58, 0x9A, 0x2E, 0x95, 0x49, 0xE1, 0xA9, 0xE2,
+0x40, 0xA2, 0x4C, 0xEB, 0x30, 0xF0, 0x20, 0x6A,
+0x20, 0xF6, 0x5C, 0x9A, 0x60, 0xC2, 0x00, 0x6B,
+0x4F, 0x10, 0xFF, 0x6E, 0x02, 0x67, 0xCC, 0xE8,
+0x02, 0x58, 0x34, 0x60, 0xE2, 0xF0, 0x0C, 0x42,
+0x1F, 0xF7, 0x00, 0x6F, 0xEC, 0xE8, 0x02, 0xF0,
+0x00, 0x70, 0x01, 0x60, 0x09, 0x28, 0x30, 0xF0,
+0x20, 0x6E, 0x40, 0xF6, 0x00, 0x9E, 0xC0, 0xA4,
+0x01, 0xE2, 0x1E, 0x65, 0xFF, 0x6E, 0x07, 0x10,
+0x30, 0xF0, 0x20, 0x68, 0x40, 0xF6, 0x04, 0x98,
+0xE0, 0xA4, 0x01, 0xE2, 0x1F, 0x65, 0xF8, 0x67,
+0xEC, 0xEE, 0xC0, 0xC0, 0x1F, 0xF7, 0x00, 0x6E,
+0xAC, 0xEE, 0x02, 0xF0, 0x00, 0x76, 0x01, 0x60,
+0x05, 0x2E, 0x30, 0xF0, 0x20, 0x6E, 0x40, 0xF6,
+0xC8, 0x9E, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6E,
+0x40, 0xF6, 0xCC, 0x9E, 0x68, 0x30, 0xFD, 0x67,
+0x01, 0xE7, 0x15, 0x98, 0xD9, 0xE2, 0x41, 0xE0,
+0x00, 0xA0, 0x00, 0xC6, 0x00, 0xA4, 0xFF, 0x6E,
+0xFF, 0x67, 0x0C, 0xEE, 0x41, 0xE7, 0x00, 0xA0,
+0x0E, 0xEE, 0x06, 0x26, 0x04, 0x02, 0x69, 0xE2,
+0x00, 0x6C, 0x20, 0xF0, 0x80, 0xC2, 0x05, 0x10,
+0x01, 0x4A, 0x06, 0x72, 0x01, 0x4C, 0x01, 0x4D,
+0xB4, 0x61, 0x01, 0x4B, 0xFF, 0x6A, 0x4C, 0xEB,
+0x30, 0xF0, 0x20, 0x6A, 0xC7, 0xF7, 0x5A, 0xA2,
+0x43, 0xEB, 0x11, 0x60, 0x68, 0x32, 0x1D, 0x67,
+0x49, 0xE0, 0xF5, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
+0x00, 0xF6, 0x84, 0x9A, 0x30, 0x92, 0xE2, 0xF0,
+0x0E, 0x6D, 0x91, 0xE1, 0x18, 0x4A, 0x51, 0xE4,
+0xFF, 0x65, 0x00, 0x6A, 0x9A, 0x17, 0x9D, 0x67,
+0x20, 0xF0, 0x70, 0xA4, 0x01, 0x73, 0x12, 0x60,
+0x20, 0xF0, 0x71, 0xA4, 0x01, 0x73, 0x0E, 0x60,
+0x20, 0xF0, 0x72, 0xA4, 0x01, 0x73, 0x0A, 0x60,
+0x20, 0xF0, 0x73, 0xA4, 0x01, 0x73, 0x06, 0x60,
+0x20, 0xF0, 0x74, 0xA4, 0x01, 0x73, 0x02, 0x60,
+0x2F, 0x95, 0x47, 0x25, 0x00, 0x18, 0x10, 0x11,
+0x30, 0xF0, 0x20, 0x6A, 0x40, 0xF6, 0x50, 0x9A,
+0x66, 0x6B, 0x00, 0x6C, 0x60, 0xC2, 0x00, 0x18,
+0xBC, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0xE7, 0xF7,
+0x46, 0xA2, 0x01, 0x6E, 0x2F, 0xD6, 0x4E, 0x22,
+0x30, 0xF0, 0x20, 0x6A, 0x40, 0xF6, 0x74, 0x9A,
+0xFF, 0x6C, 0x01, 0x4C, 0x40, 0x9B, 0x8C, 0xEA,
+0x01, 0x22, 0x80, 0xDB, 0xFF, 0x68, 0x01, 0x48,
+0x00, 0x6C, 0xB0, 0x67, 0x00, 0x18, 0x1B, 0x06,
+0x30, 0xF0, 0x20, 0x6A, 0xE5, 0xF0, 0x10, 0x4A,
+0xE2, 0xF6, 0xD7, 0xA2, 0x09, 0x26, 0x42, 0xF1,
+0x1C, 0x6C, 0x01, 0x6D, 0xCC, 0x36, 0x00, 0x18,
+0x49, 0x1A, 0x01, 0x6F, 0x2F, 0xD7, 0x2E, 0x10,
+0xE2, 0xF6, 0xD8, 0xA2, 0x09, 0x26, 0x42, 0xF1,
+0x1C, 0x6C, 0x01, 0x6D, 0xC4, 0x36, 0x01, 0x68,
+0x00, 0x18, 0x66, 0x1A, 0x2F, 0xD0, 0x22, 0x10,
+0x42, 0xF1, 0x1C, 0x6C, 0x01, 0x6D, 0xD0, 0x67,
+0x00, 0x18, 0x49, 0x1A, 0x01, 0x6A, 0x2F, 0xD2,
+0x19, 0x10, 0x00, 0x6B, 0x9D, 0x67, 0x20, 0xF0,
+0x70, 0xC4, 0x20, 0xF0, 0x71, 0xC4, 0x20, 0xF0,
+0x72, 0xC4, 0x20, 0xF0, 0x73, 0xC4, 0x20, 0xF0,
+0x74, 0xC4, 0x0C, 0x03, 0x69, 0xE2, 0x03, 0x10,
+0x01, 0x6C, 0x80, 0xC3, 0x01, 0x4B, 0x4A, 0xEB,
+0xFB, 0x61, 0x2C, 0x94, 0x00, 0x18, 0x38, 0x1F,
+0x00, 0x6D, 0x2F, 0xD5, 0x2C, 0x91, 0x30, 0xF0,
+0x20, 0x6A, 0x40, 0xF6, 0x58, 0x9A, 0x40, 0xA2,
+0x0D, 0x22, 0x30, 0xF0, 0x20, 0x6E, 0xE5, 0xF0,
+0x10, 0x4E, 0x2D, 0xD6, 0x80, 0xF0, 0x78, 0xA6,
+0x01, 0x6A, 0xFF, 0x6F, 0x6C, 0xEA, 0xEC, 0xEA,
+0x9F, 0xF5, 0x17, 0x2A, 0x37, 0x97, 0x36, 0x91,
+0x35, 0x90, 0x1C, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x30, 0xF0,
+0x20, 0x6A, 0x40, 0xF6, 0x5C, 0x9A, 0x30, 0xF0,
+0x20, 0x6B, 0x60, 0xF6, 0x60, 0x9B, 0x40, 0x9A,
+0x30, 0xF0, 0x20, 0x68, 0xE5, 0xF0, 0x10, 0x48,
+0x6C, 0xEA, 0x62, 0xF1, 0x44, 0xD8, 0x30, 0xF0,
+0x20, 0x6A, 0x60, 0xF6, 0x64, 0x9A, 0x30, 0xF0,
+0x20, 0x6C, 0x60, 0xF6, 0x88, 0x9C, 0x40, 0x9B,
+0x8D, 0xEA, 0x40, 0xDB, 0x80, 0xF0, 0x78, 0xA0,
+0x01, 0x6A, 0x01, 0x6C, 0x6D, 0xEA, 0x80, 0xF0,
+0x58, 0xC0, 0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF5,
+0xA0, 0x9A, 0x00, 0x18, 0xB7, 0x05, 0x30, 0xF0,
+0x20, 0x6A, 0x60, 0xF6, 0x4C, 0x9A, 0x30, 0xF0,
+0x20, 0x6C, 0x60, 0xF6, 0x94, 0x9C, 0x60, 0xA2,
+0x07, 0x6A, 0x6C, 0xEA, 0x01, 0x4A, 0xE2, 0xF6,
+0x4A, 0xC0, 0x00, 0x6A, 0xE2, 0xF6, 0x48, 0xC8,
+0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF6, 0x70, 0x9A,
+0x40, 0x9B, 0x8C, 0xEA, 0x40, 0xDB, 0x05, 0x97,
+0x04, 0x90, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0xFD, 0x63, 0x05, 0x62, 0xA4, 0x67, 0x30, 0xF0,
+0x20, 0x6C, 0x85, 0xF1, 0x14, 0x4C, 0x05, 0x6E,
+0x00, 0x18, 0x62, 0x15, 0x05, 0x97, 0x03, 0x63,
+0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
+0xA4, 0x67, 0x30, 0xF0, 0x20, 0x6C, 0x85, 0xF1,
+0x0F, 0x4C, 0x05, 0x6E, 0x00, 0x18, 0x62, 0x15,
+0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
+0x60, 0xA4, 0x01, 0x6A, 0x04, 0x67, 0x6C, 0xEA,
+0x0B, 0x22, 0x00, 0x18, 0xB0, 0x12, 0x30, 0xF0,
+0x20, 0x6A, 0x40, 0xF6, 0x50, 0x9A, 0x00, 0x6B,
+0x60, 0xC2, 0x00, 0x18, 0x7D, 0x1A, 0x1B, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0xE7, 0xF7, 0x46, 0xA2,
+0x14, 0x22, 0xFF, 0x69, 0x01, 0x49, 0x00, 0x6C,
+0xB1, 0x67, 0x00, 0x18, 0x38, 0x06, 0x30, 0xF0,
+0x20, 0x6A, 0x40, 0xF6, 0x74, 0x9A, 0x40, 0x9B,
+0x2C, 0xEA, 0x01, 0x22, 0x20, 0xDB, 0x30, 0xF0,
+0x20, 0x6A, 0x60, 0xF6, 0x58, 0x9A, 0x00, 0x6B,
+0x60, 0xC2, 0x00, 0x18, 0x10, 0x11, 0x61, 0xA0,
+0x30, 0xF0, 0x20, 0x6A, 0xE5, 0xF0, 0x10, 0x4A,
+0x80, 0xF0, 0x79, 0xC2, 0x62, 0xA0, 0x02, 0x6F,
+0x01, 0x68, 0x04, 0x6E, 0x08, 0x6D, 0x10, 0x6C,
+0x6C, 0xE8, 0x6C, 0xEF, 0x6C, 0xEE, 0x6C, 0xED,
+0x6C, 0xEC, 0x80, 0xF0, 0x7A, 0xC2, 0xE2, 0xF6,
+0x0C, 0xC2, 0xE2, 0xF6, 0xED, 0xC2, 0xE2, 0xF6,
+0xCE, 0xC2, 0xE2, 0xF6, 0xAF, 0xC2, 0xE2, 0xF6,
+0x90, 0xC2, 0x07, 0x97, 0x06, 0x91, 0x05, 0x90,
+0x04, 0x63, 0x00, 0xEF, 0x30, 0xF0, 0x20, 0x6A,
+0xE5, 0xF0, 0x10, 0x4A, 0x00, 0x6B, 0x42, 0xF0,
 0x7F, 0xC2, 0x62, 0xF0, 0x60, 0xC2, 0x42, 0xF0,
 0x7E, 0xC2, 0x00, 0x6B, 0x42, 0xF0, 0x7C, 0xCA,
 0x20, 0xE8, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6A,
-0x21, 0xF0, 0x54, 0x9A, 0xFF, 0x6B, 0x80, 0xA2,
+0x60, 0xF6, 0x5C, 0x9A, 0xFF, 0x6B, 0x80, 0xA2,
 0x00, 0xF6, 0x80, 0x34, 0x00, 0xF6, 0x83, 0x34,
 0x00, 0x54, 0x24, 0x60, 0xA0, 0xA2, 0x7F, 0x6C,
 0xAC, 0xEC, 0x80, 0xC2, 0x80, 0xA2, 0x40, 0x6D,
 0x6C, 0xEC, 0xAD, 0xEC, 0x6C, 0xEC, 0x80, 0xC2,
-0x80, 0xA2, 0x30, 0xF0, 0x20, 0x6C, 0x21, 0xF0,
-0x98, 0x9C, 0x3F, 0x6D, 0x80, 0xA4, 0x30, 0xF0,
-0x20, 0x6C, 0x21, 0xF0, 0x9C, 0x9C, 0x80, 0xA4,
-0x30, 0xF0, 0x20, 0x6C, 0x41, 0xF0, 0x80, 0x9C,
+0x80, 0xA2, 0x30, 0xF0, 0x20, 0x6C, 0x80, 0xF6,
+0x80, 0x9C, 0x3F, 0x6D, 0x80, 0xA4, 0x30, 0xF0,
+0x20, 0x6C, 0x80, 0xF6, 0x84, 0x9C, 0x80, 0xA4,
+0x30, 0xF0, 0x20, 0x6C, 0x80, 0xF6, 0x88, 0x9C,
 0x80, 0xA4, 0x80, 0xA2, 0x6C, 0xEC, 0xAD, 0xEC,
 0x6C, 0xEC, 0x80, 0xC2, 0x80, 0xA2, 0xBF, 0x6B,
 0x8C, 0xEB, 0x60, 0xC2, 0x20, 0xE8, 0x00, 0x65,
@@ -3681,67 +3795,75 @@ u8 array_mp_8822b_fw_ap[] = {
 0x4C, 0xE9, 0x03, 0x6B, 0x4C, 0xEF, 0x2C, 0xEB,
 0x00, 0x6A, 0x0B, 0xD5, 0x0C, 0xD6, 0x04, 0xD7,
 0x40, 0xC8, 0x00, 0x6A, 0x07, 0x23, 0x25, 0x10,
-0x0A, 0x6C, 0x00, 0x18, 0x3A, 0x14, 0x40, 0xA8,
+0x0A, 0x6C, 0x00, 0x18, 0x51, 0x15, 0x40, 0xA8,
 0x01, 0x4A, 0x40, 0xC8, 0x1F, 0xF7, 0x00, 0x6A,
 0x2C, 0xEA, 0x02, 0xF0, 0x00, 0x72, 0x01, 0x60,
-0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x40, 0xF7,
-0x5C, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0x60, 0xF7, 0x40, 0x9A, 0x49, 0xE1, 0x0B, 0x93,
+0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x80, 0xF6,
+0x4C, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
+0x80, 0xF6, 0x50, 0x9A, 0x49, 0xE1, 0x0B, 0x93,
 0x40, 0x9A, 0x6C, 0xEA, 0x0C, 0x93, 0x6E, 0xEA,
 0x04, 0x22, 0x40, 0xA8, 0x04, 0x93, 0x63, 0xEA,
 0xDF, 0x61, 0x40, 0xA8, 0x04, 0x93, 0x63, 0xEA,
 0x58, 0x67, 0x09, 0x97, 0x08, 0x91, 0x07, 0x90,
 0x05, 0x63, 0x00, 0xEF, 0xFF, 0x6A, 0xA0, 0x35,
 0x4C, 0xEC, 0xA0, 0x35, 0xCC, 0xEA, 0x4D, 0xED,
-0x05, 0x2C, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF0,
-0x44, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0x41, 0xF0, 0x48, 0x9A, 0x30, 0xF0, 0x20, 0x6B,
-0x41, 0xF0, 0x8C, 0x9B, 0x30, 0xF0, 0x20, 0x6B,
-0x41, 0xF0, 0x70, 0x9B, 0xAD, 0xEA, 0x40, 0xDC,
-0x4C, 0xEB, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF0,
-0x54, 0x9A, 0x60, 0xDC, 0x00, 0x6B, 0x60, 0xC2,
+0x05, 0x2C, 0x30, 0xF0, 0x20, 0x6A, 0x80, 0xF6,
+0x54, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
+0x80, 0xF6, 0x58, 0x9A, 0x30, 0xF0, 0x20, 0x6B,
+0x80, 0xF6, 0x9C, 0x9B, 0x30, 0xF0, 0x20, 0x6B,
+0xA0, 0xF6, 0x60, 0x9B, 0xAD, 0xEA, 0x40, 0xDC,
+0x4C, 0xEB, 0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF6,
+0x44, 0x9A, 0x60, 0xDC, 0x00, 0x6B, 0x60, 0xC2,
 0x20, 0xE8, 0x00, 0x65, 0xFF, 0x6A, 0xFF, 0xF7,
 0x1F, 0x6B, 0x8C, 0xEA, 0xAC, 0xEB, 0x05, 0x22,
-0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF0, 0x58, 0x9A,
-0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF7,
-0x4C, 0x9A, 0x60, 0x33, 0x60, 0x33, 0x4D, 0xEB,
-0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF0, 0x4C, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF6, 0x48, 0x9A,
+0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF5,
+0x50, 0x9A, 0x60, 0x33, 0x60, 0x33, 0x4D, 0xEB,
+0x30, 0xF0, 0x20, 0x6A, 0x80, 0xF6, 0x5C, 0x9A,
 0x00, 0x6C, 0x60, 0xDA, 0x30, 0xF0, 0x20, 0x6A,
-0x41, 0xF0, 0x5C, 0x9A, 0x30, 0xF0, 0x20, 0x6B,
-0x41, 0xF0, 0x74, 0x9B, 0x40, 0xA2, 0x80, 0xC3,
+0xA0, 0xF6, 0x4C, 0x9A, 0x30, 0xF0, 0x20, 0x6B,
+0xA0, 0xF6, 0x64, 0x9B, 0x40, 0xA2, 0x80, 0xC3,
 0xFF, 0x6B, 0x6C, 0xEA, 0x20, 0xE8, 0x00, 0x65,
-0x30, 0xF0, 0x20, 0x6B, 0x61, 0xF0, 0x60, 0x9B,
+0x30, 0xF0, 0x20, 0x6B, 0xA0, 0xF6, 0x70, 0x9B,
 0xFF, 0x6A, 0xCC, 0xEA, 0x6D, 0xEA, 0xE0, 0xF1,
 0x1F, 0x6B, 0xAC, 0xEB, 0x30, 0xF0, 0x20, 0x6C,
-0x41, 0xF0, 0x8C, 0x9C, 0x60, 0x33, 0x60, 0x33,
+0x80, 0xF6, 0x9C, 0x9C, 0x60, 0x33, 0x60, 0x33,
 0x6D, 0xEA, 0x40, 0xDC, 0x30, 0xF0, 0x20, 0x6A,
-0x61, 0xF0, 0x44, 0x9A, 0x6D, 0xEA, 0x40, 0xDC,
+0xA0, 0xF6, 0x54, 0x9A, 0x6D, 0xEA, 0x40, 0xDC,
 0x20, 0xE8, 0x00, 0x65, 0xE0, 0xF1, 0x1F, 0x6A,
-0x30, 0xF0, 0x20, 0x6B, 0x61, 0xF0, 0x64, 0x9B,
+0x30, 0xF0, 0x20, 0x6B, 0xA0, 0xF6, 0x74, 0x9B,
 0xAC, 0xEA, 0x40, 0x32, 0x40, 0x32, 0x6D, 0xEA,
-0x30, 0xF0, 0x20, 0x6B, 0x41, 0xF0, 0x6C, 0x9B,
-0x40, 0xDB, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF0,
-0x5C, 0x9A, 0xFF, 0x6B, 0x40, 0xA2, 0x6C, 0xEA,
-0x20, 0xE8, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6A,
-0x61, 0xF0, 0x48, 0x9A, 0x40, 0xAA, 0x20, 0xE8,
-0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF0, 0x48, 0x9A,
+0x30, 0xF0, 0x20, 0x6B, 0x80, 0xF6, 0x7C, 0x9B,
+0x40, 0xDB, 0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF6,
+0x4C, 0x9A, 0xFF, 0x6B, 0x40, 0xA2, 0x6C, 0xEA,
+0x20, 0xE8, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6B,
+0xA0, 0xF6, 0xD8, 0x9B, 0xFF, 0x6A, 0x04, 0x6D,
+0x60, 0xA6, 0x4C, 0xEC, 0x4C, 0xEB, 0xAD, 0xEB,
+0x4C, 0xEB, 0x60, 0xC6, 0x0A, 0x24, 0x30, 0xF0,
+0x20, 0x6B, 0xA0, 0xF6, 0x9C, 0x9B, 0x60, 0xA4,
+0x4C, 0xEB, 0xAD, 0xEB, 0x4C, 0xEB, 0x60, 0xC4,
+0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF6,
+0x7C, 0x9A, 0xFB, 0x6A, 0x80, 0xA3, 0x8C, 0xEA,
+0x40, 0xC3, 0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6A,
+0xC0, 0xF6, 0x40, 0x9A, 0x40, 0xAA, 0x20, 0xE8,
+0x30, 0xF0, 0x20, 0x6A, 0xC0, 0xF6, 0x40, 0x9A,
 0x40, 0xAA, 0x20, 0xE8, 0xFD, 0x63, 0x05, 0x62,
 0x04, 0xD0, 0x04, 0xF7, 0x10, 0x68, 0x10, 0x10,
-0x05, 0x6C, 0xFF, 0x48, 0x00, 0x18, 0x3A, 0x14,
-0x0B, 0x28, 0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF0,
-0x6C, 0x9A, 0x08, 0xF0, 0x00, 0x6C, 0x40, 0x9B,
+0x05, 0x6C, 0xFF, 0x48, 0x00, 0x18, 0x51, 0x15,
+0x0B, 0x28, 0x30, 0xF0, 0x20, 0x6A, 0xC0, 0xF6,
+0x64, 0x9A, 0x08, 0xF0, 0x00, 0x6C, 0x40, 0x9B,
 0x8D, 0xEA, 0x40, 0xDB, 0x00, 0x6A, 0x09, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF0, 0x48, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0xC0, 0xF6, 0x40, 0x9A,
 0x60, 0xAA, 0x3F, 0x6A, 0x6C, 0xEA, 0xE8, 0x2A,
 0x01, 0x6A, 0x05, 0x97, 0x04, 0x90, 0x03, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0xFC, 0x63, 0x07, 0x62,
 0x06, 0xD1, 0x05, 0xD0, 0x01, 0x68, 0x04, 0xEC,
 0x82, 0xF3, 0x08, 0x69, 0x10, 0x10, 0x01, 0x6C,
-0xFF, 0x49, 0x00, 0x18, 0x3A, 0x14, 0x0B, 0x29,
-0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF0, 0x6C, 0x9A,
+0xFF, 0x49, 0x00, 0x18, 0x51, 0x15, 0x0B, 0x29,
+0x30, 0xF0, 0x20, 0x6A, 0xC0, 0xF6, 0x64, 0x9A,
 0x08, 0xF0, 0x00, 0x6C, 0x40, 0x9B, 0x8D, 0xEA,
 0x40, 0xDB, 0x00, 0x6A, 0x0B, 0x10, 0x30, 0xF0,
-0x20, 0x6A, 0x61, 0xF0, 0x48, 0x9A, 0x60, 0xAA,
+0x20, 0x6A, 0xC0, 0xF6, 0x40, 0x9A, 0x60, 0xAA,
 0xFF, 0xF7, 0x1F, 0x6A, 0x6C, 0xEA, 0x0C, 0xEA,
 0xE6, 0x2A, 0x01, 0x6A, 0x07, 0x97, 0x06, 0x91,
 0x05, 0x90, 0x04, 0x63, 0x00, 0xEF, 0x00, 0x65,
@@ -3749,621 +3871,605 @@ u8 array_mp_8822b_fw_ap[] = {
 0x0E, 0x92, 0x04, 0x67, 0x0F, 0x91, 0x04, 0xD2,
 0x04, 0x93, 0xFF, 0x6A, 0x4C, 0xE8, 0x4C, 0xEB,
 0x90, 0x67, 0x0B, 0xD5, 0x0C, 0xD6, 0x0D, 0xD7,
-0x04, 0xD3, 0x4C, 0xE9, 0x00, 0x18, 0x69, 0x12,
+0x04, 0xD3, 0x4C, 0xE9, 0x00, 0x18, 0xB1, 0x13,
 0x80, 0xF0, 0x07, 0x22, 0x06, 0x58, 0x80, 0xF0,
 0x04, 0x60, 0x30, 0xF0, 0x20, 0x6A, 0x08, 0x30,
-0xC0, 0xF1, 0x1C, 0x4A, 0x09, 0xE2, 0x40, 0x9A,
+0x20, 0xF2, 0x1C, 0x4A, 0x09, 0xE2, 0x40, 0x9A,
 0x00, 0xEA, 0x02, 0xF2, 0x10, 0x6A, 0x0E, 0x10,
 0x02, 0xF2, 0x00, 0x6A, 0x0B, 0x10, 0x22, 0xF2,
 0x00, 0x6A, 0x08, 0x10, 0x22, 0xF2, 0x10, 0x6A,
 0x05, 0x10, 0x42, 0xF2, 0x00, 0x6A, 0x02, 0x10,
 0x42, 0xF2, 0x10, 0x6A, 0x30, 0xF0, 0x20, 0x6B,
-0x0D, 0x94, 0x01, 0xF0, 0x74, 0x9B, 0x8C, 0xEB,
-0x30, 0xF0, 0x20, 0x6C, 0x40, 0xF7, 0x90, 0x9C,
+0x0D, 0x94, 0x60, 0xF6, 0x60, 0x9B, 0x8C, 0xEB,
+0x30, 0xF0, 0x20, 0x6C, 0x80, 0xF5, 0x9C, 0x9C,
 0x8D, 0xEB, 0x06, 0x21, 0x30, 0xF0, 0x20, 0x6C,
-0x61, 0xF0, 0x90, 0x9C, 0x6D, 0xEC, 0x05, 0x10,
-0x30, 0xF0, 0x20, 0x6C, 0x61, 0xF0, 0x94, 0x9C,
+0xC0, 0xF6, 0x88, 0x9C, 0x6D, 0xEC, 0x05, 0x10,
+0x30, 0xF0, 0x20, 0x6C, 0xC0, 0xF6, 0x8C, 0x9C,
 0x6C, 0xEC, 0x04, 0x96, 0x06, 0x26, 0x30, 0xF0,
-0x20, 0x6B, 0x61, 0xF0, 0x64, 0x9B, 0x8D, 0xEB,
-0x05, 0x10, 0x30, 0xF0, 0x20, 0x6B, 0x61, 0xF0,
-0x78, 0x9B, 0x8C, 0xEB, 0x1F, 0xF7, 0x00, 0x6C,
+0x20, 0x6B, 0xA0, 0xF6, 0x74, 0x9B, 0x8D, 0xEB,
+0x05, 0x10, 0x30, 0xF0, 0x20, 0x6B, 0xC0, 0xF6,
+0x70, 0x9B, 0x8C, 0xEB, 0x1F, 0xF7, 0x00, 0x6C,
 0x4C, 0xEC, 0x02, 0xF0, 0x00, 0x74, 0x01, 0x60,
-0x05, 0x2C, 0x30, 0xF0, 0x20, 0x6C, 0x40, 0xF7,
-0xBC, 0x9C, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6C,
-0x60, 0xF7, 0xA0, 0x9C, 0x30, 0xF0, 0x20, 0x6C,
-0x0B, 0x96, 0x61, 0xF0, 0x9C, 0x9C, 0xB5, 0xE2,
+0x05, 0x2C, 0x30, 0xF0, 0x20, 0x6C, 0x80, 0xF6,
+0xAC, 0x9C, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6C,
+0x80, 0xF6, 0xB0, 0x9C, 0x30, 0xF0, 0x20, 0x6C,
+0x0B, 0x96, 0xC0, 0xF6, 0x94, 0x9C, 0xB5, 0xE2,
 0xCC, 0xEC, 0x80, 0xDD, 0x84, 0x42, 0x1F, 0xF7,
 0x00, 0x6D, 0xAC, 0xEC, 0x02, 0xF0, 0x00, 0x74,
 0x01, 0x60, 0x05, 0x2C, 0x30, 0xF0, 0x20, 0x6C,
-0x81, 0xF0, 0xA0, 0x9C, 0x04, 0x10, 0x30, 0xF0,
-0x20, 0x6C, 0x81, 0xF0, 0xA4, 0x9C, 0x30, 0xF0,
-0x20, 0x6C, 0x0C, 0x96, 0x61, 0xF0, 0x9C, 0x9C,
+0xC0, 0xF6, 0xB8, 0x9C, 0x04, 0x10, 0x30, 0xF0,
+0x20, 0x6C, 0xC0, 0xF6, 0xBC, 0x9C, 0x30, 0xF0,
+0x20, 0x6C, 0x0C, 0x96, 0xC0, 0xF6, 0x94, 0x9C,
 0xB5, 0xE2, 0xCC, 0xEC, 0x80, 0xDD, 0x87, 0x42,
 0x01, 0x4C, 0x1F, 0xF7, 0x00, 0x6D, 0xAC, 0xEC,
 0x02, 0xF0, 0x00, 0x74, 0x01, 0x60, 0x05, 0x2C,
-0x30, 0xF0, 0x20, 0x6C, 0x81, 0xF0, 0x88, 0x9C,
-0x04, 0x10, 0x30, 0xF0, 0x20, 0x6C, 0x81, 0xF0,
-0x8C, 0x9C, 0x89, 0xE2, 0x60, 0xDA, 0x01, 0x6A,
+0x30, 0xF0, 0x20, 0x6C, 0xE0, 0xF6, 0x80, 0x9C,
+0x04, 0x10, 0x30, 0xF0, 0x20, 0x6C, 0xE0, 0xF6,
+0x84, 0x9C, 0x89, 0xE2, 0x60, 0xDA, 0x01, 0x6A,
 0x01, 0x10, 0x00, 0x6A, 0x09, 0x97, 0x08, 0x91,
 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x00, 0x68,
-0x01, 0x6A, 0x30, 0xF0, 0x20, 0x6B, 0x20, 0xF7,
-0x68, 0x9B, 0x4E, 0xE8, 0x10, 0xF0, 0x20, 0x6A,
-0x49, 0xF3, 0x01, 0x4A, 0x09, 0xE2, 0x40, 0xDB,
-0x00, 0x18, 0xBD, 0x0B, 0x00, 0x18, 0xDB, 0x11,
-0x00, 0x18, 0xBC, 0x0B, 0x00, 0x18, 0xBD, 0x0B,
-0x30, 0xF0, 0x20, 0x6A, 0xC5, 0xF2, 0x10, 0x4A,
+0x01, 0x6A, 0x30, 0xF0, 0x20, 0x6B, 0x60, 0xF5,
+0x70, 0x9B, 0x4E, 0xE8, 0x10, 0xF0, 0x20, 0x6A,
+0x6A, 0xF0, 0x01, 0x4A, 0x09, 0xE2, 0x40, 0xDB,
+0x00, 0x18, 0x7C, 0x0A, 0x00, 0x18, 0x13, 0x13,
+0x00, 0x18, 0x7B, 0x0A, 0x00, 0x18, 0x7C, 0x0A,
+0x30, 0xF0, 0x20, 0x6A, 0xE5, 0xF0, 0x10, 0x4A,
 0x80, 0xF0, 0x8C, 0x9A, 0x02, 0x6B, 0x8C, 0xEB,
 0x09, 0x23, 0x03, 0x6B, 0x6B, 0xEB, 0x8C, 0xEB,
-0x80, 0xF0, 0x6C, 0xDA, 0x00, 0x18, 0x1B, 0x18,
-0x00, 0x18, 0x71, 0x18, 0x00, 0x18, 0xBC, 0x0B,
-0x00, 0x18, 0xBD, 0x0B, 0x30, 0xF0, 0x20, 0x6A,
-0xC5, 0xF2, 0x10, 0x4A, 0x80, 0xF0, 0x8C, 0x9A,
+0x80, 0xF0, 0x6C, 0xDA, 0x00, 0x18, 0x14, 0x19,
+0x00, 0x18, 0x6A, 0x19, 0x00, 0x18, 0x7B, 0x0A,
+0x00, 0x18, 0x7C, 0x0A, 0x30, 0xF0, 0x20, 0x6A,
+0xE5, 0xF0, 0x10, 0x4A, 0x80, 0xF0, 0x8C, 0x9A,
 0x04, 0x6B, 0x8C, 0xEB, 0x09, 0x23, 0x05, 0x6B,
 0x6B, 0xEB, 0x8C, 0xEB, 0x80, 0xF0, 0x6C, 0xDA,
-0x00, 0x18, 0x3C, 0x16, 0x00, 0x18, 0xF7, 0x15,
-0x00, 0x18, 0xBC, 0x0B, 0x00, 0x18, 0xBD, 0x0B,
-0x30, 0xF0, 0x20, 0x6A, 0xC5, 0xF2, 0x10, 0x4A,
+0x00, 0x18, 0x64, 0x17, 0x00, 0x18, 0x1A, 0x17,
+0x00, 0x18, 0x7B, 0x0A, 0x00, 0x18, 0x7C, 0x0A,
+0x30, 0xF0, 0x20, 0x6A, 0xE5, 0xF0, 0x10, 0x4A,
 0x80, 0xF0, 0x8C, 0x9A, 0x10, 0x6B, 0x8C, 0xEB,
 0x07, 0x23, 0x11, 0x6B, 0x6B, 0xEB, 0x8C, 0xEB,
-0x80, 0xF0, 0x6C, 0xDA, 0x00, 0x18, 0xF6, 0x34,
-0x00, 0x18, 0xBC, 0x0B, 0x30, 0xF0, 0x20, 0x6A,
-0xC7, 0xF5, 0x72, 0xA2, 0x08, 0x6A, 0x6C, 0xEA,
-0x0F, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF0,
-0x58, 0x9A, 0x01, 0x6B, 0x80, 0xA2, 0x8C, 0xEB,
-0x07, 0x23, 0x80, 0xA2, 0xFE, 0x6B, 0x8C, 0xEB,
-0x60, 0xC2, 0x03, 0x6C, 0x00, 0x18, 0x9B, 0x18,
-0x30, 0xF0, 0x20, 0x6A, 0x2F, 0xF3, 0x84, 0x9A,
-0x00, 0x18, 0xD7, 0x0C, 0x91, 0x17, 0x00, 0x65,
-0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x00, 0x68,
-0x30, 0xF0, 0x20, 0x6B, 0x20, 0xF7, 0x68, 0x9B,
-0x10, 0xF0, 0x20, 0x6A, 0x29, 0xF4, 0x09, 0x4A,
-0x0A, 0x70, 0x40, 0xDB, 0x09, 0x61, 0x30, 0xF0,
-0x20, 0x6A, 0x2F, 0xF3, 0x84, 0x9A, 0x01, 0x6D,
-0xAB, 0xED, 0x00, 0x18, 0x0C, 0x0C, 0x00, 0x68,
-0x00, 0x18, 0xBD, 0x0B, 0x30, 0xF0, 0x20, 0x6A,
-0xC5, 0xF2, 0x10, 0x4A, 0x80, 0xF0, 0x8C, 0x9A,
-0x04, 0xF0, 0x00, 0x6B, 0x8C, 0xEB, 0x08, 0x23,
-0x04, 0xF0, 0x01, 0x6B, 0x6B, 0xEB, 0x8C, 0xEB,
-0x80, 0xF0, 0x6C, 0xDA, 0x00, 0x18, 0xBB, 0x03,
-0x00, 0x18, 0xBC, 0x0B, 0x30, 0xF0, 0x20, 0x6B,
-0xFF, 0x6A, 0x01, 0x48, 0x20, 0xF7, 0x68, 0x9B,
-0x4C, 0xE8, 0x10, 0xF0, 0x20, 0x6A, 0x29, 0xF4,
-0x0A, 0x4A, 0x40, 0xDB, 0xC9, 0x17, 0x00, 0x65,
-0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
-0x30, 0xF0, 0x20, 0x6A, 0x20, 0xF7, 0x28, 0x9A,
-0x10, 0xF0, 0x20, 0x68, 0xA9, 0xF4, 0x01, 0x48,
-0x00, 0xD9, 0x30, 0xF0, 0x20, 0x6A, 0x2F, 0xF3,
-0x88, 0x9A, 0x01, 0x6D, 0xAB, 0xED, 0x00, 0x18,
-0x0C, 0x0C, 0x04, 0x6C, 0x00, 0x18, 0xC3, 0x0B,
-0x00, 0x18, 0xCB, 0x13, 0x04, 0x6C, 0x00, 0x18,
-0xBE, 0x0B, 0x08, 0x6C, 0x00, 0x18, 0xC3, 0x0B,
-0x00, 0x18, 0xC7, 0x13, 0x08, 0x6C, 0x00, 0x18,
-0xBE, 0x0B, 0x10, 0x6C, 0x00, 0x18, 0xC3, 0x0B,
-0x00, 0x18, 0xC3, 0x13, 0x10, 0x6C, 0x00, 0x18,
-0xBE, 0x0B, 0x20, 0x6C, 0x00, 0x18, 0xC3, 0x0B,
-0x00, 0x18, 0xBF, 0x13, 0x20, 0x6C, 0x00, 0x18,
-0xBE, 0x0B, 0x40, 0x6C, 0x00, 0x18, 0xC3, 0x0B,
-0x00, 0x18, 0xBB, 0x13, 0x40, 0x6C, 0x00, 0x18,
-0xBE, 0x0B, 0x80, 0x6C, 0x00, 0x18, 0xC3, 0x0B,
-0x01, 0x48, 0x00, 0x18, 0xB7, 0x13, 0x80, 0x6C,
-0x00, 0x18, 0xBE, 0x0B, 0x00, 0xD9, 0xBC, 0x17,
-0x00, 0x6A, 0x64, 0x67, 0x66, 0xEA, 0x01, 0x6D,
-0xAC, 0xEB, 0x04, 0x2B, 0x01, 0x4A, 0x20, 0x72,
-0xF8, 0x61, 0x20, 0x6A, 0x20, 0xE8, 0x00, 0x65,
-0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
-0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF7, 0x40, 0x9A,
-0x25, 0x67, 0x49, 0xE4, 0x00, 0x9A, 0x85, 0x67,
-0x00, 0x18, 0x4C, 0x13, 0x2C, 0xE8, 0x06, 0xEA,
-0x50, 0x67, 0x07, 0x97, 0x06, 0x91, 0x05, 0x90,
-0x04, 0x63, 0x00, 0xEF, 0xFB, 0x63, 0x09, 0x62,
-0x08, 0xD1, 0x07, 0xD0, 0x41, 0x45, 0x05, 0x67,
-0x0C, 0xD6, 0x13, 0x22, 0x30, 0xF0, 0x20, 0x6A,
-0x60, 0xF7, 0x20, 0x9A, 0x0F, 0xE8, 0x25, 0xE4,
-0x40, 0x99, 0x85, 0x67, 0x04, 0xD2, 0x00, 0x18,
-0x4C, 0x13, 0x0C, 0x93, 0x64, 0xEA, 0x43, 0x67,
-0x04, 0x93, 0x6C, 0xE8, 0x0D, 0xEA, 0x40, 0xD9,
-0x07, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF7,
-0x20, 0x9A, 0x0C, 0x92, 0x31, 0xE4, 0x40, 0xDC,
-0x09, 0x97, 0x08, 0x91, 0x07, 0x90, 0x05, 0x63,
-0x00, 0xEF, 0x00, 0x65, 0x41, 0x45, 0x0C, 0x22,
-0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF7, 0x40, 0x9A,
-0xAF, 0xEB, 0xCC, 0xED, 0x51, 0xE4, 0x40, 0x9C,
-0x6C, 0xEA, 0xAD, 0xEA, 0x40, 0xDC, 0x20, 0xE8,
-0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF7, 0x40, 0x9A,
-0x51, 0xE4, 0xC0, 0xDC, 0x20, 0xE8, 0x00, 0x65,
-0x30, 0xF0, 0x20, 0x6B, 0x81, 0xF0, 0x7C, 0x9B,
-0xFF, 0x6A, 0xAC, 0xEA, 0x6D, 0xE4, 0x49, 0xE6,
-0x04, 0x10, 0x80, 0xA3, 0x01, 0x4B, 0x80, 0xC6,
-0x01, 0x4E, 0x4A, 0xEE, 0xFA, 0x61, 0x20, 0xE8,
-0x30, 0xF0, 0x20, 0x6B, 0x81, 0xF0, 0x7C, 0x9B,
-0xFF, 0x6A, 0xAC, 0xEA, 0x6D, 0xE4, 0x49, 0xE6,
-0x04, 0x10, 0x80, 0xA6, 0x01, 0x4E, 0x80, 0xC3,
-0x01, 0x4B, 0x4A, 0xEE, 0xFA, 0x61, 0x20, 0xE8,
-0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF0, 0x50, 0x9A,
-0x30, 0xF0, 0x20, 0x6B, 0x01, 0xF0, 0x74, 0x9B,
-0x40, 0x9A, 0x6C, 0xEA, 0x83, 0xEA, 0x02, 0x60,
-0x4F, 0xEA, 0x51, 0xE4, 0x30, 0xF0, 0x20, 0x6A,
-0xA1, 0xF0, 0x40, 0x9A, 0xFF, 0x6B, 0x51, 0xE4,
-0x40, 0xA4, 0x6C, 0xEA, 0x20, 0xE8, 0x00, 0x65,
-0xFA, 0x63, 0x0B, 0x62, 0x0A, 0xD1, 0x09, 0xD0,
-0xFF, 0x6A, 0xFF, 0xF7, 0x1F, 0x6B, 0x4C, 0xED,
-0x4C, 0xEE, 0x24, 0x67, 0x6C, 0xEF, 0x10, 0x90,
-0x6C, 0xE9, 0x05, 0xD5, 0x06, 0xD6, 0x04, 0xD7,
-0x00, 0x6A, 0x05, 0x10, 0x0A, 0x6C, 0x00, 0x18,
-0x3A, 0x14, 0x40, 0xA8, 0x01, 0x4A, 0x40, 0xC8,
-0x1F, 0xF7, 0x00, 0x6A, 0x2C, 0xEA, 0x02, 0xF0,
-0x00, 0x72, 0x01, 0x60, 0x05, 0x2A, 0x30, 0xF0,
-0x20, 0x6A, 0x40, 0xF7, 0x5C, 0x9A, 0x04, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF7, 0x40, 0x9A,
-0x49, 0xE1, 0x60, 0xA2, 0xFF, 0x6A, 0x6C, 0xEA,
-0x05, 0x93, 0x6C, 0xEA, 0x06, 0x93, 0x6E, 0xEA,
-0x04, 0x22, 0x40, 0xA8, 0x04, 0x93, 0x63, 0xEA,
-0xDD, 0x61, 0x40, 0xA8, 0x04, 0x93, 0x0B, 0x97,
-0x0A, 0x91, 0x09, 0x90, 0x63, 0xEA, 0x58, 0x67,
-0x06, 0x63, 0x00, 0xEF, 0xFD, 0x63, 0x05, 0x62,
-0x00, 0x18, 0xC1, 0x1D, 0x05, 0x97, 0x03, 0x63,
-0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x00, 0x18, 0xBB, 0x1D, 0x05, 0x97, 0x03, 0x63,
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-0x00, 0x18, 0xA7, 0x1D, 0x05, 0x97, 0x03, 0x63,
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 0x7C, 0x4C, 0x49, 0xE0, 0x94, 0x34, 0x40, 0xAA,
 0x91, 0xE1, 0x02, 0x4C, 0xFF, 0x6E, 0x4C, 0xEE,
-0x00, 0x18, 0x4B, 0x14, 0x62, 0xF1, 0x43, 0xA1,
+0x00, 0x18, 0x62, 0x15, 0x62, 0xF1, 0x43, 0xA1,
 0x08, 0x6B, 0x01, 0x4A, 0x62, 0xF1, 0x43, 0xC1,
 0x62, 0xF1, 0x43, 0xA1, 0x6E, 0xEA, 0x02, 0x2A,
 0x62, 0xF1, 0x43, 0xC1, 0x30, 0xF0, 0x20, 0x6A,
-0x41, 0xF3, 0x48, 0x9A, 0x04, 0x93, 0x40, 0x9A,
+0xC1, 0xF1, 0x48, 0x9A, 0x04, 0x93, 0x40, 0x9A,
 0x0E, 0xEA, 0x61, 0xE0, 0x05, 0x2A, 0x30, 0xF0,
-0x20, 0x6A, 0x41, 0xF3, 0x4C, 0x9A, 0x00, 0x9A,
-0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF3, 0x40, 0x9A,
+0x20, 0x6A, 0xC1, 0xF1, 0x4C, 0x9A, 0x00, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0xC1, 0xF1, 0x40, 0x9A,
 0x00, 0xDA, 0x05, 0x92, 0x4A, 0xE8, 0x7F, 0xF7,
 0x08, 0x61, 0x09, 0x97, 0x08, 0x91, 0x07, 0x90,
 0x05, 0x63, 0x00, 0xEF, 0xFD, 0x63, 0x05, 0x62,
-0xA4, 0x67, 0x30, 0xF0, 0x20, 0x6C, 0x65, 0xF3,
-0x00, 0x4C, 0x08, 0x6E, 0x00, 0x18, 0x4B, 0x14,
+0xA4, 0x67, 0x30, 0xF0, 0x20, 0x6C, 0x85, 0xF1,
+0x00, 0x4C, 0x08, 0x6E, 0x00, 0x18, 0x62, 0x15,
 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xE0, 0x63, 0x3F, 0x62, 0x01, 0x6A, 0x7D, 0x67,
 0x4B, 0xEA, 0x50, 0xC3, 0x01, 0x6A, 0x52, 0xC3,
 0x08, 0x6A, 0x53, 0xC3, 0x30, 0xF0, 0x20, 0x6A,
-0xC5, 0xF2, 0x10, 0x4A, 0x62, 0xF1, 0x62, 0xA2,
+0xE5, 0xF0, 0x10, 0x4A, 0x62, 0xF1, 0x62, 0xA2,
 0x7F, 0x4B, 0x04, 0x4B, 0x74, 0x33, 0x49, 0xE3,
 0x42, 0xA2, 0x7F, 0x6B, 0x6C, 0xEA, 0x01, 0x72,
 0x0C, 0x61, 0x48, 0xA4, 0xBD, 0x67, 0x54, 0xC5,
@@ -4372,914 +4478,1121 @@ u8 array_mp_8822b_fw_ap[] = {
 0x0A, 0x10, 0x0E, 0x2A, 0x69, 0xA4, 0xBD, 0x67,
 0x74, 0xC5, 0x68, 0xA4, 0x56, 0xC5, 0x57, 0xC5,
 0x75, 0xC5, 0x46, 0xA4, 0x58, 0xC5, 0x47, 0xA4,
-0x04, 0x04, 0x59, 0xC5, 0x00, 0x18, 0x36, 0x15,
+0x04, 0x04, 0x59, 0xC5, 0x00, 0x18, 0x47, 0x16,
 0x3F, 0x97, 0x20, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFD, 0x63, 0x05, 0x62, 0xFF, 0x6A, 0x4C, 0xEC,
 0x68, 0x44, 0xFA, 0x4B, 0x4C, 0xEB, 0x03, 0x5B,
-0x03, 0x60, 0x00, 0x18, 0x12, 0x26, 0x0C, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF0, 0x6C, 0x9A,
-0x30, 0xF0, 0x20, 0x6C, 0x61, 0xF1, 0x94, 0x9C,
+0x03, 0x60, 0x00, 0x18, 0x69, 0x29, 0x0C, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0xC0, 0xF6, 0x64, 0x9A,
+0x30, 0xF0, 0x20, 0x6C, 0xC0, 0xF7, 0x9C, 0x9C,
 0x40, 0x9B, 0x8D, 0xEA, 0x40, 0xDB, 0xFF, 0x6A,
 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
-0x00, 0xA4, 0x07, 0x6A, 0x30, 0xF0, 0x20, 0x6B,
-0x06, 0x35, 0x4C, 0xED, 0x58, 0xED, 0xC5, 0xF2,
-0x10, 0x4B, 0x01, 0x6F, 0xEC, 0xE8, 0x12, 0xED,
-0x79, 0xE5, 0xA0, 0xF0, 0xBF, 0xA6, 0x1D, 0x65,
-0x02, 0x6D, 0xAB, 0xED, 0x38, 0x67, 0x2C, 0xED,
-0x0D, 0xED, 0xA0, 0xF0, 0xBF, 0xC6, 0xA0, 0xA4,
-0xA6, 0x36, 0x4C, 0xEE, 0x58, 0xEE, 0xBA, 0x35,
-0xEC, 0xED, 0xB8, 0x37, 0x41, 0x6D, 0xAB, 0xED,
-0x12, 0xEE, 0x79, 0xE6, 0xA0, 0xF0, 0x1F, 0xA6,
-0x0C, 0xED, 0xED, 0xED, 0xA0, 0xF0, 0xBF, 0xC6,
-0xE0, 0xA4, 0xE6, 0x35, 0x4C, 0xED, 0x58, 0xED,
-0xFE, 0x37, 0xFC, 0x37, 0x12, 0xED, 0x79, 0xE5,
-0xA0, 0xF0, 0x1F, 0xA6, 0x7F, 0x6D, 0x0C, 0xED,
-0xED, 0xED, 0xA0, 0xF0, 0xBF, 0xC6, 0xA0, 0xA4,
-0x81, 0xA4, 0xA6, 0x35, 0x4C, 0xED, 0x58, 0xED,
-0x12, 0xEA, 0x69, 0xE2, 0xC0, 0xF0, 0x80, 0xC2,
-0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF7, 0x4C, 0x9A,
-0xE0, 0xF7, 0x1F, 0x6C, 0x40, 0x9A, 0x8C, 0xEA,
-0x62, 0xF1, 0x48, 0xDB, 0x30, 0xF0, 0x20, 0x6A,
-0x61, 0xF3, 0x50, 0x9A, 0xA0, 0x9A, 0x00, 0x6A,
-0x62, 0x67, 0x07, 0x6E, 0xD8, 0xEA, 0x30, 0xF0,
-0x20, 0x6C, 0xC5, 0xF2, 0x10, 0x4C, 0x12, 0xEE,
-0x91, 0xE6, 0xA0, 0xF0, 0xDF, 0xA4, 0x01, 0x6C,
-0x8C, 0xEE, 0x08, 0x26, 0x84, 0xEA, 0x6D, 0xEC,
-0x00, 0xF6, 0x80, 0x33, 0x00, 0xF6, 0x63, 0x33,
-0xFF, 0x6C, 0x8C, 0xEB, 0x01, 0x4A, 0x08, 0x72,
-0xE8, 0x61, 0x60, 0x32, 0x40, 0x32, 0x00, 0xF6,
-0x60, 0x33, 0x6D, 0xEA, 0x00, 0x6C, 0x4D, 0xED,
-0x00, 0x18, 0xE1, 0x07, 0x07, 0x97, 0x06, 0x91,
-0x05, 0x90, 0x04, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0xFB, 0x63, 0x09, 0x62, 0x08, 0xD1, 0x07, 0xD0,
-0x05, 0xD4, 0x60, 0xA4, 0x01, 0xA4, 0x02, 0x6A,
-0x6C, 0xEA, 0x24, 0x67, 0x04, 0xD0, 0x18, 0x22,
-0x42, 0xA4, 0x04, 0xD2, 0x15, 0x10, 0x05, 0x93,
+0xFA, 0x63, 0x0B, 0x62, 0x0A, 0xD1, 0x09, 0xD0,
+0x07, 0xD4, 0x60, 0xA4, 0x01, 0xA4, 0x02, 0x6A,
+0x6C, 0xEA, 0x24, 0x67, 0x06, 0xD0, 0x18, 0x22,
+0x42, 0xA4, 0x06, 0xD2, 0x15, 0x10, 0x07, 0x93,
 0x01, 0x6D, 0x90, 0x67, 0x40, 0xA3, 0x4C, 0xED,
-0x00, 0x18, 0x89, 0x10, 0x90, 0x67, 0x00, 0x18,
-0xD5, 0x10, 0x04, 0x2A, 0x90, 0x67, 0x00, 0x18,
-0x68, 0x10, 0x03, 0x10, 0x90, 0x67, 0x00, 0x18,
-0x46, 0x10, 0x01, 0x48, 0xFF, 0x6A, 0x4C, 0xE8,
-0x04, 0x92, 0x03, 0xEA, 0xE8, 0x60, 0x30, 0xF0,
-0x20, 0x6A, 0xC7, 0xF5, 0xB2, 0xA2, 0x60, 0xA1,
+0x00, 0x18, 0x66, 0x0F, 0x90, 0x67, 0x00, 0x18,
+0x5D, 0x0F, 0x04, 0x2A, 0x90, 0x67, 0x00, 0x18,
+0x7C, 0x0F, 0x03, 0x10, 0x90, 0x67, 0x00, 0x18,
+0x81, 0x0F, 0x01, 0x48, 0xFF, 0x6A, 0x4C, 0xE8,
+0x06, 0x92, 0x03, 0xEA, 0xE8, 0x60, 0x30, 0xF0,
+0x20, 0x6A, 0xC8, 0xF0, 0xA0, 0xA2, 0x60, 0xA1,
 0x01, 0x6A, 0xAC, 0xEA, 0x72, 0x34, 0x15, 0x2A,
 0x04, 0x6A, 0x6C, 0xEA, 0xFF, 0x6B, 0x6C, 0xEA,
-0x10, 0x22, 0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF1,
-0x48, 0x9A, 0x00, 0x6B, 0x60, 0xC2, 0x30, 0xF0,
-0x20, 0x6A, 0x61, 0xF3, 0x74, 0x9A, 0x30, 0xF0,
-0x20, 0x6A, 0x20, 0xF7, 0x48, 0x9A, 0x60, 0xDA,
+0x10, 0x22, 0x30, 0xF0, 0x20, 0x6A, 0xE0, 0xF7,
+0x54, 0x9A, 0x00, 0x6B, 0x60, 0xC2, 0x30, 0xF0,
+0x20, 0x6A, 0xE1, 0xF1, 0x70, 0x9A, 0x30, 0xF0,
+0x20, 0x6A, 0x60, 0xF5, 0x50, 0x9A, 0x60, 0xDA,
 0xF0, 0x17, 0x05, 0x74, 0x17, 0x61, 0x30, 0xF0,
-0x20, 0x6A, 0xC7, 0xF5, 0x72, 0xA2, 0x04, 0x6A,
+0x20, 0x6A, 0xC8, 0xF0, 0x60, 0xA2, 0x04, 0x6A,
 0x6C, 0xEA, 0x10, 0x2A, 0x30, 0xF0, 0x20, 0x6A,
-0x81, 0xF1, 0x48, 0x9A, 0x00, 0x6B, 0x60, 0xC2,
-0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF3, 0x78, 0x9A,
-0x30, 0xF0, 0x20, 0x6A, 0x20, 0xF7, 0x48, 0x9A,
-0x60, 0xDA, 0xF0, 0x17, 0x09, 0x97, 0x08, 0x91,
-0x07, 0x90, 0x05, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0xE0, 0xF7, 0x54, 0x9A, 0x00, 0x6B, 0x60, 0xC2,
+0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF1, 0x74, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF5, 0x50, 0x9A,
+0x60, 0xDA, 0xF0, 0x17, 0x30, 0xF0, 0x20, 0x68,
+0xE5, 0xF0, 0x10, 0x48, 0xE2, 0xF6, 0x7C, 0xA0,
+0x02, 0x6A, 0x6C, 0xEA, 0x20, 0x22, 0x03, 0x6A,
+0x4B, 0xEA, 0x6C, 0xEA, 0xE2, 0xF6, 0x5C, 0xC0,
+0x00, 0x18, 0xDE, 0x1C, 0x7D, 0x67, 0x48, 0xCB,
+0x68, 0xAB, 0xE2, 0xF6, 0x9E, 0xA8, 0xFF, 0xF7,
+0x1F, 0x6A, 0x4C, 0xEB, 0x8E, 0xEB, 0x05, 0x23,
+0x7D, 0x67, 0x88, 0xAB, 0x4C, 0xEC, 0x00, 0x18,
+0xFD, 0x1C, 0x30, 0xF0, 0x20, 0x6A, 0xE5, 0xF0,
+0x10, 0x4A, 0xE2, 0xF6, 0x9C, 0xA2, 0x02, 0x6B,
+0x8D, 0xEB, 0xE2, 0xF6, 0x7C, 0xC2, 0x0B, 0x97,
+0x0A, 0x91, 0x09, 0x90, 0x06, 0x63, 0x00, 0xEF,
 0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0xFF, 0x6A,
 0x4C, 0xEC, 0x68, 0x44, 0xC8, 0x4B, 0x4C, 0xEB,
 0x20, 0x5B, 0x05, 0x67, 0x03, 0x60, 0x00, 0x18,
-0xA1, 0x28, 0x55, 0x10, 0x13, 0x74, 0x31, 0x60,
-0x14, 0x5C, 0x0D, 0x60, 0x08, 0x74, 0x21, 0x60,
-0x09, 0x5C, 0x04, 0x60, 0x16, 0x24, 0x01, 0x74,
-0x18, 0x60, 0x3F, 0x10, 0x09, 0x74, 0x1D, 0x60,
-0x0A, 0x74, 0x1F, 0x60, 0x3A, 0x10, 0xC2, 0x74,
-0x30, 0x60, 0xC3, 0x5C, 0x05, 0x60, 0x1E, 0x74,
-0x24, 0x60, 0x1F, 0x74, 0x1E, 0x60, 0x31, 0x10,
-0xC3, 0x74, 0x2B, 0x60, 0xC5, 0x74, 0x21, 0x60,
-0x2C, 0x10, 0x85, 0x67, 0x00, 0x18, 0x45, 0x17,
-0x32, 0x10, 0x85, 0x67, 0x00, 0x18, 0xB4, 0x17,
-0x2E, 0x10, 0x85, 0x67, 0x00, 0x18, 0x70, 0x05,
-0x2A, 0x10, 0x85, 0x67, 0x00, 0x18, 0x69, 0x05,
-0x26, 0x10, 0x85, 0x67, 0x00, 0x18, 0x62, 0x05,
-0x22, 0x10, 0x85, 0x67, 0x00, 0x18, 0x30, 0x06,
-0x1E, 0x10, 0x85, 0x67, 0x00, 0x18, 0xC0, 0x05,
-0x1A, 0x10, 0x85, 0x67, 0x00, 0x18, 0x19, 0x06,
-0x16, 0x10, 0x85, 0x67, 0x00, 0x18, 0x76, 0x17,
-0x12, 0x10, 0x85, 0x67, 0x00, 0x18, 0x9F, 0x05,
-0x0E, 0x10, 0x85, 0x67, 0x00, 0x18, 0xB4, 0x18,
-0x0A, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF0,
-0x6C, 0x9A, 0x01, 0x6C, 0x40, 0x9B, 0x8D, 0xEA,
-0x40, 0xDB, 0x0E, 0x6A, 0x01, 0x10, 0x00, 0x6A,
-0x40, 0xC0, 0x05, 0x97, 0x04, 0x90, 0x03, 0x63,
-0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x04, 0xD0, 0x30, 0xF0, 0x20, 0x68, 0xC5, 0xF2,
-0x10, 0x48, 0x20, 0xF1, 0x57, 0xA0, 0x20, 0xF1,
-0x78, 0xA0, 0x4E, 0xEB, 0x29, 0x23, 0x67, 0x42,
-0x17, 0x4B, 0x6C, 0x33, 0x0D, 0xE3, 0x4C, 0x32,
-0x55, 0xE0, 0x87, 0xA3, 0x7F, 0x4D, 0x79, 0x4D,
-0x00, 0x18, 0xE6, 0x17, 0x20, 0xF1, 0x57, 0xA0,
-0x01, 0x4A, 0x20, 0xF1, 0x57, 0xC0, 0x20, 0xF1,
-0x77, 0xA0, 0x20, 0xF1, 0x58, 0xA0, 0x6E, 0xEA,
-0x06, 0x22, 0x80, 0xF0, 0x4C, 0x98, 0x02, 0x6B,
-0x6D, 0xEA, 0x80, 0xF0, 0x4C, 0xD8, 0x30, 0xF0,
-0x20, 0x6A, 0xC5, 0xF2, 0x10, 0x4A, 0x20, 0xF1,
-0x77, 0xA2, 0x08, 0x6C, 0x8E, 0xEB, 0x02, 0x2B,
-0x20, 0xF1, 0x77, 0xC2, 0x00, 0x18, 0x65, 0x16,
+0x45, 0x2C, 0x4C, 0x10, 0x0A, 0x74, 0x28, 0x60,
+0x0B, 0x5C, 0x08, 0x60, 0x01, 0x74, 0x18, 0x60,
+0x13, 0x24, 0x08, 0x74, 0x19, 0x60, 0x09, 0x74,
+0x1B, 0x60, 0x36, 0x10, 0x1F, 0x74, 0x24, 0x60,
+0x20, 0x5C, 0x05, 0x60, 0x13, 0x74, 0x1C, 0x60,
+0x1E, 0x74, 0x22, 0x60, 0x2D, 0x10, 0xC2, 0x74,
+0x23, 0x60, 0xC3, 0x74, 0x25, 0x60, 0x28, 0x10,
+0x85, 0x67, 0x00, 0x18, 0x6D, 0x18, 0x2E, 0x10,
+0x85, 0x67, 0x00, 0x18, 0x9E, 0x18, 0x2A, 0x10,
+0x85, 0x67, 0x00, 0x18, 0xE2, 0x12, 0x26, 0x10,
+0x85, 0x67, 0x00, 0x18, 0xDB, 0x12, 0x22, 0x10,
+0x85, 0x67, 0x00, 0x18, 0xD4, 0x12, 0x1E, 0x10,
+0x85, 0x67, 0x00, 0x18, 0xF1, 0x03, 0x1A, 0x10,
+0x85, 0x67, 0x00, 0x18, 0x81, 0x03, 0x16, 0x10,
+0x85, 0x67, 0x00, 0x18, 0xDA, 0x03, 0x12, 0x10,
+0x85, 0x67, 0x00, 0x18, 0x60, 0x03, 0x0E, 0x10,
+0x85, 0x67, 0x00, 0x18, 0xAD, 0x19, 0x0A, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0xC0, 0xF6, 0x64, 0x9A,
+0x01, 0x6C, 0x40, 0x9B, 0x8D, 0xEA, 0x40, 0xDB,
+0x0E, 0x6A, 0x01, 0x10, 0x00, 0x6A, 0x40, 0xC0,
 0x05, 0x97, 0x04, 0x90, 0x03, 0x63, 0x00, 0xEF,
 0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x30, 0xF0,
-0x20, 0x68, 0xC5, 0xF2, 0x10, 0x48, 0x62, 0xF1,
-0x62, 0xA0, 0x7F, 0x6C, 0xA7, 0x43, 0x7C, 0x4D,
-0xB4, 0x35, 0x15, 0xE5, 0x42, 0xA5, 0x8C, 0xEA,
-0x24, 0x2A, 0x74, 0x33, 0x09, 0xE3, 0x62, 0xF0,
-0x8A, 0xA2, 0xA2, 0x67, 0x62, 0xF0, 0x0B, 0x4D,
-0x00, 0x18, 0xE6, 0x17, 0x62, 0xF1, 0x42, 0xA0,
-0x30, 0xF0, 0x20, 0x6C, 0x61, 0xF3, 0x9C, 0x9C,
-0x54, 0x33, 0x0D, 0xE3, 0x62, 0xF0, 0xA8, 0xA3,
-0x7F, 0x4A, 0x04, 0x4A, 0xA0, 0xC4, 0x62, 0xF0,
-0x89, 0xA3, 0x30, 0xF0, 0x20, 0x6B, 0x81, 0xF3,
-0x60, 0x9B, 0x54, 0x32, 0x01, 0xE2, 0x80, 0xC3,
-0x42, 0x80, 0x82, 0x40, 0x00, 0x52, 0x39, 0x60,
-0x36, 0x10, 0x01, 0x72, 0x36, 0x61, 0x74, 0x32,
-0x09, 0xE2, 0x62, 0xF0, 0x63, 0xA2, 0xFF, 0x73,
-0x0C, 0x61, 0x62, 0xF0, 0x84, 0xA2, 0x02, 0x4D,
-0x00, 0x18, 0x68, 0x17, 0x62, 0xF1, 0x62, 0xA0,
-0x74, 0x33, 0x01, 0xE3, 0x62, 0xF0, 0x4A, 0xC0,
-0x04, 0x10, 0x01, 0x6B, 0x6B, 0xEB, 0x62, 0xF0,
-0x6A, 0xC2, 0x30, 0xF0, 0x20, 0x6A, 0xC5, 0xF2,
-0x10, 0x4A, 0x62, 0xF1, 0x82, 0xA2, 0x30, 0xF0,
-0x20, 0x6D, 0x61, 0xF3, 0xBC, 0x9D, 0x94, 0x33,
-0x4D, 0xE3, 0x62, 0xF0, 0xC8, 0xA3, 0x7F, 0x4C,
-0x04, 0x4C, 0xC0, 0xC5, 0x62, 0xF0, 0xA9, 0xA3,
-0x30, 0xF0, 0x20, 0x6B, 0x81, 0xF3, 0x60, 0x9B,
-0x94, 0x34, 0x51, 0xE4, 0xA0, 0xC3, 0x42, 0x84,
-0x00, 0x52, 0x03, 0x60, 0x02, 0x4C, 0x00, 0x18,
-0x4C, 0x17, 0x05, 0x97, 0x04, 0x90, 0x03, 0x63,
-0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x04, 0xD0, 0x30, 0xF0, 0x20, 0x68, 0xC5, 0xF2,
-0x10, 0x48, 0x62, 0xF1, 0x62, 0xA0, 0x62, 0xF1,
-0x43, 0xA0, 0x6E, 0xEA, 0x42, 0x22, 0xC0, 0xF1,
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-0x40, 0xDB, 0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6A,
-0xC5, 0xF2, 0x10, 0x4A, 0x05, 0x6B, 0x02, 0xF3,
-0x70, 0xDA, 0x01, 0x6B, 0x02, 0xF3, 0x6C, 0xDA,
-0x20, 0xE8, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6A,
-0x01, 0xF2, 0xA0, 0x9A, 0x03, 0x6A, 0x30, 0xF0,
-0x20, 0x6B, 0x40, 0xC5, 0x30, 0xF0, 0x20, 0x6A,
-0x01, 0xF2, 0x84, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
-0x01, 0xF2, 0xC8, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
-0x01, 0xF2, 0x4C, 0x9A, 0x01, 0xF2, 0x70, 0x9B,
-0x02, 0x6F, 0xC0, 0xDC, 0x60, 0xDA, 0xE0, 0xC5,
-0x01, 0x6F, 0xC0, 0xDC, 0x60, 0xDA, 0xE0, 0xC5,
-0x30, 0xF0, 0x20, 0x6F, 0x01, 0xF2, 0xF4, 0x9F,
-0xE0, 0xDC, 0x00, 0x6F, 0x60, 0xDA, 0xE0, 0xC5,
-0xC0, 0xDC, 0x60, 0xDA, 0x20, 0xE8, 0x00, 0x65,
-0xFF, 0x6B, 0x6C, 0xEC, 0x9E, 0x32, 0x06, 0x2A,
-0x30, 0xF0, 0x20, 0x6A, 0x94, 0x34, 0x61, 0xF1,
-0x58, 0x9A, 0x06, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0x01, 0xF2, 0x58, 0x9A, 0x81, 0x4C, 0x84, 0x34,
-0x51, 0xE4, 0x40, 0xA4, 0x4C, 0xEB, 0x43, 0x67,
-0x20, 0xE8, 0x00, 0x65, 0x20, 0xE8, 0x00, 0x65,
-0x00, 0x6A, 0x20, 0xE8, 0x00, 0x6A, 0x20, 0xE8,
-0xE5, 0x63, 0x35, 0x62, 0x34, 0xD1, 0x33, 0xD0,
-0x30, 0xF0, 0x20, 0x6D, 0x07, 0x04, 0x60, 0xF3,
-0x14, 0x4D, 0x54, 0x6E, 0x00, 0x18, 0xDE, 0x13,
-0x30, 0xF0, 0x20, 0x6D, 0x20, 0xF3, 0x00, 0x4D,
-0x1C, 0x04, 0x54, 0x6E, 0x00, 0x18, 0xDE, 0x13,
-0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF3, 0x74, 0x9A,
-0x00, 0xF3, 0x14, 0x4A, 0x00, 0x6D, 0x04, 0xD3,
-0x61, 0x9A, 0x44, 0xAA, 0x05, 0xD3, 0x7D, 0x67,
-0x4C, 0xCB, 0x30, 0xF0, 0x20, 0x6A, 0x68, 0xF1,
-0x00, 0x4A, 0x49, 0x6C, 0x2C, 0x6B, 0x1C, 0x65,
-0x80, 0xC2, 0x63, 0xC2, 0x91, 0xA2, 0x09, 0x6B,
-0x64, 0xC2, 0x0D, 0x6B, 0x6B, 0xEB, 0x8C, 0xEB,
-0x04, 0x6C, 0x8B, 0xEC, 0x8C, 0xEB, 0x92, 0xA2,
-0x16, 0xA2, 0x04, 0x6F, 0x8D, 0xEF, 0x02, 0x6C,
-0x8B, 0xEC, 0x0C, 0xEC, 0x1F, 0xA2, 0x96, 0xC2,
-0x03, 0x6C, 0x8B, 0xEC, 0x0C, 0xEC, 0x34, 0xA2,
-0x41, 0x68, 0x0B, 0xE8, 0xF8, 0x65, 0x0C, 0xEC,
-0x10, 0x48, 0x0C, 0xE9, 0x1F, 0x67, 0x0C, 0xEF,
-0xF2, 0xC2, 0xEE, 0xA2, 0x00, 0x6E, 0xC1, 0xC2,
-0xFF, 0x65, 0x08, 0x6F, 0xEB, 0xEF, 0x1F, 0x67,
-0xEC, 0xE8, 0x0E, 0xC2, 0x13, 0xA2, 0xDE, 0xC2,
-0xD5, 0xC2, 0xCB, 0xC2, 0xDA, 0xC2, 0x21, 0x6E,
-0xCB, 0xEE, 0xCC, 0xEC, 0xF8, 0x65, 0xD0, 0xA2,
-0x1F, 0x67, 0x9F, 0xC2, 0x98, 0x67, 0x0C, 0xEF,
-0x87, 0xC2, 0x80, 0x6C, 0xF3, 0xC2, 0x8B, 0xEC,
-0x10, 0x6F, 0x8D, 0xEE, 0xEB, 0xEF, 0xEC, 0xE9,
-0xD0, 0xC2, 0xBE, 0x36, 0x71, 0xC2, 0x34, 0xC2,
-0x03, 0x2E, 0xCF, 0x4E, 0xCC, 0xEB, 0x05, 0x10,
-0x31, 0x6F, 0xEB, 0xEF, 0xEC, 0xEB, 0x10, 0x6E,
-0xCD, 0xEB, 0x40, 0x6E, 0xCD, 0xEB, 0x8D, 0xEB,
-0x71, 0xC2, 0x01, 0x4D, 0xFF, 0x6B, 0x6C, 0xED,
-0x9F, 0x75, 0x28, 0x4A, 0xA6, 0x61, 0x18, 0x67,
-0x30, 0xF0, 0x20, 0x6A, 0xAE, 0xF7, 0x12, 0xC2,
-0x00, 0x18, 0x53, 0x29, 0x00, 0x18, 0xCD, 0x1D,
-0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF2, 0x40, 0x9A,
-0x38, 0x6B, 0x30, 0xF0, 0x20, 0x6C, 0x60, 0xC2,
-0x1C, 0x05, 0xEB, 0xF6, 0x08, 0x4C, 0x54, 0x6E,
-0x00, 0x18, 0x4B, 0x14, 0x30, 0xF0, 0x20, 0x6C,
-0x07, 0x05, 0x2B, 0xF7, 0x1C, 0x4C, 0x54, 0x6E,
-0x00, 0x18, 0x4B, 0x14, 0x30, 0xF0, 0x20, 0x6C,
-0x2C, 0xF1, 0x18, 0x4C, 0x04, 0x05, 0x0A, 0x6E,
-0x00, 0x18, 0x4B, 0x14, 0x35, 0x97, 0x34, 0x91,
+0x30, 0xF0, 0x20, 0x6A, 0xE5, 0xF0, 0x10, 0x4A,
+0x05, 0x6B, 0xC2, 0xF7, 0x7C, 0xDA, 0x09, 0x6B,
+0xC2, 0xF7, 0x78, 0xDA, 0x20, 0xE8, 0x00, 0x65,
+0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF0, 0xAC, 0x9A,
+0x03, 0x6A, 0x30, 0xF0, 0x20, 0x6B, 0x40, 0xC5,
+0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF0, 0x90, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF0, 0xD4, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF0, 0x58, 0x9A,
+0x61, 0xF0, 0x7C, 0x9B, 0x02, 0x6F, 0xC0, 0xDC,
+0x60, 0xDA, 0xE0, 0xC5, 0x01, 0x6F, 0xC0, 0xDC,
+0x60, 0xDA, 0xE0, 0xC5, 0x30, 0xF0, 0x20, 0x6F,
+0x81, 0xF0, 0xE0, 0x9F, 0xE0, 0xDC, 0x00, 0x6F,
+0x60, 0xDA, 0xE0, 0xC5, 0xC0, 0xDC, 0x60, 0xDA,
+0x20, 0xE8, 0x00, 0x65, 0xFF, 0x6B, 0x6C, 0xEC,
+0x9E, 0x32, 0x06, 0x2A, 0x30, 0xF0, 0x20, 0x6A,
+0x94, 0x34, 0xE0, 0xF7, 0x40, 0x9A, 0x06, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF0, 0x44, 0x9A,
+0x81, 0x4C, 0x84, 0x34, 0x51, 0xE4, 0x40, 0xA4,
+0x4C, 0xEB, 0x43, 0x67, 0x20, 0xE8, 0x00, 0x65,
+0x20, 0xE8, 0x00, 0x65, 0x00, 0x6A, 0x20, 0xE8,
+0x00, 0x6A, 0x20, 0xE8, 0xE5, 0x63, 0x35, 0x62,
+0x34, 0xD1, 0x33, 0xD0, 0x30, 0xF0, 0x20, 0x6D,
+0x07, 0x04, 0xC0, 0xF3, 0x00, 0x4D, 0x54, 0x6E,
+0x00, 0x18, 0xF5, 0x14, 0x30, 0xF0, 0x20, 0x6D,
+0x60, 0xF3, 0x0C, 0x4D, 0x1C, 0x04, 0x54, 0x6E,
+0x00, 0x18, 0xF5, 0x14, 0x30, 0xF0, 0x20, 0x6A,
+0x60, 0xF3, 0x60, 0x9A, 0x60, 0xF3, 0x00, 0x4A,
+0x00, 0x6D, 0x04, 0xD3, 0x61, 0x9A, 0x44, 0xAA,
+0x05, 0xD3, 0x7D, 0x67, 0x4C, 0xCB, 0x30, 0xF0,
+0x20, 0x6A, 0x68, 0xF4, 0x1C, 0x4A, 0x49, 0x6C,
+0x2C, 0x6B, 0x1C, 0x65, 0x80, 0xC2, 0x63, 0xC2,
+0x91, 0xA2, 0x09, 0x6B, 0x64, 0xC2, 0x0D, 0x6B,
+0x6B, 0xEB, 0x8C, 0xEB, 0x04, 0x6C, 0x8B, 0xEC,
+0x8C, 0xEB, 0x92, 0xA2, 0x16, 0xA2, 0x04, 0x6F,
+0x8D, 0xEF, 0x02, 0x6C, 0x8B, 0xEC, 0x0C, 0xEC,
+0x1E, 0xA2, 0x96, 0xC2, 0x03, 0x6C, 0x8B, 0xEC,
+0x0C, 0xEC, 0x34, 0xA2, 0x41, 0x68, 0x0B, 0xE8,
+0xF8, 0x65, 0x0C, 0xEC, 0x10, 0x48, 0x0C, 0xE9,
+0x1F, 0x67, 0x0C, 0xEF, 0xF2, 0xC2, 0xEE, 0xA2,
+0x00, 0x6E, 0xC1, 0xC2, 0xFF, 0x65, 0x08, 0x6F,
+0xEB, 0xEF, 0x1F, 0x67, 0xEC, 0xE8, 0x0E, 0xC2,
+0x13, 0xA2, 0xDD, 0xC2, 0xD5, 0xC2, 0xC9, 0xC2,
+0xD9, 0xC2, 0x21, 0x6E, 0xCB, 0xEE, 0xCC, 0xEC,
+0xF8, 0x65, 0xD0, 0xA2, 0x1F, 0x67, 0x9E, 0xC2,
+0x98, 0x67, 0x0C, 0xEF, 0x87, 0xC2, 0x80, 0x6C,
+0xF3, 0xC2, 0x8B, 0xEC, 0x10, 0x6F, 0x8D, 0xEE,
+0xEB, 0xEF, 0xEC, 0xE9, 0xD0, 0xC2, 0xBE, 0x36,
+0x71, 0xC2, 0x34, 0xC2, 0x03, 0x2E, 0xCF, 0x4E,
+0xCC, 0xEB, 0x05, 0x10, 0x31, 0x6F, 0xEB, 0xEF,
+0xEC, 0xEB, 0x10, 0x6E, 0xCD, 0xEB, 0x40, 0x6E,
+0xCD, 0xEB, 0x8D, 0xEB, 0x71, 0xC2, 0x01, 0x4D,
+0xFF, 0x6B, 0x6C, 0xED, 0x9F, 0x69, 0xAE, 0xE9,
+0x2A, 0x4A, 0xA5, 0x29, 0x30, 0xF0, 0x20, 0x68,
+0xE5, 0xF0, 0x10, 0x48, 0x23, 0xF3, 0x2D, 0xC0,
+0x00, 0x18, 0x29, 0x30, 0x6A, 0xF3, 0x22, 0xC0,
+0x00, 0x18, 0x35, 0x2D, 0x00, 0x18, 0x80, 0x20,
+0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF0, 0x44, 0x9A,
+0x3B, 0x6B, 0x30, 0xF0, 0x20, 0x6C, 0x60, 0xC2,
+0x1C, 0x05, 0x6C, 0xF3, 0x1E, 0x4C, 0x54, 0x6E,
+0x00, 0x18, 0x62, 0x15, 0x30, 0xF0, 0x20, 0x6C,
+0x07, 0x05, 0xCC, 0xF3, 0x12, 0x4C, 0x54, 0x6E,
+0x00, 0x18, 0x62, 0x15, 0x30, 0xF0, 0x20, 0x6C,
+0xCC, 0xF5, 0x0E, 0x4C, 0x04, 0x05, 0x0A, 0x6E,
+0x00, 0x18, 0x62, 0x15, 0x35, 0x97, 0x34, 0x91,
 0x33, 0x90, 0x1B, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0xFF, 0x68,
+0xAC, 0xE8, 0xD0, 0x67, 0x41, 0xF4, 0x10, 0x6C,
+0x7F, 0x6D, 0x00, 0x18, 0xF8, 0x1B, 0xD0, 0x67,
+0x41, 0xF6, 0x10, 0x6C, 0x7F, 0x6D, 0x00, 0x18,
+0xF8, 0x1B, 0x05, 0x97, 0x04, 0x90, 0x03, 0x63,
+0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
+0x85, 0x67, 0xA6, 0x67, 0xC7, 0x67, 0x00, 0x18,
+0xF5, 0x14, 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF,
 0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
 0x1F, 0xF7, 0x00, 0x6A, 0xAC, 0xEA, 0x02, 0xF0,
 0x00, 0x72, 0x26, 0x67, 0x01, 0x60, 0x05, 0x2A,
-0x30, 0xF0, 0x20, 0x6A, 0x40, 0xF7, 0x5C, 0x9A,
-0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF7,
-0x40, 0x9A, 0x55, 0xE5, 0x00, 0x9D, 0x91, 0x67,
-0x00, 0x18, 0x4C, 0x13, 0x2C, 0xE8, 0x06, 0xEA,
+0x30, 0xF0, 0x20, 0x6A, 0x80, 0xF6, 0x4C, 0x9A,
+0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x80, 0xF6,
+0x50, 0x9A, 0x55, 0xE5, 0x00, 0x9D, 0x91, 0x67,
+0x00, 0x18, 0x7B, 0x14, 0x2C, 0xE8, 0x06, 0xEA,
 0x50, 0x67, 0x07, 0x97, 0x06, 0x91, 0x05, 0x90,
 0x04, 0x63, 0x00, 0xEF, 0xFB, 0x63, 0x09, 0x62,
 0x08, 0xD1, 0x07, 0xD0, 0x46, 0x67, 0x01, 0x4A,
 0x05, 0x67, 0x0C, 0xD6, 0x27, 0x67, 0x1C, 0x22,
 0x1F, 0xF7, 0x00, 0x6A, 0xAC, 0xEA, 0x02, 0xF0,
 0x00, 0x72, 0x01, 0x60, 0x05, 0x2A, 0x30, 0xF0,
-0x20, 0x6A, 0x40, 0xF7, 0x5C, 0x9A, 0x04, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF7, 0x40, 0x9A,
+0x20, 0x6A, 0x80, 0xF6, 0x4C, 0x9A, 0x04, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0x80, 0xF6, 0x50, 0x9A,
 0x49, 0xE0, 0x40, 0x9A, 0x0C, 0x94, 0x04, 0xD2,
-0x00, 0x18, 0x4C, 0x13, 0x0C, 0x93, 0x24, 0xEA,
+0x00, 0x18, 0x7B, 0x14, 0x0C, 0x93, 0x24, 0xEA,
 0x6F, 0xEA, 0x04, 0x93, 0x6C, 0xEA, 0x4D, 0xE9,
 0x1F, 0xF7, 0x00, 0x6A, 0x0C, 0xEA, 0x02, 0xF0,
 0x00, 0x72, 0x01, 0x60, 0x05, 0x2A, 0x30, 0xF0,
-0x20, 0x6A, 0x40, 0xF7, 0x5C, 0x9A, 0x04, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF7, 0x40, 0x9A,
+0x20, 0x6A, 0x80, 0xF6, 0x4C, 0x9A, 0x04, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0x80, 0xF6, 0x50, 0x9A,
 0x41, 0xE0, 0x20, 0xD8, 0x09, 0x97, 0x08, 0x91,
 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFD, 0x63, 0x05, 0x62, 0x06, 0xD4, 0x06, 0x04,
 0x09, 0xD7, 0x07, 0xD5, 0x08, 0xD6, 0x00, 0x18,
-0x18, 0x15, 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF,
+0x29, 0x16, 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF,
 0xFF, 0x63, 0x01, 0xD0, 0xFF, 0x6B, 0x3F, 0x68,
 0x6C, 0xED, 0xB7, 0xE0, 0x6C, 0xED, 0x00, 0x68,
 0x06, 0x92, 0x00, 0xC7, 0x05, 0x67, 0x6C, 0xED,
@@ -5296,969 +5609,1050 @@ u8 array_mp_8822b_fw_ap[] = {
 0x60, 0xC2, 0x01, 0x90, 0x01, 0x6A, 0x01, 0x63,
 0x20, 0xE8, 0x00, 0x65, 0xFC, 0x63, 0x07, 0x62,
 0x06, 0xD1, 0x05, 0xD0, 0xFF, 0x6A, 0x8C, 0xEA,
-0x2D, 0x22, 0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF0,
-0x28, 0x9A, 0x01, 0x68, 0x0B, 0xE8, 0xA1, 0xF4,
+0x2D, 0x22, 0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF7,
+0x24, 0x9A, 0x01, 0x68, 0x0B, 0xE8, 0xA1, 0xF4,
 0x10, 0x6C, 0xB0, 0x67, 0xD1, 0x67, 0x00, 0x18,
-0x8B, 0x1A, 0xA1, 0xF4, 0x14, 0x6C, 0xB0, 0x67,
-0x6E, 0xF7, 0x17, 0x6E, 0x00, 0x18, 0x8B, 0x1A,
+0xF8, 0x1B, 0xA1, 0xF4, 0x14, 0x6C, 0xB0, 0x67,
+0x6E, 0xF7, 0x17, 0x6E, 0x00, 0x18, 0xF8, 0x1B,
 0xA1, 0xF4, 0x1C, 0x6C, 0xB0, 0x67, 0x21, 0xF0,
-0x1B, 0x6E, 0x00, 0x18, 0x8B, 0x1A, 0xA1, 0xF6,
+0x1B, 0x6E, 0x00, 0x18, 0xF8, 0x1B, 0xA1, 0xF6,
 0x10, 0x6C, 0xB0, 0x67, 0xD1, 0x67, 0x00, 0x18,
-0x8B, 0x1A, 0xA1, 0xF6, 0x14, 0x6C, 0xB0, 0x67,
-0x6E, 0xF7, 0x17, 0x6E, 0x00, 0x18, 0x8B, 0x1A,
+0xF8, 0x1B, 0xA1, 0xF6, 0x14, 0x6C, 0xB0, 0x67,
+0x6E, 0xF7, 0x17, 0x6E, 0x00, 0x18, 0xF8, 0x1B,
 0xA1, 0xF6, 0x1C, 0x6C, 0xB0, 0x67, 0x21, 0xF0,
 0x1B, 0x6E, 0x2C, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0xA1, 0xF0, 0x28, 0x9A, 0x01, 0x68, 0x0B, 0xE8,
+0x00, 0xF7, 0x24, 0x9A, 0x01, 0x68, 0x0B, 0xE8,
 0xA1, 0xF4, 0x10, 0x6C, 0xB0, 0x67, 0xD1, 0x67,
-0x00, 0x18, 0x8B, 0x1A, 0xA1, 0xF4, 0x14, 0x6C,
+0x00, 0x18, 0xF8, 0x1B, 0xA1, 0xF4, 0x14, 0x6C,
 0xB0, 0x67, 0x6E, 0xF7, 0x17, 0x6E, 0x00, 0x18,
-0x8B, 0x1A, 0xFF, 0x6E, 0xA1, 0xF4, 0x1C, 0x6C,
-0xB0, 0x67, 0x01, 0x4E, 0x00, 0x18, 0x8B, 0x1A,
+0xF8, 0x1B, 0xFF, 0x6E, 0xA1, 0xF4, 0x1C, 0x6C,
+0xB0, 0x67, 0x01, 0x4E, 0x00, 0x18, 0xF8, 0x1B,
 0xA1, 0xF6, 0x10, 0x6C, 0xB0, 0x67, 0xD1, 0x67,
-0x00, 0x18, 0x8B, 0x1A, 0xA1, 0xF6, 0x14, 0x6C,
+0x00, 0x18, 0xF8, 0x1B, 0xA1, 0xF6, 0x14, 0x6C,
 0xB0, 0x67, 0x6E, 0xF7, 0x17, 0x6E, 0x00, 0x18,
-0x8B, 0x1A, 0xFF, 0x6E, 0xA1, 0xF6, 0x1C, 0x6C,
-0xB0, 0x67, 0x01, 0x4E, 0x00, 0x18, 0x8B, 0x1A,
+0xF8, 0x1B, 0xFF, 0x6E, 0xA1, 0xF6, 0x1C, 0x6C,
+0xB0, 0x67, 0x01, 0x4E, 0x00, 0x18, 0xF8, 0x1B,
 0x07, 0x97, 0x06, 0x91, 0x05, 0x90, 0x04, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x04, 0xD0, 0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF7,
-0x44, 0x9A, 0x7F, 0x6B, 0x01, 0xF1, 0x0C, 0x6C,
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-0xFC, 0x4C, 0xE0, 0xC0, 0x01, 0x48, 0xE4, 0x44,
-0x06, 0xD0, 0xED, 0x2F, 0x04, 0x4B, 0x02, 0x4D,
-0x25, 0x10, 0x81, 0x85, 0x78, 0x74, 0x02, 0x60,
-0x58, 0x74, 0x20, 0x61, 0x81, 0x85, 0x20, 0x9E,
-0x06, 0xD3, 0x78, 0x74, 0x98, 0x67, 0x01, 0x5C,
-0xF8, 0x67, 0xF4, 0x37, 0x07, 0xD1, 0x1F, 0x65,
-0x1C, 0x6C, 0x07, 0x97, 0x0F, 0x68, 0x30, 0xF0,
-0x20, 0x69, 0xE6, 0xEC, 0x0C, 0xEF, 0x81, 0xF7,
-0x10, 0x49, 0x3D, 0xE7, 0xE0, 0xA7, 0x06, 0x91,
-0x18, 0x67, 0x0D, 0xEF, 0xFC, 0x4C, 0xE0, 0xC1,
-0x01, 0x49, 0xE4, 0x44, 0x06, 0xD1, 0xED, 0x2F,
-0x08, 0x4B, 0x01, 0x4D, 0x9D, 0x67, 0x04, 0x10,
-0xE0, 0xA4, 0x01, 0x4C, 0xE0, 0xC2, 0x01, 0x4A,
-0x63, 0xEC, 0xFA, 0x61, 0x04, 0x4E, 0x01, 0x4D,
-0x60, 0x85, 0x7F, 0xF7, 0x1B, 0x2B, 0x0A, 0x94,
-0x01, 0x24, 0x60, 0xC2, 0x0A, 0x97, 0x09, 0x91,
-0x08, 0x90, 0xEB, 0xE2, 0x05, 0x63, 0x20, 0xE8,
-0xFD, 0x63, 0x05, 0x62, 0xFF, 0x6A, 0x8C, 0xEA,
-0x0E, 0x72, 0x03, 0x60, 0x0F, 0x72, 0x05, 0x60,
-0x08, 0x10, 0x85, 0x67, 0x00, 0x18, 0x75, 0x25,
-0x10, 0x10, 0x85, 0x67, 0x00, 0x18, 0x5E, 0x1F,
-0x0C, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF0,
-0x6C, 0x9A, 0x30, 0xF0, 0x20, 0x6C, 0x61, 0xF1,
-0x94, 0x9C, 0x40, 0x9B, 0x8D, 0xEA, 0x40, 0xDB,
-0xFF, 0x6A, 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF,
+0x0F, 0x05, 0x40, 0xF1, 0x00, 0x4E, 0x40, 0xF1,
+0x08, 0x4F, 0x00, 0x18, 0xD6, 0x25, 0x30, 0xF0,
+0x20, 0x6D, 0x05, 0x04, 0x60, 0xF1, 0x04, 0x4D,
+0x00, 0x18, 0x27, 0x25, 0x00, 0x18, 0x93, 0x21,
+0x01, 0x6C, 0x00, 0x18, 0x5D, 0x28, 0x00, 0x6C,
+0x00, 0x18, 0x5F, 0x21, 0x00, 0x18, 0xD4, 0x21,
+0x00, 0x18, 0xC8, 0x24, 0x1E, 0x94, 0x00, 0x18,
+0x0D, 0x28, 0x00, 0x6C, 0x00, 0x18, 0x5D, 0x28,
+0x30, 0xF0, 0x20, 0x6E, 0x30, 0xF0, 0x20, 0x6F,
+0x04, 0x04, 0x0F, 0x05, 0x40, 0xF1, 0x00, 0x4E,
+0x40, 0xF1, 0x08, 0x4F, 0x00, 0x18, 0xB8, 0x21,
+0x30, 0xF0, 0x20, 0x6C, 0x60, 0xF1, 0x04, 0x4C,
+0x05, 0x05, 0x00, 0x18, 0x9A, 0x24, 0x30, 0xF0,
+0x20, 0x6A, 0xE5, 0xF0, 0x10, 0x4A, 0x4A, 0xF5,
+0x6D, 0xA2, 0x07, 0x73, 0x07, 0x60, 0x00, 0x6B,
+0x4A, 0xF5, 0x74, 0xC2, 0x32, 0x6C, 0x00, 0x18,
+0x49, 0x15, 0xCC, 0x17, 0x01, 0x6C, 0x00, 0x18,
+0x3C, 0x25, 0x00, 0x6C, 0x00, 0x18, 0xEC, 0x21,
+0x00, 0x18, 0xBA, 0x24, 0x30, 0xF0, 0x20, 0x6A,
+0x20, 0xF7, 0xD8, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
+0xC0, 0xF7, 0xF4, 0x9A, 0x00, 0x6C, 0x08, 0x6D,
+0x00, 0x18, 0x1E, 0x1C, 0x23, 0x97, 0x22, 0x91,
+0x21, 0x90, 0x00, 0x6A, 0x12, 0x63, 0x00, 0xEF,
+0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x30, 0xF0,
+0x20, 0x6A, 0xE5, 0xF0, 0x10, 0x4A, 0x00, 0x6B,
+0xE2, 0xF7, 0x64, 0xC2, 0x30, 0xF0, 0x20, 0x6B,
+0xC8, 0xF0, 0x14, 0x4B, 0x03, 0xF0, 0x64, 0xDA,
+0x00, 0x6A, 0x30, 0xF0, 0x20, 0x6B, 0xC0, 0xF7,
+0x78, 0x9B, 0x54, 0x34, 0x9F, 0x68, 0x71, 0xE4,
+0xA0, 0xA4, 0xF8, 0x6B, 0x01, 0x4A, 0xAC, 0xEB,
+0x4E, 0xE8, 0x60, 0xC4, 0xF2, 0x28, 0x00, 0x18,
+0x7A, 0x20, 0x30, 0xF0, 0x20, 0x6A, 0xE8, 0xF0,
+0x05, 0xC2, 0x00, 0x18, 0xA3, 0x20, 0x00, 0x18,
+0x38, 0x3C, 0x05, 0x97, 0x04, 0x90, 0x03, 0x63,
+0x00, 0xEF, 0x00, 0x65, 0xFB, 0x63, 0x09, 0xD1,
+0x08, 0xD0, 0x0A, 0xD4, 0x44, 0x67, 0x82, 0x10,
+0x25, 0x73, 0x04, 0x60, 0x60, 0xA5, 0x60, 0xC2,
+0x01, 0x4A, 0x7B, 0x10, 0x61, 0x85, 0x62, 0x73,
+0x7D, 0x67, 0x20, 0x61, 0x62, 0x85, 0x78, 0x73,
+0x03, 0x60, 0x58, 0x73, 0x7D, 0x67, 0x1A, 0x61,
+0x82, 0x85, 0x60, 0xA6, 0x78, 0x6F, 0xEE, 0xEC,
+0x30, 0xF0, 0x20, 0x6F, 0x72, 0x30, 0x41, 0xF6,
+0x14, 0x4F, 0xE1, 0xE0, 0x00, 0xA0, 0x01, 0x5C,
+0x98, 0x67, 0x94, 0x34, 0x8D, 0xE8, 0x3D, 0x67,
+0x00, 0xC1, 0x0F, 0x68, 0x6C, 0xE8, 0xFD, 0xE0,
+0x60, 0xA7, 0x02, 0x4D, 0x8D, 0xEB, 0x61, 0xC1,
+0x00, 0xF0, 0x02, 0x03, 0x81, 0x85, 0x77, 0x74,
+0x26, 0x61, 0x82, 0x85, 0x78, 0x74, 0x02, 0x60,
+0x58, 0x74, 0x21, 0x61, 0x80, 0xAE, 0x06, 0xD3,
+0x07, 0xD4, 0x82, 0x85, 0x78, 0x74, 0xF8, 0x67,
+0x01, 0x5F, 0x18, 0x67, 0x14, 0x30, 0x18, 0x65,
+0x0C, 0x6C, 0x07, 0x97, 0x0F, 0x68, 0x30, 0xF0,
+0x20, 0x69, 0xE7, 0xEC, 0x0C, 0xEF, 0x41, 0xF6,
+0x14, 0x49, 0x3D, 0xE7, 0xE0, 0xA7, 0x06, 0x90,
+0x38, 0x67, 0x2D, 0xEF, 0xFC, 0x4C, 0xE0, 0xC0,
+0x01, 0x48, 0xE4, 0x44, 0x06, 0xD0, 0xED, 0x2F,
+0x04, 0x4B, 0x02, 0x4D, 0x25, 0x10, 0x81, 0x85,
+0x78, 0x74, 0x02, 0x60, 0x58, 0x74, 0x20, 0x61,
+0x81, 0x85, 0x20, 0x9E, 0x06, 0xD3, 0x78, 0x74,
+0x98, 0x67, 0x01, 0x5C, 0xF8, 0x67, 0xF4, 0x37,
+0x07, 0xD1, 0x1F, 0x65, 0x1C, 0x6C, 0x07, 0x97,
+0x0F, 0x68, 0x30, 0xF0, 0x20, 0x69, 0xE6, 0xEC,
+0x0C, 0xEF, 0x41, 0xF6, 0x14, 0x49, 0x3D, 0xE7,
+0xE0, 0xA7, 0x06, 0x91, 0x18, 0x67, 0x0D, 0xEF,
+0xFC, 0x4C, 0xE0, 0xC1, 0x01, 0x49, 0xE4, 0x44,
+0x06, 0xD1, 0xED, 0x2F, 0x08, 0x4B, 0x01, 0x4D,
+0x9D, 0x67, 0x04, 0x10, 0xE0, 0xA4, 0x01, 0x4C,
+0xE0, 0xC2, 0x01, 0x4A, 0x63, 0xEC, 0xFA, 0x61,
+0x04, 0x4E, 0x01, 0x4D, 0x60, 0x85, 0x7F, 0xF7,
+0x1B, 0x2B, 0x0A, 0x94, 0x01, 0x24, 0x60, 0xC2,
+0x0A, 0x97, 0x09, 0x91, 0x08, 0x90, 0xEB, 0xE2,
+0x05, 0x63, 0x20, 0xE8, 0xFD, 0x63, 0x05, 0x62,
+0xFF, 0x6A, 0x8C, 0xEA, 0x0E, 0x72, 0x03, 0x60,
+0x0F, 0x72, 0x05, 0x60, 0x08, 0x10, 0x85, 0x67,
+0x00, 0x18, 0xC1, 0x28, 0x10, 0x10, 0x85, 0x67,
+0x00, 0x18, 0x27, 0x22, 0x0C, 0x10, 0x30, 0xF0,
+0x20, 0x6A, 0xC0, 0xF6, 0x64, 0x9A, 0x30, 0xF0,
+0x20, 0x6C, 0xC0, 0xF7, 0x9C, 0x9C, 0x40, 0x9B,
+0x8D, 0xEA, 0x40, 0xDB, 0xFF, 0x6A, 0x05, 0x97,
+0x03, 0x63, 0x00, 0xEF, 0xFD, 0x63, 0x05, 0x62,
+0x60, 0xA4, 0x30, 0xF0, 0x20, 0x6A, 0xE5, 0xF0,
+0x10, 0x4A, 0xE2, 0xF7, 0x6C, 0xC2, 0x61, 0xA4,
+0xE2, 0xF7, 0x62, 0xC2, 0x62, 0xA4, 0xE2, 0xF7,
+0x6B, 0xC2, 0xA3, 0xA4, 0x0F, 0x6B, 0xAC, 0xEB,
+0xE2, 0xF7, 0x71, 0xC2, 0x63, 0xA4, 0x30, 0xF0,
+0x20, 0x6C, 0xC8, 0xF0, 0x08, 0x4C, 0x72, 0x33,
+0xE2, 0xF7, 0x70, 0xC2, 0x01, 0x6D, 0x00, 0x18,
+0x6C, 0x3E, 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF,
 0xFB, 0x63, 0x09, 0x62, 0x08, 0xD0, 0x60, 0xA4,
 0x41, 0xA4, 0x82, 0xA4, 0x00, 0xF0, 0x12, 0x06,
 0x00, 0xF0, 0x1E, 0x07, 0x00, 0x6D, 0xA0, 0xC6,
@@ -6266,52 +6660,52 @@ u8 array_mp_8822b_fw_ap[] = {
 0x01, 0x6E, 0xE4, 0x67, 0xCC, 0xEF, 0x1D, 0x27,
 0xA0, 0x5B, 0x1B, 0x61, 0xA0, 0x5A, 0x19, 0x61,
 0x5D, 0x67, 0xD2, 0xC2, 0x30, 0xF0, 0x20, 0x6A,
-0xC5, 0xF2, 0x10, 0x4A, 0x49, 0xF2, 0x7C, 0x9A,
+0xE5, 0xF0, 0x10, 0x4A, 0xCA, 0xF0, 0x70, 0x9A,
 0x9D, 0x67, 0xDD, 0x67, 0x73, 0xC4, 0x62, 0x34,
 0x00, 0xF6, 0x62, 0x33, 0x76, 0xC6, 0x0D, 0x6B,
 0x94, 0xC6, 0x70, 0xC6, 0x82, 0x34, 0x05, 0x6B,
-0x95, 0xC6, 0x6F, 0xCE, 0x49, 0xF2, 0xBC, 0xDA,
+0x95, 0xC6, 0x6F, 0xCE, 0xCA, 0xF0, 0xB0, 0xDA,
 0xA0, 0x10, 0x02, 0x6E, 0xA4, 0x67, 0xCC, 0xED,
 0x44, 0x25, 0xFD, 0x67, 0xA0, 0x5B, 0xD2, 0xC7,
-0x18, 0x60, 0xC4, 0xF5, 0xA8, 0x43, 0x30, 0xF0,
-0x20, 0x6C, 0x24, 0xF5, 0x08, 0x4B, 0xC5, 0xF2,
+0x18, 0x60, 0x05, 0xF1, 0xA4, 0x43, 0x30, 0xF0,
+0x20, 0x6C, 0x65, 0xF0, 0x04, 0x4B, 0xE5, 0xF0,
 0x10, 0x4C, 0x64, 0x33, 0xA4, 0x35, 0x95, 0xE5,
-0x91, 0xE3, 0x68, 0xAC, 0xC7, 0xAD, 0x75, 0xC7,
+0x91, 0xE3, 0x66, 0xAC, 0xC5, 0xAD, 0x75, 0xC7,
 0x62, 0x33, 0xD3, 0xC7, 0x76, 0xC7, 0xC2, 0x36,
-0x00, 0x6B, 0x67, 0xCD, 0xD4, 0xC7, 0x68, 0xCC,
+0x00, 0x6B, 0x65, 0xCD, 0xD4, 0xC7, 0x66, 0xCC,
 0x04, 0x10, 0x16, 0x6B, 0x6B, 0xEB, 0x1D, 0x67,
-0x73, 0xC0, 0xA0, 0x5A, 0x19, 0x60, 0xC4, 0xF5,
-0x88, 0x42, 0x30, 0xF0, 0x20, 0x6B, 0x24, 0xF5,
-0x08, 0x4A, 0xC5, 0xF2, 0x10, 0x4B, 0x44, 0x32,
-0x84, 0x34, 0x71, 0xE4, 0x6D, 0xE2, 0x48, 0xAB,
-0xA7, 0xAC, 0xDD, 0x67, 0x59, 0xC6, 0x42, 0x32,
+0x73, 0xC0, 0xA0, 0x5A, 0x19, 0x60, 0x05, 0xF1,
+0x84, 0x42, 0x30, 0xF0, 0x20, 0x6B, 0x65, 0xF0,
+0x04, 0x4A, 0xE5, 0xF0, 0x10, 0x4B, 0x44, 0x32,
+0x84, 0x34, 0x71, 0xE4, 0x6D, 0xE2, 0x46, 0xAB,
+0xA5, 0xAC, 0xDD, 0x67, 0x59, 0xC6, 0x42, 0x32,
 0xB7, 0xC6, 0x5A, 0xC6, 0xA2, 0x35, 0x00, 0x6A,
-0x47, 0xCC, 0xB8, 0xC6, 0x48, 0xCB, 0x04, 0x10,
+0x45, 0xCC, 0xB8, 0xC6, 0x46, 0xCB, 0x04, 0x10,
 0x16, 0x6A, 0x4B, 0xEA, 0xFD, 0x67, 0x57, 0xC7,
 0x0D, 0x6A, 0x1D, 0x67, 0x50, 0xC0, 0x09, 0x6A,
 0x52, 0x10, 0x53, 0x2C, 0xA0, 0x5B, 0x22, 0x60,
-0xBD, 0x67, 0x72, 0xC5, 0xE4, 0xF3, 0xC8, 0x43,
-0x30, 0xF0, 0x20, 0x6D, 0xC5, 0xF2, 0x10, 0x4D,
-0xC4, 0x36, 0xB9, 0xE6, 0xE8, 0xAE, 0x1D, 0x67,
-0xF3, 0xC0, 0xE2, 0x37, 0xF4, 0xC0, 0x84, 0xF4,
-0xE8, 0x43, 0xE4, 0x37, 0xB5, 0xE7, 0xE7, 0xAD,
+0xBD, 0x67, 0x72, 0xC5, 0x24, 0xF7, 0xC4, 0x43,
+0x30, 0xF0, 0x20, 0x6D, 0xE5, 0xF0, 0x10, 0x4D,
+0xC4, 0x36, 0xB9, 0xE6, 0xE6, 0xAE, 0x1D, 0x67,
+0xF3, 0xC0, 0xE2, 0x37, 0xF4, 0xC0, 0xC4, 0xF7,
+0xE4, 0x43, 0xE4, 0x37, 0xB5, 0xE7, 0xE5, 0xAD,
 0x74, 0x33, 0xF5, 0xC0, 0xE2, 0x37, 0xF6, 0xC0,
-0x30, 0xF0, 0x20, 0x6F, 0x61, 0xF1, 0xF8, 0x9F,
-0xED, 0xE3, 0x60, 0xA3, 0x88, 0xCE, 0x87, 0xCD,
+0x30, 0xF0, 0x20, 0x6F, 0xE0, 0xF7, 0xE0, 0x9F,
+0xED, 0xE3, 0x60, 0xA3, 0x86, 0xCE, 0x85, 0xCD,
 0x77, 0xC0, 0x02, 0x10, 0x9D, 0x67, 0x72, 0xC4,
-0xA0, 0x5A, 0x23, 0x60, 0xE4, 0xF3, 0x88, 0x42,
-0x30, 0xF0, 0x20, 0x6B, 0xC5, 0xF2, 0x10, 0x4B,
+0xA0, 0x5A, 0x23, 0x60, 0x24, 0xF7, 0x84, 0x42,
+0x30, 0xF0, 0x20, 0x6B, 0xE5, 0xF0, 0x10, 0x4B,
 0x84, 0x34, 0x71, 0xE4, 0xBD, 0x67, 0x58, 0xC5,
-0xA8, 0xAC, 0xDD, 0x67, 0xB9, 0xC6, 0xA2, 0x35,
-0xBA, 0xC6, 0x84, 0xF4, 0xA8, 0x42, 0xA4, 0x35,
-0x6D, 0xE5, 0xA7, 0xAB, 0x54, 0x32, 0xBB, 0xC6,
+0xA6, 0xAC, 0xDD, 0x67, 0xB9, 0xC6, 0xA2, 0x35,
+0xBA, 0xC6, 0xC4, 0xF7, 0xA4, 0x42, 0xA4, 0x35,
+0x6D, 0xE5, 0xA5, 0xAB, 0x54, 0x32, 0xBB, 0xC6,
 0xA2, 0x35, 0xBC, 0xC6, 0x30, 0xF0, 0x20, 0x6D,
-0x61, 0xF1, 0xB8, 0x9D, 0xA9, 0xE2, 0x40, 0xA2,
-0x5D, 0xC6, 0x00, 0x6A, 0x48, 0xCC, 0x47, 0xCB,
+0xE0, 0xF7, 0xA0, 0x9D, 0xA9, 0xE2, 0x40, 0xA2,
+0x5D, 0xC6, 0x00, 0x6A, 0x46, 0xCC, 0x45, 0xCB,
 0x02, 0x10, 0xFD, 0x67, 0x58, 0xC7, 0x04, 0x6A,
 0x1D, 0x67, 0x50, 0xC0, 0x0C, 0x6A, 0x4F, 0xC8,
 0x04, 0x10, 0x7D, 0x67, 0x04, 0x6A, 0x50, 0xC3,
-0xAF, 0xCB, 0x04, 0x04, 0x00, 0x18, 0x18, 0x15,
+0xAF, 0xCB, 0x04, 0x04, 0x00, 0x18, 0x29, 0x16,
 0x09, 0x97, 0x08, 0x90, 0x05, 0x63, 0x00, 0xEF,
 0xF8, 0x63, 0x0F, 0x62, 0x0E, 0xD1, 0x0D, 0xD0,
 0x00, 0x6A, 0x10, 0xD4, 0x01, 0x68, 0x62, 0x67,
@@ -6319,10 +6713,10 @@ u8 array_mp_8822b_fw_ap[] = {
 0xAC, 0xEB, 0x01, 0x4A, 0x0B, 0x73, 0xAC, 0xEA,
 0x03, 0x61, 0x01, 0x48, 0xAC, 0xE8, 0x00, 0x6B,
 0x37, 0x72, 0x01, 0x4C, 0xF1, 0x61, 0x37, 0x6A,
-0x30, 0xF0, 0x20, 0x6B, 0xC5, 0xF2, 0x10, 0x4B,
-0x66, 0xF6, 0x92, 0xA3, 0x0F, 0x5C, 0x01, 0x4C,
-0x01, 0x61, 0x00, 0x6C, 0x66, 0xF6, 0x92, 0xC3,
-0x30, 0xF0, 0x20, 0x6B, 0x4C, 0xF1, 0x62, 0xA3,
+0x30, 0xF0, 0x20, 0x6B, 0xE5, 0xF0, 0x10, 0x4B,
+0xE7, 0xF4, 0x88, 0xA3, 0x0F, 0x5C, 0x01, 0x4C,
+0x01, 0x61, 0x00, 0x6C, 0xE7, 0xF4, 0x88, 0xC3,
+0x30, 0xF0, 0x20, 0x6B, 0xCC, 0xF5, 0x78, 0xA3,
 0x0B, 0x6D, 0x2F, 0x40, 0x70, 0x33, 0x0A, 0xD3,
 0x0A, 0x94, 0xFF, 0x6B, 0x6C, 0xE9, 0x6C, 0xEC,
 0x0A, 0xD4, 0x01, 0x6C, 0x13, 0xE4, 0xB8, 0xEC,
@@ -6341,161 +6735,162 @@ u8 array_mp_8822b_fw_ap[] = {
 0xA0, 0xC2, 0x01, 0x4A, 0x8A, 0xEA, 0xFA, 0x61,
 0x0C, 0x6A, 0x9D, 0x67, 0x00, 0x6B, 0x4F, 0xCC,
 0x70, 0xC4, 0x05, 0x95, 0x04, 0x94, 0x06, 0x96,
-0x07, 0x97, 0xFF, 0x49, 0x00, 0x18, 0x76, 0x1E,
+0x07, 0x97, 0xFF, 0x49, 0x00, 0x18, 0x3C, 0x21,
 0x08, 0x95, 0xFF, 0x6A, 0x4C, 0xE9, 0x01, 0x4D,
 0x08, 0xD5, 0x08, 0x93, 0xFF, 0x6A, 0x4C, 0xEB,
 0x03, 0xEB, 0xBF, 0x61, 0x0F, 0x97, 0x0E, 0x91,
 0x0D, 0x90, 0x08, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x30, 0xF0,
-0x20, 0x6A, 0x07, 0xD5, 0x08, 0xD6, 0x09, 0xD7,
-0xC5, 0xF2, 0x10, 0x4A, 0x66, 0xF6, 0x73, 0xA2,
-0x06, 0xD4, 0x01, 0x73, 0x0F, 0x61, 0x66, 0xF6,
-0x54, 0xA2, 0x0C, 0x2A, 0x30, 0xF0, 0x21, 0x68,
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+0x28, 0xF3, 0x01, 0x6E, 0x00, 0x18, 0x38, 0x2A,
+0x07, 0x97, 0x06, 0x91, 0x05, 0x90, 0x04, 0x63,
+0x00, 0xEF, 0x00, 0x65, 0xFB, 0x63, 0x09, 0x62,
+0xFF, 0x6A, 0x4C, 0xEC, 0x2A, 0x6B, 0x78, 0xEC,
+0x30, 0xF0, 0x20, 0x6E, 0x68, 0xF4, 0x1C, 0x4E,
+0xAC, 0xEA, 0x05, 0x6D, 0x12, 0xEB, 0x6D, 0xE6,
+0xDD, 0x67, 0xAF, 0xCE, 0x0F, 0x6D, 0xB0, 0xC6,
+0x92, 0xC6, 0x53, 0xC6, 0x20, 0xF0, 0x44, 0xA3,
+0x07, 0x97, 0x04, 0x94, 0x54, 0xC6, 0x20, 0xF0,
+0x45, 0xA3, 0x55, 0xC6, 0x20, 0xF0, 0x46, 0xA3,
+0x56, 0xC6, 0x05, 0x95, 0x06, 0x96, 0x00, 0x18,
+0x3C, 0x21, 0x09, 0x97, 0x05, 0x63, 0x00, 0xEF,
+0xF8, 0x63, 0x0F, 0x62, 0x0E, 0xD1, 0x0D, 0xD0,
+0x14, 0x92, 0x15, 0x93, 0x16, 0x90, 0x0A, 0xD2,
+0xFF, 0x6A, 0x1A, 0x65, 0xAC, 0xEA, 0x08, 0xD2,
+0x58, 0x67, 0xCC, 0xEA, 0x17, 0x91, 0x1A, 0x65,
+0x0A, 0x92, 0xFF, 0xF7, 0x1F, 0x6D, 0xAC, 0xEF,
+0xAC, 0xEA, 0xAC, 0xEB, 0xAC, 0xE8, 0xAC, 0xE9,
+0x30, 0xF0, 0x20, 0x6D, 0xE5, 0xF0, 0x10, 0x4D,
+0xC2, 0xF7, 0xD8, 0x9D, 0x0A, 0xD2, 0x8C, 0xEE,
+0x36, 0x26, 0xC2, 0xF7, 0x9C, 0x9D, 0x05, 0x6A,
+0x4E, 0xEC, 0x31, 0x2C, 0x30, 0xF0, 0x20, 0x6C,
+0xE0, 0xF7, 0x84, 0x9C, 0xE7, 0xF4, 0xA8, 0x9D,
+0x7F, 0x4A, 0x7C, 0x4A, 0xAC, 0xEC, 0x4E, 0xEC,
+0x26, 0x2C, 0x9D, 0x67, 0x47, 0x44, 0x19, 0x4A,
+0x40, 0xA2, 0xF4, 0xC4, 0xE2, 0x37, 0x52, 0xC4,
+0x58, 0x67, 0x53, 0xC4, 0x47, 0x44, 0x21, 0x4A,
+0x40, 0xA2, 0xF5, 0xC4, 0x56, 0xC4, 0x0A, 0x94,
+0x82, 0x32, 0x9D, 0x67, 0x57, 0xC4, 0x02, 0x6A,
+0x4B, 0xEA, 0x78, 0xC4, 0x1A, 0xC4, 0x3C, 0xC4,
+0x50, 0xC4, 0x62, 0x33, 0x02, 0x30, 0x22, 0x31,
+0x0C, 0x6A, 0x79, 0xC4, 0x1B, 0xC4, 0x3D, 0xC4,
+0x4F, 0xCC, 0x05, 0x95, 0x04, 0x94, 0x06, 0x96,
+0x07, 0x97, 0x00, 0x18, 0x3C, 0x21, 0x0F, 0x97,
+0x0E, 0x91, 0x0D, 0x90, 0x08, 0x63, 0x00, 0xEF,
 0xFD, 0x63, 0x05, 0x62, 0x30, 0xF0, 0x20, 0x6A,
-0x60, 0xA4, 0x81, 0xF1, 0x40, 0x9A, 0x6C, 0x35,
+0x60, 0xA4, 0xE0, 0xF7, 0x4C, 0x9A, 0x6C, 0x35,
 0x49, 0xE5, 0xA3, 0xA4, 0xA0, 0xC2, 0x84, 0xA4,
 0xA1, 0x42, 0x80, 0xC5, 0x30, 0xF0, 0x20, 0x6C,
-0x81, 0xF1, 0x84, 0x9C, 0x40, 0x9A, 0x8C, 0xEA,
-0x30, 0xF0, 0x20, 0x6C, 0xC7, 0xF5, 0x95, 0xA4,
+0xE0, 0xF7, 0x90, 0x9C, 0x40, 0x9A, 0x8C, 0xEA,
+0x30, 0xF0, 0x20, 0x6C, 0xC8, 0xF0, 0x83, 0xA4,
 0x03, 0x5C, 0x11, 0x60, 0x25, 0x22, 0x30, 0xF0,
-0x20, 0x6A, 0x81, 0xF1, 0x48, 0x9A, 0x00, 0x6B,
-0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF1,
-0x6C, 0x9A, 0x30, 0xF0, 0x20, 0x6A, 0x20, 0xF7,
-0x48, 0x9A, 0x60, 0xDA, 0xF0, 0x17, 0x03, 0x74,
+0x20, 0x6A, 0xE0, 0xF7, 0x54, 0x9A, 0x00, 0x6B,
+0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A, 0xE0, 0xF7,
+0x78, 0x9A, 0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF5,
+0x50, 0x9A, 0x60, 0xDA, 0xF0, 0x17, 0x03, 0x74,
 0x13, 0x61, 0x00, 0xF4, 0x00, 0x5A, 0x10, 0x61,
-0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF1, 0x48, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0xE0, 0xF7, 0x54, 0x9A,
 0x00, 0x6B, 0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A,
-0x81, 0xF1, 0x70, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
-0x20, 0xF7, 0x48, 0x9A, 0x60, 0xDA, 0xF0, 0x17,
-0x83, 0x67, 0x00, 0x18, 0x6E, 0x2F, 0x05, 0x97,
+0xE0, 0xF7, 0x7C, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
+0x60, 0xF5, 0x50, 0x9A, 0x60, 0xDA, 0xF0, 0x17,
+0x83, 0x67, 0x00, 0x18, 0x60, 0x35, 0x05, 0x97,
 0x03, 0x63, 0x00, 0xEF, 0xFC, 0x63, 0x07, 0x62,
-0x06, 0xD1, 0x05, 0xD0, 0x20, 0xA4, 0x28, 0x68,
+0x06, 0xD1, 0x05, 0xD0, 0x20, 0xA4, 0x2A, 0x68,
 0x30, 0xF0, 0x20, 0x6A, 0x18, 0xE9, 0x62, 0xA4,
-0x68, 0xF1, 0x00, 0x4A, 0x08, 0x6D, 0x6C, 0xED,
+0x68, 0xF4, 0x1C, 0x4A, 0x08, 0x6D, 0x6C, 0xED,
 0x7E, 0x33, 0x12, 0xE8, 0x01, 0xE2, 0xD1, 0xA0,
 0x7C, 0x32, 0x7F, 0x6B, 0xCC, 0xEB, 0x4D, 0xEB,
 0x71, 0xC0, 0xC2, 0xA4, 0x40, 0x6A, 0x4C, 0xEE,
@@ -6510,344 +6905,404 @@ u8 array_mp_8822b_fw_ap[] = {
 0xA8, 0x35, 0xCC, 0xEB, 0xAD, 0xEB, 0x72, 0xC0,
 0xA2, 0xA4, 0x30, 0x6B, 0x03, 0x4C, 0x6C, 0xED,
 0x9F, 0x4B, 0x4C, 0xEB, 0xAD, 0xEB, 0x30, 0xF0,
-0x20, 0x6A, 0x30, 0xF0, 0x20, 0x6D, 0x81, 0xF1,
-0x54, 0x9A, 0x81, 0xF1, 0xA0, 0x9D, 0x71, 0xC0,
+0x20, 0x6A, 0x30, 0xF0, 0x20, 0x6D, 0x01, 0xF0,
+0x40, 0x9A, 0xE0, 0xF7, 0xAC, 0x9D, 0x71, 0xC0,
 0x2C, 0x33, 0x49, 0xE3, 0xAD, 0xE3, 0xA0, 0xA4,
 0x01, 0x4C, 0xA0, 0xC2, 0x01, 0x4A, 0x6A, 0xEA,
-0xFA, 0x61, 0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF1,
-0x54, 0x9A, 0x2C, 0x33, 0x49, 0xE3, 0x60, 0x9A,
-0x30, 0xF0, 0x20, 0x6A, 0xC7, 0xF5, 0x55, 0xA2,
+0xFA, 0x61, 0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF0,
+0x40, 0x9A, 0x2C, 0x33, 0x49, 0xE3, 0x60, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0xC8, 0xF0, 0x43, 0xA2,
 0x01, 0x72, 0x16, 0x61, 0x30, 0xF0, 0x20, 0x6A,
-0x81, 0xF1, 0x58, 0x9A, 0x63, 0xEA, 0x10, 0x60,
-0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF1, 0x48, 0x9A,
+0x01, 0xF0, 0x44, 0x9A, 0x63, 0xEA, 0x10, 0x60,
+0x30, 0xF0, 0x20, 0x6A, 0xE0, 0xF7, 0x54, 0x9A,
 0x00, 0x6B, 0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A,
-0x81, 0xF1, 0x7C, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
-0x20, 0xF7, 0x48, 0x9A, 0x60, 0xDA, 0xF0, 0x17,
+0x01, 0xF0, 0x68, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
+0x60, 0xF5, 0x50, 0x9A, 0x60, 0xDA, 0xF0, 0x17,
 0x51, 0xA0, 0x03, 0x6B, 0x4A, 0x32, 0x6C, 0xEA,
-0x30, 0xF0, 0x20, 0x6B, 0xC7, 0xF5, 0x73, 0xA3,
+0x30, 0xF0, 0x20, 0x6B, 0xC8, 0xF0, 0x61, 0xA3,
 0x05, 0x73, 0x11, 0x61, 0x38, 0x22, 0x30, 0xF0,
-0x20, 0x6A, 0x81, 0xF1, 0x48, 0x9A, 0x00, 0x6B,
-0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF1,
-0x60, 0x9A, 0x30, 0xF0, 0x20, 0x6A, 0x20, 0xF7,
-0x48, 0x9A, 0x60, 0xDA, 0xF0, 0x17, 0x06, 0x73,
+0x20, 0x6A, 0xE0, 0xF7, 0x54, 0x9A, 0x00, 0x6B,
+0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF0,
+0x6C, 0x9A, 0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF5,
+0x50, 0x9A, 0x60, 0xDA, 0xF0, 0x17, 0x06, 0x73,
 0x12, 0x61, 0x02, 0x5A, 0x24, 0x61, 0x30, 0xF0,
-0x20, 0x6A, 0x81, 0xF1, 0x48, 0x9A, 0x00, 0x6B,
-0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF1,
-0x64, 0x9A, 0x30, 0xF0, 0x20, 0x6A, 0x20, 0xF7,
-0x48, 0x9A, 0x60, 0xDA, 0xF0, 0x17, 0x07, 0x73,
+0x20, 0x6A, 0xE0, 0xF7, 0x54, 0x9A, 0x00, 0x6B,
+0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF0,
+0x70, 0x9A, 0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF5,
+0x50, 0x9A, 0x60, 0xDA, 0xF0, 0x17, 0x07, 0x73,
 0x12, 0x61, 0x03, 0x72, 0x10, 0x61, 0x30, 0xF0,
-0x20, 0x6A, 0x81, 0xF1, 0x48, 0x9A, 0x00, 0x6B,
-0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF1,
-0x68, 0x9A, 0x30, 0xF0, 0x20, 0x6A, 0x20, 0xF7,
-0x48, 0x9A, 0x60, 0xDA, 0xF0, 0x17, 0x30, 0xF0,
-0x20, 0x6A, 0xC7, 0xF5, 0x56, 0xA2, 0x02, 0x72,
+0x20, 0x6A, 0xE0, 0xF7, 0x54, 0x9A, 0x00, 0x6B,
+0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF0,
+0x74, 0x9A, 0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF5,
+0x50, 0x9A, 0x60, 0xDA, 0xF0, 0x17, 0x30, 0xF0,
+0x20, 0x6A, 0xC8, 0xF0, 0x44, 0xA2, 0x02, 0x72,
 0x15, 0x61, 0x51, 0xA0, 0x03, 0x6B, 0x52, 0x32,
 0x6C, 0xEA, 0x10, 0x22, 0x30, 0xF0, 0x20, 0x6A,
-0x81, 0xF1, 0x48, 0x9A, 0x00, 0x6B, 0x60, 0xC2,
-0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF1, 0x6C, 0x9A,
-0x30, 0xF0, 0x20, 0x6A, 0x20, 0xF7, 0x48, 0x9A,
+0xE0, 0xF7, 0x54, 0x9A, 0x00, 0x6B, 0x60, 0xC2,
+0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF0, 0x78, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF5, 0x50, 0x9A,
 0x60, 0xDA, 0xF0, 0x17, 0x91, 0x67, 0x00, 0x18,
-0x6E, 0x2F, 0x76, 0xA0, 0x01, 0x6A, 0x6C, 0xEA,
-0x03, 0x22, 0x91, 0x67, 0x00, 0x18, 0x1A, 0x30,
+0x60, 0x35, 0x76, 0xA0, 0x01, 0x6A, 0x6C, 0xEA,
+0x03, 0x22, 0x91, 0x67, 0x00, 0x18, 0x0A, 0x36,
 0x07, 0x97, 0x06, 0x91, 0x05, 0x90, 0x04, 0x63,
+0x00, 0xEF, 0x00, 0x65, 0xFA, 0x63, 0x0B, 0x62,
+0x0A, 0xD1, 0x09, 0xD0, 0x40, 0xA4, 0x70, 0x69,
+0x30, 0xF0, 0x20, 0x68, 0x06, 0xD2, 0x81, 0xA4,
+0xE5, 0xF0, 0x10, 0x48, 0x05, 0xD4, 0x05, 0x92,
+0x9E, 0x33, 0x07, 0xD3, 0x8C, 0xE9, 0x7D, 0x67,
+0x03, 0x6C, 0x8C, 0xEA, 0x87, 0x43, 0x11, 0x4C,
+0x60, 0xA4, 0x32, 0x31, 0x04, 0xD2, 0x9D, 0x67,
+0x09, 0xE1, 0x83, 0xF3, 0x60, 0xC2, 0x67, 0x44,
+0x09, 0x4B, 0x80, 0xA3, 0x83, 0xF3, 0x82, 0xC2,
+0x30, 0xF0, 0x20, 0x6C, 0xA1, 0xF7, 0x04, 0x4C,
+0x00, 0x18, 0x38, 0x2A, 0x07, 0x92, 0x21, 0x22,
+0x83, 0xF3, 0x66, 0xA0, 0x01, 0x6A, 0x44, 0xE9,
+0x6D, 0xEA, 0x83, 0xF3, 0x46, 0xC0, 0xC2, 0xF7,
+0x58, 0x98, 0x10, 0x6B, 0x6C, 0xEA, 0x0D, 0x22,
+0xC2, 0xF7, 0x5C, 0x98, 0x05, 0x5A, 0x09, 0x61,
+0x04, 0x96, 0x06, 0x97, 0x30, 0xF0, 0x20, 0x6C,
+0xA1, 0xF7, 0x10, 0x4C, 0xB1, 0x67, 0x00, 0x18,
+0x38, 0x2A, 0x05, 0x93, 0x0C, 0x6D, 0x91, 0x67,
+0x6C, 0xED, 0xAA, 0x35, 0x00, 0x18, 0x59, 0x31,
+0x23, 0x10, 0x83, 0xF3, 0x66, 0xA0, 0x01, 0x6A,
+0x44, 0xE9, 0x4F, 0xEA, 0x6C, 0xEA, 0x83, 0xF3,
+0x46, 0xC0, 0xC2, 0xF7, 0x58, 0x98, 0x10, 0x6B,
+0x6C, 0xEA, 0x0D, 0x22, 0xC2, 0xF7, 0x5C, 0x98,
+0x05, 0x5A, 0x09, 0x61, 0x04, 0x96, 0x06, 0x97,
+0x30, 0xF0, 0x20, 0x6C, 0xC1, 0xF7, 0x04, 0x4C,
+0xB1, 0x67, 0x00, 0x18, 0x38, 0x2A, 0x30, 0xF0,
+0x20, 0x6A, 0xE5, 0xF0, 0x10, 0x4A, 0x45, 0xE1,
+0x01, 0x6A, 0x4B, 0xEA, 0x83, 0xF3, 0x40, 0xC1,
+0x0B, 0x97, 0x0A, 0x91, 0x09, 0x90, 0x06, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0xFC, 0x63, 0x07, 0x62,
-0x06, 0xD1, 0x05, 0xD0, 0x20, 0xA4, 0x28, 0x68,
-0x30, 0xF0, 0x20, 0x6A, 0x18, 0xE9, 0x68, 0xF1,
-0x00, 0x4A, 0x21, 0x6B, 0x20, 0x6E, 0x6B, 0xEB,
-0x12, 0xE8, 0x01, 0xE2, 0x42, 0xA4, 0xFF, 0xA0,
-0x5C, 0xC0, 0xA3, 0xA4, 0xEC, 0xEB, 0x01, 0x6A,
-0xCC, 0xED, 0xAD, 0xEB, 0x7F, 0xC0, 0xA3, 0xA4,
+0x06, 0xD1, 0x05, 0xD0, 0x20, 0xA4, 0x2A, 0x68,
+0x30, 0xF0, 0x20, 0x6A, 0x18, 0xE9, 0x68, 0xF4,
+0x1C, 0x4A, 0x21, 0x6B, 0x20, 0x6E, 0x6B, 0xEB,
+0x12, 0xE8, 0x01, 0xE2, 0x42, 0xA4, 0xFE, 0xA0,
+0x5B, 0xC0, 0xA3, 0xA4, 0xEC, 0xEB, 0x01, 0x6A,
+0xCC, 0xED, 0xAD, 0xEB, 0x7E, 0xC0, 0xA3, 0xA4,
 0xAC, 0xEA, 0x02, 0x6D, 0xAB, 0xED, 0x6C, 0xED,
-0x4D, 0xED, 0xBF, 0xC0, 0x43, 0xA4, 0x02, 0x6B,
+0x4D, 0xED, 0xBE, 0xC0, 0x43, 0xA4, 0x02, 0x6B,
 0x6C, 0xEA, 0xFB, 0x4B, 0xAC, 0xEB, 0x4D, 0xEB,
-0x7F, 0xC0, 0xA3, 0xA4, 0x40, 0x6A, 0x4C, 0xED,
+0x7E, 0xC0, 0xA3, 0xA4, 0x40, 0x6A, 0x4C, 0xED,
 0x80, 0x4A, 0xFF, 0x4A, 0x6C, 0xEA, 0xAD, 0xEA,
-0x5F, 0xC0, 0x64, 0xA4, 0xCC, 0xEA, 0x20, 0xF0,
+0x5E, 0xC0, 0x64, 0xA4, 0xCC, 0xEA, 0x20, 0xF0,
 0x67, 0xC0, 0x0D, 0x22, 0x91, 0x67, 0x00, 0x18,
-0x2B, 0x36, 0xD1, 0xA0, 0x03, 0x6A, 0xBC, 0xA0,
+0x50, 0x3C, 0xD1, 0xA0, 0x03, 0x6A, 0xBB, 0xA0,
 0xCA, 0x36, 0x4C, 0xEE, 0xFF, 0x6A, 0x91, 0x67,
-0x4C, 0xEE, 0x00, 0x18, 0x8B, 0x35, 0x07, 0x97,
+0x4C, 0xEE, 0x00, 0x18, 0xB0, 0x3B, 0x07, 0x97,
 0x06, 0x91, 0x05, 0x90, 0x04, 0x63, 0x00, 0xEF,
 0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x03, 0xA4,
 0x44, 0xA4, 0xC0, 0xA4, 0x00, 0x30, 0x00, 0x30,
 0x00, 0xF6, 0x40, 0x32, 0xA5, 0xA4, 0xE6, 0xA4,
 0x0D, 0xEA, 0x01, 0xA4, 0x82, 0xA4, 0x30, 0xF0,
-0x20, 0x6B, 0x0D, 0xEA, 0x80, 0x34, 0xC5, 0xF2,
-0x10, 0x4B, 0x8D, 0xEA, 0x02, 0xF3, 0x4C, 0xDB,
-0x66, 0xF6, 0xD3, 0xC3, 0x0A, 0x26, 0x01, 0x6C,
-0x4C, 0xEC, 0x07, 0x24, 0x66, 0xF6, 0xB4, 0xC3,
-0x66, 0xF6, 0xF5, 0xC3, 0x02, 0x25, 0x00, 0x18,
-0xAF, 0x35, 0x05, 0x97, 0x04, 0x90, 0x03, 0x63,
-0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0xFF, 0x6A, 0x4C, 0xEC, 0xC0, 0x4C, 0x4C, 0xEC,
-0x0B, 0x5C, 0x2B, 0x60, 0x30, 0xF0, 0x20, 0x6A,
-0x88, 0x34, 0x00, 0xF2, 0x14, 0x4A, 0x89, 0xE2,
-0x40, 0x9A, 0x00, 0xEA, 0x85, 0x67, 0x00, 0x18,
-0xF5, 0x27, 0x1F, 0x10, 0x85, 0x67, 0x00, 0x18,
-0x69, 0x28, 0x1B, 0x10, 0x85, 0x67, 0x00, 0x18,
-0xD2, 0x27, 0x17, 0x10, 0x85, 0x67, 0x00, 0x18,
-0x6A, 0x27, 0x13, 0x10, 0x85, 0x67, 0x00, 0x18,
-0xE1, 0x26, 0x0F, 0x10, 0x85, 0x67, 0x00, 0x18,
-0x8C, 0x28, 0x0B, 0x10, 0x85, 0x67, 0x00, 0x18,
-0x79, 0x14, 0x07, 0x10, 0x85, 0x67, 0x00, 0x18,
-0x22, 0x26, 0x03, 0x10, 0x85, 0x67, 0x00, 0x18,
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 0x78, 0xEC, 0x55, 0xE5, 0x30, 0xF0, 0x20, 0x6A,
-0xC5, 0xF2, 0x10, 0x4A, 0x12, 0xEB, 0x69, 0xE2,
-0xE7, 0xF0, 0x5C, 0x9A, 0x40, 0xDD, 0x1F, 0xF7,
+0xE5, 0xF0, 0x10, 0x4A, 0x12, 0xEB, 0x69, 0xE2,
+0x67, 0xF7, 0x50, 0x9A, 0x40, 0xDD, 0x1F, 0xF7,
 0x00, 0x6A, 0xEC, 0xEA, 0x05, 0x2A, 0x30, 0xF0,
-0x20, 0x6A, 0x40, 0xF7, 0x7C, 0x9A, 0x04, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF7, 0x60, 0x9A,
-0x30, 0xF0, 0x20, 0x6A, 0xC5, 0xF2, 0x10, 0x4A,
-0x49, 0xE4, 0x68, 0xF5, 0x44, 0xA2, 0x6D, 0xE7,
+0x20, 0x6A, 0x80, 0xF6, 0x6C, 0x9A, 0x04, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0x80, 0xF6, 0x70, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0xE5, 0xF0, 0x10, 0x4A,
+0x49, 0xE4, 0xC9, 0xF3, 0x58, 0xA2, 0x6D, 0xE7,
 0x40, 0xC3, 0x41, 0x47, 0x1F, 0xF7, 0x00, 0x6B,
 0x6C, 0xEA, 0x02, 0xF0, 0x00, 0x72, 0x01, 0x60,
-0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF1,
-0x6C, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0xE1, 0xF1, 0x70, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
-0xC5, 0xF2, 0x10, 0x4A, 0x49, 0xE4, 0xA8, 0xF6,
-0x42, 0xA2, 0x6D, 0xE7, 0x40, 0xC3, 0x42, 0x47,
+0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF0,
+0x78, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
+0x41, 0xF0, 0x7C, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
+0xE5, 0xF0, 0x10, 0x4A, 0x49, 0xE4, 0x09, 0xF5,
+0x56, 0xA2, 0x6D, 0xE7, 0x40, 0xC3, 0x42, 0x47,
 0x1F, 0xF7, 0x00, 0x6B, 0x6C, 0xEA, 0x02, 0xF0,
 0x00, 0x72, 0x01, 0x60, 0x05, 0x2A, 0x30, 0xF0,
-0x20, 0x6A, 0x41, 0xF1, 0x44, 0x9A, 0x04, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF1, 0x54, 0x9A,
-0x5D, 0xE7, 0x30, 0xF0, 0x20, 0x6A, 0xC5, 0xF2,
-0x10, 0x4A, 0x51, 0xE4, 0x08, 0xF6, 0x43, 0xA4,
+0x20, 0x6A, 0xA0, 0xF6, 0x5C, 0x9A, 0x04, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF0, 0x40, 0x9A,
+0x5D, 0xE7, 0x30, 0xF0, 0x20, 0x6A, 0xE5, 0xF0,
+0x10, 0x4A, 0x51, 0xE4, 0x69, 0xF4, 0x57, 0xA4,
 0x40, 0xC7, 0x03, 0x91, 0x02, 0x90, 0x02, 0x63,
 0x20, 0xE8, 0x00, 0x65, 0x20, 0xE8, 0x00, 0x65,
 0xAA, 0xEC, 0x64, 0x6A, 0x31, 0x60, 0x2F, 0x24,
@@ -6866,8 +7321,8 @@ u8 array_mp_8822b_fw_ap[] = {
 0xFF, 0x6B, 0x6C, 0xEA, 0x20, 0xE8, 0x00, 0x65,
 0x40, 0xA4, 0x60, 0xA5, 0x60, 0xC4, 0x40, 0xC5,
 0x20, 0xE8, 0x00, 0x65, 0xFF, 0x6B, 0x6C, 0xED,
-0x30, 0xF0, 0x20, 0x6A, 0xA4, 0x35, 0x65, 0xF1,
-0x0C, 0x4A, 0x49, 0xE5, 0x40, 0xAA, 0x6C, 0xEC,
+0x30, 0xF0, 0x20, 0x6A, 0xA4, 0x35, 0xA4, 0xF7,
+0x04, 0x4A, 0x49, 0xE5, 0x40, 0xAA, 0x6C, 0xEC,
 0xCC, 0xEB, 0x58, 0xEC, 0xFF, 0xF7, 0x1F, 0x6C,
 0x12, 0xEA, 0x8C, 0xEA, 0x05, 0x23, 0x52, 0x35,
 0x56, 0x33, 0x6D, 0xE5, 0x49, 0xE3, 0x8C, 0xEA,
@@ -6879,7 +7334,7 @@ u8 array_mp_8822b_fw_ap[] = {
 0xA4, 0x35, 0xB5, 0xE0, 0x57, 0xE5, 0x00, 0x6A,
 0x0A, 0x25, 0x6B, 0xEB, 0xFF, 0xE3, 0x27, 0xE7,
 0x93, 0xE1, 0xB1, 0xE4, 0x83, 0xED, 0x64, 0x6A,
-0x02, 0x61, 0x00, 0x18, 0xC0, 0x2A, 0x07, 0x97,
+0x02, 0x61, 0x00, 0x18, 0xA2, 0x2E, 0x07, 0x97,
 0x06, 0x91, 0x05, 0x90, 0x04, 0x63, 0x00, 0xEF,
 0xFF, 0x6A, 0x4C, 0xEC, 0x20, 0x5C, 0x01, 0x6B,
 0x03, 0x60, 0xE0, 0x4C, 0x4C, 0xEC, 0x00, 0x6B,
@@ -6889,595 +7344,858 @@ u8 array_mp_8822b_fw_ap[] = {
 0xFF, 0x6B, 0x44, 0x67, 0x6C, 0xEA, 0x6C, 0xEE,
 0x6C, 0xED, 0x82, 0x67, 0x03, 0x26, 0x88, 0x42,
 0xE8, 0x4C, 0x6C, 0xEC, 0x20, 0x5C, 0x0B, 0x61,
-0x30, 0xF0, 0x20, 0x6B, 0x81, 0xF1, 0x60, 0x9B,
+0x30, 0xF0, 0x20, 0x6B, 0xE0, 0xF7, 0x6C, 0x9B,
 0xAC, 0x35, 0xE0, 0x4C, 0x75, 0xE5, 0xFF, 0x6B,
 0xA0, 0x9D, 0x6C, 0xEC, 0x07, 0x10, 0x30, 0xF0,
-0x20, 0x6B, 0x81, 0xF1, 0x74, 0x9B, 0xAC, 0x35,
+0x20, 0x6B, 0x01, 0xF0, 0x60, 0x9B, 0xAC, 0x35,
 0x75, 0xE5, 0xA0, 0x9D, 0x01, 0x6B, 0x64, 0xEC,
 0xAC, 0xEB, 0x01, 0x2B, 0xFF, 0x6A, 0x20, 0xE8,
-0xFF, 0x6A, 0x8C, 0xEA, 0x28, 0x6B, 0x78, 0xEA,
-0x30, 0xF0, 0x20, 0x6B, 0x68, 0xF1, 0x00, 0x4B,
+0xFF, 0x6A, 0x8C, 0xEA, 0x2A, 0x6B, 0x78, 0xEA,
+0x30, 0xF0, 0x20, 0x6B, 0x68, 0xF4, 0x1C, 0x4B,
 0x12, 0xEA, 0x49, 0xE3, 0x93, 0xA2, 0x7F, 0x6B,
 0x6C, 0xEC, 0x93, 0xC2, 0x92, 0xA2, 0x8C, 0xEB,
 0x72, 0xC2, 0x20, 0xE8, 0xFF, 0x6A, 0xAC, 0xEA,
-0x20, 0xE8, 0x00, 0x65, 0xFF, 0x6A, 0x4C, 0xEC,
-0x28, 0x6B, 0x78, 0xEC, 0x30, 0xF0, 0x20, 0x6B,
-0x68, 0xF1, 0x00, 0x4B, 0x19, 0x6E, 0xCB, 0xEE,
-0x4C, 0xED, 0x12, 0xEC, 0x91, 0xE3, 0x72, 0xA4,
-0x6C, 0xEE, 0x04, 0x6B, 0xCC, 0xEB, 0x4C, 0xEB,
-0xD2, 0xC4, 0x53, 0x23, 0xD0, 0xA4, 0x80, 0x6B,
-0x6B, 0xEB, 0xCC, 0xEB, 0x4C, 0xEB, 0x4D, 0x23,
-0xEE, 0xA4, 0x07, 0x6E, 0x7F, 0x6B, 0xEC, 0xEE,
-0x4C, 0xEE, 0x03, 0x76, 0xAC, 0xEB, 0x1C, 0x61,
-0x47, 0x73, 0x06, 0x61, 0xD1, 0xA4, 0x0C, 0x6A,
-0xCC, 0xEA, 0x08, 0x72, 0xC5, 0x6A, 0x44, 0x60,
-0xC7, 0x75, 0x02, 0x60, 0x48, 0x75, 0x06, 0x61,
-0xD1, 0xA4, 0x0C, 0x6A, 0xCC, 0xEA, 0x08, 0x72,
-0x47, 0x6A, 0x3A, 0x60, 0xC5, 0x75, 0x33, 0x60,
-0x46, 0x75, 0x31, 0x60, 0x48, 0x43, 0xC3, 0x4A,
-0xFF, 0x6E, 0xCC, 0xEA, 0x05, 0x5A, 0x13, 0x10,
-0x02, 0x76, 0x07, 0x61, 0xBD, 0x75, 0x29, 0x60,
-0x3E, 0x75, 0x27, 0x60, 0xC8, 0x43, 0xCA, 0x4E,
-0x08, 0x10, 0x01, 0x76, 0x1E, 0x61, 0xB3, 0x75,
-0x22, 0x60, 0x34, 0x75, 0x20, 0x60, 0xC8, 0x43,
-0xD4, 0x4E, 0x4C, 0xEE, 0x02, 0x5E, 0x15, 0x60,
-0xBE, 0x35, 0x03, 0x25, 0x01, 0x4B, 0xFF, 0x6A,
-0x4C, 0xEB, 0x80, 0x6D, 0x4E, 0x43, 0xAB, 0xED,
-0xAD, 0xEA, 0xFF, 0x6D, 0xFF, 0x4B, 0xAC, 0xEA,
-0xB2, 0xA4, 0x65, 0xC4, 0x19, 0x6B, 0x6B, 0xEB,
-0xAC, 0xEB, 0x08, 0x6D, 0xAD, 0xEB, 0x72, 0xC4,
-0x20, 0xE8, 0xFF, 0x6A, 0x20, 0xE8, 0x45, 0x6A,
-0x20, 0xE8, 0x3D, 0x6A, 0x20, 0xE8, 0x33, 0x6A,
-0x20, 0xE8, 0x00, 0x65, 0xFF, 0x63, 0x01, 0xD0,
-0xFF, 0x6A, 0x4C, 0xEC, 0x28, 0x6B, 0x78, 0xEC,
-0x30, 0xF0, 0x20, 0x6B, 0x68, 0xF1, 0x00, 0x4B,
+0x20, 0xE8, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
+0x04, 0xD0, 0x7F, 0x68, 0x8C, 0xE8, 0x90, 0x67,
+0x00, 0x18, 0x82, 0x2C, 0x01, 0x6B, 0x12, 0x2A,
+0x90, 0x67, 0x00, 0x18, 0x92, 0x2C, 0x02, 0x6B,
+0x0D, 0x2A, 0x90, 0x67, 0x00, 0x18, 0xA2, 0x2C,
+0x03, 0x6B, 0x08, 0x2A, 0x90, 0x67, 0x00, 0x18,
+0xB3, 0x2C, 0x4B, 0xEB, 0x4D, 0xEB, 0xC0, 0xF7,
+0x62, 0x33, 0x68, 0x33, 0x05, 0x97, 0x04, 0x90,
+0x43, 0x67, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0xFF, 0x63, 0xFF, 0x6B, 0xBD, 0x67, 0x20, 0xF4,
+0x0D, 0x6A, 0x6C, 0xEC, 0x40, 0xCD, 0x84, 0x34,
+0x20, 0xF4, 0x0F, 0x6A, 0x41, 0xCD, 0x91, 0xE5,
+0x80, 0xAC, 0x1F, 0xF7, 0x00, 0x6A, 0x8C, 0xEA,
+0x02, 0xF0, 0x00, 0x72, 0x01, 0x60, 0x0A, 0x2A,
+0x30, 0xF0, 0x20, 0x6A, 0x80, 0xF6, 0x4C, 0x9A,
+0x51, 0xE4, 0x60, 0xA4, 0x0E, 0x6A, 0x6C, 0xEA,
+0x46, 0x32, 0x0A, 0x10, 0x30, 0xF0, 0x20, 0x6A,
+0x80, 0xF6, 0x50, 0x9A, 0x51, 0xE4, 0x80, 0xA4,
+0x0E, 0x6A, 0x8C, 0xEA, 0x47, 0x32, 0x6C, 0xEA,
+0x01, 0x63, 0x20, 0xE8, 0xFF, 0x63, 0x01, 0xD1,
+0x00, 0xD0, 0xFF, 0x68, 0x0C, 0xEC, 0x2A, 0x6A,
+0x58, 0xEC, 0x30, 0xF0, 0x20, 0x6A, 0x68, 0xF4,
+0x1C, 0x4A, 0xCC, 0xE8, 0x60, 0xA5, 0x12, 0xEC,
+0x91, 0xE2, 0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF0,
+0x48, 0x9A, 0xE0, 0xA4, 0xC1, 0xA4, 0x40, 0xA2,
+0x1A, 0x65, 0x38, 0x67, 0x20, 0x6A, 0x2C, 0xEA,
+0x25, 0x2A, 0xFF, 0x73, 0x01, 0x6A, 0x23, 0x60,
+0x7F, 0x69, 0x43, 0x67, 0x2C, 0xEA, 0x2C, 0xEF,
+0x43, 0xEF, 0x05, 0x60, 0x80, 0x6E, 0xCB, 0xEE,
+0x6C, 0xEE, 0xED, 0xEE, 0x02, 0x10, 0xC3, 0xEA,
+0x01, 0x60, 0xC0, 0xC5, 0x46, 0x72, 0x12, 0x61,
+0x02, 0x70, 0x10, 0x61, 0x6F, 0xA4, 0x10, 0x6A,
+0x4B, 0xEA, 0x6C, 0xEA, 0xFF, 0x6B, 0x6C, 0xEA,
+0x10, 0x72, 0x47, 0x6B, 0x01, 0x60, 0x45, 0x6B,
+0x80, 0xA5, 0x80, 0x6A, 0x4B, 0xEA, 0x8C, 0xEA,
+0x6D, 0xEA, 0x40, 0xC5, 0x00, 0x6A, 0x01, 0x91,
+0x00, 0x90, 0x01, 0x63, 0x20, 0xE8, 0x00, 0x65,
+0xFF, 0x6A, 0x4C, 0xEC, 0x2A, 0x6B, 0x78, 0xEC,
+0x30, 0xF0, 0x20, 0x6B, 0x68, 0xF4, 0x1C, 0x4B,
 0x19, 0x6E, 0xCB, 0xEE, 0x4C, 0xED, 0x12, 0xEC,
 0x91, 0xE3, 0x72, 0xA4, 0x6C, 0xEE, 0x04, 0x6B,
-0xCC, 0xEB, 0x4C, 0xEB, 0xD2, 0xC4, 0x51, 0x23,
+0xCC, 0xEB, 0x4C, 0xEB, 0xD2, 0xC4, 0x53, 0x23,
 0xD0, 0xA4, 0x80, 0x6B, 0x6B, 0xEB, 0xCC, 0xEB,
-0x4C, 0xEB, 0x4B, 0x23, 0x0E, 0xA4, 0x07, 0x6F,
-0x7F, 0x6B, 0x0C, 0xEF, 0x4C, 0xEF, 0x80, 0x6E,
-0x03, 0x77, 0xAC, 0xEB, 0xAC, 0xEE, 0x14, 0x61,
-0x45, 0x73, 0x09, 0x61, 0xF1, 0xA4, 0x0C, 0x6A,
-0xEC, 0xEA, 0x08, 0x72, 0x04, 0x61, 0x47, 0x6A,
-0x39, 0x2E, 0xC5, 0x6A, 0x37, 0x10, 0x48, 0x43,
-0xC3, 0x4A, 0xFF, 0x6F, 0xEC, 0xEA, 0x04, 0x5A,
-0x30, 0x60, 0x00, 0x6A, 0xC8, 0x75, 0x13, 0x10,
-0x02, 0x77, 0x08, 0x61, 0xE8, 0x43, 0xCB, 0x4F,
-0x4C, 0xEF, 0x02, 0x5F, 0x26, 0x60, 0x00, 0x6A,
-0xBE, 0x75, 0x09, 0x10, 0x01, 0x77, 0x21, 0x61,
-0xE8, 0x43, 0xD5, 0x4F, 0x4C, 0xEF, 0x02, 0x5F,
-0x1C, 0x60, 0x00, 0x6A, 0xB4, 0x75, 0x01, 0x60,
-0x01, 0x6A, 0x10, 0x22, 0x03, 0x26, 0x01, 0x4B,
-0xFF, 0x6A, 0x4C, 0xEB, 0xB2, 0xA4, 0x41, 0x43,
-0x45, 0xC4, 0x19, 0x6A, 0x4B, 0xEA, 0xAC, 0xEA,
-0x08, 0x6D, 0xAD, 0xEA, 0x52, 0xC4, 0x80, 0x6A,
-0x4B, 0xEA, 0x03, 0x10, 0x41, 0x43, 0x80, 0x6B,
-0x6B, 0xEB, 0x6D, 0xEA, 0xFF, 0x6B, 0x6C, 0xEA,
-0x01, 0x10, 0xFF, 0x6A, 0x01, 0x90, 0x01, 0x63,
-0x20, 0xE8, 0x00, 0x65, 0xFF, 0x63, 0x01, 0xD1,
-0x00, 0xD0, 0xFF, 0x6A, 0x8C, 0xEA, 0x05, 0x67,
-0x30, 0xF0, 0x20, 0x69, 0x84, 0xF4, 0xA8, 0x42,
-0xC5, 0xF2, 0x10, 0x49, 0xA4, 0x35, 0x06, 0x93,
-0x35, 0xE5, 0xFF, 0xF7, 0x1F, 0x6C, 0x27, 0xAD,
-0x8C, 0xEE, 0x8C, 0xEF, 0x8C, 0xEB, 0xD3, 0xE4,
-0x22, 0xEC, 0x03, 0x61, 0x39, 0xE6, 0xC7, 0xCD,
-0x03, 0x10, 0x01, 0x6C, 0x8B, 0xEC, 0x87, 0xCD,
-0x30, 0xF0, 0x20, 0x6D, 0xE4, 0xF3, 0x88, 0x42,
-0xC5, 0xF2, 0x10, 0x4D, 0x84, 0x34, 0xB1, 0xE4,
-0xA8, 0xAC, 0xFF, 0xF7, 0x1F, 0x6E, 0xFB, 0xE6,
-0xA2, 0xEE, 0x03, 0x61, 0xBD, 0xE7, 0xE8, 0xCC,
-0x03, 0x10, 0x01, 0x6D, 0xAB, 0xED, 0xA8, 0xCC,
-0x30, 0xF0, 0x20, 0x6C, 0xC5, 0xF2, 0x10, 0x4C,
-0x49, 0xF2, 0xBC, 0x9C, 0x6F, 0xEE, 0xA3, 0xEE,
-0xAD, 0xE3, 0x02, 0x60, 0x01, 0x6B, 0x6B, 0xEB,
-0x49, 0xF2, 0x7C, 0xDC, 0x30, 0xF0, 0x20, 0x6C,
-0x24, 0xF5, 0x68, 0x42, 0xC5, 0xF2, 0x10, 0x4C,
-0x64, 0x33, 0x07, 0x96, 0x8D, 0xE3, 0x88, 0xAB,
-0xFF, 0xF7, 0x1F, 0x6D, 0xD7, 0xE5, 0x83, 0xED,
-0x91, 0xE6, 0x02, 0x60, 0x01, 0x6C, 0x8B, 0xEC,
-0x88, 0xCB, 0xC4, 0xF5, 0x08, 0x4A, 0x30, 0xF0,
-0x20, 0x6B, 0xC5, 0xF2, 0x10, 0x4B, 0x44, 0x32,
-0x69, 0xE2, 0x67, 0xAA, 0xFF, 0xF7, 0x1F, 0x6C,
-0x13, 0xE4, 0x63, 0xEC, 0x03, 0x61, 0x61, 0xE0,
-0x07, 0xCA, 0x03, 0x10, 0x01, 0x6B, 0x6B, 0xEB,
-0x67, 0xCA, 0x01, 0x91, 0x00, 0x90, 0x01, 0x63,
-0x20, 0xE8, 0x00, 0x65, 0xFF, 0x6B, 0x6C, 0xED,
-0x6C, 0xEC, 0x0F, 0x2D, 0x48, 0x44, 0xFC, 0x4A,
-0x6C, 0xEA, 0x08, 0x5A, 0x1D, 0x61, 0x48, 0x44,
-0xF4, 0x4A, 0x6C, 0xEA, 0x08, 0x5A, 0x16, 0x61,
-0x48, 0x44, 0xEC, 0x4A, 0x6C, 0xEA, 0x08, 0x5A,
-0x0E, 0x10, 0x48, 0x44, 0xDC, 0x4A, 0x6C, 0xEA,
-0x0A, 0x5A, 0x0E, 0x61, 0x48, 0x44, 0xD2, 0x4A,
-0x6C, 0xEA, 0x0A, 0x5A, 0x07, 0x61, 0x48, 0x44,
-0xC8, 0x4A, 0x6C, 0xEA, 0x0A, 0x5A, 0x03, 0x6A,
-0x06, 0x61, 0x04, 0x10, 0x02, 0x6A, 0x03, 0x10,
-0x01, 0x6A, 0x01, 0x10, 0x00, 0x6A, 0x30, 0xF0,
-0x20, 0x6B, 0xAE, 0xF7, 0x70, 0xA3, 0x03, 0x73,
-0x22, 0x61, 0x03, 0x72, 0x35, 0x60, 0x02, 0x72,
-0x11, 0x61, 0x08, 0x2D, 0x30, 0xF0, 0x20, 0x6A,
-0x25, 0xF2, 0x04, 0x4A, 0x51, 0xE4, 0xFF, 0xF7,
-0x4C, 0xA4, 0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6A,
-0x45, 0xF2, 0x04, 0x4A, 0x51, 0xE4, 0xDF, 0xF7,
-0x4A, 0xA4, 0x20, 0xE8, 0x01, 0x72, 0x22, 0x61,
-0x05, 0x2D, 0x30, 0xF0, 0x20, 0x6A, 0x05, 0xF2,
-0x1C, 0x4A, 0x0E, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0x25, 0xF2, 0x18, 0x4A, 0x11, 0x10, 0x02, 0x72,
-0x13, 0x60, 0x01, 0x72, 0x13, 0x61, 0x08, 0x2D,
-0x30, 0xF0, 0x20, 0x6A, 0x05, 0xF2, 0x14, 0x4A,
-0x51, 0xE4, 0xFF, 0xF7, 0x54, 0xA4, 0x20, 0xE8,
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+0xF9, 0x63, 0x0D, 0x62, 0x0C, 0xD1, 0x0B, 0xD0,
+0xFF, 0x6A, 0x7D, 0x67, 0x4C, 0xEE, 0x4C, 0xEF,
+0x20, 0xF0, 0xBC, 0xC3, 0x08, 0xD6, 0x06, 0xD7,
+0x24, 0x67, 0x20, 0xF0, 0x9C, 0xA3, 0x30, 0xF0,
+0x20, 0x6B, 0xC0, 0xF7, 0x78, 0x9B, 0x4C, 0xE9,
+0x07, 0xD4, 0x34, 0x34, 0x6D, 0xE4, 0x60, 0xA3,
+0x91, 0x67, 0x0F, 0x05, 0x6C, 0xEA, 0xC7, 0x67,
+0x09, 0xD2, 0x00, 0x18, 0x2D, 0x2F, 0xE0, 0xF0,
+0x18, 0x2A, 0x2A, 0x68, 0x18, 0xE9, 0x30, 0xF0,
+0x20, 0x6A, 0x68, 0xF4, 0x1C, 0x4A, 0x12, 0xE8,
+0x01, 0xE2, 0x08, 0x92, 0x3A, 0x2A, 0x72, 0xA0,
+0xBF, 0x4A, 0xD1, 0x67, 0x6C, 0xEA, 0x52, 0xC0,
+0x7D, 0x67, 0x20, 0xF0, 0x5C, 0xA3, 0x87, 0x43,
+0x19, 0x4C, 0x43, 0xC0, 0x80, 0xA4, 0xA7, 0x43,
+0x19, 0x4D, 0x99, 0xC0, 0x6E, 0xA0, 0xA0, 0xA5,
+0x10, 0x6A, 0x6D, 0xEA, 0xBA, 0xC0, 0x4E, 0xC0,
+0x5D, 0x67, 0x20, 0xF0, 0xFC, 0xA2, 0x08, 0x93,
+0x00, 0x6C, 0xA4, 0x67, 0x04, 0xD3, 0x00, 0x18,
+0x9B, 0x34, 0x30, 0xF0, 0x20, 0x6A, 0xE5, 0xF0,
+0x10, 0x4A, 0xC2, 0xF7, 0x78, 0x9A, 0x01, 0x6C,
+0x8C, 0xEB, 0x6D, 0x23, 0xC2, 0xF7, 0x5C, 0x9A,
+0x05, 0x5A, 0x69, 0x61, 0x5D, 0x67, 0x20, 0xF0,
+0xDC, 0xA2, 0x06, 0x97, 0x30, 0xF0, 0x20, 0x6C,
+0x42, 0xF2, 0x0C, 0x4C, 0xB1, 0x67, 0x00, 0x18,
+0x38, 0x2A, 0x00, 0x6B, 0x07, 0xD3, 0x43, 0x67,
+0x61, 0x10, 0x07, 0x94, 0x7F, 0x6A, 0x40, 0x6B,
+0x8C, 0xEA, 0x92, 0xA0, 0xBD, 0x67, 0x8D, 0xEB,
+0x72, 0xC0, 0x20, 0xF0, 0x7C, 0xA5, 0x8E, 0xA0,
+0x63, 0xC0, 0x11, 0x6B, 0x6B, 0xEB, 0x8C, 0xEB,
+0x30, 0xF0, 0x20, 0x6C, 0x6E, 0xC0, 0xE5, 0xF0,
+0x10, 0x4C, 0x30, 0xF0, 0x20, 0x6B, 0xA4, 0xF3,
+0x1C, 0x4B, 0x91, 0xE2, 0x6D, 0xE2, 0x27, 0xF3,
+0x97, 0xA4, 0x60, 0xA3, 0xA6, 0x44, 0x62, 0xED,
+0x01, 0x60, 0x8F, 0xE3, 0x78, 0xC0, 0x30, 0xF0,
+0x20, 0x6B, 0x04, 0xF6, 0x00, 0x4B, 0x69, 0xE2,
+0x9B, 0xA0, 0x40, 0xA2, 0x43, 0xEC, 0x03, 0x60,
+0x58, 0xA0, 0x04, 0x4A, 0x58, 0xC0, 0x6E, 0xA0,
+0x08, 0x6A, 0x6C, 0xEA, 0x0B, 0x22, 0x5D, 0x67,
+0x20, 0xF0, 0xDC, 0xA2, 0xF8, 0xA0, 0x30, 0xF0,
+0x20, 0x6C, 0x62, 0xF2, 0x00, 0x4C, 0xB1, 0x67,
+0x00, 0x18, 0x38, 0x2A, 0x30, 0xF0, 0x20, 0x6A,
+0xE5, 0xF0, 0x10, 0x4A, 0xC2, 0xF7, 0x78, 0x9A,
+0x01, 0x6C, 0x8C, 0xEB, 0x18, 0x23, 0xC2, 0xF7,
+0x5C, 0x9A, 0x05, 0x5A, 0x14, 0x61, 0x7D, 0x67,
+0x20, 0xF0, 0xDC, 0xA3, 0x58, 0xA0, 0x06, 0x97,
+0x30, 0xF0, 0x20, 0x6C, 0x62, 0xF2, 0x10, 0x4C,
+0xB1, 0x67, 0x04, 0xD2, 0x00, 0x18, 0x38, 0x2A,
+0x01, 0x6C, 0x07, 0xD4, 0x06, 0x10, 0x00, 0x6D,
+0x07, 0xD5, 0x45, 0x67, 0x03, 0x10, 0x01, 0x6A,
+0x07, 0xD2, 0x40, 0x6A, 0x06, 0x95, 0x09, 0x94,
+0x07, 0x6B, 0x8C, 0xEB, 0xAC, 0x34, 0x8D, 0xE3,
+0x4D, 0xEB, 0x00, 0xF6, 0x60, 0x33, 0x00, 0xF6,
+0x63, 0x33, 0x06, 0xD3, 0x06, 0x92, 0xFF, 0x6B,
+0x6C, 0xEA, 0x06, 0xD2, 0x96, 0xA0, 0x01, 0x6A,
+0x8C, 0xEA, 0x6C, 0xEA, 0x0C, 0x22, 0x7D, 0x67,
+0x20, 0xF0, 0xBC, 0xA3, 0x91, 0x67, 0x00, 0x18,
+0xE7, 0x15, 0x3E, 0x32, 0x36, 0x2A, 0x06, 0x94,
+0xBF, 0x6A, 0x4C, 0xEC, 0x06, 0xD4, 0x5D, 0x67,
+0x20, 0xF0, 0xDC, 0xA2, 0x91, 0x67, 0x00, 0x6D,
+0x00, 0x18, 0xF9, 0x2C, 0x06, 0x96, 0x91, 0x67,
+0x01, 0x6D, 0x00, 0x18, 0xF9, 0x2C, 0x91, 0x67,
+0x00, 0x18, 0x00, 0x32, 0x7D, 0x67, 0x20, 0xF0,
+0xBC, 0xA3, 0x08, 0x96, 0x91, 0x67, 0x34, 0x31,
+0x00, 0x18, 0xEE, 0x30, 0x30, 0xF0, 0x20, 0x6A,
+0x9D, 0x67, 0xE0, 0xF7, 0x40, 0x9A, 0x20, 0xF0,
+0x7C, 0xA4, 0xA7, 0x44, 0x49, 0xE1, 0x60, 0xC2,
+0x30, 0xF0, 0x20, 0x6A, 0xC0, 0xF7, 0x58, 0x9A,
+0x11, 0x4D, 0xA0, 0xA5, 0x49, 0xE1, 0xA0, 0xC2,
+0x30, 0xF0, 0x20, 0x6A, 0xC1, 0xF0, 0x40, 0x9A,
+0x45, 0xE1, 0x47, 0x44, 0x15, 0x4A, 0x40, 0xA2,
+0x40, 0xC1, 0x0D, 0x97, 0x0C, 0x91, 0x0B, 0x90,
+0x07, 0x63, 0x00, 0xEF, 0xFB, 0x63, 0x09, 0x62,
 0x08, 0xD1, 0x07, 0xD0, 0xFF, 0x6A, 0x24, 0x67,
-0x4C, 0xE9, 0x28, 0x6C, 0x98, 0xE9, 0x30, 0xF0,
-0x20, 0x6B, 0x4C, 0xED, 0x68, 0xF1, 0x00, 0x4B,
+0x4C, 0xE9, 0x2A, 0x6C, 0x98, 0xE9, 0x30, 0xF0,
+0x20, 0x6B, 0x4C, 0xED, 0x68, 0xF4, 0x1C, 0x4B,
 0x04, 0xD5, 0x33, 0x68, 0x12, 0xEC, 0x91, 0xE3,
 0xB6, 0xA4, 0x01, 0x6B, 0xAC, 0xEB, 0x4C, 0xEB,
-0x03, 0x23, 0x00, 0xA4, 0xFE, 0x48, 0x4C, 0xE8,
-0x30, 0xF0, 0x20, 0x6A, 0xC5, 0xF2, 0x10, 0x4A,
-0x02, 0xF3, 0x6C, 0x9A, 0x02, 0x6C, 0x8C, 0xEB,
-0x0C, 0x23, 0x02, 0xF3, 0x50, 0x9A, 0x05, 0x5A,
-0x08, 0x61, 0x30, 0xF0, 0x20, 0x6C, 0x42, 0xF2,
-0x10, 0x4C, 0xB1, 0x67, 0xD0, 0x67, 0x00, 0x18,
-0xD0, 0x26, 0x04, 0x97, 0x91, 0x67, 0xB0, 0x67,
-0x00, 0x6E, 0x00, 0x18, 0x4F, 0x2E, 0x09, 0x97,
+0x03, 0x23, 0x00, 0xA4, 0xFF, 0x48, 0x4C, 0xE8,
+0x30, 0xF0, 0x20, 0x6A, 0xE5, 0xF0, 0x10, 0x4A,
+0xC2, 0xF7, 0x78, 0x9A, 0x02, 0x6C, 0x8C, 0xEB,
+0x0C, 0x23, 0xC2, 0xF7, 0x5C, 0x9A, 0x05, 0x5A,
+0x08, 0x61, 0x30, 0xF0, 0x20, 0x6C, 0x82, 0xF2,
+0x08, 0x4C, 0xB1, 0x67, 0xD0, 0x67, 0x00, 0x18,
+0x38, 0x2A, 0x04, 0x97, 0x91, 0x67, 0xB0, 0x67,
+0x00, 0x6E, 0x00, 0x18, 0xB4, 0x34, 0x09, 0x97,
 0x08, 0x91, 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF,
 0xFA, 0x63, 0x0B, 0x62, 0x0A, 0xD1, 0x09, 0xD0,
-0xFF, 0x6A, 0x8C, 0xEA, 0x28, 0x68, 0x18, 0xEA,
-0x06, 0xD2, 0x30, 0xF0, 0x20, 0x6A, 0x68, 0xF1,
-0x00, 0x4A, 0x12, 0xE8, 0x01, 0xE2, 0x84, 0xA0,
-0x0F, 0x5C, 0x4C, 0x60, 0x30, 0xF0, 0x20, 0x6A,
-0x88, 0x33, 0x80, 0xF2, 0x18, 0x4A, 0x69, 0xE2,
-0x40, 0x9A, 0x00, 0xEA, 0x1B, 0x6A, 0x37, 0x10,
-0x6E, 0xA0, 0x3D, 0x6A, 0x47, 0xC0, 0x08, 0x6A,
+0xFF, 0x6A, 0x8C, 0xEA, 0x2A, 0x68, 0x18, 0xEA,
+0x06, 0xD2, 0x30, 0xF0, 0x20, 0x6A, 0x68, 0xF4,
+0x1C, 0x4A, 0x12, 0xE8, 0x01, 0xE2, 0x84, 0xA0,
+0x0F, 0x5C, 0x48, 0x60, 0x30, 0xF0, 0x20, 0x6A,
+0x88, 0x33, 0x00, 0xF3, 0x04, 0x4A, 0x69, 0xE2,
+0x40, 0x9A, 0x00, 0xEA, 0x1B, 0x6A, 0x34, 0x10,
+0x3D, 0x6A, 0x6E, 0xA0, 0x47, 0xC0, 0x08, 0x6A,
 0x4B, 0xEA, 0x6C, 0xEA, 0x02, 0x6B, 0x6D, 0xEA,
-0x4E, 0xC0, 0x05, 0x6B, 0x3D, 0x10, 0x6E, 0xA0,
-0x13, 0x6A, 0x47, 0xC0, 0x08, 0x6A, 0x4B, 0xEA,
-0x6C, 0xEA, 0x01, 0x6B, 0x6D, 0xEA, 0x4E, 0xC0,
-0x6E, 0xA0, 0x33, 0x6A, 0x47, 0xC0, 0x08, 0x6A,
-0x4B, 0xEA, 0x6C, 0xEA, 0x01, 0x6B, 0x6D, 0xEA,
-0x04, 0x6D, 0x4E, 0xC0, 0x05, 0xD5, 0x29, 0x10,
-0x6E, 0xA0, 0x0B, 0x6A, 0x47, 0xC0, 0x08, 0x6A,
-0x4B, 0xEA, 0x6C, 0xEA, 0x03, 0x6E, 0x4E, 0xC0,
-0x05, 0xD6, 0x1F, 0x10, 0x6E, 0xA0, 0x47, 0x6A,
+0x39, 0x10, 0x6E, 0xA0, 0x13, 0x6A, 0x47, 0xC0,
+0x08, 0x6A, 0x4B, 0xEA, 0x6C, 0xEA, 0x01, 0x6B,
+0x6D, 0xEA, 0x4E, 0xC0, 0x6E, 0xA0, 0x33, 0x6A,
 0x47, 0xC0, 0x08, 0x6A, 0x4B, 0xEA, 0x6C, 0xEA,
-0x03, 0x6B, 0x6D, 0xEA, 0x05, 0x69, 0x4E, 0xC0,
-0x05, 0xD1, 0x13, 0x10, 0x23, 0x6A, 0x6E, 0xA0,
+0x01, 0x6B, 0x6D, 0xEA, 0x02, 0x6D, 0x4E, 0xC0,
+0x05, 0xD5, 0x27, 0x10, 0x6E, 0xA0, 0x0B, 0x6A,
 0x47, 0xC0, 0x08, 0x6A, 0x4B, 0xEA, 0x6C, 0xEA,
-0x03, 0x6B, 0x6D, 0xEA, 0x4E, 0xC0, 0x05, 0x6A,
-0x05, 0xD2, 0x07, 0x10, 0x6E, 0xA0, 0x08, 0x6A,
-0x4B, 0xEA, 0x6C, 0xEA, 0x4E, 0xC0, 0x03, 0x6B,
+0x01, 0x6E, 0x4E, 0xC0, 0x05, 0xD6, 0x1D, 0x10,
+0x6E, 0xA0, 0x47, 0x6A, 0x47, 0xC0, 0x08, 0x6A,
+0x4B, 0xEA, 0x6C, 0xEA, 0x03, 0x6B, 0x6D, 0xEA,
+0x4E, 0xC0, 0x05, 0xD3, 0x12, 0x10, 0x23, 0x6A,
+0x6E, 0xA0, 0x47, 0xC0, 0x08, 0x6A, 0x4B, 0xEA,
+0x6C, 0xEA, 0x03, 0x6B, 0x6D, 0xEA, 0x4E, 0xC0,
+0x05, 0xD3, 0x07, 0x10, 0x6E, 0xA0, 0x08, 0x6A,
+0x4B, 0xEA, 0x6C, 0xEA, 0x03, 0x6B, 0x4E, 0xC0,
 0x05, 0xD3, 0x06, 0x96, 0x30, 0xF0, 0x20, 0x6A,
-0x81, 0xF1, 0x54, 0x9A, 0xCC, 0x35, 0x8C, 0x34,
-0x55, 0xE5, 0x30, 0xF0, 0x20, 0x6A, 0x44, 0xF5,
-0x08, 0x4A, 0x91, 0xE2, 0xE5, 0x67, 0x1D, 0x65,
+0x01, 0xF0, 0x40, 0x9A, 0xCC, 0x35, 0x8C, 0x34,
+0x55, 0xE5, 0x30, 0xF0, 0x20, 0x6A, 0x24, 0xF3,
+0x0C, 0x4A, 0x91, 0xE2, 0xE5, 0x67, 0x1D, 0x65,
 0x00, 0x6A, 0x48, 0x33, 0xAD, 0xE3, 0xC0, 0x9C,
 0x60, 0x9B, 0x31, 0xA0, 0xCC, 0xEB, 0x03, 0x6E,
 0x2C, 0xEE, 0x02, 0x69, 0x2E, 0xEE, 0x07, 0x2E,
@@ -7488,7 +8206,7 @@ u8 array_mp_8822b_fw_ap[] = {
 0x04, 0x4C, 0xE3, 0x2B, 0x51, 0xA0, 0x06, 0x95,
 0x03, 0x6B, 0x52, 0x32, 0xAC, 0x34, 0x6C, 0xEA,
 0x30, 0xF0, 0x20, 0x6D, 0x30, 0xF0, 0x20, 0x6B,
-0x81, 0xF1, 0x74, 0x9B, 0x81, 0xF1, 0xA0, 0x9D,
+0x01, 0xF0, 0x60, 0x9B, 0xE0, 0xF7, 0xAC, 0x9D,
 0x6D, 0xE4, 0xB1, 0xE4, 0x60, 0x9B, 0xE0, 0x9C,
 0x03, 0x2F, 0xC3, 0x67, 0x00, 0x69, 0x02, 0x10,
 0xC7, 0x67, 0x20, 0x69, 0x1F, 0x6C, 0x01, 0x6D,
@@ -7505,14 +8223,14 @@ u8 array_mp_8822b_fw_ap[] = {
 0x04, 0xD4, 0x05, 0x10, 0x01, 0x4C, 0x20, 0x74,
 0xEA, 0x61, 0x00, 0x6D, 0x04, 0xD5, 0x5D, 0x67,
 0x67, 0x42, 0x20, 0xC0, 0x09, 0x4B, 0x40, 0xA3,
-0x41, 0xC0, 0x06, 0x94, 0x00, 0x18, 0xE2, 0x1D,
+0x41, 0xC0, 0x06, 0x94, 0x00, 0x18, 0x95, 0x20,
 0x7F, 0x6B, 0x4C, 0xEB, 0x63, 0xE9, 0xB1, 0x67,
 0x0D, 0x61, 0x04, 0x95, 0xFF, 0x6C, 0x43, 0x67,
 0x8C, 0xEB, 0xAC, 0xEC, 0x83, 0xEB, 0x04, 0x60,
 0xDD, 0x67, 0x67, 0x46, 0x09, 0x4B, 0x40, 0xA3,
 0xFF, 0x6D, 0x4C, 0xED, 0x51, 0xA0, 0x06, 0x94,
 0x03, 0x6F, 0x00, 0x6E, 0x4C, 0xEF, 0x00, 0x18,
-0x4F, 0x2E, 0x9D, 0x67, 0xA7, 0x44, 0x0D, 0x4D,
+0xB4, 0x34, 0x9D, 0x67, 0xA7, 0x44, 0x0D, 0x4D,
 0x80, 0xA5, 0x4A, 0x59, 0x82, 0xC0, 0x06, 0x61,
 0x73, 0xA0, 0x79, 0x6A, 0x4B, 0xEA, 0x6C, 0xEA,
 0x48, 0x6B, 0x3F, 0x10, 0x40, 0x59, 0x06, 0x61,
@@ -7533,2054 +8251,1981 @@ u8 array_mp_8822b_fw_ap[] = {
 0x73, 0xA0, 0x79, 0x6A, 0x4B, 0xEA, 0x6C, 0xEA,
 0x08, 0x6B, 0x6D, 0xEA, 0x04, 0x10, 0x73, 0xA0,
 0x79, 0x6A, 0x4B, 0xEA, 0x6C, 0xEA, 0x53, 0xC0,
-0x00, 0x18, 0x53, 0x29, 0x0B, 0x97, 0x0A, 0x91,
+0x00, 0x18, 0x35, 0x2D, 0x0B, 0x97, 0x0A, 0x91,
 0x09, 0x90, 0x06, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0xF4, 0x63, 0x17, 0x62, 0x16, 0xD1, 0x15, 0xD0,
+0xF3, 0x63, 0x19, 0x62, 0x18, 0xD1, 0x17, 0xD0,
 0xFF, 0x69, 0x30, 0xF0, 0x20, 0x6D, 0x8C, 0xE9,
-0x28, 0x68, 0x06, 0x04, 0xE0, 0xF2, 0x14, 0x4D,
-0x1E, 0x6E, 0x00, 0x18, 0xDE, 0x13, 0x18, 0xE9,
-0x30, 0xF0, 0x20, 0x6A, 0x68, 0xF1, 0x00, 0x4A,
+0x2A, 0x68, 0x06, 0x04, 0x40, 0xF3, 0x00, 0x4D,
+0x1E, 0x6E, 0x00, 0x18, 0xF5, 0x14, 0x18, 0xE9,
+0x30, 0xF0, 0x20, 0x6A, 0x68, 0xF4, 0x1C, 0x4A,
 0x12, 0xE8, 0x01, 0xE2, 0x76, 0xA0, 0x01, 0x6A,
 0x6D, 0xEA, 0x70, 0xA0, 0x56, 0xC0, 0x7F, 0x6A,
 0x6C, 0xEA, 0x30, 0xF0, 0x20, 0x6B, 0x50, 0xC0,
-0xC8, 0xF0, 0x0C, 0x4B, 0x00, 0x6A, 0x80, 0xA3,
+0xC8, 0xF3, 0x14, 0x4B, 0x00, 0x6A, 0x80, 0xA3,
 0x8A, 0xE9, 0x0F, 0xD4, 0x07, 0x60, 0x01, 0x4A,
 0xFF, 0x6C, 0x8C, 0xEA, 0x06, 0x72, 0x01, 0x4B,
-0xF6, 0x61, 0x18, 0x11, 0x0E, 0xD2, 0x30, 0xF0,
-0x20, 0x6A, 0xC5, 0xF2, 0x10, 0x4A, 0x02, 0xF3,
-0x6C, 0x9A, 0x02, 0x6C, 0x8C, 0xEB, 0x12, 0x2B,
-0x1C, 0x10, 0x02, 0xF3, 0x50, 0x9A, 0x05, 0x5A,
-0x06, 0x61, 0x30, 0xF0, 0x20, 0x6C, 0xE2, 0xF0,
-0x00, 0x4C, 0x00, 0x18, 0xD0, 0x26, 0x30, 0xF0,
-0x20, 0x6C, 0x62, 0xF2, 0x04, 0x4C, 0x00, 0x18,
-0xD0, 0x26, 0x07, 0x11, 0x02, 0xF3, 0x50, 0x9A,
-0x05, 0x5A, 0x07, 0x61, 0x0E, 0x95, 0x30, 0xF0,
-0x20, 0x6C, 0x62, 0xF2, 0x18, 0x4C, 0x00, 0x18,
-0xD0, 0x26, 0x72, 0xA0, 0x01, 0x6C, 0x51, 0xA0,
+0xF6, 0x61, 0xF3, 0x10, 0x22, 0x67, 0x30, 0xF0,
+0x20, 0x6A, 0xE5, 0xF0, 0x10, 0x4A, 0xC2, 0xF7,
+0x78, 0x9A, 0x02, 0x6C, 0x8C, 0xEB, 0x12, 0x2B,
+0x1C, 0x10, 0xC2, 0xF7, 0x5C, 0x9A, 0x05, 0x5A,
+0x06, 0x61, 0x30, 0xF0, 0x20, 0x6C, 0x82, 0xF2,
+0x1C, 0x4C, 0x00, 0x18, 0x38, 0x2A, 0x30, 0xF0,
+0x20, 0x6C, 0xA2, 0xF2, 0x0C, 0x4C, 0x00, 0x18,
+0x38, 0x2A, 0xE2, 0x10, 0xC2, 0xF7, 0x5C, 0x9A,
+0x05, 0x5A, 0x07, 0x61, 0x30, 0xF0, 0x20, 0x6C,
+0xC2, 0xF2, 0x00, 0x4C, 0xB1, 0x67, 0x00, 0x18,
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+0x1C, 0x61, 0x30, 0xF0, 0x20, 0x6C, 0x04, 0xF0,
+0x1C, 0x4C, 0xC6, 0x10, 0x54, 0xA0, 0x03, 0x72,
+0x02, 0x60, 0x05, 0x72, 0x0B, 0x61, 0x0E, 0x71,
+0x05, 0x61, 0x90, 0x67, 0x26, 0x6D, 0x00, 0x18,
+0xFC, 0x20, 0xF1, 0x10, 0x90, 0x67, 0x20, 0x6D,
+0x00, 0x18, 0xFC, 0x20, 0x0F, 0x59, 0xE0, 0xF0,
+0x0A, 0x61, 0x68, 0x41, 0xE4, 0x4B, 0xFF, 0x6A,
+0x83, 0x67, 0x4C, 0xEC, 0x1D, 0x5C, 0x05, 0x60,
 0x67, 0x33, 0x9D, 0x67, 0x6D, 0xE4, 0x58, 0xA3,
-0x18, 0x10, 0x68, 0x40, 0xA4, 0x4B, 0x83, 0x67,
+0x18, 0x10, 0x68, 0x41, 0xA4, 0x4B, 0x83, 0x67,
 0x4C, 0xEC, 0x2D, 0x5C, 0x06, 0x60, 0x5D, 0x67,
 0x67, 0x33, 0x6D, 0xE2, 0x20, 0xF0, 0x58, 0xA3,
-0x0C, 0x10, 0x67, 0x40, 0x64, 0x4B, 0x4C, 0xEB,
-0x1D, 0x5B, 0x18, 0x60, 0x6F, 0xF7, 0x4B, 0x40,
+0x0C, 0x10, 0x67, 0x41, 0x64, 0x4B, 0x4C, 0xEB,
+0x1D, 0x5B, 0x1F, 0x60, 0x6F, 0xF7, 0x4B, 0x41,
 0x47, 0x32, 0x7D, 0x67, 0x49, 0xE3, 0x20, 0xF0,
-0x48, 0xA2, 0xFF, 0x72, 0x0F, 0x60, 0x04, 0xD2,
-0x30, 0xF0, 0x20, 0x6A, 0x1C, 0x94, 0x01, 0xF3,
-0xF8, 0x9A, 0x00, 0x6D, 0xBE, 0x6E, 0x00, 0x18,
-0xAC, 0x3A, 0x15, 0x91, 0x90, 0x70, 0x4C, 0xE9,
-0x27, 0x61, 0x17, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0xC5, 0xF2, 0x10, 0x4A, 0x30, 0xF0, 0x20, 0x6B,
-0xA1, 0xF2, 0x68, 0x9B, 0x02, 0xF3, 0x8C, 0x9A,
-0x8C, 0xEB, 0xA0, 0xF0, 0x1A, 0x23, 0x02, 0xF3,
-0x50, 0x9A, 0x05, 0x5A, 0xA0, 0xF0, 0x15, 0x61,
-0x30, 0xF0, 0x20, 0x6C, 0x84, 0xF2, 0x00, 0x4C,
-0x90, 0x10, 0x01, 0x6A, 0x04, 0xD2, 0x30, 0xF0,
-0x20, 0x6A, 0x1C, 0x94, 0x01, 0xF0, 0xFC, 0x9A,
-0x00, 0x6D, 0xDF, 0x6E, 0x00, 0x18, 0xAC, 0x3A,
-0x4C, 0xE9, 0xFF, 0x6C, 0x8C, 0xE9, 0x1C, 0x10,
-0x00, 0x6A, 0x04, 0xD2, 0xA2, 0x67, 0x30, 0xF0,
-0x20, 0x6A, 0x01, 0xF0, 0x1C, 0x4A, 0x1C, 0x94,
-0xE0, 0x9A, 0xDF, 0x6E, 0x00, 0x18, 0xAC, 0x3A,
-0x4C, 0xE9, 0xFF, 0x6B, 0x91, 0x58, 0x6C, 0xE9,
-0x09, 0x61, 0x30, 0xF0, 0x20, 0x6C, 0x01, 0xF0,
-0x1C, 0x4C, 0x16, 0x92, 0x80, 0x9C, 0x8D, 0xEA,
-0x16, 0xD2, 0x09, 0x10, 0x50, 0x58, 0x07, 0x61,
-0x30, 0xF0, 0x20, 0x6A, 0x16, 0x93, 0x61, 0xF1,
-0x54, 0x9A, 0x4D, 0xEB, 0x16, 0xD3, 0x16, 0x94,
-0x30, 0xF0, 0x20, 0x6A, 0xC1, 0xF0, 0x0C, 0x4A,
-0x04, 0xD4, 0xE0, 0x9A, 0x1C, 0x94, 0x00, 0x6D,
-0x18, 0x6E, 0x00, 0x18, 0xAC, 0x3A, 0x4C, 0xE9,
-0x30, 0xF0, 0x20, 0x6A, 0xE7, 0xF5, 0x4F, 0xA2,
-0x0F, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0xC1, 0xF0,
-0x0C, 0x4A, 0x14, 0x93, 0x1C, 0x94, 0xE0, 0x9A,
-0x00, 0x6D, 0xB8, 0x6E, 0x04, 0xD3, 0x00, 0x18,
-0xAC, 0x3A, 0x4C, 0xE9, 0xFF, 0x6A, 0x4C, 0xE9,
-0x30, 0xF0, 0x20, 0x6B, 0xC5, 0xF2, 0x10, 0x4B,
-0x02, 0xF3, 0x56, 0xA3, 0x15, 0xD3, 0x20, 0x22,
-0x16, 0x94, 0x30, 0xF0, 0x20, 0x6A, 0xC1, 0xF0,
-0x0C, 0x4A, 0x04, 0xD4, 0xE0, 0x9A, 0x1C, 0x94,
-0x01, 0x6D, 0x18, 0x6E, 0x00, 0x18, 0xAC, 0x3A,
-0x15, 0x93, 0x4C, 0xE9, 0x02, 0xF3, 0x5F, 0xA3,
-0x0F, 0x2A, 0x14, 0x94, 0x30, 0xF0, 0x20, 0x6A,
-0xC1, 0xF0, 0x0C, 0x4A, 0x04, 0xD4, 0xE0, 0x9A,
-0x1C, 0x94, 0x01, 0x6D, 0xB8, 0x6E, 0x00, 0x18,
-0xAC, 0x3A, 0x4C, 0xE9, 0xFF, 0x6A, 0x4C, 0xE9,
-0x18, 0x29, 0x30, 0xF0, 0x20, 0x6A, 0xC5, 0xF2,
-0x10, 0x4A, 0x30, 0xF0, 0x20, 0x6B, 0xA1, 0xF2,
-0x68, 0x9B, 0x02, 0xF3, 0x8C, 0x9A, 0x8C, 0xEB,
-0x28, 0x23, 0x02, 0xF3, 0x50, 0x9A, 0x05, 0x5A,
-0x24, 0x61, 0x30, 0xF0, 0x20, 0x6C, 0xC4, 0xF2,
-0x14, 0x4C, 0xB0, 0x67, 0x00, 0x18, 0xD0, 0x26,
-0x1C, 0x10, 0x1C, 0x94, 0x00, 0x18, 0x99, 0x3B,
-0x30, 0xF0, 0x20, 0x6A, 0xC5, 0xF2, 0x10, 0x4A,
-0x30, 0xF0, 0x20, 0x6B, 0xA1, 0xF2, 0x68, 0x9B,
-0x02, 0xF3, 0x8C, 0x9A, 0x8C, 0xEB, 0x0B, 0x23,
-0x02, 0xF3, 0x50, 0x9A, 0x05, 0x5A, 0x07, 0x61,
-0x30, 0xF0, 0x20, 0x6C, 0x44, 0xF3, 0x00, 0x4C,
-0xB0, 0x67, 0x00, 0x18, 0xD0, 0x26, 0x01, 0x6A,
+0x48, 0xA2, 0xFF, 0x72, 0x16, 0x60, 0x04, 0xD2,
+0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF1, 0xE8, 0x9A,
+0x90, 0x67, 0x00, 0x6D, 0xBE, 0x6E, 0x00, 0x18,
+0x32, 0x40, 0x14, 0x94, 0x00, 0x6B, 0x01, 0x4C,
+0x01, 0x24, 0x01, 0x6B, 0xFF, 0x6C, 0x4C, 0xEC,
+0x6C, 0xEC, 0x90, 0x71, 0x14, 0xD4, 0x23, 0x61,
+0x11, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF1,
+0x40, 0x9A, 0x60, 0x98, 0x6C, 0xEA, 0xA0, 0xF0,
+0x00, 0x22, 0x41, 0x98, 0x05, 0x5A, 0x80, 0xF0,
+0x1C, 0x61, 0x30, 0xF0, 0x20, 0x6C, 0x64, 0xF0,
+0x04, 0x4C, 0x66, 0x10, 0x01, 0x6A, 0x04, 0xD2,
+0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF6, 0xE8, 0x9A,
+0x90, 0x67, 0x00, 0x6D, 0xDF, 0x6E, 0x00, 0x18,
+0x32, 0x40, 0x14, 0x93, 0xFF, 0x6C, 0x4C, 0xEB,
+0x8C, 0xEB, 0x14, 0xD3, 0x1C, 0x10, 0x00, 0x6A,
+0x04, 0xD2, 0xA2, 0x67, 0x30, 0xF0, 0x20, 0x6A,
+0x60, 0xF6, 0x08, 0x4A, 0xE0, 0x9A, 0x90, 0x67,
+0xDF, 0x6E, 0x00, 0x18, 0x32, 0x40, 0x14, 0x93,
+0xFF, 0x6C, 0x91, 0x59, 0x4C, 0xEB, 0x8C, 0xEB,
+0x14, 0xD3, 0x07, 0x61, 0x30, 0xF0, 0x20, 0x6A,
+0x60, 0xF6, 0x08, 0x4A, 0x15, 0x93, 0x40, 0x9A,
+0x07, 0x10, 0x50, 0x59, 0x07, 0x61, 0x30, 0xF0,
+0x20, 0x6A, 0xC0, 0xF7, 0x5C, 0x9A, 0x15, 0x93,
+0x4D, 0xEB, 0x15, 0xD3, 0x30, 0xF0, 0x20, 0x6A,
+0x15, 0x94, 0x20, 0xF7, 0x18, 0x4A, 0xE0, 0x9A,
+0x04, 0xD4, 0x00, 0x6D, 0x90, 0x67, 0x18, 0x6E,
+0x00, 0x18, 0x32, 0x40, 0x14, 0x93, 0x4C, 0xEB,
+0x4A, 0xA0, 0x14, 0xD3, 0x11, 0x22, 0x30, 0xF0,
+0x20, 0x6A, 0x15, 0x94, 0x20, 0xF7, 0x18, 0x4A,
+0xE0, 0x9A, 0x04, 0xD4, 0x01, 0x6D, 0x90, 0x67,
+0x18, 0x6E, 0x00, 0x18, 0x32, 0x40, 0x14, 0x93,
+0x4C, 0xEB, 0xFF, 0x6A, 0x4C, 0xEB, 0x14, 0xD3,
+0x14, 0x94, 0x12, 0x2C, 0x30, 0xF0, 0x20, 0x6A,
+0x21, 0xF1, 0x40, 0x9A, 0x60, 0x98, 0x6C, 0xEA,
+0x38, 0x22, 0x41, 0x98, 0x05, 0x5A, 0x35, 0x61,
+0x30, 0xF0, 0x20, 0x6C, 0xA4, 0xF0, 0x18, 0x4C,
+0xB1, 0x67, 0x00, 0x18, 0x38, 0x2A, 0x2D, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF7, 0x1C, 0x4A,
+0xC0, 0x9A, 0x00, 0x6C, 0xE4, 0x67, 0xB8, 0x6D,
+0x00, 0x18, 0x1E, 0x1C, 0x30, 0xF0, 0x20, 0x6B,
+0x60, 0xF7, 0x1C, 0x4B, 0xC0, 0x9B, 0xB8, 0x6D,
+0x01, 0x6F, 0x00, 0x6C, 0x00, 0x18, 0x1E, 0x1C,
+0x90, 0x67, 0x00, 0x18, 0x23, 0x41, 0x90, 0x67,
+0x00, 0x18, 0x37, 0x41, 0x30, 0xF0, 0x20, 0x6A,
+0x21, 0xF1, 0x40, 0x9A, 0x60, 0x98, 0x6C, 0xEA,
+0x0A, 0x22, 0x41, 0x98, 0x05, 0x5A, 0x07, 0x61,
+0x30, 0xF0, 0x20, 0x6C, 0x24, 0xF1, 0x04, 0x4C,
+0xB1, 0x67, 0x00, 0x18, 0x38, 0x2A, 0x01, 0x6A,
 0x01, 0x10, 0x00, 0x6A, 0x1B, 0x97, 0x1A, 0x91,
-0x19, 0x90, 0x0E, 0x63, 0x00, 0xEF, 0x68, 0x40,
-0xE4, 0x4B, 0xFF, 0x6A, 0x83, 0x67, 0x4C, 0xEC,
-0x1D, 0x5C, 0xFF, 0xF6, 0x1D, 0x61, 0x01, 0x17,
-0xFB, 0x63, 0x09, 0x62, 0x08, 0xD1, 0x07, 0xD0,
-0xFF, 0x68, 0x0C, 0xED, 0x24, 0x67, 0x0D, 0xD7,
-0x04, 0xD5, 0xCC, 0xE8, 0x00, 0x18, 0x12, 0x3B,
-0x0F, 0x22, 0x04, 0x95, 0x91, 0x67, 0x00, 0x18,
-0xAD, 0x3E, 0x0A, 0x22, 0x0D, 0x96, 0x91, 0x67,
-0xB0, 0x67, 0x00, 0x18, 0x92, 0x3D, 0x4B, 0xEB,
-0x4D, 0xEB, 0xC0, 0xF7, 0x62, 0x32, 0x01, 0x10,
-0x00, 0x6A, 0x09, 0x97, 0x08, 0x91, 0x07, 0x90,
-0x05, 0x63, 0x00, 0xEF, 0x99, 0x2A, 0x00, 0x00,
-0x46, 0xCA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0x19, 0x90, 0x0E, 0x63, 0x00, 0xEF, 0x00, 0x6A,
+0x3A, 0x17, 0x00, 0x65, 0xFB, 0x63, 0x09, 0x62,
+0x08, 0xD1, 0x07, 0xD0, 0xFF, 0x68, 0x0C, 0xED,
+0x24, 0x67, 0x0D, 0xD7, 0x04, 0xD5, 0xCC, 0xE8,
+0x00, 0x18, 0x73, 0x40, 0x0F, 0x22, 0x04, 0x95,
+0x91, 0x67, 0x00, 0x18, 0x28, 0x44, 0x0A, 0x22,
+0x0D, 0x96, 0x91, 0x67, 0xB0, 0x67, 0x00, 0x18,
+0x20, 0x43, 0x4B, 0xEB, 0x4D, 0xEB, 0xC0, 0xF7,
+0x62, 0x32, 0x01, 0x10, 0x00, 0x6A, 0x09, 0x97,
+0x08, 0x91, 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF,
+0x2C, 0xEA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 };
 
-u32 array_length_mp_8822b_fw_ap = 76464;
+u32 array_length_mp_8822b_fw_ap = 81504;
 
 #endif /*defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))*/
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE))
 
 u8 array_mp_8822b_fw_nic[] = {
-0x22, 0x88, 0x00, 0x00, 0x08, 0x00, 0x01, 0x00,
-0x10, 0x3C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x0A, 0x05, 0x11, 0x21, 0xE0, 0x07, 0x00, 0x00,
-0x08, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x20, 0x80, 0xF0, 0x2E, 0x00, 0x00,
+0x22, 0x88, 0x00, 0x00, 0x0D, 0x00, 0x01, 0x00,
+0x67, 0x47, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x03, 0x0D, 0x0F, 0x27, 0xE1, 0x07, 0x00, 0x00,
+0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x20, 0x80, 0x70, 0x2D, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0xA5, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x48, 0xC4, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x10, 0x12, 0x80, 0x00, 0x00, 0x00, 0x80,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -9591,11 +10236,11 @@ u8 array_mp_8822b_fw_nic[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x39, 0x2F, 0x00, 0x80, 0xA5, 0x06, 0x00, 0x80,
+0x15, 0x36, 0x00, 0x80, 0xE9, 0x06, 0x00, 0x80,
 0x03, 0x02, 0x01, 0xFE, 0x03, 0x03, 0x01, 0xFE,
 0x03, 0x04, 0x01, 0xFE, 0x03, 0x05, 0x01, 0xFE,
 0x03, 0x06, 0x01, 0xFE, 0x03, 0x07, 0x01, 0xFE,
-0xBD, 0x69, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00,
+0xAD, 0x77, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -9603,7 +10248,7 @@ u8 array_mp_8822b_fw_nic[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0xC1, 0x6B, 0x00, 0x80, 0x01, 0x00, 0x00, 0x00,
+0xB1, 0x79, 0x00, 0x80, 0x01, 0x00, 0x00, 0x00,
 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -9611,294 +10256,244 @@ u8 array_mp_8822b_fw_nic[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0xF0, 0x2E, 0x20, 0x80, 0x09, 0x6C, 0x00, 0x80,
-0x03, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0xF8, 0x2E, 0x20, 0x80,
-0x81, 0x00, 0x88, 0x00, 0x90, 0x00, 0x99, 0x00,
-0xA2, 0x00, 0xAC, 0x00, 0xB6, 0x00, 0xC0, 0x00,
-0xCC, 0x00, 0xD8, 0x00, 0xE5, 0x00, 0xF2, 0x00,
-0x01, 0x01, 0x10, 0x01, 0x20, 0x01, 0x31, 0x01,
-0x43, 0x01, 0x56, 0x01, 0x6A, 0x01, 0x80, 0x01,
-0x97, 0x01, 0xAF, 0x01, 0xC8, 0x01, 0xE3, 0x01,
-0x00, 0x02, 0x1E, 0x02, 0x3E, 0x02, 0x61, 0x02,
-0x85, 0x02, 0xAB, 0x02, 0xD3, 0x02, 0xFE, 0x02,
-0x2B, 0x03, 0x5C, 0x03, 0x8E, 0x03, 0xC4, 0x03,
-0xFE, 0x03, 0x00, 0x00, 0x22, 0x05, 0x50, 0x05,
-0x51, 0x05, 0x00, 0x00, 0x08, 0x08, 0x0C, 0x09,
-0x00, 0x0C, 0xB0, 0x0C, 0xB4, 0x0C, 0xBC, 0x0C,
-0x00, 0x0E, 0xB0, 0x0E, 0xB4, 0x0E, 0xBC, 0x0E,
-0x90, 0x19, 0xA4, 0x09, 0x04, 0x0A, 0x00, 0x00,
-0xDF, 0x8F, 0x65, 0x00, 0x01, 0x00, 0x00, 0x00,
-0x03, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00,
+0x70, 0x2D, 0x20, 0x80, 0x81, 0x00, 0x88, 0x00,
+0x90, 0x00, 0x99, 0x00, 0xA2, 0x00, 0xAC, 0x00,
+0xB6, 0x00, 0xC0, 0x00, 0xCC, 0x00, 0xD8, 0x00,
+0xE5, 0x00, 0xF2, 0x00, 0x01, 0x01, 0x10, 0x01,
+0x20, 0x01, 0x31, 0x01, 0x43, 0x01, 0x56, 0x01,
+0x6A, 0x01, 0x80, 0x01, 0x97, 0x01, 0xAF, 0x01,
+0xC8, 0x01, 0xE3, 0x01, 0x00, 0x02, 0x1E, 0x02,
+0x3E, 0x02, 0x61, 0x02, 0x85, 0x02, 0xAB, 0x02,
+0xD3, 0x02, 0xFE, 0x02, 0x2B, 0x03, 0x5C, 0x03,
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-0x4C, 0x00, 0x60, 0xB8, 0x44, 0x00, 0x60, 0xB8,
-0x60, 0x00, 0x60, 0xB8, 0x00, 0x00, 0xC0, 0x00,
-0x00, 0x00, 0x10, 0x00, 0x00, 0x10, 0x24, 0x00,
-0x82, 0x82, 0x62, 0x00, 0x00, 0x00, 0x02, 0x00,
-0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x08, 0x00,
-0x00, 0x00, 0x1E, 0x00, 0x0A, 0x06, 0x64, 0xB8,
-0x57, 0x01, 0x64, 0xB8, 0x3C, 0x01, 0x64, 0xB8,
-0x5B, 0x01, 0x64, 0xB8, 0xA8, 0x06, 0x64, 0xB8,
+0xBC, 0x01, 0x64, 0xB8, 0x00, 0x09, 0x3D, 0x00,
+0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x01, 0x00,
+0x00, 0x00, 0xFF, 0xFF, 0x54, 0x05, 0x64, 0xB8,
+0x50, 0x05, 0x64, 0xB8, 0x51, 0x05, 0x64, 0xB8,
+0x78, 0x05, 0x64, 0xB8, 0x79, 0x05, 0x64, 0xB8,
+0x7A, 0x05, 0x64, 0xB8, 0xFF, 0xFF, 0xFF, 0x8F,
+0x60, 0x05, 0x60, 0xB8, 0x60, 0x05, 0x64, 0xB8,
+0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x20,
+0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x40,
+0xBF, 0x01, 0x64, 0xB8, 0x89, 0x00, 0x60, 0xB8,
+0x8A, 0x00, 0x60, 0xB8, 0x1A, 0x04, 0x64, 0xB8,
+0x1B, 0x04, 0x64, 0xB8, 0x8C, 0x00, 0x60, 0xB8,
+0x8D, 0x00, 0x60, 0xB8, 0x87, 0x02, 0x64, 0xB8,
+0x96, 0x02, 0x64, 0xB8, 0x86, 0x02, 0x64, 0xB8,
+0x58, 0x05, 0x64, 0xB8, 0x22, 0x05, 0x64, 0xB8,
+0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00,
+0x00, 0x00, 0x08, 0x00, 0x5B, 0x01, 0x64, 0xB8,
+0x3C, 0x01, 0x64, 0xB8, 0x00, 0x00, 0x1E, 0x00,
+0x0A, 0x06, 0x64, 0xB8, 0xB1, 0x05, 0x64, 0xB8,
+0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x03, 0x00,
+0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x03,
+0x57, 0x01, 0x64, 0xB8, 0xFE, 0x11, 0x64, 0xB8,
+0xE2, 0x10, 0x60, 0xB8, 0xA8, 0x06, 0x64, 0xB8,
 0x10, 0x07, 0x64, 0xB8, 0x00, 0x16, 0x64, 0xB8,
 0x04, 0x16, 0x64, 0xB8, 0x08, 0x16, 0x64, 0xB8,
 0xAB, 0x06, 0x64, 0xB8, 0xAA, 0x06, 0x64, 0xB8,
@@ -9906,6 +10501,7 @@ u8 array_mp_8822b_fw_nic[] = {
 0x03, 0x16, 0x64, 0xB8, 0x02, 0x16, 0x64, 0xB8,
 0x07, 0x16, 0x64, 0xB8, 0x06, 0x16, 0x64, 0xB8,
 0x0B, 0x16, 0x64, 0xB8, 0x0A, 0x16, 0x64, 0xB8,
+0xFC, 0x11, 0x64, 0xB8, 0xE0, 0x10, 0x60, 0xB8,
 0x04, 0x06, 0x64, 0xB8, 0xFF, 0xFF, 0xFF, 0xFE,
 0x00, 0x00, 0x00, 0x01, 0x60, 0x16, 0x64, 0xB8,
 0x0D, 0x00, 0x78, 0xB8, 0x12, 0x00, 0x78, 0xB8,
@@ -9915,14 +10511,15 @@ u8 array_mp_8822b_fw_nic[] = {
 0x14, 0x00, 0x78, 0xB8, 0x09, 0x00, 0x78, 0xB8,
 0x31, 0x00, 0x78, 0xB8, 0x32, 0x00, 0x78, 0xB8,
 0x33, 0x00, 0x78, 0xB8, 0x1D, 0x04, 0x64, 0xB8,
-0x22, 0x05, 0x64, 0xB8, 0x7A, 0x04, 0x64, 0xB8,
-0x24, 0x04, 0x64, 0xB8, 0x10, 0x05, 0x64, 0xB8,
-0x11, 0x05, 0x64, 0xB8, 0x10, 0x00, 0x78, 0xB8,
-0x88, 0x00, 0x60, 0xB8, 0x8B, 0x00, 0x60, 0xB8,
-0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x42,
+0x7A, 0x04, 0x64, 0xB8, 0x24, 0x04, 0x64, 0xB8,
+0x10, 0x05, 0x64, 0xB8, 0x11, 0x05, 0x64, 0xB8,
+0x10, 0x00, 0x78, 0xB8, 0x88, 0x00, 0x60, 0xB8,
+0x8B, 0x00, 0x60, 0xB8, 0x00, 0x00, 0x60, 0xB8,
+0x00, 0x00, 0x64, 0xB8, 0x00, 0x00, 0x00, 0x42,
 0xE0, 0x00, 0x60, 0xB8, 0xFF, 0xFF, 0xFF, 0xFD,
 0xE3, 0x00, 0x60, 0xB8, 0xE1, 0x00, 0x60, 0xB8,
-0x00, 0x00, 0x00, 0x60, 0xE8, 0x12, 0x64, 0xB8,
+0x00, 0x00, 0x00, 0x60, 0xCC, 0x00, 0x60, 0xB8,
+0x02, 0x00, 0x60, 0xB8, 0xE8, 0x12, 0x64, 0xB8,
 0xF8, 0x10, 0x60, 0xB8, 0xFF, 0xFF, 0x03, 0x00,
 0x00, 0x00, 0x00, 0x04, 0xFF, 0xFF, 0xFF, 0xFB,
 0xFF, 0xFF, 0xFF, 0xDF, 0xFF, 0xFF, 0xFF, 0x1F,
@@ -9933,28 +10530,30 @@ u8 array_mp_8822b_fw_nic[] = {
 0x77, 0x77, 0x77, 0x77, 0x08, 0x00, 0x00, 0xF8,
 0x08, 0x70, 0x0A, 0xF8, 0x08, 0x50, 0x01, 0xF8,
 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x3E,
-0x00, 0x00, 0xE0, 0xFF, 0xFF, 0xFF, 0x0F, 0x00,
+0x00, 0x00, 0xE0, 0xFF, 0x00, 0x1C, 0x01, 0x88,
 0x00, 0x00, 0x00, 0xFF, 0x08, 0x00, 0x45, 0x01,
-0x48, 0x08, 0x46, 0x01, 0xE0, 0x10, 0x05, 0x00,
-0x00, 0x9C, 0x0A, 0x00, 0x08, 0x00, 0x85, 0x00,
-0x48, 0x08, 0x46, 0x00, 0x60, 0x10, 0x05, 0x00,
-0x88, 0x0C, 0x46, 0x01, 0x00, 0xCC, 0x0A, 0x00,
-0x48, 0x00, 0x46, 0x00, 0x00, 0xDC, 0x0A, 0x00,
-0x08, 0x00, 0x44, 0x01, 0xF2, 0x0D, 0x05, 0x00,
-0xEF, 0x00, 0x05, 0x00, 0x6C, 0x08, 0x05, 0x00,
+0x48, 0x08, 0x46, 0x01, 0xFF, 0xFF, 0x0F, 0x00,
+0xE0, 0x10, 0x05, 0x00, 0x00, 0x9C, 0x0A, 0x00,
+0x08, 0x00, 0x85, 0x00, 0x48, 0x08, 0x46, 0x00,
+0x60, 0x10, 0x05, 0x00, 0x88, 0x0C, 0x46, 0x01,
+0x00, 0xCC, 0x0A, 0x00, 0x48, 0x00, 0x46, 0x00,
+0x00, 0xDC, 0x0A, 0x00, 0x08, 0x00, 0x44, 0x01,
+0xF2, 0x0D, 0x05, 0x00, 0xEF, 0x00, 0x05, 0x00,
+0x6C, 0x08, 0x05, 0x00, 0x00, 0x00, 0x1F, 0x00,
+0x00, 0x00, 0x00, 0xC0, 0x00, 0x0A, 0x08, 0x00,
 0xCE, 0xEF, 0x0D, 0x00, 0xCE, 0xEF, 0x05, 0x00,
-0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, 0x00, 0xC0,
 0x01, 0x00, 0x00, 0xE0, 0x00, 0x00, 0xFF, 0x0F,
-0x21, 0x00, 0x00, 0xE0, 0x08, 0x08, 0x00, 0xF8,
-0x08, 0x07, 0x00, 0xF8, 0x08, 0x02, 0x00, 0xF8,
-0x08, 0x03, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x0F,
-0x02, 0x00, 0x60, 0xB8, 0x62, 0x06, 0x64, 0xB8,
+0x21, 0x00, 0x00, 0xE0, 0x45, 0x23, 0x01, 0x00,
+0x08, 0x08, 0x00, 0xF8, 0x08, 0x07, 0x00, 0xF8,
+0x08, 0x02, 0x00, 0xF8, 0x08, 0x03, 0x00, 0xF8,
+0x00, 0x00, 0x00, 0x0F, 0x62, 0x06, 0x64, 0xB8,
 0xB4, 0x06, 0x64, 0xB8, 0x06, 0x00, 0x00, 0x89,
 0x00, 0x00, 0x00, 0x50, 0x40, 0x00, 0x07, 0x70,
 0x02, 0x04, 0x00, 0xD8, 0x20, 0x01, 0x00, 0xD1,
 0x40, 0x80, 0x03, 0x70, 0x02, 0x04, 0x02, 0xD8,
-0x20, 0x01, 0x00, 0xDE, 0x01, 0x00, 0x66, 0xB8,
-0x00, 0x00, 0x66, 0xB8, 0xCD, 0x9B, 0x78, 0x56,
+0x20, 0x01, 0x00, 0xDE, 0xDE, 0xBC, 0x0A, 0x00,
+0x01, 0x00, 0x66, 0xB8, 0x00, 0x00, 0x66, 0xB8,
+0x00, 0xFF, 0xFF, 0x00, 0xCD, 0x9B, 0x78, 0x56,
 0x04, 0x1C, 0x66, 0xB8, 0xFF, 0xFF, 0xFF, 0x3F,
 0x1F, 0x00, 0x60, 0xB8, 0x05, 0xEA, 0xEF, 0xFD,
 0x06, 0xEA, 0xEF, 0xFD, 0x00, 0x1C, 0x66, 0xB8,
@@ -9974,60 +10573,64 @@ u8 array_mp_8822b_fw_nic[] = {
 0x23, 0x04, 0x64, 0xB8, 0x30, 0x04, 0x64, 0xB8,
 0x00, 0x00, 0x00, 0x02, 0x34, 0x04, 0x64, 0xB8,
 0x04, 0x05, 0x07, 0x08, 0x00, 0x01, 0x01, 0x02,
-0x81, 0x18, 0x66, 0xB8, 0x80, 0x18, 0x66, 0xB8,
+0x81, 0x18, 0x66, 0xB8, 0x53, 0x04, 0x64, 0xB8,
+0x80, 0x18, 0x66, 0xB8, 0x82, 0x18, 0x66, 0xB8,
+0x83, 0x18, 0x66, 0xB8, 0x84, 0x18, 0x66, 0xB8,
+0x85, 0x18, 0x66, 0xB8, 0x2D, 0x04, 0x64, 0xB8,
 0xF0, 0x10, 0x60, 0xB8, 0x00, 0x00, 0xF0, 0x00,
 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x0F, 0x00,
-0x00, 0x00, 0x30, 0x00, 0x53, 0x04, 0x64, 0xB8,
-0x06, 0x00, 0x66, 0xB8, 0x03, 0x1C, 0x66, 0xB8,
-0x02, 0x1C, 0x66, 0xB8, 0x01, 0x1C, 0x66, 0xB8,
-0x07, 0x1C, 0x66, 0xB8, 0x06, 0x1C, 0x66, 0xB8,
-0x05, 0x1C, 0x66, 0xB8, 0x08, 0x1C, 0x66, 0xB8,
-0x82, 0x18, 0x66, 0xB8, 0x83, 0x18, 0x66, 0xB8,
-0x84, 0x18, 0x66, 0xB8, 0x85, 0x18, 0x66, 0xB8,
-0x50, 0x04, 0x64, 0xB8, 0x51, 0x04, 0x64, 0xB8,
-0x52, 0x04, 0x64, 0xB8, 0x0D, 0x10, 0x66, 0xB8,
-0x08, 0x10, 0x66, 0xB8, 0x02, 0x10, 0x66, 0xB8,
-0x04, 0x10, 0x66, 0xB8, 0x05, 0x10, 0x66, 0xB8,
-0x0C, 0x10, 0x66, 0xB8, 0x00, 0x10, 0x66, 0xB8,
-0x03, 0x10, 0x66, 0xB8, 0x09, 0x10, 0x66, 0xB8,
-0x01, 0x10, 0x66, 0xB8, 0x06, 0x10, 0x66, 0xB8,
-0x00, 0x00, 0x40, 0x00, 0xF0, 0xFF, 0xFF, 0x0F,
-0x78, 0x76, 0x77, 0x00, 0x33, 0x66, 0x77, 0x00,
-0x74, 0x57, 0x74, 0x00, 0x47, 0x75, 0x47, 0x00,
-0x70, 0x45, 0x70, 0x00, 0x17, 0x45, 0x17, 0x00,
-0x00, 0x00, 0xF0, 0xFF, 0x00, 0x00, 0x00, 0x06,
-0x00, 0x00, 0x7F, 0x00, 0xFF, 0x0F, 0xFF, 0xF0,
-0x00, 0x40, 0x00, 0x06, 0xFF, 0xFF, 0xF0, 0xF0,
-0x00, 0x00, 0x09, 0x06, 0xFF, 0x0F, 0x00, 0xF0,
-0x00, 0x70, 0xDB, 0x03, 0xFF, 0xFF, 0xFF, 0x0F,
-0xFF, 0xFC, 0xFE, 0xFF, 0x00, 0x01, 0x01, 0x00,
+0x00, 0x00, 0xC0, 0x00, 0x06, 0x00, 0x66, 0xB8,
+0x08, 0x1C, 0x66, 0xB8, 0xFF, 0xFF, 0xCF, 0x3F,
+0xFF, 0xFC, 0x3F, 0xFF, 0x50, 0x04, 0x64, 0xB8,
+0x51, 0x04, 0x64, 0xB8, 0x52, 0x04, 0x64, 0xB8,
+0x20, 0x04, 0x64, 0xB8, 0x01, 0x1C, 0x66, 0xB8,
+0x02, 0x1C, 0x66, 0xB8, 0x03, 0x1C, 0x66, 0xB8,
+0x05, 0x1C, 0x66, 0xB8, 0x06, 0x1C, 0x66, 0xB8,
+0x07, 0x1C, 0x66, 0xB8, 0x00, 0x10, 0x66, 0xB8,
+0x08, 0x10, 0x66, 0xB8, 0x03, 0x10, 0x66, 0xB8,
+0x09, 0x10, 0x66, 0xB8, 0x04, 0x10, 0x66, 0xB8,
+0x05, 0x10, 0x66, 0xB8, 0x0C, 0x10, 0x66, 0xB8,
+0x02, 0x10, 0x66, 0xB8, 0x01, 0x10, 0x66, 0xB8,
+0x0D, 0x10, 0x66, 0xB8, 0x06, 0x10, 0x66, 0xB8,
+0x00, 0x00, 0x40, 0x00, 0x74, 0x57, 0x74, 0x00,
+0x47, 0x75, 0x47, 0x00, 0x70, 0x45, 0x70, 0x00,
+0x17, 0x45, 0x17, 0x00, 0x00, 0x00, 0xF0, 0xFF,
+0x70, 0x57, 0x70, 0x00, 0x17, 0x75, 0x17, 0x00,
+0x00, 0x00, 0x00, 0x06, 0xFF, 0xFF, 0xFF, 0x0F,
+0xFF, 0xFC, 0xFE, 0xFF, 0x92, 0x84, 0x10, 0x08,
+0x12, 0x56, 0x09, 0x29, 0x00, 0x01, 0x01, 0x00,
+0x00, 0x00, 0x10, 0x08, 0x12, 0x56, 0x09, 0x21,
+0x28, 0xEA, 0xA0, 0x79, 0xB9, 0xB2, 0x94, 0x91,
 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x80, 0x00,
 0x0E, 0x08, 0x04, 0x00, 0x0C, 0x08, 0x04, 0x00,
 0x00, 0xFF, 0xF9, 0xFF, 0x00, 0x00, 0xFE, 0x1F,
-0xFF, 0xFF, 0xF7, 0xFF, 0x00, 0x80, 0x03, 0x00,
+0x77, 0x65, 0x4F, 0x38, 0x00, 0x80, 0x03, 0x00,
 0xA3, 0x00, 0x60, 0xB8, 0xA0, 0x00, 0x60, 0xB8,
-0x65, 0x07, 0x64, 0xB8, 0x68, 0x00, 0x60, 0xB8,
-0x6E, 0x07, 0x64, 0xB8, 0xCC, 0x06, 0x64, 0xB8,
-0x64, 0x07, 0x64, 0xB8, 0x23, 0x05, 0x64, 0xB8,
+0x65, 0x07, 0x64, 0xB8, 0x40, 0x00, 0x60, 0xB8,
+0x68, 0x00, 0x60, 0xB8, 0x6E, 0x07, 0x64, 0xB8,
+0xCC, 0x06, 0x64, 0xB8, 0x64, 0x07, 0x64, 0xB8,
+0x23, 0x05, 0x64, 0xB8, 0x64, 0x00, 0x60, 0xB8,
 0xFF, 0xFF, 0x40, 0xFF, 0xFF, 0xFF, 0xFF, 0xE0,
 0x28, 0x00, 0x60, 0xB8, 0xFF, 0xFF, 0xFF, 0x81,
 0x00, 0x00, 0x70, 0xB8, 0x18, 0x00, 0x70, 0xB8,
-0x0B, 0x00, 0x70, 0xB8, 0x00, 0xFF, 0xFF, 0x00,
-0x02, 0x00, 0x70, 0xB8, 0x1C, 0x01, 0x64, 0xB8,
+0x00, 0x00, 0x78, 0xB8, 0x18, 0x00, 0x78, 0xB8,
+0x0B, 0x00, 0x78, 0xB8, 0x0B, 0x00, 0x70, 0xB8,
+0x02, 0x00, 0x78, 0xB8, 0x02, 0x00, 0x70, 0xB8,
+0x1C, 0x01, 0x64, 0xB8, 0x01, 0xA0, 0x02, 0x00,
 0x94, 0x02, 0x64, 0xB8, 0x97, 0x02, 0x64, 0xB8,
 0x1C, 0x04, 0x64, 0xB8, 0xCC, 0x01, 0x64, 0xB8,
 0x54, 0x02, 0x64, 0xB8, 0x50, 0x02, 0x64, 0xB8,
-0x4C, 0x02, 0x64, 0xB8, 0x00, 0x00, 0x78, 0xB8,
-0x04, 0x00, 0x78, 0xB8, 0x48, 0x02, 0x64, 0xB8,
-0x44, 0x02, 0x64, 0xB8, 0x64, 0x05, 0x64, 0xB8,
-0xD4, 0x04, 0x60, 0xB8, 0xD4, 0x04, 0x64, 0xB8,
-0x84, 0x04, 0x60, 0xB8, 0x84, 0x04, 0x64, 0xB8,
-0xC8, 0x04, 0x60, 0xB8, 0xC8, 0x04, 0x64, 0xB8,
-0x78, 0x04, 0x60, 0xB8, 0x78, 0x04, 0x64, 0xB8,
-0x30, 0x01, 0x64, 0xB8, 0x27, 0x05, 0x64, 0xB8,
+0x4C, 0x02, 0x64, 0xB8, 0x04, 0x00, 0x78, 0xB8,
+0x48, 0x02, 0x64, 0xB8, 0x44, 0x02, 0x64, 0xB8,
+0x64, 0x05, 0x64, 0xB8, 0xD4, 0x04, 0x60, 0xB8,
+0xD4, 0x04, 0x64, 0xB8, 0x84, 0x04, 0x60, 0xB8,
+0x84, 0x04, 0x64, 0xB8, 0xC8, 0x04, 0x60, 0xB8,
+0xC8, 0x04, 0x64, 0xB8, 0x78, 0x04, 0x60, 0xB8,
+0x78, 0x04, 0x64, 0xB8, 0x27, 0x05, 0x64, 0xB8,
 0xB5, 0x05, 0x64, 0xB8, 0xB7, 0x05, 0x64, 0xB8,
 0x31, 0x05, 0x64, 0xB8, 0x3C, 0x11, 0x64, 0xB8,
-0x40, 0x05, 0x64, 0xB8, 0x01, 0xEA, 0xEF, 0xFD,
+0x40, 0x05, 0x64, 0xB8, 0x8E, 0x00, 0x60, 0xB8,
+0x8F, 0x00, 0x60, 0xB8, 0x01, 0xEA, 0xEF, 0xFD,
 0x02, 0xEA, 0xEF, 0xFD, 0xC8, 0x01, 0x64, 0xB8,
 0xC9, 0x01, 0x64, 0xB8, 0xA0, 0x01, 0x64, 0xB8,
 0x38, 0x00, 0x78, 0xB8, 0x30, 0x00, 0x78, 0xB8,
@@ -10040,28 +10643,28 @@ u8 array_mp_8822b_fw_nic[] = {
 0x4B, 0x00, 0x78, 0xB8, 0x77, 0x05, 0x64, 0xB8,
 0x00, 0x00, 0x00, 0x05, 0x53, 0x05, 0x64, 0xB8,
 0x68, 0x05, 0x64, 0xB8, 0x94, 0x01, 0x64, 0xB8,
-0x34, 0x01, 0x64, 0xB8, 0x24, 0x01, 0x64, 0xB8,
-0x20, 0x01, 0x64, 0xB8, 0x24, 0x11, 0x64, 0xB8,
-0x20, 0x11, 0x64, 0xB8, 0x2C, 0x11, 0x64, 0xB8,
-0x28, 0x11, 0x64, 0xB8, 0x34, 0x11, 0x64, 0xB8,
-0x30, 0x11, 0x64, 0xB8, 0x38, 0x01, 0x64, 0xB8,
-0x38, 0x11, 0x64, 0xB8, 0xE4, 0x11, 0x64, 0xB8,
-0xE0, 0x11, 0x64, 0xB8, 0x50, 0x00, 0x60, 0xB8,
-0x54, 0x00, 0x60, 0xB8, 0x00, 0x40, 0x20, 0x14,
-0xFF, 0x0F, 0xFF, 0x0F, 0xEF, 0x01, 0x0E, 0x00,
-0x01, 0x70, 0x00, 0x3F, 0x9A, 0x01, 0x64, 0xB8,
+0x34, 0x01, 0x64, 0xB8, 0x30, 0x01, 0x64, 0xB8,
+0x24, 0x01, 0x64, 0xB8, 0x20, 0x01, 0x64, 0xB8,
+0x24, 0x11, 0x64, 0xB8, 0x20, 0x11, 0x64, 0xB8,
+0x2C, 0x11, 0x64, 0xB8, 0x28, 0x11, 0x64, 0xB8,
+0x34, 0x11, 0x64, 0xB8, 0x30, 0x11, 0x64, 0xB8,
+0x38, 0x01, 0x64, 0xB8, 0x38, 0x11, 0x64, 0xB8,
+0xE4, 0x11, 0x64, 0xB8, 0xE0, 0x11, 0x64, 0xB8,
+0x50, 0x00, 0x60, 0xB8, 0x54, 0x00, 0x60, 0xB8,
+0x00, 0x40, 0xE0, 0x17, 0xEF, 0x01, 0x0E, 0x00,
+0x01, 0x70, 0x00, 0x3F, 0xE0, 0x04, 0x64, 0xB8,
+0xE3, 0x04, 0x64, 0xB8, 0x9A, 0x01, 0x64, 0xB8,
 0x99, 0x01, 0x64, 0xB8, 0xC7, 0x01, 0x64, 0xB8,
 0xC6, 0x01, 0x64, 0xB8, 0xE0, 0x12, 0x64, 0xB8,
 0x67, 0x05, 0x64, 0xB8, 0x66, 0x05, 0x64, 0xB8,
 0x65, 0x05, 0x64, 0xB8, 0x63, 0x05, 0x64, 0xB8,
 0x62, 0x05, 0x64, 0xB8, 0x61, 0x05, 0x64, 0xB8,
-0x00, 0x01, 0x7F, 0x00, 0xE0, 0x04, 0x64, 0xB8,
-0xE3, 0x04, 0x64, 0xB8, 0x2F, 0x01, 0x64, 0xB8,
-0x00, 0x28, 0x64, 0xB8, 0x00, 0x2C, 0x64, 0xB8,
-0x00, 0x38, 0x64, 0xB8, 0x00, 0x3C, 0x64, 0xB8,
-0x54, 0x04, 0x64, 0xB8, 0x68, 0x06, 0x64, 0xB8,
-0x69, 0x06, 0x64, 0xB8, 0x00, 0x00, 0xF0, 0x3F,
-0x70, 0x77, 0x33, 0x54, 0x17, 0x77, 0x33, 0x77,
+0x2F, 0x01, 0x64, 0xB8, 0x00, 0x28, 0x64, 0xB8,
+0x00, 0x2C, 0x64, 0xB8, 0x00, 0x38, 0x64, 0xB8,
+0x00, 0x3C, 0x64, 0xB8, 0x54, 0x04, 0x64, 0xB8,
+0x68, 0x06, 0x64, 0xB8, 0x69, 0x06, 0x64, 0xB8,
+0x00, 0x00, 0xF0, 0x3F, 0x70, 0x77, 0x33, 0x54,
+0x00, 0x00, 0x10, 0x00, 0x17, 0x77, 0x33, 0x77,
 0x77, 0x77, 0x33, 0x77, 0x17, 0x77, 0x33, 0x54,
 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x33, 0x00,
 0xC3, 0x03, 0x30, 0x00, 0x00, 0x02, 0x30, 0x00,
@@ -10076,45 +10679,54 @@ u8 array_mp_8822b_fw_nic[] = {
 0xFA, 0x05, 0x64, 0xB8, 0xFB, 0x05, 0x64, 0xB8,
 0xFF, 0xFF, 0xFF, 0x7F, 0xA2, 0x02, 0x64, 0xB8,
 0x9C, 0x02, 0x64, 0xB8, 0x00, 0x00, 0x68, 0x18,
-0x01, 0x06, 0x64, 0xB8, 0x20, 0x00, 0x78, 0xB8,
-0x03, 0x00, 0x78, 0xB8, 0xFF, 0xFF, 0x01, 0xFF,
-0x05, 0x00, 0x78, 0xB8, 0x12, 0x05, 0x64, 0xB8,
-0x1F, 0x07, 0x64, 0xB8, 0x1C, 0x07, 0x64, 0xB8,
-0x2D, 0x04, 0x64, 0xB8, 0x2C, 0x04, 0x64, 0xB8,
+0x01, 0x06, 0x64, 0xB8, 0x1F, 0x07, 0x64, 0xB8,
+0x1C, 0x07, 0x64, 0xB8, 0x2C, 0x04, 0x64, 0xB8,
 0x1F, 0x04, 0x64, 0xB8, 0x5F, 0x01, 0x64, 0xB8,
+0xB8, 0x05, 0x64, 0xB8, 0xBC, 0x05, 0x64, 0xB8,
 0x5F, 0x11, 0x64, 0xB8, 0x30, 0x00, 0x78, 0x18,
-0x4C, 0x00, 0x00, 0xB5, 0x00, 0x00, 0x00, 0x08,
-0x00, 0x00, 0x20, 0x00, 0x7E, 0x04, 0x64, 0xB8,
-0x21, 0x04, 0x64, 0xB8, 0x20, 0x04, 0x64, 0xB8,
-0xAC, 0x04, 0x64, 0xB8, 0x07, 0x10, 0x66, 0xB8,
-0x7D, 0x04, 0x64, 0xB8, 0x7C, 0x04, 0x64, 0xB8,
-0xF4, 0x00, 0x60, 0xB8, 0x14, 0x11, 0x64, 0xB8,
-0x16, 0x11, 0x64, 0xB8, 0x17, 0x11, 0x64, 0xB8,
-0xD4, 0x07, 0x64, 0xB8, 0x08, 0x06, 0x64, 0xB8,
-0x0F, 0x06, 0x64, 0xB8, 0x00, 0x01, 0x64, 0xB8,
-0x98, 0x01, 0x64, 0xB8, 0xFF, 0xFF, 0xC0, 0xFF,
-0x40, 0x01, 0x00, 0x80, 0xFF, 0x17, 0xC0, 0xFF,
-0x00, 0x98, 0x00, 0x80, 0x7B, 0x05, 0x64, 0xB8,
-0x73, 0x05, 0x64, 0xB8, 0x01, 0x01, 0x64, 0xB8,
-0xB7, 0x06, 0x64, 0xB8, 0x00, 0x00, 0x03, 0x00,
-0x78, 0x07, 0x64, 0xB8, 0xFF, 0xFF, 0x7F, 0xFE,
-0x70, 0x00, 0x60, 0xB8, 0x18, 0x34, 0x00, 0xB8,
-0x08, 0x34, 0x00, 0xB8, 0x00, 0x34, 0x00, 0xB8,
-0x01, 0x34, 0x00, 0xB8, 0x02, 0x34, 0x00, 0xB8,
-0x10, 0x34, 0x00, 0xB8, 0x1C, 0xE5, 0xFF, 0x47,
-0x70, 0x07, 0x64, 0xB8, 0x74, 0x07, 0x64, 0xB8,
-0x20, 0x34, 0x00, 0xB8, 0xA8, 0x00, 0x60, 0xB8,
-0x00, 0x00, 0x02, 0x80, 0x34, 0x00, 0x78, 0xB8,
-0xC4, 0x06, 0x64, 0xB8, 0xFF, 0xFF, 0xFF, 0xEF,
-0x00, 0x17, 0x64, 0xB8, 0x03, 0x17, 0x64, 0xB8,
-0x08, 0x17, 0x64, 0xB8, 0x04, 0x17, 0x64, 0xB8,
-0x00, 0x00, 0x0F, 0xC0, 0x00, 0x00, 0x03, 0xC0,
-0x00, 0x00, 0x0C, 0xC0, 0x00, 0x00, 0x01, 0xC0,
-0x00, 0x00, 0x02, 0xC0, 0x06, 0x17, 0x64, 0xB8,
-0x00, 0x00, 0x04, 0xC0, 0x07, 0x17, 0x64, 0xB8,
-0x00, 0x00, 0x08, 0xC0, 0x31, 0x00, 0x60, 0xB8,
-0x32, 0x00, 0x60, 0xB8, 0x33, 0x00, 0x60, 0xB8,
-0x30, 0x00, 0x60, 0xB8, 0x00, 0x00, 0x00, 0x70,
+0x40, 0x00, 0x00, 0xB5, 0x44, 0x00, 0x00, 0xB5,
+0x48, 0x00, 0x00, 0xB5, 0x4C, 0x00, 0x00, 0xB5,
+0xA8, 0x04, 0x64, 0xB8, 0xC0, 0x01, 0x64, 0xB8,
+0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x08,
+0x7E, 0x04, 0x64, 0xB8, 0xAC, 0x04, 0x64, 0xB8,
+0x07, 0x10, 0x66, 0xB8, 0x7D, 0x04, 0x64, 0xB8,
+0x7C, 0x04, 0x64, 0xB8, 0xF4, 0x00, 0x60, 0xB8,
+0x14, 0x11, 0x64, 0xB8, 0x16, 0x11, 0x64, 0xB8,
+0x17, 0x11, 0x64, 0xB8, 0xD4, 0x07, 0x64, 0xB8,
+0x08, 0x06, 0x64, 0xB8, 0x0F, 0x06, 0x64, 0xB8,
+0x00, 0x01, 0x64, 0xB8, 0x98, 0x01, 0x64, 0xB8,
+0xFF, 0xFF, 0xC0, 0xFF, 0x40, 0x01, 0x00, 0x80,
+0xFF, 0x17, 0xC0, 0xFF, 0x00, 0x98, 0x00, 0x80,
+0x7B, 0x05, 0x64, 0xB8, 0x73, 0x05, 0x64, 0xB8,
+0x01, 0x01, 0x64, 0xB8, 0x14, 0x00, 0x60, 0xB8,
+0x7C, 0x00, 0x60, 0xB8, 0x10, 0x00, 0x60, 0xB8,
+0xFF, 0xFF, 0xDF, 0xFF, 0xFF, 0xFF, 0xFF, 0xBF,
+0xB7, 0x06, 0x64, 0xB8, 0xFF, 0xFF, 0xEF, 0xFF,
+0x4C, 0x00, 0x60, 0xB8, 0xFF, 0xFF, 0x7F, 0xFF,
+0x44, 0x09, 0x64, 0xB8, 0x30, 0x09, 0x64, 0xB8,
+0x38, 0x00, 0x60, 0xB8, 0xEF, 0x00, 0x60, 0xB8,
+0xFF, 0xFF, 0xFF, 0xCF, 0xFF, 0xFF, 0xFF, 0xF9,
+0x70, 0x00, 0x60, 0xB8, 0x80, 0x10, 0x60, 0xB8,
+0xEC, 0x00, 0x60, 0xB8, 0x00, 0x00, 0x00, 0x07,
+0xFF, 0xFF, 0xFF, 0xF8, 0x78, 0x07, 0x64, 0xB8,
+0xFF, 0xFF, 0x7F, 0xFE, 0xAA, 0x00, 0x60, 0xB8,
+0xA8, 0x00, 0x60, 0xB8, 0x00, 0x00, 0x02, 0x80,
+0x18, 0x34, 0x00, 0xB8, 0x08, 0x34, 0x00, 0xB8,
+0x00, 0x34, 0x00, 0xB8, 0x01, 0x34, 0x00, 0xB8,
+0x02, 0x34, 0x00, 0xB8, 0x10, 0x34, 0x00, 0xB8,
+0x28, 0xE5, 0xFF, 0x47, 0x70, 0x07, 0x64, 0xB8,
+0x74, 0x07, 0x64, 0xB8, 0x20, 0x34, 0x00, 0xB8,
+0x34, 0x00, 0x78, 0xB8, 0xC4, 0x06, 0x64, 0xB8,
+0xFF, 0xFF, 0xFF, 0xEF, 0x00, 0x17, 0x64, 0xB8,
+0x03, 0x17, 0x64, 0xB8, 0x08, 0x17, 0x64, 0xB8,
+0x04, 0x17, 0x64, 0xB8, 0x00, 0x00, 0x0F, 0xC0,
+0x00, 0x00, 0x03, 0xC0, 0x00, 0x00, 0x0C, 0xC0,
+0x00, 0x00, 0x01, 0xC0, 0x00, 0x00, 0x02, 0xC0,
+0x06, 0x17, 0x64, 0xB8, 0x00, 0x00, 0x04, 0xC0,
+0x07, 0x17, 0x64, 0xB8, 0x00, 0x00, 0x08, 0xC0,
+0x31, 0x00, 0x60, 0xB8, 0x32, 0x00, 0x60, 0xB8,
+0x33, 0x00, 0x60, 0xB8, 0x30, 0x00, 0x60, 0xB8,
+0x01, 0xAA, 0xAA, 0xFA, 0x00, 0x00, 0x00, 0x70,
 0xE2, 0x04, 0x64, 0xB8, 0xB4, 0x05, 0x64, 0xB8,
 0xFF, 0xFF, 0xCF, 0xFF, 0x5C, 0x05, 0x64, 0xB8,
 0x38, 0x06, 0x64, 0xB8, 0xA0, 0x06, 0x64, 0xB8,
@@ -10124,18 +10736,20 @@ u8 array_mp_8822b_fw_nic[] = {
 0x0C, 0x15, 0x64, 0xB8, 0xFF, 0xFF, 0xF8, 0xFF,
 0x4D, 0x00, 0x78, 0xB8, 0x4E, 0x00, 0x78, 0xB8,
 0x4C, 0x00, 0x78, 0xB8, 0x52, 0x00, 0x78, 0xB8,
-0xA0, 0x86, 0x01, 0x00, 0xFF, 0xFF, 0x7F, 0xFF,
-0x00, 0x00, 0x05, 0x00, 0x82, 0x06, 0x64, 0xB8,
-0x83, 0x06, 0x64, 0xB8, 0x8E, 0x06, 0x64, 0xB8,
-0x84, 0x06, 0x64, 0xB8, 0x85, 0x06, 0x64, 0xB8,
-0x58, 0x01, 0x64, 0xB8, 0x50, 0x01, 0x64, 0xB8,
-0x00, 0x00, 0x78, 0x18, 0xB2, 0x05, 0x64, 0xB8,
-0xB3, 0x05, 0x64, 0xB8, 0x43, 0x05, 0x64, 0xB8,
-0x7D, 0x05, 0x64, 0xB8, 0x7F, 0x05, 0x64, 0xB8,
-0x72, 0x05, 0x64, 0xB8, 0xCF, 0x05, 0x64, 0xB8,
-0xE0, 0x05, 0x64, 0xB8, 0xE4, 0x05, 0x64, 0xB8,
-0xE8, 0x05, 0x64, 0xB8, 0xEC, 0x05, 0x64, 0xB8,
-0xF0, 0x05, 0x64, 0xB8, 0xB6, 0x05, 0x64, 0xB8,
+0xA0, 0x86, 0x01, 0x00, 0x00, 0x00, 0x05, 0x00,
+0x82, 0x06, 0x64, 0xB8, 0x83, 0x06, 0x64, 0xB8,
+0x8E, 0x06, 0x64, 0xB8, 0x84, 0x06, 0x64, 0xB8,
+0x85, 0x06, 0x64, 0xB8, 0x58, 0x01, 0x64, 0xB8,
+0x50, 0x01, 0x64, 0xB8, 0x00, 0x00, 0x78, 0x18,
+0xB2, 0x05, 0x64, 0xB8, 0xB3, 0x05, 0x64, 0xB8,
+0x43, 0x05, 0x64, 0xB8, 0x7D, 0x05, 0x64, 0xB8,
+0x7F, 0x05, 0x64, 0xB8, 0x72, 0x05, 0x64, 0xB8,
+0xCF, 0x05, 0x64, 0xB8, 0xE0, 0x05, 0x64, 0xB8,
+0xE4, 0x05, 0x64, 0xB8, 0xE8, 0x05, 0x64, 0xB8,
+0xEC, 0x05, 0x64, 0xB8, 0xF0, 0x05, 0x64, 0xB8,
+0xB6, 0x05, 0x64, 0xB8, 0x20, 0x00, 0x78, 0xB8,
+0x03, 0x00, 0x78, 0xB8, 0xFF, 0xFF, 0x01, 0xFF,
+0x05, 0x00, 0x78, 0xB8, 0x12, 0x05, 0x64, 0xB8,
 0x43, 0x6C, 0x65, 0x61, 0x72, 0x50, 0x57, 0x54,
 0x00, 0x00, 0x00, 0x00, 0x41, 0x20, 0x4D, 0x69,
 0x78, 0x4D, 0x6F, 0x64, 0x65, 0x20, 0x41, 0x47,
@@ -10262,214 +10876,215 @@ u8 array_mp_8822b_fw_nic[] = {
 0x78, 0x20, 0x75, 0x73, 0x65, 0x72, 0x3D, 0x25,
 0x62, 0x78, 0x20, 0x64, 0x6F, 0x77, 0x6E, 0x3D,
 0x25, 0x62, 0x78, 0x0A, 0x00, 0x00, 0x00, 0x00,
-0x4D, 0x55, 0x52, 0x41, 0x3A, 0x20, 0x4E, 0x6F,
-0x20, 0x45, 0x6E, 0x74, 0x72, 0x79, 0x0A, 0x00,
-0x4D, 0x55, 0x52, 0x41, 0x3A, 0x20, 0x4E, 0x6F,
-0x20, 0x45, 0x6E, 0x74, 0x72, 0x79, 0x20, 0x6D,
-0x75, 0x69, 0x64, 0x20, 0x25, 0x62, 0x58, 0x00,
-0x53, 0x65, 0x61, 0x72, 0x63, 0x68, 0x3A, 0x25,
-0x62, 0x78, 0x2C, 0x25, 0x62, 0x78, 0x2C, 0x25,
-0x62, 0x78, 0x00, 0x00, 0x42, 0x47, 0x20, 0x3A,
-0x25, 0x62, 0x78, 0x20, 0x2C, 0x20, 0x6E, 0x75,
-0x6D, 0x74, 0x72, 0x79, 0x3A, 0x20, 0x25, 0x62,
-0x78, 0x00, 0x00, 0x00, 0x53, 0x54, 0x42, 0x43,
-0x20, 0x6F, 0x6E, 0x00, 0x53, 0x74, 0x61, 0x74,
-0x65, 0x20, 0x25, 0x62, 0x58, 0x20, 0x00, 0x00,
-0x72, 0x61, 0x74, 0x65, 0x3A, 0x20, 0x25, 0x62,
-0x58, 0x00, 0x00, 0x00, 0x49, 0x44, 0x3A, 0x25,
-0x62, 0x58, 0x00, 0x00, 0x52, 0x5B, 0x30, 0x3A,
-0x34, 0x5D, 0x20, 0x25, 0x62, 0x58, 0x20, 0x2C,
-0x20, 0x25, 0x62, 0x58, 0x2C, 0x20, 0x25, 0x62,
-0x58, 0x2C, 0x20, 0x25, 0x62, 0x58, 0x2C, 0x20,
+0x48, 0x32, 0x43, 0x42, 0x46, 0x45, 0x6E, 0x74,
+0x00, 0x00, 0x00, 0x00, 0x45, 0x6E, 0x3A, 0x25,
+0x62, 0x78, 0x20, 0x4E, 0x63, 0x3A, 0x25, 0x62,
+0x78, 0x20, 0x4D, 0x3A, 0x25, 0x62, 0x78, 0x00,
+0x44, 0x69, 0x73, 0x3A, 0x25, 0x62, 0x78, 0x20,
+0x4E, 0x63, 0x3A, 0x25, 0x62, 0x78, 0x20, 0x4D,
+0x3A, 0x25, 0x62, 0x78, 0x00, 0x00, 0x00, 0x00,
+0x4D, 0x3A, 0x25, 0x62, 0x58, 0x2C, 0x52, 0x3A,
+0x25, 0x62, 0x58, 0x2C, 0x25, 0x62, 0x78, 0x2C,
+0x25, 0x62, 0x78, 0x2C, 0x25, 0x62, 0x78, 0x2C,
+0x20, 0x25, 0x78, 0x00, 0x47, 0x3A, 0x25, 0x62,
+0x58, 0x2C, 0x50, 0x30, 0x25, 0x62, 0x58, 0x2C,
+0x50, 0x31, 0x25, 0x62, 0x58, 0x2C, 0x25, 0x62,
+0x78, 0x2C, 0x25, 0x62, 0x78, 0x2C, 0x25, 0x62,
+0x78, 0x2C, 0x25, 0x78, 0x00, 0x00, 0x00, 0x00,
+0x4D, 0x32, 0x53, 0x25, 0x77, 0x78, 0x2C, 0x54,
+0x54, 0x25, 0x77, 0x78, 0x00, 0x00, 0x00, 0x00,
+0x4D, 0x74, 0x42, 0x77, 0x20, 0x55, 0x70, 0x44,
+0x77, 0x25, 0x62, 0x78, 0x20, 0x42, 0x57, 0x25,
+0x62, 0x78, 0x20, 0x52, 0x74, 0x25, 0x62, 0x78,
+0x00, 0x00, 0x00, 0x00, 0x48, 0x69, 0x74, 0x25,
+0x62, 0x78, 0x20, 0x52, 0x74, 0x30, 0x3D, 0x25,
+0x77, 0x78, 0x20, 0x52, 0x74, 0x31, 0x3D, 0x25,
+0x77, 0x78, 0x00, 0x00, 0x52, 0x41, 0x3A, 0x4F,
+0x46, 0x44, 0x4D, 0x25, 0x62, 0x58, 0x00, 0x00,
+0x52, 0x41, 0x3A, 0x43, 0x43, 0x4B, 0x25, 0x62,
+0x58, 0x00, 0x00, 0x00, 0x52, 0x41, 0x3A, 0x56,
+0x31, 0x2D, 0x4D, 0x25, 0x62, 0x58, 0x00, 0x00,
+0x52, 0x41, 0x3A, 0x56, 0x32, 0x2D, 0x4D, 0x25,
+0x62, 0x58, 0x00, 0x00, 0x52, 0x41, 0x3A, 0x56,
+0x33, 0x2D, 0x4D, 0x25, 0x62, 0x58, 0x00, 0x00,
+0x52, 0x41, 0x3A, 0x48, 0x2D, 0x4D, 0x25, 0x62,
+0x58, 0x00, 0x00, 0x00, 0x52, 0x41, 0x3A, 0x48,
+0x2D, 0x4D, 0x31, 0x2C, 0x25, 0x62, 0x58, 0x00,
+0x52, 0x41, 0x3A, 0x48, 0x2D, 0x4D, 0x32, 0x2C,
+0x25, 0x62, 0x58, 0x00, 0x53, 0x74, 0x6F, 0x72,
+0x45, 0x6E, 0x3A, 0x25, 0x62, 0x78, 0x20, 0x42,
+0x46, 0x63, 0x74, 0x72, 0x6C, 0x3A, 0x25, 0x62,
+0x78, 0x00, 0x00, 0x00, 0x57, 0x72, 0x69, 0x74,
+0x65, 0x45, 0x6E, 0x3A, 0x25, 0x62, 0x78, 0x20,
+0x42, 0x46, 0x63, 0x74, 0x72, 0x6C, 0x3A, 0x25,
+0x62, 0x78, 0x00, 0x00, 0x52, 0x65, 0x63, 0x45,
+0x6E, 0x3A, 0x25, 0x62, 0x78, 0x20, 0x42, 0x46,
+0x63, 0x74, 0x72, 0x6C, 0x3A, 0x25, 0x62, 0x78,
+0x00, 0x00, 0x00, 0x00, 0x53, 0x6E, 0x64, 0x44,
+0x20, 0x4D, 0x3A, 0x25, 0x62, 0x78, 0x20, 0x52,
+0x3A, 0x25, 0x62, 0x78, 0x20, 0x52, 0x25, 0x62,
+0x78, 0x20, 0x43, 0x74, 0x3A, 0x25, 0x62, 0x78,
+0x00, 0x00, 0x00, 0x00, 0x41, 0x70, 0x70, 0x6C,
+0x56, 0x3A, 0x25, 0x62, 0x78, 0x00, 0x00, 0x00,
+0x4E, 0x61, 0x70, 0x70, 0x6C, 0x56, 0x3A, 0x25,
+0x62, 0x78, 0x00, 0x00, 0x43, 0x68, 0x54, 0x78,
+0x42, 0x46, 0x73, 0x74, 0x73, 0x20, 0x4D, 0x3A,
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@@ -10649,9 +11221,8 @@ u8 array_mp_8822b_fw_nic[] = {
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@@ -10685,11 +11256,26 @@ u8 array_mp_8822b_fw_nic[] = {
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@@ -10939,10 +11525,10 @@ u8 array_mp_8822b_fw_nic[] = {
 0x0A, 0x0E, 0x10, 0x18, 0x05, 0x08, 0x08, 0x09,
 0x10, 0x14, 0x1C, 0x20, 0x04, 0x06, 0x08, 0x0A,
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 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
@@ -10954,137 +11540,148 @@ u8 array_mp_8822b_fw_nic[] = {
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 0x09, 0x0A, 0x0B, 0x0C, 0x0C, 0x0C, 0x05, 0x06,
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+0x45, 0x46, 0x00, 0x00, 0x00, 0xF0, 0x01, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x01, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x07, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x07, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00,
+0x00, 0x00, 0x30, 0xC0, 0xE0, 0x00, 0x00, 0x00,
+0x00, 0x0C, 0x0E, 0x38, 0x18, 0x00, 0x00, 0x00,
+0x00, 0x83, 0x01, 0x06, 0x80, 0x03, 0x00, 0x00,
+0x00, 0x00, 0x70, 0xE0, 0x00, 0x00, 0x00, 0x00,
+0x48, 0x95, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x18, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -11103,7 +11700,7 @@ u8 array_mp_8822b_fw_nic[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x7B, 0xB9, 0x00, 0x65, 0x00, 0x65, 0x00, 0x65,
 0x5A, 0xB9, 0x00, 0x65, 0x00, 0x65, 0x00, 0x65,
-0x10, 0xF0, 0x20, 0x6A, 0x40, 0xF3, 0x1D, 0x4A,
+0x10, 0xF0, 0x20, 0x6A, 0x20, 0xF3, 0x0D, 0x4A,
 0x00, 0xEA, 0x00, 0x65, 0x00, 0x65, 0x00, 0x65,
 0x00, 0x65, 0x00, 0x65, 0x00, 0x65, 0x00, 0x65,
 0x00, 0x65, 0x00, 0x65, 0x00, 0x65, 0x00, 0x65,
@@ -11159,78 +11756,82 @@ u8 array_mp_8822b_fw_nic[] = {
 0x00, 0x6E, 0x30, 0xF0, 0x20, 0x6F, 0x00, 0xF0,
 0x00, 0x4F, 0xC0, 0xDC, 0x04, 0x4C, 0xE3, 0xEC,
 0xB8, 0x67, 0xFB, 0x2D, 0x30, 0xF0, 0x20, 0x6C,
-0xE5, 0xF6, 0x10, 0x4C, 0x00, 0x6E, 0x30, 0xF0,
-0x21, 0x6F, 0x34, 0xF2, 0x18, 0x4F, 0xC0, 0xDC,
+0x65, 0xF5, 0x10, 0x4C, 0x00, 0x6E, 0x30, 0xF0,
+0x21, 0x6F, 0x70, 0xF4, 0x00, 0x4F, 0xC0, 0xDC,
 0x04, 0x4C, 0xE3, 0xEC, 0xB8, 0x67, 0xFB, 0x2D,
 0x10, 0xF0, 0x20, 0x6C, 0x60, 0xF2, 0x15, 0x4C,
 0x00, 0xEC, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x30, 0xF0, 0x20, 0x6B, 0x01, 0xF1, 0x6C, 0x9B,
+0x30, 0xF0, 0x20, 0x6B, 0x60, 0xF7, 0x7C, 0x9B,
 0x10, 0xF0, 0x20, 0x6A, 0x60, 0xF2, 0x15, 0x4A,
-0x40, 0xDB, 0x00, 0x18, 0xBD, 0x06, 0x00, 0x18,
-0xD4, 0x06, 0x00, 0x18, 0x35, 0x09, 0x00, 0x18,
-0xEB, 0x06, 0x00, 0x18, 0xE0, 0x08, 0x00, 0x18,
-0xE0, 0x0E, 0x30, 0xF0, 0x20, 0x6C, 0x30, 0xF0,
+0x40, 0xDB, 0x00, 0x18, 0x7C, 0x07, 0x00, 0x18,
+0x93, 0x07, 0x00, 0x18, 0xFB, 0x09, 0x00, 0x18,
+0xAA, 0x07, 0x00, 0x18, 0xA6, 0x09, 0x00, 0x18,
+0xEB, 0x10, 0x30, 0xF0, 0x20, 0x6C, 0x30, 0xF0,
 0x21, 0x6A, 0x60, 0xF0, 0x08, 0x4C, 0x15, 0xF0,
 0x00, 0x4A, 0x43, 0xDC, 0x00, 0x6D, 0x00, 0x18,
-0x9F, 0x0E, 0x30, 0xF0, 0x20, 0x6C, 0x30, 0xF0,
-0x21, 0x6B, 0xE0, 0xF0, 0x08, 0x4C, 0x01, 0x6D,
-0x53, 0xF2, 0x4C, 0xDB, 0x00, 0x18, 0x64, 0x0D,
-0x30, 0xF0, 0x21, 0x6B, 0x53, 0xF2, 0x58, 0xDB,
+0xA6, 0x10, 0x30, 0xF0, 0x20, 0x6C, 0x30, 0xF0,
+0x20, 0x6B, 0xE0, 0xF0, 0x08, 0x4C, 0x01, 0x6D,
+0xAF, 0xF3, 0x58, 0xDB, 0x00, 0x18, 0x5F, 0x0F,
+0x30, 0xF0, 0x20, 0x6B, 0xCF, 0xF3, 0x40, 0xDB,
 0x30, 0xF0, 0x20, 0x6C, 0x30, 0xF0, 0x21, 0x6A,
 0xA0, 0xF0, 0x08, 0x4C, 0x15, 0xF4, 0x00, 0x4A,
-0x43, 0xDC, 0x00, 0x6D, 0x00, 0x18, 0x9F, 0x0E,
-0x30, 0xF0, 0x20, 0x6C, 0x30, 0xF0, 0x21, 0x6B,
-0x20, 0xF1, 0x0C, 0x4C, 0x01, 0x6D, 0x53, 0xF2,
-0x50, 0xDB, 0x00, 0x18, 0x64, 0x0D, 0x30, 0xF0,
-0x21, 0x6B, 0x53, 0xF2, 0x5C, 0xDB, 0x30, 0xF0,
-0x20, 0x6C, 0x30, 0xF0, 0x21, 0x6A, 0xE0, 0xF0,
-0x0C, 0x4C, 0x16, 0xF0, 0x00, 0x4A, 0x43, 0xDC,
-0x00, 0x6D, 0x00, 0x18, 0x9F, 0x0E, 0x30, 0xF0,
-0x21, 0x6B, 0x53, 0xF2, 0x54, 0xDB, 0x00, 0x18,
-0xFD, 0x08, 0x30, 0xF0, 0x20, 0x6A, 0xC1, 0xF2,
-0x74, 0x9A, 0xFF, 0xF7, 0x1F, 0x6C, 0x10, 0xF0,
-0x00, 0x6D, 0x40, 0xAB, 0xAB, 0xED, 0x8C, 0xEA,
-0xAD, 0xEA, 0x8C, 0xEA, 0x40, 0xCB, 0x00, 0x18,
-0xDF, 0x0C, 0x00, 0x18, 0xE2, 0x0B, 0xFF, 0x17,
+0x43, 0xDC, 0x00, 0x6D, 0x00, 0x18, 0xA6, 0x10,
+0x30, 0xF0, 0x20, 0x6B, 0xAF, 0xF3, 0x5C, 0xDB,
+0x00, 0x18, 0xC3, 0x09, 0x00, 0x18, 0x4B, 0x0B,
+0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1, 0x74, 0x9A,
+0xFF, 0xF7, 0x1F, 0x6C, 0x10, 0xF0, 0x00, 0x6D,
+0x40, 0xAB, 0xAB, 0xED, 0x8C, 0xEA, 0xAD, 0xEA,
+0x8C, 0xEA, 0x40, 0xCB, 0x00, 0x18, 0xCE, 0x0E,
+0x00, 0x18, 0x99, 0x0D, 0xFF, 0x17, 0x00, 0x65,
 0x20, 0xE8, 0x00, 0x65, 0x6D, 0xB8, 0x00, 0x65,
 0x00, 0xF0, 0x20, 0x6A, 0x7C, 0x4A, 0x6C, 0xEA,
-0x0F, 0x22, 0x00, 0xF0, 0x20, 0x6B, 0x28, 0x4B,
-0x6A, 0xEA, 0x05, 0x61, 0x10, 0xF0, 0x20, 0x6A,
-0xC0, 0xF3, 0x13, 0x4A, 0x00, 0xEA, 0x10, 0xF0,
-0x20, 0x6A, 0x25, 0xF7, 0x19, 0x4A, 0x00, 0xEA,
-0x00, 0xF0, 0x20, 0x6A, 0x1F, 0xF7, 0x00, 0x6A,
-0x4C, 0xEB, 0x4C, 0xB8, 0x00, 0x65, 0x6C, 0xEA,
-0x42, 0x32, 0x30, 0xF0, 0x20, 0x6B, 0xE4, 0xF7,
-0x0C, 0x4B, 0x49, 0xE3, 0x40, 0xA2, 0x30, 0xF0,
-0x20, 0x6B, 0x40, 0xF0, 0x08, 0x4B, 0x69, 0xE2,
-0x30, 0xF0, 0x21, 0x6B, 0x34, 0xF1, 0x10, 0x4B,
-0x60, 0x9B, 0x05, 0x2B, 0x10, 0xF0, 0x20, 0x6B,
-0x00, 0xF5, 0x01, 0x4B, 0x00, 0xEB, 0x10, 0xF0,
-0x20, 0x6B, 0x80, 0xF5, 0x15, 0x4B, 0x00, 0xEB,
-0x00, 0x65, 0x30, 0xF0, 0x21, 0x6A, 0x33, 0xF2,
-0x18, 0x4A, 0x00, 0xF0, 0x20, 0x6B, 0x01, 0x6B,
-0x60, 0xDA, 0x10, 0xF0, 0x20, 0x6B, 0xE0, 0xF3,
-0x0D, 0x4B, 0x00, 0xEB, 0x5A, 0xB8, 0x00, 0x65,
-0x7B, 0xB8, 0x00, 0x65, 0x40, 0xE8, 0x5A, 0xB9,
-0x00, 0x65, 0x00, 0x65, 0x00, 0x65, 0x7B, 0xB9,
-0x00, 0x65, 0x00, 0x65, 0x00, 0x65, 0x30, 0xF0,
-0x21, 0x6A, 0x33, 0xF2, 0x18, 0x4A, 0x00, 0xF0,
-0x20, 0x6B, 0x60, 0xDA, 0x30, 0xF0, 0x21, 0x6A,
-0x93, 0xF2, 0x18, 0x4A, 0x60, 0x9A, 0x41, 0x9A,
-0x6A, 0xEA, 0x0D, 0x61, 0x6E, 0xB8, 0x00, 0x65,
-0x62, 0x43, 0xCB, 0xB9, 0x00, 0x65, 0x00, 0x65,
-0x00, 0x65, 0x5A, 0xB8, 0x00, 0x65, 0x7B, 0xB8,
-0x00, 0x65, 0x00, 0xBA, 0x00, 0x65, 0x24, 0x23,
-0xDF, 0xF7, 0x00, 0x03, 0x86, 0xDB, 0xA7, 0xDB,
-0xC8, 0xDB, 0xE9, 0xDB, 0x0A, 0xDB, 0x2B, 0xDB,
-0x98, 0x67, 0x8C, 0xDB, 0x9F, 0x67, 0x8E, 0xDB,
-0x12, 0xEC, 0x10, 0xED, 0x82, 0xDB, 0xA3, 0xDB,
-0x9A, 0xB8, 0x00, 0x65, 0x84, 0xDB, 0x9B, 0xB8,
-0x00, 0x65, 0x85, 0xDB, 0x8E, 0xB8, 0x00, 0x65,
-0x82, 0x44, 0x81, 0xDB, 0x8C, 0xB8, 0x00, 0x65,
-0x80, 0xDB, 0x30, 0xF0, 0x21, 0x6B, 0x93, 0xF2,
-0x18, 0x4B, 0x60, 0x9B, 0x9D, 0x67, 0x89, 0xDB,
-0x30, 0xF0, 0x21, 0x6B, 0x93, 0xF2, 0x18, 0x4B,
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+0x6A, 0xEA, 0x0F, 0x61, 0x30, 0xF0, 0x21, 0x6B,
+0x50, 0xF3, 0x18, 0x4B, 0x77, 0xF0, 0x24, 0x6A,
+0xA0, 0xF4, 0x04, 0x4A, 0x60, 0xDA, 0x30, 0xF0,
+0x21, 0x6A, 0x50, 0xF3, 0x18, 0x4A, 0x6A, 0xEA,
+0x31, 0x60, 0x77, 0xF0, 0x24, 0x6A, 0xA0, 0xF1,
+0x1C, 0x4A, 0x1D, 0xF4, 0x00, 0x6B, 0x60, 0xDA,
+0x10, 0xF0, 0x20, 0x6A, 0x06, 0xF6, 0x15, 0x4A,
+0x00, 0xEA, 0x00, 0xF0, 0x20, 0x6A, 0x1F, 0xF7,
+0x00, 0x6A, 0x4C, 0xEB, 0x4C, 0xB8, 0x00, 0x65,
+0x6C, 0xEA, 0x42, 0x32, 0x30, 0xF0, 0x20, 0x6B,
+0x04, 0xF6, 0x14, 0x4B, 0x49, 0xE3, 0x40, 0xA2,
+0x30, 0xF0, 0x20, 0x6B, 0x40, 0xF0, 0x08, 0x4B,
+0x69, 0xE2, 0x30, 0xF0, 0x21, 0x6B, 0x50, 0xF3,
+0x14, 0x4B, 0x60, 0x9B, 0x05, 0x2B, 0x10, 0xF0,
+0x20, 0x6B, 0x20, 0xF5, 0x01, 0x4B, 0x00, 0xEB,
+0x10, 0xF0, 0x20, 0x6B, 0xA0, 0xF5, 0x15, 0x4B,
+0x00, 0xEB, 0x00, 0x65, 0x00, 0xF0, 0x20, 0x6B,
+0x01, 0x6B, 0x30, 0xF0, 0x21, 0x6A, 0x50, 0xF3,
+0x18, 0x4A, 0x60, 0xDA, 0x30, 0xF0, 0x20, 0x6A,
+0xAF, 0xF3, 0x04, 0x4A, 0x60, 0xDA, 0x10, 0xF0,
+0x20, 0x6B, 0xE0, 0xF3, 0x09, 0x4B, 0x00, 0xEB,
+0x5A, 0xB8, 0x00, 0x65, 0x7B, 0xB8, 0x00, 0x65,
+0x40, 0xE8, 0x5A, 0xB9, 0x00, 0x65, 0x00, 0x65,
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+0x00, 0x65, 0x30, 0xF0, 0x20, 0x6A, 0xAF, 0xF3,
+0x04, 0x4A, 0x00, 0xF0, 0x20, 0x6B, 0x60, 0xDA,
+0x30, 0xF0, 0x20, 0x6A, 0xEF, 0xF3, 0x1C, 0x4A,
+0x60, 0x9A, 0x41, 0x9A, 0x6A, 0xEA, 0x0D, 0x61,
+0x6E, 0xB8, 0x00, 0x65, 0x62, 0x43, 0xCB, 0xB9,
+0x00, 0x65, 0x00, 0x65, 0x00, 0x65, 0x5A, 0xB8,
+0x00, 0x65, 0x7B, 0xB8, 0x00, 0x65, 0x00, 0xBA,
+0x00, 0x65, 0x36, 0x23, 0xDF, 0xF7, 0x00, 0x03,
+0x86, 0xDB, 0xA7, 0xDB, 0xC8, 0xDB, 0xE9, 0xDB,
+0x0A, 0xDB, 0x2B, 0xDB, 0x98, 0x67, 0x8C, 0xDB,
+0x9F, 0x67, 0x8E, 0xDB, 0x12, 0xEC, 0x10, 0xED,
+0x82, 0xDB, 0xA3, 0xDB, 0x9A, 0xB8, 0x00, 0x65,
+0x84, 0xDB, 0x9B, 0xB8, 0x00, 0x65, 0x85, 0xDB,
+0x8E, 0xB8, 0x00, 0x65, 0x82, 0x44, 0x81, 0xDB,
+0x8C, 0xB8, 0x00, 0x65, 0x80, 0xDB, 0x30, 0xF0,
+0x20, 0x6B, 0xEF, 0xF3, 0x1C, 0x4B, 0x60, 0x9B,
+0x9D, 0x67, 0x89, 0xDB, 0x6A, 0x9B, 0xCF, 0xF7,
+0x80, 0x44, 0x62, 0xEC, 0x0D, 0x60, 0x77, 0xF0,
+0x24, 0x6C, 0xA0, 0xF1, 0x1C, 0x4C, 0x1D, 0xF4,
+0x01, 0x6B, 0x60, 0xDC, 0x10, 0xF0, 0x20, 0x6C,
+0x06, 0xF6, 0x15, 0x4C, 0x00, 0xEC, 0x00, 0x65,
+0x30, 0xF0, 0x20, 0x6B, 0xEF, 0xF3, 0x1C, 0x4B,
 0x41, 0x9B, 0x40, 0xDB, 0x89, 0x9A, 0xBC, 0x65,
 0x7D, 0x67, 0xDF, 0xF7, 0x00, 0x03, 0x4C, 0xB8,
 0x00, 0x65, 0x00, 0xF0, 0x20, 0x6D, 0x05, 0x4D,
@@ -11252,7 +11853,7 @@ u8 array_mp_8822b_fw_nic[] = {
 0x9A, 0xB8, 0x00, 0x65, 0x84, 0xDB, 0x9B, 0xB8,
 0x00, 0x65, 0x85, 0xDB, 0x7D, 0x67, 0x5B, 0xB9,
 0x00, 0x65, 0x00, 0x65, 0x00, 0x65, 0x40, 0x9A,
-0x30, 0xF0, 0x21, 0x6C, 0x13, 0xF3, 0x10, 0x4C,
+0x30, 0xF0, 0x20, 0x6C, 0x2F, 0xF7, 0x18, 0x4C,
 0x00, 0xF4, 0x00, 0x4C, 0xBC, 0x65, 0x82, 0x67,
 0x40, 0xEA, 0x00, 0x65, 0x7A, 0xB8, 0x00, 0x65,
 0xBB, 0x65, 0xDF, 0xF7, 0x00, 0x03, 0x82, 0x9B,
@@ -11263,8 +11864,8 @@ u8 array_mp_8822b_fw_nic[] = {
 0x00, 0x65, 0x2B, 0x9B, 0x0A, 0x9B, 0xE9, 0x9B,
 0xC8, 0x9B, 0xA7, 0x9B, 0x86, 0x9B, 0x5A, 0xB8,
 0x00, 0x65, 0x7B, 0xB8, 0x00, 0x65, 0x00, 0xBA,
-0x00, 0x65, 0x00, 0x65, 0x30, 0xF0, 0x21, 0x6B,
-0x33, 0xF2, 0x18, 0x4B, 0x40, 0xDB, 0xDF, 0xF7,
+0x00, 0x65, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6B,
+0xAF, 0xF3, 0x04, 0x4B, 0x40, 0xDB, 0xDF, 0xF7,
 0x00, 0x03, 0x86, 0xDB, 0xA7, 0xDB, 0xC8, 0xDB,
 0xE9, 0xDB, 0x0A, 0xDB, 0x2B, 0xDB, 0x98, 0x67,
 0x8C, 0xDB, 0x9F, 0x67, 0x8E, 0xDB, 0x12, 0xEC,
@@ -11272,1071 +11873,1285 @@ u8 array_mp_8822b_fw_nic[] = {
 0x00, 0x65, 0x84, 0xDB, 0x9B, 0xB8, 0x00, 0x65,
 0x85, 0xDB, 0x8E, 0xB8, 0x00, 0x65, 0x81, 0xDB,
 0x8C, 0xB8, 0x00, 0x65, 0x80, 0xDB, 0x30, 0xF0,
-0x21, 0x6B, 0x93, 0xF2, 0x18, 0x4B, 0x60, 0x9B,
-0x9D, 0x67, 0x89, 0xDB, 0x40, 0x9A, 0x30, 0xF0,
-0x21, 0x6C, 0x13, 0xF3, 0x10, 0x4C, 0x00, 0xF4,
-0x00, 0x4C, 0xBC, 0x65, 0x82, 0x67, 0x40, 0xEA,
-0x30, 0xF0, 0x21, 0x6C, 0x33, 0xF2, 0x18, 0x4C,
-0x00, 0xF0, 0x20, 0x6D, 0xA0, 0xDC, 0x30, 0xF0,
-0x21, 0x6A, 0x93, 0xF2, 0x18, 0x4A, 0x10, 0xF0,
-0x20, 0x6B, 0x00, 0xF6, 0x19, 0x4B, 0x00, 0xEB,
-0x61, 0x9A, 0x60, 0xDA, 0x49, 0x9B, 0xBA, 0x65,
-0xDF, 0xF7, 0x00, 0x03, 0x4C, 0xB8, 0x00, 0x65,
-0x00, 0xF0, 0x20, 0x6D, 0x05, 0x4D, 0xAF, 0xED,
-0xAC, 0xEA, 0xA0, 0x9B, 0x00, 0xF0, 0x20, 0x6C,
-0x04, 0x4C, 0x8C, 0xED, 0xAD, 0xEA, 0x82, 0x9B,
-0xA3, 0x9B, 0x32, 0xEC, 0x30, 0xED, 0x8E, 0x9B,
-0xFC, 0x65, 0x8C, 0x9B, 0x1C, 0x65, 0x84, 0x9B,
-0x5C, 0xB9, 0x00, 0x65, 0x00, 0x65, 0x00, 0x65,
-0x85, 0x9B, 0x7C, 0xB9, 0x00, 0x65, 0x00, 0x65,
-0x00, 0x65, 0x2B, 0x9B, 0x0A, 0x9B, 0xE9, 0x9B,
-0xC8, 0x9B, 0xA7, 0x9B, 0x86, 0x9B, 0x61, 0x9B,
-0xCB, 0xB9, 0x00, 0x65, 0x00, 0x65, 0x00, 0x65,
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-0x20, 0x6A, 0x00, 0xF2, 0x00, 0x4A, 0x4F, 0xEA,
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-0x30, 0xF0, 0x20, 0x6B, 0x01, 0xF1, 0x78, 0x9B,
-0xC0, 0xDB, 0x30, 0xF0, 0x20, 0x6B, 0x01, 0xF1,
-0x7C, 0x9B, 0xA0, 0xDB, 0x30, 0xF0, 0x20, 0x6B,
-0x21, 0xF1, 0x60, 0x9B, 0x80, 0xDB, 0x30, 0xF0,
-0x20, 0x6B, 0x89, 0x9A, 0x21, 0xF1, 0x64, 0x9B,
+0x30, 0xF0, 0x20, 0x6B, 0x80, 0xF7, 0x68, 0x9B,
+0xC0, 0xDB, 0x30, 0xF0, 0x20, 0x6B, 0x80, 0xF7,
+0x6C, 0x9B, 0xA0, 0xDB, 0x30, 0xF0, 0x20, 0x6B,
+0x80, 0xF7, 0x70, 0x9B, 0x80, 0xDB, 0x30, 0xF0,
+0x20, 0x6B, 0x89, 0x9A, 0x80, 0xF7, 0x74, 0x9B,
 0x80, 0xDB, 0x68, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
-0x21, 0xF1, 0x48, 0x9A, 0x60, 0xDA, 0x00, 0x18,
-0xE3, 0x0B, 0xFF, 0x17, 0x71, 0xAC, 0x4A, 0x9C,
+0x80, 0xF7, 0x58, 0x9A, 0x60, 0xDA, 0x00, 0x18,
+0x9A, 0x0D, 0xFF, 0x17, 0x71, 0xAC, 0x4A, 0x9C,
 0x6A, 0x33, 0x68, 0x33, 0x6D, 0xE2, 0x04, 0x6A,
 0x6C, 0xEA, 0x01, 0x22, 0xFC, 0x4B, 0x48, 0x43,
 0xC8, 0x4A, 0xC2, 0x67, 0x00, 0x6F, 0xE0, 0xDE,
@@ -12345,10 +13160,10 @@ u8 array_mp_8822b_fw_nic[] = {
 0x40, 0x4A, 0x49, 0xDC, 0xAB, 0xDC, 0x20, 0xE8,
 0x49, 0x9C, 0x10, 0x4A, 0x20, 0xE8, 0x00, 0x65,
 0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x05, 0x67,
-0x00, 0x18, 0xD4, 0x09, 0x00, 0xDA, 0x05, 0x97,
+0x00, 0x18, 0x88, 0x0B, 0x00, 0xDA, 0x05, 0x97,
 0x04, 0x90, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
-0x05, 0x67, 0x26, 0x67, 0x00, 0x18, 0xD4, 0x09,
+0x05, 0x67, 0x26, 0x67, 0x00, 0x18, 0x88, 0x0B,
 0x40, 0x9A, 0x00, 0xDA, 0x21, 0xDA, 0x07, 0x97,
 0x06, 0x91, 0x05, 0x90, 0x04, 0x63, 0x00, 0xEF,
 0x60, 0xA4, 0xC2, 0xA5, 0x41, 0x9C, 0x02, 0x10,
@@ -12362,14 +13177,14 @@ u8 array_mp_8822b_fw_nic[] = {
 0x08, 0x60, 0x61, 0x9A, 0x03, 0x23, 0x82, 0xDB,
 0x00, 0x6B, 0x61, 0xDA, 0x00, 0x6B, 0x62, 0xDA,
 0x20, 0xE8, 0x00, 0x6B, 0x61, 0xDA, 0x20, 0xE8,
-0x30, 0xF0, 0x21, 0x6A, 0x73, 0xF2, 0x00, 0x4A,
+0x30, 0xF0, 0x20, 0x6A, 0xCF, 0xF3, 0x04, 0x4A,
 0x61, 0x9A, 0x61, 0xDC, 0x00, 0x6B, 0x62, 0xDC,
-0x81, 0xDA, 0x20, 0xE8, 0x30, 0xF0, 0x21, 0x6B,
-0x73, 0xF2, 0x00, 0x4B, 0x30, 0xF0, 0x21, 0x6C,
-0x41, 0x9B, 0x93, 0xF2, 0x98, 0x9C, 0xA2, 0xA2,
+0x81, 0xDA, 0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6B,
+0xCF, 0xF3, 0x04, 0x4B, 0x30, 0xF0, 0x20, 0x6C,
+0x41, 0x9B, 0xEF, 0xF3, 0x9C, 0x9C, 0xA2, 0xA2,
 0x82, 0xA4, 0xAE, 0xEC, 0x02, 0x24, 0x00, 0x6A,
 0x20, 0xE8, 0x81, 0x9A, 0x81, 0xDB, 0x20, 0xE8,
-0x30, 0xF0, 0x21, 0x6B, 0x73, 0xF2, 0x14, 0x4B,
+0x30, 0xF0, 0x20, 0x6B, 0xCF, 0xF3, 0x18, 0x4B,
 0xC3, 0x9B, 0xFF, 0xF7, 0x1F, 0x6A, 0xAC, 0xEA,
 0x00, 0x6D, 0x04, 0x26, 0xA1, 0xAB, 0x0D, 0x10,
 0xC3, 0x9B, 0x08, 0x2E, 0x00, 0x6E, 0xAB, 0xE2,
@@ -12380,36 +13195,36 @@ u8 array_mp_8822b_fw_nic[] = {
 0x01, 0x26, 0x84, 0xDE, 0x4B, 0xE5, 0x4A, 0xCC,
 0xAA, 0xAB, 0x4B, 0xE5, 0x4A, 0xCB, 0x20, 0xE8,
 0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x30, 0xF0,
-0x21, 0x6A, 0x73, 0xF2, 0x14, 0x4A, 0x63, 0x9A,
+0x20, 0x6A, 0xCF, 0xF3, 0x18, 0x4A, 0x63, 0x9A,
 0x3C, 0x23, 0x61, 0xAA, 0xFF, 0x4B, 0x61, 0xCA,
 0x30, 0x10, 0x42, 0x98, 0x09, 0x22, 0x81, 0x98,
 0x81, 0xDA, 0x41, 0x98, 0x03, 0x22, 0x82, 0x98,
 0x82, 0xDA, 0x61, 0xD8, 0x00, 0x6A, 0x42, 0xD8,
-0x30, 0xF0, 0x21, 0x6C, 0x73, 0xF2, 0x00, 0x4C,
-0xB0, 0x67, 0x00, 0x18, 0xE4, 0x09, 0x6A, 0xA8,
-0x30, 0xF0, 0x21, 0x6A, 0x73, 0xF2, 0x76, 0xCA,
+0x30, 0xF0, 0x20, 0x6C, 0xCF, 0xF3, 0x04, 0x4C,
+0xB0, 0x67, 0x00, 0x18, 0x98, 0x0B, 0x6A, 0xA8,
+0x30, 0xF0, 0x20, 0x6A, 0xCF, 0xF3, 0x7A, 0xCA,
 0x41, 0xA0, 0x04, 0x72, 0x07, 0x61, 0x30, 0xF0,
-0x21, 0x6A, 0x93, 0xF2, 0x70, 0x9A, 0x4B, 0xA8,
+0x20, 0x6A, 0xEF, 0xF3, 0x74, 0x9A, 0x4B, 0xA8,
 0x49, 0xE3, 0x4A, 0xC8, 0x01, 0x6A, 0x63, 0x98,
-0x41, 0xC0, 0x30, 0xF0, 0x21, 0x6A, 0x73, 0xF2,
-0x14, 0x4A, 0x63, 0xDA, 0x63, 0x98, 0x03, 0x23,
+0x41, 0xC0, 0x30, 0xF0, 0x20, 0x6A, 0xCF, 0xF3,
+0x18, 0x4A, 0x63, 0xDA, 0x63, 0x98, 0x03, 0x23,
 0x44, 0xDB, 0x00, 0x6A, 0x43, 0xD8, 0x00, 0x6A,
-0x44, 0xD8, 0x30, 0xF0, 0x21, 0x6A, 0x73, 0xF2,
-0x14, 0x4A, 0x61, 0xAA, 0x02, 0x2B, 0x03, 0x9A,
+0x44, 0xD8, 0x30, 0xF0, 0x20, 0x6A, 0xCF, 0xF3,
+0x18, 0x4A, 0x61, 0xAA, 0x02, 0x2B, 0x03, 0x9A,
 0xC8, 0x28, 0x05, 0x97, 0x04, 0x90, 0x03, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0x42, 0x9C, 0x07, 0x22,
 0x61, 0x9C, 0x61, 0xDA, 0x41, 0x9C, 0x10, 0x22,
 0x62, 0x9C, 0x62, 0xDA, 0x20, 0xE8, 0x30, 0xF0,
-0x21, 0x6A, 0x73, 0xF2, 0x00, 0x4A, 0x07, 0x10,
+0x20, 0x6A, 0xCF, 0xF3, 0x04, 0x4A, 0x07, 0x10,
 0x61, 0x9A, 0x8A, 0xEB, 0x03, 0x61, 0x61, 0x9B,
 0x61, 0xDA, 0x20, 0xE8, 0x43, 0x67, 0xF8, 0x2A,
 0x20, 0xE8, 0x00, 0x65, 0xFC, 0x63, 0x07, 0x62,
 0x06, 0xD1, 0x05, 0xD0, 0x02, 0x9C, 0x24, 0x67,
 0x09, 0x28, 0x41, 0xA4, 0x01, 0x72, 0x0F, 0x61,
-0x30, 0xF0, 0x21, 0x68, 0x73, 0xF2, 0x00, 0x48,
+0x30, 0xF0, 0x20, 0x68, 0xCF, 0xF3, 0x04, 0x48,
 0x03, 0x10, 0x02, 0x98, 0x40, 0xA0, 0xFD, 0x22,
-0x91, 0x67, 0x00, 0x18, 0x41, 0x0A, 0x90, 0x67,
-0xB1, 0x67, 0x00, 0x18, 0xE4, 0x09, 0x07, 0x97,
+0x91, 0x67, 0x00, 0x18, 0xF5, 0x0B, 0x90, 0x67,
+0xB1, 0x67, 0x00, 0x18, 0x98, 0x0B, 0x07, 0x97,
 0x06, 0x91, 0x05, 0x90, 0x04, 0x63, 0x00, 0xEF,
 0x44, 0x9C, 0x10, 0x22, 0x63, 0x9C, 0x63, 0xDA,
 0x63, 0x9C, 0x09, 0x23, 0x6A, 0xAA, 0xAA, 0xAC,
@@ -12417,1945 +13232,2165 @@ u8 array_mp_8822b_fw_nic[] = {
 0x00, 0x6A, 0x43, 0xDC, 0x01, 0x10, 0x6A, 0xCA,
 0x00, 0x6A, 0x44, 0xDC, 0x20, 0xE8, 0x00, 0x65,
 0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
-0x30, 0xF0, 0x21, 0x68, 0x13, 0xF7, 0x10, 0x48,
+0x30, 0xF0, 0x20, 0x68, 0x2F, 0xF4, 0x14, 0x48,
 0x09, 0xD5, 0x24, 0x67, 0x83, 0xA0, 0xA2, 0x40,
-0xD0, 0x67, 0x00, 0x18, 0x4B, 0x10, 0x63, 0xA0,
+0xD0, 0x67, 0x00, 0x18, 0x5A, 0x12, 0x63, 0xA0,
 0x63, 0xEA, 0x06, 0x60, 0x4C, 0x32, 0x41, 0xE0,
 0x21, 0xD8, 0x09, 0x92, 0x42, 0xD8, 0x03, 0x10,
-0x02, 0x6C, 0x00, 0x18, 0xB2, 0x0B, 0x07, 0x97,
+0x02, 0x6C, 0x00, 0x18, 0x65, 0x0D, 0x07, 0x97,
 0x06, 0x91, 0x05, 0x90, 0x04, 0x63, 0x00, 0xEF,
 0x20, 0xE8, 0x00, 0x65, 0x20, 0xE8, 0x00, 0x65,
-0x30, 0xF0, 0x21, 0x6A, 0x93, 0xF2, 0x50, 0x9A,
-0x20, 0xE8, 0x00, 0x65, 0x30, 0xF0, 0x21, 0x6B,
-0xFF, 0xF7, 0x1F, 0x6A, 0x8C, 0xEA, 0x93, 0xF2,
-0x98, 0x9B, 0x4B, 0xCC, 0x30, 0xF0, 0x21, 0x6C,
-0x93, 0xF2, 0x90, 0x9C, 0x93, 0xF2, 0x78, 0x9B,
+0x30, 0xF0, 0x20, 0x6A, 0xEF, 0xF3, 0x54, 0x9A,
+0x20, 0xE8, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6B,
+0xFF, 0xF7, 0x1F, 0x6A, 0x8C, 0xEA, 0xEF, 0xF3,
+0x9C, 0x9B, 0x4B, 0xCC, 0x30, 0xF0, 0x20, 0x6C,
+0xEF, 0xF3, 0x94, 0x9C, 0xEF, 0xF3, 0x7C, 0x9B,
 0x89, 0xE2, 0x4A, 0xCB, 0x20, 0xE8, 0x00, 0x65,
-0xFD, 0x63, 0x05, 0x62, 0x30, 0xF0, 0x21, 0x6A,
-0x93, 0xF2, 0x58, 0x9A, 0x30, 0xF0, 0x21, 0x6B,
-0x93, 0xF2, 0x90, 0x9B, 0x6A, 0xAA, 0xFF, 0xF7,
+0xFD, 0x63, 0x05, 0x62, 0x30, 0xF0, 0x20, 0x6A,
+0xEF, 0xF3, 0x5C, 0x9A, 0x30, 0xF0, 0x20, 0x6B,
+0xEF, 0xF3, 0x94, 0x9B, 0x6A, 0xAA, 0xFF, 0xF7,
 0x1F, 0x6D, 0x93, 0xE3, 0xAC, 0xEC, 0xAB, 0xAA,
 0x6D, 0xE5, 0x6A, 0xCA, 0x82, 0x32, 0x5E, 0x32,
-0x03, 0x2A, 0x04, 0x6D, 0x00, 0x18, 0xF7, 0x0A,
+0x03, 0x2A, 0x04, 0x6D, 0x00, 0x18, 0xA8, 0x0C,
 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFD, 0x63, 0x05, 0x62, 0xFF, 0xF7, 0x1F, 0x6A,
-0x4C, 0xEC, 0x03, 0x6D, 0x00, 0x18, 0xF7, 0x0A,
+0x4C, 0xEC, 0x03, 0x6D, 0x00, 0x18, 0xA8, 0x0C,
 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0x20, 0xE8, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x30, 0xF0, 0x21, 0x6A, 0x93, 0xF2, 0x78, 0x9A,
-0x01, 0x6C, 0x81, 0xC3, 0x93, 0xF2, 0x98, 0x9A,
-0x00, 0x18, 0xFA, 0x09, 0x00, 0x18, 0x77, 0x0A,
-0x30, 0xF0, 0x21, 0x6A, 0x93, 0xF2, 0x70, 0x9A,
-0x01, 0x4B, 0x93, 0xF2, 0x70, 0xDA, 0x00, 0x18,
-0x1C, 0x0A, 0x30, 0xF0, 0x21, 0x6C, 0x73, 0xF2,
-0x00, 0x4C, 0x00, 0x18, 0xF0, 0x09, 0x82, 0x67,
-0x00, 0x18, 0xDA, 0x0A, 0x05, 0x97, 0x03, 0x63,
-0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x04, 0xD0, 0x30, 0xF0, 0x21, 0x6A, 0x93, 0xF2,
-0x78, 0x9A, 0x01, 0x6C, 0x81, 0xC3, 0x93, 0xF2,
-0x98, 0x9A, 0x00, 0x18, 0xFA, 0x09, 0x30, 0xF0,
-0x21, 0x6A, 0x13, 0xF7, 0x11, 0xA2, 0x1A, 0x10,
-0x0C, 0x33, 0x69, 0xE2, 0x81, 0x9A, 0x60, 0xA4,
-0x04, 0x2B, 0xA4, 0xAA, 0x00, 0x18, 0x5A, 0x0F,
-0x02, 0x10, 0x00, 0x18, 0xF5, 0x0E, 0x30, 0xF0,
-0x21, 0x6A, 0x13, 0xF7, 0x10, 0x4A, 0x83, 0xA2,
-0x01, 0x48, 0x0E, 0xEC, 0x8B, 0xEB, 0x8D, 0xEB,
-0xC0, 0xF7, 0x63, 0x33, 0x6C, 0xE8, 0x62, 0xA2,
-0xFF, 0x4B, 0x62, 0xC2, 0x30, 0xF0, 0x21, 0x6A,
-0x13, 0xF7, 0x10, 0x4A, 0x62, 0xA2, 0xE0, 0x2B,
-0x30, 0xF0, 0x21, 0x6C, 0x01, 0xC2, 0x73, 0xF2,
-0x00, 0x4C, 0x00, 0x18, 0xF0, 0x09, 0x82, 0x67,
-0x00, 0x18, 0xDA, 0x0A, 0x05, 0x97, 0x04, 0x90,
-0x03, 0x63, 0x00, 0xEF, 0xFD, 0x63, 0x05, 0x62,
-0x00, 0x18, 0x46, 0x04, 0x05, 0x97, 0x03, 0x63,
-0x00, 0xEF, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6A,
-0xA0, 0xF1, 0x8C, 0xAA, 0x30, 0xF0, 0x21, 0x6A,
-0x14, 0xF1, 0x14, 0x4A, 0x01, 0x6B, 0x07, 0x10,
-0xA0, 0x9A, 0x04, 0x4A, 0x03, 0x2D, 0xFF, 0x6A,
-0x6C, 0xEA, 0x20, 0xE8, 0x01, 0x4B, 0x63, 0xEC,
-0xF7, 0x60, 0x00, 0x6A, 0x20, 0xE8, 0x00, 0x65,
-0x30, 0xF0, 0x21, 0x6A, 0x93, 0xF2, 0x9C, 0xDA,
-0x02, 0x6A, 0x41, 0xC4, 0x20, 0xE8, 0x00, 0x65,
-0x30, 0xF0, 0x21, 0x6A, 0x93, 0xF2, 0x78, 0x9A,
-0x00, 0x6A, 0x01, 0x23, 0x43, 0xA3, 0x20, 0xE8,
-0xFD, 0x63, 0x05, 0x62, 0x00, 0x18, 0x54, 0x10,
-0x05, 0x97, 0x30, 0xF0, 0x21, 0x6B, 0x93, 0xF2,
-0x54, 0xDB, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
-0x00, 0x18, 0xFF, 0x09, 0x22, 0x67, 0x11, 0x22,
-0x30, 0xF0, 0x21, 0x68, 0x93, 0xF2, 0xB8, 0x98,
-0x30, 0xF0, 0x21, 0x6C, 0x73, 0xF2, 0x00, 0x4C,
-0x00, 0x18, 0xE4, 0x09, 0x93, 0xF2, 0x58, 0x98,
-0x01, 0x6B, 0x91, 0x67, 0x61, 0xC2, 0x00, 0x18,
-0xDA, 0x0A, 0x07, 0x97, 0x06, 0x91, 0x05, 0x90,
-0x04, 0x63, 0x00, 0xEF, 0xFD, 0x63, 0x05, 0x62,
-0x04, 0xD0, 0xFF, 0xF7, 0x1F, 0x6A, 0xFF, 0x68,
-0x8C, 0xEA, 0xAC, 0xE8, 0x18, 0x22, 0xFF, 0xF7,
-0x1F, 0x72, 0x07, 0x60, 0x30, 0xF0, 0x21, 0x6B,
-0x93, 0xF2, 0x98, 0x9B, 0xA2, 0x67, 0x00, 0x18,
-0x08, 0x0A, 0x30, 0xF0, 0x21, 0x6A, 0x93, 0xF2,
-0x58, 0x9A, 0x30, 0xF0, 0x21, 0x6C, 0x73, 0xF2,
-0x00, 0x4C, 0x01, 0xC2, 0x00, 0x18, 0xF0, 0x09,
-0x82, 0x67, 0x00, 0x18, 0xDA, 0x0A, 0x05, 0x97,
-0x04, 0x90, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0xFD, 0x63, 0x05, 0x62, 0x30, 0xF0, 0x20, 0x6A,
+0xEF, 0xF3, 0x7C, 0x9A, 0x01, 0x6C, 0x81, 0xC3,
+0xEF, 0xF3, 0x9C, 0x9A, 0x00, 0x18, 0xAE, 0x0B,
+0x00, 0x18, 0x2B, 0x0C, 0x30, 0xF0, 0x20, 0x6A,
+0xEF, 0xF3, 0x74, 0x9A, 0x01, 0x4B, 0xEF, 0xF3,
+0x74, 0xDA, 0x00, 0x18, 0xD0, 0x0B, 0x30, 0xF0,
+0x20, 0x6C, 0xCF, 0xF3, 0x04, 0x4C, 0x00, 0x18,
+0xA4, 0x0B, 0x82, 0x67, 0x00, 0x18, 0x8D, 0x0C,
+0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x30, 0xF0,
+0x20, 0x6A, 0xEF, 0xF3, 0x7C, 0x9A, 0x01, 0x6C,
+0x81, 0xC3, 0xEF, 0xF3, 0x9C, 0x9A, 0x00, 0x18,
+0xAE, 0x0B, 0x30, 0xF0, 0x20, 0x6A, 0x2F, 0xF4,
+0x15, 0xA2, 0x1A, 0x10, 0x0C, 0x33, 0x69, 0xE2,
+0x81, 0x9A, 0x60, 0xA4, 0x04, 0x2B, 0xA4, 0xAA,
+0x00, 0x18, 0x69, 0x11, 0x02, 0x10, 0x00, 0x18,
+0x04, 0x11, 0x30, 0xF0, 0x20, 0x6A, 0x2F, 0xF4,
+0x14, 0x4A, 0x83, 0xA2, 0x01, 0x48, 0x0E, 0xEC,
+0x8B, 0xEB, 0x8D, 0xEB, 0xC0, 0xF7, 0x63, 0x33,
+0x6C, 0xE8, 0x62, 0xA2, 0xFF, 0x4B, 0x62, 0xC2,
+0x30, 0xF0, 0x20, 0x6A, 0x2F, 0xF4, 0x14, 0x4A,
+0x62, 0xA2, 0xE0, 0x2B, 0x30, 0xF0, 0x20, 0x6C,
+0x01, 0xC2, 0xCF, 0xF3, 0x04, 0x4C, 0x00, 0x18,
+0xA4, 0x0B, 0x82, 0x67, 0x00, 0x18, 0x8D, 0x0C,
+0x05, 0x97, 0x04, 0x90, 0x03, 0x63, 0x00, 0xEF,
+0xFD, 0x63, 0x05, 0x62, 0x00, 0x18, 0xC1, 0x04,
+0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF2, 0x8C, 0xAA,
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+0x0C, 0x10, 0x30, 0xF0, 0x20, 0x6C, 0xC1, 0xF0,
+0xF0, 0x9C, 0xEF, 0x6C, 0xFD, 0xE5, 0x00, 0xA7,
 0x0C, 0xEC, 0x80, 0xC7, 0x80, 0xA3, 0x40, 0x6F,
 0x4C, 0xEC, 0xED, 0xEC, 0x4C, 0xEC, 0x30, 0xF0,
-0x20, 0x6A, 0x41, 0xF2, 0x50, 0x9A, 0x80, 0xC3,
+0x20, 0x6A, 0xC1, 0xF0, 0x48, 0x9A, 0x80, 0xC3,
 0x80, 0xF4, 0xC0, 0x36, 0x55, 0xE5, 0x40, 0x9D,
 0x4D, 0xEE, 0xC0, 0xDD, 0x01, 0x90, 0x01, 0x63,
 0x20, 0xE8, 0x00, 0x65, 0xFF, 0xF7, 0x1F, 0x6A,
 0xAC, 0xEA, 0xFF, 0x6B, 0xA2, 0x67, 0x42, 0x32,
 0x6C, 0xED, 0x6C, 0xEA, 0x30, 0xF0, 0x20, 0x6B,
-0x41, 0xF2, 0x7C, 0x9B, 0x6D, 0xE4, 0xA0, 0xC3,
-0x30, 0xF0, 0x20, 0x6B, 0x61, 0xF2, 0x60, 0x9B,
+0xC1, 0xF0, 0x74, 0x9B, 0x6D, 0xE4, 0xA0, 0xC3,
+0x30, 0xF0, 0x20, 0x6B, 0xC1, 0xF0, 0x78, 0x9B,
 0x71, 0xE4, 0x40, 0xC4, 0x20, 0xE8, 0x00, 0x65,
 0xFB, 0x63, 0x09, 0x62, 0x08, 0xD1, 0x07, 0xD0,
 0x30, 0xF0, 0x20, 0x6B, 0xFF, 0xF7, 0x1F, 0x68,
-0x61, 0xF2, 0x64, 0x9B, 0x0C, 0xED, 0x04, 0xD5,
+0xC1, 0xF0, 0x7C, 0x9B, 0x0C, 0xED, 0x04, 0xD5,
 0x60, 0xA3, 0xFF, 0x6A, 0x24, 0x67, 0x4C, 0xE9,
-0x21, 0x23, 0x30, 0xF0, 0x20, 0x6B, 0x61, 0xF2,
-0x68, 0x9B, 0xFF, 0x6C, 0xA4, 0x67, 0x60, 0xA3,
+0x21, 0x23, 0x30, 0xF0, 0x20, 0x6B, 0x01, 0xF0,
+0x74, 0x9B, 0x00, 0x6C, 0xFF, 0x6D, 0x60, 0xA3,
 0x36, 0x6E, 0x6C, 0xEA, 0x05, 0xD2, 0x00, 0x18,
-0xF0, 0x2B, 0x00, 0x18, 0x4B, 0x30, 0x01, 0x72,
+0xF3, 0x2F, 0x00, 0x18, 0x9C, 0x34, 0x01, 0x72,
 0x0B, 0x61, 0x00, 0x6E, 0x91, 0x67, 0x01, 0x6D,
-0xE6, 0x67, 0x00, 0x18, 0x06, 0x2C, 0x04, 0x95,
-0x82, 0x67, 0x0C, 0xEC, 0x00, 0x18, 0x95, 0x18,
+0xE6, 0x67, 0x00, 0x18, 0x90, 0x4B, 0x04, 0x95,
+0x82, 0x67, 0x0C, 0xEC, 0x00, 0x18, 0x05, 0x1C,
 0x05, 0x95, 0x00, 0x6C, 0x37, 0x6E, 0x00, 0x18,
-0xF0, 0x2B, 0x0B, 0x10, 0x00, 0x6E, 0x91, 0x67,
-0x01, 0x6D, 0xE6, 0x67, 0x00, 0x18, 0x06, 0x2C,
+0xF3, 0x2F, 0x0B, 0x10, 0x00, 0x6E, 0x91, 0x67,
+0x01, 0x6D, 0xE6, 0x67, 0x00, 0x18, 0x90, 0x4B,
 0x04, 0x95, 0x82, 0x67, 0x0C, 0xEC, 0x00, 0x18,
-0x95, 0x18, 0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF2,
-0x48, 0x9A, 0x6F, 0x6D, 0x90, 0x6C, 0x40, 0xA2,
-0x38, 0x6E, 0x4C, 0xED, 0x00, 0x18, 0xF0, 0x2B,
-0x00, 0x18, 0x61, 0x1F, 0x09, 0x97, 0x08, 0x91,
+0x05, 0x1C, 0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF0,
+0x54, 0x9A, 0x6F, 0x6D, 0x90, 0x6C, 0x40, 0xA2,
+0x38, 0x6E, 0x4C, 0xED, 0x00, 0x18, 0xF3, 0x2F,
+0x00, 0x18, 0xC4, 0x22, 0x09, 0x97, 0x08, 0x91,
 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFB, 0x63, 0x09, 0x62, 0x08, 0xD1, 0x07, 0xD0,
-0x30, 0xF0, 0x20, 0x6B, 0x61, 0xF2, 0x64, 0x9B,
+0x30, 0xF0, 0x20, 0x6B, 0xC1, 0xF0, 0x7C, 0x9B,
 0xFF, 0x6A, 0x04, 0x67, 0x60, 0xA3, 0x25, 0x67,
 0x4C, 0xE8, 0x4C, 0xEB, 0x72, 0x33, 0x4C, 0xEB,
 0x4C, 0xE9, 0x24, 0x23, 0x30, 0xF0, 0x20, 0x6B,
-0x61, 0xF2, 0x68, 0x9B, 0xFF, 0x6C, 0xA4, 0x67,
+0x01, 0xF0, 0x74, 0x9B, 0x00, 0x6C, 0xFF, 0x6D,
 0x60, 0xA3, 0x29, 0x6E, 0x6C, 0xEA, 0x04, 0xD2,
-0x00, 0x18, 0xF0, 0x2B, 0x00, 0x18, 0x4B, 0x30,
+0x00, 0x18, 0xF3, 0x2F, 0x00, 0x18, 0x9C, 0x34,
 0x01, 0x72, 0x0E, 0x61, 0x30, 0xF0, 0x20, 0x6A,
-0xC5, 0xF7, 0x83, 0xA2, 0x01, 0x6D, 0x08, 0x6E,
-0x00, 0x6F, 0x00, 0x18, 0x06, 0x2C, 0xA2, 0x67,
-0x90, 0x67, 0xD1, 0x67, 0x00, 0x18, 0x77, 0x18,
+0x25, 0xF6, 0x8B, 0xA2, 0x01, 0x6D, 0x08, 0x6E,
+0x00, 0x6F, 0x00, 0x18, 0x90, 0x4B, 0xA2, 0x67,
+0x90, 0x67, 0xD1, 0x67, 0x00, 0x18, 0xE7, 0x1B,
 0x04, 0x95, 0x00, 0x6C, 0x2A, 0x6E, 0x00, 0x18,
-0xF0, 0x2B, 0x0E, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0xC5, 0xF7, 0x83, 0xA2, 0x01, 0x6D, 0x08, 0x6E,
-0x00, 0x6F, 0x00, 0x18, 0x06, 0x2C, 0xA2, 0x67,
-0x90, 0x67, 0xD1, 0x67, 0x00, 0x18, 0x77, 0x18,
-0x00, 0x18, 0x61, 0x1F, 0x09, 0x97, 0x08, 0x91,
+0xF3, 0x2F, 0x0E, 0x10, 0x30, 0xF0, 0x20, 0x6A,
+0x25, 0xF6, 0x8B, 0xA2, 0x01, 0x6D, 0x08, 0x6E,
+0x00, 0x6F, 0x00, 0x18, 0x90, 0x4B, 0xA2, 0x67,
+0x90, 0x67, 0xD1, 0x67, 0x00, 0x18, 0xE7, 0x1B,
+0x00, 0x18, 0xC4, 0x22, 0x09, 0x97, 0x08, 0x91,
 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFD, 0x63, 0x05, 0x62, 0x30, 0xF0, 0x20, 0x6A,
-0x30, 0xF0, 0x20, 0x6B, 0x61, 0xF2, 0x44, 0x9A,
-0x25, 0xF7, 0x10, 0x4B, 0xA0, 0xF0, 0xC3, 0xA3,
-0xA0, 0xA2, 0x10, 0x6A, 0xFF, 0x6C, 0xCC, 0xEA,
-0x8C, 0xEA, 0x8C, 0xED, 0x0C, 0x2A, 0xB2, 0x32,
-0x8C, 0xEA, 0x09, 0x2A, 0x80, 0xF0, 0x91, 0xA3,
+0xC1, 0xF0, 0x5C, 0x9A, 0xFF, 0x6B, 0x40, 0xA2,
+0x6C, 0xEA, 0x52, 0x32, 0x6C, 0xEA, 0x0B, 0x2A,
+0x30, 0xF0, 0x20, 0x6A, 0x25, 0xF6, 0x89, 0xA2,
 0x00, 0x6D, 0x18, 0x6E, 0xE5, 0x67, 0x00, 0x18,
-0x06, 0x2C, 0x00, 0x18, 0x61, 0x1F, 0x05, 0x97,
+0x90, 0x4B, 0x00, 0x18, 0xC4, 0x22, 0x05, 0x97,
 0x03, 0x63, 0x00, 0xEF, 0xFD, 0x63, 0x05, 0x62,
 0x04, 0xD0, 0x30, 0xF0, 0x20, 0x6E, 0x64, 0x67,
-0x85, 0x67, 0x30, 0xF0, 0x20, 0x6D, 0x61, 0xF2,
-0xAC, 0x9D, 0x61, 0xF2, 0xD0, 0x9E, 0x30, 0xF0,
+0x85, 0x67, 0x30, 0xF0, 0x20, 0x6D, 0xE1, 0xF0,
+0xA0, 0x9D, 0xE1, 0xF0, 0xC4, 0x9E, 0x30, 0xF0,
 0x20, 0x68, 0xE0, 0xAD, 0xC0, 0xAE, 0xFF, 0xF7,
-0x1F, 0x6D, 0xAC, 0xEF, 0x25, 0xF7, 0x10, 0x48,
+0x1F, 0x6D, 0xAC, 0xEF, 0x85, 0xF5, 0x18, 0x48,
 0xCC, 0xED, 0xBB, 0xE7, 0x80, 0xF0, 0xB2, 0xA0,
 0xFF, 0x6A, 0x4C, 0xEE, 0xAE, 0xEE, 0x4C, 0xEB,
-0x4C, 0xEC, 0x29, 0x2E, 0x62, 0xF7, 0x4F, 0xA0,
+0x4C, 0xEC, 0x29, 0x2E, 0x62, 0xF7, 0x5B, 0xA0,
 0x0E, 0x72, 0x10, 0x61, 0x24, 0x2B, 0x62, 0xF7,
-0x6D, 0xA0, 0x03, 0x6A, 0x4B, 0xEA, 0x6C, 0xEA,
-0x00, 0x6D, 0x62, 0xF7, 0x4D, 0xC0, 0x00, 0x18,
-0xC9, 0x17, 0x01, 0x6C, 0x0C, 0x6D, 0x00, 0x18,
-0x97, 0x11, 0x10, 0x10, 0x06, 0x72, 0x13, 0x61,
-0x12, 0x23, 0x62, 0xF7, 0x6D, 0xA0, 0x02, 0x6A,
+0x79, 0xA0, 0x03, 0x6A, 0x4B, 0xEA, 0x6C, 0xEA,
+0x00, 0x6D, 0x62, 0xF7, 0x59, 0xC0, 0x00, 0x18,
+0xF8, 0x1A, 0x01, 0x6C, 0x0C, 0x6D, 0x00, 0x18,
+0x1B, 0x13, 0x10, 0x10, 0x06, 0x72, 0x13, 0x61,
+0x12, 0x23, 0x62, 0xF7, 0x79, 0xA0, 0x02, 0x6A,
 0x4B, 0xEA, 0x6C, 0xEA, 0x01, 0x6D, 0x62, 0xF7,
-0x4D, 0xC0, 0x00, 0x18, 0xC9, 0x17, 0x04, 0x6A,
-0x62, 0xF7, 0x4F, 0xC0, 0x00, 0x6D, 0xFF, 0x6C,
-0xC5, 0x67, 0x00, 0x18, 0xF0, 0x2B, 0x05, 0x97,
+0x59, 0xC0, 0x00, 0x18, 0xF8, 0x1A, 0x04, 0x6A,
+0x62, 0xF7, 0x5B, 0xC0, 0x00, 0x6D, 0xFF, 0x6C,
+0xC5, 0x67, 0x00, 0x18, 0xF3, 0x2F, 0x05, 0x97,
 0x04, 0x90, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xF9, 0x63, 0x0D, 0x62, 0x0C, 0xD1, 0x0B, 0xD0,
 0x30, 0xF0, 0x20, 0x6B, 0xFF, 0xF7, 0x1F, 0x69,
-0x8C, 0xE9, 0xE5, 0xF7, 0x8A, 0xA3, 0x01, 0x6B,
+0x8C, 0xE9, 0x65, 0xF6, 0x81, 0xA3, 0x01, 0x6B,
 0xFF, 0x6A, 0x8C, 0xEB, 0x4C, 0xED, 0x4C, 0xEE,
 0x4C, 0xEF, 0x4C, 0xEB, 0x05, 0xD5, 0x07, 0xD6,
 0x06, 0xD7, 0x0B, 0x23, 0x30, 0xF0, 0x20, 0x6B,
-0x61, 0xF2, 0x74, 0x9B, 0x00, 0x6A, 0x40, 0xC3,
-0x30, 0xF0, 0x20, 0x6B, 0x61, 0xF2, 0x78, 0x9B,
-0x40, 0xC3, 0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF2,
-0x44, 0x9A, 0xFF, 0x68, 0x40, 0xA2, 0x0C, 0xEA,
+0xE1, 0xF0, 0x68, 0x9B, 0x00, 0x6A, 0x40, 0xC3,
+0x30, 0xF0, 0x20, 0x6B, 0xE1, 0xF0, 0x6C, 0x9B,
+0x40, 0xC3, 0x30, 0xF0, 0x20, 0x6A, 0xC1, 0xF0,
+0x5C, 0x9A, 0xFF, 0x68, 0x40, 0xA2, 0x0C, 0xEA,
 0x52, 0x32, 0x0C, 0xEA, 0x04, 0xD2, 0x3F, 0x22,
-0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF2, 0x48, 0x9A,
-0x90, 0x67, 0xB0, 0x67, 0x40, 0xA2, 0x26, 0x6E,
+0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF0, 0x54, 0x9A,
+0x00, 0x6C, 0xB0, 0x67, 0x40, 0xA2, 0x26, 0x6E,
 0x62, 0x67, 0x0C, 0xEB, 0x08, 0xD3, 0x00, 0x18,
-0xF0, 0x2B, 0x00, 0x18, 0x4B, 0x30, 0x01, 0x72,
+0xF3, 0x2F, 0x00, 0x18, 0x9C, 0x34, 0x01, 0x72,
 0x78, 0x67, 0x04, 0xD3, 0x22, 0x2B, 0x07, 0x96,
 0x91, 0x67, 0x01, 0x6D, 0x00, 0x6F, 0x00, 0x18,
-0x06, 0x2C, 0x05, 0x94, 0x06, 0x96, 0xA2, 0x67,
-0x22, 0x67, 0x00, 0x18, 0x77, 0x18, 0x30, 0xF0,
-0x20, 0x6A, 0x28, 0xF6, 0x7C, 0xA2, 0x01, 0x6A,
+0x90, 0x4B, 0x05, 0x94, 0x06, 0x96, 0xA2, 0x67,
+0x22, 0x67, 0x00, 0x18, 0xE7, 0x1B, 0x30, 0xF0,
+0x20, 0x6A, 0xA8, 0xF4, 0x6C, 0xA2, 0x01, 0x6A,
 0x6C, 0xEA, 0x0C, 0xEA, 0x0B, 0x22, 0x30, 0xF0,
-0x20, 0x6A, 0x61, 0xF2, 0x5C, 0x9A, 0x45, 0xE1,
+0x20, 0x6A, 0xE1, 0xF0, 0x50, 0x9A, 0x45, 0xE1,
 0x5D, 0x67, 0x67, 0x42, 0x09, 0x4B, 0x40, 0xA3,
 0x40, 0xC1, 0x03, 0x10, 0x91, 0x67, 0x00, 0x18,
-0x4B, 0x18, 0x08, 0x95, 0x00, 0x6C, 0x27, 0x6E,
-0x00, 0x18, 0xF0, 0x2B, 0x05, 0x94, 0x06, 0x95,
-0x00, 0x18, 0xFF, 0x18, 0x26, 0x10, 0x05, 0x94,
-0x06, 0x95, 0x00, 0x18, 0xFF, 0x18, 0x07, 0x96,
+0xBB, 0x1B, 0x08, 0x95, 0x00, 0x6C, 0x27, 0x6E,
+0x00, 0x18, 0xF3, 0x2F, 0x05, 0x94, 0x06, 0x95,
+0x00, 0x18, 0x6B, 0x1C, 0x26, 0x10, 0x05, 0x94,
+0x06, 0x95, 0x00, 0x18, 0x6B, 0x1C, 0x07, 0x96,
 0x91, 0x67, 0x01, 0x6D, 0x00, 0x6F, 0x00, 0x18,
-0x06, 0x2C, 0x05, 0x94, 0x06, 0x96, 0xA2, 0x67,
-0x22, 0x67, 0x00, 0x18, 0x77, 0x18, 0x30, 0xF0,
-0x20, 0x6A, 0x28, 0xF6, 0x7C, 0xA2, 0x01, 0x6A,
+0x90, 0x4B, 0x05, 0x94, 0x06, 0x96, 0xA2, 0x67,
+0x22, 0x67, 0x00, 0x18, 0xE7, 0x1B, 0x30, 0xF0,
+0x20, 0x6A, 0xA8, 0xF4, 0x6C, 0xA2, 0x01, 0x6A,
 0x6C, 0xEA, 0x0C, 0xEA, 0x0B, 0x22, 0x30, 0xF0,
-0x20, 0x6A, 0x61, 0xF2, 0x5C, 0x9A, 0x7D, 0x67,
+0x20, 0x6A, 0xE1, 0xF0, 0x50, 0x9A, 0x7D, 0x67,
 0x45, 0xE1, 0x47, 0x43, 0x09, 0x4A, 0x60, 0xA2,
 0x60, 0xC1, 0x03, 0x10, 0x91, 0x67, 0x00, 0x18,
-0x4B, 0x18, 0x00, 0x18, 0x61, 0x1F, 0x0D, 0x97,
+0xBB, 0x1B, 0x00, 0x18, 0xC4, 0x22, 0x0D, 0x97,
 0x0C, 0x91, 0x0B, 0x90, 0x07, 0x63, 0x00, 0xEF,
-0x30, 0xF0, 0x20, 0x6A, 0x25, 0xF7, 0x10, 0x4A,
-0x00, 0x6B, 0x62, 0xF0, 0x75, 0xC2, 0x62, 0xF0,
-0x76, 0xC2, 0x62, 0xF0, 0x74, 0xC2, 0x00, 0x6B,
-0x62, 0xF0, 0x72, 0xCA, 0x20, 0xE8, 0x00, 0x65,
-0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF2, 0x40, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5, 0x18, 0x4A,
+0x00, 0x6B, 0x82, 0xF0, 0x6B, 0xC2, 0x82, 0xF0,
+0x6C, 0xC2, 0x82, 0xF0, 0x6A, 0xC2, 0x00, 0x6B,
+0x82, 0xF0, 0x68, 0xCA, 0x20, 0xE8, 0x00, 0x65,
+0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF0, 0x54, 0x9A,
 0xFF, 0x6B, 0x80, 0xA2, 0x00, 0xF6, 0x80, 0x34,
 0x00, 0xF6, 0x83, 0x34, 0x00, 0x54, 0x24, 0x60,
 0xA0, 0xA2, 0x7F, 0x6C, 0xAC, 0xEC, 0x80, 0xC2,
 0x80, 0xA2, 0x40, 0x6D, 0x6C, 0xEC, 0xAD, 0xEC,
 0x6C, 0xEC, 0x80, 0xC2, 0x80, 0xA2, 0x30, 0xF0,
-0x20, 0x6C, 0x81, 0xF1, 0x80, 0x9C, 0x3F, 0x6D,
-0x80, 0xA4, 0x30, 0xF0, 0x20, 0x6C, 0x81, 0xF1,
-0x84, 0x9C, 0x80, 0xA4, 0x30, 0xF0, 0x20, 0x6C,
-0x81, 0xF2, 0x84, 0x9C, 0x80, 0xA4, 0x80, 0xA2,
+0x20, 0x6C, 0xE0, 0xF7, 0x8C, 0x9C, 0x3F, 0x6D,
+0x80, 0xA4, 0x30, 0xF0, 0x20, 0x6C, 0xE0, 0xF7,
+0x90, 0x9C, 0x80, 0xA4, 0x30, 0xF0, 0x20, 0x6C,
+0xE1, 0xF0, 0x98, 0x9C, 0x80, 0xA4, 0x80, 0xA2,
 0x6C, 0xEC, 0xAD, 0xEC, 0x6C, 0xEC, 0x80, 0xC2,
 0x80, 0xA2, 0xBF, 0x6B, 0x8C, 0xEB, 0x60, 0xC2,
 0x20, 0xE8, 0x00, 0x65, 0xFB, 0x63, 0x09, 0x62,
@@ -14364,11 +15399,11 @@ u8 array_mp_8822b_fw_nic[] = {
 0x4C, 0xEF, 0x2C, 0xEB, 0x00, 0x6A, 0x0B, 0xD5,
 0x0C, 0xD6, 0x04, 0xD7, 0x40, 0xC8, 0x00, 0x6A,
 0x07, 0x23, 0x25, 0x10, 0x0A, 0x6C, 0x00, 0x18,
-0xF8, 0x1B, 0x40, 0xA8, 0x01, 0x4A, 0x40, 0xC8,
+0x38, 0x1F, 0x40, 0xA8, 0x01, 0x4A, 0x40, 0xC8,
 0x1F, 0xF7, 0x00, 0x6A, 0x2C, 0xEA, 0x02, 0xF0,
 0x00, 0x72, 0x01, 0x60, 0x05, 0x2A, 0x30, 0xF0,
-0x20, 0x6A, 0x41, 0xF1, 0x40, 0x9A, 0x04, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1, 0x44, 0x9A,
+0x20, 0x6A, 0xE1, 0xF0, 0x5C, 0x9A, 0x04, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF1, 0x40, 0x9A,
 0x49, 0xE1, 0x0B, 0x93, 0x40, 0x9A, 0x6C, 0xEA,
 0x0C, 0x93, 0x6E, 0xEA, 0x04, 0x22, 0x40, 0xA8,
 0x04, 0x93, 0x63, 0xEA, 0xDF, 0x61, 0x40, 0xA8,
@@ -14376,54 +15411,62 @@ u8 array_mp_8822b_fw_nic[] = {
 0x08, 0x91, 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF,
 0xFF, 0x6A, 0xA0, 0x35, 0x4C, 0xEC, 0xA0, 0x35,
 0xCC, 0xEA, 0x4D, 0xED, 0x05, 0x2C, 0x30, 0xF0,
-0x20, 0x6A, 0x81, 0xF2, 0x48, 0x9A, 0x04, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF2, 0x4C, 0x9A,
-0x30, 0xF0, 0x20, 0x6B, 0x81, 0xF2, 0x90, 0x9B,
-0x30, 0xF0, 0x20, 0x6B, 0x81, 0xF2, 0x74, 0x9B,
+0x20, 0x6A, 0x41, 0xF0, 0x44, 0x9A, 0x04, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF1, 0x44, 0x9A,
+0x30, 0xF0, 0x20, 0x6B, 0x01, 0xF1, 0x88, 0x9B,
+0x30, 0xF0, 0x20, 0x6B, 0x01, 0xF1, 0x6C, 0x9B,
 0xAD, 0xEA, 0x40, 0xDC, 0x4C, 0xEB, 0x30, 0xF0,
-0x20, 0x6A, 0x81, 0xF2, 0x58, 0x9A, 0x60, 0xDC,
+0x20, 0x6A, 0x01, 0xF1, 0x50, 0x9A, 0x60, 0xDC,
 0x00, 0x6B, 0x60, 0xC2, 0x20, 0xE8, 0x00, 0x65,
 0xFF, 0x6A, 0xFF, 0xF7, 0x1F, 0x6B, 0x8C, 0xEA,
 0xAC, 0xEB, 0x05, 0x22, 0x30, 0xF0, 0x20, 0x6A,
-0x61, 0xF1, 0x58, 0x9A, 0x04, 0x10, 0x30, 0xF0,
-0x20, 0x6A, 0x21, 0xF2, 0x48, 0x9A, 0x60, 0x33,
+0xE0, 0xF7, 0x44, 0x9A, 0x04, 0x10, 0x30, 0xF0,
+0x20, 0x6A, 0xA1, 0xF0, 0x40, 0x9A, 0x60, 0x33,
 0x60, 0x33, 0x4D, 0xEB, 0x30, 0xF0, 0x20, 0x6A,
-0x81, 0xF2, 0x50, 0x9A, 0x00, 0x6C, 0x60, 0xDA,
-0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF2, 0x5C, 0x9A,
-0x30, 0xF0, 0x20, 0x6B, 0x81, 0xF2, 0x78, 0x9B,
+0x01, 0xF1, 0x48, 0x9A, 0x00, 0x6C, 0x60, 0xDA,
+0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF1, 0x54, 0x9A,
+0x30, 0xF0, 0x20, 0x6B, 0x01, 0xF1, 0x70, 0x9B,
 0x40, 0xA2, 0x80, 0xC3, 0xFF, 0x6B, 0x6C, 0xEA,
 0x20, 0xE8, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6B,
-0xA1, 0xF2, 0x60, 0x9B, 0xFF, 0x6A, 0xCC, 0xEA,
+0x01, 0xF1, 0x78, 0x9B, 0xFF, 0x6A, 0xCC, 0xEA,
 0x6D, 0xEA, 0xE0, 0xF1, 0x1F, 0x6B, 0xAC, 0xEB,
-0x30, 0xF0, 0x20, 0x6C, 0x81, 0xF2, 0x90, 0x9C,
+0x30, 0xF0, 0x20, 0x6C, 0x01, 0xF1, 0x88, 0x9C,
 0x60, 0x33, 0x60, 0x33, 0x6D, 0xEA, 0x40, 0xDC,
-0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF1, 0x50, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0xC0, 0xF7, 0x5C, 0x9A,
 0x6D, 0xEA, 0x40, 0xDC, 0x20, 0xE8, 0x00, 0x65,
 0xE0, 0xF1, 0x1F, 0x6A, 0x30, 0xF0, 0x20, 0x6B,
-0x61, 0xF1, 0x70, 0x9B, 0xAC, 0xEA, 0x40, 0x32,
+0xC0, 0xF7, 0x7C, 0x9B, 0xAC, 0xEA, 0x40, 0x32,
 0x40, 0x32, 0x6D, 0xEA, 0x30, 0xF0, 0x20, 0x6B,
-0x81, 0xF2, 0x70, 0x9B, 0x40, 0xDB, 0x30, 0xF0,
-0x20, 0x6A, 0x81, 0xF2, 0x5C, 0x9A, 0xFF, 0x6B,
+0x01, 0xF1, 0x68, 0x9B, 0x40, 0xDB, 0x30, 0xF0,
+0x20, 0x6A, 0x01, 0xF1, 0x54, 0x9A, 0xFF, 0x6B,
 0x40, 0xA2, 0x6C, 0xEA, 0x20, 0xE8, 0x00, 0x65,
-0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF2, 0x44, 0x9A,
+0x30, 0xF0, 0x20, 0x6B, 0x01, 0xF1, 0xDC, 0x9B,
+0xFF, 0x6A, 0x04, 0x6D, 0x60, 0xA6, 0x4C, 0xEC,
+0x4C, 0xEB, 0xAD, 0xEB, 0x4C, 0xEB, 0x60, 0xC6,
+0x0A, 0x24, 0x30, 0xF0, 0x20, 0x6B, 0x21, 0xF1,
+0x80, 0x9B, 0x60, 0xA4, 0x4C, 0xEB, 0xAD, 0xEB,
+0x4C, 0xEB, 0x60, 0xC4, 0x20, 0xE8, 0x30, 0xF0,
+0x20, 0x6A, 0x21, 0xF1, 0x60, 0x9A, 0xFB, 0x6A,
+0x80, 0xA3, 0x8C, 0xEA, 0x40, 0xC3, 0x20, 0xE8,
+0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF1, 0x44, 0x9A,
 0x40, 0xAA, 0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6A,
-0xA1, 0xF2, 0x44, 0x9A, 0x40, 0xAA, 0x20, 0xE8,
+0x21, 0xF1, 0x44, 0x9A, 0x40, 0xAA, 0x20, 0xE8,
 0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x04, 0xF7,
 0x10, 0x68, 0x10, 0x10, 0x05, 0x6C, 0xFF, 0x48,
-0x00, 0x18, 0xF8, 0x1B, 0x0B, 0x28, 0x30, 0xF0,
-0x20, 0x6A, 0xA1, 0xF2, 0x68, 0x9A, 0x08, 0xF0,
+0x00, 0x18, 0x38, 0x1F, 0x0B, 0x28, 0x30, 0xF0,
+0x20, 0x6A, 0x21, 0xF1, 0x68, 0x9A, 0x08, 0xF0,
 0x00, 0x6C, 0x40, 0x9B, 0x8D, 0xEA, 0x40, 0xDB,
 0x00, 0x6A, 0x09, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0xA1, 0xF2, 0x44, 0x9A, 0x60, 0xAA, 0x3F, 0x6A,
+0x21, 0xF1, 0x44, 0x9A, 0x60, 0xAA, 0x3F, 0x6A,
 0x6C, 0xEA, 0xE8, 0x2A, 0x01, 0x6A, 0x05, 0x97,
 0x04, 0x90, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
 0x01, 0x68, 0x04, 0xEC, 0x82, 0xF3, 0x08, 0x69,
 0x10, 0x10, 0x01, 0x6C, 0xFF, 0x49, 0x00, 0x18,
-0xF8, 0x1B, 0x0B, 0x29, 0x30, 0xF0, 0x20, 0x6A,
-0xA1, 0xF2, 0x68, 0x9A, 0x08, 0xF0, 0x00, 0x6C,
+0x38, 0x1F, 0x0B, 0x29, 0x30, 0xF0, 0x20, 0x6A,
+0x21, 0xF1, 0x68, 0x9A, 0x08, 0xF0, 0x00, 0x6C,
 0x40, 0x9B, 0x8D, 0xEA, 0x40, 0xDB, 0x00, 0x6A,
-0x0B, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF2,
+0x0B, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF1,
 0x44, 0x9A, 0x60, 0xAA, 0xFF, 0xF7, 0x1F, 0x6A,
 0x6C, 0xEA, 0x0C, 0xEA, 0xE6, 0x2A, 0x01, 0x6A,
 0x07, 0x97, 0x06, 0x91, 0x05, 0x90, 0x04, 0x63,
@@ -14432,186 +15475,156 @@ u8 array_mp_8822b_fw_nic[] = {
 0x0F, 0x91, 0x04, 0xD2, 0x04, 0x93, 0xFF, 0x6A,
 0x4C, 0xE8, 0x4C, 0xEB, 0x90, 0x67, 0x0B, 0xD5,
 0x0C, 0xD6, 0x0D, 0xD7, 0x04, 0xD3, 0x4C, 0xE9,
-0x00, 0x18, 0x08, 0x1A, 0x80, 0xF0, 0x07, 0x22,
+0x00, 0x18, 0x84, 0x1D, 0x80, 0xF0, 0x07, 0x22,
 0x06, 0x58, 0x80, 0xF0, 0x04, 0x60, 0x30, 0xF0,
-0x20, 0x6A, 0x08, 0x30, 0xA0, 0xF2, 0x08, 0x4A,
+0x20, 0x6A, 0x08, 0x30, 0x20, 0xF3, 0x10, 0x4A,
 0x09, 0xE2, 0x40, 0x9A, 0x00, 0xEA, 0x02, 0xF2,
 0x10, 0x6A, 0x0E, 0x10, 0x02, 0xF2, 0x00, 0x6A,
 0x0B, 0x10, 0x22, 0xF2, 0x00, 0x6A, 0x08, 0x10,
 0x22, 0xF2, 0x10, 0x6A, 0x05, 0x10, 0x42, 0xF2,
 0x00, 0x6A, 0x02, 0x10, 0x42, 0xF2, 0x10, 0x6A,
-0x30, 0xF0, 0x20, 0x6B, 0x0D, 0x94, 0xA1, 0xF2,
+0x30, 0xF0, 0x20, 0x6B, 0x0D, 0x94, 0x21, 0xF1,
 0x6C, 0x9B, 0x8C, 0xEB, 0x30, 0xF0, 0x20, 0x6C,
-0x21, 0xF1, 0x94, 0x9C, 0x8D, 0xEB, 0x06, 0x21,
-0x30, 0xF0, 0x20, 0x6C, 0xA1, 0xF2, 0x90, 0x9C,
+0xA0, 0xF7, 0x88, 0x9C, 0x8D, 0xEB, 0x06, 0x21,
+0x30, 0xF0, 0x20, 0x6C, 0x21, 0xF1, 0x90, 0x9C,
 0x6D, 0xEC, 0x05, 0x10, 0x30, 0xF0, 0x20, 0x6C,
-0xA1, 0xF2, 0x94, 0x9C, 0x6C, 0xEC, 0x04, 0x96,
-0x06, 0x26, 0x30, 0xF0, 0x20, 0x6B, 0x61, 0xF1,
-0x70, 0x9B, 0x8D, 0xEB, 0x05, 0x10, 0x30, 0xF0,
-0x20, 0x6B, 0xA1, 0xF2, 0x78, 0x9B, 0x8C, 0xEB,
+0x21, 0xF1, 0x94, 0x9C, 0x6C, 0xEC, 0x04, 0x96,
+0x06, 0x26, 0x30, 0xF0, 0x20, 0x6B, 0xC0, 0xF7,
+0x7C, 0x9B, 0x8D, 0xEB, 0x05, 0x10, 0x30, 0xF0,
+0x20, 0x6B, 0x21, 0xF1, 0x78, 0x9B, 0x8C, 0xEB,
 0x1F, 0xF7, 0x00, 0x6C, 0x4C, 0xEC, 0x02, 0xF0,
 0x00, 0x74, 0x01, 0x60, 0x05, 0x2C, 0x30, 0xF0,
-0x20, 0x6C, 0x41, 0xF1, 0xA0, 0x9C, 0x04, 0x10,
-0x30, 0xF0, 0x20, 0x6C, 0x41, 0xF1, 0xA4, 0x9C,
-0x30, 0xF0, 0x20, 0x6C, 0x0B, 0x96, 0xA1, 0xF2,
+0x20, 0x6C, 0xE1, 0xF0, 0xBC, 0x9C, 0x04, 0x10,
+0x30, 0xF0, 0x20, 0x6C, 0x01, 0xF1, 0xA0, 0x9C,
+0x30, 0xF0, 0x20, 0x6C, 0x0B, 0x96, 0x21, 0xF1,
 0x9C, 0x9C, 0xB5, 0xE2, 0xCC, 0xEC, 0x80, 0xDD,
 0x84, 0x42, 0x1F, 0xF7, 0x00, 0x6D, 0xAC, 0xEC,
 0x02, 0xF0, 0x00, 0x74, 0x01, 0x60, 0x05, 0x2C,
-0x30, 0xF0, 0x20, 0x6C, 0xC1, 0xF2, 0xA0, 0x9C,
-0x04, 0x10, 0x30, 0xF0, 0x20, 0x6C, 0xC1, 0xF2,
+0x30, 0xF0, 0x20, 0x6C, 0x41, 0xF1, 0xA0, 0x9C,
+0x04, 0x10, 0x30, 0xF0, 0x20, 0x6C, 0x41, 0xF1,
 0xA4, 0x9C, 0x30, 0xF0, 0x20, 0x6C, 0x0C, 0x96,
-0xA1, 0xF2, 0x9C, 0x9C, 0xB5, 0xE2, 0xCC, 0xEC,
+0x21, 0xF1, 0x9C, 0x9C, 0xB5, 0xE2, 0xCC, 0xEC,
 0x80, 0xDD, 0x87, 0x42, 0x01, 0x4C, 0x1F, 0xF7,
 0x00, 0x6D, 0xAC, 0xEC, 0x02, 0xF0, 0x00, 0x74,
 0x01, 0x60, 0x05, 0x2C, 0x30, 0xF0, 0x20, 0x6C,
-0xC1, 0xF2, 0x88, 0x9C, 0x04, 0x10, 0x30, 0xF0,
-0x20, 0x6C, 0xC1, 0xF2, 0x8C, 0x9C, 0x89, 0xE2,
+0x41, 0xF1, 0x88, 0x9C, 0x04, 0x10, 0x30, 0xF0,
+0x20, 0x6C, 0x41, 0xF1, 0x8C, 0x9C, 0x89, 0xE2,
 0x60, 0xDA, 0x01, 0x6A, 0x01, 0x10, 0x00, 0x6A,
 0x09, 0x97, 0x08, 0x91, 0x07, 0x90, 0x05, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
 0x04, 0xD0, 0x00, 0x68, 0x01, 0x6A, 0x30, 0xF0,
-0x20, 0x6B, 0x01, 0xF1, 0x6C, 0x9B, 0x4E, 0xE8,
-0x10, 0xF0, 0x20, 0x6A, 0xAD, 0xF1, 0x1D, 0x4A,
-0x09, 0xE2, 0x40, 0xDB, 0x00, 0x18, 0xE3, 0x0B,
-0x00, 0x18, 0x7A, 0x19, 0x00, 0x18, 0xE2, 0x0B,
-0x00, 0x18, 0xE3, 0x0B, 0x30, 0xF0, 0x20, 0x6A,
-0x25, 0xF7, 0x10, 0x4A, 0x80, 0xF0, 0x8C, 0x9A,
+0x20, 0x6B, 0x60, 0xF7, 0x7C, 0x9B, 0x4E, 0xE8,
+0x10, 0xF0, 0x20, 0x6A, 0xAE, 0xF7, 0x0D, 0x4A,
+0x09, 0xE2, 0x40, 0xDB, 0x00, 0x18, 0x9A, 0x0D,
+0x00, 0x18, 0xE6, 0x1C, 0x00, 0x18, 0x99, 0x0D,
+0x00, 0x18, 0x9A, 0x0D, 0x30, 0xF0, 0x20, 0x6A,
+0x85, 0xF5, 0x18, 0x4A, 0x80, 0xF0, 0x8C, 0x9A,
 0x02, 0x6B, 0x8C, 0xEB, 0x09, 0x23, 0x03, 0x6B,
 0x6B, 0xEB, 0x8C, 0xEB, 0x80, 0xF0, 0x6C, 0xDA,
-0x00, 0x18, 0xE9, 0x21, 0x00, 0x18, 0x3F, 0x22,
-0x00, 0x18, 0xE2, 0x0B, 0x00, 0x18, 0xE3, 0x0B,
-0x30, 0xF0, 0x20, 0x6A, 0x25, 0xF7, 0x10, 0x4A,
+0x00, 0x18, 0x82, 0x25, 0x00, 0x18, 0xD8, 0x25,
+0x00, 0x18, 0x99, 0x0D, 0x00, 0x18, 0x9A, 0x0D,
+0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5, 0x18, 0x4A,
 0x80, 0xF0, 0x8C, 0x9A, 0x04, 0x6B, 0x8C, 0xEB,
 0x09, 0x23, 0x05, 0x6B, 0x6B, 0xEB, 0x8C, 0xEB,
-0x80, 0xF0, 0x6C, 0xDA, 0x00, 0x18, 0x45, 0x1F,
-0x00, 0x18, 0x00, 0x1F, 0x00, 0x18, 0xE2, 0x0B,
-0x00, 0x18, 0xE3, 0x0B, 0x30, 0xF0, 0x20, 0x6A,
-0x25, 0xF7, 0x10, 0x4A, 0x80, 0xF0, 0x9E, 0xA2,
+0x80, 0xF0, 0x6C, 0xDA, 0x00, 0x18, 0xA8, 0x22,
+0x00, 0x18, 0x5E, 0x22, 0x00, 0x18, 0x99, 0x0D,
+0x00, 0x18, 0x9A, 0x0D, 0x30, 0xF0, 0x20, 0x6A,
+0x85, 0xF5, 0x18, 0x4A, 0x80, 0xF0, 0x9F, 0xA2,
 0x7F, 0x6B, 0x8C, 0xEB, 0x0D, 0x23, 0xA0, 0xF0,
-0x82, 0xA2, 0x62, 0xF7, 0x6F, 0xA2, 0x8E, 0xEB,
-0x07, 0x23, 0xA0, 0xF0, 0x81, 0xA2, 0xFF, 0x6A,
-0x96, 0x34, 0x4C, 0xEC, 0x00, 0x18, 0x5D, 0x15,
-0x30, 0xF0, 0x20, 0x6A, 0xA5, 0xF7, 0x5C, 0x9A,
-0x02, 0x2A, 0x00, 0x18, 0xB1, 0x13, 0x00, 0x18,
-0xE2, 0x0B, 0x00, 0x18, 0xE3, 0x0B, 0x30, 0xF0,
-0x20, 0x6A, 0x25, 0xF7, 0x10, 0x4A, 0x80, 0xF0,
+0x83, 0xA2, 0x62, 0xF7, 0x7B, 0xA2, 0x8E, 0xEB,
+0x07, 0x23, 0xA0, 0xF0, 0x82, 0xA2, 0xFF, 0x6A,
+0x96, 0x34, 0x4C, 0xEC, 0x00, 0x18, 0xC4, 0x17,
+0x30, 0xF0, 0x20, 0x6A, 0x25, 0xF6, 0x44, 0x9A,
+0x02, 0x2A, 0x00, 0x18, 0x60, 0x15, 0x00, 0x18,
+0x99, 0x0D, 0x00, 0x18, 0x9A, 0x0D, 0x30, 0xF0,
+0x20, 0x6A, 0x85, 0xF5, 0x18, 0x4A, 0x80, 0xF0,
 0x8C, 0x9A, 0x10, 0x6B, 0x8C, 0xEB, 0x07, 0x23,
 0x11, 0x6B, 0x6B, 0xEB, 0x8C, 0xEB, 0x80, 0xF0,
-0x6C, 0xDA, 0x00, 0x18, 0x43, 0x5E, 0x00, 0x18,
-0xE2, 0x0B, 0x00, 0x18, 0xE3, 0x0B, 0x30, 0xF0,
-0x20, 0x6A, 0x25, 0xF7, 0x10, 0x4A, 0x80, 0xF0,
-0x8C, 0x9A, 0xFF, 0x6B, 0x01, 0x4B, 0x8C, 0xEB,
-0x08, 0x23, 0xFF, 0x6B, 0x02, 0x4B, 0x6B, 0xEB,
+0x6C, 0xDA, 0x00, 0x18, 0xA3, 0x66, 0x00, 0x18,
+0x99, 0x0D, 0x00, 0x18, 0x9A, 0x0D, 0x30, 0xF0,
+0x20, 0x6A, 0x85, 0xF5, 0x18, 0x4A, 0x80, 0xF0,
+0x8C, 0x9A, 0x02, 0xF0, 0x00, 0x6B, 0x8C, 0xEB,
+0x08, 0x23, 0x02, 0xF0, 0x01, 0x6B, 0x6B, 0xEB,
 0x8C, 0xEB, 0x80, 0xF0, 0x6C, 0xDA, 0x00, 0x18,
-0xA9, 0x1D, 0x00, 0x18, 0xE2, 0x0B, 0x00, 0x18,
-0xE3, 0x0B, 0x30, 0xF0, 0x20, 0x6A, 0x25, 0xF7,
-0x10, 0x4A, 0x80, 0xF0, 0x8C, 0x9A, 0x02, 0xF0,
-0x00, 0x6B, 0x8C, 0xEB, 0x08, 0x23, 0x02, 0xF0,
-0x01, 0x6B, 0x6B, 0xEB, 0x8C, 0xEB, 0x80, 0xF0,
-0x6C, 0xDA, 0x00, 0x18, 0x82, 0x2D, 0x00, 0x18,
-0xE2, 0x0B, 0x00, 0x18, 0xE3, 0x0B, 0x30, 0xF0,
-0x20, 0x6A, 0x25, 0xF7, 0x10, 0x4A, 0x80, 0xF0,
+0xE3, 0x31, 0x00, 0x18, 0x99, 0x0D, 0x00, 0x18,
+0x9A, 0x0D, 0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5,
+0x18, 0x4A, 0x80, 0xF0, 0x8C, 0x9A, 0xFF, 0x6B,
+0x01, 0x4B, 0x8C, 0xEB, 0x08, 0x23, 0xFF, 0x6B,
+0x02, 0x4B, 0x6B, 0xEB, 0x8C, 0xEB, 0x80, 0xF0,
+0x6C, 0xDA, 0x00, 0x18, 0xD8, 0x20, 0x00, 0x18,
+0x99, 0x0D, 0x00, 0x18, 0x9A, 0x0D, 0x30, 0xF0,
+0x20, 0x6A, 0x85, 0xF5, 0x18, 0x4A, 0x80, 0xF0,
 0x8C, 0x9A, 0x00, 0xF2, 0x00, 0x6B, 0x8C, 0xEB,
 0x08, 0x23, 0x00, 0xF2, 0x01, 0x6B, 0x6B, 0xEB,
 0x8C, 0xEB, 0x80, 0xF0, 0x6C, 0xDA, 0x00, 0x18,
-0xE0, 0x2B, 0x00, 0x18, 0xE2, 0x0B, 0x00, 0x18,
-0xE3, 0x0B, 0x30, 0xF0, 0x20, 0x6A, 0x25, 0xF7,
-0x10, 0x4A, 0x80, 0xF0, 0x8C, 0x9A, 0x00, 0xF4,
+0xE3, 0x2F, 0x00, 0x18, 0x99, 0x0D, 0x00, 0x18,
+0x9A, 0x0D, 0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5,
+0x18, 0x4A, 0x80, 0xF0, 0x8C, 0x9A, 0x00, 0xF4,
 0x00, 0x6B, 0x8C, 0xEB, 0x08, 0x23, 0x00, 0xF4,
 0x01, 0x6B, 0x6B, 0xEB, 0x8C, 0xEB, 0x80, 0xF0,
-0x6C, 0xDA, 0x00, 0x18, 0x33, 0x3C, 0x00, 0x18,
-0xE2, 0x0B, 0x00, 0x18, 0xE3, 0x0B, 0x30, 0xF0,
-0x20, 0x6A, 0x25, 0xF7, 0x10, 0x4A, 0x80, 0xF0,
+0x6C, 0xDA, 0x00, 0x18, 0xC6, 0x40, 0x00, 0x18,
+0x99, 0x0D, 0x00, 0x18, 0x9A, 0x0D, 0x30, 0xF0,
+0x20, 0x6A, 0x85, 0xF5, 0x18, 0x4A, 0x80, 0xF0,
 0x8C, 0x9A, 0x01, 0xF0, 0x00, 0x6B, 0x8C, 0xEB,
 0x08, 0x23, 0x01, 0xF0, 0x01, 0x6B, 0x6B, 0xEB,
 0x8C, 0xEB, 0x80, 0xF0, 0x6C, 0xDA, 0x00, 0x18,
-0x0A, 0x3C, 0x00, 0x18, 0xE2, 0x0B, 0x30, 0xF0,
-0x20, 0x6A, 0x0B, 0xF5, 0x68, 0xA2, 0x08, 0x6A,
+0x9B, 0x40, 0x00, 0x18, 0x99, 0x0D, 0x30, 0xF0,
+0x20, 0x6A, 0x8B, 0xF3, 0x60, 0xA2, 0x08, 0x6A,
 0x6C, 0xEA, 0x0F, 0x2A, 0x30, 0xF0, 0x20, 0x6A,
-0xC1, 0xF2, 0x58, 0x9A, 0x01, 0x6B, 0x80, 0xA2,
+0x41, 0xF1, 0x58, 0x9A, 0x01, 0x6B, 0x80, 0xA2,
 0x8C, 0xEB, 0x07, 0x23, 0x80, 0xA2, 0xFE, 0x6B,
 0x8C, 0xEB, 0x60, 0xC2, 0x03, 0x6C, 0x00, 0x18,
-0x69, 0x22, 0x30, 0xF0, 0x21, 0x6A, 0x53, 0xF2,
-0x98, 0x9A, 0x00, 0x18, 0xFD, 0x0C, 0x02, 0x17,
+0x02, 0x26, 0x30, 0xF0, 0x20, 0x6A, 0xCF, 0xF3,
+0x80, 0x9A, 0x00, 0x18, 0xF0, 0x0E, 0x02, 0x17,
 0xFD, 0x63, 0x05, 0x62, 0x00, 0x6A, 0x30, 0xF0,
-0x20, 0x6C, 0x01, 0xF1, 0x8C, 0x9C, 0x10, 0xF0,
-0x20, 0x6B, 0xCD, 0xF3, 0x01, 0x4B, 0x0A, 0x72,
-0x60, 0xDC, 0x09, 0x61, 0x30, 0xF0, 0x21, 0x6A,
-0x53, 0xF2, 0x98, 0x9A, 0x01, 0x6D, 0xAB, 0xED,
-0x00, 0x18, 0x32, 0x0C, 0x00, 0x6A, 0x30, 0xF0,
-0x20, 0x6C, 0xFF, 0x6B, 0x01, 0x4A, 0x01, 0xF1,
-0x8C, 0x9C, 0x6C, 0xEA, 0x10, 0xF0, 0x20, 0x6B,
-0xCD, 0xF3, 0x02, 0x4B, 0x60, 0xDC, 0xDF, 0x17,
-0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
-0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF1, 0x2C, 0x9A,
-0x10, 0xF0, 0x20, 0x68, 0x0D, 0xF4, 0x09, 0x48,
-0x00, 0xD9, 0x30, 0xF0, 0x21, 0x6A, 0x53, 0xF2,
-0x9C, 0x9A, 0x01, 0x6D, 0xAB, 0xED, 0x00, 0x18,
-0x32, 0x0C, 0x04, 0x6C, 0x00, 0x18, 0xE9, 0x0B,
-0x00, 0x18, 0x89, 0x1B, 0x04, 0x6C, 0x00, 0x18,
-0xE4, 0x0B, 0x08, 0x6C, 0x00, 0x18, 0xE9, 0x0B,
-0x00, 0x18, 0x85, 0x1B, 0x08, 0x6C, 0x00, 0x18,
-0xE4, 0x0B, 0x10, 0x6C, 0x00, 0x18, 0xE9, 0x0B,
-0x00, 0x18, 0x81, 0x1B, 0x10, 0x6C, 0x00, 0x18,
-0xE4, 0x0B, 0x20, 0x6C, 0x00, 0x18, 0xE9, 0x0B,
-0x00, 0x18, 0x7D, 0x1B, 0x20, 0x6C, 0x00, 0x18,
-0xE4, 0x0B, 0x40, 0x6C, 0x00, 0x18, 0xE9, 0x0B,
-0x00, 0x18, 0x79, 0x1B, 0x40, 0x6C, 0x00, 0x18,
-0xE4, 0x0B, 0x80, 0x6C, 0x00, 0x18, 0xE9, 0x0B,
-0x01, 0x48, 0x00, 0x18, 0x75, 0x1B, 0x80, 0x6C,
-0x00, 0x18, 0xE4, 0x0B, 0x00, 0xD9, 0xBC, 0x17,
+0x20, 0x6C, 0x60, 0xF7, 0x9C, 0x9C, 0x10, 0xF0,
+0x20, 0x6B, 0xAF, 0xF1, 0x11, 0x4B, 0x0A, 0x72,
+0x60, 0xDC, 0x09, 0x61, 0x30, 0xF0, 0x20, 0x6A,
+0xCF, 0xF3, 0x80, 0x9A, 0x01, 0x6D, 0xAB, 0xED,
+0x00, 0x18, 0xF5, 0x0D, 0x00, 0x6A, 0x30, 0xF0,
+0x20, 0x6C, 0xFF, 0x6B, 0x01, 0x4A, 0x60, 0xF7,
+0x9C, 0x9C, 0x6C, 0xEA, 0x10, 0xF0, 0x20, 0x6B,
+0xAF, 0xF1, 0x12, 0x4B, 0x60, 0xDC, 0xDF, 0x17,
 0x00, 0x6A, 0x64, 0x67, 0x66, 0xEA, 0x01, 0x6D,
 0xAC, 0xEB, 0x04, 0x2B, 0x01, 0x4A, 0x20, 0x72,
 0xF8, 0x61, 0x20, 0x6A, 0x20, 0xE8, 0x00, 0x65,
 0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
-0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1, 0x44, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF1, 0x40, 0x9A,
 0x25, 0x67, 0x49, 0xE4, 0x00, 0x9A, 0x85, 0x67,
-0x00, 0x18, 0x26, 0x1B, 0x2C, 0xE8, 0x06, 0xEA,
+0x00, 0x18, 0x7E, 0x1E, 0x2C, 0xE8, 0x06, 0xEA,
 0x50, 0x67, 0x07, 0x97, 0x06, 0x91, 0x05, 0x90,
 0x04, 0x63, 0x00, 0xEF, 0xFB, 0x63, 0x09, 0x62,
 0x08, 0xD1, 0x07, 0xD0, 0x41, 0x45, 0x05, 0x67,
 0x0C, 0xD6, 0x13, 0x22, 0x30, 0xF0, 0x20, 0x6A,
-0x41, 0xF1, 0x24, 0x9A, 0x0F, 0xE8, 0x25, 0xE4,
+0x01, 0xF1, 0x20, 0x9A, 0x0F, 0xE8, 0x25, 0xE4,
 0x40, 0x99, 0x85, 0x67, 0x04, 0xD2, 0x00, 0x18,
-0x26, 0x1B, 0x0C, 0x93, 0x64, 0xEA, 0x43, 0x67,
+0x7E, 0x1E, 0x0C, 0x93, 0x64, 0xEA, 0x43, 0x67,
 0x04, 0x93, 0x6C, 0xE8, 0x0D, 0xEA, 0x40, 0xD9,
-0x07, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1,
-0x24, 0x9A, 0x0C, 0x92, 0x31, 0xE4, 0x40, 0xDC,
+0x07, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF1,
+0x20, 0x9A, 0x0C, 0x92, 0x31, 0xE4, 0x40, 0xDC,
 0x09, 0x97, 0x08, 0x91, 0x07, 0x90, 0x05, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0x41, 0x45, 0x0C, 0x22,
-0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1, 0x44, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF1, 0x40, 0x9A,
 0xAF, 0xEB, 0xCC, 0xED, 0x51, 0xE4, 0x40, 0x9C,
 0x6C, 0xEA, 0xAD, 0xEA, 0x40, 0xDC, 0x20, 0xE8,
-0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1, 0x44, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF1, 0x40, 0x9A,
 0x51, 0xE4, 0xC0, 0xDC, 0x20, 0xE8, 0x00, 0x65,
 0xFA, 0x63, 0x0B, 0x62, 0x0A, 0xD1, 0x09, 0xD0,
 0xFF, 0x6A, 0xFF, 0xF7, 0x1F, 0x6B, 0x4C, 0xED,
 0x4C, 0xEE, 0x24, 0x67, 0x6C, 0xEF, 0x10, 0x90,
 0x6C, 0xE9, 0x05, 0xD5, 0x06, 0xD6, 0x04, 0xD7,
 0x00, 0x6A, 0x05, 0x10, 0x0A, 0x6C, 0x00, 0x18,
-0xF8, 0x1B, 0x40, 0xA8, 0x01, 0x4A, 0x40, 0xC8,
+0x38, 0x1F, 0x40, 0xA8, 0x01, 0x4A, 0x40, 0xC8,
 0x1F, 0xF7, 0x00, 0x6A, 0x2C, 0xEA, 0x02, 0xF0,
 0x00, 0x72, 0x01, 0x60, 0x05, 0x2A, 0x30, 0xF0,
-0x20, 0x6A, 0x41, 0xF1, 0x40, 0x9A, 0x04, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1, 0x44, 0x9A,
+0x20, 0x6A, 0xE1, 0xF0, 0x5C, 0x9A, 0x04, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF1, 0x40, 0x9A,
 0x49, 0xE1, 0x60, 0xA2, 0xFF, 0x6A, 0x6C, 0xEA,
 0x05, 0x93, 0x6C, 0xEA, 0x06, 0x93, 0x6E, 0xEA,
 0x04, 0x22, 0x40, 0xA8, 0x04, 0x93, 0x63, 0xEA,
 0xDD, 0x61, 0x40, 0xA8, 0x04, 0x93, 0x0B, 0x97,
 0x0A, 0x91, 0x09, 0x90, 0x63, 0xEA, 0x58, 0x67,
-0x06, 0x63, 0x00, 0xEF, 0xFD, 0x63, 0x05, 0x62,
-0x00, 0x18, 0xCD, 0x40, 0x05, 0x97, 0x03, 0x63,
-0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x00, 0x18, 0xC7, 0x40, 0x05, 0x97, 0x03, 0x63,
-0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x00, 0x18, 0xB3, 0x40, 0x05, 0x97, 0x03, 0x63,
-0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x00, 0x18, 0xAA, 0x40, 0x05, 0x97, 0x03, 0x63,
-0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x00, 0x18, 0x9A, 0x40, 0x05, 0x97, 0x03, 0x63,
-0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x00, 0x18, 0x94, 0x40, 0x05, 0x97, 0x03, 0x63,
-0x00, 0xEF, 0x00, 0x65, 0x03, 0x6F, 0x8C, 0xEF,
+0x06, 0x63, 0x00, 0xEF, 0x03, 0x6F, 0x8C, 0xEF,
 0x64, 0x67, 0x46, 0x67, 0x04, 0x27, 0x0B, 0x10,
 0xA0, 0xDB, 0xFC, 0x4A, 0x04, 0x4B, 0x04, 0x5A,
 0xFB, 0x60, 0x03, 0x6A, 0x4C, 0xEE, 0x03, 0x10,
@@ -14633,601 +15646,627 @@ u8 array_mp_8822b_fw_nic[] = {
 0xE0, 0xA6, 0x79, 0xE5, 0xC0, 0xA6, 0x01, 0x4B,
 0xEE, 0xEE, 0x02, 0x2E, 0xFF, 0x4A, 0xF7, 0x2A,
 0x20, 0xE8, 0x00, 0x65, 0x06, 0x2C, 0x64, 0x6B,
-0x30, 0xF0, 0x20, 0x6A, 0x05, 0xF7, 0x64, 0xDA,
-0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x05, 0xF7,
-0x84, 0xDA, 0x30, 0xF0, 0x20, 0x6A, 0x05, 0xF7,
-0x44, 0x9A, 0x28, 0x72, 0x2D, 0x60, 0x29, 0x5A,
+0x30, 0xF0, 0x20, 0x6A, 0x65, 0xF5, 0x7C, 0xDA,
+0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x65, 0xF5,
+0x9C, 0xDA, 0x30, 0xF0, 0x20, 0x6A, 0x65, 0xF5,
+0x5C, 0x9A, 0x28, 0x72, 0x2D, 0x60, 0x29, 0x5A,
 0x07, 0x60, 0x14, 0x72, 0x19, 0x60, 0x19, 0x72,
 0x1F, 0x60, 0x0A, 0x72, 0x0D, 0x60, 0x20, 0xE8,
 0x50, 0x72, 0x32, 0x60, 0x51, 0x5A, 0x03, 0x60,
 0x32, 0x72, 0x26, 0x60, 0x20, 0xE8, 0x64, 0x72,
 0x33, 0x60, 0xC8, 0x72, 0x39, 0x60, 0x20, 0xE8,
-0x02, 0x6B, 0x30, 0xF0, 0x20, 0x6A, 0x05, 0xF7,
-0x68, 0xDA, 0xE0, 0xF7, 0x1E, 0x4B, 0x39, 0x10,
-0x03, 0x6B, 0x30, 0xF0, 0x20, 0x6A, 0x05, 0xF7,
-0x68, 0xDA, 0xE1, 0xF3, 0x1D, 0x4B, 0x31, 0x10,
-0x09, 0x6B, 0x30, 0xF0, 0x20, 0x6A, 0x05, 0xF7,
-0x68, 0xDA, 0xE4, 0xF3, 0x17, 0x4B, 0x29, 0x10,
-0x05, 0x6B, 0x30, 0xF0, 0x20, 0x6A, 0x05, 0xF7,
-0x68, 0xDA, 0xE2, 0xF3, 0x1B, 0x4B, 0x21, 0x10,
-0x11, 0x6B, 0x30, 0xF0, 0x20, 0x6A, 0x05, 0xF7,
-0x68, 0xDA, 0xE8, 0xF3, 0x0F, 0x4B, 0x19, 0x10,
-0x0A, 0x6B, 0x30, 0xF0, 0x20, 0x6A, 0x05, 0xF7,
-0x68, 0xDA, 0xE4, 0xF7, 0x16, 0x4B, 0x11, 0x10,
-0x22, 0x6B, 0x30, 0xF0, 0x20, 0x6A, 0x05, 0xF7,
-0x68, 0xDA, 0x11, 0xF0, 0x00, 0x6B, 0x09, 0x10,
-0x43, 0x6B, 0x30, 0xF0, 0x20, 0x6A, 0x05, 0xF7,
-0x68, 0xDA, 0x30, 0xF0, 0x20, 0x6A, 0xC1, 0xF2,
-0x7C, 0x9A, 0x30, 0xF0, 0x20, 0x6A, 0x05, 0xF7,
-0x6C, 0xDA, 0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6A,
-0x05, 0xF7, 0x44, 0x9A, 0x20, 0xE8, 0x00, 0x65,
-0x30, 0xF0, 0x20, 0x6A, 0x05, 0xF7, 0x4C, 0x9A,
+0x02, 0x6B, 0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5,
+0x60, 0xDA, 0xE0, 0xF7, 0x1E, 0x4B, 0x39, 0x10,
+0x03, 0x6B, 0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5,
+0x60, 0xDA, 0xE1, 0xF3, 0x1D, 0x4B, 0x31, 0x10,
+0x09, 0x6B, 0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5,
+0x60, 0xDA, 0xE4, 0xF3, 0x17, 0x4B, 0x29, 0x10,
+0x05, 0x6B, 0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5,
+0x60, 0xDA, 0xE2, 0xF3, 0x1B, 0x4B, 0x21, 0x10,
+0x11, 0x6B, 0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5,
+0x60, 0xDA, 0xE8, 0xF3, 0x0F, 0x4B, 0x19, 0x10,
+0x0A, 0x6B, 0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5,
+0x60, 0xDA, 0xE4, 0xF7, 0x16, 0x4B, 0x11, 0x10,
+0x22, 0x6B, 0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5,
+0x60, 0xDA, 0x11, 0xF0, 0x00, 0x6B, 0x09, 0x10,
+0x43, 0x6B, 0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5,
+0x60, 0xDA, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1,
+0x7C, 0x9A, 0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5,
+0x64, 0xDA, 0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6A,
+0x65, 0xF5, 0x5C, 0x9A, 0x20, 0xE8, 0x00, 0x65,
+0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5, 0x44, 0x9A,
 0xFF, 0x63, 0x58, 0xEC, 0x12, 0xEA, 0x00, 0xD2,
 0x00, 0x92, 0xFF, 0x4A, 0x00, 0xD2, 0x00, 0x92,
 0xFB, 0x2A, 0x01, 0x63, 0x20, 0xE8, 0x00, 0x65,
-0x30, 0xF0, 0x20, 0x6A, 0x05, 0xF7, 0x48, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5, 0x40, 0x9A,
 0xFF, 0x63, 0x58, 0xEC, 0x12, 0xEA, 0x00, 0xD2,
 0x00, 0x92, 0xFF, 0x4A, 0x00, 0xD2, 0x00, 0x92,
 0xFB, 0x2A, 0x01, 0x63, 0x20, 0xE8, 0x00, 0x65,
-0xFD, 0x63, 0x05, 0x62, 0x00, 0x18, 0xB0, 0x1B,
+0xFD, 0x63, 0x05, 0x62, 0x00, 0x18, 0xF0, 0x1E,
 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFD, 0x63, 0x05, 0x62, 0xFF, 0x6A, 0x4C, 0xED,
-0x00, 0x18, 0x97, 0x1B, 0x05, 0x97, 0x00, 0x6A,
+0x00, 0x18, 0xD7, 0x1E, 0x05, 0x97, 0x00, 0x6A,
 0x03, 0x63, 0x00, 0xEF, 0xFD, 0x63, 0x05, 0x62,
 0x04, 0xD0, 0xFF, 0x6A, 0x04, 0x67, 0x4C, 0xEE,
-0x00, 0x18, 0x9C, 0x1B, 0x50, 0x67, 0x05, 0x97,
+0x00, 0x18, 0xDC, 0x1E, 0x50, 0x67, 0x05, 0x97,
 0x04, 0x90, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFB, 0x63, 0x09, 0x62, 0x08, 0xD1, 0x07, 0xD0,
 0xFF, 0x6A, 0x30, 0xF0, 0x20, 0x68, 0x8C, 0xEA,
-0x0C, 0xF0, 0x00, 0x48, 0x04, 0xD2, 0x26, 0x40,
+0x0B, 0xF5, 0x14, 0x48, 0x04, 0xD2, 0x26, 0x40,
 0x40, 0xA0, 0x04, 0x93, 0x6E, 0xEA, 0x0A, 0x2A,
 0x01, 0x6A, 0x30, 0xF0, 0x20, 0x6C, 0x4B, 0xEA,
-0x42, 0xF4, 0x18, 0x4C, 0xA3, 0x67, 0x40, 0xC0,
-0x00, 0x18, 0x01, 0x50, 0x01, 0x48, 0x2A, 0xE8,
+0x62, 0xF3, 0x00, 0x4C, 0xA3, 0x67, 0x40, 0xC0,
+0x00, 0x18, 0xD9, 0x55, 0x01, 0x48, 0x2A, 0xE8,
 0xEF, 0x61, 0x30, 0xF0, 0x20, 0x68, 0x30, 0xF0,
-0x20, 0x69, 0x80, 0x6A, 0x0C, 0xF0, 0x06, 0x48,
-0x8E, 0xF4, 0x14, 0x49, 0x05, 0xD2, 0x40, 0xA0,
+0x20, 0x69, 0x80, 0x6A, 0x0B, 0xF5, 0x1A, 0x48,
+0xAE, 0xF2, 0x1C, 0x49, 0x05, 0xD2, 0x40, 0xA0,
 0x04, 0x93, 0x6E, 0xEA, 0x03, 0x2A, 0x01, 0x6A,
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-0x01, 0x4A, 0x04, 0x72, 0xCC, 0xEC, 0x80, 0xC5,
-0x01, 0x4D, 0x8C, 0x61, 0x30, 0xF0, 0x20, 0x6A,
-0x25, 0xF7, 0xAA, 0xA2, 0x01, 0x6C, 0xC4, 0x67,
-0xC4, 0xED, 0xCF, 0xED, 0x25, 0xF7, 0xCA, 0xA2,
-0xAC, 0xEB, 0xFF, 0x6D, 0x84, 0xEE, 0x30, 0xF0,
-0x20, 0x6E, 0x81, 0xF5, 0xCC, 0x9E, 0xAC, 0xEC,
-0x80, 0xC6, 0x25, 0xF7, 0x8A, 0xA2, 0xAC, 0xEC,
-0x01, 0x4C, 0xAC, 0xEC, 0x25, 0xF7, 0x8A, 0xC2,
-0x25, 0xF7, 0xAA, 0xA2, 0x03, 0x6C, 0xAC, 0xEC,
-0x25, 0xF7, 0x8A, 0xC2, 0x30, 0xF0, 0x20, 0x6A,
-0x25, 0xF7, 0x10, 0x4A, 0x40, 0xF1, 0x8F, 0xA2,
-0x08, 0x6D, 0x01, 0x4C, 0x40, 0xF1, 0x8F, 0xC2,
-0x40, 0xF1, 0x8F, 0xA2, 0xAE, 0xEC, 0x0C, 0x2C,
-0x40, 0xF1, 0x8F, 0xC2, 0x09, 0x10, 0x30, 0xF0,
-0x20, 0x6A, 0xA1, 0xF2, 0x68, 0x9A, 0x02, 0x6C,
-0x40, 0x9B, 0x8D, 0xEA, 0x40, 0xDB, 0x02, 0x10,
-0x3F, 0xF7, 0x0A, 0x2B, 0x03, 0x91, 0x02, 0x90,
-0x02, 0x63, 0x20, 0xE8, 0xFB, 0x63, 0x09, 0x62,
-0x08, 0xD1, 0x07, 0xD0, 0x30, 0xF0, 0x20, 0x6A,
-0x81, 0xF5, 0x50, 0x9A, 0x60, 0xA2, 0x03, 0x6A,
-0x6C, 0xEA, 0x10, 0x6B, 0x64, 0xEA, 0xFF, 0x6A,
-0x4C, 0xEB, 0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF5,
-0x54, 0x9A, 0x04, 0xD3, 0x40, 0x9A, 0x05, 0xD2,
-0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF5, 0x58, 0x9A,
-0x00, 0x9A, 0x05, 0x92, 0x0A, 0xEA, 0xA0, 0xF0,
-0x00, 0x60, 0x30, 0xF0, 0x20, 0x6A, 0x25, 0xF7,
-0x10, 0x4A, 0x80, 0xF0, 0x6C, 0x9A, 0x02, 0x6C,
-0x8D, 0xEB, 0x80, 0xF0, 0x6C, 0xDA, 0x30, 0xF0,
-0x20, 0x69, 0x25, 0xF7, 0x10, 0x49, 0x62, 0xF1,
-0x58, 0xA9, 0x00, 0xF7, 0x00, 0x72, 0x07, 0x60,
-0x62, 0xF1, 0x98, 0xA1, 0x62, 0xF1, 0x79, 0xA1,
-0xAF, 0x44, 0x6E, 0xED, 0x0A, 0x2D, 0x30, 0xF0,
-0x20, 0x6A, 0xA1, 0xF2, 0x68, 0x9A, 0xFF, 0x6C,
-0x01, 0x4C, 0x40, 0x9B, 0x8D, 0xEA, 0x40, 0xDB,
-0x7C, 0x10, 0x30, 0xF0, 0x20, 0x6D, 0x81, 0xF5,
-0xBC, 0x9D, 0x7F, 0x6E, 0xB5, 0xE0, 0xE0, 0xA5,
-0xCC, 0xEF, 0x3E, 0x2F, 0x00, 0xF4, 0x00, 0x72,
-0x70, 0x60, 0xAC, 0x44, 0x6E, 0xED, 0x6D, 0x25,
-0x00, 0xF5, 0x01, 0x72, 0x6A, 0x60, 0x00, 0xF6,
-0x02, 0x72, 0x67, 0x60, 0x00, 0xF7, 0x03, 0x72,
-0x64, 0x60, 0x00, 0xF5, 0x00, 0x72, 0x61, 0x60,
-0xFD, 0x4C, 0x8E, 0xEB, 0x5E, 0x23, 0x30, 0xF0,
-0x20, 0x69, 0x25, 0xF7, 0x10, 0x49, 0x62, 0xF1,
-0x58, 0xA9, 0x00, 0xF6, 0x01, 0x72, 0x55, 0x60,
-0x00, 0xF7, 0x02, 0x72, 0x52, 0x60, 0x00, 0xF6,
-0x00, 0x72, 0x4F, 0x60, 0x62, 0xF1, 0x98, 0xA1,
-0x62, 0xF1, 0x79, 0xA1, 0xFE, 0x4C, 0x6E, 0xEC,
-0x48, 0x24, 0x00, 0xF7, 0x01, 0x72, 0x45, 0x60,
-0x74, 0x33, 0x30, 0xF0, 0x20, 0x6A, 0x72, 0xF0,
-0x88, 0x43, 0xA1, 0xF5, 0x40, 0x9A, 0x30, 0xF0,
-0x20, 0x6B, 0x81, 0xF5, 0xBC, 0x9B, 0x49, 0xE0,
-0x40, 0xAA, 0x91, 0xE1, 0xB5, 0xE0, 0x0E, 0x10,
-0x40, 0xA5, 0x4C, 0xEE, 0x01, 0x76, 0x2D, 0x61,
-0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF5, 0x40, 0x9A,
-0x74, 0x33, 0x72, 0xF0, 0x88, 0x43, 0x49, 0xE0,
-0x40, 0xAA, 0x91, 0xE1, 0xFF, 0x6E, 0x4C, 0xEE,
-0x00, 0x18, 0x09, 0x1C, 0x62, 0xF1, 0x59, 0xA1,
-0x08, 0x6B, 0x01, 0x4A, 0x62, 0xF1, 0x59, 0xC1,
-0x62, 0xF1, 0x59, 0xA1, 0x6E, 0xEA, 0x02, 0x2A,
-0x62, 0xF1, 0x59, 0xC1, 0x30, 0xF0, 0x20, 0x6A,
-0xA1, 0xF5, 0x44, 0x9A, 0x04, 0x93, 0x40, 0x9A,
-0x0E, 0xEA, 0x61, 0xE0, 0x05, 0x2A, 0x30, 0xF0,
-0x20, 0x6A, 0xA1, 0xF5, 0x48, 0x9A, 0x00, 0x9A,
-0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF5, 0x58, 0x9A,
-0x00, 0xDA, 0x05, 0x92, 0x4A, 0xE8, 0x7F, 0xF7,
-0x0A, 0x61, 0x09, 0x97, 0x08, 0x91, 0x07, 0x90,
-0x05, 0x63, 0x00, 0xEF, 0xFD, 0x63, 0x05, 0x62,
-0xA4, 0x67, 0x30, 0xF0, 0x20, 0x6C, 0xC5, 0xF7,
-0x00, 0x4C, 0x08, 0x6E, 0x00, 0x18, 0x09, 0x1C,
+0x2C, 0xEF, 0x02, 0xF0, 0x00, 0x77, 0x08, 0x60,
+0x85, 0xF5, 0xF6, 0xA6, 0x8C, 0xEF, 0x7C, 0x4F,
+0xE8, 0x37, 0xFD, 0xE2, 0x2C, 0xEF, 0x0E, 0x2F,
+0x30, 0xF0, 0x20, 0x6C, 0x85, 0xF5, 0xD6, 0xA4,
+0xFF, 0x6C, 0x30, 0xF0, 0x20, 0x6F, 0x8C, 0xEE,
+0x7C, 0x4E, 0xC8, 0x36, 0xD9, 0xE2, 0xE1, 0xF0,
+0xFC, 0x9F, 0x0A, 0x10, 0x85, 0xF5, 0xD6, 0xA6,
+0x30, 0xF0, 0x20, 0x6F, 0x01, 0xF1, 0xE0, 0x9F,
+0x8C, 0xEE, 0x7C, 0x4E, 0xC8, 0x36, 0xD9, 0xE2,
+0xF9, 0xE6, 0xC0, 0xA6, 0x01, 0x4A, 0x04, 0x72,
+0xCC, 0xEC, 0x80, 0xC5, 0x01, 0x4D, 0x8C, 0x61,
+0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5, 0xB6, 0xA2,
+0x01, 0x6C, 0xC4, 0x67, 0xC4, 0xED, 0xCF, 0xED,
+0x85, 0xF5, 0xD6, 0xA2, 0xAC, 0xEB, 0xFF, 0x6D,
+0x84, 0xEE, 0x30, 0xF0, 0x20, 0x6E, 0x21, 0xF4,
+0xDC, 0x9E, 0xAC, 0xEC, 0x80, 0xC6, 0x85, 0xF5,
+0x96, 0xA2, 0xAC, 0xEC, 0x01, 0x4C, 0xAC, 0xEC,
+0x85, 0xF5, 0x96, 0xC2, 0x85, 0xF5, 0xB6, 0xA2,
+0x03, 0x6C, 0xAC, 0xEC, 0x85, 0xF5, 0x96, 0xC2,
+0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5, 0x18, 0x4A,
+0x60, 0xF1, 0x85, 0xA2, 0x08, 0x6D, 0x01, 0x4C,
+0x60, 0xF1, 0x85, 0xC2, 0x60, 0xF1, 0x85, 0xA2,
+0xAE, 0xEC, 0x0C, 0x2C, 0x60, 0xF1, 0x85, 0xC2,
+0x09, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF1,
+0x68, 0x9A, 0x02, 0x6C, 0x40, 0x9B, 0x8D, 0xEA,
+0x40, 0xDB, 0x02, 0x10, 0x3F, 0xF7, 0x0A, 0x2B,
+0x03, 0x91, 0x02, 0x90, 0x02, 0x63, 0x20, 0xE8,
+0xFB, 0x63, 0x09, 0x62, 0x08, 0xD1, 0x07, 0xD0,
+0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF4, 0x40, 0x9A,
+0x60, 0xA2, 0x03, 0x6A, 0x6C, 0xEA, 0x10, 0x6B,
+0x64, 0xEA, 0xFF, 0x6A, 0x4C, 0xEB, 0x30, 0xF0,
+0x20, 0x6A, 0x41, 0xF4, 0x44, 0x9A, 0x04, 0xD3,
+0x40, 0x9A, 0x05, 0xD2, 0x30, 0xF0, 0x20, 0x6A,
+0x41, 0xF4, 0x48, 0x9A, 0x00, 0x9A, 0x05, 0x92,
+0x0A, 0xEA, 0xA0, 0xF0, 0x00, 0x60, 0x30, 0xF0,
+0x20, 0x6A, 0x85, 0xF5, 0x18, 0x4A, 0x80, 0xF0,
+0x6C, 0x9A, 0x02, 0x6C, 0x8D, 0xEB, 0x80, 0xF0,
+0x6C, 0xDA, 0x30, 0xF0, 0x20, 0x69, 0x85, 0xF5,
+0x18, 0x49, 0x82, 0xF1, 0x4E, 0xA9, 0x00, 0xF7,
+0x00, 0x72, 0x07, 0x60, 0x82, 0xF1, 0x8E, 0xA1,
+0x82, 0xF1, 0x6F, 0xA1, 0xAF, 0x44, 0x6E, 0xED,
+0x0A, 0x2D, 0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF1,
+0x68, 0x9A, 0xFF, 0x6C, 0x01, 0x4C, 0x40, 0x9B,
+0x8D, 0xEA, 0x40, 0xDB, 0x7C, 0x10, 0x30, 0xF0,
+0x20, 0x6D, 0x01, 0xF4, 0xB0, 0x9D, 0x7F, 0x6E,
+0xB5, 0xE0, 0xE0, 0xA5, 0xCC, 0xEF, 0x3E, 0x2F,
+0x00, 0xF4, 0x00, 0x72, 0x70, 0x60, 0xAC, 0x44,
+0x6E, 0xED, 0x6D, 0x25, 0x00, 0xF5, 0x01, 0x72,
+0x6A, 0x60, 0x00, 0xF6, 0x02, 0x72, 0x67, 0x60,
+0x00, 0xF7, 0x03, 0x72, 0x64, 0x60, 0x00, 0xF5,
+0x00, 0x72, 0x61, 0x60, 0xFD, 0x4C, 0x8E, 0xEB,
+0x5E, 0x23, 0x30, 0xF0, 0x20, 0x69, 0x85, 0xF5,
+0x18, 0x49, 0x82, 0xF1, 0x4E, 0xA9, 0x00, 0xF6,
+0x01, 0x72, 0x55, 0x60, 0x00, 0xF7, 0x02, 0x72,
+0x52, 0x60, 0x00, 0xF6, 0x00, 0x72, 0x4F, 0x60,
+0x82, 0xF1, 0x8E, 0xA1, 0x82, 0xF1, 0x6F, 0xA1,
+0xFE, 0x4C, 0x6E, 0xEC, 0x48, 0x24, 0x00, 0xF7,
+0x01, 0x72, 0x45, 0x60, 0x74, 0x33, 0x30, 0xF0,
+0x20, 0x6A, 0x71, 0xE1, 0x41, 0xF4, 0x4C, 0x9A,
+0x30, 0xF0, 0x20, 0x6B, 0x01, 0xF4, 0xB0, 0x9B,
+0x49, 0xE0, 0x40, 0xAA, 0x82, 0xF0, 0x0E, 0x4C,
+0xB5, 0xE0, 0x0E, 0x10, 0x40, 0xA5, 0x4C, 0xEE,
+0x01, 0x76, 0x2D, 0x61, 0x30, 0xF0, 0x20, 0x6A,
+0x41, 0xF4, 0x4C, 0x9A, 0x74, 0x33, 0x71, 0xE1,
+0x49, 0xE0, 0x40, 0xAA, 0x82, 0xF0, 0x0E, 0x4C,
+0xFF, 0x6E, 0x4C, 0xEE, 0x00, 0x18, 0x49, 0x1F,
+0x82, 0xF1, 0x4F, 0xA1, 0x08, 0x6B, 0x01, 0x4A,
+0x82, 0xF1, 0x4F, 0xC1, 0x82, 0xF1, 0x4F, 0xA1,
+0x6E, 0xEA, 0x02, 0x2A, 0x82, 0xF1, 0x4F, 0xC1,
+0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF4, 0x50, 0x9A,
+0x04, 0x93, 0x40, 0x9A, 0x0E, 0xEA, 0x61, 0xE0,
+0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF4,
+0x54, 0x9A, 0x00, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
+0x41, 0xF4, 0x48, 0x9A, 0x00, 0xDA, 0x05, 0x92,
+0x4A, 0xE8, 0x7F, 0xF7, 0x0A, 0x61, 0x09, 0x97,
+0x08, 0x91, 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF,
+0xFD, 0x63, 0x05, 0x62, 0xA4, 0x67, 0x30, 0xF0,
+0x20, 0x6C, 0x45, 0xF6, 0x1A, 0x4C, 0x04, 0x6E,
+0x00, 0x18, 0x49, 0x1F, 0x30, 0xF0, 0x20, 0x6A,
+0x85, 0xF5, 0x18, 0x4A, 0xC0, 0xF0, 0x82, 0xA2,
+0x01, 0x6B, 0x8C, 0xEB, 0x0C, 0x23, 0xC0, 0xF0,
+0x64, 0xA2, 0xFF, 0x73, 0x08, 0x60, 0xC0, 0xF0,
+0x83, 0xA2, 0x82, 0xF7, 0x78, 0xA2, 0x6D, 0xE4,
+0x04, 0x4B, 0x82, 0xF7, 0x6A, 0xCA, 0x05, 0x97,
+0x03, 0x63, 0x00, 0xEF, 0xFD, 0x63, 0x05, 0x62,
+0xA4, 0x67, 0x30, 0xF0, 0x20, 0x6C, 0x25, 0xF6,
+0x08, 0x4C, 0x08, 0x6E, 0x00, 0x18, 0x49, 0x1F,
 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xDE, 0x63, 0x43, 0x62, 0x42, 0xD1, 0x41, 0xD0,
 0x01, 0x6A, 0x7D, 0x67, 0x4B, 0xEA, 0x58, 0xC3,
 0x30, 0xF0, 0x20, 0x68, 0x01, 0x6A, 0x5A, 0xC3,
-0x25, 0xF7, 0x10, 0x48, 0x08, 0x6A, 0x5B, 0xC3,
-0x62, 0xF1, 0x58, 0xA0, 0x7F, 0x6B, 0x54, 0x32,
-0x09, 0xE2, 0x62, 0xF0, 0x58, 0xA2, 0x6C, 0xEA,
+0x85, 0xF5, 0x18, 0x48, 0x08, 0x6A, 0x5B, 0xC3,
+0x82, 0xF1, 0x4E, 0xA0, 0x7F, 0x6B, 0x54, 0x32,
+0x09, 0xE2, 0x82, 0xF0, 0x4E, 0xA2, 0x6C, 0xEA,
 0x01, 0x72, 0x7C, 0x61, 0x48, 0xA4, 0xBD, 0x67,
 0x5C, 0xC5, 0x41, 0xA4, 0x5D, 0xC5, 0x42, 0xA4,
 0x5E, 0xC5, 0x46, 0xA4, 0x20, 0xF0, 0x40, 0xC5,
@@ -15236,4275 +16275,4417 @@ u8 array_mp_8822b_fw_nic[] = {
 0x5F, 0xA3, 0x7E, 0xA3, 0x40, 0x32, 0x6D, 0xEA,
 0x03, 0x72, 0x05, 0x60, 0x08, 0x72, 0x1A, 0x60,
 0x02, 0x72, 0x2C, 0x60, 0x6D, 0x10, 0x06, 0x04,
-0x00, 0x18, 0x3E, 0x1E, 0x9D, 0x67, 0x20, 0xF0,
+0x00, 0x18, 0x8B, 0x21, 0x9D, 0x67, 0x20, 0xF0,
 0xE1, 0xA4, 0x20, 0xF0, 0x40, 0xA4, 0x30, 0xF0,
 0x20, 0x6D, 0xE0, 0x37, 0x5D, 0xE7, 0xFF, 0xF7,
-0x1F, 0x6A, 0x05, 0x6C, 0xA8, 0xF0, 0x18, 0x4D,
+0x1F, 0x6A, 0x05, 0x6C, 0x27, 0xF7, 0x14, 0x4D,
 0x00, 0xF4, 0x00, 0x6E, 0x4C, 0xEF, 0x00, 0x18,
-0xD0, 0x41, 0x59, 0x10, 0xBD, 0x67, 0x10, 0x6A,
+0x60, 0x46, 0x59, 0x10, 0xBD, 0x67, 0x10, 0x6A,
 0x5B, 0xC5, 0x30, 0xF0, 0x20, 0x6D, 0x09, 0x04,
-0xCB, 0xF3, 0x14, 0x4D, 0x04, 0x6E, 0x00, 0x18,
-0x09, 0x1C, 0x30, 0xF0, 0x20, 0x6D, 0x0A, 0x04,
-0xCB, 0xF3, 0x18, 0x4D, 0x04, 0x6E, 0x00, 0x18,
-0x09, 0x1C, 0x42, 0x10, 0x06, 0x04, 0x00, 0x18,
-0x3E, 0x1E, 0xC5, 0xF4, 0x20, 0xA0, 0x01, 0x6A,
-0x4E, 0xE9, 0x24, 0x29, 0x00, 0x18, 0xA6, 0x39,
-0xA5, 0xF4, 0x6C, 0xA0, 0x04, 0x6A, 0x6C, 0xEA,
-0x1A, 0x22, 0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF5,
-0x4C, 0x9A, 0xA5, 0xF4, 0xD8, 0x98, 0x10, 0xF0,
+0x4B, 0xF2, 0x0C, 0x4D, 0x04, 0x6E, 0x00, 0x18,
+0x49, 0x1F, 0x30, 0xF0, 0x20, 0x6D, 0x0A, 0x04,
+0x4B, 0xF2, 0x10, 0x4D, 0x04, 0x6E, 0x00, 0x18,
+0x49, 0x1F, 0x42, 0x10, 0x06, 0x04, 0x00, 0x18,
+0x8B, 0x21, 0xC5, 0xF4, 0x30, 0xA0, 0x01, 0x6A,
+0x4E, 0xE9, 0x24, 0x29, 0x00, 0x18, 0xF6, 0x3D,
+0xA5, 0xF4, 0x7C, 0xA0, 0x04, 0x6A, 0x6C, 0xEA,
+0x1A, 0x22, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF4,
+0x58, 0x9A, 0xC5, 0xF4, 0xC8, 0x98, 0x10, 0xF0,
 0x21, 0x6C, 0x40, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
-0x61, 0xF1, 0x48, 0x9A, 0x57, 0xF4, 0x15, 0x4C,
+0xC0, 0xF7, 0x54, 0x9A, 0xD9, 0xF4, 0x09, 0x4C,
 0x00, 0x6D, 0x40, 0x9A, 0x01, 0x6F, 0x04, 0xD1,
 0x5B, 0xE6, 0xFF, 0xF7, 0x1F, 0x6A, 0x4C, 0xEE,
-0x00, 0x18, 0x40, 0x2D, 0x1C, 0x10, 0x00, 0x18,
-0x77, 0x2E, 0x19, 0x10, 0x00, 0x18, 0xBA, 0x39,
-0xA5, 0xF4, 0xBE, 0xA8, 0x00, 0x6C, 0x00, 0x18,
-0x28, 0x2E, 0x11, 0x10, 0x10, 0x2A, 0x69, 0xA4,
+0x00, 0x18, 0x3C, 0x31, 0x1C, 0x10, 0x00, 0x18,
+0x94, 0x32, 0x19, 0x10, 0x00, 0x18, 0x0A, 0x3E,
+0xC5, 0xF4, 0xAE, 0xA8, 0x00, 0x6C, 0x00, 0x18,
+0x45, 0x32, 0x11, 0x10, 0x10, 0x2A, 0x69, 0xA4,
 0xBD, 0x67, 0x7C, 0xC5, 0x68, 0xA4, 0x5E, 0xC5,
 0x5F, 0xC5, 0x7D, 0xC5, 0x46, 0xA4, 0x20, 0xF0,
 0x40, 0xC5, 0x47, 0xA4, 0x20, 0xF0, 0x41, 0xC5,
-0x06, 0x04, 0x00, 0x18, 0x3E, 0x1E, 0x43, 0x97,
+0x06, 0x04, 0x00, 0x18, 0x8B, 0x21, 0x43, 0x97,
 0x42, 0x91, 0x41, 0x90, 0x22, 0x63, 0x00, 0xEF,
 0xFD, 0x63, 0x05, 0x62, 0xFF, 0x6A, 0x4C, 0xEC,
 0x68, 0x44, 0xFA, 0x4B, 0x4C, 0xEB, 0x03, 0x5B,
-0x03, 0x60, 0x00, 0x18, 0x43, 0x4F, 0x42, 0x10,
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 0x01, 0x4B, 0xA0, 0xC2, 0x01, 0x4A, 0x8A, 0xEA,
-0xFA, 0x61, 0x04, 0x04, 0x00, 0x18, 0x81, 0x24,
+0xFA, 0x61, 0x04, 0x04, 0x00, 0x18, 0x8B, 0x28,
 0x03, 0x72, 0x13, 0x60, 0x14, 0x22, 0x01, 0xE1,
 0xFF, 0xF7, 0x1F, 0x6A, 0x4C, 0xE8, 0x30, 0xF0,
-0x20, 0x6A, 0x25, 0xF7, 0x10, 0x4A, 0x03, 0xF2,
-0x6E, 0xAA, 0x63, 0xE8, 0xD5, 0x61, 0x00, 0x6B,
-0x03, 0xF2, 0x6E, 0xCA, 0x04, 0x10, 0x07, 0x6A,
+0x20, 0x6A, 0x85, 0xF5, 0x18, 0x4A, 0x03, 0xF2,
+0x7E, 0xAA, 0x63, 0xE8, 0xD5, 0x61, 0x00, 0x6B,
+0x03, 0xF2, 0x7E, 0xCA, 0x04, 0x10, 0x07, 0x6A,
 0x03, 0x10, 0x08, 0x6A, 0x01, 0x10, 0x00, 0x6A,
 0x0B, 0x97, 0x0A, 0x91, 0x09, 0x90, 0x06, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0xF9, 0x63, 0x0D, 0x62,
 0x0C, 0xD1, 0x0B, 0xD0, 0x30, 0xF0, 0x20, 0x6A,
-0x25, 0xF7, 0x10, 0x4A, 0x00, 0x6B, 0xA5, 0xF4,
-0x64, 0xDA, 0xA5, 0xF4, 0x68, 0xDA, 0x69, 0xA4,
+0x85, 0xF5, 0x18, 0x4A, 0x00, 0x6B, 0xA5, 0xF4,
+0x74, 0xDA, 0xA5, 0xF4, 0x78, 0xDA, 0x69, 0xA4,
 0x48, 0xA4, 0x60, 0x33, 0x49, 0xE3, 0x09, 0xD2,
 0x09, 0x93, 0xFF, 0xF7, 0x1F, 0x6A, 0x4C, 0xEB,
 0x09, 0xD3, 0x6A, 0xA4, 0x01, 0x73, 0x02, 0x61,
 0x4B, 0xA4, 0x08, 0x10, 0x30, 0xF0, 0x20, 0x6B,
-0x61, 0xF2, 0x70, 0x9B, 0x60, 0xAB, 0x6C, 0xEA,
+0xE1, 0xF0, 0x64, 0x9B, 0x60, 0xAB, 0x6C, 0xEA,
 0x6B, 0xA4, 0x49, 0xE3, 0x5C, 0x32, 0x30, 0x4A,
 0x08, 0xD2, 0x00, 0x69, 0x2F, 0x10, 0x30, 0xF0,
-0x20, 0x6A, 0x81, 0xF5, 0x5C, 0x9A, 0x08, 0x93,
+0x20, 0x6A, 0x01, 0xF4, 0x50, 0x9A, 0x08, 0x93,
 0xFF, 0x68, 0x49, 0xE3, 0x40, 0xA2, 0x4C, 0xE8,
 0x04, 0x70, 0x06, 0x60, 0x08, 0x70, 0x04, 0x60,
 0x0C, 0x70, 0x02, 0x60, 0x01, 0x6A, 0x22, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF5, 0x7C, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF4, 0x70, 0x9A,
 0x08, 0x92, 0x6D, 0xE2, 0x04, 0x02, 0x11, 0xE2,
 0x04, 0x10, 0xA0, 0xA3, 0x01, 0x4B, 0xA0, 0xC2,
 0x01, 0x4A, 0x8A, 0xEA, 0xFA, 0x61, 0x04, 0x04,
-0x00, 0x18, 0x81, 0x24, 0x03, 0x72, 0x02, 0x61,
+0x00, 0x18, 0x8B, 0x28, 0x03, 0x72, 0x02, 0x61,
 0x02, 0x6A, 0x0C, 0x10, 0x0A, 0x22, 0x08, 0x93,
 0x01, 0x49, 0xFF, 0xF7, 0x1F, 0x6A, 0x0D, 0xE3,
 0x08, 0xD3, 0x4C, 0xE9, 0x09, 0x92, 0x43, 0xE9,
 0xCE, 0x61, 0x00, 0x6A, 0x0D, 0x97, 0x0C, 0x91,
 0x0B, 0x90, 0x07, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFB, 0x63, 0x09, 0x62, 0x08, 0xD1, 0x07, 0xD0,
-0x30, 0xF0, 0x20, 0x68, 0xA8, 0xF0, 0x18, 0x48,
+0x30, 0xF0, 0x20, 0x68, 0x27, 0xF7, 0x14, 0x48,
 0x00, 0x69, 0x91, 0x67, 0x04, 0x05, 0x00, 0x18,
-0x0E, 0x36, 0x01, 0x72, 0x02, 0x60, 0x03, 0x6A,
+0x4B, 0x3A, 0x01, 0x72, 0x02, 0x60, 0x03, 0x6A,
 0x09, 0x10, 0x7D, 0x67, 0x50, 0xA3, 0x01, 0x49,
 0x00, 0xF4, 0x00, 0x71, 0x40, 0xC0, 0x01, 0x48,
 0xF0, 0x61, 0x00, 0x6A, 0x09, 0x97, 0x08, 0x91,
@@ -19531,849 +20712,930 @@ u8 array_mp_8822b_fw_nic[] = {
 0x00, 0xF1, 0x48, 0x43, 0x00, 0xF1, 0x80, 0x43,
 0xA0, 0xA5, 0x40, 0xA2, 0x80, 0xA4, 0xB7, 0xC3,
 0x58, 0xC3, 0x99, 0xC3, 0x04, 0x04, 0x00, 0x18,
-0x3E, 0x1E, 0x3E, 0x95, 0xFF, 0xF7, 0x1F, 0x6A,
+0x8B, 0x21, 0x3E, 0x95, 0xFF, 0xF7, 0x1F, 0x6A,
 0x25, 0xE0, 0x4C, 0xE9, 0x01, 0x4D, 0xFF, 0x6A,
 0x4C, 0xED, 0x3E, 0xD5, 0x3F, 0x92, 0x43, 0xE9,
 0xB3, 0x61, 0x47, 0x97, 0x46, 0x91, 0x45, 0x90,
 0x24, 0x63, 0x00, 0xEF, 0xFD, 0x63, 0x05, 0x62,
 0xA7, 0x44, 0x30, 0xF0, 0x20, 0x6C, 0x01, 0x4D,
-0xCB, 0xF3, 0x0F, 0x4C, 0x03, 0x6E, 0x00, 0x18,
-0x09, 0x1C, 0x05, 0x97, 0x00, 0x6A, 0x03, 0x63,
+0x4B, 0xF2, 0x07, 0x4C, 0x03, 0x6E, 0x00, 0x18,
+0x49, 0x1F, 0x05, 0x97, 0x00, 0x6A, 0x03, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x30, 0xF0, 0x20, 0x6C, 0x29, 0xF1, 0x18, 0x4C,
+0x30, 0xF0, 0x20, 0x6C, 0xA8, 0xF7, 0x10, 0x4C,
 0x00, 0x6D, 0xC2, 0xF3, 0x10, 0x6E, 0x00, 0x18,
-0x04, 0x1C, 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF,
+0x44, 0x1F, 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF,
 0xFF, 0x6A, 0x4C, 0xEC, 0x01, 0x74, 0xAC, 0xEA,
 0x09, 0x60, 0x03, 0x24, 0x02, 0x74, 0x0B, 0x60,
-0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6B, 0xC1, 0xF5,
-0x74, 0x9B, 0x09, 0x10, 0x30, 0xF0, 0x20, 0x6B,
-0x02, 0xF1, 0x7C, 0x9B, 0x04, 0x10, 0x30, 0xF0,
-0x20, 0x6B, 0x22, 0xF1, 0x60, 0x9B, 0x40, 0xC3,
+0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6B, 0x61, 0xF4,
+0x7C, 0x9B, 0x09, 0x10, 0x30, 0xF0, 0x20, 0x6B,
+0x02, 0xF0, 0x70, 0x9B, 0x04, 0x10, 0x30, 0xF0,
+0x20, 0x6B, 0x02, 0xF0, 0x74, 0x9B, 0x40, 0xC3,
 0x20, 0xE8, 0x00, 0x65, 0xFF, 0x6B, 0x6C, 0xEC,
 0x01, 0x74, 0x0A, 0x60, 0x04, 0x24, 0x02, 0x74,
 0x00, 0x6A, 0x13, 0x61, 0x0C, 0x10, 0x30, 0xF0,
-0x20, 0x6A, 0xC1, 0xF5, 0x54, 0x9A, 0x04, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x02, 0xF1, 0x5C, 0x9A,
+0x20, 0x6A, 0x61, 0xF4, 0x5C, 0x9A, 0x04, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0x02, 0xF0, 0x50, 0x9A,
 0x40, 0xA2, 0x6C, 0xEA, 0x20, 0xE8, 0x30, 0xF0,
-0x20, 0x6A, 0x22, 0xF1, 0x40, 0x9A, 0x40, 0xA2,
+0x20, 0x6A, 0x02, 0xF0, 0x54, 0x9A, 0x40, 0xA2,
 0x6C, 0xEA, 0x20, 0xE8, 0xFF, 0x6B, 0x6C, 0xEC,
 0x01, 0x74, 0x0A, 0x60, 0x04, 0x24, 0x02, 0x74,
 0x00, 0x6A, 0x13, 0x61, 0x0C, 0x10, 0x30, 0xF0,
-0x20, 0x6A, 0x22, 0xF1, 0x44, 0x9A, 0x04, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x22, 0xF1, 0x48, 0x9A,
+0x20, 0x6A, 0x02, 0xF0, 0x58, 0x9A, 0x04, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0x02, 0xF0, 0x5C, 0x9A,
 0x40, 0xA2, 0x6C, 0xEA, 0x20, 0xE8, 0x30, 0xF0,
-0x20, 0x6A, 0x22, 0xF1, 0x4C, 0x9A, 0x40, 0xA2,
+0x20, 0x6A, 0x22, 0xF0, 0x40, 0x9A, 0x40, 0xA2,
 0x6C, 0xEA, 0x20, 0xE8, 0xFD, 0x63, 0x05, 0x62,
-0x30, 0xF0, 0x20, 0x6A, 0xC5, 0xF7, 0x4D, 0xA2,
+0x30, 0xF0, 0x20, 0x6A, 0x25, 0xF6, 0x56, 0xA2,
 0x01, 0x6B, 0x4C, 0xEB, 0x00, 0x6A, 0x07, 0x23,
-0x30, 0xF0, 0x20, 0x6A, 0x22, 0xF1, 0x44, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x02, 0xF0, 0x58, 0x9A,
 0x60, 0xA2, 0xFF, 0x6A, 0x6C, 0xEA, 0x30, 0xF0,
-0x20, 0x6B, 0x25, 0xF7, 0x10, 0x4B, 0xE2, 0xF6,
-0xB4, 0xA3, 0x01, 0x6C, 0xAC, 0xEC, 0x04, 0x24,
-0xE2, 0xF6, 0x96, 0xA3, 0x00, 0x18, 0x2F, 0x42,
+0x20, 0x6B, 0x85, 0xF5, 0x18, 0x4B, 0xE2, 0xF6,
+0xBC, 0xA3, 0x01, 0x6C, 0xAC, 0xEC, 0x04, 0x24,
+0xE2, 0xF6, 0x9E, 0xA3, 0x00, 0x18, 0xBF, 0x46,
 0x05, 0x97, 0xFF, 0x6B, 0x5E, 0x32, 0x6C, 0xEA,
 0x03, 0x63, 0x00, 0xEF, 0x30, 0xF0, 0x20, 0x6A,
-0x25, 0xF7, 0x10, 0x4A, 0xE2, 0xF6, 0x94, 0xA2,
+0x85, 0xF5, 0x18, 0x4A, 0xE2, 0xF6, 0x9C, 0xA2,
 0x01, 0x6B, 0x8C, 0xEB, 0x0A, 0x23, 0xE2, 0xF6,
-0x90, 0xA2, 0x02, 0x6B, 0x6B, 0xEB, 0x8C, 0xEB,
+0x98, 0xA2, 0x02, 0x6B, 0x6B, 0xEB, 0x8C, 0xEB,
 0x03, 0x6C, 0x8B, 0xEC, 0x8C, 0xEB, 0xE2, 0xF6,
-0x70, 0xC2, 0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6A,
-0x25, 0xF7, 0x10, 0x4A, 0xE2, 0xF6, 0x94, 0xA2,
+0x78, 0xC2, 0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6A,
+0x85, 0xF5, 0x18, 0x4A, 0xE2, 0xF6, 0x9C, 0xA2,
 0x01, 0x6B, 0x8C, 0xEB, 0x0A, 0x23, 0xE2, 0xF6,
-0x90, 0xA2, 0x02, 0x6B, 0x6B, 0xEB, 0x8C, 0xEB,
+0x98, 0xA2, 0x02, 0x6B, 0x6B, 0xEB, 0x8C, 0xEB,
 0x03, 0x6C, 0x8B, 0xEC, 0x8C, 0xEB, 0xE2, 0xF6,
-0x70, 0xC2, 0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6A,
-0x25, 0xF7, 0x10, 0x4A, 0xE2, 0xF6, 0x94, 0xA2,
+0x78, 0xC2, 0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6A,
+0x85, 0xF5, 0x18, 0x4A, 0xE2, 0xF6, 0x9C, 0xA2,
 0x01, 0x6B, 0x8C, 0xEB, 0x0A, 0x23, 0xE2, 0xF6,
-0x90, 0xA2, 0x02, 0x6B, 0x6B, 0xEB, 0x8C, 0xEB,
+0x98, 0xA2, 0x02, 0x6B, 0x6B, 0xEB, 0x8C, 0xEB,
 0x03, 0x6C, 0x8B, 0xEC, 0x8C, 0xEB, 0xE2, 0xF6,
-0x70, 0xC2, 0x20, 0xE8, 0xFC, 0x63, 0x07, 0x62,
+0x78, 0xC2, 0x20, 0xE8, 0xFC, 0x63, 0x07, 0x62,
 0x06, 0xD1, 0x05, 0xD0, 0x30, 0xF0, 0x20, 0x6A,
-0x25, 0xF7, 0x10, 0x4A, 0x80, 0xF0, 0x9D, 0xA2,
+0x85, 0xF5, 0x18, 0x4A, 0x80, 0xF0, 0x9E, 0xA2,
 0x02, 0x6B, 0x8C, 0xEB, 0x0B, 0x23, 0x30, 0xF0,
-0x20, 0x6B, 0xC1, 0xF5, 0x94, 0x9B, 0xBF, 0x6B,
+0x20, 0x6B, 0x61, 0xF4, 0x9C, 0x9B, 0xBF, 0x6B,
 0xA0, 0xA4, 0xAC, 0xEB, 0x60, 0xC4, 0x00, 0x6B,
-0xE2, 0xF6, 0x71, 0xC2, 0x30, 0xF0, 0x20, 0x69,
-0x25, 0xF7, 0x10, 0x49, 0xE2, 0xF6, 0x74, 0xA1,
+0xE2, 0xF6, 0x79, 0xC2, 0x30, 0xF0, 0x20, 0x69,
+0x85, 0xF5, 0x18, 0x49, 0xE2, 0xF6, 0x7C, 0xA1,
 0x02, 0x6A, 0x6C, 0xEA, 0x0D, 0x22, 0xE2, 0xF6,
-0x16, 0xA1, 0x90, 0x67, 0x00, 0x18, 0x21, 0x42,
+0x1E, 0xA1, 0x90, 0x67, 0x00, 0x18, 0xB1, 0x46,
 0xBF, 0x6D, 0x4C, 0xED, 0x90, 0x67, 0x00, 0x18,
-0x14, 0x42, 0x00, 0x6A, 0xE2, 0xF6, 0x51, 0xC1,
+0xA4, 0x46, 0x00, 0x6A, 0xE2, 0xF6, 0x59, 0xC1,
 0x07, 0x97, 0x06, 0x91, 0x05, 0x90, 0x04, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6A,
-0x25, 0xF7, 0x10, 0x4A, 0x80, 0xF0, 0x9D, 0xA2,
+0x85, 0xF5, 0x18, 0x4A, 0x80, 0xF0, 0x9E, 0xA2,
 0x02, 0x6B, 0x8C, 0xEB, 0x03, 0x23, 0x01, 0x6B,
-0xE2, 0xF6, 0x71, 0xC2, 0x30, 0xF0, 0x20, 0x6A,
-0x25, 0xF7, 0x10, 0x4A, 0xE2, 0xF6, 0x94, 0xA2,
+0xE2, 0xF6, 0x79, 0xC2, 0x30, 0xF0, 0x20, 0x6A,
+0x85, 0xF5, 0x18, 0x4A, 0xE2, 0xF6, 0x9C, 0xA2,
 0x02, 0x6B, 0x8C, 0xEB, 0x03, 0x23, 0x01, 0x6B,
-0xE2, 0xF6, 0x71, 0xC2, 0x20, 0xE8, 0x00, 0x65,
-0x30, 0xF0, 0x20, 0x6A, 0x25, 0xF7, 0x10, 0x4A,
-0x80, 0xF0, 0x9D, 0xA2, 0x01, 0x6B, 0x8C, 0xEB,
-0x05, 0x23, 0xE2, 0xF6, 0x51, 0xA2, 0x02, 0x72,
+0xE2, 0xF6, 0x79, 0xC2, 0x20, 0xE8, 0x00, 0x65,
+0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5, 0x18, 0x4A,
+0x80, 0xF0, 0x9E, 0xA2, 0x01, 0x6B, 0x8C, 0xEB,
+0x05, 0x23, 0xE2, 0xF6, 0x59, 0xA2, 0x02, 0x72,
 0x00, 0x6A, 0x10, 0x61, 0x30, 0xF0, 0x20, 0x6B,
-0x25, 0xF7, 0x10, 0x4B, 0xE2, 0xF6, 0x54, 0xA3,
+0x85, 0xF5, 0x18, 0x4B, 0xE2, 0xF6, 0x5C, 0xA3,
 0x01, 0x6C, 0x4C, 0xEC, 0x01, 0x6A, 0x06, 0x24,
-0xE2, 0xF6, 0x51, 0xA3, 0x02, 0x6B, 0x6E, 0xEA,
+0xE2, 0xF6, 0x59, 0xA3, 0x02, 0x6B, 0x6E, 0xEA,
 0x01, 0x5A, 0x58, 0x67, 0x20, 0xE8, 0x00, 0x65,
-0x30, 0xF0, 0x20, 0x6A, 0x28, 0xF6, 0x45, 0xA2,
+0x30, 0xF0, 0x20, 0x6A, 0x88, 0xF4, 0x55, 0xA2,
 0x05, 0x5A, 0xE0, 0xF0, 0x0C, 0x60, 0x30, 0xF0,
-0x20, 0x6B, 0x48, 0x32, 0xE1, 0xF0, 0x04, 0x4B,
+0x20, 0x6B, 0x48, 0x32, 0x40, 0xF7, 0x14, 0x4B,
 0x4D, 0xE3, 0x40, 0x9B, 0x00, 0xEA, 0x30, 0xF0,
-0x20, 0x6B, 0x25, 0xF7, 0x10, 0x4B, 0xE2, 0xF6,
-0x94, 0xA3, 0x04, 0x6A, 0xFF, 0x6D, 0x8C, 0xEA,
-0x19, 0x22, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1,
-0x8C, 0x9A, 0x02, 0x6E, 0x40, 0xA4, 0xAC, 0xEA,
+0x20, 0x6B, 0x85, 0xF5, 0x18, 0x4B, 0xE2, 0xF6,
+0x9C, 0xA3, 0x04, 0x6A, 0xFF, 0x6D, 0x8C, 0xEA,
+0x19, 0x22, 0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF7,
+0x98, 0x9A, 0x02, 0x6E, 0x40, 0xA4, 0xAC, 0xEA,
 0xCD, 0xEA, 0xAC, 0xEA, 0x40, 0xC4, 0x30, 0xF0,
-0x20, 0x6A, 0x02, 0xF0, 0x84, 0x9A, 0xF8, 0x6A,
+0x20, 0x6A, 0xA1, 0xF6, 0x90, 0x9A, 0xF8, 0x6A,
 0xA0, 0xA4, 0xAC, 0xEA, 0x40, 0xC4, 0x30, 0xF0,
-0x20, 0x6A, 0xE2, 0xF6, 0x78, 0xA3, 0x22, 0xF1,
-0x50, 0x9A, 0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A,
-0x41, 0xF1, 0x6C, 0x9A, 0x83, 0x10, 0x30, 0xF0,
-0x20, 0x6B, 0x25, 0xF7, 0x10, 0x4B, 0xE2, 0xF6,
-0xB4, 0xA3, 0x04, 0x6A, 0xFF, 0x6C, 0xAC, 0xEA,
-0x1D, 0x22, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1,
-0xB0, 0x9A, 0x02, 0x6E, 0x40, 0xA5, 0x8C, 0xEA,
+0x20, 0x6A, 0x02, 0xF7, 0x60, 0xA3, 0x22, 0xF0,
+0x44, 0x9A, 0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A,
+0xA0, 0xF7, 0x78, 0x9A, 0x83, 0x10, 0x30, 0xF0,
+0x20, 0x6B, 0x85, 0xF5, 0x18, 0x4B, 0xE2, 0xF6,
+0xBC, 0xA3, 0x04, 0x6A, 0xFF, 0x6C, 0xAC, 0xEA,
+0x1D, 0x22, 0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF7,
+0xBC, 0x9A, 0x02, 0x6E, 0x40, 0xA5, 0x8C, 0xEA,
 0xCD, 0xEA, 0x8C, 0xEA, 0x40, 0xC5, 0x30, 0xF0,
-0x20, 0x6A, 0x02, 0xF0, 0xA4, 0x9A, 0xF6, 0x4E,
+0x20, 0x6A, 0xA1, 0xF6, 0xB0, 0x9A, 0xF6, 0x4E,
 0x40, 0xA5, 0x8C, 0xEA, 0xCC, 0xEA, 0x01, 0x6E,
 0xCD, 0xEA, 0x8C, 0xEA, 0x40, 0xC5, 0x30, 0xF0,
-0x20, 0x6A, 0xE2, 0xF6, 0x78, 0xA3, 0x22, 0xF1,
-0x50, 0x9A, 0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A,
-0x41, 0xF1, 0x70, 0x9A, 0x57, 0x10, 0x30, 0xF0,
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+0xA1, 0xF6, 0x1C, 0x6C, 0xB0, 0x67, 0x21, 0xF0,
+0x1B, 0x6E, 0x2C, 0x10, 0x30, 0xF0, 0x20, 0x6A,
+0x61, 0xF1, 0x20, 0x9A, 0x01, 0x68, 0x0B, 0xE8,
+0xA1, 0xF4, 0x10, 0x6C, 0xB0, 0x67, 0xD1, 0x67,
+0x00, 0x18, 0x6B, 0x2C, 0xA1, 0xF4, 0x14, 0x6C,
+0xB0, 0x67, 0x6E, 0xF7, 0x17, 0x6E, 0x00, 0x18,
+0x6B, 0x2C, 0xFF, 0x6E, 0xA1, 0xF4, 0x1C, 0x6C,
+0xB0, 0x67, 0x01, 0x4E, 0x00, 0x18, 0x6B, 0x2C,
+0xA1, 0xF6, 0x10, 0x6C, 0xB0, 0x67, 0xD1, 0x67,
+0x00, 0x18, 0x6B, 0x2C, 0xA1, 0xF6, 0x14, 0x6C,
+0xB0, 0x67, 0x6E, 0xF7, 0x17, 0x6E, 0x00, 0x18,
+0x6B, 0x2C, 0xFF, 0x6E, 0xA1, 0xF6, 0x1C, 0x6C,
+0xB0, 0x67, 0x01, 0x4E, 0x00, 0x18, 0x6B, 0x2C,
+0x07, 0x97, 0x06, 0x91, 0x05, 0x90, 0x04, 0x63,
+0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
+0x04, 0xD0, 0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF0,
+0x54, 0x9A, 0x7F, 0x6B, 0x01, 0xF1, 0x0C, 0x6C,
+0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF7,
+0x58, 0x9A, 0x14, 0x6B, 0x10, 0xF0, 0x00, 0x6D,
+0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF7,
+0x5C, 0x9A, 0x10, 0x6B, 0x01, 0x6E, 0x60, 0xC2,
+0x00, 0x18, 0x6B, 0x2C, 0x30, 0xF0, 0x20, 0x6A,
+0xA0, 0xF7, 0xA8, 0x9A, 0xA1, 0xF1, 0x04, 0x6C,
+0x00, 0x6E, 0x00, 0x18, 0x6B, 0x2C, 0x01, 0x6D,
+0xC5, 0x67, 0x81, 0xF4, 0x14, 0x6C, 0x00, 0x18,
+0x6B, 0x2C, 0x01, 0x68, 0x01, 0x6D, 0xC5, 0x67,
+0x0B, 0xE8, 0x81, 0xF6, 0x14, 0x6C, 0x00, 0x18,
+0x6B, 0x2C, 0xB0, 0x67, 0x01, 0xF4, 0x00, 0x6C,
+0x04, 0x6E, 0x00, 0x18, 0x6B, 0x2C, 0xB0, 0x67,
+0x01, 0xF6, 0x00, 0x6C, 0x04, 0x6E, 0x00, 0x18,
+0x6B, 0x2C, 0xFF, 0x6D, 0x01, 0xF3, 0x00, 0x6C,
+0x01, 0x4D, 0x00, 0x6E, 0x00, 0x18, 0x6B, 0x2C,
+0x05, 0x97, 0x04, 0x90, 0x03, 0x63, 0x00, 0xEF,
 0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
 0x00, 0x6A, 0x0B, 0xD7, 0xE0, 0xAE, 0x1F, 0xF7,
 0x00, 0x6B, 0xEC, 0xEB, 0x02, 0xF0, 0x00, 0x73,
 0x01, 0x60, 0x09, 0x2B, 0x30, 0xF0, 0x20, 0x6B,
-0xE0, 0xAE, 0x41, 0xF1, 0x60, 0x9B, 0x6D, 0xE7,
+0xE0, 0xAE, 0xE1, 0xF0, 0x7C, 0x9B, 0x6D, 0xE7,
 0xE0, 0xA4, 0xE0, 0xC3, 0x07, 0x10, 0x30, 0xF0,
-0x20, 0x6B, 0x41, 0xF1, 0x64, 0x9B, 0x7D, 0xE7,
+0x20, 0x6B, 0x01, 0xF1, 0x60, 0x9B, 0x7D, 0xE7,
 0x60, 0xA4, 0x60, 0xC7, 0x01, 0x4A, 0xFF, 0x6B,
 0x6C, 0xEA, 0x03, 0x72, 0x02, 0x4E, 0x01, 0x4C,
 0xE1, 0x61, 0x25, 0x67, 0x00, 0x68, 0x0B, 0x93,
 0xC0, 0x99, 0x01, 0x6D, 0x09, 0xE3, 0x80, 0xAA,
-0xAB, 0xED, 0x02, 0x48, 0x00, 0x18, 0x72, 0x28,
-0x1A, 0x70, 0x04, 0x49, 0xF4, 0x61, 0x07, 0x97,
+0xAB, 0xED, 0x02, 0x48, 0x00, 0x18, 0x6B, 0x2C,
+0x1C, 0x70, 0x04, 0x49, 0xF4, 0x61, 0x07, 0x97,
 0x06, 0x91, 0x05, 0x90, 0x04, 0x63, 0x00, 0xEF,
 0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
-0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF2, 0x04, 0x4A,
+0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF1, 0x04, 0x4A,
 0xC0, 0x9A, 0x01, 0x69, 0x03, 0xF3, 0x00, 0x68,
 0x2B, 0xE9, 0x90, 0x67, 0xB1, 0x67, 0x00, 0x18,
-0x72, 0x28, 0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF2,
+0x6B, 0x2C, 0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF1,
 0xC8, 0x9A, 0x90, 0x67, 0xB1, 0x67, 0x00, 0x18,
-0x72, 0x28, 0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF2,
+0x6B, 0x2C, 0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF1,
 0xCC, 0x9A, 0x90, 0x67, 0xB1, 0x67, 0x00, 0x18,
-0x72, 0x28, 0x30, 0xF0, 0x20, 0x6B, 0xE1, 0xF2,
+0x6B, 0x2C, 0x30, 0xF0, 0x20, 0x6B, 0x61, 0xF1,
 0x04, 0x4B, 0xC0, 0x9B, 0x90, 0x67, 0xB1, 0x67,
-0x00, 0x18, 0x72, 0x28, 0x07, 0x97, 0x06, 0x91,
+0x00, 0x18, 0x6B, 0x2C, 0x07, 0x97, 0x06, 0x91,
 0x05, 0x90, 0x04, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFB, 0x63, 0x09, 0x62, 0x08, 0xD1, 0x07, 0xD0,
-0xFF, 0x68, 0x8C, 0xE8, 0x63, 0xF2, 0x8A, 0x40,
-0x30, 0xF0, 0x20, 0x6A, 0x76, 0xF5, 0xA0, 0x40,
-0x25, 0xF7, 0x10, 0x4A, 0xA4, 0x35, 0x88, 0x34,
-0x00, 0x6B, 0x91, 0xE2, 0xA9, 0xE2, 0xA4, 0x42,
-0x06, 0x4C, 0x04, 0x6A, 0x04, 0xD3, 0x23, 0x67,
-0x05, 0xD3, 0x60, 0xA4, 0x01, 0x6E, 0xEC, 0x42,
-0xCC, 0xEB, 0x64, 0xEF, 0x05, 0x97, 0x7D, 0xE7,
-0x61, 0xA4, 0x05, 0xD7, 0x03, 0x6F, 0xCC, 0xEB,
-0x64, 0xEA, 0x65, 0xE1, 0x60, 0xA5, 0x44, 0x36,
-0x01, 0x4A, 0xEC, 0xEB, 0x64, 0xEE, 0x04, 0x96,
-0x08, 0x72, 0x02, 0x4C, 0x79, 0xE6, 0x04, 0xD6,
-0x01, 0x4D, 0xE7, 0x61, 0x30, 0xF0, 0x20, 0x6A,
-0xE1, 0xF2, 0xC4, 0x9A, 0x01, 0x6D, 0x03, 0xF3,
-0x00, 0x6C, 0xAB, 0xED, 0x00, 0x18, 0x72, 0x28,
-0x05, 0x97, 0x30, 0xF0, 0x20, 0x6A, 0x04, 0x96,
-0xE1, 0xF2, 0xB0, 0x9A, 0xED, 0xE9, 0x2D, 0xEE,
-0xE3, 0xF3, 0x10, 0x6C, 0x30, 0xF0, 0x20, 0x69,
-0x00, 0x18, 0x72, 0x28, 0x25, 0xF7, 0x10, 0x49,
-0x0C, 0x32, 0x29, 0xE2, 0x04, 0xD2, 0xED, 0xF2,
-0xDC, 0x9A, 0x51, 0xF5, 0x4F, 0x40, 0x4C, 0x32,
-0x29, 0xE2, 0x40, 0x9A, 0xC0, 0x36, 0xC0, 0x36,
-0x01, 0x6D, 0x4D, 0xEE, 0xE3, 0xF3, 0x08, 0x6C,
-0xAB, 0xED, 0x00, 0x18, 0x72, 0x28, 0x04, 0x92,
-0x61, 0xF5, 0x00, 0x48, 0x0C, 0x30, 0x0D, 0xF3,
-0xC4, 0x9A, 0x25, 0xE0, 0x40, 0x99, 0xC0, 0x36,
-0xC0, 0x36, 0x01, 0x6D, 0xE3, 0xF3, 0x0C, 0x6C,
-0xAB, 0xED, 0x4D, 0xEE, 0x00, 0x18, 0x72, 0x28,
-0x09, 0x97, 0x08, 0x91, 0x07, 0x90, 0x05, 0x63,
-0x00, 0xEF, 0x00, 0x65, 0xF8, 0x63, 0x0F, 0x62,
+0xFF, 0x68, 0x8C, 0xE8, 0x22, 0xF3, 0x8A, 0x40,
+0x30, 0xF0, 0x20, 0x6A, 0xF4, 0xF6, 0xA0, 0x40,
+0x85, 0xF5, 0x18, 0x4A, 0xA4, 0x35, 0x88, 0x34,
+0x91, 0xE2, 0xA9, 0xE2, 0x00, 0x6B, 0xA7, 0x42,
+0x0B, 0x4C, 0x01, 0x4D, 0x04, 0x6A, 0x04, 0xD3,
+0x23, 0x67, 0x05, 0xD3, 0x60, 0xA4, 0x01, 0x6E,
+0xEC, 0x42, 0xCC, 0xEB, 0x64, 0xEF, 0x05, 0x97,
+0x7D, 0xE7, 0x61, 0xA4, 0x05, 0xD7, 0x03, 0x6F,
+0xCC, 0xEB, 0x64, 0xEA, 0x65, 0xE1, 0x60, 0xA5,
+0x44, 0x36, 0x01, 0x4A, 0xEC, 0xEB, 0x64, 0xEE,
+0x04, 0x96, 0x08, 0x72, 0x02, 0x4C, 0x79, 0xE6,
+0x04, 0xD6, 0x01, 0x4D, 0xE7, 0x61, 0x30, 0xF0,
+0x20, 0x6A, 0x61, 0xF1, 0xC4, 0x9A, 0x01, 0x6D,
+0x03, 0xF3, 0x00, 0x6C, 0xAB, 0xED, 0x00, 0x18,
+0x6B, 0x2C, 0x05, 0x97, 0x30, 0xF0, 0x20, 0x6A,
+0x04, 0x96, 0x61, 0xF1, 0xB0, 0x9A, 0xED, 0xE9,
+0x2D, 0xEE, 0xE3, 0xF3, 0x10, 0x6C, 0x30, 0xF0,
+0x20, 0x69, 0x00, 0x18, 0x6B, 0x2C, 0x85, 0xF5,
+0x18, 0x49, 0x08, 0x32, 0x29, 0xE2, 0x04, 0xD2,
+0xE9, 0xF5, 0xDE, 0xAA, 0x72, 0xF3, 0x4E, 0x40,
+0x48, 0x32, 0x29, 0xE2, 0x42, 0xAA, 0xC0, 0x36,
+0xC0, 0x36, 0x01, 0x6D, 0x4D, 0xEE, 0xE3, 0xF3,
+0x08, 0x6C, 0xAB, 0xED, 0x00, 0x18, 0x6B, 0x2C,
+0x04, 0x92, 0x62, 0xF3, 0x1F, 0x48, 0x08, 0x30,
+0x09, 0xF6, 0xC2, 0xAA, 0x25, 0xE0, 0x42, 0xA9,
+0xC0, 0x36, 0xC0, 0x36, 0x01, 0x6D, 0xE3, 0xF3,
+0x0C, 0x6C, 0xAB, 0xED, 0x4D, 0xEE, 0x00, 0x18,
+0x6B, 0x2C, 0x09, 0x97, 0x08, 0x91, 0x07, 0x90,
+0x05, 0x63, 0x00, 0xEF, 0xF8, 0x63, 0x0F, 0x62,
 0x0E, 0xD1, 0x0D, 0xD0, 0x00, 0x6A, 0x07, 0xD2,
 0x08, 0xD2, 0x09, 0xD2, 0x0A, 0xD2, 0x0B, 0xD2,
 0xA2, 0x9C, 0x3D, 0x67, 0x1C, 0xA1, 0x01, 0x6E,
@@ -20396,902 +21658,985 @@ u8 array_mp_8822b_fw_nic[] = {
 0x80, 0xF0, 0x1B, 0x22, 0xBD, 0x67, 0x5C, 0xA5,
 0xFF, 0x6B, 0x52, 0x32, 0x0C, 0xEA, 0x6C, 0xEA,
 0x03, 0x22, 0x02, 0x72, 0x38, 0x60, 0x91, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF2, 0x34, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF1, 0x34, 0x9A,
 0x81, 0xF4, 0x14, 0x6C, 0x00, 0x6E, 0xB1, 0x67,
-0x00, 0x18, 0x72, 0x28, 0xFD, 0x67, 0x5D, 0xA7,
-0x30, 0xF0, 0x20, 0x68, 0x20, 0xF1, 0x10, 0x48,
+0x00, 0x18, 0x6B, 0x2C, 0xFD, 0x67, 0x5D, 0xA7,
+0x30, 0xF0, 0x20, 0x68, 0xE0, 0xF0, 0x0C, 0x48,
 0x44, 0x32, 0x30, 0xF0, 0x20, 0x6B, 0x09, 0xE2,
-0xE1, 0xF2, 0x18, 0x4B, 0xA0, 0x9B, 0xC0, 0xAA,
-0x01, 0xF4, 0x1C, 0x6C, 0x00, 0x18, 0x72, 0x28,
+0x61, 0xF1, 0x18, 0x4B, 0xA0, 0x9B, 0xC0, 0xAA,
+0x01, 0xF4, 0x1C, 0x6C, 0x00, 0x18, 0x6B, 0x2C,
 0xB1, 0x67, 0x81, 0xF6, 0x14, 0x6C, 0x00, 0x6E,
-0x00, 0x18, 0x72, 0x28, 0x9D, 0x67, 0x5D, 0xA4,
-0x30, 0xF0, 0x20, 0x6F, 0xE1, 0xF2, 0x18, 0x4F,
+0x00, 0x18, 0x6B, 0x2C, 0x9D, 0x67, 0x5D, 0xA4,
+0x30, 0xF0, 0x20, 0x6F, 0x61, 0xF1, 0x18, 0x4F,
 0x44, 0x32, 0x01, 0xE2, 0xA0, 0x9F, 0xC0, 0xA8,
-0x01, 0xF6, 0x1C, 0x6C, 0x00, 0x18, 0x72, 0x28,
-0x30, 0xF0, 0x20, 0x6C, 0x42, 0xF1, 0x10, 0x4C,
-0x00, 0x18, 0x01, 0x50, 0x5A, 0x10, 0x3D, 0x67,
+0x01, 0xF6, 0x1C, 0x6C, 0x00, 0x18, 0x6B, 0x2C,
+0x30, 0xF0, 0x20, 0x6C, 0x42, 0xF0, 0x18, 0x4C,
+0x00, 0x18, 0xD9, 0x55, 0x5A, 0x10, 0x3D, 0x67,
 0x9D, 0xA1, 0x20, 0xF0, 0xA0, 0xA1, 0x20, 0xF0,
 0xC1, 0x81, 0x06, 0x07, 0x00, 0xF0, 0x19, 0x02,
-0x04, 0xD2, 0x00, 0x18, 0xAF, 0x47, 0xB8, 0xA1,
-0xD9, 0xA1, 0x30, 0xF0, 0x20, 0x6C, 0x42, 0xF1,
-0x1C, 0x4C, 0x00, 0x18, 0x01, 0x50, 0x30, 0xF0,
-0x20, 0x6A, 0xE1, 0xF2, 0x34, 0x9A, 0x7D, 0x67,
+0x04, 0xD2, 0x00, 0x18, 0xDE, 0x4C, 0xB8, 0xA1,
+0xD9, 0xA1, 0x30, 0xF0, 0x20, 0x6C, 0x62, 0xF0,
+0x04, 0x4C, 0x00, 0x18, 0xD9, 0x55, 0x30, 0xF0,
+0x20, 0x6A, 0x61, 0xF1, 0x34, 0x9A, 0x7D, 0x67,
 0xD8, 0xA3, 0xB1, 0x67, 0x81, 0xF4, 0x14, 0x6C,
-0x00, 0x18, 0x72, 0x28, 0x9D, 0x67, 0x59, 0xA4,
-0x30, 0xF0, 0x20, 0x68, 0x20, 0xF1, 0x10, 0x48,
+0x00, 0x18, 0x6B, 0x2C, 0x9D, 0x67, 0x59, 0xA4,
+0x30, 0xF0, 0x20, 0x68, 0xE0, 0xF0, 0x0C, 0x48,
 0x44, 0x32, 0x30, 0xF0, 0x20, 0x6F, 0x09, 0xE2,
-0xE1, 0xF2, 0x18, 0x4F, 0xA0, 0x9F, 0xC0, 0xAA,
-0x01, 0xF4, 0x1C, 0x6C, 0x00, 0x18, 0x72, 0x28,
+0x61, 0xF1, 0x18, 0x4F, 0xA0, 0x9F, 0xC0, 0xAA,
+0x01, 0xF4, 0x1C, 0x6C, 0x00, 0x18, 0x6B, 0x2C,
 0x5D, 0x67, 0x9D, 0xA2, 0x20, 0xF0, 0xA4, 0xA2,
 0x20, 0xF0, 0xC5, 0x82, 0x00, 0xF0, 0x19, 0x03,
-0x06, 0x07, 0x04, 0xD3, 0x00, 0x18, 0xAF, 0x47,
+0x06, 0x07, 0x04, 0xD3, 0x00, 0x18, 0xDE, 0x4C,
 0xFD, 0x67, 0xB8, 0xA7, 0xD9, 0xA7, 0x30, 0xF0,
-0x20, 0x6C, 0x62, 0xF1, 0x1C, 0x4C, 0x00, 0x18,
-0x01, 0x50, 0xB1, 0x67, 0x3D, 0x67, 0xD8, 0xA1,
-0x81, 0xF6, 0x14, 0x6C, 0x00, 0x18, 0x72, 0x28,
+0x20, 0x6C, 0x82, 0xF0, 0x04, 0x4C, 0x00, 0x18,
+0xD9, 0x55, 0xB1, 0x67, 0x3D, 0x67, 0xD8, 0xA1,
+0x81, 0xF6, 0x14, 0x6C, 0x00, 0x18, 0x6B, 0x2C,
 0x59, 0xA1, 0x01, 0xF6, 0x1C, 0x6C, 0x44, 0x32,
-0x01, 0xE2, 0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF2,
+0x01, 0xE2, 0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF1,
 0x18, 0x4A, 0xA0, 0x9A, 0xC0, 0xA8, 0x00, 0x18,
-0x72, 0x28, 0x0F, 0x97, 0x0E, 0x91, 0x0D, 0x90,
+0x6B, 0x2C, 0x0F, 0x97, 0x0E, 0x91, 0x0D, 0x90,
 0x00, 0x6A, 0x08, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xF8, 0x63, 0x0F, 0x62, 0x0E, 0xD1, 0x0D, 0xD0,
-0x30, 0xF0, 0x20, 0x68, 0x25, 0xF7, 0x10, 0x48,
-0x8D, 0xF1, 0x5A, 0xA0, 0x77, 0x2A, 0x30, 0xF0,
-0x20, 0x6C, 0x82, 0xF1, 0x1C, 0x4C, 0x00, 0x18,
-0x01, 0x50, 0x01, 0x6A, 0x30, 0xF0, 0x21, 0x6C,
-0x30, 0xF0, 0x21, 0x6B, 0xAD, 0xF1, 0x48, 0xC0,
-0xAD, 0xF1, 0x49, 0xC0, 0xF3, 0xF0, 0x18, 0x4C,
-0x13, 0xF1, 0x10, 0x4B, 0x00, 0x6A, 0x00, 0x6D,
-0xA0, 0xDC, 0x51, 0xF5, 0xCD, 0x42, 0x30, 0xF0,
-0x20, 0x6D, 0x25, 0xF7, 0x10, 0x4D, 0xCC, 0x36,
-0xD9, 0xE5, 0x04, 0xD6, 0x06, 0x6E, 0xD8, 0xEA,
-0x06, 0xD3, 0x12, 0xEE, 0xCD, 0xF2, 0x10, 0x4E,
-0xD9, 0xE5, 0x00, 0x6D, 0x04, 0x90, 0x00, 0x6F,
-0xE0, 0xD8, 0xE4, 0xD8, 0x44, 0x30, 0x01, 0xE5,
-0xC6, 0xF4, 0x14, 0x48, 0x30, 0xF0, 0x20, 0x6F,
-0x04, 0x30, 0x25, 0xF7, 0x10, 0x4F, 0x1D, 0xE7,
-0x06, 0x4F, 0x08, 0xD7, 0x06, 0x97, 0x00, 0x68,
-0x05, 0xD0, 0x07, 0xD7, 0x08, 0x90, 0x01, 0x6F,
-0x44, 0x31, 0xE0, 0xC0, 0x05, 0x97, 0xA5, 0xE1,
-0x24, 0x31, 0x25, 0xE7, 0x90, 0xF6, 0x0D, 0x41,
-0x30, 0xF0, 0x20, 0x6F, 0xA0, 0xF6, 0x05, 0x49,
-0x25, 0xF7, 0x10, 0x4F, 0x10, 0x30, 0x30, 0x31,
-0x01, 0xE7, 0x25, 0xE7, 0x0A, 0xD2, 0x07, 0x92,
-0x00, 0x6F, 0xE0, 0xC8, 0x02, 0x48, 0x4A, 0xE8,
-0xE0, 0xC9, 0x02, 0x49, 0xF8, 0x61, 0x05, 0x90,
-0x0A, 0x92, 0x01, 0x48, 0x05, 0xD0, 0x08, 0x90,
-0x01, 0x48, 0x08, 0xD0, 0x07, 0x90, 0x10, 0x48,
-0x07, 0xD0, 0x05, 0x90, 0x02, 0x70, 0xD6, 0x61,
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+0x44, 0x67, 0x82, 0x10, 0x25, 0x73, 0x04, 0x60,
+0x60, 0xA5, 0x60, 0xC2, 0x01, 0x4A, 0x7B, 0x10,
+0x61, 0x85, 0x62, 0x73, 0x7D, 0x67, 0x20, 0x61,
+0x62, 0x85, 0x78, 0x73, 0x03, 0x60, 0x58, 0x73,
+0x7D, 0x67, 0x1A, 0x61, 0x82, 0x85, 0x60, 0xA6,
+0x78, 0x6F, 0xEE, 0xEC, 0x30, 0xF0, 0x20, 0x6F,
+0x72, 0x30, 0xE2, 0xF2, 0x18, 0x4F, 0xE1, 0xE0,
+0x00, 0xA0, 0x01, 0x5C, 0x98, 0x67, 0x94, 0x34,
+0x8D, 0xE8, 0x3D, 0x67, 0x00, 0xC1, 0x0F, 0x68,
+0x6C, 0xE8, 0xFD, 0xE0, 0x60, 0xA7, 0x02, 0x4D,
+0x8D, 0xEB, 0x61, 0xC1, 0x00, 0xF0, 0x02, 0x03,
+0x81, 0x85, 0x77, 0x74, 0x26, 0x61, 0x82, 0x85,
+0x78, 0x74, 0x02, 0x60, 0x58, 0x74, 0x21, 0x61,
+0x80, 0xAE, 0x06, 0xD3, 0x07, 0xD4, 0x82, 0x85,
+0x78, 0x74, 0xF8, 0x67, 0x01, 0x5F, 0x18, 0x67,
+0x14, 0x30, 0x18, 0x65, 0x0C, 0x6C, 0x07, 0x97,
+0x0F, 0x68, 0x30, 0xF0, 0x20, 0x69, 0xE7, 0xEC,
+0x0C, 0xEF, 0xE2, 0xF2, 0x18, 0x49, 0x3D, 0xE7,
+0xE0, 0xA7, 0x06, 0x90, 0x38, 0x67, 0x2D, 0xEF,
+0xFC, 0x4C, 0xE0, 0xC0, 0x01, 0x48, 0xE4, 0x44,
+0x06, 0xD0, 0xED, 0x2F, 0x04, 0x4B, 0x02, 0x4D,
+0x25, 0x10, 0x81, 0x85, 0x78, 0x74, 0x02, 0x60,
+0x58, 0x74, 0x20, 0x61, 0x81, 0x85, 0x20, 0x9E,
+0x06, 0xD3, 0x78, 0x74, 0x98, 0x67, 0x01, 0x5C,
+0xF8, 0x67, 0xF4, 0x37, 0x07, 0xD1, 0x1F, 0x65,
+0x1C, 0x6C, 0x07, 0x97, 0x0F, 0x68, 0x30, 0xF0,
+0x20, 0x69, 0xE6, 0xEC, 0x0C, 0xEF, 0xE2, 0xF2,
+0x18, 0x49, 0x3D, 0xE7, 0xE0, 0xA7, 0x06, 0x91,
+0x18, 0x67, 0x0D, 0xEF, 0xFC, 0x4C, 0xE0, 0xC1,
+0x01, 0x49, 0xE4, 0x44, 0x06, 0xD1, 0xED, 0x2F,
+0x08, 0x4B, 0x01, 0x4D, 0x9D, 0x67, 0x04, 0x10,
+0xE0, 0xA4, 0x01, 0x4C, 0xE0, 0xC2, 0x01, 0x4A,
+0x63, 0xEC, 0xFA, 0x61, 0x04, 0x4E, 0x01, 0x4D,
+0x60, 0x85, 0x7F, 0xF7, 0x1B, 0x2B, 0x0A, 0x94,
+0x01, 0x24, 0x60, 0xC2, 0x0A, 0x97, 0x09, 0x91,
+0x08, 0x90, 0xEB, 0xE2, 0x05, 0x63, 0x20, 0xE8,
+0xFD, 0x63, 0x05, 0x62, 0xFF, 0x6A, 0x8C, 0xEA,
+0x0E, 0x72, 0x03, 0x60, 0x0F, 0x72, 0x05, 0x60,
+0x08, 0x10, 0x85, 0x67, 0x00, 0x18, 0x62, 0x54,
+0x10, 0x10, 0x85, 0x67, 0x00, 0x18, 0xC3, 0x4D,
+0x0C, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF1,
+0x68, 0x9A, 0x30, 0xF0, 0x20, 0x6C, 0x01, 0xF0,
+0x98, 0x9C, 0x40, 0x9B, 0x8D, 0xEA, 0x40, 0xDB,
+0xFF, 0x6A, 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF,
+0xFD, 0x63, 0x05, 0x62, 0x60, 0xA4, 0x30, 0xF0,
+0x20, 0x6A, 0x85, 0xF5, 0x18, 0x4A, 0x05, 0xF6,
+0x64, 0xC2, 0x61, 0xA4, 0xE5, 0xF5, 0x7A, 0xC2,
+0x62, 0xA4, 0x05, 0xF6, 0x63, 0xC2, 0xA3, 0xA4,
+0x0F, 0x6B, 0xAC, 0xEB, 0x05, 0xF6, 0x69, 0xC2,
+0x63, 0xA4, 0x30, 0xF0, 0x20, 0x6C, 0x8B, 0xF3,
+0x08, 0x4C, 0x72, 0x33, 0x05, 0xF6, 0x68, 0xC2,
+0x01, 0x6D, 0x00, 0x18, 0x2B, 0x6A, 0x05, 0x97,
 0x03, 0x63, 0x00, 0xEF, 0xFB, 0x63, 0x09, 0x62,
 0x08, 0xD0, 0x60, 0xA4, 0x41, 0xA4, 0x82, 0xA4,
 0x00, 0xF0, 0x12, 0x06, 0x00, 0xF0, 0x1E, 0x07,
 0x00, 0x6D, 0xA0, 0xC6, 0x01, 0x4E, 0xA6, 0x67,
 0xEE, 0xED, 0xFA, 0x2D, 0x01, 0x6E, 0xE4, 0x67,
-0xCC, 0xEF, 0x1D, 0x27, 0xA0, 0x5B, 0x1B, 0x61,
-0xA0, 0x5A, 0x19, 0x61, 0x5D, 0x67, 0xD2, 0xC2,
-0x30, 0xF0, 0x20, 0x6A, 0x25, 0xF7, 0x10, 0x4A,
-0x2C, 0xF5, 0x70, 0x9A, 0x9D, 0x67, 0xDD, 0x67,
+0xCC, 0xEF, 0x1D, 0x27, 0x40, 0x5B, 0x1B, 0x61,
+0x40, 0x5A, 0x19, 0x61, 0x5D, 0x67, 0xD2, 0xC2,
+0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5, 0x18, 0x4A,
+0xA9, 0xF1, 0x68, 0x9A, 0x9D, 0x67, 0xDD, 0x67,
 0x73, 0xC4, 0x62, 0x34, 0x00, 0xF6, 0x62, 0x33,
 0x76, 0xC6, 0x0D, 0x6B, 0x94, 0xC6, 0x70, 0xC6,
 0x82, 0x34, 0x05, 0x6B, 0x95, 0xC6, 0x6F, 0xCE,
-0x2C, 0xF5, 0xB0, 0xDA, 0xA0, 0x10, 0x02, 0x6E,
+0xA9, 0xF1, 0xA8, 0xDA, 0xA0, 0x10, 0x02, 0x6E,
 0xA4, 0x67, 0xCC, 0xED, 0x44, 0x25, 0xFD, 0x67,
-0xA0, 0x5B, 0xD2, 0xC7, 0x18, 0x60, 0x36, 0xF3,
-0xA4, 0x43, 0x30, 0xF0, 0x20, 0x6C, 0x86, 0xF2,
-0x14, 0x4B, 0x25, 0xF7, 0x10, 0x4C, 0x64, 0x33,
+0x40, 0x5B, 0xD2, 0xC7, 0x18, 0x60, 0x14, 0xF5,
+0xA0, 0x43, 0x30, 0xF0, 0x20, 0x6C, 0xC4, 0xF4,
+0x10, 0x4B, 0x85, 0xF5, 0x18, 0x4C, 0x64, 0x33,
 0xA4, 0x35, 0x95, 0xE5, 0x91, 0xE3, 0x66, 0xAC,
 0xC5, 0xAD, 0x75, 0xC7, 0x62, 0x33, 0xD3, 0xC7,
 0x76, 0xC7, 0xC2, 0x36, 0x00, 0x6B, 0x65, 0xCD,
 0xD4, 0xC7, 0x66, 0xCC, 0x04, 0x10, 0x16, 0x6B,
-0x6B, 0xEB, 0x1D, 0x67, 0x73, 0xC0, 0xA0, 0x5A,
-0x19, 0x60, 0x36, 0xF3, 0x84, 0x42, 0x30, 0xF0,
-0x20, 0x6B, 0x86, 0xF2, 0x14, 0x4A, 0x25, 0xF7,
-0x10, 0x4B, 0x44, 0x32, 0x84, 0x34, 0x71, 0xE4,
+0x6B, 0xEB, 0x1D, 0x67, 0x73, 0xC0, 0x40, 0x5A,
+0x19, 0x60, 0x14, 0xF5, 0x80, 0x42, 0x30, 0xF0,
+0x20, 0x6B, 0xC4, 0xF4, 0x10, 0x4A, 0x85, 0xF5,
+0x18, 0x4B, 0x44, 0x32, 0x84, 0x34, 0x71, 0xE4,
 0x6D, 0xE2, 0x46, 0xAB, 0xA5, 0xAC, 0xDD, 0x67,
 0x59, 0xC6, 0x42, 0x32, 0xB7, 0xC6, 0x5A, 0xC6,
 0xA2, 0x35, 0x00, 0x6A, 0x45, 0xCC, 0xB8, 0xC6,
 0x46, 0xCB, 0x04, 0x10, 0x16, 0x6A, 0x4B, 0xEA,
 0xFD, 0x67, 0x57, 0xC7, 0x0D, 0x6A, 0x1D, 0x67,
 0x50, 0xC0, 0x09, 0x6A, 0x52, 0x10, 0x53, 0x2C,
-0xA0, 0x5B, 0x22, 0x60, 0xBD, 0x67, 0x72, 0xC5,
-0x56, 0xF1, 0xC4, 0x43, 0x30, 0xF0, 0x20, 0x6D,
-0x25, 0xF7, 0x10, 0x4D, 0xC4, 0x36, 0xB9, 0xE6,
+0x40, 0x5B, 0x22, 0x60, 0xBD, 0x67, 0x72, 0xC5,
+0x54, 0xF4, 0xC0, 0x43, 0x30, 0xF0, 0x20, 0x6D,
+0x85, 0xF5, 0x18, 0x4D, 0xC4, 0x36, 0xB9, 0xE6,
 0xE6, 0xAE, 0x1D, 0x67, 0xF3, 0xC0, 0xE2, 0x37,
-0xF4, 0xC0, 0xF6, 0xF1, 0xE4, 0x43, 0xE4, 0x37,
+0xF4, 0xC0, 0x94, 0xF4, 0xE0, 0x43, 0xE4, 0x37,
 0xB5, 0xE7, 0xE5, 0xAD, 0x74, 0x33, 0xF5, 0xC0,
 0xE2, 0x37, 0xF6, 0xC0, 0x30, 0xF0, 0x20, 0x6F,
-0xA1, 0xF3, 0xE0, 0x9F, 0xED, 0xE3, 0x60, 0xA3,
+0x21, 0xF2, 0xEC, 0x9F, 0xED, 0xE3, 0x60, 0xA3,
 0x86, 0xCE, 0x85, 0xCD, 0x77, 0xC0, 0x02, 0x10,
-0x9D, 0x67, 0x72, 0xC4, 0xA0, 0x5A, 0x23, 0x60,
-0x56, 0xF1, 0x84, 0x42, 0x30, 0xF0, 0x20, 0x6B,
-0x25, 0xF7, 0x10, 0x4B, 0x84, 0x34, 0x71, 0xE4,
+0x9D, 0x67, 0x72, 0xC4, 0x40, 0x5A, 0x23, 0x60,
+0x54, 0xF4, 0x80, 0x42, 0x30, 0xF0, 0x20, 0x6B,
+0x85, 0xF5, 0x18, 0x4B, 0x84, 0x34, 0x71, 0xE4,
 0xBD, 0x67, 0x58, 0xC5, 0xA6, 0xAC, 0xDD, 0x67,
-0xB9, 0xC6, 0xA2, 0x35, 0xBA, 0xC6, 0xF6, 0xF1,
-0xA4, 0x42, 0xA4, 0x35, 0x6D, 0xE5, 0xA5, 0xAB,
+0xB9, 0xC6, 0xA2, 0x35, 0xBA, 0xC6, 0x94, 0xF4,
+0xA0, 0x42, 0xA4, 0x35, 0x6D, 0xE5, 0xA5, 0xAB,
 0x54, 0x32, 0xBB, 0xC6, 0xA2, 0x35, 0xBC, 0xC6,
-0x30, 0xF0, 0x20, 0x6D, 0xA1, 0xF3, 0xA0, 0x9D,
+0x30, 0xF0, 0x20, 0x6D, 0x21, 0xF2, 0xAC, 0x9D,
 0xA9, 0xE2, 0x40, 0xA2, 0x5D, 0xC6, 0x00, 0x6A,
 0x46, 0xCC, 0x45, 0xCB, 0x02, 0x10, 0xFD, 0x67,
 0x58, 0xC7, 0x04, 0x6A, 0x1D, 0x67, 0x50, 0xC0,
 0x0C, 0x6A, 0x4F, 0xC8, 0x04, 0x10, 0x7D, 0x67,
 0x04, 0x6A, 0x50, 0xC3, 0xAF, 0xCB, 0x04, 0x04,
-0x00, 0x18, 0x21, 0x1E, 0x09, 0x97, 0x08, 0x90,
+0x00, 0x18, 0x6D, 0x21, 0x09, 0x97, 0x08, 0x90,
 0x05, 0x63, 0x00, 0xEF, 0xF8, 0x63, 0x0F, 0x62,
 0x0E, 0xD1, 0x0D, 0xD0, 0x00, 0x6A, 0x10, 0xD4,
 0x01, 0x68, 0x62, 0x67, 0xA0, 0xA4, 0x0E, 0x25,
@@ -21299,10 +22644,10 @@ u8 array_mp_8822b_fw_nic[] = {
 0x0B, 0x73, 0xAC, 0xEA, 0x03, 0x61, 0x01, 0x48,
 0xAC, 0xE8, 0x00, 0x6B, 0x37, 0x72, 0x01, 0x4C,
 0xF1, 0x61, 0x37, 0x6A, 0x30, 0xF0, 0x20, 0x6B,
-0x25, 0xF7, 0x10, 0x4B, 0x4A, 0xF1, 0x86, 0xA3,
+0x85, 0xF5, 0x18, 0x4B, 0xC8, 0xF1, 0x80, 0xA3,
 0x0F, 0x5C, 0x01, 0x4C, 0x01, 0x61, 0x00, 0x6C,
-0x4A, 0xF1, 0x86, 0xC3, 0x30, 0xF0, 0x21, 0x6B,
-0x70, 0xF0, 0x76, 0xA3, 0x0B, 0x6D, 0x2F, 0x40,
+0xC8, 0xF1, 0x80, 0xC3, 0x30, 0xF0, 0x20, 0x6B,
+0x4D, 0xF7, 0x78, 0xA3, 0x0B, 0x6D, 0x2F, 0x40,
 0x70, 0x33, 0x0A, 0xD3, 0x0A, 0x94, 0xFF, 0x6B,
 0x6C, 0xE9, 0x6C, 0xEC, 0x0A, 0xD4, 0x01, 0x6C,
 0x13, 0xE4, 0xB8, 0xEC, 0x12, 0xEC, 0x91, 0xE2,
@@ -21321,160 +22666,161 @@ u8 array_mp_8822b_fw_nic[] = {
 0x8A, 0xEA, 0xFA, 0x61, 0x0C, 0x6A, 0x9D, 0x67,
 0x00, 0x6B, 0x4F, 0xCC, 0x70, 0xC4, 0x05, 0x95,
 0x04, 0x94, 0x06, 0x96, 0x07, 0x97, 0xFF, 0x49,
-0x00, 0x18, 0xA9, 0x47, 0x08, 0x95, 0xFF, 0x6A,
+0x00, 0x18, 0xD8, 0x4C, 0x08, 0x95, 0xFF, 0x6A,
 0x4C, 0xE9, 0x01, 0x4D, 0x08, 0xD5, 0x08, 0x93,
 0xFF, 0x6A, 0x4C, 0xEB, 0x03, 0xEB, 0xBF, 0x61,
 0x0F, 0x97, 0x0E, 0x91, 0x0D, 0x90, 0x08, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x04, 0xD0, 0x30, 0xF0, 0x20, 0x6A, 0x07, 0xD5,
-0x08, 0xD6, 0x09, 0xD7, 0x25, 0xF7, 0x10, 0x4A,
-0x4A, 0xF1, 0x67, 0xA2, 0x06, 0xD4, 0x01, 0x73,
-0x0F, 0x61, 0x4A, 0xF1, 0x48, 0xA2, 0x0C, 0x2A,
-0x30, 0xF0, 0x21, 0x68, 0x06, 0x95, 0x34, 0xF1,
-0x14, 0x48, 0x90, 0x67, 0x07, 0x06, 0x00, 0x18,
-0xF9, 0x4E, 0x90, 0x67, 0x00, 0x18, 0xBF, 0x4F,
-0x05, 0x97, 0x04, 0x90, 0x03, 0x63, 0x00, 0xEF,
-0xFD, 0x63, 0x05, 0x62, 0x60, 0xA4, 0x30, 0xF0,
-0x20, 0x6A, 0x25, 0xF7, 0x10, 0x4A, 0xAC, 0xF7,
-0x73, 0xC2, 0xA1, 0xA4, 0x03, 0x73, 0xAC, 0xF7,
-0xB4, 0xC2, 0x1F, 0x61, 0x62, 0xA4, 0xAC, 0xF7,
-0x70, 0xC2, 0x63, 0xA4, 0xAC, 0xF7, 0x71, 0xC2,
-0x64, 0xA4, 0x04, 0x6C, 0xAC, 0xF7, 0x72, 0xC2,
-0xE5, 0xF5, 0x60, 0x9A, 0x8C, 0xEB, 0x30, 0x23,
-0xE5, 0xF5, 0x64, 0x9A, 0x05, 0x5B, 0x2C, 0x61,
-0xAC, 0xF7, 0xB0, 0xA2, 0xAC, 0xF7, 0xD1, 0xA2,
-0xAC, 0xF7, 0xF2, 0xA2, 0x30, 0xF0, 0x20, 0x6C,
-0x02, 0xF4, 0x04, 0x4C, 0x00, 0x18, 0x01, 0x50,
-0x1F, 0x10, 0x02, 0x73, 0x1D, 0x61, 0x62, 0xA4,
-0xAC, 0xF7, 0x70, 0xC2, 0x63, 0xA4, 0x04, 0x6C,
-0xAC, 0xF7, 0x71, 0xC2, 0x01, 0x6B, 0x6B, 0xEB,
-0xAC, 0xF7, 0x72, 0xC2, 0xE5, 0xF5, 0x60, 0x9A,
-0x8C, 0xEB, 0x0E, 0x23, 0xE5, 0xF5, 0x64, 0x9A,
-0x05, 0x5B, 0x0A, 0x61, 0xAC, 0xF7, 0xB0, 0xA2,
-0xAC, 0xF7, 0xD1, 0xA2, 0x30, 0xF0, 0x20, 0x6C,
-0x22, 0xF4, 0x14, 0x4C, 0x00, 0x18, 0x01, 0x50,
-0x30, 0xF0, 0x20, 0x6A, 0x05, 0x97, 0x25, 0xF7,
-0x10, 0x4A, 0x01, 0x6B, 0xAC, 0xF7, 0x76, 0xC2,
-0x00, 0x6B, 0xAC, 0xF7, 0x75, 0xC2, 0x03, 0x63,
-0x00, 0xEF, 0x00, 0x65, 0xF6, 0x63, 0x13, 0x62,
-0x12, 0xD1, 0x11, 0xD0, 0x30, 0xF0, 0x20, 0x6B,
-0xFF, 0x6A, 0x8C, 0xEA, 0x40, 0xF3, 0x98, 0x9B,
-0x40, 0xF3, 0x18, 0x4B, 0x01, 0x72, 0x04, 0xD4,
-0x81, 0x9B, 0x68, 0xA3, 0x05, 0xD4, 0x9D, 0x67,
-0x78, 0xC4, 0x30, 0xF0, 0x20, 0x6B, 0x40, 0xF3,
-0x8C, 0x9B, 0x40, 0xF3, 0x0C, 0x4B, 0x07, 0xD4,
-0x81, 0x9B, 0x68, 0xA3, 0x08, 0xD4, 0x9D, 0x67,
-0x20, 0xF0, 0x64, 0xC4, 0x20, 0x61, 0x00, 0x68,
-0x5D, 0x67, 0x0D, 0xE2, 0x5C, 0xA3, 0x0B, 0x5A,
-0x01, 0x61, 0x0A, 0x6A, 0xFF, 0x6B, 0x6C, 0xEA,
-0x02, 0x4A, 0x7D, 0x67, 0x5B, 0xCB, 0x0E, 0x6A,
-0x20, 0xF0, 0x48, 0xC3, 0x01, 0x6A, 0x20, 0xF0,
-0x4A, 0xC3, 0x09, 0xE3, 0x50, 0xA2, 0x0B, 0x95,
-0x0C, 0x96, 0x20, 0xF0, 0x4B, 0xC3, 0x0A, 0x94,
-0x0D, 0x97, 0x01, 0x48, 0x00, 0x18, 0xA9, 0x47,
-0x09, 0x70, 0xE2, 0x61, 0x71, 0x10, 0x08, 0x72,
-0x37, 0x61, 0x20, 0xF0, 0x05, 0x04, 0x07, 0x00,
-0x04, 0x01, 0x0E, 0xD4, 0x40, 0xA0, 0x0B, 0x5A,
-0x01, 0x61, 0x0A, 0x6A, 0xFF, 0x6B, 0x4C, 0xEB,
-0x9D, 0x67, 0x42, 0x43, 0x5B, 0xCC, 0x0E, 0x6A,
-0x20, 0xF0, 0x48, 0xC4, 0x08, 0x6A, 0x20, 0xF0,
-0x4A, 0xC4, 0x40, 0xA1, 0x20, 0xF0, 0x4B, 0xC4,
-0x00, 0x6A, 0x0E, 0x10, 0x9D, 0x67, 0x55, 0xE4,
-0xC0, 0xA1, 0x30, 0xF0, 0x20, 0x6C, 0x25, 0xF7,
-0x10, 0x4C, 0x91, 0xE2, 0xD1, 0xE4, 0xE9, 0xF6,
-0x8C, 0xA4, 0x01, 0x4A, 0x20, 0xF0, 0x8C, 0xC5,
-0xFF, 0x6C, 0x4C, 0xEC, 0x63, 0xEC, 0xEE, 0x61,
-0x0A, 0x94, 0x0B, 0x95, 0x0C, 0x96, 0x0D, 0x97,
-0x01, 0x48, 0x01, 0x49, 0x00, 0x18, 0xA9, 0x47,
-0x0E, 0x92, 0x4A, 0xE8, 0xCF, 0x61, 0x38, 0x10,
-0x09, 0x72, 0x36, 0x61, 0x20, 0xF0, 0x05, 0x03,
-0x07, 0x00, 0x04, 0x01, 0x0F, 0xD3, 0x40, 0xA0,
-0x0B, 0x5A, 0x01, 0x61, 0x0A, 0x6A, 0xFF, 0x6B,
-0x4C, 0xEB, 0x9D, 0x67, 0x42, 0x43, 0x5B, 0xCC,
-0x0E, 0x6A, 0x20, 0xF0, 0x48, 0xC4, 0x09, 0x6A,
-0x20, 0xF0, 0x4A, 0xC4, 0x40, 0xA1, 0x20, 0xF0,
-0x4B, 0xC4, 0x00, 0x6A, 0x0E, 0x10, 0x9D, 0x67,
-0x55, 0xE4, 0xC0, 0xA1, 0x30, 0xF0, 0x20, 0x6C,
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-0x20, 0xA4, 0x28, 0x68, 0x30, 0xF0, 0x20, 0x6A,
-0x18, 0xE9, 0x62, 0xA4, 0x8C, 0xF0, 0x14, 0x4A,
+0x20, 0xA4, 0x2A, 0x68, 0x30, 0xF0, 0x20, 0x6A,
+0x18, 0xE9, 0x62, 0xA4, 0xAB, 0xF5, 0x1C, 0x4A,
 0x08, 0x6D, 0x6C, 0xED, 0x7E, 0x33, 0x12, 0xE8,
 0x01, 0xE2, 0xD1, 0xA0, 0x7C, 0x32, 0x7F, 0x6B,
 0xCC, 0xEB, 0x4D, 0xEB, 0x71, 0xC0, 0xC2, 0xA4,
@@ -21490,167 +22836,228 @@ u8 array_mp_8822b_fw_nic[] = {
 0xAD, 0xEB, 0x72, 0xC0, 0xA2, 0xA4, 0x30, 0x6B,
 0x03, 0x4C, 0x6C, 0xED, 0x9F, 0x4B, 0x4C, 0xEB,
 0xAD, 0xEB, 0x30, 0xF0, 0x20, 0x6A, 0x30, 0xF0,
-0x20, 0x6D, 0xA1, 0xF3, 0x5C, 0x9A, 0xA1, 0xF3,
-0xA8, 0x9D, 0x71, 0xC0, 0x2C, 0x33, 0x49, 0xE3,
+0x20, 0x6D, 0x41, 0xF2, 0x4C, 0x9A, 0x21, 0xF2,
+0xB8, 0x9D, 0x71, 0xC0, 0x2C, 0x33, 0x49, 0xE3,
 0xAD, 0xE3, 0xA0, 0xA4, 0x01, 0x4C, 0xA0, 0xC2,
 0x01, 0x4A, 0x6A, 0xEA, 0xFA, 0x61, 0x30, 0xF0,
-0x20, 0x6A, 0xA1, 0xF3, 0x5C, 0x9A, 0x2C, 0x33,
+0x20, 0x6A, 0x41, 0xF2, 0x4C, 0x9A, 0x2C, 0x33,
 0x49, 0xE3, 0x60, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
-0x0B, 0xF5, 0x4B, 0xA2, 0x01, 0x72, 0x16, 0x61,
-0x30, 0xF0, 0x20, 0x6A, 0xC1, 0xF3, 0x40, 0x9A,
+0x8B, 0xF3, 0x43, 0xA2, 0x01, 0x72, 0x16, 0x61,
+0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF2, 0x50, 0x9A,
 0x63, 0xEA, 0x10, 0x60, 0x30, 0xF0, 0x20, 0x6A,
-0xA1, 0xF3, 0x50, 0x9A, 0x00, 0x6B, 0x60, 0xC2,
-0x30, 0xF0, 0x20, 0x6A, 0xC1, 0xF3, 0x64, 0x9A,
-0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF1, 0x4C, 0x9A,
+0x41, 0xF2, 0x40, 0x9A, 0x00, 0x6B, 0x60, 0xC2,
+0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF2, 0x74, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF7, 0x5C, 0x9A,
 0x60, 0xDA, 0xF0, 0x17, 0x51, 0xA0, 0x03, 0x6B,
 0x4A, 0x32, 0x6C, 0xEA, 0x30, 0xF0, 0x20, 0x6B,
-0x0B, 0xF5, 0x69, 0xA3, 0x05, 0x73, 0x11, 0x61,
-0x38, 0x22, 0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF3,
-0x50, 0x9A, 0x00, 0x6B, 0x60, 0xC2, 0x30, 0xF0,
-0x20, 0x6A, 0xC1, 0xF3, 0x68, 0x9A, 0x30, 0xF0,
-0x20, 0x6A, 0x01, 0xF1, 0x4C, 0x9A, 0x60, 0xDA,
+0x8B, 0xF3, 0x61, 0xA3, 0x05, 0x73, 0x11, 0x61,
+0x38, 0x22, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF2,
+0x40, 0x9A, 0x00, 0x6B, 0x60, 0xC2, 0x30, 0xF0,
+0x20, 0x6A, 0x41, 0xF2, 0x78, 0x9A, 0x30, 0xF0,
+0x20, 0x6A, 0x60, 0xF7, 0x5C, 0x9A, 0x60, 0xDA,
 0xF0, 0x17, 0x06, 0x73, 0x12, 0x61, 0x02, 0x5A,
-0x24, 0x61, 0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF3,
-0x50, 0x9A, 0x00, 0x6B, 0x60, 0xC2, 0x30, 0xF0,
-0x20, 0x6A, 0xC1, 0xF3, 0x6C, 0x9A, 0x30, 0xF0,
-0x20, 0x6A, 0x01, 0xF1, 0x4C, 0x9A, 0x60, 0xDA,
+0x24, 0x61, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF2,
+0x40, 0x9A, 0x00, 0x6B, 0x60, 0xC2, 0x30, 0xF0,
+0x20, 0x6A, 0x41, 0xF2, 0x7C, 0x9A, 0x30, 0xF0,
+0x20, 0x6A, 0x60, 0xF7, 0x5C, 0x9A, 0x60, 0xDA,
 0xF0, 0x17, 0x07, 0x73, 0x12, 0x61, 0x03, 0x72,
-0x10, 0x61, 0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF3,
-0x50, 0x9A, 0x00, 0x6B, 0x60, 0xC2, 0x30, 0xF0,
-0x20, 0x6A, 0xC1, 0xF3, 0x70, 0x9A, 0x30, 0xF0,
-0x20, 0x6A, 0x01, 0xF1, 0x4C, 0x9A, 0x60, 0xDA,
-0xF0, 0x17, 0x30, 0xF0, 0x20, 0x6A, 0x0B, 0xF5,
-0x4C, 0xA2, 0x02, 0x72, 0x15, 0x61, 0x51, 0xA0,
+0x10, 0x61, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF2,
+0x40, 0x9A, 0x00, 0x6B, 0x60, 0xC2, 0x30, 0xF0,
+0x20, 0x6A, 0x61, 0xF2, 0x60, 0x9A, 0x30, 0xF0,
+0x20, 0x6A, 0x60, 0xF7, 0x5C, 0x9A, 0x60, 0xDA,
+0xF0, 0x17, 0x30, 0xF0, 0x20, 0x6A, 0x8B, 0xF3,
+0x44, 0xA2, 0x02, 0x72, 0x15, 0x61, 0x51, 0xA0,
 0x03, 0x6B, 0x52, 0x32, 0x6C, 0xEA, 0x10, 0x22,
-0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF3, 0x50, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF2, 0x40, 0x9A,
 0x00, 0x6B, 0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A,
-0xC1, 0xF3, 0x74, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
-0x01, 0xF1, 0x4C, 0x9A, 0x60, 0xDA, 0xF0, 0x17,
-0x91, 0x67, 0x00, 0x18, 0xBB, 0x58, 0x76, 0xA0,
+0x61, 0xF2, 0x64, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
+0x60, 0xF7, 0x5C, 0x9A, 0x60, 0xDA, 0xF0, 0x17,
+0x91, 0x67, 0x00, 0x18, 0x1E, 0x61, 0x76, 0xA0,
 0x01, 0x6A, 0x6C, 0xEA, 0x03, 0x22, 0x91, 0x67,
-0x00, 0x18, 0x67, 0x59, 0x07, 0x97, 0x06, 0x91,
+0x00, 0x18, 0xC8, 0x61, 0x07, 0x97, 0x06, 0x91,
 0x05, 0x90, 0x04, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0xFA, 0x63, 0x0B, 0x62, 0x0A, 0xD1, 0x09, 0xD0,
+0x40, 0xA4, 0x70, 0x69, 0x30, 0xF0, 0x20, 0x68,
+0x06, 0xD2, 0x81, 0xA4, 0x85, 0xF5, 0x18, 0x48,
+0x05, 0xD4, 0x05, 0x92, 0x9E, 0x33, 0x07, 0xD3,
+0x8C, 0xE9, 0x7D, 0x67, 0x03, 0x6C, 0x8C, 0xEA,
+0x87, 0x43, 0x11, 0x4C, 0x60, 0xA4, 0x32, 0x31,
+0x04, 0xD2, 0x9D, 0x67, 0x09, 0xE1, 0x06, 0xF0,
+0x78, 0xC2, 0x67, 0x44, 0x09, 0x4B, 0x80, 0xA3,
+0x06, 0xF0, 0x9A, 0xC2, 0x30, 0xF0, 0x20, 0x6C,
+0x42, 0xF4, 0x08, 0x4C, 0x00, 0x18, 0xD9, 0x55,
+0x07, 0x92, 0x21, 0x22, 0x06, 0xF0, 0x7E, 0xA0,
+0x01, 0x6A, 0x44, 0xE9, 0x6D, 0xEA, 0x06, 0xF0,
+0x5E, 0xC0, 0xE5, 0xF5, 0x50, 0x98, 0x10, 0x6B,
+0x6C, 0xEA, 0x0D, 0x22, 0xE5, 0xF5, 0x54, 0x98,
+0x05, 0x5A, 0x09, 0x61, 0x04, 0x96, 0x06, 0x97,
+0x30, 0xF0, 0x20, 0x6C, 0x42, 0xF4, 0x14, 0x4C,
+0xB1, 0x67, 0x00, 0x18, 0xD9, 0x55, 0x05, 0x93,
+0x0C, 0x6D, 0x91, 0x67, 0x6C, 0xED, 0xAA, 0x35,
+0x00, 0x18, 0x18, 0x5D, 0x23, 0x10, 0x06, 0xF0,
+0x7E, 0xA0, 0x01, 0x6A, 0x44, 0xE9, 0x4F, 0xEA,
+0x6C, 0xEA, 0x06, 0xF0, 0x5E, 0xC0, 0xE5, 0xF5,
+0x50, 0x98, 0x10, 0x6B, 0x6C, 0xEA, 0x0D, 0x22,
+0xE5, 0xF5, 0x54, 0x98, 0x05, 0x5A, 0x09, 0x61,
+0x04, 0x96, 0x06, 0x97, 0x30, 0xF0, 0x20, 0x6C,
+0x62, 0xF4, 0x08, 0x4C, 0xB1, 0x67, 0x00, 0x18,
+0xD9, 0x55, 0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5,
+0x18, 0x4A, 0x45, 0xE1, 0x01, 0x6A, 0x4B, 0xEA,
+0x06, 0xF0, 0x58, 0xC1, 0x0B, 0x97, 0x0A, 0x91,
+0x09, 0x90, 0x06, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
-0x20, 0xA4, 0x28, 0x68, 0x30, 0xF0, 0x20, 0x6A,
-0x18, 0xE9, 0x8C, 0xF0, 0x14, 0x4A, 0x21, 0x6B,
+0x20, 0xA4, 0x2A, 0x68, 0x30, 0xF0, 0x20, 0x6A,
+0x18, 0xE9, 0xAB, 0xF5, 0x1C, 0x4A, 0x21, 0x6B,
 0x20, 0x6E, 0x6B, 0xEB, 0x12, 0xE8, 0x01, 0xE2,
-0x42, 0xA4, 0xFF, 0xA0, 0x5C, 0xC0, 0xA3, 0xA4,
+0x42, 0xA4, 0xFE, 0xA0, 0x5B, 0xC0, 0xA3, 0xA4,
 0xEC, 0xEB, 0x01, 0x6A, 0xCC, 0xED, 0xAD, 0xEB,
-0x7F, 0xC0, 0xA3, 0xA4, 0xAC, 0xEA, 0x02, 0x6D,
-0xAB, 0xED, 0x6C, 0xED, 0x4D, 0xED, 0xBF, 0xC0,
+0x7E, 0xC0, 0xA3, 0xA4, 0xAC, 0xEA, 0x02, 0x6D,
+0xAB, 0xED, 0x6C, 0xED, 0x4D, 0xED, 0xBE, 0xC0,
 0x43, 0xA4, 0x02, 0x6B, 0x6C, 0xEA, 0xFB, 0x4B,
-0xAC, 0xEB, 0x4D, 0xEB, 0x7F, 0xC0, 0xA3, 0xA4,
+0xAC, 0xEB, 0x4D, 0xEB, 0x7E, 0xC0, 0xA3, 0xA4,
 0x40, 0x6A, 0x4C, 0xED, 0x80, 0x4A, 0xFF, 0x4A,
-0x6C, 0xEA, 0xAD, 0xEA, 0x5F, 0xC0, 0x64, 0xA4,
+0x6C, 0xEA, 0xAD, 0xEA, 0x5E, 0xC0, 0x64, 0xA4,
 0xCC, 0xEA, 0x20, 0xF0, 0x67, 0xC0, 0x0D, 0x22,
-0x91, 0x67, 0x00, 0x18, 0x78, 0x5F, 0xD1, 0xA0,
-0x03, 0x6A, 0xBC, 0xA0, 0xCA, 0x36, 0x4C, 0xEE,
+0x91, 0x67, 0x00, 0x18, 0x0F, 0x68, 0xD1, 0xA0,
+0x03, 0x6A, 0xBB, 0xA0, 0xCA, 0x36, 0x4C, 0xEE,
 0xFF, 0x6A, 0x91, 0x67, 0x4C, 0xEE, 0x00, 0x18,
-0xD8, 0x5E, 0x07, 0x97, 0x06, 0x91, 0x05, 0x90,
+0x6F, 0x67, 0x07, 0x97, 0x06, 0x91, 0x05, 0x90,
 0x04, 0x63, 0x00, 0xEF, 0xFD, 0x63, 0x05, 0x62,
 0x04, 0xD0, 0x03, 0xA4, 0x44, 0xA4, 0xC0, 0xA4,
 0x00, 0x30, 0x00, 0x30, 0x00, 0xF6, 0x40, 0x32,
 0xA5, 0xA4, 0xE6, 0xA4, 0x0D, 0xEA, 0x01, 0xA4,
 0x82, 0xA4, 0x30, 0xF0, 0x20, 0x6B, 0x0D, 0xEA,
-0x80, 0x34, 0x25, 0xF7, 0x10, 0x4B, 0x8D, 0xEA,
-0xE5, 0xF5, 0x40, 0xDB, 0x4A, 0xF1, 0xC7, 0xC3,
+0x80, 0x34, 0x85, 0xF5, 0x18, 0x4B, 0x8D, 0xEA,
+0xE5, 0xF5, 0x50, 0xDB, 0xC8, 0xF1, 0xC1, 0xC3,
 0x0A, 0x26, 0x01, 0x6C, 0x4C, 0xEC, 0x07, 0x24,
-0x4A, 0xF1, 0xA8, 0xC3, 0x4A, 0xF1, 0xE9, 0xC3,
-0x02, 0x25, 0x00, 0x18, 0xFC, 0x5E, 0x05, 0x97,
+0xC8, 0xF1, 0xA2, 0xC3, 0xC8, 0xF1, 0xE3, 0xC3,
+0x02, 0x25, 0x00, 0x18, 0x93, 0x67, 0x05, 0x97,
 0x04, 0x90, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0xFD, 0x63, 0x05, 0x62, 0xFF, 0x6A, 0x4C, 0xEC,
-0xC0, 0x4C, 0x4C, 0xEC, 0x0B, 0x5C, 0x2B, 0x60,
-0x30, 0xF0, 0x20, 0x6A, 0x88, 0x34, 0xE0, 0xF2,
-0x00, 0x4A, 0x89, 0xE2, 0x40, 0x9A, 0x00, 0xEA,
-0x85, 0x67, 0x00, 0x18, 0x26, 0x51, 0x1F, 0x10,
-0x85, 0x67, 0x00, 0x18, 0x9A, 0x51, 0x1B, 0x10,
-0x85, 0x67, 0x00, 0x18, 0x03, 0x51, 0x17, 0x10,
-0x85, 0x67, 0x00, 0x18, 0x9B, 0x50, 0x13, 0x10,
-0x85, 0x67, 0x00, 0x18, 0x12, 0x50, 0x0F, 0x10,
-0x85, 0x67, 0x00, 0x18, 0xBD, 0x51, 0x0B, 0x10,
-0x85, 0x67, 0x00, 0x18, 0x37, 0x1C, 0x07, 0x10,
-0x85, 0x67, 0x00, 0x18, 0x53, 0x4F, 0x03, 0x10,
-0x85, 0x67, 0x00, 0x18, 0xEA, 0x2C, 0x05, 0x97,
-0x03, 0x63, 0x00, 0xEF, 0xFF, 0x6B, 0x8C, 0xEB,
-0x20, 0x5B, 0x00, 0x6A, 0x02, 0x60, 0x01, 0x6A,
-0x44, 0xEB, 0x20, 0xE8, 0xFF, 0x6A, 0x4C, 0xEC,
-0xE0, 0x4C, 0x8C, 0xEA, 0x20, 0x5A, 0x00, 0x6A,
-0x02, 0x60, 0x01, 0x6A, 0x44, 0xEC, 0x20, 0xE8,
-0xFF, 0x6A, 0x4C, 0xEC, 0x68, 0x44, 0xC8, 0x4B,
-0x4C, 0xEB, 0x20, 0x5B, 0x00, 0x6A, 0x02, 0x60,
-0x01, 0x6A, 0x44, 0xEC, 0x20, 0xE8, 0x00, 0x65,
-0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0xFF, 0x68,
-0x0C, 0xEC, 0x00, 0x18, 0xED, 0x51, 0x0F, 0x6B,
-0x4C, 0xEB, 0x43, 0x67, 0x0C, 0xEA, 0x05, 0x97,
-0x04, 0x90, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0xFF, 0x68,
-0x0C, 0xEC, 0x00, 0x18, 0xED, 0x51, 0x10, 0x6B,
-0x6B, 0xEB, 0x4C, 0xEB, 0x43, 0x67, 0x0C, 0xEA,
+0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0xFF, 0x6A,
+0x4C, 0xEC, 0xC0, 0x4C, 0x4C, 0xEC, 0x0D, 0x5C,
+0x05, 0x67, 0x32, 0x60, 0x30, 0xF0, 0x20, 0x6A,
+0x88, 0x34, 0x60, 0xF3, 0x0C, 0x4A, 0x89, 0xE2,
+0x40, 0x9A, 0x00, 0xEA, 0x85, 0x67, 0x00, 0x18,
+0x00, 0x57, 0x26, 0x10, 0x85, 0x67, 0x00, 0x18,
+0xAE, 0x57, 0x22, 0x10, 0x85, 0x67, 0x00, 0x18,
+0xDD, 0x56, 0x1E, 0x10, 0x85, 0x67, 0x00, 0x18,
+0x74, 0x56, 0x1A, 0x10, 0x85, 0x67, 0x00, 0x18,
+0xEB, 0x55, 0x16, 0x10, 0x85, 0x67, 0x00, 0x18,
+0xD1, 0x57, 0x12, 0x10, 0x85, 0x67, 0x00, 0x18,
+0x77, 0x1F, 0x0E, 0x10, 0x85, 0x67, 0x00, 0x18,
+0x74, 0x57, 0x90, 0x67, 0x00, 0x18, 0x2B, 0x55,
+0x07, 0x10, 0x85, 0x67, 0x00, 0x18, 0xA9, 0x30,
+0x03, 0x10, 0x85, 0x67, 0x00, 0x18, 0x1A, 0x55,
 0x05, 0x97, 0x04, 0x90, 0x03, 0x63, 0x00, 0xEF,
-0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0xFF, 0x68,
-0x8C, 0xE8, 0x90, 0x67, 0x00, 0x18, 0xED, 0x51,
-0x30, 0xF0, 0x20, 0x6B, 0xC1, 0xF3, 0x98, 0x9B,
-0x01, 0x6B, 0x4C, 0xEC, 0x0A, 0x2C, 0x90, 0x67,
-0x00, 0x18, 0xF1, 0x51, 0x30, 0xF0, 0x20, 0x6B,
-0xC1, 0xF3, 0x7C, 0x9B, 0x4C, 0xEB, 0x01, 0x23,
-0x01, 0x6B, 0x05, 0x97, 0x04, 0x90, 0xFF, 0x6A,
-0x6C, 0xEA, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0xFF, 0x68,
-0x8C, 0xE8, 0x90, 0x67, 0x00, 0x18, 0xED, 0x51,
-0x30, 0xF0, 0x20, 0x6B, 0xE1, 0xF3, 0x80, 0x9B,
-0x01, 0x6B, 0x4C, 0xEC, 0x0A, 0x2C, 0x90, 0x67,
-0x00, 0x18, 0xF1, 0x51, 0x30, 0xF0, 0x20, 0x6B,
-0xE1, 0xF3, 0x64, 0x9B, 0x4C, 0xEB, 0x01, 0x23,
-0x01, 0x6B, 0x05, 0x97, 0x04, 0x90, 0xFF, 0x6A,
-0x6C, 0xEA, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0xFF, 0x68,
-0x8C, 0xE8, 0x90, 0x67, 0x00, 0x18, 0xED, 0x51,
-0x30, 0xF0, 0x20, 0x6B, 0xE1, 0xF3, 0x68, 0x9B,
-0x4C, 0xEB, 0x0D, 0x2B, 0x90, 0x67, 0x00, 0x18,
-0xF1, 0x51, 0x0F, 0x6B, 0x4C, 0xEB, 0x07, 0x2B,
-0x90, 0x67, 0x00, 0x18, 0xF6, 0x51, 0xE0, 0xF3,
-0x1F, 0x6B, 0x4C, 0xEB, 0x01, 0x23, 0x01, 0x6B,
-0x05, 0x97, 0x04, 0x90, 0xFF, 0x6A, 0x6C, 0xEA,
+0xFF, 0x6B, 0x8C, 0xEB, 0x20, 0x5B, 0x00, 0x6A,
+0x02, 0x60, 0x01, 0x6A, 0x44, 0xEB, 0x20, 0xE8,
+0xFF, 0x6A, 0x4C, 0xEC, 0xE0, 0x4C, 0x8C, 0xEA,
+0x20, 0x5A, 0x00, 0x6A, 0x02, 0x60, 0x01, 0x6A,
+0x44, 0xEC, 0x20, 0xE8, 0xFF, 0x6A, 0x4C, 0xEC,
+0x68, 0x44, 0xC8, 0x4B, 0x4C, 0xEB, 0x20, 0x5B,
+0x00, 0x6A, 0x02, 0x60, 0x01, 0x6A, 0x44, 0xEC,
+0x20, 0xE8, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
+0x04, 0xD0, 0xFF, 0x68, 0x0C, 0xEC, 0x00, 0x18,
+0x06, 0x58, 0x0F, 0x6B, 0x4C, 0xEB, 0x43, 0x67,
+0x0C, 0xEA, 0x05, 0x97, 0x04, 0x90, 0x03, 0x63,
+0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
+0x04, 0xD0, 0xFF, 0x68, 0x0C, 0xEC, 0x00, 0x18,
+0x06, 0x58, 0x10, 0x6B, 0x6B, 0xEB, 0x4C, 0xEB,
+0x43, 0x67, 0x0C, 0xEA, 0x05, 0x97, 0x04, 0x90,
 0x03, 0x63, 0x00, 0xEF, 0xFD, 0x63, 0x05, 0x62,
 0x04, 0xD0, 0xFF, 0x68, 0x8C, 0xE8, 0x90, 0x67,
-0x00, 0x18, 0xF1, 0x51, 0xE1, 0xF7, 0x10, 0x6C,
-0x4C, 0xEC, 0x01, 0x6B, 0x0A, 0x2C, 0x90, 0x67,
-0x00, 0x18, 0xF6, 0x51, 0x30, 0xF0, 0x20, 0x6B,
-0xE1, 0xF3, 0x6C, 0x9B, 0x4C, 0xEB, 0x01, 0x23,
-0x01, 0x6B, 0x05, 0x97, 0x04, 0x90, 0xFF, 0x6A,
-0x6C, 0xEA, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0xFF, 0x68,
-0x8C, 0xE8, 0x90, 0x67, 0x00, 0x18, 0xED, 0x51,
-0x30, 0xF0, 0x20, 0x6B, 0xE1, 0xF3, 0x70, 0x9B,
-0x4C, 0xEB, 0x10, 0x2B, 0x90, 0x67, 0x00, 0x18,
-0xF1, 0x51, 0x30, 0xF0, 0x20, 0x6B, 0xE1, 0xF3,
-0x74, 0x9B, 0x4C, 0xEB, 0x07, 0x2B, 0x90, 0x67,
-0x00, 0x18, 0xF6, 0x51, 0x0C, 0xF0, 0x18, 0x6B,
+0x00, 0x18, 0x06, 0x58, 0x30, 0xF0, 0x20, 0x6B,
+0x61, 0xF2, 0x88, 0x9B, 0x01, 0x6B, 0x4C, 0xEC,
+0x0A, 0x2C, 0x90, 0x67, 0x00, 0x18, 0x0A, 0x58,
+0x30, 0xF0, 0x20, 0x6B, 0x61, 0xF2, 0x6C, 0x9B,
 0x4C, 0xEB, 0x01, 0x23, 0x01, 0x6B, 0x05, 0x97,
 0x04, 0x90, 0xFF, 0x6A, 0x6C, 0xEA, 0x03, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
 0x04, 0xD0, 0xFF, 0x68, 0x8C, 0xE8, 0x90, 0x67,
-0x00, 0x18, 0xED, 0x51, 0x30, 0xF0, 0x20, 0x6B,
-0xE1, 0xF3, 0x78, 0x9B, 0x4C, 0xEB, 0x12, 0x2B,
-0x90, 0x67, 0x00, 0x18, 0xF1, 0x51, 0x30, 0xF0,
-0x20, 0x6B, 0xE1, 0xF3, 0x7C, 0x9B, 0x4C, 0xEB,
-0x09, 0x2B, 0x90, 0x67, 0x00, 0x18, 0xF6, 0x51,
-0x30, 0xF0, 0x20, 0x6B, 0x01, 0xF4, 0x60, 0x9B,
+0x00, 0x18, 0x06, 0x58, 0x30, 0xF0, 0x20, 0x6B,
+0x61, 0xF2, 0x90, 0x9B, 0x01, 0x6B, 0x4C, 0xEC,
+0x0A, 0x2C, 0x90, 0x67, 0x00, 0x18, 0x0A, 0x58,
+0x30, 0xF0, 0x20, 0x6B, 0x61, 0xF2, 0x74, 0x9B,
 0x4C, 0xEB, 0x01, 0x23, 0x01, 0x6B, 0x05, 0x97,
 0x04, 0x90, 0xFF, 0x6A, 0x6C, 0xEA, 0x03, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
 0x04, 0xD0, 0xFF, 0x68, 0x8C, 0xE8, 0x90, 0x67,
-0x00, 0x18, 0xF1, 0x51, 0x30, 0xF0, 0x20, 0x6B,
-0x01, 0xF4, 0x84, 0x9B, 0x01, 0x6B, 0x4C, 0xEC,
-0x0A, 0x2C, 0x90, 0x67, 0x00, 0x18, 0xF6, 0x51,
-0x30, 0xF0, 0x20, 0x6B, 0x01, 0xF4, 0x68, 0x9B,
+0x00, 0x18, 0x06, 0x58, 0x30, 0xF0, 0x20, 0x6B,
+0x61, 0xF2, 0x78, 0x9B, 0x4C, 0xEB, 0x0D, 0x2B,
+0x90, 0x67, 0x00, 0x18, 0x0A, 0x58, 0x0F, 0x6B,
+0x4C, 0xEB, 0x07, 0x2B, 0x90, 0x67, 0x00, 0x18,
+0x0F, 0x58, 0xE0, 0xF3, 0x1F, 0x6B, 0x4C, 0xEB,
+0x01, 0x23, 0x01, 0x6B, 0x05, 0x97, 0x04, 0x90,
+0xFF, 0x6A, 0x6C, 0xEA, 0x03, 0x63, 0x00, 0xEF,
+0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0xFF, 0x68,
+0x8C, 0xE8, 0x90, 0x67, 0x00, 0x18, 0x0A, 0x58,
+0xE1, 0xF7, 0x10, 0x6C, 0x4C, 0xEC, 0x01, 0x6B,
+0x0A, 0x2C, 0x90, 0x67, 0x00, 0x18, 0x0F, 0x58,
+0x30, 0xF0, 0x20, 0x6B, 0x61, 0xF2, 0x7C, 0x9B,
 0x4C, 0xEB, 0x01, 0x23, 0x01, 0x6B, 0x05, 0x97,
 0x04, 0x90, 0xFF, 0x6A, 0x6C, 0xEA, 0x03, 0x63,
-0x00, 0xEF, 0x00, 0x65, 0x20, 0xE8, 0x00, 0x65,
+0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
+0x04, 0xD0, 0xFF, 0x68, 0x8C, 0xE8, 0x90, 0x67,
+0x00, 0x18, 0x06, 0x58, 0x30, 0xF0, 0x20, 0x6B,
+0x81, 0xF2, 0x60, 0x9B, 0x4C, 0xEB, 0x10, 0x2B,
+0x90, 0x67, 0x00, 0x18, 0x0A, 0x58, 0x30, 0xF0,
+0x20, 0x6B, 0x81, 0xF2, 0x64, 0x9B, 0x4C, 0xEB,
+0x07, 0x2B, 0x90, 0x67, 0x00, 0x18, 0x0F, 0x58,
+0x0C, 0xF0, 0x18, 0x6B, 0x4C, 0xEB, 0x01, 0x23,
+0x01, 0x6B, 0x05, 0x97, 0x04, 0x90, 0xFF, 0x6A,
+0x6C, 0xEA, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0xFF, 0x68,
+0x8C, 0xE8, 0x90, 0x67, 0x00, 0x18, 0x06, 0x58,
+0x30, 0xF0, 0x20, 0x6B, 0x81, 0xF2, 0x68, 0x9B,
+0x4C, 0xEB, 0x12, 0x2B, 0x90, 0x67, 0x00, 0x18,
+0x0A, 0x58, 0x30, 0xF0, 0x20, 0x6B, 0x81, 0xF2,
+0x6C, 0x9B, 0x4C, 0xEB, 0x09, 0x2B, 0x90, 0x67,
+0x00, 0x18, 0x0F, 0x58, 0x30, 0xF0, 0x20, 0x6B,
+0x81, 0xF2, 0x70, 0x9B, 0x4C, 0xEB, 0x01, 0x23,
+0x01, 0x6B, 0x05, 0x97, 0x04, 0x90, 0xFF, 0x6A,
+0x6C, 0xEA, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0xFF, 0x68,
+0x8C, 0xE8, 0x90, 0x67, 0x00, 0x18, 0x0A, 0x58,
+0x30, 0xF0, 0x20, 0x6B, 0x81, 0xF2, 0x94, 0x9B,
+0x01, 0x6B, 0x4C, 0xEC, 0x0A, 0x2C, 0x90, 0x67,
+0x00, 0x18, 0x0F, 0x58, 0x30, 0xF0, 0x20, 0x6B,
+0x81, 0xF2, 0x78, 0x9B, 0x4C, 0xEB, 0x01, 0x23,
+0x01, 0x6B, 0x05, 0x97, 0x04, 0x90, 0xFF, 0x6A,
+0x6C, 0xEA, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0xFF, 0x63, 0x01, 0xD1, 0x00, 0xD0, 0x30, 0xF0,
+0x20, 0x6B, 0x81, 0xF2, 0x1C, 0x9B, 0x30, 0xF0,
+0x20, 0x6F, 0x85, 0xF5, 0x18, 0x4F, 0x60, 0xA0,
+0xFF, 0x6A, 0x4C, 0xEC, 0x1B, 0x65, 0x38, 0x67,
+0x7F, 0x6B, 0x2C, 0xEB, 0xC8, 0xF1, 0x65, 0xC7,
+0x60, 0xA0, 0x80, 0x68, 0x0B, 0xE8, 0x4C, 0xEB,
+0x0C, 0xEB, 0xC8, 0xF1, 0x66, 0xC7, 0xC8, 0xF1,
+0x65, 0xA7, 0x4C, 0xED, 0x4C, 0xEE, 0x6E, 0xEC,
+0x53, 0x2C, 0x02, 0x5D, 0xF2, 0xF0, 0x60, 0x45,
+0x09, 0x61, 0x8E, 0x45, 0x4C, 0xEC, 0x02, 0x5C,
+0x44, 0x61, 0x08, 0x5D, 0x49, 0x60, 0xC8, 0xF1,
+0x46, 0xA7, 0x3F, 0x22, 0x1F, 0xF7, 0x00, 0x6A,
+0x6C, 0xEA, 0x02, 0xF0, 0x00, 0x72, 0x01, 0x60,
+0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF0,
+0x5C, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
+0x01, 0xF1, 0x40, 0x9A, 0x4D, 0xE3, 0xC0, 0xC3,
+0x33, 0x10, 0x1F, 0x2A, 0x1F, 0xF7, 0x00, 0x6A,
+0x6C, 0xEA, 0x02, 0xF0, 0x00, 0x72, 0x01, 0x60,
+0x07, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF0,
+0x9C, 0x9A, 0x91, 0xE3, 0x40, 0xA4, 0x0B, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF0, 0x9C, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF1, 0x40, 0x9A,
+0x91, 0xE3, 0x4D, 0xE3, 0x40, 0xA3, 0xFF, 0x6B,
+0x6C, 0xEA, 0x01, 0x4A, 0x6C, 0xEA, 0x40, 0xC4,
+0x13, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF1,
+0x40, 0x9A, 0xFF, 0x6C, 0x4D, 0xE3, 0x40, 0xA3,
+0x8C, 0xEA, 0x01, 0x4A, 0x8C, 0xEA, 0x40, 0xC3,
+0x07, 0x10, 0x1F, 0xF7, 0x00, 0x6A, 0x6C, 0xEA,
+0x02, 0xF0, 0x00, 0x72, 0xCE, 0x61, 0xCE, 0x17,
+0x01, 0x91, 0x00, 0x90, 0x01, 0x63, 0x20, 0xE8,
 0xFE, 0x63, 0x03, 0xD1, 0x02, 0xD0, 0x30, 0xF0,
-0x20, 0x6A, 0x01, 0xF4, 0x4C, 0x9A, 0xFF, 0x6B,
+0x20, 0x6A, 0x81, 0xF2, 0x5C, 0x9A, 0xFF, 0x6B,
 0x80, 0x6E, 0x80, 0xA2, 0xE0, 0xA2, 0x30, 0xF0,
-0x20, 0x6A, 0x01, 0xF4, 0xB0, 0x9A, 0xCB, 0xEE,
+0x20, 0x6A, 0xA1, 0xF2, 0xA0, 0x9A, 0xCB, 0xEE,
 0x6C, 0xEC, 0x40, 0xA5, 0x00, 0xA5, 0x6C, 0xEA,
 0xB0, 0x67, 0x6C, 0xED, 0x00, 0xD5, 0xA3, 0x67,
 0xCC, 0xED, 0xEC, 0xED, 0xA0, 0xF2, 0x17, 0x25,
@@ -21659,175 +23066,175 @@ u8 array_mp_8822b_fw_nic[] = {
 0x00, 0x4E, 0x80, 0xF4, 0x1C, 0x6A, 0x08, 0x10,
 0x80, 0xF4, 0x18, 0x6F, 0x80, 0xF4, 0x14, 0x6D,
 0x80, 0xF4, 0x10, 0x6E, 0x80, 0xF4, 0x0C, 0x6A,
-0x7F, 0x69, 0x28, 0x68, 0x2C, 0xEC, 0x18, 0xEC,
-0x30, 0xF0, 0x20, 0x6B, 0x8C, 0xF0, 0x14, 0x4B,
+0x7F, 0x69, 0x2A, 0x68, 0x2C, 0xEC, 0x18, 0xEC,
+0x30, 0xF0, 0x20, 0x6B, 0xAB, 0xF5, 0x1C, 0x4B,
 0x12, 0xE8, 0x0D, 0xE3, 0x00, 0x90, 0x2C, 0xE8,
 0x01, 0x70, 0x80, 0xF1, 0x18, 0x60, 0x07, 0x20,
 0x02, 0x70, 0xC0, 0xF0, 0x1A, 0x60, 0x03, 0x70,
 0xE0, 0xF1, 0x19, 0x60, 0x8C, 0x12, 0x1F, 0xF7,
 0x00, 0x68, 0x4C, 0xE8, 0x05, 0x28, 0x30, 0xF0,
-0x20, 0x68, 0x41, 0xF1, 0x00, 0x98, 0x04, 0x10,
-0x30, 0xF0, 0x20, 0x68, 0x41, 0xF1, 0x04, 0x98,
-0x3C, 0xA3, 0x01, 0xE2, 0x20, 0xC0, 0x01, 0x42,
+0x20, 0x68, 0xE1, 0xF0, 0x1C, 0x98, 0x04, 0x10,
+0x30, 0xF0, 0x20, 0x68, 0x01, 0xF1, 0x00, 0x98,
+0x3B, 0xA3, 0x01, 0xE2, 0x20, 0xC0, 0x01, 0x42,
 0x1F, 0xF7, 0x00, 0x69, 0x2C, 0xE8, 0x02, 0xF0,
 0x00, 0x70, 0x01, 0x60, 0x09, 0x28, 0x30, 0xF0,
-0x20, 0x68, 0x01, 0xF4, 0x34, 0x98, 0x25, 0xE2,
+0x20, 0x68, 0xA1, 0xF2, 0x24, 0x98, 0x25, 0xE2,
 0x00, 0xD1, 0x31, 0xA3, 0x19, 0x65, 0x08, 0x10,
-0x30, 0xF0, 0x20, 0x68, 0x01, 0xF4, 0x38, 0x98,
+0x30, 0xF0, 0x20, 0x68, 0xA1, 0xF2, 0x28, 0x98,
 0x25, 0xE2, 0x00, 0xD1, 0x11, 0xA3, 0x18, 0x65,
 0x38, 0x67, 0x03, 0x68, 0x2C, 0xE8, 0x00, 0x91,
 0x00, 0xC1, 0x02, 0x42, 0x1F, 0xF7, 0x00, 0x69,
 0x2C, 0xE8, 0x02, 0xF0, 0x00, 0x70, 0x01, 0x60,
-0x05, 0x28, 0x30, 0xF0, 0x20, 0x68, 0x61, 0xF3,
-0x10, 0x98, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x68,
-0x01, 0xF4, 0x1C, 0x98, 0x31, 0xA3, 0x01, 0xE2,
+0x05, 0x28, 0x30, 0xF0, 0x20, 0x68, 0x21, 0xF1,
+0x00, 0x98, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x68,
+0xA1, 0xF2, 0x0C, 0x98, 0x31, 0xA3, 0x01, 0xE2,
 0x3E, 0x31, 0x20, 0xC0, 0x03, 0x42, 0x1F, 0xF7,
 0x00, 0x69, 0x2C, 0xE8, 0x02, 0xF0, 0x00, 0x70,
 0x01, 0x60, 0x05, 0x28, 0x30, 0xF0, 0x20, 0x68,
-0x21, 0xF4, 0x00, 0x98, 0x04, 0x10, 0x30, 0xF0,
-0x20, 0x68, 0x21, 0xF4, 0x04, 0x98, 0x09, 0xE2,
+0xA1, 0xF2, 0x10, 0x98, 0x04, 0x10, 0x30, 0xF0,
+0x20, 0x68, 0xA1, 0xF2, 0x14, 0x98, 0x09, 0xE2,
 0x11, 0xA3, 0x03, 0x69, 0x12, 0x30, 0x2C, 0xE8,
 0x00, 0xC2, 0x1F, 0xF7, 0x00, 0x6A, 0xCC, 0xEA,
-0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1,
-0x40, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0x41, 0xF1, 0x44, 0x9A, 0x00, 0xA3, 0x49, 0xE6,
+0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF0,
+0x5C, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
+0x01, 0xF1, 0x40, 0x9A, 0x00, 0xA3, 0x49, 0xE6,
 0x00, 0xC2, 0x41, 0x46, 0x1F, 0xF7, 0x00, 0x68,
 0x0C, 0xEA, 0x02, 0xF0, 0x00, 0x72, 0x01, 0x60,
-0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF4,
-0x54, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0x01, 0xF4, 0x58, 0x9A, 0x01, 0xA3, 0x49, 0xE6,
+0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF2,
+0x44, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
+0xA1, 0xF2, 0x48, 0x9A, 0x01, 0xA3, 0x49, 0xE6,
 0x00, 0xC2, 0x42, 0x46, 0x1F, 0xF7, 0x00, 0x68,
 0x0C, 0xEA, 0x02, 0xF0, 0x00, 0x72, 0x01, 0x60,
-0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF3,
-0x10, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0x01, 0xF4, 0x1C, 0x9A, 0x52, 0xA3, 0x01, 0x69,
+0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF1,
+0x00, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
+0xA1, 0xF2, 0x0C, 0x9A, 0x52, 0xA3, 0x01, 0x69,
 0x01, 0xE6, 0x4A, 0x32, 0x2C, 0xEA, 0x40, 0xC0,
 0x43, 0x46, 0x1F, 0xF7, 0x00, 0x68, 0x0C, 0xEA,
 0x02, 0xF0, 0x00, 0x72, 0x01, 0x60, 0x05, 0x2A,
-0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF4, 0x40, 0x9A,
-0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF4,
-0x44, 0x9A, 0x59, 0xE6, 0x44, 0xA3, 0x40, 0xC6,
+0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF2, 0x50, 0x9A,
+0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF2,
+0x54, 0x9A, 0x59, 0xE6, 0x44, 0xA3, 0x40, 0xC6,
 0x1F, 0xF7, 0x00, 0x6A, 0xAC, 0xEA, 0x05, 0x2A,
-0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1, 0x40, 0x9A,
-0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1,
-0x44, 0x9A, 0x55, 0xE5, 0x30, 0xF0, 0x20, 0x6A,
-0xA1, 0xF3, 0x5C, 0x9A, 0x8C, 0x33, 0x49, 0xE3,
+0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF0, 0x5C, 0x9A,
+0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF1,
+0x40, 0x9A, 0x55, 0xE5, 0x30, 0xF0, 0x20, 0x6A,
+0x41, 0xF2, 0x4C, 0x9A, 0x8C, 0x33, 0x49, 0xE3,
 0x40, 0x9A, 0x40, 0xDD, 0x1F, 0xF7, 0x00, 0x6A,
 0xEC, 0xEA, 0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A,
-0x41, 0xF1, 0x40, 0x9A, 0x04, 0x10, 0x30, 0xF0,
-0x20, 0x6A, 0x41, 0xF1, 0x44, 0x9A, 0x5D, 0xE7,
-0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF3, 0x48, 0x9A,
+0xE1, 0xF0, 0x5C, 0x9A, 0x04, 0x10, 0x30, 0xF0,
+0x20, 0x6A, 0x01, 0xF1, 0x40, 0x9A, 0x5D, 0xE7,
+0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF2, 0x58, 0x9A,
 0x8C, 0x34, 0x51, 0xE4, 0x40, 0x9C, 0x40, 0xDF,
 0xB6, 0x11, 0x1F, 0xF7, 0x00, 0x6C, 0x4C, 0xEC,
-0x09, 0x2C, 0x30, 0xF0, 0x20, 0x6C, 0x41, 0xF1,
-0xE0, 0x9C, 0x91, 0xA3, 0x03, 0x68, 0xFD, 0xE2,
+0x09, 0x2C, 0x30, 0xF0, 0x20, 0x6C, 0xE1, 0xF0,
+0xFC, 0x9C, 0x91, 0xA3, 0x03, 0x68, 0xFD, 0xE2,
 0x8A, 0x34, 0x0A, 0x10, 0x30, 0xF0, 0x20, 0x6C,
-0x41, 0xF1, 0xE4, 0x9C, 0x91, 0xA3, 0x03, 0x68,
+0x01, 0xF1, 0xE0, 0x9C, 0x91, 0xA3, 0x03, 0x68,
 0xFD, 0xE2, 0x8A, 0x34, 0x0C, 0xEC, 0xFF, 0x68,
 0x0C, 0xEC, 0x80, 0xC7, 0x81, 0x42, 0x1F, 0xF7,
 0x00, 0x6F, 0xEC, 0xEC, 0x02, 0xF0, 0x00, 0x74,
 0x01, 0x60, 0x05, 0x2C, 0x30, 0xF0, 0x20, 0x6C,
-0x01, 0xF4, 0x94, 0x9C, 0x04, 0x10, 0x30, 0xF0,
-0x20, 0x6C, 0x01, 0xF4, 0x98, 0x9C, 0xE3, 0xA3,
+0xA1, 0xF2, 0x84, 0x9C, 0x04, 0x10, 0x30, 0xF0,
+0x20, 0x6C, 0xA1, 0xF2, 0x88, 0x9C, 0xE3, 0xA3,
 0x91, 0xE2, 0xE0, 0xC4, 0x82, 0x42, 0x1F, 0xF7,
 0x00, 0x6F, 0xEC, 0xEC, 0x02, 0xF0, 0x00, 0x74,
 0x01, 0x60, 0x05, 0x2C, 0x30, 0xF0, 0x20, 0x6C,
-0x61, 0xF3, 0x90, 0x9C, 0x04, 0x10, 0x30, 0xF0,
-0x20, 0x6C, 0x01, 0xF4, 0x9C, 0x9C, 0xE5, 0xA3,
+0x21, 0xF1, 0x80, 0x9C, 0x04, 0x10, 0x30, 0xF0,
+0x20, 0x6C, 0xA1, 0xF2, 0x8C, 0x9C, 0xE5, 0xA3,
 0x91, 0xE2, 0xE0, 0xC4, 0x83, 0x42, 0x1F, 0xF7,
 0x00, 0x6F, 0xEC, 0xEC, 0x02, 0xF0, 0x00, 0x74,
 0x01, 0x60, 0x05, 0x2C, 0x30, 0xF0, 0x20, 0x6C,
-0x21, 0xF4, 0x80, 0x9C, 0x04, 0x10, 0x30, 0xF0,
-0x20, 0x6C, 0x21, 0xF4, 0x84, 0x9C, 0x89, 0xE2,
+0xA1, 0xF2, 0x90, 0x9C, 0x04, 0x10, 0x30, 0xF0,
+0x20, 0x6C, 0xA1, 0xF2, 0x94, 0x9C, 0x89, 0xE2,
 0x86, 0xA3, 0x80, 0xC2, 0x1F, 0xF7, 0x00, 0x6A,
 0xCC, 0xEA, 0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A,
-0x41, 0xF1, 0x40, 0x9A, 0x04, 0x10, 0x30, 0xF0,
-0x20, 0x6A, 0x41, 0xF1, 0x44, 0x9A, 0x59, 0xE6,
-0x5A, 0xA3, 0x40, 0xC6, 0x1F, 0xF7, 0x00, 0x6A,
+0xE1, 0xF0, 0x5C, 0x9A, 0x04, 0x10, 0x30, 0xF0,
+0x20, 0x6A, 0x01, 0xF1, 0x40, 0x9A, 0x59, 0xE6,
+0x59, 0xA3, 0x40, 0xC6, 0x1F, 0xF7, 0x00, 0x6A,
 0xAC, 0xEA, 0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A,
-0x41, 0xF1, 0x40, 0x9A, 0x04, 0x10, 0x30, 0xF0,
-0x20, 0x6A, 0x41, 0xF1, 0x44, 0x9A, 0x20, 0xF0,
+0xE1, 0xF0, 0x5C, 0x9A, 0x04, 0x10, 0x30, 0xF0,
+0x20, 0x6A, 0x01, 0xF1, 0x40, 0x9A, 0x20, 0xF0,
 0x82, 0xA3, 0x49, 0xE5, 0x80, 0xC2, 0x41, 0x45,
 0x1F, 0xF7, 0x00, 0x6C, 0x8C, 0xEA, 0x02, 0xF0,
 0x00, 0x72, 0x01, 0x60, 0x05, 0x2A, 0x30, 0xF0,
-0x20, 0x6A, 0x01, 0xF4, 0x54, 0x9A, 0x04, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF4, 0x58, 0x9A,
+0x20, 0x6A, 0xA1, 0xF2, 0x44, 0x9A, 0x04, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF2, 0x48, 0x9A,
 0x20, 0xF0, 0x63, 0xA3, 0x49, 0xE5, 0x60, 0xC2,
 0x42, 0x45, 0x1F, 0xF7, 0x00, 0x6B, 0x6C, 0xEA,
 0x02, 0xF0, 0x00, 0x72, 0x01, 0x60, 0x05, 0x2A,
-0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF3, 0x50, 0x9A,
-0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF4,
-0x5C, 0x9A, 0x30, 0xF0, 0x20, 0x6B, 0xA0, 0xF1,
-0x68, 0xA3, 0x49, 0xE5, 0x60, 0xC2, 0x43, 0x45,
+0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF1, 0x40, 0x9A,
+0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF2,
+0x4C, 0x9A, 0x30, 0xF0, 0x20, 0x6B, 0x60, 0xF1,
+0x78, 0xA3, 0x49, 0xE5, 0x60, 0xC2, 0x43, 0x45,
 0x1F, 0xF7, 0x00, 0x6B, 0x6C, 0xEA, 0x02, 0xF0,
 0x00, 0x72, 0x01, 0x60, 0x05, 0x2A, 0x30, 0xF0,
-0x20, 0x6A, 0x21, 0xF4, 0x40, 0x9A, 0x04, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF4, 0x44, 0x9A,
-0x55, 0xE5, 0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF1,
-0x49, 0xA2, 0x40, 0xC5, 0xFC, 0x10, 0x1F, 0xF7,
+0x20, 0x6A, 0xA1, 0xF2, 0x50, 0x9A, 0x04, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF2, 0x54, 0x9A,
+0x55, 0xE5, 0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF1,
+0x59, 0xA2, 0x40, 0xC5, 0xFC, 0x10, 0x1F, 0xF7,
 0x00, 0x6D, 0x4C, 0xED, 0x10, 0x2D, 0x30, 0xF0,
-0x20, 0x6D, 0x41, 0xF1, 0xC0, 0x9D, 0x30, 0xF0,
-0x20, 0x6D, 0xA1, 0xF3, 0xA0, 0x9D, 0x94, 0x37,
+0x20, 0x6D, 0xE1, 0xF0, 0xDC, 0x9D, 0x30, 0xF0,
+0x20, 0x6D, 0x21, 0xF2, 0xAC, 0x9D, 0x94, 0x37,
 0xD9, 0xE2, 0xB5, 0xE7, 0xE0, 0xA5, 0xFF, 0x6D,
 0xEC, 0xED, 0xA0, 0xC6, 0x0F, 0x10, 0x30, 0xF0,
-0x20, 0x6E, 0xA1, 0xF3, 0xC0, 0x9E, 0x94, 0x37,
+0x20, 0x6E, 0x21, 0xF2, 0xCC, 0x9E, 0x94, 0x37,
 0x30, 0xF0, 0x20, 0x6D, 0xD9, 0xE7, 0xC0, 0xA6,
-0x41, 0xF1, 0xA4, 0x9D, 0xFF, 0x69, 0x2C, 0xEE,
+0x01, 0xF1, 0xA0, 0x9D, 0xFF, 0x69, 0x2C, 0xEE,
 0xB5, 0xE2, 0xC0, 0xC5, 0xA1, 0x42, 0x1F, 0xF7,
 0x00, 0x6E, 0xCC, 0xED, 0x02, 0xF0, 0x00, 0x75,
 0x01, 0x60, 0x05, 0x2D, 0x30, 0xF0, 0x20, 0x6D,
-0x01, 0xF4, 0xB4, 0x9D, 0x04, 0x10, 0x30, 0xF0,
-0x20, 0x6D, 0x01, 0xF4, 0xB8, 0x9D, 0x30, 0xF0,
-0x20, 0x6E, 0x81, 0xF3, 0xDC, 0x9E, 0x94, 0x34,
+0xA1, 0xF2, 0xA4, 0x9D, 0x04, 0x10, 0x30, 0xF0,
+0x20, 0x6D, 0xA1, 0xF2, 0xA8, 0x9D, 0x30, 0xF0,
+0x20, 0x6E, 0x21, 0xF2, 0xC8, 0x9E, 0x94, 0x34,
 0xB5, 0xE2, 0xD1, 0xE4, 0xC0, 0xA4, 0xFF, 0x6C,
 0xCC, 0xEC, 0x80, 0xC5, 0x82, 0x42, 0x1F, 0xF7,
 0x00, 0x6D, 0xAC, 0xEC, 0x02, 0xF0, 0x00, 0x74,
 0x01, 0x60, 0x05, 0x2C, 0x30, 0xF0, 0x20, 0x6C,
-0x61, 0xF3, 0x90, 0x9C, 0x04, 0x10, 0x30, 0xF0,
-0x20, 0x6C, 0x01, 0xF4, 0x9C, 0x9C, 0xB7, 0xA3,
+0x21, 0xF1, 0x80, 0x9C, 0x04, 0x10, 0x30, 0xF0,
+0x20, 0x6C, 0xA1, 0xF2, 0x8C, 0x9C, 0xB8, 0xA3,
 0x91, 0xE2, 0xA0, 0xC4, 0x83, 0x42, 0x1F, 0xF7,
 0x00, 0x6D, 0xAC, 0xEC, 0x02, 0xF0, 0x00, 0x74,
 0x01, 0x60, 0x05, 0x2C, 0x30, 0xF0, 0x20, 0x6C,
-0x21, 0xF4, 0x80, 0x9C, 0x04, 0x10, 0x30, 0xF0,
-0x20, 0x6C, 0x21, 0xF4, 0x84, 0x9C, 0x6A, 0xA3,
+0xA1, 0xF2, 0x90, 0x9C, 0x04, 0x10, 0x30, 0xF0,
+0x20, 0x6C, 0xA1, 0xF2, 0x94, 0x9C, 0x68, 0xA3,
 0x89, 0xE2, 0x60, 0xC2, 0x94, 0x10, 0x1F, 0xF7,
 0x00, 0x6B, 0x4C, 0xEB, 0x05, 0x2B, 0x30, 0xF0,
-0x20, 0x6B, 0x41, 0xF1, 0x60, 0x9B, 0x04, 0x10,
-0x30, 0xF0, 0x20, 0x6B, 0x41, 0xF1, 0x64, 0x9B,
-0x69, 0xE2, 0x52, 0xF4, 0x02, 0x44, 0x30, 0xF0,
-0x20, 0x6B, 0x25, 0xF7, 0x10, 0x4B, 0x08, 0x30,
+0x20, 0x6B, 0xE1, 0xF0, 0x7C, 0x9B, 0x04, 0x10,
+0x30, 0xF0, 0x20, 0x6B, 0x01, 0xF1, 0x60, 0x9B,
+0x69, 0xE2, 0x72, 0xF0, 0x00, 0x44, 0x30, 0xF0,
+0x20, 0x6B, 0x85, 0xF5, 0x18, 0x4B, 0x08, 0x30,
 0x0D, 0xE3, 0x62, 0x9B, 0x60, 0xDA, 0x1F, 0xF7,
 0x00, 0x6A, 0xCC, 0xEA, 0x05, 0x2A, 0x30, 0xF0,
-0x20, 0x6A, 0x41, 0xF1, 0x40, 0x9A, 0x04, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1, 0x44, 0x9A,
+0x20, 0x6A, 0xE1, 0xF0, 0x5C, 0x9A, 0x04, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF1, 0x40, 0x9A,
 0x14, 0x6B, 0x78, 0xEC, 0x59, 0xE6, 0x30, 0xF0,
-0x20, 0x6A, 0x25, 0xF7, 0x10, 0x4A, 0x12, 0xEB,
-0x69, 0xE2, 0xCA, 0xF3, 0x4C, 0x9A, 0x40, 0xDE,
+0x20, 0x6A, 0x85, 0xF5, 0x18, 0x4A, 0x12, 0xEB,
+0x69, 0xE2, 0xC8, 0xF2, 0x44, 0x9A, 0x40, 0xDE,
 0x1F, 0xF7, 0x00, 0x6A, 0xAC, 0xEA, 0x05, 0x2A,
-0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1, 0x40, 0x9A,
-0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1,
-0x44, 0x9A, 0x14, 0x6B, 0x78, 0xEC, 0x55, 0xE5,
-0x30, 0xF0, 0x20, 0x6A, 0x25, 0xF7, 0x10, 0x4A,
-0x12, 0xEB, 0x69, 0xE2, 0xCA, 0xF3, 0x50, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF0, 0x5C, 0x9A,
+0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF1,
+0x40, 0x9A, 0x14, 0x6B, 0x78, 0xEC, 0x55, 0xE5,
+0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5, 0x18, 0x4A,
+0x12, 0xEB, 0x69, 0xE2, 0xC8, 0xF2, 0x48, 0x9A,
 0x40, 0xDD, 0x1F, 0xF7, 0x00, 0x6A, 0xEC, 0xEA,
-0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1,
-0x60, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0x41, 0xF1, 0x64, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
-0x25, 0xF7, 0x10, 0x4A, 0x49, 0xE4, 0x2C, 0xF0,
-0x58, 0xA2, 0x6D, 0xE7, 0x40, 0xC3, 0x41, 0x47,
+0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF0,
+0x7C, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
+0x01, 0xF1, 0x60, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
+0x85, 0xF5, 0x18, 0x4A, 0x49, 0xE4, 0xA8, 0xF7,
+0x50, 0xA2, 0x6D, 0xE7, 0x40, 0xC3, 0x41, 0x47,
 0x1F, 0xF7, 0x00, 0x6B, 0x6C, 0xEA, 0x02, 0xF0,
 0x00, 0x72, 0x01, 0x60, 0x05, 0x2A, 0x30, 0xF0,
-0x20, 0x6A, 0x01, 0xF4, 0x74, 0x9A, 0x04, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF4, 0x78, 0x9A,
-0x30, 0xF0, 0x20, 0x6A, 0x25, 0xF7, 0x10, 0x4A,
-0x49, 0xE4, 0x6C, 0xF1, 0x56, 0xA2, 0x6D, 0xE7,
+0x20, 0x6A, 0xA1, 0xF2, 0x64, 0x9A, 0x04, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF2, 0x68, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x85, 0xF5, 0x18, 0x4A,
+0x49, 0xE4, 0x29, 0xF0, 0x4E, 0xA2, 0x6D, 0xE7,
 0x40, 0xC3, 0x42, 0x47, 0x1F, 0xF7, 0x00, 0x6B,
 0x6C, 0xEA, 0x02, 0xF0, 0x00, 0x72, 0x01, 0x60,
-0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF3,
-0x50, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0x01, 0xF4, 0x5C, 0x9A, 0x5D, 0xE7, 0x30, 0xF0,
-0x20, 0x6A, 0x25, 0xF7, 0x10, 0x4A, 0x51, 0xE4,
-0xCC, 0xF0, 0x57, 0xA4, 0x40, 0xC7, 0x03, 0x91,
+0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF1,
+0x40, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
+0xA1, 0xF2, 0x4C, 0x9A, 0x5D, 0xE7, 0x30, 0xF0,
+0x20, 0x6A, 0x85, 0xF5, 0x18, 0x4A, 0x51, 0xE4,
+0xE8, 0xF7, 0x4F, 0xA4, 0x40, 0xC7, 0x03, 0x91,
 0x02, 0x90, 0x02, 0x63, 0x20, 0xE8, 0x00, 0x65,
 0x20, 0xE8, 0x00, 0x65, 0xAA, 0xEC, 0x64, 0x6A,
 0x31, 0x60, 0x2F, 0x24, 0x83, 0xED, 0x2D, 0x61,
@@ -21846,7 +23253,7 @@ u8 array_mp_8822b_fw_nic[] = {
 0x20, 0xE8, 0x00, 0x65, 0x40, 0xA4, 0x60, 0xA5,
 0x60, 0xC4, 0x40, 0xC5, 0x20, 0xE8, 0x00, 0x65,
 0xFF, 0x6B, 0x6C, 0xED, 0x30, 0xF0, 0x20, 0x6A,
-0xA4, 0x35, 0xC5, 0xF5, 0x0C, 0x4A, 0x49, 0xE5,
+0xA4, 0x35, 0x45, 0xF4, 0x08, 0x4A, 0x49, 0xE5,
 0x40, 0xAA, 0x6C, 0xEC, 0xCC, 0xEB, 0x58, 0xEC,
 0xFF, 0xF7, 0x1F, 0x6C, 0x12, 0xEA, 0x8C, 0xEA,
 0x05, 0x23, 0x52, 0x35, 0x56, 0x33, 0x6D, 0xE5,
@@ -21859,7 +23266,7 @@ u8 array_mp_8822b_fw_nic[] = {
 0x57, 0xE5, 0x00, 0x6A, 0x0A, 0x25, 0x6B, 0xEB,
 0xFF, 0xE3, 0x27, 0xE7, 0x93, 0xE1, 0xB1, 0xE4,
 0x83, 0xED, 0x64, 0x6A, 0x02, 0x61, 0x00, 0x18,
-0xF1, 0x53, 0x07, 0x97, 0x06, 0x91, 0x05, 0x90,
+0x45, 0x5A, 0x07, 0x97, 0x06, 0x91, 0x05, 0x90,
 0x04, 0x63, 0x00, 0xEF, 0xFF, 0x6A, 0x4C, 0xEC,
 0x20, 0x5C, 0x01, 0x6B, 0x03, 0x60, 0xE0, 0x4C,
 0x4C, 0xEC, 0x00, 0x6B, 0x68, 0x33, 0x75, 0xE5,
@@ -21869,2707 +23276,2898 @@ u8 array_mp_8822b_fw_nic[] = {
 0x6C, 0xEA, 0x6C, 0xEE, 0x6C, 0xED, 0x82, 0x67,
 0x03, 0x26, 0x88, 0x42, 0xE8, 0x4C, 0x6C, 0xEC,
 0x20, 0x5C, 0x0B, 0x61, 0x30, 0xF0, 0x20, 0x6B,
-0xA1, 0xF3, 0x68, 0x9B, 0xAC, 0x35, 0xE0, 0x4C,
+0x21, 0xF2, 0x78, 0x9B, 0xAC, 0x35, 0xE0, 0x4C,
 0x75, 0xE5, 0xFF, 0x6B, 0xA0, 0x9D, 0x6C, 0xEC,
-0x07, 0x10, 0x30, 0xF0, 0x20, 0x6B, 0xA1, 0xF3,
-0x7C, 0x9B, 0xAC, 0x35, 0x75, 0xE5, 0xA0, 0x9D,
+0x07, 0x10, 0x30, 0xF0, 0x20, 0x6B, 0x41, 0xF2,
+0x6C, 0x9B, 0xAC, 0x35, 0x75, 0xE5, 0xA0, 0x9D,
 0x01, 0x6B, 0x64, 0xEC, 0xAC, 0xEB, 0x01, 0x2B,
 0xFF, 0x6A, 0x20, 0xE8, 0xFF, 0x6A, 0x8C, 0xEA,
-0x28, 0x6B, 0x78, 0xEA, 0x30, 0xF0, 0x20, 0x6B,
-0x8C, 0xF0, 0x14, 0x4B, 0x12, 0xEA, 0x49, 0xE3,
+0x2A, 0x6B, 0x78, 0xEA, 0x30, 0xF0, 0x20, 0x6B,
+0xAB, 0xF5, 0x1C, 0x4B, 0x12, 0xEA, 0x49, 0xE3,
 0x93, 0xA2, 0x7F, 0x6B, 0x6C, 0xEC, 0x93, 0xC2,
 0x92, 0xA2, 0x8C, 0xEB, 0x72, 0xC2, 0x20, 0xE8,
-0x30, 0xF0, 0x20, 0x6B, 0xFF, 0x6A, 0x25, 0xF7,
-0x10, 0x4B, 0x4C, 0xEC, 0xAC, 0xEA, 0x03, 0xF1,
-0xBB, 0xA3, 0x32, 0x25, 0x13, 0x74, 0x02, 0x60,
+0x30, 0xF0, 0x20, 0x6B, 0xFF, 0x6A, 0x85, 0xF5,
+0x18, 0x4B, 0x4C, 0xEC, 0xAC, 0xEA, 0x23, 0xF1,
+0xA6, 0xA3, 0x32, 0x25, 0x13, 0x74, 0x02, 0x60,
 0x0B, 0x74, 0x05, 0x61, 0x30, 0xF0, 0x20, 0x6B,
-0x49, 0xF0, 0x6D, 0xA3, 0x14, 0x10, 0x12, 0x74,
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-0x91, 0x58, 0x6C, 0xE9, 0x09, 0x61, 0x30, 0xF0,
-0x20, 0x6C, 0xC1, 0xF1, 0x08, 0x4C, 0x16, 0x92,
-0x80, 0x9C, 0x8D, 0xEA, 0x16, 0xD2, 0x09, 0x10,
-0x50, 0x58, 0x07, 0x61, 0x30, 0xF0, 0x20, 0x6A,
-0x16, 0x93, 0xC1, 0xF1, 0x44, 0x9A, 0x4D, 0xEB,
-0x16, 0xD3, 0x16, 0x94, 0x30, 0xF0, 0x20, 0x6A,
-0xE1, 0xF2, 0x1C, 0x4A, 0x04, 0xD4, 0xE0, 0x9A,
-0x1C, 0x94, 0x00, 0x6D, 0x18, 0x6E, 0x00, 0x18,
-0xF9, 0x63, 0x4C, 0xE9, 0x30, 0xF0, 0x20, 0x6A,
-0x2B, 0xF5, 0x43, 0xA2, 0x0F, 0x2A, 0x30, 0xF0,
-0x20, 0x6A, 0xE1, 0xF2, 0x1C, 0x4A, 0x14, 0x93,
-0x1C, 0x94, 0xE0, 0x9A, 0x00, 0x6D, 0xB8, 0x6E,
-0x04, 0xD3, 0x00, 0x18, 0xF9, 0x63, 0x4C, 0xE9,
-0xFF, 0x6A, 0x4C, 0xE9, 0x30, 0xF0, 0x20, 0x6B,
-0x25, 0xF7, 0x10, 0x4B, 0xE5, 0xF5, 0x4A, 0xA3,
-0x15, 0xD3, 0x20, 0x22, 0x16, 0x94, 0x30, 0xF0,
-0x20, 0x6A, 0xE1, 0xF2, 0x1C, 0x4A, 0x04, 0xD4,
-0xE0, 0x9A, 0x1C, 0x94, 0x01, 0x6D, 0x18, 0x6E,
-0x00, 0x18, 0xF9, 0x63, 0x15, 0x93, 0x4C, 0xE9,
-0xE5, 0xF5, 0x53, 0xA3, 0x0F, 0x2A, 0x14, 0x94,
-0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF2, 0x1C, 0x4A,
-0x04, 0xD4, 0xE0, 0x9A, 0x1C, 0x94, 0x01, 0x6D,
-0xB8, 0x6E, 0x00, 0x18, 0xF9, 0x63, 0x4C, 0xE9,
-0xFF, 0x6A, 0x4C, 0xE9, 0x18, 0x29, 0x30, 0xF0,
-0x20, 0x6A, 0x25, 0xF7, 0x10, 0x4A, 0x30, 0xF0,
-0x20, 0x6B, 0xC1, 0xF4, 0x68, 0x9B, 0xE5, 0xF5,
-0x80, 0x9A, 0x8C, 0xEB, 0x28, 0x23, 0xE5, 0xF5,
-0x44, 0x9A, 0x05, 0x5A, 0x24, 0x61, 0x30, 0xF0,
-0x20, 0x6C, 0x24, 0xF7, 0x14, 0x4C, 0xB0, 0x67,
-0x00, 0x18, 0x01, 0x50, 0x1C, 0x10, 0x1C, 0x94,
-0x00, 0x18, 0xE6, 0x64, 0x30, 0xF0, 0x20, 0x6A,
-0x25, 0xF7, 0x10, 0x4A, 0x30, 0xF0, 0x20, 0x6B,
-0xC1, 0xF4, 0x68, 0x9B, 0xE5, 0xF5, 0x80, 0x9A,
-0x8C, 0xEB, 0x0B, 0x23, 0xE5, 0xF5, 0x44, 0x9A,
+0x16, 0x60, 0x04, 0xD2, 0x30, 0xF0, 0x20, 0x6A,
+0xC1, 0xF3, 0xEC, 0x9A, 0x90, 0x67, 0x00, 0x6D,
+0xBE, 0x6E, 0x00, 0x18, 0xF1, 0x6B, 0x14, 0x94,
+0x00, 0x6B, 0x01, 0x4C, 0x01, 0x24, 0x01, 0x6B,
+0xFF, 0x6C, 0x4C, 0xEC, 0x6C, 0xEC, 0x90, 0x71,
+0x14, 0xD4, 0x23, 0x61, 0x11, 0x10, 0x30, 0xF0,
+0x20, 0x6A, 0x61, 0xF3, 0x48, 0x9A, 0x60, 0x98,
+0x6C, 0xEA, 0xA0, 0xF0, 0x00, 0x22, 0x41, 0x98,
+0x05, 0x5A, 0x80, 0xF0, 0x1C, 0x61, 0x30, 0xF0,
+0x20, 0x6C, 0x04, 0xF5, 0x08, 0x4C, 0x66, 0x10,
+0x01, 0x6A, 0x04, 0xD2, 0x30, 0xF0, 0x20, 0x6A,
+0x01, 0xF0, 0xFC, 0x9A, 0x90, 0x67, 0x00, 0x6D,
+0xDF, 0x6E, 0x00, 0x18, 0xF1, 0x6B, 0x14, 0x93,
+0xFF, 0x6C, 0x4C, 0xEB, 0x8C, 0xEB, 0x14, 0xD3,
+0x1C, 0x10, 0x00, 0x6A, 0x04, 0xD2, 0xA2, 0x67,
+0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF0, 0x1C, 0x4A,
+0xE0, 0x9A, 0x90, 0x67, 0xDF, 0x6E, 0x00, 0x18,
+0xF1, 0x6B, 0x14, 0x93, 0xFF, 0x6C, 0x91, 0x59,
+0x4C, 0xEB, 0x8C, 0xEB, 0x14, 0xD3, 0x07, 0x61,
+0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF0, 0x1C, 0x4A,
+0x15, 0x93, 0x40, 0x9A, 0x07, 0x10, 0x50, 0x59,
+0x07, 0x61, 0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF0,
+0x58, 0x9A, 0x15, 0x93, 0x4D, 0xEB, 0x15, 0xD3,
+0x30, 0xF0, 0x20, 0x6A, 0x15, 0x94, 0x81, 0xF1,
+0x0C, 0x4A, 0xE0, 0x9A, 0x04, 0xD4, 0x00, 0x6D,
+0x90, 0x67, 0x18, 0x6E, 0x00, 0x18, 0xF1, 0x6B,
+0x14, 0x93, 0x4C, 0xEB, 0x4A, 0xA0, 0x14, 0xD3,
+0x11, 0x22, 0x30, 0xF0, 0x20, 0x6A, 0x15, 0x94,
+0x81, 0xF1, 0x0C, 0x4A, 0xE0, 0x9A, 0x04, 0xD4,
+0x01, 0x6D, 0x90, 0x67, 0x18, 0x6E, 0x00, 0x18,
+0xF1, 0x6B, 0x14, 0x93, 0x4C, 0xEB, 0xFF, 0x6A,
+0x4C, 0xEB, 0x14, 0xD3, 0x14, 0x94, 0x12, 0x2C,
+0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF3, 0x48, 0x9A,
+0x60, 0x98, 0x6C, 0xEA, 0x38, 0x22, 0x41, 0x98,
+0x05, 0x5A, 0x35, 0x61, 0x30, 0xF0, 0x20, 0x6C,
+0x44, 0xF5, 0x1C, 0x4C, 0xB1, 0x67, 0x00, 0x18,
+0xD9, 0x55, 0x2D, 0x10, 0x30, 0xF0, 0x20, 0x6A,
+0x21, 0xF0, 0x00, 0x4A, 0xC0, 0x9A, 0x00, 0x6C,
+0xE4, 0x67, 0xB8, 0x6D, 0x00, 0x18, 0xAA, 0x2D,
+0x30, 0xF0, 0x20, 0x6B, 0x21, 0xF0, 0x00, 0x4B,
+0xC0, 0x9B, 0xB8, 0x6D, 0x01, 0x6F, 0x00, 0x6C,
+0x00, 0x18, 0xAA, 0x2D, 0x90, 0x67, 0x00, 0x18,
+0xE2, 0x6C, 0x90, 0x67, 0x00, 0x18, 0xF6, 0x6C,
+0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF3, 0x48, 0x9A,
+0x60, 0x98, 0x6C, 0xEA, 0x0A, 0x22, 0x41, 0x98,
 0x05, 0x5A, 0x07, 0x61, 0x30, 0xF0, 0x20, 0x6C,
-0xA4, 0xF7, 0x00, 0x4C, 0xB0, 0x67, 0x00, 0x18,
-0x01, 0x50, 0x01, 0x6A, 0x01, 0x10, 0x00, 0x6A,
+0xC4, 0xF5, 0x08, 0x4C, 0xB1, 0x67, 0x00, 0x18,
+0xD9, 0x55, 0x01, 0x6A, 0x01, 0x10, 0x00, 0x6A,
 0x1B, 0x97, 0x1A, 0x91, 0x19, 0x90, 0x0E, 0x63,
-0x00, 0xEF, 0x68, 0x40, 0xE4, 0x4B, 0xFF, 0x6A,
-0x83, 0x67, 0x4C, 0xEC, 0x1D, 0x5C, 0xFF, 0xF6,
-0x1D, 0x61, 0x01, 0x17, 0xFB, 0x63, 0x09, 0x62,
-0x08, 0xD1, 0x07, 0xD0, 0xFF, 0x68, 0x0C, 0xED,
-0x24, 0x67, 0x0D, 0xD7, 0x04, 0xD5, 0xCC, 0xE8,
-0x00, 0x18, 0x5F, 0x64, 0x0F, 0x22, 0x04, 0x95,
-0x91, 0x67, 0x00, 0x18, 0xFA, 0x67, 0x0A, 0x22,
-0x0D, 0x96, 0x91, 0x67, 0xB0, 0x67, 0x00, 0x18,
-0xDF, 0x66, 0x4B, 0xEB, 0x4D, 0xEB, 0xC0, 0xF7,
-0x62, 0x32, 0x01, 0x10, 0x00, 0x6A, 0x09, 0x97,
-0x08, 0x91, 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF,
-0xE6, 0x4B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0x00, 0xEF, 0x00, 0x6A, 0x3A, 0x17, 0x00, 0x65,
+0xFB, 0x63, 0x09, 0x62, 0x08, 0xD1, 0x07, 0xD0,
+0xFF, 0x68, 0x0C, 0xED, 0x24, 0x67, 0x0D, 0xD7,
+0x04, 0xD5, 0xCC, 0xE8, 0x00, 0x18, 0x32, 0x6C,
+0x0F, 0x22, 0x04, 0x95, 0x91, 0x67, 0x00, 0x18,
+0xE7, 0x6F, 0x0A, 0x22, 0x0D, 0x96, 0x91, 0x67,
+0xB0, 0x67, 0x00, 0x18, 0xDF, 0x6E, 0x4B, 0xEB,
+0x4D, 0xEB, 0xC0, 0xF7, 0x62, 0x32, 0x01, 0x10,
+0x00, 0x6A, 0x09, 0x97, 0x08, 0x91, 0x07, 0x90,
+0x05, 0x63, 0x00, 0xEF, 0x79, 0x2D, 0x00, 0x00,
+0xF6, 0xBC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 };
 
-u32 array_length_mp_8822b_fw_nic = 119872;
+u32 array_length_mp_8822b_fw_nic = 127496;
 
 u8 array_mp_8822b_fw_wowlan[] = {
-0x22, 0x88, 0x00, 0x00, 0x08, 0x00, 0x01, 0x00,
-0x10, 0x3C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x0A, 0x05, 0x11, 0x22, 0xE0, 0x07, 0x00, 0x00,
-0x08, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x20, 0x80, 0x50, 0x0C, 0x00, 0x00,
+0x22, 0x88, 0x00, 0x00, 0x0D, 0x00, 0x01, 0x00,
+0x67, 0x47, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x03, 0x0D, 0x0F, 0x28, 0xE1, 0x07, 0x00, 0x00,
+0x08, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x20, 0x80, 0xB8, 0x0B, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0xD8, 0xF4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x38, 0x13, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x10, 0x12, 0x80, 0x00, 0x00, 0x00, 0x80,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -24580,11 +26178,11 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x71, 0x27, 0x00, 0x80, 0xA5, 0x06, 0x00, 0x80,
+0x3D, 0x2D, 0x00, 0x80, 0xE5, 0x06, 0x00, 0x80,
 0x03, 0x02, 0x01, 0xFE, 0x03, 0x03, 0x01, 0xFE,
 0x03, 0x04, 0x01, 0xFE, 0x03, 0x05, 0x01, 0xFE,
 0x03, 0x06, 0x01, 0xFE, 0x03, 0x07, 0x01, 0xFE,
-0xB5, 0x87, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00,
+0xE9, 0x9B, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -24592,7 +26190,7 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0xE1, 0x88, 0x00, 0x80, 0x01, 0x00, 0x00, 0x00,
+0x49, 0x9D, 0x00, 0x80, 0x01, 0x00, 0x00, 0x00,
 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -24600,51 +26198,63 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x50, 0x0C, 0x20, 0x80, 0x55, 0x89, 0x00, 0x80,
-0x03, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x58, 0x0C, 0x20, 0x80,
-0x06, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00,
-0x01, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
-0x10, 0x00, 0x40, 0x00, 0x03, 0x3D, 0x00, 0x80,
-0x19, 0x3D, 0x00, 0x80, 0x2F, 0x3D, 0x00, 0x80,
-0x45, 0x3D, 0x00, 0x80, 0x5F, 0x3D, 0x00, 0x80,
-0xB7, 0x3D, 0x00, 0x80, 0xCD, 0x3D, 0x00, 0x80,
-0xEB, 0x3D, 0x00, 0x80, 0x1D, 0x3E, 0x00, 0x80,
-0x47, 0x3E, 0x00, 0x80, 0xFD, 0x46, 0x00, 0x80,
-0x03, 0x47, 0x00, 0x80, 0x0F, 0x47, 0x00, 0x80,
-0x1B, 0x47, 0x00, 0x80, 0x27, 0x47, 0x00, 0x80,
-0x6D, 0x49, 0x00, 0x80, 0x55, 0x4A, 0x00, 0x80,
-0xCF, 0x49, 0x00, 0x80, 0x55, 0x4A, 0x00, 0x80,
-0x15, 0x49, 0x00, 0x80, 0x55, 0x4A, 0x00, 0x80,
-0x55, 0x4A, 0x00, 0x80, 0x55, 0x4A, 0x00, 0x80,
-0x37, 0x4A, 0x00, 0x80, 0x55, 0x4A, 0x00, 0x80,
-0x55, 0x4A, 0x00, 0x80, 0x55, 0x4A, 0x00, 0x80,
-0xAF, 0x48, 0x00, 0x80, 0x09, 0x4C, 0x00, 0x80,
-0x1D, 0x4C, 0x00, 0x80, 0x31, 0x4C, 0x00, 0x80,
-0x45, 0x4C, 0x00, 0x80, 0x5B, 0x4C, 0x00, 0x80,
-0x07, 0x4D, 0x00, 0x80, 0x1B, 0x4D, 0x00, 0x80,
-0x2F, 0x4D, 0x00, 0x80, 0x43, 0x4D, 0x00, 0x80,
-0x59, 0x4D, 0x00, 0x80, 0xA7, 0x51, 0x00, 0x80,
-0xB1, 0x51, 0x00, 0x80, 0xBB, 0x51, 0x00, 0x80,
-0xC5, 0x51, 0x00, 0x80, 0xCF, 0x51, 0x00, 0x80,
-0x0D, 0x53, 0x00, 0x80, 0x2D, 0x53, 0x00, 0x80,
-0x4D, 0x53, 0x00, 0x80, 0x6D, 0x53, 0x00, 0x80,
-0x8D, 0x53, 0x00, 0x80, 0x2F, 0x55, 0x00, 0x80,
-0x6F, 0x55, 0x00, 0x80, 0xCB, 0x55, 0x00, 0x80,
-0x25, 0x56, 0x00, 0x80, 0x7F, 0x56, 0x00, 0x80,
+0xB8, 0x0B, 0x20, 0x80, 0x10, 0x70, 0xC9, 0x75,
+0x10, 0x70, 0xC9, 0x75, 0x10, 0x70, 0xC9, 0x75,
+0x10, 0x70, 0xC9, 0x75, 0x2A, 0xEA, 0xA0, 0x79,
+0x2C, 0xEA, 0xA0, 0x79, 0x2A, 0xEA, 0xA0, 0x79,
+0x2A, 0xEA, 0xA0, 0x79, 0x41, 0x55, 0x76, 0x87,
+0x41, 0x63, 0x74, 0x87, 0x41, 0x55, 0x76, 0x87,
+0x41, 0x63, 0x74, 0x87, 0x10, 0x60, 0xB8, 0x75,
+0x10, 0x60, 0xB7, 0x75, 0x10, 0x60, 0xB8, 0x75,
+0x10, 0x60, 0xB7, 0x75, 0x28, 0xEA, 0xA0, 0x79,
+0x2C, 0xEA, 0xA0, 0x79, 0x28, 0xEA, 0xA0, 0x79,
+0x2A, 0xEA, 0xA0, 0x79, 0x51, 0x64, 0x76, 0x87,
+0x31, 0x64, 0x76, 0x87, 0x51, 0x64, 0x76, 0x87,
+0x31, 0x64, 0x76, 0x87, 0x10, 0x70, 0xC9, 0x75,
+0x10, 0x70, 0xC9, 0x75, 0x10, 0x70, 0xC9, 0x75,
+0x10, 0x70, 0xC9, 0x75, 0x2A, 0xEA, 0xA0, 0x79,
+0x2C, 0xEA, 0xA0, 0x97, 0x2A, 0xEA, 0xA0, 0x79,
+0x2A, 0xEA, 0xA0, 0x79, 0x41, 0x55, 0x76, 0x87,
+0x41, 0x63, 0x66, 0x86, 0x61, 0x55, 0x76, 0x87,
+0x61, 0x63, 0x66, 0x86, 0x06, 0x00, 0x00, 0x00,
+0x05, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
+0x40, 0x00, 0x00, 0x00, 0x40, 0x00, 0x40, 0x00,
+0x03, 0x42, 0x00, 0x80, 0x19, 0x42, 0x00, 0x80,
+0x2F, 0x42, 0x00, 0x80, 0x45, 0x42, 0x00, 0x80,
+0x5F, 0x42, 0x00, 0x80, 0xB7, 0x42, 0x00, 0x80,
+0xCD, 0x42, 0x00, 0x80, 0xEB, 0x42, 0x00, 0x80,
+0x1D, 0x43, 0x00, 0x80, 0x47, 0x43, 0x00, 0x80,
+0xF7, 0x4C, 0x00, 0x80, 0xFD, 0x4C, 0x00, 0x80,
+0x09, 0x4D, 0x00, 0x80, 0x15, 0x4D, 0x00, 0x80,
+0x21, 0x4D, 0x00, 0x80, 0x85, 0x4F, 0x00, 0x80,
+0x6D, 0x50, 0x00, 0x80, 0xE7, 0x4F, 0x00, 0x80,
+0x6D, 0x50, 0x00, 0x80, 0x2D, 0x4F, 0x00, 0x80,
+0x6D, 0x50, 0x00, 0x80, 0x6D, 0x50, 0x00, 0x80,
+0x6D, 0x50, 0x00, 0x80, 0x4F, 0x50, 0x00, 0x80,
+0x6D, 0x50, 0x00, 0x80, 0x6D, 0x50, 0x00, 0x80,
+0x6D, 0x50, 0x00, 0x80, 0xC7, 0x4E, 0x00, 0x80,
+0x61, 0x54, 0x00, 0x80, 0x75, 0x54, 0x00, 0x80,
+0x89, 0x54, 0x00, 0x80, 0x9D, 0x54, 0x00, 0x80,
+0xB3, 0x54, 0x00, 0x80, 0xC3, 0x55, 0x00, 0x80,
+0xD7, 0x55, 0x00, 0x80, 0xEB, 0x55, 0x00, 0x80,
+0xFF, 0x55, 0x00, 0x80, 0x15, 0x56, 0x00, 0x80,
+0x03, 0x5B, 0x00, 0x80, 0x0D, 0x5B, 0x00, 0x80,
+0x17, 0x5B, 0x00, 0x80, 0x21, 0x5B, 0x00, 0x80,
+0x2B, 0x5B, 0x00, 0x80, 0x73, 0x5C, 0x00, 0x80,
+0x93, 0x5C, 0x00, 0x80, 0xB3, 0x5C, 0x00, 0x80,
+0xD3, 0x5C, 0x00, 0x80, 0xF3, 0x5C, 0x00, 0x80,
+0xD7, 0x5E, 0x00, 0x80, 0x33, 0x5F, 0x00, 0x80,
+0xC7, 0x5F, 0x00, 0x80, 0x5B, 0x60, 0x00, 0x80,
+0xF3, 0x60, 0x00, 0x80, 0x03, 0x70, 0x00, 0x80,
+0xF7, 0x6F, 0x00, 0x80, 0xEB, 0x6F, 0x00, 0x80,
+0xDF, 0x6F, 0x00, 0x80, 0xD3, 0x6F, 0x00, 0x80,
 0x00, 0x04, 0x08, 0x00, 0x08, 0x04, 0x04, 0x00,
-0xB5, 0x86, 0x00, 0x80, 0xAF, 0x86, 0x00, 0x80,
-0xBB, 0x86, 0x00, 0x80, 0xC1, 0x86, 0x00, 0x80,
-0xC7, 0x86, 0x00, 0x80, 0xCD, 0x86, 0x00, 0x80,
-0x37, 0xEE, 0x00, 0x80, 0x8F, 0xEE, 0x00, 0x80,
-0x1F, 0xEF, 0x00, 0x80, 0x33, 0xEE, 0x00, 0x80,
-0x95, 0xEF, 0x00, 0x80, 0x0B, 0xF0, 0x00, 0x80,
+0xE9, 0x9A, 0x00, 0x80, 0xE3, 0x9A, 0x00, 0x80,
+0xEF, 0x9A, 0x00, 0x80, 0xF5, 0x9A, 0x00, 0x80,
+0xFB, 0x9A, 0x00, 0x80, 0x01, 0x9B, 0x00, 0x80,
+0xD3, 0x0C, 0x01, 0x80, 0x2B, 0x0D, 0x01, 0x80,
+0xB9, 0x0D, 0x01, 0x80, 0xCF, 0x0C, 0x01, 0x80,
+0x31, 0x0E, 0x01, 0x80, 0xA9, 0x0E, 0x01, 0x80,
 0x05, 0x05, 0x00, 0x07, 0x07, 0x06, 0x05, 0xFF,
 0x00, 0x07, 0x07, 0x06, 0x05, 0x05, 0x00, 0x00,
 0x06, 0x05, 0x00, 0x00, 0x07, 0x06, 0x06, 0xFF,
@@ -24652,130 +26262,65 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x07, 0x06, 0x06, 0x05, 0x00, 0x00, 0x07, 0x00,
 0x07, 0x06, 0x06, 0x05, 0x00, 0x00, 0x07, 0xFF,
 0x06, 0x05, 0x00, 0x00, 0x07, 0x06, 0x06, 0x00,
-0x10, 0x60, 0xA7, 0x75, 0x10, 0x60, 0xA7, 0x75,
-0x10, 0x60, 0xA7, 0x75, 0x10, 0x50, 0xA7, 0x75,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x51, 0x66, 0x76, 0x87, 0x31, 0x64, 0x76, 0x87,
-0x51, 0x64, 0x76, 0x87, 0x31, 0x64, 0x76, 0x87,
-0x10, 0x50, 0xA8, 0x75, 0x10, 0x50, 0xA7, 0x75,
-0x10, 0x50, 0xA8, 0x75, 0x10, 0x50, 0xA7, 0x75,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x31, 0x64, 0x76, 0x87, 0x31, 0x64, 0x76, 0x87,
-0x31, 0x64, 0x76, 0x87, 0x31, 0x64, 0x76, 0x87,
-0x10, 0x70, 0xBA, 0x76, 0x10, 0x70, 0xBA, 0x75,
-0x10, 0x70, 0xBA, 0x76, 0x10, 0x70, 0xBA, 0x75,
-0x28, 0xEA, 0xA0, 0x79, 0x00, 0x00, 0x00, 0x00,
-0x28, 0xEA, 0xA0, 0x79, 0x00, 0x00, 0x00, 0x00,
-0x31, 0x64, 0x76, 0x87, 0x31, 0x64, 0x76, 0x87,
-0x31, 0x64, 0x76, 0x87, 0x31, 0x64, 0x76, 0x87,
-0x10, 0x70, 0xD9, 0x75, 0x10, 0x70, 0xD9, 0x75,
-0x10, 0x70, 0xD9, 0x75, 0x10, 0x70, 0xD9, 0x75,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x10, 0x70, 0xD9, 0x75, 0x10, 0x70, 0xD9, 0x75,
-0x10, 0x70, 0xD9, 0x75, 0x10, 0x70, 0xD9, 0x75,
-0x00, 0x00, 0x00, 0x00, 0x28, 0xEA, 0xA0, 0x79,
-0x00, 0x00, 0x00, 0x00, 0x28, 0xEA, 0xA0, 0x79,
-0x41, 0x55, 0x76, 0x87, 0x41, 0x63, 0x76, 0x87,
-0x41, 0x55, 0x76, 0x87, 0x41, 0x63, 0x76, 0x87,
-0x10, 0x70, 0xC9, 0x75, 0x10, 0x70, 0xC9, 0x75,
-0x10, 0x70, 0xC9, 0x75, 0x10, 0x70, 0xC9, 0x75,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x41, 0x66, 0x74, 0x87,
-0x00, 0x00, 0x00, 0x00, 0x41, 0x66, 0x74, 0x87,
-0x10, 0x60, 0xA7, 0x75, 0x10, 0x60, 0xA7, 0x75,
-0x10, 0x60, 0xA7, 0x75, 0x10, 0x50, 0xA7, 0x75,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x51, 0x66, 0x76, 0x87, 0x31, 0x64, 0x76, 0x87,
-0x51, 0x64, 0x76, 0x87, 0x31, 0x64, 0x76, 0x87,
-0x10, 0x50, 0xA7, 0x75, 0x10, 0x50, 0xA7, 0x75,
-0x10, 0x50, 0xA7, 0x75, 0x10, 0x50, 0xA7, 0x75,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x31, 0x64, 0x76, 0x87, 0x31, 0x64, 0x76, 0x87,
-0x31, 0x64, 0x76, 0x87, 0x31, 0x64, 0x76, 0x87,
-0x10, 0x70, 0xBA, 0x75, 0x10, 0x70, 0xBA, 0x75,
-0x10, 0x70, 0xBA, 0x75, 0x10, 0x70, 0xBA, 0x75,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x31, 0x64, 0x76, 0x87, 0x31, 0x64, 0x76, 0x87,
-0x31, 0x64, 0x76, 0x87, 0x31, 0x64, 0x76, 0x87,
-0x10, 0x70, 0xD9, 0x75, 0x10, 0x70, 0xD9, 0x75,
-0x10, 0x70, 0xD9, 0x75, 0x10, 0x70, 0xD9, 0x75,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x10, 0x70, 0xD9, 0x75, 0x10, 0x70, 0xD9, 0x75,
-0x10, 0x70, 0xD9, 0x75, 0x10, 0x70, 0xD9, 0x75,
-0x00, 0x00, 0x00, 0x00, 0x28, 0xEA, 0xA0, 0x79,
-0x00, 0x00, 0x00, 0x00, 0x28, 0xEA, 0xA0, 0x79,
-0x41, 0x55, 0x76, 0x87, 0x41, 0x63, 0x76, 0x87,
-0x41, 0x55, 0x76, 0x87, 0x41, 0x63, 0x76, 0x87,
-0x10, 0x70, 0xD9, 0x75, 0x10, 0x70, 0xD9, 0x75,
-0x10, 0x70, 0xD9, 0x75, 0x10, 0x70, 0xD9, 0x75,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x41, 0x66, 0x74, 0x87,
-0x00, 0x00, 0x00, 0x00, 0x41, 0x66, 0x74, 0x87,
-0xB1, 0x98, 0x00, 0x80, 0xB9, 0x98, 0x00, 0x80,
-0xDF, 0x98, 0x00, 0x80, 0xDF, 0x98, 0x00, 0x80,
-0xDF, 0x98, 0x00, 0x80, 0xDF, 0x98, 0x00, 0x80,
-0xBF, 0x98, 0x00, 0x80, 0xC7, 0x98, 0x00, 0x80,
-0xCF, 0x98, 0x00, 0x80, 0xDF, 0x98, 0x00, 0x80,
-0xD7, 0x98, 0x00, 0x80, 0xA9, 0x98, 0x00, 0x80,
-0x8B, 0x10, 0x00, 0x80, 0x87, 0x10, 0x00, 0x80,
-0x8B, 0x10, 0x00, 0x80, 0x87, 0x10, 0x00, 0x80,
-0xAB, 0x10, 0x00, 0x80, 0x87, 0x10, 0x00, 0x80,
-0xAB, 0x10, 0x00, 0x80, 0x87, 0x10, 0x00, 0x80,
-0xCB, 0x10, 0x00, 0x80, 0x87, 0x10, 0x00, 0x80,
-0xCB, 0x10, 0x00, 0x80, 0x87, 0x10, 0x00, 0x80,
-0xEB, 0x10, 0x00, 0x80, 0x87, 0x10, 0x00, 0x80,
-0xEB, 0x10, 0x00, 0x80, 0x9D, 0x18, 0x00, 0x80,
-0xBF, 0x18, 0x00, 0x80, 0xE1, 0x18, 0x00, 0x80,
-0x03, 0x19, 0x00, 0x80, 0x27, 0x19, 0x00, 0x80,
-0x61, 0x19, 0x00, 0x80, 0x85, 0x19, 0x00, 0x80,
-0xA9, 0x19, 0x00, 0x80, 0xCD, 0x19, 0x00, 0x80,
-0xF3, 0x19, 0x00, 0x80, 0x5B, 0xA4, 0x00, 0x80,
-0x5B, 0xA4, 0x00, 0x80, 0x5B, 0xA4, 0x00, 0x80,
-0x6B, 0xA4, 0x00, 0x80, 0x5B, 0xA4, 0x00, 0x80,
-0x5B, 0xA4, 0x00, 0x80, 0x5B, 0xA4, 0x00, 0x80,
-0x57, 0xA4, 0x00, 0x80, 0x57, 0xA4, 0x00, 0x80,
-0x57, 0xA4, 0x00, 0x80, 0x57, 0xA4, 0x00, 0x80,
-0x57, 0xA4, 0x00, 0x80, 0x8D, 0xA4, 0x00, 0x80,
-0x95, 0xA4, 0x00, 0x80, 0xBF, 0xA8, 0x00, 0x80,
-0xC9, 0xA8, 0x00, 0x80, 0xD7, 0xA8, 0x00, 0x80,
-0xF5, 0xA8, 0x00, 0x80, 0x07, 0xA9, 0x00, 0x80,
-0xA7, 0xA9, 0x00, 0x80, 0xB1, 0xA9, 0x00, 0x80,
-0xBF, 0xA9, 0x00, 0x80, 0xDD, 0xA9, 0x00, 0x80,
-0xEB, 0xA9, 0x00, 0x80, 0xBF, 0xAE, 0x00, 0x80,
-0xBF, 0xAE, 0x00, 0x80, 0xBF, 0xAE, 0x00, 0x80,
-0xCD, 0xAE, 0x00, 0x80, 0xDB, 0xAE, 0x00, 0x80,
-0x11, 0xAF, 0x00, 0x80, 0x67, 0xAF, 0x00, 0x80,
-0x75, 0xAF, 0x00, 0x80, 0xB7, 0xAF, 0x00, 0x80,
-0x01, 0xB0, 0x00, 0x80, 0xB7, 0xAF, 0x00, 0x80,
-0x59, 0xB0, 0x00, 0x80, 0xF1, 0x12, 0x00, 0x80,
-0xF1, 0x12, 0x00, 0x80, 0xF1, 0x12, 0x00, 0x80,
-0xF1, 0x12, 0x00, 0x80, 0x11, 0x13, 0x00, 0x80,
-0x11, 0x13, 0x00, 0x80, 0x11, 0x13, 0x00, 0x80,
-0x11, 0x13, 0x00, 0x80, 0x31, 0x13, 0x00, 0x80,
-0x31, 0x13, 0x00, 0x80, 0x31, 0x13, 0x00, 0x80,
-0x31, 0x13, 0x00, 0x80, 0x51, 0x13, 0x00, 0x80,
-0x51, 0x13, 0x00, 0x80, 0x51, 0x13, 0x00, 0x80,
-0x51, 0x13, 0x00, 0x80, 0xFC, 0x10, 0x60, 0xB8,
-0xFA, 0xFA, 0xFA, 0xFA, 0x8C, 0x04, 0x64, 0xB8,
-0x90, 0x04, 0x64, 0xB8, 0x94, 0x04, 0x64, 0xB8,
-0x98, 0x04, 0x64, 0xB8, 0x9C, 0x04, 0x64, 0xB8,
-0xA0, 0x04, 0x64, 0xB8, 0x64, 0x01, 0x64, 0xB8,
+0x4D, 0xAD, 0x00, 0x80, 0x55, 0xAD, 0x00, 0x80,
+0x7B, 0xAD, 0x00, 0x80, 0x7B, 0xAD, 0x00, 0x80,
+0x7B, 0xAD, 0x00, 0x80, 0x7B, 0xAD, 0x00, 0x80,
+0x5B, 0xAD, 0x00, 0x80, 0x63, 0xAD, 0x00, 0x80,
+0x6B, 0xAD, 0x00, 0x80, 0x7B, 0xAD, 0x00, 0x80,
+0x73, 0xAD, 0x00, 0x80, 0x45, 0xAD, 0x00, 0x80,
+0x9F, 0x10, 0x00, 0x80, 0x9B, 0x10, 0x00, 0x80,
+0x9F, 0x10, 0x00, 0x80, 0x9B, 0x10, 0x00, 0x80,
+0xBF, 0x10, 0x00, 0x80, 0x9B, 0x10, 0x00, 0x80,
+0xBF, 0x10, 0x00, 0x80, 0x9B, 0x10, 0x00, 0x80,
+0xDF, 0x10, 0x00, 0x80, 0x9B, 0x10, 0x00, 0x80,
+0xDF, 0x10, 0x00, 0x80, 0x9B, 0x10, 0x00, 0x80,
+0xFF, 0x10, 0x00, 0x80, 0x9B, 0x10, 0x00, 0x80,
+0xFF, 0x10, 0x00, 0x80, 0xDB, 0x12, 0x00, 0x80,
+0xDF, 0x12, 0x00, 0x80, 0xE3, 0x12, 0x00, 0x80,
+0xE7, 0x12, 0x00, 0x80, 0xEB, 0x12, 0x00, 0x80,
+0x09, 0x1A, 0x00, 0x80, 0x2B, 0x1A, 0x00, 0x80,
+0x4D, 0x1A, 0x00, 0x80, 0x6F, 0x1A, 0x00, 0x80,
+0x93, 0x1A, 0x00, 0x80, 0xCD, 0x1A, 0x00, 0x80,
+0xF1, 0x1A, 0x00, 0x80, 0x15, 0x1B, 0x00, 0x80,
+0x39, 0x1B, 0x00, 0x80, 0x5F, 0x1B, 0x00, 0x80,
+0x95, 0xBA, 0x00, 0x80, 0xAB, 0xBA, 0x00, 0x80,
+0xD7, 0xBA, 0x00, 0x80, 0xF5, 0xBA, 0x00, 0x80,
+0x17, 0xBB, 0x00, 0x80, 0x7B, 0xBE, 0x00, 0x80,
+0x7B, 0xBE, 0x00, 0x80, 0x7B, 0xBE, 0x00, 0x80,
+0x8B, 0xBE, 0x00, 0x80, 0x7B, 0xBE, 0x00, 0x80,
+0x7B, 0xBE, 0x00, 0x80, 0x7B, 0xBE, 0x00, 0x80,
+0x77, 0xBE, 0x00, 0x80, 0x77, 0xBE, 0x00, 0x80,
+0x77, 0xBE, 0x00, 0x80, 0x77, 0xBE, 0x00, 0x80,
+0x77, 0xBE, 0x00, 0x80, 0xAD, 0xBE, 0x00, 0x80,
+0xB5, 0xBE, 0x00, 0x80, 0xBF, 0xC9, 0x00, 0x80,
+0xBF, 0xC9, 0x00, 0x80, 0xBF, 0xC9, 0x00, 0x80,
+0xCD, 0xC9, 0x00, 0x80, 0xDB, 0xC9, 0x00, 0x80,
+0x11, 0xCA, 0x00, 0x80, 0x67, 0xCA, 0x00, 0x80,
+0x75, 0xCA, 0x00, 0x80, 0xB7, 0xCA, 0x00, 0x80,
+0x01, 0xCB, 0x00, 0x80, 0xB7, 0xCA, 0x00, 0x80,
+0x59, 0xCB, 0x00, 0x80, 0xBF, 0xCE, 0x00, 0x80,
+0xD3, 0xCE, 0x00, 0x80, 0xE5, 0xCE, 0x00, 0x80,
+0xF7, 0xCE, 0x00, 0x80, 0x0F, 0xCF, 0x00, 0x80,
+0x45, 0xCF, 0x00, 0x80, 0x53, 0xCF, 0x00, 0x80,
+0x65, 0xCF, 0x00, 0x80, 0x77, 0xCF, 0x00, 0x80,
+0x8B, 0xCF, 0x00, 0x80, 0x19, 0x14, 0x00, 0x80,
+0x19, 0x14, 0x00, 0x80, 0x19, 0x14, 0x00, 0x80,
+0x19, 0x14, 0x00, 0x80, 0x39, 0x14, 0x00, 0x80,
+0x39, 0x14, 0x00, 0x80, 0x39, 0x14, 0x00, 0x80,
+0x39, 0x14, 0x00, 0x80, 0x59, 0x14, 0x00, 0x80,
+0x59, 0x14, 0x00, 0x80, 0x59, 0x14, 0x00, 0x80,
+0x59, 0x14, 0x00, 0x80, 0x79, 0x14, 0x00, 0x80,
+0x79, 0x14, 0x00, 0x80, 0x79, 0x14, 0x00, 0x80,
+0x79, 0x14, 0x00, 0x80, 0xBB, 0xD3, 0x00, 0x80,
+0xCB, 0xD3, 0x00, 0x80, 0xD5, 0xD3, 0x00, 0x80,
+0xDF, 0xD3, 0x00, 0x80, 0xF1, 0xD3, 0x00, 0x80,
+0xFC, 0x10, 0x60, 0xB8, 0xFA, 0xFA, 0xFA, 0xFA,
+0x8C, 0x04, 0x64, 0xB8, 0x90, 0x04, 0x64, 0xB8,
+0x94, 0x04, 0x64, 0xB8, 0x98, 0x04, 0x64, 0xB8,
+0x9C, 0x04, 0x64, 0xB8, 0xA0, 0x04, 0x64, 0xB8,
+0x64, 0x01, 0x64, 0xB8, 0xBC, 0x01, 0x64, 0xB8,
 0x00, 0x09, 0x3D, 0x00, 0x00, 0x00, 0x00, 0x80,
 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF,
-0x00, 0x00, 0x60, 0xB8, 0x00, 0x00, 0x64, 0xB8,
 0x54, 0x05, 0x64, 0xB8, 0x50, 0x05, 0x64, 0xB8,
 0x51, 0x05, 0x64, 0xB8, 0x78, 0x05, 0x64, 0xB8,
 0x79, 0x05, 0x64, 0xB8, 0x7A, 0x05, 0x64, 0xB8,
@@ -24785,17 +26330,16 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x00, 0x00, 0x00, 0x40, 0xBF, 0x01, 0x64, 0xB8,
 0x89, 0x00, 0x60, 0xB8, 0x8A, 0x00, 0x60, 0xB8,
 0x1A, 0x04, 0x64, 0xB8, 0x1B, 0x04, 0x64, 0xB8,
+0x8C, 0x00, 0x60, 0xB8, 0x8D, 0x00, 0x60, 0xB8,
 0x87, 0x02, 0x64, 0xB8, 0x86, 0x02, 0x64, 0xB8,
-0x1C, 0x04, 0x64, 0xB8, 0x58, 0x05, 0x64, 0xB8,
-0x64, 0x00, 0x60, 0xB8, 0x40, 0x00, 0x60, 0xB8,
-0x4C, 0x00, 0x60, 0xB8, 0x44, 0x00, 0x60, 0xB8,
-0x60, 0x00, 0x60, 0xB8, 0x00, 0x00, 0xC0, 0x00,
-0x00, 0x00, 0x10, 0x00, 0x00, 0x10, 0x24, 0x00,
-0x82, 0x82, 0x62, 0x00, 0x00, 0x00, 0x02, 0x00,
-0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x08, 0x00,
-0x00, 0x00, 0x1E, 0x00, 0x0A, 0x06, 0x64, 0xB8,
-0x57, 0x01, 0x64, 0xB8, 0x3C, 0x01, 0x64, 0xB8,
-0x5B, 0x01, 0x64, 0xB8, 0xA8, 0x06, 0x64, 0xB8,
+0x1C, 0x04, 0x64, 0xB8, 0x01, 0x00, 0xFF, 0x00,
+0x58, 0x05, 0x64, 0xB8, 0x22, 0x05, 0x64, 0xB8,
+0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00,
+0x00, 0x00, 0x08, 0x00, 0x5B, 0x01, 0x64, 0xB8,
+0x3C, 0x01, 0x64, 0xB8, 0x00, 0x00, 0x1E, 0x00,
+0x0A, 0x06, 0x64, 0xB8, 0xB1, 0x05, 0x64, 0xB8,
+0x57, 0x01, 0x64, 0xB8, 0xFE, 0x11, 0x64, 0xB8,
+0xE2, 0x10, 0x60, 0xB8, 0xA8, 0x06, 0x64, 0xB8,
 0x10, 0x07, 0x64, 0xB8, 0x00, 0x16, 0x64, 0xB8,
 0x04, 0x16, 0x64, 0xB8, 0x08, 0x16, 0x64, 0xB8,
 0xAB, 0x06, 0x64, 0xB8, 0xAA, 0x06, 0x64, 0xB8,
@@ -24803,6 +26347,7 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x03, 0x16, 0x64, 0xB8, 0x02, 0x16, 0x64, 0xB8,
 0x07, 0x16, 0x64, 0xB8, 0x06, 0x16, 0x64, 0xB8,
 0x0B, 0x16, 0x64, 0xB8, 0x0A, 0x16, 0x64, 0xB8,
+0xFC, 0x11, 0x64, 0xB8, 0xE0, 0x10, 0x60, 0xB8,
 0x04, 0x06, 0x64, 0xB8, 0xFF, 0xFF, 0xFF, 0xFE,
 0x00, 0x00, 0x00, 0x01, 0x60, 0x16, 0x64, 0xB8,
 0x0D, 0x00, 0x78, 0xB8, 0x12, 0x00, 0x78, 0xB8,
@@ -24812,134 +26357,169 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x14, 0x00, 0x78, 0xB8, 0x09, 0x00, 0x78, 0xB8,
 0x31, 0x00, 0x78, 0xB8, 0x1D, 0x04, 0x64, 0xB8,
 0x7A, 0x04, 0x64, 0xB8, 0x24, 0x04, 0x64, 0xB8,
-0x22, 0x05, 0x64, 0xB8, 0x74, 0x06, 0x64, 0xB8,
-0x00, 0x00, 0x01, 0x80, 0x70, 0x06, 0x64, 0xB8,
-0x72, 0x06, 0x64, 0xB8, 0x85, 0x01, 0x64, 0xB8,
-0xA9, 0x00, 0x78, 0xB8, 0x61, 0x00, 0x78, 0xB8,
-0x00, 0x00, 0x78, 0xB8, 0x01, 0x00, 0x78, 0xB8,
-0xB9, 0x00, 0x78, 0xB8, 0xC1, 0x01, 0x64, 0xB8,
-0xB9, 0x01, 0x64, 0xB8, 0xC7, 0x01, 0x64, 0xB8,
-0x90, 0x06, 0x64, 0xB8, 0x46, 0x00, 0x78, 0xB8,
-0x50, 0x00, 0x78, 0xB8, 0x40, 0x00, 0x78, 0xB8,
-0x4A, 0x00, 0x78, 0xB8, 0x30, 0x00, 0x78, 0xB8,
-0x34, 0x00, 0x78, 0xB8, 0x24, 0x01, 0x64, 0xB8,
-0x18, 0x06, 0x60, 0xB8, 0x18, 0x06, 0x64, 0xB8,
-0x10, 0x06, 0x60, 0xB8, 0x10, 0x06, 0x64, 0xB8,
-0xE0, 0x04, 0x64, 0xB8, 0x28, 0x00, 0x78, 0xB8,
-0x04, 0x00, 0x78, 0xB8, 0x38, 0x00, 0x78, 0xB8,
-0x7A, 0x00, 0x78, 0xB8, 0x60, 0x00, 0x78, 0xB8,
-0xC3, 0x01, 0x64, 0xB8, 0x54, 0x00, 0x78, 0xB8,
-0xC0, 0x01, 0x64, 0xB8, 0x1C, 0x01, 0x64, 0xB8,
-0xFF, 0xFF, 0x03, 0x00, 0x09, 0x06, 0x64, 0xB8,
-0x18, 0x11, 0x64, 0xB8, 0x00, 0x00, 0x70, 0x18,
-0x70, 0x00, 0x78, 0xB8, 0xC4, 0x01, 0x64, 0xB8,
-0xA5, 0xA5, 0xA5, 0xA5, 0x02, 0x00, 0x78, 0xB8,
-0x08, 0x00, 0x78, 0xB8, 0xC2, 0x01, 0x64, 0xB8,
-0x05, 0x00, 0x78, 0xB8, 0x0C, 0x00, 0x78, 0xB8,
-0x0E, 0x00, 0x78, 0xB8, 0x0F, 0x00, 0x78, 0xB8,
-0x88, 0x00, 0x60, 0xB8, 0x8B, 0x00, 0x60, 0xB8,
-0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x42,
-0xE0, 0x00, 0x60, 0xB8, 0xFF, 0xFF, 0xFF, 0xFD,
-0xE3, 0x00, 0x60, 0xB8, 0xE1, 0x00, 0x60, 0xB8,
-0x00, 0x00, 0x00, 0x60, 0xE8, 0x12, 0x64, 0xB8,
-0xF8, 0x10, 0x60, 0xB8, 0x00, 0x00, 0x00, 0x04,
-0xFF, 0xFF, 0xFF, 0xFB, 0xFF, 0xFF, 0xFF, 0xDF,
-0xFF, 0xFF, 0xFF, 0x1F, 0x04, 0x00, 0x60, 0xB8,
-0x04, 0x00, 0x64, 0xB8, 0x08, 0x00, 0x60, 0xB8,
-0x08, 0x00, 0x64, 0xB8, 0x24, 0x00, 0x60, 0xB8,
-0x80, 0x00, 0x60, 0xB8, 0xCC, 0x07, 0x64, 0xB8,
+0x74, 0x06, 0x64, 0xB8, 0x00, 0x00, 0x01, 0x80,
+0x70, 0x06, 0x64, 0xB8, 0x72, 0x06, 0x64, 0xB8,
+0x85, 0x01, 0x64, 0xB8, 0xA9, 0x00, 0x78, 0xB8,
+0x61, 0x00, 0x78, 0xB8, 0x00, 0x00, 0x78, 0xB8,
+0x01, 0x00, 0x78, 0xB8, 0xB9, 0x00, 0x78, 0xB8,
+0xC1, 0x01, 0x64, 0xB8, 0xB9, 0x01, 0x64, 0xB8,
+0xC7, 0x01, 0x64, 0xB8, 0x90, 0x06, 0x64, 0xB8,
+0x46, 0x00, 0x78, 0xB8, 0x50, 0x00, 0x78, 0xB8,
+0x40, 0x00, 0x78, 0xB8, 0x4A, 0x00, 0x78, 0xB8,
+0x30, 0x00, 0x78, 0xB8, 0x34, 0x00, 0x78, 0xB8,
+0x24, 0x01, 0x64, 0xB8, 0x18, 0x06, 0x60, 0xB8,
+0x18, 0x06, 0x64, 0xB8, 0x10, 0x06, 0x60, 0xB8,
+0x10, 0x06, 0x64, 0xB8, 0x08, 0x07, 0x60, 0xB8,
+0x08, 0x07, 0x64, 0xB8, 0x00, 0x07, 0x60, 0xB8,
+0x00, 0x07, 0x64, 0xB8, 0x28, 0x16, 0x60, 0xB8,
+0x28, 0x16, 0x64, 0xB8, 0x20, 0x16, 0x60, 0xB8,
+0x20, 0x16, 0x64, 0xB8, 0x38, 0x16, 0x60, 0xB8,
+0x38, 0x16, 0x64, 0xB8, 0x30, 0x16, 0x60, 0xB8,
+0x30, 0x16, 0x64, 0xB8, 0x48, 0x16, 0x60, 0xB8,
+0x48, 0x16, 0x64, 0xB8, 0x40, 0x16, 0x60, 0xB8,
+0x40, 0x16, 0x64, 0xB8, 0x62, 0x00, 0x60, 0xB8,
+0x63, 0x00, 0x60, 0xB8, 0x48, 0x00, 0x60, 0xB8,
+0x46, 0x00, 0x60, 0xB8, 0x47, 0x00, 0x60, 0xB8,
+0xFF, 0xFF, 0xFE, 0xFF, 0x60, 0x00, 0x60, 0xB8,
+0x44, 0x00, 0x60, 0xB8, 0x4D, 0x01, 0x64, 0xB8,
+0x00, 0x01, 0x64, 0xB8, 0x28, 0x00, 0x78, 0xB8,
+0x05, 0x00, 0x60, 0xB8, 0x04, 0x00, 0x78, 0xB8,
+0x38, 0x00, 0x78, 0xB8, 0x7A, 0x00, 0x78, 0xB8,
+0x60, 0x00, 0x78, 0xB8, 0xC3, 0x01, 0x64, 0xB8,
+0x54, 0x00, 0x78, 0xB8, 0xC0, 0x01, 0x64, 0xB8,
+0x1C, 0x01, 0x64, 0xB8, 0xFF, 0xFF, 0x03, 0x00,
+0x09, 0x06, 0x64, 0xB8, 0x18, 0x11, 0x64, 0xB8,
+0x00, 0x00, 0x70, 0x18, 0x70, 0x00, 0x78, 0xB8,
+0xC4, 0x01, 0x64, 0xB8, 0xA5, 0xA5, 0xA5, 0xA5,
+0x02, 0x00, 0x78, 0xB8, 0x08, 0x00, 0x78, 0xB8,
+0xC2, 0x01, 0x64, 0xB8, 0x05, 0x00, 0x78, 0xB8,
+0x0C, 0x00, 0x78, 0xB8, 0x0E, 0x00, 0x78, 0xB8,
+0x0F, 0x00, 0x78, 0xB8, 0x88, 0x00, 0x60, 0xB8,
+0x8B, 0x00, 0x60, 0xB8, 0x00, 0x00, 0x60, 0xB8,
+0x00, 0x00, 0x64, 0xB8, 0x00, 0x00, 0x00, 0x03,
+0x00, 0x00, 0x00, 0x42, 0xE0, 0x00, 0x60, 0xB8,
+0xFF, 0xFF, 0xFF, 0xFD, 0xE3, 0x00, 0x60, 0xB8,
+0xE1, 0x00, 0x60, 0xB8, 0x00, 0x00, 0x00, 0x60,
+0xCC, 0x00, 0x60, 0xB8, 0x02, 0x00, 0x60, 0xB8,
+0xE8, 0x12, 0x64, 0xB8, 0xF8, 0x10, 0x60, 0xB8,
+0x00, 0x00, 0x00, 0x04, 0xFF, 0xFF, 0xFF, 0xFB,
+0xFF, 0xFF, 0xFF, 0xDF, 0xFF, 0xFF, 0xFF, 0x1F,
+0x04, 0x00, 0x60, 0xB8, 0x04, 0x00, 0x64, 0xB8,
+0x08, 0x00, 0x60, 0xB8, 0x08, 0x00, 0x64, 0xB8,
+0x24, 0x00, 0x60, 0xB8, 0x80, 0x00, 0x60, 0xB8,
+0xCC, 0x07, 0x64, 0xB8, 0xFF, 0xFF, 0xFD, 0xFF,
 0x00, 0x00, 0x70, 0xB8, 0x00, 0x0C, 0x01, 0x00,
-0x01, 0x00, 0x66, 0xB8, 0xF0, 0xFF, 0xFF, 0x0F,
-0x78, 0x76, 0x77, 0x00, 0x33, 0x66, 0x77, 0x00,
+0x01, 0x00, 0x66, 0xB8, 0xFF, 0xFF, 0x0F, 0x00,
 0xFF, 0xFF, 0xFF, 0x00, 0x74, 0x57, 0x74, 0x00,
 0x47, 0x75, 0x47, 0x00, 0x70, 0x45, 0x70, 0x00,
 0x17, 0x45, 0x17, 0x00, 0x00, 0x00, 0xF0, 0xFF,
-0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x7F, 0x00,
-0xFF, 0x0F, 0xFF, 0xF0, 0x00, 0x40, 0x00, 0x06,
-0xFF, 0xFF, 0xF0, 0xF0, 0x00, 0x00, 0x09, 0x06,
-0xFF, 0x0F, 0x00, 0xF0, 0x00, 0x70, 0xDB, 0x03,
-0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0x0F, 0x00,
-0xFF, 0xFF, 0xFF, 0x0F, 0xFF, 0xFC, 0xFE, 0xFF,
-0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x0C, 0x00,
+0x70, 0x57, 0x70, 0x00, 0x17, 0x75, 0x17, 0x00,
+0x00, 0x00, 0x00, 0x06, 0xFF, 0xFF, 0xFF, 0x0F,
+0xFF, 0xFC, 0xFE, 0xFF, 0x92, 0x84, 0x10, 0x08,
+0x12, 0x56, 0x09, 0x29, 0x00, 0x01, 0x01, 0x00,
+0x00, 0x00, 0x10, 0x08, 0x12, 0x56, 0x09, 0x21,
+0x00, 0x00, 0x40, 0x00, 0x28, 0xEA, 0xA0, 0x79,
+0xB9, 0xB2, 0x94, 0x91, 0x00, 0x00, 0x0C, 0x00,
 0x00, 0x00, 0x00, 0xF0, 0x00, 0x00, 0x00, 0x0F,
-0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x80, 0x00,
-0x0E, 0x08, 0x04, 0x00, 0x0C, 0x08, 0x04, 0x00,
-0x00, 0x00, 0x30, 0x00, 0x00, 0xFF, 0xF9, 0xFF,
-0x00, 0x00, 0xFE, 0x1F, 0xFF, 0xFF, 0xF7, 0xFF,
+0x00, 0x00, 0x80, 0x00, 0x0E, 0x08, 0x04, 0x00,
+0x0C, 0x08, 0x04, 0x00, 0x00, 0x00, 0x30, 0x00,
+0x00, 0x00, 0xC0, 0x00, 0x00, 0xFF, 0xF9, 0xFF,
+0x00, 0x00, 0xFE, 0x1F, 0x77, 0x65, 0x4F, 0x38,
 0x00, 0x80, 0x03, 0x00, 0x18, 0x00, 0x70, 0xB8,
-0x0B, 0x00, 0x70, 0xB8, 0x00, 0xFF, 0xFF, 0x00,
-0x00, 0x00, 0x0F, 0x00, 0x02, 0x00, 0x70, 0xB8,
-0x96, 0x02, 0x64, 0xB8, 0x94, 0x02, 0x64, 0xB8,
-0x97, 0x02, 0x64, 0xB8, 0xCC, 0x01, 0x64, 0xB8,
-0x54, 0x02, 0x64, 0xB8, 0x50, 0x02, 0x64, 0xB8,
-0x4C, 0x02, 0x64, 0xB8, 0x48, 0x02, 0x64, 0xB8,
-0x44, 0x02, 0x64, 0xB8, 0x64, 0x05, 0x64, 0xB8,
-0xD4, 0x04, 0x60, 0xB8, 0xD4, 0x04, 0x64, 0xB8,
-0x84, 0x04, 0x60, 0xB8, 0x84, 0x04, 0x64, 0xB8,
-0xC8, 0x04, 0x60, 0xB8, 0xC8, 0x04, 0x64, 0xB8,
-0x78, 0x04, 0x60, 0xB8, 0x78, 0x04, 0x64, 0xB8,
-0x30, 0x01, 0x64, 0xB8, 0x1F, 0x00, 0x60, 0xB8,
+0x18, 0x00, 0x78, 0xB8, 0x0B, 0x00, 0x78, 0xB8,
+0x0B, 0x00, 0x70, 0xB8, 0x02, 0x00, 0x70, 0xB8,
+0x96, 0x02, 0x64, 0xB8, 0x01, 0xA0, 0x02, 0x00,
+0x94, 0x02, 0x64, 0xB8, 0x97, 0x02, 0x64, 0xB8,
+0xCC, 0x01, 0x64, 0xB8, 0x54, 0x02, 0x64, 0xB8,
+0x50, 0x02, 0x64, 0xB8, 0x4C, 0x02, 0x64, 0xB8,
+0x48, 0x02, 0x64, 0xB8, 0x44, 0x02, 0x64, 0xB8,
+0x64, 0x05, 0x64, 0xB8, 0xD4, 0x04, 0x60, 0xB8,
+0xD4, 0x04, 0x64, 0xB8, 0x84, 0x04, 0x60, 0xB8,
+0x84, 0x04, 0x64, 0xB8, 0xC8, 0x04, 0x60, 0xB8,
+0xC8, 0x04, 0x64, 0xB8, 0x78, 0x04, 0x60, 0xB8,
+0x78, 0x04, 0x64, 0xB8, 0x8E, 0x00, 0x60, 0xB8,
+0x8F, 0x00, 0x60, 0xB8, 0x1F, 0x00, 0x60, 0xB8,
 0x01, 0xEA, 0xEF, 0xFD, 0x02, 0xEA, 0xEF, 0xFD,
 0xC8, 0x01, 0x64, 0xB8, 0xC9, 0x01, 0x64, 0xB8,
-0xA0, 0x01, 0x64, 0xB8, 0xFF, 0xFF, 0xBF, 0xFF,
+0xA0, 0x01, 0x64, 0xB8, 0x4C, 0x00, 0x60, 0xB8,
+0xFF, 0xFF, 0xBF, 0xFF, 0xC6, 0x01, 0x64, 0xB8,
 0x00, 0x00, 0x00, 0x05, 0x53, 0x05, 0x64, 0xB8,
 0x77, 0x05, 0x64, 0xB8, 0x68, 0x05, 0x64, 0xB8,
-0x34, 0x01, 0x64, 0xB8, 0x20, 0x01, 0x64, 0xB8,
+0x94, 0x01, 0x64, 0xB8, 0x34, 0x01, 0x64, 0xB8,
+0x30, 0x01, 0x64, 0xB8, 0x20, 0x01, 0x64, 0xB8,
 0x24, 0x11, 0x64, 0xB8, 0x20, 0x11, 0x64, 0xB8,
 0x2C, 0x11, 0x64, 0xB8, 0x28, 0x11, 0x64, 0xB8,
 0x34, 0x11, 0x64, 0xB8, 0x30, 0x11, 0x64, 0xB8,
 0x38, 0x01, 0x64, 0xB8, 0x3C, 0x11, 0x64, 0xB8,
 0x38, 0x11, 0x64, 0xB8, 0xE4, 0x11, 0x64, 0xB8,
 0xE0, 0x11, 0x64, 0xB8, 0x50, 0x00, 0x60, 0xB8,
-0x54, 0x00, 0x60, 0xB8, 0x00, 0x40, 0x20, 0x00,
-0xFF, 0x0F, 0xFF, 0x0F, 0x01, 0x60, 0x00, 0x03,
+0x54, 0x00, 0x60, 0xB8, 0x00, 0x40, 0xE0, 0x03,
+0x80, 0x00, 0x00, 0x01, 0x01, 0x60, 0x00, 0x03,
+0xE0, 0x04, 0x64, 0xB8, 0xE3, 0x04, 0x64, 0xB8,
 0x9A, 0x01, 0x64, 0xB8, 0x99, 0x01, 0x64, 0xB8,
-0xC6, 0x01, 0x64, 0xB8, 0x00, 0x00, 0x66, 0xB8,
-0x00, 0x10, 0x66, 0xB8, 0x00, 0x1C, 0x66, 0xB8,
-0xE0, 0x12, 0x64, 0xB8, 0xE3, 0x04, 0x64, 0xB8,
+0x00, 0x00, 0x66, 0xB8, 0x00, 0x10, 0x66, 0xB8,
+0x00, 0x1C, 0x66, 0xB8, 0xE0, 0x12, 0x64, 0xB8,
 0x2F, 0x01, 0x64, 0xB8, 0x00, 0x28, 0x64, 0xB8,
 0x00, 0x2C, 0x64, 0xB8, 0x00, 0x38, 0x64, 0xB8,
 0x00, 0x3C, 0x64, 0xB8, 0x54, 0x04, 0x64, 0xB8,
 0x77, 0x77, 0x77, 0x77, 0x00, 0x00, 0xF0, 0x3F,
-0x70, 0x77, 0x33, 0x54, 0x17, 0x77, 0x33, 0x77,
-0x77, 0x77, 0x33, 0x77, 0x17, 0x77, 0x33, 0x54,
-0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x33, 0x00,
-0x00, 0x03, 0x07, 0x00, 0xFF, 0x03, 0x07, 0x00,
-0x83, 0x00, 0x60, 0xB8, 0x90, 0x00, 0x60, 0xB8,
-0x92, 0x06, 0x64, 0xB8, 0x08, 0x01, 0x64, 0xB8,
-0x92, 0x00, 0x60, 0xB8, 0xF8, 0x05, 0x64, 0xB8,
-0xF9, 0x05, 0x64, 0xB8, 0xFA, 0x05, 0x64, 0xB8,
-0xFB, 0x05, 0x64, 0xB8, 0xFF, 0xFF, 0xFF, 0x7F,
-0x20, 0x00, 0x78, 0xB8, 0x10, 0x00, 0x78, 0xB8,
-0x03, 0x00, 0x78, 0xB8, 0xFF, 0xFF, 0x01, 0xFF,
-0x1F, 0x07, 0x64, 0xB8, 0x1C, 0x07, 0x64, 0xB8,
-0x5F, 0x11, 0x64, 0xB8, 0x30, 0x00, 0x78, 0x18,
-0x4C, 0x00, 0x00, 0xB5, 0x00, 0x00, 0x00, 0x02,
-0x00, 0x00, 0x20, 0x00, 0xF4, 0x00, 0x60, 0xB8,
-0x14, 0x11, 0x64, 0xB8, 0x16, 0x11, 0x64, 0xB8,
-0x17, 0x11, 0x64, 0xB8, 0x01, 0x06, 0x64, 0xB8,
-0xD4, 0x07, 0x64, 0xB8, 0x08, 0x06, 0x64, 0xB8,
-0x0F, 0x06, 0x64, 0xB8, 0x7B, 0x05, 0x64, 0xB8,
-0x73, 0x05, 0x64, 0xB8, 0x01, 0x01, 0x64, 0xB8,
-0x00, 0x01, 0x64, 0xB8, 0xB7, 0x06, 0x64, 0xB8,
-0xB4, 0x06, 0x64, 0xB8, 0x02, 0x00, 0x60, 0xB8,
-0x00, 0x00, 0x03, 0x00, 0x80, 0x01, 0x64, 0xB8,
+0x70, 0x77, 0x33, 0x54, 0x00, 0x00, 0x10, 0x00,
+0x17, 0x77, 0x33, 0x77, 0x77, 0x77, 0x33, 0x77,
+0x17, 0x77, 0x33, 0x54, 0x00, 0x00, 0xFF, 0x00,
+0x00, 0x00, 0x33, 0x00, 0x00, 0x03, 0x07, 0x00,
+0xFF, 0x03, 0x07, 0x00, 0x83, 0x00, 0x60, 0xB8,
+0x90, 0x00, 0x60, 0xB8, 0x92, 0x06, 0x64, 0xB8,
+0x08, 0x01, 0x64, 0xB8, 0x92, 0x00, 0x60, 0xB8,
+0xF8, 0x05, 0x64, 0xB8, 0xF9, 0x05, 0x64, 0xB8,
+0xFA, 0x05, 0x64, 0xB8, 0xFB, 0x05, 0x64, 0xB8,
+0xFF, 0xFF, 0xFF, 0x7F, 0x1F, 0x07, 0x64, 0xB8,
+0x1C, 0x07, 0x64, 0xB8, 0xB8, 0x05, 0x64, 0xB8,
+0xBC, 0x05, 0x64, 0xB8, 0x5F, 0x11, 0x64, 0xB8,
+0x30, 0x00, 0x78, 0x18, 0x40, 0x00, 0x00, 0xB5,
+0x44, 0x00, 0x00, 0xB5, 0x48, 0x00, 0x00, 0xB5,
+0x4C, 0x00, 0x00, 0xB5, 0xA8, 0x04, 0x64, 0xB8,
+0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x20, 0x00,
+0xF4, 0x00, 0x60, 0xB8, 0x14, 0x11, 0x64, 0xB8,
+0x16, 0x11, 0x64, 0xB8, 0x17, 0x11, 0x64, 0xB8,
+0x01, 0x06, 0x64, 0xB8, 0xD4, 0x07, 0x64, 0xB8,
+0x08, 0x06, 0x64, 0xB8, 0x0F, 0x06, 0x64, 0xB8,
+0x98, 0x01, 0x64, 0xB8, 0xFF, 0xFF, 0xC0, 0xFF,
+0x40, 0x01, 0x00, 0x80, 0xFF, 0x17, 0xC0, 0xFF,
+0x00, 0x98, 0x00, 0x80, 0x7B, 0x05, 0x64, 0xB8,
+0x73, 0x05, 0x64, 0xB8, 0x7C, 0x00, 0x60, 0xB8,
+0x10, 0x00, 0x60, 0xB8, 0xFF, 0xFF, 0xDF, 0xFF,
+0x14, 0x00, 0x60, 0xB8, 0xFF, 0xFF, 0xFF, 0xBF,
+0x01, 0x01, 0x64, 0xB8, 0xB7, 0x06, 0x64, 0xB8,
+0xB4, 0x06, 0x64, 0xB8, 0x00, 0x00, 0x03, 0x00,
+0x03, 0x00, 0x78, 0xB8, 0x80, 0x01, 0x64, 0xB8,
 0x84, 0x01, 0x64, 0xB8, 0xBA, 0x01, 0x64, 0xB8,
+0x64, 0x00, 0x60, 0xB8, 0xFF, 0xFF, 0xEF, 0xFF,
+0x40, 0x00, 0x60, 0xB8, 0xFF, 0xFF, 0x7F, 0xFF,
+0x44, 0x09, 0x64, 0xB8, 0x30, 0x09, 0x64, 0xB8,
+0x38, 0x00, 0x60, 0xB8, 0xEF, 0x00, 0x60, 0xB8,
+0xFF, 0xFF, 0xFF, 0xCF, 0xFF, 0xFF, 0xFF, 0xF9,
+0x03, 0x00, 0x60, 0xB8, 0x70, 0x00, 0x60, 0xB8,
+0x80, 0x10, 0x60, 0xB8, 0xEC, 0x00, 0x60, 0xB8,
+0x00, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xF8,
+0xFF, 0xFF, 0x7F, 0xFE, 0xAA, 0x00, 0x60, 0xB8,
+0xA8, 0x00, 0x60, 0xB8, 0x00, 0x00, 0x02, 0x80,
 0x31, 0x00, 0x60, 0xB8, 0x32, 0x00, 0x60, 0xB8,
 0x33, 0x00, 0x60, 0xB8, 0x30, 0x00, 0x60, 0xB8,
-0x68, 0x06, 0x64, 0xB8, 0xFF, 0xFF, 0xCF, 0xFF,
-0x5C, 0x05, 0x64, 0xB8, 0x38, 0x06, 0x64, 0xB8,
-0x83, 0x04, 0x64, 0xB8, 0xA0, 0x06, 0x64, 0xB8,
-0x84, 0x02, 0x64, 0xB8, 0x4D, 0x01, 0x64, 0xB8,
-0x00, 0x00, 0x78, 0x18, 0x00, 0x00, 0x04, 0x04,
-0x08, 0x08, 0x08, 0x08, 0x0C, 0x0C, 0x0C, 0x0C,
-0x0C, 0x0C, 0x0C, 0x0C, 0x10, 0x10, 0x10, 0x10,
+0x01, 0xAA, 0xAA, 0xFA, 0x68, 0x06, 0x64, 0xB8,
+0xFF, 0xFF, 0xCF, 0xFF, 0x5C, 0x05, 0x64, 0xB8,
+0x38, 0x06, 0x64, 0xB8, 0x83, 0x04, 0x64, 0xB8,
+0xA0, 0x06, 0x64, 0xB8, 0x84, 0x02, 0x64, 0xB8,
+0x00, 0x00, 0x78, 0x18, 0x20, 0x00, 0x78, 0xB8,
+0x10, 0x00, 0x78, 0xB8, 0xFF, 0xFF, 0x01, 0xFF,
+0x00, 0x00, 0x04, 0x04, 0x08, 0x08, 0x08, 0x08,
+0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C,
+0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
-0x10, 0x10, 0x10, 0x10, 0x14, 0x14, 0x14, 0x14,
 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14,
 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14,
 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14,
-0x14, 0x14, 0x14, 0x14, 0x18, 0x18, 0x18, 0x18,
+0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14,
+0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
@@ -24947,7 +26527,6 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
-0x18, 0x18, 0x18, 0x18, 0x1C, 0x1C, 0x1C, 0x1C,
 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C,
 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C,
 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C,
@@ -24963,9 +26542,9 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C,
 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C,
 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C,
-0x1C, 0x1C, 0x1C, 0x1C, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x50, 0xF2, 0x01, 0x00, 0x00, 0x00, 0x00,
-0xC4, 0x65, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0xF2, 0x01,
+0xDC, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x18, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -24984,7 +26563,7 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x7B, 0xB9, 0x00, 0x65, 0x00, 0x65, 0x00, 0x65,
 0x5A, 0xB9, 0x00, 0x65, 0x00, 0x65, 0x00, 0x65,
-0x10, 0xF0, 0x20, 0x6A, 0x40, 0xF3, 0x1D, 0x4A,
+0x10, 0xF0, 0x20, 0x6A, 0x20, 0xF3, 0x09, 0x4A,
 0x00, 0xEA, 0x00, 0x65, 0x00, 0x65, 0x00, 0x65,
 0x00, 0x65, 0x00, 0x65, 0x00, 0x65, 0x00, 0x65,
 0x00, 0x65, 0x00, 0x65, 0x00, 0x65, 0x00, 0x65,
@@ -25040,68 +26619,67 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x00, 0x6E, 0x30, 0xF0, 0x20, 0x6F, 0x00, 0xF0,
 0x00, 0x4F, 0xC0, 0xDC, 0x04, 0x4C, 0xE3, 0xEC,
 0xB8, 0x67, 0xFB, 0x2D, 0x30, 0xF0, 0x20, 0x6C,
-0x41, 0xF4, 0x10, 0x4C, 0x00, 0x6E, 0x30, 0xF0,
-0x20, 0x6F, 0xA8, 0xF7, 0x00, 0x4F, 0xC0, 0xDC,
+0xA1, 0xF3, 0x18, 0x4C, 0x00, 0x6E, 0x30, 0xF0,
+0x20, 0x6F, 0x68, 0xF6, 0x10, 0x4F, 0xC0, 0xDC,
 0x04, 0x4C, 0xE3, 0xEC, 0xB8, 0x67, 0xFB, 0x2D,
 0x10, 0xF0, 0x20, 0x6C, 0x60, 0xF2, 0x15, 0x4C,
 0x00, 0xEC, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x30, 0xF0, 0x20, 0x6B, 0x20, 0xF6, 0x6C, 0x9B,
+0x30, 0xF0, 0x20, 0x6B, 0x80, 0xF4, 0x68, 0x9B,
 0x10, 0xF0, 0x20, 0x6A, 0x60, 0xF2, 0x15, 0x4A,
-0x40, 0xDB, 0x00, 0x18, 0x0D, 0x05, 0x00, 0x18,
-0x24, 0x05, 0x00, 0x18, 0x79, 0x07, 0x00, 0x18,
-0x3B, 0x05, 0x00, 0x18, 0x24, 0x07, 0x00, 0x18,
-0xEE, 0x0C, 0x30, 0xF0, 0x20, 0x6C, 0x30, 0xF0,
+0x40, 0xDB, 0x00, 0x18, 0x5E, 0x05, 0x00, 0x18,
+0x75, 0x05, 0x00, 0x18, 0xD4, 0x07, 0x00, 0x18,
+0x8C, 0x05, 0x00, 0x18, 0x7F, 0x07, 0x00, 0x18,
+0xB5, 0x0E, 0x30, 0xF0, 0x20, 0x6C, 0x30, 0xF0,
 0x21, 0x6A, 0x60, 0xF0, 0x08, 0x4C, 0x15, 0xF0,
 0x00, 0x4A, 0x43, 0xDC, 0x00, 0x6D, 0x00, 0x18,
-0xAD, 0x0C, 0x30, 0xF0, 0x20, 0x6C, 0x30, 0xF0,
+0x70, 0x0E, 0x30, 0xF0, 0x20, 0x6C, 0x30, 0xF0,
 0x20, 0x6B, 0xE0, 0xF0, 0x08, 0x4C, 0x01, 0x6D,
-0xA8, 0xF0, 0x58, 0xDB, 0x00, 0x18, 0x72, 0x0B,
-0x30, 0xF0, 0x20, 0x6B, 0xC8, 0xF0, 0x44, 0xDB,
+0xC7, 0xF6, 0x4C, 0xDB, 0x00, 0x18, 0x29, 0x0D,
+0x30, 0xF0, 0x20, 0x6B, 0xC7, 0xF6, 0x54, 0xDB,
 0x30, 0xF0, 0x20, 0x6C, 0x30, 0xF0, 0x21, 0x6A,
 0xA0, 0xF0, 0x08, 0x4C, 0x15, 0xF4, 0x00, 0x4A,
-0x43, 0xDC, 0x00, 0x6D, 0x00, 0x18, 0xAD, 0x0C,
-0x30, 0xF0, 0x20, 0x6C, 0x30, 0xF0, 0x20, 0x6B,
-0x20, 0xF1, 0x0C, 0x4C, 0x01, 0x6D, 0xA8, 0xF0,
-0x5C, 0xDB, 0x00, 0x18, 0x72, 0x0B, 0x30, 0xF0,
-0x20, 0x6B, 0xC8, 0xF0, 0x48, 0xDB, 0x30, 0xF0,
-0x20, 0x6C, 0x30, 0xF0, 0x21, 0x6A, 0xE0, 0xF0,
-0x0C, 0x4C, 0x16, 0xF0, 0x00, 0x4A, 0x43, 0xDC,
-0x00, 0x6D, 0x00, 0x18, 0xAD, 0x0C, 0x30, 0xF0,
-0x20, 0x6B, 0xC8, 0xF0, 0x40, 0xDB, 0x00, 0x18,
-0x41, 0x07, 0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF0,
-0x60, 0x9A, 0xFF, 0xF7, 0x1F, 0x6C, 0x10, 0xF0,
-0x00, 0x6D, 0x40, 0xAB, 0xAB, 0xED, 0x8C, 0xEA,
-0xAD, 0xEA, 0x8C, 0xEA, 0x40, 0xCB, 0x00, 0x18,
-0xED, 0x0A, 0x00, 0x18, 0xF0, 0x09, 0xFF, 0x17,
-0x20, 0xE8, 0x00, 0x65, 0x6D, 0xB8, 0x00, 0x65,
-0x00, 0xF0, 0x20, 0x6A, 0x7C, 0x4A, 0x6C, 0xEA,
-0x0F, 0x22, 0x00, 0xF0, 0x20, 0x6B, 0x28, 0x4B,
-0x6A, 0xEA, 0x05, 0x61, 0x10, 0xF0, 0x20, 0x6A,
-0xC0, 0xF3, 0x13, 0x4A, 0x00, 0xEA, 0x10, 0xF0,
-0x20, 0x6A, 0x64, 0xF7, 0x11, 0x4A, 0x00, 0xEA,
-0x00, 0xF0, 0x20, 0x6A, 0x1F, 0xF7, 0x00, 0x6A,
-0x4C, 0xEB, 0x4C, 0xB8, 0x00, 0x65, 0x6C, 0xEA,
-0x42, 0x32, 0x30, 0xF0, 0x20, 0x6B, 0x41, 0xF3,
-0x04, 0x4B, 0x49, 0xE3, 0x40, 0xA2, 0x30, 0xF0,
-0x20, 0x6B, 0x40, 0xF0, 0x08, 0x4B, 0x69, 0xE2,
-0x30, 0xF0, 0x20, 0x6B, 0x88, 0xF7, 0x1C, 0x4B,
-0x60, 0x9B, 0x05, 0x2B, 0x10, 0xF0, 0x20, 0x6B,
-0x00, 0xF5, 0x01, 0x4B, 0x00, 0xEB, 0x10, 0xF0,
-0x20, 0x6B, 0x80, 0xF5, 0x15, 0x4B, 0x00, 0xEB,
-0x00, 0x65, 0x30, 0xF0, 0x20, 0x6A, 0xA8, 0xF0,
-0x04, 0x4A, 0x00, 0xF0, 0x20, 0x6B, 0x01, 0x6B,
+0x43, 0xDC, 0x00, 0x6D, 0x00, 0x18, 0x70, 0x0E,
+0x30, 0xF0, 0x20, 0x6B, 0xC7, 0xF6, 0x50, 0xDB,
+0x00, 0x18, 0x16, 0x09, 0x30, 0xF0, 0x20, 0x6A,
+0x60, 0xF7, 0x6C, 0x9A, 0xFF, 0xF7, 0x1F, 0x6C,
+0x10, 0xF0, 0x00, 0x6D, 0x40, 0xAB, 0xAB, 0xED,
+0x8C, 0xEA, 0xAD, 0xEA, 0x8C, 0xEA, 0x40, 0xCB,
+0x00, 0x18, 0x98, 0x0C, 0x00, 0x18, 0x63, 0x0B,
+0xFF, 0x17, 0x00, 0x65, 0x20, 0xE8, 0x00, 0x65,
+0x6D, 0xB8, 0x00, 0x65, 0x00, 0xF0, 0x20, 0x6A,
+0x7C, 0x4A, 0x6C, 0xEA, 0x20, 0x22, 0x00, 0xF0,
+0x20, 0x6B, 0x28, 0x4B, 0x6A, 0xEA, 0x0F, 0x61,
+0x30, 0xF0, 0x20, 0x6B, 0x68, 0xF6, 0x0C, 0x4B,
+0x77, 0xF0, 0x24, 0x6A, 0xA0, 0xF4, 0x04, 0x4A,
+0x60, 0xDA, 0x30, 0xF0, 0x20, 0x6A, 0x68, 0xF6,
+0x0C, 0x4A, 0x6A, 0xEA, 0x31, 0x60, 0x77, 0xF0,
+0x24, 0x6A, 0xA0, 0xF1, 0x1C, 0x4A, 0x1D, 0xF4,
+0x00, 0x6B, 0x60, 0xDA, 0x10, 0xF0, 0x20, 0x6A,
+0x25, 0xF5, 0x1D, 0x4A, 0x00, 0xEA, 0x00, 0xF0,
+0x20, 0x6A, 0x1F, 0xF7, 0x00, 0x6A, 0x4C, 0xEB,
+0x4C, 0xB8, 0x00, 0x65, 0x6C, 0xEA, 0x42, 0x32,
+0x30, 0xF0, 0x20, 0x6B, 0xA1, 0xF2, 0x10, 0x4B,
+0x49, 0xE3, 0x40, 0xA2, 0x30, 0xF0, 0x20, 0x6B,
+0x40, 0xF0, 0x08, 0x4B, 0x69, 0xE2, 0x30, 0xF0,
+0x20, 0x6B, 0x68, 0xF6, 0x08, 0x4B, 0x60, 0x9B,
+0x05, 0x2B, 0x10, 0xF0, 0x20, 0x6B, 0x00, 0xF5,
+0x1D, 0x4B, 0x00, 0xEB, 0x10, 0xF0, 0x20, 0x6B,
+0xA0, 0xF5, 0x11, 0x4B, 0x00, 0xEB, 0x00, 0x65,
+0x00, 0xF0, 0x20, 0x6B, 0x01, 0x6B, 0x30, 0xF0,
+0x20, 0x6A, 0x68, 0xF6, 0x0C, 0x4A, 0x60, 0xDA,
+0x30, 0xF0, 0x20, 0x6A, 0xA7, 0xF6, 0x18, 0x4A,
 0x60, 0xDA, 0x10, 0xF0, 0x20, 0x6B, 0xE0, 0xF3,
-0x0D, 0x4B, 0x00, 0xEB, 0x5A, 0xB8, 0x00, 0x65,
+0x05, 0x4B, 0x00, 0xEB, 0x5A, 0xB8, 0x00, 0x65,
 0x7B, 0xB8, 0x00, 0x65, 0x40, 0xE8, 0x5A, 0xB9,
 0x00, 0x65, 0x00, 0x65, 0x00, 0x65, 0x7B, 0xB9,
 0x00, 0x65, 0x00, 0x65, 0x00, 0x65, 0x30, 0xF0,
-0x20, 0x6A, 0xA8, 0xF0, 0x04, 0x4A, 0x00, 0xF0,
+0x20, 0x6A, 0xA7, 0xF6, 0x18, 0x4A, 0x00, 0xF0,
 0x20, 0x6B, 0x60, 0xDA, 0x30, 0xF0, 0x20, 0x6A,
-0x08, 0xF1, 0x04, 0x4A, 0x60, 0x9A, 0x41, 0x9A,
+0x07, 0xF7, 0x10, 0x4A, 0x60, 0x9A, 0x41, 0x9A,
 0x6A, 0xEA, 0x0D, 0x61, 0x6E, 0xB8, 0x00, 0x65,
 0x62, 0x43, 0xCB, 0xB9, 0x00, 0x65, 0x00, 0x65,
 0x00, 0x65, 0x5A, 0xB8, 0x00, 0x65, 0x7B, 0xB8,
-0x00, 0x65, 0x00, 0xBA, 0x00, 0x65, 0x24, 0x23,
+0x00, 0x65, 0x00, 0xBA, 0x00, 0x65, 0x36, 0x23,
 0xDF, 0xF7, 0x00, 0x03, 0x86, 0xDB, 0xA7, 0xDB,
 0xC8, 0xDB, 0xE9, 0xDB, 0x0A, 0xDB, 0x2B, 0xDB,
 0x98, 0x67, 0x8C, 0xDB, 0x9F, 0x67, 0x8E, 0xDB,
@@ -25109,58 +26687,67 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x9A, 0xB8, 0x00, 0x65, 0x84, 0xDB, 0x9B, 0xB8,
 0x00, 0x65, 0x85, 0xDB, 0x8E, 0xB8, 0x00, 0x65,
 0x82, 0x44, 0x81, 0xDB, 0x8C, 0xB8, 0x00, 0x65,
-0x80, 0xDB, 0x30, 0xF0, 0x20, 0x6B, 0x08, 0xF1,
-0x04, 0x4B, 0x60, 0x9B, 0x9D, 0x67, 0x89, 0xDB,
-0x30, 0xF0, 0x20, 0x6B, 0x08, 0xF1, 0x04, 0x4B,
-0x41, 0x9B, 0x40, 0xDB, 0x89, 0x9A, 0xBC, 0x65,
-0x7D, 0x67, 0xDF, 0xF7, 0x00, 0x03, 0x4C, 0xB8,
-0x00, 0x65, 0x00, 0xF0, 0x20, 0x6D, 0x05, 0x4D,
-0xAF, 0xED, 0xAC, 0xEA, 0xA0, 0x9B, 0x04, 0x6C,
-0x8C, 0xED, 0xAD, 0xEA, 0x82, 0x9B, 0xA3, 0x9B,
-0x32, 0xEC, 0x30, 0xED, 0x8E, 0x9B, 0xFC, 0x65,
-0x8C, 0x9B, 0x1C, 0x65, 0x84, 0x9B, 0x5C, 0xB9,
-0x00, 0x65, 0x00, 0x65, 0x00, 0x65, 0x85, 0x9B,
-0x7C, 0xB9, 0x00, 0x65, 0x00, 0x65, 0x00, 0x65,
-0x2B, 0x9B, 0x0A, 0x9B, 0xE9, 0x9B, 0xC8, 0x9B,
-0xA7, 0x9B, 0x86, 0x9B, 0x61, 0x9B, 0xCB, 0xB9,
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+0x78, 0x9B, 0xA0, 0xDB, 0x30, 0xF0, 0x20, 0x6B,
+0x80, 0xF4, 0x7C, 0x9B, 0x80, 0xDB, 0x30, 0xF0,
+0x20, 0x6B, 0x89, 0x9A, 0xA0, 0xF4, 0x60, 0x9B,
 0x80, 0xDB, 0x68, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
-0x40, 0xF6, 0x48, 0x9A, 0x60, 0xDA, 0x00, 0x18,
-0xF1, 0x09, 0xFF, 0x17, 0x71, 0xAC, 0x4A, 0x9C,
+0xA0, 0xF4, 0x44, 0x9A, 0x60, 0xDA, 0x00, 0x18,
+0x64, 0x0B, 0xFF, 0x17, 0x71, 0xAC, 0x4A, 0x9C,
 0x6A, 0x33, 0x68, 0x33, 0x6D, 0xE2, 0x04, 0x6A,
 0x6C, 0xEA, 0x01, 0x22, 0xFC, 0x4B, 0x48, 0x43,
 0xC8, 0x4A, 0xC2, 0x67, 0x00, 0x6F, 0xE0, 0xDE,
@@ -25977,10 +27740,10 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x40, 0x4A, 0x49, 0xDC, 0xAB, 0xDC, 0x20, 0xE8,
 0x49, 0x9C, 0x10, 0x4A, 0x20, 0xE8, 0x00, 0x65,
 0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x05, 0x67,
-0x00, 0x18, 0xE2, 0x07, 0x00, 0xDA, 0x05, 0x97,
+0x00, 0x18, 0x52, 0x09, 0x00, 0xDA, 0x05, 0x97,
 0x04, 0x90, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
-0x05, 0x67, 0x26, 0x67, 0x00, 0x18, 0xE2, 0x07,
+0x05, 0x67, 0x26, 0x67, 0x00, 0x18, 0x52, 0x09,
 0x40, 0x9A, 0x00, 0xDA, 0x21, 0xDA, 0x07, 0x97,
 0x06, 0x91, 0x05, 0x90, 0x04, 0x63, 0x00, 0xEF,
 0x60, 0xA4, 0xC2, 0xA5, 0x41, 0x9C, 0x02, 0x10,
@@ -25994,14 +27757,14 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x08, 0x60, 0x61, 0x9A, 0x03, 0x23, 0x82, 0xDB,
 0x00, 0x6B, 0x61, 0xDA, 0x00, 0x6B, 0x62, 0xDA,
 0x20, 0xE8, 0x00, 0x6B, 0x61, 0xDA, 0x20, 0xE8,
-0x30, 0xF0, 0x20, 0x6A, 0xC8, 0xF0, 0x0C, 0x4A,
+0x30, 0xF0, 0x20, 0x6A, 0xC7, 0xF6, 0x18, 0x4A,
 0x61, 0x9A, 0x61, 0xDC, 0x00, 0x6B, 0x62, 0xDC,
 0x81, 0xDA, 0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6B,
-0xC8, 0xF0, 0x0C, 0x4B, 0x30, 0xF0, 0x20, 0x6C,
-0x41, 0x9B, 0x08, 0xF1, 0x84, 0x9C, 0xA2, 0xA2,
+0xC7, 0xF6, 0x18, 0x4B, 0x30, 0xF0, 0x20, 0x6C,
+0x41, 0x9B, 0x07, 0xF7, 0x90, 0x9C, 0xA2, 0xA2,
 0x82, 0xA4, 0xAE, 0xEC, 0x02, 0x24, 0x00, 0x6A,
 0x20, 0xE8, 0x81, 0x9A, 0x81, 0xDB, 0x20, 0xE8,
-0x30, 0xF0, 0x20, 0x6B, 0xE8, 0xF0, 0x00, 0x4B,
+0x30, 0xF0, 0x20, 0x6B, 0xE7, 0xF6, 0x0C, 0x4B,
 0xC3, 0x9B, 0xFF, 0xF7, 0x1F, 0x6A, 0xAC, 0xEA,
 0x00, 0x6D, 0x04, 0x26, 0xA1, 0xAB, 0x0D, 0x10,
 0xC3, 0x9B, 0x08, 0x2E, 0x00, 0x6E, 0xAB, 0xE2,
@@ -26012,36 +27775,36 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x01, 0x26, 0x84, 0xDE, 0x4B, 0xE5, 0x4A, 0xCC,
 0xAA, 0xAB, 0x4B, 0xE5, 0x4A, 0xCB, 0x20, 0xE8,
 0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x30, 0xF0,
-0x20, 0x6A, 0xE8, 0xF0, 0x00, 0x4A, 0x63, 0x9A,
+0x20, 0x6A, 0xE7, 0xF6, 0x0C, 0x4A, 0x63, 0x9A,
 0x3C, 0x23, 0x61, 0xAA, 0xFF, 0x4B, 0x61, 0xCA,
 0x30, 0x10, 0x42, 0x98, 0x09, 0x22, 0x81, 0x98,
 0x81, 0xDA, 0x41, 0x98, 0x03, 0x22, 0x82, 0x98,
 0x82, 0xDA, 0x61, 0xD8, 0x00, 0x6A, 0x42, 0xD8,
-0x30, 0xF0, 0x20, 0x6C, 0xC8, 0xF0, 0x0C, 0x4C,
-0xB0, 0x67, 0x00, 0x18, 0xF2, 0x07, 0x6A, 0xA8,
-0x30, 0xF0, 0x20, 0x6A, 0xE8, 0xF0, 0x62, 0xCA,
+0x30, 0xF0, 0x20, 0x6C, 0xC7, 0xF6, 0x18, 0x4C,
+0xB0, 0x67, 0x00, 0x18, 0x62, 0x09, 0x6A, 0xA8,
+0x30, 0xF0, 0x20, 0x6A, 0xE7, 0xF6, 0x6E, 0xCA,
 0x41, 0xA0, 0x04, 0x72, 0x07, 0x61, 0x30, 0xF0,
-0x20, 0x6A, 0xE8, 0xF0, 0x7C, 0x9A, 0x4B, 0xA8,
+0x20, 0x6A, 0x07, 0xF7, 0x68, 0x9A, 0x4B, 0xA8,
 0x49, 0xE3, 0x4A, 0xC8, 0x01, 0x6A, 0x63, 0x98,
-0x41, 0xC0, 0x30, 0xF0, 0x20, 0x6A, 0xE8, 0xF0,
-0x00, 0x4A, 0x63, 0xDA, 0x63, 0x98, 0x03, 0x23,
+0x41, 0xC0, 0x30, 0xF0, 0x20, 0x6A, 0xE7, 0xF6,
+0x0C, 0x4A, 0x63, 0xDA, 0x63, 0x98, 0x03, 0x23,
 0x44, 0xDB, 0x00, 0x6A, 0x43, 0xD8, 0x00, 0x6A,
-0x44, 0xD8, 0x30, 0xF0, 0x20, 0x6A, 0xE8, 0xF0,
-0x00, 0x4A, 0x61, 0xAA, 0x02, 0x2B, 0x03, 0x9A,
+0x44, 0xD8, 0x30, 0xF0, 0x20, 0x6A, 0xE7, 0xF6,
+0x0C, 0x4A, 0x61, 0xAA, 0x02, 0x2B, 0x03, 0x9A,
 0xC8, 0x28, 0x05, 0x97, 0x04, 0x90, 0x03, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0x42, 0x9C, 0x07, 0x22,
 0x61, 0x9C, 0x61, 0xDA, 0x41, 0x9C, 0x10, 0x22,
 0x62, 0x9C, 0x62, 0xDA, 0x20, 0xE8, 0x30, 0xF0,
-0x20, 0x6A, 0xC8, 0xF0, 0x0C, 0x4A, 0x07, 0x10,
+0x20, 0x6A, 0xC7, 0xF6, 0x18, 0x4A, 0x07, 0x10,
 0x61, 0x9A, 0x8A, 0xEB, 0x03, 0x61, 0x61, 0x9B,
 0x61, 0xDA, 0x20, 0xE8, 0x43, 0x67, 0xF8, 0x2A,
 0x20, 0xE8, 0x00, 0x65, 0xFC, 0x63, 0x07, 0x62,
 0x06, 0xD1, 0x05, 0xD0, 0x02, 0x9C, 0x24, 0x67,
 0x09, 0x28, 0x41, 0xA4, 0x01, 0x72, 0x0F, 0x61,
-0x30, 0xF0, 0x20, 0x68, 0xC8, 0xF0, 0x0C, 0x48,
+0x30, 0xF0, 0x20, 0x68, 0xC7, 0xF6, 0x18, 0x48,
 0x03, 0x10, 0x02, 0x98, 0x40, 0xA0, 0xFD, 0x22,
-0x91, 0x67, 0x00, 0x18, 0x4F, 0x08, 0x90, 0x67,
-0xB1, 0x67, 0x00, 0x18, 0xF2, 0x07, 0x07, 0x97,
+0x91, 0x67, 0x00, 0x18, 0xBF, 0x09, 0x90, 0x67,
+0xB1, 0x67, 0x00, 0x18, 0x62, 0x09, 0x07, 0x97,
 0x06, 0x91, 0x05, 0x90, 0x04, 0x63, 0x00, 0xEF,
 0x44, 0x9C, 0x10, 0x22, 0x63, 0x9C, 0x63, 0xDA,
 0x63, 0x9C, 0x09, 0x23, 0x6A, 0xAA, 0xAA, 0xAC,
@@ -26049,3401 +27812,3846 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x00, 0x6A, 0x43, 0xDC, 0x01, 0x10, 0x6A, 0xCA,
 0x00, 0x6A, 0x44, 0xDC, 0x20, 0xE8, 0x00, 0x65,
 0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
-0x30, 0xF0, 0x20, 0x68, 0x68, 0xF5, 0x1C, 0x48,
+0x30, 0xF0, 0x20, 0x68, 0x47, 0xF7, 0x08, 0x48,
 0x09, 0xD5, 0x24, 0x67, 0x83, 0xA0, 0xA2, 0x40,
-0xD0, 0x67, 0x00, 0x18, 0x59, 0x0E, 0x63, 0xA0,
+0xD0, 0x67, 0x00, 0x18, 0x24, 0x10, 0x63, 0xA0,
 0x63, 0xEA, 0x06, 0x60, 0x4C, 0x32, 0x41, 0xE0,
 0x21, 0xD8, 0x09, 0x92, 0x42, 0xD8, 0x03, 0x10,
-0x02, 0x6C, 0x00, 0x18, 0xC0, 0x09, 0x07, 0x97,
+0x02, 0x6C, 0x00, 0x18, 0x2F, 0x0B, 0x07, 0x97,
 0x06, 0x91, 0x05, 0x90, 0x04, 0x63, 0x00, 0xEF,
 0x20, 0xE8, 0x00, 0x65, 0x20, 0xE8, 0x00, 0x65,
-0x30, 0xF0, 0x20, 0x6A, 0xE8, 0xF0, 0x5C, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x07, 0xF7, 0x48, 0x9A,
 0x20, 0xE8, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6B,
-0xFF, 0xF7, 0x1F, 0x6A, 0x8C, 0xEA, 0x08, 0xF1,
-0x84, 0x9B, 0x4B, 0xCC, 0x30, 0xF0, 0x20, 0x6C,
-0xE8, 0xF0, 0x9C, 0x9C, 0x08, 0xF1, 0x64, 0x9B,
+0xFF, 0xF7, 0x1F, 0x6A, 0x8C, 0xEA, 0x07, 0xF7,
+0x90, 0x9B, 0x4B, 0xCC, 0x30, 0xF0, 0x20, 0x6C,
+0x07, 0xF7, 0x88, 0x9C, 0x07, 0xF7, 0x70, 0x9B,
 0x89, 0xE2, 0x4A, 0xCB, 0x20, 0xE8, 0x00, 0x65,
 0xFD, 0x63, 0x05, 0x62, 0x30, 0xF0, 0x20, 0x6A,
-0x08, 0xF1, 0x44, 0x9A, 0x30, 0xF0, 0x20, 0x6B,
-0xE8, 0xF0, 0x9C, 0x9B, 0x6A, 0xAA, 0xFF, 0xF7,
+0x07, 0xF7, 0x50, 0x9A, 0x30, 0xF0, 0x20, 0x6B,
+0x07, 0xF7, 0x88, 0x9B, 0x6A, 0xAA, 0xFF, 0xF7,
 0x1F, 0x6D, 0x93, 0xE3, 0xAC, 0xEC, 0xAB, 0xAA,
 0x6D, 0xE5, 0x6A, 0xCA, 0x82, 0x32, 0x5E, 0x32,
-0x03, 0x2A, 0x04, 0x6D, 0x00, 0x18, 0x05, 0x09,
+0x03, 0x2A, 0x04, 0x6D, 0x00, 0x18, 0x72, 0x0A,
 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFD, 0x63, 0x05, 0x62, 0xFF, 0xF7, 0x1F, 0x6A,
-0x4C, 0xEC, 0x03, 0x6D, 0x00, 0x18, 0x05, 0x09,
+0x4C, 0xEC, 0x03, 0x6D, 0x00, 0x18, 0x72, 0x0A,
 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0x20, 0xE8, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x30, 0xF0, 0x20, 0x6A, 0x08, 0xF1, 0x64, 0x9A,
-0x01, 0x6C, 0x81, 0xC3, 0x08, 0xF1, 0x84, 0x9A,
-0x00, 0x18, 0x08, 0x08, 0x00, 0x18, 0x85, 0x08,
-0x30, 0xF0, 0x20, 0x6A, 0xE8, 0xF0, 0x7C, 0x9A,
-0x01, 0x4B, 0xE8, 0xF0, 0x7C, 0xDA, 0x00, 0x18,
-0x2A, 0x08, 0x30, 0xF0, 0x20, 0x6C, 0xC8, 0xF0,
-0x0C, 0x4C, 0x00, 0x18, 0xFE, 0x07, 0x82, 0x67,
-0x00, 0x18, 0xE8, 0x08, 0x05, 0x97, 0x03, 0x63,
-0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x04, 0xD0, 0x30, 0xF0, 0x20, 0x6A, 0x08, 0xF1,
-0x64, 0x9A, 0x01, 0x6C, 0x81, 0xC3, 0x08, 0xF1,
-0x84, 0x9A, 0x00, 0x18, 0x08, 0x08, 0x30, 0xF0,
-0x20, 0x6A, 0x68, 0xF5, 0x1D, 0xA2, 0x1A, 0x10,
-0x0C, 0x33, 0x69, 0xE2, 0x81, 0x9A, 0x60, 0xA4,
-0x04, 0x2B, 0xA4, 0xAA, 0x00, 0x18, 0x68, 0x0D,
-0x02, 0x10, 0x00, 0x18, 0x03, 0x0D, 0x30, 0xF0,
-0x20, 0x6A, 0x68, 0xF5, 0x1C, 0x4A, 0x83, 0xA2,
-0x01, 0x48, 0x0E, 0xEC, 0x8B, 0xEB, 0x8D, 0xEB,
-0xC0, 0xF7, 0x63, 0x33, 0x6C, 0xE8, 0x62, 0xA2,
-0xFF, 0x4B, 0x62, 0xC2, 0x30, 0xF0, 0x20, 0x6A,
-0x68, 0xF5, 0x1C, 0x4A, 0x62, 0xA2, 0xE0, 0x2B,
-0x30, 0xF0, 0x20, 0x6C, 0x01, 0xC2, 0xC8, 0xF0,
-0x0C, 0x4C, 0x00, 0x18, 0xFE, 0x07, 0x82, 0x67,
-0x00, 0x18, 0xE8, 0x08, 0x05, 0x97, 0x04, 0x90,
-0x03, 0x63, 0x00, 0xEF, 0xFD, 0x63, 0x05, 0x62,
-0x00, 0x18, 0xDF, 0x03, 0x05, 0x97, 0x03, 0x63,
-0x00, 0xEF, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6A,
-0x20, 0xF1, 0x90, 0xAA, 0x30, 0xF0, 0x20, 0x6A,
-0x88, 0xF7, 0x00, 0x4A, 0x01, 0x6B, 0x07, 0x10,
-0xA0, 0x9A, 0x04, 0x4A, 0x03, 0x2D, 0xFF, 0x6A,
-0x6C, 0xEA, 0x20, 0xE8, 0x01, 0x4B, 0x63, 0xEC,
-0xF7, 0x60, 0x00, 0x6A, 0x20, 0xE8, 0x00, 0x65,
-0x30, 0xF0, 0x20, 0x6A, 0x08, 0xF1, 0x88, 0xDA,
-0x02, 0x6A, 0x41, 0xC4, 0x20, 0xE8, 0x00, 0x65,
-0x30, 0xF0, 0x20, 0x6A, 0x08, 0xF1, 0x64, 0x9A,
-0x00, 0x6A, 0x01, 0x23, 0x43, 0xA3, 0x20, 0xE8,
-0xFD, 0x63, 0x05, 0x62, 0x00, 0x18, 0x62, 0x0E,
-0x05, 0x97, 0x30, 0xF0, 0x20, 0x6B, 0x08, 0xF1,
-0x40, 0xDB, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
-0x00, 0x18, 0x0D, 0x08, 0x22, 0x67, 0x11, 0x22,
-0x30, 0xF0, 0x20, 0x68, 0x08, 0xF1, 0xA4, 0x98,
-0x30, 0xF0, 0x20, 0x6C, 0xC8, 0xF0, 0x0C, 0x4C,
-0x00, 0x18, 0xF2, 0x07, 0x08, 0xF1, 0x44, 0x98,
-0x01, 0x6B, 0x91, 0x67, 0x61, 0xC2, 0x00, 0x18,
-0xE8, 0x08, 0x07, 0x97, 0x06, 0x91, 0x05, 0x90,
-0x04, 0x63, 0x00, 0xEF, 0xFD, 0x63, 0x05, 0x62,
-0x04, 0xD0, 0xFF, 0xF7, 0x1F, 0x6A, 0xFF, 0x68,
-0x8C, 0xEA, 0xAC, 0xE8, 0x18, 0x22, 0xFF, 0xF7,
-0x1F, 0x72, 0x07, 0x60, 0x30, 0xF0, 0x20, 0x6B,
-0x08, 0xF1, 0x84, 0x9B, 0xA2, 0x67, 0x00, 0x18,
-0x16, 0x08, 0x30, 0xF0, 0x20, 0x6A, 0x08, 0xF1,
-0x44, 0x9A, 0x30, 0xF0, 0x20, 0x6C, 0xC8, 0xF0,
-0x0C, 0x4C, 0x01, 0xC2, 0x00, 0x18, 0xFE, 0x07,
-0x82, 0x67, 0x00, 0x18, 0xE8, 0x08, 0x05, 0x97,
-0x04, 0x90, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0xFD, 0x63, 0x05, 0x62, 0x30, 0xF0, 0x20, 0x6A,
+0x07, 0xF7, 0x70, 0x9A, 0x01, 0x6C, 0x81, 0xC3,
+0x07, 0xF7, 0x90, 0x9A, 0x00, 0x18, 0x78, 0x09,
+0x00, 0x18, 0xF5, 0x09, 0x30, 0xF0, 0x20, 0x6A,
+0x07, 0xF7, 0x68, 0x9A, 0x01, 0x4B, 0x07, 0xF7,
+0x68, 0xDA, 0x00, 0x18, 0x9A, 0x09, 0x30, 0xF0,
+0x20, 0x6C, 0xC7, 0xF6, 0x18, 0x4C, 0x00, 0x18,
+0x6E, 0x09, 0x82, 0x67, 0x00, 0x18, 0x57, 0x0A,
+0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x30, 0xF0,
+0x20, 0x6A, 0x07, 0xF7, 0x70, 0x9A, 0x01, 0x6C,
+0x81, 0xC3, 0x07, 0xF7, 0x90, 0x9A, 0x00, 0x18,
+0x78, 0x09, 0x30, 0xF0, 0x20, 0x6A, 0x47, 0xF7,
+0x09, 0xA2, 0x1A, 0x10, 0x0C, 0x33, 0x69, 0xE2,
+0x81, 0x9A, 0x60, 0xA4, 0x04, 0x2B, 0xA4, 0xAA,
+0x00, 0x18, 0x33, 0x0F, 0x02, 0x10, 0x00, 0x18,
+0xCE, 0x0E, 0x30, 0xF0, 0x20, 0x6A, 0x47, 0xF7,
+0x08, 0x4A, 0x83, 0xA2, 0x01, 0x48, 0x0E, 0xEC,
+0x8B, 0xEB, 0x8D, 0xEB, 0xC0, 0xF7, 0x63, 0x33,
+0x6C, 0xE8, 0x62, 0xA2, 0xFF, 0x4B, 0x62, 0xC2,
+0x30, 0xF0, 0x20, 0x6A, 0x47, 0xF7, 0x08, 0x4A,
+0x62, 0xA2, 0xE0, 0x2B, 0x30, 0xF0, 0x20, 0x6C,
+0x01, 0xC2, 0xC7, 0xF6, 0x18, 0x4C, 0x00, 0x18,
+0x6E, 0x09, 0x82, 0x67, 0x00, 0x18, 0x57, 0x0A,
+0x05, 0x97, 0x04, 0x90, 0x03, 0x63, 0x00, 0xEF,
+0xFD, 0x63, 0x05, 0x62, 0x00, 0x18, 0xE5, 0x03,
+0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF1, 0x9C, 0xAA,
+0x30, 0xF0, 0x20, 0x6A, 0x48, 0xF6, 0x0C, 0x4A,
+0x01, 0x6B, 0x07, 0x10, 0xA0, 0x9A, 0x04, 0x4A,
+0x03, 0x2D, 0xFF, 0x6A, 0x6C, 0xEA, 0x20, 0xE8,
+0x01, 0x4B, 0x63, 0xEC, 0xF7, 0x60, 0x00, 0x6A,
+0x20, 0xE8, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6A,
+0x07, 0xF7, 0x94, 0xDA, 0x02, 0x6A, 0x41, 0xC4,
+0x20, 0xE8, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6A,
+0x07, 0xF7, 0x70, 0x9A, 0x00, 0x6A, 0x01, 0x23,
+0x43, 0xA3, 0x20, 0xE8, 0xFD, 0x63, 0x05, 0x62,
+0x00, 0x18, 0x2D, 0x10, 0x05, 0x97, 0x03, 0x63,
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+0x6C, 0xDA, 0x00, 0x18, 0x05, 0x36, 0x00, 0x18,
+0x63, 0x0B, 0x00, 0x18, 0x64, 0x0B, 0x30, 0xF0,
+0x20, 0x6A, 0xC1, 0xF3, 0x1C, 0x4A, 0x30, 0xF0,
+0x20, 0x6B, 0xA0, 0xF4, 0x78, 0x9B, 0x80, 0xF0,
+0x8C, 0x9A, 0x8C, 0xEB, 0x09, 0x23, 0x30, 0xF0,
+0x20, 0x6B, 0x80, 0xF6, 0x78, 0x9B, 0x8C, 0xEB,
+0x80, 0xF0, 0x6C, 0xDA, 0x00, 0x18, 0xED, 0x1C,
+0x00, 0x18, 0x63, 0x0B, 0x30, 0xF0, 0x20, 0x6A,
+0xE7, 0xF4, 0x78, 0xA2, 0x08, 0x6A, 0x6C, 0xEA,
+0x0F, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF7,
+0x50, 0x9A, 0x01, 0x6B, 0x80, 0xA2, 0x8C, 0xEB,
+0x07, 0x23, 0x80, 0xA2, 0xFE, 0x6B, 0x8C, 0xEB,
+0x60, 0xC2, 0x03, 0x6C, 0x00, 0x18, 0xD6, 0x2C,
+0x30, 0xF0, 0x20, 0x6A, 0xC7, 0xF6, 0x94, 0x9A,
+0x00, 0x18, 0xBA, 0x0C, 0x55, 0x17, 0x00, 0x65,
 0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x00, 0x68,
-0x30, 0xF0, 0x20, 0x6B, 0x20, 0xF6, 0x6C, 0x9B,
-0x10, 0xF0, 0x21, 0x6A, 0xF1, 0xF0, 0x01, 0x4A,
+0x30, 0xF0, 0x20, 0x6B, 0x80, 0xF4, 0x68, 0x9B,
+0x10, 0xF0, 0x21, 0x6A, 0x53, 0xF5, 0x09, 0x4A,
 0x0A, 0x70, 0x40, 0xDB, 0x09, 0x61, 0x30, 0xF0,
-0x20, 0x6A, 0xC8, 0xF0, 0x84, 0x9A, 0x01, 0x6D,
-0xAB, 0xED, 0x00, 0x18, 0x40, 0x0A, 0x00, 0x68,
-0x00, 0x18, 0xF1, 0x09, 0x30, 0xF0, 0x20, 0x6A,
-0x81, 0xF4, 0x0C, 0x4A, 0x80, 0xF0, 0x8C, 0x9A,
-0x08, 0x6B, 0x8C, 0xEB, 0x07, 0x23, 0x09, 0x6B,
-0x6B, 0xEB, 0x8C, 0xEB, 0x80, 0xF0, 0x6C, 0xDA,
-0x00, 0x18, 0xC2, 0x1D, 0x00, 0x18, 0xF0, 0x09,
-0x30, 0xF0, 0x20, 0x6B, 0xFF, 0x6A, 0x01, 0x48,
-0x20, 0xF6, 0x6C, 0x9B, 0x4C, 0xE8, 0x10, 0xF0,
-0x21, 0x6A, 0xF1, 0xF0, 0x02, 0x4A, 0x40, 0xDB,
-0xCB, 0x17, 0x00, 0x65, 0xFC, 0x63, 0x07, 0x62,
-0x06, 0xD1, 0x05, 0xD0, 0x30, 0xF0, 0x20, 0x6A,
-0x20, 0xF6, 0x2C, 0x9A, 0x10, 0xF0, 0x21, 0x68,
-0x51, 0xF1, 0x15, 0x48, 0x00, 0xD9, 0x30, 0xF0,
-0x20, 0x6A, 0xC8, 0xF0, 0x88, 0x9A, 0x01, 0x6D,
-0xAB, 0xED, 0x00, 0x18, 0x40, 0x0A, 0x04, 0x6C,
-0x00, 0x18, 0xF7, 0x09, 0x00, 0x18, 0xF8, 0x22,
-0x04, 0x6C, 0x00, 0x18, 0xF2, 0x09, 0x08, 0x6C,
-0x00, 0x18, 0xF7, 0x09, 0x00, 0x18, 0xF4, 0x22,
-0x08, 0x6C, 0x00, 0x18, 0xF2, 0x09, 0x10, 0x6C,
-0x00, 0x18, 0xF7, 0x09, 0x00, 0x18, 0xF0, 0x22,
-0x10, 0x6C, 0x00, 0x18, 0xF2, 0x09, 0x20, 0x6C,
-0x00, 0x18, 0xF7, 0x09, 0x00, 0x18, 0xEC, 0x22,
-0x20, 0x6C, 0x00, 0x18, 0xF2, 0x09, 0x40, 0x6C,
-0x00, 0x18, 0xF7, 0x09, 0x00, 0x18, 0xE8, 0x22,
-0x40, 0x6C, 0x00, 0x18, 0xF2, 0x09, 0x80, 0x6C,
-0x00, 0x18, 0xF7, 0x09, 0x01, 0x48, 0x00, 0x18,
-0xE4, 0x22, 0x80, 0x6C, 0x00, 0x18, 0xF2, 0x09,
-0x00, 0xD9, 0xBC, 0x17, 0x00, 0x6A, 0x64, 0x67,
+0x20, 0x6A, 0xC7, 0xF6, 0x94, 0x9A, 0x01, 0x6D,
+0xAB, 0xED, 0x00, 0x18, 0xBF, 0x0B, 0x00, 0x68,
+0x00, 0x18, 0x64, 0x0B, 0x30, 0xF0, 0x20, 0x6A,
+0xC1, 0xF3, 0x1C, 0x4A, 0x30, 0xF0, 0x20, 0x6B,
+0x20, 0xF5, 0x68, 0x9B, 0x80, 0xF0, 0x8C, 0x9A,
+0x8C, 0xEB, 0x09, 0x23, 0x30, 0xF0, 0x20, 0x6B,
+0x60, 0xF7, 0x74, 0x9B, 0x8C, 0xEB, 0x80, 0xF0,
+0x6C, 0xDA, 0x00, 0x18, 0x11, 0x1D, 0x00, 0x18,
+0x63, 0x0B, 0x00, 0x18, 0x64, 0x0B, 0x30, 0xF0,
+0x20, 0x6A, 0xC1, 0xF3, 0x1C, 0x4A, 0x80, 0xF0,
+0x8C, 0x9A, 0x08, 0x6B, 0x8C, 0xEB, 0x07, 0x23,
+0x09, 0x6B, 0x6B, 0xEB, 0x8C, 0xEB, 0x80, 0xF0,
+0x6C, 0xDA, 0x00, 0x18, 0xB2, 0x22, 0x00, 0x18,
+0x63, 0x0B, 0x30, 0xF0, 0x20, 0x6B, 0xFF, 0x6A,
+0x01, 0x48, 0x80, 0xF4, 0x68, 0x9B, 0x4C, 0xE8,
+0x10, 0xF0, 0x21, 0x6A, 0x53, 0xF5, 0x0A, 0x4A,
+0x40, 0xDB, 0xB2, 0x17, 0x00, 0x6A, 0x64, 0x67,
 0x66, 0xEA, 0x01, 0x6D, 0xAC, 0xEB, 0x04, 0x2B,
 0x01, 0x4A, 0x20, 0x72, 0xF8, 0x61, 0x20, 0x6A,
 0x20, 0xE8, 0x00, 0x65, 0xFC, 0x63, 0x07, 0x62,
 0x06, 0xD1, 0x05, 0xD0, 0x30, 0xF0, 0x20, 0x6A,
-0x60, 0xF6, 0x44, 0x9A, 0x25, 0x67, 0x49, 0xE4,
-0x00, 0x9A, 0x85, 0x67, 0x00, 0x18, 0x79, 0x22,
+0x00, 0xF7, 0x58, 0x9A, 0x25, 0x67, 0x49, 0xE4,
+0x00, 0x9A, 0x85, 0x67, 0x00, 0x18, 0x7B, 0x27,
 0x2C, 0xE8, 0x06, 0xEA, 0x50, 0x67, 0x07, 0x97,
 0x06, 0x91, 0x05, 0x90, 0x04, 0x63, 0x00, 0xEF,
 0xFB, 0x63, 0x09, 0x62, 0x08, 0xD1, 0x07, 0xD0,
 0x41, 0x45, 0x05, 0x67, 0x0C, 0xD6, 0x13, 0x22,
-0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF6, 0x24, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF7, 0x38, 0x9A,
 0x0F, 0xE8, 0x25, 0xE4, 0x40, 0x99, 0x85, 0x67,
-0x04, 0xD2, 0x00, 0x18, 0x79, 0x22, 0x0C, 0x93,
+0x04, 0xD2, 0x00, 0x18, 0x7B, 0x27, 0x0C, 0x93,
 0x64, 0xEA, 0x43, 0x67, 0x04, 0x93, 0x6C, 0xE8,
 0x0D, 0xEA, 0x40, 0xD9, 0x07, 0x10, 0x30, 0xF0,
-0x20, 0x6A, 0x60, 0xF6, 0x24, 0x9A, 0x0C, 0x92,
+0x20, 0x6A, 0x00, 0xF7, 0x38, 0x9A, 0x0C, 0x92,
 0x31, 0xE4, 0x40, 0xDC, 0x09, 0x97, 0x08, 0x91,
 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0x41, 0x45, 0x0C, 0x22, 0x30, 0xF0, 0x20, 0x6A,
-0x60, 0xF6, 0x44, 0x9A, 0xAF, 0xEB, 0xCC, 0xED,
+0x00, 0xF7, 0x58, 0x9A, 0xAF, 0xEB, 0xCC, 0xED,
 0x51, 0xE4, 0x40, 0x9C, 0x6C, 0xEA, 0xAD, 0xEA,
 0x40, 0xDC, 0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6A,
-0x60, 0xF6, 0x44, 0x9A, 0x51, 0xE4, 0xC0, 0xDC,
+0x00, 0xF7, 0x58, 0x9A, 0x51, 0xE4, 0xC0, 0xDC,
 0x20, 0xE8, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6B,
-0xA0, 0xF7, 0x68, 0x9B, 0xFF, 0x6A, 0xAC, 0xEA,
+0xE0, 0xF5, 0x7C, 0x9B, 0xFF, 0x6A, 0xAC, 0xEA,
 0x6D, 0xE4, 0x49, 0xE6, 0x04, 0x10, 0x80, 0xA3,
 0x01, 0x4B, 0x80, 0xC6, 0x01, 0x4E, 0x4A, 0xEE,
 0xFA, 0x61, 0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6B,
-0xA0, 0xF7, 0x68, 0x9B, 0xFF, 0x6A, 0xAC, 0xEA,
+0xE0, 0xF5, 0x7C, 0x9B, 0xFF, 0x6A, 0xAC, 0xEA,
 0x6D, 0xE4, 0x49, 0xE6, 0x04, 0x10, 0x80, 0xA6,
 0x01, 0x4E, 0x80, 0xC3, 0x01, 0x4B, 0x4A, 0xEE,
 0xFA, 0x61, 0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6A,
-0x01, 0xF0, 0x54, 0x9A, 0x30, 0xF0, 0x20, 0x6B,
-0x01, 0xF0, 0x78, 0x9B, 0x40, 0x9A, 0x6C, 0xEA,
+0xC0, 0xF6, 0x50, 0x9A, 0x30, 0xF0, 0x20, 0x6B,
+0xC0, 0xF6, 0x74, 0x9B, 0x40, 0x9A, 0x6C, 0xEA,
 0x83, 0xEA, 0x02, 0x60, 0x4F, 0xEA, 0x51, 0xE4,
-0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF0, 0x48, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF7, 0x58, 0x9A,
 0xFF, 0x6B, 0x51, 0xE4, 0x40, 0xA4, 0x6C, 0xEA,
 0x20, 0xE8, 0x00, 0x65, 0xFA, 0x63, 0x0B, 0x62,
 0x0A, 0xD1, 0x09, 0xD0, 0xFF, 0x6A, 0xFF, 0xF7,
 0x1F, 0x6B, 0x4C, 0xED, 0x4C, 0xEE, 0x24, 0x67,
 0x6C, 0xEF, 0x10, 0x90, 0x6C, 0xE9, 0x05, 0xD5,
 0x06, 0xD6, 0x04, 0xD7, 0x00, 0x6A, 0x05, 0x10,
-0x0A, 0x6C, 0x00, 0x18, 0x67, 0x23, 0x40, 0xA8,
+0x0A, 0x6C, 0x00, 0x18, 0x51, 0x28, 0x40, 0xA8,
 0x01, 0x4A, 0x40, 0xC8, 0x1F, 0xF7, 0x00, 0x6A,
 0x2C, 0xEA, 0x02, 0xF0, 0x00, 0x72, 0x01, 0x60,
-0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF6,
-0x40, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0x60, 0xF6, 0x44, 0x9A, 0x49, 0xE1, 0x60, 0xA2,
+0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF7,
+0x54, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
+0x00, 0xF7, 0x58, 0x9A, 0x49, 0xE1, 0x60, 0xA2,
 0xFF, 0x6A, 0x6C, 0xEA, 0x05, 0x93, 0x6C, 0xEA,
 0x06, 0x93, 0x6E, 0xEA, 0x04, 0x22, 0x40, 0xA8,
 0x04, 0x93, 0x63, 0xEA, 0xDD, 0x61, 0x40, 0xA8,
 0x04, 0x93, 0x0B, 0x97, 0x0A, 0x91, 0x09, 0x90,
 0x63, 0xEA, 0x58, 0x67, 0x06, 0x63, 0x00, 0xEF,
-0xFD, 0x63, 0x05, 0x62, 0x00, 0x18, 0xF7, 0x35,
-0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0xFD, 0x63, 0x05, 0x62, 0x00, 0x18, 0xF1, 0x35,
-0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0xFD, 0x63, 0x05, 0x62, 0x00, 0x18, 0xDD, 0x35,
-0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0xFD, 0x63, 0x05, 0x62, 0x00, 0x18, 0xD4, 0x35,
-0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0xFD, 0x63, 0x05, 0x62, 0x00, 0x18, 0xC4, 0x35,
-0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0xFD, 0x63, 0x05, 0x62, 0x00, 0x18, 0xBE, 0x35,
-0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0x03, 0x6F, 0x8C, 0xEF, 0x64, 0x67, 0x46, 0x67,
 0x04, 0x27, 0x0B, 0x10, 0xA0, 0xDB, 0xFC, 0x4A,
 0x04, 0x4B, 0x04, 0x5A, 0xFB, 0x60, 0x03, 0x6A,
@@ -29466,702 +31674,909 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0xC0, 0xA6, 0x01, 0x4B, 0xEE, 0xEE, 0x02, 0x2E,
 0xFF, 0x4A, 0xF7, 0x2A, 0x20, 0xE8, 0x00, 0x65,
 0x06, 0x2C, 0x64, 0x6B, 0x30, 0xF0, 0x20, 0x6A,
-0x61, 0xF4, 0x64, 0xDA, 0x04, 0x10, 0x30, 0xF0,
-0x20, 0x6A, 0x61, 0xF4, 0x84, 0xDA, 0x30, 0xF0,
-0x20, 0x6A, 0x61, 0xF4, 0x44, 0x9A, 0x28, 0x72,
+0xC1, 0xF3, 0x64, 0xDA, 0x04, 0x10, 0x30, 0xF0,
+0x20, 0x6A, 0xC1, 0xF3, 0x84, 0xDA, 0x30, 0xF0,
+0x20, 0x6A, 0xC1, 0xF3, 0x44, 0x9A, 0x28, 0x72,
 0x2D, 0x60, 0x29, 0x5A, 0x07, 0x60, 0x14, 0x72,
 0x19, 0x60, 0x19, 0x72, 0x1F, 0x60, 0x0A, 0x72,
 0x0D, 0x60, 0x20, 0xE8, 0x50, 0x72, 0x32, 0x60,
 0x51, 0x5A, 0x03, 0x60, 0x32, 0x72, 0x26, 0x60,
 0x20, 0xE8, 0x64, 0x72, 0x33, 0x60, 0xC8, 0x72,
 0x39, 0x60, 0x20, 0xE8, 0x02, 0x6B, 0x30, 0xF0,
-0x20, 0x6A, 0x61, 0xF4, 0x68, 0xDA, 0xE0, 0xF7,
+0x20, 0x6A, 0xC1, 0xF3, 0x68, 0xDA, 0xE0, 0xF7,
 0x1E, 0x4B, 0x39, 0x10, 0x03, 0x6B, 0x30, 0xF0,
-0x20, 0x6A, 0x61, 0xF4, 0x68, 0xDA, 0xE1, 0xF3,
+0x20, 0x6A, 0xC1, 0xF3, 0x68, 0xDA, 0xE1, 0xF3,
 0x1D, 0x4B, 0x31, 0x10, 0x09, 0x6B, 0x30, 0xF0,
-0x20, 0x6A, 0x61, 0xF4, 0x68, 0xDA, 0xE4, 0xF3,
+0x20, 0x6A, 0xC1, 0xF3, 0x68, 0xDA, 0xE4, 0xF3,
 0x17, 0x4B, 0x29, 0x10, 0x05, 0x6B, 0x30, 0xF0,
-0x20, 0x6A, 0x61, 0xF4, 0x68, 0xDA, 0xE2, 0xF3,
+0x20, 0x6A, 0xC1, 0xF3, 0x68, 0xDA, 0xE2, 0xF3,
 0x1B, 0x4B, 0x21, 0x10, 0x11, 0x6B, 0x30, 0xF0,
-0x20, 0x6A, 0x61, 0xF4, 0x68, 0xDA, 0xE8, 0xF3,
+0x20, 0x6A, 0xC1, 0xF3, 0x68, 0xDA, 0xE8, 0xF3,
 0x0F, 0x4B, 0x19, 0x10, 0x0A, 0x6B, 0x30, 0xF0,
-0x20, 0x6A, 0x61, 0xF4, 0x68, 0xDA, 0xE4, 0xF7,
+0x20, 0x6A, 0xC1, 0xF3, 0x68, 0xDA, 0xE4, 0xF7,
 0x16, 0x4B, 0x11, 0x10, 0x22, 0x6B, 0x30, 0xF0,
-0x20, 0x6A, 0x61, 0xF4, 0x68, 0xDA, 0x11, 0xF0,
+0x20, 0x6A, 0xC1, 0xF3, 0x68, 0xDA, 0x11, 0xF0,
 0x00, 0x6B, 0x09, 0x10, 0x43, 0x6B, 0x30, 0xF0,
-0x20, 0x6A, 0x61, 0xF4, 0x68, 0xDA, 0x30, 0xF0,
-0x20, 0x6A, 0xA1, 0xF0, 0x6C, 0x9A, 0x30, 0xF0,
-0x20, 0x6A, 0x61, 0xF4, 0x6C, 0xDA, 0x20, 0xE8,
-0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF4, 0x44, 0x9A,
+0x20, 0x6A, 0xC1, 0xF3, 0x68, 0xDA, 0x30, 0xF0,
+0x20, 0x6A, 0x60, 0xF7, 0x7C, 0x9A, 0x30, 0xF0,
+0x20, 0x6A, 0xC1, 0xF3, 0x6C, 0xDA, 0x20, 0xE8,
+0x30, 0xF0, 0x20, 0x6A, 0xC1, 0xF3, 0x44, 0x9A,
 0x20, 0xE8, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6A,
-0x61, 0xF4, 0x4C, 0x9A, 0xFF, 0x63, 0x58, 0xEC,
+0xC1, 0xF3, 0x4C, 0x9A, 0xFF, 0x63, 0x58, 0xEC,
 0x12, 0xEA, 0x00, 0xD2, 0x00, 0x92, 0xFF, 0x4A,
 0x00, 0xD2, 0x00, 0x92, 0xFB, 0x2A, 0x01, 0x63,
 0x20, 0xE8, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6A,
-0x61, 0xF4, 0x48, 0x9A, 0xFF, 0x63, 0x58, 0xEC,
+0xC1, 0xF3, 0x48, 0x9A, 0xFF, 0x63, 0x58, 0xEC,
 0x12, 0xEA, 0x00, 0xD2, 0x00, 0x92, 0xFF, 0x4A,
 0x00, 0xD2, 0x00, 0x92, 0xFB, 0x2A, 0x01, 0x63,
 0x20, 0xE8, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x00, 0x18, 0x1F, 0x23, 0x05, 0x97, 0x03, 0x63,
+0x00, 0x18, 0x09, 0x28, 0x05, 0x97, 0x03, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0xFF, 0x6A, 0x4C, 0xED, 0x00, 0x18, 0x06, 0x23,
+0xFF, 0x6A, 0x4C, 0xED, 0x00, 0x18, 0xF0, 0x27,
 0x05, 0x97, 0x00, 0x6A, 0x03, 0x63, 0x00, 0xEF,
 0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0xFF, 0x6A,
-0x04, 0x67, 0x4C, 0xEE, 0x00, 0x18, 0x0B, 0x23,
+0x04, 0x67, 0x4C, 0xEE, 0x00, 0x18, 0xF5, 0x27,
 0x50, 0x67, 0x05, 0x97, 0x04, 0x90, 0x03, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0xFF, 0xF7, 0x1F, 0x6A,
-0x8C, 0xEA, 0x30, 0xF0, 0x20, 0x6B, 0x30, 0xF0,
-0x20, 0x6C, 0xA1, 0xF0, 0x68, 0x9B, 0x21, 0xF1,
-0x9C, 0x9C, 0x6D, 0xE5, 0x91, 0xE5, 0x00, 0x6E,
-0xC0, 0xDB, 0x04, 0x4B, 0x8A, 0xEB, 0xFB, 0x61,
-0xE7, 0xF7, 0x1F, 0x6B, 0x4C, 0xEB, 0x30, 0xF0,
-0x20, 0x6A, 0x40, 0xF6, 0x54, 0x9A, 0x10, 0x6C,
-0x4D, 0xEB, 0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF0,
-0x48, 0x9A, 0x49, 0xE5, 0x60, 0xDA, 0x30, 0xF0,
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+0x00, 0x74, 0xAC, 0xEB, 0x01, 0x60, 0x05, 0x2C,
+0x30, 0xF0, 0x20, 0x6C, 0x00, 0xF7, 0x94, 0x9C,
+0x04, 0x10, 0x30, 0xF0, 0x20, 0x6C, 0x00, 0xF7,
+0x98, 0x9C, 0x91, 0xE2, 0x00, 0x6D, 0xA0, 0xDC,
+0x30, 0xF0, 0x20, 0x6C, 0x80, 0xF7, 0x88, 0x9C,
+0xD4, 0x36, 0x40, 0xF6, 0x60, 0x33, 0x8C, 0xEE,
+0x6D, 0xEE, 0x30, 0xF0, 0x20, 0x6B, 0x81, 0xF0,
+0x70, 0x9B, 0x6D, 0xEE, 0x1F, 0xF7, 0x00, 0x6B,
+0x4C, 0xEB, 0x02, 0xF0, 0x00, 0x73, 0x01, 0x60,
+0x05, 0x2B, 0x30, 0xF0, 0x20, 0x6B, 0x00, 0xF7,
+0x74, 0x9B, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6B,
+0x00, 0xF7, 0x78, 0x9B, 0x69, 0xE2, 0xC0, 0xDA,
+0x20, 0xE8, 0x00, 0x65, 0x0F, 0xF5, 0x00, 0x6B,
+0x78, 0xEE, 0xFF, 0xF7, 0x1F, 0x6A, 0x8C, 0xEA,
+0x30, 0xF0, 0x20, 0x6C, 0x80, 0xF7, 0x88, 0x9C,
+0x40, 0xF6, 0xA0, 0x35, 0x12, 0xEB, 0x8C, 0xEB,
+0x30, 0xF0, 0x20, 0x6C, 0x81, 0xF0, 0x90, 0x9C,
+0xAD, 0xEB, 0x8D, 0xEB, 0x1F, 0xF7, 0x00, 0x6C,
+0x4C, 0xEC, 0x02, 0xF0, 0x00, 0x74, 0x01, 0x60,
+0x05, 0x2C, 0x30, 0xF0, 0x20, 0x6C, 0x00, 0xF7,
+0x94, 0x9C, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6C,
+0x00, 0xF7, 0x98, 0x9C, 0x89, 0xE2, 0x60, 0xDA,
+0x20, 0xE8, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6A,
+0x81, 0xF0, 0x5C, 0x9A, 0x40, 0x9A, 0x20, 0xE8,
+0xFF, 0x6A, 0x4C, 0xEC, 0x05, 0x5C, 0x4C, 0xED,
+0x00, 0x6A, 0x74, 0x60, 0x30, 0xF0, 0x20, 0x6A,
+0x88, 0x34, 0x80, 0xF3, 0x10, 0x4A, 0x89, 0xE2,
+0x40, 0x9A, 0x00, 0xEA, 0x05, 0x2D, 0x30, 0xF0,
+0x20, 0x6A, 0xE1, 0xF0, 0x50, 0x9A, 0x0A, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF0, 0x50, 0x9A,
+0x13, 0x10, 0x0E, 0x2D, 0x30, 0xF0, 0x20, 0x6A,
+0xE1, 0xF0, 0x54, 0x9A, 0x60, 0xA2, 0x01, 0x6A,
+0x4C, 0xEB, 0x57, 0x2B, 0x30, 0xF0, 0x20, 0x6B,
+0x00, 0xF5, 0x6C, 0x9B, 0x40, 0xC3, 0x36, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF0, 0x54, 0x9A,
+0x60, 0xA2, 0x02, 0x6A, 0x1D, 0x10, 0x07, 0x2D,
+0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF0, 0x54, 0x9A,
+0x60, 0xA2, 0x04, 0x6A, 0x1F, 0x10, 0x30, 0xF0,
+0x20, 0x6A, 0xE1, 0xF0, 0x54, 0x9A, 0x60, 0xA2,
+0x08, 0x6A, 0x0E, 0x10, 0x07, 0x2D, 0x30, 0xF0,
+0x20, 0x6A, 0xE1, 0xF0, 0x54, 0x9A, 0x60, 0xA2,
+0x10, 0x6A, 0x10, 0x10, 0x30, 0xF0, 0x20, 0x6A,
+0xE1, 0xF0, 0x54, 0x9A, 0x60, 0xA2, 0x20, 0x6A,
+0x6C, 0xEA, 0x2B, 0x2A, 0x1C, 0x10, 0x10, 0x2D,
+0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF0, 0x54, 0x9A,
+0x60, 0xA2, 0x40, 0x6A, 0x6C, 0xEA, 0x21, 0x2A,
+0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF5, 0x4C, 0x9A,
+0x01, 0x6B, 0x60, 0xC2, 0x02, 0x6B, 0x12, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF0, 0x54, 0x9A,
+0x40, 0xA2, 0x00, 0xF6, 0x40, 0x32, 0x00, 0xF6,
+0x43, 0x32, 0x00, 0x52, 0x0E, 0x61, 0x30, 0xF0,
+0x20, 0x6A, 0x00, 0xF5, 0x4C, 0x9A, 0x01, 0x6B,
+0x60, 0xC2, 0x04, 0x6B, 0x30, 0xF0, 0x20, 0x6A,
+0x00, 0xF5, 0x48, 0x9A, 0x60, 0xC2, 0x00, 0x6A,
+0x20, 0xE8, 0x01, 0x6A, 0x20, 0xE8, 0x00, 0x65,
+0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
+0xFF, 0x69, 0x8C, 0xE9, 0x00, 0x68, 0xFF, 0x6A,
+0x0C, 0xEA, 0x2E, 0xEA, 0x10, 0x2A, 0x91, 0x67,
+0x00, 0x18, 0xA9, 0x37, 0x91, 0x67, 0x00, 0x18,
+0x98, 0x37, 0x91, 0x67, 0x00, 0x18, 0xB0, 0x37,
+0x91, 0x67, 0x00, 0x18, 0x7A, 0x37, 0x91, 0x67,
+0x00, 0x18, 0x70, 0x37, 0x0F, 0x10, 0x90, 0x67,
+0x00, 0x18, 0xC8, 0x37, 0x90, 0x67, 0x00, 0x18,
+0xB7, 0x37, 0x90, 0x67, 0x00, 0x18, 0xCF, 0x37,
+0x90, 0x67, 0x00, 0x18, 0x8E, 0x37, 0x90, 0x67,
+0x00, 0x18, 0x84, 0x37, 0x01, 0x48, 0x05, 0x70,
+0xDA, 0x61, 0x07, 0x97, 0x06, 0x91, 0x05, 0x90,
+0x04, 0x63, 0x00, 0xEF, 0xF9, 0x63, 0x0D, 0x62,
 0x0C, 0xD1, 0x0B, 0xD0, 0xFF, 0xF7, 0x1F, 0x69,
 0x04, 0x00, 0xFF, 0x6A, 0xFF, 0x6B, 0xCC, 0xEB,
 0xAC, 0xEA, 0x8C, 0xE9, 0x00, 0x6D, 0x90, 0x67,
 0x04, 0x6E, 0x11, 0xD7, 0x08, 0xD3, 0x09, 0xD2,
-0x00, 0x18, 0x73, 0x23, 0x05, 0x04, 0x00, 0x6D,
-0x04, 0x6E, 0x00, 0x18, 0x73, 0x23, 0x11, 0x95,
-0x90, 0x67, 0x04, 0x6E, 0x00, 0x18, 0x78, 0x23,
+0x00, 0x18, 0x5D, 0x28, 0x05, 0x04, 0x00, 0x6D,
+0x04, 0x6E, 0x00, 0x18, 0x5D, 0x28, 0x11, 0x95,
+0x90, 0x67, 0x04, 0x6E, 0x00, 0x18, 0x62, 0x28,
 0x12, 0x95, 0x06, 0x04, 0x04, 0x6E, 0x00, 0x18,
-0x78, 0x23, 0x00, 0xF1, 0x00, 0x59, 0x3D, 0x60,
+0x62, 0x28, 0x00, 0xF1, 0x00, 0x59, 0x3D, 0x60,
 0x09, 0x92, 0x04, 0x72, 0x12, 0x61, 0x30, 0xF0,
-0x20, 0x6A, 0x60, 0xF6, 0x40, 0x9A, 0x49, 0xE1,
+0x20, 0x6A, 0x00, 0xF7, 0x54, 0x9A, 0x49, 0xE1,
 0x60, 0xA2, 0xFF, 0x6A, 0x4C, 0xEB, 0x08, 0x92,
 0x5E, 0x22, 0x06, 0x94, 0x8F, 0xEA, 0x6C, 0xEA,
 0x04, 0x93, 0x8C, 0xEB, 0x6D, 0xEA, 0x04, 0xD2,
 0x56, 0x10, 0x09, 0x92, 0x05, 0x72, 0x14, 0x61,
-0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF6, 0x40, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF7, 0x54, 0x9A,
 0x49, 0xE1, 0x60, 0xAA, 0xFF, 0xF7, 0x1F, 0x6A,
 0x4C, 0xEB, 0x08, 0x92, 0x80, 0xF0, 0x01, 0x22,
 0x06, 0x94, 0x8F, 0xEA, 0x6C, 0xEA, 0x04, 0x93,
 0x8C, 0xEB, 0x6D, 0xEA, 0x04, 0xD2, 0x79, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF6, 0x40, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF7, 0x54, 0x9A,
 0x49, 0xE1, 0x60, 0x9A, 0x08, 0x92, 0xA0, 0xF0,
 0x00, 0x22, 0x06, 0x94, 0x8F, 0xEA, 0x6C, 0xEA,
 0x04, 0x93, 0x8C, 0xEB, 0x6D, 0xEA, 0x04, 0xD2,
@@ -30169,328 +32584,344 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x01, 0x60, 0x09, 0x93, 0x04, 0x73, 0x35, 0x61,
 0x1F, 0xF7, 0x00, 0x6A, 0x2C, 0xEA, 0x02, 0xF0,
 0x00, 0x72, 0x01, 0x60, 0x08, 0x2A, 0x30, 0xF0,
-0x20, 0x6A, 0x60, 0xF6, 0x40, 0x9A, 0xFF, 0x6B,
+0x20, 0x6A, 0x00, 0xF7, 0x54, 0x9A, 0xFF, 0x6B,
 0x49, 0xE1, 0x40, 0xA2, 0x07, 0x10, 0x30, 0xF0,
-0x20, 0x6A, 0x60, 0xF6, 0x44, 0x9A, 0x49, 0xE1,
+0x20, 0x6A, 0x00, 0xF7, 0x58, 0x9A, 0x49, 0xE1,
 0x60, 0xA2, 0xFF, 0x6A, 0x4C, 0xEB, 0x08, 0x92,
 0x07, 0x22, 0x06, 0x94, 0x8F, 0xEA, 0x6C, 0xEA,
 0x04, 0x93, 0x8C, 0xEB, 0x6D, 0xEA, 0x04, 0xD2,
 0x1F, 0xF7, 0x00, 0x6A, 0x2C, 0xEA, 0x02, 0xF0,
 0x00, 0x72, 0x01, 0x60, 0x05, 0x2A, 0x30, 0xF0,
-0x20, 0x6A, 0x60, 0xF6, 0x40, 0x9A, 0x04, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF6, 0x44, 0x9A,
+0x20, 0x6A, 0x00, 0xF7, 0x54, 0x9A, 0x04, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF7, 0x58, 0x9A,
 0x7D, 0x67, 0x45, 0xE1, 0x50, 0xA3, 0x40, 0xC1,
 0x81, 0x10, 0x09, 0x92, 0x05, 0x72, 0x37, 0x61,
 0x1F, 0xF7, 0x00, 0x6A, 0x2C, 0xEA, 0x02, 0xF0,
 0x00, 0x72, 0x01, 0x60, 0x09, 0x2A, 0x30, 0xF0,
-0x20, 0x6A, 0x60, 0xF6, 0x40, 0x9A, 0xFF, 0xF7,
+0x20, 0x6A, 0x00, 0xF7, 0x54, 0x9A, 0xFF, 0xF7,
 0x1F, 0x6B, 0x49, 0xE1, 0x40, 0xAA, 0x08, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF6, 0x44, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF7, 0x58, 0x9A,
 0x49, 0xE1, 0x60, 0xAA, 0xFF, 0xF7, 0x1F, 0x6A,
 0x4C, 0xEB, 0x08, 0x92, 0x07, 0x22, 0x06, 0x94,
 0x8F, 0xEA, 0x6C, 0xEA, 0x04, 0x93, 0x8C, 0xEB,
 0x6D, 0xEA, 0x04, 0xD2, 0x1F, 0xF7, 0x00, 0x6A,
 0x2C, 0xEA, 0x02, 0xF0, 0x00, 0x72, 0x01, 0x60,
-0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF6,
-0x40, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0x60, 0xF6, 0x44, 0x9A, 0x7D, 0x67, 0x45, 0xE1,
+0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF7,
+0x54, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
+0x00, 0xF7, 0x58, 0x9A, 0x7D, 0x67, 0x45, 0xE1,
 0x48, 0xAB, 0x40, 0xC9, 0x47, 0x10, 0x1F, 0xF7,
 0x00, 0x6A, 0x2C, 0xEA, 0x02, 0xF0, 0x00, 0x72,
 0x01, 0x60, 0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A,
-0x60, 0xF6, 0x40, 0x9A, 0x04, 0x10, 0x30, 0xF0,
-0x20, 0x6A, 0x60, 0xF6, 0x44, 0x9A, 0x49, 0xE1,
+0x00, 0xF7, 0x54, 0x9A, 0x04, 0x10, 0x30, 0xF0,
+0x20, 0x6A, 0x00, 0xF7, 0x58, 0x9A, 0x49, 0xE1,
 0x60, 0x9A, 0x08, 0x92, 0x07, 0x22, 0x06, 0x94,
 0x8F, 0xEA, 0x6C, 0xEA, 0x04, 0x93, 0x8C, 0xEB,
 0x6D, 0xEA, 0x04, 0xD2, 0x1F, 0xF7, 0x00, 0x6A,
 0x2C, 0xEA, 0x02, 0xF0, 0x00, 0x72, 0x01, 0x60,
-0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF6,
-0x40, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0x60, 0xF6, 0x44, 0x9A, 0x45, 0xE1, 0x04, 0x92,
+0x05, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF7,
+0x54, 0x9A, 0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A,
+0x00, 0xF7, 0x58, 0x9A, 0x45, 0xE1, 0x04, 0x92,
 0x40, 0xD9, 0x18, 0x10, 0xFF, 0xF7, 0x1C, 0x68,
 0x2C, 0xE8, 0x01, 0x6D, 0x90, 0x67, 0xAB, 0xED,
-0x00, 0x18, 0x81, 0x2B, 0x08, 0x93, 0x05, 0xD2,
+0x00, 0x18, 0x41, 0x32, 0x08, 0x93, 0x05, 0xD2,
 0x07, 0x23, 0x06, 0x94, 0x8F, 0xEB, 0x4C, 0xEB,
 0x04, 0x92, 0x8C, 0xEA, 0x4D, 0xEB, 0x04, 0xD3,
 0x04, 0x96, 0x01, 0x6D, 0x90, 0x67, 0xAB, 0xED,
-0x00, 0x18, 0x8F, 0x2B, 0x0D, 0x97, 0x0C, 0x91,
+0x00, 0x18, 0x4F, 0x32, 0x0D, 0x97, 0x0C, 0x91,
 0x0B, 0x90, 0x07, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFA, 0x63, 0x0B, 0x62, 0x0A, 0xD1, 0x09, 0xD0,
 0xA1, 0x9C, 0x61, 0xAC, 0xC1, 0xA4, 0x06, 0xD5,
 0x42, 0x9C, 0x07, 0xD2, 0x30, 0xF0, 0x20, 0x6A,
-0x81, 0xF4, 0x0C, 0x4A, 0xC5, 0xF7, 0xF4, 0x9A,
-0xFD, 0xE3, 0xC5, 0xF7, 0xF4, 0xDA, 0xC5, 0xF7,
-0xF8, 0x9A, 0xF5, 0xE5, 0xC5, 0xF7, 0xB8, 0xDA,
+0xC1, 0xF3, 0x1C, 0x4A, 0xE5, 0xF7, 0xE8, 0x9A,
+0xFD, 0xE3, 0xE5, 0xF7, 0xE8, 0xDA, 0xE5, 0xF7,
+0xEC, 0x9A, 0xF5, 0xE5, 0xE5, 0xF7, 0xAC, 0xDA,
 0x41, 0xA4, 0xFF, 0x72, 0x00, 0x6A, 0x32, 0x60,
 0x7F, 0x6D, 0xCC, 0xED, 0x4C, 0x45, 0xFF, 0x6C,
 0x8C, 0xEA, 0x0E, 0x5A, 0x08, 0x60, 0x30, 0xF0,
-0x20, 0x6C, 0x48, 0x32, 0x40, 0xF5, 0x1C, 0x4C,
+0x20, 0x6C, 0x48, 0x32, 0xA0, 0xF3, 0x04, 0x4C,
 0x51, 0xE4, 0x40, 0x9C, 0x00, 0xEA, 0x03, 0x6A,
 0x21, 0x10, 0x07, 0x02, 0x83, 0x67, 0x00, 0x6E,
-0x06, 0x07, 0x04, 0xD2, 0x00, 0x18, 0x6D, 0x28,
+0x06, 0x07, 0x04, 0xD2, 0x00, 0x18, 0xF5, 0x2E,
 0x18, 0x10, 0xFF, 0x68, 0x62, 0x31, 0x6C, 0xE8,
 0x01, 0x6E, 0x91, 0x67, 0xB0, 0x67, 0xCB, 0xEE,
-0x00, 0x18, 0x70, 0x2B, 0x06, 0x97, 0x01, 0x6E,
+0x00, 0x18, 0x18, 0x32, 0x06, 0x97, 0x01, 0x6E,
 0x91, 0x67, 0xB0, 0x67, 0xCB, 0xEE, 0x00, 0x18,
-0x85, 0x2C, 0x07, 0x10, 0x06, 0x94, 0x00, 0x18,
-0x67, 0x23, 0x03, 0x10, 0x06, 0x94, 0x00, 0x18,
-0x5F, 0x23, 0x01, 0x6A, 0x0B, 0x97, 0x0A, 0x91,
+0x27, 0x33, 0x07, 0x10, 0x06, 0x94, 0x00, 0x18,
+0x51, 0x28, 0x03, 0x10, 0x06, 0x94, 0x00, 0x18,
+0x49, 0x28, 0x01, 0x6A, 0x0B, 0x97, 0x0A, 0x91,
 0x09, 0x90, 0x06, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF2, 0x80, 0x9A,
-0x30, 0xF0, 0x20, 0x6B, 0x81, 0xF4, 0x0C, 0x4B,
+0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF0, 0x80, 0x9A,
+0x30, 0xF0, 0x20, 0x6B, 0xC1, 0xF3, 0x1C, 0x4B,
 0xA0, 0x9C, 0x4C, 0x9B, 0xAC, 0xEA, 0x4D, 0xDB,
 0x40, 0xDC, 0x20, 0xE8, 0xFD, 0x63, 0x05, 0xD1,
-0x04, 0xD0, 0x30, 0xF0, 0x20, 0x6A, 0xC1, 0xF1,
-0x28, 0x9A, 0x30, 0xF0, 0x20, 0x6A, 0xC0, 0xF7,
-0x1C, 0x4A, 0x40, 0x9A, 0x60, 0x99, 0x30, 0xF0,
+0x04, 0xD0, 0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF0,
+0x24, 0x9A, 0x30, 0xF0, 0x20, 0x6A, 0x20, 0xF6,
+0x10, 0x4A, 0x40, 0x9A, 0x60, 0x99, 0x30, 0xF0,
 0x20, 0x6C, 0xA0, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
-0xC1, 0xF1, 0x50, 0x9A, 0xC1, 0xF1, 0x18, 0x4C,
+0xA1, 0xF0, 0x50, 0x9A, 0xA1, 0xF0, 0x18, 0x4C,
 0x80, 0x9C, 0x00, 0x9A, 0x1A, 0x65, 0x30, 0xF0,
-0x20, 0x6A, 0x80, 0x9C, 0xE1, 0xF1, 0x00, 0x4A,
+0x20, 0x6A, 0x80, 0x9C, 0xC1, 0xF0, 0x00, 0x4A,
 0x40, 0x9A, 0x01, 0xD4, 0x30, 0xF0, 0x20, 0x6C,
-0x40, 0x9A, 0x81, 0xF4, 0xEC, 0x9C, 0x00, 0xD2,
-0x44, 0x67, 0x81, 0xF4, 0x0C, 0x4A, 0xC1, 0x9A,
+0x40, 0x9A, 0xC1, 0xF3, 0xFC, 0x9C, 0x00, 0xD2,
+0x44, 0x67, 0xC1, 0xF3, 0x1C, 0x4A, 0xC1, 0x9A,
 0x83, 0x9A, 0x6C, 0xEF, 0xAC, 0xEE, 0x01, 0x93,
 0xA2, 0x9A, 0xE5, 0xDA, 0x6C, 0xEC, 0x0C, 0xED,
 0x64, 0x9A, 0x00, 0x90, 0x88, 0xDA, 0xC6, 0xDA,
 0x0C, 0xEB, 0xA7, 0xDA, 0x69, 0xDA, 0x30, 0xF0,
-0x20, 0x6A, 0xC0, 0xF7, 0x1C, 0x4A, 0x40, 0x9A,
+0x20, 0x6A, 0x20, 0xF6, 0x10, 0x4A, 0x40, 0x9A,
 0xE0, 0xD9, 0x18, 0x67, 0xC0, 0xDA, 0x30, 0xF0,
-0x20, 0x6A, 0xC1, 0xF1, 0x18, 0x4A, 0x40, 0x9A,
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 0x07, 0xEE, 0xD0, 0x67, 0x4C, 0xEF, 0x04, 0xED,
 0x4C, 0xEC, 0xCC, 0xEF, 0x0F, 0xE8, 0x8C, 0xE8,
 0xE4, 0xED, 0xED, 0xE8, 0x4C, 0xE8, 0x00, 0xC3,
 0x01, 0x90, 0x01, 0x63, 0x20, 0xE8, 0x00, 0x65,
-0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF7, 0x48, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0xE0, 0xF5, 0x5C, 0x9A,
 0xFF, 0xF7, 0x1F, 0x6B, 0x8C, 0xEB, 0x4D, 0xE3,
 0x40, 0xA3, 0xFF, 0x6C, 0x8C, 0xEE, 0x08, 0x6B,
 0xDB, 0xE3, 0x8C, 0xED, 0x8C, 0xEA, 0x64, 0x67,
@@ -30498,20 +32929,20 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x20, 0xE8, 0x00, 0x65, 0x01, 0x74, 0x0D, 0x60,
 0x06, 0x24, 0x02, 0x74, 0x10, 0x60, 0x03, 0x74,
 0x00, 0x6A, 0x1C, 0x61, 0x14, 0x10, 0x30, 0xF0,
-0x20, 0x6A, 0xA8, 0x35, 0x21, 0xF2, 0x54, 0x9A,
+0x20, 0x6A, 0xA8, 0x35, 0x01, 0xF1, 0x54, 0x9A,
 0x0B, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0xA8, 0x35,
-0x21, 0xF2, 0x58, 0x9A, 0x05, 0x10, 0x30, 0xF0,
-0x20, 0x6A, 0x21, 0xF2, 0x5C, 0x9A, 0xA8, 0x35,
+0x01, 0xF1, 0x58, 0x9A, 0x05, 0x10, 0x30, 0xF0,
+0x20, 0x6A, 0x01, 0xF1, 0x5C, 0x9A, 0xA8, 0x35,
 0x55, 0xE5, 0x40, 0x9D, 0x20, 0xE8, 0x30, 0xF0,
-0x20, 0x6A, 0x41, 0xF2, 0x40, 0x9A, 0xA8, 0x35,
+0x20, 0x6A, 0x21, 0xF1, 0x40, 0x9A, 0xA8, 0x35,
 0x55, 0xE5, 0x40, 0x9D, 0x20, 0xE8, 0x00, 0x65,
-0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF4, 0x0C, 0x4A,
-0x81, 0xF4, 0x10, 0x6B, 0xA2, 0xF5, 0x6C, 0xDA,
-0x00, 0xF2, 0x00, 0x4B, 0xA2, 0xF5, 0x70, 0xDA,
-0x01, 0xF2, 0x00, 0x4B, 0xA2, 0xF5, 0x74, 0xDA,
-0x00, 0xF2, 0x00, 0x4B, 0xA2, 0xF5, 0x78, 0xDA,
+0x30, 0xF0, 0x20, 0x6A, 0xC1, 0xF3, 0x1C, 0x4A,
+0x81, 0xF4, 0x10, 0x6B, 0xC2, 0xF5, 0x60, 0xDA,
+0x00, 0xF2, 0x00, 0x4B, 0xC2, 0xF5, 0x64, 0xDA,
+0x01, 0xF2, 0x00, 0x4B, 0xC2, 0xF5, 0x68, 0xDA,
+0x00, 0xF2, 0x00, 0x4B, 0xC2, 0xF5, 0x6C, 0xDA,
 0x20, 0xE8, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6A,
-0x41, 0xF2, 0x44, 0x9A, 0xFF, 0x6B, 0x40, 0xA2,
+0x21, 0xF1, 0x44, 0x9A, 0xFF, 0x6B, 0x40, 0xA2,
 0x6C, 0xEA, 0x5E, 0x32, 0x6C, 0xEA, 0x20, 0xE8,
 0xFF, 0x6B, 0x6C, 0xEC, 0x1F, 0x6D, 0x8C, 0xED,
 0x96, 0x34, 0x6C, 0xEC, 0x01, 0x74, 0x03, 0x6A,
@@ -30529,181 +32960,178 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
 0xFF, 0x6B, 0x8C, 0xEB, 0xFF, 0xF7, 0x1F, 0x6A,
 0x81, 0x46, 0x26, 0x67, 0xAC, 0xEA, 0x06, 0x2C,
-0x83, 0x67, 0xA2, 0x67, 0x00, 0x18, 0x33, 0x2B,
+0x83, 0x67, 0xA2, 0x67, 0x00, 0x18, 0xDB, 0x31,
 0x02, 0x67, 0x0A, 0x10, 0x83, 0x67, 0xA2, 0x67,
-0x00, 0x18, 0x33, 0x2B, 0x02, 0x67, 0x91, 0x67,
-0x00, 0x18, 0x79, 0x22, 0x2C, 0xE8, 0x06, 0xEA,
+0x00, 0x18, 0xDB, 0x31, 0x02, 0x67, 0x91, 0x67,
+0x00, 0x18, 0x7B, 0x27, 0x2C, 0xE8, 0x06, 0xEA,
 0x50, 0x67, 0x07, 0x97, 0x06, 0x91, 0x05, 0x90,
-0x04, 0x63, 0x00, 0xEF, 0xFC, 0x63, 0x07, 0x62,
+0x04, 0x63, 0x00, 0xEF, 0xFB, 0x63, 0x09, 0x62,
+0x08, 0xD1, 0x07, 0xD0, 0xFF, 0x6A, 0x8C, 0xEA,
+0x0E, 0x91, 0x04, 0xD2, 0xFF, 0xF7, 0x1F, 0x6A,
+0x4C, 0xED, 0x4C, 0xE9, 0x0C, 0xD6, 0x0D, 0xD7,
+0x0F, 0x90, 0x05, 0xD5, 0x00, 0x6A, 0x05, 0x10,
+0x0A, 0x6C, 0x00, 0x18, 0x51, 0x28, 0x40, 0xA8,
+0x01, 0x4A, 0x40, 0xC8, 0x30, 0xF0, 0x20, 0x6A,
+0x04, 0x94, 0x05, 0x95, 0x80, 0xF7, 0xC4, 0x9A,
+0x00, 0x18, 0x18, 0x32, 0x0C, 0x93, 0x6C, 0xEA,
+0x0D, 0x93, 0x6E, 0xEA, 0x03, 0x22, 0x40, 0xA8,
+0x23, 0xEA, 0xEA, 0x61, 0x40, 0xA8, 0x09, 0x97,
+0x07, 0x90, 0x23, 0xEA, 0x08, 0x91, 0x58, 0x67,
+0x05, 0x63, 0x00, 0xEF, 0xFC, 0x63, 0x07, 0x62,
 0x06, 0xD1, 0x05, 0xD0, 0x30, 0xF0, 0x20, 0x6B,
-0x60, 0xF6, 0x64, 0x9B, 0xFF, 0xF7, 0x1F, 0x6A,
+0x00, 0xF7, 0x78, 0x9B, 0xFF, 0xF7, 0x1F, 0x6A,
 0x8C, 0xEA, 0x69, 0xE2, 0x00, 0x9A, 0x41, 0x45,
 0x25, 0x67, 0x05, 0x22, 0x85, 0x67, 0x00, 0x18,
-0x79, 0x22, 0x2C, 0xE8, 0x06, 0xEA, 0x50, 0x67,
+0x7B, 0x27, 0x2C, 0xE8, 0x06, 0xEA, 0x50, 0x67,
 0x07, 0x97, 0x06, 0x91, 0x05, 0x90, 0x04, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0xFB, 0x63, 0x09, 0x62,
 0x08, 0xD1, 0x07, 0xD0, 0xFF, 0xF7, 0x1F, 0x68,
 0x41, 0x45, 0x25, 0x67, 0x0C, 0xD6, 0x8C, 0xE8,
-0x07, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF6,
-0x44, 0x9A, 0x41, 0xE0, 0xC0, 0xD8, 0x17, 0x10,
+0x07, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF7,
+0x58, 0x9A, 0x41, 0xE0, 0xC0, 0xD8, 0x17, 0x10,
 0x01, 0x6D, 0x90, 0x67, 0xAB, 0xED, 0x00, 0x18,
-0x81, 0x2B, 0x91, 0x67, 0x04, 0xD2, 0x00, 0x18,
-0x79, 0x22, 0x0C, 0x93, 0x64, 0xEA, 0x43, 0x67,
+0x41, 0x32, 0x91, 0x67, 0x04, 0xD2, 0x00, 0x18,
+0x7B, 0x27, 0x0C, 0x93, 0x64, 0xEA, 0x43, 0x67,
 0x04, 0x93, 0x2C, 0xEA, 0x2F, 0xE9, 0x6C, 0xE9,
-0x30, 0xF0, 0x20, 0x6B, 0x60, 0xF6, 0x64, 0x9B,
+0x30, 0xF0, 0x20, 0x6B, 0x00, 0xF7, 0x78, 0x9B,
 0x2D, 0xEA, 0x61, 0xE0, 0x40, 0xD8, 0x09, 0x97,
 0x08, 0x91, 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF,
 0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
 0xFF, 0x6A, 0x4C, 0xEC, 0xAC, 0xEA, 0x54, 0x2C,
 0x06, 0x5A, 0xE0, 0xF0, 0x1E, 0x60, 0x30, 0xF0,
-0x20, 0x6B, 0x48, 0x32, 0xA0, 0xF5, 0x1C, 0x4B,
+0x20, 0x6B, 0x48, 0x32, 0xC0, 0xF3, 0x1C, 0x4B,
 0x4D, 0xE3, 0x40, 0x9B, 0x00, 0xEA, 0x01, 0x68,
-0x30, 0xF0, 0x20, 0x6A, 0x0B, 0xE8, 0x41, 0xF2,
+0x30, 0xF0, 0x20, 0x6A, 0x0B, 0xE8, 0x21, 0xF1,
 0x28, 0x9A, 0x5A, 0x10, 0x01, 0x68, 0x30, 0xF0,
-0x20, 0x6A, 0x0B, 0xE8, 0x41, 0xF2, 0x30, 0x9A,
-0x99, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF2,
+0x20, 0x6A, 0x0B, 0xE8, 0x21, 0xF1, 0x30, 0x9A,
+0x99, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF1,
 0x28, 0x9A, 0x01, 0x68, 0x0B, 0xE8, 0xB0, 0x67,
 0xD1, 0x67, 0xA1, 0xF4, 0x10, 0x6C, 0x00, 0x18,
-0x8F, 0x2B, 0xB0, 0x67, 0xD1, 0x67, 0xA1, 0xF6,
-0x10, 0x6C, 0x00, 0x18, 0x8F, 0x2B, 0x30, 0xF0,
-0x20, 0x6A, 0x41, 0xF2, 0x0C, 0x9A, 0x30, 0xF0,
-0x20, 0x6A, 0xC0, 0xF6, 0x38, 0x9A, 0x6D, 0x10,
+0x4F, 0x32, 0xB0, 0x67, 0xD1, 0x67, 0xA1, 0xF6,
+0x10, 0x6C, 0x00, 0x18, 0x4F, 0x32, 0x30, 0xF0,
+0x20, 0x6A, 0x21, 0xF1, 0x0C, 0x9A, 0x30, 0xF0,
+0x20, 0x6A, 0x21, 0xF1, 0x34, 0x9A, 0x6D, 0x10,
 0xA1, 0xF4, 0x10, 0x6C, 0xFF, 0x6D, 0x77, 0x6E,
-0x00, 0x18, 0x8F, 0x2B, 0x30, 0xF0, 0x20, 0x6A,
-0x41, 0xF2, 0xC8, 0x9A, 0x01, 0x6D, 0xA1, 0xF6,
-0x10, 0x6C, 0xAB, 0xED, 0x00, 0x18, 0x8F, 0x2B,
-0x30, 0xF0, 0x20, 0x6A, 0x40, 0xF7, 0xA8, 0x9A,
+0x00, 0x18, 0x4F, 0x32, 0x30, 0xF0, 0x20, 0x6A,
+0x21, 0xF1, 0xC8, 0x9A, 0x01, 0x6D, 0xA1, 0xF6,
+0x10, 0x6C, 0xAB, 0xED, 0x00, 0x18, 0x4F, 0x32,
+0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF5, 0xA0, 0x9A,
 0xA1, 0xF4, 0x14, 0x6C, 0x00, 0x6E, 0x00, 0x18,
-0x8F, 0x2B, 0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF6,
-0x14, 0x6C, 0x41, 0xF2, 0xAC, 0x9A, 0x31, 0x10,
+0x4F, 0x32, 0x30, 0xF0, 0x20, 0x6A, 0xA1, 0xF6,
+0x14, 0x6C, 0x21, 0xF1, 0xAC, 0x9A, 0x31, 0x10,
 0x06, 0x5A, 0xA0, 0xF0, 0x0A, 0x60, 0x30, 0xF0,
-0x20, 0x6B, 0x48, 0x32, 0xC0, 0xF5, 0x14, 0x4B,
+0x20, 0x6B, 0x48, 0x32, 0xE0, 0xF3, 0x14, 0x4B,
 0x4D, 0xE3, 0x40, 0x9B, 0x00, 0xEA, 0x01, 0x68,
-0x30, 0xF0, 0x20, 0x6A, 0x0B, 0xE8, 0x41, 0xF2,
-0x34, 0x9A, 0x27, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0x41, 0xF2, 0x34, 0x9A, 0x01, 0x68, 0x0B, 0xE8,
+0x30, 0xF0, 0x20, 0x6A, 0x0B, 0xE8, 0x21, 0xF1,
+0x38, 0x9A, 0x27, 0x10, 0x30, 0xF0, 0x20, 0x6A,
+0x21, 0xF1, 0x38, 0x9A, 0x01, 0x68, 0x0B, 0xE8,
 0xB0, 0x67, 0xA1, 0xF4, 0x10, 0x6C, 0xD1, 0x67,
-0x00, 0x18, 0x8F, 0x2B, 0xB0, 0x67, 0xA1, 0xF6,
-0x10, 0x6C, 0xD1, 0x67, 0x00, 0x18, 0x8F, 0x2B,
-0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF2, 0x0C, 0x9A,
+0x00, 0x18, 0x4F, 0x32, 0xB0, 0x67, 0xA1, 0xF6,
+0x10, 0x6C, 0xD1, 0x67, 0x00, 0x18, 0x4F, 0x32,
+0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF1, 0x0C, 0x9A,
 0xA1, 0xF4, 0x14, 0x6C, 0x00, 0x6E, 0xB0, 0x67,
-0x00, 0x18, 0x8F, 0x2B, 0xA1, 0xF6, 0x14, 0x6C,
+0x00, 0x18, 0x4F, 0x32, 0xA1, 0xF6, 0x14, 0x6C,
 0xB0, 0x67, 0x00, 0x6E, 0x78, 0x10, 0x30, 0xF0,
-0x20, 0x6A, 0x41, 0xF2, 0x38, 0x9A, 0x01, 0x68,
+0x20, 0x6A, 0x21, 0xF1, 0x3C, 0x9A, 0x01, 0x68,
 0x0B, 0xE8, 0xB0, 0x67, 0xD1, 0x67, 0xA1, 0xF4,
-0x10, 0x6C, 0x00, 0x18, 0x8F, 0x2B, 0xB0, 0x67,
+0x10, 0x6C, 0x00, 0x18, 0x4F, 0x32, 0xB0, 0x67,
 0xD1, 0x67, 0xA1, 0xF6, 0x10, 0x6C, 0x00, 0x18,
-0x8F, 0x2B, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF2,
-0x0C, 0x9A, 0x30, 0xF0, 0x20, 0x6A, 0x40, 0xF7,
-0x28, 0x9A, 0xA1, 0xF4, 0x14, 0x6C, 0xB0, 0x67,
-0xD1, 0x67, 0x00, 0x18, 0x8F, 0x2B, 0xA1, 0xF6,
+0x4F, 0x32, 0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF1,
+0x0C, 0x9A, 0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF5,
+0x20, 0x9A, 0xA1, 0xF4, 0x14, 0x6C, 0xB0, 0x67,
+0xD1, 0x67, 0x00, 0x18, 0x4F, 0x32, 0xA1, 0xF6,
 0x14, 0x6C, 0xB0, 0x67, 0xD1, 0x67, 0x53, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF2, 0x3C, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1, 0x20, 0x9A,
 0x01, 0x68, 0x0B, 0xE8, 0xB0, 0x67, 0xD1, 0x67,
-0xA1, 0xF4, 0x10, 0x6C, 0x00, 0x18, 0x8F, 0x2B,
+0xA1, 0xF4, 0x10, 0x6C, 0x00, 0x18, 0x4F, 0x32,
 0xB0, 0x67, 0xD1, 0x67, 0xA1, 0xF6, 0x10, 0x6C,
-0x00, 0x18, 0x8F, 0x2B, 0x30, 0xF0, 0x20, 0x6A,
-0x41, 0xF2, 0x0C, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
-0x40, 0xF7, 0x28, 0x9A, 0xA1, 0xF4, 0x14, 0x6C,
-0xB0, 0x67, 0xD1, 0x67, 0x00, 0x18, 0x8F, 0x2B,
+0x00, 0x18, 0x4F, 0x32, 0x30, 0xF0, 0x20, 0x6A,
+0x21, 0xF1, 0x0C, 0x9A, 0x30, 0xF0, 0x20, 0x6A,
+0xA0, 0xF5, 0x20, 0x9A, 0xA1, 0xF4, 0x14, 0x6C,
+0xB0, 0x67, 0xD1, 0x67, 0x00, 0x18, 0x4F, 0x32,
 0xA1, 0xF6, 0x14, 0x6C, 0xB0, 0x67, 0xD1, 0x67,
-0x00, 0x18, 0x8F, 0x2B, 0x01, 0xF1, 0x00, 0x6C,
+0x00, 0x18, 0x4F, 0x32, 0x01, 0xF1, 0x00, 0x6C,
 0x00, 0xF3, 0x03, 0x6D, 0x01, 0x6E, 0x27, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF2, 0xA0, 0x9A,
-0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF2, 0xC4, 0x9A,
-0xA1, 0xF4, 0x10, 0x6C, 0x00, 0x18, 0x8F, 0x2B,
-0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF2, 0xD8, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1, 0xA4, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1, 0xC8, 0x9A,
+0xA1, 0xF4, 0x10, 0x6C, 0x00, 0x18, 0x4F, 0x32,
+0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF1, 0xDC, 0x9A,
 0x01, 0x6D, 0xA1, 0xF6, 0x10, 0x6C, 0xAB, 0xED,
-0x00, 0x18, 0x8F, 0x2B, 0x30, 0xF0, 0x20, 0x6A,
-0x40, 0xF7, 0x08, 0x9A, 0xA1, 0xF4, 0x14, 0x6C,
-0xB0, 0x67, 0xD0, 0x67, 0x00, 0x18, 0x8F, 0x2B,
-0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF2, 0xAC, 0x9A,
+0x00, 0x18, 0x4F, 0x32, 0x30, 0xF0, 0x20, 0x6A,
+0xA0, 0xF5, 0x00, 0x9A, 0xA1, 0xF4, 0x14, 0x6C,
+0xB0, 0x67, 0xD0, 0x67, 0x00, 0x18, 0x4F, 0x32,
+0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF1, 0xAC, 0x9A,
 0xA1, 0xF6, 0x14, 0x6C, 0xD0, 0x67, 0x00, 0x18,
-0x8F, 0x2B, 0x07, 0x97, 0x06, 0x91, 0x05, 0x90,
+0x4F, 0x32, 0x07, 0x97, 0x06, 0x91, 0x05, 0x90,
 0x04, 0x63, 0x00, 0xEF, 0xFB, 0x63, 0x09, 0x62,
 0x08, 0xD1, 0x07, 0xD0, 0xFF, 0x6A, 0x4C, 0xED,
 0x4C, 0xEC, 0x04, 0xD5, 0x28, 0x2C, 0x30, 0xF0,
-0x20, 0x6A, 0x80, 0xF6, 0x14, 0x9A, 0x01, 0xF0,
+0x20, 0x6A, 0xE0, 0xF4, 0x0C, 0x9A, 0x01, 0xF0,
 0x08, 0x69, 0x91, 0x67, 0xB0, 0x67, 0x00, 0x6E,
-0x00, 0x18, 0x8F, 0x2B, 0x21, 0xF0, 0x10, 0x6C,
-0x0E, 0x6D, 0x08, 0x6E, 0x00, 0x18, 0x8F, 0x2B,
+0x00, 0x18, 0x4F, 0x32, 0x21, 0xF0, 0x10, 0x6C,
+0x0E, 0x6D, 0x08, 0x6E, 0x00, 0x18, 0x4F, 0x32,
 0x01, 0x6E, 0x21, 0xF0, 0x14, 0x6C, 0x03, 0x6D,
-0x00, 0x18, 0x8F, 0x2B, 0x04, 0x95, 0x00, 0x6C,
-0x00, 0x18, 0xA6, 0x2B, 0x91, 0x67, 0xB0, 0x67,
-0xD0, 0x67, 0x00, 0x18, 0x8F, 0x2B, 0x30, 0xF0,
-0x20, 0x6A, 0x41, 0xF2, 0x64, 0x9A, 0x7F, 0x6A,
+0x00, 0x18, 0x4F, 0x32, 0x04, 0x95, 0x00, 0x6C,
+0x00, 0x18, 0x66, 0x32, 0x91, 0x67, 0xB0, 0x67,
+0xD0, 0x67, 0x00, 0x18, 0x4F, 0x32, 0x30, 0xF0,
+0x20, 0x6A, 0x21, 0xF1, 0x64, 0x9A, 0x7F, 0x6A,
 0x80, 0xA3, 0x8C, 0xEA, 0x40, 0xC3, 0x09, 0x97,
 0x08, 0x91, 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF,
 0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0xFF, 0x68,
 0x0C, 0xEC, 0x0F, 0x5C, 0xAC, 0xE8, 0x09, 0x60,
-0x00, 0x18, 0x51, 0x2B, 0x10, 0x22, 0x00, 0x18,
-0x51, 0x2B, 0x01, 0x72, 0x00, 0x6C, 0x0B, 0x61,
-0x04, 0x10, 0x00, 0x18, 0x51, 0x2B, 0x05, 0x2A,
-0x01, 0x6C, 0xB0, 0x67, 0x00, 0x18, 0x2D, 0x2C,
-0x02, 0x10, 0x00, 0x18, 0x51, 0x2B, 0x05, 0x97,
+0x00, 0x18, 0xF9, 0x31, 0x10, 0x22, 0x00, 0x18,
+0xF9, 0x31, 0x01, 0x72, 0x00, 0x6C, 0x0B, 0x61,
+0x04, 0x10, 0x00, 0x18, 0xF9, 0x31, 0x05, 0x2A,
+0x01, 0x6C, 0xB0, 0x67, 0x00, 0x18, 0xED, 0x32,
+0x02, 0x10, 0x00, 0x18, 0xF9, 0x31, 0x05, 0x97,
 0x04, 0x90, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0xFB, 0x63, 0x09, 0x62, 0x08, 0xD1, 0x07, 0xD0,
-0xFF, 0xF7, 0x1F, 0x6B, 0xAC, 0xEB, 0x05, 0xD3,
-0x30, 0xF0, 0x20, 0x6B, 0x80, 0xF7, 0x64, 0x9B,
-0xFF, 0x6A, 0x8C, 0xEA, 0x80, 0xAB, 0xE1, 0xF7,
-0x1F, 0x6B, 0x00, 0x68, 0x8C, 0xEB, 0x69, 0xE2,
-0x30, 0xF0, 0x20, 0x6B, 0xC0, 0xF7, 0x94, 0x9B,
-0x5C, 0x32, 0x91, 0xE2, 0x04, 0xD4, 0x18, 0x10,
-0x04, 0x92, 0x20, 0x9A, 0x07, 0x28, 0x01, 0x6D,
-0x83, 0xF1, 0x18, 0x6C, 0xAB, 0xED, 0xD1, 0x67,
-0x00, 0x18, 0x8F, 0x2B, 0x01, 0x6D, 0x83, 0xF1,
-0x18, 0x6C, 0xAB, 0xED, 0xD1, 0x67, 0x00, 0x18,
-0x8F, 0x2B, 0x04, 0x93, 0x01, 0x48, 0xFF, 0xF7,
-0x1F, 0x6A, 0x04, 0x4B, 0x4C, 0xE8, 0x04, 0xD3,
-0x05, 0x92, 0x43, 0xE8, 0xE5, 0x61, 0x09, 0x97,
-0x08, 0x91, 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF,
 0xFD, 0x63, 0x05, 0x62, 0x30, 0xF0, 0x20, 0x6A,
-0x24, 0xF2, 0x18, 0x4A, 0x88, 0x34, 0x91, 0xE2,
-0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF0, 0x5C, 0x9A,
+0x84, 0xF1, 0x1C, 0x4A, 0x88, 0x34, 0x91, 0xE2,
+0x30, 0xF0, 0x20, 0x6A, 0x80, 0xF7, 0x44, 0x9A,
 0x30, 0xF0, 0x20, 0x6B, 0x00, 0xF5, 0xA0, 0x35,
-0xCC, 0xEA, 0x01, 0xF1, 0xC0, 0x9B, 0x80, 0xAC,
+0xCC, 0xEA, 0xA0, 0xF7, 0xCC, 0x9B, 0x80, 0xAC,
 0xAD, 0xEA, 0x01, 0x6D, 0xAB, 0xED, 0x4C, 0xEE,
-0x00, 0x18, 0x8F, 0x2B, 0x05, 0x97, 0x03, 0x63,
+0x00, 0x18, 0x4F, 0x32, 0x05, 0x97, 0x03, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0xFB, 0x63, 0x09, 0x62,
 0x08, 0xD1, 0x07, 0xD0, 0x46, 0x67, 0xFF, 0x68,
 0xFF, 0xF7, 0x1F, 0x69, 0x01, 0x4A, 0x0C, 0xD6,
 0x0D, 0xD7, 0x8C, 0xE8, 0xAC, 0xE9, 0x04, 0x2A,
 0x90, 0x67, 0xB1, 0x67, 0xC7, 0x67, 0x12, 0x10,
-0xB1, 0x67, 0x90, 0x67, 0x00, 0x18, 0x33, 0x2B,
-0x0C, 0x94, 0x04, 0xD2, 0x00, 0x18, 0x79, 0x22,
+0xB1, 0x67, 0x90, 0x67, 0x00, 0x18, 0xDB, 0x31,
+0x0C, 0x94, 0x04, 0xD2, 0x00, 0x18, 0x7B, 0x27,
 0x0D, 0x96, 0x90, 0x67, 0xB1, 0x67, 0xC4, 0xEA,
 0x0C, 0x92, 0x4C, 0xEE, 0x4F, 0xEB, 0x04, 0x92,
-0x4C, 0xEB, 0x6D, 0xEE, 0x00, 0x18, 0x76, 0x2C,
-0x01, 0x6C, 0x00, 0x18, 0x67, 0x23, 0x09, 0x97,
+0x4C, 0xEB, 0x6D, 0xEE, 0x00, 0x18, 0x18, 0x33,
+0x01, 0x6C, 0x00, 0x18, 0x51, 0x28, 0x09, 0x97,
 0x08, 0x91, 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF,
 0xFB, 0x63, 0x09, 0x62, 0x08, 0xD1, 0x07, 0xD0,
 0xFF, 0x6A, 0x04, 0x67, 0x4C, 0xE8, 0x68, 0x40,
 0xE4, 0x4B, 0x4C, 0xEB, 0x0D, 0x5B, 0x09, 0x60,
 0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF0, 0x00, 0x6C,
-0x21, 0xF1, 0xB0, 0x9A, 0x80, 0xF4, 0x14, 0x6E,
+0xE0, 0xF7, 0xB8, 0x9A, 0x80, 0xF4, 0x14, 0x6E,
 0x2F, 0x10, 0x68, 0x40, 0xD6, 0x4B, 0x4C, 0xEB,
 0x0F, 0x5B, 0x09, 0x60, 0x30, 0xF0, 0x20, 0x6A,
-0x61, 0xF0, 0x00, 0x6C, 0x21, 0xF1, 0xB0, 0x9A,
+0x61, 0xF0, 0x00, 0x6C, 0xE0, 0xF7, 0xB8, 0x9A,
 0x40, 0xF4, 0x13, 0x6E, 0x21, 0x10, 0x68, 0x40,
 0xA4, 0x4B, 0x4C, 0xEB, 0x11, 0x5B, 0x09, 0x60,
 0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF0, 0x00, 0x6C,
-0x21, 0xF1, 0xB0, 0x9A, 0x40, 0xF4, 0x12, 0x6E,
+0xE0, 0xF7, 0xB8, 0x9A, 0x40, 0xF4, 0x12, 0x6E,
 0x13, 0x10, 0x76, 0x58, 0x09, 0x61, 0x30, 0xF0,
-0x20, 0x6A, 0x61, 0xF0, 0x00, 0x6C, 0x21, 0xF1,
-0xB0, 0x9A, 0x00, 0xF4, 0x12, 0x6E, 0x08, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF1, 0xB0, 0x9A,
+0x20, 0x6A, 0x61, 0xF0, 0x00, 0x6C, 0xE0, 0xF7,
+0xB8, 0x9A, 0x00, 0xF4, 0x12, 0x6E, 0x08, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0xE0, 0xF7, 0xB8, 0x9A,
 0x61, 0xF0, 0x00, 0x6C, 0x61, 0xF1, 0x0A, 0x6E,
-0x00, 0x18, 0x8F, 0x2B, 0x00, 0x69, 0x68, 0x40,
+0x00, 0x18, 0x4F, 0x32, 0x00, 0x69, 0x68, 0x40,
 0xE4, 0x4B, 0xFF, 0x6A, 0x4C, 0xEB, 0x1D, 0x5B,
 0x02, 0x60, 0x02, 0x4A, 0x0E, 0x10, 0x68, 0x40,
 0xA4, 0x4B, 0x4C, 0xEB, 0x29, 0x5B, 0x03, 0x60,
 0x00, 0xF3, 0x01, 0x6A, 0x06, 0x10, 0x00, 0x6A,
 0x8D, 0x58, 0x04, 0xD2, 0x03, 0x61, 0x00, 0xF5,
 0x01, 0x4A, 0x04, 0xD2, 0x30, 0xF0, 0x20, 0x6A,
-0x61, 0xF2, 0x88, 0x9A, 0x00, 0x18, 0x79, 0x22,
+0x41, 0xF1, 0x8C, 0x9A, 0x00, 0x18, 0x7B, 0x27,
 0x04, 0x97, 0x91, 0x67, 0x18, 0x6D, 0xE4, 0xEA,
-0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF2, 0xCC, 0x9A,
-0x0D, 0xEF, 0x01, 0x49, 0x00, 0x18, 0x85, 0x2C,
+0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1, 0xD0, 0x9A,
+0x0D, 0xEF, 0x01, 0x49, 0x00, 0x18, 0x27, 0x33,
 0x04, 0x71, 0xD5, 0x61, 0x68, 0x40, 0xE4, 0x4B,
 0xFF, 0x6A, 0x4C, 0xEB, 0x1D, 0x5B, 0x05, 0x60,
 0x41, 0xF1, 0x18, 0x6C, 0x1F, 0x6D, 0x01, 0x6E,
@@ -30711,592 +33139,695 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x2D, 0x5B, 0x05, 0x60, 0x41, 0xF1, 0x18, 0x6C,
 0x1F, 0x6D, 0x02, 0x6E, 0x06, 0x10, 0x95, 0x58,
 0x06, 0x61, 0x41, 0xF1, 0x18, 0x6C, 0x1F, 0x6D,
-0x03, 0x6E, 0x00, 0x18, 0x8F, 0x2B, 0x09, 0x97,
+0x03, 0x6E, 0x00, 0x18, 0x4F, 0x32, 0x09, 0x97,
 0x08, 0x91, 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF,
-0x30, 0xF0, 0x20, 0x6B, 0x20, 0xF6, 0x6C, 0x9B,
-0x10, 0xF0, 0x21, 0x6A, 0x96, 0xF3, 0x19, 0x4A,
+0x30, 0xF0, 0x20, 0x6B, 0x80, 0xF4, 0x68, 0x9B,
+0x10, 0xF0, 0x21, 0x6A, 0x39, 0xF6, 0x01, 0x4A,
 0x40, 0xDB, 0x00, 0x6B, 0x30, 0xF0, 0x20, 0x6A,
-0x61, 0xF2, 0xB0, 0x9A, 0xFF, 0x6C, 0x40, 0xA5,
+0x41, 0xF1, 0xB4, 0x9A, 0xFF, 0x6C, 0x40, 0xA5,
 0xA0, 0xA5, 0x8C, 0xEA, 0xAC, 0xEC, 0x4E, 0xEC,
 0x10, 0x24, 0x64, 0x73, 0x09, 0x61, 0x30, 0xF0,
-0x20, 0x6B, 0x61, 0xF0, 0x98, 0x9B, 0x40, 0x6D,
+0x20, 0x6B, 0x40, 0xF7, 0x84, 0x9B, 0x40, 0x6D,
 0x60, 0x9C, 0xAD, 0xEB, 0x60, 0xDC, 0x20, 0xE8,
 0x01, 0x4B, 0xFF, 0xF7, 0x1F, 0x6A, 0x4C, 0xEB,
 0xE5, 0x17, 0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6B,
-0x20, 0xF6, 0x6C, 0x9B, 0x10, 0xF0, 0x21, 0x6A,
-0xF6, 0xF3, 0x05, 0x4A, 0x40, 0xDB, 0x30, 0xF0,
-0x20, 0x6A, 0x61, 0xF2, 0x54, 0x9A, 0x60, 0xA2,
+0x80, 0xF4, 0x68, 0x9B, 0x10, 0xF0, 0x21, 0x6A,
+0x79, 0xF6, 0x0D, 0x4A, 0x40, 0xDB, 0x30, 0xF0,
+0x20, 0x6A, 0x41, 0xF1, 0x58, 0x9A, 0x60, 0xA2,
 0x01, 0x6A, 0x6C, 0xEA, 0xF8, 0x2A, 0x30, 0xF0,
-0x20, 0x6B, 0x20, 0xF6, 0x6C, 0x9B, 0x10, 0xF0,
-0x21, 0x6A, 0xF6, 0xF3, 0x06, 0x4A, 0x40, 0xDB,
-0x20, 0xE8, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6B,
-0x61, 0xF2, 0x78, 0x9B, 0xFF, 0x6A, 0x4C, 0xEC,
-0xE0, 0xA3, 0x1F, 0x6E, 0x94, 0x34, 0xEC, 0xEE,
-0xCD, 0xEC, 0x4C, 0xED, 0x4C, 0xEC, 0x80, 0xC3,
-0xA0, 0xC3, 0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6B,
-0x61, 0xF2, 0x78, 0x9B, 0xFF, 0x6A, 0x4C, 0xEC,
-0xC0, 0xA3, 0x1F, 0x6D, 0x94, 0x34, 0xCC, 0xED,
-0xAD, 0xEC, 0x4C, 0xEC, 0x80, 0xC3, 0x60, 0xA3,
+0x20, 0x6B, 0x80, 0xF4, 0x68, 0x9B, 0x10, 0xF0,
+0x21, 0x6A, 0x79, 0xF6, 0x0E, 0x4A, 0x40, 0xDB,
+0x20, 0xE8, 0x00, 0x65, 0xFF, 0x6A, 0x4C, 0xEC,
+0x05, 0x5C, 0xAC, 0xEA, 0x3E, 0x60, 0x30, 0xF0,
+0x20, 0x6B, 0x88, 0x34, 0x00, 0xF4, 0x0C, 0x4B,
+0x8D, 0xE3, 0x60, 0x9B, 0x00, 0xEB, 0x30, 0xF0,
+0x20, 0x6B, 0x41, 0xF1, 0x7C, 0x9B, 0x1F, 0x6C,
+0xA0, 0xA3, 0xAC, 0xEC, 0x80, 0xC3, 0x40, 0xC3,
+0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6B, 0x41, 0xF1,
+0x9C, 0x9B, 0x1F, 0x6B, 0xA0, 0xA4, 0xAC, 0xEB,
+0x20, 0x6D, 0x11, 0x10, 0x30, 0xF0, 0x20, 0x6B,
+0x41, 0xF1, 0x9C, 0x9B, 0x1F, 0x6B, 0xA0, 0xA4,
+0xAC, 0xEB, 0x40, 0x6D, 0x08, 0x10, 0x30, 0xF0,
+0x20, 0x6B, 0x41, 0xF1, 0x9C, 0x9B, 0x1F, 0x6B,
+0xA0, 0xA4, 0xAC, 0xEB, 0x60, 0x6D, 0xAD, 0xEB,
+0x60, 0xC4, 0x40, 0xC4, 0x20, 0xE8, 0x30, 0xF0,
+0x20, 0x6B, 0x41, 0xF1, 0x9C, 0x9B, 0x1F, 0x6B,
+0xA0, 0xA4, 0xAC, 0xEB, 0x80, 0x6D, 0xAB, 0xED,
+0xAD, 0xEB, 0xFF, 0x6D, 0xAC, 0xEB, 0x60, 0xC4,
+0x40, 0xC4, 0x20, 0xE8, 0xFF, 0x6A, 0x8C, 0xEA,
+0x05, 0x5A, 0x38, 0x60, 0x30, 0xF0, 0x20, 0x6B,
+0x48, 0x32, 0x20, 0xF4, 0x00, 0x4B, 0x4D, 0xE3,
+0x40, 0x9B, 0x00, 0xEA, 0x30, 0xF0, 0x20, 0x6A,
+0x41, 0xF1, 0x7C, 0x9A, 0x1F, 0x6A, 0x80, 0xA3,
+0x27, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1,
+0x7C, 0x9A, 0x1F, 0x6A, 0x80, 0xA3, 0x8C, 0xEA,
+0x20, 0x6C, 0x11, 0x10, 0x30, 0xF0, 0x20, 0x6A,
+0x41, 0xF1, 0x7C, 0x9A, 0x1F, 0x6A, 0x80, 0xA3,
+0x8C, 0xEA, 0x40, 0x6C, 0x08, 0x10, 0x30, 0xF0,
+0x20, 0x6A, 0x41, 0xF1, 0x7C, 0x9A, 0x1F, 0x6A,
+0x80, 0xA3, 0x8C, 0xEA, 0x60, 0x6C, 0x8D, 0xEA,
+0x0C, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF1,
+0x7C, 0x9A, 0x1F, 0x6A, 0x80, 0xA3, 0x8C, 0xEA,
+0x80, 0x6C, 0x8B, 0xEC, 0x8D, 0xEA, 0xFF, 0x6C,
+0x8C, 0xEA, 0x40, 0xC3, 0x30, 0xF0, 0x20, 0x6A,
+0x41, 0xF1, 0x5C, 0x9A, 0xFF, 0x6B, 0x40, 0xA2,
 0x6C, 0xEA, 0x20, 0xE8, 0xFF, 0x6A, 0x4C, 0xED,
 0xFF, 0x75, 0x4C, 0xEC, 0xCC, 0xEA, 0x06, 0x61,
-0x30, 0xF0, 0x20, 0x6B, 0x81, 0xF4, 0x0C, 0x4B,
+0x30, 0xF0, 0x20, 0x6B, 0xC1, 0xF3, 0x1C, 0x4B,
 0x71, 0xE4, 0x0B, 0x10, 0x30, 0xF0, 0x20, 0x6B,
-0x81, 0xF4, 0x0C, 0x4B, 0x71, 0xE4, 0xE2, 0xF6,
-0x74, 0xA4, 0xAC, 0xEA, 0xAF, 0xED, 0x6C, 0xED,
-0xAD, 0xEA, 0xE2, 0xF6, 0x54, 0xC4, 0x20, 0xE8,
+0xC1, 0xF3, 0x1C, 0x4B, 0x71, 0xE4, 0xE2, 0xF6,
+0x7C, 0xA4, 0xAC, 0xEA, 0xAF, 0xED, 0x6C, 0xED,
+0xAD, 0xEA, 0xE2, 0xF6, 0x5C, 0xC4, 0x20, 0xE8,
 0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
-0x30, 0xF0, 0x20, 0x6B, 0x20, 0xF6, 0x6C, 0x9B,
-0x10, 0xF0, 0x21, 0x6A, 0xFF, 0x69, 0x96, 0xF4,
-0x11, 0x4A, 0x8C, 0xE9, 0x40, 0xDB, 0x00, 0x68,
+0x30, 0xF0, 0x20, 0x6B, 0x80, 0xF4, 0x68, 0x9B,
+0x10, 0xF0, 0x21, 0x6A, 0xFF, 0x69, 0xF9, 0xF7,
+0x09, 0x4A, 0x8C, 0xE9, 0x40, 0xDB, 0x00, 0x68,
 0x1D, 0x10, 0x82, 0xF3, 0x08, 0x70, 0x09, 0x61,
-0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF0, 0x78, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x40, 0xF7, 0x64, 0x9A,
 0x10, 0x6C, 0x40, 0x9B, 0x8D, 0xEA, 0x40, 0xDB,
 0x1C, 0x10, 0xFF, 0xF7, 0x1F, 0x6A, 0x01, 0x48,
-0x4C, 0xE8, 0x14, 0x6C, 0x00, 0x18, 0x67, 0x23,
+0x4C, 0xE8, 0x14, 0x6C, 0x00, 0x18, 0x51, 0x28,
 0x33, 0x58, 0x08, 0x61, 0x30, 0xF0, 0x20, 0x6A,
-0x01, 0xF2, 0x58, 0x9A, 0x01, 0x6B, 0x40, 0xA2,
+0x81, 0xF0, 0x4C, 0x9A, 0x01, 0x6B, 0x40, 0xA2,
 0x6C, 0xEA, 0x0B, 0x2A, 0x30, 0xF0, 0x20, 0x6A,
-0x61, 0xF2, 0x5C, 0x9A, 0x01, 0x6B, 0x40, 0x9A,
+0x61, 0xF1, 0x40, 0x9A, 0x01, 0x6B, 0x40, 0x9A,
 0x42, 0x32, 0x5E, 0x32, 0x6C, 0xEA, 0x2E, 0xEA,
-0xD8, 0x2A, 0x30, 0xF0, 0x20, 0x6B, 0x20, 0xF6,
-0x6C, 0x9B, 0x10, 0xF0, 0x21, 0x6A, 0x96, 0xF4,
-0x12, 0x4A, 0x40, 0xDB, 0x07, 0x97, 0x06, 0x91,
+0xD8, 0x2A, 0x30, 0xF0, 0x20, 0x6B, 0x80, 0xF4,
+0x68, 0x9B, 0x10, 0xF0, 0x21, 0x6A, 0xF9, 0xF7,
+0x0A, 0x4A, 0x40, 0xDB, 0x07, 0x97, 0x06, 0x91,
 0x05, 0x90, 0x04, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x30, 0xF0,
-0x20, 0x68, 0x81, 0xF4, 0x0C, 0x48, 0x30, 0xF0,
-0x20, 0x6A, 0x6E, 0x98, 0xE1, 0xF1, 0x48, 0x9A,
-0x60, 0xDA, 0x00, 0x18, 0xF9, 0x2C, 0x30, 0xF0,
-0x20, 0x6A, 0x81, 0xF0, 0x74, 0x9A, 0xEF, 0x6A,
-0x80, 0xA3, 0x8C, 0xEA, 0x40, 0xC3, 0x00, 0x6C,
-0x00, 0x18, 0x24, 0x2D, 0x02, 0xF7, 0x68, 0xA0,
-0x7F, 0x6A, 0x05, 0x97, 0x6C, 0xEA, 0x02, 0xF7,
-0x48, 0xC0, 0x04, 0x90, 0x03, 0x63, 0x00, 0xEF,
-0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x30, 0xF0,
-0x20, 0x6A, 0x81, 0xF4, 0x0C, 0x4A, 0x02, 0xF7,
-0x88, 0xA2, 0x80, 0x6B, 0x6B, 0xEB, 0x8D, 0xEB,
-0x02, 0xF7, 0x68, 0xC2, 0x02, 0xF7, 0x78, 0xAA,
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-0x50, 0x9A, 0x01, 0x6C, 0x8B, 0xEC, 0x80, 0xC2,
-0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF2, 0x54, 0x9A,
-0x09, 0x6C, 0x01, 0x6D, 0x80, 0xC2, 0x30, 0xF0,
-0x20, 0x6A, 0xE1, 0xF2, 0x58, 0x9A, 0x7A, 0x6C,
-0x8B, 0xEC, 0x80, 0xC2, 0x30, 0xF0, 0x20, 0x6A,
-0xE1, 0xF2, 0x9C, 0x9A, 0xA1, 0xF0, 0x14, 0x69,
-0x40, 0xA4, 0x6C, 0xEA, 0xAD, 0xEA, 0x6C, 0xEA,
-0xB0, 0x67, 0x40, 0xC4, 0x91, 0x67, 0x00, 0x18,
-0x81, 0x2B, 0x41, 0x6E, 0xCB, 0xEE, 0x91, 0x67,
-0xB0, 0x67, 0x4C, 0xEE, 0x00, 0x18, 0x8F, 0x2B,
-0x30, 0xF0, 0x20, 0x69, 0x30, 0xF0, 0x20, 0x6A,
-0x81, 0xF4, 0x0C, 0x49, 0x01, 0xF3, 0x00, 0x4A,
-0x40, 0x9A, 0x62, 0xF7, 0xC0, 0xA9, 0xB0, 0x67,
-0x81, 0xF4, 0x10, 0x6C, 0x4D, 0xEE, 0x00, 0x18,
-0x8F, 0x2B, 0x30, 0xF0, 0x20, 0x6B, 0x01, 0xF3,
-0x00, 0x4B, 0x60, 0x9B, 0x62, 0xF7, 0xC2, 0xA9,
-0xB0, 0x67, 0x01, 0xF4, 0x00, 0x69, 0x6D, 0xEE,
-0x81, 0xF6, 0x10, 0x6C, 0x00, 0x18, 0x8F, 0x2B,
-0x91, 0x67, 0xB0, 0x67, 0x00, 0x18, 0x81, 0x2B,
-0x03, 0x6E, 0x91, 0x67, 0xB0, 0x67, 0x4D, 0xEE,
-0x00, 0xF2, 0x00, 0x49, 0x00, 0x18, 0x8F, 0x2B,
-0x91, 0x67, 0xB0, 0x67, 0x00, 0x18, 0x81, 0x2B,
-0x03, 0x6E, 0x91, 0x67, 0xB0, 0x67, 0x4D, 0xEE,
-0x00, 0x18, 0x8F, 0x2B, 0x07, 0x97, 0x06, 0x91,
+0x00, 0x18, 0x6A, 0x37, 0x01, 0x6D, 0x02, 0x6C,
+0xA4, 0xEA, 0x00, 0x18, 0xAE, 0x06, 0x05, 0x97,
+0x03, 0x63, 0x00, 0xEF, 0xFD, 0x63, 0x05, 0x62,
+0xFF, 0x6A, 0x4C, 0xEC, 0x00, 0x18, 0x6A, 0x37,
+0x01, 0x6D, 0x03, 0x6C, 0xA4, 0xEA, 0x00, 0x18,
+0xAE, 0x06, 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF,
+0x30, 0xF0, 0x20, 0x6B, 0x83, 0xF5, 0x78, 0xA3,
+0xFF, 0x6A, 0xAC, 0xEA, 0x01, 0x73, 0x03, 0x61,
+0xCC, 0xF4, 0x00, 0x6B, 0x04, 0x10, 0x03, 0x73,
+0x04, 0x61, 0xC4, 0xF1, 0x00, 0x6B, 0x6B, 0xEB,
+0x02, 0x10, 0x41, 0xF2, 0x00, 0x6B, 0x60, 0xCC,
+0x09, 0x22, 0x60, 0xAC, 0x00, 0xF2, 0x01, 0x6A,
+0x4B, 0xEA, 0x6C, 0xEA, 0x41, 0x6B, 0x6B, 0xEB,
+0x6C, 0xEA, 0x06, 0x10, 0x60, 0xAC, 0x00, 0xF2,
+0x00, 0x6A, 0x6D, 0xEA, 0x40, 0x6B, 0x6D, 0xEA,
+0x40, 0xCC, 0x20, 0xE8, 0x20, 0xE8, 0x00, 0x65,
+0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF6, 0x74, 0x9A,
+0xFF, 0x6C, 0x01, 0x6D, 0x40, 0xA3, 0x8C, 0xEA,
+0xAD, 0xEA, 0x8C, 0xEA, 0x40, 0xC3, 0x20, 0xE8,
+0xFD, 0x63, 0x05, 0x62, 0x30, 0xF0, 0x20, 0x6A,
+0x83, 0xF5, 0x58, 0xA2, 0x01, 0x72, 0x0C, 0x61,
+0x01, 0x6C, 0x10, 0x6D, 0x00, 0x18, 0x5F, 0x26,
+0x04, 0x6B, 0x4D, 0xEB, 0xFF, 0x6E, 0x01, 0x6C,
+0x10, 0x6D, 0x6C, 0xEE, 0x00, 0x18, 0x52, 0x26,
+0x05, 0x97, 0x03, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0xFD, 0x63, 0x05, 0x62, 0x30, 0xF0, 0x20, 0x6A,
+0x83, 0xF5, 0x58, 0xA2, 0x01, 0x72, 0x0A, 0x61,
+0x01, 0x6C, 0x10, 0x6D, 0x00, 0x18, 0x5F, 0x26,
+0xFB, 0x6E, 0x01, 0x6C, 0x10, 0x6D, 0x4C, 0xEE,
+0x00, 0x18, 0x52, 0x26, 0x05, 0x97, 0x03, 0x63,
+0x00, 0xEF, 0x00, 0x65, 0x30, 0xF0, 0x20, 0x6B,
+0xE1, 0xF1, 0xA4, 0x9B, 0xFF, 0x6A, 0x08, 0x6E,
+0x60, 0xA5, 0xCB, 0xEE, 0x4C, 0xEC, 0x4C, 0xEB,
+0xCC, 0xEB, 0x6D, 0xEC, 0x30, 0xF0, 0x20, 0x6B,
+0xE1, 0xF1, 0x68, 0x9B, 0x4C, 0xEC, 0x80, 0xC5,
+0x60, 0xA3, 0x6C, 0xEA, 0x20, 0xE8, 0x00, 0x65,
+0x30, 0xF0, 0x20, 0x6B, 0xE1, 0xF1, 0xC4, 0x9B,
+0xFF, 0x6A, 0x08, 0x6F, 0x60, 0xA6, 0xEB, 0xEF,
+0x4C, 0xEC, 0x4C, 0xEB, 0xEC, 0xEB, 0x6D, 0xEC,
+0x4C, 0xED, 0x4C, 0xEC, 0x30, 0xF0, 0x20, 0x6A,
+0xE1, 0xF1, 0x48, 0x9A, 0x80, 0xC6, 0xA0, 0xC2,
+0x20, 0xE8, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
+0x04, 0xD0, 0x30, 0xF0, 0x20, 0x6B, 0x80, 0xF4,
+0x68, 0x9B, 0x10, 0xF0, 0x21, 0x6A, 0x7C, 0xF0,
+0x15, 0x4A, 0x40, 0xDB, 0x00, 0x68, 0x30, 0xF0,
+0x20, 0x6A, 0x61, 0xF1, 0x48, 0x9A, 0x40, 0xA2,
+0x12, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF1,
+0x4C, 0x9A, 0x40, 0xA2, 0x0C, 0x2A, 0x30, 0xF0,
+0x20, 0x6A, 0x61, 0xF1, 0x50, 0x9A, 0x40, 0xA2,
+0x06, 0x2A, 0x30, 0xF0, 0x20, 0x6A, 0x61, 0xF1,
+0x54, 0x9A, 0x40, 0xA2, 0x15, 0x22, 0xE0, 0xF3,
+0x09, 0x70, 0x0A, 0x61, 0x30, 0xF0, 0x20, 0x6A,
+0x40, 0xF7, 0x64, 0x9A, 0x20, 0x6C, 0x40, 0x9B,
+0x8D, 0xEA, 0x40, 0xDB, 0x00, 0x6A, 0x09, 0x10,
+0x32, 0x6C, 0x00, 0x18, 0x51, 0x28, 0x01, 0x48,
+0xFF, 0xF7, 0x1F, 0x6A, 0x4C, 0xE8, 0xD3, 0x17,
+0x01, 0x6A, 0x05, 0x97, 0x04, 0x90, 0x03, 0x63,
+0x00, 0xEF, 0x00, 0x65, 0xFC, 0x63, 0x07, 0x62,
+0x06, 0xD1, 0x05, 0xD0, 0x30, 0xF0, 0x20, 0x6A,
+0xE1, 0xF1, 0x6C, 0x9A, 0xFF, 0x69, 0x07, 0x6C,
+0x40, 0xA3, 0x8B, 0xEC, 0x01, 0x68, 0x2C, 0xEA,
+0x8C, 0xEA, 0x04, 0x6C, 0x8D, 0xEA, 0x2C, 0xEA,
+0x40, 0xC3, 0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF1,
+0x70, 0x9A, 0x30, 0xF0, 0x20, 0x6C, 0xE1, 0xF1,
+0x94, 0x9C, 0x40, 0x9B, 0x0B, 0xE8, 0xB0, 0x67,
+0x8C, 0xEA, 0x40, 0xDB, 0x30, 0xF0, 0x20, 0x6A,
+0xE1, 0xF1, 0x78, 0x9A, 0x30, 0xF0, 0x20, 0x6C,
+0xE1, 0xF1, 0x9C, 0x9C, 0x40, 0x9B, 0x8C, 0xEA,
+0x40, 0xDB, 0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF2,
+0x60, 0x9A, 0x02, 0x6C, 0x40, 0xA3, 0x2C, 0xEA,
+0x8D, 0xEA, 0x2C, 0xEA, 0x40, 0xC3, 0x30, 0xF0,
+0x20, 0x6A, 0xA0, 0xF6, 0x48, 0x9A, 0x01, 0x6B,
+0x6B, 0xEB, 0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A,
+0x01, 0xF2, 0x44, 0x9A, 0x09, 0x6B, 0xA1, 0xF0,
+0x12, 0x4C, 0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A,
+0x01, 0xF2, 0x48, 0x9A, 0x7A, 0x6B, 0x6B, 0xEB,
+0x60, 0xC2, 0x00, 0x18, 0x41, 0x32, 0x41, 0x6E,
+0xCB, 0xEE, 0xB0, 0x67, 0x4C, 0xEE, 0xA1, 0xF0,
+0x14, 0x6C, 0x00, 0x18, 0x4F, 0x32, 0x30, 0xF0,
+0x20, 0x6A, 0x20, 0xF7, 0x7C, 0x9A, 0x01, 0x6C,
+0xB0, 0x67, 0x40, 0xA3, 0x2C, 0xEA, 0x8D, 0xEA,
+0x2C, 0xEA, 0x40, 0xC3, 0x30, 0xF0, 0x20, 0x69,
+0x30, 0xF0, 0x20, 0x6A, 0xC1, 0xF3, 0x1C, 0x49,
+0x01, 0xF2, 0x0C, 0x4A, 0x40, 0x9A, 0x62, 0xF7,
+0xC8, 0xA9, 0x81, 0xF4, 0x0F, 0x4C, 0x4D, 0xEE,
+0x00, 0x18, 0x4F, 0x32, 0x30, 0xF0, 0x20, 0x6B,
+0x01, 0xF2, 0x0C, 0x4B, 0x60, 0x9B, 0x62, 0xF7,
+0xCA, 0xA9, 0xB0, 0x67, 0x01, 0xF4, 0x00, 0x69,
+0x6D, 0xEE, 0x81, 0xF6, 0x10, 0x6C, 0x00, 0x18,
+0x4F, 0x32, 0x91, 0x67, 0xB0, 0x67, 0x00, 0x18,
+0x41, 0x32, 0x03, 0x6E, 0x91, 0x67, 0xB0, 0x67,
+0x4D, 0xEE, 0x00, 0xF2, 0x00, 0x49, 0x00, 0x18,
+0x4F, 0x32, 0x91, 0x67, 0xB0, 0x67, 0x00, 0x18,
+0x41, 0x32, 0x03, 0x6E, 0xB0, 0x67, 0x91, 0x67,
+0x4D, 0xEE, 0x00, 0x18, 0x4F, 0x32, 0x01, 0x6C,
+0x00, 0x18, 0x17, 0x3B, 0x07, 0x97, 0x06, 0x91,
 0x05, 0x90, 0x04, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
-0x01, 0x69, 0x2B, 0xE9, 0x01, 0xF4, 0x00, 0x68,
-0x00, 0x18, 0xD4, 0x30, 0x90, 0x67, 0xB1, 0x67,
-0x00, 0x18, 0x81, 0x2B, 0x04, 0x6E, 0xCB, 0xEE,
-0x90, 0x67, 0xB1, 0x67, 0x4C, 0xEE, 0x00, 0xF2,
-0x00, 0x48, 0x00, 0x18, 0x8F, 0x2B, 0x90, 0x67,
-0xB1, 0x67, 0x00, 0x18, 0x81, 0x2B, 0x04, 0x6E,
-0xCB, 0xEE, 0x90, 0x67, 0xB1, 0x67, 0x4C, 0xEE,
-0x00, 0x18, 0x8F, 0x2B, 0x00, 0x6C, 0xA4, 0x67,
-0xD1, 0x67, 0x30, 0xF0, 0x20, 0x68, 0x00, 0x18,
-0x70, 0x2B, 0x81, 0xF4, 0x0C, 0x48, 0xD1, 0x67,
-0x62, 0xF7, 0x40, 0xC8, 0x01, 0x6C, 0x00, 0x6D,
-0x00, 0x18, 0x70, 0x2B, 0x62, 0xF7, 0x42, 0xC8,
-0xB1, 0x67, 0x81, 0xF4, 0x10, 0x6C, 0x00, 0x6E,
-0x00, 0x18, 0x8F, 0x2B, 0xA1, 0xF0, 0x14, 0x68,
-0xB1, 0x67, 0x00, 0x6E, 0x81, 0xF6, 0x10, 0x6C,
-0x00, 0x18, 0x8F, 0x2B, 0x90, 0x67, 0xB1, 0x67,
-0x00, 0x18, 0x81, 0x2B, 0x40, 0x6E, 0x90, 0x67,
-0xB1, 0x67, 0x4D, 0xEE, 0x00, 0x18, 0x8F, 0x2B,
-0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF2, 0x7C, 0x9A,
-0xFE, 0x6A, 0x80, 0xA3, 0x8C, 0xEA, 0x40, 0xC3,
-0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF2, 0x50, 0x9A,
-0x3F, 0x6B, 0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A,
-0xE1, 0xF2, 0x6C, 0x9A, 0xFD, 0x6A, 0x80, 0xA3,
-0x8C, 0xEA, 0x40, 0xC3, 0x07, 0x97, 0x06, 0x91,
+0x01, 0x69, 0x2B, 0xE9, 0x00, 0x6C, 0x01, 0xF4,
+0x00, 0x68, 0x00, 0x18, 0x17, 0x3B, 0x00, 0x18,
+0x1D, 0x38, 0x90, 0x67, 0xB1, 0x67, 0x00, 0x18,
+0x41, 0x32, 0x04, 0x6E, 0xCB, 0xEE, 0x90, 0x67,
+0x4C, 0xEE, 0x00, 0xF2, 0x00, 0x48, 0xB1, 0x67,
+0x00, 0x18, 0x4F, 0x32, 0x90, 0x67, 0xB1, 0x67,
+0x00, 0x18, 0x41, 0x32, 0x04, 0x6E, 0xCB, 0xEE,
+0x90, 0x67, 0x4C, 0xEE, 0xB1, 0x67, 0x00, 0x18,
+0x4F, 0x32, 0x00, 0x6C, 0xA4, 0x67, 0xD1, 0x67,
+0x30, 0xF0, 0x20, 0x68, 0x00, 0x18, 0x18, 0x32,
+0xC1, 0xF3, 0x1C, 0x48, 0x62, 0xF7, 0x48, 0xC8,
+0x01, 0x6C, 0x00, 0x6D, 0xD1, 0x67, 0x00, 0x18,
+0x18, 0x32, 0x62, 0xF7, 0x4A, 0xC8, 0x81, 0xF4,
+0x10, 0x6C, 0xB1, 0x67, 0x00, 0x6E, 0x00, 0x18,
+0x4F, 0x32, 0xA1, 0xF0, 0x14, 0x68, 0x00, 0x6E,
+0x81, 0xF6, 0x10, 0x6C, 0xB1, 0x67, 0x00, 0x18,
+0x4F, 0x32, 0x90, 0x67, 0xB1, 0x67, 0x00, 0x18,
+0x41, 0x32, 0x40, 0x6E, 0x4D, 0xEE, 0x90, 0x67,
+0xB1, 0x67, 0x00, 0x18, 0x4F, 0x32, 0x30, 0xF0,
+0x20, 0x6A, 0x20, 0xF7, 0x7C, 0x9A, 0xFE, 0x6A,
+0x80, 0xA3, 0x8C, 0xEA, 0x40, 0xC3, 0x00, 0x18,
+0x0C, 0x11, 0x01, 0x72, 0x06, 0x61, 0x30, 0xF0,
+0x20, 0x6A, 0xA0, 0xF6, 0x48, 0x9A, 0x3F, 0x6B,
+0x60, 0xC2, 0x30, 0xF0, 0x20, 0x6A, 0x01, 0xF2,
+0x60, 0x9A, 0xFD, 0x6A, 0xFF, 0x6C, 0xA0, 0xA3,
+0xAC, 0xEA, 0x40, 0xC3, 0x30, 0xF0, 0x20, 0x6A,
+0xE1, 0xF1, 0x78, 0x9A, 0x30, 0xF0, 0x20, 0x6D,
+0xE0, 0xF4, 0xB0, 0x9D, 0x40, 0x9B, 0xAD, 0xEA,
+0x40, 0xDB, 0x30, 0xF0, 0x20, 0x6A, 0xE1, 0xF1,
+0x6C, 0x9A, 0x06, 0x6D, 0x40, 0xA3, 0x8C, 0xEA,
+0xAD, 0xEA, 0x8C, 0xEA, 0x40, 0xC3, 0x30, 0xF0,
+0x20, 0x6A, 0xE1, 0xF1, 0x70, 0x9A, 0x30, 0xF0,
+0x20, 0x6C, 0xA1, 0xF1, 0x8C, 0x9C, 0x40, 0x9B,
+0x8D, 0xEA, 0x40, 0xDB, 0x07, 0x97, 0x06, 0x91,
 0x05, 0x90, 0x04, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFF, 0x63, 0x01, 0xD0, 0xFF, 0xF7, 0x1F, 0x6B,
 0xAC, 0xEB, 0x00, 0x6D, 0x45, 0x67, 0x29, 0x10,
 0x01, 0x6E, 0x6C, 0xEE, 0x0E, 0x26, 0xCF, 0x43,
 0xAE, 0xEE, 0x0B, 0x2E, 0x30, 0xF0, 0x20, 0x6E,
-0xA0, 0xF7, 0xC8, 0x9E, 0xD9, 0xE4, 0xB9, 0xE6,
+0xE0, 0xF5, 0xDC, 0x9E, 0xD9, 0xE4, 0xB9, 0xE6,
 0xE0, 0xA6, 0xFF, 0x6E, 0xEC, 0xEE, 0xC0, 0x36,
-0x13, 0x10, 0x30, 0xF0, 0x20, 0x6E, 0xA0, 0xF7,
-0xC8, 0x9E, 0x30, 0xF0, 0x20, 0x68, 0xA0, 0xF7,
-0x0C, 0x98, 0xD9, 0xE4, 0xB9, 0xE6, 0x01, 0xE4,
+0x13, 0x10, 0x30, 0xF0, 0x20, 0x6E, 0xE0, 0xF5,
+0xDC, 0x9E, 0x30, 0xF0, 0x20, 0x68, 0x00, 0xF6,
+0x00, 0x98, 0xD9, 0xE4, 0xB9, 0xE6, 0x01, 0xE4,
 0xC0, 0xA6, 0xA1, 0xE0, 0x00, 0xA0, 0xFF, 0x6F,
 0xEC, 0xEE, 0xC0, 0x36, 0x0C, 0xEF, 0xF9, 0xE6,
 0xC9, 0xE2, 0x02, 0x4D, 0xFF, 0xF7, 0x1F, 0x6E,
@@ -31305,22 +33836,22 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x04, 0xD0, 0xFF, 0x6B, 0x8C, 0xEB, 0x06, 0x73,
 0xFF, 0xF7, 0x1F, 0x6C, 0xAC, 0xEC, 0x03, 0x60,
 0x11, 0x73, 0x0A, 0x92, 0x4D, 0x61, 0x30, 0xF0,
-0x20, 0x6A, 0xA0, 0xF7, 0x08, 0x4A, 0x40, 0x9A,
+0x20, 0x6A, 0xE0, 0xF5, 0x1C, 0x4A, 0x40, 0x9A,
 0x6D, 0xE4, 0x41, 0xE6, 0xA0, 0xA0, 0xFF, 0x6A,
 0x02, 0x48, 0x1D, 0x65, 0x38, 0x67, 0x4C, 0xE9,
-0x02, 0xD1, 0x30, 0xF0, 0x20, 0x69, 0xA0, 0xF7,
-0x2C, 0x99, 0xBD, 0x67, 0x39, 0xE6, 0x19, 0x65,
+0x02, 0xD1, 0x30, 0xF0, 0x20, 0x69, 0x00, 0xF6,
+0x20, 0x99, 0xBD, 0x67, 0x39, 0xE6, 0x19, 0x65,
 0x20, 0xA6, 0x02, 0x4E, 0x20, 0xC5, 0x20, 0xA5,
 0x02, 0x95, 0x4C, 0xE9, 0xA0, 0x35, 0x25, 0xE5,
 0x0A, 0x95, 0xB5, 0xE1, 0x00, 0xD5, 0x00, 0xA0,
-0x20, 0xA6, 0x30, 0xF0, 0x20, 0x6E, 0xA0, 0xF7,
-0x08, 0x4E, 0x4C, 0xE8, 0xC0, 0x9E, 0x4C, 0xE9,
+0x20, 0xA6, 0x30, 0xF0, 0x20, 0x6E, 0xE0, 0xF5,
+0x1C, 0x4E, 0x4C, 0xE8, 0xC0, 0x9E, 0x4C, 0xE9,
 0x00, 0x30, 0x21, 0xE0, 0x01, 0xE5, 0xD5, 0xE7,
 0xD8, 0x67, 0x20, 0xA5, 0xD5, 0xE7, 0xA0, 0xA5,
 0x4C, 0xE9, 0x20, 0x31, 0x4C, 0xED, 0xB5, 0xE1,
-0xA5, 0xE0, 0x30, 0xF0, 0x20, 0x6D, 0x21, 0xF0,
-0xB4, 0x9D, 0x30, 0xF0, 0x20, 0x6E, 0xA1, 0xF2,
-0xC0, 0x9E, 0xB5, 0xE7, 0xA0, 0xA5, 0xDD, 0xE7,
+0xA5, 0xE0, 0x30, 0xF0, 0x20, 0x6D, 0xE0, 0xF6,
+0xB0, 0x9D, 0x30, 0xF0, 0x20, 0x6E, 0x01, 0xF2,
+0xD0, 0x9E, 0xB5, 0xE7, 0xA0, 0xA5, 0xDD, 0xE7,
 0xC0, 0xA7, 0x4C, 0xED, 0xA0, 0x35, 0xCC, 0xEA,
 0x49, 0xE5, 0x49, 0xE1, 0x49, 0xE3, 0x04, 0x10,
 0xFF, 0xF7, 0x1F, 0x6B, 0x4C, 0xEB, 0x69, 0xE4,
@@ -31328,26 +33859,26 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x04, 0x90, 0xFF, 0xF7, 0x1F, 0x6D, 0x4F, 0xEA,
 0xAC, 0xEA, 0x03, 0x63, 0x20, 0xE8, 0x00, 0x65,
 0xFF, 0xF7, 0x1F, 0x6A, 0x4C, 0xEC, 0xAC, 0xEA,
-0x30, 0xF0, 0x20, 0x6D, 0x81, 0xF4, 0x0C, 0x4D,
-0x23, 0xF5, 0x44, 0xCD, 0x04, 0x92, 0xFF, 0x6B,
-0x6C, 0xEE, 0xEC, 0xEB, 0x23, 0xF5, 0x82, 0xCD,
-0x23, 0xF5, 0xC6, 0xC5, 0x23, 0xF5, 0x67, 0xC5,
-0x23, 0xF5, 0x52, 0xCD, 0x20, 0xE8, 0x00, 0x65,
+0x30, 0xF0, 0x20, 0x6D, 0xC1, 0xF3, 0x1C, 0x4D,
+0x23, 0xF5, 0x58, 0xCD, 0x04, 0x92, 0xFF, 0x6B,
+0x6C, 0xEE, 0xEC, 0xEB, 0x23, 0xF5, 0x96, 0xCD,
+0x23, 0xF5, 0xDA, 0xC5, 0x23, 0xF5, 0x7B, 0xC5,
+0x43, 0xF5, 0x46, 0xCD, 0x20, 0xE8, 0x00, 0x65,
 0xFF, 0x63, 0x01, 0xD0, 0x7D, 0x67, 0xFF, 0xF7,
 0x1F, 0x6A, 0x18, 0xA3, 0x30, 0xF0, 0x20, 0x6B,
-0x81, 0xF4, 0x0C, 0x4B, 0x4C, 0xEC, 0x4C, 0xED,
-0x4C, 0xEE, 0x23, 0xF5, 0x8A, 0xCB, 0xEC, 0xEA,
-0x23, 0xF5, 0x88, 0xA3, 0x23, 0xF5, 0x50, 0xCB,
+0xC1, 0xF3, 0x1C, 0x4B, 0x4C, 0xEC, 0x4C, 0xED,
+0x4C, 0xEE, 0x23, 0xF5, 0x9E, 0xCB, 0xEC, 0xEA,
+0x23, 0xF5, 0x9C, 0xA3, 0x43, 0xF5, 0x44, 0xCB,
 0x01, 0x6A, 0x4C, 0xE8, 0xFD, 0x4A, 0x8C, 0xEA,
-0x0D, 0xEA, 0x23, 0xF5, 0xAC, 0xCB, 0x23, 0xF5,
-0xCE, 0xCB, 0x23, 0xF5, 0x48, 0xC3, 0x01, 0x90,
+0x0D, 0xEA, 0x43, 0xF5, 0xA0, 0xCB, 0x43, 0xF5,
+0xC2, 0xCB, 0x23, 0xF5, 0x5C, 0xC3, 0x01, 0x90,
 0x01, 0x63, 0x20, 0xE8, 0x30, 0xF0, 0x20, 0x6B,
-0x01, 0xF3, 0x64, 0x9B, 0xFF, 0x6A, 0xAC, 0xEA,
+0x01, 0xF2, 0x74, 0x9B, 0xFF, 0x6A, 0xAC, 0xEA,
 0x40, 0xC3, 0x30, 0xF0, 0x20, 0x6A, 0x60, 0x9C,
-0x01, 0xF3, 0x48, 0x9A, 0x60, 0xDA, 0x20, 0xE8,
-0x30, 0xF0, 0x20, 0x6B, 0x01, 0xF3, 0x64, 0x9B,
+0x01, 0xF2, 0x58, 0x9A, 0x60, 0xDA, 0x20, 0xE8,
+0x30, 0xF0, 0x20, 0x6B, 0x01, 0xF2, 0x74, 0x9B,
 0xFF, 0x6A, 0xAC, 0xEA, 0x40, 0xC3, 0x30, 0xF0,
-0x20, 0x6A, 0x01, 0xF3, 0x48, 0x9A, 0x40, 0x9A,
+0x20, 0x6A, 0x01, 0xF2, 0x58, 0x9A, 0x40, 0x9A,
 0x40, 0xDC, 0x20, 0xE8, 0xE9, 0xA4, 0xFF, 0xF7,
 0x1F, 0x6A, 0xAC, 0xEA, 0x02, 0x6D, 0xFF, 0x6B,
 0xEC, 0xED, 0x6C, 0xED, 0x6C, 0xEE, 0x05, 0x25,
@@ -31357,29 +33888,29 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x4F, 0xA4, 0xC0, 0xC4, 0x44, 0xC4, 0x5E, 0xA4,
 0x47, 0xC4, 0x20, 0xE8, 0xFD, 0x63, 0x05, 0x62,
 0x04, 0xD0, 0x10, 0x6D, 0x04, 0x67, 0x00, 0x18,
-0xCF, 0x31, 0x84, 0x40, 0x11, 0x6D, 0x00, 0x18,
-0xCF, 0x31, 0x05, 0x97, 0x04, 0x90, 0x03, 0x63,
+0x3F, 0x39, 0x84, 0x40, 0x11, 0x6D, 0x00, 0x18,
+0x3F, 0x39, 0x05, 0x97, 0x04, 0x90, 0x03, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
 0x69, 0xA4, 0x01, 0x6A, 0x6C, 0xEA, 0x02, 0x22,
-0x00, 0x18, 0xEB, 0x31, 0x05, 0x97, 0x03, 0x63,
+0x00, 0x18, 0x5B, 0x39, 0x05, 0x97, 0x03, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0xFC, 0x63, 0x07, 0x62,
 0xFF, 0xF7, 0x1F, 0x6A, 0x8C, 0xEA, 0x09, 0x6D,
-0x04, 0x04, 0x04, 0xD2, 0x00, 0x18, 0xCF, 0x31,
+0x04, 0x04, 0x04, 0xD2, 0x00, 0x18, 0x3F, 0x39,
 0x07, 0x97, 0x04, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFC, 0x63, 0x07, 0x62, 0xFF, 0xF7, 0x1F, 0x6A,
 0x8C, 0xEA, 0x08, 0x6D, 0x04, 0x04, 0x04, 0xD2,
-0x00, 0x18, 0xCF, 0x31, 0x07, 0x97, 0x04, 0x63,
+0x00, 0x18, 0x3F, 0x39, 0x07, 0x97, 0x04, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0xF9, 0x63, 0x0D, 0x62,
 0x0C, 0xD1, 0x0B, 0xD0, 0xFF, 0x6A, 0x4C, 0xED,
 0xAA, 0x33, 0x4C, 0xEB, 0x03, 0x6A, 0xAC, 0xEA,
 0x0E, 0xD4, 0x06, 0xD3, 0x07, 0xD2, 0x08, 0xD4,
 0x00, 0x69, 0x0C, 0x10, 0xA7, 0x41, 0x08, 0x94,
 0xFF, 0x68, 0x19, 0x4D, 0x0C, 0xED, 0x00, 0x18,
-0xD6, 0x31, 0x08, 0x93, 0x01, 0x49, 0x0C, 0xE9,
+0x46, 0x39, 0x08, 0x93, 0x01, 0x49, 0x0C, 0xE9,
 0x04, 0x4B, 0x08, 0xD3, 0x06, 0x92, 0x43, 0xE9,
 0xF1, 0x61, 0x07, 0x93, 0x17, 0x23, 0xA2, 0x67,
 0x04, 0x00, 0x90, 0x67, 0x20, 0x4D, 0x00, 0x18,
-0xD6, 0x31, 0x06, 0x92, 0xFF, 0x6C, 0x48, 0x33,
+0x46, 0x39, 0x06, 0x92, 0xFF, 0x6C, 0x48, 0x33,
 0x0E, 0x92, 0x6D, 0xE2, 0x07, 0x92, 0xFF, 0x4A,
 0x8C, 0xEA, 0x00, 0xF0, 0x11, 0x04, 0x49, 0xE4,
 0x80, 0xA0, 0x01, 0x48, 0x4A, 0xE8, 0x80, 0xC3,
@@ -31392,9 +33923,9 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x4C, 0xEB, 0xB5, 0xE4, 0x08, 0xD3, 0x07, 0xD5,
 0x06, 0xD4, 0x00, 0x69, 0x16, 0x10, 0x07, 0x95,
 0x04, 0x00, 0x90, 0x67, 0x08, 0x6E, 0x00, 0x18,
-0x78, 0x23, 0x07, 0x94, 0x06, 0x95, 0x08, 0x6E,
-0x01, 0x49, 0x00, 0x18, 0x78, 0x23, 0x06, 0x94,
-0xB0, 0x67, 0x08, 0x6E, 0x00, 0x18, 0x78, 0x23,
+0x62, 0x28, 0x07, 0x94, 0x06, 0x95, 0x08, 0x6E,
+0x01, 0x49, 0x00, 0x18, 0x62, 0x28, 0x06, 0x94,
+0xB0, 0x67, 0x08, 0x6E, 0x00, 0x18, 0x62, 0x28,
 0xFF, 0x6A, 0x4C, 0xE9, 0x07, 0x92, 0xF8, 0x4A,
 0x07, 0xD2, 0x06, 0x93, 0x08, 0x92, 0x08, 0x4B,
 0x43, 0xE9, 0x06, 0xD3, 0xE4, 0x61, 0x0D, 0x97,
@@ -31404,49 +33935,49 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x03, 0x6A, 0xAC, 0xEA, 0x0E, 0xD4, 0x06, 0xD3,
 0x07, 0xD2, 0x08, 0xD4, 0x00, 0x69, 0x0C, 0x10,
 0xA7, 0x41, 0x08, 0x94, 0xFF, 0x68, 0x19, 0x4D,
-0x0C, 0xED, 0x00, 0x18, 0xCF, 0x31, 0x08, 0x93,
+0x0C, 0xED, 0x00, 0x18, 0x3F, 0x39, 0x08, 0x93,
 0x01, 0x49, 0x0C, 0xE9, 0x04, 0x4B, 0x08, 0xD3,
 0x06, 0x92, 0x43, 0xE9, 0xF1, 0x61, 0x07, 0x93,
 0x1C, 0x23, 0x04, 0x00, 0x90, 0x67, 0x00, 0x6D,
-0x04, 0x6E, 0x00, 0x18, 0x73, 0x23, 0x06, 0x92,
+0x04, 0x6E, 0x00, 0x18, 0x5D, 0x28, 0x06, 0x92,
 0xFF, 0x6C, 0x48, 0x33, 0x0E, 0x92, 0x6D, 0xE2,
 0x07, 0x92, 0xFF, 0x4A, 0x8C, 0xEA, 0x00, 0xF0,
 0x11, 0x04, 0x49, 0xE4, 0x80, 0xA3, 0x01, 0x4B,
 0x80, 0xC0, 0x01, 0x48, 0x4A, 0xE8, 0xFA, 0x61,
 0x06, 0x95, 0x04, 0x04, 0x20, 0x4D, 0x00, 0x18,
-0xCF, 0x31, 0x0D, 0x97, 0x0C, 0x91, 0x0B, 0x90,
+0x3F, 0x39, 0x0D, 0x97, 0x0C, 0x91, 0x0B, 0x90,
 0x07, 0x63, 0x00, 0xEF, 0xFA, 0x63, 0x0B, 0x62,
 0x0A, 0xD1, 0x09, 0xD0, 0xFF, 0x69, 0x04, 0x67,
 0x2C, 0xE8, 0x07, 0x04, 0xAC, 0xE9, 0x04, 0x6E,
-0x00, 0x6D, 0x00, 0x18, 0x73, 0x23, 0x5D, 0x67,
+0x00, 0x6D, 0x00, 0x18, 0x5D, 0x28, 0x5D, 0x67,
 0x1C, 0xC2, 0x7D, 0x67, 0x01, 0x6A, 0x01, 0x71,
 0x5D, 0xC3, 0x06, 0x61, 0x7F, 0xA3, 0x80, 0x6A,
 0x4B, 0xEA, 0x6D, 0xEA, 0x9D, 0x67, 0x5F, 0xC4,
-0x07, 0x04, 0x00, 0x6D, 0x00, 0x18, 0xCF, 0x31,
+0x07, 0x04, 0x00, 0x6D, 0x00, 0x18, 0x3F, 0x39,
 0x06, 0x02, 0x80, 0xF1, 0x07, 0x6C, 0x80, 0x6D,
 0x00, 0x6E, 0x04, 0xF7, 0x10, 0x6F, 0x04, 0xD2,
-0x00, 0x18, 0xC5, 0x22, 0x03, 0x22, 0x5D, 0x67,
+0x00, 0x18, 0xC7, 0x27, 0x03, 0x22, 0x5D, 0x67,
 0x6C, 0xAA, 0x0D, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0xA0, 0xF7, 0x74, 0x9A, 0xFF, 0x6C, 0x04, 0x6D,
+0x00, 0xF6, 0x68, 0x9A, 0xFF, 0x6C, 0x04, 0x6D,
 0x40, 0xA3, 0x8C, 0xEA, 0xAD, 0xEA, 0x8C, 0xEA,
 0x40, 0xC3, 0x9D, 0x67, 0x6C, 0xAC, 0x30, 0xF0,
-0x20, 0x6A, 0x01, 0xF3, 0x4C, 0x9A, 0x60, 0xCA,
+0x20, 0x6A, 0x01, 0xF2, 0x5C, 0x9A, 0x60, 0xCA,
 0x0B, 0x97, 0x0A, 0x91, 0x09, 0x90, 0x06, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0xF8, 0x63, 0x0F, 0x62,
 0x0E, 0xD1, 0x0D, 0xD0, 0x24, 0x67, 0x11, 0xD5,
 0xA7, 0x41, 0x04, 0x04, 0x02, 0x4D, 0x06, 0x67,
-0x01, 0x6E, 0x00, 0x18, 0x78, 0x23, 0x5D, 0x67,
-0x90, 0xA2, 0x00, 0x6D, 0x00, 0x18, 0x63, 0x32,
+0x01, 0x6E, 0x00, 0x18, 0x62, 0x28, 0x5D, 0x67,
+0x90, 0xA2, 0x00, 0x6D, 0x00, 0x18, 0xD3, 0x39,
 0x68, 0xA1, 0x01, 0x6A, 0x6C, 0xEA, 0x22, 0x22,
 0x69, 0xA1, 0x02, 0x6A, 0x6C, 0xEA, 0xFF, 0x6B,
 0x6C, 0xEA, 0x04, 0x22, 0xAF, 0xA1, 0x90, 0x67,
-0x00, 0x18, 0x42, 0x32, 0x63, 0xA1, 0x80, 0x6A,
+0x00, 0x18, 0xB2, 0x39, 0x63, 0xA1, 0x80, 0x6A,
 0x4B, 0xEA, 0x6D, 0xEA, 0x41, 0x6B, 0x6B, 0xEB,
 0x6C, 0xEA, 0x00, 0x6D, 0xC5, 0x67, 0x43, 0xC1,
-0x91, 0x67, 0x00, 0x18, 0xDD, 0x31, 0x91, 0x67,
-0x00, 0x18, 0xF3, 0x31, 0x8D, 0xA9, 0x00, 0x18,
-0x00, 0x32, 0x7D, 0x67, 0x90, 0xA3, 0x01, 0x6D,
-0x00, 0x18, 0x63, 0x32, 0x68, 0xA1, 0x02, 0x6A,
+0x91, 0x67, 0x00, 0x18, 0x4D, 0x39, 0x91, 0x67,
+0x00, 0x18, 0x63, 0x39, 0x8D, 0xA9, 0x00, 0x18,
+0x70, 0x39, 0x7D, 0x67, 0x90, 0xA3, 0x01, 0x6D,
+0x00, 0x18, 0xD3, 0x39, 0x68, 0xA1, 0x02, 0x6A,
 0x6C, 0xEA, 0x6A, 0x22, 0x63, 0xA1, 0x7F, 0x6A,
 0x6C, 0xEA, 0x43, 0xC1, 0x4E, 0xA1, 0x5A, 0x32,
 0x01, 0x4A, 0x0B, 0xD2, 0x0B, 0x93, 0xFF, 0x6A,
@@ -31463,12 +33994,12 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x40, 0x6A, 0x09, 0xD2, 0x68, 0xA1, 0x04, 0x6A,
 0x6C, 0xEA, 0x0A, 0x2A, 0x69, 0xA1, 0x02, 0x6A,
 0x6C, 0xEA, 0xFF, 0x6B, 0x6C, 0xEA, 0x04, 0x22,
-0x07, 0x94, 0x09, 0x95, 0x00, 0x18, 0x42, 0x32,
+0x07, 0x94, 0x09, 0x95, 0x00, 0x18, 0xB2, 0x39,
 0x08, 0x93, 0xA5, 0xA9, 0x09, 0x96, 0xFF, 0xF7,
 0x1F, 0x68, 0xB5, 0xE3, 0x0C, 0xED, 0x91, 0x67,
-0x00, 0x18, 0xDD, 0x31, 0x91, 0x67, 0x00, 0x18,
-0xF3, 0x31, 0x5D, 0x67, 0x90, 0xA2, 0x01, 0x6D,
-0x00, 0x18, 0x63, 0x32, 0x08, 0x92, 0x0A, 0x93,
+0x00, 0x18, 0x4D, 0x39, 0x91, 0x67, 0x00, 0x18,
+0x63, 0x39, 0x5D, 0x67, 0x90, 0xA2, 0x01, 0x6D,
+0x00, 0x18, 0xD3, 0x39, 0x08, 0x92, 0x0A, 0x93,
 0x40, 0x4A, 0x0C, 0xEA, 0x01, 0x4B, 0x08, 0xD2,
 0x06, 0x92, 0x0A, 0xD3, 0x07, 0x93, 0xC0, 0x4A,
 0x06, 0xD2, 0x40, 0x4B, 0x07, 0xD3, 0x06, 0x93,
@@ -31479,168 +34010,199 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x18, 0xD1, 0x17, 0xD0, 0xFF, 0x6A, 0x04, 0x01,
 0xEC, 0xEA, 0x1A, 0xD4, 0x1B, 0xD5, 0x91, 0x67,
 0x1C, 0xD6, 0x00, 0x6D, 0x40, 0x6E, 0x30, 0xF0,
-0x20, 0x68, 0xA5, 0xF1, 0x0C, 0x48, 0x14, 0xD2,
-0x00, 0x18, 0x73, 0x23, 0x01, 0x6D, 0xC5, 0x67,
-0x90, 0x67, 0x00, 0x18, 0x73, 0x23, 0x81, 0x40,
-0x03, 0x6D, 0x01, 0x6E, 0x00, 0x18, 0x73, 0x23,
-0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF4, 0x0C, 0x4A,
-0x08, 0x6B, 0x23, 0xF5, 0x76, 0xC2, 0x23, 0xF5,
-0x66, 0xA2, 0x1A, 0x96, 0x30, 0xF0, 0x20, 0x6C,
+0x20, 0x68, 0x05, 0xF1, 0x10, 0x48, 0x14, 0xD2,
+0x00, 0x18, 0x5D, 0x28, 0x01, 0x6D, 0xC5, 0x67,
+0x90, 0x67, 0x00, 0x18, 0x5D, 0x28, 0x81, 0x40,
+0x03, 0x6D, 0x01, 0x6E, 0x00, 0x18, 0x5D, 0x28,
+0x30, 0xF0, 0x20, 0x6A, 0xC1, 0xF3, 0x1C, 0x4A,
+0x08, 0x6B, 0x43, 0xF5, 0x6A, 0xC2, 0x23, 0xF5,
+0x7A, 0xA2, 0x1A, 0x96, 0x30, 0xF0, 0x20, 0x6C,
 0x15, 0xD3, 0x40, 0x6B, 0xB1, 0x67, 0x23, 0xF5,
-0x66, 0xC2, 0xA5, 0xF1, 0x04, 0x4C, 0x00, 0x18,
-0x85, 0x32, 0x00, 0x69, 0x30, 0xF0, 0x20, 0x68,
-0xA5, 0xF1, 0x0C, 0x48, 0x90, 0x67, 0x06, 0x6D,
-0x01, 0x6E, 0x00, 0x18, 0x73, 0x23, 0x81, 0x40,
-0x03, 0x6D, 0x01, 0x6E, 0x00, 0x18, 0x73, 0x23,
-0x1A, 0x96, 0x30, 0xF0, 0x20, 0x6C, 0xA5, 0xF1,
-0x04, 0x4C, 0x04, 0x05, 0x00, 0x18, 0x85, 0x32,
+0x7A, 0xC2, 0x05, 0xF1, 0x08, 0x4C, 0x00, 0x18,
+0xF5, 0x39, 0x00, 0x69, 0x30, 0xF0, 0x20, 0x68,
+0x05, 0xF1, 0x10, 0x48, 0x90, 0x67, 0x06, 0x6D,
+0x01, 0x6E, 0x00, 0x18, 0x5D, 0x28, 0x81, 0x40,
+0x03, 0x6D, 0x01, 0x6E, 0x00, 0x18, 0x5D, 0x28,
+0x1A, 0x96, 0x30, 0xF0, 0x20, 0x6C, 0x05, 0xF1,
+0x08, 0x4C, 0x04, 0x05, 0x00, 0x18, 0xF5, 0x39,
 0x01, 0x49, 0xFF, 0x6A, 0x4C, 0xE9, 0x04, 0x71,
 0xE5, 0x61, 0x90, 0x67, 0x12, 0x6D, 0x01, 0x6E,
-0x00, 0x18, 0x73, 0x23, 0x9D, 0x67, 0x67, 0x44,
+0x00, 0x18, 0x5D, 0x28, 0x9D, 0x67, 0x67, 0x44,
 0x4D, 0x4B, 0x80, 0xA3, 0x30, 0xF0, 0x20, 0x6A,
-0x1B, 0x95, 0x1A, 0x96, 0xA5, 0xF1, 0x92, 0xC2,
-0x30, 0xF0, 0x20, 0x6C, 0xA5, 0xF1, 0x04, 0x4C,
-0x00, 0x18, 0x85, 0x32, 0x1C, 0x94, 0x14, 0x95,
-0x00, 0x18, 0x07, 0x32, 0x19, 0x97, 0x18, 0x91,
+0x1B, 0x95, 0x1A, 0x96, 0x05, 0xF1, 0x96, 0xC2,
+0x30, 0xF0, 0x20, 0x6C, 0x05, 0xF1, 0x08, 0x4C,
+0x00, 0x18, 0xF5, 0x39, 0x1C, 0x94, 0x14, 0x95,
+0x00, 0x18, 0x77, 0x39, 0x19, 0x97, 0x18, 0x91,
 0x17, 0x90, 0x0D, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFA, 0x63, 0x0B, 0x62, 0x0A, 0xD1, 0x09, 0xD0,
-0x30, 0xF0, 0x20, 0x68, 0x81, 0xF4, 0x0C, 0x48,
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+0x30, 0xF0, 0x20, 0x6B, 0xC1, 0xF3, 0x1C, 0x4B,
+0x80, 0xA2, 0xFF, 0xF7, 0x1F, 0x6E, 0x06, 0xF0,
+0x8C, 0xC3, 0x30, 0xF0, 0x20, 0x6C, 0x81, 0xF2,
+0x98, 0x9C, 0xA0, 0xAC, 0x06, 0xF0, 0xAE, 0xCB,
 0xA0, 0xA2, 0xBF, 0x6B, 0xAC, 0xEB, 0x60, 0xC2,
 0xE0, 0xA2, 0x7F, 0x6D, 0xFF, 0x6B, 0xEC, 0xED,
 0xA0, 0xC2, 0xA0, 0xA2, 0xAC, 0xEB, 0x60, 0xC2,
 0x40, 0xAC, 0xFF, 0x6B, 0x21, 0x4B, 0xCC, 0xEA,
 0x6D, 0xEA, 0xCC, 0xEA, 0x40, 0xCC, 0x20, 0xE8,
-0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF4, 0x0C, 0x4A,
-0x30, 0xF0, 0x20, 0x6B, 0xE5, 0xF7, 0x98, 0xA2,
-0xC1, 0xF2, 0x7C, 0x9B, 0x80, 0xC3, 0xE5, 0xF7,
-0x7A, 0xAA, 0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF3,
-0x54, 0x9A, 0x60, 0xCA, 0x20, 0xE8, 0x00, 0x65,
-0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF6, 0x94, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0xC1, 0xF3, 0x1C, 0x4A,
+0x30, 0xF0, 0x20, 0x6B, 0x06, 0xF0, 0x8C, 0xA2,
+0xC1, 0xF1, 0x68, 0x9B, 0x80, 0xC3, 0x06, 0xF0,
+0x6E, 0xAA, 0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF2,
+0x58, 0x9A, 0x60, 0xCA, 0x20, 0xE8, 0x00, 0x65,
+0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF5, 0x94, 0x9A,
 0x04, 0x6B, 0x40, 0xA4, 0x4C, 0xEB, 0x04, 0x6A,
 0x06, 0x23, 0x60, 0xA4, 0x02, 0x6A, 0x6C, 0xEA,
 0x01, 0x5A, 0x58, 0x67, 0x01, 0x4A, 0x20, 0xE8,
-0x30, 0xF0, 0x20, 0x6B, 0x21, 0xF3, 0x78, 0x9B,
+0x30, 0xF0, 0x20, 0x6B, 0x81, 0xF2, 0x7C, 0x9B,
 0xFF, 0xF7, 0x1F, 0x6A, 0x8C, 0xEA, 0x40, 0xCB,
-0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF6, 0x74, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF5, 0x74, 0x9A,
 0x82, 0x34, 0x10, 0x6A, 0xC0, 0xA3, 0x4B, 0xEA,
 0x92, 0x34, 0x4C, 0xEC, 0x0F, 0x6A, 0xCC, 0xEA,
 0xFF, 0x6D, 0x4D, 0xEC, 0xAC, 0xEC, 0x80, 0xC3,
@@ -31650,133 +34212,31 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x18, 0x6A, 0x8C, 0xEA, 0x08, 0x4A, 0x20, 0xE8,
 0xFF, 0xF7, 0x18, 0x6A, 0x8C, 0xEA, 0x20, 0xE8,
 0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
-0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF4, 0x0C, 0x4A,
-0xA2, 0xF1, 0x68, 0xA2, 0xFF, 0x68, 0x24, 0x67,
-0x02, 0x73, 0x0C, 0xE9, 0x1B, 0x61, 0x01, 0x71,
-0x3B, 0x61, 0x82, 0xF7, 0x80, 0xA2, 0x01, 0x6B,
-0x8D, 0xEB, 0x82, 0xF7, 0x60, 0xC2, 0xC0, 0xF0,
-0x6A, 0xA2, 0x80, 0x6C, 0x8B, 0xEC, 0x8C, 0xEB,
-0x0C, 0xEB, 0x0A, 0x23, 0x30, 0xF0, 0x20, 0x6A,
-0x21, 0xF3, 0x7C, 0x9A, 0x40, 0xA3, 0x0C, 0xEA,
-0x8E, 0xEA, 0x0C, 0xEA, 0x40, 0xC3, 0x24, 0x10,
-0x01, 0x6C, 0x20, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0xE1, 0xF2, 0x50, 0x9A, 0x01, 0x6B, 0x6B, 0xEB,
-0x60, 0xC2, 0x64, 0x6C, 0x00, 0x18, 0x67, 0x23,
-0x30, 0xF0, 0x20, 0x6A, 0xC0, 0xF7, 0x60, 0x9A,
-0x01, 0x6C, 0x40, 0xA3, 0x0C, 0xEA, 0x8D, 0xEA,
-0x0C, 0xEA, 0x40, 0xC3, 0x30, 0xF0, 0x20, 0x6A,
-0x21, 0xF3, 0x7C, 0x9A, 0x80, 0x6C, 0x8B, 0xEC,
-0x40, 0xA3, 0x0C, 0xEA, 0x8E, 0xEA, 0x0C, 0xEA,
-0x40, 0xC3, 0x91, 0x67, 0x00, 0x18, 0xDB, 0x27,
-0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF4, 0x0C, 0x4A,
-0x80, 0xF0, 0x9F, 0xA2, 0x02, 0x6B, 0x6B, 0xEB,
-0x8C, 0xEB, 0xC0, 0xF0, 0x90, 0xA2, 0x80, 0xF0,
-0x7F, 0xC2, 0x41, 0x6B, 0x6B, 0xEB, 0x8C, 0xEB,
-0xC0, 0xF0, 0x70, 0xC2, 0x07, 0x97, 0x06, 0x91,
-0x05, 0x90, 0x04, 0x63, 0x00, 0xEF, 0x00, 0x65,
-0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x30, 0xF0,
-0x20, 0x6A, 0xC0, 0xF7, 0x60, 0x9A, 0xF0, 0x6A,
-0x30, 0xF0, 0x20, 0x68, 0x80, 0xA3, 0x81, 0xF4,
-0x0C, 0x48, 0x8C, 0xEA, 0x40, 0xC3, 0xE0, 0xF0,
-0x8D, 0xA0, 0x00, 0x18, 0x5D, 0x1A, 0x30, 0xF0,
-0x20, 0x6A, 0xC0, 0xF7, 0x5C, 0x9A, 0x10, 0xF0,
-0x00, 0x6B, 0x60, 0xDA, 0xA2, 0xF1, 0x48, 0xA0,
-0x01, 0x72, 0x0A, 0x61, 0x01, 0x6C, 0x10, 0x6D,
-0x00, 0x18, 0x62, 0x21, 0xFB, 0x6E, 0x01, 0x6C,
-0x10, 0x6D, 0x4C, 0xEE, 0x00, 0x18, 0x55, 0x21,
-0x05, 0x97, 0x04, 0x90, 0x03, 0x63, 0x00, 0xEF,
-0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
-0x40, 0xA4, 0x64, 0x67, 0x01, 0x6C, 0x8C, 0xEA,
-0xFF, 0x6F, 0x03, 0x2A, 0x00, 0x18, 0x68, 0x34,
-0xF6, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF4,
-0x0C, 0x4A, 0x05, 0x6D, 0x83, 0xF1, 0xB8, 0xC2,
-0xA0, 0xA3, 0xC0, 0xF0, 0x09, 0xA2, 0x02, 0x6E,
-0xCB, 0xEE, 0x8C, 0xED, 0x0C, 0xEE, 0xAD, 0xEE,
-0xC0, 0xF0, 0xC9, 0xC2, 0xA0, 0xA3, 0xA6, 0x35,
-0x8C, 0xED, 0xA4, 0x30, 0x03, 0x6D, 0xAB, 0xED,
-0xCC, 0xED, 0x0D, 0xED, 0xC0, 0xF0, 0xA9, 0xC2,
-0xC0, 0xA3, 0xCA, 0x36, 0x8C, 0xEE, 0xC8, 0x30,
-0x05, 0x6E, 0xCB, 0xEE, 0xAC, 0xEE, 0x0D, 0xEE,
-0xC0, 0xF0, 0xC9, 0xC2, 0xA0, 0xA3, 0xAE, 0x35,
-0x8C, 0xED, 0xAC, 0x30, 0x09, 0x6D, 0xAB, 0xED,
-0xCC, 0xED, 0x0D, 0xED, 0xC0, 0xF0, 0xA9, 0xC2,
-0xC0, 0xA3, 0xD2, 0x36, 0x8C, 0xEE, 0xD0, 0x30,
-0x11, 0x6E, 0xCB, 0xEE, 0xAC, 0xEE, 0x0D, 0xEE,
-0xC0, 0xF0, 0xC9, 0xC2, 0xA0, 0xA3, 0xB6, 0x35,
-0x8C, 0xED, 0xB4, 0x30, 0x21, 0x6D, 0xAB, 0xED,
-0xCC, 0xED, 0x0D, 0xED, 0xC0, 0xF0, 0xA9, 0xC2,
-0xC0, 0xA3, 0xC0, 0xF0, 0x0A, 0xA2, 0xDA, 0x36,
-0x8C, 0xEE, 0x41, 0x6C, 0x8B, 0xEC, 0xD8, 0x36,
-0xAC, 0xEC, 0xCD, 0xEC, 0xC0, 0xF0, 0x89, 0xC2,
-0xC0, 0xA3, 0x7F, 0x6D, 0xAC, 0xEC, 0xDE, 0x36,
-0xDC, 0x36, 0xCD, 0xEC, 0xC0, 0xF0, 0x89, 0xC2,
-0xC1, 0xA3, 0x0C, 0xED, 0xDE, 0x36, 0xDC, 0x36,
-0xCD, 0xED, 0xC0, 0xF0, 0xAA, 0xC2, 0x04, 0x6D,
-0xAC, 0xEC, 0xEC, 0xEC, 0x09, 0x24, 0x30, 0xF0,
-0x20, 0x6A, 0xC0, 0xF7, 0x80, 0x9A, 0x40, 0xA4,
-0xEC, 0xEA, 0xAD, 0xEA, 0xEC, 0xEA, 0x40, 0xC4,
-0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF5, 0x55, 0xA2,
-0x08, 0x6E, 0xFF, 0x6D, 0xCC, 0xEA, 0x09, 0x22,
-0x30, 0xF0, 0x20, 0x6A, 0xC0, 0xF7, 0x80, 0x9A,
-0x40, 0xA4, 0xAC, 0xEA, 0xCD, 0xEA, 0xAC, 0xEA,
-0x40, 0xC4, 0x30, 0xF0, 0x20, 0x6A, 0x41, 0xF5,
-0x55, 0xA2, 0x02, 0x6E, 0xFF, 0x6D, 0xCC, 0xEA,
-0x09, 0x22, 0x30, 0xF0, 0x20, 0x6A, 0xC0, 0xF7,
-0x80, 0x9A, 0x40, 0xA4, 0xAC, 0xEA, 0xCD, 0xEA,
-0xAC, 0xEA, 0x40, 0xC4, 0x30, 0xF0, 0x20, 0x6A,
-0x81, 0xF4, 0x0C, 0x4A, 0xA2, 0xF1, 0x88, 0xA2,
-0x02, 0x74, 0x08, 0x61, 0xC0, 0xF0, 0x8A, 0xA2,
-0x80, 0x6A, 0x4B, 0xEA, 0x8C, 0xEA, 0xFF, 0x6C,
-0x8C, 0xEA, 0x3A, 0x2A, 0x30, 0xF0, 0x20, 0x6D,
-0x81, 0xF4, 0x0C, 0x4D, 0x41, 0xA3, 0xC0, 0xF0,
-0xCA, 0xA5, 0x80, 0x6C, 0x7F, 0x6F, 0x8B, 0xEC,
-0xEC, 0xEA, 0xCC, 0xEC, 0x4D, 0xEC, 0xC0, 0xF0,
-0x8A, 0xC5, 0x42, 0xA3, 0xC0, 0xF0, 0xCC, 0xA5,
-0xEC, 0xEC, 0xC0, 0xF0, 0x4B, 0xC5, 0x03, 0xA3,
-0x1E, 0x65, 0x02, 0x6E, 0x01, 0x6A, 0xCB, 0xEE,
-0x38, 0x67, 0x4C, 0xE8, 0x2C, 0xEE, 0x0D, 0xEE,
-0xC0, 0xF0, 0xCC, 0xC5, 0x03, 0xA3, 0x4C, 0xEE,
-0x06, 0x30, 0x04, 0x30, 0x0D, 0xEE, 0xC0, 0xF0,
-0xCC, 0xC5, 0x64, 0xA3, 0xC0, 0xF0, 0x0D, 0xA5,
-0x6A, 0x33, 0x4C, 0xEB, 0x68, 0x36, 0x05, 0x6B,
-0x6B, 0xEB, 0x0C, 0xEB, 0xCD, 0xEB, 0xC0, 0xF0,
-0x6D, 0xC5, 0xC0, 0xF0, 0xA9, 0xA5, 0xB6, 0x35,
-0x4E, 0xED, 0x4C, 0xED, 0x00, 0x18, 0xB7, 0x27,
-0x30, 0xF0, 0x20, 0x6A, 0x23, 0xF6, 0x54, 0xA2,
-0x01, 0x72, 0x0C, 0x61, 0x01, 0x6C, 0x10, 0x6D,
-0x00, 0x18, 0x62, 0x21, 0x04, 0x6B, 0x4D, 0xEB,
-0xFF, 0x6E, 0x01, 0x6C, 0x10, 0x6D, 0x6C, 0xEE,
-0x00, 0x18, 0x55, 0x21, 0x30, 0xF0, 0x20, 0x6C,
-0x05, 0x6B, 0x30, 0xF0, 0x20, 0x6A, 0x64, 0xF4,
-0x0D, 0x4C, 0x00, 0x6D, 0x08, 0x6E, 0x24, 0xF6,
-0x64, 0xC2, 0x00, 0x18, 0x73, 0x23, 0x07, 0x97,
-0x06, 0x91, 0x05, 0x90, 0x04, 0x63, 0x00, 0xEF,
-0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
 0x04, 0x67, 0x06, 0x4C, 0xB1, 0xE4, 0x25, 0x67,
-0x00, 0x18, 0xB9, 0x22, 0x86, 0x72, 0x00, 0x6A,
+0x00, 0x18, 0xBB, 0x27, 0x86, 0x72, 0x00, 0x6A,
 0x08, 0x61, 0x87, 0x40, 0x31, 0xE4, 0x00, 0x18,
-0xB9, 0x22, 0xDD, 0x6B, 0x6E, 0xEA, 0x01, 0x5A,
+0xBB, 0x27, 0xDD, 0x6B, 0x6E, 0xEA, 0x01, 0x5A,
 0x58, 0x67, 0x07, 0x97, 0x06, 0x91, 0x05, 0x90,
 0x04, 0x63, 0x00, 0xEF, 0xFA, 0x63, 0x0B, 0x62,
 0x0A, 0xD1, 0x09, 0xD0, 0x30, 0xF0, 0x20, 0x6A,
-0x21, 0xF0, 0x40, 0x9A, 0x0C, 0xD4, 0xFF, 0x6B,
-0x20, 0x9A, 0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF6,
+0xC0, 0xF6, 0x5C, 0x9A, 0x0C, 0xD4, 0xFF, 0x6B,
+0x20, 0x9A, 0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF5,
 0x50, 0x9A, 0x40, 0xA2, 0x82, 0x67, 0x6C, 0xEC,
-0x30, 0xF0, 0x20, 0x6A, 0x05, 0xD4, 0x41, 0xF5,
-0x9C, 0xA2, 0x01, 0x6A, 0x8C, 0xEA, 0x6C, 0xEA,
+0x30, 0xF0, 0x20, 0x6A, 0x05, 0xD4, 0xA1, 0xF4,
+0x9A, 0xA2, 0x01, 0x6A, 0x8C, 0xEA, 0x6C, 0xEA,
 0x00, 0x6B, 0x04, 0xD3, 0x36, 0x2A, 0x39, 0x10,
-0x81, 0x41, 0x00, 0x18, 0xB9, 0x22, 0x02, 0x67,
-0x91, 0x67, 0x00, 0x18, 0xB9, 0x22, 0x00, 0x30,
+0x81, 0x41, 0x00, 0x18, 0xBB, 0x27, 0x02, 0x67,
+0x91, 0x67, 0x00, 0x18, 0xBB, 0x27, 0x00, 0x30,
 0x82, 0x41, 0x4D, 0xE8, 0xE7, 0xF7, 0x1F, 0x6A,
-0x4C, 0xE8, 0x00, 0x18, 0xB9, 0x22, 0x83, 0x41,
-0x06, 0xD2, 0x00, 0x18, 0xB9, 0x22, 0x03, 0x6B,
+0x4C, 0xE8, 0x00, 0x18, 0xBB, 0x27, 0x83, 0x41,
+0x06, 0xD2, 0x00, 0x18, 0xBB, 0x27, 0x03, 0x6B,
 0x4C, 0xEB, 0x87, 0x43, 0x06, 0x93, 0x0F, 0x6A,
 0x11, 0x4C, 0x6C, 0xEA, 0x4C, 0x32, 0x51, 0xE4,
 0x91, 0xE0, 0xFF, 0xF7, 0x1F, 0x6A, 0x4C, 0xEC,
-0x00, 0x18, 0x30, 0x34, 0xFF, 0xF7, 0x1F, 0x6B,
+0x00, 0x18, 0xDE, 0x3B, 0xFF, 0xF7, 0x1F, 0x6B,
 0x0C, 0x94, 0x6C, 0xEA, 0x45, 0xE1, 0x23, 0xEC,
 0x02, 0x60, 0x8F, 0xEA, 0x45, 0xE1, 0x91, 0x67,
-0x00, 0x18, 0x20, 0x34, 0x04, 0x92, 0x01, 0x4A,
+0x00, 0x18, 0xCE, 0x3B, 0x04, 0x92, 0x01, 0x4A,
 0x04, 0xD2, 0x04, 0x93, 0xFF, 0x6A, 0x4C, 0xEB,
 0x04, 0xD3, 0x04, 0x94, 0x05, 0x92, 0x43, 0xEC,
 0xC7, 0x61, 0x0B, 0x97, 0x0A, 0x91, 0x09, 0x90,
@@ -31784,221 +34244,252 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x0A, 0xD1, 0x09, 0xD0, 0xFF, 0x6A, 0x4C, 0xEC,
 0x11, 0x6B, 0x8E, 0xEB, 0x05, 0x67, 0x0D, 0x23,
 0x3A, 0x6A, 0x8E, 0xEA, 0x33, 0x22, 0x4A, 0x2C,
-0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF7, 0x48, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0xE0, 0xF5, 0x5C, 0x9A,
 0x27, 0x45, 0x03, 0x49, 0x49, 0xE1, 0x80, 0xCA,
 0x4A, 0x10, 0x87, 0x45, 0x27, 0x45, 0x30, 0xF0,
-0x20, 0x6D, 0xA0, 0xF7, 0xA8, 0x9D, 0x13, 0x49,
+0x20, 0x6D, 0xE0, 0xF5, 0xBC, 0x9D, 0x13, 0x49,
 0x0D, 0x4C, 0xB5, 0xE1, 0x60, 0xCD, 0x30, 0xF0,
-0x20, 0x6B, 0xE0, 0xF7, 0x78, 0x9B, 0x30, 0xF0,
-0x20, 0x6D, 0x41, 0xF0, 0xA0, 0x9D, 0x6D, 0xE4,
+0x20, 0x6B, 0xA0, 0xF6, 0x74, 0x9B, 0x30, 0xF0,
+0x20, 0x6D, 0xE0, 0xF6, 0xBC, 0x9D, 0x6D, 0xE4,
 0x60, 0xA3, 0xB5, 0xE4, 0xA0, 0xA5, 0x4C, 0xEB,
 0x60, 0x33, 0xAC, 0xEA, 0x6D, 0xE2, 0xFF, 0xF7,
 0x1F, 0x6A, 0x4C, 0xEB, 0xA3, 0x67, 0x06, 0xD3,
-0x00, 0x18, 0x64, 0x31, 0xC7, 0x40, 0xE7, 0x40,
+0x00, 0x18, 0xD4, 0x38, 0xC7, 0x40, 0xE7, 0x40,
 0x04, 0xD2, 0x11, 0x6C, 0x06, 0x95, 0x05, 0x4E,
 0x09, 0x4F, 0x2A, 0x10, 0x30, 0xF0, 0x20, 0x6B,
-0xA0, 0xF7, 0x68, 0x9B, 0x27, 0x45, 0x23, 0x49,
+0xE0, 0xF5, 0x7C, 0x9B, 0x27, 0x45, 0x23, 0x49,
 0x6D, 0xE1, 0x85, 0x67, 0x40, 0xCB, 0x48, 0x6D,
-0x00, 0x18, 0x64, 0x31, 0x42, 0x34, 0xFF, 0xF7,
+0x00, 0x18, 0xD4, 0x38, 0x42, 0x34, 0xFF, 0xF7,
 0x1F, 0x6B, 0x82, 0x34, 0x6C, 0xEA, 0x89, 0xE2,
 0x42, 0x34, 0x82, 0x34, 0x49, 0xE4, 0x4F, 0xEA,
 0x6C, 0xEA, 0x14, 0x10, 0x30, 0xF0, 0x20, 0x6A,
-0xA0, 0xF7, 0x48, 0x9A, 0x27, 0x45, 0x03, 0x49,
+0xE0, 0xF5, 0x5C, 0x9A, 0x27, 0x45, 0x03, 0x49,
 0x49, 0xE1, 0x00, 0x6B, 0x60, 0xCA, 0x90, 0x67,
-0x14, 0x6D, 0x00, 0x18, 0x64, 0x31, 0x00, 0x6C,
+0x14, 0x6D, 0x00, 0x18, 0xD4, 0x38, 0x00, 0x6C,
 0x04, 0xD2, 0x14, 0x6D, 0xC4, 0x67, 0xE4, 0x67,
-0x00, 0x18, 0x7F, 0x31, 0x30, 0xF0, 0x20, 0x6B,
-0xA0, 0xF7, 0xA8, 0x9B, 0xFF, 0x6C, 0x42, 0x33,
+0x00, 0x18, 0xEF, 0x38, 0x30, 0xF0, 0x20, 0x6B,
+0xE0, 0xF5, 0xBC, 0x9B, 0xFF, 0x6C, 0x42, 0x33,
 0xB5, 0xE1, 0x8C, 0xEB, 0x60, 0xC5, 0x30, 0xF0,
-0x20, 0x6B, 0xA0, 0xF7, 0x6C, 0x9B, 0x8C, 0xEA,
+0x20, 0x6B, 0x00, 0xF6, 0x60, 0x9B, 0x8C, 0xEA,
 0x65, 0xE1, 0x40, 0xC1, 0x0B, 0x97, 0x0A, 0x91,
 0x09, 0x90, 0x06, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0xFF, 0x6A, 0x4C, 0xEC, 0x07, 0x6B, 0x8C, 0xEB,
+0x4C, 0xED, 0x8E, 0x34, 0x42, 0xF4, 0x10, 0x4C,
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+0x40, 0x9A, 0x59, 0xE6, 0x00, 0x18, 0xA8, 0x26,
 0x01, 0x6A, 0x01, 0x10, 0x00, 0x6A, 0x07, 0x97,
 0x04, 0x63, 0x00, 0xEF, 0xFA, 0x63, 0x0B, 0x62,
 0x0A, 0xD1, 0x09, 0xD0, 0x68, 0xA4, 0x30, 0xF0,
-0x20, 0x6A, 0x81, 0xF4, 0x0C, 0x4A, 0x91, 0xF6,
-0x8C, 0x43, 0x84, 0x34, 0x49, 0xE4, 0x80, 0xAA,
+0x20, 0x6A, 0xC1, 0xF3, 0x1C, 0x4A, 0xA1, 0xF6,
+0x84, 0x43, 0x84, 0x34, 0x49, 0xE4, 0x82, 0xAA,
 0x06, 0x6A, 0x6A, 0x24, 0x02, 0x73, 0x00, 0x68,
 0x27, 0x60, 0x03, 0x73, 0x09, 0x6A, 0x64, 0x61,
-0x52, 0x10, 0x49, 0xE0, 0x43, 0xF5, 0x2C, 0xA2,
+0x52, 0x10, 0x49, 0xE0, 0x63, 0xF5, 0x20, 0xA2,
 0x04, 0x71, 0x04, 0x60, 0x08, 0x71, 0x02, 0x60,
 0x0C, 0x71, 0x55, 0x61, 0x30, 0xF0, 0x20, 0x6B,
-0x81, 0xF4, 0x0C, 0x4B, 0x0D, 0xE3, 0x04, 0x02,
-0x43, 0xF5, 0x0C, 0x4B, 0x31, 0xE2, 0x04, 0x10,
+0xC1, 0xF3, 0x1C, 0x4B, 0x0D, 0xE3, 0x04, 0x02,
+0x63, 0xF5, 0x00, 0x4B, 0x31, 0xE2, 0x04, 0x10,
 0xA0, 0xA3, 0x01, 0x4B, 0xA0, 0xC2, 0x01, 0x4A,
 0x8A, 0xEA, 0xFA, 0x61, 0x04, 0x04, 0x00, 0x18,
-0x00, 0x29, 0x03, 0x72, 0x42, 0x60, 0x43, 0x22,
+0x88, 0x2F, 0x03, 0x72, 0x42, 0x60, 0x43, 0x22,
 0x01, 0xE1, 0xFF, 0xF7, 0x1F, 0x6A, 0x4C, 0xE8,
-0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF4, 0x0C, 0x4A,
-0x23, 0xF5, 0x7C, 0xAA, 0x63, 0xE8, 0xD5, 0x61,
-0x00, 0x6B, 0x23, 0xF5, 0x7C, 0xCA, 0x33, 0x10,
-0x49, 0xE0, 0x44, 0xF5, 0x2C, 0xA2, 0x04, 0x71,
+0x30, 0xF0, 0x20, 0x6A, 0xC1, 0xF3, 0x1C, 0x4A,
+0x43, 0xF5, 0x70, 0xAA, 0x63, 0xE8, 0xD5, 0x61,
+0x00, 0x6B, 0x43, 0xF5, 0x70, 0xCA, 0x33, 0x10,
+0x49, 0xE0, 0x64, 0xF5, 0x20, 0xA2, 0x04, 0x71,
 0x04, 0x60, 0x08, 0x71, 0x02, 0x60, 0x0C, 0x71,
-0x26, 0x61, 0x30, 0xF0, 0x20, 0x6B, 0x81, 0xF4,
-0x0C, 0x4B, 0x0D, 0xE3, 0x04, 0x02, 0x44, 0xF5,
-0x0C, 0x4B, 0x31, 0xE2, 0x04, 0x10, 0xA0, 0xA3,
+0x26, 0x61, 0x30, 0xF0, 0x20, 0x6B, 0xC1, 0xF3,
+0x1C, 0x4B, 0x0D, 0xE3, 0x04, 0x02, 0x64, 0xF5,
+0x00, 0x4B, 0x31, 0xE2, 0x04, 0x10, 0xA0, 0xA3,
 0x01, 0x4B, 0xA0, 0xC2, 0x01, 0x4A, 0x8A, 0xEA,
-0xFA, 0x61, 0x04, 0x04, 0x00, 0x18, 0x00, 0x29,
+0xFA, 0x61, 0x04, 0x04, 0x00, 0x18, 0x88, 0x2F,
 0x03, 0x72, 0x13, 0x60, 0x14, 0x22, 0x01, 0xE1,
 0xFF, 0xF7, 0x1F, 0x6A, 0x4C, 0xE8, 0x30, 0xF0,
-0x20, 0x6A, 0x81, 0xF4, 0x0C, 0x4A, 0x23, 0xF5,
-0x7E, 0xAA, 0x63, 0xE8, 0xD5, 0x61, 0x00, 0x6B,
-0x23, 0xF5, 0x7E, 0xCA, 0x04, 0x10, 0x07, 0x6A,
+0x20, 0x6A, 0xC1, 0xF3, 0x1C, 0x4A, 0x43, 0xF5,
+0x72, 0xAA, 0x63, 0xE8, 0xD5, 0x61, 0x00, 0x6B,
+0x43, 0xF5, 0x72, 0xCA, 0x04, 0x10, 0x07, 0x6A,
 0x03, 0x10, 0x08, 0x6A, 0x01, 0x10, 0x00, 0x6A,
 0x0B, 0x97, 0x0A, 0x91, 0x09, 0x90, 0x06, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0xF9, 0x63, 0x0D, 0x62,
 0x0C, 0xD1, 0x0B, 0xD0, 0x30, 0xF0, 0x20, 0x6A,
-0x81, 0xF4, 0x0C, 0x4A, 0x00, 0x6B, 0xC5, 0xF7,
-0x74, 0xDA, 0xC5, 0xF7, 0x78, 0xDA, 0x69, 0xA4,
+0xC1, 0xF3, 0x1C, 0x4A, 0x00, 0x6B, 0xE5, 0xF7,
+0x68, 0xDA, 0xE5, 0xF7, 0x6C, 0xDA, 0x69, 0xA4,
 0x48, 0xA4, 0x60, 0x33, 0x49, 0xE3, 0x09, 0xD2,
 0x09, 0x93, 0xFF, 0xF7, 0x1F, 0x6A, 0x4C, 0xEB,
 0x09, 0xD3, 0x6A, 0xA4, 0x01, 0x73, 0x02, 0x61,
 0x4B, 0xA4, 0x08, 0x10, 0x30, 0xF0, 0x20, 0x6B,
-0x80, 0xF7, 0x64, 0x9B, 0x60, 0xAB, 0x6C, 0xEA,
+0xC0, 0xF5, 0x7C, 0x9B, 0x60, 0xAB, 0x6C, 0xEA,
 0x6B, 0xA4, 0x49, 0xE3, 0x5C, 0x32, 0x30, 0x4A,
 0x08, 0xD2, 0x00, 0x69, 0x2F, 0x10, 0x30, 0xF0,
-0x20, 0x6A, 0xA0, 0xF7, 0x48, 0x9A, 0x08, 0x93,
+0x20, 0x6A, 0xE0, 0xF5, 0x5C, 0x9A, 0x08, 0x93,
 0xFF, 0x68, 0x49, 0xE3, 0x40, 0xA2, 0x4C, 0xE8,
 0x04, 0x70, 0x06, 0x60, 0x08, 0x70, 0x04, 0x60,
 0x0C, 0x70, 0x02, 0x60, 0x01, 0x6A, 0x22, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0xA0, 0xF7, 0x68, 0x9A,
+0x30, 0xF0, 0x20, 0x6A, 0xE0, 0xF5, 0x7C, 0x9A,
 0x08, 0x92, 0x6D, 0xE2, 0x04, 0x02, 0x11, 0xE2,
 0x04, 0x10, 0xA0, 0xA3, 0x01, 0x4B, 0xA0, 0xC2,
 0x01, 0x4A, 0x8A, 0xEA, 0xFA, 0x61, 0x04, 0x04,
-0x00, 0x18, 0x00, 0x29, 0x03, 0x72, 0x02, 0x61,
+0x00, 0x18, 0x88, 0x2F, 0x03, 0x72, 0x02, 0x61,
 0x02, 0x6A, 0x0C, 0x10, 0x0A, 0x22, 0x08, 0x93,
 0x01, 0x49, 0xFF, 0xF7, 0x1F, 0x6A, 0x0D, 0xE3,
 0x08, 0xD3, 0x4C, 0xE9, 0x09, 0x92, 0x43, 0xE9,
 0xCE, 0x61, 0x00, 0x6A, 0x0D, 0x97, 0x0C, 0x91,
 0x0B, 0x90, 0x07, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFB, 0x63, 0x09, 0x62, 0x08, 0xD1, 0x07, 0xD0,
-0x30, 0xF0, 0x20, 0x68, 0x23, 0xF6, 0x18, 0x48,
+0x30, 0xF0, 0x20, 0x68, 0x83, 0xF5, 0x1C, 0x48,
 0x00, 0x69, 0x91, 0x67, 0x04, 0x05, 0x00, 0x18,
-0xA7, 0x33, 0x01, 0x72, 0x02, 0x60, 0x03, 0x6A,
+0x55, 0x3B, 0x01, 0x72, 0x02, 0x60, 0x03, 0x6A,
 0x09, 0x10, 0x7D, 0x67, 0x50, 0xA3, 0x01, 0x49,
 0x00, 0xF4, 0x00, 0x71, 0x40, 0xC0, 0x01, 0x48,
 0xF0, 0x61, 0x00, 0x6A, 0x09, 0x97, 0x08, 0x91,
@@ -32025,786 +34516,846 @@ u8 array_mp_8822b_fw_wowlan[] = {
 0x00, 0xF1, 0x48, 0x43, 0x00, 0xF1, 0x80, 0x43,
 0xA0, 0xA5, 0x40, 0xA2, 0x80, 0xA4, 0xB7, 0xC3,
 0x58, 0xC3, 0x99, 0xC3, 0x04, 0x04, 0x00, 0x18,
-0xB4, 0x23, 0x3E, 0x95, 0xFF, 0xF7, 0x1F, 0x6A,
+0xB1, 0x28, 0x3E, 0x95, 0xFF, 0xF7, 0x1F, 0x6A,
 0x25, 0xE0, 0x4C, 0xE9, 0x01, 0x4D, 0xFF, 0x6A,
 0x4C, 0xED, 0x3E, 0xD5, 0x3F, 0x92, 0x43, 0xE9,
 0xB3, 0x61, 0x47, 0x97, 0x46, 0x91, 0x45, 0x90,
 0x24, 0x63, 0x00, 0xEF, 0xFD, 0x63, 0x05, 0x62,
 0xA7, 0x44, 0x30, 0xF0, 0x20, 0x6C, 0x01, 0x4D,
-0x47, 0xF4, 0x1B, 0x4C, 0x03, 0x6E, 0x00, 0x18,
-0x78, 0x23, 0x05, 0x97, 0x00, 0x6A, 0x03, 0x63,
+0xA7, 0xF3, 0x1F, 0x4C, 0x03, 0x6E, 0x00, 0x18,
+0x62, 0x28, 0x05, 0x97, 0x00, 0x6A, 0x03, 0x63,
 0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
-0x30, 0xF0, 0x20, 0x6C, 0xC5, 0xF1, 0x04, 0x4C,
+0x30, 0xF0, 0x20, 0x6C, 0x25, 0xF1, 0x08, 0x4C,
 0x00, 0x6D, 0xC2, 0xF3, 0x10, 0x6E, 0x00, 0x18,
-0x73, 0x23, 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF,
-0x30, 0xF0, 0x20, 0x6A, 0x81, 0xF4, 0x0C, 0x4A,
-0x05, 0x6B, 0x06, 0xF1, 0x74, 0xDA, 0x01, 0x6B,
-0x06, 0xF1, 0x70, 0xDA, 0x20, 0xE8, 0x00, 0x65,
+0x5D, 0x28, 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF,
+0xFF, 0x63, 0x01, 0xD0, 0xFF, 0x6A, 0x4C, 0xED,
+0x4C, 0xEE, 0x4C, 0xEF, 0x30, 0xF0, 0x20, 0x6A,
+0xC0, 0xF5, 0x5C, 0x9A, 0xFF, 0xF7, 0x1F, 0x6B,
+0x6C, 0xEC, 0x00, 0xAA, 0xE1, 0xF7, 0x1F, 0x6A,
+0x0C, 0xEA, 0x30, 0xF0, 0x20, 0x68, 0xC0, 0xF5,
+0x18, 0x98, 0x51, 0xE4, 0x6C, 0xEC, 0x80, 0xC8,
+0x9C, 0x32, 0x30, 0xF0, 0x20, 0x6C, 0xA1, 0xF2,
+0x84, 0x9C, 0x30, 0xF0, 0x20, 0x68, 0xA1, 0xF2,
+0x08, 0x98, 0x91, 0xE2, 0x80, 0xAC, 0x01, 0xE2,
+0x00, 0x98, 0x6C, 0xEC, 0x05, 0x25, 0x10, 0xF0,
+0x00, 0x6D, 0xAB, 0xED, 0xAD, 0xEC, 0x6C, 0xEC,
+0xD8, 0xF0, 0x00, 0x6B, 0x8C, 0xEB, 0x30, 0xF0,
+0x20, 0x6C, 0xA1, 0xF2, 0x84, 0x9C, 0x91, 0xE2,
+0x60, 0xCC, 0x30, 0xF0, 0x20, 0x6B, 0x01, 0xF2,
+0x70, 0x9B, 0x6D, 0xE2, 0x80, 0xA3, 0x01, 0x6B,
+0x8C, 0xEB, 0x05, 0x23, 0x03, 0xF7, 0x01, 0x6B,
+0x6B, 0xEB, 0x0C, 0xEB, 0x06, 0x10, 0x1F, 0xF7,
+0x01, 0x6B, 0x6B, 0xEB, 0x0C, 0xEB, 0xE0, 0x37,
+0xED, 0xEB, 0x30, 0xF0, 0x20, 0x6C, 0xA1, 0xF2,
+0x8C, 0x9C, 0x80, 0xF4, 0xC0, 0x36, 0x6C, 0xEC,
+0x30, 0xF0, 0x20, 0x6B, 0x20, 0xF5, 0x68, 0x9B,
+0x6D, 0xEE, 0x30, 0xF0, 0x20, 0x6B, 0xA1, 0xF2,
+0x68, 0x9B, 0x8D, 0xEE, 0x6D, 0xE2, 0xC0, 0xDB,
+0x30, 0xF0, 0x20, 0x6B, 0xC0, 0xF5, 0x90, 0x9B,
+0xF7, 0x6B, 0x91, 0xE2, 0xA0, 0xA4, 0xAC, 0xEB,
+0x60, 0xC4, 0x01, 0x90, 0x01, 0x63, 0x20, 0xE8,
+0xDF, 0x63, 0x41, 0x62, 0x40, 0xD0, 0x01, 0x68,
+0x00, 0x6A, 0x0B, 0xE8, 0x82, 0x67, 0x42, 0x6D,
+0xD0, 0x67, 0x04, 0xD2, 0x00, 0x18, 0x18, 0x32,
+0x30, 0xF0, 0x20, 0x6B, 0x01, 0xF2, 0x6C, 0x9B,
+0x4C, 0xEB, 0x2D, 0x2B, 0x00, 0x6C, 0x42, 0x6D,
+0xD0, 0x67, 0x00, 0x18, 0x18, 0x32, 0x1F, 0xF4,
+0x00, 0x6B, 0x4C, 0xEB, 0x62, 0x33, 0x6A, 0x33,
+0x2D, 0x5B, 0x04, 0xD3, 0x0F, 0x61, 0x5D, 0x67,
+0x7D, 0x67, 0x14, 0xC2, 0x1D, 0x6A, 0x56, 0xC3,
+0x04, 0x6A, 0x06, 0x04, 0x57, 0xC3, 0x04, 0x05,
+0x04, 0x6E, 0x00, 0x18, 0x62, 0x28, 0x05, 0x04,
+0x00, 0x18, 0xB1, 0x28, 0x01, 0x68, 0x0B, 0xE8,
+0x00, 0x6C, 0x42, 0x6D, 0xD0, 0x67, 0x00, 0x18,
+0x18, 0x32, 0x30, 0xF0, 0x20, 0x6B, 0x01, 0xF2,
+0xEC, 0x9B, 0x00, 0x6C, 0x42, 0x6D, 0xD0, 0x67,
+0x4D, 0xEF, 0x00, 0x18, 0x27, 0x33, 0x41, 0x97,
+0x40, 0x90, 0x21, 0x63, 0x00, 0xEF, 0x00, 0x65,
+0xFB, 0x63, 0x09, 0x62, 0x08, 0xD1, 0x07, 0xD0,
+0xFF, 0xF7, 0x1F, 0x6B, 0xAC, 0xEB, 0x05, 0xD3,
+0x30, 0xF0, 0x20, 0x6B, 0xC0, 0xF5, 0x7C, 0x9B,
+0xFF, 0x6A, 0x8C, 0xEA, 0x80, 0xAB, 0xE1, 0xF7,
+0x1F, 0x6B, 0x00, 0x68, 0x8C, 0xEB, 0x69, 0xE2,
+0x30, 0xF0, 0x20, 0x6B, 0x20, 0xF6, 0x88, 0x9B,
+0x5C, 0x32, 0x91, 0xE2, 0x04, 0xD4, 0x18, 0x10,
+0x04, 0x92, 0x20, 0x9A, 0x07, 0x28, 0x01, 0x6D,
+0x83, 0xF1, 0x18, 0x6C, 0xAB, 0xED, 0xD1, 0x67,
+0x00, 0x18, 0x4F, 0x32, 0x01, 0x6D, 0x83, 0xF1,
+0x18, 0x6C, 0xAB, 0xED, 0xD1, 0x67, 0x00, 0x18,
+0x4F, 0x32, 0x04, 0x93, 0x01, 0x48, 0xFF, 0xF7,
+0x1F, 0x6A, 0x04, 0x4B, 0x4C, 0xE8, 0x04, 0xD3,
+0x05, 0x92, 0x43, 0xE8, 0xE5, 0x61, 0x09, 0x97,
+0x08, 0x91, 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF,
+0x30, 0xF0, 0x20, 0x6A, 0xC1, 0xF3, 0x1C, 0x4A,
+0x05, 0x6B, 0x26, 0xF1, 0x68, 0xDA, 0x09, 0x6B,
+0x26, 0xF1, 0x64, 0xDA, 0x20, 0xE8, 0x00, 0x65,
+0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0xFF, 0x68,
+0xAC, 0xE8, 0xD0, 0x67, 0x41, 0xF4, 0x10, 0x6C,
+0x7F, 0x6D, 0x00, 0x18, 0x4F, 0x32, 0xD0, 0x67,
+0x41, 0xF6, 0x10, 0x6C, 0x7F, 0x6D, 0x00, 0x18,
+0x4F, 0x32, 0x05, 0x97, 0x04, 0x90, 0x03, 0x63,
+0x00, 0xEF, 0x00, 0x65, 0xFD, 0x63, 0x05, 0x62,
+0x85, 0x67, 0xA6, 0x67, 0xC7, 0x67, 0x00, 0x18,
+0xF5, 0x27, 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF,
 0xFC, 0x63, 0x07, 0x62, 0x06, 0xD1, 0x05, 0xD0,
 0x1F, 0xF7, 0x00, 0x6A, 0xAC, 0xEA, 0x02, 0xF0,
 0x00, 0x72, 0x26, 0x67, 0x01, 0x60, 0x05, 0x2A,
-0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF6, 0x40, 0x9A,
-0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF6,
-0x44, 0x9A, 0x55, 0xE5, 0x00, 0x9D, 0x91, 0x67,
-0x00, 0x18, 0x79, 0x22, 0x2C, 0xE8, 0x06, 0xEA,
+0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF7, 0x54, 0x9A,
+0x04, 0x10, 0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF7,
+0x58, 0x9A, 0x55, 0xE5, 0x00, 0x9D, 0x91, 0x67,
+0x00, 0x18, 0x7B, 0x27, 0x2C, 0xE8, 0x06, 0xEA,
 0x50, 0x67, 0x07, 0x97, 0x06, 0x91, 0x05, 0x90,
 0x04, 0x63, 0x00, 0xEF, 0xFB, 0x63, 0x09, 0x62,
 0x08, 0xD1, 0x07, 0xD0, 0x46, 0x67, 0x01, 0x4A,
 0x05, 0x67, 0x0C, 0xD6, 0x27, 0x67, 0x1C, 0x22,
 0x1F, 0xF7, 0x00, 0x6A, 0xAC, 0xEA, 0x02, 0xF0,
 0x00, 0x72, 0x01, 0x60, 0x05, 0x2A, 0x30, 0xF0,
-0x20, 0x6A, 0x60, 0xF6, 0x40, 0x9A, 0x04, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF6, 0x44, 0x9A,
+0x20, 0x6A, 0x00, 0xF7, 0x54, 0x9A, 0x04, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF7, 0x58, 0x9A,
 0x49, 0xE0, 0x40, 0x9A, 0x0C, 0x94, 0x04, 0xD2,
-0x00, 0x18, 0x79, 0x22, 0x0C, 0x93, 0x24, 0xEA,
+0x00, 0x18, 0x7B, 0x27, 0x0C, 0x93, 0x24, 0xEA,
 0x6F, 0xEA, 0x04, 0x93, 0x6C, 0xEA, 0x4D, 0xE9,
 0x1F, 0xF7, 0x00, 0x6A, 0x0C, 0xEA, 0x02, 0xF0,
 0x00, 0x72, 0x01, 0x60, 0x05, 0x2A, 0x30, 0xF0,
-0x20, 0x6A, 0x60, 0xF6, 0x40, 0x9A, 0x04, 0x10,
-0x30, 0xF0, 0x20, 0x6A, 0x60, 0xF6, 0x44, 0x9A,
+0x20, 0x6A, 0x00, 0xF7, 0x54, 0x9A, 0x04, 0x10,
+0x30, 0xF0, 0x20, 0x6A, 0x00, 0xF7, 0x58, 0x9A,
 0x41, 0xE0, 0x20, 0xD8, 0x09, 0x97, 0x08, 0x91,
 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF, 0x00, 0x65,
 0xFD, 0x63, 0x05, 0x62, 0x06, 0xD4, 0x06, 0x04,
 0x09, 0xD7, 0x07, 0xD5, 0x08, 0xD6, 0x00, 0x18,
-0x96, 0x23, 0x05, 0x97, 0x03, 0x63, 0x00, 0xEF,
-0xFD, 0x63, 0x05, 0x62, 0x04, 0xD0, 0x00, 0x6A,
-0x30, 0xF0, 0x20, 0x6B, 0xA1, 0xF0, 0x70, 0x9B,
-0x54, 0x34, 0x01, 0x4A, 0x71, 0xE4, 0xA0, 0xA4,
-0xF8, 0x6B, 0x80, 0x68, 0xAC, 0xEB, 0x60, 0xC4,
-0xFF, 0x6B, 0x6C, 0xEA, 0x4E, 0xE8, 0xF0, 0x28,
-0x00, 0x18, 0x3E, 0x37, 0x30, 0xF0, 0x20, 0x6A,
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-0x68, 0x40, 0xA4, 0x4B, 0x83, 0x67, 0x4C, 0xEC,
-0x2D, 0x5C, 0x06, 0x60, 0x67, 0x33, 0x9D, 0x67,
-0x6D, 0xE4, 0x20, 0xF0, 0x58, 0xA3, 0x0D, 0x10,
-0x67, 0x40, 0x64, 0x4B, 0x4C, 0xEB, 0x1D, 0x5B,
-0x80, 0xF0, 0x1D, 0x60, 0x6F, 0xF7, 0x4B, 0x40,
-0x47, 0x32, 0x7D, 0x67, 0x49, 0xE3, 0x20, 0xF0,
-0x48, 0xA2, 0xFF, 0x72, 0x80, 0xF0, 0x13, 0x60,
-0x04, 0xD2, 0x30, 0xF0, 0x20, 0x6A, 0x21, 0xF1,
-0xF8, 0x9A, 0x91, 0x67, 0x00, 0x6D, 0xBE, 0x6E,
-0x00, 0x18, 0x7A, 0x39, 0x14, 0x94, 0x90, 0x70,
-0x4C, 0xEC, 0x14, 0xD4, 0x11, 0x61, 0x01, 0x6A,
-0x04, 0xD2, 0x30, 0xF0, 0x20, 0x6A, 0xE0, 0xF6,
-0xE8, 0x9A, 0x91, 0x67, 0x00, 0x6D, 0xDF, 0x6E,
-0x00, 0x18, 0x7A, 0x39, 0x14, 0x93, 0xFF, 0x6C,
-0x4C, 0xEB, 0x8C, 0xEB, 0x14, 0xD3, 0x1C, 0x10,
-0x00, 0x6A, 0x04, 0xD2, 0xA2, 0x67, 0x30, 0xF0,
-0x20, 0x6A, 0xE0, 0xF6, 0x08, 0x4A, 0xE0, 0x9A,
-0x91, 0x67, 0xDF, 0x6E, 0x00, 0x18, 0x7A, 0x39,
-0x14, 0x93, 0xFF, 0x6C, 0x91, 0x58, 0x4C, 0xEB,
-0x8C, 0xEB, 0x14, 0xD3, 0x07, 0x61, 0x30, 0xF0,
-0x20, 0x6A, 0xE0, 0xF6, 0x08, 0x4A, 0x15, 0x93,
-0x40, 0x9A, 0x07, 0x10, 0x50, 0x58, 0x07, 0x61,
-0x30, 0xF0, 0x20, 0x6A, 0xE0, 0xF6, 0x44, 0x9A,
-0x15, 0x93, 0x4D, 0xEB, 0x15, 0xD3, 0x30, 0xF0,
-0x20, 0x6A, 0x15, 0x94, 0xE1, 0xF0, 0x1C, 0x4A,
-0xE0, 0x9A, 0x04, 0xD4, 0x00, 0x6D, 0x91, 0x67,
-0x18, 0x6E, 0x00, 0x18, 0x7A, 0x39, 0x14, 0x90,
-0x4C, 0xE8, 0x30, 0xF0, 0x20, 0x6A, 0xA7, 0xF5,
-0x4F, 0xA2, 0x0F, 0x2A, 0x30, 0xF0, 0x20, 0x6A,
-0xE1, 0xF0, 0x1C, 0x4A, 0x16, 0x93, 0xE0, 0x9A,
-0x91, 0x67, 0x00, 0x6D, 0xB8, 0x6E, 0x04, 0xD3,
-0x00, 0x18, 0x7A, 0x39, 0x4C, 0xE8, 0xFF, 0x6A,
-0x4C, 0xE8, 0x30, 0xF0, 0x20, 0x6B, 0x81, 0xF4,
-0x0C, 0x4B, 0x06, 0xF1, 0x5A, 0xA3, 0x14, 0xD3,
-0x20, 0x22, 0x30, 0xF0, 0x20, 0x6A, 0x15, 0x94,
-0xE1, 0xF0, 0x1C, 0x4A, 0xE0, 0x9A, 0x04, 0xD4,
-0x01, 0x6D, 0x91, 0x67, 0x18, 0x6E, 0x00, 0x18,
-0x7A, 0x39, 0x14, 0x93, 0x4C, 0xE8, 0x26, 0xF1,
-0x43, 0xA3, 0x0F, 0x2A, 0x30, 0xF0, 0x20, 0x6A,
-0x16, 0x94, 0xE1, 0xF0, 0x1C, 0x4A, 0xE0, 0x9A,
-0x04, 0xD4, 0x01, 0x6D, 0x91, 0x67, 0xB8, 0x6E,
-0x00, 0x18, 0x7A, 0x39, 0x4C, 0xE8, 0xFF, 0x6A,
-0x4C, 0xE8, 0x05, 0x20, 0x91, 0x67, 0x00, 0x18,
-0xF9, 0x39, 0x01, 0x6A, 0x01, 0x10, 0x00, 0x6A,
-0x1B, 0x97, 0x1A, 0x91, 0x19, 0x90, 0x0E, 0x63,
-0x00, 0xEF, 0x68, 0x40, 0xE4, 0x4B, 0xFF, 0x6A,
-0x83, 0x67, 0x4C, 0xEC, 0x1D, 0x5C, 0x3F, 0xF7,
-0x1E, 0x61, 0x42, 0x17, 0xFB, 0x63, 0x09, 0x62,
+0x00, 0x18, 0x4F, 0x32, 0x4B, 0x99, 0x40, 0xA2,
+0x01, 0x72, 0x10, 0x61, 0x54, 0xA1, 0x03, 0x72,
+0x02, 0x60, 0x05, 0x72, 0x0B, 0x61, 0x0E, 0x70,
+0x05, 0x61, 0x91, 0x67, 0x26, 0x6D, 0x00, 0x18,
+0xD8, 0x3E, 0xB6, 0x10, 0x91, 0x67, 0x20, 0x6D,
+0x00, 0x18, 0xD8, 0x3E, 0x0F, 0x58, 0xA0, 0xF0,
+0x0F, 0x61, 0x68, 0x40, 0xE4, 0x4B, 0xFF, 0x6A,
+0x83, 0x67, 0x4C, 0xEC, 0x1D, 0x5C, 0x05, 0x60,
+0x5D, 0x67, 0x67, 0x33, 0x6D, 0xE2, 0x58, 0xA3,
+0x19, 0x10, 0x68, 0x40, 0xA4, 0x4B, 0x83, 0x67,
+0x4C, 0xEC, 0x2D, 0x5C, 0x06, 0x60, 0x67, 0x33,
+0x9D, 0x67, 0x6D, 0xE4, 0x20, 0xF0, 0x58, 0xA3,
+0x0D, 0x10, 0x67, 0x40, 0x64, 0x4B, 0x4C, 0xEB,
+0x1D, 0x5B, 0x80, 0xF0, 0x0B, 0x60, 0x6F, 0xF7,
+0x4B, 0x40, 0x47, 0x32, 0x7D, 0x67, 0x49, 0xE3,
+0x20, 0xF0, 0x48, 0xA2, 0xFF, 0x72, 0x80, 0xF0,
+0x01, 0x60, 0x04, 0xD2, 0x30, 0xF0, 0x20, 0x6A,
+0x01, 0xF0, 0xE0, 0x9A, 0x91, 0x67, 0x00, 0x6D,
+0xBE, 0x6E, 0x00, 0x18, 0xE2, 0x40, 0x14, 0x94,
+0x00, 0x6B, 0x01, 0x4C, 0x01, 0x24, 0x01, 0x6B,
+0xFF, 0x6C, 0x4C, 0xEC, 0x6C, 0xEC, 0x90, 0x70,
+0x14, 0xD4, 0x11, 0x61, 0x01, 0x6A, 0x04, 0xD2,
+0x30, 0xF0, 0x20, 0x6A, 0x20, 0xF5, 0xEC, 0x9A,
+0x91, 0x67, 0x00, 0x6D, 0xDF, 0x6E, 0x00, 0x18,
+0xE2, 0x40, 0x14, 0x93, 0xFF, 0x6C, 0x4C, 0xEB,
+0x8C, 0xEB, 0x14, 0xD3, 0x1C, 0x10, 0x00, 0x6A,
+0x04, 0xD2, 0xA2, 0x67, 0x30, 0xF0, 0x20, 0x6A,
+0x20, 0xF5, 0x0C, 0x4A, 0xE0, 0x9A, 0x91, 0x67,
+0xDF, 0x6E, 0x00, 0x18, 0xE2, 0x40, 0x14, 0x93,
+0xFF, 0x6C, 0x91, 0x58, 0x4C, 0xEB, 0x8C, 0xEB,
+0x14, 0xD3, 0x07, 0x61, 0x30, 0xF0, 0x20, 0x6A,
+0x20, 0xF5, 0x0C, 0x4A, 0x15, 0x93, 0x40, 0x9A,
+0x07, 0x10, 0x50, 0x58, 0x07, 0x61, 0x30, 0xF0,
+0x20, 0x6A, 0x20, 0xF5, 0x48, 0x9A, 0x15, 0x93,
+0x4D, 0xEB, 0x15, 0xD3, 0x30, 0xF0, 0x20, 0x6A,
+0x15, 0x94, 0x80, 0xF7, 0x04, 0x4A, 0xE0, 0x9A,
+0x04, 0xD4, 0x00, 0x6D, 0x91, 0x67, 0x18, 0x6E,
+0x00, 0x18, 0xE2, 0x40, 0x14, 0x90, 0x4C, 0xE8,
+0x4A, 0xA1, 0x0F, 0x22, 0x30, 0xF0, 0x20, 0x6A,
+0x80, 0xF7, 0x04, 0x4A, 0x15, 0x93, 0xE0, 0x9A,
+0x91, 0x67, 0x01, 0x6D, 0x18, 0x6E, 0x04, 0xD3,
+0x00, 0x18, 0xE2, 0x40, 0x4C, 0xE8, 0xFF, 0x6A,
+0x4C, 0xE8, 0x18, 0x20, 0x30, 0xF0, 0x20, 0x6A,
+0x20, 0xF5, 0x10, 0x9A, 0x00, 0x6C, 0xE4, 0x67,
+0xB8, 0x6D, 0xD0, 0x67, 0x00, 0x18, 0x27, 0x33,
+0xB8, 0x6D, 0xD0, 0x67, 0x01, 0x6F, 0x00, 0x6C,
+0x00, 0x18, 0x27, 0x33, 0x91, 0x67, 0x00, 0x18,
+0x87, 0x41, 0x91, 0x67, 0x00, 0x18, 0x9B, 0x41,
+0x01, 0x6A, 0x01, 0x10, 0x00, 0x6A, 0x1B, 0x97,
+0x1A, 0x91, 0x19, 0x90, 0x0E, 0x63, 0x00, 0xEF,
+0x00, 0x6A, 0x77, 0x17, 0xFB, 0x63, 0x09, 0x62,
 0x08, 0xD1, 0x07, 0xD0, 0xFF, 0x68, 0x0C, 0xED,
 0x24, 0x67, 0x0D, 0xD7, 0x04, 0xD5, 0xCC, 0xE8,
-0x00, 0x18, 0xAB, 0x39, 0x0F, 0x22, 0x04, 0x95,
-0x91, 0x67, 0x00, 0x18, 0x47, 0x3C, 0x0A, 0x22,
+0x00, 0x18, 0x03, 0x41, 0x0F, 0x22, 0x04, 0x95,
+0x91, 0x67, 0x00, 0x18, 0xEB, 0x43, 0x0A, 0x22,
 0x0D, 0x96, 0x91, 0x67, 0xB0, 0x67, 0x00, 0x18,
-0x73, 0x3B, 0x4B, 0xEB, 0x4D, 0xEB, 0xC0, 0xF7,
+0x1A, 0x43, 0x4B, 0xEB, 0x4D, 0xEB, 0xC0, 0xF7,
 0x62, 0x32, 0x01, 0x10, 0x00, 0x6A, 0x09, 0x97,
 0x08, 0x91, 0x07, 0x90, 0x05, 0x63, 0x00, 0xEF,
-0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+0xA8, 0x6A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 };
 
-u32 array_length_mp_8822b_fw_wowlan = 65912;
+u32 array_length_mp_8822b_fw_wowlan = 73536;
 
 #endif
 
diff --git a/rtl8822BU/hal/rtl8822b/hal8822b_fw.h b/rtl8822BU/hal/rtl8822b/hal8822b_fw.h
index 1e9127e..31e4c09 100755..100644
--- a/rtl8822BU/hal/rtl8822b/hal8822b_fw.h
+++ b/rtl8822BU/hal/rtl8822b/hal8822b_fw.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 
 #ifdef CONFIG_RTL8822B
 
@@ -6,14 +20,14 @@
 
 #ifdef LOAD_FW_HEADER_FROM_DRIVER
 #if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP)))
-extern u8 array_mp_8822b_fw_ap[76464];
+extern u8 array_mp_8822b_fw_ap[81504];
 extern u32 array_length_mp_8822b_fw_ap;
 #endif
 
 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE))
-extern u8 array_mp_8822b_fw_nic[119872];
+extern u8 array_mp_8822b_fw_nic[127496];
 extern u32 array_length_mp_8822b_fw_nic;
-extern u8 array_mp_8822b_fw_wowlan[65912];
+extern u8 array_mp_8822b_fw_wowlan[73536];
 extern u32 array_length_mp_8822b_fw_wowlan;
 #endif
 #endif /* end of LOAD_FW_HEADER_FROM_DRIVER */
diff --git a/rtl8822BU/hal/rtl8822b/rtl8822b.h b/rtl8822BU/hal/rtl8822b/rtl8822b.h
index 6810ba3..978be7f 100755..100644
--- a/rtl8822BU/hal/rtl8822b/rtl8822b.h
+++ b/rtl8822BU/hal/rtl8822b/rtl8822b.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTL8822B_H_
 #define _RTL8822B_H_
 
@@ -42,6 +37,7 @@ struct hw_port_reg {
 	u32 bcn_space;		/*reg_offset*/
 	u8 bcn_space_shift;
 	u16 bcn_space_mask;
+	u32	ps_aid;			/*reg_offset*/
 };
 
 
@@ -69,7 +65,7 @@ u8 rtl8822b_rx_tsf_addr_filter_config(PADAPTER, u8 config);
 s32 rtl8822b_fw_dl(PADAPTER, u8 wowlan);
 
 /* rtl8822b_ops.c */
-void rtl8822b_read_efuse(PADAPTER);
+u8 rtl8822b_read_efuse(PADAPTER);
 void rtl8822b_run_thread(PADAPTER);
 void rtl8822b_cancel_thread(PADAPTER);
 void rtl8822b_sethwreg(PADAPTER, u8 variable, u8 *pval);
@@ -77,8 +73,6 @@ void rtl8822b_gethwreg(PADAPTER, u8 variable, u8 *pval);
 u8 rtl8822b_sethaldefvar(PADAPTER, HAL_DEF_VARIABLE, void *pval);
 u8 rtl8822b_gethaldefvar(PADAPTER, HAL_DEF_VARIABLE, void *pval);
 void rtl8822b_set_hal_ops(PADAPTER);
-void rtl8822b_resume_tx_beacon(PADAPTER);
-void rtl8822b_stop_tx_beacon(PADAPTER);
 
 /* tx */
 void rtl8822b_fill_txdesc_sectype(struct pkt_attrib *, u8 *ptxdesc);
@@ -103,9 +97,8 @@ void rtl8822b_set_FwMediaStatusRpt_cmd(PADAPTER, u8 mstatus, u8 macid);
 void rtl8822b_set_FwMacIdConfig_cmd(PADAPTER , u64 bitmap, u8 *arg, u8 bw);
 void rtl8822b_set_FwRssiSetting_cmd(PADAPTER, u8 *param);
 void rtl8822b_set_FwPwrMode_cmd(PADAPTER, u8 psmode);
-#ifdef CONFIG_P2P
-void rtl8822b_set_p2p_ps_offload_cmd(PADAPTER, u8 p2p_ps_state);
-#endif
+void rtl8822b_set_FwPwrModeInIPS_cmd(PADAPTER adapter, u8 cmd_param);
+void rtl8822b_req_txrpt_cmd(PADAPTER, u8 macid);
 void rtl8822b_fw_update_beacon_cmd(PADAPTER);
 void rtl8822b_c2h_handler(PADAPTER, u8 *pbuf, u16 length);
 void rtl8822b_c2h_handler_no_io(PADAPTER, u8 *pbuf, u16 length);
diff --git a/rtl8822BU/hal/rtl8822b/rtl8822b_cmd.c b/rtl8822BU/hal/rtl8822b/rtl8822b_cmd.c
index 6ed2478..4f59767 100755..100644
--- a/rtl8822BU/hal/rtl8822b/rtl8822b_cmd.c
+++ b/rtl8822BU/hal/rtl8822b/rtl8822b_cmd.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTL8822B_CMD_C_
 
 #include <hal_data.h>		/* HAL_DATA_TYPE */
@@ -42,6 +37,7 @@ s32 rtl8822b_fillh2ccmd(PADAPTER adapter, u8 id, u32 buf_len, u8 *pbuf)
 	u8 *msg_p;
 	u32 msg_size, i, n;
 #endif /* CONFIG_RTW_DEBUG */
+	int err;
 	s32 ret = _FAIL;
 
 
@@ -71,7 +67,9 @@ s32 rtl8822b_fillh2ccmd(PADAPTER adapter, u8 id, u32 buf_len, u8 *pbuf)
 	h2c[0] = id;
 	_rtw_memcpy(h2c + 1, pbuf, buf_len);
 
-	ret = rtw_halmac_send_h2c(adapter_to_dvobj(adapter), h2c);
+	err = rtw_halmac_send_h2c(adapter_to_dvobj(adapter), h2c);
+	if (!err)
+		ret = _SUCCESS;
 
 exit:
 
@@ -264,6 +262,7 @@ void rtl8822b_set_FwMacIdConfig_cmd(PADAPTER adapter, u64 mask, u8 *arg, u8 bw)
 	struct macid_ctl_t *macid_ctl = &adapter->dvobj->macid_ctl;
 	struct sta_info *psta = NULL;
 	u8 mac_id, init_rate, raid, sgi = _FALSE;
+	u8 ignore_bw = _FALSE;
 	u8 h2c[RTW_HALMAC_H2C_MAX_SIZE] = {0};
 
 
@@ -275,7 +274,8 @@ void rtl8822b_set_FwMacIdConfig_cmd(PADAPTER adapter, u64 mask, u8 *arg, u8 bw)
 
 	mac_id = arg[0];
 	raid = arg[1];
-	sgi = arg[2];
+	sgi = arg[2] & 0x0F;
+	ignore_bw = arg[2] >> 4;
 	init_rate = arg[3];
 
 	if (mac_id < macid_ctl->num)
@@ -298,6 +298,7 @@ void rtl8822b_set_FwMacIdConfig_cmd(PADAPTER adapter, u64 mask, u8 *arg, u8 bw)
 	MACID_CFG_SET_MAC_ID(h2c, mac_id);
 	MACID_CFG_SET_RATE_ID(h2c, raid);
 	MACID_CFG_SET_SGI(h2c, (sgi) ? 1 : 0);
+	MACID_CFG_SET_NO_UPDATE(h2c, (ignore_bw) ? 1 : 0);
 	MACID_CFG_SET_BW(h2c, bw);
 	MACID_CFG_SET_LDPC_CAP(h2c, get_ra_ldpc(psta));
 	MACID_CFG_SET_WHT_EN(h2c, get_ra_vht_en(psta->wireless_mode, mask));
@@ -374,6 +375,23 @@ void rtl8822b_set_FwAPReqRPT_cmd(PADAPTER adapter, u32 need_ack)
 	rtw_halmac_send_h2c(adapter_to_dvobj(adapter), h2c);
 }
 
+void rtl8822b_req_txrpt_cmd(PADAPTER adapter, u8 macid)
+{
+	u8 h2c[RTW_HALMAC_H2C_MAX_SIZE] = {0};
+
+	AP_REQ_TXRPT_SET_CMD_ID(h2c, CMD_ID_AP_REQ_TXRPT);
+	AP_REQ_TXRPT_SET_CLASS(h2c, CLASS_AP_REQ_TXRPT);
+
+	AP_REQ_TXRPT_SET_STA1_MACID(h2c, macid);
+	AP_REQ_TXRPT_SET_STA2_MACID(h2c, 0xff);
+	AP_REQ_TXRPT_SET_RTY_OK_TOTAL(h2c, 0x00);
+	AP_REQ_TXRPT_SET_RTY_CNT_MACID(h2c, 0x00);
+	rtw_halmac_send_h2c(adapter_to_dvobj(adapter), h2c);
+
+	AP_REQ_TXRPT_SET_RTY_CNT_MACID(h2c, 0x01);
+	rtw_halmac_send_h2c(adapter_to_dvobj(adapter), h2c);
+}
+
 void rtl8822b_set_FwPwrMode_cmd(PADAPTER adapter, u8 psmode)
 {
 	int i;
@@ -549,6 +567,20 @@ void rtl8822b_set_FwPwrMode_cmd(PADAPTER adapter, u8 psmode)
 
 void rtl8822b_set_FwPwrModeInIPS_cmd(PADAPTER adapter, u8 cmd_param)
 {
+
+	u8 h2c[RTW_HALMAC_H2C_MAX_SIZE] = {0};
+
+	INACTIVE_PS_SET_CMD_ID(h2c, CMD_ID_INACTIVE_PS);
+	INACTIVE_PS_SET_CLASS(h2c, CLASS_INACTIVE_PS);
+
+	if (cmd_param & BIT0)
+		INACTIVE_PS_SET_ENABLE(h2c, 1);
+
+	if (cmd_param & BIT1)
+		INACTIVE_PS_SET_IGNORE_PS_CONDITION(h2c, 1);
+
+	RTW_DBG_DUMP("H2C-FwPwrModeInIPS Parm:", h2c, RTW_HALMAC_H2C_MAX_SIZE);
+	rtw_halmac_send_h2c(adapter_to_dvobj(adapter), h2c);
 }
 
 static s32 rtl8822b_set_FwLowPwrLps_cmd(PADAPTER adapter, u8 enable)
@@ -1071,7 +1103,7 @@ void rtl8822b_download_BTCoex_AP_mode_rsvd_page(PADAPTER adapter)
 	u8 bcn_valid = _FALSE;
 	u8 DLBcnCount = 0;
 	u32 poll = 0;
-	u8 val8;
+	u8 val8, RegFwHwTxQCtrl;
 	u8 restore[2];
 
 
@@ -1109,12 +1141,13 @@ void rtl8822b_download_BTCoex_AP_mode_rsvd_page(PADAPTER adapter)
 	rtw_write8(adapter, REG_BCN_CTRL_8822B, val8);
 
 	/* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */
-	if (hal->RegFwHwTxQCtrl & BIT(6))
+	RegFwHwTxQCtrl = rtw_read8(adapter, REG_FWHW_TXQ_CTRL_8822B + 2);
+	if (RegFwHwTxQCtrl & BIT(6))
 		bRecover = _TRUE;
 
 	/* To tell Hw the packet is not a real beacon frame. */
-	hal->RegFwHwTxQCtrl &= ~BIT(6);
-	rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8822B + 2, hal->RegFwHwTxQCtrl);
+	RegFwHwTxQCtrl &= ~BIT(6);
+	rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8822B + 2, RegFwHwTxQCtrl);
 
 	/* Clear beacon valid check bit. */
 	rtw_hal_set_hwreg(adapter, HW_VAR_BCN_VALID, NULL);
@@ -1156,8 +1189,8 @@ void rtl8822b_download_BTCoex_AP_mode_rsvd_page(PADAPTER adapter)
 	 * the beacon cannot be sent by HW.
 	 */
 	if (bRecover) {
-		hal->RegFwHwTxQCtrl |= BIT(6);
-		rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8822B + 2, hal->RegFwHwTxQCtrl);
+		RegFwHwTxQCtrl |= BIT(6);
+		rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8822B + 2, RegFwHwTxQCtrl);
 	}
 
 	rtw_write8(adapter, REG_BCN_CTRL_8822B, restore[1]);
@@ -1172,92 +1205,6 @@ void rtl8822b_download_BTCoex_AP_mode_rsvd_page(PADAPTER adapter)
 }
 #endif /* CONFIG_BT_COEXIST */
 
-#ifdef CONFIG_P2P
-void rtl8822b_set_p2p_ps_offload_cmd(PADAPTER adapter, u8 p2p_ps_state)
-{
-	PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
-	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
-	struct wifidirect_info *pwdinfo = &adapter->wdinfo;
-	u8 i;
-	u8 h2c[RTW_HALMAC_H2C_MAX_SIZE] = {0};
-
-
-	_rtw_memcpy(&h2c[1], &hal->p2p_ps_offload, sizeof(hal->p2p_ps_offload));
-
-	P2P_PS_OFFLOAD_SET_CMD_ID(h2c, CMD_ID_P2P_PS_OFFLOAD);
-	P2P_PS_OFFLOAD_SET_CLASS(h2c, CLASS_P2P_PS_OFFLOAD);
-
-	switch (p2p_ps_state) {
-	case P2P_PS_DISABLE:
-		RTW_INFO("P2P_PS_DISABLE\n");
-		_rtw_memset(&h2c[1], 0, sizeof(hal->p2p_ps_offload));
-		break;
-
-	case P2P_PS_ENABLE:
-		RTW_INFO("P2P_PS_ENABLE\n");
-		/* update CTWindow value. */
-		if (pwdinfo->ctwindow > 0) {
-			P2P_PS_OFFLOAD_SET_CTWINDOW_EN(h2c, 1);
-			rtw_write8(adapter, REG_CTWND_8822B, pwdinfo->ctwindow);
-		}
-
-		/* hw only support 2 set of NoA */
-		for (i = 0; i < pwdinfo->noa_num; i++) {
-			/* To control the register setting for which NOA */
-			rtw_write8(adapter, REG_TXCMD_NOA_SEL_8822B, (i << 4));
-			if (i == 0)
-				P2P_PS_OFFLOAD_SET_NOA0_EN(h2c, 1);
-			else
-				P2P_PS_OFFLOAD_SET_NOA1_EN(h2c, 1);
-
-			/* config P2P NoA Descriptor Register */
-			/* config NOA duration */
-			rtw_write32(adapter, REG_NOA_PARAM_8822B, pwdinfo->noa_duration[i]);
-			/* config NOA interval */
-			rtw_write32(adapter, (REG_NOA_PARAM_8822B + 4), pwdinfo->noa_interval[i]);
-			/* config NOA start time */
-			rtw_write32(adapter, (REG_NOA_PARAM_8822B + 8), pwdinfo->noa_start_time[i]);
-			/* config NOA count */
-			rtw_write8(adapter, (REG_NOA_PARAM_8822B + 12), pwdinfo->noa_count[i]);
-		}
-
-		if ((pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0)) {
-			/* rst p2p circuit */
-			rtw_write8(adapter, REG_P2P_RST_8822B, BIT(0));
-
-			P2P_PS_OFFLOAD_SET_OFFLOAD_EN(h2c, 1);
-
-			if (pwdinfo->role == P2P_ROLE_GO) {
-				P2P_PS_OFFLOAD_SET_ROLE(h2c, 1);
-				P2P_PS_OFFLOAD_SET_ALL_STA_SLEEP(h2c, 0);
-			} else
-				P2P_PS_OFFLOAD_SET_ROLE(h2c, 0);
-
-			((struct P2P_PS_Offload_t *)&h2c[1])->discovery = 0;
-		}
-		break;
-
-	case P2P_PS_SCAN:
-		RTW_INFO("P2P_PS_SCAN\n");
-		((struct P2P_PS_Offload_t *)&h2c[1])->discovery = 1;
-		break;
-
-	case P2P_PS_SCAN_DONE:
-		RTW_INFO("P2P_PS_SCAN_DONE\n");
-		((struct P2P_PS_Offload_t *)&h2c[1])->discovery = 0;
-		pwdinfo->p2p_ps_state = P2P_PS_ENABLE;
-		break;
-
-	default:
-		break;
-	}
-
-	RTW_DBG_DUMP("H2C-P2PPSOffload Parm:", h2c, RTW_HALMAC_H2C_MAX_SIZE);
-	rtw_halmac_send_h2c(adapter_to_dvobj(adapter), h2c);
-
-	_rtw_memcpy(&hal->p2p_ps_offload, &h2c[1], sizeof(hal->p2p_ps_offload));
-}
-#endif /* CONFIG_P2P */
 
 #ifdef CONFIG_TSF_RESET_OFFLOAD
 /*
@@ -1307,6 +1254,65 @@ static void c2h_ccx_rpt(PADAPTER adapter, u8 *pdata)
 #endif /* CONFIG_XMIT_ACK */
 }
 
+static VOID
+C2HTxRPTHandler_8822b(
+	IN	PADAPTER	Adapter,
+	IN	u8			*CmdBuf,
+	IN	u8			CmdLen
+)
+{
+	_irqL	 irqL;
+	u8 macid = 0, IniRate = 0;
+	u16 TxOK = 0, TxFail = 0;
+	u8 TxOK0 = 0, TxOK1 = 0;
+	u8 TxFail0 = 0, TxFail1 = 0;
+	struct sta_priv *pstapriv = &(Adapter->stapriv);
+	struct sta_info *psta = NULL;
+	struct sta_info *pbcmc_stainfo = rtw_get_bcmc_stainfo(Adapter);
+
+	if (!pstapriv->c2h_sta) {
+		RTW_WARN("%s: No corresponding sta_info!\n", __FUNCTION__);
+		return;
+	}
+	psta = pstapriv->c2h_sta;
+	macid = C2H_AP_REQ_TXRPT_GET_STA1_MACID(CmdBuf);
+	TxOK0 = C2H_AP_REQ_TXRPT_GET_TX_OK1_0(CmdBuf);
+	TxOK1 = C2H_AP_REQ_TXRPT_GET_TX_OK1_1(CmdBuf);
+	TxOK = (TxOK1 << 8) | TxOK0;
+	TxFail0 = C2H_AP_REQ_TXRPT_GET_TX_FAIL1_0(CmdBuf);
+	TxFail1 = C2H_AP_REQ_TXRPT_GET_TX_FAIL1_1(CmdBuf);
+	TxFail = (TxFail1 << 8) | TxFail0;
+	IniRate = C2H_AP_REQ_TXRPT_GET_INITIAL_RATE1(CmdBuf);
+
+	psta->sta_stats.tx_ok_cnt = TxOK;
+	psta->sta_stats.tx_fail_cnt = TxFail;
+
+}
+
+static VOID
+C2HSPC_STAT_8822b(
+	IN	PADAPTER	Adapter,
+	IN	u8			*CmdBuf,
+	IN	u8			CmdLen
+)
+{
+	_irqL	 irqL;
+	struct sta_priv *pstapriv = &(Adapter->stapriv);
+	struct sta_info *psta = NULL;
+	struct sta_info *pbcmc_stainfo = rtw_get_bcmc_stainfo(Adapter);
+	_list	*plist, *phead;
+	u8 idx = C2H_SPECIAL_STATISTICS_GET_STATISTICS_IDX(CmdBuf);
+
+	if (!pstapriv->c2h_sta) {
+		RTW_WARN("%s: No corresponding sta_info!\n", __FUNCTION__);
+		return;
+	}
+	psta = pstapriv->c2h_sta;
+	psta->sta_stats.tx_retry_cnt = (C2H_SPECIAL_STATISTICS_GET_DATA3(CmdBuf) << 8) | C2H_SPECIAL_STATISTICS_GET_DATA2(CmdBuf);
+	pstapriv->c2h_sta = NULL;
+	rtw_sctx_done(&pstapriv->gotc2h);
+}
+
 /**
  * c2h = RXDESC + c2h packet
  * size = RXDESC_SIZE + c2h packet size
@@ -1357,14 +1363,32 @@ static void process_c2h_event(PADAPTER adapter, u8 *c2h, u32 size)
 		rtw_bf_c2h_handler(adapter, id, pc2h_data, c2h_len);
 		break;
 #endif /* CONFIG_BEAMFORMING */
+
 	case CMD_ID_C2H_CCX_RPT:
 		c2h_ccx_rpt(adapter, pc2h_data);
 		break;
-	/* FW offload C2H is 0xFF cmd according to halmac function - halmac_parse_c2h_packet */
-	case 0xFF:
+
+	case CMD_ID_C2H_AP_REQ_TXRPT:
+		/*RTW_INFO("[C2H], C2H_AP_REQ_TXRPT!!\n");*/
+		C2HTxRPTHandler_8822b(adapter, pc2h_data, c2h_len);
+		break;
+
+	case CMD_ID_C2H_SPECIAL_STATISTICS:
+		/*RTW_INFO("[C2H], C2H_SPC_STAT!!\n");*/
+		C2HSPC_STAT_8822b(adapter, pc2h_data, c2h_len);
+		break;
+
+	case C2H_EXTEND:
+		if (C2H_HDR_GET_C2H_SUB_CMD_ID(pc2h_data) == C2H_SUB_CMD_ID_CCX_RPT) {
+			/* Shift C2H HDR 4 bytes */
+			c2h_ccx_rpt(adapter, pc2h_data + 4);
+			break;
+		}
+
 		/* indicate c2h pkt + rx desc to halmac */
 		rtw_halmac_c2h_handle(adapter_to_dvobj(adapter), c2h, size);
 		break;
+
 	/* others for c2h common code */
 	default:
 		c2h_handler(adapter, id, seq, c2h_payload_len, pc2h_payload);
@@ -1393,8 +1417,9 @@ void rtl8822b_c2h_handler(PADAPTER adapter, u8 *pbuf, u16 length)
  */
 void rtl8822b_c2h_handler_no_io(PADAPTER adapter, u8 *pbuf, u16 length)
 {
-	u8 id, seq, c2h_size;
+	u8 id, seq;
 	u8 *pc2h_content;
+	u8 res;
 
 
 	if ((length == 0) || (!pbuf))
@@ -1408,21 +1433,7 @@ void rtl8822b_c2h_handler_no_io(PADAPTER adapter, u8 *pbuf, u16 length)
 	RTW_INFO("%s: C2H, ID=%d seq=%d len=%d\n",
 		 __FUNCTION__, id, seq, length);
 
-	if (id == 0xff) {
-		u8 sub_cmd_id = C2H_HDR_GET_C2H_SUB_CMD_ID(pc2h_content);
-
-		if (sub_cmd_id == 0x0f) {
-			u8 len = C2H_HDR_GET_LEN(pc2h_content);
-			/* C2H HDR is 4bytes */
-			u8 *ccx_data = pc2h_content + 4;
-
-			c2h_ccx_rpt(adapter, ccx_data);
-			goto exit;
-		}
-	}
-
 	switch (id) {
-	/* no I/O, process directly */
 	case CMD_ID_C2H_SND_TXBF:
 	case CMD_ID_C2H_CCX_RPT:
 	case C2H_BT_MP_INFO:
@@ -1430,16 +1441,16 @@ void rtl8822b_c2h_handler_no_io(PADAPTER adapter, u8 *pbuf, u16 length)
 	case C2H_IQK_FINISH:
 	case C2H_MCC:
 	case C2H_BCN_EARLY_RPT:
+	case C2H_EXTEND:
+		/* no I/O, process directly */
 		process_c2h_event(adapter, pbuf, length);
 		break;
 
-	/* need I/O, run in command thread */
 	default:
-		if (rtw_c2h_packet_wk_cmd(adapter, pbuf, length) == _FAIL)
+		/* Others may need I/O, run in command thread */
+		res = rtw_c2h_packet_wk_cmd(adapter, pbuf, length);
+		if (res == _FAIL)
 			RTW_ERR("%s: C2H(%d) enqueue FAIL!\n", __FUNCTION__, id);
 		break;
 	}
-
-exit:
-	return;
 }
diff --git a/rtl8822BU/hal/rtl8822b/rtl8822b_halinit.c b/rtl8822BU/hal/rtl8822b/rtl8822b_halinit.c
index 15e1bae..a58bf55 100755..100644
--- a/rtl8822BU/hal/rtl8822b/rtl8822b_halinit.c
+++ b/rtl8822BU/hal/rtl8822b/rtl8822b_halinit.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTL8822B_HALINIT_C_
 
 #include <drv_types.h>		/* PADAPTER, basic_types.h and etc. */
@@ -40,7 +35,8 @@ void rtl8822b_init_hal_spec(PADAPTER adapter)
 	hal_spec->rfpath_num_2g = 2;
 	hal_spec->rfpath_num_5g = 2;
 	hal_spec->max_tx_cnt = 2;
-	hal_spec->nss_num = 2;
+	hal_spec->tx_nss_num = 2;
+	hal_spec->rx_nss_num = 2;
 	hal_spec->band_cap = BAND_CAP_2G | BAND_CAP_5G;
 	hal_spec->bw_cap = BW_CAP_20M | BW_CAP_40M | BW_CAP_80M;
 	hal_spec->port_num = 5;
@@ -81,11 +77,6 @@ u32 rtl8822b_power_on(PADAPTER adapter)
 	bMacPwrCtrlOn = _TRUE;
 	rtw_hal_set_hwreg(adapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
 
-#ifdef CONFIG_BT_COEXIST
-	hal = GET_HAL_DATA(adapter);
-	if (hal->EEPROMBluetoothCoexist)
-		rtw_btcoex_PowerOnSetting(adapter);
-#endif /* CONFIG_BT_COEXIST */
 out:
 	return ret;
 }
@@ -113,7 +104,7 @@ void rtl8822b_power_off(PADAPTER adapter)
 	bMacPwrCtrlOn = _FALSE;
 	rtw_hal_set_hwreg(adapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
 
-	adapter->bFWReady = _FALSE;
+	GET_HAL_DATA(adapter)->bFWReady = _FALSE;
 
 out:
 	return;
@@ -129,7 +120,7 @@ u8 rtl8822b_hal_init(PADAPTER adapter)
 	d = adapter_to_dvobj(adapter);
 	hal = GET_HAL_DATA(adapter);
 
-	adapter->bFWReady = _FALSE;
+	hal->bFWReady = _FALSE;
 	hal->fw_ractrl = _FALSE;
 
 #ifdef CONFIG_FILE_FWIMG
@@ -159,11 +150,12 @@ u8 rtl8822b_hal_init(PADAPTER adapter)
 	
 
 	RTW_INFO("%s Download Firmware from %s success\n", __FUNCTION__, (fw_bin) ? "file" : "array");
-	RTW_INFO("%s FW Version:%d SubVersion:%d\n", "NIC", hal->firmware_version, hal->firmware_sub_version);
+	RTW_INFO("%s FW Version:%d SubVersion:%d FW size:%d\n", "NIC",
+		hal->firmware_version, hal->firmware_sub_version, hal->firmware_size);
 
 	/* Sync driver status with hardware setting */
 	rtl8822b_rcr_get(adapter, NULL);
-	adapter->bFWReady = _TRUE;
+	hal->bFWReady = _TRUE;
 	hal->fw_ractrl = _TRUE;
 
 	return _TRUE;
@@ -245,7 +237,6 @@ void rtl8822b_init_misc(PADAPTER adapter)
 		rtw_read32(adapter, REG_FWHW_TXQ_CTRL_8822B) | BIT_EN_QUEUE_RPT_8822B(BIT(4)));
 #endif /* CONFIG_XMIT_ACK */
 
-
 }
 
 u32 rtl8822b_init(PADAPTER adapter)
@@ -289,7 +280,7 @@ u32 rtl8822b_deinit(PADAPTER adapter)
 	d = adapter_to_dvobj(adapter);
 	hal = GET_HAL_DATA(adapter);
 
-	adapter->bFWReady = _FALSE;
+	hal->bFWReady = _FALSE;
 	hal->fw_ractrl = _FALSE;
 
 	err = rtw_halmac_deinit_hal(d);
@@ -307,7 +298,8 @@ void rtl8822b_init_default_value(PADAPTER adapter)
 
 	hal = GET_HAL_DATA(adapter);
 
-	adapter->registrypriv.wireless_mode = WIRELESS_MODE_24G | WIRELESS_MODE_5G;
+	if (adapter->registrypriv.wireless_mode == WIRELESS_MODE_MAX)
+		adapter->registrypriv.wireless_mode = WIRELESS_MODE_24G | WIRELESS_MODE_5G;
 
 	/* init default value */
 	hal->fw_ractrl = _FALSE;
diff --git a/rtl8822BU/hal/rtl8822b/rtl8822b_mac.c b/rtl8822BU/hal/rtl8822b/rtl8822b_mac.c
index b311e09..4ceac65 100755..100644
--- a/rtl8822BU/hal/rtl8822b/rtl8822b_mac.c
+++ b/rtl8822BU/hal/rtl8822b/rtl8822b_mac.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTL8822B_MAC_C_
 
 #include <drv_types.h>		/* PADAPTER, basic_types.h and etc. */
@@ -205,13 +200,14 @@ s32 rtl8822b_fw_dl(PADAPTER adapter, u8 wowlan)
 	}
 
 	if (!err) {
-		adapter->bFWReady = _TRUE;
+		hal->bFWReady = _TRUE;
 		hal->fw_ractrl = _TRUE;
 		RTW_INFO("%s Download Firmware from %s success\n", __FUNCTION__, (fw_bin) ? "file" : "array");
-		RTW_INFO("%s FW Version:%d SubVersion:%d\n", (wowlan) ? "WOW" : "NIC", hal->firmware_version, hal->firmware_sub_version);
+		RTW_INFO("%s FW Version:%d SubVersion:%d FW size:%d\n", (wowlan) ? "WOW" : "NIC",
+			hal->firmware_version, hal->firmware_sub_version, hal->firmware_size);
 		return _SUCCESS;
 	} else {
-		adapter->bFWReady = _FALSE;
+		hal->bFWReady = _FALSE;
 		hal->fw_ractrl = _FALSE;
 		RTW_ERR("%s Download Firmware from %s failed\n", __FUNCTION__, (fw_bin) ? "file" : "array");
 		return _FAIL;
diff --git a/rtl8822BU/hal/rtl8822b/rtl8822b_ops.c b/rtl8822BU/hal/rtl8822b/rtl8822b_ops.c
index 448a110..96b1183 100755..100644
--- a/rtl8822BU/hal/rtl8822b/rtl8822b_ops.c
+++ b/rtl8822BU/hal/rtl8822b/rtl8822b_ops.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTL8822B_OPS_C_
 
 #include <drv_types.h>		/* basic_types.h, rtw_io.h and etc. */
@@ -44,6 +39,7 @@ static const struct hw_port_reg port_cfg[] = {
 	.bcn_space = REG_MBSSID_BCN_SPACE_8822B,
 	.bcn_space_shift = 0,
 	.bcn_space_mask = 0xffff,
+	.ps_aid = REG_BCN_PSR_RPT_8822B,
 	},
 	/*port 1*/
 	{
@@ -57,6 +53,7 @@ static const struct hw_port_reg port_cfg[] = {
 	.bcn_space = REG_MBSSID_BCN_SPACE_8822B,
 	.bcn_space_shift = 16,
 	.bcn_space_mask = 0xfff,
+	.ps_aid = REG_BCN_PSR_RPT1_8822B,
 	},
 	/*port 2*/
 	{
@@ -70,6 +67,7 @@ static const struct hw_port_reg port_cfg[] = {
 	.bcn_space = REG_MBSSID_BCN_SPACE2_8822B,
 	.bcn_space_shift = 0,
 	.bcn_space_mask = 0xfff,
+	.ps_aid = REG_BCN_PSR_RPT2_8822B,
 	},
 	/*port 3*/
 	{
@@ -83,6 +81,7 @@ static const struct hw_port_reg port_cfg[] = {
 	.bcn_space = REG_MBSSID_BCN_SPACE2_8822B,
 	.bcn_space_shift = 16,
 	.bcn_space_mask = 0xfff,
+	.ps_aid = REG_BCN_PSR_RPT3_8822B,
 	},
 	/*port 4*/
 	{
@@ -96,6 +95,7 @@ static const struct hw_port_reg port_cfg[] = {
 	.bcn_space = REG_MBSSID_BCN_SPACE3_8822B,
 	.bcn_space_shift = 0,
 	.bcn_space_mask = 0xfff,
+	.ps_aid = REG_BCN_PSR_RPT4_8822B,
 	},
 };
 
@@ -288,7 +288,7 @@ exit:
 
 static void Hal_EfuseParseChnlPlan(PADAPTER adapter, u8 *map, u8 autoloadfail)
 {
-	adapter->mlmepriv.ChannelPlan = hal_com_config_channel_plan(
+	hal_com_config_channel_plan(
 		adapter,
 		map ? &map[EEPROM_COUNTRY_CODE_8822B] : NULL,
 		map ? map[EEPROM_ChannelPlan_8822B] : 0xFF,
@@ -297,8 +297,6 @@ static void Hal_EfuseParseChnlPlan(PADAPTER adapter, u8 *map, u8 autoloadfail)
 		RTW_CHPLAN_REALTEK_DEFINE,
 		autoloadfail
 	);
-
-	RTW_INFO("EEPROM ChannelPlan=0x%02x\n", adapter->mlmepriv.ChannelPlan);
 }
 
 static void Hal_EfuseParseXtal(PADAPTER adapter, u8 *map, u8 mapvalid)
@@ -357,12 +355,12 @@ static void Hal_EfuseParseAntennaDiversity(PADAPTER adapter, u8 *map, u8 mapvali
 			hal->TRxAntDivType = S0S1_SW_ANTDIV; /* internal switch S0S1 */
 		else
 			RTW_INFO("EEPROM efuse[0x%x]=0x%02x is unknown type\n",
-				__FUNCTION__, EEPROM_RFE_OPTION_8723B, hal->TRxAntDivType);
+				 EEPROM_RFE_OPTION_8723B, hal->TRxAntDivType);
 	} else
 		hal->TRxAntDivType = registry_par->antdiv_type;
 
 	RTW_INFO("EEPROM AntDivCfg=%d, AntDivType=%d\n",
-		 __FUNCTION__, hal->AntDivCfg, hal->TRxAntDivType);
+		 hal->AntDivCfg, hal->TRxAntDivType);
 #endif /* CONFIG_ANTENNA_DIVERSITY */
 }
 
@@ -494,12 +492,12 @@ static void Hal_ReadAmplifierType(PADAPTER adapter, u8 *map, u8 mapvalid)
 	RTW_INFO("EEPROM TypeALNA = 0x%X\n", hal->TypeALNA);
 }
 
-static void Hal_ReadRFEType(PADAPTER adapter, u8 *map, u8 mapvalid)
+static u8 Hal_ReadRFEType(PADAPTER adapter, u8 *map, u8 mapvalid)
 {
 	PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
 
 
-	/* check registry valye */
+	/* check registry value */
 	if (GetRegRFEType(adapter) != CONFIG_RTW_RFE_TYPE) {
 		hal->rfe_type = GetRegRFEType(adapter);
 		goto exit;
@@ -514,40 +512,45 @@ static void Hal_ReadRFEType(PADAPTER adapter, u8 *map, u8 mapvalid)
 
 	/* error handle */
 	hal->rfe_type = 0;
-	RTW_ERR("please pg efuse or change RFE_Type of registrypriv!!\n");
+
+	/* If ignore incorrect rfe_type may cause card drop. */
+	/* it's DIFFICULT do debug especially on COB project */
+	RTW_ERR("\n\nEmpty EFUSE with unknown REF type!!\n\n");
+	RTW_ERR("please program efuse or specify correct RFE type.\n");
+	RTW_ERR("cmd: insmod rtl8822bx.ko rtw_RFE_type=<rfe_type>\n\n");
+
+	return _FAIL;
 
 exit:
 	RTW_INFO("EEPROM rfe_type=0x%x\n", hal->rfe_type);
+	return _SUCCESS;
 }
 
 static void Hal_EfuseParsePackageType(PADAPTER adapter, u8 *map, u8 mapvalid)
 {
 }
 
-#ifdef CONFIG_RF_POWER_TRIM
-static void Hal_ReadRFGainOffset(PADAPTER adapter, u8 *map, u8 mapvalid)
+static void Hal_EfuseParsePABias(PADAPTER adapter)
 {
-	PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
+	struct hal_com_data *hal;
+	u8 data[2] = {0xFF, 0xFF};
+	u8 ret;
 
-	/*
-	 * BB_RF Gain Offset from EEPROM
-	 */
-	if ((_TRUE == mapvalid) || (adapter->registrypriv.RegPwrTrimEnable == 1)) {
-#if 0
-		hal->EEPROMRFGainOffset = map[EEPROM_RF_GAIN_OFFSET];
-		hal->EEPROMRFGainVal = EFUSE_Read1Byte(adapter, EEPROM_RF_GAIN_VAL);
-#else
-		hal->EEPROMRFGainOffset = 0;
-		hal->EEPROMRFGainVal = 0xFF;
-#endif
-	} else {
-		hal->EEPROMRFGainOffset = 0;
-		hal->EEPROMRFGainVal = 0xFF;
+
+	ret = rtw_efuse_access(adapter, 0, 0x3D7, 2, data);
+	if (_FAIL == ret) {
+		RTW_ERR("%s: Fail to read PA Bias from eFuse!\n", __FUNCTION__);
+		return;
 	}
-	RTW_INFO("EEPROM RFGainOffset=0x%02x\n", hal->EEPROMRFGainOffset);
-	RTW_INFO("EEPROM RFGainVal=0x%02x\n", hal->EEPROMRFGainVal);
+
+	hal = GET_HAL_DATA(adapter);
+	hal->efuse0x3d7 = data[0];	/* efuse[0x3D7] */
+	hal->efuse0x3d8 = data[1];	/* efuse[0x3D8] */
+
+	RTW_INFO("EEPROM efuse[0x3D7]=0x%x\n", hal->efuse0x3d7);
+	RTW_INFO("EEPROM efuse[0x3D8]=0x%x\n", hal->efuse0x3d8);
 }
-#endif /* CONFIG_RF_POWER_TRIM */
+
 
 #ifdef CONFIG_USB_HCI
 static void Hal_ReadUsbModeSwitch(PADAPTER adapter, u8 *map, u8 mapvalid)
@@ -573,19 +576,20 @@ static void Hal_ReadUsbModeSwitch(PADAPTER adapter, u8 *map, u8 mapvalid)
  *	3. Read file if necessary
  *	4. Parsing Efuse data
  */
-void rtl8822b_read_efuse(PADAPTER adapter)
+u8 rtl8822b_read_efuse(PADAPTER adapter)
 {
 	PHAL_DATA_TYPE hal;
 	u8 val8;
 	u8 *efuse_map = NULL;
 	u8 valid;
-
+	u8 ret = _FAIL;
 
 	hal = GET_HAL_DATA(adapter);
 	efuse_map = hal->efuse_eeprom_data;
 
 #ifdef CONFIG_RTW_MAC_HIDDEN_RPT
-	hal_read_mac_hidden_rpt(adapter);
+	if (hal_read_mac_hidden_rpt(adapter) != _SUCCESS)
+		goto exit;
 #endif
 
 	/* 1. Read registers to check hardware eFuse available or not */
@@ -627,17 +631,21 @@ void rtl8822b_read_efuse(PADAPTER adapter)
 	Hal_EfuseParseCustomerID(adapter, efuse_map, valid);
 	Hal_DetectWoWMode(adapter);
 	Hal_ReadAmplifierType(adapter, efuse_map, valid);
-	Hal_ReadRFEType(adapter, efuse_map, valid);
+	if (Hal_ReadRFEType(adapter, efuse_map, valid) != _SUCCESS)
+		goto exit;
 
 	/* Data out of Efuse Map */
 	Hal_EfuseParsePackageType(adapter, efuse_map, valid);
-#ifdef CONFIG_RF_POWER_TRIM
-	Hal_ReadRFGainOffset(adapter, efuse_map, valid);
-#endif /* CONFIG_RF_POWER_TRIM */
+	Hal_EfuseParsePABias(adapter);
 
 #ifdef CONFIG_USB_HCI
 	Hal_ReadUsbModeSwitch(adapter, efuse_map, valid);
 #endif /* CONFIG_USB_HCI */
+
+	ret = _SUCCESS;
+
+exit:
+	return ret;
 }
 
 void rtl8822b_run_thread(PADAPTER adapter)
@@ -668,63 +676,17 @@ static u8 check_ips_status(PADAPTER adapter)
 	return _FALSE;
 }
 
-static void update_ra_mask(PADAPTER adapter, struct sta_info *psta, u32 mac_id, u8 rssi_level)
+static void update_ra_mask_8822b(_adapter *adapter, struct sta_info *psta, struct macid_cfg *h2c_macid_cfg)
 {
-	u64 mask, rate_bitmap = 0, *dm_RA_Mask = NULL;
-	u32	ratr_bitmap_msb, ratr_bitmap_lsb;
-	u8	disable_cck_rate = FALSE, MimoPs_enable = FALSE;
-	u8 shortGIrate = _FALSE, *dm_RteID = NULL;
 	u8 arg[4] = {0};
-	PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
-	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
-	struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
-	u8 bw;
-
-	if (psta == NULL) {
-		RTW_PRINT(FUNC_ADPT_FMT " macid:%u, sta is NULL\n",
-			  FUNC_ADPT_ARG(adapter), mac_id);
-		return;
-	}
-
-	RTW_INFO(FUNC_ADPT_FMT ": mac_id=%d rssi_level=%d\n", FUNC_ADPT_ARG(adapter), mac_id, rssi_level);
-
-	bw = rtw_get_tx_bw_mode(adapter, psta);
-	shortGIrate = query_ra_short_GI(psta, bw);
-	mask = psta->ra_mask;
-#if 1
-	ratr_bitmap_msb = (u32)(mask>>32);
-	ratr_bitmap_lsb = (u32)(mask);
-
-	phydm_update_hal_ra_mask(&hal->odmpriv, psta->wireless_mode, hal->rf_type, bw, MimoPs_enable, disable_cck_rate, &ratr_bitmap_msb, &ratr_bitmap_lsb, rssi_level);
-	mask = (((u64)ratr_bitmap_msb)<<32) | ((u64)ratr_bitmap_lsb);
-
-#else
-	rate_bitmap = 0xffffffff;
-	rate_bitmap = phydm_get_rate_bitmap_ex(&hal->odmpriv, mac_id, mask, rssi_level, dm_RA_Mask, dm_RteID);
-	mask &= rate_bitmap;
-#endif
-
-#ifdef CONFIG_BT_COEXIST
-	if (hal->EEPROMBluetoothCoexist) {
-		rate_bitmap = rtw_btcoex_GetRaMask(adapter);
-		mask &= ~rate_bitmap;
-	}
-#endif /* CONFIG_BT_COEXIST */
-	RTW_INFO("%s => mac_id:%d, networkType:0x%02x, mask:0x%016llx\n\t ==> rssi_level:%d, rate_bitmap:0x%016llx, shortGIrate=%d\n",
-		__FUNCTION__, mac_id, psta->wireless_mode, mask, rssi_level, rate_bitmap, shortGIrate);
 
-	arg[0] = mac_id;
-	arg[1] = psta->raid;
-	arg[2] = shortGIrate;
+	arg[0] = h2c_macid_cfg->mac_id;
+	arg[1] = h2c_macid_cfg->rate_id;
+	arg[2] = (h2c_macid_cfg->ignore_bw << 4) | h2c_macid_cfg->short_gi;
 	arg[3] = psta->init_rate;
 
-	rtl8822b_set_FwMacIdConfig_cmd(adapter, mask, arg, bw);
+	rtl8822b_set_FwMacIdConfig_cmd(adapter, h2c_macid_cfg->ra_mask, arg, h2c_macid_cfg->bandwidth);
 
-	rtw_macid_ctl_set_bw(macid_ctl, mac_id, bw);
-	rtw_macid_ctl_set_vht_en(macid_ctl, mac_id, is_supported_vht(psta->wireless_mode));
-	rtw_macid_ctl_set_rate_bmp0(macid_ctl, mac_id, mask);
-	rtw_macid_ctl_set_rate_bmp1(macid_ctl, mac_id, mask >> 32);
-	rtw_update_tx_rate_bmp(adapter_to_dvobj(adapter));
 }
 
 static void InitBeaconParameters(PADAPTER adapter)
@@ -743,7 +705,14 @@ static void InitBeaconParameters(PADAPTER adapter)
 #endif
 	rtw_write16(adapter, REG_BCN_CTRL_8822B, val16);
 
-	rtw_write16(adapter, REG_TBTT_PROHIBIT_8822B, 0x6404); /* ms */
+	/* setup time:128 us */
+	rtw_write8(adapter, REG_TBTT_PROHIBIT_8822B, 0x04);
+
+	/*TBTT hold time :4ms 0x540[19:8]*/
+	rtw_write8(adapter, REG_TBTT_PROHIBIT_8822B + 1,
+		TBTT_PROBIHIT_HOLD_TIME & 0xFF);
+	rtw_write8(adapter, REG_TBTT_PROHIBIT_8822B + 2,
+		(rtw_read8(adapter, REG_TBTT_PROHIBIT_8822B + 2) & 0xF0) | (TBTT_PROBIHIT_HOLD_TIME >> 8));
 
 	rtw_write8(adapter, REG_DRVERLYINT_8822B, DRIVER_EARLY_INT_TIME_8822B); /* 5ms */
 	rtw_write8(adapter, REG_BCNDMATIM_8822B, BCN_DMA_ATIME_INT_TIME_8822B); /* 2ms */
@@ -753,38 +722,6 @@ static void InitBeaconParameters(PADAPTER adapter)
 	 * beacause test chip does not contension before sending beacon.
 	 */
 	rtw_write16(adapter, REG_BCNTCFG_8822B, 0x660F);
-
-	hal->RegBcnCtrlVal = rtw_read8(adapter, REG_BCN_CTRL_8822B);
-	hal->RegTxPause = rtw_read8(adapter, REG_TXPAUSE_8822B);
-	hal->RegFwHwTxQCtrl = rtw_read8(adapter, REG_FWHW_TXQ_CTRL_8822B + 2);
-	hal->RegReg542 = rtw_read8(adapter, REG_TBTT_PROHIBIT_8822B + 2);
-	hal->RegCR_1 = rtw_read8(adapter, REG_CR_8822B + 1);
-}
-
-void rtl8822b_resume_tx_beacon(PADAPTER adapter)
-{
-	PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
-
-
-	hal->RegFwHwTxQCtrl |= (BIT_EN_BCNQ_DL_8822B >> 16);
-	rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8822B + 2, hal->RegFwHwTxQCtrl);
-
-	rtw_write8(adapter, REG_TBTT_PROHIBIT_8822B + 1, 0xff);
-	hal->RegReg542 |= BIT(0);
-	rtw_write8(adapter, REG_TBTT_PROHIBIT_8822B + 2, hal->RegReg542);
-}
-
-void rtl8822b_stop_tx_beacon(PADAPTER adapter)
-{
-	PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
-
-
-	hal->RegFwHwTxQCtrl &= ~(BIT_EN_BCNQ_DL_8822B >> 16);
-	rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8822B + 2, hal->RegFwHwTxQCtrl);
-
-	rtw_write8(adapter, REG_TBTT_PROHIBIT_8822B + 1, 0x64);
-	hal->RegReg542 &= ~BIT(0);
-	rtw_write8(adapter, REG_TBTT_PROHIBIT_8822B + 2, hal->RegReg542);
 }
 
 static void beacon_function_enable(PADAPTER adapter, u8 Enable, u8 Linked)
@@ -876,7 +813,7 @@ static void set_beacon_related_registers(PADAPTER adapter)
 
 	beacon_function_enable(adapter, _TRUE, _TRUE);
 
-	rtl8822b_resume_tx_beacon(adapter);
+	ResumeTxBeacon(adapter);
 }
 
 static void xmit_status_check(PADAPTER p)
@@ -971,6 +908,16 @@ static void hw_port0_tsf_sync_sel(_adapter *adapter, u8 hw_port, u8 benable, u16
 {
 	u8 val8, client_port_num = 0;
 
+	/* check if port0 is already synced */
+	if (adapter->tsf.sync_port != MAX_HW_PORT)
+		return;
+
+	if (benable && hw_port == HW_PORT0) {
+		RTW_ERR(FUNC_ADPT_FMT ": hw_port is port0 under enable\n", FUNC_ADPT_ARG(adapter));
+		rtw_warn_on(1);
+		return;
+	}
+
 	/* translate hw_port number to client port numer */
 	switch (hw_port) {
 	case HW_PORT1:
@@ -985,17 +932,6 @@ static void hw_port0_tsf_sync_sel(_adapter *adapter, u8 hw_port, u8 benable, u16
 	case HW_PORT4:
 		client_port_num = 3;
 		break;
-	default:
-		RTW_ERR(FUNC_ADPT_FMT ": ERRO hw port number(%d)\n",
-			FUNC_ADPT_ARG(adapter), hw_port);
-		rtw_warn_on(1);
-		break;
-	}
-
-	if (adapter->hw_port != HW_PORT0) {
-		RTW_ERR(FUNC_ADPT_FMT ": is not port0(%d)\n",
-			FUNC_ADPT_ARG(adapter), adapter->hw_port);
-		rtw_warn_on(1);
 	}
 
 	/* stop port0 bcn funtion */
@@ -1021,6 +957,7 @@ static void hw_port0_tsf_sync_sel(_adapter *adapter, u8 hw_port, u8 benable, u16
 		val8 |= (BIT(6) | (client_port_num << 4));
 	} else
 		val8 &= ~BIT(6);
+
 	rtw_write8(adapter, REG_TIMER0_SRC_SEL_8822B, val8);
 
 	/* restart port0 bcn funtion */
@@ -1054,7 +991,7 @@ static void set_opmode_port0(PADAPTER adapter, u8 mode)
 	case _HW_STATE_NOLINK_:
 	case _HW_STATE_STATION_:
 		if (_FALSE == is_ap_exist) {
-			rtl8822b_stop_tx_beacon(adapter);
+			StopTxBeacon(adapter);
 #ifdef CONFIG_PCI_HCI
 			UpdateInterruptMask8822BE(adapter, 0, 0, RT_BCN_INT_MASKS, 0);
 #endif /* CONFIG_PCI_HCI */
@@ -1074,7 +1011,7 @@ static void set_opmode_port0(PADAPTER adapter, u8 mode)
 		break;
 
 	case _HW_STATE_ADHOC_:
-		rtl8822b_resume_tx_beacon(adapter);
+		ResumeTxBeacon(adapter);
 		val8 = BIT_DIS_TSF_UDT_8822B | BIT_EN_BCN_FUNCTION_8822B;
 		rtw_write8(adapter, REG_BCN_CTRL_8822B, val8);
 
@@ -1087,7 +1024,7 @@ static void set_opmode_port0(PADAPTER adapter, u8 mode)
 		UpdateInterruptMask8822BE(adapter, RT_BCN_INT_MASKS, 0, 0, 0);
 #endif /* CONFIG_PCI_HCI */
 
-		rtl8822b_resume_tx_beacon(adapter);
+		ResumeTxBeacon(adapter);
 
 		/*
 		 * enable BCN0 Function for if1
@@ -1138,9 +1075,19 @@ static void set_opmode_port0(PADAPTER adapter, u8 mode)
 		/* Beacon Control related register for first time */
 		rtw_write8(adapter, REG_BCNDMATIM_8822B, 0x02); /* 2ms */
 
-		rtw_write8(adapter, REG_ATIMWND_8822B, 0x0a); /* 10ms */
+		rtw_write8(adapter, REG_ATIMWND_8822B, 0x0c); /* 12ms */
+
 		rtw_write16(adapter, REG_BCNTCFG_8822B, 0x00);
-		rtw_write16(adapter, REG_TBTT_PROHIBIT_8822B, 0xff04);
+
+		/* setup time:128 us */
+		rtw_write8(adapter, REG_TBTT_PROHIBIT_8822B, 0x04);
+
+		/*TBTT hold time :4ms 0x540[19:8]*/
+		rtw_write8(adapter, REG_TBTT_PROHIBIT_8822B + 1,
+			TBTT_PROBIHIT_HOLD_TIME & 0xFF);
+		rtw_write8(adapter, REG_TBTT_PROHIBIT_8822B + 2,
+			(rtw_read8(adapter, REG_TBTT_PROHIBIT_8822B + 2) & 0xF0) | (TBTT_PROBIHIT_HOLD_TIME >> 8));
+
 		rtw_write16(adapter, REG_TSFTR_SYN_OFFSET_8822B, 0x7fff); /* +32767 (~32ms) */
 
 		/* reset TSF */
@@ -1203,7 +1150,7 @@ static void set_opmode_port1(PADAPTER adapter, u8 mode)
 	case _HW_STATE_NOLINK_:
 	case _HW_STATE_STATION_:
 		if (_FALSE == is_ap_exist) {
-			rtl8822b_stop_tx_beacon(adapter);
+			StopTxBeacon(adapter);
 #ifdef CONFIG_PCI_HCI
 			UpdateInterruptMask8822BE(adapter, 0, 0, RT_BCN_INT_MASKS, 0);
 #endif /* CONFIG_PCI_HCI */
@@ -1218,7 +1165,7 @@ static void set_opmode_port1(PADAPTER adapter, u8 mode)
 		break;
 
 	case _HW_STATE_ADHOC_:
-		rtl8822b_resume_tx_beacon(adapter);
+		ResumeTxBeacon(adapter);
 		val8 = BIT_CLI0_DIS_TSF_UDT_8822B | BIT_CLI0_EN_BCN_FUNCTION_8822B;
 		rtw_write8(adapter, REG_BCN_CTRL_CLINT0_8822B, val8);
 
@@ -1470,7 +1417,7 @@ static void hw_var_set_correct_tsf(PADAPTER adapter)
 
 	if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE)
 	    || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE))
-		rtl8822b_stop_tx_beacon(adapter);
+		StopTxBeacon(adapter);
 
 	rtw_hal_correct_tsf(adapter, adapter->hw_port, tsf);
 
@@ -1493,12 +1440,15 @@ static void hw_var_set_correct_tsf(PADAPTER adapter)
 			    && (check_fwstate(&iface->mlmepriv, WIFI_ASOC_STATE) == _TRUE))
 				hw_port0_tsf_sync_sel(iface, adapter->hw_port, _TRUE, 50);/* the offset = 50ms.*/
 		}
-	}
-#endif /* CONFIG_CONCURRENT_MODE */
+	} else if (((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE)
+										&& (adapter->hw_port == HW_PORT0))
+	#endif /*CONFIG_CONCURRENT_MODE*/
+			/* disable func of port0 TSF sync from another port*/
+			hw_port0_tsf_sync_sel(adapter, adapter->hw_port, _FALSE, 0);
 
 	if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE)
 	    || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE))
-		rtl8822b_resume_tx_beacon(adapter);
+		ResumeTxBeacon(adapter);
 #endif /* !CONFIG_MI_WITH_MBSSID_CAM */
 }
 
@@ -1609,7 +1559,7 @@ static void hw_var_set_mlme_sitesurvey(PADAPTER adapter, u8 enable)
 		hal->RegRRSR = rtw_read16(adapter, REG_RRSR_8822B);
 
 		if (rtw_mi_check_status(adapter, MI_AP_MODE))
-			rtl8822b_stop_tx_beacon(adapter);
+			StopTxBeacon(adapter);
 	} else {
 		/* sitesurvey done
 		 * 1. enable rx data frame
@@ -1659,7 +1609,7 @@ static void hw_var_set_mlme_join(PADAPTER adapter, u8 type)
 	if (type == 0) {
 		/* prepare to join */
 		if (rtw_mi_check_status(adapter, MI_AP_MODE))
-			rtl8822b_stop_tx_beacon(adapter);
+			StopTxBeacon(adapter);
 
 		/* enable to rx data frame.Accept all data frame */
 		rtw_write16(adapter, REG_RXFLTMAP_8822B, 0xFFFF);
@@ -1693,7 +1643,7 @@ static void hw_var_set_mlme_join(PADAPTER adapter, u8 type)
 			rtw_write16(adapter, REG_RXFLTMAP_8822B, 0x00);
 
 		if (rtw_mi_check_status(adapter, MI_AP_MODE)) {
-			rtl8822b_resume_tx_beacon(adapter);
+			ResumeTxBeacon(adapter);
 
 			/* reset TSF 1/2 after resume_tx_beacon */
 			val8 = BIT_TSFTR_RST_8822B | BIT_TSFTR_CLI0_RST_8822B;
@@ -1722,7 +1672,7 @@ static void hw_var_set_mlme_join(PADAPTER adapter, u8 type)
 		}
 
 		if (rtw_mi_check_status(adapter, MI_AP_MODE)) {
-			rtl8822b_resume_tx_beacon(adapter);
+			ResumeTxBeacon(adapter);
 
 			/* reset TSF 1/2 after resume_tx_beacon */
 			rtw_write8(adapter, REG_DUAL_TSF_RST_8822B, BIT_TSFTR_RST_8822B | BIT_TSFTR_CLI0_RST_8822B);
@@ -1735,13 +1685,13 @@ static void hw_var_set_mlme_join(PADAPTER adapter, u8 type)
 	if (type == 0) {
 		/* prepare to join */
 
-		/* enable to rx data frame.Accept all data frame */
+		/* enable to rx data frame. Accept all data frame */
 		rtw_write16(adapter, REG_RXFLTMAP_8822B, 0xFFFF);
 
 		hw_var_set_check_bssid(adapter, !adapter->in_cta_test);
 
 		/*
-		 * for 8822B, must enable BCN function if BIT_CBSSID_BCN_8822B(bit 7) of REG_RCR(0x608) is enable to recv BSSID bcn
+		 * for 8822B, must enable BCN function if BIT_CBSSID_BCN_8822B(bit 7) of REG_RCR(0x608) is enabled to recv BSSID bcn
 		 */
 		hw_var_set_bcn_func(adapter, _TRUE);
 
@@ -1821,15 +1771,14 @@ static void hw_var_set_bcn_interval(PADAPTER adapter, u16 bcn_interval)
 	if (adapter->hw_port == HW_PORT1) {
 		/* Port 1(clint 0) */
 		val16 = rtw_read16(adapter, (REG_MBSSID_BCN_SPACE_8822B + 2));
+		val16 &= (~BIT_MASK_BCN_SPACE_CLINT0_8822B);
 		val16 |= (bcn_interval & BIT_MASK_BCN_SPACE_CLINT0_8822B);
 		rtw_write16(adapter, REG_MBSSID_BCN_SPACE_8822B + 2, val16);
 	} else
 #endif
 	{
 		/* Port 0 */
-		val16 = rtw_read16(adapter, (REG_MBSSID_BCN_SPACE_8822B));
-		val16 |= (bcn_interval & BIT_MASK_BCN_SPACE0_8822B);
-		rtw_write16(adapter, REG_MBSSID_BCN_SPACE_8822B, val16);
+		rtw_write16(adapter, REG_MBSSID_BCN_SPACE_8822B, bcn_interval);
 	}
 
 	RTW_INFO("%s: [HW_VAR_BEACON_INTERVAL] 0x%x=0x%x\n", __FUNCTION__,
@@ -1928,8 +1877,8 @@ void hw_var_set_dl_rsvd_page(PADAPTER adapter, u8 mstatus)
 #endif
 		u8 v8;
 
-		/* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. */
-		rtw_write16(adapter, REG_BCN_PSR_RPT_8822B, (0xC000 | pmlmeinfo->aid));
+		/* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 8822B. */
+		rtw_write16(adapter, port_cfg[get_hw_port(adapter)].ps_aid, (0xF800 | pmlmeinfo->aid));
 
 		/* Enable SW TX beacon */
 		v8 = rtw_read8(adapter, REG_CR_8822B + 1);
@@ -1949,13 +1898,14 @@ void hw_var_set_dl_rsvd_page(PADAPTER adapter, u8 mstatus)
 
 #if 0
 		/* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */
-		if (hal->RegFwHwTxQCtrl & BIT(6))
+		RegFwHwTxQCtrl = rtw_read8(adapter, REG_FWHW_TXQ_CTRL_8822B + 2);
+
+		if (RegFwHwTxQCtrl & BIT(6))
 			bRecover = _TRUE;
 
 		/* To tell Hw the packet is not a real beacon frame. */
-		val8 = hal->RegFwHwTxQCtrl & ~BIT(6);
-		rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8822B + 2, val8);
-		hal->RegFwHwTxQCtrl &= ~BIT(6);
+		RegFwHwTxQCtrl &= ~BIT(6);
+		rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8822B + 2, RegFwHwTxQCtrl);
 #endif
 
 		/* Clear beacon valid check bit. */
@@ -2001,8 +1951,8 @@ void hw_var_set_dl_rsvd_page(PADAPTER adapter, u8 mstatus)
 		 * the beacon cannot be sent by HW.
 		 */
 		if (bRecover) {
-			rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8822B + 2, hal->RegFwHwTxQCtrl | BIT(6));
-			hal->RegFwHwTxQCtrl |= BIT(6);
+			RegFwHwTxQCtrl |= BIT(6);
+			rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8822B + 2, RegFwHwTxQCtrl);
 		}
 #endif
 #ifndef CONFIG_PCI_HCI
@@ -2361,11 +2311,11 @@ void rtl8822b_sethwreg(PADAPTER adapter, u8 variable, u8 *val)
 	case HW_VAR_FWLPS_RF_ON:
 		break;
 */
-#ifdef CONFIG_P2P
+#ifdef CONFIG_P2P_PS
 	case HW_VAR_H2C_FW_P2P_PS_OFFLOAD:
-		rtl8822b_set_p2p_ps_offload_cmd(adapter, *val);
+		rtw_set_p2p_ps_offload_cmd(adapter, *val);
 		break;
-#endif
+#endif /* CONFIG_P2P_PS */
 /*
 	case HW_VAR_TRIGGER_GPIO_0:
 	case HW_VAR_BT_SET_COEXIST:
@@ -2522,15 +2472,18 @@ void rtl8822b_sethwreg(PADAPTER adapter, u8 variable, u8 *val)
 		u8 value = 0;
 		u8 addr = REG_PAD_CTRL1_8822B + 3;
 
-		value = rtw_read8(adapter, addr);
+		if (WAKEUP_GPIO_IDX == 6) {
+			value = rtw_read8(adapter, addr);
 
-		if (enable == _TRUE && (value & BIT(1)))
-			/* set 0x64[25] = 0 to control GPIO 6 */
-			rtw_write8(adapter, addr, value & (~BIT(1)));
-		else if (enable == _FALSE)
-			rtw_write8(adapter, addr, value | BIT(1));
+			if (enable == _TRUE && (value & BIT(1)))
+				/* set 0x64[25] = 0 to control GPIO 6 */
+				rtw_write8(adapter, addr, value & (~BIT(1)));
+			else if (enable == _FALSE)
+				rtw_write8(adapter, addr, value | BIT(1));
 
-		RTW_INFO("[HW_SET_GPIO_WL_CTRL] 0x%02X=0x%02X\n", addr, rtw_read8(adapter, addr));
+			RTW_INFO("[HW_SET_GPIO_WL_CTRL] 0x%02X=0x%02X\n",
+				 addr, rtw_read8(adapter, addr));
+		}
 	}
 	break;
 #endif
@@ -3107,7 +3060,7 @@ u8 rtl8822b_gethaldefvar(PADAPTER adapter, HAL_DEF_VARIABLE variable, void *pval
 		break;
 
 	case HAL_DEF_MAX_RECVBUF_SZ:
-		*((u32 *)pval) = HALMAC_RX_FIFO_SIZE_8822B;
+		*((u32 *)pval) = MAX_RECVBUF_SZ;
 		break;
 
 	case HAL_DEF_RX_PACKET_OFFSET:
@@ -3715,16 +3668,7 @@ static void fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf)
 
 		SET_TX_DESC_MBSSID_8822B(pbuf, pattrib->mbssid & 0xF);
 
-#ifdef CONFIG_INTEL_PROXIM
-		if ((adapter->proximity.proxim_on == _TRUE)
-		    && (pattrib->intel_proxim == _TRUE)) {
-			RTW_INFO("%s: pattrib->rate=%d\n", __FUNCTION__, pattrib->rate);
-			SET_TX_DESC_DATARATE_8822B(pbuf, pattrib->rate);
-		} else
-#endif
-		{
-			SET_TX_DESC_DATARATE_8822B(pbuf, MRateToHwRate(pmlmeext->tx_rate));
-		}
+		SET_TX_DESC_DATARATE_8822B(pbuf, MRateToHwRate(pattrib->rate));
 
 		rtl8822b_fill_txdesc_mgnt_bf(pxmitframe, pbuf);
 
@@ -3796,6 +3740,9 @@ static void fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf)
 	if (!pattrib->qos_en)
 		SET_TX_DESC_EN_HWSEQ_8822B(pbuf, 1);
 
+	SET_TX_DESC_PORT_ID_8822B(pbuf, get_hw_port(adapter));
+	SET_TX_DESC_MULTIPLE_PORT_8822B(pbuf, get_hw_port(adapter));
+
 	rtl8822b_fill_txdesc_bf(pxmitframe, pbuf);
 }
 
@@ -3811,7 +3758,7 @@ void rtl8822b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf)
 	fill_default_txdesc(pxmitframe, pbuf);
 
 #ifdef CONFIG_ANTENNA_DIVERSITY
-	ODM_SetTxAntByTxInfo(&GET_HAL_DATA(pxmitframe->adapter)->odmpriv, pbuf, pxmitframe->attrib.mac_id);
+	odm_set_tx_ant_by_tx_info(&GET_HAL_DATA(pxmitframe->padapter)->odmpriv, pbuf, pxmitframe->attrib.mac_id);
 #endif /* CONFIG_ANTENNA_DIVERSITY */
 
 	rtl8822b_cal_txdesc_chksum(pxmitframe->padapter, pbuf);
@@ -3889,6 +3836,7 @@ static void fill_fake_txdesc(PADAPTER adapter, u8 *pDesc, u32 BufferLen,
 	}
 
 	SET_TX_DESC_PORT_ID_8822B(pDesc, get_hw_port(adapter));
+	SET_TX_DESC_MULTIPLE_PORT_8822B(pDesc, get_hw_port(adapter));
 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
 	/*
 	 * USB interface drop packet if the checksum of descriptor isn't correct.
@@ -3972,11 +3920,22 @@ void rtl8822b_query_rx_desc(union recv_frame *precvframe, u8 *pdesc)
 
 void rtl8822b_set_hal_ops(PADAPTER adapter)
 {
+	struct hal_com_data *hal;
 	struct hal_ops *ops;
 
 
+	hal = GET_HAL_DATA(adapter);
 	ops = &adapter->hal_func;
 
+	/*
+	 * Initialize hal_com_data variables
+	 */
+	hal->efuse0x3d7 = 0xFF;
+	hal->efuse0x3d8 = 0xFF;
+
+	/*
+	 * Initialize operation callback functions
+	 */
 	/*** initialize section ***/
 	ops->read_chip_version = read_chip_version;
 /*
@@ -4058,7 +4017,7 @@ void rtl8822b_set_hal_ops(PADAPTER adapter)
 	ops->GetHalODMVarHandler = GetHalODMVar;
 	ops->SetHalODMVarHandler = SetHalODMVar;
 
-	ops->UpdateRAMaskHandler = update_ra_mask;
+	ops->update_ra_mask_handler = update_ra_mask_8822b;
 	ops->SetBeaconRelatedRegistersHandler = set_beacon_related_registers;
 
 /*
@@ -4126,4 +4085,5 @@ void rtl8822b_set_hal_ops(PADAPTER adapter)
 	/* HALMAC related functions */
 	ops->init_mac_register = rtl8822b_phy_init_mac_register;
 	ops->init_phy = rtl8822b_phy_init;
+	ops->reqtxrpt = rtl8822b_req_txrpt_cmd;
 }
diff --git a/rtl8822BU/hal/rtl8822b/rtl8822b_phy.c b/rtl8822BU/hal/rtl8822b/rtl8822b_phy.c
index ffa0094..e606317 100755..100644
--- a/rtl8822BU/hal/rtl8822b/rtl8822b_phy.c
+++ b/rtl8822BU/hal/rtl8822b/rtl8822b_phy.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTL8822B_PHY_C_
 
 #include <hal_data.h>		/* HAL_DATA_TYPE */
@@ -292,7 +287,7 @@ u8 rtl8822b_phy_init(PADAPTER adapter)
 
 	rtw_halmac_phy_power_switch(adapter_to_dvobj(adapter), _TRUE);
 
-	ret = config_phydm_parameter_init(phydm, ODM_PRE_SETTING);
+	ret = config_phydm_parameter_init_8822b(phydm, ODM_PRE_SETTING);
 	if (FALSE == ret)
 		return _FALSE;
 
@@ -303,7 +298,7 @@ u8 rtl8822b_phy_init(PADAPTER adapter)
 	if (_FALSE == ok)
 		return _FALSE;
 
-	ret = config_phydm_parameter_init(phydm, ODM_POST_SETTING);
+	ret = config_phydm_parameter_init_8822b(phydm, ODM_POST_SETTING);
 	if (FALSE == ret)
 		return _FALSE;
 
@@ -444,6 +439,38 @@ void dm_InterruptMigration(PADAPTER adapter)
 }
 #endif /* CONFIG_PCI_HCI */
 
+#ifdef CONFIG_BEAMFORMING
+#ifdef RTW_BEAMFORMING_VERSION_2
+void dm_HalBeamformingConfigCSIRate(PADAPTER adapter)
+{
+	struct PHY_DM_STRUCT *p_dm_odm;
+	struct beamforming_info *bf_info;
+	u8 fix_rate_enable = 0;
+	u8 new_csi_rate_idx;
+
+	/* Acting as BFee */
+	if (IS_BEAMFORMEE(adapter)) {
+	#if 0
+		/* Do not enable now because it will affect MU performance and CTS/BA rate. 2016.07.19. by tynli. [PCIE-1660] */
+		if (IS_HARDWARE_TYPE_8821C(Adapter))
+			FixRateEnable = 1;	/* Support after 8821C */
+	#endif
+
+		p_dm_odm = GET_ODM(adapter);
+		bf_info = GET_BEAMFORM_INFO(adapter);
+
+		rtw_halmac_bf_cfg_csi_rate(adapter_to_dvobj(adapter),
+				p_dm_odm->rssi_min,
+				bf_info->cur_csi_rpt_rate,
+				fix_rate_enable, &new_csi_rate_idx);
+
+		if (new_csi_rate_idx != bf_info->cur_csi_rpt_rate)
+			bf_info->cur_csi_rpt_rate = new_csi_rate_idx;
+	}
+}
+#endif /* RTW_BEAMFORMING_VERSION_2 */
+#endif /* CONFIG_BEAMFORMING */
+
 /*
  * ============================================================
  * functions
@@ -501,62 +528,6 @@ static void init_phydm_cominfo(PADAPTER adapter)
 	odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_FAB_VER, fab_ver);
 	odm_cmn_info_init(p_dm_odm, ODM_CMNINFO_CUT_VER, cut_ver);
 
-#ifdef CONFIG_DISABLE_ODM
-	support_ability = 0;
-#else /* !CONFIG_DISABLE_ODM */
-	support_ability = ODM_RF_CALIBRATION | ODM_RF_TX_PWR_TRACK;
-#endif /* !CONFIG_DISABLE_ODM */
-	odm_cmn_info_update(p_dm_odm, ODM_CMNINFO_ABILITY, support_ability);
-}
-
-static void update_phydm_cominfo(PADAPTER adapter)
-{
-	PHAL_DATA_TYPE hal;
-	struct PHY_DM_STRUCT *p_dm_odm;
-	u32 support_ability = 0;
-
-
-	hal = GET_HAL_DATA(adapter);
-	p_dm_odm = &hal->odmpriv;
-
-	support_ability = 0
-			 | ODM_BB_DIG
-			 | ODM_BB_RA_MASK
-			 | ODM_BB_DYNAMIC_TXPWR
-			 | ODM_BB_FA_CNT
-			 | ODM_BB_RSSI_MONITOR
-			 | ODM_BB_CCK_PD
-/*			 | ODM_BB_PWR_SAVE*/
-			 | ODM_BB_CFO_TRACKING
-			 | ODM_MAC_EDCA_TURBO
-			 | ODM_RF_TX_PWR_TRACK
-			 | ODM_RF_CALIBRATION
-			 | ODM_BB_NHM_CNT
-/*			 | ODM_BB_PWR_TRAIN*/
-			 ;
-
-	if (rtw_odm_adaptivity_needed(adapter) == _TRUE)
-		support_ability |= ODM_BB_ADAPTIVITY;
-
-#ifdef CONFIG_ANTENNA_DIVERSITY
-	if (hal->AntDivCfg)
-		support_ability |= ODM_BB_ANT_DIV;
-#endif /* CONFIG_ANTENNA_DIVERSITY */
-
-#ifdef CONFIG_MP_INCLUDED
-	if (adapter->registrypriv.mp_mode == 1) {
-		support_ability = 0
-				 | ODM_RF_CALIBRATION
-				 | ODM_RF_TX_PWR_TRACK
-				 ;
-	}
-#endif /* CONFIG_MP_INCLUDED */
-
-#ifdef CONFIG_DISABLE_ODM
-	support_ability = 0;
-#endif /* CONFIG_DISABLE_ODM */
-
-	odm_cmn_info_update(p_dm_odm, ODM_CMNINFO_ABILITY, support_ability);
 }
 
 void rtl8822b_phy_init_dm_priv(PADAPTER adapter)
@@ -564,9 +535,13 @@ void rtl8822b_phy_init_dm_priv(PADAPTER adapter)
 	PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
 	struct PHY_DM_STRUCT *podmpriv = &hal->odmpriv;
 
-
 	init_phydm_cominfo(adapter);
 	odm_init_all_timers(podmpriv);
+	/*PHYDM API - thermal trim*/
+	phydm_get_thermal_trim_offset(podmpriv);
+	/*PHYDM API - power trim*/
+	phydm_get_power_trim_offset(podmpriv);
+
 }
 
 void rtl8822b_phy_deinit_dm_priv(PADAPTER adapter)
@@ -574,7 +549,6 @@ void rtl8822b_phy_deinit_dm_priv(PADAPTER adapter)
 	PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
 	struct PHY_DM_STRUCT *podmpriv = &hal->odmpriv;
 
-
 	odm_cancel_all_timers(podmpriv);
 }
 
@@ -587,10 +561,6 @@ void rtl8822b_phy_init_haldm(PADAPTER adapter)
 	hal = GET_HAL_DATA(adapter);
 	p_dm_odm = &hal->odmpriv;
 
-	hal->DM_Type = dm_type_by_driver;
-
-	update_phydm_cominfo(adapter);
-
 	odm_dm_init(p_dm_odm);
 }
 
@@ -636,13 +606,13 @@ void rtl8822b_phy_haldm_watchdog(PADAPTER adapter)
 	rtw_hal_get_hwreg(adapter, HW_VAR_FWLPS_RF_ON, (u8 *)&bFwPSAwake);
 #endif /* CONFIG_LPS */
 
-#ifdef CONFIG_P2P
+#ifdef CONFIG_P2P_PS
 	/*
 	 * Fw is under p2p powersaving mode, driver should stop dynamic mechanism.
 	 */
 	if (adapter->wdinfo.p2p_ps_mode)
 		bFwPSAwake = _FALSE;
-#endif /* CONFIG_P2P */
+#endif /* CONFIG_P2P_PS */
 
 	if ((rtw_is_hw_init_completed(adapter))
 	    && ((!bFwCurrentInPSMode) && bFwPSAwake)) {
@@ -678,6 +648,14 @@ void rtl8822b_phy_haldm_watchdog(PADAPTER adapter)
 		odm_dm_watchdog(&hal->odmpriv);
 	}
 
+#ifdef CONFIG_BEAMFORMING
+#ifdef RTW_BEAMFORMING_VERSION_2
+	if (check_fwstate(&adapter->mlmepriv, WIFI_STATION_STATE) &&
+			check_fwstate(&adapter->mlmepriv, _FW_LINKED))
+		dm_HalBeamformingConfigCSIRate(adapter);
+#endif
+#endif
+
 skip_dm:
 	/*
 	 * Check GPIO to determine current RF on/off and Pbc status.
@@ -951,18 +929,19 @@ u8 rtl8822b_get_tx_power_index(PADAPTER adapter, u8 rfpath, u8 rate, u8 bandwidt
 	PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
 	u8 base_idx = 0, power_idx = 0;
 	s8 by_rate_diff = 0, limit = 0, tpt_offset = 0, extra_bias = 0;
-	u8 tx_num = rtl8822b_phy_get_current_tx_num(adapter, rate);
+	u8 ntx_idx = rtl8822b_phy_get_current_tx_num(adapter, rate);
 	u8 bIn24G = _FALSE;
 
-	base_idx = PHY_GetTxPowerIndexBase(adapter, rfpath, rate, bandwidth, channel, &bIn24G);
+	base_idx = PHY_GetTxPowerIndexBase(adapter, rfpath, rate, ntx_idx, bandwidth, channel, &bIn24G);
 
-	by_rate_diff = PHY_GetTxPowerByRate(adapter, (u8)(!bIn24G), rfpath, tx_num, rate);
-	limit = PHY_GetTxPowerLimit(adapter, adapter->registrypriv.RegPwrTblSel, (BAND_TYPE)(!bIn24G),
-			hal->current_channel_bw, rfpath, rate, hal->current_channel);
+	by_rate_diff = PHY_GetTxPowerByRate(adapter, (u8)(!bIn24G), rfpath, rate);
+	limit = PHY_GetTxPowerLimit(adapter, NULL, (BAND_TYPE)(!bIn24G),
+			hal->current_channel_bw, rfpath, rate, ntx_idx, hal->current_channel);
 
 	/* tpt_offset += PHY_GetTxPowerTrackingOffset(adapter, rfpath, rate); */
 
 	if (tic) {
+		tic->ntx_idx = ntx_idx;
 		tic->base = base_idx;
 		tic->by_rate = by_rate_diff;
 		tic->limit = limit;
@@ -1151,7 +1130,7 @@ void rtl8822b_switch_chnl_and_set_bw(PADAPTER adapter)
 			return;
 		}
 	}
-
+	phydm_config_kfree(p_dm_odm, hal->current_channel);
 	/* 3. set Bandwidth register */
 	if (hal->bSetChnlBW) {
 		/* get primary channel index */
@@ -1728,7 +1707,10 @@ static void _config_beamformer_su(PADAPTER adapter, struct beamformer_entry *bfe
 
 static void _config_beamformer_mu(PADAPTER adapter, struct beamformer_entry *bfer)
 {
+	/* General */
+	PHAL_DATA_TYPE hal;
 	/* Beamforming */
+	struct beamforming_info *bf_info;
 	u8 nc_index = 0, nr_index = 0;
 	u8 grouping = 0, codebookinfo = 0, coefficientsize = 0;
 	u32 csi_param;
@@ -1736,36 +1718,38 @@ static void _config_beamformer_mu(PADAPTER adapter, struct beamformer_entry *bfe
 	u8 i, val8;
 	u16 val16;
 
-
 	RTW_INFO("%s: Config MU BFer entry HW setting\n", __FUNCTION__);
 
+	hal = GET_HAL_DATA(adapter);
+	bf_info = GET_BEAMFORM_INFO(adapter);
+
 	/* Reset GID table */
 	for (i = 0; i < 8; i++)
 		bfer->gid_valid[i] = 0;
 	for (i = 0; i < 16; i++)
 		bfer->user_position[i] = 0;
 
-	/* Sounding protocol control */
-	rtw_write8(adapter, REG_SND_PTCL_CTRL_8822B, 0xDB);
-
-	/* MAC address */
-	for (i = 0; i < ETH_ALEN; i++)
-		rtw_write8(adapter, REG_ASSOCIATED_BFMER0_INFO_8822B+i, bfer->mac_addr[i]);
+	/* CSI report parameters of Beamformer */
+	nc_index = _bf_get_nrx(adapter);
+	nr_index = 1; /* 0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so Nr_index don't care */
+	grouping = 0; /* no grouping */
+	codebookinfo = 1; /* 7 bit for psi, 9 bit for phi */
+	coefficientsize = 0; /* This is nothing really matter */
+	csi_param = (u16)((coefficientsize<<10)|(codebookinfo<<8)|
+			(grouping<<6)|(nr_index<<3)|(nc_index));
 
-	/* Set partial AID */
-	rtw_write16(adapter, REG_ASSOCIATED_BFMER0_INFO_8822B+6, bfer->p_aid);
+	RTW_INFO("%s: nc=%d nr=%d group=%d codebookinfo=%d coefficientsize=%d\n",
+		__func__, nc_index, nr_index, grouping, codebookinfo,
+		coefficientsize);
+	RTW_INFO("%s: csi=0x%04x\n", __func__, csi_param);
 
-	/*
-	 * Fill our AID to 0x1680[11:0] and
-	 * [13:12] = 2b'00, BF report segement select to 3895 bytes
-	 */
-	val16 = rtw_read16(adapter, REG_WMAC_MU_BF_CTL_8822B);
-	val16 = BIT_SET_WMAC_MU_BF_MYAID_8822B(val16, bfer->aid);
-	val16 = BIT_SET_WMAC_MU_BFRPTSEG_SEL_8822B(val16, 0);
-	rtw_write16(adapter, REG_WMAC_MU_BF_CTL_8822B, val16);
+	rtw_halmac_bf_add_mu_bfer(adapter_to_dvobj(adapter), bfer->p_aid,
+			csi_param, bfer->aid & 0xfff, HAL_CSI_SEG_4K,
+			bfer->mac_addr);
 
-	/* Set 80us for leaving ndp_rx_standby_state */
-	rtw_write8(adapter, REG_SND_PTCL_CTRL_8822B+3, 0x50);
+	bf_info->cur_csi_rpt_rate = HALMAC_OFDM54;
+	rtw_halmac_bf_cfg_sounding(adapter_to_dvobj(adapter), HAL_BFEE,
+			bf_info->cur_csi_rpt_rate);
 
 	/* Set 0x6A0[14] = 1 to accept action_no_ack */
 	val8 = rtw_read8(adapter, REG_RXFLTMAP0_8822B+1);
@@ -1777,26 +1761,11 @@ static void _config_beamformer_mu(PADAPTER adapter, struct beamformer_entry *bfe
 	val8 |= BIT_CTRLFLT4EN_8822B | BIT_CTRLFLT5EN_8822B;
 	rtw_write8(adapter, REG_RXFLTMAP1_8822B, val8);
 
-	/* CSI report parameters of Beamformer */
-	nc_index = _bf_get_nrx(adapter);
-	/*
-	 * 0x718[7] = 1 use Nsts
-	 * 0x718[7] = 0 use reg setting
-	 * As Bfee, we use Nsts, so nr_index don't care
-	 */
-	nr_index = 1;
-	grouping = 0; /* no grouping */
-	codebookinfo = 1; /* 7 bit for psi, 9 bit for phi */
-	coefficientsize = 0; /* This is nothing really matter */
-	csi_param = (u16)((coefficientsize<<10)|(codebookinfo<<8)|(grouping<<6)|(nr_index<<3)|(nc_index));
-	rtw_write16(adapter, REG_TX_CSI_RPT_PARAM_BW20_8822B, csi_param);
-	RTW_INFO("%s: nc=%d nr=%d group=%d codebookinfo=%d coefficientsize=%d\n",
-		 __FUNCTION__, nc_index, nr_index, grouping, codebookinfo, coefficientsize);
-	RTW_INFO("%s: csi=0x%04x\n", __FUNCTION__, csi_param);
-
 	/* for B-Cut */
-	phy_set_bb_reg(adapter, REG_RXFLTMAP0_8822B, BIT(20), 0);
-	phy_set_bb_reg(adapter, REG_RXFLTMAP3_8822B, BIT(20), 0);
+	if (IS_B_CUT(hal->version_id)) {
+		phy_set_bb_reg(adapter, REG_RXFLTMAP0_8822B, BIT(20), 0);
+		phy_set_bb_reg(adapter, REG_RXFLTMAP3_8822B, BIT(20), 0);
+	}
 }
 
 static void _config_beamformee_su(PADAPTER adapter, struct beamformee_entry *bfee)
@@ -2032,14 +2001,15 @@ static void _reset_beamformer_su(PADAPTER adapter, struct beamformer_entry *bfer
 
 static void _reset_beamformer_mu(PADAPTER adapter, struct beamformer_entry *bfer)
 {
-	/* Misc */
-	u32 val32;
+	struct beamforming_info *bf_info;
 
+	bf_info = GET_BEAMFORM_INFO(adapter);
 
-	/* Clear validity of MU STA0 and MU STA1 */
-	val32 = rtw_read32(adapter, REG_MU_TX_CTL_8822B);
-	val32 = BIT_SET_R_MU_TABLE_VALID_8822B(val32, 0);
-	rtw_write32(adapter, REG_MU_TX_CTL_8822B, val32);
+	rtw_halmac_bf_del_mu_bfer(adapter_to_dvobj(adapter));
+
+	if (bf_info->beamformer_su_cnt == 0 &&
+			bf_info->beamformer_mu_cnt == 0)
+		rtw_halmac_bf_del_sounding(adapter_to_dvobj(adapter), HAL_BFEE);
 
 	RTW_INFO("%s: Clear MU BFer entry HW setting\n", __FUNCTION__);
 }
@@ -2310,70 +2280,56 @@ void rtl8822b_phy_bf_leave(PADAPTER adapter, u8 *addr)
 	RTW_INFO("-%s\n", __FUNCTION__);
 }
 
-void rtl8822b_phy_bf_set_gid_table(PADAPTER adapter, struct beamformer_entry *bfer)
+void rtl8822b_phy_bf_set_gid_table(PADAPTER adapter,
+		struct beamformer_entry	*bfer_info)
 {
-	/* MU */
+	struct beamformer_entry *bfer;
 	struct beamforming_info *info;
-	u32 gid_valid, user_position_l, user_position_h;
-	/* Misc */
-	u32 val32;
+	u32 gid_valid[2] = {0};
+	u32 user_position[4] = {0};
 	int i;
 
+	/* update bfer info */
+	bfer = rtw_bf_bfer_get_entry_by_addr(adapter, bfer_info->mac_addr);
+	if (!bfer) {
+		RTW_INFO("%s: Cannot find BFer entry!!\n", __func__);
+		return;
+	}
+	_rtw_memcpy(bfer->gid_valid, bfer_info->gid_valid, 8);
+	_rtw_memcpy(bfer->user_position, bfer_info->user_position, 16);
 
 	info = GET_BEAMFORM_INFO(adapter);
-
 	info->bSetBFHwConfigInProgess = _TRUE;
 
 	/* For GID 0~31 */
-	gid_valid = 0;
-	user_position_l = 0;
-	user_position_h = 0;
 	for (i = 0; i < 4; i++)
-		gid_valid |= (bfer->gid_valid[i] << (i << 3));
+		gid_valid[0] |= (bfer->gid_valid[i] << (i << 3));
+
 	for (i = 0; i < 8; i++) {
 		if (i < 4)
-			user_position_l |= (bfer->user_position[i] << (i << 3));
+			user_position[0] |= (bfer->user_position[i] << (i << 3));
 		else
-			user_position_h |= (bfer->user_position[i] << ((i - 4) << 3));
+			user_position[1] |= (bfer->user_position[i] << ((i - 4) << 3));
 	}
-	/* select MU STA0 table */
-	val32 = rtw_read32(adapter, REG_MU_TX_CTL_8822B);
-	val32 = BIT_SET_R_MU_TAB_SEL_8822B(val32, 0);
-	rtw_write32(adapter, REG_MU_TX_CTL_8822B, val32);
-	rtw_write32(adapter, REG_MU_STA_GID_VLD_8822B, gid_valid);
-	rtw_write32(adapter, REG_MU_STA_USER_POS_INFO_8822B, user_position_l);
-	rtw_write32(adapter, REG_MU_STA_USER_POS_INFO_8822B+4, user_position_h);
 
 	RTW_INFO("%s: STA0: gid_valid=0x%x, user_position_l=0x%x, user_position_h=0x%x\n",
-		__FUNCTION__, gid_valid, user_position_l, user_position_h);
+		__func__, gid_valid[0], user_position[0], user_position[1]);
 
 	/* For GID 32~64 */
-	gid_valid = 0;
-	user_position_l = 0;
-	user_position_h = 0;
 	for (i = 4; i < 8; i++)
-		gid_valid |= (bfer->gid_valid[i] << ((i - 4)<<3));
+		gid_valid[1] |= (bfer->gid_valid[i] << ((i - 4) << 3));
+
 	for (i = 8; i < 16; i++) {
 		if (i < 12)
-			user_position_l |= (bfer->user_position[i] << ((i - 8) << 3));
+			user_position[2] |= (bfer->user_position[i] << ((i - 8) << 3));
 		else
-			user_position_h |= (bfer->user_position[i] << ((i - 12) << 3));
+			user_position[3] |= (bfer->user_position[i] << ((i - 12) << 3));
 	}
-	/* select MU STA1 table */
-	val32 = rtw_read32(adapter, REG_MU_TX_CTL_8822B);
-	val32 = BIT_SET_R_MU_TAB_SEL_8822B(val32, 1);
-	rtw_write32(adapter, REG_MU_TX_CTL_8822B, val32);
-	rtw_write32(adapter, REG_MU_STA_GID_VLD_8822B, gid_valid);
-	rtw_write32(adapter, REG_MU_STA_USER_POS_INFO_8822B, user_position_l);
-	rtw_write32(adapter, REG_MU_STA_USER_POS_INFO_8822B+4, user_position_h);
 
 	RTW_INFO("%s: STA1: gid_valid=0x%x, user_position_l=0x%x, user_position_h=0x%x\n",
-		__FUNCTION__, gid_valid, user_position_l, user_position_h);
+		__func__, gid_valid[1], user_position[2], user_position[3]);
 
-	/* Set validity of MU STA0 and MU STA1 */
-	val32 = rtw_read32(adapter, REG_MU_TX_CTL_8822B);
-	val32 = BIT_SET_R_MU_TABLE_VALID_8822B(val32, BIT(0)|BIT(1)); /* STA0, STA1 */
-	rtw_write32(adapter, REG_MU_TX_CTL_8822B, val32);
+	rtw_halmac_bf_cfg_mu_bfee(adapter_to_dvobj(adapter), gid_valid, user_position);
 
 	info->bSetBFHwConfigInProgess = _FALSE;
 }
diff --git a/rtl8822BU/hal/rtl8822b/usb/rtl8822bu.h b/rtl8822BU/hal/rtl8822b/usb/rtl8822bu.h
index 8279397..f8d0858 100755..100644
--- a/rtl8822BU/hal/rtl8822b/usb/rtl8822bu.h
+++ b/rtl8822BU/hal/rtl8822b/usb/rtl8822bu.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTL8822BU_H_
 #define _RTL8822BU_H_
 
diff --git a/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_halinit.c b/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_halinit.c
index 820fb6b..5711127 100755..100644
--- a/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_halinit.c
+++ b/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_halinit.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTL8822BU_HALINIT_C_
 
 #include <hal_data.h>			/* HAL DATA */
@@ -44,11 +39,164 @@ static void _dbg_dump_macreg(PADAPTER padapter)
 	}
 }
 
+#ifdef CONFIG_FWLPS_IN_IPS
+u8 rtl8822bu_fw_ips_init(_adapter *padapter)
+{
+	struct sreset_priv *psrtpriv = &GET_HAL_DATA(padapter)->srestpriv;
+	struct debug_priv *pdbgpriv = &adapter_to_dvobj(padapter)->drv_dbg;
+	struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
+
+	if (pwrctl->bips_processing == _TRUE && psrtpriv->silent_reset_inprogress == _FALSE
+		&& GET_HAL_DATA(padapter)->bFWReady == _TRUE && pwrctl->pre_ips_type == 0) {
+		u32 start_time;
+		u8 cpwm_orig, cpwm_now, rpwm;
+		u8 bMacPwrCtrlOn = _TRUE;
+
+		RTW_INFO("%s: Leaving FW_IPS\n", __func__);
+#ifdef CONFIG_LPS_LCLK
+		/* for polling cpwm */
+		cpwm_orig = 0;
+		rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_orig);
+
+		/* set rpwm */
+		rtw_hal_get_hwreg(padapter, HW_VAR_RPWM_TOG, &rpwm);
+		rpwm += 0x80;
+		rpwm |= PS_ACK;
+		rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm));
+
+
+		RTW_INFO("%s: write rpwm=%02x\n", __func__, rpwm);
+
+		pwrctl->tog = (rpwm + 0x80) & 0x80;
+
+		/* do polling cpwm */
+		start_time = rtw_get_current_time();
+		do {
+
+			rtw_mdelay_os(1);
+
+			rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_now);
+			if ((cpwm_orig ^ cpwm_now) & 0x80) {
+				#ifdef DBG_CHECK_FW_PS_STATE
+				RTW_INFO("%s: polling cpwm ok when leaving IPS in FWLPS state, cpwm_orig=%02x, cpwm_now=%02x, 0x100=0x%x\n"
+					, __func__, cpwm_orig, cpwm_now, rtw_read8(padapter, REG_CR));
+				#endif /* DBG_CHECK_FW_PS_STATE */
+				break;
+			}
+
+			if (rtw_get_passing_time_ms(start_time) > 100) {
+				RTW_INFO("%s: polling cpwm timeout when leaving IPS in FWLPS state, cpwm_orig=%02x, cpwm_now=%02x, 0x100=0x%x\n",
+					__func__, cpwm_orig, cpwm_now, rtw_read8(padapter, REG_CR));
+				break;
+			}
+		} while (1);
+#endif /* CONFIG_LPS_LCLK */
+		rtl8822b_set_FwPwrModeInIPS_cmd(padapter, 0);
+
+		rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
+#ifdef CONFIG_LPS_LCLK
+		#ifdef DBG_CHECK_FW_PS_STATE
+		if (rtw_fw_ps_state(padapter) == _FAIL) {
+			RTW_INFO("after hal init, fw ps state in 32k\n");
+			pdbgpriv->dbg_ips_drvopen_fail_cnt++;
+		}
+		#endif /* DBG_CHECK_FW_PS_STATE */
+#endif /* CONFIG_LPS_LCLK */
+		return _SUCCESS;
+	}
+	return _FAIL;
+}
+
+u8 rtl8822bu_fw_ips_deinit(_adapter *padapter)
+{
+	struct sreset_priv *psrtpriv =  &GET_HAL_DATA(padapter)->srestpriv;
+	struct debug_priv *pdbgpriv = &adapter_to_dvobj(padapter)->drv_dbg;
+	struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
+
+	if (pwrctl->bips_processing == _TRUE && psrtpriv->silent_reset_inprogress == _FALSE
+		&& GET_HAL_DATA(padapter)->bFWReady == _TRUE && padapter->netif_up == _TRUE) {
+		int cnt = 0;
+		u8 val8 = 0, rpwm;
+
+		RTW_INFO("%s: issue H2C to FW when entering IPS\n", __func__);
+
+		rtl8822b_set_FwPwrModeInIPS_cmd(padapter, 0x1);
+#ifdef CONFIG_LPS_LCLK
+		/* poll 0x1cc to make sure H2C command already finished by FW; MAC_0x1cc=0 means H2C done by FW. */
+		do {
+			val8 = rtw_read8(padapter, REG_HMETFR);
+			cnt++;
+			RTW_INFO("%s  polling REG_HMETFR=0x%x, cnt=%d\n", __func__, val8, cnt);
+			rtw_mdelay_os(10);
+		} while (cnt < 100 && (val8 != 0));
+
+		/* H2C done, enter 32k */
+		if (val8 == 0) {
+			/* set rpwm to enter 32k */
+			rtw_hal_get_hwreg(padapter, HW_VAR_RPWM_TOG, &rpwm);
+			rpwm += 0x80;
+			rpwm |= BIT_SYS_CLK_8822B;
+			rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm));
+			RTW_INFO("%s: write rpwm=%02x\n", __func__, rpwm);
+			pwrctl->tog = (val8 + 0x80) & 0x80;
+
+			cnt = val8 = 0;
+			do {
+				val8 = rtw_read8(padapter, REG_CR);
+				cnt++;
+				RTW_INFO("%s  polling 0x100=0x%x, cnt=%d\n", __func__, val8, cnt);
+				rtw_mdelay_os(10);
+			} while (cnt < 100 && (val8 != 0xEA));
+
+			#ifdef DBG_CHECK_FW_PS_STATE
+			if (val8 != 0xEA)
+				RTW_INFO("MAC_1C0=%08x, MAC_1C4=%08x, MAC_1C8=%08x, MAC_1CC=%08x\n"
+					, rtw_read32(padapter, 0x1c0), rtw_read32(padapter, 0x1c4)
+					, rtw_read32(padapter, 0x1c8), rtw_read32(padapter, REG_HMETFR));
+			#endif /* DBG_CHECK_FW_PS_STATE */
+		} else {
+			RTW_INFO("MAC_1C0=%08x, MAC_1C4=%08x, MAC_1C8=%08x, MAC_1CC=%08x\n"
+				, rtw_read32(padapter, 0x1c0), rtw_read32(padapter, 0x1c4)
+				, rtw_read32(padapter, 0x1c8), rtw_read32(padapter, REG_HMETFR));
+		}
+
+		RTW_INFO("polling done when entering IPS, check result : 0x100=0x%x, cnt=%d, MAC_1cc=0x%02x\n"
+			, rtw_read8(padapter, REG_CR), cnt, rtw_read8(padapter, REG_HMETFR));
+
+		pwrctl->pre_ips_type = 0;
+#endif /* CONFIG_LPS_LCLK */
+		return _SUCCESS;
+	}
+
+	pdbgpriv->dbg_carddisable_cnt++;
+	pwrctl->pre_ips_type = 1;
+
+	return _FAIL;
+
+}
+
+#endif
+
+static void hal_init_misc(PADAPTER padapter)
+{
+	if (padapter->registrypriv.wifi_spec) {
+		padapter->registrypriv.adaptivity_en = 1;
+		padapter->registrypriv.adaptivity_mode = 0;
+	}
+}
+
 u32 rtl8822bu_init(PADAPTER padapter)
 {
 	u8 status = _SUCCESS;
 	u32 init_start_time = rtw_get_current_time();
 
+#ifdef CONFIG_FWLPS_IN_IPS
+	if (_SUCCESS == rtl8822bu_fw_ips_init(padapter))
+		goto exit;
+#endif
+
+	hal_init_misc(padapter);
+
 	rtl8822b_init(padapter);
 
 exit:
@@ -71,6 +219,10 @@ u32 rtl8822bu_deinit(PADAPTER padapter)
 
 	RTW_INFO("==> %s\n", __func__);
 
+#ifdef CONFIG_FWLPS_IN_IPS
+	if (_SUCCESS == rtl8822bu_fw_ips_deinit(padapter))
+		goto exit;
+#endif
 
 	hal_deinit_misc(padapter);
 	status = rtl8822b_deinit(padapter);
@@ -79,6 +231,7 @@ u32 rtl8822bu_deinit(PADAPTER padapter)
 		return _FAIL;
 	}
 
+exit:
 	RTW_INFO("%s <==\n", __func__);
 	return _SUCCESS;
 }
@@ -97,6 +250,15 @@ u32 rtl8822bu_inirp_init(PADAPTER padapter)
 	u32(*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr);
 #endif
 
+#ifdef CONFIG_FWLPS_IN_IPS
+	/* Do not sumbit urb repeat */
+	struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
+
+	if (pwrctl->bips_processing == _TRUE) {
+		status = _SUCCESS;
+		goto exit;
+	}
+#endif /* CONFIG_FWLPS_IN_IPS */
 
 	_read_port = pintfhdl->io_ops._read_port;
 
@@ -246,12 +408,14 @@ void rtl8822bu_interface_configure(PADAPTER padapter)
 #ifdef CONFIG_USB_RX_AGGREGATION
 	/* according to value defined by halmac */
 	pHalData->rxagg_mode = RX_AGG_USB;
-#if 0
-	pHalData->rxagg_usb_size = 8;
-	pHalData->rxagg_usb_timeout = 0x6;
-	pHalData->rxagg_dma_size = 16;
-	pHalData->rxagg_dma_timeout = 0x6;
-#endif
+#ifdef CONFIG_PLATFORM_NOVATEK_NT72668
+	pHalData->rxagg_usb_size = 0x03;
+	pHalData->rxagg_usb_timeout = 0x20;
+#elif defined(CONFIG_PLATFORM_HISILICON)
+	 /* use 16k to workaround for HISILICON platform */
+	pHalData->rxagg_usb_size = 3;
+	pHalData->rxagg_usb_timeout = 8;
+#endif /* CONFIG_PLATFORM_NOVATEK_NT72668 */
 #endif /* CONFIG_USB_RX_AGGREGATION */
 
 	usb_set_queue_pipe_mapping(padapter,
diff --git a/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_halmac.c b/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_halmac.c
index 4c239f6..2941487 100755..100644
--- a/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_halmac.c
+++ b/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_halmac.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTL8822BU_HALMAC_C_
 
 #include <drv_types.h>		/* struct dvobj_priv and etc. */
diff --git a/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_io.c b/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_io.c
index 2b4bb41..63584f8 100755..100644
--- a/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_io.c
+++ b/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_io.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTL8822BU_IO_C_
 
 #include <drv_types.h>		/* PADAPTER and etc. */
diff --git a/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_led.c b/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_led.c
index 94fb77f..188f1d0 100755..100644
--- a/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_led.c
+++ b/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_led.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTL8822BU_LED_C_
 
 #include <drv_types.h>		/* PADAPTER */
diff --git a/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_ops.c b/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_ops.c
index 8336b2b..8310ac4 100755..100644
--- a/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_ops.c
+++ b/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_ops.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTL8822BU_OPS_C_
 
 #include <drv_types.h>			/* PADAPTER, basic_types.h and etc. */
@@ -41,6 +36,7 @@ void rtl8822bu_set_hw_type(struct dvobj_priv *pdvobj)
 static void sethwreg(PADAPTER padapter, u8 variable, u8 *val)
 {
 	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
+	struct dvobj_priv	*pdvobjpriv = adapter_to_dvobj(padapter);
 	struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
 	struct registry_priv *registry_par = &padapter->registrypriv;
 	int status = 0;
@@ -48,7 +44,38 @@ static void sethwreg(PADAPTER padapter, u8 variable, u8 *val)
 	switch (variable) {
 	case HW_VAR_RXDMA_AGG_PG_TH:
 #ifdef CONFIG_USB_RX_AGGREGATION
-
+		if (pdvobjpriv->traffic_stat.cur_tx_tp < 1 && pdvobjpriv->traffic_stat.cur_rx_tp < 1) {
+			/* for low traffic, do not usb AGGREGATION */
+			pHalData->rxagg_usb_timeout = 0x01;
+			pHalData->rxagg_usb_size = 0;
+
+		} else {
+#ifdef CONFIG_PLATFORM_NOVATEK_NT72668
+			pHalData->rxagg_usb_timeout = 0x20;
+			pHalData->rxagg_usb_size = 0x03;
+#elif defined(CONFIG_PLATFORM_HISILICON)
+			/* use 16k to workaround for HISILICON platform */
+			pHalData->rxagg_usb_timeout = 8;
+			pHalData->rxagg_usb_size = 3;
+#else
+			/* default setting */
+			pHalData->rxagg_usb_timeout = 0x20;
+			pHalData->rxagg_usb_size = 0x05;
+#endif
+		}
+		rtw_halmac_rx_agg_switch(pdvobjpriv, _TRUE);
+#if 0
+		RTW_INFO("\n==========RAFFIC_STATISTIC==============\n");
+		RTW_INFO("cur_tx_bytes:%lld\n", pdvobjpriv->traffic_stat.cur_tx_bytes);
+		RTW_INFO("cur_rx_bytes:%lld\n", pdvobjpriv->traffic_stat.cur_rx_bytes);
+
+		RTW_INFO("last_tx_bytes:%lld\n", pdvobjpriv->traffic_stat.last_tx_bytes);
+		RTW_INFO("last_rx_bytes:%lld\n", pdvobjpriv->traffic_stat.last_rx_bytes);
+
+		RTW_INFO("cur_tx_tp:%d\n", pdvobjpriv->traffic_stat.cur_tx_tp);
+		RTW_INFO("cur_rx_tp:%d\n", pdvobjpriv->traffic_stat.cur_rx_tp);
+		RTW_INFO("\n========================\n");
+#endif
 #endif
 		break;
 	case HW_VAR_SET_RPWM:
@@ -87,6 +114,19 @@ static void sethwreg(PADAPTER padapter, u8 variable, u8 *val)
 			}
 		}
 		break;
+	case HW_VAR_SET_REQ_FW_PS:
+	{
+		/*
+		 * 1. driver write 0x8f[4]=1
+		 *    request fw ps state (only can write bit4)
+		 */
+		u8 req_fw_ps = 0;
+
+		req_fw_ps = rtw_read8(padapter, 0x8f);
+		req_fw_ps |= 0x10;
+		rtw_write8(padapter, 0x8f, req_fw_ps);
+	}
+	break;
 	default:
 		rtl8822b_sethwreg(padapter, variable, val);
 		break;
@@ -104,6 +144,17 @@ static void gethwreg(PADAPTER padapter, u8 variable, u8 *val)
 		/* RTW_INFO("##### REG_USB_HCPWM(0x%02x) = 0x%02x #####\n", REG_USB_HCPWM_8822B, *val); */
 #endif /* CONFIG_LPS_LCLK */
 		break;
+	case HW_VAR_RPWM_TOG:
+#ifdef CONFIG_LPS_LCLK
+		*val = rtw_read8(padapter, REG_USB_HRPWM_8822B);
+		*val &= BIT_TOGGLING_8822B;
+#endif /* CONFIG_LPS_LCLK */
+		break;
+
+	case HW_VAR_FW_PS_STATE:
+		/* driver read dword 0x88 to get fw ps state */
+		*((u16 *)val) = rtw_read16(padapter, 0x88);
+		break;
 	default:
 		rtl8822b_gethwreg(padapter, variable, val);
 		break;
@@ -181,12 +232,15 @@ static u8 rtl8822bu_ps_func(PADAPTER padapter, HAL_INTF_PS_FUNC efunc_id, u8 *va
  *	2. Read registers to initialize
  *	3. Other vaiables initialization
  */
-static void read_adapter_info(PADAPTER padapter)
+static u8 read_adapter_info(PADAPTER padapter)
 {
+	u8 ret = _FAIL;
+
 	/*
 	 * 1. Read Efuse/EEPROM to initialize
 	 */
-	rtl8822b_read_efuse(padapter);
+	if (rtl8822b_read_efuse(padapter) != _SUCCESS)
+		goto exit;
 
 	/*
 	 * 2. Read registers to initialize
@@ -195,6 +249,11 @@ static void read_adapter_info(PADAPTER padapter)
 	/*
 	 * 3. Other Initialization
 	 */
+
+	ret = _SUCCESS;
+
+exit:
+	return ret;
 }
 
 
diff --git a/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_recv.c b/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_recv.c
index 700d375..983ff99 100755..100644
--- a/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_recv.c
+++ b/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_recv.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTL8822BU_RECV_C_
 
 #include <drv_types.h>			/* PADAPTER, rtw_xmit.h and etc. */
diff --git a/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_xmit.c b/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_xmit.c
index 916369b..5e13abb 100755..100644
--- a/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_xmit.c
+++ b/rtl8822BU/hal/rtl8822b/usb/rtl8822bu_xmit.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RTL8822BU_XMIT_C_
 
 #include <drv_types.h>			/* PADAPTER, rtw_xmit.h and etc. */
@@ -213,13 +208,7 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag
 		SET_TX_DESC_USE_RATE_8822B(ptxdesc, 1);
 		DriverFixedRate = 0x01;
 
-#ifdef CONFIG_INTEL_PROXIM
-		if ((padapter->proximity.proxim_on == _TRUE) && (pattrib->intel_proxim == _TRUE)) {
-			RTW_INFO("\n %s pattrib->rate=%d\n", __func__, pattrib->rate);
-			SET_TX_DESC_DATARATE_8822B(ptxdesc, pattrib->rate);
-		} else
-#endif
-			SET_TX_DESC_DATARATE_8822B(ptxdesc, MRateToHwRate(pattrib->rate));
+		SET_TX_DESC_DATARATE_8822B(ptxdesc, MRateToHwRate(pattrib->rate));
 
 		SET_TX_DESC_RTY_LMT_EN_8822B(ptxdesc, 1);
 		if (pattrib->retry_ctrl == _TRUE)
@@ -264,6 +253,9 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag
 
 	SET_TX_DESC_SW_DEFINE_8822B(ptxdesc, SWDefineContent);
 
+	SET_TX_DESC_PORT_ID_8822B(ptxdesc, get_hw_port(padapter));
+	SET_TX_DESC_MULTIPLE_PORT_8822B(ptxdesc, get_hw_port(padapter));
+
 	rtl8822b_cal_txdesc_chksum(padapter, ptxdesc);
 	rtl8822b_dbg_dump_tx_desc(padapter, pxmitframe->frame_tag, ptxdesc);
 	return pull;
@@ -295,8 +287,13 @@ s32 rtl8822bu_xmit_buf_handler(PADAPTER padapter)
 	if (_FAIL == ret)
 		return _FAIL;
 
-	if (RTW_CANNOT_RUN(padapter))
+	if (RTW_CANNOT_RUN(padapter)) {
+		RTW_DBG(FUNC_ADPT_FMT "- bDriverStopped(%s) bSurpriseRemoved(%s)\n",
+			FUNC_ADPT_ARG(padapter),
+			rtw_is_drv_stopped(padapter) ? "True" : "False",
+			rtw_is_surprise_removed(padapter) ? "True" : "False");
 		return _FAIL;
+	}
 
 	if (check_pending_xmitbuf(pxmitpriv) == _FALSE)
 		return _SUCCESS;
diff --git a/rtl8822BU/ifcfg-wlan0 b/rtl8822BU/ifcfg-wlan0
index 20dcbec..20dcbec 100755..100644
--- a/rtl8822BU/ifcfg-wlan0
+++ b/rtl8822BU/ifcfg-wlan0
diff --git a/rtl8822BU/include/Hal8188EPhyCfg.h b/rtl8822BU/include/Hal8188EPhyCfg.h
index c0558bc..917831d 100755..100644
--- a/rtl8822BU/include/Hal8188EPhyCfg.h
+++ b/rtl8822BU/include/Hal8188EPhyCfg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __INC_HAL8188EPHYCFG_H__
 #define __INC_HAL8188EPHYCFG_H__
 
diff --git a/rtl8822BU/include/Hal8188EPhyReg.h b/rtl8822BU/include/Hal8188EPhyReg.h
index 783ea64..2eab831 100755..100644
--- a/rtl8822BU/include/Hal8188EPhyReg.h
+++ b/rtl8822BU/include/Hal8188EPhyReg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __INC_HAL8188EPHYREG_H__
 #define __INC_HAL8188EPHYREG_H__
 /*--------------------------Define Parameters-------------------------------*/
diff --git a/rtl8822BU/include/Hal8188EPwrSeq.h b/rtl8822BU/include/Hal8188EPwrSeq.h
index 385722a..46c61ab 100755..100644
--- a/rtl8822BU/include/Hal8188EPwrSeq.h
+++ b/rtl8822BU/include/Hal8188EPwrSeq.h
@@ -1,7 +1,6 @@
-
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -12,12 +11,8 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
+
 
 #ifndef __HAL8188EPWRSEQ_H__
 #define __HAL8188EPWRSEQ_H__
diff --git a/rtl8822BU/include/Hal8188FPhyCfg.h b/rtl8822BU/include/Hal8188FPhyCfg.h
index 410d9c3..d513a07 100755..100644
--- a/rtl8822BU/include/Hal8188FPhyCfg.h
+++ b/rtl8822BU/include/Hal8188FPhyCfg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __INC_HAL8188FPHYCFG_H__
 #define __INC_HAL8188FPHYCFG_H__
 
diff --git a/rtl8822BU/include/Hal8188FPhyReg.h b/rtl8822BU/include/Hal8188FPhyReg.h
index 8d38c0f..a831faa 100755..100644
--- a/rtl8822BU/include/Hal8188FPhyReg.h
+++ b/rtl8822BU/include/Hal8188FPhyReg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __INC_HAL8188FPHYREG_H__
 #define __INC_HAL8188FPHYREG_H__
 
diff --git a/rtl8822BU/include/Hal8188FPwrSeq.h b/rtl8822BU/include/Hal8188FPwrSeq.h
index 81e6132..5cad428 100755..100644
--- a/rtl8822BU/include/Hal8188FPwrSeq.h
+++ b/rtl8822BU/include/Hal8188FPwrSeq.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef REALTEK_POWER_SEQUENCE_8188F
 #define REALTEK_POWER_SEQUENCE_8188F
 
diff --git a/rtl8822BU/include/Hal8192EPhyCfg.h b/rtl8822BU/include/Hal8192EPhyCfg.h
index 17dd982..f64b92b 100755..100644
--- a/rtl8822BU/include/Hal8192EPhyCfg.h
+++ b/rtl8822BU/include/Hal8192EPhyCfg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __INC_HAL8192EPHYCFG_H__
 #define __INC_HAL8192EPHYCFG_H__
 
diff --git a/rtl8822BU/include/Hal8192EPhyReg.h b/rtl8822BU/include/Hal8192EPhyReg.h
index cd13c22..a3277b1 100755..100644
--- a/rtl8822BU/include/Hal8192EPhyReg.h
+++ b/rtl8822BU/include/Hal8192EPhyReg.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 /*****************************************************************************
  *	Copyright(c) 2008,  RealTEK Technology Inc. All Right Reserved.
  *
diff --git a/rtl8822BU/include/Hal8192EPwrSeq.h b/rtl8822BU/include/Hal8192EPwrSeq.h
index 12bb2fb..bec2d5c 100755..100644
--- a/rtl8822BU/include/Hal8192EPwrSeq.h
+++ b/rtl8822BU/include/Hal8192EPwrSeq.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef REALTEK_POWER_SEQUENCE_8192E
 #define REALTEK_POWER_SEQUENCE_8192E
 
diff --git a/rtl8822BU/include/Hal8703BPhyCfg.h b/rtl8822BU/include/Hal8703BPhyCfg.h
index a038bcc..da9a7dc 100755..100644
--- a/rtl8822BU/include/Hal8703BPhyCfg.h
+++ b/rtl8822BU/include/Hal8703BPhyCfg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __INC_HAL8703BPHYCFG_H__
 #define __INC_HAL8703BPHYCFG_H__
 
diff --git a/rtl8822BU/include/Hal8703BPhyReg.h b/rtl8822BU/include/Hal8703BPhyReg.h
index e8eb664..881a13c 100755..100644
--- a/rtl8822BU/include/Hal8703BPhyReg.h
+++ b/rtl8822BU/include/Hal8703BPhyReg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __INC_HAL8703BPHYREG_H__
 #define __INC_HAL8703BPHYREG_H__
 
diff --git a/rtl8822BU/include/Hal8703BPwrSeq.h b/rtl8822BU/include/Hal8703BPwrSeq.h
index a53ca9a..0dac13e 100755..100644
--- a/rtl8822BU/include/Hal8703BPwrSeq.h
+++ b/rtl8822BU/include/Hal8703BPwrSeq.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef REALTEK_POWER_SEQUENCE_8703B
 #define REALTEK_POWER_SEQUENCE_8703B
 
diff --git a/rtl8822BU/include/Hal8723BPhyCfg.h b/rtl8822BU/include/Hal8723BPhyCfg.h
index 0fa8964..9d941b4 100755..100644
--- a/rtl8822BU/include/Hal8723BPhyCfg.h
+++ b/rtl8822BU/include/Hal8723BPhyCfg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __INC_HAL8723BPHYCFG_H__
 #define __INC_HAL8723BPHYCFG_H__
 
diff --git a/rtl8822BU/include/Hal8723BPhyReg.h b/rtl8822BU/include/Hal8723BPhyReg.h
index 551c0a5..ce485c2 100755..100644
--- a/rtl8822BU/include/Hal8723BPhyReg.h
+++ b/rtl8822BU/include/Hal8723BPhyReg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __INC_HAL8723BPHYREG_H__
 #define __INC_HAL8723BPHYREG_H__
 
diff --git a/rtl8822BU/include/Hal8723BPwrSeq.h b/rtl8822BU/include/Hal8723BPwrSeq.h
index 6b89562..1aec885 100755..100644
--- a/rtl8822BU/include/Hal8723BPwrSeq.h
+++ b/rtl8822BU/include/Hal8723BPwrSeq.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef REALTEK_POWER_SEQUENCE_8723B
 #define REALTEK_POWER_SEQUENCE_8723B
 
diff --git a/rtl8822BU/include/Hal8723DPhyCfg.h b/rtl8822BU/include/Hal8723DPhyCfg.h
index f3ce170..080edd0 100755..100644
--- a/rtl8822BU/include/Hal8723DPhyCfg.h
+++ b/rtl8822BU/include/Hal8723DPhyCfg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __INC_HAL8723DPHYCFG_H__
 #define __INC_HAL8723DPHYCFG_H__
 
diff --git a/rtl8822BU/include/Hal8723DPhyReg.h b/rtl8822BU/include/Hal8723DPhyReg.h
index 9fb0cc1..036144a 100755..100644
--- a/rtl8822BU/include/Hal8723DPhyReg.h
+++ b/rtl8822BU/include/Hal8723DPhyReg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __INC_HAL8723DPHYREG_H__
 #define __INC_HAL8723DPHYREG_H__
 
diff --git a/rtl8822BU/include/Hal8723DPwrSeq.h b/rtl8822BU/include/Hal8723DPwrSeq.h
index 5032e7c..70afbdb 100755..100644
--- a/rtl8822BU/include/Hal8723DPwrSeq.h
+++ b/rtl8822BU/include/Hal8723DPwrSeq.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef REALTEK_POWER_SEQUENCE_8723D
 #define REALTEK_POWER_SEQUENCE_8723D
 
diff --git a/rtl8822BU/include/Hal8723PwrSeq.h b/rtl8822BU/include/Hal8723PwrSeq.h
index 6669641..22de833 100755..100644
--- a/rtl8822BU/include/Hal8723PwrSeq.h
+++ b/rtl8822BU/include/Hal8723PwrSeq.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef __HAL8723PWRSEQ_H__
 #define __HAL8723PWRSEQ_H__
 /*
diff --git a/rtl8822BU/include/Hal8812PhyCfg.h b/rtl8822BU/include/Hal8812PhyCfg.h
index 05a5fe2..fb0705e 100755..100644
--- a/rtl8822BU/include/Hal8812PhyCfg.h
+++ b/rtl8822BU/include/Hal8812PhyCfg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __INC_HAL8812PHYCFG_H__
 #define __INC_HAL8812PHYCFG_H__
 
diff --git a/rtl8822BU/include/Hal8812PhyReg.h b/rtl8822BU/include/Hal8812PhyReg.h
index 5009750..ef4abb2 100755..100644
--- a/rtl8822BU/include/Hal8812PhyReg.h
+++ b/rtl8822BU/include/Hal8812PhyReg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __INC_HAL8812PHYREG_H__
 #define __INC_HAL8812PHYREG_H__
 /*--------------------------Define Parameters-------------------------------*/
diff --git a/rtl8822BU/include/Hal8812PwrSeq.h b/rtl8822BU/include/Hal8812PwrSeq.h
index e089c1a..9ef8c44 100755..100644
--- a/rtl8822BU/include/Hal8812PwrSeq.h
+++ b/rtl8822BU/include/Hal8812PwrSeq.h
@@ -1,7 +1,6 @@
-
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -12,12 +11,8 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
+
 
 #ifndef __HAL8812PWRSEQ_H__
 #define __HAL8812PWRSEQ_H__
diff --git a/rtl8822BU/include/Hal8814PhyCfg.h b/rtl8822BU/include/Hal8814PhyCfg.h
index 9aaaf38..2dc3a7f 100755..100644
--- a/rtl8822BU/include/Hal8814PhyCfg.h
+++ b/rtl8822BU/include/Hal8814PhyCfg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __INC_HAL8814PHYCFG_H__
 #define __INC_HAL8814PHYCFG_H__
 
diff --git a/rtl8822BU/include/Hal8814PhyReg.h b/rtl8822BU/include/Hal8814PhyReg.h
index 0aec994..2fa46dd 100755..100644
--- a/rtl8822BU/include/Hal8814PhyReg.h
+++ b/rtl8822BU/include/Hal8814PhyReg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __INC_HAL8814PHYREG_H__
 #define __INC_HAL8814PHYREG_H__
 /*--------------------------Define Parameters-------------------------------*/
diff --git a/rtl8822BU/include/Hal8814PwrSeq.h b/rtl8822BU/include/Hal8814PwrSeq.h
index 696959b..5f4097d 100755..100644
--- a/rtl8822BU/include/Hal8814PwrSeq.h
+++ b/rtl8822BU/include/Hal8814PwrSeq.h
@@ -1,7 +1,6 @@
-
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -12,12 +11,8 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
+
 
 #ifndef __HAL8814PWRSEQ_H__
 #define __HAL8814PWRSEQ_H__
diff --git a/rtl8822BU/include/Hal8821APwrSeq.h b/rtl8822BU/include/Hal8821APwrSeq.h
index 393068b..568b8e5 100755..100644
--- a/rtl8822BU/include/Hal8821APwrSeq.h
+++ b/rtl8822BU/include/Hal8821APwrSeq.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef REALTEK_POWER_SEQUENCE_8821
 #define REALTEK_POWER_SEQUENCE_8821
 
diff --git a/rtl8822BU/include/HalPwrSeqCmd.h b/rtl8822BU/include/HalPwrSeqCmd.h
index b511436..f67ed22 100755..100644
--- a/rtl8822BU/include/HalPwrSeqCmd.h
+++ b/rtl8822BU/include/HalPwrSeqCmd.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __HALPWRSEQCMD_H__
 #define __HALPWRSEQCMD_H__
 
diff --git a/rtl8822BU/include/HalVerDef.h b/rtl8822BU/include/HalVerDef.h
index 0288b43..f50861d 100755..100644
--- a/rtl8822BU/include/HalVerDef.h
+++ b/rtl8822BU/include/HalVerDef.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __HAL_VERSION_DEF_H__
 #define __HAL_VERSION_DEF_H__
 
diff --git a/rtl8822BU/include/autoconf.h b/rtl8822BU/include/autoconf.h
index f815356..f0f42df 100755..100644
--- a/rtl8822BU/include/autoconf.h
+++ b/rtl8822BU/include/autoconf.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define CONFIG_SINGLE_IMG
 /* #define CONFIG_DISABLE_ODM */
 
@@ -85,9 +80,6 @@
 
 /* #define CONFIG_DRVEXT_MODULE	1 */
 
-#define CONFIG_RF_POWER_TRIM
-
-#define CONFIG_DFS	1
 
 /* #define CONFIG_SUPPORT_USB_INT */
 #ifdef CONFIG_SUPPORT_USB_INT
@@ -99,6 +91,7 @@
 	#ifdef CONFIG_IPS
 	/* #define CONFIG_IPS_LEVEL_2 1*/ /*enable this to set default IPS mode to IPS_LEVEL_2*/
 	#define CONFIG_IPS_CHECK_IN_WD /* Do IPS Check in WatchDog.	*/
+	/* #define CONFIG_FWLPS_IN_IPS */
 	#endif
 	/* #define SUPPORT_HW_RFOFF_DETECTED	1 */
 
@@ -108,7 +101,9 @@
 	#endif
 
 	#ifdef CONFIG_LPS_LCLK
-		#define CONFIG_XMIT_THREAD_MODE
+		#ifdef CONFIG_POWER_SAVING
+			#define CONFIG_XMIT_THREAD_MODE
+		#endif /* CONFIG_POWER_SAVING */
 		#ifndef CONFIG_SUPPORT_USB_INT
 			#define LPS_RPWM_WAIT_MS 300
 			#define CONFIG_DETECT_CPWM_BY_POLLING
@@ -346,6 +341,7 @@
 #define CONFIG_PROC_DEBUG
 
 #define DBG_CONFIG_ERROR_DETECT
+
 /*
 #define DBG_CONFIG_ERROR_DETECT_INT
 #define DBG_CONFIG_ERROR_RESET
diff --git a/rtl8822BU/include/basic_types.h b/rtl8822BU/include/basic_types.h
index 245286d..1c65aa7 100755..100644
--- a/rtl8822BU/include/basic_types.h
+++ b/rtl8822BU/include/basic_types.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __BASIC_TYPES_H__
 #define __BASIC_TYPES_H__
 
diff --git a/rtl8822BU/include/byteorder/big_endian.h b/rtl8822BU/include/byteorder/big_endian.h
index 345e9d8..6b1dc44 100755..100644
--- a/rtl8822BU/include/byteorder/big_endian.h
+++ b/rtl8822BU/include/byteorder/big_endian.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _LINUX_BYTEORDER_BIG_ENDIAN_H
 #define _LINUX_BYTEORDER_BIG_ENDIAN_H
 
diff --git a/rtl8822BU/include/byteorder/generic.h b/rtl8822BU/include/byteorder/generic.h
index 02cf675..f85114b 100755..100644
--- a/rtl8822BU/include/byteorder/generic.h
+++ b/rtl8822BU/include/byteorder/generic.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _LINUX_BYTEORDER_GENERIC_H
 #define _LINUX_BYTEORDER_GENERIC_H
 
diff --git a/rtl8822BU/include/byteorder/little_endian.h b/rtl8822BU/include/byteorder/little_endian.h
index 0b77336..c4b6451 100755..100644
--- a/rtl8822BU/include/byteorder/little_endian.h
+++ b/rtl8822BU/include/byteorder/little_endian.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _LINUX_BYTEORDER_LITTLE_ENDIAN_H
 #define _LINUX_BYTEORDER_LITTLE_ENDIAN_H
 
diff --git a/rtl8822BU/include/byteorder/swab.h b/rtl8822BU/include/byteorder/swab.h
index d6d81b5..a8dd46b 100755..100644
--- a/rtl8822BU/include/byteorder/swab.h
+++ b/rtl8822BU/include/byteorder/swab.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _LINUX_BYTEORDER_SWAB_H
 #define _LINUX_BYTEORDER_SWAB_H
 
diff --git a/rtl8822BU/include/byteorder/swabb.h b/rtl8822BU/include/byteorder/swabb.h
index ce33424..634519a 100755..100644
--- a/rtl8822BU/include/byteorder/swabb.h
+++ b/rtl8822BU/include/byteorder/swabb.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _LINUX_BYTEORDER_SWABB_H
 #define _LINUX_BYTEORDER_SWABB_H
 
diff --git a/rtl8822BU/include/circ_buf.h b/rtl8822BU/include/circ_buf.h
index 2352316..7a5b8ef 100755..100644
--- a/rtl8822BU/include/circ_buf.h
+++ b/rtl8822BU/include/circ_buf.h
@@ -1,7 +1,7 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *                                        
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
  * published by the Free Software Foundation.
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __CIRC_BUF_H_
 #define __CIRC_BUF_H_ 1
 
diff --git a/rtl8822BU/include/cmd_osdep.h b/rtl8822BU/include/cmd_osdep.h
index 9c63a1c..e4ba2b6 100755..100644
--- a/rtl8822BU/include/cmd_osdep.h
+++ b/rtl8822BU/include/cmd_osdep.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __CMD_OSDEP_H_
 #define __CMD_OSDEP_H_
 
diff --git a/rtl8822BU/include/custom_gpio.h b/rtl8822BU/include/custom_gpio.h
index 5691d9a..49411b6 100755..100644
--- a/rtl8822BU/include/custom_gpio.h
+++ b/rtl8822BU/include/custom_gpio.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef __CUSTOM_GPIO_H__
 #define __CUSTOM_GPIO_H___
 
diff --git a/rtl8822BU/include/drv_conf.h b/rtl8822BU/include/drv_conf.h
index a955a2b..cf43fab 100755..100644
--- a/rtl8822BU/include/drv_conf.h
+++ b/rtl8822BU/include/drv_conf.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __DRV_CONF_H__
 #define __DRV_CONF_H__
 #include "autoconf.h"
@@ -181,6 +176,23 @@
 	#define CONFIG_TXPWR_LIMIT_EN 1
 #endif
 
+#if !defined(CONFIG_TXPWR_LIMIT) && CONFIG_TXPWR_LIMIT_EN
+	#define CONFIG_TXPWR_LIMIT
+#endif
+
+#ifndef CONFIG_RTW_RX_AMPDU_SZ_LIMIT_1SS
+	#define CONFIG_RTW_RX_AMPDU_SZ_LIMIT_1SS {0xFF, 0xFF, 0xFF, 0xFF}
+#endif
+#ifndef CONFIG_RTW_RX_AMPDU_SZ_LIMIT_2SS
+	#define CONFIG_RTW_RX_AMPDU_SZ_LIMIT_2SS {0xFF, 0xFF, 0xFF, 0xFF}
+#endif
+#ifndef CONFIG_RTW_RX_AMPDU_SZ_LIMIT_3SS
+	#define CONFIG_RTW_RX_AMPDU_SZ_LIMIT_3SS {0xFF, 0xFF, 0xFF, 0xFF}
+#endif
+#ifndef CONFIG_RTW_RX_AMPDU_SZ_LIMIT_4SS
+	#define CONFIG_RTW_RX_AMPDU_SZ_LIMIT_4SS {0xFF, 0xFF, 0xFF, 0xFF}
+#endif
+
 #ifndef CONFIG_RTW_TARGET_TX_PWR_2G_A
 	#define CONFIG_RTW_TARGET_TX_PWR_2G_A {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1}
 #endif
diff --git a/rtl8822BU/include/drv_types.h b/rtl8822BU/include/drv_types.h
index b041b79..b6d71e3 100755..100644
--- a/rtl8822BU/include/drv_types.h
+++ b/rtl8822BU/include/drv_types.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 /*-------------------------------------------------------------------------------
 
 	For type defines and data structure defines
@@ -84,12 +79,6 @@ typedef struct _ADAPTER _adapter, ADAPTER, *PADAPTER;
 #include <xmit_osdep.h>
 #include <rtw_recv.h>
 
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 7, 0))
-#define ieee80211_band nl80211_band
-#define IEEE80211_BAND_2GHZ NL80211_BAND_2GHZ
-#define IEEE80211_BAND_5GHZ NL80211_BAND_5GHZ
-#define IEEE80211_NUM_BANDS NUM_NL80211_BANDS
-#endif
 #ifdef CONFIG_BEAMFORMING
 	#include <rtw_beamforming.h>
 #endif
@@ -204,13 +193,18 @@ struct registry_priv {
 	u8	soft_ap;
 	u8	power_mgnt;
 	u8	ips_mode;
+	u8	lps_level;
 	u8	smart_ps;
 	u8   usb_rxagg_mode;
+	u8	dynamic_agg_enable;
 	u8	long_retry_lmt;
 	u8	short_retry_lmt;
 	u16	busy_thresh;
 	u8	ack_policy;
 	u8	mp_mode;
+#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTW_CUSTOMER_STR)
+	u8 mp_customer_str;
+#endif
 	u8  mp_dm;
 	u8	software_encrypt;
 	u8	software_decrypt;
@@ -240,6 +234,7 @@ struct registry_priv {
 	u8	ampdu_enable;/* for tx */
 	u8	rx_stbc;
 	u8	ampdu_amsdu;/* A-MPDU Supports A-MSDU is permitted */
+	u8 rx_ampdu_sz_limit_by_nss_bw[4][4]; /* 1~4SS, BW20~BW160 */
 	/* Short GI support Bit Map */
 	/* BIT0 - 20MHz, 1: support, 0: non-support */
 	/* BIT1 - 40MHz, 1: support, 0: non-support */
@@ -266,7 +261,7 @@ struct registry_priv {
 #ifdef CONFIG_80211AC_VHT
 	u8	vht_enable; /* 0:disable, 1:enable, 2:auto */
 	u8	ampdu_factor;
-	u8	vht_rate_sel;
+	u8 vht_rx_mcs_map[2];
 #endif /* CONFIG_80211AC_VHT */
 
 	u8	lowrate_two_xmit;
@@ -334,10 +329,10 @@ struct registry_priv {
 	u8 pll_ref_clk_sel;
 
 	/* define for tx power adjust */
+#ifdef CONFIG_TXPWR_LIMIT
 	u8	RegEnableTxPowerLimit;
+#endif
 	u8	RegEnableTxPowerByRate;
-	u8	RegPowerBase;
-	u8	RegPwrTblSel;
 
 	u8 target_tx_pwr_valid;
 	s8 target_tx_pwr_2g[RF_PATH_MAX][RATE_SECTION_NUM];
@@ -418,6 +413,10 @@ struct registry_priv {
 	u8 trx_share_mode;
 #endif
 	u8 check_hw_status;
+
+	u32 pci_aspm_config;
+
+	u8 iqk_fw_offload;
 };
 
 /* For registry parameters */
@@ -449,9 +448,9 @@ struct registry_priv {
 #define REGSTY_IS_11AC_AUTO(regsty) ((regsty)->vht_enable == 2)
 
 typedef struct rtw_if_operations {
-	int __must_check(*read)(struct dvobj_priv *d, int addr, void *buf,
+	int __must_check (*read)(struct dvobj_priv *d, unsigned int addr, void *buf,
 				size_t len, bool fixed);
-	int __must_check(*write)(struct dvobj_priv *d, int addr, void *buf,
+	int __must_check (*write)(struct dvobj_priv *d, unsigned int addr, void *buf,
 				 size_t len, bool fixed);
 } RTW_IF_OPS, *PRTW_IF_OPS;
 
@@ -781,7 +780,25 @@ struct macid_ctl_t {
 #define RATE_BMP_GET_VHT_2SS(_bmp_vht)		((_bmp_vht & RATE_BMP_VHT_2SS) >> 10)
 #define RATE_BMP_GET_VHT_3SS(_bmp_vht)		((_bmp_vht & RATE_BMP_VHT_3SS) >> 20)
 
+#define TXPWR_LMT_REF_VHT_FROM_HT	BIT0
+#define TXPWR_LMT_REF_HT_FROM_VHT	BIT1
+
+#define TXPWR_LMT_HAS_CCK_1T	BIT0
+#define TXPWR_LMT_HAS_CCK_2T	BIT1
+#define TXPWR_LMT_HAS_CCK_3T	BIT2
+#define TXPWR_LMT_HAS_CCK_4T	BIT3
+#define TXPWR_LMT_HAS_OFDM_1T	BIT4
+#define TXPWR_LMT_HAS_OFDM_2T	BIT5
+#define TXPWR_LMT_HAS_OFDM_3T	BIT6
+#define TXPWR_LMT_HAS_OFDM_4T	BIT7
+
 struct rf_ctl_t {
+	const struct country_chplan *country_ent;
+	u8 ChannelPlan;
+	u8 max_chan_nums;
+	RT_CHANNEL_INFO channel_set[MAX_CHANNEL_NUM];
+	struct p2p_channels channel_list;
+
 	/* used for debug or by tx power limit */
 	u16 rate_bmp_cck_ofdm;		/* 20MHz */
 	u32 rate_bmp_ht_by_bw[2];	/* 20MHz, 40MHz. 4SS supported */
@@ -791,6 +808,21 @@ struct rf_ctl_t {
 	u8 highest_ht_rate_bw_bmp;
 	u8 highest_vht_rate_bw_bmp;
 
+#ifdef CONFIG_TXPWR_LIMIT
+	_mutex txpwr_lmt_mutex;
+	_list reg_exc_list;
+	u8 regd_exc_num;
+	_list txpwr_lmt_list;
+	u8 txpwr_regd_num;
+	const char *regd_name;
+
+	u8 txpwr_lmt_2g_cck_ofdm_state;
+	#ifdef CONFIG_IEEE80211_BAND_5GHZ
+	u8 txpwr_lmt_5g_cck_ofdm_state;
+	u8 txpwr_lmt_5g_20_40_ref;
+	#endif
+#endif
+
 #ifdef CONFIG_DFS_MASTER
 	bool radar_detect_by_others;
 	u8 dfs_master_enabled;
@@ -846,6 +878,7 @@ struct halmacpriv {
 	/* For asynchronous functions */
 	struct halmac_indicator *indicator;
 
+	/* Hardware parameters */
 #ifdef CONFIG_SDIO_HCI
 	/* Store hardware tx queue page number setting */
 	u16 txpage[HW_QUEUE_ENTRY];
@@ -923,13 +956,20 @@ struct dvobj_priv {
 
 	ATOMIC_T disable_func;
 
+	u8 xmit_block;
+	_lock xmit_block_lock;
+
 	struct pwrctrl_priv pwrctl_priv;
 
 	struct rtw_traffic_statistics	traffic_stat;
 
-#if defined(CONFIG_IOCTL_CFG80211) && defined(RTW_SINGLE_WIPHY)
+#ifdef PLATFORM_LINUX
+	_thread_hdl_ rtnl_lock_holder;
+
+	#if defined(CONFIG_IOCTL_CFG80211) && defined(RTW_SINGLE_WIPHY)
 	struct wiphy *wiphy;
-#endif
+	#endif
+#endif /* PLATFORM_LINUX */
 
 #ifdef CONFIG_SWTIMER_BASED_TXBCN
 	_timer txbcn_timer;
@@ -941,6 +981,9 @@ struct dvobj_priv {
 	struct halmacpriv hmpriv;
 #endif /* RTW_HALMAC */
 
+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+	u8 default_port_id;
+#endif
 	/*-------- below is for SDIO INTERFACE --------*/
 
 #ifdef INTF_DATA
@@ -1073,6 +1116,8 @@ struct dvobj_priv {
 #define DEV_ADHOC_NUM(_dvobj)		MSTATE_ADHOC_NUM(&((_dvobj)->iface_state))
 #define DEV_ADHOC_LD_NUM(_dvobj)	MSTATE_ADHOC_LD_NUM(&((_dvobj)->iface_state))
 #define DEV_WPS_NUM(_dvobj)			MSTATE_WPS_NUM(&((_dvobj)->iface_state))
+#define DEV_ROCH_NUM(_dvobj)		MSTATE_ROCH_NUM(&((_dvobj)->iface_state))
+#define DEV_MGMT_TX_NUM(_dvobj)		MSTATE_MGMT_TX_NUM(&((_dvobj)->iface_state))
 #define DEV_U_CH(_dvobj)			MSTATE_U_CH(&((_dvobj)->iface_state))
 #define DEV_U_BW(_dvobj)			MSTATE_U_BW(&((_dvobj)->iface_state))
 #define DEV_U_OFFSET(_dvobj)		MSTATE_U_OFFSET(&((_dvobj)->iface_state))
@@ -1083,11 +1128,30 @@ struct dvobj_priv {
 #define dvobj_to_sec_camctl(dvobj) (&(dvobj->cam_ctl))
 #define dvobj_to_regsty(dvobj) (&(dvobj->padapters[IFACE_ID0]->registrypriv))
 #if defined(CONFIG_IOCTL_CFG80211) && defined(RTW_SINGLE_WIPHY)
-	#define dvobj_to_wiphy(dvobj) ((dvobj)->wiphy)
+#define dvobj_to_wiphy(dvobj) ((dvobj)->wiphy)
 #endif
 #define dvobj_to_rfctl(dvobj) (&(dvobj->rf_ctl))
 #define rfctl_to_dvobj(rfctl) container_of((rfctl), struct dvobj_priv, rf_ctl)
 
+static inline void dev_set_surprise_removed(struct dvobj_priv *dvobj)
+{
+	ATOMIC_SET(&dvobj->bSurpriseRemoved, _TRUE);
+}
+static inline void dev_clr_surprise_removed(struct dvobj_priv *dvobj)
+{
+	ATOMIC_SET(&dvobj->bSurpriseRemoved, _FALSE);
+}
+static inline void dev_set_drv_stopped(struct dvobj_priv *dvobj)
+{
+	ATOMIC_SET(&dvobj->bDriverStopped, _TRUE);
+}
+static inline void dev_clr_drv_stopped(struct dvobj_priv *dvobj)
+{
+	ATOMIC_SET(&dvobj->bDriverStopped, _FALSE);
+}
+#define dev_is_surprise_removed(dvobj)	(ATOMIC_READ(&dvobj->bSurpriseRemoved) == _TRUE)
+#define dev_is_drv_stopped(dvobj)		(ATOMIC_READ(&dvobj->bDriverStopped) == _TRUE)
+
 #ifdef PLATFORM_LINUX
 static struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
 {
@@ -1111,6 +1175,8 @@ static struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
 #endif
 
 _adapter *dvobj_get_port0_adapter(struct dvobj_priv *dvobj);
+_adapter *dvobj_get_unregisterd_adapter(struct dvobj_priv *dvobj);
+_adapter *dvobj_get_adapter_by_addr(struct dvobj_priv *dvobj, u8 *addr);
 #define dvobj_get_primary_adapter(dvobj)	((dvobj)->padapters[IFACE_ID0])
 
 enum _hw_port {
@@ -1199,6 +1265,9 @@ struct _ADAPTER {
 	struct	registry_priv	registrypriv;
 
 	struct	led_priv	ledpriv;
+#ifdef CONFIG_CHNL_LOAD_MAGT
+	BOOLEAN clm_flag;
+#endif
 
 #ifdef CONFIG_RTW_NAPI
 	struct	napi_struct napi;
@@ -1273,6 +1342,7 @@ struct _ADAPTER {
 	_thread_hdl_ xmitThread;
 	_thread_hdl_ recvThread;
 
+	u8 registered;
 #ifndef PLATFORM_LINUX
 	NDIS_STATUS(*dvobj_init)(struct dvobj_priv *dvobj);
 	void (*dvobj_deinit)(struct dvobj_priv *dvobj);
@@ -1343,7 +1413,6 @@ struct _ADAPTER {
 
 	u8 netif_up;
 
-	u8 bFWReady;
 	u8 bBTFWReady;
 	u8 bLinkInfoDump;
 	u8 bRxRSSIDisplay;
@@ -1406,6 +1475,14 @@ struct _ADAPTER {
 	u8 data_fb; /* data rate fallback, valid only when fix_rate is not 0xff */
 	u8 power_offset;
 	u8 driver_tx_bw_mode;
+	u8 rsvd_page_offset;
+	u8 rsvd_page_num;
+
+#ifdef CONFIG_SUPPORT_FIFO_DUMP
+	u8 fifo_sel;
+	u32 fifo_addr;
+	u32 fifo_size;
+#endif
 
 	u8 driver_vcs_en; /* Enable=1, Disable=0 driver control vrtl_carrier_sense for tx */
 	u8 driver_vcs_type;/* force 0:disable VCS, 1:RTS-CTS, 2:CTS-to-self when vcs_en=1. */
@@ -1418,6 +1495,7 @@ struct _ADAPTER {
 	u8 tx_amsdu;
 	u16 tx_amsdu_rate;
 #endif
+	u8 driver_tx_max_agg_num; /*fix tx desc max agg num , 0xff: disable drv ctrl*/
 	unsigned char     in_cta_test;
 #ifdef DBG_RX_COUNTER_DUMP
 	u8 dump_rx_cnt_mode;/*BIT0:drv,BIT1:mac,BIT2:phy*/
@@ -1442,14 +1520,15 @@ struct _ADAPTER {
 #define adapter_to_pwrctl(adapter) dvobj_to_pwrctl(adapter_to_dvobj((adapter)))
 #define adapter_wdev_data(adapter) (&((adapter)->wdev_data))
 #if defined(RTW_SINGLE_WIPHY)
-	#define adapter_to_wiphy(adapter) dvobj_to_wiphy(adapter_to_dvobj(adapter))
+#define adapter_to_wiphy(adapter) dvobj_to_wiphy(adapter_to_dvobj(adapter))
 #else
-	#define adapter_to_wiphy(adapter) ((adapter)->wiphy)
+#define adapter_to_wiphy(adapter) ((adapter)->wiphy)
 #endif
 
 #define adapter_to_rfctl(adapter) dvobj_to_rfctl(adapter_to_dvobj((adapter)))
 
 #define adapter_mac_addr(adapter) (adapter->mac_addr)
+#define adapter_to_chset(adapter) (adapter_to_rfctl((adapter))->channel_set)
 
 #define mlme_to_adapter(mlme) container_of((mlme), struct _ADAPTER, mlmepriv)
 #define tdls_info_to_adapter(tdls) container_of((tdls), struct _ADAPTER, tdlsinfo)
@@ -1462,22 +1541,22 @@ struct _ADAPTER {
 
 static inline void rtw_set_surprise_removed(_adapter *padapter)
 {
-	ATOMIC_SET(&adapter_to_dvobj(padapter)->bSurpriseRemoved, _TRUE);
+	dev_set_surprise_removed(adapter_to_dvobj(padapter));
 }
 static inline void rtw_clr_surprise_removed(_adapter *padapter)
 {
-	ATOMIC_SET(&adapter_to_dvobj(padapter)->bSurpriseRemoved, _FALSE);
+	dev_clr_surprise_removed(adapter_to_dvobj(padapter));
 }
 static inline void rtw_set_drv_stopped(_adapter *padapter)
 {
-	ATOMIC_SET(&adapter_to_dvobj(padapter)->bDriverStopped, _TRUE);
+	dev_set_drv_stopped(adapter_to_dvobj(padapter));
 }
 static inline void rtw_clr_drv_stopped(_adapter *padapter)
 {
-	ATOMIC_SET(&adapter_to_dvobj(padapter)->bDriverStopped, _FALSE);
+	dev_clr_drv_stopped(adapter_to_dvobj(padapter));
 }
-#define rtw_is_surprise_removed(padapter)	(ATOMIC_READ(&adapter_to_dvobj(padapter)->bSurpriseRemoved) == _TRUE)
-#define rtw_is_drv_stopped(padapter)		(ATOMIC_READ(&adapter_to_dvobj(padapter)->bDriverStopped) == _TRUE)
+#define rtw_is_surprise_removed(padapter)	(dev_is_surprise_removed(adapter_to_dvobj(padapter)))
+#define rtw_is_drv_stopped(padapter)		(dev_is_drv_stopped(adapter_to_dvobj(padapter)))
 
 /*
  * Function disabled.
diff --git a/rtl8822BU/include/drv_types_ce.h b/rtl8822BU/include/drv_types_ce.h
index fc26389..c00dea8 100755..100644
--- a/rtl8822BU/include/drv_types_ce.h
+++ b/rtl8822BU/include/drv_types_ce.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __DRV_TYPES_CE_H__
 #define __DRV_TYPES_CE_H__
 
diff --git a/rtl8822BU/include/drv_types_gspi.h b/rtl8822BU/include/drv_types_gspi.h
index f0efc8c..c22c497 100755..100644
--- a/rtl8822BU/include/drv_types_gspi.h
+++ b/rtl8822BU/include/drv_types_gspi.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __DRV_TYPES_GSPI_H__
 #define __DRV_TYPES_GSPI_H__
 
diff --git a/rtl8822BU/include/drv_types_linux.h b/rtl8822BU/include/drv_types_linux.h
index 812b744..91ca68b 100755..100644
--- a/rtl8822BU/include/drv_types_linux.h
+++ b/rtl8822BU/include/drv_types_linux.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __DRV_TYPES_LINUX_H__
 #define __DRV_TYPES_LINUX_H__
 
diff --git a/rtl8822BU/include/drv_types_pci.h b/rtl8822BU/include/drv_types_pci.h
index c03657f..682688d 100755..100644
--- a/rtl8822BU/include/drv_types_pci.h
+++ b/rtl8822BU/include/drv_types_pci.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __DRV_TYPES_PCI_H__
 #define __DRV_TYPES_PCI_H__
 
@@ -29,8 +24,10 @@
 #define	INTEL_VENDOR_ID				0x8086
 #define	SIS_VENDOR_ID					0x1039
 #define	ATI_VENDOR_ID					0x1002
-#define	ATI_DEVICE_ID					0x7914
 #define	AMD_VENDOR_ID					0x1022
+#define	NVI_VENDOR_ID					0x10de
+
+#define	ATI_DEVICE_ID					0x7914
 
 #define	PCI_MAX_BRIDGE_NUMBER			255
 #define	PCI_MAX_DEVICES				32
@@ -86,9 +83,10 @@ enum pci_bridge_vendor {
 	PCI_BRIDGE_VENDOR_INTEL = 0x0,/* 0b'0000,0001 */
 	PCI_BRIDGE_VENDOR_ATI, /* = 0x02, */ /* 0b'0000,0010 */
 	PCI_BRIDGE_VENDOR_AMD, /* = 0x04, */ /* 0b'0000,0100 */
-	PCI_BRIDGE_VENDOR_SIS ,/* = 0x08, */ /* 0b'0000,1000 */
+	PCI_BRIDGE_VENDOR_SIS, /* = 0x08, */ /* 0b'0000,1000 */
+	PCI_BRIDGE_VENDOR_NVI, /* = 0x10, */ /* 0b'0001,0000 */
 	PCI_BRIDGE_VENDOR_UNKNOWN, /* = 0x40, */ /* 0b'0100,0000 */
-	PCI_BRIDGE_VENDOR_MAX ,/* = 0x80 */
+	PCI_BRIDGE_VENDOR_MAX, /* = 0x80 */
 } ;
 
 /* copy this data structor defination from MSDN SDK */
diff --git a/rtl8822BU/include/drv_types_sdio.h b/rtl8822BU/include/drv_types_sdio.h
index 736ae06..9feca12 100755..100644
--- a/rtl8822BU/include/drv_types_sdio.h
+++ b/rtl8822BU/include/drv_types_sdio.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __DRV_TYPES_SDIO_H__
 #define __DRV_TYPES_SDIO_H__
 
@@ -24,11 +19,8 @@
 #ifdef PLATFORM_LINUX
 	#include <linux/mmc/sdio_func.h>
 	#include <linux/mmc/sdio_ids.h>
-
-	#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_PLATFORM_SPRD)
-		#include <linux/mmc/host.h>
-		#include <linux/mmc/card.h>
-	#endif
+	#include <linux/mmc/host.h>
+	#include <linux/mmc/card.h>
 
 	#ifdef CONFIG_PLATFORM_SPRD
 		#include <linux/gpio.h>
@@ -45,6 +37,10 @@
 	#include <sdcardddk.h>
 #endif
 
+#define RTW_SDIO_CLK_33M	33000000
+#define RTW_SDIO_CLK_40M	40000000
+#define RTW_SDIO_CLK_80M	80000000
+#define RTW_SDIO_CLK_160M	160000000
 
 typedef struct sdio_data {
 	u8  func_number;
@@ -56,6 +52,9 @@ typedef struct sdio_data {
 #ifdef PLATFORM_LINUX
 	struct sdio_func	*func;
 	_thread_hdl_ sys_sdio_irq_thd;
+	unsigned int clock;
+	unsigned int timing;
+	u8	sd3_bus_mode;
 #endif
 
 #ifdef PLATFORM_OS_XP
diff --git a/rtl8822BU/include/drv_types_xp.h b/rtl8822BU/include/drv_types_xp.h
index 93766be..81c4504 100755..100644
--- a/rtl8822BU/include/drv_types_xp.h
+++ b/rtl8822BU/include/drv_types_xp.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __DRV_TYPES_XP_H__
 #define __DRV_TYPES_XP_H__
 
diff --git a/rtl8822BU/include/ethernet.h b/rtl8822BU/include/ethernet.h
index e127605..2bafa4d 100755..100644
--- a/rtl8822BU/include/ethernet.h
+++ b/rtl8822BU/include/ethernet.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 /*! \file */
 #ifndef __INC_ETHERNET_H
 #define __INC_ETHERNET_H
diff --git a/rtl8822BU/include/gspi_hal.h b/rtl8822BU/include/gspi_hal.h
index 98fec09..6da0f07 100755..100644
--- a/rtl8822BU/include/gspi_hal.h
+++ b/rtl8822BU/include/gspi_hal.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __GSPI_HAL_H__
 #define __GSPI_HAL_H__
 
diff --git a/rtl8822BU/include/gspi_ops.h b/rtl8822BU/include/gspi_ops.h
index 7a8cb63..bcfaad2 100755..100644
--- a/rtl8822BU/include/gspi_ops.h
+++ b/rtl8822BU/include/gspi_ops.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __GSPI_OPS_H__
 #define __GSPI_OPS_H__
 
diff --git a/rtl8822BU/include/gspi_ops_linux.h b/rtl8822BU/include/gspi_ops_linux.h
index 9bd18da..0ba263d 100755..100644
--- a/rtl8822BU/include/gspi_ops_linux.h
+++ b/rtl8822BU/include/gspi_ops_linux.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __SDIO_OPS_LINUX_H__
 #define __SDIO_OPS_LINUX_H__
 
diff --git a/rtl8822BU/include/gspi_osintf.h b/rtl8822BU/include/gspi_osintf.h
index e51d2e4..6393f77 100755..100644
--- a/rtl8822BU/include/gspi_osintf.h
+++ b/rtl8822BU/include/gspi_osintf.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __SDIO_OSINTF_H__
 #define __SDIO_OSINTF_H__
 
diff --git a/rtl8822BU/include/h2clbk.h b/rtl8822BU/include/h2clbk.h
index e7f0df5..4e22afc 100755..100644
--- a/rtl8822BU/include/h2clbk.h
+++ b/rtl8822BU/include/h2clbk.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 
 #define _H2CLBK_H_
diff --git a/rtl8822BU/include/hal_btcoex.h b/rtl8822BU/include/hal_btcoex.h
index a1b4914..0e01607 100755..100644
--- a/rtl8822BU/include/hal_btcoex.h
+++ b/rtl8822BU/include/hal_btcoex.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __HAL_BTCOEX_H__
 #define __HAL_BTCOEX_H__
 
@@ -42,6 +37,7 @@ void hal_btcoex_SetPgAntNum(PADAPTER padapter, u8 antNum);
 
 u8 hal_btcoex_Initialize(PADAPTER padapter);
 void hal_btcoex_PowerOnSetting(PADAPTER padapter);
+void hal_btcoex_PowerOffSetting(PADAPTER padapter);
 void hal_btcoex_PreLoadFirmware(PADAPTER padapter);
 void hal_btcoex_InitHwConfig(PADAPTER padapter, u8 bWifiOnly);
 
@@ -90,4 +86,9 @@ u16 hal_btcoex_btreg_read(PADAPTER padapter, u8 type, u16 addr, u32 *data);
 u16 hal_btcoex_btreg_write(PADAPTER padapter, u8 type, u16 addr, u16 val);
 void hal_btcoex_set_rfe_type(u8 type);
 void hal_btcoex_switchband_notify(u8 under_scan, u8 band_type);
+
+#ifdef CONFIG_RF4CE_COEXIST
+void hal_btcoex_set_rf4ce_link_state(u8 state);
+u8 hal_btcoex_get_rf4ce_link_state(void);
+#endif
 #endif /* !__HAL_BTCOEX_H__ */
diff --git a/rtl8822BU/include/hal_btcoex_wifionly.h b/rtl8822BU/include/hal_btcoex_wifionly.h
index 2002e94..8a726c0 100755..100644
--- a/rtl8822BU/include/hal_btcoex_wifionly.h
+++ b/rtl8822BU/include/hal_btcoex_wifionly.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef __HALBTC_WIFIONLY_H__
 #define __HALBTC_WIFIONLY_H__
 
@@ -21,6 +35,8 @@ struct wifi_only_haldata {
 	u16		customer_id;
 	u8		efuse_pg_antnum;
 	u8		efuse_pg_antpath;
+	u8		rfe_type;
+	u8		ant_div_cfg;
 };
 
 struct wifi_only_cfg {
diff --git a/rtl8822BU/include/hal_com.h b/rtl8822BU/include/hal_com.h
index 7523a2c..5a10a27 100755..100644
--- a/rtl8822BU/include/hal_com.h
+++ b/rtl8822BU/include/hal_com.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __HAL_COMMON_H__
 #define __HAL_COMMON_H__
 
@@ -332,6 +327,8 @@ void rtw_hal_config_rftype(PADAPTER  padapter);
 #define WL_FUNC_FTM			BIT3
 #define WL_FUNC_BIT_NUM		4
 
+#define TBTT_PROBIHIT_HOLD_TIME 0x80
+
 int hal_spec_init(_adapter *adapter);
 void dump_hal_spec(void *sel, _adapter *adapter);
 
@@ -345,7 +342,7 @@ u8 hal_largest_bw(_adapter *adapter, u8 in_bw);
 
 bool hal_chk_wl_func(_adapter *adapter, u8 func);
 
-u8 hal_com_config_channel_plan(
+void hal_com_config_channel_plan(
 	IN	PADAPTER padapter,
 	IN	char *hw_alpha2,
 	IN	u8 hw_chplan,
@@ -378,7 +375,7 @@ Hal_MappingOutPipe(
 	IN	u8		NumOutPipe
 );
 
-
+void rtw_dump_fw_info(void *sel, _adapter *adapter);
 void rtw_restore_mac_addr(_adapter *adapter);/*set mac addr when hal_init for all iface*/
 void rtw_hal_dump_macaddr(void *sel, _adapter *adapter);
 
@@ -417,6 +414,7 @@ void hw_var_port_switch(_adapter *adapter);
 void SetHwReg(PADAPTER padapter, u8 variable, u8 *val);
 void GetHwReg(PADAPTER padapter, u8 variable, u8 *val);
 void rtw_hal_check_rxfifo_full(_adapter *adapter);
+void rtw_hal_reqtxrpt(_adapter *padapter, u8 macid);
 
 u8 SetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value);
 u8 GetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value);
@@ -534,6 +532,9 @@ void rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished);
 		s32 rtw_hal_ch_sw_oper_offload(_adapter *padapter, u8 channel, u8 channel_offset, u16 bwmode);
 	#endif
 #endif
+#if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT)
+s32 rtw_hal_set_wifi_port_id_cmd(_adapter *adapter);
+#endif
 
 #ifdef CONFIG_GPIO_API
 	u8 rtw_hal_get_gpio(_adapter *adapter, u8 gpio_num);
@@ -552,50 +553,6 @@ void rtw_hal_ch_sw_iqk_info_restore(_adapter *padapter, u8 ch_sw_use_case);
 	void rtw_hal_set_output_gpio(_adapter *padapter, u8 index, u8 outputval);
 #endif
 
-typedef enum _HAL_PHYDM_OPS {
-	HAL_PHYDM_DIS_ALL_FUNC,
-	HAL_PHYDM_FUNC_SET,
-	HAL_PHYDM_FUNC_CLR,
-	HAL_PHYDM_ABILITY_BK,
-	HAL_PHYDM_ABILITY_RESTORE,
-	HAL_PHYDM_ABILITY_SET,
-	HAL_PHYDM_ABILITY_GET,
-} HAL_PHYDM_OPS;
-
-
-#define DYNAMIC_FUNC_DISABLE		(0x0)
-u32 rtw_phydm_ability_ops(_adapter *adapter, HAL_PHYDM_OPS ops, u32 ability);
-
-#define rtw_phydm_func_disable_all(adapter)	\
-	rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0)
-
-#define rtw_phydm_func_for_offchannel(adapter) \
-	do { \
-		rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0); \
-		if (rtw_odm_adaptivity_needed(adapter)) \
-			rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_SET, ODM_BB_ADAPTIVITY); \
-	} while (0)
-
-#define rtw_phydm_func_set(adapter, ability)	\
-	rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_SET, ability)
-
-#define rtw_phydm_func_clr(adapter, ability)	\
-	rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_CLR, ability)
-
-#define rtw_phydm_ability_backup(adapter)	\
-	rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_BK, 0)
-
-#define rtw_phydm_ability_restore(adapter)	\
-	rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_RESTORE, 0)
-
-#define rtw_phydm_ability_set(adapter, ability)	\
-	rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_SET, ability)
-
-static inline u32 rtw_phydm_ability_get(_adapter *adapter)
-{
-	return rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_GET, 0);
-}
-
 #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
 	extern char *rtw_phy_file_path;
 	extern char rtw_phy_para_file_path[PATH_LENGTH_MAX];
@@ -629,6 +586,26 @@ void StopTxBeacon(_adapter *padapter);
 #endif
 
 #ifdef CONFIG_LPS_PG
+#define LPSPG_RSVD_PAGE_SET_MACID(_rsvd_pag, _value)		SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 0, 8, _value)/*used macid*/
+#define LPSPG_RSVD_PAGE_SET_MBSSCAMID(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 8, 8, _value)/*used BSSID CAM entry*/
+#define LPSPG_RSVD_PAGE_SET_PMC_NUM(_rsvd_pag, _value)		SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 16, 8, _value)/*Max used Pattern Match CAM entry*/
+#define LPSPG_RSVD_PAGE_SET_MU_RAID_GID(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 24, 8, _value)/*Max MU rate table Group ID*/
+#define LPSPG_RSVD_PAGE_SET_SEC_CAM_NUM(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x04, 0, 8, _value)/*used Security CAM entry number*/
+#define LPSPG_RSVD_PAGE_SET_DRV_RSVDPAGE_NUM(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x04, 8, 8, _value)/*Txbuf used page number for fw offload*/
+#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID1(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 0, 8, _value)/*used Security CAM entry -1*/
+#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID2(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 8, 8, _value)/*used Security CAM entry -2*/
+#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID3(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 16, 8, _value)/*used Security CAM entry -3*/
+#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID4(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 24, 8, _value)/*used Security CAM entry -4*/
+#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID5(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 0, 8, _value)/*used Security CAM entry -5*/
+#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID6(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 8, 8, _value)/*used Security CAM entry -6*/
+#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID7(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 16, 8, _value)/*used Security CAM entry -7*/
+#define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID8(_rsvd_pag, _value)	SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 24, 8, _value)/*used Security CAM entry -8*/
+enum lps_pg_hdl_id {
+	LPS_PG_INFO_CFG = 0,
+	LPS_PG_REDLEMEM,
+	LPS_PG_RESEND_H2C,
+};
+
 	u8 rtw_hal_set_lps_pg_info(_adapter *adapter);
 #endif
 
@@ -646,7 +623,35 @@ void rtw_wow_pattern_cam_dump(_adapter *adapter);
 void rtw_wow_pattern_read_cam_ent(_adapter *adapter, u8 id, struct  rtl_wow_pattern *context);
 void rtw_dump_wow_pattern(void *sel, struct rtl_wow_pattern *pwow_pattern, u8 idx);
 #endif
+
+struct rtw_ndp_info {
+	u8 enable:1;
+	u8 check_remote_ip:1; /* Need to Check Sender IP or not */
+	u8 rsvd:6;
+	u8 num_of_target_ip; /* Number of Check IP which NA query IP */
+	u8 target_link_addr[6]; /* DUT's MAC address */
+	u8 remote_ipv6_addr[16]; /* Just respond IP */
+	u8 target_ipv6_addr[16]; /* target IP */
+};
 #endif
 void rtw_dump_phy_cap(void *sel, _adapter *adapter);
+void rtw_dump_rsvd_page(void *sel, _adapter *adapter, u8 page_offset, u8 page_num);
+#ifdef CONFIG_SUPPORT_FIFO_DUMP
+void rtw_dump_fifo(void *sel, _adapter *adapter, u8 fifo_sel, u32 fifo_addr, u32 fifo_size);
+#endif
+
+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+s32 rtw_hal_set_default_port_id_cmd(_adapter *adapter, u8 mac_id);
+s32 rtw_set_default_port_id(_adapter *adapter);
+s32 rtw_set_ps_rsvd_page(_adapter *adapter);
+#endif
+
+#ifdef CONFIG_P2P_PS
+#ifdef RTW_HALMAC
+void rtw_set_p2p_ps_offload_cmd(_adapter *adapter, u8 p2p_ps_state);
+#endif
+#endif
+
+void rtw_hal_update_iqk_fw_offload_cap(_adapter *adapter);
 
 #endif /* __HAL_COMMON_H__ */
diff --git a/rtl8822BU/include/hal_com_h2c.h b/rtl8822BU/include/hal_com_h2c.h
index 41f901b..9e63909 100755..100644
--- a/rtl8822BU/include/hal_com_h2c.h
+++ b/rtl8822BU/include/hal_com_h2c.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __COMMON_H2C_H__
 #define __COMMON_H2C_H__
 
@@ -66,6 +61,10 @@ enum h2c_cmd {
 #ifdef CONFIG_LPS_PG
 	H2C_LPS_PG_INFO = 0x2B,
 #endif
+
+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+	H2C_DEFAULT_PORT_ID = 0x2C,
+#endif
 	/* Dynamic Mechanism Class: 010 */
 	H2C_MACID_CFG = 0x40,
 	H2C_TXBF = 0x41,
@@ -92,7 +91,9 @@ enum h2c_cmd {
 	H2C_BT_CONTROL = 0x68,
 	H2C_BT_WIFI_CTRL = 0x69,
 	H2C_BT_FW_PATCH = 0x6A,
-
+#if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT)
+	H2C_BTC_WL_PORT_ID = 0x71,
+#endif
 	/* WOWLAN Class: 100 */
 	H2C_WOWLAN = 0x80,
 	H2C_REMOTE_WAKE_CTRL = 0x81,
@@ -116,7 +117,12 @@ enum h2c_cmd {
 
 #define H2C_INACTIVE_PS_LEN		3
 #define H2C_RSVDPAGE_LOC_LEN		5
+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+#define H2C_DEFAULT_PORT_ID_LEN		2
+#define H2C_MEDIA_STATUS_RPT_LEN		4
+#else
 #define H2C_MEDIA_STATUS_RPT_LEN		3
+#endif
 #define H2C_KEEP_ALIVE_CTRL_LEN	2
 #define H2C_DISCON_DECISION_LEN		3
 #define H2C_AP_OFFLOAD_LEN		3
@@ -133,7 +139,7 @@ enum h2c_cmd {
 #define H2C_SCAN_OFFLOAD_CTRL_LEN	4
 #define H2C_BT_FW_PATCH_LEN			6
 #define H2C_RSSI_SETTING_LEN		4
-#define H2C_AP_REQ_TXRPT_LEN		2
+#define H2C_AP_REQ_TXRPT_LEN		3
 #define H2C_FORCE_BT_TXPWR_LEN		3
 #define H2C_BCN_RSVDPAGE_LEN		5
 #define H2C_PROBERSP_RSVDPAGE_LEN	5
@@ -155,6 +161,10 @@ enum h2c_cmd {
 	#define H2C_LPS_POFF_CTRL_LEN		1
 	#define H2C_LPS_POFF_PARAM_LEN		5
 #endif
+
+#if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT)
+#define H2C_BTC_WL_PORT_ID_LEN	1
+#endif
 #define eq_mac_addr(a, b)						(((a)[0] == (b)[0] && (a)[1] == (b)[1] && (a)[2] == (b)[2] && (a)[3] == (b)[3] && (a)[4] == (b)[4] && (a)[5] == (b)[5]) ? 1 : 0)
 #define cp_mac_addr(des, src)					((des)[0] = (src)[0], (des)[1] = (src)[1], (des)[2] = (src)[2], (des)[3] = (src)[3], (des)[4] = (src)[4], (des)[5] = (src)[5])
 #define cpIpAddr(des, src)					((des)[0] = (src)[0], (des)[1] = (src)[1], (des)[2] = (src)[2], (des)[3] = (src)[3])
@@ -225,6 +235,7 @@ enum h2c_cmd {
 #define SET_H2CCMD_MSRRPT_PARM_ROLE(__pH2CCmd, __Value)				SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 4, 4, (__Value))
 #define SET_H2CCMD_MSRRPT_PARM_MACID(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)) + 1, 0, 8, (__Value))
 #define SET_H2CCMD_MSRRPT_PARM_MACID_END(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)) + 2, 0, 8, (__Value))
+#define SET_H2CCMD_MSRRPT_PARM_PORT_NUM(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)) + 3, 0, 3, (__Value))
 
 #define GET_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd)		LE_BITS_TO_1BYTE(((u8 *)(__pH2CCmd)), 0, 1)
 #define GET_H2CCMD_MSRRPT_PARM_MIRACAST(__pH2CCmd)		LE_BITS_TO_1BYTE(((u8 *)(__pH2CCmd)), 2, 1)
@@ -257,11 +268,13 @@ s32 rtw_hal_set_FwMediaStatusRpt_range_cmd(_adapter *adapter, bool opmode, bool
 #define SET_H2CCMD_KEEPALIVE_PARM_ENABLE(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)
 #define SET_H2CCMD_KEEPALIVE_PARM_ADOPT(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value)
 #define SET_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value)
+#define SET_H2CCMD_KEEPALIVE_PARM_PORT_NUM(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 3, __Value)
 #define SET_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value)
 
 /* _DISCONNECT_DECISION_CMD_0x04 */
 #define SET_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)
 #define SET_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value)
+#define SET_H2CCMD_DISCONDECISION_PORT_NUM(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 3, __Value)
 #define SET_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value)
 #define SET_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value)
 
@@ -335,6 +348,12 @@ s32 rtw_hal_customer_str_write(_adapter *adapter, const u8 *cs);
 	SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value)
 #endif
 
+#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
+/* DEFAULT PORT ID 0x2C*/
+#define SET_H2CCMD_DFTPID_PORT_ID(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)), 0, 8, (__Value))
+#define SET_H2CCMD_DFTPID_MAC_ID(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(((u8 *)(__pH2CCmd)) + 1, 0, 8, (__Value))
+#endif
+
 #ifdef CONFIG_MCC_MODE
 /* MCC LOC CMD 0x10 */
 #define SET_H2CCMD_MCC_RSVDPAGE_LOC(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
@@ -388,6 +407,10 @@ s32 rtw_hal_customer_str_write(_adapter *adapter, const u8 *cs);
 #define SET_H2CCMD_CH_SW_OPER_OFFLOAD_BW_80M_SC(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 1, 5, 3, __Value)
 #define SET_H2CCMD_CH_SW_OPER_OFFLOAD_RFE_TYPE(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd) + 2, 0, 4, __Value)
 
+#if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT)
+#define SET_H2CCMD_BTC_WL_PORT_ID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value)
+#endif
+
 /* _WoWLAN PARAM_CMD_0x80 */
 #define SET_H2CCMD_WOWLAN_FUNC_ENABLE(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)
 #define SET_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value)
@@ -432,6 +455,8 @@ s32 rtw_hal_customer_str_write(_adapter *adapter, const u8 *cs);
 #ifdef CONFIG_GTK_OL
 #define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_EXT_MEM(__pH2CCmd, __Value)		SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value)
 #endif /* CONFIG_GTK_OL */
+#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_NDP_INFO(__pH2CCmd, __Value) \
+	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+6, 0, 8, __Value)
 
 /* AOAC_RSVDPAGE_2_0x84 */
 
@@ -490,6 +515,7 @@ typedef struct _RSVDPAGE_LOC {
 #ifdef CONFIG_GTK_OL
 	u8 LocGTKEXTMEM;
 #endif /* CONFIG_GTK_OL */
+	u8 LocNDPInfo;
 	u8 LocAOACReport;
 #ifdef CONFIG_PNO_SUPPORT
 	u8 LocPNOInfo;
diff --git a/rtl8822BU/include/hal_com_led.h b/rtl8822BU/include/hal_com_led.h
index 01dbb9c..38ac683 100755..100644
--- a/rtl8822BU/include/hal_com_led.h
+++ b/rtl8822BU/include/hal_com_led.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __HAL_COMMON_LED_H_
 #define __HAL_COMMON_LED_H_
 
diff --git a/rtl8822BU/include/hal_com_phycfg.h b/rtl8822BU/include/hal_com_phycfg.h
index fb86c2b..67eec83 100755..100644
--- a/rtl8822BU/include/hal_com_phycfg.h
+++ b/rtl8822BU/include/hal_com_phycfg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __HAL_COM_PHYCFG_H__
 #define __HAL_COM_PHYCFG_H__
 
@@ -36,18 +31,6 @@ typedef enum _RF_TX_NUM {
 
 #define MAX_POWER_INDEX		0x3F
 
-typedef enum _REGULATION_TXPWR_LMT {
-	TXPWR_LMT_FCC = 0,
-	TXPWR_LMT_MKK = 1,
-	TXPWR_LMT_ETSI = 2,
-	TXPWR_LMT_WW = 3,
-
-	TXPWR_LMT_MAX_REGULATION_NUM = 4
-} REGULATION_TXPWR_LMT;
-
-#define TX_PWR_LMT_REF_VHT_FROM_HT	BIT0
-#define TX_PWR_LMT_REF_HT_FROM_VHT	BIT1
-
 /*------------------------------Define structure----------------------------*/
 typedef struct _BB_REGISTER_DEFINITION {
 	u32 rfintfs;			/* set software control: */
@@ -79,7 +62,6 @@ PHY_GetTxPowerByRateBase(
 	IN	PADAPTER		Adapter,
 	IN	u8				Band,
 	IN	u8				RfPath,
-	IN	u8				TxNum,
 	IN	RATE_SECTION	RateSection
 );
 
@@ -112,7 +94,6 @@ _PHY_GetTxPowerByRate(
 	IN	PADAPTER	pAdapter,
 	IN	u8			Band,
 	IN	u8			RFPath,
-	IN	u8			TxNum,
 	IN	u8			RateIndex
 );
 
@@ -121,27 +102,14 @@ PHY_GetTxPowerByRate(
 	IN	PADAPTER	pAdapter,
 	IN	u8			Band,
 	IN	u8			RFPath,
-	IN	u8			TxNum,
 	IN	u8			RateIndex
 );
 
-#ifdef CONFIG_PHYDM_POWERTRACK_BY_TSSI
-s8
-PHY_GetTxPowerByRateOriginal(
-	IN	PADAPTER	pAdapter,
-	IN	u8			Band,
-	IN	u8			RFPath,
-	IN	u8			TxNum,
-	IN	u8			Rate
-);
-#endif
-
 VOID
 PHY_SetTxPowerByRate(
 	IN	PADAPTER	pAdapter,
 	IN	u8			Band,
 	IN	u8			RFPath,
-	IN	u8			TxNum,
 	IN	u8			Rate,
 	IN	s8			Value
 );
@@ -189,64 +157,45 @@ PHY_GetTxPowerIndexBase(
 	IN	PADAPTER		pAdapter,
 	IN	u8				RFPath,
 	IN	u8				Rate,
+	u8 ntx_idx,
 	IN	CHANNEL_WIDTH	BandWidth,
 	IN	u8				Channel,
 	OUT PBOOLEAN		bIn24G
 );
 
-s8
-PHY_GetTxPowerLimit(
-	IN	PADAPTER		Adapter,
-	IN	u32				RegPwrTblSel,
-	IN	BAND_TYPE		Band,
-	IN	CHANNEL_WIDTH	Bandwidth,
-	IN	u8				RfPath,
-	IN	u8				DataRate,
-	IN	u8				Channel
-);
-
-s8
-PHY_GetTxPowerLimit_no_sc(
-	IN	PADAPTER			Adapter,
-	IN	u32					RegPwrTblSel,
-	IN	BAND_TYPE			Band,
-	IN	CHANNEL_WIDTH		Bandwidth,
-	IN	u8					RfPath,
-	IN	u8					DataRate,
-	IN	u8					Channel
+#ifdef CONFIG_TXPWR_LIMIT
+s8 phy_get_txpwr_lmt_abs(_adapter *adapter
+	, const char *regd_name
+	, BAND_TYPE band, CHANNEL_WIDTH bw
+	, u8 tlrs, u8 ntx_idx, u8 cch, u8 lock
 );
 
-#ifdef CONFIG_PHYDM_POWERTRACK_BY_TSSI
-s8
-PHY_GetTxPowerLimitOriginal(
-	IN	PADAPTER		Adapter,
-	IN	u32				RegPwrTblSel,
-	IN	BAND_TYPE		Band,
-	IN	CHANNEL_WIDTH	Bandwidth,
-	IN	u8				RfPath,
-	IN	u8				DataRate,
-	IN	u8				Channel
+s8 phy_get_txpwr_lmt(_adapter *adapter
+	, const char *regd_name
+	, BAND_TYPE band, CHANNEL_WIDTH bw
+	, u8 rfpath, u8 rs, u8 ntx_idx, u8 cch, u8 lock
 );
-#endif
 
-VOID
-PHY_ConvertTxPowerLimitToPowerIndex(
-	IN	PADAPTER			Adapter
-);
-
-VOID
-PHY_InitTxPowerLimit(
-	IN	PADAPTER			Adapter
+s8 PHY_GetTxPowerLimit(_adapter *adapter
+	, const char *regd_name
+	, BAND_TYPE band, CHANNEL_WIDTH bw
+	, u8 rfpath, u8 rate, u8 ntx_idx, u8 cch
 );
+#else
+#define phy_get_txpwr_lmt_abs(adapter, regd_name, band, bw, tlrs, ntx_idx, cch, lock) MAX_POWER_INDEX
+#define phy_get_txpwr_lmt(adapter, regd_name, band, bw, rfpath, rs, ntx_idx, cch, lock) MAX_POWER_INDEX
+#define PHY_GetTxPowerLimit(adapter, regd_name, band, bw, rfpath, rate, ntx_idx, cch) MAX_POWER_INDEX
+#endif /* CONFIG_TXPWR_LIMIT */
 
 s8
 PHY_GetTxPowerTrackingOffset(
 	PADAPTER	pAdapter,
-	u8			Rate,
-	u8			RFPath
+	u8			RFPath,
+	u8			Rate
 );
 
 struct txpwr_idx_comp {
+	u8 ntx_idx;
 	u8 base;
 	s8 by_rate;
 	s8 limit;
@@ -278,16 +227,15 @@ void dump_tx_power_idx(void *sel, _adapter *adapter);
 bool phy_is_tx_power_limit_needed(_adapter *adapter);
 bool phy_is_tx_power_by_rate_needed(_adapter *adapter);
 int phy_load_tx_power_by_rate(_adapter *adapter, u8 chk_file);
+#ifdef CONFIG_TXPWR_LIMIT
 int phy_load_tx_power_limit(_adapter *adapter, u8 chk_file);
+#endif
 void phy_load_tx_power_ext_info(_adapter *adapter, u8 chk_file);
 void phy_reload_tx_power_ext_info(_adapter *adapter);
 void phy_reload_default_tx_power_ext_info(_adapter *adapter);
 
 const struct map_t *hal_pg_txpwr_def_info(_adapter *adapter);
 
-void dump_pg_txpwr_info_2g(void *sel, TxPowerInfo24G *txpwr_info, u8 rfpath_num, u8 max_tx_cnt);
-void dump_pg_txpwr_info_5g(void *sel, TxPowerInfo5G *txpwr_info, u8 rfpath_num, u8 max_tx_cnt);
-
 void dump_hal_txpwr_info_2g(void *sel, _adapter *adapter, u8 rfpath_num, u8 max_tx_cnt);
 void dump_hal_txpwr_info_5g(void *sel, _adapter *adapter, u8 rfpath_num, u8 max_tx_cnt);
 
@@ -301,7 +249,6 @@ void hal_load_txpwr_info(
 void dump_tx_power_ext_info(void *sel, _adapter *adapter);
 void dump_target_tx_power(void *sel, _adapter *adapter);
 void dump_tx_power_by_rate(void *sel, _adapter *adapter);
-void dump_tx_power_limit(void *sel, _adapter *adapter);
 
 int rtw_get_phy_file_path(_adapter *adapter, const char *file_name);
 
@@ -340,7 +287,9 @@ int phy_ConfigBBWithPgParaFile(IN PADAPTER	Adapter, IN const char *pFileName);
 int phy_ConfigBBWithMpParaFile(IN PADAPTER	Adapter, IN char	*pFileName);
 int PHY_ConfigRFWithParaFile(IN	PADAPTER	Adapter, IN char	*pFileName, IN u8	eRFPath);
 int PHY_ConfigRFWithTxPwrTrackParaFile(IN PADAPTER	Adapter, IN char	*pFileName);
+#ifdef CONFIG_TXPWR_LIMIT
 int PHY_ConfigRFWithPowerLimitTableParaFile(IN PADAPTER	Adapter, IN const char *pFileName);
+#endif
 void phy_free_filebuf_mask(_adapter *padapter, u8 mask);
 void phy_free_filebuf(_adapter *padapter);
 #endif /* CONFIG_LOAD_PHY_PARA_FROM_FILE */
diff --git a/rtl8822BU/include/hal_com_reg.h b/rtl8822BU/include/hal_com_reg.h
index 81f99cd..71990e7 100755..100644
--- a/rtl8822BU/include/hal_com_reg.h
+++ b/rtl8822BU/include/hal_com_reg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __HAL_COMMON_REG_H__
 #define __HAL_COMMON_REG_H__
 
@@ -126,7 +121,8 @@
 #define REG_TRXFF_STATUS				0x0118
 #define REG_RXFF_PTR					0x011C
 #define REG_HIMR						0x0120
-#define REG_HISR						0x0124
+#define REG_FE1IMR						0x0120
+#define REG_HISR							0x0124
 #define REG_HIMRE						0x0128
 #define REG_HISRE						0x012C
 #define REG_CPWM						0x012F
@@ -1435,6 +1431,17 @@ Current IOREG MAP
 
 /* -----------------------------------------------------
  *
+ *	0x0120h ~ 0x0123h	RX DMA Configuration
+ *
+ * ----------------------------------------------------- */
+#define BIT_FS_RXDONE_INT_EN				BIT(16)
+
+
+/* REG_RXPKT_NUM				(Offset 0x0284) */
+#define BIT_RW_RELEASE_EN				BIT(18)
+
+/* -----------------------------------------------------
+ *
  *	0x0280h ~ 0x028Bh	RX DMA Configuration
  *
  * ----------------------------------------------------- */
diff --git a/rtl8822BU/include/hal_data.h b/rtl8822BU/include/hal_data.h
index 28e2a5a..a036ec8 100755..100644
--- a/rtl8822BU/include/hal_data.h
+++ b/rtl8822BU/include/hal_data.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __HAL_DATA_H__
 #define __HAL_DATA_H__
 
@@ -255,7 +250,8 @@ struct hal_spec_t {
 	u8 rfpath_num_5g:4;	/* used for tx power index path */
 
 	u8 max_tx_cnt;
-	u8 nss_num;
+	u8 tx_nss_num:4;
+	u8 rx_nss_num:4;
 	u8 band_cap;	/* value of BAND_CAP_XXX */
 	u8 bw_cap;		/* value of BW_CAP_XXX */
 	u8 port_num;
@@ -287,6 +283,72 @@ struct hal_iqk_reg_backup {
 	u32 reg_backup[MAX_RF_PATH][MAX_IQK_INFO_BACKUP_REG_NUM];
 };
 
+
+typedef struct hal_p2p_ps_para {
+	/*DW0*/
+	u8  offload_en:1;
+	u8  role:1;
+	u8  ctwindow_en:1;
+	u8  noa_en:1;
+	u8  noa_sel:1;
+	u8  all_sta_sleep:1;
+	u8  discovery:1;
+	u8  rsvd2:1;
+	u8  p2p_port_id;
+	u8  p2p_group;
+	u8  p2p_macid;
+
+	/*DW1*/
+	u8 ctwindow_length;
+	u8 rsvd3;
+	u8 rsvd4;
+	u8 rsvd5;
+
+	/*DW2*/
+	u32 noa_duration_para;
+
+	/*DW3*/
+	u32 noa_interval_para;
+
+	/*DW4*/
+	u32 noa_start_time_para;
+
+	/*DW5*/
+	u32 noa_count_para;
+} HAL_P2P_PS_PARA, *PHAL_P2P_PS_PARA;
+
+#define TXPWR_LMT_RS_CCK	0
+#define TXPWR_LMT_RS_OFDM	1
+#define TXPWR_LMT_RS_HT		2
+#define TXPWR_LMT_RS_VHT	3
+#define TXPWR_LMT_RS_NUM	4
+
+#define TXPWR_LMT_RS_NUM_2G	4 /* CCK, OFDM, HT, VHT */
+#define TXPWR_LMT_RS_NUM_5G	3 /* OFDM, HT, VHT */
+
+#ifdef CONFIG_TXPWR_LIMIT
+extern const char *const _txpwr_lmt_rs_str[];
+#define txpwr_lmt_rs_str(rs) (((rs) >= TXPWR_LMT_RS_NUM) ? _txpwr_lmt_rs_str[TXPWR_LMT_RS_NUM] : _txpwr_lmt_rs_str[(rs)])
+
+struct txpwr_lmt_ent {
+	_list list;
+
+	s8 lmt_2g[MAX_2_4G_BANDWIDTH_NUM]
+		[TXPWR_LMT_RS_NUM_2G]
+		[CENTER_CH_2G_NUM]
+		[MAX_TX_COUNT];
+
+#ifdef CONFIG_IEEE80211_BAND_5GHZ
+	s8 lmt_5g[MAX_5G_BANDWIDTH_NUM]
+		[TXPWR_LMT_RS_NUM_5G]
+		[CENTER_CH_5G_ALL_NUM]
+		[MAX_TX_COUNT];
+#endif
+
+	char regd_name[0];
+};
+#endif /* CONFIG_TXPWR_LIMIT */
+
 typedef struct hal_com_data {
 	HAL_VERSION			version_id;
 	RT_MULTI_FUNC		MultiFunc; /* For multi-function consideration. */
@@ -294,11 +356,13 @@ typedef struct hal_com_data {
 	RT_REGULATOR_MODE	RegulatorMode; /* switching regulator or LDO */
 	u8	hw_init_completed;
 	/****** FW related ******/
+	u32 firmware_size;
 	u16 firmware_version;
 	u16	FirmwareVersionRev;
 	u16 firmware_sub_version;
 	u16	FirmwareSignature;
 	u8	RegFWOffload;
+	u8	bFWReady;
 	u8	fw_ractrl;
 	u8	FwRsvdPageStartOffset; /* 2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ.*/
 	u8	LastHMEBoxNum;	/* H2C - for host message to fw */
@@ -326,6 +390,11 @@ typedef struct hal_com_data {
 	BOOLEAN			bSWToBW80M;
 	BOOLEAN			bChnlBWInitialized;
 	u32				BackUp_BB_REG_4_2nd_CCA[3];
+
+#ifdef	CONFIG_CHNL_LOAD_MAGT
+	u16	clm_result[MAX_CHANNEL_NUM];
+	u16	clm_period;
+#endif
 #ifdef CONFIG_AUTO_CHNL_SEL_NHM
 	struct auto_chan_sel acs;
 #endif
@@ -342,6 +411,7 @@ typedef struct hal_com_data {
 	u8	bDumpRxPkt;
 	u8	bDumpTxPkt;
 	u8	bDisableTXPowerTraining;
+	u8	dis_turboedca;
 
 
 	/****** EEPROM setting.******/
@@ -378,6 +448,8 @@ typedef struct hal_com_data {
 	u8	EEPROMMACAddr[ETH_ALEN];
 	u8	tx_bbswing_24G;
 	u8	tx_bbswing_5G;
+	u8	efuse0x3d7;	/* efuse[0x3D7] */
+	u8	efuse0x3d8;	/* efuse[0x3D8] */
 
 #ifdef CONFIG_RF_POWER_TRIM
 	u8	EEPROMRFGainOffset;
@@ -414,74 +486,17 @@ typedef struct hal_com_data {
 	s8	BW80_5G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
 #endif
 
-	u8	Regulation2_4G;
-	u8	Regulation5G;
-
-	/********************************
-	*	TX power by rate table at most 4RF path.
-	*	The register is
-	*
-	*	VHT TX power by rate off setArray =
-	*	Band:-2G&5G = 0 / 1
-	*	RF: at most 4*4 = ABCD=0/1/2/3
-	*	CCK=0 OFDM=1/2 HT-MCS 0-15=3/4/56 VHT=7/8/9/10/11
-	**********************************/
-
 	u8 txpwr_by_rate_undefined_band_path[TX_PWR_BY_RATE_NUM_BAND]
 		[TX_PWR_BY_RATE_NUM_RF];
 
 	s8	TxPwrByRateOffset[TX_PWR_BY_RATE_NUM_BAND]
 		[TX_PWR_BY_RATE_NUM_RF]
-		[TX_PWR_BY_RATE_NUM_RF]
 		[TX_PWR_BY_RATE_NUM_RATE];
 
-#ifdef CONFIG_PHYDM_POWERTRACK_BY_TSSI
-	s8	TxPwrByRate[TX_PWR_BY_RATE_NUM_BAND]
-		[TX_PWR_BY_RATE_NUM_RF]
-		[TX_PWR_BY_RATE_NUM_RF]
-		[TX_PWR_BY_RATE_NUM_RATE];
-#endif
-	/* --------------------------------------------------------------------------------- */
-
-	u8 tx_pwr_lmt_5g_20_40_ref;
-
-	/* Power Limit Table for 2.4G */
-	s8	TxPwrLimit_2_4G[MAX_REGULATION_NUM]
-		[MAX_2_4G_BANDWIDTH_NUM]
-		[MAX_RATE_SECTION_NUM]
-		[CENTER_CH_2G_NUM]
-		[MAX_RF_PATH];
-
-	/* Power Limit Table for 5G */
-	s8	TxPwrLimit_5G[MAX_REGULATION_NUM]
-		[MAX_5G_BANDWIDTH_NUM]
-		[MAX_RATE_SECTION_NUM]
-		[CENTER_CH_5G_ALL_NUM]
-		[MAX_RF_PATH];
-
-
-#ifdef CONFIG_PHYDM_POWERTRACK_BY_TSSI
-	s8	TxPwrLimit_2_4G_Original[MAX_REGULATION_NUM]
-		[MAX_2_4G_BANDWIDTH_NUM]
-		[MAX_RATE_SECTION_NUM]
-		[CENTER_CH_2G_NUM]
-		[MAX_RF_PATH];
-
-
-	s8	TxPwrLimit_5G_Original[MAX_REGULATION_NUM]
-		[MAX_5G_BANDWIDTH_NUM]
-		[MAX_RATE_SECTION_NUM]
-		[CENTER_CH_5G_ALL_NUM]
-		[MAX_RF_PATH];
-
-#endif
-
-	/* Store the original power by rate value of the base of each rate section of rf path A & B */
+	/* Store the original power by rate value of the base rate for each rate section and rf path */
 	u8	TxPwrByRateBase2_4G[TX_PWR_BY_RATE_NUM_RF]
-		[TX_PWR_BY_RATE_NUM_RF]
 		[MAX_BASE_NUM_IN_PHY_REG_PG_2_4G];
 	u8	TxPwrByRateBase5G[TX_PWR_BY_RATE_NUM_RF]
-		[TX_PWR_BY_RATE_NUM_RF]
 		[MAX_BASE_NUM_IN_PHY_REG_PG_5G];
 
 	u8	txpwr_by_rate_loaded:1;
@@ -509,7 +524,8 @@ typedef struct hal_com_data {
 
 	u8	bLedOpenDrain; /* Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. */
 	u32	ac_param_be; /* Original parameter for BE, use for EDCA turbo.	*/
-
+	u8	is_turbo_edca;
+	u8	prv_traffic_idx;
 	BB_REGISTER_DEFINITION_T	PHYRegDef[MAX_RF_PATH];	/* Radio A/B/C/D */
 
 	u32	RfRegChnlVal[MAX_RF_PATH];
@@ -517,15 +533,7 @@ typedef struct hal_com_data {
 	/* RDG enable */
 	BOOLEAN	 bRDGEnable;
 
-	u8	RegTxPause;
-	/* Beacon function related global variable. */
-	u8	RegBcnCtrlVal;
-	u8	RegFwHwTxQCtrl;
-	u8	RegReg542;
-	u8	RegCR_1;
-	u8	Reg837;
-	u16	RegRRSR;
-
+	u16 RegRRSR;
 	/****** antenna diversity ******/
 	u8	AntDivCfg;
 	u8	with_extenal_ant_switch;
@@ -538,7 +546,6 @@ typedef struct hal_com_data {
 	u8 sw_antdiv_bl_state;
 
 	/******** PHY DM & DM Section **********/
-	u8			DM_Type;
 	_lock		IQKSpinLock;
 	u8			INIDATA_RATE[MACID_NUM_SW_LIMIT];
 	/* Upper and Lower Signal threshold for Rate Adaptive*/
@@ -546,6 +553,7 @@ typedef struct hal_com_data {
 	int			entry_max_undecorated_smoothed_pwdb;
 	int			min_undecorated_pwdb_for_dm;
 	struct PHY_DM_STRUCT	 odmpriv;
+	u64			bk_rf_ability;
 	u8			bIQKInitialized;
 	u8			bNeedIQK;
 	u8		IQK_MP_Switch;
@@ -612,7 +620,7 @@ typedef struct hal_com_data {
 	/* SDIO Rx FIFO related. */
 	/*  */
 	u8			SdioRxFIFOCnt;
-	u16			SdioRxFIFOSize;
+	u32			SdioRxFIFOSize;
 
 #ifndef RTW_HALMAC
 	u32			sdio_tx_max_len[SDIO_MAX_TX_QUEUE];/* H, N, L, used for sdio tx aggregation max length per queue */
@@ -624,9 +632,17 @@ typedef struct hal_com_data {
 	u16			tx_extra_page;
 	u16			tx_pub_page;
 	u16			max_oqt_page;
+	#ifdef XMIT_BUF_SIZE
 	u32			max_xmit_size_vovi;
 	u32			max_xmit_size_bebk;
-#endif
+	#endif /*XMIT_BUF_SIZE*/
+	u16			max_xmit_page;
+	u16			max_xmit_page_vo;
+	u16			max_xmit_page_vi;
+	u16			max_xmit_page_be;
+	u16			max_xmit_page_bk;
+
+#endif /*#ifdef CONFIG_RTL8821C*/
 #endif /* !RTW_HALMAC */
 #endif /* CONFIG_SDIO_HCI */
 
@@ -672,6 +688,7 @@ typedef struct hal_com_data {
 
 	BOOLEAN		bL1OffSupport;
 	BOOLEAN	bSupportBackDoor;
+	u32			pci_backdoor_ctrl;
 
 	u8			bDefaultAntenna;
 
diff --git a/rtl8822BU/include/hal_gspi.h b/rtl8822BU/include/hal_gspi.h
index 68119c5..51d491c 100755..100644
--- a/rtl8822BU/include/hal_gspi.h
+++ b/rtl8822BU/include/hal_gspi.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __HAL_GSPI_H_
 #define __HAL_GSPI_H_
 
diff --git a/rtl8822BU/include/hal_ic_cfg.h b/rtl8822BU/include/hal_ic_cfg.h
index 6692203..81ab087 100755..100644
--- a/rtl8822BU/include/hal_ic_cfg.h
+++ b/rtl8822BU/include/hal_ic_cfg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __HAL_IC_CFG_H__
 #define __HAL_IC_CFG_H__
 
@@ -34,6 +29,8 @@
 #define RTL8822B_SUPPORT				0
 #define RTL8821B_SUPPORT				0
 #define RTL8821C_SUPPORT				0
+#define RTL8710B_SUPPORT				0
+#define RTL8814B_SUPPORT				0
 
 /*#if (RTL8188E_SUPPORT==1)*/
 #define RATE_ADAPTIVE_SUPPORT			0
@@ -94,6 +91,9 @@
 	#ifndef CONFIG_RTW_MAC_HIDDEN_RPT
 		#define CONFIG_RTW_MAC_HIDDEN_RPT
 	#endif
+	#ifndef CONFIG_RTW_CUSTOMER_STR
+		#define CONFIG_RTW_CUSTOMER_STR
+	#endif
 #endif
 
 #ifdef CONFIG_RTL8814A
@@ -124,6 +124,9 @@
 	#ifndef CONFIG_RTW_MAC_HIDDEN_RPT
 		#define CONFIG_RTW_MAC_HIDDEN_RPT
 	#endif
+	#ifndef CONFIG_RTW_CUSTOMER_STR
+		#define CONFIG_RTW_CUSTOMER_STR
+	#endif
 #endif
 
 #ifdef CONFIG_RTL8822B
@@ -132,6 +135,8 @@
 	#ifndef CONFIG_FW_C2H_PKT
 		#define CONFIG_FW_C2H_PKT
 	#endif /* CONFIG_FW_C2H_PKT */
+	#define RTW_TX_PA_BIAS	/* Adjust TX PA Bias from eFuse */
+	#define CONFIG_DFS	/* Enable 5G band 2&3 channel */
 
 	#ifdef CONFIG_WOWLAN
 		#define CONFIG_GTK_OL
@@ -150,15 +155,12 @@
 	#endif /* CONFIG_WOWLAN */
 	#ifdef CONFIG_CONCURRENT_MODE
 		#define CONFIG_AP_PORT_SWAP
+		#define CONFIG_FW_MULTI_PORT_SUPPORT
 	#endif /* CONFIG_CONCURRENT_MODE */
 
 	/*
 	 * Beamforming related definition
 	 */
-	#if defined(CONFIG_CONCURRENT_MODE) && defined(CONFIG_BEAMFORMING)
-		#undef CONFIG_BEAMFORMING
-		#warning "Not support Beamforming in concurrent mode yet!!"
-	#endif /* CONFIG_CONCURRENT_MODE && CONFIG_BEAMFORMING */
 	/* Beamforming mechanism is on driver not phydm, always disable it */
 	#define BEAMFORMING_SUPPORT				0
 	/* Only support new beamforming mechanism */
@@ -168,8 +170,15 @@
 
 	#ifndef CONFIG_RTW_MAC_HIDDEN_RPT
 		#define CONFIG_RTW_MAC_HIDDEN_RPT
-#endif /* CONFIG_RTW_MAC_HIDDEN_RPT */
+	#endif /* CONFIG_RTW_MAC_HIDDEN_RPT */
 
+	#ifndef DBG_RX_DFRAME_RAW_DATA
+		#define DBG_RX_DFRAME_RAW_DATA
+	#endif /* DBG_RX_DFRAME_RAW_DATA */
+
+	#ifndef RTW_IQK_FW_OFFLOAD
+		/* #define RTW_IQK_FW_OFFLOAD */
+	#endif /* RTW_IQK_FW_OFFLOAD */
 #endif /* CONFIG_RTL8822B */
 
 #ifdef CONFIG_RTL8821C
@@ -178,14 +187,20 @@
 	#ifndef CONFIG_FW_C2H_PKT
 		#define CONFIG_FW_C2H_PKT
 	#endif
-	#ifndef CONFIG_RTW_MAC_HIDDEN_RPT
-		#define CONFIG_RTW_MAC_HIDDEN_RPT
+	#ifdef CONFIG_NO_FW
+		#ifdef CONFIG_RTW_MAC_HIDDEN_RPT
+			#undef CONFIG_RTW_MAC_HIDDEN_RPT
+		#endif
+	#else
+		#ifndef CONFIG_RTW_MAC_HIDDEN_RPT
+			#define CONFIG_RTW_MAC_HIDDEN_RPT
+		#endif
 	#endif
 	#define LOAD_FW_HEADER_FROM_DRIVER
 	#define CONFIG_PHY_CAPABILITY_QUERY
 	#ifdef CONFIG_CONCURRENT_MODE
 	#define CONFIG_AP_PORT_SWAP
-	/*#define CONFIG_SUPPORT_FW_MULTI_PORT*/
+	#define CONFIG_FW_MULTI_PORT_SUPPORT
 	#endif
 	#define CONFIG_SUPPORT_FIFO_DUMP
 #endif
diff --git a/rtl8822BU/include/hal_intf.h b/rtl8822BU/include/hal_intf.h
index 5112073..2ca849d 100755..100644
--- a/rtl8822BU/include/hal_intf.h
+++ b/rtl8822BU/include/hal_intf.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __HAL_INTF_H__
 #define __HAL_INTF_H__
 
@@ -45,6 +40,14 @@ enum _CHIP_TYPE {
 	MAX_CHIP_TYPE
 };
 
+#ifdef RTW_HALMAC
+enum fw_mem {
+	FW_EMEM,
+	FW_IMEM,
+	FW_DMEM,
+};
+#endif
+
 extern const u32 _chip_type_to_odm_ic_type[];
 #define chip_type_to_odm_ic_type(chip_type) (((chip_type) >= MAX_CHIP_TYPE) ? _chip_type_to_odm_ic_type[MAX_CHIP_TYPE] : _chip_type_to_odm_ic_type[(chip_type)])
 
@@ -106,6 +109,9 @@ typedef enum _HW_VARIABLES {
 	HW_VAR_LPS_POFF_SET_MODE,
 	HW_VAR_LPS_POFF_WOW_EN,
 #endif
+#ifdef CONFIG_LPS_PG
+	HW_VAR_LPS_PG_HANDLE,
+#endif
 	HW_VAR_TRIGGER_GPIO_0,
 	HW_VAR_BT_SET_COEXIST,
 	HW_VAR_BT_ISSUE_DELBA,
@@ -174,6 +180,11 @@ typedef enum _HW_VARIABLES {
 	HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO,
 	HW_VAR_CH_SW_IQK_INFO_BACKUP,
 	HW_VAR_CH_SW_IQK_INFO_RESTORE,
+
+	HW_VAR_DBI,
+	HW_VAR_MDIO,
+	HW_VAR_L1OFF_CAPABILITY,
+	HW_VAR_L1OFF_NIC_SUPPORT,
 #ifdef CONFIG_TDLS
 	HW_VAR_TDLS_WRCR,
 	HW_VAR_TDLS_RS_RCR,
@@ -253,12 +264,23 @@ typedef s32(*c2h_id_filter)(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *paylo
 
 struct txpwr_idx_comp;
 
+struct macid_cfg {
+	u8 mac_id;
+	u8 rate_id;
+	u8 bandwidth;
+	u8 short_gi;
+	u8 ignore_bw;
+	u8 rsvd;
+	u16 rsvd1;
+	u64 ra_mask;
+};
+
 struct hal_ops {
 	/*** initialize section ***/
 	void	(*read_chip_version)(_adapter *padapter);
 	void	(*init_default_value)(_adapter *padapter);
 	void	(*intf_chip_configure)(_adapter *padapter);
-	void	(*read_adapter_info)(_adapter *padapter);
+	u8	(*read_adapter_info)(_adapter *padapter);
 	u32(*hal_power_on)(_adapter *padapter);
 	void	(*hal_power_off)(_adapter *padapter);
 	u32(*hal_init)(_adapter *padapter);
@@ -339,7 +361,7 @@ struct hal_ops {
 	void	(*GetHalODMVarHandler)(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, PVOID pValue2);
 	void	(*SetHalODMVarHandler)(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, BOOLEAN bSet);
 
-	void	(*UpdateRAMaskHandler)(_adapter *padapter, struct sta_info *psta, u32 mac_id, u8 rssi_level);
+	void	(*update_ra_mask_handler)(_adapter *padapter, struct sta_info *psta, struct macid_cfg *h2c_macid_cfg);
 	void	(*SetBeaconRelatedRegistersHandler)(_adapter *padapter);
 
 	u8(*interface_ps_func)(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val);
@@ -383,10 +405,14 @@ struct hal_ops {
 #else
 	s32(*c2h_handler)(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload);
 #endif
+	void (*reqtxrpt)(_adapter *padapter, u8 macid);
 	s32(*fill_h2c_cmd)(PADAPTER, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer);
 	void (*fill_fake_txdesc)(PADAPTER, u8 *pDesc, u32 BufferLen,
 				 u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame);
 	s32(*fw_dl)(_adapter *adapter, u8 wowlan);
+#ifdef RTW_HALMAC
+	s32 (*fw_mem_dl)(_adapter *adapter, enum fw_mem mem);
+#endif
 
 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_PCI_HCI)
 	void (*clear_interrupt)(_adapter *padapter);
@@ -403,6 +429,11 @@ struct hal_ops {
 	u8(*init_mac_register)(PADAPTER);
 	u8(*init_phy)(PADAPTER);
 #endif /* RTW_HALMAC */
+
+#ifdef CONFIG_PCI_HCI
+	void (*hal_set_l1ssbackdoor_handler)(_adapter *padapter, u8 enable);
+#endif
+
 };
 
 typedef	enum _RT_EEPROM_TYPE {
@@ -600,7 +631,7 @@ void rtw_hal_set_hwreg(PADAPTER padapter, u8 variable, u8 *val);
 void rtw_hal_get_hwreg(PADAPTER padapter, u8 variable, u8 *val);
 
 void rtw_hal_chip_configure(_adapter *padapter);
-void rtw_hal_read_chip_info(_adapter *padapter);
+u8 rtw_hal_read_chip_info(_adapter *padapter);
 void rtw_hal_read_chip_version(_adapter *padapter);
 
 u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue);
@@ -621,6 +652,12 @@ u8 rtw_hal_check_ips_status(_adapter *padapter);
 
 #if defined(CONFIG_PCI_HCI)
 	void	rtw_hal_irp_reset(_adapter *padapter);
+void	rtw_hal_pci_dbi_write(_adapter *padapter, u16 addr, u8 data);
+u8	rtw_hal_pci_dbi_read(_adapter *padapter, u16 addr);
+void	rtw_hal_pci_mdio_write(_adapter *padapter, u8 addr, u16 data);
+u16	rtw_hal_pci_mdio_read(_adapter *padapter, u8 addr);
+u8	rtw_hal_pci_l1off_nic_support(_adapter *padapter);
+u8	rtw_hal_pci_l1off_capability(_adapter *padapter);
 #endif
 
 u8	rtw_hal_intf_ps_func(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val);
@@ -635,8 +672,8 @@ void	rtw_hal_free_xmit_priv(_adapter *padapter);
 s32	rtw_hal_init_recv_priv(_adapter *padapter);
 void	rtw_hal_free_recv_priv(_adapter *padapter);
 
-void rtw_hal_update_ra_mask(struct sta_info *psta, u8 rssi_level);
-void rtw_update_ramask(_adapter *padapter, struct sta_info *psta, u32 mac_id, u8 rssi_level);
+void rtw_hal_update_ra_mask(struct sta_info *psta, u8 rssi_level, u8 is_update_bw);
+void rtw_update_ramask(_adapter *padapter, struct sta_info *psta, u32 mac_id, u8 rssi_level, u8 is_update_bw);
 
 void	rtw_hal_start_thread(_adapter *padapter);
 void	rtw_hal_stop_thread(_adapter *padapter);
@@ -648,6 +685,7 @@ void	rtw_hal_write_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data)
 u32	rtw_hal_read_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask);
 void	rtw_hal_write_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data);
 
+
 #define phy_query_bb_reg(Adapter, RegAddr, BitMask) rtw_hal_read_bbreg((Adapter), (RegAddr), (BitMask))
 #define phy_set_bb_reg(Adapter, RegAddr, BitMask, Data) rtw_hal_write_bbreg((Adapter), (RegAddr), (BitMask), (Data))
 #define phy_query_rf_reg(Adapter, eRFPath, RegAddr, BitMask) rtw_hal_read_rfreg((Adapter), (eRFPath), (RegAddr), (BitMask))
@@ -746,6 +784,7 @@ u8 rtw_hal_ops_check(_adapter *padapter);
 #ifdef RTW_HALMAC
 	u8 rtw_hal_init_mac_register(PADAPTER);
 	u8 rtw_hal_init_phy(PADAPTER);
+s32 rtw_hal_fw_mem_dl(_adapter *padapter, enum fw_mem mem);
 #endif /* RTW_HALMAC */
 
 #endif /* __HAL_INTF_H__ */
diff --git a/rtl8822BU/include/hal_pg.h b/rtl8822BU/include/hal_pg.h
index 5aaa1f3..c60f7fc 100755..100644
--- a/rtl8822BU/include/hal_pg.h
+++ b/rtl8822BU/include/hal_pg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef __HAL_PG_H__
 #define __HAL_PG_H__
@@ -429,12 +424,6 @@
  *	EEPROM/Efuse PG Offset for 8822B
  * ====================================================
  */
-#define GET_PG_KFREE_ON_8822B(_pg_m)		LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1)
-#define GET_PG_KFREE_THERMAL_K_ON_8822B(_pg_m)	LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1)
-
-#define PPG_BB_GAIN_2G_TXA_OFFSET_8822B		0xEE
-#define PPG_THERMAL_OFFSET_8822B		0xEF
-
 #define	EEPROM_TX_PWR_INX_8822B			0x10
 
 #define	EEPROM_ChannelPlan_8822B		0xB8
@@ -479,12 +468,6 @@
  *	EEPROM/Efuse PG Offset for 8821C
  * ====================================================
  */
-#define GET_PG_KFREE_ON_8821C(_pg_m)		LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1)
-#define GET_PG_KFREE_THERMAL_K_ON_8821C(_pg_m)	LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1)
-
-#define PPG_BB_GAIN_2G_TXA_OFFSET_8821C		0xEE
-#define PPG_THERMAL_OFFSET_8821C		0xEF
-
 #define	EEPROM_TX_PWR_INX_8821C			0x10
 
 #define	EEPROM_CHANNEL_PLAN_8821C		0xB8
diff --git a/rtl8822BU/include/hal_phy.h b/rtl8822BU/include/hal_phy.h
index af1dcad..2c3c321 100755..100644
--- a/rtl8822BU/include/hal_phy.h
+++ b/rtl8822BU/include/hal_phy.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __HAL_PHY_H__
 #define __HAL_PHY_H__
 
@@ -66,11 +61,6 @@ typedef	enum _RF_TYPE {
 	RF_TYPE_MAX
 } RF_TYPE_E, *PRF_TYPE_E;
 
-#define	TX_1S			0
-#define	TX_2S			1
-#define	TX_3S			2
-#define	TX_4S			3
-
 typedef enum _ANTENNA_PATH {
 	ANTENNA_NONE	= 0,
 	ANTENNA_D		= 1,
diff --git a/rtl8822BU/include/hal_phy_reg.h b/rtl8822BU/include/hal_phy_reg.h
index 9a92e40..6e6a99e 100755..100644
--- a/rtl8822BU/include/hal_phy_reg.h
+++ b/rtl8822BU/include/hal_phy_reg.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __HAL_PHY_REG_H__
 #define __HAL_PHY_REG_H__
 
diff --git a/rtl8822BU/include/hal_sdio.h b/rtl8822BU/include/hal_sdio.h
index 0a83372..3c22eb9 100755..100644
--- a/rtl8822BU/include/hal_sdio.h
+++ b/rtl8822BU/include/hal_sdio.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __HAL_SDIO_H_
 #define __HAL_SDIO_H_
 
diff --git a/rtl8822BU/include/ieee80211.h b/rtl8822BU/include/ieee80211.h
index d26a7f3..05a4c51 100755..100644
--- a/rtl8822BU/include/ieee80211.h
+++ b/rtl8822BU/include/ieee80211.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __IEEE80211_H
 #define __IEEE80211_H
 
@@ -1350,7 +1345,6 @@ struct ieee80211_txb {
 #define MAX_RATES_LENGTH                  ((u8)12)
 #define MAX_RATES_EX_LENGTH               ((u8)16)
 #define MAX_NETWORK_COUNT                  128
-#define MAX_CHANNEL_NUMBER                 161
 #define IEEE80211_SOFTMAC_SCAN_TIME	  400
 /* (HZ / 2) */
 #define IEEE80211_SOFTMAC_ASSOC_RETRY_TIME (HZ * 2)
@@ -1920,6 +1914,7 @@ void rtw_macaddr_cfg(u8 *out, const u8 *hw_mac_addr);
 
 u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI, unsigned char *MCS_rate);
 u8	rtw_ht_mcsset_to_nss(u8 *supp_mcs_set);
+u32	rtw_ht_mcs_set_to_bitmap(u8 *mcs_set, u8 nss);
 
 int rtw_action_frame_parse(const u8 *frame, u32 frame_len, u8 *category, u8 *action);
 const char *action_public_str(u8 action);
diff --git a/rtl8822BU/include/ieee80211_ext.h b/rtl8822BU/include/ieee80211_ext.h
index 03cc330..94a8e58 100755..100644
--- a/rtl8822BU/include/ieee80211_ext.h
+++ b/rtl8822BU/include/ieee80211_ext.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __IEEE80211_EXT_H
 #define __IEEE80211_EXT_H
 
diff --git a/rtl8822BU/include/if_ether.h b/rtl8822BU/include/if_ether.h
index 9d08f56..a3007c4 100755..100644
--- a/rtl8822BU/include/if_ether.h
+++ b/rtl8822BU/include/if_ether.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef _LINUX_IF_ETHER_H
 #define _LINUX_IF_ETHER_H
diff --git a/rtl8822BU/include/ip.h b/rtl8822BU/include/ip.h
index c78034d..4feb98f 100755..100644
--- a/rtl8822BU/include/ip.h
+++ b/rtl8822BU/include/ip.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _LINUX_IP_H
 #define _LINUX_IP_H
 
diff --git a/rtl8822BU/include/linux/wireless.h b/rtl8822BU/include/linux/wireless.h
index b4bb716..c7f4a6c 100755..100644
--- a/rtl8822BU/include/linux/wireless.h
+++ b/rtl8822BU/include/linux/wireless.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef _LINUX_WIRELESS_H
 #define _LINUX_WIRELESS_H
diff --git a/rtl8822BU/include/mlme_osdep.h b/rtl8822BU/include/mlme_osdep.h
index 8dcc589..291ecd2 100755..100644
--- a/rtl8822BU/include/mlme_osdep.h
+++ b/rtl8822BU/include/mlme_osdep.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef	__MLME_OSDEP_H_
 #define __MLME_OSDEP_H_
 
@@ -25,7 +20,6 @@
 	extern int time_after(u32 now, u32 old);
 #endif
 
-extern void rtw_init_mlme_timer(_adapter *padapter);
 extern void rtw_os_indicate_disconnect(_adapter *adapter, u16 reason, u8 locally_generated);
 extern void rtw_os_indicate_connect(_adapter *adapter);
 void rtw_os_indicate_scan_done(_adapter *padapter, bool aborted);
diff --git a/rtl8822BU/include/mp_custom_oid.h b/rtl8822BU/include/mp_custom_oid.h
index 7ca76ad..8ed1441 100755..100644
--- a/rtl8822BU/include/mp_custom_oid.h
+++ b/rtl8822BU/include/mp_custom_oid.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef	__CUSTOM_OID_H
 #define __CUSTOM_OID_H
 
diff --git a/rtl8822BU/include/nic_spec.h b/rtl8822BU/include/nic_spec.h
index c0a952f..913ef9b 100755..100644
--- a/rtl8822BU/include/nic_spec.h
+++ b/rtl8822BU/include/nic_spec.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 
 #ifndef __NIC_SPEC_H__
diff --git a/rtl8822BU/include/osdep_intf.h b/rtl8822BU/include/osdep_intf.h
index a73ed28..7be0880 100755..100644
--- a/rtl8822BU/include/osdep_intf.h
+++ b/rtl8822BU/include/osdep_intf.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef __OSDEP_INTF_H_
 #define __OSDEP_INTF_H_
@@ -114,8 +109,9 @@ int rtw_init_netdev_name(struct net_device *pnetdev, const char *ifname);
 struct net_device *rtw_init_netdev(_adapter *padapter);
 
 void rtw_os_ndev_free(_adapter *adapter);
-int rtw_os_ndev_init(_adapter *adapter, char *name);
+int rtw_os_ndev_init(_adapter *adapter, const char *name);
 void rtw_os_ndev_deinit(_adapter *adapter);
+void rtw_os_ndev_unregister(_adapter *adapter);
 void rtw_os_ndevs_unregister(struct dvobj_priv *dvobj);
 int rtw_os_ndevs_init(struct dvobj_priv *dvobj);
 void rtw_os_ndevs_deinit(struct dvobj_priv *dvobj);
@@ -126,6 +122,8 @@ u16 rtw_recv_select_queue(struct sk_buff *skb);
 
 int rtw_ndev_notifier_register(void);
 void rtw_ndev_notifier_unregister(void);
+void rtw_inetaddr_notifier_register(void);
+void rtw_inetaddr_notifier_unregister(void);
 
 #include "../os_dep/linux/rtw_proc.h"
 
@@ -133,6 +131,9 @@ void rtw_ndev_notifier_unregister(void);
 	#include "../os_dep/linux/ioctl_cfg80211.h"
 #endif /* CONFIG_IOCTL_CFG80211 */
 
+u8 rtw_rtnl_lock_needed(struct dvobj_priv *dvobj);
+void rtw_set_rtnl_lock_holder(struct dvobj_priv *dvobj, _thread_hdl_ thd_hdl);
+
 #endif /* PLATFORM_LINUX */
 
 
@@ -156,9 +157,8 @@ void rtw_drv_free_vir_ifaces(struct dvobj_priv *dvobj);
 #endif
 
 void rtw_ndev_destructor(_nic_hdl ndev);
-
 #ifdef CONFIG_ARP_KEEP_ALIVE
-int	rtw_gw_addr_query(_adapter *padapter);
+int rtw_gw_addr_query(_adapter *padapter);
 #endif
 
 int rtw_suspend_common(_adapter *padapter);
diff --git a/rtl8822BU/include/osdep_service.h b/rtl8822BU/include/osdep_service.h
index bc329f9..02b6aed 100755..100644
--- a/rtl8822BU/include/osdep_service.h
+++ b/rtl8822BU/include/osdep_service.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __OSDEP_SERVICE_H_
 #define __OSDEP_SERVICE_H_
 
@@ -28,6 +23,7 @@
 #define RTW_RFRAME_PKT_UNAVAIL	4
 #define RTW_RBUF_UNAVAIL		5
 #define RTW_RBUF_PKT_UNAVAIL	6
+#define RTW_SDIO_READ_PORT_FAIL	7
 
 /* #define RTW_STATUS_TIMEDOUT -110 */
 
@@ -54,9 +50,6 @@
 	#include <osdep_service_ce.h>
 #endif
 
-#define RTW_TIMER_HDL_NAME(name) rtw_##name##_timer_hdl
-#define RTW_DECLARE_TIMER_HDL(name) void RTW_TIMER_HDL_NAME(name)(RTW_TIMER_HDL_ARGS)
-
 /* #include <rtw_byteorder.h> */
 
 #ifndef BIT
@@ -344,39 +337,54 @@ extern void	rtw_udelay_os(int us);
 extern void rtw_yield_os(void);
 
 
-extern void rtw_init_timer(_timer *ptimer, void *padapter, void *pfunc);
+extern void rtw_init_timer(_timer *ptimer, void *padapter, void *pfunc, void *ctx);
 
 
 __inline static unsigned char _cancel_timer_ex(_timer *ptimer)
 {
-#ifdef PLATFORM_LINUX
-	return del_timer_sync(ptimer);
-#endif
-#ifdef PLATFORM_FREEBSD
-	_cancel_timer(ptimer, 0);
-	return 0;
-#endif
-#ifdef PLATFORM_WINDOWS
 	u8 bcancelled;
 
 	_cancel_timer(ptimer, &bcancelled);
 
 	return bcancelled;
-#endif
 }
 
 static __inline void thread_enter(char *name)
 {
 #ifdef PLATFORM_LINUX
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0))
-	daemonize("%s", name);
-#endif
 	allow_signal(SIGTERM);
 #endif
 #ifdef PLATFORM_FREEBSD
 	printf("%s", "RTKTHREAD_enter");
 #endif
 }
+void thread_exit(_completion *comp);
+void _rtw_init_completion(_completion *comp);
+void _rtw_wait_for_comp_timeout(_completion *comp);
+void _rtw_wait_for_comp(_completion *comp);
+
+static inline bool rtw_thread_stop(_thread_hdl_ th)
+{
+#ifdef PLATFORM_LINUX
+	return kthread_stop(th);
+#endif
+}
+static inline void rtw_thread_wait_stop(void)
+{
+#ifdef PLATFORM_LINUX
+	#if 0
+	while (!kthread_should_stop())
+		rtw_msleep_os(10);
+	#else
+	set_current_state(TASK_INTERRUPTIBLE);
+	while (!kthread_should_stop()) {
+		schedule();
+		set_current_state(TASK_INTERRUPTIBLE);
+	}
+	__set_current_state(TASK_RUNNING);
+	#endif
+#endif
+}
 
 __inline static void flush_signals_thread(void)
 {
@@ -434,6 +442,11 @@ __inline static int rtw_bug_check(void *parg1, void *parg2, void *parg3, void *p
 	return ret;
 
 }
+#ifdef PLATFORM_LINUX
+#define RTW_DIV_ROUND_UP(n, d)	DIV_ROUND_UP(n, d)
+#else /* !PLATFORM_LINUX */
+#define RTW_DIV_ROUND_UP(n, d)	(((n) + (d - 1)) / d)
+#endif /* !PLATFORM_LINUX */
 
 #define _RND(sz, r) ((((sz)+((r)-1))/(r))*(r))
 #define RND4(x)	(((x >> 2) + (((x & 3) == 0) ? 0 : 1)) << 2)
@@ -681,6 +694,7 @@ u8 map_read8(const struct map_t *map, u16 offset);
 /* String handler */
 
 BOOLEAN is_null(char c);
+BOOLEAN is_all_null(char *c, int len);
 BOOLEAN is_eol(char c);
 BOOLEAN is_space(char c);
 BOOLEAN IsHexDigit(char chTmp);
diff --git a/rtl8822BU/include/osdep_service_bsd.h b/rtl8822BU/include/osdep_service_bsd.h
index b56ccbb..f4ce7f8 100755..100644
--- a/rtl8822BU/include/osdep_service_bsd.h
+++ b/rtl8822BU/include/osdep_service_bsd.h
@@ -1,22 +1,17 @@
-/******************************************************************************

- *

- * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved.

- *                                        

- * This program is free software; you can redistribute it and/or modify it

- * under the terms of version 2 of the GNU General Public License as

- * published by the Free Software Foundation.

- *

- * This program is distributed in the hope that it will be useful, but WITHOUT

- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for

- * more details.

- *

- * You should have received a copy of the GNU General Public License along with

- * this program; if not, write to the Free Software Foundation, Inc.,

- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA

- *

- *

- ******************************************************************************/

+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef __OSDEP_BSD_SERVICE_H_

 #define __OSDEP_BSD_SERVICE_H_

 

@@ -107,10 +102,6 @@
 	typedef void		thread_return;

 	typedef void*	thread_context;

 

-	//#define thread_exit() complete_and_exit(NULL, 0)

-

-	#define thread_exit() do{printf("%s", "RTKTHREAD_exit");}while(0)

-

 	typedef void timer_hdl_return;

 	typedef void* timer_hdl_context;

 	typedef struct work_struct _workitem;

@@ -139,16 +130,11 @@
  *

  */

 struct timer_list {

+	struct callout callout;
+	void (*function)(void *);
+	void *arg;
+};
 

-        /* FreeBSD callout related fields */

-        struct callout callout;

-

- 	//timeout function

-        void (*function)(void*);

-	//argument

-	 void *arg;

-        

-};

 struct workqueue_struct;

 struct work_struct;

 typedef void (*work_func_t)(struct work_struct *work);

@@ -674,30 +660,52 @@ __inline static void rtw_list_delete(_list *plist)
 	INIT_LIST_HEAD(plist);

 }

 

-__inline static void _init_timer(_timer *ptimer,_nic_hdl padapter,void *pfunc,void* cntx)

-{

-	ptimer->function = pfunc;

-	ptimer->arg = cntx;

-	callout_init(&ptimer->callout, CALLOUT_MPSAFE);

-}

-

+static inline void timer_hdl(void *ctx)
+{
+	_timer *timer = (_timer *)ctx;
+
+	rtw_mtx_lock(NULL);
+	if (callout_pending(&timer->callout)) {
+		/* callout was reset */
+		rtw_mtx_unlock(NULL);
+		return;
+	}
+
+	if (!callout_active(&timer->callout)) {
+		/* callout was stopped */
+		rtw_mtx_unlock(NULL);
+		return;
+	}
+
+	callout_deactivate(&timer->callout);
+
+	timer->function(timer->arg);
+
+	rtw_mtx_unlock(NULL);
+}
+
+static inline void _init_timer(_timer *ptimer, _nic_hdl padapter, void *pfunc, void *cntx)
+{
+	ptimer->function = pfunc;
+	ptimer->arg = cntx;
+	callout_init(&ptimer->callout, CALLOUT_MPSAFE);
+}
+
 __inline static void _set_timer(_timer *ptimer,u32 delay_time)

 {	

-	//	mod_timer(ptimer , (jiffies+(delay_time*HZ/1000)));

-	if(ptimer->function && ptimer->arg){

+	if (ptimer->function && ptimer->arg) {
 		rtw_mtx_lock(NULL);

-		callout_reset(&ptimer->callout, delay_time,ptimer->function, ptimer->arg);

+		callout_reset(&ptimer->callout, delay_time, timer_hdl, ptimer);
 		rtw_mtx_unlock(NULL);

 	}

 }

 

 __inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled)

 {

-	//	del_timer_sync(ptimer); 	

-	//	*bcancelled=  _TRUE;//TRUE ==1; FALSE==0	

 	rtw_mtx_lock(NULL);

 	callout_drain(&ptimer->callout);

 	rtw_mtx_unlock(NULL);

+	*bcancelled = 1; /* assume an pending timer to be canceled */
 }

 

 __inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx)

diff --git a/rtl8822BU/include/osdep_service_ce.h b/rtl8822BU/include/osdep_service_ce.h
index 04c5b18..bc920c0 100755..100644
--- a/rtl8822BU/include/osdep_service_ce.h
+++ b/rtl8822BU/include/osdep_service_ce.h
@@ -1,7 +1,7 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *                                        
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
  * published by the Free Software Foundation.
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/

+ *****************************************************************************/
 

 #ifndef __OSDEP_CE_SERVICE_H_

 #define __OSDEP_CE_SERVICE_H_

@@ -45,8 +40,11 @@ typedef u32	_irqL;
 

 typedef NDIS_HANDLE  _nic_hdl;

 

-

-typedef NDIS_MINIPORT_TIMER    _timer;

+struct timer_list {
+	NDIS_MINIPORT_TIMER ndis_timer;
+	void (*function)(void *);
+	void *arg;
+};
 

 struct	__queue	{

 	LIST_ENTRY	queue;

@@ -62,8 +60,7 @@ typedef DWORD thread_return;
 typedef void*	thread_context;

 typedef NDIS_WORK_ITEM _workitem;

 

-#define thread_exit() ExitThread(STATUS_SUCCESS); return 0;

-

+
 

 #define SEMA_UPBND	(0x7FFFFFFF)   //8192

 

@@ -122,22 +119,33 @@ __inline static void rtw_list_delete(_list *plist)
 	InitializeListHead(plist);

 }

 

-#define RTW_TIMER_HDL_ARGS IN PVOID SystemSpecific1, IN PVOID FunctionContext, IN PVOID SystemSpecific2, IN PVOID SystemSpecific3

-

-__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx)

-{

-	NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx);

-}

-

-__inline static void _set_timer(_timer *ptimer,u32 delay_time)

-{

- 	NdisMSetTimer(ptimer,delay_time);

-}

-

-__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled)

-{

-	NdisMCancelTimer(ptimer,bcancelled);

-}

+static inline void timer_hdl(
+	IN PVOID SystemSpecific1,
+	IN PVOID FunctionContext,
+	IN PVOID SystemSpecific2,
+	IN PVOID SystemSpecific3)
+{
+	_timer *timer = (_timer *)FunctionContext;
+
+	timer->function(timer->arg);
+}
+
+static inline void _init_timer(_timer *ptimer, _nic_hdl nic_hdl, void *pfunc, void *cntx)
+{
+	ptimer->function = pfunc;
+	ptimer->arg = cntx;
+	NdisMInitializeTimer(&ptimer->ndis_timer, nic_hdl, timer_hdl, ptimer);
+}
+
+static inline void _set_timer(_timer *ptimer, u32 delay_time)
+{
+	NdisMSetTimer(ptimer, delay_time);
+}
+
+static inline void _cancel_timer(_timer *ptimer, u8 *bcancelled)
+{
+	NdisMCancelTimer(ptimer, bcancelled);
+}
 

 __inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx)

 {

diff --git a/rtl8822BU/include/osdep_service_linux.h b/rtl8822BU/include/osdep_service_linux.h
index 7665988..84e49fc 100755..100644
--- a/rtl8822BU/include/osdep_service_linux.h
+++ b/rtl8822BU/include/osdep_service_linux.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __OSDEP_LINUX_SERVICE_H_
 #define __OSDEP_LINUX_SERVICE_H_
 
@@ -33,6 +28,7 @@
 #endif
 /* #include <linux/smp_lock.h> */
 #include <linux/netdevice.h>
+#include <linux/inetdevice.h>
 #include <linux/skbuff.h>
 #include <linux/circ_buf.h>
 #include <asm/uaccess.h>
@@ -49,6 +45,7 @@
 #include <linux/etherdevice.h>
 #include <linux/wireless.h>
 #include <net/iw_handler.h>
+#include <net/addrconf.h>
 #include <linux/if_arp.h>
 #include <linux/rtnetlink.h>
 #include <linux/delay.h>
@@ -149,6 +146,7 @@ typedef	spinlock_t	_lock;
 	typedef struct semaphore	_mutex;
 #endif
 typedef struct timer_list _timer;
+typedef struct completion _completion;
 
 struct	__queue	{
 	struct	list_head	queue;
@@ -169,8 +167,6 @@ typedef void		*_thread_hdl_;
 typedef int		thread_return;
 typedef void	*thread_context;
 
-#define thread_exit() complete_and_exit(NULL, 0)
-
 typedef void timer_hdl_return;
 typedef void *timer_hdl_context;
 
@@ -279,8 +275,6 @@ __inline static void rtw_list_delete(_list *plist)
 	list_del_init(plist);
 }
 
-#define RTW_TIMER_HDL_ARGS void *FunctionContext
-
 __inline static void _init_timer(_timer *ptimer, _nic_hdl nic_hdl, void *pfunc, void *cntx)
 {
 	/* setup_timer(ptimer, pfunc,(u32)cntx);	 */
@@ -296,11 +290,9 @@ __inline static void _set_timer(_timer *ptimer, u32 delay_time)
 
 __inline static void _cancel_timer(_timer *ptimer, u8 *bcancelled)
 {
-	del_timer_sync(ptimer);
-	*bcancelled = 1;
+	*bcancelled = del_timer_sync(ptimer) == 1 ? 1 : 0;
 }
 
-
 static inline void _init_workitem(_workitem *pwork, void *pfunc, void *cntx)
 {
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20))
@@ -425,11 +417,11 @@ static inline int rtw_merge_string(char *dst, int dst_len, const char *src1, con
 #define NDEV_FMT "%s"
 #define NDEV_ARG(ndev) ndev->name
 #define ADPT_FMT "%s"
-#define ADPT_ARG(adapter) adapter->pnetdev->name
+#define ADPT_ARG(adapter) (adapter->pnetdev ? adapter->pnetdev->name : NULL)
 #define FUNC_NDEV_FMT "%s(%s)"
 #define FUNC_NDEV_ARG(ndev) __func__, ndev->name
 #define FUNC_ADPT_FMT "%s(%s)"
-#define FUNC_ADPT_ARG(adapter) __func__, adapter->pnetdev->name
+#define FUNC_ADPT_ARG(adapter) __func__, (adapter->pnetdev ? adapter->pnetdev->name : NULL)
 
 struct rtw_netdev_priv_indicator {
 	void *priv;
diff --git a/rtl8822BU/include/osdep_service_xp.h b/rtl8822BU/include/osdep_service_xp.h
index 45d54af..fdbdb50 100755..100644
--- a/rtl8822BU/include/osdep_service_xp.h
+++ b/rtl8822BU/include/osdep_service_xp.h
@@ -1,22 +1,17 @@
-/******************************************************************************

- *

- * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved.

- *                                        

- * This program is free software; you can redistribute it and/or modify it

- * under the terms of version 2 of the GNU General Public License as

- * published by the Free Software Foundation.

- *

- * This program is distributed in the hope that it will be useful, but WITHOUT

- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for

- * more details.

- *

- * You should have received a copy of the GNU General Public License along with

- * this program; if not, write to the Free Software Foundation, Inc.,

- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA

- *

- *

- ******************************************************************************/

+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef __OSDEP_LINUX_SERVICE_H_

 #define __OSDEP_LINUX_SERVICE_H_

 

@@ -45,8 +40,11 @@
 	// USB_PIPE for WINCE , but handle can be use just integer under windows

 	typedef NDIS_HANDLE  _nic_hdl;

 

-

-	typedef NDIS_MINIPORT_TIMER    _timer;

+	struct timer_list {
+		NDIS_MINIPORT_TIMER ndis_timer;
+		void (*function)(void *);
+		void *arg;
+	};
 

 	struct	__queue	{

 		LIST_ENTRY	queue;	

@@ -63,7 +61,6 @@
 

 	typedef NDIS_WORK_ITEM _workitem;

 

-	#define thread_exit() PsTerminateSystemThread(STATUS_SUCCESS);

 

 	#define HZ			10000000

 	#define SEMA_UPBND	(0x7FFFFFFF)   //8192

@@ -131,22 +128,33 @@ __inline static void rtw_list_delete(_list *plist)
 	InitializeListHead(plist);	

 }

 

-#define RTW_TIMER_HDL_ARGS IN PVOID SystemSpecific1, IN PVOID FunctionContext, IN PVOID SystemSpecific2, IN PVOID SystemSpecific3

-

-__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx)

-{

-	NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx);

-}

-

-__inline static void _set_timer(_timer *ptimer,u32 delay_time)

-{	

- 	NdisMSetTimer(ptimer,delay_time);	

-}

-

-__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled)

-{

-	NdisMCancelTimer(ptimer,bcancelled);

-}

+static inline void timer_hdl(
+	IN PVOID SystemSpecific1,
+	IN PVOID FunctionContext,
+	IN PVOID SystemSpecific2,
+	IN PVOID SystemSpecific3)
+{
+	_timer *timer = (_timer *)FunctionContext;
+
+	timer->function(timer->arg);
+}
+
+static inline void _init_timer(_timer *ptimer, _nic_hdl nic_hdl, void *pfunc, void *cntx)
+{
+	ptimer->function = pfunc;
+	ptimer->arg = cntx;
+	NdisMInitializeTimer(&ptimer->ndis_timer, nic_hdl, timer_hdl, ptimer);
+}
+
+static inline void _set_timer(_timer *ptimer, u32 delay_time)
+{
+	NdisMSetTimer(ptimer, delay_time);
+}
+
+static inline void _cancel_timer(_timer *ptimer, u8 *bcancelled)
+{
+	NdisMCancelTimer(ptimer, bcancelled);
+}
 

 __inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx)

 {

diff --git a/rtl8822BU/include/pci_hal.h b/rtl8822BU/include/pci_hal.h
index 8aa1a56..16eac21 100755..100644
--- a/rtl8822BU/include/pci_hal.h
+++ b/rtl8822BU/include/pci_hal.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __PCI_HAL_H__
 #define __PCI_HAL_H__
 
diff --git a/rtl8822BU/include/pci_ops.h b/rtl8822BU/include/pci_ops.h
index bef8237..f195f5b 100755..100644
--- a/rtl8822BU/include/pci_ops.h
+++ b/rtl8822BU/include/pci_ops.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __PCI_OPS_H_
 #define __PCI_OPS_H_
 
@@ -89,4 +84,8 @@
 	void rtl8822be_set_intf_ops(struct _io_ops *pops);
 #endif
 
+#ifdef CONFIG_RTL8821C
+	void rtl8821ce_set_intf_ops(struct _io_ops *pops);
+#endif
+
 #endif
diff --git a/rtl8822BU/include/pci_osintf.h b/rtl8822BU/include/pci_osintf.h
index 3339352..29143ca 100755..100644
--- a/rtl8822BU/include/pci_osintf.h
+++ b/rtl8822BU/include/pci_osintf.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __PCI_OSINTF_H
 #define __PCI_OSINTF_H
 
@@ -33,9 +28,18 @@
 #define PCIE_TRANSLATE_OFFSET	0x104 /* translate offset from CTRL_START */
 #endif
 
+#define PCI_BC_CLK_REQ		BIT0
+#define PCI_BC_ASPM_L0s		BIT1
+#define PCI_BC_ASPM_L1		BIT2
+#define PCI_BC_ASPM_L1Off	BIT3
+//#define PCI_BC_ASPM_LTR	BIT4
+//#define PCI_BC_ASPM_OBFF	BIT5
+
 void	rtw_pci_disable_aspm(_adapter *padapter);
 void	rtw_pci_enable_aspm(_adapter *padapter);
 void	PlatformClearPciPMEStatus(PADAPTER Adapter);
+void	rtw_pci_aspm_config(_adapter *padapter);
+void	rtw_pci_aspm_config_l1off_general(_adapter *padapter, u8 eanble);
 #ifdef CONFIG_64BIT_DMA
 	u8	PlatformEnableDMA64(PADAPTER Adapter);
 #endif
diff --git a/rtl8822BU/include/recv_osdep.h b/rtl8822BU/include/recv_osdep.h
index 6cb9184..7715442 100755..100644
--- a/rtl8822BU/include/recv_osdep.h
+++ b/rtl8822BU/include/recv_osdep.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RECV_OSDEP_H_
 #define __RECV_OSDEP_H_
 
@@ -55,8 +50,6 @@ void rtw_os_recv_indicate_pkt(_adapter *padapter, _pkt *pkt, struct rx_pkt_attri
 
 void rtw_os_read_port(_adapter *padapter, struct recv_buf *precvbuf);
 
-void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl);
-
 #ifdef PLATFORM_LINUX
 #ifdef CONFIG_RTW_NAPI
 #include <linux/netdevice.h>	/* struct napi_struct */
diff --git a/rtl8822BU/include/rtl8188e_cmd.h b/rtl8822BU/include/rtl8188e_cmd.h
index a3d6e01..e9f252b 100755..100644
--- a/rtl8822BU/include/rtl8188e_cmd.h
+++ b/rtl8822BU/include/rtl8188e_cmd.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8188E_CMD_H__
 #define __RTL8188E_CMD_H__
 
diff --git a/rtl8822BU/include/rtl8188e_dm.h b/rtl8822BU/include/rtl8188e_dm.h
index a4c2527..501d3a9 100755..100644
--- a/rtl8822BU/include/rtl8188e_dm.h
+++ b/rtl8822BU/include/rtl8188e_dm.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8188E_DM_H__
 #define __RTL8188E_DM_H__
 
diff --git a/rtl8822BU/include/rtl8188e_hal.h b/rtl8822BU/include/rtl8188e_hal.h
index 824836d..4c8ef93 100755..100644
--- a/rtl8822BU/include/rtl8188e_hal.h
+++ b/rtl8822BU/include/rtl8188e_hal.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8188E_HAL_H__
 #define __RTL8188E_HAL_H__
 
diff --git a/rtl8822BU/include/rtl8188e_led.h b/rtl8822BU/include/rtl8188e_led.h
index 8d0feee..d3e7f0b 100755..100644
--- a/rtl8822BU/include/rtl8188e_led.h
+++ b/rtl8822BU/include/rtl8188e_led.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8188E_LED_H__
 #define __RTL8188E_LED_H__
 
diff --git a/rtl8822BU/include/rtl8188e_recv.h b/rtl8822BU/include/rtl8188e_recv.h
index 2f574a8..dc79cbc 100755..100644
--- a/rtl8822BU/include/rtl8188e_recv.h
+++ b/rtl8822BU/include/rtl8188e_recv.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8188E_RECV_H__
 #define __RTL8188E_RECV_H__
 
diff --git a/rtl8822BU/include/rtl8188e_rf.h b/rtl8822BU/include/rtl8188e_rf.h
index 6588126..e7f9750 100755..100644
--- a/rtl8822BU/include/rtl8188e_rf.h
+++ b/rtl8822BU/include/rtl8188e_rf.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8188E_RF_H__
 #define __RTL8188E_RF_H__
 
diff --git a/rtl8822BU/include/rtl8188e_spec.h b/rtl8822BU/include/rtl8188e_spec.h
index c7698a6..9691f51 100755..100644
--- a/rtl8822BU/include/rtl8188e_spec.h
+++ b/rtl8822BU/include/rtl8188e_spec.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,11 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8188E_SPEC_H__
 #define __RTL8188E_SPEC_H__
 
@@ -47,6 +43,15 @@
 #define REG_HISR_88E					0x00B4 /* RTL8188E */
 #define REG_HIMRE_88E					0x00B8 /* RTL8188E */
 #define REG_HISRE_88E					0x00BC /* RTL8188E */
+
+#define	REG_DBI_WDATA_8188E				0x0348	/* DBI Write data */
+#define	REG_DBI_RDATA_8188E				0x034C	/* DBI Read data */
+#define	REG_DBI_ADDR_8188E				0x0350	/* DBI Address */
+#define	REG_DBI_FLAG_8188E				0x0352	/* DBI Read/Write Flag */
+#define	REG_MDIO_WDATA_8188E				0x0354	/* MDIO for Write PCIE PHY */
+#define	REG_MDIO_RDATA_8188E				0x0356	/* MDIO for Reads PCIE PHY */
+#define	REG_MDIO_CTL_8188E				0x0358	/* MDIO for Control */
+
 #define REG_MACID_NO_LINK_0			0x0484
 #define REG_MACID_NO_LINK_1			0x0488
 #define REG_MACID_PAUSE_0			0x048c
@@ -142,19 +147,6 @@
 	#define RT_AC_INT_MASKS	(IMR_VIDOK_88E | IMR_VODOK_88E | IMR_BEDOK_88E | IMR_BKDOK_88E)
 #endif
 
-
-/* ********************************************************
- * General definitions
- * ******************************************************** */
-
-#define MACID_NUM_88E 64
-#define SEC_CAM_ENT_NUM_88E 32
-#define HW_PORT_NUM_88E	2
-#define NSS_NUM_88E 1
-#define BAND_CAP_88E (BAND_CAP_2G)
-#define BW_CAP_88E (BW_CAP_20M | BW_CAP_40M)
-#define PROTO_CAP_88E (PROTO_CAP_11B | PROTO_CAP_11G | PROTO_CAP_11N)
-
 /* ----------------------------------------------------------------------------
  * 8192C EEPROM/EFUSE share register definition.
  * ---------------------------------------------------------------------------- */
diff --git a/rtl8822BU/include/rtl8188e_sreset.h b/rtl8822BU/include/rtl8188e_sreset.h
index d0214ac..f4ec2d8 100755..100644
--- a/rtl8822BU/include/rtl8188e_sreset.h
+++ b/rtl8822BU/include/rtl8188e_sreset.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTL8188E_SRESET_H_
 #define _RTL8188E_SRESET_H_
 
diff --git a/rtl8822BU/include/rtl8188e_xmit.h b/rtl8822BU/include/rtl8188e_xmit.h
index c04a66c..f625576 100755..100644
--- a/rtl8822BU/include/rtl8188e_xmit.h
+++ b/rtl8822BU/include/rtl8188e_xmit.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8188E_XMIT_H__
 #define __RTL8188E_XMIT_H__
 
diff --git a/rtl8822BU/include/rtl8188f_cmd.h b/rtl8822BU/include/rtl8188f_cmd.h
index 6536503..16e0a96 100755..100644
--- a/rtl8822BU/include/rtl8188f_cmd.h
+++ b/rtl8822BU/include/rtl8188f_cmd.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8188F_CMD_H__
 #define __RTL8188F_CMD_H__
 
@@ -187,7 +182,7 @@ void rtl8188f_set_rssi_cmd(PADAPTER padapter, u8 *param);
 void rtl8188f_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack);
 /* s32 rtl8188f_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */
 void rtl8188f_set_FwPsTuneParam_cmd(PADAPTER padapter);
-void rtl8188f_set_FwMacIdConfig_cmd(_adapter *padapter, u8 mac_id, u8 raid, u8 bw, u8 sgi, u32 mask);
+void rtl8188f_set_FwMacIdConfig_cmd(_adapter *padapter, u8 mac_id, u8 raid, u8 bw, u8 sgi, u32 mask, u8 ignore_bw);
 void rtl8188f_set_FwBtMpOper_cmd(PADAPTER padapter, u8 idx, u8 ver, u8 reqnum, u8 *param);
 void rtl8188f_download_rsvd_page(PADAPTER padapter, u8 mstatus);
 #ifdef CONFIG_BT_COEXIST
diff --git a/rtl8822BU/include/rtl8188f_dm.h b/rtl8822BU/include/rtl8188f_dm.h
index 78aeab0..4af0338 100755..100644
--- a/rtl8822BU/include/rtl8188f_dm.h
+++ b/rtl8822BU/include/rtl8188f_dm.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8188F_DM_H__
 #define __RTL8188F_DM_H__
 /* ************************************************************
diff --git a/rtl8822BU/include/rtl8188f_hal.h b/rtl8822BU/include/rtl8188f_hal.h
index 6160198..9f36709 100755..100644
--- a/rtl8822BU/include/rtl8188f_hal.h
+++ b/rtl8822BU/include/rtl8188f_hal.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8188F_HAL_H__
 #define __RTL8188F_HAL_H__
 
@@ -123,9 +118,11 @@ typedef struct _RT_8188F_FIRMWARE_HDR {
 #endif
 
 /* For WoWLan , more reserved page
- * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt:1 ,PNO: 6 */
+ * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt:1 ,PNO: 6
+ * NS offload:2 NDP info: 1
+ */
 #ifdef CONFIG_WOWLAN
-	#define WOWLAN_PAGE_NUM_8188F	0x08
+	#define WOWLAN_PAGE_NUM_8188F	0x0b
 #else
 	#define WOWLAN_PAGE_NUM_8188F	0x00
 #endif
@@ -160,7 +157,7 @@ typedef struct _RT_8188F_FIRMWARE_HDR {
 #include "HalVerDef.h"
 #include "hal_com.h"
 
-#define EFUSE_OOB_PROTECT_BYTES (18 + 1)
+#define EFUSE_OOB_PROTECT_BYTES (34 + 1)
 
 #define HAL_EFUSE_MEMORY
 
diff --git a/rtl8822BU/include/rtl8188f_led.h b/rtl8822BU/include/rtl8188f_led.h
index 232ede5..ffd1971 100755..100644
--- a/rtl8822BU/include/rtl8188f_led.h
+++ b/rtl8822BU/include/rtl8188f_led.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8188F_LED_H__
 #define __RTL8188F_LED_H__
 
diff --git a/rtl8822BU/include/rtl8188f_recv.h b/rtl8822BU/include/rtl8188f_recv.h
index 8652fd6..6366b81 100755..100644
--- a/rtl8822BU/include/rtl8188f_recv.h
+++ b/rtl8822BU/include/rtl8188f_recv.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8188F_RECV_H__
 #define __RTL8188F_RECV_H__
 
diff --git a/rtl8822BU/include/rtl8188f_rf.h b/rtl8822BU/include/rtl8188f_rf.h
index 185d2d0..eef9337 100755..100644
--- a/rtl8822BU/include/rtl8188f_rf.h
+++ b/rtl8822BU/include/rtl8188f_rf.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8188F_RF_H__
 #define __RTL8188F_RF_H__
 
diff --git a/rtl8822BU/include/rtl8188f_spec.h b/rtl8822BU/include/rtl8188f_spec.h
index 049b256..6e99acf 100755..100644
--- a/rtl8822BU/include/rtl8188f_spec.h
+++ b/rtl8822BU/include/rtl8188f_spec.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,11 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8188F_SPEC_H__
 #define __RTL8188F_SPEC_H__
 
@@ -288,16 +284,4 @@
 #define RT_AC_INT_MASKS	(IMR_VIDOK_8188F | IMR_VODOK_8188F | IMR_BEDOK_8188F | IMR_BKDOK_8188F)
 #endif
 
-/* ********************************************************
- * General definitions
- * ******************************************************** */
-
-#define MACID_NUM_8188F 16
-#define SEC_CAM_ENT_NUM_8188F 16
-#define HW_PORT_NUM_8188F	2
-#define NSS_NUM_8188F 1
-#define BAND_CAP_8188F (BAND_CAP_2G)
-#define BW_CAP_8188F (BW_CAP_20M | BW_CAP_40M)
-#define PROTO_CAP_8188F (PROTO_CAP_11B | PROTO_CAP_11G | PROTO_CAP_11N)
-
 #endif /* __RTL8188F_SPEC_H__ */
diff --git a/rtl8822BU/include/rtl8188f_sreset.h b/rtl8822BU/include/rtl8188f_sreset.h
index ef5b0ff..fe56567 100755..100644
--- a/rtl8822BU/include/rtl8188f_sreset.h
+++ b/rtl8822BU/include/rtl8188f_sreset.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTL8188F_SRESET_H_
 #define _RTL8188F_SRESET_H_
 
diff --git a/rtl8822BU/include/rtl8188f_xmit.h b/rtl8822BU/include/rtl8188f_xmit.h
index be88ca4..069183d 100755..100644
--- a/rtl8822BU/include/rtl8188f_xmit.h
+++ b/rtl8822BU/include/rtl8188f_xmit.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8188F_XMIT_H__
 #define __RTL8188F_XMIT_H__
 
diff --git a/rtl8822BU/include/rtl8192e_cmd.h b/rtl8822BU/include/rtl8192e_cmd.h
index 78d476b..976bc29 100755..100644
--- a/rtl8822BU/include/rtl8192e_cmd.h
+++ b/rtl8822BU/include/rtl8192e_cmd.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8192E_CMD_H__
 #define __RTL8192E_CMD_H__
 
diff --git a/rtl8822BU/include/rtl8192e_dm.h b/rtl8822BU/include/rtl8192e_dm.h
index ff1b341..0f3d96d 100755..100644
--- a/rtl8822BU/include/rtl8192e_dm.h
+++ b/rtl8822BU/include/rtl8192e_dm.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8192E_DM_H__
 #define __RTL8192E_DM_H__
 
diff --git a/rtl8822BU/include/rtl8192e_hal.h b/rtl8822BU/include/rtl8192e_hal.h
index dc64a2b..6799210 100755..100644
--- a/rtl8822BU/include/rtl8192e_hal.h
+++ b/rtl8822BU/include/rtl8192e_hal.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8192E_HAL_H__
 #define __RTL8192E_HAL_H__
 
@@ -131,9 +126,11 @@ typedef struct _RT_FIRMWARE_8192E {
  * Beacon:2, PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1 */
 #define RSVD_PAGE_NUM_8192E		0x08
 /* For WoWLan , more reserved page
- * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt: 1,PNO: 6 */
+ * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt: 1,PNO: 6
+ * NS offload: 2 NDP info: 1
+ */
 #ifdef CONFIG_WOWLAN
-	#define WOWLAN_PAGE_NUM_8192E	0x08
+	#define WOWLAN_PAGE_NUM_8192E	0x0b
 #else
 	#define WOWLAN_PAGE_NUM_8192E	0x00
 #endif
diff --git a/rtl8822BU/include/rtl8192e_led.h b/rtl8822BU/include/rtl8192e_led.h
index d79bd91..ad8fd4d 100755..100644
--- a/rtl8822BU/include/rtl8192e_led.h
+++ b/rtl8822BU/include/rtl8192e_led.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8192E_LED_H__
 #define __RTL8192E_LED_H__
 
diff --git a/rtl8822BU/include/rtl8192e_recv.h b/rtl8822BU/include/rtl8192e_recv.h
index 34f081c..7d17b86 100755..100644
--- a/rtl8822BU/include/rtl8192e_recv.h
+++ b/rtl8822BU/include/rtl8192e_recv.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8192E_RECV_H__
 #define __RTL8192E_RECV_H__
 
diff --git a/rtl8822BU/include/rtl8192e_rf.h b/rtl8822BU/include/rtl8192e_rf.h
index cd344a4..6a4b9f6 100755..100644
--- a/rtl8822BU/include/rtl8192e_rf.h
+++ b/rtl8822BU/include/rtl8192e_rf.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8192E_RF_H__
 #define __RTL8192E_RF_H__
 
diff --git a/rtl8822BU/include/rtl8192e_spec.h b/rtl8822BU/include/rtl8192e_spec.h
index 1d6fff2..8af37a7 100755..100644
--- a/rtl8822BU/include/rtl8192e_spec.h
+++ b/rtl8822BU/include/rtl8192e_spec.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,11 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8192E_SPEC_H__
 #define __RTL8192E_SPEC_H__
 
@@ -314,16 +310,4 @@
 #define	AcmHw_ViqStatus_8192E			BIT(6)
 #define	AcmHw_BeqStatus_8192E			BIT(7)
 
-/* ********************************************************
- * General definitions
- * ******************************************************** */
-
-#define MACID_NUM_8192E 128
-#define SEC_CAM_ENT_NUM_8192E 64
-#define HW_PORT_NUM_8192E	2
-#define NSS_NUM_8192E 2
-#define BAND_CAP_8192E (BAND_CAP_2G)
-#define BW_CAP_8192E (BW_CAP_20M | BW_CAP_40M)
-#define PROTO_CAP_8192E (PROTO_CAP_11B | PROTO_CAP_11G | PROTO_CAP_11N)
-
 #endif /* __RTL8192E_SPEC_H__ */
diff --git a/rtl8822BU/include/rtl8192e_sreset.h b/rtl8822BU/include/rtl8192e_sreset.h
index 7430d9a..4273824 100755..100644
--- a/rtl8822BU/include/rtl8192e_sreset.h
+++ b/rtl8822BU/include/rtl8192e_sreset.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTL88812A_SRESET_H_
 #define _RTL8812A_SRESET_H_
 
diff --git a/rtl8822BU/include/rtl8192e_xmit.h b/rtl8822BU/include/rtl8192e_xmit.h
index 23deb8d..a621fd9 100755..100644
--- a/rtl8822BU/include/rtl8192e_xmit.h
+++ b/rtl8822BU/include/rtl8192e_xmit.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8192E_XMIT_H__
 #define __RTL8192E_XMIT_H__
 
diff --git a/rtl8822BU/include/rtl8703b_cmd.h b/rtl8822BU/include/rtl8703b_cmd.h
index cdf51c7..8e97ec8 100755..100644
--- a/rtl8822BU/include/rtl8703b_cmd.h
+++ b/rtl8822BU/include/rtl8703b_cmd.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8703B_CMD_H__
 #define __RTL8703B_CMD_H__
 
@@ -186,7 +181,7 @@ void rtl8703b_set_rssi_cmd(PADAPTER padapter, u8 *param);
 void rtl8703b_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack);
 /* s32 rtl8703b_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */
 void rtl8703b_set_FwPsTuneParam_cmd(PADAPTER padapter);
-void rtl8703b_set_FwMacIdConfig_cmd(_adapter *padapter, u8 mac_id, u8 raid, u8 bw, u8 sgi, u32 mask);
+void rtl8703b_set_FwMacIdConfig_cmd(_adapter *padapter, u8 mac_id, u8 raid, u8 bw, u8 sgi, u32 mask, u8 ignore_bw);
 void rtl8703b_set_FwBtMpOper_cmd(PADAPTER padapter, u8 idx, u8 ver, u8 reqnum, u8 *param);
 void rtl8703b_download_rsvd_page(PADAPTER padapter, u8 mstatus);
 #ifdef CONFIG_BT_COEXIST
diff --git a/rtl8822BU/include/rtl8703b_dm.h b/rtl8822BU/include/rtl8703b_dm.h
index 4ee834d..7ca7995 100755..100644
--- a/rtl8822BU/include/rtl8703b_dm.h
+++ b/rtl8822BU/include/rtl8703b_dm.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8703B_DM_H__
 #define __RTL8703B_DM_H__
 /* ************************************************************
diff --git a/rtl8822BU/include/rtl8703b_hal.h b/rtl8822BU/include/rtl8703b_hal.h
index 432ba27..149320e 100755..100644
--- a/rtl8822BU/include/rtl8703b_hal.h
+++ b/rtl8822BU/include/rtl8703b_hal.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8703B_HAL_H__
 #define __RTL8703B_HAL_H__
 
@@ -125,9 +120,11 @@ typedef struct _RT_8703B_FIRMWARE_HDR {
 #endif
 
 /* For WoWLan , more reserved page
- * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt: 1 PNO: 6 */
+ * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt: 1 PNO: 6
+ * NS offload: 2NDP info: 1
+ */
 #ifdef CONFIG_WOWLAN
-	#define WOWLAN_PAGE_NUM_8703B	0x08
+	#define WOWLAN_PAGE_NUM_8703B	0x0b
 #else
 	#define WOWLAN_PAGE_NUM_8703B	0x00
 #endif
diff --git a/rtl8822BU/include/rtl8703b_led.h b/rtl8822BU/include/rtl8703b_led.h
index fb11fdd..2baaa96 100755..100644
--- a/rtl8822BU/include/rtl8703b_led.h
+++ b/rtl8822BU/include/rtl8703b_led.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8703B_LED_H__
 #define __RTL8703B_LED_H__
 
diff --git a/rtl8822BU/include/rtl8703b_recv.h b/rtl8822BU/include/rtl8703b_recv.h
index 4c82652..e796e6e 100755..100644
--- a/rtl8822BU/include/rtl8703b_recv.h
+++ b/rtl8822BU/include/rtl8703b_recv.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8703B_RECV_H__
 #define __RTL8703B_RECV_H__
 
diff --git a/rtl8822BU/include/rtl8703b_rf.h b/rtl8822BU/include/rtl8703b_rf.h
index 0d3d0aa..14dde98 100755..100644
--- a/rtl8822BU/include/rtl8703b_rf.h
+++ b/rtl8822BU/include/rtl8703b_rf.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8703B_RF_H__
 #define __RTL8703B_RF_H__
 
diff --git a/rtl8822BU/include/rtl8703b_spec.h b/rtl8822BU/include/rtl8703b_spec.h
index 83e4f4f..633b23b 100755..100644
--- a/rtl8822BU/include/rtl8703b_spec.h
+++ b/rtl8822BU/include/rtl8703b_spec.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,11 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8703B_SPEC_H__
 #define __RTL8703B_SPEC_H__
 
@@ -465,16 +461,4 @@
 	#define RT_AC_INT_MASKS	(IMR_VIDOK_8703B | IMR_VODOK_8703B | IMR_BEDOK_8703B | IMR_BKDOK_8703B)
 #endif
 
-/* ********************************************************
- * General definitions
- * ******************************************************** */
-
-#define MACID_NUM_8703B 16
-#define SEC_CAM_ENT_NUM_8703B 16
-#define HW_PORT_NUM_8703B	2
-#define NSS_NUM_8703B 1
-#define BAND_CAP_8703B (BAND_CAP_2G)
-#define BW_CAP_8703B (BW_CAP_20M | BW_CAP_40M)
-#define PROTO_CAP_8703B (PROTO_CAP_11B | PROTO_CAP_11G | PROTO_CAP_11N)
-
 #endif /* __RTL8703B_SPEC_H__ */
diff --git a/rtl8822BU/include/rtl8703b_sreset.h b/rtl8822BU/include/rtl8703b_sreset.h
index fbed1fb..5fe53cf 100755..100644
--- a/rtl8822BU/include/rtl8703b_sreset.h
+++ b/rtl8822BU/include/rtl8703b_sreset.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTL8703B_SRESET_H_
 #define _RTL8703B_SRESET_H_
 
diff --git a/rtl8822BU/include/rtl8703b_xmit.h b/rtl8822BU/include/rtl8703b_xmit.h
index c44609c..4aad2cb 100755..100644
--- a/rtl8822BU/include/rtl8703b_xmit.h
+++ b/rtl8822BU/include/rtl8703b_xmit.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8703B_XMIT_H__
 #define __RTL8703B_XMIT_H__
 
diff --git a/rtl8822BU/include/rtl8723b_cmd.h b/rtl8822BU/include/rtl8723b_cmd.h
index dadb82c..995d016 100755..100644
--- a/rtl8822BU/include/rtl8723b_cmd.h
+++ b/rtl8822BU/include/rtl8723b_cmd.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8723B_CMD_H__
 #define __RTL8723B_CMD_H__
 
@@ -186,7 +181,7 @@ void rtl8723b_set_rssi_cmd(PADAPTER padapter, u8 *param);
 void rtl8723b_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack);
 /* s32 rtl8723b_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */
 void rtl8723b_set_FwPsTuneParam_cmd(PADAPTER padapter);
-void rtl8723b_set_FwMacIdConfig_cmd(_adapter *padapter, u8 mac_id, u8 raid, u8 bw, u8 sgi, u32 mask);
+void rtl8723b_set_FwMacIdConfig_cmd(_adapter *padapter, u8 mac_id, u8 raid, u8 bw, u8 sgi, u32 mask, u8 ignore_bw);
 void rtl8723b_set_FwBtMpOper_cmd(PADAPTER padapter, u8 idx, u8 ver, u8 reqnum, u8 *param);
 void rtl8723b_download_rsvd_page(PADAPTER padapter, u8 mstatus);
 #ifdef CONFIG_BT_COEXIST
diff --git a/rtl8822BU/include/rtl8723b_dm.h b/rtl8822BU/include/rtl8723b_dm.h
index a3bb7df..a7ab603 100755..100644
--- a/rtl8822BU/include/rtl8723b_dm.h
+++ b/rtl8822BU/include/rtl8723b_dm.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8723B_DM_H__
 #define __RTL8723B_DM_H__
 /* ************************************************************
diff --git a/rtl8822BU/include/rtl8723b_hal.h b/rtl8822BU/include/rtl8723b_hal.h
index b7c8bc5..ecb6f25 100755..100644
--- a/rtl8822BU/include/rtl8723b_hal.h
+++ b/rtl8822BU/include/rtl8723b_hal.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8723B_HAL_H__
 #define __RTL8723B_HAL_H__
 
@@ -125,9 +120,11 @@ typedef struct _RT_8723B_FIRMWARE_HDR {
 #endif
 
 /* For WoWLan , more reserved page
- * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt: 1,PNO: 6 */
+ * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt: 1,PNO: 6
+ * NS offload: 2 NDP info: 1
+ */
 #ifdef CONFIG_WOWLAN
-	#define WOWLAN_PAGE_NUM_8723B	0x08
+	#define WOWLAN_PAGE_NUM_8723B	0x0b
 #else
 	#define WOWLAN_PAGE_NUM_8723B	0x00
 #endif
diff --git a/rtl8822BU/include/rtl8723b_led.h b/rtl8822BU/include/rtl8723b_led.h
index 0a7b2c9..24c5124 100755..100644
--- a/rtl8822BU/include/rtl8723b_led.h
+++ b/rtl8822BU/include/rtl8723b_led.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8723B_LED_H__
 #define __RTL8723B_LED_H__
 
diff --git a/rtl8822BU/include/rtl8723b_recv.h b/rtl8822BU/include/rtl8723b_recv.h
index fd9faef..cf5e18b 100755..100644
--- a/rtl8822BU/include/rtl8723b_recv.h
+++ b/rtl8822BU/include/rtl8723b_recv.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8723B_RECV_H__
 #define __RTL8723B_RECV_H__
 
diff --git a/rtl8822BU/include/rtl8723b_rf.h b/rtl8822BU/include/rtl8723b_rf.h
index bf56dde..3494e8c 100755..100644
--- a/rtl8822BU/include/rtl8723b_rf.h
+++ b/rtl8822BU/include/rtl8723b_rf.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8723B_RF_H__
 #define __RTL8723B_RF_H__
 
diff --git a/rtl8822BU/include/rtl8723b_spec.h b/rtl8822BU/include/rtl8723b_spec.h
index fb3fd3f..b0fb4aa 100755..100644
--- a/rtl8822BU/include/rtl8723b_spec.h
+++ b/rtl8822BU/include/rtl8723b_spec.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,11 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8723B_SPEC_H__
 #define __RTL8723B_SPEC_H__
 
@@ -281,16 +277,4 @@
 	#define RT_AC_INT_MASKS	(IMR_VIDOK_8723B | IMR_VODOK_8723B | IMR_BEDOK_8723B | IMR_BKDOK_8723B)
 #endif
 
-/* ********************************************************
- * General definitions
- * ******************************************************** */
-
-#define MACID_NUM_8723B 128
-#define SEC_CAM_ENT_NUM_8723B 64
-#define HW_PORT_NUM_8723B	2
-#define NSS_NUM_8723B 1
-#define BAND_CAP_8723B (BAND_CAP_2G)
-#define BW_CAP_8723B (BW_CAP_20M | BW_CAP_40M)
-#define PROTO_CAP_8723B (PROTO_CAP_11B | PROTO_CAP_11G | PROTO_CAP_11N)
-
 #endif /* __RTL8723B_SPEC_H__ */
diff --git a/rtl8822BU/include/rtl8723b_sreset.h b/rtl8822BU/include/rtl8723b_sreset.h
index 8067359..c97f264 100755..100644
--- a/rtl8822BU/include/rtl8723b_sreset.h
+++ b/rtl8822BU/include/rtl8723b_sreset.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTL8723B_SRESET_H_
 #define _RTL8723B_SRESET_H_
 
diff --git a/rtl8822BU/include/rtl8723b_xmit.h b/rtl8822BU/include/rtl8723b_xmit.h
index 7cc33e1..199e7ef 100755..100644
--- a/rtl8822BU/include/rtl8723b_xmit.h
+++ b/rtl8822BU/include/rtl8723b_xmit.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8723B_XMIT_H__
 #define __RTL8723B_XMIT_H__
 
diff --git a/rtl8822BU/include/rtl8723d_cmd.h b/rtl8822BU/include/rtl8723d_cmd.h
index 86d4868..5cabd19 100755..100644
--- a/rtl8822BU/include/rtl8723d_cmd.h
+++ b/rtl8822BU/include/rtl8723d_cmd.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8723D_CMD_H__
 #define __RTL8723D_CMD_H__
 
@@ -185,7 +180,7 @@ void rtl8723d_set_rssi_cmd(PADAPTER padapter, u8 *param);
 void rtl8723d_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack);
 /* s32 rtl8723d_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */
 void rtl8723d_set_FwPsTuneParam_cmd(PADAPTER padapter);
-void rtl8723d_set_FwMacIdConfig_cmd(_adapter *padapter, u8 mac_id, u8 raid, u8 bw, u8 sgi, u32 mask);
+void rtl8723d_set_FwMacIdConfig_cmd(_adapter *padapter, u8 mac_id, u8 raid, u8 bw, u8 sgi, u32 mask, u8 ignore_bw);
 void rtl8723d_set_FwBtMpOper_cmd(PADAPTER padapter, u8 idx, u8 ver, u8 reqnum, u8 *param);
 void rtl8723d_download_rsvd_page(PADAPTER padapter, u8 mstatus);
 #ifdef CONFIG_BT_COEXIST
diff --git a/rtl8822BU/include/rtl8723d_dm.h b/rtl8822BU/include/rtl8723d_dm.h
index bae086d..c2bdac3 100755..100644
--- a/rtl8822BU/include/rtl8723d_dm.h
+++ b/rtl8822BU/include/rtl8723d_dm.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8723D_DM_H__
 #define __RTL8723D_DM_H__
 /* ************************************************************
diff --git a/rtl8822BU/include/rtl8723d_hal.h b/rtl8822BU/include/rtl8723d_hal.h
index 28b7caa..139c60c 100755..100644
--- a/rtl8822BU/include/rtl8723d_hal.h
+++ b/rtl8822BU/include/rtl8723d_hal.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8723D_HAL_H__
 #define __RTL8723D_HAL_H__
 
@@ -130,9 +125,11 @@ typedef struct _RT_8723D_FIRMWARE_HDR {
 #endif
 
 /* For WoWLan , more reserved page
- * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt 1, PNO: 6 */
+ * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt 1, PNO: 6
+ * NS offload: 2 NDP info: 1
+ */
 #ifdef CONFIG_WOWLAN
-	#define WOWLAN_PAGE_NUM_8723D	0x08
+	#define WOWLAN_PAGE_NUM_8723D	0x0b
 #else
 	#define WOWLAN_PAGE_NUM_8723D	0x00
 #endif
@@ -169,7 +166,7 @@ typedef struct _RT_8723D_FIRMWARE_HDR {
 #include "HalVerDef.h"
 #include "hal_com.h"
 
-#define EFUSE_OOB_PROTECT_BYTES			19
+#define EFUSE_OOB_PROTECT_BYTES (96 + 1)
 
 #define HAL_EFUSE_MEMORY
 #define HWSET_MAX_SIZE_8723D                512
diff --git a/rtl8822BU/include/rtl8723d_led.h b/rtl8822BU/include/rtl8723d_led.h
index 439ee82..7111dfc 100755..100644
--- a/rtl8822BU/include/rtl8723d_led.h
+++ b/rtl8822BU/include/rtl8723d_led.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8723D_LED_H__
 #define __RTL8723D_LED_H__
 
diff --git a/rtl8822BU/include/rtl8723d_lps_poff.h b/rtl8822BU/include/rtl8723d_lps_poff.h
index c466d40..138a0ca 100755..100644
--- a/rtl8822BU/include/rtl8723d_lps_poff.h
+++ b/rtl8822BU/include/rtl8723d_lps_poff.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 /******************************************** CONST  ************************/
 #define NUM_OF_REGISTER_BANK	13
diff --git a/rtl8822BU/include/rtl8723d_recv.h b/rtl8822BU/include/rtl8723d_recv.h
index 6343ec8..0be4309 100755..100644
--- a/rtl8822BU/include/rtl8723d_recv.h
+++ b/rtl8822BU/include/rtl8723d_recv.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8723D_RECV_H__
 #define __RTL8723D_RECV_H__
 
diff --git a/rtl8822BU/include/rtl8723d_rf.h b/rtl8822BU/include/rtl8723d_rf.h
index 0aa5813..5101eaf 100755..100644
--- a/rtl8822BU/include/rtl8723d_rf.h
+++ b/rtl8822BU/include/rtl8723d_rf.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8723D_RF_H__
 #define __RTL8723D_RF_H__
 
diff --git a/rtl8822BU/include/rtl8723d_spec.h b/rtl8822BU/include/rtl8723d_spec.h
index 1d41056..950242e 100755..100644
--- a/rtl8822BU/include/rtl8723d_spec.h
+++ b/rtl8822BU/include/rtl8723d_spec.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,11 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8723D_SPEC_H__
 #define __RTL8723D_SPEC_H__
 
@@ -442,16 +438,4 @@
 	#define RT_AC_INT_MASKS	(IMR_VIDOK_8723D | IMR_VODOK_8723D | IMR_BEDOK_8723D | IMR_BKDOK_8723D)
 #endif
 
-/* ********************************************************
- * General definitions
- * ******************************************************** */
-
-#define MACID_NUM_8723D 16
-#define SEC_CAM_ENT_NUM_8723D 32
-#define HW_PORT_NUM_8723D 3	/*port0, port1, port2*/
-#define NSS_NUM_8723D 1
-#define BAND_CAP_8723D (BAND_CAP_2G)
-#define BW_CAP_8723D (BW_CAP_20M | BW_CAP_40M)
-#define PROTO_CAP_8723D (PROTO_CAP_11B | PROTO_CAP_11G | PROTO_CAP_11N)
-
 #endif /* __RTL8723D_SPEC_H__ */
diff --git a/rtl8822BU/include/rtl8723d_sreset.h b/rtl8822BU/include/rtl8723d_sreset.h
index aafe7c8..db75dba 100755..100644
--- a/rtl8822BU/include/rtl8723d_sreset.h
+++ b/rtl8822BU/include/rtl8723d_sreset.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTL8723D_SRESET_H_
 #define _RTL8723D_SRESET_H_
 
diff --git a/rtl8822BU/include/rtl8723d_xmit.h b/rtl8822BU/include/rtl8723d_xmit.h
index 20f98b0..054bf32 100755..100644
--- a/rtl8822BU/include/rtl8723d_xmit.h
+++ b/rtl8822BU/include/rtl8723d_xmit.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8723D_XMIT_H__
 #define __RTL8723D_XMIT_H__
 
diff --git a/rtl8822BU/include/rtl8812a_cmd.h b/rtl8822BU/include/rtl8812a_cmd.h
index 3891bd0..8979470 100755..100644
--- a/rtl8822BU/include/rtl8812a_cmd.h
+++ b/rtl8822BU/include/rtl8812a_cmd.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8812A_CMD_H__
 #define __RTL8812A_CMD_H__
 
diff --git a/rtl8822BU/include/rtl8812a_dm.h b/rtl8822BU/include/rtl8812a_dm.h
index fef5824..584f6d3 100755..100644
--- a/rtl8822BU/include/rtl8812a_dm.h
+++ b/rtl8822BU/include/rtl8812a_dm.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8812A_DM_H__
 #define __RTL8812A_DM_H__
 
diff --git a/rtl8822BU/include/rtl8812a_hal.h b/rtl8822BU/include/rtl8812a_hal.h
index 2ea4c83..e79a866 100755..100644
--- a/rtl8822BU/include/rtl8812a_hal.h
+++ b/rtl8822BU/include/rtl8812a_hal.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8812A_HAL_H__
 #define __RTL8812A_HAL_H__
 
@@ -143,9 +138,11 @@ typedef struct _RT_FIRMWARE_8812 {
 #define BCNQ_PAGE_NUM_8812		0x07
 
 /* For WoWLan , more reserved page
- * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, AOAC rpt: 1,PNO: 6 */
+ * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, AOAC rpt: 1,PNO: 6
+ * NS offload: 1 NDP info: 1
+ */
 #ifdef CONFIG_WOWLAN
-	#define WOWLAN_PAGE_NUM_8812	0x06
+	#define WOWLAN_PAGE_NUM_8812	0x08
 #else
 	#define WOWLAN_PAGE_NUM_8812	0x00
 #endif
@@ -346,6 +343,7 @@ void rtl8812_stop_thread(PADAPTER padapter);
 #ifdef CONFIG_PCI_HCI
 BOOLEAN	InterruptRecognized8812AE(PADAPTER Adapter);
 VOID	UpdateInterruptMask8812AE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1);
+VOID	InitTRXDescHwAddress8812AE(PADAPTER Adapter);
 #endif
 
 #ifdef CONFIG_BT_COEXIST
diff --git a/rtl8822BU/include/rtl8812a_led.h b/rtl8822BU/include/rtl8812a_led.h
index 28840be..c28b391 100755..100644
--- a/rtl8822BU/include/rtl8812a_led.h
+++ b/rtl8822BU/include/rtl8812a_led.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8812A_LED_H__
 #define __RTL8812A_LED_H__
 
diff --git a/rtl8822BU/include/rtl8812a_recv.h b/rtl8822BU/include/rtl8812a_recv.h
index 4e7b4ed..bf1d4b6 100755..100644
--- a/rtl8822BU/include/rtl8812a_recv.h
+++ b/rtl8822BU/include/rtl8812a_recv.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8812A_RECV_H__
 #define __RTL8812A_RECV_H__
 
diff --git a/rtl8822BU/include/rtl8812a_rf.h b/rtl8822BU/include/rtl8812a_rf.h
index 9a7175d..1e2c1a0 100755..100644
--- a/rtl8822BU/include/rtl8812a_rf.h
+++ b/rtl8822BU/include/rtl8812a_rf.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8812A_RF_H__
 #define __RTL8812A_RF_H__
 
diff --git a/rtl8822BU/include/rtl8812a_spec.h b/rtl8822BU/include/rtl8812a_spec.h
index dc7bd3d..3e3927b 100755..100644
--- a/rtl8822BU/include/rtl8812a_spec.h
+++ b/rtl8822BU/include/rtl8812a_spec.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,11 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8812A_SPEC_H__
 #define __RTL8812A_SPEC_H__
 
@@ -257,18 +253,6 @@
 #define	AcmHw_ViqStatus_8812			BIT(6)
 #define	AcmHw_BeqStatus_8812			BIT(7)
 
-/* ********************************************************
-* General definitions
-* ******************************************************** */
-
-#define MACID_NUM_8812A 128
-#define SEC_CAM_ENT_NUM_8812A 64
-#define HW_PORT_NUM_8812A	2
-#define NSS_NUM_8812A 2
-#define BAND_CAP_8812A (BAND_CAP_2G | BAND_CAP_5G)
-#define BW_CAP_8812A (BW_CAP_20M | BW_CAP_40M | BW_CAP_80M)
-#define PROTO_CAP_8812A (PROTO_CAP_11B | PROTO_CAP_11G | PROTO_CAP_11N | PROTO_CAP_11AC)
-
 #endif /* __RTL8812A_SPEC_H__ */
 
 #ifdef CONFIG_RTL8821A
diff --git a/rtl8822BU/include/rtl8812a_sreset.h b/rtl8822BU/include/rtl8812a_sreset.h
index 1d166dc..d4bbd58 100755..100644
--- a/rtl8822BU/include/rtl8812a_sreset.h
+++ b/rtl8822BU/include/rtl8812a_sreset.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTL88812A_SRESET_H_
 #define _RTL8812A_SRESET_H_
 
diff --git a/rtl8822BU/include/rtl8812a_xmit.h b/rtl8822BU/include/rtl8812a_xmit.h
index 9fe4dfb..0daa43e 100755..100644
--- a/rtl8822BU/include/rtl8812a_xmit.h
+++ b/rtl8822BU/include/rtl8812a_xmit.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8812A_XMIT_H__
 #define __RTL8812A_XMIT_H__
 
diff --git a/rtl8822BU/include/rtl8814a_cmd.h b/rtl8822BU/include/rtl8814a_cmd.h
index a42504d..d17951b 100755..100644
--- a/rtl8822BU/include/rtl8814a_cmd.h
+++ b/rtl8822BU/include/rtl8814a_cmd.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8814A_CMD_H__
 #define __RTL8814A_CMD_H__
 #include "hal_com_h2c.h"
@@ -80,6 +75,30 @@
 #define SET_88E_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value)
 #define SET_88E_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value)
 
+/*	AP_REQ_TXREP_CMD 0x43	*/
+#define SET_8814A_H2CCMD_TXREP_PARM_STA1(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
+#define SET_8814A_H2CCMD_TXREP_PARM_STA2(__pH2CCmd, __Value)			SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value)
+#define SET_8814A_H2CCMD_TXREP_PARM_RTY(__pH2CCmd, __Value)				SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 2, __Value)
+
+/*		C2H_AP_REQ_TXRPT		*/
+#define	GET_8814A_C2H_TC2H_APREQ_TXRPT_MACID1(_Header)			LE_BITS_TO_1BYTE((_Header + 0), 0, 8)
+#define	GET_8814A_C2H_TC2H_APREQ_TXRPT_TXOK1(_Header)			LE_BITS_TO_2BYTE((_Header + 1), 0, 16)
+#define	GET_8814A_C2H_TC2H_APREQ_TXRPT_TXFAIL1(_Header)			LE_BITS_TO_2BYTE((_Header + 3), 0, 16)
+#define	GET_8814A_C2H_TC2H_APREQ_TXRPT_INIRATE1(_Header)		LE_BITS_TO_1BYTE((_Header + 5), 0, 8)
+#define	GET_8814A_C2H_TC2H_APREQ_TXRPT_MACID2(_Header)			LE_BITS_TO_1BYTE((_Header + 6), 0, 8)
+#define	GET_8814A_C2H_TC2H_APREQ_TXRPT_TXOK2(_Header)			LE_BITS_TO_2BYTE((_Header + 7), 0, 16)
+#define	GET_8814A_C2H_TC2H_APREQ_TXRPT_TXFAIL2(_Header)			LE_BITS_TO_2BYTE((_Header + 9), 0, 16)
+#define	GET_8814A_C2H_TC2H_APREQ_TXRPT_INIRATE2(_Header)		LE_BITS_TO_1BYTE((_Header + 11), 0, 8)
+
+/*		C2H_SPC_STAT			*/
+#define	GET_8814A_C2H_SPC_STAT_IDX(_Header)						LE_BITS_TO_1BYTE((_Header + 0), 0, 8)
+	/*	Tip :TYPE_A data3 is msb and data0 is lsb	*/
+#define	GET_8814A_C2H_SPC_STAT_TYPEA_RETRY(_Header)				LE_BITS_TO_4BYTE((_Header + 1), 0, 32)
+#define	GET_8814A_C2H_SPC_STAT_TYPEB_PKT1(_Header)				LE_BITS_TO_2BYTE((_Header + 1), 0, 16)
+#define	GET_8814A_C2H_SPC_STAT_TYPEB_RETRY1(_Header)			LE_BITS_TO_2BYTE((_Header + 3), 0, 16)
+#define	GET_8814A_C2H_SPC_STAT_TYPEB_PKT2(_Header)				LE_BITS_TO_2BYTE((_Header + 5), 0, 16)
+#define	GET_8814A_C2H_SPC_STAT_TYPEB_RETRY2(_Header)			LE_BITS_TO_2BYTE((_Header + 7), 0, 16)
+
 /*BCNHWSEQ*/
 #define SET_8814A_H2CCMD_BCNHWSEQ_EN(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd), 0, 1, __Value)
 #define SET_8814A_H2CCMD_BCNHWSEQ_BCN_NUMBER(__pH2CCmd, __Value)	SET_BITS_TO_LE_1BYTE((__pH2CCmd), 1, 3, __Value)
@@ -123,6 +142,7 @@ void rtl8814_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus);
 void rtl8814_set_FwPwrMode_cmd(PADAPTER padapter, u8 PSMode);
 u8 GetTxBufferRsvdPageNum8814(_adapter *padapter, bool wowlan);
 u8 rtl8814_set_rssi_cmd(_adapter *padapter, u8 *param);
+void rtl8814_req_txrpt_cmd(PADAPTER padapter, u8 macid);
 
 #ifdef CONFIG_TDLS
 	#ifdef CONFIG_TDLS_CH_SW
diff --git a/rtl8822BU/include/rtl8814a_dm.h b/rtl8822BU/include/rtl8814a_dm.h
index bb925e4..f615117 100755..100644
--- a/rtl8822BU/include/rtl8814a_dm.h
+++ b/rtl8822BU/include/rtl8814a_dm.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8814A_DM_H__
 #define __RTL8814A_DM_H__
 
diff --git a/rtl8822BU/include/rtl8814a_hal.h b/rtl8822BU/include/rtl8814a_hal.h
index c5a3f88..319ad21 100755..100644
--- a/rtl8822BU/include/rtl8814a_hal.h
+++ b/rtl8822BU/include/rtl8814a_hal.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8814A_HAL_H__
 #define __RTL8814A_HAL_H__
 
diff --git a/rtl8822BU/include/rtl8814a_led.h b/rtl8822BU/include/rtl8814a_led.h
index 1137a9b..799ae87 100755..100644
--- a/rtl8822BU/include/rtl8814a_led.h
+++ b/rtl8822BU/include/rtl8814a_led.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8814A_LED_H__
 #define __RTL8814A_LED_H__
 
diff --git a/rtl8822BU/include/rtl8814a_recv.h b/rtl8822BU/include/rtl8814a_recv.h
index e9626f3..0963ea8 100755..100644
--- a/rtl8822BU/include/rtl8814a_recv.h
+++ b/rtl8822BU/include/rtl8814a_recv.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8814A_RECV_H__
 #define __RTL8814A_RECV_H__
 
diff --git a/rtl8822BU/include/rtl8814a_rf.h b/rtl8822BU/include/rtl8814a_rf.h
index 7b11d99..17fe1c0 100755..100644
--- a/rtl8822BU/include/rtl8814a_rf.h
+++ b/rtl8822BU/include/rtl8814a_rf.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8814A_RF_H__
 #define __RTL8814A_RF_H__
 
diff --git a/rtl8822BU/include/rtl8814a_spec.h b/rtl8822BU/include/rtl8814a_spec.h
index 43a6381..3d94e8e 100755..100644
--- a/rtl8822BU/include/rtl8814a_spec.h
+++ b/rtl8822BU/include/rtl8814a_spec.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,11 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8814A_SPEC_H__
 #define __RTL8814A_SPEC_H__
 
@@ -640,12 +636,4 @@ So the following defines for 92C is not entire!!!!!!
 
 #define LAST_ENTRY_OF_TX_PKT_BUFFER_8814A       (2048-1)	/* 20130415 KaiYuan add for 8814 */
 
-#define MACID_NUM_8814A 128
-#define SEC_CAM_ENT_NUM_8814A 64
-#define HW_PORT_NUM_8814A	5
-#define NSS_NUM_8814A 3
-#define BAND_CAP_8814A (BAND_CAP_2G | BAND_CAP_5G)
-#define BW_CAP_8814A (BW_CAP_20M | BW_CAP_40M | BW_CAP_80M)
-#define PROTO_CAP_8814A (PROTO_CAP_11B | PROTO_CAP_11G | PROTO_CAP_11N | PROTO_CAP_11AC)
-
 #endif /* __RTL8814A_SPEC_H__ */
diff --git a/rtl8822BU/include/rtl8814a_sreset.h b/rtl8822BU/include/rtl8814a_sreset.h
index 5d95e1f..939b151 100755..100644
--- a/rtl8822BU/include/rtl8814a_sreset.h
+++ b/rtl8822BU/include/rtl8814a_sreset.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTL88814A_SRESET_H_
 #define _RTL8814A_SRESET_H_
 
diff --git a/rtl8822BU/include/rtl8814a_xmit.h b/rtl8822BU/include/rtl8814a_xmit.h
index 099760d..bc9310b 100755..100644
--- a/rtl8822BU/include/rtl8814a_xmit.h
+++ b/rtl8822BU/include/rtl8814a_xmit.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8814A_XMIT_H__
 #define __RTL8814A_XMIT_H__
 
diff --git a/rtl8822BU/include/rtl8821a_spec.h b/rtl8822BU/include/rtl8821a_spec.h
index b4dfe3f..44afdff 100755..100644
--- a/rtl8822BU/include/rtl8821a_spec.h
+++ b/rtl8822BU/include/rtl8821a_spec.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,11 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8821A_SPEC_H__
 #define __RTL8821A_SPEC_H__
 
@@ -93,16 +89,4 @@
  * Regsiter Bit and Content definition
  * ************************************************************ */
 
-/* ********************************************************
- * General definitions
- * ******************************************************** */
-
-#define MACID_NUM_8821A 128
-#define SEC_CAM_ENT_NUM_8821A 64
-#define HW_PORT_NUM_8821A	2
-#define NSS_NUM_8821A 1
-#define BAND_CAP_8821A (BAND_CAP_2G | BAND_CAP_5G)
-#define BW_CAP_8821A (BW_CAP_20M | BW_CAP_40M | BW_CAP_80M)
-#define PROTO_CAP_8821A (PROTO_CAP_11B | PROTO_CAP_11G | PROTO_CAP_11N | PROTO_CAP_11AC)
-
 #endif /* __RTL8821A_SPEC_H__ */
diff --git a/rtl8822BU/include/rtl8821a_xmit.h b/rtl8822BU/include/rtl8821a_xmit.h
index d7a97e3..5d973cd 100755..100644
--- a/rtl8822BU/include/rtl8821a_xmit.h
+++ b/rtl8822BU/include/rtl8821a_xmit.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8821A_XMIT_H__
 #define __RTL8821A_XMIT_H__
 
diff --git a/rtl8822BU/include/rtl8821c_dm.h b/rtl8822BU/include/rtl8821c_dm.h
index 6cdcb0a..7d10941 100755..100644
--- a/rtl8822BU/include/rtl8821c_dm.h
+++ b/rtl8822BU/include/rtl8821c_dm.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8812C_DM_H__
 #define __RTL8812C_DM_H__
 
diff --git a/rtl8822BU/include/rtl8821c_hal.h b/rtl8822BU/include/rtl8821c_hal.h
index fd6586e..083af0c 100755..100644
--- a/rtl8822BU/include/rtl8821c_hal.h
+++ b/rtl8822BU/include/rtl8821c_hal.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTL8821C_HAL_H_
 #define _RTL8821C_HAL_H_
 
diff --git a/rtl8822BU/include/rtl8821c_spec.h b/rtl8822BU/include/rtl8821c_spec.h
index 222be6a..44865bf 100755..100644
--- a/rtl8822BU/include/rtl8821c_spec.h
+++ b/rtl8822BU/include/rtl8821c_spec.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,20 +11,12 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTL8821C_SPEC_H__
 #define __RTL8821C_SPEC_H__
 
 #define EFUSE_MAP_SIZE		HALMAC_EFUSE_SIZE_8821C
 
-#define MACID_NUM_8821C	128
-#define NSS_NUM_8821C		1
-#define HW_PORT_NUM_8821C	5
-
 /*
  * MAC Register definition
  */
@@ -40,6 +32,7 @@
 #define REG_TSFTR1					REG_FREERUN_CNT_8821C	/* hal_com.c */
 #define REG_RXFLTMAP2				REG_RXFLTMAP_8821C	/* rtw_mp.c */
 #define REG_WOWLAN_WAKE_REASON	0x01C7
+#define REG_GPIO_PIN_CTRL_2			REG_GPIO_EXT_CTRL_8821C
 
 /* RXERR_RPT, for rtw_mp.c */
 #define RXERR_TYPE_OFDM_PPDU		0
@@ -193,6 +186,7 @@ struct hw_port_reg {
 	u32 bcn_space;		/*reg_offset*/
 	u8 bcn_space_shift;
 	u16 bcn_space_mask;
+	u32	ps_aid;			/*reg_offset*/
 };
 
 #endif /* __RTL8192E_SPEC_H__ */
diff --git a/rtl8822BU/include/rtl8821ce_hal.h b/rtl8822BU/include/rtl8821ce_hal.h
new file mode 100644
index 0000000..426002a
--- a/dev/null
+++ b/rtl8822BU/include/rtl8821ce_hal.h
@@ -0,0 +1,23 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
+#ifndef _RTL8821CE_HAL_H_
+#define _RTL8821CE_HAL_H_
+
+#include <drv_types.h>		/* PADAPTER */
+
+/* rtl8821ce_ops.c */
+void rtl8821ce_set_hal_ops(PADAPTER);
+
+#endif /* _RTL8821CE_HAL_H_ */
diff --git a/rtl8822BU/include/rtl8821cs_hal.h b/rtl8822BU/include/rtl8821cs_hal.h
index 97df6e9..ceecc15 100755..100644
--- a/rtl8822BU/include/rtl8821cs_hal.h
+++ b/rtl8822BU/include/rtl8821cs_hal.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTL8821CS_HAL_H_
 #define _RTL8821CS_HAL_H_
 
diff --git a/rtl8822BU/include/rtl8821cu_hal.h b/rtl8822BU/include/rtl8821cu_hal.h
index 63c25a8..aec4372 100755..100644
--- a/rtl8822BU/include/rtl8821cu_hal.h
+++ b/rtl8822BU/include/rtl8821cu_hal.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTL8821CU_HAL_H_
 #define _RTL8821CU_HAL_H_
 
diff --git a/rtl8822BU/include/rtl8822b_hal.h b/rtl8822BU/include/rtl8822b_hal.h
index 13fa07f..307dd61 100755..100644
--- a/rtl8822BU/include/rtl8822b_hal.h
+++ b/rtl8822BU/include/rtl8822b_hal.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTL8822B_HAL_H_
 #define _RTL8822B_HAL_H_
 
diff --git a/rtl8822BU/include/rtl8822be_hal.h b/rtl8822BU/include/rtl8822be_hal.h
index 8379fab..1755869 100755..100644
--- a/rtl8822BU/include/rtl8822be_hal.h
+++ b/rtl8822BU/include/rtl8822be_hal.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTL8822BE_HAL_H_
 #define _RTL8822BE_HAL_H_
 
diff --git a/rtl8822BU/include/rtl8822bs_hal.h b/rtl8822BU/include/rtl8822bs_hal.h
index 313036d..ffaddee 100755..100644
--- a/rtl8822BU/include/rtl8822bs_hal.h
+++ b/rtl8822BU/include/rtl8822bs_hal.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTL8822BS_HAL_H_
 #define _RTL8822BS_HAL_H_
 
@@ -25,6 +20,10 @@
 /* rtl8822bs_ops.c */
 void rtl8822bs_set_hal_ops(PADAPTER);
 
+#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
+void rtl8822bs_disable_interrupt_but_cpwm2(PADAPTER adapter);
+#endif
+
 /* rtl8822bs_xmit.c */
 s32 rtl8822bs_dequeue_writeport(PADAPTER);
 #define _dequeue_writeport(a)	rtl8822bs_dequeue_writeport(a)
diff --git a/rtl8822BU/include/rtl8822bu_hal.h b/rtl8822BU/include/rtl8822bu_hal.h
index df16056..39618c9 100755..100644
--- a/rtl8822BU/include/rtl8822bu_hal.h
+++ b/rtl8822BU/include/rtl8822bu_hal.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTL8822BU_HAL_H_
 #define _RTL8822BU_HAL_H_
 
@@ -43,7 +38,14 @@
 			#define MAX_RECVBUF_SZ (8192+1024)
 		#else /* !PLATFORM_OS_CE */
 			#ifndef CONFIG_MINIMAL_MEMORY_USAGE
+				#ifdef CONFIG_PLATFORM_NOVATEK_NT72668
+				#define MAX_RECVBUF_SZ (15360) /* 15k */
+				#elif defined(CONFIG_PLATFORM_HISILICON)
+				/* use 16k to workaround for HISILICON platform */
+				#define MAX_RECVBUF_SZ (16384)
+				#else
 				#define MAX_RECVBUF_SZ (32768)
+				#endif
 			#else
 				#define MAX_RECVBUF_SZ (4000)
 			#endif
diff --git a/rtl8822BU/include/rtw_android.h b/rtl8822BU/include/rtw_android.h
index 2015afe..424a64e 100755..100644
--- a/rtl8822BU/include/rtw_android.h
+++ b/rtl8822BU/include/rtw_android.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef __RTW_ANDROID_H__
 #define __RTW_ANDROID_H__
diff --git a/rtl8822BU/include/rtw_ap.h b/rtl8822BU/include/rtw_ap.h
index 5a0fb53..44e2239 100755..100644
--- a/rtl8822BU/include/rtw_ap.h
+++ b/rtl8822BU/include/rtw_ap.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTW_AP_H_
 #define __RTW_AP_H_
 
@@ -35,7 +30,7 @@ void rtw_add_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index, u8 *d
 void rtw_remove_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index);
 void _update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx, const char *tag);
 #define update_beacon(adapter, ie_id, oui, tx) _update_beacon((adapter), (ie_id), (oui), (tx), __func__)
-void add_RATid(_adapter *padapter, struct sta_info *psta, u8 rssi_level);
+void add_RATid(_adapter *padapter, struct sta_info *psta, u8 rssi_level, u8 is_update_bw);
 void expire_timeout_chk(_adapter *padapter);
 void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta);
 void rtw_start_bss_hdl_after_chbw_decided(_adapter *adapter);
@@ -72,7 +67,7 @@ bool rtw_ap_chbw_decision(_adapter *adapter, s16 req_ch, s8 req_bw, s8 req_offse
 #ifdef CONFIG_AUTO_AP_MODE
 extern void rtw_start_auto_ap(_adapter *adapter);
 #endif /* CONFIG_AUTO_AP_MODE */
-
+void rtw_ap_acdata_control(_adapter *padapter, u8 power_mode);
 #endif /* end of CONFIG_AP_MODE */
 
 #endif
@@ -84,5 +79,5 @@ int rtw_ht_operation_update(_adapter *padapter);
 
 #ifdef CONFIG_SWTIMER_BASED_TXBCN
 void tx_beacon_handlder(struct dvobj_priv *pdvobj);
-void tx_beacon_timer_handlder(struct dvobj_priv *pdvobj);
+void tx_beacon_timer_handlder(void *ctx);
 #endif
diff --git a/rtl8822BU/include/rtw_beamforming.h b/rtl8822BU/include/rtw_beamforming.h
index 0c1f9b8..f589c74 100755..100644
--- a/rtl8822BU/include/rtw_beamforming.h
+++ b/rtl8822BU/include/rtw_beamforming.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTW_BEAMFORMING_H_
 #define __RTW_BEAMFORMING_H_
 
@@ -58,7 +53,7 @@ enum _BEAMFORMING_STATE {
 /*
  * typedef BEAMFORMING_CAP for phydm
  */
-typedef enum _BEAMFORMING_CAP {
+typedef enum beamforming_cap {
 	BEAMFORMING_CAP_NONE = 0x0,
 	BEAMFORMER_CAP_HT_EXPLICIT = 0x1,
 	BEAMFORMEE_CAP_HT_EXPLICIT = 0x2,
@@ -109,7 +104,7 @@ struct beamformee_entry {
 	CHANNEL_WIDTH sound_bw;
 	u16 sound_period;
 
-	enum _BEAMFORMING_CAP cap;
+	enum beamforming_cap cap;
 	enum _BEAMFORM_ENTRY_HW_STATE state;
 
 	/* The BFee need to be sounded when count to zero */
@@ -155,7 +150,7 @@ struct beamformer_entry {
 	u8 g_id;
 	u8 mac_addr[ETH_ALEN];
 
-	enum _BEAMFORMING_CAP cap;
+	enum beamforming_cap cap;
 	enum _BEAMFORM_ENTRY_HW_STATE state;
 
 	u8 NumofSoundingDim;
@@ -198,7 +193,7 @@ struct _RT_CSI_INFO{
 };
 
 struct beamforming_info {
-	enum _BEAMFORMING_CAP beamforming_cap;
+	enum beamforming_cap beamforming_cap;
 	enum _BEAMFORMING_STATE beamforming_state;
 	struct beamformee_entry bfee_entry[MAX_BEAMFORMEE_ENTRY_NUM];
 	struct beamformer_entry bfer_entry[MAX_BEAMFORMER_ENTRY_NUM];
@@ -213,6 +208,7 @@ struct beamforming_info {
 	u32 beamformee_mu_reg_maping;
 	u8 first_mu_bfee_index;
 	u8 mu_bfer_curidx;
+	u8 cur_csi_rpt_rate;
 
 	struct sounding_info sounding_info;
 	/* schedule regular timer for sounding */
@@ -239,7 +235,7 @@ struct beamforming_info {
 	s8 sounding_running;
 };
 
-enum _BEAMFORMING_CAP rtw_bf_bfee_get_entry_cap_by_macid(void *mlmepriv, u8 mac_id);
+enum beamforming_cap rtw_bf_bfee_get_entry_cap_by_macid(void *mlmepriv, u8 mac_id);
 struct beamformer_entry *rtw_bf_bfer_get_entry_by_addr(PADAPTER, u8 *ra);
 struct beamformee_entry *rtw_bf_bfee_get_entry_by_addr(PADAPTER, u8 *ra);
 void rtw_bf_get_ndpa_packet(PADAPTER, union recv_frame *);
@@ -262,6 +258,21 @@ void rtw_bf_update_traffic(PADAPTER);
 #define beamforming_wk_cmd				rtw_bf_cmd
 #define update_attrib_txbf_info				rtw_bf_update_attrib
 
+#define HT_BF_CAP(adapter) ((adapter)->mlmepriv.htpriv.beamform_cap)
+#define VHT_BF_CAP(adapter) ((adapter)->mlmepriv.vhtpriv.beamform_cap)
+
+#define IS_HT_BEAMFORMEE(adapter) \
+		(HT_BF_CAP(adapter) & \
+		(BEAMFORMING_HT_BEAMFORMEE_ENABLE))
+
+#define IS_VHT_BEAMFORMEE(adapter) \
+		(VHT_BF_CAP(adapter) & \
+		(BEAMFORMING_VHT_BEAMFORMEE_ENABLE | \
+		 BEAMFORMING_VHT_MU_MIMO_STA_ENABLE))
+
+#define IS_BEAMFORMEE(adapter) (IS_HT_BEAMFORMEE(adapter) | \
+				IS_VHT_BEAMFORMEE(adapter))
+
 #else /* !RTW_BEAMFORMING_VERSION_2 */
 
 #if (BEAMFORMING_SUPPORT == 0) /*for diver defined beamforming*/
diff --git a/rtl8822BU/include/rtw_br_ext.h b/rtl8822BU/include/rtw_br_ext.h
index 1df8dc6..54ba75e 100755..100644
--- a/rtl8822BU/include/rtw_br_ext.h
+++ b/rtl8822BU/include/rtw_br_ext.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTW_BR_EXT_H_
 #define _RTW_BR_EXT_H_
 
diff --git a/rtl8822BU/include/rtw_bt_mp.h b/rtl8822BU/include/rtw_bt_mp.h
index cd6ed0a..a152d18 100755..100644
--- a/rtl8822BU/include/rtw_bt_mp.h
+++ b/rtl8822BU/include/rtw_bt_mp.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef __RTW_BT_MP_H
 #define __RTW_BT_MP_H
diff --git a/rtl8822BU/include/rtw_btcoex.h b/rtl8822BU/include/rtw_btcoex.h
index e2d6ec5..847c426 100755..100644
--- a/rtl8822BU/include/rtw_btcoex.h
+++ b/rtl8822BU/include/rtw_btcoex.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTW_BTCOEX_H__
 #define __RTW_BTCOEX_H__
 
@@ -369,6 +364,7 @@ struct bt_coex_info {
 
 void rtw_btcoex_Initialize(PADAPTER);
 void rtw_btcoex_PowerOnSetting(PADAPTER padapter);
+void rtw_btcoex_PowerOffSetting(PADAPTER padapter);
 void rtw_btcoex_PreLoadFirmware(PADAPTER padapter);
 void rtw_btcoex_HAL_Initialize(PADAPTER padapter, u8 bWifiOnly);
 void rtw_btcoex_IpsNotify(PADAPTER, u8 type);
@@ -404,6 +400,12 @@ u32 rtw_btcoex_GetDBG(PADAPTER, u8 *pStrBuf, u32 bufSize);
 u8 rtw_btcoex_IncreaseScanDeviceNum(PADAPTER);
 u8 rtw_btcoex_IsBtLinkExist(PADAPTER);
 void rtw_btcoex_pta_off_on_notify(PADAPTER padapter, u8 bBTON);
+
+#ifdef CONFIG_RF4CE_COEXIST
+void rtw_btcoex_SetRf4ceLinkState(PADAPTER padapter, u8 state);
+u8 rtw_btcoex_GetRf4ceLinkState(PADAPTER padapter);
+#endif
+
 #ifdef CONFIG_BT_COEXIST_SOCKET_TRX
 void rtw_btcoex_SetBtPatchVersion(PADAPTER padapter, u16 btHciVer, u16 btPatchVer);
 void rtw_btcoex_SetHciVersion(PADAPTER  padapter, u16 hciVersion);
@@ -437,8 +439,8 @@ u8 rtw_btcoex_get_ant_div_cfg(PADAPTER padapter);
 /* ==================================================
  * Below Functions are called by BT-Coex
  * ================================================== */
-void rtw_btcoex_rx_ampdu_apply(PADAPTER);
-void rtw_btcoex_LPS_Enter(PADAPTER);
-void rtw_btcoex_LPS_Leave(PADAPTER);
+void rtw_btcoex_rx_ampdu_apply(PADAPTER padapter);
+void rtw_btcoex_LPS_Enter(PADAPTER padapter);
+u8 rtw_btcoex_LPS_Leave(PADAPTER padapter);
 
 #endif /* __RTW_BTCOEX_H__ */
diff --git a/rtl8822BU/include/rtw_btcoex_wifionly.h b/rtl8822BU/include/rtw_btcoex_wifionly.h
index 11d36f7..5410481 100755..100644
--- a/rtl8822BU/include/rtw_btcoex_wifionly.h
+++ b/rtl8822BU/include/rtw_btcoex_wifionly.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTW_BTCOEX_WIFIONLY_H__
 #define __RTW_BTCOEX_WIFIONLY_H__
 
diff --git a/rtl8822BU/include/rtw_byteorder.h b/rtl8822BU/include/rtw_byteorder.h
index 70482d2..8e6bb7a 100755..100644
--- a/rtl8822BU/include/rtw_byteorder.h
+++ b/rtl8822BU/include/rtw_byteorder.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTL871X_BYTEORDER_H_
 #define _RTL871X_BYTEORDER_H_
 
diff --git a/rtl8822BU/include/rtw_cmd.h b/rtl8822BU/include/rtw_cmd.h
index 9e07dd7..8ae7c9a 100755..100644
--- a/rtl8822BU/include/rtw_cmd.h
+++ b/rtl8822BU/include/rtw_cmd.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTW_CMD_H_
 #define __RTW_CMD_H_
 
@@ -60,7 +55,8 @@ enum {
 struct cmd_priv {
 	_sema	cmd_queue_sema;
 	/* _sema	cmd_done_sema; */
-	_sema	terminate_cmdthread_sema;
+	_sema	start_cmdthread_sema;
+
 	_queue	cmd_queue;
 	u8	cmd_seq;
 	u8	*cmd_buf;	/* shall be non-paged, and 4 bytes aligned */
@@ -72,7 +68,7 @@ struct cmd_priv {
 	u32	rsp_cnt;
 	ATOMIC_T cmdthd_running;
 	/* u8 cmdthd_running; */
-	u8 stop_req;
+
 	_adapter *padapter;
 	_mutex sctx_mutex;
 };
@@ -90,7 +86,7 @@ struct evt_obj {
 struct	evt_priv {
 #ifdef CONFIG_EVENT_THREAD_MODE
 	_sema	evt_notify;
-	_sema	terminate_evtthread_sema;
+
 	_queue	evt_queue;
 #endif
 
@@ -192,6 +188,24 @@ extern void rtw_cmd_clr_isr(struct cmd_priv *pcmdpriv);
 extern void rtw_evt_notify_isr(struct evt_priv *pevtpriv);
 #ifdef CONFIG_P2P
 u8 p2p_protocol_wk_cmd(_adapter *padapter, int intCmdType);
+
+#ifdef CONFIG_IOCTL_CFG80211
+struct p2p_roch_parm {
+	u64 cookie;
+	struct wireless_dev *wdev;
+	struct ieee80211_channel ch;
+	enum nl80211_channel_type ch_type;
+	unsigned int duration;
+};
+
+u8 p2p_roch_cmd(_adapter *adapter
+	, u64 cookie, struct wireless_dev *wdev
+	, struct ieee80211_channel *ch, enum nl80211_channel_type ch_type
+	, unsigned int duration
+	, u8 flags
+);
+u8 p2p_cancel_roch_cmd(_adapter *adapter, u64 cookie, struct wireless_dev *wdev, u8 flags);
+#endif /* CONFIG_IOCTL_CFG80211 */
 #endif /* CONFIG_P2P */
 
 #else
@@ -516,35 +530,6 @@ struct getdatarate_rsp {
 	u8 datarates[NumRates];
 };
 
-
-/*
-Caller Mode: Any
-AP: AP can use the info for the contents of beacon frame
-Infra: STA can use the info when sitesurveying
-Ad-HoC(M): Like AP
-Ad-HoC(C): Like STA
-
-
-Notes: To set the phy capability of the NIC
-
-Command Mode
-
-*/
-
-struct	setphyinfo_parm {
-	struct regulatory_class class_sets[NUM_REGULATORYS];
-	u8	status;
-};
-
-struct	getphyinfo_parm {
-	u32 rsvd;
-};
-
-struct	getphyinfo_rsp {
-	struct regulatory_class class_sets[NUM_REGULATORYS];
-	u8	status;
-};
-
 /*
 Caller Mode: Any
 
@@ -1011,7 +996,7 @@ extern u8 rtw_setstakey_cmd(_adapter  *padapter, struct sta_info *sta, u8 key_ty
 extern u8 rtw_clearstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 enqueue);
 
 extern u8 rtw_joinbss_cmd(_adapter  *padapter, struct wlan_network *pnetwork);
-u8 rtw_disassoc_cmd(_adapter *padapter, u32 deauth_timeout_ms, bool enqueue);
+u8 rtw_disassoc_cmd(_adapter *padapter, u32 deauth_timeout_ms, int flags);
 extern u8 rtw_setopmode_cmd(_adapter  *padapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype, bool enqueue);
 extern u8 rtw_setdatarate_cmd(_adapter  *padapter, u8 *rateset);
 extern u8 rtw_setbasicrate_cmd(_adapter  *padapter, u8 *rateset);
@@ -1056,7 +1041,7 @@ extern u8 rtw_ps_cmd(_adapter *padapter);
 u8 rtw_chk_hi_queue_cmd(_adapter *padapter);
 #ifdef CONFIG_DFS_MASTER
 u8 rtw_dfs_master_cmd(_adapter *adapter, bool enqueue);
-void rtw_dfs_master_timer_hdl(RTW_TIMER_HDL_ARGS);
+void rtw_dfs_master_timer_hdl(void *ctx);
 void rtw_dfs_master_enable(_adapter *adapter, u8 ch, u8 bw, u8 offset);
 void rtw_dfs_master_disable(_adapter *adapter, u8 ch, u8 bw, u8 offset, bool by_others);
 enum {
diff --git a/rtl8822BU/include/rtw_debug.h b/rtl8822BU/include/rtw_debug.h
index e88a9df..74a26de 100755..100644
--- a/rtl8822BU/include/rtw_debug.h
+++ b/rtl8822BU/include/rtw_debug.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTW_DEBUG_H__
 #define __RTW_DEBUG_H__
 
@@ -302,6 +297,32 @@ extern uint rtw_drv_log_level;
 		} \
 	} while (0)
 
+/* dump message to selected 'stream' */
+#undef _RTW_DUMP_SEL
+#define _RTW_DUMP_SEL(sel, _HexData, _HexDataLen) \
+	do {\
+		if (sel == RTW_DBGDUMP) {\
+			int __i;								\
+			u8	*ptr = (u8 *)_HexData;				\
+			for (__i = 0; __i < (int)_HexDataLen; __i++) {				\
+				_dbgdump("%02X%s", ptr[__i], (((__i + 1) % 4) == 0) ? "  " : " ");	\
+				if (((__i + 1) % 16) == 0)	\
+					_dbgdump("\n");			\
+			}								\
+			_dbgdump("\n");							\
+		} \
+		else {\
+			int __i;								\
+			u8	*ptr = (u8 *)_HexData;				\
+			for (__i = 0; __i < (int)_HexDataLen; __i++) {				\
+				_seqdump(sel, "%02X%s", ptr[__i], (((__i + 1) % 4) == 0) ? "  " : " ");	\
+				if (((__i + 1) % 16) == 0)	\
+					_seqdump(sel, "\n");			\
+			}								\
+			_seqdump(sel, "\n");							\
+		} \
+	} while (0)
+
 #endif /* defined(_seqdump) */
 
 
@@ -325,11 +346,6 @@ void bb_reg_dump(void *sel, _adapter *adapter);
 void bb_reg_dump_ex(void *sel, _adapter *adapter);
 void rf_reg_dump(void *sel, _adapter *adapter);
 
-bool rtw_fwdl_test_trigger_chksum_fail(void);
-bool rtw_fwdl_test_trigger_wintint_rdy_fail(void);
-bool rtw_del_rx_ampdu_test_trigger_no_tx_fail(void);
-
-u32 rtw_get_wait_hiq_empty_ms(void);
 void rtw_sink_rtp_seq_dbg(_adapter *adapter, _pkt *pkt);
 
 struct sta_info;
@@ -338,7 +354,6 @@ void sta_rx_reorder_ctl_dump(void *sel, struct sta_info *sta);
 struct dvobj_priv;
 void dump_tx_rate_bmp(void *sel, struct dvobj_priv *dvobj);
 void dump_adapters_status(void *sel, struct dvobj_priv *dvobj);
-void dump_adapters_info(void *sel, struct dvobj_priv *dvobj);
 
 struct sec_cam_ent;
 void dump_sec_cam_ent(void *sel, struct sec_cam_ent *ent, int id);
@@ -398,14 +413,24 @@ ssize_t proc_set_dis_pwt(struct file *file, const char __user *buffer, size_t co
 
 int proc_get_suspend_resume_info(struct seq_file *m, void *v);
 
+bool rtw_fwdl_test_trigger_chksum_fail(void);
+bool rtw_fwdl_test_trigger_wintint_rdy_fail(void);
 ssize_t proc_set_fwdl_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
+bool rtw_del_rx_ampdu_test_trigger_no_tx_fail(void);
 ssize_t proc_set_del_rx_ampdu_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 #ifdef CONFIG_DFS_MASTER
 int proc_get_dfs_master_test_case(struct seq_file *m, void *v);
 ssize_t proc_set_dfs_master_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 #endif /* CONFIG_DFS_MASTER */
+u32 rtw_get_wait_hiq_empty_ms(void);
 ssize_t proc_set_wait_hiq_empty(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
+void rtw_sta_linking_test_set_start(void);
+bool rtw_sta_linking_test_wait_done(void);
+bool rtw_sta_linking_test_force_fail(void);
+ssize_t proc_set_sta_linking_test(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 
+int proc_get_rx_stat(struct seq_file *m, void *v);
+int proc_get_tx_stat(struct seq_file *m, void *v);
 #ifdef CONFIG_AP_MODE
 int proc_get_all_sta_info(struct seq_file *m, void *v);
 #endif /* CONFIG_AP_MODE */
@@ -438,6 +463,7 @@ ssize_t proc_set_ampdu_enable(struct file *file, const char __user *buffer, size
 
 int proc_get_mac_rptbuf(struct seq_file *m, void *v);
 
+void dump_regsty_rx_ampdu_size_limit(void *sel, _adapter *adapter);
 int proc_get_rx_ampdu(struct seq_file *m, void *v);
 ssize_t proc_set_rx_ampdu(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 
@@ -458,6 +484,9 @@ ssize_t proc_set_txbf_cap(struct file *file, const char __user *buffer, size_t c
 int proc_get_rx_ampdu_factor(struct seq_file *m, void *v);
 ssize_t proc_set_rx_ampdu_factor(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 
+int proc_get_tx_max_agg_num(struct seq_file *m, void *v);
+ssize_t proc_set_tx_max_agg_num(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
+
 int proc_get_rx_ampdu_density(struct seq_file *m, void *v);
 ssize_t proc_set_rx_ampdu_density(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 
@@ -485,6 +514,10 @@ ssize_t proc_set_rssi_disp(struct file *file, const char __user *buffer, size_t
 int proc_get_btcoex_dbg(struct seq_file *m, void *v);
 ssize_t proc_set_btcoex_dbg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 int proc_get_btcoex_info(struct seq_file *m, void *v);
+#ifdef CONFIG_RF4CE_COEXIST
+int proc_get_rf4ce_state(struct seq_file *m, void *v);
+ssize_t proc_set_rf4ce_state(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
+#endif
 #endif /* CONFIG_BT_COEXIST */
 
 #if defined(DBG_CONFIG_ERROR_DETECT)
@@ -504,6 +537,7 @@ int proc_get_int_logs(struct seq_file *m, void *v);
 #ifdef CONFIG_PCI_HCI
 int proc_get_rx_ring(struct seq_file *m, void *v);
 int proc_get_tx_ring(struct seq_file *m, void *v);
+int proc_get_pci_aspm(struct seq_file *m, void *v);
 #endif
 
 #ifdef CONFIG_WOWLAN
@@ -537,6 +571,10 @@ int proc_get_tdls_info(struct seq_file *m, void *v);
 int proc_get_monitor(struct seq_file *m, void *v);
 ssize_t proc_set_monitor(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 
+#ifdef DBG_XMIT_BLOCK
+int proc_get_xmit_block(struct seq_file *m, void *v);
+ssize_t proc_set_xmit_block(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
+#endif
 
 #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER
 int proc_get_rtkm_info(struct seq_file *m, void *v);
@@ -570,6 +608,11 @@ int proc_get_mcc_policy_table(struct seq_file *m, void *v);
 ssize_t proc_set_mcc_policy_table(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 #endif /* CONFIG_MCC_MODE */
 
+int proc_get_ack_timeout(struct seq_file *m, void *v);
+ssize_t proc_set_ack_timeout(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
+
+int proc_get_iqk_fw_offload(struct seq_file *m, void *v);
+ssize_t proc_set_iqk_fw_offload(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
 
 #define _drv_always_		1
 #define _drv_emerg_			2
diff --git a/rtl8822BU/include/rtw_eeprom.h b/rtl8822BU/include/rtw_eeprom.h
index 1d10c20..62304d5 100755..100644
--- a/rtl8822BU/include/rtw_eeprom.h
+++ b/rtl8822BU/include/rtw_eeprom.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTW_EEPROM_H__
 #define __RTW_EEPROM_H__
 
diff --git a/rtl8822BU/include/rtw_efuse.h b/rtl8822BU/include/rtw_efuse.h
index 3b14573..2e73342 100755..100644
--- a/rtl8822BU/include/rtw_efuse.h
+++ b/rtl8822BU/include/rtw_efuse.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTW_EFUSE_H__
 #define __RTW_EFUSE_H__
 
@@ -52,6 +47,8 @@ enum _EFUSE_DEF_TYPE {
 
 #define		EFUSE_MAX_HW_SIZE		1024
 #define		EFUSE_MAX_SECTION_BASE	16
+#define		EFUSE_MAX_SECTION_NUM	128
+#define		EFUSE_MAX_BANK_SIZE		512
 
 /*RTL8822B 8821C BT EFUSE Define 1 BANK 128 size logical map 1024*/ 
 #ifdef RTW_HALMAC
@@ -178,6 +175,19 @@ extern u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
 extern u8 fakeBTEfuseInitMap[];
 extern u8 fakeBTEfuseModifiedMap[];
 /*------------------------Export global variable----------------------------*/
+#define		MAX_SEGMENT_SIZE			200
+#define		MAX_SEGMENT_NUM			200
+#define		MAX_BUF_SIZE				(MAX_SEGMENT_SIZE*MAX_SEGMENT_NUM)
+#define		TMP_BUF_SIZE				100
+
+static	u8	dcmd_Return_Buffer[MAX_BUF_SIZE] = {0};
+static	u32	dcmd_Buf_Idx = 0;
+static	u32	dcmd_Finifh_Flag = 0;
+
+static	char	dcmd_Buf[TMP_BUF_SIZE];
+
+#define		rtprintf					dcmd_Store_Return_Buf
+
 u8	efuse_bt_GetCurrentSize(PADAPTER padapter, u16 *size);
 u16	efuse_bt_GetMaxSize(PADAPTER padapter);
 u16 efuse_GetavailableSize(PADAPTER adapter);
@@ -198,6 +208,8 @@ u8	Efuse_CalculateWordCnts(u8 word_en);
 void	ReadEFuseByte(PADAPTER Adapter, u16 _offset, u8 *pbuf, BOOLEAN bPseudoTest) ;
 void	EFUSE_GetEfuseDefinition(PADAPTER pAdapter, u8 efuseType, u8 type, void *pOut, BOOLEAN bPseudoTest);
 u8	efuse_OneByteRead(PADAPTER pAdapter, u16 addr, u8 *data, BOOLEAN	 bPseudoTest);
+#define efuse_onebyte_read(adapter, addr, data, pseudo_test) efuse_OneByteRead((adapter), (addr), (data), (pseudo_test))
+
 u8	efuse_OneByteWrite(PADAPTER pAdapter, u16 addr, u8 data, BOOLEAN	 bPseudoTest);
 
 void	BTEfuse_PowerSwitch(PADAPTER pAdapter, u8	bWrite, u8	 PwrState);
@@ -208,6 +220,7 @@ void	efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata);
 u8	Efuse_WordEnableDataWrite(PADAPTER pAdapter, u16 efuse_addr, u8 word_en, u8 *data, BOOLEAN bPseudoTest);
 void	EFUSE_ShadowMapUpdate(PADAPTER pAdapter, u8 efuseType, BOOLEAN bPseudoTest);
 void	EFUSE_ShadowRead(PADAPTER pAdapter, u8 Type, u16 Offset, u32 *Value);
+#define efuse_logical_map_read(adapter, type, offset, value) EFUSE_ShadowRead((adapter), (type), (offset), (value))
 
 VOID	hal_ReadEFuse_BT_logic_map(
 	PADAPTER	padapter,
@@ -223,6 +236,7 @@ u8	EfusePgPacketWrite_BT(
 	u8			bPseudoTest);
 u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter);
 void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray);
+void rtw_efuse_analyze(PADAPTER	padapter, u8 Type, u8 Fake);
 
 #define MAC_HIDDEN_MAX_BW_NUM 8
 extern const u8 _mac_hidden_max_bw_to_hal_bw_cap[];
diff --git a/rtl8822BU/include/rtw_event.h b/rtl8822BU/include/rtw_event.h
index 4516e5c..8e4d5d6 100755..100644
--- a/rtl8822BU/include/rtw_event.h
+++ b/rtl8822BU/include/rtw_event.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTW_EVENT_H_
 #define _RTW_EVENT_H_
 
diff --git a/rtl8822BU/include/rtw_ht.h b/rtl8822BU/include/rtw_ht.h
index 8ae15ed..028f2c8 100755..100644
--- a/rtl8822BU/include/rtw_ht.h
+++ b/rtl8822BU/include/rtw_ht.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTW_HT_H_
 #define _RTW_HT_H_
 
diff --git a/rtl8822BU/include/rtw_io.h b/rtl8822BU/include/rtw_io.h
index 44a1749..28430d8 100755..100644
--- a/rtl8822BU/include/rtw_io.h
+++ b/rtl8822BU/include/rtw_io.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef _RTW_IO_H_
 #define _RTW_IO_H_
diff --git a/rtl8822BU/include/rtw_ioctl.h b/rtl8822BU/include/rtw_ioctl.h
index b981bf0..4924751 100755..100644
--- a/rtl8822BU/include/rtw_ioctl.h
+++ b/rtl8822BU/include/rtw_ioctl.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTW_IOCTL_H_
 #define _RTW_IOCTL_H_
 
@@ -314,4 +309,11 @@ extern	NDIS_STATUS	drv_set_info(
 	OUT	u32			*BytesNeeded
 );
 
+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE
+extern int rtw_vendor_ie_get_raw_data(struct net_device *, u32, char *, u32);
+extern int rtw_vendor_ie_get_data(struct net_device*, int , char*);
+extern int rtw_vendor_ie_get(struct net_device *, struct iw_request_info *, union iwreq_data *, char *);
+extern int rtw_vendor_ie_set(struct net_device*, struct iw_request_info*, union iwreq_data*, char*);
+#endif
+
 #endif /*  #ifndef __INC_CEINFO_ */
diff --git a/rtl8822BU/include/rtw_ioctl_query.h b/rtl8822BU/include/rtw_ioctl_query.h
index a74d13d..cc7b557 100755..100644
--- a/rtl8822BU/include/rtw_ioctl_query.h
+++ b/rtl8822BU/include/rtw_ioctl_query.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTW_IOCTL_QUERY_H_
 #define _RTW_IOCTL_QUERY_H_
 
diff --git a/rtl8822BU/include/rtw_ioctl_rtl.h b/rtl8822BU/include/rtw_ioctl_rtl.h
index ddf798f..2df8713 100755..100644
--- a/rtl8822BU/include/rtw_ioctl_rtl.h
+++ b/rtl8822BU/include/rtw_ioctl_rtl.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTW_IOCTL_RTL_H_
 #define _RTW_IOCTL_RTL_H_
 
diff --git a/rtl8822BU/include/rtw_ioctl_set.h b/rtl8822BU/include/rtw_ioctl_set.h
index 1f87214..1d252ca 100755..100644
--- a/rtl8822BU/include/rtw_ioctl_set.h
+++ b/rtl8822BU/include/rtw_ioctl_set.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTW_IOCTL_SET_H_
 #define __RTW_IOCTL_SET_H_
 
diff --git a/rtl8822BU/include/rtw_iol.h b/rtl8822BU/include/rtw_iol.h
index b68a525..fa35a59 100755..100644
--- a/rtl8822BU/include/rtw_iol.h
+++ b/rtl8822BU/include/rtw_iol.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTW_IOL_H_
 #define __RTW_IOL_H_
 
diff --git a/rtl8822BU/include/rtw_mcc.h b/rtl8822BU/include/rtw_mcc.h
index 8a85fb0..e73e9cf 100755..100644
--- a/rtl8822BU/include/rtw_mcc.h
+++ b/rtl8822BU/include/rtw_mcc.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,11 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifdef CONFIG_MCC_MODE
 
 #ifndef _RTW_MCC_H_
diff --git a/rtl8822BU/include/rtw_mem.h b/rtl8822BU/include/rtw_mem.h
index ae6049f..229028c 100755..100644
--- a/rtl8822BU/include/rtw_mem.h
+++ b/rtl8822BU/include/rtw_mem.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTW_MEM_H__
 #define __RTW_MEM_H__
 
diff --git a/rtl8822BU/include/rtw_mi.h b/rtl8822BU/include/rtw_mi.h
index 2d8ded7..153aa39 100755..100644
--- a/rtl8822BU/include/rtw_mi.h
+++ b/rtl8822BU/include/rtw_mi.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTW_MI_H_
 #define __RTW_MI_H_
 
@@ -33,6 +28,14 @@ struct mi_state {
 	u8 adhoc_num;		/* WIFI_FW_ADHOC_STATE */
 	u8 ld_adhoc_num;	/* WIFI_FW_ADHOC_STATE && asoc_sta_count > 2 */
 	u8 uwps_num;		/*WIFI_UNDER_WPS*/
+
+#ifdef CONFIG_IOCTL_CFG80211
+	#ifdef CONFIG_P2P
+	u8 roch_num;
+	#endif
+	u8 mgmt_tx_num;
+#endif
+
 	u8 union_ch;
 	u8 union_bw;
 	u8 union_offset;
@@ -46,6 +49,19 @@ struct mi_state {
 #define MSTATE_ADHOC_NUM(_mstate)		((_mstate)->adhoc_num)
 #define MSTATE_ADHOC_LD_NUM(_mstate)	((_mstate)->ld_adhoc_num)
 #define MSTATE_WPS_NUM(_mstate)			((_mstate)->uwps_num)
+
+#if defined(CONFIG_IOCTL_CFG80211) && defined(CONFIG_P2P)
+#define MSTATE_ROCH_NUM(_mstate)		((_mstate)->roch_num)
+#else
+#define MSTATE_ROCH_NUM(_mstate)		0
+#endif
+
+#if defined(CONFIG_IOCTL_CFG80211)
+#define MSTATE_MGMT_TX_NUM(_mstate)		((_mstate)->mgmt_tx_num)
+#else
+#define MSTATE_MGMT_TX_NUM(_mstate)		0
+#endif
+
 #define MSTATE_U_CH(_mstate)			((_mstate)->union_ch)
 #define MSTATE_U_BW(_mstate)			((_mstate)->union_bw)
 #define MSTATE_U_OFFSET(_mstate)		((_mstate)->union_offset)
@@ -63,15 +79,6 @@ void rtw_mi_status_no_self(_adapter *adapter, struct mi_state *mstate);
 
 void rtw_mi_update_iface_status(struct mlme_priv *pmlmepriv, sint state);
 
-u8 rtw_mi_mp_mode_check(_adapter *padapter);
-
-#ifdef CONFIG_CONCURRENT_MODE
-#define UNDER_SURVEY_T1	1 /*buddy under suvey*/
-#define UNDER_SURVEY_T2	2 /*buddy under suvey by scan_request*/
-u8 rtw_mi_buddy_under_survey(_adapter *padapter);
-void  rtw_mi_buddy_indicate_scan_done(_adapter *padapter, bool bscan_aborted);
-#endif
-
 u8 rtw_mi_netif_stop_queue(_adapter *padapter, bool carrier_off);
 u8 rtw_mi_buddy_netif_stop_queue(_adapter *padapter, bool carrier_off);
 
@@ -223,4 +230,9 @@ _adapter *rtw_mi_get_ap_adapter(_adapter *padapter);
 
 void rtw_mi_update_ap_bmc_camid(_adapter *padapter, u8 camid_a, u8 camid_b);
 
+#ifdef CONFIG_AP_MODE
+void rtw_mi_ap_acdata_control(_adapter *padapter, u8 power_mode);
+void rtw_mi_buddy_ap_acdata_control(_adapter *padapter, u8 power_mode);
+#endif /*CONFIG_AP_MODE*/
+
 #endif /*__RTW_MI_H_*/
diff --git a/rtl8822BU/include/rtw_mlme.h b/rtl8822BU/include/rtw_mlme.h
index 2b8863d..9880aaf 100755..100644
--- a/rtl8822BU/include/rtw_mlme.h
+++ b/rtl8822BU/include/rtw_mlme.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTW_MLME_H_
 #define __RTW_MLME_H_
 
@@ -30,6 +25,9 @@
  *	Increase the scanning timeout because of increasing the SURVEY_TO value. */
 
 #define SCANNING_TIMEOUT 8000
+#ifdef	CONFIG_CHNL_LOAD_MAGT
+#define CLM_SCANNING_TIMEOUT 9000
+#endif
 #ifdef CONFIG_SCAN_BACKOP
 #define CONC_SCANNING_TIMEOUT_SINGLE_BAND 10000
 #define CONC_SCANNING_TIMEOUT_DUAL_BAND 15000
@@ -96,23 +94,39 @@ void rtw_wfd_st_switch(struct sta_info *sta, bool on);
 #define MLME_IS_MONITOR(adapter) (MLME_STATE((adapter)) & WIFI_MONITOR_STATE)
 #define MLME_IS_MP(adapter) (MLME_STATE((adapter)) & WIFI_MP_STATE)
 #ifdef CONFIG_P2P
+	#define MLME_IS_PD(adapter) rtw_p2p_chk_role(&(adapter)->wdinfo, P2P_ROLE_DEVICE)
 	#define MLME_IS_GC(adapter) rtw_p2p_chk_role(&(adapter)->wdinfo, P2P_ROLE_CLIENT)
 	#define MLME_IS_GO(adapter) rtw_p2p_chk_role(&(adapter)->wdinfo, P2P_ROLE_GO)
 #else /* !CONFIG_P2P */
+	#define MLME_IS_PD(adapter) 0
 	#define MLME_IS_GC(adapter) 0
 	#define MLME_IS_GO(adapter) 0
 #endif /* !CONFIG_P2P */
+
+#if defined(CONFIG_IOCTL_CFG80211) && defined(CONFIG_P2P)
+#define MLME_IS_ROCH(adapter) (rtw_cfg80211_get_is_roch(adapter) == _TRUE)
+#else
+#define MLME_IS_ROCH(adapter) 0
+#endif
+
 #define MLME_IS_MSRC(adapter) rtw_chk_miracast_mode((adapter), MIRACAST_SOURCE)
 #define MLME_IS_MSINK(adapter) rtw_chk_miracast_mode((adapter), MIRACAST_SINK)
 
-#define MLME_STATE_FMT "%s%s%s%s%s%s%s%s%s%s%s%s%s%s"
+#ifdef CONFIG_IOCTL_CFG80211
+#define MLME_IS_MGMT_TX(adapter) rtw_cfg80211_get_is_mgmt_tx(adapter)
+#else
+#define MLME_IS_MGMT_TX(adapter) 0
+#endif
+
+#define MLME_STATE_FMT "%s%s%s%s%s%s%s%s%s%s%s%s"
 #define MLME_STATE_ARG(adapter) \
-	MLME_IS_STA((adapter)) ? (MLME_IS_GC((adapter)) ? " GC" : " STA") : "", \
-	MLME_IS_AP((adapter)) ? (MLME_IS_GO((adapter)) ? " GO" : " AP") : "", \
-	MLME_IS_ADHOC((adapter)) ? " ADHOC" : "", \
-	MLME_IS_ADHOC_MASTER((adapter)) ? " ADHOC_M" : "", \
-	MLME_IS_MONITOR((adapter)) ? " MONITOR" : "", \
+	MLME_IS_STA((adapter)) ? (MLME_IS_GC((adapter)) ? " GC" : " STA") : \
+	MLME_IS_AP((adapter)) ? (MLME_IS_GO((adapter)) ? " GO" : " AP") : \
+	MLME_IS_ADHOC((adapter)) ? " ADHOC" : \
+	MLME_IS_ADHOC_MASTER((adapter)) ? " ADHOC_M" : \
+	MLME_IS_MONITOR((adapter)) ? " MONITOR" : \
 	MLME_IS_MP((adapter)) ? " MP" : "", \
+	MLME_IS_PD((adapter)) ? " PD" : "", \
 	MLME_IS_MSRC((adapter)) ? " MSRC" : "", \
 	MLME_IS_MSINK((adapter)) ? " MSINK" : "", \
 	(MLME_STATE((adapter)) & WIFI_SITE_MONITOR) ? " SCAN" : "", \
@@ -120,6 +134,8 @@ void rtw_wfd_st_switch(struct sta_info *sta, bool on);
 	(MLME_STATE((adapter)) & WIFI_ASOC_STATE) ? " ASOC" : "", \
 	(MLME_STATE((adapter)) & WIFI_OP_CH_SWITCHING) ? " OP_CH_SW" : "", \
 	(MLME_STATE((adapter)) & WIFI_UNDER_WPS) ? " WPS" : "", \
+	MLME_IS_ROCH((adapter)) ? " ROCH" : "", \
+	MLME_IS_MGMT_TX((adapter)) ? " MGMT_TX" : "", \
 	(MLME_STATE((adapter)) & WIFI_SLEEP_STATE) ? " SLEEP" : ""
 
 #define _FW_UNDER_LINKING	WIFI_UNDER_LINKING
@@ -180,13 +196,6 @@ SHALL not lock up more than one locks at a time!
 #define traffic_threshold	10
 #define	traffic_scan_period	500
 
-struct sitesurvey_ctrl {
-	u64	last_tx_pkts;
-	uint	last_rx_pkts;
-	sint	traffic_busy;
-	_timer	sitesurvey_ctrl_timer;
-};
-
 typedef struct _RT_LINK_DETECT_T {
 	u32				NumTxOkInPeriod;
 	u32				NumRxOkInPeriod;
@@ -297,6 +306,7 @@ struct cfg80211_wifidirect_info {
 	ATOMIC_T ro_ch_cookie_gen;
 	u64 remain_on_ch_cookie;
 	bool is_ro_ch;
+	struct wireless_dev *ro_ch_wdev;
 	u32 last_ro_ch_time; /* this will be updated at the beginning and end of ro_ch */
 };
 #endif /* CONFIG_IOCTL_CFG80211 */
@@ -583,9 +593,6 @@ struct mlme_priv {
 
 	u8	*nic_hdl;
 
-#ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42
-	u8	not_indic_disco;
-#endif
 	_list		*pscanned;
 	_queue	free_bss_pool;
 	_queue	scanned_queue;
@@ -606,6 +613,7 @@ struct mlme_priv {
 #ifdef CONFIG_ARP_KEEP_ALIVE
 	/* for arp offload keep alive */
 	u8 bGetGateway;
+	u8	GetGatewayTryCnt;
 	u8	gw_mac_addr[6];
 	u8	gw_ip[4];
 #endif
@@ -669,8 +677,6 @@ struct mlme_priv {
 	RT_LINK_DETECT_T	LinkDetectInfo;
 
 	u8	acm_mask; /* for wmm acm mask */
-	const struct country_chplan *country_ent;
-	u8	ChannelPlan;
 	RT_SCAN_TYPE	scan_mode; /* active: 1, passive: 0 */
 
 	u8 *wps_probe_req_ie;
@@ -720,31 +726,38 @@ struct mlme_priv {
 #endif
 	u8 *assoc_req;
 	u32 assoc_req_len;
+
 	u8 *assoc_rsp;
 	u32 assoc_rsp_len;
 
-	u8 *wps_beacon_ie;
 	/* u8 *wps_probe_req_ie; */
-	u8 *wps_probe_resp_ie;
-	u8 *wps_assoc_resp_ie; /* for CONFIG_IOCTL_CFG80211, this IE could include p2p ie / wfd ie */
+	/* u32 wps_probe_req_ie_len; */
 
+	u8 *wps_beacon_ie;
 	u32 wps_beacon_ie_len;
-	/* u32 wps_probe_req_ie_len; */
+
+	u8 *wps_probe_resp_ie;
 	u32 wps_probe_resp_ie_len;
-	u32 wps_assoc_resp_ie_len; /* for CONFIG_IOCTL_CFG80211, this IE len could include p2p ie / wfd ie */
 
-	u8 *p2p_beacon_ie;
-	u8 *p2p_probe_req_ie;
-	u8 *p2p_probe_resp_ie;
-	u8 *p2p_go_probe_resp_ie; /* for GO	 */
-	u8 *p2p_assoc_req_ie;
-	u8 *p2p_assoc_resp_ie;
+	u8 *wps_assoc_resp_ie;
+	u32 wps_assoc_resp_ie_len;
 
+	u8 *p2p_beacon_ie;
 	u32 p2p_beacon_ie_len;
+
+	u8 *p2p_probe_req_ie;
 	u32 p2p_probe_req_ie_len;
+
+	u8 *p2p_probe_resp_ie;
 	u32 p2p_probe_resp_ie_len;
-	u32 p2p_go_probe_resp_ie_len; /* for GO */
+
+	u8 *p2p_go_probe_resp_ie;		/* for GO */
+	u32 p2p_go_probe_resp_ie_len;	/* for GO */
+
+	u8 *p2p_assoc_req_ie;
 	u32 p2p_assoc_req_ie_len;
+
+	u8 *p2p_assoc_resp_ie;
 	u32 p2p_assoc_resp_ie_len;
 
 	_lock	bcn_update_lock;
@@ -756,21 +769,23 @@ struct mlme_priv {
 #endif /* #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) */
 
 #if defined(CONFIG_WFD) && defined(CONFIG_IOCTL_CFG80211)
-
 	u8 *wfd_beacon_ie;
-	u8 *wfd_probe_req_ie;
-	u8 *wfd_probe_resp_ie;
-	u8 *wfd_go_probe_resp_ie; /* for GO	 */
-	u8 *wfd_assoc_req_ie;
-	u8 *wfd_assoc_resp_ie;
-
 	u32 wfd_beacon_ie_len;
+
+	u8 *wfd_probe_req_ie;
 	u32 wfd_probe_req_ie_len;
+
+	u8 *wfd_probe_resp_ie;
 	u32 wfd_probe_resp_ie_len;
-	u32 wfd_go_probe_resp_ie_len; /* for GO */
+
+	u8 *wfd_go_probe_resp_ie;		/* for GO */
+	u32 wfd_go_probe_resp_ie_len;	/* for GO */
+
+	u8 *wfd_assoc_req_ie;
 	u32 wfd_assoc_req_ie_len;
-	u32 wfd_assoc_resp_ie_len;
 
+	u8 *wfd_assoc_resp_ie;
+	u32 wfd_assoc_resp_ie_len;
 #endif
 
 #ifdef RTK_DMP_PLATFORM
@@ -874,8 +889,6 @@ void rtw_sta_timeout_event_callback(_adapter *adapter, u8 *pbuf);
 void rtw_update_ft_stainfo(_adapter *padapter, WLAN_BSSID_EX *pnetwork);
 void rtw_ft_reassoc_event_callback(_adapter *padapter, u8 *pbuf);
 #endif
-extern void rtw_join_timeout_handler(RTW_TIMER_HDL_ARGS);
-extern void _rtw_scan_timeout_handler(RTW_TIMER_HDL_ARGS);
 
 thread_return event_thread(thread_context context);
 
@@ -1023,22 +1036,20 @@ extern void rtw_update_registrypriv_dev_network(_adapter *adapter);
 
 extern void rtw_get_encrypt_decrypt_from_registrypriv(_adapter *adapter);
 
-extern void _rtw_join_timeout_handler(_adapter *adapter);
-extern void rtw_scan_timeout_handler(_adapter *adapter);
+extern void rtw_join_timeout_handler(void *ctx);
+extern void rtw_scan_timeout_handler(void *ctx);
 
-extern void _dynamic_check_timer_handlder(void *FunctionContext);
-extern void rtw_dynamic_check_timer_handlder(_adapter *adapter);
+extern void rtw_dynamic_check_timer_handlder(void *ctx);
 extern void rtw_iface_dynamic_check_timer_handlder(_adapter *adapter);
 
 #ifdef CONFIG_SET_SCAN_DENY_TIMER
 bool rtw_is_scan_deny(_adapter *adapter);
 void rtw_clear_scan_deny(_adapter *adapter);
-void rtw_set_scan_deny_timer_hdl(_adapter *adapter);
+void rtw_set_scan_deny_timer_hdl(void *ctx);
 void rtw_set_scan_deny(_adapter *adapter, u32 ms);
 #else
 #define rtw_is_scan_deny(adapter) _FALSE
 #define rtw_clear_scan_deny(adapter) do {} while (0)
-#define rtw_set_scan_deny_timer_hdl(adapter) do {} while (0)
 #define rtw_set_scan_deny(adapter, ms) do {} while (0)
 #endif
 
@@ -1144,7 +1155,7 @@ void rtw_sta_media_status_rpt_cmd_hdl(_adapter *adapter, struct sta_media_status
 #ifdef CONFIG_INTEL_PROXIM
 void rtw_proxim_enable(_adapter *padapter);
 void rtw_proxim_disable(_adapter *padapter);
-void rtw_proxim_send_packet(_adapter *padapter, u8 *pbuf, u16 len, u8 hw_rate);
+void rtw_proxim_send_packet(_adapter *padapter, u8 *pbuf, u16 len, u8 m_rate);
 #endif /* CONFIG_INTEL_PROXIM */
 
 #define IPV4_SRC(_iphdr)			(((u8 *)(_iphdr)) + 12)
diff --git a/rtl8822BU/include/rtw_mlme_ext.h b/rtl8822BU/include/rtw_mlme_ext.h
index 35b14cd..2871f97 100755..100644
--- a/rtl8822BU/include/rtw_mlme_ext.h
+++ b/rtl8822BU/include/rtw_mlme_ext.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTW_MLME_EXT_H_
 #define __RTW_MLME_EXT_H_
 
@@ -26,8 +21,11 @@
  *	The Realtek 8188CE SoftAP will spend around 100ms to send the probe response after receiving the probe request.
  *	So, this driver tried to extend the dwell time for each scanning channel.
  *	This will increase the chance to receive the probe response from SoftAP. */
-
-#define SURVEY_TO		(100)
+#ifdef	CONFIG_CHNL_LOAD_MAGT
+	#define SURVEY_TO		(200)
+#else
+	#define SURVEY_TO		(100)
+#endif
 #define REAUTH_TO		(300) /* (50) */
 #define REASSOC_TO		(300) /* (50) */
 /* #define DISCONNECT_TO	(3000) */
@@ -129,6 +127,7 @@ typedef enum _RT_CHANNEL_DOMAIN {
 	RTW_CHPLAN_WORLD_KCC1 = 0x28,
 	RTW_CHPLAN_WORLD_FCC2 = 0x29,
 	RTW_CHPLAN_FCC2_NULL = 0x2A,
+	RTW_CHPLAN_IC1_IC2 = 0x2B,
 	RTW_CHPLAN_WORLD_FCC3 = 0x30,
 	RTW_CHPLAN_WORLD_FCC4 = 0x31,
 	RTW_CHPLAN_WORLD_FCC5 = 0x32,
@@ -160,6 +159,30 @@ typedef enum _RT_CHANNEL_DOMAIN {
 	RTW_CHPLAN_MKK2_MKK4 = 0x58,
 	RTW_CHPLAN_WORLD_ETSI14 = 0x59,
 	RTW_CHPLAN_FCC1_FCC5 = 0x60,
+	RTW_CHPLAN_FCC2_FCC7 = 0x61,
+	RTW_CHPLAN_FCC2_FCC1 = 0x62,
+	RTW_CHPLAN_WORLD_ETSI15 = 0x63,
+	RTW_CHPLAN_MKK2_MKK5 = 0x64,
+	RTW_CHPLAN_ETSI1_ETSI16 = 0x65,
+	RTW_CHPLAN_FCC1_FCC14 = 0x66,
+	RTW_CHPLAN_FCC1_FCC12 = 0x67,
+	RTW_CHPLAN_FCC2_FCC14 = 0x68,
+	RTW_CHPLAN_FCC2_FCC12 = 0x69,
+	RTW_CHPLAN_ETSI1_ETSI17 = 0x6A,
+	RTW_CHPLAN_WORLD_FCC16 = 0x6B,
+	RTW_CHPLAN_WORLD_FCC13 = 0x6C,
+	RTW_CHPLAN_FCC2_FCC15 = 0x6D,
+	RTW_CHPLAN_WORLD_FCC12 = 0x6E,
+	RTW_CHPLAN_NULL_ETSI8 = 0x6F,
+	RTW_CHPLAN_NULL_ETSI18 = 0x70,
+	RTW_CHPLAN_NULL_ETSI17 = 0x71,
+	RTW_CHPLAN_NULL_ETSI19 = 0x72,
+	RTW_CHPLAN_WORLD_FCC7 = 0x73,
+	RTW_CHPLAN_FCC2_FCC17 = 0x74,
+	RTW_CHPLAN_WORLD_ETSI20 = 0x75,
+	RTW_CHPLAN_FCC2_FCC11 = 0x76,
+	RTW_CHPLAN_WORLD_ETSI21 = 0x77,
+	RTW_CHPLAN_FCC1_FCC18 = 0x78,
 
 	RTW_CHPLAN_MAX,
 	RTW_CHPLAN_REALTEK_DEFINE = 0x7F,
@@ -175,6 +198,7 @@ typedef enum _RT_CHANNEL_DOMAIN_2G {
 	RTW_RD_2G_GLOBAL = 6,	/* Global domain */
 	RTW_RD_2G_MKK2 = 7,		/* Japan */
 	RTW_RD_2G_FCC2 = 8,		/* US */
+	RTW_RD_2G_IC1 = 9,		/* Canada */
 
 	RTW_RD_2G_MAX,
 } RT_CHANNEL_DOMAIN_2G, *PRT_CHANNEL_DOMAIN_2G;
@@ -190,30 +214,49 @@ typedef enum _RT_CHANNEL_DOMAIN_5G {
 	RTW_RD_5G_FCC4 = 7,		/* Venezuela */
 	RTW_RD_5G_FCC5 = 8,		/* China */
 	RTW_RD_5G_FCC6 = 9,		/*	*/
-	RTW_RD_5G_FCC7 = 10,	/* US Canada(w/o Weather radar) */
-	RTW_RD_5G_KCC1 = 11,	/* Korea */
-	RTW_RD_5G_MKK1 = 12,	/* Japan */
-	RTW_RD_5G_MKK2 = 13,	/* Japan (W52, W53) */
-	RTW_RD_5G_MKK3 = 14,	/* Japan (W56) */
-	RTW_RD_5G_NCC1 = 15,	/* Taiwan, (w/o Weather radar) */
-	RTW_RD_5G_NCC2 = 16,	/* Taiwan, Band2, Band4 */
-	RTW_RD_5G_NCC3 = 17,	/* Taiwan w/o DFS, Band4 only */
-	RTW_RD_5G_ETSI4 = 18,	/* Europe w/o DFS, Band1 only */
-	RTW_RD_5G_ETSI5 = 19,	/* Australia, New Zealand(w/o Weather radar) */
-	RTW_RD_5G_FCC8 = 20,	/* Latin America */
-	RTW_RD_5G_ETSI6 = 21,	/* Israel, Bahrain, Egypt, India, China, Malaysia */
-	RTW_RD_5G_ETSI7 = 22,	/* China */
-	RTW_RD_5G_ETSI8 = 23,	/* Jordan */
-	RTW_RD_5G_ETSI9 = 24,	/* Lebanon */
-	RTW_RD_5G_ETSI10 = 25,	/* Qatar */
-	RTW_RD_5G_ETSI11 = 26,	/* Russia */
-	RTW_RD_5G_NCC4 = 27,	/* Taiwan, (w/o Weather radar) */
-	RTW_RD_5G_ETSI12 = 28,	/* Indonesia */
-	RTW_RD_5G_FCC9 = 29,	/* (w/o Weather radar) */
-	RTW_RD_5G_ETSI13 = 30,	/* (w/o Weather radar) */
-	RTW_RD_5G_FCC10 = 31,	/* Argentina(w/o Weather radar) */
-	RTW_RD_5G_MKK4 = 32,	/* Japan (W52) */
-	RTW_RD_5G_ETSI14 = 33,	/* Russia */
+	RTW_RD_5G_FCC7 = 10,	/* US(w/o Weather radar) */
+	RTW_RD_5G_IC1 = 11,		/* Canada(w/o Weather radar) */
+	RTW_RD_5G_KCC1 = 12,	/* Korea */
+	RTW_RD_5G_MKK1 = 13,	/* Japan */
+	RTW_RD_5G_MKK2 = 14,	/* Japan (W52, W53) */
+	RTW_RD_5G_MKK3 = 15,	/* Japan (W56) */
+	RTW_RD_5G_NCC1 = 16,	/* Taiwan, (w/o Weather radar) */
+	RTW_RD_5G_NCC2 = 17,	/* Taiwan, Band2, Band4 */
+	RTW_RD_5G_NCC3 = 18,	/* Taiwan w/o DFS, Band4 only */
+	RTW_RD_5G_ETSI4 = 19,	/* Europe w/o DFS, Band1 only */
+	RTW_RD_5G_ETSI5 = 20,	/* Australia, New Zealand(w/o Weather radar) */
+	RTW_RD_5G_FCC8 = 21,	/* Latin America */
+	RTW_RD_5G_ETSI6 = 22,	/* Israel, Bahrain, Egypt, India, China, Malaysia */
+	RTW_RD_5G_ETSI7 = 23,	/* China */
+	RTW_RD_5G_ETSI8 = 24,	/* Jordan */
+	RTW_RD_5G_ETSI9 = 25,	/* Lebanon */
+	RTW_RD_5G_ETSI10 = 26,	/* Qatar */
+	RTW_RD_5G_ETSI11 = 27,	/* Russia */
+	RTW_RD_5G_NCC4 = 28,	/* Taiwan, (w/o Weather radar) */
+	RTW_RD_5G_ETSI12 = 29,	/* Indonesia */
+	RTW_RD_5G_FCC9 = 30,	/* (w/o Weather radar) */
+	RTW_RD_5G_ETSI13 = 31,	/* (w/o Weather radar) */
+	RTW_RD_5G_FCC10 = 32,	/* Argentina(w/o Weather radar) */
+	RTW_RD_5G_MKK4 = 33,	/* Japan (W52) */
+	RTW_RD_5G_ETSI14 = 34,	/* Russia */
+	RTW_RD_5G_FCC11 = 35,	/* US(include CH144) */
+	RTW_RD_5G_ETSI15 = 36,	/* Malaysia */
+	RTW_RD_5G_MKK5 = 37,	/* Japan */
+	RTW_RD_5G_ETSI16 = 38,	/* Europe */
+	RTW_RD_5G_ETSI17 = 39,	/* Europe */
+	RTW_RD_5G_FCC12 = 40,	/* FCC */
+	RTW_RD_5G_FCC13 = 41,	/* FCC */
+	RTW_RD_5G_FCC14 = 42,	/* FCC w/o Weather radar(w/o 5600~5650MHz) */
+	RTW_RD_5G_FCC15 = 43,	/* FCC w/o Band3 */
+	RTW_RD_5G_FCC16 = 44,	/* FCC w/o Band3 */
+	RTW_RD_5G_ETSI18 = 45,	/* ETSI w/o DFS Band2&3 */
+	RTW_RD_5G_ETSI19 = 46,	/* Europe */
+	RTW_RD_5G_FCC17 = 47,	/* FCC w/o Weather radar(w/o 5600~5650MHz) */
+	RTW_RD_5G_ETSI20 = 48,	/* Europe */
+	RTW_RD_5G_IC2 = 49,		/* Canada(w/o Weather radar), include ch144 */
+	RTW_RD_5G_ETSI21 = 50,	/* Australia, New Zealand(w/o Weather radar) */
+	RTW_RD_5G_FCC18 = 51,	/*  */
+	RTW_RD_5G_WORLD = 52,	/* Worldwide */
 
 	/* === Below are driver defined for legacy channel plan compatible, DON'T assign index ==== */
 	RTW_RD_5G_OLD_FCC1,
@@ -232,22 +275,30 @@ typedef struct _RT_CHANNEL_PLAN {
 	unsigned char	Len;
 } RT_CHANNEL_PLAN, *PRT_CHANNEL_PLAN;
 
-typedef struct _RT_CHANNEL_PLAN_2G {
-	unsigned char	Channel[MAX_CHANNEL_NUM_2G];
-	unsigned char	Len;
-} RT_CHANNEL_PLAN_2G, *PRT_CHANNEL_PLAN_2G;
+struct ch_list_t {
+	u8 *len_ch;
+};
 
-typedef struct _RT_CHANNEL_PLAN_5G {
-	unsigned char	Channel[MAX_CHANNEL_NUM_5G];
-	unsigned char	Len;
-} RT_CHANNEL_PLAN_5G, *PRT_CHANNEL_PLAN_5G;
+#define CH_LIST_ENT(_len, arg...) \
+	{.len_ch = (u8[_len + 1]) {_len, ##arg}, }
+
+#define CH_LIST_LEN(_ch_list) (_ch_list.len_ch[0])
+#define CH_LIST_CH(_ch_list, _i) (_ch_list.len_ch[_i + 1])
 
 typedef struct _RT_CHANNEL_PLAN_MAP {
 	u8 Index2G;
+#ifdef CONFIG_IEEE80211_BAND_5GHZ
 	u8 Index5G;
+#endif
 	u8 regd; /* value of REGULATION_TXPWR_LMT */
 } RT_CHANNEL_PLAN_MAP, *PRT_CHANNEL_PLAN_MAP;
 
+#ifdef CONFIG_IEEE80211_BAND_5GHZ
+#define CHPLAN_ENT(i2g, i5g, regd) {i2g, i5g, regd}
+#else
+#define CHPLAN_ENT(i2g, i5g, regd) {i2g, regd}
+#endif
+
 enum Associated_AP {
 	atherosAP	= 0,
 	broadcomAP	= 1,
@@ -333,6 +384,9 @@ struct ss_res {
 	u8 next_state; /* will set to state on next cmd hdl */
 	int	bss_cnt;
 	int	channel_idx;
+#ifdef CONFIG_DFS
+	u8 dfs_ch_ssid_scan;
+#endif
 	int	scan_mode;
 	u16 scan_ch_ms;
 	u8 rx_ampdu_accept;
@@ -423,6 +477,9 @@ enum TDLS_option {
 	#define RTW_BACK_OP_CH_MS 400
 #endif
 
+#define RTW_IP_ADDR_LEN 4
+#define RTW_IPv6_ADDR_LEN 16
+
 struct mlme_ext_info {
 	u32	state;
 #ifdef CONFIG_MI_WITH_MBSSID_CAM
@@ -464,6 +521,9 @@ struct mlme_ext_info {
 	u8	hidden_ssid_mode;
 	u8	VHT_enable;
 
+	u8 ip_addr[RTW_IP_ADDR_LEN];
+	u8 ip6_addr[RTW_IPv6_ADDR_LEN];
+
 	struct ADDBA_request		ADDBA_req;
 	struct WMM_para_element	WMM_param;
 	struct HT_caps_element	HT_caps;
@@ -481,8 +541,11 @@ typedef struct _RT_CHANNEL_INFO {
 #ifdef CONFIG_FIND_BEST_CHANNEL
 	u32				rx_count;
 #endif
-#ifdef CONFIG_DFS_MASTER
+#ifdef CONFIG_DFS
+	#ifdef CONFIG_DFS_MASTER
 	u32 non_ocp_end_time;
+	#endif
+	u8 hidden_bss_cnt; /* per scan count */
 #endif
 } RT_CHANNEL_INFO, *PRT_CHANNEL_INFO;
 
@@ -491,7 +554,11 @@ typedef struct _RT_CHANNEL_INFO {
 #define CAC_TIME_CE_MS (10*60*1000)
 #define NON_OCP_TIME_MS (30*60*1000)
 
+#ifdef CONFIG_TXPWR_LIMIT
+void rtw_txpwr_init_regd(struct rf_ctl_t *rfctl);
+#endif
 void rtw_rfctl_init(_adapter *adapter);
+void rtw_rfctl_deinit(_adapter *adapter);
 
 #ifdef CONFIG_DFS_MASTER
 struct rf_ctl_t;
@@ -505,7 +572,6 @@ void rtw_chset_update_non_ocp(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset);
 void rtw_chset_update_non_ocp_ms(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset, int ms);
 u32 rtw_get_ch_waiting_ms(_adapter *adapter, u8 ch, u8 bw, u8 offset, u32 *r_non_ocp_ms, u32 *r_cac_ms);
 void rtw_reset_cac(_adapter *adapter, u8 ch, u8 bw, u8 offset);
-bool rtw_choose_shortest_waiting_ch(_adapter *adapter, u8 req_bw, u8 *dec_ch, u8 *dec_bw, u8 *dec_offset, u8 d_flags);
 #else
 #define CH_IS_NON_OCP(rt_ch_info) 0
 #define rtw_chset_is_ch_non_ocp(ch_set, ch, bw, offset) _FALSE
@@ -521,6 +587,9 @@ enum {
 	RTW_CHF_NON_LONG_CAC = BIT5,
 	RTW_CHF_NON_OCP = BIT6,
 };
+
+bool rtw_choose_shortest_waiting_ch(_adapter *adapter, u8 req_bw, u8 *dec_ch, u8 *dec_bw, u8 *dec_offset, u8 d_flags);
+
 void dump_country_chplan(void *sel, const struct country_chplan *ent);
 void dump_country_chplan_map(void *sel);
 void dump_chplan_id_list(void *sel);
@@ -528,7 +597,7 @@ void dump_chplan_test(void *sel);
 void dump_chset(void *sel, RT_CHANNEL_INFO *ch_set);
 void dump_cur_chset(void *sel, _adapter *adapter);
 
-int rtw_ch_set_search_ch(RT_CHANNEL_INFO *ch_set, const u32 ch);
+int rtw_chset_search_ch(RT_CHANNEL_INFO *ch_set, const u32 ch);
 u8 rtw_chset_is_chbw_valid(RT_CHANNEL_INFO *ch_set, u8 ch, u8 bw, u8 offset);
 
 bool rtw_mlme_band_check(_adapter *adapter, const u32 ch);
@@ -594,9 +663,6 @@ struct mlme_ext_priv {
 	unsigned char	cur_ch_offset;/* PRIME_CHNL_OFFSET */
 	unsigned char	cur_wireless_mode;	/* NETWORK_TYPE */
 
-	unsigned char	max_chan_nums;
-	RT_CHANNEL_INFO		channel_set[MAX_CHANNEL_NUM];
-	struct p2p_channels channel_list;
 	unsigned char	basicrate[NumRates];
 	unsigned char	datarate[NumRates];
 #ifdef CONFIG_80211N_HT
@@ -613,7 +679,6 @@ struct mlme_ext_priv {
 	_timer		ft_roam_timer;
 #endif
 
-	/* _timer		ADDBA_timer; */
 	u32 last_scan_time;
 	u8	scan_abort;
 	u8	tx_rate; /* TXRATE when USERATE is set. */
@@ -717,8 +782,6 @@ void init_mlme_default_rate_set(_adapter *padapter);
 int init_mlme_ext_priv(_adapter *padapter);
 int init_hw_mlme_ext(_adapter *padapter);
 void free_mlme_ext_priv(struct mlme_ext_priv *pmlmeext);
-extern void init_mlme_ext_timer(_adapter *padapter);
-extern void init_addba_retry_timer(_adapter *padapter, struct sta_info *psta);
 extern struct xmit_frame *alloc_mgtxmitframe(struct xmit_priv *pxmitpriv);
 struct xmit_frame *alloc_mgtxmitframe_once(struct xmit_priv *pxmitpriv);
 
@@ -805,6 +868,7 @@ void	update_ldpc_stbc_cap(struct sta_info *psta);
 
 int rtw_get_bcn_keys(ADAPTER *Adapter, u8 *pframe, u32 packet_len,
 		struct beacon_keys *recv_beacon);
+int validate_beacon_len(u8 *pframe, uint len);
 void rtw_dump_bcn_keys(struct beacon_keys *recv_beacon);
 int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len);
 void update_beacon_info(_adapter *padapter, u8 *pframe, uint len, struct sta_info *psta);
@@ -821,7 +885,6 @@ int rtw_ies_get_supported_rate(u8 *ies, uint ies_len, u8 *rate_set, u8 *rate_num
 void update_sta_info(_adapter *padapter, struct sta_info *psta);
 unsigned int update_basic_rate(unsigned char *ptn, unsigned int ptn_sz);
 unsigned int update_supported_rate(unsigned char *ptn, unsigned int ptn_sz);
-unsigned int update_MCS_rate(struct HT_caps_element *pHT_caps);
 void Update_RA_Entry(_adapter *padapter, struct sta_info *psta);
 void set_sta_rate(_adapter *padapter, struct sta_info *psta);
 
@@ -893,6 +956,7 @@ s32 dump_mgntframe_and_wait_ack(_adapter *padapter, struct xmit_frame *pmgntfram
 s32 dump_mgntframe_and_wait_ack_timeout(_adapter *padapter, struct xmit_frame *pmgntframe, int timeout_ms);
 
 #ifdef CONFIG_P2P
+int get_reg_classes_full_count(struct p2p_channels *channel_list);
 void issue_probersp_p2p(_adapter *padapter, unsigned char *da);
 void issue_p2p_provision_request(_adapter *padapter, u8 *pssid, u8 ussidlen, u8 *pdev_raddr);
 void issue_p2p_GO_request(_adapter *padapter, u8 *raddr);
@@ -925,7 +989,6 @@ int issue_del_ba_ex(_adapter *adapter, unsigned char *ra, u8 tid, u16 reason, u8
 #ifdef CONFIG_IEEE80211W
 void issue_action_SA_Query(_adapter *padapter, unsigned char *raddr, unsigned char action, unsigned short tid, u8 key_type);
 int issue_deauth_11w(_adapter *padapter, unsigned char *da, unsigned short reason, u8 key_type);
-extern void init_dot11w_expire_timer(_adapter *padapter, struct sta_info *psta);
 #endif /* CONFIG_IEEE80211W */
 int issue_action_SM_PS(_adapter *padapter ,  unsigned char *raddr , u8 NewMimoPsMode);
 int issue_action_SM_PS_wait_ack(_adapter *padapter, unsigned char *raddr, u8 NewMimoPsMode, int try_cnt, int wait_ms);
@@ -974,6 +1037,7 @@ bool rtw_rx_ampdu_is_accept(_adapter *adapter);
 bool rtw_rx_ampdu_set_size(_adapter *adapter, u8 size, u8 reason);
 bool rtw_rx_ampdu_set_accept(_adapter *adapter, u8 accept, u8 reason);
 u8 rx_ampdu_apply_sta_tid(_adapter *adapter, struct sta_info *sta, u8 tid, u8 accept, u8 size);
+u8 rx_ampdu_size_sta_limit(_adapter *adapter, struct sta_info *sta);
 u8 rx_ampdu_apply_sta(_adapter *adapter, struct sta_info *sta, u8 accept, u8 size);
 u16 rtw_rx_ampdu_apply(_adapter *adapter);
 
@@ -993,8 +1057,8 @@ void start_clnt_ft_action(_adapter *padapter, u8 *pTargetAddr);
 void issue_action_ft_request(_adapter *padapter, u8 *pTargetAddr);
 void report_ft_event(_adapter *padapter);
 void report_ft_reassoc_event(_adapter *padapter, u8 *pMacAddr);
-void ft_link_timer_hdl(_adapter *padapter);
-void ft_roam_timer_hdl(_adapter *padapter);
+void ft_link_timer_hdl(void *ctx);
+void ft_roam_timer_hdl(void *ctx);
 #endif
 void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res);
 void mlmeext_sta_del_event_callback(_adapter *padapter);
@@ -1004,11 +1068,11 @@ void linked_status_chk(_adapter *padapter, u8 from_timer);
 
 void _linked_info_dump(_adapter *padapter);
 
-void survey_timer_hdl(_adapter *padapter);
-void link_timer_hdl(_adapter *padapter);
-void addba_timer_hdl(struct sta_info *psta);
+void survey_timer_hdl(void *ctx);
+void link_timer_hdl(void *ctx);
+void addba_timer_hdl(void *ctx);
 #ifdef CONFIG_IEEE80211W
-void sa_query_timer_hdl(struct sta_info *psta);
+void sa_query_timer_hdl(void *ctx);
 #endif /* CONFIG_IEEE80211W */
 #if 0
 void reauth_timer_hdl(_adapter *padapter);
@@ -1125,8 +1189,8 @@ struct cmd_hdl wlancmds[] = {
 	GEN_MLME_EXT_HANDLER(sizeof(struct getbasicrate_parm), NULL)
 	GEN_MLME_EXT_HANDLER(sizeof(struct setdatarate_parm), NULL)
 	GEN_MLME_EXT_HANDLER(sizeof(struct getdatarate_parm), NULL)
-	GEN_MLME_EXT_HANDLER(sizeof(struct setphyinfo_parm), NULL)
-	GEN_MLME_EXT_HANDLER(sizeof(struct getphyinfo_parm), NULL)   /*30*/
+	GEN_MLME_EXT_HANDLER(0, NULL)
+	GEN_MLME_EXT_HANDLER(0, NULL)   /*30*/
 	GEN_MLME_EXT_HANDLER(sizeof(struct setphy_parm), NULL)
 	GEN_MLME_EXT_HANDLER(sizeof(struct getphy_parm), NULL)
 	GEN_MLME_EXT_HANDLER(0, NULL)
diff --git a/rtl8822BU/include/rtw_mp.h b/rtl8822BU/include/rtw_mp.h
index 4cd7f32..c645f37 100755..100644
--- a/rtl8822BU/include/rtw_mp.h
+++ b/rtl8822BU/include/rtw_mp.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTW_MP_H_
 #define _RTW_MP_H_
 
@@ -340,6 +335,8 @@ enum {
 	MP_HW_TX_MODE,
 	MP_GET_TXPOWER_INX,
 	MP_CUSTOMER_STR,
+	MP_PWRLMT,
+	MP_PWRBYRATE,
 	MP_NULL,
 	MP_SetBT,
 #ifdef CONFIG_APPEND_VENDOR_IE_ENABLE
@@ -757,7 +754,7 @@ void	GetPowerTracking(PADAPTER padapter, u8 *enable);
 u32	mp_query_psd(PADAPTER pAdapter, u8 *data);
 void	rtw_mp_trigger_iqk(PADAPTER padapter);
 void	rtw_mp_trigger_lck(PADAPTER padapter);
-
+u8 rtw_mp_mode_check(PADAPTER padapter);
 
 
 void hal_mpt_SwitchRfSetting(PADAPTER pAdapter);
@@ -917,6 +914,12 @@ int rtw_mp_getver(struct net_device *dev,
 int rtw_mp_mon(struct net_device *dev,
 		struct iw_request_info *info,
 		union iwreq_data *wrqu, char *extra);
+int rtw_mp_pwrlmt(struct net_device *dev,
+		struct iw_request_info *info,
+		union iwreq_data *wrqu, char *extra);
+int rtw_mp_pwrbyrate(struct net_device *dev,
+		struct iw_request_info *info,
+		union iwreq_data *wrqu, char *extra);
 int rtw_efuse_mask_file(struct net_device *dev,
 		struct iw_request_info *info,
 		union iwreq_data *wrqu, char *extra);
diff --git a/rtl8822BU/include/rtw_mp_ioctl.h b/rtl8822BU/include/rtw_mp_ioctl.h
index e6a9a23..a9dabfc 100755..100644
--- a/rtl8822BU/include/rtw_mp_ioctl.h
+++ b/rtl8822BU/include/rtw_mp_ioctl.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTW_MP_IOCTL_H_
 #define _RTW_MP_IOCTL_H_
 
diff --git a/rtl8822BU/include/rtw_mp_phy_regdef.h b/rtl8822BU/include/rtw_mp_phy_regdef.h
index 5f79e46..be62780 100755..100644
--- a/rtl8822BU/include/rtw_mp_phy_regdef.h
+++ b/rtl8822BU/include/rtw_mp_phy_regdef.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 /*****************************************************************************
  *
  * Module:	__RTW_MP_PHY_REGDEF_H_
diff --git a/rtl8822BU/include/rtw_odm.h b/rtl8822BU/include/rtw_odm.h
index d66bf3c..bcb4ea9 100755..100644
--- a/rtl8822BU/include/rtw_odm.h
+++ b/rtl8822BU/include/rtw_odm.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTW_ODM_H__
 #define __RTW_ODM_H__
 
@@ -25,6 +20,44 @@
 /*
 * This file provides utilities/wrappers for rtw driver to use ODM
 */
+typedef enum _HAL_PHYDM_OPS {
+	HAL_PHYDM_DIS_ALL_FUNC,
+	HAL_PHYDM_FUNC_SET,
+	HAL_PHYDM_FUNC_CLR,
+	HAL_PHYDM_ABILITY_BK,
+	HAL_PHYDM_ABILITY_RESTORE,
+	HAL_PHYDM_ABILITY_SET,
+	HAL_PHYDM_ABILITY_GET,
+} HAL_PHYDM_OPS;
+
+
+#define DYNAMIC_FUNC_DISABLE		(0x0)
+	u32 rtw_phydm_ability_ops(_adapter *adapter, HAL_PHYDM_OPS ops, u32 ability);
+
+#define rtw_phydm_func_disable_all(adapter)	\
+		rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0)
+
+#define rtw_phydm_func_for_offchannel(adapter) \
+		do { \
+			rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0); \
+			if (rtw_odm_adaptivity_needed(adapter)) \
+				rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_SET, ODM_BB_ADAPTIVITY); \
+		} while (0)
+
+#define rtw_phydm_func_clr(adapter, ability)	\
+		rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_CLR, ability)
+
+#define rtw_phydm_ability_backup(adapter)	\
+		rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_BK, 0)
+
+#define rtw_phydm_ability_restore(adapter)	\
+		rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_RESTORE, 0)
+
+
+static inline u32 rtw_phydm_ability_get(_adapter *adapter)
+{
+	return rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_GET, 0);
+}
 
 
 void rtw_odm_init_ic_type(_adapter *adapter);
@@ -41,11 +74,15 @@ void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter);
 void rtw_odm_acquirespinlock(_adapter *adapter,	enum rt_spinlock_type type);
 void rtw_odm_releasespinlock(_adapter *adapter,	enum rt_spinlock_type type);
 
-#ifdef CONFIG_DFS_MASTER
 u8 rtw_odm_get_dfs_domain(_adapter *adapter);
+u8 rtw_odm_dfs_domain_unknown(_adapter *adapter);
+#ifdef CONFIG_DFS_MASTER
 VOID rtw_odm_radar_detect_reset(_adapter *adapter);
 VOID rtw_odm_radar_detect_disable(_adapter *adapter);
 VOID rtw_odm_radar_detect_enable(_adapter *adapter);
 BOOLEAN rtw_odm_radar_detect(_adapter *adapter);
 #endif /* CONFIG_DFS_MASTER */
+
+void rtw_odm_parse_rx_phy_status_chinfo(union recv_frame *rframe, u8 *phys);
+
 #endif /* __RTW_ODM_H__ */
diff --git a/rtl8822BU/include/rtw_p2p.h b/rtl8822BU/include/rtw_p2p.h
index ce32c72..f5fe3c1 100755..100644
--- a/rtl8822BU/include/rtw_p2p.h
+++ b/rtl8822BU/include/rtw_p2p.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTW_P2P_H_
 #define __RTW_P2P_H_
 
@@ -66,7 +61,7 @@ u8 process_p2p_group_negotation_confirm(struct wifidirect_info *pwdinfo, u8 *pfr
 u8 process_p2p_presence_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len);
 int process_p2p_cross_connect_ie(PADAPTER padapter, u8 *IEs, u32 IELength);
 
-void p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType);
+s32 p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType, u8 *buf);
 
 #ifdef CONFIG_P2P_PS
 void	process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength);
diff --git a/rtl8822BU/include/rtw_pwrctrl.h b/rtl8822BU/include/rtw_pwrctrl.h
index 1f170a9..1d5dfe9 100755..100644
--- a/rtl8822BU/include/rtw_pwrctrl.h
+++ b/rtl8822BU/include/rtw_pwrctrl.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTW_PWRCTRL_H_
 #define __RTW_PWRCTRL_H_
 
@@ -48,10 +43,10 @@
 #ifdef CONFIG_DEFAULT_PATTERNS_EN
 	#ifdef CONFIG_PLATFORM_ANDROID_INTEL_X86
 		/* TCP/ICMP/UDP multicast with specific IP addr */
-		#define DEFAULT_PATTERN_NUM 3
+		#define DEFAULT_PATTERN_NUM 4
 	#else
 		/* TCP/ICMP */
-		#define DEFAULT_PATTERN_NUM 2
+		#define DEFAULT_PATTERN_NUM 3
 	#endif
 #else
 	#define DEFAULT_PATTERN_NUM 0
@@ -98,6 +93,13 @@ enum Power_Mgnt {
 	PS_MODE_NUM,
 };
 
+enum lps_level {
+	LPS_NORMAL = 0,
+	LPS_LCLK,
+	LPS_PG,
+	LPS_LEVEL_MAX,
+};
+
 #ifdef CONFIG_PNO_SUPPORT
 #define MAX_PNO_LIST_COUNT 16
 #define MAX_SCAN_LIST_COUNT 14	/* 2.4G only */
@@ -383,13 +385,14 @@ struct pwrctrl_priv {
 	u8		wowlan_mode;
 	u8		wowlan_p2p_mode;
 	u8		wowlan_pno_enable;
+	u8		wowlan_in_resume;
 #ifdef CONFIG_GPIO_WAKEUP
 	u8		is_high_active;
 #endif /* CONFIG_GPIO_WAKEUP */
 #ifdef CONFIG_WOWLAN
+	u8		wowlan_ns_offload_en;
 	u8		wowlan_txpause_status;
 	u8		wowlan_pattern_idx;
-	u8		wowlan_in_resume;
 	u64		wowlan_fw_iv;
 	struct rtl_priv_pattern	patterns[MAX_WKFM_CAM_NUM];
 #ifdef CONFIG_PNO_SUPPORT
@@ -403,6 +406,7 @@ struct pwrctrl_priv {
 #endif
 	u8		wowlan_aoac_rpt_loc;
 	struct aoac_report wowlan_aoac_rpt;
+	u8		wowlan_dis_lps;/*for debug purpose*/
 #endif /* CONFIG_WOWLAN */
 	_timer	pwr_state_check_timer;
 	int		pwr_state_check_interval;
@@ -442,7 +446,8 @@ struct pwrctrl_priv {
 #ifdef CONFIG_LPS_POFF
 	lps_poff_info_t	*plps_poff_info;
 #endif
-
+	u8 lps_level_bk;
+	u8 lps_level; /*LPS_NORMAL,LPA_CG,LPS_PG*/
 #ifdef CONFIG_LPS_PG
 	u8 lpspg_rsvd_page_locate;
 	u8 blpspg_info_up;
@@ -514,6 +519,7 @@ void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets);
 void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg);
 void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable);
 void rtw_set_rpwm(_adapter *padapter, u8 val8);
+void rtw_wow_lps_level_decide(_adapter *adapter, u8 wow_en);
 #endif
 
 #ifdef CONFIG_RESUME_IN_WORKQUEUE
@@ -541,6 +547,7 @@ int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller);
 #define rtw_pwr_wakeup_ex(adapter, ips_deffer_ms) _rtw_pwr_wakeup(adapter, ips_deffer_ms, __FUNCTION__)
 int rtw_pm_set_ips(_adapter *padapter, u8 mode);
 int rtw_pm_set_lps(_adapter *padapter, u8 mode);
+int rtw_pm_set_lps_level(_adapter *padapter, u8 level);
 
 void rtw_ps_deny(PADAPTER padapter, PS_DENY_REASON reason);
 void rtw_ps_deny_cancel(PADAPTER padapter, PS_DENY_REASON reason);
diff --git a/rtl8822BU/include/rtw_qos.h b/rtl8822BU/include/rtw_qos.h
index 57555e1..380120f 100755..100644
--- a/rtl8822BU/include/rtw_qos.h
+++ b/rtl8822BU/include/rtw_qos.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 
 #ifndef _RTW_QOS_H_
diff --git a/rtl8822BU/include/rtw_recv.h b/rtl8822BU/include/rtw_recv.h
index 660dc3e..750dff1 100755..100644
--- a/rtl8822BU/include/rtw_recv.h
+++ b/rtl8822BU/include/rtw_recv.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTW_RECV_H_
 #define _RTW_RECV_H_
 
@@ -40,11 +35,7 @@
 		#if defined(CONFIG_GSPI_HCI)
 			#define NR_RECVBUFF (32)
 		#elif defined(CONFIG_SDIO_HCI)
-#ifdef CONFIG_RECV_THREAD_MODE
-			#define NR_RECVBUFF (16)
-#else
 			#define NR_RECVBUFF (8)
-#endif
 		#else
 			#define NR_RECVBUFF (8)
 		#endif
@@ -265,6 +256,7 @@ struct rx_pkt_attrib	{
 	u8	key_index;
 
 	u8	data_rate;
+	u8 ch; /* RX channel */
 	u8	bw;
 	u8	stbc;
 	u8	ldpc;
@@ -375,7 +367,7 @@ struct recv_priv {
 
 #ifdef CONFIG_RECV_THREAD_MODE
 	_sema	recv_sema;
-	_sema	terminate_recvthread_sema;
+
 #endif
 
 	/* _queue	blk_strms[MAX_RX_NUMBLKS];    */ /* keeping the block ack frame until return ack */
diff --git a/rtl8822BU/include/rtw_rf.h b/rtl8822BU/include/rtw_rf.h
index 6b30b87..113adf3 100755..100644
--- a/rtl8822BU/include/rtw_rf.h
+++ b/rtl8822BU/include/rtw_rf.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,39 +11,16 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef	__RTW_RF_H_
 #define __RTW_RF_H_
 
-
-#define OFDM_PHY		1
-#define MIXED_PHY		2
-#define CCK_PHY		3
-
 #define NumRates	(13)
 
 /* slot time for 11g */
 #define SHORT_SLOT_TIME					9
 #define NON_SHORT_SLOT_TIME				20
 
-#define RTL8711_RF_MAX_SENS 6
-#define RTL8711_RF_DEF_SENS 4
-
-/*
- * We now define the following channels as the max channels in each channel plan.
- * 2G, total 14 chnls
- * {1,2,3,4,5,6,7,8,9,10,11,12,13,14}
- * 5G, total 24 chnls
- * {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165} */
-#define	MAX_CHANNEL_NUM_2G				14
-#define	MAX_CHANNEL_NUM_5G				24
-#define	MAX_CHANNEL_NUM					38/* 14+24 */
-
 #define CENTER_CH_2G_40M_NUM	9
 #define CENTER_CH_2G_NUM		14
 #define CENTER_CH_5G_20M_NUM	28	/* 20M center channels */
@@ -52,6 +29,10 @@
 #define CENTER_CH_5G_160M_NUM	3	/* 160M center channels */
 #define CENTER_CH_5G_ALL_NUM	(CENTER_CH_5G_20M_NUM + CENTER_CH_5G_40M_NUM + CENTER_CH_5G_80M_NUM)
 
+#define	MAX_CHANNEL_NUM_2G	CENTER_CH_2G_NUM
+#define	MAX_CHANNEL_NUM_5G	CENTER_CH_5G_20M_NUM
+#define	MAX_CHANNEL_NUM		(MAX_CHANNEL_NUM_2G + MAX_CHANNEL_NUM_5G)
+
 extern u8 center_ch_2g[CENTER_CH_2G_NUM];
 extern u8 center_ch_2g_40m[CENTER_CH_2G_40M_NUM];
 
@@ -73,24 +54,6 @@ u8 rtw_get_op_chs_by_cch_bw(u8 cch, u8 bw, u8 **op_chs, u8 *op_ch_num);
 
 u8 rtw_get_ch_group(u8 ch, u8 *group, u8 *cck_group);
 
-/* #define NUM_REGULATORYS	21 */
-#define NUM_REGULATORYS	1
-
-/* Country codes */
-#define USA							0x555320
-#define EUROPE						0x1 /* temp, should be provided later	 */
-#define JAPAN						0x2 /* temp, should be provided later	 */
-
-struct	regulatory_class {
-	u32	starting_freq;					/* MHz, */
-	u8	channel_set[MAX_CHANNEL_NUM];
-	u8	channel_cck_power[MAX_CHANNEL_NUM];/* dbm */
-	u8	channel_ofdm_power[MAX_CHANNEL_NUM];/* dbm */
-	u8	txpower_limit;  				/* dbm */
-	u8	channel_spacing;				/* MHz */
-	u8	modem;
-};
-
 typedef enum _CAPABILITY {
 	cESS			= 0x0001,
 	cIBSS			= 0x0002,
@@ -116,18 +79,6 @@ enum	_REG_PREAMBLE_MODE {
 	PREAMBLE_SHORT	= 3,
 };
 
-
-enum _RTL8712_RF_MIMO_CONFIG_ {
-	RTL8712_RFCONFIG_1T = 0x10,
-	RTL8712_RFCONFIG_2T = 0x20,
-	RTL8712_RFCONFIG_1R = 0x01,
-	RTL8712_RFCONFIG_2R = 0x02,
-	RTL8712_RFCONFIG_1T1R = 0x11,
-	RTL8712_RFCONFIG_1T2R = 0x12,
-	RTL8712_RFCONFIG_TURBO = 0x92,
-	RTL8712_RFCONFIG_2T2R = 0x22
-};
-
 typedef enum _RF_PATH {
 	RF_PATH_A = 0,
 	RF_PATH_B = 1,
@@ -214,9 +165,17 @@ typedef	enum _RT_RF_TYPE_DEFINITION {
 	RF_3T4R	= 7,
 	RF_4T4R	= 8,
 
-	RF_MAX_TYPE = 0xF, /* u1Byte */
+	RF_TYPE_AUTO,
 } RT_RF_TYPE_DEF_E;
 
+#define RF_TYPE_VALID(rf_type) (rf_type < RF_TYPE_AUTO)
+
+extern const u8 _rf_type_to_rf_tx_cnt[];
+#define rf_type_to_rf_tx_cnt(rf_type) (RF_TYPE_VALID(rf_type) ? _rf_type_to_rf_tx_cnt[rf_type] : 0)
+
+extern const u8 _rf_type_to_rf_rx_cnt[];
+#define rf_type_to_rf_rx_cnt(rf_type) (RF_TYPE_VALID(rf_type) ? _rf_type_to_rf_rx_cnt[rf_type] : 0)
+
 int rtw_ch2freq(int chan);
 int rtw_freq2ch(int freq);
 bool rtw_chbw_to_freq_range(u8 ch, u8 bw, u8 offset, u32 *hi, u32 *lo);
@@ -229,6 +188,8 @@ bool rtw_chbw_to_freq_range(u8 ch, u8 bw, u8 offset, u32 *hi, u32 *lo);
 #define RTW_MODULE_RTL8723BE_HMC_M2		BIT5 /* RTL8723BE(HMC + M.2) */
 #define RTW_MODULE_RTL8723BS_NGFF1216	BIT6 /* RTL8723BS(NGFF1216) */
 #define RTW_MODULE_RTL8192EEBT_HMC_M2	BIT7 /* RTL8192EEBT(8192EE+8761AU)_(HMC + M.2) */
+#define RTW_MODULE_RTL8723DE_NGFF1630	BIT8 /* RTL8723DE(NGFF1630) */
+#define RTW_MODULE_RTL8822BE			BIT9 /* RTL8822BE */
 
 #define IS_ALPHA2_NO_SPECIFIED(_alpha2) ((*((u16 *)(_alpha2))) == 0xFFFF)
 
@@ -239,7 +200,7 @@ struct country_chplan {
 	u8 en_11ac;
 #endif
 #if RTW_DEF_MODULE_REGULATORY_CERT
-	u8 def_module_flags; /* RTW_MODULE_RTLXXX */
+	u16 def_module_flags; /* RTW_MODULE_RTLXXX */
 #endif
 };
 
@@ -257,6 +218,46 @@ struct country_chplan {
 
 const struct country_chplan *rtw_get_chplan_from_country(const char *country_code);
 
+struct rf_ctl_t;
+
+typedef enum _REGULATION_TXPWR_LMT {
+	TXPWR_LMT_NONE = 0, /* no limit */
+	TXPWR_LMT_FCC = 1,
+	TXPWR_LMT_MKK = 2,
+	TXPWR_LMT_ETSI = 3,
+	TXPWR_LMT_IC = 4,
+	TXPWR_LMT_KCC = 5,
+	TXPWR_LMT_WW = 6, /* smallest of all available limit, keep last */
+} REGULATION_TXPWR_LMT;
+
+extern const char *const _regd_str[];
+#define regd_str(regd) (((regd) > TXPWR_LMT_WW) ? _regd_str[TXPWR_LMT_WW] : _regd_str[(regd)])
+
+#ifdef CONFIG_TXPWR_LIMIT
+struct regd_exc_ent {
+	_list list;
+	char country[2];
+	u8 domain;
+	char regd_name[0];
+};
+
+void dump_regd_exc_list(void *sel, struct rf_ctl_t *rfctl);
+void rtw_regd_exc_add_with_nlen(struct rf_ctl_t *rfctl, const char *country, u8 domain, const char *regd_name, u32 nlen);
+void rtw_regd_exc_add(struct rf_ctl_t *rfctl, const char *country, u8 domain, const char *regd_name);
+struct regd_exc_ent *_rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *country, u8 domain);
+struct regd_exc_ent *rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *country, u8 domain);
+void rtw_regd_exc_list_free(struct rf_ctl_t *rfctl);
+
+void dump_txpwr_lmt(void *sel, _adapter *adapter);
+void rtw_txpwr_lmt_add_with_nlen(struct rf_ctl_t *rfctl, const char *regd_name, u32 nlen
+	, u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt);
+void rtw_txpwr_lmt_add(struct rf_ctl_t *rfctl, const char *regd_name
+	, u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt);
+struct txpwr_lmt_ent *_rtw_txpwr_lmt_get_by_name(struct rf_ctl_t *rfctl, const char *regd_name);
+struct txpwr_lmt_ent *rtw_txpwr_lmt_get_by_name(struct rf_ctl_t *rfctl, const char *regd_name);
+void rtw_txpwr_lmt_list_free(struct rf_ctl_t *rfctl);
+#endif /* CONFIG_TXPWR_LIMIT */
+
 #define BB_GAIN_2G 0
 #ifdef CONFIG_IEEE80211_BAND_5GHZ
 #define BB_GAIN_5GLB1 1
@@ -276,8 +277,14 @@ int rtw_ch_to_bb_gain_sel(int ch);
 void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset);
 void rtw_rf_apply_tx_gain_offset(_adapter *adapter, u8 ch);
 
-bool rtw_is_dfs_range(u32 hi, u32 lo);
-bool rtw_is_dfs_ch(u8 ch, u8 bw, u8 offset);
+u8 rtw_is_5g_band1(u8 ch);
+u8 rtw_is_5g_band2(u8 ch);
+u8 rtw_is_5g_band3(u8 ch);
+u8 rtw_is_5g_band4(u8 ch);
+
+u8 rtw_is_dfs_range(u32 hi, u32 lo);
+u8 rtw_is_dfs_ch(u8 ch);
+u8 rtw_is_dfs_chbw(u8 ch, u8 bw, u8 offset);
 bool rtw_is_long_cac_range(u32 hi, u32 lo, u8 dfs_region);
 bool rtw_is_long_cac_ch(u8 ch, u8 bw, u8 offset, u8 dfs_region);
 
diff --git a/rtl8822BU/include/rtw_sdio.h b/rtl8822BU/include/rtw_sdio.h
index da86a3a..7490b54 100755..100644
--- a/rtl8822BU/include/rtw_sdio.h
+++ b/rtl8822BU/include/rtw_sdio.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2015 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,11 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTW_SDIO_H_
 #define _RTW_SDIO_H_
 
diff --git a/rtl8822BU/include/rtw_security.h b/rtl8822BU/include/rtw_security.h
index df1a973..ca7c526 100755..100644
--- a/rtl8822BU/include/rtw_security.h
+++ b/rtl8822BU/include/rtw_security.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTW_SECURITY_H_
 #define __RTW_SECURITY_H_
 
@@ -174,7 +169,6 @@ struct security_priv {
 	u8	binstallBIPkey;
 #endif /* CONFIG_IEEE80211W */
 	u8	busetkipkey;
-	/* _timer tkip_timer; */
 	u8	bcheck_grpkey;
 	u8	bgrpkey_handshake;
 
@@ -481,8 +475,6 @@ int tdls_verify_mic(u8 *kck, u8 trans_seq,
 			u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie);
 #endif /* CONFIG_TDLS */
 
-void rtw_use_tkipkey_handler(RTW_TIMER_HDL_ARGS);
-
 void rtw_sec_restore_wep_key(_adapter *adapter);
 u8 rtw_handle_tkip_countermeasure(_adapter *adapter, const char *caller);
 
diff --git a/rtl8822BU/include/rtw_sreset.h b/rtl8822BU/include/rtw_sreset.h
index 0ecdfc7..edf3763 100755..100644
--- a/rtl8822BU/include/rtw_sreset.h
+++ b/rtl8822BU/include/rtw_sreset.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTW_SRESET_H_
 #define _RTW_SRESET_H_
 
diff --git a/rtl8822BU/include/rtw_tdls.h b/rtl8822BU/include/rtw_tdls.h
index ad16d66..841fd58 100755..100644
--- a/rtl8822BU/include/rtw_tdls.h
+++ b/rtl8822BU/include/rtw_tdls.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTW_TDLS_H_
 #define __RTW_TDLS_H_
 
diff --git a/rtl8822BU/include/rtw_version.h b/rtl8822BU/include/rtw_version.h
index f3b8081..4ff7cb8 100755..100644
--- a/rtl8822BU/include/rtw_version.h
+++ b/rtl8822BU/include/rtw_version.h
@@ -1,2 +1,2 @@
-#define DRIVERVERSION	"v5.1.7_19806.20161025_BTCOEX20161024-3333"
-#define BTCOEXVERSION	"BTCOEX20161024-3333"
+#define DRIVERVERSION	"v5.2.4.1_22719.20170613_COEX20170518-4444"
+#define BTCOEXVERSION	"COEX20170518-4444"
diff --git a/rtl8822BU/include/rtw_vht.h b/rtl8822BU/include/rtw_vht.h
index 1d886bb..f316c85 100755..100644
--- a/rtl8822BU/include/rtw_vht.h
+++ b/rtl8822BU/include/rtw_vht.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTW_VHT_H_
 #define _RTW_VHT_H_
 
@@ -126,7 +121,7 @@ struct vht_priv {
 
 u8	rtw_get_vht_highest_rate(u8 *pvht_mcs_map);
 u16	rtw_vht_mcs_to_data_rate(u8 bw, u8 short_GI, u8 vht_mcs_rate);
-u64	rtw_vht_rate_to_bitmap(u8 *pVHTRate);
+u64	rtw_vht_mcs_map_to_bitmap(u8 *mcs_map, u8 nss);
 void	rtw_vht_use_default_setting(_adapter *padapter);
 u32	rtw_build_vht_operation_ie(_adapter *padapter, u8 *pbuf, u8 channel);
 u32	rtw_build_vht_op_mode_notify_ie(_adapter *padapter, u8 *pbuf, u8 bw);
@@ -139,5 +134,6 @@ void	rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, PVOID sta);
 u32	rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len);
 void	VHTOnAssocRsp(_adapter *padapter);
 u8	rtw_vht_mcsmap_to_nss(u8 *pvht_mcs_map);
+void rtw_vht_nss_to_mcsmap(u8 nss, u8 *target_mcs_map, u8 *cur_mcs_map);
 
 #endif /* _RTW_VHT_H_ */
diff --git a/rtl8822BU/include/rtw_wapi.h b/rtl8822BU/include/rtw_wapi.h
index 635aec0..92d68d6 100755..100644
--- a/rtl8822BU/include/rtw_wapi.h
+++ b/rtl8822BU/include/rtw_wapi.h
@@ -1,3 +1,17 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2016 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ *****************************************************************************/
 #ifndef __INC_WAPI_H
 #define __INC_WAPI_H
 
diff --git a/rtl8822BU/include/rtw_wifi_regd.h b/rtl8822BU/include/rtw_wifi_regd.h
index 2182712..f56008c 100755..100644
--- a/rtl8822BU/include/rtw_wifi_regd.h
+++ b/rtl8822BU/include/rtw_wifi_regd.h
@@ -1,6 +1,15 @@
 /******************************************************************************
  *
- * Copyright(c) 2009-2010  Realtek Corporation.
+ * Copyright(c) 2009-2010 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
  *
  *****************************************************************************/
 
diff --git a/rtl8822BU/include/rtw_xmit.h b/rtl8822BU/include/rtw_xmit.h
index 9669a20..b89d5aa 100755..100644
--- a/rtl8822BU/include/rtw_xmit.h
+++ b/rtl8822BU/include/rtw_xmit.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _RTW_XMIT_H_
 #define _RTW_XMIT_H_
 
@@ -89,7 +84,7 @@
 #endif
 
 #ifdef CONFIG_RTL8812A
-	#define MAX_CMDBUF_SZ	(512*14)
+	#define MAX_CMDBUF_SZ	(512 * 17)
 #elif defined(CONFIG_RTL8723D) && defined(CONFIG_LPS_POFF)
 	#define MAX_CMDBUF_SZ	(128*70) /*(8960)*/
 #else
@@ -158,6 +153,18 @@
 		dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val+1);\
 	} while (0)
 
+/* Check if AMPDU Tx is supported or not. If it is supported,
+* it need to check "amsdu in ampdu" is supported or not.
+* (ampdu_en, amsdu_ampdu_en) =
+* (0, x) : AMPDU is not enable, but AMSDU is valid to send.
+* (1, 0) : AMPDU is enable, AMSDU in AMPDU is not enable. So, AMSDU is not valid to send.
+* (1, 1) : AMPDU and AMSDU in AMPDU are enable. So, AMSDU is valid to send.
+*/
+#define IS_AMSDU_AMPDU_NOT_VALID(pattrib)\
+	 ((pattrib->ampdu_en == _TRUE) && (pattrib->amsdu_ampdu_en == _FALSE))
+
+#define IS_AMSDU_AMPDU_VALID(pattrib)\
+	 !((pattrib->ampdu_en == _TRUE) && (pattrib->amsdu_ampdu_en == _FALSE))
 
 #define HWXMIT_ENTRY	4
 
@@ -413,6 +420,7 @@ struct pkt_attrib {
 	u8	ampdu_en;/* tx ampdu enable */
 	u8	ampdu_spacing; /* ampdu_min_spacing for peer sta's rx */
 	u8	amsdu;
+	u8	amsdu_ampdu_en;/* tx amsdu in ampdu enable */
 	u8	mdata;/* more data bit */
 	u8	pctrl;/* per packet txdesc control enable */
 	u8	triggered;/* for ap mode handling Power Saving sta */
@@ -514,6 +522,7 @@ enum {
 	RTW_SCTX_DONE_DRV_STOP,
 	RTW_SCTX_DONE_DEV_REMOVE,
 	RTW_SCTX_DONE_CMD_ERROR,
+	RTW_SCTX_DONE_CMD_DROP,
 	RTX_SCTX_CSTR_WAIT_RPT2,
 };
 
@@ -695,7 +704,6 @@ struct	xmit_priv	{
 	_lock	lock;
 
 	_sema	xmit_sema;
-	_sema	terminate_xmitthread_sema;
 
 	/* _queue	blk_strms[MAX_NUMBLKS]; */
 	_queue	be_pending;
@@ -785,7 +793,6 @@ struct	xmit_priv	{
 #else
 	_thread_hdl_	SdioXmitThread;
 	_sema		SdioXmitSema;
-	_sema		SdioXmitTerminateSema;
 #endif /* CONFIG_SDIO_TX_TASKLET */
 #endif /* CONFIG_SDIO_HCI */
 
@@ -841,6 +848,7 @@ struct	xmit_priv	{
 
 #endif
 	_lock lock_sctx;
+
 };
 
 extern struct xmit_frame *__rtw_alloc_cmdxmitframe(struct xmit_priv *pxmitpriv,
@@ -958,7 +966,8 @@ extern void rtw_amsdu_set_timer(_adapter *padapter, u8 priority);
 extern void rtw_amsdu_cancel_timer(_adapter *padapter, u8 priority);
 
 extern s32 rtw_xmitframe_coalesce_amsdu(_adapter *padapter, struct xmit_frame *pxmitframe, struct xmit_frame *pxmitframe_queue);	
-extern int check_amsdu(struct xmit_frame *pxmitframe);
+extern s32 check_amsdu(struct xmit_frame *pxmitframe);
+extern s32 check_amsdu_tx_support(_adapter *padapter);
 extern struct xmit_frame *rtw_get_xframe(struct xmit_priv *pxmitpriv, int *num_frame);
 #endif
 
@@ -970,6 +979,21 @@ int rtw_ack_tx_wait(struct xmit_priv *pxmitpriv, u32 timeout_ms);
 void rtw_ack_tx_done(struct xmit_priv *pxmitpriv, int status);
 #endif /* CONFIG_XMIT_ACK */
 
+enum XMIT_BLOCK_REASON {
+	XMIT_BLOCK_NONE = 0,
+	XMIT_BLOCK_REDLMEM = BIT0, /*LPS-PG*/
+	XMIT_BLOCK_SUSPEND = BIT1, /*WOW*/
+	XMIT_BLOCK_MAX = 0xFF,
+};
+void rtw_init_xmit_block(_adapter *padapter);
+void rtw_deinit_xmit_block(_adapter *padapter);
+
+#ifdef DBG_XMIT_BLOCK
+void dump_xmit_block(void *sel, _adapter *padapter);
+#endif
+void rtw_set_xmit_block(_adapter *padapter, enum XMIT_BLOCK_REASON reason);
+void rtw_clr_xmit_block(_adapter *padapter, enum XMIT_BLOCK_REASON reason);
+bool rtw_is_xmit_blocked(_adapter *padapter);
 
 /* include after declaring struct xmit_buf, in order to avoid warning */
 #include <xmit_osdep.h>
diff --git a/rtl8822BU/include/sdio_hal.h b/rtl8822BU/include/sdio_hal.h
index c8f554d..62e7f79 100755..100644
--- a/rtl8822BU/include/sdio_hal.h
+++ b/rtl8822BU/include/sdio_hal.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __SDIO_HAL_H__
 #define __SDIO_HAL_H__
 
diff --git a/rtl8822BU/include/sdio_ops.h b/rtl8822BU/include/sdio_ops.h
index abf36f8..73eeae4 100755..100644
--- a/rtl8822BU/include/sdio_ops.h
+++ b/rtl8822BU/include/sdio_ops.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __SDIO_OPS_H__
 #define __SDIO_OPS_H__
 
@@ -50,6 +45,7 @@ struct async_context {
 
 
 extern void sdio_set_intf_ops(_adapter *padapter, struct _io_ops *pops);
+void dump_sdio_card_info(void *sel, struct dvobj_priv *dvobj);
 
 #if 0
 extern void sdio_func1cmd52_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem);
@@ -90,7 +86,7 @@ void ClearInterrupt8821AS(PADAPTER padapter);
 #endif /* CONFIG_RTL8821A */
 
 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
-#ifdef CONFIG_RTL8821C
+#if defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822B)
 u8 rtw_hal_enable_cpwm2(_adapter *adapter);
 #endif
 extern u8 RecvOnePkt(PADAPTER padapter);
diff --git a/rtl8822BU/include/sdio_ops_ce.h b/rtl8822BU/include/sdio_ops_ce.h
index 59ca381..d542cb7 100755..100644
--- a/rtl8822BU/include/sdio_ops_ce.h
+++ b/rtl8822BU/include/sdio_ops_ce.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _SDIO_OPS_WINCE_H_
 #define _SDIO_OPS_WINCE_H_
 
diff --git a/rtl8822BU/include/sdio_ops_linux.h b/rtl8822BU/include/sdio_ops_linux.h
index 46c3ddc..a4c948a 100755..100644
--- a/rtl8822BU/include/sdio_ops_linux.h
+++ b/rtl8822BU/include/sdio_ops_linux.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __SDIO_OPS_LINUX_H__
 #define __SDIO_OPS_LINUX_H__
 
@@ -40,14 +35,24 @@ void _sd_write32(struct intf_hdl *pintfhdl, u32 addr, u32 v, s32 *err);
 void sd_write32(struct intf_hdl *pintfhdl, u32 addr, u32 v, s32 *err);
 #endif /* RTW_HALMAC */
 
+
+/* The unit of return value is Hz */
+static inline u32 rtw_sdio_get_clock(struct dvobj_priv *d)
+{
+	return d->intf_data.clock;
+}
+
+bool rtw_is_sdio30(_adapter *adapter);
 s32 _sd_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata);
 s32 sd_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata);
 s32 _sd_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata);
 s32 sd_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata);
 
 void rtw_sdio_set_irq_thd(struct dvobj_priv *dvobj, _thread_hdl_ thd_hdl);
-int __must_check rtw_sdio_raw_read(struct dvobj_priv *d, int addr,
+int __must_check rtw_sdio_raw_read(struct dvobj_priv *d, unsigned int addr,
 				void *buf, size_t len, bool fixed);
-int __must_check rtw_sdio_raw_write(struct dvobj_priv *d, int addr,
+int __must_check rtw_sdio_raw_write(struct dvobj_priv *d, unsigned int addr,
 				void *buf, size_t len, bool fixed);
-#endif
+
+#endif /* __SDIO_OPS_LINUX_H__ */
+
diff --git a/rtl8822BU/include/sdio_ops_xp.h b/rtl8822BU/include/sdio_ops_xp.h
index 5020365..d3d8764 100755..100644
--- a/rtl8822BU/include/sdio_ops_xp.h
+++ b/rtl8822BU/include/sdio_ops_xp.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _SDIO_OPS_XP_H_
 #define _SDIO_OPS_XP_H_
 
diff --git a/rtl8822BU/include/sdio_osintf.h b/rtl8822BU/include/sdio_osintf.h
index d2906bd..7c2abd1 100755..100644
--- a/rtl8822BU/include/sdio_osintf.h
+++ b/rtl8822BU/include/sdio_osintf.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __SDIO_OSINTF_H__
 #define __SDIO_OSINTF_H__
 
diff --git a/rtl8822BU/include/sta_info.h b/rtl8822BU/include/sta_info.h
index efcc30e..b7fb7ee 100755..100644
--- a/rtl8822BU/include/sta_info.h
+++ b/rtl8822BU/include/sta_info.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __STA_INFO_H_
 #define __STA_INFO_H_
 
@@ -115,6 +110,7 @@ struct	stainfo_stats	{
 		u64 rx_probersp_uo_pkts;
 	u64 rx_ctrl_pkts;
 	u64 rx_data_pkts;
+	u64 rx_data_last_pkts;		/* For Read & Clear requirement in proc_get_rx_stat() */
 	u64 rx_data_qos_pkts[TID_NUM];
 	u64	last_rx_mgnt_pkts;
 		u64 last_rx_beacon_pkts;
@@ -135,6 +131,12 @@ struct	stainfo_stats	{
 	u64	tx_pkts;
 	u64	tx_bytes;
 	u64  tx_drops;
+
+	u32 duplicate_cnt;	/* Read & Clear, in proc_get_rx_stat() */
+	u32 rxratecnt[128];	/* Read & Clear, in proc_get_rx_stat() */
+	u32 tx_ok_cnt;		/* Read & Clear, in proc_get_tx_stat() */
+	u32 tx_fail_cnt;	/* Read & Clear, in proc_get_tx_stat() */
+	u32 tx_retry_cnt;	/* Read & Clear, in proc_get_tx_stat() */
 };
 
 #ifndef DBG_SESSION_TRACKER
@@ -460,6 +462,7 @@ struct sta_info {
 	u16 RxMgmtFrameSeqNum;
 
 	struct st_ctl_t st_ctl;
+	u8 max_agg_num_minimal_record; /*keep minimal tx desc max_agg_num setting*/
 };
 
 #define sta_rx_pkts(sta) \
@@ -609,7 +612,8 @@ struct	sta_priv {
 #ifdef CONFIG_ATMEL_RC_PATCH
 	u8 atmel_rc_pattern[6];
 #endif
-
+	struct sta_info *c2h_sta;
+	struct submit_ctx *gotc2h;
 };
 
 
diff --git a/rtl8822BU/include/usb_hal.h b/rtl8822BU/include/usb_hal.h
index 7e556e4..a5af048 100755..100644
--- a/rtl8822BU/include/usb_hal.h
+++ b/rtl8822BU/include/usb_hal.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __USB_HAL_H__
 #define __USB_HAL_H__
 
diff --git a/rtl8822BU/include/usb_ops.h b/rtl8822BU/include/usb_ops.h
index 350a675..06b0f42 100755..100644
--- a/rtl8822BU/include/usb_ops.h
+++ b/rtl8822BU/include/usb_ops.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __USB_OPS_H_
 #define __USB_OPS_H_
 
diff --git a/rtl8822BU/include/usb_ops_linux.h b/rtl8822BU/include/usb_ops_linux.h
index adf0750..bf59ca0 100755..100644
--- a/rtl8822BU/include/usb_ops_linux.h
+++ b/rtl8822BU/include/usb_ops_linux.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __USB_OPS_LINUX_H__
 #define __USB_OPS_LINUX_H__
 
diff --git a/rtl8822BU/include/usb_osintf.h b/rtl8822BU/include/usb_osintf.h
index 9c39520..7e5feed 100755..100644
--- a/rtl8822BU/include/usb_osintf.h
+++ b/rtl8822BU/include/usb_osintf.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __USB_OSINTF_H
 #define __USB_OSINTF_H
 
diff --git a/rtl8822BU/include/usb_vendor_req.h b/rtl8822BU/include/usb_vendor_req.h
index 2281d36..a003bfb 100755..100644
--- a/rtl8822BU/include/usb_vendor_req.h
+++ b/rtl8822BU/include/usb_vendor_req.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _USB_VENDOR_REQUEST_H_
 #define _USB_VENDOR_REQUEST_H_
 
diff --git a/rtl8822BU/include/wifi.h b/rtl8822BU/include/wifi.h
index 9cb474e..8540bf5 100755..100644
--- a/rtl8822BU/include/wifi.h
+++ b/rtl8822BU/include/wifi.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef _WIFI_H_
 #define _WIFI_H_
 
@@ -943,6 +938,13 @@ typedef enum _HT_CAP_AMPDU_FACTOR {
 	MAX_AMPDU_FACTOR_64K	= 3,
 } HT_CAP_AMPDU_FACTOR;
 
+typedef enum _VHT_CAP_AMPDU_FACTOR {
+	MAX_AMPDU_FACTOR_128K = 4,
+	MAX_AMPDU_FACTOR_256K = 5,
+	MAX_AMPDU_FACTOR_512K = 6,
+	MAX_AMPDU_FACTOR_1M = 7,
+} VHT_CAP_AMPDU_FACTOR;
+
 
 typedef enum _HT_CAP_AMPDU_DENSITY {
 	AMPDU_DENSITY_VALUE_0 = 0 , /* For no restriction */
@@ -1153,7 +1155,7 @@ typedef enum _HT_CAP_AMPDU_DENSITY {
 #define	P2P_ATTR_LISTEN_CH				0x06
 #define	P2P_ATTR_GROUP_BSSID				0x07
 #define	P2P_ATTR_EX_LISTEN_TIMING		0x08
-#define	P2P_ATTR_INTENTED_IF_ADDR		0x09
+#define	P2P_ATTR_INTENDED_IF_ADDR		0x09
 #define	P2P_ATTR_MANAGEABILITY			0x0A
 #define	P2P_ATTR_CH_LIST					0x0B
 #define	P2P_ATTR_NOA						0x0C
@@ -1314,6 +1316,7 @@ enum P2P_PROTO_WK_ID {
 	P2P_PRE_TX_INVITEREQ_PROCESS_WK = 4,
 	P2P_AP_P2P_CH_SWITCH_PROCESS_WK = 5,
 	P2P_RO_CH_WK = 6,
+	P2P_CANCEL_RO_CH_WK = 7,
 };
 
 #ifdef CONFIG_P2P_PS
diff --git a/rtl8822BU/include/wlan_bssdef.h b/rtl8822BU/include/wlan_bssdef.h
index dd39e0c..84cb2d4 100755..100644
--- a/rtl8822BU/include/wlan_bssdef.h
+++ b/rtl8822BU/include/wlan_bssdef.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __WLAN_BSSDEF_H__
 #define __WLAN_BSSDEF_H__
 
diff --git a/rtl8822BU/include/xmit_osdep.h b/rtl8822BU/include/xmit_osdep.h
index ea5725d..70070a8 100755..100644
--- a/rtl8822BU/include/xmit_osdep.h
+++ b/rtl8822BU/include/xmit_osdep.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __XMIT_OSDEP_H_
 #define __XMIT_OSDEP_H_
 
diff --git a/rtl8822BU/os_dep/linux/custom_gpio_linux.c b/rtl8822BU/os_dep/linux/custom_gpio_linux.c
index 4f10bbe..23401b7 100755..100644
--- a/rtl8822BU/os_dep/linux/custom_gpio_linux.c
+++ b/rtl8822BU/os_dep/linux/custom_gpio_linux.c
@@ -1,7 +1,6 @@
 /******************************************************************************
- * Customer code to add GPIO control during WLAN start/stop
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -12,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #include "drv_types.h"
 
 #ifdef CONFIG_PLATFORM_SPRD
diff --git a/rtl8822BU/os_dep/linux/ioctl_cfg80211.c b/rtl8822BU/os_dep/linux/ioctl_cfg80211.c
index a25cfa5..6cc19eb 100755..100644
--- a/rtl8822BU/os_dep/linux/ioctl_cfg80211.c
+++ b/rtl8822BU/os_dep/linux/ioctl_cfg80211.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,15 +11,11 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define  _IOCTL_CFG80211_C_
 
 #include <drv_types.h>
+#include <hal_data.h>
 
 #ifdef CONFIG_IOCTL_CFG80211
 
@@ -88,7 +84,7 @@ static const u32 rtw_cipher_suites[] = {
 	}
 
 #define CHAN2G(_channel, _freq, _flags) {			\
-		.band			= IEEE80211_BAND_2GHZ,		\
+		.band			= NL80211_BAND_2GHZ,		\
 		.center_freq		= (_freq),			\
 		.hw_value		= (_channel),			\
 		.flags			= (_flags),			\
@@ -97,7 +93,7 @@ static const u32 rtw_cipher_suites[] = {
 	}
 
 #define CHAN5G(_channel, _flags) {				\
-		.band			= IEEE80211_BAND_5GHZ,		\
+		.band			= NL80211_BAND_5GHZ,		\
 		.center_freq		= 5000 + (5 * (_channel)),	\
 		.hw_value		= (_channel),			\
 		.flags			= (_flags),			\
@@ -142,10 +138,8 @@ static struct ieee80211_rate rtw_rates[] = {
 #define rtw_g_rates		(rtw_rates + 0)
 #define RTW_G_RATES_NUM	12
 
-#define RTW_2G_CHANNELS_NUM 14
-#define RTW_5G_CHANNELS_NUM 37
-
-static struct ieee80211_channel rtw_2ghz_channels[] = {
+/* from center_ch_2g */
+static struct ieee80211_channel rtw_2ghz_channels[MAX_CHANNEL_NUM_2G] = {
 	CHAN2G(1, 2412, 0),
 	CHAN2G(2, 2417, 0),
 	CHAN2G(3, 2422, 0),
@@ -162,41 +156,29 @@ static struct ieee80211_channel rtw_2ghz_channels[] = {
 	CHAN2G(14, 2484, 0),
 };
 
-static struct ieee80211_channel rtw_5ghz_a_channels[] = {
-	CHAN5G(34, 0),		CHAN5G(36, 0),
-	CHAN5G(38, 0),		CHAN5G(40, 0),
-	CHAN5G(42, 0),		CHAN5G(44, 0),
-	CHAN5G(46, 0),		CHAN5G(48, 0),
-	CHAN5G(52, 0),		CHAN5G(56, 0),
-	CHAN5G(60, 0),		CHAN5G(64, 0),
-	CHAN5G(100, 0),		CHAN5G(104, 0),
-	CHAN5G(108, 0),		CHAN5G(112, 0),
-	CHAN5G(116, 0),		CHAN5G(120, 0),
-	CHAN5G(124, 0),		CHAN5G(128, 0),
-	CHAN5G(132, 0),		CHAN5G(136, 0),
-	CHAN5G(140, 0),		CHAN5G(149, 0),
-	CHAN5G(153, 0),		CHAN5G(157, 0),
-	CHAN5G(161, 0),		CHAN5G(165, 0),
-	CHAN5G(184, 0),		CHAN5G(188, 0),
-	CHAN5G(192, 0),		CHAN5G(196, 0),
-	CHAN5G(200, 0),		CHAN5G(204, 0),
-	CHAN5G(208, 0),		CHAN5G(212, 0),
-	CHAN5G(216, 0),
+/* from center_ch_5g_20m */
+static struct ieee80211_channel rtw_5ghz_a_channels[MAX_CHANNEL_NUM_5G] = {
+	CHAN5G(36, 0),	CHAN5G(40, 0),	CHAN5G(44, 0),	CHAN5G(48, 0),
+
+	CHAN5G(52, 0),	CHAN5G(56, 0),	CHAN5G(60, 0),	CHAN5G(64, 0),
+
+	CHAN5G(100, 0),	CHAN5G(104, 0),	CHAN5G(108, 0),	CHAN5G(112, 0),
+	CHAN5G(116, 0),	CHAN5G(120, 0),	CHAN5G(124, 0),	CHAN5G(128, 0),
+	CHAN5G(132, 0),	CHAN5G(136, 0),	CHAN5G(140, 0),	CHAN5G(144, 0),
+
+	CHAN5G(149, 0),	CHAN5G(153, 0),	CHAN5G(157, 0),	CHAN5G(161, 0),
+	CHAN5G(165, 0),	CHAN5G(169, 0),	CHAN5G(173, 0),	CHAN5G(177, 0),
 };
 
 
 void rtw_2g_channels_init(struct ieee80211_channel *channels)
 {
-	_rtw_memcpy((void *)channels, (void *)rtw_2ghz_channels,
-		sizeof(struct ieee80211_channel) * RTW_2G_CHANNELS_NUM
-	);
+	_rtw_memcpy((void *)channels, (void *)rtw_2ghz_channels, sizeof(rtw_2ghz_channels));
 }
 
 void rtw_5g_channels_init(struct ieee80211_channel *channels)
 {
-	_rtw_memcpy((void *)channels, (void *)rtw_5ghz_a_channels,
-		sizeof(struct ieee80211_channel) * RTW_5G_CHANNELS_NUM
-	);
+	_rtw_memcpy((void *)channels, (void *)rtw_5ghz_a_channels, sizeof(rtw_5ghz_a_channels));
 }
 
 void rtw_2g_rates_init(struct ieee80211_rate *rates)
@@ -214,17 +196,17 @@ void rtw_5g_rates_init(struct ieee80211_rate *rates)
 }
 
 struct ieee80211_supported_band *rtw_spt_band_alloc(
-	enum ieee80211_band band
+	enum nl80211_band band
 )
 {
 	struct ieee80211_supported_band *spt_band = NULL;
 	int n_channels, n_bitrates;
 
-	if (band == IEEE80211_BAND_2GHZ) {
-		n_channels = RTW_2G_CHANNELS_NUM;
+	if (band == NL80211_BAND_2GHZ) {
+		n_channels = MAX_CHANNEL_NUM_2G;
 		n_bitrates = RTW_G_RATES_NUM;
-	} else if (band == IEEE80211_BAND_5GHZ) {
-		n_channels = RTW_5G_CHANNELS_NUM;
+	} else if (band == NL80211_BAND_5GHZ) {
+		n_channels = MAX_CHANNEL_NUM_5G;
 		n_bitrates = RTW_A_RATES_NUM;
 	} else
 		goto exit;
@@ -243,10 +225,10 @@ struct ieee80211_supported_band *rtw_spt_band_alloc(
 	spt_band->n_channels = n_channels;
 	spt_band->n_bitrates = n_bitrates;
 
-	if (band == IEEE80211_BAND_2GHZ) {
+	if (band == NL80211_BAND_2GHZ) {
 		rtw_2g_channels_init(spt_band->channels);
 		rtw_2g_rates_init(spt_band->bitrates);
-	} else if (band == IEEE80211_BAND_5GHZ) {
+	} else if (band == NL80211_BAND_5GHZ) {
 		rtw_5g_channels_init(spt_band->channels);
 		rtw_5g_rates_init(spt_band->bitrates);
 	}
@@ -265,13 +247,21 @@ void rtw_spt_band_free(struct ieee80211_supported_band *spt_band)
 	if (!spt_band)
 		return;
 
+#if (KERNEL_VERSION(4, 7, 0) <= LINUX_VERSION_CODE)
+	if (spt_band->band == NL80211_BAND_2GHZ) {
+#else
 	if (spt_band->band == IEEE80211_BAND_2GHZ) {
+#endif
 		size = sizeof(struct ieee80211_supported_band)
-			+ sizeof(struct ieee80211_channel) * RTW_2G_CHANNELS_NUM
+			+ sizeof(struct ieee80211_channel) * MAX_CHANNEL_NUM_2G
 			+ sizeof(struct ieee80211_rate) * RTW_G_RATES_NUM;
+#if (KERNEL_VERSION(4, 7, 0) <= LINUX_VERSION_CODE)
+	} else if (spt_band->band == NL80211_BAND_5GHZ) {
+#else
 	} else if (spt_band->band == IEEE80211_BAND_5GHZ) {
+#endif
 		size = sizeof(struct ieee80211_supported_band)
-			+ sizeof(struct ieee80211_channel) * RTW_5G_CHANNELS_NUM
+			+ sizeof(struct ieee80211_channel) * MAX_CHANNEL_NUM_5G
 			+ sizeof(struct ieee80211_rate) * RTW_A_RATES_NUM;
 	} else {
 
@@ -327,6 +317,13 @@ static const struct ieee80211_txrx_stypes
 		BIT(IEEE80211_STYPE_DEAUTH >> 4) |
 		BIT(IEEE80211_STYPE_ACTION >> 4)
 	},
+#if defined(RTW_DEDICATED_P2P_DEVICE)
+	[NL80211_IFTYPE_P2P_DEVICE] = {
+		.tx = 0xffff,
+		.rx = BIT(IEEE80211_STYPE_ACTION >> 4) |
+			BIT(IEEE80211_STYPE_PROBE_REQ >> 4)
+	},
+#endif
 };
 #endif
 
@@ -343,6 +340,37 @@ static u64 rtw_get_systime_us(void)
 #endif
 }
 
+/* Try to remove non target BSS's SR to reduce PBC overlap rate */
+static int rtw_cfg80211_clear_wps_sr_of_non_target_bss(_adapter *padapter, struct wlan_network *pnetwork, struct cfg80211_ssid *req_ssid)
+{
+	struct rtw_wdev_priv *wdev_data = adapter_wdev_data(padapter);
+	int ret = 0;
+	u8 *psr = NULL, sr = 0;
+	NDIS_802_11_SSID *pssid = &pnetwork->network.Ssid;
+	u32 wpsielen = 0;
+	u8 *wpsie = NULL;
+
+	if (pssid->SsidLength == req_ssid->ssid_len
+		&& _rtw_memcmp(pssid->Ssid, req_ssid->ssid, req_ssid->ssid_len) == _TRUE)
+		goto exit;
+
+	wpsie = rtw_get_wps_ie(pnetwork->network.IEs + _FIXED_IE_LENGTH_
+		, pnetwork->network.IELength - _FIXED_IE_LENGTH_, NULL, &wpsielen);
+	if (wpsie && wpsielen > 0)
+		psr = rtw_get_wps_attr_content(wpsie, wpsielen, WPS_ATTR_SELECTED_REGISTRAR, &sr, NULL);
+
+	if (psr && sr) {
+		if (0)
+			RTW_INFO("clear sr of non target bss:%s("MAC_FMT")\n"
+				, pssid->Ssid, MAC_ARG(pnetwork->network.MacAddress));
+		*psr = 0; /* clear sr */
+		ret = 1;
+	}
+
+exit:
+	return ret;
+}
+
 #define MAX_BSSINFO_LEN 1000
 struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_network *pnetwork)
 {
@@ -397,69 +425,6 @@ struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_net
 	}
 #endif /* !CONFIG_WAPI_SUPPORT */
 
-	/* To reduce PBC Overlap rate */
-	/* _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); */
-	if (adapter_wdev_data(padapter)->scan_request != NULL) {
-		u8 *psr = NULL, sr = 0;
-		NDIS_802_11_SSID *pssid = &pnetwork->network.Ssid;
-		struct cfg80211_scan_request *request = adapter_wdev_data(padapter)->scan_request;
-		struct cfg80211_ssid *ssids = request->ssids;
-		u32 wpsielen = 0;
-		u8 *wpsie = NULL;
-
-		wpsie = rtw_get_wps_ie(pnetwork->network.IEs + _FIXED_IE_LENGTH_, pnetwork->network.IELength - _FIXED_IE_LENGTH_, NULL, &wpsielen);
-
-		if (wpsie && wpsielen > 0)
-			psr = rtw_get_wps_attr_content(wpsie,  wpsielen, WPS_ATTR_SELECTED_REGISTRAR, (u8 *)(&sr), NULL);
-
-		if (sr != 0) {
-			if (request->n_ssids == 1 && request->n_channels == 1) { /* it means under processing WPS */
-				RTW_INFO("ssid=%s, len=%d\n", pssid->Ssid, pssid->SsidLength);
-
-				if (ssids[0].ssid_len == 0) {
-				} else if (pssid->SsidLength == ssids[0].ssid_len &&
-					_rtw_memcmp(pssid->Ssid, ssids[0].ssid, ssids[0].ssid_len))
-					RTW_INFO("%s, got sr and ssid match!\n", __func__);
-				else {
-					if (psr != NULL)
-						*psr = 0; /* clear sr */
-
-#if 0
-					WLAN_BSSID_EX  *pselect_network = &pnetwork->network;
-					struct cfg80211_bss *pselect_bss = NULL;
-					struct ieee80211_channel *notify_channel = NULL;
-					u32 freq;
-
-					RTW_INFO("%s, got sr, but ssid mismatch, to remove this bss\n", __func__);
-
-					freq = rtw_ch2freq(pselect_network->Configuration.DSConfig);
-					notify_channel = ieee80211_get_channel(wiphy, freq);
-					pselect_bss = cfg80211_get_bss(wiphy, NULL/*notify_channel*/,
-						pselect_network->MacAddress, pselect_network->Ssid.Ssid,
-						pselect_network->Ssid.SsidLength, 0/*WLAN_CAPABILITY_ESS*/,
-						0/*WLAN_CAPABILITY_ESS*/);
-
-					if (pselect_bss) {
-						RTW_INFO("%s, got bss for cfg80211 for unlinking bss\n", __func__);
-
-						cfg80211_unlink_bss(wiphy, pselect_bss);
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)
-						cfg80211_put_bss(wiphy, pselect_bss);
-#else
-						cfg80211_put_bss(pselect_bss);
-#endif
-
-					}
-
-					goto exit;
-#endif
-				}
-			}
-		}
-	}
-	/* _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); */
-
-
 	channel = pnetwork->network.Configuration.DSConfig;
 	freq = rtw_ch2freq(channel);
 	notify_channel = ieee80211_get_channel(wiphy, freq);
@@ -689,6 +654,8 @@ void rtw_cfg80211_indicate_connect(_adapter *padapter)
 	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	struct wlan_network  *cur_network = &(pmlmepriv->cur_network);
 	struct wireless_dev *pwdev = padapter->rtw_wdev;
+	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
+	_irqL irqL;
 #ifdef CONFIG_P2P
 	struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
 #endif
@@ -707,12 +674,14 @@ void rtw_cfg80211_indicate_connect(_adapter *padapter)
 
 #ifdef CONFIG_P2P
 	if (pwdinfo->driver_interface == DRIVER_CFG80211) {
+		#if !RTW_P2P_GROUP_INTERFACE
 		if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) {
 			rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo));
 			rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT);
 			rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK);
 			RTW_INFO("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo));
 		}
+		#endif
 	}
 #endif /* CONFIG_P2P */
 
@@ -748,6 +717,8 @@ check_bss:
 	if (!rtw_cfg80211_check_bss(padapter))
 		RTW_PRINT(FUNC_ADPT_FMT" BSS not found !!\n", FUNC_ADPT_ARG(padapter));
 
+	_enter_critical_bh(&pwdev_priv->connect_req_lock, &irqL);
+
 	if (rtw_to_roam(padapter) > 0) {
 		#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 39) || defined(COMPAT_KERNEL_RELEASE)
 		struct wiphy *wiphy = pwdev->wiphy;
@@ -778,7 +749,7 @@ check_bss:
 		#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE)
 		RTW_INFO("pwdev->sme_state(b)=%d\n", pwdev->sme_state);
 		#endif
-		cfg80211_connect_result(padapter->pnetdev, cur_network->network.MacAddress
+		rtw_cfg80211_connect_result(pwdev, cur_network->network.MacAddress
 			, pmlmepriv->assoc_req + sizeof(struct rtw_ieee80211_hdr_3addr) + 2
 			, pmlmepriv->assoc_req_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 2
 			, pmlmepriv->assoc_rsp + sizeof(struct rtw_ieee80211_hdr_3addr) + 6
@@ -788,12 +759,18 @@ check_bss:
 		RTW_INFO("pwdev->sme_state(a)=%d\n", pwdev->sme_state);
 		#endif
 	}
+
+	rtw_wdev_free_connect_req(pwdev_priv);
+
+	_exit_critical_bh(&pwdev_priv->connect_req_lock, &irqL);
 }
 
 void rtw_cfg80211_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally_generated)
 {
 	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	struct wireless_dev *pwdev = padapter->rtw_wdev;
+	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
+	_irqL irqL;
 #ifdef CONFIG_P2P
 	struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
 #endif
@@ -819,9 +796,11 @@ void rtw_cfg80211_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally
 		if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) {
 			rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo));
 
+			#if RTW_P2P_GROUP_INTERFACE
 			#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)
 			if (pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT)
 			#endif
+			#endif
 				rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE);
 
 			RTW_INFO("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo));
@@ -829,47 +808,37 @@ void rtw_cfg80211_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally
 	}
 #endif /* CONFIG_P2P */
 
-	#ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42
-	if (!padapter->mlmepriv.not_indic_disco || padapter->ndev_unregistering) {
-	#else
-	{
-	#endif
+	_enter_critical_bh(&pwdev_priv->connect_req_lock, &irqL);
+
+	if (padapter->ndev_unregistering || !rtw_wdev_not_indic_disco(pwdev_priv)) {
 		#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE)
 		RTW_INFO("pwdev->sme_state(b)=%d\n", pwdev->sme_state);
 
-		if (pwdev->sme_state == CFG80211_SME_CONNECTING)
-			cfg80211_connect_result(padapter->pnetdev, NULL, NULL, 0, NULL, 0,
-				WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC/*GFP_KERNEL*/);
-		else if (pwdev->sme_state == CFG80211_SME_CONNECTED) {
-			#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0))
-			cfg80211_disconnected(padapter->pnetdev, reason, NULL, 0, locally_generated, GFP_ATOMIC);
-			#else
-			cfg80211_disconnected(padapter->pnetdev, 0, NULL, 0, GFP_ATOMIC);
-			#endif
+		if (pwdev->sme_state == CFG80211_SME_CONNECTING) {
+			RTW_INFO(FUNC_ADPT_FMT" call cfg80211_connect_result\n", FUNC_ADPT_ARG(padapter));
+			rtw_cfg80211_connect_result(pwdev, NULL, NULL, 0, NULL, 0,
+				WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC);
+		} else if (pwdev->sme_state == CFG80211_SME_CONNECTED) {
+			RTW_INFO(FUNC_ADPT_FMT" call cfg80211_disconnected\n", FUNC_ADPT_ARG(padapter));
+			rtw_cfg80211_disconnected(pwdev, reason, NULL, 0, locally_generated, GFP_ATOMIC);
 		}
-		#if 0
-		else
-			RTW_INFO("pwdev->sme_state=%d\n", pwdev->sme_state);
-		#endif
 
 		RTW_INFO("pwdev->sme_state(a)=%d\n", pwdev->sme_state);
 		#else
-
-		if (check_fwstate(&padapter->mlmepriv, _FW_LINKED)) {
-			#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0))
-			RTW_INFO(FUNC_ADPT_FMT" call cfg80211_disconnected\n", FUNC_ADPT_ARG(padapter));
-			cfg80211_disconnected(padapter->pnetdev, reason, NULL, 0, locally_generated, GFP_ATOMIC);
-			#else
-			RTW_INFO(FUNC_ADPT_FMT" call cfg80211_disconnected\n", FUNC_ADPT_ARG(padapter));
-			cfg80211_disconnected(padapter->pnetdev, 0, NULL, 0, GFP_ATOMIC);
-			#endif
-		} else {
+		if (pwdev_priv->connect_req) {
 			RTW_INFO(FUNC_ADPT_FMT" call cfg80211_connect_result\n", FUNC_ADPT_ARG(padapter));
-			cfg80211_connect_result(padapter->pnetdev, NULL, NULL, 0, NULL, 0,
+			rtw_cfg80211_connect_result(pwdev, NULL, NULL, 0, NULL, 0,
 				WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC);
+		} else {
+			RTW_INFO(FUNC_ADPT_FMT" call cfg80211_disconnected\n", FUNC_ADPT_ARG(padapter));
+			rtw_cfg80211_disconnected(pwdev, reason, NULL, 0, locally_generated, GFP_ATOMIC);
 		}
 		#endif
 	}
+
+	rtw_wdev_free_connect_req(pwdev_priv);
+
+	_exit_critical_bh(&pwdev_priv->connect_req_lock, &irqL);
 }
 
 
@@ -1254,7 +1223,6 @@ static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param
 						_rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8);
 
 						padapter->securitypriv.busetkipkey = _FALSE;
-						/* _set_timer(&padapter->securitypriv.tkip_timer, 50);						 */
 					}
 					psta->bpairwise_key_installed = _TRUE;
 #ifdef CONFIG_RTW_80211R
@@ -1761,6 +1729,7 @@ static int cfg80211_rtw_change_iface(struct wiphy *wiphy,
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
 #ifdef CONFIG_P2P
 	struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
+	u8 is_p2p = _FALSE;
 #endif
 	int ret = 0;
 	u8 change = _FALSE;
@@ -1816,46 +1785,53 @@ static int cfg80211_rtw_change_iface(struct wiphy *wiphy,
 	case NL80211_IFTYPE_ADHOC:
 		networkType = Ndis802_11IBSS;
 		break;
-#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE))
+
+	#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE))
 	case NL80211_IFTYPE_P2P_CLIENT:
-#endif
+		is_p2p = _TRUE;
+	#endif
 	case NL80211_IFTYPE_STATION:
 		networkType = Ndis802_11Infrastructure;
+
 		#ifdef CONFIG_P2P
-		if (pwdinfo->driver_interface == DRIVER_CFG80211) {
-			if (change && rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) {
-				/* it means remove GO and change mode from AP(GO) to station(P2P DEVICE) */
+		if (change && pwdinfo->driver_interface == DRIVER_CFG80211) {
+			if (is_p2p == _TRUE)
+				rtw_p2p_enable(padapter, P2P_ROLE_CLIENT);
+			#if !RTW_P2P_GROUP_INTERFACE
+			else if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT)
+					|| rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)
+			) {
+				/* it means remove GC/GO and change mode from GC/GO to station(P2P DEVICE) */
 				rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE);
-				rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo));
-
-				RTW_INFO("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo));
-			}
-			#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE))
-			if (type == NL80211_IFTYPE_P2P_CLIENT)
-				rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT);
-			else {
-				/* NL80211_IFTYPE_STATION */
-				if (rtw_p2p_role(pwdinfo) == P2P_ROLE_CLIENT)
-					rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE);
 			}
 			#endif
 		}
 		#endif /* CONFIG_P2P */
+
 		break;
-#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE))
+
+	#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE))
 	case NL80211_IFTYPE_P2P_GO:
-#endif
+		is_p2p = _TRUE;
+	#endif
 	case NL80211_IFTYPE_AP:
 		networkType = Ndis802_11APMode;
+
 		#ifdef CONFIG_P2P
-		if (pwdinfo->driver_interface == DRIVER_CFG80211) {
-			if (change && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) {
+		if (change && pwdinfo->driver_interface == DRIVER_CFG80211) {
+			if (is_p2p == _TRUE)
+				rtw_p2p_enable(padapter, P2P_ROLE_GO);
+			#if !RTW_P2P_GROUP_INTERFACE
+			else if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) {
 				/* it means P2P Group created, we will be GO and change mode from  P2P DEVICE to AP(GO) */
 				rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO);
 			}
+			#endif
 		}
 		#endif /* CONFIG_P2P */
+
 		break;
+
 	case NL80211_IFTYPE_MONITOR:
 		networkType = Ndis802_11Monitor;
 #if 0
@@ -1888,9 +1864,14 @@ void rtw_cfg80211_indicate_scan_done(_adapter *adapter, bool aborted)
 {
 	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter);
 	_irqL	irqL;
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 9, 0))
-    struct cfg80211_scan_info info;
+
+#if (KERNEL_VERSION(4, 7, 0) <= LINUX_VERSION_CODE)
+	struct cfg80211_scan_info info;
+
+	memset(&info, 0, sizeof(info));
+	info.aborted = aborted;
 #endif
+
 	_enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL);
 	if (pwdev_priv->scan_request != NULL) {
 		#ifdef CONFIG_DEBUG_CFG80211
@@ -1901,14 +1882,11 @@ void rtw_cfg80211_indicate_scan_done(_adapter *adapter, bool aborted)
 		if (pwdev_priv->scan_request->wiphy != pwdev_priv->rtw_wdev->wiphy)
 			RTW_INFO("error wiphy compare\n");
 		else
-		{
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 9, 0))
-			info.aborted = aborted;
+#if (KERNEL_VERSION(4, 7, 0) <= LINUX_VERSION_CODE)
 			cfg80211_scan_done(pwdev_priv->scan_request, &info);
 #else
 			cfg80211_scan_done(pwdev_priv->scan_request, aborted);
 #endif
-		}
 
 		pwdev_priv->scan_request = NULL;
 	} else {
@@ -1970,7 +1948,7 @@ void rtw_cfg80211_unlink_bss(_adapter *padapter, struct wlan_network *pnetwork)
 
 	if (bss) {
 		cfg80211_unlink_bss(wiphy, bss);
-		RTW_INFO("%s(): cfg80211_unlink %s!! () ", __func__, select_network.Ssid.Ssid);
+		RTW_INFO("%s(): cfg80211_unlink %s!!\n", __func__, select_network.Ssid.Ssid);
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)
 		cfg80211_put_bss(padapter->rtw_wdev->wiphy, bss);
 #else
@@ -1980,7 +1958,26 @@ void rtw_cfg80211_unlink_bss(_adapter *padapter, struct wlan_network *pnetwork)
 	return;
 }
 
-void rtw_cfg80211_surveydone_event_callback(_adapter *padapter)
+/* if target wps scan ongoing, target_ssid is filled */
+int rtw_cfg80211_is_target_wps_scan(struct cfg80211_scan_request *scan_req, struct cfg80211_ssid *target_ssid)
+{
+	int ret = 0;
+
+	if (scan_req->n_ssids != 1
+		|| scan_req->ssids[0].ssid_len == 0
+		|| scan_req->n_channels != 1
+	)
+		goto exit;
+
+	/* under target WPS scan */
+	_rtw_memcpy(target_ssid, scan_req->ssids, sizeof(struct cfg80211_ssid));
+	ret = 1;
+
+exit:
+	return ret;
+}
+
+static void _rtw_cfg80211_surveydone_event_callback(_adapter *padapter, struct cfg80211_scan_request *scan_req)
 {
 	_irqL	irqL;
 	_list					*plist, *phead;
@@ -1990,15 +1987,23 @@ void rtw_cfg80211_surveydone_event_callback(_adapter *padapter)
 	u32 cnt = 0;
 	u32 wait_for_surveydone;
 	sint wait_status;
-#ifdef CONFIG_P2P
-	struct	wifidirect_info	*pwdinfo = &padapter->wdinfo;
-#endif /* CONFIG_P2P */
 	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
+	struct cfg80211_ssid target_ssid;
+	u8 target_wps_scan = 0;
 
 #ifdef CONFIG_DEBUG_CFG80211
 	RTW_INFO("%s\n", __func__);
 #endif
 
+	if (scan_req)
+		target_wps_scan = rtw_cfg80211_is_target_wps_scan(scan_req, &target_ssid);
+	else {
+		_enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL);
+		if (pwdev_priv->scan_request != NULL)
+			target_wps_scan = rtw_cfg80211_is_target_wps_scan(pwdev_priv->scan_request, &target_ssid);
+		_exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL);
+	}
+
 	_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
 
 	phead = get_list_head(queue);
@@ -2011,11 +2016,12 @@ void rtw_cfg80211_surveydone_event_callback(_adapter *padapter)
 		pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list);
 
 		/* report network only if the current channel set contains the channel to which this network belongs */
-		if (rtw_ch_set_search_ch(padapter->mlmeextpriv.channel_set, pnetwork->network.Configuration.DSConfig) >= 0
+		if (rtw_chset_search_ch(adapter_to_chset(padapter), pnetwork->network.Configuration.DSConfig) >= 0
 			&& rtw_mlme_band_check(padapter, pnetwork->network.Configuration.DSConfig) == _TRUE
 			&& _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid))
 		) {
-			/* ev=translate_scan(padapter, a, pnetwork, ev, stop); */
+			if (target_wps_scan)
+				rtw_cfg80211_clear_wps_sr_of_non_target_bss(padapter, pnetwork, &target_ssid);
 			rtw_cfg80211_inform_bss(padapter, pnetwork);
 		}
 #if 0
@@ -2036,6 +2042,11 @@ void rtw_cfg80211_surveydone_event_callback(_adapter *padapter)
 	_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
 }
 
+inline void rtw_cfg80211_surveydone_event_callback(_adapter *padapter)
+{
+	_rtw_cfg80211_surveydone_event_callback(padapter, NULL);
+}
+
 static int rtw_cfg80211_set_probe_req_wpsp2pie(_adapter *padapter, char *buf, int len)
 {
 	int ret = 0;
@@ -2134,15 +2145,103 @@ static int rtw_cfg80211_set_probe_req_wpsp2pie(_adapter *padapter, char *buf, in
 
 }
 
+#ifdef CONFIG_CONCURRENT_MODE
+u8 rtw_cfg80211_scan_via_buddy(_adapter *padapter, struct cfg80211_scan_request *request)
+{
+	int i;
+	u8 ret = _FALSE;
+	_adapter *iface = NULL;
+	_irqL	irqL;
+	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
+	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
+	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		struct mlme_priv *buddy_mlmepriv;
+		struct rtw_wdev_priv *buddy_wdev_priv;
+
+		iface = dvobj->padapters[i];
+		if (iface == NULL)
+			continue;
+
+		if (iface == padapter)
+			continue;
+
+		if (rtw_is_adapter_up(iface) == _FALSE)
+			continue;
+
+		buddy_mlmepriv = &iface->mlmepriv;
+		if (!check_fwstate(buddy_mlmepriv, _FW_UNDER_SURVEY))
+			continue;
+
+		buddy_wdev_priv = adapter_wdev_data(iface);
+		_enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL);
+		_enter_critical_bh(&buddy_wdev_priv->scan_req_lock, &irqL);
+		if (buddy_wdev_priv->scan_request) {
+			pmlmepriv->scanning_via_buddy_intf = _TRUE;
+			_enter_critical_bh(&pmlmepriv->lock, &irqL);
+			set_fwstate(pmlmepriv, _FW_UNDER_SURVEY);
+			_exit_critical_bh(&pmlmepriv->lock, &irqL);
+			pwdev_priv->scan_request = request;
+			ret = _TRUE;
+		}
+		_exit_critical_bh(&buddy_wdev_priv->scan_req_lock, &irqL);
+		_exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL);
+
+		if (ret == _TRUE)
+			goto exit;
+	}
+
+exit:
+	return ret;
+}
+
+void rtw_cfg80211_indicate_scan_done_for_buddy(_adapter *padapter, bool bscan_aborted)
+{
+	int i;
+	u8 ret = 0;
+	_adapter *iface = NULL;
+	_irqL	irqL;
+	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
+	struct mlme_priv *mlmepriv;
+	struct rtw_wdev_priv *wdev_priv;
+	bool indicate_buddy_scan;
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		iface = dvobj->padapters[i];
+		if ((iface) && rtw_is_adapter_up(iface)) {
+
+			if (iface == padapter)
+				continue;
+
+			mlmepriv = &(iface->mlmepriv);
+			wdev_priv = adapter_wdev_data(iface);
+
+			indicate_buddy_scan = _FALSE;
+			_enter_critical_bh(&wdev_priv->scan_req_lock, &irqL);
+			if (wdev_priv->scan_request && mlmepriv->scanning_via_buddy_intf == _TRUE) {
+				mlmepriv->scanning_via_buddy_intf = _FALSE;
+				clr_fwstate(mlmepriv, _FW_UNDER_SURVEY);
+				indicate_buddy_scan = _TRUE;
+			}
+			_exit_critical_bh(&wdev_priv->scan_req_lock, &irqL);
+
+			if (indicate_buddy_scan == _TRUE) {
+				rtw_cfg80211_surveydone_event_callback(iface);
+				rtw_indicate_scan_done(iface, bscan_aborted);
+			}
+
+		}
+	}
+}
+#endif /* CONFIG_CONCURRENT_MODE */
+
 static int cfg80211_rtw_scan(struct wiphy *wiphy
 	#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0))
 	, struct net_device *ndev
 	#endif
 	, struct cfg80211_scan_request *request)
 {
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
-	struct net_device *ndev = wdev_to_ndev(request->wdev);
-#endif
 	int i, chan_num = 0;
 	u8 _status = _FALSE;
 	int ret = 0;
@@ -2162,38 +2261,52 @@ static int cfg80211_rtw_scan(struct wiphy *wiphy
 	bool ps_denied = _FALSE;
 
 	_adapter *padapter;
+	struct wireless_dev *wdev;
 	struct rtw_wdev_priv *pwdev_priv;
 	struct mlme_priv *pmlmepriv;
 #ifdef CONFIG_P2P
 	struct wifidirect_info *pwdinfo;
 #endif /* CONFIG_P2P */
 
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
+	wdev = request->wdev;
+	#if defined(RTW_DEDICATED_P2P_DEVICE)
+	if (wdev == wiphy_to_pd_wdev(wiphy))
+		padapter = wiphy_to_adapter(wiphy);
+	else
+	#endif
+	if (wdev_to_ndev(wdev))
+		padapter = (_adapter *)rtw_netdev_priv(wdev_to_ndev(wdev));
+	else {
+		ret = -EINVAL;
+		goto exit;
+	}
+#else
 	if (ndev == NULL) {
 		ret = -EINVAL;
 		goto exit;
 	}
-
 	padapter = (_adapter *)rtw_netdev_priv(ndev);
+	wdev = ndev_to_wdev(ndev);
+#endif
+
 	pwdev_priv = adapter_wdev_data(padapter);
 	pmlmepriv = &padapter->mlmepriv;
 #ifdef CONFIG_P2P
 	pwdinfo = &(padapter->wdinfo);
 #endif /* CONFIG_P2P */
 
-	RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
+	RTW_INFO(FUNC_ADPT_FMT"%s\n", FUNC_ADPT_ARG(padapter)
+		, wdev == wiphy_to_pd_wdev(wiphy) ? " PD" : "");
 
 #ifdef CONFIG_MP_INCLUDED
-	if (rtw_mi_mp_mode_check(padapter)) {
+	if (rtw_mp_mode_check(padapter)) {
 		RTW_INFO("MP mode block Scan request\n");
 		ret = -EPERM;
 		goto exit;
 	}
 #endif
 
-	_enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL);
-	pwdev_priv->scan_request = request;
-	_exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL);
-
 	if (adapter_wdev_data(padapter)->block_scan == _TRUE) {
 		RTW_INFO(FUNC_ADPT_FMT" wdev_priv.block_scan is set\n", FUNC_ADPT_ARG(padapter));
 		need_indicate_scan_done = _TRUE;
@@ -2213,10 +2326,9 @@ static int cfg80211_rtw_scan(struct wiphy *wiphy
 			&& _rtw_memcmp(ssids->ssid, "DIRECT-", 7)
 			&& rtw_get_p2p_ie((u8 *)request->ie, request->ie_len, NULL, NULL)
 		) {
-			if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) {
+			if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
 				rtw_p2p_enable(padapter, P2P_ROLE_DEVICE);
-				adapter_wdev_data(padapter)->p2p_enabled = _TRUE;
-			} else {
+			else {
 				rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo));
 				#ifdef CONFIG_DEBUG_CFG80211
 				RTW_INFO("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo));
@@ -2277,19 +2389,14 @@ static int cfg80211_rtw_scan(struct wiphy *wiphy
 		need_indicate_scan_done = _TRUE;
 		goto check_need_indicate_scan_done;
 
-	} else {
-		bool scan_via_buddy = _FALSE;
-		u8 bunder_survey = rtw_mi_buddy_under_survey(padapter);
+	} else if (rtw_mi_buddy_check_fwstate(padapter, _FW_UNDER_SURVEY)) {
+		bool scan_via_buddy = rtw_cfg80211_scan_via_buddy(padapter, request);
 
-		if (bunder_survey) {
-			scan_via_buddy = (UNDER_SURVEY_T2 == bunder_survey) ? _TRUE : _FALSE;
-			if (scan_via_buddy == _FALSE)
-				need_indicate_scan_done = _TRUE;
+		if (scan_via_buddy == _FALSE)
+			need_indicate_scan_done = _TRUE;
 
-			goto check_need_indicate_scan_done;
-		}
+		goto check_need_indicate_scan_done;
 	}
-
 #endif /* CONFIG_CONCURRENT_MODE */
 
 	/* busy traffic check*/
@@ -2331,8 +2438,6 @@ static int cfg80211_rtw_scan(struct wiphy *wiphy
 		ch[i].flags = request->channels[i]->flags;
 	}
 
-
-
 	if (request->n_channels == 1) {
 		for (i = 1; i < survey_times_for_one_ch; i++)
 			_rtw_memcpy(&ch[i], &ch[0], sizeof(struct rtw_ieee80211_channel));
@@ -2349,18 +2454,31 @@ static int cfg80211_rtw_scan(struct wiphy *wiphy
 		chan_num = request->n_channels;
 	}
 
+	_enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL);
 	_enter_critical_bh(&pmlmepriv->lock, &irqL);
 	_status = rtw_sitesurvey_cmd(padapter, ssid, RTW_SSID_SCAN_AMOUNT, pch, chan_num);
-	_exit_critical_bh(&pmlmepriv->lock, &irqL);
-
-
-	if (_status == _FALSE)
+	if (_status == _SUCCESS)
+		pwdev_priv->scan_request = request;
+	else
 		ret = -1;
+	_exit_critical_bh(&pmlmepriv->lock, &irqL);
+	_exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL);
 
 check_need_indicate_scan_done:
 	if (_TRUE == need_indicate_scan_done) {
-		rtw_cfg80211_surveydone_event_callback(padapter);
-		rtw_cfg80211_indicate_scan_done(padapter, _FALSE);
+#if (KERNEL_VERSION(4, 7, 0) <= LINUX_VERSION_CODE)
+		struct cfg80211_scan_info info;
+
+		memset(&info, 0, sizeof(info));
+		info.aborted = 0;
+#endif
+
+		_rtw_cfg80211_surveydone_event_callback(padapter, request);
+#if (KERNEL_VERSION(4, 7, 0) <= LINUX_VERSION_CODE)
+		cfg80211_scan_done(request, &info);
+#else
+		cfg80211_scan_done(request, 0);
+#endif
 	}
 
 cancel_ps_deny:
@@ -2859,14 +2977,13 @@ static int cfg80211_rtw_leave_ibss(struct wiphy *wiphy, struct net_device *ndev)
 {
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(ndev);
 	struct wireless_dev *rtw_wdev = padapter->rtw_wdev;
+	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
 	enum nl80211_iftype old_type;
 	int ret = 0;
 
 	RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev));
 
-	#ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42
-	padapter->mlmepriv.not_indic_disco = _TRUE;
-	#endif
+	rtw_wdev_set_not_indic_disco(pwdev_priv, 1);
 
 	old_type = rtw_wdev->iftype;
 
@@ -2887,9 +3004,7 @@ static int cfg80211_rtw_leave_ibss(struct wiphy *wiphy, struct net_device *ndev)
 	}
 
 leave_ibss:
-	#ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42
-	padapter->mlmepriv.not_indic_disco = _FALSE;
-	#endif
+	rtw_wdev_set_not_indic_disco(pwdev_priv, 0);
 
 	return 0;
 }
@@ -2898,8 +3013,6 @@ static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *ndev,
 				struct cfg80211_connect_params *sme)
 {
 	int ret = 0;
-	_irqL irqL;
-	_list *phead;
 	struct wlan_network *pnetwork = NULL;
 	NDIS_802_11_AUTHENTICATION_MODE authmode;
 	NDIS_802_11_SSID ndis_ssid;
@@ -2912,17 +3025,18 @@ static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *ndev,
 	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 	struct security_priv *psecuritypriv = &padapter->securitypriv;
 	_queue *queue = &pmlmepriv->scanned_queue;
+	struct wireless_dev *pwdev = padapter->rtw_wdev;
+	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
+	_irqL irqL;
 
-#ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42
-	padapter->mlmepriv.not_indic_disco = _TRUE;
-#endif
+	rtw_wdev_set_not_indic_disco(pwdev_priv, 1);
 
 	RTW_INFO("=>"FUNC_NDEV_FMT" - Start to Connection\n", FUNC_NDEV_ARG(ndev));
 	RTW_INFO("privacy=%d, key=%p, key_len=%d, key_idx=%d, auth_type=%d\n",
 		sme->privacy, sme->key, sme->key_len, sme->key_idx, sme->auth_type);
 
 
-	if (adapter_wdev_data(padapter)->block == _TRUE) {
+	if (pwdev_priv->block == _TRUE) {
 		ret = -EBUSY;
 		RTW_INFO("%s wdev_priv.block is set\n", __FUNCTION__);
 		goto exit;
@@ -2930,7 +3044,7 @@ static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *ndev,
 
 #ifdef CONFIG_PLATFORM_MSTAR_SCAN_BEFORE_CONNECT
 	printk("MStar Android!\n");
-	if (adapter_wdev_data(padapter)->bandroid_scan == _FALSE) {
+	if (pwdev_priv->bandroid_scan == _FALSE) {
 #ifdef CONFIG_P2P
 		struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
 		if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
@@ -3121,6 +3235,22 @@ static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *ndev,
 		goto cancel_ps_deny;
 	}
 
+
+	_enter_critical_bh(&pwdev_priv->connect_req_lock, &irqL);
+
+	if (pwdev_priv->connect_req) {
+		rtw_wdev_free_connect_req(pwdev_priv);
+		RTW_INFO(FUNC_NDEV_FMT" free existing connect_req\n", FUNC_NDEV_ARG(ndev));
+	}
+
+	pwdev_priv->connect_req = (struct cfg80211_connect_params *)rtw_malloc(sizeof(*pwdev_priv->connect_req));
+	if (pwdev_priv->connect_req)
+		_rtw_memcpy(pwdev_priv->connect_req, sme, sizeof(*pwdev_priv->connect_req));
+	else
+		RTW_WARN(FUNC_NDEV_FMT" alloc connect_req fail\n", FUNC_NDEV_ARG(ndev));
+
+	_exit_critical_bh(&pwdev_priv->connect_req_lock, &irqL);
+
 	RTW_INFO("set ssid:dot11AuthAlgrthm=%d, dot11PrivacyAlgrthm=%d, dot118021XGrpPrivacy=%d\n", psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm,
 		psecuritypriv->dot118021XGrpPrivacy);
 
@@ -3130,9 +3260,7 @@ cancel_ps_deny:
 exit:
 	RTW_INFO("<=%s, ret %d\n", __FUNCTION__, ret);
 
-#ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42
-	padapter->mlmepriv.not_indic_disco = _FALSE;
-#endif
+	rtw_wdev_set_not_indic_disco(pwdev_priv, 0);
 
 	return ret;
 }
@@ -3141,12 +3269,14 @@ static int cfg80211_rtw_disconnect(struct wiphy *wiphy, struct net_device *ndev,
 				   u16 reason_code)
 {
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(ndev);
+	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
 
 	RTW_INFO(FUNC_NDEV_FMT" - Start to Disconnect\n", FUNC_NDEV_ARG(ndev));
 
-#ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42
-	padapter->mlmepriv.not_indic_disco = _TRUE;
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0))
+	if (!wiphy->dev.power.is_prepared)
 #endif
+		rtw_wdev_set_not_indic_disco(pwdev_priv, 1);
 
 	rtw_set_to_roam(padapter, 0);
 
@@ -3154,20 +3284,17 @@ static int cfg80211_rtw_disconnect(struct wiphy *wiphy, struct net_device *ndev,
 	{
 		rtw_scan_abort(padapter);
 		LeaveAllPowerSaveMode(padapter);
-		rtw_disassoc_cmd(padapter, 500, _FALSE);
-		rtw_sta_mstatus_report(padapter);
+		rtw_disassoc_cmd(padapter, 500, RTW_CMDF_WAIT_ACK);
 
 		RTW_INFO("%s...call rtw_indicate_disconnect\n", __func__);
 
 		rtw_free_assoc_resources(padapter, 1);
-		rtw_indicate_disconnect(padapter, 0, _TRUE);
+		rtw_indicate_disconnect(padapter, 0, wiphy->dev.power.is_prepared ? _FALSE : _TRUE);
 
 		rtw_pwr_wakeup(padapter);
 	}
 
-#ifdef SUPPLICANT_RTK_VERSION_LOWER_THAN_JB42
-	padapter->mlmepriv.not_indic_disco = _FALSE;
-#endif
+	rtw_wdev_set_not_indic_disco(pwdev_priv, 0);
 
 	RTW_INFO(FUNC_NDEV_FMT" return 0\n", FUNC_NDEV_ARG(ndev));
 	return 0;
@@ -3383,9 +3510,9 @@ void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint f
 	freq = rtw_ch2freq(channel);
 
 	#ifdef COMPAT_KERNEL_RELEASE
-	rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC);
+	rtw_cfg80211_rx_mgmt(pwdev, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC);
 	#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER)
-	rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC);
+	rtw_cfg80211_rx_mgmt(pwdev, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC);
 	#else /* COMPAT_KERNEL_RELEASE */
 	{
 		/* to avoid WARN_ON(wdev->iftype != NL80211_IFTYPE_STATION)  when calling cfg80211_send_rx_assoc() */
@@ -3414,6 +3541,7 @@ void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, u
 	u8 mgmt_buf[128] = {0};
 	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
 	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	struct wireless_dev *wdev = padapter->rtw_wdev;
 	struct net_device *ndev = padapter->pnetdev;
 
 	RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
@@ -3445,9 +3573,9 @@ void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, u
 	pmgmt_frame = rtw_set_fixed_ie(pmgmt_frame, _RSON_CODE_ , (unsigned char *)&reason, &frame_len);
 
 	#ifdef COMPAT_KERNEL_RELEASE
-	rtw_cfg80211_rx_mgmt(padapter, freq, 0, mgmt_buf, frame_len, GFP_ATOMIC);
+	rtw_cfg80211_rx_mgmt(wdev, freq, 0, mgmt_buf, frame_len, GFP_ATOMIC);
 	#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER)
-	rtw_cfg80211_rx_mgmt(padapter, freq, 0, mgmt_buf, frame_len, GFP_ATOMIC);
+	rtw_cfg80211_rx_mgmt(wdev, freq, 0, mgmt_buf, frame_len, GFP_ATOMIC);
 	#else /* COMPAT_KERNEL_RELEASE */
 	cfg80211_send_disassoc(padapter->pnetdev, mgmt_buf, frame_len);
 	/* cfg80211_rx_action(padapter->pnetdev, freq, mgmt_buf, frame_len, GFP_ATOMIC); */
@@ -3749,46 +3877,73 @@ static int
 		enum nl80211_iftype type, u32 *flags, struct vif_params *params)
 {
 	int ret = 0;
+	struct wireless_dev *wdev = NULL;
 	struct net_device *ndev = NULL;
-	_adapter *padapter = wiphy_to_adapter(wiphy);
+	_adapter *padapter;
+	struct dvobj_priv *dvobj = wiphy_to_dvobj(wiphy);
 
-	RTW_INFO("%s wiphy:%s, name:%s, type:%d\n",
-		__func__, wiphy_name(wiphy), name, type);
+	rtw_set_rtnl_lock_holder(dvobj, current);
+
+	RTW_INFO(FUNC_WIPHY_FMT" name:%s, type:%d\n", FUNC_WIPHY_ARG(wiphy), name, type);
 
 	switch (type) {
-	case NL80211_IFTYPE_ADHOC:
-	case NL80211_IFTYPE_AP_VLAN:
-	case NL80211_IFTYPE_WDS:
-	case NL80211_IFTYPE_MESH_POINT:
-		ret = -ENODEV;
-		break;
 	case NL80211_IFTYPE_MONITOR:
+		padapter = wiphy_to_adapter(wiphy); /* TODO: get ap iface ? */
 		ret = rtw_cfg80211_add_monitor_if(padapter, (char *)name, &ndev);
+		if (ret == 0)
+			wdev = ndev->ieee80211_ptr;
 		break;
 
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)
+#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE))
 	case NL80211_IFTYPE_P2P_CLIENT:
+	case NL80211_IFTYPE_P2P_GO:
 #endif
 	case NL80211_IFTYPE_STATION:
-		ret = -ENODEV;
+	case NL80211_IFTYPE_AP:
+		padapter = dvobj_get_unregisterd_adapter(dvobj);
+		if (!padapter) {
+			RTW_WARN("adapter pool empty!\n");
+			ret = -ENODEV;
+			break;
+		}
+		if (rtw_os_ndev_init(padapter, name) != _SUCCESS) {
+			RTW_WARN("ndev init fail!\n");
+			ret = -ENODEV;
+			break;
+		}
+		#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE))
+		if (type == NL80211_IFTYPE_P2P_CLIENT || type == NL80211_IFTYPE_P2P_GO)
+			rtw_p2p_enable(padapter, P2P_ROLE_DEVICE);
+		#endif
+		ndev = padapter->pnetdev;
+		wdev = ndev->ieee80211_ptr;
 		break;
 
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)
-	case NL80211_IFTYPE_P2P_GO:
-#endif
-	case NL80211_IFTYPE_AP:
-		ret = -ENODEV;
+#if defined(CONFIG_P2P) && defined(RTW_DEDICATED_P2P_DEVICE)
+	case NL80211_IFTYPE_P2P_DEVICE:
+		ret = rtw_pd_iface_alloc(wiphy, name, &wdev);
 		break;
+#endif
+
+	case NL80211_IFTYPE_ADHOC:
+	case NL80211_IFTYPE_AP_VLAN:
+	case NL80211_IFTYPE_WDS:
+	case NL80211_IFTYPE_MESH_POINT:
 	default:
 		ret = -ENODEV;
 		RTW_INFO("Unsupported interface type\n");
 		break;
 	}
 
-	RTW_INFO("%s ndev:%p, ret:%d\n", __func__, ndev, ret);
+	if (ndev)
+		RTW_INFO(FUNC_WIPHY_FMT" ndev:%p, ret:%d\n", FUNC_WIPHY_ARG(wiphy), ndev, ret);
+	else
+		RTW_INFO(FUNC_WIPHY_FMT" wdev:%p, ret:%d\n", FUNC_WIPHY_ARG(wiphy), wdev, ret);
+
+	rtw_set_rtnl_lock_holder(dvobj, NULL);
 
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
-	return ndev ? ndev->ieee80211_ptr : ERR_PTR(ret);
+	return wdev ? wdev : ERR_PTR(ret);
 #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38)) || defined(COMPAT_KERNEL_RELEASE)
 	return ndev ? ndev : ERR_PTR(ret);
 #else
@@ -3808,26 +3963,43 @@ static int cfg80211_rtw_del_virtual_intf(struct wiphy *wiphy,
 	struct net_device *ndev = wdev_to_ndev(wdev);
 #endif
 	int ret = 0;
+	struct dvobj_priv *dvobj = wiphy_to_dvobj(wiphy);
 	_adapter *adapter;
 	struct rtw_wdev_priv *pwdev_priv;
 
-	if (!ndev) {
-		ret = -EINVAL;
-		goto exit;
-	}
-
-	adapter = (_adapter *)rtw_netdev_priv(ndev);
-	pwdev_priv = adapter_wdev_data(adapter);
+	rtw_set_rtnl_lock_holder(dvobj, current);
 
-	unregister_netdevice(ndev);
+	if (ndev) {
+		adapter = (_adapter *)rtw_netdev_priv(ndev);
+		pwdev_priv = adapter_wdev_data(adapter);
 
-	if (ndev == pwdev_priv->pmon_ndev) {
-		pwdev_priv->pmon_ndev = NULL;
-		pwdev_priv->ifname_mon[0] = '\0';
-		RTW_INFO(FUNC_NDEV_FMT" remove monitor interface\n", FUNC_NDEV_ARG(ndev));
+		if (ndev == pwdev_priv->pmon_ndev) {
+			unregister_netdevice(ndev);
+			pwdev_priv->pmon_ndev = NULL;
+			pwdev_priv->ifname_mon[0] = '\0';
+			RTW_INFO(FUNC_NDEV_FMT" remove monitor ndev\n", FUNC_NDEV_ARG(ndev));
+		} else {
+			RTW_INFO(FUNC_NDEV_FMT" unregister ndev\n", FUNC_NDEV_ARG(ndev));
+			rtw_os_ndev_unregister(adapter);
+		}
+	} else
+#if defined(CONFIG_P2P) && defined(RTW_DEDICATED_P2P_DEVICE)
+	if (wdev->iftype == NL80211_IFTYPE_P2P_DEVICE) {
+		if (wdev == wiphy_to_pd_wdev(wiphy))
+			rtw_pd_iface_free(wiphy);
+		else {
+			RTW_ERR(FUNC_WIPHY_FMT" unknown P2P Device wdev:%p\n", FUNC_WIPHY_ARG(wiphy), wdev);
+			rtw_warn_on(1);
+		}
+	} else
+#endif
+	{
+		ret = -EINVAL;
+		goto exit;
 	}
 
 exit:
+	rtw_set_rtnl_lock_holder(dvobj, NULL);
 	return ret;
 }
 
@@ -3887,7 +4059,6 @@ static int rtw_add_beacon(_adapter *adapter, const u8 *head, size_t head_len, co
 			if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) {
 				RTW_INFO("Enable P2P function for the first time\n");
 				rtw_p2p_enable(adapter, P2P_ROLE_GO);
-				adapter_wdev_data(adapter)->p2p_enabled = _TRUE;
 
 				adapter->stapriv.expire_to = 3; /* 3x2 = 6 sec in p2p mode */
 			} else {
@@ -4278,10 +4449,14 @@ static int	cfg80211_rtw_set_channel(struct wiphy *wiphy
 	#endif
 	, struct ieee80211_channel *chan, enum nl80211_channel_type channel_type)
 {
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35))
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(ndev);
+#else
+	_adapter *padapter = wiphy_to_adapter(wiphy);
+#endif
 	int chan_target = (u8) ieee80211_frequency_to_channel(chan->center_freq);
 	int chan_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
 	int chan_width = CHANNEL_WIDTH_20;
-	_adapter *padapter = wiphy_to_adapter(wiphy);
 
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35))
 	RTW_INFO(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev));
@@ -4426,103 +4601,140 @@ static int	cfg80211_rtw_assoc(struct wiphy *wiphy, struct net_device *ndev,
 }
 #endif /* CONFIG_AP_MODE */
 
-void rtw_cfg80211_rx_probe_request(_adapter *adapter, u8 *frame, uint frame_len)
+void rtw_cfg80211_rx_probe_request(_adapter *adapter, union recv_frame *rframe)
 {
-	s32 freq;
-	int channel;
-	struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
+	struct wireless_dev *wdev = adapter->rtw_wdev;
 	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter);
-	u8 category, action;
+	u8 *frame = get_recvframe_data(rframe);
+	uint frame_len = rframe->u.hdr.len;
+	s32 freq;
+	u8 ch, sch = rtw_get_oper_ch(adapter);
 
-	channel = rtw_get_oper_ch(adapter);
-	freq = rtw_ch2freq(channel);
+	ch = rframe->u.hdr.attrib.ch ? rframe->u.hdr.attrib.ch : sch;
+	freq = rtw_ch2freq(ch);
 
 #ifdef CONFIG_DEBUG_CFG80211
-	RTW_INFO("RTW_Rx: probe request, cur_ch=%d\n", channel);
-#endif /* CONFIG_DEBUG_CFG80211 */
+	RTW_INFO("RTW_Rx: probe request, ch=%d(%d)\n", ch, sch);
+#endif
+
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)
-	rtw_cfg80211_rx_mgmt(adapter, freq, 0, frame, frame_len, GFP_ATOMIC);
+	rtw_cfg80211_rx_mgmt(wdev, freq, 0, frame, frame_len, GFP_ATOMIC);
 #else
 	cfg80211_rx_action(adapter->pnetdev, freq, frame, frame_len, GFP_ATOMIC);
 #endif
 }
 
-void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len)
+void rtw_cfg80211_rx_action_p2p(_adapter *adapter, union recv_frame *rframe)
 {
-	int type;
+	struct wireless_dev *wdev = adapter->rtw_wdev;
+	u8 *frame = get_recvframe_data(rframe);
+	uint frame_len = rframe->u.hdr.len;
 	s32 freq;
-	int channel;
-	struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
+	u8 ch, sch = rtw_get_oper_ch(adapter);
 	u8 category, action;
+	int type;
 
-	channel = rtw_get_oper_ch(padapter);
+	ch = rframe->u.hdr.attrib.ch ? rframe->u.hdr.attrib.ch : sch;
+	freq = rtw_ch2freq(ch);
 
-	RTW_INFO("RTW_Rx:cur_ch=%d\n", channel);
+	RTW_INFO("RTW_Rx:ch=%d(%d)\n", ch, sch);
 #ifdef CONFIG_P2P
-	type = rtw_p2p_check_frames(padapter, pmgmt_frame, frame_len, _FALSE);
+	type = rtw_p2p_check_frames(adapter, frame, frame_len, _FALSE);
 	if (type >= 0)
 		goto indicate;
 #endif
-	rtw_action_frame_parse(pmgmt_frame, frame_len, &category, &action);
+	rtw_action_frame_parse(frame, frame_len, &category, &action);
 	RTW_INFO("RTW_Rx:category(%u), action(%u)\n", category, action);
 
 indicate:
-	freq = rtw_ch2freq(channel);
 
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)
-	rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC);
+	rtw_cfg80211_rx_mgmt(wdev, freq, 0, frame, frame_len, GFP_ATOMIC);
 #else
-	cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC);
+	cfg80211_rx_action(adapter->pnetdev, freq, frame, frame_len, GFP_ATOMIC);
 #endif
 }
 
-void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len)
+void rtw_cfg80211_rx_p2p_action_public(_adapter *adapter, union recv_frame *rframe)
 {
-	int type;
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	struct wireless_dev *wdev = adapter->rtw_wdev;
+	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter);
+	u8 *frame = get_recvframe_data(rframe);
+	uint frame_len = rframe->u.hdr.len;
 	s32 freq;
-	int channel;
-	struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
+	u8 ch, sch = rtw_get_oper_ch(adapter);
 	u8 category, action;
+	int type;
 
-	channel = rtw_get_oper_ch(padapter);
+	ch = rframe->u.hdr.attrib.ch ? rframe->u.hdr.attrib.ch : sch;
+	freq = rtw_ch2freq(ch);
 
-	RTW_INFO("RTW_Rx:cur_ch=%d\n", channel);
+	RTW_INFO("RTW_Rx:ch=%d(%d)\n", ch, sch);
 	#ifdef CONFIG_P2P
-	type = rtw_p2p_check_frames(padapter, pmgmt_frame, frame_len, _FALSE);
+	type = rtw_p2p_check_frames(adapter, frame, frame_len, _FALSE);
 	if (type >= 0) {
 		switch (type) {
 		case P2P_GO_NEGO_CONF:
+			if (0) {
+				RTW_INFO(FUNC_ADPT_FMT" Nego confirm. state=%u, status=%u, iaddr="MAC_FMT"\n"
+					, FUNC_ADPT_ARG(adapter), pwdev_priv->nego_info.state, pwdev_priv->nego_info.status
+					, MAC_ARG(pwdev_priv->nego_info.iface_addr));
+			}
+			if (pwdev_priv->nego_info.state == 2
+				&& pwdev_priv->nego_info.status == 0
+				&& rtw_check_invalid_mac_address(pwdev_priv->nego_info.iface_addr, _FALSE) == _FALSE
+			) {
+				_adapter *intended_iface = dvobj_get_adapter_by_addr(dvobj, pwdev_priv->nego_info.iface_addr);
+
+				if (intended_iface) {
+					RTW_INFO(FUNC_ADPT_FMT" Nego confirm. Allow only "ADPT_FMT" to scan for 2000 ms\n"
+						, FUNC_ADPT_ARG(adapter), ADPT_ARG(intended_iface));
+					/* allow only intended_iface to do scan for 2000 ms */
+					rtw_mi_set_scan_deny(adapter, 2000);
+					rtw_clear_scan_deny(intended_iface);
+				}
+			}
+			break;
 		case P2P_PROVISION_DISC_RESP:
 		case P2P_INVIT_RESP:
-			/*rtw_mi_set_scan_deny(padapter, 2000);
-			rtw_clear_scan_deny(padapter);*/
-			rtw_mi_buddy_set_scan_deny(padapter, 2000);
+			#if !RTW_P2P_GROUP_INTERFACE
+			rtw_mi_buddy_set_scan_deny(adapter, 2000);
+			#endif
+			break;
 		}
 		goto indicate;
 	}
 	#endif
-	rtw_action_frame_parse(pmgmt_frame, frame_len, &category, &action);
+	rtw_action_frame_parse(frame, frame_len, &category, &action);
 	RTW_INFO("RTW_Rx:category(%u), action(%u)\n", category, action);
 
 indicate:
-	freq = rtw_ch2freq(channel);
+	#if defined(RTW_DEDICATED_P2P_DEVICE)
+	if (rtw_cfg80211_redirect_pd_wdev(dvobj_to_wiphy(dvobj), get_ra(frame), &wdev))
+		if (0)
+			RTW_INFO("redirect to pd_wdev:%p\n", wdev);
+	#endif
 
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)
-	rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC);
+	rtw_cfg80211_rx_mgmt(wdev, freq, 0, frame, frame_len, GFP_ATOMIC);
 #else
-	cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC);
+	cfg80211_rx_action(adapter->pnetdev, freq, frame, frame_len, GFP_ATOMIC);
 #endif
 }
 
-void rtw_cfg80211_rx_action(_adapter *adapter, u8 *frame, uint frame_len, const char *msg)
+void rtw_cfg80211_rx_action(_adapter *adapter, union recv_frame *rframe, const char *msg)
 {
-	s32 freq;
-	int channel;
-	struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
+	struct wireless_dev *wdev = adapter->rtw_wdev;
 	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter);
+	u8 *frame = get_recvframe_data(rframe);
+	uint frame_len = rframe->u.hdr.len;
+	s32 freq;
+	u8 ch, sch = rtw_get_oper_ch(adapter);
 	u8 category, action;
 
-	channel = rtw_get_oper_ch(adapter);
+	ch = rframe->u.hdr.attrib.ch ? rframe->u.hdr.attrib.ch : sch;
+	freq = rtw_ch2freq(ch);
 
 	rtw_action_frame_parse(frame, frame_len, &category, &action);
 
@@ -4531,15 +4743,13 @@ void rtw_cfg80211_rx_action(_adapter *adapter, u8 *frame, uint frame_len, const
 		rtw_mi_scan_abort(adapter, _FALSE); /*rtw_scan_abort_no_wait*/
 	}
 
-	freq = rtw_ch2freq(channel);
-
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)
-	rtw_cfg80211_rx_mgmt(adapter, freq, 0, frame, frame_len, GFP_ATOMIC);
+	rtw_cfg80211_rx_mgmt(wdev, freq, 0, frame, frame_len, GFP_ATOMIC);
 #else
 	cfg80211_rx_action(adapter->pnetdev, freq, frame, frame_len, GFP_ATOMIC);
 #endif
 
-	RTW_INFO("RTW_Rx:cur_ch=%d\n", channel);
+	RTW_INFO("RTW_Rx:ch=%d(%d)\n", ch, sch);
 	if (msg)
 		RTW_INFO("RTW_Rx:%s\n", msg);
 	else
@@ -4813,6 +5023,17 @@ static s32 cfg80211_rtw_update_ft_ies(struct wiphy *wiphy,
 }
 #endif
 
+inline void rtw_cfg80211_set_is_roch(_adapter *adapter, bool val)
+{
+	adapter->cfg80211_wdinfo.is_ro_ch = val;
+	rtw_mi_update_iface_status(&(adapter->mlmepriv), 0);
+}
+
+inline bool rtw_cfg80211_get_is_roch(_adapter *adapter)
+{
+	return adapter->cfg80211_wdinfo.is_ro_ch;
+}
+
 static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy,
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
 	struct wireless_dev *wdev,
@@ -4825,15 +5046,12 @@ static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy,
 #endif
 	unsigned int duration, u64 *cookie)
 {
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
-	struct net_device *ndev = wdev_to_ndev(wdev);
-#endif
 	s32 err = 0;
 	u8 remain_ch = (u8) ieee80211_frequency_to_channel(channel->center_freq);
 	u8 union_ch = 0, union_bw = 0, union_offset = 0;
 	u8 i;
 	u8 ready_on_channel = _FALSE;
-	_adapter *padapter;
+	_adapter *padapter = NULL;
 	_adapter *iface;
 	struct dvobj_priv *dvobj;
 	struct rtw_wdev_priv *pwdev_priv;
@@ -4842,15 +5060,34 @@ static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy,
 	struct cfg80211_wifidirect_info *pcfg80211_wdinfo;
 	u8 is_p2p_find = _FALSE;
 
-#ifndef CONFIG_RADIO_WORK /*define for Android L*/
+#ifndef CONFIG_RADIO_WORK
 #define RTW_ROCH_DURATION_ENLARGE
 #define RTW_ROCH_BACK_OP
 #endif
 
-	if (ndev == NULL)
-		return  -EINVAL;
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
+	#if defined(RTW_DEDICATED_P2P_DEVICE)
+	if (wdev == wiphy_to_pd_wdev(wiphy))
+		padapter = wiphy_to_adapter(wiphy);
+	else
+	#endif
+	if (wdev_to_ndev(wdev))
+		padapter = (_adapter *)rtw_netdev_priv(wdev_to_ndev(wdev));
+	else {
+		err = -EINVAL;
+		goto exit;
+	}
+#else
+	struct wireless_dev *wdev;
 
+	if (ndev == NULL) {
+		err = -EINVAL;
+		goto exit;
+	}
 	padapter = (_adapter *)rtw_netdev_priv(ndev);
+	wdev = ndev_to_wdev(ndev);
+#endif
+
 	dvobj = adapter_to_dvobj(padapter);
 	pwdev_priv = adapter_wdev_data(padapter);
 	pmlmeext = &padapter->mlmeextpriv;
@@ -4862,39 +5099,29 @@ static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy,
 
 	*cookie = ATOMIC_INC_RETURN(&pcfg80211_wdinfo->ro_ch_cookie_gen);
 
-	RTW_INFO(FUNC_ADPT_FMT" ch:%u duration:%d, cookie:0x%llx\n", FUNC_ADPT_ARG(padapter), remain_ch, duration, *cookie);
+	RTW_INFO(FUNC_ADPT_FMT"%s ch:%u duration:%d, cookie:0x%llx\n"
+		, FUNC_ADPT_ARG(padapter), wdev == wiphy_to_pd_wdev(wiphy) ? " PD" : ""
+		, remain_ch, duration, *cookie);
+
+	if (rtw_chset_search_ch(adapter_to_chset(padapter), remain_ch) < 0) {
+		RTW_WARN(FUNC_ADPT_FMT" invalid ch:%u\n", FUNC_ADPT_ARG(padapter), remain_ch);
+		err = -EFAULT;
+		goto exit;
+	}
 
 #ifdef CONFIG_MP_INCLUDED
-	if (rtw_mi_mp_mode_check(padapter)) {
+	if (rtw_mp_mode_check(padapter)) {
 		RTW_INFO("MP mode block remain_on_channel request\n");
 		err = -EFAULT;
 		goto exit;
 	}
 #endif
 
-	if (pcfg80211_wdinfo->is_ro_ch == _TRUE) {
-		RTW_INFO("%s, cancel ro ch timer\n", __func__);
-		_cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer);
-		#ifdef CONFIG_CONCURRENT_MODE
-		ATOMIC_SET(&pwdev_priv->ro_ch_to, 1);
-		#endif /* CONFIG_CONCURRENT_MODE */
-		p2p_protocol_wk_hdl(padapter, P2P_RO_CH_WK);
-	}
-
-	pcfg80211_wdinfo->is_ro_ch = _TRUE;
-	pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time();
-
 	if (_FAIL == rtw_pwr_wakeup(padapter)) {
 		err = -EFAULT;
 		goto exit;
 	}
 
-	_rtw_memcpy(&pcfg80211_wdinfo->remain_on_ch_channel, channel, sizeof(struct ieee80211_channel));
-	#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0))
-	pcfg80211_wdinfo->remain_on_ch_type = channel_type;
-	#endif
-	pcfg80211_wdinfo->remain_on_ch_cookie = *cookie;
-
 	rtw_scan_abort(padapter);
 #ifdef CONFIG_CONCURRENT_MODE
 	/*don't scan_abort during p2p_listen.*/
@@ -4902,26 +5129,39 @@ static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy,
 		rtw_mi_buddy_scan_abort(padapter, _TRUE);
 #endif /*CONFIG_CONCURRENT_MODE*/
 
-	for (i = 0; i < dvobj->iface_nums; i++) {
-		iface = dvobj->padapters[i];
-		if (check_fwstate(&iface->mlmepriv, _FW_UNDER_LINKING | WIFI_UNDER_WPS) == _TRUE) {
-			RTW_INFO(ADPT_FMT"- _FW_UNDER_LINKING |WIFI_UNDER_WPS (mlme state:0x%x)\n", ADPT_ARG(iface), get_fwstate(&iface->mlmepriv));
-			remain_ch = iface->mlmeextpriv.cur_channel;
-		}
+	if (rtw_cfg80211_get_is_roch(padapter) == _TRUE) {
+		_cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer);
+		p2p_cancel_roch_cmd(padapter, 0, NULL, RTW_CMDF_WAIT_ACK);
 	}
 
 	/* if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) */
 	if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) {
 		rtw_p2p_enable(padapter, P2P_ROLE_DEVICE);
-		adapter_wdev_data(padapter)->p2p_enabled = _TRUE;
-		padapter->wdinfo.listen_channel = remain_ch;
-	} else if (rtw_p2p_chk_state(pwdinfo , P2P_STATE_LISTEN))
 		padapter->wdinfo.listen_channel = remain_ch;
-	else {
+		RTW_INFO(FUNC_ADPT_FMT" init listen_channel %u\n"
+			, FUNC_ADPT_ARG(padapter), padapter->wdinfo.listen_channel);
+	} else if (rtw_p2p_chk_state(pwdinfo , P2P_STATE_LISTEN)
+		&& (time_after_eq((unsigned long)rtw_get_current_time(), (unsigned long)pwdev_priv->probe_resp_ie_update_time)
+			&& rtw_get_passing_time_ms(pwdev_priv->probe_resp_ie_update_time) < 50)
+	) {
+		if (padapter->wdinfo.listen_channel != remain_ch) {
+			padapter->wdinfo.listen_channel = remain_ch;
+			RTW_INFO(FUNC_ADPT_FMT" update listen_channel %u\n"
+				, FUNC_ADPT_ARG(padapter), padapter->wdinfo.listen_channel);
+		}
+	} else {
 		rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo));
-#ifdef CONFIG_DEBUG_CFG80211
+		#ifdef CONFIG_DEBUG_CFG80211
 		RTW_INFO("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo));
-#endif
+		#endif
+	}
+
+	for (i = 0; i < dvobj->iface_nums; i++) {
+		iface = dvobj->padapters[i];
+		if (check_fwstate(&iface->mlmepriv, _FW_UNDER_LINKING | WIFI_UNDER_WPS) == _TRUE) {
+			RTW_INFO(ADPT_FMT"- _FW_UNDER_LINKING |WIFI_UNDER_WPS (mlme state:0x%x)\n", ADPT_ARG(iface), get_fwstate(&iface->mlmepriv));
+			remain_ch = iface->mlmeextpriv.cur_channel;
+		}
 	}
 
 	rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN);
@@ -4940,78 +5180,69 @@ static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy,
 	}
 #endif /*defined (RTW_ROCH_BACK_OP) && defined(CONFIG_CONCURRENT_MODE) */
 
+	rtw_cfg80211_set_is_roch(padapter, _TRUE);
+	pcfg80211_wdinfo->ro_ch_wdev = wdev;
+	pcfg80211_wdinfo->remain_on_ch_cookie = *cookie;
+	pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time();
+	_rtw_memcpy(&pcfg80211_wdinfo->remain_on_ch_channel, channel, sizeof(struct ieee80211_channel));
+	#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0))
+	pcfg80211_wdinfo->remain_on_ch_type = channel_type;
+	#endif
 	pcfg80211_wdinfo->restore_channel = rtw_get_oper_ch(padapter);
 
-	if (rtw_ch_set_search_ch(pmlmeext->channel_set, remain_ch) >= 0) {
-
 #ifdef CONFIG_CONCURRENT_MODE
-		if (rtw_mi_check_status(padapter, MI_LINKED) && (0 != rtw_mi_get_union_chan(padapter))) {
-			if ((remain_ch != rtw_mi_get_union_chan(padapter)) && !check_fwstate(&padapter->mlmepriv, _FW_LINKED)) {
-				if (ATOMIC_READ(&pwdev_priv->switch_ch_to) == 1 ||
-					(remain_ch != pmlmeext->cur_channel)) {
-
-					rtw_mi_buddy_issue_nulldata(padapter, NULL, 1, 3, 500);
-					ATOMIC_SET(&pwdev_priv->switch_ch_to, 0);
-
-					#ifdef RTW_ROCH_BACK_OP
-					RTW_INFO("%s, set switch ch timer, duration=%d\n", __func__, duration - pwdinfo->ext_listen_interval);
-					_set_timer(&pwdinfo->ap_p2p_switch_timer, duration - pwdinfo->ext_listen_interval);
-					#endif
-				}
-			}
-
-			ready_on_channel = _TRUE;
-			/* pmlmeext->cur_channel = remain_ch;			 */
-			/* set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); */
-		} else
-#endif /* CONFIG_CONCURRENT_MODE */
-			if (remain_ch != rtw_get_oper_ch(padapter)) {
-				ready_on_channel = _TRUE;
-				/* pmlmeext->cur_channel = remain_ch;			 */
-				/* set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20); */
+	if (rtw_mi_check_status(padapter, MI_LINKED) && (0 != rtw_mi_get_union_chan(padapter))) {
+		if ((remain_ch != rtw_mi_get_union_chan(padapter)) && !check_fwstate(&padapter->mlmepriv, _FW_LINKED)) {
+			if (
+#ifdef RTW_ROCH_BACK_OP
+				ATOMIC_READ(&pwdev_priv->switch_ch_to) == 1 ||
+#endif
+				(remain_ch != pmlmeext->cur_channel)) {
+				#ifdef CONFIG_AP_MODE
+				/*mac-id sleep or wake-up for AP mode*/
+				rtw_mi_buddy_ap_acdata_control(padapter, 1);
+				#endif/*CONFIG_AP_MODE*/
+				rtw_mi_buddy_issue_nulldata(padapter, NULL, 1, 3, 500);
+				#ifdef RTW_ROCH_BACK_OP
+				RTW_INFO("%s, set switch ch timer, duration=%d\n", __func__, duration - pwdinfo->ext_listen_interval);
+				ATOMIC_SET(&pwdev_priv->switch_ch_to, 0);
+				_set_timer(&pwdinfo->ap_p2p_switch_timer, duration - pwdinfo->ext_listen_interval);
+				#endif
 			}
+		}
+		ready_on_channel = _TRUE;
 	} else
-		RTW_INFO("%s remain_ch:%u not in channel plan!!!!\n", __FUNCTION__, remain_ch);
-
-
-	/* call this after other things have been done */
-#ifdef CONFIG_CONCURRENT_MODE
-	if (ATOMIC_READ(&pwdev_priv->ro_ch_to) == 1 ||
-		(remain_ch != rtw_get_oper_ch(padapter))) {
-		u8 co_channel = 0xff;
-		ATOMIC_SET(&pwdev_priv->ro_ch_to, 0);
-#endif
-
-		if (ready_on_channel == _TRUE) {
-			if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED)) {
-				pmlmeext->cur_channel = remain_ch;
-
-#ifdef CONFIG_CONCURRENT_MODE
-				co_channel = rtw_get_oper_ch(padapter);
+#endif /* CONFIG_CONCURRENT_MODE */
+	{
+		if (remain_ch != rtw_get_oper_ch(padapter))
+			ready_on_channel = _TRUE;
+	}
 
-				if (co_channel != remain_ch)
-#endif
-				{
-					/* if (!padapter->mlmepriv.LinkDetectInfo.bBusyTraffic) */
-					set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20);
-				}
+	if (ready_on_channel == _TRUE) {
+		#ifndef RTW_SINGLE_WIPHY
+		if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED))
+		#endif
+		{
+			#ifdef CONFIG_CONCURRENT_MODE
+			if (rtw_get_oper_ch(padapter) != remain_ch)
+			#endif
+			{
+				/* if (!padapter->mlmepriv.LinkDetectInfo.bBusyTraffic) */
+				set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20);
 			}
 		}
-		RTW_INFO("%s, set ro ch timer, duration=%d\n", __func__, duration);
-		_set_timer(&pcfg80211_wdinfo->remain_on_ch_timer, duration);
-
-#ifdef CONFIG_CONCURRENT_MODE
 	}
+
+#ifdef CONFIG_BT_COEXIST
+	rtw_btcoex_ScanNotify(padapter, _TRUE);
 #endif
 
-	rtw_cfg80211_ready_on_channel(padapter, *cookie, channel, channel_type, duration, GFP_KERNEL);
+	RTW_INFO("%s, set ro ch timer, duration=%d\n", __func__, duration);
+	_set_timer(&pcfg80211_wdinfo->remain_on_ch_timer, duration);
 
-exit:
-	if (err) {
-		pcfg80211_wdinfo->is_ro_ch = _FALSE;
-		pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time();
-	}
+	rtw_cfg80211_ready_on_channel(wdev, *cookie, channel, channel_type, duration, GFP_KERNEL);
 
+exit:
 	return err;
 }
 
@@ -5023,62 +5254,246 @@ static s32 cfg80211_rtw_cancel_remain_on_channel(struct wiphy *wiphy,
 #endif
 	u64 cookie)
 {
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
-	struct net_device *ndev = wdev_to_ndev(wdev);
-#endif
 	s32 err = 0;
 	_adapter *padapter;
 	struct rtw_wdev_priv *pwdev_priv;
 	struct wifidirect_info *pwdinfo;
 	struct cfg80211_wifidirect_info *pcfg80211_wdinfo;
 
-	if (ndev == NULL) {
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
+	#if defined(RTW_DEDICATED_P2P_DEVICE)
+	if (wdev == wiphy_to_pd_wdev(wiphy))
+		padapter = wiphy_to_adapter(wiphy);
+	else
+	#endif
+	if (wdev_to_ndev(wdev))
+		padapter = (_adapter *)rtw_netdev_priv(wdev_to_ndev(wdev));
+	else {
 		err = -EINVAL;
 		goto exit;
 	}
+#else
+	struct wireless_dev *wdev;
 
+	if (ndev == NULL) {
+		err = -EINVAL;
+		goto exit;
+	}
 	padapter = (_adapter *)rtw_netdev_priv(ndev);
+	wdev = ndev_to_wdev(ndev);
+#endif
+
 	pwdev_priv = adapter_wdev_data(padapter);
 	pwdinfo = &padapter->wdinfo;
 	pcfg80211_wdinfo = &padapter->cfg80211_wdinfo;
 
-	RTW_INFO(FUNC_ADPT_FMT" cookie:0x%llx\n", FUNC_ADPT_ARG(padapter), cookie);
+	RTW_INFO(FUNC_ADPT_FMT"%s cookie:0x%llx\n"
+		, FUNC_ADPT_ARG(padapter), wdev == wiphy_to_pd_wdev(wiphy) ? " PD" : ""
+		, cookie);
 
-	if (pcfg80211_wdinfo->is_ro_ch == _TRUE) {
-		RTW_INFO("%s, cancel ro ch timer\n", __func__);
+	if (rtw_cfg80211_get_is_roch(padapter) == _TRUE) {
 		_cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer);
-		#ifdef CONFIG_CONCURRENT_MODE
-		ATOMIC_SET(&pwdev_priv->ro_ch_to, 1);
-		#endif
-		p2p_protocol_wk_hdl(padapter, P2P_RO_CH_WK);
+		p2p_cancel_roch_cmd(padapter, cookie, wdev, RTW_CMDF_WAIT_ACK);
 	}
 
-#if 0
-	/*	Disable P2P Listen State */
-	if (!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) {
-		if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) {
-			rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE);
-			_rtw_memset(pwdinfo, 0x00, sizeof(struct wifidirect_info));
-		}
-	} else
+exit:
+	return err;
+}
+
+inline int rtw_cfg80211_iface_has_p2p_group_cap(_adapter *adapter)
+{
+	struct wiphy *wiphy = adapter_to_wiphy(adapter);
+	struct rtw_wdev_priv *wdev_data = adapter_wdev_data(adapter);
+
+#if RTW_P2P_GROUP_INTERFACE
+	if (is_primary_adapter(adapter))
+		return 0;
+#endif
+	return 1;
+}
+
+inline int rtw_cfg80211_is_p2p_scan(_adapter *adapter)
+{
+#if RTW_P2P_GROUP_INTERFACE
+	if (rtw_cfg80211_iface_has_p2p_group_cap(adapter))
 #endif
 	{
-		rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo));
-#ifdef CONFIG_DEBUG_CFG80211
-		RTW_INFO("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo));
+		struct wifidirect_info *wdinfo = &adapter->wdinfo;
+
+		return rtw_p2p_chk_state(wdinfo, P2P_STATE_SCAN)
+			|| rtw_p2p_chk_state(wdinfo, P2P_STATE_FIND_PHASE_SEARCH);
+	}
+
+#if RTW_P2P_GROUP_INTERFACE
+	#if defined(RTW_DEDICATED_P2P_DEVICE)
+	if (wiphy_to_pd_wdev(adapter_to_wiphy(adapter))) /* pd_wdev exist */
+		return rtw_cfg80211_is_scan_by_pd_wdev(adapter);
+	#endif
+	{
+		/*
+		* For 2 RTW_P2P_GROUP_INTERFACE cases:
+		* 1. RTW_DEDICATED_P2P_DEVICE defined but upper layer don't use pd_wdev or
+		* 2. RTW_DEDICATED_P2P_DEVICE not defined
+		*/
+		struct rtw_wdev_priv *wdev_data = adapter_wdev_data(adapter);
+		_irqL irqL;
+		int is_p2p_scan = 0;
+
+		_enter_critical_bh(&wdev_data->scan_req_lock, &irqL);
+		if (wdev_data->scan_request
+			&& wdev_data->scan_request->ssids
+			&& wdev_data->scan_request->ie
+		) {
+			if (_rtw_memcmp(wdev_data->scan_request->ssids->ssid, "DIRECT-", 7)
+				&& rtw_get_p2p_ie((u8 *)wdev_data->scan_request->ie, wdev_data->scan_request->ie_len, NULL, NULL))
+				is_p2p_scan = 1;
+		}
+		_exit_critical_bh(&wdev_data->scan_req_lock, &irqL);
+
+		return is_p2p_scan;
+	}
 #endif
+}
+
+#if defined(RTW_DEDICATED_P2P_DEVICE)
+int rtw_pd_iface_alloc(struct wiphy *wiphy, const char *name, struct wireless_dev **pd_wdev)
+{
+	struct rtw_wiphy_data *wiphy_data = rtw_wiphy_priv(wiphy);
+	struct wireless_dev *wdev = NULL;
+	struct rtw_netdev_priv_indicator *npi;
+	_adapter *primary_adpt = wiphy_to_adapter(wiphy);
+	int ret = 0;
+
+	if (wiphy_data->pd_wdev) {
+		RTW_WARN(FUNC_WIPHY_FMT" pd_wdev already exists\n", FUNC_WIPHY_ARG(wiphy));
+		ret = -EBUSY;
+		goto exit;
 	}
 
-	pcfg80211_wdinfo->is_ro_ch = _FALSE;
-	pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time();
+	wdev = (struct wireless_dev *)rtw_zmalloc(sizeof(struct wireless_dev));
+	if (!wdev) {
+		RTW_WARN(FUNC_WIPHY_FMT" allocate wdev fail\n", FUNC_WIPHY_ARG(wiphy));
+		ret = -ENOMEM;
+		goto exit;
+	}
+
+	wdev->wiphy = wiphy;
+	wdev->iftype = NL80211_IFTYPE_P2P_DEVICE;
+	_rtw_memcpy(wdev->address, adapter_mac_addr(primary_adpt), ETH_ALEN);
+
+	wiphy_data->pd_wdev = wdev;
+	*pd_wdev = wdev;
+
+	RTW_INFO(FUNC_WIPHY_FMT" pd_wdev:%p, addr="MAC_FMT" added\n"
+		, FUNC_WIPHY_ARG(wiphy), wdev, MAC_ARG(wdev_address(wdev)));
 
 exit:
-	return err;
+	if (ret && wdev) {
+		rtw_mfree((u8 *)wdev, sizeof(struct wireless_dev));
+		wdev = NULL;
+	}
+
+	return ret;
+}
+
+void rtw_pd_iface_free(struct wiphy *wiphy)
+{
+	struct dvobj_priv *dvobj = wiphy_to_dvobj(wiphy);
+	struct rtw_wiphy_data *wiphy_data = rtw_wiphy_priv(wiphy);
+	u8 rtnl_lock_needed;
+
+	if (!wiphy_data->pd_wdev)
+		goto exit;
+
+	RTW_INFO(FUNC_WIPHY_FMT" pd_wdev:%p, addr="MAC_FMT"\n"
+		, FUNC_WIPHY_ARG(wiphy), wiphy_data->pd_wdev
+		, MAC_ARG(wdev_address(wiphy_data->pd_wdev)));
+
+	rtnl_lock_needed = rtw_rtnl_lock_needed(dvobj);
+	if (rtnl_lock_needed)
+		rtnl_lock();
+	cfg80211_unregister_wdev(wiphy_data->pd_wdev);
+	if (rtnl_lock_needed)
+		rtnl_unlock();
+
+	rtw_mfree((u8 *)wiphy_data->pd_wdev, sizeof(struct wireless_dev));
+	wiphy_data->pd_wdev = NULL;
+
+exit:
+	return;
+}
+
+static int cfg80211_rtw_start_p2p_device(struct wiphy *wiphy, struct wireless_dev *wdev)
+{
+	_adapter *adapter = wiphy_to_adapter(wiphy);
+
+	RTW_INFO(FUNC_WIPHY_FMT" wdev=%p\n", FUNC_WIPHY_ARG(wiphy), wdev);
+
+	rtw_p2p_enable(adapter, P2P_ROLE_DEVICE);
+	return 0;
+}
+
+static void cfg80211_rtw_stop_p2p_device(struct wiphy *wiphy, struct wireless_dev *wdev)
+{
+	_adapter *adapter = wiphy_to_adapter(wiphy);
+
+	RTW_INFO(FUNC_WIPHY_FMT" wdev=%p\n", FUNC_WIPHY_ARG(wiphy), wdev);
+
+	if (rtw_cfg80211_is_p2p_scan(adapter))
+		rtw_scan_abort(adapter);
+
+	rtw_p2p_enable(adapter, P2P_ROLE_DISABLE);
+}
+
+inline int rtw_cfg80211_redirect_pd_wdev(struct wiphy *wiphy, u8 *ra, struct wireless_dev **wdev)
+{
+	struct wireless_dev *pd_wdev = wiphy_to_pd_wdev(wiphy);
+
+	if (pd_wdev && pd_wdev != *wdev
+		&& _rtw_memcmp(wdev_address(pd_wdev), ra, ETH_ALEN) == _TRUE
+	) {
+		*wdev = pd_wdev;
+		return 1;
+	}
+	return 0;
 }
 
+inline int rtw_cfg80211_is_scan_by_pd_wdev(_adapter *adapter)
+{
+	struct wiphy *wiphy = adapter_to_wiphy(adapter);
+	struct rtw_wdev_priv *wdev_data = adapter_wdev_data(adapter);
+	struct wireless_dev *wdev = NULL;
+	_irqL irqL;
+
+	_enter_critical_bh(&wdev_data->scan_req_lock, &irqL);
+	if (wdev_data->scan_request)
+		wdev = wdev_data->scan_request->wdev;
+	_exit_critical_bh(&wdev_data->scan_req_lock, &irqL);
+
+	if (wdev && wdev == wiphy_to_pd_wdev(wiphy))
+		return 1;
+
+	return 0;
+}
+#endif /* RTW_DEDICATED_P2P_DEVICE */
 #endif /* CONFIG_P2P */
 
-static int _cfg80211_rtw_mgmt_tx(_adapter *padapter, u8 tx_ch, const u8 *buf, size_t len, int wait_ack)
+inline void rtw_cfg80211_set_is_mgmt_tx(_adapter *adapter, u8 val)
+{
+	struct rtw_wdev_priv *wdev_priv = adapter_wdev_data(adapter);
+
+	wdev_priv->is_mgmt_tx = val;
+	rtw_mi_update_iface_status(&(adapter->mlmepriv), 0);
+}
+
+inline u8 rtw_cfg80211_get_is_mgmt_tx(_adapter *adapter)
+{
+	struct rtw_wdev_priv *wdev_priv = adapter_wdev_data(adapter);
+
+	return wdev_priv->is_mgmt_tx;
+}
+
+static int _cfg80211_rtw_mgmt_tx(_adapter *padapter, u8 tx_ch, u8 no_cck, const u8 *buf, size_t len, int wait_ack)
 {
 	struct xmit_frame	*pmgntframe;
 	struct pkt_attrib	*pattrib;
@@ -5099,11 +5514,14 @@ static int _cfg80211_rtw_mgmt_tx(_adapter *padapter, u8 tx_ch, const u8 *buf, si
 	rtw_mi_set_scan_deny(padapter, 1000);
 	rtw_mi_scan_abort(padapter, _TRUE);
 
+	rtw_cfg80211_set_is_mgmt_tx(padapter, 1);
+
+#ifdef CONFIG_BT_COEXIST
+	rtw_btcoex_ScanNotify(padapter, _TRUE);
+#endif
+
 #ifdef CONFIG_P2P
-	if (padapter->cfg80211_wdinfo.is_ro_ch == _TRUE) {
-		/* RTW_INFO("%s, cancel ro ch timer\n", __func__); */
-		/* _cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); */
-		/* padapter->cfg80211_wdinfo.is_ro_ch = _FALSE; */
+	if (rtw_cfg80211_get_is_roch(padapter) == _TRUE) {
 		#ifdef CONFIG_CONCURRENT_MODE
 		if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED)) {
 			RTW_INFO("%s, extend ro ch time\n", __func__);
@@ -5131,6 +5549,10 @@ static int _cfg80211_rtw_mgmt_tx(_adapter *padapter, u8 tx_ch, const u8 *buf, si
 			u16 ext_listen_period;
 
 			if (ATOMIC_READ(&pwdev_priv->switch_ch_to) == 1) {
+				#ifdef CONFIG_AP_MODE
+				/*mac-id sleep or wake-up for AP mode*/
+				rtw_mi_buddy_ap_acdata_control(padapter, 1);
+				#endif/*CONFIG_AP_MODE*/
 				rtw_mi_buddy_issue_nulldata(padapter, NULL, 1, 3, 500);
 				ATOMIC_SET(&pwdev_priv->switch_ch_to, 0);
 				/* RTW_INFO("%s, set switch ch timer, period=%d\n", __func__, pwdinfo->ext_listen_period); */
@@ -5174,6 +5596,13 @@ issue_mgmt_frame:
 	/* update attribute */
 	pattrib = &pmgntframe->attrib;
 	update_mgntframe_attrib(padapter, pattrib);
+
+	if (no_cck && IS_CCK_RATE(pattrib->rate)) {
+		/* force OFDM 6M rate*/
+		pattrib->rate = MGN_6M;
+		pattrib->raid = rtw_get_mgntframe_raid(padapter, WIRELESS_11G);
+	}
+
 	pattrib->retry_ctrl = _FALSE;
 
 	_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
@@ -5218,6 +5647,11 @@ issue_mgmt_frame:
 		ret = _SUCCESS;
 	}
 exit:
+	rtw_cfg80211_set_is_mgmt_tx(padapter, 0);
+
+#ifdef CONFIG_BT_COEXIST
+	rtw_btcoex_ScanNotify(padapter, _FALSE);
+#endif
 
 #ifdef CONFIG_DEBUG_CFG80211
 	RTW_INFO("%s, ret=%d\n", __func__, ret);
@@ -5259,9 +5693,6 @@ static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy,
 #endif
 	u64 *cookie)
 {
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
-	struct net_device *ndev = wdev_to_ndev(wdev);
-#endif
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(COMPAT_KERNEL_RELEASE)
 	struct ieee80211_channel *chan = params->chan;
 	bool offchan = params->offchan;
@@ -5271,6 +5702,9 @@ static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy,
 	bool no_cck = params->no_cck;
 	bool dont_wait_for_ack = params->dont_wait_for_ack;
 #endif
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 2, 0))
+	bool no_cck = 0;
+#endif
 	int ret = 0;
 	int tx_ret;
 	int wait_ack = 1;
@@ -5283,31 +5717,55 @@ static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy,
 	int type = (-1);
 	u32 start = rtw_get_current_time();
 	_adapter *padapter;
+	struct dvobj_priv *dvobj;
 	struct rtw_wdev_priv *pwdev_priv;
 
-	if ((ndev == NULL) || (chan == NULL)) {
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0))
+	#if defined(RTW_DEDICATED_P2P_DEVICE)
+	if (wdev == wiphy_to_pd_wdev(wiphy))
+		padapter = wiphy_to_adapter(wiphy);
+	else
+	#endif
+	if (wdev_to_ndev(wdev))
+		padapter = (_adapter *)rtw_netdev_priv(wdev_to_ndev(wdev));
+	else {
+		ret = -EINVAL;
+		goto exit;
+	}
+#else
+	struct wireless_dev *wdev;
+
+	if (ndev == NULL) {
+		ret = -EINVAL;
+		goto exit;
+	}
+	padapter = (_adapter *)rtw_netdev_priv(ndev);
+	wdev = ndev_to_wdev(ndev);
+#endif
+
+	if (chan == NULL) {
 		ret = -EINVAL;
 		goto exit;
 	}
 
 	tx_ch = (u8)ieee80211_frequency_to_channel(chan->center_freq);
 
-	padapter = (_adapter *)rtw_netdev_priv(ndev);
+	dvobj = adapter_to_dvobj(padapter);
 	pwdev_priv = adapter_wdev_data(padapter);
 
 	/* cookie generation */
 	*cookie = (unsigned long) buf;
 
 #ifdef CONFIG_DEBUG_CFG80211
-	RTW_INFO(FUNC_ADPT_FMT" len=%zu, ch=%d"
+	RTW_INFO(FUNC_ADPT_FMT"%s len=%zu, ch=%d"
 		#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 34)) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0))
 		", ch_type=%d"
 		#endif
 		#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0))
 		", channel_type_valid=%d"
 		#endif
-		"\n", FUNC_ADPT_ARG(padapter),
-		len, tx_ch
+		"\n", FUNC_ADPT_ARG(padapter), wdev == wiphy_to_pd_wdev(wiphy) ? " PD" : ""
+		, len, tx_ch
 		#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 34)) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0))
 		, channel_type
 		#endif
@@ -5319,7 +5777,7 @@ static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy,
 
 	/* indicate ack before issue frame to avoid racing with rsp frame */
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)
-	rtw_cfg80211_mgmt_tx_status(padapter, *cookie, buf, len, ack, GFP_KERNEL);
+	rtw_cfg80211_mgmt_tx_status(wdev, *cookie, buf, len, ack, GFP_KERNEL);
 #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 34) && LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 36))
 	cfg80211_action_tx_status(ndev, *cookie, buf, len, ack, GFP_KERNEL);
 #endif
@@ -5327,7 +5785,7 @@ static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy,
 	frame_styp = le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)buf)->frame_ctl) & IEEE80211_FCTL_STYPE;
 	if (IEEE80211_STYPE_PROBE_RESP == frame_styp) {
 #ifdef CONFIG_DEBUG_CFG80211
-		RTW_INFO("RTW_Tx: probe_resp tx_ch=%d, da="MAC_FMT"\n", tx_ch, MAC_ARG(GetAddr1Ptr(buf)));
+		RTW_INFO("RTW_Tx: probe_resp tx_ch=%d, no_cck=%u, da="MAC_FMT"\n", tx_ch, no_cck, MAC_ARG(GetAddr1Ptr(buf)));
 #endif /* CONFIG_DEBUG_CFG80211 */
 		wait_ack = 0;
 		goto dump;
@@ -5339,11 +5797,13 @@ static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy,
 		goto exit;
 	}
 
-	RTW_INFO("RTW_Tx:tx_ch=%d, da="MAC_FMT"\n", tx_ch, MAC_ARG(GetAddr1Ptr(buf)));
+	RTW_INFO("RTW_Tx:tx_ch=%d, no_cck=%u, da="MAC_FMT"\n", tx_ch, no_cck, MAC_ARG(GetAddr1Ptr(buf)));
 #ifdef CONFIG_P2P
 	type = rtw_p2p_check_frames(padapter, buf, len, _TRUE);
-	if (type >= 0)
+	if (type >= 0) {
+		no_cck = 1; /* force no CCK for P2P frames */
 		goto dump;
+	}
 #endif
 	if (category == RTW_WLAN_CATEGORY_PUBLIC)
 		RTW_INFO("RTW_Tx:%s\n", action_public_str(action));
@@ -5363,7 +5823,7 @@ dump:
 		u32 retry_guarantee_ms = 0;
 
 		dump_cnt++;
-		tx_ret = _cfg80211_rtw_mgmt_tx(padapter, tx_ch, buf, len, wait_ack);
+		tx_ret = _cfg80211_rtw_mgmt_tx(padapter, tx_ch, no_cck, buf, len, wait_ack);
 
 		switch (action) {
 		case ACT_PUBLIC_GAS_INITIAL_REQ:
@@ -5387,7 +5847,25 @@ dump:
 
 	switch (type) {
 	case P2P_GO_NEGO_CONF:
-		rtw_clear_scan_deny(padapter);
+		if (0) {
+			RTW_INFO(FUNC_ADPT_FMT" Nego confirm. state=%u, status=%u, iaddr="MAC_FMT"\n"
+				, FUNC_ADPT_ARG(padapter), pwdev_priv->nego_info.state, pwdev_priv->nego_info.status
+				, MAC_ARG(pwdev_priv->nego_info.iface_addr));
+		}
+		if (pwdev_priv->nego_info.state == 2
+			&& pwdev_priv->nego_info.status == 0
+			&& rtw_check_invalid_mac_address(pwdev_priv->nego_info.iface_addr, _FALSE) == _FALSE
+		) {
+			_adapter *intended_iface = dvobj_get_adapter_by_addr(dvobj, pwdev_priv->nego_info.iface_addr);
+
+			if (intended_iface) {
+				RTW_INFO(FUNC_ADPT_FMT" Nego confirm. Allow only "ADPT_FMT" to scan for 2000 ms\n"
+					, FUNC_ADPT_ARG(padapter), ADPT_ARG(intended_iface));
+				/* allow only intended_iface to do scan for 2000 ms */
+				rtw_mi_set_scan_deny(padapter, 2000);
+				rtw_clear_scan_deny(intended_iface);
+			}
+		}
 		break;
 	case P2P_INVIT_RESP:
 		if (pwdev_priv->invit_info.flags & BIT(0)
@@ -5395,9 +5873,9 @@ dump:
 		) {
 			RTW_INFO(FUNC_ADPT_FMT" agree with invitation of persistent group\n",
 				FUNC_ADPT_ARG(padapter));
-			/*rtw_set_scan_deny(padapter, 5000);
-			rtw_clear_scan_deny(padapter);*/
+			#if !RTW_P2P_GROUP_INTERFACE
 			rtw_mi_buddy_set_scan_deny(padapter, 5000);
+			#endif
 			rtw_pwr_wakeup_ex(padapter, 5000);
 		}
 		break;
@@ -6018,6 +6496,10 @@ int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len,
 				break;
 			case 0x2: /* PROBE_RESP */
 				ret = rtw_cfg80211_set_probe_resp_wpsp2pie(net, buf, len);
+				#ifdef CONFIG_P2P
+				if (ret == 0)
+					adapter_wdev_data((_adapter *)rtw_netdev_priv(net))->probe_resp_ie_update_time = rtw_get_current_time();
+				#endif
 				break;
 			case 0x4: /* ASSOC_RESP */
 				ret = rtw_cfg80211_set_assoc_resp_wpsp2pie(net, buf, len);
@@ -6030,7 +6512,7 @@ int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len,
 
 }
 
-static void rtw_cfg80211_init_ht_capab_ex(_adapter *padapter, struct ieee80211_sta_ht_cap *ht_cap, enum ieee80211_band band, u8 rf_type)
+static void rtw_cfg80211_init_ht_capab_ex(_adapter *padapter, struct ieee80211_sta_ht_cap *ht_cap, enum nl80211_band band, u8 rf_type)
 {
 	struct registry_priv *pregistrypriv = &padapter->registrypriv;
 	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
@@ -6050,9 +6532,9 @@ static void rtw_cfg80211_init_ht_capab_ex(_adapter *padapter, struct ieee80211_s
 	/* RX STBC */
 	if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_RX)) {
 		/*rtw_rx_stbc 0: disable, bit(0):enable 2.4g, bit(1):enable 5g*/
-		if (IEEE80211_BAND_2GHZ == band)
+		if (band == NL80211_BAND_2GHZ)
 			stbc_rx_enable = (pregistrypriv->rx_stbc & BIT(0)) ? _TRUE : _FALSE;
-		if (IEEE80211_BAND_5GHZ == band)
+		if (band == NL80211_BAND_5GHZ)
 			stbc_rx_enable = (pregistrypriv->rx_stbc & BIT(1)) ? _TRUE : _FALSE;
 
 		if (stbc_rx_enable) {
@@ -6078,11 +6560,10 @@ static void rtw_cfg80211_init_ht_capab_ex(_adapter *padapter, struct ieee80211_s
 	}
 }
 
-static void rtw_cfg80211_init_ht_capab(_adapter *padapter, struct ieee80211_sta_ht_cap *ht_cap, enum ieee80211_band band, u8 rf_type)
+static void rtw_cfg80211_init_ht_capab(_adapter *padapter, struct ieee80211_sta_ht_cap *ht_cap, enum nl80211_band band, u8 rf_type)
 {
-#define MAX_BIT_RATE_40MHZ_MCS23	450	/* Mbps */
-#define MAX_BIT_RATE_40MHZ_MCS15	300	/* Mbps */
-#define MAX_BIT_RATE_40MHZ_MCS7	150	/* Mbps */
+	struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
+	u8 rx_nss = 0;
 
 	ht_cap->ht_supported = _TRUE;
 
@@ -6102,36 +6583,36 @@ static void rtw_cfg80211_init_ht_capab(_adapter *padapter, struct ieee80211_sta_
 
 	ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
 
-	/*
-	 *hw->wiphy->bands[IEEE80211_BAND_2GHZ]
-	 *base on ant_num
-	 *rx_mask: RX mask
-	 *if rx_ant =1 rx_mask[0]=0xff;==>MCS0-MCS7
-	 *if rx_ant =2 rx_mask[1]=0xff;==>MCS8-MCS15
-	 *if rx_ant >=3 rx_mask[2]=0xff;
-	 *if BW_40 rx_mask[4]=0x01;
-	 *highest supported RX rate
-	 */
-	if (rf_type == RF_1T1R) {
+	rx_nss = rtw_min(rf_type_to_rf_rx_cnt(rf_type), hal_spec->rx_nss_num);
+	switch (rx_nss) {
+	case 1:
 		ht_cap->mcs.rx_mask[0] = 0xFF;
-
-		ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS7;
-	} else if ((rf_type == RF_1T2R) || (rf_type == RF_2T2R) || (rf_type == RF_2T2R_GREEN)) {
+		break;
+	case 2:
 		ht_cap->mcs.rx_mask[0] = 0xFF;
 		ht_cap->mcs.rx_mask[1] = 0xFF;
-
-		ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS15;
-	} else if ((rf_type == RF_2T3R) || (rf_type == RF_3T3R)) {
+		break;
+	case 3:
 		ht_cap->mcs.rx_mask[0] = 0xFF;
 		ht_cap->mcs.rx_mask[1] = 0xFF;
 		ht_cap->mcs.rx_mask[2] = 0xFF;
-
-		ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS23;
-	} else {
+		break;
+	case 4:
+		ht_cap->mcs.rx_mask[0] = 0xFF;
+		ht_cap->mcs.rx_mask[1] = 0xFF;
+		ht_cap->mcs.rx_mask[2] = 0xFF;
+		ht_cap->mcs.rx_mask[3] = 0xFF;
+		break;
+	default:
 		rtw_warn_on(1);
 		RTW_INFO("%s, error rf_type=%d\n", __func__, rf_type);
-	}
+	};
 
+	ht_cap->mcs.rx_highest = rtw_mcs_rate(rf_type
+		, hal_is_bw_support(padapter, CHANNEL_WIDTH_40)
+		, hal_is_bw_support(padapter, CHANNEL_WIDTH_40) ? ht_cap->cap & IEEE80211_HT_CAP_SGI_40 : ht_cap->cap & IEEE80211_HT_CAP_SGI_20
+		, ht_cap->mcs.rx_mask
+	);
 }
 void rtw_cfg80211_init_wdev_data(_adapter *padapter)
 {
@@ -6139,7 +6620,6 @@ void rtw_cfg80211_init_wdev_data(_adapter *padapter)
 	struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter);
 
 	ATOMIC_SET(&pwdev_priv->switch_ch_to, 1);
-	ATOMIC_SET(&pwdev_priv->ro_ch_to, 1);
 #endif
 }
 
@@ -6155,15 +6635,15 @@ void rtw_cfg80211_init_wiphy(_adapter *padapter)
 	RTW_INFO("%s:rf_type=%d\n", __func__, rf_type);
 
 	if (IsSupported24G(padapter->registrypriv.wireless_mode)) {
-		bands = wiphy->bands[IEEE80211_BAND_2GHZ];
+		bands = wiphy->bands[NL80211_BAND_2GHZ];
 		if (bands)
-			rtw_cfg80211_init_ht_capab(padapter, &bands->ht_cap, IEEE80211_BAND_2GHZ, rf_type);
+			rtw_cfg80211_init_ht_capab(padapter, &bands->ht_cap, NL80211_BAND_2GHZ, rf_type);
 	}
 #ifdef CONFIG_IEEE80211_BAND_5GHZ
 	if (is_supported_5g(padapter->registrypriv.wireless_mode)) {
-		bands = wiphy->bands[IEEE80211_BAND_5GHZ];
+		bands = wiphy->bands[NL80211_BAND_5GHZ];
 		if (bands)
-			rtw_cfg80211_init_ht_capab(padapter, &bands->ht_cap, IEEE80211_BAND_5GHZ, rf_type);
+			rtw_cfg80211_init_ht_capab(padapter, &bands->ht_cap, NL80211_BAND_5GHZ, rf_type);
 	}
 #endif
 	/* init regulary domain */
@@ -6191,14 +6671,24 @@ struct ieee80211_iface_limit rtw_limits[] = {
 			| BIT(NL80211_IFTYPE_P2P_GO)
 			#endif
 	},
-#endif
+	#endif
+	#if defined(RTW_DEDICATED_P2P_DEVICE)
+	{
+		.max = 1,
+		.types = BIT(NL80211_IFTYPE_P2P_DEVICE)
+	}
+	#endif
 };
 
 struct ieee80211_iface_combination rtw_combinations[] = {
 	{
 		.limits = rtw_limits,
 		.n_limits = ARRAY_SIZE(rtw_limits),
+		#if defined(RTW_DEDICATED_P2P_DEVICE)
+		.max_interfaces = 3,
+		#else
 		.max_interfaces = 2,
+		#endif
 		.num_different_channels = 1,
 	},
 };
@@ -6234,6 +6724,9 @@ static void rtw_cfg80211_preinit_wiphy(_adapter *adapter, struct wiphy *wiphy)
 #if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE))
 								| BIT(NL80211_IFTYPE_P2P_CLIENT)
 								| BIT(NL80211_IFTYPE_P2P_GO)
+								#if defined(RTW_DEDICATED_P2P_DEVICE)
+								| BIT(NL80211_IFTYPE_P2P_DEVICE)
+								#endif
 #endif
 								;
 
@@ -6258,11 +6751,11 @@ static void rtw_cfg80211_preinit_wiphy(_adapter *adapter, struct wiphy *wiphy)
 	wiphy->n_cipher_suites = ARRAY_SIZE(rtw_cipher_suites);
 
 	if (IsSupported24G(adapter->registrypriv.wireless_mode))
-		wiphy->bands[IEEE80211_BAND_2GHZ] = rtw_spt_band_alloc(IEEE80211_BAND_2GHZ);
+		wiphy->bands[NL80211_BAND_2GHZ] = rtw_spt_band_alloc(NL80211_BAND_2GHZ);
 
 #ifdef CONFIG_IEEE80211_BAND_5GHZ
 	if (is_supported_5g(adapter->registrypriv.wireless_mode))
-		wiphy->bands[IEEE80211_BAND_5GHZ] = rtw_spt_band_alloc(IEEE80211_BAND_5GHZ);
+		wiphy->bands[NL80211_BAND_5GHZ] = rtw_spt_band_alloc(NL80211_BAND_5GHZ);
 #endif
 
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38) && LINUX_VERSION_CODE < KERNEL_VERSION(3, 0, 0))
@@ -6369,7 +6862,11 @@ static struct cfg80211_ops rtw_cfg80211_ops = {
 #ifdef CONFIG_P2P
 	.remain_on_channel = cfg80211_rtw_remain_on_channel,
 	.cancel_remain_on_channel = cfg80211_rtw_cancel_remain_on_channel,
-#endif
+	#if defined(RTW_DEDICATED_P2P_DEVICE)
+	.start_p2p_device = cfg80211_rtw_start_p2p_device,
+	.stop_p2p_device = cfg80211_rtw_stop_p2p_device,
+	#endif
+#endif /* CONFIG_P2P */
 
 #ifdef CONFIG_RTW_80211R
 	.update_ft_ies = cfg80211_rtw_update_ft_ies,
@@ -6399,13 +6896,19 @@ struct wiphy *rtw_wiphy_alloc(_adapter *padapter, struct device *dev)
 	struct rtw_wiphy_data *wiphy_data;
 
 	/* wiphy */
-	wiphy = wiphy_new(&rtw_cfg80211_ops, sizeof(_adapter *));
+	wiphy = wiphy_new(&rtw_cfg80211_ops, sizeof(struct rtw_wiphy_data));
 	if (!wiphy) {
 		RTW_INFO("Couldn't allocate wiphy device\n");
 		goto exit;
 	}
 	set_wiphy_dev(wiphy, dev);
-	*((_adapter **)wiphy_priv(wiphy)) = padapter;
+
+	/* wiphy_data */
+	wiphy_data = rtw_wiphy_priv(wiphy);
+	wiphy_data->dvobj = adapter_to_dvobj(padapter);
+#ifndef RTW_SINGLE_WIPHY
+	wiphy_data->adapter = padapter;
+#endif
 
 	rtw_cfg80211_preinit_wiphy(padapter, wiphy);
 
@@ -6422,13 +6925,13 @@ void rtw_wiphy_free(struct wiphy *wiphy)
 
 	RTW_INFO(FUNC_WIPHY_FMT"\n", FUNC_WIPHY_ARG(wiphy));
 
-	if (wiphy->bands[IEEE80211_BAND_2GHZ]) {
-		rtw_spt_band_free(wiphy->bands[IEEE80211_BAND_2GHZ]);
-		wiphy->bands[IEEE80211_BAND_2GHZ] = NULL;
+	if (wiphy->bands[NL80211_BAND_2GHZ]) {
+		rtw_spt_band_free(wiphy->bands[NL80211_BAND_2GHZ]);
+		wiphy->bands[NL80211_BAND_2GHZ] = NULL;
 	}
-	if (wiphy->bands[IEEE80211_BAND_5GHZ]) {
-		rtw_spt_band_free(wiphy->bands[IEEE80211_BAND_5GHZ]);
-		wiphy->bands[IEEE80211_BAND_5GHZ] = NULL;
+	if (wiphy->bands[NL80211_BAND_5GHZ]) {
+		rtw_spt_band_free(wiphy->bands[NL80211_BAND_5GHZ]);
+		wiphy->bands[NL80211_BAND_5GHZ] = NULL;
 	}
 
 	wiphy_free(wiphy);
@@ -6453,6 +6956,10 @@ void rtw_wiphy_unregister(struct wiphy *wiphy)
 	rtw_cfgvendor_detach(wiphy);
 #endif
 
+	#if defined(RTW_DEDICATED_P2P_DEVICE)
+	rtw_pd_iface_free(wiphy);
+	#endif
+
 	return wiphy_unregister(wiphy);
 }
 
@@ -6490,8 +6997,11 @@ int rtw_wdev_alloc(_adapter *padapter, struct wiphy *wiphy)
 	pwdev_priv->padapter = padapter;
 	pwdev_priv->scan_request = NULL;
 	_rtw_spinlock_init(&pwdev_priv->scan_req_lock);
+	pwdev_priv->connect_req = NULL;
+	_rtw_spinlock_init(&pwdev_priv->connect_req_lock);
 
 	pwdev_priv->p2p_enabled = _FALSE;
+	pwdev_priv->probe_resp_ie_update_time = rtw_get_current_time();
 	pwdev_priv->provdisc_req_issued = _FALSE;
 	rtw_wdev_invit_info_init(&pwdev_priv->invit_info);
 	rtw_wdev_nego_info_init(&pwdev_priv->nego_info);
@@ -6503,9 +7013,10 @@ int rtw_wdev_alloc(_adapter *padapter, struct wiphy *wiphy)
 	else
 		pwdev_priv->power_mgmt = _FALSE;
 
+	_rtw_mutex_init(&pwdev_priv->roch_mutex);
+
 #ifdef CONFIG_CONCURRENT_MODE
 	ATOMIC_SET(&pwdev_priv->switch_ch_to, 1);
-	ATOMIC_SET(&pwdev_priv->ro_ch_to, 1);
 #endif
 
 exit:
@@ -6514,11 +7025,26 @@ exit:
 
 void rtw_wdev_free(struct wireless_dev *wdev)
 {
-	RTW_INFO("%s(wdev=%p)\n", __func__, wdev);
-
 	if (!wdev)
 		return;
 
+	RTW_INFO("%s(wdev=%p)\n", __func__, wdev);
+
+	if (wdev_to_ndev(wdev)) {
+		_adapter *adapter = (_adapter *)rtw_netdev_priv(wdev_to_ndev(wdev));
+		struct rtw_wdev_priv *wdev_priv = adapter_wdev_data(adapter);
+		_irqL irqL;
+
+		_rtw_spinlock_free(&wdev_priv->scan_req_lock);
+
+		_enter_critical_bh(&wdev_priv->connect_req_lock, &irqL);
+		rtw_wdev_free_connect_req(wdev_priv);
+		_exit_critical_bh(&wdev_priv->connect_req_lock, &irqL);
+		_rtw_spinlock_free(&wdev_priv->connect_req_lock);
+
+		_rtw_mutex_free(&wdev_priv->roch_mutex);
+	}
+
 	rtw_mfree((u8 *)wdev, sizeof(struct wireless_dev));
 }
 
@@ -6528,11 +7054,11 @@ void rtw_wdev_unregister(struct wireless_dev *wdev)
 	_adapter *adapter;
 	struct rtw_wdev_priv *pwdev_priv;
 
-	RTW_INFO("%s(wdev=%p)\n", __func__, wdev);
-
 	if (!wdev)
 		return;
 
+	RTW_INFO("%s(wdev=%p)\n", __func__, wdev);
+
 	ndev = wdev_to_ndev(wdev);
 	if (!ndev)
 		return;
@@ -6542,18 +7068,12 @@ void rtw_wdev_unregister(struct wireless_dev *wdev)
 
 	rtw_cfg80211_indicate_scan_done(adapter, _TRUE);
 
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0))
+	#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) || defined(COMPAT_KERNEL_RELEASE)
 	if (wdev->current_bss) {
-		u8 locally_generated = 1;
 		RTW_INFO(FUNC_ADPT_FMT" clear current_bss by cfg80211_disconnected\n", FUNC_ADPT_ARG(adapter));
-		cfg80211_disconnected(adapter->pnetdev, 0, NULL, 0, locally_generated, GFP_ATOMIC);
+		rtw_cfg80211_indicate_disconnect(adapter, 0, 1);
 	}
-#elif ((LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(4, 2, 0))) || defined(COMPAT_KERNEL_RELEASE)
-	if (wdev->current_bss) {
-		RTW_INFO(FUNC_ADPT_FMT" clear current_bss by cfg80211_disconnected\n", FUNC_ADPT_ARG(adapter));
-		cfg80211_disconnected(adapter->pnetdev, 0, NULL, 0, GFP_ATOMIC);
-	}
-#endif
+	#endif
 
 	if (pwdev_priv->pmon_ndev) {
 		RTW_INFO("%s, unregister monitor interface\n", __func__);
@@ -6593,6 +7113,7 @@ exit:
 void rtw_cfg80211_ndev_res_free(_adapter *adapter)
 {
 	rtw_wdev_free(adapter->rtw_wdev);
+	adapter->rtw_wdev = NULL;
 #if !defined(RTW_SINGLE_WIPHY)
 	rtw_wiphy_free(adapter_to_wiphy(adapter));
 	adapter->wiphy = NULL;
diff --git a/rtl8822BU/os_dep/linux/ioctl_cfg80211.h b/rtl8822BU/os_dep/linux/ioctl_cfg80211.h
index e810904..4ef82a7 100755..100644
--- a/rtl8822BU/os_dep/linux/ioctl_cfg80211.h
+++ b/rtl8822BU/os_dep/linux/ioctl_cfg80211.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,23 +11,61 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __IOCTL_CFG80211_H__
 #define __IOCTL_CFG80211_H__
 
 
+#ifndef RTW_CFG80211_ALWAYS_INFORM_STA_DISCONNECT_EVENT
+	#define RTW_CFG80211_ALWAYS_INFORM_STA_DISCONNECT_EVENT 0
+#endif
+
 #if defined(RTW_USE_CFG80211_STA_EVENT)
 	#undef CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER
 #endif
 
+#ifndef RTW_P2P_GROUP_INTERFACE
+	#define RTW_P2P_GROUP_INTERFACE 0
+#endif
+
+/*
+* (RTW_P2P_GROUP_INTERFACE, RTW_DEDICATED_P2P_DEVICE)
+* (0, 0): wlan0 + p2p0(PD+PG)
+* (1, 0): wlan0(with PD) + dynamic PGs
+* (1, 1): wlan0 (with dynamic PD wdev) + dynamic PGs
+*/
+
+#if RTW_P2P_GROUP_INTERFACE
+	#ifndef CONFIG_RTW_DYNAMIC_NDEV
+		#define CONFIG_RTW_DYNAMIC_NDEV
+	#endif
+	#ifndef RTW_SINGLE_WIPHY
+		#define RTW_SINGLE_WIPHY
+	#endif
+	#ifndef CONFIG_RADIO_WORK
+		#define CONFIG_RADIO_WORK
+	#endif
+	#ifndef RTW_DEDICATED_P2P_DEVICE
+		#define RTW_DEDICATED_P2P_DEVICE
+	#endif
+#endif
+
+#if !defined(CONFIG_P2P) && RTW_P2P_GROUP_INTERFACE
+	#error "RTW_P2P_GROUP_INTERFACE can't be enabled when CONFIG_P2P is disabled\n"
+#endif
+
+#if !RTW_P2P_GROUP_INTERFACE && defined(RTW_DEDICATED_P2P_DEVICE)
+	#error "RTW_DEDICATED_P2P_DEVICE can't be enabled when RTW_P2P_GROUP_INTERFACE is disabled\n"
+#endif
+
+#if defined(RTW_DEDICATED_P2P_DEVICE) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 7, 0))
+	#error "RTW_DEDICATED_P2P_DEVICE can't be enabled when kernel < 3.7.0\n"
+#endif
+
 struct rtw_wdev_invit_info {
 	u8 state; /* 0: req, 1:rep */
 	u8 peer_mac[ETH_ALEN];
+	u8 group_bssid[ETH_ALEN];
 	u8 active;
 	u8 token;
 	u8 flags;
@@ -40,6 +78,7 @@ struct rtw_wdev_invit_info {
 	do { \
 		(invit_info)->state = 0xff; \
 		_rtw_memset((invit_info)->peer_mac, 0, ETH_ALEN); \
+		_rtw_memset((invit_info)->group_bssid, 0, ETH_ALEN); \
 		(invit_info)->active = 0xff; \
 		(invit_info)->token = 0; \
 		(invit_info)->flags = 0x00; \
@@ -50,7 +89,9 @@ struct rtw_wdev_invit_info {
 
 struct rtw_wdev_nego_info {
 	u8 state; /* 0: req, 1:rep, 2:conf */
+	u8 iface_addr[ETH_ALEN];
 	u8 peer_mac[ETH_ALEN];
+	u8 peer_iface_addr[ETH_ALEN];
 	u8 active;
 	u8 token;
 	u8 status;
@@ -65,7 +106,9 @@ struct rtw_wdev_nego_info {
 #define rtw_wdev_nego_info_init(nego_info) \
 	do { \
 		(nego_info)->state = 0xff; \
+		_rtw_memset((nego_info)->iface_addr, 0, ETH_ALEN); \
 		_rtw_memset((nego_info)->peer_mac, 0, ETH_ALEN); \
+		_rtw_memset((nego_info)->peer_iface_addr, 0, ETH_ALEN); \
 		(nego_info)->active = 0xff; \
 		(nego_info)->token = 0; \
 		(nego_info)->status = 0xff; \
@@ -82,13 +125,21 @@ struct rtw_wdev_priv {
 
 	_adapter *padapter;
 
+	#if !RTW_CFG80211_ALWAYS_INFORM_STA_DISCONNECT_EVENT
+	u8 not_indic_disco;
+	#endif
+
 	struct cfg80211_scan_request *scan_request;
 	_lock scan_req_lock;
 
+	struct cfg80211_connect_params *connect_req;
+	_lock connect_req_lock;
+
 	struct net_device *pmon_ndev;/* for monitor interface */
 	char ifname_mon[IFNAMSIZ + 1]; /* interface name for monitor interface */
 
 	u8 p2p_enabled;
+	u32 probe_resp_ie_update_time;
 
 	u8 provdisc_req_issued;
 
@@ -103,19 +154,62 @@ struct rtw_wdev_priv {
 	/* report mgmt_frame registered */
 	u16 report_mgmt;
 
+	u8 is_mgmt_tx;
+
+	_mutex roch_mutex;
+
 #ifdef CONFIG_CONCURRENT_MODE
-	ATOMIC_T ro_ch_to;
 	ATOMIC_T switch_ch_to;
 #endif
 
 };
 
-#define wiphy_to_adapter(x) (*((_adapter **)wiphy_priv(x)))
+#if RTW_CFG80211_ALWAYS_INFORM_STA_DISCONNECT_EVENT
+#define rtw_wdev_not_indic_disco(rtw_wdev_data) 0
+#define rtw_wdev_set_not_indic_disco(rtw_wdev_data, val) do {} while (0)
+#else
+#define rtw_wdev_not_indic_disco(rtw_wdev_data) ((rtw_wdev_data)->not_indic_disco)
+#define rtw_wdev_set_not_indic_disco(rtw_wdev_data, val) do { (rtw_wdev_data)->not_indic_disco = (val); } while (0)
+#endif
+
+#define rtw_wdev_free_connect_req(rtw_wdev_data) \
+	do { \
+		if ((rtw_wdev_data)->connect_req) { \
+			rtw_mfree((u8 *)(rtw_wdev_data)->connect_req, sizeof(*(rtw_wdev_data)->connect_req)); \
+			(rtw_wdev_data)->connect_req = NULL; \
+		} \
+	} while (0)
 
 #define wdev_to_ndev(w) ((w)->netdev)
 #define wdev_to_wiphy(w) ((w)->wiphy)
 #define ndev_to_wdev(n) ((n)->ieee80211_ptr)
 
+struct rtw_wiphy_data {
+	struct dvobj_priv *dvobj;
+
+#ifndef RTW_SINGLE_WIPHY
+	_adapter *adapter;
+#endif
+
+#if defined(RTW_DEDICATED_P2P_DEVICE)
+	struct wireless_dev *pd_wdev; /* P2P device wdev */
+#endif
+};
+
+#define rtw_wiphy_priv(wiphy) ((struct rtw_wiphy_data *)wiphy_priv(wiphy))
+#define wiphy_to_dvobj(wiphy) (((struct rtw_wiphy_data *)wiphy_priv(wiphy))->dvobj)
+#ifdef RTW_SINGLE_WIPHY
+#define wiphy_to_adapter(wiphy) (dvobj_get_primary_adapter(wiphy_to_dvobj(wiphy)))
+#else
+#define wiphy_to_adapter(wiphy) (((struct rtw_wiphy_data *)wiphy_priv(wiphy))->adapter)
+#endif
+
+#if defined(RTW_DEDICATED_P2P_DEVICE)
+#define wiphy_to_pd_wdev(wiphy) (rtw_wiphy_priv(wiphy)->pd_wdev)
+#else
+#define wiphy_to_pd_wdev(wiphy) NULL
+#endif
+
 #define WIPHY_FMT "%s"
 #define WIPHY_ARG(wiphy) wiphy_name(wiphy)
 #define FUNC_WIPHY_FMT "%s("WIPHY_FMT")"
@@ -156,31 +250,54 @@ void rtw_cfg80211_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally
 void rtw_cfg80211_indicate_scan_done(_adapter *adapter, bool aborted);
 u32 rtw_cfg80211_wait_scan_req_empty(_adapter *adapter, u32 timeout_ms);
 
+#ifdef CONFIG_CONCURRENT_MODE
+u8 rtw_cfg80211_scan_via_buddy(_adapter *padapter, struct cfg80211_scan_request *request);
+void rtw_cfg80211_indicate_scan_done_for_buddy(_adapter *padapter, bool bscan_aborted);
+#endif
+
 #ifdef CONFIG_AP_MODE
 void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len);
 void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason);
 #endif /* CONFIG_AP_MODE */
 
+#ifdef CONFIG_P2P
+void rtw_cfg80211_set_is_roch(_adapter *adapter, bool val);
+bool rtw_cfg80211_get_is_roch(_adapter *adapter);
+
+int rtw_cfg80211_iface_has_p2p_group_cap(_adapter *adapter);
+int rtw_cfg80211_is_p2p_scan(_adapter *adapter);
+#if defined(RTW_DEDICATED_P2P_DEVICE)
+int rtw_cfg80211_redirect_pd_wdev(struct wiphy *wiphy, u8 *ra, struct wireless_dev **wdev);
+int rtw_cfg80211_is_scan_by_pd_wdev(_adapter *adapter);
+int rtw_pd_iface_alloc(struct wiphy *wiphy, const char *name, struct wireless_dev **pd_wdev);
+void rtw_pd_iface_free(struct wiphy *wiphy);
+#endif
+#endif /* CONFIG_P2P */
+
+void rtw_cfg80211_set_is_mgmt_tx(_adapter *adapter, u8 val);
+u8 rtw_cfg80211_get_is_mgmt_tx(_adapter *adapter);
+
 void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len);
-void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len);
-void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len);
-void rtw_cfg80211_rx_action(_adapter *adapter, u8 *frame, uint frame_len, const char *msg);
-void rtw_cfg80211_rx_probe_request(_adapter *padapter, u8 *pmgmt_frame, uint frame_len);
+
+void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, union recv_frame *rframe);
+void rtw_cfg80211_rx_action_p2p(_adapter *padapter, union recv_frame *rframe);
+void rtw_cfg80211_rx_action(_adapter *adapter, union recv_frame *rframe, const char *msg);
+void rtw_cfg80211_rx_probe_request(_adapter *padapter, union recv_frame *rframe);
 
 int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, int type);
 
 bool rtw_cfg80211_pwr_mgmt(_adapter *adapter);
 
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 4, 0))  && !defined(COMPAT_KERNEL_RELEASE)
-#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->pnetdev, freq, buf, len, gfp)
+#define rtw_cfg80211_rx_mgmt(wdev, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt(wdev_to_ndev(wdev), freq, buf, len, gfp)
 #elif (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0))
-#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->pnetdev, freq, sig_dbm, buf, len, gfp)
+#define rtw_cfg80211_rx_mgmt(wdev, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt(wdev_to_ndev(wdev), freq, sig_dbm, buf, len, gfp)
 #elif (LINUX_VERSION_CODE < KERNEL_VERSION(3, 12, 0))
-#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev, freq, sig_dbm, buf, len, gfp)
+#define rtw_cfg80211_rx_mgmt(wdev, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt(wdev, freq, sig_dbm, buf, len, gfp)
 #elif (LINUX_VERSION_CODE < KERNEL_VERSION(3 , 18 , 0))
-#define rtw_cfg80211_rx_mgmt(adapter , freq , sig_dbm , buf , len , gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev , freq , sig_dbm , buf , len , 0 , gfp)
+#define rtw_cfg80211_rx_mgmt(wdev , freq , sig_dbm , buf , len , gfp) cfg80211_rx_mgmt(wdev , freq , sig_dbm , buf , len , 0 , gfp)
 #else
-#define rtw_cfg80211_rx_mgmt(adapter , freq , sig_dbm , buf , len , gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev , freq , sig_dbm , buf , len , 0)
+#define rtw_cfg80211_rx_mgmt(wdev , freq , sig_dbm , buf , len , gfp) cfg80211_rx_mgmt(wdev , freq , sig_dbm , buf , len , 0)
 #endif
 
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 4, 0))  && !defined(COMPAT_KERNEL_RELEASE)
@@ -190,20 +307,28 @@ bool rtw_cfg80211_pwr_mgmt(_adapter *adapter);
 #endif
 
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0))
-#define rtw_cfg80211_mgmt_tx_status(adapter, cookie, buf, len, ack, gfp) cfg80211_mgmt_tx_status((adapter)->pnetdev, cookie, buf, len, ack, gfp)
+#define rtw_cfg80211_mgmt_tx_status(wdev, cookie, buf, len, ack, gfp) cfg80211_mgmt_tx_status(wdev_to_ndev(wdev), cookie, buf, len, ack, gfp)
 #else
-#define rtw_cfg80211_mgmt_tx_status(adapter, cookie, buf, len, ack, gfp) cfg80211_mgmt_tx_status((adapter)->rtw_wdev, cookie, buf, len, ack, gfp)
+#define rtw_cfg80211_mgmt_tx_status(wdev, cookie, buf, len, ack, gfp) cfg80211_mgmt_tx_status(wdev, cookie, buf, len, ack, gfp)
 #endif
 
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0))
-#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp)  cfg80211_ready_on_channel((adapter)->pnetdev, cookie, chan, channel_type, duration, gfp)
-#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->pnetdev, cookie, chan, chan_type, gfp)
+#define rtw_cfg80211_ready_on_channel(wdev, cookie, chan, channel_type, duration, gfp)  cfg80211_ready_on_channel(wdev_to_ndev(wdev), cookie, chan, channel_type, duration, gfp)
+#define rtw_cfg80211_remain_on_channel_expired(wdev, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired(wdev_to_ndev(wdev), cookie, chan, chan_type, gfp)
 #elif (LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0))
-#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp)  cfg80211_ready_on_channel((adapter)->rtw_wdev, cookie, chan, channel_type, duration, gfp)
-#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->rtw_wdev, cookie, chan, chan_type, gfp)
+#define rtw_cfg80211_ready_on_channel(wdev, cookie, chan, channel_type, duration, gfp)  cfg80211_ready_on_channel(wdev, cookie, chan, channel_type, duration, gfp)
+#define rtw_cfg80211_remain_on_channel_expired(wdev, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired(wdev, cookie, chan, chan_type, gfp)
 #else
-#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp)  cfg80211_ready_on_channel((adapter)->rtw_wdev, cookie, chan, duration, gfp)
-#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->rtw_wdev, cookie, chan, gfp)
+#define rtw_cfg80211_ready_on_channel(wdev, cookie, chan, channel_type, duration, gfp)  cfg80211_ready_on_channel(wdev, cookie, chan, duration, gfp)
+#define rtw_cfg80211_remain_on_channel_expired(wdev, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired(wdev, cookie, chan, gfp)
+#endif
+
+#define rtw_cfg80211_connect_result(wdev, bssid, req_ie, req_ie_len, resp_ie, resp_ie_len, status, gfp) cfg80211_connect_result(wdev_to_ndev(wdev), bssid, req_ie, req_ie_len, resp_ie, resp_ie_len, status, gfp)
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 2, 0))
+#define rtw_cfg80211_disconnected(wdev, reason, ie, ie_len, locally_generated, gfp) cfg80211_disconnected(wdev_to_ndev(wdev), reason, ie, ie_len, gfp)
+#else
+#define rtw_cfg80211_disconnected(wdev, reason, ie, ie_len, locally_generated, gfp) cfg80211_disconnected(wdev_to_ndev(wdev), reason, ie, ie_len, locally_generated, gfp)
 #endif
 
 #ifdef CONFIG_RTW_80211R
@@ -214,6 +339,10 @@ bool rtw_cfg80211_pwr_mgmt(_adapter *adapter);
 #endif
 #endif
 
+#if (KERNEL_VERSION(4, 7, 0) >= LINUX_VERSION_CODE)
+#define NUM_NL80211_BANDS IEEE80211_NUM_BANDS
+#endif
+
 #include "rtw_cfgvendor.h"
 
 #endif /* __IOCTL_CFG80211_H__ */
diff --git a/rtl8822BU/os_dep/linux/ioctl_linux.c b/rtl8822BU/os_dep/linux/ioctl_linux.c
index 62845ff..3609a77 100755..100644
--- a/rtl8822BU/os_dep/linux/ioctl_linux.c
+++ b/rtl8822BU/os_dep/linux/ioctl_linux.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,18 +11,16 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _IOCTL_LINUX_C_
 
 #include <drv_types.h>
 #include <rtw_mp.h>
 #include <rtw_mp_ioctl.h>
 #include "../../hal/phydm/phydm_precomp.h"
+#ifdef RTW_HALMAC
+#include "../../hal/hal_halmac.h"
+#endif
 
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 27))
 #define  iwe_stream_add_event(a, b, c, d, e)  iwe_stream_add_event(b, c, d, e)
@@ -1356,7 +1354,6 @@ static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param,
 						_rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8);
 
 						padapter->securitypriv.busetkipkey = _FALSE;
-						/* _set_timer(&padapter->securitypriv.tkip_timer, 50);						 */
 					}
 
 					/* DEBUG_ERR((" param->u.crypt.key_len=%d\n",param->u.crypt.key_len)); */
@@ -1737,7 +1734,7 @@ static int rtw_wx_set_freq(struct net_device *dev,
 
 	if (wrqu->freq.m <= 1000) {
 		if (wrqu->freq.flags == IW_FREQ_AUTO) {
-			if (rtw_ch_set_search_ch(padapter->mlmeextpriv.channel_set, wrqu->freq.m) > 0) {
+			if (rtw_chset_search_ch(adapter_to_chset(padapter), wrqu->freq.m) > 0) {
 				padapter->mlmeextpriv.cur_channel = wrqu->freq.m;
 				RTW_INFO("%s: channel is auto, set to channel %d\n", __func__, wrqu->freq.m);
 			} else {
@@ -1775,9 +1772,10 @@ static int rtw_wx_set_freq(struct net_device *dev,
 		padapter->mlmeextpriv.cur_channel = rtw_freq2ch(freq);
 		RTW_INFO("%s: set to channel %d\n", __func__, padapter->mlmeextpriv.cur_channel);
 	}
-
+	rtw_ps_deny(padapter, PS_DENY_IOCTL);
+	LeaveAllPowerSaveModeDirect(padapter); /* leave PS mode for guaranteeing to access hw register successfully */
 	set_channel_bwmode(padapter, padapter->mlmeextpriv.cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20);
-
+	rtw_ps_deny_cancel(padapter, PS_DENY_IOCTL);
 
 	return 0;
 }
@@ -2044,6 +2042,7 @@ static int rtw_wx_get_range(struct net_device *dev,
 {
 	struct iw_range *range = (struct iw_range *)extra;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
 
 	u16 val;
@@ -2145,12 +2144,12 @@ static int rtw_wx_get_range(struct net_device *dev,
 	 *	range->min_r_time;	 Minimal retry lifetime
 	 *	range->max_r_time;	 Maximal retry lifetime  */
 
-	for (i = 0, val = 0; i < MAX_CHANNEL_NUM; i++) {
+	for (i = 0, val = 0; i < rfctl->max_chan_nums; i++) {
 
 		/* Include only legal frequencies for some countries */
-		if (pmlmeext->channel_set[i].ChannelNum != 0) {
-			range->freq[val].i = pmlmeext->channel_set[i].ChannelNum;
-			range->freq[val].m = rtw_ch2freq(pmlmeext->channel_set[i].ChannelNum) * 100000;
+		if (rfctl->channel_set[i].ChannelNum != 0) {
+			range->freq[val].i = rfctl->channel_set[i].ChannelNum;
+			range->freq[val].m = rtw_ch2freq(rfctl->channel_set[i].ChannelNum) * 100000;
 			range->freq[val].e = 1;
 			val++;
 		}
@@ -2407,7 +2406,7 @@ static int rtw_wx_set_scan(struct net_device *dev, struct iw_request_info *a,
 #endif
 
 #ifdef CONFIG_MP_INCLUDED
-	if (rtw_mi_mp_mode_check(padapter)) {
+	if (rtw_mp_mode_check(padapter)) {
 		RTW_INFO("MP mode block Scan request\n");
 		ret = -EPERM;
 		goto exit;
@@ -2672,7 +2671,7 @@ static int rtw_wx_get_scan(struct net_device *dev, struct iw_request_info *a,
 		pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list);
 
 		/* report network only if the current channel set contains the channel to which this network belongs */
-		if (rtw_ch_set_search_ch(padapter->mlmeextpriv.channel_set, pnetwork->network.Configuration.DSConfig) >= 0
+		if (rtw_chset_search_ch(adapter_to_chset(padapter), pnetwork->network.Configuration.DSConfig) >= 0
 		    && rtw_mlme_band_check(padapter, pnetwork->network.Configuration.DSConfig) == _TRUE
 		    && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid))
 		   )
@@ -3447,7 +3446,7 @@ static int rtw_wx_set_auth(struct net_device *dev,
 		*/
 		if (check_fwstate(&padapter->mlmepriv, _FW_LINKED)) {
 			LeaveAllPowerSaveMode(padapter);
-			rtw_disassoc_cmd(padapter, 500, _FALSE);
+			rtw_disassoc_cmd(padapter, 500, RTW_CMDF_DIRECTLY);
 			RTW_INFO("%s...call rtw_indicate_disconnect\n ", __FUNCTION__);
 			rtw_indicate_disconnect(padapter, 0, _FALSE);
 			rtw_free_assoc_resources(padapter, 1);
@@ -5331,7 +5330,10 @@ static int rtw_p2p_connect(struct net_device *dev,
 			u8 union_offset = rtw_mi_get_union_offset(padapter);
 			/*	Have to enter the power saving with the AP */
 			set_channel_bwmode(padapter, union_ch, union_offset, union_bw);
-
+			#ifdef CONFIG_AP_MODE
+			/*mac-id sleep or wake-up for AP mode*/
+			rtw_mi_buddy_ap_acdata_control(padapter, 1);
+			#endif
 			rtw_mi_buddy_issue_nulldata(padapter, NULL, 1, 3, 500);
 		}
 #endif /* CONFIG_CONCURRENT_MODE */
@@ -5523,13 +5525,16 @@ static int rtw_p2p_invite_req(struct net_device *dev,
 			u8 union_offset = rtw_mi_get_union_offset(padapter);
 			/*	Have to enter the power saving with the AP */
 			set_channel_bwmode(padapter, union_ch, union_offset, union_bw);
-
+			#ifdef CONFIG_AP_MODE
+			/*mac-id sleep or wake-up for AP mode*/
+			rtw_mi_buddy_ap_acdata_control(padapter, 1);
+			#endif/*CONFIG_AP_MODE*/
 			rtw_mi_buddy_issue_nulldata(padapter, NULL, 1, 3, 500);
 		} else
 			set_channel_bwmode(padapter, uintPeerChannel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20);
 #else
 		set_channel_bwmode(padapter, uintPeerChannel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20);
-#endif
+#endif/*CONFIG_CONCURRENT_MODE*/
 
 		_set_timer(&pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT);
 
@@ -6086,7 +6091,10 @@ static int rtw_p2p_prov_disc(struct net_device *dev,
 
 			/*	Have to enter the power saving with the AP */
 			set_channel_bwmode(padapter, union_ch, union_offset, union_bw);
-
+			#ifdef CONFIG_AP_MODE
+			/*mac-id sleep or wake-up for AP mode*/
+			rtw_mi_buddy_ap_acdata_control(padapter, 1);
+			#endif/*CONFIG_AP_MODE*/
 			rtw_mi_buddy_issue_nulldata(padapter, NULL, 1, 3, 500);
 		} else
 			set_channel_bwmode(padapter, uintPeerChannel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, CHANNEL_WIDTH_20);
@@ -6392,6 +6400,7 @@ static int rtw_rereg_nd_name(struct net_device *dev,
 {
 	int ret = 0;
 	_adapter *padapter = rtw_netdev_priv(dev);
+	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
 	struct rereg_nd_name_data *rereg_priv = &padapter->rereg_nd_name_priv;
 	char new_ifname[IFNAMSIZ];
 
@@ -6419,7 +6428,9 @@ static int rtw_rereg_nd_name(struct net_device *dev,
 		return ret;
 
 	RTW_INFO("%s new_ifname:%s\n", __FUNCTION__, new_ifname);
+	rtw_set_rtnl_lock_holder(dvobj, current);
 	ret = rtw_change_ifname(padapter, new_ifname);
+	rtw_set_rtnl_lock_holder(dvobj, NULL);
 	if (0 != ret)
 		goto exit;
 
@@ -6460,6 +6471,11 @@ exit:
 #ifdef DBG_CMD_QUEUE
 u8 dump_cmd_id = 0;
 #endif
+/*
+#ifdef DBG_DUMP_TSF_BY_PORT
+extern void get_tsf_by_port(_adapter *adapter, u8 *tsftr, u8 hw_port);
+#endif
+*/
 static int rtw_dbg_port(struct net_device *dev,
 			struct iw_request_info *info,
 			union iwreq_data *wrqu, char *extra)
@@ -6784,6 +6800,12 @@ static int rtw_dbg_port(struct net_device *dev,
 				RTW_INFO("can't get sta's macaddr, cur_network's macaddr:" MAC_FMT "\n", MAC_ARG(cur_network->network.MacAddress));
 			break;
 		case 0x06: {
+				#ifdef DBG_DUMP_TSF_BY_PORT
+				u64 tsf = 0;
+
+				get_tsf_by_port(padapter, (u8 *)&tsf, extra_arg);
+				RTW_INFO(" PORT-%d TSF :%lld\n", extra_arg, tsf);
+				#endif
 		}
 			break;
 		case 0x07:
@@ -7141,12 +7163,8 @@ static int rtw_dbg_port(struct net_device *dev,
 			}
 			break;
 #endif
-
-#ifdef CONFIG_SUPPORT_FIFO_DUMP
 		case 0x20:
 			{
-				#include "../../hal/hal_halmac.h"
-
 				if (arg == 0xAA) {
 					u8 page_offset, page_num;
 					u32 page_size = 0;
@@ -7155,45 +7173,21 @@ static int rtw_dbg_port(struct net_device *dev,
 
 					page_offset = (u8)(extra_arg >> 16);
 					page_num = (u8)(extra_arg & 0xFF);
-					RTW_INFO("page_offset:%d, page_num:%d\n", page_offset, page_num);
-
-					rtw_hal_get_def_var(padapter, HAL_DEF_TX_PAGE_SIZE, &page_size);
-					if (page_size) {
-						buf_size = page_size * page_num;
-						buffer = rtw_zvmalloc(buf_size);
-						if (buffer) {
-							RTW_INFO("page_size:%d, buf_size:%d\n", page_size, buf_size);
-							rtw_hal_get_rsvd_page(padapter, page_offset, page_num, buffer, buf_size);
-							rtw_vmfree(buffer, buf_size);
-						} else {
-							RTW_ERR("rsvd_buf mem allocate failed\n");
-							rtw_warn_on(1);
-						}
-					} else
-						RTW_ERR("Tx page size is zero ??\n");
-				} else {
+					rtw_dump_rsvd_page(RTW_DBGDUMP, padapter, page_offset, page_num);
+				}
+#ifdef CONFIG_SUPPORT_FIFO_DUMP
+				else {
 					u8 fifo_sel;
 					u32 addr, size;
-					u8 *buffer = NULL;
 
 					fifo_sel = (u8)(arg & 0x0F);
 					addr = (extra_arg >> 16) & 0xFFFF;
 					size = extra_arg & 0xFFFF;
-
-					RTW_INFO("fifo_sel:%d, start_addr:0x%04x, size:%d\n", fifo_sel, addr, size);
-					if (size) {
-						size = RND4(size);
-						buffer = rtw_zvmalloc(size);
-						if (NULL == buffer)
-							size = 0;
-					}
-					rtw_halmac_dump_fifo(adapter_to_dvobj(padapter), fifo_sel, addr, size, buffer);
-					if (buffer)
-						rtw_vmfree(buffer, size);
+					rtw_dump_fifo(RTW_DBGDUMP, padapter, fifo_sel, addr, size);
 				}
+#endif
 			}
 			break;
-#endif
 
 		case 0x23: {
 			RTW_INFO("turn %s the bNotifyChannelChange Variable\n", (extra_arg == 1) ? "on" : "off");
@@ -8860,6 +8854,9 @@ static int rtw_pm_set(struct net_device *dev,
 	} else if (_rtw_memcmp(extra, "ips=", 4)) {
 		sscanf(extra + 4, "%u", &mode);
 		ret = rtw_pm_set_ips(padapter, mode);
+	} else if (_rtw_memcmp(extra, "lps_level=", 10)) {
+		if (sscanf(extra + 10, "%u", &mode) > 0)
+			ret = rtw_pm_set_lps_level(padapter, mode);
 	} else
 		ret = -EINVAL;
 
@@ -8867,34 +8864,54 @@ static int rtw_pm_set(struct net_device *dev,
 }
 #ifdef CONFIG_APPEND_VENDOR_IE_ENABLE
 
-int rtw_vendor_ie_get(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra)
+int rtw_vendor_ie_get_raw_data(struct net_device *dev, u32 vendor_ie_num,
+							   char *extra, u32 length)
 {
-	int ret = 0, vendor_ie_num = 0 , j , len = 0 , cmdlen;
-	char *pstring;
+	int j;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
-	struct iw_point *p;
-	u8 *ptmp;
 	u32 vendor_ie_mask = 0;
+	char *pstring;
 
-	p = &wrqu->data;
-	cmdlen = p->length;
-	if (0 == cmdlen)
-		return -EINVAL;
-
-	ptmp = (u8 *)rtw_malloc(cmdlen);
-	if (NULL == ptmp)
-		return -ENOMEM;
+	if (vendor_ie_num >= WLAN_MAX_VENDOR_IE_NUM) {
+		RTW_INFO("[%s] only support %d vendor ie\n", __func__ ,
+				 WLAN_MAX_VENDOR_IE_NUM);
+		return -EFAULT;
+	}
 
-	if (copy_from_user(ptmp, p->pointer, cmdlen)) {
-		ret = -EFAULT;
-		goto exit;
+	if (pmlmepriv->vendor_ielen[vendor_ie_num] == 0) {
+		RTW_INFO("[%s]  Fail, vendor_ie_num: %d is not set\n", __func__,
+				 vendor_ie_num);
+		return -EFAULT;
 	}
-	ret = sscanf(ptmp , "%d", &vendor_ie_num);
-	if (vendor_ie_num > WLAN_MAX_VENDOR_IE_NUM - 1) {
-		ret = -EFAULT;
-		goto exit;
+
+	if (length < 2 * pmlmepriv->vendor_ielen[vendor_ie_num] + 5) {
+		RTW_INFO("[%s]  Fail, buffer size is too small\n", __func__);
+		return -EFAULT;
 	}
+
+	vendor_ie_mask = pmlmepriv->vendor_ie_mask[vendor_ie_num];
+	_rtw_memset(extra, 0, length);
+
+	pstring = extra;
+	pstring += sprintf(pstring, "%d,%x,", vendor_ie_num, vendor_ie_mask);
+
+	for (j = 0; j < pmlmepriv->vendor_ielen[vendor_ie_num]; j++)
+		pstring += sprintf(pstring, "%02x", pmlmepriv->vendor_ie[vendor_ie_num][j]);
+
+	length = pstring - extra;
+	return length;
+}
+
+int rtw_vendor_ie_get_data(struct net_device *dev, int vendor_ie_num, char *extra)
+{
+	int j;
+	char *pstring;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
+	u32 vendor_ie_mask = 0;
+	__u16 length = 0;
+
 	vendor_ie_mask = pmlmepriv->vendor_ie_mask[vendor_ie_num];
 	pstring = extra;
 	pstring += sprintf(pstring , "\nVendor IE num %d , Mask:%x " , vendor_ie_num , vendor_ie_mask);
@@ -8914,7 +8931,37 @@ int rtw_vendor_ie_get(struct net_device *dev, struct iw_request_info *info, unio
 	for (j = 0 ; j < pmlmepriv->vendor_ielen[vendor_ie_num]  ; j++)
 		pstring += sprintf(pstring , "%02x" , pmlmepriv->vendor_ie[vendor_ie_num][j]);
 
-	wrqu->data.length = pstring - extra;
+	length = pstring - extra;
+	return length;
+
+}
+
+int rtw_vendor_ie_get(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra)
+{
+	int ret = 0, vendor_ie_num = 0, cmdlen;
+	struct iw_point *p;
+	u8 *ptmp;
+
+	p = &wrqu->data;
+	cmdlen = p->length;
+	if (0 == cmdlen)
+		return -EINVAL;
+
+	ptmp = (u8 *)rtw_malloc(cmdlen);
+	if (NULL == ptmp)
+		return -ENOMEM;
+
+	if (copy_from_user(ptmp, p->pointer, cmdlen)) {
+		ret = -EFAULT;
+		goto exit;
+	}
+	ret = sscanf(ptmp , "%d", &vendor_ie_num);
+	if (vendor_ie_num > WLAN_MAX_VENDOR_IE_NUM - 1) {
+		ret = -EFAULT;
+		goto exit;
+	}
+
+	wrqu->data.length = rtw_vendor_ie_get_data(dev, vendor_ie_num, extra);
 
 exit:
 	rtw_mfree(ptmp, cmdlen);
@@ -9030,6 +9077,7 @@ static int rtw_mp_efuse_get(struct net_device *dev,
 	u16 mask_len;
 	u8 mask_buf[64] = "";
 	int err;
+	char *pextra = NULL;
 #ifdef CONFIG_IOL
 	u8 org_fw_iol = padapter->registrypriv.fw_iol;/* 0:Disable, 1:enable, 2:by usb speed */
 #endif
@@ -9106,16 +9154,17 @@ static int rtw_mp_efuse_get(struct net_device *dev,
 
 		sprintf(extra, "\n");
 		for (i = 0; i < cnt; i += 16) {
-			sprintf(extra, "%s0x%02x\t", extra, shift + i);
+			pextra = extra + strlen(extra);
+			pextra += sprintf(pextra, "0x%02x\t", shift + i);
 			for (j = 0; j < 8; j++)
-				sprintf(extra, "%s%02X ", extra, efuse[i + j]);
-			sprintf(extra, "%s\t", extra);
+				pextra += sprintf(pextra, "%02X ", efuse[i + j]);
+			pextra += sprintf(pextra, "\t");
 			for (; j < 16; j++)
-				sprintf(extra, "%s%02X ", extra, efuse[i + j]);
-			sprintf(extra, "%s\n", extra);
+				pextra += sprintf(pextra, "%02X ", efuse[i + j]);
+			pextra += sprintf(pextra, "\n");
 		}
 		if ((shift + cnt) < mapLen)
-			sprintf(extra, "%s\t...more (left:%d/%d)\n", extra, mapLen-(shift + cnt), mapLen);
+			pextra += sprintf(pextra, "\t...more (left:%d/%d)\n", mapLen-(shift + cnt), mapLen);
 
 	} else if (strcmp(tmp[0], "realmap") == 0) {
 		static u8 order = 0;
@@ -9156,16 +9205,17 @@ static int rtw_mp_efuse_get(struct net_device *dev,
 
 		sprintf(extra, "\n");
 		for (i = 0; i < cnt; i += 16) {
-			sprintf(extra, "%s0x%02x\t", extra, shift + i);
+			pextra = extra + strlen(extra);
+			pextra += sprintf(pextra, "0x%02x\t", shift + i);
 			for (j = 0; j < 8; j++)
-				sprintf(extra, "%s%02X ", extra, efuse[i + j]);
-			sprintf(extra, "%s\t", extra);
+				pextra += sprintf(pextra, "%02X ", efuse[i + j]);
+			pextra += sprintf(pextra, "\t");
 			for (; j < 16; j++)
-				sprintf(extra, "%s%02X ", extra, efuse[i + j]);
-			sprintf(extra, "%s\n", extra);
+				pextra += sprintf(pextra, "%02X ", efuse[i + j]);
+			pextra += sprintf(pextra, "\n");
 		}
 		if ((shift + cnt) < mapLen)
-			sprintf(extra, "%s\t...more (left:%d/%d)\n", extra, mapLen-(shift + cnt), mapLen);
+			pextra += sprintf(pextra, "\t...more (left:%d/%d)\n", mapLen-(shift + cnt), mapLen);
 	} else if (strcmp(tmp[0], "rmap") == 0) {
 		if ((tmp[1] == NULL) || (tmp[2] == NULL)) {
 			RTW_INFO("%s: rmap Fail!! Parameters error!\n", __FUNCTION__);
@@ -9200,9 +9250,10 @@ static int rtw_mp_efuse_get(struct net_device *dev,
 
 		/*		RTW_INFO("%s: data={", __FUNCTION__); */
 		*extra = 0;
+		pextra = extra;
 		for (i = 0; i < cnts; i++) {
 			/*			RTW_INFO("0x%02x ", data[i]); */
-			sprintf(extra, "%s0x%02X ", extra, data[i]);
+			pextra += sprintf(pextra, "0x%02X ", data[i]);
 		}
 		/*		RTW_INFO("}\n"); */
 	} else if (strcmp(tmp[0], "realraw") == 0) {
@@ -9233,16 +9284,17 @@ static int rtw_mp_efuse_get(struct net_device *dev,
 
 		sprintf(extra, "\n");
 		for (i = 0; i < cnt; i += 16) {
-			sprintf(extra, "%s0x%02x\t", extra, shift + i);
+			pextra = extra + strlen(extra);
+			pextra += sprintf(pextra, "0x%02x\t", shift + i);
 			for (j = 0; j < 8; j++)
-				sprintf(extra, "%s%02X ", extra, rawdata[i + j]);
-			sprintf(extra, "%s\t", extra);
+				pextra += sprintf(pextra, "%02X ", rawdata[i + j]);
+			pextra += sprintf(pextra, "\t");
 			for (; j < 16; j++)
-				sprintf(extra, "%s%02X ", extra, rawdata[i + j]);
-			sprintf(extra, "%s\n", extra);
+				pextra += sprintf(pextra, "%02X ", rawdata[i + j]);
+			pextra += sprintf(pextra, "\n");
 		}
 		if ((shift + cnt) < mapLen)
-			sprintf(extra, "%s\t...more (left:%d/%d)\n", extra, mapLen-(shift + cnt), mapLen);
+			pextra += sprintf(pextra, "\t...more (left:%d/%d)\n", mapLen-(shift + cnt), mapLen);
 
 	} else if (strcmp(tmp[0], "btrealraw") == 0) {
 		static u8 bt_raw_order = 0;
@@ -9250,7 +9302,7 @@ static int rtw_mp_efuse_get(struct net_device *dev,
 		u32 blksz = 0x200; /* The size of one time show, default 512 */
 
 		addr = 0;
-		mapLen = EFUSE_BT_REAL_CONTENT_LEN;
+		EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&mapLen, _FALSE);
 		RTW_INFO("Real content len = %d\n", mapLen);
 #ifdef RTW_HALMAC
 		if (rtw_efuse_bt_access(padapter, _FALSE, 0, mapLen, rawdata) == _FAIL) {
@@ -9280,16 +9332,17 @@ static int rtw_mp_efuse_get(struct net_device *dev,
 
 		sprintf(extra, "\n");
 		for (i = 0; i < cnt; i += 16) {
-			sprintf(extra, "%s0x%02x\t", extra, shift + i);
+			pextra = extra + strlen(extra);
+			pextra += sprintf(pextra, "0x%02x\t", shift + i);
 			for (j = 0; j < 8; j++)
-				sprintf(extra, "%s%02X ", extra, rawdata[i + j]);
-			sprintf(extra, "%s\t", extra);
+				pextra += sprintf(pextra, "%02X ", rawdata[i + j]);
+			pextra += sprintf(pextra, "\t");
 			for (; j < 16; j++)
-				sprintf(extra, "%s%02X ", extra, rawdata[i + j]);
-			sprintf(extra, "%s\n", extra);
+				pextra += sprintf(pextra, "%02X ", rawdata[i + j]);
+			pextra += sprintf(pextra, "\n");
 		}
 		if ((shift + cnt) < mapLen)
-			sprintf(extra, "%s\t...more (left:%d/%d)\n", extra, mapLen-(shift + cnt), mapLen);
+			pextra += sprintf(pextra, "\t...more (left:%d/%d)\n", mapLen-(shift + cnt), mapLen);
 
 	} else if (strcmp(tmp[0], "mac") == 0) {
 		if (hal_efuse_macaddr_offset(padapter) == -1) {
@@ -9315,12 +9368,13 @@ static int rtw_mp_efuse_get(struct net_device *dev,
 
 		/*		RTW_INFO("%s: MAC address={", __FUNCTION__); */
 		*extra = 0;
+		pextra = extra;
 		for (i = 0; i < cnts; i++) {
 			/*			RTW_INFO("%02X", data[i]); */
-			sprintf(extra, "%s%02X", extra, data[i]);
+			pextra += sprintf(pextra, "%02X", data[i]);
 			if (i != (cnts - 1)) {
 				/*				RTW_INFO(":"); */
-				sprintf(extra, "%s:", extra);
+				pextra += sprintf(pextra, ":");
 			}
 		}
 		/*		RTW_INFO("}\n"); */
@@ -9378,12 +9432,13 @@ static int rtw_mp_efuse_get(struct net_device *dev,
 
 		/*		RTW_INFO("%s: {VID,PID}={", __FUNCTION__); */
 		*extra = 0;
+		pextra = extra;
 		for (i = 0; i < cnts; i++) {
 			/*			RTW_INFO("0x%02x", data[i]); */
-			sprintf(extra, "%s0x%02X", extra, data[i]);
+			pextra += sprintf(pextra, "0x%02X", data[i]);
 			if (i != (cnts - 1)) {
 				/*				RTW_INFO(","); */
-				sprintf(extra, "%s,", extra);
+				pextra += sprintf(pextra, ",");
 			}
 		}
 		/*		RTW_INFO("}\n"); */
@@ -9414,19 +9469,20 @@ static int rtw_mp_efuse_get(struct net_device *dev,
 		sprintf(extra, "\n");
 		for (i = 0; i < 512; i += 16) { /* set 512 because the iwpriv's extra size have limit 0x7FF */
 			/*			RTW_INFO("0x%03x\t", i); */
-			sprintf(extra, "%s0x%03x\t", extra, i);
+			pextra = extra + strlen(extra);
+			pextra += sprintf(pextra, "0x%03x\t", i);
 			for (j = 0; j < 8; j++) {
 				/*				RTW_INFO("%02X ", pEfuseHal->BTEfuseInitMap[i+j]); */
-				sprintf(extra, "%s%02X ", extra, pEfuseHal->BTEfuseInitMap[i + j]);
+				pextra += sprintf(pextra, "%02X ", pEfuseHal->BTEfuseInitMap[i+j]);
 			}
 			/*			RTW_INFO("\t"); */
-			sprintf(extra, "%s\t", extra);
+			pextra += sprintf(pextra, "\t");
 			for (; j < 16; j++) {
 				/*				RTW_INFO("%02X ", pEfuseHal->BTEfuseInitMap[i+j]); */
-				sprintf(extra, "%s%02X ", extra, pEfuseHal->BTEfuseInitMap[i + j]);
+				pextra += sprintf(pextra, "%02X ", pEfuseHal->BTEfuseInitMap[i+j]);
 			}
 			/*			RTW_INFO("\n"); */
-			sprintf(extra, "%s\n", extra);
+			pextra += sprintf(pextra, "\n");
 		}
 		/*		RTW_INFO("\n"); */
 	} else if (strcmp(tmp[0], "btbmap") == 0) {
@@ -9443,22 +9499,34 @@ static int rtw_mp_efuse_get(struct net_device *dev,
 		sprintf(extra, "\n");
 		for (i = 512; i < 1024 ; i += 16) {
 			/*			RTW_INFO("0x%03x\t", i); */
-			sprintf(extra, "%s0x%03x\t", extra, i);
+			pextra = extra + strlen(extra);
+			pextra += sprintf(pextra, "0x%03x\t", i);
 			for (j = 0; j < 8; j++) {
 				/*				RTW_INFO("%02X ", data[i+j]); */
-				sprintf(extra, "%s%02X ", extra, pEfuseHal->BTEfuseInitMap[i + j]);
+				pextra += sprintf(pextra, "%02X ", pEfuseHal->BTEfuseInitMap[i+j]);
 			}
 			/*			RTW_INFO("\t"); */
-			sprintf(extra, "%s\t", extra);
+			pextra += sprintf(pextra, "\t");
 			for (; j < 16; j++) {
 				/*				RTW_INFO("%02X ", data[i+j]); */
-				sprintf(extra, "%s%02X ", extra, pEfuseHal->BTEfuseInitMap[i + j]);
+				pextra += sprintf(pextra, "%02X ", pEfuseHal->BTEfuseInitMap[i+j]);
 			}
 			/*			RTW_INFO("\n"); */
-			sprintf(extra, "%s\n", extra);
+			pextra += sprintf(pextra, "\n");
 		}
 		/*		RTW_INFO("\n"); */
 	} else if (strcmp(tmp[0], "btrmap") == 0) {
+		u8 BTStatus;
+
+		rtw_write8(padapter, 0xa3, 0x05); /* For 8723AB ,8821S ? */
+		BTStatus = rtw_read8(padapter, 0xa0);
+
+		RTW_INFO("%s: Check 0xa0 BT Status =0x%x\n", __FUNCTION__, BTStatus);
+		if (BTStatus != 0x04) {
+			sprintf(extra, "BT Status not Active ,can't to read BT eFuse\n");
+			goto exit;
+		}
+
 		if ((tmp[1] == NULL) || (tmp[2] == NULL)) {
 			err = -EINVAL;
 			goto exit;
@@ -9492,10 +9560,11 @@ static int rtw_mp_efuse_get(struct net_device *dev,
 		}
 
 		*extra = 0;
+		pextra = extra;
 		/*		RTW_INFO("%s: bt efuse data={", __FUNCTION__); */
 		for (i = 0; i < cnts; i++) {
 			/*			RTW_INFO("0x%02x ", data[i]); */
-			sprintf(extra, "%s 0x%02X ", extra, data[i]);
+			pextra += sprintf(pextra, " 0x%02X ", data[i]);
 		}
 		/*		RTW_INFO("}\n"); */
 		RTW_INFO(FUNC_ADPT_FMT ": BT MAC=[%s]\n", FUNC_ADPT_ARG(padapter), extra);
@@ -9504,19 +9573,20 @@ static int rtw_mp_efuse_get(struct net_device *dev,
 		sprintf(extra, "\n");
 		for (i = 0; i < 512; i += 16) {
 			/*			RTW_INFO("0x%03x\t", i); */
-			sprintf(extra, "%s0x%03x\t", extra, i);
+			pextra = extra + strlen(extra);
+			pextra += sprintf(pextra, "0x%03x\t", i);
 			for (j = 0; j < 8; j++) {
 				/*				RTW_INFO("%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]); */
-				sprintf(extra, "%s%02X ", extra, pEfuseHal->fakeBTEfuseModifiedMap[i + j]);
+				pextra += sprintf(pextra, "%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]);
 			}
 			/*			RTW_INFO("\t"); */
-			sprintf(extra, "%s\t", extra);
+			pextra += sprintf(pextra, "\t");
 			for (; j < 16; j++) {
 				/*				RTW_INFO("%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]); */
-				sprintf(extra, "%s%02X ", extra, pEfuseHal->fakeBTEfuseModifiedMap[i + j]);
+				pextra += sprintf(pextra, "%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]);
 			}
 			/*			RTW_INFO("\n"); */
-			sprintf(extra, "%s\n", extra);
+			pextra += sprintf(pextra, "\n");
 		}
 		/*		RTW_INFO("\n"); */
 	} else if (strcmp(tmp[0], "btbfake") == 0) {
@@ -9524,19 +9594,20 @@ static int rtw_mp_efuse_get(struct net_device *dev,
 		sprintf(extra, "\n");
 		for (i = 512; i < 1024; i += 16) {
 			/*			RTW_INFO("0x%03x\t", i); */
-			sprintf(extra, "%s0x%03x\t", extra, i);
+			pextra = extra + strlen(extra);
+			pextra += sprintf(pextra, "0x%03x\t", i);
 			for (j = 0; j < 8; j++) {
 				/*				RTW_INFO("%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]); */
-				sprintf(extra, "%s%02X ", extra, pEfuseHal->fakeBTEfuseModifiedMap[i + j]);
+				pextra += sprintf(pextra, "%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]);
 			}
 			/*			RTW_INFO("\t"); */
-			sprintf(extra, "%s\t", extra);
+			pextra += sprintf(pextra, "\t");
 			for (; j < 16; j++) {
 				/*				RTW_INFO("%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]); */
-				sprintf(extra, "%s%02X ", extra, pEfuseHal->fakeBTEfuseModifiedMap[i + j]);
+				pextra += sprintf(pextra, "%02X ", pEfuseHal->fakeBTEfuseModifiedMap[i+j]);
 			}
 			/*			RTW_INFO("\n"); */
-			sprintf(extra, "%s\n", extra);
+			pextra += sprintf(pextra, "\n");
 		}
 		/*		RTW_INFO("\n"); */
 	} else if (strcmp(tmp[0], "wlrfkmap") == 0) {
@@ -9559,16 +9630,17 @@ static int rtw_mp_efuse_get(struct net_device *dev,
 
 		sprintf(extra, "\n");
 		for (i = 0; i < cnt; i += 16) {
-			sprintf(extra, "%s0x%02x\t", extra, shift + i);
+			pextra = extra + strlen(extra);
+			pextra += sprintf(pextra, "0x%02x\t", shift + i);
 			for (j = 0; j < 8; j++)
-				sprintf(extra, "%s%02X ", extra, efuse[i + j]);
-			sprintf(extra, "%s\t", extra);
+				pextra += sprintf(pextra, "%02X ", efuse[i + j]);
+			pextra += sprintf(pextra, "\t");
 			for (; j < 16; j++)
-				sprintf(extra, "%s%02X ", extra, efuse[i + j]);
-			sprintf(extra, "%s\n", extra);
+				pextra += sprintf(pextra, "%02X ", efuse[i + j]);
+			pextra += sprintf(pextra, "\n");
 		}
 		if ((shift + cnt) < mapLen)
-			sprintf(extra, "%s\t...more\n", extra);
+			pextra += sprintf(pextra, "\t...more\n");
 
 	} else if (strcmp(tmp[0], "wlrfkrmap") == 0) {
 		if ((tmp[1] == NULL) || (tmp[2] == NULL)) {
@@ -9590,9 +9662,10 @@ static int rtw_mp_efuse_get(struct net_device *dev,
 
 		/*		RTW_INFO("%s: data={", __FUNCTION__); */
 		*extra = 0;
+		pextra = extra;
 		for (i = 0; i < cnts; i++) {
 			RTW_INFO("wlrfkrmap = 0x%02x\n", pEfuseHal->fakeEfuseModifiedMap[addr + i]);
-			sprintf(extra, "%s0x%02X ", extra, pEfuseHal->fakeEfuseModifiedMap[addr + i]);
+			pextra += sprintf(pextra, "0x%02X ", pEfuseHal->fakeEfuseModifiedMap[addr+i]);
 		}
 	} else if (strcmp(tmp[0], "btrfkrmap") == 0) {
 		if ((tmp[1] == NULL) || (tmp[2] == NULL)) {
@@ -9614,9 +9687,10 @@ static int rtw_mp_efuse_get(struct net_device *dev,
 
 		/*		RTW_INFO("%s: data={", __FUNCTION__); */
 		*extra = 0;
+		pextra = extra;
 		for (i = 0; i < cnts; i++) {
 			RTW_INFO("wlrfkrmap = 0x%02x\n", pEfuseHal->fakeBTEfuseModifiedMap[addr + i]);
-			sprintf(extra, "%s0x%02X ", extra, pEfuseHal->fakeBTEfuseModifiedMap[addr + i]);
+			pextra += sprintf(pextra, "0x%02X ", pEfuseHal->fakeBTEfuseModifiedMap[addr+i]);
 		}
 	} else if (strcmp(tmp[0], "mask") == 0) {
 		*extra = 0;
@@ -9627,8 +9701,9 @@ static int rtw_mp_efuse_get(struct net_device *dev,
 			_rtw_memcpy(mask_buf, maskfileBuffer, mask_len);
 
 		sprintf(extra, "\n");
+		pextra = extra + strlen(extra);
 		for (i = 0; i < mask_len; i++)
-			sprintf(extra, "%s0x%02X\n", extra, mask_buf[i]);
+			pextra += sprintf(pextra, "0x%02X\n", mask_buf[i]);
 
 	} else
 		sprintf(extra, "Command not found!");
@@ -10337,8 +10412,12 @@ static int rtw_mp_efuse_set(struct net_device *dev,
 		}
 		_rtw_memset(extra, '\0', strlen(extra));
 		sprintf(extra, "eFuse Update OK\n");
-	}
+	} else if (strcmp(tmp[0], "analyze") == 0) {
 
+		rtw_efuse_analyze(padapter, EFUSE_WIFI, 0);
+		_rtw_memset(extra, '\0', strlen(extra));
+		sprintf(extra, "eFuse Analyze OK,please to check kernel log\n");
+	}
 exit:
 	if (setdata)
 		rtw_mfree(setdata, 1024);
@@ -10364,6 +10443,8 @@ exit:
 	return err;
 }
 
+#ifdef CONFIG_MP_INCLUDED
+
 #ifdef CONFIG_RTW_CUSTOMER_STR
 static int rtw_mp_customer_str(
 	struct net_device *dev,
@@ -10382,7 +10463,8 @@ static int rtw_mp_customer_str(
 	u8 ret;
 	u8 read = 0;
 
-	if (adapter->registrypriv.mp_mode != 1)
+	if (adapter->registrypriv.mp_mode != 1
+		|| !adapter->registrypriv.mp_customer_str)
 		return -EFAULT;
 
 	len = wrqu->data.length;
@@ -10462,7 +10544,6 @@ free_buf:
 }
 #endif /* CONFIG_RTW_CUSTOMER_STR */
 
-#ifdef CONFIG_MP_INCLUDED
 static int rtw_priv_mp_set(struct net_device *dev,
 			   struct iw_request_info *info,
 			   union iwreq_data *wdata, char *extra)
@@ -10470,6 +10551,12 @@ static int rtw_priv_mp_set(struct net_device *dev,
 
 	struct iw_point *wrqu = (struct iw_point *)wdata;
 	u32 subcmd = wrqu->flags;
+	PADAPTER padapter = rtw_netdev_priv(dev);
+
+	if (!is_primary_adapter(padapter)) {
+		RTW_INFO("MP mode only primary Adapter support\n");
+		return -EIO;
+	}
 
 	switch (subcmd) {
 	case CTA_TEST:
@@ -10503,6 +10590,12 @@ static int rtw_priv_mp_get(struct net_device *dev,
 
 	struct iw_point *wrqu = (struct iw_point *)wdata;
 	u32 subcmd = wrqu->flags;
+	PADAPTER padapter = rtw_netdev_priv(dev);
+
+	if (!is_primary_adapter(padapter)) {
+		RTW_INFO("MP mode only primary Adapter support\n");
+		return -EIO;
+	}
 
 	switch (subcmd) {
 	case MP_START:
@@ -10644,6 +10737,14 @@ static int rtw_priv_mp_get(struct net_device *dev,
 		rtw_mp_customer_str(dev, info, wdata, extra);
 		break;
 #endif
+	case MP_PWRLMT:
+		RTW_INFO("mp_get MP_SETPWRLMT\n");
+		rtw_mp_pwrlmt(dev, info, wdata, extra);
+		break;
+	case MP_PWRBYRATE:
+		RTW_INFO("mp_get MP_SETPWRBYRATE\n");
+		rtw_mp_pwrbyrate(dev, info, wdata, extra);
+		break;
 	default:
 		return -EIO;
 	}
@@ -11623,49 +11724,50 @@ static int rtw_tdls_get_best_ch(struct net_device *dev,
 {
 #ifdef CONFIG_FIND_BEST_CHANNEL
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 	u32 i, best_channel_24G = 1, best_channel_5G = 36, index_24G = 0, index_5G = 0;
 
-	for (i = 0; pmlmeext->channel_set[i].ChannelNum != 0; i++) {
-		if (pmlmeext->channel_set[i].ChannelNum == 1)
+	for (i = 0; i < rfctl->max_chan_nums && rfctl->channel_set[i].ChannelNum != 0; i++) {
+		if (rfctl->channel_set[i].ChannelNum == 1)
 			index_24G = i;
-		if (pmlmeext->channel_set[i].ChannelNum == 36)
+		if (rfctl->channel_set[i].ChannelNum == 36)
 			index_5G = i;
 	}
 
-	for (i = 0; pmlmeext->channel_set[i].ChannelNum != 0; i++) {
+	for (i = 0; i < rfctl->max_chan_nums && rfctl->channel_set[i].ChannelNum != 0; i++) {
 		/* 2.4G */
-		if (pmlmeext->channel_set[i].ChannelNum == 6 || pmlmeext->channel_set[i].ChannelNum == 11) {
-			if (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_24G].rx_count) {
+		if (rfctl->channel_set[i].ChannelNum == 6 || rfctl->channel_set[i].ChannelNum == 11) {
+			if (rfctl->channel_set[i].rx_count < rfctl->channel_set[index_24G].rx_count) {
 				index_24G = i;
-				best_channel_24G = pmlmeext->channel_set[i].ChannelNum;
+				best_channel_24G = rfctl->channel_set[i].ChannelNum;
 			}
 		}
 
 		/* 5G */
-		if (pmlmeext->channel_set[i].ChannelNum >= 36
-		    && pmlmeext->channel_set[i].ChannelNum < 140) {
+		if (rfctl->channel_set[i].ChannelNum >= 36
+		    && rfctl->channel_set[i].ChannelNum < 140) {
 			/* Find primary channel */
-			if (((pmlmeext->channel_set[i].ChannelNum - 36) % 8 == 0)
-			    && (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_5G].rx_count)) {
+			if (((rfctl->channel_set[i].ChannelNum - 36) % 8 == 0)
+			    && (rfctl->channel_set[i].rx_count < rfctl->channel_set[index_5G].rx_count)) {
 				index_5G = i;
-				best_channel_5G = pmlmeext->channel_set[i].ChannelNum;
+				best_channel_5G = rfctl->channel_set[i].ChannelNum;
 			}
 		}
 
-		if (pmlmeext->channel_set[i].ChannelNum >= 149
-		    && pmlmeext->channel_set[i].ChannelNum < 165) {
+		if (rfctl->channel_set[i].ChannelNum >= 149
+		    && rfctl->channel_set[i].ChannelNum < 165) {
 			/* Find primary channel */
-			if (((pmlmeext->channel_set[i].ChannelNum - 149) % 8 == 0)
-			    && (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_5G].rx_count)) {
+			if (((rfctl->channel_set[i].ChannelNum - 149) % 8 == 0)
+			    && (rfctl->channel_set[i].rx_count < rfctl->channel_set[index_5G].rx_count)) {
 				index_5G = i;
-				best_channel_5G = pmlmeext->channel_set[i].ChannelNum;
+				best_channel_5G = rfctl->channel_set[i].ChannelNum;
 			}
 		}
 #if 1 /* debug */
 		RTW_INFO("The rx cnt of channel %3d = %d\n",
-			 pmlmeext->channel_set[i].ChannelNum,
-			 pmlmeext->channel_set[i].rx_count);
+			 rfctl->channel_set[i].ChannelNum,
+			 rfctl->channel_set[i].rx_count);
 #endif
 	}
 
@@ -12316,8 +12418,7 @@ thread_return lbk_thread(thread_context context)
 		freeloopbackpkt(padapter, pxmitframe);
 		pxmitframe = NULL;
 
-		if (signal_pending(current))
-			flush_signals(current);
+		flush_signals_thread();
 
 		if ((ploopback->bstop == _TRUE) ||
 		    ((ploopback->cnt != 0) && (ploopback->cnt == cnt))) {
@@ -12334,7 +12435,8 @@ thread_return lbk_thread(thread_context context)
 
 	ploopback->bstop = _TRUE;
 
-	thread_exit();
+	thread_exit(NULL);
+	return 0;
 }
 
 static void loopbackTest(PADAPTER padapter, u32 cnt, u32 size, u8 *pmsg)
@@ -12395,6 +12497,7 @@ static void loopbackTest(PADAPTER padapter, u32 cnt, u32 size, u8 *pmsg)
 	ploopback->lbkthread = kthread_run(lbk_thread, padapter, "RTW_LBK_THREAD");
 	if (IS_ERR(padapter->lbkthread)) {
 		freeLoopback(padapter);
+		ploopback->lbkthread = NULL;
 		sprintf(pmsg, "loopback start FAIL! cnt=%d", cnt);
 		return;
 	}
@@ -12766,6 +12869,8 @@ static const struct iw_priv_args rtw_mp_private_args[] = {
 	{ MP_TX, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_tx" },
 	{ MP_RX, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_rx" },
 	{ MP_HW_TX_MODE, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_hxtx" },
+	{ MP_PWRLMT, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_pwrlmt" },
+	{ MP_PWRBYRATE, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_pwrbyrate" },
 	{ CTA_TEST, IW_PRIV_TYPE_CHAR | 1024, 0, "cta_test"},
 	{ MP_IQK, IW_PRIV_TYPE_CHAR | 1024, 0, "mp_iqk"},
 	{ MP_LCK, IW_PRIV_TYPE_CHAR | 1024, 0, "mp_lck"},
@@ -13330,7 +13435,11 @@ static int rtw_ioctl_standard_wext_private(struct net_device *dev, struct ifreq
 static int rtw_ioctl_wext_private(struct net_device *dev, struct ifreq *rq)
 {
 #ifdef CONFIG_COMPAT
+#if (KERNEL_VERSION(4, 6, 0) > LINUX_VERSION_CODE)
 	if (is_compat_task())
+#else
+	if (in_compat_syscall())
+#endif
 		return rtw_ioctl_compat_wext_private(dev, rq);
 	else
 #endif /* CONFIG_COMPAT */
diff --git a/rtl8822BU/os_dep/linux/ioctl_mp.c b/rtl8822BU/os_dep/linux/ioctl_mp.c
index fceee7e..f2a9418 100755..100644
--- a/rtl8822BU/os_dep/linux/ioctl_mp.c
+++ b/rtl8822BU/os_dep/linux/ioctl_mp.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #if defined(CONFIG_MP_INCLUDED)
 
 #include <drv_types.h>
@@ -130,7 +125,7 @@ int rtw_mp_read_reg(struct net_device *dev,
 		    struct iw_request_info *info,
 		    struct iw_point *wrqu, char *extra)
 {
-	char input[wrqu->length];
+	char input[wrqu->length + 1];
 	char *pch, *pnext, *ptmp;
 	char *width_str;
 	char width;
@@ -138,14 +133,16 @@ int rtw_mp_read_reg(struct net_device *dev,
 	u32 addr = 0, strtout = 0;
 	u32 i = 0, j = 0, ret = 0, data32 = 0;
 	PADAPTER padapter = rtw_netdev_priv(dev);
-
+	char *pextra = extra;
 
 	if (wrqu->length > 128)
 		return -EFAULT;
 
+	_rtw_memset(input, 0, sizeof(input));
 	if (copy_from_user(input, wrqu->pointer, wrqu->length))
 		return -EFAULT;
 
+	input[wrqu->length] = '\0';
 	_rtw_memset(extra, 0, wrqu->length);
 	_rtw_memset(data, '\0', sizeof(data));
 	_rtw_memset(tmp, '\0', sizeof(tmp));
@@ -198,7 +195,7 @@ int rtw_mp_read_reg(struct net_device *dev,
 			if (*pnext != '\0') {
 				/*strtout = simple_strtoul(pnext , &ptmp, 16);*/
 				ret = sscanf(pnext, "%x", &strtout);
-				sprintf(extra, "%s %d" , extra , strtout);
+				pextra += sprintf(pextra, " %d", strtout);
 			} else
 				break;
 			pch = pnext;
@@ -230,7 +227,7 @@ int rtw_mp_read_reg(struct net_device *dev,
 			pnext++;
 			if (*pnext != '\0') {
 				ret = sscanf(pnext, "%x", &strtout);
-				sprintf(extra, "%s %d" , extra , strtout);
+				pextra += sprintf(pextra, " %d", strtout);
 			} else
 				break;
 			pch = pnext;
@@ -310,6 +307,7 @@ int rtw_mp_read_rf(struct net_device *dev,
 	u32 path, addr, strtou;
 	u32 ret, i = 0 , j = 0;
 	PADAPTER padapter = rtw_netdev_priv(dev);
+	char *pextra = extra;
 
 	if (wrqu->length > 128)
 		return -EFAULT;
@@ -349,7 +347,7 @@ int rtw_mp_read_rf(struct net_device *dev,
 		if (*pnext != '\0') {
 			/*strtou =simple_strtoul(pnext , &ptmp, 16);*/
 			ret = sscanf(pnext, "%x", &strtou);
-			sprintf(extra, "%s %d" , extra , strtou);
+			pextra += sprintf(pextra, " %d", strtou);
 		} else
 			break;
 		pch = pnext;
@@ -412,13 +410,15 @@ int rtw_mp_rate(struct net_device *dev,
 		struct iw_point *wrqu, char *extra)
 {
 	u32 rate = MPT_RATE_1M;
-	u8		input[wrqu->length];
+	u8		input[wrqu->length + 1];
 	PADAPTER padapter = rtw_netdev_priv(dev);
 	PMPT_CONTEXT		pMptCtx = &(padapter->mppriv.mpt_ctx);
 
+	_rtw_memset(input, 0, sizeof(input));
 	if (copy_from_user(input, wrqu->pointer, wrqu->length))
 		return -EFAULT;
 
+	input[wrqu->length] = '\0';
 	rate = rtw_mpRateParseFunc(padapter, input);
 	padapter->mppriv.rateidx = rate;
 
@@ -460,13 +460,15 @@ int rtw_mp_channel(struct net_device *dev,
 
 	PADAPTER padapter = rtw_netdev_priv(dev);
 	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(padapter);
-	u8		input[wrqu->length];
+	u8		input[wrqu->length + 1];
 	u32	channel = 1;
 	int cur_ch_offset;
 
+	_rtw_memset(input, 0, sizeof(input));
 	if (copy_from_user(input, wrqu->pointer, wrqu->length))
 		return -EFAULT;
 
+	input[wrqu->length] = '\0';
 	channel = rtw_atoi(input);
 	/*RTW_INFO("%s: channel=%d\n", __func__, channel);*/
 	_rtw_memset(extra, 0, wrqu->length);
@@ -584,14 +586,16 @@ int rtw_mp_ant_tx(struct net_device *dev,
 		  struct iw_point *wrqu, char *extra)
 {
 	u8 i;
-	u8		input[wrqu->length];
+	u8		input[wrqu->length + 1];
 	u16 antenna = 0;
 	PADAPTER padapter = rtw_netdev_priv(dev);
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
 
+	_rtw_memset(input, 0, sizeof(input));
 	if (copy_from_user(input, wrqu->pointer, wrqu->length))
 		return -EFAULT;
 
+	input[wrqu->length] = '\0';
 	sprintf(extra, "switch Tx antenna to %s", input);
 
 	for (i = 0; i < strlen(input); i++) {
@@ -630,12 +634,15 @@ int rtw_mp_ant_rx(struct net_device *dev,
 {
 	u8 i;
 	u16 antenna = 0;
-	u8		input[wrqu->length];
+	u8		input[wrqu->length + 1];
 	PADAPTER padapter = rtw_netdev_priv(dev);
 	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
 
+	_rtw_memset(input, 0, sizeof(input));
 	if (copy_from_user(input, wrqu->pointer, wrqu->length))
 		return -EFAULT;
+
+	input[wrqu->length] = '\0';
 	/*RTW_INFO("%s: input=%s\n", __func__, input);*/
 	_rtw_memset(extra, 0, wrqu->length);
 
@@ -716,6 +723,7 @@ int rtw_mp_ctx(struct net_device *dev,
 	if (copy_from_user(extra, wrqu->pointer, wrqu->length))
 		return -EFAULT;
 
+	*(extra + wrqu->length) = '\0';
 	RTW_INFO("%s: in=%s\n", __func__, extra);
 #ifdef CONFIG_CONCURRENT_MODE
 	if (!is_primary_adapter(padapter)) {
@@ -1057,11 +1065,13 @@ int rtw_mp_psd(struct net_device *dev,
 	       struct iw_point *wrqu, char *extra)
 {
 	PADAPTER padapter = rtw_netdev_priv(dev);
-	u8		input[wrqu->length];
+	u8		input[wrqu->length + 1];
 
+	_rtw_memset(input, 0, sizeof(input));
 	if (copy_from_user(input, wrqu->pointer, wrqu->length))
 		return -EFAULT;
 
+	input[wrqu->length] = '\0';
 	strcpy(extra, input);
 
 	wrqu->length = mp_query_psd(padapter, extra);
@@ -1364,6 +1374,7 @@ int rtw_mp_mon(struct net_device *dev,
 	if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length))
 		return -EFAULT;
 
+	*(extra + wrqu->data.length) = '\0';
 	rtw_pm_set_ips(padapter, IPS_NONE);
 	LeaveAllPowerSaveMode(padapter);
 
@@ -1389,9 +1400,9 @@ int rtw_mp_mon(struct net_device *dev,
 		pHalFunc->hal_deinit(padapter);
 		padapter->registrypriv.mp_mode = 0;
 		pHalFunc->hal_init(padapter);
-		/*rtw_disassoc_cmd(padapter, 0, _TRUE);*/
+		/*rtw_disassoc_cmd(padapter, 0, 0);*/
 		if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) {
-			rtw_disassoc_cmd(padapter, 500, _TRUE);
+			rtw_disassoc_cmd(padapter, 500, 0);
 			rtw_indicate_disconnect(padapter, 0, _FALSE);
 			/*rtw_free_assoc_resources(padapter, 1);*/
 		}
@@ -1408,6 +1419,7 @@ int rtw_mp_pretx_proc(PADAPTER padapter, u8 bStartTest, char *extra)
 	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(padapter);
 	struct mp_priv *pmp_priv = &padapter->mppriv;
 	PMPT_CONTEXT		pMptCtx = &(padapter->mppriv.mpt_ctx);
+	char *pextra = extra;
 
 	switch (pmp_priv->mode) {
 
@@ -1417,7 +1429,8 @@ int rtw_mp_pretx_proc(PADAPTER padapter, u8 bStartTest, char *extra)
 			pmp_priv->mode = MP_ON;
 			sprintf(extra, "Stop continuous Tx");
 		} else if (pmp_priv->tx.stop == 1) {
-			sprintf(extra, "%s\nStart continuous DA=ffffffffffff len=1500 count=%u\n", extra, pmp_priv->tx.count);
+			pextra = extra + strlen(extra);
+			pextra += sprintf(pextra, "\nStart continuous DA=ffffffffffff len=1500 count=%u\n", pmp_priv->tx.count);
 			pmp_priv->tx.stop = 0;
 			SetPacketTx(padapter);
 		} else
@@ -1425,26 +1438,26 @@ int rtw_mp_pretx_proc(PADAPTER padapter, u8 bStartTest, char *extra)
 		return 0;
 	case MP_SINGLE_TONE_TX:
 		if (bStartTest != 0)
-			sprintf(extra, "%s\nStart continuous DA=ffffffffffff len=1500\n infinite=yes.", extra);
+			strcat(extra, "\nStart continuous DA=ffffffffffff len=1500\n infinite=yes.");
 		SetSingleToneTx(padapter, (u8)bStartTest);
 		break;
 	case MP_CONTINUOUS_TX:
 		if (bStartTest != 0)
-			sprintf(extra, "%s\nStart continuous DA=ffffffffffff len=1500\n infinite=yes.", extra);
+			strcat(extra, "\nStart continuous DA=ffffffffffff len=1500\n infinite=yes.");
 		SetContinuousTx(padapter, (u8)bStartTest);
 		break;
 	case MP_CARRIER_SUPPRISSION_TX:
 		if (bStartTest != 0) {
 			if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_11M)
-				sprintf(extra, "%s\nStart continuous DA=ffffffffffff len=1500\n infinite=yes.", extra);
+				strcat(extra, "\nStart continuous DA=ffffffffffff len=1500\n infinite=yes.");
 			else
-				sprintf(extra, "%s\nSpecify carrier suppression but not CCK rate", extra);
+				strcat(extra, "\nSpecify carrier suppression but not CCK rate");
 		}
 		SetCarrierSuppressionTx(padapter, (u8)bStartTest);
 		break;
 	case MP_SINGLE_CARRIER_TX:
 		if (bStartTest != 0)
-			sprintf(extra, "%s\nStart continuous DA=ffffffffffff len=1500\n infinite=yes.", extra);
+			strcat(extra, "\nStart continuous DA=ffffffffffff len=1500\n infinite=yes.");
 		SetSingleCarrierTx(padapter, (u8)bStartTest);
 		break;
 
@@ -1492,7 +1505,7 @@ int rtw_mp_tx(struct net_device *dev,
 	struct mp_priv *pmp_priv = &padapter->mppriv;
 	PMPT_CONTEXT		pMptCtx = &(padapter->mppriv.mpt_ctx);
 	struct registry_priv	*pregistrypriv = &padapter->registrypriv;
-
+	char *pextra = extra;
 	u32 bandwidth = 0, sg = 0, channel = 6, txpower = 40, rate = 108, ant = 0, txmode = 1, count = 0;
 	u8 i = 0, j = 0, bStartTest = 1, status = 0, Idx = 0, tmpU1B = 0;
 	u16 antenna = 0;
@@ -1522,13 +1535,13 @@ int rtw_mp_tx(struct net_device *dev,
 		return 0;
 	} else if (strncmp(extra, "setting", 7) == 0) {
 		_rtw_memset(extra, 0, wrqu->data.length);
-		sprintf(extra, "Current Setting :\n Channel:%d", pmp_priv->channel);
-		sprintf(extra, "%s\n Bandwidth:%d", extra, pmp_priv->bandwidth);
-		sprintf(extra, "%s\n Rate index:%d", extra, pmp_priv->rateidx);
-		sprintf(extra, "%s\n TxPower index:%d", extra, pmp_priv->txpoweridx);
-		sprintf(extra, "%s\n Antenna TxPath:%d", extra, pmp_priv->antenna_tx);
-		sprintf(extra, "%s\n Antenna RxPath:%d", extra, pmp_priv->antenna_rx);
-		sprintf(extra, "%s\n MP Mode:%d", extra, pmp_priv->mode);
+		pextra += sprintf(pextra, "Current Setting :\n Channel:%d", pmp_priv->channel);
+		pextra += sprintf(pextra, "\n Bandwidth:%d", pmp_priv->bandwidth);
+		pextra += sprintf(pextra, "\n Rate index:%d", pmp_priv->rateidx);
+		pextra += sprintf(pextra, "\n TxPower index:%d", pmp_priv->txpoweridx);
+		pextra += sprintf(pextra, "\n Antenna TxPath:%d", pmp_priv->antenna_tx);
+		pextra += sprintf(pextra, "\n Antenna RxPath:%d", pmp_priv->antenna_rx);
+		pextra += sprintf(pextra, "\n MP Mode:%d", pmp_priv->mode);
 		wrqu->data.length = strlen(extra);
 		return 0;
 #ifdef CONFIG_MP_VHT_HW_TX_MODE
@@ -1666,22 +1679,23 @@ int rtw_mp_tx(struct net_device *dev,
 		if (sscanf(extra, "ch=%d,bw=%d,rate=%d,pwr=%d,ant=%d,tx=%d", &channel, &bandwidth, &rate, &txpower, &ant, &txmode) < 6) {
 			RTW_INFO("Invalid format [ch=%d,bw=%d,rate=%d,pwr=%d,ant=%d,tx=%d]\n", channel, bandwidth, rate, txpower, ant, txmode);
 			_rtw_memset(extra, 0, wrqu->data.length);
-			sprintf(extra, "\n Please input correct format as bleow:\n");
-			sprintf(extra, "%s\t ch=%d,bw=%d,rate=%d,pwr=%d,ant=%d,tx=%d\n", extra, channel, bandwidth, rate, txpower, ant, txmode);
-			sprintf(extra, "%s\n [ ch : BGN = <1~14> , A or AC = <36~165> ]", extra);
-			sprintf(extra, "%s\n [ bw : Bandwidth: 0 = 20M, 1 = 40M, 2 = 80M ]", extra);
-			sprintf(extra, "%s\n [ rate :	CCK: 1 2 5.5 11M X 2 = < 2 4 11 22 >]", extra);
-			sprintf(extra, "%s\n [		OFDM: 6 9 12 18 24 36 48 54M X 2 = < 12 18 24 36 48 72 96 108>", extra);
-			sprintf(extra, "%s\n [		HT 1S2SS MCS0 ~ MCS15 : < [MCS0]=128 ~ [MCS7]=135 ~ [MCS15]=143 >", extra);
-			sprintf(extra, "%s\n [		HT 3SS MCS16 ~ MCS32 : < [MCS16]=144 ~ [MCS23]=151 ~ [MCS32]=159 >", extra);
-			sprintf(extra, "%s\n [		VHT 1SS MCS0 ~ MCS9 : < [MCS0]=160 ~ [MCS9]=169 >", extra);
-			sprintf(extra, "%s\n [ txpower : 1~63 power index", extra);
-			sprintf(extra, "%s\n [ ant : <A = 1, B = 2, C = 4, D = 8> ,2T ex: AB=3 BC=6 CD=12", extra);
-			sprintf(extra, "%s\n [ txmode : < 0 = CONTINUOUS_TX, 1 = PACKET_TX, 2 = SINGLE_TONE_TX, 3 = CARRIER_SUPPRISSION_TX, 4 = SINGLE_CARRIER_TX>\n", extra);
+			pextra += sprintf(pextra, "\n Please input correct format as bleow:\n");
+			pextra += sprintf(pextra, "\t ch=%d,bw=%d,rate=%d,pwr=%d,ant=%d,tx=%d\n", channel, bandwidth, rate, txpower, ant, txmode);
+			pextra += sprintf(pextra, "\n [ ch : BGN = <1~14> , A or AC = <36~165> ]");
+			pextra += sprintf(pextra, "\n [ bw : Bandwidth: 0 = 20M, 1 = 40M, 2 = 80M ]");
+			pextra += sprintf(pextra, "\n [ rate :	CCK: 1 2 5.5 11M X 2 = < 2 4 11 22 >]");
+			pextra += sprintf(pextra, "\n [		OFDM: 6 9 12 18 24 36 48 54M X 2 = < 12 18 24 36 48 72 96 108>");
+			pextra += sprintf(pextra, "\n [		HT 1S2SS MCS0 ~ MCS15 : < [MCS0]=128 ~ [MCS7]=135 ~ [MCS15]=143 >");
+			pextra += sprintf(pextra, "\n [		HT 3SS MCS16 ~ MCS32 : < [MCS16]=144 ~ [MCS23]=151 ~ [MCS32]=159 >");
+			pextra += sprintf(pextra, "\n [		VHT 1SS MCS0 ~ MCS9 : < [MCS0]=160 ~ [MCS9]=169 >");
+			pextra += sprintf(pextra, "\n [ txpower : 1~63 power index");
+			pextra += sprintf(pextra, "\n [ ant : <A = 1, B = 2, C = 4, D = 8> ,2T ex: AB=3 BC=6 CD=12");
+			pextra += sprintf(pextra, "\n [ txmode : < 0 = CONTINUOUS_TX, 1 = PACKET_TX, 2 = SINGLE_TONE_TX, 3 = CARRIER_SUPPRISSION_TX, 4 = SINGLE_CARRIER_TX>\n");
 			wrqu->data.length = strlen(extra);
 			return status;
 
 		} else {
+			char *pextra = extra;
 			RTW_INFO("Got format [ch=%d,bw=%d,rate=%d,pwr=%d,ant=%d,tx=%d]\n", channel, bandwidth, rate, txpower, ant, txmode);
 			_rtw_memset(extra, 0, wrqu->data.length);
 			sprintf(extra, "Change Current channel %d to channel %d", padapter->mppriv.channel , channel);
@@ -1693,18 +1707,20 @@ int rtw_mp_tx(struct net_device *dev,
 				bandwidth = CHANNEL_WIDTH_40;
 			else if (bandwidth == 2)
 				bandwidth = CHANNEL_WIDTH_80;
-			sprintf(extra, "%s\nChange Current Bandwidth %d to Bandwidth %d", extra, padapter->mppriv.bandwidth , bandwidth);
+			pextra = extra + strlen(pextra);
+			pextra += sprintf(pextra, "\nChange Current Bandwidth %d to Bandwidth %d", padapter->mppriv.bandwidth, bandwidth);
 			padapter->mppriv.bandwidth = (u8)bandwidth;
 			padapter->mppriv.preamble = sg;
 			SetBandwidth(padapter);
 			pHalData->current_channel_bw = bandwidth;
 
-			sprintf(extra, "%s\nSet power level :%d", extra, txpower);
+			pextra += sprintf(pextra, "\nSet power level :%d", txpower);
 			padapter->mppriv.txpoweridx = (u8)txpower;
 			pMptCtx->TxPwrLevel[ODM_RF_PATH_A] = (u8)txpower;
 			pMptCtx->TxPwrLevel[ODM_RF_PATH_B] = (u8)txpower;
 			pMptCtx->TxPwrLevel[ODM_RF_PATH_C] = (u8)txpower;
 			pMptCtx->TxPwrLevel[ODM_RF_PATH_D]  = (u8)txpower;
+			SetTxPower(padapter);
 
 			RTW_INFO("%s: bw=%d sg=%d\n", __func__, bandwidth, sg);
 
@@ -1722,13 +1738,13 @@ int rtw_mp_tx(struct net_device *dev,
 			RTW_INFO("%s: rate index=%d\n", __func__, rate);
 			if (rate >= MPT_RATE_LAST)
 				return -EINVAL;
-			sprintf(extra, "%s\nSet data rate to %d index %d", extra, padapter->mppriv.rateidx, rate);
+			pextra += sprintf(pextra, "\nSet data rate to %d index %d", padapter->mppriv.rateidx, rate);
 
 			padapter->mppriv.rateidx = rate;
 			pMptCtx->mpt_rate_index = rate;
 			SetDataRate(padapter);
 
-			sprintf(extra, "%s\nSet Antenna Path :%d",  extra, ant);
+			pextra += sprintf(pextra, "\nSet Antenna Path :%d", ant);
 			switch (ant) {
 			case 1:
 				antenna = ANTENNA_A;
@@ -1809,7 +1825,7 @@ int rtw_mp_rx(struct net_device *dev,
 	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(padapter);
 	struct mp_priv *pmp_priv = &padapter->mppriv;
 	PMPT_CONTEXT		pMptCtx = &(padapter->mppriv.mpt_ctx);
-
+	char *pextra = extra;
 	u32 bandwidth = 0, sg = 0, channel = 6, ant = 0;
 	u16 antenna = 0;
 	u8 bStartRx = 0;
@@ -1836,15 +1852,16 @@ int rtw_mp_rx(struct net_device *dev,
 	} else if (sscanf(extra, "ch=%d,bw=%d,ant=%d", &channel, &bandwidth, &ant) < 3) {
 		RTW_INFO("Invalid format [ch=%d,bw=%d,ant=%d]\n", channel, bandwidth, ant);
 		_rtw_memset(extra, 0, wrqu->data.length);
-		sprintf(extra, "\n Please input correct format as bleow:\n");
-		sprintf(extra, "%s\t ch=%d,bw=%d,ant=%d\n", extra, channel, bandwidth, ant);
-		sprintf(extra, "%s\n [ ch : BGN = <1~14> , A or AC = <36~165> ]", extra);
-		sprintf(extra, "%s\n [ bw : Bandwidth: 0 = 20M, 1 = 40M, 2 = 80M ]", extra);
-		sprintf(extra, "%s\n [ ant : <A = 1, B = 2, C = 4, D = 8> ,2T ex: AB=3 BC=6 CD=12", extra);
+		pextra += sprintf(pextra, "\n Please input correct format as bleow:\n");
+		pextra += sprintf(pextra, "\t ch=%d,bw=%d,ant=%d\n", channel, bandwidth, ant);
+		pextra += sprintf(pextra, "\n [ ch : BGN = <1~14> , A or AC = <36~165> ]");
+		pextra += sprintf(pextra, "\n [ bw : Bandwidth: 0 = 20M, 1 = 40M, 2 = 80M ]");
+		pextra += sprintf(pextra, "\n [ ant : <A = 1, B = 2, C = 4, D = 8> ,2T ex: AB=3 BC=6 CD=12");
 		wrqu->data.length = strlen(extra);
 		return 0;
 
 	} else {
+		char *pextra = extra;
 		bStartRx = 1;
 		RTW_INFO("Got format [ch=%d,bw=%d,ant=%d]\n", channel, bandwidth, ant);
 		_rtw_memset(extra, 0, wrqu->data.length);
@@ -1857,13 +1874,14 @@ int rtw_mp_rx(struct net_device *dev,
 			bandwidth = CHANNEL_WIDTH_40;
 		else if (bandwidth == 2)
 			bandwidth = CHANNEL_WIDTH_80;
-		sprintf(extra, "%s\nChange Current Bandwidth %d to Bandwidth %d", extra, padapter->mppriv.bandwidth , bandwidth);
+		pextra = extra + strlen(extra);
+		pextra += sprintf(pextra, "\nChange Current Bandwidth %d to Bandwidth %d", padapter->mppriv.bandwidth, bandwidth);
 		padapter->mppriv.bandwidth = (u8)bandwidth;
 		padapter->mppriv.preamble = sg;
 		SetBandwidth(padapter);
 		pHalData->current_channel_bw = bandwidth;
 
-		sprintf(extra, "%s\nSet Antenna Path :%d",  extra, ant);
+		pextra += sprintf(pextra, "\nSet Antenna Path :%d", ant);
 		switch (ant) {
 		case 1:
 			antenna = ANTENNA_A;
@@ -1914,7 +1932,7 @@ int rtw_mp_rx(struct net_device *dev,
 		pHalData->antenna_tx_path = antenna;
 		SetAntenna(padapter);
 
-		sprintf(extra, "%s\nstart Rx", extra);
+		strcat(extra, "\nstart Rx");
 		SetPacketRx(padapter, bStartRx, _FALSE);
 	}
 	wrqu->data.length = strlen(extra);
@@ -1949,6 +1967,60 @@ int rtw_mp_hwtx(struct net_device *dev,
 
 }
 
+int rtw_mp_pwrlmt(struct net_device *dev,
+			struct iw_request_info *info,
+			union iwreq_data *wrqu, char *extra)
+{
+	PADAPTER padapter = rtw_netdev_priv(dev);
+	struct registry_priv  *registry_par = &padapter->registrypriv;
+	u8 pwrlimtstat = 0;
+
+	if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length))
+		return -EFAULT;
+#ifdef CONFIG_TXPWR_LIMIT
+	pwrlimtstat = registry_par->RegEnableTxPowerLimit;
+	if (strncmp(extra, "off", 3) == 0 && strlen(extra) < 4) {
+		padapter->registrypriv.RegEnableTxPowerLimit = 0;
+		sprintf(extra, "Turn off Power Limit\n");
+
+	} else if (strncmp(extra, "on", 2) == 0 && strlen(extra) < 3) {
+		padapter->registrypriv.RegEnableTxPowerLimit = 1;
+		sprintf(extra, "Turn on Power Limit\n");
+
+	} else
+#endif
+		sprintf(extra, "Get Power Limit Status:%s\n", (pwrlimtstat == 1) ? "ON" : "OFF");
+
+
+	wrqu->data.length = strlen(extra);
+	return 0;
+}
+
+int rtw_mp_pwrbyrate(struct net_device *dev,
+			struct iw_request_info *info,
+			union iwreq_data *wrqu, char *extra)
+{
+	PADAPTER padapter = rtw_netdev_priv(dev);
+
+	if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length))
+		return -EFAULT;
+
+	if (strncmp(extra, "off", 3) == 0 && strlen(extra) < 4) {
+		padapter->registrypriv.RegEnableTxPowerByRate = 0;
+		sprintf(extra, "Turn off Tx Power by Rate\n");
+
+	} else if (strncmp(extra, "on", 2) == 0 && strlen(extra) < 3) {
+		padapter->registrypriv.RegEnableTxPowerByRate = 1;
+		sprintf(extra, "Turn On Tx Power by Rate\n");
+
+	} else {
+		sprintf(extra, "Get Power by Rate Status:%s\n", (padapter->registrypriv.RegEnableTxPowerByRate == 1) ? "ON" : "OFF");
+	}
+
+	wrqu->data.length = strlen(extra);
+	return 0;
+}
+
 int rtw_efuse_mask_file(struct net_device *dev,
 			struct iw_request_info *info,
 			union iwreq_data *wrqu, char *extra)
@@ -1962,6 +2034,7 @@ int rtw_efuse_mask_file(struct net_device *dev,
 	if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length))
 		return -EFAULT;
 
+	*(extra + wrqu->data.length) = '\0';
 	if (strncmp(extra, "off", 3) == 0 && strlen(extra) < 4) {
 		padapter->registrypriv.boffefusemask = 1;
 		sprintf(extra, "Turn off Efuse Mask\n");
@@ -1974,6 +2047,46 @@ int rtw_efuse_mask_file(struct net_device *dev,
 		wrqu->data.length = strlen(extra);
 		return 0;
 	}
+	if (strncmp(extra, "data,", 5) == 0) {
+		u8	*pch, *pdata;
+		char	*ptmp, tmp;
+		u8	count = 0;
+		u8	i = 0;
+		u32	datalen = 0;
+
+		ptmp = extra;
+		pch = strsep(&ptmp, ",");
+
+		if ((pch == NULL) || (strlen(pch) == 0)) {
+			RTW_INFO("%s: parameter error(no cmd)!\n", __func__);
+			return -EFAULT;
+		}
+
+		do {
+			pch = strsep(&ptmp, ":");
+			if ((pch == NULL) || (strlen(pch) == 0))
+				break;
+			if (strlen(pch) != 2
+				|| IsHexDigit(*pch) == _FALSE
+				|| IsHexDigit(*(pch + 1)) == _FALSE
+				|| sscanf(pch, "%hhx", &tmp) != 1
+			) {
+				RTW_INFO("%s: invalid 8-bit hex! input format: data,01:23:45:67:89:ab:cd:ef...\n", __func__);
+				return -EFAULT;
+			}
+			maskfileBuffer[count++] = tmp;
+
+		 } while (count < 64);
+
+		for (i = 0; i < count; i++)
+			sprintf(extra, "%s:%02x", extra, maskfileBuffer[i]);
+
+		padapter->registrypriv.bFileMaskEfuse = _TRUE;
+
+		sprintf(extra, "%s\nLoad Efuse Mask data %d hex ok\n", extra, count);
+		wrqu->data.length = strlen(extra);
+		return 0;
+	}
 	rtw_efuse_mask_file_path = extra;
 
 	if (rtw_is_file_readable(rtw_efuse_mask_file_path) == _TRUE) {
diff --git a/rtl8822BU/os_dep/linux/mlme_linux.c b/rtl8822BU/os_dep/linux/mlme_linux.c
index eef8f5f..4da606e 100755..100644
--- a/rtl8822BU/os_dep/linux/mlme_linux.c
+++ b/rtl8822BU/os_dep/linux/mlme_linux.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 
 #define _MLME_OSDEP_C_
@@ -56,82 +51,6 @@ void Linkdown_workitem_callback(struct work_struct *work)
 }
 #endif
 
-
-/*
-void sitesurvey_ctrl_handler(void *FunctionContext)
-{
-	_adapter *adapter = (_adapter *)FunctionContext;
-
-	_sitesurvey_ctrl_handler(adapter);
-
-	_set_timer(&adapter->mlmepriv.sitesurveyctrl.sitesurvey_ctrl_timer, 3000);
-}
-*/
-
-void rtw_join_timeout_handler(void *FunctionContext)
-{
-	_adapter *adapter = (_adapter *)FunctionContext;
-	_rtw_join_timeout_handler(adapter);
-}
-
-
-void _rtw_scan_timeout_handler(void *FunctionContext)
-{
-	_adapter *adapter = (_adapter *)FunctionContext;
-	rtw_scan_timeout_handler(adapter);
-}
-
-
-void _dynamic_check_timer_handlder(void *FunctionContext)
-{
-	struct dvobj_priv *pdvobj = (struct dvobj_priv *)FunctionContext;
-	_adapter *adapter = dvobj_get_primary_adapter(pdvobj);
-
-#if (MP_DRIVER == 1)
-	if (adapter->registrypriv.mp_mode == 1 && adapter->mppriv.mp_dm == 0) { /* for MP ODM dynamic Tx power tracking */
-		/* RTW_INFO("_dynamic_check_timer_handlder mp_dm =0 return\n"); */
-		_set_timer(&pdvobj->dynamic_chk_timer, 2000);
-		return;
-	}
-#endif
-
-	rtw_dynamic_check_timer_handlder(adapter);
-
-	_set_timer(&pdvobj->dynamic_chk_timer, 2000);
-}
-
-#ifdef CONFIG_SET_SCAN_DENY_TIMER
-void _rtw_set_scan_deny_timer_hdl(void *FunctionContext)
-{
-	_adapter *adapter = (_adapter *)FunctionContext;
-	rtw_set_scan_deny_timer_hdl(adapter);
-}
-#endif
-
-
-void rtw_init_mlme_timer(_adapter *padapter)
-{
-	struct	mlme_priv *pmlmepriv = &padapter->mlmepriv;
-
-	_init_timer(&(pmlmepriv->assoc_timer), padapter->pnetdev, rtw_join_timeout_handler, padapter);
-	/* _init_timer(&(pmlmepriv->sitesurveyctrl.sitesurvey_ctrl_timer), padapter->pnetdev, sitesurvey_ctrl_handler, padapter); */
-	_init_timer(&(pmlmepriv->scan_to_timer), padapter->pnetdev, _rtw_scan_timeout_handler, padapter);
-
-#ifdef CONFIG_DFS_MASTER
-	_init_timer(&(pmlmepriv->dfs_master_timer), padapter->pnetdev, rtw_dfs_master_timer_hdl, padapter);
-#endif
-
-#ifdef CONFIG_SET_SCAN_DENY_TIMER
-	_init_timer(&(pmlmepriv->set_scan_deny_timer), padapter->pnetdev, _rtw_set_scan_deny_timer_hdl, padapter);
-#endif
-
-#ifdef RTK_DMP_PLATFORM
-	_init_workitem(&(pmlmepriv->Linkup_workitem), Linkup_workitem_callback, padapter);
-	_init_workitem(&(pmlmepriv->Linkdown_workitem), Linkdown_workitem_callback, padapter);
-#endif
-
-}
-
 extern void rtw_indicate_wx_assoc_event(_adapter *padapter);
 extern void rtw_indicate_wx_disassoc_event(_adapter *padapter);
 
@@ -199,7 +118,6 @@ void rtw_reset_securitypriv(_adapter *adapter)
 		pmlmeext->mgnt_80211w_IPN_rx = 0;
 #endif /* CONFIG_IEEE80211W */
 		_rtw_memset((unsigned char *)&adapter->securitypriv, 0, sizeof(struct security_priv));
-		/* _init_timer(&(adapter->securitypriv.tkip_timer),adapter->pnetdev, rtw_use_tkipkey_handler, adapter); */
 
 		/* Added by Albert 2009/02/18 */
 		/* Restore the PMK information to securitypriv structure for the following connection. */
@@ -300,94 +218,6 @@ void rtw_report_sec_ie(_adapter *adapter, u8 authmode, u8 *sec_ie)
 
 }
 
-void _survey_timer_hdl(void *FunctionContext)
-{
-	_adapter *padapter = (_adapter *)FunctionContext;
-
-	survey_timer_hdl(padapter);
-}
-
-void _link_timer_hdl(void *FunctionContext)
-{
-	_adapter *padapter = (_adapter *)FunctionContext;
-	link_timer_hdl(padapter);
-}
-
-#ifdef CONFIG_RTW_80211R
-void _ft_link_timer_hdl(void *FunctionContext)
-{
-	_adapter *padapter = (_adapter *)FunctionContext;
-
-	ft_link_timer_hdl(padapter);
-}
-
-void _ft_roam_timer_hdl(void *FunctionContext)
-{
-	_adapter *padapter = (_adapter *)FunctionContext;
-
-	ft_roam_timer_hdl(padapter);
-}
-#endif
-
-void _addba_timer_hdl(void *FunctionContext)
-{
-	struct sta_info *psta = (struct sta_info *)FunctionContext;
-	addba_timer_hdl(psta);
-}
-
-#ifdef CONFIG_IEEE80211W
-
-void _sa_query_timer_hdl(void *FunctionContext)
-{
-	struct sta_info *psta = (struct sta_info *)FunctionContext;
-
-	sa_query_timer_hdl(psta);
-}
-
-void init_dot11w_expire_timer(_adapter *padapter, struct sta_info *psta)
-{
-	_init_timer(&psta->dot11w_expire_timer, padapter->pnetdev, _sa_query_timer_hdl, psta);
-}
-
-#endif /* CONFIG_IEEE80211W */
-
-void init_addba_retry_timer(_adapter *padapter, struct sta_info *psta)
-{
-
-	_init_timer(&psta->addba_retry_timer, padapter->pnetdev, _addba_timer_hdl, psta);
-}
-
-/*
-void _reauth_timer_hdl(void *FunctionContext)
-{
-	_adapter *padapter = (_adapter *)FunctionContext;
-	reauth_timer_hdl(padapter);
-}
-
-void _reassoc_timer_hdl(void *FunctionContext)
-{
-	_adapter *padapter = (_adapter *)FunctionContext;
-	reassoc_timer_hdl(padapter);
-}
-*/
-
-void init_mlme_ext_timer(_adapter *padapter)
-{
-	struct	mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
-
-	_init_timer(&pmlmeext->survey_timer, padapter->pnetdev, _survey_timer_hdl, padapter);
-	_init_timer(&pmlmeext->link_timer, padapter->pnetdev, _link_timer_hdl, padapter);
-#ifdef CONFIG_RTW_80211R
-	_init_timer(&pmlmeext->ft_link_timer, padapter->pnetdev, _ft_link_timer_hdl, padapter);
-	_init_timer(&pmlmeext->ft_roam_timer, padapter->pnetdev, _ft_roam_timer_hdl, padapter);
-#endif
-
-	/* _init_timer(&pmlmeext->ADDBA_timer, padapter->pnetdev, _addba_timer_hdl, padapter); */
-
-	/* _init_timer(&pmlmeext->reauth_timer, padapter->pnetdev, _reauth_timer_hdl, padapter); */
-	/* _init_timer(&pmlmeext->reassoc_timer, padapter->pnetdev, _reassoc_timer_hdl, padapter); */
-}
-
 #ifdef CONFIG_AP_MODE
 
 void rtw_indicate_sta_assoc_event(_adapter *padapter, struct sta_info *psta)
diff --git a/rtl8822BU/os_dep/linux/os_intfs.c b/rtl8822BU/os_dep/linux/os_intfs.c
index fecfacb..d58b71e 100755..100644
--- a/rtl8822BU/os_dep/linux/os_intfs.c
+++ b/rtl8822BU/os_dep/linux/os_intfs.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _OS_INTFS_C_
 
 #include <drv_types.h>
@@ -59,14 +54,33 @@ int rtw_soft_ap = 0;
 		int rtw_ips_mode = IPS_LEVEL_2;
 	#else
 		int rtw_ips_mode = IPS_NORMAL;
-	#endif
-#else
+	#endif /*CONFIG_IPS_LEVEL_2*/
+
+	#ifdef CONFIG_USB_HCI
+		int rtw_lps_level = LPS_NORMAL; /*USB default LPS level*/
+	#else /*SDIO,PCIE*/
+		#if defined(CONFIG_LPS_PG)
+			/*int rtw_lps_level = LPS_PG;*//*FW not support yet*/
+			int rtw_lps_level = LPS_LCLK;
+		#elif defined(CONFIG_LPS_LCLK)
+			int rtw_lps_level = LPS_LCLK;
+		#else
+			int rtw_lps_level = LPS_NORMAL;
+		#endif
+	#endif/*CONFIG_USB_HCI*/
+#else /* !CONFIG_POWER_SAVING */
 	int rtw_power_mgnt = PS_MODE_ACTIVE;
 	int rtw_ips_mode = IPS_NONE;
-#endif
+	int rtw_lps_level = LPS_NORMAL;
+#endif /* CONFIG_POWER_SAVING */
+
+
 module_param(rtw_ips_mode, int, 0644);
 MODULE_PARM_DESC(rtw_ips_mode, "The default IPS mode");
 
+module_param(rtw_lps_level, int, 0644);
+MODULE_PARM_DESC(rtw_lps_level, "The default LPS level");
+
 int rtw_smart_ps = 2;
 
 int rtw_check_fw_ps = 1;
@@ -78,6 +92,9 @@ int rtw_early_mode = 1;
 int rtw_usb_rxagg_mode = 2;/* RX_AGG_DMA=1, RX_AGG_USB=2 */
 module_param(rtw_usb_rxagg_mode, int, 0644);
 
+int rtw_dynamic_agg_enable = 1;
+module_param(rtw_dynamic_agg_enable, int, 0644);
+
 /* set log level when inserting driver module, default log level is _DRV_INFO_ = 4,
 * please refer to "How_to_set_driver_debug_log_level.doc" to set the available level.
 */
@@ -98,6 +115,12 @@ int rtw_ack_policy = NORMAL_ACK;
 
 int rtw_mp_mode = 0;
 
+#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTW_CUSTOMER_STR)
+uint rtw_mp_customer_str = 0;
+module_param(rtw_mp_customer_str, uint, 0644);
+MODULE_PARM_DESC(rtw_mp_customer_str, "Whether or not to enable customer str support on MP mode");
+#endif
+
 int rtw_software_encrypt = 0;
 int rtw_software_decrypt = 0;
 
@@ -110,8 +133,11 @@ int rtw_uapsd_acbk_en = 0;
 int rtw_uapsd_acbe_en = 0;
 int rtw_uapsd_acvi_en = 0;
 int rtw_uapsd_acvo_en = 0;
-#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
+#if defined(CONFIG_RTL8814A)
 	int rtw_pwrtrim_enable = 2; /* disable kfree , rename to power trim disable */
+#elif defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822B)
+	/*PHYDM API, must enable by default*/
+	int rtw_pwrtrim_enable = 1;
 #else
 	int rtw_pwrtrim_enable = 0; /* Default Enalbe  power trim by efuse config */
 #endif
@@ -128,11 +154,32 @@ int rtw_ht_enable = 1;
 int rtw_bw_mode = 0x21;
 int rtw_ampdu_enable = 1;/* for enable tx_ampdu , */ /* 0: disable, 0x1:enable */
 int rtw_rx_stbc = 1;/* 0: disable, bit(0):enable 2.4g, bit(1):enable 5g, default is set to enable 2.4GHZ for IOT issue with bufflao's AP at 5GHZ */
-#if defined(CONFIG_RTL8822B) && defined(CONFIG_PCI_HCI)
+#if (defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)) && defined(CONFIG_PCI_HCI)
 int rtw_ampdu_amsdu = 2;/* 0: disabled, 1:enabled, 2:auto . There is an IOT issu with DLINK DIR-629 when the flag turn on */
 #else
 int rtw_ampdu_amsdu = 0;/* 0: disabled, 1:enabled, 2:auto . There is an IOT issu with DLINK DIR-629 when the flag turn on */
 #endif
+
+static uint rtw_rx_ampdu_sz_limit_1ss[4] = CONFIG_RTW_RX_AMPDU_SZ_LIMIT_1SS;
+static uint rtw_rx_ampdu_sz_limit_1ss_num = 0;
+module_param_array(rtw_rx_ampdu_sz_limit_1ss, uint, &rtw_rx_ampdu_sz_limit_1ss_num, 0644);
+MODULE_PARM_DESC(rtw_rx_ampdu_sz_limit_1ss, "RX AMPDU size limit for 1SS link of each BW, 0xFF: no limitation");
+
+static uint rtw_rx_ampdu_sz_limit_2ss[4] = CONFIG_RTW_RX_AMPDU_SZ_LIMIT_2SS;
+static uint rtw_rx_ampdu_sz_limit_2ss_num = 0;
+module_param_array(rtw_rx_ampdu_sz_limit_2ss, uint, &rtw_rx_ampdu_sz_limit_2ss_num, 0644);
+MODULE_PARM_DESC(rtw_rx_ampdu_sz_limit_2ss, "RX AMPDU size limit for 2SS link of each BW, 0xFF: no limitation");
+
+static uint rtw_rx_ampdu_sz_limit_3ss[4] = CONFIG_RTW_RX_AMPDU_SZ_LIMIT_3SS;
+static uint rtw_rx_ampdu_sz_limit_3ss_num = 0;
+module_param_array(rtw_rx_ampdu_sz_limit_3ss, uint, &rtw_rx_ampdu_sz_limit_3ss_num, 0644);
+MODULE_PARM_DESC(rtw_rx_ampdu_sz_limit_3ss, "RX AMPDU size limit for 3SS link of each BW, 0xFF: no limitation");
+
+static uint rtw_rx_ampdu_sz_limit_4ss[4] = CONFIG_RTW_RX_AMPDU_SZ_LIMIT_4SS;
+static uint rtw_rx_ampdu_sz_limit_4ss_num = 0;
+module_param_array(rtw_rx_ampdu_sz_limit_4ss, uint, &rtw_rx_ampdu_sz_limit_4ss_num, 0644);
+MODULE_PARM_DESC(rtw_rx_ampdu_sz_limit_4ss, "RX AMPDU size limit for 4SS link of each BW, 0xFF: no limitation");
+
 /* Short GI support Bit Map
 * BIT0 - 20MHz, 0: non-support, 1: support
 * BIT1 - 40MHz, 0: non-support, 1: support
@@ -159,14 +206,19 @@ int rtw_bfee_rf_number = 0; /*BeamformeeCapRfNum  Rf path number, 0 for auto, ot
 
 #ifdef CONFIG_80211AC_VHT
 int rtw_vht_enable = 1; /* 0:disable, 1:enable, 2:force auto enable */
+module_param(rtw_vht_enable, int, 0644);
+
 int rtw_ampdu_factor = 7;
-int rtw_vht_rate_sel = 0;
+
+uint rtw_vht_rx_mcs_map = 0xaaaa;
+module_param(rtw_vht_rx_mcs_map, uint, 0644);
+MODULE_PARM_DESC(rtw_vht_rx_mcs_map, "VHT RX MCS map");
 #endif /* CONFIG_80211AC_VHT */
 
 int rtw_lowrate_two_xmit = 1;/* Use 2 path Tx to transmit MCS0~7 and legacy mode */
 
-/* int rf_config = RF_1T2R;  */ /* 1T2R */
-int rtw_rf_config = RF_MAX_TYPE;  /* auto */
+int rtw_rf_config = RF_TYPE_AUTO;
+module_param(rtw_rf_config, int, 0644);
 
 /* 0: not check in watch dog, 1: check in watch dog  */
 int rtw_check_hw_status = 0;
@@ -261,6 +313,13 @@ int rtw_mc2u_disable = 0;
 int rtw_80211d = 0;
 #endif
 
+#ifdef CONFIG_PCI_ASPM
+/* CLK_REQ:BIT0 L0s:BIT1 ASPM_L1:BIT2 L1Off:BIT3*/
+int	rtw_pci_aspm_enable = 0xF;
+#else
+int	rtw_pci_aspm_enable;
+#endif
+
 #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV
 int rtw_force_ant = 2;/* 0 :normal, 1:Main ant, 2:Aux ant */
 int rtw_force_igi = 0; /* 0 :normal */
@@ -334,15 +393,12 @@ module_param(rtw_ampdu_enable, int, 0644);
 module_param(rtw_rx_stbc, int, 0644);
 module_param(rtw_ampdu_amsdu, int, 0644);
 #endif /* CONFIG_80211N_HT */
-#ifdef CONFIG_80211AC_VHT
-module_param(rtw_vht_enable, int, 0644);
-#endif /* CONFIG_80211AC_VHT */
+
 #ifdef CONFIG_BEAMFORMING
 module_param(rtw_beamform_cap, int, 0644);
 #endif
 module_param(rtw_lowrate_two_xmit, int, 0644);
 
-module_param(rtw_rf_config, int, 0644);
 module_param(rtw_power_mgnt, int, 0644);
 module_param(rtw_smart_ps, int, 0644);
 module_param(rtw_low_power, int, 0644);
@@ -363,6 +419,10 @@ module_param(rtw_hwpwrp_detect, int, 0644);
 module_param(rtw_hw_wps_pbc, int, 0644);
 module_param(rtw_check_hw_status, int, 0644);
 
+#ifdef CONFIG_PCI_HCI
+module_param(rtw_pci_aspm_enable, int, 0644);
+#endif
+
 #ifdef CONFIG_TX_EARLY_MODE
 module_param(rtw_early_mode, int, 0644);
 #endif
@@ -444,7 +504,7 @@ MODULE_PARM_DESC(rtw_adaptivity_th_edcca_hl_diff, "th_edcca_hl_diff for Adaptivi
 #ifdef CONFIG_DFS_MASTER
 uint rtw_dfs_region_domain = CONFIG_RTW_DFS_REGION_DOMAIN;
 module_param(rtw_dfs_region_domain, uint, 0644);
-MODULE_PARM_DESC(rtw_dfs_region_domain, "1:FCC, 2:MKK, 3:ETSI");
+MODULE_PARM_DESC(rtw_dfs_region_domain, "0:UNKNOWN, 1:FCC, 2:MKK, 3:ETSI");
 #endif
 
 uint rtw_amplifier_type_2g = CONFIG_RTW_AMPLIFIER_TYPE_2G;
@@ -499,7 +559,6 @@ uint rtw_rxgain_offset_5gh = 0;
 module_param(rtw_rxgain_offset_5gh, uint, 0644);
 MODULE_PARM_DESC(rtw_rxgain_offset_5gm, "default RF Gain 5GL Offset value:0");
 
-
 uint rtw_pll_ref_clk_sel = CONFIG_RTW_PLL_REF_CLK_SEL;
 module_param(rtw_pll_ref_clk_sel, uint, 0644);
 MODULE_PARM_DESC(rtw_pll_ref_clk_sel, "force pll_ref_clk_sel, 0xF:use autoload value");
@@ -508,9 +567,11 @@ int rtw_tx_pwr_by_rate = CONFIG_TXPWR_BY_RATE_EN;
 module_param(rtw_tx_pwr_by_rate, int, 0644);
 MODULE_PARM_DESC(rtw_tx_pwr_by_rate, "0:Disable, 1:Enable, 2: Depend on efuse");
 
+#ifdef CONFIG_TXPWR_LIMIT
 int rtw_tx_pwr_lmt_enable = CONFIG_TXPWR_LIMIT_EN;
 module_param(rtw_tx_pwr_lmt_enable, int, 0644);
 MODULE_PARM_DESC(rtw_tx_pwr_lmt_enable, "0:Disable, 1:Enable, 2: Depend on efuse");
+#endif
 
 static int rtw_target_tx_pwr_2g_a[RATE_SECTION_NUM] = CONFIG_RTW_TARGET_TX_PWR_2G_A;
 static int rtw_target_tx_pwr_2g_a_num = 0;
@@ -639,6 +700,13 @@ module_param(rtw_en_gro, int, 0644);
 #endif /* CONFIG_RTW_GRO */
 #endif /* CONFIG_RTW_NAPI */
 
+#ifdef RTW_IQK_FW_OFFLOAD
+int rtw_iqk_fw_offload = 1;
+#else
+int rtw_iqk_fw_offload;
+#endif /* RTW_IQK_FW_OFFLOAD */
+module_param(rtw_iqk_fw_offload, int, 0644);
+
 void rtw_regsty_load_target_tx_power(struct registry_priv *regsty)
 {
 	int path, rs;
@@ -688,6 +756,28 @@ inline void rtw_regsty_load_excl_chs(struct registry_priv *regsty)
 		regsty->excl_chs[ch_num] = 0;
 }
 
+#ifdef CONFIG_80211N_HT
+inline void rtw_regsty_init_rx_ampdu_sz_limit(struct registry_priv *regsty)
+{
+	int i, j;
+	uint *sz_limit;
+
+	for (i = 0; i < 4; i++) {
+		if (i == 0)
+			sz_limit = rtw_rx_ampdu_sz_limit_1ss;
+		else if (i == 1)
+			sz_limit = rtw_rx_ampdu_sz_limit_2ss;
+		else if (i == 2)
+			sz_limit = rtw_rx_ampdu_sz_limit_3ss;
+		else if (i == 3)
+			sz_limit = rtw_rx_ampdu_sz_limit_4ss;
+
+		for (j = 0; j < 4; j++)
+			regsty->rx_ampdu_sz_limit_by_nss_bw[i][j] = sz_limit[j];
+	}
+}
+#endif /* CONFIG_80211N_HT */
+
 uint loadparam(_adapter *padapter)
 {
 	uint status = _SUCCESS;
@@ -730,6 +820,7 @@ uint loadparam(_adapter *padapter)
 	registry_par->check_fw_ps = (u8)rtw_check_fw_ps;
 	registry_par->power_mgnt = (u8)rtw_power_mgnt;
 	registry_par->ips_mode = (u8)rtw_ips_mode;
+	registry_par->lps_level = (u8)rtw_lps_level;
 	registry_par->radio_enable = (u8)rtw_radio_enable;
 	registry_par->long_retry_lmt = (u8)rtw_long_retry_lmt;
 	registry_par->short_retry_lmt = (u8)rtw_short_retry_lmt;
@@ -737,11 +828,15 @@ uint loadparam(_adapter *padapter)
 	/* registry_par->qos_enable = (u8)rtw_qos_enable; */
 	registry_par->ack_policy = (u8)rtw_ack_policy;
 	registry_par->mp_mode = (u8)rtw_mp_mode;
+#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTW_CUSTOMER_STR)
+	registry_par->mp_customer_str = (u8)rtw_mp_customer_str;
+#endif
 	registry_par->software_encrypt = (u8)rtw_software_encrypt;
 	registry_par->software_decrypt = (u8)rtw_software_decrypt;
 
 	registry_par->acm_method = (u8)rtw_acm_method;
 	registry_par->usb_rxagg_mode = (u8)rtw_usb_rxagg_mode;
+	registry_par->dynamic_agg_enable = (u8)rtw_dynamic_agg_enable;
 
 	/* UAPSD */
 	registry_par->wmm_enable = (u8)rtw_wmm_enable;
@@ -768,12 +863,14 @@ uint loadparam(_adapter *padapter)
 	registry_par->beamform_cap = (u8)rtw_beamform_cap;
 	registry_par->beamformer_rf_num = (u8)rtw_bfer_rf_number;
 	registry_par->beamformee_rf_num = (u8)rtw_bfee_rf_number;
+	rtw_regsty_init_rx_ampdu_sz_limit(registry_par);
 #endif
 
 #ifdef CONFIG_80211AC_VHT
 	registry_par->vht_enable = (u8)rtw_vht_enable;
 	registry_par->ampdu_factor = (u8)rtw_ampdu_factor;
-	registry_par->vht_rate_sel = (u8)rtw_vht_rate_sel;
+	registry_par->vht_rx_mcs_map[0] = (u8)(rtw_vht_rx_mcs_map & 0xFF);
+	registry_par->vht_rx_mcs_map[1] = (u8)((rtw_vht_rx_mcs_map & 0xFF00) >> 8);
 #endif
 
 #ifdef CONFIG_TX_EARLY_MODE
@@ -868,12 +965,13 @@ uint loadparam(_adapter *padapter)
 
 	registry_par->pll_ref_clk_sel = (u8)rtw_pll_ref_clk_sel;
 
+#ifdef CONFIG_TXPWR_LIMIT
 	registry_par->RegEnableTxPowerLimit = (u8)rtw_tx_pwr_lmt_enable;
+#endif
 	registry_par->RegEnableTxPowerByRate = (u8)rtw_tx_pwr_by_rate;
 
 	rtw_regsty_load_target_tx_power(registry_par);
 
-	registry_par->RegPowerBase = 14;
 	registry_par->TxBBSwing_2G = (s8)rtw_TxBBSwing_2G;
 	registry_par->TxBBSwing_5G = (s8)rtw_TxBBSwing_5G;
 	registry_par->bEn_RFE = 1;
@@ -937,6 +1035,10 @@ uint loadparam(_adapter *padapter)
 	registry_par->trx_share_mode = rtw_trx_share_mode;
 #endif
 
+#ifdef CONFIG_PCI_HCI
+	registry_par->pci_aspm_config = rtw_pci_aspm_enable;
+#endif
+
 #ifdef CONFIG_RTW_NAPI
 	registry_par->en_napi = (u8)rtw_en_napi;
 #ifdef CONFIG_RTW_GRO
@@ -948,6 +1050,8 @@ uint loadparam(_adapter *padapter)
 #endif /* CONFIG_RTW_GRO */
 #endif /* CONFIG_RTW_NAPI */
 
+	registry_par->iqk_fw_offload = (u8)rtw_iqk_fw_offload;
+
 	return status;
 }
 
@@ -1136,38 +1240,43 @@ u16 rtw_recv_select_queue(struct sk_buff *skb)
 }
 
 #endif
-static int rtw_ndev_notifier_call(struct notifier_block *nb, unsigned long state, void *ptr)
+
+static u8 is_rtw_ndev(struct net_device *ndev)
 {
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0))
-	struct net_device *dev = netdev_notifier_info_to_dev(ptr);
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29))
+	return ndev->netdev_ops
+		&& ndev->netdev_ops->ndo_do_ioctl
+		&& ndev->netdev_ops->ndo_do_ioctl == rtw_ioctl;
 #else
-	struct net_device *dev = ptr;
+	return ndev->do_ioctl
+		&& ndev->do_ioctl == rtw_ioctl;
 #endif
+}
 
-	if (dev == NULL)
-		return NOTIFY_DONE;
-
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29))
-	if (dev->netdev_ops == NULL)
-		return NOTIFY_DONE;
+static int rtw_ndev_notifier_call(struct notifier_block *nb, unsigned long state, void *ptr)
+{
+	struct net_device *ndev;
 
-	if (dev->netdev_ops->ndo_do_ioctl == NULL)
+	if (ptr == NULL)
 		return NOTIFY_DONE;
 
-	if (dev->netdev_ops->ndo_do_ioctl != rtw_ioctl)
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0))
+	ndev = netdev_notifier_info_to_dev(ptr);
 #else
-	if (dev->do_ioctl == NULL)
+	ndev = ptr;
+#endif
+
+	if (ndev == NULL)
 		return NOTIFY_DONE;
 
-	if (dev->do_ioctl != rtw_ioctl)
-#endif
+	if (!is_rtw_ndev(ndev))
 		return NOTIFY_DONE;
 
-	RTW_INFO(FUNC_NDEV_FMT" state:%lu\n", FUNC_NDEV_ARG(dev), state);
+	RTW_INFO(FUNC_NDEV_FMT" state:%lu\n", FUNC_NDEV_ARG(ndev), state);
 
 	switch (state) {
 	case NETDEV_CHANGENAME:
-		rtw_adapter_proc_replace(dev);
+		rtw_adapter_proc_replace(ndev);
 		break;
 	}
 
@@ -1188,7 +1297,6 @@ void rtw_ndev_notifier_unregister(void)
 	unregister_netdevice_notifier(&rtw_ndev_notifier);
 }
 
-
 int rtw_ndev_init(struct net_device *dev)
 {
 	_adapter *adapter = rtw_netdev_priv(dev);
@@ -1289,15 +1397,18 @@ void rtw_hook_if_ops(struct net_device *ndev)
 #endif
 }
 
+#ifdef CONFIG_CONCURRENT_MODE
+static void rtw_hook_vir_if_ops(struct net_device *ndev);
+#endif
 struct net_device *rtw_init_netdev(_adapter *old_padapter)
 {
 	_adapter *padapter;
 	struct net_device *pnetdev;
 
-
-	if (old_padapter != NULL)
+	if (old_padapter != NULL) {
+		rtw_os_ndev_free(old_padapter);
 		pnetdev = rtw_alloc_etherdev_with_old_priv(sizeof(_adapter), (void *)old_padapter);
-	else
+	} else
 		pnetdev = rtw_alloc_etherdev(sizeof(_adapter));
 
 	if (!pnetdev)
@@ -1311,6 +1422,10 @@ struct net_device *rtw_init_netdev(_adapter *old_padapter)
 #endif
 
 	rtw_hook_if_ops(pnetdev);
+#ifdef CONFIG_CONCURRENT_MODE
+	if (!is_primary_adapter(padapter))
+		rtw_hook_vir_if_ops(pnetdev);
+#endif /* CONFIG_CONCURRENT_MODE */
 
 #ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
 	pnetdev->features |= NETIF_F_IP_CSUM;
@@ -1379,11 +1494,12 @@ void rtw_os_ndev_free(_adapter *adapter)
 	}
 }
 
-int rtw_os_ndev_register(_adapter *adapter, char *name)
+int rtw_os_ndev_register(_adapter *adapter, const char *name)
 {
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
 	int ret = _SUCCESS;
 	struct net_device *ndev = adapter->pnetdev;
-
+	u8 rtnl_lock_needed = rtw_rtnl_lock_needed(dvobj);
 
 #ifdef CONFIG_RTW_NAPI
 	netif_napi_add(ndev, &adapter->napi, rtw_recv_napi_poll, RTL_NAPI_WEIGHT);
@@ -1397,16 +1513,26 @@ int rtw_os_ndev_register(_adapter *adapter, char *name)
 	}
 #endif
 
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0))
+	ndev->gro_flush_timeout = 100000;
+#endif
+
 	/* alloc netdev name */
 	rtw_init_netdev_name(ndev, name);
 
 	_rtw_memcpy(ndev->dev_addr, adapter_mac_addr(adapter), ETH_ALEN);
 
 	/* Tell the network stack we exist */
-	if (register_netdev(ndev) != 0) {
+
+	if (rtnl_lock_needed)
+		ret = (register_netdev(ndev) == 0) ? _SUCCESS : _FAIL;
+	else
+		ret = (register_netdevice(ndev) == 0) ? _SUCCESS : _FAIL;
+
+	if (ret == _SUCCESS)
+		adapter->registered = 1;
+	else
 		RTW_INFO(FUNC_NDEV_FMT" if%d Failed!\n", FUNC_NDEV_ARG(ndev), (adapter->iface_id + 1));
-		ret = _FAIL;
-	}
 
 #if defined(CONFIG_IOCTL_CFG80211)
 	if (ret != _SUCCESS) {
@@ -1430,7 +1556,7 @@ void rtw_os_ndev_unregister(_adapter *adapter)
 {
 	struct net_device *netdev = NULL;
 
-	if (adapter == NULL)
+	if (adapter == NULL || adapter->registered == 0)
 		return;
 
 	adapter->ndev_unregistering = 1;
@@ -1441,8 +1567,15 @@ void rtw_os_ndev_unregister(_adapter *adapter)
 	rtw_cfg80211_ndev_res_unregister(adapter);
 #endif
 
-	if ((adapter->DriverState != DRIVER_DISAPPEAR) && netdev)
-		unregister_netdev(netdev); /* will call netdev_close() */
+	if ((adapter->DriverState != DRIVER_DISAPPEAR) && netdev) {
+		struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+		u8 rtnl_lock_needed = rtw_rtnl_lock_needed(dvobj);
+
+		if (rtnl_lock_needed)
+			unregister_netdev(netdev);
+		else
+			unregister_netdevice(netdev);
+	}
 
 #if defined(CONFIG_IOCTL_CFG80211) && !defined(RTW_SINGLE_WIPHY)
 	rtw_wiphy_unregister(adapter_to_wiphy(adapter));
@@ -1456,6 +1589,7 @@ void rtw_os_ndev_unregister(_adapter *adapter)
 	netif_napi_del(&adapter->napi);
 #endif /* CONFIG_RTW_NAPI */
 
+	adapter->registered = 0;
 	adapter->ndev_unregistering = 0;
 }
 
@@ -1467,7 +1601,7 @@ void rtw_os_ndev_unregister(_adapter *adapter)
  * Returns:
  * _SUCCESS or _FAIL
  */
-int rtw_os_ndev_init(_adapter *adapter, char *name)
+int rtw_os_ndev_init(_adapter *adapter, const char *name)
 {
 	int ret = _FAIL;
 
@@ -1519,6 +1653,12 @@ int rtw_os_ndevs_alloc(struct dvobj_priv *dvobj)
 
 		adapter = dvobj->padapters[i];
 		if (adapter && !adapter->pnetdev) {
+
+			#ifdef CONFIG_RTW_DYNAMIC_NDEV
+			if (!is_primary_adapter(adapter))
+				continue;
+			#endif
+
 			status = rtw_os_ndev_alloc(adapter);
 			if (status != _SUCCESS) {
 				rtw_warn_on(1);
@@ -1580,32 +1720,40 @@ u32 rtw_start_drv_threads(_adapter *padapter)
 #endif
 	{
 		padapter->xmitThread = kthread_run(rtw_xmit_thread, padapter, "RTW_XMIT_THREAD");
-		if (IS_ERR(padapter->xmitThread))
+		if (IS_ERR(padapter->xmitThread)) {
+			padapter->xmitThread = NULL;
 			_status = _FAIL;
+		}
 	}
 #endif /* #ifdef CONFIG_XMIT_THREAD_MODE */
 
 #ifdef CONFIG_RECV_THREAD_MODE
 	if (is_primary_adapter(padapter)) {
 		padapter->recvThread = kthread_run(rtw_recv_thread, padapter, "RTW_RECV_THREAD");
-		if (IS_ERR(padapter->recvThread))
+		if (IS_ERR(padapter->recvThread)) {
+			padapter->recvThread = NULL;
 			_status = _FAIL;
+		}
 	}
 #endif
 
 	if (is_primary_adapter(padapter)) {
 		padapter->cmdThread = kthread_run(rtw_cmd_thread, padapter, "RTW_CMD_THREAD");
-		if (IS_ERR(padapter->cmdThread))
+		if (IS_ERR(padapter->cmdThread)) {
+			padapter->cmdThread = NULL;
 			_status = _FAIL;
+		}
 		else
-			_rtw_down_sema(&padapter->cmdpriv.terminate_cmdthread_sema); /* wait for cmd_thread to run */
+			_rtw_down_sema(&padapter->cmdpriv.start_cmdthread_sema); /* wait for cmd_thread to run */
 	}
 
 
 #ifdef CONFIG_EVENT_THREAD_MODE
 	padapter->evtThread = kthread_run(event_thread, padapter, "RTW_EVENT_THREAD");
-	if (IS_ERR(padapter->evtThread))
+	if (IS_ERR(padapter->evtThread)) {
+		padapter->evtThread = NULL;
 		_status = _FAIL;
+	}
 #endif
 
 	rtw_hal_start_thread(padapter);
@@ -1620,9 +1768,11 @@ void rtw_stop_drv_threads(_adapter *padapter)
 		rtw_stop_cmd_thread(padapter);
 
 #ifdef CONFIG_EVENT_THREAD_MODE
-	_rtw_up_sema(&padapter->evtpriv.evt_notify);
-	if (padapter->evtThread)
-		_rtw_down_sema(&padapter->evtpriv.terminate_evtthread_sema);
+	if (padapter->evtThread) {
+		_rtw_up_sema(&padapter->evtpriv.evt_notify);
+		rtw_thread_stop(padapter->evtThread);
+		padapter->evtThread = NULL;
+	}
 #endif
 
 #ifdef CONFIG_XMIT_THREAD_MODE
@@ -1632,16 +1782,20 @@ void rtw_stop_drv_threads(_adapter *padapter)
 	if (is_primary_adapter(padapter))
 #endif  /*SDIO_HCI */
 	{
-		_rtw_up_sema(&padapter->xmitpriv.xmit_sema);
-		_rtw_down_sema(&padapter->xmitpriv.terminate_xmitthread_sema);
+		if (padapter->xmitThread) {
+			_rtw_up_sema(&padapter->xmitpriv.xmit_sema);
+			rtw_thread_stop(padapter->xmitThread);
+			padapter->xmitThread = NULL;
+		}
 	}
 #endif
 
 #ifdef CONFIG_RECV_THREAD_MODE
-	if (is_primary_adapter(padapter)) {
+	if (is_primary_adapter(padapter) && padapter->recvThread) {
 		/* Below is to termindate rx_thread... */
 		_rtw_up_sema(&padapter->recvpriv.recv_sema);
-		_rtw_down_sema(&padapter->recvpriv.terminate_recvthread_sema);
+		rtw_thread_stop(padapter->recvThread);
+		padapter->recvThread = NULL;
 	}
 #endif
 
@@ -1713,6 +1867,8 @@ u8 rtw_init_default_value(_adapter *padapter)
 	padapter->data_fb = 0;
 	padapter->fix_bw = 0xFF;
 	padapter->power_offset = 0;
+	padapter->rsvd_page_offset = 0;
+	padapter->rsvd_page_num = 0;
 
 	padapter->driver_tx_bw_mode = pregistrypriv->tx_bw_mode;
 
@@ -1725,6 +1881,7 @@ u8 rtw_init_default_value(_adapter *padapter)
 	padapter->tx_amsdu = 2;
 	padapter->tx_amsdu_rate = 400;
 #endif
+	padapter->driver_tx_max_agg_num = 0xFF;
 #ifdef DBG_RX_COUNTER_DUMP
 	padapter->dump_rx_cnt_mode = 0;
 	padapter->drv_rx_cnt_ok = 0;
@@ -1734,17 +1891,15 @@ u8 rtw_init_default_value(_adapter *padapter)
 #ifdef CONFIG_RTW_NAPI
 	padapter->napi_state = NAPI_DISABLE;
 #endif
-	return ret;
-}
+	padapter->tsf.sync_port =  MAX_HW_PORT;
+	padapter->tsf.offset = 0;
 
-#ifdef CONFIG_SWTIMER_BASED_TXBCN
-void _tx_beacon_timer_handlder(void *FunctionContext)
-{
-	struct dvobj_priv *pdvobj = (struct dvobj_priv *)FunctionContext;
+#ifdef CONFIG_CHNL_LOAD_MAGT
+	padapter->clm_flag = FALSE;
+#endif
 
-	tx_beacon_timer_handlder(pdvobj);
+	return ret;
 }
-#endif
 
 struct dvobj_priv *devobj_init(void)
 {
@@ -1787,11 +1942,11 @@ struct dvobj_priv *devobj_init(void)
 	pdvobj->inter_bcn_space = DEFAULT_BCN_INTERVAL; /* default value is equal to the default beacon_interval (100ms) */
 	_rtw_init_queue(&pdvobj->ap_if_q);
 #ifdef CONFIG_SWTIMER_BASED_TXBCN
-	_init_timer(&(pdvobj->txbcn_timer), NULL, _tx_beacon_timer_handlder, pdvobj);
+	rtw_init_timer(&(pdvobj->txbcn_timer), NULL, tx_beacon_timer_handlder, pdvobj);
 #endif
 #endif
 
-	_init_timer(&(pdvobj->dynamic_chk_timer), NULL, _dynamic_check_timer_handlder, pdvobj);
+	rtw_init_timer(&(pdvobj->dynamic_chk_timer), NULL, rtw_dynamic_check_timer_handlder, pdvobj);
 
 #ifdef CONFIG_MCC_MODE
 	_rtw_mutex_init(&(pdvobj->mcc_objpriv.mcc_mutex));
@@ -1847,6 +2002,40 @@ void devobj_deinit(struct dvobj_priv *pdvobj)
 	rtw_mfree((u8 *)pdvobj, sizeof(*pdvobj));
 }
 
+inline u8 rtw_rtnl_lock_needed(struct dvobj_priv *dvobj)
+{
+	if (dvobj->rtnl_lock_holder && dvobj->rtnl_lock_holder == current)
+		return 0;
+	return 1;
+}
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26))
+static inline int rtnl_is_locked(void)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 17))
+	if (unlikely(rtnl_trylock())) {
+		rtnl_unlock();
+#else
+	if (unlikely(down_trylock(&rtnl_sem) == 0)) {
+		up(&rtnl_sem);
+#endif
+		return 0;
+	}
+	return 1;
+}
+#endif
+
+inline void rtw_set_rtnl_lock_holder(struct dvobj_priv *dvobj, _thread_hdl_ thd_hdl)
+{
+	rtw_warn_on(!rtnl_is_locked());
+
+	if (!thd_hdl || rtnl_is_locked())
+		dvobj->rtnl_lock_holder = thd_hdl;
+
+	if (dvobj->rtnl_lock_holder && 0)
+		RTW_INFO("rtnl_lock_holder: %s:%d\n", current->comm, current->pid);
+}
+
 u8 rtw_reset_drv_sw(_adapter *padapter)
 {
 	u8	ret8 = _SUCCESS;
@@ -1922,7 +2111,8 @@ u8 rtw_init_drv_sw(_adapter *padapter)
 		goto exit;
 	}
 
-	rtw_rfctl_init(padapter);
+	if (is_primary_adapter(padapter))
+		rtw_rfctl_init(padapter);
 
 	if (rtw_init_mlme_priv(padapter) == _FAIL) {
 		ret8 = _FAIL;
@@ -1972,8 +2162,6 @@ u8 rtw_init_drv_sw(_adapter *padapter)
 	/* We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). */
 	/* _rtw_memset((unsigned char *)&padapter->securitypriv, 0, sizeof (struct security_priv)); */
 
-	/* _init_timer(&(padapter->securitypriv.tkip_timer), padapter->pifp, rtw_use_tkipkey_handler, padapter); */
-
 	if (_rtw_init_sta_priv(&padapter->stapriv) == _FAIL) {
 		RTW_INFO("Can't _rtw_init_sta_priv\n");
 		ret8 = _FAIL;
@@ -1984,6 +2172,9 @@ u8 rtw_init_drv_sw(_adapter *padapter)
 	padapter->setband = WIFI_FREQUENCY_BAND_AUTO;
 	padapter->fix_rate = 0xFF;
 	padapter->power_offset = 0;
+	padapter->rsvd_page_offset = 0;
+	padapter->rsvd_page_num = 0;
+
 	padapter->data_fb = 0;
 	padapter->fix_rx_ampdu_accept = RX_AMPDU_ACCEPT_INVALID;
 	padapter->fix_rx_ampdu_size = RX_AMPDU_SIZE_INVALID;
@@ -2055,10 +2246,6 @@ void rtw_cancel_all_timer(_adapter *padapter)
 
 	_cancel_timer_ex(&padapter->mlmepriv.assoc_timer);
 
-#if 0
-	_cancel_timer_ex(&padapter->securitypriv.tkip_timer);
-#endif
-
 	_cancel_timer_ex(&padapter->mlmepriv.scan_to_timer);
 
 #ifdef CONFIG_DFS_MASTER
@@ -2093,6 +2280,11 @@ void rtw_cancel_all_timer(_adapter *padapter)
 #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
 	_cancel_timer_ex(&padapter->recvpriv.signal_stat_timer);
 #endif
+
+#ifdef CONFIG_LPS_RPWM_TIMER
+	_cancel_timer_ex(&(adapter_to_pwrctl(padapter)->pwr_rpwm_timer));
+#endif /* CONFIG_LPS_RPWM_TIMER */
+
 	/* cancel dm timer */
 	rtw_hal_dm_deinit(padapter);
 
@@ -2148,6 +2340,9 @@ u8 rtw_free_drv_sw(_adapter *padapter)
 
 	rtw_free_mlme_priv(&padapter->mlmepriv);
 
+	if (is_primary_adapter(padapter))
+		rtw_rfctl_deinit(padapter);
+
 	/* free_io_queue(padapter); */
 
 	_rtw_free_xmit_priv(&padapter->xmitpriv);
@@ -2229,29 +2424,30 @@ int _netdev_vir_if_open(struct net_device *pnetdev)
 
 	if (padapter->bup == _FALSE && primary_padapter->bup == _TRUE &&
 	    rtw_is_hw_init_completed(primary_padapter)) {
-		padapter->bFWReady = primary_padapter->bFWReady;
 #if 0 /*#ifdef CONFIG_MI_WITH_MBSSID_CAM*/
 		rtw_hal_set_hwreg(padapter, HW_VAR_MAC_ADDR, adapter_mac_addr(padapter)); /* set mac addr to mac register */
 #endif
 
+	}
+
+	if (padapter->bup == _FALSE) {
 		if (rtw_start_drv_threads(padapter) == _FAIL)
 			goto _netdev_virtual_iface_open_error;
+	}
 
 #ifdef CONFIG_RTW_NAPI
-		if(padapter->napi_state == NAPI_DISABLE) {
-			napi_enable(&padapter->napi);
-			padapter->napi_state = NAPI_ENABLE;
-		}
+	if (padapter->napi_state == NAPI_DISABLE) {
+		napi_enable(&padapter->napi);
+		padapter->napi_state = NAPI_ENABLE;
+	}
 #endif
 
 #ifdef CONFIG_IOCTL_CFG80211
-		rtw_cfg80211_init_wiphy(padapter);
-		rtw_cfg80211_init_wdev_data(padapter);
+	rtw_cfg80211_init_wiphy(padapter);
+	rtw_cfg80211_init_wdev_data(padapter);
 #endif
 
-		padapter->bup = _TRUE;
-
-	}
+	padapter->bup = _TRUE;
 
 	padapter->net_closed = _FALSE;
 
@@ -2338,7 +2534,7 @@ static const struct net_device_ops rtw_netdev_vir_if_ops = {
 };
 #endif
 
-void rtw_hook_vir_if_ops(struct net_device *ndev)
+static void rtw_hook_vir_if_ops(struct net_device *ndev)
 {
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29))
 	ndev->netdev_ops = &rtw_netdev_vir_if_ops;
@@ -2448,7 +2644,7 @@ void rtw_drv_stop_vir_if(_adapter *padapter)
 	pnetdev = padapter->pnetdev;
 
 	if (check_fwstate(pmlmepriv, _FW_LINKED))
-		rtw_disassoc_cmd(padapter, 0, _FALSE);
+		rtw_disassoc_cmd(padapter, 0, RTW_CMDF_DIRECTLY);
 
 #ifdef CONFIG_AP_MODE
 	if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) {
@@ -2524,6 +2720,129 @@ void rtw_drv_del_vir_ifaces(_adapter *primary_padapter)
 
 #endif /*end of CONFIG_CONCURRENT_MODE*/
 
+/* IPv4, IPv6 IP addr notifier */
+static int rtw_inetaddr_notifier_call(struct notifier_block *nb,
+				      unsigned long action, void *data)
+{
+	struct in_ifaddr *ifa = (struct in_ifaddr *)data;
+	struct net_device *ndev;
+	struct mlme_ext_priv *pmlmeext = NULL;
+	struct mlme_ext_info *pmlmeinfo = NULL;
+	_adapter *adapter = NULL;
+
+	if (!ifa || !ifa->ifa_dev || !ifa->ifa_dev->dev)
+		return NOTIFY_DONE;
+
+	ndev = ifa->ifa_dev->dev;
+
+	if (!is_rtw_ndev(ndev))
+		return NOTIFY_DONE;
+
+	adapter = (_adapter *)rtw_netdev_priv(ifa->ifa_dev->dev);
+
+	if (adapter == NULL)
+		return NOTIFY_DONE;
+
+	pmlmeext = &adapter->mlmeextpriv;
+	pmlmeinfo = &pmlmeext->mlmext_info;
+
+	switch (action) {
+	case NETDEV_UP:
+		_rtw_memcpy(pmlmeinfo->ip_addr, &ifa->ifa_address,
+					RTW_IP_ADDR_LEN);
+		RTW_DBG("%s[%s]: up IP: %pI4\n", __func__,
+					ifa->ifa_label, pmlmeinfo->ip_addr);
+	break;
+	case NETDEV_DOWN:
+		_rtw_memset(pmlmeinfo->ip_addr, 0, RTW_IP_ADDR_LEN);
+		RTW_DBG("%s[%s]: down IP: %pI4\n", __func__,
+					ifa->ifa_label, pmlmeinfo->ip_addr);
+	break;
+	default:
+		RTW_DBG("%s: default action\n", __func__);
+	break;
+	}
+	return NOTIFY_DONE;
+}
+
+static int rtw_inet6addr_notifier_call(struct notifier_block *nb,
+				       unsigned long action, void *data)
+{
+	struct inet6_ifaddr *inet6_ifa = data;
+	struct net_device *ndev;
+	struct ipv6_addr *_ipv6_addr = NULL;
+	struct pwrctrl_priv *pwrctl = NULL;
+	struct mlme_ext_priv *pmlmeext = NULL;
+	struct mlme_ext_info *pmlmeinfo = NULL;
+	_adapter *adapter = NULL;
+
+	if (!inet6_ifa || !inet6_ifa->idev || !inet6_ifa->idev->dev)
+		return NOTIFY_DONE;
+
+	ndev = inet6_ifa->idev->dev;
+
+	if (!is_rtw_ndev(ndev))
+		return NOTIFY_DONE;
+
+	adapter = (_adapter *)rtw_netdev_priv(inet6_ifa->idev->dev);
+
+	if (adapter == NULL)
+		return NOTIFY_DONE;
+
+	pmlmeext =  &adapter->mlmeextpriv;
+	pmlmeinfo = &pmlmeext->mlmext_info;
+	pwrctl = adapter_to_pwrctl(adapter);
+
+	pmlmeext = &adapter->mlmeextpriv;
+	pmlmeinfo = &pmlmeext->mlmext_info;
+
+	switch (action) {
+	case NETDEV_UP:
+#ifdef CONFIG_WOWLAN
+		pwrctl->wowlan_ns_offload_en = _TRUE;
+#endif
+		_rtw_memcpy(pmlmeinfo->ip6_addr, &inet6_ifa->addr,
+					RTW_IPv6_ADDR_LEN);
+		RTW_DBG("%s: up IPv6 addrs: %pI6\n", __func__,
+					pmlmeinfo->ip6_addr);
+			break;
+	case NETDEV_DOWN:
+#ifdef CONFIG_WOWLAN
+		pwrctl->wowlan_ns_offload_en = _FALSE;
+#endif
+		_rtw_memset(pmlmeinfo->ip6_addr, 0, RTW_IPv6_ADDR_LEN);
+		RTW_DBG("%s: down IPv6 addrs: %pI6\n", __func__,
+					pmlmeinfo->ip6_addr);
+		break;
+	default:
+		RTW_DBG("%s: default action\n", __func__);
+		break;
+	}
+	return NOTIFY_DONE;
+}
+
+static struct notifier_block rtw_inetaddr_notifier = {
+	.notifier_call = rtw_inetaddr_notifier_call
+};
+
+static struct notifier_block rtw_inet6addr_notifier = {
+	.notifier_call = rtw_inet6addr_notifier_call
+};
+
+void rtw_inetaddr_notifier_register(void)
+{
+	RTW_INFO("%s\n", __func__);
+	register_inetaddr_notifier(&rtw_inetaddr_notifier);
+	register_inet6addr_notifier(&rtw_inet6addr_notifier);
+}
+
+void rtw_inetaddr_notifier_unregister(void)
+{
+	RTW_INFO("%s\n", __func__);
+	unregister_inetaddr_notifier(&rtw_inetaddr_notifier);
+	unregister_inet6addr_notifier(&rtw_inet6addr_notifier);
+}
+
 int rtw_os_ndevs_register(struct dvobj_priv *dvobj)
 {
 	int i, status = _SUCCESS;
@@ -2550,6 +2869,11 @@ int rtw_os_ndevs_register(struct dvobj_priv *dvobj)
 		if (adapter) {
 			char *name;
 
+			#ifdef CONFIG_RTW_DYNAMIC_NDEV
+			if (!is_primary_adapter(adapter))
+				continue;
+			#endif
+
 			if (adapter->iface_id == IFACE_ID0)
 				name = regsty->ifname;
 			else if (adapter->iface_id == IFACE_ID1)
@@ -2557,11 +2881,6 @@ int rtw_os_ndevs_register(struct dvobj_priv *dvobj)
 			else
 				name = "wlan%d";
 
-#ifdef CONFIG_CONCURRENT_MODE
-			if (!is_primary_adapter(adapter))
-				rtw_hook_vir_if_ops(adapter->pnetdev);
-#endif /* CONFIG_CONCURRENT_MODE */
-
 			status = rtw_os_ndev_register(adapter, name);
 
 			if (status != _SUCCESS) {
@@ -2802,8 +3121,10 @@ netdev_open_normal_process:
 	{
 		_adapter *sec_adapter = adapter_to_dvobj(padapter)->padapters[IFACE_ID1];
 
+		#ifndef CONFIG_RTW_DYNAMIC_NDEV
 		if (sec_adapter && (sec_adapter->bup == _FALSE))
 			_netdev_vir_if_open(sec_adapter->pnetdev);
+		#endif
 	}
 #endif
 
@@ -2897,7 +3218,6 @@ netdev_open_error:
 	return _FAIL;
 }
 
-
 int rtw_ips_pwr_up(_adapter *padapter)
 {
 	int result;
@@ -2961,7 +3281,6 @@ void rtw_ips_dev_unload(_adapter *padapter)
 
 }
 
-
 int pm_netdev_open(struct net_device *pnetdev, u8 bnormal)
 {
 	int status = 0;
@@ -3022,7 +3341,7 @@ static int netdev_close(struct net_device *pnetdev)
 #ifndef CONFIG_ANDROID
 		/* s2. */
 		LeaveAllPowerSaveMode(padapter);
-		rtw_disassoc_cmd(padapter, 500, _FALSE);
+		rtw_disassoc_cmd(padapter, 500, RTW_CMDF_DIRECTLY);
 		/* s2-2.  indicate disconnect to os */
 		rtw_indicate_disconnect(padapter, 0, _FALSE);
 		/* s2-3. */
@@ -3414,6 +3733,14 @@ void rtw_dev_unload(PADAPTER padapter)
 	if (padapter->bup == _TRUE) {
 		RTW_INFO("==> "FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
 
+#ifdef CONFIG_WOWLAN
+#ifdef CONFIG_GPIO_WAKEUP
+		/*default wake up pin change to BT*/
+		RTW_INFO("%s:default wake up pin change to BT\n", __FUNCTION__);
+		rtw_hal_switch_gpio_wl_ctrl(padapter, WAKEUP_GPIO_IDX, _FALSE);
+#endif /* CONFIG_GPIO_WAKEUP */
+#endif /* CONFIG_WOWLAN */
+
 		rtw_set_drv_stopped(padapter);
 #ifdef CONFIG_XMIT_ACK
 		if (padapter->xmitpriv.ack_tx)
@@ -3423,21 +3750,14 @@ void rtw_dev_unload(PADAPTER padapter)
 		rtw_intf_stop(padapter);
 
 
-		if (!pwrctl->bInternalAutoSuspend)
+		if (!pwrctl->bInternalAutoSuspend) {
 			rtw_stop_drv_threads(padapter);
 
-		while (ATOMIC_READ(&(pcmdpriv->cmdthd_running)) == _TRUE) {
-			if (cnt > 5) {
-				RTW_INFO("stop cmdthd timeout\n");
-				break;
-			} else {
-				cnt++;
-				RTW_INFO("cmdthd is running(%d)\n", cnt);
-				rtw_msleep_os(10);
+			if (ATOMIC_READ(&(pcmdpriv->cmdthd_running)) == _TRUE) {
+				RTW_ERR("cmd_thread not stop !!\n");
+				rtw_warn_on(1);
 			}
 		}
-
-
 		/* check the status of IPS */
 		if (rtw_hal_check_ips_status(padapter) == _TRUE || pwrctl->rf_pwrstate == rf_off) { /* check HW status and SW state */
 			RTW_PRINT("%s: driver in IPS-FWLPS\n", __func__);
@@ -3483,22 +3803,26 @@ int rtw_suspend_free_assoc_resource(_adapter *padapter)
 
 	if (rtw_chk_roam_flags(padapter, RTW_ROAM_ON_RESUME)) {
 		if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)
-		    && check_fwstate(pmlmepriv, _FW_LINKED)
-#ifdef CONFIG_P2P
-		    && rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)
-#endif /* CONFIG_P2P */
-		   ) {
+			&& check_fwstate(pmlmepriv, _FW_LINKED)
+			#ifdef CONFIG_P2P
+			&& (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)
+				#if defined(CONFIG_IOCTL_CFG80211) && RTW_P2P_GROUP_INTERFACE
+				|| rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE)
+				#endif
+				)
+			#endif /* CONFIG_P2P */
+		) {
 			RTW_INFO("%s %s(" MAC_FMT "), length:%d assoc_ssid.length:%d\n", __FUNCTION__,
-				 pmlmepriv->cur_network.network.Ssid.Ssid,
+				pmlmepriv->cur_network.network.Ssid.Ssid,
 				MAC_ARG(pmlmepriv->cur_network.network.MacAddress),
-				 pmlmepriv->cur_network.network.Ssid.SsidLength,
-				 pmlmepriv->assoc_ssid.SsidLength);
+				pmlmepriv->cur_network.network.Ssid.SsidLength,
+				pmlmepriv->assoc_ssid.SsidLength);
 			rtw_set_to_roam(padapter, 1);
 		}
 	}
 
 	if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) && check_fwstate(pmlmepriv, _FW_LINKED)) {
-		rtw_disassoc_cmd(padapter, 0, _FALSE);
+		rtw_disassoc_cmd(padapter, 0, RTW_CMDF_DIRECTLY);
 		/* s2-2.  indicate disconnect to os */
 		rtw_indicate_disconnect(padapter, 0, _FALSE);
 	}
@@ -3557,16 +3881,21 @@ int rtw_suspend_wow(_adapter *padapter)
 #endif
 
 	if (pwrpriv->wowlan_mode == _TRUE) {
-#ifdef CONFIG_BT_COEXIST
-		rtw_btcoex_SuspendNotify(padapter, BTCOEX_SUSPEND_STATE_SUSPEND_KEEP_ANT);
-#endif
-
 		if (pnetdev)
 			rtw_netif_stop_queue(pnetdev);
 		rtw_mi_buddy_netif_stop_queue(padapter, _TRUE);
 
 		/* 0. Power off LED */
 		rtw_led_control(padapter, LED_CTL_POWER_OFF);
+
+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
+		/* 2.only for SDIO disable interrupt */
+		rtw_intf_stop(padapter);
+
+		/* 2.1 clean interrupt */
+		rtw_hal_clear_interrupt(padapter);
+#endif /* CONFIG_SDIO_HCI */
+
 		/* 1. stop thread */
 		rtw_set_drv_stopped(padapter);	/*for stop thread*/
 		for (i = 0; i < dvobj->iface_nums; i++) {
@@ -3580,14 +3909,6 @@ int rtw_suspend_wow(_adapter *padapter)
 		/* rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "WOWLAN"); */
 		/* #endif */
 
-#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
-		/* 2. disable interrupt */
-		rtw_mi_intf_stop(padapter);
-
-		/* 2.1 clean interupt */
-		rtw_hal_clear_interrupt(padapter);
-#endif /* CONFIG_SDIO_HCI */
-
 		/* 2.2 free irq */
 		/* sdio_free_irq(adapter_to_dvobj(padapter)); */
 #if !(CONFIG_RTW_SDIO_KEEP_IRQ)
@@ -3643,6 +3964,10 @@ int rtw_suspend_wow(_adapter *padapter)
 		}
 #endif
 
+#ifdef CONFIG_BT_COEXIST
+		rtw_btcoex_SuspendNotify(padapter, BTCOEX_SUSPEND_STATE_SUSPEND_KEEP_ANT);
+#endif
+
 #ifdef CONFIG_CONCURRENT_MODE
 		rtw_mi_buddy_suspend_free_assoc_resource(padapter);
 #endif
@@ -3655,8 +3980,12 @@ int rtw_suspend_wow(_adapter *padapter)
 #endif
 		}
 #ifdef CONFIG_LPS
-		else
-			rtw_set_ps_mode(padapter, PS_MODE_MAX, 0, 0, "WOWLAN");
+		else {
+			if (!(pwrpriv->wowlan_dis_lps)) {
+				rtw_wow_lps_level_decide(padapter, _TRUE);
+				rtw_set_ps_mode(padapter, PS_MODE_MAX, 0, 0, "WOWLAN");
+			}
+		}
 #endif /* #ifdef CONFIG_LPS */
 
 	} else
@@ -3687,14 +4016,18 @@ int rtw_suspend_ap_wow(_adapter *padapter)
 
 	RTW_INFO("wowlan_ap_mode: %d\n", pwrpriv->wowlan_ap_mode);
 
-#ifdef CONFIG_BT_COEXIST
-	rtw_btcoex_SuspendNotify(padapter, BTCOEX_SUSPEND_STATE_SUSPEND_KEEP_ANT);
-#endif
-
 	rtw_mi_netif_stop_queue(padapter, _FALSE);
 
 	/* 0. Power off LED */
 	rtw_led_control(padapter, LED_CTL_POWER_OFF);
+#ifdef CONFIG_SDIO_HCI
+	/* 2.only for SDIO disable interrupt*/
+	rtw_intf_stop(padapter);
+
+	/* 2.1 clean interrupt */
+	rtw_hal_clear_interrupt(padapter);
+#endif /* CONFIG_SDIO_HCI */
+
 	/* 1. stop thread */
 	rtw_set_drv_stopped(padapter);	/*for stop thread*/
 	for (i = 0; i < dvobj->iface_nums; i++) {
@@ -3704,14 +4037,6 @@ int rtw_suspend_ap_wow(_adapter *padapter)
 	}
 	rtw_clr_drv_stopped(padapter);	/*for 32k command*/
 
-#ifdef CONFIG_SDIO_HCI
-	/* 2. disable interrupt*/
-	rtw_mi_intf_stop(padapter);
-
-	/* 2.1 clean interupt */
-	rtw_hal_clear_interrupt(padapter);
-#endif /* CONFIG_SDIO_HCI */
-
 	/* 2.2 free irq */
 	if (padapter->intf_free_irq)
 		padapter->intf_free_irq(adapter_to_dvobj(padapter));
@@ -3743,6 +4068,10 @@ int rtw_suspend_ap_wow(_adapter *padapter)
 	}
 #endif
 
+#ifdef CONFIG_BT_COEXIST
+	rtw_btcoex_SuspendNotify(padapter, BTCOEX_SUSPEND_STATE_SUSPEND_KEEP_ANT);
+#endif
+
 	/*FOR ONE AP - TODO :Multi-AP*/
 	{
 		int i;
@@ -3760,7 +4089,10 @@ int rtw_suspend_ap_wow(_adapter *padapter)
 	}
 
 #ifdef CONFIG_LPS
-	rtw_set_ps_mode(padapter, PS_MODE_MIN, 0, 0, "AP-WOWLAN");
+	if (!(pwrpriv->wowlan_dis_lps)) {
+		rtw_wow_lps_level_decide(padapter, _TRUE);
+		rtw_set_ps_mode(padapter, PS_MODE_MIN, 0, 0, "AP-WOWLAN");
+	}
 #endif
 
 	RTW_INFO("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter));
@@ -3793,7 +4125,9 @@ int rtw_suspend_normal(_adapter *padapter)
 
 
 #ifdef CONFIG_CONCURRENT_MODE
-	rtw_mi_buddy_dev_unload(padapter);
+	rtw_set_drv_stopped(padapter);	/*for stop thread*/
+	rtw_stop_cmd_thread(padapter);
+	rtw_drv_stop_vir_ifaces(adapter_to_dvobj(padapter));
 #endif
 	rtw_dev_unload(padapter);
 
@@ -3851,7 +4185,6 @@ int rtw_suspend_common(_adapter *padapter)
 
 	rtw_mi_cancel_all_timer(padapter);
 	LeaveAllPowerSaveModeDirect(padapter);
-	rtw_stop_cmd_thread(padapter);
 
 	rtw_ps_deny_cancel(padapter, PS_DENY_SUSPEND);
 
@@ -3936,15 +4269,18 @@ int rtw_resume_process_wow(_adapter *padapter)
 
 	if (pwrpriv->wowlan_mode == _TRUE) {
 #ifdef CONFIG_LPS
-		rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "WOWLAN");
+		if (!(pwrpriv->wowlan_dis_lps)) {
+			rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "WOWLAN");
+			rtw_wow_lps_level_decide(padapter, _FALSE);
+		}
 #endif /* CONFIG_LPS */
 
 		pwrpriv->bFwCurrentInPSMode = _FALSE;
 
-#ifdef CONFIG_SDIO_HCI
+#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_PCI_HCI)
 		rtw_mi_intf_stop(padapter);
 		rtw_hal_clear_interrupt(padapter);
-#endif /* CONFIG_SDIO_HCI */
+#endif
 
 #if !(CONFIG_RTW_SDIO_KEEP_IRQ)
 		/* if (sdio_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS) {		 */
@@ -4021,15 +4357,9 @@ int rtw_resume_process_wow(_adapter *padapter)
 		rtw_lock_ext_suspend_timeout(8000);
 
 	if (pwrpriv->wowlan_wake_reason == RX_PNO) {
-#ifdef CONFIG_IOCTL_CFG80211
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 2, 0))
-		u8 locally_generated = 1;
-
-		cfg80211_disconnected(padapter->pnetdev, 0, NULL, 0, locally_generated, GFP_ATOMIC);
-#else
-		cfg80211_disconnected(padapter->pnetdev, 0, NULL, 0, GFP_ATOMIC);
-#endif
-#endif /* CONFIG_IOCTL_CFG80211 */
+		#ifdef CONFIG_IOCTL_CFG80211
+		rtw_cfg80211_disconnected(padapter->rtw_wdev, 0, NULL, 0, 1, GFP_ATOMIC);
+		#endif
 		rtw_lock_ext_suspend_timeout(10000);
 	}
 
@@ -4094,7 +4424,10 @@ int rtw_resume_process_ap_wow(_adapter *padapter)
 
 
 #ifdef CONFIG_LPS
-	rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "AP-WOWLAN");
+	if (!(pwrpriv->wowlan_dis_lps)) {
+		rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "AP-WOWLAN");
+		rtw_wow_lps_level_decide(padapter, _FALSE);
+	}
 #endif /* CONFIG_LPS */
 
 	pwrpriv->bFwCurrentInPSMode = _FALSE;
@@ -4145,7 +4478,7 @@ int rtw_resume_process_ap_wow(_adapter *padapter)
 			iface = dvobj->padapters[i];
 			if ((iface) && rtw_is_adapter_up(iface)) {
 				if (check_fwstate(&iface->mlmepriv, WIFI_AP_STATE | _FW_LINKED))
-					rtw_mi_buddy_reset_drv_sw(iface);
+					rtw_reset_drv_sw(iface);
 			}
 		}
 
@@ -4243,6 +4576,7 @@ int rtw_resume_process_normal(_adapter *padapter)
 		ret = -1;
 		goto exit;
 	}
+	rtw_clr_surprise_removed(padapter);
 	rtw_hal_disable_interrupt(padapter);
 #if !(CONFIG_RTW_SDIO_KEEP_IRQ)
 	/* if (sdio_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS) */
@@ -4317,9 +4651,7 @@ int rtw_resume_common(_adapter *padapter)
 
 	if (pwrpriv) {
 		pwrpriv->bInSuspend = _FALSE;
-#ifdef CONFIG_WOWLAN
 		pwrpriv->wowlan_in_resume = _FALSE;
-#endif
 	}
 	RTW_PRINT("%s:%d in %d ms\n", __FUNCTION__ , ret,
 		  rtw_get_passing_time_ms(start_time));
@@ -4366,3 +4698,23 @@ int rtw_disable_gpio_interrupt(struct net_device *netdev, int gpio_num)
 EXPORT_SYMBOL(rtw_disable_gpio_interrupt);
 
 #endif /* #ifdef CONFIG_GPIO_API */
+
+#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE
+
+int rtw_vendor_ie_get_api(struct net_device *dev, int ie_num, char *extra,
+		u16 extra_len)
+{
+	int ret = 0;
+
+	ret = rtw_vendor_ie_get_raw_data(dev, ie_num, extra, extra_len);
+	return ret;
+}
+EXPORT_SYMBOL(rtw_vendor_ie_get_api);
+
+int rtw_vendor_ie_set_api(struct net_device *dev, char *extra)
+{
+	return rtw_vendor_ie_set(dev, NULL, NULL, extra);
+}
+EXPORT_SYMBOL(rtw_vendor_ie_set_api);
+
+#endif
diff --git a/rtl8822BU/os_dep/linux/recv_linux.c b/rtl8822BU/os_dep/linux/recv_linux.c
index ae9e214..2541885 100755..100644
--- a/rtl8822BU/os_dep/linux/recv_linux.c
+++ b/rtl8822BU/os_dep/linux/recv_linux.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _RECV_OSDEP_C_
 
 #include <drv_types.h>
@@ -327,8 +322,8 @@ _pkt *rtw_os_alloc_msdu_pkt(union recv_frame *prframe, u16 nSubframe_Length, u8
 	     _rtw_memcmp(sub_skb->data, rtw_bridge_tunnel_header, SNAP_SIZE))) {
 		/* remove RFC1042 or Bridge-Tunnel encapsulation and replace EtherType */
 		skb_pull(sub_skb, SNAP_SIZE);
-		_rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pattrib->src, ETH_ALEN);
-		_rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pattrib->dst, ETH_ALEN);
+		_rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pdata+6, ETH_ALEN);
+		_rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pdata, ETH_ALEN);
 	} else {
 		u16 len;
 		/* Leave Ethernet header part of hdr and full payload */
@@ -391,7 +386,11 @@ int rtw_recv_napi_poll(struct napi_struct *napi, int budget)
 
 	work_done = napi_recv(padapter, budget);
 	if (work_done < budget) {
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0))
+		napi_complete_done(napi, work_done);
+#else
 		napi_complete(napi);
+#endif
 		if (!skb_queue_empty(&precvpriv->rx_napi_skb_queue))
 			napi_schedule(napi);
 	}
@@ -871,17 +870,4 @@ void rtw_os_read_port(_adapter *padapter, struct recv_buf *precvbuf)
 #endif
 
 }
-void _rtw_reordering_ctrl_timeout_handler(void *FunctionContext);
-void _rtw_reordering_ctrl_timeout_handler(void *FunctionContext)
-{
-	struct recv_reorder_ctrl *preorder_ctrl = (struct recv_reorder_ctrl *)FunctionContext;
-	rtw_reordering_ctrl_timeout_handler(preorder_ctrl);
-}
-
-void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl)
-{
-	_adapter *padapter = preorder_ctrl->padapter;
-
-	_init_timer(&(preorder_ctrl->reordering_ctrl_timer), padapter->pnetdev, _rtw_reordering_ctrl_timeout_handler, preorder_ctrl);
 
-}
diff --git a/rtl8822BU/os_dep/linux/rtw_android.c b/rtl8822BU/os_dep/linux/rtw_android.c
index 5907a00..c8eeca3 100755..100644
--- a/rtl8822BU/os_dep/linux/rtw_android.c
+++ b/rtl8822BU/os_dep/linux/rtw_android.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifdef CONFIG_GPIO_WAKEUP
 #include <linux/gpio.h>
@@ -593,7 +588,11 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd)
 		goto exit;
 	}
 #ifdef CONFIG_COMPAT
+#if (KERNEL_VERSION(4, 6, 0) > LINUX_VERSION_CODE)
 	if (is_compat_task()) {
+#else
+	if (in_compat_syscall()) {
+#endif
 		/* User space is 32-bit, use compat ioctl */
 		compat_android_wifi_priv_cmd compat_priv_cmd;
 
@@ -1052,8 +1051,8 @@ static int wifi_probe(struct platform_device *pdev)
 		wifi_wake_gpio = wifi_irqres->start;
 
 #ifdef CONFIG_GPIO_WAKEUP
-	printk("%s: gpio:%d wifi_wake_gpio:%d\n", __func__,
-	       wifi_irqres->start, wifi_wake_gpio);
+	RTW_INFO("%s: gpio:%d wifi_wake_gpio:%d\n", __func__,
+	       (int)wifi_irqres->start, wifi_wake_gpio);
 
 	if (wifi_wake_gpio > 0) {
 #ifdef CONFIG_PLATFORM_INTEL_BYT
@@ -1063,10 +1062,10 @@ static int wifi_probe(struct platform_device *pdev)
 		gpio_direction_input(wifi_wake_gpio);
 		oob_irq = gpio_to_irq(wifi_wake_gpio);
 #endif /* CONFIG_PLATFORM_INTEL_BYT */
-		printk("%s oob_irq:%d\n", __func__, oob_irq);
+		RTW_INFO("%s oob_irq:%d\n", __func__, oob_irq);
 	} else if (wifi_irqres) {
 		oob_irq = wifi_irqres->start;
-		printk("%s oob_irq:%d\n", __func__, oob_irq);
+		RTW_INFO("%s oob_irq:%d\n", __func__, oob_irq);
 	}
 #endif
 	wifi_control_data = wifi_ctrl;
@@ -1095,6 +1094,14 @@ static void shutdown_card(void)
 	LeaveAllPowerSaveMode(g_test_adapter);
 #endif /* CONFIG_FWLPS_IN_IPS */
 
+#ifdef CONFIG_WOWLAN
+#ifdef CONFIG_GPIO_WAKEUP
+	/*default wake up pin change to BT*/
+	RTW_INFO("%s:default wake up pin change to BT\n", __FUNCTION__);
+	rtw_hal_switch_gpio_wl_ctrl(g_test_adapter, WAKEUP_GPIO_IDX, _FALSE);
+#endif /* CONFIG_GPIO_WAKEUP */
+#endif /* CONFIG_WOWLAN */
+
 	/* Leave SDIO HCI Suspend */
 	addr = 0x10250086;
 	rtw_write8(g_test_adapter, addr, 0);
diff --git a/rtl8822BU/os_dep/linux/rtw_cfgvendor.c b/rtl8822BU/os_dep/linux/rtw_cfgvendor.c
index f7e6b09..79e3f98 100755..100644
--- a/rtl8822BU/os_dep/linux/rtw_cfgvendor.c
+++ b/rtl8822BU/os_dep/linux/rtw_cfgvendor.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2014 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #include <drv_types.h>
 
@@ -44,12 +39,9 @@
 
 #ifdef DBG_MEM_ALLOC
 extern bool match_mstat_sniff_rules(const enum mstat_f flags, const size_t size);
-struct sk_buff *dbg_rtw_cfg80211_vendor_event_alloc(struct wiphy *wiphy, int len, int event_id, gfp_t gfp
+struct sk_buff *dbg_rtw_cfg80211_vendor_event_alloc(struct wiphy *wiphy, struct wireless_dev *wdev, int len, int event_id, gfp_t gfp
 		, const enum mstat_f flags, const char *func, const int line)
 {
-	_adapter *padapter = wiphy_to_adapter(wiphy);
-	struct wireless_dev *wdev = padapter->rtw_wdev;
-
 	struct sk_buff *skb;
 	unsigned int truesize = 0;
 
@@ -134,8 +126,8 @@ int dbg_rtw_cfg80211_vendor_cmd_reply(struct sk_buff *skb
 	return ret;
 }
 
-#define rtw_cfg80211_vendor_event_alloc(wiphy, len, event_id, gfp) \
-	dbg_rtw_cfg80211_vendor_event_alloc(wiphy, len, event_id, gfp, MSTAT_FUNC_CFG_VENDOR | MSTAT_TYPE_SKB, __FUNCTION__, __LINE__)
+#define rtw_cfg80211_vendor_event_alloc(wiphy, wdev, len, event_id, gfp) \
+	dbg_rtw_cfg80211_vendor_event_alloc(wiphy, wdev, len, event_id, gfp, MSTAT_FUNC_CFG_VENDOR | MSTAT_TYPE_SKB, __FUNCTION__, __LINE__)
 
 #define rtw_cfg80211_vendor_event(skb, gfp) \
 	dbg_rtw_cfg80211_vendor_event(skb, gfp, MSTAT_FUNC_CFG_VENDOR | MSTAT_TYPE_SKB, __FUNCTION__, __LINE__)
@@ -148,10 +140,8 @@ int dbg_rtw_cfg80211_vendor_cmd_reply(struct sk_buff *skb
 #else
 
 struct sk_buff *rtw_cfg80211_vendor_event_alloc(
-	struct wiphy *wiphy, int len, int event_id, gfp_t gfp)
+	struct wiphy *wiphy, struct wireless_dev *wdev, int len, int event_id, gfp_t gfp)
 {
-	_adapter *padapter = wiphy_to_adapter(wiphy);
-	struct wireless_dev *wdev = padapter->rtw_wdev;
 	struct sk_buff *skb;
 
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 1, 0))
@@ -187,7 +177,7 @@ int rtw_cfgvendor_send_async_event(struct wiphy *wiphy,
 	kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL;
 
 	/* Alloc the SKB for vendor_event */
-	skb = rtw_cfg80211_vendor_event_alloc(wiphy, len, event_id, kflags);
+	skb = rtw_cfg80211_vendor_event_alloc(wiphy, ndev_to_wdev(dev), len, event_id, kflags);
 	if (!skb) {
 		RTW_ERR(FUNC_NDEV_FMT" skb alloc failed", FUNC_NDEV_ARG(dev));
 		return -ENOMEM;
@@ -393,7 +383,7 @@ int wl_cfgvendor_send_hotlist_event(struct wiphy *wiphy,
 		kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL;
 
 		/* Alloc the SKB for vendor_event */
-		skb = rtw_cfg80211_vendor_event_alloc(wiphy, malloc_len, event, kflags);
+		skb = rtw_cfg80211_vendor_event_alloc(wiphy, ndev_to_wdev(dev), malloc_len, event, kflags);
 		if (!skb) {
 			WL_ERR(("skb alloc failed"));
 			return -ENOMEM;
@@ -925,7 +915,7 @@ void wl_cfgvendor_rtt_evt(void *ctx, void *rtt_data)
 	rtt_list = (struct list_head *)rtt_data;
 	kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL;
 	/* Alloc the SKB for vendor_event */
-	skb = rtw_cfg80211_vendor_event_alloc(wiphy, tot_len, GOOGLE_RTT_COMPLETE_EVENT, kflags);
+	skb = rtw_cfg80211_vendor_event_alloc(wiphy, wdev, tot_len, GOOGLE_RTT_COMPLETE_EVENT, kflags);
 	if (!skb) {
 		WL_ERR(("skb alloc failed"));
 		goto exit;
diff --git a/rtl8822BU/os_dep/linux/rtw_cfgvendor.h b/rtl8822BU/os_dep/linux/rtw_cfgvendor.h
index 2ed3a9e..9f36e9f 100755..100644
--- a/rtl8822BU/os_dep/linux/rtw_cfgvendor.h
+++ b/rtl8822BU/os_dep/linux/rtw_cfgvendor.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2014 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #ifndef _RTW_CFGVENDOR_H_
 #define _RTW_CFGVENDOR_H_
diff --git a/rtl8822BU/os_dep/linux/rtw_proc.c b/rtl8822BU/os_dep/linux/rtw_proc.c
index a1e4f34..38ae3b2 100755..100644
--- a/rtl8822BU/os_dep/linux/rtw_proc.c
+++ b/rtl8822BU/os_dep/linux/rtw_proc.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #include <linux/ctype.h>	/* tolower() */
 #include <drv_types.h>
@@ -371,8 +366,36 @@ static int proc_get_sdio_local_reg_dump(struct seq_file *m, void *v)
 
 	return 0;
 }
+static int proc_get_sdio_card_info(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+
+	dump_sdio_card_info(m, adapter_to_dvobj(adapter));
+
+	return 0;
+}
 #endif /* CONFIG_SDIO_HCI */
 
+#ifdef RTW_HALMAC
+#include "../../hal/hal_halmac.h"
+static int proc_get_halmac_info(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+
+	rtw_dump_halmac_info(m);
+	return 0;
+}
+#endif
+static int proc_get_fw_info(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+
+	rtw_dump_fw_info(m, adapter);
+	return 0;
+}
 static int proc_get_mac_reg_dump(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
@@ -432,15 +455,6 @@ static int proc_get_dump_adapters_status(struct seq_file *m, void *v)
 
 	return 0;
 }
-static int proc_get_dump_adapters_info(struct seq_file *m, void *v)
-{
-	struct net_device *dev = m->private;
-	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
-
-	dump_adapters_info(m, adapter_to_dvobj(adapter));
-
-	return 0;
-}
 
 #ifdef CONFIG_RTW_CUSTOMER_STR
 static int proc_get_customer_str(struct seq_file *m, void *v)
@@ -550,6 +564,78 @@ static ssize_t proc_set_gpio(struct file *file, const char __user *buffer, size_
 	return count;
 }
 #endif
+
+#ifdef	CONFIG_CHNL_LOAD_MAGT
+static ssize_t proc_set_clm_result(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct	mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
+
+	char tmp[32] = {0};
+	int clm_flag = 0;
+	int clm_scan_ms = SURVEY_TO;
+	u16	*clm_period  = &pHalData->clm_period;
+
+	RTW_INFO("DBG_RX_SEQ %s\n", __FUNCTION__);
+
+	if (count < 1) {
+		RTW_INFO(FUNC_ADPT_FMT ": input length is 0!\n", FUNC_ADPT_ARG(padapter));
+		return -EFAULT;
+	}
+	if (count > sizeof(tmp)) {
+		RTW_INFO(FUNC_ADPT_FMT ": input length is too large\n", FUNC_ADPT_ARG(padapter));
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+		int num = sscanf(tmp, "%d %d", &clm_flag, &clm_scan_ms);
+
+		if (num < 2) {
+			RTW_INFO("argument size is less than 2\n");
+			goto exit;
+		}
+		RTW_INFO(" clm_flag = %d clm_scan_ms =%d\n", clm_flag, clm_scan_ms);
+
+		padapter->clm_flag = (BOOLEAN)clm_flag;
+		RTW_INFO("clm feature on or off = %d\n", (int)padapter->clm_flag);
+		if (clm_flag == TRUE) {
+			if (clm_scan_ms > 200 || clm_scan_ms < 6) {
+				RTW_INFO("clm scan time need between 6 ~ 200ms\n");
+				goto exit;
+			}
+			if (clm_scan_ms > 5 && clm_scan_ms <= 200)
+				*clm_period = (u16)((clm_scan_ms - 5)*1000/4);
+			pmlmeext->sitesurvey_res.scan_ch_ms = (u16)clm_scan_ms;
+
+			RTW_INFO("clm_period = %u\n", pHalData->clm_period);
+
+		}
+	}
+exit:
+	return count;
+}
+static int proc_get_clm_result(struct seq_file *m, void *v)
+{
+
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
+	struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
+	u32 i;
+
+		for (i = 0; i < rfctl->max_chan_nums ; i++) {
+			if (hal_data->clm_period != 0)
+				RTW_PRINT_SEL(m, "clm_period = %6u;clm_result =%6d ;channel %3d = %3d %%\n", hal_data->clm_period, hal_data->clm_result[i], rfctl->channel_set[i].ChannelNum, (hal_data->clm_result[i]*100/hal_data->clm_period));
+			/* "x*100"  to show by percentage*/
+		}
+	return 0;
+}
+#endif
+
 static ssize_t proc_set_rx_info_msg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
 {
 
@@ -723,6 +809,88 @@ static ssize_t proc_set_linked_info_dump(struct file *file, const char __user *b
 	return count;
 }
 
+static int proc_get_turboedca_ctrl(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter);
+
+	if (hal_data)
+		RTW_PRINT_SEL(m, "Turbo-EDCA :%s\n", (hal_data->dis_turboedca) ? "Disable" : "Enable");
+
+	return 0;
+}
+
+static ssize_t proc_set_turboedca_ctrl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter);
+
+	char tmp[32] = {0};
+	int mode = 0, num = 0;
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp))
+		return -EFAULT;
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+
+		num	= sscanf(tmp, "%d ", &mode);
+
+		if (num != 1) {
+			RTW_INFO("argument number is wrong\n");
+			return -EFAULT;
+		}
+		hal_data->dis_turboedca = mode;
+	}
+	return count;
+}
+#ifdef CONFIG_WOWLAN
+static int proc_get_wow_lps_ctrl(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
+
+	if (pwrctl)
+		RTW_PRINT_SEL(m, "WOW lps :%s\n", (pwrctl->wowlan_dis_lps) ? "Disable" : "Enable");
+
+	return 0;
+}
+
+static ssize_t proc_set_wow_lps_ctrl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
+
+	char tmp[32] = {0};
+	int mode = 0, num = 0;
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp))
+		return -EFAULT;
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+
+		num	= sscanf(tmp, "%d ", &mode);
+
+		if (num != 1) {
+			RTW_INFO("argument number is wrong\n");
+			return -EFAULT;
+		}
+		pwrctl->wowlan_dis_lps = mode;
+		RTW_INFO("WOW lps :%s\n", (pwrctl->wowlan_dis_lps) ? "Disable" : "Enable");
+	}
+	return count;
+}
+#endif
+
 static int proc_get_mac_qinfo(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
@@ -788,9 +956,10 @@ static int proc_get_country_code(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
 	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
 
-	if (adapter->mlmepriv.country_ent)
-		dump_country_chplan(m, adapter->mlmepriv.country_ent);
+	if (rfctl->country_ent)
+		dump_country_chplan(m, rfctl->country_ent);
 	else
 		RTW_PRINT_SEL(m, "unspecified\n");
 
@@ -985,8 +1154,7 @@ ssize_t proc_set_update_non_ocp(struct file *file, const char __user *buffer, si
 {
 	struct net_device *dev = data;
 	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
-	struct mlme_priv *mlme = &adapter->mlmepriv;
-	struct mlme_ext_priv *mlmeext = &adapter->mlmeextpriv;
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
 	char tmp[32];
 	u8 ch, bw = CHANNEL_WIDTH_20, offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
 	int ms = -1;
@@ -1007,10 +1175,10 @@ ssize_t proc_set_update_non_ocp(struct file *file, const char __user *buffer, si
 			goto exit;
 
 		if (bw == CHANNEL_WIDTH_20)
-			rtw_chset_update_non_ocp_ms(mlmeext->channel_set
+			rtw_chset_update_non_ocp_ms(rfctl->channel_set
 				, ch, bw, HAL_PRIME_CHNL_OFFSET_DONT_CARE, ms);
 		else
-			rtw_chset_update_non_ocp_ms(mlmeext->channel_set
+			rtw_chset_update_non_ocp_ms(rfctl->channel_set
 				, ch, bw, offset, ms);
 	}
 
@@ -1090,6 +1258,55 @@ exit:
 }
 #endif /* CONFIG_DFS_MASTER */
 
+#ifdef CONFIG_80211N_HT
+int proc_get_rx_ampdu_size_limit(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+
+	dump_regsty_rx_ampdu_size_limit(m, adapter);
+
+	return 0;
+}
+
+ssize_t proc_set_rx_ampdu_size_limit(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct registry_priv *regsty = adapter_to_regsty(adapter);
+	char tmp[32];
+	u8 nss;
+	u8 limit_by_bw[4] = {0xFF};
+
+	if (count < 1)
+		return -EFAULT;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+		int i;
+		int num = sscanf(tmp, "%hhu %hhu %hhu %hhu %hhu"
+			, &nss, &limit_by_bw[0], &limit_by_bw[1], &limit_by_bw[2], &limit_by_bw[3]);
+
+		if (num < 2)
+			goto exit;
+		if (nss == 0 || nss > 4)
+			goto exit;
+
+		for (i = 0; i < num - 1; i++)
+			regsty->rx_ampdu_sz_limit_by_nss_bw[nss - 1][i] = limit_by_bw[i];
+
+		rtw_rx_ampdu_apply(adapter);
+	}
+
+exit:
+	return count;
+}
+#endif /* CONFIG_80211N_HT */
+
 static int proc_get_udpport(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
@@ -1426,15 +1643,17 @@ static int proc_get_tx_power_by_rate(struct seq_file *m, void *v)
 	return 0;
 }
 
+#ifdef CONFIG_TXPWR_LIMIT
 static int proc_get_tx_power_limit(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
 	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
 
-	dump_tx_power_limit(m, adapter);
+	dump_txpwr_lmt(m, adapter);
 
 	return 0;
 }
+#endif /* CONFIG_TXPWR_LIMIT */
 
 static int proc_get_tx_power_ext_info(struct seq_file *m, void *v)
 {
@@ -2177,13 +2396,12 @@ static int proc_get_trx_share_mode(struct seq_file *m, void *v)
 }
 #endif
 
-
-#if 0 /*ifdef CONFIG_SUPPORT_FIFO_DUMP*/
 static int proc_dump_rsvd_page(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
 	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
-	/*dump rsvd_page*/
+
+	rtw_dump_rsvd_page(m, adapter, adapter->rsvd_page_offset, adapter->rsvd_page_num);
 	return 0;
 }
 static ssize_t proc_set_rsvd_page_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
@@ -2191,7 +2409,7 @@ static ssize_t proc_set_rsvd_page_info(struct file *file, const char __user *buf
 	struct net_device *dev = data;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	char tmp[32];
-	u8 acs_satae = 0;
+	u8 page_offset, page_num;
 
 	if (count < 2)
 		return -EFAULT;
@@ -2201,26 +2419,24 @@ static ssize_t proc_set_rsvd_page_info(struct file *file, const char __user *buf
 		return -EFAULT;
 	}
 	if (buffer && !copy_from_user(tmp, buffer, count)) {
-		/* get page_offset ,page_num
-		int num = sscanf(tmp, "%hhu", &acs_satae);
 
-		if (num < 1)
-			return -EINVAL;
+		int num = sscanf(tmp, "%hhu %hhu", &page_offset, &page_num);
 
-		if (1 == acs_satae)
-			rtw_acs_start(padapter, _TRUE);
-		else
-			rtw_acs_start(padapter, _FALSE);
-		*/
+		if (num < 2)
+			return -EINVAL;
+		padapter->rsvd_page_offset = page_offset;
+		padapter->rsvd_page_num = page_num;
 	}
 	return count;
 }
+
+#ifdef CONFIG_SUPPORT_FIFO_DUMP
 static int proc_dump_fifo(struct seq_file *m, void *v)
 {
 	struct net_device *dev = m->private;
 	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
-	/*dump fifo*/
 
+	rtw_dump_fifo(m, adapter, adapter->fifo_sel, adapter->fifo_addr, adapter->fifo_size);
 	return 0;
 }
 static ssize_t proc_set_fifo_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
@@ -2228,7 +2444,9 @@ static ssize_t proc_set_fifo_info(struct file *file, const char __user *buffer,
 	struct net_device *dev = data;
 	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
 	char tmp[32];
-	u8 acs_satae = 0;
+	u8 fifo_sel = 0;
+	u32 fifo_addr = 0;
+	u32 fifo_size = 0;
 
 	if (count < 3)
 		return -EFAULT;
@@ -2238,18 +2456,15 @@ static ssize_t proc_set_fifo_info(struct file *file, const char __user *buffer,
 		return -EFAULT;
 	}
 	if (buffer && !copy_from_user(tmp, buffer, count)) {
-		/* get fifo_sel, start addr, size
-		int num = sscanf(tmp, "%hhu", &acs_satae);
 
-		if (num < 1)
-			return -EINVAL;
+		int num = sscanf(tmp, "%hhu %x %d", &fifo_sel, &fifo_addr, &fifo_size);
 
-		if (1 == acs_satae)
-			rtw_acs_start(padapter, _TRUE);
-		else
-			rtw_acs_start(padapter, _FALSE);
-		*/
+		if (num < 3)
+			return -EINVAL;
 
+		padapter->fifo_sel = fifo_sel;
+		padapter->fifo_addr = fifo_addr;
+		padapter->fifo_size = fifo_size;
 	}
 	return count;
 }
@@ -2303,6 +2518,54 @@ static int proc_get_napi_info(struct seq_file *m, void *v)
 	return 0;
 }
 
+ssize_t proc_set_dynamic_agg_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
+{
+	struct net_device *dev = data;
+	_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
+	char tmp[32];
+	int enable = 0, i = 0;
+
+	if (count > sizeof(tmp)) {
+		rtw_warn_on(1);
+		return -EFAULT;
+	}
+
+	if (buffer && !copy_from_user(tmp, buffer, count)) {
+
+		struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
+		PADAPTER iface = NULL;
+		int num = sscanf(tmp, "%d", &enable);
+
+		if (num !=  1) {
+			RTW_INFO("invalid parameter!\n");
+			return count;
+		}
+
+		RTW_INFO("dynamic_agg_enable:%d\n", enable);
+
+		for (i = 0; i < dvobj->iface_nums; i++) {
+			iface = dvobj->padapters[i];
+			if (iface)
+				iface->registrypriv.dynamic_agg_enable = enable;
+		}
+
+	}
+
+	return count;
+
+}
+
+static int proc_get_dynamic_agg_enable(struct seq_file *m, void *v)
+{
+	struct net_device *dev = m->private;
+	_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
+	struct registry_priv *pregistrypriv = &adapter->registrypriv;
+
+	RTW_PRINT_SEL(m, "dynamic_agg_enable:%d\n", pregistrypriv->dynamic_agg_enable);
+
+	return 0;
+}
+
 /*
 * rtw_adapter_proc:
 * init/deinit when register/unregister net_device
@@ -2315,7 +2578,6 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 	RTW_PROC_HDL_SSEQ("read_reg", proc_get_read_reg, proc_set_read_reg),
 	RTW_PROC_HDL_SSEQ("tx_rate_bmp", proc_get_dump_tx_rate_bmp, NULL),
 	RTW_PROC_HDL_SSEQ("adapters_status", proc_get_dump_adapters_status, NULL),
-	RTW_PROC_HDL_SSEQ("adapters_info", proc_get_dump_adapters_info, NULL),
 #ifdef CONFIG_RTW_CUSTOMER_STR
 	RTW_PROC_HDL_SSEQ("customer_str", proc_get_customer_str, NULL),
 #endif
@@ -2358,11 +2620,13 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 #ifdef CONFIG_SDIO_HCI
 	RTW_PROC_HDL_SSEQ("sd_f0_reg_dump", proc_get_sd_f0_reg_dump, NULL),
 	RTW_PROC_HDL_SSEQ("sdio_local_reg_dump", proc_get_sdio_local_reg_dump, NULL),
+	RTW_PROC_HDL_SSEQ("sdio_card_info", proc_get_sdio_card_info, NULL),
 #endif /* CONFIG_SDIO_HCI */
 
 	RTW_PROC_HDL_SSEQ("fwdl_test_case", NULL, proc_set_fwdl_test_case),
 	RTW_PROC_HDL_SSEQ("del_rx_ampdu_test_case", NULL, proc_set_del_rx_ampdu_test_case),
 	RTW_PROC_HDL_SSEQ("wait_hiq_empty", NULL, proc_set_wait_hiq_empty),
+	RTW_PROC_HDL_SSEQ("sta_linking_test", NULL, proc_set_sta_linking_test),
 
 	RTW_PROC_HDL_SSEQ("mac_reg_dump", proc_get_mac_reg_dump, NULL),
 	RTW_PROC_HDL_SSEQ("bb_reg_dump", proc_get_bb_reg_dump, NULL),
@@ -2389,6 +2653,7 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 	RTW_PROC_HDL_SSEQ("bw_mode", proc_get_bw_mode, proc_set_bw_mode),
 	RTW_PROC_HDL_SSEQ("ampdu_enable", proc_get_ampdu_enable, proc_set_ampdu_enable),
 	RTW_PROC_HDL_SSEQ("rx_ampdu", proc_get_rx_ampdu, proc_set_rx_ampdu),
+	RTW_PROC_HDL_SSEQ("rx_ampdu_size_limit", proc_get_rx_ampdu_size_limit, proc_set_rx_ampdu_size_limit),
 	RTW_PROC_HDL_SSEQ("rx_ampdu_factor", proc_get_rx_ampdu_factor, proc_set_rx_ampdu_factor),
 	RTW_PROC_HDL_SSEQ("rx_ampdu_density", proc_get_rx_ampdu_density, proc_set_rx_ampdu_density),
 	RTW_PROC_HDL_SSEQ("tx_ampdu_density", proc_get_tx_ampdu_density, proc_set_tx_ampdu_density),
@@ -2397,6 +2662,7 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 	RTW_PROC_HDL_SSEQ("tx_amsdu_rate", proc_get_tx_amsdu_rate, proc_set_tx_amsdu_rate),
 #endif
 #endif /* CONFIG_80211N_HT */
+	RTW_PROC_HDL_SSEQ("tx_max_agg_num", proc_get_tx_max_agg_num, proc_set_tx_max_agg_num),
 
 	RTW_PROC_HDL_SSEQ("en_fwps", proc_get_en_fwps, proc_set_en_fwps),
 	RTW_PROC_HDL_SSEQ("mac_rptbuf", proc_get_mac_rptbuf, NULL),
@@ -2410,6 +2676,9 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 	RTW_PROC_HDL_SSEQ("btinfo_evt", NULL, proc_set_btinfo_evt),
 	RTW_PROC_HDL_SSEQ("btreg_read", proc_get_btreg_read, proc_set_btreg_read),
 	RTW_PROC_HDL_SSEQ("btreg_write", proc_get_btreg_write, proc_set_btreg_write),
+#ifdef CONFIG_RF4CE_COEXIST
+	RTW_PROC_HDL_SSEQ("rf4ce_state", proc_get_rf4ce_state, proc_set_rf4ce_state),
+#endif
 #endif /* CONFIG_BT_COEXIST */
 
 #if defined(DBG_CONFIG_ERROR_DETECT)
@@ -2417,8 +2686,12 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 #endif /* DBG_CONFIG_ERROR_DETECT */
 	RTW_PROC_HDL_SSEQ("trx_info_debug", proc_get_trx_info_debug, NULL),
 	RTW_PROC_HDL_SSEQ("linked_info_dump", proc_get_linked_info_dump, proc_set_linked_info_dump),
+	RTW_PROC_HDL_SSEQ("dis_turboedca", proc_get_turboedca_ctrl, proc_set_turboedca_ctrl),
 	RTW_PROC_HDL_SSEQ("tx_info_msg", proc_get_tx_info_msg, NULL),
 	RTW_PROC_HDL_SSEQ("rx_info_msg", proc_get_rx_info_msg, proc_set_rx_info_msg),
+#ifdef	CONFIG_CHNL_LOAD_MAGT
+	RTW_PROC_HDL_SSEQ("clm_result", proc_get_clm_result, proc_set_clm_result),
+#endif
 #ifdef CONFIG_GPIO_API
 	RTW_PROC_HDL_SSEQ("gpio_info", proc_get_gpio, proc_set_gpio),
 	RTW_PROC_HDL_SSEQ("gpio_set_output_value", NULL, proc_set_gpio_output_value),
@@ -2434,6 +2707,7 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 #ifdef CONFIG_PCI_HCI
 	RTW_PROC_HDL_SSEQ("rx_ring", proc_get_rx_ring, NULL),
 	RTW_PROC_HDL_SSEQ("tx_ring", proc_get_tx_ring, NULL),
+	RTW_PROC_HDL_SSEQ("pci_aspm", proc_get_pci_aspm, NULL),
 #endif
 
 #ifdef CONFIG_WOWLAN
@@ -2442,6 +2716,7 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 #ifdef CONFIG_WOW_PATTERN_HW_CAM
 	RTW_PROC_HDL_SSEQ("wow_pattern_cam", proc_dump_pattern_cam, NULL),
 #endif
+	RTW_PROC_HDL_SSEQ("dis_wow_lps", proc_get_wow_lps_ctrl, proc_set_wow_lps_ctrl),
 #endif
 
 #ifdef CONFIG_GPIO_WAKEUP
@@ -2474,7 +2749,9 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 	RTW_PROC_HDL_SSEQ("hal_txpwr_info", proc_get_hal_txpwr_info, NULL),
 	RTW_PROC_HDL_SSEQ("target_tx_power", proc_get_target_tx_power, NULL),
 	RTW_PROC_HDL_SSEQ("tx_power_by_rate", proc_get_tx_power_by_rate, NULL),
+#ifdef CONFIG_TXPWR_LIMIT
 	RTW_PROC_HDL_SSEQ("tx_power_limit", proc_get_tx_power_limit, NULL),
+#endif
 	RTW_PROC_HDL_SSEQ("tx_power_ext_info", proc_get_tx_power_ext_info, proc_set_tx_power_ext_info),
 	RTW_PROC_HDL_SEQ("tx_power_idx", &seq_ops_tx_power_idx, NULL),
 #ifdef CONFIG_RF_POWER_TRIM
@@ -2511,6 +2788,9 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 	RTW_PROC_HDL_SSEQ("skip_band", proc_get_skip_band, proc_set_skip_band),
 	RTW_PROC_HDL_SSEQ("hal_spec", proc_get_hal_spec, NULL),
 
+	RTW_PROC_HDL_SSEQ("rx_stat", proc_get_rx_stat, NULL),
+
+	RTW_PROC_HDL_SSEQ("tx_stat", proc_get_tx_stat, NULL),
 	/**** PHY Capability ****/
 	RTW_PROC_HDL_SSEQ("phy_cap", proc_get_phy_cap, NULL),
 
@@ -2525,10 +2805,25 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = {
 	RTW_PROC_HDL_SSEQ("trx_share_mode", proc_get_trx_share_mode, NULL),
 #endif
 	RTW_PROC_HDL_SSEQ("napi_info", proc_get_napi_info, NULL),
-#if 0 /*#ifdef CONFIG_SUPPORT_FIFO_DUMP*/
 	RTW_PROC_HDL_SSEQ("rsvd_page", proc_dump_rsvd_page, proc_set_rsvd_page_info),
+
+#ifdef CONFIG_SUPPORT_FIFO_DUMP
 	RTW_PROC_HDL_SSEQ("fifo_dump", proc_dump_fifo, proc_set_fifo_info),
 #endif
+	RTW_PROC_HDL_SSEQ("fw_info", proc_get_fw_info, NULL),
+#ifdef RTW_HALMAC
+	RTW_PROC_HDL_SSEQ("halmac_info", proc_get_halmac_info, NULL),
+#endif
+
+#ifdef DBG_XMIT_BLOCK
+	RTW_PROC_HDL_SSEQ("xmit_block", proc_get_xmit_block, proc_set_xmit_block),
+#endif
+
+	RTW_PROC_HDL_SSEQ("ack_timeout", proc_get_ack_timeout, proc_set_ack_timeout),
+
+	RTW_PROC_HDL_SSEQ("dynamic_agg_enable", proc_get_dynamic_agg_enable, proc_set_dynamic_agg_enable),
+	RTW_PROC_HDL_SSEQ("iqk_fw_offload", proc_get_iqk_fw_offload, proc_set_iqk_fw_offload),
+
 };
 
 const int adapter_proc_hdls_num = sizeof(adapter_proc_hdls) / sizeof(struct rtw_proc_hdl);
diff --git a/rtl8822BU/os_dep/linux/rtw_proc.h b/rtl8822BU/os_dep/linux/rtw_proc.h
index 0ab929c..c2c7c8e 100755..100644
--- a/rtl8822BU/os_dep/linux/rtw_proc.h
+++ b/rtl8822BU/os_dep/linux/rtw_proc.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __RTW_PROC_H__
 #define __RTW_PROC_H__
 
diff --git a/rtl8822BU/os_dep/linux/usb_intf.c b/rtl8822BU/os_dep/linux/usb_intf.c
index bb6ed02..cf7ebbe 100755..100644
--- a/rtl8822BU/os_dep/linux/usb_intf.c
+++ b/rtl8822BU/os_dep/linux/usb_intf.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _HCI_INTF_C_
 
 #include <drv_types.h>
@@ -64,8 +59,26 @@ static void rtw_dev_shutdown(struct device *dev)
 		dvobj = usb_get_intfdata(usb_intf);
 		if (dvobj) {
 			adapter = dvobj_get_primary_adapter(dvobj);
-			if (adapter)
-				rtw_set_surprise_removed(adapter);
+			if (adapter) {
+				if (!rtw_is_surprise_removed(adapter)) {
+					struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
+					#ifdef CONFIG_WOWLAN
+					#ifdef CONFIG_GPIO_WAKEUP
+					/*default wake up pin change to BT*/
+					RTW_INFO("%s:default wake up pin change to BT\n", __FUNCTION__);
+					rtw_hal_switch_gpio_wl_ctrl(adapter, WAKEUP_GPIO_IDX, _FALSE);
+					#endif /* CONFIG_GPIO_WAKEUP */
+
+					if (pwrctl->wowlan_mode == _TRUE)
+						RTW_PRINT("%s wowlan_mode ==_TRUE do not run rtw_hal_deinit()\n", __FUNCTION__);
+					else
+					#endif
+					{
+						rtw_hal_deinit(adapter);
+						rtw_set_surprise_removed(adapter);
+					}
+				}
+			}
 			ATOMIC_SET(&dvobj->continual_io_error, MAX_CONTINUAL_IO_ERR + 1);
 		}
 	}
@@ -818,7 +831,7 @@ int rtw_hw_suspend(_adapter *padapter)
 	}
 
 	/* s2. */
-	rtw_disassoc_cmd(padapter, 500, _FALSE);
+	rtw_disassoc_cmd(padapter, 500, RTW_CMDF_DIRECTLY);
 
 	/* s2-2.  indicate disconnect to os */
 	/* rtw_indicate_disconnect(padapter); */
@@ -917,7 +930,7 @@ static int rtw_suspend(struct usb_interface *pusb_intf, pm_message_t message)
 
 #ifdef SUPPORT_HW_RFOFF_DETECTED
 			/* The FW command register update must after MAC and FW init ready. */
-			if ((padapter->bFWReady) && (pwrpriv->bHWPwrPindetect) && (padapter->registrypriv.usbss_enable)) {
+			if ((GET_HAL_DATA(padapter)->bFWReady) && (pwrpriv->bHWPwrPindetect) && (padapter->registrypriv.usbss_enable)) {
 				u8 bOpen = _TRUE;
 				rtw_interface_ps_func(padapter, HAL_USB_SELECT_SUSPEND, &bOpen);
 			}
@@ -979,7 +992,7 @@ int rtw_resume_process(_adapter *padapter)
 	if (pwrpriv->bInternalAutoSuspend) {
 #ifdef SUPPORT_HW_RFOFF_DETECTED
 		/* The FW command register update must after MAC and FW init ready. */
-		if ((padapter->bFWReady) && (pwrpriv->bHWPwrPindetect) && (padapter->registrypriv.usbss_enable)) {
+		if ((GET_HAL_DATA(padapter)->bFWReady) && (pwrpriv->bHWPwrPindetect) && (padapter->registrypriv.usbss_enable)) {
 			u8 bOpen = _FALSE;
 			rtw_interface_ps_func(padapter, HAL_USB_SELECT_SUSPEND, &bOpen);
 		}
@@ -1232,7 +1245,8 @@ _adapter *rtw_usb_primary_adapter_init(struct dvobj_priv *dvobj,
 	rtw_hal_chip_configure(padapter);
 
 	/* step read efuse/eeprom data and get mac_addr */
-	rtw_hal_read_chip_info(padapter);
+	if (rtw_hal_read_chip_info(padapter) == _FAIL)
+		goto free_hal_data;
 
 	/* step 5. */
 	if (rtw_init_drv_sw(padapter) == _FAIL) {
@@ -1333,7 +1347,7 @@ static void rtw_usb_primary_adapter_deinit(_adapter *padapter)
 	RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
 
 	if (check_fwstate(pmlmepriv, _FW_LINKED))
-		rtw_disassoc_cmd(padapter, 0, _FALSE);
+		rtw_disassoc_cmd(padapter, 0, RTW_CMDF_DIRECTLY);
 
 #ifdef CONFIG_AP_MODE
 	if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) {
@@ -1512,7 +1526,7 @@ static void rtw_dev_remove(struct usb_interface *pusb_intf)
 	rtw_unregister_early_suspend(pwrctl);
 #endif
 
-	if (padapter->bFWReady == _TRUE) {
+	if (GET_HAL_DATA(padapter)->bFWReady == _TRUE) {
 		rtw_pm_set_ips(padapter, IPS_NONE);
 		rtw_pm_set_lps(padapter, PS_MODE_ACTIVE);
 
@@ -1579,6 +1593,7 @@ static int __init rtw_drv_entry(void)
 	rtw_suspend_lock_init();
 	rtw_drv_proc_init();
 	rtw_ndev_notifier_register();
+	rtw_inetaddr_notifier_register();
 
 	ret = usb_register(&usb_drv.usbdrv);
 
@@ -1587,6 +1602,7 @@ static int __init rtw_drv_entry(void)
 		rtw_suspend_lock_uninit();
 		rtw_drv_proc_deinit();
 		rtw_ndev_notifier_unregister();
+		rtw_inetaddr_notifier_unregister();
 		goto exit;
 	}
 
@@ -1608,6 +1624,7 @@ static void __exit rtw_drv_halt(void)
 	rtw_suspend_lock_uninit();
 	rtw_drv_proc_deinit();
 	rtw_ndev_notifier_unregister();
+	rtw_inetaddr_notifier_unregister();
 
 	RTW_PRINT("module exit success\n");
 
diff --git a/rtl8822BU/os_dep/linux/usb_ops_linux.c b/rtl8822BU/os_dep/linux/usb_ops_linux.c
index e2127bb..f3d64e5 100755..100644
--- a/rtl8822BU/os_dep/linux/usb_ops_linux.c
+++ b/rtl8822BU/os_dep/linux/usb_ops_linux.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,11 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *******************************************************************************/
+ *****************************************************************************/
 #define _USB_OPS_LINUX_C_
 
 #include <drv_types.h>
@@ -724,7 +720,7 @@ void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
 			 , __func__
 			 , rtw_is_drv_stopped(padapter) ? "True" : "False"
 			, rtw_is_surprise_removed(padapter) ? "True" : "False");
-		goto exit;
+		return;
 	}
 
 	if (purb->status == 0) {
@@ -778,8 +774,6 @@ void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
 		}
 	}
 
-exit:
-
 }
 
 u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
diff --git a/rtl8822BU/os_dep/linux/wifi_regd.c b/rtl8822BU/os_dep/linux/wifi_regd.c
index fc58d76..1edbcae 100755..100644
--- a/rtl8822BU/os_dep/linux/wifi_regd.c
+++ b/rtl8822BU/os_dep/linux/wifi_regd.c
@@ -1,6 +1,15 @@
 /******************************************************************************
  *
- * Copyright(c) 2009-2010  Realtek Corporation.
+ * Copyright(c) 2009-2010 - 2017 Realtek Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
  *
  *****************************************************************************/
 
@@ -134,16 +143,11 @@ static const struct ieee80211_regdomain rtw_regdom_14 = {
 static struct rtw_regulatory *rtw_regd;
 #endif
 
-static bool _rtw_is_radar_freq(u16 center_freq)
-{
-	return center_freq >= 5260 && center_freq <= 5700;
-}
-
 #if 0 /* not_yet */
 static void _rtw_reg_apply_beaconing_flags(struct wiphy *wiphy,
 		enum nl80211_reg_initiator initiator)
 {
-	enum ieee80211_band band;
+	enum nl80211_band band;
 	struct ieee80211_supported_band *sband;
 	const struct ieee80211_reg_rule *reg_rule;
 	struct ieee80211_channel *ch;
@@ -160,7 +164,7 @@ static void _rtw_reg_apply_beaconing_flags(struct wiphy *wiphy,
 
 		for (i = 0; i < sband->n_channels; i++) {
 			ch = &sband->channels[i];
-			if (_rtw_is_radar_freq(ch->center_freq) ||
+			if (rtw_is_dfs_ch(ch->hw_value) ||
 			    (ch->flags & IEEE80211_CHAN_RADAR))
 				continue;
 			if (initiator == NL80211_REGDOM_SET_BY_COUNTRY_IE) {
@@ -205,9 +209,9 @@ static void _rtw_reg_apply_active_scan_flags(struct wiphy *wiphy,
 	u32 bandwidth = 0;
 	int r;
 
-	if (!wiphy->bands[IEEE80211_BAND_2GHZ])
+	if (!wiphy->bands[NL80211_BAND_2GHZ])
 		return;
-	sband = wiphy->bands[IEEE80211_BAND_2GHZ];
+	sband = wiphy->bands[NL80211_BAND_2GHZ];
 
 	/*
 	 * If no country IE has been received always enable active scan
@@ -258,18 +262,21 @@ static void _rtw_reg_apply_radar_flags(struct wiphy *wiphy)
 	struct ieee80211_channel *ch;
 	unsigned int i;
 
-	if (!wiphy->bands[IEEE80211_BAND_5GHZ])
+	if (!wiphy->bands[NL80211_BAND_5GHZ])
 		return;
 
-	sband = wiphy->bands[IEEE80211_BAND_5GHZ];
+	sband = wiphy->bands[NL80211_BAND_5GHZ];
 
 	for (i = 0; i < sband->n_channels; i++) {
 		ch = &sband->channels[i];
-		if (!_rtw_is_radar_freq(ch->center_freq))
+		if (!rtw_is_dfs_ch(ch->hw_value))
 			continue;
 #ifdef CONFIG_DFS
-		#if !defined(CONFIG_DFS_MASTER)
-		if (!(ch->flags & IEEE80211_CHAN_DISABLED)) {
+		if (!(ch->flags & IEEE80211_CHAN_DISABLED)
+			#if defined(CONFIG_DFS_MASTER)
+			&& rtw_odm_dfs_domain_unknown(wiphy_to_adapter(wiphy))
+			#endif
+		) {
 			ch->flags |= IEEE80211_CHAN_RADAR;
 			#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
 			ch->flags |= (IEEE80211_CHAN_NO_IBSS | IEEE80211_CHAN_PASSIVE_SCAN);
@@ -277,7 +284,6 @@ static void _rtw_reg_apply_radar_flags(struct wiphy *wiphy)
 			ch->flags |= IEEE80211_CHAN_NO_IR;
 			#endif
 		}
-		#endif
 #endif /* CONFIG_DFS */
 
 #if 0
@@ -304,10 +310,10 @@ static void _rtw_reg_apply_flags(struct wiphy *wiphy)
 {
 #if 1				/* by channel plan */
 	_adapter *padapter = wiphy_to_adapter(wiphy);
-	u8 channel_plan = padapter->mlmepriv.ChannelPlan;
-	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
-	RT_CHANNEL_INFO *channel_set = pmlmeext->channel_set;
-	u8 max_chan_nums = pmlmeext->max_chan_nums;
+	struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter);
+	u8 channel_plan = rfctl->ChannelPlan;
+	RT_CHANNEL_INFO *channel_set = rfctl->channel_set;
+	u8 max_chan_nums = rfctl->max_chan_nums;
 
 	struct ieee80211_supported_band *sband;
 	struct ieee80211_channel *ch;
@@ -316,7 +322,7 @@ static void _rtw_reg_apply_flags(struct wiphy *wiphy)
 	u32 freq;
 
 	/* all channels disable */
-	for (i = 0; i < IEEE80211_NUM_BANDS; i++) {
+	for (i = 0; i < NUM_NL80211_BANDS; i++) {
 		sband = wiphy->bands[i];
 
 		if (sband) {
@@ -336,10 +342,12 @@ static void _rtw_reg_apply_flags(struct wiphy *wiphy)
 
 		ch = ieee80211_get_channel(wiphy, freq);
 		if (ch) {
-			if (channel_set[i].ScanType == SCAN_PASSIVE) {
+			if (channel_set[i].ScanType == SCAN_PASSIVE
 				#if defined(CONFIG_DFS_MASTER)
-				ch->flags = 0;
-				#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
+				&& rtw_odm_dfs_domain_unknown(wiphy_to_adapter(wiphy))
+				#endif
+			) {
+				#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0))
 				ch->flags = (IEEE80211_CHAN_NO_IBSS | IEEE80211_CHAN_PASSIVE_SCAN);
 				#else
 				ch->flags = IEEE80211_CHAN_NO_IR;
@@ -362,7 +370,7 @@ static void _rtw_reg_apply_flags(struct wiphy *wiphy)
 	u16 channel;
 	u32 freq;
 
-	for (i = 0; i < IEEE80211_NUM_BANDS; i++) {
+	for (i = 0; i < NUM_NL80211_BANDS; i++) {
 		sband = wiphy->bands[i];
 
 		if (sband)
diff --git a/rtl8822BU/os_dep/linux/xmit_linux.c b/rtl8822BU/os_dep/linux/xmit_linux.c
index 7721b7d..aeef418 100755..100644
--- a/rtl8822BU/os_dep/linux/xmit_linux.c
+++ b/rtl8822BU/os_dep/linux/xmit_linux.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #define _XMIT_OSDEP_C_
 
 #include <drv_types.h>
diff --git a/rtl8822BU/os_dep/osdep_service.c b/rtl8822BU/os_dep/osdep_service.c
index 1fbea5d..8bc7bbc 100755..100644
--- a/rtl8822BU/os_dep/osdep_service.c
+++ b/rtl8822BU/os_dep/osdep_service.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2007 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 
 #define _OSDEP_SERVICE_C_
@@ -1066,18 +1061,18 @@ void rtw_list_insert_tail(_list *plist, _list *phead)
 
 }
 
-void rtw_init_timer(_timer *ptimer, void *padapter, void *pfunc)
+void rtw_init_timer(_timer *ptimer, void *padapter, void *pfunc, void *ctx)
 {
 	_adapter *adapter = (_adapter *)padapter;
 
 #ifdef PLATFORM_LINUX
-	_init_timer(ptimer, adapter->pnetdev, pfunc, adapter);
+	_init_timer(ptimer, adapter->pnetdev, pfunc, ctx);
 #endif
 #ifdef PLATFORM_FREEBSD
-	_init_timer(ptimer, adapter->pifp, pfunc, adapter->mlmepriv.nic_hdl);
+	_init_timer(ptimer, adapter->pifp, pfunc, ctx);
 #endif
 #ifdef PLATFORM_WINDOWS
-	_init_timer(ptimer, adapter->hndis_adapter, pfunc, adapter->mlmepriv.nic_hdl);
+	_init_timer(ptimer, adapter->hndis_adapter, pfunc, ctx);
 #endif
 }
 
@@ -1176,7 +1171,43 @@ u32 _rtw_down_sema(_sema *sema)
 #endif
 }
 
+inline void thread_exit(_completion *comp)
+{
+#ifdef PLATFORM_LINUX
+	complete_and_exit(comp, 0);
+#endif
+
+#ifdef PLATFORM_FREEBSD
+	printf("%s", "RTKTHREAD_exit");
+#endif
+
+#ifdef PLATFORM_OS_CE
+	ExitThread(STATUS_SUCCESS);
+#endif
 
+#ifdef PLATFORM_OS_XP
+	PsTerminateSystemThread(STATUS_SUCCESS);
+#endif
+}
+
+inline void _rtw_init_completion(_completion *comp)
+{
+#ifdef PLATFORM_LINUX
+	init_completion(comp);
+#endif
+}
+inline void _rtw_wait_for_comp_timeout(_completion *comp)
+{
+#ifdef PLATFORM_LINUX
+	wait_for_completion_timeout(comp, msecs_to_jiffies(3000));
+#endif
+}
+inline void _rtw_wait_for_comp(_completion *comp)
+{
+#ifdef PLATFORM_LINUX
+	wait_for_completion(comp);
+#endif
+}
 
 void	_rtw_mutex_init(_mutex *pmutex)
 {
@@ -2273,20 +2304,19 @@ RETURN:
 	return;
 }
 
-/*
-* Jeff: this function should be called under ioctl (rtnl_lock is accquired) while
-* LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26)
-*/
 int rtw_change_ifname(_adapter *padapter, const char *ifname)
 {
+	struct dvobj_priv *dvobj;
 	struct net_device *pnetdev;
 	struct net_device *cur_pnetdev;
 	struct rereg_nd_name_data *rereg_priv;
 	int ret;
+	u8 rtnl_lock_needed;
 
 	if (!padapter)
 		goto error;
 
+	dvobj = adapter_to_dvobj(padapter);
 	cur_pnetdev = padapter->pnetdev;
 	rereg_priv = &padapter->rereg_nd_name_priv;
 
@@ -2296,11 +2326,11 @@ int rtw_change_ifname(_adapter *padapter, const char *ifname)
 		rereg_priv->old_pnetdev = NULL;
 	}
 
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 26))
-	if (!rtnl_is_locked())
+	rtnl_lock_needed = rtw_rtnl_lock_needed(dvobj);
+
+	if (rtnl_lock_needed)
 		unregister_netdev(cur_pnetdev);
 	else
-#endif
 		unregister_netdevice(cur_pnetdev);
 
 	rereg_priv->old_pnetdev = cur_pnetdev;
@@ -2317,11 +2347,9 @@ int rtw_change_ifname(_adapter *padapter, const char *ifname)
 
 	_rtw_memcpy(pnetdev->dev_addr, adapter_mac_addr(padapter), ETH_ALEN);
 
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 26))
-	if (!rtnl_is_locked())
+	if (rtnl_lock_needed)
 		ret = register_netdev(pnetdev);
 	else
-#endif
 		ret = register_netdevice(pnetdev);
 
 	if (ret != 0) {
@@ -2703,6 +2731,15 @@ inline BOOLEAN is_null(char c)
 		return _FALSE;
 }
 
+inline BOOLEAN is_all_null(char *c, int len)
+{
+	for (; len > 0; len--)
+		if (c[len - 1] != '\0')
+			return _FALSE;
+
+	return _TRUE;
+}
+
 /**
 * is_eol -
 *
diff --git a/rtl8822BU/platform/custom_country_chplan.h b/rtl8822BU/platform/custom_country_chplan.h
index 9d26bf4..f8cc13b 100755..100644
--- a/rtl8822BU/platform/custom_country_chplan.h
+++ b/rtl8822BU/platform/custom_country_chplan.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,18 +11,12 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 
 #error "You have defined CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP to use a customized map of your own instead of the default one"
 #error "Before removing these error notifications, please make sure regulatory certification requirements of your target markets"
 
 static const struct country_chplan CUSTOMIZED_country_chplan_map[] = {
-	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0xFF), /* Taiwan */
+	COUNTRY_CHPLAN_ENT("TW", 0x76, 1, 0x3FF), /* Taiwan */
 };
 
-static const u16 CUSTOMIZED_country_chplan_map_sz = sizeof(CUSTOMIZED_country_chplan_map) / sizeof(struct country_chplan);
diff --git a/rtl8822BU/platform/platform_ARM_SUN50IW1P1_sdio.c b/rtl8822BU/platform/platform_ARM_SUN50IW1P1_sdio.c
index 44bd7de..2586455 100755..100644
--- a/rtl8822BU/platform/platform_ARM_SUN50IW1P1_sdio.c
+++ b/rtl8822BU/platform/platform_ARM_SUN50IW1P1_sdio.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 /*
  * Description:
  *	This file can be applied to following platforms:
diff --git a/rtl8822BU/platform/platform_ARM_SUNnI_sdio.c b/rtl8822BU/platform/platform_ARM_SUNnI_sdio.c
index 612dfba..8a52aa9 100755..100644
--- a/rtl8822BU/platform/platform_ARM_SUNnI_sdio.c
+++ b/rtl8822BU/platform/platform_ARM_SUNnI_sdio.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 /*
  * Description:
  *	This file can be applied to following platforms:
diff --git a/rtl8822BU/platform/platform_ARM_SUNxI_sdio.c b/rtl8822BU/platform/platform_ARM_SUNxI_sdio.c
index 6eed7b1..795b7e7 100755..100644
--- a/rtl8822BU/platform/platform_ARM_SUNxI_sdio.c
+++ b/rtl8822BU/platform/platform_ARM_SUNxI_sdio.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #include <drv_types.h>
 
 #ifdef CONFIG_MMC_SUNXI_POWER_CONTROL
diff --git a/rtl8822BU/platform/platform_ARM_SUNxI_usb.c b/rtl8822BU/platform/platform_ARM_SUNxI_usb.c
index b2c8a28..9c2abc4 100755..100644
--- a/rtl8822BU/platform/platform_ARM_SUNxI_usb.c
+++ b/rtl8822BU/platform/platform_ARM_SUNxI_usb.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 /*
  * Description:
  *	This file can be applied to following platforms:
diff --git a/rtl8822BU/platform/platform_ARM_WMT_sdio.c b/rtl8822BU/platform/platform_ARM_WMT_sdio.c
index 159a5ac..d85002c 100755..100644
--- a/rtl8822BU/platform/platform_ARM_WMT_sdio.c
+++ b/rtl8822BU/platform/platform_ARM_WMT_sdio.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #include <drv_types.h>
 #include <mach/wmt_iomux.h>
 #include <linux/gpio.h>
diff --git a/rtl8822BU/platform/platform_RTK_DMP_usb.c b/rtl8822BU/platform/platform_RTK_DMP_usb.c
index af845f7..cb740b2 100755..100644
--- a/rtl8822BU/platform/platform_RTK_DMP_usb.c
+++ b/rtl8822BU/platform/platform_RTK_DMP_usb.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #include <drv_types.h>
 
 int platform_wifi_power_on(void)
diff --git a/rtl8822BU/platform/platform_arm_act_sdio.c b/rtl8822BU/platform/platform_arm_act_sdio.c
index 539bb17..ad7b6cf 100755..100644
--- a/rtl8822BU/platform/platform_arm_act_sdio.c
+++ b/rtl8822BU/platform/platform_arm_act_sdio.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 /*
  * Description:
  *	This file can be applied to following platforms:
diff --git a/rtl8822BU/platform/platform_ops.c b/rtl8822BU/platform/platform_ops.c
index 95da669..10766aa 100755..100644
--- a/rtl8822BU/platform/platform_ops.c
+++ b/rtl8822BU/platform/platform_ops.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef CONFIG_PLATFORM_OPS
 /*
  * Return:
diff --git a/rtl8822BU/platform/platform_ops.h b/rtl8822BU/platform/platform_ops.h
index b8314bb..12caf3c 100755..100644
--- a/rtl8822BU/platform/platform_ops.h
+++ b/rtl8822BU/platform/platform_ops.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #ifndef __PLATFORM_OPS_H__
 #define __PLATFORM_OPS_H__
 
diff --git a/rtl8822BU/platform/platform_sprd_sdio.c b/rtl8822BU/platform/platform_sprd_sdio.c
index c5ffd14..34061d0 100755..100644
--- a/rtl8822BU/platform/platform_sprd_sdio.c
+++ b/rtl8822BU/platform/platform_sprd_sdio.c
@@ -1,6 +1,6 @@
 /******************************************************************************
  *
- * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ * Copyright(c) 2013 - 2017 Realtek Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
@@ -11,12 +11,7 @@
  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  * more details.
  *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
+ *****************************************************************************/
 #include <drv_types.h>
 
 extern void sdhci_bus_scan(void);
diff --git a/rtl8822BU/rtl8822b.mk b/rtl8822BU/rtl8822b.mk
index 832f94b..f935b6c 100755..100644
--- a/rtl8822BU/rtl8822b.mk
+++ b/rtl8822BU/rtl8822b.mk
@@ -5,7 +5,7 @@ ifeq ($(CONFIG_USB_HCI), y)
 ifeq ($(CONFIG_BT_COEXIST), n)
 MODULE_NAME = 8812bu
 else
-MODULE_NAME = 8822bu
+MODULE_NAME = 88x2bu
 endif
 endif
 ifeq ($(CONFIG_PCI_HCI), y)
@@ -24,18 +24,20 @@ endif
 _HAL_HALMAC_FILES +=	hal/halmac/halmac_api.o
 
 _HAL_HALMAC_FILES +=	hal/halmac/halmac_88xx/halmac_api_88xx.o \
-			hal/halmac/halmac_88xx/halmac_func_88xx.o \
 			hal/halmac/halmac_88xx/halmac_api_88xx_usb.o \
 			hal/halmac/halmac_88xx/halmac_api_88xx_sdio.o \
-			hal/halmac/halmac_88xx/halmac_api_88xx_pcie.o
+			hal/halmac/halmac_88xx/halmac_api_88xx_pcie.o \
+			hal/halmac/halmac_88xx/halmac_func_88xx.o \
+			hal/halmac/halmac_88xx/halmac_gpio_88xx.o
 
-_HAL_HALMAC_FILES +=	hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_pwr_seq.o \
+_HAL_HALMAC_FILES +=	hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_phy.o \
+			hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_pwr_seq.o \
 			hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b.o \
-			hal/halmac/halmac_88xx/halmac_8822b/halmac_func_8822b.o \
-			hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_usb.o \
-			hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_sdio.o \
 			hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_pcie.o \
-			hal/halmac/halmac_88xx/halmac_8822b/halmac_8822b_phy.o
+			hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_sdio.o \
+			hal/halmac/halmac_88xx/halmac_8822b/halmac_api_8822b_usb.o \
+			hal/halmac/halmac_88xx/halmac_8822b/halmac_func_8822b.o \
+			hal/halmac/halmac_88xx/halmac_8822b/halmac_gpio_8822b.o
 
 _HAL_INTFS_FILES +=	hal/hal_halmac.o
 
@@ -80,15 +82,4 @@ _HAL_INTFS_FILES +=	hal/rtl8822b/$(HCI_NAME)/rtl8822bs_halinit.o \
 _HAL_INTFS_FILES +=hal/efuse/rtl8822b/HalEfuseMask8822B_SDIO.o
 endif
 
-_OUTSRC_FILES +=	hal/phydm/rtl8822b/halhwimg8822b_bb.o \
-			hal/phydm/rtl8822b/halhwimg8822b_mac.o \
-			hal/phydm/rtl8822b/halhwimg8822b_rf.o \
-			hal/phydm/rtl8822b/halphyrf_8822b.o \
-			hal/phydm/rtl8822b/phydm_hal_api8822b.o \
-			hal/phydm/rtl8822b/phydm_iqk_8822b.o \
-			hal/phydm/rtl8822b/phydm_regconfig8822b.o \
-			hal/phydm/rtl8822b/phydm_rtl8822b.o
-
-_OUTSRC_FILES +=	hal/phydm/txbf/haltxbf8822b.o
-
-_HAL_INTFS_FILES += $(_HAL_HALMAC_FILES)
+_HAL_INTFS_FILES += $(_HAL_HALMAC_FILES)
\ No newline at end of file
diff --git a/rtl8822BU/runwpa b/rtl8822BU/runwpa
index f825e8b..f825e8b 100755..100644
--- a/rtl8822BU/runwpa
+++ b/rtl8822BU/runwpa
diff --git a/rtl8822BU/wlan0dhcp b/rtl8822BU/wlan0dhcp
index 6043382..6043382 100755..100644
--- a/rtl8822BU/wlan0dhcp
+++ b/rtl8822BU/wlan0dhcp