| author | zhiguang.ouyang <zhiguang.ouyang@amlogic.com> | 2019-11-05 06:57:18 (GMT) |
|---|---|---|
| committer | Xindong Xu <xindong.xu@amlogic.com> | 2019-11-28 02:28:50 (GMT) |
| commit | 9ae5ae4e5b65aea00117fe7195bf6beac9d6d2c9 (patch) | |
| tree | e2a92cce90d7601ef5e432e3f67c471b044aad13 | |
| parent | 1ee5c88276c5d765a765c3eb5de72a33939c5aed (diff) | |
| download | uboot-9ae5ae4e5b65aea00117fe7195bf6beac9d6d2c9.zip uboot-9ae5ae4e5b65aea00117fe7195bf6beac9d6d2c9.tar.gz uboot-9ae5ae4e5b65aea00117fe7195bf6beac9d6d2c9.tar.bz2 | |
ddr: timing:gxl p281 ddr set 2048 compile fail [1/1]
PD#OTT-7152
Problem:
define CONFIG_DDR_SIZE 2048
compile fail
Solution:
define CONFIG_DDR_TOTAL_SIZE (((unsigned int)CONFIG_DDR_SIZE) << 20)
Verify:
p281 test pass.
Change-Id: Id6120cdfaa4932ab0f2fe5b61cafd9d9576da46f
Signed-off-by: zhiguang.ouyang <zhiguang.ouyang@amlogic.com>
0 files changed, 0 insertions, 0 deletions