deadpool: support multi dts for g12a & sm1 [1/3]

PD#SWPL-17745

Problem:
bring up deadpool Y3

Solution:
support multi dts for g12a & sm1

Verify:
deadpool

Change-Id: Iddf4f33025ceb32ded9eb2b5d983faf7678f5cbd
Signed-off-by: Xindong Xu <xindong.xu@amlogic.com>

2 files changed, 54 insertions, 22 deletions

diff --git a/board/amlogic/configs/g12a_deadpool_v1.h b/board/amlogic/configs/g12a_deadpool_v1.h
index 88d0971..4888f71 100755..100644
--- a/board/amlogic/configs/g12a_deadpool_v1.h
+++ b/board/amlogic/configs/g12a_deadpool_v1.h
@@ -626,7 +626,7 @@
 #define CONFIG_SYS_MEM_TOP_HIDE 0x08000000 //hide 128MB for kernel reserve
 #define CONFIG_CMD_LOADB    1
 
-//#define CONFIG_MULTI_DTB    1
+#define CONFIG_MULTI_DTB    1
 
 /* debug mode defines */
 //#define CONFIG_DEBUG_MODE           1
diff --git a/board/amlogic/g12a_deadpool_v1/g12a_deadpool_v1.c b/board/amlogic/g12a_deadpool_v1/g12a_deadpool_v1.c
index ba63906..2227fc8 100644
--- a/board/amlogic/g12a_deadpool_v1/g12a_deadpool_v1.c
+++ b/board/amlogic/g12a_deadpool_v1/g12a_deadpool_v1.c
@@ -796,31 +796,63 @@ phys_size_t get_effective_memsize(void)
 int checkhw(char * name)
 {
 	/*
-	 * read board hw id
-	 * set and select the dts according the board hw id.
-	 *
-	 * hwid = 1	p321 v1
-	 * hwid = 2	p321 v2
+	 * set aml_dt according to chip and dram capacity
 	 */
-	unsigned int hwid = 1;
+	unsigned int ddr_size=0;
 	char loc_name[64] = {0};
+	int i;
+	cpu_id_t cpu_id=get_cpu_id();
 
-	/* read hwid */
-	hwid = (readl(P_AO_SEC_GP_CFG0) >> 8) & 0xFF;
-
-	printf("checkhw:  hwid = %d\n", hwid);
-
+	for (i=0; i<CONFIG_NR_DRAM_BANKS; i++) {
+		ddr_size += gd->bd->bi_dram[i].size;
+	}
 
-	switch (hwid) {
-		case 1:
-			strcpy(loc_name, "txl_p321_v1\0");
-			break;
-		case 2:
-			strcpy(loc_name, "txl_p321_v2\0");
-			break;
-		default:
-			strcpy(loc_name, "txl_p321_v1");
-			break;
+#if defined(CONFIG_SYS_MEM_TOP_HIDE)
+	ddr_size += CONFIG_SYS_MEM_TOP_HIDE;
+#endif
+	printf("ddr_size = 0x%x \n", ddr_size);
+	char *ddr_mode = getenv("mem_size");
+	if (MESON_CPU_MAJOR_ID_SM1 == cpu_id.family_id) {
+		printf("use sm1\n");
+		switch (ddr_size) {
+			case 0x80000000:
+				if (!strcmp(ddr_mode, "1g")) {
+					strcpy(loc_name, "sm1_ac213_1g\0");
+					break;
+				}
+				strcpy(loc_name, "sm1_ac213_2g\0");
+				break;
+			case 0x40000000:
+				strcpy(loc_name, "sm1_ac213_1g\0");
+				break;
+			case 0x2000000:
+				strcpy(loc_name, "sm1_ac213_512m\0");
+				break;
+			default:
+				strcpy(loc_name, "sm1_ac213_unsupport");
+				break;
+		}
+	}
+	else {
+		printf("use g12a\n");
+		switch (ddr_size) {
+			case 0x80000000:
+				if (!strcmp(ddr_mode, "1g")) {
+					strcpy(loc_name, "g12a_u212_1g\0");
+					break;
+				}
+				strcpy(loc_name, "g12a_s905y2_deadpool\0");
+				break;
+			case 0x40000000:
+				strcpy(loc_name, "g12a_u212_1g\0");
+				break;
+			case 0x2000000:
+				strcpy(loc_name, "g12a_u212_512m\0");
+				break;
+			default:
+				strcpy(loc_name, "g12a_u212_unsupport");
+				break;
+		}
 	}
 	strcpy(name, loc_name);
 	setenv("aml_dt", loc_name);