| author | Edward Ho <edward.ho@amlogic.com> | 2019-05-30 02:59:28 (GMT) |
|---|---|---|
| committer | Tellen Yu <tellen.yu@amlogic.com> | 2019-05-30 03:09:20 (GMT) |
| commit | c04dea725628fc5129ca510170d4f398e15571c3 (patch) | |
| tree | 0dbca4d0e5f5f916b19f06d549ed53fbf0f4b65c | |
| parent | 0ccc733702a288841a9fc6248be41124f80ac975 (diff) | |
| download | uboot-c04dea725628fc5129ca510170d4f398e15571c3.zip uboot-c04dea725628fc5129ca510170d4f398e15571c3.tar.gz uboot-c04dea725628fc5129ca510170d4f398e15571c3.tar.bz2 | |
[Sabrina] Modify VDDEE_PWM configuration [1/1]
PD#SWPL-9139
Problem:
1. Modify VDDEE voltage to 0.84V
2. Modify VDDEE PWM frequency to 1.2MHz
Solution:
VDDEE_PWM
Verify:
sabrina
Change-Id: Icd5be2aba615d13664fcc4caaba565fa5e780f55
Signed-off-by: Edward Ho <edward.ho@amlogic.com>
| -rwxr-xr-x | board/amlogic/configs/sm1_sabrina_v1.h | 2 | ||||
| -rwxr-xr-x | board/amlogic/sm1_sabrina_v1/firmware/timing.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/board/amlogic/configs/sm1_sabrina_v1.h b/board/amlogic/configs/sm1_sabrina_v1.h index efe3df5..64bece6 100755 --- a/board/amlogic/configs/sm1_sabrina_v1.h +++ b/board/amlogic/configs/sm1_sabrina_v1.h @@ -34,7 +34,7 @@ */ #define CONFIG_PLATFORM_POWER_INIT #define CONFIG_VCCK_INIT_VOLTAGE 800 // VCCK power up voltage -#define CONFIG_VDDEE_INIT_VOLTAGE 800 // VDDEE power up voltage +#define CONFIG_VDDEE_INIT_VOLTAGE 840 // VDDEE power up voltage #define CONFIG_VDDEE_SLEEP_VOLTAGE 770 // VDDEE suspend voltage /* configs for CEC */ diff --git a/board/amlogic/sm1_sabrina_v1/firmware/timing.c b/board/amlogic/sm1_sabrina_v1/firmware/timing.c index 022a3a4..56ec691 100755 --- a/board/amlogic/sm1_sabrina_v1/firmware/timing.c +++ b/board/amlogic/sm1_sabrina_v1/firmware/timing.c @@ -642,7 +642,7 @@ bl2_reg_t __bl2_reg[] = { /* step2: match PWM config */ /* GPIO9[BIT7]=H use PWM_CFG0(0.67v-0.97v), =L use PWM_CFG1(0.69v-0.89v) */ - {0x1, PWM_CFG0, 0, 0, BL2_INIT_STAGE_PWM_CFG_GROUP, 0}, + {0x1, PWM_CFG1, 0, 0, BL2_INIT_STAGE_PWM_CFG_GROUP, 0}, {0x0, PWM_CFG1, 0, 0, BL2_INIT_STAGE_PWM_CFG_GROUP, 0}, /* step3: config PWM */ |