author | Shaochan liu <shaochan.liu@amlogic.com> | 2019-11-20 03:27:28 (GMT) |
---|---|---|
committer | Shaochan Liu <shaochan.liu@amlogic.com> | 2019-12-04 11:00:01 (GMT) |
commit | f04d567a68d4b944150eab198a041499a9ef0c12 (patch) | |
tree | 9f29d57ed7846d7e4a59fbb77f002dc1300b5a8e | |
parent | 87dd1f4b56fe5c931b9b4571ab5a57909f341938 (diff) | |
download | uboot-f04d567a68d4b944150eab198a041499a9ef0c12.zip uboot-f04d567a68d4b944150eab198a041499a9ef0c12.tar.gz uboot-f04d567a68d4b944150eab198a041499a9ef0c12.tar.bz2 |
lcd: add the pre_de setting for minilvds and update phy_setting [1/2]
PD#SWPL-17064
Problem:
need add the pre_de seeting for minilvds
Solution:
add the pre_de seeting for minilvds
Verify:
x301
This modification will affect TL1&TM2 only.
Change-Id: If56505847ffa772e904e2438e9f93aa14b30449a
Signed-off-by: Shaochan liu <shaochan.liu@amlogic.com>
-rw-r--r-- | drivers/display/lcd/aml_lcd_phy_config.c | 49 | ||||
-rw-r--r-- | drivers/display/lcd/lcd_tv/lcd_drv.c | 1 |
2 files changed, 26 insertions, 24 deletions
diff --git a/drivers/display/lcd/aml_lcd_phy_config.c b/drivers/display/lcd/aml_lcd_phy_config.c index db381d3..ce35b01 100644 --- a/drivers/display/lcd/aml_lcd_phy_config.c +++ b/drivers/display/lcd/aml_lcd_phy_config.c @@ -89,44 +89,46 @@ static unsigned int lcd_lvds_channel_on_value(struct lcd_config_s *pconf) return channel_on; } -void lcd_phy_cntl_set_tl1(int status, unsigned int data32, int flag) +void lcd_phy_cntl_set_tl1(int status, unsigned int chreg, int bypass, + unsigned int ckdi) { unsigned int tmp = 0; unsigned int data = 0; - unsigned int cntl16 = 0x80000000; + unsigned int cntl16 = 0; if (lcd_debug_print_flag) LCDPR("%s: %d\n", __func__, status); if (status) { - data32 |= ((phy_ctrl_bit_on << 16) | + chreg |= ((phy_ctrl_bit_on << 16) | (phy_ctrl_bit_on << 0)); - if (flag) + if (bypass) tmp |= ((1 << 18) | (1 << 2)); + cntl16 = ckdi | 0x80000000; } else { if (phy_ctrl_bit_on) data = 0; else data = 1; - data32 |= ((data << 16) | (data << 0)); cntl16 = 0; + chreg |= ((data << 16) | (data << 0)); lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL14, 0); } lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL15, tmp); lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL16, cntl16); lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL8, tmp); - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, chreg); lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL9, tmp); - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, chreg); lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL10, tmp); - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, chreg); lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL11, tmp); - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL4, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL4, chreg); lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL12, tmp); - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL6, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL6, chreg); lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL13, tmp); - lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL7, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL7, chreg); } void lcd_lvds_phy_set(struct lcd_config_s *pconf, int status) @@ -161,7 +163,7 @@ void lcd_lvds_phy_set(struct lcd_config_s *pconf, int status) data32 = lvds_vx1_p2p_phy_preem_tl1[preem]; lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL14, 0xff2027e0 | vswing); - lcd_phy_cntl_set_tl1(status, data32, 0); + lcd_phy_cntl_set_tl1(status, data32, 0, 0); break; case LCD_CHIP_TXHD: if (preem > 3) { @@ -221,7 +223,7 @@ void lcd_lvds_phy_set(struct lcd_config_s *pconf, int status) switch (lcd_drv->chip_type) { case LCD_CHIP_TL1: case LCD_CHIP_TM2: - lcd_phy_cntl_set_tl1(status, data32, 0); + lcd_phy_cntl_set_tl1(status, data32, 0, 0); break; default: lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, 0); @@ -271,7 +273,7 @@ void lcd_vbyone_phy_set(struct lcd_config_s *pconf, int status) lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL14, 0xf02027a0 | vswing); } - lcd_phy_cntl_set_tl1(status, data32, 0); + lcd_phy_cntl_set_tl1(status, data32, 1, 0); break; default: if (vswing > 7) { @@ -302,7 +304,7 @@ void lcd_vbyone_phy_set(struct lcd_config_s *pconf, int status) switch (lcd_drv->chip_type) { case LCD_CHIP_TL1: case LCD_CHIP_TM2: - lcd_phy_cntl_set_tl1(status, data32, 0); + lcd_phy_cntl_set_tl1(status, data32, 1, 0); break; default: lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, 0); @@ -316,7 +318,7 @@ void lcd_vbyone_phy_set(struct lcd_config_s *pconf, int status) void lcd_mlvds_phy_set(struct lcd_config_s *pconf, int status) { unsigned int vswing, preem; - unsigned int data32 = 0, size, cntl16; + unsigned int data32 = 0, size, ckdi; struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver(); struct mlvds_config_s *mlvds_conf; @@ -343,9 +345,8 @@ void lcd_mlvds_phy_set(struct lcd_config_s *pconf, int status) data32 = lvds_vx1_p2p_phy_preem_tl1[preem]; lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL14, 0xff2027e0 | vswing); - cntl16 = (mlvds_conf->pi_clk_sel << 12); - cntl16 |= 0x80000000; - lcd_phy_cntl_set_tl1(status, data32, cntl16); + ckdi = (mlvds_conf->pi_clk_sel << 12); + lcd_phy_cntl_set_tl1(status, data32, 0, ckdi); break; case LCD_CHIP_TXHD: if (vswing > 7) { @@ -377,7 +378,7 @@ void lcd_mlvds_phy_set(struct lcd_config_s *pconf, int status) switch (lcd_drv->chip_type) { case LCD_CHIP_TL1: case LCD_CHIP_TM2: - lcd_phy_cntl_set_tl1(status, data32, 0); + lcd_phy_cntl_set_tl1(status, data32, 0, 0); break; case LCD_CHIP_TXHD: lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, 0); @@ -420,7 +421,7 @@ void lcd_p2p_phy_set(struct lcd_config_s *pconf, int status) data32 = lvds_vx1_p2p_phy_preem_tl1[preem]; lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL14, 0xff2027a0 | vswing); - lcd_phy_cntl_set_tl1(status, data32, 0); + lcd_phy_cntl_set_tl1(status, data32, 1, 0); break; case P2P_CHPI: /* low common mode */ case P2P_CSPI: @@ -439,7 +440,7 @@ void lcd_p2p_phy_set(struct lcd_config_s *pconf, int status) } lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL14, 0xfe60027f); - lcd_phy_cntl_set_tl1(status, data32, 0); + lcd_phy_cntl_set_tl1(status, data32, 1, 0); break; default: LCDERR("%s: invalid p2p_type %d\n", @@ -447,7 +448,7 @@ void lcd_p2p_phy_set(struct lcd_config_s *pconf, int status) break; } } else { - lcd_phy_cntl_set_tl1(status, data32, 0); + lcd_phy_cntl_set_tl1(status, data32, 1, 0); } } @@ -590,7 +591,7 @@ int lcd_phy_probe(void) else phy_ctrl_bit_on = 0; break; - case LCD_CHIP_G12B: + case LCD_CHIP_TM2: if (lcd_drv->rev_type == 0xB) phy_ctrl_bit_on = 1; else diff --git a/drivers/display/lcd/lcd_tv/lcd_drv.c b/drivers/display/lcd/lcd_tv/lcd_drv.c index a17e766..3dc355f 100644 --- a/drivers/display/lcd/lcd_tv/lcd_drv.c +++ b/drivers/display/lcd/lcd_tv/lcd_drv.c @@ -122,6 +122,7 @@ static void lcd_venc_set(struct lcd_config_s *pconf) lcd_vcbus_write(ENCL_VIDEO_VAVON_ELINE, v_active - 1 + video_on_line); switch (pconf->lcd_basic.lcd_type) { case LCD_P2P: + case LCD_MLVDS: lcd_vcbus_write(ENCL_VIDEO_V_PRE_DE_BLINE, video_on_line - 1 - 4); lcd_vcbus_write(ENCL_VIDEO_V_PRE_DE_ELINE, video_on_line - 1); lcd_vcbus_write(ENCL_VIDEO_H_PRE_DE_BEGIN, video_on_pixel + PRE_DE_DELAY); |