blob: 4aceb7c9fd331e0fa9029b132c637525265f998b
1 | /* |
2 | * include/amlogic/sound.h |
3 | * |
4 | * This program is free software; you can redistribute it and/or modify |
5 | * it under the terms of the GNU General Public License as published by |
6 | * the Free Software Foundation; either version 2 of the named License, |
7 | * or any later version. |
8 | * |
9 | * This program is distributed in the hope that it will be useful, |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
12 | * GNU General Public License for more details. |
13 | * |
14 | */ |
15 | |
16 | #ifndef _SOUND_H_ |
17 | #define _SOUND_H_ |
18 | |
19 | #define AIU_958_BPF 0x1500 |
20 | #define AIU_958_BRST 0x1501 |
21 | #define AIU_958_LENGTH 0x1502 |
22 | #define AIU_958_PADDSIZE 0x1503 |
23 | #define AIU_958_MISC 0x1504 |
24 | #define AIU_958_FORCE_LEFT 0x1505 |
25 | #define AIU_958_DISCARD_NUM 0x1506 |
26 | #define AIU_958_DCU_FF_CTRL 0x1507 |
27 | #define AIU_958_CHSTAT_L0 0x1508 |
28 | #define AIU_958_CHSTAT_L1 0x1509 |
29 | #define AIU_958_CTRL 0x150a |
30 | #define AIU_958_RPT 0x150b |
31 | #define AIU_I2S_MUTE_SWAP 0x150c |
32 | #define AIU_I2S_SOURCE_DESC 0x150d |
33 | #define AIU_I2S_MED_CTRL 0x150e |
34 | #define AIU_I2S_MED_THRESH 0x150f |
35 | #define AIU_I2S_DAC_CFG 0x1510 |
36 | #define AIU_I2S_SYNC 0x1511 |
37 | #define AIU_I2S_MISC 0x1512 |
38 | #define AIU_I2S_OUT_CFG 0x1513 |
39 | #define AIU_I2S_FF_CTRL 0x1514 |
40 | #define AIU_RST_SOFT 0x1515 |
41 | #define AIU_CLK_CTRL 0x1516 |
42 | #define AIU_MIX_ADCCFG 0x1517 |
43 | #define AIU_MIX_CTRL 0x1518 |
44 | #define AIU_CLK_CTRL_MORE 0x1519 |
45 | #define AIU_958_POP 0x151a |
46 | #define AIU_MIX_GAIN 0x151b |
47 | #define AIU_958_SYNWORD1 0x151c |
48 | #define AIU_958_SYNWORD2 0x151d |
49 | #define AIU_958_SYNWORD3 0x151e |
50 | #define AIU_958_SYNWORD1_MASK 0x151f |
51 | #define AIU_958_SYNWORD2_MASK 0x1520 |
52 | #define AIU_958_SYNWORD3_MASK 0x1521 |
53 | #define AIU_958_FFRDOUT_THD 0x1522 |
54 | #define AIU_958_LENGTH_PER_PAUSE 0x1523 |
55 | #define AIU_958_PAUSE_NUM 0x1524 |
56 | #define AIU_958_PAUSE_PAYLOAD 0x1525 |
57 | #define AIU_958_AUTO_PAUSE 0x1526 |
58 | #define AIU_958_PAUSE_PD_LENGTH 0x1527 |
59 | #define AIU_CODEC_DAC_LRCLK_CTRL 0x1528 |
60 | #define AIU_CODEC_ADC_LRCLK_CTRL 0x1529 |
61 | #define AIU_HDMI_CLK_DATA_CTRL 0x152a |
62 | #define AIU_CODEC_CLK_DATA_CTRL 0x152b |
63 | #define AIU_ACODEC_CTRL 0x152c |
64 | #define AIU_958_CHSTAT_R0 0x1530 |
65 | #define AIU_958_CHSTAT_R1 0x1531 |
66 | #define AIU_958_VALID_CTRL 0x1532 |
67 | #define AIU_AUDIO_AMP_REG0 0x153c |
68 | #define AIU_AUDIO_AMP_REG1 0x153d |
69 | #define AIU_AUDIO_AMP_REG2 0x153e |
70 | #define AIU_AUDIO_AMP_REG3 0x153f |
71 | #define AIU_AIFIFO2_CTRL 0x1540 |
72 | #define AIU_AIFIFO2_STATUS 0x1541 |
73 | #define AIU_AIFIFO2_GBIT 0x1542 |
74 | #define AIU_AIFIFO2_CLB 0x1543 |
75 | #define AIU_CRC_CTRL 0x1544 |
76 | #define AIU_CRC_STATUS 0x1545 |
77 | #define AIU_CRC_SHIFT_REG 0x1546 |
78 | #define AIU_CRC_IREG 0x1547 |
79 | #define AIU_CRC_CAL_REG1 0x1548 |
80 | #define AIU_CRC_CAL_REG0 0x1549 |
81 | #define AIU_CRC_POLY_COEF1 0x154a |
82 | #define AIU_CRC_POLY_COEF0 0x154b |
83 | #define AIU_CRC_BIT_SIZE1 0x154c |
84 | #define AIU_CRC_BIT_SIZE0 0x154d |
85 | #define AIU_CRC_BIT_CNT1 0x154e |
86 | #define AIU_CRC_BIT_CNT0 0x154f |
87 | #define AIU_AMCLK_GATE_HI 0x1550 |
88 | #define AIU_AMCLK_GATE_LO 0x1551 |
89 | #define AIU_AMCLK_MSR 0x1552 |
90 | #define AIU_AUDAC_CTRL0 0x1553 |
91 | #define AIU_DELTA_SIGMA0 0x1555 |
92 | #define AIU_DELTA_SIGMA1 0x1556 |
93 | #define AIU_DELTA_SIGMA2 0x1557 |
94 | #define AIU_DELTA_SIGMA3 0x1558 |
95 | #define AIU_DELTA_SIGMA4 0x1559 |
96 | #define AIU_DELTA_SIGMA5 0x155a |
97 | #define AIU_DELTA_SIGMA6 0x155b |
98 | #define AIU_DELTA_SIGMA7 0x155c |
99 | #define AIU_DELTA_SIGMA_LCNTS 0x155d |
100 | #define AIU_DELTA_SIGMA_RCNTS 0x155e |
101 | #define AIU_MEM_I2S_START_PTR 0x1560 |
102 | #define AIU_MEM_I2S_RD_PTR 0x1561 |
103 | #define AIU_MEM_I2S_END_PTR 0x1562 |
104 | #define AIU_MEM_I2S_MASKS 0x1563 |
105 | #define AIU_MEM_I2S_CONTROL 0x1564 |
106 | #define AIU_MEM_IEC958_START_PTR 0x1565 |
107 | #define AIU_MEM_IEC958_RD_PTR 0x1566 |
108 | #define AIU_MEM_IEC958_END_PTR 0x1567 |
109 | #define AIU_MEM_IEC958_MASKS 0x1568 |
110 | #define AIU_MEM_IEC958_CONTROL 0x1569 |
111 | #define AIU_MEM_AIFIFO2_START_PTR 0x156a |
112 | #define AIU_MEM_AIFIFO2_CURR_PTR 0x156b |
113 | #define AIU_MEM_AIFIFO2_END_PTR 0x156c |
114 | #define AIU_MEM_AIFIFO2_BYTES_AVAIL 0x156d |
115 | #define AIU_MEM_AIFIFO2_CONTROL 0x156e |
116 | #define AIU_MEM_AIFIFO2_MAN_WP 0x156f |
117 | #define AIU_MEM_AIFIFO2_MAN_RP 0x1570 |
118 | #define AIU_MEM_AIFIFO2_LEVEL 0x1571 |
119 | #define AIU_MEM_AIFIFO2_BUF_CNTL 0x1572 |
120 | #define AIU_MEM_I2S_MAN_WP 0x1573 |
121 | #define AIU_MEM_I2S_MAN_RP 0x1574 |
122 | #define AIU_MEM_I2S_LEVEL 0x1575 |
123 | #define AIU_MEM_I2S_BUF_CNTL 0x1576 |
124 | #define AIU_MEM_I2S_BUF_WRAP_COUNT 0x1577 |
125 | #define AIU_MEM_I2S_MEM_CTL 0x1578 |
126 | #define AIU_MEM_IEC958_MEM_CTL 0x1579 |
127 | #define AIU_MEM_IEC958_WRAP_COUNT 0x157a |
128 | #define AIU_MEM_IEC958_IRQ_LEVEL 0x157b |
129 | #define AIU_MEM_IEC958_MAN_WP 0x157c |
130 | #define AIU_MEM_IEC958_MAN_RP 0x157d |
131 | #define AIU_MEM_IEC958_LEVEL 0x157e |
132 | #define AIU_MEM_IEC958_BUF_CNTL 0x157f |
133 | #define AIU_AIFIFO_CTRL 0x1580 |
134 | #define AIU_AIFIFO_STATUS 0x1581 |
135 | #define AIU_AIFIFO_GBIT 0x1582 |
136 | #define AIU_AIFIFO_CLB 0x1583 |
137 | #define AIU_MEM_AIFIFO_START_PTR 0x1584 |
138 | #define AIU_MEM_AIFIFO_CURR_PTR 0x1585 |
139 | #define AIU_MEM_AIFIFO_END_PTR 0x1586 |
140 | #define AIU_MEM_AIFIFO_BYTES_AVAIL 0x1587 |
141 | #define AIU_MEM_AIFIFO_CONTROL 0x1588 |
142 | #define AIU_MEM_AIFIFO_MAN_WP 0x1589 |
143 | #define AIU_MEM_AIFIFO_MAN_RP 0x158a |
144 | #define AIU_MEM_AIFIFO_LEVEL 0x158b |
145 | #define AIU_MEM_AIFIFO_BUF_CNTL 0x158c |
146 | #define AIU_MEM_AIFIFO_BUF_WRAP_COUNT 0x158d |
147 | #define AIU_MEM_AIFIFO2_BUF_WRAP_COUNT 0x158e |
148 | #define AIU_MEM_AIFIFO_MEM_CTL 0x158f |
149 | #define AIFIFO_TIME_STAMP_CNTL 0x1590 |
150 | #define AIFIFO_TIME_STAMP_SYNC_0 0x1591 |
151 | #define AIFIFO_TIME_STAMP_SYNC_1 0x1592 |
152 | #define AIFIFO_TIME_STAMP_0 0x1593 |
153 | #define AIFIFO_TIME_STAMP_1 0x1594 |
154 | #define AIFIFO_TIME_STAMP_2 0x1595 |
155 | #define AIFIFO_TIME_STAMP_3 0x1596 |
156 | #define AIFIFO_TIME_STAMP_LENGTH 0x1597 |
157 | #define AIFIFO2_TIME_STAMP_CNTL 0x1598 |
158 | #define AIFIFO2_TIME_STAMP_SYNC_0 0x1599 |
159 | #define AIFIFO2_TIME_STAMP_SYNC_1 0x159a |
160 | #define AIFIFO2_TIME_STAMP_0 0x159b |
161 | #define AIFIFO2_TIME_STAMP_1 0x159c |
162 | #define AIFIFO2_TIME_STAMP_2 0x159d |
163 | #define AIFIFO2_TIME_STAMP_3 0x159e |
164 | #define AIFIFO2_TIME_STAMP_LENGTH 0x159f |
165 | #define IEC958_TIME_STAMP_CNTL 0x15a0 |
166 | #define IEC958_TIME_STAMP_SYNC_0 0x15a1 |
167 | #define IEC958_TIME_STAMP_SYNC_1 0x15a2 |
168 | #define IEC958_TIME_STAMP_0 0x15a3 |
169 | #define IEC958_TIME_STAMP_1 0x15a4 |
170 | #define IEC958_TIME_STAMP_2 0x15a5 |
171 | #define IEC958_TIME_STAMP_3 0x15a6 |
172 | #define IEC958_TIME_STAMP_LENGTH 0x15a7 |
173 | #define AIU_MEM_AIFIFO2_MEM_CTL 0x15a8 |
174 | #define AIU_I2S_CBUS_DDR_CNTL 0x15a9 |
175 | #define AIU_I2S_CBUS_DDR_WDATA 0x15aa |
176 | #define AIU_I2S_CBUS_DDR_ADDR 0x15ab |
177 | |
178 | int aml_audio_init(void); |
179 | |
180 | #endif /* _SOUND_H_ */ |
181 |