blob: 9d6f59c97bfaae7ea8482eb03468533465901d9c
1 | /* |
2 | * (C) Copyright 2000 |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
4 | * |
5 | * SPDX-License-Identifier: GPL-2.0+ |
6 | */ |
7 | |
8 | /* |
9 | * Most of the following information was derived from the document |
10 | * "Information Technology - AT Attachment-3 Interface (ATA-3)" |
11 | * which can be found at: |
12 | * http://www.dt.wdc.com/ata/ata-3/ata3r5v.zip |
13 | * ftp://poctok.iae.nsk.su/pub/asm/Documents/IDE/ATA3R5V.ZIP |
14 | * ftp://ftp.fee.vutbr.cz/pub/doc/io/ata/ata-3/ata3r5v.zip |
15 | */ |
16 | |
17 | #ifndef _ATA_H |
18 | #define _ATA_H |
19 | |
20 | #include <libata.h> |
21 | |
22 | /* Register addressing depends on the hardware design; for instance, |
23 | * 8-bit (register) and 16-bit (data) accesses might use different |
24 | * address spaces. This is implemented by the following definitions. |
25 | */ |
26 | #ifndef CONFIG_SYS_ATA_STRIDE |
27 | #define CONFIG_SYS_ATA_STRIDE 1 |
28 | #endif |
29 | |
30 | #define ATA_IO_DATA(x) (CONFIG_SYS_ATA_DATA_OFFSET+((x) * CONFIG_SYS_ATA_STRIDE)) |
31 | #define ATA_IO_REG(x) (CONFIG_SYS_ATA_REG_OFFSET +((x) * CONFIG_SYS_ATA_STRIDE)) |
32 | #define ATA_IO_ALT(x) (CONFIG_SYS_ATA_ALT_OFFSET +((x) * CONFIG_SYS_ATA_STRIDE)) |
33 | |
34 | /* |
35 | * I/O Register Descriptions |
36 | */ |
37 | #define ATA_DATA_REG ATA_IO_DATA(0) |
38 | #define ATA_ERROR_REG ATA_IO_REG(1) |
39 | #define ATA_SECT_CNT ATA_IO_REG(2) |
40 | #define ATA_SECT_NUM ATA_IO_REG(3) |
41 | #define ATA_CYL_LOW ATA_IO_REG(4) |
42 | #define ATA_CYL_HIGH ATA_IO_REG(5) |
43 | #define ATA_DEV_HD ATA_IO_REG(6) |
44 | #define ATA_COMMAND ATA_IO_REG(7) |
45 | #define ATA_DATA_EVEN ATA_IO_REG(8) |
46 | #define ATA_DATA_ODD ATA_IO_REG(9) |
47 | #define ATA_STATUS ATA_COMMAND |
48 | #define ATA_DEV_CTL ATA_IO_ALT(6) |
49 | #define ATA_LBA_LOW ATA_SECT_NUM |
50 | #define ATA_LBA_MID ATA_CYL_LOW |
51 | #define ATA_LBA_HIGH ATA_CYL_HIGH |
52 | #define ATA_LBA_SEL ATA_DEV_CTL |
53 | |
54 | /* |
55 | * Status register bits |
56 | */ |
57 | #define ATA_STAT_BUSY 0x80 /* Device Busy */ |
58 | #define ATA_STAT_READY 0x40 /* Device Ready */ |
59 | #define ATA_STAT_FAULT 0x20 /* Device Fault */ |
60 | #define ATA_STAT_SEEK 0x10 /* Device Seek Complete */ |
61 | #define ATA_STAT_DRQ 0x08 /* Data Request (ready) */ |
62 | #define ATA_STAT_CORR 0x04 /* Corrected Data Error */ |
63 | #define ATA_STAT_INDEX 0x02 /* Vendor specific */ |
64 | #define ATA_STAT_ERR 0x01 /* Error */ |
65 | |
66 | /* |
67 | * Device / Head Register Bits |
68 | */ |
69 | #ifndef ATA_DEVICE |
70 | #define ATA_DEVICE(x) ((x & 1)<<4) |
71 | #endif /* ATA_DEVICE */ |
72 | #define ATA_LBA 0xE0 |
73 | |
74 | /* |
75 | * ATA Commands (only mandatory commands listed here) |
76 | */ |
77 | #define ATA_CMD_READ 0x20 /* Read Sectors (with retries) */ |
78 | #define ATA_CMD_READN 0x21 /* Read Sectors ( no retries) */ |
79 | #define ATA_CMD_WRITE 0x30 /* Write Sectores (with retries)*/ |
80 | #define ATA_CMD_WRITEN 0x31 /* Write Sectors ( no retries)*/ |
81 | #define ATA_CMD_VRFY 0x40 /* Read Verify (with retries) */ |
82 | #define ATA_CMD_VRFYN 0x41 /* Read verify ( no retries) */ |
83 | #define ATA_CMD_SEEK 0x70 /* Seek */ |
84 | #define ATA_CMD_DIAG 0x90 /* Execute Device Diagnostic */ |
85 | #define ATA_CMD_INIT 0x91 /* Initialize Device Parameters */ |
86 | #define ATA_CMD_RD_MULT 0xC4 /* Read Multiple */ |
87 | #define ATA_CMD_WR_MULT 0xC5 /* Write Multiple */ |
88 | #define ATA_CMD_SETMULT 0xC6 /* Set Multiple Mode */ |
89 | #define ATA_CMD_RD_DMA 0xC8 /* Read DMA (with retries) */ |
90 | #define ATA_CMD_RD_DMAN 0xC9 /* Read DMS ( no retries) */ |
91 | #define ATA_CMD_WR_DMA 0xCA /* Write DMA (with retries) */ |
92 | #define ATA_CMD_WR_DMAN 0xCB /* Write DMA ( no retires) */ |
93 | #define ATA_CMD_IDENT 0xEC /* Identify Device */ |
94 | #define ATA_CMD_SETF 0xEF /* Set Features */ |
95 | #define ATA_CMD_CHK_PWR 0xE5 /* Check Power Mode */ |
96 | |
97 | #define ATA_CMD_READ_EXT 0x24 /* Read Sectors (with retries) with 48bit addressing */ |
98 | #define ATA_CMD_WRITE_EXT 0x34 /* Write Sectores (with retries) with 48bit addressing */ |
99 | #define ATA_CMD_VRFY_EXT 0x42 /* Read Verify (with retries) with 48bit addressing */ |
100 | |
101 | #define ATA_CMD_FLUSH 0xE7 /* Flush drive cache */ |
102 | #define ATA_CMD_FLUSH_EXT 0xEA /* Flush drive cache, with 48bit addressing */ |
103 | |
104 | /* |
105 | * ATAPI Commands |
106 | */ |
107 | #define ATAPI_CMD_IDENT 0xA1 /* Identify AT Atachment Packed Interface Device */ |
108 | #define ATAPI_CMD_PACKET 0xA0 /* Packed Command */ |
109 | |
110 | |
111 | #define ATAPI_CMD_INQUIRY 0x12 |
112 | #define ATAPI_CMD_REQ_SENSE 0x03 |
113 | #define ATAPI_CMD_READ_CAP 0x25 |
114 | #define ATAPI_CMD_START_STOP 0x1B |
115 | #define ATAPI_CMD_READ_12 0xA8 |
116 | |
117 | |
118 | #define ATA_GET_ERR() inb(ATA_STATUS) |
119 | #define ATA_GET_STAT() inb(ATA_STATUS) |
120 | #define ATA_OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good)) |
121 | #define ATA_BAD_R_STAT (ATA_STAT_BUSY | ATA_STAT_ERR) |
122 | #define ATA_BAD_W_STAT (ATA_BAD_R_STAT | ATA_STAT_FAULT) |
123 | #define ATA_BAD_STAT (ATA_BAD_R_STAT | ATA_STAT_DRQ) |
124 | #define ATA_DRIVE_READY (ATA_READY_STAT | ATA_STAT_SEEK) |
125 | #define ATA_DATA_READY (ATA_STAT_DRQ) |
126 | |
127 | #define ATA_BLOCKSIZE 512 /* bytes */ |
128 | #define ATA_BLOCKSHIFT 9 /* 2 ^ ATA_BLOCKSIZESHIFT = 512 */ |
129 | #define ATA_SECTORWORDS (512 / sizeof(unsigned long)) |
130 | |
131 | #ifndef ATA_RESET_TIME |
132 | #define ATA_RESET_TIME 60 /* spec allows up to 31 seconds */ |
133 | #endif |
134 | |
135 | /* ------------------------------------------------------------------------- */ |
136 | |
137 | /* |
138 | * structure returned by ATA_CMD_IDENT, as per ANSI ATA2 rev.2f spec |
139 | */ |
140 | typedef struct hd_driveid { |
141 | unsigned short config; /* lots of obsolete bit flags */ |
142 | unsigned short cyls; /* "physical" cyls */ |
143 | unsigned short reserved2; /* reserved (word 2) */ |
144 | unsigned short heads; /* "physical" heads */ |
145 | unsigned short track_bytes; /* unformatted bytes per track */ |
146 | unsigned short sector_bytes; /* unformatted bytes per sector */ |
147 | unsigned short sectors; /* "physical" sectors per track */ |
148 | unsigned short vendor0; /* vendor unique */ |
149 | unsigned short vendor1; /* vendor unique */ |
150 | unsigned short vendor2; /* vendor unique */ |
151 | unsigned char serial_no[20]; /* 0 = not_specified */ |
152 | unsigned short buf_type; |
153 | unsigned short buf_size; /* 512 byte increments; 0 = not_specified */ |
154 | unsigned short ecc_bytes; /* for r/w long cmds; 0 = not_specified */ |
155 | unsigned char fw_rev[8]; /* 0 = not_specified */ |
156 | unsigned char model[40]; /* 0 = not_specified */ |
157 | unsigned char max_multsect; /* 0=not_implemented */ |
158 | unsigned char vendor3; /* vendor unique */ |
159 | unsigned short dword_io; /* 0=not_implemented; 1=implemented */ |
160 | unsigned char vendor4; /* vendor unique */ |
161 | unsigned char capability; /* bits 0:DMA 1:LBA 2:IORDYsw 3:IORDYsup*/ |
162 | unsigned short reserved50; /* reserved (word 50) */ |
163 | unsigned char vendor5; /* vendor unique */ |
164 | unsigned char tPIO; /* 0=slow, 1=medium, 2=fast */ |
165 | unsigned char vendor6; /* vendor unique */ |
166 | unsigned char tDMA; /* 0=slow, 1=medium, 2=fast */ |
167 | unsigned short field_valid; /* bits 0:cur_ok 1:eide_ok */ |
168 | unsigned short cur_cyls; /* logical cylinders */ |
169 | unsigned short cur_heads; /* logical heads */ |
170 | unsigned short cur_sectors; /* logical sectors per track */ |
171 | unsigned short cur_capacity0; /* logical total sectors on drive */ |
172 | unsigned short cur_capacity1; /* (2 words, misaligned int) */ |
173 | unsigned char multsect; /* current multiple sector count */ |
174 | unsigned char multsect_valid; /* when (bit0==1) multsect is ok */ |
175 | unsigned int lba_capacity; /* total number of sectors */ |
176 | unsigned short dma_1word; /* single-word dma info */ |
177 | unsigned short dma_mword; /* multiple-word dma info */ |
178 | unsigned short eide_pio_modes; /* bits 0:mode3 1:mode4 */ |
179 | unsigned short eide_dma_min; /* min mword dma cycle time (ns) */ |
180 | unsigned short eide_dma_time; /* recommended mword dma cycle time (ns) */ |
181 | unsigned short eide_pio; /* min cycle time (ns), no IORDY */ |
182 | unsigned short eide_pio_iordy; /* min cycle time (ns), with IORDY */ |
183 | unsigned short words69_70[2]; /* reserved words 69-70 */ |
184 | unsigned short words71_74[4]; /* reserved words 71-74 */ |
185 | unsigned short queue_depth; /* */ |
186 | unsigned short words76_79[4]; /* reserved words 76-79 */ |
187 | unsigned short major_rev_num; /* */ |
188 | unsigned short minor_rev_num; /* */ |
189 | unsigned short command_set_1; /* bits 0:Smart 1:Security 2:Removable 3:PM */ |
190 | unsigned short command_set_2; /* bits 14:Smart Enabled 13:0 zero 10:lba48 support*/ |
191 | unsigned short cfsse; /* command set-feature supported extensions */ |
192 | unsigned short cfs_enable_1; /* command set-feature enabled */ |
193 | unsigned short cfs_enable_2; /* command set-feature enabled */ |
194 | unsigned short csf_default; /* command set-feature default */ |
195 | unsigned short dma_ultra; /* */ |
196 | unsigned short word89; /* reserved (word 89) */ |
197 | unsigned short word90; /* reserved (word 90) */ |
198 | unsigned short CurAPMvalues; /* current APM values */ |
199 | unsigned short word92; /* reserved (word 92) */ |
200 | unsigned short hw_config; /* hardware config */ |
201 | unsigned short words94_99[6];/* reserved words 94-99 */ |
202 | /*unsigned long long lba48_capacity; /--* 4 16bit values containing lba 48 total number of sectors */ |
203 | unsigned short lba48_capacity[4]; /* 4 16bit values containing lba 48 total number of sectors */ |
204 | unsigned short words104_125[22];/* reserved words 104-125 */ |
205 | unsigned short last_lun; /* reserved (word 126) */ |
206 | unsigned short word127; /* reserved (word 127) */ |
207 | unsigned short dlf; /* device lock function |
208 | * 15:9 reserved |
209 | * 8 security level 1:max 0:high |
210 | * 7:6 reserved |
211 | * 5 enhanced erase |
212 | * 4 expire |
213 | * 3 frozen |
214 | * 2 locked |
215 | * 1 en/disabled |
216 | * 0 capability |
217 | */ |
218 | unsigned short csfo; /* current set features options |
219 | * 15:4 reserved |
220 | * 3 auto reassign |
221 | * 2 reverting |
222 | * 1 read-look-ahead |
223 | * 0 write cache |
224 | */ |
225 | unsigned short words130_155[26];/* reserved vendor words 130-155 */ |
226 | unsigned short word156; |
227 | unsigned short words157_159[3];/* reserved vendor words 157-159 */ |
228 | unsigned short words160_162[3];/* reserved words 160-162 */ |
229 | unsigned short cf_advanced_caps; |
230 | unsigned short words164_255[92];/* reserved words 164-255 */ |
231 | } hd_driveid_t; |
232 | |
233 | |
234 | /* |
235 | * PIO Mode Configuration |
236 | * |
237 | * See ATA-3 (AT Attachment-3 Interface) documentation, Figure 14 / Table 21 |
238 | */ |
239 | |
240 | typedef struct { |
241 | unsigned int t_setup; /* Setup Time in [ns] or clocks */ |
242 | unsigned int t_length; /* Length Time in [ns] or clocks */ |
243 | unsigned int t_hold; /* Hold Time in [ns] or clocks */ |
244 | } |
245 | pio_config_t; |
246 | |
247 | #define IDE_MAX_PIO_MODE 4 /* max suppurted PIO mode */ |
248 | |
249 | /* ------------------------------------------------------------------------- */ |
250 | |
251 | #endif /* _ATA_H */ |
252 |