blob: 821de21de7300efaeda1fd5bac19c130bba5b19f
1 | /* |
2 | * Copyright 2008-2014 Freescale Semiconductor, Inc. |
3 | * |
4 | * This program is free software; you can redistribute it and/or |
5 | * modify it under the terms of the GNU General Public License |
6 | * Version 2 as published by the Free Software Foundation. |
7 | */ |
8 | |
9 | #ifndef COMMON_TIMING_PARAMS_H |
10 | #define COMMON_TIMING_PARAMS_H |
11 | |
12 | typedef struct { |
13 | /* parameters to constrict */ |
14 | |
15 | unsigned int tckmin_x_ps; |
16 | unsigned int tckmax_ps; |
17 | unsigned int trcd_ps; |
18 | unsigned int trp_ps; |
19 | unsigned int tras_ps; |
20 | #if defined(CONFIG_SYS_FSL_DDR3) || defined(CONFIG_SYS_FSL_DDR4) |
21 | unsigned int taamin_ps; |
22 | #endif |
23 | |
24 | #ifdef CONFIG_SYS_FSL_DDR4 |
25 | unsigned int trfc1_ps; |
26 | unsigned int trfc2_ps; |
27 | unsigned int trfc4_ps; |
28 | unsigned int trrds_ps; |
29 | unsigned int trrdl_ps; |
30 | unsigned int tccdl_ps; |
31 | #else |
32 | unsigned int twtr_ps; /* maximum = 63750 ps */ |
33 | unsigned int trfc_ps; /* maximum = 255 ns + 256 ns + .75 ns |
34 | = 511750 ps */ |
35 | |
36 | unsigned int trrd_ps; /* maximum = 63750 ps */ |
37 | unsigned int trtp_ps; /* byte 38, spd->trtp */ |
38 | #endif |
39 | unsigned int twr_ps; /* maximum = 63750 ps */ |
40 | unsigned int trc_ps; /* maximum = 254 ns + .75 ns = 254750 ps */ |
41 | |
42 | unsigned int refresh_rate_ps; |
43 | unsigned int extended_op_srt; |
44 | |
45 | #if defined(CONFIG_SYS_FSL_DDR1) || defined(CONFIG_SYS_FSL_DDR2) |
46 | unsigned int tis_ps; /* byte 32, spd->ca_setup */ |
47 | unsigned int tih_ps; /* byte 33, spd->ca_hold */ |
48 | unsigned int tds_ps; /* byte 34, spd->data_setup */ |
49 | unsigned int tdh_ps; /* byte 35, spd->data_hold */ |
50 | unsigned int tdqsq_max_ps; /* byte 44, spd->tdqsq */ |
51 | unsigned int tqhs_ps; /* byte 45, spd->tqhs */ |
52 | #endif |
53 | |
54 | unsigned int ndimms_present; |
55 | unsigned int lowest_common_spd_caslat; |
56 | unsigned int highest_common_derated_caslat; |
57 | unsigned int additive_latency; |
58 | unsigned int all_dimms_burst_lengths_bitmask; |
59 | unsigned int all_dimms_registered; |
60 | unsigned int all_dimms_unbuffered; |
61 | unsigned int all_dimms_ecc_capable; |
62 | |
63 | unsigned long long total_mem; |
64 | unsigned long long base_address; |
65 | |
66 | /* DDR3 RDIMM */ |
67 | unsigned char rcw[16]; /* Register Control Word 0-15 */ |
68 | } common_timing_params_t; |
69 | |
70 | #endif |
71 |