blob: 40480afc9653f7c845dd0f5bbc6e40ff5fcf77e5
1 | /* |
2 | * Copyright 2008 Extreme Engineering Solutions, Inc. |
3 | * |
4 | * This program is free software; you can redistribute it and/or |
5 | * modify it under the terms of the GNU General Public License |
6 | * Version 2 as published by the Free Software Foundation. |
7 | * |
8 | * This program is distributed in the hope that it will be useful, |
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
11 | * GNU General Public License for more details. |
12 | * |
13 | * You should have received a copy of the GNU General Public License |
14 | * along with this program; if not, write to the Free Software |
15 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
16 | * MA 02111-1307 USA |
17 | */ |
18 | |
19 | #ifndef __DS4510_H_ |
20 | #define __DS4510_H_ |
21 | |
22 | /* General defines */ |
23 | #define DS4510_NUM_IO 0x04 |
24 | #define DS4510_IO_MASK ((1 << DS4510_NUM_IO) - 1) |
25 | #define DS4510_EEPROM_PAGE_WRITE_DELAY_MS 20 |
26 | |
27 | /* EEPROM from 0x00 - 0x39 */ |
28 | #define DS4510_EEPROM 0x00 |
29 | #define DS4510_EEPROM_SIZE 0x40 |
30 | #define DS4510_EEPROM_PAGE_SIZE 0x08 |
31 | #define DS4510_EEPROM_PAGE_OFFSET(x) ((x) & (DS4510_EEPROM_PAGE_SIZE - 1)) |
32 | |
33 | /* SEEPROM from 0xf0 - 0xf7 */ |
34 | #define DS4510_SEEPROM 0xf0 |
35 | #define DS4510_SEEPROM_SIZE 0x08 |
36 | |
37 | /* Registers overlapping SEEPROM from 0xf0 - 0xf7 */ |
38 | #define DS4510_PULLUP 0xF0 |
39 | #define DS4510_PULLUP_DIS 0x00 |
40 | #define DS4510_PULLUP_EN 0x01 |
41 | #define DS4510_RSTDELAY 0xF1 |
42 | #define DS4510_RSTDELAY_MASK 0x03 |
43 | #define DS4510_RSTDELAY_125 0x00 |
44 | #define DS4510_RSTDELAY_250 0x01 |
45 | #define DS4510_RSTDELAY_500 0x02 |
46 | #define DS4510_RSTDELAY_1000 0x03 |
47 | #define DS4510_IO3 0xF4 |
48 | #define DS4510_IO2 0xF5 |
49 | #define DS4510_IO1 0xF6 |
50 | #define DS4510_IO0 0xF7 |
51 | |
52 | /* Status configuration registers from 0xf8 - 0xf9*/ |
53 | #define DS4510_IO_STATUS 0xF8 |
54 | #define DS4510_CFG 0xF9 |
55 | #define DS4510_CFG_READY 0x80 |
56 | #define DS4510_CFG_TRIP_POINT 0x40 |
57 | #define DS4510_CFG_RESET 0x20 |
58 | #define DS4510_CFG_SEE 0x10 |
59 | #define DS4510_CFG_SWRST 0x08 |
60 | |
61 | /* SRAM from 0xfa - 0xff */ |
62 | #define DS4510_SRAM 0xfa |
63 | #define DS4510_SRAM_SIZE 0x06 |
64 | |
65 | int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count); |
66 | int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count); |
67 | int ds4510_see_write(uint8_t chip, uint8_t nv); |
68 | int ds4510_rstdelay_write(uint8_t chip, uint8_t delay); |
69 | int ds4510_pullup_write(uint8_t chip, uint8_t val); |
70 | int ds4510_pullup_read(uint8_t chip); |
71 | int ds4510_gpio_write(uint8_t chip, uint8_t val); |
72 | int ds4510_gpio_read(uint8_t chip); |
73 | int ds4510_gpio_read_val(uint8_t chip); |
74 | |
75 | #endif /* __DS4510_H_ */ |
76 |