blob: 088797e4c6ca9d4c39a82cd6067de61c4df911a5
1 | /* |
2 | * SPDX-License-Identifier: GPL-2.0 IBM-pibs |
3 | * |
4 | * Additions (C) Copyright 2009 Industrie Dial Face S.p.A. |
5 | */ |
6 | /*----------------------------------------------------------------------------+ |
7 | | |
8 | | File Name: miiphy.h |
9 | | |
10 | | Function: Include file defining PHY registers. |
11 | | |
12 | | Author: Mark Wisner |
13 | | |
14 | +----------------------------------------------------------------------------*/ |
15 | #ifndef _miiphy_h_ |
16 | #define _miiphy_h_ |
17 | |
18 | #include <common.h> |
19 | #include <linux/mii.h> |
20 | #include <linux/list.h> |
21 | #include <net.h> |
22 | #include <phy.h> |
23 | |
24 | struct legacy_mii_dev { |
25 | int (*read)(const char *devname, unsigned char addr, |
26 | unsigned char reg, unsigned short *value); |
27 | int (*write)(const char *devname, unsigned char addr, |
28 | unsigned char reg, unsigned short value); |
29 | }; |
30 | |
31 | int miiphy_read(const char *devname, unsigned char addr, unsigned char reg, |
32 | unsigned short *value); |
33 | int miiphy_write(const char *devname, unsigned char addr, unsigned char reg, |
34 | unsigned short value); |
35 | int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui, |
36 | unsigned char *model, unsigned char *rev); |
37 | int miiphy_reset(const char *devname, unsigned char addr); |
38 | int miiphy_speed(const char *devname, unsigned char addr); |
39 | int miiphy_duplex(const char *devname, unsigned char addr); |
40 | int miiphy_is_1000base_x(const char *devname, unsigned char addr); |
41 | #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
42 | int miiphy_link(const char *devname, unsigned char addr); |
43 | #endif |
44 | |
45 | void miiphy_init(void); |
46 | |
47 | void miiphy_register(const char *devname, |
48 | int (*read)(const char *devname, unsigned char addr, |
49 | unsigned char reg, unsigned short *value), |
50 | int (*write)(const char *devname, unsigned char addr, |
51 | unsigned char reg, unsigned short value)); |
52 | |
53 | int miiphy_set_current_dev(const char *devname); |
54 | const char *miiphy_get_current_dev(void); |
55 | struct mii_dev *mdio_get_current_dev(void); |
56 | struct mii_dev *miiphy_get_dev_by_name(const char *devname); |
57 | struct phy_device *mdio_phydev_for_ethname(const char *devname); |
58 | |
59 | void miiphy_listdev(void); |
60 | |
61 | struct mii_dev *mdio_alloc(void); |
62 | int mdio_register(struct mii_dev *bus); |
63 | void mdio_list_devices(void); |
64 | |
65 | #ifdef CONFIG_BITBANGMII |
66 | |
67 | #define BB_MII_DEVNAME "bb_miiphy" |
68 | |
69 | struct bb_miiphy_bus { |
70 | char name[16]; |
71 | int (*init)(struct bb_miiphy_bus *bus); |
72 | int (*mdio_active)(struct bb_miiphy_bus *bus); |
73 | int (*mdio_tristate)(struct bb_miiphy_bus *bus); |
74 | int (*set_mdio)(struct bb_miiphy_bus *bus, int v); |
75 | int (*get_mdio)(struct bb_miiphy_bus *bus, int *v); |
76 | int (*set_mdc)(struct bb_miiphy_bus *bus, int v); |
77 | int (*delay)(struct bb_miiphy_bus *bus); |
78 | #ifdef CONFIG_BITBANGMII_MULTI |
79 | void *priv; |
80 | #endif |
81 | }; |
82 | |
83 | extern struct bb_miiphy_bus bb_miiphy_buses[]; |
84 | extern int bb_miiphy_buses_num; |
85 | |
86 | void bb_miiphy_init(void); |
87 | int bb_miiphy_read(const char *devname, unsigned char addr, |
88 | unsigned char reg, unsigned short *value); |
89 | int bb_miiphy_write(const char *devname, unsigned char addr, |
90 | unsigned char reg, unsigned short value); |
91 | #endif |
92 | |
93 | /* phy seed setup */ |
94 | #define AUTO 99 |
95 | #define _1000BASET 1000 |
96 | #define _100BASET 100 |
97 | #define _10BASET 10 |
98 | #define HALF 22 |
99 | #define FULL 44 |
100 | |
101 | /* phy register offsets */ |
102 | #define MII_MIPSCR 0x11 |
103 | |
104 | /* MII_LPA */ |
105 | #define PHY_ANLPAR_PSB_802_3 0x0001 |
106 | #define PHY_ANLPAR_PSB_802_9 0x0002 |
107 | |
108 | /* MII_CTRL1000 masks */ |
109 | #define PHY_1000BTCR_1000FD 0x0200 |
110 | #define PHY_1000BTCR_1000HD 0x0100 |
111 | |
112 | /* MII_STAT1000 masks */ |
113 | #define PHY_1000BTSR_MSCF 0x8000 |
114 | #define PHY_1000BTSR_MSCR 0x4000 |
115 | #define PHY_1000BTSR_LRS 0x2000 |
116 | #define PHY_1000BTSR_RRS 0x1000 |
117 | #define PHY_1000BTSR_1000FD 0x0800 |
118 | #define PHY_1000BTSR_1000HD 0x0400 |
119 | |
120 | /* phy EXSR */ |
121 | #define ESTATUS_1000XF 0x8000 |
122 | #define ESTATUS_1000XH 0x4000 |
123 | |
124 | #endif |
125 |