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1/*
2 * (C) Copyright 2008
3 * Benjamin Warren, biggerbadderben@gmail.com
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8/*
9 * netdev.h - definitions an prototypes for network devices
10 */
11
12#ifndef _NETDEV_H_
13#define _NETDEV_H_
14
15/*
16 * Board and CPU-specific initialization functions
17 * board_eth_init() has highest priority. cpu_eth_init() only
18 * gets called if board_eth_init() isn't instantiated or fails.
19 * Return values:
20 * 0: success
21 * -1: failure
22 */
23
24int board_eth_init(bd_t *bis);
25int cpu_eth_init(bd_t *bis);
26
27/* Driver initialization prototypes */
28int altera_tse_initialize(u8 dev_num, int mac_base,
29 int sgdma_rx_base, int sgdma_tx_base,
30 u32 sgdma_desc_base, u32 sgdma_desc_size);
31int at91emac_register(bd_t *bis, unsigned long iobase);
32int au1x00_enet_initialize(bd_t*);
33int ax88180_initialize(bd_t *bis);
34int bcm_sf2_eth_register(bd_t *bis, u8 dev_num);
35int bfin_EMAC_initialize(bd_t *bis);
36int calxedaxgmac_initialize(u32 id, ulong base_addr);
37int cs8900_initialize(u8 dev_num, int base_addr);
38int davinci_emac_initialize(void);
39int dc21x4x_initialize(bd_t *bis);
40int designware_initialize(ulong base_addr, u32 interface);
41int dm9000_initialize(bd_t *bis);
42int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr);
43int e1000_initialize(bd_t *bis);
44int eepro100_initialize(bd_t *bis);
45int enc28j60_initialize(unsigned int bus, unsigned int cs,
46 unsigned int max_hz, unsigned int mode);
47int ep93xx_eth_initialize(u8 dev_num, int base_addr);
48int eth_3com_initialize (bd_t * bis);
49int ethoc_initialize(u8 dev_num, int base_addr);
50int fec_initialize (bd_t *bis);
51int fecmxc_initialize(bd_t *bis);
52int fecmxc_initialize_multi(bd_t *bis, int dev_id, int phy_id, uint32_t addr);
53int ftgmac100_initialize(bd_t *bits);
54int ftmac100_initialize(bd_t *bits);
55int ftmac110_initialize(bd_t *bits);
56int greth_initialize(bd_t *bis);
57void gt6426x_eth_initialize(bd_t *bis);
58int ks8695_eth_initialize(void);
59int ks8851_mll_initialize(u8 dev_num, int base_addr);
60int lan91c96_initialize(u8 dev_num, int base_addr);
61int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
62int mcdmafec_initialize(bd_t *bis);
63int mcffec_initialize(bd_t *bis);
64int mpc512x_fec_initialize(bd_t *bis);
65int mpc5xxx_fec_initialize(bd_t *bis);
66int mpc82xx_scc_enet_initialize(bd_t *bis);
67int mvgbe_initialize(bd_t *bis);
68int mvneta_initialize(bd_t *bis, int base_addr, int devnum, int phy_addr);
69int natsemi_initialize(bd_t *bis);
70int ne2k_register(void);
71int npe_initialize(bd_t *bis);
72int ns8382x_initialize(bd_t *bis);
73int pcnet_initialize(bd_t *bis);
74int ppc_4xx_eth_initialize (bd_t *bis);
75int rtl8139_initialize(bd_t *bis);
76int rtl8169_initialize(bd_t *bis);
77int scc_initialize(bd_t *bis);
78int sh_eth_initialize(bd_t *bis);
79int skge_initialize(bd_t *bis);
80int smc91111_initialize(u8 dev_num, int base_addr);
81int smc911x_initialize(u8 dev_num, int base_addr);
82int sunxi_emac_initialize(bd_t *bis);
83int sunxi_gmac_initialize(bd_t *bis);
84int tsi108_eth_initialize(bd_t *bis);
85int uec_standard_init(bd_t *bis);
86int uli526x_initialize(bd_t *bis);
87int armada100_fec_register(unsigned long base_addr);
88int xilinx_axiemac_initialize(bd_t *bis, unsigned long base_addr,
89 unsigned long dma_addr);
90int xilinx_emaclite_of_init(const void *blob);
91int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr,
92 int txpp, int rxpp);
93int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags,
94 unsigned long ctrl_addr);
95int zynq_gem_of_init(const void *blob);
96int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr, u32 emio);
97/*
98 * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface
99 * exported by a public hader file, we need a global definition at this point.
100 */
101#if defined(CONFIG_XILINX_LL_TEMAC)
102#define XILINX_LL_TEMAC_M_FIFO 0 /* use FIFO Ctrl */
103#define XILINX_LL_TEMAC_M_SDMA_PLB (1 << 0)/* use SDMA Ctrl via PLB */
104#define XILINX_LL_TEMAC_M_SDMA_DCR (1 << 1)/* use SDMA Ctrl via DCR */
105#endif
106
107/* Boards with PCI network controllers can call this from their board_eth_init()
108 * function to initialize whatever's on board.
109 * Return value is total # of devices found */
110
111static inline int pci_eth_init(bd_t *bis)
112{
113 int num = 0;
114
115#ifdef CONFIG_PCI
116
117#ifdef CONFIG_EEPRO100
118 num += eepro100_initialize(bis);
119#endif
120#ifdef CONFIG_TULIP
121 num += dc21x4x_initialize(bis);
122#endif
123#ifdef CONFIG_E1000
124 num += e1000_initialize(bis);
125#endif
126#ifdef CONFIG_PCNET
127 num += pcnet_initialize(bis);
128#endif
129#ifdef CONFIG_NATSEMI
130 num += natsemi_initialize(bis);
131#endif
132#ifdef CONFIG_NS8382X
133 num += ns8382x_initialize(bis);
134#endif
135#if defined(CONFIG_RTL8139)
136 num += rtl8139_initialize(bis);
137#endif
138#if defined(CONFIG_RTL8169)
139 num += rtl8169_initialize(bis);
140#endif
141#if defined(CONFIG_ULI526X)
142 num += uli526x_initialize(bis);
143#endif
144
145#endif /* CONFIG_PCI */
146 return num;
147}
148
149/*
150 * Boards with mv88e61xx switch can use this by defining
151 * CONFIG_MV88E61XX_SWITCH in respective board configheader file
152 * the stuct and enums here are used to specify switch configuration params
153 */
154#if defined(CONFIG_MV88E61XX_SWITCH)
155
156/* constants for any 88E61xx switch */
157#define MV88E61XX_MAX_PORTS_NUM 6
158
159enum mv88e61xx_cfg_mdip {
160 MV88E61XX_MDIP_NOCHANGE,
161 MV88E61XX_MDIP_REVERSE
162};
163
164enum mv88e61xx_cfg_ledinit {
165 MV88E61XX_LED_INIT_DIS,
166 MV88E61XX_LED_INIT_EN
167};
168
169enum mv88e61xx_cfg_rgmiid {
170 MV88E61XX_RGMII_DELAY_DIS,
171 MV88E61XX_RGMII_DELAY_EN
172};
173
174enum mv88e61xx_cfg_prtstt {
175 MV88E61XX_PORTSTT_DISABLED,
176 MV88E61XX_PORTSTT_BLOCKING,
177 MV88E61XX_PORTSTT_LEARNING,
178 MV88E61XX_PORTSTT_FORWARDING
179};
180
181struct mv88e61xx_config {
182 char *name;
183 u8 vlancfg[MV88E61XX_MAX_PORTS_NUM];
184 enum mv88e61xx_cfg_rgmiid rgmii_delay;
185 enum mv88e61xx_cfg_prtstt portstate;
186 enum mv88e61xx_cfg_ledinit led_init;
187 enum mv88e61xx_cfg_mdip mdip;
188 u32 ports_enabled;
189 u8 cpuport;
190};
191
192/*
193 * Common mappings for Internal VLANs
194 * These mappings consider that all ports are useable; the driver
195 * will mask inexistent/unused ports.
196 */
197
198/* Switch mode : routes any port to any port */
199#define MV88E61XX_VLANCFG_SWITCH { 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F }
200
201/* Router mode: routes only CPU port 5 to/from non-CPU ports 0-4 */
202#define MV88E61XX_VLANCFG_ROUTER { 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F }
203
204int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig);
205#endif /* CONFIG_MV88E61XX_SWITCH */
206
207struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id);
208#ifdef CONFIG_PHYLIB
209struct phy_device;
210int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr,
211 struct mii_dev *bus, struct phy_device *phydev);
212#else
213/*
214 * Allow FEC to fine-tune MII configuration on boards which require this.
215 */
216int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int));
217#endif
218
219#endif /* _NETDEV_H_ */
220
generated by cgit at 2024-05-19 14:27:11 (GMT)