| author | zhiguang.ouyang <zhiguang.ouyang@amlogic.com> | 2019-11-01 03:06:07 (GMT) |
|---|---|---|
| committer | Xindong Xu <xindong.xu@amlogic.com> | 2019-11-28 01:39:11 (GMT) |
| commit | fea22d89437a28d3d9e4b2ec73b6c34156f83bb5 (patch) | |
| tree | 0595eba362e62543159b6c096eb77d0f80dfe26c | |
| parent | 5eca6fba372f4028cdb7c632c6ca5bf2da859610 (diff) | |
| download | uboot-fea22d89437a28d3d9e4b2ec73b6c34156f83bb5.zip uboot-fea22d89437a28d3d9e4b2ec73b6c34156f83bb5.tar.gz uboot-fea22d89437a28d3d9e4b2ec73b6c34156f83bb5.tar.bz2 | |
ddr: timing: LPDDR4_PHY_V_0_1_21 ab301 kernel offset right 4step fail [1/1]
PD#SWPL-14950
Problem:
ab301 kernel offset right 4step fail
Solution:
.ac_trace_delay = {32-10,32+10,32,32,32,32,32+15,32+10,32+10,32-15},
Verify:
test pass at ab301
Change-Id: Ic1a0258e3b080e9b2de7e399529a73a0fc827d1e
Signed-off-by: zhiguang.ouyang <zhiguang.ouyang@amlogic.com>
| -rw-r--r-- | board/amlogic/tm2_t962x3_ab301_v1/firmware/timing.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/amlogic/tm2_t962x3_ab301_v1/firmware/timing.c b/board/amlogic/tm2_t962x3_ab301_v1/firmware/timing.c index 0dab2ea..6cd4f24 100644 --- a/board/amlogic/tm2_t962x3_ab301_v1/firmware/timing.c +++ b/board/amlogic/tm2_t962x3_ab301_v1/firmware/timing.c @@ -159,7 +159,7 @@ ddr_set_t __ddr_setting[] = { // .vref_reverse = 0, // .ac_trace_delay = {32,32-10,32,32,32+10,32,32,32,32,32-10}, // .ac_trace_delay = {32-10,32-15,32,32,32,32,32,32,32,32-10}, - .ac_trace_delay = {32,32,32,32,32,32,32,32,32,32}, + .ac_trace_delay = {32-10,32+10,32,32,32,32,32+15,32+10,32+10,32-15}, //{00,00}, .ac_pinmux = {00,00}, #if 1 |